DCP_REG            83 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	status_pos = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION));
DCP_REG            87 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	if (status_pos != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION))) {
DCP_REG            89 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL));
DCP_REG            92 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value);
DCP_REG            94 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		frame_count = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT));
DCP_REG            98 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 			if (frame_count != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT)))
DCP_REG           106 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL));
DCP_REG           109 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value);
DCP_REG           312 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH),
DCP_REG           315 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS), 0);
DCP_REG           319 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH),
DCP_REG           322 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS),
DCP_REG           334 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), 0);
DCP_REG           342 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), value);
DCP_REG          1220 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	uint32_t address = DCP_REG(mmDCP_GSL_CONTROL);
DCP_REG          1321 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	uint32_t address = DCP_REG(mmDCP_GSL_CONTROL);
DCP_REG           495 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH),
DCP_REG           498 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS), 0);
DCP_REG           513 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH),
DCP_REG           516 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		DCP_REG(mmGRPH_COMPRESS_SURFACE_ADDRESS),
DCP_REG           531 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), 0);
DCP_REG           539 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), value);