DCOMU             172 arch/sh/kernel/cpu/sh2a/setup-sh7264.c 	INTC_IRQ(DCOMU, 310), INTC_IRQ(DCOMU, 311),
DCOMU             173 arch/sh/kernel/cpu/sh2a/setup-sh7264.c 	INTC_IRQ(DCOMU, 312),
DCOMU             213 arch/sh/kernel/cpu/sh2a/setup-sh7264.c 	{ 0xfffe0c20, 0, 16, 4, /* IPR22 */ { SRCC0, SRCC1, 0, DCOMU } },