DCLK_LCDC0        581 drivers/clk/rockchip/clk-rk3188.c 	MUX(DCLK_LCDC0, "dclk_lcdc0", mux_rk3066_lcdc0_p, CLK_SET_RATE_PARENT,
DCLK_LCDC0        696 drivers/clk/rockchip/clk-rk3188.c 	COMPOSITE(DCLK_LCDC0, "dclk_lcdc0", mux_pll_src_cpll_gpll_p, 0,