DCLK_DIR_CNTL_EN 9441 drivers/gpu/drm/radeon/cik.c 	tmp &= ~(DCLK_DIR_CNTL_EN|DCLK_DIVIDER_MASK);
DCLK_DIR_CNTL_EN 1156 drivers/gpu/drm/radeon/evergreen.c 	WREG32_P(cntl_reg, dividers.post_div, ~(DCLK_DIR_CNTL_EN|DCLK_DIVIDER_MASK));