DCE3_HDMI0_ACR_PACKET_CONTROL  176 drivers/gpu/drm/radeon/dce3_1_afmt.c 	WREG32(DCE3_HDMI0_ACR_PACKET_CONTROL + offset,
DCE3_HDMI0_ACR_PACKET_CONTROL  184 drivers/gpu/drm/radeon/r600_hdmi.c 	uint32_t acr_ctl = ASIC_IS_DCE3(rdev) ? DCE3_HDMI0_ACR_PACKET_CONTROL :