DCACHE 11 arch/csky/include/uapi/asm/cachectl.h #define BCACHE (ICACHE|DCACHE) DCACHE 19 arch/csky/mm/syscache.c case DCACHE: DCACHE 17 arch/mips/include/uapi/asm/cachectl.h #define BCACHE (ICACHE|DCACHE) /* flush both caches */ DCACHE 11 arch/nds32/kernel/cacheinfo.c char cache_type = (type & CACHE_TYPE_INST ? ICACHE : DCACHE); DCACHE 113 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].ways = CACHE_WAY(DCACHE); DCACHE 114 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].line_size = CACHE_LINE_SIZE(DCACHE); DCACHE 115 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].sets = CACHE_SET(DCACHE); DCACHE 116 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].size = DCACHE 117 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].ways * L1_cache_info[DCACHE].line_size * DCACHE 118 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].sets / 1024; DCACHE 119 arch/nds32/kernel/setup.c pr_info("L1D:%dKB/%dS/%dW/%dB\n", L1_cache_info[DCACHE].size, DCACHE 120 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].sets, L1_cache_info[DCACHE].ways, DCACHE 121 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].line_size); DCACHE 123 arch/nds32/kernel/setup.c if (L1_cache_info[DCACHE].size != L1_CACHE_BYTES) DCACHE 126 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].size, L1_CACHE_BYTES); DCACHE 137 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].size * 1024 / PAGE_SIZE / DCACHE 138 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].ways; DCACHE 139 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].aliasing_num = aliasing_num; DCACHE 140 arch/nds32/kernel/setup.c L1_cache_info[DCACHE].aliasing_mask = DCACHE 342 arch/nds32/kernel/setup.c CACHE_SET(DCACHE) * CACHE_WAY(DCACHE) * DCACHE 343 arch/nds32/kernel/setup.c CACHE_LINE_SIZE(DCACHE) / 1024, CACHE_SET(DCACHE), DCACHE 344 arch/nds32/kernel/setup.c CACHE_WAY(DCACHE), CACHE_LINE_SIZE(DCACHE)); DCACHE 41 arch/nds32/kernel/sys_nds32.c case DCACHE: DCACHE 130 arch/nds32/kernel/vdso.c vdso_mapping_len += L1_cache_info[DCACHE].aliasing_num - 1; DCACHE 146 arch/nds32/kernel/vdso.c L1_cache_info[DCACHE].aliasing_mask; DCACHE 19 arch/nds32/mm/cacheflush.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 91 arch/nds32/mm/cacheflush.c kaddr = BASE_ADDR0 | (uaddr & L1_cache_info[DCACHE].aliasing_mask); DCACHE 111 arch/nds32/mm/cacheflush.c kaddr = BASE_ADDR1 | (uaddr & L1_cache_info[DCACHE].aliasing_mask); DCACHE 276 arch/nds32/mm/cacheflush.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 196 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 216 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 237 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 292 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 305 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 319 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 335 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 356 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 443 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 462 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 487 arch/nds32/mm/proc.c line_size = L1_cache_info[DCACHE].line_size; DCACHE 18 arch/sh/include/uapi/asm/cachectl.h #define BCACHE (ICACHE|DCACHE) /* flush both caches */ DCACHE 340 fs/ceph/dir.c if (ceph_test_mount_opt(fsc, DCACHE) && DCACHE 760 fs/ceph/dir.c ceph_test_mount_opt(fsc, DCACHE) &&