DBUF_CTL_S2 4160 drivers/gpu/drm/i915/display/intel_display_power.c ret = intel_dbuf_slice_set(dev_priv, DBUF_CTL_S2, true); DBUF_CTL_S2 4162 drivers/gpu/drm/i915/display/intel_display_power.c ret = intel_dbuf_slice_set(dev_priv, DBUF_CTL_S2, false); DBUF_CTL_S2 4171 drivers/gpu/drm/i915/display/intel_display_power.c I915_WRITE(DBUF_CTL_S2, I915_READ(DBUF_CTL_S2) | DBUF_POWER_REQUEST); DBUF_CTL_S2 4172 drivers/gpu/drm/i915/display/intel_display_power.c POSTING_READ(DBUF_CTL_S2); DBUF_CTL_S2 4177 drivers/gpu/drm/i915/display/intel_display_power.c !(I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)) DBUF_CTL_S2 4190 drivers/gpu/drm/i915/display/intel_display_power.c I915_WRITE(DBUF_CTL_S2, I915_READ(DBUF_CTL_S2) & ~DBUF_POWER_REQUEST); DBUF_CTL_S2 4191 drivers/gpu/drm/i915/display/intel_display_power.c POSTING_READ(DBUF_CTL_S2); DBUF_CTL_S2 4196 drivers/gpu/drm/i915/display/intel_display_power.c (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)) DBUF_CTL_S2 3647 drivers/gpu/drm/i915/intel_pm.c if (0 && I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)