DBUF_CTL          959 drivers/gpu/drm/i915/display/intel_display_power.c 	u32 tmp = I915_READ(DBUF_CTL);
DBUF_CTL         4130 drivers/gpu/drm/i915/display/intel_display_power.c 	intel_dbuf_slice_set(dev_priv, DBUF_CTL, true);
DBUF_CTL         4135 drivers/gpu/drm/i915/display/intel_display_power.c 	intel_dbuf_slice_set(dev_priv, DBUF_CTL, false);
DBUF_CTL         2885 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(DBUF_CTL, D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write);