zip_reg_write     160 drivers/crypto/cavium/zip/zip_device.c 	zip_reg_write(dbell.u_reg64,
zip_reg_write     136 drivers/crypto/cavium/zip/zip_main.c 	zip_reg_write(cmd_ctl.u_reg64 & 0xFF, (zip->reg_base + ZIP_CMD_CTL));
zip_reg_write     159 drivers/crypto/cavium/zip/zip_main.c 		zip_reg_write(que_sbuf_ctl.u_reg64,
zip_reg_write     191 drivers/crypto/cavium/zip/zip_main.c 		zip_reg_write(que_sbuf_addr.u_reg64,
zip_reg_write     212 drivers/crypto/cavium/zip/zip_main.c 	zip_reg_write(que_ena.u_reg64, (zip->reg_base + ZIP_QUE_ENA));
zip_reg_write     221 drivers/crypto/cavium/zip/zip_main.c 		zip_reg_write(que_map.u_reg64,
zip_reg_write     231 drivers/crypto/cavium/zip/zip_main.c 	zip_reg_write(que_pri.u_reg64, (zip->reg_base + ZIP_QUE_PRI));
zip_reg_write     323 drivers/crypto/cavium/zip/zip_main.c 		zip_reg_write(cmd_ctl.u_reg64, (zip->reg_base + ZIP_CMD_CTL));
zip_reg_write     115 drivers/crypto/cavium/zip/zip_main.h void zip_reg_write(u64 val, u64 __iomem *addr);