xtensa_set_sr      49 arch/xtensa/include/asm/timex.h 	xtensa_set_sr(ccount, ccount);
xtensa_set_sr      59 arch/xtensa/include/asm/timex.h 	xtensa_set_sr(ccompare, SREG_CCOMPARE + LINUX_TIMER);
xtensa_set_sr     104 arch/xtensa/kernel/hw_breakpoint.c 		xtensa_set_sr(v, SREG_IBREAKA + 0);
xtensa_set_sr     109 arch/xtensa/kernel/hw_breakpoint.c 		xtensa_set_sr(v, SREG_IBREAKA + 1);
xtensa_set_sr     115 arch/xtensa/kernel/hw_breakpoint.c 		xtensa_set_sr(v, SREG_DBREAKA + 0);
xtensa_set_sr     118 arch/xtensa/kernel/hw_breakpoint.c 		xtensa_set_sr(v, SREG_DBREAKC + 0);
xtensa_set_sr     123 arch/xtensa/kernel/hw_breakpoint.c 		xtensa_set_sr(v, SREG_DBREAKA + 1);
xtensa_set_sr     127 arch/xtensa/kernel/hw_breakpoint.c 		xtensa_set_sr(v, SREG_DBREAKC + 1);
xtensa_set_sr     154 arch/xtensa/kernel/hw_breakpoint.c 	xtensa_set_sr(ibreakenable | (1 << reg), SREG_IBREAKENABLE);
xtensa_set_sr     218 arch/xtensa/kernel/hw_breakpoint.c 			xtensa_set_sr(ibreakenable & ~(1 << i),
xtensa_set_sr      89 arch/xtensa/kernel/process.c 		xtensa_set_sr(0, cpenable);
xtensa_set_sr     103 arch/xtensa/kernel/process.c 	xtensa_set_sr(cpenable, cpenable);
xtensa_set_sr     110 arch/xtensa/kernel/process.c 	xtensa_set_sr(old_cpenable, cpenable);
xtensa_set_sr      48 drivers/gpio/gpio-xtensa.c 	xtensa_set_sr(*cpenable | BIT(XCHAL_CP_ID_XTIOP), cpenable);
xtensa_set_sr      54 drivers/gpio/gpio-xtensa.c 	xtensa_set_sr(cpenable, cpenable);
xtensa_set_sr      65 drivers/irqchip/irq-xtensa-mx.c 	xtensa_set_sr(XCHAL_INTTYPE_MASK_EXTERN_EDGE |
xtensa_set_sr      84 drivers/irqchip/irq-xtensa-mx.c 	xtensa_set_sr(mask, intenable);
xtensa_set_sr     102 drivers/irqchip/irq-xtensa-mx.c 	xtensa_set_sr(mask, intenable);
xtensa_set_sr     117 drivers/irqchip/irq-xtensa-mx.c 	xtensa_set_sr(1 << d->hwirq, intclear);
xtensa_set_sr     126 drivers/irqchip/irq-xtensa-mx.c 	xtensa_set_sr(mask, intset);
xtensa_set_sr      47 drivers/irqchip/irq-xtensa-pic.c 	xtensa_set_sr(cached_irq_mask, intenable);
xtensa_set_sr      53 drivers/irqchip/irq-xtensa-pic.c 	xtensa_set_sr(cached_irq_mask, intenable);
xtensa_set_sr      68 drivers/irqchip/irq-xtensa-pic.c 	xtensa_set_sr(1 << d->hwirq, intclear);
xtensa_set_sr      77 drivers/irqchip/irq-xtensa-pic.c 	xtensa_set_sr(mask, intset);