xive_ops 59 arch/powerpc/sysdev/xive/common.c static const struct xive_ops *xive_ops; xive_ops 203 arch/powerpc/sysdev/xive/common.c if ((xd->flags & XIVE_IRQ_FLAG_H_INT_ESB) && xive_ops->esb_rw) xive_ops 204 arch/powerpc/sysdev/xive/common.c val = xive_ops->esb_rw(xd->hw_irq, offset, 0, 0); xive_ops 217 arch/powerpc/sysdev/xive/common.c if ((xd->flags & XIVE_IRQ_FLAG_H_INT_ESB) && xive_ops->esb_rw) xive_ops 218 arch/powerpc/sysdev/xive/common.c xive_ops->esb_rw(xd->hw_irq, offset, data, 1); xive_ops 271 arch/powerpc/sysdev/xive/common.c rc = xive_ops->get_irq_config(hw_irq, &target, &prio, &lirq); xive_ops 314 arch/powerpc/sysdev/xive/common.c xive_ops->update_pending(xc); xive_ops 366 arch/powerpc/sysdev/xive/common.c if (WARN_ON_ONCE(!xive_ops->eoi)) xive_ops 368 arch/powerpc/sysdev/xive/common.c xive_ops->eoi(hw_irq); xive_ops 632 arch/powerpc/sysdev/xive/common.c rc = xive_ops->configure_irq(hw_irq, xive_ops 663 arch/powerpc/sysdev/xive/common.c xive_ops->configure_irq(hw_irq, xive_ops 685 arch/powerpc/sysdev/xive/common.c xive_ops->configure_irq(hw_irq, xive_ops 708 arch/powerpc/sysdev/xive/common.c xive_ops->configure_irq(hw_irq, xive_ops 763 arch/powerpc/sysdev/xive/common.c rc = xive_ops->configure_irq(hw_irq, xive_ops 915 arch/powerpc/sysdev/xive/common.c if (xive_ops->sync_source) xive_ops 916 arch/powerpc/sysdev/xive/common.c xive_ops->sync_source(hw_irq); xive_ops 932 arch/powerpc/sysdev/xive/common.c if (xive_ops->sync_source) xive_ops 933 arch/powerpc/sysdev/xive/common.c xive_ops->sync_source(hw_irq); xive_ops 943 arch/powerpc/sysdev/xive/common.c rc = xive_ops->configure_irq(hw_irq, xive_ops 1041 arch/powerpc/sysdev/xive/common.c rc = xive_ops->populate_irq_data(hw, xd); xive_ops 1159 arch/powerpc/sysdev/xive/common.c if (xive_ops->get_ipi(cpu, xc)) xive_ops 1166 arch/powerpc/sysdev/xive/common.c rc = xive_ops->populate_irq_data(xc->hw_ipi, &xc->ipi_data); xive_ops 1171 arch/powerpc/sysdev/xive/common.c rc = xive_ops->configure_irq(xc->hw_ipi, xive_ops 1205 arch/powerpc/sysdev/xive/common.c xive_ops->configure_irq(xc->hw_ipi, hard_smp_processor_id(), xive_ops 1209 arch/powerpc/sysdev/xive/common.c xive_ops->put_ipi(cpu, xc); xive_ops 1296 arch/powerpc/sysdev/xive/common.c return xive_ops->match(node); xive_ops 1318 arch/powerpc/sysdev/xive/common.c xive_ops->cleanup_queue(cpu, xc, xive_irq_priority); xive_ops 1327 arch/powerpc/sysdev/xive/common.c rc = xive_ops->setup_queue(cpu, xc, xive_irq_priority); xive_ops 1362 arch/powerpc/sysdev/xive/common.c if (xive_ops->setup_cpu) xive_ops 1363 arch/powerpc/sysdev/xive/common.c xive_ops->setup_cpu(smp_processor_id(), xc); xive_ops 1492 arch/powerpc/sysdev/xive/common.c if (xive_ops->teardown_cpu) xive_ops 1493 arch/powerpc/sysdev/xive/common.c xive_ops->teardown_cpu(cpu, xc); xive_ops 1506 arch/powerpc/sysdev/xive/common.c xive_ops->shutdown(); xive_ops 1509 arch/powerpc/sysdev/xive/common.c bool __init xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset, xive_ops 1514 arch/powerpc/sysdev/xive/common.c xive_ops = ops; xive_ops 1532 arch/powerpc/sysdev/xive/common.c xive_ops->name); xive_ops 467 arch/powerpc/sysdev/xive/native.c static const struct xive_ops xive_native_ops = { xive_ops 648 arch/powerpc/sysdev/xive/spapr.c static const struct xive_ops xive_spapr_ops = { xive_ops 63 arch/powerpc/sysdev/xive/xive-internal.h bool xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset,