ADF_PCI_MAX_BARS   96 drivers/crypto/qat/qat_c3xxx/adf_drv.c 	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
ADF_PCI_MAX_BARS  234 drivers/crypto/qat/qat_c3xxx/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
ADF_PCI_MAX_BARS   96 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c 	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
ADF_PCI_MAX_BARS  214 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
ADF_PCI_MAX_BARS   96 drivers/crypto/qat/qat_c62x/adf_drv.c 	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
ADF_PCI_MAX_BARS  234 drivers/crypto/qat/qat_c62x/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
ADF_PCI_MAX_BARS   96 drivers/crypto/qat/qat_c62xvf/adf_drv.c 	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
ADF_PCI_MAX_BARS  214 drivers/crypto/qat/qat_c62xvf/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
ADF_PCI_MAX_BARS  105 drivers/crypto/qat/qat_common/adf_accel_devices.h 	struct adf_bar pci_bars[ADF_PCI_MAX_BARS];
ADF_PCI_MAX_BARS   96 drivers/crypto/qat/qat_dh895xcc/adf_drv.c 	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
ADF_PCI_MAX_BARS  236 drivers/crypto/qat/qat_dh895xcc/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
ADF_PCI_MAX_BARS   96 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c 	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
ADF_PCI_MAX_BARS  214 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {