x86_pmu_event_addr  592 arch/x86/events/amd/core.c 		rdmsrl(x86_pmu_event_addr(idx), counter);
x86_pmu_event_addr  152 arch/x86/events/core.c 		if (!reserve_perfctr_nmi(x86_pmu_event_addr(i)))
x86_pmu_event_addr  171 arch/x86/events/core.c 		release_perfctr_nmi(x86_pmu_event_addr(i));
x86_pmu_event_addr  181 arch/x86/events/core.c 		release_perfctr_nmi(x86_pmu_event_addr(i));
x86_pmu_event_addr  248 arch/x86/events/core.c 	reg = x86_pmu_event_addr(reg_safe);
x86_pmu_event_addr 1076 arch/x86/events/core.c 		hwc->event_base  = x86_pmu_event_addr(hwc->idx);
x86_pmu_event_addr 1392 arch/x86/events/core.c 		rdmsrl(x86_pmu_event_addr(idx), pmc_count);
x86_pmu_event_addr 2307 arch/x86/events/intel/core.c 		wrmsrl_safe(x86_pmu_event_addr(idx),  0ull);