x86_pmu_config_addr  157 arch/x86/events/core.c 		if (!reserve_evntsel_nmi(x86_pmu_config_addr(i)))
x86_pmu_config_addr  165 arch/x86/events/core.c 		release_evntsel_nmi(x86_pmu_config_addr(i));
x86_pmu_config_addr  182 arch/x86/events/core.c 		release_evntsel_nmi(x86_pmu_config_addr(i));
x86_pmu_config_addr  205 arch/x86/events/core.c 		reg = x86_pmu_config_addr(i);
x86_pmu_config_addr  624 arch/x86/events/core.c 		rdmsrl(x86_pmu_config_addr(idx), val);
x86_pmu_config_addr  628 arch/x86/events/core.c 		wrmsrl(x86_pmu_config_addr(idx), val);
x86_pmu_config_addr 1075 arch/x86/events/core.c 		hwc->config_base = x86_pmu_config_addr(hwc->idx);
x86_pmu_config_addr 1391 arch/x86/events/core.c 		rdmsrl(x86_pmu_config_addr(idx), pmc_ctrl);
x86_pmu_config_addr 2306 arch/x86/events/intel/core.c 		wrmsrl_safe(x86_pmu_config_addr(idx), 0ull);
x86_pmu_config_addr 3376 arch/x86/events/intel/core.c 		arr[idx].msr = x86_pmu_config_addr(idx);
x86_pmu_config_addr 1371 arch/x86/events/intel/p4.c 		reg = x86_pmu_config_addr(i);