x 21 Documentation/scheduler/sched-pelt.c unsigned int x; x 26 Documentation/scheduler/sched-pelt.c x = ((1UL<<32)-1)*pow(y, i); x 29 Documentation/scheduler/sched-pelt.c printf("0x%8x, ", x); x 84 Documentation/scheduler/sched-pelt.c int i, x = sum; x 89 Documentation/scheduler/sched-pelt.c x = x/2 + sum; x 94 Documentation/scheduler/sched-pelt.c printf("%6d,", x); x 66 arch/alpha/boot/misc.c # define Trace(x) fprintf x x 67 arch/alpha/boot/misc.c # define Tracev(x) {if (verbose) fprintf x ;} x 68 arch/alpha/boot/misc.c # define Tracevv(x) {if (verbose>1) fprintf x ;} x 69 arch/alpha/boot/misc.c # define Tracec(c,x) {if (verbose && (c)) fprintf x ;} x 70 arch/alpha/boot/misc.c # define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} x 73 arch/alpha/boot/misc.c # define Trace(x) x 74 arch/alpha/boot/misc.c # define Tracev(x) x 75 arch/alpha/boot/misc.c # define Tracevv(x) x 76 arch/alpha/boot/misc.c # define Tracec(c,x) x 77 arch/alpha/boot/misc.c # define Tracecv(c,x) x 142 arch/alpha/boot/misc.c static void error(char *x) x 145 arch/alpha/boot/misc.c puts(x); x 33 arch/alpha/boot/tools/objstrip.c # define elf_check_arch(x) ((x)->e_machine == EM_ALPHA) x 299 arch/alpha/include/asm/bitops.h static inline unsigned long ffz_b(unsigned long x) x 303 arch/alpha/include/asm/bitops.h x = ~x & -~x; /* set first 0 bit, clear others */ x 304 arch/alpha/include/asm/bitops.h x1 = x & 0xAA; x 305 arch/alpha/include/asm/bitops.h x2 = x & 0xCC; x 306 arch/alpha/include/asm/bitops.h x4 = x & 0xF0; x 376 arch/alpha/include/asm/bitops.h static inline int fls64(unsigned long x) x 380 arch/alpha/include/asm/bitops.h t = __kernel_cmpbge (x, 0x0101010101010101UL); x 382 arch/alpha/include/asm/bitops.h t = __kernel_extbl (x, a); x 383 arch/alpha/include/asm/bitops.h r = a*8 + __flsm1_tab[t] + (x != 0); x 389 arch/alpha/include/asm/bitops.h static inline unsigned long __fls(unsigned long x) x 391 arch/alpha/include/asm/bitops.h return fls64(x) - 1; x 394 arch/alpha/include/asm/bitops.h static inline int fls(unsigned int x) x 396 arch/alpha/include/asm/bitops.h return fls64(x); x 13 arch/alpha/include/asm/cmpxchg.h #define xchg_local(ptr, x) \ x 15 arch/alpha/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 45 arch/alpha/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 48 arch/alpha/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 77 arch/alpha/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_ALPHA) x 548 arch/alpha/include/asm/io.h # define RTC_PORT(x) ((x) + alpha_mv.rtc_port) x 551 arch/alpha/include/asm/io.h # define RTC_PORT(x) (0x170+(x)) x 553 arch/alpha/include/asm/io.h # define RTC_PORT(x) (0x70 + (x)) x 5 arch/alpha/include/asm/linkage.h #define cond_syscall(x) asm(".weak\t" #x "\n" #x " = sys_ni_syscall") x 11 arch/alpha/include/asm/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 221 arch/alpha/include/asm/mmu_context.h # define activate_mm(x,y) alpha_mv.mv_activate_mm((x),(y)) x 225 arch/alpha/include/asm/mmu_context.h # define activate_mm(x,y) ev4_activate_mm((x),(y)) x 228 arch/alpha/include/asm/mmu_context.h # define activate_mm(x,y) ev5_activate_mm((x),(y)) x 90 arch/alpha/include/asm/mmzone.h #define pte_page(x) \ x 95 arch/alpha/include/asm/mmzone.h kvirt = (unsigned long)__va(pte_val(x) >> (32-PAGE_SHIFT)); \ x 36 arch/alpha/include/asm/page.h #define pte_val(x) ((x).pte) x 37 arch/alpha/include/asm/page.h #define pmd_val(x) ((x).pmd) x 38 arch/alpha/include/asm/page.h #define pgd_val(x) ((x).pgd) x 39 arch/alpha/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 41 arch/alpha/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 42 arch/alpha/include/asm/page.h #define __pmd(x) ((pmd_t) { (x) } ) x 43 arch/alpha/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 44 arch/alpha/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 55 arch/alpha/include/asm/page.h #define pte_val(x) (x) x 56 arch/alpha/include/asm/page.h #define pmd_val(x) (x) x 57 arch/alpha/include/asm/page.h #define pgd_val(x) (x) x 58 arch/alpha/include/asm/page.h #define pgprot_val(x) (x) x 60 arch/alpha/include/asm/page.h #define __pte(x) (x) x 61 arch/alpha/include/asm/page.h #define __pgd(x) (x) x 62 arch/alpha/include/asm/page.h #define __pgprot(x) (x) x 84 arch/alpha/include/asm/page.h #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) x 85 arch/alpha/include/asm/page.h #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) x 109 arch/alpha/include/asm/pal.h #define tbi(x,y) __tbi(x,__r17=(y),"1" (__r17)) x 110 arch/alpha/include/asm/pal.h #define tbisi(x) __tbi(1,__r17=(x),"1" (__r17)) x 111 arch/alpha/include/asm/pal.h #define tbisd(x) __tbi(2,__r17=(x),"1" (__r17)) x 112 arch/alpha/include/asm/pal.h #define tbis(x) __tbi(3,__r17=(x),"1" (__r17)) x 107 arch/alpha/include/asm/pgtable.h #define _PAGE_NORMAL(x) __pgprot(_PAGE_VALID | __ACCESS_BITS | (x)) x 109 arch/alpha/include/asm/pgtable.h #define _PAGE_P(x) _PAGE_NORMAL((x) | (((x) & _PAGE_FOW)?0:_PAGE_FOW)) x 110 arch/alpha/include/asm/pgtable.h #define _PAGE_S(x) _PAGE_NORMAL(x) x 341 arch/alpha/include/asm/pgtable.h #define __swp_type(x) (((x).val >> 32) & 0xff) x 342 arch/alpha/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> 40) x 345 arch/alpha/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 17 arch/alpha/include/asm/spinlock.h #define arch_spin_is_locked(x) ((x)->lock != 0) x 21 arch/alpha/include/asm/uaccess.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 58 arch/alpha/include/asm/uaccess.h #define put_user(x, ptr) \ x 59 arch/alpha/include/asm/uaccess.h __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 60 arch/alpha/include/asm/uaccess.h #define get_user(x, ptr) \ x 61 arch/alpha/include/asm/uaccess.h __get_user_check((x), (ptr), sizeof(*(ptr))) x 68 arch/alpha/include/asm/uaccess.h #define __put_user(x, ptr) \ x 69 arch/alpha/include/asm/uaccess.h __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 70 arch/alpha/include/asm/uaccess.h #define __get_user(x, ptr) \ x 71 arch/alpha/include/asm/uaccess.h __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 87 arch/alpha/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) \ x 99 arch/alpha/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr))) __gu_val; \ x 103 arch/alpha/include/asm/uaccess.h #define __get_user_check(x, ptr, size) \ x 118 arch/alpha/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr))) __gu_val; \ x 123 arch/alpha/include/asm/uaccess.h #define __m(x) (*(struct __large_struct __user *)(x)) x 185 arch/alpha/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) \ x 190 arch/alpha/include/asm/uaccess.h case 1: __put_user_8(x, ptr); break; \ x 191 arch/alpha/include/asm/uaccess.h case 2: __put_user_16(x, ptr); break; \ x 192 arch/alpha/include/asm/uaccess.h case 4: __put_user_32(x, ptr); break; \ x 193 arch/alpha/include/asm/uaccess.h case 8: __put_user_64(x, ptr); break; \ x 199 arch/alpha/include/asm/uaccess.h #define __put_user_check(x, ptr, size) \ x 206 arch/alpha/include/asm/uaccess.h case 1: __put_user_8(x, __pu_addr); break; \ x 207 arch/alpha/include/asm/uaccess.h case 2: __put_user_16(x, __pu_addr); break; \ x 208 arch/alpha/include/asm/uaccess.h case 4: __put_user_32(x, __pu_addr); break; \ x 209 arch/alpha/include/asm/uaccess.h case 8: __put_user_64(x, __pu_addr); break; \ x 221 arch/alpha/include/asm/uaccess.h #define __put_user_64(x, addr) \ x 226 arch/alpha/include/asm/uaccess.h : "m" (__m(addr)), "rJ" (x), "0"(__pu_err)) x 228 arch/alpha/include/asm/uaccess.h #define __put_user_32(x, addr) \ x 233 arch/alpha/include/asm/uaccess.h : "m"(__m(addr)), "rJ"(x), "0"(__pu_err)) x 238 arch/alpha/include/asm/uaccess.h #define __put_user_16(x, addr) \ x 243 arch/alpha/include/asm/uaccess.h : "m"(__m(addr)), "rJ"(x), "0"(__pu_err)) x 245 arch/alpha/include/asm/uaccess.h #define __put_user_8(x, addr) \ x 250 arch/alpha/include/asm/uaccess.h : "m"(__m(addr)), "rJ"(x), "0"(__pu_err)) x 255 arch/alpha/include/asm/uaccess.h #define __put_user_16(x, addr) \ x 277 arch/alpha/include/asm/uaccess.h : "r"(addr), "r"((unsigned long)(x)), "0"(__pu_err)); \ x 280 arch/alpha/include/asm/uaccess.h #define __put_user_8(x, addr) \ x 294 arch/alpha/include/asm/uaccess.h : "r"((unsigned long)(x)), "r"(addr), "0"(__pu_err)); \ x 81 arch/alpha/include/asm/vga.h #define VGA_MAP_MEM(x,s) ((unsigned long) ioremap(x, s)) x 106 arch/alpha/include/asm/xchg.h ____xchg(, volatile void *ptr, unsigned long x, int size) x 110 arch/alpha/include/asm/xchg.h return ____xchg(_u8, ptr, x); x 112 arch/alpha/include/asm/xchg.h return ____xchg(_u16, ptr, x); x 114 arch/alpha/include/asm/xchg.h return ____xchg(_u32, ptr, x); x 116 arch/alpha/include/asm/xchg.h return ____xchg(_u64, ptr, x); x 119 arch/alpha/include/asm/xchg.h return x; x 77 arch/alpha/include/uapi/asm/a.out.h #define N_TXTADDR(x) ((x).a_textstart) x 78 arch/alpha/include/uapi/asm/a.out.h #define N_DATADDR(x) ((x).a_datastart) x 79 arch/alpha/include/uapi/asm/a.out.h #define N_BSSADDR(x) ((x).a_bssstart) x 80 arch/alpha/include/uapi/asm/a.out.h #define N_DRSIZE(x) 0 x 81 arch/alpha/include/uapi/asm/a.out.h #define N_TRSIZE(x) 0 x 82 arch/alpha/include/uapi/asm/a.out.h #define N_SYMSIZE(x) 0 x 88 arch/alpha/include/uapi/asm/a.out.h #define N_TXTOFF(x) \ x 89 arch/alpha/include/uapi/asm/a.out.h ((long) N_MAGIC(x) == ZMAGIC ? 0 : \ x 90 arch/alpha/include/uapi/asm/a.out.h (sizeof(struct exec) + (x).fh.f_nscns*SCNHSZ + SCNROUND - 1) & ~(SCNROUND - 1)) x 54 arch/alpha/include/uapi/asm/compiler.h # define __kernel_cttz(x) __builtin_ctzl(x) x 55 arch/alpha/include/uapi/asm/compiler.h # define __kernel_ctlz(x) __builtin_clzl(x) x 56 arch/alpha/include/uapi/asm/compiler.h # define __kernel_ctpop(x) __builtin_popcountl(x) x 58 arch/alpha/include/uapi/asm/compiler.h # define __kernel_cttz(x) \ x 60 arch/alpha/include/uapi/asm/compiler.h __asm__("cttz %1,%0" : "=r"(__kir) : "r"(x)); \ x 62 arch/alpha/include/uapi/asm/compiler.h # define __kernel_ctlz(x) \ x 64 arch/alpha/include/uapi/asm/compiler.h __asm__("ctlz %1,%0" : "=r"(__kir) : "r"(x)); \ x 66 arch/alpha/include/uapi/asm/compiler.h # define __kernel_ctpop(x) \ x 68 arch/alpha/include/uapi/asm/compiler.h __asm__("ctpop %1,%0" : "=r"(__kir) : "r"(x)); \ x 72 arch/alpha/include/uapi/asm/compiler.h # define __kernel_cttz(x) \ x 74 arch/alpha/include/uapi/asm/compiler.h __asm__(".arch ev67; cttz %1,%0" : "=r"(__kir) : "r"(x)); \ x 76 arch/alpha/include/uapi/asm/compiler.h # define __kernel_ctlz(x) \ x 78 arch/alpha/include/uapi/asm/compiler.h __asm__(".arch ev67; ctlz %1,%0" : "=r"(__kir) : "r"(x)); \ x 80 arch/alpha/include/uapi/asm/compiler.h # define __kernel_ctpop(x) \ x 82 arch/alpha/include/uapi/asm/compiler.h __asm__(".arch ev67; ctpop %1,%0" : "=r"(__kir) : "r"(x)); \ x 11 arch/alpha/include/uapi/asm/swab.h static inline __attribute_const__ __u32 __arch_swab32(__u32 x) x 29 arch/alpha/include/uapi/asm/swab.h t0 = __kernel_inslh(x, 7); /* t0 : 0000000000AABBCC */ x 30 arch/alpha/include/uapi/asm/swab.h t1 = __kernel_inswl(x, 3); /* t1 : 000000CCDD000000 */ x 912 arch/alpha/kernel/err_marvel.c #define MARVEL_IO_ERR_VALID(x) ((x) & (1UL << 63)) x 301 arch/alpha/kernel/io.c struct S { int x __attribute__((packed)); }; x 302 arch/alpha/kernel/io.c ((struct S *)dst)->x = ioread32(port); x 395 arch/alpha/kernel/io.c struct S { int x __attribute__((packed)); }; x 396 arch/alpha/kernel/io.c iowrite32(((struct S *)src)->x, port); x 44 arch/alpha/kernel/machvec_impl.h #define CAT1(x,y) x##y x 45 arch/alpha/kernel/machvec_impl.h #define CAT(x,y) CAT1(x,y) x 139 arch/alpha/kernel/machvec_impl.h #define ALIAS_MV(x) x 156 arch/alpha/kernel/rtc.c union remote_data *x = data; x 157 arch/alpha/kernel/rtc.c x->retval = alpha_rtc_read_time(NULL, x->tm); x 163 arch/alpha/kernel/rtc.c union remote_data x; x 165 arch/alpha/kernel/rtc.c x.tm = tm; x 166 arch/alpha/kernel/rtc.c smp_call_function_single(boot_cpuid, do_remote_read, &x, 1); x 167 arch/alpha/kernel/rtc.c return x.retval; x 175 arch/alpha/kernel/rtc.c union remote_data *x = data; x 176 arch/alpha/kernel/rtc.c x->retval = alpha_rtc_set_time(NULL, x->tm); x 182 arch/alpha/kernel/rtc.c union remote_data x; x 184 arch/alpha/kernel/rtc.c x.tm = tm; x 185 arch/alpha/kernel/rtc.c smp_call_function_single(boot_cpuid, do_remote_set, &x, 1); x 186 arch/alpha/kernel/rtc.c return x.retval; x 638 arch/alpha/kernel/smp.c ipi_flush_tlb_mm(void *x) x 640 arch/alpha/kernel/smp.c struct mm_struct *mm = (struct mm_struct *) x; x 680 arch/alpha/kernel/smp.c ipi_flush_tlb_page(void *x) x 682 arch/alpha/kernel/smp.c struct flush_tlb_page_struct *data = (struct flush_tlb_page_struct *)x; x 733 arch/alpha/kernel/smp.c ipi_flush_icache_page(void *x) x 735 arch/alpha/kernel/smp.c struct mm_struct *mm = (struct mm_struct *) x; x 206 arch/alpha/kernel/time.c unsigned char x, sel = 0; x 210 arch/alpha/kernel/time.c x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f; x 213 arch/alpha/kernel/time.c if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) { x 228 arch/alpha/kernel/time.c x = CMOS_READ(RTC_CONTROL); x 229 arch/alpha/kernel/time.c if (!(x & RTC_PIE)) { x 231 arch/alpha/kernel/time.c x |= RTC_PIE; x 232 arch/alpha/kernel/time.c x &= ~(RTC_AIE | RTC_UIE); x 233 arch/alpha/kernel/time.c CMOS_WRITE(x, RTC_CONTROL); x 707 arch/alpha/kernel/traps.c #define R(x) ((size_t) &((struct pt_regs *)0)->x) x 18 arch/alpha/lib/checksum.c static inline unsigned short from64to16(unsigned long x) x 29 arch/alpha/lib/checksum.c in_v.ul = x; x 18 arch/alpha/lib/csum_partial_copy.c #define ldq_u(x,y) \ x 19 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("ldq_u %0,%1":"=r" (x):"m" (*(const unsigned long *)(y))) x 21 arch/alpha/lib/csum_partial_copy.c #define stq_u(x,y) \ x 22 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("stq_u %1,%0":"=m" (*(unsigned long *)(y)):"r" (x)) x 24 arch/alpha/lib/csum_partial_copy.c #define extql(x,y,z) \ x 25 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("extql %1,%2,%0":"=r" (z):"r" (x),"r" (y)) x 27 arch/alpha/lib/csum_partial_copy.c #define extqh(x,y,z) \ x 28 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("extqh %1,%2,%0":"=r" (z):"r" (x),"r" (y)) x 30 arch/alpha/lib/csum_partial_copy.c #define mskql(x,y,z) \ x 31 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("mskql %1,%2,%0":"=r" (z):"r" (x),"r" (y)) x 33 arch/alpha/lib/csum_partial_copy.c #define mskqh(x,y,z) \ x 34 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("mskqh %1,%2,%0":"=r" (z):"r" (x),"r" (y)) x 36 arch/alpha/lib/csum_partial_copy.c #define insql(x,y,z) \ x 37 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("insql %1,%2,%0":"=r" (z):"r" (x),"r" (y)) x 39 arch/alpha/lib/csum_partial_copy.c #define insqh(x,y,z) \ x 40 arch/alpha/lib/csum_partial_copy.c __asm__ __volatile__("insqh %1,%2,%0":"=r" (z):"r" (x),"r" (y)) x 43 arch/alpha/lib/csum_partial_copy.c #define __get_user_u(x,ptr) \ x 50 arch/alpha/lib/csum_partial_copy.c : "=r"(x), "=r"(__guu_err) \ x 55 arch/alpha/lib/csum_partial_copy.c #define __put_user_u(x,ptr) \ x 63 arch/alpha/lib/csum_partial_copy.c : "m"(__m(addr)), "rJ"(x), "0"(0)); \ x 68 arch/alpha/lib/csum_partial_copy.c static inline unsigned short from64to16(unsigned long x) x 79 arch/alpha/lib/csum_partial_copy.c in_v.ul = x; x 84 arch/alpha/oprofile/op_model_ev4.c ev4_cpu_setup(void *x) x 86 arch/alpha/oprofile/op_model_ev4.c struct op_register_config *reg = x; x 134 arch/alpha/oprofile/op_model_ev5.c ev5_cpu_setup (void *x) x 136 arch/alpha/oprofile/op_model_ev5.c struct op_register_config *reg = x; x 65 arch/alpha/oprofile/op_model_ev6.c ev6_cpu_setup (void *x) x 67 arch/alpha/oprofile/op_model_ev6.c struct op_register_config *reg = x; x 70 arch/alpha/oprofile/op_model_ev67.c ev67_cpu_setup (void *x) x 72 arch/alpha/oprofile/op_model_ev67.c struct op_register_config *reg = x; x 263 arch/arc/include/asm/bitops.h static inline __attribute__ ((const)) int clz(unsigned int x) x 272 arch/arc/include/asm/bitops.h : "r"(x) x 278 arch/arc/include/asm/bitops.h static inline int constant_fls(unsigned int x) x 282 arch/arc/include/asm/bitops.h if (!x) x 284 arch/arc/include/asm/bitops.h if (!(x & 0xffff0000u)) { x 285 arch/arc/include/asm/bitops.h x <<= 16; x 288 arch/arc/include/asm/bitops.h if (!(x & 0xff000000u)) { x 289 arch/arc/include/asm/bitops.h x <<= 8; x 292 arch/arc/include/asm/bitops.h if (!(x & 0xf0000000u)) { x 293 arch/arc/include/asm/bitops.h x <<= 4; x 296 arch/arc/include/asm/bitops.h if (!(x & 0xc0000000u)) { x 297 arch/arc/include/asm/bitops.h x <<= 2; x 300 arch/arc/include/asm/bitops.h if (!(x & 0x80000000u)) { x 301 arch/arc/include/asm/bitops.h x <<= 1; x 312 arch/arc/include/asm/bitops.h static inline __attribute__ ((const)) int fls(unsigned int x) x 314 arch/arc/include/asm/bitops.h if (__builtin_constant_p(x)) x 315 arch/arc/include/asm/bitops.h return constant_fls(x); x 317 arch/arc/include/asm/bitops.h return 32 - clz(x); x 323 arch/arc/include/asm/bitops.h static inline __attribute__ ((const)) int __fls(unsigned long x) x 325 arch/arc/include/asm/bitops.h if (!x) x 328 arch/arc/include/asm/bitops.h return fls(x) - 1; x 335 arch/arc/include/asm/bitops.h #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) x 355 arch/arc/include/asm/bitops.h static inline __attribute__ ((const)) int fls(unsigned long x) x 363 arch/arc/include/asm/bitops.h : "r"(x) x 372 arch/arc/include/asm/bitops.h static inline __attribute__ ((const)) int __fls(unsigned long x) x 375 arch/arc/include/asm/bitops.h return __builtin_arc_fls(x); x 382 arch/arc/include/asm/bitops.h static inline __attribute__ ((const)) int ffs(unsigned long x) x 391 arch/arc/include/asm/bitops.h : "r"(x) x 400 arch/arc/include/asm/bitops.h static inline __attribute__ ((const)) unsigned long __ffs(unsigned long x) x 408 arch/arc/include/asm/bitops.h : "r"(x) x 421 arch/arc/include/asm/bitops.h #define ffz(x) __ffs(~(x)) x 86 arch/arc/include/asm/disasm.h int zz, aa, x, pref, di; x 113 arch/arc/include/asm/io.h u##t x = __raw_read##f(addr); \ x 114 arch/arc/include/asm/io.h *buf++ = x; \ x 118 arch/arc/include/asm/io.h u##t x = __raw_read##f(addr); \ x 119 arch/arc/include/asm/io.h put_unaligned(x, buf++); \ x 44 arch/arc/include/asm/page.h #define pte_val(x) ((x).pte) x 45 arch/arc/include/asm/page.h #define pgd_val(x) ((x).pgd) x 46 arch/arc/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 48 arch/arc/include/asm/page.h #define __pte(x) ((pte_t) { (x) }) x 49 arch/arc/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) }) x 50 arch/arc/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) }) x 52 arch/arc/include/asm/page.h #define pte_pgprot(x) __pgprot(pte_val(x)) x 64 arch/arc/include/asm/page.h #define pte_val(x) (x) x 65 arch/arc/include/asm/page.h #define pgd_val(x) (x) x 66 arch/arc/include/asm/page.h #define pgprot_val(x) (x) x 67 arch/arc/include/asm/page.h #define __pte(x) (x) x 68 arch/arc/include/asm/page.h #define __pgd(x) (x) x 69 arch/arc/include/asm/page.h #define __pgprot(x) (x) x 70 arch/arc/include/asm/page.h #define pte_pgprot(x) (x) x 270 arch/arc/include/asm/pgtable.h #define pte_none(x) (!pte_val(x)) x 271 arch/arc/include/asm/pgtable.h #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) x 274 arch/arc/include/asm/pgtable.h #define pmd_none(x) (!pmd_val(x)) x 275 arch/arc/include/asm/pgtable.h #define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK)) x 276 arch/arc/include/asm/pgtable.h #define pmd_present(x) (pmd_val(x)) x 381 arch/arc/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 13 arch/arc/include/asm/spinlock.h #define arch_spin_is_locked(x) ((x)->slock != __ARCH_SPIN_LOCK_UNLOCKED__) x 25 arch/arc/include/uapi/asm/swab.h #define __arch_swab32(x) \ x 27 arch/arc/include/uapi/asm/swab.h unsigned int tmp = x; \ x 69 arch/arc/include/uapi/asm/swab.h #define __arch_swab32(x) \ x 70 arch/arc/include/uapi/asm/swab.h ({ unsigned long __in = (x), __tmp; \ x 80 arch/arc/include/uapi/asm/swab.h #define __arch_swab32(x) \ x 82 arch/arc/include/uapi/asm/swab.h unsigned int tmp = x; \ x 106 arch/arc/kernel/disasm.c state->x = BITS(state->words[0], 6, 6); x 213 arch/arc/kernel/disasm.c state->x = BITS(state->words[0], 16, 16); x 341 arch/arc/kernel/disasm.c state->x = 1; x 300 arch/arc/kernel/process.c int elf_check_arch(const struct elf32_hdr *x) x 304 arch/arc/kernel/process.c if (x->e_machine != EM_ARC_INUSE) { x 310 arch/arc/kernel/process.c eflags = x->e_flags; x 31 arch/arc/kernel/setup.c #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) x 150 arch/arc/kernel/unaligned.c if (state->x) x 17 arch/arm/boot/compressed/decompress.c # define Trace(x) fprintf x x 18 arch/arm/boot/compressed/decompress.c # define Tracev(x) {if (verbose) fprintf x ;} x 19 arch/arm/boot/compressed/decompress.c # define Tracevv(x) {if (verbose>1) fprintf x ;} x 20 arch/arm/boot/compressed/decompress.c # define Tracec(c,x) {if (verbose && (c)) fprintf x ;} x 21 arch/arm/boot/compressed/decompress.c # define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} x 24 arch/arm/boot/compressed/decompress.c # define Trace(x) x 25 arch/arm/boot/compressed/decompress.c # define Tracev(x) x 26 arch/arm/boot/compressed/decompress.c # define Tracevv(x) x 27 arch/arm/boot/compressed/decompress.c # define Tracec(c,x) x 28 arch/arm/boot/compressed/decompress.c # define Tracecv(c,x) x 59 arch/arm/boot/compressed/decompress.c int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x)) x 17 arch/arm/boot/compressed/libfdt_env.h #define fdt16_to_cpu(x) be16_to_cpu(x) x 18 arch/arm/boot/compressed/libfdt_env.h #define cpu_to_fdt16(x) cpu_to_be16(x) x 19 arch/arm/boot/compressed/libfdt_env.h #define fdt32_to_cpu(x) be32_to_cpu(x) x 20 arch/arm/boot/compressed/libfdt_env.h #define cpu_to_fdt32(x) cpu_to_be32(x) x 21 arch/arm/boot/compressed/libfdt_env.h #define fdt64_to_cpu(x) be64_to_cpu(x) x 22 arch/arm/boot/compressed/libfdt_env.h #define cpu_to_fdt64(x) cpu_to_be64(x) x 112 arch/arm/boot/compressed/misc.c #define arch_error(x) x 115 arch/arm/boot/compressed/misc.c void error(char *x) x 117 arch/arm/boot/compressed/misc.c arch_error(x); x 120 arch/arm/boot/compressed/misc.c putstr(x); x 138 arch/arm/boot/compressed/misc.c extern int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x)); x 6 arch/arm/boot/compressed/misc.h void error(char *x) __noreturn; x 25 arch/arm/common/sharpsl_param.c #define param_start(x) (void *)(x) x 28 arch/arm/common/sharpsl_param.c #define param_start(x) __va(x) x 28 arch/arm/include/asm/arch_gicv3.h #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) x 34 arch/arm/include/asm/arch_gicv3.h #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) x 50 arch/arm/include/asm/arch_gicv3.h #define __LR0(x) __ACCESS_CP15(c12, 4, c12, x) x 51 arch/arm/include/asm/arch_gicv3.h #define __LR8(x) __ACCESS_CP15(c12, 4, c13, x) x 71 arch/arm/include/asm/arch_gicv3.h #define __LRC0(x) __ACCESS_CP15(c12, 4, c14, x) x 72 arch/arm/include/asm/arch_gicv3.h #define __LRC8(x) __ACCESS_CP15(c12, 4, c15, x) x 91 arch/arm/include/asm/arch_gicv3.h #define __ICH_AP0Rx(x) __ACCESS_CP15(c12, 4, c8, x) x 97 arch/arm/include/asm/arch_gicv3.h #define __ICH_AP1Rx(x) __ACCESS_CP15(c12, 4, c9, x) x 27 arch/arm/include/asm/assembler.h #define IOMEM(x) (x) x 243 arch/arm/include/asm/assembler.h #define USERL(l, x...) \ x 244 arch/arm/include/asm/assembler.h 9999: x; \ x 250 arch/arm/include/asm/assembler.h #define USER(x...) USERL(9001f, x) x 29 arch/arm/include/asm/barrier.h #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ x 31 arch/arm/include/asm/barrier.h #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ x 33 arch/arm/include/asm/barrier.h #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ x 36 arch/arm/include/asm/barrier.h #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ x 38 arch/arm/include/asm/barrier.h #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ x 40 arch/arm/include/asm/barrier.h #define dmb(x) __asm__ __volatile__ ("" : : : "memory") x 42 arch/arm/include/asm/barrier.h #define isb(x) __asm__ __volatile__ ("" : : : "memory") x 43 arch/arm/include/asm/barrier.h #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ x 45 arch/arm/include/asm/barrier.h #define dmb(x) __asm__ __volatile__ ("" : : : "memory") x 58 arch/arm/include/asm/barrier.h #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0) x 60 arch/arm/include/asm/barrier.h #define __arm_heavy_mb(x...) dsb(x) x 5 arch/arm/include/asm/bitrev.h static __always_inline __attribute_const__ u32 __arch_bitrev32(u32 x) x 7 arch/arm/include/asm/bitrev.h __asm__ ("rbit %0, %1" : "=r" (x) : "r" (x)); x 8 arch/arm/include/asm/bitrev.h return x; x 11 arch/arm/include/asm/bitrev.h static __always_inline __attribute_const__ u16 __arch_bitrev16(u16 x) x 13 arch/arm/include/asm/bitrev.h return __arch_bitrev32((u32)x) >> 16; x 16 arch/arm/include/asm/bitrev.h static __always_inline __attribute_const__ u8 __arch_bitrev8(u8 x) x 18 arch/arm/include/asm/bitrev.h return __arch_bitrev32((u32)x) >> 24; x 28 arch/arm/include/asm/cmpxchg.h static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) x 51 arch/arm/include/asm/cmpxchg.h : "r" (x), "r" (ptr) x 61 arch/arm/include/asm/cmpxchg.h : "r" (x), "r" (ptr) x 72 arch/arm/include/asm/cmpxchg.h : "r" (x), "r" (ptr) x 82 arch/arm/include/asm/cmpxchg.h *(volatile unsigned char *)ptr = x; x 89 arch/arm/include/asm/cmpxchg.h *(volatile unsigned long *)ptr = x; x 97 arch/arm/include/asm/cmpxchg.h : "r" (x), "r" (ptr) x 104 arch/arm/include/asm/cmpxchg.h : "r" (x), "r" (ptr) x 117 arch/arm/include/asm/cmpxchg.h #define xchg_relaxed(ptr, x) ({ \ x 118 arch/arm/include/asm/cmpxchg.h (__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), \ x 15 arch/arm/include/asm/compiler.h #define __asmeq(x, y) \ x 16 arch/arm/include/asm/compiler.h ".ifnc " x "," y "; " \ x 17 arch/arm/include/asm/compiler.h ".ifnc " x y ",fpr11; " \ x 18 arch/arm/include/asm/compiler.h ".ifnc " x y ",r11fp; " \ x 19 arch/arm/include/asm/compiler.h ".ifnc " x y ",ipr12; " \ x 20 arch/arm/include/asm/compiler.h ".ifnc " x y ",r12ip; " \ x 26 arch/arm/include/asm/cpufeature.h #define __hwcap_feature(x) ilog2(HWCAP_ ## x) x 27 arch/arm/include/asm/cpufeature.h #define __hwcap2_feature(x) (32 + ilog2(HWCAP2_ ## x)) x 28 arch/arm/include/asm/cpufeature.h #define cpu_feature(x) __hwcap2_feature(x) x 9 arch/arm/include/asm/dmi.h #define dmi_early_remap(x, l) memremap(x, l, MEMREMAP_WB) x 10 arch/arm/include/asm/dmi.h #define dmi_early_unmap(x, l) memunmap(x) x 11 arch/arm/include/asm/dmi.h #define dmi_remap(x, l) memremap(x, l, MEMREMAP_WB) x 12 arch/arm/include/asm/dmi.h #define dmi_unmap(x) memunmap(x) x 105 arch/arm/include/asm/elf.h #define elf_check_fdpic(x) ((x)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC) x 106 arch/arm/include/asm/elf.h #define elf_check_const_displacement(x) ((x)->e_flags & EF_ARM_PIC) x 109 arch/arm/include/asm/elf.h #define vmcore_elf64_check_arch(x) (0) x 20 arch/arm/include/asm/hardware/dec21285.h #define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x))) x 22 arch/arm/include/asm/hardware/dec21285.h #define DC21285_IO(x) (x) x 78 arch/arm/include/asm/hardware/dec21285.h #define SA110_CNTL_ROMACCESSTIME(x) ((x)<<16) x 79 arch/arm/include/asm/hardware/dec21285.h #define SA110_CNTL_ROMBURSTTIME(x) ((x)<<20) x 80 arch/arm/include/asm/hardware/dec21285.h #define SA110_CNTL_ROMTRISTATETIME(x) ((x)<<24) x 81 arch/arm/include/asm/hardware/dec21285.h #define SA110_CNTL_XCSDIR(x) ((x)<<28) x 21 arch/arm/include/asm/hardware/it8152.h #define __REG_IT8152(x) (it8152_base_address + (x)) x 82 arch/arm/include/asm/hardware/it8152.h #define IT8152_IRQ(x) (IRQ_BOARD_START + (x)) x 397 arch/arm/include/asm/hardware/sa1111.h #define to_sa1111_device(x) container_of(x, struct sa1111_dev, dev) x 81 arch/arm/include/asm/hw_breakpoint.h #define ARM_DSCR_MOE(x) ((x >> 2) & 0xf) x 160 arch/arm/include/asm/io.h #define IOMEM(x) ((void __force __iomem *)(x)) x 97 arch/arm/include/asm/kvm_arm.h #define HSTR_T(x) (1 << x) x 102 arch/arm/include/asm/kvm_arm.h #define HCPTR_TCP(x) (1 << x) x 228 arch/arm/include/asm/kvm_arm.h #define HSRECN(x) { HSR_EC_##x, #x } x 13 arch/arm/include/asm/kvm_asm.h #define ARM_EXCEPTION_CODE(x) ((x) & ~(1U << ARM_EXIT_WITH_ABORT_BIT)) x 14 arch/arm/include/asm/kvm_asm.h #define ARM_EXCEPTION_IS_TRAP(x) \ x 15 arch/arm/include/asm/kvm_asm.h (ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_PREF_ABORT || \ x 16 arch/arm/include/asm/kvm_asm.h ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_DATA_ABORT || \ x 17 arch/arm/include/asm/kvm_asm.h ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_HVC) x 18 arch/arm/include/asm/kvm_asm.h #define ARM_ABORT_PENDING(x) !!((x) & (1U << ARM_EXIT_WITH_ABORT_BIT)) x 331 arch/arm/include/asm/kvm_mmu.h #define kvm_virt_to_phys(x) virt_to_idmap((unsigned long)(x)) x 14 arch/arm/include/asm/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 204 arch/arm/include/asm/memory.h #define __pv_add_carry_stub(x, y) \ x 212 arch/arm/include/asm/memory.h : "r" (x), "I" (__PV_BITS_31_24) \ x 215 arch/arm/include/asm/memory.h static inline phys_addr_t __virt_to_phys_nodebug(unsigned long x) x 220 arch/arm/include/asm/memory.h __pv_stub(x, t, "add", __PV_BITS_31_24); x 223 arch/arm/include/asm/memory.h __pv_add_carry_stub(x, t); x 228 arch/arm/include/asm/memory.h static inline unsigned long __phys_to_virt(phys_addr_t x) x 238 arch/arm/include/asm/memory.h __pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24); x 247 arch/arm/include/asm/memory.h static inline phys_addr_t __virt_to_phys_nodebug(unsigned long x) x 249 arch/arm/include/asm/memory.h return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET; x 252 arch/arm/include/asm/memory.h static inline unsigned long __phys_to_virt(phys_addr_t x) x 254 arch/arm/include/asm/memory.h return x - PHYS_OFFSET + PAGE_OFFSET; x 263 arch/arm/include/asm/memory.h #define __pa_symbol_nodebug(x) __virt_to_phys_nodebug((x)) x 266 arch/arm/include/asm/memory.h extern phys_addr_t __virt_to_phys(unsigned long x); x 267 arch/arm/include/asm/memory.h extern phys_addr_t __phys_addr_symbol(unsigned long x); x 269 arch/arm/include/asm/memory.h #define __virt_to_phys(x) __virt_to_phys_nodebug(x) x 270 arch/arm/include/asm/memory.h #define __phys_addr_symbol(x) __pa_symbol_nodebug(x) x 280 arch/arm/include/asm/memory.h static inline phys_addr_t virt_to_phys(const volatile void *x) x 282 arch/arm/include/asm/memory.h return __virt_to_phys((unsigned long)(x)); x 286 arch/arm/include/asm/memory.h static inline void *phys_to_virt(phys_addr_t x) x 288 arch/arm/include/asm/memory.h return (void *)__phys_to_virt(x); x 294 arch/arm/include/asm/memory.h #define __pa(x) __virt_to_phys((unsigned long)(x)) x 295 arch/arm/include/asm/memory.h #define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0)) x 296 arch/arm/include/asm/memory.h #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x))) x 333 arch/arm/include/asm/memory.h static inline unsigned long __virt_to_idmap(unsigned long x) x 335 arch/arm/include/asm/memory.h return phys_to_idmap(__virt_to_phys(x)); x 338 arch/arm/include/asm/memory.h #define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x)) x 349 arch/arm/include/asm/memory.h #define __pfn_to_bus(x) __pfn_to_phys(x) x 350 arch/arm/include/asm/memory.h #define __bus_to_pfn(x) __phys_to_pfn(x) x 24 arch/arm/include/asm/opcodes.h #define ___asm_opcode_swab32(x) ( \ x 25 arch/arm/include/asm/opcodes.h (((x) << 24) & 0xFF000000) \ x 26 arch/arm/include/asm/opcodes.h | (((x) << 8) & 0x00FF0000) \ x 27 arch/arm/include/asm/opcodes.h | (((x) >> 8) & 0x0000FF00) \ x 28 arch/arm/include/asm/opcodes.h | (((x) >> 24) & 0x000000FF) \ x 30 arch/arm/include/asm/opcodes.h #define ___asm_opcode_swab16(x) ( \ x 31 arch/arm/include/asm/opcodes.h (((x) << 8) & 0xFF00) \ x 32 arch/arm/include/asm/opcodes.h | (((x) >> 8) & 0x00FF) \ x 34 arch/arm/include/asm/opcodes.h #define ___asm_opcode_swahb32(x) ( \ x 35 arch/arm/include/asm/opcodes.h (((x) << 8) & 0xFF00FF00) \ x 36 arch/arm/include/asm/opcodes.h | (((x) >> 8) & 0x00FF00FF) \ x 38 arch/arm/include/asm/opcodes.h #define ___asm_opcode_swahw32(x) ( \ x 39 arch/arm/include/asm/opcodes.h (((x) << 16) & 0xFFFF0000) \ x 40 arch/arm/include/asm/opcodes.h | (((x) >> 16) & 0x0000FFFF) \ x 42 arch/arm/include/asm/opcodes.h #define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF) x 43 arch/arm/include/asm/opcodes.h #define ___asm_opcode_identity16(x) ((x) & 0xFFFF) x 76 arch/arm/include/asm/opcodes.h #define ___opcode_swab32(x) ___asm_opcode_swab32(x) x 77 arch/arm/include/asm/opcodes.h #define ___opcode_swab16(x) ___asm_opcode_swab16(x) x 78 arch/arm/include/asm/opcodes.h #define ___opcode_swahb32(x) ___asm_opcode_swahb32(x) x 79 arch/arm/include/asm/opcodes.h #define ___opcode_swahw32(x) ___asm_opcode_swahw32(x) x 80 arch/arm/include/asm/opcodes.h #define ___opcode_identity32(x) ___asm_opcode_identity32(x) x 81 arch/arm/include/asm/opcodes.h #define ___opcode_identity16(x) ___asm_opcode_identity16(x) x 88 arch/arm/include/asm/opcodes.h #define ___opcode_swab32(x) swab32(x) x 89 arch/arm/include/asm/opcodes.h #define ___opcode_swab16(x) swab16(x) x 90 arch/arm/include/asm/opcodes.h #define ___opcode_swahb32(x) swahb32(x) x 91 arch/arm/include/asm/opcodes.h #define ___opcode_swahw32(x) swahw32(x) x 92 arch/arm/include/asm/opcodes.h #define ___opcode_identity32(x) ((u32)(x)) x 93 arch/arm/include/asm/opcodes.h #define ___opcode_identity16(x) ((u16)(x)) x 100 arch/arm/include/asm/opcodes.h #define __opcode_to_mem_arm(x) ___opcode_swab32(x) x 101 arch/arm/include/asm/opcodes.h #define __opcode_to_mem_thumb16(x) ___opcode_swab16(x) x 102 arch/arm/include/asm/opcodes.h #define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x) x 103 arch/arm/include/asm/opcodes.h #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x) x 104 arch/arm/include/asm/opcodes.h #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x) x 105 arch/arm/include/asm/opcodes.h #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x) x 109 arch/arm/include/asm/opcodes.h #define __opcode_to_mem_arm(x) ___opcode_identity32(x) x 110 arch/arm/include/asm/opcodes.h #define __opcode_to_mem_thumb16(x) ___opcode_identity16(x) x 111 arch/arm/include/asm/opcodes.h #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x) x 112 arch/arm/include/asm/opcodes.h #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x) x 119 arch/arm/include/asm/opcodes.h #define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x) x 120 arch/arm/include/asm/opcodes.h #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x) x 125 arch/arm/include/asm/opcodes.h #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x) x 126 arch/arm/include/asm/opcodes.h #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x) x 128 arch/arm/include/asm/opcodes.h #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x) x 134 arch/arm/include/asm/opcodes.h #define __opcode_is_thumb32(x) ( \ x 135 arch/arm/include/asm/opcodes.h ((x) & 0xF8000000) == 0xE8000000 \ x 136 arch/arm/include/asm/opcodes.h || ((x) & 0xF0000000) == 0xF0000000 \ x 138 arch/arm/include/asm/opcodes.h #define __opcode_is_thumb16(x) ( \ x 139 arch/arm/include/asm/opcodes.h ((x) & 0xFFFF0000) == 0 \ x 140 arch/arm/include/asm/opcodes.h && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \ x 144 arch/arm/include/asm/opcodes.h #define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16)) x 145 arch/arm/include/asm/opcodes.h #define __opcode_thumb32_second(x) (___opcode_identity16(x)) x 150 arch/arm/include/asm/opcodes.h #define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16)) x 151 arch/arm/include/asm/opcodes.h #define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x)) x 199 arch/arm/include/asm/opcodes.h #define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x)) x 200 arch/arm/include/asm/opcodes.h #define __inst_thumb32(x) ___inst_thumb32( \ x 201 arch/arm/include/asm/opcodes.h ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \ x 202 arch/arm/include/asm/opcodes.h ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \ x 204 arch/arm/include/asm/opcodes.h #define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x)) x 218 arch/arm/include/asm/opcodes.h #define ___inst_arm(x) .long x x 219 arch/arm/include/asm/opcodes.h #define ___inst_thumb16(x) .short x x 222 arch/arm/include/asm/opcodes.h #define ___inst_arm(x) ".long " __stringify(x) "\n\t" x 223 arch/arm/include/asm/opcodes.h #define ___inst_thumb16(x) ".short " __stringify(x) "\n\t" x 25 arch/arm/include/asm/page-nommu.h #define pte_val(x) (x) x 26 arch/arm/include/asm/page-nommu.h #define pmd_val(x) (x) x 27 arch/arm/include/asm/page-nommu.h #define pgd_val(x) ((x)[0]) x 28 arch/arm/include/asm/page-nommu.h #define pgprot_val(x) (x) x 30 arch/arm/include/asm/page-nommu.h #define __pte(x) (x) x 31 arch/arm/include/asm/page-nommu.h #define __pmd(x) (x) x 32 arch/arm/include/asm/page-nommu.h #define __pgprot(x) (x) x 35 arch/arm/include/asm/percpu.h #define set_my_cpu_offset(x) do {} while(0) x 22 arch/arm/include/asm/pgtable-2level-hwdef.h #define PMD_DOMAIN(x) (_AT(pmdval_t, (x)) << 5) x 34 arch/arm/include/asm/pgtable-2level-hwdef.h #define PMD_SECT_TEX(x) (_AT(pmdval_t, (x)) << 12) /* v5 */ x 77 arch/arm/include/asm/pgtable-2level-hwdef.h #define PTE_EXT_TEX(x) (_AT(pteval_t, (x)) << 6) /* v5 */ x 26 arch/arm/include/asm/pgtable-2level-types.h #define pte_val(x) ((x).pte) x 27 arch/arm/include/asm/pgtable-2level-types.h #define pmd_val(x) ((x).pmd) x 28 arch/arm/include/asm/pgtable-2level-types.h #define pgd_val(x) ((x).pgd[0]) x 29 arch/arm/include/asm/pgtable-2level-types.h #define pgprot_val(x) ((x).pgprot) x 31 arch/arm/include/asm/pgtable-2level-types.h #define __pte(x) ((pte_t) { (x) } ) x 32 arch/arm/include/asm/pgtable-2level-types.h #define __pmd(x) ((pmd_t) { (x) } ) x 33 arch/arm/include/asm/pgtable-2level-types.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 44 arch/arm/include/asm/pgtable-2level-types.h #define pte_val(x) (x) x 45 arch/arm/include/asm/pgtable-2level-types.h #define pmd_val(x) (x) x 46 arch/arm/include/asm/pgtable-2level-types.h #define pgd_val(x) ((x)[0]) x 47 arch/arm/include/asm/pgtable-2level-types.h #define pgprot_val(x) (x) x 49 arch/arm/include/asm/pgtable-2level-types.h #define __pte(x) (x) x 50 arch/arm/include/asm/pgtable-2level-types.h #define __pmd(x) (x) x 51 arch/arm/include/asm/pgtable-2level-types.h #define __pgprot(x) (x) x 23 arch/arm/include/asm/pgtable-3level-hwdef.h #define PMD_DOMAIN(x) (_AT(pmdval_t, 0)) x 43 arch/arm/include/asm/pgtable-3level-hwdef.h #define PMD_SECT_TEX(x) (_AT(pmdval_t, 0)) x 29 arch/arm/include/asm/pgtable-3level-types.h #define pte_val(x) ((x).pte) x 30 arch/arm/include/asm/pgtable-3level-types.h #define pmd_val(x) ((x).pmd) x 31 arch/arm/include/asm/pgtable-3level-types.h #define pgd_val(x) ((x).pgd) x 32 arch/arm/include/asm/pgtable-3level-types.h #define pgprot_val(x) ((x).pgprot) x 34 arch/arm/include/asm/pgtable-3level-types.h #define __pte(x) ((pte_t) { (x) } ) x 35 arch/arm/include/asm/pgtable-3level-types.h #define __pmd(x) ((pmd_t) { (x) } ) x 36 arch/arm/include/asm/pgtable-3level-types.h #define __pgd(x) ((pgd_t) { (x) } ) x 37 arch/arm/include/asm/pgtable-3level-types.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 46 arch/arm/include/asm/pgtable-3level-types.h #define pte_val(x) (x) x 47 arch/arm/include/asm/pgtable-3level-types.h #define pmd_val(x) (x) x 48 arch/arm/include/asm/pgtable-3level-types.h #define pgd_val(x) (x) x 49 arch/arm/include/asm/pgtable-3level-types.h #define pgprot_val(x) (x) x 51 arch/arm/include/asm/pgtable-3level-types.h #define __pte(x) (x) x 52 arch/arm/include/asm/pgtable-3level-types.h #define __pmd(x) (x) x 53 arch/arm/include/asm/pgtable-3level-types.h #define __pgd(x) (x) x 54 arch/arm/include/asm/pgtable-3level-types.h #define __pgprot(x) (x) x 45 arch/arm/include/asm/pgtable-nommu.h #define __swp_type(x) (0) x 46 arch/arm/include/asm/pgtable-nommu.h #define __swp_offset(x) (0) x 49 arch/arm/include/asm/pgtable-nommu.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 345 arch/arm/include/asm/pgtable.h #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) x 346 arch/arm/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) x 112 arch/arm/include/asm/ptrace.h #define predicate(x) ((x) & 0xf0000000) x 23 arch/arm/include/asm/swab.h static inline __attribute_const__ __u32 __arch_swahb32(__u32 x) x 25 arch/arm/include/asm/swab.h __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x)); x 26 arch/arm/include/asm/swab.h return x; x 29 arch/arm/include/asm/swab.h #define __arch_swab16(x) ((__u16)__arch_swahb32(x)) x 31 arch/arm/include/asm/swab.h static inline __attribute_const__ __u32 __arch_swab32(__u32 x) x 33 arch/arm/include/asm/swab.h __asm__ ("rev %0, %1" : "=r" (x) : "r" (x)); x 34 arch/arm/include/asm/swab.h return x; x 71 arch/arm/include/asm/uaccess-asm.h #define DACR(x...) x x 73 arch/arm/include/asm/uaccess-asm.h #define DACR(x...) x 96 arch/arm/include/asm/uaccess.h #define __inttype(x) \ x 97 arch/arm/include/asm/uaccess.h __typeof__(__builtin_choose_expr(sizeof(x) > sizeof(0UL), 0ULL, 0UL)) x 191 arch/arm/include/asm/uaccess.h #define __get_user_check(x, p) \ x 195 arch/arm/include/asm/uaccess.h register __inttype(x) __r2 asm("r2"); \ x 201 arch/arm/include/asm/uaccess.h if (sizeof((x)) >= 8) \ x 207 arch/arm/include/asm/uaccess.h if (sizeof((x)) >= 8) \ x 213 arch/arm/include/asm/uaccess.h if (sizeof((x)) >= 8) \ x 219 arch/arm/include/asm/uaccess.h if (sizeof((x)) < 8) \ x 227 arch/arm/include/asm/uaccess.h x = (typeof(*(p))) __r2; \ x 231 arch/arm/include/asm/uaccess.h #define get_user(x, p) \ x 234 arch/arm/include/asm/uaccess.h __get_user_check(x, p); \ x 275 arch/arm/include/asm/uaccess.h #define get_user(x, p) __get_user(x, p) x 292 arch/arm/include/asm/uaccess.h #define __get_user(x, ptr) get_user(x, ptr) x 304 arch/arm/include/asm/uaccess.h #define __get_user(x, ptr) \ x 307 arch/arm/include/asm/uaccess.h __get_user_err((x), (ptr), __gu_err); \ x 311 arch/arm/include/asm/uaccess.h #define __get_user_err(x, ptr, err) \ x 326 arch/arm/include/asm/uaccess.h (x) = (__typeof__(*(ptr)))__gu_val; \ x 329 arch/arm/include/asm/uaccess.h #define __get_user_asm(x, addr, err, instr) \ x 343 arch/arm/include/asm/uaccess.h : "+r" (err), "=&r" (x) \ x 347 arch/arm/include/asm/uaccess.h #define __get_user_asm_byte(x, addr, err) \ x 348 arch/arm/include/asm/uaccess.h __get_user_asm(x, addr, err, ldrb) x 352 arch/arm/include/asm/uaccess.h #define __get_user_asm_half(x, addr, err) \ x 353 arch/arm/include/asm/uaccess.h __get_user_asm(x, addr, err, ldrh) x 358 arch/arm/include/asm/uaccess.h #define __get_user_asm_half(x, __gu_addr, err) \ x 363 arch/arm/include/asm/uaccess.h (x) = __b1 | (__b2 << 8); \ x 366 arch/arm/include/asm/uaccess.h #define __get_user_asm_half(x, __gu_addr, err) \ x 371 arch/arm/include/asm/uaccess.h (x) = (__b1 << 8) | __b2; \ x 377 arch/arm/include/asm/uaccess.h #define __get_user_asm_word(x, addr, err) \ x 378 arch/arm/include/asm/uaccess.h __get_user_asm(x, addr, err, ldr) x 382 arch/arm/include/asm/uaccess.h #define __put_user_switch(x, ptr, __err, __fn) \ x 385 arch/arm/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = (x); \ x 399 arch/arm/include/asm/uaccess.h #define put_user(x, ptr) \ x 402 arch/arm/include/asm/uaccess.h __put_user_switch((x), (ptr), __pu_err, __put_user_check); \ x 411 arch/arm/include/asm/uaccess.h #define __put_user(x, ptr) put_user(x, ptr) x 414 arch/arm/include/asm/uaccess.h #define __put_user(x, ptr) \ x 417 arch/arm/include/asm/uaccess.h __put_user_switch((x), (ptr), __pu_err, __put_user_nocheck); \ x 421 arch/arm/include/asm/uaccess.h #define __put_user_nocheck(x, __pu_ptr, __err, __size) \ x 424 arch/arm/include/asm/uaccess.h __put_user_nocheck_##__size(x, __pu_addr, __err); \ x 432 arch/arm/include/asm/uaccess.h #define __put_user_asm(x, __pu_addr, err, instr) \ x 446 arch/arm/include/asm/uaccess.h : "r" (x), "r" (__pu_addr), "i" (-EFAULT) \ x 449 arch/arm/include/asm/uaccess.h #define __put_user_asm_byte(x, __pu_addr, err) \ x 450 arch/arm/include/asm/uaccess.h __put_user_asm(x, __pu_addr, err, strb) x 454 arch/arm/include/asm/uaccess.h #define __put_user_asm_half(x, __pu_addr, err) \ x 455 arch/arm/include/asm/uaccess.h __put_user_asm(x, __pu_addr, err, strh) x 460 arch/arm/include/asm/uaccess.h #define __put_user_asm_half(x, __pu_addr, err) \ x 462 arch/arm/include/asm/uaccess.h unsigned long __temp = (__force unsigned long)(x); \ x 467 arch/arm/include/asm/uaccess.h #define __put_user_asm_half(x, __pu_addr, err) \ x 469 arch/arm/include/asm/uaccess.h unsigned long __temp = (__force unsigned long)(x); \ x 477 arch/arm/include/asm/uaccess.h #define __put_user_asm_word(x, __pu_addr, err) \ x 478 arch/arm/include/asm/uaccess.h __put_user_asm(x, __pu_addr, err, str) x 488 arch/arm/include/asm/uaccess.h #define __put_user_asm_dword(x, __pu_addr, err) \ x 506 arch/arm/include/asm/uaccess.h : "r" (x), "i" (-EFAULT) \ x 18 arch/arm/include/asm/unified.h #define AR_CLASS(x...) x 19 arch/arm/include/asm/unified.h #define M_CLASS(x...) x x 21 arch/arm/include/asm/unified.h #define AR_CLASS(x...) x x 22 arch/arm/include/asm/unified.h #define M_CLASS(x...) x 34 arch/arm/include/asm/unified.h #define ARM(x...) x 35 arch/arm/include/asm/unified.h #define THUMB(x...) x x 47 arch/arm/include/asm/unified.h #define ARM(x...) x x 48 arch/arm/include/asm/unified.h #define THUMB(x...) x 37 arch/arm/include/asm/vfpmacros.h cmp \tmp, #2 @ 32 x 64bit registers? x 61 arch/arm/include/asm/vfpmacros.h cmp \tmp, #2 @ 32 x 64bit registers? x 9 arch/arm/include/asm/vga.h #define VGA_MAP_MEM(x,s) (vga_base + (x)) x 11 arch/arm/include/asm/vga.h #define vga_readb(x) (*((volatile unsigned char *)x)) x 12 arch/arm/include/asm/vga.h #define vga_writeb(x,y) (*((volatile unsigned char *)y) = (x)) x 162 arch/arm/include/uapi/asm/kvm.h #define ARM_CP15_REG_SHIFT_MASK(x,n) \ x 163 arch/arm/include/uapi/asm/kvm.h (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK) x 51 arch/arm/include/uapi/asm/setup.h __u8 x; x 28 arch/arm/include/uapi/asm/swab.h static inline __attribute_const__ __u32 __arch_swab32(__u32 x) x 33 arch/arm/include/uapi/asm/swab.h if (!__builtin_constant_p(x)) { x 39 arch/arm/include/uapi/asm/swab.h asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x)); x 42 arch/arm/include/uapi/asm/swab.h t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */ x 44 arch/arm/include/uapi/asm/swab.h x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */ x 46 arch/arm/include/uapi/asm/swab.h x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */ x 48 arch/arm/include/uapi/asm/swab.h return x; x 174 arch/arm/kernel/atags_compat.c tag->u.videotext.x = params->u1.s.video_x; x 75 arch/arm/kernel/atags_parse.c screen_info.orig_x = tag->u.videotext.x; x 10 arch/arm/kernel/elf.c int elf_check_arch(const struct elf32_hdr *x) x 15 arch/arm/kernel/elf.c if (x->e_machine != EM_ARM) x 19 arch/arm/kernel/elf.c if (x->e_entry & 1) { x 22 arch/arm/kernel/elf.c } else if (x->e_entry & 3) x 25 arch/arm/kernel/elf.c eflags = x->e_flags; x 43 arch/arm/kernel/elf.c void elf_set_personality(const struct elf32_hdr *x) x 45 arch/arm/kernel/elf.c unsigned int eflags = x->e_flags; x 80 arch/arm/kernel/module-plts.c const Elf32_Rel *x = a, *y = b; x 84 arch/arm/kernel/module-plts.c i = cmp_3way(ELF32_R_TYPE(x->r_info), ELF32_R_TYPE(y->r_info)); x 86 arch/arm/kernel/module-plts.c i = cmp_3way(ELF32_R_SYM(x->r_info), ELF32_R_SYM(y->r_info)); x 669 arch/arm/kernel/perf_event_v7.c #define ARMV7_IDX_TO_COUNTER(x) \ x 670 arch/arm/kernel/perf_event_v7.c (((x) - ARMV7_IDX_COUNTER0) & ARMV7_COUNTER_MASK) x 514 arch/arm/kernel/smp.c #define S(x,s) [x] = s x 80 arch/arm/kernel/traps.c unsigned int x; x 83 arch/arm/kernel/traps.c for (reg = 10, x = 0, p = str; reg >= 0; reg--) { x 86 arch/arm/kernel/traps.c if (++x == 6) { x 87 arch/arm/kernel/traps.c x = 0; x 592 arch/arm/kernel/traps.c #define NR(x) ((__ARM_NR_##x) - __ARM_NR_BASE) x 4 arch/arm/kernel/vmlinux.lds.h #define ARM_CPU_DISCARD(x) x 5 arch/arm/kernel/vmlinux.lds.h #define ARM_CPU_KEEP(x) x x 7 arch/arm/kernel/vmlinux.lds.h #define ARM_CPU_DISCARD(x) x x 8 arch/arm/kernel/vmlinux.lds.h #define ARM_CPU_KEEP(x) x 13 arch/arm/kernel/vmlinux.lds.h #define ARM_EXIT_KEEP(x) x x 14 arch/arm/kernel/vmlinux.lds.h #define ARM_EXIT_DISCARD(x) x 16 arch/arm/kernel/vmlinux.lds.h #define ARM_EXIT_KEEP(x) x 17 arch/arm/kernel/vmlinux.lds.h #define ARM_EXIT_DISCARD(x) x x 21 arch/arm/kernel/vmlinux.lds.h #define ARM_MMU_KEEP(x) x x 22 arch/arm/kernel/vmlinux.lds.h #define ARM_MMU_DISCARD(x) x 24 arch/arm/kernel/vmlinux.lds.h #define ARM_MMU_KEEP(x) x 25 arch/arm/kernel/vmlinux.lds.h #define ARM_MMU_DISCARD(x) x x 544 arch/arm/kvm/coproc.c #define reg_to_match_value(x) \ x 547 arch/arm/kvm/coproc.c val = (x)->CRn << 11; \ x 548 arch/arm/kvm/coproc.c val |= (x)->CRm << 7; \ x 549 arch/arm/kvm/coproc.c val |= (x)->Op1 << 4; \ x 550 arch/arm/kvm/coproc.c val |= (x)->Op2 << 1; \ x 551 arch/arm/kvm/coproc.c val |= !(x)->is_64bit; \ x 20 arch/arm/kvm/guest.c #define VM_STAT(x) { #x, offsetof(struct kvm, stat.x), KVM_STAT_VM } x 21 arch/arm/kvm/guest.c #define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU } x 23 arch/arm/mach-bcm/bcm63xx_pmb.c #define CPU_RESET_N(x) BIT(13 + (x)) x 54 arch/arm/mach-bcm/bcm63xx_pmb.c #define ARM_PWR_CONTROL(x) (ARM_PWR_CONTROL_BASE + (x) * 0x4) x 243 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIEPHY_CMCTL(x) MISC_MEM_MAP(0x900 + (x) * 0x004) x 244 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIEPHY_CTL(x) MISC_MEM_MAP(0x940 + (x) * 0x100) x 245 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_AXIS_AWMISC(x) MISC_MEM_MAP(0x944 + (x) * 0x100) x 246 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_AXIS_ARMISC(x) MISC_MEM_MAP(0x948 + (x) * 0x100) x 247 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_AXIS_RMISC(x) MISC_MEM_MAP(0x94C + (x) * 0x100) x 248 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_AXIS_BMISC(x) MISC_MEM_MAP(0x950 + (x) * 0x100) x 249 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_AXIM_RMISC(x) MISC_MEM_MAP(0x954 + (x) * 0x100) x 250 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_AXIM_BMISC(x) MISC_MEM_MAP(0x958 + (x) * 0x100) x 251 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_CTRL(x) MISC_MEM_MAP(0x95C + (x) * 0x100) x 252 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_PM_DEBUG(x) MISC_MEM_MAP(0x960 + (x) * 0x100) x 253 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_RFC_DEBUG(x) MISC_MEM_MAP(0x964 + (x) * 0x100) x 254 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_CXPL_DEBUGL(x) MISC_MEM_MAP(0x968 + (x) * 0x100) x 255 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_CXPL_DEBUGH(x) MISC_MEM_MAP(0x96C + (x) * 0x100) x 256 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_DIAG_DEBUGH(x) MISC_MEM_MAP(0x970 + (x) * 0x100) x 257 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_W1CLR(x) MISC_MEM_MAP(0x974 + (x) * 0x100) x 258 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_INT_MASK(x) MISC_MEM_MAP(0x978 + (x) * 0x100) x 259 arch/arm/mach-cns3xxx/cns3xxx.h #define MISC_PCIE_INT_STATUS(x) MISC_MEM_MAP(0x97C + (x) * 0x100) x 288 arch/arm/mach-cns3xxx/cns3xxx.h #define PM_CLK_GATE_REG_OFFSET_PCIE(x) (17 + (x)) x 316 arch/arm/mach-cns3xxx/cns3xxx.h #define PM_SOFT_RST_REG_OFFST_PCIE(x) (17 + (x)) x 314 arch/arm/mach-davinci/board-dm644x-evm.c #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8)) x 57 arch/arm/mach-davinci/davinci.h #define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x)) x 57 arch/arm/mach-davinci/include/mach/da8xx.h #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) x 68 arch/arm/mach-davinci/include/mach/da8xx.h #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) x 30 arch/arm/mach-davinci/include/mach/hardware.h #define __IO_ADDRESS(x) ((x) + IO_OFFSET) x 975 arch/arm/mach-davinci/include/mach/mux.h #define PINMUX(x) (4 * (x)) x 28 arch/arm/mach-davinci/include/mach/uncompress.h #define IOMEM(x) ((void __force __iomem *)(x)) x 870 arch/arm/mach-ep93xx/core.c #define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x)) x 11 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) x 18 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_A(x) ((x) + 0) x 29 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_B(x) ((x) + 8) x 40 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_C(x) ((x) + 40) x 51 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_D(x) ((x) + 24) x 62 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_E(x) ((x) + 32) x 73 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_F(x) ((x) + 16) x 84 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_G(x) ((x) + 48) x 95 arch/arm/mach-ep93xx/gpio-ep93xx.h #define EP93XX_GPIO_LINE_H(x) ((x) + 56) x 22 arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h #define EP93XX_AHB_PHYS(x) (EP93XX_AHB_PHYS_BASE + (x)) x 23 arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h #define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) x 29 arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h #define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x)) x 30 arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h #define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) x 73 arch/arm/mach-ep93xx/include/mach/irqs.h #define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x)) x 109 arch/arm/mach-ep93xx/soc.h #define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x)) x 31 arch/arm/mach-ep93xx/timer-ep93xx.c #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x)) x 17 arch/arm/mach-footbridge/include/mach/irqs.h #define _ISA_IRQ(x) (0 + (x)) x 18 arch/arm/mach-footbridge/include/mach/irqs.h #define _ISA_INR(x) ((x) - 0) x 19 arch/arm/mach-footbridge/include/mach/irqs.h #define _DC21285_IRQ(x) (16 + (x)) x 20 arch/arm/mach-footbridge/include/mach/irqs.h #define _DC21285_INR(x) ((x) - 16) x 18 arch/arm/mach-footbridge/include/mach/isa-dma.h #define _ISA_DMA(x) (0+(x)) x 19 arch/arm/mach-footbridge/include/mach/isa-dma.h #define _DC21285_DMA(x) (8+(x)) x 43 arch/arm/mach-footbridge/include/mach/memory.h #define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET)) x 44 arch/arm/mach-footbridge/include/mach/memory.h #define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET)) x 45 arch/arm/mach-footbridge/include/mach/memory.h #define __pfn_to_bus(x) (__pfn_to_phys(x) + (BUS_OFFSET - PHYS_OFFSET)) x 46 arch/arm/mach-footbridge/include/mach/memory.h #define __bus_to_pfn(x) __phys_to_pfn((x) - (BUS_OFFSET - PHYS_OFFSET)) x 18 arch/arm/mach-footbridge/isa-rtc.c #define RTC_PORT(x) (0x70+(x)) x 400 arch/arm/mach-footbridge/netwinder-hw.c #define dprintk(x...) x 402 arch/arm/mach-footbridge/netwinder-hw.c #define dprintk(x...) printk(x) x 24 arch/arm/mach-hisi/platmcpm.c #define CORE_RESET_BIT(x) (1 << x) x 25 arch/arm/mach-hisi/platmcpm.c #define NEON_RESET_BIT(x) (1 << (x + 4)) x 26 arch/arm/mach-hisi/platmcpm.c #define CORE_DEBUG_RESET_BIT(x) (1 << (x + 9)) x 34 arch/arm/mach-hisi/platmcpm.c #define CORE_RESET_STATUS(x) (1 << x) x 35 arch/arm/mach-hisi/platmcpm.c #define NEON_RESET_STATUS(x) (1 << (x + 4)) x 36 arch/arm/mach-hisi/platmcpm.c #define CORE_DEBUG_RESET_STATUS(x) (1 << (x + 9)) x 39 arch/arm/mach-hisi/platmcpm.c #define CORE_WFI_STATUS(x) (1 << (x + 16)) x 40 arch/arm/mach-hisi/platmcpm.c #define CORE_WFE_STATUS(x) (1 << (x + 20)) x 41 arch/arm/mach-hisi/platmcpm.c #define CORE_DEBUG_ACK(x) (1 << (x + 24)) x 43 arch/arm/mach-hisi/platmcpm.c #define SC_CPU_RESET_REQ(x) (0x520 + (x << 3)) /* reset */ x 44 arch/arm/mach-hisi/platmcpm.c #define SC_CPU_RESET_DREQ(x) (0x524 + (x << 3)) /* unreset */ x 45 arch/arm/mach-hisi/platmcpm.c #define SC_CPU_RESET_STATUS(x) (0x1520 + (x << 3)) x 28 arch/arm/mach-imx/avic.c #define AVIC_NIPRIORITY(x) (0x20 + 4 * (7 - (x))) /* int priority */ x 141 arch/arm/mach-imx/crmregs-imx3.h #define MXC_CCM_LTR2_WSW_OFFSET(x) (11 + (x) * 3) x 142 arch/arm/mach-imx/crmregs-imx3.h #define MXC_CCM_LTR2_WSW_MASK(x) (0x7 << \ x 143 arch/arm/mach-imx/crmregs-imx3.h MXC_CCM_LTR2_WSW_OFFSET((x))) x 150 arch/arm/mach-imx/crmregs-imx3.h #define MXC_CCM_LTR3_WSW_OFFSET(x) (5 + (x) * 3) x 151 arch/arm/mach-imx/crmregs-imx3.h #define MXC_CCM_LTR3_WSW_MASK(x) (0x7 << \ x 152 arch/arm/mach-imx/crmregs-imx3.h MXC_CCM_LTR3_WSW_OFFSET((x))) x 85 arch/arm/mach-imx/hardware.h #define IMX_IO_P2V(x) ( \ x 86 arch/arm/mach-imx/hardware.h (((x) & 0x80000000) >> 7) | \ x 88 arch/arm/mach-imx/hardware.h (((x) & 0x50000000) >> 6) + \ x 89 arch/arm/mach-imx/hardware.h (((x) & 0x0b000000) >> 4) + \ x 90 arch/arm/mach-imx/hardware.h (((x) & 0x000fffff)))) x 92 arch/arm/mach-imx/hardware.h #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) x 13 arch/arm/mach-imx/iomux-v1.h #define MXC_DDIR(x) (0x00 + ((x) << 8)) x 14 arch/arm/mach-imx/iomux-v1.h #define MXC_OCR1(x) (0x04 + ((x) << 8)) x 15 arch/arm/mach-imx/iomux-v1.h #define MXC_OCR2(x) (0x08 + ((x) << 8)) x 16 arch/arm/mach-imx/iomux-v1.h #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) x 17 arch/arm/mach-imx/iomux-v1.h #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) x 18 arch/arm/mach-imx/iomux-v1.h #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) x 19 arch/arm/mach-imx/iomux-v1.h #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) x 20 arch/arm/mach-imx/iomux-v1.h #define MXC_DR(x) (0x1c + ((x) << 8)) x 21 arch/arm/mach-imx/iomux-v1.h #define MXC_GIUS(x) (0x20 + ((x) << 8)) x 22 arch/arm/mach-imx/iomux-v1.h #define MXC_SSR(x) (0x24 + ((x) << 8)) x 23 arch/arm/mach-imx/iomux-v1.h #define MXC_ICR1(x) (0x28 + ((x) << 8)) x 24 arch/arm/mach-imx/iomux-v1.h #define MXC_ICR2(x) (0x2c + ((x) << 8)) x 25 arch/arm/mach-imx/iomux-v1.h #define MXC_IMR(x) (0x30 + ((x) << 8)) x 26 arch/arm/mach-imx/iomux-v1.h #define MXC_ISR(x) (0x34 + ((x) << 8)) x 27 arch/arm/mach-imx/iomux-v1.h #define MXC_GPR(x) (0x38 + ((x) << 8)) x 28 arch/arm/mach-imx/iomux-v1.h #define MXC_SWR(x) (0x3c + ((x) << 8)) x 29 arch/arm/mach-imx/iomux-v1.h #define MXC_PUEN(x) (0x40 + ((x) << 8)) x 59 arch/arm/mach-imx/iomux-v3.h #define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) x 35 arch/arm/mach-imx/mach-kzm_arm11_01.c #define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \ x 36 arch/arm/mach-imx/mach-kzm_arm11_01.c IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \ x 37 arch/arm/mach-imx/mach-kzm_arm11_01.c IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \ x 38 arch/arm/mach-imx/mach-kzm_arm11_01.c MX31_IO_ADDRESS(x)) x 85 arch/arm/mach-imx/mx21.h #define MX21_IO_P2V(x) IMX_IO_P2V(x) x 86 arch/arm/mach-imx/mx21.h #define MX21_IO_ADDRESS(x) IOMEM(MX21_IO_P2V(x)) x 114 arch/arm/mach-imx/mx27.h #define MX27_IO_P2V(x) IMX_IO_P2V(x) x 115 arch/arm/mach-imx/mx27.h #define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x)) x 119 arch/arm/mach-imx/mx31.h #define MX31_IO_P2V(x) IMX_IO_P2V(x) x 120 arch/arm/mach-imx/mx31.h #define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x)) x 118 arch/arm/mach-imx/mx35.h #define MX35_IO_P2V(x) IMX_IO_P2V(x) x 119 arch/arm/mach-imx/mx35.h #define MX35_IO_ADDRESS(x) IOMEM(MX35_IO_P2V(x)) x 20 arch/arm/mach-integrator/hardware.h #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE) x 22 arch/arm/mach-integrator/hardware.h #define IO_ADDRESS(x) (x) x 32 arch/arm/mach-iop32x/iop3xx.h #define IOP3XX_GPIO_LINE(x) (x) x 27 arch/arm/mach-iop32x/pci.c #define DBG(x...) printk(x) x 29 arch/arm/mach-iop32x/pci.c #define DBG(x...) do { } while (0) x 81 arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h #define IXP4XX_EXP_REG(x) ((volatile u32 __iomem *)(IXP4XX_EXP_CFG_BASE_VIRT+(x))) x 158 arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h #define IXP4XX_TIMER_REG(x) ((volatile u32 *)(IXP4XX_TIMER_BASE_VIRT+(x))) x 220 arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h #define IXP4XX_PCI_CSR(x) ((volatile u32 *)(IXP4XX_PCI_CFG_BASE_VIRT+(x))) x 51 arch/arm/mach-ixp4xx/include/mach/platform.h #define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16) x 52 arch/arm/mach-ixp4xx/include/mach/platform.h #define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20) x 53 arch/arm/mach-ixp4xx/include/mach/platform.h #define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22) x 54 arch/arm/mach-ixp4xx/include/mach/platform.h #define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26) x 55 arch/arm/mach-ixp4xx/include/mach/platform.h #define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28) x 56 arch/arm/mach-ixp4xx/include/mach/platform.h #define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10) x 57 arch/arm/mach-ixp4xx/include/mach/platform.h #define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14) x 121 arch/arm/mach-lpc32xx/lpc32xx.h #define _PMREG(x) io_p2v(LPC32XX_CLK_PM_BASE +\ x 122 arch/arm/mach-lpc32xx/lpc32xx.h (x)) x 170 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_CLKPWR_DEVID(x) _PMREG(0x130 + (x)) x 544 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_CLKPWR_UART_X_DIV(x) (((x) & 0xFF) << 8) x 551 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_CLKPWR_IRDA_X_DIV(x) (((x) & 0xFF) << 8) x 576 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_INTC_MASK(x) io_p2v((x) + 0x00) x 577 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_INTC_RAW_STAT(x) io_p2v((x) + 0x04) x 578 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_INTC_STAT(x) io_p2v((x) + 0x08) x 579 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_INTC_POLAR(x) io_p2v((x) + 0x0C) x 580 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_INTC_ACT_TYPE(x) io_p2v((x) + 0x10) x 581 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_INTC_TYPE(x) io_p2v((x) + 0x14) x 586 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_IR(x) io_p2v((x) + 0x00) x 587 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_TCR(x) io_p2v((x) + 0x04) x 588 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_TC(x) io_p2v((x) + 0x08) x 589 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_PR(x) io_p2v((x) + 0x0C) x 590 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_PC(x) io_p2v((x) + 0x10) x 591 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_MCR(x) io_p2v((x) + 0x14) x 592 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_MR0(x) io_p2v((x) + 0x18) x 593 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_MR1(x) io_p2v((x) + 0x1C) x 594 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_MR2(x) io_p2v((x) + 0x20) x 595 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_MR3(x) io_p2v((x) + 0x24) x 596 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_CCR(x) io_p2v((x) + 0x28) x 597 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_CR0(x) io_p2v((x) + 0x2C) x 598 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_CR1(x) io_p2v((x) + 0x30) x 599 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_CR2(x) io_p2v((x) + 0x34) x 600 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_CR3(x) io_p2v((x) + 0x38) x 601 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_EMR(x) io_p2v((x) + 0x3C) x 602 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_TIMER_CTCR(x) io_p2v((x) + 0x70) x 626 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_DLL_FIFO(x) io_p2v((x) + 0x00) x 627 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_DLM_IER(x) io_p2v((x) + 0x04) x 628 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_IIR_FCR(x) io_p2v((x) + 0x08) x 629 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_LCR(x) io_p2v((x) + 0x0C) x 630 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_MODEM_CTRL(x) io_p2v((x) + 0x10) x 631 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_LSR(x) io_p2v((x) + 0x14) x 632 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_MODEM_STATUS(x) io_p2v((x) + 0x18) x 633 arch/arm/mach-lpc32xx/lpc32xx.h #define LPC32XX_UART_RXLEV(x) io_p2v((x) + 0x1C) x 638 arch/arm/mach-lpc32xx/lpc32xx.h #define _UCREG(x) io_p2v(\ x 639 arch/arm/mach-lpc32xx/lpc32xx.h LPC32XX_UART_CTRL_BASE + (x)) x 672 arch/arm/mach-lpc32xx/lpc32xx.h #define _GPREG(x) io_p2v(LPC32XX_GPIO_BASE + (x)) x 692 arch/arm/mach-lpc32xx/lpc32xx.h #define _OTGREG(x) io_p2v(LPC32XX_USB_OTG_BASE + (x)) x 711 arch/arm/mach-lpc32xx/lpc32xx.h #define IO_ADDRESS(x) IOMEM(((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ x 714 arch/arm/mach-lpc32xx/lpc32xx.h #define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) x 715 arch/arm/mach-lpc32xx/lpc32xx.h #define io_v2p(x) ((((x) & 0x0ff00000) << 4) | ((x) & 0x000fffff)) x 30 arch/arm/mach-mmp/addr-map.h #define APMU_REG(x) (APMU_VIRT_BASE + (x)) x 33 arch/arm/mach-mmp/addr-map.h #define APBC_REG(x) (APBC_VIRT_BASE + (x)) x 36 arch/arm/mach-mmp/addr-map.h #define MPMU_REG(x) (MPMU_VIRT_BASE + (x)) x 39 arch/arm/mach-mmp/addr-map.h #define CIU_REG(x) (CIU_VIRT_BASE + (x)) x 3 arch/arm/mach-mmp/common.h #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) x 17 arch/arm/mach-mmp/pm-mmp2.h #define APMU_PJ_IDLE_CFG_PWR_SW(x) ((x) << 16) x 44 arch/arm/mach-mmp/pm-mmp2.h #define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x)) x 16 arch/arm/mach-mmp/pm-pxa910.h #define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16) x 17 arch/arm/mach-mmp/pm-pxa910.h #define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18) x 60 arch/arm/mach-mmp/pm-pxa910.h #define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7)) x 17 arch/arm/mach-mmp/regs-apbc.h #define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) x 12 arch/arm/mach-mmp/regs-icu.h #define ICU_REG(x) (ICU_VIRT_BASE + (x)) x 15 arch/arm/mach-mmp/regs-icu.h #define ICU2_REG(x) (ICU2_VIRT_BASE + (x)) x 35 arch/arm/mach-mmp/regs-timers.h #define TMR_CCR_CS_0(x) (((x) & 0x3) << 0) x 36 arch/arm/mach-mmp/regs-timers.h #define TMR_CCR_CS_1(x) (((x) & 0x7) << 2) x 37 arch/arm/mach-mmp/regs-timers.h #define TMR_CCR_CS_2(x) (((x) & 0x3) << 5) x 34 arch/arm/mach-mmp/ttc_dkb.c #define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ x 35 arch/arm/mach-mmp/ttc_dkb.c ((x < 16) ? x : 15))) x 36 arch/arm/mach-mmp/ttc_dkb.c #define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ x 37 arch/arm/mach-mmp/ttc_dkb.c ((x < 16) ? x : 15))) x 185 arch/arm/mach-mmp/ttc_dkb.c #define SCLK_SOURCE_SELECT(x) (x << 30) /* 0x0 ~ 0x3 */ x 87 arch/arm/mach-mvebu/pm.c #define SDRAM_WIN_BASE_REG(x) (0x20180 + (0x8*x)) x 88 arch/arm/mach-mvebu/pm.c #define SDRAM_WIN_CTRL_REG(x) (0x20184 + (0x8*x)) x 256 arch/arm/mach-omap1/board-h3.c #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) x 27 arch/arm/mach-omap1/include/mach/memory.h #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) x 28 arch/arm/mach-omap1/include/mach/memory.h #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) x 47 arch/arm/mach-omap1/include/mach/mtd-xip.h #define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7) x 49 arch/arm/mach-omap1/include/mach/mtd-xip.h #define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6) x 125 arch/arm/mach-omap1/include/mach/usb.h # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) x 160 arch/arm/mach-omap1/lcd_dma.c #define PIXADDR(x, y) (lcd_dma.addr + \ x 161 arch/arm/mach-omap1/lcd_dma.c ((y) * vxres * yscale + (x) * xscale) * es) x 509 arch/arm/mach-omap1/mux.c #define omap_cfg_reg(x) do {} while(0) x 144 arch/arm/mach-omap1/pm.h #define omap_serial_wake_trigger(x) {} x 147 arch/arm/mach-omap1/pm.h #define ARM_SAVE(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] = omap_readl(x) x 148 arch/arm/mach-omap1/pm.h #define ARM_RESTORE(x) omap_writel((arm_sleep_save[ARM_SLEEP_SAVE_##x]), (x)) x 149 arch/arm/mach-omap1/pm.h #define ARM_SHOW(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] x 151 arch/arm/mach-omap1/pm.h #define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x) x 152 arch/arm/mach-omap1/pm.h #define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x)) x 153 arch/arm/mach-omap1/pm.h #define DSP_SHOW(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] x 155 arch/arm/mach-omap1/pm.h #define ULPD_SAVE(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] = omap_readw(x) x 156 arch/arm/mach-omap1/pm.h #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) x 157 arch/arm/mach-omap1/pm.h #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] x 159 arch/arm/mach-omap1/pm.h #define MPUI7XX_SAVE(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] = omap_readl(x) x 160 arch/arm/mach-omap1/pm.h #define MPUI7XX_RESTORE(x) omap_writel((mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]), (x)) x 161 arch/arm/mach-omap1/pm.h #define MPUI7XX_SHOW(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] x 163 arch/arm/mach-omap1/pm.h #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) x 164 arch/arm/mach-omap1/pm.h #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) x 165 arch/arm/mach-omap1/pm.h #define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] x 167 arch/arm/mach-omap1/pm.h #define MPUI1610_SAVE(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x] = omap_readl(x) x 168 arch/arm/mach-omap1/pm.h #define MPUI1610_RESTORE(x) omap_writel((mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x]), (x)) x 169 arch/arm/mach-omap1/pm.h #define MPUI1610_SHOW(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x] x 533 arch/arm/mach-omap2/control.h #define omap_ctrl_readb(x) 0 x 534 arch/arm/mach-omap2/control.h #define omap_ctrl_readw(x) 0 x 535 arch/arm/mach-omap2/control.h #define omap_ctrl_readl(x) 0 x 536 arch/arm/mach-omap2/control.h #define omap4_ctrl_pad_readl(x) 0 x 537 arch/arm/mach-omap2/control.h #define omap_ctrl_writeb(x, y) WARN_ON(1) x 538 arch/arm/mach-omap2/control.h #define omap_ctrl_writew(x, y) WARN_ON(1) x 539 arch/arm/mach-omap2/control.h #define omap_ctrl_writel(x, y) WARN_ON(1) x 540 arch/arm/mach-omap2/control.h #define omap4_ctrl_pad_writel(x, y) WARN_ON(1) x 184 arch/arm/mach-orion5x/kurobox_pro-setup.c #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) x 75 arch/arm/mach-orion5x/orion5x.h #define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x)) x 193 arch/arm/mach-orion5x/pci.c #define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE + (x)) x 159 arch/arm/mach-orion5x/terastation_pro2-setup.c #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) x 22 arch/arm/mach-orion5x/tsx09-common.c #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) x 15 arch/arm/mach-picoxcell/common.c #define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) x 7 arch/arm/mach-pxa/cm-x2xx-pci.h #define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x) x 8 arch/arm/mach-pxa/cm-x2xx-pci.h #define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x) x 9 arch/arm/mach-pxa/cm-x2xx-pci.h #define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x) x 11 arch/arm/mach-pxa/cm-x2xx-pci.h #define cmx2xx_pci_init_irq(x) do {} while (0) x 12 arch/arm/mach-pxa/cm-x2xx-pci.h #define cmx2xx_pci_suspend(x) do {} while (0) x 13 arch/arm/mach-pxa/cm-x2xx-pci.h #define cmx2xx_pci_resume(x) do {} while (0) x 23 arch/arm/mach-pxa/generic.h #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) x 66 arch/arm/mach-pxa/generic.h #define pxa25x_get_clk_frequency_khz(x) (0) x 71 arch/arm/mach-pxa/generic.h #define pxa27x_get_clk_frequency_khz(x) (0) x 77 arch/arm/mach-pxa/generic.h #define pxa3xx_get_clk_frequency_khz(x) (0) x 48 arch/arm/mach-pxa/idp.h #define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT) x 49 arch/arm/mach-pxa/idp.h #define CPLD_V2P(x) ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS) x 52 arch/arm/mach-pxa/idp.h # define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x))) x 54 arch/arm/mach-pxa/idp.h # define __CPLD_REG(x) CPLD_P2V(x) x 172 arch/arm/mach-pxa/include/mach/balloon3.h #define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) x 36 arch/arm/mach-pxa/include/mach/hardware.h #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) x 37 arch/arm/mach-pxa/include/mach/hardware.h #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) x 40 arch/arm/mach-pxa/include/mach/hardware.h # define __REG(x) (*((volatile u32 __iomem *)io_p2v(x))) x 44 arch/arm/mach-pxa/include/mach/hardware.h # define __REG2(x,y) \ x 45 arch/arm/mach-pxa/include/mach/hardware.h (*(volatile u32 __iomem*)((u32)&__REG(x) + (y))) x 47 arch/arm/mach-pxa/include/mach/hardware.h # define __PREG(x) (io_v2p((u32)&(x))) x 51 arch/arm/mach-pxa/include/mach/hardware.h # define __REG(x) io_p2v(x) x 52 arch/arm/mach-pxa/include/mach/hardware.h # define __PREG(x) io_v2p(x) x 14 arch/arm/mach-pxa/include/mach/irqs.h #define PXA_ISA_IRQ(x) (x) x 15 arch/arm/mach-pxa/include/mach/irqs.h #define PXA_IRQ(x) (NR_IRQS_LEGACY + (x)) x 84 arch/arm/mach-pxa/include/mach/irqs.h #define PXA_GPIO_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) x 16 arch/arm/mach-pxa/include/mach/lubbock.h #define LUB_P2V(x) ((x) - LUBBOCK_FPGA_PHYS + LUBBOCK_FPGA_VIRT) x 17 arch/arm/mach-pxa/include/mach/lubbock.h #define LUB_V2P(x) ((x) - LUBBOCK_FPGA_VIRT + LUBBOCK_FPGA_PHYS) x 20 arch/arm/mach-pxa/include/mach/lubbock.h # define __LUB_REG(x) (*((volatile unsigned long *)LUB_P2V(x))) x 22 arch/arm/mach-pxa/include/mach/lubbock.h # define __LUB_REG(x) LUB_P2V(x) x 39 arch/arm/mach-pxa/include/mach/lubbock.h #define LUBBOCK_IRQ(x) (LUBBOCK_NR_IRQS + (x)) x 19 arch/arm/mach-pxa/include/mach/mainstone.h #define MST_P2V(x) ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT) x 20 arch/arm/mach-pxa/include/mach/mainstone.h #define MST_V2P(x) ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS) x 23 arch/arm/mach-pxa/include/mach/mainstone.h # define __MST_REG(x) (*((volatile unsigned long *)MST_P2V(x))) x 25 arch/arm/mach-pxa/include/mach/mainstone.h # define __MST_REG(x) MST_P2V(x) x 126 arch/arm/mach-pxa/include/mach/mainstone.h #define MAINSTONE_IRQ(x) (MAINSTONE_NR_IRQS + (x)) x 25 arch/arm/mach-pxa/include/mach/mtd-xip.h #define xip_elapsed_since(x) (signed)((readl(OSCR) - (x)) / 4) x 40 arch/arm/mach-pxa/include/mach/pxa2xx-regs.h #define PCMD(x) __REG2(0x40F00080, (x)<<2) x 35 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define PCMD(x) __REG(0x40F50110 + ((x) << 2)) x 148 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define ACCR_SMCFS(x) (((x) & 0x7) << 23) x 149 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define ACCR_SFLFS(x) (((x) & 0x3) << 18) x 150 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define ACCR_XSPCLK(x) (((x) & 0x3) << 16) x 151 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define ACCR_HSS(x) (((x) & 0x3) << 14) x 152 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define ACCR_DMCFS(x) (((x) & 0x3) << 12) x 153 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define ACCR_XN(x) (((x) & 0x7) << 8) x 154 arch/arm/mach-pxa/include/mach/pxa3xx-regs.h #define ACCR_XL(x) ((x) & 0x1f) x 38 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR3_BPP(x) ((((x) & 0x7) << 24) | (((x) & 0x8) ? (1 << 29) : 0)) x 138 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ x 139 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR5_BSM(x) (1 << ((x) + 15)) /* branch mask */ x 140 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR5_EOFM(x) (1 << ((x) + 7)) /* end of frame mask */ x 141 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR5_SOFM(x) (1 << ((x) + 0)) /* start of frame mask */ x 157 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCSR1_IU(x) (1 << ((x) + 23)) /* Input FIFO underrun */ x 158 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCSR1_BS(x) (1 << ((x) + 15)) /* Branch Status */ x 159 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCSR1_EOF(x) (1 << ((x) + 7)) /* End of Frame Status */ x 160 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCSR1_SOF(x) (1 << ((x) - 1)) /* Start of Frame Status */ x 165 arch/arm/mach-pxa/include/mach/regs-lcd.h #define OVLxC1_PPL(x) ((((x) - 1) & 0x3ff) << 0) /* Pixels Per Line */ x 166 arch/arm/mach-pxa/include/mach/regs-lcd.h #define OVLxC1_LPO(x) ((((x) - 1) & 0x3ff) << 10) /* Number of Lines */ x 167 arch/arm/mach-pxa/include/mach/regs-lcd.h #define OVLxC1_BPP(x) (((x) & 0xf) << 20) /* Bits Per Pixel */ x 169 arch/arm/mach-pxa/include/mach/regs-lcd.h #define OVLxC2_XPOS(x) (((x) & 0x3ff) << 0) /* Horizontal Position */ x 170 arch/arm/mach-pxa/include/mach/regs-lcd.h #define OVLxC2_YPOS(x) (((x) & 0x3ff) << 10) /* Vertical Position */ x 171 arch/arm/mach-pxa/include/mach/regs-lcd.h #define OVL2C2_PFOR(x) (((x) & 0x7) << 20) /* Pixel Format */ x 174 arch/arm/mach-pxa/include/mach/regs-lcd.h #define PRSR_DATA(x) ((x) & 0xff) /* Panel Data */ x 189 arch/arm/mach-pxa/include/mach/regs-lcd.h #define SMART_CMD(x) (SMART_CMD_WRITE_COMMAND | ((x) & 0xff)) x 190 arch/arm/mach-pxa/include/mach/regs-lcd.h #define SMART_DAT(x) (SMART_CMD_WRITE_DATA | ((x) & 0xff)) x 84 arch/arm/mach-pxa/include/mach/trizeps4.h #define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) x 85 arch/arm/mach-pxa/include/mach/trizeps4.h #define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) x 87 arch/arm/mach-pxa/include/mach/trizeps4.h #define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) x 88 arch/arm/mach-pxa/include/mach/trizeps4.h #define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) x 90 arch/arm/mach-pxa/include/mach/trizeps4.h #define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) x 91 arch/arm/mach-pxa/include/mach/trizeps4.h #define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) x 93 arch/arm/mach-pxa/include/mach/trizeps4.h #define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) x 94 arch/arm/mach-pxa/include/mach/trizeps4.h #define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) x 10 arch/arm/mach-pxa/littleton.h #define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) x 19 arch/arm/mach-pxa/lpd270.h #define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x)) x 34 arch/arm/mach-pxa/lpd270.h #define LPD270_IRQ(x) (IRQ_BOARD_START + (x)) x 25 arch/arm/mach-pxa/mfp-pxa2xx.c #define PGSR(x) __REG2(0x40F00020, (x) << 2) x 26 arch/arm/mach-pxa/mfp-pxa2xx.c #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3) x 27 arch/arm/mach-pxa/mfp-pxa2xx.c #define GAFR_L(x) __GAFR(0, x) x 28 arch/arm/mach-pxa/mfp-pxa2xx.c #define GAFR_U(x) __GAFR(1, x) x 31 arch/arm/mach-pxa/mfp-pxa2xx.c #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) x 32 arch/arm/mach-pxa/mfp-pxa2xx.c #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) x 33 arch/arm/mach-pxa/mfp-pxa2xx.c #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18) x 34 arch/arm/mach-pxa/mfp-pxa2xx.c #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24) x 27 arch/arm/mach-pxa/mfp-pxa2xx.h #define MFP_DIR(x) (((x) >> 23) & 0x1) x 372 arch/arm/mach-pxa/mxm8x10.c #define NB(x) (NAND_BLOCK_SIZE * (x)) x 16 arch/arm/mach-pxa/pcm027.h #define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) x 127 arch/arm/mach-pxa/pcm990_baseboard.h #define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE) x 128 arch/arm/mach-pxa/pcm990_baseboard.h #define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS) x 38 arch/arm/mach-pxa/pm.h #define lubbock_set_hexled(x) x 49 arch/arm/mach-pxa/pxa25x.c #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x x 50 arch/arm/mach-pxa/pxa25x.c #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] x 101 arch/arm/mach-pxa/pxa27x-udc.h #define UP2OCR_SEOS(x) ((x & 7) << 24) /* Single-Ended Output Select */ x 103 arch/arm/mach-pxa/pxa27x-udc.h #define UDCCSN(x) __REG2(0x40600100, (x) << 2) x 150 arch/arm/mach-pxa/pxa27x-udc.h #define UDCBCN(x) __REG2(0x40600200, (x)<<2) x 176 arch/arm/mach-pxa/pxa27x-udc.h #define UDCDN(x) __REG2(0x40600300, (x)<<2) x 177 arch/arm/mach-pxa/pxa27x-udc.h #define PHYS_UDCDN(x) (0x40600300 + ((x)<<2)) x 178 arch/arm/mach-pxa/pxa27x-udc.h #define PUDCDN(x) (volatile u32 *)(io_p2v(PHYS_UDCDN((x)))) x 204 arch/arm/mach-pxa/pxa27x-udc.h #define UDCCN(x) __REG2(0x40600400, (x)<<2) x 80 arch/arm/mach-pxa/pxa27x.c #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x x 81 arch/arm/mach-pxa/pxa27x.c #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] x 125 arch/arm/mach-pxa/regs-u2d.h #define U2DCSR(x) (0x0100 + ((x) << 2)) /* U2D Control/Status Register - Endpoint x */ x 141 arch/arm/mach-pxa/regs-u2d.h #define U2DBCR(x) (0x0200 + ((x) << 2)) /* U2D Byte Count Register - Endpoint x */ x 145 arch/arm/mach-pxa/regs-u2d.h #define U2DEPCR(x) (0x0400 + ((x) << 2)) /* U2D Configuration Register - Endpoint x */ x 153 arch/arm/mach-pxa/regs-u2d.h #define U2DEN(x) (0x0504 + ((x) << 2)) /* U2D Endpoint Information Register - Endpoint x */ x 157 arch/arm/mach-pxa/regs-u2d.h #define U2DMACSR(x) (0x1000 + ((x) << 2)) /* U2DMA Control/Status Register - Channel x */ x 180 arch/arm/mach-pxa/regs-u2d.h #define U2DMABR(x) (0x1100 + (x) << 2) /* U2DMA Branch Register - Channel x */ x 183 arch/arm/mach-pxa/regs-u2d.h #define U2DMADADR(x) (0x1200 + (x) * 0x10) /* U2DMA Descriptor Address Register - Channel x */ x 188 arch/arm/mach-pxa/regs-u2d.h #define U2DMASADR(x) (0x1204 + (x) * 0x10) /* U2DMA Source Address Register - Channel x */ x 190 arch/arm/mach-pxa/regs-u2d.h #define U2DMATADR(x) (0x1208 + (x) * 0x10) /* U2DMA Target Address Register - Channel x */ x 193 arch/arm/mach-pxa/regs-u2d.h #define U2DMACMDR(x) (0x120C + (x) * 0x10) /* U2DMA Command Address Register - Channel x */ x 53 arch/arm/mach-pxa/viper.h #define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE) x 54 arch/arm/mach-pxa/viper.h #define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS) x 57 arch/arm/mach-pxa/viper.h # define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x))) x 78 arch/arm/mach-pxa/viper.h #define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7) x 79 arch/arm/mach-pxa/viper.h #define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3) x 80 arch/arm/mach-pxa/viper.h #define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7) x 56 arch/arm/mach-pxa/zeus.h #define ZEUS_EXT0_GPIO(x) (ZEUS_EXT0_GPIO_BASE + (x)) x 57 arch/arm/mach-pxa/zeus.h #define ZEUS_EXT1_GPIO(x) (ZEUS_EXT1_GPIO_BASE + (x)) x 58 arch/arm/mach-pxa/zeus.h #define ZEUS_USER_GPIO(x) (ZEUS_USER_GPIO_BASE + (x)) x 7 arch/arm/mach-pxa/zylonite.h #define EXT_GPIO(x) (128 + (x)) x 50 arch/arm/mach-rpc/ecard.h #define c_id(x) ((x)->r_id) x 51 arch/arm/mach-rpc/ecard.h #define c_len(x) ((x)->r_len[0]|((x)->r_len[1]<<8)|((x)->r_len[2]<<16)) x 52 arch/arm/mach-rpc/ecard.h #define c_start(x) ((x)->r_start) x 79 arch/arm/mach-rpc/include/mach/uncompress.h int x,y; x 82 arch/arm/mach-rpc/include/mach/uncompress.h x = video_x; x 89 arch/arm/mach-rpc/include/mach/uncompress.h x = 0; x 91 arch/arm/mach-rpc/include/mach/uncompress.h ptr = VIDMEM + ((y*video_num_cols*bytes_per_char_v+x)*bytes_per_char_h); x 93 arch/arm/mach-rpc/include/mach/uncompress.h if (++x >= video_num_cols) { x 94 arch/arm/mach-rpc/include/mach/uncompress.h x = 0; x 101 arch/arm/mach-rpc/include/mach/uncompress.h video_x = x; x 123 arch/arm/mach-rpc/include/mach/uncompress.h video_x = t->u.videotext.x; x 33 arch/arm/mach-s3c24xx/anubis.h #define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000)) x 23 arch/arm/mach-s3c24xx/bast-irq.c #define irqdbf(x...) x 24 arch/arm/mach-s3c24xx/bast-irq.c #define irqdbf2(x...) x 73 arch/arm/mach-s3c24xx/bast.h #define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) x 28 arch/arm/mach-s3c24xx/h1940.h #define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x)) x 25 arch/arm/mach-s3c24xx/include/mach/io.h #define __PORT_PCIO(x) ((x) < (1<<28)) x 19 arch/arm/mach-s3c24xx/include/mach/irqs.h #define S3C2410_IRQ(x) ((x) + S3C2410_CPUIRQ_OFFSET) x 83 arch/arm/mach-s3c24xx/include/mach/irqs.h #define IRQ_EINT_BIT(x) ((x) - IRQ_EINT4 + 4) x 84 arch/arm/mach-s3c24xx/include/mach/irqs.h #define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x))) x 94 arch/arm/mach-s3c24xx/include/mach/irqs.h #define S3C2410_IRQSUB(x) S3C2410_IRQ((x)+58) x 139 arch/arm/mach-s3c24xx/include/mach/irqs.h #define S3C2416_IRQ(x) S3C2410_IRQ((x) + 58 + 29) x 12 arch/arm/mach-s3c24xx/include/mach/regs-clock.h #define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) x 47 arch/arm/mach-s3c24xx/include/mach/regs-clock.h #define S3C2410_CLKSLOW_SLOWVAL(x) (x) x 48 arch/arm/mach-s3c24xx/include/mach/regs-clock.h #define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) x 28 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO) x 29 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C24XX_GPIOREG2(x) ((x) + S3C24XX_VA_GPIO2) x 109 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_GPB_PUPDIS(x) (1<<(x)) x 136 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_GPC_PUPDIS(x) (1<<(x)) x 190 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_GPD_PUPDIS(x) (1<<(x)) x 267 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_GPE_PUPDIS(x) (1<<(x)) x 294 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_GPF_PUPDIS(x) (1<<(x)) x 359 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_GPG_PUPDIS(x) (1<<(x)) x 533 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2410_EINTFLT_WIDTHMSK(x) ((x) & 0x3f) x 593 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) x 594 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2)) x 595 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) x 596 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2412_SLPCON_PULL(x) ( 0x03 << ((x) * 2)) x 597 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2412_SLPCON_EINT(x) ( 0x02 << ((x) * 2)) /* only IRQ pins */ x 598 arch/arm/mach-s3c24xx/include/mach/regs-gpio.h #define S3C2412_SLPCON_MASK(x) ( 0x03 << ((x) * 2)) x 13 arch/arm/mach-s3c24xx/include/mach/regs-irq.h #define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) x 14 arch/arm/mach-s3c24xx/include/mach/regs-irq.h #define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO) x 15 arch/arm/mach-s3c24xx/include/mach/regs-irq.h #define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2) x 10 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDREG(x) (x) x 19 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) x 43 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON2_VBPD(x) ((x) << 24) x 44 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) x 45 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON2_VFPD(x) ((x) << 6) x 46 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON2_VSPW(x) ((x) << 0) x 48 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) x 49 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) x 50 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) x 52 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON3_HBPD(x) ((x) << 19) x 53 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON3_WDLY(x) ((x) << 19) x 54 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8) x 55 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON3_HFPD(x) ((x) << 0) x 56 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0) x 58 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F) x 59 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF) x 63 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON4_MVAL(x) ((x) << 8) x 64 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON4_HSPW(x) ((x) << 0) x 65 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON4_WLH(x) ((x) << 0) x 67 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF) x 88 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDBANK(x) ((x) << 21) x 89 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_LCDBASEU(x) (x) x 91 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_OFFSIZE(x) ((x) << 11) x 92 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_PAGEWIDTH(x) (x) x 122 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2410_TFTPAL(x) S3C2410_LCDREG((0x400 + (x)*4)) x 139 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2412_REDLUT(x) S3C2410_LCDREG(0x44 + ((x)*4)) x 140 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2412_GREENLUT(x) S3C2410_LCDREG(0x60 + ((x)*4)) x 141 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2412_BLUELUT(x) S3C2410_LCDREG(0x98 + ((x)*4)) x 143 arch/arm/mach-s3c24xx/include/mach/regs-lcd.h #define S3C2412_FRCPAT(x) S3C2410_LCDREG(0xB4 + ((x)*4)) x 13 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h #define S3C2443_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) x 11 arch/arm/mach-s3c24xx/include/mach/s3c2412.h #define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) x 12 arch/arm/mach-s3c24xx/include/mach/s3c2412.h #define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x)) x 14 arch/arm/mach-s3c24xx/include/mach/s3c2412.h #define S3C2412_SSMCREG(x) (S3C2412_VA_SSMC + (x)) x 15 arch/arm/mach-s3c24xx/include/mach/s3c2412.h #define S3C2412_SSMC(x, o) (S3C2412_SSMCREG((x * 0x20) + (o))) x 21 arch/arm/mach-s3c24xx/include/mach/s3c2412.h #define S3C2412_SSMC_BANK(x) S3C2412_SSMC(x, 0x0) x 24 arch/arm/mach-s3c24xx/iotiming-s3c2410.c #define print_ns(x) ((x) / 10), ((x) % 10) x 31 arch/arm/mach-s3c24xx/iotiming-s3c2412.c #define print_ns(x) ((x) / 10), ((x) % 10) x 70 arch/arm/mach-s3c24xx/mach-h1940.c #define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END)) x 311 arch/arm/mach-s3c24xx/mach-jive.c #define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) x 312 arch/arm/mach-s3c24xx/mach-jive.c #define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) x 191 arch/arm/mach-s3c24xx/mach-mini2440.c #define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) x 192 arch/arm/mach-s3c24xx/mach-mini2440.c #define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) x 134 arch/arm/mach-s3c24xx/mach-vr1000.c #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5)) x 29 arch/arm/mach-s3c24xx/osiris.h #define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) x 12 arch/arm/mach-s3c24xx/regs-mem.h #define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) x 10 arch/arm/mach-s3c24xx/s3c2412-power.h #define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR) x 28 arch/arm/mach-s3c24xx/vr1000.h #define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) x 26 arch/arm/mach-s3c64xx/include/mach/irqs.h #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) x 33 arch/arm/mach-s3c64xx/include/mach/irqs.h #define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x)) x 34 arch/arm/mach-s3c64xx/include/mach/irqs.h #define S3C64XX_IRQ_VIC1(x) (IRQ_VIC1_BASE + (x)) x 121 arch/arm/mach-s3c64xx/include/mach/irqs.h #define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) x 122 arch/arm/mach-s3c64xx/include/mach/irqs.h #define IRQ_EINT(x) S3C_EINT(x) x 123 arch/arm/mach-s3c64xx/include/mach/irqs.h #define IRQ_EINT_BIT(x) ((x) - S3C_EINT(0)) x 30 arch/arm/mach-s3c64xx/include/mach/map.h #define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000)) x 43 arch/arm/mach-s3c64xx/include/mach/map.h #define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET)) x 18 arch/arm/mach-s3c64xx/include/mach/regs-clock.h #define S3C_CLKREG(x) (S3C_VA_SYS + (x)) x 149 arch/arm/mach-s3c64xx/include/mach/regs-gpio.h #define S3C64XX_PRIORITY_ARB(x) (1 << (x)) x 14 arch/arm/mach-s3c64xx/regs-modem.h #define S3C64XX_MODEMREG(x) (S3C64XX_VA_MODEM + (x)) x 11 arch/arm/mach-s3c64xx/regs-srom.h #define S3C64XX_SROMREG(x) (S3C_VA_MEM + (x)) x 14 arch/arm/mach-s3c64xx/regs-sys.h #define S3C_SYSREG(x) (S3C_VA_SYS + (x)) x 21 arch/arm/mach-s3c64xx/regs-usb-hsotg-phy.h #define S3C_HSOTG_PHYREG(x) ((x) + S3C_VA_USB_HSPHY) x 14 arch/arm/mach-s5pv210/regs-clock.h #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) x 70 arch/arm/mach-sa1100/include/mach/assabet.h #define ASSABET_BCR_frob(x,y) do { } while (0) x 75 arch/arm/mach-sa1100/include/mach/assabet.h #define ASSABET_BCR_set(x) ASSABET_BCR_frob((x), (x)) x 76 arch/arm/mach-sa1100/include/mach/assabet.h #define ASSABET_BCR_clear(x) ASSABET_BCR_frob((x), 0) x 35 arch/arm/mach-sa1100/include/mach/hardware.h #define io_p2v( x ) \ x 36 arch/arm/mach-sa1100/include/mach/hardware.h IOMEM( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE ) x 37 arch/arm/mach-sa1100/include/mach/hardware.h #define io_v2p( x ) \ x 38 arch/arm/mach-sa1100/include/mach/hardware.h ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) x 40 arch/arm/mach-sa1100/include/mach/hardware.h #define __MREG(x) IOMEM(io_p2v(x)) x 44 arch/arm/mach-sa1100/include/mach/hardware.h # define __REG(x) (*((volatile unsigned long __iomem *)io_p2v(x))) x 45 arch/arm/mach-sa1100/include/mach/hardware.h # define __PREG(x) (io_v2p((unsigned long)&(x))) x 49 arch/arm/mach-sa1100/include/mach/hardware.h # define __REG(x) io_p2v(x) x 50 arch/arm/mach-sa1100/include/mach/hardware.h # define __PREG(x) io_v2p(x) x 21 arch/arm/mach-sa1100/include/mach/mtd-xip.h #define xip_elapsed_since(x) (signed)((readl_relaxed(OSCR) - (x)) / 4) x 12 arch/arm/mach-sa1100/include/mach/uncompress.h #define IOMEM(x) (x) x 21 arch/arm/mach-sa1100/include/mach/uncompress.h #define UART(x) (*(volatile unsigned long *)(serial_port + (x))) x 57 arch/arm/mach-sa1100/neponset.c #define to_neponset_gpio_chip(x) container_of(x, struct neponset_gpio_chip, gc) x 38 arch/arm/mach-sa1100/pm.c #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x x 39 arch/arm/mach-sa1100/pm.c #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] x 187 arch/arm/mach-shmobile/platsmp-apmu.c u32 x; x 198 arch/arm/mach-shmobile/platsmp-apmu.c x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS); x 199 arch/arm/mach-shmobile/platsmp-apmu.c x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN; x 200 arch/arm/mach-shmobile/platsmp-apmu.c writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS); x 23 arch/arm/mach-spear/pl080.c static spinlock_t lock = __SPIN_LOCK_UNLOCKED(x); x 39 arch/arm/mach-spear/time.c #define CR(x) ((x) * 0x80 + 0x80) x 40 arch/arm/mach-spear/time.c #define IR(x) ((x) * 0x80 + 0x84) x 41 arch/arm/mach-spear/time.c #define LOAD(x) ((x) * 0x80 + 0x88) x 42 arch/arm/mach-spear/time.c #define COUNT(x) ((x) * 0x80 + 0x8C) x 23 arch/arm/mach-tegra/reset.h #define RESET_DATA(x) ((TEGRA_RESET_##x)*4) x 184 arch/arm/mach-ux500/db8500-regs.h #define IO_ADDRESS(x) \ x 185 arch/arm/mach-ux500/db8500-regs.h (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) x 193 arch/arm/mach-ux500/db8500-regs.h #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) x 25 arch/arm/mach-versatile/versatile_dt.c #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) x 15 arch/arm/mm/physaddr.c static inline bool __virt_addr_valid(unsigned long x) x 21 arch/arm/mm/physaddr.c if (!high_memory && x >= PAGE_OFFSET) x 24 arch/arm/mm/physaddr.c if (high_memory && x >= PAGE_OFFSET && x < (unsigned long)high_memory) x 32 arch/arm/mm/physaddr.c if (x == MAX_DMA_ADDRESS) x 38 arch/arm/mm/physaddr.c phys_addr_t __virt_to_phys(unsigned long x) x 40 arch/arm/mm/physaddr.c WARN(!__virt_addr_valid(x), x 42 arch/arm/mm/physaddr.c (void *)x, (void *)x); x 44 arch/arm/mm/physaddr.c return __virt_to_phys_nodebug(x); x 48 arch/arm/mm/physaddr.c phys_addr_t __phys_addr_symbol(unsigned long x) x 53 arch/arm/mm/physaddr.c VIRTUAL_BUG_ON(x < (unsigned long)KERNEL_START || x 54 arch/arm/mm/physaddr.c x > (unsigned long)KERNEL_END); x 56 arch/arm/mm/physaddr.c return __pa_symbol_nodebug(x); x 110 arch/arm/net/bpf_jit_32.c #define EBPF_SCRATCH_TO_ARM_FP(x) ((x) - 4 * hweight16(CALLEE_PUSH_MASK) - 4) x 112 arch/arm/net/bpf_jit_32.c #define EBPF_SCRATCH_TO_ARM_FP(x) (x) x 245 arch/arm/net/bpf_jit_32.c #define const_imm8m(x) \ x 247 arch/arm/net/bpf_jit_32.c u32 v = (x); \ x 287 arch/arm/net/bpf_jit_32.c static int imm8m(u32 x) x 292 arch/arm/net/bpf_jit_32.c if ((x & ~ror32(0xff, 2 * rot)) == 0) x 293 arch/arm/net/bpf_jit_32.c return rol32(x, 2 * rot) | (rot << 8); x 297 arch/arm/net/bpf_jit_32.c #define imm8m(x) (__builtin_constant_p(x) ? const_imm8m(x) : imm8m(x)) x 63 arch/arm/nwfpe/fpa11_cpdt.c unsigned long x; x 66 arch/arm/nwfpe/fpa11_cpdt.c get_user(x, &pMem[0]); x 67 arch/arm/nwfpe/fpa11_cpdt.c fpa11->fType[Fn] = (x >> 14) & 0x00000003; x 84 arch/arm/nwfpe/fpa11_cpdt.c p[0] = (x & 0x80003fff); x 14 arch/arm/plat-orion/include/plat/mpp.h #define MPP_NUM(x) ((x) & 0xff) x 15 arch/arm/plat-orion/include/plat/mpp.h #define MPP_SEL(x) (((x) >> 8) & 0xf) x 355 arch/arm/plat-pxa/include/plat/mfp.h #define MFP_PIN(x) ((x) & 0x3ff) x 366 arch/arm/plat-pxa/include/plat/mfp.h #define MFP_AF(x) (((x) >> 10) & 0x7) x 377 arch/arm/plat-pxa/include/plat/mfp.h #define MFP_DS(x) (((x) >> 13) & 0x7) x 387 arch/arm/plat-pxa/include/plat/mfp.h #define MFP_LPM_STATE(x) (((x) >> 16) & 0x7) x 394 arch/arm/plat-pxa/include/plat/mfp.h #define MFP_LPM_EDGE(x) (((x) >> 19) & 0x3) x 402 arch/arm/plat-pxa/include/plat/mfp.h #define MFP_PULL(x) (((x) >> 21) & 0x7) x 32 arch/arm/plat-pxa/mfp.c #define MFPR_SLEEP_DATA(x) ((x) << 8) x 33 arch/arm/plat-pxa/mfp.c #define MFPR_DRIVE(x) (((x) & 0x7) << 10) x 34 arch/arm/plat-pxa/mfp.c #define MFPR_AF_SEL(x) (((x) & 0x7) << 0) x 200 arch/arm/plat-samsung/include/plat/cpu-freq-core.h #define s3c_cpufreq_debugfs_call(x) x x 202 arch/arm/plat-samsung/include/plat/cpu-freq-core.h #define s3c_cpufreq_debugfs_call(x) NULL x 257 arch/arm/plat-samsung/include/plat/cpu-freq-core.h #define s3c_freq_dbg(x...) printk(KERN_INFO x) x 259 arch/arm/plat-samsung/include/plat/cpu-freq-core.h #define s3c_freq_dbg(x...) do { if (0) printk(x); } while (0) x 263 arch/arm/plat-samsung/include/plat/cpu-freq-core.h #define s3c_freq_iodbg(x...) printk(KERN_INFO x) x 265 arch/arm/plat-samsung/include/plat/cpu-freq-core.h #define s3c_freq_iodbg(x...) do { if (0) printk(x); } while (0) x 74 arch/arm/plat-samsung/include/plat/cpu.h #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } x 62 arch/arm/plat-samsung/include/plat/gpio-cfg.h #define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x)) x 67 arch/arm/plat-samsung/include/plat/gpio-cfg.h #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x)) x 129 arch/arm/plat-samsung/include/plat/gpio-core.h #define __gpio_pm(x) x x 134 arch/arm/plat-samsung/include/plat/gpio-core.h #define __gpio_pm(x) NULL x 24 arch/arm/plat-samsung/include/plat/map-base.h #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) x 26 arch/arm/plat-samsung/include/plat/map-base.h #define S3C_ADDR(x) (S3C_ADDR_BASE + (x)) x 40 arch/arm/plat-samsung/include/plat/map-base.h #define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x)) x 53 arch/arm/plat-samsung/include/plat/map-s3c.h #define S3C2410_ADDR(x) S3C_ADDR(x) x 14 arch/arm/plat-samsung/include/plat/map-s5p.h #define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) x 30 arch/arm/plat-samsung/include/plat/pm-common.h #define SAVE_ITEM(x) \ x 31 arch/arm/plat-samsung/include/plat/pm-common.h { .reg = (x) } x 11 arch/arm/plat-samsung/include/plat/regs-adc.h #define S3C2410_ADCREG(x) (x) x 29 arch/arm/plat-samsung/include/plat/regs-adc.h #define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) x 31 arch/arm/plat-samsung/include/plat/regs-adc.h #define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) x 48 arch/arm/plat-samsung/include/plat/regs-adc.h #define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0) x 9 arch/arm/plat-samsung/include/plat/regs-udc.h #define S3C2410_USBDREG(x) (x) x 24 arch/arm/plat-samsung/watchdog-reset.c #define S3C2410_WTCON_PRESCALE(x) ((x) << 8) x 19 arch/arm/probes/decode-arm.c #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit))))) x 1052 arch/arm/probes/kprobes/test-core.c unsigned x = (scenario >> 4); x 1053 arch/arm/probes/kprobes/test-core.c unsigned cond_base = x % 7; /* ITSTATE<7:5> */ x 1054 arch/arm/probes/kprobes/test-core.c unsigned mask = x / 7 + 2; /* ITSTATE<4:0>, bits reversed */ x 425 arch/arm/probes/kprobes/test-core.h #define TWICE(x) x x x 48 arch/arm/vdso/vdsomunge.c #define swab16(x) \ x 49 arch/arm/vdso/vdsomunge.c ((((x) & 0x00ff) << 8) | \ x 50 arch/arm/vdso/vdsomunge.c (((x) & 0xff00) >> 8)) x 52 arch/arm/vdso/vdsomunge.c #define swab32(x) \ x 53 arch/arm/vdso/vdsomunge.c ((((x) & 0x000000ff) << 24) | \ x 54 arch/arm/vdso/vdsomunge.c (((x) & 0x0000ff00) << 8) | \ x 55 arch/arm/vdso/vdsomunge.c (((x) & 0x00ff0000) >> 8) | \ x 56 arch/arm/vdso/vdsomunge.c (((x) & 0xff000000) >> 24)) x 1124 arch/arm/vfp/vfpdouble.c #define FREG_BANK(x) ((x) & 0x0c) x 1125 arch/arm/vfp/vfpdouble.c #define FREG_IDX(x) ((x) & 3) x 1169 arch/arm/vfp/vfpsingle.c #define FREG_BANK(x) ((x) & 0x18) x 1170 arch/arm/vfp/vfpsingle.c #define FREG_IDX(x) ((x) & 7) x 803 arch/arm64/crypto/aes-glue.c static void cmac_gf128_mul_by_x(be128 *y, const be128 *x) x 805 arch/arm64/crypto/aes-glue.c u64 a = be64_to_cpu(x->a); x 806 arch/arm64/crypto/aes-glue.c u64 b = be64_to_cpu(x->b); x 145 arch/arm64/include/asm/assembler.h #define USER(l, x...) \ x 146 arch/arm64/include/asm/assembler.h 9999: x; \ x 468 arch/arm64/include/asm/assembler.h #define ENDPIPROC(x) \ x 469 arch/arm64/include/asm/assembler.h .globl __pi_##x; \ x 470 arch/arm64/include/asm/assembler.h .type __pi_##x, %function; \ x 471 arch/arm64/include/asm/assembler.h .set __pi_##x, x; \ x 472 arch/arm64/include/asm/assembler.h .size __pi_##x, . - x; \ x 473 arch/arm64/include/asm/assembler.h ENDPROC(x) x 479 arch/arm64/include/asm/assembler.h #define NOKPROBE(x) \ x 481 arch/arm64/include/asm/assembler.h .quad x; \ x 484 arch/arm64/include/asm/assembler.h #define NOKPROBE(x) x 367 arch/arm64/include/asm/atomic_lse.h __CMPXCHG_CASE(x, , , 64, ) x 371 arch/arm64/include/asm/atomic_lse.h __CMPXCHG_CASE(x, , acq_, 64, a, "memory") x 375 arch/arm64/include/asm/atomic_lse.h __CMPXCHG_CASE(x, , rel_, 64, l, "memory") x 379 arch/arm64/include/asm/atomic_lse.h __CMPXCHG_CASE(x, , mb_, 64, al, "memory") x 4 arch/arm64/include/asm/bitrev.h static __always_inline __attribute_const__ u32 __arch_bitrev32(u32 x) x 6 arch/arm64/include/asm/bitrev.h __asm__ ("rbit %w0, %w1" : "=r" (x) : "r" (x)); x 7 arch/arm64/include/asm/bitrev.h return x; x 10 arch/arm64/include/asm/bitrev.h static __always_inline __attribute_const__ u16 __arch_bitrev16(u16 x) x 12 arch/arm64/include/asm/bitrev.h return __arch_bitrev32((u32)x) >> 16; x 15 arch/arm64/include/asm/bitrev.h static __always_inline __attribute_const__ u8 __arch_bitrev8(u8 x) x 17 arch/arm64/include/asm/bitrev.h return __arch_bitrev32((u32)x) >> 24; x 22 arch/arm64/include/asm/cmpxchg.h static inline u##sz __xchg_case_##name##sz(u##sz x, volatile void *ptr) \ x 39 arch/arm64/include/asm/cmpxchg.h : "r" (x) \ x 65 arch/arm64/include/asm/cmpxchg.h static __always_inline unsigned long __xchg##sfx(unsigned long x, \ x 71 arch/arm64/include/asm/cmpxchg.h return __xchg_case##sfx##_8(x, ptr); \ x 73 arch/arm64/include/asm/cmpxchg.h return __xchg_case##sfx##_16(x, ptr); \ x 75 arch/arm64/include/asm/cmpxchg.h return __xchg_case##sfx##_32(x, ptr); \ x 77 arch/arm64/include/asm/cmpxchg.h return __xchg_case##sfx##_64(x, ptr); \ x 92 arch/arm64/include/asm/cmpxchg.h #define __xchg_wrapper(sfx, ptr, x) \ x 96 arch/arm64/include/asm/cmpxchg.h __xchg##sfx((unsigned long)(x), (ptr), sizeof(*(ptr))); \ x 15 arch/arm64/include/asm/cpufeature.h #define cpu_feature(x) KERNEL_HWCAP_ ## x x 24 arch/arm64/include/asm/debug-monitors.h #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7) x 25 arch/arm64/include/asm/dmi.h #define dmi_early_remap(x, l) ioremap_cache(x, l) x 26 arch/arm64/include/asm/dmi.h #define dmi_early_unmap(x, l) iounmap(x) x 27 arch/arm64/include/asm/dmi.h #define dmi_remap(x, l) ioremap_cache(x, l) x 28 arch/arm64/include/asm/dmi.h #define dmi_unmap(x) iounmap(x) x 107 arch/arm64/include/asm/efi.h #define alloc_screen_info(x...) &screen_info x 97 arch/arm64/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_AARCH64) x 191 arch/arm64/include/asm/elf.h #define compat_elf_check_arch(x) (system_supports_32bit_el0() && \ x 192 arch/arm64/include/asm/elf.h ((x)->e_machine == EM_ARM) && \ x 193 arch/arm64/include/asm/elf.h ((x)->e_flags & EF_ARM_EABI_MASK)) x 26 arch/arm64/include/asm/fpsimdmacros.h mrs x\tmpnr, fpsr x 28 arch/arm64/include/asm/fpsimdmacros.h mrs x\tmpnr, fpcr x 63 arch/arm64/include/asm/fpsimdmacros.h msr fpsr, x\tmpnr x 65 arch/arm64/include/asm/fpsimdmacros.h fpsimd_restore_fpcr x\tmpnr, \state x 146 arch/arm64/include/asm/fpsimdmacros.h _check_general_reg \nx x 149 arch/arm64/include/asm/fpsimdmacros.h | (\nx) \ x 193 arch/arm64/include/asm/fpsimdmacros.h mrs x\nxtmp, fpsr x 195 arch/arm64/include/asm/fpsimdmacros.h mrs x\nxtmp, fpcr x 200 arch/arm64/include/asm/fpsimdmacros.h mrs_s x\nxtmp, SYS_ZCR_EL1 x 201 arch/arm64/include/asm/fpsimdmacros.h bic \xtmp2, x\nxtmp, ZCR_ELx_LEN_MASK x 203 arch/arm64/include/asm/fpsimdmacros.h cmp \xtmp2, x\nxtmp x 213 arch/arm64/include/asm/fpsimdmacros.h msr fpsr, x\nxtmp x 215 arch/arm64/include/asm/fpsimdmacros.h msr fpcr, x\nxtmp x 45 arch/arm64/include/asm/hwcap.h #define __khwcap_feature(x) const_ilog2(HWCAP_ ## x) x 79 arch/arm64/include/asm/hwcap.h #define __khwcap2_feature(x) (const_ilog2(HWCAP2_ ## x) + 32) x 121 arch/arm64/include/asm/kvm_arm.h #define VTCR_EL2_T0SZ(x) TCR_T0SZ(x) x 264 arch/arm64/include/asm/kvm_arm.h #define HSTR_EL2_T(x) (1 << x) x 315 arch/arm64/include/asm/kvm_arm.h #define ECN(x) { ESR_ELx_EC_##x, #x } x 16 arch/arm64/include/asm/kvm_asm.h #define ARM_EXCEPTION_CODE(x) ((x) & ~(1U << ARM_EXIT_WITH_SERROR_BIT)) x 17 arch/arm64/include/asm/kvm_asm.h #define ARM_EXCEPTION_IS_TRAP(x) (ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_TRAP) x 18 arch/arm64/include/asm/kvm_asm.h #define ARM_SERROR_PENDING(x) !!((x) & (1U << ARM_EXIT_WITH_SERROR_BIT)) x 365 arch/arm64/include/asm/kvm_mmu.h #define kvm_virt_to_phys(x) __pa_symbol(x) x 578 arch/arm64/include/asm/kvm_mmu.h int x = ARM64_VTTBR_X(ipa_shift, levels); x 580 arch/arm64/include/asm/kvm_mmu.h return (IS_ENABLED(CONFIG_ARM64_PA_BITS_52) && x < 6) ? 6 : x; x 585 arch/arm64/include/asm/kvm_mmu.h unsigned int x = arm64_vttbr_x(ipa_shift, levels); x 587 arch/arm64/include/asm/kvm_mmu.h return GENMASK_ULL(PHYS_MASK_SHIFT - 1, x); x 17 arch/arm64/include/asm/kvm_ptrauth.h #define PTRAUTH_REG_OFFSET(x) (x - CPU_APIAKEYLO_EL1) x 260 arch/arm64/include/asm/memory.h #define __virt_to_phys_nodebug(x) ({ \ x 261 arch/arm64/include/asm/memory.h phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \ x 265 arch/arm64/include/asm/memory.h #define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x)) x 268 arch/arm64/include/asm/memory.h extern phys_addr_t __virt_to_phys(unsigned long x); x 269 arch/arm64/include/asm/memory.h extern phys_addr_t __phys_addr_symbol(unsigned long x); x 271 arch/arm64/include/asm/memory.h #define __virt_to_phys(x) __virt_to_phys_nodebug(x) x 272 arch/arm64/include/asm/memory.h #define __phys_addr_symbol(x) __pa_symbol_nodebug(x) x 275 arch/arm64/include/asm/memory.h #define __phys_to_virt(x) ((unsigned long)((x) - physvirt_offset)) x 276 arch/arm64/include/asm/memory.h #define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset)) x 290 arch/arm64/include/asm/memory.h static inline phys_addr_t virt_to_phys(const volatile void *x) x 292 arch/arm64/include/asm/memory.h return __virt_to_phys((unsigned long)(x)); x 296 arch/arm64/include/asm/memory.h static inline void *phys_to_virt(phys_addr_t x) x 298 arch/arm64/include/asm/memory.h return (void *)(__phys_to_virt(x)); x 304 arch/arm64/include/asm/memory.h #define __pa(x) __virt_to_phys((unsigned long)(x)) x 305 arch/arm64/include/asm/memory.h #define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0)) x 306 arch/arm64/include/asm/memory.h #define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x)) x 307 arch/arm64/include/asm/memory.h #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x))) x 309 arch/arm64/include/asm/memory.h #define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x))) x 310 arch/arm64/include/asm/memory.h #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x)) x 319 arch/arm64/include/asm/memory.h #define virt_to_page(x) pfn_to_page(virt_to_pfn(x)) x 321 arch/arm64/include/asm/memory.h #define page_to_virt(x) ({ \ x 322 arch/arm64/include/asm/memory.h __typeof__(x) __page = x; \ x 328 arch/arm64/include/asm/memory.h #define virt_to_page(x) ({ \ x 329 arch/arm64/include/asm/memory.h u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \ x 213 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_T0SZ(x) ((UL(64) - (x)) << TCR_T0SZ_OFFSET) x 214 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_T1SZ(x) ((UL(64) - (x)) << TCR_T1SZ_OFFSET) x 215 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TxSZ(x) (TCR_T0SZ(x) | TCR_T1SZ(x)) x 23 arch/arm64/include/asm/pgtable-types.h #define pte_val(x) ((x).pte) x 24 arch/arm64/include/asm/pgtable-types.h #define __pte(x) ((pte_t) { (x) } ) x 28 arch/arm64/include/asm/pgtable-types.h #define pmd_val(x) ((x).pmd) x 29 arch/arm64/include/asm/pgtable-types.h #define __pmd(x) ((pmd_t) { (x) } ) x 34 arch/arm64/include/asm/pgtable-types.h #define pud_val(x) ((x).pud) x 35 arch/arm64/include/asm/pgtable-types.h #define __pud(x) ((pud_t) { (x) } ) x 39 arch/arm64/include/asm/pgtable-types.h #define pgd_val(x) ((x).pgd) x 40 arch/arm64/include/asm/pgtable-types.h #define __pgd(x) ((pgd_t) { (x) } ) x 43 arch/arm64/include/asm/pgtable-types.h #define pgprot_val(x) ((x).pgprot) x 44 arch/arm64/include/asm/pgtable-types.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 826 arch/arm64/include/asm/pgtable.h #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) x 827 arch/arm64/include/asm/pgtable.h #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK) x 110 arch/arm64/include/asm/ptrace.h #define compat_usr(x) regs[(x)] x 41 arch/arm64/include/asm/sdei.h #define sdei_arch_get_entry_point(x) sdei_arch_get_entry_point(x) x 13 arch/arm64/include/asm/syscall_wrapper.h #define SC_ARM64_REGS_TO_ARGS(x, ...) \ x 14 arch/arm64/include/asm/syscall_wrapper.h __MAP(x,__SC_ARGS \ x 20 arch/arm64/include/asm/syscall_wrapper.h #define COMPAT_SYSCALL_DEFINEx(x, name, ...) \ x 23 arch/arm64/include/asm/syscall_wrapper.h static long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 24 arch/arm64/include/asm/syscall_wrapper.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \ x 27 arch/arm64/include/asm/syscall_wrapper.h return __se_compat_sys##name(SC_ARM64_REGS_TO_ARGS(x,__VA_ARGS__)); \ x 29 arch/arm64/include/asm/syscall_wrapper.h static long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 31 arch/arm64/include/asm/syscall_wrapper.h return __do_compat_sys##name(__MAP(x,__SC_DELOUSE,__VA_ARGS__)); \ x 33 arch/arm64/include/asm/syscall_wrapper.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 51 arch/arm64/include/asm/syscall_wrapper.h #define __SYSCALL_DEFINEx(x, name, ...) \ x 54 arch/arm64/include/asm/syscall_wrapper.h static long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 55 arch/arm64/include/asm/syscall_wrapper.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \ x 58 arch/arm64/include/asm/syscall_wrapper.h return __se_sys##name(SC_ARM64_REGS_TO_ARGS(x,__VA_ARGS__)); \ x 60 arch/arm64/include/asm/syscall_wrapper.h static long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 62 arch/arm64/include/asm/syscall_wrapper.h long ret = __do_sys##name(__MAP(x,__SC_CAST,__VA_ARGS__)); \ x 63 arch/arm64/include/asm/syscall_wrapper.h __MAP(x,__SC_TEST,__VA_ARGS__); \ x 64 arch/arm64/include/asm/syscall_wrapper.h __PROTECT(x, ret,__MAP(x,__SC_ARGS,__VA_ARGS__)); \ x 67 arch/arm64/include/asm/syscall_wrapper.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 54 arch/arm64/include/asm/sysreg.h #define __emit_inst(x) .inst(x) x 56 arch/arm64/include/asm/sysreg.h #define __emit_inst(x) ".inst " __stringify((x)) "\n\t" x 62 arch/arm64/include/asm/sysreg.h #define __INSTR_BSWAP(x) (x) x 64 arch/arm64/include/asm/sysreg.h #define __INSTR_BSWAP(x) ((((x) << 24) & 0xff000000) | \ x 65 arch/arm64/include/asm/sysreg.h (((x) << 8) & 0x00ff0000) | \ x 66 arch/arm64/include/asm/sysreg.h (((x) >> 8) & 0x0000ff00) | \ x 67 arch/arm64/include/asm/sysreg.h (((x) >> 24) & 0x000000ff)) x 71 arch/arm64/include/asm/sysreg.h #define __emit_inst(x) .long __INSTR_BSWAP(x) x 73 arch/arm64/include/asm/sysreg.h #define __emit_inst(x) ".long " __stringify(__INSTR_BSWAP(x)) "\n\t" x 95 arch/arm64/include/asm/sysreg.h #define SET_PSTATE_PAN(x) __emit_inst(0xd500401f | PSTATE_PAN | ((!!x) << PSTATE_Imm_shift)) x 96 arch/arm64/include/asm/sysreg.h #define SET_PSTATE_UAO(x) __emit_inst(0xd500401f | PSTATE_UAO | ((!!x) << PSTATE_Imm_shift)) x 97 arch/arm64/include/asm/sysreg.h #define SET_PSTATE_SSBS(x) __emit_inst(0xd500401f | PSTATE_SSBS | ((!!x) << PSTATE_Imm_shift)) x 419 arch/arm64/include/asm/sysreg.h #define __SYS__AP0Rx_EL2(x) sys_reg(3, 4, 12, 8, x) x 425 arch/arm64/include/asm/sysreg.h #define __SYS__AP1Rx_EL2(x) sys_reg(3, 4, 12, 9, x) x 440 arch/arm64/include/asm/sysreg.h #define __SYS__LR0_EL2(x) sys_reg(3, 4, 12, 12, x) x 450 arch/arm64/include/asm/sysreg.h #define __SYS__LR8_EL2(x) sys_reg(3, 4, 12, 13, x) x 255 arch/arm64/include/asm/uaccess.h #define __get_user_asm(instr, alt_instr, reg, x, addr, err, feature) \ x 267 arch/arm64/include/asm/uaccess.h : "+r" (err), "=&r" (x) \ x 270 arch/arm64/include/asm/uaccess.h #define __raw_get_user(x, ptr, err) \ x 296 arch/arm64/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 299 arch/arm64/include/asm/uaccess.h #define __get_user_error(x, ptr, err) \ x 305 arch/arm64/include/asm/uaccess.h __raw_get_user((x), __p, (err)); \ x 307 arch/arm64/include/asm/uaccess.h (x) = 0; (err) = -EFAULT; \ x 311 arch/arm64/include/asm/uaccess.h #define __get_user(x, ptr) \ x 314 arch/arm64/include/asm/uaccess.h __get_user_error((x), (ptr), __gu_err); \ x 320 arch/arm64/include/asm/uaccess.h #define __put_user_asm(instr, alt_instr, reg, x, addr, err, feature) \ x 332 arch/arm64/include/asm/uaccess.h : "r" (x), "r" (addr), "i" (-EFAULT)) x 334 arch/arm64/include/asm/uaccess.h #define __raw_put_user(x, ptr, err) \ x 336 arch/arm64/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = (x); \ x 362 arch/arm64/include/asm/uaccess.h #define __put_user_error(x, ptr, err) \ x 368 arch/arm64/include/asm/uaccess.h __raw_put_user((x), __p, (err)); \ x 374 arch/arm64/include/asm/uaccess.h #define __put_user(x, ptr) \ x 377 arch/arm64/include/asm/uaccess.h __put_user_error((x), (ptr), __pu_err); \ x 10 arch/arm64/include/asm/unistd32.h #define __SYSCALL(x, y) x 203 arch/arm64/include/uapi/asm/kvm.h #define ARM64_SYS_REG_SHIFT_MASK(x,n) \ x 204 arch/arm64/include/uapi/asm/kvm.h (((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) & \ x 62 arch/arm64/kernel/alternative.c #define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1)) x 395 arch/arm64/kernel/fpsimd.c static __uint128_t arm64_cpu_to_le128(__uint128_t x) x 397 arch/arm64/kernel/fpsimd.c u64 a = swab64(x); x 398 arch/arm64/kernel/fpsimd.c u64 b = swab64(x >> 64); x 403 arch/arm64/kernel/fpsimd.c static __uint128_t arm64_cpu_to_le128(__uint128_t x) x 405 arch/arm64/kernel/fpsimd.c return x; x 409 arch/arm64/kernel/fpsimd.c #define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x) x 16 arch/arm64/kernel/hibernate.c #define pr_fmt(x) "hibernate: " x x 137 arch/arm64/kernel/module-plts.c const Elf64_Rela *x = a, *y = b; x 141 arch/arm64/kernel/module-plts.c i = cmp_3way(ELF64_R_TYPE(x->r_info), ELF64_R_TYPE(y->r_info)); x 143 arch/arm64/kernel/module-plts.c i = cmp_3way(ELF64_R_SYM(x->r_info), ELF64_R_SYM(y->r_info)); x 145 arch/arm64/kernel/module-plts.c i = cmp_3way(x->r_addend, y->r_addend); x 369 arch/arm64/kernel/perf_event.c #define ARMV8_IDX_TO_COUNTER(x) \ x 370 arch/arm64/kernel/perf_event.c (((x) - ARMV8_IDX_COUNTER0) & ARMV8_PMU_COUNTER_MASK) x 764 arch/arm64/kernel/smp.c #define S(x,s) [x] = s x 33 arch/arm64/kvm/guest.c #define VM_STAT(x) { #x, offsetof(struct kvm, stat.x), KVM_STAT_VM } x 34 arch/arm64/kvm/guest.c #define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU } x 981 arch/arm64/kvm/sys_regs.c #define reg_to_encoding(x) \ x 982 arch/arm64/kvm/sys_regs.c sys_reg((u32)(x)->Op0, (u32)(x)->Op1, \ x 983 arch/arm64/kvm/sys_regs.c (u32)(x)->CRn, (u32)(x)->CRm, (u32)(x)->Op2); x 10 arch/arm64/mm/physaddr.c phys_addr_t __virt_to_phys(unsigned long x) x 12 arch/arm64/mm/physaddr.c WARN(!__is_lm_address(x), x 14 arch/arm64/mm/physaddr.c (void *)x, x 15 arch/arm64/mm/physaddr.c (void *)x); x 17 arch/arm64/mm/physaddr.c return __virt_to_phys_nodebug(x); x 21 arch/arm64/mm/physaddr.c phys_addr_t __phys_addr_symbol(unsigned long x) x 27 arch/arm64/mm/physaddr.c VIRTUAL_BUG_ON(x < (unsigned long) KERNEL_START || x 28 arch/arm64/mm/physaddr.c x > (unsigned long) KERNEL_END); x 29 arch/arm64/mm/physaddr.c return __pa_symbol_nodebug(x); x 13 arch/arm64/net/bpf_jit.h #define A64_R(x) AARCH64_INSN_REG_##x x 29 arch/c6x/include/asm/bitops.h static inline unsigned long __ffs(unsigned long x) x 34 arch/c6x/include/asm/bitops.h : "+a"(x)); x 36 arch/c6x/include/asm/bitops.h return x; x 45 arch/c6x/include/asm/bitops.h #define ffz(x) __ffs(~(x)) x 54 arch/c6x/include/asm/bitops.h static inline int fls(unsigned int x) x 56 arch/c6x/include/asm/bitops.h if (!x) x 59 arch/c6x/include/asm/bitops.h asm (" lmbd .L1 1,%0,%0\n" : "+a"(x)); x 61 arch/c6x/include/asm/bitops.h return 32 - x; x 73 arch/c6x/include/asm/bitops.h static inline int ffs(int x) x 75 arch/c6x/include/asm/bitops.h if (!x) x 78 arch/c6x/include/asm/bitops.h return __ffs(x) + 1; x 38 arch/c6x/include/asm/cache.h #define L2_CACHE_ALIGN_LOW(x) \ x 39 arch/c6x/include/asm/cache.h (((x) & ~(L2_CACHE_BYTES - 1))) x 40 arch/c6x/include/asm/cache.h #define L2_CACHE_ALIGN_UP(x) \ x 41 arch/c6x/include/asm/cache.h (((x) + (L2_CACHE_BYTES - 1)) & ~(L2_CACHE_BYTES - 1)) x 42 arch/c6x/include/asm/cache.h #define L2_CACHE_ALIGN_CNT(x) \ x 43 arch/c6x/include/asm/cache.h (((x) + (sizeof(int) - 1)) & ~(sizeof(int) - 1)) x 52 arch/c6x/include/asm/clock.h #define PLLM_VAL(x) ((x) - 1) x 56 arch/c6x/include/asm/clock.h #define PLLPREDIV_VAL(x) ((x) - 1) x 75 arch/c6x/include/asm/clock.h #define PLLDIV_RATIO(x) ((x) - 1) x 16 arch/c6x/include/asm/cmpxchg.h static inline unsigned int __xchg(unsigned int x, volatile void *ptr, int size) x 27 arch/c6x/include/asm/cmpxchg.h *((unsigned char *) ptr) = (unsigned char) x; x 32 arch/c6x/include/asm/cmpxchg.h *((unsigned short *) ptr) = x; x 37 arch/c6x/include/asm/cmpxchg.h *((unsigned int *) ptr) = x; x 44 arch/c6x/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 45 arch/c6x/include/asm/cmpxchg.h ((__typeof__(*(ptr)))__xchg((unsigned int)(x), (void *) (ptr), \ x 28 arch/c6x/include/asm/delay.h static inline void _c6x_tickdelay(unsigned int x) x 40 arch/c6x/include/asm/delay.h : "=b"(cnt), "+a"(x), "=b"(endcnt) : : "B0"); x 61 arch/c6x/include/asm/delay.h #define udelay(x) _udelay((unsigned int)(x)) x 62 arch/c6x/include/asm/delay.h #define ndelay(x) _ndelay((unsigned int)(x)) x 28 arch/c6x/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000) x 30 arch/c6x/include/asm/elf.h #define elf_check_fdpic(x) (1) x 31 arch/c6x/include/asm/elf.h #define elf_check_const_displacement(x) (0) x 30 arch/c6x/include/asm/pgtable.h #define pmd_none(x) (!pmd_val(x)) x 31 arch/c6x/include/asm/pgtable.h #define pmd_present(x) (pmd_val(x)) x 33 arch/c6x/include/asm/pgtable.h #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) x 44 arch/c6x/include/asm/pgtable.h #define __swp_type(x) (0) x 45 arch/c6x/include/asm/pgtable.h #define __swp_offset(x) (0) x 48 arch/c6x/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 42 arch/c6x/include/asm/special_insns.h #define set_ist(x) set_creg(ISTP, x) x 54 arch/c6x/include/asm/special_insns.h #define _extu(x, s, e) \ x 57 arch/c6x/include/asm/special_insns.h "=b"(__x) : "n"(s), "n"(e), "b"(x)); \ x 40 arch/c6x/kernel/signal.c #define COPY(x) (err |= __get_user(regs->x, &sc->sc_##x)) x 105 arch/c6x/kernel/signal.c #define COPY(x) (err |= __put_user(regs->x, &sc->sc_##x)) x 166 arch/c6x/kernel/signal.c #define COPY(x) (err |= __put_user(x, retcode++)) x 132 arch/csky/abiv1/inc/abi/entry.h cprcr \rx, cpcr0 x 136 arch/csky/abiv1/inc/abi/entry.h cprcr \rx, cpcr4 x 140 arch/csky/abiv1/inc/abi/entry.h cprcr \rx, cpcr8 x 144 arch/csky/abiv1/inc/abi/entry.h cprcr \rx, cpcr29 x 148 arch/csky/abiv1/inc/abi/entry.h cpwcr \rx, cpcr4 x 152 arch/csky/abiv1/inc/abi/entry.h cpwcr \rx, cpcr8 x 180 arch/csky/abiv1/inc/abi/entry.h lsri \rx, 3 x 181 arch/csky/abiv1/inc/abi/entry.h andi \rx, (\imm >> 3) x 151 arch/csky/abiv2/inc/abi/entry.h mfcr \rx, cr<0, 15> x 155 arch/csky/abiv2/inc/abi/entry.h mfcr \rx, cr<4, 15> x 159 arch/csky/abiv2/inc/abi/entry.h mfcr \rx, cr<8, 15> x 163 arch/csky/abiv2/inc/abi/entry.h mfcr \rx, cr<29, 15> x 167 arch/csky/abiv2/inc/abi/entry.h mfcr \rx, cr<28, 15> x 171 arch/csky/abiv2/inc/abi/entry.h mtcr \rx, cr<4, 15> x 175 arch/csky/abiv2/inc/abi/entry.h mtcr \rx, cr<8, 15> x 248 arch/csky/abiv2/inc/abi/entry.h lsri \rx, 3 x 249 arch/csky/abiv2/inc/abi/entry.h andi \rx, (\imm >> 3) x 13 arch/csky/include/asm/bitops.h static inline int ffs(int x) x 15 arch/csky/include/asm/bitops.h if (!x) x 22 arch/csky/include/asm/bitops.h : "=&r"(x) x 23 arch/csky/include/asm/bitops.h : "0"(x)); x 24 arch/csky/include/asm/bitops.h return x; x 30 arch/csky/include/asm/bitops.h static __always_inline unsigned long __ffs(unsigned long x) x 35 arch/csky/include/asm/bitops.h : "=&r"(x) x 36 arch/csky/include/asm/bitops.h : "0"(x)); x 37 arch/csky/include/asm/bitops.h return x; x 43 arch/csky/include/asm/bitops.h static __always_inline int fls(unsigned int x) x 47 arch/csky/include/asm/bitops.h : "=&r"(x) x 48 arch/csky/include/asm/bitops.h : "0"(x)); x 50 arch/csky/include/asm/bitops.h return (32 - x); x 56 arch/csky/include/asm/bitops.h static __always_inline unsigned long __fls(unsigned long x) x 58 arch/csky/include/asm/bitops.h return fls(x) - 1; x 36 arch/csky/include/asm/cmpxchg.h #define xchg(ptr, x) (__xchg((x), (ptr), sizeof(*(ptr)))) x 47 arch/csky/include/asm/elf.h #define elf_check_arch(x) (((x)->e_machine == ELF_ARCH) || \ x 48 arch/csky/include/asm/elf.h ((x)->e_machine == EM_CSKY_OLD)) x 60 arch/csky/include/asm/page.h #define pte_val(x) ((x).pte_low) x 66 arch/csky/include/asm/page.h #define pgd_val(x) ((x).pgd) x 67 arch/csky/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 69 arch/csky/include/asm/page.h #define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) x 71 arch/csky/include/asm/page.h #define __pte(x) ((pte_t) { (x) }) x 72 arch/csky/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) }) x 73 arch/csky/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) }) x 79 arch/csky/include/asm/page.h #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + va_pa_offset) x 80 arch/csky/include/asm/page.h #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - va_pa_offset)) x 82 arch/csky/include/asm/page.h #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) x 84 arch/csky/include/asm/page.h #define MAP_NR(x) PFN_DOWN((unsigned long)(x) - PAGE_OFFSET - \ x 86 arch/csky/include/asm/page.h #define virt_to_page(x) (mem_map + MAP_NR(x)) x 91 arch/csky/include/asm/page.h #define pfn_to_kaddr(x) __va(PFN_PHYS(x)) x 51 arch/csky/include/asm/pgtable.h #define pte_pfn(x) ((unsigned long)((x).pte_low >> PAGE_SHIFT)) x 63 arch/csky/include/asm/pgtable.h #define __swp_type(x) (((x).val >> 4) & 0xff) x 64 arch/csky/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> 12) x 68 arch/csky/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 70 arch/csky/include/asm/pgtable.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 15 arch/csky/include/asm/segment.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 145 arch/csky/include/asm/spinlock.h #define arch_spin_is_locked(x) (READ_ONCE((x)->lock) != 0) x 56 arch/csky/include/asm/uaccess.h #define put_user(x, ptr) \ x 57 arch/csky/include/asm/uaccess.h __put_user_check((x), (ptr), sizeof(*(ptr))) x 59 arch/csky/include/asm/uaccess.h #define __put_user(x, ptr) \ x 60 arch/csky/include/asm/uaccess.h __put_user_nocheck((x), (ptr), sizeof(*(ptr))) x 62 arch/csky/include/asm/uaccess.h #define __ptr(x) ((unsigned long *)(x)) x 64 arch/csky/include/asm/uaccess.h #define get_user(x, ptr) \ x 65 arch/csky/include/asm/uaccess.h __get_user_check((x), (ptr), sizeof(*(ptr))) x 67 arch/csky/include/asm/uaccess.h #define __get_user(x, ptr) \ x 68 arch/csky/include/asm/uaccess.h __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 70 arch/csky/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) \ x 74 arch/csky/include/asm/uaccess.h typeof(*(ptr)) __pu_val = (typeof(*(ptr)))(x); \ x 81 arch/csky/include/asm/uaccess.h #define __put_user_check(x, ptr, size) \ x 85 arch/csky/include/asm/uaccess.h typeof(*(ptr)) __pu_val = (typeof(*(ptr)))(x); \ x 91 arch/csky/include/asm/uaccess.h #define __put_user_size(x, ptr, size, retval) \ x 96 arch/csky/include/asm/uaccess.h __put_user_asm_b(x, ptr, retval); \ x 99 arch/csky/include/asm/uaccess.h __put_user_asm_h(x, ptr, retval); \ x 102 arch/csky/include/asm/uaccess.h __put_user_asm_w(x, ptr, retval); \ x 105 arch/csky/include/asm/uaccess.h __put_user_asm_64(x, ptr, retval); \ x 120 arch/csky/include/asm/uaccess.h #define __put_user_asm_b(x, ptr, err) \ x 133 arch/csky/include/asm/uaccess.h : "=r"(err), "=r"(x), "=r"(ptr), "=r"(errcode) \ x 134 arch/csky/include/asm/uaccess.h : "0"(err), "1"(x), "2"(ptr), "3"(-EFAULT) \ x 138 arch/csky/include/asm/uaccess.h #define __put_user_asm_h(x, ptr, err) \ x 151 arch/csky/include/asm/uaccess.h : "=r"(err), "=r"(x), "=r"(ptr), "=r"(errcode) \ x 152 arch/csky/include/asm/uaccess.h : "0"(err), "1"(x), "2"(ptr), "3"(-EFAULT) \ x 156 arch/csky/include/asm/uaccess.h #define __put_user_asm_w(x, ptr, err) \ x 169 arch/csky/include/asm/uaccess.h : "=r"(err), "=r"(x), "=r"(ptr), "=r"(errcode) \ x 170 arch/csky/include/asm/uaccess.h : "0"(err), "1"(x), "2"(ptr), "3"(-EFAULT) \ x 174 arch/csky/include/asm/uaccess.h #define __put_user_asm_64(x, ptr, err) \ x 178 arch/csky/include/asm/uaccess.h typeof(*(ptr))src = (typeof(*(ptr)))x; \ x 201 arch/csky/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) \ x 204 arch/csky/include/asm/uaccess.h __get_user_size(x, (ptr), (size), __gu_err); \ x 208 arch/csky/include/asm/uaccess.h #define __get_user_check(x, ptr, size) \ x 213 arch/csky/include/asm/uaccess.h __get_user_size(x, __gu_ptr, size, __gu_err); \ x 217 arch/csky/include/asm/uaccess.h #define __get_user_size(x, ptr, size, retval) \ x 221 arch/csky/include/asm/uaccess.h __get_user_asm_common((x), ptr, "ldb", retval); \ x 224 arch/csky/include/asm/uaccess.h __get_user_asm_common((x), ptr, "ldh", retval); \ x 227 arch/csky/include/asm/uaccess.h __get_user_asm_common((x), ptr, "ldw", retval); \ x 230 arch/csky/include/asm/uaccess.h x = 0; \ x 235 arch/csky/include/asm/uaccess.h #define __get_user_asm_common(x, ptr, ins, err) \ x 250 arch/csky/include/asm/uaccess.h : "=r"(err), "=r"(x), "=r"(errcode) \ x 64 arch/h8300/boot/compressed/misc.c static void error(char *x) x 7 arch/h8300/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 8 arch/h8300/include/asm/cmpxchg.h ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), \ x 12 arch/h8300/include/asm/cmpxchg.h #define __xg(x) ((volatile struct __xchg_dummy *)(x)) x 14 arch/h8300/include/asm/cmpxchg.h static inline unsigned long __xchg(unsigned long x, x 26 arch/h8300/include/asm/cmpxchg.h : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr))); x 32 arch/h8300/include/asm/cmpxchg.h : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr))); x 38 arch/h8300/include/asm/cmpxchg.h : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr))); x 21 arch/h8300/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_H8_300) x 36 arch/h8300/include/asm/hash.h static inline u32 __attribute_const__ __hash_32(u32 x) x 48 arch/h8300/include/asm/hash.h : "=&r" (temp), "=r" (x) x 49 arch/h8300/include/asm/hash.h : "%r" (GOLDEN_RATIO_32), "1" (x)); x 50 arch/h8300/include/asm/hash.h return x; x 13 arch/h8300/include/asm/pgtable.h #define __swp_type(x) (0) x 14 arch/h8300/include/asm/pgtable.h #define __swp_offset(x) (0) x 17 arch/h8300/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 183 arch/hexagon/include/asm/bitops.h static inline long ffz(int x) x 189 arch/hexagon/include/asm/bitops.h : "r" (x)); x 200 arch/hexagon/include/asm/bitops.h static inline int fls(unsigned int x) x 207 arch/hexagon/include/asm/bitops.h : "r" (x) x 221 arch/hexagon/include/asm/bitops.h static inline int ffs(int x) x 228 arch/hexagon/include/asm/bitops.h : "r" (x) x 22 arch/hexagon/include/asm/cmpxchg.h static inline unsigned long __xchg(unsigned long x, volatile void *ptr, x 35 arch/hexagon/include/asm/cmpxchg.h : "r" (ptr), "r" (x) x 13 arch/hexagon/include/asm/exec.h #define arch_align_stack(x) (x & STACK_MASK) x 25 arch/hexagon/include/asm/io.h #define IOMEM(x) ((void __force __iomem *)(x)) x 260 arch/hexagon/include/asm/io.h u8 x = inb(port); x 261 arch/hexagon/include/asm/io.h *buf++ = x; x 271 arch/hexagon/include/asm/io.h u16 x = inw(port); x 272 arch/hexagon/include/asm/io.h *buf++ = x; x 282 arch/hexagon/include/asm/io.h u32 x = inw(port); x 283 arch/hexagon/include/asm/io.h *buf++ = x; x 74 arch/hexagon/include/asm/page.h #define pte_val(x) ((x).pte) x 75 arch/hexagon/include/asm/page.h #define pgd_val(x) ((x).pgd) x 76 arch/hexagon/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 77 arch/hexagon/include/asm/page.h #define __pte(x) ((pte_t) { (x) }) x 78 arch/hexagon/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) }) x 79 arch/hexagon/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) }) x 86 arch/hexagon/include/asm/page.h #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) x 87 arch/hexagon/include/asm/page.h #define __va(x) ((void *)((unsigned long)(x) - PHYS_OFFSET + PAGE_OFFSET)) x 298 arch/hexagon/include/asm/pgtable.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 392 arch/hexagon/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 156 arch/hexagon/include/asm/spinlock.h #define arch_spin_is_locked(x) ((x)->lock != 0) x 21 arch/hexagon/lib/checksum.c #define SIGN(x, y) ((0x8000ULL*x)<<y) x 22 arch/hexagon/lib/checksum.c #define CARRY(x, y) ((0x0002ULL*x)<<y) x 23 arch/hexagon/lib/checksum.c #define SELECT(x, y) ((0x0001ULL*x)<<y) x 34 arch/hexagon/lib/checksum.c static inline unsigned short from64to16(u64 x) x 38 arch/hexagon/lib/checksum.c sum = HEXAGON_P_vrmpyh_PP(x^VR_NEGATE(1, 1, 1, 1), x 110 arch/ia64/hp/common/sba_iommu.c #define DBG_INIT(x...) printk(x) x 112 arch/ia64/hp/common/sba_iommu.c #define DBG_INIT(x...) x 116 arch/ia64/hp/common/sba_iommu.c #define DBG_RUN(x...) printk(x) x 118 arch/ia64/hp/common/sba_iommu.c #define DBG_RUN(x...) x 122 arch/ia64/hp/common/sba_iommu.c #define DBG_RUN_SG(x...) printk(x) x 124 arch/ia64/hp/common/sba_iommu.c #define DBG_RUN_SG(x...) x 129 arch/ia64/hp/common/sba_iommu.c #define DBG_RES(x...) printk(x) x 131 arch/ia64/hp/common/sba_iommu.c #define DBG_RES(x...) x 135 arch/ia64/hp/common/sba_iommu.c #define DBG_BYPASS(x...) printk(x) x 137 arch/ia64/hp/common/sba_iommu.c #define DBG_BYPASS(x...) x 265 arch/ia64/hp/common/sba_iommu.c #define ROUNDUP(x,y) ((x + ((y)-1)) & ~((y)-1)) x 32 arch/ia64/include/asm/acpi.h #define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ x 74 arch/ia64/include/asm/acpi.h #define acpi_unlazy_tlb(x) x 50 arch/ia64/include/asm/asmmacro.h # define EX(y,x...) \ x 52 arch/ia64/include/asm/asmmacro.h [99:] x x 53 arch/ia64/include/asm/asmmacro.h # define EXCLR(y,x...) \ x 55 arch/ia64/include/asm/asmmacro.h [99:] x x 348 arch/ia64/include/asm/bitops.h ffz (unsigned long x) x 352 arch/ia64/include/asm/bitops.h result = ia64_popcnt(x & (~x - 1)); x 363 arch/ia64/include/asm/bitops.h __ffs (unsigned long x) x 367 arch/ia64/include/asm/bitops.h result = ia64_popcnt((x-1) & ~x); x 378 arch/ia64/include/asm/bitops.h ia64_fls (unsigned long x) x 380 arch/ia64/include/asm/bitops.h long double d = x; x 393 arch/ia64/include/asm/bitops.h unsigned long x = t & 0xffffffffu; x 395 arch/ia64/include/asm/bitops.h if (!x) x 397 arch/ia64/include/asm/bitops.h x |= x >> 1; x 398 arch/ia64/include/asm/bitops.h x |= x >> 2; x 399 arch/ia64/include/asm/bitops.h x |= x >> 4; x 400 arch/ia64/include/asm/bitops.h x |= x >> 8; x 401 arch/ia64/include/asm/bitops.h x |= x >> 16; x 402 arch/ia64/include/asm/bitops.h return ia64_popcnt(x); x 410 arch/ia64/include/asm/bitops.h __fls (unsigned long x) x 412 arch/ia64/include/asm/bitops.h x |= x >> 1; x 413 arch/ia64/include/asm/bitops.h x |= x >> 2; x 414 arch/ia64/include/asm/bitops.h x |= x >> 4; x 415 arch/ia64/include/asm/bitops.h x |= x >> 8; x 416 arch/ia64/include/asm/bitops.h x |= x >> 16; x 417 arch/ia64/include/asm/bitops.h x |= x >> 32; x 418 arch/ia64/include/asm/bitops.h return ia64_popcnt(x) - 1; x 429 arch/ia64/include/asm/bitops.h static __inline__ unsigned long __arch_hweight64(unsigned long x) x 432 arch/ia64/include/asm/bitops.h result = ia64_popcnt(x); x 436 arch/ia64/include/asm/bitops.h #define __arch_hweight32(x) ((unsigned int) __arch_hweight64((x) & 0xfffffffful)) x 437 arch/ia64/include/asm/bitops.h #define __arch_hweight16(x) ((unsigned int) __arch_hweight64((x) & 0xfffful)) x 438 arch/ia64/include/asm/bitops.h #define __arch_hweight8(x) ((unsigned int) __arch_hweight64((x) & 0xfful)) x 17 arch/ia64/include/asm/dma.h #define free_dma(x) x 10 arch/ia64/include/asm/dmi.h #define dmi_early_unmap(x, l) iounmap(x) x 20 arch/ia64/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_IA_64) x 97 arch/ia64/include/asm/hw_irq.h #define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)] x 108 arch/ia64/include/asm/hw_irq.h #define irq_to_domain(x) irq_cfg[(x)].domain x 24 arch/ia64/include/asm/kregs.h #define _IA64_KR_PASTE(x,y) x##y x 15 arch/ia64/include/asm/linkage.h #define cond_syscall(x) asm(".weak\t" #x "#\n" #x "#\t=\tsys_ni_syscall#") x 239 arch/ia64/include/asm/mca_asm.h #define ALIGN16(x) ((x)&~15) x 60 arch/ia64/include/asm/page.h # define __pa(x) ((x) - PAGE_OFFSET) x 61 arch/ia64/include/asm/page.h # define __va(x) ((x) + PAGE_OFFSET) x 144 arch/ia64/include/asm/page.h #define __pa(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = 0; _v.l;}) x 145 arch/ia64/include/asm/page.h #define __va(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = -1; _v.p;}) x 147 arch/ia64/include/asm/page.h #define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) x 148 arch/ia64/include/asm/page.h #define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) x 151 arch/ia64/include/asm/page.h # define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ x 152 arch/ia64/include/asm/page.h | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT))) x 185 arch/ia64/include/asm/page.h # define pte_val(x) ((x).pte) x 186 arch/ia64/include/asm/page.h # define pmd_val(x) ((x).pmd) x 188 arch/ia64/include/asm/page.h # define pud_val(x) ((x).pud) x 190 arch/ia64/include/asm/page.h # define pgd_val(x) ((x).pgd) x 191 arch/ia64/include/asm/page.h # define pgprot_val(x) ((x).pgprot) x 193 arch/ia64/include/asm/page.h # define __pte(x) ((pte_t) { (x) } ) x 194 arch/ia64/include/asm/page.h # define __pmd(x) ((pmd_t) { (x) } ) x 195 arch/ia64/include/asm/page.h # define __pgprot(x) ((pgprot_t) { (x) } ) x 209 arch/ia64/include/asm/page.h # define pte_val(x) (x) x 210 arch/ia64/include/asm/page.h # define pmd_val(x) (x) x 211 arch/ia64/include/asm/page.h # define pgd_val(x) (x) x 212 arch/ia64/include/asm/page.h # define pgprot_val(x) (x) x 214 arch/ia64/include/asm/page.h # define __pte(x) (x) x 215 arch/ia64/include/asm/page.h # define __pgd(x) (x) x 216 arch/ia64/include/asm/page.h # define __pgprot(x) (x) x 480 arch/ia64/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 129 arch/ia64/include/asm/processor.h __u64 x : 1; x 662 arch/ia64/include/asm/processor.h prefetch (const void *x) x 664 arch/ia64/include/asm/processor.h ia64_lfetch(ia64_lfhint_none, x); x 668 arch/ia64/include/asm/processor.h prefetchw (const void *x) x 670 arch/ia64/include/asm/processor.h ia64_lfetch_excl(ia64_lfhint_none, x); x 673 arch/ia64/include/asm/processor.h #define spin_lock_prefetch(x) prefetchw(x) x 22 arch/ia64/include/asm/spinlock.h #define arch_spin_lock_init(x) ((x)->lock = 0) x 228 arch/ia64/include/asm/spinlock.h static inline void arch_write_unlock(arch_rwlock_t *x) x 230 arch/ia64/include/asm/spinlock.h u8 *y = (u8 *)x; x 256 arch/ia64/include/asm/spinlock.h static inline void arch_write_unlock(arch_rwlock_t *x) x 259 arch/ia64/include/asm/spinlock.h x->write_lock = 0; x 264 arch/ia64/include/asm/spinlock.h static inline int arch_read_trylock(arch_rwlock_t *x) x 270 arch/ia64/include/asm/spinlock.h old.lock = new.lock = *x; x 273 arch/ia64/include/asm/spinlock.h return (u32)ia64_cmpxchg4_acq((__u32 *)(x), new.word, old.word) == old.word; x 25 arch/ia64/include/asm/termios.h #define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ x 27 arch/ia64/include/asm/termios.h get_user(__tmp,&(termio)->x); \ x 28 arch/ia64/include/asm/termios.h *(unsigned short *) &(termios)->x = __tmp; \ x 52 arch/ia64/include/asm/uaccess.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 79 arch/ia64/include/asm/uaccess.h #define put_user(x, ptr) __put_user_check((__typeof__(*(ptr))) (x), (ptr), sizeof(*(ptr))) x 80 arch/ia64/include/asm/uaccess.h #define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) x 87 arch/ia64/include/asm/uaccess.h #define __put_user(x, ptr) __put_user_nocheck((__typeof__(*(ptr))) (x), (ptr), sizeof(*(ptr))) x 88 arch/ia64/include/asm/uaccess.h #define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 92 arch/ia64/include/asm/uaccess.h # define __m(x) (*(struct __large_struct __user *)(x)) x 147 arch/ia64/include/asm/uaccess.h #define __do_get_user(check, x, ptr, size) \ x 161 arch/ia64/include/asm/uaccess.h (x) = (__force __typeof__(*(__gu_ptr))) __gu_val; \ x 165 arch/ia64/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) __do_get_user(0, x, ptr, size) x 166 arch/ia64/include/asm/uaccess.h #define __get_user_check(x, ptr, size) __do_get_user(1, x, ptr, size) x 174 arch/ia64/include/asm/uaccess.h #define __do_put_user(check, x, ptr, size) \ x 176 arch/ia64/include/asm/uaccess.h __typeof__ (x) __pu_x = (x); \ x 192 arch/ia64/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) __do_put_user(0, x, ptr, size) x 193 arch/ia64/include/asm/uaccess.h #define __put_user_check(x, ptr, size) __do_put_user(1, x, ptr, size) x 21 arch/ia64/include/asm/vga.h #define VGA_MAP_MEM(x,s) ((unsigned long) ioremap_nocache(vga_console_membase + (x), s)) x 23 arch/ia64/include/asm/vga.h #define vga_readb(x) (*(x)) x 24 arch/ia64/include/asm/vga.h #define vga_writeb(x,y) (*(y) = (x)) x 30 arch/ia64/include/uapi/asm/cmpxchg.h #define __xchg(x, ptr, size) \ x 36 arch/ia64/include/uapi/asm/cmpxchg.h __xchg_result = ia64_xchg1((__u8 *)ptr, x); \ x 40 arch/ia64/include/uapi/asm/cmpxchg.h __xchg_result = ia64_xchg2((__u16 *)ptr, x); \ x 44 arch/ia64/include/uapi/asm/cmpxchg.h __xchg_result = ia64_xchg4((__u32 *)ptr, x); \ x 48 arch/ia64/include/uapi/asm/cmpxchg.h __xchg_result = ia64_xchg8((__u64 *)ptr, x); \ x 56 arch/ia64/include/uapi/asm/cmpxchg.h #define xchg(ptr, x) \ x 57 arch/ia64/include/uapi/asm/cmpxchg.h ((__typeof__(*(ptr))) __xchg((unsigned long) (x), (ptr), sizeof(*(ptr)))) x 19 arch/ia64/include/uapi/asm/fpu.h #define FPSR_S0(x) ((x) << 6) x 20 arch/ia64/include/uapi/asm/fpu.h #define FPSR_S1(x) ((x) << 19) x 21 arch/ia64/include/uapi/asm/fpu.h #define FPSR_S2(x) (__IA64_UL(x) << 32) x 22 arch/ia64/include/uapi/asm/fpu.h #define FPSR_S3(x) (__IA64_UL(x) << 45) x 27 arch/ia64/include/uapi/asm/fpu.h #define FPSF_PC(x) (((x) & 0x3) << 2) /* precision control */ x 28 arch/ia64/include/uapi/asm/fpu.h #define FPSF_RC(x) (((x) & 0x3) << 4) /* rounding control */ x 117 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_mux1(x, mode) \ x 123 arch/ia64/include/uapi/asm/gcc_intrin.h asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \ x 126 arch/ia64/include/uapi/asm/gcc_intrin.h asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \ x 129 arch/ia64/include/uapi/asm/gcc_intrin.h asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \ x 132 arch/ia64/include/uapi/asm/gcc_intrin.h asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \ x 135 arch/ia64/include/uapi/asm/gcc_intrin.h asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \ x 142 arch/ia64/include/uapi/asm/gcc_intrin.h # define ia64_popcnt(x) __builtin_popcountl(x) x 144 arch/ia64/include/uapi/asm/gcc_intrin.h # define ia64_popcnt(x) \ x 147 arch/ia64/include/uapi/asm/gcc_intrin.h asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \ x 153 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_getf_exp(x) \ x 157 arch/ia64/include/uapi/asm/gcc_intrin.h asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \ x 169 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_ldfs(regnum, x) \ x 172 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \ x 175 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_ldfd(regnum, x) \ x 178 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \ x 181 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_ldfe(regnum, x) \ x 184 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \ x 187 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_ldf8(regnum, x) \ x 190 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \ x 193 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_ldf_fill(regnum, x) \ x 196 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \ x 204 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_stfs(x, regnum) \ x 207 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ x 210 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_stfd(x, regnum) \ x 213 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ x 216 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_stfe(x, regnum) \ x 219 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ x 222 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_stf8(x, regnum) \ x 225 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ x 228 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_stf_spill(x, regnum) \ x 231 arch/ia64/include/uapi/asm/gcc_intrin.h asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ x 276 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_xchg1(ptr,x) \ x 280 arch/ia64/include/uapi/asm/gcc_intrin.h : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \ x 284 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_xchg2(ptr,x) \ x 288 arch/ia64/include/uapi/asm/gcc_intrin.h : "r" (ptr), "r" (x) : "memory"); \ x 292 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_xchg4(ptr,x) \ x 296 arch/ia64/include/uapi/asm/gcc_intrin.h : "r" (ptr), "r" (x) : "memory"); \ x 300 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_xchg8(ptr,x) \ x 304 arch/ia64/include/uapi/asm/gcc_intrin.h : "r" (ptr), "r" (x) : "memory"); \ x 405 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_nop(x) asm volatile ("nop %0"::"i"(x)); x 610 arch/ia64/include/uapi/asm/gcc_intrin.h #define ia64_native_intrin_local_irq_restore(x) \ x 616 arch/ia64/include/uapi/asm/gcc_intrin.h :: "r"((x)) : "p6", "p7", "memory"); \ x 32 arch/ia64/include/uapi/asm/intel_intrin.h #define ia64_mux1(x,v) _m_to_int64(_m64_mux1(_m_from_int64(x), (v))) x 150 arch/ia64/include/uapi/asm/intel_intrin.h #define ia64_native_intrin_local_irq_restore(x) \ x 152 arch/ia64/include/uapi/asm/intel_intrin.h if ((x) != 0) { \ x 166 arch/ia64/include/uapi/asm/perfmon.h #define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff) x 167 arch/ia64/include/uapi/asm/perfmon.h #define PFM_VERSION_MINOR(x) ((x) & 0xffff) x 14 arch/ia64/include/uapi/asm/swab.h static __inline__ __attribute_const__ __u64 __arch_swab64(__u64 x) x 18 arch/ia64/include/uapi/asm/swab.h result = ia64_mux1(x, ia64_mux1_rev); x 23 arch/ia64/include/uapi/asm/swab.h static __inline__ __attribute_const__ __u32 __arch_swab32(__u32 x) x 25 arch/ia64/include/uapi/asm/swab.h return __arch_swab64(x) >> 32; x 29 arch/ia64/include/uapi/asm/swab.h static __inline__ __attribute_const__ __u16 __arch_swab16(__u16 x) x 31 arch/ia64/include/uapi/asm/swab.h return __arch_swab64(x) >> 48; x 23 arch/ia64/include/uapi/asm/types.h # define __IA64_UL(x) (x) x 24 arch/ia64/include/uapi/asm/types.h # define __IA64_UL_CONST(x) x x 27 arch/ia64/include/uapi/asm/types.h # define __IA64_UL(x) ((unsigned long)(x)) x 28 arch/ia64/include/uapi/asm/types.h # define __IA64_UL_CONST(x) x##UL x 14 arch/ia64/kernel/entry.h # define PASTE2(x,y) x##y x 15 arch/ia64/kernel/entry.h # define PASTE(x,y) PASTE2(x,y) x 145 arch/ia64/kernel/perfmon.c #define RDEP(x) (1UL<<(x)) x 589 arch/ia64/kernel/perfmon.c pfm_protect_ctx_ctxsw(pfm_context_t *x) x 591 arch/ia64/kernel/perfmon.c spin_lock(&(x)->ctx_lock); x 596 arch/ia64/kernel/perfmon.c pfm_unprotect_ctx_ctxsw(pfm_context_t *x, unsigned long f) x 598 arch/ia64/kernel/perfmon.c spin_unlock(&(x)->ctx_lock); x 2777 arch/ia64/kernel/perfmon.c #define PFM_CHECK_PMC_PM(x, y, z) ((x)->ctx_fl_system ^ PMC_PM(y, z)) x 28 arch/ia64/kernel/sal.c #define SAL_MAJOR(x) ((x) >> 8) x 29 arch/ia64/kernel/sal.c #define SAL_MINOR(x) ((x) & 0xff) x 63 arch/ia64/kernel/smpboot.c #define Dprintk(x...) printk(x) x 65 arch/ia64/kernel/smpboot.c #define Dprintk(x...) x 86 arch/ia64/kernel/smpboot.c #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); x 89 arch/ia64/kernel/smpboot.c #define set_brendez_area(x) x 135 arch/ia64/kernel/topology.c #define LEAF_KOBJECT_PTR(x,y) (&all_cpu_cache_info[x].cache_leaves[y]) x 173 arch/ia64/kernel/unaligned.c unsigned long x:1; /* [27:27] */ x 200 arch/ia64/kernel/unaligned.c #define RPO(x) ((size_t) &((struct pt_regs *)0)->x) x 201 arch/ia64/kernel/unaligned.c #define RSO(x) ((size_t) &((struct switch_stack *)0)->x) x 203 arch/ia64/kernel/unaligned.c #define RPT(x) (RPO(x) << 1) x 204 arch/ia64/kernel/unaligned.c #define RSW(x) (1| RSO(x)<<1) x 206 arch/ia64/kernel/unaligned.c #define GR_OFFS(x) (gr_info[x]>>1) x 207 arch/ia64/kernel/unaligned.c #define GR_IN_SW(x) (gr_info[x] & 0x1) x 209 arch/ia64/kernel/unaligned.c #define FR_OFFS(x) (fr_info[x]>>1) x 210 arch/ia64/kernel/unaligned.c #define FR_IN_SW(x) (fr_info[x] & 0x1) x 702 arch/ia64/kernel/unaligned.c imm = ld.x << 7 | ld.imm; x 717 arch/ia64/kernel/unaligned.c DPRINT("ld.x=%d ld.m=%d imm=%ld r3=0x%lx\n", ld.x, ld.m, imm, ifa); x 920 arch/ia64/kernel/unaligned.c imm = ld.x << 7 | ld.r1; x 1263 arch/ia64/kernel/unaligned.c imm = ld.x << 7 | ld.r1; x 1392 arch/ia64/kernel/unaligned.c u.insn.r3, u.insn.x, u.insn.hint, u.insn.x6_sz, u.insn.m, u.insn.op); x 1431 arch/ia64/kernel/unaligned.c if (u.insn.x) x 1459 arch/ia64/kernel/unaligned.c if (u.insn.x) x 1475 arch/ia64/kernel/unaligned.c if (u.insn.x) x 1488 arch/ia64/kernel/unaligned.c if (u.insn.x) x 71 arch/ia64/kernel/unwind.c # define STAT(x...) x x 73 arch/ia64/kernel/unwind.c # define STAT(x...) x 1099 arch/ia64/kernel/unwind.c desc_spill_reg_p (unsigned char qp, unw_word t, unsigned char abreg, unsigned char x, x 1108 arch/ia64/kernel/unwind.c if (x) x 1190 arch/ia64/kernel/unwind.c #define UNW_DEC_SPILL_REG_P(f,p,t,a,x,y,arg) desc_spill_reg_p(p,t,a,x,y,arg) x 1191 arch/ia64/kernel/unwind.c #define UNW_DEC_SPILL_REG(f,t,a,x,y,arg) desc_spill_reg_p(0,t,a,x,y,arg) x 105 arch/ia64/kernel/unwind_decoder.c unsigned char byte1, byte2, abreg, x, ytreg; x 112 arch/ia64/kernel/unwind_decoder.c x = (byte1 >> 7) & 1; x 116 arch/ia64/kernel/unwind_decoder.c UNW_DEC_SPILL_REG(X2, t, abreg, x, ytreg, arg); x 143 arch/ia64/kernel/unwind_decoder.c unsigned char byte1, byte2, byte3, qp, abreg, x, ytreg; x 151 arch/ia64/kernel/unwind_decoder.c x = (byte2 >> 7) & 1; x 157 arch/ia64/kernel/unwind_decoder.c UNW_DEC_SPILL_REG_P(X4, qp, t, abreg, x, ytreg, arg); x 9 arch/ia64/kernel/unwind_i.h #define UNW_VER(x) ((x) >> 48) x 12 arch/ia64/kernel/unwind_i.h #define UNW_FLAG_EHANDLER(x) ((x) & 0x0000000100000000L) x 13 arch/ia64/kernel/unwind_i.h #define UNW_FLAG_UHANDLER(x) ((x) & 0x0000000200000000L) x 14 arch/ia64/kernel/unwind_i.h #define UNW_LENGTH(x) ((x) & 0x00000000ffffffffL) x 20 arch/ia64/lib/checksum.c from64to16 (unsigned long x) x 23 arch/ia64/lib/checksum.c x = (x & 0xffffffff) + (x >> 32); x 25 arch/ia64/lib/checksum.c x = (x & 0xffff) + (x >> 16); x 27 arch/ia64/lib/checksum.c x = (x & 0xffff) + (x >> 16); x 29 arch/ia64/lib/checksum.c x = (x & 0xffff) + (x >> 16); x 30 arch/ia64/lib/checksum.c return x; x 21 arch/ia64/lib/csum_partial_copy.c short from64to16(unsigned long x) x 24 arch/ia64/lib/csum_partial_copy.c x = (x & 0xffffffff) + (x >> 32); x 26 arch/ia64/lib/csum_partial_copy.c x = (x & 0xffff) + (x >> 16); x 28 arch/ia64/lib/csum_partial_copy.c x = (x & 0xffff) + (x >> 16); x 30 arch/ia64/lib/csum_partial_copy.c x = (x & 0xffff) + (x >> 16); x 31 arch/ia64/lib/csum_partial_copy.c return x; x 1 arch/ia64/scripts/check-model.c int __attribute__ ((__model__ (__small__))) x; x 174 arch/m68k/apollo/config.c volatile unsigned char x; x 178 arch/m68k/apollo/config.c x = *(volatile unsigned char *)(apollo_timer + 3); x 179 arch/m68k/apollo/config.c x = *(volatile unsigned char *)(apollo_timer + 5); x 381 arch/m68k/atari/atakeyb.c void ikbd_mouse_thresh(int x, int y) x 383 arch/m68k/atari/atakeyb.c char cmd[3] = { 0x0B, x, y }; x 390 arch/m68k/atari/atakeyb.c void ikbd_mouse_scale(int x, int y) x 392 arch/m68k/atari/atakeyb.c char cmd[3] = { 0x0C, x, y }; x 398 arch/m68k/atari/atakeyb.c void ikbd_mouse_pos_get(int *x, int *y) x 408 arch/m68k/atari/atakeyb.c void ikbd_mouse_pos_set(int x, int y) x 410 arch/m68k/atari/atakeyb.c char cmd[6] = { 0x0E, 0x00, x>>8, x&0xFF, y>>8, y&0xFF }; x 21 arch/m68k/fpsp040/fpsp.h | fmovem.x fp0-fp3,USER_FP0(a6) x 51 arch/m68k/fpsp040/fpsp.h | fmovem.x USER_FP0(a6),fp0-fp3 x 307 arch/m68k/fpsp040/fpsp.h .set sx_mask,0x01800000 | set s and x bits in word $48 x 99 arch/m68k/hp300/config.c static void hp300_pulse(int x) x 101 arch/m68k/hp300/config.c if (x) x 123 arch/m68k/hp300/config.c #define rtc_command(x) out_8(RTCBASE + RTC_CMD, (x)) x 125 arch/m68k/hp300/config.c #define rtc_write_data(x) out_8(RTCBASE + RTC_DATA, (x)) x 19792 arch/m68k/ifpsp060/src/fpsp.S # if (s || d || x) then check for SNAN,UNNORM,DENORM # x 441 arch/m68k/include/asm/MC68328.h #define PA(x) (1 << (x)) x 442 arch/m68k/include/asm/MC68328.h #define PA_A(x) PA((x) - 16) /* This is specific to PA only! */ x 464 arch/m68k/include/asm/MC68328.h #define PB(x) (1 << (x)) x 465 arch/m68k/include/asm/MC68328.h #define PB_D(x) PB(x) /* This is specific to port B only */ x 487 arch/m68k/include/asm/MC68328.h #define PC(x) (1 << (x)) x 513 arch/m68k/include/asm/MC68328.h #define PD(x) (1 << (x)) x 514 arch/m68k/include/asm/MC68328.h #define PD_KB(x) PD(x) /* This is specific for Port D only */ x 538 arch/m68k/include/asm/MC68328.h #define PE(x) (1 << (x)) x 561 arch/m68k/include/asm/MC68328.h #define PF(x) (1 << (x)) x 562 arch/m68k/include/asm/MC68328.h #define PF_A(x) PF((x) - 24) /* This is Port F specific only */ x 586 arch/m68k/include/asm/MC68328.h #define PG(x) (1 << (x)) x 608 arch/m68k/include/asm/MC68328.h #define PJ(x) (1 << (x)) x 625 arch/m68k/include/asm/MC68328.h #define PK(x) (1 << (x)) x 640 arch/m68k/include/asm/MC68328.h #define PM(x) (1 << (x)) x 354 arch/m68k/include/asm/MC68EZ328.h #define PA(x) (1 << (x)) x 369 arch/m68k/include/asm/MC68EZ328.h #define PB(x) (1 << (x)) x 393 arch/m68k/include/asm/MC68EZ328.h #define PC(x) (1 << (x)) x 425 arch/m68k/include/asm/MC68EZ328.h #define PD(x) (1 << (x)) x 449 arch/m68k/include/asm/MC68EZ328.h #define PE(x) (1 << (x)) x 473 arch/m68k/include/asm/MC68EZ328.h #define PF(x) (1 << (x)) x 497 arch/m68k/include/asm/MC68EZ328.h #define PG(x) (1 << (x)) x 363 arch/m68k/include/asm/MC68VZ328.h #define PA(x) (1 << (x)) x 378 arch/m68k/include/asm/MC68VZ328.h #define PB(x) (1 << (x)) x 402 arch/m68k/include/asm/MC68VZ328.h #define PC(x) (1 << (x)) x 434 arch/m68k/include/asm/MC68VZ328.h #define PD(x) (1 << (x)) x 458 arch/m68k/include/asm/MC68VZ328.h #define PE(x) (1 << (x)) x 482 arch/m68k/include/asm/MC68VZ328.h #define PF(x) (1 << (x)) x 506 arch/m68k/include/asm/MC68VZ328.h #define PG(x) (1 << (x)) x 528 arch/m68k/include/asm/MC68VZ328.h #define PJ(x) (1 << (x)) x 543 arch/m68k/include/asm/MC68VZ328.h #define PK(x) (1 << (x)) x 565 arch/m68k/include/asm/MC68VZ328.h #define PJ(x) (1 << (x)) x 589 arch/m68k/include/asm/MC68VZ328.h #define PM(x) (1 << (x)) x 244 arch/m68k/include/asm/amigahw.h #define ZTWO_PADDR(x) (((unsigned long)(x))-zTwoBase) x 245 arch/m68k/include/asm/amigahw.h #define ZTWO_VADDR(x) ((void __iomem *)(((unsigned long)(x))+zTwoBase)) x 20 arch/m68k/include/asm/apollohw.h #define DECLARE_2681_FIELD(x) unsigned char x; unsigned char dummy##x x 86 arch/m68k/include/asm/apollohw.h #define isaIO2mem(x) (((((x) & 0x3f8) << 7) | (((x) & 0xfc00) >> 6) | ((x) & 0x7)) + 0x40000 + IO_BASE) x 23 arch/m68k/include/asm/atarikb.h void ikbd_mouse_thresh(int x, int y); x 24 arch/m68k/include/asm/atarikb.h void ikbd_mouse_scale(int x, int y); x 25 arch/m68k/include/asm/atarikb.h void ikbd_mouse_pos_get(int *x, int *y); x 26 arch/m68k/include/asm/atarikb.h void ikbd_mouse_pos_set(int x, int y); x 457 arch/m68k/include/asm/bitops.h static inline unsigned long __ffs(unsigned long x) x 460 arch/m68k/include/asm/bitops.h : "=d" (x) x 461 arch/m68k/include/asm/bitops.h : "0" (x)); x 462 arch/m68k/include/asm/bitops.h return x; x 465 arch/m68k/include/asm/bitops.h static inline int ffs(int x) x 467 arch/m68k/include/asm/bitops.h if (!x) x 469 arch/m68k/include/asm/bitops.h return __ffs(x) + 1; x 487 arch/m68k/include/asm/bitops.h static inline int ffs(int x) x 493 arch/m68k/include/asm/bitops.h : "dm" (x & -x)); x 497 arch/m68k/include/asm/bitops.h static inline unsigned long __ffs(unsigned long x) x 499 arch/m68k/include/asm/bitops.h return ffs(x) - 1; x 505 arch/m68k/include/asm/bitops.h static inline int fls(unsigned int x) x 511 arch/m68k/include/asm/bitops.h : "dm" (x)); x 515 arch/m68k/include/asm/bitops.h static inline int __fls(int x) x 517 arch/m68k/include/asm/bitops.h return fls(x) - 1; x 8 arch/m68k/include/asm/cmpxchg.h #define __xg(x) ((volatile struct __xchg_dummy *)(x)) x 13 arch/m68k/include/asm/cmpxchg.h static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) x 22 arch/m68k/include/asm/cmpxchg.h *(u8 *)ptr = x; x 23 arch/m68k/include/asm/cmpxchg.h x = tmp; x 27 arch/m68k/include/asm/cmpxchg.h *(u16 *)ptr = x; x 28 arch/m68k/include/asm/cmpxchg.h x = tmp; x 32 arch/m68k/include/asm/cmpxchg.h *(u32 *)ptr = x; x 33 arch/m68k/include/asm/cmpxchg.h x = tmp; x 36 arch/m68k/include/asm/cmpxchg.h tmp = __invalid_xchg_size(x, ptr, size); x 41 arch/m68k/include/asm/cmpxchg.h return x; x 44 arch/m68k/include/asm/cmpxchg.h static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) x 53 arch/m68k/include/asm/cmpxchg.h : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory"); x 61 arch/m68k/include/asm/cmpxchg.h : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory"); x 69 arch/m68k/include/asm/cmpxchg.h : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory"); x 72 arch/m68k/include/asm/cmpxchg.h x = __invalid_xchg_size(x, ptr, size); x 75 arch/m68k/include/asm/cmpxchg.h return x; x 79 arch/m68k/include/asm/cmpxchg.h #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) x 23 arch/m68k/include/asm/dvma.h #define dvma_malloc(x) dvma_malloc_align(x, 0) x 24 arch/m68k/include/asm/dvma.h #define dvma_map(x, y) dvma_map_align(x, y, 0) x 25 arch/m68k/include/asm/dvma.h #define dvma_map_vme(x, y) (dvma_map(x, y) & 0xfffff) x 26 arch/m68k/include/asm/dvma.h #define dvma_map_align_vme(x, y, z) (dvma_map_align (x, y, z) & 0xfffff) x 54 arch/m68k/include/asm/dvma.h #define dvma_vtop(x) ((unsigned long)(x) & 0xffffff) x 55 arch/m68k/include/asm/dvma.h #define dvma_ptov(x) ((unsigned long)(x) | 0xf000000) x 56 arch/m68k/include/asm/dvma.h #define dvma_vtovme(x) ((unsigned long)(x) & 0x00fffff) x 57 arch/m68k/include/asm/dvma.h #define dvma_vmetov(x) ((unsigned long)(x) | 0xff00000) x 58 arch/m68k/include/asm/dvma.h #define dvma_vtob(x) dvma_vtop(x) x 59 arch/m68k/include/asm/dvma.h #define dvma_btov(x) dvma_ptov(x) x 78 arch/m68k/include/asm/dvma.h #define dvma_vtob(x) ((unsigned long)(x) & 0x00ffffff) x 79 arch/m68k/include/asm/dvma.h #define dvma_btov(x) ((unsigned long)(x) | 0xff000000) x 49 arch/m68k/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_68K) x 41 arch/m68k/include/asm/hash.h static inline u32 __attribute_const__ __hash_32(u32 x) x 55 arch/m68k/include/asm/hash.h : "r,roi?" (x)); /* a+b = x*0x8647 */ x 57 arch/m68k/include/asm/hash.h return ((u16)(x*0x61c8) << 16) + a + b; x 195 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_CCR_BOOTPS(x) (((x)&0x0003)<<3|0x0001) x 198 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_CCR_CSC(x) (((x)&0x0003)<<8|0x0001) x 204 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3|0x0001) x 207 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_RCON_CSC(x) (((x)&0x0003)<<8|0x0001) x 210 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) x 211 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) x 225 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_CDR_SSIDIV(x) (((x)&0x000F)<<0) x 226 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_CDR_LPDIV(x) (((x)&0x000F)<<8) x 232 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_UHCSR_PORTIND(x) (((x)&0x0003)<<14) x 249 arch/m68k/include/asm/m53xxsim.h #define MCF_CCM_UOCSR_PORTIND(x) (((x)&0x0003)<<14) x 278 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSAR_BA(x) ((x)&0xFFFF0000) x 283 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) x 308 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSCR_PS(x) (((x)&0x00000003)<<6) x 311 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSCR_WS(x) (((x)&0x0000003F)<<10) x 312 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSCR_WRAH(x) (((x)&0x00000003)<<16) x 313 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSCR_RDAH(x) (((x)&0x00000003)<<18) x 314 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSCR_ASET(x) (((x)&0x00000003)<<20) x 316 arch/m68k/include/asm/m53xxsim.h #define MCF_FBCS_CSCR_SWS(x) (((x)&0x0000003F)<<26) x 896 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_FEC_PAR_FEC_MII(x) (((x)&0x03)<<0) x 897 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_FEC_PAR_FEC_7W(x) (((x)&0x03)<<2) x 906 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_PWM_PAR_PWM1(x) (((x)&0x03)<<0) x 907 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_PWM_PAR_PWM3(x) (((x)&0x03)<<2) x 912 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_BUSCTL_PAR_TS(x) (((x)&0x03)<<3) x 927 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_FECI2C_PAR_SDA(x) (((x)&0x03)<<0) x 928 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_FECI2C_PAR_SCL(x) (((x)&0x03)<<2) x 929 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_FECI2C_PAR_MDIO(x) (((x)&0x03)<<4) x 930 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_FECI2C_PAR_MDC(x) (((x)&0x03)<<6) x 964 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_SSI_PAR_TXD(x) (((x)&0x0003)<<8) x 965 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_SSI_PAR_RXD(x) (((x)&0x0003)<<10) x 966 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_SSI_PAR_FS(x) (((x)&0x0003)<<12) x 967 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_SSI_PAR_BCLK(x) (((x)&0x0003)<<14) x 974 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_UART_PAR_UTXD1(x) (((x)&0x0003)<<4) x 975 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_UART_PAR_URXD1(x) (((x)&0x0003)<<6) x 976 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_UART_PAR_URTS1(x) (((x)&0x0003)<<8) x 977 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_UART_PAR_UCTS1(x) (((x)&0x0003)<<10) x 996 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_QSPI_PAR_SCK(x) (((x)&0x0003)<<4) x 997 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_QSPI_PAR_DOUT(x) (((x)&0x0003)<<6) x 998 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_QSPI_PAR_DIN(x) (((x)&0x0003)<<8) x 999 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_QSPI_PAR_PCS0(x) (((x)&0x0003)<<10) x 1000 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_QSPI_PAR_PCS1(x) (((x)&0x0003)<<12) x 1001 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_QSPI_PAR_PCS2(x) (((x)&0x0003)<<14) x 1004 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_TIMER_PAR_TIN0(x) (((x)&0x03)<<0) x 1005 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_TIMER_PAR_TIN1(x) (((x)&0x03)<<2) x 1006 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_TIMER_PAR_TIN2(x) (((x)&0x03)<<4) x 1007 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_TIMER_PAR_TIN3(x) (((x)&0x03)<<6) x 1026 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_LCDDATA_PAR_LD7_0(x) (((x)&0x03)<<0) x 1027 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_LCDDATA_PAR_LD15_8(x) (((x)&0x03)<<2) x 1028 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_LCDDATA_PAR_LD16(x) (((x)&0x03)<<4) x 1029 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_LCDDATA_PAR_LD17(x) (((x)&0x03)<<6) x 1043 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_IRQ_PAR_IRQ1(x) (((x)&0x0003)<<4) x 1044 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_IRQ_PAR_IRQ2(x) (((x)&0x0003)<<6) x 1045 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_IRQ_PAR_IRQ4(x) (((x)&0x0003)<<8) x 1046 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_IRQ_PAR_IRQ5(x) (((x)&0x0003)<<10) x 1047 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_PAR_IRQ_PAR_IRQ6(x) (((x)&0x0003)<<12) x 1050 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_MSCR_FLEXBUS_MSCR_ADDRCTL(x) (((x)&0x03)<<0) x 1051 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_MSCR_FLEXBUS_MSCR_DLOWER(x) (((x)&0x03)<<2) x 1052 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_MSCR_FLEXBUS_MSCR_DUPPER(x) (((x)&0x03)<<4) x 1055 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_MSCR_SDRAM_MSCR_SDRAM(x) (((x)&0x03)<<0) x 1056 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLK(x) (((x)&0x03)<<2) x 1057 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLKB(x) (((x)&0x03)<<4) x 1060 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_I2C_I2C_DSE(x) (((x)&0x03)<<0) x 1063 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_PWM_PWM_DSE(x) (((x)&0x03)<<0) x 1066 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_FEC_FEC_DSE(x) (((x)&0x03)<<0) x 1069 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_UART_UART0_DSE(x) (((x)&0x03)<<0) x 1070 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_UART_UART1_DSE(x) (((x)&0x03)<<2) x 1073 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_QSPI_QSPI_DSE(x) (((x)&0x03)<<0) x 1076 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_TIMER_TIMER_DSE(x) (((x)&0x03)<<0) x 1079 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_SSI_SSI_DSE(x) (((x)&0x03)<<0) x 1082 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_LCD_LCD_DSE(x) (((x)&0x03)<<0) x 1085 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_DEBUG_DEBUG_DSE(x) (((x)&0x03)<<0) x 1088 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_CLKRST_CLKRST_DSE(x) (((x)&0x03)<<0) x 1091 arch/m68k/include/asm/m53xxsim.h #define MCF_GPIO_DSCR_IRQ_IRQ_DSE(x) (((x)&0x03)<<0) x 1119 arch/m68k/include/asm/m53xxsim.h #define MCF_PLL_PODR_BUSDIV(x) (((x)&0x0F)<<0) x 1120 arch/m68k/include/asm/m53xxsim.h #define MCF_PLL_PODR_CPUDIV(x) (((x)&0x0F)<<4) x 1123 arch/m68k/include/asm/m53xxsim.h #define MCF_PLL_PLLCR_DITHDEV(x) (((x)&0x07)<<0) x 1127 arch/m68k/include/asm/m53xxsim.h #define MCF_PLL_PMDR_MODDIV(x) (((x)&0xFF)<<0) x 1130 arch/m68k/include/asm/m53xxsim.h #define MCF_PLL_PFDR_MFD(x) (((x)&0xFF)<<0) x 1169 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDMR_AD(x) (((x)&0x00000FFF)<<18) x 1170 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDMR_BNKAD(x) (((x)&0x00000003)<<30) x 1177 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCR_DQS_OE(x) (((x)&0x0000000F)<<8) x 1178 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCR_PS(x) (((x)&0x00000003)<<12) x 1179 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCR_RCNT(x) (((x)&0x0000003F)<<16) x 1181 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCR_MUX(x) (((x)&0x00000003)<<24) x 1190 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x00000007)<<4) x 1191 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0x0000000F)<<8) x 1192 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x00000007)<<12) x 1193 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x00000007)<<16) x 1194 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG1_RDLAT(x) (((x)&0x0000000F)<<20) x 1195 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x00000007)<<24) x 1196 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0x0000000F)<<28) x 1199 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG2_BL(x) (((x)&0x0000000F)<<16) x 1200 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0x0000000F)<<20) x 1201 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0x0000000F)<<24) x 1202 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0x0000000F)<<28) x 1208 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDDS_SB_D(x) (((x)&0x00000003)<<0) x 1209 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDDS_SB_S(x) (((x)&0x00000003)<<2) x 1210 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDDS_SB_A(x) (((x)&0x00000003)<<4) x 1211 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDDS_SB_C(x) (((x)&0x00000003)<<6) x 1212 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDDS_SB_E(x) (((x)&0x00000003)<<8) x 1215 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCS_CSSZ(x) (((x)&0x0000001F)<<0) x 1216 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCS_BASE(x) (((x)&0x00000FFF)<<20) x 1217 arch/m68k/include/asm/m53xxsim.h #define MCF_SDRAMC_SDCS_BA(x) ((x)&0xFFF00000) x 46 arch/m68k/include/asm/m54xxacr.h #define ACR_BA(x) ((x) & 0xff000000) x 47 arch/m68k/include/asm/m54xxacr.h #define ACR_ADMSK(x) ((((x) - 1) & 0xff000000) >> 8) x 36 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GMS(x) (MCF_MBAR + 0x000800 + ((x) * 0x010)) x 37 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GCIR(x) (MCF_MBAR + 0x000804 + ((x) * 0x010)) x 38 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GPWM(x) (MCF_MBAR + 0x000808 + ((x) * 0x010)) x 39 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GSR(x) (MCF_MBAR + 0x00080C + ((x) * 0x010)) x 42 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GMS_TMS(x) (((x)&0x00000007)<<0) x 43 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GMS_GPIO(x) (((x)&0x00000003)<<4) x 49 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GMS_ICT(x) (((x)&0x00000003)<<16) x 50 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GMS_OCT(x) (((x)&0x00000003)<<20) x 51 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GMS_OCPW(x) (((x)&0x000000FF)<<24) x 72 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GCIR_CNT(x) (((x)&0x0000FFFF)<<0) x 73 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GCIR_PRE(x) (((x)&0x0000FFFF)<<16) x 78 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GPWM_WIDTH(x) (((x)&0x0000FFFF)<<16) x 86 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GSR_OVF(x) (((x)&0x00000007)<<12) x 87 arch/m68k/include/asm/m54xxgpt.h #define MCF_GPT_GSR_CAPTURE(x) (((x)&0x0000FFFF)<<16) x 128 arch/m68k/include/asm/m54xxpci.h #define PACR_EXTMPRI(x) (((x) & 0x1f) << 1) x 130 arch/m68k/include/asm/m54xxpci.h #define PACR_EXTMINTE(x) (((x) & 0x1f) << 17) x 134 arch/m68k/include/asm/m54xxpci.h #define PCICR1_CL(x) ((x) & 0xf) /* Cacheline size field */ x 135 arch/m68k/include/asm/m54xxpci.h #define PCICR1_LT(x) (((x) & 0xff) << 8) /* Latency timer field */ x 121 arch/m68k/include/asm/macints.h #define SLOT2IRQ(x) (x + 47) x 122 arch/m68k/include/asm/macints.h #define IRQ2SLOT(x) (x - 47) x 232 arch/m68k/include/asm/math-emu.h .irp gas_ident.x .x x 14 arch/m68k/include/asm/mc146818rtc.h #define ATARI_RTC_PORT(x) (TT_RTC_BAS + 2*(x)) x 392 arch/m68k/include/asm/mcf_pgtable.h #define __swp_type(x) ((x).val & 0xFF) x 393 arch/m68k/include/asm/mcf_pgtable.h #define __swp_offset(x) ((x).val >> 11) x 397 arch/m68k/include/asm/mcf_pgtable.h #define __swp_entry_to_pte(x) (__pte((x).val)) x 269 arch/m68k/include/asm/motorola_pgtable.h #define __swp_type(x) (((x).val >> 4) & 0xff) x 270 arch/m68k/include/asm/motorola_pgtable.h #define __swp_offset(x) ((x).val >> 12) x 273 arch/m68k/include/asm/motorola_pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 13 arch/m68k/include/asm/movs.h #define SET_DFC(x) \ x 14 arch/m68k/include/asm/movs.h __asm__ __volatile__ (" movec %0,%/dfc" : : "d" (x)); x 18 arch/m68k/include/asm/movs.h #define GET_DFC(x) \ x 19 arch/m68k/include/asm/movs.h __asm__ __volatile__ (" movec %/dfc, %0" : "=d" (x) : ); x 23 arch/m68k/include/asm/movs.h #define SET_SFC(x) \ x 24 arch/m68k/include/asm/movs.h __asm__ __volatile__ (" movec %0,%/sfc" : : "d" (x)); x 28 arch/m68k/include/asm/movs.h #define GET_SFC(x) \ x 29 arch/m68k/include/asm/movs.h __asm__ __volatile__ (" movec %/sfc, %0" : "=d" (x) : ); x 31 arch/m68k/include/asm/movs.h #define SET_VBR(x) \ x 32 arch/m68k/include/asm/movs.h __asm__ __volatile__ (" movec %0,%/vbr" : : "r" (x)); x 34 arch/m68k/include/asm/movs.h #define GET_VBR(x) \ x 35 arch/m68k/include/asm/movs.h __asm__ __volatile__ (" movec %/vbr, %0" : "=g" (x) : ); x 30 arch/m68k/include/asm/page.h #define pte_val(x) ((x).pte) x 31 arch/m68k/include/asm/page.h #define pmd_val(x) ((&x)->pmd[0]) x 32 arch/m68k/include/asm/page.h #define pgd_val(x) ((x).pgd) x 33 arch/m68k/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 35 arch/m68k/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 36 arch/m68k/include/asm/page.h #define __pmd(x) ((pmd_t) { { (x) }, }) x 37 arch/m68k/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 38 arch/m68k/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 95 arch/m68k/include/asm/page_mm.h #define __pa(x) ___pa((unsigned long)(x)) x 96 arch/m68k/include/asm/page_mm.h static inline unsigned long ___pa(unsigned long x) x 98 arch/m68k/include/asm/page_mm.h if(x == 0) x 100 arch/m68k/include/asm/page_mm.h if(x >= PAGE_OFFSET) x 101 arch/m68k/include/asm/page_mm.h return (x-PAGE_OFFSET); x 103 arch/m68k/include/asm/page_mm.h return (x+0x2000000); x 106 arch/m68k/include/asm/page_mm.h static inline void *__va(unsigned long x) x 108 arch/m68k/include/asm/page_mm.h if(x == 0) x 111 arch/m68k/include/asm/page_mm.h if(x < 0x2000000) x 112 arch/m68k/include/asm/page_mm.h return (void *)(x+PAGE_OFFSET); x 114 arch/m68k/include/asm/page_mm.h return (void *)(x-0x2000000); x 35 arch/m68k/include/asm/pgtable_no.h #define __swp_type(x) (0) x 36 arch/m68k/include/asm/pgtable_no.h #define __swp_offset(x) (0) x 39 arch/m68k/include/asm/pgtable_no.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 52 arch/m68k/include/asm/segment.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 43 arch/m68k/include/asm/sun3_pgalloc.h #define pmd_free(mm, x) do { } while (0) x 44 arch/m68k/include/asm/sun3_pgalloc.h #define __pmd_free_tlb(tlb, x, addr) do { } while (0) x 210 arch/m68k/include/asm/sun3_pgtable.h #define __swp_type(x) ((x).val & 0x7F) x 211 arch/m68k/include/asm/sun3_pgtable.h #define __swp_offset(x) (((x).val) >> 7) x 214 arch/m68k/include/asm/sun3_pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 38 arch/m68k/include/asm/uaccess_mm.h #define __put_user_asm(res, x, ptr, bwl, reg, err) \ x 54 arch/m68k/include/asm/uaccess_mm.h : #reg (x), "i" (err)) x 61 arch/m68k/include/asm/uaccess_mm.h #define __put_user(x, ptr) \ x 63 arch/m68k/include/asm/uaccess_mm.h typeof(*(ptr)) __pu_val = (x); \ x 106 arch/m68k/include/asm/uaccess_mm.h #define put_user(x, ptr) __put_user(x, ptr) x 109 arch/m68k/include/asm/uaccess_mm.h #define __get_user_asm(res, x, ptr, type, bwl, reg, err) ({ \ x 127 arch/m68k/include/asm/uaccess_mm.h (x) = (__force typeof(*(ptr)))(__force unsigned long)__gu_val; \ x 130 arch/m68k/include/asm/uaccess_mm.h #define __get_user(x, ptr) \ x 136 arch/m68k/include/asm/uaccess_mm.h __get_user_asm(__gu_err, x, ptr, u8, b, d, -EFAULT); \ x 139 arch/m68k/include/asm/uaccess_mm.h __get_user_asm(__gu_err, x, ptr, u16, w, r, -EFAULT); \ x 142 arch/m68k/include/asm/uaccess_mm.h __get_user_asm(__gu_err, x, ptr, u32, l, r, -EFAULT); \ x 171 arch/m68k/include/asm/uaccess_mm.h (x) = __gu_val.t; \ x 180 arch/m68k/include/asm/uaccess_mm.h #define get_user(x, ptr) __get_user(x, ptr) x 31 arch/m68k/include/asm/uaccess_no.h #define put_user(x, ptr) \ x 34 arch/m68k/include/asm/uaccess_no.h typeof(*(ptr)) __pu_val = (x); \ x 54 arch/m68k/include/asm/uaccess_no.h #define __put_user(x, ptr) put_user(x, ptr) x 64 arch/m68k/include/asm/uaccess_no.h #define __ptr(x) ((unsigned long *)(x)) x 66 arch/m68k/include/asm/uaccess_no.h #define __put_user_asm(err,x,ptr,bwl) \ x 69 arch/m68k/include/asm/uaccess_no.h :"d" (x),"m" (*__ptr(ptr)) : "memory") x 71 arch/m68k/include/asm/uaccess_no.h #define get_user(x, ptr) \ x 74 arch/m68k/include/asm/uaccess_no.h typeof(x) __gu_val = 0; \ x 93 arch/m68k/include/asm/uaccess_no.h (x) = (typeof(*(ptr))) __gu_val; \ x 96 arch/m68k/include/asm/uaccess_no.h #define __get_user(x, ptr) get_user(x, ptr) x 100 arch/m68k/include/asm/uaccess_no.h #define __get_user_asm(err,x,ptr,bwl,reg) \ x 102 arch/m68k/include/asm/uaccess_no.h : "=d" (x) \ x 25 arch/m68k/mm/mcfmmu.c #define KMAPAREA(x) ((x >= VMALLOC_START) && (x < KMAP_END)) x 9 arch/microblaze/include/asm/asm-compat.h # define ASM_CONST(x) x x 14 arch/microblaze/include/asm/asm-compat.h # define __ASM_CONST(x) x##UL x 15 arch/microblaze/include/asm/asm-compat.h # define ASM_CONST(x) __ASM_CONST(x) x 9 arch/microblaze/include/asm/cmpxchg.h static inline unsigned long __xchg(unsigned long x, volatile void *ptr, x 19 arch/microblaze/include/asm/cmpxchg.h *(volatile unsigned char *)ptr = x; x 26 arch/microblaze/include/asm/cmpxchg.h *(volatile unsigned long *)ptr = x; x 37 arch/microblaze/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 38 arch/microblaze/include/asm/cmpxchg.h ((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))) x 46 arch/microblaze/include/asm/delay.h static inline void __udelay(unsigned int x) x 50 arch/microblaze/include/asm/delay.h (unsigned long long)x * (unsigned long long)loops_per_jiffy \ x 100 arch/microblaze/include/asm/mmu.h # define TLB_PAGESZ(x) (((x) & 0x7) << 7) x 117 arch/microblaze/include/asm/mmu.h # define TLB_ZSEL(x) (((x) & 0xF) << 4) x 102 arch/microblaze/include/asm/page.h # define pte_val(x) ((x).pte) x 103 arch/microblaze/include/asm/page.h # define pgprot_val(x) ((x).pgprot) x 106 arch/microblaze/include/asm/page.h # define pmd_val(x) ((x).pmd) x 107 arch/microblaze/include/asm/page.h # define pgd_val(x) ((x).pgd) x 109 arch/microblaze/include/asm/page.h # define pmd_val(x) ((x).ste[0]) x 110 arch/microblaze/include/asm/page.h # define pud_val(x) ((x).pue[0]) x 111 arch/microblaze/include/asm/page.h # define pgd_val(x) ((x).pge[0]) x 114 arch/microblaze/include/asm/page.h # define __pte(x) ((pte_t) { (x) }) x 115 arch/microblaze/include/asm/page.h # define __pmd(x) ((pmd_t) { (x) }) x 116 arch/microblaze/include/asm/page.h # define __pgd(x) ((pgd_t) { (x) }) x 117 arch/microblaze/include/asm/page.h # define __pgprot(x) ((pgprot_t) { (x) }) x 178 arch/microblaze/include/asm/page.h # define __pa(x) __virt_to_phys((unsigned long)(x)) x 179 arch/microblaze/include/asm/page.h # define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) x 66 arch/microblaze/include/asm/pgalloc.h #define pmd_free(mm, x) do { } while (0) x 67 arch/microblaze/include/asm/pgalloc.h #define __pmd_free_tlb(tlb, x, addr) pmd_free((tlb)->mm, x) x 35 arch/microblaze/include/asm/pgtable.h #define pgprot_noncached(x) (x) x 39 arch/microblaze/include/asm/pgtable.h #define __swp_type(x) (0) x 40 arch/microblaze/include/asm/pgtable.h #define __swp_offset(x) (0) x 43 arch/microblaze/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 306 arch/microblaze/include/asm/pgtable.h #define pte_page(x) (mem_map + (unsigned long) \ x 307 arch/microblaze/include/asm/pgtable.h ((pte_val(x) - memory_start) >> PAGE_SHIFT)) x 310 arch/microblaze/include/asm/pgtable.h #define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) x 511 arch/microblaze/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 2 }) x 27 arch/microblaze/include/asm/tlbflush.h #define __tlbie(x) { _tlbie(x); } x 166 arch/microblaze/include/asm/uaccess.h #define get_user(x, ptr) ({ \ x 169 arch/microblaze/include/asm/uaccess.h __get_user(x, __gu_ptr) : -EFAULT; \ x 172 arch/microblaze/include/asm/uaccess.h #define __get_user(x, ptr) \ x 194 arch/microblaze/include/asm/uaccess.h x = (__force __typeof__(*(ptr))) __gu_val; \ x 254 arch/microblaze/include/asm/uaccess.h #define put_user(x, ptr) \ x 255 arch/microblaze/include/asm/uaccess.h __put_user_check((x), (ptr), sizeof(*(ptr))) x 257 arch/microblaze/include/asm/uaccess.h #define __put_user_check(x, ptr, size) \ x 259 arch/microblaze/include/asm/uaccess.h typeof(*(ptr)) volatile __pu_val = x; \ x 290 arch/microblaze/include/asm/uaccess.h #define __put_user(x, ptr) \ x 292 arch/microblaze/include/asm/uaccess.h __typeof__(*(ptr)) volatile __gu_val = (x); \ x 28 arch/microblaze/include/uapi/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_MICROBLAZE \ x 29 arch/microblaze/include/uapi/asm/elf.h || (x)->e_machine == EM_MICROBLAZE_OLD) x 26 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c #define err_printk(x) \ x 27 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c early_printk("ERROR: Microblaze " x "-different for PVR and DTS\n"); x 29 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c #define err_printk(x) \ x 30 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c pr_info("ERROR: Microblaze " x "-different for PVR and DTS\n"); x 20 arch/microblaze/kernel/cpu/cpuinfo-static.c #define err_printk(x) \ x 21 arch/microblaze/kernel/cpu/cpuinfo-static.c early_printk("ERROR: Microblaze " x "-different for kernel and DTS\n"); x 64 arch/microblaze/kernel/signal.c #define COPY(x) {err |= __get_user(regs->x, &sc->regs.x); } x 125 arch/microblaze/kernel/signal.c #define COPY(x) {err |= __put_user(regs->x, &sc->regs.x); } x 181 arch/microblaze/mm/pgtable.c #define is_power_of_2(x) ((x) != 0 && (((x) & ((x) - 1)) == 0)) x 109 arch/mips/alchemy/common/clock.c #define IOMEM(x) ((void __iomem *)(KSEG1ADDR(CPHYSADDR(x)))) x 177 arch/mips/alchemy/common/clock.c #define to_auxpll_clk(x) container_of(x, struct alchemy_auxpll_clk, hw) x 367 arch/mips/alchemy/common/clock.c #define to_fgcs_clk(x) container_of(x, struct alchemy_fgcs_clk, hw) x 1033 arch/mips/alchemy/common/clock.c #define ERRCK(x) \ x 1034 arch/mips/alchemy/common/clock.c if (IS_ERR(x)) { \ x 1035 arch/mips/alchemy/common/clock.c ret = PTR_ERR(x); \ x 57 arch/mips/alchemy/common/dbdma.c #define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1)) x 43 arch/mips/alchemy/common/usb.c #define USBCFG_FLA(x) (((x) & 0x3f) << 8) x 116 arch/mips/alchemy/devboards/pm.c #define ATTRCMP(x) (0 == strcmp(attr->attr.name, #x)) x 192 arch/mips/alchemy/devboards/pm.c #define ATTR(x) \ x 193 arch/mips/alchemy/devboards/pm.c static struct kobj_attribute x##_attribute = \ x 194 arch/mips/alchemy/devboards/pm.c __ATTR(x, 0664, db1x_pmattr_show, \ x 210 arch/mips/alchemy/devboards/pm.c #define ATTR_LIST(x) & x ## _attribute.attr x 56 arch/mips/bcm47xx/irq.c #define DEFINE_HWx_IRQDISPATCH(x) \ x 57 arch/mips/bcm47xx/irq.c static void bcm47xx_hw ## x ## _irqdispatch(void) \ x 59 arch/mips/bcm47xx/irq.c do_IRQ(x); \ x 122 arch/mips/bcm47xx/prom.c #define ENTRYLO(x) ((pte_val(pfn_pte((x) >> _PFN_SHIFT, PAGE_KERNEL_UNCACHED)) >> 6) | 1) x 38 arch/mips/boot/compressed/decompress.c void error(char *x) x 41 arch/mips/boot/compressed/decompress.c puts(x); x 157 arch/mips/boot/elf2ecoff.c #define swab16(x) \ x 159 arch/mips/boot/elf2ecoff.c (((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \ x 160 arch/mips/boot/elf2ecoff.c (((uint16_t)(x) & (uint16_t)0xff00U) >> 8) )) x 162 arch/mips/boot/elf2ecoff.c #define swab32(x) \ x 164 arch/mips/boot/elf2ecoff.c (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \ x 165 arch/mips/boot/elf2ecoff.c (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \ x 166 arch/mips/boot/elf2ecoff.c (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \ x 167 arch/mips/boot/elf2ecoff.c (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24) )) x 185 arch/mips/boot/tools/relocs.c #define elf_half_to_cpu(x) elf16_to_cpu(x) x 186 arch/mips/boot/tools/relocs.c #define elf_word_to_cpu(x) elf32_to_cpu(x) x 196 arch/mips/boot/tools/relocs.c #define elf_addr_to_cpu(x) elf64_to_cpu(x) x 197 arch/mips/boot/tools/relocs.c #define elf_off_to_cpu(x) elf64_to_cpu(x) x 198 arch/mips/boot/tools/relocs.c #define elf_xword_to_cpu(x) elf64_to_cpu(x) x 200 arch/mips/boot/tools/relocs.c #define elf_addr_to_cpu(x) elf32_to_cpu(x) x 201 arch/mips/boot/tools/relocs.c #define elf_off_to_cpu(x) elf32_to_cpu(x) x 202 arch/mips/boot/tools/relocs.c #define elf_xword_to_cpu(x) elf32_to_cpu(x) x 32 arch/mips/boot/tools/relocs.h #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 22 arch/mips/fw/cfe/cfe_api.c #define NATIVE_FROM_XPTR(x) ((void *) (intptr_t) (x)) x 35 arch/mips/fw/sni/sniprom.c #define PROM_ENTRY(x) (PROM_VEC + (x)) x 56 arch/mips/fw/sni/sniprom.c #define _prom_putchar(x) __prom_putchar(___prom_putchar, O32_STK, x) x 57 arch/mips/fw/sni/sniprom.c #define _prom_getenv(x) __prom_getenv(___prom_getenv, O32_STK, x) x 58 arch/mips/fw/sni/sniprom.c #define _prom_get_memconf(x) __prom_get_memconf(___prom_get_memconf, O32_STK, x) x 62 arch/mips/fw/sni/sniprom.c #define _prom_putchar(x) ___prom_putchar(x) x 63 arch/mips/fw/sni/sniprom.c #define _prom_getenv(x) ___prom_getenv(x) x 64 arch/mips/fw/sni/sniprom.c #define _prom_get_memconf(x) ___prom_get_memconf(x) x 65 arch/mips/fw/sni/sniprom.c #define _prom_get_hwconf(x) ___prom_get_hwconf(x) x 22 arch/mips/include/asm/addrspace.h #define _CONST64_(x) x x 28 arch/mips/include/asm/addrspace.h #define _CONST64_(x) x ## L x 30 arch/mips/include/asm/addrspace.h #define _CONST64_(x) x ## LL x 139 arch/mips/include/asm/addrspace.h #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ x 141 arch/mips/include/asm/addrspace.h #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) x 142 arch/mips/include/asm/addrspace.h #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) x 576 arch/mips/include/asm/bitops.h static inline int fls(unsigned int x) x 580 arch/mips/include/asm/bitops.h if (!__builtin_constant_p(x) && x 587 arch/mips/include/asm/bitops.h : "=r" (x) x 588 arch/mips/include/asm/bitops.h : "r" (x)); x 590 arch/mips/include/asm/bitops.h return 32 - x; x 594 arch/mips/include/asm/bitops.h if (!x) x 596 arch/mips/include/asm/bitops.h if (!(x & 0xffff0000u)) { x 597 arch/mips/include/asm/bitops.h x <<= 16; x 600 arch/mips/include/asm/bitops.h if (!(x & 0xff000000u)) { x 601 arch/mips/include/asm/bitops.h x <<= 8; x 604 arch/mips/include/asm/bitops.h if (!(x & 0xf0000000u)) { x 605 arch/mips/include/asm/bitops.h x <<= 4; x 608 arch/mips/include/asm/bitops.h if (!(x & 0xc0000000u)) { x 609 arch/mips/include/asm/bitops.h x <<= 2; x 612 arch/mips/include/asm/bitops.h if (!(x & 0x80000000u)) { x 613 arch/mips/include/asm/bitops.h x <<= 1; x 7 arch/mips/include/asm/bitrev.h static __always_inline __attribute_const__ u32 __arch_bitrev32(u32 x) x 11 arch/mips/include/asm/bitrev.h asm("bitswap %0, %1" : "=r"(ret) : "r"(__swab32(x))); x 15 arch/mips/include/asm/bitrev.h static __always_inline __attribute_const__ u16 __arch_bitrev16(u16 x) x 19 arch/mips/include/asm/bitrev.h asm("bitswap %0, %1" : "=r"(ret) : "r"(__swab16(x))); x 23 arch/mips/include/asm/bitrev.h static __always_inline __attribute_const__ u8 __arch_bitrev8(u8 x) x 27 arch/mips/include/asm/bitrev.h asm("bitswap %0, %1" : "=r"(ret) : "r"(x)); x 81 arch/mips/include/asm/cmpxchg.h unsigned long __xchg(volatile void *ptr, unsigned long x, int size) x 86 arch/mips/include/asm/cmpxchg.h return __xchg_small(ptr, x, size); x 89 arch/mips/include/asm/cmpxchg.h return __xchg_asm("ll", "sc", (volatile u32 *)ptr, x); x 95 arch/mips/include/asm/cmpxchg.h return __xchg_asm("lld", "scd", (volatile u64 *)ptr, x); x 102 arch/mips/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 109 arch/mips/include/asm/cmpxchg.h __xchg((ptr), (unsigned long)(x), sizeof(*(ptr))); \ x 15 arch/mips/include/asm/cpufeature.h #define cpu_feature(x) ilog2(HWCAP_ ## x) x 25 arch/mips/include/asm/dec/prom.h #define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */ x 128 arch/mips/include/asm/dec/prom.h #define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, NULL, x) x 129 arch/mips/include/asm/dec/prom.h #define rex_slot_address(x) _rex_slot_address(__rex_slot_address, NULL, x) x 135 arch/mips/include/asm/dec/prom.h #define prom_getenv(x) _prom_getenv(__prom_getenv, NULL, x) x 136 arch/mips/include/asm/dec/prom.h #define prom_printf(x...) _prom_printf(__prom_printf, NULL, x) x 274 arch/mips/include/asm/elf.h #define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS) x 20 arch/mips/include/asm/inst.h #define MIPSInst(x) x x 23 arch/mips/include/asm/inst.h #define MIPSInst_OPCODE(x) (MIPSInst(x) >> I_OPCODE_SFT) x 26 arch/mips/include/asm/inst.h #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff) x 29 arch/mips/include/asm/inst.h #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT) x 32 arch/mips/include/asm/inst.h #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT) x 35 arch/mips/include/asm/inst.h #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff))) x 36 arch/mips/include/asm/inst.h #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff) x 39 arch/mips/include/asm/inst.h #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT) x 42 arch/mips/include/asm/inst.h #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT) x 45 arch/mips/include/asm/inst.h #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT) x 48 arch/mips/include/asm/inst.h #define MIPSInst_RE(x) ((MIPSInst(x) & 0x000007c0) >> I_RE_SFT) x 51 arch/mips/include/asm/inst.h #define MIPSInst_FUNC(x) (MIPSInst(x) & 0x0000003f) x 54 arch/mips/include/asm/inst.h #define MIPSInst_FFMT(x) ((MIPSInst(x) & 0x01e00000) >> I_FFMT_SFT) x 57 arch/mips/include/asm/inst.h #define MIPSInst_FT(x) ((MIPSInst(x) & 0x001f0000) >> I_FT_SFT) x 60 arch/mips/include/asm/inst.h #define MIPSInst_FS(x) ((MIPSInst(x) & 0x0000f800) >> I_FS_SFT) x 63 arch/mips/include/asm/inst.h #define MIPSInst_FD(x) ((MIPSInst(x) & 0x000007c0) >> I_FD_SFT) x 66 arch/mips/include/asm/inst.h #define MIPSInst_FR(x) ((MIPSInst(x) & 0x03e00000) >> I_FR_SFT) x 69 arch/mips/include/asm/inst.h #define MIPSInst_FMA_FUNC(x) ((MIPSInst(x) & 0x0000003c) >> I_FMA_FUNC_SFT) x 72 arch/mips/include/asm/inst.h #define MIPSInst_FMA_FFMT(x) (MIPSInst(x) & 0x00000003) x 43 arch/mips/include/asm/io.h # define __raw_ioswabb(a, x) (x) x 44 arch/mips/include/asm/io.h # define __raw_ioswabw(a, x) (x) x 45 arch/mips/include/asm/io.h # define __raw_ioswabl(a, x) (x) x 46 arch/mips/include/asm/io.h # define __raw_ioswabq(a, x) (x) x 47 arch/mips/include/asm/io.h # define ____raw_ioswabq(a, x) (x) x 50 arch/mips/include/asm/ip32/mace.h #define MACEPCI_CONTROL_INT(x) BIT(x) x 60 arch/mips/include/asm/ip32/mace.h #define MACEPCI_CONTROL_INV_INT(x) BIT(16+x) x 269 arch/mips/include/asm/kvm_host.h #define mips3_paddr_to_tlbpfn(x) \ x 270 arch/mips/include/asm/kvm_host.h (((unsigned long)(x) >> MIPS3_PG_SHIFT) & MIPS3_PG_FRAME) x 271 arch/mips/include/asm/kvm_host.h #define mips3_tlbpfn_to_paddr(x) \ x 272 arch/mips/include/asm/kvm_host.h ((unsigned long)((x) & MIPS3_PG_FRAME) << MIPS3_PG_SHIFT) x 283 arch/mips/include/asm/kvm_host.h #define TLB_IS_GLOBAL(x) ((x).tlb_lo[0] & (x).tlb_lo[1] & ENTRYLO_G) x 284 arch/mips/include/asm/kvm_host.h #define TLB_VPN2(x) ((x).tlb_hi & VPN2_MASK) x 285 arch/mips/include/asm/kvm_host.h #define TLB_ASID(x) ((x).tlb_hi & KVM_ENTRYHI_ASID) x 286 arch/mips/include/asm/kvm_host.h #define TLB_LO_IDX(x, va) (((va) >> PAGE_SHIFT) & 1) x 287 arch/mips/include/asm/kvm_host.h #define TLB_IS_VALID(x, va) ((x).tlb_lo[TLB_LO_IDX(x, va)] & ENTRYLO_V) x 288 arch/mips/include/asm/kvm_host.h #define TLB_IS_DIRTY(x, va) ((x).tlb_lo[TLB_LO_IDX(x, va)] & ENTRYLO_D) x 289 arch/mips/include/asm/kvm_host.h #define TLB_HI_VPN2_HIT(x, y) ((TLB_VPN2(x) & ~(x).tlb_mask) == \ x 290 arch/mips/include/asm/kvm_host.h ((y) & VPN2_MASK & ~(x).tlb_mask)) x 291 arch/mips/include/asm/kvm_host.h #define TLB_HI_ASID_HIT(x, y) (TLB_IS_GLOBAL(x) || \ x 292 arch/mips/include/asm/kvm_host.h TLB_ASID(x) == ((y) & KVM_ENTRYHI_ASID)) x 9 arch/mips/include/asm/linkage.h #define cond_syscall(x) asm(".weak\t" #x "\n" #x "\t=\tsys_ni_syscall") x 224 arch/mips/include/asm/mach-au1x00/au1000.h #define GPIC_CFG_IL_SET(x) (((x) & 3) << 2) x 469 arch/mips/include/asm/mach-au1x00/au1000.h #define SYS_WAKEMSK_GPIO(x) (1 << (x)) x 534 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_CMEM_CMBASE(x) (((x) & 0x3fff) << 14) x 535 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_CMEM_CMMASK(x) ((x) & 0x3fff) x 562 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_B2BMASK_B2BMASK(x) (((x) & 0xffff) << 16) x 563 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_B2BMASK_CCH(x) ((x) & 0xffff) /* 16 upper bits of class code */ x 564 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_B2BBASE0_VID_B0(x) (((x) & 0xffff) << 16) x 565 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_B2BBASE0_VID_SV(x) ((x) & 0xffff) x 566 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_B2BBASE1_SID_B1(x) (((x) & 0xffff) << 16) x 567 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_B2BBASE1_SID_SI(x) ((x) & 0xffff) x 568 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_MWMASKDEV_MWMASK(x) (((x) & 0xffff) << 16) x 569 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_MWMASKDEV_DEVID(x) ((x) & 0xffff) x 570 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_MWBASEREVCCL_BASE(x) (((x) & 0xffff) << 16) x 571 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_MWBASEREVCCL_REV(x) (((x) & 0xff) << 8) x 572 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_MWBASEREVCCL_CCL(x) ((x) & 0xff) x 573 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_ID_DID(x) (((x) & 0xffff) << 16) x 574 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_ID_VID(x) ((x) & 0xffff) x 575 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_STATCMD_STATUS(x) (((x) & 0xffff) << 16) x 576 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_STATCMD_CMD(x) ((x) & 0xffff) x 577 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_CLASSREV_CLASS(x) (((x) & 0x00ffffff) << 8) x 578 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_CLASSREV_REV(x) ((x) & 0xff) x 579 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_PARAM_BIST(x) (((x) & 0xff) << 24) x 580 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_PARAM_HT(x) (((x) & 0xff) << 16) x 581 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_PARAM_LT(x) (((x) & 0xff) << 8) x 582 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_PARAM_CLS(x) ((x) & 0xff) x 583 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_TIMEOUT_RETRIES(x) (((x) & 0xff) << 8) /* max retries */ x 584 arch/mips/include/asm/mach-au1x00/au1000.h #define PCI_TIMEOUT_TO(x) ((x) & 0xff) /* target ready timeout */ x 221 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_DEV2CUSTOM_ID(x, d) (((((x) & 0xFFFF) << 8) | 0x32000000) | \ x 223 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CUSTOM2DEV_ID(x) ((x) & 0xFF) x 225 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25) x 226 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20) x 233 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CMD0_SW(x) (((x) & 0x3) << 18) x 234 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CMD0_DW(x) (((x) & 0x3) << 16) x 241 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CMD0_DT(x) (((x) & 0x3) << 13) x 249 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CMD0_ST(x) (((x) & 0x3) << 0) x 262 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_CMD1_FL(x) (((x) & 0x3) << 22) x 268 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_SRC1_SB(x) (((x) & 0x3fff) << 14) x 270 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_SRC1_SS(x) (((x) & 0x3fff) << 0) x 276 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_DEST1_DB(x) (((x) & 0x3fff) << 14) x 278 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_DEST1_DS(x) (((x) & 0x3fff) << 0) x 284 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_SRC1_STS(x) (((x) & 3) << 30) x 285 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_DEST1_DTS(x) (((x) & 3) << 30) x 291 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_SRC1_SAM(x) (((x) & 3) << 28) x 292 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_DEST1_DAM(x) (((x) & 3) << 28) x 296 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_NXTPTR(x) ((x) >> 5) x 297 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h #define DSCR_GET_NXTPTR(x) ((x) << 5) x 93 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) x 94 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) x 101 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_AC97CFG_SET_LEN(x) (((((x) - 2) / 2) & 0xf) << 21) x 102 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) x 161 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_AC97CDC_ID(x) (((x) & 0x03) << 23) x 162 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) x 204 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16) x 221 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) x 222 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) x 300 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SPICFG_CLR_BAUD(x) ((x) & ~((0x3f) << 15)) x 301 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SPICFG_SET_BAUD(x) (((x) & 0x3f) << 15) x 303 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SPICFG_SET_DIV(x) (((x) & 0x03) << 13) x 314 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SPICFG_CLR_LEN(x) ((x) & ~((0x1f) << 4)) x 315 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SPICFG_SET_LEN(x) (((x-1) & 0x1f) << 4) x 387 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBCFG_SET_DIV(x) (((x) & 0x03) << 13) x 396 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBCFG_SET_SLV(x) (((x) & 0x7f) << 1) x 458 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBTMR_SET_TH(x) (((x) & 0x03) << 30) x 459 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBTMR_SET_PS(x) (((x) & 0x1f) << 25) x 460 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBTMR_SET_PU(x) (((x) & 0x1f) << 20) x 461 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBTMR_SET_SH(x) (((x) & 0x1f) << 15) x 462 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBTMR_SET_SU(x) (((x) & 0x1f) << 10) x 463 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBTMR_SET_CL(x) (((x) & 0x1f) << 5) x 464 arch/mips/include/asm/mach-au1x00/au1xxx_psc.h #define PSC_SMBTMR_SET_CH(x) (((x) & 0x1f) << 0) x 52 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define BCM_REGS_VA(x) ((void __iomem *)(x)) x 219 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10) x 223 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c) x 224 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10) x 225 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10) x 229 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10) x 233 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c) x 234 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10) x 235 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10) x 250 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_SENSE_6348(x) (1 << (x)) x 251 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_STAT_6348(x) (1 << (x + 5)) x 252 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_CLEAR_6348(x) (1 << (x + 10)) x 253 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_MASK_6348(x) (1 << (x + 15)) x 254 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_BOTHEDGE_6348(x) (1 << (x + 20)) x 255 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_LEVELSENSE_6348(x) (1 << (x + 25)) x 260 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_SENSE(x) (1 << (x)) x 261 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_STAT(x) (1 << (x + 4)) x 262 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_CLEAR(x) (1 << (x + 8)) x 263 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_MASK(x) (1 << (x + 12)) x 264 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_BOTHEDGE(x) (1 << (x + 16)) x 265 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define EXTIRQ_CFG_LEVELSENSE(x) (1 << (x + 20)) x 424 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define TIMER_IRQSTAT_TIMER_CAUSE(x) (1 << (x)) x 429 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define TIMER_IRQSTAT_TIMER_IR_EN(x) (1 << ((x) + 8)) x 435 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define TIMER_CTLx_REG(x) (0x4 + (x * 4)) x 641 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENET_PML_REG(x) (0x58 + (x) * 8) x 642 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENET_PMH_REG(x) (0x5c + (x) * 8) x 647 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENET_MIB_REG(x) (0x200 + (x) * 4) x 661 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_CFG_FLOWCH_MASK(x) (1 << ((x >> 1) + 1)) x 664 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_FLOWCL_REG(x) (0x4 + (x) * 6) x 667 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_FLOWCH_REG(x) (0x8 + (x) * 6) x 670 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_BUFALLOC_REG(x) (0xc + (x) * 6) x 681 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_CHANCFG_REG(x) (0x100 + (x) * 0x10) x 688 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_IR_REG(x) (0x104 + (x) * 0x10) x 694 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_IRMASK_REG(x) (0x108 + (x) * 0x10) x 697 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_MAXBURST_REG(x) (0x10C + (x) * 0x10) x 700 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_RSTART_REG(x) (0x200 + (x) * 0x10) x 703 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_SRAM2_REG(x) (0x204 + (x) * 0x10) x 706 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_SRAM3_REG(x) (0x208 + (x) * 0x10) x 709 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10) x 785 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETSW_PTCTRL_REG(x) (0x0 + (x)) x 804 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETSW_PORTOV_REG(x) (0x58 + (x)) x 829 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define ENETSW_MIB_REG(x) (0x2800 + (x) * 4) x 955 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define USBD_EVENT_IRQ_CFG_SHIFT(x) ((x & 0xf) << 1) x 956 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define USBD_EVENT_IRQ_CFG_MASK(x) (3 << USBD_EVENT_IRQ_CFG_SHIFT(x)) x 957 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define USBD_EVENT_IRQ_CFG_RISING(x) (0 << USBD_EVENT_IRQ_CFG_SHIFT(x)) x 958 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define USBD_EVENT_IRQ_CFG_FALLING(x) (1 << USBD_EVENT_IRQ_CFG_SHIFT(x)) x 1007 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define USBD_CSR_EP_REG(x) (0x84 + (x) * 4) x 1034 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define MPI_CSBASE_REG(x) (0x0 + (x) * 8) x 1058 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define MPI_CSCTL_REG(x) (0x4 + (x) * 8) x 1116 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define MPI_LOCINT_MASK(x) (1 << (x + 16)) x 1117 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define MPI_LOCINT_STAT(x) (1 << (x)) x 1241 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define M2M_SRC_REG(x) ((x) * 0x40 + 0x00) x 1242 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define M2M_DST_REG(x) ((x) * 0x40 + 0x04) x 1243 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define M2M_SIZE_REG(x) ((x) * 0x40 + 0x08) x 1245 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define M2M_CTRL_REG(x) ((x) * 0x40 + 0x0c) x 1255 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define M2M_STAT_REG(x) ((x) * 0x40 + 0x10) x 1259 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define M2M_SRCID_REG(x) ((x) * 0x40 + 0x14) x 1260 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h #define M2M_DSTID_REG(x) ((x) * 0x40 + 0x18) x 63 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h #define spin_lock_prefetch(x) prefetch(x) x 49 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define ioswabb(a, x) (x) x 50 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define __mem_ioswabb(a, x) (x) x 51 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define ioswabw(a, x) (__should_swizzle_bits(a) ? le16_to_cpu(x) : x) x 52 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define __mem_ioswabw(a, x) (x) x 53 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define ioswabl(a, x) (__should_swizzle_bits(a) ? le32_to_cpu(x) : x) x 54 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define __mem_ioswabl(a, x) (x) x 55 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define ioswabq(a, x) (__should_swizzle_bits(a) ? le64_to_cpu(x) : x) x 56 arch/mips/include/asm/mach-cavium-octeon/mangle-port.h # define __mem_ioswabq(a, x) (x) x 91 arch/mips/include/asm/mach-db1x00/bcsr.h #define BCSR_WHOAMI_DCID(x) ((x) & 0xf) x 92 arch/mips/include/asm/mach-db1x00/bcsr.h #define BCSR_WHOAMI_CPLD(x) (((x) >> 4) & 0xf) x 93 arch/mips/include/asm/mach-db1x00/bcsr.h #define BCSR_WHOAMI_BOARD(x) (((x) >> 8) & 0xf) x 20 arch/mips/include/asm/mach-dec/mc146818rtc.h #define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base) x 30 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabb(a, x) (x) x 31 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabb(a, x) (x) x 32 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabw(a, x) le16_to_cpu(x) x 33 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabw(a, x) (x) x 34 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabl(a, x) le32_to_cpu(x) x 35 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabl(a, x) (x) x 36 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabq(a, x) le64_to_cpu(x) x 37 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabq(a, x) (x) x 41 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabb(a, x) (x) x 42 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabb(a, x) (x) x 43 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabw(a, x) (x) x 44 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabw(a, x) cpu_to_le16(x) x 45 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabl(a, x) (x) x 46 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabl(a, x) cpu_to_le32(x) x 47 arch/mips/include/asm/mach-generic/mangle-port.h # define ioswabq(a, x) (x) x 48 arch/mips/include/asm/mach-generic/mangle-port.h # define __mem_ioswabq(a, x) cpu_to_le32(x) x 15 arch/mips/include/asm/mach-generic/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 85 arch/mips/include/asm/mach-generic/spaces.h #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) x 86 arch/mips/include/asm/mach-generic/spaces.h #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) x 87 arch/mips/include/asm/mach-generic/spaces.h #define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) x 16 arch/mips/include/asm/mach-ip27/mangle-port.h # define ioswabb(a, x) (x) x 17 arch/mips/include/asm/mach-ip27/mangle-port.h # define __mem_ioswabb(a, x) (x) x 18 arch/mips/include/asm/mach-ip27/mangle-port.h # define ioswabw(a, x) (x) x 19 arch/mips/include/asm/mach-ip27/mangle-port.h # define __mem_ioswabw(a, x) cpu_to_le16(x) x 20 arch/mips/include/asm/mach-ip27/mangle-port.h # define ioswabl(a, x) (x) x 21 arch/mips/include/asm/mach-ip27/mangle-port.h # define __mem_ioswabl(a, x) cpu_to_le32(x) x 22 arch/mips/include/asm/mach-ip27/mangle-port.h # define ioswabq(a, x) (x) x 23 arch/mips/include/asm/mach-ip27/mangle-port.h # define __mem_ioswabq(a, x) cpu_to_le32(x) x 26 arch/mips/include/asm/mach-ip27/spaces.h #define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK)) x 27 arch/mips/include/asm/mach-ip27/spaces.h #define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK)) x 17 arch/mips/include/asm/mach-ip32/mangle-port.h # define ioswabb(a, x) (x) x 18 arch/mips/include/asm/mach-ip32/mangle-port.h # define __mem_ioswabb(a, x) (x) x 19 arch/mips/include/asm/mach-ip32/mangle-port.h # define ioswabw(a, x) (x) x 20 arch/mips/include/asm/mach-ip32/mangle-port.h # define __mem_ioswabw(a, x) cpu_to_le16(x) x 21 arch/mips/include/asm/mach-ip32/mangle-port.h # define ioswabl(a, x) (x) x 22 arch/mips/include/asm/mach-ip32/mangle-port.h # define __mem_ioswabl(a, x) cpu_to_le32(x) x 23 arch/mips/include/asm/mach-ip32/mangle-port.h # define ioswabq(a, x) (x) x 24 arch/mips/include/asm/mach-ip32/mangle-port.h # define __mem_ioswabq(a, x) cpu_to_le32(x) x 19 arch/mips/include/asm/mach-jazz/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 20 arch/mips/include/asm/mach-jz4740/irq.h #define JZ4740_IRQ(x) (JZ4740_IRQ_BASE + (x)) x 47 arch/mips/include/asm/mach-jz4740/irq.h #define JZ4740_IRQ_DMA(x) (JZ4740_IRQ(NR_INTC_IRQS) + (x)) x 49 arch/mips/include/asm/mach-jz4740/irq.h #define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x)) x 50 arch/mips/include/asm/mach-jz4740/irq.h #define JZ4740_IRQ_GPIO(x) (JZ4740_IRQ(NR_INTC_IRQS + 16) + (x)) x 23 arch/mips/include/asm/mach-jz4740/timer.h #define JZ_REG_TIMER_DFR(x) (((x) * 0x10) + 0x30) x 24 arch/mips/include/asm/mach-jz4740/timer.h #define JZ_REG_TIMER_DHR(x) (((x) * 0x10) + 0x34) x 25 arch/mips/include/asm/mach-jz4740/timer.h #define JZ_REG_TIMER_CNT(x) (((x) * 0x10) + 0x38) x 26 arch/mips/include/asm/mach-jz4740/timer.h #define JZ_REG_TIMER_CTRL(x) (((x) * 0x10) + 0x3C) x 28 arch/mips/include/asm/mach-jz4740/timer.h #define JZ_TIMER_IRQ_HALF(x) BIT((x) + 0x10) x 29 arch/mips/include/asm/mach-jz4740/timer.h #define JZ_TIMER_IRQ_FULL(x) BIT(x) x 43 arch/mips/include/asm/mach-jz4740/timer.h #define JZ_TIMER_CTRL_PRESCALER(x) ((x) << JZ_TIMER_CTRL_PRESCALE_OFFSET) x 50 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y)) x 51 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x)) x 53 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define ltq_sys1_w32(x, y) ltq_w32((x), ltq_sys1_membase + (y)) x 54 arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h #define ltq_sys1_r32(x) ltq_r32(ltq_sys1_membase + (x)) x 22 arch/mips/include/asm/mach-lantiq/lantiq.h #define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y)) x 23 arch/mips/include/asm/mach-lantiq/lantiq.h #define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x)) x 24 arch/mips/include/asm/mach-lantiq/lantiq.h #define ltq_ebu_w32_mask(x, y, z) \ x 25 arch/mips/include/asm/mach-lantiq/lantiq.h ltq_w32_mask(x, y, ltq_ebu_membase + (z)) x 70 arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h #define ltq_cgu_w32(x, y) ltq_w32((x), ltq_cgu_membase + (y)) x 71 arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h #define ltq_cgu_r32(x) ltq_r32(ltq_cgu_membase + (x)) x 17 arch/mips/include/asm/mach-lantiq/xway/xway_dma.h #define LTQ_DMA_TX_OFFSET(x) ((x & 0x1f) << 23) /* data bytes offset */ x 18 arch/mips/include/asm/mach-lantiq/xway/xway_dma.h #define LTQ_DMA_RX_OFFSET(x) ((x & 0x7) << 23) /* data bytes offset */ x 15 arch/mips/include/asm/mach-loongson32/irq.h #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) x 32 arch/mips/include/asm/mach-loongson32/irq.h #define LS1X_IRQ(n, x) (LS1X_IRQ_BASE + (n << 5) + (x)) x 11 arch/mips/include/asm/mach-loongson32/regs-clk.h #define LS1X_CLK_REG(x) \ x 12 arch/mips/include/asm/mach-loongson32/regs-clk.h ((void __iomem *)KSEG1ADDR(LS1X_CLK_BASE + (x))) x 11 arch/mips/include/asm/mach-loongson32/regs-mux.h #define LS1X_MUX_REG(x) \ x 12 arch/mips/include/asm/mach-loongson32/regs-mux.h ((void __iomem *)KSEG1ADDR(LS1X_MUX_BASE + (x))) x 113 arch/mips/include/asm/mach-loongson32/regs-mux.h #define LS1X_CBUS_REG(n, x) \ x 114 arch/mips/include/asm/mach-loongson32/regs-mux.h ((void __iomem *)KSEG1ADDR(LS1X_CBUS_BASE + (n * 0x04) + (x))) x 11 arch/mips/include/asm/mach-loongson32/regs-rtc.h #define LS1X_RTC_REG(x) \ x 12 arch/mips/include/asm/mach-loongson32/regs-rtc.h ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + (x))) x 36 arch/mips/include/asm/mach-loongson64/irq.h #define LOONGSON_INT_COREx_INTy(x, y) (1<<(x) | 1<<(y+4)) /* route to int y of core x */ x 53 arch/mips/include/asm/mach-loongson64/loongson.h int x; \ x 54 arch/mips/include/asm/mach-loongson64/loongson.h for (x = 0; x < 100000; x++) \ x 58 arch/mips/include/asm/mach-loongson64/loongson.h #define LOONGSON_REG(x) \ x 59 arch/mips/include/asm/mach-loongson64/loongson.h (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x))) x 61 arch/mips/include/asm/mach-loongson64/loongson.h #define LOONGSON3_REG8(base, x) \ x 62 arch/mips/include/asm/mach-loongson64/loongson.h (*(volatile u8 *)((char *)TO_UNCAC(base) + (x))) x 64 arch/mips/include/asm/mach-loongson64/loongson.h #define LOONGSON3_REG32(base, x) \ x 65 arch/mips/include/asm/mach-loongson64/loongson.h (*(volatile u32 *)((char *)TO_UNCAC(base) + (x))) x 128 arch/mips/include/asm/mach-loongson64/loongson.h #define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x)) x 15 arch/mips/include/asm/mach-loongson64/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 17 arch/mips/include/asm/mach-malta/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 40 arch/mips/include/asm/mach-malta/spaces.h #define __pa_symbol(x) (RELOC_HIDE((unsigned long)(x), 0)) x 132 arch/mips/include/asm/mach-pmcs-msp71xx/msp_prom.h #define ppfinit(f, x...) \ x 135 arch/mips/include/asm/mach-pmcs-msp71xx/msp_prom.h printk(_f, ## x); \ x 122 arch/mips/include/asm/mach-pmcs-msp71xx/msp_usb.h #define to_mspusb_device(x) container_of((x), struct mspusb_device, dev) x 123 arch/mips/include/asm/mach-pmcs-msp71xx/msp_usb.h #define TO_HOST_ID(x) ((x) & 0x3) x 88 arch/mips/include/asm/mach-ralink/mt7620.h #define MT7620_GPIO_MODE_UART0(x) ((x) << MT7620_GPIO_MODE_UART0_SHIFT) x 119 arch/mips/include/asm/mach-ralink/rt305x.h #define RT305X_GPIO_MODE_UART0(x) ((x) << RT305X_GPIO_MODE_UART0_SHIFT) x 114 arch/mips/include/asm/mach-ralink/rt3883.h #define RT3883_GPIO_MODE_UART0(x) ((x) << RT3883_GPIO_MODE_UART0_SHIFT) x 87 arch/mips/include/asm/mach-rc32434/ddr.h #define RC32434_DDRC_MSK(x) BIT_TO_MASK(x) x 92 arch/mips/include/asm/mach-rc32434/ddr.h #define RC32434_DCST_MSK(x) BIT_TO_MASK(x) x 127 arch/mips/include/asm/mach-rc32434/ddr.h #define RC32434_LLFC_MSK(x) BIT_TO_MASK(x) x 137 arch/mips/include/asm/mach-rc32434/ddr.h #define RC32434_DLLED_MSK(x) BIT_TO_MASK(x) x 29 arch/mips/include/asm/mach-rc32434/prom.h #define PROM_ENTRY(x) (0xbfc00000 + ((x) * 8)) x 51 arch/mips/include/asm/mach-rc32434/rb.h #define BIT_TO_MASK(x) (1 << x) x 54 arch/mips/include/asm/mach-rc32434/timer.h #define RC32434_RTC_MSK(x) BIT_TO_MASK(x) x 15 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define ioswabb(a, x) (x) x 16 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define __mem_ioswabb(a, x) (x) x 17 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define ioswabw(a, x) le16_to_cpu(x) x 18 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define __mem_ioswabw(a, x) (x) x 19 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define ioswabl(a, x) le32_to_cpu(x) x 20 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define __mem_ioswabl(a, x) (x) x 21 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define ioswabq(a, x) le64_to_cpu(x) x 22 arch/mips/include/asm/mach-tx39xx/mangle-port.h #define __mem_ioswabq(a, x) (x) x 10 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define ioswabb(a, x) (x) x 11 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define __mem_ioswabb(a, x) (x) x 16 arch/mips/include/asm/mach-tx49xx/mangle-port.h extern u16 (*ioswabw)(volatile u16 *a, u16 x); x 17 arch/mips/include/asm/mach-tx49xx/mangle-port.h extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x); x 19 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define ioswabw(a, x) le16_to_cpu(x) x 20 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define __mem_ioswabw(a, x) (x) x 22 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define ioswabl(a, x) le32_to_cpu(x) x 23 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define __mem_ioswabl(a, x) (x) x 24 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define ioswabq(a, x) le64_to_cpu(x) x 25 arch/mips/include/asm/mach-tx49xx/mangle-port.h #define __mem_ioswabq(a, x) (x) x 27 arch/mips/include/asm/mips-boards/bonito64.h #define BONITO(x) (x) x 37 arch/mips/include/asm/mips-boards/bonito64.h #define BONITO(x) *(volatile u32 *)(_pcictrl_bonito + (x)) x 82 arch/mips/include/asm/mips-boards/bonito64.h #define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x)) x 91 arch/mips/include/asm/mips-boards/malta.h #define SMSC_WRITE(x, a) outb(x, a) x 27 arch/mips/include/asm/mipsregs.h #define __STR(x) #x x 30 arch/mips/include/asm/mipsregs.h #define STR(x) __STR(x) x 1149 arch/mips/include/asm/mipsregs.h #define get_isa16_mode(x) ((x) & 0x1) x 1150 arch/mips/include/asm/mipsregs.h #define msk_isa16_mode(x) ((x) & ~0x1) x 1151 arch/mips/include/asm/mipsregs.h #define set_isa16_mode(x) do { (x) |= 0x1; } while(0) x 1153 arch/mips/include/asm/mipsregs.h #define get_isa16_mode(x) 0 x 1154 arch/mips/include/asm/mipsregs.h #define msk_isa16_mode(x) (x) x 1155 arch/mips/include/asm/mipsregs.h #define set_isa16_mode(x) do { } while(0) x 2447 arch/mips/include/asm/mipsregs.h #define mtlo0(x) \ x 2456 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2459 arch/mips/include/asm/mipsregs.h #define mtlo1(x) \ x 2468 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2471 arch/mips/include/asm/mipsregs.h #define mtlo2(x) \ x 2480 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2483 arch/mips/include/asm/mipsregs.h #define mtlo3(x) \ x 2492 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2495 arch/mips/include/asm/mipsregs.h #define mthi0(x) \ x 2504 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2507 arch/mips/include/asm/mipsregs.h #define mthi1(x) \ x 2516 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2519 arch/mips/include/asm/mipsregs.h #define mthi2(x) \ x 2528 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2531 arch/mips/include/asm/mipsregs.h #define mthi3(x) \ x 2540 arch/mips/include/asm/mipsregs.h : "r" (x)); \ x 2633 arch/mips/include/asm/mipsregs.h #define mtlo0(x) _dsp_mtlo(x, 0) x 2634 arch/mips/include/asm/mipsregs.h #define mtlo1(x) _dsp_mtlo(x, 1) x 2635 arch/mips/include/asm/mipsregs.h #define mtlo2(x) _dsp_mtlo(x, 2) x 2636 arch/mips/include/asm/mipsregs.h #define mtlo3(x) _dsp_mtlo(x, 3) x 2638 arch/mips/include/asm/mipsregs.h #define mthi0(x) _dsp_mthi(x, 0) x 2639 arch/mips/include/asm/mipsregs.h #define mthi1(x) _dsp_mthi(x, 1) x 2640 arch/mips/include/asm/mipsregs.h #define mthi2(x) _dsp_mthi(x, 2) x 2641 arch/mips/include/asm/mipsregs.h #define mthi3(x) _dsp_mthi(x, 3) x 134 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_PLL_CTRL0_DEVX(x) (0x248 + (x) * 4) x 135 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_PLL_CTRL1_DEVX(x) (0x249 + (x) * 4) x 136 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_PLL_CTRL2_DEVX(x) (0x24a + (x) * 4) x 137 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_PLL_CTRL3_DEVX(x) (0x24b + (x) * 4) x 168 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_9XX_PLL_CTRL0_DEVX(x) (0x148 + (x) * 4) x 169 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_9XX_PLL_CTRL1_DEVX(x) (0x149 + (x) * 4) x 170 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_9XX_PLL_CTRL2_DEVX(x) (0x14a + (x) * 4) x 171 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define SYS_9XX_PLL_CTRL3_DEVX(x) (0x14b + (x) * 4) x 317 arch/mips/include/asm/octeon/cvmx-bootinfo.h #define ENUM_BRD_TYPE_CASE(x) \ x 318 arch/mips/include/asm/octeon/cvmx-bootinfo.h case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ x 406 arch/mips/include/asm/octeon/cvmx-bootinfo.h #define ENUM_CHIP_TYPE_CASE(x) \ x 407 arch/mips/include/asm/octeon/cvmx-bootinfo.h case x: return(#x + 15); /* Skip CVMX_CHIP_TYPE */ x 55 arch/mips/include/asm/octeon/cvmx-config.h #define CVMX_FAU_REG_64_ADDR(x) ((x << 3) + CVMX_FAU_REG_64_START) x 61 arch/mips/include/asm/octeon/cvmx-config.h #define CVMX_FAU_REG_32_ADDR(x) ((x << 2) + CVMX_FAU_REG_32_START) x 67 arch/mips/include/asm/octeon/cvmx-config.h #define CVMX_FAU_REG_16_ADDR(x) ((x << 1) + CVMX_FAU_REG_16_START) x 73 arch/mips/include/asm/octeon/cvmx-config.h #define CVMX_FAU_REG_8_ADDR(x) ((x) + CVMX_FAU_REG_8_START) x 46 arch/mips/include/asm/octeon/cvmx-wqe.h #define OCT_TAG_TYPE_STRING(x) \ x 47 arch/mips/include/asm/octeon/cvmx-wqe.h (((x) == CVMX_POW_TAG_TYPE_ORDERED) ? "ORDERED" : \ x 48 arch/mips/include/asm/octeon/cvmx-wqe.h (((x) == CVMX_POW_TAG_TYPE_ATOMIC) ? "ATOMIC" : \ x 49 arch/mips/include/asm/octeon/cvmx-wqe.h (((x) == CVMX_POW_TAG_TYPE_NULL) ? "NULL" : \ x 106 arch/mips/include/asm/octeon/cvmx.h #define CVMX_TMP_STR(x) CVMX_TMP_STR2(x) x 107 arch/mips/include/asm/octeon/cvmx.h #define CVMX_TMP_STR2(x) #x x 316 arch/mips/include/asm/octeon/octeon-model.h #define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z))) x 382 arch/mips/include/asm/octeon/octeon-model.h #define OCTEON_IS_MODEL(x) __octeon_is_model_runtime__(x) x 28 arch/mips/include/asm/paccess.h #define put_dbe(x, ptr) __put_dbe((x), (ptr), sizeof(*(ptr))) x 29 arch/mips/include/asm/paccess.h #define get_dbe(x, ptr) __get_dbe((x), (ptr), sizeof(*(ptr))) x 32 arch/mips/include/asm/paccess.h #define __mp(x) (*(struct __large_pstruct *)(x)) x 34 arch/mips/include/asm/paccess.h #define __get_dbe(x, ptr, size) \ x 49 arch/mips/include/asm/paccess.h x = (__typeof__(*(ptr))) __gu_val; \ x 74 arch/mips/include/asm/paccess.h #define __put_dbe(x, ptr, size) \ x 79 arch/mips/include/asm/paccess.h __pu_val = (x); \ x 125 arch/mips/include/asm/page.h #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) x 126 arch/mips/include/asm/page.h #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) x 129 arch/mips/include/asm/page.h #define pte_val(x) ((x).pte) x 130 arch/mips/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 134 arch/mips/include/asm/page.h #define pte_val(x) ((x).pte) x 135 arch/mips/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 148 arch/mips/include/asm/page.h #define pgd_val(x) ((x).pgd) x 149 arch/mips/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 155 arch/mips/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 156 arch/mips/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 157 arch/mips/include/asm/page.h #define pte_pgprot(x) __pgprot(pte_val(x) & ~_PFN_MASK) x 166 arch/mips/include/asm/page.h #define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) x 171 arch/mips/include/asm/page.h static inline unsigned long ___pa(unsigned long x) x 179 arch/mips/include/asm/page.h return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); x 189 arch/mips/include/asm/page.h return CPHYSADDR(x); x 196 arch/mips/include/asm/page.h return x - PAGE_OFFSET + PHYS_OFFSET; x 198 arch/mips/include/asm/page.h #define __pa(x) ___pa((unsigned long)(x)) x 199 arch/mips/include/asm/page.h #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) x 216 arch/mips/include/asm/page.h #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) x 25 arch/mips/include/asm/pci/bridge.h #define IOPG(x) ((x) >> IOPFNSHIFT) x 26 arch/mips/include/asm/pci/bridge.h #define IOPGOFF(x) ((x) & (IOPGSIZE-1)) x 341 arch/mips/include/asm/pci/bridge.h #define BRIDGE_INT_ADDR(x) (BRIDGE_INT_ADDR0+(x)*BRIDGE_INT_ADDR_OFF) x 345 arch/mips/include/asm/pci/bridge.h #define BRIDGE_DEVICE(x) (BRIDGE_DEVICE0+(x)*BRIDGE_DEVICE_OFF) x 349 arch/mips/include/asm/pci/bridge.h #define BRIDGE_WR_REQ_BUF(x) (BRIDGE_WR_REQ_BUF0+(x)*BRIDGE_WR_REQ_BUF_OFF) x 386 arch/mips/include/asm/pci/bridge.h #define BRIDGE_DEVIO(x) ((x)<=1 ? BRIDGE_DEVIO0+(x)*BRIDGE_DEVIO_2MB : BRIDGE_DEVIO2+((x)-2)*BRIDGE_DEVIO_1MB) x 423 arch/mips/include/asm/pci/bridge.h #define BRIDGE_CTRL_RST_PIN(x) (BRIDGE_CTRL_RST(0x1 << (x))) x 453 arch/mips/include/asm/pci/bridge.h #define BRIDGE_RESP_ERRUPPR_BUFNUM(x) \ x 454 arch/mips/include/asm/pci/bridge.h (((x) & BRIDGE_RESP_ERRUPPR_BUFNUM_MASK) >> \ x 457 arch/mips/include/asm/pci/bridge.h #define BRIDGE_RESP_ERRUPPR_DEVICE(x) \ x 458 arch/mips/include/asm/pci/bridge.h (((x) & BRIDGE_RESP_ERRUPPR_DEVNUM_MASK) >> \ x 470 arch/mips/include/asm/pci/bridge.h #define BRIDGE_ARB_REQ_WAIT_TICK(x) ((x) << 16) x 472 arch/mips/include/asm/pci/bridge.h #define BRIDGE_ARB_REQ_WAIT_EN(x) ((x) << 8) x 483 arch/mips/include/asm/pci/bridge.h #define BRIDGE_BUS_PCI_RETRY_HLD(x) ((x) << 16) x 486 arch/mips/include/asm/pci/bridge.h #define BRIDGE_BUS_PCI_RETRY_CNT(x) ((x) << 0) x 516 arch/mips/include/asm/pci/bridge.h #define BRIDGE_ISR_INT(x) (0x1 << (x)) x 580 arch/mips/include/asm/pci/bridge.h #define BRIDGE_IMR_INT(x) BRIDGE_ISR_INT(x) x 691 arch/mips/include/asm/pci/bridge.h #define BRIDGE_INTMODE_CLR_PKT_EN(x) (0x1 << (x)) x 759 arch/mips/include/asm/pci/bridge.h #define IS_PCI32_LOCAL(x) ((ulong_t)(x) < PCI32_MAPPED_BASE) x 760 arch/mips/include/asm/pci/bridge.h #define IS_PCI32_MAPPED(x) ((ulong_t)(x) < PCI32_DIRECT_BASE && \ x 761 arch/mips/include/asm/pci/bridge.h (ulong_t)(x) >= PCI32_MAPPED_BASE) x 762 arch/mips/include/asm/pci/bridge.h #define IS_PCI32_DIRECT(x) ((ulong_t)(x) >= PCI32_MAPPED_BASE) x 763 arch/mips/include/asm/pci/bridge.h #define IS_PCI64(x) ((ulong_t)(x) >= PCI64_BASE) x 778 arch/mips/include/asm/pci/bridge.h #define IS_GIO_LOCAL(x) ((ulong_t)(x) < GIO_MAPPED_BASE) x 779 arch/mips/include/asm/pci/bridge.h #define IS_GIO_MAPPED(x) ((ulong_t)(x) < GIO_DIRECT_BASE && \ x 780 arch/mips/include/asm/pci/bridge.h (ulong_t)(x) >= GIO_MAPPED_BASE) x 781 arch/mips/include/asm/pci/bridge.h #define IS_GIO_DIRECT(x) ((ulong_t)(x) >= GIO_MAPPED_BASE) x 78 arch/mips/include/asm/pgalloc.h #define __pmd_free_tlb(tlb, x, addr) pmd_free((tlb)->mm, x) x 104 arch/mips/include/asm/pgalloc.h #define __pud_free_tlb(tlb, x, addr) pud_free((tlb)->mm, x) x 158 arch/mips/include/asm/pgtable-32.h #define pte_pfn(x) (((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT)) x 173 arch/mips/include/asm/pgtable-32.h #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) x 188 arch/mips/include/asm/pgtable-32.h #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2))) x 191 arch/mips/include/asm/pgtable-32.h #define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT)) x 197 arch/mips/include/asm/pgtable-32.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 227 arch/mips/include/asm/pgtable-32.h #define __swp_type(x) (((x).val >> 10) & 0x1f) x 228 arch/mips/include/asm/pgtable-32.h #define __swp_offset(x) ((x).val >> 15) x 231 arch/mips/include/asm/pgtable-32.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 238 arch/mips/include/asm/pgtable-32.h #define __swp_type(x) (((x).val >> 4) & 0x1f) x 239 arch/mips/include/asm/pgtable-32.h #define __swp_offset(x) ((x).val >> 9) x 242 arch/mips/include/asm/pgtable-32.h #define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val }) x 247 arch/mips/include/asm/pgtable-32.h #define __swp_type(x) (((x).val >> 2) & 0x1f) x 248 arch/mips/include/asm/pgtable-32.h #define __swp_offset(x) ((x).val >> 7) x 251 arch/mips/include/asm/pgtable-32.h #define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val }) x 261 arch/mips/include/asm/pgtable-32.h #define __swp_type(x) (((x).val >> 8) & 0x1f) x 262 arch/mips/include/asm/pgtable-32.h #define __swp_offset(x) ((x).val >> 13) x 265 arch/mips/include/asm/pgtable-32.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 183 arch/mips/include/asm/pgtable-64.h #define pud_val(x) ((x).pud) x 184 arch/mips/include/asm/pgtable-64.h #define __pud(x) ((pud_t) { (x) }) x 242 arch/mips/include/asm/pgtable-64.h #define pmd_val(x) ((x).pmd) x 243 arch/mips/include/asm/pgtable-64.h #define __pmd(x) ((pmd_t) { (x) } ) x 311 arch/mips/include/asm/pgtable-64.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 314 arch/mips/include/asm/pgtable-64.h #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2))) x 317 arch/mips/include/asm/pgtable-64.h #define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT)) x 375 arch/mips/include/asm/pgtable-64.h #define __swp_type(x) (((x).val >> 16) & 0xff) x 376 arch/mips/include/asm/pgtable-64.h #define __swp_offset(x) ((x).val >> 24) x 379 arch/mips/include/asm/pgtable-64.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 420 arch/mips/include/asm/processor.h #define prefetch(x) __builtin_prefetch((x), 0, 1) x 423 arch/mips/include/asm/processor.h #define prefetchw(x) __builtin_prefetch((x), 1, 1) x 75 arch/mips/include/asm/sgi/gio.h #define GIO_ID(x) (x & 0x7f) x 77 arch/mips/include/asm/sgi/gio.h #define GIO_REV(x) ((x >> 8) & 0xff) x 80 arch/mips/include/asm/sgi/gio.h #define GIO_VENDOR_CODE(x) ((x >> 18) & 0x3fff) x 141 arch/mips/include/asm/sgi/ioc.h #define SGIOC_SYSID_BOARDREV(x) (((x) & 0x1e) >> 1) x 142 arch/mips/include/asm/sgi/ioc.h #define SGIOC_SYSID_CHIPREV(x) (((x) & 0xe0) >> 5) x 260 arch/mips/include/asm/sibyte/bcm1480_int.h #define V_BCM1480_INT_HT_INTMSG(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_INTMSG) x 261 arch/mips/include/asm/sibyte/bcm1480_int.h #define G_BCM1480_INT_HT_INTMSG(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_INTMSG, M_BCM1480_INT_HT_INTMSG) x 282 arch/mips/include/asm/sibyte/bcm1480_int.h #define V_BCM1480_INT_HT_INTDEST(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_INTDEST) x 283 arch/mips/include/asm/sibyte/bcm1480_int.h #define G_BCM1480_INT_HT_INTDEST(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_INTDEST, M_BCM1480_INT_HT_INTDEST) x 287 arch/mips/include/asm/sibyte/bcm1480_int.h #define V_BCM1480_INT_HT_VECTOR(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_VECTOR) x 288 arch/mips/include/asm/sibyte/bcm1480_int.h #define G_BCM1480_INT_HT_VECTOR(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_VECTOR, M_BCM1480_INT_HT_VECTOR) x 31 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_INDEX) x 32 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_INDEX, M_BCM1480_L2C_MGMT_INDEX) x 36 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_WAY) x 37 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_WAY, M_BCM1480_L2C_MGMT_WAY) x 44 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG) x 45 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG, M_BCM1480_L2C_MGMT_ECC_DIAG) x 62 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_INDEX) x 63 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_INDEX, M_BCM1480_L2C_TAG_INDEX) x 68 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_TAG) x 69 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_TAG, M_BCM1480_L2C_TAG_TAG) x 73 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_ECC) x 74 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_ECC, M_BCM1480_L2C_TAG_ECC) x 78 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_WAY) x 79 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_WAY, M_BCM1480_L2C_TAG_WAY) x 86 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define V_BCM1480_L2C_DATA_ECC(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_DATA_ECC) x 87 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_DATA_ECC(x) _SB_GETVALUE(x, S_BCM1480_L2C_DATA_ECC, M_BCM1480_L2C_DATA_ECC) x 96 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC0_WAY_REMOTE(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_WAY_REMOTE, M_BCM1480_L2C_MISC0_WAY_REMOTE) x 100 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC0_WAY_LOCAL(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_WAY_LOCAL, M_BCM1480_L2C_MISC0_WAY_LOCAL) x 104 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC0_WAY_ENABLE(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_WAY_ENABLE, M_BCM1480_L2C_MISC0_WAY_ENABLE) x 108 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC0_CACHE_DISABLE(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_CACHE_DISABLE, M_BCM1480_L2C_MISC0_CACHE_DISABLE) x 112 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC0_CACHE_QUAD(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_CACHE_QUAD, M_BCM1480_L2C_MISC0_CACHE_QUAD) x 127 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC1_WAY_AGENT_0(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_0, M_BCM1480_L2C_MISC1_WAY_AGENT_0) x 131 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC1_WAY_AGENT_1(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_1, M_BCM1480_L2C_MISC1_WAY_AGENT_1) x 135 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC1_WAY_AGENT_2(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_2, M_BCM1480_L2C_MISC1_WAY_AGENT_2) x 139 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC1_WAY_AGENT_3(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_3, M_BCM1480_L2C_MISC1_WAY_AGENT_3) x 143 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC1_WAY_AGENT_4(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_4, M_BCM1480_L2C_MISC1_WAY_AGENT_4) x 152 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC2_WAY_AGENT_8(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC2_WAY_AGENT_8, M_BCM1480_L2C_MISC2_WAY_AGENT_8) x 156 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC2_WAY_AGENT_9(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC2_WAY_AGENT_9, M_BCM1480_L2C_MISC2_WAY_AGENT_9) x 160 arch/mips/include/asm/sibyte/bcm1480_l2c.h #define G_BCM1480_L2C_MISC2_WAY_AGENT_A(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC2_WAY_AGENT_A, M_BCM1480_L2C_MISC2_WAY_AGENT_A) x 31 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0) x 32 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV0) x 37 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1) x 38 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV1) x 43 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV2) x 44 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV2, M_BCM1480_MC_INTLV2) x 49 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS_MODE) x 50 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_CS_MODE, M_BCM1480_MC_CS_MODE) x 72 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_START) x 73 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_START, M_BCM1480_MC_CS0_START) x 77 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS1_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS1_START) x 78 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS1_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS1_START, M_BCM1480_MC_CS1_START) x 82 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS2_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS2_START) x 83 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS2_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS2_START, M_BCM1480_MC_CS2_START) x 87 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS3_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS3_START) x 88 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS3_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS3_START, M_BCM1480_MC_CS3_START) x 96 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS0_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_END) x 97 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS0_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_END, M_BCM1480_MC_CS0_END) x 101 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS1_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS1_END) x 102 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS1_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS1_END, M_BCM1480_MC_CS1_END) x 106 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS2_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS2_END) x 107 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS2_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS2_END, M_BCM1480_MC_CS2_END) x 111 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS3_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS3_END) x 112 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS3_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS3_END, M_BCM1480_MC_CS3_END) x 120 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW00(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW00) x 121 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW00(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW00, M_BCM1480_MC_ROW00) x 125 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW01(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW01) x 126 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW01(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW01, M_BCM1480_MC_ROW01) x 130 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW02(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW02) x 131 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW02(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW02, M_BCM1480_MC_ROW02) x 135 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW03(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW03) x 136 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW03(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW03, M_BCM1480_MC_ROW03) x 140 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW04(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW04) x 141 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW04(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW04, M_BCM1480_MC_ROW04) x 145 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW05(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW05) x 146 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW05(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW05, M_BCM1480_MC_ROW05) x 150 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW06(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW06) x 151 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW06(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW06, M_BCM1480_MC_ROW06) x 155 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW07(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW07) x 156 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW07(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW07, M_BCM1480_MC_ROW07) x 164 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW08(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW08) x 165 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW08(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW08, M_BCM1480_MC_ROW08) x 169 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW09(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW09) x 170 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW09(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW09, M_BCM1480_MC_ROW09) x 174 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW10(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW10) x 175 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW10(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW10, M_BCM1480_MC_ROW10) x 179 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW11(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW11) x 180 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW11(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW11, M_BCM1480_MC_ROW11) x 184 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW12(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW12) x 185 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW12(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW12, M_BCM1480_MC_ROW12) x 189 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW13(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW13) x 190 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW13(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW13, M_BCM1480_MC_ROW13) x 194 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ROW14(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW14) x 195 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ROW14(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW14, M_BCM1480_MC_ROW14) x 205 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL00(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL00) x 206 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL00(x) _SB_GETVALUE(x, S_BCM1480_MC_COL00, M_BCM1480_MC_COL00) x 210 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL01(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL01) x 211 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL01(x) _SB_GETVALUE(x, S_BCM1480_MC_COL01, M_BCM1480_MC_COL01) x 215 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL02(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL02) x 216 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL02(x) _SB_GETVALUE(x, S_BCM1480_MC_COL02, M_BCM1480_MC_COL02) x 220 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL03(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL03) x 221 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL03(x) _SB_GETVALUE(x, S_BCM1480_MC_COL03, M_BCM1480_MC_COL03) x 225 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL04(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL04) x 226 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL04(x) _SB_GETVALUE(x, S_BCM1480_MC_COL04, M_BCM1480_MC_COL04) x 230 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL05(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL05) x 231 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL05(x) _SB_GETVALUE(x, S_BCM1480_MC_COL05, M_BCM1480_MC_COL05) x 235 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL06(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL06) x 236 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL06(x) _SB_GETVALUE(x, S_BCM1480_MC_COL06, M_BCM1480_MC_COL06) x 240 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL07(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL07) x 241 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL07(x) _SB_GETVALUE(x, S_BCM1480_MC_COL07, M_BCM1480_MC_COL07) x 249 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL08(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL08) x 250 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL08(x) _SB_GETVALUE(x, S_BCM1480_MC_COL08, M_BCM1480_MC_COL08) x 254 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL09(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL09) x 255 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL09(x) _SB_GETVALUE(x, S_BCM1480_MC_COL09, M_BCM1480_MC_COL09) x 261 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL11(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL11) x 262 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL11(x) _SB_GETVALUE(x, S_BCM1480_MC_COL11, M_BCM1480_MC_COL11) x 266 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL12(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL12) x 267 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL12(x) _SB_GETVALUE(x, S_BCM1480_MC_COL12, M_BCM1480_MC_COL12) x 271 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL13(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL13) x 272 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL13(x) _SB_GETVALUE(x, S_BCM1480_MC_COL13, M_BCM1480_MC_COL13) x 276 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COL14(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL14) x 277 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COL14(x) _SB_GETVALUE(x, S_BCM1480_MC_COL14, M_BCM1480_MC_COL14) x 287 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS01_BANK0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS01_BANK0) x 288 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS01_BANK0(x) _SB_GETVALUE(x, S_BCM1480_MC_CS01_BANK0, M_BCM1480_MC_CS01_BANK0) x 292 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS01_BANK1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS01_BANK1) x 293 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS01_BANK1(x) _SB_GETVALUE(x, S_BCM1480_MC_CS01_BANK1, M_BCM1480_MC_CS01_BANK1) x 297 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS01_BANK2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS01_BANK2) x 298 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS01_BANK2(x) _SB_GETVALUE(x, S_BCM1480_MC_CS01_BANK2, M_BCM1480_MC_CS01_BANK2) x 306 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS23_BANK0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS23_BANK0) x 307 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS23_BANK0(x) _SB_GETVALUE(x, S_BCM1480_MC_CS23_BANK0, M_BCM1480_MC_CS23_BANK0) x 311 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS23_BANK1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS23_BANK1) x 312 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS23_BANK1(x) _SB_GETVALUE(x, S_BCM1480_MC_CS23_BANK1, M_BCM1480_MC_CS23_BANK1) x 316 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS23_BANK2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS23_BANK2) x 317 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS23_BANK2(x) _SB_GETVALUE(x, S_BCM1480_MC_CS23_BANK2, M_BCM1480_MC_CS23_BANK2) x 327 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_COMMAND(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COMMAND) x 328 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_COMMAND(x) _SB_GETVALUE(x, S_BCM1480_MC_COMMAND, M_BCM1480_MC_COMMAND) x 373 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CS(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0) x 374 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CS(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0, M_BCM1480_MC_CS0) x 384 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_EMODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_EMODE) x 385 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_EMODE(x) _SB_GETVALUE(x, S_BCM1480_MC_EMODE, M_BCM1480_MC_EMODE) x 390 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_MODE) x 391 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_MODE, M_BCM1480_MC_MODE) x 396 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DRAM_TYPE) x 397 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DRAM_TYPE(x) _SB_GETVALUE(x, S_BCM1480_MC_DRAM_TYPE, M_BCM1480_MC_DRAM_TYPE) x 422 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_PG_POLICY(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PG_POLICY) x 423 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_PG_POLICY(x) _SB_GETVALUE(x, S_BCM1480_MC_PG_POLICY, M_BCM1480_MC_PG_POLICY) x 445 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CLK_RATIO(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CLK_RATIO) x 446 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CLK_RATIO(x) _SB_GETVALUE(x, S_BCM1480_MC_CLK_RATIO, M_BCM1480_MC_CLK_RATIO) x 452 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_REF_RATE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_REF_RATE) x 453 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_REF_RATE(x) _SB_GETVALUE(x, S_BCM1480_MC_REF_RATE, M_BCM1480_MC_REF_RATE) x 510 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ODT0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT0) x 514 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ODT2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT2) x 518 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ODT4(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT4) x 522 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ODT6(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT6) x 531 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ADDR_COARSE_ADJ) x 532 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_ADDR_COARSE_ADJ, M_BCM1480_MC_ADDR_COARSE_ADJ) x 538 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ADDR_FREQ_RANGE) x 539 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_ADDR_FREQ_RANGE, M_BCM1480_MC_ADDR_FREQ_RANGE) x 545 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ADDR_FINE_ADJ) x 546 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_ADDR_FINE_ADJ, M_BCM1480_MC_ADDR_FINE_ADJ) x 551 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQI_COARSE_ADJ) x 552 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQI_COARSE_ADJ, M_BCM1480_MC_DQI_COARSE_ADJ) x 558 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQI_FREQ_RANGE) x 559 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_DQI_FREQ_RANGE, M_BCM1480_MC_DQI_FREQ_RANGE) x 565 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DQI_FINE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQI_FINE_ADJ) x 566 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DQI_FINE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQI_FINE_ADJ, M_BCM1480_MC_DQI_FINE_ADJ) x 571 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQO_COARSE_ADJ) x 572 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQO_COARSE_ADJ, M_BCM1480_MC_DQO_COARSE_ADJ) x 578 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQO_FREQ_RANGE) x 579 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_DQO_FREQ_RANGE, M_BCM1480_MC_DQO_FREQ_RANGE) x 585 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DQO_FINE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQO_FINE_ADJ) x 586 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DQO_FINE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQO_FINE_ADJ, M_BCM1480_MC_DQO_FINE_ADJ) x 592 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DLL_PDSEL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_PDSEL) x 593 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DLL_PDSEL(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_PDSEL, M_BCM1480_MC_DLL_PDSEL) x 602 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_DEFAULT) x 603 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DLL_DEFAULT(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_DEFAULT, M_BCM1480_MC_DLL_DEFAULT) x 609 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DLL_REGCTRL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_REGCTRL) x 610 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DLL_REGCTRL(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_REGCTRL, M_BCM1480_MC_DLL_REGCTRL) x 617 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_FREQ_RANGE) x 618 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_FREQ_RANGE, M_BCM1480_MC_DLL_FREQ_RANGE) x 624 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DLL_STEP_SIZE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_STEP_SIZE) x 625 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DLL_STEP_SIZE(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_STEP_SIZE, M_BCM1480_MC_DLL_STEP_SIZE) x 631 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_DLL_BGCTRL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_BGCTRL) x 632 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_DLL_BGCTRL(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_BGCTRL, M_BCM1480_MC_DLL_BGCTRL) x 644 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_MAKEVALUE(x, S_BCM1480_MC_RTT_BYP_PULLDOWN) x 645 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_GETVALUE(x, S_BCM1480_MC_RTT_BYP_PULLDOWN, M_BCM1480_MC_RTT_BYP_PULLDOWN) x 649 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_RTT_BYP_PULLUP) x 650 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_GETVALUE(x, S_BCM1480_MC_RTT_BYP_PULLUP, M_BCM1480_MC_RTT_BYP_PULLUP) x 657 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLDOWN) x 658 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLDOWN, M_BCM1480_MC_PVT_BYP_C1_PULLDOWN) x 662 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLUP) x 663 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLUP, M_BCM1480_MC_PVT_BYP_C1_PULLUP) x 667 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLDOWN) x 668 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLDOWN, M_BCM1480_MC_PVT_BYP_C2_PULLDOWN) x 672 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLUP) x 673 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLUP, M_BCM1480_MC_PVT_BYP_C2_PULLUP) x 708 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRCD(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRCD) x 709 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRCD(x) _SB_GETVALUE(x, S_BCM1480_MC_tRCD, M_BCM1480_MC_tRCD) x 715 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tCL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tCL) x 716 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tCL(x) _SB_GETVALUE(x, S_BCM1480_MC_tCL, M_BCM1480_MC_tCL) x 724 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tWR(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tWR) x 725 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tWR(x) _SB_GETVALUE(x, S_BCM1480_MC_tWR, M_BCM1480_MC_tWR) x 731 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tCwD(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tCwD) x 732 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tCwD(x) _SB_GETVALUE(x, S_BCM1480_MC_tCwD, M_BCM1480_MC_tCwD) x 738 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRP) x 739 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRP(x) _SB_GETVALUE(x, S_BCM1480_MC_tRP, M_BCM1480_MC_tRP) x 745 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRRD(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRRD) x 746 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRRD(x) _SB_GETVALUE(x, S_BCM1480_MC_tRRD, M_BCM1480_MC_tRRD) x 752 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRCw(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRCw) x 753 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRCw(x) _SB_GETVALUE(x, S_BCM1480_MC_tRCw, M_BCM1480_MC_tRCw) x 759 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRCr(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRCr) x 760 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRCr(x) _SB_GETVALUE(x, S_BCM1480_MC_tRCr, M_BCM1480_MC_tRCr) x 767 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tFAW(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tFAW) x 768 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tFAW(x) _SB_GETVALUE(x, S_BCM1480_MC_tFAW, M_BCM1480_MC_tFAW) x 775 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRFC(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRFC) x 776 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRFC(x) _SB_GETVALUE(x, S_BCM1480_MC_tRFC, M_BCM1480_MC_tRFC) x 782 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tFIFO(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tFIFO) x 783 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tFIFO(x) _SB_GETVALUE(x, S_BCM1480_MC_tFIFO, M_BCM1480_MC_tFIFO) x 789 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tW2R(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tW2R) x 790 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tW2R(x) _SB_GETVALUE(x, S_BCM1480_MC_tW2R, M_BCM1480_MC_tW2R) x 796 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tR2W(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tR2W) x 797 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tR2W(x) _SB_GETVALUE(x, S_BCM1480_MC_tR2W, M_BCM1480_MC_tR2W) x 826 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tAL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tAL) x 827 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tAL(x) _SB_GETVALUE(x, S_BCM1480_MC_tAL, M_BCM1480_MC_tAL) x 833 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRTP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRTP) x 834 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRTP(x) _SB_GETVALUE(x, S_BCM1480_MC_tRTP, M_BCM1480_MC_tRTP) x 840 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tW2W(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tW2W) x 841 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tW2W(x) _SB_GETVALUE(x, S_BCM1480_MC_tW2W, M_BCM1480_MC_tW2W) x 847 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_tRAP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRAP) x 848 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_tRAP(x) _SB_GETVALUE(x, S_BCM1480_MC_tRAP, M_BCM1480_MC_tRAP) x 866 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_BLK_SET_MARK(x) _SB_MAKEVALUE(x, S_BCM1480_MC_BLK_SET_MARK) x 867 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_BLK_SET_MARK(x) _SB_GETVALUE(x, S_BCM1480_MC_BLK_SET_MARK, M_BCM1480_MC_BLK_SET_MARK) x 871 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_BLK_CLR_MARK(x) _SB_MAKEVALUE(x, S_BCM1480_MC_BLK_CLR_MARK) x 872 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_BLK_CLR_MARK(x) _SB_GETVALUE(x, S_BCM1480_MC_BLK_CLR_MARK, M_BCM1480_MC_BLK_CLR_MARK) x 878 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_MAX_AGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_MAX_AGE) x 879 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_MAX_AGE(x) _SB_GETVALUE(x, S_BCM1480_MC_MAX_AGE, M_BCM1480_MC_MAX_AGE) x 887 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_SLEW(x) _SB_MAKEVALUE(x, S_BCM1480_MC_SLEW) x 888 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_SLEW(x) _SB_GETVALUE(x, S_BCM1480_MC_SLEW, M_BCM1480_MC_SLEW) x 898 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0) x 899 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV0) x 903 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1) x 904 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV1) x 908 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_INTLV_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV_MODE) x 909 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_INTLV_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV_MODE, M_BCM1480_MC_INTLV_MODE) x 929 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ECC_ERR_ADDR(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ECC_ERR_ADDR) x 930 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ECC_ERR_ADDR(x) _SB_GETVALUE(x, S_BCM1480_MC_ECC_ERR_ADDR, M_BCM1480_MC_ECC_ERR_ADDR) x 946 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ECC_CORR_ADDR(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ECC_CORR_ADDR) x 947 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ECC_CORR_ADDR(x) _SB_GETVALUE(x, S_BCM1480_MC_ECC_CORR_ADDR, M_BCM1480_MC_ECC_CORR_ADDR) x 955 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_ECC_CORRECT(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ECC_CORRECT) x 956 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_ECC_CORRECT(x) _SB_GETVALUE(x, S_BCM1480_MC_ECC_CORRECT, M_BCM1480_MC_ECC_CORRECT) x 964 arch/mips/include/asm/sibyte/bcm1480_mc.h #define V_BCM1480_MC_CHANNEL_SELECT(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CHANNEL_SELECT) x 965 arch/mips/include/asm/sibyte/bcm1480_mc.h #define G_BCM1480_MC_CHANNEL_SELECT(x) _SB_GETVALUE(x, S_BCM1480_MC_CHANNEL_SELECT, M_BCM1480_MC_CHANNEL_SELECT) x 139 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_L2_MAKECACHEDISABLE(x) (A_BCM1480_L2_CACHE_DISABLE | (((x)&0xF) << 12)) x 142 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_L2_MAKE_WAY_ENABLE_LO(x) (A_BCM1480_L2_WAY_ENABLE_3_0 | (((x)&0xF) << 12)) x 143 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_L2_MAKE_WAY_ENABLE_HI(x) (A_BCM1480_L2_WAY_ENABLE_7_4 | (((x)&0xF) << 12)) x 144 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_L2_MAKE_WAY_DISABLE_LO(x) (A_BCM1480_L2_WAY_ENABLE_3_0 | (((~x)&0xF) << 12)) x 145 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_L2_MAKE_WAY_DISABLE_HI(x) (A_BCM1480_L2_WAY_ENABLE_7_4 | (((~x)&0xF) << 12)) x 485 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_HT_PORT_HEADER(x) (A_BCM1480_HT_PORT0_HEADER + ((x)*BCM1480_HT_PORT_SPACING)) x 690 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_SWTRC_MATCH_CONTROL(x) (A_BCM1480_SWTRC_MATCH_CONTROL_0 + ((x)*8)) x 691 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_SWTRC_EVENT(x) (A_BCM1480_SWTRC_EVENT_0 + ((x)*8)) x 692 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_SWTRC_SEQUENCE(x) (A_BCM1480_SWTRC_SEQUENCE_0 + ((x)*8)) x 694 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_SWTRC_MATCH_DATA_VALUE(x) (A_BCM1480_SWTRC_MATCH_DATA_VALUE_0 + ((x)*16)) x 695 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_SWTRC_MATCH_DATA_MASK(x) (A_BCM1480_SWTRC_MATCH_DATA_MASK_0 + ((x)*16)) x 696 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_SWTRC_MATCH_TAG_VALUE(x) (A_BCM1480_SWTRC_MATCH_TAG_VALUE_0 + ((x)*16)) x 697 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_SWTRC_MATCH_TAG_MASK(x) (A_BCM1480_SWTRC_MATCH_TAG_MASK_0 + ((x)*16)) x 825 arch/mips/include/asm/sibyte/bcm1480_regs.h #define R_BCM1480_HSP_TX_NEXT_ADDR_REGISTER(x) (R_BCM1480_HSP_TX_NEXT_ADDR_BASE+ 8*(x)) x 90 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_PLL_DIV) x 91 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_PLL_DIV, M_BCM1480_SYS_PLL_DIV) x 95 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_SW_DIV) x 96 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_SW_DIV, M_BCM1480_SYS_SW_DIV) x 103 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_BOOT_MODE) x 104 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_BCM1480_SYS_BOOT_MODE, M_BCM1480_SYS_BOOT_MODE) x 120 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_CONFIG) x 121 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x, S_BCM1480_SYS_CONFIG, M_BCM1480_SYS_CONFIG) x 127 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_NODEID) x 128 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x, S_BCM1480_SYS_NODEID, M_BCM1480_SYS_NODEID) x 187 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE) x 188 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE, M_BCM1480_SCD_WDOG_RESET_TYPE) x 235 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC4) x 236 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_SPC_CFG_SRC4(x) _SB_GETVALUE(x, S_SPC_CFG_SRC4, M_SPC_CFG_SRC4) x 240 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC5) x 241 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_SPC_CFG_SRC5(x) _SB_GETVALUE(x, S_SPC_CFG_SRC5, M_SPC_CFG_SRC5) x 245 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC6) x 246 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_SPC_CFG_SRC6(x) _SB_GETVALUE(x, S_SPC_CFG_SRC6, M_SPC_CFG_SRC6) x 250 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC7) x 251 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_SPC_CFG_SRC7(x) _SB_GETVALUE(x, S_SPC_CFG_SRC7, M_SPC_CFG_SRC7) x 272 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x, S_BCM1480_SPC_CNT_COUNT) x 273 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x, S_BCM1480_SPC_CNT_COUNT, M_BCM1480_SPC_CNT_COUNT) x 317 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CNT) x 318 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CNT, M_BCM1480_ATRAP_CFG_CNT) x 328 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID) x 329 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID, M_BCM1480_ATRAP_CFG_AGENTID) x 345 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CATTR) x 346 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CATTR, M_BCM1480_ATRAP_CFG_CATTR) x 373 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC) x 374 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC, M_BCM1480_SCD_TRSEQ_SWFUNC) x 386 arch/mips/include/asm/sibyte/bcm1480_scd.h #define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE) x 387 arch/mips/include/asm/sibyte/bcm1480_scd.h #define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE, M_BCM1480_SCD_TRACE_CFG_MODE) x 203 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKE64(x) ((uint64_t)(x)) x 204 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKE32(x) ((uint32_t)(x)) x 206 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKE64(x) (x) x 207 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKE32(x) (x) x 48 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x, S_DMA_DESC_TYPE) x 49 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x, S_DMA_DESC_TYPE, M_DMA_DESC_TYPE) x 67 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x, S_DMA_INT_PKTCNT) x 68 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x, S_DMA_INT_PKTCNT, M_DMA_INT_PKTCNT) x 72 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x, S_DMA_RINGSZ) x 73 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_RINGSZ(x) _SB_GETVALUE(x, S_DMA_RINGSZ, M_DMA_RINGSZ) x 77 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_HIGH_WATERMARK) x 78 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x, S_DMA_HIGH_WATERMARK, M_DMA_HIGH_WATERMARK) x 82 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_LOW_WATERMARK) x 83 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_LOW_WATERMARK(x) _SB_GETVALUE(x, S_DMA_LOW_WATERMARK, M_DMA_LOW_WATERMARK) x 110 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_HDR_SIZE(x) _SB_MAKEVALUE(x, S_DMA_HDR_SIZE) x 111 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_HDR_SIZE(x) _SB_GETVALUE(x, S_DMA_HDR_SIZE, M_DMA_HDR_SIZE) x 117 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_ASICXFR_SIZE(x) _SB_MAKEVALUE(x, S_DMA_ASICXFR_SIZE) x 118 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_ASICXFR_SIZE(x) _SB_GETVALUE(x, S_DMA_ASICXFR_SIZE, M_DMA_ASICXFR_SIZE) x 122 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_INT_TIMEOUT(x) _SB_MAKEVALUE(x, S_DMA_INT_TIMEOUT) x 123 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_INT_TIMEOUT(x) _SB_GETVALUE(x, S_DMA_INT_TIMEOUT, M_DMA_INT_TIMEOUT) x 164 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x, S_DMA_OODLOST_RX, M_DMA_OODLOST_RX) x 168 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x, S_DMA_EOP_COUNT_RX, M_DMA_EOP_COUNT_RX) x 181 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRA_OFFSET(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_OFFSET) x 182 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRA_OFFSET(x) _SB_GETVALUE(x, S_DMA_DSCRA_OFFSET, M_DMA_DSCRA_OFFSET) x 197 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_A_SIZE) x 198 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRA_A_SIZE, M_DMA_DSCRA_A_SIZE) x 203 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x, S_DMA_DSCRA_DSCR_CNT, M_DMA_DSCRA_DSCR_CNT) x 211 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRA_STATUS(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_STATUS) x 212 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRA_STATUS(x) _SB_GETVALUE(x, S_DMA_DSCRA_STATUS, M_DMA_DSCRA_STATUS) x 221 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_OPTIONS) x 222 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x, S_DMA_DSCRB_OPTIONS, M_DMA_DSCRB_OPTIONS) x 227 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_A_SIZE) x 228 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_A_SIZE, M_DMA_DSCRB_A_SIZE) x 239 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRB_B_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_B_SIZE) x 240 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRB_B_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_B_SIZE, M_DMA_DSCRB_B_SIZE) x 247 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_PKT_SIZE_MSB) x 248 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x, S_DMA_DSCRB_PKT_SIZE_MSB, M_DMA_DSCRB_PKT_SIZE_MSB) x 253 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRB_PKT_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_PKT_SIZE) x 254 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRB_PKT_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_PKT_SIZE, M_DMA_DSCRB_PKT_SIZE) x 261 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_STATUS) x 262 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x, S_DMA_DSCRB_STATUS, M_DMA_DSCRB_STATUS) x 284 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_ETHRX_RXCH(x) _SB_MAKEVALUE(x, S_DMA_ETHRX_RXCH) x 285 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_ETHRX_RXCH(x) _SB_GETVALUE(x, S_DMA_ETHRX_RXCH, M_DMA_ETHRX_RXCH) x 289 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DMA_ETHRX_PKTTYPE(x) _SB_MAKEVALUE(x, S_DMA_ETHRX_PKTTYPE) x 290 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DMA_ETHRX_PKTTYPE(x) _SB_GETVALUE(x, S_DMA_ETHRX_PKTTYPE, M_DMA_ETHRX_PKTTYPE) x 383 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DM_DSCR_BASE_RINGSZ(x) _SB_MAKEVALUE(x, S_DM_DSCR_BASE_RINGSZ) x 384 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DM_DSCR_BASE_RINGSZ(x) _SB_GETVALUE(x, S_DM_DSCR_BASE_RINGSZ, M_DM_DSCR_BASE_RINGSZ) x 388 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DM_DSCR_BASE_PRIORITY(x) _SB_MAKEVALUE(x, S_DM_DSCR_BASE_PRIORITY) x 389 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DM_DSCR_BASE_PRIORITY(x) _SB_GETVALUE(x, S_DM_DSCR_BASE_PRIORITY, M_DM_DSCR_BASE_PRIORITY) x 520 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DM_DSCRA_DIR_DEST(x) _SB_MAKEVALUE(x, S_DM_DSCRA_DIR_DEST) x 521 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DM_DSCRA_DIR_DEST(x) _SB_GETVALUE(x, S_DM_DSCRA_DIR_DEST, M_DM_DSCRA_DIR_DEST) x 533 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DM_DSCRA_DIR_SRC(x) _SB_MAKEVALUE(x, S_DM_DSCRA_DIR_SRC) x 534 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DM_DSCRA_DIR_SRC(x) _SB_GETVALUE(x, S_DM_DSCRA_DIR_SRC, M_DM_DSCRA_DIR_SRC) x 577 arch/mips/include/asm/sibyte/sb1250_dma.h #define V_DM_DSCRB_SRC_LENGTH(x) _SB_MAKEVALUE(x, S_DM_DSCRB_SRC_LENGTH) x 578 arch/mips/include/asm/sibyte/sb1250_dma.h #define G_DM_DSCRB_SRC_LENGTH(x) _SB_GETVALUE(x, S_DM_DSCRB_SRC_LENGTH, M_DM_DSCRB_SRC_LENGTH) x 45 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL) x 46 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL) x 62 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT) x 63 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT) x 71 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x, S_IO_MULT_SIZE) x 72 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_MULT_SIZE(x) _SB_GETVALUE(x, S_IO_MULT_SIZE, M_IO_MULT_SIZE) x 82 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_START_ADDR(x) _SB_MAKEVALUE(x, S_IO_START_ADDR) x 83 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_START_ADDR(x) _SB_GETVALUE(x, S_IO_START_ADDR, M_IO_START_ADDR) x 96 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x, S_IO_ALE_WIDTH) x 97 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x, S_IO_ALE_WIDTH, M_IO_ALE_WIDTH) x 106 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x, S_IO_ALE_TO_CS) x 107 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x, S_IO_ALE_TO_CS, M_IO_ALE_TO_CS) x 113 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_BURST_WIDTH(x) _SB_MAKEVALUE(x, S_IO_BURST_WIDTH) x 114 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_BURST_WIDTH(x) _SB_GETVALUE(x, S_IO_BURST_WIDTH, M_IO_BURST_WIDTH) x 119 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_CS_WIDTH(x) _SB_MAKEVALUE(x, S_IO_CS_WIDTH) x 120 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_CS_WIDTH(x) _SB_GETVALUE(x, S_IO_CS_WIDTH, M_IO_CS_WIDTH) x 124 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_RDY_SMPLE(x) _SB_MAKEVALUE(x, S_IO_RDY_SMPLE) x 125 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_RDY_SMPLE(x) _SB_GETVALUE(x, S_IO_RDY_SMPLE, M_IO_RDY_SMPLE) x 134 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x, S_IO_ALE_TO_WRITE) x 135 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x, S_IO_ALE_TO_WRITE, M_IO_ALE_TO_WRITE) x 144 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_WRITE_WIDTH(x) _SB_MAKEVALUE(x, S_IO_WRITE_WIDTH) x 145 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_WRITE_WIDTH(x) _SB_GETVALUE(x, S_IO_WRITE_WIDTH, M_IO_WRITE_WIDTH) x 149 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_IDLE_CYCLE(x) _SB_MAKEVALUE(x, S_IO_IDLE_CYCLE) x 150 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_IDLE_CYCLE(x) _SB_GETVALUE(x, S_IO_IDLE_CYCLE, M_IO_IDLE_CYCLE) x 154 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_OE_TO_CS(x) _SB_MAKEVALUE(x, S_IO_OE_TO_CS) x 155 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_OE_TO_CS(x) _SB_GETVALUE(x, S_IO_OE_TO_CS, M_IO_OE_TO_CS) x 159 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_CS_TO_OE(x) _SB_MAKEVALUE(x, S_IO_CS_TO_OE) x 160 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_CS_TO_OE(x) _SB_GETVALUE(x, S_IO_CS_TO_OE, M_IO_CS_TO_OE) x 191 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_SLEW0(x) _SB_MAKEVALUE(x, S_IO_SLEW0) x 192 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_SLEW0(x) _SB_GETVALUE(x, S_IO_SLEW0, M_IO_SLEW0) x 196 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_A(x) _SB_MAKEVALUE(x, S_IO_DRV_A) x 197 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_A(x) _SB_GETVALUE(x, S_IO_DRV_A, M_IO_DRV_A) x 201 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_B(x) _SB_MAKEVALUE(x, S_IO_DRV_B) x 202 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_B(x) _SB_GETVALUE(x, S_IO_DRV_B, M_IO_DRV_B) x 206 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_C(x) _SB_MAKEVALUE(x, S_IO_DRV_C) x 207 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_C(x) _SB_GETVALUE(x, S_IO_DRV_C, M_IO_DRV_C) x 211 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_D(x) _SB_MAKEVALUE(x, S_IO_DRV_D) x 212 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_D(x) _SB_GETVALUE(x, S_IO_DRV_D, M_IO_DRV_D) x 220 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_E(x) _SB_MAKEVALUE(x, S_IO_DRV_E) x 221 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_E(x) _SB_GETVALUE(x, S_IO_DRV_E, M_IO_DRV_E) x 225 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_F(x) _SB_MAKEVALUE(x, S_IO_DRV_F) x 226 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_F(x) _SB_GETVALUE(x, S_IO_DRV_F, M_IO_DRV_F) x 230 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_SLEW1(x) _SB_MAKEVALUE(x, S_IO_SLEW1) x 231 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_SLEW1(x) _SB_GETVALUE(x, S_IO_SLEW1, M_IO_SLEW1) x 235 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_G(x) _SB_MAKEVALUE(x, S_IO_DRV_G) x 236 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_G(x) _SB_GETVALUE(x, S_IO_DRV_G, M_IO_DRV_G) x 240 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_SLEW2(x) _SB_MAKEVALUE(x, S_IO_SLEW2) x 241 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_SLEW2(x) _SB_GETVALUE(x, S_IO_SLEW2, M_IO_SLEW2) x 245 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_H(x) _SB_MAKEVALUE(x, S_IO_DRV_H) x 246 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_H(x) _SB_GETVALUE(x, S_IO_DRV_H, M_IO_DRV_H) x 254 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_J(x) _SB_MAKEVALUE(x, S_IO_DRV_J) x 255 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_J(x) _SB_GETVALUE(x, S_IO_DRV_J, M_IO_DRV_J) x 259 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_K(x) _SB_MAKEVALUE(x, S_IO_DRV_K) x 260 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_K(x) _SB_GETVALUE(x, S_IO_DRV_K, M_IO_DRV_K) x 264 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_L(x) _SB_MAKEVALUE(x, S_IO_DRV_L) x 265 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_L(x) _SB_GETVALUE(x, S_IO_DRV_L, M_IO_DRV_L) x 269 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_M(x) _SB_MAKEVALUE(x, S_IO_DRV_M) x 270 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_M(x) _SB_GETVALUE(x, S_IO_DRV_M, M_IO_DRV_M) x 278 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_SLEW3(x) _SB_MAKEVALUE(x, S_IO_SLEW3) x 279 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_SLEW3(x) _SB_GETVALUE(x, S_IO_SLEW3, M_IO_SLEW3) x 283 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_N(x) _SB_MAKEVALUE(x, S_IO_DRV_N) x 284 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_N(x) _SB_GETVALUE(x, S_IO_DRV_N, M_IO_DRV_N) x 288 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_P(x) _SB_MAKEVALUE(x, S_IO_DRV_P) x 289 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_P(x) _SB_GETVALUE(x, S_IO_DRV_P, M_IO_DRV_P) x 293 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_Q(x) _SB_MAKEVALUE(x, S_IO_DRV_Q) x 294 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_Q(x) _SB_GETVALUE(x, S_IO_DRV_Q, M_IO_DRV_Q) x 298 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_IO_DRV_R(x) _SB_MAKEVALUE(x, S_IO_DRV_R) x 299 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_IO_DRV_R(x) _SB_GETVALUE(x, S_IO_DRV_R, M_IO_DRV_R) x 320 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_PCMCIA_MODE(x) _SB_MAKEVALUE(x, S_PCMCIA_MODE) x 321 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_PCMCIA_MODE(x) _SB_GETVALUE(x, S_PCMCIA_MODE, M_PCMCIA_MODE) x 360 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPEX(n, x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPEX(n)) x 361 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPEX(n, x) _SB_GETVALUE(x, S_GPIO_INTR_TYPEX(n), M_GPIO_INTR_TYPEX(n)) x 365 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE0(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE0) x 366 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE0(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE0, M_GPIO_INTR_TYPE0) x 370 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE2(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE2) x 371 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE2(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE2, M_GPIO_INTR_TYPE2) x 375 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE4(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE4) x 376 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE4(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE4, M_GPIO_INTR_TYPE4) x 380 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE6(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE6) x 381 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE6(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE6, M_GPIO_INTR_TYPE6) x 385 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE8(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE8) x 386 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE8(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE8, M_GPIO_INTR_TYPE8) x 390 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE10(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE10) x 391 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE10(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE10, M_GPIO_INTR_TYPE10) x 395 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE12(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE12) x 396 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE12(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE12, M_GPIO_INTR_TYPE12) x 400 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE14) x 401 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE14, M_GPIO_INTR_TYPE14) x 416 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPEX(n, x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPEX(n)) x 417 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPEX(n, x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPEX(n), M_GPIO_INTR_ATYPEX(n)) x 421 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE0(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE0) x 422 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE0(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE0, M_GPIO_INTR_ATYPE0) x 426 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE2(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE2) x 427 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE2(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE2, M_GPIO_INTR_ATYPE2) x 431 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE4(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE4) x 432 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE4(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE4, M_GPIO_INTR_ATYPE4) x 436 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE6(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE6) x 437 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE6(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE6, M_GPIO_INTR_ATYPE6) x 441 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE8(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE8) x 442 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE8(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE8, M_GPIO_INTR_ATYPE8) x 446 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE10(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE10) x 447 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE10(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE10, M_GPIO_INTR_ATYPE10) x 451 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE12(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE12) x 452 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE12(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE12, M_GPIO_INTR_ATYPE12) x 456 arch/mips/include/asm/sibyte/sb1250_genbus.h #define V_GPIO_INTR_ATYPE14(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE14) x 457 arch/mips/include/asm/sibyte/sb1250_genbus.h #define G_GPIO_INTR_ATYPE14(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE14, M_GPIO_INTR_ATYPE14) x 199 arch/mips/include/asm/sibyte/sb1250_int.h #define V_INT_LDT_INTMSG(x) _SB_MAKEVALUE(x, S_INT_LDT_INTMSG) x 200 arch/mips/include/asm/sibyte/sb1250_int.h #define G_INT_LDT_INTMSG(x) _SB_GETVALUE(x, S_INT_LDT_INTMSG, M_INT_LDT_INTMSG) x 219 arch/mips/include/asm/sibyte/sb1250_int.h #define V_INT_LDT_INTDEST(x) _SB_MAKEVALUE(x, S_INT_LDT_INTDEST) x 220 arch/mips/include/asm/sibyte/sb1250_int.h #define G_INT_LDT_INTDEST(x) _SB_GETVALUE(x, S_INT_LDT_INTDEST, M_INT_LDT_INTDEST) x 224 arch/mips/include/asm/sibyte/sb1250_int.h #define V_INT_LDT_VECTOR(x) _SB_MAKEVALUE(x, S_INT_LDT_VECTOR) x 225 arch/mips/include/asm/sibyte/sb1250_int.h #define G_INT_LDT_VECTOR(x) _SB_GETVALUE(x, S_INT_LDT_VECTOR, M_INT_LDT_VECTOR) x 34 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_L2C_TAG_INDEX) x 35 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_L2C_TAG_INDEX, M_L2C_TAG_INDEX) x 39 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_L2C_TAG_TAG) x 40 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_L2C_TAG_TAG, M_L2C_TAG_TAG) x 44 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_L2C_TAG_ECC) x 45 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_L2C_TAG_ECC, M_L2C_TAG_ECC) x 49 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_L2C_TAG_WAY) x 50 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_L2C_TAG_WAY, M_L2C_TAG_WAY) x 61 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_L2C_MGMT_INDEX) x 62 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_L2C_MGMT_INDEX, M_L2C_MGMT_INDEX) x 66 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_MGMT_QUADRANT(x) _SB_MAKEVALUE(x, S_L2C_MGMT_QUADRANT) x 67 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_MGMT_QUADRANT(x) _SB_GETVALUE(x, S_L2C_MGMT_QUADRANT, M_L2C_MGMT_QUADRANT) x 74 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_L2C_MGMT_WAY) x 75 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_L2C_MGMT_WAY, M_L2C_MGMT_WAY) x 79 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_L2C_MGMT_ECC_DIAG) x 80 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_L2C_MGMT_ECC_DIAG, M_L2C_MGMT_ECC_DIAG) x 84 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_MGMT_TAG(x) _SB_MAKEVALUE(x, S_L2C_MGMT_TAG) x 85 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_MGMT_TAG(x) _SB_GETVALUE(x, S_L2C_MGMT_TAG, M_L2C_MGMT_TAG) x 102 arch/mips/include/asm/sibyte/sb1250_l2c.h #define V_L2C_MISC_NO_WAY(x) _SB_MAKEVALUE(x, S_L2C_MISC_NO_WAY) x 103 arch/mips/include/asm/sibyte/sb1250_l2c.h #define G_L2C_MISC_NO_WAY(x) _SB_GETVALUE(x, S_L2C_MISC_NO_WAY, M_L2C_MISC_NO_WAY) x 72 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR) x 73 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR) x 77 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID) x 78 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVICEID) x 102 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV) x 103 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV) x 107 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_CLASS) x 108 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_CLASS, M_LDT_CLASSREV_CLASS) x 119 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_CLINESZ) x 120 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_CLINESZ, M_LDT_DEVHDR_CLINESZ) x 124 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_LATTMR) x 125 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_LATTMR, M_LDT_DEVHDR_LATTMR) x 129 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_HDRTYPE) x 130 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_HDRTYPE, M_LDT_DEVHDR_HDRTYPE) x 136 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_BIST) x 137 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_BIST, M_LDT_DEVHDR_BIST) x 161 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x, S_LDT_STATUS_DEVSELTIMING) x 162 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x, S_LDT_STATUS_DEVSELTIMING, M_LDT_STATUS_DEVSELTIMING) x 199 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x, S_LDT_CMD_CAPTYPE) x 200 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x, S_LDT_CMD_CAPTYPE, M_LDT_CMD_CAPTYPE) x 216 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_CRCERR) x 217 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_CRCERR, M_LDT_LINKCTRL_CRCERR) x 221 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_MAXIN) x 222 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_MAXIN, M_LDT_LINKCTRL_MAXIN) x 228 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_MAXOUT) x 229 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_MAXOUT, M_LDT_LINKCTRL_MAXOUT) x 235 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_WIDTHIN) x 236 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_WIDTHIN, M_LDT_LINKCTRL_WIDTHIN) x 242 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_WIDTHOUT) x 243 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_WIDTHOUT, M_LDT_LINKCTRL_WIDTHOUT) x 253 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x, S_LDT_LINKFREQ_FREQ) x 254 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x, S_LDT_LINKFREQ_FREQ, M_LDT_LINKFREQ_FREQ) x 284 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x, S_LDT_SRICMD_RXMARGIN) x 285 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x, S_LDT_SRICMD_RXMARGIN, M_LDT_SRICMD_RXMARGIN) x 291 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x, S_LDT_SRICMD_TXINITIALOFFSET) x 292 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x, S_LDT_SRICMD_TXINITIALOFFSET, M_LDT_SRICMD_TXINITIALOFFSET) x 331 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDRESP) x 332 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDRESP, M_LDT_SRICTRL_NEEDRESP) x 336 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDNPREQ) x 337 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDNPREQ, M_LDT_SRICTRL_NEEDNPREQ) x 341 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDPREQ) x 342 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDPREQ, M_LDT_SRICTRL_NEEDPREQ) x 346 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTRESP) x 347 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTRESP, M_LDT_SRICTRL_WANTRESP) x 351 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTNPREQ) x 352 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTNPREQ, M_LDT_SRICTRL_WANTNPREQ) x 356 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTPREQ) x 357 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTPREQ, M_LDT_SRICTRL_WANTPREQ) x 361 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_BUFRELSPACE) x 362 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_BUFRELSPACE, M_LDT_SRICTRL_BUFRELSPACE) x 370 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_PCMD) x 371 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_PCMD, M_LDT_TXBUFCNT_PCMD) x 375 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_PDATA) x 376 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_PDATA, M_LDT_TXBUFCNT_PDATA) x 380 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_NPCMD) x 381 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_NPCMD, M_LDT_TXBUFCNT_NPCMD) x 385 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_NPDATA) x 386 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_NPDATA, M_LDT_TXBUFCNT_NPDATA) x 390 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_RCMD) x 391 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_RCMD, M_LDT_TXBUFCNT_RCMD) x 395 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_RDATA) x 396 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_RDATA, M_LDT_TXBUFCNT_RDATA) x 405 arch/mips/include/asm/sibyte/sb1250_ldt.h #define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x, S_LDT_ADDSTATUS_TGTDONE) x 406 arch/mips/include/asm/sibyte/sb1250_ldt.h #define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x, S_LDT_ADDSTATUS_TGTDONE, M_LDT_ADDSTATUS_TGTDONE) x 46 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x, S_MAC_TX_PAUSE) x 88 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x, S_MAC_SPEED_SEL) x 89 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x, S_MAC_SPEED_SEL, M_MAC_SPEED_SEL) x 108 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_CFG) x 109 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_CFG, M_MAC_BYPASS_CFG) x 129 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_IFG) x 130 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_IFG, M_MAC_BYPASS_IFG) x 144 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x, S_MAC_FC_CMD) x 145 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_FC_CMD(x) _SB_GETVALUE(x, S_MAC_FC_CMD, M_MAC_FC_CMD) x 149 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_CH_SEL(x) _SB_MAKEVALUE(x, S_MAC_RX_CH_SEL) x 150 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_CH_SEL(x) _SB_GETVALUE(x, S_MAC_RX_CH_SEL, M_MAC_RX_CH_SEL) x 193 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TXD_WEIGHT0(x) _SB_MAKEVALUE(x, S_MAC_TXD_WEIGHT0) x 194 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TXD_WEIGHT0(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT0, M_MAC_TXD_WEIGHT0) x 198 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TXD_WEIGHT1(x) _SB_MAKEVALUE(x, S_MAC_TXD_WEIGHT1) x 199 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT1, M_MAC_TXD_WEIGHT1) x 216 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_WR_THRSH(x) _SB_MAKEVALUE(x, S_MAC_TX_WR_THRSH) x 217 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_WR_THRSH(x) _SB_GETVALUE(x, S_MAC_TX_WR_THRSH, M_MAC_TX_WR_THRSH) x 227 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_RD_THRSH(x) _SB_MAKEVALUE(x, S_MAC_TX_RD_THRSH) x 228 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_RD_THRSH(x) _SB_GETVALUE(x, S_MAC_TX_RD_THRSH, M_MAC_TX_RD_THRSH) x 232 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_RL_THRSH(x) _SB_MAKEVALUE(x, S_MAC_TX_RL_THRSH) x 233 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_RL_THRSH(x) _SB_GETVALUE(x, S_MAC_TX_RL_THRSH, M_MAC_TX_RL_THRSH) x 237 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_PL_THRSH(x) _SB_MAKEVALUE(x, S_MAC_RX_PL_THRSH) x 238 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_PL_THRSH(x) _SB_GETVALUE(x, S_MAC_RX_PL_THRSH, M_MAC_RX_PL_THRSH) x 242 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_RD_THRSH(x) _SB_MAKEVALUE(x, S_MAC_RX_RD_THRSH) x 243 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_RD_THRSH(x) _SB_GETVALUE(x, S_MAC_RX_RD_THRSH, M_MAC_RX_RD_THRSH) x 247 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_RL_THRSH(x) _SB_MAKEVALUE(x, S_MAC_RX_RL_THRSH) x 248 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_RL_THRSH(x) _SB_GETVALUE(x, S_MAC_RX_RL_THRSH, M_MAC_RX_RL_THRSH) x 253 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_ENC_FC_THRSH(x) _SB_MAKEVALUE(x, S_MAC_ENC_FC_THRSH) x 254 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_ENC_FC_THRSH(x) _SB_GETVALUE(x, S_MAC_ENC_FC_THRSH, M_MAC_ENC_FC_THRSH) x 267 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x, S_MAC_IFG_RX) x 268 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_IFG_RX(x) _SB_GETVALUE(x, S_MAC_IFG_RX, M_MAC_IFG_RX) x 273 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x, S_MAC_PRE_LEN) x 274 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_PRE_LEN(x) _SB_GETVALUE(x, S_MAC_PRE_LEN, M_MAC_PRE_LEN) x 279 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_IFG_TX(x) _SB_MAKEVALUE(x, S_MAC_IFG_TX) x 280 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_IFG_TX(x) _SB_GETVALUE(x, S_MAC_IFG_TX, M_MAC_IFG_TX) x 284 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_IFG_THRSH(x) _SB_MAKEVALUE(x, S_MAC_IFG_THRSH) x 285 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_IFG_THRSH(x) _SB_GETVALUE(x, S_MAC_IFG_THRSH, M_MAC_IFG_THRSH) x 289 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_BACKOFF_SEL(x) _SB_MAKEVALUE(x, S_MAC_BACKOFF_SEL) x 290 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_BACKOFF_SEL(x) _SB_GETVALUE(x, S_MAC_BACKOFF_SEL, M_MAC_BACKOFF_SEL) x 294 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_LFSR_SEED(x) _SB_MAKEVALUE(x, S_MAC_LFSR_SEED) x 295 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_LFSR_SEED(x) _SB_GETVALUE(x, S_MAC_LFSR_SEED, M_MAC_LFSR_SEED) x 299 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_SLOT_SIZE(x) _SB_MAKEVALUE(x, S_MAC_SLOT_SIZE) x 300 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_SLOT_SIZE(x) _SB_GETVALUE(x, S_MAC_SLOT_SIZE, M_MAC_SLOT_SIZE) x 304 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_MIN_FRAMESZ(x) _SB_MAKEVALUE(x, S_MAC_MIN_FRAMESZ) x 305 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_MIN_FRAMESZ(x) _SB_GETVALUE(x, S_MAC_MIN_FRAMESZ, M_MAC_MIN_FRAMESZ) x 309 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_MAX_FRAMESZ(x) _SB_MAKEVALUE(x, S_MAC_MAX_FRAMESZ) x 310 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_MAX_FRAMESZ(x) _SB_GETVALUE(x, S_MAC_MAX_FRAMESZ, M_MAC_MAX_FRAMESZ) x 368 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x, S_MAC_VLAN_TAG) x 369 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x, S_MAC_VLAN_TAG, M_MAC_VLAN_TAG) x 374 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_TX_PKT_OFFSET) x 375 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_PKT_OFFSET(x) _SB_GETVALUE(x, S_MAC_TX_PKT_OFFSET, M_MAC_TX_PKT_OFFSET) x 379 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_CRC_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_TX_CRC_OFFSET) x 380 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x, S_MAC_TX_CRC_OFFSET, M_MAC_TX_CRC_OFFSET) x 458 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x, S_MAC_COUNTER_ADDR) x 459 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x, S_MAC_COUNTER_ADDR, M_MAC_COUNTER_ADDR) x 474 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_WRPTR(x) _SB_MAKEVALUE(x, S_MAC_TX_WRPTR) x 475 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_WRPTR(x) _SB_GETVALUE(x, S_MAC_TX_WRPTR, M_MAC_TX_WRPTR) x 479 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_RDPTR(x) _SB_MAKEVALUE(x, S_MAC_TX_RDPTR) x 480 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_RDPTR(x) _SB_GETVALUE(x, S_MAC_TX_RDPTR, M_MAC_TX_RDPTR) x 484 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_WRPTR(x) _SB_MAKEVALUE(x, S_MAC_RX_WRPTR) x 485 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_WRPTR(x) _SB_GETVALUE(x, S_MAC_RX_WRPTR, M_MAC_TX_WRPTR) x 489 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_RDPTR(x) _SB_MAKEVALUE(x, S_MAC_RX_RDPTR) x 490 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_RDPTR(x) _SB_GETVALUE(x, S_MAC_RX_RDPTR, M_MAC_TX_RDPTR) x 501 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_TX_EOP_COUNTER(x) _SB_MAKEVALUE(x, S_MAC_TX_EOP_COUNTER) x 502 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_TX_EOP_COUNTER(x) _SB_GETVALUE(x, S_MAC_TX_EOP_COUNTER, M_MAC_TX_EOP_COUNTER) x 506 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_EOP_COUNTER(x) _SB_MAKEVALUE(x, S_MAC_RX_EOP_COUNTER) x 507 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x, S_MAC_RX_EOP_COUNTER, M_MAC_RX_EOP_COUNTER) x 556 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_TYPECFG_TYPE0(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE0) x 557 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_TYPECFG_TYPE0(x) _SB_GETVALUE(x, S_TYPECFG_TYPE0, M_TYPECFG_TYPE0) x 561 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_TYPECFG_TYPE1(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE1) x 562 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_TYPECFG_TYPE1(x) _SB_GETVALUE(x, S_TYPECFG_TYPE1, M_TYPECFG_TYPE1) x 566 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_TYPECFG_TYPE2(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE2) x 567 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_TYPECFG_TYPE2(x) _SB_GETVALUE(x, S_TYPECFG_TYPE2, M_TYPECFG_TYPE2) x 571 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_TYPECFG_TYPE3(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE3) x 572 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_TYPECFG_TYPE3(x) _SB_GETVALUE(x, S_TYPECFG_TYPE3, M_TYPECFG_TYPE3) x 594 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_IPHDR_OFFSET) x 595 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x, S_MAC_IPHDR_OFFSET, M_MAC_IPHDR_OFFSET) x 600 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_RX_CRC_OFFSET) x 601 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_CRC_OFFSET(x) _SB_GETVALUE(x, S_MAC_RX_CRC_OFFSET, M_MAC_RX_CRC_OFFSET) x 605 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_PKT_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_RX_PKT_OFFSET) x 606 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_PKT_OFFSET(x) _SB_GETVALUE(x, S_MAC_RX_PKT_OFFSET, M_MAC_RX_PKT_OFFSET) x 613 arch/mips/include/asm/sibyte/sb1250_mac.h #define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x, S_MAC_RX_CH_MSN_SEL) x 614 arch/mips/include/asm/sibyte/sb1250_mac.h #define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x, S_MAC_RX_CH_MSN_SEL, M_MAC_RX_CH_MSN_SEL) x 34 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL) x 35 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL) x 39 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK0_MAP) x 40 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_BANK0_MAP(x) _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP) x 47 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK1_MAP) x 48 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_BANK1_MAP(x) _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP) x 55 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK2_MAP) x 56 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_BANK2_MAP(x) _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP) x 63 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK3_MAP) x 64 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_BANK3_MAP(x) _SB_GETVALUE(x, S_MC_BANK3_MAP, M_MC_BANK3_MAP) x 73 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_QUEUE_SIZE(x) _SB_MAKEVALUE(x, S_MC_QUEUE_SIZE) x 74 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_QUEUE_SIZE(x) _SB_GETVALUE(x, S_MC_QUEUE_SIZE, M_MC_QUEUE_SIZE) x 79 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_AGE_LIMIT(x) _SB_MAKEVALUE(x, S_MC_AGE_LIMIT) x 80 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_AGE_LIMIT(x) _SB_GETVALUE(x, S_MC_AGE_LIMIT, M_MC_AGE_LIMIT) x 85 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_WR_LIMIT(x) _SB_MAKEVALUE(x, S_MC_WR_LIMIT) x 86 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_WR_LIMIT(x) _SB_GETVALUE(x, S_MC_WR_LIMIT, M_MC_WR_LIMIT) x 95 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_MC_CS_MODE) x 96 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS_MODE(x) _SB_GETVALUE(x, S_MC_CS_MODE, M_MC_CS_MODE) x 129 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CLK_RATIO(x) _SB_MAKEVALUE(x, S_MC_CLK_RATIO) x 130 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CLK_RATIO(x) _SB_GETVALUE(x, S_MC_CLK_RATIO, M_MC_CLK_RATIO) x 149 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_REF_RATE(x) _SB_MAKEVALUE(x, S_MC_REF_RATE) x 150 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_REF_RATE(x) _SB_GETVALUE(x, S_MC_REF_RATE, M_MC_REF_RATE) x 163 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CLOCK_DRIVE(x) _SB_MAKEVALUE(x, S_MC_CLOCK_DRIVE) x 164 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CLOCK_DRIVE(x) _SB_GETVALUE(x, S_MC_CLOCK_DRIVE, M_MC_CLOCK_DRIVE) x 169 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_DATA_DRIVE(x) _SB_MAKEVALUE(x, S_MC_DATA_DRIVE) x 170 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_DATA_DRIVE(x) _SB_GETVALUE(x, S_MC_DATA_DRIVE, M_MC_DATA_DRIVE) x 175 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_ADDR_DRIVE(x) _SB_MAKEVALUE(x, S_MC_ADDR_DRIVE) x 176 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_ADDR_DRIVE(x) _SB_GETVALUE(x, S_MC_ADDR_DRIVE, M_MC_ADDR_DRIVE) x 187 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_DQI_SKEW(x) _SB_MAKEVALUE(x, S_MC_DQI_SKEW) x 188 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_DQI_SKEW(x) _SB_GETVALUE(x, S_MC_DQI_SKEW, M_MC_DQI_SKEW) x 193 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_DQO_SKEW(x) _SB_MAKEVALUE(x, S_MC_DQO_SKEW) x 194 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_DQO_SKEW(x) _SB_GETVALUE(x, S_MC_DQO_SKEW, M_MC_DQO_SKEW) x 199 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_ADDR_SKEW(x) _SB_MAKEVALUE(x, S_MC_ADDR_SKEW) x 200 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_ADDR_SKEW(x) _SB_GETVALUE(x, S_MC_ADDR_SKEW, M_MC_ADDR_SKEW) x 205 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x, S_MC_DLL_DEFAULT) x 206 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_DLL_DEFAULT(x) _SB_GETVALUE(x, S_MC_DLL_DEFAULT, M_MC_DLL_DEFAULT) x 226 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_COMMAND(x) _SB_MAKEVALUE(x, S_MC_COMMAND) x 227 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_COMMAND(x) _SB_GETVALUE(x, S_MC_COMMAND, M_MC_COMMAND) x 258 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_EMODE(x) _SB_MAKEVALUE(x, S_MC_EMODE) x 259 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_EMODE(x) _SB_GETVALUE(x, S_MC_EMODE, M_MC_EMODE) x 264 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_MODE(x) _SB_MAKEVALUE(x, S_MC_MODE) x 265 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_MODE(x) _SB_GETVALUE(x, S_MC_MODE, M_MC_MODE) x 270 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x, S_MC_DRAM_TYPE) x 271 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_DRAM_TYPE(x) _SB_GETVALUE(x, S_MC_DRAM_TYPE, M_MC_DRAM_TYPE) x 300 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tFIFO(x) _SB_MAKEVALUE(x, S_MC_tFIFO) x 301 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tFIFO(x) _SB_GETVALUE(x, S_MC_tFIFO, M_MC_tFIFO) x 307 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tRFC(x) _SB_MAKEVALUE(x, S_MC_tRFC) x 308 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tRFC(x) _SB_GETVALUE(x, S_MC_tRFC, M_MC_tRFC) x 318 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tCwCr(x) _SB_MAKEVALUE(x, S_MC_tCwCr) x 319 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tCwCr(x) _SB_GETVALUE(x, S_MC_tCwCr, M_MC_tCwCr) x 325 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tRCr(x) _SB_MAKEVALUE(x, S_MC_tRCr) x 326 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tRCr(x) _SB_GETVALUE(x, S_MC_tRCr, M_MC_tRCr) x 332 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tRCw(x) _SB_MAKEVALUE(x, S_MC_tRCw) x 333 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tRCw(x) _SB_GETVALUE(x, S_MC_tRCw, M_MC_tRCw) x 339 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tRRD(x) _SB_MAKEVALUE(x, S_MC_tRRD) x 340 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tRRD(x) _SB_GETVALUE(x, S_MC_tRRD, M_MC_tRRD) x 346 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tRP(x) _SB_MAKEVALUE(x, S_MC_tRP) x 347 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tRP(x) _SB_GETVALUE(x, S_MC_tRP, M_MC_tRP) x 353 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tCwD(x) _SB_MAKEVALUE(x, S_MC_tCwD) x 354 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tCwD(x) _SB_GETVALUE(x, S_MC_tCwD, M_MC_tCwD) x 363 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tCrD(x) _SB_MAKEVALUE(x, S_MC_tCrD) x 364 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tCrD(x) _SB_GETVALUE(x, S_MC_tCrD, M_MC_tCrD) x 370 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_tRCD(x) _SB_MAKEVALUE(x, S_MC_tRCD) x 371 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_tRCD(x) _SB_GETVALUE(x, S_MC_tRCD, M_MC_tRCD) x 400 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS0_START(x) _SB_MAKEVALUE(x, S_MC_CS0_START) x 401 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS0_START(x) _SB_GETVALUE(x, S_MC_CS0_START, M_MC_CS0_START) x 405 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS1_START(x) _SB_MAKEVALUE(x, S_MC_CS1_START) x 406 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS1_START(x) _SB_GETVALUE(x, S_MC_CS1_START, M_MC_CS1_START) x 410 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS2_START(x) _SB_MAKEVALUE(x, S_MC_CS2_START) x 411 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS2_START(x) _SB_GETVALUE(x, S_MC_CS2_START, M_MC_CS2_START) x 415 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS3_START(x) _SB_MAKEVALUE(x, S_MC_CS3_START) x 416 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS3_START(x) _SB_GETVALUE(x, S_MC_CS3_START, M_MC_CS3_START) x 424 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS0_END(x) _SB_MAKEVALUE(x, S_MC_CS0_END) x 425 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS0_END(x) _SB_GETVALUE(x, S_MC_CS0_END, M_MC_CS0_END) x 429 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS1_END(x) _SB_MAKEVALUE(x, S_MC_CS1_END) x 430 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS1_END(x) _SB_GETVALUE(x, S_MC_CS1_END, M_MC_CS1_END) x 434 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS2_END(x) _SB_MAKEVALUE(x, S_MC_CS2_END) x 435 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS2_END(x) _SB_GETVALUE(x, S_MC_CS2_END, M_MC_CS2_END) x 439 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS3_END(x) _SB_MAKEVALUE(x, S_MC_CS3_END) x 440 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS3_END(x) _SB_GETVALUE(x, S_MC_CS3_END, M_MC_CS3_END) x 451 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_INTERLEAVE(x) _SB_MAKEVALUE(x, S_MC_INTERLEAVE) x 465 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_RAS_SELECT(x) _SB_MAKEVALUE(x, S_MC_RAS_SELECT) x 480 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CAS_SELECT(x) _SB_MAKEVALUE(x, S_MC_CAS_SELECT) x 495 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_BA_SELECT(x) _SB_MAKEVALUE(x, S_MC_BA_SELECT) x 511 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS0_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS0_PAGE) x 512 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS0_PAGE(x) _SB_GETVALUE(x, S_MC_CS0_PAGE, M_MC_CS0_PAGE) x 516 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS1_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS1_PAGE) x 517 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS1_PAGE(x) _SB_GETVALUE(x, S_MC_CS1_PAGE, M_MC_CS1_PAGE) x 521 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS2_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS2_PAGE) x 522 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS2_PAGE(x) _SB_GETVALUE(x, S_MC_CS2_PAGE, M_MC_CS2_PAGE) x 526 arch/mips/include/asm/sibyte/sb1250_mc.h #define V_MC_CS3_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS3_PAGE) x 527 arch/mips/include/asm/sibyte/sb1250_mc.h #define G_MC_CS3_PAGE(x) _SB_GETVALUE(x, S_MC_CS3_PAGE, M_MC_CS3_PAGE) x 105 arch/mips/include/asm/sibyte/sb1250_regs.h #define A_L2_MAKEDISABLE(x) (A_L2_WAY_DISABLE | (((~(x))&0x0F) << 8)) x 110 arch/mips/include/asm/sibyte/sb1250_regs.h #define A_L2_MAKECACHEDISABLE(x) (A_L2_CACHE_DISABLE | (((x)&0x0F) << 8)) x 514 arch/mips/include/asm/sibyte/sb1250_regs.h #define R_IO_DRIVE(x) ((x)*IO_DRIVE_REGISTER_SPACING) x 515 arch/mips/include/asm/sibyte/sb1250_regs.h #define A_IO_DRIVE(x) (A_IO_DRIVE_BASE + R_IO_DRIVE(x)) x 36 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_REVISION(x) _SB_MAKEVALUE(x, S_SYS_REVISION) x 37 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_REVISION(x) _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION) x 85 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x, S_SYS_L2C_SIZE) x 86 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE) x 101 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x, S_SYS_NUM_CPUS) x 102 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS) x 108 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_PART(x) _SB_MAKEVALUE(x, S_SYS_PART) x 109 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_PART(x) _SB_GETVALUE(x, S_SYS_PART, M_SYS_PART) x 122 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x, S_SYS_SOC_TYPE) x 123 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x, S_SYS_SOC_TYPE, M_SYS_SOC_TYPE) x 161 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_WID(x) _SB_MAKEVALUE(x, S_SYS_WID) x 162 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_WID(x) _SB_GETVALUE(x, S_SYS_WID, M_SYS_WID) x 173 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x, S_SYS_WAFERID1_200) x 174 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x, S_SYS_WAFERID1_200, M_SYS_WAFERID1_200) x 178 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_BIN(x) _SB_MAKEVALUE(x, S_SYS_BIN) x 179 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_BIN(x) _SB_GETVALUE(x, S_SYS_BIN, M_SYS_BIN) x 184 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x, S_SYS_WAFERID2_200) x 185 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x, S_SYS_WAFERID2_200, M_SYS_WAFERID2_200) x 190 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x, S_SYS_WAFERID_300) x 191 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_WAFERID_300(x) _SB_GETVALUE(x, S_SYS_WAFERID_300, M_SYS_WAFERID_300) x 195 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_XPOS(x) _SB_MAKEVALUE(x, S_SYS_XPOS) x 196 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_XPOS(x) _SB_GETVALUE(x, S_SYS_XPOS, M_SYS_XPOS) x 200 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_YPOS(x) _SB_MAKEVALUE(x, S_SYS_YPOS) x 201 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_YPOS(x) _SB_GETVALUE(x, S_SYS_YPOS, M_SYS_YPOS) x 218 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_SYS_PLL_DIV) x 219 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_SYS_PLL_DIV, M_SYS_PLL_DIV) x 229 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_SYS_BOOT_MODE) x 230 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_SYS_BOOT_MODE, M_SYS_BOOT_MODE) x 246 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_SYS_CONFIG) x 247 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_CONFIG(x) _SB_GETVALUE(x, S_SYS_CONFIG, M_SYS_CONFIG) x 256 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SYS_CLKCOUNT(x) _SB_MAKEVALUE(x, S_SYS_CLKCOUNT) x 257 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SYS_CLKCOUNT(x) _SB_GETVALUE(x, S_SYS_CLKCOUNT, M_SYS_CLKCOUNT) x 330 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x, S_SCD_WDOG_RESET_TYPE) x 331 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x, S_SCD_WDOG_RESET_TYPE, M_SCD_WDOG_RESET_TYPE) x 354 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x, S_SCD_TIMER_INIT) x 355 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x, S_SCD_TIMER_INIT, M_SCD_TIMER_INIT) x 360 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x, S_SCD_TIMER_CNT) x 361 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x, S_SCD_TIMER_CNT, M_SCD_TIMER_CNT) x 373 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC0) x 374 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SPC_CFG_SRC0(x) _SB_GETVALUE(x, S_SPC_CFG_SRC0, M_SPC_CFG_SRC0) x 378 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC1) x 379 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SPC_CFG_SRC1(x) _SB_GETVALUE(x, S_SPC_CFG_SRC1, M_SPC_CFG_SRC1) x 383 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC2) x 384 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SPC_CFG_SRC2(x) _SB_GETVALUE(x, S_SPC_CFG_SRC2, M_SPC_CFG_SRC2) x 388 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC3) x 389 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SPC_CFG_SRC3(x) _SB_GETVALUE(x, S_SPC_CFG_SRC3, M_SPC_CFG_SRC3) x 403 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_BERR_TID(x) _SB_MAKEVALUE(x, S_SCD_BERR_TID) x 404 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_BERR_TID(x) _SB_GETVALUE(x, S_SCD_BERR_TID, M_SCD_BERR_TID) x 408 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_BERR_RID(x) _SB_MAKEVALUE(x, S_SCD_BERR_RID) x 409 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_BERR_RID(x) _SB_GETVALUE(x, S_SCD_BERR_RID, M_SCD_BERR_RID) x 413 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_BERR_DCODE(x) _SB_MAKEVALUE(x, S_SCD_BERR_DCODE) x 414 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_BERR_DCODE(x) _SB_GETVALUE(x, S_SCD_BERR_DCODE, M_SCD_BERR_DCODE) x 421 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_L2ECC_CORR_D(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_CORR_D) x 422 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_L2ECC_CORR_D(x) _SB_GETVALUE(x, S_SCD_L2ECC_CORR_D, M_SCD_L2ECC_CORR_D) x 426 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_L2ECC_BAD_D(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_BAD_D) x 427 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_L2ECC_BAD_D(x) _SB_GETVALUE(x, S_SCD_L2ECC_BAD_D, M_SCD_L2ECC_BAD_D) x 431 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_L2ECC_CORR_T(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_CORR_T) x 432 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_L2ECC_CORR_T(x) _SB_GETVALUE(x, S_SCD_L2ECC_CORR_T, M_SCD_L2ECC_CORR_T) x 436 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_L2ECC_BAD_T(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_BAD_T) x 437 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_L2ECC_BAD_T(x) _SB_GETVALUE(x, S_SCD_L2ECC_BAD_T, M_SCD_L2ECC_BAD_T) x 441 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_MEM_ECC_CORR(x) _SB_MAKEVALUE(x, S_SCD_MEM_ECC_CORR) x 442 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_MEM_ECC_CORR(x) _SB_GETVALUE(x, S_SCD_MEM_ECC_CORR, M_SCD_MEM_ECC_CORR) x 446 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_MEM_ECC_BAD(x) _SB_MAKEVALUE(x, S_SCD_MEM_ECC_BAD) x 447 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_MEM_ECC_BAD(x) _SB_GETVALUE(x, S_SCD_MEM_ECC_BAD, M_SCD_MEM_ECC_BAD) x 451 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_MEM_BUSERR(x) _SB_MAKEVALUE(x, S_SCD_MEM_BUSERR) x 452 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_MEM_BUSERR(x) _SB_GETVALUE(x, S_SCD_MEM_BUSERR, M_SCD_MEM_BUSERR) x 465 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_CNT) x 466 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_ATRAP_CFG_CNT(x) _SB_GETVALUE(x, S_ATRAP_CFG_CNT, M_ATRAP_CFG_CNT) x 476 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_AGENTID) x 477 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x, S_ATRAP_CFG_AGENTID, M_ATRAP_CFG_AGENTID) x 489 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_CATTR) x 490 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x, S_ATRAP_CFG_CATTR, M_ATRAP_CFG_CATTR) x 532 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x, S_SCD_TRACE_CFG_CUR_ADDR) x 533 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x, S_SCD_TRACE_CFG_CUR_ADDR, M_SCD_TRACE_CFG_CUR_ADDR) x 541 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TREVT_ADDR_MATCH(x) _SB_MAKEVALUE(x, S_SCD_TREVT_ADDR_MATCH) x 542 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TREVT_ADDR_MATCH(x) _SB_GETVALUE(x, S_SCD_TREVT_ADDR_MATCH, M_SCD_TREVT_ADDR_MATCH) x 554 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TREVT_REQID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_REQID) x 555 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TREVT_REQID(x) _SB_GETVALUE(x, S_SCD_TREVT_REQID, M_SCD_TREVT_REQID) x 559 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TREVT_RESPID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_RESPID) x 560 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TREVT_RESPID(x) _SB_GETVALUE(x, S_SCD_TREVT_RESPID, M_SCD_TREVT_RESPID) x 564 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TREVT_DATAID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_DATAID) x 565 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TREVT_DATAID(x) _SB_GETVALUE(x, S_SCD_TREVT_DATAID, M_SCD_TREVT_DATID) x 569 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TREVT_COUNT(x) _SB_MAKEVALUE(x, S_SCD_TREVT_COUNT) x 570 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TREVT_COUNT(x) _SB_GETVALUE(x, S_SCD_TREVT_COUNT, M_SCD_TREVT_COUNT) x 578 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TRSEQ_EVENT4(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT4) x 579 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TRSEQ_EVENT4(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT4, M_SCD_TRSEQ_EVENT4) x 583 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TRSEQ_EVENT3(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT3) x 584 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TRSEQ_EVENT3(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT3, M_SCD_TRSEQ_EVENT3) x 588 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TRSEQ_EVENT2(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT2) x 589 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TRSEQ_EVENT2(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT2, M_SCD_TRSEQ_EVENT2) x 593 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TRSEQ_EVENT1(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT1) x 594 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TRSEQ_EVENT1(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT1, M_SCD_TRSEQ_EVENT1) x 620 arch/mips/include/asm/sibyte/sb1250_scd.h #define V_SCD_TRSEQ_FUNCTION(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_FUNCTION) x 621 arch/mips/include/asm/sibyte/sb1250_scd.h #define G_SCD_TRSEQ_FUNCTION(x) _SB_GETVALUE(x, S_SCD_TRSEQ_FUNCTION, M_SCD_TRSEQ_FUNCTION) x 32 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_FREQ_DIV(x) _SB_MAKEVALUE(x, S_SMB_FREQ_DIV) x 40 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_CMD(x) _SB_MAKEVALUE(x, S_SMB_CMD) x 51 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_DATA_OUT(x) _SB_MAKEVALUE(x, S_SMB_DATA_OUT) x 69 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_SCL_IN(x) _SB_MAKEVALUE(x, S_SMB_SCL_IN) x 70 arch/mips/include/asm/sibyte/sb1250_smbus.h #define G_SMB_SCL_IN(x) _SB_GETVALUE(x, S_SMB_SCL_IN, M_SMB_SCL_IN) x 75 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_REF(x) _SB_MAKEVALUE(x, S_SMB_REF) x 76 arch/mips/include/asm/sibyte/sb1250_smbus.h #define G_SMB_REF(x) _SB_GETVALUE(x, S_SMB_REF, M_SMB_REF) x 80 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_DATA_IN(x) _SB_MAKEVALUE(x, S_SMB_DATA_IN) x 81 arch/mips/include/asm/sibyte/sb1250_smbus.h #define G_SMB_DATA_IN(x) _SB_GETVALUE(x, S_SMB_DATA_IN, M_SMB_DATA_IN) x 89 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_ADDR(x) _SB_MAKEVALUE(x, S_SMB_ADDR) x 90 arch/mips/include/asm/sibyte/sb1250_smbus.h #define G_SMB_ADDR(x) _SB_GETVALUE(x, S_SMB_ADDR, M_SMB_ADDR) x 96 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_TT(x) _SB_MAKEVALUE(x, S_SMB_TT) x 97 arch/mips/include/asm/sibyte/sb1250_smbus.h #define G_SMB_TT(x) _SB_GETVALUE(x, S_SMB_TT, M_SMB_TT) x 125 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_LB(x) _SB_MAKEVALUE(x, S_SMB_LB) x 129 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_MB(x) _SB_MAKEVALUE(x, S_SMB_MB) x 138 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SPEC_MB(x) _SB_MAKEVALUE(x, S_SPEC_PEC) x 145 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_CMDH(x) _SB_MAKEVALUE(x, S_SMB_CMDH) x 151 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_DFMT(x) _SB_MAKEVALUE(x, S_SMB_DFMT) x 152 arch/mips/include/asm/sibyte/sb1250_smbus.h #define G_SMB_DFMT(x) _SB_GETVALUE(x, S_SMB_DFMT, M_SMB_DFMT) x 174 arch/mips/include/asm/sibyte/sb1250_smbus.h #define V_SMB_AFMT(x) _SB_MAKEVALUE(x, S_SMB_AFMT) x 175 arch/mips/include/asm/sibyte/sb1250_smbus.h #define G_SMB_AFMT(x) _SB_GETVALUE(x, S_SMB_AFMT, M_SMB_AFMT) x 34 arch/mips/include/asm/sibyte/sb1250_syncser.h #define V_SYNCSER_FLAG_NUM _SB_MAKEVALUE(x, S_SYNCSER_FLAG_NUM) x 50 arch/mips/include/asm/sibyte/sb1250_syncser.h #define V_SYNCSER_RXSYNC_DLY(x) _SB_MAKEVALUE(x, S_SYNCSER_RXSYNC_DLY) x 63 arch/mips/include/asm/sibyte/sb1250_syncser.h #define V_SYNCSER_TXSYNC_DLY(x) _SB_MAKEVALUE(x, S_SYNCSER_TXSYNC_DLY) x 128 arch/mips/include/asm/sibyte/sb1250_syncser.h #define V_SYNCSER_SEQ_COUNT(x) _SB_MAKEVALUE(x, S_SYNCSER_SEQ_COUNT) x 37 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_BITS_PER_CHAR(x) _SB_MAKEVALUE(x, S_DUART_BITS_PER_CHAR) x 55 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_PARITY_MODE(x) _SB_MAKEVALUE(x, S_DUART_PARITY_MODE) x 91 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_CHAN_MODE(x) _SB_MAKEVALUE(x, S_DUART_CHAN_MODE) x 114 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_MISC_CMD(x) _SB_MAKEVALUE(x, S_DUART_MISC_CMD) x 159 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_BAUD_RATE(x) (100000000/((x)*20)-1) x 232 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_ISR_RX_A(x) _SB_MAKEVALUE(x, S_DUART_ISR_RX_A) x 233 arch/mips/include/asm/sibyte/sb1250_uart.h #define G_DUART_ISR_RX_A(x) _SB_GETVALUE(x, S_DUART_ISR_RX_A, M_DUART_ISR_RX_A) x 336 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_SIG_FULL(x) _SB_MAKEVALUE(x, S_DUART_SIG_FULL) x 337 arch/mips/include/asm/sibyte/sb1250_uart.h #define G_DUART_SIG_FULL(x) _SB_GETVALUE(x, S_DUART_SIG_FULL, M_DUART_SIG_FULL) x 341 arch/mips/include/asm/sibyte/sb1250_uart.h #define V_DUART_INT_TIME(x) _SB_MAKEVALUE(x, S_DUART_INT_TIME) x 342 arch/mips/include/asm/sibyte/sb1250_uart.h #define G_DUART_INT_TIME(x) _SB_GETVALUE(x, S_DUART_INT_TIME, M_DUART_INT_TIME) x 15 arch/mips/include/asm/sim.h #define __str2(x) #x x 16 arch/mips/include/asm/sim.h #define __str(x) __str2(x) x 471 arch/mips/include/asm/sn/ioc3.h #define INT_OUT_US_TO_COUNT(x) /* convert uS to a count value */ \ x 472 arch/mips/include/asm/sn/ioc3.h (((x) * 10 + INT_OUT_NS_PER_TICK / 200) * \ x 474 arch/mips/include/asm/sn/ioc3.h #define INT_OUT_COUNT_TO_US(x) /* convert count value to uS */ \ x 475 arch/mips/include/asm/sn/ioc3.h (((x) + 1) * INT_OUT_NS_PER_TICK / 1000) x 481 arch/mips/include/asm/sn/ioc3.h #define GPCR_DIR_PIN(x) (1<<(x)) /* access one of the DIR bits */ x 483 arch/mips/include/asm/sn/ioc3.h #define GPCR_EDGE_PIN(x) (1<<((x)+15)) /* access one of the EDGE bits */ x 32 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_ADDR_RO_TO_PHYS(x) (x - REP_BASE) x 33 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_ADDR_RW_TO_PHYS(x) (x - REP_BASE - 16777216) x 38 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_KERN_RO_TO_PHYS(x) \ x 39 arch/mips/include/asm/sn/mapped_kernel.h ((unsigned long)MAPPED_ADDR_RO_TO_PHYS(x) | \ x 41 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_KERN_RW_TO_PHYS(x) \ x 42 arch/mips/include/asm/sn/mapped_kernel.h ((unsigned long)MAPPED_ADDR_RW_TO_PHYS(x) | \ x 47 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_KERN_RO_TO_PHYS(x) (x - REP_BASE) x 48 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_KERN_RW_TO_PHYS(x) (x - REP_BASE) x 52 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_KERN_RO_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RO_TO_PHYS(x)) x 53 arch/mips/include/asm/sn/mapped_kernel.h #define MAPPED_KERN_RW_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RW_TO_PHYS(x)) x 335 arch/mips/include/asm/sn/sn0/hubio.h #define IIO_WIDPRTE(x) IIO_PRTE(((x) - 8)) /* widget ID to its PRTE num */ x 66 arch/mips/include/asm/txx9/generic.h static inline unsigned int __fls8(unsigned char x) x 70 arch/mips/include/asm/txx9/generic.h if (!(x & 0xf0)) { x 72 arch/mips/include/asm/txx9/generic.h x <<= 4; x 74 arch/mips/include/asm/txx9/generic.h if (!(x & 0xc0)) { x 76 arch/mips/include/asm/txx9/generic.h x <<= 2; x 78 arch/mips/include/asm/txx9/generic.h if (!(x & 0x80)) x 73 arch/mips/include/asm/uaccess.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 153 arch/mips/include/asm/uaccess.h #define put_user(x,ptr) \ x 154 arch/mips/include/asm/uaccess.h __put_user_check((x), (ptr), sizeof(*(ptr))) x 174 arch/mips/include/asm/uaccess.h #define get_user(x,ptr) \ x 175 arch/mips/include/asm/uaccess.h __get_user_check((x), (ptr), sizeof(*(ptr))) x 197 arch/mips/include/asm/uaccess.h #define __put_user(x,ptr) \ x 198 arch/mips/include/asm/uaccess.h __put_user_nocheck((x), (ptr), sizeof(*(ptr))) x 221 arch/mips/include/asm/uaccess.h #define __get_user(x,ptr) \ x 222 arch/mips/include/asm/uaccess.h __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 225 arch/mips/include/asm/uaccess.h #define __m(x) (*(struct __large_struct __user *)(x)) x 284 arch/mips/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) \ x 289 arch/mips/include/asm/uaccess.h __get_kernel_common((x), size, ptr); \ x 292 arch/mips/include/asm/uaccess.h __get_user_common((x), size, ptr); \ x 297 arch/mips/include/asm/uaccess.h #define __get_user_check(x, ptr, size) \ x 305 arch/mips/include/asm/uaccess.h __get_kernel_common((x), size, __gu_ptr); \ x 307 arch/mips/include/asm/uaccess.h __get_user_common((x), size, __gu_ptr); \ x 309 arch/mips/include/asm/uaccess.h (x) = 0; \ x 423 arch/mips/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) \ x 428 arch/mips/include/asm/uaccess.h __pu_val = (x); \ x 438 arch/mips/include/asm/uaccess.h #define __put_user_check(x, ptr, size) \ x 441 arch/mips/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = (x); \ x 19 arch/mips/include/asm/vga.h #define VGA_MAP_MEM(x, s) CKSEG1ADDR(0x10000000L + (unsigned long)(x)) x 21 arch/mips/include/asm/vga.h #define vga_readb(x) (*(x)) x 22 arch/mips/include/asm/vga.h #define vga_writeb(x, y) (*(y) = (x)) x 20 arch/mips/include/asm/vr41xx/irq.h #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) x 34 arch/mips/include/asm/vr41xx/irq.h #define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) x 55 arch/mips/include/asm/vr41xx/irq.h #define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) x 74 arch/mips/include/asm/vr41xx/irq.h #define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ x 81 arch/mips/include/asm/vr41xx/irq.h #define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) x 45 arch/mips/include/asm/xtalk/xtalk.h #define XIO_PACKED(x) (((x)&XIO_PORT_BITS) != 0) x 46 arch/mips/include/asm/xtalk/xtalk.h #define XIO_ADDR(x) ((x)&XIO_ADDR_BITS) x 47 arch/mips/include/asm/xtalk/xtalk.h #define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT)) x 1006 arch/mips/include/uapi/asm/inst.h __BITFIELD_FIELD(unsigned int x : 1, x 21 arch/mips/include/uapi/asm/swab.h static inline __attribute_const__ __u16 __arch_swab16(__u16 x) x 28 arch/mips/include/uapi/asm/swab.h : "=r" (x) x 29 arch/mips/include/uapi/asm/swab.h : "r" (x)); x 31 arch/mips/include/uapi/asm/swab.h return x; x 35 arch/mips/include/uapi/asm/swab.h static inline __attribute_const__ __u32 __arch_swab32(__u32 x) x 43 arch/mips/include/uapi/asm/swab.h : "=r" (x) x 44 arch/mips/include/uapi/asm/swab.h : "r" (x)); x 46 arch/mips/include/uapi/asm/swab.h return x; x 55 arch/mips/include/uapi/asm/swab.h static inline __attribute_const__ __u64 __arch_swab64(__u64 x) x 63 arch/mips/include/uapi/asm/swab.h : "=r" (x) x 64 arch/mips/include/uapi/asm/swab.h : "r" (x)); x 66 arch/mips/include/uapi/asm/swab.h return x; x 363 arch/mips/kernel/branch.c if (!inst.jal.x) x 74 arch/mips/kernel/perf_event_mipsxx.c #define C(x) PERF_COUNT_HW_CACHE_##x x 26 arch/mips/kernel/relocate.c #define RELOCATED(x) ((void *)((long)x + offset)) x 29 arch/mips/kernel/spram.c #define read_c0_errctl(x) read_c0_ecc(x) x 30 arch/mips/kernel/spram.c #define write_c0_errctl(x) write_c0_ecc(x) x 95 arch/mips/kernel/unaligned.c #define STR(x) __STR(x) x 96 arch/mips/kernel/unaligned.c #define __STR(x) #x x 42 arch/mips/kvm/mips.c #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x) x 64 arch/mips/lantiq/falcon/sysctrl.c #define sysctl_w32(m, x, y) ltq_w32((x), sysctl_membase[m] + (y)) x 65 arch/mips/lantiq/falcon/sysctrl.c #define sysctl_r32(m, x) ltq_r32(sysctl_membase[m] + (x)) x 69 arch/mips/lantiq/falcon/sysctrl.c #define status_w32(x, y) ltq_w32((x), status_membase + (y)) x 70 arch/mips/lantiq/falcon/sysctrl.c #define status_r32(x) ltq_r32(status_membase + (x)) x 49 arch/mips/lantiq/irq.c #define ltq_icu_w32(vpe, m, x, y) \ x 50 arch/mips/lantiq/irq.c ltq_w32((x), ltq_icu_membase[vpe] + m*LTQ_ICU_IM_SIZE + (y)) x 52 arch/mips/lantiq/irq.c #define ltq_icu_r32(vpe, m, x) \ x 53 arch/mips/lantiq/irq.c ltq_r32(ltq_icu_membase[vpe] + m*LTQ_ICU_IM_SIZE + (x)) x 55 arch/mips/lantiq/irq.c #define ltq_eiu_w32(x, y) ltq_w32((x), ltq_eiu_membase + (y)) x 56 arch/mips/lantiq/irq.c #define ltq_eiu_r32(x) ltq_r32(ltq_eiu_membase + (x)) x 18 arch/mips/lantiq/xway/dcdc.c #define dcdc_w8(x, y) ltq_w8((x), dcdc_membase + (y)) x 19 arch/mips/lantiq/xway/dcdc.c #define dcdc_r8(x) ltq_r8(dcdc_membase + (x)) x 46 arch/mips/lantiq/xway/dma.c #define ltq_dma_r32(x) ltq_r32(ltq_dma_membase + (x)) x 47 arch/mips/lantiq/xway/dma.c #define ltq_dma_w32(x, y) ltq_w32(x, ltq_dma_membase + (y)) x 48 arch/mips/lantiq/xway/dma.c #define ltq_dma_w32_mask(x, y, z) ltq_w32_mask(x, y, \ x 30 arch/mips/lantiq/xway/gptu.c #define GPTU_SHIFT(x) (x % 2 ? 4 : 0) x 31 arch/mips/lantiq/xway/gptu.c #define GPTU_BASE(x) (((x >> 1) * 0x20) + 0x10) x 33 arch/mips/lantiq/xway/gptu.c #define GPTU_CON(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x00) x 35 arch/mips/lantiq/xway/gptu.c #define GPTU_RUN(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x08) x 37 arch/mips/lantiq/xway/gptu.c #define GPTU_RLD(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x10) x 39 arch/mips/lantiq/xway/gptu.c #define GPTU_CNT(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x18) x 58 arch/mips/lantiq/xway/gptu.c #define gptu_w32(x, y) ltq_w32((x), gptu_membase + (y)) x 59 arch/mips/lantiq/xway/gptu.c #define gptu_r32(x) ltq_r32(gptu_membase + (x)) x 42 arch/mips/lantiq/xway/sysctrl.c #define PWDCR(x) ((x) ? (PMU_PWDCR1) : (PMU_PWDCR)) x 44 arch/mips/lantiq/xway/sysctrl.c #define PWDSR(x) ((x) ? (PMU_PWDSR1) : (PMU_PWDSR)) x 83 arch/mips/lantiq/xway/sysctrl.c #define PWDCR_EN_XRX(x) (pmu_clk_cr_a[(x)]) x 84 arch/mips/lantiq/xway/sysctrl.c #define PWDCR_DIS_XRX(x) (pmu_clk_cr_b[(x)]) x 85 arch/mips/lantiq/xway/sysctrl.c #define PWDSR_XRX(x) (pmu_clk_sr[(x)]) x 143 arch/mips/lantiq/xway/sysctrl.c #define pmu_w32(x, y) ltq_w32((x), pmu_membase + (y)) x 144 arch/mips/lantiq/xway/sysctrl.c #define pmu_r32(x) ltq_r32(pmu_membase + (x)) x 43 arch/mips/lasat/interrupt.c static inline int ls1bit32(unsigned int x) x 47 arch/mips/lasat/interrupt.c s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; x 48 arch/mips/lasat/interrupt.c s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s; x 49 arch/mips/lasat/interrupt.c s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s; x 50 arch/mips/lasat/interrupt.c s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s; x 51 arch/mips/lasat/interrupt.c s = 1; if (x << 1 == 0) s = 0; b -= s; x 13 arch/mips/loongson32/common/irq.c #define LS1X_INTC_REG(n, x) \ x 14 arch/mips/loongson32/common/irq.c ((void __iomem *)KSEG1ADDR(LS1X_INTC_BASE + (n * 0x18) + (x))) x 798 arch/mips/math-emu/cp1emu.c #define SIFROMREG(si, x) \ x 801 arch/mips/math-emu/cp1emu.c (si) = (int)get_fpr32(&ctx->fpr[x], 0); \ x 803 arch/mips/math-emu/cp1emu.c (si) = (int)get_fpr32(&ctx->fpr[(x) & ~1], (x) & 1); \ x 806 arch/mips/math-emu/cp1emu.c #define SITOREG(si, x) \ x 810 arch/mips/math-emu/cp1emu.c set_fpr32(&ctx->fpr[x], 0, si); \ x 811 arch/mips/math-emu/cp1emu.c for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ x 812 arch/mips/math-emu/cp1emu.c set_fpr32(&ctx->fpr[x], i, 0); \ x 814 arch/mips/math-emu/cp1emu.c set_fpr32(&ctx->fpr[(x) & ~1], (x) & 1, si); \ x 818 arch/mips/math-emu/cp1emu.c #define SIFROMHREG(si, x) ((si) = (int)get_fpr32(&ctx->fpr[x], 1)) x 820 arch/mips/math-emu/cp1emu.c #define SITOHREG(si, x) \ x 823 arch/mips/math-emu/cp1emu.c set_fpr32(&ctx->fpr[x], 1, si); \ x 824 arch/mips/math-emu/cp1emu.c for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ x 825 arch/mips/math-emu/cp1emu.c set_fpr32(&ctx->fpr[x], i, 0); \ x 828 arch/mips/math-emu/cp1emu.c #define DIFROMREG(di, x) \ x 829 arch/mips/math-emu/cp1emu.c ((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) ^ 1)], 0)) x 831 arch/mips/math-emu/cp1emu.c #define DITOREG(di, x) \ x 834 arch/mips/math-emu/cp1emu.c fpr = (x) & ~(cop1_64bit(xcp) ^ 1); \ x 836 arch/mips/math-emu/cp1emu.c for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val64); i++) \ x 840 arch/mips/math-emu/cp1emu.c #define SPFROMREG(sp, x) SIFROMREG((sp).bits, x) x 841 arch/mips/math-emu/cp1emu.c #define SPTOREG(sp, x) SITOREG((sp).bits, x) x 842 arch/mips/math-emu/cp1emu.c #define DPFROMREG(dp, x) DIFROMREG((dp).bits, x) x 843 arch/mips/math-emu/cp1emu.c #define DPTOREG(dp, x) DITOREG((dp).bits, x) x 14 arch/mips/math-emu/dp_2008class.c int ieee754dp_2008class(union ieee754dp x) x 12 arch/mips/math-emu/dp_add.c union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y) x 41 arch/mips/math-emu/dp_add.c return ieee754dp_nanxcpt(x); x 54 arch/mips/math-emu/dp_add.c return x; x 62 arch/mips/math-emu/dp_add.c return x; x 74 arch/mips/math-emu/dp_add.c return x; x 81 arch/mips/math-emu/dp_add.c return x; x 87 arch/mips/math-emu/dp_add.c return x; x 12 arch/mips/math-emu/dp_cmp.c int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cmp, int sig) x 32 arch/mips/math-emu/dp_cmp.c vx = x.bits; x 12 arch/mips/math-emu/dp_div.c union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y) x 43 arch/mips/math-emu/dp_div.c return ieee754dp_nanxcpt(x); x 56 arch/mips/math-emu/dp_div.c return x; x 12 arch/mips/math-emu/dp_fint.c union ieee754dp ieee754dp_fint(int x) x 20 arch/mips/math-emu/dp_fint.c if (x == 0) x 22 arch/mips/math-emu/dp_fint.c if (x == 1 || x == -1) x 23 arch/mips/math-emu/dp_fint.c return ieee754dp_one(x < 0); x 24 arch/mips/math-emu/dp_fint.c if (x == 10 || x == -10) x 25 arch/mips/math-emu/dp_fint.c return ieee754dp_ten(x < 0); x 27 arch/mips/math-emu/dp_fint.c xs = (x < 0); x 29 arch/mips/math-emu/dp_fint.c if (x == (1 << 31)) x 32 arch/mips/math-emu/dp_fint.c xm = -x; x 34 arch/mips/math-emu/dp_fint.c xm = x; x 12 arch/mips/math-emu/dp_flong.c union ieee754dp ieee754dp_flong(s64 x) x 20 arch/mips/math-emu/dp_flong.c if (x == 0) x 22 arch/mips/math-emu/dp_flong.c if (x == 1 || x == -1) x 23 arch/mips/math-emu/dp_flong.c return ieee754dp_one(x < 0); x 24 arch/mips/math-emu/dp_flong.c if (x == 10 || x == -10) x 25 arch/mips/math-emu/dp_flong.c return ieee754dp_ten(x < 0); x 27 arch/mips/math-emu/dp_flong.c xs = (x < 0); x 29 arch/mips/math-emu/dp_flong.c if (x == (1ULL << 63)) x 32 arch/mips/math-emu/dp_flong.c xm = -x; x 34 arch/mips/math-emu/dp_flong.c xm = x; x 18 arch/mips/math-emu/dp_fmax.c union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y) x 45 arch/mips/math-emu/dp_fmax.c return ieee754dp_nanxcpt(x); x 55 arch/mips/math-emu/dp_fmax.c return x; x 65 arch/mips/math-emu/dp_fmax.c return x; x 81 arch/mips/math-emu/dp_fmax.c return xs ? y : x; x 89 arch/mips/math-emu/dp_fmax.c return ys ? x : y; x 115 arch/mips/math-emu/dp_fmax.c return x; x 121 arch/mips/math-emu/dp_fmax.c return x; x 129 arch/mips/math-emu/dp_fmax.c return x; x 137 arch/mips/math-emu/dp_fmax.c return x; x 141 arch/mips/math-emu/dp_fmax.c return x; x 145 arch/mips/math-emu/dp_fmax.c union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y) x 172 arch/mips/math-emu/dp_fmax.c return ieee754dp_nanxcpt(x); x 182 arch/mips/math-emu/dp_fmax.c return x; x 192 arch/mips/math-emu/dp_fmax.c return x; x 211 arch/mips/math-emu/dp_fmax.c return x; x 242 arch/mips/math-emu/dp_fmax.c return x; x 250 arch/mips/math-emu/dp_fmax.c return x; x 252 arch/mips/math-emu/dp_fmax.c return x; x 18 arch/mips/math-emu/dp_fmin.c union ieee754dp ieee754dp_fmin(union ieee754dp x, union ieee754dp y) x 45 arch/mips/math-emu/dp_fmin.c return ieee754dp_nanxcpt(x); x 55 arch/mips/math-emu/dp_fmin.c return x; x 65 arch/mips/math-emu/dp_fmin.c return x; x 81 arch/mips/math-emu/dp_fmin.c return xs ? x : y; x 89 arch/mips/math-emu/dp_fmin.c return ys ? y : x; x 113 arch/mips/math-emu/dp_fmin.c return x; x 123 arch/mips/math-emu/dp_fmin.c return x; x 127 arch/mips/math-emu/dp_fmin.c return x; x 136 arch/mips/math-emu/dp_fmin.c return x; x 142 arch/mips/math-emu/dp_fmin.c return x; x 145 arch/mips/math-emu/dp_fmin.c union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y) x 172 arch/mips/math-emu/dp_fmin.c return ieee754dp_nanxcpt(x); x 182 arch/mips/math-emu/dp_fmin.c return x; x 192 arch/mips/math-emu/dp_fmin.c return x; x 218 arch/mips/math-emu/dp_fmin.c return x; x 244 arch/mips/math-emu/dp_fmin.c return x; x 248 arch/mips/math-emu/dp_fmin.c return x; x 252 arch/mips/math-emu/dp_fmin.c return x; x 19 arch/mips/math-emu/dp_fsp.c union ieee754dp ieee754dp_fsp(union ieee754sp x) x 40 arch/mips/math-emu/dp_maddf.c static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x, x 78 arch/mips/math-emu/dp_maddf.c return ieee754dp_nanxcpt(x); x 84 arch/mips/math-emu/dp_maddf.c return x; x 332 arch/mips/math-emu/dp_maddf.c union ieee754dp ieee754dp_maddf(union ieee754dp z, union ieee754dp x, x 335 arch/mips/math-emu/dp_maddf.c return _dp_maddf(z, x, y, 0); x 338 arch/mips/math-emu/dp_maddf.c union ieee754dp ieee754dp_msubf(union ieee754dp z, union ieee754dp x, x 341 arch/mips/math-emu/dp_maddf.c return _dp_maddf(z, x, y, MADDF_NEGATE_PRODUCT); x 12 arch/mips/math-emu/dp_mul.c union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y) x 51 arch/mips/math-emu/dp_mul.c return ieee754dp_nanxcpt(x); x 64 arch/mips/math-emu/dp_mul.c return x; x 14 arch/mips/math-emu/dp_rint.c union ieee754dp ieee754dp_rint(union ieee754dp x) x 30 arch/mips/math-emu/dp_rint.c return ieee754dp_nanxcpt(x); x 35 arch/mips/math-emu/dp_rint.c return x; x 38 arch/mips/math-emu/dp_rint.c return x; x 12 arch/mips/math-emu/dp_simple.c union ieee754dp ieee754dp_neg(union ieee754dp x) x 17 arch/mips/math-emu/dp_simple.c y = x; x 18 arch/mips/math-emu/dp_simple.c DPSIGN(y) = !DPSIGN(x); x 24 arch/mips/math-emu/dp_simple.c y = ieee754dp_sub(ieee754dp_zero(0), x); x 30 arch/mips/math-emu/dp_simple.c union ieee754dp ieee754dp_abs(union ieee754dp x) x 35 arch/mips/math-emu/dp_simple.c y = x; x 42 arch/mips/math-emu/dp_simple.c if (DPSIGN(x)) x 43 arch/mips/math-emu/dp_simple.c y = ieee754dp_sub(ieee754dp_zero(0), x); x 45 arch/mips/math-emu/dp_simple.c y = ieee754dp_add(ieee754dp_zero(0), x); x 20 arch/mips/math-emu/dp_sqrt.c union ieee754dp ieee754dp_sqrt(union ieee754dp x) x 34 arch/mips/math-emu/dp_sqrt.c return ieee754dp_nanxcpt(x); x 38 arch/mips/math-emu/dp_sqrt.c return x; x 42 arch/mips/math-emu/dp_sqrt.c return x; x 51 arch/mips/math-emu/dp_sqrt.c return x; x 82 arch/mips/math-emu/dp_sqrt.c x = builddp(0, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT); x 83 arch/mips/math-emu/dp_sqrt.c y = x; x 93 arch/mips/math-emu/dp_sqrt.c t = ieee754dp_div(x, y); x 104 arch/mips/math-emu/dp_sqrt.c z = ieee754dp_mul(ieee754dp_sub(x, z), y); x 107 arch/mips/math-emu/dp_sqrt.c t = ieee754dp_div(z, ieee754dp_add(t, x)); x 118 arch/mips/math-emu/dp_sqrt.c t = ieee754dp_div(x, y); x 12 arch/mips/math-emu/dp_sub.c union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y) x 41 arch/mips/math-emu/dp_sub.c return ieee754dp_nanxcpt(x); x 54 arch/mips/math-emu/dp_sub.c return x; x 62 arch/mips/math-emu/dp_sub.c return x; x 74 arch/mips/math-emu/dp_sub.c return x; x 81 arch/mips/math-emu/dp_sub.c return x; x 87 arch/mips/math-emu/dp_sub.c return x; x 12 arch/mips/math-emu/dp_tint.c int ieee754dp_tint(union ieee754dp x) x 12 arch/mips/math-emu/dp_tlong.c s64 ieee754dp_tlong(union ieee754dp x) x 45 arch/mips/math-emu/ieee754.h int ieee754sp_class(union ieee754sp x); x 47 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_abs(union ieee754sp x); x 48 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_neg(union ieee754sp x); x 50 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y); x 51 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y); x 52 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y); x 53 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y); x 55 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_fint(int x); x 56 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_flong(s64 x); x 57 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_fdp(union ieee754dp x); x 58 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_rint(union ieee754sp x); x 60 arch/mips/math-emu/ieee754.h int ieee754sp_tint(union ieee754sp x); x 61 arch/mips/math-emu/ieee754.h s64 ieee754sp_tlong(union ieee754sp x); x 63 arch/mips/math-emu/ieee754.h int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cop, int sig); x 65 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_sqrt(union ieee754sp x); x 67 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_maddf(union ieee754sp z, union ieee754sp x, x 69 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_msubf(union ieee754sp z, union ieee754sp x, x 71 arch/mips/math-emu/ieee754.h int ieee754sp_2008class(union ieee754sp x); x 72 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_fmin(union ieee754sp x, union ieee754sp y); x 73 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y); x 74 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y); x 75 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y); x 80 arch/mips/math-emu/ieee754.h int ieee754dp_class(union ieee754dp x); x 82 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y); x 83 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y); x 84 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y); x 85 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y); x 87 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_abs(union ieee754dp x); x 88 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_neg(union ieee754dp x); x 90 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_fint(int x); x 91 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_flong(s64 x); x 92 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_fsp(union ieee754sp x); x 93 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_rint(union ieee754dp x); x 95 arch/mips/math-emu/ieee754.h int ieee754dp_tint(union ieee754dp x); x 96 arch/mips/math-emu/ieee754.h s64 ieee754dp_tlong(union ieee754dp x); x 98 arch/mips/math-emu/ieee754.h int ieee754dp_cmp(union ieee754dp x, union ieee754dp y, int cop, int sig); x 100 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_sqrt(union ieee754dp x); x 102 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_maddf(union ieee754dp z, union ieee754dp x, x 104 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_msubf(union ieee754dp z, union ieee754dp x, x 106 arch/mips/math-emu/ieee754.h int ieee754dp_2008class(union ieee754dp x); x 107 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_fmin(union ieee754dp x, union ieee754dp y); x 108 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y); x 109 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y); x 110 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y); x 204 arch/mips/math-emu/ieee754.h union ieee754sp ieee754sp_dump(char *s, union ieee754sp x); x 205 arch/mips/math-emu/ieee754.h union ieee754dp ieee754dp_dump(char *s, union ieee754dp x); x 292 arch/mips/math-emu/ieee754.h #define ieee754dp_fix(x) ieee754dp_tint(x) x 293 arch/mips/math-emu/ieee754.h #define ieee754sp_fix(x) ieee754sp_tint(x) x 22 arch/mips/math-emu/ieee754d.c union ieee754dp ieee754dp_dump(char *m, union ieee754dp x) x 27 arch/mips/math-emu/ieee754d.c printk("<%08x,%08x>\n", (unsigned) (x.bits >> 32), x 28 arch/mips/math-emu/ieee754d.c (unsigned) x.bits); x 30 arch/mips/math-emu/ieee754d.c switch (ieee754dp_class(x)) { x 33 arch/mips/math-emu/ieee754d.c printk("Nan %c", DPSIGN(x) ? '-' : '+'); x 35 arch/mips/math-emu/ieee754d.c printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); x 38 arch/mips/math-emu/ieee754d.c printk("%cInfinity", DPSIGN(x) ? '-' : '+'); x 41 arch/mips/math-emu/ieee754d.c printk("%cZero", DPSIGN(x) ? '-' : '+'); x 44 arch/mips/math-emu/ieee754d.c printk("%c0.", DPSIGN(x) ? '-' : '+'); x 46 arch/mips/math-emu/ieee754d.c printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); x 47 arch/mips/math-emu/ieee754d.c printk("e%d", DPBEXP(x) - DP_EBIAS); x 50 arch/mips/math-emu/ieee754d.c printk("%c1.", DPSIGN(x) ? '-' : '+'); x 52 arch/mips/math-emu/ieee754d.c printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); x 53 arch/mips/math-emu/ieee754d.c printk("e%d", DPBEXP(x) - DP_EBIAS); x 59 arch/mips/math-emu/ieee754d.c return x; x 62 arch/mips/math-emu/ieee754d.c union ieee754sp ieee754sp_dump(char *m, union ieee754sp x) x 67 arch/mips/math-emu/ieee754d.c printk("<%08x>\n", (unsigned) x.bits); x 69 arch/mips/math-emu/ieee754d.c switch (ieee754sp_class(x)) { x 72 arch/mips/math-emu/ieee754d.c printk("Nan %c", SPSIGN(x) ? '-' : '+'); x 74 arch/mips/math-emu/ieee754d.c printk("%c", SPMANT(x) & SP_MBIT(i) ? '1' : '0'); x 77 arch/mips/math-emu/ieee754d.c printk("%cInfinity", SPSIGN(x) ? '-' : '+'); x 80 arch/mips/math-emu/ieee754d.c printk("%cZero", SPSIGN(x) ? '-' : '+'); x 83 arch/mips/math-emu/ieee754d.c printk("%c0.", SPSIGN(x) ? '-' : '+'); x 85 arch/mips/math-emu/ieee754d.c printk("%c", SPMANT(x) & SP_MBIT(i) ? '1' : '0'); x 86 arch/mips/math-emu/ieee754d.c printk("e%d", SPBEXP(x) - SP_EBIAS); x 89 arch/mips/math-emu/ieee754d.c printk("%c1.", SPSIGN(x) ? '-' : '+'); x 91 arch/mips/math-emu/ieee754d.c printk("%c", SPMANT(x) & SP_MBIT(i) ? '1' : '0'); x 92 arch/mips/math-emu/ieee754d.c printk("e%d", SPBEXP(x) - SP_EBIAS); x 98 arch/mips/math-emu/ieee754d.c return x; x 14 arch/mips/math-emu/ieee754dp.c int ieee754dp_class(union ieee754dp x) x 21 arch/mips/math-emu/ieee754dp.c static inline int ieee754dp_isnan(union ieee754dp x) x 23 arch/mips/math-emu/ieee754dp.c return ieee754_class_nan(ieee754dp_class(x)); x 26 arch/mips/math-emu/ieee754dp.c static inline int ieee754dp_issnan(union ieee754dp x) x 30 arch/mips/math-emu/ieee754dp.c assert(ieee754dp_isnan(x)); x 31 arch/mips/math-emu/ieee754dp.c qbit = (DPMANT(x) & DP_MBIT(DP_FBITS - 1)) == DP_MBIT(DP_FBITS - 1); x 23 arch/mips/math-emu/ieee754dp.h #define DP_MBIT(x) ((u64)1 << (x)) x 31 arch/mips/math-emu/ieee754dp.h static inline int ieee754dp_finite(union ieee754dp x) x 33 arch/mips/math-emu/ieee754dp.h return DPBEXP(x) != DP_EMAX + 1 + DP_EBIAS; x 47 arch/mips/math-emu/ieee754dp.h #define DPXMULT(x, y) ((u64)(x) * (u64)y) x 15 arch/mips/math-emu/ieee754int.h #define CLPAIR(x, y) ((x)*6+(y)) x 32 arch/mips/math-emu/ieee754int.h static inline int ieee754_setandtestcx(const unsigned int x) x 34 arch/mips/math-emu/ieee754int.h ieee754_setcx(x); x 36 arch/mips/math-emu/ieee754int.h return ieee754_csr.mx & x; x 77 arch/mips/math-emu/ieee754int.h #define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm) x 115 arch/mips/math-emu/ieee754int.h #define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm) x 141 arch/mips/math-emu/ieee754int.h #define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm) x 144 arch/mips/math-emu/ieee754int.h #define FLUSHXSP FLUSHSP(x, xc, xs, xe, xm) x 14 arch/mips/math-emu/ieee754sp.c int ieee754sp_class(union ieee754sp x) x 21 arch/mips/math-emu/ieee754sp.c static inline int ieee754sp_isnan(union ieee754sp x) x 23 arch/mips/math-emu/ieee754sp.c return ieee754_class_nan(ieee754sp_class(x)); x 26 arch/mips/math-emu/ieee754sp.c static inline int ieee754sp_issnan(union ieee754sp x) x 30 arch/mips/math-emu/ieee754sp.c assert(ieee754sp_isnan(x)); x 31 arch/mips/math-emu/ieee754sp.c qbit = (SPMANT(x) & SP_MBIT(SP_FBITS - 1)) == SP_MBIT(SP_FBITS - 1); x 23 arch/mips/math-emu/ieee754sp.h #define SP_MBIT(x) ((u32)1 << (x)) x 31 arch/mips/math-emu/ieee754sp.h static inline int ieee754sp_finite(union ieee754sp x) x 33 arch/mips/math-emu/ieee754sp.h return SPBEXP(x) != SP_EMAX + 1 + SP_EBIAS; x 14 arch/mips/math-emu/sp_2008class.c int ieee754sp_2008class(union ieee754sp x) x 12 arch/mips/math-emu/sp_add.c union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y) x 41 arch/mips/math-emu/sp_add.c return ieee754sp_nanxcpt(x); x 54 arch/mips/math-emu/sp_add.c return x; x 62 arch/mips/math-emu/sp_add.c return x; x 74 arch/mips/math-emu/sp_add.c return x; x 81 arch/mips/math-emu/sp_add.c return x; x 87 arch/mips/math-emu/sp_add.c return x; x 12 arch/mips/math-emu/sp_cmp.c int ieee754sp_cmp(union ieee754sp x, union ieee754sp y, int cmp, int sig) x 32 arch/mips/math-emu/sp_cmp.c vx = x.bits; x 12 arch/mips/math-emu/sp_div.c union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y) x 43 arch/mips/math-emu/sp_div.c return ieee754sp_nanxcpt(x); x 56 arch/mips/math-emu/sp_div.c return x; x 19 arch/mips/math-emu/sp_fdp.c union ieee754sp ieee754sp_fdp(union ieee754dp x) x 35 arch/mips/math-emu/sp_fdp.c x = ieee754dp_nanxcpt(x); x 12 arch/mips/math-emu/sp_fint.c union ieee754sp ieee754sp_fint(int x) x 20 arch/mips/math-emu/sp_fint.c if (x == 0) x 22 arch/mips/math-emu/sp_fint.c if (x == 1 || x == -1) x 23 arch/mips/math-emu/sp_fint.c return ieee754sp_one(x < 0); x 24 arch/mips/math-emu/sp_fint.c if (x == 10 || x == -10) x 25 arch/mips/math-emu/sp_fint.c return ieee754sp_ten(x < 0); x 27 arch/mips/math-emu/sp_fint.c xs = (x < 0); x 29 arch/mips/math-emu/sp_fint.c if (x == (1 << 31)) x 32 arch/mips/math-emu/sp_fint.c xm = -x; x 34 arch/mips/math-emu/sp_fint.c xm = x; x 12 arch/mips/math-emu/sp_flong.c union ieee754sp ieee754sp_flong(s64 x) x 20 arch/mips/math-emu/sp_flong.c if (x == 0) x 22 arch/mips/math-emu/sp_flong.c if (x == 1 || x == -1) x 23 arch/mips/math-emu/sp_flong.c return ieee754sp_one(x < 0); x 24 arch/mips/math-emu/sp_flong.c if (x == 10 || x == -10) x 25 arch/mips/math-emu/sp_flong.c return ieee754sp_ten(x < 0); x 27 arch/mips/math-emu/sp_flong.c xs = (x < 0); x 29 arch/mips/math-emu/sp_flong.c if (x == (1ULL << 63)) x 32 arch/mips/math-emu/sp_flong.c xm = -x; x 34 arch/mips/math-emu/sp_flong.c xm = x; x 18 arch/mips/math-emu/sp_fmax.c union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y) x 45 arch/mips/math-emu/sp_fmax.c return ieee754sp_nanxcpt(x); x 55 arch/mips/math-emu/sp_fmax.c return x; x 65 arch/mips/math-emu/sp_fmax.c return x; x 81 arch/mips/math-emu/sp_fmax.c return xs ? y : x; x 89 arch/mips/math-emu/sp_fmax.c return ys ? x : y; x 115 arch/mips/math-emu/sp_fmax.c return x; x 121 arch/mips/math-emu/sp_fmax.c return x; x 129 arch/mips/math-emu/sp_fmax.c return x; x 137 arch/mips/math-emu/sp_fmax.c return x; x 141 arch/mips/math-emu/sp_fmax.c return x; x 145 arch/mips/math-emu/sp_fmax.c union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y) x 172 arch/mips/math-emu/sp_fmax.c return ieee754sp_nanxcpt(x); x 182 arch/mips/math-emu/sp_fmax.c return x; x 192 arch/mips/math-emu/sp_fmax.c return x; x 211 arch/mips/math-emu/sp_fmax.c return x; x 242 arch/mips/math-emu/sp_fmax.c return x; x 250 arch/mips/math-emu/sp_fmax.c return x; x 252 arch/mips/math-emu/sp_fmax.c return x; x 18 arch/mips/math-emu/sp_fmin.c union ieee754sp ieee754sp_fmin(union ieee754sp x, union ieee754sp y) x 45 arch/mips/math-emu/sp_fmin.c return ieee754sp_nanxcpt(x); x 55 arch/mips/math-emu/sp_fmin.c return x; x 65 arch/mips/math-emu/sp_fmin.c return x; x 81 arch/mips/math-emu/sp_fmin.c return xs ? x : y; x 89 arch/mips/math-emu/sp_fmin.c return ys ? y : x; x 113 arch/mips/math-emu/sp_fmin.c return x; x 123 arch/mips/math-emu/sp_fmin.c return x; x 127 arch/mips/math-emu/sp_fmin.c return x; x 136 arch/mips/math-emu/sp_fmin.c return x; x 142 arch/mips/math-emu/sp_fmin.c return x; x 145 arch/mips/math-emu/sp_fmin.c union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y) x 172 arch/mips/math-emu/sp_fmin.c return ieee754sp_nanxcpt(x); x 182 arch/mips/math-emu/sp_fmin.c return x; x 192 arch/mips/math-emu/sp_fmin.c return x; x 218 arch/mips/math-emu/sp_fmin.c return x; x 244 arch/mips/math-emu/sp_fmin.c return x; x 248 arch/mips/math-emu/sp_fmin.c return x; x 252 arch/mips/math-emu/sp_fmin.c return x; x 15 arch/mips/math-emu/sp_maddf.c static union ieee754sp _sp_maddf(union ieee754sp z, union ieee754sp x, x 46 arch/mips/math-emu/sp_maddf.c return ieee754sp_nanxcpt(x); x 52 arch/mips/math-emu/sp_maddf.c return x; x 252 arch/mips/math-emu/sp_maddf.c union ieee754sp ieee754sp_maddf(union ieee754sp z, union ieee754sp x, x 255 arch/mips/math-emu/sp_maddf.c return _sp_maddf(z, x, y, 0); x 258 arch/mips/math-emu/sp_maddf.c union ieee754sp ieee754sp_msubf(union ieee754sp z, union ieee754sp x, x 261 arch/mips/math-emu/sp_maddf.c return _sp_maddf(z, x, y, MADDF_NEGATE_PRODUCT); x 12 arch/mips/math-emu/sp_mul.c union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y) x 51 arch/mips/math-emu/sp_mul.c return ieee754sp_nanxcpt(x); x 64 arch/mips/math-emu/sp_mul.c return x; x 14 arch/mips/math-emu/sp_rint.c union ieee754sp ieee754sp_rint(union ieee754sp x) x 30 arch/mips/math-emu/sp_rint.c return ieee754sp_nanxcpt(x); x 35 arch/mips/math-emu/sp_rint.c return x; x 38 arch/mips/math-emu/sp_rint.c return x; x 12 arch/mips/math-emu/sp_simple.c union ieee754sp ieee754sp_neg(union ieee754sp x) x 17 arch/mips/math-emu/sp_simple.c y = x; x 18 arch/mips/math-emu/sp_simple.c SPSIGN(y) = !SPSIGN(x); x 24 arch/mips/math-emu/sp_simple.c y = ieee754sp_sub(ieee754sp_zero(0), x); x 30 arch/mips/math-emu/sp_simple.c union ieee754sp ieee754sp_abs(union ieee754sp x) x 35 arch/mips/math-emu/sp_simple.c y = x; x 42 arch/mips/math-emu/sp_simple.c if (SPSIGN(x)) x 43 arch/mips/math-emu/sp_simple.c y = ieee754sp_sub(ieee754sp_zero(0), x); x 45 arch/mips/math-emu/sp_simple.c y = ieee754sp_add(ieee754sp_zero(0), x); x 12 arch/mips/math-emu/sp_sqrt.c union ieee754sp ieee754sp_sqrt(union ieee754sp x) x 27 arch/mips/math-emu/sp_sqrt.c return ieee754sp_nanxcpt(x); x 31 arch/mips/math-emu/sp_sqrt.c return x; x 35 arch/mips/math-emu/sp_sqrt.c return x; x 44 arch/mips/math-emu/sp_sqrt.c return x; x 56 arch/mips/math-emu/sp_sqrt.c ix = x.bits; x 101 arch/mips/math-emu/sp_sqrt.c x.bits = ix; x 102 arch/mips/math-emu/sp_sqrt.c return x; x 12 arch/mips/math-emu/sp_sub.c union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y) x 41 arch/mips/math-emu/sp_sub.c return ieee754sp_nanxcpt(x); x 54 arch/mips/math-emu/sp_sub.c return x; x 62 arch/mips/math-emu/sp_sub.c return x; x 74 arch/mips/math-emu/sp_sub.c return x; x 81 arch/mips/math-emu/sp_sub.c return x; x 87 arch/mips/math-emu/sp_sub.c return x; x 12 arch/mips/math-emu/sp_tint.c int ieee754sp_tint(union ieee754sp x) x 12 arch/mips/math-emu/sp_tlong.c s64 ieee754sp_tlong(union ieee754sp x) x 349 arch/mips/pci/msi-octeon.c #define OCTEON_MSI_INT_HANDLER_X(x) \ x 350 arch/mips/pci/msi-octeon.c static irqreturn_t octeon_msi_interrupt##x(int cpl, void *dev_id) \ x 352 arch/mips/pci/msi-octeon.c u64 msi_bits = cvmx_read_csr(msi_rcv_reg[(x)]); \ x 353 arch/mips/pci/msi-octeon.c return __octeon_msi_do_interrupt((x), msi_bits); \ x 26 arch/mips/pci/pci-alchemy.c #define DBG(x...) printk(KERN_DEBUG x) x 28 arch/mips/pci/pci-alchemy.c #define DBG(x...) do {} while (0) x 56 arch/mips/pci/pci-lantiq.c #define ltq_pci_w32(x, y) ltq_w32((x), ltq_pci_membase + (y)) x 57 arch/mips/pci/pci-lantiq.c #define ltq_pci_r32(x) ltq_r32(ltq_pci_membase + (x)) x 59 arch/mips/pci/pci-lantiq.c #define ltq_pci_cfg_w32(x, y) ltq_w32((x), ltq_pci_mapped_cfg + (y)) x 60 arch/mips/pci/pci-lantiq.c #define ltq_pci_cfg_r32(x) ltq_r32(ltq_pci_mapped_cfg + (x)) x 23 arch/mips/pic32/pic32mzda/early_console.c #define UART_BASE(x) ((x) * 0x0200) x 24 arch/mips/pic32/pic32mzda/early_console.c #define U_MODE(x) UART_BASE(x) x 25 arch/mips/pic32/pic32mzda/early_console.c #define U_STA(x) (UART_BASE(x) + 0x10) x 26 arch/mips/pic32/pic32mzda/early_console.c #define U_TXR(x) (UART_BASE(x) + 0x20) x 27 arch/mips/pic32/pic32mzda/early_console.c #define U_BRG(x) (UART_BASE(x) + 0x40) x 379 arch/mips/ralink/mt7620.c #define MHZ(x) ((x) * 1000 * 1000) x 519 arch/mips/ralink/mt7620.c #define RINT(x) ((x) / 1000000) x 520 arch/mips/ralink/mt7620.c #define RFRAC(x) (((x) / 1000) % 1000) x 32 arch/mips/sgi-ip22/ip22-nvram.c int x; \ x 33 arch/mips/sgi-ip22/ip22-nvram.c for (x=0; x<100000; x++) __asm__ __volatile__(""); }) x 14 arch/mips/tools/elf-entry.c # define be32toh(x) bswap_32(x) x 15 arch/mips/tools/elf-entry.c # define le32toh(x) (x) x 16 arch/mips/tools/elf-entry.c # define be64toh(x) bswap_64(x) x 17 arch/mips/tools/elf-entry.c # define le64toh(x) (x) x 19 arch/mips/tools/elf-entry.c # define be32toh(x) (x) x 20 arch/mips/tools/elf-entry.c # define le32toh(x) bswap_32(x) x 21 arch/mips/tools/elf-entry.c # define be64toh(x) (x) x 22 arch/mips/tools/elf-entry.c # define le64toh(x) bswap_64(x) x 598 arch/mips/txx9/generic/setup.c static u16 ioswabw_default(volatile u16 *a, u16 x) x 600 arch/mips/txx9/generic/setup.c return le16_to_cpu(x); x 602 arch/mips/txx9/generic/setup.c static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) x 604 arch/mips/txx9/generic/setup.c return x; x 606 arch/mips/txx9/generic/setup.c u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; x 608 arch/mips/txx9/generic/setup.c u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; x 47 arch/mips/txx9/rbtx4939/setup.c static u16 rbtx4939_ioswabw(volatile u16 *a, u16 x) x 49 arch/mips/txx9/rbtx4939/setup.c return IS_CE1_ADDR(a) ? x : le16_to_cpu(x); x 51 arch/mips/txx9/rbtx4939/setup.c static u16 rbtx4939_mem_ioswabw(volatile u16 *a, u16 x) x 53 arch/mips/txx9/rbtx4939/setup.c return !IS_CE1_ADDR(a) ? x : le16_to_cpu(x); x 314 arch/mips/txx9/rbtx4939/setup.c r.x[0] = __raw_readw(map->virt + ofs); x 322 arch/mips/txx9/rbtx4939/setup.c __raw_writew(datum.x[0], map->virt + ofs); x 91 arch/mips/vdso/genvdso.c #define __ELF(x, bits) Elf##bits##_##x x 92 arch/mips/vdso/genvdso.c #define _ELF(x, bits) __ELF(x, bits) x 93 arch/mips/vdso/genvdso.c #define ELF(x) _ELF(x, ELF_BITS) x 29 arch/mips/vr41xx/common/bcu.c #define CLKSP(x) ((x) & 0x001f) x 30 arch/mips/vr41xx/common/bcu.c #define CLKSP_VR4133(x) ((x) & 0x0007) x 36 arch/mips/vr41xx/common/bcu.c #define DIVT(x) (((x) & 0xf000) >> 12) x 37 arch/mips/vr41xx/common/bcu.c #define DIVVT(x) (((x) & 0x0f00) >> 8) x 39 arch/mips/vr41xx/common/bcu.c #define TDIVMODE(x) (2 << (((x) & 0x1000) >> 12)) x 40 arch/mips/vr41xx/common/bcu.c #define VTDIVMODE(x) (((x) & 0x0700) >> 8) x 84 arch/mips/vr41xx/common/icu.c #define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */ x 85 arch/mips/vr41xx/common/icu.c #define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */ x 87 arch/mips/vr41xx/common/icu.c #define INT_TO_IRQ(x) ((x) + 2) /* Int0-4 -> IRQ2-6 */ x 117 arch/nds32/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_NDS32) x 32 arch/nds32/include/asm/memory.h #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) x 33 arch/nds32/include/asm/memory.h #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) x 62 arch/nds32/include/asm/memory.h #define __pa(x) __virt_to_phys((unsigned long)(x)) x 63 arch/nds32/include/asm/memory.h #define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) x 74 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn(x) x x 77 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn_OPCODE(x) (NDS32Insn(x) >> I_OPCODE_off) x 81 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn_OPCODE_Rt(x) \ x 82 arch/nds32/include/asm/nds32_fpu_inst.h ((NDS32Insn(x) & I_OPCODE_mskRt) >> I_OPCODE_offRt) x 86 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn_OPCODE_Ra(x) \ x 87 arch/nds32/include/asm/nds32_fpu_inst.h ((NDS32Insn(x) & I_OPCODE_mskRa) >> I_OPCODE_offRa) x 91 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn_OPCODE_Rb(x) \ x 92 arch/nds32/include/asm/nds32_fpu_inst.h ((NDS32Insn(x) & I_OPCODE_mskRb) >> I_OPCODE_offRb) x 96 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn_OPCODE_BIT1014(x) \ x 97 arch/nds32/include/asm/nds32_fpu_inst.h ((NDS32Insn(x) & I_OPCODE_mskbit1014) >> I_OPCODE_offbit1014) x 101 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn_OPCODE_BIT69(x) \ x 102 arch/nds32/include/asm/nds32_fpu_inst.h ((NDS32Insn(x) & I_OPCODE_mskbit69) >> I_OPCODE_offbit69) x 106 arch/nds32/include/asm/nds32_fpu_inst.h #define NDS32Insn_OPCODE_COP0(x) \ x 107 arch/nds32/include/asm/nds32_fpu_inst.h ((NDS32Insn(x) & I_OPCODE_mskCOP0) >> I_OPCODE_offCOP0) x 48 arch/nds32/include/asm/page.h #define pte_val(x) (x) x 49 arch/nds32/include/asm/page.h #define pmd_val(x) (x) x 50 arch/nds32/include/asm/page.h #define pgd_val(x) (x) x 51 arch/nds32/include/asm/page.h #define pgprot_val(x) (x) x 53 arch/nds32/include/asm/page.h #define __pte(x) (x) x 54 arch/nds32/include/asm/page.h #define __pmd(x) (x) x 55 arch/nds32/include/asm/page.h #define __pgd(x) (x) x 56 arch/nds32/include/asm/page.h #define __pgprot(x) (x) x 64 arch/nds32/include/asm/pgtable.h #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) x 75 arch/nds32/include/asm/pgtable.h #define VMALLOC_VMADDR(x) ((unsigned long)(x)) x 266 arch/nds32/include/asm/pgtable.h #define pte_to_pgoff(x) (pte_val(x) >> 2) x 267 arch/nds32/include/asm/pgtable.h #define pgoff_to_pte(x) __pte(((x) << 2) | _PAGE_FILE) x 336 arch/nds32/include/asm/pgtable.h #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) x 385 arch/nds32/include/asm/pgtable.h #define __swp_type(x) (((x).val >> 2) & 0x7f) x 386 arch/nds32/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> 9) x 10 arch/nds32/include/asm/swab.h static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) x 14 arch/nds32/include/asm/swab.h :"=r"(x) x 15 arch/nds32/include/asm/swab.h :"0"(x)); x 16 arch/nds32/include/asm/swab.h return x; x 19 arch/nds32/include/asm/swab.h static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) x 22 arch/nds32/include/asm/swab.h :"=r"(x) x 23 arch/nds32/include/asm/swab.h :"0"(x)); x 24 arch/nds32/include/asm/swab.h return x; x 27 arch/nds32/include/asm/swab.h #define __arch_swab32(x) ___arch__swab32(x) x 28 arch/nds32/include/asm/swab.h #define __arch_swab16(x) ___arch__swab16(x) x 16 arch/nds32/include/asm/uaccess.h #define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" x 76 arch/nds32/include/asm/uaccess.h #define __get_user(x, ptr) \ x 79 arch/nds32/include/asm/uaccess.h __get_user_check((x), (ptr), __gu_err); \ x 83 arch/nds32/include/asm/uaccess.h #define __get_user_error(x, ptr, err) \ x 85 arch/nds32/include/asm/uaccess.h __get_user_check((x), (ptr), (err)); \ x 89 arch/nds32/include/asm/uaccess.h #define __get_user_check(x, ptr, err) \ x 94 arch/nds32/include/asm/uaccess.h __get_user_err((x), __p, (err)); \ x 96 arch/nds32/include/asm/uaccess.h (x) = 0; (err) = -EFAULT; \ x 100 arch/nds32/include/asm/uaccess.h #define __get_user_err(x, ptr, err) \ x 121 arch/nds32/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 124 arch/nds32/include/asm/uaccess.h #define __get_user_asm(inst, x, addr, err) \ x 138 arch/nds32/include/asm/uaccess.h : "+r" (err), "=&r" (x) \ x 150 arch/nds32/include/asm/uaccess.h #define __get_user_asm_dword(x, addr, err) \ x 165 arch/nds32/include/asm/uaccess.h : "+r"(err), "=&r"(x) \ x 171 arch/nds32/include/asm/uaccess.h #define __put_user(x, ptr) \ x 174 arch/nds32/include/asm/uaccess.h __put_user_err((x), (ptr), __pu_err); \ x 178 arch/nds32/include/asm/uaccess.h #define __put_user_error(x, ptr, err) \ x 180 arch/nds32/include/asm/uaccess.h __put_user_err((x), (ptr), (err)); \ x 184 arch/nds32/include/asm/uaccess.h #define __put_user_check(x, ptr, err) \ x 189 arch/nds32/include/asm/uaccess.h __put_user_err((x), __p, (err)); \ x 195 arch/nds32/include/asm/uaccess.h #define __put_user_err(x, ptr, err) \ x 197 arch/nds32/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = (x); \ x 218 arch/nds32/include/asm/uaccess.h #define __put_user_asm(inst, x, addr, err) \ x 232 arch/nds32/include/asm/uaccess.h : "r" (x), "r" (addr), "i" (-EFAULT) \ x 243 arch/nds32/include/asm/uaccess.h #define __put_user_asm_dword(x, addr, err) \ x 259 arch/nds32/include/asm/uaccess.h : "r"(addr), "r"(x), "i"(-EFAULT) \ x 16 arch/nds32/kernel/vdso/gettimeofday.c #define X(x) #x x 17 arch/nds32/kernel/vdso/gettimeofday.c #define Y(x) X(x) x 10 arch/nds32/math-emu/fpuemu.c #define DPFROMREG(dp, x) (dp = (void *)((unsigned long *)fpu_reg + 2*x)) x 12 arch/nds32/math-emu/fpuemu.c #define SPFROMREG(sp, x)\ x 13 arch/nds32/math-emu/fpuemu.c ((sp) = (void *)((unsigned long *)fpu_reg + (x^1))) x 15 arch/nds32/math-emu/fpuemu.c #define SPFROMREG(sp, x) ((sp) = (void *)((unsigned long *)fpu_reg + x)) x 56 arch/nios2/boot/compressed/misc.c # define Trace(x) fprintf x x 57 arch/nios2/boot/compressed/misc.c # define Tracev(x) {if (verbose) fprintf x ; } x 58 arch/nios2/boot/compressed/misc.c # define Tracevv(x) {if (verbose > 1) fprintf x ; } x 59 arch/nios2/boot/compressed/misc.c # define Tracec(c, x) {if (verbose && (c)) fprintf x ; } x 60 arch/nios2/boot/compressed/misc.c # define Tracecv(c, x) {if (verbose > 1 && (c)) fprintf x ; } x 63 arch/nios2/boot/compressed/misc.c # define Trace(x) x 64 arch/nios2/boot/compressed/misc.c # define Tracev(x) x 65 arch/nios2/boot/compressed/misc.c # define Tracevv(x) x 66 arch/nios2/boot/compressed/misc.c # define Tracec(c, x) x 67 arch/nios2/boot/compressed/misc.c # define Tracecv(c, x) x 151 arch/nios2/boot/compressed/misc.c static void error(char *x) x 154 arch/nios2/boot/compressed/misc.c puts(x); x 14 arch/nios2/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_ALTERA_NIOS2) x 24 arch/nios2/include/asm/io.h #define writeb_relaxed(x, addr) writeb(x, addr) x 25 arch/nios2/include/asm/io.h #define writew_relaxed(x, addr) writew(x, addr) x 26 arch/nios2/include/asm/io.h #define writel_relaxed(x, addr) writel(x, addr) x 65 arch/nios2/include/asm/page.h #define pte_val(x) ((x).pte) x 66 arch/nios2/include/asm/page.h #define pgd_val(x) ((x).pgd) x 67 arch/nios2/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 69 arch/nios2/include/asm/page.h #define __pte(x) ((pte_t) { (x) }) x 70 arch/nios2/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) }) x 71 arch/nios2/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) }) x 79 arch/nios2/include/asm/page.h # define __pa(x) \ x 80 arch/nios2/include/asm/page.h ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) x 81 arch/nios2/include/asm/page.h # define __va(x) \ x 82 arch/nios2/include/asm/page.h ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) x 36 arch/nios2/include/asm/pgtable.h #define MKP(x, w, r) __pgprot(_PAGE_PRESENT | _PAGE_CACHED | \ x 37 arch/nios2/include/asm/pgtable.h ((x) ? _PAGE_EXEC : 0) | \ x 129 arch/nios2/include/asm/uaccess.h #define __get_user(x, ptr) \ x 135 arch/nios2/include/asm/uaccess.h (x) = (__force __typeof__(x))__gu_val; \ x 139 arch/nios2/include/asm/uaccess.h #define get_user(x, ptr) \ x 147 arch/nios2/include/asm/uaccess.h (x) = (__force __typeof__(x))__gu_val; \ x 165 arch/nios2/include/asm/uaccess.h #define put_user(x, ptr) \ x 169 arch/nios2/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = (__typeof(*ptr))(x); \ x 193 arch/nios2/include/asm/uaccess.h #define __put_user(x, ptr) put_user(x, ptr) x 20 arch/nios2/include/uapi/asm/swab.h #define __nios2_swab(x) \ x 21 arch/nios2/include/uapi/asm/swab.h __builtin_custom_ini(CONFIG_NIOS2_CI_SWAB_NO, (x)) x 23 arch/nios2/include/uapi/asm/swab.h static inline __attribute__((const)) __u16 __arch_swab16(__u16 x) x 25 arch/nios2/include/uapi/asm/swab.h return (__u16) __nios2_swab(((__u32) x) << 16); x 29 arch/nios2/include/uapi/asm/swab.h static inline __attribute__((const)) __u32 __arch_swab32(__u32 x) x 31 arch/nios2/include/uapi/asm/swab.h return (__u32) __nios2_swab(x); x 19 arch/nios2/kernel/cpuinfo.c #define err_cpu(x) \ x 20 arch/nios2/kernel/cpuinfo.c pr_err("ERROR: Nios II " x " different for kernel and DTS\n") x 14 arch/openrisc/include/asm/bitops/__ffs.h static inline unsigned long __ffs(unsigned long x) x 20 arch/openrisc/include/asm/bitops/__ffs.h : "r" (x)); x 14 arch/openrisc/include/asm/bitops/__fls.h static inline unsigned long __fls(unsigned long x) x 20 arch/openrisc/include/asm/bitops/__fls.h : "r" (x)); x 13 arch/openrisc/include/asm/bitops/ffs.h static inline int ffs(int x) x 19 arch/openrisc/include/asm/bitops/ffs.h : "r" (x)); x 14 arch/openrisc/include/asm/bitops/fls.h static inline int fls(unsigned int x) x 20 arch/openrisc/include/asm/bitops/fls.h : "r" (x)); x 92 arch/openrisc/include/asm/cmpxchg.h static inline u32 xchg_small(volatile void *ptr, u32 x, int size) x 108 arch/openrisc/include/asm/cmpxchg.h newv = (oldv & ~bitmask) | (x << bitoff); x 25 arch/openrisc/include/asm/elf.h #define elf_check_arch(x) \ x 26 arch/openrisc/include/asm/elf.h (((x)->e_machine == EM_OR32) || ((x)->e_machine == EM_OPENRISC)) x 53 arch/openrisc/include/asm/fixmap.h #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) x 54 arch/openrisc/include/asm/fixmap.h #define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) x 59 arch/openrisc/include/asm/page.h #define pte_val(x) ((x).pte) x 60 arch/openrisc/include/asm/page.h #define pgd_val(x) ((x).pgd) x 61 arch/openrisc/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 63 arch/openrisc/include/asm/page.h #define __pte(x) ((pte_t) { (x) }) x 64 arch/openrisc/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) }) x 65 arch/openrisc/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) }) x 72 arch/openrisc/include/asm/page.h #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) x 73 arch/openrisc/include/asm/page.h #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) x 95 arch/openrisc/include/asm/pgtable.h #define VMALLOC_VMADDR(x) ((unsigned long)(x)) x 220 arch/openrisc/include/asm/pgtable.h #define pte_none(x) (!pte_val(x)) x 221 arch/openrisc/include/asm/pgtable.h #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) x 224 arch/openrisc/include/asm/pgtable.h #define pmd_none(x) (!pmd_val(x)) x 225 arch/openrisc/include/asm/pgtable.h #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK)) != _KERNPG_TABLE) x 226 arch/openrisc/include/asm/pgtable.h #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) x 401 arch/openrisc/include/asm/pgtable.h #define pte_pfn(x) ((unsigned long)(((x).pte)) >> PAGE_SHIFT) x 435 arch/openrisc/include/asm/pgtable.h #define __swp_type(x) (((x).val >> 5) & 0x7f) x 436 arch/openrisc/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> 12) x 440 arch/openrisc/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 44 arch/openrisc/include/asm/uaccess.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 81 arch/openrisc/include/asm/uaccess.h #define get_user(x, ptr) \ x 82 arch/openrisc/include/asm/uaccess.h __get_user_check((x), (ptr), sizeof(*(ptr))) x 83 arch/openrisc/include/asm/uaccess.h #define put_user(x, ptr) \ x 84 arch/openrisc/include/asm/uaccess.h __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 86 arch/openrisc/include/asm/uaccess.h #define __get_user(x, ptr) \ x 87 arch/openrisc/include/asm/uaccess.h __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 88 arch/openrisc/include/asm/uaccess.h #define __put_user(x, ptr) \ x 89 arch/openrisc/include/asm/uaccess.h __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 93 arch/openrisc/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) \ x 96 arch/openrisc/include/asm/uaccess.h __put_user_size((x), (ptr), (size), __pu_err); \ x 100 arch/openrisc/include/asm/uaccess.h #define __put_user_check(x, ptr, size) \ x 105 arch/openrisc/include/asm/uaccess.h __put_user_size((x), __pu_addr, (size), __pu_err); \ x 109 arch/openrisc/include/asm/uaccess.h #define __put_user_size(x, ptr, size, retval) \ x 113 arch/openrisc/include/asm/uaccess.h case 1: __put_user_asm(x, ptr, retval, "l.sb"); break; \ x 114 arch/openrisc/include/asm/uaccess.h case 2: __put_user_asm(x, ptr, retval, "l.sh"); break; \ x 115 arch/openrisc/include/asm/uaccess.h case 4: __put_user_asm(x, ptr, retval, "l.sw"); break; \ x 116 arch/openrisc/include/asm/uaccess.h case 8: __put_user_asm2(x, ptr, retval); break; \ x 124 arch/openrisc/include/asm/uaccess.h #define __m(x) (*(struct __large_struct *)(x)) x 131 arch/openrisc/include/asm/uaccess.h #define __put_user_asm(x, addr, err, op) \ x 145 arch/openrisc/include/asm/uaccess.h : "r"(x), "r"(addr), "i"(-EFAULT), "0"(err)) x 147 arch/openrisc/include/asm/uaccess.h #define __put_user_asm2(x, addr, err) \ x 163 arch/openrisc/include/asm/uaccess.h : "r"(x), "r"(addr), "i"(-EFAULT), "0"(err)) x 165 arch/openrisc/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) \ x 169 arch/openrisc/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 173 arch/openrisc/include/asm/uaccess.h #define __get_user_check(x, ptr, size) \ x 179 arch/openrisc/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 185 arch/openrisc/include/asm/uaccess.h #define __get_user_size(x, ptr, size, retval) \ x 189 arch/openrisc/include/asm/uaccess.h case 1: __get_user_asm(x, ptr, retval, "l.lbz"); break; \ x 190 arch/openrisc/include/asm/uaccess.h case 2: __get_user_asm(x, ptr, retval, "l.lhz"); break; \ x 191 arch/openrisc/include/asm/uaccess.h case 4: __get_user_asm(x, ptr, retval, "l.lwz"); break; \ x 192 arch/openrisc/include/asm/uaccess.h case 8: __get_user_asm2(x, ptr, retval); break; \ x 193 arch/openrisc/include/asm/uaccess.h default: (x) = __get_user_bad(); \ x 197 arch/openrisc/include/asm/uaccess.h #define __get_user_asm(x, addr, err, op) \ x 211 arch/openrisc/include/asm/uaccess.h : "=r"(err), "=r"(x) \ x 214 arch/openrisc/include/asm/uaccess.h #define __get_user_asm2(x, addr, err) \ x 231 arch/openrisc/include/asm/uaccess.h : "=r"(err), "=&r"(x) \ x 146 arch/parisc/boot/compressed/misc.c void __noreturn error(char *x) x 148 arch/parisc/boot/compressed/misc.c if (x) puts(x); x 22 arch/parisc/include/asm/assembly.h #define COND(x) * ## x x 37 arch/parisc/include/asm/assembly.h #define COND(x) x x 27 arch/parisc/include/asm/bitops.h #define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1)) x 143 arch/parisc/include/asm/bitops.h static __inline__ unsigned long __ffs(unsigned long x) x 170 arch/parisc/include/asm/bitops.h : "+r" (x), "=r" (ret) ); x 181 arch/parisc/include/asm/bitops.h static __inline__ int ffs(int x) x 183 arch/parisc/include/asm/bitops.h return x ? (__ffs((unsigned long)x) + 1) : 0; x 191 arch/parisc/include/asm/bitops.h static __inline__ int fls(unsigned int x) x 194 arch/parisc/include/asm/bitops.h if (!x) x 213 arch/parisc/include/asm/bitops.h : "+r" (x), "=r" (ret) ); x 79 arch/parisc/include/asm/bug.h #define WARN_ON(x) ({ \ x 80 arch/parisc/include/asm/bug.h int __ret_warn_on = !!(x); \ x 25 arch/parisc/include/asm/cmpxchg.h __xchg(unsigned long x, __volatile__ void *ptr, int size) x 29 arch/parisc/include/asm/cmpxchg.h case 8: return __xchg64(x, (unsigned long *) ptr); x 31 arch/parisc/include/asm/cmpxchg.h case 4: return __xchg32((int) x, (int *) ptr); x 32 arch/parisc/include/asm/cmpxchg.h case 1: return __xchg8((char) x, (char *) ptr); x 35 arch/parisc/include/asm/cmpxchg.h return x; x 47 arch/parisc/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 50 arch/parisc/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 314 arch/parisc/include/asm/elf.h #define elf_check_arch(x) \ x 315 arch/parisc/include/asm/elf.h ((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELF_CLASS) x 316 arch/parisc/include/asm/elf.h #define compat_elf_check_arch(x) \ x 317 arch/parisc/include/asm/elf.h ((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELFCLASS32) x 31 arch/parisc/include/asm/hash.h static inline u32 __attribute_const__ __hash_32(u32 x) x 39 arch/parisc/include/asm/hash.h a = x << 19; /* Two shifts can't be paired */ x 40 arch/parisc/include/asm/hash.h b = x << 9; a += x; x 41 arch/parisc/include/asm/hash.h c = x << 23; b += a; x 286 arch/parisc/include/asm/io.h #define outb(x, y) BUG() x 287 arch/parisc/include/asm/io.h #define outw(x, y) BUG() x 288 arch/parisc/include/asm/io.h #define outl(x, y) BUG() x 310 arch/parisc/include/asm/io.h #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL))) x 49 arch/parisc/include/asm/page.h #define pte_val(x) ((x).pte) x 51 arch/parisc/include/asm/page.h #define pmd_val(x) ((x).pmd + 0) x 52 arch/parisc/include/asm/page.h #define pgd_val(x) ((x).pgd + 0) x 53 arch/parisc/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 55 arch/parisc/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 56 arch/parisc/include/asm/page.h #define __pmd(x) ((pmd_t) { (x) } ) x 57 arch/parisc/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 58 arch/parisc/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 60 arch/parisc/include/asm/page.h #define __pmd_val_set(x,n) (x).pmd = (n) x 61 arch/parisc/include/asm/page.h #define __pgd_val_set(x,n) (x).pgd = (n) x 72 arch/parisc/include/asm/page.h #define pte_val(x) (x) x 73 arch/parisc/include/asm/page.h #define pmd_val(x) (x) x 74 arch/parisc/include/asm/page.h #define pgd_val(x) (x) x 75 arch/parisc/include/asm/page.h #define pgprot_val(x) (x) x 77 arch/parisc/include/asm/page.h #define __pte(x) (x) x 78 arch/parisc/include/asm/page.h #define __pmd(x) (x) x 79 arch/parisc/include/asm/page.h #define __pgd(x) (x) x 80 arch/parisc/include/asm/page.h #define __pgprot(x) (x) x 82 arch/parisc/include/asm/page.h #define __pmd_val_set(x,n) (x) = (n) x 83 arch/parisc/include/asm/page.h #define __pgd_val_set(x,n) (x) = (n) x 144 arch/parisc/include/asm/page.h # define PA(x) ((x)-__PAGE_OFFSET) x 145 arch/parisc/include/asm/page.h # define VA(x) ((x)+__PAGE_OFFSET) x 147 arch/parisc/include/asm/page.h #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) x 148 arch/parisc/include/asm/page.h #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) x 134 arch/parisc/include/asm/pci.h static inline void pcibios_register_hba(struct pci_hba_data *x) x 101 arch/parisc/include/asm/pgalloc.h #define pmd_free(mm, x) do { } while (0) x 202 arch/parisc/include/asm/pgtable.h #define xlate_pabit(x) (31 - x) x 314 arch/parisc/include/asm/pgtable.h #define pte_none(x) (pte_val(x) == 0) x 315 arch/parisc/include/asm/pgtable.h #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) x 318 arch/parisc/include/asm/pgtable.h #define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK) x 319 arch/parisc/include/asm/pgtable.h #define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT) x 320 arch/parisc/include/asm/pgtable.h #define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK) x 321 arch/parisc/include/asm/pgtable.h #define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT) x 326 arch/parisc/include/asm/pgtable.h #define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED) x 328 arch/parisc/include/asm/pgtable.h #define pmd_none(x) (!pmd_val(x)) x 330 arch/parisc/include/asm/pgtable.h #define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID)) x 331 arch/parisc/include/asm/pgtable.h #define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT) x 351 arch/parisc/include/asm/pgtable.h #define pgd_none(x) (!pgd_val(x)) x 352 arch/parisc/include/asm/pgtable.h #define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID)) x 353 arch/parisc/include/asm/pgtable.h #define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT) x 432 arch/parisc/include/asm/pgtable.h #define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT) x 480 arch/parisc/include/asm/pgtable.h #define __swp_type(x) ((x).val & 0x1f) x 481 arch/parisc/include/asm/pgtable.h #define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \ x 482 arch/parisc/include/asm/pgtable.h (((x).val >> 8) & ~0x7) ) x 487 arch/parisc/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 78 arch/parisc/include/asm/psw.h unsigned int x:1; x 10 arch/parisc/include/asm/spinlock.h static inline int arch_spin_is_locked(arch_spinlock_t *x) x 12 arch/parisc/include/asm/spinlock.h volatile unsigned int *a = __ldcw_align(x); x 18 arch/parisc/include/asm/spinlock.h static inline void arch_spin_lock_flags(arch_spinlock_t *x, x 23 arch/parisc/include/asm/spinlock.h a = __ldcw_align(x); x 35 arch/parisc/include/asm/spinlock.h static inline void arch_spin_unlock(arch_spinlock_t *x) x 39 arch/parisc/include/asm/spinlock.h a = __ldcw_align(x); x 48 arch/parisc/include/asm/spinlock.h static inline int arch_spin_trylock(arch_spinlock_t *x) x 53 arch/parisc/include/asm/spinlock.h a = __ldcw_align(x); x 78 arch/parisc/include/asm/superio.h #define is_superio_device(x) \ x 79 arch/parisc/include/asm/superio.h (((x)->vendor == PCI_VENDOR_ID_NS) && \ x 80 arch/parisc/include/asm/superio.h ( ((x)->device == PCI_DEVICE_ID_NS_87415) \ x 81 arch/parisc/include/asm/superio.h || ((x)->device == PCI_DEVICE_ID_NS_87560_LIO) \ x 82 arch/parisc/include/asm/superio.h || ((x)->device == PCI_DEVICE_ID_NS_87560_USB) ) ) x 19 arch/parisc/include/asm/termios.h #define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ x 21 arch/parisc/include/asm/termios.h get_user(__tmp,&(termio)->x); \ x 22 arch/parisc/include/asm/termios.h *(unsigned short *) &(termios)->x = __tmp; \ x 20 arch/parisc/include/asm/uaccess.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 37 arch/parisc/include/asm/uaccess.h #define STD_USER(x, ptr) __put_user_asm64(x, ptr) x 40 arch/parisc/include/asm/uaccess.h #define STD_USER(x, ptr) __put_user_asm("std", x, ptr) x 141 arch/parisc/include/asm/uaccess.h #define __put_user_internal(x, ptr) \ x 144 arch/parisc/include/asm/uaccess.h __typeof__(*(ptr)) __x = (__typeof__(*(ptr)))(x); \ x 157 arch/parisc/include/asm/uaccess.h #define __put_user(x, ptr) \ x 160 arch/parisc/include/asm/uaccess.h __put_user_internal(x, ptr); \ x 173 arch/parisc/include/asm/uaccess.h #define __put_user_asm(stx, x, ptr) \ x 179 arch/parisc/include/asm/uaccess.h : "r"(ptr), "r"(x), "0"(__pu_err)) x 11 arch/parisc/include/uapi/asm/swab.h static inline __attribute_const__ __u16 __arch_swab16(__u16 x) x 15 arch/parisc/include/uapi/asm/swab.h : "=r" (x) x 16 arch/parisc/include/uapi/asm/swab.h : "0" (x)); x 17 arch/parisc/include/uapi/asm/swab.h return x; x 21 arch/parisc/include/uapi/asm/swab.h static inline __attribute_const__ __u32 __arch_swab24(__u32 x) x 26 arch/parisc/include/uapi/asm/swab.h : "=r" (x) x 27 arch/parisc/include/uapi/asm/swab.h : "0" (x)); x 28 arch/parisc/include/uapi/asm/swab.h return x; x 31 arch/parisc/include/uapi/asm/swab.h static inline __attribute_const__ __u32 __arch_swab32(__u32 x) x 37 arch/parisc/include/uapi/asm/swab.h : "=r" (x), "=&r" (temp) x 38 arch/parisc/include/uapi/asm/swab.h : "0" (x)); x 39 arch/parisc/include/uapi/asm/swab.h return x; x 54 arch/parisc/include/uapi/asm/swab.h static inline __attribute_const__ __u64 __arch_swab64(__u64 x) x 61 arch/parisc/include/uapi/asm/swab.h : "=r" (x), "=&r" (temp) x 62 arch/parisc/include/uapi/asm/swab.h : "0" (x)); x 63 arch/parisc/include/uapi/asm/swab.h return x; x 40 arch/parisc/kernel/asm-offsets.c #define align_frame(x,y) (((x)+FRAME_SIZE+(y)-1) - (((x)+(y)-1)%(y))) x 146 arch/parisc/kernel/irq.c #define irq_stats(x) (&per_cpu(irq_stat, x)) x 117 arch/parisc/kernel/module.c #define rnd(x) (((x)+0x1000)&~0x1fff) x 129 arch/parisc/kernel/module.c #define mask(x,sz) ((x) & ~((1<<(sz))-1)) x 135 arch/parisc/kernel/module.c static inline int sign_unext(int x, int len) x 140 arch/parisc/kernel/module.c return x & len_ones; x 143 arch/parisc/kernel/module.c static inline int low_sign_unext(int x, int len) x 147 arch/parisc/kernel/module.c sign = (x >> (len-1)) & 1; x 148 arch/parisc/kernel/module.c temp = sign_unext(x, len-1); x 50 arch/parisc/kernel/pci-dma.c #define DBG_RES(x...) printk(x) x 52 arch/parisc/kernel/pci-dma.c #define DBG_RES(x...) x 25 arch/parisc/kernel/pci.c # define DBGC(x...) printk(KERN_DEBUG x) x 27 arch/parisc/kernel/pci.c # define DBGC(x...) x 32 arch/parisc/kernel/pci.c #define DBG_RES(x...) printk(KERN_DEBUG x) x 34 arch/parisc/kernel/pci.c #define DBG_RES(x...) x 84 arch/parisc/kernel/ptrace.c pa_psw(task)->x = 0; x 54 arch/parisc/kernel/traps.c static int printbinary(char *buf, unsigned long x, int nbits) x 58 arch/parisc/kernel/traps.c *buf++ = (mask & x ? '1' : '0'); x 73 arch/parisc/kernel/traps.c #define PRINTREGS(lvl,r,f,fmt,x) \ x 75 arch/parisc/kernel/traps.c lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \ x 76 arch/parisc/kernel/traps.c (r)[(x)+2], (r)[(x)+3]) x 27 arch/parisc/kernel/unwind.c #define dbg(x...) pr_debug(x) x 29 arch/parisc/kernel/unwind.c #define dbg(x...) x 21 arch/parisc/lib/bitops.c unsigned long __xchg64(unsigned long x, unsigned long *ptr) x 27 arch/parisc/lib/bitops.c *ptr = x; x 33 arch/parisc/lib/bitops.c unsigned long __xchg32(int x, int *ptr) x 40 arch/parisc/lib/bitops.c *ptr = x; x 46 arch/parisc/lib/bitops.c unsigned long __xchg8(char x, char *ptr) x 53 arch/parisc/lib/bitops.c *ptr = x; x 28 arch/parisc/lib/checksum.c static inline unsigned short from32to16(unsigned int x) x 31 arch/parisc/lib/checksum.c x = (x & 0xffff) + (x >> 16); x 33 arch/parisc/lib/checksum.c x = (x & 0xffff) + (x >> 16); x 34 arch/parisc/lib/checksum.c return (unsigned short)x; x 70 arch/parisc/math-emu/driver.c extern void printbinary(unsigned long x, int nbits); x 156 arch/parisc/math-emu/fpudispatch.c #define VASSERT(x) x 25 arch/parisc/mm/fault.c #define bit22set(x) (x & 0x00000200) x 26 arch/parisc/mm/fault.c #define bits23_25set(x) (x & 0x000001c0) x 27 arch/parisc/mm/fault.c #define isGraphicsFlushRead(x) ((x & 0xfc003fdf) == 0x04001a80) x 557 arch/parisc/mm/init.c #define SET_MAP_OFFSET(x) ((void *)(((unsigned long)(x) + VM_MAP_OFFSET) \ x 56 arch/powerpc/boot/devtree.c #define MHZ(x) ((x + 500000) / 1000000) x 18 arch/powerpc/boot/hack-coff.c #define get_16be(x) ((((unsigned char *)(x))[0] << 8) \ x 19 arch/powerpc/boot/hack-coff.c + ((unsigned char *)(x))[1]) x 20 arch/powerpc/boot/hack-coff.c #define put_16be(x, v) (((unsigned char *)(x))[0] = (v) >> 8, \ x 21 arch/powerpc/boot/hack-coff.c ((unsigned char *)(x))[1] = (v) & 0xff) x 22 arch/powerpc/boot/hack-coff.c #define get_32be(x) ((((unsigned char *)(x))[0] << 24) \ x 23 arch/powerpc/boot/hack-coff.c + (((unsigned char *)(x))[1] << 16) \ x 24 arch/powerpc/boot/hack-coff.c + (((unsigned char *)(x))[2] << 8) \ x 25 arch/powerpc/boot/hack-coff.c + ((unsigned char *)(x))[3]) x 20 arch/powerpc/boot/libfdt_env.h #define fdt16_to_cpu(x) be16_to_cpu(x) x 21 arch/powerpc/boot/libfdt_env.h #define cpu_to_fdt16(x) cpu_to_be16(x) x 22 arch/powerpc/boot/libfdt_env.h #define fdt32_to_cpu(x) be32_to_cpu(x) x 23 arch/powerpc/boot/libfdt_env.h #define cpu_to_fdt32(x) cpu_to_be32(x) x 24 arch/powerpc/boot/libfdt_env.h #define fdt64_to_cpu(x) be64_to_cpu(x) x 25 arch/powerpc/boot/libfdt_env.h #define cpu_to_fdt64(x) cpu_to_be64(x) x 30 arch/powerpc/boot/of.h #define cpu_to_be16(x) swab16(x) x 31 arch/powerpc/boot/of.h #define be16_to_cpu(x) swab16(x) x 32 arch/powerpc/boot/of.h #define cpu_to_be32(x) swab32(x) x 33 arch/powerpc/boot/of.h #define be32_to_cpu(x) swab32(x) x 34 arch/powerpc/boot/of.h #define cpu_to_be64(x) swab64(x) x 35 arch/powerpc/boot/of.h #define be64_to_cpu(x) swab64(x) x 37 arch/powerpc/boot/of.h #define cpu_to_be16(x) (x) x 38 arch/powerpc/boot/of.h #define be16_to_cpu(x) (x) x 39 arch/powerpc/boot/of.h #define cpu_to_be32(x) (x) x 40 arch/powerpc/boot/of.h #define be32_to_cpu(x) (x) x 41 arch/powerpc/boot/of.h #define cpu_to_be64(x) (x) x 42 arch/powerpc/boot/of.h #define be64_to_cpu(x) (x) x 39 arch/powerpc/boot/oflib.c #define ADDR(x) (u32)(unsigned long)(x) x 119 arch/powerpc/boot/ops.h typeof(val) x = (val); \ x 120 arch/powerpc/boot/ops.h setprop((devp), (name), &x, sizeof(x)); \ x 9 arch/powerpc/boot/page.h #define ASM_CONST(x) x x 11 arch/powerpc/boot/page.h #define __ASM_CONST(x) x##UL x 12 arch/powerpc/boot/page.h #define ASM_CONST(x) __ASM_CONST(x) x 20 arch/powerpc/boot/redboot-83xx.c #define MHZ(x) ((x + 500000) / 1000000) x 19 arch/powerpc/boot/redboot-8xx.c #define MHZ(x) ((x + 500000) / 1000000) x 15 arch/powerpc/boot/reg.h #define __stringify_1(x) #x x 16 arch/powerpc/boot/reg.h #define __stringify(x) __stringify_1(x) x 28 arch/powerpc/boot/rs6000.h #define BADMAG(x) \ x 29 arch/powerpc/boot/rs6000.h ((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \ x 30 arch/powerpc/boot/rs6000.h (x).f_magic != U802TOCMAGIC) x 5 arch/powerpc/boot/swab.h static inline u16 swab16(u16 x) x 7 arch/powerpc/boot/swab.h return ((x & (u16)0x00ffU) << 8) | x 8 arch/powerpc/boot/swab.h ((x & (u16)0xff00U) >> 8); x 11 arch/powerpc/boot/swab.h static inline u32 swab32(u32 x) x 13 arch/powerpc/boot/swab.h return ((x & (u32)0x000000ffUL) << 24) | x 14 arch/powerpc/boot/swab.h ((x & (u32)0x0000ff00UL) << 8) | x 15 arch/powerpc/boot/swab.h ((x & (u32)0x00ff0000UL) >> 8) | x 16 arch/powerpc/boot/swab.h ((x & (u32)0xff000000UL) >> 24); x 19 arch/powerpc/boot/swab.h static inline u64 swab64(u64 x) x 21 arch/powerpc/boot/swab.h return (u64)((x & (u64)0x00000000000000ffULL) << 56) | x 22 arch/powerpc/boot/swab.h (u64)((x & (u64)0x000000000000ff00ULL) << 40) | x 23 arch/powerpc/boot/swab.h (u64)((x & (u64)0x0000000000ff0000ULL) << 24) | x 24 arch/powerpc/boot/swab.h (u64)((x & (u64)0x00000000ff000000ULL) << 8) | x 25 arch/powerpc/boot/swab.h (u64)((x & (u64)0x000000ff00000000ULL) >> 8) | x 26 arch/powerpc/boot/swab.h (u64)((x & (u64)0x0000ff0000000000ULL) >> 24) | x 27 arch/powerpc/boot/swab.h (u64)((x & (u64)0x00ff000000000000ULL) >> 40) | x 28 arch/powerpc/boot/swab.h (u64)((x & (u64)0xff00000000000000ULL) >> 56); x 7 arch/powerpc/boot/types.h #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 28 arch/powerpc/boot/types.h #define min(x,y) ({ \ x 29 arch/powerpc/boot/types.h typeof(x) _x = (x); \ x 34 arch/powerpc/boot/types.h #define max(x,y) ({ \ x 35 arch/powerpc/boot/types.h typeof(x) _x = (x); \ x 20 arch/powerpc/boot/wii.c #define HW_REG(x) ((void *)(x)) x 23 arch/powerpc/boot/xz_config.h #define cpu_to_be32(x) swab32(x) x 30 arch/powerpc/boot/xz_config.h #define cpu_to_be32(x) (x) x 6 arch/powerpc/include/asm/asm-const.h # define ASM_CONST(x) x x 11 arch/powerpc/include/asm/asm-const.h # define __ASM_CONST(x) x##UL x 12 arch/powerpc/include/asm/asm-const.h # define ASM_CONST(x) __ASM_CONST(x) x 63 arch/powerpc/include/asm/barrier.h #define data_barrier(x) \ x 64 arch/powerpc/include/asm/barrier.h asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory"); x 206 arch/powerpc/include/asm/bitops.h #define __ilog2(x) ilog2(x) x 218 arch/powerpc/include/asm/bitops.h static __inline__ int fls(unsigned int x) x 220 arch/powerpc/include/asm/bitops.h return 32 - __builtin_clz(x); x 225 arch/powerpc/include/asm/bitops.h static __inline__ int fls64(__u64 x) x 227 arch/powerpc/include/asm/bitops.h return 64 - __builtin_clzll(x); x 35 arch/powerpc/include/asm/book3s/32/mmu-hash.h #define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \ x 36 arch/powerpc/include/asm/book3s/32/mmu-hash.h ((x & 0x0000000e00000000ULL) >> 24) | \ x 37 arch/powerpc/include/asm/book3s/32/mmu-hash.h ((x & 0x0000000100000000ULL) >> 30))) x 38 arch/powerpc/include/asm/book3s/32/mmu-hash.h #define PHYS_BAT_ADDR(x) (((u64)(x) & 0x00000000fffe0000ULL) | \ x 39 arch/powerpc/include/asm/book3s/32/mmu-hash.h (((u64)(x) << 24) & 0x0000000e00000000ULL) | \ x 40 arch/powerpc/include/asm/book3s/32/mmu-hash.h (((u64)(x) << 30) & 0x0000000100000000ULL)) x 42 arch/powerpc/include/asm/book3s/32/mmu-hash.h #define BAT_PHYS_ADDR(x) (x) x 43 arch/powerpc/include/asm/book3s/32/mmu-hash.h #define PHYS_BAT_ADDR(x) ((x) & 0xfffe0000) x 87 arch/powerpc/include/asm/book3s/32/mmu-hash.h unsigned long x:1; /* Real page number bit 3, optional */ x 24 arch/powerpc/include/asm/book3s/32/pgalloc.h #define pmd_free(mm, x) do { } while (0) x 25 arch/powerpc/include/asm/book3s/32/pgalloc.h #define __pmd_free_tlb(tlb,x,a) do { } while (0) x 50 arch/powerpc/include/asm/book3s/32/pgalloc.h #define get_hugepd_cache_index(x) (x) x 379 arch/powerpc/include/asm/book3s/32/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 }) x 104 arch/powerpc/include/asm/book3s/64/hash-64k.h #define HIDX_UNSHIFT_BY_ONE(x) ((x + 0xfUL) & 0xfUL) /* shift backward by one */ x 105 arch/powerpc/include/asm/book3s/64/hash-64k.h #define HIDX_SHIFT_BY_ONE(x) ((x + 0x1UL) & 0xfUL) /* shift forward by one */ x 106 arch/powerpc/include/asm/book3s/64/hash-64k.h #define HIDX_BITS(x, index) (x << (index << 2)) x 107 arch/powerpc/include/asm/book3s/64/hash-64k.h #define BITS_TO_HIDX(x, index) ((x >> (index << 2)) & 0xfUL) x 73 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT) x 74 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & 0xffffffffffffff80UL)) x 658 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define TASK_SLICE_ARRAY_SZ(x) ((x)->hash_context->slb_addr_limit >> 41) x 735 arch/powerpc/include/asm/book3s/64/mmu-hash.h unsigned long x; \ x 736 arch/powerpc/include/asm/book3s/64/mmu-hash.h x = (protovsid) * VSID_MULTIPLIER_##size; \ x 737 arch/powerpc/include/asm/book3s/64/mmu-hash.h x = (x >> VSID_BITS_##size) + (x & VSID_MODULUS_##size); \ x 738 arch/powerpc/include/asm/book3s/64/mmu-hash.h (x + ((x+1) >> VSID_BITS_##size)) & VSID_MODULUS_##size; \ x 730 arch/powerpc/include/asm/book3s/64/pgtable.h #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \ x 732 arch/powerpc/include/asm/book3s/64/pgtable.h #define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT) x 743 arch/powerpc/include/asm/book3s/64/pgtable.h #define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE) x 745 arch/powerpc/include/asm/book3s/64/pgtable.h #define __swp_entry_to_pmd(x) (pte_pmd(__swp_entry_to_pte(x))) x 67 arch/powerpc/include/asm/bug.h #define BUG_ON(x) do { \ x 68 arch/powerpc/include/asm/bug.h if (__builtin_constant_p(x)) { \ x 69 arch/powerpc/include/asm/bug.h if (x) \ x 77 arch/powerpc/include/asm/bug.h "r" ((__force long)(x))); \ x 90 arch/powerpc/include/asm/bug.h #define WARN_ON(x) ({ \ x 91 arch/powerpc/include/asm/bug.h int __ret_warn_on = !!(x); \ x 45 arch/powerpc/include/asm/cell-pmu.h #define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) x 46 arch/powerpc/include/asm/cell-pmu.h #define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) x 47 arch/powerpc/include/asm/cell-pmu.h #define PM07_CTR_POLARITY(x) (((x) & 1) << 24) x 48 arch/powerpc/include/asm/cell-pmu.h #define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) x 49 arch/powerpc/include/asm/cell-pmu.h #define PM07_CTR_ENABLE(x) (((x) & 1) << 22) x 193 arch/powerpc/include/asm/cell-regs.h #define CBE_IIC_IR_PRIO(x) (((x) & 0xf) << 12) x 194 arch/powerpc/include/asm/cell-regs.h #define CBE_IIC_IR_DEST_NODE(x) (((x) & 0xf) << 4) x 195 arch/powerpc/include/asm/cell-regs.h #define CBE_IIC_IR_DEST_UNIT(x) ((x) & 0xf) x 52 arch/powerpc/include/asm/checksum.h static inline u32 from64to32(u64 x) x 54 arch/powerpc/include/asm/checksum.h return (x + ror64(x, 32)) >> 32; x 159 arch/powerpc/include/asm/cmpxchg.h __xchg_local(void *ptr, unsigned long x, unsigned int size) x 163 arch/powerpc/include/asm/cmpxchg.h return __xchg_u8_local(ptr, x); x 165 arch/powerpc/include/asm/cmpxchg.h return __xchg_u16_local(ptr, x); x 167 arch/powerpc/include/asm/cmpxchg.h return __xchg_u32_local(ptr, x); x 170 arch/powerpc/include/asm/cmpxchg.h return __xchg_u64_local(ptr, x); x 174 arch/powerpc/include/asm/cmpxchg.h return x; x 178 arch/powerpc/include/asm/cmpxchg.h __xchg_relaxed(void *ptr, unsigned long x, unsigned int size) x 182 arch/powerpc/include/asm/cmpxchg.h return __xchg_u8_relaxed(ptr, x); x 184 arch/powerpc/include/asm/cmpxchg.h return __xchg_u16_relaxed(ptr, x); x 186 arch/powerpc/include/asm/cmpxchg.h return __xchg_u32_relaxed(ptr, x); x 189 arch/powerpc/include/asm/cmpxchg.h return __xchg_u64_relaxed(ptr, x); x 193 arch/powerpc/include/asm/cmpxchg.h return x; x 195 arch/powerpc/include/asm/cmpxchg.h #define xchg_local(ptr,x) \ x 197 arch/powerpc/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 202 arch/powerpc/include/asm/cmpxchg.h #define xchg_relaxed(ptr, x) \ x 204 arch/powerpc/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 48 arch/powerpc/include/asm/cpm2.h #define CPM_CR_FCC_SBLOCK(x) (x + 0x10) x 70 arch/powerpc/include/asm/cpm2.h #define CPM_CR_FCC_PAGE(x) (x + 0x04) x 993 arch/powerpc/include/asm/cpm2.h #define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */ x 995 arch/powerpc/include/asm/cpm2.h #define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */ x 996 arch/powerpc/include/asm/cpm2.h #define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */ x 997 arch/powerpc/include/asm/cpm2.h #define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */ x 998 arch/powerpc/include/asm/cpm2.h #define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */ x 999 arch/powerpc/include/asm/cpm2.h #define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */ x 1000 arch/powerpc/include/asm/cpm2.h #define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */ x 1078 arch/powerpc/include/asm/cpm2.h #define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) x 26 arch/powerpc/include/asm/cpufeature.h #define cpu_feature(x) (x) x 64 arch/powerpc/include/asm/cpuidle.h #define GET_PSSCR_EC(x) (((x) & PSSCR_EC) >> PSSCR_EC_SHIFT) x 65 arch/powerpc/include/asm/cpuidle.h #define GET_PSSCR_ESL(x) (((x) & PSSCR_ESL) >> PSSCR_ESL_SHIFT) x 66 arch/powerpc/include/asm/cpuidle.h #define GET_PSSCR_RL(x) ((x) & PSSCR_RL_MASK) x 175 arch/powerpc/include/asm/cputable.h #define LONG_ASM_CONST(x) ASM_CONST(x) x 177 arch/powerpc/include/asm/cputable.h #define LONG_ASM_CONST(x) 0 x 92 arch/powerpc/include/asm/dbdma.h #define DBDMA_ALIGN(x) (((unsigned long)(x) + sizeof(struct dbdma_cmd) - 1) \ x 18 arch/powerpc/include/asm/dbell.h #define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36)) x 20 arch/powerpc/include/asm/dbell.h #define PPC_DBELL_LPID(x) ((x) << (63 - 49)) x 359 arch/powerpc/include/asm/eeh.h #define eeh_dev_check_failure(x) (0) x 16 arch/powerpc/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) x 17 arch/powerpc/include/asm/elf.h #define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC) x 25 arch/powerpc/include/asm/extable.h static inline unsigned long extable_fixup(const struct exception_table_entry *x) x 27 arch/powerpc/include/asm/extable.h return (unsigned long)&x->fixup + x->fixup; x 75 arch/powerpc/include/asm/hugetlb.h #define hugepd_shift(x) 0 x 114 arch/powerpc/include/asm/hvcall.h #define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \ x 115 arch/powerpc/include/asm/hvcall.h && (x <= H_LONG_BUSY_END_RANGE)) x 283 arch/powerpc/include/asm/hw_irq.h #define SET_MSR_EE(x) mtmsr(x) x 427 arch/powerpc/include/asm/io.h unsigned int x; \ x 443 arch/powerpc/include/asm/io.h : "=&r" (x) \ x 446 arch/powerpc/include/asm/io.h return x; \ x 563 arch/powerpc/include/asm/io.h #define DEF_PCI_HOOK_pio(x) x x 565 arch/powerpc/include/asm/io.h #define DEF_PCI_HOOK_pio(x) NULL x 569 arch/powerpc/include/asm/io.h #define DEF_PCI_HOOK_mem(x) x x 571 arch/powerpc/include/asm/io.h #define DEF_PCI_HOOK_mem(x) NULL x 8 arch/powerpc/include/asm/linkage.h #define cond_syscall(x) \ x 9 arch/powerpc/include/asm/linkage.h asm ("\t.weak " #x "\n\t.set " #x ", sys_ni_syscall\n" \ x 10 arch/powerpc/include/asm/linkage.h "\t.weak ." #x "\n\t.set ." #x ", .sys_ni_syscall\n") x 14 arch/powerpc/include/asm/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 82 arch/powerpc/include/asm/mpc5121.h #define MPC512X_SCLPC_CS(x) (((x) & 0x7) << 24) x 86 arch/powerpc/include/asm/mpc5121.h #define MPC512X_SCLPC_BPT(x) ((x) & 0x3f) x 93 arch/powerpc/include/asm/mpc5121.h #define MPC512X_SCLPC_FIFO_CTRL(x) (((x) & 0x7) << 24) x 94 arch/powerpc/include/asm/mpc5121.h #define MPC512X_SCLPC_FIFO_ALARM(x) ((x) & 0x3ff) x 30 arch/powerpc/include/asm/nohash/32/mmu-40x.h #define TLB_PAGESZ(x) (((x) & 0x7) << 7) x 48 arch/powerpc/include/asm/nohash/32/mmu-40x.h #define TLB_ZSEL(x) (((x) & 0xF) << 4) x 13 arch/powerpc/include/asm/nohash/32/pgalloc.h #define pmd_free(mm, x) do { } while (0) x 14 arch/powerpc/include/asm/nohash/32/pgalloc.h #define __pmd_free_tlb(tlb,x,a) do { } while (0) x 385 arch/powerpc/include/asm/nohash/32/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 }) x 348 arch/powerpc/include/asm/nohash/64/pgtable.h #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \ x 350 arch/powerpc/include/asm/nohash/64/pgtable.h #define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT) x 356 arch/powerpc/include/asm/nohash/64/pgtable.h #define __swp_entry_to_pte(x) __pte((x).val) x 46 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS0_TLBSEL(x) (((x) << MAS0_TLBSEL_SHIFT) & MAS0_TLBSEL_MASK) x 51 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS0_ESEL(x) (((x) << MAS0_ESEL_SHIFT) & MAS0_ESEL_MASK) x 52 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS0_NV(x) ((x) & 0x00000FFF) x 60 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS1_TID(x) (((x) << 16) & 0x3FFF0000) x 65 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK) x 96 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS4_TLBSELD(x) MAS0_TLBSEL(x) x 98 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS4_TSIZED(x) MAS1_TSIZE(x) x 118 arch/powerpc/include/asm/nohash/mmu-book3e.h #define MAS6_ISIZE(x) MAS1_TSIZE(x) x 47 arch/powerpc/include/asm/nohash/pgalloc.h #define get_hugepd_cache_index(x) (x) x 211 arch/powerpc/include/asm/page.h #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + VIRT_PHYS_OFFSET)) x 212 arch/powerpc/include/asm/page.h #define __pa(x) ((unsigned long)(x) - VIRT_PHYS_OFFSET) x 220 arch/powerpc/include/asm/page.h #define __va(x) \ x 222 arch/powerpc/include/asm/page.h VIRTUAL_BUG_ON((unsigned long)(x) >= PAGE_OFFSET); \ x 223 arch/powerpc/include/asm/page.h (void *)(unsigned long)((phys_addr_t)(x) | PAGE_OFFSET); \ x 226 arch/powerpc/include/asm/page.h #define __pa(x) \ x 228 arch/powerpc/include/asm/page.h VIRTUAL_BUG_ON((unsigned long)(x) < PAGE_OFFSET); \ x 229 arch/powerpc/include/asm/page.h (unsigned long)(x) & 0x0fffffffffffffffUL; \ x 233 arch/powerpc/include/asm/page.h #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + PAGE_OFFSET - MEMORY_START)) x 234 arch/powerpc/include/asm/page.h #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START) x 269 arch/powerpc/include/asm/page.h #define is_kernel_addr(x) ((x) >= 0x8000000000000000ul) x 271 arch/powerpc/include/asm/page.h #define is_kernel_addr(x) ((x) >= PAGE_OFFSET) x 30 arch/powerpc/include/asm/page_64.h #define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK) x 36 arch/powerpc/include/asm/page_64.h #define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T) x 78 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXINT_CFG_DHL(x) (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \ x 90 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXINT_INCR_INCR(x) ((x) & 0x0000ffff) x 92 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXINT_BASEL_BRBL(x) ((x) & ~0x3f) x 94 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXINT_BASEU_BRBH(x) ((x) & 0xfff) x 97 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXINT_BASEU_SIZ(x) (((x) << PAS_DMA_RXINT_BASEU_SIZ_S) & \ x 124 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_TXCHAN_CFG_TATTR(x) (((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \ x 130 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \ x 141 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_TXCHAN_BASEL_BRBL(x) (((x) << PAS_DMA_TXCHAN_BASEL_BRBL_S) & \ x 146 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_TXCHAN_BASEU_BRBH(x) (((x) << PAS_DMA_TXCHAN_BASEU_BRBH_S) & \ x 151 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_TXCHAN_BASEU_SIZ(x) (((x) << PAS_DMA_TXCHAN_BASEU_SIZ_S) & \ x 173 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXCHAN_CFG_HBU(x) (((x) << PAS_DMA_RXCHAN_CFG_HBU_S) & \ x 179 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXCHAN_BASEL_BRBL(x) (((x) << PAS_DMA_RXCHAN_BASEL_BRBL_S) & \ x 184 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXCHAN_BASEU_BRBH(x) (((x) << PAS_DMA_RXCHAN_BASEU_BRBH_S) & \ x 189 arch/powerpc/include/asm/pasemi_dma.h #define PAS_DMA_RXCHAN_BASEU_SIZ(x) (((x) << PAS_DMA_RXCHAN_BASEU_SIZ_S) & \ x 213 arch/powerpc/include/asm/pasemi_dma.h #define PAS_IOB_DMA_RXCH_CFG_CNTTH(x) (((x) << PAS_IOB_DMA_RXCH_CFG_CNTTH_S) & \ x 218 arch/powerpc/include/asm/pasemi_dma.h #define PAS_IOB_DMA_TXCH_CFG_CNTTH(x) (((x) << PAS_IOB_DMA_TXCH_CFG_CNTTH_S) & \ x 224 arch/powerpc/include/asm/pasemi_dma.h #define PAS_IOB_DMA_RXCH_STAT_CNTDEL(x) (((x) << PAS_IOB_DMA_RXCH_STAT_CNTDEL_S) &\ x 230 arch/powerpc/include/asm/pasemi_dma.h #define PAS_IOB_DMA_TXCH_STAT_CNTDEL(x) (((x) << PAS_IOB_DMA_TXCH_STAT_CNTDEL_S) &\ x 235 arch/powerpc/include/asm/pasemi_dma.h #define PAS_IOB_DMA_RXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_RXCH_RESET_PCNT_S) & \ x 246 arch/powerpc/include/asm/pasemi_dma.h #define PAS_IOB_DMA_TXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_TXCH_RESET_PCNT_S) & \ x 258 arch/powerpc/include/asm/pasemi_dma.h #define PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(x) (((x) << PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_S) & \ x 284 arch/powerpc/include/asm/pasemi_dma.h #define XCT_MACTX_LLEN(x) ((((long)(x)) << XCT_MACTX_LLEN_S) & \ x 288 arch/powerpc/include/asm/pasemi_dma.h #define XCT_MACTX_IPH(x) ((((long)(x)) << XCT_MACTX_IPH_S) & \ x 292 arch/powerpc/include/asm/pasemi_dma.h #define XCT_MACTX_IPO(x) ((((long)(x)) << XCT_MACTX_IPO_S) & \ x 317 arch/powerpc/include/asm/pasemi_dma.h #define XCT_MACRX_NB(x) ((((long)(x)) << XCT_MACRX_NB_S) & \ x 321 arch/powerpc/include/asm/pasemi_dma.h #define XCT_MACRX_LLEN(x) ((((long)(x)) << XCT_MACRX_LLEN_S) & \ x 348 arch/powerpc/include/asm/pasemi_dma.h #define XCT_PTR_LEN(x) ((((long)(x)) << XCT_PTR_LEN_S) & \ x 352 arch/powerpc/include/asm/pasemi_dma.h #define XCT_PTR_ADDR(x) ((((long)(x)) << XCT_PTR_ADDR_S) & \ x 369 arch/powerpc/include/asm/pasemi_dma.h #define XCT_RXB_LEN(x) ((((long)(x)) << XCT_RXB_LEN_S) & \ x 373 arch/powerpc/include/asm/pasemi_dma.h #define XCT_RXB_ADDR(x) ((((long)(x)) << XCT_RXB_ADDR_S) & \ x 391 arch/powerpc/include/asm/pasemi_dma.h #define XCT_COPY_LLEN(x) ((((long)(x)) << XCT_COPY_LLEN_S) & \ x 408 arch/powerpc/include/asm/pasemi_dma.h #define XCT_FUN_FUN(x) ((((long)(x)) << XCT_FUN_FUN_S) & XCT_FUN_FUN_M) x 414 arch/powerpc/include/asm/pasemi_dma.h #define XCT_FUN_LLEN(x) ((((long)(x)) << XCT_FUN_LLEN_S) & XCT_FUN_LLEN_M) x 417 arch/powerpc/include/asm/pasemi_dma.h #define XCT_FUN_SHL(x) ((((long)(x)) << XCT_FUN_SHL_S) & XCT_FUN_SHL_M) x 452 arch/powerpc/include/asm/pasemi_dma.h #define CTRL_CMD_REG(x) ((((long)(x)) << CTRL_CMD_REG_S) & \ x 248 arch/powerpc/include/asm/pci-bridge.h #define pdn_to_eeh_dev(x) (NULL) x 9 arch/powerpc/include/asm/pgtable-be-types.h #define __pte(x) ((pte_t) { cpu_to_be64(x) }) x 10 arch/powerpc/include/asm/pgtable-be-types.h #define __pte_raw(x) ((pte_t) { (x) }) x 11 arch/powerpc/include/asm/pgtable-be-types.h static inline unsigned long pte_val(pte_t x) x 13 arch/powerpc/include/asm/pgtable-be-types.h return be64_to_cpu(x.pte); x 16 arch/powerpc/include/asm/pgtable-be-types.h static inline __be64 pte_raw(pte_t x) x 18 arch/powerpc/include/asm/pgtable-be-types.h return x.pte; x 24 arch/powerpc/include/asm/pgtable-be-types.h #define __pmd(x) ((pmd_t) { cpu_to_be64(x) }) x 25 arch/powerpc/include/asm/pgtable-be-types.h #define __pmd_raw(x) ((pmd_t) { (x) }) x 26 arch/powerpc/include/asm/pgtable-be-types.h static inline unsigned long pmd_val(pmd_t x) x 28 arch/powerpc/include/asm/pgtable-be-types.h return be64_to_cpu(x.pmd); x 31 arch/powerpc/include/asm/pgtable-be-types.h static inline __be64 pmd_raw(pmd_t x) x 33 arch/powerpc/include/asm/pgtable-be-types.h return x.pmd; x 38 arch/powerpc/include/asm/pgtable-be-types.h #define __pud(x) ((pud_t) { cpu_to_be64(x) }) x 39 arch/powerpc/include/asm/pgtable-be-types.h #define __pud_raw(x) ((pud_t) { (x) }) x 40 arch/powerpc/include/asm/pgtable-be-types.h static inline unsigned long pud_val(pud_t x) x 42 arch/powerpc/include/asm/pgtable-be-types.h return be64_to_cpu(x.pud); x 45 arch/powerpc/include/asm/pgtable-be-types.h static inline __be64 pud_raw(pud_t x) x 47 arch/powerpc/include/asm/pgtable-be-types.h return x.pud; x 54 arch/powerpc/include/asm/pgtable-be-types.h #define __pgd(x) ((pgd_t) { cpu_to_be64(x) }) x 55 arch/powerpc/include/asm/pgtable-be-types.h #define __pgd_raw(x) ((pgd_t) { (x) }) x 56 arch/powerpc/include/asm/pgtable-be-types.h static inline unsigned long pgd_val(pgd_t x) x 58 arch/powerpc/include/asm/pgtable-be-types.h return be64_to_cpu(x.pgd); x 61 arch/powerpc/include/asm/pgtable-be-types.h static inline __be64 pgd_raw(pgd_t x) x 63 arch/powerpc/include/asm/pgtable-be-types.h return x.pgd; x 68 arch/powerpc/include/asm/pgtable-be-types.h #define pgprot_val(x) ((x).pgprot) x 69 arch/powerpc/include/asm/pgtable-be-types.h #define __pgprot(x) ((pgprot_t) { (x) }) x 105 arch/powerpc/include/asm/pgtable-be-types.h #define __hugepd(x) ((hugepd_t) { cpu_to_be64(x) }) x 107 arch/powerpc/include/asm/pgtable-be-types.h static inline unsigned long hpd_val(hugepd_t x) x 109 arch/powerpc/include/asm/pgtable-be-types.h return be64_to_cpu(x.pdbe); x 11 arch/powerpc/include/asm/pgtable-types.h #define __pte(x) ((pte_t) { (x) }) x 12 arch/powerpc/include/asm/pgtable-types.h static inline pte_basic_t pte_val(pte_t x) x 14 arch/powerpc/include/asm/pgtable-types.h return x.pte; x 20 arch/powerpc/include/asm/pgtable-types.h #define __pmd(x) ((pmd_t) { (x) }) x 21 arch/powerpc/include/asm/pgtable-types.h static inline unsigned long pmd_val(pmd_t x) x 23 arch/powerpc/include/asm/pgtable-types.h return x.pmd; x 28 arch/powerpc/include/asm/pgtable-types.h #define __pud(x) ((pud_t) { (x) }) x 29 arch/powerpc/include/asm/pgtable-types.h static inline unsigned long pud_val(pud_t x) x 31 arch/powerpc/include/asm/pgtable-types.h return x.pud; x 37 arch/powerpc/include/asm/pgtable-types.h #define __pgd(x) ((pgd_t) { (x) }) x 38 arch/powerpc/include/asm/pgtable-types.h static inline unsigned long pgd_val(pgd_t x) x 40 arch/powerpc/include/asm/pgtable-types.h return x.pgd; x 45 arch/powerpc/include/asm/pgtable-types.h #define pgprot_val(x) ((x).pgprot) x 46 arch/powerpc/include/asm/pgtable-types.h #define __pgprot(x) ((pgprot_t) { (x) }) x 71 arch/powerpc/include/asm/pgtable-types.h #define __hugepd(x) ((hugepd_t) { (x) }) x 72 arch/powerpc/include/asm/pgtable-types.h static inline unsigned long hpd_val(hugepd_t x) x 74 arch/powerpc/include/asm/pgtable-types.h return x.pd; x 47 arch/powerpc/include/asm/pgtable.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 158 arch/powerpc/include/asm/pgtable.h static inline bool is_ioremap_addr(const void *x) x 161 arch/powerpc/include/asm/pgtable.h unsigned long addr = (unsigned long)x; x 308 arch/powerpc/include/asm/pmac_feature.h #define PMAC_FTR_DEF(x) ((0x6660000) | (x)) x 582 arch/powerpc/include/asm/ppc-opcode.h #define TMRN(x) ((((x) & 0x1f) << 16) | (((x) & 0x3e0) << 6)) x 320 arch/powerpc/include/asm/ppc_asm.h .macro __LOAD_REG_IMMEDIATE_32 r, x x 331 arch/powerpc/include/asm/ppc_asm.h .macro __LOAD_REG_IMMEDIATE r, x x 377 arch/powerpc/include/asm/processor.h static inline void prefetch(const void *x) x 379 arch/powerpc/include/asm/processor.h if (unlikely(!x)) x 382 arch/powerpc/include/asm/processor.h __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); x 385 arch/powerpc/include/asm/processor.h static inline void prefetchw(const void *x) x 387 arch/powerpc/include/asm/processor.h if (unlikely(!x)) x 390 arch/powerpc/include/asm/processor.h __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); x 393 arch/powerpc/include/asm/processor.h #define spin_lock_prefetch(x) prefetchw(x) x 138 arch/powerpc/include/asm/prom.h #define OV5_FEAT(x) ((x) & 0xff) x 139 arch/powerpc/include/asm/prom.h #define OV5_INDX(x) ((x) >> 8) x 124 arch/powerpc/include/asm/reg.h #define MSR_TM_RESV(x) (((x) & MSR_TS_MASK) == MSR_TS_MASK) /* Reserved */ x 125 arch/powerpc/include/asm/reg.h #define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) == MSR_TS_T) x 126 arch/powerpc/include/asm/reg.h #define MSR_TM_SUSPENDED(x) (((x) & MSR_TS_MASK) == MSR_TS_S) x 129 arch/powerpc/include/asm/reg.h #define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */ x 131 arch/powerpc/include/asm/reg.h #define MSR_TM_ACTIVE(x) 0 x 798 arch/powerpc/include/asm/reg.h #define THRM1_THRES(x) ((x&0x7f)<<23) x 799 arch/powerpc/include/asm/reg.h #define THRM3_SITV(x) ((x&0x3fff)<<1) x 537 arch/powerpc/include/asm/reg_booke.h #define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */ x 543 arch/powerpc/include/asm/reg_booke.h #define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */ x 552 arch/powerpc/include/asm/reg_booke.h #define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */ x 571 arch/powerpc/include/asm/reg_booke.h #define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */ x 688 arch/powerpc/include/asm/reg_booke.h #define DBCR_RST(x) (((x) & 0x3) << 28) x 703 arch/powerpc/include/asm/reg_booke.h #define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */ x 710 arch/powerpc/include/asm/reg_booke.h #define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */ x 753 arch/powerpc/include/asm/reg_booke.h #define TEN_THREAD(x) (1 << (x)) x 203 arch/powerpc/include/asm/rtas.h #define rtas_error_type(x) ((x)->byte3) x 24 arch/powerpc/include/asm/setup.h #define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x))) x 544 arch/powerpc/include/asm/smu.h #define SMU_U16_MIX(x) le16_to_cpu(x) x 545 arch/powerpc/include/asm/smu.h #define SMU_U32_MIX(x) ((((x) & 0xff00ff00u) >> 8)|(((x) & 0x00ff00ffu) << 8)) x 177 arch/powerpc/include/asm/time.h #define mulhwu(x,y) \ x 178 arch/powerpc/include/asm/time.h ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) x 181 arch/powerpc/include/asm/time.h #define mulhdu(x,y) \ x 182 arch/powerpc/include/asm/time.h ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) x 25 arch/powerpc/include/asm/tsi108_irq.h #define TSI108_IRQ(x) (TSI108_IRQ_REG_BASE + (x)) x 88 arch/powerpc/include/asm/uaccess.h #define get_user(x, ptr) \ x 89 arch/powerpc/include/asm/uaccess.h __get_user_check((x), (ptr), sizeof(*(ptr))) x 90 arch/powerpc/include/asm/uaccess.h #define put_user(x, ptr) \ x 91 arch/powerpc/include/asm/uaccess.h __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 93 arch/powerpc/include/asm/uaccess.h #define __get_user(x, ptr) \ x 94 arch/powerpc/include/asm/uaccess.h __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 95 arch/powerpc/include/asm/uaccess.h #define __put_user(x, ptr) \ x 96 arch/powerpc/include/asm/uaccess.h __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 98 arch/powerpc/include/asm/uaccess.h #define __get_user_inatomic(x, ptr) \ x 99 arch/powerpc/include/asm/uaccess.h __get_user_nosleep((x), (ptr), sizeof(*(ptr))) x 100 arch/powerpc/include/asm/uaccess.h #define __put_user_inatomic(x, ptr) \ x 101 arch/powerpc/include/asm/uaccess.h __put_user_nosleep((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 110 arch/powerpc/include/asm/uaccess.h #define __put_user_asm(x, addr, err, op) \ x 120 arch/powerpc/include/asm/uaccess.h : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) x 123 arch/powerpc/include/asm/uaccess.h #define __put_user_asm2(x, ptr, retval) \ x 124 arch/powerpc/include/asm/uaccess.h __put_user_asm(x, ptr, retval, "std") x 126 arch/powerpc/include/asm/uaccess.h #define __put_user_asm2(x, addr, err) \ x 138 arch/powerpc/include/asm/uaccess.h : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) x 141 arch/powerpc/include/asm/uaccess.h #define __put_user_size(x, ptr, size, retval) \ x 146 arch/powerpc/include/asm/uaccess.h case 1: __put_user_asm(x, ptr, retval, "stb"); break; \ x 147 arch/powerpc/include/asm/uaccess.h case 2: __put_user_asm(x, ptr, retval, "sth"); break; \ x 148 arch/powerpc/include/asm/uaccess.h case 4: __put_user_asm(x, ptr, retval, "stw"); break; \ x 149 arch/powerpc/include/asm/uaccess.h case 8: __put_user_asm2(x, ptr, retval); break; \ x 155 arch/powerpc/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) \ x 162 arch/powerpc/include/asm/uaccess.h __put_user_size((x), __pu_addr, (size), __pu_err); \ x 166 arch/powerpc/include/asm/uaccess.h #define __put_user_check(x, ptr, size) \ x 172 arch/powerpc/include/asm/uaccess.h __put_user_size((x), __pu_addr, (size), __pu_err); \ x 176 arch/powerpc/include/asm/uaccess.h #define __put_user_nosleep(x, ptr, size) \ x 181 arch/powerpc/include/asm/uaccess.h __put_user_size((x), __pu_addr, (size), __pu_err); \ x 205 arch/powerpc/include/asm/uaccess.h #define __get_user_asm(x, addr, err, op) \ x 215 arch/powerpc/include/asm/uaccess.h : "=r" (err), "=r" (x) \ x 219 arch/powerpc/include/asm/uaccess.h #define __get_user_asm2(x, addr, err) \ x 220 arch/powerpc/include/asm/uaccess.h __get_user_asm(x, addr, err, "ld") x 222 arch/powerpc/include/asm/uaccess.h #define __get_user_asm2(x, addr, err) \ x 235 arch/powerpc/include/asm/uaccess.h : "=r" (err), "=&r" (x) \ x 239 arch/powerpc/include/asm/uaccess.h #define __get_user_size(x, ptr, size, retval) \ x 243 arch/powerpc/include/asm/uaccess.h if (size > sizeof(x)) \ x 244 arch/powerpc/include/asm/uaccess.h (x) = __get_user_bad(); \ x 247 arch/powerpc/include/asm/uaccess.h case 1: __get_user_asm(x, ptr, retval, "lbz"); break; \ x 248 arch/powerpc/include/asm/uaccess.h case 2: __get_user_asm(x, ptr, retval, "lhz"); break; \ x 249 arch/powerpc/include/asm/uaccess.h case 4: __get_user_asm(x, ptr, retval, "lwz"); break; \ x 250 arch/powerpc/include/asm/uaccess.h case 8: __get_user_asm2(x, ptr, retval); break; \ x 251 arch/powerpc/include/asm/uaccess.h default: (x) = __get_user_bad(); \ x 260 arch/powerpc/include/asm/uaccess.h #define __long_type(x) \ x 261 arch/powerpc/include/asm/uaccess.h __typeof__(__builtin_choose_expr(sizeof(x) > sizeof(0UL), 0ULL, 0UL)) x 263 arch/powerpc/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) \ x 273 arch/powerpc/include/asm/uaccess.h (x) = (__typeof__(*(ptr)))__gu_val; \ x 277 arch/powerpc/include/asm/uaccess.h #define __get_user_check(x, ptr, size) \ x 287 arch/powerpc/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 291 arch/powerpc/include/asm/uaccess.h #define __get_user_nosleep(x, ptr, size) \ x 299 arch/powerpc/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 51 arch/powerpc/include/asm/vga.h #define VGA_MAP_MEM(x,s) ((unsigned long) ioremap((x), s)) x 53 arch/powerpc/include/asm/vga.h #define VGA_MAP_MEM(x,s) (x) x 56 arch/powerpc/include/asm/vga.h #define vga_readb(x) (*(x)) x 57 arch/powerpc/include/asm/vga.h #define vga_writeb(x,y) (*(y) = (x)) x 606 arch/powerpc/kernel/asm-offsets.c # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f)) x 608 arch/powerpc/kernel/asm-offsets.c # define SVCPU_FIELD(x, f) x 610 arch/powerpc/kernel/asm-offsets.c # define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f)) x 612 arch/powerpc/kernel/asm-offsets.c # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f)) x 613 arch/powerpc/kernel/asm-offsets.c # define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f)) x 260 arch/powerpc/kernel/btext.c static unsigned char * calc_base(int x, int y) x 267 arch/powerpc/kernel/btext.c base += (x + dispDeviceRect[0]) * (dispDeviceDepth >> 3); x 500 arch/powerpc/kernel/btext.c int x; x 540 arch/powerpc/kernel/btext.c for (x = 0; x < g_max_loc_X; ++x) x 541 arch/powerpc/kernel/btext.c draw_byte(' ', x, g_loc_Y); x 27 arch/powerpc/kernel/kvm.c #define magic_var(x) KVM_MAGIC_PAGE + offsetof(struct kvm_vcpu_arch_shared, x) x 49 arch/powerpc/kernel/module_32.c const Elf32_Rela *x, *y; x 52 arch/powerpc/kernel/module_32.c x = (Elf32_Rela *)_y; x 58 arch/powerpc/kernel/module_32.c if (x->r_info < y->r_info) x 60 arch/powerpc/kernel/module_32.c else if (x->r_info > y->r_info) x 62 arch/powerpc/kernel/module_32.c else if (x->r_addend < y->r_addend) x 64 arch/powerpc/kernel/module_32.c else if (x->r_addend > y->r_addend) x 72 arch/powerpc/kernel/module_32.c uint32_t *x, *y, tmp; x 76 arch/powerpc/kernel/module_32.c x = (uint32_t *)_y; x 79 arch/powerpc/kernel/module_32.c tmp = x[i]; x 80 arch/powerpc/kernel/module_32.c x[i] = y[i]; x 208 arch/powerpc/kernel/module_64.c const Elf64_Rela *x, *y; x 211 arch/powerpc/kernel/module_64.c x = (Elf64_Rela *)_y; x 217 arch/powerpc/kernel/module_64.c if (x->r_info < y->r_info) x 219 arch/powerpc/kernel/module_64.c else if (x->r_info > y->r_info) x 221 arch/powerpc/kernel/module_64.c else if (x->r_addend < y->r_addend) x 223 arch/powerpc/kernel/module_64.c else if (x->r_addend > y->r_addend) x 231 arch/powerpc/kernel/module_64.c uint64_t *x, *y, tmp; x 235 arch/powerpc/kernel/module_64.c x = (uint64_t *)_y; x 238 arch/powerpc/kernel/module_64.c tmp = x[i]; x 239 arch/powerpc/kernel/module_64.c x[i] = y[i]; x 73 arch/powerpc/kernel/process.c #define TM_DEBUG(x...) printk(KERN_INFO x) x 75 arch/powerpc/kernel/process.c #define TM_DEBUG(x...) do { } while(0) x 83 arch/powerpc/kernel/prom_init.c #define ADDR(x) (u32)(unsigned long)(x) x 102 arch/powerpc/kernel/prom_init.c #define prom_debug(x...) prom_printf(x) x 104 arch/powerpc/kernel/prom_init.c #define prom_debug(x...) do { } while (0) x 655 arch/powerpc/kernel/prom_init.c static char *tohex(unsigned int x) x 665 arch/powerpc/kernel/prom_init.c result[i] = digits[x & 0xf]; x 666 arch/powerpc/kernel/prom_init.c x >>= 4; x 667 arch/powerpc/kernel/prom_init.c } while (x != 0 && i > 0); x 2064 arch/powerpc/kernel/prom_init.c #define LOW_ADDR(x) (((unsigned long) &(x)) & 0xff) x 2248 arch/powerpc/kernel/prom_init.c int x; x 2294 arch/powerpc/kernel/prom_init.c x = prom_getproplen(rtas, "ibm,hypertas-functions"); x 2295 arch/powerpc/kernel/prom_init.c if (x != PROM_ERROR) { x 115 arch/powerpc/kernel/rtas-proc.c #define cel_to_fahr(x) ((x*9/5)+32) x 410 arch/powerpc/kernel/rtas.c #define __fetch_rtas_last_error(x) NULL x 503 arch/powerpc/kernel/time.c unsigned long x; x 506 arch/powerpc/kernel/time.c : "=r" (x) x 508 arch/powerpc/kernel/time.c return x; x 1155 arch/powerpc/kernel/time.c unsigned long w, x, y, z; x 1167 arch/powerpc/kernel/time.c x = ra; x 1175 arch/powerpc/kernel/time.c dr->result_high = ((u64)w << 32) + x; x 92 arch/powerpc/kernel/traps.c #define TM_DEBUG(x...) printk(KERN_INFO x) x 94 arch/powerpc/kernel/traps.c #define TM_DEBUG(x...) do { } while(0) x 156 arch/powerpc/kernel/vecemu.c static int ctsxs(unsigned int x, int scale, unsigned int *vscrp) x 160 arch/powerpc/kernel/vecemu.c exp = (x >> 23) & 0xff; x 161 arch/powerpc/kernel/vecemu.c mant = x & 0x7fffff; x 169 arch/powerpc/kernel/vecemu.c if (x + (scale << 23) != 0xcf000000) x 171 arch/powerpc/kernel/vecemu.c return (x & 0x80000000)? 0x80000000: 0x7fffffff; x 175 arch/powerpc/kernel/vecemu.c return (x & 0x80000000)? -mant: mant; x 178 arch/powerpc/kernel/vecemu.c static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp) x 183 arch/powerpc/kernel/vecemu.c exp = (x >> 23) & 0xff; x 184 arch/powerpc/kernel/vecemu.c mant = x & 0x7fffff; x 190 arch/powerpc/kernel/vecemu.c if (x & 0x80000000) { x 206 arch/powerpc/kernel/vecemu.c static unsigned int rfiz(unsigned int x) x 210 arch/powerpc/kernel/vecemu.c exp = ((x >> 23) & 0xff) - 127; x 211 arch/powerpc/kernel/vecemu.c if (exp == 128 && (x & 0x7fffff) != 0) x 212 arch/powerpc/kernel/vecemu.c return x | 0x400000; /* NaN -> make it a QNaN */ x 214 arch/powerpc/kernel/vecemu.c return x; /* it's an integer already (or Inf) */ x 216 arch/powerpc/kernel/vecemu.c return x & 0x80000000; /* |x| < 1.0 rounds to 0 */ x 217 arch/powerpc/kernel/vecemu.c return x & ~(0x7fffff >> exp); x 221 arch/powerpc/kernel/vecemu.c static unsigned int rfii(unsigned int x) x 225 arch/powerpc/kernel/vecemu.c exp = ((x >> 23) & 0xff) - 127; x 226 arch/powerpc/kernel/vecemu.c if (exp == 128 && (x & 0x7fffff) != 0) x 227 arch/powerpc/kernel/vecemu.c return x | 0x400000; /* NaN -> make it a QNaN */ x 229 arch/powerpc/kernel/vecemu.c return x; /* it's an integer already (or Inf) */ x 230 arch/powerpc/kernel/vecemu.c if ((x & 0x7fffffff) == 0) x 231 arch/powerpc/kernel/vecemu.c return x; /* +/-0 -> +/-0 */ x 234 arch/powerpc/kernel/vecemu.c return (x & 0x80000000) | 0x3f800000; x 238 arch/powerpc/kernel/vecemu.c return (x + mask) & ~mask; x 242 arch/powerpc/kernel/vecemu.c static unsigned int rfin(unsigned int x) x 246 arch/powerpc/kernel/vecemu.c exp = ((x >> 23) & 0xff) - 127; x 247 arch/powerpc/kernel/vecemu.c if (exp == 128 && (x & 0x7fffff) != 0) x 248 arch/powerpc/kernel/vecemu.c return x | 0x400000; /* NaN -> make it a QNaN */ x 250 arch/powerpc/kernel/vecemu.c return x; /* it's an integer already (or Inf) */ x 252 arch/powerpc/kernel/vecemu.c return x & 0x80000000; /* |x| < 0.5 -> +/-0 */ x 255 arch/powerpc/kernel/vecemu.c return (x & 0x80000000) | 0x3f800000; x 258 arch/powerpc/kernel/vecemu.c return (x + half) & ~(0x7fffff >> exp); x 310 arch/powerpc/kernel/vecemu.c u32 x = vrs[vb].u[i]; x 311 arch/powerpc/kernel/vecemu.c x = (x & 0x80000000)? rfiz(x): rfii(x); x 312 arch/powerpc/kernel/vecemu.c vrs[vd].u[i] = x; x 317 arch/powerpc/kernel/vecemu.c u32 x = vrs[vb].u[i]; x 318 arch/powerpc/kernel/vecemu.c x = (x & 0x80000000)? rfii(x): rfiz(x); x 319 arch/powerpc/kernel/vecemu.c vrs[vd].u[i] = x; x 39 arch/powerpc/kvm/book3s.c #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__ x 40 arch/powerpc/kvm/book3s.c #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__ x 1157 arch/powerpc/kvm/book3s_hv.c static void do_nothing(void *x) x 26 arch/powerpc/kvm/book3s_hv_rm_mmu.c static void *real_vmalloc_addr(void *x) x 28 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long addr = (unsigned long) x; x 38 arch/powerpc/kvm/booke.c #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM x 39 arch/powerpc/kvm/booke.c #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU x 1106 arch/powerpc/kvm/powerpc.c #define sp_to_dp(x) (x) x 1107 arch/powerpc/kvm/powerpc.c #define dp_to_sp(x) (x) x 401 arch/powerpc/lib/code-patching.c #define check(x) \ x 402 arch/powerpc/lib/code-patching.c if (!(x)) printk("code-patching: test failed at line %d\n", __LINE__); x 475 arch/powerpc/lib/feature-fixups.c #define check(x) \ x 476 arch/powerpc/lib/feature-fixups.c if (!(x)) printk("feature-fixups: test failed at line %d\n", __LINE__); x 194 arch/powerpc/lib/sstep.c static nokprobe_inline unsigned long max_align(unsigned long x) x 196 arch/powerpc/lib/sstep.c x |= sizeof(unsigned long); x 197 arch/powerpc/lib/sstep.c return x & -x; /* isolates rightmost bit */ x 200 arch/powerpc/lib/sstep.c static nokprobe_inline unsigned long byterev_2(unsigned long x) x 202 arch/powerpc/lib/sstep.c return ((x >> 8) & 0xff) | ((x & 0xff) << 8); x 205 arch/powerpc/lib/sstep.c static nokprobe_inline unsigned long byterev_4(unsigned long x) x 207 arch/powerpc/lib/sstep.c return ((x >> 24) & 0xff) | ((x >> 8) & 0xff00) | x 208 arch/powerpc/lib/sstep.c ((x & 0xff00) << 8) | ((x & 0xff) << 24); x 212 arch/powerpc/lib/sstep.c static nokprobe_inline unsigned long byterev_8(unsigned long x) x 214 arch/powerpc/lib/sstep.c return (byterev_4(x) << 32) | byterev_4(x >> 32); x 250 arch/powerpc/lib/sstep.c unsigned long x = 0; x 254 arch/powerpc/lib/sstep.c err = __get_user(x, (unsigned char __user *) ea); x 257 arch/powerpc/lib/sstep.c err = __get_user(x, (unsigned short __user *) ea); x 260 arch/powerpc/lib/sstep.c err = __get_user(x, (unsigned int __user *) ea); x 264 arch/powerpc/lib/sstep.c err = __get_user(x, (unsigned long __user *) ea); x 269 arch/powerpc/lib/sstep.c *dest = x; x 907 arch/powerpc/lib/sstep.c #define __put_user_asmx(x, addr, err, op, cr) \ x 918 arch/powerpc/lib/sstep.c : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err)) x 920 arch/powerpc/lib/sstep.c #define __get_user_asmx(x, addr, err, op) \ x 929 arch/powerpc/lib/sstep.c : "=r" (err), "=r" (x) \ x 1148 arch/powerpc/lib/sstep.c #define DATA32(x) (((x) & 0xffffffffUL) | (((x) & 0xffffffffUL) << 32)) x 1150 arch/powerpc/lib/sstep.c #define DATA32(x) (x) x 1152 arch/powerpc/lib/sstep.c #define ROTATE(x, n) ((n) ? (((x) << (n)) | ((x) >> (8 * sizeof(long) - (n)))) : (x)) x 16 arch/powerpc/math-emu/math.c #define FLOATFUNC(x) extern int x(void *, void *, void *, void *) x 27 arch/powerpc/math-emu/math.c #undef FLOATFUNC(x) x 28 arch/powerpc/math-emu/math.c #define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \ x 129 arch/powerpc/oprofile/op_model_cell.c #define GET_SUB_UNIT(x) ((x & 0x0000f000) >> 12) x 130 arch/powerpc/oprofile/op_model_cell.c #define GET_BUS_WORD(x) ((x & 0x000000f0) >> 4) x 131 arch/powerpc/oprofile/op_model_cell.c #define GET_BUS_TYPE(x) ((x & 0x00000300) >> 8) x 132 arch/powerpc/oprofile/op_model_cell.c #define GET_POLARITY(x) ((x & 0x00000002) >> 1) x 133 arch/powerpc/oprofile/op_model_cell.c #define GET_COUNT_CYCLES(x) (x & 0x00000001) x 134 arch/powerpc/oprofile/op_model_cell.c #define GET_INPUT_CONTROL(x) ((x & 0x00000004) >> 2) x 24 arch/powerpc/perf/8xx-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 27 arch/powerpc/perf/e500-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 28 arch/powerpc/perf/e6500-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 97 arch/powerpc/perf/generic-compat-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 36 arch/powerpc/perf/hv-24x7.c #define DOMAIN(n, v, x, c) \ x 50 arch/powerpc/perf/hv-24x7.c #define DOMAIN(n, v, x, c) \ x 350 arch/powerpc/perf/mpc7450-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 614 arch/powerpc/perf/power5+-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 556 arch/powerpc/perf/power5-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 476 arch/powerpc/perf/power6-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 328 arch/powerpc/perf/power7-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 249 arch/powerpc/perf/power8-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 306 arch/powerpc/perf/power9-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 428 arch/powerpc/perf/ppc970-pmu.c #define C(x) PERF_COUNT_HW_CACHE_##x x 31 arch/powerpc/platforms/cell/pmu.c #define WRITE_WO_MMIO(reg, x) \ x 33 arch/powerpc/platforms/cell/pmu.c u32 _x = (x); \ x 74 arch/powerpc/platforms/cell/spufs/sched.c #define SCALE_PRIO(x, prio) \ x 75 arch/powerpc/platforms/cell/spufs/sched.c max(x * (MAX_PRIO - prio) / (MAX_USER_PRIO / 2), MIN_SPU_TIMESLICE) x 52 arch/powerpc/platforms/embedded6xx/wii.c static int __init page_aligned(unsigned long x) x 54 arch/powerpc/platforms/embedded6xx/wii.c return !(x & (PAGE_SIZE-1)); x 28 arch/powerpc/platforms/maple/pci.c #define DBG(x...) printk(x) x 30 arch/powerpc/platforms/maple/pci.c #define DBG(x...) x 33 arch/powerpc/platforms/maple/time.c #define DBG(x...) printk(x) x 35 arch/powerpc/platforms/maple/time.c #define DBG(x...) x 561 arch/powerpc/platforms/powermac/bootx_init.c unsigned long x __maybe_unused; x 572 arch/powerpc/platforms/powermac/bootx_init.c x = *(volatile unsigned long *)ptr; x 53 arch/powerpc/platforms/powermac/low_i2c.c #define DBG(x...) do {\ x 54 arch/powerpc/platforms/powermac/low_i2c.c printk(KERN_DEBUG "low_i2c:" x); \ x 57 arch/powerpc/platforms/powermac/low_i2c.c #define DBG(x...) x 61 arch/powerpc/platforms/powermac/low_i2c.c #define DBG_LOW(x...) do {\ x 62 arch/powerpc/platforms/powermac/low_i2c.c printk(KERN_DEBUG "low_i2c:" x); \ x 65 arch/powerpc/platforms/powermac/low_i2c.c #define DBG_LOW(x...) x 31 arch/powerpc/platforms/powermac/nvram.c #define DBG(x...) printk(x) x 33 arch/powerpc/platforms/powermac/nvram.c #define DBG(x...) x 31 arch/powerpc/platforms/powermac/pci.c #define DBG(x...) printk(x) x 33 arch/powerpc/platforms/powermac/pci.c #define DBG(x...) x 42 arch/powerpc/platforms/powermac/time.c #define DBG(x...) printk(x) x 44 arch/powerpc/platforms/powermac/time.c #define DBG(x...) x 28 arch/powerpc/platforms/powernv/opal-dump.c #define to_dump_obj(x) container_of(x, struct dump_obj, kobj) x 37 arch/powerpc/platforms/powernv/opal-dump.c #define to_dump_attr(x) container_of(x, struct dump_attribute, attr) x 28 arch/powerpc/platforms/powernv/opal-elog.c #define to_elog_obj(x) container_of(x, struct elog_obj, kobj) x 37 arch/powerpc/platforms/powernv/opal-elog.c #define to_elog_attr(x) container_of(x, struct elog_attribute, attr) x 704 arch/powerpc/platforms/ps3/interrupt.c u64 x = (pd->bmp.status & pd->bmp.mask); x 709 arch/powerpc/platforms/ps3/interrupt.c if (x & pd->ipi_debug_brk_mask) x 710 arch/powerpc/platforms/ps3/interrupt.c x &= pd->ipi_debug_brk_mask; x 712 arch/powerpc/platforms/ps3/interrupt.c asm volatile("cntlzd %0,%1" : "=r" (plug) : "r" (x)); x 105 arch/powerpc/platforms/ps3/mm.c #define debug_dump_map(x) _debug_dump_map(x, __func__, __LINE__) x 48 arch/powerpc/platforms/ps3/setup.c union ps3_firmware_version x; x 50 arch/powerpc/platforms/ps3/setup.c x.pad = 0; x 51 arch/powerpc/platforms/ps3/setup.c x.major = major; x 52 arch/powerpc/platforms/ps3/setup.c x.minor = minor; x 53 arch/powerpc/platforms/ps3/setup.c x.rev = rev; x 55 arch/powerpc/platforms/ps3/setup.c return (ps3_firmware_version.raw > x.raw) - x 56 arch/powerpc/platforms/ps3/setup.c (ps3_firmware_version.raw < x.raw); x 26 arch/powerpc/sysdev/fsl_gtm.c #define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1) x 27 arch/powerpc/sysdev/fsl_gtm.c #define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0) x 35 arch/powerpc/sysdev/fsl_gtm.c #define GTMDR_SPS(x) ((x) << 8) x 72 arch/powerpc/sysdev/fsl_rio.c #define __fsl_read_rio_config(x, addr, err, op) \ x 83 arch/powerpc/sysdev/fsl_rio.c : "=r" (err), "=r" (x) \ x 30 arch/powerpc/sysdev/tsi108_pci.c #define DBG(x...) printk(x) x 32 arch/powerpc/sysdev/tsi108_pci.c #define DBG(x...) x 119 arch/powerpc/sysdev/tsi108_pci.c #define __tsi108_read_pci_config(x, addr, op) \ x 129 arch/powerpc/sysdev/tsi108_pci.c : "=r"(x) : "r"(addr)) x 17 arch/powerpc/xmon/ppc-opc.c #define _(x) x x 2299 arch/powerpc/xmon/ppc-opc.c #define OP(x) ((((unsigned long)(x)) & 0x3f) << 26) x 2305 arch/powerpc/xmon/ppc-opc.c #define OPTO(x,to) (OP (x) | ((((unsigned long)(to)) & 0x1f) << 21)) x 2311 arch/powerpc/xmon/ppc-opc.c #define OPL(x,l) (OP (x) | ((((unsigned long)(l)) & 1) << 21)) x 2316 arch/powerpc/xmon/ppc-opc.c #define OPVUP(x,vup) (OP (x) | ((((unsigned long)(vup)) & 0xff) << 8)) x 2322 arch/powerpc/xmon/ppc-opc.c #define OPVUPRT(x,vup,rt) (OPVUP (x, vup) | ((((unsigned long)(rt)) & 0x1f) << 21)) x 2411 arch/powerpc/xmon/ppc-opc.c #define C_LK(x, lk) (((((unsigned long)(x)) & 0x7fff) << 1) | ((lk) & 1)) x 2413 arch/powerpc/xmon/ppc-opc.c #define C(x) ((((unsigned long)(x)) & 0xffff)) x 2852 arch/powerpc/xmon/xmon.c const char *x = fault_chars[fault_type]; x 2853 arch/powerpc/xmon/xmon.c printf(REG" %s%s%s%s\n", adr, x, x, x, x); x 10 arch/riscv/include/asm/asm.h #define __ASM_STR(x) x x 12 arch/riscv/include/asm/asm.h #define __ASM_STR(x) #x x 62 arch/riscv/include/asm/bitops.h #define __NOP(x) (x) x 63 arch/riscv/include/asm/bitops.h #define __NOT(x) (~(x)) x 40 arch/riscv/include/asm/cmpxchg.h #define xchg_relaxed(ptr, x) \ x 42 arch/riscv/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 75 arch/riscv/include/asm/cmpxchg.h #define xchg_acquire(ptr, x) \ x 77 arch/riscv/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 110 arch/riscv/include/asm/cmpxchg.h #define xchg_release(ptr, x) \ x 112 arch/riscv/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 143 arch/riscv/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 145 arch/riscv/include/asm/cmpxchg.h __typeof__(*(ptr)) _x_ = (x); \ x 149 arch/riscv/include/asm/cmpxchg.h #define xchg32(ptr, x) \ x 152 arch/riscv/include/asm/cmpxchg.h xchg((ptr), (x)); \ x 155 arch/riscv/include/asm/cmpxchg.h #define xchg64(ptr, x) \ x 158 arch/riscv/include/asm/cmpxchg.h xchg((ptr), (x)); \ x 31 arch/riscv/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_RISCV) x 222 arch/riscv/include/asm/io.h ctype x = __raw_read ## len(addr); \ x 223 arch/riscv/include/asm/io.h *buf++ = x; \ x 77 arch/riscv/include/asm/page.h #define pte_val(x) ((x).pte) x 78 arch/riscv/include/asm/page.h #define pgd_val(x) ((x).pgd) x 79 arch/riscv/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 81 arch/riscv/include/asm/page.h #define __pte(x) ((pte_t) { (x) }) x 82 arch/riscv/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) }) x 83 arch/riscv/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) }) x 97 arch/riscv/include/asm/page.h #define __pa(x) ((unsigned long)(x) - va_pa_offset) x 98 arch/riscv/include/asm/page.h #define __va(x) ((void *)((unsigned long) (x) + va_pa_offset)) x 26 arch/riscv/include/asm/pgtable-64.h #define pmd_val(x) ((x).pmd) x 27 arch/riscv/include/asm/pgtable-64.h #define __pmd(x) ((pmd_t) { (x) }) x 184 arch/riscv/include/asm/pgtable.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 425 arch/riscv/include/asm/pgtable.h #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) x 426 arch/riscv/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) x 431 arch/riscv/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 20 arch/riscv/include/asm/spinlock.h #define arch_spin_is_locked(x) (READ_ONCE((x)->lock) != 0) x 105 arch/riscv/include/asm/uaccess.h #define __get_user_asm(insn, x, ptr, err) \ x 108 arch/riscv/include/asm/uaccess.h __typeof__(x) __x; \ x 128 arch/riscv/include/asm/uaccess.h (x) = __x; \ x 132 arch/riscv/include/asm/uaccess.h #define __get_user_8(x, ptr, err) \ x 133 arch/riscv/include/asm/uaccess.h __get_user_asm("ld", x, ptr, err) x 135 arch/riscv/include/asm/uaccess.h #define __get_user_8(x, ptr, err) \ x 165 arch/riscv/include/asm/uaccess.h (x) = (__typeof__(x))((__typeof__((x)-(x)))( \ x 191 arch/riscv/include/asm/uaccess.h #define __get_user(x, ptr) \ x 198 arch/riscv/include/asm/uaccess.h __get_user_asm("lb", (x), __gu_ptr, __gu_err); \ x 201 arch/riscv/include/asm/uaccess.h __get_user_asm("lh", (x), __gu_ptr, __gu_err); \ x 204 arch/riscv/include/asm/uaccess.h __get_user_asm("lw", (x), __gu_ptr, __gu_err); \ x 207 arch/riscv/include/asm/uaccess.h __get_user_8((x), __gu_ptr, __gu_err); \ x 232 arch/riscv/include/asm/uaccess.h #define get_user(x, ptr) \ x 237 arch/riscv/include/asm/uaccess.h __get_user((x), __p) : \ x 238 arch/riscv/include/asm/uaccess.h ((x) = 0, -EFAULT); \ x 241 arch/riscv/include/asm/uaccess.h #define __put_user_asm(insn, x, ptr, err) \ x 244 arch/riscv/include/asm/uaccess.h __typeof__(*(ptr)) __x = x; \ x 266 arch/riscv/include/asm/uaccess.h #define __put_user_8(x, ptr, err) \ x 267 arch/riscv/include/asm/uaccess.h __put_user_asm("sd", x, ptr, err) x 269 arch/riscv/include/asm/uaccess.h #define __put_user_8(x, ptr, err) \ x 272 arch/riscv/include/asm/uaccess.h u64 __x = (__typeof__((x)-(x)))(x); \ x 320 arch/riscv/include/asm/uaccess.h #define __put_user(x, ptr) \ x 327 arch/riscv/include/asm/uaccess.h __put_user_asm("sb", (x), __gu_ptr, __pu_err); \ x 330 arch/riscv/include/asm/uaccess.h __put_user_asm("sh", (x), __gu_ptr, __pu_err); \ x 333 arch/riscv/include/asm/uaccess.h __put_user_asm("sw", (x), __gu_ptr, __pu_err); \ x 336 arch/riscv/include/asm/uaccess.h __put_user_8((x), __gu_ptr, __pu_err); \ x 360 arch/riscv/include/asm/uaccess.h #define put_user(x, ptr) \ x 365 arch/riscv/include/asm/uaccess.h __put_user((x), __p) : \ x 58 arch/riscv/kernel/module-sections.c static int is_rela_equal(const Elf_Rela *x, const Elf_Rela *y) x 60 arch/riscv/kernel/module-sections.c return x->r_info == y->r_info && x->r_addend == y->r_addend; x 52 arch/riscv/kernel/perf_event.c #define C(x) PERF_COUNT_HW_CACHE_##x x 23 arch/s390/appldata/appldata_mem.c #define P2K(x) ((x) << (PAGE_SHIFT - 10)) /* Converts #Pages to KB */ x 54 arch/s390/boot/startup.c void error(char *x) x 57 arch/s390/boot/startup.c sclp_early_printk(x); x 49 arch/s390/boot/string.c #define TOLOWER(x) ((x) | 0x20) x 11 arch/s390/include/asm/bug.h #define __EMIT_BUG(x) do { \ x 24 arch/s390/include/asm/bug.h "i" (x), \ x 30 arch/s390/include/asm/bug.h #define __EMIT_BUG(x) do { \ x 39 arch/s390/include/asm/bug.h : : "i" (x), \ x 54 arch/s390/include/asm/bug.h #define WARN_ON(x) ({ \ x 55 arch/s390/include/asm/bug.h int __ret_warn_on = !!(x); \ x 218 arch/s390/include/asm/ccwdev.h #define get_ccwdev_lock(x) (x)->ccwlock x 76 arch/s390/include/asm/ccwgroup.h #define to_ccwgroupdev(x) container_of((x), struct ccwgroup_device, dev) x 77 arch/s390/include/asm/ccwgroup.h #define to_ccwgroupdrv(x) container_of((x), struct ccwgroup_driver, driver) x 26 arch/s390/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 32 arch/s390/include/asm/cmpxchg.h } while (!__sync_bool_compare_and_swap(__ptr, __old, x)); \ x 400 arch/s390/include/asm/debug.h #define INTERNAL_ERRMSG(x,y...) "E" __FILE__ "%d: " x, __LINE__, y x 401 arch/s390/include/asm/debug.h #define INTERNAL_WRNMSG(x,y...) "W" __FILE__ "%d: " x, __LINE__, y x 402 arch/s390/include/asm/debug.h #define INTERNAL_INFMSG(x,y...) "I" __FILE__ "%d: " x, __LINE__, y x 403 arch/s390/include/asm/debug.h #define INTERNAL_DEBMSG(x,y...) "D" __FILE__ "%d: " x, __LINE__, y x 406 arch/s390/include/asm/debug.h #define PRINT_DEBUG(x...) printk(KERN_DEBUG PRINTK_HEADER x) x 407 arch/s390/include/asm/debug.h #define PRINT_INFO(x...) printk(KERN_INFO PRINTK_HEADER x) x 408 arch/s390/include/asm/debug.h #define PRINT_WARN(x...) printk(KERN_WARNING PRINTK_HEADER x) x 409 arch/s390/include/asm/debug.h #define PRINT_ERR(x...) printk(KERN_ERR PRINTK_HEADER x) x 410 arch/s390/include/asm/debug.h #define PRINT_FATAL(x...) panic(PRINTK_HEADER x) x 412 arch/s390/include/asm/debug.h #define PRINT_DEBUG(x...) printk(KERN_DEBUG PRINTK_HEADER x) x 413 arch/s390/include/asm/debug.h #define PRINT_INFO(x...) printk(KERN_DEBUG PRINTK_HEADER x) x 414 arch/s390/include/asm/debug.h #define PRINT_WARN(x...) printk(KERN_DEBUG PRINTK_HEADER x) x 415 arch/s390/include/asm/debug.h #define PRINT_ERR(x...) printk(KERN_DEBUG PRINTK_HEADER x) x 416 arch/s390/include/asm/debug.h #define PRINT_FATAL(x...) printk(KERN_DEBUG PRINTK_HEADER x) x 154 arch/s390/include/asm/elf.h #define elf_check_arch(x) \ x 155 arch/s390/include/asm/elf.h (((x)->e_machine == EM_S390 || (x)->e_machine == EM_S390_OLD) \ x 156 arch/s390/include/asm/elf.h && (x)->e_ident[EI_CLASS] == ELF_CLASS) x 157 arch/s390/include/asm/elf.h #define compat_elf_check_arch(x) \ x 158 arch/s390/include/asm/elf.h (((x)->e_machine == EM_S390 || (x)->e_machine == EM_S390_OLD) \ x 159 arch/s390/include/asm/elf.h && (x)->e_ident[EI_CLASS] == ELF_CLASS) x 27 arch/s390/include/asm/extable.h static inline unsigned long extable_fixup(const struct exception_table_entry *x) x 29 arch/s390/include/asm/extable.h return (unsigned long)&x->fixup + x->fixup; x 19 arch/s390/include/asm/fcx.h #define TCW_FLAGS_TIDAW_FORMAT(x) ((x) & 3) << (23 - 9) x 20 arch/s390/include/asm/fcx.h #define TCW_FLAGS_GET_TIDAW_FORMAT(x) (((x) >> (23 - 9)) & 3) x 148 arch/s390/include/asm/fcx.h #define TSB_FLAGS_FORMAT(x) ((x) & 7) x 17 arch/s390/include/asm/hardirq.h #define set_softirq_pending(x) (S390_lowcore.softirq_pending = (x)) x 18 arch/s390/include/asm/hardirq.h #define or_softirq_pending(x) (S390_lowcore.softirq_pending |= (x)) x 88 arch/s390/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 89 arch/s390/include/asm/page.h #define pgste_val(x) ((x).pgste) x 90 arch/s390/include/asm/page.h #define pte_val(x) ((x).pte) x 91 arch/s390/include/asm/page.h #define pmd_val(x) ((x).pmd) x 92 arch/s390/include/asm/page.h #define pud_val(x) ((x).pud) x 93 arch/s390/include/asm/page.h #define p4d_val(x) ((x).p4d) x 94 arch/s390/include/asm/page.h #define pgd_val(x) ((x).pgd) x 96 arch/s390/include/asm/page.h #define __pgste(x) ((pgste_t) { (x) } ) x 97 arch/s390/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 98 arch/s390/include/asm/page.h #define __pmd(x) ((pmd_t) { (x) } ) x 99 arch/s390/include/asm/page.h #define __pud(x) ((pud_t) { (x) } ) x 100 arch/s390/include/asm/page.h #define __p4d(x) ((p4d_t) { (x) } ) x 101 arch/s390/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 102 arch/s390/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 161 arch/s390/include/asm/page.h #define __pa(x) ((unsigned long)(x)) x 162 arch/s390/include/asm/page.h #define __va(x) ((void *)(unsigned long)(x)) x 1288 arch/s390/include/asm/pgtable.h #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT) x 1289 arch/s390/include/asm/pgtable.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 1678 arch/s390/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 87 arch/s390/include/asm/scsw.h u32 x:1; x 227 arch/s390/include/asm/scsw.h return css_general_characteristics.fcx && (scsw->tm.x == 1); x 76 arch/s390/include/asm/string.h #define __no_sanitize_prefix_strfunc(x) __##x x 83 arch/s390/include/asm/string.h #define __no_sanitize_prefix_strfunc(x) x x 32 arch/s390/include/asm/syscall_wrapper.h #define __S390_SYS_STUBx(x, name, ...) \ x 33 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __s390_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__))\ x 35 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __s390_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__))\ x 37 arch/s390/include/asm/syscall_wrapper.h long ret = __s390x_sys##name(__MAP(x,__SC_COMPAT_CAST,__VA_ARGS__));\ x 38 arch/s390/include/asm/syscall_wrapper.h __MAP(x,__SC_TEST,__VA_ARGS__); \ x 68 arch/s390/include/asm/syscall_wrapper.h #define COMPAT_SYSCALL_DEFINEx(x, name, ...) \ x 72 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __s390_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \ x 73 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __s390_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) \ x 76 arch/s390/include/asm/syscall_wrapper.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__));\ x 77 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 78 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 80 arch/s390/include/asm/syscall_wrapper.h long ret = __do_compat_sys##name(__MAP(x,__SC_DELOUSE,__VA_ARGS__));\ x 81 arch/s390/include/asm/syscall_wrapper.h __MAP(x,__SC_TEST,__VA_ARGS__); \ x 85 arch/s390/include/asm/syscall_wrapper.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 100 arch/s390/include/asm/syscall_wrapper.h #define __S390_SYS_STUBx(x, fullname, name, ...) x 116 arch/s390/include/asm/syscall_wrapper.h #define __SYSCALL_DEFINEx(x, name, ...) \ x 120 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __s390x_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) \ x 123 arch/s390/include/asm/syscall_wrapper.h long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 124 arch/s390/include/asm/syscall_wrapper.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \ x 125 arch/s390/include/asm/syscall_wrapper.h __S390_SYS_STUBx(x, name, __VA_ARGS__) \ x 126 arch/s390/include/asm/syscall_wrapper.h asmlinkage long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 128 arch/s390/include/asm/syscall_wrapper.h long ret = __do_sys##name(__MAP(x,__SC_CAST,__VA_ARGS__)); \ x 129 arch/s390/include/asm/syscall_wrapper.h __MAP(x,__SC_TEST,__VA_ARGS__); \ x 133 arch/s390/include/asm/syscall_wrapper.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 86 arch/s390/include/asm/uaccess.h static __always_inline int __put_user_fn(void *x, void __user *ptr, unsigned long size) x 94 arch/s390/include/asm/uaccess.h (unsigned char *)x, x 99 arch/s390/include/asm/uaccess.h (unsigned short *)x, x 104 arch/s390/include/asm/uaccess.h (unsigned int *)x, x 109 arch/s390/include/asm/uaccess.h (unsigned long *)x, x 116 arch/s390/include/asm/uaccess.h static __always_inline int __get_user_fn(void *x, const void __user *ptr, unsigned long size) x 123 arch/s390/include/asm/uaccess.h rc = __put_get_user_asm((unsigned char *)x, x 128 arch/s390/include/asm/uaccess.h rc = __put_get_user_asm((unsigned short *)x, x 133 arch/s390/include/asm/uaccess.h rc = __put_get_user_asm((unsigned int *)x, x 138 arch/s390/include/asm/uaccess.h rc = __put_get_user_asm((unsigned long *)x, x 148 arch/s390/include/asm/uaccess.h static inline int __put_user_fn(void *x, void __user *ptr, unsigned long size) x 150 arch/s390/include/asm/uaccess.h size = raw_copy_to_user(ptr, x, size); x 154 arch/s390/include/asm/uaccess.h static inline int __get_user_fn(void *x, const void __user *ptr, unsigned long size) x 156 arch/s390/include/asm/uaccess.h size = raw_copy_from_user(x, ptr, size); x 166 arch/s390/include/asm/uaccess.h #define __put_user(x, ptr) \ x 168 arch/s390/include/asm/uaccess.h __typeof__(*(ptr)) __x = (x); \ x 186 arch/s390/include/asm/uaccess.h #define put_user(x, ptr) \ x 189 arch/s390/include/asm/uaccess.h __put_user(x, ptr); \ x 195 arch/s390/include/asm/uaccess.h #define __get_user(x, ptr) \ x 204 arch/s390/include/asm/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 211 arch/s390/include/asm/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 218 arch/s390/include/asm/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 225 arch/s390/include/asm/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 235 arch/s390/include/asm/uaccess.h #define get_user(x, ptr) \ x 238 arch/s390/include/asm/uaccess.h __get_user(x, ptr); \ x 43 arch/s390/include/uapi/asm/runtime_instr.h __u32 x : 1; x 52 arch/s390/include/uapi/asm/tape390.h #define TAPE390_CRYPT_SUPPORTED(x) \ x 53 arch/s390/include/uapi/asm/tape390.h ((x.capability & TAPE390_CRYPT_SUPPORTED_MASK)) x 57 arch/s390/include/uapi/asm/tape390.h #define TAPE390_CRYPT_ON(x) (((x.status) & TAPE390_CRYPT_ON_MASK)) x 62 arch/s390/include/uapi/asm/tape390.h #define TAPE390_MEDIUM_ENCRYPTED(x) \ x 63 arch/s390/include/uapi/asm/tape390.h (((x.medium_status) & TAPE390_MEDIUM_ENCRYPTED_MASK)) x 64 arch/s390/include/uapi/asm/tape390.h #define TAPE390_MEDIUM_LOADED(x) \ x 65 arch/s390/include/uapi/asm/tape390.h (((x.medium_status) & TAPE390_MEDIUM_LOADED_MASK)) x 24 arch/s390/kernel/crash_dump.c #define PTR_ADD(x, y) (((char *) (x)) + ((unsigned long) (y))) x 25 arch/s390/kernel/crash_dump.c #define PTR_SUB(x, y) (((char *) (x)) - ((unsigned long) (y))) x 26 arch/s390/kernel/crash_dump.c #define PTR_DIFF(x, y) ((unsigned long)(((char *) (x)) - ((unsigned long) (y)))) x 27 arch/s390/kvm/gaccess.c unsigned long x : 1; /* Space-Switch-Event Control */ x 92 arch/s390/kvm/gaccess.h #define put_guest_lc(vcpu, x, gra) \ x 95 arch/s390/kvm/gaccess.h __typeof__(*(gra)) __x = (x); \ x 59 arch/s390/kvm/kvm-s390.c #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU x 60 arch/s390/kvm/kvm-s390.c #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM x 104 arch/s390/lib/uaccess.c static inline unsigned long copy_from_user_mvcos(void *x, const void __user *ptr, x 129 arch/s390/lib/uaccess.c : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) x 134 arch/s390/lib/uaccess.c static inline unsigned long copy_from_user_mvcp(void *x, const void __user *ptr, x 165 arch/s390/lib/uaccess.c : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) x 179 arch/s390/lib/uaccess.c static inline unsigned long copy_to_user_mvcos(void __user *ptr, const void *x, x 204 arch/s390/lib/uaccess.c : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) x 209 arch/s390/lib/uaccess.c static inline unsigned long copy_to_user_mvcs(void __user *ptr, const void *x, x 240 arch/s390/lib/uaccess.c : "+a" (size), "+a" (ptr), "+a" (x), "+a" (tmp1), "=a" (tmp2) x 22 arch/s390/mm/hugetlbpage.c #define move_set_bit(x, a, b) (((x) & (a)) >> ilog2(a) << ilog2(b)) x 23 arch/s390/mm/kasan_init.c #define __sha(x) ((unsigned long)kasan_mem_to_shadow((void *)x)) x 21 arch/sh/boards/mach-cayman/panic.c static void show_value(unsigned long x) x 26 arch/sh/boards/mach-cayman/panic.c nibble = ((x >> (i * 4)) & 0xf); x 58 arch/sh/boards/mach-microdev/fdc37c93xapm.c #define MSB(x) ( (x) >> 8 ) x 59 arch/sh/boards/mach-microdev/fdc37c93xapm.c #define LSB(x) ( (x) & 0xff ) x 98 arch/sh/boot/compressed/misc.c static void error(char *x) x 101 arch/sh/boot/compressed/misc.c puts(x); x 32 arch/sh/drivers/pci/fixups-se7751.c #define PCIC_WRITE(x,v) writel((v), PCI_REG(x)) x 33 arch/sh/drivers/pci/fixups-se7751.c #define PCIC_READ(x) readl(PCI_REG(x)) x 83 arch/sh/drivers/pci/pci-sh5.h #define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x)) x 103 arch/sh/drivers/pci/pci-sh5.h #define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18) x 104 arch/sh/drivers/pci/pci-sh5.h #define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18) x 34 arch/sh/drivers/pci/pci-sh7780.h #define SH7780_PCIMBR(x) (0x1E0 + ((x) * 8)) x 35 arch/sh/drivers/pci/pci-sh7780.h #define SH7780_PCIMBMR(x) (0x1E4 + ((x) * 8)) x 132 arch/sh/drivers/pci/pcie-sh7786.h #define SH4A_PCIERSTR(x) (0x008000 + ((x) * 0x4)) /* R/W - 0x0000 0000 32 */ x 261 arch/sh/drivers/pci/pcie-sh7786.h #define SH4A_PCIEEHR(x) (0x020010 + ((x) * 0x4)) /* R - 0x0000 0000 32 */ x 359 arch/sh/drivers/pci/pcie-sh7786.h #define SH4A_PCIEPARL(x) (0x020400 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */ x 364 arch/sh/drivers/pci/pcie-sh7786.h #define SH4A_PCIEPARH(x) (0x020404 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */ x 369 arch/sh/drivers/pci/pcie-sh7786.h #define SH4A_PCIEPAMR(x) (0x020408 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */ x 374 arch/sh/drivers/pci/pcie-sh7786.h #define SH4A_PCIEPTCTLR(x) (0x02040C + ((x) * 0x20)) x 563 arch/sh/drivers/pci/pcie-sh7786.h #define PCI_REG(x) ((x) + 0x40000) x 68 arch/sh/include/asm/bug.h #define WARN_ON(x) ({ \ x 69 arch/sh/include/asm/bug.h int __ret_warn_on = !!(x); \ x 93 arch/sh/include/asm/bug.h #define UNWINDER_BUG_ON(x) ({ \ x 94 arch/sh/include/asm/bug.h int __ret_unwinder_on = !!(x); \ x 18 arch/sh/include/asm/cmpxchg-xchg.h static inline u32 __xchg_cmpxchg(volatile void *ptr, u32 x, int size) x 34 arch/sh/include/asm/cmpxchg-xchg.h newv = (oldv & ~bitmask) | (x << bitoff); x 25 arch/sh/include/asm/cmpxchg.h #define __xchg(ptr, x, size) \ x 31 arch/sh/include/asm/cmpxchg.h __xchg__res = xchg_u32(__xchg_ptr, x); \ x 34 arch/sh/include/asm/cmpxchg.h __xchg__res = xchg_u16(__xchg_ptr, x); \ x 37 arch/sh/include/asm/cmpxchg.h __xchg__res = xchg_u8(__xchg_ptr, x); \ x 41 arch/sh/include/asm/cmpxchg.h __xchg__res = x; \ x 48 arch/sh/include/asm/cmpxchg.h #define xchg(ptr,x) \ x 49 arch/sh/include/asm/cmpxchg.h ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) x 97 arch/sh/include/asm/elf.h #define elf_check_arch(x) ((x)->e_machine == EM_SH) x 98 arch/sh/include/asm/elf.h #define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) x 99 arch/sh/include/asm/elf.h #define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) x 201 arch/sh/include/asm/elf.h #define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x)) x 18 arch/sh/include/asm/hd64461.h #define HD64461_IO_OFFSET(x) (HD64461_IOBASE + (x)) x 23 arch/sh/include/asm/io_noioport.h static inline void outb(unsigned char x, unsigned long port) x 28 arch/sh/include/asm/io_noioport.h static inline void outw(unsigned short x, unsigned long port) x 33 arch/sh/include/asm/io_noioport.h static inline void outl(unsigned int x, unsigned long port) x 52 arch/sh/include/asm/io_noioport.h #define outb_p(x, addr) outb((x), (addr)) x 53 arch/sh/include/asm/io_noioport.h #define outw_p(x, addr) outw((x), (addr)) x 54 arch/sh/include/asm/io_noioport.h #define outl_p(x, addr) outl((x), (addr)) x 81 arch/sh/include/asm/page.h #define pte_val(x) \ x 82 arch/sh/include/asm/page.h ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) x 83 arch/sh/include/asm/page.h #define __pte(x) \ x 84 arch/sh/include/asm/page.h ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) x 89 arch/sh/include/asm/page.h #define pte_val(x) ((x).pte_low) x 90 arch/sh/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 95 arch/sh/include/asm/page.h #define pte_val(x) ((x).pte_low) x 96 arch/sh/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 99 arch/sh/include/asm/page.h #define pgd_val(x) ((x).pgd) x 100 arch/sh/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 102 arch/sh/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 103 arch/sh/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 107 arch/sh/include/asm/page.h #define pte_pgprot(x) __pgprot(pte_val(x) & PTE_FLAGS_MASK) x 143 arch/sh/include/asm/page.h #define ___pa(x) ((x)-PAGE_OFFSET+__MEMORY_START) x 144 arch/sh/include/asm/page.h #define ___va(x) ((x)+PAGE_OFFSET-__MEMORY_START) x 146 arch/sh/include/asm/page.h #define ___pa(x) ((x)-PAGE_OFFSET) x 147 arch/sh/include/asm/page.h #define ___va(x) ((x)+PAGE_OFFSET) x 151 arch/sh/include/asm/page.h #define __pa(x) ___pa((unsigned long)x) x 152 arch/sh/include/asm/page.h #define __va(x) (void *)___va((unsigned long)x) x 33 arch/sh/include/asm/pgtable-3level.h #define pmd_val(x) ((x).pmd) x 34 arch/sh/include/asm/pgtable-3level.h #define __pmd(x) ((pmd_t) { (x) } ) x 50 arch/sh/include/asm/pgtable-3level.h #define pud_none(x) (!pud_val(x)) x 51 arch/sh/include/asm/pgtable-3level.h #define pud_present(x) (pud_val(x)) x 53 arch/sh/include/asm/pgtable-3level.h #define pud_bad(x) (pud_val(x) & ~PAGE_MASK) x 124 arch/sh/include/asm/pgtable.h #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) x 75 arch/sh/include/asm/pgtable_32.h #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) x 97 arch/sh/include/asm/pgtable_32.h static inline unsigned long copy_ptea_attributes(unsigned long x) x 99 arch/sh/include/asm/pgtable_32.h return ((x >> 28) & 0xe) | (x & 0x1); x 323 arch/sh/include/asm/pgtable_32.h #define pte_none(x) (!pte_val(x)) x 324 arch/sh/include/asm/pgtable_32.h #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) x 328 arch/sh/include/asm/pgtable_32.h #define pmd_none(x) (!pmd_val(x)) x 329 arch/sh/include/asm/pgtable_32.h #define pmd_present(x) (pmd_val(x)) x 331 arch/sh/include/asm/pgtable_32.h #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) x 333 arch/sh/include/asm/pgtable_32.h #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) x 334 arch/sh/include/asm/pgtable_32.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 461 arch/sh/include/asm/pgtable_32.h #define __swp_type(x) ((x).val & 0x1f) x 462 arch/sh/include/asm/pgtable_32.h #define __swp_offset(x) ((x).val >> 5) x 465 arch/sh/include/asm/pgtable_32.h #define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) x 468 arch/sh/include/asm/pgtable_32.h #define __swp_type(x) ((x).val & 0xff) x 469 arch/sh/include/asm/pgtable_32.h #define __swp_offset(x) ((x).val >> 10) x 473 arch/sh/include/asm/pgtable_32.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) x 34 arch/sh/include/asm/pgtable_64.h unsigned long long x = ((unsigned long long) pteval.pte_low); x 39 arch/sh/include/asm/pgtable_64.h *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x; x 118 arch/sh/include/asm/pgtable_64.h #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) x 203 arch/sh/include/asm/pgtable_64.h #define pgprot_noncached(x) __pgprot(((x).pgprot & ~(_PAGE_CACHABLE)) | _PAGE_DEVICE) x 226 arch/sh/include/asm/pgtable_64.h #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) x 228 arch/sh/include/asm/pgtable_64.h #define pte_none(x) (pte_val(x) == _PTE_EMPTY) x 240 arch/sh/include/asm/pgtable_64.h #define pte_pagenr(x) (((unsigned long) (pte_val(x)) - \ x 246 arch/sh/include/asm/pgtable_64.h #define pte_page(x) (mem_map + pte_pagenr(x)) x 251 arch/sh/include/asm/pgtable_64.h #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) x 296 arch/sh/include/asm/pgtable_64.h #define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c)) x 297 arch/sh/include/asm/pgtable_64.h #define __swp_offset(x) ((x).val >> 8) x 300 arch/sh/include/asm/pgtable_64.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 195 arch/sh/include/asm/processor_32.h static inline void prefetch(const void *x) x 197 arch/sh/include/asm/processor_32.h __builtin_prefetch(x, 0, 3); x 200 arch/sh/include/asm/processor_32.h static inline void prefetchw(const void *x) x 202 arch/sh/include/asm/processor_32.h __builtin_prefetch(x, 1, 3); x 31 arch/sh/include/asm/segment.h #define set_fs(x) (current_thread_info()->addr_limit = (x)) x 23 arch/sh/include/asm/sh7760fb.h #define LDPR(x) (((x) << 2)) x 125 arch/sh/include/asm/sh7760fb.h #define LDICKR_CLKSRC(x) \ x 126 arch/sh/include/asm/sh7760fb.h (((x) & 3) << 12) x 129 arch/sh/include/asm/sh7760fb.h #define LDICKR_CLKDIV(x) \ x 130 arch/sh/include/asm/sh7760fb.h ((x) & 0x1f) x 162 arch/sh/include/asm/smc37c93x.h #define UART_BAUD(x) (UART_CLK / (16 * (x))) x 26 arch/sh/include/asm/spinlock-cas.h #define arch_spin_is_locked(x) ((x)->lock <= 0) x 18 arch/sh/include/asm/spinlock-llsc.h #define arch_spin_is_locked(x) ((x)->lock <= 0) x 30 arch/sh/include/asm/suspend.h #define SH_MOBILE_PRE(x) (x) x 31 arch/sh/include/asm/suspend.h #define SH_MOBILE_POST(x) (-(x)) x 42 arch/sh/include/asm/uaccess.h #define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) x 43 arch/sh/include/asm/uaccess.h #define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) x 50 arch/sh/include/asm/uaccess.h #define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) x 51 arch/sh/include/asm/uaccess.h #define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 54 arch/sh/include/asm/uaccess.h #define __m(x) (*(struct __large_struct __user *)(x)) x 56 arch/sh/include/asm/uaccess.h #define __get_user_nocheck(x,ptr,size) \ x 63 arch/sh/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 67 arch/sh/include/asm/uaccess.h #define __get_user_check(x,ptr,size) \ x 74 arch/sh/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 78 arch/sh/include/asm/uaccess.h #define __put_user_nocheck(x,ptr,size) \ x 82 arch/sh/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = x; \ x 88 arch/sh/include/asm/uaccess.h #define __put_user_check(x,ptr,size) \ x 92 arch/sh/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = x; \ x 16 arch/sh/include/asm/uaccess_32.h #define __get_user_size(x,ptr,size,retval) \ x 21 arch/sh/include/asm/uaccess_32.h __get_user_asm(x, ptr, retval, "b"); \ x 24 arch/sh/include/asm/uaccess_32.h __get_user_asm(x, ptr, retval, "w"); \ x 27 arch/sh/include/asm/uaccess_32.h __get_user_asm(x, ptr, retval, "l"); \ x 36 arch/sh/include/asm/uaccess_32.h #define __get_user_asm(x, addr, err, insn) \ x 54 arch/sh/include/asm/uaccess_32.h :"=&r" (err), "=&r" (x) \ x 57 arch/sh/include/asm/uaccess_32.h #define __get_user_asm(x, addr, err, insn) \ x 61 arch/sh/include/asm/uaccess_32.h : "=&r" (x) \ x 69 arch/sh/include/asm/uaccess_32.h #define __put_user_size(x,ptr,size,retval) \ x 74 arch/sh/include/asm/uaccess_32.h __put_user_asm(x, ptr, retval, "b"); \ x 77 arch/sh/include/asm/uaccess_32.h __put_user_asm(x, ptr, retval, "w"); \ x 80 arch/sh/include/asm/uaccess_32.h __put_user_asm(x, ptr, retval, "l"); \ x 83 arch/sh/include/asm/uaccess_32.h __put_user_u64(x, ptr, retval); \ x 91 arch/sh/include/asm/uaccess_32.h #define __put_user_asm(x, addr, err, insn) \ x 109 arch/sh/include/asm/uaccess_32.h : "r" (x), "m" (__m(addr)), "i" (-EFAULT), \ x 115 arch/sh/include/asm/uaccess_32.h #define __put_user_asm(x, addr, err, insn) \ x 120 arch/sh/include/asm/uaccess_32.h : "r" (x), "m" (__m(addr)) \ x 21 arch/sh/include/asm/uaccess_64.h #define __get_user_size(x,ptr,size,retval) \ x 24 arch/sh/include/asm/uaccess_64.h x = 0; \ x 27 arch/sh/include/asm/uaccess_64.h retval = __get_user_asm_b((void *)&x, \ x 31 arch/sh/include/asm/uaccess_64.h retval = __get_user_asm_w((void *)&x, \ x 35 arch/sh/include/asm/uaccess_64.h retval = __get_user_asm_l((void *)&x, \ x 39 arch/sh/include/asm/uaccess_64.h retval = __get_user_asm_q((void *)&x, \ x 54 arch/sh/include/asm/uaccess_64.h #define __put_user_size(x,ptr,size,retval) \ x 59 arch/sh/include/asm/uaccess_64.h retval = __put_user_asm_b((void *)&x, \ x 63 arch/sh/include/asm/uaccess_64.h retval = __put_user_asm_w((void *)&x, \ x 67 arch/sh/include/asm/uaccess_64.h retval = __put_user_asm_l((void *)&x, \ x 71 arch/sh/include/asm/uaccess_64.h retval = __put_user_asm_q((void *)&x, \ x 26 arch/sh/include/cpu-sh4/cpu/fpu.h #define FPSCR_ROUNDING_MODE(x) ((x >> 20) & 3) x 81 arch/sh/include/cpu-sh5/cpu/registers.h #define __str(x) #x x 24 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabb(x) (x) x 25 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabb(x) (x) x 26 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabw(x) le16_to_cpu(x) x 27 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabw(x) (x) x 28 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabl(x) le32_to_cpu(x) x 29 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabl(x) (x) x 30 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabq(x) le64_to_cpu(x) x 31 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabq(x) (x) x 35 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabb(x) (x) x 36 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabb(x) (x) x 37 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabw(x) (x) x 38 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabw(x) cpu_to_le16(x) x 39 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabl(x) (x) x 40 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabl(x) cpu_to_le32(x) x 41 arch/sh/include/mach-common/mach/mangle-port.h # define ioswabq(x) (x) x 42 arch/sh/include/mach-common/mach/mangle-port.h # define __mem_ioswabq(x) cpu_to_le32(x) x 28 arch/sh/include/mach-common/mach/microdev.h #define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ x 13 arch/sh/include/uapi/asm/swab.h static inline __attribute_const__ __u32 __arch_swab32(__u32 x) x 24 arch/sh/include/uapi/asm/swab.h : "=r" (x) x 25 arch/sh/include/uapi/asm/swab.h : "r" (x)); x 27 arch/sh/include/uapi/asm/swab.h return x; x 31 arch/sh/include/uapi/asm/swab.h static inline __attribute_const__ __u16 __arch_swab16(__u16 x) x 40 arch/sh/include/uapi/asm/swab.h : "=r" (x) x 41 arch/sh/include/uapi/asm/swab.h : "r" (x)); x 43 arch/sh/include/uapi/asm/swab.h return x; x 42 arch/sh/kernel/cpu/init.c #define onchip_setup(x) \ x 43 arch/sh/kernel/cpu/init.c static int x##_disabled = !cpu_has_##x; \ x 45 arch/sh/kernel/cpu/init.c static int x##_setup(char *opts) \ x 47 arch/sh/kernel/cpu/init.c x##_disabled = 1; \ x 50 arch/sh/kernel/cpu/init.c __setup("no" __stringify(x), x##_setup); x 127 arch/sh/kernel/cpu/sh2a/fpu.c static void mult64(unsigned long long x, unsigned long long y, x 133 arch/sh/kernel/cpu/sh2a/fpu.c sub0 = (x >> 32) * (unsigned long) (y >> 32); x 134 arch/sh/kernel/cpu/sh2a/fpu.c sub1 = (x & 0xffffffffLL) * (unsigned long) (y >> 32); x 135 arch/sh/kernel/cpu/sh2a/fpu.c sub2 = (x >> 32) * (unsigned long) (y & 0xffffffffLL); x 136 arch/sh/kernel/cpu/sh2a/fpu.c sub3 = (x & 0xffffffffLL) * (unsigned long) (y & 0xffffffffLL); x 380 arch/sh/kernel/cpu/sh2a/fpu.c unsigned long x = fpu->fpul; x 383 arch/sh/kernel/cpu/sh2a/fpu.c if (x != 0 && (x & 0x7f800000) == 0) { x 384 arch/sh/kernel/cpu/sh2a/fpu.c du = (x & 0x80000000); x 385 arch/sh/kernel/cpu/sh2a/fpu.c while ((x & 0x00800000) == 0) { x 386 arch/sh/kernel/cpu/sh2a/fpu.c x <<= 1; x 389 arch/sh/kernel/cpu/sh2a/fpu.c x &= 0x007fffff; x 390 arch/sh/kernel/cpu/sh2a/fpu.c du |= (exp << 20) | (x >> 3); x 391 arch/sh/kernel/cpu/sh2a/fpu.c dl = x << 29; x 149 arch/sh/kernel/cpu/sh4/fpu.c unsigned long x = fpu->fpul; x 152 arch/sh/kernel/cpu/sh4/fpu.c if (x != 0 && (x & 0x7f800000) == 0) { x 153 arch/sh/kernel/cpu/sh4/fpu.c du = (x & 0x80000000); x 154 arch/sh/kernel/cpu/sh4/fpu.c while ((x & 0x00800000) == 0) { x 155 arch/sh/kernel/cpu/sh4/fpu.c x <<= 1; x 158 arch/sh/kernel/cpu/sh4/fpu.c x &= 0x007fffff; x 159 arch/sh/kernel/cpu/sh4/fpu.c du |= (exp << 20) | (x >> 3); x 160 arch/sh/kernel/cpu/sh4/fpu.c dl = x << 29; x 84 arch/sh/kernel/cpu/sh4/perf_event.c #define C(x) PERF_COUNT_HW_CACHE_##x x 109 arch/sh/kernel/cpu/sh4a/perf_event.c #define C(x) PERF_COUNT_HW_CACHE_##x x 32 arch/sh/kernel/cpu/sh4a/smp-shx3.c unsigned int x; x 34 arch/sh/kernel/cpu/sh4a/smp-shx3.c x = __raw_readl(0xfe410070 + offs); /* C0INITICI..CnINTICI */ x 35 arch/sh/kernel/cpu/sh4a/smp-shx3.c x &= (1 << (message << 2)); x 36 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */ x 24 arch/sh/kernel/kprobes.c #define OPCODE_JMP(x) (((x) & 0xF0FF) == 0x402b) x 25 arch/sh/kernel/kprobes.c #define OPCODE_JSR(x) (((x) & 0xF0FF) == 0x400b) x 26 arch/sh/kernel/kprobes.c #define OPCODE_BRA(x) (((x) & 0xF000) == 0xa000) x 27 arch/sh/kernel/kprobes.c #define OPCODE_BRAF(x) (((x) & 0xF0FF) == 0x0023) x 28 arch/sh/kernel/kprobes.c #define OPCODE_BSR(x) (((x) & 0xF000) == 0xb000) x 29 arch/sh/kernel/kprobes.c #define OPCODE_BSRF(x) (((x) & 0xF0FF) == 0x0003) x 31 arch/sh/kernel/kprobes.c #define OPCODE_BF_S(x) (((x) & 0xFF00) == 0x8f00) x 32 arch/sh/kernel/kprobes.c #define OPCODE_BT_S(x) (((x) & 0xFF00) == 0x8d00) x 34 arch/sh/kernel/kprobes.c #define OPCODE_BF(x) (((x) & 0xFF00) == 0x8b00) x 35 arch/sh/kernel/kprobes.c #define OPCODE_BT(x) (((x) & 0xFF00) == 0x8900) x 37 arch/sh/kernel/kprobes.c #define OPCODE_RTS(x) (((x) & 0x000F) == 0x000b) x 38 arch/sh/kernel/kprobes.c #define OPCODE_RTE(x) (((x) & 0xFFFF) == 0x002b) x 120 arch/sh/kernel/signal_32.c #define COPY(x) err |= __get_user(regs->x, &sc->sc_##x) x 224 arch/sh/kernel/signal_32.c #define COPY(x) err |= __put_user(regs->x, &sc->sc_##x) x 208 arch/sh/kernel/signal_64.c #define COPY(x) err |= __get_user(regs->x, &sc->sc_##x) x 330 arch/sh/kernel/signal_64.c #define COPY(x) err |= __put_user(regs->x, &sc->sc_##x) x 137 arch/sh/kernel/traps_64.c unsigned short x; x 140 arch/sh/kernel/traps_64.c q = (unsigned char *) &x; x 145 arch/sh/kernel/traps_64.c *result = (__u64)(__s64) *(short *) &x; x 147 arch/sh/kernel/traps_64.c *result = (__u64) x; x 153 arch/sh/kernel/traps_64.c unsigned short x; x 156 arch/sh/kernel/traps_64.c q = (unsigned char *) &x; x 158 arch/sh/kernel/traps_64.c x = (__u16) value; x 65 arch/sh/math-emu/math.c #define BOTH_PRmn(op,x) \ x 66 arch/sh/math-emu/math.c FP_DECL_EX; if(FPSCR_PR) op(D,x,DRm,DRn); else op(S,x,FRm,FRn); x 152 arch/sh/math-emu/math.c #define FMOV_EXT(x) if(x&1) x+=16-1 x 401 arch/sh/math-emu/math.c static int id_fxfd(struct sh_fpu_soft_struct *fregs, int x) x 404 arch/sh/math-emu/math.c switch (x & 3) { x 406 arch/sh/math-emu/math.c fxchg(fregs, flag[x >> 2]); x 409 arch/sh/math-emu/math.c ftrv(fregs, x - 1); x 412 arch/sh/math-emu/math.c fsca(fregs, x); x 418 arch/sh/math-emu/math.c id_fnxd(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int x, int n) x 420 arch/sh/math-emu/math.c return (fnxd[x])(fregs, n); x 426 arch/sh/math-emu/math.c int n = (code >> 8) & 0xf, m = (code >> 4) & 0xf, x = code & 0xf; x 427 arch/sh/math-emu/math.c return (fnmx[x])(fregs, regs, m, n); x 480 arch/sh/math-emu/math.c unsigned long x = fpu->fpul; x 483 arch/sh/math-emu/math.c if (x != 0 && (x & 0x7f800000) == 0) { x 484 arch/sh/math-emu/math.c du = (x & 0x80000000); x 485 arch/sh/math-emu/math.c while ((x & 0x00800000) == 0) { x 486 arch/sh/math-emu/math.c x <<= 1; x 489 arch/sh/math-emu/math.c x &= 0x007fffff; x 490 arch/sh/math-emu/math.c du |= (exp << 20) | (x >> 3); x 491 arch/sh/math-emu/math.c dl = x << 29; x 12 arch/sh/mm/pgtable.c void pgd_ctor(void *x) x 14 arch/sh/mm/pgtable.c pgd_t *pgd = x; x 49 arch/sparc/boot/piggyback.c static void st4(char *p, unsigned int x) x 51 arch/sparc/boot/piggyback.c p[0] = x >> 24; x 52 arch/sparc/boot/piggyback.c p[1] = x >> 16; x 53 arch/sparc/boot/piggyback.c p[2] = x >> 8; x 54 arch/sparc/boot/piggyback.c p[3] = x; x 7 arch/sparc/crypto/opcodes.h #define F3F(x,y,z) (((x)<<30)|((y)<<19)|((z)<<5)) x 9 arch/sparc/crypto/opcodes.h #define FPD_ENCODE(x) (((x) >> 5) | ((x) & ~(0x20))) x 11 arch/sparc/crypto/opcodes.h #define RS1(x) (FPD_ENCODE(x) << 14) x 12 arch/sparc/crypto/opcodes.h #define RS2(x) (FPD_ENCODE(x) << 0) x 13 arch/sparc/crypto/opcodes.h #define RS3(x) (FPD_ENCODE(x) << 9) x 14 arch/sparc/crypto/opcodes.h #define RD(x) (FPD_ENCODE(x) << 25) x 15 arch/sparc/crypto/opcodes.h #define IMM5_0(x) ((x) << 0) x 16 arch/sparc/crypto/opcodes.h #define IMM5_9(x) ((x) << 9) x 35 arch/sparc/include/asm/bitops_64.h int ffs(int x); x 18 arch/sparc/include/asm/cmpxchg_32.h static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) x 22 arch/sparc/include/asm/cmpxchg_32.h return __xchg_u32(ptr, x); x 25 arch/sparc/include/asm/cmpxchg_32.h return x; x 28 arch/sparc/include/asm/cmpxchg_32.h #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) x 55 arch/sparc/include/asm/cmpxchg_64.h #define xchg(ptr,x) \ x 58 arch/sparc/include/asm/cmpxchg_64.h __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))); \ x 90 arch/sparc/include/asm/cmpxchg_64.h static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, x 95 arch/sparc/include/asm/cmpxchg_64.h return xchg16(ptr, x); x 97 arch/sparc/include/asm/cmpxchg_64.h return xchg32(ptr, x); x 99 arch/sparc/include/asm/cmpxchg_64.h return xchg64(ptr, x); x 102 arch/sparc/include/asm/cmpxchg_64.h return x; x 99 arch/sparc/include/asm/elf_32.h #define elf_check_arch(x) ((x)->e_machine == EM_SPARC) x 180 arch/sparc/include/asm/elf_64.h #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) x 181 arch/sparc/include/asm/elf_64.h #define compat_elf_check_arch(x) ((x)->e_machine == EM_SPARC || \ x 182 arch/sparc/include/asm/elf_64.h (x)->e_machine == EM_SPARC32PLUS) x 82 arch/sparc/include/asm/floppy_32.h #define get_dma_residue(x) (0) x 75 arch/sparc/include/asm/floppy_64.h #define get_dma_residue(x) sun_fdops.get_dma_residue() x 42 arch/sparc/include/asm/leon.h #define LEON_HARD_INT(x) (1 << (x)) /* irq 0-15 */ x 81 arch/sparc/include/asm/leon.h #define LEON3_BYPASS_LOAD_PA(x) (leon_load_reg((unsigned long)(x))) x 82 arch/sparc/include/asm/leon.h #define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v))) x 83 arch/sparc/include/asm/leon.h #define LEON_BYPASS_LOAD_PA(x) leon_load_reg((unsigned long)(x)) x 84 arch/sparc/include/asm/leon.h #define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v)) x 253 arch/sparc/include/asm/leon.h #define PFN(x) ((x) >> PAGE_SHIFT) x 263 arch/sparc/include/asm/leon_amba.h #define amba_vendor(x) (((x) >> 24) & 0xff) x 265 arch/sparc/include/asm/leon_amba.h #define amba_device(x) (((x) >> 12) & 0xfff) x 11 arch/sparc/include/asm/mc146818rtc_32.h #define RTC_PORT(x) (0x70 + (x)) x 12 arch/sparc/include/asm/mc146818rtc_64.h #define RTC_PORT(x) (cmos_regs + (x)) x 63 arch/sparc/include/asm/page_32.h #define pte_val(x) ((x).pte) x 64 arch/sparc/include/asm/page_32.h #define iopte_val(x) ((x).iopte) x 65 arch/sparc/include/asm/page_32.h #define pmd_val(x) ((x).pmdv[0]) x 66 arch/sparc/include/asm/page_32.h #define pgd_val(x) ((x).pgd) x 67 arch/sparc/include/asm/page_32.h #define ctxd_val(x) ((x).ctxd) x 68 arch/sparc/include/asm/page_32.h #define pgprot_val(x) ((x).pgprot) x 69 arch/sparc/include/asm/page_32.h #define iopgprot_val(x) ((x).iopgprot) x 71 arch/sparc/include/asm/page_32.h #define __pte(x) ((pte_t) { (x) } ) x 72 arch/sparc/include/asm/page_32.h #define __pmd(x) ((pmd_t) { { (x) }, }) x 73 arch/sparc/include/asm/page_32.h #define __iopte(x) ((iopte_t) { (x) } ) x 74 arch/sparc/include/asm/page_32.h #define __pgd(x) ((pgd_t) { (x) } ) x 75 arch/sparc/include/asm/page_32.h #define __ctxd(x) ((ctxd_t) { (x) } ) x 76 arch/sparc/include/asm/page_32.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 77 arch/sparc/include/asm/page_32.h #define __iopgprot(x) ((iopgprot_t) { (x) } ) x 91 arch/sparc/include/asm/page_32.h #define pte_val(x) (x) x 92 arch/sparc/include/asm/page_32.h #define iopte_val(x) (x) x 93 arch/sparc/include/asm/page_32.h #define pmd_val(x) ((x).pmdv[0]) x 94 arch/sparc/include/asm/page_32.h #define pgd_val(x) (x) x 95 arch/sparc/include/asm/page_32.h #define ctxd_val(x) (x) x 96 arch/sparc/include/asm/page_32.h #define pgprot_val(x) (x) x 97 arch/sparc/include/asm/page_32.h #define iopgprot_val(x) (x) x 99 arch/sparc/include/asm/page_32.h #define __pte(x) (x) x 100 arch/sparc/include/asm/page_32.h #define __pmd(x) ((pmd_t) { { (x) }, }) x 101 arch/sparc/include/asm/page_32.h #define __iopte(x) (x) x 102 arch/sparc/include/asm/page_32.h #define __pgd(x) (x) x 103 arch/sparc/include/asm/page_32.h #define __ctxd(x) (x) x 104 arch/sparc/include/asm/page_32.h #define __pgprot(x) (x) x 105 arch/sparc/include/asm/page_32.h #define __iopgprot(x) (x) x 115 arch/sparc/include/asm/page_32.h #define __pgprot(x) (x) x 124 arch/sparc/include/asm/page_32.h #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + phys_base) x 125 arch/sparc/include/asm/page_32.h #define __va(x) ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET)) x 76 arch/sparc/include/asm/page_64.h #define pte_val(x) ((x).pte) x 77 arch/sparc/include/asm/page_64.h #define iopte_val(x) ((x).iopte) x 78 arch/sparc/include/asm/page_64.h #define pmd_val(x) ((x).pmd) x 79 arch/sparc/include/asm/page_64.h #define pud_val(x) ((x).pud) x 80 arch/sparc/include/asm/page_64.h #define pgd_val(x) ((x).pgd) x 81 arch/sparc/include/asm/page_64.h #define pgprot_val(x) ((x).pgprot) x 83 arch/sparc/include/asm/page_64.h #define __pte(x) ((pte_t) { (x) } ) x 84 arch/sparc/include/asm/page_64.h #define __iopte(x) ((iopte_t) { (x) } ) x 85 arch/sparc/include/asm/page_64.h #define __pmd(x) ((pmd_t) { (x) } ) x 86 arch/sparc/include/asm/page_64.h #define __pud(x) ((pud_t) { (x) } ) x 87 arch/sparc/include/asm/page_64.h #define __pgd(x) ((pgd_t) { (x) } ) x 88 arch/sparc/include/asm/page_64.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 99 arch/sparc/include/asm/page_64.h #define pte_val(x) (x) x 100 arch/sparc/include/asm/page_64.h #define iopte_val(x) (x) x 101 arch/sparc/include/asm/page_64.h #define pmd_val(x) (x) x 102 arch/sparc/include/asm/page_64.h #define pud_val(x) (x) x 103 arch/sparc/include/asm/page_64.h #define pgd_val(x) (x) x 104 arch/sparc/include/asm/page_64.h #define pgprot_val(x) (x) x 106 arch/sparc/include/asm/page_64.h #define __pte(x) (x) x 107 arch/sparc/include/asm/page_64.h #define __iopte(x) (x) x 108 arch/sparc/include/asm/page_64.h #define __pmd(x) (x) x 109 arch/sparc/include/asm/page_64.h #define __pud(x) (x) x 110 arch/sparc/include/asm/page_64.h #define __pgd(x) (x) x 111 arch/sparc/include/asm/page_64.h #define __pgprot(x) (x) x 147 arch/sparc/include/asm/page_64.h #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) x 148 arch/sparc/include/asm/page_64.h #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) x 15 arch/sparc/include/asm/percpu_64.h #define per_cpu_offset(x) (__per_cpu_offset(x)) x 123 arch/sparc/include/asm/pgtable_32.h static inline int srmmu_device_memory(unsigned long x) x 125 arch/sparc/include/asm/pgtable_32.h return ((x & 0xF0000000) != 0); x 370 arch/sparc/include/asm/pgtable_32.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 278 arch/sparc/include/asm/pgtable_64.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 1019 arch/sparc/include/asm/pgtable_64.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 225 arch/sparc/include/asm/processor_64.h static inline void prefetch(const void *x) x 235 arch/sparc/include/asm/processor_64.h : "r" (x)); x 238 arch/sparc/include/asm/processor_64.h static inline void prefetchw(const void *x) x 246 arch/sparc/include/asm/processor_64.h : "r" (x)); x 249 arch/sparc/include/asm/processor_64.h #define spin_lock_prefetch(x) prefetchw(x) x 82 arch/sparc/include/asm/uaccess_32.h #define put_user(x, ptr) ({ \ x 85 arch/sparc/include/asm/uaccess_32.h __put_user_check((__typeof__(*(ptr)))(x), __pu_addr, sizeof(*(ptr))); \ x 88 arch/sparc/include/asm/uaccess_32.h #define get_user(x, ptr) ({ \ x 91 arch/sparc/include/asm/uaccess_32.h __get_user_check((x), __gu_addr, sizeof(*(ptr)), __typeof__(*(ptr))); \ x 99 arch/sparc/include/asm/uaccess_32.h #define __put_user(x, ptr) \ x 100 arch/sparc/include/asm/uaccess_32.h __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 101 arch/sparc/include/asm/uaccess_32.h #define __get_user(x, ptr) \ x 102 arch/sparc/include/asm/uaccess_32.h __get_user_nocheck((x), (ptr), sizeof(*(ptr)), __typeof__(*(ptr))) x 105 arch/sparc/include/asm/uaccess_32.h #define __m(x) ((struct __large_struct __user *)(x)) x 107 arch/sparc/include/asm/uaccess_32.h #define __put_user_check(x, addr, size) ({ \ x 112 arch/sparc/include/asm/uaccess_32.h __put_user_asm(x, b, addr, __pu_ret); \ x 115 arch/sparc/include/asm/uaccess_32.h __put_user_asm(x, h, addr, __pu_ret); \ x 118 arch/sparc/include/asm/uaccess_32.h __put_user_asm(x, , addr, __pu_ret); \ x 121 arch/sparc/include/asm/uaccess_32.h __put_user_asm(x, d, addr, __pu_ret); \ x 133 arch/sparc/include/asm/uaccess_32.h #define __put_user_nocheck(x, addr, size) ({ \ x 136 arch/sparc/include/asm/uaccess_32.h case 1: __put_user_asm(x, b, addr, __pu_ret); break; \ x 137 arch/sparc/include/asm/uaccess_32.h case 2: __put_user_asm(x, h, addr, __pu_ret); break; \ x 138 arch/sparc/include/asm/uaccess_32.h case 4: __put_user_asm(x, , addr, __pu_ret); break; \ x 139 arch/sparc/include/asm/uaccess_32.h case 8: __put_user_asm(x, d, addr, __pu_ret); break; \ x 145 arch/sparc/include/asm/uaccess_32.h #define __put_user_asm(x, size, addr, ret) \ x 161 arch/sparc/include/asm/uaccess_32.h : "=&r" (ret) : "r" (x), "m" (*__m(addr)), \ x 166 arch/sparc/include/asm/uaccess_32.h #define __get_user_check(x, addr, size, type) ({ \ x 192 arch/sparc/include/asm/uaccess_32.h x = (__force type) __gu_val; \ x 196 arch/sparc/include/asm/uaccess_32.h #define __get_user_nocheck(x, addr, size, type) ({ \ x 209 arch/sparc/include/asm/uaccess_32.h x = (__force type) __gu_val; \ x 213 arch/sparc/include/asm/uaccess_32.h #define __get_user_asm(x, size, addr, ret) \ x 230 arch/sparc/include/asm/uaccess_32.h : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)), \ x 86 arch/sparc/include/asm/uaccess_64.h #define put_user(x, ptr) ({ \ x 89 arch/sparc/include/asm/uaccess_64.h __put_user_nocheck((__typeof__(*(ptr)))(x), __pu_addr, sizeof(*(ptr)));\ x 92 arch/sparc/include/asm/uaccess_64.h #define get_user(x, ptr) ({ \ x 95 arch/sparc/include/asm/uaccess_64.h __get_user_nocheck((x), __gu_addr, sizeof(*(ptr)), __typeof__(*(ptr)));\ x 98 arch/sparc/include/asm/uaccess_64.h #define __put_user(x, ptr) put_user(x, ptr) x 99 arch/sparc/include/asm/uaccess_64.h #define __get_user(x, ptr) get_user(x, ptr) x 102 arch/sparc/include/asm/uaccess_64.h #define __m(x) ((struct __large_struct *)(x)) x 110 arch/sparc/include/asm/uaccess_64.h case 8: __put_user_asm(data, x, addr, __pu_ret); break; \ x 116 arch/sparc/include/asm/uaccess_64.h #define __put_user_asm(x, size, addr, ret) \ x 133 arch/sparc/include/asm/uaccess_64.h : "=r" (ret) : "r" (x), "r" (__m(addr)), \ x 145 arch/sparc/include/asm/uaccess_64.h case 8: __get_user_asm(__gu_val, x, addr, __gu_ret); break; \ x 155 arch/sparc/include/asm/uaccess_64.h #define __get_user_asm(x, size, addr, ret) \ x 173 arch/sparc/include/asm/uaccess_64.h : "=r" (ret), "=r" (x) : "r" (__m(addr)), \ x 54 arch/sparc/include/asm/vaddrs.h #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) x 58 arch/sparc/include/asm/vga.h #define VGA_MAP_MEM(x,s) (x) x 88 arch/sparc/kernel/btext.c static unsigned char * calc_base(int x, int y) x 92 arch/sparc/kernel/btext.c base += (x + dispDeviceRect[0]) * (dispDeviceDepth >> 3); x 145 arch/sparc/kernel/btext.c int x; x 182 arch/sparc/kernel/btext.c for (x = 0; x < g_max_loc_X; ++x) x 183 arch/sparc/kernel/btext.c draw_byte(' ', x, g_loc_Y); x 297 arch/sparc/kernel/ioport.c void sbus_set_sbus64(struct device *dev, int x) x 13 arch/sparc/kernel/irq.h #define SUN4M_HARD_INT(x) (0x000000001 << (x)) x 14 arch/sparc/kernel/irq.h #define SUN4M_SOFT_INT(x) (0x000010000 << (x)) x 1394 arch/sparc/kernel/pci_schizo.c static inline int portid_compare(u32 x, u32 y, int chip_type) x 1397 arch/sparc/kernel/pci_schizo.c if (x == (y ^ 1)) x 1401 arch/sparc/kernel/pci_schizo.c return (x == y); x 147 arch/sparc/kernel/perf_event.c #define C(x) PERF_COUNT_HW_CACHE_##x x 141 arch/sparc/kernel/sun4m_irq.c #define SUN4M_INT_SBUS(x) (1 << (x+7)) x 142 arch/sparc/kernel/sun4m_irq.c #define SUN4M_INT_VME(x) (1 << (x)) x 80 arch/sparc/math-emu/math_32.c #define FLOATFUNC(x) extern int x(void *,void *,void *) x 220 arch/sparc/math-emu/math_64.c unsigned long x = current_thread_info()->xfsr[0]; x 222 arch/sparc/math-emu/math_64.c x = (x >> 14) & 0x7; x 223 arch/sparc/math-emu/math_64.c TYPE(x,1,1,1,1,0,0); x 228 arch/sparc/math-emu/math_64.c unsigned long x = current_thread_info()->xfsr[0]; x 230 arch/sparc/math-emu/math_64.c x = (x >> 14) & 0x7; x 231 arch/sparc/math-emu/math_64.c TYPE(x,2,1,2,1,0,0); x 100 arch/sparc/mm/init_64.c const struct linux_prom64_registers *x = a, *y = b; x 102 arch/sparc/mm/init_64.c if (x->phys_addr > y->phys_addr) x 104 arch/sparc/mm/init_64.c if (x->phys_addr < y->phys_addr) x 602 arch/sparc/mm/init_64.c const struct linux_prom_translation *x = a, *y = b; x 604 arch/sparc/mm/init_64.c if (x->virt > y->virt) x 606 arch/sparc/mm/init_64.c if (x->virt < y->virt) x 33 arch/sparc/mm/io-unit.c #define IOD(x) printk(x) x 35 arch/sparc/mm/io-unit.c #define IOD(x) do { } while (0) x 839 arch/sparc/mm/srmmu.c unsigned int x; /* Index of HW PMD in soft cluster */ x 841 arch/sparc/mm/srmmu.c x = (start >> PMD_SHIFT) & 15; x 842 arch/sparc/mm/srmmu.c val = &pmdp->pmdv[x]; x 52 arch/sparc/prom/memory.c const struct sparc_phys_banks *x = a, *y = b; x 54 arch/sparc/prom/memory.c if (x->base_addr > y->base_addr) x 56 arch/sparc/prom/memory.c if (x->base_addr < y->base_addr) x 100 arch/sparc/vdso/vdso2c.c #define GBE(x, bits, ifnot) \ x 102 arch/sparc/vdso/vdso2c.c (sizeof(*(x)) == bits/8), \ x 103 arch/sparc/vdso/vdso2c.c (__typeof__(*(x)))get_unaligned_be##bits(x), ifnot) x 105 arch/sparc/vdso/vdso2c.c #define LAST_GBE(x) \ x 106 arch/sparc/vdso/vdso2c.c __builtin_choose_expr(sizeof(*(x)) == 1, *(x), (void)(0)) x 108 arch/sparc/vdso/vdso2c.c #define GET_BE(x) \ x 109 arch/sparc/vdso/vdso2c.c GBE(x, 64, GBE(x, 32, GBE(x, 16, LAST_GBE(x)))) x 111 arch/sparc/vdso/vdso2c.c #define PBE(x, val, bits, ifnot) \ x 113 arch/sparc/vdso/vdso2c.c (sizeof(*(x)) == bits/8), \ x 114 arch/sparc/vdso/vdso2c.c put_unaligned_be##bits((val), (x)), ifnot) x 116 arch/sparc/vdso/vdso2c.c #define LAST_PBE(x, val) \ x 117 arch/sparc/vdso/vdso2c.c __builtin_choose_expr(sizeof(*(x)) == 1, *(x) = (val), (void)(0)) x 119 arch/sparc/vdso/vdso2c.c #define PUT_BE(x, val) \ x 120 arch/sparc/vdso/vdso2c.c PBE(x, val, 64, PBE(x, val, 32, PBE(x, val, 16, LAST_PBE(x, val)))) x 130 arch/sparc/vdso/vdso2c.c #define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x x 131 arch/sparc/vdso/vdso2c.c #define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x) x 132 arch/sparc/vdso/vdso2c.c #define ELF(x) ELF_BITS_XFORM(ELF_BITS, x) x 121 arch/um/drivers/cow_user.c #define DIV_ROUND(x, len) (((x) + (len) - 1) / (len)) x 122 arch/um/drivers/cow_user.c #define ROUND_UP(x, align) DIV_ROUND(x, align) * (align) x 76 arch/um/drivers/mconsole_user.c #define STRINGX(x) #x x 77 arch/um/drivers/mconsole_user.c #define STRING(x) STRINGX(x) x 50 arch/um/include/asm/page.h #define pmd_val(x) ((x).pmd) x 51 arch/um/include/asm/page.h #define __pmd(x) ((pmd_t) { (x) } ) x 62 arch/um/include/asm/page.h #define pmd_val(x) ((x).pmd) x 63 arch/um/include/asm/page.h #define __pmd(x) ((pmd_t) { (x) } ) x 66 arch/um/include/asm/page.h #define pte_val(x) ((x).pte) x 84 arch/um/include/asm/page.h #define pgd_val(x) ((x).pgd) x 85 arch/um/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 87 arch/um/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 88 arch/um/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 89 arch/um/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 43 arch/um/include/asm/pgalloc.h #define __pmd_free_tlb(tlb,x, address) tlb_remove_page((tlb),virt_to_page(x)) x 41 arch/um/include/asm/pgtable-2level.h #define pte_pfn(x) phys_to_pfn(pte_val(x)) x 57 arch/um/include/asm/pgtable-3level.h #define pud_none(x) (!(pud_val(x) & ~_PAGE_NEWPAGE)) x 58 arch/um/include/asm/pgtable-3level.h #define pud_bad(x) ((pud_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) x 59 arch/um/include/asm/pgtable-3level.h #define pud_present(x) (pud_val(x) & _PAGE_PRESENT) x 97 arch/um/include/asm/pgtable.h #define pmd_none(x) (!((unsigned long)pmd_val(x) & ~_PAGE_NEWPAGE)) x 98 arch/um/include/asm/pgtable.h #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) x 100 arch/um/include/asm/pgtable.h #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) x 103 arch/um/include/asm/pgtable.h #define pmd_newpage(x) (pmd_val(x) & _PAGE_NEWPAGE) x 104 arch/um/include/asm/pgtable.h #define pmd_mkuptodate(x) (pmd_val(x) &= ~_PAGE_NEWPAGE) x 106 arch/um/include/asm/pgtable.h #define pud_newpage(x) (pud_val(x) & _PAGE_NEWPAGE) x 107 arch/um/include/asm/pgtable.h #define pud_mkuptodate(x) (pud_val(x) &= ~_PAGE_NEWPAGE) x 111 arch/um/include/asm/pgtable.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 113 arch/um/include/asm/pgtable.h #define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE)) x 352 arch/um/include/asm/pgtable.h #define __swp_type(x) (((x).val >> 5) & 0x1f) x 353 arch/um/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> 11) x 359 arch/um/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 60 arch/um/include/shared/mem_user.h unsigned long len, int r, int w, int x); x 207 arch/um/include/shared/os.h unsigned long len, int r, int w, int x); x 209 arch/um/include/shared/os.h int r, int w, int x); x 17 arch/um/include/shared/user.h #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 42 arch/um/kernel/physmem.c int r, int w, int x) x 48 arch/um/kernel/physmem.c err = os_map_memory((void *) virt, fd, offset, len, r, w, x); x 55 arch/um/kernel/physmem.c "err = %d\n", virt, fd, offset, len, r, w, x, err); x 226 arch/um/kernel/tlb.c int r, w, x, prot, ret = 0; x 235 arch/um/kernel/tlb.c x = pte_exec(*pte); x 243 arch/um/kernel/tlb.c (x ? UM_PROT_EXEC : 0)); x 432 arch/um/kernel/tlb.c int r, w, x, prot, err = 0; x 452 arch/um/kernel/tlb.c x = pte_exec(*pte); x 462 arch/um/kernel/tlb.c (x ? UM_PROT_EXEC : 0)); x 139 arch/um/os-Linux/process.c int r, int w, int x) x 145 arch/um/os-Linux/process.c (x ? PROT_EXEC : 0); x 154 arch/um/os-Linux/process.c int os_protect_memory(void *addr, unsigned long len, int r, int w, int x) x 157 arch/um/os-Linux/process.c (x ? PROT_EXEC : 0)); x 29 arch/unicore32/boot/compressed/misc.c #define arch_decomp_error(x) x 74 arch/unicore32/boot/compressed/misc.c void error(char *x) x 77 arch/unicore32/boot/compressed/misc.c arch_decomp_puts(x); x 80 arch/unicore32/boot/compressed/misc.c arch_decomp_error(x); x 54 arch/unicore32/include/asm/assembler.h #define USER(x...) \ x 55 arch/unicore32/include/asm/assembler.h 9999: x; \ x 22 arch/unicore32/include/asm/bitops.h static inline int fls(unsigned int x) x 26 arch/unicore32/include/asm/bitops.h asm("cntlz\t%0, %1" : "=r" (ret) : "r" (x) : "cc"); x 32 arch/unicore32/include/asm/bitops.h #define __fls(x) (fls(x) - 1) x 33 arch/unicore32/include/asm/bitops.h #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) x 34 arch/unicore32/include/asm/bitops.h #define __ffs(x) (ffs(x) - 1) x 16 arch/unicore32/include/asm/cmpxchg.h static inline unsigned long __xchg(unsigned long x, volatile void *ptr, x 25 arch/unicore32/include/asm/cmpxchg.h : "r" (x), "r" (ptr) x 31 arch/unicore32/include/asm/cmpxchg.h : "r" (x), "r" (ptr) x 41 arch/unicore32/include/asm/cmpxchg.h #define xchg(ptr, x) \ x 42 arch/unicore32/include/asm/cmpxchg.h ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))) x 50 arch/unicore32/include/asm/memory.h #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) x 51 arch/unicore32/include/asm/memory.h #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) x 79 arch/unicore32/include/asm/memory.h #define __pa(x) __virt_to_phys((unsigned long)(x)) x 80 arch/unicore32/include/asm/memory.h #define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) x 38 arch/unicore32/include/asm/page.h #define pte_val(x) ((x).pte) x 39 arch/unicore32/include/asm/page.h #define pgd_val(x) ((x).pgd) x 40 arch/unicore32/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 42 arch/unicore32/include/asm/page.h #define __pte(x) ((pte_t) { (x) }) x 43 arch/unicore32/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) }) x 44 arch/unicore32/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) }) x 54 arch/unicore32/include/asm/page.h #define pte_val(x) (x) x 55 arch/unicore32/include/asm/page.h #define pgd_val(x) (x) x 56 arch/unicore32/include/asm/page.h #define pgprot_val(x) (x) x 58 arch/unicore32/include/asm/page.h #define __pte(x) (x) x 59 arch/unicore32/include/asm/page.h #define __pgd(x) (x) x 60 arch/unicore32/include/asm/page.h #define __pgprot(x) (x) x 264 arch/unicore32/include/asm/pgtable.h #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) \ x 266 arch/unicore32/include/asm/pgtable.h #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) x 18 arch/unicore32/include/mach/hardware.h #define io_p2v(x) (void __iomem *)((x) - PKUNITY_MMIO_BASE) x 19 arch/unicore32/include/mach/hardware.h #define io_v2p(x) (phys_addr_t)((x) + PKUNITY_MMIO_BASE) x 21 arch/unicore32/include/mach/hardware.h #define io_p2v(x) ((x) - PKUNITY_MMIO_BASE) x 22 arch/unicore32/include/mach/hardware.h #define io_v2p(x) ((x) + PKUNITY_MMIO_BASE) x 45 arch/unicore32/include/mach/memory.h #define __virt_to_pcibus(x) (__virt_to_phys((x) + PKUNITY_PCIAHB_BASE)) x 46 arch/unicore32/include/mach/memory.h #define __pcibus_to_virt(x) (__phys_to_virt(x) - PKUNITY_PCIAHB_BASE) x 51 arch/unicore32/include/mach/memory.h #define kuser_vecpage_to_vectors(x) ((x) - (KUSER_VECPAGE_BASE) \ x 15 arch/unicore32/kernel/elf.c int elf_check_arch(const struct elf32_hdr *x) x 18 arch/unicore32/kernel/elf.c if (x->e_machine != EM_UNICORE) x 22 arch/unicore32/kernel/elf.c if (x->e_entry & 3) x 29 arch/unicore32/kernel/elf.c void elf_set_personality(const struct elf32_hdr *x) x 167 arch/unicore32/kernel/puv3-core.c #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x x 168 arch/unicore32/kernel/puv3-core.c #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] x 15 arch/unicore32/mm/mm.h #define TOP_PTE(x) pte_offset_kernel(top_pmd, x) x 31 arch/x86/boot/boot.h #define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x))) x 16 arch/x86/boot/compressed/kaslr_64.c #define __pa(x) ((unsigned long)(x)) x 17 arch/x86/boot/compressed/kaslr_64.c #define __va(x) ((void *)((unsigned long)(x))) x 110 arch/x86/boot/compressed/misc.c int x, y, pos; x 125 arch/x86/boot/compressed/misc.c x = boot_params->screen_info.orig_x; x 130 arch/x86/boot/compressed/misc.c x = 0; x 136 arch/x86/boot/compressed/misc.c vidmem[(x + cols * y) * 2] = c; x 137 arch/x86/boot/compressed/misc.c if (++x >= cols) { x 138 arch/x86/boot/compressed/misc.c x = 0; x 147 arch/x86/boot/compressed/misc.c boot_params->screen_info.orig_x = x; x 150 arch/x86/boot/compressed/misc.c pos = (x + cols * y) * 2; /* Update cursor position */ x 64 arch/x86/boot/compressed/misc.h #define debug_putaddr(x) /* */ x 100 arch/x86/boot/string.c #define TOLOWER(x) ((x) | 0x20) x 108 arch/x86/boot/video-bios.c mi->x = rdfs16(0x44a); x 84 arch/x86/boot/video-mode.c int visible = mi->x || mi->y; x 88 arch/x86/boot/video-mode.c mode == (mi->y << 8)+mi->x) { x 104 arch/x86/boot/video-mode.c mix.x = mix.y = 0; x 79 arch/x86/boot/video-vesa.c mi->x = vminfo.h_res; x 94 arch/x86/boot/video-vesa.c mi->x = vminfo.h_res; x 146 arch/x86/boot/video-vesa.c force_x = mode->x; x 197 arch/x86/boot/video-vga.c force_x = mode->x; x 64 arch/x86/boot/video.c int x, y; x 86 arch/x86/boot/video.c x = rdfs16(0x44a); x 90 arch/x86/boot/video.c x = force_x; x 94 arch/x86/boot/video.c boot_params.screen_info.orig_video_cols = x; x 165 arch/x86/boot/video.c int visible = mi->x && mi->y; x 167 arch/x86/boot/video.c (mi->y << 8)+mi->x; x 178 arch/x86/boot/video.c ch, mode_id, mi->x, resbuf, card->card_name); x 197 arch/x86/boot/video.c #define H(x) ((x)-'a'+10) x 234 arch/x86/boot/video.c int x, y; x 242 arch/x86/boot/video.c saved.x = boot_params.screen_info.orig_video_cols; x 247 arch/x86/boot/video.c if (!heap_free(saved.x*saved.y*sizeof(u16)+512)) x 250 arch/x86/boot/video.c saved.data = GET_HEAP(u16, saved.x*saved.y); x 253 arch/x86/boot/video.c copy_from_fs(saved.data, 0, saved.x*saved.y*sizeof(u16)); x 279 arch/x86/boot/video.c int copy = (xs < saved.x) ? xs : saved.x; x 282 arch/x86/boot/video.c src += saved.x; x 283 arch/x86/boot/video.c npad = (xs < saved.x) ? 0 : xs-saved.x; x 66 arch/x86/boot/video.h u16 x, y; /* Width, height */ x 780 arch/x86/crypto/camellia_glue.c #define CAMELLIA_F(x, kl, kr, y) ({ \ x 781 arch/x86/crypto/camellia_glue.c u64 ii = x ^ (((u64)kl << 32) | kr); \ x 57 arch/x86/crypto/ghash-clmulni-intel_glue.c be128 *x = (be128 *)key; x 66 arch/x86/crypto/ghash-clmulni-intel_glue.c a = be64_to_cpu(x->a); x 67 arch/x86/crypto/ghash-clmulni-intel_glue.c b = be64_to_cpu(x->b); x 119 arch/x86/entry/vdso/vdso2c.c #define GLE(x, bits, ifnot) \ x 121 arch/x86/entry/vdso/vdso2c.c (sizeof(*(x)) == bits/8), \ x 122 arch/x86/entry/vdso/vdso2c.c (__typeof__(*(x)))get_unaligned_le##bits(x), ifnot) x 125 arch/x86/entry/vdso/vdso2c.c #define LAST_GLE(x) \ x 126 arch/x86/entry/vdso/vdso2c.c __builtin_choose_expr(sizeof(*(x)) == 1, *(x), bad_get_le()) x 128 arch/x86/entry/vdso/vdso2c.c #define GET_LE(x) \ x 129 arch/x86/entry/vdso/vdso2c.c GLE(x, 64, GLE(x, 32, GLE(x, 16, LAST_GLE(x)))) x 131 arch/x86/entry/vdso/vdso2c.c #define PLE(x, val, bits, ifnot) \ x 133 arch/x86/entry/vdso/vdso2c.c (sizeof(*(x)) == bits/8), \ x 134 arch/x86/entry/vdso/vdso2c.c put_unaligned_le##bits((val), (x)), ifnot) x 137 arch/x86/entry/vdso/vdso2c.c #define LAST_PLE(x, val) \ x 138 arch/x86/entry/vdso/vdso2c.c __builtin_choose_expr(sizeof(*(x)) == 1, *(x) = (val), bad_put_le()) x 140 arch/x86/entry/vdso/vdso2c.c #define PUT_LE(x, val) \ x 141 arch/x86/entry/vdso/vdso2c.c PLE(x, val, 64, PLE(x, val, 32, PLE(x, val, 16, LAST_PLE(x, val)))) x 152 arch/x86/entry/vdso/vdso2c.c #define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x x 153 arch/x86/entry/vdso/vdso2c.c #define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x) x 154 arch/x86/entry/vdso/vdso2c.c #define ELF(x) ELF_BITS_XFORM(ELF_BITS, x) x 24 arch/x86/events/amd/iommu.c #define GET_CSOURCE(x) ((x)->conf & 0xFFULL) x 25 arch/x86/events/amd/iommu.c #define GET_DEVID(x) (((x)->conf >> 8) & 0xFFFFULL) x 26 arch/x86/events/amd/iommu.c #define GET_DOMID(x) (((x)->conf >> 24) & 0xFFFFULL) x 27 arch/x86/events/amd/iommu.c #define GET_PASID(x) (((x)->conf >> 40) & 0xFFFFFULL) x 30 arch/x86/events/amd/iommu.c #define GET_DEVID_MASK(x) ((x)->conf1 & 0xFFFFULL) x 31 arch/x86/events/amd/iommu.c #define GET_DOMID_MASK(x) (((x)->conf1 >> 16) & 0xFFFFULL) x 32 arch/x86/events/amd/iommu.c #define GET_PASID_MASK(x) (((x)->conf1 >> 32) & 0xFFFFFULL) x 56 arch/x86/events/intel/ds.c #define LEVEL(x) P(LVLNUM, x) x 131 arch/x86/events/intel/uncore_nhmex.c #define MBOX_INC_SEL(x) ((x) << NHMEX_M_PMON_CTL_INC_SEL_SHIFT) x 132 arch/x86/events/intel/uncore_nhmex.c #define MBOX_SET_FLAG_SEL(x) (((x) << NHMEX_M_PMON_CTL_SET_FLAG_SEL_SHIFT) | \ x 187 arch/x86/events/intel/uncore_nhmex.c #define __BITS_VALUE(x, i, n) ((typeof(x))(((x) >> ((i) * (n))) & \ x 867 arch/x86/events/intel/uncore_snb.c #define for_each_imc_pci_id(x, t) \ x 868 arch/x86/events/intel/uncore_snb.c for (x = (t); (x)->pci_id; x++) x 165 arch/x86/events/intel/uncore_snbep.c #define __BITS_VALUE(x, i, n) ((typeof(x))(((x) >> ((i) * (n))) & \ x 787 arch/x86/events/perf_event.h #define C(x) PERF_COUNT_HW_CACHE_##x x 50 arch/x86/ia32/ia32_signal.c #define COPY(x) { \ x 51 arch/x86/ia32/ia32_signal.c get_user_ex(regs->x, &sc->x); \ x 163 arch/x86/include/asm/acpi.h #define acpi_unlazy_tlb(x) leave_mm(x) x 119 arch/x86/include/asm/amd_nb.h #define amd_nb_num(x) 0 x 120 arch/x86/include/asm/amd_nb.h #define amd_nb_has_feature(x) false x 121 arch/x86/include/asm/amd_nb.h #define node_to_amd_nb(x) NULL x 122 arch/x86/include/asm/amd_nb.h #define amd_gart_present(x) false x 335 arch/x86/include/asm/apic.h u32 (*get_apic_id)(unsigned long x); x 465 arch/x86/include/asm/apic.h static inline unsigned default_get_apic_id(unsigned long x) x 470 arch/x86/include/asm/apic.h return (x >> 24) & 0xFF; x 472 arch/x86/include/asm/apic.h return (x >> 24) & 0x0F; x 26 arch/x86/include/asm/apicdef.h #define GET_APIC_VERSION(x) ((x) & 0xFFu) x 27 arch/x86/include/asm/apicdef.h #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu) x 29 arch/x86/include/asm/apicdef.h # define APIC_INTEGRATED(x) ((x) & 0xF0u) x 31 arch/x86/include/asm/apicdef.h # define APIC_INTEGRATED(x) (1) x 33 arch/x86/include/asm/apicdef.h #define APIC_XAPIC(x) ((x) >= 0x14) x 34 arch/x86/include/asm/apicdef.h #define APIC_EXT_SPACE(x) ((x) & 0x80000000) x 45 arch/x86/include/asm/apicdef.h #define GET_APIC_LOGICAL_ID(x) (((x) >> 24) & 0xFFu) x 46 arch/x86/include/asm/apicdef.h #define SET_APIC_LOGICAL_ID(x) (((x) << 24)) x 92 arch/x86/include/asm/apicdef.h #define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF) x 93 arch/x86/include/asm/apicdef.h #define SET_APIC_DEST_FIELD(x) ((x) << 24) x 99 arch/x86/include/asm/apicdef.h #define GET_APIC_TIMER_BASE(x) (((x) >> 18) & 0x3) x 100 arch/x86/include/asm/apicdef.h #define SET_APIC_TIMER_BASE(x) (((x) << 18)) x 113 arch/x86/include/asm/apicdef.h #define GET_APIC_DELIVERY_MODE(x) (((x) >> 8) & 0x7) x 114 arch/x86/include/asm/apicdef.h #define SET_APIC_DELIVERY_MODE(x, y) (((x) & ~0x700) | ((y) << 8)) x 139 arch/x86/include/asm/apicdef.h #define APIC_EILVT_LVTOFF(x) (((x) >> 4) & 0xF) x 6 arch/x86/include/asm/asm.h # define __ASM_FORM(x) x x 7 arch/x86/include/asm/asm.h # define __ASM_FORM_RAW(x) x x 8 arch/x86/include/asm/asm.h # define __ASM_FORM_COMMA(x) x, x 10 arch/x86/include/asm/asm.h # define __ASM_FORM(x) " " #x " " x 11 arch/x86/include/asm/asm.h # define __ASM_FORM_RAW(x) #x x 12 arch/x86/include/asm/asm.h # define __ASM_FORM_COMMA(x) " " #x "," x 152 arch/x86/include/asm/asm.h # define _EXPAND_EXTABLE_HANDLE(x) #x x 39 arch/x86/include/asm/bitops.h #define RLONG_ADDR(x) "m" (*(volatile long *) (x)) x 40 arch/x86/include/asm/bitops.h #define WBYTE_ADDR(x) "+m" (*(volatile char *) (x)) x 283 arch/x86/include/asm/bitops.h static __always_inline int ffs(int x) x 299 arch/x86/include/asm/bitops.h : "rm" (x), "0" (-1)); x 303 arch/x86/include/asm/bitops.h : "=&r" (r) : "rm" (x), "r" (-1)); x 308 arch/x86/include/asm/bitops.h "1:" : "=r" (r) : "rm" (x)); x 324 arch/x86/include/asm/bitops.h static __always_inline int fls(unsigned int x) x 340 arch/x86/include/asm/bitops.h : "rm" (x), "0" (-1)); x 344 arch/x86/include/asm/bitops.h : "=&r" (r) : "rm" (x), "rm" (-1)); x 349 arch/x86/include/asm/bitops.h "1:" : "=r" (r) : "rm" (x)); x 366 arch/x86/include/asm/bitops.h static __always_inline int fls64(__u64 x) x 376 arch/x86/include/asm/bitops.h : "rm" (x)); x 373 arch/x86/include/asm/cpufeatures.h #define X86_BUG(x) (NCAPINTS*32 + (x)) x 89 arch/x86/include/asm/elf.h #define elf_check_arch_ia32(x) \ x 90 arch/x86/include/asm/elf.h (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486)) x 97 arch/x86/include/asm/elf.h #define elf_check_arch(x) elf_check_arch_ia32(x) x 161 arch/x86/include/asm/elf.h #define elf_check_arch(x) \ x 162 arch/x86/include/asm/elf.h ((x)->e_machine == EM_X86_64) x 164 arch/x86/include/asm/elf.h #define compat_elf_check_arch(x) \ x 165 arch/x86/include/asm/elf.h (elf_check_arch_ia32(x) || \ x 166 arch/x86/include/asm/elf.h (IS_ENABLED(CONFIG_X86_X32_ABI) && (x)->e_machine == EM_X86_64)) x 53 arch/x86/include/asm/fpu/internal.h # define WARN_ON_FPU(x) WARN_ON_ONCE(x) x 55 arch/x86/include/asm/fpu/internal.h # define WARN_ON_FPU(x) ({ (void)(x); 0; }) x 10 arch/x86/include/asm/i8259.h #define __byte(x, y) (((unsigned char *)&(y))[x]) x 9 arch/x86/include/asm/ia32_unistd.h #define __SYSCALL_ia32_NR(x) (x) x 147 arch/x86/include/asm/io_apic.h #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs)) x 201 arch/x86/include/asm/io_apic.h #define IO_APIC_IRQ(x) 0 x 126 arch/x86/include/asm/irqflags.h #define ENABLE_INTERRUPTS(x) sti x 127 arch/x86/include/asm/irqflags.h #define DISABLE_INTERRUPTS(x) cli x 131 arch/x86/include/asm/irqflags.h #define SAVE_FLAGS(x) pushfq; popq %rax x 53 arch/x86/include/asm/kexec.h # define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64) x 100 arch/x86/include/asm/kvm_host.h #define VALID_PAGE(x) ((x) != INVALID_PAGE) x 114 arch/x86/include/asm/kvm_host.h #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) x 115 arch/x86/include/asm/kvm_host.h #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) x 116 arch/x86/include/asm/kvm_host.h #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) x 117 arch/x86/include/asm/kvm_host.h #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) x 118 arch/x86/include/asm/kvm_host.h #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) x 12 arch/x86/include/asm/mc146818rtc.h #define RTC_PORT(x) (0x70 + (x)) x 119 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_CTL(x) (MSR_AMD64_SMCA_MC0_CTL + 0x10*(x)) x 120 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_STATUS(x) (MSR_AMD64_SMCA_MC0_STATUS + 0x10*(x)) x 121 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_ADDR(x) (MSR_AMD64_SMCA_MC0_ADDR + 0x10*(x)) x 122 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_MISC(x) (MSR_AMD64_SMCA_MC0_MISC0 + 0x10*(x)) x 123 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_CONFIG(x) (MSR_AMD64_SMCA_MC0_CONFIG + 0x10*(x)) x 124 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_IPID(x) (MSR_AMD64_SMCA_MC0_IPID + 0x10*(x)) x 125 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_SYND(x) (MSR_AMD64_SMCA_MC0_SYND + 0x10*(x)) x 126 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_DESTAT(x) (MSR_AMD64_SMCA_MC0_DESTAT + 0x10*(x)) x 127 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_DEADDR(x) (MSR_AMD64_SMCA_MC0_DEADDR + 0x10*(x)) x 128 arch/x86/include/asm/mce.h #define MSR_AMD64_SMCA_MCx_MISCy(x, y) ((MSR_AMD64_SMCA_MC0_MISC1 + y) + (0x10*(x))) x 90 arch/x86/include/asm/mem_encrypt.h #define __sme_pa(x) (__pa(x) | sme_me_mask) x 91 arch/x86/include/asm/mem_encrypt.h #define __sme_pa_nodebug(x) (__pa_nodebug(x) | sme_me_mask) x 347 arch/x86/include/asm/msr-index.h #define HWP_HIGHEST_PERF(x) (((x) >> 0) & 0xff) x 348 arch/x86/include/asm/msr-index.h #define HWP_GUARANTEED_PERF(x) (((x) >> 8) & 0xff) x 349 arch/x86/include/asm/msr-index.h #define HWP_MOSTEFFICIENT_PERF(x) (((x) >> 16) & 0xff) x 350 arch/x86/include/asm/msr-index.h #define HWP_LOWEST_PERF(x) (((x) >> 24) & 0xff) x 353 arch/x86/include/asm/msr-index.h #define HWP_MIN_PERF(x) (x & 0xff) x 354 arch/x86/include/asm/msr-index.h #define HWP_MAX_PERF(x) ((x & 0xff) << 8) x 355 arch/x86/include/asm/msr-index.h #define HWP_DESIRED_PERF(x) ((x & 0xff) << 16) x 356 arch/x86/include/asm/msr-index.h #define HWP_ENERGY_PERF_PREFERENCE(x) (((unsigned long long) x & 0xff) << 24) x 361 arch/x86/include/asm/msr-index.h #define HWP_ACTIVITY_WINDOW(x) ((unsigned long long)(x & 0xff3) << 32) x 362 arch/x86/include/asm/msr-index.h #define HWP_PACKAGE_CONTROL(x) ((unsigned long long)(x & 0x1) << 42) x 365 arch/x86/include/asm/msr-index.h #define HWP_GUARANTEED_CHANGE(x) (x & 0x1) x 366 arch/x86/include/asm/msr-index.h #define HWP_EXCURSION_TO_MINIMUM(x) (x & 0x4) x 369 arch/x86/include/asm/msr-index.h #define HWP_CHANGE_TO_GUARANTEED_INT(x) (x & 0x1) x 370 arch/x86/include/asm/msr-index.h #define HWP_EXCURSION_TO_MINIMUM_INT(x) (x & 0x2) x 374 arch/x86/include/asm/msr-index.h #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) x 375 arch/x86/include/asm/msr-index.h #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) x 376 arch/x86/include/asm/msr-index.h #define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x)) x 377 arch/x86/include/asm/msr-index.h #define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x)) x 379 arch/x86/include/asm/msr-index.h #define MSR_AMD64_MCx_MASK(x) (MSR_AMD64_MC0_MASK + (x)) x 383 arch/x86/include/asm/msr-index.h #define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x)) x 92 arch/x86/include/asm/nops.h #define _ASM_MK_NOP(x) .byte x x 94 arch/x86/include/asm/nops.h #define _ASM_MK_NOP(x) ".byte " __stringify(x) "\n" x 42 arch/x86/include/asm/page.h #define __pa(x) __phys_addr((unsigned long)(x)) x 45 arch/x86/include/asm/page.h #define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x)) x 55 arch/x86/include/asm/page.h #define __pa_symbol(x) \ x 56 arch/x86/include/asm/page.h __phys_addr_symbol(__phys_reloc_hide((unsigned long)(x))) x 59 arch/x86/include/asm/page.h #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) x 62 arch/x86/include/asm/page.h #define __boot_va(x) __va(x) x 63 arch/x86/include/asm/page.h #define __boot_pa(x) __pa(x) x 9 arch/x86/include/asm/page_32.h #define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET) x 13 arch/x86/include/asm/page_32.h #define __phys_addr(x) __phys_addr_nodebug(x) x 15 arch/x86/include/asm/page_32.h #define __phys_addr_symbol(x) __phys_addr(x) x 16 arch/x86/include/asm/page_32.h #define __phys_reloc_hide(x) RELOC_HIDE((x), 0) x 18 arch/x86/include/asm/page_64.h static inline unsigned long __phys_addr_nodebug(unsigned long x) x 20 arch/x86/include/asm/page_64.h unsigned long y = x - __START_KERNEL_map; x 23 arch/x86/include/asm/page_64.h x = y + ((x > y) ? phys_base : (__START_KERNEL_map - PAGE_OFFSET)); x 25 arch/x86/include/asm/page_64.h return x; x 32 arch/x86/include/asm/page_64.h #define __phys_addr(x) __phys_addr_nodebug(x) x 33 arch/x86/include/asm/page_64.h #define __phys_addr_symbol(x) \ x 34 arch/x86/include/asm/page_64.h ((unsigned long)(x) - __START_KERNEL_map + phys_base) x 37 arch/x86/include/asm/page_64.h #define __phys_reloc_hide(x) (x) x 112 arch/x86/include/asm/paravirt.h static inline void write_cr0(unsigned long x) x 114 arch/x86/include/asm/paravirt.h PVOP_VCALL1(cpu.write_cr0, x); x 122 arch/x86/include/asm/paravirt.h static inline void write_cr2(unsigned long x) x 124 arch/x86/include/asm/paravirt.h PVOP_VCALL1(mmu.write_cr2, x); x 132 arch/x86/include/asm/paravirt.h static inline void write_cr3(unsigned long x) x 134 arch/x86/include/asm/paravirt.h PVOP_VCALL1(mmu.write_cr3, x); x 137 arch/x86/include/asm/paravirt.h static inline void __write_cr4(unsigned long x) x 139 arch/x86/include/asm/paravirt.h PVOP_VCALL1(cpu.write_cr4, x); x 338 arch/x86/include/asm/paravirt_types.h #define PARAVIRT_PATCH(x) \ x 339 arch/x86/include/asm/paravirt_types.h (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) x 366 arch/x86/include/asm/paravirt_types.h #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" x 456 arch/x86/include/asm/paravirt_types.h #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) x 457 arch/x86/include/asm/paravirt_types.h #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) x 458 arch/x86/include/asm/paravirt_types.h #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) x 477 arch/x86/include/asm/paravirt_types.h #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) x 478 arch/x86/include/asm/paravirt_types.h #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) x 479 arch/x86/include/asm/paravirt_types.h #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) x 480 arch/x86/include/asm/paravirt_types.h #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) x 68 arch/x86/include/asm/percpu.h #define __percpu_arg(x) __percpu_prefix "%" #x x 89 arch/x86/include/asm/pgtable-2level.h #define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \ x 91 arch/x86/include/asm/pgtable-2level.h #define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT) x 96 arch/x86/include/asm/pgtable-2level.h #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) x 258 arch/x86/include/asm/pgtable-3level.h #define __swp_type(x) (((x).val) & 0x1f) x 259 arch/x86/include/asm/pgtable-3level.h #define __swp_offset(x) ((x).val >> 5) x 274 arch/x86/include/asm/pgtable-3level.h #define __swp_entry_to_pte(x) ((pte_t){ .pte = \ x 275 arch/x86/include/asm/pgtable-3level.h __swp_pteval_entry(__swp_type(x), __swp_offset(x)) }) x 282 arch/x86/include/asm/pgtable-3level.h #define __pteval_swp_type(x) ((unsigned long)((x).pte >> (64 - SWP_TYPE_BITS))) x 283 arch/x86/include/asm/pgtable-3level.h #define __pteval_swp_offset(x) ((unsigned long)(~((x).pte) << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT)) x 95 arch/x86/include/asm/pgtable.h #define pgd_val(x) native_pgd_val(x) x 96 arch/x86/include/asm/pgtable.h #define __pgd(x) native_make_pgd(x) x 99 arch/x86/include/asm/pgtable.h #define p4d_val(x) native_p4d_val(x) x 100 arch/x86/include/asm/pgtable.h #define __p4d(x) native_make_p4d(x) x 104 arch/x86/include/asm/pgtable.h #define pud_val(x) native_pud_val(x) x 105 arch/x86/include/asm/pgtable.h #define __pud(x) native_make_pud(x) x 109 arch/x86/include/asm/pgtable.h #define pmd_val(x) native_pmd_val(x) x 110 arch/x86/include/asm/pgtable.h #define __pmd(x) native_make_pmd(x) x 113 arch/x86/include/asm/pgtable.h #define pte_val(x) native_pte_val(x) x 114 arch/x86/include/asm/pgtable.h #define __pte(x) native_make_pte(x) x 640 arch/x86/include/asm/pgtable.h #define pte_pgprot(x) __pgprot(pte_flags(x)) x 641 arch/x86/include/asm/pgtable.h #define pmd_pgprot(x) __pgprot(pmd_flags(x)) x 642 arch/x86/include/asm/pgtable.h #define pud_pgprot(x) __pgprot(pud_flags(x)) x 643 arch/x86/include/asm/pgtable.h #define p4d_pgprot(x) __pgprot(p4d_flags(x)) x 219 arch/x86/include/asm/pgtable_64.h #define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS)) x 222 arch/x86/include/asm/pgtable_64.h #define __swp_offset(x) (~(x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT) x 235 arch/x86/include/asm/pgtable_64.h #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) x 236 arch/x86/include/asm/pgtable_64.h #define __swp_entry_to_pmd(x) ((pmd_t) { .pmd = (x).val }) x 198 arch/x86/include/asm/pgtable_types.h #define default_pgprot(x) __pgprot((x) & __default_kernel_pte_mask) x 452 arch/x86/include/asm/pgtable_types.h #define pgprot_val(x) ((x).pgprot) x 453 arch/x86/include/asm/pgtable_types.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 793 arch/x86/include/asm/processor.h static inline void prefetch(const void *x) x 797 arch/x86/include/asm/processor.h "m" (*(const char *)x)); x 805 arch/x86/include/asm/processor.h static inline void prefetchw(const void *x) x 809 arch/x86/include/asm/processor.h "m" (*(const char *)x)); x 812 arch/x86/include/asm/processor.h static inline void spin_lock_prefetch(const void *x) x 814 arch/x86/include/asm/processor.h prefetchw(x); x 146 arch/x86/include/asm/segment.h #define SEGMENT_IS_PNP_CODE(x) (((x) & 0xf4) == PNP_CS32) x 148 arch/x86/include/asm/special_insns.h static inline void write_cr0(unsigned long x) x 150 arch/x86/include/asm/special_insns.h native_write_cr0(x); x 158 arch/x86/include/asm/special_insns.h static inline void write_cr2(unsigned long x) x 160 arch/x86/include/asm/special_insns.h native_write_cr2(x); x 172 arch/x86/include/asm/special_insns.h static inline void write_cr3(unsigned long x) x 174 arch/x86/include/asm/special_insns.h native_write_cr3(x); x 177 arch/x86/include/asm/special_insns.h static inline void __write_cr4(unsigned long x) x 179 arch/x86/include/asm/special_insns.h native_write_cr4(x); x 213 arch/x86/include/asm/special_insns.h volatile struct { char x[64]; } *p = __p; x 12 arch/x86/include/asm/syscall_wrapper.h #define SC_X86_64_REGS_TO_ARGS(x, ...) \ x 13 arch/x86/include/asm/syscall_wrapper.h __MAP(x,__SC_ARGS \ x 18 arch/x86/include/asm/syscall_wrapper.h #define SC_IA32_REGS_TO_ARGS(x, ...) \ x 19 arch/x86/include/asm/syscall_wrapper.h __MAP(x,__SC_ARGS \ x 33 arch/x86/include/asm/syscall_wrapper.h #define __IA32_COMPAT_SYS_STUB0(x, name) \ x 41 arch/x86/include/asm/syscall_wrapper.h #define __IA32_COMPAT_SYS_STUBx(x, name, ...) \ x 46 arch/x86/include/asm/syscall_wrapper.h return __se_compat_sys##name(SC_IA32_REGS_TO_ARGS(x,__VA_ARGS__));\ x 49 arch/x86/include/asm/syscall_wrapper.h #define __IA32_SYS_STUBx(x, name, ...) \ x 54 arch/x86/include/asm/syscall_wrapper.h return __se_sys##name(SC_IA32_REGS_TO_ARGS(x,__VA_ARGS__));\ x 84 arch/x86/include/asm/syscall_wrapper.h #define __IA32_COMPAT_SYS_STUBx(x, name, ...) x 85 arch/x86/include/asm/syscall_wrapper.h #define __IA32_SYS_STUBx(x, fullname, name, ...) x 95 arch/x86/include/asm/syscall_wrapper.h #define __X32_COMPAT_SYS_STUB0(x, name, ...) \ x 103 arch/x86/include/asm/syscall_wrapper.h #define __X32_COMPAT_SYS_STUBx(x, name, ...) \ x 108 arch/x86/include/asm/syscall_wrapper.h return __se_compat_sys##name(SC_X86_64_REGS_TO_ARGS(x,__VA_ARGS__));\ x 112 arch/x86/include/asm/syscall_wrapper.h #define __X32_COMPAT_SYS_STUB0(x, name) x 113 arch/x86/include/asm/syscall_wrapper.h #define __X32_COMPAT_SYS_STUBx(x, name, ...) x 126 arch/x86/include/asm/syscall_wrapper.h __IA32_COMPAT_SYS_STUB0(x, name) \ x 127 arch/x86/include/asm/syscall_wrapper.h __X32_COMPAT_SYS_STUB0(x, name) \ x 134 arch/x86/include/asm/syscall_wrapper.h #define COMPAT_SYSCALL_DEFINEx(x, name, ...) \ x 135 arch/x86/include/asm/syscall_wrapper.h static long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 136 arch/x86/include/asm/syscall_wrapper.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__));\ x 137 arch/x86/include/asm/syscall_wrapper.h __IA32_COMPAT_SYS_STUBx(x, name, __VA_ARGS__) \ x 138 arch/x86/include/asm/syscall_wrapper.h __X32_COMPAT_SYS_STUBx(x, name, __VA_ARGS__) \ x 139 arch/x86/include/asm/syscall_wrapper.h static long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 141 arch/x86/include/asm/syscall_wrapper.h return __do_compat_sys##name(__MAP(x,__SC_DELOUSE,__VA_ARGS__));\ x 143 arch/x86/include/asm/syscall_wrapper.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 194 arch/x86/include/asm/syscall_wrapper.h #define __SYSCALL_DEFINEx(x, name, ...) \ x 197 arch/x86/include/asm/syscall_wrapper.h static long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 198 arch/x86/include/asm/syscall_wrapper.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__));\ x 201 arch/x86/include/asm/syscall_wrapper.h return __se_sys##name(SC_X86_64_REGS_TO_ARGS(x,__VA_ARGS__));\ x 203 arch/x86/include/asm/syscall_wrapper.h __IA32_SYS_STUBx(x, name, __VA_ARGS__) \ x 204 arch/x86/include/asm/syscall_wrapper.h static long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 206 arch/x86/include/asm/syscall_wrapper.h long ret = __do_sys##name(__MAP(x,__SC_CAST,__VA_ARGS__));\ x 207 arch/x86/include/asm/syscall_wrapper.h __MAP(x,__SC_TEST,__VA_ARGS__); \ x 208 arch/x86/include/asm/syscall_wrapper.h __PROTECT(x, ret,__MAP(x,__SC_ARGS,__VA_ARGS__)); \ x 211 arch/x86/include/asm/syscall_wrapper.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 132 arch/x86/include/asm/uaccess.h #define __inttype(x) \ x 133 arch/x86/include/asm/uaccess.h __typeof__(__builtin_choose_expr(sizeof(x) > sizeof(0UL), 0ULL, 0UL)) x 166 arch/x86/include/asm/uaccess.h #define get_user(x, ptr) \ x 176 arch/x86/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr))) __val_gu; \ x 180 arch/x86/include/asm/uaccess.h #define __put_user_x(size, x, ptr, __ret_pu) \ x 182 arch/x86/include/asm/uaccess.h : "0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") x 187 arch/x86/include/asm/uaccess.h #define __put_user_goto_u64(x, addr, label) \ x 193 arch/x86/include/asm/uaccess.h : : "A" (x), "r" (addr) \ x 196 arch/x86/include/asm/uaccess.h #define __put_user_asm_ex_u64(x, addr) \ x 203 arch/x86/include/asm/uaccess.h : : "A" (x), "r" (addr)) x 205 arch/x86/include/asm/uaccess.h #define __put_user_x8(x, ptr, __ret_pu) \ x 207 arch/x86/include/asm/uaccess.h : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") x 209 arch/x86/include/asm/uaccess.h #define __put_user_goto_u64(x, ptr, label) \ x 210 arch/x86/include/asm/uaccess.h __put_user_goto(x, ptr, "q", "", "er", label) x 211 arch/x86/include/asm/uaccess.h #define __put_user_asm_ex_u64(x, addr) \ x 212 arch/x86/include/asm/uaccess.h __put_user_asm_ex(x, addr, "q", "", "er") x 213 arch/x86/include/asm/uaccess.h #define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu) x 244 arch/x86/include/asm/uaccess.h #define put_user(x, ptr) \ x 250 arch/x86/include/asm/uaccess.h __pu_val = x; \ x 271 arch/x86/include/asm/uaccess.h #define __put_user_size(x, ptr, size, label) \ x 276 arch/x86/include/asm/uaccess.h __put_user_goto(x, ptr, "b", "b", "iq", label); \ x 279 arch/x86/include/asm/uaccess.h __put_user_goto(x, ptr, "w", "w", "ir", label); \ x 282 arch/x86/include/asm/uaccess.h __put_user_goto(x, ptr, "l", "k", "ir", label); \ x 285 arch/x86/include/asm/uaccess.h __put_user_goto_u64(x, ptr, label); \ x 296 arch/x86/include/asm/uaccess.h #define __put_user_size_ex(x, ptr, size) \ x 301 arch/x86/include/asm/uaccess.h __put_user_asm_ex(x, ptr, "b", "b", "iq"); \ x 304 arch/x86/include/asm/uaccess.h __put_user_asm_ex(x, ptr, "w", "w", "ir"); \ x 307 arch/x86/include/asm/uaccess.h __put_user_asm_ex(x, ptr, "l", "k", "ir"); \ x 310 arch/x86/include/asm/uaccess.h __put_user_asm_ex_u64((__typeof__(*ptr))(x), ptr); \ x 318 arch/x86/include/asm/uaccess.h #define __get_user_asm_u64(x, ptr, retval, errret) \ x 333 arch/x86/include/asm/uaccess.h : "=r" (retval), "=&A"(x) \ x 338 arch/x86/include/asm/uaccess.h #define __get_user_asm_ex_u64(x, ptr) (x) = __get_user_bad() x 340 arch/x86/include/asm/uaccess.h #define __get_user_asm_u64(x, ptr, retval, errret) \ x 341 arch/x86/include/asm/uaccess.h __get_user_asm(x, ptr, retval, "q", "", "=r", errret) x 342 arch/x86/include/asm/uaccess.h #define __get_user_asm_ex_u64(x, ptr) \ x 343 arch/x86/include/asm/uaccess.h __get_user_asm_ex(x, ptr, "q", "", "=r") x 346 arch/x86/include/asm/uaccess.h #define __get_user_size(x, ptr, size, retval, errret) \ x 352 arch/x86/include/asm/uaccess.h __get_user_asm(x, ptr, retval, "b", "b", "=q", errret); \ x 355 arch/x86/include/asm/uaccess.h __get_user_asm(x, ptr, retval, "w", "w", "=r", errret); \ x 358 arch/x86/include/asm/uaccess.h __get_user_asm(x, ptr, retval, "l", "k", "=r", errret); \ x 361 arch/x86/include/asm/uaccess.h __get_user_asm_u64(x, ptr, retval, errret); \ x 364 arch/x86/include/asm/uaccess.h (x) = __get_user_bad(); \ x 368 arch/x86/include/asm/uaccess.h #define __get_user_asm(x, addr, err, itype, rtype, ltype, errret) \ x 378 arch/x86/include/asm/uaccess.h : "=r" (err), ltype(x) \ x 381 arch/x86/include/asm/uaccess.h #define __get_user_asm_nozero(x, addr, err, itype, rtype, ltype, errret) \ x 390 arch/x86/include/asm/uaccess.h : "=r" (err), ltype(x) \ x 397 arch/x86/include/asm/uaccess.h #define __get_user_size_ex(x, ptr, size) \ x 402 arch/x86/include/asm/uaccess.h __get_user_asm_ex(x, ptr, "b", "b", "=q"); \ x 405 arch/x86/include/asm/uaccess.h __get_user_asm_ex(x, ptr, "w", "w", "=r"); \ x 408 arch/x86/include/asm/uaccess.h __get_user_asm_ex(x, ptr, "l", "k", "=r"); \ x 411 arch/x86/include/asm/uaccess.h __get_user_asm_ex_u64(x, ptr); \ x 414 arch/x86/include/asm/uaccess.h (x) = __get_user_bad(); \ x 418 arch/x86/include/asm/uaccess.h #define __get_user_asm_ex(x, addr, itype, rtype, ltype) \ x 426 arch/x86/include/asm/uaccess.h : ltype(x) : "m" (__m(addr))) x 428 arch/x86/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) \ x 432 arch/x86/include/asm/uaccess.h __typeof__(*(ptr)) __pu_val = (x); \ x 443 arch/x86/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) \ x 452 arch/x86/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 458 arch/x86/include/asm/uaccess.h #define __m(x) (*(struct __large_struct __user *)(x)) x 465 arch/x86/include/asm/uaccess.h #define __put_user_goto(x, addr, itype, rtype, ltype, label) \ x 469 arch/x86/include/asm/uaccess.h : : ltype(x), "m" (__m(addr)) \ x 472 arch/x86/include/asm/uaccess.h #define __put_user_failed(x, addr, itype, rtype, ltype, errret) \ x 475 arch/x86/include/asm/uaccess.h __put_user_goto(x,addr,itype,rtype,ltype,__puflab); \ x 479 arch/x86/include/asm/uaccess.h #define __put_user_asm(x, addr, retval, itype, rtype, ltype, errret) do { \ x 480 arch/x86/include/asm/uaccess.h retval = __put_user_failed(x, addr, itype, rtype, ltype, errret); \ x 483 arch/x86/include/asm/uaccess.h #define __put_user_asm_ex(x, addr, itype, rtype, ltype) \ x 487 arch/x86/include/asm/uaccess.h : : ltype(x), "m" (__m(addr))) x 528 arch/x86/include/asm/uaccess.h #define __get_user(x, ptr) \ x 529 arch/x86/include/asm/uaccess.h __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 552 arch/x86/include/asm/uaccess.h #define __put_user(x, ptr) \ x 553 arch/x86/include/asm/uaccess.h __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 565 arch/x86/include/asm/uaccess.h #define get_user_ex(x, ptr) do { \ x 568 arch/x86/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gue_val; \ x 574 arch/x86/include/asm/uaccess.h #define put_user_ex(x, ptr) \ x 575 arch/x86/include/asm/uaccess.h __put_user_size_ex((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) x 723 arch/x86/include/asm/uaccess.h #define user_access_restore(x) smap_restore(x) x 725 arch/x86/include/asm/uaccess.h #define unsafe_put_user(x, ptr, label) \ x 726 arch/x86/include/asm/uaccess.h __put_user_size((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)), label) x 728 arch/x86/include/asm/uaccess.h #define unsafe_get_user(x, ptr, err_label) \ x 733 arch/x86/include/asm/uaccess.h (x) = (__force __typeof__(*(ptr)))__gu_val; \ x 107 arch/x86/include/asm/unwind.h #define READ_ONCE_TASK_STACK(task, x) \ x 111 arch/x86/include/asm/unwind.h val = READ_ONCE(x); \ x 113 arch/x86/include/asm/unwind.h val = READ_ONCE_NOCHECK(x); \ x 20 arch/x86/include/asm/vga.h #define VGA_MAP_MEM(x, s) \ x 22 arch/x86/include/asm/vga.h unsigned long start = (unsigned long)phys_to_virt(x); \ x 30 arch/x86/include/asm/vga.h #define vga_readb(x) (*(x)) x 31 arch/x86/include/asm/vga.h #define vga_writeb(x, y) (*(y) = (x)) x 92 arch/x86/include/asm/xen/hypercall.h #define __HYPERCALL_ENTRY(x) \ x 93 arch/x86/include/asm/xen/hypercall.h [offset] "i" (__HYPERVISOR_##x * sizeof(hypercall_page[0])) x 212 arch/x86/include/asm/xen/interface.h struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */ x 39 arch/x86/include/asm/xen/page.h #define XMADDR(x) ((xmaddr_t) { .maddr = (x) }) x 40 arch/x86/include/asm/xen/page.h #define XPADDR(x) ((xpaddr_t) { .paddr = (x) }) x 335 arch/x86/include/asm/xen/page.h static inline pte_t __pte_ma(pteval_t x) x 337 arch/x86/include/asm/xen/page.h return (pte_t) { .pte = x }; x 346 arch/x86/include/asm/xen/page.h #define __pmd_ma(x) ((pmd_t) { (x) } ) x 349 arch/x86/include/asm/xen/page.h #define p4d_val_ma(x) ((x).pgd.pgd) x 351 arch/x86/include/asm/xen/page.h #define p4d_val_ma(x) ((x).p4d) x 37 arch/x86/include/asm/xor.h #define OFFS(x) "16*("#x")" x 38 arch/x86/include/asm/xor.h #define PF_OFFS(x) "256+16*("#x")" x 39 arch/x86/include/asm/xor.h #define PF0(x) " prefetchnta "PF_OFFS(x)"(%[p1]) ;\n" x 40 arch/x86/include/asm/xor.h #define LD(x, y) " movaps "OFFS(x)"(%[p1]), %%xmm"#y" ;\n" x 41 arch/x86/include/asm/xor.h #define ST(x, y) " movaps %%xmm"#y", "OFFS(x)"(%[p1]) ;\n" x 42 arch/x86/include/asm/xor.h #define PF1(x) " prefetchnta "PF_OFFS(x)"(%[p2]) ;\n" x 43 arch/x86/include/asm/xor.h #define PF2(x) " prefetchnta "PF_OFFS(x)"(%[p3]) ;\n" x 44 arch/x86/include/asm/xor.h #define PF3(x) " prefetchnta "PF_OFFS(x)"(%[p4]) ;\n" x 45 arch/x86/include/asm/xor.h #define PF4(x) " prefetchnta "PF_OFFS(x)"(%[p5]) ;\n" x 46 arch/x86/include/asm/xor.h #define XO1(x, y) " xorps "OFFS(x)"(%[p2]), %%xmm"#y" ;\n" x 47 arch/x86/include/asm/xor.h #define XO2(x, y) " xorps "OFFS(x)"(%[p3]), %%xmm"#y" ;\n" x 48 arch/x86/include/asm/xor.h #define XO3(x, y) " xorps "OFFS(x)"(%[p4]), %%xmm"#y" ;\n" x 49 arch/x86/include/asm/xor.h #define XO4(x, y) " xorps "OFFS(x)"(%[p5]), %%xmm"#y" ;\n" x 50 arch/x86/include/asm/xor.h #define NOP(x) x 14 arch/x86/include/asm/xor_32.h #define LD(x, y) " movq 8*("#x")(%1), %%mm"#y" ;\n" x 15 arch/x86/include/asm/xor_32.h #define ST(x, y) " movq %%mm"#y", 8*("#x")(%1) ;\n" x 16 arch/x86/include/asm/xor_32.h #define XO1(x, y) " pxor 8*("#x")(%2), %%mm"#y" ;\n" x 17 arch/x86/include/asm/xor_32.h #define XO2(x, y) " pxor 8*("#x")(%3), %%mm"#y" ;\n" x 18 arch/x86/include/asm/xor_32.h #define XO3(x, y) " pxor 8*("#x")(%4), %%mm"#y" ;\n" x 19 arch/x86/include/asm/xor_32.h #define XO4(x, y) " pxor 8*("#x")(%5), %%mm"#y" ;\n" x 71 arch/x86/kernel/amd_gart_64.c #define GPTE_ENCODE(x) \ x 72 arch/x86/kernel/amd_gart_64.c (((x) & 0xfffff000) | (((x) >> 32) << 4) | GPTE_VALID | GPTE_COHERENT) x 73 arch/x86/kernel/amd_gart_64.c #define GPTE_DECODE(x) (((x) & 0xfffff000) | (((u64)(x) & 0xff0) << 28)) x 79 arch/x86/kernel/apic/apic_flat_64.c static unsigned int flat_get_apic_id(unsigned long x) x 81 arch/x86/kernel/apic/apic_flat_64.c return (x >> 24) & 0xFF; x 46 arch/x86/kernel/apic/apic_noop.c static unsigned int noop_get_apic_id(unsigned long x) x 28 arch/x86/kernel/apic/apic_numachip.c static unsigned int numachip1_get_apic_id(unsigned long x) x 31 arch/x86/kernel/apic/apic_numachip.c unsigned int id = (x >> 24) & 0xff; x 46 arch/x86/kernel/apic/apic_numachip.c static unsigned int numachip2_get_apic_id(unsigned long x) x 51 arch/x86/kernel/apic/apic_numachip.c return ((mcfg >> (28 - 8)) & 0xfff00) | (x >> 24); x 15 arch/x86/kernel/apic/bigsmp_32.c static unsigned bigsmp_get_apic_id(unsigned long x) x 17 arch/x86/kernel/apic/bigsmp_32.c return (x >> 24) & 0xFF; x 606 arch/x86/kernel/apic/x2apic_uv_x.c static unsigned int x2apic_get_apic_id(unsigned long x) x 611 arch/x86/kernel/apic/x2apic_uv_x.c id = x | __this_cpu_read(x2apic_extra_bits); x 25 arch/x86/kernel/bootflag.c int x = 0; x 29 arch/x86/kernel/bootflag.c x ^= (v & 1); x 33 arch/x86/kernel/bootflag.c return x; x 38 arch/x86/kernel/cpu/cacheinfo.c #define MB(x) ((x) * 1024) x 589 arch/x86/kernel/cpu/cacheinfo.c #define amd_init_l3_cache(x, y) x 546 arch/x86/kernel/cpu/intel.c #define TME_ACTIVATE_LOCKED(x) (x & 0x1) x 547 arch/x86/kernel/cpu/intel.c #define TME_ACTIVATE_ENABLED(x) (x & 0x2) x 549 arch/x86/kernel/cpu/intel.c #define TME_ACTIVATE_POLICY(x) ((x >> 4) & 0xf) /* Bits 7:4 */ x 552 arch/x86/kernel/cpu/intel.c #define TME_ACTIVATE_KEYID_BITS(x) ((x >> 32) & 0xf) /* Bits 35:32 */ x 554 arch/x86/kernel/cpu/intel.c #define TME_ACTIVATE_CRYPTO_ALGS(x) ((x >> 48) & 0xffff) /* Bits 63:48 */ x 53 arch/x86/kernel/cpu/mce/severity.c #define BITCLR(x) .mask = x, .result = 0 x 54 arch/x86/kernel/cpu/mce/severity.c #define BITSET(x) .mask = x, .result = x x 55 arch/x86/kernel/cpu/mce/severity.c #define MCGMASK(x, y) .mcgmask = x, .mcgres = y x 56 arch/x86/kernel/cpu/mce/severity.c #define MASK(x, y) .mask = x, .result = y x 59 arch/x86/kernel/cpu/mtrr/cleanup.c #define Dprintk(x...) do { if (debug_print) pr_debug(x); } while (0) x 30 arch/x86/kernel/cpu/mtrr/if.c const char *mtrr_attrib_to_str(int x) x 32 arch/x86/kernel/cpu/mtrr/if.c return (x <= 6) ? mtrr_strings[x] : "?"; x 71 arch/x86/kernel/cpu/mtrr/mtrr.h const char *mtrr_attrib_to_str(int x); x 19 arch/x86/kernel/doublefault.c #define ptr_ok(x) ((x) > PAGE_OFFSET && (x) < PAGE_OFFSET + MAXMEM) x 168 arch/x86/kernel/e820.c int x = table->nr_entries; x 170 arch/x86/kernel/e820.c if (x >= ARRAY_SIZE(table->entries)) { x 176 arch/x86/kernel/e820.c table->entries[x].addr = start; x 177 arch/x86/kernel/e820.c table->entries[x].size = size; x 178 arch/x86/kernel/e820.c table->entries[x].type = type; x 241 arch/x86/kernel/early-quirks.c #define KB(x) ((x) * 1024UL) x 242 arch/x86/kernel/early-quirks.c #define MB(x) (KB (KB (x))) x 11 arch/x86/kernel/fpu/bugs.c static double __initdata x = 4195835.0; x 51 arch/x86/kernel/fpu/bugs.c : "m" (*&x), "m" (*&y)); x 143 arch/x86/kernel/fpu/init.c #define TYPE_ALIGN(TYPE) offsetof(struct { char x; TYPE test; }, test) x 88 arch/x86/kernel/fpu/signal.c struct xregs_state __user *x = buf; x 95 arch/x86/kernel/fpu/signal.c err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes)); x 107 arch/x86/kernel/fpu/signal.c err |= __get_user(xfeatures, (__u32 __user *)&x->header.xfeatures); x 122 arch/x86/kernel/fpu/signal.c err |= __put_user(xfeatures, (__u32 __user *)&x->header.xfeatures); x 518 arch/x86/kernel/fpu/xstate.c #define XSTATE_WARN_ON(x) do { \ x 519 arch/x86/kernel/fpu/xstate.c if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \ x 77 arch/x86/kernel/head32.c #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) x 55 arch/x86/kernel/irq.c #define irq_stats(x) (&per_cpu(irq_stat, x)) x 83 arch/x86/kernel/paravirt.c u64 notrace _paravirt_ident_64(u64 x) x 85 arch/x86/kernel/paravirt.c return x; x 53 arch/x86/kernel/pci-iommu_table.c struct iommu_table_entry *p, *q, *x; x 58 arch/x86/kernel/pci-iommu_table.c x = find_dependents_of(start, finish, q); x 59 arch/x86/kernel/pci-iommu_table.c if (p == x) { x 63 arch/x86/kernel/pci-iommu_table.c x->depend = NULL; x 50 arch/x86/kernel/signal.c #define COPY(x) do { \ x 51 arch/x86/kernel/signal.c get_user_ex(regs->x, &sc->x); \ x 65 arch/x86/kvm/cpuid.c #define F(x) bit(X86_FEATURE_##x) x 182 arch/x86/kvm/emulate.c #define X2(x...) x, x x 183 arch/x86/kvm/emulate.c #define X3(x...) X2(x), x x 184 arch/x86/kvm/emulate.c #define X4(x...) X2(x), X2(x) x 185 arch/x86/kvm/emulate.c #define X5(x...) X4(x), x x 186 arch/x86/kvm/emulate.c #define X6(x...) X4(x), X2(x) x 187 arch/x86/kvm/emulate.c #define X7(x...) X4(x), X3(x) x 188 arch/x86/kvm/emulate.c #define X8(x...) X4(x), X4(x) x 189 arch/x86/kvm/emulate.c #define X16(x...) X8(x), X8(x) x 309 arch/x86/kvm/emulate.c #define ON64(x) x x 311 arch/x86/kvm/emulate.c #define ON64(x) x 3652 arch/x86/kvm/emulate.c #define FFL(x) bit(X86_FEATURE_##x) x 44 arch/x86/kvm/i8254.c #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) x 46 arch/x86/kvm/i8254.c #define mod_64(x, y) ((x) % (y)) x 97 arch/x86/kvm/ioapic.h #define ASSERT(x) \ x 99 arch/x86/kvm/ioapic.h if (!(x)) { \ x 101 arch/x86/kvm/ioapic.h __FILE__, __LINE__, #x); \ x 106 arch/x86/kvm/ioapic.h #define ASSERT(x) do { } while (0) x 45 arch/x86/kvm/lapic.c #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) x 47 arch/x86/kvm/lapic.c #define mod_64(x, y) ((x) % (y)) x 104 arch/x86/kvm/mmu.c #define pgprintk(x...) do { if (dbg) printk(x); } while (0) x 105 arch/x86/kvm/mmu.c #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) x 106 arch/x86/kvm/mmu.c #define MMU_WARN_ON(x) WARN_ON(x) x 108 arch/x86/kvm/mmu.c #define pgprintk(x...) do { } while (0) x 109 arch/x86/kvm/mmu.c #define rmap_printk(x...) do { } while (0) x 110 arch/x86/kvm/mmu.c #define MMU_WARN_ON(x) do { } while (0) x 4758 arch/x86/kvm/mmu.c const u8 x = BYTE_MASK(ACC_EXEC_MASK); x 4779 arch/x86/kvm/mmu.c u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0; x 341 arch/x86/kvm/mmutrace.h __field(bool, x) x 351 arch/x86/kvm/mmutrace.h __entry->x = is_executable_pte(__entry->spte); x 359 arch/x86/kvm/mmutrace.h __entry->x ? "x" : "-", x 54 arch/x86/kvm/svm.c #define __ex(x) __kvm_handle_fault_on_reboot(x) x 111 arch/x86/kvm/svm.c #define AVIC_GATAG(x, y) (((x & AVIC_VM_ID_MASK) << AVIC_VCPU_ID_BITS) | \ x 113 arch/x86/kvm/svm.c #define AVIC_GATAG_TO_VMID(x) ((x >> AVIC_VCPU_ID_BITS) & AVIC_VM_ID_MASK) x 114 arch/x86/kvm/svm.c #define AVIC_GATAG_TO_VCPUID(x) (x & AVIC_VCPU_ID_MASK) x 424 arch/x86/kvm/svm.c #define __sme_page_pa(x) __sme_set(page_to_pfn(x) << PAGE_SHIFT) x 5956 arch/x86/kvm/svm.c #define F(x) bit(X86_FEATURE_##x) x 182 arch/x86/kvm/trace.h #define AREG(x) { APIC_##x, "APIC_" #x } x 273 arch/x86/kvm/trace.h #define EXS(x) { x##_VECTOR, "#" #x } x 16 arch/x86/kvm/vmx/evmcs.c #define EVMCS1_OFFSET(x) offsetof(struct hv_enlightened_vmcs, x) x 57 arch/x86/kvm/vmx/nested.c #define SHADOW_FIELD_RO(x, y) { x, offsetof(struct vmcs12, y) }, x 64 arch/x86/kvm/vmx/nested.c #define SHADOW_FIELD_RW(x, y) { x, offsetof(struct vmcs12, y) }, x 4665 arch/x86/kvm/vmx/nested.c #define SHADOW_FIELD_RW(x, y) case x: x 4677 arch/x86/kvm/vmx/nested.c #define SHADOW_FIELD_RO(x, y) case x: x 13 arch/x86/kvm/vmx/ops.h #define __ex(x) __kvm_handle_fault_on_reboot(x) x 6 arch/x86/kvm/vmx/vmcs12.c #define VMCS12_OFFSET(x) offsetof(struct vmcs12, x) x 6 arch/x86/kvm/vmx/vmcs_shadow_fields.h #define SHADOW_FIELD_RO(x, y) x 9 arch/x86/kvm/vmx/vmcs_shadow_fields.h #define SHADOW_FIELD_RW(x, y) x 97 arch/x86/kvm/x86.c #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__ x 98 arch/x86/kvm/x86.c #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__ x 15 arch/x86/math-emu/control_w.h #define _Const_(x) $##x x 17 arch/x86/math-emu/control_w.h #define _Const_(x) x x 419 arch/x86/math-emu/errors.c FPU_REG const *x; x 444 arch/x86/math-emu/errors.c x = a; x 448 arch/x86/math-emu/errors.c x = b; x 452 arch/x86/math-emu/errors.c x = defaultNaN; x 464 arch/x86/math-emu/errors.c x = b; x 470 arch/x86/math-emu/errors.c x = &CONST_QNaN; x 475 arch/x86/math-emu/errors.c if (!x) x 476 arch/x86/math-emu/errors.c x = b; x 478 arch/x86/math-emu/errors.c if (!(x->sigh & 0x80000000)) /* pseudo-NaN ? */ x 479 arch/x86/math-emu/errors.c x = &CONST_QNaN; x 481 arch/x86/math-emu/errors.c FPU_copy_to_regi(x, TAG_Special, deststnr); x 14 arch/x86/math-emu/exception.h #define Const_(x) $##x x 16 arch/x86/math-emu/exception.h #define Const_(x) x x 43 arch/x86/math-emu/exception.h #define EXCEPTION(x) { printk("exception in %s at line %d\n", \ x 44 arch/x86/math-emu/exception.h __FILE__, __LINE__); FPU_exception(x); } x 46 arch/x86/math-emu/exception.h #define EXCEPTION(x) FPU_exception(x) x 27 arch/x86/math-emu/fpu_asm.h #define EXP(x) 8(x) x 28 arch/x86/math-emu/fpu_asm.h #define SIG(x) SIGL_OFFSET##(x) x 29 arch/x86/math-emu/fpu_asm.h #define SIGL(x) SIGL_OFFSET##(x) x 30 arch/x86/math-emu/fpu_asm.h #define SIGH(x) 4(x) x 25 arch/x86/math-emu/fpu_emu.h #define Const(x) $##x x 27 arch/x86/math-emu/fpu_emu.h #define Const(x) x x 146 arch/x86/math-emu/fpu_emu.h #define fpu_register(x) ( * ((FPU_REG *)( register_base + 10 * (x & 7) )) ) x 147 arch/x86/math-emu/fpu_emu.h #define st(x) ( * ((FPU_REG *)( register_base + 10 * ((top+x) & 7) )) ) x 170 arch/x86/math-emu/fpu_emu.h static inline void reg_copy(FPU_REG const *x, FPU_REG *y) x 172 arch/x86/math-emu/fpu_emu.h *(short *)&(y->exp) = *(const short *)&(x->exp); x 173 arch/x86/math-emu/fpu_emu.h *(long long *)&(y->sigl) = *(const long long *)&(x->sigl); x 176 arch/x86/math-emu/fpu_emu.h #define exponent(x) (((*(short *)&((x)->exp)) & 0x7fff) - EXTENDED_Ebias) x 177 arch/x86/math-emu/fpu_emu.h #define setexponentpos(x,y) { (*(short *)&((x)->exp)) = \ x 179 arch/x86/math-emu/fpu_emu.h #define exponent16(x) (*(short *)&((x)->exp)) x 180 arch/x86/math-emu/fpu_emu.h #define setexponent16(x,y) { (*(short *)&((x)->exp)) = (u16)(y); } x 181 arch/x86/math-emu/fpu_emu.h #define addexponent(x,y) { (*(short *)&((x)->exp)) += (y); } x 182 arch/x86/math-emu/fpu_emu.h #define stdexp(x) { (*(short *)&((x)->exp)) += EXTENDED_Ebias; } x 186 arch/x86/math-emu/fpu_emu.h #define significand(x) ( ((unsigned long long *)&((x)->sigl))[0] ) x 191 arch/x86/math-emu/fpu_emu.h asmlinkage int FPU_normalize(FPU_REG *x); x 192 arch/x86/math-emu/fpu_emu.h asmlinkage int FPU_normalize_nuo(FPU_REG *x); x 206 arch/x86/math-emu/fpu_emu.h asmlinkage unsigned FPU_shrx(void *l, unsigned x); x 207 arch/x86/math-emu/fpu_emu.h asmlinkage unsigned FPU_shrxs(void *v, unsigned x); x 208 arch/x86/math-emu/fpu_emu.h asmlinkage unsigned long FPU_div_small(unsigned long long *x, unsigned long y); x 156 arch/x86/math-emu/fpu_proto.h extern int FPU_to_exp16(FPU_REG const *a, FPU_REG *x); x 127 arch/x86/math-emu/fpu_system.h #define FPU_get_user(x,y) do { if (get_user((x),(y))) FPU_abort; } while (0) x 128 arch/x86/math-emu/fpu_system.h #define FPU_put_user(x,y) do { if (put_user((x),(y))) FPU_abort; } while (0) x 750 arch/x86/math-emu/fpu_trig.c unsigned long long x; x 752 arch/x86/math-emu/fpu_trig.c x = st0 << n; x 758 arch/x86/math-emu/fpu_trig.c (((unsigned *)&x)[0]), "=m"(((unsigned *)&x)[1]), x 763 arch/x86/math-emu/fpu_trig.c asm volatile ("mull %3; subl %%eax,%0":"=m" (((unsigned *)&x)[1]), x 768 arch/x86/math-emu/fpu_trig.c asm volatile ("mull %3; subl %%eax,%0":"=m" (((unsigned *)&x)[1]), x 773 arch/x86/math-emu/fpu_trig.c *y = x; x 840 arch/x86/math-emu/fpu_trig.c unsigned long long x; x 845 arch/x86/math-emu/fpu_trig.c x = significand(&st1) - x 848 arch/x86/math-emu/fpu_trig.c x = (significand(&st1) x 851 arch/x86/math-emu/fpu_trig.c if ((x < significand(&tmp)) || x 853 arch/x86/math-emu/fpu_trig.c ((x == significand(&tmp)) x 856 arch/x86/math-emu/fpu_trig.c significand(&tmp) = x; x 43 arch/x86/math-emu/get_address.c #define REG_(x) (*(long *)(reg_offset[(x)] + (u_char *)FPU_info->regs)) x 55 arch/x86/math-emu/get_address.c #define VM86_REG_(x) (*(unsigned short *) \ x 56 arch/x86/math-emu/get_address.c (reg_offset_vm86[((unsigned)x)] + (u_char *)FPU_info->regs)) x 68 arch/x86/math-emu/get_address.c #define PM_REG_(x) (*(unsigned short *) \ x 69 arch/x86/math-emu/get_address.c (reg_offset_pm[((unsigned)x)] + (u_char *)FPU_info->regs)) x 32 arch/x86/math-emu/poly.h asmlinkage void polynomial_Xsig(Xsig *, const unsigned long long *x, x 45 arch/x86/math-emu/poly.h #define LL_MSW(x) (((unsigned long *)&x)[1]) x 51 arch/x86/math-emu/poly.h #define XSIG_LL(x) (*(unsigned long long *)&x.midw) x 105 arch/x86/math-emu/poly.h static inline void negate_Xsig(Xsig *x) x 112 arch/x86/math-emu/poly.h (*x):"g"(x):"si", "ax", "cx"); x 32 arch/x86/math-emu/poly_l2.c FPU_REG x; x 40 arch/x86/math-emu/poly_l2.c significand(&x) = -significand(st0_ptr); x 41 arch/x86/math-emu/poly_l2.c setexponent16(&x, -1); x 46 arch/x86/math-emu/poly_l2.c x.sigh = st0_ptr->sigh - 0x80000000; x 47 arch/x86/math-emu/poly_l2.c x.sigl = st0_ptr->sigl; x 48 arch/x86/math-emu/poly_l2.c setexponent16(&x, 0); x 51 arch/x86/math-emu/poly_l2.c tag = FPU_normalize_nuo(&x); x 57 arch/x86/math-emu/poly_l2.c log2_kernel(&x, argsign, &accumulator, &expon); x 103 arch/x86/math-emu/reg_add_sub.c FPU_REG x, y; x 108 arch/x86/math-emu/reg_add_sub.c FPU_to_exp16(a, &x); x 110 arch/x86/math-emu/reg_add_sub.c a = &x; x 234 arch/x86/math-emu/reg_add_sub.c FPU_REG x, y; x 239 arch/x86/math-emu/reg_add_sub.c FPU_to_exp16(a, &x); x 241 arch/x86/math-emu/reg_add_sub.c a = &x; x 29 arch/x86/math-emu/reg_compare.c FPU_REG x, y; x 123 arch/x86/math-emu/reg_compare.c FPU_to_exp16(st0_ptr, &x); x 125 arch/x86/math-emu/reg_compare.c st0_ptr = &x; x 72 arch/x86/math-emu/reg_constant.c #define DOWN_OR_CHOP(x) (x & RC_DOWN) x 17 arch/x86/math-emu/reg_convert.c int FPU_to_exp16(FPU_REG const *a, FPU_REG *x) x 21 arch/x86/math-emu/reg_convert.c *(long long *)&(x->sigl) = *(const long long *)&(a->sigl); x 24 arch/x86/math-emu/reg_convert.c setexponent16(x, exponent(a)); x 26 arch/x86/math-emu/reg_convert.c if (exponent16(x) == EXP_UNDER) { x 30 arch/x86/math-emu/reg_convert.c if (x->sigh & 0x80000000) { x 34 arch/x86/math-emu/reg_convert.c addexponent(x, 1); x 37 arch/x86/math-emu/reg_convert.c addexponent(x, 1); x 38 arch/x86/math-emu/reg_convert.c FPU_normalize_nuo(x); x 42 arch/x86/math-emu/reg_convert.c if (!(x->sigh & 0x80000000)) { x 30 arch/x86/math-emu/reg_divide.c FPU_REG x, y; x 77 arch/x86/math-emu/reg_divide.c reg_copy(a, &x); x 79 arch/x86/math-emu/reg_divide.c setpositive(&x); x 81 arch/x86/math-emu/reg_divide.c tag = FPU_u_div(&x, &y, dest, control_w, sign); x 101 arch/x86/math-emu/reg_divide.c FPU_to_exp16(a, &x); x 103 arch/x86/math-emu/reg_divide.c tag = FPU_u_div(&x, &y, dest, control_w, sign); x 61 arch/x86/math-emu/reg_mul.c FPU_REG x, y; x 65 arch/x86/math-emu/reg_mul.c FPU_to_exp16(a, &x); x 67 arch/x86/math-emu/reg_mul.c tag = FPU_u_mul(&x, &y, dest, control_w, sign, x 68 arch/x86/math-emu/reg_mul.c exponent16(&x) + exponent16(&y)); x 17 arch/x86/math-emu/status_w.h #define Const__(x) $##x x 19 arch/x86/math-emu/status_w.h #define Const__(x) x x 16 arch/x86/mm/extable.c ex_fixup_addr(const struct exception_table_entry *x) x 18 arch/x86/mm/extable.c return (unsigned long)&x->fixup + x->fixup; x 21 arch/x86/mm/extable.c ex_fixup_handler(const struct exception_table_entry *x) x 23 arch/x86/mm/extable.c return (ex_handler_t)((unsigned long)&x->handler + x->handler); x 17 arch/x86/mm/mem_encrypt_identity.c #define __pa(x) ((unsigned long)(x)) x 18 arch/x86/mm/mem_encrypt_identity.c #define __va(x) ((void *)((unsigned long)(x))) x 211 arch/x86/mm/pat.c #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) x 14 arch/x86/mm/physaddr.c unsigned long __phys_addr(unsigned long x) x 16 arch/x86/mm/physaddr.c unsigned long y = x - __START_KERNEL_map; x 19 arch/x86/mm/physaddr.c if (unlikely(x > y)) { x 20 arch/x86/mm/physaddr.c x = y + phys_base; x 24 arch/x86/mm/physaddr.c x = y + (__START_KERNEL_map - PAGE_OFFSET); x 27 arch/x86/mm/physaddr.c VIRTUAL_BUG_ON((x > y) || !phys_addr_valid(x)); x 30 arch/x86/mm/physaddr.c return x; x 34 arch/x86/mm/physaddr.c unsigned long __phys_addr_symbol(unsigned long x) x 36 arch/x86/mm/physaddr.c unsigned long y = x - __START_KERNEL_map; x 46 arch/x86/mm/physaddr.c bool __virt_addr_valid(unsigned long x) x 48 arch/x86/mm/physaddr.c unsigned long y = x - __START_KERNEL_map; x 51 arch/x86/mm/physaddr.c if (unlikely(x > y)) { x 52 arch/x86/mm/physaddr.c x = y + phys_base; x 57 arch/x86/mm/physaddr.c x = y + (__START_KERNEL_map - PAGE_OFFSET); x 60 arch/x86/mm/physaddr.c if ((x > y) || !phys_addr_valid(x)) x 64 arch/x86/mm/physaddr.c return pfn_valid(x >> PAGE_SHIFT); x 71 arch/x86/mm/physaddr.c unsigned long __phys_addr(unsigned long x) x 73 arch/x86/mm/physaddr.c unsigned long phys_addr = x - PAGE_OFFSET; x 75 arch/x86/mm/physaddr.c VIRTUAL_BUG_ON(x < PAGE_OFFSET); x 76 arch/x86/mm/physaddr.c VIRTUAL_BUG_ON(__vmalloc_start_set && is_vmalloc_addr((void *) x)); x 80 arch/x86/mm/physaddr.c BUG_ON(slow_virt_to_phys((void *)x) != phys_addr); x 87 arch/x86/mm/physaddr.c bool __virt_addr_valid(unsigned long x) x 89 arch/x86/mm/physaddr.c if (x < PAGE_OFFSET) x 91 arch/x86/mm/physaddr.c if (__vmalloc_start_set && is_vmalloc_addr((void *) x)) x 93 arch/x86/mm/physaddr.c if (x >= FIXADDR_START) x 95 arch/x86/mm/physaddr.c return pfn_valid((x - PAGE_OFFSET) >> PAGE_SHIFT); x 345 arch/x86/oprofile/op_model_p4.c #define MISC_PMC_ENABLED_P(x) ((x) & 1 << 7) x 197 arch/x86/pci/direct.c u32 x = 0; x 208 arch/x86/pci/direct.c if (o->read(0, 0, devfn, PCI_CLASS_DEVICE, 2, &x)) x 210 arch/x86/pci/direct.c if (x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA) x 213 arch/x86/pci/direct.c if (o->read(0, 0, devfn, PCI_VENDOR_ID, 2, &x)) x 215 arch/x86/pci/direct.c if (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ) x 671 arch/x86/pci/fixup.c #define AMD_141b_MMIO_BASE(x) (0x80 + (x) * 0x8) x 676 arch/x86/pci/fixup.c #define AMD_141b_MMIO_LIMIT(x) (0x84 + (x) * 0x8) x 679 arch/x86/pci/fixup.c #define AMD_141b_MMIO_HIGH(x) (0x180 + (x) * 0x4) x 178 arch/x86/pci/irq.c u8 x; x 181 arch/x86/pci/irq.c pci_read_config_byte(router, reg, &x); x 182 arch/x86/pci/irq.c return (nr & 1) ? (x >> 4) : (x & 0xf); x 188 arch/x86/pci/irq.c u8 x; x 191 arch/x86/pci/irq.c pci_read_config_byte(router, reg, &x); x 192 arch/x86/pci/irq.c x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val); x 193 arch/x86/pci/irq.c pci_write_config_byte(router, reg, x); x 228 arch/x86/pci/irq.c u8 x; x 230 arch/x86/pci/irq.c pci_read_config_byte(router, pirq, &x); x 231 arch/x86/pci/irq.c return (x < 16) ? x : 0; x 398 arch/x86/pci/irq.c u8 x; x 404 arch/x86/pci/irq.c pci_read_config_byte(router, reg, &x); x 405 arch/x86/pci/irq.c return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK); x 410 arch/x86/pci/irq.c u8 x; x 416 arch/x86/pci/irq.c pci_read_config_byte(router, reg, &x); x 417 arch/x86/pci/irq.c x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE); x 418 arch/x86/pci/irq.c x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE; x 419 arch/x86/pci/irq.c pci_write_config_byte(router, reg, x); x 520 arch/x86/pci/irq.c unsigned int x; x 522 arch/x86/pci/irq.c x = inb(0x26); x 523 arch/x86/pci/irq.c x = ((pirq - 1) & 1) ? ((x & 0x0f) | (irq << 4)) : ((x & 0xf0) | (irq)); x 524 arch/x86/pci/irq.c outb(x, 0x26); x 33 arch/x86/platform/intel-mid/pwr.c #define PM_WKC(x) (0x10 + (x) * 4) x 34 arch/x86/platform/intel-mid/pwr.c #define PM_WKS(x) (0x18 + (x) * 4) x 35 arch/x86/platform/intel-mid/pwr.c #define PM_SSC(x) (0x20 + (x) * 4) x 36 arch/x86/platform/intel-mid/pwr.c #define PM_SSS(x) (0x30 + (x) * 4) x 42 arch/x86/platform/intel-mid/pwr.c #define PM_CMD_CMD(x) ((x) << 0) x 62 arch/x86/platform/intel-mid/pwr.c #define PM_ICS_INT_STATUS(x) ((x) & 0xff) x 73 arch/x86/platform/intel-quark/imr.c #define imr_to_phys(x) ((x) << IMR_SHIFT) x 74 arch/x86/platform/intel-quark/imr.c #define phys_to_imr(x) ((x) >> IMR_SHIFT) x 321 arch/x86/tools/relocs.c #define elf_half_to_cpu(x) elf16_to_cpu(x) x 322 arch/x86/tools/relocs.c #define elf_word_to_cpu(x) elf32_to_cpu(x) x 329 arch/x86/tools/relocs.c #define elf_addr_to_cpu(x) elf64_to_cpu(x) x 330 arch/x86/tools/relocs.c #define elf_off_to_cpu(x) elf64_to_cpu(x) x 331 arch/x86/tools/relocs.c #define elf_xword_to_cpu(x) elf64_to_cpu(x) x 333 arch/x86/tools/relocs.c #define elf_addr_to_cpu(x) elf32_to_cpu(x) x 334 arch/x86/tools/relocs.c #define elf_off_to_cpu(x) elf32_to_cpu(x) x 335 arch/x86/tools/relocs.c #define elf_xword_to_cpu(x) elf32_to_cpu(x) x 22 arch/x86/tools/relocs.h #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 29 arch/x86/um/asm/elf.h #define elf_check_arch(x) \ x 30 arch/x86/um/asm/elf.h (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486)) x 124 arch/x86/um/asm/elf.h #define elf_check_arch(x) \ x 125 arch/x86/um/asm/elf.h ((x)->e_machine == EM_X86_64) x 34 arch/x86/xen/apic.c static u32 xen_set_apic_id(unsigned int x) x 37 arch/x86/xen/apic.c return x; x 40 arch/x86/xen/apic.c static unsigned int xen_get_apic_id(unsigned long x) x 42 arch/x86/xen/apic.c return ((x)>>24) & 0xFFu; x 1141 arch/x86/xen/enlighten_pv.c #define C(x) info->x = op.u.firmware_info.u.disk_info.x x 37 arch/x86/xen/setup.c #define GB(x) ((uint64_t)(x) * 1024 * 1024 * 1024) x 6 arch/x86/xen/trace.c #define HYPERCALL(x) [__HYPERVISOR_##x] = "("#x")", x 28 arch/xtensa/include/asm/bitops.h static inline unsigned long __cntlz (unsigned long x) x 31 arch/xtensa/include/asm/bitops.h asm ("nsau %0, %1" : "=r" (lz) : "r" (x)); x 40 arch/xtensa/include/asm/bitops.h static inline int ffz(unsigned long x) x 42 arch/xtensa/include/asm/bitops.h return 31 - __cntlz(~x & -~x); x 49 arch/xtensa/include/asm/bitops.h static inline unsigned long __ffs(unsigned long x) x 51 arch/xtensa/include/asm/bitops.h return 31 - __cntlz(x & -x); x 60 arch/xtensa/include/asm/bitops.h static inline int ffs(unsigned long x) x 62 arch/xtensa/include/asm/bitops.h return 32 - __cntlz(x & -x); x 70 arch/xtensa/include/asm/bitops.h static inline int fls (unsigned int x) x 72 arch/xtensa/include/asm/bitops.h return 32 - __cntlz(x); x 171 arch/xtensa/include/asm/cmpxchg.h #define xchg(ptr,x) \ x 172 arch/xtensa/include/asm/cmpxchg.h ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) x 174 arch/xtensa/include/asm/cmpxchg.h static inline u32 xchg_small(volatile void *ptr, u32 x, int size) x 190 arch/xtensa/include/asm/cmpxchg.h newv = (oldv & ~bitmask) | (x << bitoff); x 205 arch/xtensa/include/asm/cmpxchg.h __xchg(unsigned long x, volatile void * ptr, int size) x 209 arch/xtensa/include/asm/cmpxchg.h return xchg_small(ptr, x, 1); x 211 arch/xtensa/include/asm/cmpxchg.h return xchg_small(ptr, x, 2); x 213 arch/xtensa/include/asm/cmpxchg.h return xchg_u32(ptr, x); x 216 arch/xtensa/include/asm/cmpxchg.h return x; x 81 arch/xtensa/include/asm/coprocessor.h #define XTENSA_HAVE_COPROCESSOR(x) \ x 82 arch/xtensa/include/asm/coprocessor.h ((XCHAL_CP_MASK ^ XCHAL_CP_PORT_MASK) & (1 << (x))) x 85 arch/xtensa/include/asm/coprocessor.h #define XTENSA_HAVE_IO_PORT(x) \ x 86 arch/xtensa/include/asm/coprocessor.h (XCHAL_CP_PORT_MASK & (1 << (x))) x 93 arch/xtensa/include/asm/elf.h #define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) || \ x 94 arch/xtensa/include/asm/elf.h ( (x)->e_machine == EM_XTENSA_OLD ) ) x 51 arch/xtensa/include/asm/fixmap.h #define __fix_to_virt(x) (FIXADDR_START + ((x) << PAGE_SHIFT)) x 52 arch/xtensa/include/asm/fixmap.h #define __virt_to_fix(x) (((x) - FIXADDR_START) >> PAGE_SHIFT) x 22 arch/xtensa/include/asm/io.h #define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x)) x 52 arch/xtensa/include/asm/mmu_context.h #define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8)) x 89 arch/xtensa/include/asm/page.h #define __pgprot(x) (x) x 102 arch/xtensa/include/asm/page.h #define pte_val(x) ((x).pte) x 103 arch/xtensa/include/asm/page.h #define pgd_val(x) ((x).pgd) x 104 arch/xtensa/include/asm/page.h #define pgprot_val(x) ((x).pgprot) x 106 arch/xtensa/include/asm/page.h #define __pte(x) ((pte_t) { (x) } ) x 107 arch/xtensa/include/asm/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 108 arch/xtensa/include/asm/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 174 arch/xtensa/include/asm/page.h #define __pa(x) ___pa((unsigned long)(x)) x 176 arch/xtensa/include/asm/page.h #define __pa(x) \ x 177 arch/xtensa/include/asm/page.h ((unsigned long) (x) - PAGE_OFFSET + PHYS_OFFSET) x 179 arch/xtensa/include/asm/page.h #define __va(x) \ x 180 arch/xtensa/include/asm/page.h ((void *)((unsigned long) (x) - PHYS_OFFSET + PAGE_OFFSET)) x 296 arch/xtensa/include/asm/pgtable.h #define pte_page(x) pfn_to_page(pte_pfn(x)) x 397 arch/xtensa/include/asm/pgtable.h #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) x 226 arch/xtensa/include/asm/processor.h #define xtensa_set_sr(x, sr) \ x 228 arch/xtensa/include/asm/processor.h unsigned int v = (unsigned int)(x); \ x 62 arch/xtensa/include/asm/uaccess.h #define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) x 63 arch/xtensa/include/asm/uaccess.h #define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) x 71 arch/xtensa/include/asm/uaccess.h #define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) x 72 arch/xtensa/include/asm/uaccess.h #define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) x 77 arch/xtensa/include/asm/uaccess.h #define __put_user_nocheck(x, ptr, size) \ x 80 arch/xtensa/include/asm/uaccess.h __put_user_size((x), (ptr), (size), __pu_err); \ x 84 arch/xtensa/include/asm/uaccess.h #define __put_user_check(x, ptr, size) \ x 89 arch/xtensa/include/asm/uaccess.h __put_user_size((x), __pu_addr, (size), __pu_err); \ x 93 arch/xtensa/include/asm/uaccess.h #define __put_user_size(x, ptr, size, retval) \ x 98 arch/xtensa/include/asm/uaccess.h case 1: __put_user_asm(x, ptr, retval, 1, "s8i", __cb); break; \ x 99 arch/xtensa/include/asm/uaccess.h case 2: __put_user_asm(x, ptr, retval, 2, "s16i", __cb); break; \ x 100 arch/xtensa/include/asm/uaccess.h case 4: __put_user_asm(x, ptr, retval, 4, "s32i", __cb); break; \ x 102 arch/xtensa/include/asm/uaccess.h __typeof__(*ptr) __v64 = x; \ x 171 arch/xtensa/include/asm/uaccess.h :[x] "r"(x_), [addr] "r"(addr_), [efault] "i"(-EFAULT)) x 173 arch/xtensa/include/asm/uaccess.h #define __get_user_nocheck(x, ptr, size) \ x 176 arch/xtensa/include/asm/uaccess.h __get_user_size((x), (ptr), (size), __gu_err); \ x 180 arch/xtensa/include/asm/uaccess.h #define __get_user_check(x, ptr, size) \ x 185 arch/xtensa/include/asm/uaccess.h __get_user_size((x), __gu_addr, (size), __gu_err); \ x 187 arch/xtensa/include/asm/uaccess.h (x) = 0; \ x 193 arch/xtensa/include/asm/uaccess.h #define __get_user_size(x, ptr, size, retval) \ x 198 arch/xtensa/include/asm/uaccess.h case 1: __get_user_asm(x, ptr, retval, 1, "l8ui", __cb); break;\ x 199 arch/xtensa/include/asm/uaccess.h case 2: __get_user_asm(x, ptr, retval, 2, "l16ui", __cb); break;\ x 200 arch/xtensa/include/asm/uaccess.h case 4: __get_user_asm(x, ptr, retval, 4, "l32i", __cb); break;\ x 205 arch/xtensa/include/asm/uaccess.h (x) = 0; \ x 207 arch/xtensa/include/asm/uaccess.h (x) = *(__force __typeof__((ptr)))&__x; \ x 211 arch/xtensa/include/asm/uaccess.h default: (x) = 0; __get_user_bad(); \ x 238 arch/xtensa/include/asm/uaccess.h :[err] "+r"(err_), [tmp] "=r"(cb), [x] "+r"(__x) \ x 20 arch/xtensa/include/uapi/asm/swab.h static inline __attribute_const__ __u32 __arch_swab32(__u32 x) x 30 arch/xtensa/include/uapi/asm/swab.h : "a" (x) x 36 arch/xtensa/include/uapi/asm/swab.h static inline __attribute_const__ __u16 __arch_swab16(__u16 x) x 64 arch/xtensa/include/uapi/asm/swab.h : "a" (x) x 18 arch/xtensa/include/uapi/asm/types.h # define __XTENSA_UL(x) (x) x 19 arch/xtensa/include/uapi/asm/types.h # define __XTENSA_UL_CONST(x) x x 21 arch/xtensa/include/uapi/asm/types.h # define __XTENSA_UL(x) ((unsigned long)(x)) x 22 arch/xtensa/include/uapi/asm/types.h # define ___XTENSA_UL_CONST(x) x##UL x 23 arch/xtensa/include/uapi/asm/types.h # define __XTENSA_UL_CONST(x) ___XTENSA_UL_CONST(x) x 140 arch/xtensa/kernel/signal.c #define COPY(x) err |= __put_user(regs->x, &sc->sc_##x) x 180 arch/xtensa/kernel/signal.c #define COPY(x) err |= __get_user(regs->x, &sc->sc_##x) x 80 arch/xtensa/kernel/traps.c #define COPROCESSOR(x) \ x 81 arch/xtensa/kernel/traps.c { EXCCAUSE_COPROCESSOR ## x ## _DISABLED, USER, fast_coprocessor } x 36 block/bio.c #define BV(x, n) { .nr_vecs = x, .name = "biovec-"#n } x 196 crypto/adiantum.c u64 x = le64_to_cpu(v1->b); x 199 crypto/adiantum.c r->b = cpu_to_le64(x + y); x 201 crypto/adiantum.c (x + y < x)); x 207 crypto/adiantum.c u64 x = le64_to_cpu(v1->b); x 210 crypto/adiantum.c r->b = cpu_to_le64(x - y); x 212 crypto/adiantum.c (x - y > x)); x 59 crypto/aes_generic.c static inline u8 byte(const u32 x, const unsigned n) x 61 crypto/aes_generic.c return x >> (n << 3); x 36 crypto/asymmetric_keys/verify_pefile.c #define chkaddr(base, x, s) \ x 38 crypto/asymmetric_keys/verify_pefile.c if ((x) < base || (s) >= datalen || (x) > datalen - (s)) \ x 542 crypto/asymmetric_keys/x509_cert_parser.c #define dec2bin(X) ({ unsigned char x = (X) - '0'; if (x > 9) goto invalid_time; x; }) x 543 crypto/asymmetric_keys/x509_cert_parser.c #define DD2bin(P) ({ unsigned x = dec2bin(P[0]) * 10 + dec2bin(P[1]); P += 2; x; }) x 296 crypto/blowfish_common.c #define GET32_3(x) (((x) & 0xff)) x 297 crypto/blowfish_common.c #define GET32_2(x) (((x) >> (8)) & (0xff)) x 298 crypto/blowfish_common.c #define GET32_1(x) (((x) >> (16)) & (0xff)) x 299 crypto/blowfish_common.c #define GET32_0(x) (((x) >> (24)) & (0xff)) x 301 crypto/blowfish_common.c #define bf_F(x) (((S[GET32_0(x)] + S[256 + GET32_1(x)]) ^ \ x 302 crypto/blowfish_common.c S[512 + GET32_2(x)]) + S[768 + GET32_3(x)]) x 26 crypto/blowfish_generic.c #define GET32_3(x) (((x) & 0xff)) x 27 crypto/blowfish_generic.c #define GET32_2(x) (((x) >> (8)) & (0xff)) x 28 crypto/blowfish_generic.c #define GET32_1(x) (((x) >> (16)) & (0xff)) x 29 crypto/blowfish_generic.c #define GET32_0(x) (((x) >> (24)) & (0xff)) x 31 crypto/blowfish_generic.c #define bf_F(x) (((S[GET32_0(x)] + S[256 + GET32_1(x)]) ^ \ x 32 crypto/blowfish_generic.c S[512 + GET32_2(x)]) + S[768 + GET32_3(x)]) x 404 crypto/cast5_generic.c static void key_schedule(u32 *x, u32 *z, u32 *k) x 407 crypto/cast5_generic.c #define xi(i) ((x[(i)/4] >> (8*(3-((i)%4)))) & 0xff) x 410 crypto/cast5_generic.c z[0] = x[0] ^ s5[xi(13)] ^ s6[xi(15)] ^ s7[xi(12)] ^ sb8[xi(14)] ^ x 412 crypto/cast5_generic.c z[1] = x[2] ^ s5[zi(0)] ^ s6[zi(2)] ^ s7[zi(1)] ^ sb8[zi(3)] ^ x 414 crypto/cast5_generic.c z[2] = x[3] ^ s5[zi(7)] ^ s6[zi(6)] ^ s7[zi(5)] ^ sb8[zi(4)] ^ x 416 crypto/cast5_generic.c z[3] = x[1] ^ s5[zi(10)] ^ s6[zi(9)] ^ s7[zi(11)] ^ sb8[zi(8)] ^ x 426 crypto/cast5_generic.c x[0] = z[2] ^ s5[zi(5)] ^ s6[zi(7)] ^ s7[zi(4)] ^ sb8[zi(6)] ^ x 428 crypto/cast5_generic.c x[1] = z[0] ^ s5[xi(0)] ^ s6[xi(2)] ^ s7[xi(1)] ^ sb8[xi(3)] ^ x 430 crypto/cast5_generic.c x[2] = z[1] ^ s5[xi(7)] ^ s6[xi(6)] ^ s7[xi(5)] ^ sb8[xi(4)] ^ x 432 crypto/cast5_generic.c x[3] = z[3] ^ s5[xi(10)] ^ s6[xi(9)] ^ s7[xi(11)] ^ sb8[xi(8)] ^ x 442 crypto/cast5_generic.c z[0] = x[0] ^ s5[xi(13)] ^ s6[xi(15)] ^ s7[xi(12)] ^ sb8[xi(14)] ^ x 444 crypto/cast5_generic.c z[1] = x[2] ^ s5[zi(0)] ^ s6[zi(2)] ^ s7[zi(1)] ^ sb8[zi(3)] ^ x 446 crypto/cast5_generic.c z[2] = x[3] ^ s5[zi(7)] ^ s6[zi(6)] ^ s7[zi(5)] ^ sb8[zi(4)] ^ x 448 crypto/cast5_generic.c z[3] = x[1] ^ s5[zi(10)] ^ s6[zi(9)] ^ s7[zi(11)] ^ sb8[zi(8)] ^ x 458 crypto/cast5_generic.c x[0] = z[2] ^ s5[zi(5)] ^ s6[zi(7)] ^ s7[zi(4)] ^ sb8[zi(6)] ^ x 460 crypto/cast5_generic.c x[1] = z[0] ^ s5[xi(0)] ^ s6[xi(2)] ^ s7[xi(1)] ^ sb8[xi(3)] ^ x 462 crypto/cast5_generic.c x[2] = z[1] ^ s5[xi(7)] ^ s6[xi(6)] ^ s7[xi(5)] ^ sb8[xi(4)] ^ x 464 crypto/cast5_generic.c x[3] = z[3] ^ s5[xi(10)] ^ s6[xi(9)] ^ s7[xi(11)] ^ sb8[xi(8)] ^ x 483 crypto/cast5_generic.c u32 x[4]; x 494 crypto/cast5_generic.c x[0] = be32_to_cpu(p_key[0]); x 495 crypto/cast5_generic.c x[1] = be32_to_cpu(p_key[1]); x 496 crypto/cast5_generic.c x[2] = be32_to_cpu(p_key[2]); x 497 crypto/cast5_generic.c x[3] = be32_to_cpu(p_key[3]); x 499 crypto/cast5_generic.c key_schedule(x, z, k); x 502 crypto/cast5_generic.c key_schedule(x, z, k); x 25 crypto/crypto_user_base.c #define null_terminated(x) (strnlen(x, sizeof(x)) < sizeof(x)) x 22 crypto/crypto_user_stat.c #define null_terminated(x) (strnlen(x, sizeof(x)) < sizeof(x)) x 80 crypto/ecc.c p->x = ecc_alloc_digits_space(ndigits); x 81 crypto/ecc.c if (!p->x) x 93 crypto/ecc.c ecc_free_digits_space(p->x); x 104 crypto/ecc.c kzfree(p->x); x 938 crypto/ecc.c return (vli_is_zero(point->x, point->ndigits) && x 1162 crypto/ecc.c vli_set(rx[1], point->x, ndigits); x 1186 crypto/ecc.c vli_mod_mult_fast(z, z, point->x, curve_prime, ndigits); x 1201 crypto/ecc.c vli_set(result->x, rx[0], ndigits); x 1215 crypto/ecc.c vli_set(result->x, q->x, ndigits); x 1217 crypto/ecc.c vli_mod_sub(z, result->x, p->x, curve->p, ndigits); x 1218 crypto/ecc.c vli_set(px, p->x, ndigits); x 1220 crypto/ecc.c xycz_add(px, py, result->x, result->y, curve->p, ndigits); x 1222 crypto/ecc.c apply_z(result->x, result->y, z, curve->p, ndigits); x 1235 crypto/ecc.c u64 *rx = result->x; x 1257 crypto/ecc.c vli_set(rx, point->x, ndigits); x 1271 crypto/ecc.c vli_set(tx, point->x, ndigits); x 1412 crypto/ecc.c ecc_swap_digits(pk->x, public_key, ndigits); x 1436 crypto/ecc.c if (vli_cmp(curve->p, pk->x, pk->ndigits) != 1) x 1443 crypto/ecc.c vli_mod_square_fast(xxx, pk->x, curve->p, pk->ndigits); /* x^2 */ x 1444 crypto/ecc.c vli_mod_mult_fast(xxx, xxx, pk->x, curve->p, pk->ndigits); /* x^3 */ x 1445 crypto/ecc.c vli_mod_mult_fast(w, curve->a, pk->x, curve->p, pk->ndigits); /* a·x */ x 1482 crypto/ecc.c ecc_swap_digits(public_key, pk->x, ndigits); x 1498 crypto/ecc.c ecc_swap_digits(product->x, secret, ndigits); x 44 crypto/ecc.h u64 *x; x 49 crypto/ecc.h #define ECC_POINT_INIT(x, y, ndigits) (struct ecc_point) { x, y, ndigits } x 242 crypto/ecc.h const u64 *x, const struct ecc_point *p, x 21 crypto/ecc_curve_defs.h .x = nist_p192_g_x, x 47 crypto/ecc_curve_defs.h .x = nist_p256_g_x, x 94 crypto/ecrdsa.c !ctx->pub_key.x || x 139 crypto/ecrdsa.c if (vli_cmp(cc.x, ctx->curve->n, ndigits) == 1) x 140 crypto/ecrdsa.c vli_sub(cc.x, cc.x, ctx->curve->n, ndigits); x 143 crypto/ecrdsa.c if (!vli_cmp(cc.x, r, ndigits)) x 241 crypto/ecrdsa.c vli_from_le64(ctx->pub_key.x, ctx->key, ndigits); x 51 crypto/ecrdsa_defs.h .x = cp256a_g_x, x 84 crypto/ecrdsa_defs.h .x = cp256b_g_x, x 121 crypto/ecrdsa_defs.h .x = cp256c_g_x, x 170 crypto/ecrdsa_defs.h .x = tc512a_g_x, x 215 crypto/ecrdsa_defs.h .x = tc512b_g_x, x 76 crypto/fcrypt.c #define Z(x) cpu_to_be32(x << 3) x 113 crypto/fcrypt.c #define Z(x) cpu_to_be32(((x & 0x1f) << 27) | (x >> 5)) x 150 crypto/fcrypt.c #define Z(x) cpu_to_be32(x << 11) x 187 crypto/fcrypt.c #define Z(x) cpu_to_be32(x << 19) x 139 crypto/gf128mul.c static void gf128mul_x8_lle(be128 *x) x 141 crypto/gf128mul.c u64 a = be64_to_cpu(x->a); x 142 crypto/gf128mul.c u64 b = be64_to_cpu(x->b); x 145 crypto/gf128mul.c x->b = cpu_to_be64((b >> 8) | (a << 56)); x 146 crypto/gf128mul.c x->a = cpu_to_be64((a >> 8) ^ (_tt << 48)); x 149 crypto/gf128mul.c static void gf128mul_x8_bbe(be128 *x) x 151 crypto/gf128mul.c u64 a = be64_to_cpu(x->a); x 152 crypto/gf128mul.c u64 b = be64_to_cpu(x->b); x 155 crypto/gf128mul.c x->a = cpu_to_be64((a << 8) | (b >> 56)); x 156 crypto/gf128mul.c x->b = cpu_to_be64((b << 8) ^ _tt); x 159 crypto/gf128mul.c void gf128mul_x8_ble(le128 *r, const le128 *x) x 161 crypto/gf128mul.c u64 a = le64_to_cpu(x->a); x 162 crypto/gf128mul.c u64 b = le64_to_cpu(x->b); x 42 crypto/md4.c static inline u32 lshift(u32 x, unsigned int s) x 44 crypto/md4.c x &= 0xFFFFFFFF; x 45 crypto/md4.c return ((x << s) & 0xFFFFFFFF) | (x >> (32 - s)); x 48 crypto/md4.c static inline u32 F(u32 x, u32 y, u32 z) x 50 crypto/md4.c return (x & y) | ((~x) & z); x 53 crypto/md4.c static inline u32 G(u32 x, u32 y, u32 z) x 55 crypto/md4.c return (x & y) | (x & z) | (y & z); x 58 crypto/md4.c static inline u32 H(u32 x, u32 y, u32 z) x 60 crypto/md4.c return x ^ y ^ z; x 35 crypto/md5.c #define F1(x, y, z) (z ^ (x & (y ^ z))) x 36 crypto/md5.c #define F2(x, y, z) F1(z, x, y) x 37 crypto/md5.c #define F3(x, y, z) (x ^ y ^ z) x 38 crypto/md5.c #define F4(x, y, z) (y ^ (x | ~z)) x 40 crypto/md5.c #define MD5STEP(f, w, x, y, z, in, s) \ x 41 crypto/md5.c (w += f(x, y, z) + in, w = (w<<s | w>>(32-s)) + x) x 35 crypto/rmd128.c #define F1(x, y, z) (x ^ y ^ z) /* XOR */ x 36 crypto/rmd128.c #define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */ x 37 crypto/rmd128.c #define F3(x, y, z) ((x | ~y) ^ z) x 38 crypto/rmd128.c #define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */ x 40 crypto/rmd128.c #define ROUND(a, b, c, d, f, k, x, s) { \ x 41 crypto/rmd128.c (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \ x 37 crypto/rmd160.c #define F1(x, y, z) (x ^ y ^ z) /* XOR */ x 38 crypto/rmd160.c #define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */ x 39 crypto/rmd160.c #define F3(x, y, z) ((x | ~y) ^ z) x 40 crypto/rmd160.c #define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */ x 41 crypto/rmd160.c #define F5(x, y, z) (x ^ (y | ~z)) x 43 crypto/rmd160.c #define ROUND(a, b, c, d, e, f, k, x, s) { \ x 44 crypto/rmd160.c (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \ x 35 crypto/rmd256.c #define F1(x, y, z) (x ^ y ^ z) /* XOR */ x 36 crypto/rmd256.c #define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */ x 37 crypto/rmd256.c #define F3(x, y, z) ((x | ~y) ^ z) x 38 crypto/rmd256.c #define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */ x 40 crypto/rmd256.c #define ROUND(a, b, c, d, f, k, x, s) { \ x 41 crypto/rmd256.c (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \ x 37 crypto/rmd320.c #define F1(x, y, z) (x ^ y ^ z) /* XOR */ x 38 crypto/rmd320.c #define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */ x 39 crypto/rmd320.c #define F3(x, y, z) ((x | ~y) ^ z) x 40 crypto/rmd320.c #define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */ x 41 crypto/rmd320.c #define F5(x, y, z) (x ^ (y | ~z)) x 43 crypto/rmd320.c #define ROUND(a, b, c, d, e, f, k, x, s) { \ x 44 crypto/rmd320.c (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \ x 37 crypto/salsa20_generic.c u32 x[16]; x 40 crypto/salsa20_generic.c memcpy(x, state, sizeof(x)); x 43 crypto/salsa20_generic.c x[ 4] ^= rol32((x[ 0] + x[12]), 7); x 44 crypto/salsa20_generic.c x[ 8] ^= rol32((x[ 4] + x[ 0]), 9); x 45 crypto/salsa20_generic.c x[12] ^= rol32((x[ 8] + x[ 4]), 13); x 46 crypto/salsa20_generic.c x[ 0] ^= rol32((x[12] + x[ 8]), 18); x 47 crypto/salsa20_generic.c x[ 9] ^= rol32((x[ 5] + x[ 1]), 7); x 48 crypto/salsa20_generic.c x[13] ^= rol32((x[ 9] + x[ 5]), 9); x 49 crypto/salsa20_generic.c x[ 1] ^= rol32((x[13] + x[ 9]), 13); x 50 crypto/salsa20_generic.c x[ 5] ^= rol32((x[ 1] + x[13]), 18); x 51 crypto/salsa20_generic.c x[14] ^= rol32((x[10] + x[ 6]), 7); x 52 crypto/salsa20_generic.c x[ 2] ^= rol32((x[14] + x[10]), 9); x 53 crypto/salsa20_generic.c x[ 6] ^= rol32((x[ 2] + x[14]), 13); x 54 crypto/salsa20_generic.c x[10] ^= rol32((x[ 6] + x[ 2]), 18); x 55 crypto/salsa20_generic.c x[ 3] ^= rol32((x[15] + x[11]), 7); x 56 crypto/salsa20_generic.c x[ 7] ^= rol32((x[ 3] + x[15]), 9); x 57 crypto/salsa20_generic.c x[11] ^= rol32((x[ 7] + x[ 3]), 13); x 58 crypto/salsa20_generic.c x[15] ^= rol32((x[11] + x[ 7]), 18); x 59 crypto/salsa20_generic.c x[ 1] ^= rol32((x[ 0] + x[ 3]), 7); x 60 crypto/salsa20_generic.c x[ 2] ^= rol32((x[ 1] + x[ 0]), 9); x 61 crypto/salsa20_generic.c x[ 3] ^= rol32((x[ 2] + x[ 1]), 13); x 62 crypto/salsa20_generic.c x[ 0] ^= rol32((x[ 3] + x[ 2]), 18); x 63 crypto/salsa20_generic.c x[ 6] ^= rol32((x[ 5] + x[ 4]), 7); x 64 crypto/salsa20_generic.c x[ 7] ^= rol32((x[ 6] + x[ 5]), 9); x 65 crypto/salsa20_generic.c x[ 4] ^= rol32((x[ 7] + x[ 6]), 13); x 66 crypto/salsa20_generic.c x[ 5] ^= rol32((x[ 4] + x[ 7]), 18); x 67 crypto/salsa20_generic.c x[11] ^= rol32((x[10] + x[ 9]), 7); x 68 crypto/salsa20_generic.c x[ 8] ^= rol32((x[11] + x[10]), 9); x 69 crypto/salsa20_generic.c x[ 9] ^= rol32((x[ 8] + x[11]), 13); x 70 crypto/salsa20_generic.c x[10] ^= rol32((x[ 9] + x[ 8]), 18); x 71 crypto/salsa20_generic.c x[12] ^= rol32((x[15] + x[14]), 7); x 72 crypto/salsa20_generic.c x[13] ^= rol32((x[12] + x[15]), 9); x 73 crypto/salsa20_generic.c x[14] ^= rol32((x[13] + x[12]), 13); x 74 crypto/salsa20_generic.c x[15] ^= rol32((x[14] + x[13]), 18); x 78 crypto/salsa20_generic.c stream[i] = cpu_to_le32(x[i] + state[i]); x 27 crypto/seed.c byte(const u32 x, const unsigned n) x 29 crypto/seed.c return x >> (n << 3); x 43 crypto/sha512_generic.c static inline u64 Ch(u64 x, u64 y, u64 z) x 45 crypto/sha512_generic.c return z ^ (x & (y ^ z)); x 48 crypto/sha512_generic.c static inline u64 Maj(u64 x, u64 y, u64 z) x 50 crypto/sha512_generic.c return (x & y) | (z & (x | y)); x 83 crypto/sha512_generic.c #define e0(x) (ror64(x,28) ^ ror64(x,34) ^ ror64(x,39)) x 84 crypto/sha512_generic.c #define e1(x) (ror64(x,14) ^ ror64(x,18) ^ ror64(x,41)) x 85 crypto/sha512_generic.c #define s0(x) (ror64(x, 1) ^ ror64(x, 8) ^ (x >> 7)) x 86 crypto/sha512_generic.c #define s1(x) (ror64(x,19) ^ ror64(x,61) ^ (x >> 6)) x 29 crypto/sm3_generic.c static inline u32 p0(u32 x) x 31 crypto/sm3_generic.c return x ^ rol32(x, 9) ^ rol32(x, 17); x 34 crypto/sm3_generic.c static inline u32 p1(u32 x) x 36 crypto/sm3_generic.c return x ^ rol32(x, 15) ^ rol32(x, 23); x 69 crypto/sm4_generic.c static u32 sm4_t_non_lin_sub(u32 x) x 72 crypto/sm4_generic.c u8 *b = (u8 *)&x; x 77 crypto/sm4_generic.c return x; x 80 crypto/sm4_generic.c static u32 sm4_key_lin_sub(u32 x) x 82 crypto/sm4_generic.c return x ^ rol32(x, 13) ^ rol32(x, 23); x 86 crypto/sm4_generic.c static u32 sm4_enc_lin_sub(u32 x) x 88 crypto/sm4_generic.c return x ^ rol32(x, 2) ^ rol32(x, 10) ^ rol32(x, 18) ^ rol32(x, 24); x 91 crypto/sm4_generic.c static u32 sm4_key_sub(u32 x) x 93 crypto/sm4_generic.c return sm4_key_lin_sub(sm4_t_non_lin_sub(x)); x 96 crypto/sm4_generic.c static u32 sm4_enc_sub(u32 x) x 98 crypto/sm4_generic.c return sm4_enc_lin_sub(sm4_t_non_lin_sub(x)); x 101 crypto/sm4_generic.c static u32 sm4_round(const u32 *x, const u32 rk) x 103 crypto/sm4_generic.c return x[0] ^ sm4_enc_sub(x[1] ^ x[2] ^ x[3] ^ rk); x 174 crypto/sm4_generic.c u32 x[4], i, t; x 177 crypto/sm4_generic.c x[i] = get_unaligned_be32(&in[i]); x 180 crypto/sm4_generic.c t = sm4_round(x, rk[i]); x 181 crypto/sm4_generic.c x[0] = x[1]; x 182 crypto/sm4_generic.c x[1] = x[2]; x 183 crypto/sm4_generic.c x[2] = x[3]; x 184 crypto/sm4_generic.c x[3] = t; x 188 crypto/sm4_generic.c put_unaligned_be32(x[3 - i], &out[i]); x 851 crypto/streebog_generic.c static void streebog_xor(const struct streebog_uint512 *x, x 855 crypto/streebog_generic.c z->qword[0] = x->qword[0] ^ y->qword[0]; x 856 crypto/streebog_generic.c z->qword[1] = x->qword[1] ^ y->qword[1]; x 857 crypto/streebog_generic.c z->qword[2] = x->qword[2] ^ y->qword[2]; x 858 crypto/streebog_generic.c z->qword[3] = x->qword[3] ^ y->qword[3]; x 859 crypto/streebog_generic.c z->qword[4] = x->qword[4] ^ y->qword[4]; x 860 crypto/streebog_generic.c z->qword[5] = x->qword[5] ^ y->qword[5]; x 861 crypto/streebog_generic.c z->qword[6] = x->qword[6] ^ y->qword[6]; x 862 crypto/streebog_generic.c z->qword[7] = x->qword[7] ^ y->qword[7]; x 865 crypto/streebog_generic.c static void streebog_xlps(const struct streebog_uint512 *x, x 872 crypto/streebog_generic.c r0 = le64_to_cpu(x->qword[0] ^ y->qword[0]); x 873 crypto/streebog_generic.c r1 = le64_to_cpu(x->qword[1] ^ y->qword[1]); x 874 crypto/streebog_generic.c r2 = le64_to_cpu(x->qword[2] ^ y->qword[2]); x 875 crypto/streebog_generic.c r3 = le64_to_cpu(x->qword[3] ^ y->qword[3]); x 876 crypto/streebog_generic.c r4 = le64_to_cpu(x->qword[4] ^ y->qword[4]); x 877 crypto/streebog_generic.c r5 = le64_to_cpu(x->qword[5] ^ y->qword[5]); x 878 crypto/streebog_generic.c r6 = le64_to_cpu(x->qword[6] ^ y->qword[6]); x 879 crypto/streebog_generic.c r7 = le64_to_cpu(x->qword[7] ^ y->qword[7]); x 933 crypto/streebog_generic.c static void streebog_add512(const struct streebog_uint512 *x, x 941 crypto/streebog_generic.c const u64 left = le64_to_cpu(x->qword[i]); x 397 crypto/tgr192.c static void tgr192_round(u64 * ra, u64 * rb, u64 * rc, u64 x, int mul) x 403 crypto/tgr192.c c ^= x; x 416 crypto/tgr192.c static void tgr192_pass(u64 * ra, u64 * rb, u64 * rc, u64 * x, int mul) x 422 crypto/tgr192.c tgr192_round(&a, &b, &c, x[0], mul); x 423 crypto/tgr192.c tgr192_round(&b, &c, &a, x[1], mul); x 424 crypto/tgr192.c tgr192_round(&c, &a, &b, x[2], mul); x 425 crypto/tgr192.c tgr192_round(&a, &b, &c, x[3], mul); x 426 crypto/tgr192.c tgr192_round(&b, &c, &a, x[4], mul); x 427 crypto/tgr192.c tgr192_round(&c, &a, &b, x[5], mul); x 428 crypto/tgr192.c tgr192_round(&a, &b, &c, x[6], mul); x 429 crypto/tgr192.c tgr192_round(&b, &c, &a, x[7], mul); x 437 crypto/tgr192.c static void tgr192_key_schedule(u64 * x) x 439 crypto/tgr192.c x[0] -= x[7] ^ 0xa5a5a5a5a5a5a5a5ULL; x 440 crypto/tgr192.c x[1] ^= x[0]; x 441 crypto/tgr192.c x[2] += x[1]; x 442 crypto/tgr192.c x[3] -= x[2] ^ ((~x[1]) << 19); x 443 crypto/tgr192.c x[4] ^= x[3]; x 444 crypto/tgr192.c x[5] += x[4]; x 445 crypto/tgr192.c x[6] -= x[5] ^ ((~x[4]) >> 23); x 446 crypto/tgr192.c x[7] ^= x[6]; x 447 crypto/tgr192.c x[0] += x[7]; x 448 crypto/tgr192.c x[1] -= x[0] ^ ((~x[7]) << 19); x 449 crypto/tgr192.c x[2] ^= x[1]; x 450 crypto/tgr192.c x[3] += x[2]; x 451 crypto/tgr192.c x[4] -= x[3] ^ ((~x[2]) >> 23); x 452 crypto/tgr192.c x[5] ^= x[4]; x 453 crypto/tgr192.c x[6] += x[5]; x 454 crypto/tgr192.c x[7] -= x[6] ^ 0x0123456789abcdefULL; x 465 crypto/tgr192.c u64 x[8]; x 469 crypto/tgr192.c x[i] = get_unaligned_le64(data + i * sizeof(__le64)); x 476 crypto/tgr192.c tgr192_pass(&a, &b, &c, x, 5); x 477 crypto/tgr192.c tgr192_key_schedule(x); x 478 crypto/tgr192.c tgr192_pass(&c, &a, &b, x, 7); x 479 crypto/tgr192.c tgr192_key_schedule(x); x 480 crypto/tgr192.c tgr192_pass(&b, &c, &a, x, 9); x 468 crypto/twofish_common.c #define CALC_S(a, b, c, d, i, w, x, y, z) \ x 472 crypto/twofish_common.c (b) ^= exp_to_poly[tmp + (x)]; \ x 536 crypto/twofish_common.c x = CALC_K_2 (k, l, k, l, 0); \ x 539 crypto/twofish_common.c x += y; y += x; ctx->a[j] = x; \ x 549 crypto/twofish_common.c x = CALC_K192_2 (l, l, k, k, 0); \ x 552 crypto/twofish_common.c x += y; y += x; ctx->a[j] = x; \ x 562 crypto/twofish_common.c x = CALC_K256_2 (k, l, 0); \ x 565 crypto/twofish_common.c x += y; y += x; ctx->a[j] = x; \ x 575 crypto/twofish_common.c u32 x, y; x 54 crypto/twofish_generic.c x = G1 (a); y = G2 (b); \ x 55 crypto/twofish_generic.c x += y; y += x + ctx->k[2 * (n) + 1]; \ x 56 crypto/twofish_generic.c (c) ^= x + ctx->k[2 * (n)]; \ x 61 crypto/twofish_generic.c x = G1 (a); y = G2 (b); \ x 62 crypto/twofish_generic.c x += y; y += x; \ x 66 crypto/twofish_generic.c (c) ^= (x + ctx->k[2 * (n)]) x 85 crypto/twofish_generic.c #define INPACK(n, x, m) \ x 86 crypto/twofish_generic.c x = le32_to_cpu(src[n]) ^ ctx->w[m] x 88 crypto/twofish_generic.c #define OUTUNPACK(n, x, m) \ x 89 crypto/twofish_generic.c x ^= ctx->w[m]; \ x 90 crypto/twofish_generic.c dst[n] = cpu_to_le32(x) x 105 crypto/twofish_generic.c u32 x, y; x 142 crypto/twofish_generic.c u32 x, y; x 77 crypto/vmac.c #define UINT64_C(x) x##ULL x 20 crypto/xor.c #define XOR_SELECT_TEMPLATE(x) (x) x 99 drivers/acpi/ac.c #define to_acpi_ac(x) power_supply_get_drvdata(x) x 391 drivers/acpi/acpica/acmacros.h #define ARG_1(x) ((u32)(x)) x 392 drivers/acpi/acpica/acmacros.h #define ARG_2(x) ((u32)(x) << (1 * ARG_TYPE_WIDTH)) x 393 drivers/acpi/acpica/acmacros.h #define ARG_3(x) ((u32)(x) << (2 * ARG_TYPE_WIDTH)) x 394 drivers/acpi/acpica/acmacros.h #define ARG_4(x) ((u32)(x) << (3 * ARG_TYPE_WIDTH)) x 395 drivers/acpi/acpica/acmacros.h #define ARG_5(x) ((u32)(x) << (4 * ARG_TYPE_WIDTH)) x 396 drivers/acpi/acpica/acmacros.h #define ARG_6(x) ((u32)(x) << (5 * ARG_TYPE_WIDTH)) x 148 drivers/acpi/battery.c #define to_acpi_battery(x) power_supply_get_drvdata(x) x 469 drivers/acpi/battery.c int *x = (int *)((u8 *)battery + offsets[i].offset); x 470 drivers/acpi/battery.c *x = (element->type == ACPI_TYPE_INTEGER) ? x 668 drivers/acpi/battery.c unsigned long x; x 670 drivers/acpi/battery.c if (sscanf(buf, "%lu\n", &x) == 1) x 671 drivers/acpi/battery.c battery->alarm = x/1000; x 279 drivers/acpi/ec.c u8 x = inb(ec->command_addr); x 283 drivers/acpi/ec.c x, x 284 drivers/acpi/ec.c !!(x & ACPI_EC_FLAG_SCI), x 285 drivers/acpi/ec.c !!(x & ACPI_EC_FLAG_BURST), x 286 drivers/acpi/ec.c !!(x & ACPI_EC_FLAG_CMD), x 287 drivers/acpi/ec.c !!(x & ACPI_EC_FLAG_IBF), x 288 drivers/acpi/ec.c !!(x & ACPI_EC_FLAG_OBF)); x 289 drivers/acpi/ec.c return x; x 294 drivers/acpi/ec.c u8 x = inb(ec->data_addr); x 297 drivers/acpi/ec.c ec_dbg_raw("EC_DATA(R) = 0x%2.2x", x); x 298 drivers/acpi/ec.c return x; x 16 drivers/acpi/pmic/intel_pmic_bxtwc.c #define WHISKEY_COVE_ADC_HIGH_BIT(x) (((x & 0x0F) << 8)) x 17 drivers/acpi/pmic/intel_pmic_bxtwc.c #define WHISKEY_COVE_ADC_CURSRC(x) (((x & 0xF0) >> 4)) x 86 drivers/acpi/sbs.c #define to_acpi_battery(x) power_supply_get_drvdata(x) x 100 drivers/acpi/sbs.c #define to_acpi_sbs(x) power_supply_get_drvdata(x) x 458 drivers/acpi/sbs.c unsigned long x; x 460 drivers/acpi/sbs.c if (sscanf(buf, "%lu\n", &x) == 1) x 461 drivers/acpi/sbs.c battery->alarm_capacity = x / x 49 drivers/acpi/sleep.c unsigned long code, void *x) x 27 drivers/amba/tegra-ahb.c #define AHB_PRIORITY_WEIGHT(x) (((x) & 0x7) << 29) x 64 drivers/amba/tegra-ahb.c #define MST_ID(x) (((x) & 0x1f) << 26) x 69 drivers/amba/tegra-ahb.c #define ADDR_BNDRY(x) (((x) & 0xf) << 21) x 70 drivers/amba/tegra-ahb.c #define INACTIVITY_TIMEOUT(x) (((x) & 0xffff) << 0) x 142 drivers/android/binder.c #define binder_debug(mask, x...) \ x 145 drivers/android/binder.c pr_info_ratelimited(x); \ x 148 drivers/android/binder.c #define binder_user_error(x...) \ x 151 drivers/android/binder.c pr_info_ratelimited(x); \ x 44 drivers/android/binder_alloc.c #define binder_alloc_debug(mask, x...) \ x 47 drivers/android/binder_alloc.c pr_info_ratelimited(x); \ x 21 drivers/ata/ahci_da850.c #define SATA_PHY_MPY(x) ((x) << 0) x 22 drivers/ata/ahci_da850.c #define SATA_PHY_LOS(x) ((x) << 6) x 23 drivers/ata/ahci_da850.c #define SATA_PHY_RXCDR(x) ((x) << 10) x 24 drivers/ata/ahci_da850.c #define SATA_PHY_RXEQ(x) ((x) << 13) x 25 drivers/ata/ahci_da850.c #define SATA_PHY_TXSWING(x) ((x) << 19) x 26 drivers/ata/ahci_da850.c #define SATA_PHY_ENPLL(x) ((x) << 31) x 20 drivers/ata/ahci_dm816.c #define AHCI_DM816_PHY_ENPLL(x) ((x) << 0) x 21 drivers/ata/ahci_dm816.c #define AHCI_DM816_PHY_MPY(x) ((x) << 1) x 22 drivers/ata/ahci_dm816.c #define AHCI_DM816_PHY_LOS(x) ((x) << 12) x 23 drivers/ata/ahci_dm816.c #define AHCI_DM816_PHY_RXCDR(x) ((x) << 13) x 24 drivers/ata/ahci_dm816.c #define AHCI_DM816_PHY_RXEQ(x) ((x) << 16) x 25 drivers/ata/ahci_dm816.c #define AHCI_DM816_PHY_TXSWING(x) ((x) << 23) x 34 drivers/ata/ahci_seattle.c #define ACTIVITY_BIT_POS(x) (8 + (3 * x)) x 35 drivers/ata/ahci_seattle.c #define LOCATE_BIT_POS(x) (ACTIVITY_BIT_POS(x) + 1) x 36 drivers/ata/ahci_seattle.c #define FAULT_BIT_POS(x) (LOCATE_BIT_POS(x) + 1) x 328 drivers/ata/libata-transport.c static int noop(int x) { return x; } x 38 drivers/ata/pata_cs5536.c #define rdmsr(x, y, z) do { } while (0) x 39 drivers/ata/pata_cs5536.c #define wrmsr(x, y, z) do { } while (0) x 29 drivers/ata/pata_samsung_cf.c #define S3C_CFATA_REG(x) (x) x 81 drivers/atm/eni.c #define NULLCHECK(x) x 98 drivers/atm/eni.c #define NULLCHECK(x) \ x 99 drivers/atm/eni.c if ((unsigned long) (x) < 0x30) \ x 100 drivers/atm/eni.c printk(KERN_CRIT #x "==0x%lx\n",(unsigned long) (x)) x 55 drivers/atm/he.h #define TPDRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TPDRQ_SIZE<<3)-1)) x 59 drivers/atm/he.h #define RBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_RBRQ_SIZE<<3)-1)) x 63 drivers/atm/he.h #define TBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TBRQ_SIZE<<2)-1)) x 68 drivers/atm/he.h #define RBPL_MASK(x) (((unsigned long)(x))&((CONFIG_RBPL_SIZE<<3)-1)) x 109 drivers/atm/he.h #define ITYPE_GROUP(x) (x & 0x7) x 110 drivers/atm/he.h #define ITYPE_TYPE(x) (x & 0xf8) x 144 drivers/atm/he.h #define TPD_ADDR(x) ((x) & TPD_MASK) x 145 drivers/atm/he.h #define TPD_INDEX(x) (TPD_ADDR(x) >> TPD_ADDR_SHIFT) x 374 drivers/atm/he.h #define SWAP_RNUM_MAX(x) (x<<27) x 411 drivers/atm/he.h #define IRQ_BASE(x) (x<<12) x 413 drivers/atm/he.h #define IRQ_TAIL(x) (((unsigned long)(x)) & IRQ_MASK) x 415 drivers/atm/he.h #define IRQ_SIZE(x) (x<<22) x 416 drivers/atm/he.h #define IRQ_THRESH(x) (x<<12) x 417 drivers/atm/he.h #define IRQ_HEAD(x) (x<<2) x 420 drivers/atm/he.h #define IRQ_ADDRSEL(x) (x<<2) x 451 drivers/atm/he.h #define RBP_TAIL(x) ((x)<<3) x 452 drivers/atm/he.h #define RBP_MASK(x) ((x)|0x1fff) x 454 drivers/atm/he.h #define RBP_QSIZE(x) ((x)<<14) x 456 drivers/atm/he.h #define RBP_THRESH(x) (x) x 530 drivers/atm/he.h #define RBRQ_THRESH(x) ((x)<<13) x 531 drivers/atm/he.h #define RBRQ_SIZE(x) (x) x 533 drivers/atm/he.h #define RBRQ_TIME(x) ((x)<<8) x 534 drivers/atm/he.h #define RBRQ_COUNT(x) (x) x 542 drivers/atm/he.h #define TBRQ_THRESH(x) (x) x 548 drivers/atm/he.h #define OAM_GID(x) (x<<7) x 549 drivers/atm/he.h #define PTMR_PRE(x) (x) x 589 drivers/atm/he.h #define SLICE_X(x) (x<<28) x 590 drivers/atm/he.h #define ARB_RNUM_MAX(x) (x<<23) x 591 drivers/atm/he.h #define TH_PRTY(x) (x<<21) x 592 drivers/atm/he.h #define RH_PRTY(x) (x<<19) x 593 drivers/atm/he.h #define TL_PRTY(x) (x<<17) x 594 drivers/atm/he.h #define RL_PRTY(x) (x<<15) x 595 drivers/atm/he.h #define BUS_MULTI(x) (x<<8) x 596 drivers/atm/he.h #define NET_PREF(x) (x) x 604 drivers/atm/he.h #define REF_RATE(x) (x) x 613 drivers/atm/he.h #define TM_BANK_WAIT(x) (x<<6) x 614 drivers/atm/he.h #define TM_ADD_BANK4(x) (x<<4) x 615 drivers/atm/he.h #define TM_PAR_CHECK(x) (x<<3) x 616 drivers/atm/he.h #define TM_RW_WAIT(x) (x<<2) x 617 drivers/atm/he.h #define TM_SRAM_TYPE(x) (x) x 626 drivers/atm/he.h #define DRF_THRESH(x) (x<<22) x 627 drivers/atm/he.h #define TX_UT_MODE(x) (x<<21) x 628 drivers/atm/he.h #define TX_VCI_MASK(x) (x<<17) x 629 drivers/atm/he.h #define LBFREE_CNT(x) (x) x 632 drivers/atm/he.h #define CPCS_UU(x) (x<<8) x 633 drivers/atm/he.h #define CPI(x) (x) x 636 drivers/atm/he.h #define RM_DESL2(x) (x<<10) x 637 drivers/atm/he.h #define RM_BANK_WAIT(x) (x<<6) x 638 drivers/atm/he.h #define RM_ADD_BANK(x) (x<<4) x 639 drivers/atm/he.h #define RM_PAR_CHECK(x) (x<<3) x 640 drivers/atm/he.h #define RM_RW_WAIT(x) (x<<2) x 641 drivers/atm/he.h #define RM_SRAM_TYPE(x) (x) x 648 drivers/atm/he.h #define UT_RD_DELAY(x) (x<<11) x 649 drivers/atm/he.h #define WRAP_MODE(x) (x<<10) x 650 drivers/atm/he.h #define RC_UT_MODE(x) (x<<9) x 652 drivers/atm/he.h #define RX_VALVP(x) (x<<4) x 653 drivers/atm/he.h #define RX_VALVC(x) (x) x 663 drivers/atm/he.h #define LB_SIZE(x) (x) x 677 drivers/atm/he.h #define CON_CTL_ADDR(x) (x) x 743 drivers/atm/he.h #define TSR0_CONN_STATE(x) ((x>>28) & 0x7) x 745 drivers/atm/he.h #define TSR0_GROUP(x) ((x & 0x7)<<18) x 757 drivers/atm/he.h #define TSR0_RC_INDEX(x) (x & 0x1F) x 759 drivers/atm/he.h #define TSR1_PCR(x) ((x & 0x7FFF)<<16) x 760 drivers/atm/he.h #define TSR1_MCR(x) (x & 0x7FFF) x 762 drivers/atm/he.h #define TSR2_ACR(x) ((x & 0x7FFF)<<16) x 764 drivers/atm/he.h #define TSR3_NRM_CNT(x) ((x & 0xFF)<<24) x 765 drivers/atm/he.h #define TSR3_CRM_CNT(x) (x & 0xFFFF) x 778 drivers/atm/he.h #define TSR11_ICR(x) ((x & 0x7FFF)<<16) x 779 drivers/atm/he.h #define TSR11_TRM(x) ((x & 0x7)<<13) x 780 drivers/atm/he.h #define TSR11_NRM(x) ((x & 0x7)<<10) x 781 drivers/atm/he.h #define TSR11_ADTF(x) (x & 0x3FF) x 783 drivers/atm/he.h #define TSR13_RDF(x) ((x & 0xF)<<23) x 784 drivers/atm/he.h #define TSR13_RIF(x) ((x & 0xF)<<19) x 785 drivers/atm/he.h #define TSR13_CDF(x) ((x & 0x7)<<16) x 786 drivers/atm/he.h #define TSR13_CRM(x) (x & 0xFFFF) x 807 drivers/atm/he.h #define RSR1_GROUP(x) ((x)<<16) x 810 drivers/atm/he.h #define RSR4_GROUP(x) ((x)<<27) x 819 drivers/atm/he.h #define TPD_CELLTYPE(x) (x<<3) x 507 drivers/atm/horizon.c static inline u16 rx_q_entry_to_length (u32 x) { x 508 drivers/atm/horizon.c return x & RX_Q_ENTRY_LENGTH_MASK; x 511 drivers/atm/horizon.c static inline u16 rx_q_entry_to_rx_channel (u32 x) { x 512 drivers/atm/horizon.c return (x>>RX_Q_ENTRY_CHANNEL_SHIFT) & RX_CHANNEL_MASK; x 888 drivers/atm/horizon.c u32 x = rd_mem (dev, (HDW *) rd_ptr); x 890 drivers/atm/horizon.c if (vc == rx_q_entry_to_rx_channel (x)) { x 891 drivers/atm/horizon.c x |= SIMONS_DODGEY_MARKER; x 895 drivers/atm/horizon.c wr_mem (dev, (HDW *) rd_ptr, x); x 463 drivers/atm/horizon.h #define DW(x) do{ x } while(0) x 2019 drivers/atm/idt77252.c idt77252_fls(unsigned int x) x 2023 drivers/atm/idt77252.c if (x == 0) x 2025 drivers/atm/idt77252.c if (x & 0xffff0000) { x 2026 drivers/atm/idt77252.c x >>= 16; x 2029 drivers/atm/idt77252.c if (x & 0xff00) { x 2030 drivers/atm/idt77252.c x >>= 8; x 2033 drivers/atm/idt77252.c if (x & 0xf0) { x 2034 drivers/atm/idt77252.c x >>= 4; x 2037 drivers/atm/idt77252.c if (x & 0xc) { x 2038 drivers/atm/idt77252.c x >>= 2; x 2041 drivers/atm/idt77252.c if (x & 0x2) x 69 drivers/atm/iphase.c #define swap_byte_order(x) (((x & 0xff) << 8) | ((x & 0xff00) >> 8)) x 157 drivers/atm/iphase.h #define Boolean(x) ((x) ? 1 : 0) x 213 drivers/atm/lanai.c } x; x 873 drivers/atm/lanai.c #define set_config1(x) do { lanai->conf1 = x; conf1_write(lanai); \ x 1382 drivers/atm/lanai.c const u32 *x; x 1391 drivers/atm/lanai.c if ((x = &end[-2]) < lvcc->rx.buf.start) x 1392 drivers/atm/lanai.c x = &lvcc->rx.buf.end[-2]; x 1398 drivers/atm/lanai.c size = be32_to_cpup(x) & 0xffff; x 1404 drivers/atm/lanai.c lvcc->stats.x.aal5.rx_badlen++; x 1611 drivers/atm/lanai.c #define SERVICE_GET_VCI(x) (((x)>>16)&0x3FF) x 1612 drivers/atm/lanai.c #define SERVICE_GET_END(x) ((x)&0x1FFF) x 1671 drivers/atm/lanai.c lvcc->stats.x.aal5.service_trash++; x 1683 drivers/atm/lanai.c lvcc->stats.x.aal5.service_stream++; x 1691 drivers/atm/lanai.c lvcc->stats.x.aal5.service_rxcrc++; x 2071 drivers/atm/lanai.c int x, icg, pcr = atm_pcr_goal(&qos->txtp); x 2078 drivers/atm/lanai.c x = pcr * 27; x 2079 drivers/atm/lanai.c icg = (3125 << (9 + CBRICG_FRAC_BITS)) - (x << CBRICG_FRAC_BITS); x 2081 drivers/atm/lanai.c icg += x - 1; x 2082 drivers/atm/lanai.c icg /= x; x 2348 drivers/atm/lanai.c lvcc->stats.x.aal5.rx_badlen = 0; x 2349 drivers/atm/lanai.c lvcc->stats.x.aal5.service_trash = 0; x 2350 drivers/atm/lanai.c lvcc->stats.x.aal5.service_stream = 0; x 2351 drivers/atm/lanai.c lvcc->stats.x.aal5.service_rxcrc = 0; x 2514 drivers/atm/lanai.c lvcc->stats.x.aal5.rx_badlen, x 2515 drivers/atm/lanai.c lvcc->stats.x.aal5.service_trash, x 2516 drivers/atm/lanai.c lvcc->stats.x.aal5.service_stream, x 2517 drivers/atm/lanai.c lvcc->stats.x.aal5.service_rxcrc); x 578 drivers/atm/solos-pci.c #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL); x 579 drivers/atm/solos-pci.c #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store); x 594 drivers/atm/solos-pci.c #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr, x 595 drivers/atm/solos-pci.c #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr, x 62 drivers/atm/zatm.c #define NULLCHECK(x) x 79 drivers/atm/zatm.c #define NULLCHECK(x) \ x 80 drivers/atm/zatm.c if ((unsigned long) (x) < 0x30) printk(KERN_CRIT #x "==0x%x\n", (int) (x)) x 365 drivers/atm/zatm.c u32 x; x 371 drivers/atm/zatm.c while (x = zin(MWA(mbx)), (pos & 0xffff) != x) { x 377 drivers/atm/zatm.c EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x); x 385 drivers/atm/zatm.c unsigned long *x; x 389 drivers/atm/zatm.c x = (unsigned long *) here[2]; x 391 drivers/atm/zatm.c x[0],x[1],x[2],x[3]); x 748 drivers/atm/zatm.c u32 x; x 753 drivers/atm/zatm.c while (x = zin(MWA(mbx)), (pos & 0xffff) != x) { x 759 drivers/atm/zatm.c EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x); x 81 drivers/auxdisplay/charlcd.c unsigned long int x; x 162 drivers/auxdisplay/charlcd.c addr = priv->addr.x < lcd->bwidth ? priv->addr.x & (lcd->hwidth - 1) x 175 drivers/auxdisplay/charlcd.c priv->addr.x = 0; x 184 drivers/auxdisplay/charlcd.c if (priv->addr.x < lcd->bwidth) { x 188 drivers/auxdisplay/charlcd.c priv->addr.x++; x 191 drivers/auxdisplay/charlcd.c if (priv->addr.x == lcd->bwidth) x 217 drivers/auxdisplay/charlcd.c priv->addr.x = 0; x 335 drivers/auxdisplay/charlcd.c static bool parse_xy(const char *s, unsigned long *x, unsigned long *y) x 337 drivers/auxdisplay/charlcd.c unsigned long new_x = *x; x 358 drivers/auxdisplay/charlcd.c *x = new_x; x 436 drivers/auxdisplay/charlcd.c if (priv->addr.x > 0) { x 438 drivers/auxdisplay/charlcd.c if (priv->addr.x < lcd->bwidth) x 440 drivers/auxdisplay/charlcd.c priv->addr.x--; x 445 drivers/auxdisplay/charlcd.c if (priv->addr.x < lcd->width) { x 447 drivers/auxdisplay/charlcd.c if (priv->addr.x < (lcd->bwidth - 1)) x 450 drivers/auxdisplay/charlcd.c priv->addr.x++; x 465 drivers/auxdisplay/charlcd.c int x; x 467 drivers/auxdisplay/charlcd.c for (x = priv->addr.x; x < lcd->bwidth; x++) x 545 drivers/auxdisplay/charlcd.c if (parse_xy(esc, &priv->addr.x, &priv->addr.y)) x 602 drivers/auxdisplay/charlcd.c if (priv->addr.x > 0) { x 607 drivers/auxdisplay/charlcd.c if (priv->addr.x < lcd->bwidth) x 610 drivers/auxdisplay/charlcd.c priv->addr.x--; x 626 drivers/auxdisplay/charlcd.c for (; priv->addr.x < lcd->bwidth; priv->addr.x++) x 628 drivers/auxdisplay/charlcd.c priv->addr.x = 0; x 634 drivers/auxdisplay/charlcd.c priv->addr.x = 0; x 117 drivers/auxdisplay/panel.c #define r_ctr(x) (parport_read_control((x)->port)) x 118 drivers/auxdisplay/panel.c #define r_dtr(x) (parport_read_data((x)->port)) x 119 drivers/auxdisplay/panel.c #define r_str(x) (parport_read_status((x)->port)) x 120 drivers/auxdisplay/panel.c #define w_ctr(x, y) (parport_write_control((x)->port, (y))) x 121 drivers/auxdisplay/panel.c #define w_dtr(x, y) (parport_write_data((x)->port, (y))) x 993 drivers/base/core.c #define to_ext_attr(x) container_of(x, struct dev_ext_attribute, attr) x 24 drivers/base/isa.c #define to_isa_dev(x) container_of((x), struct isa_dev, dev) x 360 drivers/base/node.c #define K(x) ((x) << (PAGE_SHIFT - 10)) x 554 drivers/base/power/main.c #define dpm_watchdog_set(x, y) x 555 drivers/base/power/main.c #define dpm_watchdog_clear(x) x 275 drivers/bcma/scan.c #define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO) x 43 drivers/block/drbd/drbd_int.h # define __protected_by(x) __attribute__((require_context(x,1,999,"rdwr"))) x 44 drivers/block/drbd/drbd_int.h # define __protected_read_by(x) __attribute__((require_context(x,1,999,"read"))) x 45 drivers/block/drbd/drbd_int.h # define __protected_write_by(x) __attribute__((require_context(x,1,999,"write"))) x 47 drivers/block/drbd/drbd_int.h # define __protected_by(x) x 48 drivers/block/drbd/drbd_int.h # define __protected_read_by(x) x 49 drivers/block/drbd/drbd_int.h # define __protected_write_by(x) x 1261 drivers/block/drbd/drbd_int.h #define BM_SECT_TO_BIT(x) ((x)>>(BM_BLOCK_SHIFT-9)) x 1262 drivers/block/drbd/drbd_int.h #define BM_BIT_TO_SECT(x) ((sector_t)(x)<<(BM_BLOCK_SHIFT-9)) x 1270 drivers/block/drbd/drbd_int.h #define BM_SECT_TO_EXT(x) ((x)>>(BM_EXT_SHIFT-9)) x 1271 drivers/block/drbd/drbd_int.h #define BM_BIT_TO_EXT(x) ((x) >> (BM_EXT_SHIFT - BM_BLOCK_SHIFT)) x 1274 drivers/block/drbd/drbd_int.h #define BM_EXT_TO_SECT(x) ((sector_t)(x) << (BM_EXT_SHIFT-9)) x 2115 drivers/block/drbd/drbd_int.h ({ __acquire(x); true; }) : false) x 95 drivers/block/drbd/drbd_proc.c int i, x, y; x 100 drivers/block/drbd/drbd_proc.c x = res/50; x 101 drivers/block/drbd/drbd_proc.c y = 20-x; x 103 drivers/block/drbd/drbd_proc.c for (i = 1; i < x; i++) x 216 drivers/block/drbd/drbd_state.c #define OLD_TO_NEW(x) \ x 217 drivers/block/drbd/drbd_state.c (x[NEW] = x[OLD]) x 302 drivers/block/floppy.c #define ITYPE(x) (((x) >> 2) & 0x1f) x 303 drivers/block/floppy.c #define TOMINOR(x) ((x & 3) | ((x & 4) << 5)) x 304 drivers/block/floppy.c #define UNIT(x) ((x) & 0x03) /* drive on fdc */ x 305 drivers/block/floppy.c #define FDC(x) (((x) & 0x04) >> 2) /* fdc of drive */ x 2095 drivers/block/floppy.c #define FM_MODE(x, y) ((y) & ~(((x)->rate & 0x80) >> 1)) x 2096 drivers/block/floppy.c #define CT(x) ((x) | 0xc0) x 233 drivers/block/loop.c sector_t x = (sector_t)size; x 236 drivers/block/loop.c if (unlikely((loff_t)x != size)) x 242 drivers/block/loop.c set_capacity(lo->lo_disk, x); x 97 drivers/block/paride/dstr.c #define CCP(x) w0(0xff);w2(0xc);w2(4);\ x 99 drivers/block/paride/dstr.c w0(x);w2(5);w2(4); x 210 drivers/block/paride/epat.c #define CPP(x) w2(4);w0(0x22);w0(0xaa);w0(0x55);w0(0);w0(0xff);\ x 211 drivers/block/paride/epat.c w0(0x87);w0(0x78);w0(x);w2(4);w2(5);w2(4);w0(0xff); x 40 drivers/block/paride/friq.c #define CMD(x) w2(4);w0(0xff);w0(0xff);w0(0x73);w0(0x73);\ x 41 drivers/block/paride/friq.c w0(0xc9);w0(0xc9);w0(0x26);w0(0x26);w0(x);w0(x); x 112 drivers/block/paride/kbic.c #define CCP(x) w2(0xc4);w0(0xaa);w0(0x55);w0(0);w0(0xff);w0(0x87);\ x 113 drivers/block/paride/kbic.c w0(0x78);w0(x);w2(0xc5);w2(0xc4);w0(0xff); x 99 drivers/block/paride/on26.c #define CCP(x) w0(0xfe);w0(0xaa);w0(0x55);w0(0);w0(0xff);\ x 100 drivers/block/paride/on26.c w0(0x87);w0(0x78);w0(x);w2(4);w2(5);w2(4);w0(0xff); x 104 drivers/block/paride/on26.c { int x; x 110 drivers/block/paride/on26.c x = 8; if (pi->mode) x = 9; x 113 drivers/block/paride/on26.c w0(2); P1; w0(x); P2; x 129 drivers/block/paride/on26.c { int i, m, d, x=0, y=0; x 162 drivers/block/paride/on26.c x = on26_read_regr(pi,0,7); x 165 drivers/block/paride/on26.c if (!((x&0x80)||(y&0x80))) break; x 170 drivers/block/paride/on26.c printk("on26: Device reset failed (%x,%x)\n",x,y); x 173 drivers/block/skd_s1120.h #define FIT_MFD_MSG(x) (((x) >> 24) & FIT_MFD_MASK) x 174 drivers/block/skd_s1120.h #define FIT_MFD_DATA(x) ((x) & FIT_MFD_MASK) x 40 drivers/block/swim.c #define REG(x) unsigned char x, x ## _pad[0x200 - 1]; x 504 drivers/block/swim.c int x; x 506 drivers/block/swim.c x = i % fs->secpercyl; x 507 drivers/block/swim.c side = x / fs->secpertrack; x 508 drivers/block/swim.c sector = x % fs->secpertrack + 1; x 55 drivers/block/swim3.c #define REG(x) unsigned char x; char x ## _pad[15]; x 313 drivers/block/swim3.c unsigned long x; x 349 drivers/block/swim3.c x = ((long)blk_rq_pos(req)) % fs->secpercyl; x 350 drivers/block/swim3.c fs->head = x / fs->secpertrack; x 351 drivers/block/swim3.c fs->req_sector = x % fs->secpertrack + 1; x 74 drivers/block/umem.c #define HW_TRACE(x) x 1083 drivers/block/zram/zram_drv.c #define FOUR_K(x) ((x) * (1 << (PAGE_SHIFT - 12))) x 283 drivers/bluetooth/bt3c_cs.c __u8 x = inb(iobase + DATA_L); x 285 drivers/bluetooth/bt3c_cs.c skb_put_u8(info->rx_skb, x); x 90 drivers/bluetooth/hci_bcsp.c #define BCSP_CRC_INIT(x) x = 0xffff x 27 drivers/bus/tegra-gmi.c #define TEGRA_GMI_CS_SELECT(x) ((x & 0x7) << 4) x 30 drivers/bus/tegra-gmi.c #define TEGRA_GMI_MUXED_WIDTH(x) ((x & 0xf) << 12) x 31 drivers/bus/tegra-gmi.c #define TEGRA_GMI_HOLD_WIDTH(x) ((x & 0xf) << 8) x 32 drivers/bus/tegra-gmi.c #define TEGRA_GMI_ADV_WIDTH(x) ((x & 0xf) << 4) x 33 drivers/bus/tegra-gmi.c #define TEGRA_GMI_CE_WIDTH(x) (x & 0xf) x 36 drivers/bus/tegra-gmi.c #define TEGRA_GMI_WE_WIDTH(x) ((x & 0xff) << 16) x 37 drivers/bus/tegra-gmi.c #define TEGRA_GMI_OE_WIDTH(x) ((x & 0xff) << 8) x 38 drivers/bus/tegra-gmi.c #define TEGRA_GMI_WAIT_WIDTH(x) (x & 0xff) x 38 drivers/char/agp/agp.h #define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __func__ , ## y) x 40 drivers/char/agp/agp.h #define DBG(x,y...) do { } while (0) x 158 drivers/char/agp/agp.h #define KB(x) ((x) * 1024) x 159 drivers/char/agp/agp.h #define MB(x) (KB (KB (x))) x 160 drivers/char/agp/agp.h #define GB(x) (MB (KB (x))) x 162 drivers/char/agp/agp.h #define A_SIZE_8(x) ((struct aper_size_info_8 *) x) x 163 drivers/char/agp/agp.h #define A_SIZE_16(x) ((struct aper_size_info_16 *) x) x 164 drivers/char/agp/agp.h #define A_SIZE_32(x) ((struct aper_size_info_32 *) x) x 165 drivers/char/agp/agp.h #define A_SIZE_LVL2(x) ((struct aper_size_info_lvl2 *) x) x 166 drivers/char/agp/agp.h #define A_SIZE_FIX(x) ((struct aper_size_info_fixed *) x) x 832 drivers/char/agp/intel-agp.c #define ID(x) \ x 837 drivers/char/agp/intel-agp.c .device = x, \ x 28 drivers/char/agp/intel-agp.h #define I830_RDRAM_ND(x) (((x) & 0x20) >> 5) x 29 drivers/char/agp/intel-agp.h #define I830_RDRAM_DDT(x) (((x) & 0x18) >> 3) x 524 drivers/char/agp/via-agp.c #define ID(x) \ x 529 drivers/char/agp/via-agp.c .device = x, \ x 282 drivers/char/hw_random/n2-drv.c unsigned long x; x 292 drivers/char/hw_random/n2-drv.c hv_err = sun4v_rng_ctl_read_v2(0UL, ~0UL, &x, &x, &x, &x); x 111 drivers/char/ipmi/ipmi_bt_sm.c #define BT_CONTROL(x) bt->io->outputb(bt->io, 0, x) x 114 drivers/char/ipmi/ipmi_bt_sm.c #define HOST2BMC(x) bt->io->outputb(bt->io, 1, x) x 117 drivers/char/ipmi/ipmi_bt_sm.c #define BT_INTMASK_W(x) bt->io->outputb(bt->io, 2, x) x 339 drivers/char/ipmi/ipmi_msghandler.c #define to_bmc_device(x) container_of((x), struct bmc_device, pdev.dev) x 274 drivers/char/ipmi/ipmi_si_intf.c #define debug_timestamp(x) x 162 drivers/char/lp.c #define r_dtr(x) (parport_read_data(lp_table[(x)].dev->port)) x 163 drivers/char/lp.c #define r_str(x) (parport_read_status(lp_table[(x)].dev->port)) x 164 drivers/char/lp.c #define w_ctr(x,y) do { parport_write_control(lp_table[(x)].dev->port, (y)); } while (0) x 165 drivers/char/lp.c #define w_dtr(x,y) do { parport_write_data(lp_table[(x)].dev->port, (y)); } while (0) x 886 drivers/char/lp.c int x; x 888 drivers/char/lp.c if (get_option(&str, &x)) { x 889 drivers/char/lp.c if (x == 0) { x 893 drivers/char/lp.c printk(KERN_WARNING "warning: 'lp=0x%x' is deprecated, ignored\n", x); x 46 drivers/char/pcmcia/cm4000_cs.c #define reader_to_dev(x) (&x->p_dev->dev) x 52 drivers/char/pcmcia/cm4000_cs.c #define DEBUGP(n, rdr, x, args...) do { \ x 53 drivers/char/pcmcia/cm4000_cs.c dev_dbg(reader_to_dev(rdr), "%s:" x, \ x 96 drivers/char/pcmcia/cm4000_cs.c #define REG_FLAGS0(x) (x + 0) x 97 drivers/char/pcmcia/cm4000_cs.c #define REG_FLAGS1(x) (x + 1) x 98 drivers/char/pcmcia/cm4000_cs.c #define REG_NUM_BYTES(x) (x + 2) x 99 drivers/char/pcmcia/cm4000_cs.c #define REG_BUF_ADDR(x) (x + 3) x 100 drivers/char/pcmcia/cm4000_cs.c #define REG_BUF_DATA(x) (x + 4) x 101 drivers/char/pcmcia/cm4000_cs.c #define REG_NUM_SEND(x) (x + 5) x 102 drivers/char/pcmcia/cm4000_cs.c #define REG_BAUDRATE(x) (x + 6) x 103 drivers/char/pcmcia/cm4000_cs.c #define REG_STOPBITS(x) (x + 7) x 40 drivers/char/pcmcia/cm4040_cs.c #define reader_to_dev(x) (&x->p_dev->dev) x 46 drivers/char/pcmcia/cm4040_cs.c #define DEBUGP(n, rdr, x, args...) do { \ x 47 drivers/char/pcmcia/cm4040_cs.c dev_dbg(reader_to_dev(rdr), "%s:" x, \ x 361 drivers/char/random.c #define LONGS(x) (((x) + sizeof(unsigned long) - 1)/sizeof(unsigned long)) x 433 drivers/char/random.c #define S(x) ilog2(x)+5, (x), (x)*4, (x) << (ENTROPY_SHIFT+5) x 1290 drivers/char/random.c #define add_interrupt_bench(x) x 31 drivers/clk/berlin/berlin2-avpll.c #define AVPLL_CTRL(x) ((x) * 0x4) x 40 drivers/clk/berlin/berlin2-avpll.c #define VCO_REG1V45_SEL(x) ((x) << VCO_REG1V45_SEL_SHIFT) x 49 drivers/clk/berlin/berlin2-avpll.c #define VCO_VTHCAL(x) ((x) << VCO_VTHCAL_SHIFT) x 62 drivers/clk/berlin/berlin2-avpll.c #define VCO_SPEED(x) ((x) << VCO_SPEED_SHIFT) x 74 drivers/clk/berlin/berlin2-avpll.c #define VCO_REFDIV(x) ((x) << VCO_REFDIV_SHIFT) x 81 drivers/clk/berlin/berlin2-avpll.c #define VCO_FBDIV(x) ((x) << VCO_FBDIV_SHIFT) x 85 drivers/clk/berlin/berlin2-avpll.c #define VCO_ICP(x) ((x) << VCO_ICP_SHIFT) x 89 drivers/clk/berlin/berlin2-avpll.c #define VCO_FREQOFFSETn(x) AVPLL_CTRL(3 + (x)) x 98 drivers/clk/berlin/berlin2-avpll.c #define VCO_SYNC1n(x) AVPLL_CTRL(15 + (x)) x 100 drivers/clk/berlin/berlin2-avpll.c #define VCO_SYNC2n(x) AVPLL_CTRL(23 + (x)) x 23 drivers/clk/clk-cs2000-cp.c #define Ratio_Add(x, nth) (6 + (x * 4) + (nth)) x 24 drivers/clk/clk-cs2000-cp.c #define Ratio_Val(x, nth) ((x >> (24 - (8 * nth))) & 0xFF) x 25 drivers/clk/clk-cs2000-cp.c #define Val_Ratio(x, nth) ((x & 0xFF) << (24 - (8 * nth))) x 40 drivers/clk/clk-cs2000-cp.c #define RSEL(x) (((x) & 0x3) << 3) x 46 drivers/clk/clk-cs2000-cp.c #define LOCKCLK(x) (((x) & 0x3) << 1) x 57 drivers/clk/clk-cs2000-cp.c #define REFCLKDIV(x) (((x) & 0x3) << 3) x 83 drivers/clk/clk-si5341.c #define SI5341_IN_PDIV(x) (0x0208 + ((x) * 10)) x 84 drivers/clk/clk-si5341.c #define SI5341_IN_PSET(x) (0x020E + ((x) * 10)) x 100 drivers/clk/clk-si5341.c #define SI5341_SYNTH_N_NUM(x) (0x0302 + ((x) * 11)) x 101 drivers/clk/clk-si5341.c #define SI5341_SYNTH_N_DEN(x) (0x0308 + ((x) * 11)) x 102 drivers/clk/clk-si5341.c #define SI5341_SYNTH_N_UPD(x) (0x030C + ((x) * 11)) x 311 drivers/clk/clk-vt8500.c #define VT8500_PLL_MUL(x) ((x & 0x1F) << 1) x 312 drivers/clk/clk-vt8500.c #define VT8500_PLL_DIV(x) ((x & 0x100) ? 1 : 2) x 321 drivers/clk/clk-vt8500.c #define WM8650_PLL_MUL(x) (x & 0x3FF) x 322 drivers/clk/clk-vt8500.c #define WM8650_PLL_DIV(x) (((x >> 10) & 7) * (1 << ((x >> 13) & 3))) x 331 drivers/clk/clk-vt8500.c #define WM8750_PLL_MUL(x) (((x >> 16) & 0xFF) + 1) x 332 drivers/clk/clk-vt8500.c #define WM8750_PLL_DIV(x) ((((x >> 8) & 1) + 1) * (1 << (x & 7))) x 341 drivers/clk/clk-vt8500.c #define WM8850_PLL_MUL(x) ((((x >> 16) & 0x7F) + 1) * 2) x 342 drivers/clk/clk-vt8500.c #define WM8850_PLL_DIV(x) ((((x >> 8) & 1) + 1) * (1 << (x & 3))) x 87 drivers/clk/davinci/psc.c #define to_davinci_psc_data(x) container_of(x, struct davinci_psc_data, x) x 88 drivers/clk/davinci/psc.c #define to_davinci_lpsc_clk(x) container_of(x, struct davinci_lpsc_clk, x) x 41 drivers/clk/imx/clk-imx25.c #define ccm(x) (ccm_base + (x)) x 39 drivers/clk/imx/clk-vf610.c #define CCM_CCGRx(x) (CCM_CCGR0 + (x) * 4) x 65 drivers/clk/mvebu/kirkwood.c #define SAR_KIRKWOOD_CPU_FREQ(x) \ x 66 drivers/clk/mvebu/kirkwood.c (((x & (1 << 1)) >> 1) | \ x 67 drivers/clk/mvebu/kirkwood.c ((x & (1 << 22)) >> 21) | \ x 68 drivers/clk/mvebu/kirkwood.c ((x & (3 << 3)) >> 1)) x 69 drivers/clk/mvebu/kirkwood.c #define SAR_KIRKWOOD_L2_RATIO(x) \ x 70 drivers/clk/mvebu/kirkwood.c (((x & (3 << 9)) >> 9) | \ x 71 drivers/clk/mvebu/kirkwood.c (((x & (1 << 19)) >> 17))) x 295 drivers/clk/nxp/clk-lpc18xx-cgu.c static u32 lpc18xx_pll0_mdec2msel(u32 x) x 299 drivers/clk/nxp/clk-lpc18xx-cgu.c switch (x) { x 303 drivers/clk/nxp/clk-lpc18xx-cgu.c for (i = LPC18XX_PLL0_MSEL_MAX + 1; x != 0x4000 && i > 0; i--) x 304 drivers/clk/nxp/clk-lpc18xx-cgu.c x = ((x ^ x >> 14) & 1) | (x << 1 & 0x7fff); x 311 drivers/clk/nxp/clk-lpc18xx-cgu.c u32 i, x = 0x4000; x 319 drivers/clk/nxp/clk-lpc18xx-cgu.c x = ((x ^ x >> 1) & 1) << 14 | (x >> 1 & 0xffff); x 320 drivers/clk/nxp/clk-lpc18xx-cgu.c return x; x 771 drivers/clk/nxp/clk-lpc32xx.c u32 val, x, y; x 774 drivers/clk/nxp/clk-lpc32xx.c x = (val & 0xFF00) >> 8; x 777 drivers/clk/nxp/clk-lpc32xx.c if (x && y) x 778 drivers/clk/nxp/clk-lpc32xx.c return (parent_rate * x) / y; x 37 drivers/clk/pistachio/clk.h #define PNAME(x) static const char *x[] __initconst x 29 drivers/clk/renesas/clk-rz.c #define MD_CLK(x) ((x >> 2) & 1) /* P0_2 */ x 37 drivers/clk/renesas/renesas-cpg-mssr.c #define WARN_DEBUG(x) WARN_ON(x) x 39 drivers/clk/renesas/renesas-cpg-mssr.c #define WARN_DEBUG(x) do { } while (0) x 567 drivers/clk/renesas/renesas-cpg-mssr.c #define rcdev_to_priv(x) container_of(x, struct cpg_mssr_priv, rcdev) x 71 drivers/clk/renesas/renesas-cpg-mssr.h #define MOD_CLK_PACK(x) ((x) - ((x) / 100) * (100 - 32)) x 73 drivers/clk/renesas/renesas-cpg-mssr.h #define MOD_CLK_ID(x) (MOD_CLK_BASE + MOD_CLK_PACK(x)) x 79 drivers/clk/renesas/renesas-cpg-mssr.h #define MOD_CLK_PACK_10(x) ((x / 10) * 32 + (x % 10)) x 81 drivers/clk/renesas/renesas-cpg-mssr.h #define MOD_CLK_ID_10(x) (MOD_CLK_BASE + MOD_CLK_PACK_10(x)) x 156 drivers/clk/rockchip/clk-mmc-phase.c #define to_rockchip_mmc_clock(x) \ x 157 drivers/clk/rockchip/clk-mmc-phase.c container_of(x, struct rockchip_mmc_clock, clk_rate_change_nb) x 15 drivers/clk/rockchip/clk-rk3288.c #define RK3288_GRF_SOC_CON(x) (0x244 + x * 4) x 29 drivers/clk/rockchip/clk.h #define BOOST_PLL_H_CON(x) ((x) * 0x4) x 39 drivers/clk/rockchip/clk.h #define BOOST_PLL_L_CON(x) ((x) * 0x4 + 0x2c) x 48 drivers/clk/rockchip/clk.h #define PX30_PLL_CON(x) ((x) * 0x4) x 49 drivers/clk/rockchip/clk.h #define PX30_CLKSEL_CON(x) ((x) * 0x4 + 0x100) x 50 drivers/clk/rockchip/clk.h #define PX30_CLKGATE_CON(x) ((x) * 0x4 + 0x200) x 53 drivers/clk/rockchip/clk.h #define PX30_SOFTRST_CON(x) ((x) * 0x4 + 0x300) x 63 drivers/clk/rockchip/clk.h #define PX30_PMU_PLL_CON(x) ((x) * 0x4) x 64 drivers/clk/rockchip/clk.h #define PX30_PMU_CLKSEL_CON(x) ((x) * 0x4 + 0x40) x 65 drivers/clk/rockchip/clk.h #define PX30_PMU_CLKGATE_CON(x) ((x) * 0x4 + 0x80) x 68 drivers/clk/rockchip/clk.h #define RV1108_PLL_CON(x) ((x) * 0x4) x 69 drivers/clk/rockchip/clk.h #define RV1108_CLKSEL_CON(x) ((x) * 0x4 + 0x60) x 70 drivers/clk/rockchip/clk.h #define RV1108_CLKGATE_CON(x) ((x) * 0x4 + 0x120) x 71 drivers/clk/rockchip/clk.h #define RV1108_SOFTRST_CON(x) ((x) * 0x4 + 0x180) x 82 drivers/clk/rockchip/clk.h #define RK2928_PLL_CON(x) ((x) * 0x4) x 84 drivers/clk/rockchip/clk.h #define RK2928_CLKSEL_CON(x) ((x) * 0x4 + 0x44) x 85 drivers/clk/rockchip/clk.h #define RK2928_CLKGATE_CON(x) ((x) * 0x4 + 0xd0) x 88 drivers/clk/rockchip/clk.h #define RK2928_SOFTRST_CON(x) ((x) * 0x4 + 0x110) x 107 drivers/clk/rockchip/clk.h #define RK3288_PLL_CON(x) RK2928_PLL_CON(x) x 109 drivers/clk/rockchip/clk.h #define RK3288_CLKSEL_CON(x) ((x) * 0x4 + 0x60) x 110 drivers/clk/rockchip/clk.h #define RK3288_CLKGATE_CON(x) ((x) * 0x4 + 0x160) x 113 drivers/clk/rockchip/clk.h #define RK3288_SOFTRST_CON(x) ((x) * 0x4 + 0x1b8) x 124 drivers/clk/rockchip/clk.h #define RK3308_PLL_CON(x) RK2928_PLL_CON(x) x 125 drivers/clk/rockchip/clk.h #define RK3308_CLKSEL_CON(x) ((x) * 0x4 + 0x100) x 126 drivers/clk/rockchip/clk.h #define RK3308_CLKGATE_CON(x) ((x) * 0x4 + 0x300) x 128 drivers/clk/rockchip/clk.h #define RK3308_SOFTRST_CON(x) ((x) * 0x4 + 0x400) x 137 drivers/clk/rockchip/clk.h #define RK3328_PLL_CON(x) RK2928_PLL_CON(x) x 138 drivers/clk/rockchip/clk.h #define RK3328_CLKSEL_CON(x) ((x) * 0x4 + 0x100) x 139 drivers/clk/rockchip/clk.h #define RK3328_CLKGATE_CON(x) ((x) * 0x4 + 0x200) x 140 drivers/clk/rockchip/clk.h #define RK3328_GRFCLKSEL_CON(x) ((x) * 0x4 + 0x100) x 143 drivers/clk/rockchip/clk.h #define RK3328_SOFTRST_CON(x) ((x) * 0x4 + 0x300) x 155 drivers/clk/rockchip/clk.h #define RK3368_PLL_CON(x) RK2928_PLL_CON(x) x 156 drivers/clk/rockchip/clk.h #define RK3368_CLKSEL_CON(x) ((x) * 0x4 + 0x100) x 157 drivers/clk/rockchip/clk.h #define RK3368_CLKGATE_CON(x) ((x) * 0x4 + 0x200) x 160 drivers/clk/rockchip/clk.h #define RK3368_SOFTRST_CON(x) ((x) * 0x4 + 0x300) x 171 drivers/clk/rockchip/clk.h #define RK3399_PLL_CON(x) RK2928_PLL_CON(x) x 172 drivers/clk/rockchip/clk.h #define RK3399_CLKSEL_CON(x) ((x) * 0x4 + 0x100) x 173 drivers/clk/rockchip/clk.h #define RK3399_CLKGATE_CON(x) ((x) * 0x4 + 0x300) x 174 drivers/clk/rockchip/clk.h #define RK3399_SOFTRST_CON(x) ((x) * 0x4 + 0x400) x 186 drivers/clk/rockchip/clk.h #define RK3399_PMU_PLL_CON(x) RK2928_PLL_CON(x) x 187 drivers/clk/rockchip/clk.h #define RK3399_PMU_CLKSEL_CON(x) ((x) * 0x4 + 0x80) x 188 drivers/clk/rockchip/clk.h #define RK3399_PMU_CLKGATE_CON(x) ((x) * 0x4 + 0x100) x 189 drivers/clk/rockchip/clk.h #define RK3399_PMU_SOFTRST_CON(x) ((x) * 0x4 + 0x110) x 387 drivers/clk/rockchip/clk.h #define PNAME(x) static const char *const x[] __initconst x 90 drivers/clk/samsung/clk-exynos3250.c #define PWR_CTRL1_CORE2_DOWN_RATIO(x) (((x) & 0x7) << 28) x 91 drivers/clk/samsung/clk-exynos3250.c #define PWR_CTRL1_CORE1_DOWN_RATIO(x) (((x) & 0x7) << 16) x 125 drivers/clk/samsung/clk-exynos4.c #define PWR_CTRL1_CORE2_DOWN_RATIO(x) (((x) & 0x7) << 28) x 126 drivers/clk/samsung/clk-exynos4.c #define PWR_CTRL1_CORE1_DOWN_RATIO(x) (((x) & 0x7) << 16) x 136 drivers/clk/samsung/clk-s3c2410-dclk.c #define to_s3c24xx_dclk0(x) \ x 137 drivers/clk/samsung/clk-s3c2410-dclk.c container_of(x, struct s3c24xx_dclk, dclk0_div_change_nb) x 139 drivers/clk/samsung/clk-s3c2410-dclk.c #define to_s3c24xx_dclk1(x) \ x 140 drivers/clk/samsung/clk-s3c2410-dclk.c container_of(x, struct s3c24xx_dclk, dclk1_div_change_nb) x 225 drivers/clk/samsung/clk.h #define PNAME(x) static const char * const x[] __initconst x 32 drivers/clk/tegra/clk-emc.c #define CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR(x) (((x) & CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK) << \ x 37 drivers/clk/tegra/clk-emc.c #define CLK_SOURCE_EMC_EMC_2X_CLK_SRC(x) (((x) & CLK_SOURCE_EMC_EMC_2X_CLK_SRC_MASK) << \ x 184 drivers/clk/tegra/clk-pll.c #define UTMIP_PLL_CFG1_XTAL_FREQ_COUNT(x) (((x) & 0xfff) << 0) x 185 drivers/clk/tegra/clk-pll.c #define UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 27) x 193 drivers/clk/tegra/clk-pll.c #define UTMIP_PLL_CFG2_STABLE_COUNT(x) (((x) & 0xfff) << 6) x 194 drivers/clk/tegra/clk-pll.c #define UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(x) (((x) & 0x3f) << 18) x 130 drivers/clk/tegra/clk-tegra-periph.c #define MASK(x) (BIT(x) - 1) x 613 drivers/clk/tegra/clk-tegra114.c #define MASK(x) (BIT(x) - 1) x 157 drivers/clk/tegra/clk-tegra210.c #define UTMIP_PLL_CFG2_STABLE_COUNT(x) (((x) & 0xfff) << 6) x 158 drivers/clk/tegra/clk-tegra210.c #define UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(x) (((x) & 0x3f) << 18) x 169 drivers/clk/tegra/clk-tegra210.c #define UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 27) x 170 drivers/clk/tegra/clk-tegra210.c #define UTMIP_PLL_CFG1_XTAL_FREQ_COUNT(x) (((x) & 0xfff) << 0) x 12 drivers/clk/zte/clk.h #define PNAME(x) static const char *x[] x 24 drivers/clocksource/exynos_mct.c #define EXYNOS4_MCTREG(x) (x) x 36 drivers/clocksource/exynos_mct.c #define EXYNOS4_MCT_L_BASE(x) (_EXYNOS4_MCT_L_BASE + (0x100 * x)) x 34 drivers/clocksource/nomadik-mtu.c #define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */ x 35 drivers/clocksource/nomadik-mtu.c #define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */ x 36 drivers/clocksource/nomadik-mtu.c #define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */ x 37 drivers/clocksource/nomadik-mtu.c #define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */ x 41 drivers/clocksource/samsung_pwm_timer.c #define TCFG1_SHIFT(x) ((x) * 4) x 35 drivers/clocksource/timer-atmel-pit.c #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) x 36 drivers/clocksource/timer-atmel-pit.c #define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20) x 78 drivers/clocksource/timer-cadence-ttc.c #define to_ttc_timer(x) \ x 79 drivers/clocksource/timer-cadence-ttc.c container_of(x, struct ttc_timer, clk_rate_change_nb) x 88 drivers/clocksource/timer-cadence-ttc.c #define to_ttc_timer_clksrc(x) \ x 89 drivers/clocksource/timer-cadence-ttc.c container_of(x, struct ttc_timer_clocksource, cs) x 96 drivers/clocksource/timer-cadence-ttc.c #define to_ttc_timer_clkevent(x) \ x 97 drivers/clocksource/timer-cadence-ttc.c container_of(x, struct ttc_timer_clockevent, ce) x 48 drivers/clocksource/timer-sun5i.c #define to_sun5i_timer(x) \ x 49 drivers/clocksource/timer-sun5i.c container_of(x, struct sun5i_timer, clk_rate_cb) x 56 drivers/clocksource/timer-sun5i.c #define to_sun5i_timer_clksrc(x) \ x 57 drivers/clocksource/timer-sun5i.c container_of(x, struct sun5i_timer_clksrc, clksrc) x 64 drivers/clocksource/timer-sun5i.c #define to_sun5i_timer_clkevt(x) \ x 65 drivers/clocksource/timer-sun5i.c container_of(x, struct sun5i_timer_clkevt, clkevt) x 27 drivers/clocksource/timer-zevio.c #define IO_MATCH(x) (IO_MATCH_BEGIN + ((x) << 2)) x 40 drivers/clocksource/timer-zevio.c #define CNTL_MATCH(x) ((x) + 1) x 47 drivers/cpufreq/arm_big_little.c #define set_switching_enabled(x) (bL_switching_enabled = (x)) x 50 drivers/cpufreq/arm_big_little.c #define set_switching_enabled(x) do { } while (0) x 62 drivers/cpufreq/armada-37xx-cpufreq.c #define ARMADA_37XX_AVS_VSET(x) (0x1C + 4 * (x)) x 59 drivers/cpufreq/brcmstb-avs-cpufreq.c #define AVS_PARAM_MULT(x) ((x) < AVS_MAX_CMD_ARGS ? (x) : 0) x 68 drivers/cpufreq/brcmstb-avs-cpufreq.c #define AVS_MBOX_PARAM(x) (0x18 + AVS_PARAM_MULT(x) * sizeof(u32)) x 57 drivers/cpufreq/intel_pstate.c static inline int32_t mul_fp(int32_t x, int32_t y) x 59 drivers/cpufreq/intel_pstate.c return ((int64_t)x * (int64_t)y) >> FRAC_BITS; x 62 drivers/cpufreq/intel_pstate.c static inline int32_t div_fp(s64 x, s64 y) x 64 drivers/cpufreq/intel_pstate.c return div64_s64((int64_t)x << FRAC_BITS, y); x 67 drivers/cpufreq/intel_pstate.c static inline int ceiling_fp(int32_t x) x 71 drivers/cpufreq/intel_pstate.c ret = fp_toint(x); x 73 drivers/cpufreq/intel_pstate.c if (x & mask) x 83 drivers/cpufreq/intel_pstate.c static inline u64 mul_ext_fp(u64 x, u64 y) x 85 drivers/cpufreq/intel_pstate.c return (x * y) >> EXT_FRAC_BITS; x 88 drivers/cpufreq/intel_pstate.c static inline u64 div_ext_fp(u64 x, u64 y) x 90 drivers/cpufreq/intel_pstate.c return div64_u64(x << EXT_FRAC_BITS, y); x 167 drivers/cpufreq/powernv-cpufreq.c #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT) x 168 drivers/cpufreq/powernv-cpufreq.c #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT) x 169 drivers/cpufreq/powernv-cpufreq.c #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT) x 28 drivers/cpufreq/s3c24xx-cpufreq-debugfs.c #define print_ns(x) ((x) / 10), ((x) % 10) x 27 drivers/cpufreq/s5pv210-cpufreq.c #define S5P_CLKREG(x) (clk_base + (x)) x 72 drivers/cpufreq/speedstep-centrino.c const struct cpu_id *x); x 277 drivers/cpufreq/speedstep-centrino.c const struct cpu_id *x) x 279 drivers/cpufreq/speedstep-centrino.c if ((c->x86 == x->x86) && x 280 drivers/cpufreq/speedstep-centrino.c (c->x86_model == x->x86_model) && x 281 drivers/cpufreq/speedstep-centrino.c (c->x86_stepping == x->x86_stepping)) x 756 drivers/cpuidle/cpuidle.c #define latency_notifier_init(x) do { } while (0) x 60 drivers/crypto/atmel-aes-regs.h #define AES_KEYWR(x) (0x20 + ((x) * 0x04)) x 61 drivers/crypto/atmel-aes-regs.h #define AES_IDATAR(x) (0x40 + ((x) * 0x04)) x 62 drivers/crypto/atmel-aes-regs.h #define AES_ODATAR(x) (0x50 + ((x) * 0x04)) x 63 drivers/crypto/atmel-aes-regs.h #define AES_IVR(x) (0x60 + ((x) * 0x04)) x 67 drivers/crypto/atmel-aes-regs.h #define AES_GHASHR(x) (0x78 + ((x) * 0x04)) x 68 drivers/crypto/atmel-aes-regs.h #define AES_TAGR(x) (0x88 + ((x) * 0x04)) x 70 drivers/crypto/atmel-aes-regs.h #define AES_GCMHR(x) (0x9c + ((x) * 0x04)) x 88 drivers/crypto/atmel-aes-regs.h #define AES_TWR(x) (0xc0 + ((x) * 0x04)) x 89 drivers/crypto/atmel-aes-regs.h #define AES_ALPHAR(x) (0xd0 + ((x) * 0x04)) x 54 drivers/crypto/atmel-aes.c #define SIZE_IN_WORDS(x) ((x) >> 2) x 5 drivers/crypto/atmel-sha-regs.h #define SHA_REG_DIGEST(x) (0x80 + ((x) * 0x04)) x 6 drivers/crypto/atmel-sha-regs.h #define SHA_REG_DIN(x) (0x40 + ((x) * 0x04)) x 91 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQM_CMD_INF_THRX(x) (0x1300400 + ((x) * 0x8)) x 92 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQM_CMD_INFX(x) (0x1300800 + ((x) * 0x8)) x 93 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQM_GRP_EXECMSK_LOX(x) (0x1300C00 + ((x) * 0x10)) x 94 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQM_GRP_EXECMSK_HIX(x) (0x1300C08 + ((x) * 0x10)) x 97 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQM_Q_CMD_PROCX(x) (0x1301000 + ((x) * 0x8)) x 102 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_DRBLX(x) (0x20000 + ((x) * 0x40000)) x 103 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_QSZX(x) (0x20008 + ((x) * 0x40000)) x 104 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_BADRX(x) (0x20010 + ((x) * 0x40000)) x 105 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_NXT_CMDX(x) (0x20018 + ((x) * 0x40000)) x 106 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_CMD_CNTX(x) (0x20020 + ((x) * 0x40000)) x 107 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_CMP_THRX(x) (0x20028 + ((x) * 0x40000)) x 108 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_CMP_CNTX(x) (0x20030 + ((x) * 0x40000)) x 109 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_TIM_LDX(x) (0x20038 + ((x) * 0x40000)) x 110 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_TIMERX(x) (0x20040 + ((x) * 0x40000)) x 111 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_ENX(x) (0x20048 + ((x) * 0x40000)) x 112 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQMQ_ACTIVITY_STATX(x) (0x20050 + ((x) * 0x40000)) x 113 drivers/crypto/cavium/nitrox/nitrox_csr.h #define AQM_VF_CMP_STATX(x) (0x28000 + ((x) * 0x40000)) x 2258 drivers/crypto/ccp/ccp-ops.c if (!ecc->u.pm.point_1.x || x 2265 drivers/crypto/ccp/ccp-ops.c if (!ecc->u.pm.point_2.x || x 2281 drivers/crypto/ccp/ccp-ops.c if (!ecc->u.pm.result.x || x 2313 drivers/crypto/ccp/ccp-ops.c ret = ccp_reverse_set_dm_area(&src, 0, ecc->u.pm.point_1.x, 0, x 2330 drivers/crypto/ccp/ccp-ops.c ret = ccp_reverse_set_dm_area(&src, 0, ecc->u.pm.point_2.x, 0, x 2401 drivers/crypto/ccp/ccp-ops.c ccp_reverse_get_dm_area(&dst, 0, ecc->u.pm.result.x, 0, x 42 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_CTX_LEN_V(x) ((x) << KEY_CONTEXT_CTX_LEN_S) x 43 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_CTX_LEN_G(x) \ x 44 drivers/crypto/chelsio/chcr_algo.h (((x) >> KEY_CONTEXT_CTX_LEN_S) & KEY_CONTEXT_CTX_LEN_M) x 48 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_DUAL_CK_V(x) ((x) << KEY_CONTEXT_DUAL_CK_S) x 49 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_DUAL_CK_G(x) \ x 50 drivers/crypto/chelsio/chcr_algo.h (((x) >> KEY_CONTEXT_DUAL_CK_S) & KEY_CONTEXT_DUAL_CK_M) x 55 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_SALT_PRESENT_V(x) ((x) << KEY_CONTEXT_SALT_PRESENT_S) x 56 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_SALT_PRESENT_G(x) \ x 57 drivers/crypto/chelsio/chcr_algo.h (((x) >> KEY_CONTEXT_SALT_PRESENT_S) & \ x 63 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_VALID_V(x) ((x) << KEY_CONTEXT_VALID_S) x 64 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_VALID_G(x) \ x 65 drivers/crypto/chelsio/chcr_algo.h (((x) >> KEY_CONTEXT_VALID_S) & \ x 71 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_CK_SIZE_V(x) ((x) << KEY_CONTEXT_CK_SIZE_S) x 72 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_CK_SIZE_G(x) \ x 73 drivers/crypto/chelsio/chcr_algo.h (((x) >> KEY_CONTEXT_CK_SIZE_S) & KEY_CONTEXT_CK_SIZE_M) x 77 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_MK_SIZE_V(x) ((x) << KEY_CONTEXT_MK_SIZE_S) x 78 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_MK_SIZE_G(x) \ x 79 drivers/crypto/chelsio/chcr_algo.h (((x) >> KEY_CONTEXT_MK_SIZE_S) & KEY_CONTEXT_MK_SIZE_M) x 83 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_OPAD_PRESENT_V(x) ((x) << KEY_CONTEXT_OPAD_PRESENT_S) x 84 drivers/crypto/chelsio/chcr_algo.h #define KEY_CONTEXT_OPAD_PRESENT_G(x) \ x 85 drivers/crypto/chelsio/chcr_algo.h (((x) >> KEY_CONTEXT_OPAD_PRESENT_S) & \ x 90 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RXFLIT_CNT_V(x) ((x) << TLS_KEYCTX_RXFLIT_CNT_S) x 94 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RXPROT_VER_V(x) ((x) << TLS_KEYCTX_RXPROT_VER_S) x 98 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RXCIPH_MODE_V(x) ((x) << TLS_KEYCTX_RXCIPH_MODE_S) x 102 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RXAUTH_MODE_V(x) ((x) << TLS_KEYCTX_RXAUTH_MODE_S) x 105 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RXCIAU_CTRL_V(x) ((x) << TLS_KEYCTX_RXCIAU_CTRL_S) x 109 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RX_SEQCTR_V(x) ((x) << TLS_KEYCTX_RX_SEQCTR_S) x 112 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RX_VALID_V(x) ((x) << TLS_KEYCTX_RX_VALID_S) x 116 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RXCK_SIZE_V(x) ((x) << TLS_KEYCTX_RXCK_SIZE_S) x 120 drivers/crypto/chelsio/chcr_algo.h #define TLS_KEYCTX_RXMK_SIZE_V(x) ((x) << TLS_KEYCTX_RXMK_SIZE_S) x 52 drivers/crypto/chelsio/chcr_core.h #define CHK_PAD_ERR_BIT(x) (((x) >> PAD_ERROR_BIT) & 1) x 55 drivers/crypto/chelsio/chcr_core.h #define CHK_MAC_ERR_BIT(x) (((x) >> MAC_ERROR_BIT) & 1) x 75 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_IV_V(x) ((x) << KEYCTX_TX_WR_IV_S) x 76 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_IV_G(x) \ x 77 drivers/crypto/chelsio/chcr_core.h (((x) >> KEYCTX_TX_WR_IV_S) & KEYCTX_TX_WR_IV_M) x 81 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AAD_V(x) ((x) << KEYCTX_TX_WR_AAD_S) x 82 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AAD_G(x) (((x) >> KEYCTX_TX_WR_AAD_S) & \ x 87 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AADST_V(x) ((x) << KEYCTX_TX_WR_AADST_S) x 88 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AADST_G(x) \ x 89 drivers/crypto/chelsio/chcr_core.h (((x) >> KEYCTX_TX_WR_AADST_S) & KEYCTX_TX_WR_AADST_M) x 93 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_CIPHER_V(x) ((x) << KEYCTX_TX_WR_CIPHER_S) x 94 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_CIPHER_G(x) \ x 95 drivers/crypto/chelsio/chcr_core.h (((x) >> KEYCTX_TX_WR_CIPHER_S) & KEYCTX_TX_WR_CIPHER_M) x 99 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_CIPHERST_V(x) ((x) << KEYCTX_TX_WR_CIPHERST_S) x 100 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_CIPHERST_G(x) \ x 101 drivers/crypto/chelsio/chcr_core.h (((x) >> KEYCTX_TX_WR_CIPHERST_S) & KEYCTX_TX_WR_CIPHERST_M) x 105 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AUTH_V(x) ((x) << KEYCTX_TX_WR_AUTH_S) x 106 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AUTH_G(x) \ x 107 drivers/crypto/chelsio/chcr_core.h (((x) >> KEYCTX_TX_WR_AUTH_S) & KEYCTX_TX_WR_AUTH_M) x 111 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AUTHST_V(x) ((x) << KEYCTX_TX_WR_AUTHST_S) x 112 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AUTHST_G(x) \ x 113 drivers/crypto/chelsio/chcr_core.h (((x) >> KEYCTX_TX_WR_AUTHST_S) & KEYCTX_TX_WR_AUTHST_M) x 117 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AUTHIN_V(x) ((x) << KEYCTX_TX_WR_AUTHIN_S) x 118 drivers/crypto/chelsio/chcr_core.h #define KEYCTX_TX_WR_AUTHIN_G(x) \ x 119 drivers/crypto/chelsio/chcr_core.h (((x) >> KEYCTX_TX_WR_AUTHIN_S) & KEYCTX_TX_WR_AUTHIN_M) x 126 drivers/crypto/chelsio/chcr_crypto.h #define flits_to_bytes(x) (x * 8) x 75 drivers/crypto/chelsio/chcr_ipsec.c static int chcr_xfrm_add_state(struct xfrm_state *x); x 76 drivers/crypto/chelsio/chcr_ipsec.c static void chcr_xfrm_del_state(struct xfrm_state *x); x 77 drivers/crypto/chelsio/chcr_ipsec.c static void chcr_xfrm_free_state(struct xfrm_state *x); x 78 drivers/crypto/chelsio/chcr_ipsec.c static bool chcr_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x); x 79 drivers/crypto/chelsio/chcr_ipsec.c static void chcr_advance_esn_state(struct xfrm_state *x); x 108 drivers/crypto/chelsio/chcr_ipsec.c static inline int chcr_ipsec_setauthsize(struct xfrm_state *x, x 112 drivers/crypto/chelsio/chcr_ipsec.c int authsize = x->aead->alg_icv_len / 8; x 132 drivers/crypto/chelsio/chcr_ipsec.c static inline int chcr_ipsec_setkey(struct xfrm_state *x, x 135 drivers/crypto/chelsio/chcr_ipsec.c int keylen = (x->aead->alg_key_len + 7) / 8; x 136 drivers/crypto/chelsio/chcr_ipsec.c unsigned char *key = x->aead->alg_key; x 195 drivers/crypto/chelsio/chcr_ipsec.c static int chcr_xfrm_add_state(struct xfrm_state *x) x 200 drivers/crypto/chelsio/chcr_ipsec.c if (x->props.aalgo != SADB_AALG_NONE) { x 204 drivers/crypto/chelsio/chcr_ipsec.c if (x->props.calgo != SADB_X_CALG_NONE) { x 208 drivers/crypto/chelsio/chcr_ipsec.c if (x->props.family != AF_INET && x 209 drivers/crypto/chelsio/chcr_ipsec.c x->props.family != AF_INET6) { x 213 drivers/crypto/chelsio/chcr_ipsec.c if (x->props.mode != XFRM_MODE_TRANSPORT && x 214 drivers/crypto/chelsio/chcr_ipsec.c x->props.mode != XFRM_MODE_TUNNEL) { x 218 drivers/crypto/chelsio/chcr_ipsec.c if (x->id.proto != IPPROTO_ESP) { x 222 drivers/crypto/chelsio/chcr_ipsec.c if (x->encap) { x 226 drivers/crypto/chelsio/chcr_ipsec.c if (!x->aead) { x 230 drivers/crypto/chelsio/chcr_ipsec.c if (x->aead->alg_icv_len != 128 && x 231 drivers/crypto/chelsio/chcr_ipsec.c x->aead->alg_icv_len != 96) { x 235 drivers/crypto/chelsio/chcr_ipsec.c if ((x->aead->alg_key_len != 128 + 32) && x 236 drivers/crypto/chelsio/chcr_ipsec.c (x->aead->alg_key_len != 256 + 32)) { x 240 drivers/crypto/chelsio/chcr_ipsec.c if (x->tfcpad) { x 244 drivers/crypto/chelsio/chcr_ipsec.c if (!x->geniv) { x 248 drivers/crypto/chelsio/chcr_ipsec.c if (strcmp(x->geniv, "seqiv")) { x 259 drivers/crypto/chelsio/chcr_ipsec.c sa_entry->hmac_ctrl = chcr_ipsec_setauthsize(x, sa_entry); x 260 drivers/crypto/chelsio/chcr_ipsec.c if (x->props.flags & XFRM_STATE_ESN) x 262 drivers/crypto/chelsio/chcr_ipsec.c chcr_ipsec_setkey(x, sa_entry); x 263 drivers/crypto/chelsio/chcr_ipsec.c x->xso.offload_handle = (unsigned long)sa_entry; x 269 drivers/crypto/chelsio/chcr_ipsec.c static void chcr_xfrm_del_state(struct xfrm_state *x) x 272 drivers/crypto/chelsio/chcr_ipsec.c if (!x->xso.offload_handle) x 276 drivers/crypto/chelsio/chcr_ipsec.c static void chcr_xfrm_free_state(struct xfrm_state *x) x 280 drivers/crypto/chelsio/chcr_ipsec.c if (!x->xso.offload_handle) x 283 drivers/crypto/chelsio/chcr_ipsec.c sa_entry = (struct ipsec_sa_entry *)x->xso.offload_handle; x 288 drivers/crypto/chelsio/chcr_ipsec.c static bool chcr_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x) x 290 drivers/crypto/chelsio/chcr_ipsec.c if (x->props.family == AF_INET) { x 305 drivers/crypto/chelsio/chcr_ipsec.c static void chcr_advance_esn_state(struct xfrm_state *x) x 308 drivers/crypto/chelsio/chcr_ipsec.c if (!x->xso.offload_handle) x 675 drivers/crypto/chelsio/chcr_ipsec.c struct xfrm_state *x = xfrm_input_state(skb); x 687 drivers/crypto/chelsio/chcr_ipsec.c if (!x->xso.offload_handle) x 690 drivers/crypto/chelsio/chcr_ipsec.c sa_entry = (struct ipsec_sa_entry *)x->xso.offload_handle; x 251 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_INT_ERROR_V(x) \ x 252 drivers/crypto/chelsio/chtls/chtls.h ((x) << TLSRX_HDR_PKT_INT_ERROR_S) x 253 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_INT_ERROR_G(x) \ x 254 drivers/crypto/chelsio/chtls/chtls.h (((x) >> TLSRX_HDR_PKT_INT_ERROR_S) & TLSRX_HDR_PKT_INT_ERROR_M) x 259 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_SPP_ERROR_V(x) ((x) << TLSRX_HDR_PKT_SPP_ERROR) x 260 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_SPP_ERROR_G(x) \ x 261 drivers/crypto/chelsio/chtls/chtls.h (((x) >> TLSRX_HDR_PKT_SPP_ERROR_S) & TLSRX_HDR_PKT_SPP_ERROR_M) x 266 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_CCDX_ERROR_V(x) ((x) << TLSRX_HDR_PKT_CCDX_ERROR_S) x 267 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_CCDX_ERROR_G(x) \ x 268 drivers/crypto/chelsio/chtls/chtls.h (((x) >> TLSRX_HDR_PKT_CCDX_ERROR_S) & TLSRX_HDR_PKT_CCDX_ERROR_M) x 273 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_PAD_ERROR_V(x) ((x) << TLSRX_HDR_PKT_PAD_ERROR_S) x 274 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_PAD_ERROR_G(x) \ x 275 drivers/crypto/chelsio/chtls/chtls.h (((x) >> TLSRX_HDR_PKT_PAD_ERROR_S) & TLSRX_HDR_PKT_PAD_ERROR_M) x 280 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_MAC_ERROR_V(x) ((x) << TLSRX_HDR_PKT_MAC_ERROR) x 281 drivers/crypto/chelsio/chtls/chtls.h #define TLSRX_HDR_PKT_MAC_ERROR_G(x) \ x 282 drivers/crypto/chelsio/chtls/chtls.h (((x) >> S_TLSRX_HDR_PKT_MAC_ERROR_S) & TLSRX_HDR_PKT_MAC_ERROR_M) x 16 drivers/crypto/chelsio/chtls/chtls_cm.h #define TCB_ULP_TYPE_V(x) ((x) << TCB_ULP_TYPE_S) x 22 drivers/crypto/chelsio/chtls/chtls_cm.h #define TCB_ULP_RAW_V(x) ((x) << TCB_ULP_RAW_S) x 25 drivers/crypto/chelsio/chtls/chtls_cm.h #define TF_TLS_KEY_SIZE_V(x) ((x) << TF_TLS_KEY_SIZE_S) x 28 drivers/crypto/chelsio/chtls/chtls_cm.h #define TF_TLS_CONTROL_V(x) ((x) << TF_TLS_CONTROL_S) x 31 drivers/crypto/chelsio/chtls/chtls_cm.h #define TF_TLS_ACTIVE_V(x) ((x) << TF_TLS_ACTIVE_S) x 34 drivers/crypto/chelsio/chtls/chtls_cm.h #define TF_TLS_ENABLE_V(x) ((x) << TF_TLS_ENABLE_S) x 37 drivers/crypto/chelsio/chtls/chtls_cm.h #define TF_RX_QUIESCE_V(x) ((x) << TF_RX_QUIESCE_S) x 51 drivers/crypto/chelsio/chtls/chtls_cm.h #define LOOPBACK(x) (((x) & htonl(0xff000000)) == htonl(0x7f000000)) x 51 drivers/crypto/hisilicon/sec/sec_drv.c #define SEC_SAA_CTRL_REG(x) ((x) * SEC_SAA_ADDR_SIZE) x 86 drivers/crypto/hisilicon/sec/sec_drv.c #define SEC_IPV6_MASK_TABLE_X_REG(x) (0x0024 + (x) * 4) x 413 drivers/crypto/inside-secure/safexcel.h #define EIP197_TRC_PARAMS_HTABLE_SZ(x) ((x) << 4) x 414 drivers/crypto/inside-secure/safexcel.h #define EIP197_TRC_PARAMS_BLK_TIMER_SPEED(x) ((x) << 10) x 428 drivers/crypto/inside-secure/safexcel.h #define EIP197_CS_RC_NEXT(x) (x) x 429 drivers/crypto/inside-secure/safexcel.h #define EIP197_CS_RC_PREV(x) ((x) << 10) x 489 drivers/crypto/inside-secure/safexcel.h #define EIP197_TOKEN_CTX_OFFSET(x) (x) x 514 drivers/crypto/inside-secure/safexcel.h #define EIP197_TOKEN_INS_ORIGIN_LEN(x) ((x) << 5) x 39 drivers/crypto/marvell/cesa.h #define CESA_TDMA_WINDOW_BASE(x) (((x) * 0x8) + 0xa00) x 40 drivers/crypto/marvell/cesa.h #define CESA_TDMA_WINDOW_CTRL(x) (((x) * 0x8) + 0xa04) x 42 drivers/crypto/marvell/cesa.h #define CESA_IVDIG(x) (0xdd00 + ((x) * 4) + \ x 43 drivers/crypto/marvell/cesa.h (((x) < 5) ? 0 : 0x14)) x 44 drivers/crypto/mediatek/mtk-aes.c #define AES_TFM_SIZE(x) cpu_to_le32((x) << 8) x 18 drivers/crypto/mediatek/mtk-platform.c #define MTK_BURST_SIZE(x) ((x) << 4) x 19 drivers/crypto/mediatek/mtk-platform.c #define MTK_DESC_SIZE(x) ((x) << 0) x 20 drivers/crypto/mediatek/mtk-platform.c #define MTK_DESC_OFFSET(x) ((x) << 16) x 21 drivers/crypto/mediatek/mtk-platform.c #define MTK_DESC_FETCH_SIZE(x) ((x) << 0) x 22 drivers/crypto/mediatek/mtk-platform.c #define MTK_DESC_FETCH_THRESH(x) ((x) << 16) x 29 drivers/crypto/mediatek/mtk-platform.c #define MTK_DFSE_RING_ID(x) (((x) >> 12) & GENMASK(3, 0)) x 30 drivers/crypto/mediatek/mtk-platform.c #define MTK_DFSE_MIN_DATA(x) ((x) << 0) x 31 drivers/crypto/mediatek/mtk-platform.c #define MTK_DFSE_MAX_DATA(x) ((x) << 8) x 32 drivers/crypto/mediatek/mtk-platform.c #define MTK_DFE_MIN_CTRL(x) ((x) << 16) x 33 drivers/crypto/mediatek/mtk-platform.c #define MTK_DFE_MAX_CTRL(x) ((x) << 24) x 35 drivers/crypto/mediatek/mtk-platform.c #define MTK_IN_BUF_MIN_THRESH(x) ((x) << 8) x 36 drivers/crypto/mediatek/mtk-platform.c #define MTK_IN_BUF_MAX_THRESH(x) ((x) << 12) x 37 drivers/crypto/mediatek/mtk-platform.c #define MTK_OUT_BUF_MIN_THRESH(x) ((x) << 0) x 38 drivers/crypto/mediatek/mtk-platform.c #define MTK_OUT_BUF_MAX_THRESH(x) ((x) << 4) x 39 drivers/crypto/mediatek/mtk-platform.c #define MTK_IN_TBUF_SIZE(x) (((x) >> 4) & GENMASK(3, 0)) x 40 drivers/crypto/mediatek/mtk-platform.c #define MTK_IN_DBUF_SIZE(x) (((x) >> 8) & GENMASK(3, 0)) x 41 drivers/crypto/mediatek/mtk-platform.c #define MTK_OUT_DBUF_SIZE(x) (((x) >> 16) & GENMASK(3, 0)) x 42 drivers/crypto/mediatek/mtk-platform.c #define MTK_CMD_FIFO_SIZE(x) (((x) >> 8) & GENMASK(3, 0)) x 43 drivers/crypto/mediatek/mtk-platform.c #define MTK_RES_FIFO_SIZE(x) (((x) >> 12) & GENMASK(3, 0)) x 61 drivers/crypto/mediatek/mtk-platform.c #define MTK_HIA_DATA_WIDTH(x) (((x) >> 25) & GENMASK(1, 0)) x 62 drivers/crypto/mediatek/mtk-platform.c #define MTK_HIA_DMA_LENGTH(x) (((x) >> 20) & GENMASK(4, 0)) x 30 drivers/crypto/mediatek/mtk-platform.h #define SIZE_IN_WORDS(x) ((x) >> 2) x 74 drivers/crypto/mediatek/mtk-platform.h #define MTK_DESC_CNT(x) ((MTK_DESC_OFF * (x)) << 2) x 77 drivers/crypto/mediatek/mtk-platform.h #define MTK_DESC_BUF_LEN(x) cpu_to_le32(x) x 78 drivers/crypto/mediatek/mtk-platform.h #define MTK_DESC_CT_LEN(x) cpu_to_le32((x) << 24) x 13 drivers/crypto/mediatek/mtk-regs.h #define CDR_BASE_ADDR_LO(x) (0x0 + ((x) << 12)) x 14 drivers/crypto/mediatek/mtk-regs.h #define CDR_BASE_ADDR_HI(x) (0x4 + ((x) << 12)) x 15 drivers/crypto/mediatek/mtk-regs.h #define CDR_DATA_BASE_ADDR_LO(x) (0x8 + ((x) << 12)) x 16 drivers/crypto/mediatek/mtk-regs.h #define CDR_DATA_BASE_ADDR_HI(x) (0xC + ((x) << 12)) x 17 drivers/crypto/mediatek/mtk-regs.h #define CDR_ACD_BASE_ADDR_LO(x) (0x10 + ((x) << 12)) x 18 drivers/crypto/mediatek/mtk-regs.h #define CDR_ACD_BASE_ADDR_HI(x) (0x14 + ((x) << 12)) x 19 drivers/crypto/mediatek/mtk-regs.h #define CDR_RING_SIZE(x) (0x18 + ((x) << 12)) x 20 drivers/crypto/mediatek/mtk-regs.h #define CDR_DESC_SIZE(x) (0x1C + ((x) << 12)) x 21 drivers/crypto/mediatek/mtk-regs.h #define CDR_CFG(x) (0x20 + ((x) << 12)) x 22 drivers/crypto/mediatek/mtk-regs.h #define CDR_DMA_CFG(x) (0x24 + ((x) << 12)) x 23 drivers/crypto/mediatek/mtk-regs.h #define CDR_THRESH(x) (0x28 + ((x) << 12)) x 24 drivers/crypto/mediatek/mtk-regs.h #define CDR_PREP_COUNT(x) (0x2C + ((x) << 12)) x 25 drivers/crypto/mediatek/mtk-regs.h #define CDR_PROC_COUNT(x) (0x30 + ((x) << 12)) x 26 drivers/crypto/mediatek/mtk-regs.h #define CDR_PREP_PNTR(x) (0x34 + ((x) << 12)) x 27 drivers/crypto/mediatek/mtk-regs.h #define CDR_PROC_PNTR(x) (0x38 + ((x) << 12)) x 28 drivers/crypto/mediatek/mtk-regs.h #define CDR_STAT(x) (0x3C + ((x) << 12)) x 31 drivers/crypto/mediatek/mtk-regs.h #define RDR_BASE_ADDR_LO(x) (0x800 + ((x) << 12)) x 32 drivers/crypto/mediatek/mtk-regs.h #define RDR_BASE_ADDR_HI(x) (0x804 + ((x) << 12)) x 33 drivers/crypto/mediatek/mtk-regs.h #define RDR_DATA_BASE_ADDR_LO(x) (0x808 + ((x) << 12)) x 34 drivers/crypto/mediatek/mtk-regs.h #define RDR_DATA_BASE_ADDR_HI(x) (0x80C + ((x) << 12)) x 35 drivers/crypto/mediatek/mtk-regs.h #define RDR_ACD_BASE_ADDR_LO(x) (0x810 + ((x) << 12)) x 36 drivers/crypto/mediatek/mtk-regs.h #define RDR_ACD_BASE_ADDR_HI(x) (0x814 + ((x) << 12)) x 37 drivers/crypto/mediatek/mtk-regs.h #define RDR_RING_SIZE(x) (0x818 + ((x) << 12)) x 38 drivers/crypto/mediatek/mtk-regs.h #define RDR_DESC_SIZE(x) (0x81C + ((x) << 12)) x 39 drivers/crypto/mediatek/mtk-regs.h #define RDR_CFG(x) (0x820 + ((x) << 12)) x 40 drivers/crypto/mediatek/mtk-regs.h #define RDR_DMA_CFG(x) (0x824 + ((x) << 12)) x 41 drivers/crypto/mediatek/mtk-regs.h #define RDR_THRESH(x) (0x828 + ((x) << 12)) x 42 drivers/crypto/mediatek/mtk-regs.h #define RDR_PREP_COUNT(x) (0x82C + ((x) << 12)) x 43 drivers/crypto/mediatek/mtk-regs.h #define RDR_PROC_COUNT(x) (0x830 + ((x) << 12)) x 44 drivers/crypto/mediatek/mtk-regs.h #define RDR_PREP_PNTR(x) (0x834 + ((x) << 12)) x 45 drivers/crypto/mediatek/mtk-regs.h #define RDR_PROC_PNTR(x) (0x838 + ((x) << 12)) x 46 drivers/crypto/mediatek/mtk-regs.h #define RDR_STAT(x) (0x83C + ((x) << 12)) x 49 drivers/crypto/mediatek/mtk-regs.h #define AIC_POL_CTRL(x) (0xE000 - ((x) << 12)) x 50 drivers/crypto/mediatek/mtk-regs.h #define AIC_TYPE_CTRL(x) (0xE004 - ((x) << 12)) x 51 drivers/crypto/mediatek/mtk-regs.h #define AIC_ENABLE_CTRL(x) (0xE008 - ((x) << 12)) x 52 drivers/crypto/mediatek/mtk-regs.h #define AIC_RAW_STAL(x) (0xE00C - ((x) << 12)) x 53 drivers/crypto/mediatek/mtk-regs.h #define AIC_ENABLE_SET(x) (0xE00C - ((x) << 12)) x 54 drivers/crypto/mediatek/mtk-regs.h #define AIC_ENABLED_STAT(x) (0xE010 - ((x) << 12)) x 55 drivers/crypto/mediatek/mtk-regs.h #define AIC_ACK(x) (0xE010 - ((x) << 12)) x 56 drivers/crypto/mediatek/mtk-regs.h #define AIC_ENABLE_CLR(x) (0xE014 - ((x) << 12)) x 57 drivers/crypto/mediatek/mtk-regs.h #define AIC_OPTIONS(x) (0xE018 - ((x) << 12)) x 58 drivers/crypto/mediatek/mtk-regs.h #define AIC_VERSION(x) (0xE01C - ((x) << 12)) x 80 drivers/crypto/mediatek/mtk-regs.h #define DFE_RING_REGION_LO(x) (0xF080 + ((x) << 3)) x 81 drivers/crypto/mediatek/mtk-regs.h #define DFE_RING_REGION_HI(x) (0xF084 + ((x) << 3)) x 100 drivers/crypto/mediatek/mtk-regs.h #define DSE_RING_REGION_LO(x) (0xF480 + ((x) << 3)) x 101 drivers/crypto/mediatek/mtk-regs.h #define DSE_RING_REGION_HI(x) (0xF484 + ((x) << 3)) x 35 drivers/crypto/mediatek/mtk-sha.c #define SHA_TFM_SIZE(x) cpu_to_le32((x) << 8) x 44 drivers/crypto/mediatek/mtk-sha.c #define SHA_TFM_DIGEST(x) cpu_to_le32(((x) & GENMASK(3, 0)) << 24) x 802 drivers/crypto/n2_core.c u8 *x = s + 256; x 803 drivers/crypto/n2_core.c u8 *y = x + 1; x 809 drivers/crypto/n2_core.c *x = 0; x 77 drivers/crypto/nx/nx-842-pseries.c #define NX842_CSBCBP_VALID_CHK(x) (x & BIT_MASK(7)) x 83 drivers/crypto/nx/nx-842-pseries.c #define NX842_CSBCPB_CE0(x) (x & BIT_MASK(7)) x 84 drivers/crypto/nx/nx-842-pseries.c #define NX842_CSBCPB_CE1(x) (x & BIT_MASK(6)) x 85 drivers/crypto/nx/nx-842-pseries.c #define NX842_CSBCPB_CE2(x) (x & BIT_MASK(5)) x 143 drivers/crypto/nx/nx-842-pseries.c #define NX842_OP_NOTIFY_INT(x) ((x & 0xff)<<8) x 176 drivers/crypto/nx/nx.h #define NX_PAGE_NUM(x) ((u64)(x) & 0xfffffffffffff000ULL) x 108 drivers/crypto/nx/nx_csbcpb.h #define NX_CPB_SET_KEY_SIZE(c, x) NX_CPB_KS_DS(c) |= ((x) << 4) x 109 drivers/crypto/nx/nx_csbcpb.h #define NX_CPB_SET_DIGEST_SIZE(c, x) NX_CPB_KS_DS(c) |= (x) x 26 drivers/crypto/omap-aes.h #define AES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \ x 27 drivers/crypto/omap-aes.h (((x) ^ 0x01) * 0x04)) x 28 drivers/crypto/omap-aes.h #define AES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04)) x 50 drivers/crypto/omap-aes.h #define AES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04)) x 51 drivers/crypto/omap-aes.h #define AES_REG_TAG_N(dd, x) (0x70 + ((x) * 0x04)) x 63 drivers/crypto/omap-aes.h #define AES_REG_LENGTH_N(x) (0x54 + ((x) * 0x04)) x 48 drivers/crypto/omap-des.c #define DES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \ x 49 drivers/crypto/omap-des.c ((x ^ 0x01) * 0x04)) x 51 drivers/crypto/omap-des.c #define DES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04)) x 60 drivers/crypto/omap-des.c #define DES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04)) x 66 drivers/crypto/omap-des.c #define DES_REG_LENGTH_N(x) (0x24 + ((x) * 0x04)) x 46 drivers/crypto/omap-sham.c #define SHA_REG_IDIGEST(dd, x) ((dd)->pdata->idigest_ofs + ((x)*0x04)) x 47 drivers/crypto/omap-sham.c #define SHA_REG_DIN(dd, x) ((dd)->pdata->din_ofs + ((x) * 0x04)) x 50 drivers/crypto/omap-sham.c #define SHA_REG_ODIGEST(dd, x) ((dd)->pdata->odigest_ofs + (x * 0x04)) x 83 drivers/crypto/sahara.c #define SAHARA_CONTROL_SET_THROTTLE(x) (((x) & 0xff) << 24) x 84 drivers/crypto/sahara.c #define SAHARA_CONTROL_SET_MAXBURST(x) (((x) & 0xff) << 16) x 95 drivers/crypto/sahara.c #define SAHARA_STATUS_GET_STATE(x) ((x) & 0x7) x 114 drivers/crypto/sahara.c #define SAHARA_STATUS_GET_ISTATE(x) (((x) >> 24) & 0xff) x 116 drivers/crypto/sahara.c #define SAHARA_ERRSTATUS_GET_SOURCE(x) ((x) & 0xf) x 120 drivers/crypto/sahara.c #define SAHARA_ERRSTATUS_GET_DMASZ(x)(((x) >> 9) & 0x3) x 121 drivers/crypto/sahara.c #define SAHARA_ERRSTATUS_GET_DMASRC(x) (((x) >> 13) & 0x7) x 122 drivers/crypto/sahara.c #define SAHARA_ERRSTATUS_GET_CHASRC(x) (((x) >> 16) & 0xfff) x 123 drivers/crypto/sahara.c #define SAHARA_ERRSTATUS_GET_CHAERR(x) (((x) >> 28) & 0x3) x 35 drivers/crypto/stm32/stm32-hash.c #define HASH_CSR(x) (0x0F8 + ((x) * 0x04)) x 36 drivers/crypto/stm32/stm32-hash.c #define HASH_HREG(x) (0x310 + ((x) * 0x04)) x 183 drivers/crypto/talitos.h #define ISR1_FORMAT(x) (((x) << 28) | ((x) << 16)) x 184 drivers/crypto/talitos.h #define ISR2_FORMAT(x) (((x) << 4) | (x)) x 90 drivers/devfreq/event/exynos-ppmu.h #define PPMU_PMNCT(x) (PPMU_PMCNT0 + (0x10 * x)) x 91 drivers/devfreq/event/exynos-ppmu.h #define PPMU_BEVTxSEL(x) (PPMU_BEVT0SEL + (0x100 * x)) x 157 drivers/devfreq/event/exynos-ppmu.h #define PPMU_V2_PMNCT(x) (PPMU_V2_PMCNT0 + (0x4 * x)) x 158 drivers/devfreq/event/exynos-ppmu.h #define PPMU_V2_CH_EVx_TYPE(x) (PPMU_V2_CH_EV0_TYPE + (0x4 * x)) x 67 drivers/dio/dio.c #define DIONAME(x) { DIO_ID_##x, DIO_DESC_##x } x 68 drivers/dio/dio.c #define DIOFBNAME(x) { DIO_ENCODE_ID( DIO_ID_FBUFFER, DIO_ID2_##x), DIO_DESC2_##x } x 28 drivers/dma-buf/selftest.h #define SUBTEST(x) { x, #x } x 54 drivers/dma/altera-msgdma.c #define MSGDMA_DESC_CTL_SET_CH(x) ((x) & 0xff) x 25 drivers/dma/at_hdmac_regs.h #define AT_DMA_SSREQ(x) (0x1 << ((x) << 1)) /* Request a source single transfer on channel x */ x 26 drivers/dma/at_hdmac_regs.h #define AT_DMA_DSREQ(x) (0x1 << (1 + ((x) << 1))) /* Request a destination single transfer on channel x */ x 29 drivers/dma/at_hdmac_regs.h #define AT_DMA_SCREQ(x) (0x1 << ((x) << 1)) /* Request a source chunk transfer on channel x */ x 30 drivers/dma/at_hdmac_regs.h #define AT_DMA_DCREQ(x) (0x1 << (1 + ((x) << 1))) /* Request a destination chunk transfer on channel x */ x 33 drivers/dma/at_hdmac_regs.h #define AT_DMA_SLAST(x) (0x1 << ((x) << 1)) /* This src rq is last tx of buffer on channel x */ x 34 drivers/dma/at_hdmac_regs.h #define AT_DMA_DLAST(x) (0x1 << (1 + ((x) << 1))) /* This dst rq is last tx of buffer on channel x */ x 46 drivers/dma/at_hdmac_regs.h #define AT_DMA_BTC(x) (0x1 << (x)) x 47 drivers/dma/at_hdmac_regs.h #define AT_DMA_CBTC(x) (0x1 << (AT_DMA_CBTC_OFFSET + (x))) x 48 drivers/dma/at_hdmac_regs.h #define AT_DMA_ERR(x) (0x1 << (AT_DMA_ERR_OFFSET + (x))) x 51 drivers/dma/at_hdmac_regs.h #define AT_DMA_ENA(x) (0x1 << (x)) x 52 drivers/dma/at_hdmac_regs.h #define AT_DMA_SUSP(x) (0x1 << ( 8 + (x))) x 53 drivers/dma/at_hdmac_regs.h #define AT_DMA_KEEP(x) (0x1 << (24 + (x))) x 56 drivers/dma/at_hdmac_regs.h #define AT_DMA_DIS(x) (0x1 << (x)) x 57 drivers/dma/at_hdmac_regs.h #define AT_DMA_RES(x) (0x1 << ( 8 + (x))) x 60 drivers/dma/at_hdmac_regs.h #define AT_DMA_EMPT(x) (0x1 << (16 + (x))) x 61 drivers/dma/at_hdmac_regs.h #define AT_DMA_STAL(x) (0x1 << (24 + (x))) x 65 drivers/dma/at_hdmac_regs.h #define ch_regs(x) (AT_DMA_CH_REGS_BASE + (x) * 0x28) /* Channel x base addr */ x 85 drivers/dma/at_hdmac_regs.h #define ATC_BTSIZE(x) (ATC_BTSIZE_MAX & (x)) /* Buffer Transfer Size */ x 87 drivers/dma/at_hdmac_regs.h #define ATC_SCSIZE(x) (ATC_SCSIZE_MASK & ((x) << 16)) x 97 drivers/dma/at_hdmac_regs.h #define ATC_DCSIZE(x) (ATC_DCSIZE_MASK & ((x) << 20)) x 107 drivers/dma/at_hdmac_regs.h #define ATC_SRC_WIDTH(x) ((x) << 24) x 113 drivers/dma/at_hdmac_regs.h #define ATC_DST_WIDTH(x) ((x) << 28) x 154 drivers/dma/at_hdmac_regs.h #define ATC_SPIP_HOLE(x) (0xFFFFU & (x)) x 155 drivers/dma/at_hdmac_regs.h #define ATC_SPIP_BOUNDARY(x) ((0x3FF & (x)) << 16) x 158 drivers/dma/at_hdmac_regs.h #define ATC_DPIP_HOLE(x) (0xFFFFU & (x)) x 159 drivers/dma/at_hdmac_regs.h #define ATC_DPIP_BOUNDARY(x) ((0x3FF & (x)) << 16) x 121 drivers/dma/bcm2835-dma.c #define BCM2835_DMA_PRIORITY(x) ((x & 15) << 16) /* AXI priority */ x 122 drivers/dma/bcm2835-dma.c #define BCM2835_DMA_PANIC_PRIORITY(x) ((x & 15) << 20) /* panic priority */ x 141 drivers/dma/bcm2835-dma.c #define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12) x 142 drivers/dma/bcm2835-dma.c #define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */ x 143 drivers/dma/bcm2835-dma.c #define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */ x 1263 drivers/dma/coh901318.c #define COH_DBG(x) ({ if (1) x; 0; }) x 1265 drivers/dma/coh901318.c #define COH_DBG(x) ({ if (0) x; 0; }) x 1334 drivers/dma/coh901318.c #define COH901318_DEBUGFS_ASSIGN(x, y) (x = y) x 1395 drivers/dma/coh901318.c #define COH901318_DEBUGFS_ASSIGN(x, y) x 1175 drivers/dma/dmaengine.c #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } x 437 drivers/dma/dmatest.c static unsigned int min_odd(unsigned int x, unsigned int y) x 439 drivers/dma/dmatest.c unsigned int val = min(x, y); x 142 drivers/dma/dw/regs.h #define DWC_LLP_LMS(x) ((x) & 3) /* list master select */ x 143 drivers/dma/dw/regs.h #define DWC_LLP_LOC(x) ((x) & ~3) /* next lli */ x 172 drivers/dma/dw/regs.h #define DWC_CTLH_BLOCK_TS(x) ((x) & DWC_CTLH_BLOCK_TS_MASK) x 177 drivers/dma/dw/regs.h #define DWC_CFGL_CH_PRIOR(x) ((x) << 5) /* priority */ x 192 drivers/dma/dw/regs.h #define DWC_CFGL_MAX_BURST(x) ((x) << 20) x 199 drivers/dma/dw/regs.h #define DWC_CFGH_PROTCTL(x) ((x) << 2) x 206 drivers/dma/dw/regs.h #define DWC_CFGH_SRC_PER(x) ((x) << 7) x 207 drivers/dma/dw/regs.h #define DWC_CFGH_DST_PER(x) ((x) << 11) x 210 drivers/dma/dw/regs.h #define DWC_SGR_SGI(x) ((x) << 0) x 211 drivers/dma/dw/regs.h #define DWC_SGR_SGC(x) ((x) << 20) x 214 drivers/dma/dw/regs.h #define DWC_DSR_DSI(x) ((x) << 0) x 215 drivers/dma/dw/regs.h #define DWC_DSR_DSC(x) ((x) << 20) x 234 drivers/dma/dw/regs.h #define IDMA32C_CTLH_BLOCK_TS(x) ((x) & IDMA32C_CTLH_BLOCK_TS_MASK) x 245 drivers/dma/dw/regs.h #define IDMA32C_CFGH_SRC_PER(x) ((x) << 0) x 246 drivers/dma/dw/regs.h #define IDMA32C_CFGH_DST_PER(x) ((x) << 4) x 247 drivers/dma/dw/regs.h #define IDMA32C_CFGH_RD_ISSUE_THD(x) ((x) << 8) x 248 drivers/dma/dw/regs.h #define IDMA32C_CFGH_RW_ISSUE_THD(x) ((x) << 18) x 249 drivers/dma/dw/regs.h #define IDMA32C_CFGH_SRC_PER_EXT(x) ((x) << 28) /* src peripheral extension */ x 250 drivers/dma/dw/regs.h #define IDMA32C_CFGH_DST_PER_EXT(x) ((x) << 30) /* dst peripheral extension */ x 253 drivers/dma/dw/regs.h #define IDMA32C_FP_PSIZE_CH0(x) ((x) << 0) x 254 drivers/dma/dw/regs.h #define IDMA32C_FP_PSIZE_CH1(x) ((x) << 13) x 23 drivers/dma/fsl-edma-common.h #define EDMA_SEEI_SEEI(x) ((x) & GENMASK(4, 0)) x 24 drivers/dma/fsl-edma-common.h #define EDMA_CEEI_CEEI(x) ((x) & GENMASK(4, 0)) x 25 drivers/dma/fsl-edma-common.h #define EDMA_CINT_CINT(x) ((x) & GENMASK(4, 0)) x 26 drivers/dma/fsl-edma-common.h #define EDMA_CERR_CERR(x) ((x) & GENMASK(4, 0)) x 28 drivers/dma/fsl-edma-common.h #define EDMA_TCD_ATTR_DSIZE(x) (((x) & GENMASK(2, 0))) x 29 drivers/dma/fsl-edma-common.h #define EDMA_TCD_ATTR_DMOD(x) (((x) & GENMASK(4, 0)) << 3) x 30 drivers/dma/fsl-edma-common.h #define EDMA_TCD_ATTR_SSIZE(x) (((x) & GENMASK(2, 0)) << 8) x 31 drivers/dma/fsl-edma-common.h #define EDMA_TCD_ATTR_SMOD(x) (((x) & GENMASK(4, 0)) << 11) x 43 drivers/dma/fsl-edma-common.h #define EDMA_TCD_CITER_CITER(x) ((x) & GENMASK(14, 0)) x 44 drivers/dma/fsl-edma-common.h #define EDMA_TCD_BITER_BITER(x) ((x) & GENMASK(14, 0)) x 36 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQMR(x) (0xc0 + 0x100 * (x)) x 37 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQSR(x) (0xc4 + 0x100 * (x)) x 38 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQEDPA_SADDR(x) (0xc8 + 0x100 * (x)) x 39 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQDPA_SADDR(x) (0xcc + 0x100 * (x)) x 40 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQEEPA_SADDR(x) (0xd0 + 0x100 * (x)) x 41 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQEPA_SADDR(x) (0xd4 + 0x100 * (x)) x 42 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQIER(x) (0xe0 + 0x100 * (x)) x 43 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQIDR(x) (0xe4 + 0x100 * (x)) x 73 drivers/dma/fsl-qdma.c #define FSL_QDMA_BSQICR_ICST(x) ((x) << 16) x 80 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQMR_CD_THLD(x) ((x) << 20) x 81 drivers/dma/fsl-qdma.c #define FSL_QDMA_BCQMR_CQ_SIZE(x) ((x) << 16) x 88 drivers/dma/fsl-qdma.c #define FSL_QDMA_BSQMR_CQ_SIZE(x) ((x) << 16) x 116 drivers/dma/fsl-qdma.c #define QDMA_SDDF_CMD(x) (((u64)(x)) << 32) x 124 drivers/dma/fsl-qdma.c #define FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma_engine, x) \ x 125 drivers/dma/fsl-qdma.c (((fsl_qdma_engine)->block_offset) * (x)) x 48 drivers/dma/fsl_raid.h #define FSL_RE_ADD_JOB(x) ((x) << 16) x 49 drivers/dma/fsl_raid.h #define FSL_RE_RMVD_JOB(x) ((x) << 16) x 53 drivers/dma/fsl_raid.h #define FSL_RE_SLOT_FULL(x) ((x) >> FSL_RE_SLOT_FULL_SHIFT) x 55 drivers/dma/fsl_raid.h #define FSL_RE_SLOT_AVAIL(x) ((x) >> FSL_RE_SLOT_AVAIL_SHIFT) x 23 drivers/dma/hsu/hsu.h #define HSU_CH_DxSAR(x) (0x20 + 8 * (x)) /* desc start addr */ x 24 drivers/dma/hsu/hsu.h #define HSU_CH_DxTSR(x) (0x24 + 8 * (x)) /* desc transfer size */ x 38 drivers/dma/hsu/hsu.h #define HSU_CH_SR_DESCTO(x) BIT(8 + (x)) x 41 drivers/dma/hsu/hsu.h #define HSU_CH_SR_DESCE(x) BIT(16 + (x)) x 50 drivers/dma/hsu/hsu.h #define HSU_CH_DCR_DESCA(x) BIT(0 + (x)) x 51 drivers/dma/hsu/hsu.h #define HSU_CH_DCR_CHSOD(x) BIT(8 + (x)) x 54 drivers/dma/hsu/hsu.h #define HSU_CH_DCR_CHDI(x) BIT(16 + (x)) x 56 drivers/dma/hsu/hsu.h #define HSU_CH_DCR_CHTOI(x) BIT(24 + (x)) x 60 drivers/dma/hsu/hsu.h #define HSU_CH_DxTSR_TSR(x) ((x) & HSU_CH_DxTSR_MASK) x 40 drivers/dma/idma64.h #define IDMA64C_CTLL_DST_WIDTH(x) ((x) << 1) /* bytes per element */ x 41 drivers/dma/idma64.h #define IDMA64C_CTLL_SRC_WIDTH(x) ((x) << 4) x 46 drivers/dma/idma64.h #define IDMA64C_CTLL_DST_MSIZE(x) ((x) << 11) /* burst, #elements */ x 47 drivers/dma/idma64.h #define IDMA64C_CTLL_SRC_MSIZE(x) ((x) << 14) x 55 drivers/dma/idma64.h #define IDMA64C_CTLH_BLOCK_TS(x) ((x) & IDMA64C_CTLH_BLOCK_TS_MASK) x 68 drivers/dma/idma64.h #define IDMA64C_CFGH_SRC_PER(x) ((x) << 0) /* src peripheral */ x 69 drivers/dma/idma64.h #define IDMA64C_CFGH_DST_PER(x) ((x) << 4) /* dst peripheral */ x 70 drivers/dma/idma64.h #define IDMA64C_CFGH_RD_ISSUE_THD(x) ((x) << 8) x 71 drivers/dma/idma64.h #define IDMA64C_CFGH_WR_ISSUE_THD(x) ((x) << 18) x 81 drivers/dma/idma64.h #define IDMA64_RAW(x) (0x2c0 + IDMA64_INT_##x) /* r */ x 82 drivers/dma/idma64.h #define IDMA64_STATUS(x) (0x2e8 + IDMA64_INT_##x) /* r (raw & mask) */ x 83 drivers/dma/idma64.h #define IDMA64_MASK(x) (0x310 + IDMA64_INT_##x) /* rw (set = irq enabled) */ x 84 drivers/dma/idma64.h #define IDMA64_CLEAR(x) (0x338 + IDMA64_INT_##x) /* w (ack, affects "raw") */ x 66 drivers/dma/imx-dma.c #define DMA_SAR(x) (0x80 + ((x) << 6)) /* Source Address Registers */ x 67 drivers/dma/imx-dma.c #define DMA_DAR(x) (0x84 + ((x) << 6)) /* Destination Address Registers */ x 68 drivers/dma/imx-dma.c #define DMA_CNTR(x) (0x88 + ((x) << 6)) /* Count Registers */ x 69 drivers/dma/imx-dma.c #define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */ x 70 drivers/dma/imx-dma.c #define DMA_RSSR(x) (0x90 + ((x) << 6)) /* Request source select Registers */ x 71 drivers/dma/imx-dma.c #define DMA_BLR(x) (0x94 + ((x) << 6)) /* Burst length Registers */ x 72 drivers/dma/imx-dma.c #define DMA_RTOR(x) (0x98 + ((x) << 6)) /* Request timeout Registers */ x 73 drivers/dma/imx-dma.c #define DMA_BUCR(x) (0x98 + ((x) << 6)) /* Bus Utilization Registers */ x 74 drivers/dma/imx-dma.c #define DMA_CCNR(x) (0x9C + ((x) << 6)) /* Channel counter Registers */ x 79 drivers/dma/imx-dma.c #define DBTOCR_CNT(x) ((x) & 0x7fff) x 80 drivers/dma/imx-dma.c #define CNTR_CNT(x) ((x) & 0xffffff) x 133 drivers/dma/imx-dma.c unsigned int x; x 524 drivers/dma/imx-dma.c ((imxdma->slots_2d[i].xsr != d->x) || x 534 drivers/dma/imx-dma.c imxdma->slots_2d[slot].xsr = d->x; x 545 drivers/dma/imx-dma.c imx_dmav1_writel(imxdma, d->x, DMA_XSRA); x 551 drivers/dma/imx-dma.c imx_dmav1_writel(imxdma, d->x, DMA_XSRB); x 982 drivers/dma/imx-dma.c desc->x = xt->sgl[0].size; x 984 drivers/dma/imx-dma.c desc->w = xt->sgl[0].icg + desc->x; x 985 drivers/dma/imx-dma.c desc->len = desc->x * desc->y; x 58 drivers/dma/ioat/dca.c #define APICID_BIT(x) (DCA_TAG_MAP_VALID | (x)) x 29 drivers/dma/ioat/dma.h #define src_cnt_to_sw(x) ((x) + 2) x 30 drivers/dma/ioat/dma.h #define src_cnt_to_hw(x) ((x) - 2) x 31 drivers/dma/ioat/dma.h #define ndest_to_sw(x) ((x) + 1) x 32 drivers/dma/ioat/dma.h #define ndest_to_hw(x) ((x) - 1) x 33 drivers/dma/ioat/dma.h #define src16_cnt_to_sw(x) ((x) + 9) x 34 drivers/dma/ioat/dma.h #define src16_cnt_to_hw(x) ((x) - 9) x 48 drivers/dma/ioat/registers.h #define GET_IOAT_VER_MAJOR(x) (((x) & IOAT_VER_MAJOR_MASK) >> 4) x 49 drivers/dma/ioat/registers.h #define GET_IOAT_VER_MINOR(x) ((x) & IOAT_VER_MINOR_MASK) x 15 drivers/dma/mcf-edma.c #define EDMA_MASK_CH(x) ((x) & GENMASK(5, 0)) x 42 drivers/dma/mediatek/mtk-hsdma.c #define MTK_HSDMA_NEXT_DESP_IDX(x, y) (((x) + 1) & ((y) - 1)) x 43 drivers/dma/mediatek/mtk-hsdma.c #define MTK_HSDMA_LAST_DESP_IDX(x, y) (((x) - 1) & ((y) - 1)) x 47 drivers/dma/mediatek/mtk-hsdma.c #define MTK_HSDMA_DESC_PLEN(x) (((x) & MTK_HSDMA_PLEN_MASK) << 16) x 48 drivers/dma/mediatek/mtk-hsdma.c #define MTK_HSDMA_DESC_PLEN_GET(x) (((x) >> 16) & MTK_HSDMA_PLEN_MASK) x 89 drivers/dma/mediatek/mtk-hsdma.c #define MTK_HSDMA_RXMAX_PINT(x) (((x) & 0x7f) << 8) x 92 drivers/dma/mediatek/mtk-hsdma.c #define MTK_HSDMA_RXMAX_PTIME(x) ((x) & 0x7f) x 104 drivers/dma/mediatek/mtk-hsdma.c #define IS_MTK_HSDMA_VDESC_FINISHED(x) ((x) == MTK_HSDMA_VDESC_FINISHED) x 68 drivers/dma/owl-dma.c #define OWL_DMA_MODE_TS(x) (((x) & GENMASK(5, 0)) << 0) x 69 drivers/dma/owl-dma.c #define OWL_DMA_MODE_ST(x) (((x) & GENMASK(1, 0)) << 8) x 73 drivers/dma/owl-dma.c #define OWL_DMA_MODE_DT(x) (((x) & GENMASK(1, 0)) << 10) x 77 drivers/dma/owl-dma.c #define OWL_DMA_MODE_SAM(x) (((x) & GENMASK(1, 0)) << 16) x 81 drivers/dma/owl-dma.c #define OWL_DMA_MODE_DAM(x) (((x) & GENMASK(1, 0)) << 18) x 85 drivers/dma/owl-dma.c #define OWL_DMA_MODE_PW(x) (((x) & GENMASK(2, 0)) << 20) x 87 drivers/dma/owl-dma.c #define OWL_DMA_MODE_NDDBW(x) (((x) & 0x1) << 28) x 95 drivers/dma/owl-dma.c #define OWL_DMA_LLC_SAV(x) (((x) & GENMASK(1, 0)) << 8) x 99 drivers/dma/owl-dma.c #define OWL_DMA_LLC_DAV(x) (((x) & GENMASK(1, 0)) << 10) x 38 drivers/dma/pch_dma.c #define DMA_STATUS_IRQ(x) (0x1 << (x)) x 39 drivers/dma/pch_dma.c #define DMA_STATUS0_ERR(x) (0x1 << ((x) + 8)) x 40 drivers/dma/pch_dma.c #define DMA_STATUS2_ERR(x) (0x1 << (x)) x 255 drivers/dma/pl330.c #define PL330_DBGCMD_DUMP(off, x...) do { \ x 257 drivers/dma/pl330.c printk(x); \ x 262 drivers/dma/pl330.c #define PL330_DBGCMD_DUMP(off, x...) do {} while (0) x 1361 drivers/dma/pl330.c struct pl330_xfer *x = &pxs->desc->px; x 1363 drivers/dma/pl330.c unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); x 1364 drivers/dma/pl330.c int num_dregs = (x->bytes - BURST_TO_BYTE(bursts, ccr)) / x 1382 drivers/dma/pl330.c struct pl330_xfer *x = &pxs->desc->px; x 1386 drivers/dma/pl330.c off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); x 1388 drivers/dma/pl330.c off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); x 124 drivers/dma/ppc4xx/adma.c #define ADMA_LL_DBG(x) ({ if (1) x; 0; }) x 126 drivers/dma/ppc4xx/adma.c #define ADMA_LL_DBG(x) ({ if (0) x; 0; }) x 132 drivers/dma/ste_dma40_ll.h #define D40_DREG_GCC_EVTGRP_ENA(x, y) \ x 133 drivers/dma/ste_dma40_ll.h (1 << (D40_DREG_GCC_EVTGRP_POS + 2 * x + y)) x 47 drivers/dma/stm32-dma.c #define STM32_DMA_SCR(x) (0x0010 + 0x18 * (x)) /* x = 0..7 */ x 83 drivers/dma/stm32-dma.c #define STM32_DMA_SNDTR(x) (0x0014 + 0x18 * (x)) x 86 drivers/dma/stm32-dma.c #define STM32_DMA_SPAR(x) (0x0018 + 0x18 * (x)) x 89 drivers/dma/stm32-dma.c #define STM32_DMA_SM0AR(x) (0x001c + 0x18 * (x)) x 92 drivers/dma/stm32-dma.c #define STM32_DMA_SM1AR(x) (0x0020 + 0x18 * (x)) x 95 drivers/dma/stm32-dma.c #define STM32_DMA_SFCR(x) (0x0024 + 0x18 * (x)) x 25 drivers/dma/stm32-dmamux.c #define STM32_DMAMUX_CCR(x) (0x4 * (x)) x 46 drivers/dma/stm32-mdma.c #define STM32_MDMA_CISR(x) (0x40 + 0x40 * (x)) /* x = 0..62 */ x 55 drivers/dma/stm32-mdma.c #define STM32_MDMA_CIFCR(x) (0x44 + 0x40 * (x)) x 68 drivers/dma/stm32-mdma.c #define STM32_MDMA_CESR(x) (0x48 + 0x40 * (x)) x 77 drivers/dma/stm32-mdma.c #define STM32_MDMA_CCR(x) (0x4C + 0x40 * (x)) x 98 drivers/dma/stm32-mdma.c #define STM32_MDMA_CTCR(x) (0x50 + 0x40 * (x)) x 152 drivers/dma/stm32-mdma.c #define STM32_MDMA_CBNDTR(x) (0x54 + 0x40 * (x)) x 166 drivers/dma/stm32-mdma.c #define STM32_MDMA_CSAR(x) (0x58 + 0x40 * (x)) x 169 drivers/dma/stm32-mdma.c #define STM32_MDMA_CDAR(x) (0x5C + 0x40 * (x)) x 172 drivers/dma/stm32-mdma.c #define STM32_MDMA_CBRUR(x) (0x60 + 0x40 * (x)) x 181 drivers/dma/stm32-mdma.c #define STM32_MDMA_CLAR(x) (0x64 + 0x40 * (x)) x 184 drivers/dma/stm32-mdma.c #define STM32_MDMA_CTBR(x) (0x68 + 0x40 * (x)) x 192 drivers/dma/stm32-mdma.c #define STM32_MDMA_CMAR(x) (0x70 + 0x40 * (x)) x 195 drivers/dma/stm32-mdma.c #define STM32_MDMA_CMDR(x) (0x74 + 0x40 * (x)) x 28 drivers/dma/sun6i-dma.c #define DMA_IRQ_EN(x) ((x) * 0x04) x 37 drivers/dma/sun6i-dma.c #define DMA_IRQ_STAT(x) ((x) * 0x04 + 0x10) x 69 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_SRC_DRQ_A31(x) ((x) & DMA_CHAN_MAX_DRQ_A31) x 70 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_SRC_DRQ_H6(x) ((x) & DMA_CHAN_MAX_DRQ_H6) x 71 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_SRC_MODE_A31(x) (((x) & 0x1) << 5) x 72 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_SRC_MODE_H6(x) (((x) & 0x1) << 8) x 73 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_SRC_BURST_A31(x) (((x) & 0x3) << 7) x 74 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_SRC_BURST_H3(x) (((x) & 0x3) << 6) x 75 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_SRC_WIDTH(x) (((x) & 0x3) << 9) x 77 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_DST_DRQ_A31(x) (DMA_CHAN_CFG_SRC_DRQ_A31(x) << 16) x 78 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_DST_DRQ_H6(x) (DMA_CHAN_CFG_SRC_DRQ_H6(x) << 16) x 79 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_DST_MODE_A31(x) (DMA_CHAN_CFG_SRC_MODE_A31(x) << 16) x 80 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_DST_MODE_H6(x) (DMA_CHAN_CFG_SRC_MODE_H6(x) << 16) x 81 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_DST_BURST_A31(x) (DMA_CHAN_CFG_SRC_BURST_A31(x) << 16) x 82 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_DST_BURST_H3(x) (DMA_CHAN_CFG_SRC_BURST_H3(x) << 16) x 83 drivers/dma/sun6i-dma.c #define DMA_CHAN_CFG_DST_WIDTH(x) (DMA_CHAN_CFG_SRC_WIDTH(x) << 16) x 31 drivers/dma/ti/cppi41.c #define DMA_TXGCR(x) (0x800 + (x) * 0x20) x 32 drivers/dma/ti/cppi41.c #define DMA_RXGCR(x) (0x808 + (x) * 0x20) x 43 drivers/dma/ti/cppi41.c #define DMA_SCHED_WORD(x) ((x) * 4 + 0x800) x 45 drivers/dma/ti/cppi41.c #define SCHED_ENTRY0_CHAN(x) ((x) << 0) x 48 drivers/dma/ti/cppi41.c #define SCHED_ENTRY1_CHAN(x) ((x) << 8) x 51 drivers/dma/ti/cppi41.c #define SCHED_ENTRY2_CHAN(x) ((x) << 16) x 54 drivers/dma/ti/cppi41.c #define SCHED_ENTRY3_CHAN(x) ((x) << 24) x 67 drivers/dma/ti/cppi41.c #define QMGR_MEMBASE(x) (0x1000 + (x) * 0x10) x 68 drivers/dma/ti/cppi41.c #define QMGR_MEMCTRL(x) (0x1004 + (x) * 0x10) x 72 drivers/dma/ti/cppi41.c #define QMGR_PEND(x) (0x90 + (x) * 4) x 74 drivers/dma/ti/cppi41.c #define QMGR_PENDING_SLOT_Q(x) (x / 32) x 75 drivers/dma/ti/cppi41.c #define QMGR_PENDING_BIT_Q(x) (x % 32) x 109 drivers/dma/ti/edma.c #define GET_NUM_DMACH(x) (x & 0x7) /* bits 0-2 */ x 110 drivers/dma/ti/edma.c #define GET_NUM_QDMACH(x) ((x & 0x70) >> 4) /* bits 4-6 */ x 111 drivers/dma/ti/edma.c #define GET_NUM_PAENTRY(x) ((x & 0x7000) >> 12) /* bits 12-14 */ x 112 drivers/dma/ti/edma.c #define GET_NUM_EVQUE(x) ((x & 0x70000) >> 16) /* bits 16-18 */ x 113 drivers/dma/ti/edma.c #define GET_NUM_REGN(x) ((x & 0x300000) >> 20) /* bits 20-21 */ x 177 drivers/dma/xilinx/xilinx_dma.c #define XILINX_DMA_MCRX_CDESC(x) (0x40 + (x-1) * 0x20) x 178 drivers/dma/xilinx/xilinx_dma.c #define XILINX_DMA_MCRX_TDESC(x) (0x48 + (x-1) * 0x20) x 50 drivers/dma/zx_dma.c #define ZX_DST_BURST_WIDTH(x) (((x) & 0x7) << 13) x 52 drivers/dma/zx_dma.c #define ZX_SRC_BURST_LEN(x) (((x) & 0xf) << 9) x 53 drivers/dma/zx_dma.c #define ZX_SRC_BURST_WIDTH(x) (((x) & 0x7) << 6) x 63 drivers/edac/i5000_edac.c #define RED_ECC_LOCATOR(x) ((x) & 0x3FFFF) x 64 drivers/edac/i5000_edac.c #define REC_ECC_LOCATOR_EVEN(x) ((x) & 0x001FF) x 65 drivers/edac/i5000_edac.c #define REC_ECC_LOCATOR_ODD(x) ((x) & 0x3FE00) x 75 drivers/edac/i5000_edac.c #define EXTRACT_FBDCHAN_INDX(x) (((x)>>28) & 0x3) x 226 drivers/edac/i5000_edac.c #define NREC_BANK(x) (((x)>>12) & 0x7) x 227 drivers/edac/i5000_edac.c #define NREC_RDWR(x) (((x)>>11) & 1) x 228 drivers/edac/i5000_edac.c #define NREC_RANK(x) (((x)>>8) & 0x7) x 230 drivers/edac/i5000_edac.c #define NREC_CAS(x) (((x)>>16) & 0xFFF) x 231 drivers/edac/i5000_edac.c #define NREC_RAS(x) ((x) & 0x7FFF) x 240 drivers/edac/i5000_edac.c #define REC_BANK(x) (((x)>>12) & 0x7) x 241 drivers/edac/i5000_edac.c #define REC_RDWR(x) (((x)>>11) & 1) x 242 drivers/edac/i5000_edac.c #define REC_RANK(x) (((x)>>8) & 0x7) x 244 drivers/edac/i5000_edac.c #define REC_CAS(x) (((x)>>16) & 0xFFFFFF) x 245 drivers/edac/i5000_edac.c #define REC_RAS(x) ((x) & 0x7FFF) x 75 drivers/edac/i5400_edac.c #define REC_ECC_LOCATOR_ODD(x) ((x) & 0x3fe00) /* bits [17:9] indicate ODD, [8:0] indicate EVEN */ x 298 drivers/edac/i5400_edac.c static inline int extract_fbdchan_indx(u32 x) x 300 drivers/edac/i5400_edac.c return (x>>28) & 0x3; x 156 drivers/edac/i7core_edac.c #define RANKOFFSET(x) ((x & RANKOFFSET_MASK) >> 10) x 158 drivers/edac/i7core_edac.c #define DIMM_PRESENT(x) (((x) & DIMM_PRESENT_MASK) >> 9) x 160 drivers/edac/i7core_edac.c #define MC_DOD_NUMBANK(x) (((x) & MC_DOD_NUMBANK_MASK) >> 7) x 162 drivers/edac/i7core_edac.c #define MC_DOD_NUMRANK(x) (((x) & MC_DOD_NUMRANK_MASK) >> 5) x 164 drivers/edac/i7core_edac.c #define MC_DOD_NUMROW(x) (((x) & MC_DOD_NUMROW_MASK) >> 2) x 166 drivers/edac/i7core_edac.c #define MC_DOD_NUMCOL(x) ((x) & MC_DOD_NUMCOL_MASK) x 9 drivers/edac/mce_amd.h #define EC(x) ((x) & 0xffff) x 10 drivers/edac/mce_amd.h #define XEC(x, mask) (((x) >> 16) & mask) x 12 drivers/edac/mce_amd.h #define LOW_SYNDROME(x) (((x) >> 15) & 0xff) x 13 drivers/edac/mce_amd.h #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff) x 15 drivers/edac/mce_amd.h #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010) x 16 drivers/edac/mce_amd.h #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100) x 17 drivers/edac/mce_amd.h #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800) x 18 drivers/edac/mce_amd.h #define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400) x 20 drivers/edac/mce_amd.h #define TT(x) (((x) >> 2) & 0x3) x 21 drivers/edac/mce_amd.h #define TT_MSG(x) tt_msgs[TT(x)] x 22 drivers/edac/mce_amd.h #define II(x) (((x) >> 2) & 0x3) x 23 drivers/edac/mce_amd.h #define II_MSG(x) ii_msgs[II(x)] x 24 drivers/edac/mce_amd.h #define LL(x) ((x) & 0x3) x 25 drivers/edac/mce_amd.h #define LL_MSG(x) ll_msgs[LL(x)] x 26 drivers/edac/mce_amd.h #define TO(x) (((x) >> 8) & 0x1) x 27 drivers/edac/mce_amd.h #define TO_MSG(x) to_msgs[TO(x)] x 28 drivers/edac/mce_amd.h #define PP(x) (((x) >> 9) & 0x3) x 29 drivers/edac/mce_amd.h #define PP_MSG(x) pp_msgs[PP(x)] x 30 drivers/edac/mce_amd.h #define UU(x) (((x) >> 8) & 0x3) x 31 drivers/edac/mce_amd.h #define UU_MSG(x) uu_msgs[UU(x)] x 33 drivers/edac/mce_amd.h #define R4(x) (((x) >> 4) & 0xf) x 34 drivers/edac/mce_amd.h #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!") x 80 drivers/edac/thunderx_edac.c #define LMC_FADR_FDIMM(x) ((x >> 37) & 0x1) x 81 drivers/edac/thunderx_edac.c #define LMC_FADR_FBUNK(x) ((x >> 36) & 0x1) x 82 drivers/edac/thunderx_edac.c #define LMC_FADR_FBANK(x) ((x >> 32) & 0xf) x 83 drivers/edac/thunderx_edac.c #define LMC_FADR_FROW(x) ((x >> 14) & 0xffff) x 84 drivers/edac/thunderx_edac.c #define LMC_FADR_FCOL(x) ((x >> 0) & 0x1fff) x 100 drivers/edac/thunderx_edac.c #define LMC_CONFIG_PBANK_LSB(x) (((x) >> 5) & 0xF) x 101 drivers/edac/thunderx_edac.c #define LMC_CONFIG_ROW_LSB(x) (((x) >> 2) & 0x7) x 879 drivers/edac/thunderx_edac.c #define OCX_COM_LINKX_INT(x) (0x120 + (x) * 8) x 880 drivers/edac/thunderx_edac.c #define OCX_COM_LINKX_INT_W1S(x) (0x140 + (x) * 8) x 881 drivers/edac/thunderx_edac.c #define OCX_COM_LINKX_INT_ENA_W1S(x) (0x160 + (x) * 8) x 882 drivers/edac/thunderx_edac.c #define OCX_COM_LINKX_INT_ENA_W1C(x) (0x180 + (x) * 8) x 965 drivers/edac/thunderx_edac.c #define OCX_LNE_INT(x) (0x8018 + (x) * 0x100) x 966 drivers/edac/thunderx_edac.c #define OCX_LNE_INT_EN(x) (0x8020 + (x) * 0x100) x 967 drivers/edac/thunderx_edac.c #define OCX_LNE_BAD_CNT(x) (0x8028 + (x) * 0x100) x 968 drivers/edac/thunderx_edac.c #define OCX_LNE_CFG(x) (0x8000 + (x) * 0x100) x 969 drivers/edac/thunderx_edac.c #define OCX_LNE_STAT(x, y) (0x8040 + (x) * 0x100 + (y) * 8) x 1038 drivers/edac/thunderx_edac.c #define OCX_TLKX_ECC_CTL(x) (0x10018 + (x) * 0x2000) x 1039 drivers/edac/thunderx_edac.c #define OCX_RLKX_ECC_CTL(x) (0x18018 + (x) * 0x2000) x 46 drivers/eisa/eisa-bus.c int i, x; x 49 drivers/eisa/eisa-bus.c x = (root->bus_nr << 8) | edev->slot; x 50 drivers/eisa/eisa-bus.c if (forced_tab[i] == x) x 42 drivers/firmware/arm_scmi/clock.c #define NUM_RETURNED(x) ((x) & 0xfff) x 43 drivers/firmware/arm_scmi/clock.c #define RATE_DISCRETE(x) !((x) & BIT(12)) x 44 drivers/firmware/arm_scmi/clock.c #define NUM_REMAINING(x) ((x) >> 16) x 51 drivers/firmware/arm_scmi/clock.c typeof(X) x = (X); \ x 52 drivers/firmware/arm_scmi/clock.c le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \ x 22 drivers/firmware/arm_scmi/common.h #define PROTOCOL_REV_MAJOR(x) (u16)(FIELD_GET(PROTOCOL_REV_MAJOR_MASK, (x))) x 23 drivers/firmware/arm_scmi/common.h #define PROTOCOL_REV_MINOR(x) (u16)(FIELD_GET(PROTOCOL_REV_MINOR_MASK, (x))) x 39 drivers/firmware/arm_scmi/perf.c #define POWER_SCALE_IN_MILLIWATT(x) ((x) & BIT(0)) x 47 drivers/firmware/arm_scmi/perf.c #define SUPPORTS_SET_LIMITS(x) ((x) & BIT(31)) x 48 drivers/firmware/arm_scmi/perf.c #define SUPPORTS_SET_PERF_LVL(x) ((x) & BIT(30)) x 49 drivers/firmware/arm_scmi/perf.c #define SUPPORTS_PERF_LIMIT_NOTIFY(x) ((x) & BIT(29)) x 50 drivers/firmware/arm_scmi/perf.c #define SUPPORTS_PERF_LEVEL_NOTIFY(x) ((x) & BIT(28)) x 51 drivers/firmware/arm_scmi/perf.c #define SUPPORTS_PERF_FASTCHANNELS(x) ((x) & BIT(27)) x 102 drivers/firmware/arm_scmi/perf.c #define SUPPORTS_DOORBELL(x) ((x) & BIT(0)) x 103 drivers/firmware/arm_scmi/perf.c #define DOORBELL_REG_WIDTH(x) FIELD_GET(GENMASK(2, 1), (x)) x 27 drivers/firmware/arm_scmi/power.c #define SUPPORTS_STATE_SET_NOTIFY(x) ((x) & BIT(31)) x 28 drivers/firmware/arm_scmi/power.c #define SUPPORTS_STATE_SET_ASYNC(x) ((x) & BIT(30)) x 29 drivers/firmware/arm_scmi/power.c #define SUPPORTS_STATE_SET_SYNC(x) ((x) & BIT(29)) x 25 drivers/firmware/arm_scmi/reset.c #define SUPPORTS_ASYNC_RESET(x) ((x) & BIT(31)) x 26 drivers/firmware/arm_scmi/reset.c #define SUPPORTS_NOTIFY_RESET(x) ((x) & BIT(30)) x 32 drivers/firmware/arm_scmi/sensors.c #define SUPPORTS_ASYNC_READ(x) ((x) & BIT(31)) x 33 drivers/firmware/arm_scmi/sensors.c #define NUM_TRIP_POINTS(x) ((x) & 0xff) x 35 drivers/firmware/arm_scmi/sensors.c #define SENSOR_TYPE(x) ((x) & 0xff) x 36 drivers/firmware/arm_scmi/sensors.c #define SENSOR_SCALE(x) (((x) >> 11) & 0x1f) x 39 drivers/firmware/arm_scmi/sensors.c #define SENSOR_UPDATE_SCALE(x) (((x) >> 22) & 0x1f) x 40 drivers/firmware/arm_scmi/sensors.c #define SENSOR_UPDATE_BASE(x) (((x) >> 27) & 0x1f) x 59 drivers/firmware/arm_scmi/sensors.c #define SENSOR_TP_ID(x) (((x) & 0xff) << 4) x 158 drivers/firmware/efi/earlycon.c unsigned int n, x; x 166 drivers/firmware/efi/earlycon.c x = efi_x; x 169 drivers/firmware/efi/earlycon.c efi_earlycon_write_char(dst + x*4, *s, h); x 170 drivers/firmware/efi/earlycon.c x += font->width; x 232 drivers/fsi/fsi-core.c static inline uint32_t fsi_smode_echodly(int x) x 234 drivers/fsi/fsi-core.c return (x & FSI_SMODE_ED_MASK) << FSI_SMODE_ED_SHIFT; x 238 drivers/fsi/fsi-core.c static inline uint32_t fsi_smode_senddly(int x) x 240 drivers/fsi/fsi-core.c return (x & FSI_SMODE_SD_MASK) << FSI_SMODE_SD_SHIFT; x 244 drivers/fsi/fsi-core.c static inline uint32_t fsi_smode_lbcrr(int x) x 246 drivers/fsi/fsi-core.c return (x & FSI_SMODE_LBCRR_MASK) << FSI_SMODE_LBCRR_SHIFT; x 250 drivers/fsi/fsi-core.c static inline uint32_t fsi_smode_sid(int x) x 252 drivers/fsi/fsi-core.c return (x & FSI_SMODE_SID_MASK) << FSI_SMODE_SID_SHIFT; x 155 drivers/fsi/fsi-master-hub.c static inline u32 fsi_mmode_crs0(u32 x) x 157 drivers/fsi/fsi-master-hub.c return (x & FSI_MMODE_CRS0MASK) << FSI_MMODE_CRS0SHFT; x 160 drivers/fsi/fsi-master-hub.c static inline u32 fsi_mmode_crs1(u32 x) x 162 drivers/fsi/fsi-master-hub.c return (x & FSI_MMODE_CRS1MASK) << FSI_MMODE_CRS1SHFT; x 49 drivers/fsi/fsi-occ.c #define to_occ(x) container_of((x), struct occ, mdev) x 67 drivers/fsi/fsi-occ.c #define to_client(x) container_of((x), struct occ_client, xfr) x 16 drivers/gpio/gpio-74xx-mmio.c #define MMIO_74XX_BIT_CNT(x) ((x) & 0xff) x 243 drivers/gpio/gpio-aspeed.c #define GPIO_BANK(x) ((x) >> 5) x 244 drivers/gpio/gpio-aspeed.c #define GPIO_OFFSET(x) ((x) & 0x1f) x 245 drivers/gpio/gpio-aspeed.c #define GPIO_BIT(x) BIT(GPIO_OFFSET(x)) x 59 drivers/gpio/gpio-eic-sprd.c #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1)) x 112 drivers/gpio/gpio-em.c #define GIO_ASYNC(x) (x + 8) x 19 drivers/gpio/gpio-kempld.c #define KEMPLD_GPIO_MASK(x) (BIT((x) % 8)) x 20 drivers/gpio/gpio-kempld.c #define KEMPLD_GPIO_DIR_NUM(x) (0x40 + (x) / 8) x 21 drivers/gpio/gpio-kempld.c #define KEMPLD_GPIO_LVL_NUM(x) (0x42 + (x) / 8) x 47 drivers/gpio/gpio-lpc32xx.c #define GPIO012_PIN_TO_BIT(x) (1 << (x)) x 48 drivers/gpio/gpio-lpc32xx.c #define GPIO3_PIN_TO_BIT(x) (1 << ((x) + 25)) x 49 drivers/gpio/gpio-lpc32xx.c #define GPO3_PIN_TO_BIT(x) (1 << (x)) x 50 drivers/gpio/gpio-lpc32xx.c #define GPIO012_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) x 51 drivers/gpio/gpio-lpc32xx.c #define GPIO3_PIN_IN_SHIFT(x) ((x) == 5 ? 24 : 10 + (x)) x 52 drivers/gpio/gpio-lpc32xx.c #define GPIO3_PIN_IN_SEL(x, y) (((x) >> GPIO3_PIN_IN_SHIFT(y)) & 1) x 53 drivers/gpio/gpio-lpc32xx.c #define GPIO3_PIN5_IN_SEL(x) (((x) >> 24) & 1) x 54 drivers/gpio/gpio-lpc32xx.c #define GPI3_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) x 55 drivers/gpio/gpio-lpc32xx.c #define GPO3_PIN_IN_SEL(x, y) (((x) >> (y)) & 1) x 69 drivers/gpio/gpio-max732x.c #define GROUP_A(x) ((x) & 0xffff) /* I2C Addr: 0b'110xxxx */ x 70 drivers/gpio/gpio-max732x.c #define GROUP_B(x) ((x) << 16) /* I2C Addr: 0b'101xxxx */ x 77 drivers/gpio/gpio-max732x.c #define INT_CAPS(x) (((uint64_t)(x)) << 32) x 30 drivers/gpio/gpio-mb86s7x.c #define PDR(x) (0x0 + x / 8 * 4) x 31 drivers/gpio/gpio-mb86s7x.c #define DDR(x) (0x10 + x / 8 * 4) x 32 drivers/gpio/gpio-mb86s7x.c #define PFR(x) (0x20 + x / 8 * 4) x 34 drivers/gpio/gpio-mb86s7x.c #define OFFSET(x) BIT((x) % 8) x 71 drivers/gpio/gpio-pca953x.c #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) x 33 drivers/gpio/gpio-pmic-eic-sprd.c #define SPRD_PMIC_EIC_BIT(x) ((x) & (SPRD_PMIC_EIC_PER_BANK_NR - 1)) x 23 drivers/gpio/gpio-reg.c #define to_gpio_reg(x) container_of(x, struct gpio_reg, gc) x 26 drivers/gpio/gpio-sa1100.c #define sa1100_gpio_chip(x) container_of(x, struct sa1100_gpio_chip, chip) x 33 drivers/gpio/gpio-sprd.c #define SPRD_GPIO_BIT(x) ((x) & (SPRD_GPIO_BANK_NR - 1)) x 26 drivers/gpio/gpio-tegra.c #define GPIO_BANK(x) ((x) >> 5) x 27 drivers/gpio/gpio-tegra.c #define GPIO_PORT(x) (((x) >> 3) & 0x3) x 28 drivers/gpio/gpio-tegra.c #define GPIO_BIT(x) ((x) & 0x7) x 30 drivers/gpio/gpio-tegra.c #define GPIO_REG(tgi, x) (GPIO_BANK(x) * tgi->soc->bank_stride + \ x 31 drivers/gpio/gpio-tegra.c GPIO_PORT(x) * 4) x 33 drivers/gpio/gpio-tegra.c #define GPIO_CNF(t, x) (GPIO_REG(t, x) + 0x00) x 34 drivers/gpio/gpio-tegra.c #define GPIO_OE(t, x) (GPIO_REG(t, x) + 0x10) x 35 drivers/gpio/gpio-tegra.c #define GPIO_OUT(t, x) (GPIO_REG(t, x) + 0X20) x 36 drivers/gpio/gpio-tegra.c #define GPIO_IN(t, x) (GPIO_REG(t, x) + 0x30) x 37 drivers/gpio/gpio-tegra.c #define GPIO_INT_STA(t, x) (GPIO_REG(t, x) + 0x40) x 38 drivers/gpio/gpio-tegra.c #define GPIO_INT_ENB(t, x) (GPIO_REG(t, x) + 0x50) x 39 drivers/gpio/gpio-tegra.c #define GPIO_INT_LVL(t, x) (GPIO_REG(t, x) + 0x60) x 40 drivers/gpio/gpio-tegra.c #define GPIO_INT_CLR(t, x) (GPIO_REG(t, x) + 0x70) x 41 drivers/gpio/gpio-tegra.c #define GPIO_DBC_CNT(t, x) (GPIO_REG(t, x) + 0xF0) x 44 drivers/gpio/gpio-tegra.c #define GPIO_MSK_CNF(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x00) x 45 drivers/gpio/gpio-tegra.c #define GPIO_MSK_OE(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x10) x 46 drivers/gpio/gpio-tegra.c #define GPIO_MSK_OUT(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0X20) x 47 drivers/gpio/gpio-tegra.c #define GPIO_MSK_DBC_EN(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x30) x 48 drivers/gpio/gpio-tegra.c #define GPIO_MSK_INT_STA(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x40) x 49 drivers/gpio/gpio-tegra.c #define GPIO_MSK_INT_ENB(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x50) x 50 drivers/gpio/gpio-tegra.c #define GPIO_MSK_INT_LVL(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x60) x 30 drivers/gpio/gpio-tegra186.c #define TEGRA186_GPIO_DEBOUNCE_CONTROL_THRESHOLD(x) ((x) & 0xff) x 43 drivers/gpio/gpio-tegra186.c #define TEGRA186_GPIO_INTERRUPT_STATUS(x) (0x100 + (x) * 4) x 29 drivers/gpio/gpio-xgene-sb.c #define GPIO_MASK(x) (1U << ((x) % 32)) x 27 drivers/gpio/gpio-xgene.c #define GPIO_BIT_OFFSET(x) (x % XGENE_GPIOS_PER_BANK) x 28 drivers/gpio/gpio-xgene.c #define GPIO_BANK_OFFSET(x) ((x / XGENE_GPIOS_PER_BANK) * GPIO_BANK_STRIDE) x 114 drivers/gpio/sgpio-aspeed.c #define GPIO_BANK(x) ((x) >> 5) x 115 drivers/gpio/sgpio-aspeed.c #define GPIO_OFFSET(x) ((x) & 0x1f) x 116 drivers/gpio/sgpio-aspeed.c #define GPIO_BIT(x) BIT(GPIO_OFFSET(x)) x 95 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c crtc->x, crtc->y, crtc->primary->fb); x 562 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c int idx, x, outsize, r, valuesize; x 583 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c x = 0; x 586 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c r = put_user(values[x++], (int32_t *)buf); x 621 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c int r, x; x 640 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c x = 0; x 642 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); x 647 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (!x) x 650 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c while (size && (offset < x * 4)) { x 56 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h #define to_amdgpu_crtc(x) container_of(x, struct amdgpu_crtc, base) x 57 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h #define to_amdgpu_connector(x) container_of(x, struct amdgpu_connector, base) x 58 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h #define to_amdgpu_encoder(x) container_of(x, struct amdgpu_encoder, base) x 59 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h #define to_amdgpu_framebuffer(x) container_of(x, struct amdgpu_framebuffer, base) x 61 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h #define to_dm_plane_state(x) container_of(x, struct dm_plane_state, base) x 530 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h #define TO_DM_AUX(x) container_of((x), struct amdgpu_dm_dp_aux, aux) x 55 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c #define to_amdgpu_device(x) (container_of(x, struct amdgpu_ras, eeprom_control))->adev x 62 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h #define AMDGPU_PTE_FRAG(x) ((x & 0x1fULL) << 7) x 59 drivers/gpu/drm/amd/amdgpu/cikd.h #define PIPEID(x) ((x) << 0) x 60 drivers/gpu/drm/amd/amdgpu/cikd.h #define MEID(x) ((x) << 2) x 61 drivers/gpu/drm/amd/amdgpu/cikd.h #define VMID(x) ((x) << 4) x 62 drivers/gpu/drm/amd/amdgpu/cikd.h #define QUEUEID(x) ((x) << 8) x 191 drivers/gpu/drm/amd/amdgpu/cikd.h # define ARRAY_MODE(x) ((x) << 2) x 192 drivers/gpu/drm/amd/amdgpu/cikd.h # define PIPE_CONFIG(x) ((x) << 6) x 193 drivers/gpu/drm/amd/amdgpu/cikd.h # define TILE_SPLIT(x) ((x) << 11) x 194 drivers/gpu/drm/amd/amdgpu/cikd.h # define MICRO_TILE_MODE_NEW(x) ((x) << 22) x 195 drivers/gpu/drm/amd/amdgpu/cikd.h # define SAMPLE_SPLIT(x) ((x) << 25) x 196 drivers/gpu/drm/amd/amdgpu/cikd.h # define BANK_WIDTH(x) ((x) << 0) x 197 drivers/gpu/drm/amd/amdgpu/cikd.h # define BANK_HEIGHT(x) ((x) << 2) x 198 drivers/gpu/drm/amd/amdgpu/cikd.h # define MACRO_TILE_ASPECT(x) ((x) << 4) x 199 drivers/gpu/drm/amd/amdgpu/cikd.h # define NUM_BANKS(x) ((x) << 6) x 234 drivers/gpu/drm/amd/amdgpu/cikd.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 262 drivers/gpu/drm/amd/amdgpu/cikd.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 272 drivers/gpu/drm/amd/amdgpu/cikd.h #define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) x 276 drivers/gpu/drm/amd/amdgpu/cikd.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 285 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_SEM_CLIENT_CODE ((x) << 24) /* 0 = CP, 1 = CB, 2 = DB */ x 290 drivers/gpu/drm/amd/amdgpu/cikd.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 299 drivers/gpu/drm/amd/amdgpu/cikd.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 303 drivers/gpu/drm/amd/amdgpu/cikd.h #define WAIT_REG_MEM_OPERATION(x) ((x) << 6) x 307 drivers/gpu/drm/amd/amdgpu/cikd.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 314 drivers/gpu/drm/amd/amdgpu/cikd.h #define INDIRECT_BUFFER_CACHE_POLICY(x) ((x) << 28) x 347 drivers/gpu/drm/amd/amdgpu/cikd.h #define EVENT_TYPE(x) ((x) << 0) x 348 drivers/gpu/drm/amd/amdgpu/cikd.h #define EVENT_INDEX(x) ((x) << 8) x 364 drivers/gpu/drm/amd/amdgpu/cikd.h #define EOP_CACHE_POLICY(x) ((x) << 25) x 369 drivers/gpu/drm/amd/amdgpu/cikd.h #define DATA_SEL(x) ((x) << 29) x 376 drivers/gpu/drm/amd/amdgpu/cikd.h #define INT_SEL(x) ((x) << 24) x 381 drivers/gpu/drm/amd/amdgpu/cikd.h #define DST_SEL(x) ((x) << 16) x 400 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) x 404 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) x 410 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) x 415 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) x 421 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) x 430 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) ((x) << 22) x 436 drivers/gpu/drm/amd/amdgpu/cikd.h # define PACKET3_DMA_DATA_CMD_DST_SWAP(x) ((x) << 24) x 495 drivers/gpu/drm/amd/amdgpu/cikd.h # define SDMA_NOP_COUNT(x) (((x) & 0x3FFF) << 16) x 521 drivers/gpu/drm/amd/amdgpu/cikd.h # define SDMA_POLL_REG_MEM_EXTRA_OP(x) ((x) << 10) x 525 drivers/gpu/drm/amd/amdgpu/cikd.h # define SDMA_POLL_REG_MEM_EXTRA_FUNC(x) ((x) << 12) x 540 drivers/gpu/drm/amd/amdgpu/cikd.h # define SDMA_CONSTANT_FILL_EXTRA_SIZE(x) ((x) << 14) x 550 drivers/gpu/drm/amd/amdgpu/cikd.h # define SDMA_SRBM_WRITE_EXTRA_BYTE_ENABLE(x) ((x) << 12) x 562 drivers/gpu/drm/amd/amdgpu/cikd.h #define PRIVATE_BASE(x) ((x) << 0) /* scratch */ x 563 drivers/gpu/drm/amd/amdgpu/cikd.h #define SHARED_BASE(x) ((x) << 16) /* LDS */ x 574 drivers/gpu/drm/amd/amdgpu/cikd.h #define RB_MAP_PKR0(x) ((x) << 0) x 576 drivers/gpu/drm/amd/amdgpu/cikd.h #define RB_MAP_PKR1(x) ((x) << 2) x 578 drivers/gpu/drm/amd/amdgpu/cikd.h #define RB_XSEL2(x) ((x) << 4) x 582 drivers/gpu/drm/amd/amdgpu/cikd.h #define PKR_MAP(x) ((x) << 8) x 584 drivers/gpu/drm/amd/amdgpu/cikd.h #define PKR_XSEL(x) ((x) << 10) x 586 drivers/gpu/drm/amd/amdgpu/cikd.h #define PKR_YSEL(x) ((x) << 12) x 588 drivers/gpu/drm/amd/amdgpu/cikd.h #define SC_MAP(x) ((x) << 16) x 590 drivers/gpu/drm/amd/amdgpu/cikd.h #define SC_XSEL(x) ((x) << 18) x 592 drivers/gpu/drm/amd/amdgpu/cikd.h #define SC_YSEL(x) ((x) << 20) x 594 drivers/gpu/drm/amd/amdgpu/cikd.h #define SE_MAP(x) ((x) << 24) x 596 drivers/gpu/drm/amd/amdgpu/cikd.h #define SE_XSEL(x) ((x) << 26) x 598 drivers/gpu/drm/amd/amdgpu/cikd.h #define SE_YSEL(x) ((x) << 28) x 602 drivers/gpu/drm/amd/amdgpu/cikd.h #define SE_PAIR_MAP(x) ((x) << 0) x 604 drivers/gpu/drm/amd/amdgpu/cikd.h #define SE_PAIR_XSEL(x) ((x) << 2) x 606 drivers/gpu/drm/amd/amdgpu/cikd.h #define SE_PAIR_YSEL(x) ((x) << 4) x 1831 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int x, int y, int atomic) x 2049 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c x &= ~3; x 2052 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c (x << 16) | y); x 2311 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int x, int y) x 2317 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_crtc->cursor_x = x; x 2321 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c x += crtc->x; x 2323 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); x 2325 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (x < 0) { x 2326 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c xorigin = min(-x, amdgpu_crtc->max_cursor_width - 1); x 2327 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c x = 0; x 2334 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y); x 2343 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int x, int y) x 2348 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c ret = dce_v10_0_cursor_move_locked(crtc, x, y); x 2408 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int x, y; x 2410 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c x = amdgpu_crtc->cursor_x + amdgpu_crtc->cursor_hot_x - hot_x; x 2413 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_cursor_move_locked(crtc, x, y); x 2594 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int x, int y, struct drm_framebuffer *old_fb) x 2603 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2648 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 2651 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c return dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2656 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int x, int y, enum mode_set_atomic state) x 2658 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c return dce_v10_0_crtc_do_set_base(crtc, fb, x, y, 1); x 1873 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int x, int y, int atomic) x 2091 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c x &= ~3; x 2094 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (x << 16) | y); x 2390 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int x, int y) x 2396 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_crtc->cursor_x = x; x 2400 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c x += crtc->x; x 2402 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); x 2404 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (x < 0) { x 2405 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c xorigin = min(-x, amdgpu_crtc->max_cursor_width - 1); x 2406 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c x = 0; x 2413 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y); x 2422 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int x, int y) x 2427 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c ret = dce_v11_0_cursor_move_locked(crtc, x, y); x 2487 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int x, y; x 2489 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c x = amdgpu_crtc->cursor_x + amdgpu_crtc->cursor_hot_x - hot_x; x 2492 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_cursor_move_locked(crtc, x, y); x 2683 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int x, int y, struct drm_framebuffer *old_fb) x 2711 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2756 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 2759 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c return dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2764 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int x, int y, enum mode_set_atomic state) x 2766 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1); x 1789 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int x, int y, int atomic) x 1983 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c x &= ~3; x 1986 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c (x << 16) | y); x 2202 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int x, int y) x 2210 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_crtc->cursor_x = x; x 2214 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c x += crtc->x; x 2216 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); x 2218 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (x < 0) { x 2219 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c xorigin = min(-x, amdgpu_crtc->max_cursor_width - 1); x 2220 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c x = 0; x 2227 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y); x 2236 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int x, int y) x 2241 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c ret = dce_v6_0_cursor_move_locked(crtc, x, y); x 2301 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int x, y; x 2303 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c x = amdgpu_crtc->cursor_x + amdgpu_crtc->cursor_hot_x - hot_x; x 2306 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_cursor_move_locked(crtc, x, y); x 2481 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int x, int y, struct drm_framebuffer *old_fb) x 2490 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2536 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 2539 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c return dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2544 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int x, int y, enum mode_set_atomic state) x 2546 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c return dce_v6_0_crtc_do_set_base(crtc, fb, x, y, 1); x 1760 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int x, int y, int atomic) x 1958 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c x &= ~3; x 1961 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (x << 16) | y); x 2212 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int x, int y) x 2218 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_crtc->cursor_x = x; x 2222 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c x += crtc->x; x 2224 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); x 2226 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (x < 0) { x 2227 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c xorigin = min(-x, amdgpu_crtc->max_cursor_width - 1); x 2228 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c x = 0; x 2235 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y); x 2244 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int x, int y) x 2249 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c ret = dce_v8_0_cursor_move_locked(crtc, x, y); x 2309 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int x, y; x 2311 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c x = amdgpu_crtc->cursor_x + amdgpu_crtc->cursor_hot_x - hot_x; x 2314 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_cursor_move_locked(crtc, x, y); x 2502 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int x, int y, struct drm_framebuffer *old_fb) x 2511 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2556 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 2559 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c return dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y, 0); x 2564 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int x, int y, enum mode_set_atomic state) x 2566 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c return dce_v8_0_crtc_do_set_base(crtc, fb, x, y, 1); x 181 drivers/gpu/drm/amd/amdgpu/dce_virtual.c int x, int y, struct drm_framebuffer *old_fb) x 199 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 207 drivers/gpu/drm/amd/amdgpu/dce_virtual.c int x, int y, enum mode_set_atomic state) x 42 drivers/gpu/drm/amd/amdgpu/df_v3_6.h #define DF_V3_6_GET_EVENT(x) (x & 0xFFUL) x 43 drivers/gpu/drm/amd/amdgpu/df_v3_6.h #define DF_V3_6_GET_INSTANCE(x) ((x >> 8) & 0xFFUL) x 44 drivers/gpu/drm/amd/amdgpu/df_v3_6.h #define DF_V3_6_GET_UNITMASK(x) ((x >> 16) & 0xFFUL) x 79 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define ARRAY_MODE(x) ((x) << GB_TILE_MODE0__ARRAY_MODE__SHIFT) x 80 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) x 81 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define TILE_SPLIT(x) ((x) << GB_TILE_MODE0__TILE_SPLIT__SHIFT) x 82 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define MICRO_TILE_MODE(x) ((x) << 0) x 83 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define SAMPLE_SPLIT(x) ((x) << GB_TILE_MODE0__SAMPLE_SPLIT__SHIFT) x 84 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define BANK_WIDTH(x) ((x) << 14) x 85 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define BANK_HEIGHT(x) ((x) << 16) x 86 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define MACRO_TILE_ASPECT(x) ((x) << 18) x 87 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c #define NUM_BANKS(x) ((x) << 20) x 67 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define ARRAY_MODE(x) ((x) << GB_TILE_MODE0__ARRAY_MODE__SHIFT) x 68 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define PIPE_CONFIG(x) ((x) << GB_TILE_MODE0__PIPE_CONFIG__SHIFT) x 69 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define TILE_SPLIT(x) ((x) << GB_TILE_MODE0__TILE_SPLIT__SHIFT) x 70 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define MICRO_TILE_MODE_NEW(x) ((x) << GB_TILE_MODE0__MICRO_TILE_MODE_NEW__SHIFT) x 71 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define SAMPLE_SPLIT(x) ((x) << GB_TILE_MODE0__SAMPLE_SPLIT__SHIFT) x 72 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define BANK_WIDTH(x) ((x) << GB_MACROTILE_MODE0__BANK_WIDTH__SHIFT) x 73 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define BANK_HEIGHT(x) ((x) << GB_MACROTILE_MODE0__BANK_HEIGHT__SHIFT) x 74 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define MACRO_TILE_ASPECT(x) ((x) << GB_MACROTILE_MODE0__MACRO_TILE_ASPECT__SHIFT) x 75 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c #define NUM_BANKS(x) ((x) << GB_MACROTILE_MODE0__NUM_BANKS__SHIFT) x 57 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_HEADER_OP(x) (((x) & SDMA_PKT_HEADER_op_mask) << SDMA_PKT_HEADER_op_shift) x 63 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_HEADER_sub_op_mask) << SDMA_PKT_HEADER_sub_op_shift) x 74 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_op_shift) x 80 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_sub_op_shift) x 86 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_LINEAR_HEADER_broadcast_shift) x 93 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_LINEAR_COUNT_count_shift) x 100 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_shift) x 106 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_DST_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_dst_ha_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_dst_ha_shift) x 112 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_shift) x 118 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_SRC_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_src_ha_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_src_ha_shift) x 125 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 132 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 139 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 146 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 158 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_shift) x 164 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_shift) x 170 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_shift) x 177 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_shift) x 184 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST2_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_shift) x 190 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST2_HA(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_ha_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_ha_shift) x 196 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST1_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_shift) x 202 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST1_HA(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_ha_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_ha_shift) x 208 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_shift) x 214 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_SRC_HA(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_ha_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_ha_shift) x 221 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 228 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 235 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_DST1_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_shift) x 242 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_DST1_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_shift) x 249 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_DST2_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_shift) x 256 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_DST2_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_shift) x 268 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_shift) x 274 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_shift) x 280 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_ELEMENTSIZE(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_shift) x 287 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_shift) x 294 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_shift) x 301 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_shift) x 307 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_shift) x 314 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_shift) x 320 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_shift) x 327 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_SRC_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_shift) x 334 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_shift) x 341 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_shift) x 348 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_shift) x 354 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_shift) x 361 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_shift) x 367 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_shift) x 374 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_DST_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_shift) x 381 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_shift) x 387 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_shift) x 394 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_RECT_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_shift) x 400 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_shift) x 406 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_DST_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_ha_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_ha_shift) x 412 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_shift) x 418 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_SRC_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_ha_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_ha_shift) x 430 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_op_mask) << SDMA_PKT_COPY_TILED_HEADER_op_shift) x 436 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_HEADER_sub_op_shift) x 442 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_HEADER_detile_shift) x 449 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_shift) x 456 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_shift) x 463 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_3_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_TILED_DW_3_pitch_in_tile_mask) << SDMA_PKT_COPY_TILED_DW_3_pitch_in_tile_shift) x 469 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_3_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_DW_3_height_mask) << SDMA_PKT_COPY_TILED_DW_3_height_shift) x 476 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_4_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_DW_4_slice_pitch_mask) << SDMA_PKT_COPY_TILED_DW_4_slice_pitch_shift) x 483 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_element_size_mask) << SDMA_PKT_COPY_TILED_DW_5_element_size_shift) x 489 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_array_mode_mask) << SDMA_PKT_COPY_TILED_DW_5_array_mode_shift) x 495 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_MIT_MODE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_mit_mode_mask) << SDMA_PKT_COPY_TILED_DW_5_mit_mode_shift) x 501 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_tilesplit_size_mask) << SDMA_PKT_COPY_TILED_DW_5_tilesplit_size_shift) x 507 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_BANK_W(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_bank_w_mask) << SDMA_PKT_COPY_TILED_DW_5_bank_w_shift) x 513 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_BANK_H(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_bank_h_mask) << SDMA_PKT_COPY_TILED_DW_5_bank_h_shift) x 519 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_NUM_BANK(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_num_bank_mask) << SDMA_PKT_COPY_TILED_DW_5_num_bank_shift) x 525 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_mat_aspt_mask) << SDMA_PKT_COPY_TILED_DW_5_mat_aspt_shift) x 531 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_pipe_config_mask) << SDMA_PKT_COPY_TILED_DW_5_pipe_config_shift) x 538 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_X(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_x_mask) << SDMA_PKT_COPY_TILED_DW_6_x_shift) x 544 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_Y(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_y_mask) << SDMA_PKT_COPY_TILED_DW_6_y_shift) x 551 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_Z(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_z_mask) << SDMA_PKT_COPY_TILED_DW_7_z_shift) x 557 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_linear_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_linear_sw_shift) x 563 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_tile_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_tile_sw_shift) x 570 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 577 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 584 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_shift) x 591 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_TILED_COUNT_count_mask) << SDMA_PKT_COPY_TILED_COUNT_count_shift) x 603 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_shift) x 609 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_shift) x 615 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_VIDEOCOPY(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_shift) x 621 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_shift) x 628 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_TILED_ADDR0_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_shift) x 635 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_TILED_ADDR0_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_shift) x 642 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_TILED_ADDR1_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_shift) x 649 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_TILED_ADDR1_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_shift) x 656 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_5_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_5_pitch_in_tile_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_5_pitch_in_tile_shift) x 662 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_5_HEIGHT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_5_height_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_5_height_shift) x 669 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_6_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_6_slice_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_6_slice_pitch_shift) x 676 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_shift) x 682 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_array_mode_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_array_mode_shift) x 688 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_MIT_MODE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mit_mode_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mit_mode_shift) x 694 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_tilesplit_size_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_tilesplit_size_shift) x 700 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_BANK_W(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_w_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_w_shift) x 706 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_BANK_H(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_h_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_h_shift) x 712 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_NUM_BANK(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_num_bank_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_num_bank_shift) x 718 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mat_aspt_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mat_aspt_shift) x 724 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_pipe_config_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_pipe_config_shift) x 731 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_X(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_shift) x 737 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_Y(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_shift) x 744 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_9_Z(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_shift) x 751 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_DST2_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_shift) x 757 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_DST2_HA(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_ha_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_ha_shift) x 763 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_shift) x 769 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_TILE_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_shift) x 776 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 783 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 790 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_shift) x 797 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_mask) << SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_shift) x 809 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_op_mask) << SDMA_PKT_COPY_T2T_HEADER_op_shift) x 815 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_sub_op_mask) << SDMA_PKT_COPY_T2T_HEADER_sub_op_shift) x 822 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_shift) x 829 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_shift) x 836 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_x_mask) << SDMA_PKT_COPY_T2T_DW_3_src_x_shift) x 842 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_y_mask) << SDMA_PKT_COPY_T2T_DW_3_src_y_shift) x 849 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_z_mask) << SDMA_PKT_COPY_T2T_DW_4_src_z_shift) x 855 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_pitch_in_tile_mask) << SDMA_PKT_COPY_T2T_DW_4_src_pitch_in_tile_shift) x 862 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_5_SRC_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_T2T_DW_5_src_slice_pitch_mask) << SDMA_PKT_COPY_T2T_DW_5_src_slice_pitch_shift) x 869 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_element_size_mask) << SDMA_PKT_COPY_T2T_DW_6_src_element_size_shift) x 875 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_array_mode_mask) << SDMA_PKT_COPY_T2T_DW_6_src_array_mode_shift) x 881 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_MIT_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_mit_mode_mask) << SDMA_PKT_COPY_T2T_DW_6_src_mit_mode_shift) x 887 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_tilesplit_size_mask) << SDMA_PKT_COPY_T2T_DW_6_src_tilesplit_size_shift) x 893 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_BANK_W(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_bank_w_mask) << SDMA_PKT_COPY_T2T_DW_6_src_bank_w_shift) x 899 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_BANK_H(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_bank_h_mask) << SDMA_PKT_COPY_T2T_DW_6_src_bank_h_shift) x 905 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_NUM_BANK(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_num_bank_mask) << SDMA_PKT_COPY_T2T_DW_6_src_num_bank_shift) x 911 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_mat_aspt_mask) << SDMA_PKT_COPY_T2T_DW_6_src_mat_aspt_shift) x 917 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_pipe_config_mask) << SDMA_PKT_COPY_T2T_DW_6_src_pipe_config_shift) x 924 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_shift) x 931 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_shift) x 938 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_x_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_x_shift) x 944 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_y_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_y_shift) x 951 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_z_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_z_shift) x 957 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_pitch_in_tile_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_pitch_in_tile_shift) x 964 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_11_DST_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_T2T_DW_11_dst_slice_pitch_mask) << SDMA_PKT_COPY_T2T_DW_11_dst_slice_pitch_shift) x 971 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_array_mode_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_array_mode_shift) x 977 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_MIT_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_mit_mode_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_mit_mode_shift) x 983 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_tilesplit_size_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_tilesplit_size_shift) x 989 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_BANK_W(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_bank_w_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_bank_w_shift) x 995 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_BANK_H(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_bank_h_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_bank_h_shift) x 1001 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_NUM_BANK(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_num_bank_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_num_bank_shift) x 1007 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_mat_aspt_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_mat_aspt_shift) x 1013 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_pipe_config_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_pipe_config_shift) x 1020 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_x_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_x_shift) x 1026 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_y_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_y_shift) x 1033 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_RECT_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_rect_z_mask) << SDMA_PKT_COPY_T2T_DW_14_rect_z_shift) x 1039 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_DST_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_dst_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_dst_sw_shift) x 1045 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_SRC_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_src_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_src_sw_shift) x 1057 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_shift) x 1063 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_shift) x 1069 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_shift) x 1076 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_shift) x 1083 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_shift) x 1090 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_shift) x 1096 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_shift) x 1103 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_TILED_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_shift) x 1109 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_pitch_in_tile_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_pitch_in_tile_shift) x 1116 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_5_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_5_slice_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_5_slice_pitch_shift) x 1123 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_shift) x 1129 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_array_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_array_mode_shift) x 1135 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_MIT_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mit_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mit_mode_shift) x 1141 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_tilesplit_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_tilesplit_size_shift) x 1147 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_BANK_W(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_w_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_w_shift) x 1153 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_BANK_H(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_h_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_h_shift) x 1159 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_NUM_BANK(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_num_bank_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_num_bank_shift) x 1165 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mat_aspt_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mat_aspt_shift) x 1171 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_pipe_config_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_pipe_config_shift) x 1178 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1185 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1192 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_shift) x 1198 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_shift) x 1205 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_shift) x 1211 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_shift) x 1218 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_11_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_shift) x 1225 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_shift) x 1231 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_shift) x 1238 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_RECT_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_shift) x 1244 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_shift) x 1250 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_shift) x 1262 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_op_shift) x 1268 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_sub_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_sub_op_shift) x 1274 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_detile_mask) << SDMA_PKT_COPY_STRUCT_HEADER_detile_shift) x 1281 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_SB_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_shift) x 1288 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_SB_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_shift) x 1295 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_START_INDEX_START_INDEX(x) (((x) & SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_mask) << SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_shift) x 1302 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_STRUCT_COUNT_count_mask) << SDMA_PKT_COPY_STRUCT_COUNT_count_shift) x 1309 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRIDE(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_stride_mask) << SDMA_PKT_COPY_STRUCT_DW_5_stride_shift) x 1315 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRUCT_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_shift) x 1321 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRUCT_HA(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_struct_ha_mask) << SDMA_PKT_COPY_STRUCT_DW_5_struct_ha_shift) x 1327 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_shift) x 1333 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_LINEAR_HA(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_linear_ha_mask) << SDMA_PKT_COPY_STRUCT_DW_5_linear_ha_shift) x 1340 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1347 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1359 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_op_shift) x 1365 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_shift) x 1372 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_shift) x 1379 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_shift) x 1386 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_count_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_count_shift) x 1392 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_SW(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_sw_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_sw_shift) x 1399 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DATA0_data0_mask) << SDMA_PKT_WRITE_UNTILED_DATA0_data0_shift) x 1411 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_op_shift) x 1417 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_sub_op_shift) x 1424 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_shift) x 1431 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_shift) x 1438 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_3_PITCH_IN_TILE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_3_pitch_in_tile_mask) << SDMA_PKT_WRITE_TILED_DW_3_pitch_in_tile_shift) x 1444 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_3_HEIGHT(x) (((x) & SDMA_PKT_WRITE_TILED_DW_3_height_mask) << SDMA_PKT_WRITE_TILED_DW_3_height_shift) x 1451 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_4_SLICE_PITCH(x) (((x) & SDMA_PKT_WRITE_TILED_DW_4_slice_pitch_mask) << SDMA_PKT_WRITE_TILED_DW_4_slice_pitch_shift) x 1458 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_element_size_mask) << SDMA_PKT_WRITE_TILED_DW_5_element_size_shift) x 1464 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_ARRAY_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_array_mode_mask) << SDMA_PKT_WRITE_TILED_DW_5_array_mode_shift) x 1470 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_MIT_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_mit_mode_mask) << SDMA_PKT_WRITE_TILED_DW_5_mit_mode_shift) x 1476 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_tilesplit_size_mask) << SDMA_PKT_WRITE_TILED_DW_5_tilesplit_size_shift) x 1482 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_BANK_W(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_bank_w_mask) << SDMA_PKT_WRITE_TILED_DW_5_bank_w_shift) x 1488 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_BANK_H(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_bank_h_mask) << SDMA_PKT_WRITE_TILED_DW_5_bank_h_shift) x 1494 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_NUM_BANK(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_num_bank_mask) << SDMA_PKT_WRITE_TILED_DW_5_num_bank_shift) x 1500 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_MAT_ASPT(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_mat_aspt_mask) << SDMA_PKT_WRITE_TILED_DW_5_mat_aspt_shift) x 1506 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_PIPE_CONFIG(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_pipe_config_mask) << SDMA_PKT_WRITE_TILED_DW_5_pipe_config_shift) x 1513 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_X(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_x_mask) << SDMA_PKT_WRITE_TILED_DW_6_x_shift) x 1519 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_Y(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_y_mask) << SDMA_PKT_WRITE_TILED_DW_6_y_shift) x 1526 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_Z(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_z_mask) << SDMA_PKT_WRITE_TILED_DW_7_z_shift) x 1532 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_SW(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_sw_mask) << SDMA_PKT_WRITE_TILED_DW_7_sw_shift) x 1539 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_TILED_COUNT_count_mask) << SDMA_PKT_WRITE_TILED_COUNT_count_shift) x 1546 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_TILED_DATA0_data0_mask) << SDMA_PKT_WRITE_TILED_DATA0_data0_shift) x 1558 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_op_shift) x 1564 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_sub_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_sub_op_shift) x 1571 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_shift) x 1578 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_shift) x 1585 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW0_MASK_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_mask) << SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_shift) x 1592 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW1_MASK_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_mask) << SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_shift) x 1599 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW0_INIT_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_mask) << SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_shift) x 1606 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW1_INIT_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_mask) << SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_shift) x 1613 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift) x 1620 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW1_INCR_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_mask) << SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_shift) x 1627 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_INCR_COUNT_count_mask) << SDMA_PKT_WRITE_INCR_COUNT_count_shift) x 1639 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_op_mask) << SDMA_PKT_INDIRECT_HEADER_op_shift) x 1645 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_sub_op_mask) << SDMA_PKT_INDIRECT_HEADER_sub_op_shift) x 1651 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_VMID(x) (((x) & SDMA_PKT_INDIRECT_HEADER_vmid_mask) << SDMA_PKT_INDIRECT_HEADER_vmid_shift) x 1658 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_LO_IB_BASE_31_0(x) (((x) & SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_mask) << SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_shift) x 1665 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_HI_IB_BASE_63_32(x) (((x) & SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_mask) << SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_shift) x 1672 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_IB_SIZE_IB_SIZE(x) (((x) & SDMA_PKT_INDIRECT_IB_SIZE_ib_size_mask) << SDMA_PKT_INDIRECT_IB_SIZE_ib_size_shift) x 1679 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_LO_CSA_ADDR_31_0(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_shift) x 1686 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_HI_CSA_ADDR_63_32(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_shift) x 1698 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_op_shift) x 1704 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_sub_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_sub_op_shift) x 1710 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_WRITE_ONE(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_write_one_mask) << SDMA_PKT_SEMAPHORE_HEADER_write_one_shift) x 1716 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SIGNAL(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_signal_mask) << SDMA_PKT_SEMAPHORE_HEADER_signal_shift) x 1722 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_MAILBOX(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_mailbox_mask) << SDMA_PKT_SEMAPHORE_HEADER_mailbox_shift) x 1729 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_shift) x 1736 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_shift) x 1748 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_op_mask) << SDMA_PKT_FENCE_HEADER_op_shift) x 1754 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_sub_op_mask) << SDMA_PKT_FENCE_HEADER_sub_op_shift) x 1761 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_FENCE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_FENCE_ADDR_LO_addr_31_0_shift) x 1768 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_FENCE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_FENCE_ADDR_HI_addr_63_32_shift) x 1775 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_FENCE_DATA_DATA(x) (((x) & SDMA_PKT_FENCE_DATA_data_mask) << SDMA_PKT_FENCE_DATA_data_shift) x 1787 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_op_shift) x 1793 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_sub_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_sub_op_shift) x 1799 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_byte_en_mask) << SDMA_PKT_SRBM_WRITE_HEADER_byte_en_shift) x 1806 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_ADDR_ADDR(x) (((x) & SDMA_PKT_SRBM_WRITE_ADDR_addr_mask) << SDMA_PKT_SRBM_WRITE_ADDR_addr_shift) x 1813 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_DATA_DATA(x) (((x) & SDMA_PKT_SRBM_WRITE_DATA_data_mask) << SDMA_PKT_SRBM_WRITE_DATA_data_shift) x 1825 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_op_mask) << SDMA_PKT_PRE_EXE_HEADER_op_shift) x 1831 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_sub_op_mask) << SDMA_PKT_PRE_EXE_HEADER_sub_op_shift) x 1837 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_DEV_SEL(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_dev_sel_mask) << SDMA_PKT_PRE_EXE_HEADER_dev_sel_shift) x 1844 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_shift) x 1856 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_op_mask) << SDMA_PKT_COND_EXE_HEADER_op_shift) x 1862 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_sub_op_mask) << SDMA_PKT_COND_EXE_HEADER_sub_op_shift) x 1869 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_shift) x 1876 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_shift) x 1883 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_REFERENCE_REFERENCE(x) (((x) & SDMA_PKT_COND_EXE_REFERENCE_reference_mask) << SDMA_PKT_COND_EXE_REFERENCE_reference_shift) x 1890 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_shift) x 1902 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_op_shift) x 1908 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_shift) x 1914 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SW(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sw_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sw_shift) x 1920 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_FILLSIZE(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_shift) x 1927 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_shift) x 1934 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_shift) x 1941 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DATA_SRC_DATA_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_shift) x 1948 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_COUNT_COUNT(x) (((x) & SDMA_PKT_CONSTANT_FILL_COUNT_count_mask) << SDMA_PKT_CONSTANT_FILL_COUNT_count_shift) x 1960 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_op_shift) x 1966 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_sub_op_shift) x 1972 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_mask) << SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_shift) x 1978 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_FUNC(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_func_mask) << SDMA_PKT_POLL_REGMEM_HEADER_func_shift) x 1984 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_MEM_POLL(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_mask) << SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_shift) x 1991 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_shift) x 1998 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_shift) x 2005 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_VALUE_VALUE(x) (((x) & SDMA_PKT_POLL_REGMEM_VALUE_value_mask) << SDMA_PKT_POLL_REGMEM_VALUE_value_shift) x 2012 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_MASK_MASK(x) (((x) & SDMA_PKT_POLL_REGMEM_MASK_mask_mask) << SDMA_PKT_POLL_REGMEM_MASK_mask_shift) x 2019 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift) x 2025 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_retry_count_mask) << SDMA_PKT_POLL_REGMEM_DW5_retry_count_shift) x 2037 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_op_shift) x 2043 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_shift) x 2050 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_INIT_DATA_31_0(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_shift) x 2057 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_INIT_DATA_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_shift) x 2069 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_op_shift) x 2075 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_shift) x 2082 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_shift) x 2089 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_shift) x 2101 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_shift) x 2107 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_shift) x 2114 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_shift) x 2121 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_shift) x 2133 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_op_mask) << SDMA_PKT_TRAP_HEADER_op_shift) x 2139 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_sub_op_mask) << SDMA_PKT_TRAP_HEADER_sub_op_shift) x 2146 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(x) (((x) & SDMA_PKT_TRAP_INT_CONTEXT_int_context_mask) << SDMA_PKT_TRAP_INT_CONTEXT_int_context_shift) x 2158 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_OP(x) (((x) & SDMA_PKT_NOP_HEADER_op_mask) << SDMA_PKT_NOP_HEADER_op_shift) x 2164 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_NOP_HEADER_sub_op_mask) << SDMA_PKT_NOP_HEADER_sub_op_shift) x 2170 drivers/gpu/drm/amd/amdgpu/iceland_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_COUNT(x) (((x) & SDMA_PKT_NOP_HEADER_count_mask) << SDMA_PKT_NOP_HEADER_count_shift) x 77 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_GCR_SEQ(x) (((x) & 0x3) << 16) x 81 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_GCR_GL2_RANGE(x) (((x) & 0x3) << 11) x 89 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_GCR_GL1_RANGE(x) (((x) & 0x3) << 2) x 90 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_GCR_GLI_INV(x) (((x) & 0x3) << 0) x 96 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_HEADER_OP(x) (((x) & SDMA_PKT_HEADER_op_mask) << SDMA_PKT_HEADER_op_shift) x 102 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_HEADER_sub_op_mask) << SDMA_PKT_HEADER_sub_op_shift) x 113 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_op_shift) x 119 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_sub_op_shift) x 125 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_encrypt_mask) << SDMA_PKT_COPY_LINEAR_HEADER_encrypt_shift) x 131 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_tmz_mask) << SDMA_PKT_COPY_LINEAR_HEADER_tmz_shift) x 137 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_BACKWARDS(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_backwards_mask) << SDMA_PKT_COPY_LINEAR_HEADER_backwards_shift) x 143 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_LINEAR_HEADER_broadcast_shift) x 150 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_LINEAR_COUNT_count_shift) x 157 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_shift) x 163 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_shift) x 170 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 177 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 184 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 191 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 203 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_BC_HEADER_op_shift) x 209 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_BC_HEADER_sub_op_shift) x 216 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_COUNT_count_mask) << SDMA_PKT_COPY_LINEAR_BC_COUNT_count_shift) x 223 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_BC_PARAMETER_dst_sw_shift) x 229 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_PARAMETER_DST_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_PARAMETER_dst_ha_mask) << SDMA_PKT_COPY_LINEAR_BC_PARAMETER_dst_ha_shift) x 235 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_LINEAR_BC_PARAMETER_src_sw_shift) x 241 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_PARAMETER_SRC_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_PARAMETER_src_ha_mask) << SDMA_PKT_COPY_LINEAR_BC_PARAMETER_src_ha_shift) x 248 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_BC_SRC_ADDR_LO_src_addr_31_0_shift) x 255 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_BC_SRC_ADDR_HI_src_addr_63_32_shift) x 262 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_BC_DST_ADDR_LO_dst_addr_31_0_shift) x 269 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_BC_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_BC_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_BC_DST_ADDR_HI_dst_addr_63_32_shift) x 281 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_OP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_op_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_op_shift) x 287 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_sub_op_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_sub_op_shift) x 293 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_tmz_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_tmz_shift) x 299 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_ALL(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_all_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_all_shift) x 306 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_COUNT_count_mask) << SDMA_PKT_COPY_DIRTY_PAGE_COUNT_count_shift) x 313 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_MTYPE(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_mtype_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_mtype_shift) x 319 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_L2_POLICY(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_l2_policy_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_l2_policy_shift) x 325 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_MTYPE(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_mtype_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_mtype_shift) x 331 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_L2_POLICY(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_l2_policy_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_l2_policy_shift) x 337 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sw_shift) x 343 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_GCC(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gcc_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gcc_shift) x 349 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_SYS(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sys_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sys_shift) x 355 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_SNOOP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_snoop_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_snoop_shift) x 361 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_GPA(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gpa_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gpa_shift) x 367 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sw_shift) x 373 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_SYS(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sys_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sys_shift) x 379 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_SNOOP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_snoop_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_snoop_shift) x 385 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_GPA(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_gpa_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_gpa_shift) x 392 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_LO_src_addr_31_0_shift) x 399 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_HI_src_addr_63_32_shift) x 406 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_LO_dst_addr_31_0_shift) x 413 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_HI_dst_addr_63_32_shift) x 425 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_op_shift) x 431 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_sub_op_shift) x 437 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_tmz_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_tmz_shift) x 444 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_COUNT_count_shift) x 451 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_MTYPE(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_mtype_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_mtype_shift) x 457 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_L2_POLICY(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_l2_policy_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_l2_policy_shift) x 463 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_MTYPE(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_mtype_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_mtype_shift) x 469 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_L2_POLICY(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_l2_policy_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_l2_policy_shift) x 475 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sw_shift) x 481 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_GCC(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gcc_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gcc_shift) x 487 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_SYS(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sys_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sys_shift) x 493 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_LOG(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_log_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_log_shift) x 499 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_SNOOP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_snoop_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_snoop_shift) x 505 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_GPA(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gpa_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gpa_shift) x 511 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sw_shift) x 517 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_GCC(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gcc_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gcc_shift) x 523 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_SYS(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sys_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sys_shift) x 529 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_SNOOP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_snoop_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_snoop_shift) x 535 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_GPA(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gpa_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gpa_shift) x 542 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 549 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 556 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 563 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 575 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_shift) x 581 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_shift) x 587 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_encrypt_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_encrypt_shift) x 593 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_tmz_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_tmz_shift) x 599 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_shift) x 606 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_shift) x 613 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST2_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_shift) x 619 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST1_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_shift) x 625 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_shift) x 632 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 639 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 646 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_DST1_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_shift) x 653 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_DST1_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_shift) x 660 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_DST2_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_shift) x 667 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_DST2_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_shift) x 679 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_shift) x 685 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_shift) x 691 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_tmz_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_tmz_shift) x 697 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_ELEMENTSIZE(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_shift) x 704 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_shift) x 711 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_shift) x 718 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_shift) x 724 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_shift) x 731 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_shift) x 737 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_shift) x 744 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_SRC_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_shift) x 751 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_shift) x 758 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_shift) x 765 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_shift) x 771 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_shift) x 778 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_shift) x 784 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_shift) x 791 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_DST_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_shift) x 798 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_shift) x 804 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_shift) x 811 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_RECT_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_shift) x 817 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_shift) x 823 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_shift) x 835 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_op_shift) x 841 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_sub_op_shift) x 847 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_ELEMENTSIZE(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_elementsize_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_HEADER_elementsize_shift) x 854 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_SRC_ADDR_LO_src_addr_31_0_shift) x 861 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_SRC_ADDR_HI_src_addr_63_32_shift) x 868 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_3_src_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_3_src_x_shift) x 874 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_3_src_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_3_src_y_shift) x 881 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_4_src_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_4_src_z_shift) x 887 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_4_SRC_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_4_src_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_4_src_pitch_shift) x 894 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_5_SRC_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_5_src_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_5_src_slice_pitch_shift) x 901 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DST_ADDR_LO_dst_addr_31_0_shift) x 908 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DST_ADDR_HI_dst_addr_63_32_shift) x 915 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_8_DST_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_8_dst_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_8_dst_x_shift) x 921 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_8_DST_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_8_dst_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_8_dst_y_shift) x 928 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_9_DST_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_9_dst_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_9_dst_z_shift) x 934 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_9_DST_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_9_dst_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_9_dst_pitch_shift) x 941 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_10_DST_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_10_dst_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_10_dst_slice_pitch_shift) x 948 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_11_RECT_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_11_rect_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_11_rect_x_shift) x 954 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_11_RECT_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_11_rect_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_11_rect_y_shift) x 961 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_RECT_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_rect_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_rect_z_shift) x 967 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_dst_sw_shift) x 973 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_DST_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_dst_ha_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_dst_ha_shift) x 979 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_src_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_src_sw_shift) x 985 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_SRC_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_src_ha_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_BC_DW_12_src_ha_shift) x 997 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_op_mask) << SDMA_PKT_COPY_TILED_HEADER_op_shift) x 1003 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_HEADER_sub_op_shift) x 1009 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_encrypt_mask) << SDMA_PKT_COPY_TILED_HEADER_encrypt_shift) x 1015 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_tmz_mask) << SDMA_PKT_COPY_TILED_HEADER_tmz_shift) x 1021 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_HEADER_detile_shift) x 1028 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_shift) x 1035 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_shift) x 1042 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_3_WIDTH(x) (((x) & SDMA_PKT_COPY_TILED_DW_3_width_mask) << SDMA_PKT_COPY_TILED_DW_3_width_shift) x 1049 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_4_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_DW_4_height_mask) << SDMA_PKT_COPY_TILED_DW_4_height_shift) x 1055 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_4_DEPTH(x) (((x) & SDMA_PKT_COPY_TILED_DW_4_depth_mask) << SDMA_PKT_COPY_TILED_DW_4_depth_shift) x 1062 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_element_size_mask) << SDMA_PKT_COPY_TILED_DW_5_element_size_shift) x 1068 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_swizzle_mode_mask) << SDMA_PKT_COPY_TILED_DW_5_swizzle_mode_shift) x 1074 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_DIMENSION(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_dimension_mask) << SDMA_PKT_COPY_TILED_DW_5_dimension_shift) x 1080 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_MIP_MAX(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_mip_max_mask) << SDMA_PKT_COPY_TILED_DW_5_mip_max_shift) x 1087 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_X(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_x_mask) << SDMA_PKT_COPY_TILED_DW_6_x_shift) x 1093 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_Y(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_y_mask) << SDMA_PKT_COPY_TILED_DW_6_y_shift) x 1100 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_Z(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_z_mask) << SDMA_PKT_COPY_TILED_DW_7_z_shift) x 1106 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_linear_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_linear_sw_shift) x 1112 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_LINEAR_CC(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_linear_cc_mask) << SDMA_PKT_COPY_TILED_DW_7_linear_cc_shift) x 1118 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_tile_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_tile_sw_shift) x 1125 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1132 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1139 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_shift) x 1146 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_SLICE_PITCH_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_SLICE_PITCH_linear_slice_pitch_mask) << SDMA_PKT_COPY_TILED_LINEAR_SLICE_PITCH_linear_slice_pitch_shift) x 1153 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_TILED_COUNT_count_mask) << SDMA_PKT_COPY_TILED_COUNT_count_shift) x 1165 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_BC_HEADER_op_mask) << SDMA_PKT_COPY_TILED_BC_HEADER_op_shift) x 1171 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_BC_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_BC_HEADER_sub_op_shift) x 1177 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_BC_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_BC_HEADER_detile_shift) x 1184 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_BC_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_BC_TILED_ADDR_LO_tiled_addr_31_0_shift) x 1191 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_BC_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_BC_TILED_ADDR_HI_tiled_addr_63_32_shift) x 1198 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_3_WIDTH(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_3_width_mask) << SDMA_PKT_COPY_TILED_BC_DW_3_width_shift) x 1205 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_4_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_4_height_mask) << SDMA_PKT_COPY_TILED_BC_DW_4_height_shift) x 1211 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_4_DEPTH(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_4_depth_mask) << SDMA_PKT_COPY_TILED_BC_DW_4_depth_shift) x 1218 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_element_size_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_element_size_shift) x 1224 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_array_mode_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_array_mode_shift) x 1230 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_MIT_MODE(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_mit_mode_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_mit_mode_shift) x 1236 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_tilesplit_size_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_tilesplit_size_shift) x 1242 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_BANK_W(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_bank_w_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_bank_w_shift) x 1248 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_BANK_H(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_bank_h_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_bank_h_shift) x 1254 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_NUM_BANK(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_num_bank_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_num_bank_shift) x 1260 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_mat_aspt_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_mat_aspt_shift) x 1266 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_5_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_5_pipe_config_mask) << SDMA_PKT_COPY_TILED_BC_DW_5_pipe_config_shift) x 1273 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_6_X(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_6_x_mask) << SDMA_PKT_COPY_TILED_BC_DW_6_x_shift) x 1279 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_6_Y(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_6_y_mask) << SDMA_PKT_COPY_TILED_BC_DW_6_y_shift) x 1286 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_7_Z(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_7_z_mask) << SDMA_PKT_COPY_TILED_BC_DW_7_z_shift) x 1292 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_7_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_7_linear_sw_mask) << SDMA_PKT_COPY_TILED_BC_DW_7_linear_sw_shift) x 1298 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_DW_7_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_BC_DW_7_tile_sw_mask) << SDMA_PKT_COPY_TILED_BC_DW_7_tile_sw_shift) x 1305 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_BC_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_BC_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1312 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_BC_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_BC_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1319 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_BC_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_TILED_BC_LINEAR_PITCH_linear_pitch_shift) x 1326 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_BC_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_TILED_BC_COUNT_count_mask) << SDMA_PKT_COPY_TILED_BC_COUNT_count_shift) x 1338 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_shift) x 1344 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_shift) x 1350 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_encrypt_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_encrypt_shift) x 1356 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_tmz_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_tmz_shift) x 1362 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_VIDEOCOPY(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_shift) x 1368 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_shift) x 1375 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_TILED_ADDR0_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_shift) x 1382 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_TILED_ADDR0_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_shift) x 1389 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_TILED_ADDR1_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_shift) x 1396 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_TILED_ADDR1_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_shift) x 1403 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_5_WIDTH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_5_width_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_5_width_shift) x 1410 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_6_HEIGHT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_6_height_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_6_height_shift) x 1416 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_6_DEPTH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_6_depth_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_6_depth_shift) x 1423 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_shift) x 1429 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_swizzle_mode_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_swizzle_mode_shift) x 1435 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_DIMENSION(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_dimension_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_dimension_shift) x 1441 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_MIP_MAX(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mip_max_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mip_max_shift) x 1448 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_X(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_shift) x 1454 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_Y(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_shift) x 1461 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_9_Z(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_shift) x 1468 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_DST2_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_shift) x 1474 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_shift) x 1480 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_TILE_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_shift) x 1487 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1494 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1501 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_shift) x 1508 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_SLICE_PITCH_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_SLICE_PITCH_linear_slice_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_SLICE_PITCH_linear_slice_pitch_shift) x 1515 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_mask) << SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_shift) x 1527 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_op_mask) << SDMA_PKT_COPY_T2T_HEADER_op_shift) x 1533 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_sub_op_mask) << SDMA_PKT_COPY_T2T_HEADER_sub_op_shift) x 1539 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_tmz_mask) << SDMA_PKT_COPY_T2T_HEADER_tmz_shift) x 1545 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_DCC(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_dcc_mask) << SDMA_PKT_COPY_T2T_HEADER_dcc_shift) x 1551 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_DCC_DIR(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_dcc_dir_mask) << SDMA_PKT_COPY_T2T_HEADER_dcc_dir_shift) x 1558 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_shift) x 1565 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_shift) x 1572 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_x_mask) << SDMA_PKT_COPY_T2T_DW_3_src_x_shift) x 1578 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_y_mask) << SDMA_PKT_COPY_T2T_DW_3_src_y_shift) x 1585 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_z_mask) << SDMA_PKT_COPY_T2T_DW_4_src_z_shift) x 1591 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_WIDTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_width_mask) << SDMA_PKT_COPY_T2T_DW_4_src_width_shift) x 1598 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_5_SRC_HEIGHT(x) (((x) & SDMA_PKT_COPY_T2T_DW_5_src_height_mask) << SDMA_PKT_COPY_T2T_DW_5_src_height_shift) x 1604 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_5_SRC_DEPTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_5_src_depth_mask) << SDMA_PKT_COPY_T2T_DW_5_src_depth_shift) x 1611 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_element_size_mask) << SDMA_PKT_COPY_T2T_DW_6_src_element_size_shift) x 1617 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_swizzle_mode_mask) << SDMA_PKT_COPY_T2T_DW_6_src_swizzle_mode_shift) x 1623 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_DIMENSION(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_dimension_mask) << SDMA_PKT_COPY_T2T_DW_6_src_dimension_shift) x 1629 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_MIP_MAX(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_mip_max_mask) << SDMA_PKT_COPY_T2T_DW_6_src_mip_max_shift) x 1635 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_MIP_ID(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_mip_id_mask) << SDMA_PKT_COPY_T2T_DW_6_src_mip_id_shift) x 1642 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_shift) x 1649 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_shift) x 1656 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_x_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_x_shift) x 1662 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_y_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_y_shift) x 1669 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_z_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_z_shift) x 1675 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_WIDTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_width_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_width_shift) x 1682 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_11_DST_HEIGHT(x) (((x) & SDMA_PKT_COPY_T2T_DW_11_dst_height_mask) << SDMA_PKT_COPY_T2T_DW_11_dst_height_shift) x 1688 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_11_DST_DEPTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_11_dst_depth_mask) << SDMA_PKT_COPY_T2T_DW_11_dst_depth_shift) x 1695 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_element_size_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_element_size_shift) x 1701 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_swizzle_mode_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_swizzle_mode_shift) x 1707 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_DIMENSION(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_dimension_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_dimension_shift) x 1713 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_MIP_MAX(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_mip_max_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_mip_max_shift) x 1719 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_MIP_ID(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_mip_id_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_mip_id_shift) x 1726 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_x_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_x_shift) x 1732 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_y_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_y_shift) x 1739 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_RECT_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_rect_z_mask) << SDMA_PKT_COPY_T2T_DW_14_rect_z_shift) x 1745 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_DST_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_dst_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_dst_sw_shift) x 1751 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_SRC_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_src_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_src_sw_shift) x 1758 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_ADDR_LO_META_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_META_ADDR_LO_meta_addr_31_0_mask) << SDMA_PKT_COPY_T2T_META_ADDR_LO_meta_addr_31_0_shift) x 1765 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_ADDR_HI_META_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_META_ADDR_HI_meta_addr_63_32_mask) << SDMA_PKT_COPY_T2T_META_ADDR_HI_meta_addr_63_32_shift) x 1772 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_DATA_FORMAT(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_data_format_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_data_format_shift) x 1778 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_COLOR_TRANSFORM_DISABLE(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_color_transform_disable_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_color_transform_disable_shift) x 1784 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_ALPHA_IS_ON_MSB(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_alpha_is_on_msb_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_alpha_is_on_msb_shift) x 1790 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_NUMBER_TYPE(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_number_type_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_number_type_shift) x 1796 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_SURFACE_TYPE(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_surface_type_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_surface_type_shift) x 1802 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_MAX_COMP_BLOCK_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_max_comp_block_size_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_max_comp_block_size_shift) x 1808 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_MAX_UNCOMP_BLOCK_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_max_uncomp_block_size_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_max_uncomp_block_size_shift) x 1814 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_WRITE_COMPRESS_ENABLE(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_write_compress_enable_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_write_compress_enable_shift) x 1820 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_META_CONFIG_META_TMZ(x) (((x) & SDMA_PKT_COPY_T2T_META_CONFIG_meta_tmz_mask) << SDMA_PKT_COPY_T2T_META_CONFIG_meta_tmz_shift) x 1832 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_HEADER_OP(x) (((x) & SDMA_PKT_COPY_T2T_BC_HEADER_op_mask) << SDMA_PKT_COPY_T2T_BC_HEADER_op_shift) x 1838 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_T2T_BC_HEADER_sub_op_mask) << SDMA_PKT_COPY_T2T_BC_HEADER_sub_op_shift) x 1845 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_BC_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_T2T_BC_SRC_ADDR_LO_src_addr_31_0_shift) x 1852 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_BC_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_T2T_BC_SRC_ADDR_HI_src_addr_63_32_shift) x 1859 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_3_src_x_mask) << SDMA_PKT_COPY_T2T_BC_DW_3_src_x_shift) x 1865 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_3_src_y_mask) << SDMA_PKT_COPY_T2T_BC_DW_3_src_y_shift) x 1872 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_4_src_z_mask) << SDMA_PKT_COPY_T2T_BC_DW_4_src_z_shift) x 1878 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_4_SRC_WIDTH(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_4_src_width_mask) << SDMA_PKT_COPY_T2T_BC_DW_4_src_width_shift) x 1885 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_5_SRC_HEIGHT(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_5_src_height_mask) << SDMA_PKT_COPY_T2T_BC_DW_5_src_height_shift) x 1891 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_5_SRC_DEPTH(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_5_src_depth_mask) << SDMA_PKT_COPY_T2T_BC_DW_5_src_depth_shift) x 1898 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_element_size_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_element_size_shift) x 1904 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_array_mode_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_array_mode_shift) x 1910 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_MIT_MODE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_mit_mode_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_mit_mode_shift) x 1916 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_tilesplit_size_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_tilesplit_size_shift) x 1922 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_BANK_W(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_bank_w_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_bank_w_shift) x 1928 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_BANK_H(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_bank_h_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_bank_h_shift) x 1934 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_NUM_BANK(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_num_bank_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_num_bank_shift) x 1940 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_mat_aspt_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_mat_aspt_shift) x 1946 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_6_SRC_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_6_src_pipe_config_mask) << SDMA_PKT_COPY_T2T_BC_DW_6_src_pipe_config_shift) x 1953 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_BC_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_T2T_BC_DST_ADDR_LO_dst_addr_31_0_shift) x 1960 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_BC_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_T2T_BC_DST_ADDR_HI_dst_addr_63_32_shift) x 1967 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_9_DST_X(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_9_dst_x_mask) << SDMA_PKT_COPY_T2T_BC_DW_9_dst_x_shift) x 1973 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_9_DST_Y(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_9_dst_y_mask) << SDMA_PKT_COPY_T2T_BC_DW_9_dst_y_shift) x 1980 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_10_DST_Z(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_10_dst_z_mask) << SDMA_PKT_COPY_T2T_BC_DW_10_dst_z_shift) x 1986 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_10_DST_WIDTH(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_10_dst_width_mask) << SDMA_PKT_COPY_T2T_BC_DW_10_dst_width_shift) x 1993 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_11_DST_HEIGHT(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_11_dst_height_mask) << SDMA_PKT_COPY_T2T_BC_DW_11_dst_height_shift) x 1999 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_11_DST_DEPTH(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_11_dst_depth_mask) << SDMA_PKT_COPY_T2T_BC_DW_11_dst_depth_shift) x 2006 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_element_size_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_element_size_shift) x 2012 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_array_mode_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_array_mode_shift) x 2018 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_MIT_MODE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_mit_mode_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_mit_mode_shift) x 2024 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_tilesplit_size_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_tilesplit_size_shift) x 2030 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_BANK_W(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_bank_w_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_bank_w_shift) x 2036 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_BANK_H(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_bank_h_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_bank_h_shift) x 2042 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_NUM_BANK(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_num_bank_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_num_bank_shift) x 2048 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_mat_aspt_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_mat_aspt_shift) x 2054 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_12_DST_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_12_dst_pipe_config_mask) << SDMA_PKT_COPY_T2T_BC_DW_12_dst_pipe_config_shift) x 2061 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_13_RECT_X(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_13_rect_x_mask) << SDMA_PKT_COPY_T2T_BC_DW_13_rect_x_shift) x 2067 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_13_RECT_Y(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_13_rect_y_mask) << SDMA_PKT_COPY_T2T_BC_DW_13_rect_y_shift) x 2074 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_14_RECT_Z(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_14_rect_z_mask) << SDMA_PKT_COPY_T2T_BC_DW_14_rect_z_shift) x 2080 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_14_DST_SW(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_14_dst_sw_mask) << SDMA_PKT_COPY_T2T_BC_DW_14_dst_sw_shift) x 2086 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_BC_DW_14_SRC_SW(x) (((x) & SDMA_PKT_COPY_T2T_BC_DW_14_src_sw_mask) << SDMA_PKT_COPY_T2T_BC_DW_14_src_sw_shift) x 2098 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_shift) x 2104 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_shift) x 2110 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_tmz_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_tmz_shift) x 2116 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_DCC(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_dcc_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_dcc_shift) x 2122 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_shift) x 2129 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_shift) x 2136 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_shift) x 2143 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_shift) x 2149 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_shift) x 2156 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_TILED_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_shift) x 2162 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_WIDTH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_width_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_width_shift) x 2169 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_5_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_5_height_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_5_height_shift) x 2175 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_5_DEPTH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_5_depth_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_5_depth_shift) x 2182 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_shift) x 2188 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_swizzle_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_swizzle_mode_shift) x 2194 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_DIMENSION(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_dimension_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_dimension_shift) x 2200 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_MIP_MAX(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mip_max_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mip_max_shift) x 2206 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_MIP_ID(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mip_id_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mip_id_shift) x 2213 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 2220 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 2227 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_shift) x 2233 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_shift) x 2240 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_shift) x 2246 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_shift) x 2253 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_11_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_shift) x 2260 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_shift) x 2266 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_shift) x 2273 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_RECT_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_shift) x 2279 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_shift) x 2285 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_shift) x 2292 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_ADDR_LO_META_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_ADDR_LO_meta_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_ADDR_LO_meta_addr_31_0_shift) x 2299 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_ADDR_HI_META_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_ADDR_HI_meta_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_ADDR_HI_meta_addr_63_32_shift) x 2306 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_DATA_FORMAT(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_data_format_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_data_format_shift) x 2312 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_COLOR_TRANSFORM_DISABLE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_color_transform_disable_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_color_transform_disable_shift) x 2318 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_ALPHA_IS_ON_MSB(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_alpha_is_on_msb_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_alpha_is_on_msb_shift) x 2324 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_NUMBER_TYPE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_number_type_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_number_type_shift) x 2330 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_SURFACE_TYPE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_surface_type_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_surface_type_shift) x 2336 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_MAX_COMP_BLOCK_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_max_comp_block_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_max_comp_block_size_shift) x 2342 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_MAX_UNCOMP_BLOCK_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_max_uncomp_block_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_max_uncomp_block_size_shift) x 2348 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_WRITE_COMPRESS_ENABLE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_write_compress_enable_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_write_compress_enable_shift) x 2354 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_META_TMZ(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_meta_tmz_mask) << SDMA_PKT_COPY_TILED_SUBWIN_META_CONFIG_meta_tmz_shift) x 2366 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_op_shift) x 2372 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_sub_op_shift) x 2378 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_HEADER_detile_shift) x 2385 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_TILED_ADDR_LO_tiled_addr_31_0_shift) x 2392 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_TILED_ADDR_HI_tiled_addr_63_32_shift) x 2399 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_3_TILED_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_3_tiled_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_3_tiled_x_shift) x 2405 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_3_TILED_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_3_tiled_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_3_tiled_y_shift) x 2412 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_4_TILED_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_4_tiled_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_4_tiled_z_shift) x 2418 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_4_WIDTH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_4_width_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_4_width_shift) x 2425 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_5_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_5_height_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_5_height_shift) x 2431 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_5_DEPTH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_5_depth_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_5_depth_shift) x 2438 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_element_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_element_size_shift) x 2444 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_array_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_array_mode_shift) x 2450 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_MIT_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_mit_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_mit_mode_shift) x 2456 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_tilesplit_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_tilesplit_size_shift) x 2462 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_BANK_W(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_bank_w_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_bank_w_shift) x 2468 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_BANK_H(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_bank_h_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_bank_h_shift) x 2474 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_NUM_BANK(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_num_bank_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_num_bank_shift) x 2480 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_MAT_ASPT(x) ((x & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_mat_aspt_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_mat_aspt_shift) x 2486 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_pipe_config_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_6_pipe_config_shift) x 2493 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 2500 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 2507 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_9_LINEAR_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_9_linear_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_9_linear_x_shift) x 2513 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_9_LINEAR_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_9_linear_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_9_linear_y_shift) x 2520 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_10_LINEAR_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_10_linear_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_10_linear_z_shift) x 2526 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_10_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_10_linear_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_10_linear_pitch_shift) x 2533 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_11_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_11_linear_slice_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_11_linear_slice_pitch_shift) x 2540 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_12_RECT_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_12_rect_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_12_rect_x_shift) x 2546 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_12_RECT_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_12_rect_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_12_rect_y_shift) x 2553 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_RECT_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_rect_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_rect_z_shift) x 2559 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_linear_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_linear_sw_shift) x 2565 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_tile_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_BC_DW_13_tile_sw_shift) x 2577 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_op_shift) x 2583 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_sub_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_sub_op_shift) x 2589 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_tmz_mask) << SDMA_PKT_COPY_STRUCT_HEADER_tmz_shift) x 2595 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_detile_mask) << SDMA_PKT_COPY_STRUCT_HEADER_detile_shift) x 2602 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_SB_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_shift) x 2609 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_SB_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_shift) x 2616 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_START_INDEX_START_INDEX(x) (((x) & SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_mask) << SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_shift) x 2623 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_STRUCT_COUNT_count_mask) << SDMA_PKT_COPY_STRUCT_COUNT_count_shift) x 2630 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRIDE(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_stride_mask) << SDMA_PKT_COPY_STRUCT_DW_5_stride_shift) x 2636 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_shift) x 2642 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRUCT_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_shift) x 2649 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 2656 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 2668 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_op_shift) x 2674 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_shift) x 2680 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_encrypt_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_encrypt_shift) x 2686 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_TMZ(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_tmz_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_tmz_shift) x 2693 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_shift) x 2700 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_shift) x 2707 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_count_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_count_shift) x 2713 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_SW(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_sw_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_sw_shift) x 2720 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DATA0_data0_mask) << SDMA_PKT_WRITE_UNTILED_DATA0_data0_shift) x 2732 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_op_shift) x 2738 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_sub_op_shift) x 2744 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_encrypt_mask) << SDMA_PKT_WRITE_TILED_HEADER_encrypt_shift) x 2750 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_TMZ(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_tmz_mask) << SDMA_PKT_WRITE_TILED_HEADER_tmz_shift) x 2757 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_shift) x 2764 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_shift) x 2771 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_3_WIDTH(x) (((x) & SDMA_PKT_WRITE_TILED_DW_3_width_mask) << SDMA_PKT_WRITE_TILED_DW_3_width_shift) x 2778 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_4_HEIGHT(x) (((x) & SDMA_PKT_WRITE_TILED_DW_4_height_mask) << SDMA_PKT_WRITE_TILED_DW_4_height_shift) x 2784 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_4_DEPTH(x) (((x) & SDMA_PKT_WRITE_TILED_DW_4_depth_mask) << SDMA_PKT_WRITE_TILED_DW_4_depth_shift) x 2791 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_element_size_mask) << SDMA_PKT_WRITE_TILED_DW_5_element_size_shift) x 2797 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_SWIZZLE_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_swizzle_mode_mask) << SDMA_PKT_WRITE_TILED_DW_5_swizzle_mode_shift) x 2803 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_DIMENSION(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_dimension_mask) << SDMA_PKT_WRITE_TILED_DW_5_dimension_shift) x 2809 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_MIP_MAX(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_mip_max_mask) << SDMA_PKT_WRITE_TILED_DW_5_mip_max_shift) x 2816 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_X(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_x_mask) << SDMA_PKT_WRITE_TILED_DW_6_x_shift) x 2822 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_Y(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_y_mask) << SDMA_PKT_WRITE_TILED_DW_6_y_shift) x 2829 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_Z(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_z_mask) << SDMA_PKT_WRITE_TILED_DW_7_z_shift) x 2835 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_SW(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_sw_mask) << SDMA_PKT_WRITE_TILED_DW_7_sw_shift) x 2842 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_TILED_COUNT_count_mask) << SDMA_PKT_WRITE_TILED_COUNT_count_shift) x 2849 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_TILED_DATA0_data0_mask) << SDMA_PKT_WRITE_TILED_DATA0_data0_shift) x 2861 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_TILED_BC_HEADER_op_mask) << SDMA_PKT_WRITE_TILED_BC_HEADER_op_shift) x 2867 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_TILED_BC_HEADER_sub_op_mask) << SDMA_PKT_WRITE_TILED_BC_HEADER_sub_op_shift) x 2874 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_TILED_BC_DST_ADDR_LO_dst_addr_31_0_shift) x 2881 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_TILED_BC_DST_ADDR_HI_dst_addr_63_32_shift) x 2888 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_3_WIDTH(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_3_width_mask) << SDMA_PKT_WRITE_TILED_BC_DW_3_width_shift) x 2895 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_4_HEIGHT(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_4_height_mask) << SDMA_PKT_WRITE_TILED_BC_DW_4_height_shift) x 2901 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_4_DEPTH(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_4_depth_mask) << SDMA_PKT_WRITE_TILED_BC_DW_4_depth_shift) x 2908 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_element_size_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_element_size_shift) x 2914 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_ARRAY_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_array_mode_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_array_mode_shift) x 2920 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_MIT_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_mit_mode_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_mit_mode_shift) x 2926 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_tilesplit_size_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_tilesplit_size_shift) x 2932 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_BANK_W(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_bank_w_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_bank_w_shift) x 2938 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_BANK_H(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_bank_h_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_bank_h_shift) x 2944 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_NUM_BANK(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_num_bank_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_num_bank_shift) x 2950 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_MAT_ASPT(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_mat_aspt_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_mat_aspt_shift) x 2956 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_5_PIPE_CONFIG(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_5_pipe_config_mask) << SDMA_PKT_WRITE_TILED_BC_DW_5_pipe_config_shift) x 2963 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_6_X(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_6_x_mask) << SDMA_PKT_WRITE_TILED_BC_DW_6_x_shift) x 2969 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_6_Y(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_6_y_mask) << SDMA_PKT_WRITE_TILED_BC_DW_6_y_shift) x 2976 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_7_Z(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_7_z_mask) << SDMA_PKT_WRITE_TILED_BC_DW_7_z_shift) x 2982 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DW_7_SW(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DW_7_sw_mask) << SDMA_PKT_WRITE_TILED_BC_DW_7_sw_shift) x 2989 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_TILED_BC_COUNT_count_mask) << SDMA_PKT_WRITE_TILED_BC_COUNT_count_shift) x 2996 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_BC_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_TILED_BC_DATA0_data0_mask) << SDMA_PKT_WRITE_TILED_BC_DATA0_data0_shift) x 3008 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_HEADER_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_HEADER_op_mask) << SDMA_PKT_PTEPDE_COPY_HEADER_op_shift) x 3014 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_HEADER_sub_op_mask) << SDMA_PKT_PTEPDE_COPY_HEADER_sub_op_shift) x 3020 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_HEADER_TMZ(x) (((x) & SDMA_PKT_PTEPDE_COPY_HEADER_tmz_mask) << SDMA_PKT_PTEPDE_COPY_HEADER_tmz_shift) x 3026 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_HEADER_PTEPDE_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_HEADER_ptepde_op_mask) << SDMA_PKT_PTEPDE_COPY_HEADER_ptepde_op_shift) x 3033 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_SRC_ADDR_LO_src_addr_31_0_shift) x 3040 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_SRC_ADDR_HI_src_addr_63_32_shift) x 3047 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_DST_ADDR_LO_dst_addr_31_0_shift) x 3054 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_DST_ADDR_HI_dst_addr_63_32_shift) x 3061 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_MASK_DW0_MASK_DW0(x) (((x) & SDMA_PKT_PTEPDE_COPY_MASK_DW0_mask_dw0_mask) << SDMA_PKT_PTEPDE_COPY_MASK_DW0_mask_dw0_shift) x 3068 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_MASK_DW1_MASK_DW1(x) (((x) & SDMA_PKT_PTEPDE_COPY_MASK_DW1_mask_dw1_mask) << SDMA_PKT_PTEPDE_COPY_MASK_DW1_mask_dw1_shift) x 3075 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_COUNT_COUNT(x) (((x) & SDMA_PKT_PTEPDE_COPY_COUNT_count_mask) << SDMA_PKT_PTEPDE_COPY_COUNT_count_shift) x 3087 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_op_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_op_shift) x 3093 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_sub_op_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_sub_op_shift) x 3099 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_PTE_SIZE(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_pte_size_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_pte_size_shift) x 3105 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_DIRECTION(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_direction_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_direction_shift) x 3111 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_PTEPDE_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_ptepde_op_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_ptepde_op_shift) x 3118 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_LO_src_addr_31_0_shift) x 3125 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_HI_src_addr_63_32_shift) x 3132 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_LO_dst_addr_31_0_shift) x 3139 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_HI_dst_addr_63_32_shift) x 3146 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_MASK_FIRST_XFER(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_first_xfer_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_first_xfer_shift) x 3152 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_MASK_LAST_XFER(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_last_xfer_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_last_xfer_shift) x 3159 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_COUNT_IN_32B_XFER_COUNT(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_COUNT_IN_32B_XFER_count_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_COUNT_IN_32B_XFER_count_shift) x 3171 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_OP(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_op_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_op_shift) x 3177 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_sub_op_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_sub_op_shift) x 3183 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_MTYPE(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_mtype_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_mtype_shift) x 3189 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_GCC(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_gcc_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_gcc_shift) x 3195 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_SYS(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_sys_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_sys_shift) x 3201 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_SNP(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_snp_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_snp_shift) x 3207 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_GPA(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_gpa_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_gpa_shift) x 3213 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_L2_POLICY(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_l2_policy_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_l2_policy_shift) x 3220 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_RMW_ADDR_LO_addr_31_0_mask) << SDMA_PKT_PTEPDE_RMW_ADDR_LO_addr_31_0_shift) x 3227 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_RMW_ADDR_HI_addr_63_32_mask) << SDMA_PKT_PTEPDE_RMW_ADDR_HI_addr_63_32_shift) x 3234 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_MASK_LO_MASK_31_0(x) (((x) & SDMA_PKT_PTEPDE_RMW_MASK_LO_mask_31_0_mask) << SDMA_PKT_PTEPDE_RMW_MASK_LO_mask_31_0_shift) x 3241 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_MASK_HI_MASK_63_32(x) (((x) & SDMA_PKT_PTEPDE_RMW_MASK_HI_mask_63_32_mask) << SDMA_PKT_PTEPDE_RMW_MASK_HI_mask_63_32_shift) x 3248 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_VALUE_LO_VALUE_31_0(x) (((x) & SDMA_PKT_PTEPDE_RMW_VALUE_LO_value_31_0_mask) << SDMA_PKT_PTEPDE_RMW_VALUE_LO_value_31_0_shift) x 3255 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_VALUE_HI_VALUE_63_32(x) (((x) & SDMA_PKT_PTEPDE_RMW_VALUE_HI_value_63_32_mask) << SDMA_PKT_PTEPDE_RMW_VALUE_HI_value_63_32_shift) x 3267 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_op_shift) x 3273 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_sub_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_sub_op_shift) x 3280 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_shift) x 3287 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_shift) x 3294 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW0_MASK_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_mask) << SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_shift) x 3301 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW1_MASK_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_mask) << SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_shift) x 3308 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW0_INIT_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_mask) << SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_shift) x 3315 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW1_INIT_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_mask) << SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_shift) x 3322 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift) x 3329 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW1_INCR_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_mask) << SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_shift) x 3336 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_INCR_COUNT_count_mask) << SDMA_PKT_WRITE_INCR_COUNT_count_shift) x 3348 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_op_mask) << SDMA_PKT_INDIRECT_HEADER_op_shift) x 3354 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_sub_op_mask) << SDMA_PKT_INDIRECT_HEADER_sub_op_shift) x 3360 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_VMID(x) (((x) & SDMA_PKT_INDIRECT_HEADER_vmid_mask) << SDMA_PKT_INDIRECT_HEADER_vmid_shift) x 3366 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_PRIV(x) (((x) & SDMA_PKT_INDIRECT_HEADER_priv_mask) << SDMA_PKT_INDIRECT_HEADER_priv_shift) x 3373 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_LO_IB_BASE_31_0(x) (((x) & SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_mask) << SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_shift) x 3380 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_HI_IB_BASE_63_32(x) (((x) & SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_mask) << SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_shift) x 3387 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_IB_SIZE_IB_SIZE(x) (((x) & SDMA_PKT_INDIRECT_IB_SIZE_ib_size_mask) << SDMA_PKT_INDIRECT_IB_SIZE_ib_size_shift) x 3394 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_LO_CSA_ADDR_31_0(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_shift) x 3401 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_HI_CSA_ADDR_63_32(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_shift) x 3413 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_op_shift) x 3419 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_sub_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_sub_op_shift) x 3425 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_WRITE_ONE(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_write_one_mask) << SDMA_PKT_SEMAPHORE_HEADER_write_one_shift) x 3431 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SIGNAL(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_signal_mask) << SDMA_PKT_SEMAPHORE_HEADER_signal_shift) x 3437 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_MAILBOX(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_mailbox_mask) << SDMA_PKT_SEMAPHORE_HEADER_mailbox_shift) x 3444 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_shift) x 3451 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_shift) x 3463 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_op_mask) << SDMA_PKT_FENCE_HEADER_op_shift) x 3469 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_sub_op_mask) << SDMA_PKT_FENCE_HEADER_sub_op_shift) x 3475 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_MTYPE(x) (((x) & SDMA_PKT_FENCE_HEADER_mtype_mask) << SDMA_PKT_FENCE_HEADER_mtype_shift) x 3481 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_GCC(x) (((x) & SDMA_PKT_FENCE_HEADER_gcc_mask) << SDMA_PKT_FENCE_HEADER_gcc_shift) x 3487 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_SYS(x) (((x) & SDMA_PKT_FENCE_HEADER_sys_mask) << SDMA_PKT_FENCE_HEADER_sys_shift) x 3493 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_SNP(x) (((x) & SDMA_PKT_FENCE_HEADER_snp_mask) << SDMA_PKT_FENCE_HEADER_snp_shift) x 3499 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_GPA(x) (((x) & SDMA_PKT_FENCE_HEADER_gpa_mask) << SDMA_PKT_FENCE_HEADER_gpa_shift) x 3505 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_L2_POLICY(x) (((x) & SDMA_PKT_FENCE_HEADER_l2_policy_mask) << SDMA_PKT_FENCE_HEADER_l2_policy_shift) x 3512 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_FENCE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_FENCE_ADDR_LO_addr_31_0_shift) x 3519 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_FENCE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_FENCE_ADDR_HI_addr_63_32_shift) x 3526 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_FENCE_DATA_DATA(x) (((x) & SDMA_PKT_FENCE_DATA_data_mask) << SDMA_PKT_FENCE_DATA_data_shift) x 3538 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_op_shift) x 3544 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_sub_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_sub_op_shift) x 3550 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_byte_en_mask) << SDMA_PKT_SRBM_WRITE_HEADER_byte_en_shift) x 3557 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_ADDR_ADDR(x) (((x) & SDMA_PKT_SRBM_WRITE_ADDR_addr_mask) << SDMA_PKT_SRBM_WRITE_ADDR_addr_shift) x 3563 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_ADDR_APERTUREID(x) (((x) & SDMA_PKT_SRBM_WRITE_ADDR_apertureid_mask) << SDMA_PKT_SRBM_WRITE_ADDR_apertureid_shift) x 3570 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_DATA_DATA(x) (((x) & SDMA_PKT_SRBM_WRITE_DATA_data_mask) << SDMA_PKT_SRBM_WRITE_DATA_data_shift) x 3582 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_op_mask) << SDMA_PKT_PRE_EXE_HEADER_op_shift) x 3588 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_sub_op_mask) << SDMA_PKT_PRE_EXE_HEADER_sub_op_shift) x 3594 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_DEV_SEL(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_dev_sel_mask) << SDMA_PKT_PRE_EXE_HEADER_dev_sel_shift) x 3601 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_shift) x 3613 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_op_mask) << SDMA_PKT_COND_EXE_HEADER_op_shift) x 3619 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_sub_op_mask) << SDMA_PKT_COND_EXE_HEADER_sub_op_shift) x 3626 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_shift) x 3633 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_shift) x 3640 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_REFERENCE_REFERENCE(x) (((x) & SDMA_PKT_COND_EXE_REFERENCE_reference_mask) << SDMA_PKT_COND_EXE_REFERENCE_reference_shift) x 3647 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_shift) x 3659 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_op_shift) x 3665 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_shift) x 3671 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SW(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sw_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sw_shift) x 3677 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_FILLSIZE(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_shift) x 3684 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_shift) x 3691 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_shift) x 3698 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DATA_SRC_DATA_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_shift) x 3705 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_COUNT_COUNT(x) (((x) & SDMA_PKT_CONSTANT_FILL_COUNT_count_mask) << SDMA_PKT_CONSTANT_FILL_COUNT_count_shift) x 3717 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_HEADER_OP(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_HEADER_op_mask) << SDMA_PKT_DATA_FILL_MULTI_HEADER_op_shift) x 3723 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_HEADER_SUB_OP(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_HEADER_sub_op_mask) << SDMA_PKT_DATA_FILL_MULTI_HEADER_sub_op_shift) x 3729 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_HEADER_MEMLOG_CLR(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_HEADER_memlog_clr_mask) << SDMA_PKT_DATA_FILL_MULTI_HEADER_memlog_clr_shift) x 3736 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_BYTE_STRIDE_BYTE_STRIDE(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_BYTE_STRIDE_byte_stride_mask) << SDMA_PKT_DATA_FILL_MULTI_BYTE_STRIDE_byte_stride_shift) x 3743 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_DMA_COUNT_DMA_COUNT(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_DMA_COUNT_dma_count_mask) << SDMA_PKT_DATA_FILL_MULTI_DMA_COUNT_dma_count_shift) x 3750 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_LO_dst_addr_31_0_shift) x 3757 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_HI_dst_addr_63_32_shift) x 3764 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_BYTE_COUNT_COUNT(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_BYTE_COUNT_count_mask) << SDMA_PKT_DATA_FILL_MULTI_BYTE_COUNT_count_shift) x 3776 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_op_shift) x 3782 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_sub_op_shift) x 3788 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_mask) << SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_shift) x 3794 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_FUNC(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_func_mask) << SDMA_PKT_POLL_REGMEM_HEADER_func_shift) x 3800 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_MEM_POLL(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_mask) << SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_shift) x 3807 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_shift) x 3814 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_shift) x 3821 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_VALUE_VALUE(x) (((x) & SDMA_PKT_POLL_REGMEM_VALUE_value_mask) << SDMA_PKT_POLL_REGMEM_VALUE_value_shift) x 3828 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_MASK_MASK(x) (((x) & SDMA_PKT_POLL_REGMEM_MASK_mask_mask) << SDMA_PKT_POLL_REGMEM_MASK_mask_shift) x 3835 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift) x 3841 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_retry_count_mask) << SDMA_PKT_POLL_REGMEM_DW5_retry_count_shift) x 3853 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_op_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_op_shift) x 3859 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_sub_op_shift) x 3866 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_SRC_ADDR_ADDR_31_2(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_SRC_ADDR_addr_31_2_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_SRC_ADDR_addr_31_2_shift) x 3873 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_LO_addr_31_0_shift) x 3880 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_HI_addr_63_32_shift) x 3892 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_op_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_op_shift) x 3898 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_sub_op_shift) x 3904 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_EA(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_ea_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_ea_shift) x 3911 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_LO_addr_31_0_shift) x 3918 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_HI_addr_63_32_shift) x 3925 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_START_PAGE_ADDR_31_4(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_START_PAGE_addr_31_4_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_START_PAGE_addr_31_4_shift) x 3932 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_PAGE_NUM_PAGE_NUM_31_0(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_PAGE_NUM_page_num_31_0_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_PAGE_NUM_page_num_31_0_shift) x 3944 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_HEADER_OP(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_HEADER_op_mask) << SDMA_PKT_POLL_MEM_VERIFY_HEADER_op_shift) x 3950 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_HEADER_sub_op_mask) << SDMA_PKT_POLL_MEM_VERIFY_HEADER_sub_op_shift) x 3956 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_HEADER_MODE(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_HEADER_mode_mask) << SDMA_PKT_POLL_MEM_VERIFY_HEADER_mode_shift) x 3963 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_PATTERN_PATTERN(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_PATTERN_pattern_mask) << SDMA_PKT_POLL_MEM_VERIFY_PATTERN_pattern_shift) x 3970 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_LO_CMP0_START_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_LO_cmp0_start_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_LO_cmp0_start_31_0_shift) x 3977 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_HI_CMP0_START_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_HI_cmp0_start_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_HI_cmp0_start_63_32_shift) x 3984 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_LO_CMP1_END_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_LO_cmp1_end_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_LO_cmp1_end_31_0_shift) x 3991 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_HI_CMP1_END_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_HI_cmp1_end_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_HI_cmp1_end_63_32_shift) x 3998 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_LO_CMP1_START_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_LO_cmp1_start_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_LO_cmp1_start_31_0_shift) x 4005 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_HI_CMP1_START_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_HI_cmp1_start_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_HI_cmp1_start_63_32_shift) x 4012 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_LO_CMP1_END_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_LO_cmp1_end_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_LO_cmp1_end_31_0_shift) x 4019 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_HI_CMP1_END_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_HI_cmp1_end_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_HI_cmp1_end_63_32_shift) x 4026 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_LO_REC_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_LO_rec_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_LO_rec_31_0_shift) x 4033 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_HI_REC_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_HI_rec_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_HI_rec_63_32_shift) x 4040 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_RESERVED_RESERVED(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_RESERVED_reserved_mask) << SDMA_PKT_POLL_MEM_VERIFY_RESERVED_reserved_shift) x 4052 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_OP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_op_mask) << SDMA_PKT_ATOMIC_HEADER_op_shift) x 4058 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_LOOP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_loop_mask) << SDMA_PKT_ATOMIC_HEADER_loop_shift) x 4064 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_TMZ(x) (((x) & SDMA_PKT_ATOMIC_HEADER_tmz_mask) << SDMA_PKT_ATOMIC_HEADER_tmz_shift) x 4070 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_ATOMIC_OP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_atomic_op_mask) << SDMA_PKT_ATOMIC_HEADER_atomic_op_shift) x 4077 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_ATOMIC_ADDR_LO_addr_31_0_mask) << SDMA_PKT_ATOMIC_ADDR_LO_addr_31_0_shift) x 4084 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_ATOMIC_ADDR_HI_addr_63_32_mask) << SDMA_PKT_ATOMIC_ADDR_HI_addr_63_32_shift) x 4091 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_SRC_DATA_LO_SRC_DATA_31_0(x) (((x) & SDMA_PKT_ATOMIC_SRC_DATA_LO_src_data_31_0_mask) << SDMA_PKT_ATOMIC_SRC_DATA_LO_src_data_31_0_shift) x 4098 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_SRC_DATA_HI_SRC_DATA_63_32(x) (((x) & SDMA_PKT_ATOMIC_SRC_DATA_HI_src_data_63_32_mask) << SDMA_PKT_ATOMIC_SRC_DATA_HI_src_data_63_32_shift) x 4105 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_CMP_DATA_LO_CMP_DATA_31_0(x) (((x) & SDMA_PKT_ATOMIC_CMP_DATA_LO_cmp_data_31_0_mask) << SDMA_PKT_ATOMIC_CMP_DATA_LO_cmp_data_31_0_shift) x 4112 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_CMP_DATA_HI_CMP_DATA_63_32(x) (((x) & SDMA_PKT_ATOMIC_CMP_DATA_HI_cmp_data_63_32_mask) << SDMA_PKT_ATOMIC_CMP_DATA_HI_cmp_data_63_32_shift) x 4119 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_LOOP_INTERVAL_LOOP_INTERVAL(x) (((x) & SDMA_PKT_ATOMIC_LOOP_INTERVAL_loop_interval_mask) << SDMA_PKT_ATOMIC_LOOP_INTERVAL_loop_interval_shift) x 4131 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_op_shift) x 4137 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_shift) x 4144 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_INIT_DATA_31_0(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_shift) x 4151 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_INIT_DATA_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_shift) x 4163 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_op_shift) x 4169 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_shift) x 4176 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_shift) x 4183 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_shift) x 4195 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_shift) x 4201 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_shift) x 4208 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_shift) x 4215 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_shift) x 4227 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_op_mask) << SDMA_PKT_TRAP_HEADER_op_shift) x 4233 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_sub_op_mask) << SDMA_PKT_TRAP_HEADER_sub_op_shift) x 4240 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(x) (((x) & SDMA_PKT_TRAP_INT_CONTEXT_int_context_mask) << SDMA_PKT_TRAP_INT_CONTEXT_int_context_shift) x 4252 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DUMMY_TRAP_HEADER_OP(x) (((x) & SDMA_PKT_DUMMY_TRAP_HEADER_op_mask) << SDMA_PKT_DUMMY_TRAP_HEADER_op_shift) x 4258 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DUMMY_TRAP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_DUMMY_TRAP_HEADER_sub_op_mask) << SDMA_PKT_DUMMY_TRAP_HEADER_sub_op_shift) x 4265 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_DUMMY_TRAP_INT_CONTEXT_INT_CONTEXT(x) (((x) & SDMA_PKT_DUMMY_TRAP_INT_CONTEXT_int_context_mask) << SDMA_PKT_DUMMY_TRAP_INT_CONTEXT_int_context_shift) x 4277 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_HEADER_OP(x) (((x) & SDMA_PKT_GPUVM_INV_HEADER_op_mask) << SDMA_PKT_GPUVM_INV_HEADER_op_shift) x 4283 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_HEADER_SUB_OP(x) (((x) & SDMA_PKT_GPUVM_INV_HEADER_sub_op_mask) << SDMA_PKT_GPUVM_INV_HEADER_sub_op_shift) x 4290 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_PER_VMID_INV_REQ(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_per_vmid_inv_req_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_per_vmid_inv_req_shift) x 4296 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_FLUSH_TYPE(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_flush_type_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_flush_type_shift) x 4302 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_L2_PTES(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_ptes_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_ptes_shift) x 4308 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_L2_PDE0(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_pde0_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_pde0_shift) x 4314 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_L2_PDE1(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_pde1_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_pde1_shift) x 4320 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_L2_PDE2(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_pde2_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_l2_pde2_shift) x 4326 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_L1_PTES(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_l1_ptes_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_l1_ptes_shift) x 4332 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_CLR_PROTECTION_FAULT_STATUS_ADDR(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_clr_protection_fault_status_addr_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_clr_protection_fault_status_addr_shift) x 4338 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_LOG_REQUEST(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_log_request_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_log_request_shift) x 4344 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD1_FOUR_KILOBYTES(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD1_four_kilobytes_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD1_four_kilobytes_shift) x 4351 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD2_S(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD2_s_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD2_s_shift) x 4357 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD2_PAGE_VA_42_12(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD2_page_va_42_12_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD2_page_va_42_12_shift) x 4364 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GPUVM_INV_PAYLOAD3_PAGE_VA_47_43(x) (((x) & SDMA_PKT_GPUVM_INV_PAYLOAD3_page_va_47_43_mask) << SDMA_PKT_GPUVM_INV_PAYLOAD3_page_va_47_43_shift) x 4376 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_HEADER_OP(x) (((x) & SDMA_PKT_GCR_REQ_HEADER_op_mask) << SDMA_PKT_GCR_REQ_HEADER_op_shift) x 4382 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_HEADER_SUB_OP(x) (((x) & SDMA_PKT_GCR_REQ_HEADER_sub_op_mask) << SDMA_PKT_GCR_REQ_HEADER_sub_op_shift) x 4389 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_PAYLOAD1_BASE_VA_31_7(x) (((x) & SDMA_PKT_GCR_REQ_PAYLOAD1_base_va_31_7_mask) << SDMA_PKT_GCR_REQ_PAYLOAD1_base_va_31_7_shift) x 4396 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_PAYLOAD2_BASE_VA_47_32(x) (((x) & SDMA_PKT_GCR_REQ_PAYLOAD2_base_va_47_32_mask) << SDMA_PKT_GCR_REQ_PAYLOAD2_base_va_47_32_shift) x 4402 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_PAYLOAD2_GCR_CONTROL_15_0(x) (((x) & SDMA_PKT_GCR_REQ_PAYLOAD2_gcr_control_15_0_mask) << SDMA_PKT_GCR_REQ_PAYLOAD2_gcr_control_15_0_shift) x 4409 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_PAYLOAD3_GCR_CONTROL_18_16(x) (((x) & SDMA_PKT_GCR_REQ_PAYLOAD3_gcr_control_18_16_mask) << SDMA_PKT_GCR_REQ_PAYLOAD3_gcr_control_18_16_shift) x 4415 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_PAYLOAD3_LIMIT_VA_31_7(x) (((x) & SDMA_PKT_GCR_REQ_PAYLOAD3_limit_va_31_7_mask) << SDMA_PKT_GCR_REQ_PAYLOAD3_limit_va_31_7_shift) x 4422 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_PAYLOAD4_LIMIT_VA_47_32(x) (((x) & SDMA_PKT_GCR_REQ_PAYLOAD4_limit_va_47_32_mask) << SDMA_PKT_GCR_REQ_PAYLOAD4_limit_va_47_32_shift) x 4428 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_GCR_REQ_PAYLOAD4_VMID(x) (((x) & SDMA_PKT_GCR_REQ_PAYLOAD4_vmid_mask) << SDMA_PKT_GCR_REQ_PAYLOAD4_vmid_shift) x 4440 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_OP(x) (((x) & SDMA_PKT_NOP_HEADER_op_mask) << SDMA_PKT_NOP_HEADER_op_shift) x 4446 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_NOP_HEADER_sub_op_mask) << SDMA_PKT_NOP_HEADER_sub_op_shift) x 4452 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_COUNT(x) (((x) & SDMA_PKT_NOP_HEADER_count_mask) << SDMA_PKT_NOP_HEADER_count_shift) x 4459 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_PKT_NOP_DATA0_DATA0(x) (((x) & SDMA_PKT_NOP_DATA0_data0_mask) << SDMA_PKT_NOP_DATA0_data0_shift) x 4471 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_FORMAT(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_format_mask) << SDMA_AQL_PKT_HEADER_HEADER_format_shift) x 4477 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_BARRIER(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_barrier_mask) << SDMA_AQL_PKT_HEADER_HEADER_barrier_shift) x 4483 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_ACQUIRE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_acquire_fence_scope_mask) << SDMA_AQL_PKT_HEADER_HEADER_acquire_fence_scope_shift) x 4489 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_RELEASE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_release_fence_scope_mask) << SDMA_AQL_PKT_HEADER_HEADER_release_fence_scope_shift) x 4495 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_RESERVED(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_reserved_mask) << SDMA_AQL_PKT_HEADER_HEADER_reserved_shift) x 4501 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_OP(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_op_mask) << SDMA_AQL_PKT_HEADER_HEADER_op_shift) x 4507 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_SUBOP(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_subop_mask) << SDMA_AQL_PKT_HEADER_HEADER_subop_shift) x 4519 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_FORMAT(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_format_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_format_shift) x 4525 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_BARRIER(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_barrier_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_barrier_shift) x 4531 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_ACQUIRE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_acquire_fence_scope_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_acquire_fence_scope_shift) x 4537 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_RELEASE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_release_fence_scope_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_release_fence_scope_shift) x 4543 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_RESERVED(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_reserved_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_reserved_shift) x 4549 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_OP(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_op_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_op_shift) x 4555 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_SUBOP(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_subop_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_subop_shift) x 4562 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW1_RESERVED_DW1(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW1_reserved_dw1_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW1_reserved_dw1_shift) x 4569 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_LO_RETURN_ADDR_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_LO_return_addr_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_LO_return_addr_31_0_shift) x 4576 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_HI_RETURN_ADDR_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_HI_return_addr_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_HI_return_addr_63_32_shift) x 4583 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_COUNT_COUNT(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_COUNT_count_mask) << SDMA_AQL_PKT_COPY_LINEAR_COUNT_count_shift) x 4590 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_dst_sw_mask) << SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_dst_sw_shift) x 4596 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_src_sw_mask) << SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_src_sw_shift) x 4603 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 4610 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 4617 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 4624 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 4631 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW10_RESERVED_DW10(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW10_reserved_dw10_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW10_reserved_dw10_shift) x 4638 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW11_RESERVED_DW11(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW11_reserved_dw11_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW11_reserved_dw11_shift) x 4645 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW12_RESERVED_DW12(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW12_reserved_dw12_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW12_reserved_dw12_shift) x 4652 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW13_RESERVED_DW13(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW13_reserved_dw13_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW13_reserved_dw13_shift) x 4659 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_LO_COMPLETION_SIGNAL_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_LO_completion_signal_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_LO_completion_signal_31_0_shift) x 4666 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_HI_COMPLETION_SIGNAL_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_HI_completion_signal_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_HI_completion_signal_63_32_shift) x 4678 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_FORMAT(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_format_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_format_shift) x 4684 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_BARRIER(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_barrier_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_barrier_shift) x 4690 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_ACQUIRE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_acquire_fence_scope_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_acquire_fence_scope_shift) x 4696 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_RELEASE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_release_fence_scope_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_release_fence_scope_shift) x 4702 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_RESERVED(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_reserved_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_reserved_shift) x 4708 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_OP(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_op_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_op_shift) x 4714 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_SUBOP(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_subop_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_subop_shift) x 4721 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW1_RESERVED_DW1(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW1_reserved_dw1_mask) << SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW1_reserved_dw1_shift) x 4728 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_LO_DEPENDENT_ADDR_0_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_LO_dependent_addr_0_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_LO_dependent_addr_0_31_0_shift) x 4735 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_HI_DEPENDENT_ADDR_0_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_HI_dependent_addr_0_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_HI_dependent_addr_0_63_32_shift) x 4742 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_LO_DEPENDENT_ADDR_1_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_LO_dependent_addr_1_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_LO_dependent_addr_1_31_0_shift) x 4749 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_HI_DEPENDENT_ADDR_1_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_HI_dependent_addr_1_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_HI_dependent_addr_1_63_32_shift) x 4756 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_LO_DEPENDENT_ADDR_2_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_LO_dependent_addr_2_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_LO_dependent_addr_2_31_0_shift) x 4763 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_HI_DEPENDENT_ADDR_2_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_HI_dependent_addr_2_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_HI_dependent_addr_2_63_32_shift) x 4770 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_LO_DEPENDENT_ADDR_3_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_LO_dependent_addr_3_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_LO_dependent_addr_3_31_0_shift) x 4777 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_HI_DEPENDENT_ADDR_3_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_HI_dependent_addr_3_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_HI_dependent_addr_3_63_32_shift) x 4784 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_LO_DEPENDENT_ADDR_4_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_LO_dependent_addr_4_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_LO_dependent_addr_4_31_0_shift) x 4791 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_HI_DEPENDENT_ADDR_4_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_HI_dependent_addr_4_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_HI_dependent_addr_4_63_32_shift) x 4798 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW12_RESERVED_DW12(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW12_reserved_dw12_mask) << SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW12_reserved_dw12_shift) x 4805 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW13_RESERVED_DW13(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW13_reserved_dw13_mask) << SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW13_reserved_dw13_shift) x 4812 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_LO_COMPLETION_SIGNAL_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_LO_completion_signal_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_LO_completion_signal_31_0_shift) x 4819 drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_HI_COMPLETION_SIGNAL_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_HI_completion_signal_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_HI_completion_signal_63_32_shift) x 57 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 89 drivers/gpu/drm/amd/amdgpu/nvd.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 99 drivers/gpu/drm/amd/amdgpu/nvd.h #define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) x 103 drivers/gpu/drm/amd/amdgpu/nvd.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 117 drivers/gpu/drm/amd/amdgpu/nvd.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 126 drivers/gpu/drm/amd/amdgpu/nvd.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 130 drivers/gpu/drm/amd/amdgpu/nvd.h #define WAIT_REG_MEM_OPERATION(x) ((x) << 6) x 134 drivers/gpu/drm/amd/amdgpu/nvd.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 140 drivers/gpu/drm/amd/amdgpu/nvd.h #define INDIRECT_BUFFER_CACHE_POLICY(x) ((x) << 28) x 145 drivers/gpu/drm/amd/amdgpu/nvd.h #define INDIRECT_BUFFER_PRE_ENB(x) ((x) << 21) x 146 drivers/gpu/drm/amd/amdgpu/nvd.h #define INDIRECT_BUFFER_PRE_RESUME(x) ((x) << 30) x 155 drivers/gpu/drm/amd/amdgpu/nvd.h #define EVENT_TYPE(x) ((x) << 0) x 156 drivers/gpu/drm/amd/amdgpu/nvd.h #define EVENT_INDEX(x) ((x) << 8) x 166 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_RELEASE_MEM_EVENT_TYPE(x) ((x) << 0) x 167 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_RELEASE_MEM_EVENT_INDEX(x) ((x) << 8) x 178 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_RELEASE_MEM_CACHE_POLICY(x) ((x) << 25) x 186 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_RELEASE_MEM_DATA_SEL(x) ((x) << 29) x 193 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_RELEASE_MEM_INT_SEL(x) ((x) << 24) x 198 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_RELEASE_MEM_DST_SEL(x) ((x) << 16) x 218 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) x 222 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) x 226 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) x 231 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) x 235 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) x 309 drivers/gpu/drm/amd/amdgpu/nvd.h # define FRAME_CMD(x) ((x) << 28) x 320 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_INVALIDATE_TLBS_DST_SEL(x) ((x) << 0) x 321 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_INVALIDATE_TLBS_ALL_HUB(x) ((x) << 4) x 322 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_INVALIDATE_TLBS_PASID(x) ((x) << 5) x 340 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_SET_RESOURCES_VMID_MASK(x) ((x) << 0) x 341 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_SET_RESOURCES_UNMAP_LATENTY(x) ((x) << 16) x 342 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_SET_RESOURCES_QUEUE_TYPE(x) ((x) << 29) x 354 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_QUEUE_SEL(x) ((x) << 4) x 355 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_VMID(x) ((x) << 8) x 356 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_QUEUE(x) ((x) << 13) x 357 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_PIPE(x) ((x) << 16) x 358 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_ME(x) ((x) << 18) x 359 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_QUEUE_TYPE(x) ((x) << 21) x 360 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_ALLOC_FORMAT(x) ((x) << 24) x 361 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_ENGINE_SEL(x) ((x) << 26) x 362 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_NUM_QUEUES(x) ((x) << 29) x 364 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_CHECK_DISABLE(x) ((x) << 1) x 365 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_MAP_QUEUES_DOORBELL_OFFSET(x) ((x) << 2) x 375 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_ACTION(x) ((x) << 0) x 381 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_QUEUE_SEL(x) ((x) << 4) x 382 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_ENGINE_SEL(x) ((x) << 26) x 383 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_NUM_QUEUES(x) ((x) << 29) x 385 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_PASID(x) ((x) << 0) x 387 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(x) ((x) << 2) x 389 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET1(x) ((x) << 2) x 391 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_RB_WPTR(x) ((x) << 0) x 393 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET2(x) ((x) << 2) x 395 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET3(x) ((x) << 2) x 406 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_QUERY_STATUS_CONTEXT_ID(x) ((x) << 0) x 407 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_QUERY_STATUS_INTERRUPT_SEL(x) ((x) << 28) x 408 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_QUERY_STATUS_COMMAND(x) ((x) << 30) x 410 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_QUERY_STATUS_PASID(x) ((x) << 0) x 412 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_QUERY_STATUS_DOORBELL_OFFSET(x) ((x) << 2) x 413 drivers/gpu/drm/amd/amdgpu/nvd.h # define PACKET3_QUERY_STATUS_ENG_SEL(x) ((x) << 25) x 31 drivers/gpu/drm/amd/amdgpu/si_dpm.h #define CG_ARB_REQ(x) ((x) << 0) x 40 drivers/gpu/drm/amd/amdgpu/si_enums.h #define LATENCY_WATERMARK_MASK(x) ((x) << 16) x 41 drivers/gpu/drm/amd/amdgpu/si_enums.h #define DC_LB_MEMORY_CONFIG(x) ((x) << 20) x 42 drivers/gpu/drm/amd/amdgpu/si_enums.h #define ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8) x 44 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) x 49 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) x 54 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) x 59 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) x 64 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) x 70 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_DEPTH(x) (((x) & 0x3) << 0) x 75 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_FORMAT(x) (((x) & 0x7) << 8) x 92 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) x 93 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) x 98 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) x 99 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) x 100 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) x 101 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) x 102 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) x 103 drivers/gpu/drm/amd/amdgpu/si_enums.h #define GRPH_PIPE_CONFIG(x) (((x) & 0x1f) << 24) x 106 drivers/gpu/drm/amd/amdgpu/si_enums.h #define CURSOR_MODE(x) (((x) & 0x3) << 8) x 113 drivers/gpu/drm/amd/amdgpu/si_enums.h #define CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24) x 144 drivers/gpu/drm/amd/amdgpu/si_enums.h #define RLC_PUD(x) ((x) << 0) x 146 drivers/gpu/drm/amd/amdgpu/si_enums.h #define RLC_PDD(x) ((x) << 8) x 148 drivers/gpu/drm/amd/amdgpu/si_enums.h #define RLC_TTPD(x) ((x) << 16) x 150 drivers/gpu/drm/amd/amdgpu/si_enums.h #define RLC_MSD(x) ((x) << 24) x 152 drivers/gpu/drm/amd/amdgpu/si_enums.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 153 drivers/gpu/drm/amd/amdgpu/si_enums.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 154 drivers/gpu/drm/amd/amdgpu/si_enums.h #define EVENT_TYPE(x) ((x) << 0) x 155 drivers/gpu/drm/amd/amdgpu/si_enums.h #define EVENT_INDEX(x) ((x) << 8) x 156 drivers/gpu/drm/amd/amdgpu/si_enums.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 157 drivers/gpu/drm/amd/amdgpu/si_enums.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 158 drivers/gpu/drm/amd/amdgpu/si_enums.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 175 drivers/gpu/drm/amd/amdgpu/si_enums.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 214 drivers/gpu/drm/amd/amdgpu/si_enums.h # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) x 215 drivers/gpu/drm/amd/amdgpu/si_enums.h # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) x 216 drivers/gpu/drm/amd/amdgpu/si_enums.h # define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29) x 219 drivers/gpu/drm/amd/amdgpu/si_enums.h # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) x 220 drivers/gpu/drm/amd/amdgpu/si_enums.h # define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) x 248 drivers/gpu/drm/amd/amdgpu/si_enums.h #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) x 80 drivers/gpu/drm/amd/amdgpu/sid.h #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) x 83 drivers/gpu/drm/amd/amdgpu/sid.h #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) x 91 drivers/gpu/drm/amd/amdgpu/sid.h #define SPLL_REF_DIV(x) ((x) << 4) x 93 drivers/gpu/drm/amd/amdgpu/sid.h #define SPLL_PDIV_A(x) ((x) << 20) x 97 drivers/gpu/drm/amd/amdgpu/sid.h #define SCLK_MUX_SEL(x) ((x) << 0) x 102 drivers/gpu/drm/amd/amdgpu/sid.h #define SPLL_FB_DIV(x) ((x) << 0) x 112 drivers/gpu/drm/amd/amdgpu/sid.h # define SPLL_REFCLK_SEL(x) ((x) << 26) x 117 drivers/gpu/drm/amd/amdgpu/sid.h #define CLK_S(x) ((x) << 4) x 121 drivers/gpu/drm/amd/amdgpu/sid.h #define CLK_V(x) ((x) << 0) x 139 drivers/gpu/drm/amd/amdgpu/sid.h # define UPLL_PDIV_A(x) ((x) << 0) x 141 drivers/gpu/drm/amd/amdgpu/sid.h # define UPLL_PDIV_B(x) ((x) << 8) x 143 drivers/gpu/drm/amd/amdgpu/sid.h # define VCLK_SRC_SEL(x) ((x) << 20) x 145 drivers/gpu/drm/amd/amdgpu/sid.h # define DCLK_SRC_SEL(x) ((x) << 25) x 148 drivers/gpu/drm/amd/amdgpu/sid.h # define UPLL_FB_DIV(x) ((x) << 0) x 158 drivers/gpu/drm/amd/amdgpu/sid.h # define MPLL_CLKOUT_SEL(x) ((x) << 8) x 169 drivers/gpu/drm/amd/amdgpu/sid.h # define CMON_CLK_SEL(x) ((x) << 0) x 171 drivers/gpu/drm/amd/amdgpu/sid.h # define TMON_CLK_SEL(x) ((x) << 8) x 174 drivers/gpu/drm/amd/amdgpu/sid.h # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0) x 176 drivers/gpu/drm/amd/amdgpu/sid.h # define ZCLK_SEL(x) ((x) << 8) x 180 drivers/gpu/drm/amd/amdgpu/sid.h #define DPM_EVENT_SRC(x) ((x) << 0) x 182 drivers/gpu/drm/amd/amdgpu/sid.h #define DIG_THERM_DPM(x) ((x) << 14) x 186 drivers/gpu/drm/amd/amdgpu/sid.h #define FDO_PWM_DUTY(x) ((x) << 9) x 190 drivers/gpu/drm/amd/amdgpu/sid.h #define DIG_THERM_INTH(x) ((x) << 8) x 193 drivers/gpu/drm/amd/amdgpu/sid.h #define DIG_THERM_INTL(x) ((x) << 16) x 200 drivers/gpu/drm/amd/amdgpu/sid.h #define TEMP_SEL(x) ((x) << 20) x 204 drivers/gpu/drm/amd/amdgpu/sid.h #define ASIC_MAX_TEMP(x) ((x) << 0) x 207 drivers/gpu/drm/amd/amdgpu/sid.h #define CTF_TEMP(x) ((x) << 9) x 212 drivers/gpu/drm/amd/amdgpu/sid.h #define FDO_STATIC_DUTY(x) ((x) << 0) x 216 drivers/gpu/drm/amd/amdgpu/sid.h #define FMAX_DUTY100(x) ((x) << 0) x 220 drivers/gpu/drm/amd/amdgpu/sid.h #define TMIN(x) ((x) << 0) x 223 drivers/gpu/drm/amd/amdgpu/sid.h #define FDO_PWM_MODE(x) ((x) << 11) x 226 drivers/gpu/drm/amd/amdgpu/sid.h #define TACH_PWM_RESP_RATE(x) ((x) << 25) x 231 drivers/gpu/drm/amd/amdgpu/sid.h # define EDGE_PER_REV(x) ((x) << 0) x 234 drivers/gpu/drm/amd/amdgpu/sid.h # define TARGET_PERIOD(x) ((x) << 3) x 238 drivers/gpu/drm/amd/amdgpu/sid.h # define TACH_PERIOD(x) ((x) << 0) x 247 drivers/gpu/drm/amd/amdgpu/sid.h # define SW_SMIO_INDEX(x) ((x) << 6) x 275 drivers/gpu/drm/amd/amdgpu/sid.h # define UTC_0(x) ((x) << 0) x 277 drivers/gpu/drm/amd/amdgpu/sid.h # define DTC_0(x) ((x) << 10) x 281 drivers/gpu/drm/amd/amdgpu/sid.h # define BSP(x) ((x) << 0) x 283 drivers/gpu/drm/amd/amdgpu/sid.h # define BSU(x) ((x) << 16) x 286 drivers/gpu/drm/amd/amdgpu/sid.h # define CG_R(x) ((x) << 0) x 288 drivers/gpu/drm/amd/amdgpu/sid.h # define CG_L(x) ((x) << 16) x 292 drivers/gpu/drm/amd/amdgpu/sid.h # define CG_GICST(x) ((x) << 0) x 294 drivers/gpu/drm/amd/amdgpu/sid.h # define CG_GIPOT(x) ((x) << 16) x 298 drivers/gpu/drm/amd/amdgpu/sid.h # define SST(x) ((x) << 0) x 300 drivers/gpu/drm/amd/amdgpu/sid.h # define SSTU(x) ((x) << 16) x 304 drivers/gpu/drm/amd/amdgpu/sid.h # define DISP1_GAP(x) ((x) << 0) x 306 drivers/gpu/drm/amd/amdgpu/sid.h # define DISP2_GAP(x) ((x) << 2) x 308 drivers/gpu/drm/amd/amdgpu/sid.h # define VBI_TIMER_COUNT(x) ((x) << 4) x 310 drivers/gpu/drm/amd/amdgpu/sid.h # define VBI_TIMER_UNIT(x) ((x) << 20) x 312 drivers/gpu/drm/amd/amdgpu/sid.h # define DISP1_GAP_MCHG(x) ((x) << 24) x 314 drivers/gpu/drm/amd/amdgpu/sid.h # define DISP2_GAP_MCHG(x) ((x) << 26) x 323 drivers/gpu/drm/amd/amdgpu/sid.h # define CAC_WINDOW(x) ((x) << 0) x 331 drivers/gpu/drm/amd/amdgpu/sid.h # define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) x 374 drivers/gpu/drm/amd/amdgpu/sid.h #define L2_CACHE_PTE_ENDIAN_SWAP_MODE(x) ((x) << 2) x 375 drivers/gpu/drm/amd/amdgpu/sid.h #define L2_CACHE_PDE_ENDIAN_SWAP_MODE(x) ((x) << 4) x 378 drivers/gpu/drm/amd/amdgpu/sid.h #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) x 379 drivers/gpu/drm/amd/amdgpu/sid.h #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) x 383 drivers/gpu/drm/amd/amdgpu/sid.h #define INVALIDATE_CACHE_MODE(x) ((x) << 26) x 388 drivers/gpu/drm/amd/amdgpu/sid.h #define BANK_SELECT(x) ((x) << 0) x 389 drivers/gpu/drm/amd/amdgpu/sid.h #define L2_CACHE_UPDATE_MODE(x) ((x) << 6) x 390 drivers/gpu/drm/amd/amdgpu/sid.h #define L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15) x 396 drivers/gpu/drm/amd/amdgpu/sid.h #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) x 409 drivers/gpu/drm/amd/amdgpu/sid.h #define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) x 518 drivers/gpu/drm/amd/amdgpu/sid.h #define STATE0(x) ((x) << 0) x 521 drivers/gpu/drm/amd/amdgpu/sid.h #define STATE1(x) ((x) << 5) x 524 drivers/gpu/drm/amd/amdgpu/sid.h #define STATE2(x) ((x) << 10) x 527 drivers/gpu/drm/amd/amdgpu/sid.h #define STATE3(x) ((x) << 15) x 599 drivers/gpu/drm/amd/amdgpu/sid.h # define DLL_SPEED(x) ((x) << 0) x 615 drivers/gpu/drm/amd/amdgpu/sid.h #define BWCTRL(x) ((x) << 20) x 618 drivers/gpu/drm/amd/amdgpu/sid.h #define VCO_MODE(x) ((x) << 0) x 620 drivers/gpu/drm/amd/amdgpu/sid.h #define CLKFRAC(x) ((x) << 4) x 622 drivers/gpu/drm/amd/amdgpu/sid.h #define CLKF(x) ((x) << 16) x 626 drivers/gpu/drm/amd/amdgpu/sid.h #define YCLK_POST_DIV(x) ((x) << 0) x 629 drivers/gpu/drm/amd/amdgpu/sid.h #define YCLK_SEL(x) ((x) << 4) x 633 drivers/gpu/drm/amd/amdgpu/sid.h #define CLKV(x) ((x) << 0) x 636 drivers/gpu/drm/amd/amdgpu/sid.h #define CLKS(x) ((x) << 0) x 657 drivers/gpu/drm/amd/amdgpu/sid.h # define IH_IB_SIZE(x) ((x) << 1) /* log2 */ x 660 drivers/gpu/drm/amd/amdgpu/sid.h # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ x 672 drivers/gpu/drm/amd/amdgpu/sid.h # define IH_MC_SWAP(x) ((x) << 1) x 678 drivers/gpu/drm/amd/amdgpu/sid.h # define MC_WRREQ_CREDIT(x) ((x) << 15) x 679 drivers/gpu/drm/amd/amdgpu/sid.h # define MC_WR_CLEAN_CNT(x) ((x) << 20) x 680 drivers/gpu/drm/amd/amdgpu/sid.h # define MC_VMID(x) ((x) << 25) x 701 drivers/gpu/drm/amd/amdgpu/sid.h # define AZ_ENDPOINT_REG_INDEX(x) (((x) & 0xff) << 0) x 706 drivers/gpu/drm/amd/amdgpu/sid.h #define SPEAKER_ALLOCATION(x) (((x) & 0x7f) << 0) x 726 drivers/gpu/drm/amd/amdgpu/sid.h # define MAX_CHANNELS(x) (((x) & 0x7) << 0) x 728 drivers/gpu/drm/amd/amdgpu/sid.h # define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8) x 729 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16) x 730 drivers/gpu/drm/amd/amdgpu/sid.h # define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */ x 742 drivers/gpu/drm/amd/amdgpu/sid.h # define VIDEO_LIPSYNC(x) (((x) & 0xff) << 0) x 743 drivers/gpu/drm/amd/amdgpu/sid.h # define AUDIO_LIPSYNC(x) (((x) & 0xff) << 8) x 753 drivers/gpu/drm/amd/amdgpu/sid.h # define MANUFACTURER_ID(x) (((x) & 0xffff) << 0) x 754 drivers/gpu/drm/amd/amdgpu/sid.h # define PRODUCT_ID(x) (((x) & 0xffff) << 16) x 756 drivers/gpu/drm/amd/amdgpu/sid.h # define SINK_DESCRIPTION_LEN(x) (((x) & 0xff) << 0) x 758 drivers/gpu/drm/amd/amdgpu/sid.h # define PORT_ID0(x) (((x) & 0xffffffff) << 0) x 760 drivers/gpu/drm/amd/amdgpu/sid.h # define PORT_ID1(x) (((x) & 0xffffffff) << 0) x 762 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION0(x) (((x) & 0xff) << 0) x 763 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION1(x) (((x) & 0xff) << 8) x 764 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION2(x) (((x) & 0xff) << 16) x 765 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION3(x) (((x) & 0xff) << 24) x 767 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION4(x) (((x) & 0xff) << 0) x 768 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION5(x) (((x) & 0xff) << 8) x 769 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION6(x) (((x) & 0xff) << 16) x 770 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION7(x) (((x) & 0xff) << 24) x 772 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION8(x) (((x) & 0xff) << 0) x 773 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION9(x) (((x) & 0xff) << 8) x 774 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION10(x) (((x) & 0xff) << 16) x 775 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION11(x) (((x) & 0xff) << 24) x 777 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION12(x) (((x) & 0xff) << 0) x 778 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION13(x) (((x) & 0xff) << 8) x 779 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION14(x) (((x) & 0xff) << 16) x 780 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION15(x) (((x) & 0xff) << 24) x 782 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION16(x) (((x) & 0xff) << 0) x 783 drivers/gpu/drm/amd/amdgpu/sid.h # define DESCRIPTION17(x) (((x) & 0xff) << 8) x 793 drivers/gpu/drm/amd/amdgpu/sid.h #define DC_LB_MEMORY_CONFIG(x) ((x) << 20) x 802 drivers/gpu/drm/amd/amdgpu/sid.h # define LATENCY_WATERMARK_MASK(x) ((x) << 16) x 804 drivers/gpu/drm/amd/amdgpu/sid.h # define LATENCY_LOW_WATERMARK(x) ((x) << 0) x 805 drivers/gpu/drm/amd/amdgpu/sid.h # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) x 902 drivers/gpu/drm/amd/amdgpu/sid.h # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) x 903 drivers/gpu/drm/amd/amdgpu/sid.h # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) x 914 drivers/gpu/drm/amd/amdgpu/sid.h # define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) << 0) /* crtc0 - crtc5 */ x 923 drivers/gpu/drm/amd/amdgpu/sid.h #define AFMT_AUDIO_SRC_SELECT(x) (((x) & 7) << 0) x 934 drivers/gpu/drm/amd/amdgpu/sid.h #define GRBM_READ_TIMEOUT(x) ((x) << 0) x 998 drivers/gpu/drm/amd/amdgpu/sid.h #define INSTANCE_INDEX(x) ((x) << 0) x 999 drivers/gpu/drm/amd/amdgpu/sid.h #define SH_INDEX(x) ((x) << 8) x 1000 drivers/gpu/drm/amd/amdgpu/sid.h #define SE_INDEX(x) ((x) << 16) x 1039 drivers/gpu/drm/amd/amdgpu/sid.h #define ROQ_IB1_START(x) ((x) << 0) x 1040 drivers/gpu/drm/amd/amdgpu/sid.h #define ROQ_IB2_START(x) ((x) << 8) x 1042 drivers/gpu/drm/amd/amdgpu/sid.h #define MEQ1_START(x) ((x) << 0) x 1043 drivers/gpu/drm/amd/amdgpu/sid.h #define MEQ2_START(x) ((x) << 8) x 1050 drivers/gpu/drm/amd/amdgpu/sid.h #define CACHE_INVALIDATION(x) ((x) << 0) x 1054 drivers/gpu/drm/amd/amdgpu/sid.h #define AUTO_INVLD_EN(x) ((x) << 6) x 1083 drivers/gpu/drm/amd/amdgpu/sid.h #define NUM_CLIP_SEQ(x) ((x) << 1) x 1090 drivers/gpu/drm/amd/amdgpu/sid.h #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) x 1091 drivers/gpu/drm/amd/amdgpu/sid.h #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) x 1094 drivers/gpu/drm/amd/amdgpu/sid.h #define SC_FRONTEND_PRIM_FIFO_SIZE(x) ((x) << 0) x 1095 drivers/gpu/drm/amd/amdgpu/sid.h #define SC_BACKEND_PRIM_FIFO_SIZE(x) ((x) << 6) x 1096 drivers/gpu/drm/amd/amdgpu/sid.h #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 15) x 1097 drivers/gpu/drm/amd/amdgpu/sid.h #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 23) x 1106 drivers/gpu/drm/amd/amdgpu/sid.h #define MIN_POWER(x) ((x) << 0) x 1109 drivers/gpu/drm/amd/amdgpu/sid.h #define MAX_POWER(x) ((x) << 16) x 1113 drivers/gpu/drm/amd/amdgpu/sid.h #define MAX_POWER_DELTA(x) ((x) << 0) x 1116 drivers/gpu/drm/amd/amdgpu/sid.h #define STI_SIZE(x) ((x) << 16) x 1119 drivers/gpu/drm/amd/amdgpu/sid.h #define LTI_RATIO(x) ((x) << 27) x 1133 drivers/gpu/drm/amd/amdgpu/sid.h #define VTX_DONE_DELAY(x) ((x) << 0) x 1149 drivers/gpu/drm/amd/amdgpu/sid.h #define BACKEND_DISABLE(x) ((x) << 16) x 1151 drivers/gpu/drm/amd/amdgpu/sid.h #define NUM_PIPES(x) ((x) << 0) x 1154 drivers/gpu/drm/amd/amdgpu/sid.h #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) x 1157 drivers/gpu/drm/amd/amdgpu/sid.h #define NUM_SHADER_ENGINES(x) ((x) << 12) x 1160 drivers/gpu/drm/amd/amdgpu/sid.h #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) x 1163 drivers/gpu/drm/amd/amdgpu/sid.h #define NUM_GPUS(x) ((x) << 20) x 1166 drivers/gpu/drm/amd/amdgpu/sid.h #define MULTI_GPU_TILE_SIZE(x) ((x) << 24) x 1169 drivers/gpu/drm/amd/amdgpu/sid.h #define ROW_SIZE(x) ((x) << 28) x 1174 drivers/gpu/drm/amd/amdgpu/sid.h # define MICRO_TILE_MODE(x) ((x) << 0) x 1178 drivers/gpu/drm/amd/amdgpu/sid.h # define ARRAY_MODE(x) ((x) << 2) x 1183 drivers/gpu/drm/amd/amdgpu/sid.h # define PIPE_CONFIG(x) ((x) << 6) x 1196 drivers/gpu/drm/amd/amdgpu/sid.h # define TILE_SPLIT(x) ((x) << 11) x 1204 drivers/gpu/drm/amd/amdgpu/sid.h # define BANK_WIDTH(x) ((x) << 14) x 1209 drivers/gpu/drm/amd/amdgpu/sid.h # define BANK_HEIGHT(x) ((x) << 16) x 1214 drivers/gpu/drm/amd/amdgpu/sid.h # define MACRO_TILE_ASPECT(x) ((x) << 18) x 1219 drivers/gpu/drm/amd/amdgpu/sid.h # define NUM_BANKS(x) ((x) << 20) x 1276 drivers/gpu/drm/amd/amdgpu/sid.h #define RB_BUFSZ(x) ((x) << 0) x 1277 drivers/gpu/drm/amd/amdgpu/sid.h #define RB_BLKSZ(x) ((x) << 8) x 1365 drivers/gpu/drm/amd/amdgpu/sid.h # define RLC_PUD(x) ((x) << 0) x 1367 drivers/gpu/drm/amd/amdgpu/sid.h # define RLC_PDD(x) ((x) << 8) x 1369 drivers/gpu/drm/amd/amdgpu/sid.h # define RLC_TTPD(x) ((x) << 16) x 1371 drivers/gpu/drm/amd/amdgpu/sid.h # define RLC_MSD(x) ((x) << 24) x 1378 drivers/gpu/drm/amd/amdgpu/sid.h # define MAX_PU_CU(x) ((x) << 0) x 1382 drivers/gpu/drm/amd/amdgpu/sid.h # define GRBM_REG_SGIT(x) ((x) << 3) x 1384 drivers/gpu/drm/amd/amdgpu/sid.h # define PG_AFTER_GRBM_REG_ST(x) ((x) << 19) x 1401 drivers/gpu/drm/amd/amdgpu/sid.h # define RB_MAP_PKR0(x) ((x) << 0) x 1403 drivers/gpu/drm/amd/amdgpu/sid.h # define RB_MAP_PKR1(x) ((x) << 2) x 1409 drivers/gpu/drm/amd/amdgpu/sid.h # define RB_XSEL2(x) ((x) << 4) x 1413 drivers/gpu/drm/amd/amdgpu/sid.h # define PKR_MAP(x) ((x) << 8) x 1419 drivers/gpu/drm/amd/amdgpu/sid.h # define PKR_XSEL(x) ((x) << 10) x 1421 drivers/gpu/drm/amd/amdgpu/sid.h # define PKR_YSEL(x) ((x) << 12) x 1423 drivers/gpu/drm/amd/amdgpu/sid.h # define SC_MAP(x) ((x) << 16) x 1425 drivers/gpu/drm/amd/amdgpu/sid.h # define SC_XSEL(x) ((x) << 18) x 1427 drivers/gpu/drm/amd/amdgpu/sid.h # define SC_YSEL(x) ((x) << 20) x 1429 drivers/gpu/drm/amd/amdgpu/sid.h # define SE_MAP(x) ((x) << 24) x 1435 drivers/gpu/drm/amd/amdgpu/sid.h # define SE_XSEL(x) ((x) << 26) x 1437 drivers/gpu/drm/amd/amdgpu/sid.h # define SE_YSEL(x) ((x) << 28) x 1482 drivers/gpu/drm/amd/amdgpu/sid.h # define LS2_EXIT_TIME(x) ((x) << 17) x 1488 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) x 1491 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_OFF_0(x) ((x) << 10) x 1494 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_RAMP_UP_TIME_0(x) ((x) << 24) x 1498 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_TXS2_1(x) ((x) << 7) x 1501 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_OFF_1(x) ((x) << 10) x 1504 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_RAMP_UP_TIME_1(x) ((x) << 24) x 1509 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_TXS2_2(x) ((x) << 7) x 1512 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_OFF_2(x) ((x) << 10) x 1515 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_RAMP_UP_TIME_2(x) ((x) << 24) x 1519 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_TXS2_3(x) ((x) << 7) x 1522 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_POWER_STATE_IN_OFF_3(x) ((x) << 10) x 1525 drivers/gpu/drm/amd/amdgpu/sid.h # define PLL_RAMP_UP_TIME_3(x) ((x) << 24) x 1555 drivers/gpu/drm/amd/amdgpu/sid.h # define LC_L0S_INACTIVITY(x) ((x) << 8) x 1558 drivers/gpu/drm/amd/amdgpu/sid.h # define LC_L1_INACTIVITY(x) ((x) << 12) x 1581 drivers/gpu/drm/amd/amdgpu/sid.h # define LC_DYN_LANES_PWR_STATE(x) ((x) << 21) x 1585 drivers/gpu/drm/amd/amdgpu/sid.h # define LC_XMIT_N_FTS(x) ((x) << 0) x 1633 drivers/gpu/drm/amd/amdgpu/sid.h # define CG_DT(x) ((x) << 2) x 1635 drivers/gpu/drm/amd/amdgpu/sid.h # define CLK_OD(x) ((x) << 6) x 1643 drivers/gpu/drm/amd/amdgpu/sid.h # define G_DIV_ID(x) ((x) << 2) x 1667 drivers/gpu/drm/amd/amdgpu/sid.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 1700 drivers/gpu/drm/amd/amdgpu/sid.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 1710 drivers/gpu/drm/amd/amdgpu/sid.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 1720 drivers/gpu/drm/amd/amdgpu/sid.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 1729 drivers/gpu/drm/amd/amdgpu/sid.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 1733 drivers/gpu/drm/amd/amdgpu/sid.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 1748 drivers/gpu/drm/amd/amdgpu/sid.h # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) x 1752 drivers/gpu/drm/amd/amdgpu/sid.h # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) x 1756 drivers/gpu/drm/amd/amdgpu/sid.h # define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29) x 1764 drivers/gpu/drm/amd/amdgpu/sid.h # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) x 1770 drivers/gpu/drm/amd/amdgpu/sid.h # define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) x 1809 drivers/gpu/drm/amd/amdgpu/sid.h #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) x 1812 drivers/gpu/drm/amd/amdgpu/sid.h #define EVENT_TYPE(x) ((x) << 0) x 1813 drivers/gpu/drm/amd/amdgpu/sid.h #define EVENT_INDEX(x) ((x) << 8) x 1826 drivers/gpu/drm/amd/amdgpu/sid.h #define DATA_SEL(x) ((x) << 29) x 1832 drivers/gpu/drm/amd/amdgpu/sid.h #define INT_SEL(x) ((x) << 24) x 1880 drivers/gpu/drm/amd/amdgpu/sid.h # define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ x 1884 drivers/gpu/drm/amd/amdgpu/sid.h # define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ x 2108 drivers/gpu/drm/amd/amdgpu/sid.h #define FMT_SPATIAL_DITHER_MODE(x) ((x) << 9) x 2115 drivers/gpu/drm/amd/amdgpu/sid.h #define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) << 21) x 2118 drivers/gpu/drm/amd/amdgpu/sid.h #define FMT_25FRC_SEL(x) ((x) << 26) x 2119 drivers/gpu/drm/amd/amdgpu/sid.h #define FMT_50FRC_SEL(x) ((x) << 28) x 2120 drivers/gpu/drm/amd/amdgpu/sid.h #define FMT_75FRC_SEL(x) ((x) << 30) x 2136 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0) x 2140 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) x 2145 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_Z(x) (((x) & 0x3) << 4) x 2146 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) x 2151 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8) x 2170 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) x 2175 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) x 2183 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) x 2188 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) x 2199 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) x 2204 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) x 2209 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) x 2214 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) x 2219 drivers/gpu/drm/amd/amdgpu/sid.h #define EVERGREEN_GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) x 2257 drivers/gpu/drm/amd/amdgpu/sid.h # define EVERGREEN_CURSOR_MODE(x) (((x) & 0x3) << 8) x 2264 drivers/gpu/drm/amd/amdgpu/sid.h # define EVERGREEN_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24) x 2286 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_INPUT_CSC_GRPH_MODE(x) (((x) & 0x3) << 0) x 2290 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_INPUT_CSC_OVL_MODE(x) (((x) & 0x3) << 4) x 2293 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_OUTPUT_CSC_GRPH_MODE(x) (((x) & 0x7) << 0) x 2300 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_OUTPUT_CSC_OVL_MODE(x) (((x) & 0x7) << 4) x 2303 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_GRPH_DEGAMMA_MODE(x) (((x) & 0x3) << 0) x 2307 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_OVL_DEGAMMA_MODE(x) (((x) & 0x3) << 4) x 2308 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8) x 2309 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_CURSOR_DEGAMMA_MODE(x) (((x) & 0x3) << 12) x 2312 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_GRPH_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 0) x 2317 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_OVL_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 4) x 2320 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_GRPH_REGAMMA_MODE(x) (((x) & 0x7) << 0) x 2326 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_OVL_REGAMMA_MODE(x) (((x) & 0x7) << 4) x 2336 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_GRPH_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 0) x 2341 drivers/gpu/drm/amd/amdgpu/sid.h # define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4) x 49 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c #define to_amdgpu_device(x) (container_of(x, struct amdgpu_ras, eeprom_control.eeprom_accessor))->adev x 50 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c #define to_eeprom_control(x) container_of(x, struct amdgpu_ras_eeprom_control, eeprom_accessor) x 82 drivers/gpu/drm/amd/amdgpu/soc15d.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 110 drivers/gpu/drm/amd/amdgpu/soc15d.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 120 drivers/gpu/drm/amd/amdgpu/soc15d.h #define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) x 124 drivers/gpu/drm/amd/amdgpu/soc15d.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 136 drivers/gpu/drm/amd/amdgpu/soc15d.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 145 drivers/gpu/drm/amd/amdgpu/soc15d.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 149 drivers/gpu/drm/amd/amdgpu/soc15d.h #define WAIT_REG_MEM_OPERATION(x) ((x) << 6) x 153 drivers/gpu/drm/amd/amdgpu/soc15d.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 159 drivers/gpu/drm/amd/amdgpu/soc15d.h #define INDIRECT_BUFFER_CACHE_POLICY(x) ((x) << 28) x 164 drivers/gpu/drm/amd/amdgpu/soc15d.h #define INDIRECT_BUFFER_PRE_ENB(x) ((x) << 21) x 169 drivers/gpu/drm/amd/amdgpu/soc15d.h #define EVENT_TYPE(x) ((x) << 0) x 170 drivers/gpu/drm/amd/amdgpu/soc15d.h #define EVENT_INDEX(x) ((x) << 8) x 178 drivers/gpu/drm/amd/amdgpu/soc15d.h #define EVENT_TYPE(x) ((x) << 0) x 179 drivers/gpu/drm/amd/amdgpu/soc15d.h #define EVENT_INDEX(x) ((x) << 8) x 188 drivers/gpu/drm/amd/amdgpu/soc15d.h #define DATA_SEL(x) ((x) << 29) x 195 drivers/gpu/drm/amd/amdgpu/soc15d.h #define INT_SEL(x) ((x) << 24) x 200 drivers/gpu/drm/amd/amdgpu/soc15d.h #define DST_SEL(x) ((x) << 16) x 220 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) x 224 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) x 228 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) x 233 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) x 237 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) x 289 drivers/gpu/drm/amd/amdgpu/soc15d.h # define FRAME_CMD(x) ((x) << 28) x 296 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_INVALIDATE_TLBS_DST_SEL(x) ((x) << 0) x 297 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_INVALIDATE_TLBS_ALL_HUB(x) ((x) << 4) x 298 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_INVALIDATE_TLBS_PASID(x) ((x) << 5) x 299 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_INVALIDATE_TLBS_FLUSH_TYPE(x) ((x) << 29) x 310 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_SET_RESOURCES_VMID_MASK(x) ((x) << 0) x 311 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_SET_RESOURCES_UNMAP_LATENTY(x) ((x) << 16) x 312 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_SET_RESOURCES_QUEUE_TYPE(x) ((x) << 29) x 323 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_QUEUE_SEL(x) ((x) << 4) x 324 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_VMID(x) ((x) << 8) x 325 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_QUEUE(x) ((x) << 13) x 326 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_PIPE(x) ((x) << 16) x 327 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_ME(x) ((x) << 18) x 328 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_QUEUE_TYPE(x) ((x) << 21) x 329 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_ALLOC_FORMAT(x) ((x) << 24) x 330 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_ENGINE_SEL(x) ((x) << 26) x 331 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_NUM_QUEUES(x) ((x) << 29) x 333 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_CHECK_DISABLE(x) ((x) << 1) x 334 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_MAP_QUEUES_DOORBELL_OFFSET(x) ((x) << 2) x 344 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_ACTION(x) ((x) << 0) x 350 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_QUEUE_SEL(x) ((x) << 4) x 351 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_ENGINE_SEL(x) ((x) << 26) x 352 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_NUM_QUEUES(x) ((x) << 29) x 354 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_PASID(x) ((x) << 0) x 356 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(x) ((x) << 2) x 358 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET1(x) ((x) << 2) x 360 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_RB_WPTR(x) ((x) << 0) x 362 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET2(x) ((x) << 2) x 364 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET3(x) ((x) << 2) x 375 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_QUERY_STATUS_CONTEXT_ID(x) ((x) << 0) x 376 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_QUERY_STATUS_INTERRUPT_SEL(x) ((x) << 28) x 377 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_QUERY_STATUS_COMMAND(x) ((x) << 30) x 379 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_QUERY_STATUS_PASID(x) ((x) << 0) x 381 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_QUERY_STATUS_DOORBELL_OFFSET(x) ((x) << 2) x 382 drivers/gpu/drm/amd/amdgpu/soc15d.h # define PACKET3_QUERY_STATUS_ENG_SEL(x) ((x) << 25) x 57 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_HEADER_OP(x) (((x) & SDMA_PKT_HEADER_op_mask) << SDMA_PKT_HEADER_op_shift) x 63 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_HEADER_sub_op_mask) << SDMA_PKT_HEADER_sub_op_shift) x 74 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_op_shift) x 80 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_sub_op_shift) x 86 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_LINEAR_HEADER_broadcast_shift) x 93 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_LINEAR_COUNT_count_shift) x 100 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_shift) x 106 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_DST_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_dst_ha_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_dst_ha_shift) x 112 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_shift) x 118 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_SRC_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_src_ha_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_src_ha_shift) x 125 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 132 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 139 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 146 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 158 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_shift) x 164 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_shift) x 170 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_shift) x 177 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_shift) x 184 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST2_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_shift) x 190 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST2_HA(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_ha_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_ha_shift) x 196 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST1_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_shift) x 202 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST1_HA(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_ha_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_ha_shift) x 208 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_shift) x 214 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_SRC_HA(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_ha_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_ha_shift) x 221 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 228 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 235 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_DST1_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_shift) x 242 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_DST1_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_shift) x 249 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_DST2_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_shift) x 256 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_DST2_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_shift) x 268 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_shift) x 274 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_shift) x 280 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_ELEMENTSIZE(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_shift) x 287 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_shift) x 294 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_shift) x 301 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_shift) x 307 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_shift) x 314 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_shift) x 320 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_shift) x 327 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_SRC_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_shift) x 334 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_shift) x 341 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_shift) x 348 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_shift) x 354 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_shift) x 361 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_shift) x 367 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_shift) x 374 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_DST_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_shift) x 381 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_shift) x 387 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_shift) x 394 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_RECT_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_shift) x 400 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_shift) x 406 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_DST_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_ha_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_ha_shift) x 412 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_shift) x 418 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_SRC_HA(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_ha_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_ha_shift) x 430 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_op_mask) << SDMA_PKT_COPY_TILED_HEADER_op_shift) x 436 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_HEADER_sub_op_shift) x 442 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_HEADER_detile_shift) x 449 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_shift) x 456 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_shift) x 463 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_3_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_TILED_DW_3_pitch_in_tile_mask) << SDMA_PKT_COPY_TILED_DW_3_pitch_in_tile_shift) x 469 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_3_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_DW_3_height_mask) << SDMA_PKT_COPY_TILED_DW_3_height_shift) x 476 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_4_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_DW_4_slice_pitch_mask) << SDMA_PKT_COPY_TILED_DW_4_slice_pitch_shift) x 483 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_element_size_mask) << SDMA_PKT_COPY_TILED_DW_5_element_size_shift) x 489 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_array_mode_mask) << SDMA_PKT_COPY_TILED_DW_5_array_mode_shift) x 495 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_MIT_MODE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_mit_mode_mask) << SDMA_PKT_COPY_TILED_DW_5_mit_mode_shift) x 501 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_tilesplit_size_mask) << SDMA_PKT_COPY_TILED_DW_5_tilesplit_size_shift) x 507 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_BANK_W(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_bank_w_mask) << SDMA_PKT_COPY_TILED_DW_5_bank_w_shift) x 513 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_BANK_H(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_bank_h_mask) << SDMA_PKT_COPY_TILED_DW_5_bank_h_shift) x 519 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_NUM_BANK(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_num_bank_mask) << SDMA_PKT_COPY_TILED_DW_5_num_bank_shift) x 525 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_mat_aspt_mask) << SDMA_PKT_COPY_TILED_DW_5_mat_aspt_shift) x 531 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_pipe_config_mask) << SDMA_PKT_COPY_TILED_DW_5_pipe_config_shift) x 538 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_X(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_x_mask) << SDMA_PKT_COPY_TILED_DW_6_x_shift) x 544 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_Y(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_y_mask) << SDMA_PKT_COPY_TILED_DW_6_y_shift) x 551 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_Z(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_z_mask) << SDMA_PKT_COPY_TILED_DW_7_z_shift) x 557 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_linear_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_linear_sw_shift) x 563 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_tile_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_tile_sw_shift) x 570 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 577 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 584 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_shift) x 591 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_TILED_COUNT_count_mask) << SDMA_PKT_COPY_TILED_COUNT_count_shift) x 603 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_shift) x 609 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_shift) x 615 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_VIDEOCOPY(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_shift) x 621 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_shift) x 628 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_TILED_ADDR0_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_shift) x 635 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_TILED_ADDR0_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_shift) x 642 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_TILED_ADDR1_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_shift) x 649 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_TILED_ADDR1_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_shift) x 656 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_5_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_5_pitch_in_tile_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_5_pitch_in_tile_shift) x 662 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_5_HEIGHT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_5_height_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_5_height_shift) x 669 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_6_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_6_slice_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_6_slice_pitch_shift) x 676 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_shift) x 682 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_array_mode_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_array_mode_shift) x 688 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_MIT_MODE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mit_mode_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mit_mode_shift) x 694 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_tilesplit_size_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_tilesplit_size_shift) x 700 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_BANK_W(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_w_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_w_shift) x 706 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_BANK_H(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_h_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_bank_h_shift) x 712 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_NUM_BANK(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_num_bank_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_num_bank_shift) x 718 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mat_aspt_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_mat_aspt_shift) x 724 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_pipe_config_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_pipe_config_shift) x 731 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_X(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_shift) x 737 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_Y(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_shift) x 744 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_9_Z(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_shift) x 751 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_DST2_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_shift) x 757 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_DST2_HA(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_ha_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_ha_shift) x 763 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_shift) x 769 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_TILE_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_shift) x 776 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 783 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 790 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_shift) x 797 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_mask) << SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_shift) x 809 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_op_mask) << SDMA_PKT_COPY_T2T_HEADER_op_shift) x 815 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_sub_op_mask) << SDMA_PKT_COPY_T2T_HEADER_sub_op_shift) x 822 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_shift) x 829 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_shift) x 836 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_x_mask) << SDMA_PKT_COPY_T2T_DW_3_src_x_shift) x 842 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_y_mask) << SDMA_PKT_COPY_T2T_DW_3_src_y_shift) x 849 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_z_mask) << SDMA_PKT_COPY_T2T_DW_4_src_z_shift) x 855 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_pitch_in_tile_mask) << SDMA_PKT_COPY_T2T_DW_4_src_pitch_in_tile_shift) x 862 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_5_SRC_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_T2T_DW_5_src_slice_pitch_mask) << SDMA_PKT_COPY_T2T_DW_5_src_slice_pitch_shift) x 869 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_element_size_mask) << SDMA_PKT_COPY_T2T_DW_6_src_element_size_shift) x 875 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_array_mode_mask) << SDMA_PKT_COPY_T2T_DW_6_src_array_mode_shift) x 881 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_MIT_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_mit_mode_mask) << SDMA_PKT_COPY_T2T_DW_6_src_mit_mode_shift) x 887 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_tilesplit_size_mask) << SDMA_PKT_COPY_T2T_DW_6_src_tilesplit_size_shift) x 893 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_BANK_W(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_bank_w_mask) << SDMA_PKT_COPY_T2T_DW_6_src_bank_w_shift) x 899 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_BANK_H(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_bank_h_mask) << SDMA_PKT_COPY_T2T_DW_6_src_bank_h_shift) x 905 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_NUM_BANK(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_num_bank_mask) << SDMA_PKT_COPY_T2T_DW_6_src_num_bank_shift) x 911 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_mat_aspt_mask) << SDMA_PKT_COPY_T2T_DW_6_src_mat_aspt_shift) x 917 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_pipe_config_mask) << SDMA_PKT_COPY_T2T_DW_6_src_pipe_config_shift) x 924 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_shift) x 931 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_shift) x 938 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_x_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_x_shift) x 944 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_y_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_y_shift) x 951 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_z_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_z_shift) x 957 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_pitch_in_tile_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_pitch_in_tile_shift) x 964 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_11_DST_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_T2T_DW_11_dst_slice_pitch_mask) << SDMA_PKT_COPY_T2T_DW_11_dst_slice_pitch_shift) x 971 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_array_mode_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_array_mode_shift) x 977 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_MIT_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_mit_mode_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_mit_mode_shift) x 983 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_tilesplit_size_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_tilesplit_size_shift) x 989 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_BANK_W(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_bank_w_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_bank_w_shift) x 995 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_BANK_H(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_bank_h_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_bank_h_shift) x 1001 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_NUM_BANK(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_num_bank_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_num_bank_shift) x 1007 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_mat_aspt_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_mat_aspt_shift) x 1013 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_pipe_config_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_pipe_config_shift) x 1020 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_x_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_x_shift) x 1026 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_y_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_y_shift) x 1033 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_RECT_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_rect_z_mask) << SDMA_PKT_COPY_T2T_DW_14_rect_z_shift) x 1039 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_DST_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_dst_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_dst_sw_shift) x 1045 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_SRC_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_src_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_src_sw_shift) x 1057 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_shift) x 1063 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_shift) x 1069 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_shift) x 1076 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_shift) x 1083 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_shift) x 1090 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_shift) x 1096 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_shift) x 1103 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_TILED_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_shift) x 1109 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_PITCH_IN_TILE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_pitch_in_tile_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_pitch_in_tile_shift) x 1116 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_5_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_5_slice_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_5_slice_pitch_shift) x 1123 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_shift) x 1129 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_ARRAY_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_array_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_array_mode_shift) x 1135 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_MIT_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mit_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mit_mode_shift) x 1141 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_tilesplit_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_tilesplit_size_shift) x 1147 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_BANK_W(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_w_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_w_shift) x 1153 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_BANK_H(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_h_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_bank_h_shift) x 1159 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_NUM_BANK(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_num_bank_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_num_bank_shift) x 1165 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_MAT_ASPT(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mat_aspt_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_mat_aspt_shift) x 1171 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_PIPE_CONFIG(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_pipe_config_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_pipe_config_shift) x 1178 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1185 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1192 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_shift) x 1198 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_shift) x 1205 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_shift) x 1211 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_shift) x 1218 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_11_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_shift) x 1225 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_shift) x 1231 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_shift) x 1238 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_RECT_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_shift) x 1244 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_shift) x 1250 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_shift) x 1262 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_op_shift) x 1268 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_sub_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_sub_op_shift) x 1274 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_detile_mask) << SDMA_PKT_COPY_STRUCT_HEADER_detile_shift) x 1281 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_SB_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_shift) x 1288 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_SB_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_shift) x 1295 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_START_INDEX_START_INDEX(x) (((x) & SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_mask) << SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_shift) x 1302 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_STRUCT_COUNT_count_mask) << SDMA_PKT_COPY_STRUCT_COUNT_count_shift) x 1309 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRIDE(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_stride_mask) << SDMA_PKT_COPY_STRUCT_DW_5_stride_shift) x 1315 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRUCT_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_shift) x 1321 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRUCT_HA(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_struct_ha_mask) << SDMA_PKT_COPY_STRUCT_DW_5_struct_ha_shift) x 1327 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_shift) x 1333 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_LINEAR_HA(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_linear_ha_mask) << SDMA_PKT_COPY_STRUCT_DW_5_linear_ha_shift) x 1340 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1347 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1359 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_op_shift) x 1365 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_shift) x 1372 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_shift) x 1379 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_shift) x 1386 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_count_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_count_shift) x 1392 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_SW(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_sw_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_sw_shift) x 1399 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DATA0_data0_mask) << SDMA_PKT_WRITE_UNTILED_DATA0_data0_shift) x 1411 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_op_shift) x 1417 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_sub_op_shift) x 1424 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_shift) x 1431 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_shift) x 1438 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_3_PITCH_IN_TILE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_3_pitch_in_tile_mask) << SDMA_PKT_WRITE_TILED_DW_3_pitch_in_tile_shift) x 1444 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_3_HEIGHT(x) (((x) & SDMA_PKT_WRITE_TILED_DW_3_height_mask) << SDMA_PKT_WRITE_TILED_DW_3_height_shift) x 1451 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_4_SLICE_PITCH(x) (((x) & SDMA_PKT_WRITE_TILED_DW_4_slice_pitch_mask) << SDMA_PKT_WRITE_TILED_DW_4_slice_pitch_shift) x 1458 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_element_size_mask) << SDMA_PKT_WRITE_TILED_DW_5_element_size_shift) x 1464 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_ARRAY_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_array_mode_mask) << SDMA_PKT_WRITE_TILED_DW_5_array_mode_shift) x 1470 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_MIT_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_mit_mode_mask) << SDMA_PKT_WRITE_TILED_DW_5_mit_mode_shift) x 1476 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_TILESPLIT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_tilesplit_size_mask) << SDMA_PKT_WRITE_TILED_DW_5_tilesplit_size_shift) x 1482 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_BANK_W(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_bank_w_mask) << SDMA_PKT_WRITE_TILED_DW_5_bank_w_shift) x 1488 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_BANK_H(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_bank_h_mask) << SDMA_PKT_WRITE_TILED_DW_5_bank_h_shift) x 1494 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_NUM_BANK(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_num_bank_mask) << SDMA_PKT_WRITE_TILED_DW_5_num_bank_shift) x 1500 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_MAT_ASPT(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_mat_aspt_mask) << SDMA_PKT_WRITE_TILED_DW_5_mat_aspt_shift) x 1506 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_PIPE_CONFIG(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_pipe_config_mask) << SDMA_PKT_WRITE_TILED_DW_5_pipe_config_shift) x 1513 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_X(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_x_mask) << SDMA_PKT_WRITE_TILED_DW_6_x_shift) x 1519 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_Y(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_y_mask) << SDMA_PKT_WRITE_TILED_DW_6_y_shift) x 1526 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_Z(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_z_mask) << SDMA_PKT_WRITE_TILED_DW_7_z_shift) x 1532 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_SW(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_sw_mask) << SDMA_PKT_WRITE_TILED_DW_7_sw_shift) x 1539 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_TILED_COUNT_count_mask) << SDMA_PKT_WRITE_TILED_COUNT_count_shift) x 1546 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_TILED_DATA0_data0_mask) << SDMA_PKT_WRITE_TILED_DATA0_data0_shift) x 1558 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_op_shift) x 1564 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_sub_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_sub_op_shift) x 1571 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_shift) x 1578 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_shift) x 1585 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW0_MASK_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_mask) << SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_shift) x 1592 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW1_MASK_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_mask) << SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_shift) x 1599 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW0_INIT_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_mask) << SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_shift) x 1606 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW1_INIT_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_mask) << SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_shift) x 1613 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift) x 1620 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW1_INCR_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_mask) << SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_shift) x 1627 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_INCR_COUNT_count_mask) << SDMA_PKT_WRITE_INCR_COUNT_count_shift) x 1639 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_op_mask) << SDMA_PKT_INDIRECT_HEADER_op_shift) x 1645 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_sub_op_mask) << SDMA_PKT_INDIRECT_HEADER_sub_op_shift) x 1651 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_VMID(x) (((x) & SDMA_PKT_INDIRECT_HEADER_vmid_mask) << SDMA_PKT_INDIRECT_HEADER_vmid_shift) x 1658 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_LO_IB_BASE_31_0(x) (((x) & SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_mask) << SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_shift) x 1665 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_HI_IB_BASE_63_32(x) (((x) & SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_mask) << SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_shift) x 1672 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_IB_SIZE_IB_SIZE(x) (((x) & SDMA_PKT_INDIRECT_IB_SIZE_ib_size_mask) << SDMA_PKT_INDIRECT_IB_SIZE_ib_size_shift) x 1679 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_LO_CSA_ADDR_31_0(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_shift) x 1686 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_HI_CSA_ADDR_63_32(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_shift) x 1698 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_op_shift) x 1704 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_sub_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_sub_op_shift) x 1710 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_WRITE_ONE(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_write_one_mask) << SDMA_PKT_SEMAPHORE_HEADER_write_one_shift) x 1716 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SIGNAL(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_signal_mask) << SDMA_PKT_SEMAPHORE_HEADER_signal_shift) x 1722 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_MAILBOX(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_mailbox_mask) << SDMA_PKT_SEMAPHORE_HEADER_mailbox_shift) x 1729 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_shift) x 1736 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_shift) x 1748 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_op_mask) << SDMA_PKT_FENCE_HEADER_op_shift) x 1754 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_sub_op_mask) << SDMA_PKT_FENCE_HEADER_sub_op_shift) x 1761 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_FENCE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_FENCE_ADDR_LO_addr_31_0_shift) x 1768 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_FENCE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_FENCE_ADDR_HI_addr_63_32_shift) x 1775 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_FENCE_DATA_DATA(x) (((x) & SDMA_PKT_FENCE_DATA_data_mask) << SDMA_PKT_FENCE_DATA_data_shift) x 1787 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_op_shift) x 1793 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_sub_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_sub_op_shift) x 1799 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_byte_en_mask) << SDMA_PKT_SRBM_WRITE_HEADER_byte_en_shift) x 1806 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_ADDR_ADDR(x) (((x) & SDMA_PKT_SRBM_WRITE_ADDR_addr_mask) << SDMA_PKT_SRBM_WRITE_ADDR_addr_shift) x 1813 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_DATA_DATA(x) (((x) & SDMA_PKT_SRBM_WRITE_DATA_data_mask) << SDMA_PKT_SRBM_WRITE_DATA_data_shift) x 1825 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_op_mask) << SDMA_PKT_PRE_EXE_HEADER_op_shift) x 1831 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_sub_op_mask) << SDMA_PKT_PRE_EXE_HEADER_sub_op_shift) x 1837 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_DEV_SEL(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_dev_sel_mask) << SDMA_PKT_PRE_EXE_HEADER_dev_sel_shift) x 1844 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_shift) x 1856 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_op_mask) << SDMA_PKT_COND_EXE_HEADER_op_shift) x 1862 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_sub_op_mask) << SDMA_PKT_COND_EXE_HEADER_sub_op_shift) x 1869 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_shift) x 1876 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_shift) x 1883 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_REFERENCE_REFERENCE(x) (((x) & SDMA_PKT_COND_EXE_REFERENCE_reference_mask) << SDMA_PKT_COND_EXE_REFERENCE_reference_shift) x 1890 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_shift) x 1902 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_op_shift) x 1908 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_shift) x 1914 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SW(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sw_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sw_shift) x 1920 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_FILLSIZE(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_shift) x 1927 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_shift) x 1934 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_shift) x 1941 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DATA_SRC_DATA_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_shift) x 1948 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_COUNT_COUNT(x) (((x) & SDMA_PKT_CONSTANT_FILL_COUNT_count_mask) << SDMA_PKT_CONSTANT_FILL_COUNT_count_shift) x 1960 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_op_shift) x 1966 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_sub_op_shift) x 1972 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_mask) << SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_shift) x 1978 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_FUNC(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_func_mask) << SDMA_PKT_POLL_REGMEM_HEADER_func_shift) x 1984 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_MEM_POLL(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_mask) << SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_shift) x 1991 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_shift) x 1998 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_shift) x 2005 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_VALUE_VALUE(x) (((x) & SDMA_PKT_POLL_REGMEM_VALUE_value_mask) << SDMA_PKT_POLL_REGMEM_VALUE_value_shift) x 2012 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_MASK_MASK(x) (((x) & SDMA_PKT_POLL_REGMEM_MASK_mask_mask) << SDMA_PKT_POLL_REGMEM_MASK_mask_shift) x 2019 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift) x 2025 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_retry_count_mask) << SDMA_PKT_POLL_REGMEM_DW5_retry_count_shift) x 2037 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_OP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_op_mask) << SDMA_PKT_ATOMIC_HEADER_op_shift) x 2043 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_LOOP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_loop_mask) << SDMA_PKT_ATOMIC_HEADER_loop_shift) x 2049 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_ATOMIC_OP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_atomic_op_mask) << SDMA_PKT_ATOMIC_HEADER_atomic_op_shift) x 2056 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_ATOMIC_ADDR_LO_addr_31_0_mask) << SDMA_PKT_ATOMIC_ADDR_LO_addr_31_0_shift) x 2063 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_ATOMIC_ADDR_HI_addr_63_32_mask) << SDMA_PKT_ATOMIC_ADDR_HI_addr_63_32_shift) x 2070 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_SRC_DATA_LO_SRC_DATA_31_0(x) (((x) & SDMA_PKT_ATOMIC_SRC_DATA_LO_src_data_31_0_mask) << SDMA_PKT_ATOMIC_SRC_DATA_LO_src_data_31_0_shift) x 2077 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_SRC_DATA_HI_SRC_DATA_63_32(x) (((x) & SDMA_PKT_ATOMIC_SRC_DATA_HI_src_data_63_32_mask) << SDMA_PKT_ATOMIC_SRC_DATA_HI_src_data_63_32_shift) x 2084 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_CMP_DATA_LO_CMP_DATA_31_0(x) (((x) & SDMA_PKT_ATOMIC_CMP_DATA_LO_cmp_data_31_0_mask) << SDMA_PKT_ATOMIC_CMP_DATA_LO_cmp_data_31_0_shift) x 2091 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_CMP_DATA_HI_CMP_DATA_63_32(x) (((x) & SDMA_PKT_ATOMIC_CMP_DATA_HI_cmp_data_63_32_mask) << SDMA_PKT_ATOMIC_CMP_DATA_HI_cmp_data_63_32_shift) x 2098 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_LOOP_INTERVAL_LOOP_INTERVAL(x) (((x) & SDMA_PKT_ATOMIC_LOOP_INTERVAL_loop_interval_mask) << SDMA_PKT_ATOMIC_LOOP_INTERVAL_loop_interval_shift) x 2110 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_op_shift) x 2116 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_shift) x 2123 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_INIT_DATA_31_0(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_shift) x 2130 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_INIT_DATA_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_shift) x 2142 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_op_shift) x 2148 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_shift) x 2155 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_shift) x 2162 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_shift) x 2174 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_shift) x 2180 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_shift) x 2187 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_shift) x 2194 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_shift) x 2206 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_op_mask) << SDMA_PKT_TRAP_HEADER_op_shift) x 2212 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_sub_op_mask) << SDMA_PKT_TRAP_HEADER_sub_op_shift) x 2219 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(x) (((x) & SDMA_PKT_TRAP_INT_CONTEXT_int_context_mask) << SDMA_PKT_TRAP_INT_CONTEXT_int_context_shift) x 2231 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_OP(x) (((x) & SDMA_PKT_NOP_HEADER_op_mask) << SDMA_PKT_NOP_HEADER_op_shift) x 2237 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_NOP_HEADER_sub_op_mask) << SDMA_PKT_NOP_HEADER_sub_op_shift) x 2243 drivers/gpu/drm/amd/amdgpu/tonga_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_COUNT(x) (((x) & SDMA_PKT_NOP_HEADER_count_mask) << SDMA_PKT_NOP_HEADER_count_shift) x 72 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_HEADER_OP(x) (((x) & SDMA_PKT_HEADER_op_mask) << SDMA_PKT_HEADER_op_shift) x 78 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_HEADER_sub_op_mask) << SDMA_PKT_HEADER_sub_op_shift) x 90 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_op_shift) x 96 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_HEADER_sub_op_shift) x 102 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_encrypt_mask) << SDMA_PKT_COPY_LINEAR_HEADER_encrypt_shift) x 108 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_tmz_mask) << SDMA_PKT_COPY_LINEAR_HEADER_tmz_shift) x 114 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_LINEAR_HEADER_broadcast_shift) x 121 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_LINEAR_COUNT_count_shift) x 128 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_dst_sw_shift) x 134 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_LINEAR_PARAMETER_src_sw_shift) x 141 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 148 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 155 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 162 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 174 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_OP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_op_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_op_shift) x 180 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_sub_op_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_sub_op_shift) x 186 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_tmz_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_tmz_shift) x 192 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_HEADER_ALL(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_HEADER_all_mask) << SDMA_PKT_COPY_DIRTY_PAGE_HEADER_all_shift) x 199 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_COUNT_count_mask) << SDMA_PKT_COPY_DIRTY_PAGE_COUNT_count_shift) x 206 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sw_shift) x 212 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_GCC(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gcc_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gcc_shift) x 218 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_SYS(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sys_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_sys_shift) x 224 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_SNOOP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_snoop_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_snoop_shift) x 230 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_DST_GPA(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gpa_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_dst_gpa_shift) x 236 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sw_shift) x 242 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_SYS(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sys_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_sys_shift) x 248 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_SNOOP(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_snoop_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_snoop_shift) x 254 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_SRC_GPA(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_gpa_mask) << SDMA_PKT_COPY_DIRTY_PAGE_PARAMETER_src_gpa_shift) x 261 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_LO_src_addr_31_0_shift) x 268 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_DIRTY_PAGE_SRC_ADDR_HI_src_addr_63_32_shift) x 275 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_LO_dst_addr_31_0_shift) x 282 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_DIRTY_PAGE_DST_ADDR_HI_dst_addr_63_32_shift) x 294 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_op_shift) x 300 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_sub_op_shift) x 306 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_tmz_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_HEADER_tmz_shift) x 313 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_COUNT_count_shift) x 320 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sw_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sw_shift) x 326 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_GCC(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gcc_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gcc_shift) x 332 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_SYS(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sys_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_sys_shift) x 338 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_LOG(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_log_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_log_shift) x 344 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_SNOOP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_snoop_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_snoop_shift) x 350 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_DST_GPA(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gpa_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_dst_gpa_shift) x 356 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sw_shift) x 362 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_GCC(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gcc_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gcc_shift) x 368 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_SYS(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sys_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_sys_shift) x 374 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_SNOOP(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_snoop_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_snoop_shift) x 380 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_SRC_GPA(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gpa_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_PARAMETER_src_gpa_shift) x 387 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 394 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 401 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 408 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_PHYSICAL_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 420 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_op_shift) x 426 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_sub_op_shift) x 432 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_encrypt_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_encrypt_shift) x 438 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_tmz_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_tmz_shift) x 444 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_HEADER_broadcast_shift) x 451 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_COUNT_count_shift) x 458 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST2_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst2_sw_shift) x 464 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_DST1_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_dst1_sw_shift) x 470 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_PARAMETER_src_sw_shift) x 477 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 484 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 491 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_DST1_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_LO_dst1_addr_31_0_shift) x 498 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_DST1_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST1_ADDR_HI_dst1_addr_63_32_shift) x 505 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_DST2_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_LO_dst2_addr_31_0_shift) x 512 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_DST2_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_mask) << SDMA_PKT_COPY_BROADCAST_LINEAR_DST2_ADDR_HI_dst2_addr_63_32_shift) x 524 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_op_shift) x 530 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_sub_op_shift) x 536 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_tmz_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_tmz_shift) x 542 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_ELEMENTSIZE(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_HEADER_elementsize_shift) x 549 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_LO_src_addr_31_0_shift) x 556 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_SRC_ADDR_HI_src_addr_63_32_shift) x 563 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_x_shift) x 569 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_3_src_y_shift) x 576 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_z_shift) x 582 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_SRC_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_4_src_pitch_shift) x 589 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_SRC_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_5_src_slice_pitch_shift) x 596 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_LO_dst_addr_31_0_shift) x 603 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DST_ADDR_HI_dst_addr_63_32_shift) x 610 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_x_shift) x 616 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_DST_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_8_dst_y_shift) x 623 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_z_shift) x 629 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_DST_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_9_dst_pitch_shift) x 636 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_DST_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_10_dst_slice_pitch_shift) x 643 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_X(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_x_shift) x 649 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_RECT_Y(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_11_rect_y_shift) x 656 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_RECT_Z(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_rect_z_shift) x 662 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_DST_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_dst_sw_shift) x 668 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_SRC_SW(x) (((x) & SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_mask) << SDMA_PKT_COPY_LINEAR_SUBWIN_DW_12_src_sw_shift) x 680 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_op_mask) << SDMA_PKT_COPY_TILED_HEADER_op_shift) x 686 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_HEADER_sub_op_shift) x 692 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_encrypt_mask) << SDMA_PKT_COPY_TILED_HEADER_encrypt_shift) x 698 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_tmz_mask) << SDMA_PKT_COPY_TILED_HEADER_tmz_shift) x 704 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_MIP_MAX(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_mip_max_mask) << SDMA_PKT_COPY_TILED_HEADER_mip_max_shift) x 710 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_HEADER_detile_shift) x 717 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_LO_tiled_addr_31_0_shift) x 724 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_TILED_ADDR_HI_tiled_addr_63_32_shift) x 731 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_3_WIDTH(x) (((x) & SDMA_PKT_COPY_TILED_DW_3_width_mask) << SDMA_PKT_COPY_TILED_DW_3_width_shift) x 738 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_4_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_DW_4_height_mask) << SDMA_PKT_COPY_TILED_DW_4_height_shift) x 744 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_4_DEPTH(x) (((x) & SDMA_PKT_COPY_TILED_DW_4_depth_mask) << SDMA_PKT_COPY_TILED_DW_4_depth_shift) x 751 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_element_size_mask) << SDMA_PKT_COPY_TILED_DW_5_element_size_shift) x 757 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_swizzle_mode_mask) << SDMA_PKT_COPY_TILED_DW_5_swizzle_mode_shift) x 763 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_DIMENSION(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_dimension_mask) << SDMA_PKT_COPY_TILED_DW_5_dimension_shift) x 769 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_5_EPITCH(x) (((x) & SDMA_PKT_COPY_TILED_DW_5_epitch_mask) << SDMA_PKT_COPY_TILED_DW_5_epitch_shift) x 776 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_X(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_x_mask) << SDMA_PKT_COPY_TILED_DW_6_x_shift) x 782 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_6_Y(x) (((x) & SDMA_PKT_COPY_TILED_DW_6_y_mask) << SDMA_PKT_COPY_TILED_DW_6_y_shift) x 789 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_Z(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_z_mask) << SDMA_PKT_COPY_TILED_DW_7_z_shift) x 795 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_linear_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_linear_sw_shift) x 801 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_DW_7_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_DW_7_tile_sw_mask) << SDMA_PKT_COPY_TILED_DW_7_tile_sw_shift) x 808 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 815 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 822 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_TILED_LINEAR_PITCH_linear_pitch_shift) x 829 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_LINEAR_SLICE_PITCH_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_LINEAR_SLICE_PITCH_linear_slice_pitch_mask) << SDMA_PKT_COPY_TILED_LINEAR_SLICE_PITCH_linear_slice_pitch_shift) x 836 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_TILED_COUNT_count_mask) << SDMA_PKT_COPY_TILED_COUNT_count_shift) x 848 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_op_shift) x 854 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_sub_op_shift) x 860 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_encrypt_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_encrypt_shift) x 866 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_tmz_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_tmz_shift) x 872 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_MIP_MAX(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_mip_max_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_mip_max_shift) x 878 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_VIDEOCOPY(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_videocopy_shift) x 884 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_HEADER_BROADCAST(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_mask) << SDMA_PKT_COPY_L2T_BROADCAST_HEADER_broadcast_shift) x 891 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_TILED_ADDR0_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_0_tiled_addr0_31_0_shift) x 898 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_TILED_ADDR0_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_0_tiled_addr0_63_32_shift) x 905 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_TILED_ADDR1_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_LO_1_tiled_addr1_31_0_shift) x 912 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_TILED_ADDR1_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_TILED_ADDR_HI_1_tiled_addr1_63_32_shift) x 919 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_5_WIDTH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_5_width_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_5_width_shift) x 926 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_6_HEIGHT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_6_height_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_6_height_shift) x 932 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_6_DEPTH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_6_depth_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_6_depth_shift) x 939 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_element_size_shift) x 945 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_swizzle_mode_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_swizzle_mode_shift) x 951 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_DIMENSION(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_dimension_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_dimension_shift) x 957 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_7_EPITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_7_epitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_7_epitch_shift) x 964 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_X(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_x_shift) x 970 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_8_Y(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_8_y_shift) x 977 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_9_Z(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_9_z_shift) x 984 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_DST2_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_dst2_sw_shift) x 990 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_linear_sw_shift) x 996 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_DW_10_TILE_SW(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_mask) << SDMA_PKT_COPY_L2T_BROADCAST_DW_10_tile_sw_shift) x 1003 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1010 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1017 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_PITCH_linear_pitch_shift) x 1024 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_SLICE_PITCH_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_SLICE_PITCH_linear_slice_pitch_mask) << SDMA_PKT_COPY_L2T_BROADCAST_LINEAR_SLICE_PITCH_linear_slice_pitch_shift) x 1031 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_L2T_BROADCAST_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_mask) << SDMA_PKT_COPY_L2T_BROADCAST_COUNT_count_shift) x 1043 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_op_mask) << SDMA_PKT_COPY_T2T_HEADER_op_shift) x 1049 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_sub_op_mask) << SDMA_PKT_COPY_T2T_HEADER_sub_op_shift) x 1055 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_tmz_mask) << SDMA_PKT_COPY_T2T_HEADER_tmz_shift) x 1061 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_HEADER_MIP_MAX(x) (((x) & SDMA_PKT_COPY_T2T_HEADER_mip_max_mask) << SDMA_PKT_COPY_T2T_HEADER_mip_max_shift) x 1068 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_LO_src_addr_31_0_shift) x 1075 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_COPY_T2T_SRC_ADDR_HI_src_addr_63_32_shift) x 1082 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_x_mask) << SDMA_PKT_COPY_T2T_DW_3_src_x_shift) x 1088 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_3_SRC_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_3_src_y_mask) << SDMA_PKT_COPY_T2T_DW_3_src_y_shift) x 1095 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_z_mask) << SDMA_PKT_COPY_T2T_DW_4_src_z_shift) x 1101 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_4_SRC_WIDTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_4_src_width_mask) << SDMA_PKT_COPY_T2T_DW_4_src_width_shift) x 1108 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_5_SRC_HEIGHT(x) (((x) & SDMA_PKT_COPY_T2T_DW_5_src_height_mask) << SDMA_PKT_COPY_T2T_DW_5_src_height_shift) x 1114 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_5_SRC_DEPTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_5_src_depth_mask) << SDMA_PKT_COPY_T2T_DW_5_src_depth_shift) x 1121 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_element_size_mask) << SDMA_PKT_COPY_T2T_DW_6_src_element_size_shift) x 1127 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_swizzle_mode_mask) << SDMA_PKT_COPY_T2T_DW_6_src_swizzle_mode_shift) x 1133 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_DIMENSION(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_dimension_mask) << SDMA_PKT_COPY_T2T_DW_6_src_dimension_shift) x 1139 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_6_SRC_EPITCH(x) (((x) & SDMA_PKT_COPY_T2T_DW_6_src_epitch_mask) << SDMA_PKT_COPY_T2T_DW_6_src_epitch_shift) x 1146 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_LO_dst_addr_31_0_shift) x 1153 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_COPY_T2T_DST_ADDR_HI_dst_addr_63_32_shift) x 1160 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_x_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_x_shift) x 1166 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_9_DST_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_9_dst_y_mask) << SDMA_PKT_COPY_T2T_DW_9_dst_y_shift) x 1173 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_z_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_z_shift) x 1179 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_10_DST_WIDTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_10_dst_width_mask) << SDMA_PKT_COPY_T2T_DW_10_dst_width_shift) x 1186 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_11_DST_HEIGHT(x) (((x) & SDMA_PKT_COPY_T2T_DW_11_dst_height_mask) << SDMA_PKT_COPY_T2T_DW_11_dst_height_shift) x 1192 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_11_DST_DEPTH(x) (((x) & SDMA_PKT_COPY_T2T_DW_11_dst_depth_mask) << SDMA_PKT_COPY_T2T_DW_11_dst_depth_shift) x 1199 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_element_size_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_element_size_shift) x 1205 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_swizzle_mode_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_swizzle_mode_shift) x 1211 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_DIMENSION(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_dimension_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_dimension_shift) x 1217 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_12_DST_EPITCH(x) (((x) & SDMA_PKT_COPY_T2T_DW_12_dst_epitch_mask) << SDMA_PKT_COPY_T2T_DW_12_dst_epitch_shift) x 1224 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_X(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_x_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_x_shift) x 1230 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_13_RECT_Y(x) (((x) & SDMA_PKT_COPY_T2T_DW_13_rect_y_mask) << SDMA_PKT_COPY_T2T_DW_13_rect_y_shift) x 1237 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_RECT_Z(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_rect_z_mask) << SDMA_PKT_COPY_T2T_DW_14_rect_z_shift) x 1243 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_DST_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_dst_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_dst_sw_shift) x 1249 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_T2T_DW_14_SRC_SW(x) (((x) & SDMA_PKT_COPY_T2T_DW_14_src_sw_mask) << SDMA_PKT_COPY_T2T_DW_14_src_sw_shift) x 1261 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_op_shift) x 1267 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_sub_op_shift) x 1273 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_tmz_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_tmz_shift) x 1279 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_MIP_MAX(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_mip_max_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_mip_max_shift) x 1285 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_MIP_ID(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_mip_id_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_mip_id_shift) x 1291 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_mask) << SDMA_PKT_COPY_TILED_SUBWIN_HEADER_detile_shift) x 1298 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_TILED_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_LO_tiled_addr_31_0_shift) x 1305 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_TILED_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_TILED_ADDR_HI_tiled_addr_63_32_shift) x 1312 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_x_shift) x 1318 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_3_TILED_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_3_tiled_y_shift) x 1325 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_TILED_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_tiled_z_shift) x 1331 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_4_WIDTH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_4_width_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_4_width_shift) x 1338 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_5_HEIGHT(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_5_height_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_5_height_shift) x 1344 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_5_DEPTH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_5_depth_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_5_depth_shift) x 1351 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_ELEMENT_SIZE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_element_size_shift) x 1357 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_SWIZZLE_MODE(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_swizzle_mode_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_swizzle_mode_shift) x 1363 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_DIMENSION(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_dimension_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_dimension_shift) x 1369 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_6_EPITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_6_epitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_6_epitch_shift) x 1376 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1383 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_TILED_SUBWIN_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1390 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_x_shift) x 1396 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_9_LINEAR_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_9_linear_y_shift) x 1403 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_z_shift) x 1409 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_10_LINEAR_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_10_linear_pitch_shift) x 1416 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_11_LINEAR_SLICE_PITCH(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_11_linear_slice_pitch_shift) x 1423 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_X(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_x_shift) x 1429 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_12_RECT_Y(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_12_rect_y_shift) x 1436 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_RECT_Z(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_rect_z_shift) x 1442 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_linear_sw_shift) x 1448 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_TILED_SUBWIN_DW_13_TILE_SW(x) (((x) & SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_mask) << SDMA_PKT_COPY_TILED_SUBWIN_DW_13_tile_sw_shift) x 1460 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_op_shift) x 1466 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_sub_op_mask) << SDMA_PKT_COPY_STRUCT_HEADER_sub_op_shift) x 1472 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_TMZ(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_tmz_mask) << SDMA_PKT_COPY_STRUCT_HEADER_tmz_shift) x 1478 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_HEADER_DETILE(x) (((x) & SDMA_PKT_COPY_STRUCT_HEADER_detile_mask) << SDMA_PKT_COPY_STRUCT_HEADER_detile_shift) x 1485 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_SB_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_LO_sb_addr_31_0_shift) x 1492 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_SB_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_SB_ADDR_HI_sb_addr_63_32_shift) x 1499 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_START_INDEX_START_INDEX(x) (((x) & SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_mask) << SDMA_PKT_COPY_STRUCT_START_INDEX_start_index_shift) x 1506 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_COUNT_COUNT(x) (((x) & SDMA_PKT_COPY_STRUCT_COUNT_count_mask) << SDMA_PKT_COPY_STRUCT_COUNT_count_shift) x 1513 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRIDE(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_stride_mask) << SDMA_PKT_COPY_STRUCT_DW_5_stride_shift) x 1519 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_LINEAR_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_linear_sw_shift) x 1525 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_DW_5_STRUCT_SW(x) (((x) & SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_mask) << SDMA_PKT_COPY_STRUCT_DW_5_struct_sw_shift) x 1532 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_LINEAR_ADDR_31_0(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_LO_linear_addr_31_0_shift) x 1539 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_LINEAR_ADDR_63_32(x) (((x) & SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_mask) << SDMA_PKT_COPY_STRUCT_LINEAR_ADDR_HI_linear_addr_63_32_shift) x 1551 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_op_shift) x 1557 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_sub_op_shift) x 1563 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_encrypt_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_encrypt_shift) x 1569 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_HEADER_TMZ(x) (((x) & SDMA_PKT_WRITE_UNTILED_HEADER_tmz_mask) << SDMA_PKT_WRITE_UNTILED_HEADER_tmz_shift) x 1576 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_LO_dst_addr_31_0_shift) x 1583 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_UNTILED_DST_ADDR_HI_dst_addr_63_32_shift) x 1590 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_count_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_count_shift) x 1596 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DW_3_SW(x) (((x) & SDMA_PKT_WRITE_UNTILED_DW_3_sw_mask) << SDMA_PKT_WRITE_UNTILED_DW_3_sw_shift) x 1603 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_UNTILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_UNTILED_DATA0_data0_mask) << SDMA_PKT_WRITE_UNTILED_DATA0_data0_shift) x 1615 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_op_shift) x 1621 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_sub_op_mask) << SDMA_PKT_WRITE_TILED_HEADER_sub_op_shift) x 1627 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_ENCRYPT(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_encrypt_mask) << SDMA_PKT_WRITE_TILED_HEADER_encrypt_shift) x 1633 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_TMZ(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_tmz_mask) << SDMA_PKT_WRITE_TILED_HEADER_tmz_shift) x 1639 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_HEADER_MIP_MAX(x) (((x) & SDMA_PKT_WRITE_TILED_HEADER_mip_max_mask) << SDMA_PKT_WRITE_TILED_HEADER_mip_max_shift) x 1646 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_LO_dst_addr_31_0_shift) x 1653 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_TILED_DST_ADDR_HI_dst_addr_63_32_shift) x 1660 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_3_WIDTH(x) (((x) & SDMA_PKT_WRITE_TILED_DW_3_width_mask) << SDMA_PKT_WRITE_TILED_DW_3_width_shift) x 1667 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_4_HEIGHT(x) (((x) & SDMA_PKT_WRITE_TILED_DW_4_height_mask) << SDMA_PKT_WRITE_TILED_DW_4_height_shift) x 1673 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_4_DEPTH(x) (((x) & SDMA_PKT_WRITE_TILED_DW_4_depth_mask) << SDMA_PKT_WRITE_TILED_DW_4_depth_shift) x 1680 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_ELEMENT_SIZE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_element_size_mask) << SDMA_PKT_WRITE_TILED_DW_5_element_size_shift) x 1686 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_SWIZZLE_MODE(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_swizzle_mode_mask) << SDMA_PKT_WRITE_TILED_DW_5_swizzle_mode_shift) x 1692 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_DIMENSION(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_dimension_mask) << SDMA_PKT_WRITE_TILED_DW_5_dimension_shift) x 1698 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_5_EPITCH(x) (((x) & SDMA_PKT_WRITE_TILED_DW_5_epitch_mask) << SDMA_PKT_WRITE_TILED_DW_5_epitch_shift) x 1705 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_X(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_x_mask) << SDMA_PKT_WRITE_TILED_DW_6_x_shift) x 1711 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_6_Y(x) (((x) & SDMA_PKT_WRITE_TILED_DW_6_y_mask) << SDMA_PKT_WRITE_TILED_DW_6_y_shift) x 1718 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_Z(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_z_mask) << SDMA_PKT_WRITE_TILED_DW_7_z_shift) x 1724 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DW_7_SW(x) (((x) & SDMA_PKT_WRITE_TILED_DW_7_sw_mask) << SDMA_PKT_WRITE_TILED_DW_7_sw_shift) x 1731 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_TILED_COUNT_count_mask) << SDMA_PKT_WRITE_TILED_COUNT_count_shift) x 1738 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_TILED_DATA0_DATA0(x) (((x) & SDMA_PKT_WRITE_TILED_DATA0_data0_mask) << SDMA_PKT_WRITE_TILED_DATA0_data0_shift) x 1750 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_HEADER_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_HEADER_op_mask) << SDMA_PKT_PTEPDE_COPY_HEADER_op_shift) x 1756 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_HEADER_sub_op_mask) << SDMA_PKT_PTEPDE_COPY_HEADER_sub_op_shift) x 1762 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_HEADER_PTEPDE_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_HEADER_ptepde_op_mask) << SDMA_PKT_PTEPDE_COPY_HEADER_ptepde_op_shift) x 1769 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_SRC_ADDR_LO_src_addr_31_0_shift) x 1776 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_SRC_ADDR_HI_src_addr_63_32_shift) x 1783 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_DST_ADDR_LO_dst_addr_31_0_shift) x 1790 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_DST_ADDR_HI_dst_addr_63_32_shift) x 1797 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_MASK_DW0_MASK_DW0(x) (((x) & SDMA_PKT_PTEPDE_COPY_MASK_DW0_mask_dw0_mask) << SDMA_PKT_PTEPDE_COPY_MASK_DW0_mask_dw0_shift) x 1804 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_MASK_DW1_MASK_DW1(x) (((x) & SDMA_PKT_PTEPDE_COPY_MASK_DW1_mask_dw1_mask) << SDMA_PKT_PTEPDE_COPY_MASK_DW1_mask_dw1_shift) x 1811 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_COUNT_COUNT(x) (((x) & SDMA_PKT_PTEPDE_COPY_COUNT_count_mask) << SDMA_PKT_PTEPDE_COPY_COUNT_count_shift) x 1823 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_op_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_op_shift) x 1829 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_sub_op_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_sub_op_shift) x 1835 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_PTE_SIZE(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_pte_size_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_pte_size_shift) x 1841 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_DIRECTION(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_direction_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_direction_shift) x 1847 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_PTEPDE_OP(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_ptepde_op_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_HEADER_ptepde_op_shift) x 1854 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_LO_src_addr_31_0_shift) x 1861 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_SRC_ADDR_HI_src_addr_63_32_shift) x 1868 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_LO_dst_addr_31_0_shift) x 1875 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_DST_ADDR_HI_dst_addr_63_32_shift) x 1882 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_MASK_FIRST_XFER(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_first_xfer_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_first_xfer_shift) x 1888 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_MASK_LAST_XFER(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_last_xfer_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_MASK_BIT_FOR_DW_mask_last_xfer_shift) x 1895 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_COPY_BACKWARDS_COUNT_IN_32B_XFER_COUNT(x) (((x) & SDMA_PKT_PTEPDE_COPY_BACKWARDS_COUNT_IN_32B_XFER_count_mask) << SDMA_PKT_PTEPDE_COPY_BACKWARDS_COUNT_IN_32B_XFER_count_shift) x 1907 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_OP(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_op_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_op_shift) x 1913 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_sub_op_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_sub_op_shift) x 1919 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_GCC(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_gcc_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_gcc_shift) x 1925 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_SYS(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_sys_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_sys_shift) x 1931 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_SNP(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_snp_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_snp_shift) x 1937 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_HEADER_GPA(x) (((x) & SDMA_PKT_PTEPDE_RMW_HEADER_gpa_mask) << SDMA_PKT_PTEPDE_RMW_HEADER_gpa_shift) x 1944 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_PTEPDE_RMW_ADDR_LO_addr_31_0_mask) << SDMA_PKT_PTEPDE_RMW_ADDR_LO_addr_31_0_shift) x 1951 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_PTEPDE_RMW_ADDR_HI_addr_63_32_mask) << SDMA_PKT_PTEPDE_RMW_ADDR_HI_addr_63_32_shift) x 1958 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_MASK_LO_MASK_31_0(x) (((x) & SDMA_PKT_PTEPDE_RMW_MASK_LO_mask_31_0_mask) << SDMA_PKT_PTEPDE_RMW_MASK_LO_mask_31_0_shift) x 1965 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_MASK_HI_MASK_63_32(x) (((x) & SDMA_PKT_PTEPDE_RMW_MASK_HI_mask_63_32_mask) << SDMA_PKT_PTEPDE_RMW_MASK_HI_mask_63_32_shift) x 1972 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_VALUE_LO_VALUE_31_0(x) (((x) & SDMA_PKT_PTEPDE_RMW_VALUE_LO_value_31_0_mask) << SDMA_PKT_PTEPDE_RMW_VALUE_LO_value_31_0_shift) x 1979 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PTEPDE_RMW_VALUE_HI_VALUE_63_32(x) (((x) & SDMA_PKT_PTEPDE_RMW_VALUE_HI_value_63_32_mask) << SDMA_PKT_PTEPDE_RMW_VALUE_HI_value_63_32_shift) x 1991 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_op_shift) x 1997 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_HEADER_SUB_OP(x) (((x) & SDMA_PKT_WRITE_INCR_HEADER_sub_op_mask) << SDMA_PKT_WRITE_INCR_HEADER_sub_op_shift) x 2004 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_LO_dst_addr_31_0_shift) x 2011 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_WRITE_INCR_DST_ADDR_HI_dst_addr_63_32_shift) x 2018 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW0_MASK_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_mask) << SDMA_PKT_WRITE_INCR_MASK_DW0_mask_dw0_shift) x 2025 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_MASK_DW1_MASK_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_mask) << SDMA_PKT_WRITE_INCR_MASK_DW1_mask_dw1_shift) x 2032 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW0_INIT_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_mask) << SDMA_PKT_WRITE_INCR_INIT_DW0_init_dw0_shift) x 2039 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INIT_DW1_INIT_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_mask) << SDMA_PKT_WRITE_INCR_INIT_DW1_init_dw1_shift) x 2046 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift) x 2053 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_INCR_DW1_INCR_DW1(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_mask) << SDMA_PKT_WRITE_INCR_INCR_DW1_incr_dw1_shift) x 2060 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_WRITE_INCR_COUNT_COUNT(x) (((x) & SDMA_PKT_WRITE_INCR_COUNT_count_mask) << SDMA_PKT_WRITE_INCR_COUNT_count_shift) x 2072 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_op_mask) << SDMA_PKT_INDIRECT_HEADER_op_shift) x 2078 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_SUB_OP(x) (((x) & SDMA_PKT_INDIRECT_HEADER_sub_op_mask) << SDMA_PKT_INDIRECT_HEADER_sub_op_shift) x 2084 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_HEADER_VMID(x) (((x) & SDMA_PKT_INDIRECT_HEADER_vmid_mask) << SDMA_PKT_INDIRECT_HEADER_vmid_shift) x 2091 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_LO_IB_BASE_31_0(x) (((x) & SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_mask) << SDMA_PKT_INDIRECT_BASE_LO_ib_base_31_0_shift) x 2098 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_BASE_HI_IB_BASE_63_32(x) (((x) & SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_mask) << SDMA_PKT_INDIRECT_BASE_HI_ib_base_63_32_shift) x 2105 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_IB_SIZE_IB_SIZE(x) (((x) & SDMA_PKT_INDIRECT_IB_SIZE_ib_size_mask) << SDMA_PKT_INDIRECT_IB_SIZE_ib_size_shift) x 2112 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_LO_CSA_ADDR_31_0(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_LO_csa_addr_31_0_shift) x 2119 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_INDIRECT_CSA_ADDR_HI_CSA_ADDR_63_32(x) (((x) & SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_mask) << SDMA_PKT_INDIRECT_CSA_ADDR_HI_csa_addr_63_32_shift) x 2131 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_op_shift) x 2137 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_sub_op_mask) << SDMA_PKT_SEMAPHORE_HEADER_sub_op_shift) x 2143 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_WRITE_ONE(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_write_one_mask) << SDMA_PKT_SEMAPHORE_HEADER_write_one_shift) x 2149 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_SIGNAL(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_signal_mask) << SDMA_PKT_SEMAPHORE_HEADER_signal_shift) x 2155 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_HEADER_MAILBOX(x) (((x) & SDMA_PKT_SEMAPHORE_HEADER_mailbox_mask) << SDMA_PKT_SEMAPHORE_HEADER_mailbox_shift) x 2162 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_SEMAPHORE_ADDR_LO_addr_31_0_shift) x 2169 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SEMAPHORE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_SEMAPHORE_ADDR_HI_addr_63_32_shift) x 2181 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_op_mask) << SDMA_PKT_FENCE_HEADER_op_shift) x 2187 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_FENCE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_FENCE_HEADER_sub_op_mask) << SDMA_PKT_FENCE_HEADER_sub_op_shift) x 2194 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_FENCE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_FENCE_ADDR_LO_addr_31_0_shift) x 2201 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_FENCE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_FENCE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_FENCE_ADDR_HI_addr_63_32_shift) x 2208 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_FENCE_DATA_DATA(x) (((x) & SDMA_PKT_FENCE_DATA_data_mask) << SDMA_PKT_FENCE_DATA_data_shift) x 2220 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_op_shift) x 2226 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_sub_op_mask) << SDMA_PKT_SRBM_WRITE_HEADER_sub_op_shift) x 2232 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(x) (((x) & SDMA_PKT_SRBM_WRITE_HEADER_byte_en_mask) << SDMA_PKT_SRBM_WRITE_HEADER_byte_en_shift) x 2239 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_ADDR_ADDR(x) (((x) & SDMA_PKT_SRBM_WRITE_ADDR_addr_mask) << SDMA_PKT_SRBM_WRITE_ADDR_addr_shift) x 2246 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_SRBM_WRITE_DATA_DATA(x) (((x) & SDMA_PKT_SRBM_WRITE_DATA_data_mask) << SDMA_PKT_SRBM_WRITE_DATA_data_shift) x 2258 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_op_mask) << SDMA_PKT_PRE_EXE_HEADER_op_shift) x 2264 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_sub_op_mask) << SDMA_PKT_PRE_EXE_HEADER_sub_op_shift) x 2270 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_HEADER_DEV_SEL(x) (((x) & SDMA_PKT_PRE_EXE_HEADER_dev_sel_mask) << SDMA_PKT_PRE_EXE_HEADER_dev_sel_shift) x 2277 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_PRE_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_PRE_EXE_EXEC_COUNT_exec_count_shift) x 2289 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_op_mask) << SDMA_PKT_COND_EXE_HEADER_op_shift) x 2295 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_HEADER_SUB_OP(x) (((x) & SDMA_PKT_COND_EXE_HEADER_sub_op_mask) << SDMA_PKT_COND_EXE_HEADER_sub_op_shift) x 2302 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_mask) << SDMA_PKT_COND_EXE_ADDR_LO_addr_31_0_shift) x 2309 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_mask) << SDMA_PKT_COND_EXE_ADDR_HI_addr_63_32_shift) x 2316 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_REFERENCE_REFERENCE(x) (((x) & SDMA_PKT_COND_EXE_REFERENCE_reference_mask) << SDMA_PKT_COND_EXE_REFERENCE_reference_shift) x 2323 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_COND_EXE_EXEC_COUNT_EXEC_COUNT(x) (((x) & SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_mask) << SDMA_PKT_COND_EXE_EXEC_COUNT_exec_count_shift) x 2335 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_op_shift) x 2341 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sub_op_shift) x 2347 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_SW(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_sw_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_sw_shift) x 2353 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_HEADER_FILLSIZE(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_fillsize_shift) x 2360 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_LO_dst_addr_31_0_shift) x 2367 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_CONSTANT_FILL_DST_ADDR_HI_dst_addr_63_32_shift) x 2374 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_DATA_SRC_DATA_31_0(x) (((x) & SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_mask) << SDMA_PKT_CONSTANT_FILL_DATA_src_data_31_0_shift) x 2381 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_CONSTANT_FILL_COUNT_COUNT(x) (((x) & SDMA_PKT_CONSTANT_FILL_COUNT_count_mask) << SDMA_PKT_CONSTANT_FILL_COUNT_count_shift) x 2393 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_HEADER_OP(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_HEADER_op_mask) << SDMA_PKT_DATA_FILL_MULTI_HEADER_op_shift) x 2399 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_HEADER_SUB_OP(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_HEADER_sub_op_mask) << SDMA_PKT_DATA_FILL_MULTI_HEADER_sub_op_shift) x 2405 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_HEADER_MEMLOG_CLR(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_HEADER_memlog_clr_mask) << SDMA_PKT_DATA_FILL_MULTI_HEADER_memlog_clr_shift) x 2412 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_BYTE_STRIDE_BYTE_STRIDE(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_BYTE_STRIDE_byte_stride_mask) << SDMA_PKT_DATA_FILL_MULTI_BYTE_STRIDE_byte_stride_shift) x 2419 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_DMA_COUNT_DMA_COUNT(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_DMA_COUNT_dma_count_mask) << SDMA_PKT_DATA_FILL_MULTI_DMA_COUNT_dma_count_shift) x 2426 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_LO_dst_addr_31_0_shift) x 2433 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_PKT_DATA_FILL_MULTI_DST_ADDR_HI_dst_addr_63_32_shift) x 2440 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DATA_FILL_MULTI_BYTE_COUNT_COUNT(x) (((x) & SDMA_PKT_DATA_FILL_MULTI_BYTE_COUNT_count_mask) << SDMA_PKT_DATA_FILL_MULTI_BYTE_COUNT_count_shift) x 2452 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_op_shift) x 2458 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_REGMEM_HEADER_sub_op_shift) x 2464 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_mask) << SDMA_PKT_POLL_REGMEM_HEADER_hdp_flush_shift) x 2470 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_FUNC(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_func_mask) << SDMA_PKT_POLL_REGMEM_HEADER_func_shift) x 2476 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_HEADER_MEM_POLL(x) (((x) & SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_mask) << SDMA_PKT_POLL_REGMEM_HEADER_mem_poll_shift) x 2483 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_REGMEM_ADDR_LO_addr_31_0_shift) x 2490 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_REGMEM_ADDR_HI_addr_63_32_shift) x 2497 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_VALUE_VALUE(x) (((x) & SDMA_PKT_POLL_REGMEM_VALUE_value_mask) << SDMA_PKT_POLL_REGMEM_VALUE_value_shift) x 2504 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_MASK_MASK(x) (((x) & SDMA_PKT_POLL_REGMEM_MASK_mask_mask) << SDMA_PKT_POLL_REGMEM_MASK_mask_shift) x 2511 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift) x 2517 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_retry_count_mask) << SDMA_PKT_POLL_REGMEM_DW5_retry_count_shift) x 2529 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_op_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_op_shift) x 2535 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_HEADER_sub_op_shift) x 2542 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_SRC_ADDR_ADDR_31_2(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_SRC_ADDR_addr_31_2_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_SRC_ADDR_addr_31_2_shift) x 2549 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_LO_addr_31_0_shift) x 2556 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_REG_WRITE_MEM_DST_ADDR_HI_addr_63_32_shift) x 2568 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_OP(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_op_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_op_shift) x 2574 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_sub_op_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_sub_op_shift) x 2580 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_EA(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_ea_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_HEADER_ea_shift) x 2587 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_LO_addr_31_0_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_LO_addr_31_0_shift) x 2594 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_HI_addr_63_32_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_DST_ADDR_HI_addr_63_32_shift) x 2601 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_START_PAGE_ADDR_31_4(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_START_PAGE_addr_31_4_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_START_PAGE_addr_31_4_shift) x 2608 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_DBIT_WRITE_MEM_PAGE_NUM_PAGE_NUM_31_0(x) (((x) & SDMA_PKT_POLL_DBIT_WRITE_MEM_PAGE_NUM_page_num_31_0_mask) << SDMA_PKT_POLL_DBIT_WRITE_MEM_PAGE_NUM_page_num_31_0_shift) x 2620 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_HEADER_OP(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_HEADER_op_mask) << SDMA_PKT_POLL_MEM_VERIFY_HEADER_op_shift) x 2626 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_HEADER_SUB_OP(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_HEADER_sub_op_mask) << SDMA_PKT_POLL_MEM_VERIFY_HEADER_sub_op_shift) x 2632 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_HEADER_MODE(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_HEADER_mode_mask) << SDMA_PKT_POLL_MEM_VERIFY_HEADER_mode_shift) x 2639 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_PATTERN_PATTERN(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_PATTERN_pattern_mask) << SDMA_PKT_POLL_MEM_VERIFY_PATTERN_pattern_shift) x 2646 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_LO_CMP0_START_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_LO_cmp0_start_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_LO_cmp0_start_31_0_shift) x 2653 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_HI_CMP0_START_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_HI_cmp0_start_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_START_HI_cmp0_start_63_32_shift) x 2660 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_LO_CMP1_END_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_LO_cmp1_end_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_LO_cmp1_end_31_0_shift) x 2667 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_HI_CMP1_END_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_HI_cmp1_end_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP0_ADDR_END_HI_cmp1_end_63_32_shift) x 2674 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_LO_CMP1_START_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_LO_cmp1_start_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_LO_cmp1_start_31_0_shift) x 2681 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_HI_CMP1_START_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_HI_cmp1_start_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_START_HI_cmp1_start_63_32_shift) x 2688 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_LO_CMP1_END_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_LO_cmp1_end_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_LO_cmp1_end_31_0_shift) x 2695 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_HI_CMP1_END_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_HI_cmp1_end_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_CMP1_ADDR_END_HI_cmp1_end_63_32_shift) x 2702 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_LO_REC_31_0(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_LO_rec_31_0_mask) << SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_LO_rec_31_0_shift) x 2709 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_HI_REC_63_32(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_HI_rec_63_32_mask) << SDMA_PKT_POLL_MEM_VERIFY_REC_ADDR_HI_rec_63_32_shift) x 2716 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_POLL_MEM_VERIFY_RESERVED_RESERVED(x) (((x) & SDMA_PKT_POLL_MEM_VERIFY_RESERVED_reserved_mask) << SDMA_PKT_POLL_MEM_VERIFY_RESERVED_reserved_shift) x 2728 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_OP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_op_mask) << SDMA_PKT_ATOMIC_HEADER_op_shift) x 2734 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_LOOP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_loop_mask) << SDMA_PKT_ATOMIC_HEADER_loop_shift) x 2740 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_TMZ(x) (((x) & SDMA_PKT_ATOMIC_HEADER_tmz_mask) << SDMA_PKT_ATOMIC_HEADER_tmz_shift) x 2746 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_HEADER_ATOMIC_OP(x) (((x) & SDMA_PKT_ATOMIC_HEADER_atomic_op_mask) << SDMA_PKT_ATOMIC_HEADER_atomic_op_shift) x 2753 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_ADDR_LO_ADDR_31_0(x) (((x) & SDMA_PKT_ATOMIC_ADDR_LO_addr_31_0_mask) << SDMA_PKT_ATOMIC_ADDR_LO_addr_31_0_shift) x 2760 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_ADDR_HI_ADDR_63_32(x) (((x) & SDMA_PKT_ATOMIC_ADDR_HI_addr_63_32_mask) << SDMA_PKT_ATOMIC_ADDR_HI_addr_63_32_shift) x 2767 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_SRC_DATA_LO_SRC_DATA_31_0(x) (((x) & SDMA_PKT_ATOMIC_SRC_DATA_LO_src_data_31_0_mask) << SDMA_PKT_ATOMIC_SRC_DATA_LO_src_data_31_0_shift) x 2774 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_SRC_DATA_HI_SRC_DATA_63_32(x) (((x) & SDMA_PKT_ATOMIC_SRC_DATA_HI_src_data_63_32_mask) << SDMA_PKT_ATOMIC_SRC_DATA_HI_src_data_63_32_shift) x 2781 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_CMP_DATA_LO_CMP_DATA_31_0(x) (((x) & SDMA_PKT_ATOMIC_CMP_DATA_LO_cmp_data_31_0_mask) << SDMA_PKT_ATOMIC_CMP_DATA_LO_cmp_data_31_0_shift) x 2788 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_CMP_DATA_HI_CMP_DATA_63_32(x) (((x) & SDMA_PKT_ATOMIC_CMP_DATA_HI_cmp_data_63_32_mask) << SDMA_PKT_ATOMIC_CMP_DATA_HI_cmp_data_63_32_shift) x 2795 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_ATOMIC_LOOP_INTERVAL_LOOP_INTERVAL(x) (((x) & SDMA_PKT_ATOMIC_LOOP_INTERVAL_loop_interval_mask) << SDMA_PKT_ATOMIC_LOOP_INTERVAL_loop_interval_shift) x 2807 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_op_shift) x 2813 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_SET_HEADER_sub_op_shift) x 2820 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_INIT_DATA_31_0(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_LO_init_data_31_0_shift) x 2827 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_INIT_DATA_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_mask) << SDMA_PKT_TIMESTAMP_SET_INIT_DATA_HI_init_data_63_32_shift) x 2839 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_op_shift) x 2845 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_HEADER_sub_op_shift) x 2852 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_LO_write_addr_31_3_shift) x 2859 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_WRITE_ADDR_HI_write_addr_63_32_shift) x 2871 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_op_shift) x 2877 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_HEADER_sub_op_shift) x 2884 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_WRITE_ADDR_31_3(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_LO_write_addr_31_3_shift) x 2891 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_WRITE_ADDR_63_32(x) (((x) & SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_mask) << SDMA_PKT_TIMESTAMP_GET_GLOBAL_WRITE_ADDR_HI_write_addr_63_32_shift) x 2903 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_op_mask) << SDMA_PKT_TRAP_HEADER_op_shift) x 2909 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TRAP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_TRAP_HEADER_sub_op_mask) << SDMA_PKT_TRAP_HEADER_sub_op_shift) x 2916 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(x) (((x) & SDMA_PKT_TRAP_INT_CONTEXT_int_context_mask) << SDMA_PKT_TRAP_INT_CONTEXT_int_context_shift) x 2928 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DUMMY_TRAP_HEADER_OP(x) (((x) & SDMA_PKT_DUMMY_TRAP_HEADER_op_mask) << SDMA_PKT_DUMMY_TRAP_HEADER_op_shift) x 2934 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DUMMY_TRAP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_DUMMY_TRAP_HEADER_sub_op_mask) << SDMA_PKT_DUMMY_TRAP_HEADER_sub_op_shift) x 2941 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_DUMMY_TRAP_INT_CONTEXT_INT_CONTEXT(x) (((x) & SDMA_PKT_DUMMY_TRAP_INT_CONTEXT_int_context_mask) << SDMA_PKT_DUMMY_TRAP_INT_CONTEXT_int_context_shift) x 2953 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_OP(x) (((x) & SDMA_PKT_NOP_HEADER_op_mask) << SDMA_PKT_NOP_HEADER_op_shift) x 2959 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_SUB_OP(x) (((x) & SDMA_PKT_NOP_HEADER_sub_op_mask) << SDMA_PKT_NOP_HEADER_sub_op_shift) x 2965 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_NOP_HEADER_COUNT(x) (((x) & SDMA_PKT_NOP_HEADER_count_mask) << SDMA_PKT_NOP_HEADER_count_shift) x 2972 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_PKT_NOP_DATA0_DATA0(x) (((x) & SDMA_PKT_NOP_DATA0_data0_mask) << SDMA_PKT_NOP_DATA0_data0_shift) x 2984 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_FORMAT(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_format_mask) << SDMA_AQL_PKT_HEADER_HEADER_format_shift) x 2990 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_BARRIER(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_barrier_mask) << SDMA_AQL_PKT_HEADER_HEADER_barrier_shift) x 2996 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_ACQUIRE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_acquire_fence_scope_mask) << SDMA_AQL_PKT_HEADER_HEADER_acquire_fence_scope_shift) x 3002 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_RELEASE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_release_fence_scope_mask) << SDMA_AQL_PKT_HEADER_HEADER_release_fence_scope_shift) x 3008 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_RESERVED(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_reserved_mask) << SDMA_AQL_PKT_HEADER_HEADER_reserved_shift) x 3014 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_OP(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_op_mask) << SDMA_AQL_PKT_HEADER_HEADER_op_shift) x 3020 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_HEADER_HEADER_SUBOP(x) (((x) & SDMA_AQL_PKT_HEADER_HEADER_subop_mask) << SDMA_AQL_PKT_HEADER_HEADER_subop_shift) x 3032 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_FORMAT(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_format_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_format_shift) x 3038 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_BARRIER(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_barrier_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_barrier_shift) x 3044 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_ACQUIRE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_acquire_fence_scope_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_acquire_fence_scope_shift) x 3050 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_RELEASE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_release_fence_scope_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_release_fence_scope_shift) x 3056 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_RESERVED(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_reserved_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_reserved_shift) x 3062 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_OP(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_op_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_op_shift) x 3068 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_HEADER_SUBOP(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_HEADER_subop_mask) << SDMA_AQL_PKT_COPY_LINEAR_HEADER_subop_shift) x 3075 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW1_RESERVED_DW1(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW1_reserved_dw1_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW1_reserved_dw1_shift) x 3082 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_LO_RETURN_ADDR_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_LO_return_addr_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_LO_return_addr_31_0_shift) x 3089 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_HI_RETURN_ADDR_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_HI_return_addr_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_RETURN_ADDR_HI_return_addr_63_32_shift) x 3096 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_COUNT_COUNT(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_COUNT_count_mask) << SDMA_AQL_PKT_COPY_LINEAR_COUNT_count_shift) x 3103 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_DST_SW(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_dst_sw_mask) << SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_dst_sw_shift) x 3109 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_SRC_SW(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_src_sw_mask) << SDMA_AQL_PKT_COPY_LINEAR_PARAMETER_src_sw_shift) x 3116 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_LO_SRC_ADDR_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_LO_src_addr_31_0_shift) x 3123 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_HI_SRC_ADDR_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_SRC_ADDR_HI_src_addr_63_32_shift) x 3130 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_LO_DST_ADDR_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_LO_dst_addr_31_0_shift) x 3137 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_HI_DST_ADDR_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_DST_ADDR_HI_dst_addr_63_32_shift) x 3144 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW10_RESERVED_DW10(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW10_reserved_dw10_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW10_reserved_dw10_shift) x 3151 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW11_RESERVED_DW11(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW11_reserved_dw11_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW11_reserved_dw11_shift) x 3158 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW12_RESERVED_DW12(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW12_reserved_dw12_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW12_reserved_dw12_shift) x 3165 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW13_RESERVED_DW13(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW13_reserved_dw13_mask) << SDMA_AQL_PKT_COPY_LINEAR_RESERVED_DW13_reserved_dw13_shift) x 3172 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_LO_COMPLETION_SIGNAL_31_0(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_LO_completion_signal_31_0_mask) << SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_LO_completion_signal_31_0_shift) x 3179 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_HI_COMPLETION_SIGNAL_63_32(x) (((x) & SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_HI_completion_signal_63_32_mask) << SDMA_AQL_PKT_COPY_LINEAR_COMPLETION_SIGNAL_HI_completion_signal_63_32_shift) x 3191 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_FORMAT(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_format_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_format_shift) x 3197 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_BARRIER(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_barrier_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_barrier_shift) x 3203 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_ACQUIRE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_acquire_fence_scope_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_acquire_fence_scope_shift) x 3209 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_RELEASE_FENCE_SCOPE(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_release_fence_scope_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_release_fence_scope_shift) x 3215 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_RESERVED(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_reserved_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_reserved_shift) x 3221 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_OP(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_op_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_op_shift) x 3227 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_HEADER_SUBOP(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_HEADER_subop_mask) << SDMA_AQL_PKT_BARRIER_OR_HEADER_subop_shift) x 3234 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW1_RESERVED_DW1(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW1_reserved_dw1_mask) << SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW1_reserved_dw1_shift) x 3241 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_LO_DEPENDENT_ADDR_0_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_LO_dependent_addr_0_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_LO_dependent_addr_0_31_0_shift) x 3248 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_HI_DEPENDENT_ADDR_0_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_HI_dependent_addr_0_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_0_HI_dependent_addr_0_63_32_shift) x 3255 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_LO_DEPENDENT_ADDR_1_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_LO_dependent_addr_1_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_LO_dependent_addr_1_31_0_shift) x 3262 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_HI_DEPENDENT_ADDR_1_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_HI_dependent_addr_1_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_1_HI_dependent_addr_1_63_32_shift) x 3269 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_LO_DEPENDENT_ADDR_2_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_LO_dependent_addr_2_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_LO_dependent_addr_2_31_0_shift) x 3276 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_HI_DEPENDENT_ADDR_2_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_HI_dependent_addr_2_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_2_HI_dependent_addr_2_63_32_shift) x 3283 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_LO_DEPENDENT_ADDR_3_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_LO_dependent_addr_3_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_LO_dependent_addr_3_31_0_shift) x 3290 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_HI_DEPENDENT_ADDR_3_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_HI_dependent_addr_3_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_3_HI_dependent_addr_3_63_32_shift) x 3297 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_LO_DEPENDENT_ADDR_4_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_LO_dependent_addr_4_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_LO_dependent_addr_4_31_0_shift) x 3304 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_HI_DEPENDENT_ADDR_4_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_HI_dependent_addr_4_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_DEPENDENT_ADDR_4_HI_dependent_addr_4_63_32_shift) x 3311 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW12_RESERVED_DW12(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW12_reserved_dw12_mask) << SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW12_reserved_dw12_shift) x 3318 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW13_RESERVED_DW13(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW13_reserved_dw13_mask) << SDMA_AQL_PKT_BARRIER_OR_RESERVED_DW13_reserved_dw13_shift) x 3325 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_LO_COMPLETION_SIGNAL_31_0(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_LO_completion_signal_31_0_mask) << SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_LO_completion_signal_31_0_shift) x 3332 drivers/gpu/drm/amd/amdgpu/vega10_sdma_pkt_open.h #define SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_HI_COMPLETION_SIGNAL_63_32(x) (((x) & SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_HI_completion_signal_63_32_mask) << SDMA_AQL_PKT_BARRIER_OR_COMPLETION_SIGNAL_HI_completion_signal_63_32_shift) x 72 drivers/gpu/drm/amd/amdgpu/vid.h #define PIPEID(x) ((x) << 0) x 73 drivers/gpu/drm/amd/amdgpu/vid.h #define MEID(x) ((x) << 2) x 74 drivers/gpu/drm/amd/amdgpu/vid.h #define VMID(x) ((x) << 4) x 75 drivers/gpu/drm/amd/amdgpu/vid.h #define QUEUEID(x) ((x) << 8) x 116 drivers/gpu/drm/amd/amdgpu/vid.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 144 drivers/gpu/drm/amd/amdgpu/vid.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 154 drivers/gpu/drm/amd/amdgpu/vid.h #define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) x 158 drivers/gpu/drm/amd/amdgpu/vid.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 167 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_SEM_CLIENT_CODE ((x) << 24) /* 0 = CP, 1 = CB, 2 = DB */ x 171 drivers/gpu/drm/amd/amdgpu/vid.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 180 drivers/gpu/drm/amd/amdgpu/vid.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 184 drivers/gpu/drm/amd/amdgpu/vid.h #define WAIT_REG_MEM_OPERATION(x) ((x) << 6) x 188 drivers/gpu/drm/amd/amdgpu/vid.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 195 drivers/gpu/drm/amd/amdgpu/vid.h #define INDIRECT_BUFFER_CACHE_POLICY(x) ((x) << 28) x 200 drivers/gpu/drm/amd/amdgpu/vid.h #define INDIRECT_BUFFER_PRE_ENB(x) ((x) << 21) x 229 drivers/gpu/drm/amd/amdgpu/vid.h #define EVENT_TYPE(x) ((x) << 0) x 230 drivers/gpu/drm/amd/amdgpu/vid.h #define EVENT_INDEX(x) ((x) << 8) x 246 drivers/gpu/drm/amd/amdgpu/vid.h #define EOP_CACHE_POLICY(x) ((x) << 25) x 251 drivers/gpu/drm/amd/amdgpu/vid.h #define DATA_SEL(x) ((x) << 29) x 258 drivers/gpu/drm/amd/amdgpu/vid.h #define INT_SEL(x) ((x) << 24) x 263 drivers/gpu/drm/amd/amdgpu/vid.h #define DST_SEL(x) ((x) << 16) x 282 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) x 286 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) x 292 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) x 297 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) x 303 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) x 312 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) ((x) << 22) x 318 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_DMA_DATA_CMD_DST_SWAP(x) ((x) << 24) x 367 drivers/gpu/drm/amd/amdgpu/vid.h # define FRAME_CMD(x) ((x) << 28) x 382 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_SET_RESOURCES_VMID_MASK(x) ((x) << 0) x 383 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_SET_RESOURCES_UNMAP_LATENTY(x) ((x) << 16) x 384 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_SET_RESOURCES_QUEUE_TYPE(x) ((x) << 29) x 395 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_QUEUE_SEL(x) ((x) << 4) x 396 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_VMID(x) ((x) << 8) x 397 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_QUEUE_TYPE(x) ((x) << 21) x 398 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_ALLOC_FORMAT(x) ((x) << 24) x 399 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_ENGINE_SEL(x) ((x) << 26) x 400 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_NUM_QUEUES(x) ((x) << 29) x 402 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_CHECK_DISABLE(x) ((x) << 1) x 403 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_DOORBELL_OFFSET(x) ((x) << 2) x 404 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_QUEUE(x) ((x) << 26) x 405 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_PIPE(x) ((x) << 29) x 406 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_MAP_QUEUES_ME(x) ((x) << 31) x 416 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_ACTION(x) ((x) << 0) x 422 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_QUEUE_SEL(x) ((x) << 4) x 423 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_ENGINE_SEL(x) ((x) << 26) x 424 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_NUM_QUEUES(x) ((x) << 29) x 426 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_PASID(x) ((x) << 0) x 428 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(x) ((x) << 2) x 430 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET1(x) ((x) << 2) x 432 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_RB_WPTR(x) ((x) << 0) x 434 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET2(x) ((x) << 2) x 436 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET3(x) ((x) << 2) x 447 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_QUERY_STATUS_CONTEXT_ID(x) ((x) << 0) x 448 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_QUERY_STATUS_INTERRUPT_SEL(x) ((x) << 28) x 449 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_QUERY_STATUS_COMMAND(x) ((x) << 30) x 451 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_QUERY_STATUS_PASID(x) ((x) << 0) x 453 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_QUERY_STATUS_DOORBELL_OFFSET(x) ((x) << 2) x 454 drivers/gpu/drm/amd/amdgpu/vid.h # define PACKET3_QUERY_STATUS_ENG_SEL(x) ((x) << 25) x 481 drivers/gpu/drm/amd/amdgpu/vid.h #define RB_MAP_PKR0(x) ((x) << 0) x 483 drivers/gpu/drm/amd/amdgpu/vid.h #define RB_MAP_PKR1(x) ((x) << 2) x 485 drivers/gpu/drm/amd/amdgpu/vid.h #define RB_XSEL2(x) ((x) << 4) x 489 drivers/gpu/drm/amd/amdgpu/vid.h #define PKR_MAP(x) ((x) << 8) x 491 drivers/gpu/drm/amd/amdgpu/vid.h #define PKR_XSEL(x) ((x) << 10) x 493 drivers/gpu/drm/amd/amdgpu/vid.h #define PKR_YSEL(x) ((x) << 12) x 495 drivers/gpu/drm/amd/amdgpu/vid.h #define SC_MAP(x) ((x) << 16) x 497 drivers/gpu/drm/amd/amdgpu/vid.h #define SC_XSEL(x) ((x) << 18) x 499 drivers/gpu/drm/amd/amdgpu/vid.h #define SC_YSEL(x) ((x) << 20) x 501 drivers/gpu/drm/amd/amdgpu/vid.h #define SE_MAP(x) ((x) << 24) x 503 drivers/gpu/drm/amd/amdgpu/vid.h #define SE_XSEL(x) ((x) << 26) x 505 drivers/gpu/drm/amd/amdgpu/vid.h #define SE_YSEL(x) ((x) << 28) x 509 drivers/gpu/drm/amd/amdgpu/vid.h #define SE_PAIR_MAP(x) ((x) << 0) x 511 drivers/gpu/drm/amd/amdgpu/vid.h #define SE_PAIR_XSEL(x) ((x) << 2) x 513 drivers/gpu/drm/amd/amdgpu/vid.h #define SE_PAIR_YSEL(x) ((x) << 4) x 27 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define PRIVATE_BASE(x) ((x) << 0) /* scratch */ x 28 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define SHARED_BASE(x) ((x) << 16) /* LDS */ x 30 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define ALIGNMENT_MODE(x) ((x) << 2) x 32 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define DEFAULT_MTYPE(x) ((x) << 4) x 33 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define APE1_MTYPE(x) ((x) << 7) x 51 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define QUANTUM_DURATION(x) ((x) << 8) x 53 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define RPTR_BLOCK_SIZE(x) ((x) << 8) x 54 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define MIN_AVAIL_SIZE(x) ((x) << 20) x 61 drivers/gpu/drm/amd/amdkfd/cik_regs.h #define DOORBELL_OFFSET(x) ((x) << 2) x 656 drivers/gpu/drm/amd/amdkfd/kfd_priv.h #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) x 2621 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c scaling_info->src_rect.x = state->src_x >> 16; x 2632 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c scaling_info->dst_rect.x = state->crtc_x; x 2783 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane_size->surface_size.x = 0; x 2796 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane_size->surface_size.x = 0; x 2803 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane_size->chroma_size.x = 0; x 3164 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dst.x = (stream->timing.h_addressable - dst.width) / 2; x 3168 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dst.x += dm_state->underscan_hborder / 2; x 3179 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dst.x, dst.y, dst.width, dst.height); x 5366 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c int x, y; x 5370 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c position->x = 0; x 5385 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c x = plane->state->crtc_x; x 5388 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (x <= -amdgpu_crtc->max_cursor_width || x 5394 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c x += crtc->primary->state->src_x >> 16; x 5398 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (x < 0) { x 5399 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c xorigin = min(-x, amdgpu_crtc->max_cursor_width - 1); x 5400 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c x = 0; x 5407 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c position->x = x; x 292 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h #define to_amdgpu_dm_connector(x) container_of(x, struct amdgpu_dm_connector, base) x 331 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h #define to_dm_crtc_state(x) container_of(x, struct dm_crtc_state, base) x 339 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h #define to_dm_atomic_state(x) container_of(x, struct dm_atomic_state, base) x 352 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h #define to_dm_connector_state(x)\ x 353 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h container_of((x), struct dm_connector_state, base) x 64 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h #define amdgpu_dm_crtc_handle_crc_irq(x) x 61 drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c #define GET_INTEGER_PART(x) \ x 62 drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c ((x) >> FIXED31_32_BITS_PER_FRACTIONAL_PART) x 64 drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c #define GET_FRACTIONAL_PART(x) \ x 65 drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c (FRACTIONAL_PART_MASK & (x)) x 38 drivers/gpu/drm/amd/display/dc/calcs/bw_fixed.c #define GET_FRACTIONAL_PART(x) \ x 39 drivers/gpu/drm/amd/display/dc/calcs/bw_fixed.c (FRACTIONAL_PART_MASK & (x)) x 135 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c int x = *exp_ptr; x 136 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c const int log_2 = ((x >> 23) & 255) - 128; x 137 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c x &= ~(255 << 23); x 138 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c x += 127 << 23; x 139 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c *exp_ptr = x; x 921 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c + pipe->plane_res.scl_data.viewport.x; x 923 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c + pipe->bottom_pipe->plane_res.scl_data.viewport.x; x 927 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c - pipe->bottom_pipe->plane_res.scl_data.viewport.x; x 930 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c - pipe->plane_res.scl_data.viewport.x; x 1497 drivers/gpu/drm/amd/display/dc/core/dc.c if (u->scaling_info->src_rect.x != u->surface->src_rect.x x 1499 drivers/gpu/drm/amd/display/dc/core/dc.c || u->scaling_info->clip_rect.x != u->surface->clip_rect.x x 1501 drivers/gpu/drm/amd/display/dc/core/dc.c || u->scaling_info->dst_rect.x != u->surface->dst_rect.x x 104 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->src_rect.x, x 108 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->dst_rect.x, x 112 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->clip_rect.x, x 123 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->plane_size.surface_size.x, x 217 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->plane_size.surface_size.x, x 278 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->scaling_info->src_rect.x, x 282 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->scaling_info->dst_rect.x, x 286 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->scaling_info->clip_rect.x, x 572 drivers/gpu/drm/amd/display/dc/core/dc_resource.c clip.x = stream->src.x > plane_state->clip_rect.x ? x 573 drivers/gpu/drm/amd/display/dc/core/dc_resource.c stream->src.x : plane_state->clip_rect.x; x 575 drivers/gpu/drm/amd/display/dc/core/dc_resource.c clip.width = stream->src.x + stream->src.width < x 576 drivers/gpu/drm/amd/display/dc/core/dc_resource.c plane_state->clip_rect.x + plane_state->clip_rect.width ? x 577 drivers/gpu/drm/amd/display/dc/core/dc_resource.c stream->src.x + stream->src.width - clip.x : x 578 drivers/gpu/drm/amd/display/dc/core/dc_resource.c plane_state->clip_rect.x + plane_state->clip_rect.width - clip.x ; x 600 drivers/gpu/drm/amd/display/dc/core/dc_resource.c swap(clip.x, clip.y); x 602 drivers/gpu/drm/amd/display/dc/core/dc_resource.c swap(dest.x, dest.y); x 606 drivers/gpu/drm/amd/display/dc/core/dc_resource.c clip.x = dest.x + dest.width - clip.x - clip.width; x 607 drivers/gpu/drm/amd/display/dc/core/dc_resource.c dest.x = 0; x 617 drivers/gpu/drm/amd/display/dc/core/dc_resource.c data->viewport.x = surf_src.x + (clip.x - dest.x) * surf_src.width / dest.width; x 637 drivers/gpu/drm/amd/display/dc/core/dc_resource.c data->viewport.x += data->viewport.width / 2; x 645 drivers/gpu/drm/amd/display/dc/core/dc_resource.c data->viewport_c.x = data->viewport.x / vpc_div; x 647 drivers/gpu/drm/amd/display/dc/core/dc_resource.c data->inits.h_c = (data->viewport.x % vpc_div) != 0 ? dc_fixpt_half : dc_fixpt_zero; x 666 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.recout.x = stream->dst.x; x 667 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (stream->src.x < surf_clip.x) x 668 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.recout.x += (surf_clip.x x 669 drivers/gpu/drm/amd/display/dc/core/dc_resource.c - stream->src.x) * stream->dst.width x 674 drivers/gpu/drm/amd/display/dc/core/dc_resource.c if (pipe_ctx->plane_res.scl_data.recout.width + pipe_ctx->plane_res.scl_data.recout.x > x 675 drivers/gpu/drm/amd/display/dc/core/dc_resource.c stream->dst.x + stream->dst.width) x 677 drivers/gpu/drm/amd/display/dc/core/dc_resource.c stream->dst.x + stream->dst.width x 678 drivers/gpu/drm/amd/display/dc/core/dc_resource.c - pipe_ctx->plane_res.scl_data.recout.x; x 704 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.recout.x += x 865 drivers/gpu/drm/amd/display/dc/core/dc_resource.c surf_size_h = src.x + src.width; x 868 drivers/gpu/drm/amd/display/dc/core/dc_resource.c src.x = 0; x 872 drivers/gpu/drm/amd/display/dc/core/dc_resource.c swap(src.x, src.y); x 880 drivers/gpu/drm/amd/display/dc/core/dc_resource.c recout_skip_h = data->recout.x - (stream->dst.x + (plane_state->dst_rect.x - stream->src.x) x 882 drivers/gpu/drm/amd/display/dc/core/dc_resource.c src.x * plane_state->dst_rect.width / src.width x 919 drivers/gpu/drm/amd/display/dc/core/dc_resource.c &data->viewport.x, x 928 drivers/gpu/drm/amd/display/dc/core/dc_resource.c &data->viewport_c.x, x 990 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.recout.x += timing->h_border_left; x 1041 drivers/gpu/drm/amd/display/dc/core/dc_resource.c pipe_ctx->plane_res.scl_data.viewport.x, x 1045 drivers/gpu/drm/amd/display/dc/core/dc_resource.c plane_state->dst_rect.x, x 640 drivers/gpu/drm/amd/display/dc/core/dc_stream.c stream->src.x, x 644 drivers/gpu/drm/amd/display/dc/core/dc_stream.c stream->dst.x, x 112 drivers/gpu/drm/amd/display/dc/dc_hw_types.h int x; x 412 drivers/gpu/drm/amd/display/dc/dc_hw_types.h uint32_t x; x 58 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c CURSOR_X_POSITION, position->x, x 406 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c hw_rect.x = in_rect->y; x 407 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c hw_rect.y = in_rect->x; x 414 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_X_START, hw_rect.x); x 717 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c uint32_t x = dc_fixpt_floor( x 723 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c x), x 728 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c DP_MSE_RATE_X, x, x 154 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c - data->recout.x - data->recout.width; x 173 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c EXT_OVERSCAN_LEFT, data->recout.x, x 240 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c VIEWPORT_X_START, view_port->x, x 336 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (!convert_to_custom_float_format(arr_points[0].x, &fmt, x 357 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (!convert_to_custom_float_format(arr_points[1].x, &fmt, x 517 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c arr_points[0].x = dc_fixpt_pow(dc_fixpt_from_int(2), x 519 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c arr_points[1].x = dc_fixpt_pow(dc_fixpt_from_int(2), x 530 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c arr_points[0].x); x 553 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c dc_fixpt_sub(end_value, arr_points[1].x)); x 2548 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_state->src_rect.x, x 2552 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_state->dst_rect.x, x 2556 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_state->clip_rect.x, x 2568 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_res.scl_data.viewport.x, x 2572 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_res.scl_data.recout.x, x 240 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c swap(local_size.surface_size.x, x 244 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c swap(local_size.chroma_size.x, x 300 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, local_size.surface_size.x + x 309 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, local_size.chroma_size.x + x 55 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c luma_viewport->x = scl_data->viewport.x - scl_data->viewport.x % 2; x 61 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c chroma_viewport->x = luma_viewport->x; x 72 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c chroma_viewport->x = luma_viewport->x / 2; x 93 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c luma_view_port->x, x 123 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c chroma_view_port->x, x 237 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c int overscan_right = data->h_active - data->recout.x - data->recout.width; x 254 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c set_reg_field_value(overscan_left_right, data->recout.x, x 147 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c if (!convert_to_custom_float_format(corner_points[0].red.x, &fmt, x 152 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c if (!convert_to_custom_float_format(corner_points[0].green.x, &fmt, x 157 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c if (!convert_to_custom_float_format(corner_points[0].blue.x, &fmt, x 198 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c if (!convert_to_custom_float_format(corner_points[1].red.x, &fmt, x 203 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c if (!convert_to_custom_float_format(corner_points[1].green.x, &fmt, x 208 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c if (!convert_to_custom_float_format(corner_points[1].blue.x, &fmt, x 401 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].red.x = dc_fixpt_pow(dc_fixpt_from_int(2), x 403 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].green.x = corner_points[0].red.x; x 404 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].blue.x = corner_points[0].red.x; x 406 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[1].red.x = dc_fixpt_pow(dc_fixpt_from_int(2), x 408 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[1].green.x = corner_points[1].red.x; x 409 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[1].blue.x = corner_points[1].red.x; x 416 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].red.x); x 418 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].green.x); x 420 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].blue.x); x 441 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c dc_fixpt_sub(end_value, corner_points[1].red.x)); x 444 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c dc_fixpt_sub(end_value, corner_points[1].green.x)); x 447 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c dc_fixpt_sub(end_value, corner_points[1].blue.x)); x 566 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].red.x = dc_fixpt_pow(dc_fixpt_from_int(2), x 568 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].green.x = corner_points[0].red.x; x 569 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[0].blue.x = corner_points[0].red.x; x 570 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[1].red.x = dc_fixpt_pow(dc_fixpt_from_int(2), x 572 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[1].green.x = corner_points[1].red.x; x 573 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c corner_points[1].blue.x = corner_points[1].red.x; x 598 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c dc_fixpt_sub(end_value, corner_points[1].red.x)); x 601 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c dc_fixpt_sub(end_value, corner_points[1].green.x)); x 604 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c dc_fixpt_sub(end_value, corner_points[1].blue.x)); x 456 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c int src_x_offset = pos->x - pos->x_hotspot - param->viewport.x; x 464 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c src_x_offset = pos->x - pos->y_hotspot - param->viewport.x; x 468 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c src_x_offset = pos->x - param->viewport.x; x 92 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c uint32_t left = data->recout.x; x 95 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c int right = data->h_active - data->recout.x - data->recout.width; x 652 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c RECOUT_START_X, recout->x, x 824 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c PRI_VIEWPORT_X_START, viewport->x, x 833 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c SEC_VIEWPORT_X_START, viewport->x, x 842 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c PRI_VIEWPORT_X_START_C, viewport_c->x, x 1129 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c int src_x_offset = pos->x - pos->x_hotspot - param->viewport.x; x 1147 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c src_x_offset = pos->y - pos->y_hotspot - param->viewport.x; x 1154 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c src_x_offset = param->viewport.x + param->viewport.width - src_x_offset; x 1187 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c CURSOR_X_POSITION, pos->x, x 2968 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c uint32_t x_plane = pipe_ctx->plane_state->dst_rect.x; x 2970 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c uint32_t x_offset = min(x_plane, pos_cpy.x); x 2973 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.x -= x_offset; x 2984 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c uint32_t temp_x = pos_cpy.x; x 2985 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.x = pipe_ctx->plane_res.scl_data.viewport.width - x 2986 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c (pos_cpy.y - pipe_ctx->plane_res.scl_data.viewport.x) + pipe_ctx->plane_res.scl_data.viewport.x; x 2992 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (pos_cpy.x > pipe_ctx->plane_res.scl_data.viewport.height) { x 2993 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.x = pos_cpy.x - pipe_ctx->plane_res.scl_data.viewport.height; x 2994 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.y = pipe_ctx->plane_res.scl_data.viewport.height - pos_cpy.x; x 2996 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.y = 2 * pipe_ctx->plane_res.scl_data.viewport.height - pos_cpy.x; x 2998 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.x = temp_y; x 3002 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (pos_cpy.x >= pipe_ctx->plane_res.scl_data.viewport.width + pipe_ctx->plane_res.scl_data.viewport.x) { x 3003 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.x = 2 * pipe_ctx->plane_res.scl_data.viewport.width x 3004 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c - pos_cpy.x + 2 * pipe_ctx->plane_res.scl_data.viewport.x; x 3006 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c uint32_t temp_x = pos_cpy.x; x 3007 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.x = 2 * pipe_ctx->plane_res.scl_data.viewport.x - pos_cpy.x; x 3008 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (temp_x >= pipe_ctx->plane_res.scl_data.viewport.x + (int)hubp->curs_attr.width x 3009 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c || pos_cpy.x <= (int)hubp->curs_attr.width + pipe_ctx->plane_state->src_rect.x) { x 3010 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pos_cpy.x = temp_x + pipe_ctx->plane_res.scl_data.viewport.width; x 629 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c uint32_t x = dc_fixpt_floor( x 635 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c x), x 639 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c DP_MSE_RATE_X, x, x 944 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c int src_x_offset = pos->x - pos->x_hotspot - param->viewport.x; x 967 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c src_x_offset = pos->x - pos->y_hotspot - param->viewport.x; x 971 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c src_x_offset = pos->x - param->viewport.x; x 977 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c src_x_offset = param->viewport.x + param->viewport.width - src_x_offset; x 1010 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c CURSOR_X_POSITION, pos->x, x 1759 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (sd->recout.x + 16 >= sd->h_active) x 1761 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c new_width = sd->h_active - sd->recout.x; x 1775 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c new_width = sd->recout.width + sd->recout.x - sd->h_active; x 1781 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c sd->viewport.x += dc_fixpt_floor(dc_fixpt_mul_int( x 1782 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c sd->ratios.horz, sd->h_active - sd->recout.x)); x 1783 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c sd->viewport_c.x += dc_fixpt_floor(dc_fixpt_mul_int( x 1784 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c sd->ratios.horz_c, sd->h_active - sd->recout.x)); x 1785 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c sd->recout.x = 0; x 3270 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c #define fixed16_to_double(x) (((double) x) / ((double) (1 << 16))) x 3271 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c #define fixed16_to_double_to_cpu(x) fixed16_to_double(le32_to_cpu(x)) x 78 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h static inline int dml_log2(double x) x 80 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h return dml_round((double)dcn_bw_log(x, 2)); x 98 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h static inline double dml_ceil_ex(double x, double granularity) x 100 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h return (double) dcn_bw_ceil2(x, granularity); x 103 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h static inline double dml_floor_ex(double x, double granularity) x 105 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h return (double) dcn_bw_floor2(x, granularity); x 108 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h static inline double dml_log(double x, double base) x 110 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h return (double) dcn_bw_log(x, base); x 31 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h #define BW_FIXED_GET_INTEGER_PART(x) ((x) >> BW_FIXED_BITS_PER_FRACTIONAL_PART) x 49 drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h struct fixed31_32 x; x 144 drivers/gpu/drm/amd/display/dc/inc/hw/opp.h struct fixed31_32 x; x 81 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coordinates_x[MAX_HW_POINTS].x = region_size; x 82 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coordinates_x[MAX_HW_POINTS + 1].x = region_size; x 89 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coordinates_x[seg_offset].x = region_size; x 94 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coordinates_x[index].x = dc_fixpt_add x 95 drivers/gpu/drm/amd/display/modules/color/color_gamma.c (coordinates_x[index-1].x, increment); x 108 drivers/gpu/drm/amd/display/modules/color/color_gamma.c LOG_GAMMA_WRITE("%llu\n", coordinates_x[i].x.value); x 186 drivers/gpu/drm/amd/display/modules/color/color_gamma.c struct fixed31_32 x; x 196 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_mul(in_x, in_x); x 197 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_div_int(x, 3); x 199 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_sub(in_x, c); x 200 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_div(x, a); x 201 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_exp(x); x 202 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_add(x, b); x 203 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_div_int(x, 12); x 205 drivers/gpu/drm/amd/display/modules/color/color_gamma.c *out_y = dc_fixpt_mul(x, scaling_factor); x 217 drivers/gpu/drm/amd/display/modules/color/color_gamma.c struct fixed31_32 x; x 225 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_mul(in_x, scaling_factor); x 228 drivers/gpu/drm/amd/display/modules/color/color_gamma.c if (dc_fixpt_lt(x, threshold)) { x 229 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_mul(x, dc_fixpt_from_fraction(3, 1)); x 230 drivers/gpu/drm/amd/display/modules/color/color_gamma.c *out_y = dc_fixpt_pow(x, dc_fixpt_half); x 232 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_mul(x, dc_fixpt_from_fraction(12, 1)); x 233 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_sub(x, b); x 234 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_log(x); x 235 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_mul(a, x); x 236 drivers/gpu/drm/amd/display/modules/color/color_gamma.c *out_y = dc_fixpt_add(x, c); x 245 drivers/gpu/drm/amd/display/modules/color/color_gamma.c struct fixed31_32 x; x 255 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_mul(coord_x->x, scaling_factor); x 256 drivers/gpu/drm/amd/display/modules/color/color_gamma.c compute_pq(x, &pq_table[i]); x 280 drivers/gpu/drm/amd/display/modules/color/color_gamma.c compute_de_pq(coordinates_x[i].x, &y); x 697 drivers/gpu/drm/amd/display/modules/color/color_gamma.c struct fixed31_32 x; x 721 drivers/gpu/drm/amd/display/modules/color/color_gamma.c x = dc_fixpt_mul(coord_x->x, scaling_factor); x 722 drivers/gpu/drm/amd/display/modules/color/color_gamma.c compute_pq(x, &output); x 792 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coord_x->x, coeff, 0); x 941 drivers/gpu/drm/amd/display/modules/color/color_gamma.c scaledX1 = dc_fixpt_div(coord_x->x, x 946 drivers/gpu/drm/amd/display/modules/color/color_gamma.c scaledX = dc_fixpt_div(coord_x->x, x 1007 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coordinate_x[i].x, &coeff, 0); x 1040 drivers/gpu/drm/amd/display/modules/color/color_gamma.c compute_hlg_eotf(coord_x->x, &rgb->r, sdr_white_level, max_luminance_nits); x 1064 drivers/gpu/drm/amd/display/modules/color/color_gamma.c compute_hlg_oetf(coord_x->x, &rgb->r, sdr_white_level, max_luminance_nits); x 1515 drivers/gpu/drm/amd/display/modules/color/color_gamma.c hw_x = coordinates_x[i].x; x 1584 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coord_x->x, &coeff, 0); x 1794 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coord_x->x, &coeff, 0); x 1796 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coord_x->x, &coeff, 1); x 1798 drivers/gpu/drm/amd/display/modules/color/color_gamma.c coord_x->x, &coeff, 2); x 1955 drivers/gpu/drm/amd/display/modules/color/color_gamma.c curve[i].r = coordinates_x[i].x; x 2007 drivers/gpu/drm/amd/display/modules/color/color_gamma.c points->red[i] = coordinates_x[i].x; x 2008 drivers/gpu/drm/amd/display/modules/color/color_gamma.c points->green[i] = coordinates_x[i].x; x 2009 drivers/gpu/drm/amd/display/modules/color/color_gamma.c points->blue[i] = coordinates_x[i].x; x 2102 drivers/gpu/drm/amd/display/modules/color/color_gamma.c points->red[i] = coordinates_x[i].x; x 2103 drivers/gpu/drm/amd/display/modules/color/color_gamma.c points->green[i] = coordinates_x[i].x; x 2104 drivers/gpu/drm/amd/display/modules/color/color_gamma.c points->blue[i] = coordinates_x[i].x; x 56 drivers/gpu/drm/amd/powerplay/inc/cz_ppsmc.h #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x)) x 96 drivers/gpu/drm/amd/powerplay/inc/fiji_ppsmc.h #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x)) x 93 drivers/gpu/drm/amd/powerplay/inc/smu7_ppsmc.h #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x)) x 99 drivers/gpu/drm/amd/powerplay/inc/tonga_ppsmc.h #define PPSMC_isERROR(x) ((uint16_t)0x80 & (x)) x 43 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c #define SIZE_ALIGN_32(x) (((x) + 31) / 32 * 32) x 19 drivers/gpu/drm/arc/arcpgu.h #define crtc_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, crtc) x 21 drivers/gpu/drm/arc/arcpgu_crtc.c #define ENCODE_PGU_XY(x, y) ((((x) - 1) << 16) | ((y) - 1)) x 44 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h #define to_d71_pipeline(x) container_of(x, struct d71_pipeline, base) x 35 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define BLOCK_INFO_N_SUBBLKS(x) ((x) & 0x000F) x 36 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define BLOCK_INFO_BLK_ID(x) (((x) & 0x00F0) >> 4) x 37 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define BLOCK_INFO_BLK_TYPE(x) (((x) & 0xFF00) >> 8) x 38 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define BLOCK_INFO_INPUT_ID(x) ((x) & 0xFFF0) x 39 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define BLOCK_INFO_TYPE_ID(x) (((x) & 0x0FF0) >> 4) x 41 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define PIPELINE_INFO_N_OUTPUTS(x) ((x) & 0x000F) x 42 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define PIPELINE_INFO_N_VALID_INPUTS(x) (((x) & 0x0F00) >> 8) x 71 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define GCU_CONTROL_MODE(x) ((x) & 0x7) x 119 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define GCU_STATUS_MODE(x) ((x) & 0x7) x 143 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_RAXI_AOUTSTDCAPB(x) (x) x 144 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_RAXI_BOUTSTDCAPB(x) ((x) << 8) x 145 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_RAXI_BEN(x) ((x) << 15) x 146 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_xAXI_BURSTLEN(x) ((x) << 16) x 147 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_xAXI_AxQOS(x) ((x) << 24) x 148 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_xAXI_ORD(x) ((x) << 31) x 149 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_WAXI_OUTSTDCAPB(x) (x) x 160 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_TBU_DOUTSTDCAPB(x) (x) x 170 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define LPU_STATUS_AXIED(x) ((x) & 0xF) x 186 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define TO_AXIE(x) ((x) << 4) x 245 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define CU_INPUT_CTRL_ALPHA(x) (((x) & 0xFF) << 8) x 281 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define L_ROT(x) (((x) & 3) << 8) x 285 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define L_A_RCACHE(x) (((x) & 0xF) << 28) x 297 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define L_ITSEL(x) ((x) & 0xFFF) x 298 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define L_FTSEL(x) (((x) & 0xFFF) << 16) x 308 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define LW_LALPHA(x) (((x) & 0xFF) << 8) x 309 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define LW_A_WCACHE(x) (((x) & 0xF) << 28) x 323 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define L_INFO_ABUF_SIZE(x) (((x) >> 4) & 0x7) x 403 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define BS_SYNC_HSW(x) ((x) & 0x3FF) x 405 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define BS_SYNC_VSW(x) (((x) & 0xFF) << 16) x 451 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define SC_COEFF_DATA(x, y) (((y) & 0xFFFF) | (((x) & 0xFFFF) << 16)) x 23 drivers/gpu/drm/arm/display/komeda/komeda_dev.c static int komeda_register_show(struct seq_file *sf, void *x) x 15 drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h #define AFBC(x) DRM_FORMAT_MOD_ARM_AFBC(x) x 18 drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h #define AFBC_16x16(x) AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | (x)) x 19 drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h #define AFBC_32x8(x) AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 | (x)) x 239 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) x 256 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c plane_x = x / (plane ? fb->format->hsub : 1); x 44 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane); x 134 drivers/gpu/drm/arm/display/komeda/komeda_kms.h #define to_wb_conn(x) container_of(x, struct drm_writeback_connector, base) x 22 drivers/gpu/drm/arm/hdlcd_drv.h #define crtc_to_hdlcd_priv(x) container_of(x, struct hdlcd_drm_private, crtc) x 47 drivers/gpu/drm/arm/malidp_drv.h #define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc) x 73 drivers/gpu/drm/arm/malidp_drv.h #define to_malidp_plane(x) container_of(x, struct malidp_plane, base) x 74 drivers/gpu/drm/arm/malidp_drv.h #define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base) x 85 drivers/gpu/drm/arm/malidp_drv.h #define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base) x 31 drivers/gpu/drm/arm/malidp_planes.c #define LAYER_FLOWCFG(x) (((x) & LAYER_FLOWCFG_MASK) << 1) x 43 drivers/gpu/drm/arm/malidp_planes.c #define LAYER_ALPHA(x) (((x) & LAYER_ALPHA_MASK) << LAYER_ALPHA_OFFSET) x 46 drivers/gpu/drm/arm/malidp_planes.c #define LAYER_H_VAL(x) (((x) & 0x1fff) << 0) x 47 drivers/gpu/drm/arm/malidp_planes.c #define LAYER_V_VAL(x) (((x) & 0x1fff) << 16) x 96 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_DE_H_FRONTPORCH(x) (((x) & 0xfff) << 0) x 97 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_DE_H_BACKPORCH(x) (((x) & 0x3ff) << 16) x 98 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP500_DE_V_FRONTPORCH(x) (((x) & 0xff) << 0) x 99 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP550_DE_V_FRONTPORCH(x) (((x) & 0xfff) << 0) x 100 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_DE_V_BACKPORCH(x) (((x) & 0xff) << 16) x 101 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_DE_H_SYNCWIDTH(x) (((x) & 0x3ff) << 0) x 102 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_DE_V_SYNCWIDTH(x) (((x) & 0xff) << 16) x 103 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_DE_H_ACTIVE(x) (((x) & 0x1fff) << 0) x 104 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_DE_V_ACTIVE(x) (((x) & 0x1fff) << 16) x 117 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_ENH(x) (((x) & MALIDP_SE_ENH_MASK) << 2) x 120 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP550_SE_CTL_VCSEL(x) \ x 121 drivers/gpu/drm/arm/malidp_regs.h (((x) & MALIDP550_SE_CTL_SEL_MASK) << 20) x 122 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP550_SE_CTL_HCSEL(x) \ x 123 drivers/gpu/drm/arm/malidp_regs.h (((x) & MALIDP550_SE_CTL_SEL_MASK) << 16) x 129 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_SET_V_SIZE(x) (((x) & 0x1fff) << 16) x 130 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_SET_H_SIZE(x) (((x) & 0x1fff) << 0) x 140 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_SET_V_COEFFTAB_ADDR(x) \ x 141 drivers/gpu/drm/arm/malidp_regs.h (MALIDP_SE_V_COEFFTAB | ((x) & MALIDP_SE_COEFFTAB_ADDR_MASK)) x 142 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_SET_H_COEFFTAB_ADDR(x) \ x 143 drivers/gpu/drm/arm/malidp_regs.h (MALIDP_SE_H_COEFFTAB | ((x) & MALIDP_SE_COEFFTAB_ADDR_MASK)) x 146 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_SET_COEFFTAB_DATA(x) \ x 147 drivers/gpu/drm/arm/malidp_regs.h ((x) & MALIDP_SE_COEFFTAB_DATA_MASK) x 154 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_SET_ENH_LIMIT_LOW(x) \ x 155 drivers/gpu/drm/arm/malidp_regs.h ((x) & MALIDP_SE_ENH_LIMIT_MASK) x 156 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_SE_SET_ENH_LIMIT_HIGH(x) \ x 157 drivers/gpu/drm/arm/malidp_regs.h (((x) & MALIDP_SE_ENH_LIMIT_MASK) << 16) x 260 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_MMU_CTRL_PX_PS(x) (1 << (8 + (x))) x 261 drivers/gpu/drm/arm/malidp_regs.h #define MALIDP_MMU_CTRL_PP_NUM_REQ(x) (((x) & 0x7f) << 12) x 550 drivers/gpu/drm/armada/armada_crtc.c unsigned x; x 552 drivers/gpu/drm/armada/armada_crtc.c for (x = 0; x < width; x++, p++) { x 741 drivers/gpu/drm/armada/armada_crtc.c static int armada_drm_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) x 750 drivers/gpu/drm/armada/armada_crtc.c dcrtc->cursor_x = x; x 43 drivers/gpu/drm/armada/armada_plane.c unsigned int x = state->src.x1 >> 16; x 49 drivers/gpu/drm/armada/armada_plane.c fb->pitches[0], x, y, format->cpp[0] * 8); x 55 drivers/gpu/drm/armada/armada_plane.c x * format->cpp[0]; x 59 drivers/gpu/drm/armada/armada_plane.c x /= format->hsub; x 63 drivers/gpu/drm/armada/armada_plane.c x * format->cpp[i]; x 76 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK) x 80 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_H_TOTAL(x) (x) x 81 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_H_DE(x) ((x) << 16) x 84 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_H_RS_START(x) (x) x 85 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_H_RS_END(x) ((x) << 16) x 88 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_V_TOTAL(x) (x) x 89 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_V_DE(x) ((x) << 16) x 92 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_V_RS_START(x) (x) x 93 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_V_RS_END(x) ((x) << 16) x 96 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_DISP_OFFSET(x) (x) x 97 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_TERM_COUNT(x) ((x) << 16) x 100 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_THROD_LOW(x) (x) x 101 drivers/gpu/drm/aspeed/aspeed_gfx.h #define CRT_THROD_HIGH(x) ((x) << 8) x 134 drivers/gpu/drm/ast/ast_drv.h #define __ast_read(x) \ x 135 drivers/gpu/drm/ast/ast_drv.h static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ x 136 drivers/gpu/drm/ast/ast_drv.h u##x val = 0;\ x 137 drivers/gpu/drm/ast/ast_drv.h val = ioread##x(ast->regs + reg); \ x 145 drivers/gpu/drm/ast/ast_drv.h #define __ast_io_read(x) \ x 146 drivers/gpu/drm/ast/ast_drv.h static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ x 147 drivers/gpu/drm/ast/ast_drv.h u##x val = 0;\ x 148 drivers/gpu/drm/ast/ast_drv.h val = ioread##x(ast->ioregs + reg); \ x 156 drivers/gpu/drm/ast/ast_drv.h #define __ast_write(x) \ x 157 drivers/gpu/drm/ast/ast_drv.h static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ x 158 drivers/gpu/drm/ast/ast_drv.h iowrite##x(val, ast->regs + reg);\ x 165 drivers/gpu/drm/ast/ast_drv.h #define __ast_io_write(x) \ x 166 drivers/gpu/drm/ast/ast_drv.h static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ x 167 drivers/gpu/drm/ast/ast_drv.h iowrite##x(val, ast->ioregs + reg);\ x 239 drivers/gpu/drm/ast/ast_drv.h #define to_ast_crtc(x) container_of(x, struct ast_crtc, base) x 240 drivers/gpu/drm/ast/ast_drv.h #define to_ast_connector(x) container_of(x, struct ast_connector, base) x 241 drivers/gpu/drm/ast/ast_drv.h #define to_ast_encoder(x) container_of(x, struct ast_encoder, base) x 52 drivers/gpu/drm/ast/ast_mode.c int x, int y); x 530 drivers/gpu/drm/ast/ast_mode.c int x, int y, int atomic) x 562 drivers/gpu/drm/ast/ast_mode.c static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, x 565 drivers/gpu/drm/ast/ast_mode.c return ast_crtc_do_set_base(crtc, old_fb, x, y, 0); x 571 drivers/gpu/drm/ast/ast_mode.c int x, int y, x 598 drivers/gpu/drm/ast/ast_mode.c ast_crtc_mode_set_base(crtc, x, y, old_fb); x 1252 drivers/gpu/drm/ast/ast_mode.c int x, int y) x 1262 drivers/gpu/drm/ast/ast_mode.c writel(x, sig + AST_HWC_SIGNATURE_X); x 1267 drivers/gpu/drm/ast/ast_mode.c if (x < 0) { x 1268 drivers/gpu/drm/ast/ast_mode.c x_offset = (-x) + ast_crtc->offset_x; x 1269 drivers/gpu/drm/ast/ast_mode.c x = 0; x 1278 drivers/gpu/drm/ast/ast_mode.c ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff)); x 1279 drivers/gpu/drm/ast/ast_mode.c ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f)); x 230 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c .x = 17, x 348 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c .x = 17, x 443 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c .x = 17, x 93 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h #define ATMEL_HLCDC_LAYER_POS(x, y) ((x) | ((y) << 16)) x 111 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h #define ATMEL_HLCDC_LAYER_GA(x) \ x 112 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h ((x) << ATMEL_HLCDC_LAYER_GA_SHIFT) x 114 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h #define ATMEL_HLCDC_LAYER_DISC_POS(x, y) ((x) | ((y) << 16)) x 117 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h #define ATMEL_HLCDC_LAYER_SCALER_FACTORS(x, y) ((x) | ((y) << 16)) x 172 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h int x; x 298 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (desc->layout.phicoeffs.x) { x 312 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c desc->layout.phicoeffs.x); x 87 drivers/gpu/drm/bochs/bochs.h int x, int y, int stride, u64 addr); x 260 drivers/gpu/drm/bochs/bochs_hw.c int x, int y, int stride, u64 addr) x 268 drivers/gpu/drm/bochs/bochs_hw.c x * (bochs->bpp / 8); x 274 drivers/gpu/drm/bochs/bochs_hw.c x, y, addr, offset, vx, vy); x 44 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_CSC_UPPER(x) (0x18 + (x) * 2) x 45 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_CSC_LOWER(x) (0x19 + (x) * 2) x 46 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_SYNC_DECODER(x) (0x30 + (x)) x 47 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_DE_GENERATOR (0x35 + (x)) x 62 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */ x 66 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */ x 70 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */ x 71 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_INT_ENABLE(x) (0x94 + (x)) x 72 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_INT(x) (0x96 + (x)) x 77 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */ x 80 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */ x 84 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */ x 89 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */ x 195 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET(p, x) ((p) * 0x20 + (x)) x 196 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET_SDP(x) ADV7511_PACKET(0, x) x 197 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET_MPEG(x) ADV7511_PACKET(1, x) x 198 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET_ACP(x) ADV7511_PACKET(2, x) x 199 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET_ISRC1(x) ADV7511_PACKET(3, x) x 200 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET_ISRC2(x) ADV7511_PACKET(4, x) x 201 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET_GM(x) ADV7511_PACKET(5, x) x 202 drivers/gpu/drm/bridge/adv7511/adv7511.h #define ADV7511_PACKET_SPARE(x) ADV7511_PACKET(6, x) x 25 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h #define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1) x 26 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h #define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f) x 29 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h #define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f) x 32 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h #define DPCD_PRE_EMPHASIS_SET(x) (((x) & 0x3) << 3) x 33 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h #define DPCD_PRE_EMPHASIS_GET(x) (((x) >> 3) & 0x3) x 34 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h #define DPCD_VOLTAGE_SWING_SET(x) (((x) & 0x3) << 0) x 35 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h #define DPCD_VOLTAGE_SWING_GET(x) (((x) >> 0) & 0x3) x 175 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define VID_HRES_TH(x) (((x) & 0xf) << 4) x 176 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define VID_VRES_TH(x) (((x) & 0xf) << 0) x 237 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define AUX_BIT_PERIOD_EXPECTED_DELAY(x) (((x) & 0x7) << 8) x 243 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define AUX_HW_RETRY_COUNT_SEL(x) (((x) & 0x7) << 0) x 292 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define CHA_CRI(x) (((x) & 0xf) << 4) x 367 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define DEFER_COUNT(x) (((x) & 0x7f) << 0) x 375 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define BUF_DATA_COUNT(x) (((x) & 0x1f) << 0) x 378 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define AUX_LENGTH(x) (((x - 1) & 0xf) << 4) x 387 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define AUX_ADDR_7_0(x) (((x) >> 0) & 0xff) x 390 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define AUX_ADDR_15_8(x) (((x) >> 8) & 0xff) x 393 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h #define AUX_ADDR_19_16(x) (((x) >> 16) & 0x0f) x 30 drivers/gpu/drm/bridge/cdns-dsi.c #define SP_HS_FIFO_DEPTH(x) (((x) & GENMASK(30, 26)) >> 26) x 31 drivers/gpu/drm/bridge/cdns-dsi.c #define SP_LP_FIFO_DEPTH(x) (((x) & GENMASK(25, 21)) >> 21) x 32 drivers/gpu/drm/bridge/cdns-dsi.c #define VRS_FIFO_DEPTH(x) (((x) & GENMASK(20, 16)) >> 16) x 33 drivers/gpu/drm/bridge/cdns-dsi.c #define DIRCMD_FIFO_DEPTH(x) (((x) & GENMASK(15, 13)) >> 13) x 38 drivers/gpu/drm/bridge/cdns-dsi.c #define INTERNAL_DATAPATH_SIZE ((x) & GENMASK(11, 10)) x 39 drivers/gpu/drm/bridge/cdns-dsi.c #define NUM_IFACE(x) ((((x) & GENMASK(9, 8)) >> 8) + 1) x 40 drivers/gpu/drm/bridge/cdns-dsi.c #define MAX_LANE_NB(x) (((x) & GENMASK(7, 6)) >> 6) x 41 drivers/gpu/drm/bridge/cdns-dsi.c #define RX_FIFO_DEPTH(x) ((x) & GENMASK(5, 0)) x 53 drivers/gpu/drm/bridge/cdns-dsi.c #define IF_TE_EN(x) BIT(8 + (x)) x 56 drivers/gpu/drm/bridge/cdns-dsi.c #define IF_VID_SELECT(x) ((x) << 2) x 62 drivers/gpu/drm/bridge/cdns-dsi.c #define HS_INVERT_DAT(x) BIT(19 + ((x) * 2)) x 63 drivers/gpu/drm/bridge/cdns-dsi.c #define SWAP_PINS_DAT(x) BIT(18 + ((x) * 2)) x 67 drivers/gpu/drm/bridge/cdns-dsi.c #define WAIT_BURST_TIME(x) ((x) << 10) x 68 drivers/gpu/drm/bridge/cdns-dsi.c #define DATA_ULPM_EN(x) BIT(6 + (x)) x 71 drivers/gpu/drm/bridge/cdns-dsi.c #define DATA_LANE_EN(x) BIT((x) - 1) x 76 drivers/gpu/drm/bridge/cdns-dsi.c #define IF_EN(x) BIT(13 + (x)) x 79 drivers/gpu/drm/bridge/cdns-dsi.c #define DATA_LANE_START(x) BIT(4 + (x)) x 85 drivers/gpu/drm/bridge/cdns-dsi.c #define DPHY_D_RSTB(x) GENMASK(15 + (x), 16) x 89 drivers/gpu/drm/bridge/cdns-dsi.c #define DPHY_D_PDN(x) GENMASK(3 + (x), 4) x 95 drivers/gpu/drm/bridge/cdns-dsi.c #define HSTX_TIMEOUT(x) ((x) << 4) x 97 drivers/gpu/drm/bridge/cdns-dsi.c #define CLK_DIV(x) (x) x 101 drivers/gpu/drm/bridge/cdns-dsi.c #define LPRX_TIMEOUT(x) (x) x 104 drivers/gpu/drm/bridge/cdns-dsi.c #define DATA_LANE_ULPOUT_TIME(x) ((x) << 9) x 105 drivers/gpu/drm/bridge/cdns-dsi.c #define CLK_LANE_ULPOUT_TIME(x) (x) x 123 drivers/gpu/drm/bridge/cdns-dsi.c #define IF_UNTERM_PKT_ERR(x) BIT(8 + (x)) x 134 drivers/gpu/drm/bridge/cdns-dsi.c #define ERR_CONT_LP(x, l) BIT(18 + ((x) * 4) + (l)) x 140 drivers/gpu/drm/bridge/cdns-dsi.c #define ERR_CONT_LP_EDGE(x, l) BIT(12 + ((x) * 4) + (l)) x 148 drivers/gpu/drm/bridge/cdns-dsi.c #define PPI_D_RX_ULPS_ESC(x) (((x) & GENMASK(15, 12)) >> 12) x 173 drivers/gpu/drm/bridge/cdns-dsi.c #define IF_LP_EN(x) BIT(9 + (x)) x 174 drivers/gpu/drm/bridge/cdns-dsi.c #define IF_VCHAN_ID(x, c) ((c) << ((x) * 2)) x 177 drivers/gpu/drm/bridge/cdns-dsi.c #define TE_TIMEOUT(x) ((x) << 11) x 178 drivers/gpu/drm/bridge/cdns-dsi.c #define FILL_VALUE(x) ((x) << 3) x 179 drivers/gpu/drm/bridge/cdns-dsi.c #define ARB_IF_WITH_HIGHEST_PRIORITY(x) ((x) << 1) x 186 drivers/gpu/drm/bridge/cdns-dsi.c #define ERR_IF_UNDERRUN(x) BIT(4 + (x)) x 195 drivers/gpu/drm/bridge/cdns-dsi.c #define TRIGGER_VAL(x) ((x) << 25) x 197 drivers/gpu/drm/bridge/cdns-dsi.c #define CMD_SIZE(x) ((x) << 16) x 198 drivers/gpu/drm/bridge/cdns-dsi.c #define CMD_VCHAN_ID(x) ((x) << 14) x 199 drivers/gpu/drm/bridge/cdns-dsi.c #define CMD_DATATYPE(x) ((x) << 8) x 256 drivers/gpu/drm/bridge/cdns-dsi.c #define RECOVERY_MODE(x) ((x) << 25) x 260 drivers/gpu/drm/bridge/cdns-dsi.c #define REG_BLKEOL_MODE(x) ((x) << 23) x 261 drivers/gpu/drm/bridge/cdns-dsi.c #define REG_BLKLINE_MODE(x) ((x) << 21) x 280 drivers/gpu/drm/bridge/cdns-dsi.c #define VID_DATATYPE(x) ((x) << 8) x 281 drivers/gpu/drm/bridge/cdns-dsi.c #define VID_VIRTCHAN_ID(iface, x) ((x) << (4 + (iface) * 2)) x 282 drivers/gpu/drm/bridge/cdns-dsi.c #define STOP_MODE(x) ((x) << 2) x 283 drivers/gpu/drm/bridge/cdns-dsi.c #define START_MODE(x) (x) x 286 drivers/gpu/drm/bridge/cdns-dsi.c #define VFP_LEN(x) ((x) << 12) x 287 drivers/gpu/drm/bridge/cdns-dsi.c #define VBP_LEN(x) ((x) << 6) x 288 drivers/gpu/drm/bridge/cdns-dsi.c #define VSA_LEN(x) (x) x 291 drivers/gpu/drm/bridge/cdns-dsi.c #define VACT_LEN(x) (x) x 294 drivers/gpu/drm/bridge/cdns-dsi.c #define HBP_LEN(x) ((x) << 16) x 295 drivers/gpu/drm/bridge/cdns-dsi.c #define HSA_LEN(x) (x) x 298 drivers/gpu/drm/bridge/cdns-dsi.c #define HFP_LEN(x) ((x) << 16) x 299 drivers/gpu/drm/bridge/cdns-dsi.c #define HACT_LEN(x) (x) x 302 drivers/gpu/drm/bridge/cdns-dsi.c #define BLK_EOL_PKT_LEN(x) ((x) << 15) x 303 drivers/gpu/drm/bridge/cdns-dsi.c #define BLK_LINE_EVENT_PKT_LEN(x) (x) x 306 drivers/gpu/drm/bridge/cdns-dsi.c #define BLK_LINE_PULSE_PKT_LEN(x) (x) x 309 drivers/gpu/drm/bridge/cdns-dsi.c #define BLK_EOL_DURATION(x) (x) x 312 drivers/gpu/drm/bridge/cdns-dsi.c #define REG_WAKEUP_TIME(x) ((x) << 17) x 313 drivers/gpu/drm/bridge/cdns-dsi.c #define REG_LINE_DURATION(x) (x) x 316 drivers/gpu/drm/bridge/cdns-dsi.c #define COL_GREEN(x) ((x) << 12) x 317 drivers/gpu/drm/bridge/cdns-dsi.c #define COL_RED(x) (x) x 320 drivers/gpu/drm/bridge/cdns-dsi.c #define PAD_VAL(x) ((x) << 12) x 321 drivers/gpu/drm/bridge/cdns-dsi.c #define COL_BLUE(x) (x) x 349 drivers/gpu/drm/bridge/cdns-dsi.c #define MAX_BURST_LIMIT(x) (x) x 352 drivers/gpu/drm/bridge/cdns-dsi.c #define MAX_LINE_LIMIT(x) ((x) << 16) x 353 drivers/gpu/drm/bridge/cdns-dsi.c #define EXACT_BURST_LIMIT(x) (x) x 356 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_STRIPE_SIZE(x) ((x) << 5) x 368 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_NBLINES(x) ((x) << 16) x 369 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_LINE_SIZE(x) (x) x 372 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_COL1_GREEN(x) ((x) << 12) x 373 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_COL1_RED(x) (x) x 376 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_COL1_BLUE(x) (x) x 379 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_COL2_GREEN(x) ((x) << 12) x 380 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_COL2_RED(x) (x) x 383 drivers/gpu/drm/bridge/cdns-dsi.c #define TVG_COL2_BLUE(x) (x) x 402 drivers/gpu/drm/bridge/cdns-dsi.c #define DPI_CFG_FIFO_DEPTH(x) ((x) >> 16) x 403 drivers/gpu/drm/bridge/cdns-dsi.c #define DPI_CFG_FIFO_LEVEL(x) ((x) & GENMASK(15, 0)) x 406 drivers/gpu/drm/bridge/cdns-dsi.c #define TEST_STATUS(x) ((x) >> 16) x 407 drivers/gpu/drm/bridge/cdns-dsi.c #define TEST_CTRL(x) (x) x 410 drivers/gpu/drm/bridge/cdns-dsi.c #define REV_VENDOR_ID(x) (((x) & GENMASK(31, 20)) >> 20) x 411 drivers/gpu/drm/bridge/cdns-dsi.c #define REV_PRODUCT_ID(x) (((x) & GENMASK(19, 12)) >> 12) x 412 drivers/gpu/drm/bridge/cdns-dsi.c #define REV_HW(x) (((x) & GENMASK(11, 8)) >> 8) x 413 drivers/gpu/drm/bridge/cdns-dsi.c #define REV_MAJOR(x) (((x) & GENMASK(7, 4)) >> 4) x 414 drivers/gpu/drm/bridge/cdns-dsi.c #define REV_MINOR(x) ((x) & GENMASK(3, 0)) x 98 drivers/gpu/drm/bridge/tc358767.c #define INT_GPIO_H(x) (1 << (x == 0 ? 2 : 10)) x 99 drivers/gpu/drm/bridge/tc358767.c #define INT_GPIO_LC(x) (1 << (x == 0 ? 3 : 11)) x 31 drivers/gpu/drm/bridge/ti-sn65dsi86.c #define REFCLK_FREQ(x) ((x) << 1) x 36 drivers/gpu/drm/bridge/ti-sn65dsi86.c #define CHA_DSI_LANES(x) ((x) << 3) x 55 drivers/gpu/drm/bridge/ti-sn65dsi86.c #define SN_AUX_WDATA_REG(x) (0x64 + (x)) x 62 drivers/gpu/drm/bridge/ti-sn65dsi86.c #define AUX_CMD_REQ(x) ((x) << 4) x 63 drivers/gpu/drm/bridge/ti-sn65dsi86.c #define SN_AUX_RDATA_REG(x) (0x79 + (x)) x 66 drivers/gpu/drm/bridge/ti-sn65dsi86.c #define DP_NUM_LANES(x) ((x) << 4) x 69 drivers/gpu/drm/bridge/ti-sn65dsi86.c #define DP_DATARATE(x) ((x) << 5) x 90 drivers/gpu/drm/cirrus/cirrus_drv.h #define to_cirrus_crtc(x) container_of(x, struct cirrus_crtc, base) x 91 drivers/gpu/drm/cirrus/cirrus_drv.h #define to_cirrus_encoder(x) container_of(x, struct cirrus_encoder, base) x 167 drivers/gpu/drm/cirrus/cirrus_drv.h #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base) x 1407 drivers/gpu/drm/drm_atomic.c primary_state->src_x = set->x << 16; x 1161 drivers/gpu/drm/drm_atomic_helper.c crtc->x = new_plane_state->src_x >> 16; x 29 drivers/gpu/drm/drm_client_modeset.c int x, y; x 335 drivers/gpu/drm/drm_client_modeset.c offsets[idx].x = hoffset; x 780 drivers/gpu/drm/drm_client_modeset.c mode->name, crtc->base.id, offset->x, offset->y); x 791 drivers/gpu/drm/drm_client_modeset.c modeset->x = offset->x; x 386 drivers/gpu/drm/drm_crtc.c crtc_resp->x = plane->state->src_x >> 16; x 400 drivers/gpu/drm/drm_crtc.c crtc_resp->x = crtc->x; x 493 drivers/gpu/drm/drm_crtc.c int x, int y, x 506 drivers/gpu/drm/drm_crtc.c return drm_framebuffer_check_src_coords(x << 16, y << 16, x 548 drivers/gpu/drm/drm_crtc.c if (crtc_req->x & 0xffff0000 || crtc_req->y & 0xffff0000) x 640 drivers/gpu/drm/drm_crtc.c ret = drm_crtc_check_viewport(crtc, crtc_req->x, crtc_req->y, x 701 drivers/gpu/drm/drm_crtc.c set.x = crtc_req->x; x 273 drivers/gpu/drm/drm_crtc_helper.c int x, int y, x 302 drivers/gpu/drm/drm_crtc_helper.c saved_x = crtc->x; x 309 drivers/gpu/drm/drm_crtc_helper.c crtc->x = x; x 368 drivers/gpu/drm/drm_crtc_helper.c ret = !crtc_funcs->mode_set(crtc, mode, adjusted_mode, x, y, old_fb); x 416 drivers/gpu/drm/drm_crtc_helper.c crtc->x = saved_x; x 538 drivers/gpu/drm/drm_crtc_helper.c (int)set->num_connectors, set->x, set->y); x 582 drivers/gpu/drm/drm_crtc_helper.c save_set.x = set->crtc->x; x 599 drivers/gpu/drm/drm_crtc_helper.c if (set->x != set->crtc->x || set->y != set->crtc->y) x 711 drivers/gpu/drm/drm_crtc_helper.c set->x, set->y, x 728 drivers/gpu/drm/drm_crtc_helper.c set->crtc->x = set->x; x 732 drivers/gpu/drm/drm_crtc_helper.c set->x, set->y, save_set.fb); x 734 drivers/gpu/drm/drm_crtc_helper.c set->crtc->x = save_set.x; x 769 drivers/gpu/drm/drm_crtc_helper.c !drm_crtc_helper_set_mode(save_set.crtc, save_set.mode, save_set.x, x 935 drivers/gpu/drm/drm_crtc_helper.c crtc->x, crtc->y, crtc->primary->fb); x 66 drivers/gpu/drm/drm_crtc_internal.h int x, int y, x 1154 drivers/gpu/drm/drm_dp_helper.c #define PSR_SETUP_TIME(x) [DP_PSR_SETUP_TIME_ ## x >> DP_PSR_SETUP_TIME_SHIFT] = (x) x 77 drivers/gpu/drm/drm_dp_mst_topology.c #define DP_STR(x) [DP_ ## x] = #x x 108 drivers/gpu/drm/drm_dp_mst_topology.c #define DP_STR(x) [DP_NAK_ ## x] = #x x 5170 drivers/gpu/drm/drm_edid.c #define C(x) ((x) << 0) x 5171 drivers/gpu/drm/drm_edid.c #define EC(x) ((x) << 2) x 5172 drivers/gpu/drm/drm_edid.c #define ACE(x) ((x) << 5) x 173 drivers/gpu/drm/drm_fb_helper.c mode_set->x, x 218 drivers/gpu/drm/drm_fb_helper.c funcs->mode_set_base_atomic(mode_set->crtc, fb, crtc->x, x 628 drivers/gpu/drm/drm_fb_helper.c static void drm_fb_helper_dirty(struct fb_info *info, u32 x, u32 y, x 639 drivers/gpu/drm/drm_fb_helper.c clip->x1 = min_t(u32, clip->x1, x); x 641 drivers/gpu/drm/drm_fb_helper.c clip->x2 = max_t(u32, clip->x2, x + width); x 1393 drivers/gpu/drm/drm_fb_helper.c static void pan_set(struct drm_fb_helper *fb_helper, int x, int y) x 1399 drivers/gpu/drm/drm_fb_helper.c mode_set->x = x; x 1434 drivers/gpu/drm/drm_fb_helper.c modeset->x = var->xoffset; x 1598 drivers/gpu/drm/drm_fb_helper.c int x, y, j; x 1612 drivers/gpu/drm/drm_fb_helper.c x = mode_set->x; x 1615 drivers/gpu/drm/drm_fb_helper.c sizes.surface_width = max_t(u32, desired_mode->hdisplay + x, sizes.surface_width); x 1630 drivers/gpu/drm/drm_fb_helper.c sizes.fb_width = min_t(u32, desired_mode->hdisplay + x, sizes.fb_width); x 92 drivers/gpu/drm/drm_format_helper.c unsigned int x, y; x 108 drivers/gpu/drm/drm_format_helper.c for (x = clip->x1; x < clip->x2; x++) x 120 drivers/gpu/drm/drm_format_helper.c unsigned int x; x 123 drivers/gpu/drm/drm_format_helper.c for (x = 0; x < pixels; x++) { x 124 drivers/gpu/drm/drm_format_helper.c val16 = ((sbuf[x] & 0x00F80000) >> 8) | x 125 drivers/gpu/drm/drm_format_helper.c ((sbuf[x] & 0x0000FC00) >> 5) | x 126 drivers/gpu/drm/drm_format_helper.c ((sbuf[x] & 0x000000F8) >> 3); x 128 drivers/gpu/drm/drm_format_helper.c dbuf[x] = swab16(val16); x 130 drivers/gpu/drm/drm_format_helper.c dbuf[x] = val16; x 222 drivers/gpu/drm/drm_format_helper.c unsigned int x; x 224 drivers/gpu/drm/drm_format_helper.c for (x = 0; x < pixels; x++) { x 225 drivers/gpu/drm/drm_format_helper.c *dbuf++ = (sbuf[x] & 0x000000FF) >> 0; x 226 drivers/gpu/drm/drm_format_helper.c *dbuf++ = (sbuf[x] & 0x0000FF00) >> 8; x 227 drivers/gpu/drm/drm_format_helper.c *dbuf++ = (sbuf[x] & 0x00FF0000) >> 16; x 291 drivers/gpu/drm/drm_format_helper.c unsigned int x, y; x 310 drivers/gpu/drm/drm_format_helper.c for (x = clip->x1; x < clip->x2; x++) { x 794 drivers/gpu/drm/drm_ioc32.c unsigned long x; x 796 drivers/gpu/drm/drm_ioc32.c if (get_user(x, &argp->handle)) x 798 drivers/gpu/drm/drm_ioc32.c request.handle = x << PAGE_SHIFT; x 217 drivers/gpu/drm/drm_mm.c u64 x = expr(node); \ x 220 drivers/gpu/drm/drm_mm.c if (x < expr(rb_entry(rb, struct drm_mm_node, member))) \ x 241 drivers/gpu/drm/drm_mm.c u64 x = node->hole_size; x 246 drivers/gpu/drm/drm_mm.c if (x > rb_to_hole_size(rb)) { x 894 drivers/gpu/drm/drm_plane.c crtc_x = req->x; x 922 drivers/gpu/drm/drm_plane.c crtc->cursor_x = req->x; x 988 drivers/gpu/drm/drm_plane.c ret = crtc->funcs->cursor_move(crtc, req->x, req->y); x 1150 drivers/gpu/drm/drm_plane.c ret = drm_crtc_check_viewport(crtc, crtc->x, crtc->y, x 161 drivers/gpu/drm/drm_plane_helper.c .x = src_x >> 16, x 82 drivers/gpu/drm/drm_scatter.c # define ScatterHandle(x) (unsigned int)((x >> 32) + (x & ((1L << 32) - 1))) x 84 drivers/gpu/drm/drm_scatter.c # define ScatterHandle(x) (unsigned int)(x) x 81 drivers/gpu/drm/drm_writeback.c #define fence_to_wb_connector(x) container_of(x->lock, \ x 72 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_LOAD_STATE_HEADER_COUNT(x) (((x) << VIV_FE_LOAD_STATE_HEADER_COUNT__SHIFT) & VIV_FE_LOAD_STATE_HEADER_COUNT__MASK) x 75 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_LOAD_STATE_HEADER_OFFSET(x) (((x) << VIV_FE_LOAD_STATE_HEADER_OFFSET__SHIFT) & VIV_FE_LOAD_STATE_HEADER_OFFSET__MASK) x 83 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_END_HEADER_EVENT_ID(x) (((x) << VIV_FE_END_HEADER_EVENT_ID__SHIFT) & VIV_FE_END_HEADER_EVENT_ID__MASK) x 101 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_2D_HEADER_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_COUNT__MASK) x 104 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_2D_HEADER_DATA_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_DATA_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_DATA_COUNT__MASK) x 112 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_2D_TOP_LEFT_X(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_X__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_X__MASK) x 115 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_2D_TOP_LEFT_Y(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_Y__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_Y__MASK) x 120 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__MASK) x 123 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__MASK) x 135 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__MASK) x 151 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__MASK) x 164 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_WAIT_HEADER_DELAY(x) (((x) << VIV_FE_WAIT_HEADER_DELAY__SHIFT) & VIV_FE_WAIT_HEADER_DELAY__MASK) x 174 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_LINK_HEADER_PREFETCH(x) (((x) << VIV_FE_LINK_HEADER_PREFETCH__SHIFT) & VIV_FE_LINK_HEADER_PREFETCH__MASK) x 191 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_STALL_TOKEN_FROM(x) (((x) << VIV_FE_STALL_TOKEN_FROM__SHIFT) & VIV_FE_STALL_TOKEN_FROM__MASK) x 194 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_STALL_TOKEN_TO(x) (((x) << VIV_FE_STALL_TOKEN_TO__SHIFT) & VIV_FE_STALL_TOKEN_TO__MASK) x 201 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_CALL_HEADER_PREFETCH(x) (((x) << VIV_FE_CALL_HEADER_PREFETCH__SHIFT) & VIV_FE_CALL_HEADER_PREFETCH__MASK) x 251 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_INSTANCED_HEADER_TYPE(x) (((x) << VIV_FE_DRAW_INSTANCED_HEADER_TYPE__SHIFT) & VIV_FE_DRAW_INSTANCED_HEADER_TYPE__MASK) x 254 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO(x) (((x) << VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO__SHIFT) & VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO__MASK) x 259 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI(x) (((x) << VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI__SHIFT) & VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI__MASK) x 262 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT(x) (((x) << VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT__SHIFT) & VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT__MASK) x 267 drivers/gpu/drm/etnaviv/cmdstream.xml.h #define VIV_FE_DRAW_INSTANCED_START_INDEX(x) (((x) << VIV_FE_DRAW_INSTANCED_START_INDEX__SHIFT) & VIV_FE_DRAW_INSTANCED_START_INDEX__MASK) x 67 drivers/gpu/drm/etnaviv/state.xml.h #define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE(x) (((x) << FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT) & FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK) x 70 drivers/gpu/drm/etnaviv/state.xml.h #define FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR(x) (((x) << FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR__SHIFT) & FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR__MASK) x 78 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__MASK) x 81 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK) x 85 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__MASK) x 88 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__MASK) x 95 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_VERTEX_ELEMENT_CONFIG_START(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_START__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_START__MASK) x 98 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_VERTEX_ELEMENT_CONFIG_END(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_END__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_END__MASK) x 121 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_COMMAND_CONTROL_PREFETCH(x) (((x) << VIVS_FE_COMMAND_CONTROL_PREFETCH__SHIFT) & VIVS_FE_COMMAND_CONTROL_PREFETCH__MASK) x 227 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_FE_DESC_AVAIL_COUNT(x) (((x) << VIVS_FE_DESC_AVAIL_COUNT__SHIFT) & VIVS_FE_DESC_AVAIL_COUNT__MASK) x 240 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_PIPE_SELECT_PIPE(x) (((x) << VIVS_GL_PIPE_SELECT_PIPE__SHIFT) & VIVS_GL_PIPE_SELECT_PIPE__MASK) x 245 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_EVENT_EVENT_ID(x) (((x) << VIVS_GL_EVENT_EVENT_ID__SHIFT) & VIVS_GL_EVENT_EVENT_ID__MASK) x 251 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_EVENT_SOURCE(x) (((x) << VIVS_GL_EVENT_SOURCE__SHIFT) & VIVS_GL_EVENT_SOURCE__MASK) x 256 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_SEMAPHORE_TOKEN_FROM(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_FROM__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_FROM__MASK) x 259 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_SEMAPHORE_TOKEN_TO(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_TO__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_TO__MASK) x 262 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_SEMAPHORE_TOKEN_UNK28(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_UNK28__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_UNK28__MASK) x 295 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__MASK) x 299 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__MASK) x 303 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__MASK) x 309 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(x) (((x) << VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT) & VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK) x 320 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP0(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP0__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP0__MASK) x 323 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP1(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP1__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP1__MASK) x 326 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP2(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP2__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP2__MASK) x 329 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP3(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP3__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP3__MASK) x 332 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP4(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP4__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP4__MASK) x 335 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP5(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP5__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP5__MASK) x 338 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP6(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP6__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP6__MASK) x 341 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP7(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP7__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP7__MASK) x 344 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP8(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP8__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP8__MASK) x 347 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP9(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP9__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP9__MASK) x 350 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP10(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP10__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP10__MASK) x 353 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP11(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP11__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP11__MASK) x 356 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP12(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP12__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP12__MASK) x 359 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP13(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP13__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP13__MASK) x 362 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP14(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP14__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP14__MASK) x 365 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_VARYING_COMPONENT_USE_COMP15(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP15__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP15__MASK) x 395 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT__MASK) x 398 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN__MASK) x 401 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_HALTI5_SH_SPECIALS_UNK16(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_UNK16__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_UNK16__MASK) x 404 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_HALTI5_SH_SPECIALS_UNK24(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_UNK24__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_UNK24__MASK) x 437 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_STALL_TOKEN_FROM(x) (((x) << VIVS_GL_STALL_TOKEN_FROM__SHIFT) & VIVS_GL_STALL_TOKEN_FROM__MASK) x 440 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_GL_STALL_TOKEN_TO(x) (((x) << VIVS_GL_STALL_TOKEN_TO__SHIFT) & VIVS_GL_STALL_TOKEN_TO__MASK) x 465 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE__MASK) x 468 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN__MASK) x 471 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM__MASK) x 474 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM__MASK) x 481 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START__MASK) x 494 drivers/gpu/drm/etnaviv/state.xml.h #define VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END__MASK) x 13 drivers/gpu/drm/etnaviv/state_3d.xml.h #define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28(x) (((x) << VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT) & VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK) x 58 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(x) (((x) << VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__SHIFT) & VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__MASK) x 69 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE(x) (((x) << VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__SHIFT) & VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__MASK) x 89 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_AXI_CONFIG_AWID(x) (((x) << VIVS_HI_AXI_CONFIG_AWID__SHIFT) & VIVS_HI_AXI_CONFIG_AWID__MASK) x 92 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_AXI_CONFIG_ARID(x) (((x) << VIVS_HI_AXI_CONFIG_ARID__SHIFT) & VIVS_HI_AXI_CONFIG_ARID__MASK) x 95 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_AXI_CONFIG_AWCACHE(x) (((x) << VIVS_HI_AXI_CONFIG_AWCACHE__SHIFT) & VIVS_HI_AXI_CONFIG_AWCACHE__MASK) x 98 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_AXI_CONFIG_ARCACHE(x) (((x) << VIVS_HI_AXI_CONFIG_ARCACHE__SHIFT) & VIVS_HI_AXI_CONFIG_ARCACHE__MASK) x 103 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_AXI_STATUS_WR_ERR_ID(x) (((x) << VIVS_HI_AXI_STATUS_WR_ERR_ID__SHIFT) & VIVS_HI_AXI_STATUS_WR_ERR_ID__MASK) x 106 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_AXI_STATUS_RD_ERR_ID(x) (((x) << VIVS_HI_AXI_STATUS_RD_ERR_ID__SHIFT) & VIVS_HI_AXI_STATUS_RD_ERR_ID__MASK) x 113 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC(x) (((x) << VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__SHIFT) & VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__MASK) x 120 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_INTR_ENBL_INTR_ENBL_VEC(x) (((x) << VIVS_HI_INTR_ENBL_INTR_ENBL_VEC__SHIFT) & VIVS_HI_INTR_ENBL_INTR_ENBL_VEC__MASK) x 125 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_IDENTITY_FAMILY(x) (((x) << VIVS_HI_CHIP_IDENTITY_FAMILY__SHIFT) & VIVS_HI_CHIP_IDENTITY_FAMILY__MASK) x 128 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_IDENTITY_PRODUCT(x) (((x) << VIVS_HI_CHIP_IDENTITY_PRODUCT__SHIFT) & VIVS_HI_CHIP_IDENTITY_PRODUCT__MASK) x 131 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_IDENTITY_REVISION(x) (((x) << VIVS_HI_CHIP_IDENTITY_REVISION__SHIFT) & VIVS_HI_CHIP_IDENTITY_REVISION__MASK) x 156 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_STREAM_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_STREAM_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_STREAM_COUNT__MASK) x 159 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_REGISTER_MAX(x) (((x) << VIVS_HI_CHIP_SPECS_REGISTER_MAX__SHIFT) & VIVS_HI_CHIP_SPECS_REGISTER_MAX__MASK) x 162 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_THREAD_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_THREAD_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_THREAD_COUNT__MASK) x 165 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE(x) (((x) << VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__SHIFT) & VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__MASK) x 168 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__MASK) x 171 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_PIXEL_PIPES(x) (((x) << VIVS_HI_CHIP_SPECS_PIXEL_PIPES__SHIFT) & VIVS_HI_CHIP_SPECS_PIXEL_PIPES__MASK) x 174 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE(x) (((x) << VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__SHIFT) & VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__MASK) x 204 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE(x) (((x) << VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__SHIFT) & VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__MASK) x 207 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__MASK) x 210 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS(x) (((x) << VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__SHIFT) & VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__MASK) x 219 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK) x 222 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__MASK) x 232 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__MASK) x 250 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER(x) (((x) << VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER__SHIFT) & VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER__MASK) x 253 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER(x) (((x) << VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER__SHIFT) & VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER__MASK) x 281 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_PM_PULSE_EATER_DVFS_PERIOD(x) (((x) << VIVS_PM_PULSE_EATER_DVFS_PERIOD__SHIFT) & VIVS_PM_PULSE_EATER_DVFS_PERIOD__MASK) x 307 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_CONFIGURATION_ADDRESS(x) (((x) << VIVS_MMUv2_CONFIGURATION_ADDRESS__SHIFT) & VIVS_MMUv2_CONFIGURATION_ADDRESS__MASK) x 312 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_STATUS_EXCEPTION0(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION0__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION0__MASK) x 315 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_STATUS_EXCEPTION1(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION1__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION1__MASK) x 318 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_STATUS_EXCEPTION2(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION2__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION2__MASK) x 321 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_STATUS_EXCEPTION3(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION3__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION3__MASK) x 335 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_PTA_CONFIG_INDEX(x) (((x) << VIVS_MMUv2_PTA_CONFIG_INDEX__SHIFT) & VIVS_MMUv2_PTA_CONFIG_INDEX__MASK) x 347 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_SEC_STATUS_EXCEPTION0(x) (((x) << VIVS_MMUv2_SEC_STATUS_EXCEPTION0__SHIFT) & VIVS_MMUv2_SEC_STATUS_EXCEPTION0__MASK) x 350 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_SEC_STATUS_EXCEPTION1(x) (((x) << VIVS_MMUv2_SEC_STATUS_EXCEPTION1__SHIFT) & VIVS_MMUv2_SEC_STATUS_EXCEPTION1__MASK) x 353 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_SEC_STATUS_EXCEPTION2(x) (((x) << VIVS_MMUv2_SEC_STATUS_EXCEPTION2__SHIFT) & VIVS_MMUv2_SEC_STATUS_EXCEPTION2__MASK) x 356 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_SEC_STATUS_EXCEPTION3(x) (((x) << VIVS_MMUv2_SEC_STATUS_EXCEPTION3__SHIFT) & VIVS_MMUv2_SEC_STATUS_EXCEPTION3__MASK) x 375 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_SAFE_ADDRESS_CONFIG_NON_SEC_SAFE_ADDR_HIGH(x) (((x) << VIVS_MMUv2_SAFE_ADDRESS_CONFIG_NON_SEC_SAFE_ADDR_HIGH__SHIFT) & VIVS_MMUv2_SAFE_ADDRESS_CONFIG_NON_SEC_SAFE_ADDR_HIGH__MASK) x 379 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_SAFE_ADDRESS_CONFIG_SEC_SAFE_ADDR_HIGH(x) (((x) << VIVS_MMUv2_SAFE_ADDRESS_CONFIG_SEC_SAFE_ADDR_HIGH__SHIFT) & VIVS_MMUv2_SAFE_ADDRESS_CONFIG_SEC_SAFE_ADDR_HIGH__MASK) x 385 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MMUv2_SEC_COMMAND_CONTROL_PREFETCH(x) (((x) << VIVS_MMUv2_SEC_COMMAND_CONTROL_PREFETCH__SHIFT) & VIVS_MMUv2_SEC_COMMAND_CONTROL_PREFETCH__MASK) x 540 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG(x) (((x) << VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__SHIFT) & VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__MASK) x 543 drivers/gpu/drm/etnaviv/state_hi.xml.h #define VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG(x) (((x) << VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__SHIFT) & VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__MASK) x 395 drivers/gpu/drm/exynos/exynos5433_drm_decon.c #define BIT_VAL(x, e, s) (((x) & ((1 << ((e) - (s) + 1)) - 1)) << (s)) x 396 drivers/gpu/drm/exynos/exynos5433_drm_decon.c #define COORDINATE_X(x) BIT_VAL((x), 23, 12) x 397 drivers/gpu/drm/exynos/exynos5433_drm_decon.c #define COORDINATE_Y(x) BIT_VAL((x), 11, 0) x 413 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x) | x 417 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) | x 421 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x) | COORDINATE_Y(state->crtc.y); x 424 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) | x 418 drivers/gpu/drm/exynos/exynos7_drm_decon.c writel(state->src.x, ctx->regs + VIDW_OFFSET_X(win)); x 426 drivers/gpu/drm/exynos/exynos7_drm_decon.c val = VIDOSDxA_TOPLEFT_X(state->crtc.x) | x 430 drivers/gpu/drm/exynos/exynos7_drm_decon.c last_x = state->crtc.x + state->crtc.w; x 442 drivers/gpu/drm/exynos/exynos7_drm_decon.c state->crtc.x, state->crtc.y, last_x, last_y); x 29 drivers/gpu/drm/exynos/exynos_drm_drv.h #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base) x 30 drivers/gpu/drm/exynos/exynos_drm_drv.h #define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base) x 44 drivers/gpu/drm/exynos/exynos_drm_drv.h unsigned int x, y; x 40 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_STOP_STATE_DAT(x) (((x) & 0xf) << 0) x 50 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_LPDR_TIMEOUT(x) ((x) << 0) x 51 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_BTA_TIMEOUT(x) ((x) << 16) x 54 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_ESC_PRESCALER(x) (((x) & 0xffff) << 0) x 57 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_LANE_ESC_CLK_EN_DATA(x) (((x) & 0xf) << 20) x 60 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_BYTE_CLK_SRC(x) (((x) & 0x3) << 25) x 68 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_LANE_EN(x) (((x) & 0xf) << 1) x 69 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_NUM_OF_DATA_LANE(x) (((x) & 0x3) << 5) x 70 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_SUB_PIX_FORMAT(x) (((x) & 0x7) << 8) x 76 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_SUB_VC (((x) & 0x3) << 16) x 77 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_VC (((x) & 0x3) << 18) x 97 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_STOP_STATE_CNT(x) (((x) & 0x7ff) << 21) x 102 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_VRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 16) x 103 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_HRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 0) x 106 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_CMD_ALLOW(x) ((x) << 28) x 107 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_STABLE_VFP(x) ((x) << 16) x 108 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_VBP(x) ((x) << 0) x 114 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_HFP(x) ((x) << 16) x 115 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_HBP(x) ((x) << 0) x 120 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_VSA(x) ((x) << 22) x 121 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_MAIN_HSA(x) ((x) << 0) x 126 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_SUB_STANDY(x) ((x) << 31) x 127 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_SUB_VRESOL(x) ((x) << 16) x 128 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_SUB_HRESOL(x) ((x) << 0) x 175 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_AFC_CTL(x) (((x) & 0x7) << 5) x 178 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_FREQ_BAND(x) ((x) << 24) x 180 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PLL_P(x) ((x) << 13) x 181 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PLL_M(x) ((x) << 4) x 182 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PLL_S(x) ((x) << 1) x 185 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYCTRL_ULPS_EXIT(x) (((x) & 0x1ff) << 0) x 190 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING_LPX(x) ((x) << 8) x 191 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING_HS_EXIT(x) ((x) << 0) x 194 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING1_CLK_PREPARE(x) ((x) << 24) x 195 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING1_CLK_ZERO(x) ((x) << 16) x 196 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING1_CLK_POST(x) ((x) << 8) x 197 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING1_CLK_TRAIL(x) ((x) << 0) x 200 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING2_HS_PREPARE(x) ((x) << 16) x 201 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING2_HS_ZERO(x) ((x) << 8) x 202 drivers/gpu/drm/exynos/exynos_drm_dsi.c #define DSIM_PHYTIMING2_HS_TRAIL(x) ((x) << 0) x 28 drivers/gpu/drm/exynos/exynos_drm_fbdev.c #define to_exynos_fbdev(x) container_of(x, struct exynos_drm_fbdev,\ x 476 drivers/gpu/drm/exynos/exynos_drm_fimc.c h1 = buf->rect.x; x 477 drivers/gpu/drm/exynos/exynos_drm_fimc.c h2 = real_width - buf->rect.w - buf->rect.x; x 482 drivers/gpu/drm/exynos/exynos_drm_fimc.c buf->rect.x, buf->rect.y, buf->rect.w, buf->rect.h, x 519 drivers/gpu/drm/exynos/exynos_drm_fimc.c DRM_DEV_DEBUG_KMS(ctx->dev, "x[%d]y[%d]w[%d]h[%d]\n", buf->rect.x, x 540 drivers/gpu/drm/exynos/exynos_drm_fimc.c cfg = (EXYNOS_CIIYOFF_HORIZONTAL(buf->rect.x) | x 543 drivers/gpu/drm/exynos/exynos_drm_fimc.c cfg = (EXYNOS_CIICBOFF_HORIZONTAL(buf->rect.x) | x 546 drivers/gpu/drm/exynos/exynos_drm_fimc.c cfg = (EXYNOS_CIICROFF_HORIZONTAL(buf->rect.x) | x 861 drivers/gpu/drm/exynos/exynos_drm_fimc.c DRM_DEV_DEBUG_KMS(ctx->dev, "x[%d]y[%d]w[%d]h[%d]\n", buf->rect.x, x 895 drivers/gpu/drm/exynos/exynos_drm_fimc.c cfg = (EXYNOS_CIOYOFF_HORIZONTAL(buf->rect.x) | x 898 drivers/gpu/drm/exynos/exynos_drm_fimc.c cfg = (EXYNOS_CIOCBOFF_HORIZONTAL(buf->rect.x) | x 901 drivers/gpu/drm/exynos/exynos_drm_fimc.c cfg = (EXYNOS_CIOCROFF_HORIZONTAL(buf->rect.x) | x 62 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8)) x 64 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8)) x 81 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define I80IFCONFAx(x) (0x1B0 + (x) * 4) x 82 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define I80IFCONFBx(x) (0x1B8 + (x) * 4) x 83 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define LCD_CS_SETUP(x) ((x) << 16) x 84 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define LCD_WR_SETUP(x) ((x) << 12) x 85 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define LCD_WR_ACTIVE(x) ((x) << 8) x 86 drivers/gpu/drm/exynos/exynos_drm_fimd.c #define LCD_WR_HOLD(x) ((x) << 4) x 805 drivers/gpu/drm/exynos/exynos_drm_fimd.c offset = state->src.x * cpp; x 834 drivers/gpu/drm/exynos/exynos_drm_fimd.c val = VIDOSDxA_TOPLEFT_X(state->crtc.x) | x 836 drivers/gpu/drm/exynos/exynos_drm_fimd.c VIDOSDxA_TOPLEFT_X_E(state->crtc.x) | x 840 drivers/gpu/drm/exynos/exynos_drm_fimd.c last_x = state->crtc.x + state->crtc.w; x 854 drivers/gpu/drm/exynos/exynos_drm_fimd.c state->crtc.x, state->crtc.y, last_x, last_y); x 14 drivers/gpu/drm/exynos/exynos_drm_gem.h #define to_exynos_gem(x) container_of(x, struct exynos_drm_gem, base) x 571 drivers/gpu/drm/exynos/exynos_drm_gsc.c cfg = (GSC_SRCIMG_OFFSET_X(buf->rect.x) | x 871 drivers/gpu/drm/exynos/exynos_drm_gsc.c cfg = (GSC_DSTIMG_OFFSET_X(buf->rect.x) | x 497 drivers/gpu/drm/exynos/exynos_drm_ipp.c !__align_check(buf->rect.x, lh->align) || x 622 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (src->rect.x + src->rect.w > (src->buf.width) || x 624 drivers/gpu/drm/exynos/exynos_drm_ipp.c dst->rect.x + dst->rect.w > (dst->buf.width) || x 639 drivers/gpu/drm/exynos/exynos_drm_ipp.c (src->rect.x || src->rect.y || dst->rect.x || dst->rect.y)) || x 58 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_VIDEO_TYPE(x) (((x) & 0xf) << 12) x 67 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_V_PULSE_WIDTH(x) (((x) & 0x3fff) << 16) x 68 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_V_PERIOD_LINE(x) ((x) & 0x3fff) x 70 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_VBP_SIZE(x) (((x) & 0x3fff) << 16) x 71 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_VFP_SIZE(x) ((x) & 0x3fff) x 73 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_IMG_V_SIZE(x) (((x) & 0x3fff) << 16) x 74 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_IMG_H_SIZE(x) ((x) & 0x3fff) x 76 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_H_PULSE_WIDTH_IN(x) (((x) & 0x3fff) << 16) x 77 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_H_PERIOD_PIXEL_IN(x) ((x) & 0x3fff) x 79 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_HBP_SIZE_IN(x) (((x) & 0x3fff) << 16) x 80 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_HFP_SIZE_IN(x) ((x) & 0x3fff) x 82 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_H_PULSE_WIDTH_2D(x) (((x) & 0x3fff) << 16) x 83 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_H_PERIOD_PIXEL_2D(x) ((x) & 0x3fff) x 85 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_HBP_SIZE_2D(x) (((x) & 0x3fff) << 16) x 86 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_HFP_SIZE_2D(x) ((x) & 0x3fff) x 88 drivers/gpu/drm/exynos/exynos_drm_mic.c #define MIC_BS_SIZE_2D(x) ((x) & 0x3fff) x 106 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->src.x = src_x; x 112 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.x = crtc_x; x 119 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.x, exynos_state->crtc.y, x 149 drivers/gpu/drm/exynos/exynos_drm_rotator.c val = ROT_CROP_POS_Y(buf->rect.y) | ROT_CROP_POS_X(buf->rect.x); x 197 drivers/gpu/drm/exynos/exynos_drm_rotator.c val = ROT_CROP_POS_Y(buf->rect.y) | ROT_CROP_POS_X(buf->rect.x); x 185 drivers/gpu/drm/exynos/exynos_drm_scaler.c val = SCALER_SRC_Y_POS_SET_YH_POS(src_pos->x << 2); x 189 drivers/gpu/drm/exynos/exynos_drm_scaler.c (src_pos->x * fmt->chroma_tile_w / 16) << 2); x 257 drivers/gpu/drm/exynos/exynos_drm_scaler.c val = SCALER_DST_POS_SET_H_POS(dst_pos->x); x 51 drivers/gpu/drm/exynos/exynos_mixer.c #define MXR_CSC_C(x) ((int)((x) * 512.0) & 0x3ff) x 562 drivers/gpu/drm/exynos/exynos_mixer.c VP_SRC_H_POSITION_VAL(state->src.x)); x 564 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_DST_H_POSITION, state->crtc.x); x 645 drivers/gpu/drm/exynos/exynos_mixer.c dst_x_offset = state->crtc.x; x 650 drivers/gpu/drm/exynos/exynos_mixer.c + (state->src.x * fb->format->cpp[0]) x 167 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON00_VBPD_F(x) (((x) & 0xfff) << 16) x 168 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON00_VFPD_F(x) ((x) & 0xfff) x 171 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON01_VSPW_F(x) (((x) & 0xfff) << 16) x 174 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON10_HBPD_F(x) (((x) & 0xfff) << 16) x 175 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON10_HFPD_F(x) ((x) & 0xfff) x 178 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON11_HSPW_F(x) (((x) & 0xfff) << 16) x 181 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON2_LINEVAL(x) (((x) & 0xfff) << 16) x 182 drivers/gpu/drm/exynos/regs-decon5433.h #define VIDTCON2_HOZVAL(x) ((x) & 0xfff) x 186 drivers/gpu/drm/exynos/regs-decon7.h #define WKEYCON0_BASE(x) ((WKEYCON + WKEYCON0) + ((x - 1) * 8)) x 188 drivers/gpu/drm/exynos/regs-decon7.h #define WKEYCON1_BASE(x) ((WKEYCON + WKEYCON1) + ((x - 1) * 8)) x 321 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISRCFMT_SOURCEHSIZE(x) ((x) << 16) x 322 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISRCFMT_SOURCEVSIZE(x) ((x) << 0) x 324 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIWDOFST_WINHOROFST(x) ((x) << 16) x 325 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIWDOFST_WINVEROFST(x) ((x) << 0) x 327 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIWDOFST2_WINHOROFST2(x) ((x) << 16) x 328 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIWDOFST2_WINVEROFST2(x) ((x) << 0) x 330 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CITRGFMT_TARGETHSIZE(x) (((x) & 0x1fff) << 16) x 331 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CITRGFMT_TARGETVSIZE(x) (((x) & 0x1fff) << 0) x 333 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISCPRERATIO_SHFACTOR(x) ((x) << 28) x 334 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISCPRERATIO_PREHORRATIO(x) ((x) << 16) x 335 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISCPRERATIO_PREVERRATIO(x) ((x) << 0) x 337 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISCPREDST_PREDSTWIDTH(x) ((x) << 16) x 338 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISCPREDST_PREDSTHEIGHT(x) ((x) << 0) x 340 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISCCTRL_MAINHORRATIO(x) ((x) << 16) x 341 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISCCTRL_MAINVERRATIO(x) ((x) << 0) x 343 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CITAREA_TARGET_AREA(x) ((x) << 0) x 345 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISTATUS_GET_FRAME_COUNT(x) (((x) >> 26) & 0x3) x 346 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISTATUS_GET_FRAME_END(x) (((x) >> 17) & 0x1) x 347 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISTATUS_GET_LAST_CAPTURE_END(x) (((x) >> 16) & 0x1) x 348 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISTATUS_GET_LCD_STATUS(x) (((x) >> 9) & 0x1) x 349 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISTATUS_GET_ENVID_STATUS(x) (((x) >> 8) & 0x1) x 351 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE(x) (((x) >> 7) & 0x3f) x 352 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(x) ((x) & 0x3f) x 354 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIIMGEFF_FIN(x) ((x & 0x7) << 26) x 355 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIIMGEFF_PAT_CB(x) ((x) << 13) x 356 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIIMGEFF_PAT_CR(x) ((x) << 0) x 358 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIILINESKIP(x) (((x) & 0xf) << 24) x 360 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIREAL_ISIZE_HEIGHT(x) ((x) << 16) x 361 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIREAL_ISIZE_WIDTH(x) ((x) << 0) x 363 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_MSCTRL_SUCCESSIVE_COUNT(x) ((x) << 24) x 364 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_MSCTRL_GET_INDMA_STATUS(x) ((x) & 0x1) x 366 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIOYOFF_VERTICAL(x) ((x) << 16) x 367 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIOYOFF_HORIZONTAL(x) ((x) << 0) x 369 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIOCBOFF_VERTICAL(x) ((x) << 16) x 370 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIOCBOFF_HORIZONTAL(x) ((x) << 0) x 372 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIOCROFF_VERTICAL(x) ((x) << 16) x 373 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIOCROFF_HORIZONTAL(x) ((x) << 0) x 375 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIIYOFF_VERTICAL(x) ((x) << 16) x 376 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIIYOFF_HORIZONTAL(x) ((x) << 0) x 378 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIICBOFF_VERTICAL(x) ((x) << 16) x 379 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIICBOFF_HORIZONTAL(x) ((x) << 0) x 381 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIICROFF_VERTICAL(x) ((x) << 16) x 382 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIICROFF_HORIZONTAL(x) ((x) << 0) x 384 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_ORGISIZE_VERTICAL(x) ((x) << 16) x 385 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_ORGISIZE_HORIZONTAL(x) ((x) << 0) x 387 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_ORGOSIZE_VERTICAL(x) ((x) << 16) x 388 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_ORGOSIZE_HORIZONTAL(x) ((x) << 0) x 390 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIEXTEN_TARGETH_EXT(x) ((((x) & 0x2000) >> 13) << 26) x 391 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIEXTEN_TARGETV_EXT(x) ((((x) & 0x2000) >> 13) << 24) x 392 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIEXTEN_MAINHORRATIO_EXT(x) (((x) & 0x3F) << 10) x 393 drivers/gpu/drm/exynos/regs-fimc.h #define EXYNOS_CIEXTEN_MAINVERRATIO_EXT(x) ((x) & 0x3F) x 94 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_SRCIMG_HEIGHT(x) ((x) << 16) x 96 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_SRCIMG_WIDTH(x) ((x) << 0) x 101 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16) x 103 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_SRCIMG_OFFSET_X(x) ((x) << 0) x 108 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_CROPPED_HEIGHT(x) ((x) << 16) x 110 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_CROPPED_WIDTH(x) ((x) << 0) x 115 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) x 151 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_SCALED_HEIGHT(x) ((x) << 16) x 153 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_SCALED_WIDTH(x) ((x) << 0) x 158 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_PRESC_SHFACTOR(x) ((x) << 28) x 160 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_PRESC_V_RATIO(x) ((x) << 16) x 162 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_PRESC_H_RATIO(x) ((x) << 0) x 167 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_MAIN_H_RATIO_VALUE(x) ((x) << 0) x 172 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_MAIN_V_RATIO_VALUE(x) ((x) << 0) x 177 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_IN_CHROM_STRIDE_VALUE(x) ((x) << 0) x 182 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_DSTIMG_HEIGHT(x) ((x) << 16) x 184 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_DSTIMG_WIDTH(x) ((x) << 0) x 189 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_DSTIMG_OFFSET_Y(x) ((x) << 16) x 191 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_DSTIMG_OFFSET_X(x) ((x) << 0) x 196 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_OUT_CHROM_STRIDE_VALUE(x) ((x) << 0) x 221 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_IN_CURR_GET_INDEX(x) ((x) >> 24) x 222 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_IN_BASE_ADDR_PINGPONG(x) ((x) << 16) x 242 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_OUT_CURR_GET_INDEX(x) ((x) >> 24) x 243 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_OUT_BASE_ADDR_PINGPONG(x) ((x) << 16) x 247 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_HCOEF(n, s, x) (0x300 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300) x 250 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_VCOEF(n, s, x) (0x200 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300) x 257 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_BUSCON_AWCACHE(x) ((x) << 4) x 258 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_BUSCON_ARCACHE(x) ((x) << 0) x 262 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_VPOS_F(x) ((x) << 0) x 267 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_CLK_GATE_MODE_INIT_CNT(x) ((x) << 0) x 271 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_CLK_GATE_MODE_SNOOP_CNT(x) ((x) << 0) x 275 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_BLK_DISP1WB_DEST(x) (x << 10) x 276 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_BLK_SW_RESET_WB_DEST(x) (1 << (18 + x)) x 277 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_BLK_PXLASYNC_LO_MASK_WB(x) (0 << (14 + x)) x 278 drivers/gpu/drm/exynos/regs-gsc.h #define GSC_BLK_GSCL_WB_IN_SRC_SEL(x) (1 << (2 * x)) x 280 drivers/gpu/drm/exynos/regs-gsc.h #define PXLASYNC_LO_MASK_CAMIF_GSCL(x) (1 << (x)) x 20 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_CTRL_BASE(x) ((x) + 0x00000000) x 21 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_CORE_BASE(x) ((x) + 0x00010000) x 22 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_BASE(x) ((x) + 0x00040000) x 23 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_TG_BASE(x) ((x) + 0x00050000) x 455 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SET_BIT_CH(x) (((x) & 0x7) << 4) x 456 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SET_SDATA_BIT(x) (((x) & 0x7) << 2) x 459 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SEL_SCLK(x) (((x) & 0x7) << 4) x 460 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SEL_LRCK(x) ((x) & 0x7) x 463 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SEL_SDATA1(x) (((x) & 0x7) << 4) x 464 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SEL_SDATA0(x) ((x) & 0x7) x 467 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SEL_SDATA3(x) (((x) & 0x7) << 4) x 468 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SEL_SDATA2(x) ((x) & 0x7) x 471 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SEL_DSD(x) ((x) & 0x7) x 522 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SET_CHANNEL_NUM(x) (((x) & (0xF)) << 4) x 523 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SET_SOURCE_NUM(x) ((x) & (0xF)) x 533 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_I2S_SET_SMP_FREQ(x) ((x) & (0xF)) x 119 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_CFG_FORMAT_VAL(x) MXR_MASK_VAL(x, 11, 8) x 121 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_CFG_ALPHA_VAL(x) MXR_MASK_VAL(x, 7, 0) x 124 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_WH_H_SCALE(x) MXR_MASK_VAL(x, 28, 28) x 125 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_WH_V_SCALE(x) MXR_MASK_VAL(x, 12, 12) x 126 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_WH_WIDTH(x) MXR_MASK_VAL(x, 26, 16) x 127 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_WH_HEIGHT(x) MXR_MASK_VAL(x, 10, 0) x 130 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_MXR_RES_HEIGHT(x) MXR_MASK_VAL(x, 26, 16) x 131 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_MXR_RES_WIDTH(x) MXR_MASK_VAL(x, 10, 0) x 134 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_SXY_SX(x) MXR_MASK_VAL(x, 26, 16) x 135 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_SXY_SY(x) MXR_MASK_VAL(x, 10, 0) x 138 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_DXY_DX(x) MXR_MASK_VAL(x, 26, 16) x 139 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_GRP_DXY_DY(x) MXR_MASK_VAL(x, 10, 0) x 150 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_LAYER_CFG_GRP1_VAL(x) MXR_MASK_VAL(x, 11, 8) x 152 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_LAYER_CFG_GRP0_VAL(x) MXR_MASK_VAL(x, 7, 4) x 154 drivers/gpu/drm/exynos/regs-mixer.h #define MXR_LAYER_CFG_VP_VAL(x) MXR_MASK_VAL(x, 3, 0) x 34 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_STATUS_IRQ_PENDING(x) (1 << (x)) x 35 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_STATUS_IRQ(x) (((x) >> 8) & 0x3) x 46 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_SET_BUF_SIZE_H(x) ((x) << 16) x 47 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_SET_BUF_SIZE_W(x) ((x) << 0) x 48 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_GET_BUF_SIZE_H(x) ((x) >> 16) x 49 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_GET_BUF_SIZE_W(x) ((x) & 0xffff) x 54 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_CROP_POS_Y(x) ((x) << 16) x 55 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_CROP_POS_X(x) ((x) << 0) x 59 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_SRC_CROP_SIZE_H(x) ((x) << 16) x 60 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_SRC_CROP_SIZE_W(x) ((x) << 0) x 63 drivers/gpu/drm/exynos/regs-rotator.h #define ROT_ALIGN(x, align, mask) (((x) + (1 << ((align) - 1))) & (mask)) x 89 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_CSC_COEF(x, y) (0x220 + (y) * 0xc + (x) * 0x4) x 79 drivers/gpu/drm/exynos/regs-vp.h #define VP_IMG_HSIZE(x) VP_MASK_VAL(x, 29, 16) x 80 drivers/gpu/drm/exynos/regs-vp.h #define VP_IMG_VSIZE(x) VP_MASK_VAL(x, 13, 0) x 83 drivers/gpu/drm/exynos/regs-vp.h #define VP_SRC_H_POSITION_VAL(x) VP_MASK_VAL(x, 14, 4) x 18 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_MODE_BLEND_ITER(x) ((x) << 20) x 20 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_MODE_DCU_MODE(x) (x) x 28 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_BGND_R(x) ((x) << 16) x 29 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_BGND_G(x) ((x) << 8) x 30 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_BGND_B(x) (x) x 33 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_DISP_SIZE_DELTA_Y(x) ((x) << 16) x 35 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_DISP_SIZE_DELTA_X(x) ((x) >> 4) x 38 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_HSYN_PARA_BP(x) ((x) << 22) x 39 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_HSYN_PARA_PW(x) ((x) << 11) x 40 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_HSYN_PARA_FP(x) (x) x 43 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_VSYN_PARA_BP(x) ((x) << 22) x 44 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_VSYN_PARA_PW(x) ((x) << 11) x 45 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_VSYN_PARA_FP(x) (x) x 54 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_THRESHOLD_LS_BF_VS(x) ((x) << 16) x 55 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_THRESHOLD_OUT_BUF_HIGH(x) ((x) << 8) x 56 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_THRESHOLD_OUT_BUF_LOW(x) (x) x 119 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_HEIGHT(x) ((x) << 16) x 120 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_WIDTH(x) (x) x 122 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_POSY(x) ((x) << 16) x 123 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_POSX(x) (x) x 129 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_TRANS(x) ((x) << 20) x 130 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_BPP(x) ((x) << 16) x 132 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_LUOFFS(x) ((x) << 4) x 138 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_CKMAX_R(x) ((x) << 16) x 139 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_CKMAX_G(x) ((x) << 8) x 140 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_CKMAX_B(x) (x) x 142 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_CKMIN_R(x) ((x) << 16) x 143 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_CKMIN_G(x) ((x) << 8) x 144 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_CKMIN_B(x) (x) x 146 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_TILE_VER(x) ((x) << 16) x 147 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_TILE_HOR(x) (x) x 149 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_FG_FCOLOR(x) (x) x 151 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_BG_BCOLOR(x) (x) x 153 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_POST_SKIP(x) ((x) << 16) x 154 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h #define DCU_LAYER_PRE_SKIP(x) (x) x 571 drivers/gpu/drm/gma500/cdv_intel_display.c int x, int y, x 818 drivers/gpu/drm/gma500/cdv_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); x 1890 drivers/gpu/drm/gma500/cdv_intel_dp.c crtc->x, crtc->y, x 196 drivers/gpu/drm/gma500/cdv_intel_hdmi.c encoder->crtc->x, encoder->crtc->y, encoder->crtc->primary->fb)) x 459 drivers/gpu/drm/gma500/cdv_intel_lvds.c encoder->crtc->x, x 27 drivers/gpu/drm/gma500/framebuffer.h #define to_psb_fb(x) container_of(x, struct psb_framebuffer, base) x 50 drivers/gpu/drm/gma500/gma_display.c int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y, x 81 drivers/gpu/drm/gma500/gma_display.c offset = y * fb->pitches[0] + x * fb->format->cpp[0]; x 110 drivers/gpu/drm/gma500/gma_display.c "Writing base %08lX %08lX %d %d\n", start, offset, x, y); x 440 drivers/gpu/drm/gma500/gma_display.c int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) x 448 drivers/gpu/drm/gma500/gma_display.c if (x < 0) { x 450 drivers/gpu/drm/gma500/gma_display.c x = -x; x 457 drivers/gpu/drm/gma500/gma_display.c temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT); x 58 drivers/gpu/drm/gma500/gma_display.h extern int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y, x 64 drivers/gpu/drm/gma500/gma_display.h extern int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y); x 43 drivers/gpu/drm/gma500/gtt.h #define to_gtt_range(x) container_of(x, struct gtt_range, gem) x 290 drivers/gpu/drm/gma500/mdfld_dsi_output.c encoder->crtc->x, x 154 drivers/gpu/drm/gma500/mdfld_intel_display.c static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, x 190 drivers/gpu/drm/gma500/mdfld_intel_display.c offset = y * fb->pitches[0] + x * fb->format->cpp[0]; x 214 drivers/gpu/drm/gma500/mdfld_intel_display.c start, offset, x, y); x 659 drivers/gpu/drm/gma500/mdfld_intel_display.c int x, int y, x 689 drivers/gpu/drm/gma500/mdfld_intel_display.c x, y, old_fb); x 841 drivers/gpu/drm/gma500/mdfld_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); x 243 drivers/gpu/drm/gma500/oaktrail.h struct drm_display_mode *adjusted_mode, int x, int y, x 359 drivers/gpu/drm/gma500/oaktrail_crtc.c int x, int y, x 382 drivers/gpu/drm/gma500/oaktrail_crtc.c return oaktrail_crtc_hdmi_mode_set(crtc, mode, adjusted_mode, x, y, old_fb); x 480 drivers/gpu/drm/gma500/oaktrail_crtc.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); x 589 drivers/gpu/drm/gma500/oaktrail_crtc.c int x, int y, struct drm_framebuffer *old_fb) x 612 drivers/gpu/drm/gma500/oaktrail_crtc.c offset = y * fb->pitches[0] + x * fb->format->cpp[0]; x 264 drivers/gpu/drm/gma500/oaktrail_hdmi.c int x, int y, x 353 drivers/gpu/drm/gma500/oaktrail_hdmi.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); x 94 drivers/gpu/drm/gma500/psb_intel_display.c int x, int y, x 114 drivers/gpu/drm/gma500/psb_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); x 289 drivers/gpu/drm/gma500/psb_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); x 187 drivers/gpu/drm/gma500/psb_intel_drv.h #define to_gma_crtc(x) \ x 188 drivers/gpu/drm/gma500/psb_intel_drv.h container_of(x, struct gma_crtc, base) x 189 drivers/gpu/drm/gma500/psb_intel_drv.h #define to_gma_connector(x) \ x 190 drivers/gpu/drm/gma500/psb_intel_drv.h container_of(x, struct gma_connector, base) x 191 drivers/gpu/drm/gma500/psb_intel_drv.h #define to_gma_encoder(x) \ x 192 drivers/gpu/drm/gma500/psb_intel_drv.h container_of(x, struct gma_encoder, base) x 193 drivers/gpu/drm/gma500/psb_intel_drv.h #define to_psb_intel_framebuffer(x) \ x 194 drivers/gpu/drm/gma500/psb_intel_drv.h container_of(x, struct psb_intel_framebuffer, base) x 578 drivers/gpu/drm/gma500/psb_intel_lvds.c encoder->crtc->x, x 1804 drivers/gpu/drm/gma500/psb_intel_sdvo.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, x 1833 drivers/gpu/drm/gma500/psb_intel_sdvo.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, x 284 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void get_pll_config(unsigned long x, unsigned long y, x 291 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (hibmc_pll_table[i].hdisplay == x && x 315 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c unsigned long x, y; x 320 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c x = mode->hdisplay; x 323 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c get_pll_config(x, y, &pll1, &pll2); x 338 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c HIBMC_FIELD(HIBMC_CRT_AUTO_CENTERING_BR_RIGHT, x - 1), x 50 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h #define to_hibmc_framebuffer(x) container_of(x, struct hibmc_framebuffer, fb) x 20 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_MSCCTL_LOCALMEM_RESET(x) ((x) << 6) x 24 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CURR_GATE_DISPLAY(x) ((x) << 2) x 27 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CURR_GATE_LOCALMEM(x) ((x) << 1) x 34 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PW_MODE_CTL_OSC_INPUT(x) ((x) << 3) x 37 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PW_MODE_CTL_MODE(x) ((x) << 0) x 48 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PLL_CTRL_BYPASS(x) ((x) << 18) x 51 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PLL_CTRL_POWER(x) ((x) << 17) x 54 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PLL_CTRL_INPUT(x) ((x) << 16) x 57 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PLL_CTRL_POD(x) ((x) << 14) x 60 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PLL_CTRL_OD(x) ((x) << 12) x 63 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PLL_CTRL_N(x) ((x) << 8) x 66 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_PLL_CTRL_M(x) ((x) << 0) x 71 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_DISP_CTL_CRTSELECT(x) ((x) << 25) x 76 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_DISP_CTL_CLOCK_PHASE(x) ((x) << 14) x 79 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_DISP_CTL_VSYNC_PHASE(x) ((x) << 13) x 82 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_DISP_CTL_HSYNC_PHASE(x) ((x) << 12) x 85 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_DISP_CTL_TIMING(x) ((x) << 8) x 88 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_DISP_CTL_PLANE(x) ((x) << 2) x 91 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_DISP_CTL_FORMAT(x) ((x) << 0) x 97 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_FB_WIDTH_WIDTH(x) ((x) << 16) x 99 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_FB_WIDTH_OFFS(x) ((x) << 0) x 103 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_HORZ_TOTAL_TOTAL(x) ((x) << 16) x 106 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_HORZ_TOTAL_DISP_END(x) ((x) << 0) x 110 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_HORZ_SYNC_WIDTH(x) ((x) << 16) x 113 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_HORZ_SYNC_START(x) ((x) << 0) x 117 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_VERT_TOTAL_TOTAL(x) ((x) << 16) x 120 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_VERT_TOTAL_DISP_END(x) ((x) << 0) x 124 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_VERT_SYNC_HEIGHT(x) ((x) << 16) x 127 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_VERT_SYNC_START(x) ((x) << 0) x 132 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_AUTO_CENTERING_TL_TOP(x) ((x) << 16) x 135 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_AUTO_CENTERING_TL_LEFT(x) ((x) << 0) x 139 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_AUTO_CENTERING_BR_BOTTOM(x) ((x) << 16) x 142 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_CRT_AUTO_CENTERING_BR_RIGHT(x) ((x) << 0) x 147 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_DISPLAY_CONTROL_FPVDDEN(x) ((x) << 0) x 148 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_DISPLAY_CONTROL_PANELDATE(x) ((x) << 1) x 149 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_DISPLAY_CONTROL_FPEN(x) ((x) << 2) x 150 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_DISPLAY_CONTROL_VBIASEN(x) ((x) << 3) x 153 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_RAW_INTERRUPT_VBLANK(x) ((x) << 2) x 157 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define HIBMC_RAW_INTERRUPT_EN_VBLANK(x) ((x) << 2) x 162 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define CRT_PLL1_HS_OUTER_BYPASS(x) ((x) << 30) x 163 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define CRT_PLL1_HS_INTER_BYPASS(x) ((x) << 29) x 164 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h #define CRT_PLL1_HS_POWERON(x) ((x) << 24) x 31 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c #define ROUND(x, y) ((x) / (y) + \ x 32 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c ((x) % (y) * 10 / (y) >= 5 ? 1 : 0)) x 10 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define MASK(x) (BIT(x) - 1) x 31 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define DATA_TLPX(x) (0x20 + ((x) << 4)) x 32 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define DATA_THS_PREPARE(x) (0x21 + ((x) << 4)) x 33 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define DATA_THS_ZERO(x) (0x22 + ((x) << 4)) x 34 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define DATA_THS_TRAIL(x) (0x23 + ((x) << 4)) x 35 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define DATA_TTA_GO(x) (0x24 + ((x) << 4)) x 36 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define DATA_TTA_GET(x) (0x25 + ((x) << 4)) x 37 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h #define DATA_TWAKEUP(x) (0x26 + ((x) << 4)) x 13 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define MASK(x) (BIT(x) - 1) x 26 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_SOFT_RST_SEL(x) (0x0078 + (x) * 0x4) x 27 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_RELOAD_DIS(x) (0x00AC + (x) * 0x4) x 34 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define RD_CH_CTRL(x) (0x1004 + (x) * 0x80) x 35 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define RD_CH_ADDR(x) (0x1008 + (x) * 0x80) x 36 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define RD_CH_SIZE(x) (0x100C + (x) * 0x80) x 37 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define RD_CH_STRIDE(x) (0x1010 + (x) * 0x80) x 38 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define RD_CH_SPACE(x) (0x1014 + (x) * 0x80) x 39 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define RD_CH_EN(x) (0x1020 + (x) * 0x80) x 43 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_OVLY_CH_XY0(x) (0x2004 + (x) * 4) x 44 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_OVLY_CH_XY1(x) (0x2024 + (x) * 4) x 45 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_OVLY_CH_CTL(x) (0x204C + (x) * 4) x 46 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_OVLY_OUTPUT_SIZE(x) (0x2070 + (x) * 8) x 48 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_OVLYX_CTL(x) (0x209C + (x) * 4) x 49 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define CH_OVLY_SEL_OFST(x) ((x) * 4) x 51 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define CH_OVLY_SEL_VAL(x) ((x) + 1) x 59 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_CTRAN_DIS(x) (0x5004 + (x) * 0x100) x 62 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_CTRAN_IMAGE_SIZE(x) (0x503C + (x) * 0x100) x 64 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_CLIP_DISABLE(x) (0x6800 + (x) * 0x100) x 65 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_CLIP_SIZE0(x) (0x6804 + (x) * 0x100) x 66 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h #define ADE_CLIP_SIZE1(x) (0x6808 + (x) * 0x100) x 593 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_clip_set(void __iomem *base, u32 ch, u32 fb_w, u32 x, x 609 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c clip_left = x; x 610 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c clip_right = fb_w - (x + in_w) - 1; x 364 drivers/gpu/drm/i2c/ch7006_drv.c crtc->x, crtc->y, x 130 drivers/gpu/drm/i2c/ch7006_mode.c bitfs(CH7006_DISPMODE_INPUT_RES, e_hd##x##e_vd), \ x 102 drivers/gpu/drm/i2c/ch7006_priv.h #define to_ch7006_priv(x) \ x 103 drivers/gpu/drm/i2c/ch7006_priv.h ((struct ch7006_priv *)to_encoder_slave(x)->slave_priv) x 146 drivers/gpu/drm/i2c/ch7006_priv.h #define __bitf(src, bitfield, x) \ x 147 drivers/gpu/drm/i2c/ch7006_priv.h (((x) >> (src) << (0 ? bitfield)) & __mask(src, bitfield)) x 148 drivers/gpu/drm/i2c/ch7006_priv.h #define bitf(bitfield, x) __bitf(bitfield, x) x 150 drivers/gpu/drm/i2c/ch7006_priv.h #define setbitf(state, reg, bitfield, x) \ x 152 drivers/gpu/drm/i2c/ch7006_priv.h | bitf(reg##_##bitfield, x) x 154 drivers/gpu/drm/i2c/ch7006_priv.h #define __unbitf(src, bitfield, x) \ x 155 drivers/gpu/drm/i2c/ch7006_priv.h ((x & __mask(src, bitfield)) >> (0 ? bitfield) << (src)) x 156 drivers/gpu/drm/i2c/ch7006_priv.h #define unbitf(bitfield, x) __unbitf(bitfield, x) x 158 drivers/gpu/drm/i2c/ch7006_priv.h static inline int interpolate(int y0, int y1, int y2, int x) x 160 drivers/gpu/drm/i2c/ch7006_priv.h return y1 + (x < 50 ? y1 - y0 : y2 - y1) * (x - 50) / 50; x 163 drivers/gpu/drm/i2c/ch7006_priv.h static inline int32_t round_fixed(fixed x) x 165 drivers/gpu/drm/i2c/ch7006_priv.h return (x + fixed1/2) >> 32; x 43 drivers/gpu/drm/i2c/sil164_drv.c #define to_sil164_priv(x) \ x 44 drivers/gpu/drm/i2c/sil164_drv.c ((struct sil164_priv *)to_encoder_slave(x)->slave_priv) x 88 drivers/gpu/drm/i2c/tda998x_drv.c #define conn_to_tda998x_priv(x) \ x 89 drivers/gpu/drm/i2c/tda998x_drv.c container_of(x, struct tda998x_priv, connector) x 90 drivers/gpu/drm/i2c/tda998x_drv.c #define enc_to_tda998x_priv(x) \ x 91 drivers/gpu/drm/i2c/tda998x_drv.c container_of(x, struct tda998x_priv, encoder) x 92 drivers/gpu/drm/i2c/tda998x_drv.c #define bridge_to_tda998x_priv(x) \ x 93 drivers/gpu/drm/i2c/tda998x_drv.c container_of(x, struct tda998x_priv, bridge) x 142 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_0_SWAP_A(x) (((x) & 7) << 4) x 144 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_0_SWAP_B(x) (((x) & 7) << 0) x 147 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_1_SWAP_C(x) (((x) & 7) << 4) x 149 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_1_SWAP_D(x) (((x) & 7) << 0) x 152 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_2_SWAP_E(x) (((x) & 7) << 4) x 154 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_2_SWAP_F(x) (((x) & 7) << 0) x 165 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_4_BLC(x) (((x) & 3) << 0) x 166 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_4_BLANKIT(x) (((x) & 3) << 2) x 173 drivers/gpu/drm/i2c/tda998x_drv.c # define VIP_CNTRL_5_SP_CNT(x) (((x) & 3) << 1) x 179 drivers/gpu/drm/i2c/tda998x_drv.c # define MAT_CONTRL_MAT_SC(x) (((x) & 3) << 0) x 242 drivers/gpu/drm/i2c/tda998x_drv.c # define HVF_CNTRL_0_PREFIL(x) (((x) & 3) << 2) x 243 drivers/gpu/drm/i2c/tda998x_drv.c # define HVF_CNTRL_0_INTPOL(x) (((x) & 3) << 0) x 247 drivers/gpu/drm/i2c/tda998x_drv.c # define HVF_CNTRL_1_VQR(x) (((x) & 3) << 2) x 248 drivers/gpu/drm/i2c/tda998x_drv.c # define HVF_CNTRL_1_PAD(x) (((x) & 3) << 4) x 251 drivers/gpu/drm/i2c/tda998x_drv.c # define RPT_CNTRL_REPEAT(x) ((x) & 15) x 266 drivers/gpu/drm/i2c/tda998x_drv.c # define PLL_SERIAL_1_SRL_IZ(x) (((x) & 3) << 1) x 269 drivers/gpu/drm/i2c/tda998x_drv.c # define PLL_SERIAL_2_SRL_NOSC(x) ((x) << 0) x 270 drivers/gpu/drm/i2c/tda998x_drv.c # define PLL_SERIAL_2_SRL_PR(x) (((x) & 0xf) << 4) x 292 drivers/gpu/drm/i2c/tda998x_drv.c # define SEL_CLK_SEL_VRF_CLK(x) (((x) & 3) << 1) x 323 drivers/gpu/drm/i2c/tda998x_drv.c # define CA_I2S_CA_I2S(x) (((x) & 31) << 0) x 333 drivers/gpu/drm/i2c/tda998x_drv.c # define CTS_N_K(x) (((x) & 7) << 0) x 334 drivers/gpu/drm/i2c/tda998x_drv.c # define CTS_N_M(x) (((x) & 3) << 4) x 338 drivers/gpu/drm/i2c/tda998x_drv.c # define ENC_CNTRL_CTL_CODE(x) (((x) & 3) << 2) x 348 drivers/gpu/drm/i2c/tda998x_drv.c #define REG_CH_STAT_B(x) REG(0x11, 0x14 + (x)) /* read/write */ x 621 drivers/gpu/drm/i810/i810_dma.c unsigned int x = pbox->x1; x 623 drivers/gpu/drm/i810/i810_dma.c unsigned int width = (pbox->x2 - x) * cpp; x 625 drivers/gpu/drm/i810/i810_dma.c unsigned int start = y * pitch + x * cpp; x 24 drivers/gpu/drm/i915/display/intel_bw.h #define to_intel_bw_state(x) container_of((x), struct intel_bw_state, base) x 2190 drivers/gpu/drm/i915/display/intel_display.c u32 intel_fb_xy_to_linear(int x, int y, x 2198 drivers/gpu/drm/i915/display/intel_display.c return y * pitch + x * cpp; x 2206 drivers/gpu/drm/i915/display/intel_display.c void intel_add_fb_offsets(int *x, int *y, x 2211 drivers/gpu/drm/i915/display/intel_display.c *x += state->color_plane[color_plane].x; x 2215 drivers/gpu/drm/i915/display/intel_display.c static u32 intel_adjust_tile_offset(int *x, int *y, x 2233 drivers/gpu/drm/i915/display/intel_display.c *x += tiles % pitch_tiles * tile_width; x 2236 drivers/gpu/drm/i915/display/intel_display.c *y += *x / pitch_pixels * tile_height; x 2237 drivers/gpu/drm/i915/display/intel_display.c *x %= pitch_pixels; x 2247 drivers/gpu/drm/i915/display/intel_display.c static u32 intel_adjust_aligned_offset(int *x, int *y, x 2273 drivers/gpu/drm/i915/display/intel_display.c intel_adjust_tile_offset(x, y, tile_width, tile_height, x 2277 drivers/gpu/drm/i915/display/intel_display.c old_offset += *y * pitch + *x * cpp; x 2280 drivers/gpu/drm/i915/display/intel_display.c *x = ((old_offset - new_offset) - *y * pitch) / cpp; x 2290 drivers/gpu/drm/i915/display/intel_display.c static u32 intel_plane_adjust_aligned_offset(int *x, int *y, x 2295 drivers/gpu/drm/i915/display/intel_display.c return intel_adjust_aligned_offset(x, y, state->base.fb, color_plane, x 2316 drivers/gpu/drm/i915/display/intel_display.c int *x, int *y, x 2346 drivers/gpu/drm/i915/display/intel_display.c tiles = *x / tile_width; x 2347 drivers/gpu/drm/i915/display/intel_display.c *x %= tile_width; x 2352 drivers/gpu/drm/i915/display/intel_display.c intel_adjust_tile_offset(x, y, tile_width, tile_height, x 2356 drivers/gpu/drm/i915/display/intel_display.c offset = *y * pitch + *x * cpp; x 2360 drivers/gpu/drm/i915/display/intel_display.c *x = ((offset & alignment) - *y * pitch) / cpp; x 2366 drivers/gpu/drm/i915/display/intel_display.c static u32 intel_plane_compute_aligned_offset(int *x, int *y, x 2382 drivers/gpu/drm/i915/display/intel_display.c return intel_compute_aligned_offset(dev_priv, x, y, fb, color_plane, x 2387 drivers/gpu/drm/i915/display/intel_display.c static int intel_fb_offset_to_xy(int *x, int *y, x 2413 drivers/gpu/drm/i915/display/intel_display.c *x = 0; x 2416 drivers/gpu/drm/i915/display/intel_display.c intel_adjust_aligned_offset(x, y, x 2643 drivers/gpu/drm/i915/display/intel_display.c int x, y; x 2650 drivers/gpu/drm/i915/display/intel_display.c ret = intel_fb_offset_to_xy(&x, &y, fb, i); x 2668 drivers/gpu/drm/i915/display/intel_display.c ccs_x = (x * hsub) % tile_width; x 2670 drivers/gpu/drm/i915/display/intel_display.c main_x = intel_fb->normal[0].x % tile_width; x 2681 drivers/gpu/drm/i915/display/intel_display.c intel_fb->normal[0].x, x 2683 drivers/gpu/drm/i915/display/intel_display.c x, y); x 2698 drivers/gpu/drm/i915/display/intel_display.c (x + width) * cpp > fb->pitches[i]) { x 2708 drivers/gpu/drm/i915/display/intel_display.c intel_fb->normal[i].x = x; x 2711 drivers/gpu/drm/i915/display/intel_display.c offset = intel_compute_aligned_offset(dev_priv, &x, &y, fb, i, x 2726 drivers/gpu/drm/i915/display/intel_display.c rot_info->plane[i].width = DIV_ROUND_UP(x + width, tile_width); x 2738 drivers/gpu/drm/i915/display/intel_display.c if (x != 0) x 2742 drivers/gpu/drm/i915/display/intel_display.c r.x1 = x; x 2744 drivers/gpu/drm/i915/display/intel_display.c r.x2 = x + width; x 2750 drivers/gpu/drm/i915/display/intel_display.c x = r.x1; x 2761 drivers/gpu/drm/i915/display/intel_display.c intel_adjust_tile_offset(&x, &y, x 2772 drivers/gpu/drm/i915/display/intel_display.c intel_fb->rotated[i].x = x; x 2776 drivers/gpu/drm/i915/display/intel_display.c x * cpp, tile_size); x 2835 drivers/gpu/drm/i915/display/intel_display.c unsigned int x, y; x 2840 drivers/gpu/drm/i915/display/intel_display.c x = src_x / hsub; x 2849 drivers/gpu/drm/i915/display/intel_display.c x += intel_fb->normal[i].x; x 2852 drivers/gpu/drm/i915/display/intel_display.c offset = intel_compute_aligned_offset(dev_priv, &x, &y, x 2860 drivers/gpu/drm/i915/display/intel_display.c info->plane[i].width = DIV_ROUND_UP(x + width, tile_width); x 2867 drivers/gpu/drm/i915/display/intel_display.c r.x1 = x; x 2869 drivers/gpu/drm/i915/display/intel_display.c r.x2 = x + width; x 2875 drivers/gpu/drm/i915/display/intel_display.c x = r.x1; x 2892 drivers/gpu/drm/i915/display/intel_display.c intel_adjust_tile_offset(&x, &y, x 2900 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[i].x = x; x 2937 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[i].x = fb->rotated[i].x; x 2940 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[i].x = fb->normal[i].x; x 3356 drivers/gpu/drm/i915/display/intel_display.c int aux_x = plane_state->color_plane[1].x; x 3362 drivers/gpu/drm/i915/display/intel_display.c int x, y; x 3370 drivers/gpu/drm/i915/display/intel_display.c x = aux_x / hsub; x 3372 drivers/gpu/drm/i915/display/intel_display.c aux_offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 1, x 3374 drivers/gpu/drm/i915/display/intel_display.c aux_x = x * hsub + aux_x % hsub; x 3382 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[1].x = aux_x; x 3393 drivers/gpu/drm/i915/display/intel_display.c int x = plane_state->base.src.x1 >> 16; x 3414 drivers/gpu/drm/i915/display/intel_display.c intel_add_fb_offsets(&x, &y, plane_state, 0); x 3415 drivers/gpu/drm/i915/display/intel_display.c offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 0); x 3424 drivers/gpu/drm/i915/display/intel_display.c offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0, x 3436 drivers/gpu/drm/i915/display/intel_display.c while ((x + w) * cpp > plane_state->color_plane[0].stride) { x 3442 drivers/gpu/drm/i915/display/intel_display.c offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0, x 3452 drivers/gpu/drm/i915/display/intel_display.c while (!skl_check_main_ccs_coordinates(plane_state, x, y, offset)) { x 3456 drivers/gpu/drm/i915/display/intel_display.c offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0, x 3460 drivers/gpu/drm/i915/display/intel_display.c if (x != plane_state->color_plane[1].x || y != plane_state->color_plane[1].y) { x 3467 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[0].x = x; x 3475 drivers/gpu/drm/i915/display/intel_display.c (x << 16) - plane_state->base.src.x1, x 3487 drivers/gpu/drm/i915/display/intel_display.c int x = plane_state->base.src.x1 >> 17; x 3493 drivers/gpu/drm/i915/display/intel_display.c intel_add_fb_offsets(&x, &y, plane_state, 1); x 3494 drivers/gpu/drm/i915/display/intel_display.c offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 1); x 3504 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[1].x = x; x 3517 drivers/gpu/drm/i915/display/intel_display.c int x = src_x / hsub; x 3521 drivers/gpu/drm/i915/display/intel_display.c intel_add_fb_offsets(&x, &y, plane_state, 1); x 3522 drivers/gpu/drm/i915/display/intel_display.c offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 1); x 3525 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[1].x = x * hsub + src_x % hsub; x 3557 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[1].x = 0; x 3717 drivers/gpu/drm/i915/display/intel_display.c plane_state->color_plane[0].x = src_x; x 3782 drivers/gpu/drm/i915/display/intel_display.c int x = plane_state->color_plane[0].x; x 3794 drivers/gpu/drm/i915/display/intel_display.c linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); x 3822 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE_FW(DSPOFFSET(i9xx_plane), (y << 16) | x); x 3825 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE_FW(DSPTILEOFF(i9xx_plane), (y << 16) | x); x 10530 drivers/gpu/drm/i915/display/intel_display.c int x = plane_state->base.crtc_x; x 10534 drivers/gpu/drm/i915/display/intel_display.c if (x < 0) { x 10536 drivers/gpu/drm/i915/display/intel_display.c x = -x; x 10538 drivers/gpu/drm/i915/display/intel_display.c pos |= x << CURSOR_X_SHIFT; x 11984 drivers/gpu/drm/i915/display/intel_display.c #define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x x 437 drivers/gpu/drm/i915/display/intel_display.h unsigned int intel_fb_xy_to_linear(int x, int y, x 442 drivers/gpu/drm/i915/display/intel_display.h void intel_add_fb_offsets(int *x, int *y, x 589 drivers/gpu/drm/i915/display/intel_display.h #define I915_STATE_WARN_ON(x) \ x 590 drivers/gpu/drm/i915/display/intel_display.h I915_STATE_WARN((x), "%s", "WARN_ON(" __stringify(x) ")") x 92 drivers/gpu/drm/i915/display/intel_display_types.h unsigned int x, y; x 96 drivers/gpu/drm/i915/display/intel_display_types.h unsigned int x, y; x 435 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_digital_connector_state(x) container_of(x, struct intel_digital_connector_state, base) x 525 drivers/gpu/drm/i915/display/intel_display_types.h int x, y; x 1086 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base) x 1087 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) x 1088 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, base) x 1089 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_connector(x) container_of(x, struct intel_connector, base) x 1090 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) x 1091 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) x 1092 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_plane(x) container_of(x, struct intel_plane, base) x 1093 drivers/gpu/drm/i915/display/intel_display_types.h #define to_intel_plane_state(x) container_of(x, struct intel_plane_state, base) x 1094 drivers/gpu/drm/i915/display/intel_display_types.h #define intel_fb_obj(x) ((x) ? to_intel_bo((x)->obj[0]) : NULL) x 682 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.adjusted_x = plane_state->color_plane[0].x; x 1451 drivers/gpu/drm/i915/display/intel_overlay.c #define P(x) i915_error_printf(m, " " #x ": 0x%08x\n", error->regs.x) x 182 drivers/gpu/drm/i915/display/intel_panel.c int x = 0, y = 0, width = 0, height = 0; x 194 drivers/gpu/drm/i915/display/intel_panel.c x = (adjusted_mode->crtc_hdisplay - width + 1)/2; x 209 drivers/gpu/drm/i915/display/intel_panel.c x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; x 217 drivers/gpu/drm/i915/display/intel_panel.c x = 0; x 220 drivers/gpu/drm/i915/display/intel_panel.c x = y = 0; x 228 drivers/gpu/drm/i915/display/intel_panel.c x = y = 0; x 239 drivers/gpu/drm/i915/display/intel_panel.c pipe_config->pch_pfit.pos = (x << 16) | y; x 416 drivers/gpu/drm/i915/display/intel_sprite.c #define ROFF(x) (((x) & 0xffff) << 16) x 417 drivers/gpu/drm/i915/display/intel_sprite.c #define GOFF(x) (((x) & 0xffff) << 0) x 418 drivers/gpu/drm/i915/display/intel_sprite.c #define BOFF(x) (((x) & 0xffff) << 16) x 553 drivers/gpu/drm/i915/display/intel_sprite.c u32 x = plane_state->color_plane[color_plane].x; x 627 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (y << 16) | x); x 632 drivers/gpu/drm/i915/display/intel_sprite.c plane_state->color_plane[1].x); x 945 drivers/gpu/drm/i915/display/intel_sprite.c u32 x = plane_state->color_plane[0].x; x 956 drivers/gpu/drm/i915/display/intel_sprite.c linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); x 976 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x); x 1161 drivers/gpu/drm/i915/display/intel_sprite.c u32 x = plane_state->color_plane[0].x; x 1179 drivers/gpu/drm/i915/display/intel_sprite.c linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); x 1198 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPROFFSET(pipe), (y << 16) | x); x 1201 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPRTILEOFF(pipe), (y << 16) | x); x 1414 drivers/gpu/drm/i915/display/intel_sprite.c u32 x = plane_state->color_plane[0].x; x 1432 drivers/gpu/drm/i915/display/intel_sprite.c linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); x 1448 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x); x 881 drivers/gpu/drm/i915/display/intel_tv.c #define to_intel_tv_connector_state(x) container_of(x, struct intel_tv_connector_state, base) x 2019 drivers/gpu/drm/i915/gem/i915_gem_context.c #define MAP(x, y) [ilog2(I915_CONTEXT_CLONE_##x)] = y x 1445 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) x 1497 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c #define pr_fmt(x) "context_barrier_task():" # x x 1592 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c #define pr_fmt(x) x x 31 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c u64 x, y; x 36 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c y = div64_u64_rem(v, tile->stride, &x); x 41 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += div64_u64_rem(x, tile->width, &x) << tile->size; x 42 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += x; x 48 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += div64_u64_rem(x, ytile_span, &x) * ytile_height; x 49 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += x; x 55 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += div64_u64_rem(x, ytile_span, &x) * ytile_height; x 56 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += x; x 1130 drivers/gpu/drm/i915/gt/intel_engine_cs.c char *buf, int x, int len) x 1133 drivers/gpu/drm/i915/gt/intel_engine_cs.c return x; x 1135 drivers/gpu/drm/i915/gt/intel_engine_cs.c x += snprintf(buf + x, len - x, x 1138 drivers/gpu/drm/i915/gt/intel_engine_cs.c return x; x 1147 drivers/gpu/drm/i915/gt/intel_engine_cs.c int x = 0; x 1149 drivers/gpu/drm/i915/gt/intel_engine_cs.c x = print_sched_attr(rq->i915, &rq->sched.attr, buf, x, sizeof(buf)); x 96 drivers/gpu/drm/i915/gt/intel_engine_user.c #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } x 134 drivers/gpu/drm/i915/gt/intel_gpu_commands.h #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1) x 270 drivers/gpu/drm/i915/gt/selftest_timeline.c u32 x; x 273 drivers/gpu/drm/i915/gt/selftest_timeline.c WRITE_ONCE(x, prandom_u32_state(&prng)); x 36 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h #define GUC_LOG_LEVEL_IS_ENABLED(x) ((x) > GUC_LOG_LEVEL_DISABLED) x 37 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h #define GUC_LOG_LEVEL_IS_VERBOSE(x) ((x) > GUC_LOG_LEVEL_NON_VERBOSE) x 38 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h #define GUC_LOG_LEVEL_TO_VERBOSITY(x) ({ \ x 39 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h typeof(x) _x = (x); \ x 42 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h #define GUC_VERBOSITY_TO_LOG_LEVEL(x) ((x) + 2) x 114 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h #define GEN8_DRBREGL(x) _MMIO(0x1000 + (x) * 8) x 116 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h #define GEN8_DRBREGU(x) _MMIO(0x1000 + (x) * 8 + 4) x 125 drivers/gpu/drm/i915/gvt/cmd_parser.c #define BATCH_BUFFER_ADR_SPACE_BIT(x) (((x) >> 8) & 1U) x 126 drivers/gpu/drm/i915/gvt/cmd_parser.c #define BATCH_BUFFER_2ND_LEVEL_BIT(x) ((x) >> 22 & 1U) x 129 drivers/gpu/drm/i915/gvt/cmd_parser.c #define OP_2D(x) ((2<<7) | x) x 479 drivers/gpu/drm/i915/gvt/gtt.c unsigned long x = (gma >> I915_GTT_PAGE_SHIFT); x 481 drivers/gpu/drm/i915/gvt/gtt.c trace_gma_index(__func__, gma, x); x 482 drivers/gpu/drm/i915/gvt/gtt.c return x; x 488 drivers/gpu/drm/i915/gvt/gtt.c unsigned long x = (exp); \ x 489 drivers/gpu/drm/i915/gvt/gtt.c trace_gma_index(__func__, gma, x); \ x 490 drivers/gpu/drm/i915/gvt/gtt.c return x; \ x 1174 drivers/gpu/drm/i915/gvt/handlers.c #define _vgtif_reg(x) \ x 1175 drivers/gpu/drm/i915/gvt/handlers.c (VGT_PVINFO_PAGE + offsetof(struct vgt_if, x)) x 45 drivers/gpu/drm/i915/gvt/scheduler.c #define RING_CTX_OFF(x) \ x 46 drivers/gpu/drm/i915/gvt/scheduler.c offsetof(struct execlist_ring_context, x) x 1413 drivers/gpu/drm/i915/gvt/scheduler.c #define RING_CTX_OFF(x) \ x 1414 drivers/gpu/drm/i915/gvt/scheduler.c offsetof(struct execlist_ring_context, x) x 42 drivers/gpu/drm/i915/i915_active.c #define take_preallocated_barriers(x) llist_del_all(&(x)->preallocated_barriers) x 68 drivers/gpu/drm/i915/i915_active.c static inline struct active_node *barrier_from_ll(struct llist_node *x) x 70 drivers/gpu/drm/i915/i915_active.c return container_of((struct list_head *)x, x 874 drivers/gpu/drm/i915/i915_cmd_parser.c static inline u32 cmd_header_key(u32 x) x 876 drivers/gpu/drm/i915/i915_cmd_parser.c switch (x >> INSTR_CLIENT_SHIFT) { x 879 drivers/gpu/drm/i915/i915_cmd_parser.c return x >> STD_MI_OPCODE_SHIFT; x 881 drivers/gpu/drm/i915/i915_cmd_parser.c return x >> STD_3D_OPCODE_SHIFT; x 883 drivers/gpu/drm/i915/i915_cmd_parser.c return x >> STD_2D_OPCODE_SHIFT; x 108 drivers/gpu/drm/i915/i915_debugfs.c size_t x = 0; x 124 drivers/gpu/drm/i915/i915_debugfs.c x += snprintf(buf + x, len - x, "2M, "); x 126 drivers/gpu/drm/i915/i915_debugfs.c x += snprintf(buf + x, len - x, "64K, "); x 128 drivers/gpu/drm/i915/i915_debugfs.c x += snprintf(buf + x, len - x, "4K, "); x 129 drivers/gpu/drm/i915/i915_debugfs.c buf[x-2] = '\0'; x 116 drivers/gpu/drm/i915/i915_gem_gtt.c #define as_pd(x) container_of((x), typeof(struct i915_page_directory), pt) x 137 drivers/gpu/drm/i915/i915_gem_gtt.h #define GEN8_PPAT_AGE(x) ((x)<<4) x 146 drivers/gpu/drm/i915/i915_gem_gtt.h #define GEN8_PPAT(i, x) ((u64)(x) << ((i) * 8)) x 247 drivers/gpu/drm/i915/i915_gem_gtt.h #define __px_choose_expr(x, type, expr, other) \ x 249 drivers/gpu/drm/i915/i915_gem_gtt.h __builtin_types_compatible_p(typeof(x), type) || \ x 250 drivers/gpu/drm/i915/i915_gem_gtt.h __builtin_types_compatible_p(typeof(x), const type), \ x 251 drivers/gpu/drm/i915/i915_gem_gtt.h ({ type __x = (type)(x); expr; }), \ x 1672 drivers/gpu/drm/i915/i915_gpu_error.c #define DAY_AS_SECONDS(x) (24 * 60 * 60 * (x)) x 184 drivers/gpu/drm/i915/i915_params.c const void *x) x 187 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%s\n", name, yesno(*(const bool *)x)); x 189 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%d\n", name, *(const int *)x); x 191 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%u\n", name, *(const unsigned int *)x); x 193 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%s\n", name, *(const char **)x); x 208 drivers/gpu/drm/i915/i915_params.c #define PRINT(T, x, ...) _print_param(p, #x, #T, ¶ms->x); x 213 drivers/gpu/drm/i915/i915_params.c static __always_inline void dup_param(const char *type, void *x) x 216 drivers/gpu/drm/i915/i915_params.c *(void **)x = kstrdup(*(void **)x, GFP_ATOMIC); x 222 drivers/gpu/drm/i915/i915_params.c #define DUP(T, x, ...) dup_param(#T, &dest->x); x 227 drivers/gpu/drm/i915/i915_params.c static __always_inline void free_param(const char *type, void *x) x 230 drivers/gpu/drm/i915/i915_params.c kfree(*(void **)x); x 231 drivers/gpu/drm/i915/i915_params.c *(void **)x = NULL; x 238 drivers/gpu/drm/i915/i915_params.c #define FREE(T, x, ...) free_param(#T, ¶ms->x); x 37 drivers/gpu/drm/i915/i915_pci.c #define PLATFORM(x) .platform = (x) x 38 drivers/gpu/drm/i915/i915_pci.c #define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1) x 22 drivers/gpu/drm/i915/i915_priolist_types.h #define I915_USER_PRIORITY(x) ((x) << I915_USER_PRIORITY_SHIFT) x 115 drivers/gpu/drm/i915/i915_pvinfo.h #define vgtif_offset(x) (offsetof(struct vgt_if, x)) x 117 drivers/gpu/drm/i915/i915_pvinfo.h #define vgtif_reg(x) _MMIO(VGT_PVINFO_PAGE + vgtif_offset(x)) x 1417 drivers/gpu/drm/i915/i915_reg.h #define DPIO_TX2_STAGGER_MASK(x) ((x) << 24) x 1439 drivers/gpu/drm/i915/i915_reg.h #define DPIO_TX2_STAGGER_MULT(x) ((x) << 20) x 1440 drivers/gpu/drm/i915/i915_reg.h #define DPIO_TX1_STAGGER_MULT(x) ((x) << 16) x 1441 drivers/gpu/drm/i915/i915_reg.h #define DPIO_TX1_STAGGER_MASK(x) ((x) << 8) x 1443 drivers/gpu/drm/i915/i915_reg.h #define DPIO_LANESTAGGER_STRAP(x) ((x) << 0) x 1671 drivers/gpu/drm/i915/i915_reg.h #define PORT_PLL_P1(x) ((x) << PORT_PLL_P1_SHIFT) x 1674 drivers/gpu/drm/i915/i915_reg.h #define PORT_PLL_P2(x) ((x) << PORT_PLL_P2_SHIFT) x 1696 drivers/gpu/drm/i915/i915_reg.h #define PORT_PLL_N(x) ((x) << PORT_PLL_N_SHIFT) x 1704 drivers/gpu/drm/i915/i915_reg.h #define PORT_PLL_INT_COEFF(x) ((x) << 8) x 1706 drivers/gpu/drm/i915/i915_reg.h #define PORT_PLL_GAIN_CTL(x) ((x) << 16) x 1716 drivers/gpu/drm/i915/i915_reg.h #define PORT_PLL_DCO_AMP(x) ((x) << 10) x 1865 drivers/gpu/drm/i915/i915_reg.h #define LATENCY_OPTIM_VAL(x) ((x) << 2) x 1911 drivers/gpu/drm/i915/i915_reg.h #define SWING_SEL_UPPER(x) (((x) >> 3) << 15) x 1913 drivers/gpu/drm/i915/i915_reg.h #define SWING_SEL_LOWER(x) (((x) & 0x7) << 11) x 1916 drivers/gpu/drm/i915/i915_reg.h #define FRC_LATENCY_OPTIM_VAL(x) ((x) << 8) x 1917 drivers/gpu/drm/i915/i915_reg.h #define RCOMP_SCALAR(x) ((x) << 0) x 1932 drivers/gpu/drm/i915/i915_reg.h #define POST_CURSOR_1(x) ((x) << 12) x 1934 drivers/gpu/drm/i915/i915_reg.h #define POST_CURSOR_2(x) ((x) << 6) x 1936 drivers/gpu/drm/i915/i915_reg.h #define CURSOR_COEFF(x) ((x) << 0) x 1947 drivers/gpu/drm/i915/i915_reg.h #define SCALING_MODE_SEL(x) ((x) << 18) x 1949 drivers/gpu/drm/i915/i915_reg.h #define RTERM_SELECT(x) ((x) << 3) x 1958 drivers/gpu/drm/i915/i915_reg.h #define N_SCALAR(x) ((x) << 24) x 2047 drivers/gpu/drm/i915/i915_reg.h #define CRI_TXDEEMPH_OVERRIDE_17_12(x) ((x) << 0) x 2075 drivers/gpu/drm/i915/i915_reg.h #define CRI_TXDEEMPH_OVERRIDE_11_6(x) ((x) << 24) x 2078 drivers/gpu/drm/i915/i915_reg.h #define CRI_TXDEEMPH_OVERRIDE_5_0(x) ((x) << 16) x 2080 drivers/gpu/drm/i915/i915_reg.h #define CRI_LOADGEN_SEL(x) ((x) << 12) x 2121 drivers/gpu/drm/i915/i915_reg.h #define CFG_AMI_CK_DIV_OVERRIDE_VAL(x) ((x) << 25) x 2152 drivers/gpu/drm/i915/i915_reg.h #define MG_MISC_SUS0_SUSCLK_DYNCLKGATE_MODE(x) ((x) << 14) x 2456 drivers/gpu/drm/i915/i915_reg.h #define GEN8_RING_FAULT_ENGINE_ID(x) (((x) >> 12) & 0x7) x 2458 drivers/gpu/drm/i915/i915_reg.h #define RING_FAULT_SRCID(x) (((x) >> 3) & 0xff) x 2459 drivers/gpu/drm/i915/i915_reg.h #define RING_FAULT_FAULT_TYPE(x) (((x) >> 1) & 0x3) x 2654 drivers/gpu/drm/i915/i915_reg.h #define _3D_CHICKEN_SDE_LIMIT_FIFO_POLY_DEPTH(x) ((x) << 1) /* gen8+ */ x 2767 drivers/gpu/drm/i915/i915_reg.h #define MBUS_ABOX_BW_CREDIT(x) ((x) << 20) x 2769 drivers/gpu/drm/i915/i915_reg.h #define MBUS_ABOX_B_CREDIT(x) ((x) << 16) x 2771 drivers/gpu/drm/i915/i915_reg.h #define MBUS_ABOX_BT_CREDIT_POOL2(x) ((x) << 8) x 2773 drivers/gpu/drm/i915/i915_reg.h #define MBUS_ABOX_BT_CREDIT_POOL1(x) ((x) << 0) x 2780 drivers/gpu/drm/i915/i915_reg.h #define MBUS_DBOX_BW_CREDIT(x) ((x) << 14) x 2782 drivers/gpu/drm/i915/i915_reg.h #define MBUS_DBOX_B_CREDIT(x) ((x) << 8) x 2784 drivers/gpu/drm/i915/i915_reg.h #define MBUS_DBOX_A_CREDIT(x) ((x) << 0) x 3334 drivers/gpu/drm/i915/i915_reg.h # define PLL_REF_SDVO_HDMI_MULTIPLIER(x) (((x) - 1) << 9) x 3555 drivers/gpu/drm/i915/i915_reg.h #define PFI_CREDIT(x) (((x) - 8) << 28) /* 8-15 */ x 4714 drivers/gpu/drm/i915/i915_reg.h #define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \ x 4891 drivers/gpu/drm/i915/i915_reg.h #define UTIL_PIN_PIPE(x) ((x) << 29) x 5586 drivers/gpu/drm/i915/i915_reg.h #define TU_SIZE(x) (((x) - 1) << 25) /* default size 64 */ x 5644 drivers/gpu/drm/i915/i915_reg.h #define PIPECONF_GAMMA_MODE(x) ((x) << 24) /* pass in GAMMA_MODE_MODE_* */ x 6163 drivers/gpu/drm/i915/i915_reg.h #define CURSOR_STRIDE(x) ((ffs(x) - 9) << CURSOR_STRIDE_SHIFT) /* 256,512,1k,2k */ x 6539 drivers/gpu/drm/i915/i915_reg.h #define SP_CONTRAST(x) ((x) << 18) /* u3.6 */ x 6540 drivers/gpu/drm/i915/i915_reg.h #define SP_BRIGHTNESS(x) ((x) & 0xff) /* s8 */ x 6542 drivers/gpu/drm/i915/i915_reg.h #define SP_SH_SIN(x) (((x) & 0x7ff) << 16) /* s4.7 */ x 6543 drivers/gpu/drm/i915/i915_reg.h #define SP_SH_COS(x) (x) /* u3.7 */ x 6594 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_OOFF(x) (((x) & 0x7ff) << 16) /* s11 */ x 6595 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_IOFF(x) (((x) & 0x7ff) << 0) /* s11 */ x 6602 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_C1(x) (((x) & 0x7fff) << 16) /* s3.12 */ x 6603 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_C0(x) (((x) & 0x7fff) << 0) /* s3.12 */ x 6608 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_IMAX(x) (((x) & 0x7ff) << 16) /* s11 */ x 6609 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_IMIN(x) (((x) & 0x7ff) << 0) /* s11 */ x 6614 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_OMAX(x) ((x) << 16) /* u10 */ x 6615 drivers/gpu/drm/i915/i915_reg.h #define SPCSC_OMIN(x) ((x) << 0) /* u10 */ x 7137 drivers/gpu/drm/i915/i915_reg.h #define PS_Y_PHASE(x) ((x) << 16) x 7138 drivers/gpu/drm/i915/i915_reg.h #define PS_UV_RGB_PHASE(x) ((x) << 0) x 7406 drivers/gpu/drm/i915/i915_reg.h #define GEN11_GT_DW_IRQ(x) (1 << (x)) x 7470 drivers/gpu/drm/i915/i915_reg.h #define GEN11_VECS(x) (31 - (x)) x 7471 drivers/gpu/drm/i915/i915_reg.h #define GEN11_VCS(x) (x) x 7473 drivers/gpu/drm/i915/i915_reg.h #define GEN11_GT_INTR_DW(x) _MMIO(0x190018 + ((x) * 4)) x 7478 drivers/gpu/drm/i915/i915_reg.h #define GEN11_INTR_ENGINE_CLASS(x) (((x) & GENMASK(18, 16)) >> 16) x 7479 drivers/gpu/drm/i915/i915_reg.h #define GEN11_INTR_ENGINE_INSTANCE(x) (((x) & GENMASK(25, 20)) >> 20) x 7480 drivers/gpu/drm/i915/i915_reg.h #define GEN11_INTR_ENGINE_INTR(x) ((x) & 0xffff) x 7485 drivers/gpu/drm/i915/i915_reg.h #define GEN11_INTR_IDENTITY_REG(x) _MMIO(0x190060 + ((x) * 4)) x 7490 drivers/gpu/drm/i915/i915_reg.h #define GEN11_IIR_REG_SELECTOR(x) _MMIO(0x190070 + ((x) * 4)) x 7678 drivers/gpu/drm/i915/i915_reg.h #define L3_GENERAL_PRIO_CREDITS(x) (((x) >> 1) << 19) x 7679 drivers/gpu/drm/i915/i915_reg.h #define L3_HIGH_PRIO_CREDITS(x) (((x) >> 1) << 14) x 8332 drivers/gpu/drm/i915/i915_reg.h #define CHASSIS_CLK_REQ_DURATION(x) ((x) << 8) x 8437 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_PWRDN_LANE1_VAL(x) ((x) << 26) x 8439 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_PWRDN_LANE0_VAL(x) ((x) << 24) x 8631 drivers/gpu/drm/i915/i915_reg.h #define IDIHASHMSK(x) (((x) & 0x3f) << 16) x 8671 drivers/gpu/drm/i915/i915_reg.h #define GEN6_FREQUENCY(x) ((x) << 25) x 8672 drivers/gpu/drm/i915/i915_reg.h #define HSW_FREQUENCY(x) ((x) << 24) x 8673 drivers/gpu/drm/i915/i915_reg.h #define GEN9_FREQUENCY(x) ((x) << 23) x 8674 drivers/gpu/drm/i915/i915_reg.h #define GEN6_OFFSET(x) ((x) << 19) x 8685 drivers/gpu/drm/i915/i915_reg.h #define GEN6_RC_CTL_EI_MODE(x) ((x) << 27) x 9312 drivers/gpu/drm/i915/i915_reg.h #define _PORT_HDCP_AUTHENC(port, x) _MMIO(_PICK(port, \ x 9318 drivers/gpu/drm/i915/i915_reg.h _PORTF_HDCP_AUTHENC) + (x)) x 9339 drivers/gpu/drm/i915/i915_reg.h #define HDCP_STATUS_FRAME_CNT(x) (((x) >> 8) & 0xff) x 9348 drivers/gpu/drm/i915/i915_reg.h #define _PORT_HDCP2_BASE(port, x) _MMIO(_PICK((port), \ x 9354 drivers/gpu/drm/i915/i915_reg.h _PORTF_HDCP2_BASE) + (x)) x 9389 drivers/gpu/drm/i915/i915_reg.h #define TRANS_DDI_SELECT_PORT(x) ((x) << TRANS_DDI_PORT_SHIFT) x 9390 drivers/gpu/drm/i915/i915_reg.h #define TGL_TRANS_DDI_SELECT_PORT(x) (((x) + 1) << TGL_TRANS_DDI_PORT_SHIFT) x 9431 drivers/gpu/drm/i915/i915_reg.h #define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) << 0) x 9512 drivers/gpu/drm/i915/i915_reg.h #define SBI_SSCDIVINTPHASE_DIVSEL(x) ((x) << 1) x 9515 drivers/gpu/drm/i915/i915_reg.h #define SBI_SSCDIVINTPHASE_INCVAL(x) ((x) << 8) x 9516 drivers/gpu/drm/i915/i915_reg.h #define SBI_SSCDIVINTPHASE_DIR(x) ((x) << 15) x 9526 drivers/gpu/drm/i915/i915_reg.h #define SBI_SSCAUXDIV_FINALDIV2SEL(x) ((x) << 4) x 9562 drivers/gpu/drm/i915/i915_reg.h #define WRPLL_DIVIDER_REFERENCE(x) ((x) << 0) x 9564 drivers/gpu/drm/i915/i915_reg.h #define WRPLL_DIVIDER_POST(x) ((x) << 8) x 9567 drivers/gpu/drm/i915/i915_reg.h #define WRPLL_DIVIDER_FEEDBACK(x) ((x) << 16) x 9601 drivers/gpu/drm/i915/i915_reg.h #define TRANS_CLK_SEL_PORT(x) (((x) + 1) << 29) x 9603 drivers/gpu/drm/i915/i915_reg.h #define TGL_TRANS_CLK_SEL_PORT(x) (((x) + 1) << 28) x 9706 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR1_DCO_FRACTION(x) ((x) << 9) x 9713 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR2_QDIV_RATIO(x) ((x) << 8) x 9714 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR2_QDIV_MODE(x) ((x) << 7) x 9716 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR2_KDIV(x) ((x) << 5) x 9722 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR2_PDIV(x) ((x) << 2) x 9775 drivers/gpu/drm/i915/i915_reg.h #define MG_REFCLKIN_CTL_OD_2_MUX(x) ((x) << 8) x 9785 drivers/gpu/drm/i915/i915_reg.h #define MG_CLKTOP2_CORECLKCTL1_B_DIVRATIO(x) ((x) << 16) x 9787 drivers/gpu/drm/i915/i915_reg.h #define MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO(x) ((x) << 8) x 9797 drivers/gpu/drm/i915/i915_reg.h #define MG_CLKTOP2_HSCLKCTL_CORE_INPUTSEL(x) ((x) << 16) x 9799 drivers/gpu/drm/i915/i915_reg.h #define MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL(x) ((x) << 14) x 9806 drivers/gpu/drm/i915/i915_reg.h #define MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO(x) ((x) << 8) x 9820 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_DIV0_FBDIV_FRAC(x) ((x) << 8) x 9822 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_DIV0_FBDIV_INT(x) ((x) << 0) x 9830 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_DIV1_IREF_NDIVRATIO(x) ((x) << 16) x 9835 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_DIV1_NDIVRATIO(x) ((x) << 4) x 9837 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_DIV1_FBPREDIV(x) ((x) << 0) x 9845 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_LF_TDCTARGETCNT(x) ((x) << 24) x 9848 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_LF_GAINCTRL(x) ((x) << 16) x 9849 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_LF_INT_COEFF(x) ((x) << 8) x 9850 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_LF_PROP_COEFF(x) ((x) << 0) x 9860 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_FRAC_LOCK_LOCKTHRESH(x) ((x) << 11) x 9863 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_FRAC_LOCK_FEEDFWRDGAIN(x) ((x) << 0) x 9873 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_SSC_TYPE(x) ((x) << 26) x 9874 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_SSC_STEPLENGTH(x) ((x) << 16) x 9875 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_SSC_STEPNUM(x) ((x) << 10) x 9877 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_SSC_STEPSIZE(x) ((x) << 0) x 9885 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_BIAS_BIAS_GB_SEL(x) ((x) << 30) x 9887 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_BIAS_INIT_DCOAMP(x) ((x) << 24) x 9889 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_BIAS_BIAS_BONUS(x) ((x) << 16) x 9892 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_BIAS_CTRIM(x) ((x) << 8) x 9894 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_BIAS_VREF_RDAC(x) ((x) << 5) x 9896 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_BIAS_IREFTRIM(x) ((x) << 0) x 9906 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_TDC_COLDST_REFBIAS_START_PULSE_W(x) ((x) << 17) x 9909 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_TDC_TDCSEL(x) ((x) << 0) x 9930 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR0_DCO_FRACTION(x) ((x) << 10) x 9938 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR1_QDIV_RATIO(x) ((x) << 10) x 9940 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR1_QDIV_MODE(x) ((x) << 9) x 9943 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR1_KDIV(x) ((x) << 6) x 9949 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR1_PDIV(x) ((x) << 2) x 9987 drivers/gpu/drm/i915/i915_reg.h #define BXT_DE_PLL_RATIO(x) (x) /* {60,65,100} * 19.2MHz */ x 9993 drivers/gpu/drm/i915/i915_reg.h #define CNL_CDCLK_PLL_RATIO(x) (x) x 10018 drivers/gpu/drm/i915/i915_reg.h #define BXT_D_CR_DRP0_DUNIT(x) _MMIO(MCHBAR_MIRROR_BASE_SNB + \ x 10019 drivers/gpu/drm/i915/i915_reg.h _PICK_EVEN((x) - 8, BXT_D_CR_DRP0_DUNIT8,\ x 10095 drivers/gpu/drm/i915/i915_reg.h #define PIPE_WM_LINETIME_TIME(x) ((x)) x 10097 drivers/gpu/drm/i915/i915_reg.h #define PIPE_WM_LINETIME_IPS_LINETIME(x) ((x) << 16) x 10240 drivers/gpu/drm/i915/i915_reg.h #define PAL_PREC_INDEX_VALUE(x) ((x) << 0) x 10870 drivers/gpu/drm/i915/i915_reg.h #define CLK_PREPARE(x) ((x) << 28) x 10874 drivers/gpu/drm/i915/i915_reg.h #define CLK_ZERO(x) ((x) << 20) x 10878 drivers/gpu/drm/i915/i915_reg.h #define CLK_PRE(x) ((x) << 16) x 10882 drivers/gpu/drm/i915/i915_reg.h #define CLK_POST(x) ((x) << 8) x 10886 drivers/gpu/drm/i915/i915_reg.h #define CLK_TRAIL(x) ((x) << 0) x 10901 drivers/gpu/drm/i915/i915_reg.h #define HS_PREPARE(x) ((x) << 24) x 10905 drivers/gpu/drm/i915/i915_reg.h #define HS_ZERO(x) ((x) << 16) x 10909 drivers/gpu/drm/i915/i915_reg.h #define HS_TRAIL(x) ((x) << 8) x 10913 drivers/gpu/drm/i915/i915_reg.h #define HS_EXIT(x) ((x) << 0) x 10928 drivers/gpu/drm/i915/i915_reg.h #define TA_SURE(x) ((x) << 16) x 10932 drivers/gpu/drm/i915/i915_reg.h #define TA_GO(x) ((x) << 8) x 10936 drivers/gpu/drm/i915/i915_reg.h #define TA_GET(x) ((x) << 0) x 10963 drivers/gpu/drm/i915/i915_reg.h #define PIX_VIRT_CHAN(x) ((x) << 12) x 11054 drivers/gpu/drm/i915/i915_reg.h #define HSTX_TIMEOUT_VALUE(x) ((x) << 16) x 11065 drivers/gpu/drm/i915/i915_reg.h #define LPRX_TIMEOUT_VALUE(x) ((x) << 0) x 11074 drivers/gpu/drm/i915/i915_reg.h #define PRESET_TIMEOUT_VALUE(x) ((x) << 16) x 11077 drivers/gpu/drm/i915/i915_reg.h #define PRESPONSE_TIMEOUT_VALUE(x) ((x) << 0) x 11087 drivers/gpu/drm/i915/i915_reg.h #define TA_TIMEOUT_VALUE(x) ((x) << 0) x 11550 drivers/gpu/drm/i915/i915_reg.h #define DP_LANE_ASSIGNMENT(tc_port, x) ((x) << ((tc_port) * 8)) x 103 drivers/gpu/drm/i915/i915_selftest.h #define SUBTEST(x) { x, #x } x 105 drivers/gpu/drm/i915/i915_selftest.h #define I915_SELFTEST_DECLARE(x) x x 106 drivers/gpu/drm/i915/i915_selftest.h #define I915_SELFTEST_ONLY(x) unlikely(x) x 113 drivers/gpu/drm/i915/i915_selftest.h #define I915_SELFTEST_DECLARE(x) x 114 drivers/gpu/drm/i915/i915_selftest.h #define I915_SELFTEST_ONLY(x) 0 x 134 drivers/gpu/drm/i915/i915_sw_fence.c wait_queue_head_t *x = &fence->wait; x 148 drivers/gpu/drm/i915/i915_sw_fence.c spin_lock_irqsave_nested(&x->lock, flags, 1 + !!continuation); x 150 drivers/gpu/drm/i915/i915_sw_fence.c list_for_each_entry_safe(pos, next, &x->head, entry) { x 160 drivers/gpu/drm/i915/i915_sw_fence.c list_for_each_entry_safe(pos, next, &x->head, entry) { x 169 drivers/gpu/drm/i915/i915_sw_fence.c list_splice_tail_init(&extra, &x->head); x 172 drivers/gpu/drm/i915/i915_sw_fence.c spin_unlock_irqrestore(&x->lock, flags); x 39 drivers/gpu/drm/i915/i915_utils.h #define WARN_ON(x) ({ \ x 40 drivers/gpu/drm/i915/i915_utils.h bool __i915_warn_cond = (x); \ x 43 drivers/gpu/drm/i915/i915_utils.h WARN(__i915_warn_cond, "WARN_ON(" #x ")"); }) x 45 drivers/gpu/drm/i915/i915_utils.h #define WARN_ON(x) WARN((x), "%s", "WARN_ON(" __stringify(x) ")") x 49 drivers/gpu/drm/i915/i915_utils.h #define WARN_ON_ONCE(x) WARN_ONCE((x), "%s", "WARN_ON_ONCE(" __stringify(x) ")") x 51 drivers/gpu/drm/i915/i915_utils.h #define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \ x 52 drivers/gpu/drm/i915/i915_utils.h __stringify(x), (long)(x)) x 109 drivers/gpu/drm/i915/i915_utils.h #define overflows_type(x, T) \ x 110 drivers/gpu/drm/i915/i915_utils.h (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T)) x 225 drivers/gpu/drm/i915/i915_utils.h #define u64_to_ptr(T, x) ({ \ x 226 drivers/gpu/drm/i915/i915_utils.h typecheck(u64, x); \ x 227 drivers/gpu/drm/i915/i915_utils.h (T *)(uintptr_t)(x); \ x 396 drivers/gpu/drm/i915/i915_utils.h #define KHz(x) (1000 * (x)) x 397 drivers/gpu/drm/i915/i915_utils.h #define MHz(x) KHz(1000 * (x)) x 399 drivers/gpu/drm/i915/i915_utils.h #define KBps(x) (1000 * (x)) x 400 drivers/gpu/drm/i915/i915_utils.h #define MBps(x) KBps(1000 * (x)) x 401 drivers/gpu/drm/i915/i915_utils.h #define GBps(x) ((u64)1000 * MBps((x))) x 390 drivers/gpu/drm/i915/i915_vma.h #define IO_ERR_PTR(x) ((void __iomem *)ERR_PTR(x)) x 30 drivers/gpu/drm/i915/intel_device_info.c #define PLATFORM_NAME(x) [INTEL_##x] = #x x 8178 drivers/gpu/drm/i915/intel_pm.c unsigned long m, x, b; x 8184 drivers/gpu/drm/i915/intel_pm.c x = intel_uncore_read8(&i915->uncore, TR1); x 8188 drivers/gpu/drm/i915/intel_pm.c return ((m * x) / 127) - b; x 950 drivers/gpu/drm/i915/intel_uncore.c #define __is_genX_shadowed(x) \ x 951 drivers/gpu/drm/i915/intel_uncore.c static bool is_gen##x##_shadowed(u32 offset) \ x 953 drivers/gpu/drm/i915/intel_uncore.c const i915_reg_t *regs = gen##x##_shadowed_regs; \ x 954 drivers/gpu/drm/i915/intel_uncore.c return BSEARCH(offset, regs, ARRAY_SIZE(gen##x##_shadowed_regs), \ x 1127 drivers/gpu/drm/i915/intel_uncore.c #define GEN2_READ_HEADER(x) \ x 1128 drivers/gpu/drm/i915/intel_uncore.c u##x val = 0; \ x 1135 drivers/gpu/drm/i915/intel_uncore.c #define __gen2_read(x) \ x 1136 drivers/gpu/drm/i915/intel_uncore.c static u##x \ x 1137 drivers/gpu/drm/i915/intel_uncore.c gen2_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \ x 1138 drivers/gpu/drm/i915/intel_uncore.c GEN2_READ_HEADER(x); \ x 1139 drivers/gpu/drm/i915/intel_uncore.c val = __raw_uncore_read##x(uncore, reg); \ x 1143 drivers/gpu/drm/i915/intel_uncore.c #define __gen5_read(x) \ x 1144 drivers/gpu/drm/i915/intel_uncore.c static u##x \ x 1145 drivers/gpu/drm/i915/intel_uncore.c gen5_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \ x 1146 drivers/gpu/drm/i915/intel_uncore.c GEN2_READ_HEADER(x); \ x 1148 drivers/gpu/drm/i915/intel_uncore.c val = __raw_uncore_read##x(uncore, reg); \ x 1167 drivers/gpu/drm/i915/intel_uncore.c #define GEN6_READ_HEADER(x) \ x 1170 drivers/gpu/drm/i915/intel_uncore.c u##x val = 0; \ x 1208 drivers/gpu/drm/i915/intel_uncore.c #define __gen_read(func, x) \ x 1209 drivers/gpu/drm/i915/intel_uncore.c static u##x \ x 1210 drivers/gpu/drm/i915/intel_uncore.c func##_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \ x 1212 drivers/gpu/drm/i915/intel_uncore.c GEN6_READ_HEADER(x); \ x 1216 drivers/gpu/drm/i915/intel_uncore.c val = __raw_uncore_read##x(uncore, reg); \ x 1245 drivers/gpu/drm/i915/intel_uncore.c #define __gen2_write(x) \ x 1247 drivers/gpu/drm/i915/intel_uncore.c gen2_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { \ x 1249 drivers/gpu/drm/i915/intel_uncore.c __raw_uncore_write##x(uncore, reg, val); \ x 1253 drivers/gpu/drm/i915/intel_uncore.c #define __gen5_write(x) \ x 1255 drivers/gpu/drm/i915/intel_uncore.c gen5_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { \ x 1258 drivers/gpu/drm/i915/intel_uncore.c __raw_uncore_write##x(uncore, reg, val); \ x 1287 drivers/gpu/drm/i915/intel_uncore.c #define __gen6_write(x) \ x 1289 drivers/gpu/drm/i915/intel_uncore.c gen6_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { \ x 1293 drivers/gpu/drm/i915/intel_uncore.c __raw_uncore_write##x(uncore, reg, val); \ x 1300 drivers/gpu/drm/i915/intel_uncore.c #define __gen_write(func, x) \ x 1302 drivers/gpu/drm/i915/intel_uncore.c func##_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { \ x 1308 drivers/gpu/drm/i915/intel_uncore.c __raw_uncore_write##x(uncore, reg, val); \ x 1330 drivers/gpu/drm/i915/intel_uncore.c #define ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, x) \ x 1332 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.mmio_writeb = x##_write8; \ x 1333 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.mmio_writew = x##_write16; \ x 1334 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.mmio_writel = x##_write32; \ x 1337 drivers/gpu/drm/i915/intel_uncore.c #define ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x) \ x 1339 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.mmio_readb = x##_read8; \ x 1340 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.mmio_readw = x##_read16; \ x 1341 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.mmio_readl = x##_read32; \ x 1342 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.mmio_readq = x##_read64; \ x 1345 drivers/gpu/drm/i915/intel_uncore.c #define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \ x 1347 drivers/gpu/drm/i915/intel_uncore.c ASSIGN_RAW_WRITE_MMIO_VFUNCS((uncore), x); \ x 1348 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.write_fw_domains = x##_reg_write_fw_domains; \ x 1351 drivers/gpu/drm/i915/intel_uncore.c #define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \ x 1353 drivers/gpu/drm/i915/intel_uncore.c ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x); \ x 1354 drivers/gpu/drm/i915/intel_uncore.c (uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \ x 48 drivers/gpu/drm/i915/selftests/i915_gem.c int x; x 53 drivers/gpu/drm/i915/selftests/i915_gem.c for (x = 0; x < PAGE_SIZE / sizeof(u32); x++) { x 55 drivers/gpu/drm/i915/selftests/i915_gem.c iowrite32(prng, &s[x]); x 35 drivers/gpu/drm/i915/selftests/i915_random.c u64 x; x 37 drivers/gpu/drm/i915/selftests/i915_random.c x = prandom_u32_state(rnd); x 38 drivers/gpu/drm/i915/selftests/i915_random.c x <<= 32; x 39 drivers/gpu/drm/i915/selftests/i915_random.c x |= prandom_u32_state(rnd); x 41 drivers/gpu/drm/i915/selftests/i915_random.c return x; x 33 drivers/gpu/drm/i915/selftests/i915_random.h #define I915_RND_STATE_INITIALIZER(x) ({ \ x 35 drivers/gpu/drm/i915/selftests/i915_random.h prandom_seed_state(&state__, (x)); \ x 157 drivers/gpu/drm/i915/selftests/i915_selftest.c #define run_selftests(x, data) \ x 158 drivers/gpu/drm/i915/selftests/i915_selftest.c __run_selftests(#x, x##_selftests, ARRAY_SIZE(x##_selftests), data) x 358 drivers/gpu/drm/i915/selftests/i915_vma.c unsigned int x, x 362 drivers/gpu/drm/i915/selftests/i915_vma.c r->plane[n].offset + x); x 370 drivers/gpu/drm/i915/selftests/i915_vma.c unsigned int x, y; x 372 drivers/gpu/drm/i915/selftests/i915_vma.c for (x = 0; x < r->plane[n].width; x++) { x 379 drivers/gpu/drm/i915/selftests/i915_vma.c n, x, y); x 383 drivers/gpu/drm/i915/selftests/i915_vma.c src_idx = rotated_index(r, n, x, y); x 389 drivers/gpu/drm/i915/selftests/i915_vma.c x, y, src_idx); x 395 drivers/gpu/drm/i915/selftests/i915_vma.c x, y, src_idx); x 408 drivers/gpu/drm/i915/selftests/i915_vma.c unsigned int x, x 412 drivers/gpu/drm/i915/selftests/i915_vma.c r->plane[n].offset + x); x 420 drivers/gpu/drm/i915/selftests/i915_vma.c unsigned int x, y; x 425 drivers/gpu/drm/i915/selftests/i915_vma.c for (x = 0; x < r->plane[n].width; x++) { x 431 drivers/gpu/drm/i915/selftests/i915_vma.c n, x, y); x 439 drivers/gpu/drm/i915/selftests/i915_vma.c src_idx = remapped_index(r, n, x, y); x 445 drivers/gpu/drm/i915/selftests/i915_vma.c x, y, src_idx); x 451 drivers/gpu/drm/i915/selftests/i915_vma.c x, y, src_idx); x 894 drivers/gpu/drm/i915/selftests/i915_vma.c unsigned int x, y; x 919 drivers/gpu/drm/i915/selftests/i915_vma.c for (x = 0 ; x < p->width; x++) { x 921 drivers/gpu/drm/i915/selftests/i915_vma.c u32 val = y << 16 | x; x 924 drivers/gpu/drm/i915/selftests/i915_vma.c offset = (x * p->height + y) * PAGE_SIZE; x 926 drivers/gpu/drm/i915/selftests/i915_vma.c offset = (y * p->width + x) * PAGE_SIZE; x 950 drivers/gpu/drm/i915/selftests/i915_vma.c for (x = 0 ; x < p->width; x++) { x 952 drivers/gpu/drm/i915/selftests/i915_vma.c u32 exp = y << 16 | x; x 956 drivers/gpu/drm/i915/selftests/i915_vma.c src_idx = rotated_index(&view.rotated, 0, x, y); x 958 drivers/gpu/drm/i915/selftests/i915_vma.c src_idx = remapped_index(&view.remapped, 0, x, y); x 27 drivers/gpu/drm/i915/selftests/mock_uncore.c #define __nop_write(x) \ x 29 drivers/gpu/drm/i915/selftests/mock_uncore.c nop_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { } x 34 drivers/gpu/drm/i915/selftests/mock_uncore.c #define __nop_read(x) \ x 35 drivers/gpu/drm/i915/selftests/mock_uncore.c static u##x \ x 36 drivers/gpu/drm/i915/selftests/mock_uncore.c nop_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { return 0; } x 97 drivers/gpu/drm/imx/ipuv3-plane.c int x = state->src.x1 >> 16; x 104 drivers/gpu/drm/imx/ipuv3-plane.c fb->format->cpp[plane] * x; x 113 drivers/gpu/drm/imx/ipuv3-plane.c int x = state->src.x1 >> 16; x 119 drivers/gpu/drm/imx/ipuv3-plane.c x /= fb->format->hsub; x 123 drivers/gpu/drm/imx/ipuv3-plane.c fb->format->cpp[1] * x - eba; x 132 drivers/gpu/drm/imx/ipuv3-plane.c int x = state->src.x1 >> 16; x 138 drivers/gpu/drm/imx/ipuv3-plane.c x /= fb->format->hsub; x 142 drivers/gpu/drm/imx/ipuv3-plane.c fb->format->cpp[2] * x - eba; x 241 drivers/gpu/drm/lima/lima_regs.h #define LIMA_MMU_STATUS_BUS_ID(x) ((x >> 6) & 0x1F) x 199 drivers/gpu/drm/mediatek/mtk_disp_ovl.c unsigned int offset = (pending->y << 16) | pending->x; x 53 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_LSB_ERR_SHIFT_R(x) (((x) & 0x7) << 28) x 54 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_OVFLW_BIT_R(x) (((x) & 0x7) << 24) x 55 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_ADD_LSHIFT_R(x) (((x) & 0x7) << 20) x 56 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_ADD_RSHIFT_R(x) (((x) & 0x7) << 16) x 58 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_LSB_ERR_SHIFT_B(x) (((x) & 0x7) << 28) x 59 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_OVFLW_BIT_B(x) (((x) & 0x7) << 24) x 60 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_ADD_LSHIFT_B(x) (((x) & 0x7) << 20) x 61 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_ADD_RSHIFT_B(x) (((x) & 0x7) << 16) x 62 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_LSB_ERR_SHIFT_G(x) (((x) & 0x7) << 12) x 63 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_OVFLW_BIT_G(x) (((x) & 0x7) << 8) x 64 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_ADD_LSHIFT_G(x) (((x) & 0x7) << 4) x 65 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c #define DITHER_ADD_RSHIFT_G(x) (((x) & 0x7) << 0) x 35 drivers/gpu/drm/mediatek/mtk_drm_gem.h #define to_mtk_gem_obj(x) container_of(x, struct mtk_drm_gem_obj, base) x 131 drivers/gpu/drm/mediatek/mtk_drm_plane.c state->pending.x = plane->state->dst.x1; x 19 drivers/gpu/drm/mediatek/mtk_drm_plane.h unsigned int x; x 26 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h #define I2S_UV_CH_EN(x) BIT((x) + 2) x 40 drivers/gpu/drm/meson/meson_crtc.c #define to_meson_crtc(x) container_of(x, struct meson_crtc, base) x 152 drivers/gpu/drm/meson/meson_dw_hdmi.c #define encoder_to_meson_dw_hdmi(x) \ x 153 drivers/gpu/drm/meson/meson_dw_hdmi.c container_of(x, struct meson_dw_hdmi, encoder) x 83 drivers/gpu/drm/meson/meson_overlay.c #define to_meson_overlay(x) container_of(x, struct meson_overlay, base) x 68 drivers/gpu/drm/meson/meson_plane.c #define to_meson_plane(x) container_of(x, struct meson_plane, base) x 36 drivers/gpu/drm/meson/meson_venc_cvbs.c #define encoder_to_meson_venc_cvbs(x) \ x 37 drivers/gpu/drm/meson/meson_venc_cvbs.c container_of(x, struct meson_venc_cvbs, encoder) x 39 drivers/gpu/drm/meson/meson_venc_cvbs.c #define connector_to_meson_venc_cvbs(x) \ x 40 drivers/gpu/drm/meson/meson_venc_cvbs.c container_of(x, struct meson_venc_cvbs, connector) x 235 drivers/gpu/drm/mgag200/mgag200_cursor.c int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) x 239 drivers/gpu/drm/mgag200/mgag200_cursor.c x += 64; x 242 drivers/gpu/drm/mgag200/mgag200_cursor.c BUG_ON(x <= 0); x 244 drivers/gpu/drm/mgag200/mgag200_cursor.c BUG_ON(x & ~0xffff); x 247 drivers/gpu/drm/mgag200/mgag200_cursor.c WREG8(MGA_CURPOSXL, x & 0xff); x 248 drivers/gpu/drm/mgag200/mgag200_cursor.c WREG8(MGA_CURPOSXH, (x>>8) & 0xff); x 98 drivers/gpu/drm/mgag200/mgag200_drv.h #define to_mga_crtc(x) container_of(x, struct mga_crtc, base) x 99 drivers/gpu/drm/mgag200/mgag200_drv.h #define to_mga_encoder(x) container_of(x, struct mga_encoder, base) x 100 drivers/gpu/drm/mgag200/mgag200_drv.h #define to_mga_connector(x) container_of(x, struct mga_connector, base) x 227 drivers/gpu/drm/mgag200/mgag200_drv.h int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y); x 861 drivers/gpu/drm/mgag200/mgag200_mode.c int x, int y, int atomic) x 892 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, x 895 drivers/gpu/drm/mgag200/mgag200_mode.c return mga_crtc_do_set_base(crtc, old_fb, x, y, 0); x 901 drivers/gpu/drm/mgag200/mgag200_mode.c int x, int y, struct drm_framebuffer *old_fb) x 1140 drivers/gpu/drm/mgag200/mgag200_mode.c mga_crtc_do_set_base(crtc, old_fb, x, y, 0); x 19 drivers/gpu/drm/msm/adreno/a2xx_gpu.h #define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base) x 25 drivers/gpu/drm/msm/adreno/a3xx_gpu.h #define to_a3xx_gpu(x) container_of(x, struct a3xx_gpu, base) x 22 drivers/gpu/drm/msm/adreno/a4xx_gpu.h #define to_a4xx_gpu(x) container_of(x, struct a4xx_gpu, base) x 41 drivers/gpu/drm/msm/adreno/a5xx_gpu.h #define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base) x 26 drivers/gpu/drm/msm/adreno/a6xx_gpu.h #define to_a6xx_gpu(x) container_of(x, struct a6xx_gpu, base) x 127 drivers/gpu/drm/msm/adreno/adreno_gpu.h #define to_adreno_gpu(x) container_of(x, struct adreno_gpu, base) x 176 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base) x 213 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h #define to_dpu_crtc_state(x) \ x 214 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h container_of(x, struct dpu_crtc_state, base) x 210 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c #define to_dpu_encoder_virt(x) container_of(x, struct dpu_encoder_virt, base) x 23 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c #define to_dpu_encoder_phys_cmd(x) \ x 24 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c container_of(x, struct dpu_encoder_phys_cmd, base) x 24 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c #define to_dpu_encoder_phys_vid(x) \ x 25 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c container_of(x, struct dpu_encoder_phys_vid, base) x 368 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h #define to_dpu_format(x) container_of(x, struct dpu_format, base) x 26 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h #define DRMID(x) ((x) ? (x)->base.id : -1) x 140 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h #define to_dpu_kms(x) container_of(x, struct dpu_kms, base) x 13 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c #define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base) x 120 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c #define to_dpu_plane(x) container_of(x, struct dpu_plane, base) x 54 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h #define to_dpu_plane_state(x) \ x 55 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h container_of(x, struct dpu_plane_state, base) x 30 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c uint32_t x, y; x 59 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c #define to_mdp4_crtc(x) container_of(x, struct mdp4_crtc, base) x 396 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c MDP4_DMA_CURSOR_POS_X(mdp4_crtc->cursor.x) | x 459 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static int mdp4_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) x 465 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c mdp4_crtc->cursor.x = x; x 19 drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c #define to_mdp4_dsi_encoder(x) container_of(x, struct mdp4_dsi_encoder, base) x 20 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c #define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_dtv_encoder, base) x 43 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h #define to_mdp4_kms(x) container_of(x, struct mdp4_kms, base) x 25 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c #define to_mdp4_lcdc_encoder(x) container_of(x, struct mdp4_lcdc_encoder, base) x 16 drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_connector.c #define to_mdp4_lvds_connector(x) container_of(x, struct mdp4_lvds_connector, base) x 17 drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c #define to_mdp4_lvds_pll(x) container_of(x, struct mdp4_lvds_pll, pll_hw) x 27 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base) x 60 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c int x, y; x 63 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c #define to_mdp5_crtc(x) container_of(x, struct mdp5_crtc, base) x 775 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (mdp5_crtc->cursor.x >= 0) x 777 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc->cursor.x); x 779 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c *roi_w = mdp5_crtc->cursor.width - abs(mdp5_crtc->cursor.x); x 795 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c uint32_t x, y, src_x, src_y, width, height; x 803 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c x = mdp5_crtc->cursor.x; x 817 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (mdp5_crtc->cursor.x < 0) { x 818 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c src_x = abs(mdp5_crtc->cursor.x); x 819 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c x = 0; x 830 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c crtc->name, x, y, roi_w, roi_h, src_x, src_y); x 843 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c MDP5_LM_CURSOR_START_XY_X_START(x)); x 942 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) x 968 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc->cursor.x = x = max(x, -(int)mdp5_crtc->cursor.width); x 70 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h #define to_mdp5_kms(x) container_of(x, struct mdp5_kms, base) x 75 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h #define to_mdp5_global_state(x) container_of(x, struct mdp5_global_state, base) x 107 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h #define to_mdp5_plane_state(x) \ x 108 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h container_of(x, struct mdp5_plane_state, base) x 137 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h #define to_mdp5_crtc_state(x) \ x 138 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h container_of(x, struct mdp5_crtc_state, base) x 168 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h #define to_mdp5_encoder(x) container_of(x, struct mdp5_encoder, base) x 12 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c #define to_mdp5_mdss(x) container_of(x, struct mdp5_mdss, base) x 20 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c #define to_mdp5_plane(x) container_of(x, struct mdp5_plane, base) x 812 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c u32 x[COMP_MAX]; x 888 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c step->x[COMP_0]); x 892 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c step->x[COMP_1_2]); x 981 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = calc_scalex_steps(plane, pix_format, src_w, crtc_w, step.x); x 990 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c calc_pixel_ext(format, src_w, crtc_w, step.x, x 37 drivers/gpu/drm/msm/disp/mdp_kms.h #define to_mdp_kms(x) container_of(x, struct mdp_kms, base) x 86 drivers/gpu/drm/msm/disp/mdp_kms.h #define to_mdp_format(x) container_of(x, struct mdp_format, base) x 213 drivers/gpu/drm/msm/dsi/dsi_manager.c #define to_dsi_connector(x) container_of(x, struct dsi_connector, base) x 214 drivers/gpu/drm/msm/dsi/dsi_manager.c #define to_dsi_bridge(x) container_of(x, struct dsi_bridge, base) x 40 drivers/gpu/drm/msm/dsi/pll/dsi_pll.h #define hw_clk_to_pll(x) container_of(x, struct msm_dsi_pll, clk_hw) x 124 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c #define to_pll_10nm(x) container_of(x, struct dsi_pll_10nm, base) x 150 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c #define to_pll_14nm(x) container_of(x, struct dsi_pll_14nm, base) x 258 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c #define CEIL(x, y) (((x) + ((y) - 1)) / (y)) x 89 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c #define to_pll_28nm(x) container_of(x, struct dsi_pll_28nm, base) x 84 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c #define to_pll_28nm(x) container_of(x, struct dsi_pll_28nm, base) x 31 drivers/gpu/drm/msm/edp/edp_aux.c #define to_edp_aux(x) container_of(x, struct edp_aux, drm_aux) x 12 drivers/gpu/drm/msm/edp/edp_bridge.c #define to_edp_bridge(x) container_of(x, struct edp_bridge, base) x 14 drivers/gpu/drm/msm/edp/edp_connector.c #define to_edp_connector(x) container_of(x, struct edp_connector, base) x 15 drivers/gpu/drm/msm/hdmi/hdmi_bridge.c #define to_hdmi_bridge(x) container_of(x, struct hdmi_bridge, base) x 19 drivers/gpu/drm/msm/hdmi/hdmi_connector.c #define to_hdmi_connector(x) container_of(x, struct hdmi_connector, base) x 15 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c #define to_hdmi_i2c_adapter(x) container_of(x, struct hdmi_i2c_adapter, base) x 39 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c #define hw_clk_to_pll(x) container_of(x, struct hdmi_pll_8996, clk_hw) x 21 drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c #define hw_clk_to_pll(x) container_of(x, struct hdmi_pll_8960, clk_hw) x 439 drivers/gpu/drm/msm/msm_drv.h #define fui(x) ({BUG(); 0;}) x 440 drivers/gpu/drm/msm/msm_drv.h #define util_float_to_half(x) ({BUG(); 0;}) x 22 drivers/gpu/drm/msm/msm_fb.c #define to_msm_framebuffer(x) container_of(x, struct msm_framebuffer, base) x 22 drivers/gpu/drm/msm/msm_fbdev.c #define to_msm_fbdev(x) container_of(x, struct msm_fbdev, base) x 86 drivers/gpu/drm/msm/msm_gem.h #define to_msm_bo(x) container_of(x, struct msm_gem_object, base) x 17 drivers/gpu/drm/msm/msm_gpummu.c #define to_msm_gpummu(x) container_of(x, struct msm_gpummu, base) x 14 drivers/gpu/drm/msm/msm_iommu.c #define to_msm_iommu(x) container_of(x, struct msm_iommu, base) x 37 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10) x 38 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3) x 40 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8) x 41 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3) x 49 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16) x 50 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf) x 54 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16) x 55 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff) x 56 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff) x 57 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff) x 68 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) x 69 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) x 71 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff) x 72 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff) x 76 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16) x 77 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff) x 78 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define SET_VERT_WAIT_CNT(x) ((x) & 0xffff) x 79 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define GET_VERT_WAIT_CNT(x) ((x) & 0xffff) x 81 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */ x 82 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */ x 84 drivers/gpu/drm/mxsfb/mxsfb_regs.h #define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff) x 48 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, x 633 drivers/gpu/drm/nouveau/dispnv04/crtc.c int x, int y, struct drm_framebuffer *old_fb) x 726 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_mode_set_base(crtc, crtc->x, crtc->y, NULL); x 819 drivers/gpu/drm/nouveau/dispnv04/crtc.c int x, int y, bool atomic) x 876 drivers/gpu/drm/nouveau/dispnv04/crtc.c regp->fb_start += (y * drm_fb->pitches[0]) + (x * drm_fb->format->cpp[0]); x 897 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, x 903 drivers/gpu/drm/nouveau/dispnv04/crtc.c return nv04_crtc_do_mode_set_base(crtc, old_fb, x, y, false); x 909 drivers/gpu/drm/nouveau/dispnv04/crtc.c int x, int y, enum mode_set_atomic state) x 919 drivers/gpu/drm/nouveau/dispnv04/crtc.c return nv04_crtc_do_mode_set_base(crtc, fb, x, y, true); x 1025 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) x 1029 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc->cursor.set_pos(nv_crtc, x, y); x 1087 drivers/gpu/drm/nouveau/dispnv04/crtc.c state.pitch + state.crtc->x * x 21 drivers/gpu/drm/nouveau/dispnv04/cursor.c nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y) x 23 drivers/gpu/drm/nouveau/dispnv04/cursor.c nv_crtc->cursor_saved_x = x; nv_crtc->cursor_saved_y = y; x 27 drivers/gpu/drm/nouveau/dispnv04/cursor.c XLATE(x, 0, NV_PRAMDAC_CU_START_POS_X)); x 754 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c crtc->x, crtc->y, x 85 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h #define to_tv_enc(x) container_of(nouveau_encoder(x), \ x 117 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h static inline int interpolate(int y0, int y1, int y2, int x) x 119 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h return y1 + (x < 50 ? y1 - y0 : y2 - y1) * (x - 50) / 50; x 73 drivers/gpu/drm/nouveau/dispnv50/atom.h u16 x; x 90 drivers/gpu/drm/nouveau/dispnv50/atom.h u16 x; x 221 drivers/gpu/drm/nouveau/dispnv50/atom.h u16 x; x 207 drivers/gpu/drm/nouveau/dispnv50/base507c.c asyh->base.x = asyw->state.src.x1 >> 16; x 41 drivers/gpu/drm/nouveau/dispnv50/curs507a.c asyw->point.x); x 35 drivers/gpu/drm/nouveau/dispnv50/cursc37a.c asyw->point.x); x 188 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, asyh->core.y << 16 | asyh->core.x); x 205 drivers/gpu/drm/nouveau/dispnv50/head507d.c asyh->core.x = asyh->base.x; x 217 drivers/gpu/drm/nouveau/dispnv50/head507d.c asyh->core.x = 0; x 72 drivers/gpu/drm/nouveau/dispnv50/head827d.c evo_data(push, asyh->core.y << 16 | asyh->core.x); x 182 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, asyh->core.y << 16 | asyh->core.x); x 48 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c evo_data(push, asyw->point.y << 16 | asyw->point.x); x 312 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->point.x = asyw->state.crtc_x; x 14 drivers/gpu/drm/nouveau/include/nvif/unpack.h #define nvif_unpack(r,d,s,m,vl,vh,x) ({ \ x 21 drivers/gpu/drm/nouveau/include/nvif/unpack.h if (_ret = 0, !(x)) { \ x 41 drivers/gpu/drm/nouveau/nouveau_bios.c #define LOG_OLD_VALUE(x) x 34 drivers/gpu/drm/nouveau/nouveau_bios.h #define ROM16(x) get_unaligned_le16(&(x)) x 35 drivers/gpu/drm/nouveau/nouveau_bios.h #define ROM32(x) get_unaligned_le32(&(x)) x 36 drivers/gpu/drm/nouveau/nouveau_bios.h #define ROMPTR(d,x) ({ \ x 38 drivers/gpu/drm/nouveau/nouveau_bios.h ROM16(x) ? &drm->vbios.data[ROM16(x)] : NULL; \ x 153 drivers/gpu/drm/nouveau/nouveau_bo.c roundup_64(u64 x, u32 y) x 155 drivers/gpu/drm/nouveau/nouveau_bo.c x += y - 1; x 156 drivers/gpu/drm/nouveau/nouveau_bo.c do_div(x, y); x 157 drivers/gpu/drm/nouveau/nouveau_bo.c return x * y; x 788 drivers/gpu/drm/nouveau/nouveau_connector.c connector->encoder->crtc->x, x 59 drivers/gpu/drm/nouveau/nouveau_crtc.h void (*set_pos)(struct nouveau_crtc *, int x, int y); x 113 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c #define IS_NVA3F(x) (((x) > 0xa0 && (x) < 0xaa) || (x) == 0xaf) x 114 drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c #define IS_NVAAF(x) ((x) >= 0xaa && (x) <= 0xac) x 32 drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.c struct bit_entry x; x 34 drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.c if (bit_entry(bios, 'x', &x)) { x 39 drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.c *ver = x.version; x 40 drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.c *hdr = x.length; x 46 drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.c return x.offset; x 139 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c u32 heads, x, y, px = 0; x 146 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c x = nvkm_rd32(device, 0x610b40 + (0x540 * i)); x 147 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c y = (x & 0xffff0000) >> 16; x 148 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c x &= 0x0000ffff; x 149 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c if ((x * y) > px) { x 150 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c px = (x * y); x 80 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.c int j, x = 0; x 85 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.c x |= (0x80 | clamp(m, 0, 0x1f)) << (8 * j); x 88 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.c return x; x 26 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c #define ROM16(x) get_unaligned_le16(&(x)) x 27 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c #define ROM32(x) get_unaligned_le32(&(x)) x 129 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c u32 heads, x, y, px = 0; x 137 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c x = nvkm_rd32(device, 0x610b40 + (0x540 * i)); x 138 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c y = (x & 0xffff0000) >> 16; x 139 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c x &= 0x0000ffff; x 140 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c if ((x * y) > px) { x 141 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c px = (x * y); x 22 drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 28 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 27 drivers/gpu/drm/omapdrm/displays/encoder-opa362.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 30 drivers/gpu/drm/omapdrm/displays/encoder-tpd12s015.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 229 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c u16 x, u16 y, u16 w, u16 h) x 233 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c u16 x1 = x; x 234 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c u16 x2 = x + w - 1; x 874 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c u16 x, u16 y, u16 w, u16 h) x 880 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c dev_dbg(&ddata->pdev->dev, "update %d, %d, %d x %d\n", x, y, w, h); x 1007 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c u16 x, u16 y, u16 w, u16 h) x 1043 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c dsicm_set_update_window(ddata, x, y, w, h); x 875 drivers/gpu/drm/omapdrm/dss/dispc.c #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) x 893 drivers/gpu/drm/omapdrm/dss/dispc.c #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) x 960 drivers/gpu/drm/omapdrm/dss/dispc.c enum omap_overlay_caps caps, int x, int y) x 967 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); x 602 drivers/gpu/drm/omapdrm/dss/dsi.c #define PIS(x) (status & DSI_IRQ_##x) ? (#x " ") : "" x 634 drivers/gpu/drm/omapdrm/dss/dsi.c #define PIS(x) (status & DSI_VC_IRQ_##x) ? (#x " ") : "" x 656 drivers/gpu/drm/omapdrm/dss/dsi.c #define PIS(x) (status & DSI_CIO_IRQ_##x) ? (#x " ") : "" x 1461 drivers/gpu/drm/omapdrm/dss/dsi.c #define PIS(x) \ x 1462 drivers/gpu/drm/omapdrm/dss/dsi.c seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]); x 1484 drivers/gpu/drm/omapdrm/dss/dsi.c #define PIS(x) \ x 1485 drivers/gpu/drm/omapdrm/dss/dsi.c seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ x 1486 drivers/gpu/drm/omapdrm/dss/dsi.c stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ x 1487 drivers/gpu/drm/omapdrm/dss/dsi.c stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ x 1488 drivers/gpu/drm/omapdrm/dss/dsi.c stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ x 1489 drivers/gpu/drm/omapdrm/dss/dsi.c stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); x 1503 drivers/gpu/drm/omapdrm/dss/dsi.c #define PIS(x) \ x 1504 drivers/gpu/drm/omapdrm/dss/dsi.c seq_printf(s, "%-20s %10d\n", #x, \ x 1505 drivers/gpu/drm/omapdrm/dss/dsi.c stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); x 4223 drivers/gpu/drm/omapdrm/dss/dsi.c #define TO_DSI_T(x) ((u32)div64_u64((u64)x * 1000000000llu, byteclk)) x 4254 drivers/gpu/drm/omapdrm/dss/dsi.c #define TO_DISPC_T(x) ((u32)div64_u64((u64)x * 1000000000llu, pck)) x 445 drivers/gpu/drm/omapdrm/dss/omapdss.h u16 x, u16 y, u16 w, u16 h); x 453 drivers/gpu/drm/omapdrm/dss/omapdss.h u16 x, u16 y, u16 w, u16 h); x 18 drivers/gpu/drm/omapdrm/omap_connector.c #define to_omap_connector(x) container_of(x, struct omap_connector, base) x 18 drivers/gpu/drm/omapdrm/omap_crtc.c #define to_omap_crtc_state(x) container_of(x, struct omap_crtc_state, base) x 29 drivers/gpu/drm/omapdrm/omap_crtc.c #define to_omap_crtc(x) container_of(x, struct omap_crtc, base) x 496 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c .x0 = slice.p0.x, .y0 = slice.p0.y, x 497 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c .x1 = slice.p1.x, .y1 = slice.p1.y, x 643 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c static u32 tiler_get_address(enum tiler_fmt fmt, u32 orient, u32 x, u32 y) x 655 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c if (x < 0 || x > x_mask || y < 0 || y > y_mask) { x 657 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c x, x, x_mask, y, y, y_mask); x 663 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c x ^= x_mask; x 669 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c tmp = ((x << y_bits) + y); x 671 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c tmp = ((y << x_bits) + x); x 681 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c block->area.p0.x * geom[block->fmt].slot_w, x 686 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c u32 x, u32 y) x 692 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c (p->x * geom[block->fmt].slot_w) + x, x 961 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c .p1.x = omap_dmm->container_width - 1, x 1013 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c int x, y; x 1015 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c for (x = a->p0.x / xdiv; x <= a->p1.x / xdiv; x++) x 1016 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c if (map[y][x] == ' ' || ovw) x 1017 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c map[y][x] = c; x 1023 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c map[p->y / ydiv][p->x / xdiv] = c; x 1028 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c return map[p->y / ydiv][p->x / xdiv]; x 1055 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c if (strlen(nice) < map_width(xdiv, a->p0.x, 256 - 1)) x 1057 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c a->p0.x + xdiv, 256 - 1); x 1058 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c else if (strlen(nice) < map_width(xdiv, 0, a->p1.x)) x 1061 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c } else if (strlen(nice) + 1 < map_width(xdiv, a->p0.x, a->p1.x)) { x 1062 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c text_map(map, xdiv, nice, a->p0.y / ydiv, a->p0.x, a->p1.x); x 1070 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c if (strlen(nice) + 1 < map_width(xdiv, a->p0.x, a->p1.x)) x 1072 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c a->p0.x, a->p1.x); x 1185 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c .p1.x = omap_dmm->container_width - 1, x 82 drivers/gpu/drm/omapdrm/omap_dmm_tiler.h #define TIL_ADDR(x, orient, a)\ x 83 drivers/gpu/drm/omapdrm/omap_dmm_tiler.h ((u32) (x) | (orient) | ((a) << SHIFT_ACC_MODE)) x 103 drivers/gpu/drm/omapdrm/omap_dmm_tiler.h u32 x, u32 y); x 20 drivers/gpu/drm/omapdrm/omap_encoder.c #define to_omap_encoder(x) container_of(x, struct omap_encoder, base) x 47 drivers/gpu/drm/omapdrm/omap_fb.c #define to_omap_framebuffer(x) container_of(x, struct omap_framebuffer, base) x 83 drivers/gpu/drm/omapdrm/omap_fb.c const struct drm_format_info *format, int n, int x, int y) x 90 drivers/gpu/drm/omapdrm/omap_fb.c + (x * format->cpp[n] / (n == 0 ? 1 : format->hsub)) x 139 drivers/gpu/drm/omapdrm/omap_fb.c u32 x, y, orient = 0; x 154 drivers/gpu/drm/omapdrm/omap_fb.c x = state->src_x >> 16; x 171 drivers/gpu/drm/omapdrm/omap_fb.c x /= 2; x 179 drivers/gpu/drm/omapdrm/omap_fb.c x += w - 1; x 182 drivers/gpu/drm/omapdrm/omap_fb.c omap_gem_rotated_dma_addr(fb->obj[0], orient, x, y, x 202 drivers/gpu/drm/omapdrm/omap_fb.c info->paddr = get_linear_addr(fb, format, 0, x, y); x 216 drivers/gpu/drm/omapdrm/omap_fb.c omap_gem_rotated_dma_addr(fb->obj[1], orient, x/2, y/2, x 219 drivers/gpu/drm/omapdrm/omap_fb.c info->p_uv_addr = get_linear_addr(fb, format, 1, x, y); x 23 drivers/gpu/drm/omapdrm/omap_fbdev.c #define to_omap_fbdev(x) container_of(x, struct omap_fbdev, base) x 98 drivers/gpu/drm/omapdrm/omap_gem.c #define to_omap_bo(x) container_of(x, struct omap_gem_object, base) x 875 drivers/gpu/drm/omapdrm/omap_gem.c int x, int y, dma_addr_t *dma_addr) x 884 drivers/gpu/drm/omapdrm/omap_gem.c *dma_addr = tiler_tsptr(omap_obj->block, orient, x, y); x 1041 drivers/gpu/drm/omapdrm/omap_gem.c area->p0.x, area->p0.y, x 1042 drivers/gpu/drm/omapdrm/omap_gem.c area->p1.x, area->p1.y); x 85 drivers/gpu/drm/omapdrm/omap_gem.h int x, int y, dma_addr_t *dma_addr); x 18 drivers/gpu/drm/omapdrm/omap_plane.c #define to_omap_plane(x) container_of(x, struct omap_plane, base) x 171 drivers/gpu/drm/omapdrm/tcm-sita.c area->p0.x = pos % tcm->width; x 173 drivers/gpu/drm/omapdrm/tcm-sita.c area->p1.x = (pos + num_slots - 1) % tcm->width; x 193 drivers/gpu/drm/omapdrm/tcm-sita.c area->p0.x = pos % tcm->width; x 195 drivers/gpu/drm/omapdrm/tcm-sita.c area->p1.x = area->p0.x + w - 1; x 213 drivers/gpu/drm/omapdrm/tcm-sita.c pos = area->p0.x + area->p0.y * tcm->width; x 215 drivers/gpu/drm/omapdrm/tcm-sita.c w = area->p1.x - area->p0.x + 1; x 218 drivers/gpu/drm/omapdrm/tcm-sita.c w = area->p1.x + area->p1.y * tcm->width - pos + 1; x 44 drivers/gpu/drm/omapdrm/tcm.h u16 x; x 229 drivers/gpu/drm/omapdrm/tcm.h (slice->p0.x || (slice->p1.x != slice->tcm->width - 1))) { x 231 drivers/gpu/drm/omapdrm/tcm.h slice->p1.x = slice->tcm->width - 1; x 232 drivers/gpu/drm/omapdrm/tcm.h slice->p1.y = (slice->p0.x) ? slice->p0.y : slice->p1.y - 1; x 234 drivers/gpu/drm/omapdrm/tcm.h parent->p0.x = 0; x 247 drivers/gpu/drm/omapdrm/tcm.h area->p1.x < area->tcm->width && x 252 drivers/gpu/drm/omapdrm/tcm.h area->p0.x < area->tcm->width && x 253 drivers/gpu/drm/omapdrm/tcm.h area->p0.x + area->p0.y * area->tcm->width <= x 254 drivers/gpu/drm/omapdrm/tcm.h area->p1.x + area->p1.y * area->tcm->width) || x 257 drivers/gpu/drm/omapdrm/tcm.h area->p0.x <= area->p1.x)); x 266 drivers/gpu/drm/omapdrm/tcm.h return p->x >= a->p0.x && p->x <= a->p1.x && x 269 drivers/gpu/drm/omapdrm/tcm.h i = p->x + p->y * a->tcm->width; x 270 drivers/gpu/drm/omapdrm/tcm.h return i >= a->p0.x + a->p0.y * a->tcm->width && x 271 drivers/gpu/drm/omapdrm/tcm.h i <= a->p1.x + a->p1.y * a->tcm->width; x 278 drivers/gpu/drm/omapdrm/tcm.h return area->p1.x - area->p0.x + 1; x 292 drivers/gpu/drm/omapdrm/tcm.h (area->p1.x - area->p0.x + 1) + (area->p1.y - area->p0.y) * x 308 drivers/gpu/drm/omapdrm/tcm.h a->p1.x = (a->p0.x + num_pg - 1) % a->tcm->width; x 309 drivers/gpu/drm/omapdrm/tcm.h a->p1.y = a->p0.y + ((a->p0.x + num_pg - 1) / a->tcm->width); x 79 drivers/gpu/drm/panel/panel-sony-acx565akm.c struct spi_transfer *x, xfer[5]; x 85 drivers/gpu/drm/panel/panel-sony-acx565akm.c x = &xfer[0]; x 88 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->tx_buf = &cmd; x 89 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->bits_per_word = 9; x 90 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->len = 2; x 98 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->bits_per_word = 10; x 101 drivers/gpu/drm/panel/panel-sony-acx565akm.c spi_message_add_tail(x, &m); x 104 drivers/gpu/drm/panel/panel-sony-acx565akm.c x++; x 105 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->tx_buf = wbuf; x 106 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->len = wlen; x 107 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->bits_per_word = 9; x 108 drivers/gpu/drm/panel/panel-sony-acx565akm.c spi_message_add_tail(x, &m); x 112 drivers/gpu/drm/panel/panel-sony-acx565akm.c x++; x 113 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->rx_buf = rbuf; x 114 drivers/gpu/drm/panel/panel-sony-acx565akm.c x->len = rlen; x 115 drivers/gpu/drm/panel/panel-sony-acx565akm.c spi_message_add_tail(x, &m); x 21 drivers/gpu/drm/panel/panel-tpo-td043mtea1.c #define TPO_R02_MODE(x) ((x) & 7) x 61 drivers/gpu/drm/panfrost/panfrost_regs.h #define GPU_PERFCNT_CFG_MODE(x) (x) x 65 drivers/gpu/drm/panfrost/panfrost_regs.h #define GPU_PERFCNT_CFG_AS(x) ((x) << 4) x 66 drivers/gpu/drm/panfrost/panfrost_regs.h #define GPU_PERFCNT_CFG_SETSEL(x) ((x) << 8) x 199 drivers/gpu/drm/qxl/qxl_dev.h QXLFIXED x; x 204 drivers/gpu/drm/qxl/qxl_dev.h int32_t x; x 209 drivers/gpu/drm/qxl/qxl_dev.h int16_t x; x 830 drivers/gpu/drm/qxl/qxl_dev.h uint32_t x; x 864 drivers/gpu/drm/qxl/qxl_dev.h uint32_t x; x 108 drivers/gpu/drm/qxl/qxl_display.c if (client_head->x != c_rect->left) { x 109 drivers/gpu/drm/qxl/qxl_display.c client_head->x = c_rect->left; x 137 drivers/gpu/drm/qxl/qxl_display.c client_head->x, client_head->y); x 156 drivers/gpu/drm/qxl/qxl_display.c dev->mode_config.suggested_x_property, head->x); x 298 drivers/gpu/drm/qxl/qxl_display.c if (head->y > 8192 || head->x > 8192 || x 302 drivers/gpu/drm/qxl/qxl_display.c head->x, head->y); x 334 drivers/gpu/drm/qxl/qxl_display.c head.x = crtc->x; x 339 drivers/gpu/drm/qxl/qxl_display.c head.x += qdev->dumb_heads[i].x; x 343 drivers/gpu/drm/qxl/qxl_display.c head.x = 0; x 354 drivers/gpu/drm/qxl/qxl_display.c head.x == qdev->monitors_config->heads[i].x && x 360 drivers/gpu/drm/qxl/qxl_display.c i, head.width, head.height, head.x, head.y, x 518 drivers/gpu/drm/qxl/qxl_display.c cmd->u.set.position.x = plane->state->crtc_x + fb->hot_x; x 561 drivers/gpu/drm/qxl/qxl_display.c qdev->dumb_heads[plane->state->crtc->index].x; x 664 drivers/gpu/drm/qxl/qxl_display.c cmd->u.position.x = plane->state->crtc_x + fb->hot_x; x 757 drivers/gpu/drm/qxl/qxl_display.c head->x = surf->width; x 230 drivers/gpu/drm/qxl/qxl_draw.c drawable->u.copy.mask.pos.x = 0; x 121 drivers/gpu/drm/qxl/qxl_drv.h #define to_qxl_crtc(x) container_of(x, struct qxl_crtc, base) x 122 drivers/gpu/drm/qxl/qxl_drv.h #define drm_connector_to_qxl_output(x) container_of(x, struct qxl_output, base) x 123 drivers/gpu/drm/qxl/qxl_drv.h #define drm_encoder_to_qxl_output(x) container_of(x, struct qxl_output, enc) x 365 drivers/gpu/drm/qxl/qxl_drv.h int x, int y, int width, int height, x 219 drivers/gpu/drm/qxl/qxl_image.c image->u.bitmap.x = width; x 234 drivers/gpu/drm/qxl/qxl_image.c int x, int y, int width, int height, x 237 drivers/gpu/drm/qxl/qxl_image.c data += y * stride + x * (depth / 8); x 535 drivers/gpu/drm/r128/r128_drv.h #define OUT_RING(x) do { \ x 538 drivers/gpu/drm/r128/r128_drv.h (unsigned int)(x), write); \ x 539 drivers/gpu/drm/r128/r128_drv.h ring[write++] = cpu_to_le32(x); \ x 102 drivers/gpu/drm/r128/r128_ioc32.c u32 x; x 119 drivers/gpu/drm/r128/r128_ioc32.c depth.x = compat_ptr(depth32.x); x 282 drivers/gpu/drm/r128/r128_state.c int x, int y, int w, int h, int r, int g, int b) x 322 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 381 drivers/gpu/drm/r128/r128_state.c int x = pbox[i].x1; x 383 drivers/gpu/drm/r128/r128_state.c int w = pbox[i].x2 - x; x 414 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 435 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 456 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 481 drivers/gpu/drm/r128/r128_state.c int x = pbox[i].x1; x 483 drivers/gpu/drm/r128/r128_state.c int w = pbox[i].x2 - x; x 509 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 510 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 861 drivers/gpu/drm/r128/r128_state.c data[5] = cpu_to_le32((blit->y << 16) | blit->x); x 894 drivers/gpu/drm/r128/r128_state.c int count, x, y; x 905 drivers/gpu/drm/r128/r128_state.c if (copy_from_user(&x, depth->x, sizeof(x))) x 923 drivers/gpu/drm/r128/r128_state.c for (i = 0; i < count; i++, x++) { x 939 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 948 drivers/gpu/drm/r128/r128_state.c for (i = 0; i < count; i++, x++) { x 963 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 979 drivers/gpu/drm/r128/r128_state.c int count, *x, *y; x 990 drivers/gpu/drm/r128/r128_state.c xbuf_size = count * sizeof(*x); x 992 drivers/gpu/drm/r128/r128_state.c x = memdup_user(depth->x, xbuf_size); x 993 drivers/gpu/drm/r128/r128_state.c if (IS_ERR(x)) x 994 drivers/gpu/drm/r128/r128_state.c return PTR_ERR(x); x 997 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1003 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1012 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1034 drivers/gpu/drm/r128/r128_state.c OUT_RING((x[i] << 16) | y[i]); x 1058 drivers/gpu/drm/r128/r128_state.c OUT_RING((x[i] << 16) | y[i]); x 1065 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1076 drivers/gpu/drm/r128/r128_state.c int count, x, y; x 1084 drivers/gpu/drm/r128/r128_state.c if (copy_from_user(&x, depth->x, sizeof(x))) x 1104 drivers/gpu/drm/r128/r128_state.c OUT_RING((x << 16) | y); x 1117 drivers/gpu/drm/r128/r128_state.c int count, *x, *y; x 1129 drivers/gpu/drm/r128/r128_state.c xbuf_size = count * sizeof(*x); x 1131 drivers/gpu/drm/r128/r128_state.c x = kmalloc(xbuf_size, GFP_KERNEL); x 1132 drivers/gpu/drm/r128/r128_state.c if (x == NULL) x 1136 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1139 drivers/gpu/drm/r128/r128_state.c if (copy_from_user(x, depth->x, xbuf_size)) { x 1140 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1145 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1166 drivers/gpu/drm/r128/r128_state.c OUT_RING((x[i] << 16) | y[i]); x 1173 drivers/gpu/drm/r128/r128_state.c kfree(x); x 1146 drivers/gpu/drm/radeon/atombios_crtc.c int x, int y, int atomic) x 1436 drivers/gpu/drm/radeon/atombios_crtc.c x &= ~3; x 1439 drivers/gpu/drm/radeon/atombios_crtc.c (x << 16) | y); x 1468 drivers/gpu/drm/radeon/atombios_crtc.c int x, int y, int atomic) x 1648 drivers/gpu/drm/radeon/atombios_crtc.c x &= ~3; x 1651 drivers/gpu/drm/radeon/atombios_crtc.c (x << 16) | y); x 1675 drivers/gpu/drm/radeon/atombios_crtc.c int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 1682 drivers/gpu/drm/radeon/atombios_crtc.c return dce4_crtc_do_set_base(crtc, old_fb, x, y, 0); x 1684 drivers/gpu/drm/radeon/atombios_crtc.c return avivo_crtc_do_set_base(crtc, old_fb, x, y, 0); x 1686 drivers/gpu/drm/radeon/atombios_crtc.c return radeon_crtc_do_set_base(crtc, old_fb, x, y, 0); x 1691 drivers/gpu/drm/radeon/atombios_crtc.c int x, int y, enum mode_set_atomic state) x 1697 drivers/gpu/drm/radeon/atombios_crtc.c return dce4_crtc_do_set_base(crtc, fb, x, y, 1); x 1699 drivers/gpu/drm/radeon/atombios_crtc.c return avivo_crtc_do_set_base(crtc, fb, x, y, 1); x 1701 drivers/gpu/drm/radeon/atombios_crtc.c return radeon_crtc_do_set_base(crtc, fb, x, y, 1); x 2056 drivers/gpu/drm/radeon/atombios_crtc.c int x, int y, struct drm_framebuffer *old_fb) x 2087 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_base(crtc, x, y, old_fb); x 36 drivers/gpu/drm/radeon/btcd.h # define SW_SMIO_INDEX(x) ((x) << 6) x 52 drivers/gpu/drm/radeon/btcd.h #define CG_CLIENT_REQ(x) ((x) << 0) x 55 drivers/gpu/drm/radeon/btcd.h #define CG_CLIENT_RESP(x) ((x) << 8) x 58 drivers/gpu/drm/radeon/btcd.h #define CLIENT_CG_REQ(x) ((x) << 16) x 61 drivers/gpu/drm/radeon/btcd.h #define CLIENT_CG_RESP(x) ((x) << 24) x 66 drivers/gpu/drm/radeon/btcd.h #define PSKIP_ON_ALLOW_STOP_HI(x) ((x) << 16) x 77 drivers/gpu/drm/radeon/btcd.h #define POWERMODE0(x) ((x) << 0) x 80 drivers/gpu/drm/radeon/btcd.h #define POWERMODE1(x) ((x) << 8) x 83 drivers/gpu/drm/radeon/btcd.h #define POWERMODE2(x) ((x) << 16) x 86 drivers/gpu/drm/radeon/btcd.h #define POWERMODE3(x) ((x) << 24) x 91 drivers/gpu/drm/radeon/btcd.h #define STATE0(x) ((x) << 0) x 94 drivers/gpu/drm/radeon/btcd.h #define STATE1(x) ((x) << 5) x 97 drivers/gpu/drm/radeon/btcd.h #define STATE2(x) ((x) << 10) x 100 drivers/gpu/drm/radeon/btcd.h #define STATE3(x) ((x) << 15) x 135 drivers/gpu/drm/radeon/btcd.h #define CG_SEQ_REQ(x) ((x) << 0) x 138 drivers/gpu/drm/radeon/btcd.h #define CG_SEQ_RESP(x) ((x) << 8) x 141 drivers/gpu/drm/radeon/btcd.h #define SEQ_CG_REQ(x) ((x) << 16) x 144 drivers/gpu/drm/radeon/btcd.h #define SEQ_CG_RESP(x) ((x) << 24) x 177 drivers/gpu/drm/radeon/btcd.h # define LC_HW_VOLTAGE_IF_CONTROL(x) ((x) << 12) x 36 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_DEPTH(x) (((x) & 0x3) << 0) x 40 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) x 45 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_Z(x) (((x) & 0x3) << 4) x 46 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) x 51 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_FORMAT(x) (((x) & 0x7) << 8) x 70 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) x 75 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) x 83 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) x 88 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) x 93 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_PIPE_CONFIG(x) (((x) & 0x1f) << 24) x 106 drivers/gpu/drm/radeon/cik_reg.h # define CIK_GRPH_MICRO_TILE_MODE(x) (((x) & 0x7) << 29) x 115 drivers/gpu/drm/radeon/cik_reg.h # define CIK_CURSOR_MODE(x) (((x) & 0x3) << 8) x 122 drivers/gpu/drm/radeon/cik_reg.h # define CIK_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24) x 175 drivers/gpu/drm/radeon/cik_reg.h #define SDMA_RB_VMID(x) (x << 24) x 195 drivers/gpu/drm/radeon/cik_reg.h #define SDMA_OFFSET(x) (x << 0) x 200 drivers/gpu/drm/radeon/cik_reg.h #define SDMA_VA_SHARED_BASE(x) (x << 8) x 42 drivers/gpu/drm/radeon/cikd.h # define SamuBootLevel(x) ((x) << 0) x 45 drivers/gpu/drm/radeon/cikd.h # define AcpBootLevel(x) ((x) << 8) x 48 drivers/gpu/drm/radeon/cikd.h # define VceBootLevel(x) ((x) << 16) x 51 drivers/gpu/drm/radeon/cikd.h # define UvdBootLevel(x) ((x) << 24) x 59 drivers/gpu/drm/radeon/cikd.h # define Dpm0PgNbPsLo(x) ((x) << 0) x 62 drivers/gpu/drm/radeon/cikd.h # define Dpm0PgNbPsHi(x) ((x) << 8) x 65 drivers/gpu/drm/radeon/cikd.h # define DpmXNbPsLo(x) ((x) << 16) x 68 drivers/gpu/drm/radeon/cikd.h # define DpmXNbPsHi(x) ((x) << 24) x 94 drivers/gpu/drm/radeon/cikd.h # define SW_SMIO_INDEX(x) ((x) << 6) x 102 drivers/gpu/drm/radeon/cikd.h # define GNB_SLOW_MODE(x) ((x) << 0) x 124 drivers/gpu/drm/radeon/cikd.h # define SST(x) ((x) << 0) x 126 drivers/gpu/drm/radeon/cikd.h # define SSTU(x) ((x) << 16) x 130 drivers/gpu/drm/radeon/cikd.h # define DISP_GAP(x) ((x) << 0) x 132 drivers/gpu/drm/radeon/cikd.h # define VBI_TIMER_COUNT(x) ((x) << 4) x 134 drivers/gpu/drm/radeon/cikd.h # define VBI_TIMER_UNIT(x) ((x) << 20) x 136 drivers/gpu/drm/radeon/cikd.h # define DISP_GAP_MCHG(x) ((x) << 24) x 182 drivers/gpu/drm/radeon/cikd.h #define DPM_EVENT_SRC(x) ((x) << 0) x 184 drivers/gpu/drm/radeon/cikd.h #define DIG_THERM_DPM(x) ((x) << 14) x 188 drivers/gpu/drm/radeon/cikd.h #define FDO_PWM_DUTY(x) ((x) << 9) x 192 drivers/gpu/drm/radeon/cikd.h #define CI_DIG_THERM_INTH(x) ((x) << 8) x 195 drivers/gpu/drm/radeon/cikd.h #define CI_DIG_THERM_INTL(x) ((x) << 16) x 201 drivers/gpu/drm/radeon/cikd.h #define TEMP_SEL(x) ((x) << 20) x 205 drivers/gpu/drm/radeon/cikd.h #define ASIC_MAX_TEMP(x) ((x) << 0) x 208 drivers/gpu/drm/radeon/cikd.h #define CTF_TEMP(x) ((x) << 9) x 213 drivers/gpu/drm/radeon/cikd.h #define FDO_STATIC_DUTY(x) ((x) << 0) x 217 drivers/gpu/drm/radeon/cikd.h #define FMAX_DUTY100(x) ((x) << 0) x 221 drivers/gpu/drm/radeon/cikd.h #define TMIN(x) ((x) << 0) x 224 drivers/gpu/drm/radeon/cikd.h #define FDO_PWM_MODE(x) ((x) << 11) x 227 drivers/gpu/drm/radeon/cikd.h #define TACH_PWM_RESP_RATE(x) ((x) << 25) x 231 drivers/gpu/drm/radeon/cikd.h # define EDGE_PER_REV(x) ((x) << 0) x 234 drivers/gpu/drm/radeon/cikd.h # define TARGET_PERIOD(x) ((x) << 3) x 238 drivers/gpu/drm/radeon/cikd.h # define TACH_PERIOD(x) ((x) << 0) x 252 drivers/gpu/drm/radeon/cikd.h #define SPLL_REF_DIV(x) ((x) << 5) x 254 drivers/gpu/drm/radeon/cikd.h #define SPLL_PDIV_A(x) ((x) << 20) x 258 drivers/gpu/drm/radeon/cikd.h #define SCLK_MUX_SEL(x) ((x) << 0) x 261 drivers/gpu/drm/radeon/cikd.h #define SPLL_FB_DIV(x) ((x) << 0) x 269 drivers/gpu/drm/radeon/cikd.h #define CLK_S(x) ((x) << 4) x 273 drivers/gpu/drm/radeon/cikd.h #define CLK_V(x) ((x) << 0) x 278 drivers/gpu/drm/radeon/cikd.h # define MPLL_CLKOUT_SEL(x) ((x) << 8) x 287 drivers/gpu/drm/radeon/cikd.h # define CMON_CLK_SEL(x) ((x) << 0) x 289 drivers/gpu/drm/radeon/cikd.h # define TMON_CLK_SEL(x) ((x) << 8) x 292 drivers/gpu/drm/radeon/cikd.h # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0) x 294 drivers/gpu/drm/radeon/cikd.h # define ZCLK_SEL(x) ((x) << 8) x 299 drivers/gpu/drm/radeon/cikd.h #define DIG_THERM_INTH(x) ((x) << 0) x 302 drivers/gpu/drm/radeon/cikd.h #define DIG_THERM_INTL(x) ((x) << 8) x 310 drivers/gpu/drm/radeon/cikd.h # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) x 313 drivers/gpu/drm/radeon/cikd.h # define PLL_POWER_STATE_IN_OFF_0(x) ((x) << 10) x 316 drivers/gpu/drm/radeon/cikd.h # define PLL_RAMP_UP_TIME_0(x) ((x) << 24) x 320 drivers/gpu/drm/radeon/cikd.h # define PLL_POWER_STATE_IN_TXS2_1(x) ((x) << 7) x 323 drivers/gpu/drm/radeon/cikd.h # define PLL_POWER_STATE_IN_OFF_1(x) ((x) << 10) x 326 drivers/gpu/drm/radeon/cikd.h # define PLL_RAMP_UP_TIME_1(x) ((x) << 24) x 351 drivers/gpu/drm/radeon/cikd.h # define LC_L0S_INACTIVITY(x) ((x) << 8) x 354 drivers/gpu/drm/radeon/cikd.h # define LC_L1_INACTIVITY(x) ((x) << 12) x 378 drivers/gpu/drm/radeon/cikd.h # define LC_DYN_LANES_PWR_STATE(x) ((x) << 21) x 382 drivers/gpu/drm/radeon/cikd.h # define LC_XMIT_N_FTS(x) ((x) << 0) x 441 drivers/gpu/drm/radeon/cikd.h # define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) x 445 drivers/gpu/drm/radeon/cikd.h #define PIPEID(x) ((x) << 0) x 446 drivers/gpu/drm/radeon/cikd.h #define MEID(x) ((x) << 2) x 447 drivers/gpu/drm/radeon/cikd.h #define VMID(x) ((x) << 4) x 448 drivers/gpu/drm/radeon/cikd.h #define QUEUEID(x) ((x) << 8) x 490 drivers/gpu/drm/radeon/cikd.h #define L2_CACHE_PTE_ENDIAN_SWAP_MODE(x) ((x) << 2) x 491 drivers/gpu/drm/radeon/cikd.h #define L2_CACHE_PDE_ENDIAN_SWAP_MODE(x) ((x) << 4) x 494 drivers/gpu/drm/radeon/cikd.h #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) x 495 drivers/gpu/drm/radeon/cikd.h #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) x 499 drivers/gpu/drm/radeon/cikd.h #define INVALIDATE_CACHE_MODE(x) ((x) << 26) x 504 drivers/gpu/drm/radeon/cikd.h #define BANK_SELECT(x) ((x) << 0) x 505 drivers/gpu/drm/radeon/cikd.h #define L2_CACHE_UPDATE_MODE(x) ((x) << 6) x 506 drivers/gpu/drm/radeon/cikd.h #define L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15) x 512 drivers/gpu/drm/radeon/cikd.h #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) x 525 drivers/gpu/drm/radeon/cikd.h #define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) x 641 drivers/gpu/drm/radeon/cikd.h #define STATE0(x) ((x) << 0) x 644 drivers/gpu/drm/radeon/cikd.h #define STATE1(x) ((x) << 5) x 647 drivers/gpu/drm/radeon/cikd.h #define STATE2(x) ((x) << 10) x 650 drivers/gpu/drm/radeon/cikd.h #define STATE3(x) ((x) << 15) x 722 drivers/gpu/drm/radeon/cikd.h # define DLL_SPEED(x) ((x) << 0) x 736 drivers/gpu/drm/radeon/cikd.h #define BWCTRL(x) ((x) << 20) x 739 drivers/gpu/drm/radeon/cikd.h #define VCO_MODE(x) ((x) << 0) x 741 drivers/gpu/drm/radeon/cikd.h #define CLKFRAC(x) ((x) << 4) x 743 drivers/gpu/drm/radeon/cikd.h #define CLKF(x) ((x) << 16) x 747 drivers/gpu/drm/radeon/cikd.h #define YCLK_POST_DIV(x) ((x) << 0) x 750 drivers/gpu/drm/radeon/cikd.h #define YCLK_SEL(x) ((x) << 4) x 754 drivers/gpu/drm/radeon/cikd.h #define CLKV(x) ((x) << 0) x 757 drivers/gpu/drm/radeon/cikd.h #define CLKS(x) ((x) << 0) x 803 drivers/gpu/drm/radeon/cikd.h # define IH_RB_SIZE(x) ((x) << 1) /* log2 */ x 806 drivers/gpu/drm/radeon/cikd.h # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ x 818 drivers/gpu/drm/radeon/cikd.h # define IH_MC_SWAP(x) ((x) << 1) x 824 drivers/gpu/drm/radeon/cikd.h # define MC_WRREQ_CREDIT(x) ((x) << 15) x 825 drivers/gpu/drm/radeon/cikd.h # define MC_WR_CLEAN_CNT(x) ((x) << 20) x 826 drivers/gpu/drm/radeon/cikd.h # define MC_VMID(x) ((x) << 25) x 865 drivers/gpu/drm/radeon/cikd.h #define LB_MEMORY_SIZE(x) ((x) << 0) x 866 drivers/gpu/drm/radeon/cikd.h #define LB_MEMORY_CONFIG(x) ((x) << 20) x 869 drivers/gpu/drm/radeon/cikd.h # define LATENCY_WATERMARK_MASK(x) ((x) << 8) x 871 drivers/gpu/drm/radeon/cikd.h # define LATENCY_LOW_WATERMARK(x) ((x) << 0) x 872 drivers/gpu/drm/radeon/cikd.h # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) x 972 drivers/gpu/drm/radeon/cikd.h # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) x 973 drivers/gpu/drm/radeon/cikd.h # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) x 990 drivers/gpu/drm/radeon/cikd.h # define FMT_TRUNCATE_DEPTH(x) ((x) << 4) /* 0 - 18bpp, 1 - 24bpp, 2 - 30bpp */ x 992 drivers/gpu/drm/radeon/cikd.h # define FMT_SPATIAL_DITHER_MODE(x) ((x) << 9) x 993 drivers/gpu/drm/radeon/cikd.h # define FMT_SPATIAL_DITHER_DEPTH(x) ((x) << 11) /* 0 - 18bpp, 1 - 24bpp, 2 - 30bpp */ x 998 drivers/gpu/drm/radeon/cikd.h # define FMT_TEMPORAL_DITHER_DEPTH(x) ((x) << 17) /* 0 - 18bpp, 1 - 24bpp, 2 - 30bpp */ x 999 drivers/gpu/drm/radeon/cikd.h # define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) << 21) x 1002 drivers/gpu/drm/radeon/cikd.h # define FMT_25FRC_SEL(x) ((x) << 26) x 1003 drivers/gpu/drm/radeon/cikd.h # define FMT_50FRC_SEL(x) ((x) << 28) x 1004 drivers/gpu/drm/radeon/cikd.h # define FMT_75FRC_SEL(x) ((x) << 30) x 1007 drivers/gpu/drm/radeon/cikd.h # define FMT_CLAMP_COLOR_FORMAT(x) ((x) << 16) x 1013 drivers/gpu/drm/radeon/cikd.h #define GRBM_READ_TIMEOUT(x) ((x) << 0) x 1116 drivers/gpu/drm/radeon/cikd.h #define IDLE_POLL_COUNT(x) ((x) << 16) x 1120 drivers/gpu/drm/radeon/cikd.h #define MEQ1_START(x) ((x) << 0) x 1121 drivers/gpu/drm/radeon/cikd.h #define MEQ2_START(x) ((x) << 8) x 1126 drivers/gpu/drm/radeon/cikd.h #define CACHE_INVALIDATION(x) ((x) << 0) x 1130 drivers/gpu/drm/radeon/cikd.h #define AUTO_INVLD_EN(x) ((x) << 6) x 1145 drivers/gpu/drm/radeon/cikd.h #define NUM_CLIP_SEQ(x) ((x) << 1) x 1148 drivers/gpu/drm/radeon/cikd.h #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) x 1149 drivers/gpu/drm/radeon/cikd.h #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) x 1152 drivers/gpu/drm/radeon/cikd.h #define SC_FRONTEND_PRIM_FIFO_SIZE(x) ((x) << 0) x 1153 drivers/gpu/drm/radeon/cikd.h #define SC_BACKEND_PRIM_FIFO_SIZE(x) ((x) << 6) x 1154 drivers/gpu/drm/radeon/cikd.h #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 15) x 1155 drivers/gpu/drm/radeon/cikd.h #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 23) x 1165 drivers/gpu/drm/radeon/cikd.h #define PRIVATE_BASE(x) ((x) << 0) /* scratch */ x 1166 drivers/gpu/drm/radeon/cikd.h #define SHARED_BASE(x) ((x) << 16) /* LDS */ x 1173 drivers/gpu/drm/radeon/cikd.h #define ALIGNMENT_MODE(x) ((x) << 2) x 1178 drivers/gpu/drm/radeon/cikd.h #define DEFAULT_MTYPE(x) ((x) << 4) x 1179 drivers/gpu/drm/radeon/cikd.h #define APE1_MTYPE(x) ((x) << 7) x 1189 drivers/gpu/drm/radeon/cikd.h #define VTX_DONE_DELAY(x) ((x) << 0) x 1199 drivers/gpu/drm/radeon/cikd.h #define BACKEND_DISABLE(x) ((x) << 16) x 1201 drivers/gpu/drm/radeon/cikd.h #define NUM_PIPES(x) ((x) << 0) x 1204 drivers/gpu/drm/radeon/cikd.h #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) x 1207 drivers/gpu/drm/radeon/cikd.h #define NUM_SHADER_ENGINES(x) ((x) << 12) x 1210 drivers/gpu/drm/radeon/cikd.h #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) x 1213 drivers/gpu/drm/radeon/cikd.h #define ROW_SIZE(x) ((x) << 28) x 1218 drivers/gpu/drm/radeon/cikd.h # define ARRAY_MODE(x) ((x) << 2) x 1225 drivers/gpu/drm/radeon/cikd.h # define PIPE_CONFIG(x) ((x) << 6) x 1240 drivers/gpu/drm/radeon/cikd.h # define TILE_SPLIT(x) ((x) << 11) x 1248 drivers/gpu/drm/radeon/cikd.h # define MICRO_TILE_MODE_NEW(x) ((x) << 22) x 1253 drivers/gpu/drm/radeon/cikd.h # define SAMPLE_SPLIT(x) ((x) << 25) x 1260 drivers/gpu/drm/radeon/cikd.h # define BANK_WIDTH(x) ((x) << 0) x 1265 drivers/gpu/drm/radeon/cikd.h # define BANK_HEIGHT(x) ((x) << 2) x 1270 drivers/gpu/drm/radeon/cikd.h # define MACRO_TILE_ASPECT(x) ((x) << 4) x 1275 drivers/gpu/drm/radeon/cikd.h # define NUM_BANKS(x) ((x) << 6) x 1303 drivers/gpu/drm/radeon/cikd.h #define RB_BUFSZ(x) ((x) << 0) x 1304 drivers/gpu/drm/radeon/cikd.h #define RB_BLKSZ(x) ((x) << 8) x 1449 drivers/gpu/drm/radeon/cikd.h # define MAX_PU_CU(x) ((x) << 0) x 1453 drivers/gpu/drm/radeon/cikd.h # define GRBM_REG_SGIT(x) ((x) << 3) x 1459 drivers/gpu/drm/radeon/cikd.h #define BPM_ADDR(x) ((x) << 0) x 1478 drivers/gpu/drm/radeon/cikd.h #define MESSAGE(x) ((x) << 1) x 1487 drivers/gpu/drm/radeon/cikd.h #define EOP_SIZE(x) ((x) << 0) x 1502 drivers/gpu/drm/radeon/cikd.h #define QUANTUM_DURATION(x) ((x) << 8) x 1512 drivers/gpu/drm/radeon/cikd.h #define DOORBELL_OFFSET(x) ((x) << 2) x 1520 drivers/gpu/drm/radeon/cikd.h #define QUEUE_SIZE(x) ((x) << 0) x 1522 drivers/gpu/drm/radeon/cikd.h #define RPTR_BLOCK_SIZE(x) ((x) << 8) x 1543 drivers/gpu/drm/radeon/cikd.h #define MQD_VMID(x) ((x) << 0) x 1564 drivers/gpu/drm/radeon/cikd.h #define PKR_MAP(x) ((x) << 8) x 1628 drivers/gpu/drm/radeon/cikd.h #define INSTANCE_INDEX(x) ((x) << 0) x 1629 drivers/gpu/drm/radeon/cikd.h #define SH_INDEX(x) ((x) << 8) x 1630 drivers/gpu/drm/radeon/cikd.h #define SE_INDEX(x) ((x) << 16) x 1654 drivers/gpu/drm/radeon/cikd.h #define SM_MODE(x) ((x) << 17) x 1660 drivers/gpu/drm/radeon/cikd.h #define ON_MONITOR_ADD(x) ((x) << 24) x 1700 drivers/gpu/drm/radeon/cikd.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 1728 drivers/gpu/drm/radeon/cikd.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 1738 drivers/gpu/drm/radeon/cikd.h #define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) x 1742 drivers/gpu/drm/radeon/cikd.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 1751 drivers/gpu/drm/radeon/cikd.h # define PACKET3_SEM_CLIENT_CODE ((x) << 24) /* 0 = CP, 1 = CB, 2 = DB */ x 1756 drivers/gpu/drm/radeon/cikd.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 1765 drivers/gpu/drm/radeon/cikd.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 1769 drivers/gpu/drm/radeon/cikd.h #define WAIT_REG_MEM_OPERATION(x) ((x) << 6) x 1773 drivers/gpu/drm/radeon/cikd.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 1780 drivers/gpu/drm/radeon/cikd.h #define INDIRECT_BUFFER_CACHE_POLICY(x) ((x) << 28) x 1813 drivers/gpu/drm/radeon/cikd.h #define EVENT_TYPE(x) ((x) << 0) x 1814 drivers/gpu/drm/radeon/cikd.h #define EVENT_INDEX(x) ((x) << 8) x 1830 drivers/gpu/drm/radeon/cikd.h #define EOP_CACHE_POLICY(x) ((x) << 25) x 1835 drivers/gpu/drm/radeon/cikd.h #define DATA_SEL(x) ((x) << 29) x 1842 drivers/gpu/drm/radeon/cikd.h #define INT_SEL(x) ((x) << 24) x 1847 drivers/gpu/drm/radeon/cikd.h #define DST_SEL(x) ((x) << 16) x 1866 drivers/gpu/drm/radeon/cikd.h # define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) x 1870 drivers/gpu/drm/radeon/cikd.h # define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) x 1876 drivers/gpu/drm/radeon/cikd.h # define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) x 1881 drivers/gpu/drm/radeon/cikd.h # define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) x 1887 drivers/gpu/drm/radeon/cikd.h # define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) x 1896 drivers/gpu/drm/radeon/cikd.h # define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) ((x) << 22) x 1902 drivers/gpu/drm/radeon/cikd.h # define PACKET3_DMA_DATA_CMD_DST_SWAP(x) ((x) << 24) x 1982 drivers/gpu/drm/radeon/cikd.h # define SDMA_RB_SIZE(x) ((x) << 1) /* log2 */ x 1986 drivers/gpu/drm/radeon/cikd.h # define SDMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ x 1998 drivers/gpu/drm/radeon/cikd.h # define SDMA_CMD_VMID(x) ((x) << 16) x 2033 drivers/gpu/drm/radeon/cikd.h # define SDMA_POLL_REG_MEM_EXTRA_OP(x) ((x) << 10) x 2037 drivers/gpu/drm/radeon/cikd.h # define SDMA_POLL_REG_MEM_EXTRA_FUNC(x) ((x) << 12) x 2052 drivers/gpu/drm/radeon/cikd.h # define SDMA_CONSTANT_FILL_EXTRA_SIZE(x) ((x) << 14) x 2062 drivers/gpu/drm/radeon/cikd.h # define SDMA_SRBM_WRITE_EXTRA_BYTE_ENABLE(x) ((x) << 12) x 2087 drivers/gpu/drm/radeon/cikd.h # define CG_DT(x) ((x) << 2) x 2089 drivers/gpu/drm/radeon/cikd.h # define CLK_OD(x) ((x) << 6) x 2121 drivers/gpu/drm/radeon/cikd.h # define CGC_CLK_GATE_DLY_TIMER(x) ((x) << 0) x 2123 drivers/gpu/drm/radeon/cikd.h # define CGC_CLK_GATER_OFF_DLY_TIMER(x) ((x) << 4) x 2129 drivers/gpu/drm/radeon/cikd.h # define CLOCK_ON_DELAY(x) ((x) << 0) x 2131 drivers/gpu/drm/radeon/cikd.h # define CLOCK_OFF_DELAY(x) ((x) << 4) x 42 drivers/gpu/drm/radeon/evergreen.c #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc)) x 43 drivers/gpu/drm/radeon/evergreen.c #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc)) x 44 drivers/gpu/drm/radeon/evergreen.c #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc)) x 62 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0) x 66 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) x 71 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_Z(x) (((x) & 0x3) << 4) x 72 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) x 77 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8) x 96 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) x 101 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) x 109 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) x 114 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) x 122 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) x 127 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) x 132 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) x 137 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) x 142 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) x 169 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_CURSOR_MODE(x) (((x) & 0x3) << 8) x 176 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24) x 263 drivers/gpu/drm/radeon/evergreen_reg.h # define NI_DIG_FE_CNTL_SOURCE_SELECT(x) ((x) & 0x3) x 268 drivers/gpu/drm/radeon/evergreen_reg.h # define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8 ) & 0x3F) x 269 drivers/gpu/drm/radeon/evergreen_reg.h # define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7 ) x 299 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_DP_SEC_TIMESTAMP_MODE(x) (((x) & 0x3) << 0) x 301 drivers/gpu/drm/radeon/evergreen_reg.h # define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x) (((x) & 0xf) << 24) x 53 drivers/gpu/drm/radeon/evergreend.h #define HOST_SMC_MSG(x) ((x) << 0) x 56 drivers/gpu/drm/radeon/evergreend.h #define HOST_SMC_RESP(x) ((x) << 8) x 59 drivers/gpu/drm/radeon/evergreend.h #define SMC_HOST_MSG(x) ((x) << 16) x 62 drivers/gpu/drm/radeon/evergreend.h #define SMC_HOST_RESP(x) ((x) << 24) x 67 drivers/gpu/drm/radeon/evergreend.h #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) x 70 drivers/gpu/drm/radeon/evergreend.h #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) x 78 drivers/gpu/drm/radeon/evergreend.h #define SPLL_REF_DIV(x) ((x) << 4) x 80 drivers/gpu/drm/radeon/evergreend.h #define SPLL_PDIV_A(x) ((x) << 20) x 83 drivers/gpu/drm/radeon/evergreend.h #define SCLK_MUX_SEL(x) ((x) << 0) x 87 drivers/gpu/drm/radeon/evergreend.h #define SPLL_FB_DIV(x) ((x) << 0) x 99 drivers/gpu/drm/radeon/evergreend.h #define CLKF(x) ((x) << 0) x 101 drivers/gpu/drm/radeon/evergreend.h #define CLKR(x) ((x) << 7) x 103 drivers/gpu/drm/radeon/evergreend.h #define CLKFRAC(x) ((x) << 12) x 105 drivers/gpu/drm/radeon/evergreend.h #define YCLK_POST_DIV(x) ((x) << 17) x 107 drivers/gpu/drm/radeon/evergreend.h #define IBIAS(x) ((x) << 20) x 126 drivers/gpu/drm/radeon/evergreend.h # define SW_SMIO_INDEX(x) ((x) << 6) x 152 drivers/gpu/drm/radeon/evergreend.h # define DLL_SPEED(x) ((x) << 0) x 188 drivers/gpu/drm/radeon/evergreend.h # define CG_R(x) ((x) << 0) x 190 drivers/gpu/drm/radeon/evergreend.h # define CG_L(x) ((x) << 16) x 194 drivers/gpu/drm/radeon/evergreend.h # define DISP1_GAP(x) ((x) << 0) x 196 drivers/gpu/drm/radeon/evergreend.h # define DISP2_GAP(x) ((x) << 2) x 198 drivers/gpu/drm/radeon/evergreend.h # define VBI_TIMER_COUNT(x) ((x) << 4) x 200 drivers/gpu/drm/radeon/evergreend.h # define VBI_TIMER_UNIT(x) ((x) << 20) x 202 drivers/gpu/drm/radeon/evergreend.h # define DISP1_GAP_MCHG(x) ((x) << 24) x 204 drivers/gpu/drm/radeon/evergreend.h # define DISP2_GAP_MCHG(x) ((x) << 26) x 208 drivers/gpu/drm/radeon/evergreend.h #define CG_CLIENT_REQ(x) ((x) << 0) x 211 drivers/gpu/drm/radeon/evergreend.h #define CG_CLIENT_RESP(x) ((x) << 8) x 214 drivers/gpu/drm/radeon/evergreend.h #define CLIENT_CG_REQ(x) ((x) << 16) x 217 drivers/gpu/drm/radeon/evergreend.h #define CLIENT_CG_RESP(x) ((x) << 24) x 226 drivers/gpu/drm/radeon/evergreend.h #define CLKV(x) ((x) << 0) x 229 drivers/gpu/drm/radeon/evergreend.h #define CLKS(x) ((x) << 0) x 258 drivers/gpu/drm/radeon/evergreend.h #define MC_RD_ENABLE_MCD(x) ((x) << 8) x 268 drivers/gpu/drm/radeon/evergreend.h #define MC_RD_ENABLE(x) ((x) << 4) x 277 drivers/gpu/drm/radeon/evergreend.h #define STATE0(x) ((x) << 0) x 279 drivers/gpu/drm/radeon/evergreend.h #define STATE1(x) ((x) << 5) x 281 drivers/gpu/drm/radeon/evergreend.h #define STATE2(x) ((x) << 10) x 283 drivers/gpu/drm/radeon/evergreend.h #define STATE3(x) ((x) << 15) x 311 drivers/gpu/drm/radeon/evergreend.h #define CG_SEQ_REQ(x) ((x) << 0) x 314 drivers/gpu/drm/radeon/evergreend.h #define CG_SEQ_RESP(x) ((x) << 8) x 317 drivers/gpu/drm/radeon/evergreend.h #define SEQ_CG_REQ(x) ((x) << 16) x 320 drivers/gpu/drm/radeon/evergreend.h #define SEQ_CG_RESP(x) ((x) << 24) x 358 drivers/gpu/drm/radeon/evergreend.h # define UPLL_PDIV_A(x) ((x) << 0) x 360 drivers/gpu/drm/radeon/evergreend.h # define UPLL_PDIV_B(x) ((x) << 8) x 362 drivers/gpu/drm/radeon/evergreend.h # define VCLK_SRC_SEL(x) ((x) << 20) x 364 drivers/gpu/drm/radeon/evergreend.h # define DCLK_SRC_SEL(x) ((x) << 25) x 367 drivers/gpu/drm/radeon/evergreend.h # define UPLL_FB_DIV(x) ((x) << 0) x 413 drivers/gpu/drm/radeon/evergreend.h #define INSTANCE_INDEX(x) ((x) << 0) x 414 drivers/gpu/drm/radeon/evergreend.h #define SE_INDEX(x) ((x) << 16) x 421 drivers/gpu/drm/radeon/evergreend.h #define BACKEND_DISABLE(x) ((x) << 16) x 423 drivers/gpu/drm/radeon/evergreend.h #define NUM_PIPES(x) ((x) << 0) x 425 drivers/gpu/drm/radeon/evergreend.h #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) x 426 drivers/gpu/drm/radeon/evergreend.h #define BANK_INTERLEAVE_SIZE(x) ((x) << 8) x 427 drivers/gpu/drm/radeon/evergreend.h #define NUM_SHADER_ENGINES(x) ((x) << 12) x 428 drivers/gpu/drm/radeon/evergreend.h #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) x 429 drivers/gpu/drm/radeon/evergreend.h #define NUM_GPUS(x) ((x) << 20) x 430 drivers/gpu/drm/radeon/evergreend.h #define MULTI_GPU_TILE_SIZE(x) ((x) << 24) x 431 drivers/gpu/drm/radeon/evergreend.h #define ROW_SIZE(x) ((x) << 28) x 468 drivers/gpu/drm/radeon/evergreend.h #define STQ_SPLIT(x) ((x) << 0) x 473 drivers/gpu/drm/radeon/evergreend.h #define ROQ_IB1_START(x) ((x) << 0) x 474 drivers/gpu/drm/radeon/evergreend.h #define ROQ_IB2_START(x) ((x) << 8) x 477 drivers/gpu/drm/radeon/evergreend.h #define RB_BUFSZ(x) ((x) << 0) x 478 drivers/gpu/drm/radeon/evergreend.h #define RB_BLKSZ(x) ((x) << 8) x 484 drivers/gpu/drm/radeon/evergreend.h #define RB_RPTR_SWAP(x) ((x) << 0) x 497 drivers/gpu/drm/radeon/evergreend.h # define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) << 0) /* crtc0 - crtc5 */ x 504 drivers/gpu/drm/radeon/evergreend.h # define DCCG_AUDIO_DTO_WALLCLOCK_RATIO(x) (((x) & 7) << 0) x 515 drivers/gpu/drm/radeon/evergreend.h # define DENTIST_DPREFCLK_WDIVIDER(x) (((x) & 0x7f) << 24) x 526 drivers/gpu/drm/radeon/evergreend.h # define HDMI_DEEP_COLOR_DEPTH(x) (((x) & 3) << 28) x 536 drivers/gpu/drm/radeon/evergreend.h # define HDMI_AUDIO_DELAY_EN(x) (((x) & 3) << 4) x 537 drivers/gpu/drm/radeon/evergreend.h # define HDMI_AUDIO_PACKETS_PER_LINE(x) (((x) & 0x1f) << 16) x 541 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_SELECT(x) (((x) & 3) << 4) x 548 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_N_MULTIPLE(x) (((x) & 7) << 16) x 565 drivers/gpu/drm/radeon/evergreend.h # define HDMI_AVI_INFO_LINE(x) (((x) & 0x3f) << 0) x 567 drivers/gpu/drm/radeon/evergreend.h # define HDMI_AUDIO_INFO_LINE(x) (((x) & 0x3f) << 8) x 568 drivers/gpu/drm/radeon/evergreend.h # define HDMI_MPEG_INFO_LINE(x) (((x) & 0x3f) << 16) x 574 drivers/gpu/drm/radeon/evergreend.h # define HDMI_GENERIC0_LINE(x) (((x) & 0x3f) << 16) x 575 drivers/gpu/drm/radeon/evergreend.h # define HDMI_GENERIC1_LINE(x) (((x) & 0x3f) << 24) x 583 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_CHANNEL_ENABLE(x) (((x) & 0xff) << 8) x 584 drivers/gpu/drm/radeon/evergreend.h # define AFMT_DP_AUDIO_STREAM_ID(x) (((x) & 0xff) << 16) x 586 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 587 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_S(x) (((x) & 3) << 8) x 588 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_B(x) (((x) & 3) << 10) x 589 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_A(x) (((x) & 1) << 12) x 590 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_Y(x) (((x) & 3) << 13) x 594 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_Y_A_B_S(x) (((x) & 0xff) << 8) x 595 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_R(x) (((x) & 0xf) << 16) x 596 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_M(x) (((x) & 0x3) << 20) x 597 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_C(x) (((x) & 0x3) << 22) x 598 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_C_M_R(x) (((x) & 0xff) << 16) x 599 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_SC(x) (((x) & 0x3) << 24) x 600 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_Q(x) (((x) & 0x3) << 26) x 601 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_EC(x) (((x) & 0x3) << 28) x 602 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_ITC(x) (((x) & 0x1) << 31) x 603 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_ITC_EC_Q_SC(x) (((x) & 0xff) << 24) x 605 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_VIC(x) (((x) & 0x7f) << 0) /* don't use avi infoframe v1 */ x 606 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_PR(x) (((x) & 0xf) << 8) /* don't use avi infoframe v1 */ x 607 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_CN(x) (((x) & 0x3) << 12) x 608 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_YQ(x) (((x) & 0x3) << 14) x 609 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_TOP(x) (((x) & 0xffff) << 16) x 611 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_BOTTOM(x) (((x) & 0xffff) << 0) x 612 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_LEFT(x) (((x) & 0xffff) << 16) x 614 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_RIGHT(x) (((x) & 0xffff) << 0) x 615 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AVI_INFO_VERSION(x) (((x) & 3) << 24) x 617 drivers/gpu/drm/radeon/evergreend.h # define AFMT_MPEG_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 618 drivers/gpu/drm/radeon/evergreend.h # define AFMT_MPEG_INFO_MB0(x) (((x) & 0xff) << 8) x 619 drivers/gpu/drm/radeon/evergreend.h # define AFMT_MPEG_INFO_MB1(x) (((x) & 0xff) << 16) x 620 drivers/gpu/drm/radeon/evergreend.h # define AFMT_MPEG_INFO_MB2(x) (((x) & 0xff) << 24) x 622 drivers/gpu/drm/radeon/evergreend.h # define AFMT_MPEG_INFO_MB3(x) (((x) & 0xff) << 0) x 623 drivers/gpu/drm/radeon/evergreend.h # define AFMT_MPEG_INFO_MF(x) (((x) & 3) << 8) x 624 drivers/gpu/drm/radeon/evergreend.h # define AFMT_MPEG_INFO_FR(x) (((x) & 1) << 12) x 642 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_CTS_32(x) (((x) & 0xfffff) << 12) x 644 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_N_32(x) (((x) & 0xfffff) << 0) x 646 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_CTS_44(x) (((x) & 0xfffff) << 12) x 648 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0) x 650 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_CTS_48(x) (((x) & 0xfffff) << 12) x 652 drivers/gpu/drm/radeon/evergreend.h # define HDMI_ACR_N_48(x) (((x) & 0xfffff) << 0) x 656 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 657 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_CC(x) (((x) & 7) << 8) x 658 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_CT(x) (((x) & 0xf) << 11) x 659 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_CHECKSUM_OFFSET(x) (((x) & 0xff) << 16) x 660 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_CXT(x) (((x) & 0x1f) << 24) x 662 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_CA(x) (((x) & 0xff) << 0) x 663 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_LSV(x) (((x) & 0xf) << 11) x 664 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_DM_INH(x) (((x) & 1) << 15) x 665 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_DM_INH_LSV(x) (((x) & 0xff) << 8) x 666 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_INFO_LFEBPL(x) (((x) & 3) << 16) x 668 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_A(x) (((x) & 1) << 0) x 669 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_B(x) (((x) & 1) << 1) x 670 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_C(x) (((x) & 1) << 2) x 671 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_D(x) (((x) & 3) << 3) x 672 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_MODE(x) (((x) & 3) << 6) x 673 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CATEGORY_CODE(x) (((x) & 0xff) << 8) x 674 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_SOURCE_NUMBER(x) (((x) & 0xf) << 16) x 675 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_L(x) (((x) & 0xf) << 20) x 676 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 24) x 677 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CLOCK_ACCURACY(x) (((x) & 3) << 28) x 679 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_WORD_LENGTH(x) (((x) & 0xf) << 0) x 680 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_ORIGINAL_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 4) x 681 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_VALID_L(x) (((x) & 1) << 16) x 682 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_VALID_R(x) (((x) & 1) << 18) x 683 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_R(x) (((x) & 0xf) << 20) x 687 drivers/gpu/drm/radeon/evergreend.h # define AFMT_RAMP_MAX_COUNT(x) (((x) & 0xffffff) << 0) x 690 drivers/gpu/drm/radeon/evergreend.h # define AFMT_RAMP_MIN_COUNT(x) (((x) & 0xffffff) << 0) x 691 drivers/gpu/drm/radeon/evergreend.h # define AFMT_AUDIO_TEST_CH_DISABLE(x) (((x) & 0xff) << 24) x 693 drivers/gpu/drm/radeon/evergreend.h # define AFMT_RAMP_INC_COUNT(x) (((x) & 0xffffff) << 0) x 695 drivers/gpu/drm/radeon/evergreend.h # define AFMT_RAMP_DEC_COUNT(x) (((x) & 0xffffff) << 0) x 697 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_2(x) (((x) & 0xf) << 0) x 698 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_3(x) (((x) & 0xf) << 4) x 699 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_4(x) (((x) & 0xf) << 8) x 700 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_5(x) (((x) & 0xf) << 12) x 701 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_6(x) (((x) & 0xf) << 16) x 702 drivers/gpu/drm/radeon/evergreend.h # define AFMT_60958_CS_CHANNEL_NUMBER_7(x) (((x) & 0xf) << 20) x 729 drivers/gpu/drm/radeon/evergreend.h #define SPEAKER_ALLOCATION(x) (((x) & 0x7f) << 0) x 749 drivers/gpu/drm/radeon/evergreend.h # define MAX_CHANNELS(x) (((x) & 0x7) << 0) x 751 drivers/gpu/drm/radeon/evergreend.h # define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8) x 752 drivers/gpu/drm/radeon/evergreend.h # define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16) x 753 drivers/gpu/drm/radeon/evergreend.h # define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */ x 765 drivers/gpu/drm/radeon/evergreend.h # define HBR_CHANNEL_COUNT(x) (((x) & 0x7) << 0) x 766 drivers/gpu/drm/radeon/evergreend.h # define COMPRESSED_CHANNEL_COUNT(x) (((x) & 0x7) << 4) x 772 drivers/gpu/drm/radeon/evergreend.h # define VIDEO_LIPSYNC(x) (((x) & 0xff) << 0) x 773 drivers/gpu/drm/radeon/evergreend.h # define AUDIO_LIPSYNC(x) (((x) & 0xff) << 8) x 783 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY0_TYPE(x) (((x) & 0x3) << 0) x 787 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY0_ID(x) (((x) & 0x3f) << 2) x 788 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY1_TYPE(x) (((x) & 0x3) << 8) x 789 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY1_ID(x) (((x) & 0x3f) << 10) x 790 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY2_TYPE(x) (((x) & 0x3) << 16) x 791 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY2_ID(x) (((x) & 0x3f) << 18) x 792 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY3_TYPE(x) (((x) & 0x3) << 24) x 793 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY3_ID(x) (((x) & 0x3f) << 26) x 795 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY4_TYPE(x) (((x) & 0x3) << 0) x 796 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY4_ID(x) (((x) & 0x3f) << 2) x 797 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY5_TYPE(x) (((x) & 0x3) << 8) x 798 drivers/gpu/drm/radeon/evergreend.h # define DISPLAY5_ID(x) (((x) & 0x3f) << 10) x 800 drivers/gpu/drm/radeon/evergreend.h # define NUMBER_OF_DISPLAY_ID(x) (((x) & 0x7) << 0) x 821 drivers/gpu/drm/radeon/evergreend.h #define INACTIVE_QD_PIPES(x) ((x) << 8) x 823 drivers/gpu/drm/radeon/evergreend.h #define INACTIVE_SIMDS(x) ((x) << 16) x 827 drivers/gpu/drm/radeon/evergreend.h #define GRBM_READ_TIMEOUT(x) ((x) << 0) x 880 drivers/gpu/drm/radeon/evergreend.h #define DIG_THERM_DPM(x) ((x) << 14) x 885 drivers/gpu/drm/radeon/evergreend.h #define DIG_THERM_INTH(x) ((x) << 8) x 888 drivers/gpu/drm/radeon/evergreend.h #define DIG_THERM_INTL(x) ((x) << 16) x 895 drivers/gpu/drm/radeon/evergreend.h #define TN_DIG_THERM_INTH(x) ((x) << 0) x 898 drivers/gpu/drm/radeon/evergreend.h #define TN_DIG_THERM_INTL(x) ((x) << 8) x 905 drivers/gpu/drm/radeon/evergreend.h #define ASIC_T(x) ((x) << 16) x 962 drivers/gpu/drm/radeon/evergreend.h #define EFFECTIVE_L1_TLB_SIZE(x) ((x)<<15) x 963 drivers/gpu/drm/radeon/evergreend.h #define EFFECTIVE_L1_QUEUE_SIZE(x) ((x)<<18) x 979 drivers/gpu/drm/radeon/evergreend.h #define NUM_CLIP_SEQ(x) ((x) << 1) x 987 drivers/gpu/drm/radeon/evergreend.h #define SC_PRIM_FIFO_SIZE(x) ((x) << 0) x 988 drivers/gpu/drm/radeon/evergreend.h #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12) x 989 drivers/gpu/drm/radeon/evergreend.h #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20) x 991 drivers/gpu/drm/radeon/evergreend.h #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) x 992 drivers/gpu/drm/radeon/evergreend.h #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) x 1011 drivers/gpu/drm/radeon/evergreend.h #define NUMBER_OF_SETS(x) ((x) << 1) x 1015 drivers/gpu/drm/radeon/evergreend.h #define ES_FLUSH_CTL(x) ((x) << 0) x 1016 drivers/gpu/drm/radeon/evergreend.h #define GS_FLUSH_CTL(x) ((x) << 3) x 1017 drivers/gpu/drm/radeon/evergreend.h #define ACK_FLUSH_CTL(x) ((x) << 6) x 1021 drivers/gpu/drm/radeon/evergreend.h #define GPR_WRITE_PRIORITY(x) ((x) << 0) x 1023 drivers/gpu/drm/radeon/evergreend.h #define VTX_DONE_DELAY(x) ((x) << 0) x 1027 drivers/gpu/drm/radeon/evergreend.h #define NUM_INTERP(x) ((x)<<0) x 1030 drivers/gpu/drm/radeon/evergreend.h #define POSITION_ADDR(x) ((x)<<10) x 1031 drivers/gpu/drm/radeon/evergreend.h #define PARAM_GEN(x) ((x)<<15) x 1032 drivers/gpu/drm/radeon/evergreend.h #define PARAM_GEN_ADDR(x) ((x)<<19) x 1033 drivers/gpu/drm/radeon/evergreend.h #define BARYC_SAMPLE_CNTL(x) ((x)<<26) x 1042 drivers/gpu/drm/radeon/evergreend.h #define CS_PRIO(x) ((x) << 18) x 1043 drivers/gpu/drm/radeon/evergreend.h #define LS_PRIO(x) ((x) << 20) x 1044 drivers/gpu/drm/radeon/evergreend.h #define HS_PRIO(x) ((x) << 22) x 1045 drivers/gpu/drm/radeon/evergreend.h #define PS_PRIO(x) ((x) << 24) x 1046 drivers/gpu/drm/radeon/evergreend.h #define VS_PRIO(x) ((x) << 26) x 1047 drivers/gpu/drm/radeon/evergreend.h #define GS_PRIO(x) ((x) << 28) x 1048 drivers/gpu/drm/radeon/evergreend.h #define ES_PRIO(x) ((x) << 30) x 1050 drivers/gpu/drm/radeon/evergreend.h #define NUM_PS_GPRS(x) ((x) << 0) x 1051 drivers/gpu/drm/radeon/evergreend.h #define NUM_VS_GPRS(x) ((x) << 16) x 1052 drivers/gpu/drm/radeon/evergreend.h #define NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28) x 1054 drivers/gpu/drm/radeon/evergreend.h #define NUM_GS_GPRS(x) ((x) << 0) x 1055 drivers/gpu/drm/radeon/evergreend.h #define NUM_ES_GPRS(x) ((x) << 16) x 1057 drivers/gpu/drm/radeon/evergreend.h #define NUM_HS_GPRS(x) ((x) << 0) x 1058 drivers/gpu/drm/radeon/evergreend.h #define NUM_LS_GPRS(x) ((x) << 16) x 1062 drivers/gpu/drm/radeon/evergreend.h #define NUM_PS_THREADS(x) ((x) << 0) x 1063 drivers/gpu/drm/radeon/evergreend.h #define NUM_VS_THREADS(x) ((x) << 8) x 1064 drivers/gpu/drm/radeon/evergreend.h #define NUM_GS_THREADS(x) ((x) << 16) x 1065 drivers/gpu/drm/radeon/evergreend.h #define NUM_ES_THREADS(x) ((x) << 24) x 1067 drivers/gpu/drm/radeon/evergreend.h #define NUM_HS_THREADS(x) ((x) << 0) x 1068 drivers/gpu/drm/radeon/evergreend.h #define NUM_LS_THREADS(x) ((x) << 8) x 1070 drivers/gpu/drm/radeon/evergreend.h #define NUM_PS_STACK_ENTRIES(x) ((x) << 0) x 1071 drivers/gpu/drm/radeon/evergreend.h #define NUM_VS_STACK_ENTRIES(x) ((x) << 16) x 1073 drivers/gpu/drm/radeon/evergreend.h #define NUM_GS_STACK_ENTRIES(x) ((x) << 0) x 1074 drivers/gpu/drm/radeon/evergreend.h #define NUM_ES_STACK_ENTRIES(x) ((x) << 16) x 1076 drivers/gpu/drm/radeon/evergreend.h #define NUM_HS_STACK_ENTRIES(x) ((x) << 0) x 1077 drivers/gpu/drm/radeon/evergreend.h #define NUM_LS_STACK_ENTRIES(x) ((x) << 16) x 1086 drivers/gpu/drm/radeon/evergreend.h #define CACHE_FIFO_SIZE(x) ((x) << 0) x 1087 drivers/gpu/drm/radeon/evergreend.h #define FETCH_FIFO_HIWATER(x) ((x) << 8) x 1088 drivers/gpu/drm/radeon/evergreend.h #define DONE_FIFO_HIWATER(x) ((x) << 16) x 1089 drivers/gpu/drm/radeon/evergreend.h #define ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24) x 1094 drivers/gpu/drm/radeon/evergreend.h #define COLOR_BUFFER_SIZE(x) ((x) << 0) x 1095 drivers/gpu/drm/radeon/evergreend.h #define POSITION_BUFFER_SIZE(x) ((x) << 8) x 1096 drivers/gpu/drm/radeon/evergreend.h #define SMX_BUFFER_SIZE(x) ((x) << 16) x 1120 drivers/gpu/drm/radeon/evergreend.h #define CACHE_INVALIDATION(x) ((x) << 0) x 1124 drivers/gpu/drm/radeon/evergreend.h #define AUTO_INVLD_EN(x) ((x) << 6) x 1138 drivers/gpu/drm/radeon/evergreend.h #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) x 1147 drivers/gpu/drm/radeon/evergreend.h #define REQUEST_TYPE(x) (((x) & 0xf) << 0) x 1154 drivers/gpu/drm/radeon/evergreend.h #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) x 1159 drivers/gpu/drm/radeon/evergreend.h #define BANK_SELECT(x) ((x) << 0) x 1160 drivers/gpu/drm/radeon/evergreend.h #define CACHE_UPDATE_MODE(x) ((x) << 6) x 1211 drivers/gpu/drm/radeon/evergreend.h # define LATENCY_WATERMARK_MASK(x) ((x) << 16) x 1213 drivers/gpu/drm/radeon/evergreend.h # define LATENCY_LOW_WATERMARK(x) ((x) << 0) x 1214 drivers/gpu/drm/radeon/evergreend.h # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) x 1217 drivers/gpu/drm/radeon/evergreend.h # define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) x 1222 drivers/gpu/drm/radeon/evergreend.h # define IH_IB_SIZE(x) ((x) << 1) /* log2 */ x 1225 drivers/gpu/drm/radeon/evergreend.h # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ x 1237 drivers/gpu/drm/radeon/evergreend.h # define IH_MC_SWAP(x) ((x) << 1) x 1243 drivers/gpu/drm/radeon/evergreend.h # define MC_WRREQ_CREDIT(x) ((x) << 15) x 1244 drivers/gpu/drm/radeon/evergreend.h # define MC_WR_CLEAN_CNT(x) ((x) << 20) x 1364 drivers/gpu/drm/radeon/evergreend.h # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) x 1365 drivers/gpu/drm/radeon/evergreend.h # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) x 1380 drivers/gpu/drm/radeon/evergreend.h # define FMT_SPATIAL_DITHER_MODE(x) ((x) << 9) x 1387 drivers/gpu/drm/radeon/evergreend.h # define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) << 21) x 1390 drivers/gpu/drm/radeon/evergreend.h # define FMT_25FRC_SEL(x) ((x) << 26) x 1391 drivers/gpu/drm/radeon/evergreend.h # define FMT_50FRC_SEL(x) ((x) << 28) x 1392 drivers/gpu/drm/radeon/evergreend.h # define FMT_75FRC_SEL(x) ((x) << 30) x 1395 drivers/gpu/drm/radeon/evergreend.h # define FMT_CLAMP_COLOR_FORMAT(x) ((x) << 16) x 1436 drivers/gpu/drm/radeon/evergreend.h # define LS2_EXIT_TIME(x) ((x) << 17) x 1442 drivers/gpu/drm/radeon/evergreend.h # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) x 1445 drivers/gpu/drm/radeon/evergreend.h # define PLL_POWER_STATE_IN_OFF_0(x) ((x) << 10) x 1448 drivers/gpu/drm/radeon/evergreend.h # define PLL_RAMP_UP_TIME_0(x) ((x) << 24) x 1452 drivers/gpu/drm/radeon/evergreend.h # define PLL_POWER_STATE_IN_TXS2_1(x) ((x) << 7) x 1455 drivers/gpu/drm/radeon/evergreend.h # define PLL_POWER_STATE_IN_OFF_1(x) ((x) << 10) x 1458 drivers/gpu/drm/radeon/evergreend.h # define PLL_RAMP_UP_TIME_1(x) ((x) << 24) x 1468 drivers/gpu/drm/radeon/evergreend.h # define LC_L0S_INACTIVITY(x) ((x) << 8) x 1471 drivers/gpu/drm/radeon/evergreend.h # define LC_L1_INACTIVITY(x) ((x) << 12) x 1495 drivers/gpu/drm/radeon/evergreend.h # define LC_DYN_LANES_PWR_STATE(x) ((x) << 21) x 1506 drivers/gpu/drm/radeon/evergreend.h # define LC_HW_VOLTAGE_IF_CONTROL(x) ((x) << 12) x 1590 drivers/gpu/drm/radeon/evergreend.h # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) x 1594 drivers/gpu/drm/radeon/evergreend.h # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) x 1598 drivers/gpu/drm/radeon/evergreend.h # define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29) x 1606 drivers/gpu/drm/radeon/evergreend.h # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) x 1612 drivers/gpu/drm/radeon/evergreend.h # define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) x 1651 drivers/gpu/drm/radeon/evergreend.h #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) x 1714 drivers/gpu/drm/radeon/evergreend.h #define PACKET3_SET_APPEND_CNT_SRC_SELECT(x) ((x) << 0) x 1715 drivers/gpu/drm/radeon/evergreend.h #define G_PACKET3_SET_APPEND_CNT_SRC_SELECT(x) ((x & 0x3) >> 0) x 1726 drivers/gpu/drm/radeon/evergreend.h #define S__SQ_CONSTANT_TYPE(x) (((x) & 3) << 30) x 1727 drivers/gpu/drm/radeon/evergreend.h #define G__SQ_CONSTANT_TYPE(x) (((x) >> 30) & 3) x 1882 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0) x 1883 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) x 1885 drivers/gpu/drm/radeon/evergreend.h #define S_028800_Z_ENABLE(x) (((x) & 0x1) << 1) x 1886 drivers/gpu/drm/radeon/evergreend.h #define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) x 1888 drivers/gpu/drm/radeon/evergreend.h #define S_028800_Z_WRITE_ENABLE(x) (((x) & 0x1) << 2) x 1889 drivers/gpu/drm/radeon/evergreend.h #define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) x 1891 drivers/gpu/drm/radeon/evergreend.h #define S_028800_ZFUNC(x) (((x) & 0x7) << 4) x 1892 drivers/gpu/drm/radeon/evergreend.h #define G_028800_ZFUNC(x) (((x) >> 4) & 0x7) x 1894 drivers/gpu/drm/radeon/evergreend.h #define S_028800_BACKFACE_ENABLE(x) (((x) & 0x1) << 7) x 1895 drivers/gpu/drm/radeon/evergreend.h #define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) x 1897 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILFUNC(x) (((x) & 0x7) << 8) x 1898 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) x 1908 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILFAIL(x) (((x) & 0x7) << 11) x 1909 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7) x 1919 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILZPASS(x) (((x) & 0x7) << 14) x 1920 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7) x 1922 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILZFAIL(x) (((x) & 0x7) << 17) x 1923 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILZFAIL(x) (((x) >> 17) & 0x7) x 1925 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILFUNC_BF(x) (((x) & 0x7) << 20) x 1926 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7) x 1928 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILFAIL_BF(x) (((x) & 0x7) << 23) x 1929 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILFAIL_BF(x) (((x) >> 23) & 0x7) x 1931 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILZPASS_BF(x) (((x) & 0x7) << 26) x 1932 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILZPASS_BF(x) (((x) >> 26) & 0x7) x 1934 drivers/gpu/drm/radeon/evergreend.h #define S_028800_STENCILZFAIL_BF(x) (((x) & 0x7) << 29) x 1935 drivers/gpu/drm/radeon/evergreend.h #define G_028800_STENCILZFAIL_BF(x) (((x) >> 29) & 0x7) x 1939 drivers/gpu/drm/radeon/evergreend.h #define S_028008_SLICE_START(x) (((x) & 0x7FF) << 0) x 1940 drivers/gpu/drm/radeon/evergreend.h #define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) x 1942 drivers/gpu/drm/radeon/evergreend.h #define S_028008_SLICE_MAX(x) (((x) & 0x7FF) << 13) x 1943 drivers/gpu/drm/radeon/evergreend.h #define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) x 1947 drivers/gpu/drm/radeon/evergreend.h #define S_028ABC_HTILE_WIDTH(x) (((x) & 0x1) << 0) x 1948 drivers/gpu/drm/radeon/evergreend.h #define G_028ABC_HTILE_WIDTH(x) (((x) >> 0) & 0x1) x 1950 drivers/gpu/drm/radeon/evergreend.h #define S_028ABC_HTILE_HEIGHT(x) (((x) & 0x1) << 1) x 1951 drivers/gpu/drm/radeon/evergreend.h #define G_028ABC_HTILE_HEIGHT(x) (((x) >> 1) & 0x1) x 1953 drivers/gpu/drm/radeon/evergreend.h #define G_028ABC_LINEAR(x) (((x) >> 2) & 0x1) x 1955 drivers/gpu/drm/radeon/evergreend.h # define Z_ARRAY_MODE(x) ((x) << 4) x 1956 drivers/gpu/drm/radeon/evergreend.h # define DB_TILE_SPLIT(x) (((x) & 0x7) << 8) x 1957 drivers/gpu/drm/radeon/evergreend.h # define DB_NUM_BANKS(x) (((x) & 0x3) << 12) x 1958 drivers/gpu/drm/radeon/evergreend.h # define DB_BANK_WIDTH(x) (((x) & 0x3) << 16) x 1959 drivers/gpu/drm/radeon/evergreend.h # define DB_BANK_HEIGHT(x) (((x) & 0x3) << 20) x 1960 drivers/gpu/drm/radeon/evergreend.h # define DB_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 24) x 1962 drivers/gpu/drm/radeon/evergreend.h #define S_028040_FORMAT(x) (((x) & 0x3) << 0) x 1963 drivers/gpu/drm/radeon/evergreend.h #define G_028040_FORMAT(x) (((x) >> 0) & 0x3) x 1969 drivers/gpu/drm/radeon/evergreend.h #define S_028040_ARRAY_MODE(x) (((x) & 0xF) << 4) x 1970 drivers/gpu/drm/radeon/evergreend.h #define G_028040_ARRAY_MODE(x) (((x) >> 4) & 0xF) x 1972 drivers/gpu/drm/radeon/evergreend.h #define S_028040_READ_SIZE(x) (((x) & 0x1) << 28) x 1973 drivers/gpu/drm/radeon/evergreend.h #define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) x 1975 drivers/gpu/drm/radeon/evergreend.h #define S_028040_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 29) x 1976 drivers/gpu/drm/radeon/evergreend.h #define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) x 1978 drivers/gpu/drm/radeon/evergreend.h #define S_028040_ZRANGE_PRECISION(x) (((x) & 0x1) << 31) x 1979 drivers/gpu/drm/radeon/evergreend.h #define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) x 1981 drivers/gpu/drm/radeon/evergreend.h #define S_028040_TILE_SPLIT(x) (((x) & 0x7) << 8) x 1982 drivers/gpu/drm/radeon/evergreend.h #define G_028040_TILE_SPLIT(x) (((x) >> 8) & 0x7) x 1983 drivers/gpu/drm/radeon/evergreend.h #define S_028040_NUM_BANKS(x) (((x) & 0x3) << 12) x 1984 drivers/gpu/drm/radeon/evergreend.h #define G_028040_NUM_BANKS(x) (((x) >> 12) & 0x3) x 1985 drivers/gpu/drm/radeon/evergreend.h #define S_028040_BANK_WIDTH(x) (((x) & 0x3) << 16) x 1986 drivers/gpu/drm/radeon/evergreend.h #define G_028040_BANK_WIDTH(x) (((x) >> 16) & 0x3) x 1987 drivers/gpu/drm/radeon/evergreend.h #define S_028040_BANK_HEIGHT(x) (((x) & 0x3) << 20) x 1988 drivers/gpu/drm/radeon/evergreend.h #define G_028040_BANK_HEIGHT(x) (((x) >> 20) & 0x3) x 1989 drivers/gpu/drm/radeon/evergreend.h #define S_028040_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 24) x 1990 drivers/gpu/drm/radeon/evergreend.h #define G_028040_MACRO_TILE_ASPECT(x) (((x) >> 24) & 0x3) x 1993 drivers/gpu/drm/radeon/evergreend.h #define S_028044_FORMAT(x) (((x) & 0x1) << 0) x 1994 drivers/gpu/drm/radeon/evergreend.h #define G_028044_FORMAT(x) (((x) >> 0) & 0x1) x 1998 drivers/gpu/drm/radeon/evergreend.h #define G_028044_TILE_SPLIT(x) (((x) >> 8) & 0x7) x 2005 drivers/gpu/drm/radeon/evergreend.h #define S_028058_PITCH_TILE_MAX(x) (((x) & 0x7FF) << 0) x 2006 drivers/gpu/drm/radeon/evergreend.h #define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) x 2008 drivers/gpu/drm/radeon/evergreend.h #define S_028058_HEIGHT_TILE_MAX(x) (((x) & 0x7FF) << 11) x 2009 drivers/gpu/drm/radeon/evergreend.h #define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) x 2012 drivers/gpu/drm/radeon/evergreend.h #define S_02805C_SLICE_TILE_MAX(x) (((x) & 0x3FFFFF) << 0) x 2013 drivers/gpu/drm/radeon/evergreend.h #define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) x 2072 drivers/gpu/drm/radeon/evergreend.h #define S_028C6C_SLICE_START(x) (((x) & 0x7FF) << 0) x 2073 drivers/gpu/drm/radeon/evergreend.h #define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF) x 2075 drivers/gpu/drm/radeon/evergreend.h #define S_028C6C_SLICE_MAX(x) (((x) & 0x7FF) << 13) x 2076 drivers/gpu/drm/radeon/evergreend.h #define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF) x 2079 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_ENDIAN(x) (((x) & 0x3) << 0) x 2080 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_ENDIAN(x) (((x) >> 0) & 0x3) x 2082 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_FORMAT(x) (((x) & 0x3F) << 2) x 2083 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_FORMAT(x) (((x) >> 2) & 0x3F) x 2120 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_ARRAY_MODE(x) (((x) & 0xF) << 8) x 2121 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_ARRAY_MODE(x) (((x) >> 8) & 0xF) x 2127 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_NUMBER_TYPE(x) (((x) & 0x7) << 12) x 2128 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_NUMBER_TYPE(x) (((x) >> 12) & 0x7) x 2138 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_COMP_SWAP(x) (((x) & 0x3) << 15) x 2139 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_COMP_SWAP(x) (((x) >> 15) & 0x3) x 2145 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 17) x 2146 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_FAST_CLEAR(x) (((x) >> 17) & 0x1) x 2148 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_COMPRESSION(x) (((x) & 0x3) << 18) x 2149 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_COMPRESSION(x) (((x) >> 18) & 0x3) x 2151 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_BLEND_CLAMP(x) (((x) & 0x1) << 19) x 2152 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_BLEND_CLAMP(x) (((x) >> 19) & 0x1) x 2154 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_BLEND_BYPASS(x) (((x) & 0x1) << 20) x 2155 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_BLEND_BYPASS(x) (((x) >> 20) & 0x1) x 2157 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_SIMPLE_FLOAT(x) (((x) & 0x1) << 21) x 2158 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_SIMPLE_FLOAT(x) (((x) >> 21) & 0x1) x 2160 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_ROUND_MODE(x) (((x) & 0x1) << 22) x 2161 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_ROUND_MODE(x) (((x) >> 22) & 0x1) x 2163 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_TILE_COMPACT(x) (((x) & 0x1) << 23) x 2164 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_TILE_COMPACT(x) (((x) >> 23) & 0x1) x 2166 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_SOURCE_FORMAT(x) (((x) & 0x3) << 24) x 2167 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_SOURCE_FORMAT(x) (((x) >> 24) & 0x3) x 2172 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_RAT(x) (((x) & 0x1) << 26) x 2173 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_RAT(x) (((x) >> 26) & 0x1) x 2175 drivers/gpu/drm/radeon/evergreend.h #define S_028C70_RESOURCE_TYPE(x) (((x) & 0x7) << 27) x 2176 drivers/gpu/drm/radeon/evergreend.h #define G_028C70_RESOURCE_TYPE(x) (((x) >> 27) & 0x7) x 2180 drivers/gpu/drm/radeon/evergreend.h # define CB_FORMAT(x) ((x) << 2) x 2181 drivers/gpu/drm/radeon/evergreend.h # define CB_ARRAY_MODE(x) ((x) << 8) x 2186 drivers/gpu/drm/radeon/evergreend.h # define CB_SOURCE_FORMAT(x) ((x) << 24) x 2190 drivers/gpu/drm/radeon/evergreend.h #define S_028C74_NON_DISP_TILING_ORDER(x) (((x) & 0x1) << 4) x 2191 drivers/gpu/drm/radeon/evergreend.h #define G_028C74_NON_DISP_TILING_ORDER(x) (((x) >> 4) & 0x1) x 2193 drivers/gpu/drm/radeon/evergreend.h #define S_028C74_TILE_SPLIT(x) (((x) & 0xf) << 5) x 2194 drivers/gpu/drm/radeon/evergreend.h #define G_028C74_TILE_SPLIT(x) (((x) >> 5) & 0xf) x 2195 drivers/gpu/drm/radeon/evergreend.h #define S_028C74_NUM_BANKS(x) (((x) & 0x3) << 10) x 2196 drivers/gpu/drm/radeon/evergreend.h #define G_028C74_NUM_BANKS(x) (((x) >> 10) & 0x3) x 2197 drivers/gpu/drm/radeon/evergreend.h #define S_028C74_BANK_WIDTH(x) (((x) & 0x3) << 13) x 2198 drivers/gpu/drm/radeon/evergreend.h #define G_028C74_BANK_WIDTH(x) (((x) >> 13) & 0x3) x 2199 drivers/gpu/drm/radeon/evergreend.h #define S_028C74_BANK_HEIGHT(x) (((x) & 0x3) << 16) x 2200 drivers/gpu/drm/radeon/evergreend.h #define G_028C74_BANK_HEIGHT(x) (((x) >> 16) & 0x3) x 2201 drivers/gpu/drm/radeon/evergreend.h #define S_028C74_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 19) x 2202 drivers/gpu/drm/radeon/evergreend.h #define G_028C74_MACRO_TILE_ASPECT(x) (((x) >> 19) & 0x3) x 2204 drivers/gpu/drm/radeon/evergreend.h # define CB_TILE_SPLIT(x) (((x) & 0x7) << 5) x 2212 drivers/gpu/drm/radeon/evergreend.h # define CB_NUM_BANKS(x) (((x) & 0x3) << 10) x 2217 drivers/gpu/drm/radeon/evergreend.h # define CB_BANK_WIDTH(x) (((x) & 0x3) << 13) x 2222 drivers/gpu/drm/radeon/evergreend.h # define CB_BANK_HEIGHT(x) (((x) & 0x3) << 16) x 2227 drivers/gpu/drm/radeon/evergreend.h # define CB_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 19) x 2388 drivers/gpu/drm/radeon/evergreend.h # define TEX_DIM(x) ((x) << 0) x 2398 drivers/gpu/drm/radeon/evergreend.h # define TEX_ARRAY_MODE(x) ((x) << 28) x 2402 drivers/gpu/drm/radeon/evergreend.h # define TEX_DST_SEL_X(x) ((x) << 16) x 2403 drivers/gpu/drm/radeon/evergreend.h # define TEX_DST_SEL_Y(x) ((x) << 19) x 2404 drivers/gpu/drm/radeon/evergreend.h # define TEX_DST_SEL_Z(x) ((x) << 22) x 2405 drivers/gpu/drm/radeon/evergreend.h # define TEX_DST_SEL_W(x) ((x) << 25) x 2414 drivers/gpu/drm/radeon/evergreend.h # define TEX_TILE_SPLIT(x) (((x) & 0x7) << 29) x 2416 drivers/gpu/drm/radeon/evergreend.h # define MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6) x 2417 drivers/gpu/drm/radeon/evergreend.h # define TEX_BANK_WIDTH(x) (((x) & 0x3) << 8) x 2418 drivers/gpu/drm/radeon/evergreend.h # define TEX_BANK_HEIGHT(x) (((x) & 0x3) << 10) x 2419 drivers/gpu/drm/radeon/evergreend.h # define TEX_NUM_BANKS(x) (((x) & 0x3) << 16) x 2421 drivers/gpu/drm/radeon/evergreend.h #define S_030000_DIM(x) (((x) & 0x7) << 0) x 2422 drivers/gpu/drm/radeon/evergreend.h #define G_030000_DIM(x) (((x) >> 0) & 0x7) x 2432 drivers/gpu/drm/radeon/evergreend.h #define S_030000_NON_DISP_TILING_ORDER(x) (((x) & 0x1) << 5) x 2433 drivers/gpu/drm/radeon/evergreend.h #define G_030000_NON_DISP_TILING_ORDER(x) (((x) >> 5) & 0x1) x 2435 drivers/gpu/drm/radeon/evergreend.h #define S_030000_PITCH(x) (((x) & 0xFFF) << 6) x 2436 drivers/gpu/drm/radeon/evergreend.h #define G_030000_PITCH(x) (((x) >> 6) & 0xFFF) x 2438 drivers/gpu/drm/radeon/evergreend.h #define S_030000_TEX_WIDTH(x) (((x) & 0x3FFF) << 18) x 2439 drivers/gpu/drm/radeon/evergreend.h #define G_030000_TEX_WIDTH(x) (((x) >> 18) & 0x3FFF) x 2442 drivers/gpu/drm/radeon/evergreend.h #define S_030004_TEX_HEIGHT(x) (((x) & 0x3FFF) << 0) x 2443 drivers/gpu/drm/radeon/evergreend.h #define G_030004_TEX_HEIGHT(x) (((x) >> 0) & 0x3FFF) x 2445 drivers/gpu/drm/radeon/evergreend.h #define S_030004_TEX_DEPTH(x) (((x) & 0x1FFF) << 14) x 2446 drivers/gpu/drm/radeon/evergreend.h #define G_030004_TEX_DEPTH(x) (((x) >> 14) & 0x1FFF) x 2448 drivers/gpu/drm/radeon/evergreend.h #define S_030004_ARRAY_MODE(x) (((x) & 0xF) << 28) x 2449 drivers/gpu/drm/radeon/evergreend.h #define G_030004_ARRAY_MODE(x) (((x) >> 28) & 0xF) x 2452 drivers/gpu/drm/radeon/evergreend.h #define S_030008_BASE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) x 2453 drivers/gpu/drm/radeon/evergreend.h #define G_030008_BASE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) x 2456 drivers/gpu/drm/radeon/evergreend.h #define S_03000C_MIP_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) x 2457 drivers/gpu/drm/radeon/evergreend.h #define G_03000C_MIP_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) x 2460 drivers/gpu/drm/radeon/evergreend.h #define S_030010_FORMAT_COMP_X(x) (((x) & 0x3) << 0) x 2461 drivers/gpu/drm/radeon/evergreend.h #define G_030010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3) x 2466 drivers/gpu/drm/radeon/evergreend.h #define S_030010_FORMAT_COMP_Y(x) (((x) & 0x3) << 2) x 2467 drivers/gpu/drm/radeon/evergreend.h #define G_030010_FORMAT_COMP_Y(x) (((x) >> 2) & 0x3) x 2469 drivers/gpu/drm/radeon/evergreend.h #define S_030010_FORMAT_COMP_Z(x) (((x) & 0x3) << 4) x 2470 drivers/gpu/drm/radeon/evergreend.h #define G_030010_FORMAT_COMP_Z(x) (((x) >> 4) & 0x3) x 2472 drivers/gpu/drm/radeon/evergreend.h #define S_030010_FORMAT_COMP_W(x) (((x) & 0x3) << 6) x 2473 drivers/gpu/drm/radeon/evergreend.h #define G_030010_FORMAT_COMP_W(x) (((x) >> 6) & 0x3) x 2475 drivers/gpu/drm/radeon/evergreend.h #define S_030010_NUM_FORMAT_ALL(x) (((x) & 0x3) << 8) x 2476 drivers/gpu/drm/radeon/evergreend.h #define G_030010_NUM_FORMAT_ALL(x) (((x) >> 8) & 0x3) x 2481 drivers/gpu/drm/radeon/evergreend.h #define S_030010_SRF_MODE_ALL(x) (((x) & 0x1) << 10) x 2482 drivers/gpu/drm/radeon/evergreend.h #define G_030010_SRF_MODE_ALL(x) (((x) >> 10) & 0x1) x 2486 drivers/gpu/drm/radeon/evergreend.h #define S_030010_FORCE_DEGAMMA(x) (((x) & 0x1) << 11) x 2487 drivers/gpu/drm/radeon/evergreend.h #define G_030010_FORCE_DEGAMMA(x) (((x) >> 11) & 0x1) x 2489 drivers/gpu/drm/radeon/evergreend.h #define S_030010_ENDIAN_SWAP(x) (((x) & 0x3) << 12) x 2490 drivers/gpu/drm/radeon/evergreend.h #define G_030010_ENDIAN_SWAP(x) (((x) >> 12) & 0x3) x 2492 drivers/gpu/drm/radeon/evergreend.h #define S_030010_DST_SEL_X(x) (((x) & 0x7) << 16) x 2493 drivers/gpu/drm/radeon/evergreend.h #define G_030010_DST_SEL_X(x) (((x) >> 16) & 0x7) x 2501 drivers/gpu/drm/radeon/evergreend.h #define S_030010_DST_SEL_Y(x) (((x) & 0x7) << 19) x 2502 drivers/gpu/drm/radeon/evergreend.h #define G_030010_DST_SEL_Y(x) (((x) >> 19) & 0x7) x 2504 drivers/gpu/drm/radeon/evergreend.h #define S_030010_DST_SEL_Z(x) (((x) & 0x7) << 22) x 2505 drivers/gpu/drm/radeon/evergreend.h #define G_030010_DST_SEL_Z(x) (((x) >> 22) & 0x7) x 2507 drivers/gpu/drm/radeon/evergreend.h #define S_030010_DST_SEL_W(x) (((x) & 0x7) << 25) x 2508 drivers/gpu/drm/radeon/evergreend.h #define G_030010_DST_SEL_W(x) (((x) >> 25) & 0x7) x 2510 drivers/gpu/drm/radeon/evergreend.h #define S_030010_BASE_LEVEL(x) (((x) & 0xF) << 28) x 2511 drivers/gpu/drm/radeon/evergreend.h #define G_030010_BASE_LEVEL(x) (((x) >> 28) & 0xF) x 2514 drivers/gpu/drm/radeon/evergreend.h #define S_030014_LAST_LEVEL(x) (((x) & 0xF) << 0) x 2515 drivers/gpu/drm/radeon/evergreend.h #define G_030014_LAST_LEVEL(x) (((x) >> 0) & 0xF) x 2517 drivers/gpu/drm/radeon/evergreend.h #define S_030014_BASE_ARRAY(x) (((x) & 0x1FFF) << 4) x 2518 drivers/gpu/drm/radeon/evergreend.h #define G_030014_BASE_ARRAY(x) (((x) >> 4) & 0x1FFF) x 2520 drivers/gpu/drm/radeon/evergreend.h #define S_030014_LAST_ARRAY(x) (((x) & 0x1FFF) << 17) x 2521 drivers/gpu/drm/radeon/evergreend.h #define G_030014_LAST_ARRAY(x) (((x) >> 17) & 0x1FFF) x 2524 drivers/gpu/drm/radeon/evergreend.h #define S_030018_MAX_ANISO(x) (((x) & 0x7) << 0) x 2525 drivers/gpu/drm/radeon/evergreend.h #define G_030018_MAX_ANISO(x) (((x) >> 0) & 0x7) x 2527 drivers/gpu/drm/radeon/evergreend.h #define S_030018_PERF_MODULATION(x) (((x) & 0x7) << 3) x 2528 drivers/gpu/drm/radeon/evergreend.h #define G_030018_PERF_MODULATION(x) (((x) >> 3) & 0x7) x 2530 drivers/gpu/drm/radeon/evergreend.h #define S_030018_INTERLACED(x) (((x) & 0x1) << 6) x 2531 drivers/gpu/drm/radeon/evergreend.h #define G_030018_INTERLACED(x) (((x) >> 6) & 0x1) x 2533 drivers/gpu/drm/radeon/evergreend.h #define S_030018_TILE_SPLIT(x) (((x) & 0x7) << 29) x 2534 drivers/gpu/drm/radeon/evergreend.h #define G_030018_TILE_SPLIT(x) (((x) >> 29) & 0x7) x 2536 drivers/gpu/drm/radeon/evergreend.h #define S_03001C_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6) x 2537 drivers/gpu/drm/radeon/evergreend.h #define G_03001C_MACRO_TILE_ASPECT(x) (((x) >> 6) & 0x3) x 2538 drivers/gpu/drm/radeon/evergreend.h #define S_03001C_BANK_WIDTH(x) (((x) & 0x3) << 8) x 2539 drivers/gpu/drm/radeon/evergreend.h #define G_03001C_BANK_WIDTH(x) (((x) >> 8) & 0x3) x 2540 drivers/gpu/drm/radeon/evergreend.h #define S_03001C_BANK_HEIGHT(x) (((x) & 0x3) << 10) x 2541 drivers/gpu/drm/radeon/evergreend.h #define G_03001C_BANK_HEIGHT(x) (((x) >> 10) & 0x3) x 2542 drivers/gpu/drm/radeon/evergreend.h #define S_03001C_NUM_BANKS(x) (((x) & 0x3) << 16) x 2543 drivers/gpu/drm/radeon/evergreend.h #define G_03001C_NUM_BANKS(x) (((x) >> 16) & 0x3) x 2544 drivers/gpu/drm/radeon/evergreend.h #define S_03001C_TYPE(x) (((x) & 0x3) << 30) x 2545 drivers/gpu/drm/radeon/evergreend.h #define G_03001C_TYPE(x) (((x) >> 30) & 0x3) x 2551 drivers/gpu/drm/radeon/evergreend.h #define S_03001C_DATA_FORMAT(x) (((x) & 0x3F) << 0) x 2552 drivers/gpu/drm/radeon/evergreend.h #define G_03001C_DATA_FORMAT(x) (((x) >> 0) & 0x3F) x 2558 drivers/gpu/drm/radeon/evergreend.h # define SQ_VTXC_BASE_ADDR_HI(x) ((x) << 0) x 2559 drivers/gpu/drm/radeon/evergreend.h # define SQ_VTXC_STRIDE(x) ((x) << 8) x 2560 drivers/gpu/drm/radeon/evergreend.h # define SQ_VTXC_ENDIAN_SWAP(x) ((x) << 30) x 2565 drivers/gpu/drm/radeon/evergreend.h # define SQ_VTCX_SEL_X(x) ((x) << 3) x 2566 drivers/gpu/drm/radeon/evergreend.h # define SQ_VTCX_SEL_Y(x) ((x) << 6) x 2567 drivers/gpu/drm/radeon/evergreend.h # define SQ_VTCX_SEL_Z(x) ((x) << 9) x 2568 drivers/gpu/drm/radeon/evergreend.h # define SQ_VTCX_SEL_W(x) ((x) << 12) x 2620 drivers/gpu/drm/radeon/evergreend.h # define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ x 2624 drivers/gpu/drm/radeon/evergreend.h # define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ x 30 drivers/gpu/drm/radeon/ni_reg.h # define NI_GRPH_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 0) x 35 drivers/gpu/drm/radeon/ni_reg.h # define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4) x 44 drivers/gpu/drm/radeon/ni_reg.h # define NI_INPUT_CSC_GRPH_MODE(x) (((x) & 0x3) << 0) x 48 drivers/gpu/drm/radeon/ni_reg.h # define NI_INPUT_CSC_OVL_MODE(x) (((x) & 0x3) << 4) x 51 drivers/gpu/drm/radeon/ni_reg.h # define NI_OUTPUT_CSC_GRPH_MODE(x) (((x) & 0x7) << 0) x 58 drivers/gpu/drm/radeon/ni_reg.h # define NI_OUTPUT_CSC_OVL_MODE(x) (((x) & 0x7) << 4) x 61 drivers/gpu/drm/radeon/ni_reg.h # define NI_GRPH_DEGAMMA_MODE(x) (((x) & 0x3) << 0) x 65 drivers/gpu/drm/radeon/ni_reg.h # define NI_OVL_DEGAMMA_MODE(x) (((x) & 0x3) << 4) x 66 drivers/gpu/drm/radeon/ni_reg.h # define NI_ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8) x 67 drivers/gpu/drm/radeon/ni_reg.h # define NI_CURSOR_DEGAMMA_MODE(x) (((x) & 0x3) << 12) x 70 drivers/gpu/drm/radeon/ni_reg.h # define NI_GRPH_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 0) x 75 drivers/gpu/drm/radeon/ni_reg.h # define NI_OVL_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 4) x 78 drivers/gpu/drm/radeon/ni_reg.h # define NI_GRPH_REGAMMA_MODE(x) (((x) & 0x7) << 0) x 84 drivers/gpu/drm/radeon/ni_reg.h # define NI_OVL_REGAMMA_MODE(x) (((x) & 0x7) << 4) x 87 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_LINK_FRAME (((x) & 0x3ff) << 0) x 88 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_LINK_LINE (((x) & 0x3) << 16) x 91 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_BLANK_CODE (((x) & 0x1) << 0) x 92 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_TIMESTAMP_MODE (((x) & 0x1) << 4) x 93 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_ZERO_ENCODER (((x) & 0x1) << 8) x 96 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_RATE_Y(x) (((x) & 0x3ffffff) << 0) x 97 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_RATE_X(x) (((x) & 0x3f) << 26) x 102 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_SAT_SRC0(x) (((x) & 0x7) << 0) x 103 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_SAT_SLOT_COUNT0(x) (((x) & 0x3f) << 8) x 104 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_SAT_SRC1(x) (((x) & 0x7) << 16) x 105 drivers/gpu/drm/radeon/ni_reg.h # define NI_DP_MSE_SAT_SLOT_COUNT1(x) (((x) & 0x3f) << 24) x 116 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_FE_SOURCE_SELECT(x) (((x) & 0x7f) << 8) x 117 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_FE_DIG_MODE(x) (((x) & 0x7) << 16) x 123 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_HPD_SELECT(x) (((x) & 0x7) << 28) x 126 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_SOURCE_SELECT(x) (((x) & 0x3) << 0) x 127 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_STEREOSYNC_SELECT(x) (((x) & 0x3) << 4) x 128 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_STEREOSYNC_GATE_EN(x) (((x) & 0x1) << 8) x 129 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_DUAL_LINK_ENABLE(x) (((x) & 0x1) << 16) x 130 drivers/gpu/drm/radeon/ni_reg.h # define NI_DIG_SWAP(x) (((x) & 0x1) << 18) x 60 drivers/gpu/drm/radeon/nid.h #define RINGID(x) (((x) & 0x3) << 0) x 61 drivers/gpu/drm/radeon/nid.h #define VMID(x) (((x) & 0x7) << 0) x 101 drivers/gpu/drm/radeon/nid.h #define REQUEST_TYPE(x) (((x) & 0xf) << 0) x 109 drivers/gpu/drm/radeon/nid.h #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) x 110 drivers/gpu/drm/radeon/nid.h #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 18) x 121 drivers/gpu/drm/radeon/nid.h #define BANK_SELECT(x) ((x) << 0) x 122 drivers/gpu/drm/radeon/nid.h #define CACHE_UPDATE_MODE(x) ((x) << 6) x 124 drivers/gpu/drm/radeon/nid.h #define L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15) x 129 drivers/gpu/drm/radeon/nid.h #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) x 142 drivers/gpu/drm/radeon/nid.h #define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) x 237 drivers/gpu/drm/radeon/nid.h #define GRBM_READ_TIMEOUT(x) ((x) << 0) x 296 drivers/gpu/drm/radeon/nid.h #define INSTANCE_INDEX(x) ((x) << 0) x 297 drivers/gpu/drm/radeon/nid.h #define SE_INDEX(x) ((x) << 16) x 326 drivers/gpu/drm/radeon/nid.h #define MEQ1_START(x) ((x) << 0) x 327 drivers/gpu/drm/radeon/nid.h #define MEQ2_START(x) ((x) << 8) x 331 drivers/gpu/drm/radeon/nid.h #define CACHE_INVALIDATION(x) ((x) << 0) x 335 drivers/gpu/drm/radeon/nid.h #define AUTO_INVLD_EN(x) ((x) << 6) x 344 drivers/gpu/drm/radeon/nid.h #define INACTIVE_QD_PIPES(x) ((x) << 8) x 347 drivers/gpu/drm/radeon/nid.h #define INACTIVE_SIMDS(x) ((x) << 16) x 359 drivers/gpu/drm/radeon/nid.h #define NUM_CLIP_SEQ(x) ((x) << 1) x 361 drivers/gpu/drm/radeon/nid.h #define SC_PRIM_FIFO_SIZE(x) ((x) << 0) x 362 drivers/gpu/drm/radeon/nid.h #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12) x 363 drivers/gpu/drm/radeon/nid.h #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20) x 365 drivers/gpu/drm/radeon/nid.h #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) x 366 drivers/gpu/drm/radeon/nid.h #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) x 371 drivers/gpu/drm/radeon/nid.h #define GFX_PRIO(x) ((x) << 2) x 372 drivers/gpu/drm/radeon/nid.h #define CS1_PRIO(x) ((x) << 4) x 373 drivers/gpu/drm/radeon/nid.h #define CS2_PRIO(x) ((x) << 6) x 375 drivers/gpu/drm/radeon/nid.h #define NUM_PS_GPRS(x) ((x) << 0) x 376 drivers/gpu/drm/radeon/nid.h #define NUM_VS_GPRS(x) ((x) << 16) x 377 drivers/gpu/drm/radeon/nid.h #define NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28) x 389 drivers/gpu/drm/radeon/nid.h #define CACHE_FIFO_SIZE(x) ((x) << 0) x 390 drivers/gpu/drm/radeon/nid.h #define FETCH_FIFO_HIWATER(x) ((x) << 8) x 391 drivers/gpu/drm/radeon/nid.h #define DONE_FIFO_HIWATER(x) ((x) << 16) x 392 drivers/gpu/drm/radeon/nid.h #define ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24) x 402 drivers/gpu/drm/radeon/nid.h #define COLOR_BUFFER_SIZE(x) ((x) << 0) x 403 drivers/gpu/drm/radeon/nid.h #define POSITION_BUFFER_SIZE(x) ((x) << 8) x 404 drivers/gpu/drm/radeon/nid.h #define SMX_BUFFER_SIZE(x) ((x) << 16) x 409 drivers/gpu/drm/radeon/nid.h #define GPR_WRITE_PRIORITY(x) ((x) << 0) x 411 drivers/gpu/drm/radeon/nid.h #define VTX_DONE_DELAY(x) ((x) << 0) x 430 drivers/gpu/drm/radeon/nid.h #define BACKEND_DISABLE(x) ((x) << 16) x 432 drivers/gpu/drm/radeon/nid.h #define NUM_PIPES(x) ((x) << 0) x 435 drivers/gpu/drm/radeon/nid.h #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) x 438 drivers/gpu/drm/radeon/nid.h #define BANK_INTERLEAVE_SIZE(x) ((x) << 8) x 439 drivers/gpu/drm/radeon/nid.h #define NUM_SHADER_ENGINES(x) ((x) << 12) x 442 drivers/gpu/drm/radeon/nid.h #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) x 445 drivers/gpu/drm/radeon/nid.h #define NUM_GPUS(x) ((x) << 20) x 448 drivers/gpu/drm/radeon/nid.h #define MULTI_GPU_TILE_SIZE(x) ((x) << 24) x 451 drivers/gpu/drm/radeon/nid.h #define ROW_SIZE(x) ((x) << 28) x 454 drivers/gpu/drm/radeon/nid.h #define NUM_LOWER_PIPES(x) ((x) << 30) x 474 drivers/gpu/drm/radeon/nid.h #define NUMBER_OF_SETS(x) ((x) << 1) x 478 drivers/gpu/drm/radeon/nid.h #define ES_FLUSH_CTL(x) ((x) << 0) x 479 drivers/gpu/drm/radeon/nid.h #define GS_FLUSH_CTL(x) ((x) << 3) x 480 drivers/gpu/drm/radeon/nid.h #define ACK_FLUSH_CTL(x) ((x) << 6) x 485 drivers/gpu/drm/radeon/nid.h #define RB_BUFSZ(x) ((x) << 0) x 486 drivers/gpu/drm/radeon/nid.h #define RB_BLKSZ(x) ((x) << 8) x 525 drivers/gpu/drm/radeon/nid.h #define HOST_SMC_MSG(x) ((x) << 0) x 528 drivers/gpu/drm/radeon/nid.h #define HOST_SMC_RESP(x) ((x) << 8) x 531 drivers/gpu/drm/radeon/nid.h #define SMC_HOST_MSG(x) ((x) << 16) x 534 drivers/gpu/drm/radeon/nid.h #define SMC_HOST_RESP(x) ((x) << 24) x 542 drivers/gpu/drm/radeon/nid.h #define SPLL_REF_DIV(x) ((x) << 4) x 544 drivers/gpu/drm/radeon/nid.h #define SPLL_PDIV_A(x) ((x) << 20) x 548 drivers/gpu/drm/radeon/nid.h #define SCLK_MUX_SEL(x) ((x) << 0) x 551 drivers/gpu/drm/radeon/nid.h #define SPLL_FB_DIV(x) ((x) << 0) x 561 drivers/gpu/drm/radeon/nid.h #define CLKF(x) ((x) << 0) x 563 drivers/gpu/drm/radeon/nid.h #define CLKR(x) ((x) << 7) x 565 drivers/gpu/drm/radeon/nid.h #define CLKFRAC(x) ((x) << 12) x 567 drivers/gpu/drm/radeon/nid.h #define YCLK_POST_DIV(x) ((x) << 17) x 569 drivers/gpu/drm/radeon/nid.h #define IBIAS(x) ((x) << 20) x 588 drivers/gpu/drm/radeon/nid.h # define SW_SMIO_INDEX(x) ((x) << 6) x 614 drivers/gpu/drm/radeon/nid.h # define DLL_SPEED(x) ((x) << 0) x 654 drivers/gpu/drm/radeon/nid.h # define CG_R(x) ((x) << 0) x 656 drivers/gpu/drm/radeon/nid.h # define CG_L(x) ((x) << 16) x 660 drivers/gpu/drm/radeon/nid.h #define CG_CLIENT_REQ(x) ((x) << 0) x 663 drivers/gpu/drm/radeon/nid.h #define CG_CLIENT_RESP(x) ((x) << 8) x 666 drivers/gpu/drm/radeon/nid.h #define CLIENT_CG_REQ(x) ((x) << 16) x 669 drivers/gpu/drm/radeon/nid.h #define CLIENT_CG_RESP(x) ((x) << 24) x 675 drivers/gpu/drm/radeon/nid.h #define CLK_S(x) ((x) << 4) x 679 drivers/gpu/drm/radeon/nid.h #define CLK_V(x) ((x) << 0) x 688 drivers/gpu/drm/radeon/nid.h #define CLKV(x) ((x) << 0) x 691 drivers/gpu/drm/radeon/nid.h #define CLKS(x) ((x) << 0) x 695 drivers/gpu/drm/radeon/nid.h #define TID_CNT(x) ((x) << 0) x 697 drivers/gpu/drm/radeon/nid.h #define TID_UNIT(x) ((x) << 14) x 711 drivers/gpu/drm/radeon/nid.h #define MC_RD_ENABLE(x) ((x) << 4) x 713 drivers/gpu/drm/radeon/nid.h #define INDEX(x) ((x) << 6) x 719 drivers/gpu/drm/radeon/nid.h #define READ_WEIGHT(x) ((x) << 1) x 722 drivers/gpu/drm/radeon/nid.h #define WRITE_WEIGHT(x) ((x) << 7) x 731 drivers/gpu/drm/radeon/nid.h #define POWERMODE0(x) ((x) << 0) x 734 drivers/gpu/drm/radeon/nid.h #define POWERMODE1(x) ((x) << 8) x 737 drivers/gpu/drm/radeon/nid.h #define POWERMODE2(x) ((x) << 16) x 740 drivers/gpu/drm/radeon/nid.h #define POWERMODE3(x) ((x) << 24) x 745 drivers/gpu/drm/radeon/nid.h #define CG_ARB_REQ(x) ((x) << 0) x 748 drivers/gpu/drm/radeon/nid.h #define CG_ARB_RESP(x) ((x) << 8) x 751 drivers/gpu/drm/radeon/nid.h #define ARB_CG_REQ(x) ((x) << 16) x 754 drivers/gpu/drm/radeon/nid.h #define ARB_CG_RESP(x) ((x) << 24) x 765 drivers/gpu/drm/radeon/nid.h #define STATE0(x) ((x) << 0) x 768 drivers/gpu/drm/radeon/nid.h #define STATE1(x) ((x) << 5) x 771 drivers/gpu/drm/radeon/nid.h #define STATE2(x) ((x) << 10) x 774 drivers/gpu/drm/radeon/nid.h #define STATE3(x) ((x) << 15) x 829 drivers/gpu/drm/radeon/nid.h #define AUX_LS_UPDATE_DISABLE(x) (((x) & 0x1) << 12) x 830 drivers/gpu/drm/radeon/nid.h #define AUX_HPD_DISCON(x) (((x) & 0x1) << 16) x 832 drivers/gpu/drm/radeon/nid.h #define AUX_HPD_SEL(x) (((x) & 0x7) << 20) x 839 drivers/gpu/drm/radeon/nid.h #define AUX_SW_START_DELAY(x) (((x) & 0xf) << 4) x 840 drivers/gpu/drm/radeon/nid.h #define AUX_SW_WR_BYTES(x) (((x) & 0x1f) << 16) x 851 drivers/gpu/drm/radeon/nid.h #define AUX_SW_RX_TIMEOUT_STATE(x) (((x) & 0x7) << 4) x 868 drivers/gpu/drm/radeon/nid.h #define AUX_SW_DATA_MASK(x) (((x) & 0xff) << 8) x 869 drivers/gpu/drm/radeon/nid.h #define AUX_SW_DATA_INDEX(x) (((x) & 0x1f) << 16) x 881 drivers/gpu/drm/radeon/nid.h #define VSP(x) ((x) << 0) x 884 drivers/gpu/drm/radeon/nid.h #define VSP0(x) ((x) << 8) x 887 drivers/gpu/drm/radeon/nid.h #define GPR(x) ((x) << 16) x 892 drivers/gpu/drm/radeon/nid.h #define MIN_POWER(x) ((x) << 0) x 895 drivers/gpu/drm/radeon/nid.h #define MAX_POWER(x) ((x) << 16) x 899 drivers/gpu/drm/radeon/nid.h #define MAX_POWER_DELTA(x) ((x) << 0) x 902 drivers/gpu/drm/radeon/nid.h #define STI_SIZE(x) ((x) << 16) x 905 drivers/gpu/drm/radeon/nid.h #define LTI_RATIO(x) ((x) << 27) x 911 drivers/gpu/drm/radeon/nid.h #define WEIGHT_TCP_SIG0(x) ((x) << 0) x 914 drivers/gpu/drm/radeon/nid.h #define WEIGHT_TCP_SIG1(x) ((x) << 6) x 917 drivers/gpu/drm/radeon/nid.h #define WEIGHT_TA_SIG(x) ((x) << 12) x 921 drivers/gpu/drm/radeon/nid.h #define WEIGHT_TCC_EN0(x) ((x) << 0) x 924 drivers/gpu/drm/radeon/nid.h #define WEIGHT_TCC_EN1(x) ((x) << 6) x 927 drivers/gpu/drm/radeon/nid.h #define WEIGHT_TCC_EN2(x) ((x) << 12) x 930 drivers/gpu/drm/radeon/nid.h #define WEIGHT_TCC_EN3(x) ((x) << 18) x 934 drivers/gpu/drm/radeon/nid.h #define WEIGHT_CB_EN0(x) ((x) << 0) x 937 drivers/gpu/drm/radeon/nid.h #define WEIGHT_CB_EN1(x) ((x) << 6) x 940 drivers/gpu/drm/radeon/nid.h #define WEIGHT_CB_EN2(x) ((x) << 12) x 943 drivers/gpu/drm/radeon/nid.h #define WEIGHT_CB_EN3(x) ((x) << 18) x 947 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DB_SIG0(x) ((x) << 0) x 950 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DB_SIG1(x) ((x) << 6) x 953 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DB_SIG2(x) ((x) << 12) x 956 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DB_SIG3(x) ((x) << 18) x 960 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SXM_SIG0(x) ((x) << 0) x 963 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SXM_SIG1(x) ((x) << 6) x 966 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SXM_SIG2(x) ((x) << 12) x 969 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SXS_SIG0(x) ((x) << 18) x 972 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SXS_SIG1(x) ((x) << 24) x 976 drivers/gpu/drm/radeon/nid.h #define WEIGHT_XBR_0(x) ((x) << 0) x 979 drivers/gpu/drm/radeon/nid.h #define WEIGHT_XBR_1(x) ((x) << 6) x 982 drivers/gpu/drm/radeon/nid.h #define WEIGHT_XBR_2(x) ((x) << 12) x 985 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPI_SIG0(x) ((x) << 18) x 989 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPI_SIG1(x) ((x) << 0) x 992 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPI_SIG2(x) ((x) << 6) x 995 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPI_SIG3(x) ((x) << 12) x 998 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPI_SIG4(x) ((x) << 18) x 1001 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPI_SIG5(x) ((x) << 24) x 1005 drivers/gpu/drm/radeon/nid.h #define WEIGHT_LDS_SIG0(x) ((x) << 0) x 1008 drivers/gpu/drm/radeon/nid.h #define WEIGHT_LDS_SIG1(x) ((x) << 6) x 1011 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SC(x) ((x) << 24) x 1015 drivers/gpu/drm/radeon/nid.h #define WEIGHT_BIF(x) ((x) << 0) x 1018 drivers/gpu/drm/radeon/nid.h #define WEIGHT_CP(x) ((x) << 6) x 1021 drivers/gpu/drm/radeon/nid.h #define WEIGHT_PA_SIG0(x) ((x) << 12) x 1024 drivers/gpu/drm/radeon/nid.h #define WEIGHT_PA_SIG1(x) ((x) << 18) x 1027 drivers/gpu/drm/radeon/nid.h #define WEIGHT_VGT_SIG0(x) ((x) << 24) x 1031 drivers/gpu/drm/radeon/nid.h #define WEIGHT_VGT_SIG1(x) ((x) << 0) x 1034 drivers/gpu/drm/radeon/nid.h #define WEIGHT_VGT_SIG2(x) ((x) << 6) x 1037 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DC_SIG0(x) ((x) << 12) x 1040 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DC_SIG1(x) ((x) << 18) x 1043 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DC_SIG2(x) ((x) << 24) x 1047 drivers/gpu/drm/radeon/nid.h #define WEIGHT_DC_SIG3(x) ((x) << 0) x 1050 drivers/gpu/drm/radeon/nid.h #define WEIGHT_UVD_SIG0(x) ((x) << 6) x 1053 drivers/gpu/drm/radeon/nid.h #define WEIGHT_UVD_SIG1(x) ((x) << 12) x 1056 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPARE0(x) ((x) << 18) x 1059 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SPARE1(x) ((x) << 24) x 1063 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SQ_VSP(x) ((x) << 0) x 1066 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SQ_VSP0(x) ((x) << 14) x 1070 drivers/gpu/drm/radeon/nid.h #define OVR_MODE_SPARE_0(x) ((x) << 16) x 1073 drivers/gpu/drm/radeon/nid.h #define OVR_VAL_SPARE_0(x) ((x) << 17) x 1076 drivers/gpu/drm/radeon/nid.h #define OVR_MODE_SPARE_1(x) ((x) << 18) x 1079 drivers/gpu/drm/radeon/nid.h #define OVR_VAL_SPARE_1(x) ((x) << 19) x 1083 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SQ_GPR(x) ((x) << 0) x 1086 drivers/gpu/drm/radeon/nid.h #define WEIGHT_SQ_LDS(x) ((x) << 14) x 1118 drivers/gpu/drm/radeon/nid.h # define LC_HW_VOLTAGE_IF_CONTROL(x) ((x) << 12) x 1195 drivers/gpu/drm/radeon/nid.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 1204 drivers/gpu/drm/radeon/nid.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 1208 drivers/gpu/drm/radeon/nid.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 1236 drivers/gpu/drm/radeon/nid.h #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) x 1239 drivers/gpu/drm/radeon/nid.h #define EVENT_TYPE(x) ((x) << 0) x 1240 drivers/gpu/drm/radeon/nid.h #define EVENT_INDEX(x) ((x) << 8) x 1249 drivers/gpu/drm/radeon/nid.h #define DATA_SEL(x) ((x) << 29) x 1255 drivers/gpu/drm/radeon/nid.h #define INT_SEL(x) ((x) << 24) x 1306 drivers/gpu/drm/radeon/nid.h # define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ x 1310 drivers/gpu/drm/radeon/nid.h # define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ x 69 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) x 70 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) x 72 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) x 73 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) x 75 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_SE(x) (((x) & 0x1) << 2) x 76 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_SE(x) (((x) >> 2) & 0x1) x 78 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) x 79 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) x 81 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) x 82 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) x 84 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) x 85 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) x 87 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) x 88 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) x 90 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) x 91 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) x 93 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) x 94 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) x 96 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) x 97 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) x 99 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) x 100 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) x 102 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) x 103 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) x 105 drivers/gpu/drm/radeon/r100d.h #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) x 106 drivers/gpu/drm/radeon/r100d.h #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) x 109 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_DBL_RESYNC(x) (((x) & 0x1) << 0) x 110 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_DBL_RESYNC(x) (((x) >> 0) & 0x1) x 112 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_MSTR_RESET(x) (((x) & 0x1) << 1) x 113 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_MSTR_RESET(x) (((x) >> 1) & 0x1) x 115 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_FLUSH_BUF(x) (((x) & 0x1) << 2) x 116 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_FLUSH_BUF(x) (((x) >> 2) & 0x1) x 118 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_STOP_REQ_DIS(x) (((x) & 0x1) << 3) x 119 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_STOP_REQ_DIS(x) (((x) >> 3) & 0x1) x 121 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_PM4_READ_COMBINE_EN(x) (((x) & 0x1) << 4) x 122 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_PM4_READ_COMBINE_EN(x) (((x) >> 4) & 0x1) x 124 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_WRT_COMBINE_EN(x) (((x) & 0x1) << 5) x 125 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_WRT_COMBINE_EN(x) (((x) >> 5) & 0x1) x 127 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_MASTER_DIS(x) (((x) & 0x1) << 6) x 128 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_MASTER_DIS(x) (((x) >> 6) & 0x1) x 130 drivers/gpu/drm/radeon/r100d.h #define S_000030_BIOS_ROM_WRT_EN(x) (((x) & 0x1) << 7) x 131 drivers/gpu/drm/radeon/r100d.h #define G_000030_BIOS_ROM_WRT_EN(x) (((x) >> 7) & 0x1) x 133 drivers/gpu/drm/radeon/r100d.h #define S_000030_BM_DAC_CRIPPLE(x) (((x) & 0x1) << 8) x 134 drivers/gpu/drm/radeon/r100d.h #define G_000030_BM_DAC_CRIPPLE(x) (((x) >> 8) & 0x1) x 136 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_NON_PM4_READ_COMBINE_EN(x) (((x) & 0x1) << 9) x 137 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_NON_PM4_READ_COMBINE_EN(x) (((x) >> 9) & 0x1) x 139 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_XFERD_DISCARD_EN(x) (((x) & 0x1) << 10) x 140 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_XFERD_DISCARD_EN(x) (((x) >> 10) & 0x1) x 142 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_SGL_READ_DISABLE(x) (((x) & 0x1) << 11) x 143 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_SGL_READ_DISABLE(x) (((x) >> 11) & 0x1) x 145 drivers/gpu/drm/radeon/r100d.h #define S_000030_BIOS_DIS_ROM(x) (((x) & 0x1) << 12) x 146 drivers/gpu/drm/radeon/r100d.h #define G_000030_BIOS_DIS_ROM(x) (((x) >> 12) & 0x1) x 148 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_PCI_READ_RETRY_EN(x) (((x) & 0x1) << 13) x 149 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_PCI_READ_RETRY_EN(x) (((x) >> 13) & 0x1) x 151 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_AGP_AD_STEPPING_EN(x) (((x) & 0x1) << 14) x 152 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_AGP_AD_STEPPING_EN(x) (((x) >> 14) & 0x1) x 154 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_PCI_WRT_RETRY_EN(x) (((x) & 0x1) << 15) x 155 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_PCI_WRT_RETRY_EN(x) (((x) >> 15) & 0x1) x 157 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_RETRY_WS(x) (((x) & 0xF) << 16) x 158 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_RETRY_WS(x) (((x) >> 16) & 0xF) x 160 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_MSTR_RD_MULT(x) (((x) & 0x1) << 20) x 161 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_MSTR_RD_MULT(x) (((x) >> 20) & 0x1) x 163 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_MSTR_RD_LINE(x) (((x) & 0x1) << 21) x 164 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_MSTR_RD_LINE(x) (((x) >> 21) & 0x1) x 166 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_SUSPEND(x) (((x) & 0x1) << 22) x 167 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_SUSPEND(x) (((x) >> 22) & 0x1) x 169 drivers/gpu/drm/radeon/r100d.h #define S_000030_LAT_16X(x) (((x) & 0x1) << 23) x 170 drivers/gpu/drm/radeon/r100d.h #define G_000030_LAT_16X(x) (((x) >> 23) & 0x1) x 172 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_RD_DISCARD_EN(x) (((x) & 0x1) << 24) x 173 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_RD_DISCARD_EN(x) (((x) >> 24) & 0x1) x 175 drivers/gpu/drm/radeon/r100d.h #define S_000030_ENFRCWRDY(x) (((x) & 0x1) << 25) x 176 drivers/gpu/drm/radeon/r100d.h #define G_000030_ENFRCWRDY(x) (((x) >> 25) & 0x1) x 178 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_MSTR_WS(x) (((x) & 0x1) << 26) x 179 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_MSTR_WS(x) (((x) >> 26) & 0x1) x 181 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_PARKING_DIS(x) (((x) & 0x1) << 27) x 182 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_PARKING_DIS(x) (((x) >> 27) & 0x1) x 184 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_MSTR_DISCONNECT_EN(x) (((x) & 0x1) << 28) x 185 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_MSTR_DISCONNECT_EN(x) (((x) >> 28) & 0x1) x 187 drivers/gpu/drm/radeon/r100d.h #define S_000030_SERR_EN(x) (((x) & 0x1) << 29) x 188 drivers/gpu/drm/radeon/r100d.h #define G_000030_SERR_EN(x) (((x) >> 29) & 0x1) x 190 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_READ_BURST(x) (((x) & 0x1) << 30) x 191 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_READ_BURST(x) (((x) >> 30) & 0x1) x 193 drivers/gpu/drm/radeon/r100d.h #define S_000030_BUS_RDY_READ_DLY(x) (((x) & 0x1) << 31) x 194 drivers/gpu/drm/radeon/r100d.h #define G_000030_BUS_RDY_READ_DLY(x) (((x) >> 31) & 0x1) x 197 drivers/gpu/drm/radeon/r100d.h #define S_000040_CRTC_VBLANK(x) (((x) & 0x1) << 0) x 198 drivers/gpu/drm/radeon/r100d.h #define G_000040_CRTC_VBLANK(x) (((x) >> 0) & 0x1) x 200 drivers/gpu/drm/radeon/r100d.h #define S_000040_CRTC_VLINE(x) (((x) & 0x1) << 1) x 201 drivers/gpu/drm/radeon/r100d.h #define G_000040_CRTC_VLINE(x) (((x) >> 1) & 0x1) x 203 drivers/gpu/drm/radeon/r100d.h #define S_000040_CRTC_VSYNC(x) (((x) & 0x1) << 2) x 204 drivers/gpu/drm/radeon/r100d.h #define G_000040_CRTC_VSYNC(x) (((x) >> 2) & 0x1) x 206 drivers/gpu/drm/radeon/r100d.h #define S_000040_SNAPSHOT(x) (((x) & 0x1) << 3) x 207 drivers/gpu/drm/radeon/r100d.h #define G_000040_SNAPSHOT(x) (((x) >> 3) & 0x1) x 209 drivers/gpu/drm/radeon/r100d.h #define S_000040_FP_DETECT(x) (((x) & 0x1) << 4) x 210 drivers/gpu/drm/radeon/r100d.h #define G_000040_FP_DETECT(x) (((x) >> 4) & 0x1) x 212 drivers/gpu/drm/radeon/r100d.h #define S_000040_CRTC2_VLINE(x) (((x) & 0x1) << 5) x 213 drivers/gpu/drm/radeon/r100d.h #define G_000040_CRTC2_VLINE(x) (((x) >> 5) & 0x1) x 215 drivers/gpu/drm/radeon/r100d.h #define S_000040_DMA_VIPH0_INT_EN(x) (((x) & 0x1) << 12) x 216 drivers/gpu/drm/radeon/r100d.h #define G_000040_DMA_VIPH0_INT_EN(x) (((x) >> 12) & 0x1) x 218 drivers/gpu/drm/radeon/r100d.h #define S_000040_CRTC2_VSYNC(x) (((x) & 0x1) << 6) x 219 drivers/gpu/drm/radeon/r100d.h #define G_000040_CRTC2_VSYNC(x) (((x) >> 6) & 0x1) x 221 drivers/gpu/drm/radeon/r100d.h #define S_000040_SNAPSHOT2(x) (((x) & 0x1) << 7) x 222 drivers/gpu/drm/radeon/r100d.h #define G_000040_SNAPSHOT2(x) (((x) >> 7) & 0x1) x 224 drivers/gpu/drm/radeon/r100d.h #define S_000040_CRTC2_VBLANK(x) (((x) & 0x1) << 9) x 225 drivers/gpu/drm/radeon/r100d.h #define G_000040_CRTC2_VBLANK(x) (((x) >> 9) & 0x1) x 227 drivers/gpu/drm/radeon/r100d.h #define S_000040_FP2_DETECT(x) (((x) & 0x1) << 10) x 228 drivers/gpu/drm/radeon/r100d.h #define G_000040_FP2_DETECT(x) (((x) >> 10) & 0x1) x 230 drivers/gpu/drm/radeon/r100d.h #define S_000040_VSYNC_DIFF_OVER_LIMIT(x) (((x) & 0x1) << 11) x 231 drivers/gpu/drm/radeon/r100d.h #define G_000040_VSYNC_DIFF_OVER_LIMIT(x) (((x) >> 11) & 0x1) x 233 drivers/gpu/drm/radeon/r100d.h #define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) x 234 drivers/gpu/drm/radeon/r100d.h #define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) x 236 drivers/gpu/drm/radeon/r100d.h #define S_000040_DMA_VIPH2_INT_EN(x) (((x) & 0x1) << 14) x 237 drivers/gpu/drm/radeon/r100d.h #define G_000040_DMA_VIPH2_INT_EN(x) (((x) >> 14) & 0x1) x 239 drivers/gpu/drm/radeon/r100d.h #define S_000040_DMA_VIPH3_INT_EN(x) (((x) & 0x1) << 15) x 240 drivers/gpu/drm/radeon/r100d.h #define G_000040_DMA_VIPH3_INT_EN(x) (((x) >> 15) & 0x1) x 242 drivers/gpu/drm/radeon/r100d.h #define S_000040_I2C_INT_EN(x) (((x) & 0x1) << 17) x 243 drivers/gpu/drm/radeon/r100d.h #define G_000040_I2C_INT_EN(x) (((x) >> 17) & 0x1) x 245 drivers/gpu/drm/radeon/r100d.h #define S_000040_GUI_IDLE(x) (((x) & 0x1) << 19) x 246 drivers/gpu/drm/radeon/r100d.h #define G_000040_GUI_IDLE(x) (((x) >> 19) & 0x1) x 248 drivers/gpu/drm/radeon/r100d.h #define S_000040_VIPH_INT_EN(x) (((x) & 0x1) << 24) x 249 drivers/gpu/drm/radeon/r100d.h #define G_000040_VIPH_INT_EN(x) (((x) >> 24) & 0x1) x 251 drivers/gpu/drm/radeon/r100d.h #define S_000040_SW_INT_EN(x) (((x) & 0x1) << 25) x 252 drivers/gpu/drm/radeon/r100d.h #define G_000040_SW_INT_EN(x) (((x) >> 25) & 0x1) x 254 drivers/gpu/drm/radeon/r100d.h #define S_000040_GEYSERVILLE(x) (((x) & 0x1) << 27) x 255 drivers/gpu/drm/radeon/r100d.h #define G_000040_GEYSERVILLE(x) (((x) >> 27) & 0x1) x 257 drivers/gpu/drm/radeon/r100d.h #define S_000040_HDCP_AUTHORIZED_INT(x) (((x) & 0x1) << 28) x 258 drivers/gpu/drm/radeon/r100d.h #define G_000040_HDCP_AUTHORIZED_INT(x) (((x) >> 28) & 0x1) x 260 drivers/gpu/drm/radeon/r100d.h #define S_000040_DVI_I2C_INT(x) (((x) & 0x1) << 29) x 261 drivers/gpu/drm/radeon/r100d.h #define G_000040_DVI_I2C_INT(x) (((x) >> 29) & 0x1) x 263 drivers/gpu/drm/radeon/r100d.h #define S_000040_GUIDMA(x) (((x) & 0x1) << 30) x 264 drivers/gpu/drm/radeon/r100d.h #define G_000040_GUIDMA(x) (((x) >> 30) & 0x1) x 266 drivers/gpu/drm/radeon/r100d.h #define S_000040_VIDDMA(x) (((x) & 0x1) << 31) x 267 drivers/gpu/drm/radeon/r100d.h #define G_000040_VIDDMA(x) (((x) >> 31) & 0x1) x 270 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC_VBLANK_STAT(x) (((x) & 0x1) << 0) x 271 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC_VBLANK_STAT(x) (((x) >> 0) & 0x1) x 273 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC_VBLANK_STAT_AK(x) (((x) & 0x1) << 0) x 274 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC_VBLANK_STAT_AK(x) (((x) >> 0) & 0x1) x 276 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC_VLINE_STAT(x) (((x) & 0x1) << 1) x 277 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC_VLINE_STAT(x) (((x) >> 1) & 0x1) x 279 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC_VLINE_STAT_AK(x) (((x) & 0x1) << 1) x 280 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC_VLINE_STAT_AK(x) (((x) >> 1) & 0x1) x 282 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC_VSYNC_STAT(x) (((x) & 0x1) << 2) x 283 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC_VSYNC_STAT(x) (((x) >> 2) & 0x1) x 285 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC_VSYNC_STAT_AK(x) (((x) & 0x1) << 2) x 286 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC_VSYNC_STAT_AK(x) (((x) >> 2) & 0x1) x 288 drivers/gpu/drm/radeon/r100d.h #define S_000044_SNAPSHOT_STAT(x) (((x) & 0x1) << 3) x 289 drivers/gpu/drm/radeon/r100d.h #define G_000044_SNAPSHOT_STAT(x) (((x) >> 3) & 0x1) x 291 drivers/gpu/drm/radeon/r100d.h #define S_000044_SNAPSHOT_STAT_AK(x) (((x) & 0x1) << 3) x 292 drivers/gpu/drm/radeon/r100d.h #define G_000044_SNAPSHOT_STAT_AK(x) (((x) >> 3) & 0x1) x 294 drivers/gpu/drm/radeon/r100d.h #define S_000044_FP_DETECT_STAT(x) (((x) & 0x1) << 4) x 295 drivers/gpu/drm/radeon/r100d.h #define G_000044_FP_DETECT_STAT(x) (((x) >> 4) & 0x1) x 297 drivers/gpu/drm/radeon/r100d.h #define S_000044_FP_DETECT_STAT_AK(x) (((x) & 0x1) << 4) x 298 drivers/gpu/drm/radeon/r100d.h #define G_000044_FP_DETECT_STAT_AK(x) (((x) >> 4) & 0x1) x 300 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC2_VLINE_STAT(x) (((x) & 0x1) << 5) x 301 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC2_VLINE_STAT(x) (((x) >> 5) & 0x1) x 303 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC2_VLINE_STAT_AK(x) (((x) & 0x1) << 5) x 304 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC2_VLINE_STAT_AK(x) (((x) >> 5) & 0x1) x 306 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC2_VSYNC_STAT(x) (((x) & 0x1) << 6) x 307 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC2_VSYNC_STAT(x) (((x) >> 6) & 0x1) x 309 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC2_VSYNC_STAT_AK(x) (((x) & 0x1) << 6) x 310 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC2_VSYNC_STAT_AK(x) (((x) >> 6) & 0x1) x 312 drivers/gpu/drm/radeon/r100d.h #define S_000044_SNAPSHOT2_STAT(x) (((x) & 0x1) << 7) x 313 drivers/gpu/drm/radeon/r100d.h #define G_000044_SNAPSHOT2_STAT(x) (((x) >> 7) & 0x1) x 315 drivers/gpu/drm/radeon/r100d.h #define S_000044_SNAPSHOT2_STAT_AK(x) (((x) & 0x1) << 7) x 316 drivers/gpu/drm/radeon/r100d.h #define G_000044_SNAPSHOT2_STAT_AK(x) (((x) >> 7) & 0x1) x 318 drivers/gpu/drm/radeon/r100d.h #define S_000044_CAP0_INT_ACTIVE(x) (((x) & 0x1) << 8) x 319 drivers/gpu/drm/radeon/r100d.h #define G_000044_CAP0_INT_ACTIVE(x) (((x) >> 8) & 0x1) x 321 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC2_VBLANK_STAT(x) (((x) & 0x1) << 9) x 322 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC2_VBLANK_STAT(x) (((x) >> 9) & 0x1) x 324 drivers/gpu/drm/radeon/r100d.h #define S_000044_CRTC2_VBLANK_STAT_AK(x) (((x) & 0x1) << 9) x 325 drivers/gpu/drm/radeon/r100d.h #define G_000044_CRTC2_VBLANK_STAT_AK(x) (((x) >> 9) & 0x1) x 327 drivers/gpu/drm/radeon/r100d.h #define S_000044_FP2_DETECT_STAT(x) (((x) & 0x1) << 10) x 328 drivers/gpu/drm/radeon/r100d.h #define G_000044_FP2_DETECT_STAT(x) (((x) >> 10) & 0x1) x 330 drivers/gpu/drm/radeon/r100d.h #define S_000044_FP2_DETECT_STAT_AK(x) (((x) & 0x1) << 10) x 331 drivers/gpu/drm/radeon/r100d.h #define G_000044_FP2_DETECT_STAT_AK(x) (((x) >> 10) & 0x1) x 333 drivers/gpu/drm/radeon/r100d.h #define S_000044_VSYNC_DIFF_OVER_LIMIT_STAT(x) (((x) & 0x1) << 11) x 334 drivers/gpu/drm/radeon/r100d.h #define G_000044_VSYNC_DIFF_OVER_LIMIT_STAT(x) (((x) >> 11) & 0x1) x 336 drivers/gpu/drm/radeon/r100d.h #define S_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK(x) (((x) & 0x1) << 11) x 337 drivers/gpu/drm/radeon/r100d.h #define G_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK(x) (((x) >> 11) & 0x1) x 339 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH0_INT(x) (((x) & 0x1) << 12) x 340 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH0_INT(x) (((x) >> 12) & 0x1) x 342 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH0_INT_AK(x) (((x) & 0x1) << 12) x 343 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH0_INT_AK(x) (((x) >> 12) & 0x1) x 345 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH1_INT(x) (((x) & 0x1) << 13) x 346 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH1_INT(x) (((x) >> 13) & 0x1) x 348 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH1_INT_AK(x) (((x) & 0x1) << 13) x 349 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH1_INT_AK(x) (((x) >> 13) & 0x1) x 351 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH2_INT(x) (((x) & 0x1) << 14) x 352 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH2_INT(x) (((x) >> 14) & 0x1) x 354 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH2_INT_AK(x) (((x) & 0x1) << 14) x 355 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH2_INT_AK(x) (((x) >> 14) & 0x1) x 357 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH3_INT(x) (((x) & 0x1) << 15) x 358 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH3_INT(x) (((x) >> 15) & 0x1) x 360 drivers/gpu/drm/radeon/r100d.h #define S_000044_DMA_VIPH3_INT_AK(x) (((x) & 0x1) << 15) x 361 drivers/gpu/drm/radeon/r100d.h #define G_000044_DMA_VIPH3_INT_AK(x) (((x) >> 15) & 0x1) x 363 drivers/gpu/drm/radeon/r100d.h #define S_000044_I2C_INT(x) (((x) & 0x1) << 17) x 364 drivers/gpu/drm/radeon/r100d.h #define G_000044_I2C_INT(x) (((x) >> 17) & 0x1) x 366 drivers/gpu/drm/radeon/r100d.h #define S_000044_I2C_INT_AK(x) (((x) & 0x1) << 17) x 367 drivers/gpu/drm/radeon/r100d.h #define G_000044_I2C_INT_AK(x) (((x) >> 17) & 0x1) x 369 drivers/gpu/drm/radeon/r100d.h #define S_000044_GUI_IDLE_STAT(x) (((x) & 0x1) << 19) x 370 drivers/gpu/drm/radeon/r100d.h #define G_000044_GUI_IDLE_STAT(x) (((x) >> 19) & 0x1) x 372 drivers/gpu/drm/radeon/r100d.h #define S_000044_GUI_IDLE_STAT_AK(x) (((x) & 0x1) << 19) x 373 drivers/gpu/drm/radeon/r100d.h #define G_000044_GUI_IDLE_STAT_AK(x) (((x) >> 19) & 0x1) x 375 drivers/gpu/drm/radeon/r100d.h #define S_000044_VIPH_INT(x) (((x) & 0x1) << 24) x 376 drivers/gpu/drm/radeon/r100d.h #define G_000044_VIPH_INT(x) (((x) >> 24) & 0x1) x 378 drivers/gpu/drm/radeon/r100d.h #define S_000044_SW_INT(x) (((x) & 0x1) << 25) x 379 drivers/gpu/drm/radeon/r100d.h #define G_000044_SW_INT(x) (((x) >> 25) & 0x1) x 381 drivers/gpu/drm/radeon/r100d.h #define S_000044_SW_INT_AK(x) (((x) & 0x1) << 25) x 382 drivers/gpu/drm/radeon/r100d.h #define G_000044_SW_INT_AK(x) (((x) >> 25) & 0x1) x 384 drivers/gpu/drm/radeon/r100d.h #define S_000044_SW_INT_SET(x) (((x) & 0x1) << 26) x 385 drivers/gpu/drm/radeon/r100d.h #define G_000044_SW_INT_SET(x) (((x) >> 26) & 0x1) x 387 drivers/gpu/drm/radeon/r100d.h #define S_000044_GEYSERVILLE_STAT(x) (((x) & 0x1) << 27) x 388 drivers/gpu/drm/radeon/r100d.h #define G_000044_GEYSERVILLE_STAT(x) (((x) >> 27) & 0x1) x 390 drivers/gpu/drm/radeon/r100d.h #define S_000044_GEYSERVILLE_STAT_AK(x) (((x) & 0x1) << 27) x 391 drivers/gpu/drm/radeon/r100d.h #define G_000044_GEYSERVILLE_STAT_AK(x) (((x) >> 27) & 0x1) x 393 drivers/gpu/drm/radeon/r100d.h #define S_000044_HDCP_AUTHORIZED_INT_STAT(x) (((x) & 0x1) << 28) x 394 drivers/gpu/drm/radeon/r100d.h #define G_000044_HDCP_AUTHORIZED_INT_STAT(x) (((x) >> 28) & 0x1) x 396 drivers/gpu/drm/radeon/r100d.h #define S_000044_HDCP_AUTHORIZED_INT_AK(x) (((x) & 0x1) << 28) x 397 drivers/gpu/drm/radeon/r100d.h #define G_000044_HDCP_AUTHORIZED_INT_AK(x) (((x) >> 28) & 0x1) x 399 drivers/gpu/drm/radeon/r100d.h #define S_000044_DVI_I2C_INT_STAT(x) (((x) & 0x1) << 29) x 400 drivers/gpu/drm/radeon/r100d.h #define G_000044_DVI_I2C_INT_STAT(x) (((x) >> 29) & 0x1) x 402 drivers/gpu/drm/radeon/r100d.h #define S_000044_DVI_I2C_INT_AK(x) (((x) & 0x1) << 29) x 403 drivers/gpu/drm/radeon/r100d.h #define G_000044_DVI_I2C_INT_AK(x) (((x) >> 29) & 0x1) x 405 drivers/gpu/drm/radeon/r100d.h #define S_000044_GUIDMA_STAT(x) (((x) & 0x1) << 30) x 406 drivers/gpu/drm/radeon/r100d.h #define G_000044_GUIDMA_STAT(x) (((x) >> 30) & 0x1) x 408 drivers/gpu/drm/radeon/r100d.h #define S_000044_GUIDMA_AK(x) (((x) & 0x1) << 30) x 409 drivers/gpu/drm/radeon/r100d.h #define G_000044_GUIDMA_AK(x) (((x) >> 30) & 0x1) x 411 drivers/gpu/drm/radeon/r100d.h #define S_000044_VIDDMA_STAT(x) (((x) & 0x1) << 31) x 412 drivers/gpu/drm/radeon/r100d.h #define G_000044_VIDDMA_STAT(x) (((x) >> 31) & 0x1) x 414 drivers/gpu/drm/radeon/r100d.h #define S_000044_VIDDMA_AK(x) (((x) & 0x1) << 31) x 415 drivers/gpu/drm/radeon/r100d.h #define G_000044_VIDDMA_AK(x) (((x) >> 31) & 0x1) x 418 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_DBL_SCAN_EN(x) (((x) & 0x1) << 0) x 419 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_DBL_SCAN_EN(x) (((x) >> 0) & 0x1) x 421 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_INTERLACE_EN(x) (((x) & 0x1) << 1) x 422 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_INTERLACE_EN(x) (((x) >> 1) & 0x1) x 424 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_C_SYNC_EN(x) (((x) & 0x1) << 4) x 425 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_C_SYNC_EN(x) (((x) >> 4) & 0x1) x 427 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_PIX_WIDTH(x) (((x) & 0xF) << 8) x 428 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_PIX_WIDTH(x) (((x) >> 8) & 0xF) x 430 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_ICON_EN(x) (((x) & 0x1) << 15) x 431 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_ICON_EN(x) (((x) >> 15) & 0x1) x 433 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_CUR_EN(x) (((x) & 0x1) << 16) x 434 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_CUR_EN(x) (((x) >> 16) & 0x1) x 436 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_VSTAT_MODE(x) (((x) & 0x3) << 17) x 437 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_VSTAT_MODE(x) (((x) >> 17) & 0x3) x 439 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_CUR_MODE(x) (((x) & 0x7) << 20) x 440 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_CUR_MODE(x) (((x) >> 20) & 0x7) x 442 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_EXT_DISP_EN(x) (((x) & 0x1) << 24) x 443 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_EXT_DISP_EN(x) (((x) >> 24) & 0x1) x 445 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_EN(x) (((x) & 0x1) << 25) x 446 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_EN(x) (((x) >> 25) & 0x1) x 448 drivers/gpu/drm/radeon/r100d.h #define S_000050_CRTC_DISP_REQ_EN_B(x) (((x) & 0x1) << 26) x 449 drivers/gpu/drm/radeon/r100d.h #define G_000050_CRTC_DISP_REQ_EN_B(x) (((x) >> 26) & 0x1) x 452 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRTC_VGA_XOVERSCAN(x) (((x) & 0x1) << 0) x 453 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRTC_VGA_XOVERSCAN(x) (((x) >> 0) & 0x1) x 455 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_BLINK_RATE(x) (((x) & 0x3) << 1) x 456 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_BLINK_RATE(x) (((x) >> 1) & 0x3) x 458 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_ATI_LINEAR(x) (((x) & 0x1) << 3) x 459 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_ATI_LINEAR(x) (((x) >> 3) & 0x1) x 461 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_128KAP_PAGING(x) (((x) & 0x1) << 4) x 462 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_128KAP_PAGING(x) (((x) >> 4) & 0x1) x 464 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_TEXT_132(x) (((x) & 0x1) << 5) x 465 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_TEXT_132(x) (((x) >> 5) & 0x1) x 467 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_XCRT_CNT_EN(x) (((x) & 0x1) << 6) x 468 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_XCRT_CNT_EN(x) (((x) >> 6) & 0x1) x 470 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRTC_HSYNC_DIS(x) (((x) & 0x1) << 8) x 471 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRTC_HSYNC_DIS(x) (((x) >> 8) & 0x1) x 473 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRTC_VSYNC_DIS(x) (((x) & 0x1) << 9) x 474 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRTC_VSYNC_DIS(x) (((x) >> 9) & 0x1) x 476 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRTC_DISPLAY_DIS(x) (((x) & 0x1) << 10) x 477 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRTC_DISPLAY_DIS(x) (((x) >> 10) & 0x1) x 479 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRTC_SYNC_TRISTATE(x) (((x) & 0x1) << 11) x 480 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRTC_SYNC_TRISTATE(x) (((x) >> 11) & 0x1) x 482 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRTC_HSYNC_TRISTATE(x) (((x) & 0x1) << 12) x 483 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRTC_HSYNC_TRISTATE(x) (((x) >> 12) & 0x1) x 485 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRTC_VSYNC_TRISTATE(x) (((x) & 0x1) << 13) x 486 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRTC_VSYNC_TRISTATE(x) (((x) >> 13) & 0x1) x 488 drivers/gpu/drm/radeon/r100d.h #define S_000054_CRT_ON(x) (((x) & 0x1) << 15) x 489 drivers/gpu/drm/radeon/r100d.h #define G_000054_CRT_ON(x) (((x) >> 15) & 0x1) x 491 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_CUR_B_TEST(x) (((x) & 0x1) << 17) x 492 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_CUR_B_TEST(x) (((x) >> 17) & 0x1) x 494 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_PACK_DIS(x) (((x) & 0x1) << 18) x 495 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_PACK_DIS(x) (((x) >> 18) & 0x1) x 497 drivers/gpu/drm/radeon/r100d.h #define S_000054_VGA_MEM_PS_EN(x) (((x) & 0x1) << 19) x 498 drivers/gpu/drm/radeon/r100d.h #define G_000054_VGA_MEM_PS_EN(x) (((x) >> 19) & 0x1) x 500 drivers/gpu/drm/radeon/r100d.h #define S_000054_VCRTC_IDX_MASTER(x) (((x) & 0x7F) << 24) x 501 drivers/gpu/drm/radeon/r100d.h #define G_000054_VCRTC_IDX_MASTER(x) (((x) >> 24) & 0x7F) x 504 drivers/gpu/drm/radeon/r100d.h #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 505 drivers/gpu/drm/radeon/r100d.h #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 507 drivers/gpu/drm/radeon/r100d.h #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 508 drivers/gpu/drm/radeon/r100d.h #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 511 drivers/gpu/drm/radeon/r100d.h #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) x 512 drivers/gpu/drm/radeon/r100d.h #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) x 514 drivers/gpu/drm/radeon/r100d.h #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) x 515 drivers/gpu/drm/radeon/r100d.h #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) x 518 drivers/gpu/drm/radeon/r100d.h #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) x 519 drivers/gpu/drm/radeon/r100d.h #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) x 522 drivers/gpu/drm/radeon/r100d.h #define S_00023C_DISPLAY_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) x 523 drivers/gpu/drm/radeon/r100d.h #define G_00023C_DISPLAY_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) x 526 drivers/gpu/drm/radeon/r100d.h #define S_000260_CUR_OFFSET(x) (((x) & 0x7FFFFFF) << 0) x 527 drivers/gpu/drm/radeon/r100d.h #define G_000260_CUR_OFFSET(x) (((x) >> 0) & 0x7FFFFFF) x 529 drivers/gpu/drm/radeon/r100d.h #define S_000260_CUR_LOCK(x) (((x) & 0x1) << 31) x 530 drivers/gpu/drm/radeon/r100d.h #define G_000260_CUR_LOCK(x) (((x) >> 31) & 0x1) x 533 drivers/gpu/drm/radeon/r100d.h #define S_00033C_CRTC2_DISPLAY_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) x 534 drivers/gpu/drm/radeon/r100d.h #define G_00033C_CRTC2_DISPLAY_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) x 537 drivers/gpu/drm/radeon/r100d.h #define S_000360_CUR2_OFFSET(x) (((x) & 0x7FFFFFF) << 0) x 538 drivers/gpu/drm/radeon/r100d.h #define G_000360_CUR2_OFFSET(x) (((x) >> 0) & 0x7FFFFFF) x 540 drivers/gpu/drm/radeon/r100d.h #define S_000360_CUR2_LOCK(x) (((x) & 0x1) << 31) x 541 drivers/gpu/drm/radeon/r100d.h #define G_000360_CUR2_LOCK(x) (((x) >> 31) & 0x1) x 544 drivers/gpu/drm/radeon/r100d.h #define S_0003C2_GENMO_MONO_ADDRESS_B(x) (((x) & 0x1) << 0) x 545 drivers/gpu/drm/radeon/r100d.h #define G_0003C2_GENMO_MONO_ADDRESS_B(x) (((x) >> 0) & 0x1) x 547 drivers/gpu/drm/radeon/r100d.h #define S_0003C2_VGA_RAM_EN(x) (((x) & 0x1) << 1) x 548 drivers/gpu/drm/radeon/r100d.h #define G_0003C2_VGA_RAM_EN(x) (((x) >> 1) & 0x1) x 550 drivers/gpu/drm/radeon/r100d.h #define S_0003C2_VGA_CKSEL(x) (((x) & 0x3) << 2) x 551 drivers/gpu/drm/radeon/r100d.h #define G_0003C2_VGA_CKSEL(x) (((x) >> 2) & 0x3) x 553 drivers/gpu/drm/radeon/r100d.h #define S_0003C2_ODD_EVEN_MD_PGSEL(x) (((x) & 0x1) << 5) x 554 drivers/gpu/drm/radeon/r100d.h #define G_0003C2_ODD_EVEN_MD_PGSEL(x) (((x) >> 5) & 0x1) x 556 drivers/gpu/drm/radeon/r100d.h #define S_0003C2_VGA_HSYNC_POL(x) (((x) & 0x1) << 6) x 557 drivers/gpu/drm/radeon/r100d.h #define G_0003C2_VGA_HSYNC_POL(x) (((x) >> 6) & 0x1) x 559 drivers/gpu/drm/radeon/r100d.h #define S_0003C2_VGA_VSYNC_POL(x) (((x) & 0x1) << 7) x 560 drivers/gpu/drm/radeon/r100d.h #define G_0003C2_VGA_VSYNC_POL(x) (((x) >> 7) & 0x1) x 563 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_DBL_SCAN_EN(x) (((x) & 0x1) << 0) x 564 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_DBL_SCAN_EN(x) (((x) >> 0) & 0x1) x 566 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_INTERLACE_EN(x) (((x) & 0x1) << 1) x 567 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_INTERLACE_EN(x) (((x) >> 1) & 0x1) x 569 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_SYNC_TRISTATE(x) (((x) & 0x1) << 4) x 570 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_SYNC_TRISTATE(x) (((x) >> 4) & 0x1) x 572 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_HSYNC_TRISTATE(x) (((x) & 0x1) << 5) x 573 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_HSYNC_TRISTATE(x) (((x) >> 5) & 0x1) x 575 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_VSYNC_TRISTATE(x) (((x) & 0x1) << 6) x 576 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_VSYNC_TRISTATE(x) (((x) >> 6) & 0x1) x 578 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRT2_ON(x) (((x) & 0x1) << 7) x 579 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRT2_ON(x) (((x) >> 7) & 0x1) x 581 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_PIX_WIDTH(x) (((x) & 0xF) << 8) x 582 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_PIX_WIDTH(x) (((x) >> 8) & 0xF) x 584 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_ICON_EN(x) (((x) & 0x1) << 15) x 585 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_ICON_EN(x) (((x) >> 15) & 0x1) x 587 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_CUR_EN(x) (((x) & 0x1) << 16) x 588 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_CUR_EN(x) (((x) >> 16) & 0x1) x 590 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_CUR_MODE(x) (((x) & 0x7) << 20) x 591 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_CUR_MODE(x) (((x) >> 20) & 0x7) x 593 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_DISPLAY_DIS(x) (((x) & 0x1) << 23) x 594 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_DISPLAY_DIS(x) (((x) >> 23) & 0x1) x 596 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_EN(x) (((x) & 0x1) << 25) x 597 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_EN(x) (((x) >> 25) & 0x1) x 599 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_DISP_REQ_EN_B(x) (((x) & 0x1) << 26) x 600 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_DISP_REQ_EN_B(x) (((x) >> 26) & 0x1) x 602 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_C_SYNC_EN(x) (((x) & 0x1) << 27) x 603 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_C_SYNC_EN(x) (((x) >> 27) & 0x1) x 605 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_HSYNC_DIS(x) (((x) & 0x1) << 28) x 606 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_HSYNC_DIS(x) (((x) >> 28) & 0x1) x 608 drivers/gpu/drm/radeon/r100d.h #define S_0003F8_CRTC2_VSYNC_DIS(x) (((x) & 0x1) << 29) x 609 drivers/gpu/drm/radeon/r100d.h #define G_0003F8_CRTC2_VSYNC_DIS(x) (((x) >> 29) & 0x1) x 612 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_NO_READ_BEHIND_SCAN(x) (((x) & 0x1) << 1) x 613 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_NO_READ_BEHIND_SCAN(x) (((x) >> 1) & 0x1) x 615 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_HORZ_PICK_NEAREST(x) (((x) & 0x1) << 2) x 616 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_HORZ_PICK_NEAREST(x) (((x) >> 2) & 0x1) x 618 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_VERT_PICK_NEAREST(x) (((x) & 0x1) << 3) x 619 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_VERT_PICK_NEAREST(x) (((x) >> 3) & 0x1) x 621 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_SIGNED_UV(x) (((x) & 0x1) << 4) x 622 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_SIGNED_UV(x) (((x) >> 4) & 0x1) x 624 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_GAMMA_SEL(x) (((x) & 0x7) << 5) x 625 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_GAMMA_SEL(x) (((x) >> 5) & 0x7) x 627 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_SURFACE_FORMAT(x) (((x) & 0xF) << 8) x 628 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_SURFACE_FORMAT(x) (((x) >> 8) & 0xF) x 630 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_ADAPTIVE_DEINT(x) (((x) & 0x1) << 12) x 631 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_ADAPTIVE_DEINT(x) (((x) >> 12) & 0x1) x 633 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_CRTC_SEL(x) (((x) & 0x1) << 14) x 634 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_CRTC_SEL(x) (((x) >> 14) & 0x1) x 636 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_BURST_PER_PLANE(x) (((x) & 0x7F) << 16) x 637 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_BURST_PER_PLANE(x) (((x) >> 16) & 0x7F) x 639 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_DOUBLE_BUFFER_REGS(x) (((x) & 0x1) << 24) x 640 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_DOUBLE_BUFFER_REGS(x) (((x) >> 24) & 0x1) x 642 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_BANDWIDTH(x) (((x) & 0x1) << 26) x 643 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_BANDWIDTH(x) (((x) >> 26) & 0x1) x 645 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_LIN_TRANS_BYPASS(x) (((x) & 0x1) << 28) x 646 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_LIN_TRANS_BYPASS(x) (((x) >> 28) & 0x1) x 648 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_INT_EMU(x) (((x) & 0x1) << 29) x 649 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_INT_EMU(x) (((x) >> 29) & 0x1) x 651 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_OVERLAY_EN(x) (((x) & 0x1) << 30) x 652 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_OVERLAY_EN(x) (((x) >> 30) & 0x1) x 654 drivers/gpu/drm/radeon/r100d.h #define S_000420_OV0_SOFT_RESET(x) (((x) & 0x1) << 31) x 655 drivers/gpu/drm/radeon/r100d.h #define G_000420_OV0_SOFT_RESET(x) (((x) >> 31) & 0x1) x 658 drivers/gpu/drm/radeon/r100d.h #define S_00070C_RB_RPTR_SWAP(x) (((x) & 0x3) << 0) x 659 drivers/gpu/drm/radeon/r100d.h #define G_00070C_RB_RPTR_SWAP(x) (((x) >> 0) & 0x3) x 661 drivers/gpu/drm/radeon/r100d.h #define S_00070C_RB_RPTR_ADDR(x) (((x) & 0x3FFFFFFF) << 2) x 662 drivers/gpu/drm/radeon/r100d.h #define G_00070C_RB_RPTR_ADDR(x) (((x) >> 2) & 0x3FFFFFFF) x 665 drivers/gpu/drm/radeon/r100d.h #define S_000740_CSQ_CNT_PRIMARY(x) (((x) & 0xFF) << 0) x 666 drivers/gpu/drm/radeon/r100d.h #define G_000740_CSQ_CNT_PRIMARY(x) (((x) >> 0) & 0xFF) x 668 drivers/gpu/drm/radeon/r100d.h #define S_000740_CSQ_CNT_INDIRECT(x) (((x) & 0xFF) << 8) x 669 drivers/gpu/drm/radeon/r100d.h #define G_000740_CSQ_CNT_INDIRECT(x) (((x) >> 8) & 0xFF) x 671 drivers/gpu/drm/radeon/r100d.h #define S_000740_CSQ_MODE(x) (((x) & 0xF) << 28) x 672 drivers/gpu/drm/radeon/r100d.h #define G_000740_CSQ_MODE(x) (((x) >> 28) & 0xF) x 675 drivers/gpu/drm/radeon/r100d.h #define S_000770_SCRATCH_UMSK(x) (((x) & 0x3F) << 0) x 676 drivers/gpu/drm/radeon/r100d.h #define G_000770_SCRATCH_UMSK(x) (((x) >> 0) & 0x3F) x 678 drivers/gpu/drm/radeon/r100d.h #define S_000770_SCRATCH_SWAP(x) (((x) & 0x3) << 16) x 679 drivers/gpu/drm/radeon/r100d.h #define G_000770_SCRATCH_SWAP(x) (((x) >> 16) & 0x3) x 682 drivers/gpu/drm/radeon/r100d.h #define S_000774_SCRATCH_ADDR(x) (((x) & 0x7FFFFFF) << 5) x 683 drivers/gpu/drm/radeon/r100d.h #define G_000774_SCRATCH_ADDR(x) (((x) >> 5) & 0x7FFFFFF) x 686 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 687 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 689 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 690 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 692 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 693 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 695 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 696 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 698 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 699 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 701 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 702 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 704 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 705 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 707 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 708 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 710 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 711 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 713 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 714 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 716 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 717 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 719 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 720 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 722 drivers/gpu/drm/radeon/r100d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 723 drivers/gpu/drm/radeon/r100d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 726 drivers/gpu/drm/radeon/r100d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 727 drivers/gpu/drm/radeon/r100d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 729 drivers/gpu/drm/radeon/r100d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 730 drivers/gpu/drm/radeon/r100d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 732 drivers/gpu/drm/radeon/r100d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 733 drivers/gpu/drm/radeon/r100d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 735 drivers/gpu/drm/radeon/r100d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 736 drivers/gpu/drm/radeon/r100d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 738 drivers/gpu/drm/radeon/r100d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 739 drivers/gpu/drm/radeon/r100d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 741 drivers/gpu/drm/radeon/r100d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 742 drivers/gpu/drm/radeon/r100d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 744 drivers/gpu/drm/radeon/r100d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 745 drivers/gpu/drm/radeon/r100d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 747 drivers/gpu/drm/radeon/r100d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 748 drivers/gpu/drm/radeon/r100d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 750 drivers/gpu/drm/radeon/r100d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 751 drivers/gpu/drm/radeon/r100d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 753 drivers/gpu/drm/radeon/r100d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 754 drivers/gpu/drm/radeon/r100d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 756 drivers/gpu/drm/radeon/r100d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 757 drivers/gpu/drm/radeon/r100d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 759 drivers/gpu/drm/radeon/r100d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 760 drivers/gpu/drm/radeon/r100d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 762 drivers/gpu/drm/radeon/r100d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 763 drivers/gpu/drm/radeon/r100d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 765 drivers/gpu/drm/radeon/r100d.h #define S_000E40_SE_BUSY(x) (((x) & 0x1) << 20) x 766 drivers/gpu/drm/radeon/r100d.h #define G_000E40_SE_BUSY(x) (((x) >> 20) & 0x1) x 768 drivers/gpu/drm/radeon/r100d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 769 drivers/gpu/drm/radeon/r100d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 771 drivers/gpu/drm/radeon/r100d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 772 drivers/gpu/drm/radeon/r100d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 774 drivers/gpu/drm/radeon/r100d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 775 drivers/gpu/drm/radeon/r100d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 777 drivers/gpu/drm/radeon/r100d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 778 drivers/gpu/drm/radeon/r100d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 780 drivers/gpu/drm/radeon/r100d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 781 drivers/gpu/drm/radeon/r100d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 786 drivers/gpu/drm/radeon/r100d.h #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) x 787 drivers/gpu/drm/radeon/r100d.h #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) x 789 drivers/gpu/drm/radeon/r100d.h #define S_00000D_TCLK_SRC_SEL(x) (((x) & 0x7) << 8) x 790 drivers/gpu/drm/radeon/r100d.h #define G_00000D_TCLK_SRC_SEL(x) (((x) >> 8) & 0x7) x 792 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) x 793 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) x 795 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) x 796 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) x 798 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_DISP(x) (((x) & 0x1) << 18) x 799 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_DISP(x) (((x) >> 18) & 0x1) x 801 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) x 802 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) x 804 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) x 805 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) x 807 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) x 808 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) x 810 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) x 811 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) x 813 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) x 814 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) x 816 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) x 817 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) x 819 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) x 820 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) x 822 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) x 823 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) x 825 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) x 826 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) x 828 drivers/gpu/drm/radeon/r100d.h #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) x 829 drivers/gpu/drm/radeon/r100d.h #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) x 848 drivers/gpu/drm/radeon/r100d.h #define REDUCED_SPEED_SCLK_SEL(x) ((x) << 17) x 854 drivers/gpu/drm/radeon/r100d.h #define VOLTAGE_DELAY_SEL(x) ((x) << 20) x 70 drivers/gpu/drm/radeon/r300d.h #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 71 drivers/gpu/drm/radeon/r300d.h #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 73 drivers/gpu/drm/radeon/r300d.h #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 74 drivers/gpu/drm/radeon/r300d.h #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 77 drivers/gpu/drm/radeon/r300d.h #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) x 78 drivers/gpu/drm/radeon/r300d.h #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) x 80 drivers/gpu/drm/radeon/r300d.h #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) x 81 drivers/gpu/drm/radeon/r300d.h #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) x 84 drivers/gpu/drm/radeon/r300d.h #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) x 85 drivers/gpu/drm/radeon/r300d.h #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) x 88 drivers/gpu/drm/radeon/r300d.h #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) x 89 drivers/gpu/drm/radeon/r300d.h #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) x 92 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 93 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 95 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 96 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 98 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 99 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 101 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 102 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 104 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 105 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 107 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 108 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 110 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 111 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 113 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 114 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 116 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 117 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 119 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) x 120 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) x 122 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) x 123 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) x 125 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 126 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 128 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 129 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 131 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 132 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 134 drivers/gpu/drm/radeon/r300d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 135 drivers/gpu/drm/radeon/r300d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 138 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 139 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 141 drivers/gpu/drm/radeon/r300d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 142 drivers/gpu/drm/radeon/r300d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 144 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 145 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 147 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 148 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 150 drivers/gpu/drm/radeon/r300d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 151 drivers/gpu/drm/radeon/r300d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 153 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 154 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 156 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 157 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 159 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 160 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 162 drivers/gpu/drm/radeon/r300d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 163 drivers/gpu/drm/radeon/r300d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 165 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 166 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 168 drivers/gpu/drm/radeon/r300d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 169 drivers/gpu/drm/radeon/r300d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 171 drivers/gpu/drm/radeon/r300d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 172 drivers/gpu/drm/radeon/r300d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 174 drivers/gpu/drm/radeon/r300d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 175 drivers/gpu/drm/radeon/r300d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 177 drivers/gpu/drm/radeon/r300d.h #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) x 178 drivers/gpu/drm/radeon/r300d.h #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) x 180 drivers/gpu/drm/radeon/r300d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 181 drivers/gpu/drm/radeon/r300d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 183 drivers/gpu/drm/radeon/r300d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 184 drivers/gpu/drm/radeon/r300d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 186 drivers/gpu/drm/radeon/r300d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 187 drivers/gpu/drm/radeon/r300d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 189 drivers/gpu/drm/radeon/r300d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 190 drivers/gpu/drm/radeon/r300d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 192 drivers/gpu/drm/radeon/r300d.h #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) x 193 drivers/gpu/drm/radeon/r300d.h #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) x 195 drivers/gpu/drm/radeon/r300d.h #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) x 196 drivers/gpu/drm/radeon/r300d.h #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) x 198 drivers/gpu/drm/radeon/r300d.h #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) x 199 drivers/gpu/drm/radeon/r300d.h #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) x 201 drivers/gpu/drm/radeon/r300d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 202 drivers/gpu/drm/radeon/r300d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 205 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) x 206 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) x 208 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) x 209 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) x 211 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) x 212 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) x 214 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) x 215 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) x 217 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) x 218 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) x 220 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) x 221 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) x 223 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) x 224 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) x 226 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) x 227 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) x 229 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) x 230 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) x 232 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) x 233 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) x 235 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) x 236 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) x 238 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) x 239 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) x 241 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) x 242 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) x 244 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) x 245 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) x 247 drivers/gpu/drm/radeon/r300d.h #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) x 248 drivers/gpu/drm/radeon/r300d.h #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) x 252 drivers/gpu/drm/radeon/r300d.h #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) x 253 drivers/gpu/drm/radeon/r300d.h #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) x 255 drivers/gpu/drm/radeon/r300d.h #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) x 256 drivers/gpu/drm/radeon/r300d.h #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) x 258 drivers/gpu/drm/radeon/r300d.h #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) x 259 drivers/gpu/drm/radeon/r300d.h #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) x 261 drivers/gpu/drm/radeon/r300d.h #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) x 262 drivers/gpu/drm/radeon/r300d.h #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) x 264 drivers/gpu/drm/radeon/r300d.h #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) x 265 drivers/gpu/drm/radeon/r300d.h #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) x 267 drivers/gpu/drm/radeon/r300d.h #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) x 268 drivers/gpu/drm/radeon/r300d.h #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) x 270 drivers/gpu/drm/radeon/r300d.h #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) x 271 drivers/gpu/drm/radeon/r300d.h #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) x 273 drivers/gpu/drm/radeon/r300d.h #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) x 274 drivers/gpu/drm/radeon/r300d.h #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) x 276 drivers/gpu/drm/radeon/r300d.h #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) x 277 drivers/gpu/drm/radeon/r300d.h #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) x 279 drivers/gpu/drm/radeon/r300d.h #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) x 280 drivers/gpu/drm/radeon/r300d.h #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) x 282 drivers/gpu/drm/radeon/r300d.h #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) x 283 drivers/gpu/drm/radeon/r300d.h #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) x 285 drivers/gpu/drm/radeon/r300d.h #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) x 286 drivers/gpu/drm/radeon/r300d.h #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) x 288 drivers/gpu/drm/radeon/r300d.h #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) x 289 drivers/gpu/drm/radeon/r300d.h #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) x 291 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) x 292 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) x 294 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) x 295 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) x 297 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) x 298 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) x 300 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) x 301 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) x 303 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) x 304 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) x 306 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) x 307 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) x 309 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) x 310 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) x 312 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) x 313 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) x 315 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) x 316 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) x 318 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) x 319 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) x 321 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) x 322 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) x 324 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) x 325 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) x 327 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) x 328 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) x 330 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) x 331 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) x 333 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) x 334 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) x 336 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) x 337 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) x 339 drivers/gpu/drm/radeon/r300d.h #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) x 340 drivers/gpu/drm/radeon/r300d.h #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) x 32 drivers/gpu/drm/radeon/r420d.h #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0) x 33 drivers/gpu/drm/radeon/r420d.h #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F) x 35 drivers/gpu/drm/radeon/r420d.h #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8) x 36 drivers/gpu/drm/radeon/r420d.h #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1) x 39 drivers/gpu/drm/radeon/r420d.h #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0) x 40 drivers/gpu/drm/radeon/r420d.h #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF) x 43 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 44 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 46 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 47 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 49 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 50 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 52 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 53 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 55 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 56 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 58 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 59 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 61 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 62 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 64 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 65 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 67 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 68 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 70 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) x 71 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) x 73 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) x 74 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) x 76 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 77 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 79 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 80 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 82 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 83 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 85 drivers/gpu/drm/radeon/r420d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 86 drivers/gpu/drm/radeon/r420d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 89 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 90 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 92 drivers/gpu/drm/radeon/r420d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 93 drivers/gpu/drm/radeon/r420d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 95 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 96 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 98 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 99 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 101 drivers/gpu/drm/radeon/r420d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 102 drivers/gpu/drm/radeon/r420d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 104 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 105 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 107 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 108 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 110 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 111 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 113 drivers/gpu/drm/radeon/r420d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 114 drivers/gpu/drm/radeon/r420d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 116 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 117 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 119 drivers/gpu/drm/radeon/r420d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 120 drivers/gpu/drm/radeon/r420d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 122 drivers/gpu/drm/radeon/r420d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 123 drivers/gpu/drm/radeon/r420d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 125 drivers/gpu/drm/radeon/r420d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 126 drivers/gpu/drm/radeon/r420d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 128 drivers/gpu/drm/radeon/r420d.h #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) x 129 drivers/gpu/drm/radeon/r420d.h #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) x 131 drivers/gpu/drm/radeon/r420d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 132 drivers/gpu/drm/radeon/r420d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 134 drivers/gpu/drm/radeon/r420d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 135 drivers/gpu/drm/radeon/r420d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 137 drivers/gpu/drm/radeon/r420d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 138 drivers/gpu/drm/radeon/r420d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 140 drivers/gpu/drm/radeon/r420d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 141 drivers/gpu/drm/radeon/r420d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 143 drivers/gpu/drm/radeon/r420d.h #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) x 144 drivers/gpu/drm/radeon/r420d.h #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) x 146 drivers/gpu/drm/radeon/r420d.h #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) x 147 drivers/gpu/drm/radeon/r420d.h #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) x 149 drivers/gpu/drm/radeon/r420d.h #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) x 150 drivers/gpu/drm/radeon/r420d.h #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) x 152 drivers/gpu/drm/radeon/r420d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 153 drivers/gpu/drm/radeon/r420d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 158 drivers/gpu/drm/radeon/r420d.h #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) x 159 drivers/gpu/drm/radeon/r420d.h #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) x 161 drivers/gpu/drm/radeon/r420d.h #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) x 162 drivers/gpu/drm/radeon/r420d.h #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) x 164 drivers/gpu/drm/radeon/r420d.h #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) x 165 drivers/gpu/drm/radeon/r420d.h #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) x 167 drivers/gpu/drm/radeon/r420d.h #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) x 168 drivers/gpu/drm/radeon/r420d.h #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) x 170 drivers/gpu/drm/radeon/r420d.h #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) x 171 drivers/gpu/drm/radeon/r420d.h #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) x 173 drivers/gpu/drm/radeon/r420d.h #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) x 174 drivers/gpu/drm/radeon/r420d.h #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) x 176 drivers/gpu/drm/radeon/r420d.h #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) x 177 drivers/gpu/drm/radeon/r420d.h #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) x 179 drivers/gpu/drm/radeon/r420d.h #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) x 180 drivers/gpu/drm/radeon/r420d.h #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) x 182 drivers/gpu/drm/radeon/r420d.h #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) x 183 drivers/gpu/drm/radeon/r420d.h #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) x 185 drivers/gpu/drm/radeon/r420d.h #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) x 186 drivers/gpu/drm/radeon/r420d.h #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) x 188 drivers/gpu/drm/radeon/r420d.h #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) x 189 drivers/gpu/drm/radeon/r420d.h #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) x 191 drivers/gpu/drm/radeon/r420d.h #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) x 192 drivers/gpu/drm/radeon/r420d.h #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) x 194 drivers/gpu/drm/radeon/r420d.h #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) x 195 drivers/gpu/drm/radeon/r420d.h #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) x 197 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) x 198 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) x 200 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) x 201 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) x 203 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) x 204 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) x 206 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) x 207 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) x 209 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) x 210 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) x 212 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) x 213 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) x 215 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_VAP(x) (((x) & 0x1) << 21) x 216 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_VAP(x) (((x) >> 21) & 0x1) x 218 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) x 219 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) x 221 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) x 222 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) x 224 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) x 225 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) x 227 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_SR(x) (((x) & 0x1) << 25) x 228 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_SR(x) (((x) >> 25) & 0x1) x 230 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_PX(x) (((x) & 0x1) << 26) x 231 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_PX(x) (((x) >> 26) & 0x1) x 233 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_TX(x) (((x) & 0x1) << 27) x 234 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_TX(x) (((x) >> 27) & 0x1) x 236 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_US(x) (((x) & 0x1) << 28) x 237 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_US(x) (((x) >> 28) & 0x1) x 239 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) x 240 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) x 242 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_SU(x) (((x) & 0x1) << 30) x 243 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_SU(x) (((x) >> 30) & 0x1) x 245 drivers/gpu/drm/radeon/r420d.h #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) x 246 drivers/gpu/drm/radeon/r420d.h #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) x 202 drivers/gpu/drm/radeon/r500_reg.h # define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15) x 203 drivers/gpu/drm/radeon/r500_reg.h # define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21) x 225 drivers/gpu/drm/radeon/r500_reg.h # define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11) x 227 drivers/gpu/drm/radeon/r500_reg.h # define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15) x 755 drivers/gpu/drm/radeon/r500_reg.h # define AVIVO_DC_I2C_PIN_SELECT(x) ((x) << 16) x 760 drivers/gpu/drm/radeon/r500_reg.h # define AVIVO_DC_I2C_ADDR_COUNT(x) ((x) << 0) x 761 drivers/gpu/drm/radeon/r500_reg.h # define AVIVO_DC_I2C_DATA_COUNT(x) ((x) << 8) x 766 drivers/gpu/drm/radeon/r500_reg.h # define AVIVO_DC_I2C_RD_INTRA_BYTE_DELAY(x) ((x) << 8) x 767 drivers/gpu/drm/radeon/r500_reg.h # define AVIVO_DC_I2C_WR_INTRA_BYTE_DELAY(x) ((x) << 16) x 768 drivers/gpu/drm/radeon/r500_reg.h # define AVIVO_DC_I2C_TIME_LIMIT(x) ((x) << 24) x 33 drivers/gpu/drm/radeon/r520d.h #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) x 34 drivers/gpu/drm/radeon/r520d.h #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 37 drivers/gpu/drm/radeon/r520d.h #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) x 38 drivers/gpu/drm/radeon/r520d.h #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) x 41 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 42 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 44 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 45 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 47 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 48 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 50 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 51 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 53 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 54 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 56 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 57 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 59 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 60 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 62 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 63 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 65 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 66 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 68 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) x 69 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) x 71 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) x 72 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) x 74 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 75 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 77 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 78 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 80 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 81 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 83 drivers/gpu/drm/radeon/r520d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 84 drivers/gpu/drm/radeon/r520d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 87 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 88 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 90 drivers/gpu/drm/radeon/r520d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 91 drivers/gpu/drm/radeon/r520d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 93 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 94 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 96 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 97 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 99 drivers/gpu/drm/radeon/r520d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 100 drivers/gpu/drm/radeon/r520d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 102 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 103 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 105 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 106 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 108 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 109 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 111 drivers/gpu/drm/radeon/r520d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 112 drivers/gpu/drm/radeon/r520d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 114 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 115 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 117 drivers/gpu/drm/radeon/r520d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 118 drivers/gpu/drm/radeon/r520d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 120 drivers/gpu/drm/radeon/r520d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 121 drivers/gpu/drm/radeon/r520d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 123 drivers/gpu/drm/radeon/r520d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 124 drivers/gpu/drm/radeon/r520d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 126 drivers/gpu/drm/radeon/r520d.h #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) x 127 drivers/gpu/drm/radeon/r520d.h #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) x 129 drivers/gpu/drm/radeon/r520d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 130 drivers/gpu/drm/radeon/r520d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 132 drivers/gpu/drm/radeon/r520d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 133 drivers/gpu/drm/radeon/r520d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 135 drivers/gpu/drm/radeon/r520d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 136 drivers/gpu/drm/radeon/r520d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 138 drivers/gpu/drm/radeon/r520d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 139 drivers/gpu/drm/radeon/r520d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 141 drivers/gpu/drm/radeon/r520d.h #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) x 142 drivers/gpu/drm/radeon/r520d.h #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) x 144 drivers/gpu/drm/radeon/r520d.h #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) x 145 drivers/gpu/drm/radeon/r520d.h #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) x 147 drivers/gpu/drm/radeon/r520d.h #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) x 148 drivers/gpu/drm/radeon/r520d.h #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) x 150 drivers/gpu/drm/radeon/r520d.h #define S_000E40_RBBM_HIBUSY(x) (((x) & 0x1) << 28) x 151 drivers/gpu/drm/radeon/r520d.h #define G_000E40_RBBM_HIBUSY(x) (((x) >> 28) & 0x1) x 153 drivers/gpu/drm/radeon/r520d.h #define S_000E40_SKID_CFBUSY(x) (((x) & 0x1) << 29) x 154 drivers/gpu/drm/radeon/r520d.h #define G_000E40_SKID_CFBUSY(x) (((x) >> 29) & 0x1) x 156 drivers/gpu/drm/radeon/r520d.h #define S_000E40_VAP_VF_BUSY(x) (((x) & 0x1) << 30) x 157 drivers/gpu/drm/radeon/r520d.h #define G_000E40_VAP_VF_BUSY(x) (((x) >> 30) & 0x1) x 159 drivers/gpu/drm/radeon/r520d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 160 drivers/gpu/drm/radeon/r520d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 165 drivers/gpu/drm/radeon/r520d.h #define S_000004_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 166 drivers/gpu/drm/radeon/r520d.h #define G_000004_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 168 drivers/gpu/drm/radeon/r520d.h #define S_000004_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 169 drivers/gpu/drm/radeon/r520d.h #define G_000004_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 172 drivers/gpu/drm/radeon/r520d.h #define S_000005_MC_AGP_START(x) (((x) & 0xFFFF) << 0) x 173 drivers/gpu/drm/radeon/r520d.h #define G_000005_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) x 175 drivers/gpu/drm/radeon/r520d.h #define S_000005_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) x 176 drivers/gpu/drm/radeon/r520d.h #define G_000005_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) x 179 drivers/gpu/drm/radeon/r520d.h #define S_000006_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) x 180 drivers/gpu/drm/radeon/r520d.h #define G_000006_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) x 183 drivers/gpu/drm/radeon/r520d.h #define S_000007_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) x 184 drivers/gpu/drm/radeon/r520d.h #define G_000007_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) x 91 drivers/gpu/drm/radeon/r600_reg.h # define R600_D1GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) x 96 drivers/gpu/drm/radeon/r600_reg.h # define R600_D1GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) x 101 drivers/gpu/drm/radeon/r600_reg.h # define R600_D1GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) x 106 drivers/gpu/drm/radeon/r600_reg.h # define R600_D1GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) x 111 drivers/gpu/drm/radeon/r600_reg.h # define R600_D1GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) x 60 drivers/gpu/drm/radeon/r600d.h #define BACKEND_DISABLE(x) ((x) << 16) x 63 drivers/gpu/drm/radeon/r600d.h #define S_028808_SPECIAL_OP(x) (((x) & 0x7) << 4) x 64 drivers/gpu/drm/radeon/r600d.h #define G_028808_SPECIAL_OP(x) (((x) >> 4) & 0x7) x 83 drivers/gpu/drm/radeon/r600d.h #define S_028080_SLICE_START(x) (((x) & 0x7FF) << 0) x 84 drivers/gpu/drm/radeon/r600d.h #define G_028080_SLICE_START(x) (((x) >> 0) & 0x7FF) x 86 drivers/gpu/drm/radeon/r600d.h #define S_028080_SLICE_MAX(x) (((x) & 0x7FF) << 13) x 87 drivers/gpu/drm/radeon/r600d.h #define G_028080_SLICE_MAX(x) (((x) >> 13) & 0x7FF) x 97 drivers/gpu/drm/radeon/r600d.h #define S_028100_CMASK_BLOCK_MAX(x) (((x) & 0xFFF) << 0) x 98 drivers/gpu/drm/radeon/r600d.h #define G_028100_CMASK_BLOCK_MAX(x) (((x) >> 0) & 0xFFF) x 100 drivers/gpu/drm/radeon/r600d.h #define S_028100_FMASK_TILE_MAX(x) (((x) & 0xFFFFF) << 12) x 101 drivers/gpu/drm/radeon/r600d.h #define G_028100_FMASK_TILE_MAX(x) (((x) >> 12) & 0xFFFFF) x 111 drivers/gpu/drm/radeon/r600d.h # define CB_FORMAT(x) ((x) << 2) x 112 drivers/gpu/drm/radeon/r600d.h # define CB_ARRAY_MODE(x) ((x) << 8) x 113 drivers/gpu/drm/radeon/r600d.h # define CB_SOURCE_FORMAT(x) ((x) << 27) x 178 drivers/gpu/drm/radeon/r600d.h #define S_0086D8_CP_PFP_HALT(x) (((x) & 1)<<26) x 179 drivers/gpu/drm/radeon/r600d.h #define C_0086D8_CP_PFP_HALT(x) ((x) & 0xFBFFFFFF) x 180 drivers/gpu/drm/radeon/r600d.h #define S_0086D8_CP_ME_HALT(x) (((x) & 1)<<28) x 181 drivers/gpu/drm/radeon/r600d.h #define C_0086D8_CP_ME_HALT(x) ((x) & 0xEFFFFFFF) x 186 drivers/gpu/drm/radeon/r600d.h #define MEQ_END(x) ((x) << 16) x 187 drivers/gpu/drm/radeon/r600d.h #define ROQ_END(x) ((x) << 24) x 192 drivers/gpu/drm/radeon/r600d.h #define ROQ_IB1_START(x) ((x) << 0) x 193 drivers/gpu/drm/radeon/r600d.h #define ROQ_IB2_START(x) ((x) << 8) x 196 drivers/gpu/drm/radeon/r600d.h #define RB_BUFSZ(x) ((x) << 0) x 197 drivers/gpu/drm/radeon/r600d.h #define RB_BLKSZ(x) ((x) << 8) x 203 drivers/gpu/drm/radeon/r600d.h #define RB_RPTR_SWAP(x) ((x) << 0) x 219 drivers/gpu/drm/radeon/r600d.h #define S_028D24_HTILE_WIDTH(x) (((x) & 0x1) << 0) x 220 drivers/gpu/drm/radeon/r600d.h #define G_028D24_HTILE_WIDTH(x) (((x) >> 0) & 0x1) x 222 drivers/gpu/drm/radeon/r600d.h #define S_028D24_HTILE_HEIGHT(x) (((x) & 0x1) << 1) x 223 drivers/gpu/drm/radeon/r600d.h #define G_028D24_HTILE_HEIGHT(x) (((x) >> 1) & 0x1) x 225 drivers/gpu/drm/radeon/r600d.h #define G_028D24_LINEAR(x) (((x) >> 2) & 0x1) x 227 drivers/gpu/drm/radeon/r600d.h #define DEPTH_FREE(x) ((x) << 0) x 228 drivers/gpu/drm/radeon/r600d.h #define DEPTH_FLUSH(x) ((x) << 5) x 229 drivers/gpu/drm/radeon/r600d.h #define DEPTH_PENDING_FREE(x) ((x) << 15) x 230 drivers/gpu/drm/radeon/r600d.h #define DEPTH_CACHELINE_FREE(x) ((x) << 20) x 233 drivers/gpu/drm/radeon/r600d.h #define PIPE_TILING(x) ((x) << 1) x 234 drivers/gpu/drm/radeon/r600d.h #define BANK_TILING(x) ((x) << 4) x 235 drivers/gpu/drm/radeon/r600d.h #define GROUP_SIZE(x) ((x) << 6) x 236 drivers/gpu/drm/radeon/r600d.h #define ROW_TILING(x) ((x) << 8) x 237 drivers/gpu/drm/radeon/r600d.h #define BANK_SWAPS(x) ((x) << 11) x 238 drivers/gpu/drm/radeon/r600d.h #define SAMPLE_SPLIT(x) ((x) << 14) x 239 drivers/gpu/drm/radeon/r600d.h #define BACKEND_MAP(x) ((x) << 16) x 246 drivers/gpu/drm/radeon/r600d.h #define INACTIVE_QD_PIPES(x) ((x) << 8) x 248 drivers/gpu/drm/radeon/r600d.h #define INACTIVE_SIMDS(x) ((x) << 16) x 257 drivers/gpu/drm/radeon/r600d.h # define CLAUSE_SEQ_PRIO(x) ((x) << 8) x 258 drivers/gpu/drm/radeon/r600d.h # define PS_PRIO(x) ((x) << 24) x 259 drivers/gpu/drm/radeon/r600d.h # define VS_PRIO(x) ((x) << 26) x 260 drivers/gpu/drm/radeon/r600d.h # define GS_PRIO(x) ((x) << 28) x 261 drivers/gpu/drm/radeon/r600d.h # define ES_PRIO(x) ((x) << 30) x 263 drivers/gpu/drm/radeon/r600d.h # define NUM_PS_GPRS(x) ((x) << 0) x 264 drivers/gpu/drm/radeon/r600d.h # define NUM_VS_GPRS(x) ((x) << 16) x 265 drivers/gpu/drm/radeon/r600d.h # define NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28) x 267 drivers/gpu/drm/radeon/r600d.h # define NUM_GS_GPRS(x) ((x) << 0) x 268 drivers/gpu/drm/radeon/r600d.h # define NUM_ES_GPRS(x) ((x) << 16) x 270 drivers/gpu/drm/radeon/r600d.h # define NUM_PS_THREADS(x) ((x) << 0) x 271 drivers/gpu/drm/radeon/r600d.h # define NUM_VS_THREADS(x) ((x) << 8) x 272 drivers/gpu/drm/radeon/r600d.h # define NUM_GS_THREADS(x) ((x) << 16) x 273 drivers/gpu/drm/radeon/r600d.h # define NUM_ES_THREADS(x) ((x) << 24) x 275 drivers/gpu/drm/radeon/r600d.h # define NUM_PS_STACK_ENTRIES(x) ((x) << 0) x 276 drivers/gpu/drm/radeon/r600d.h # define NUM_VS_STACK_ENTRIES(x) ((x) << 16) x 278 drivers/gpu/drm/radeon/r600d.h # define NUM_GS_STACK_ENTRIES(x) ((x) << 0) x 279 drivers/gpu/drm/radeon/r600d.h # define NUM_ES_STACK_ENTRIES(x) ((x) << 16) x 290 drivers/gpu/drm/radeon/r600d.h # define GRBM_READ_TIMEOUT(x) ((x) << 0) x 299 drivers/gpu/drm/radeon/r600d.h #define DIG_THERM_DPM(x) ((x) << 12) x 303 drivers/gpu/drm/radeon/r600d.h #define ASIC_T(x) ((x) << 0) x 307 drivers/gpu/drm/radeon/r600d.h #define DIG_THERM_INTH(x) ((x) << 8) x 310 drivers/gpu/drm/radeon/r600d.h #define DIG_THERM_INTL(x) ((x) << 16) x 345 drivers/gpu/drm/radeon/r600d.h #define EFFECTIVE_L1_TLB_SIZE(x) (((x) & 7) << 12) x 348 drivers/gpu/drm/radeon/r600d.h #define EFFECTIVE_L1_QUEUE_SIZE(x) (((x) & 7) << 15) x 376 drivers/gpu/drm/radeon/r600d.h #define NUM_CLIP_SEQ(x) ((x) << 1) x 382 drivers/gpu/drm/radeon/r600d.h #define S0_X(x) ((x) << 0) x 383 drivers/gpu/drm/radeon/r600d.h #define S0_Y(x) ((x) << 4) x 384 drivers/gpu/drm/radeon/r600d.h #define S1_X(x) ((x) << 8) x 385 drivers/gpu/drm/radeon/r600d.h #define S1_Y(x) ((x) << 12) x 386 drivers/gpu/drm/radeon/r600d.h #define S2_X(x) ((x) << 16) x 387 drivers/gpu/drm/radeon/r600d.h #define S2_Y(x) ((x) << 20) x 388 drivers/gpu/drm/radeon/r600d.h #define S3_X(x) ((x) << 24) x 389 drivers/gpu/drm/radeon/r600d.h #define S3_Y(x) ((x) << 28) x 390 drivers/gpu/drm/radeon/r600d.h #define S4_X(x) ((x) << 0) x 391 drivers/gpu/drm/radeon/r600d.h #define S4_Y(x) ((x) << 4) x 392 drivers/gpu/drm/radeon/r600d.h #define S5_X(x) ((x) << 8) x 393 drivers/gpu/drm/radeon/r600d.h #define S5_Y(x) ((x) << 12) x 394 drivers/gpu/drm/radeon/r600d.h #define S6_X(x) ((x) << 16) x 395 drivers/gpu/drm/radeon/r600d.h #define S6_Y(x) ((x) << 20) x 396 drivers/gpu/drm/radeon/r600d.h #define S7_X(x) ((x) << 24) x 397 drivers/gpu/drm/radeon/r600d.h #define S7_Y(x) ((x) << 28) x 400 drivers/gpu/drm/radeon/r600d.h #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) x 401 drivers/gpu/drm/radeon/r600d.h #define FORCE_EOV_MAX_TILE_CNT(x) ((x) << 12) x 445 drivers/gpu/drm/radeon/r600d.h #define GPR_WRITE_PRIORITY(x) ((x) << 0) x 448 drivers/gpu/drm/radeon/r600d.h #define VTX_DONE_DELAY(x) ((x) << 0) x 452 drivers/gpu/drm/radeon/r600d.h #define NUM_INTERP(x) ((x)<<0) x 455 drivers/gpu/drm/radeon/r600d.h #define POSITION_ADDR(x) ((x)<<10) x 456 drivers/gpu/drm/radeon/r600d.h #define PARAM_GEN(x) ((x)<<15) x 457 drivers/gpu/drm/radeon/r600d.h #define PARAM_GEN_ADDR(x) ((x)<<19) x 458 drivers/gpu/drm/radeon/r600d.h #define BARYC_SAMPLE_CNTL(x) ((x)<<26) x 465 drivers/gpu/drm/radeon/r600d.h #define GEN_INDEX_PIX_ADDR(x) ((x)<<1) x 467 drivers/gpu/drm/radeon/r600d.h #define FRONT_FACE_CHAN(x) ((x)<<9) x 469 drivers/gpu/drm/radeon/r600d.h #define FRONT_FACE_ADDR(x) ((x)<<12) x 470 drivers/gpu/drm/radeon/r600d.h #define FOG_ADDR(x) ((x)<<17) x 472 drivers/gpu/drm/radeon/r600d.h #define FIXED_PT_POSITION_ADDR(x) ((x)<<25) x 475 drivers/gpu/drm/radeon/r600d.h #define CACHE_FIFO_SIZE(x) ((x) << 0) x 476 drivers/gpu/drm/radeon/r600d.h #define FETCH_FIFO_HIWATER(x) ((x) << 8) x 477 drivers/gpu/drm/radeon/r600d.h #define DONE_FIFO_HIWATER(x) ((x) << 16) x 478 drivers/gpu/drm/radeon/r600d.h #define ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24) x 493 drivers/gpu/drm/radeon/r600d.h # define SQ_VTXC_BASE_ADDR_HI(x) ((x) << 0) x 494 drivers/gpu/drm/radeon/r600d.h # define SQ_VTXC_STRIDE(x) ((x) << 8) x 495 drivers/gpu/drm/radeon/r600d.h # define SQ_VTXC_ENDIAN_SWAP(x) ((x) << 30) x 501 drivers/gpu/drm/radeon/r600d.h #define S__SQ_VTX_CONSTANT_TYPE(x) (((x) & 3) << 30) x 502 drivers/gpu/drm/radeon/r600d.h #define G__SQ_VTX_CONSTANT_TYPE(x) (((x) >> 30) & 3) x 525 drivers/gpu/drm/radeon/r600d.h #define TC_L2_SIZE(x) ((x)<<5) x 531 drivers/gpu/drm/radeon/r600d.h #define CACHE_INVALIDATION(x) ((x)<<0) x 575 drivers/gpu/drm/radeon/r600d.h #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) x 584 drivers/gpu/drm/radeon/r600d.h #define REQUEST_TYPE(x) (((x) & 0xf) << 0) x 591 drivers/gpu/drm/radeon/r600d.h #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 13) x 596 drivers/gpu/drm/radeon/r600d.h #define BANK_SELECT_0(x) (((x) & 0x1f) << 0) x 597 drivers/gpu/drm/radeon/r600d.h #define BANK_SELECT_1(x) (((x) & 0x1f) << 5) x 598 drivers/gpu/drm/radeon/r600d.h #define L2_CACHE_UPDATE_MODE(x) (((x) & 3) << 10) x 615 drivers/gpu/drm/radeon/r600d.h # define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ x 619 drivers/gpu/drm/radeon/r600d.h # define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ x 661 drivers/gpu/drm/radeon/r600d.h # define IH_RB_SIZE(x) ((x) << 1) /* log2 */ x 664 drivers/gpu/drm/radeon/r600d.h # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ x 676 drivers/gpu/drm/radeon/r600d.h # define IH_MC_SWAP(x) ((x) << 1) x 682 drivers/gpu/drm/radeon/r600d.h # define MC_WRREQ_CREDIT(x) ((x) << 15) x 683 drivers/gpu/drm/radeon/r600d.h # define MC_WR_CLEAN_CNT(x) ((x) << 20) x 811 drivers/gpu/drm/radeon/r600d.h # define DACx_AUTODETECT_MODE(x) ((x) << 0) x 815 drivers/gpu/drm/radeon/r600d.h # define DACx_AUTODETECT_FRAME_TIME_COUNTER(x) ((x) << 8) x 817 drivers/gpu/drm/radeon/r600d.h # define DACx_AUTODETECT_CHECK_MASK(x) ((x) << 16) x 877 drivers/gpu/drm/radeon/r600d.h # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) x 878 drivers/gpu/drm/radeon/r600d.h # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) x 949 drivers/gpu/drm/radeon/r600d.h # define AUDIO_DTO_PHASE(x) (((x) & 0xffff) << 0) x 950 drivers/gpu/drm/radeon/r600d.h # define AUDIO_DTO_MODULE(x) (((x) & 0xffff) << 16) x 958 drivers/gpu/drm/radeon/r600d.h # define DCCG_AUDIO_DTO_WALLCLOCK_RATIO(x) (((x) & 7) << 0) x 977 drivers/gpu/drm/radeon/r600d.h # define DIG_MODE(x) (((x) & 7) << 8) x 986 drivers/gpu/drm/radeon/r600d.h #define SPEAKER_ALLOCATION(x) (((x) & 0x7f) << 0) x 1006 drivers/gpu/drm/radeon/r600d.h # define MAX_CHANNELS(x) (((x) & 0x7) << 0) x 1008 drivers/gpu/drm/radeon/r600d.h # define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8) x 1009 drivers/gpu/drm/radeon/r600d.h # define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16) x 1010 drivers/gpu/drm/radeon/r600d.h # define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */ x 1031 drivers/gpu/drm/radeon/r600d.h # define HDMI0_STREAM(x) (((x) & 3) << 2) x 1046 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_DELAY_EN(x) (((x) & 3) << 4) x 1050 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_PACKETS_PER_LINE(x) (((x) & 0x1f) << 16) x 1074 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_LINE(x) (((x) & 0x3f) << 0) x 1076 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_INFO_LINE(x) (((x) & 0x3f) << 8) x 1078 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_LINE(x) (((x) & 0x3f) << 16) x 1085 drivers/gpu/drm/radeon/r600d.h # define HDMI0_GENERIC0_LINE(x) (((x) & 0x3f) << 16) x 1087 drivers/gpu/drm/radeon/r600d.h # define HDMI0_GENERIC1_LINE(x) (((x) & 0x3f) << 24) x 1092 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 1093 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_S(x) (((x) & 3) << 8) x 1094 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_B(x) (((x) & 3) << 10) x 1095 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_A(x) (((x) & 1) << 12) x 1096 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_Y(x) (((x) & 3) << 13) x 1100 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_Y_A_B_S(x) (((x) & 0xff) << 8) x 1101 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_R(x) (((x) & 0xf) << 16) x 1102 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_M(x) (((x) & 0x3) << 20) x 1103 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_C(x) (((x) & 0x3) << 22) x 1104 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_C_M_R(x) (((x) & 0xff) << 16) x 1105 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_SC(x) (((x) & 0x3) << 24) x 1106 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_ITC_EC_Q_SC(x) (((x) & 0xff) << 24) x 1108 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_VIC(x) (((x) & 0x7f) << 0) /* don't use avi infoframe v1 */ x 1109 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_PR(x) (((x) & 0xf) << 8) /* don't use avi infoframe v1 */ x 1110 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_TOP(x) (((x) & 0xffff) << 16) x 1112 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_BOTTOM(x) (((x) & 0xffff) << 0) x 1113 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_LEFT(x) (((x) & 0xffff) << 16) x 1115 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_RIGHT(x) (((x) & 0xffff) << 0) x 1116 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AVI_INFO_VERSION(x) (((x) & 3) << 24) x 1118 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 1119 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_MB0(x) (((x) & 0xff) << 8) x 1120 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_MB1(x) (((x) & 0xff) << 16) x 1121 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_MB2(x) (((x) & 0xff) << 24) x 1123 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_MB3(x) (((x) & 0xff) << 0) x 1124 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_MF(x) (((x) & 3) << 8) x 1125 drivers/gpu/drm/radeon/r600d.h # define HDMI0_MPEG_INFO_FR(x) (((x) & 1) << 12) x 1143 drivers/gpu/drm/radeon/r600d.h # define HDMI0_ACR_CTS_32(x) (((x) & 0xfffff) << 12) x 1146 drivers/gpu/drm/radeon/r600d.h # define HDMI0_ACR_N_32(x) (((x) & 0xfffff) << 0) x 1149 drivers/gpu/drm/radeon/r600d.h # define HDMI0_ACR_CTS_44(x) (((x) & 0xfffff) << 12) x 1152 drivers/gpu/drm/radeon/r600d.h # define HDMI0_ACR_N_44(x) (((x) & 0xfffff) << 0) x 1155 drivers/gpu/drm/radeon/r600d.h # define HDMI0_ACR_CTS_48(x) (((x) & 0xfffff) << 12) x 1158 drivers/gpu/drm/radeon/r600d.h # define HDMI0_ACR_N_48(x) (((x) & 0xfffff) << 0) x 1163 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 1164 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_INFO_CC(x) (((x) & 7) << 8) x 1166 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_INFO_CA(x) (((x) & 0xff) << 0) x 1167 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_INFO_LSV(x) (((x) & 0xf) << 11) x 1168 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_INFO_DM_INH(x) (((x) & 1) << 15) x 1169 drivers/gpu/drm/radeon/r600d.h # define HDMI0_AUDIO_INFO_DM_INH_LSV(x) (((x) & 0xff) << 8) x 1171 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_A(x) (((x) & 1) << 0) x 1172 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_B(x) (((x) & 1) << 1) x 1173 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_C(x) (((x) & 1) << 2) x 1174 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_D(x) (((x) & 3) << 3) x 1175 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_MODE(x) (((x) & 3) << 6) x 1176 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CATEGORY_CODE(x) (((x) & 0xff) << 8) x 1177 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_SOURCE_NUMBER(x) (((x) & 0xf) << 16) x 1178 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_L(x) (((x) & 0xf) << 20) x 1180 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 24) x 1181 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CLOCK_ACCURACY(x) (((x) & 3) << 28) x 1184 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_WORD_LENGTH(x) (((x) & 0xf) << 0) x 1185 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_ORIGINAL_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 4) x 1186 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_VALID_L(x) (((x) & 1) << 16) x 1187 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_VALID_R(x) (((x) & 1) << 18) x 1188 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_R(x) (((x) & 0xf) << 20) x 1193 drivers/gpu/drm/radeon/r600d.h # define HDMI0_ACR_SELECT(x) (((x) & 3) << 4) x 1202 drivers/gpu/drm/radeon/r600d.h # define HDMI0_RAMP_MAX_COUNT(x) (((x) & 0xffffff) << 0) x 1204 drivers/gpu/drm/radeon/r600d.h # define HDMI0_RAMP_MIN_COUNT(x) (((x) & 0xffffff) << 0) x 1206 drivers/gpu/drm/radeon/r600d.h # define HDMI0_RAMP_INC_COUNT(x) (((x) & 0xffffff) << 0) x 1208 drivers/gpu/drm/radeon/r600d.h # define HDMI0_RAMP_DEC_COUNT(x) (((x) & 0xffffff) << 0) x 1211 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_2(x) (((x) & 0xf) << 0) x 1212 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_3(x) (((x) & 0xf) << 4) x 1213 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_4(x) (((x) & 0xf) << 8) x 1214 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_5(x) (((x) & 0xf) << 12) x 1215 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_6(x) (((x) & 0xf) << 16) x 1216 drivers/gpu/drm/radeon/r600d.h # define HDMI0_60958_CS_CHANNEL_NUMBER_7(x) (((x) & 0xf) << 20) x 1249 drivers/gpu/drm/radeon/r600d.h # define FMT_SPATIAL_DITHER_MODE(x) ((x) << 9) x 1256 drivers/gpu/drm/radeon/r600d.h # define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) << 21) x 1259 drivers/gpu/drm/radeon/r600d.h # define FMT_25FRC_SEL(x) ((x) << 26) x 1260 drivers/gpu/drm/radeon/r600d.h # define FMT_50FRC_SEL(x) ((x) << 28) x 1261 drivers/gpu/drm/radeon/r600d.h # define FMT_75FRC_SEL(x) ((x) << 30) x 1264 drivers/gpu/drm/radeon/r600d.h # define FMT_CLAMP_COLOR_FORMAT(x) ((x) << 16) x 1273 drivers/gpu/drm/radeon/r600d.h # define SPLL_REF_DIV(x) ((x) << 2) x 1275 drivers/gpu/drm/radeon/r600d.h # define SPLL_FB_DIV(x) ((x) << 5) x 1278 drivers/gpu/drm/radeon/r600d.h # define SPLL_PULSENUM(x) ((x) << 14) x 1280 drivers/gpu/drm/radeon/r600d.h # define SPLL_SW_HILEN(x) ((x) << 16) x 1282 drivers/gpu/drm/radeon/r600d.h # define SPLL_SW_LOLEN(x) ((x) << 20) x 1297 drivers/gpu/drm/radeon/r600d.h # define SW_GPIO_INDEX(x) ((x) << 6) x 1303 drivers/gpu/drm/radeon/r600d.h # define TPCC(x) ((x) << 0) x 1305 drivers/gpu/drm/radeon/r600d.h # define TPU(x) ((x) << 23) x 1357 drivers/gpu/drm/radeon/r600d.h # define MPLL_LOCK_TIME(x) ((x) << 0) x 1359 drivers/gpu/drm/radeon/r600d.h # define MPLL_RESET_TIME(x) ((x) << 16) x 1363 drivers/gpu/drm/radeon/r600d.h # define STEP_0_SPLL_POST_DIV(x) ((x) << 0) x 1365 drivers/gpu/drm/radeon/r600d.h # define STEP_0_SPLL_FB_DIV(x) ((x) << 8) x 1367 drivers/gpu/drm/radeon/r600d.h # define STEP_0_SPLL_REF_DIV(x) ((x) << 16) x 1369 drivers/gpu/drm/radeon/r600d.h # define STEP_0_SPLL_STEP_TIME(x) ((x) << 19) x 1372 drivers/gpu/drm/radeon/r600d.h # define STEP_0_PULSE_HIGH_CNT(x) ((x) << 0) x 1379 drivers/gpu/drm/radeon/r600d.h # define VID_CRT(x) ((x) << 0) x 1381 drivers/gpu/drm/radeon/r600d.h # define VID_CRTU(x) ((x) << 13) x 1383 drivers/gpu/drm/radeon/r600d.h # define SSTU(x) ((x) << 16) x 1386 drivers/gpu/drm/radeon/r600d.h # define CTXSW_FREQ_VIDS_CFG_INDEX(x) ((x) << 0) x 1389 drivers/gpu/drm/radeon/r600d.h # define CTXSW_FREQ_MCLK_CFG_INDEX(x) ((x) << 2) x 1392 drivers/gpu/drm/radeon/r600d.h # define CTXSW_FREQ_SCLK_CFG_INDEX(x) ((x) << 4) x 1405 drivers/gpu/drm/radeon/r600d.h # define DYN_PWR_ENTER_INDEX(x) ((x) << 4) x 1421 drivers/gpu/drm/radeon/r600d.h # define PHC(x) ((x) << 0) x 1423 drivers/gpu/drm/radeon/r600d.h # define SDC(x) ((x) << 9) x 1426 drivers/gpu/drm/radeon/r600d.h # define SU(x) ((x) << 23) x 1430 drivers/gpu/drm/radeon/r600d.h # define UTC_0(x) ((x) << 0) x 1432 drivers/gpu/drm/radeon/r600d.h # define DTC_0(x) ((x) << 10) x 1436 drivers/gpu/drm/radeon/r600d.h # define BSP(x) ((x) << 0) x 1438 drivers/gpu/drm/radeon/r600d.h # define BSU(x) ((x) << 16) x 1441 drivers/gpu/drm/radeon/r600d.h # define FLS(x) ((x) << 0) x 1443 drivers/gpu/drm/radeon/r600d.h # define FMS(x) ((x) << 16) x 1446 drivers/gpu/drm/radeon/r600d.h # define FHS(x) ((x) << 0) x 1449 drivers/gpu/drm/radeon/r600d.h # define CG_GICST(x) ((x) << 0) x 1451 drivers/gpu/drm/radeon/r600d.h # define CG_GIPOT(x) ((x) << 16) x 1455 drivers/gpu/drm/radeon/r600d.h # define CG_SST(x) ((x) << 0) x 1457 drivers/gpu/drm/radeon/r600d.h # define CG_SSTU(x) ((x) << 16) x 1467 drivers/gpu/drm/radeon/r600d.h # define FC_T(x) ((x) << 0) x 1469 drivers/gpu/drm/radeon/r600d.h # define FC_TU(x) ((x) << 16) x 1561 drivers/gpu/drm/radeon/r600d.h # define UPLL_FB_DIV(x) ((x) << 4) x 1563 drivers/gpu/drm/radeon/r600d.h # define UPLL_REF_DIV(x) ((x) << 16) x 1569 drivers/gpu/drm/radeon/r600d.h # define UPLL_SW_HILEN(x) ((x) << 0) x 1570 drivers/gpu/drm/radeon/r600d.h # define UPLL_SW_LOLEN(x) ((x) << 4) x 1571 drivers/gpu/drm/radeon/r600d.h # define UPLL_SW_HILEN2(x) ((x) << 8) x 1572 drivers/gpu/drm/radeon/r600d.h # define UPLL_SW_LOLEN2(x) ((x) << 12) x 1576 drivers/gpu/drm/radeon/r600d.h # define VCLK_SRC_SEL(x) ((x) << 20) x 1578 drivers/gpu/drm/radeon/r600d.h # define DCLK_SRC_SEL(x) ((x) << 25) x 1628 drivers/gpu/drm/radeon/r600d.h # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) x 1634 drivers/gpu/drm/radeon/r600d.h # define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) x 1661 drivers/gpu/drm/radeon/r600d.h #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) x 1664 drivers/gpu/drm/radeon/r600d.h #define EVENT_TYPE(x) ((x) << 0) x 1665 drivers/gpu/drm/radeon/r600d.h #define EVENT_INDEX(x) ((x) << 8) x 1674 drivers/gpu/drm/radeon/r600d.h #define DATA_SEL(x) ((x) << 29) x 1680 drivers/gpu/drm/radeon/r600d.h #define INT_SEL(x) ((x) << 24) x 1715 drivers/gpu/drm/radeon/r600d.h #define G_000012_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) x 1717 drivers/gpu/drm/radeon/r600d.h #define S_0028F8_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) x 1719 drivers/gpu/drm/radeon/r600d.h #define S_0028F8_MC_IND_WR_EN(x) (((x) & 0x1) << 9) x 1723 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_CP(x) (((x) & 1) << 0) x 1724 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_CB(x) (((x) & 1) << 1) x 1725 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_CR(x) (((x) & 1) << 2) x 1726 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_DB(x) (((x) & 1) << 3) x 1727 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_PA(x) (((x) & 1) << 5) x 1728 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_SC(x) (((x) & 1) << 6) x 1729 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_SMX(x) (((x) & 1) << 7) x 1730 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_SPI(x) (((x) & 1) << 8) x 1731 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_SH(x) (((x) & 1) << 9) x 1732 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_SX(x) (((x) & 1) << 10) x 1733 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_TC(x) (((x) & 1) << 11) x 1734 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_TA(x) (((x) & 1) << 12) x 1735 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_VC(x) (((x) & 1) << 13) x 1736 drivers/gpu/drm/radeon/r600d.h #define S_008020_SOFT_RESET_VGT(x) (((x) & 1) << 14) x 1738 drivers/gpu/drm/radeon/r600d.h #define S_008010_CMDFIFO_AVAIL(x) (((x) & 0x1F) << 0) x 1739 drivers/gpu/drm/radeon/r600d.h #define S_008010_CP_RQ_PENDING(x) (((x) & 1) << 6) x 1740 drivers/gpu/drm/radeon/r600d.h #define S_008010_CF_RQ_PENDING(x) (((x) & 1) << 7) x 1741 drivers/gpu/drm/radeon/r600d.h #define S_008010_PF_RQ_PENDING(x) (((x) & 1) << 8) x 1742 drivers/gpu/drm/radeon/r600d.h #define S_008010_GRBM_EE_BUSY(x) (((x) & 1) << 10) x 1743 drivers/gpu/drm/radeon/r600d.h #define S_008010_VC_BUSY(x) (((x) & 1) << 11) x 1744 drivers/gpu/drm/radeon/r600d.h #define S_008010_DB03_CLEAN(x) (((x) & 1) << 12) x 1745 drivers/gpu/drm/radeon/r600d.h #define S_008010_CB03_CLEAN(x) (((x) & 1) << 13) x 1746 drivers/gpu/drm/radeon/r600d.h #define S_008010_VGT_BUSY_NO_DMA(x) (((x) & 1) << 16) x 1747 drivers/gpu/drm/radeon/r600d.h #define S_008010_VGT_BUSY(x) (((x) & 1) << 17) x 1748 drivers/gpu/drm/radeon/r600d.h #define S_008010_TA03_BUSY(x) (((x) & 1) << 18) x 1749 drivers/gpu/drm/radeon/r600d.h #define S_008010_TC_BUSY(x) (((x) & 1) << 19) x 1750 drivers/gpu/drm/radeon/r600d.h #define S_008010_SX_BUSY(x) (((x) & 1) << 20) x 1751 drivers/gpu/drm/radeon/r600d.h #define S_008010_SH_BUSY(x) (((x) & 1) << 21) x 1752 drivers/gpu/drm/radeon/r600d.h #define S_008010_SPI03_BUSY(x) (((x) & 1) << 22) x 1753 drivers/gpu/drm/radeon/r600d.h #define S_008010_SMX_BUSY(x) (((x) & 1) << 23) x 1754 drivers/gpu/drm/radeon/r600d.h #define S_008010_SC_BUSY(x) (((x) & 1) << 24) x 1755 drivers/gpu/drm/radeon/r600d.h #define S_008010_PA_BUSY(x) (((x) & 1) << 25) x 1756 drivers/gpu/drm/radeon/r600d.h #define S_008010_DB03_BUSY(x) (((x) & 1) << 26) x 1757 drivers/gpu/drm/radeon/r600d.h #define S_008010_CR_BUSY(x) (((x) & 1) << 27) x 1758 drivers/gpu/drm/radeon/r600d.h #define S_008010_CP_COHERENCY_BUSY(x) (((x) & 1) << 28) x 1759 drivers/gpu/drm/radeon/r600d.h #define S_008010_CP_BUSY(x) (((x) & 1) << 29) x 1760 drivers/gpu/drm/radeon/r600d.h #define S_008010_CB03_BUSY(x) (((x) & 1) << 30) x 1761 drivers/gpu/drm/radeon/r600d.h #define S_008010_GUI_ACTIVE(x) (((x) & 1) << 31) x 1762 drivers/gpu/drm/radeon/r600d.h #define G_008010_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x1F) x 1763 drivers/gpu/drm/radeon/r600d.h #define G_008010_CP_RQ_PENDING(x) (((x) >> 6) & 1) x 1764 drivers/gpu/drm/radeon/r600d.h #define G_008010_CF_RQ_PENDING(x) (((x) >> 7) & 1) x 1765 drivers/gpu/drm/radeon/r600d.h #define G_008010_PF_RQ_PENDING(x) (((x) >> 8) & 1) x 1766 drivers/gpu/drm/radeon/r600d.h #define G_008010_GRBM_EE_BUSY(x) (((x) >> 10) & 1) x 1767 drivers/gpu/drm/radeon/r600d.h #define G_008010_VC_BUSY(x) (((x) >> 11) & 1) x 1768 drivers/gpu/drm/radeon/r600d.h #define G_008010_DB03_CLEAN(x) (((x) >> 12) & 1) x 1769 drivers/gpu/drm/radeon/r600d.h #define G_008010_CB03_CLEAN(x) (((x) >> 13) & 1) x 1770 drivers/gpu/drm/radeon/r600d.h #define G_008010_TA_BUSY(x) (((x) >> 14) & 1) x 1771 drivers/gpu/drm/radeon/r600d.h #define G_008010_VGT_BUSY_NO_DMA(x) (((x) >> 16) & 1) x 1772 drivers/gpu/drm/radeon/r600d.h #define G_008010_VGT_BUSY(x) (((x) >> 17) & 1) x 1773 drivers/gpu/drm/radeon/r600d.h #define G_008010_TA03_BUSY(x) (((x) >> 18) & 1) x 1774 drivers/gpu/drm/radeon/r600d.h #define G_008010_TC_BUSY(x) (((x) >> 19) & 1) x 1775 drivers/gpu/drm/radeon/r600d.h #define G_008010_SX_BUSY(x) (((x) >> 20) & 1) x 1776 drivers/gpu/drm/radeon/r600d.h #define G_008010_SH_BUSY(x) (((x) >> 21) & 1) x 1777 drivers/gpu/drm/radeon/r600d.h #define G_008010_SPI03_BUSY(x) (((x) >> 22) & 1) x 1778 drivers/gpu/drm/radeon/r600d.h #define G_008010_SMX_BUSY(x) (((x) >> 23) & 1) x 1779 drivers/gpu/drm/radeon/r600d.h #define G_008010_SC_BUSY(x) (((x) >> 24) & 1) x 1780 drivers/gpu/drm/radeon/r600d.h #define G_008010_PA_BUSY(x) (((x) >> 25) & 1) x 1781 drivers/gpu/drm/radeon/r600d.h #define G_008010_DB03_BUSY(x) (((x) >> 26) & 1) x 1782 drivers/gpu/drm/radeon/r600d.h #define G_008010_CR_BUSY(x) (((x) >> 27) & 1) x 1783 drivers/gpu/drm/radeon/r600d.h #define G_008010_CP_COHERENCY_BUSY(x) (((x) >> 28) & 1) x 1784 drivers/gpu/drm/radeon/r600d.h #define G_008010_CP_BUSY(x) (((x) >> 29) & 1) x 1785 drivers/gpu/drm/radeon/r600d.h #define G_008010_CB03_BUSY(x) (((x) >> 30) & 1) x 1786 drivers/gpu/drm/radeon/r600d.h #define G_008010_GUI_ACTIVE(x) (((x) >> 31) & 1) x 1788 drivers/gpu/drm/radeon/r600d.h #define S_008014_CR_CLEAN(x) (((x) & 1) << 0) x 1789 drivers/gpu/drm/radeon/r600d.h #define S_008014_SMX_CLEAN(x) (((x) & 1) << 1) x 1790 drivers/gpu/drm/radeon/r600d.h #define S_008014_SPI0_BUSY(x) (((x) & 1) << 8) x 1791 drivers/gpu/drm/radeon/r600d.h #define S_008014_SPI1_BUSY(x) (((x) & 1) << 9) x 1792 drivers/gpu/drm/radeon/r600d.h #define S_008014_SPI2_BUSY(x) (((x) & 1) << 10) x 1793 drivers/gpu/drm/radeon/r600d.h #define S_008014_SPI3_BUSY(x) (((x) & 1) << 11) x 1794 drivers/gpu/drm/radeon/r600d.h #define S_008014_TA0_BUSY(x) (((x) & 1) << 12) x 1795 drivers/gpu/drm/radeon/r600d.h #define S_008014_TA1_BUSY(x) (((x) & 1) << 13) x 1796 drivers/gpu/drm/radeon/r600d.h #define S_008014_TA2_BUSY(x) (((x) & 1) << 14) x 1797 drivers/gpu/drm/radeon/r600d.h #define S_008014_TA3_BUSY(x) (((x) & 1) << 15) x 1798 drivers/gpu/drm/radeon/r600d.h #define S_008014_DB0_BUSY(x) (((x) & 1) << 16) x 1799 drivers/gpu/drm/radeon/r600d.h #define S_008014_DB1_BUSY(x) (((x) & 1) << 17) x 1800 drivers/gpu/drm/radeon/r600d.h #define S_008014_DB2_BUSY(x) (((x) & 1) << 18) x 1801 drivers/gpu/drm/radeon/r600d.h #define S_008014_DB3_BUSY(x) (((x) & 1) << 19) x 1802 drivers/gpu/drm/radeon/r600d.h #define S_008014_CB0_BUSY(x) (((x) & 1) << 20) x 1803 drivers/gpu/drm/radeon/r600d.h #define S_008014_CB1_BUSY(x) (((x) & 1) << 21) x 1804 drivers/gpu/drm/radeon/r600d.h #define S_008014_CB2_BUSY(x) (((x) & 1) << 22) x 1805 drivers/gpu/drm/radeon/r600d.h #define S_008014_CB3_BUSY(x) (((x) & 1) << 23) x 1806 drivers/gpu/drm/radeon/r600d.h #define G_008014_CR_CLEAN(x) (((x) >> 0) & 1) x 1807 drivers/gpu/drm/radeon/r600d.h #define G_008014_SMX_CLEAN(x) (((x) >> 1) & 1) x 1808 drivers/gpu/drm/radeon/r600d.h #define G_008014_SPI0_BUSY(x) (((x) >> 8) & 1) x 1809 drivers/gpu/drm/radeon/r600d.h #define G_008014_SPI1_BUSY(x) (((x) >> 9) & 1) x 1810 drivers/gpu/drm/radeon/r600d.h #define G_008014_SPI2_BUSY(x) (((x) >> 10) & 1) x 1811 drivers/gpu/drm/radeon/r600d.h #define G_008014_SPI3_BUSY(x) (((x) >> 11) & 1) x 1812 drivers/gpu/drm/radeon/r600d.h #define G_008014_TA0_BUSY(x) (((x) >> 12) & 1) x 1813 drivers/gpu/drm/radeon/r600d.h #define G_008014_TA1_BUSY(x) (((x) >> 13) & 1) x 1814 drivers/gpu/drm/radeon/r600d.h #define G_008014_TA2_BUSY(x) (((x) >> 14) & 1) x 1815 drivers/gpu/drm/radeon/r600d.h #define G_008014_TA3_BUSY(x) (((x) >> 15) & 1) x 1816 drivers/gpu/drm/radeon/r600d.h #define G_008014_DB0_BUSY(x) (((x) >> 16) & 1) x 1817 drivers/gpu/drm/radeon/r600d.h #define G_008014_DB1_BUSY(x) (((x) >> 17) & 1) x 1818 drivers/gpu/drm/radeon/r600d.h #define G_008014_DB2_BUSY(x) (((x) >> 18) & 1) x 1819 drivers/gpu/drm/radeon/r600d.h #define G_008014_DB3_BUSY(x) (((x) >> 19) & 1) x 1820 drivers/gpu/drm/radeon/r600d.h #define G_008014_CB0_BUSY(x) (((x) >> 20) & 1) x 1821 drivers/gpu/drm/radeon/r600d.h #define G_008014_CB1_BUSY(x) (((x) >> 21) & 1) x 1822 drivers/gpu/drm/radeon/r600d.h #define G_008014_CB2_BUSY(x) (((x) >> 22) & 1) x 1823 drivers/gpu/drm/radeon/r600d.h #define G_008014_CB3_BUSY(x) (((x) >> 23) & 1) x 1825 drivers/gpu/drm/radeon/r600d.h #define G_000E50_RLC_RQ_PENDING(x) (((x) >> 3) & 1) x 1826 drivers/gpu/drm/radeon/r600d.h #define G_000E50_RCU_RQ_PENDING(x) (((x) >> 4) & 1) x 1827 drivers/gpu/drm/radeon/r600d.h #define G_000E50_GRBM_RQ_PENDING(x) (((x) >> 5) & 1) x 1828 drivers/gpu/drm/radeon/r600d.h #define G_000E50_HI_RQ_PENDING(x) (((x) >> 6) & 1) x 1829 drivers/gpu/drm/radeon/r600d.h #define G_000E50_IO_EXTERN_SIGNAL(x) (((x) >> 7) & 1) x 1830 drivers/gpu/drm/radeon/r600d.h #define G_000E50_VMC_BUSY(x) (((x) >> 8) & 1) x 1831 drivers/gpu/drm/radeon/r600d.h #define G_000E50_MCB_BUSY(x) (((x) >> 9) & 1) x 1832 drivers/gpu/drm/radeon/r600d.h #define G_000E50_MCDZ_BUSY(x) (((x) >> 10) & 1) x 1833 drivers/gpu/drm/radeon/r600d.h #define G_000E50_MCDY_BUSY(x) (((x) >> 11) & 1) x 1834 drivers/gpu/drm/radeon/r600d.h #define G_000E50_MCDX_BUSY(x) (((x) >> 12) & 1) x 1835 drivers/gpu/drm/radeon/r600d.h #define G_000E50_MCDW_BUSY(x) (((x) >> 13) & 1) x 1836 drivers/gpu/drm/radeon/r600d.h #define G_000E50_SEM_BUSY(x) (((x) >> 14) & 1) x 1837 drivers/gpu/drm/radeon/r600d.h #define G_000E50_RLC_BUSY(x) (((x) >> 15) & 1) x 1838 drivers/gpu/drm/radeon/r600d.h #define G_000E50_IH_BUSY(x) (((x) >> 17) & 1) x 1839 drivers/gpu/drm/radeon/r600d.h #define G_000E50_BIF_BUSY(x) (((x) >> 29) & 1) x 1841 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_BIF(x) (((x) & 1) << 1) x 1842 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_CG(x) (((x) & 1) << 2) x 1843 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_CMC(x) (((x) & 1) << 3) x 1844 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_CSC(x) (((x) & 1) << 4) x 1845 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_DC(x) (((x) & 1) << 5) x 1846 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_GRBM(x) (((x) & 1) << 8) x 1847 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_HDP(x) (((x) & 1) << 9) x 1848 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_IH(x) (((x) & 1) << 10) x 1849 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_MC(x) (((x) & 1) << 11) x 1850 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_RLC(x) (((x) & 1) << 13) x 1851 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_ROM(x) (((x) & 1) << 14) x 1852 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_SEM(x) (((x) & 1) << 15) x 1853 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_TSC(x) (((x) & 1) << 16) x 1854 drivers/gpu/drm/radeon/r600d.h #define S_000E60_SOFT_RESET_VMC(x) (((x) & 1) << 17) x 1859 drivers/gpu/drm/radeon/r600d.h #define S_028C04_MSAA_NUM_SAMPLES(x) (((x) & 0x3) << 0) x 1860 drivers/gpu/drm/radeon/r600d.h #define G_028C04_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x3) x 1862 drivers/gpu/drm/radeon/r600d.h #define S_028C04_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4) x 1863 drivers/gpu/drm/radeon/r600d.h #define G_028C04_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) x 1865 drivers/gpu/drm/radeon/r600d.h #define S_028C04_MAX_SAMPLE_DIST(x) (((x) & 0xF) << 13) x 1866 drivers/gpu/drm/radeon/r600d.h #define G_028C04_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0xF) x 1869 drivers/gpu/drm/radeon/r600d.h #define S_0280E0_BASE_256B(x) (((x) & 0xFFFFFFFF) << 0) x 1870 drivers/gpu/drm/radeon/r600d.h #define G_0280E0_BASE_256B(x) (((x) >> 0) & 0xFFFFFFFF) x 1880 drivers/gpu/drm/radeon/r600d.h #define S_0280C0_BASE_256B(x) (((x) & 0xFFFFFFFF) << 0) x 1881 drivers/gpu/drm/radeon/r600d.h #define G_0280C0_BASE_256B(x) (((x) >> 0) & 0xFFFFFFFF) x 1891 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_ENDIAN(x) (((x) & 0x3) << 0) x 1892 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_ENDIAN(x) (((x) >> 0) & 0x3) x 1894 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_FORMAT(x) (((x) & 0x3F) << 2) x 1895 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_FORMAT(x) (((x) >> 2) & 0x3F) x 1931 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_ARRAY_MODE(x) (((x) & 0xF) << 8) x 1932 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_ARRAY_MODE(x) (((x) >> 8) & 0xF) x 1938 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_NUMBER_TYPE(x) (((x) & 0x7) << 12) x 1939 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_NUMBER_TYPE(x) (((x) >> 12) & 0x7) x 1941 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_READ_SIZE(x) (((x) & 0x1) << 15) x 1942 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_READ_SIZE(x) (((x) >> 15) & 0x1) x 1944 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_COMP_SWAP(x) (((x) & 0x3) << 16) x 1945 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_COMP_SWAP(x) (((x) >> 16) & 0x3) x 1947 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_TILE_MODE(x) (((x) & 0x3) << 18) x 1948 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_TILE_MODE(x) (((x) >> 18) & 0x3) x 1953 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_BLEND_CLAMP(x) (((x) & 0x1) << 20) x 1954 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_BLEND_CLAMP(x) (((x) >> 20) & 0x1) x 1956 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_CLEAR_COLOR(x) (((x) & 0x1) << 21) x 1957 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_CLEAR_COLOR(x) (((x) >> 21) & 0x1) x 1959 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_BLEND_BYPASS(x) (((x) & 0x1) << 22) x 1960 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_BLEND_BYPASS(x) (((x) >> 22) & 0x1) x 1962 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_BLEND_FLOAT32(x) (((x) & 0x1) << 23) x 1963 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_BLEND_FLOAT32(x) (((x) >> 23) & 0x1) x 1965 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_SIMPLE_FLOAT(x) (((x) & 0x1) << 24) x 1966 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_SIMPLE_FLOAT(x) (((x) >> 24) & 0x1) x 1968 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_ROUND_MODE(x) (((x) & 0x1) << 25) x 1969 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_ROUND_MODE(x) (((x) >> 25) & 0x1) x 1971 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_TILE_COMPACT(x) (((x) & 0x1) << 26) x 1972 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_TILE_COMPACT(x) (((x) >> 26) & 0x1) x 1974 drivers/gpu/drm/radeon/r600d.h #define S_0280A0_SOURCE_FORMAT(x) (((x) & 0x1) << 27) x 1975 drivers/gpu/drm/radeon/r600d.h #define G_0280A0_SOURCE_FORMAT(x) (((x) >> 27) & 0x1) x 1985 drivers/gpu/drm/radeon/r600d.h #define S_028060_PITCH_TILE_MAX(x) (((x) & 0x3FF) << 0) x 1986 drivers/gpu/drm/radeon/r600d.h #define G_028060_PITCH_TILE_MAX(x) (((x) >> 0) & 0x3FF) x 1988 drivers/gpu/drm/radeon/r600d.h #define S_028060_SLICE_TILE_MAX(x) (((x) & 0xFFFFF) << 10) x 1989 drivers/gpu/drm/radeon/r600d.h #define G_028060_SLICE_TILE_MAX(x) (((x) >> 10) & 0xFFFFF) x 1999 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET0_ENABLE(x) (((x) & 0xF) << 0) x 2000 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0xF) x 2002 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET1_ENABLE(x) (((x) & 0xF) << 4) x 2003 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0xF) x 2005 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET2_ENABLE(x) (((x) & 0xF) << 8) x 2006 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0xF) x 2008 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET3_ENABLE(x) (((x) & 0xF) << 12) x 2009 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0xF) x 2011 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET4_ENABLE(x) (((x) & 0xF) << 16) x 2012 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0xF) x 2014 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET5_ENABLE(x) (((x) & 0xF) << 20) x 2015 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0xF) x 2017 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET6_ENABLE(x) (((x) & 0xF) << 24) x 2018 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0xF) x 2020 drivers/gpu/drm/radeon/r600d.h #define S_028238_TARGET7_ENABLE(x) (((x) & 0xF) << 28) x 2021 drivers/gpu/drm/radeon/r600d.h #define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0xF) x 2024 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT0_ENABLE(x) (((x) & 0xF) << 0) x 2025 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0xF) x 2027 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT1_ENABLE(x) (((x) & 0xF) << 4) x 2028 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0xF) x 2030 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT2_ENABLE(x) (((x) & 0xF) << 8) x 2031 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0xF) x 2033 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT3_ENABLE(x) (((x) & 0xF) << 12) x 2034 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0xF) x 2036 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT4_ENABLE(x) (((x) & 0xF) << 16) x 2037 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0xF) x 2039 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT5_ENABLE(x) (((x) & 0xF) << 20) x 2040 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0xF) x 2042 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT6_ENABLE(x) (((x) & 0xF) << 24) x 2043 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0xF) x 2045 drivers/gpu/drm/radeon/r600d.h #define S_02823C_OUTPUT7_ENABLE(x) (((x) & 0xF) << 28) x 2046 drivers/gpu/drm/radeon/r600d.h #define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0xF) x 2049 drivers/gpu/drm/radeon/r600d.h #define S_028AB0_STREAMOUT(x) (((x) & 0x1) << 0) x 2050 drivers/gpu/drm/radeon/r600d.h #define G_028AB0_STREAMOUT(x) (((x) >> 0) & 0x1) x 2053 drivers/gpu/drm/radeon/r600d.h #define S_028B20_BUFFER_0_EN(x) (((x) & 0x1) << 0) x 2054 drivers/gpu/drm/radeon/r600d.h #define G_028B20_BUFFER_0_EN(x) (((x) >> 0) & 0x1) x 2056 drivers/gpu/drm/radeon/r600d.h #define S_028B20_BUFFER_1_EN(x) (((x) & 0x1) << 1) x 2057 drivers/gpu/drm/radeon/r600d.h #define G_028B20_BUFFER_1_EN(x) (((x) >> 1) & 0x1) x 2059 drivers/gpu/drm/radeon/r600d.h #define S_028B20_BUFFER_2_EN(x) (((x) & 0x1) << 2) x 2060 drivers/gpu/drm/radeon/r600d.h #define G_028B20_BUFFER_2_EN(x) (((x) >> 2) & 0x1) x 2062 drivers/gpu/drm/radeon/r600d.h #define S_028B20_BUFFER_3_EN(x) (((x) & 0x1) << 3) x 2063 drivers/gpu/drm/radeon/r600d.h #define G_028B20_BUFFER_3_EN(x) (((x) >> 3) & 0x1) x 2065 drivers/gpu/drm/radeon/r600d.h #define S_028B20_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2066 drivers/gpu/drm/radeon/r600d.h #define G_028B20_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2069 drivers/gpu/drm/radeon/r600d.h #define S_038000_DIM(x) (((x) & 0x7) << 0) x 2070 drivers/gpu/drm/radeon/r600d.h #define G_038000_DIM(x) (((x) >> 0) & 0x7) x 2080 drivers/gpu/drm/radeon/r600d.h #define S_038000_TILE_MODE(x) (((x) & 0xF) << 3) x 2081 drivers/gpu/drm/radeon/r600d.h #define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF) x 2087 drivers/gpu/drm/radeon/r600d.h #define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7) x 2088 drivers/gpu/drm/radeon/r600d.h #define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1) x 2090 drivers/gpu/drm/radeon/r600d.h #define S_038000_PITCH(x) (((x) & 0x7FF) << 8) x 2091 drivers/gpu/drm/radeon/r600d.h #define G_038000_PITCH(x) (((x) >> 8) & 0x7FF) x 2093 drivers/gpu/drm/radeon/r600d.h #define S_038000_TEX_WIDTH(x) (((x) & 0x1FFF) << 19) x 2094 drivers/gpu/drm/radeon/r600d.h #define G_038000_TEX_WIDTH(x) (((x) >> 19) & 0x1FFF) x 2097 drivers/gpu/drm/radeon/r600d.h #define S_038004_TEX_HEIGHT(x) (((x) & 0x1FFF) << 0) x 2098 drivers/gpu/drm/radeon/r600d.h #define G_038004_TEX_HEIGHT(x) (((x) >> 0) & 0x1FFF) x 2100 drivers/gpu/drm/radeon/r600d.h #define S_038004_TEX_DEPTH(x) (((x) & 0x1FFF) << 13) x 2101 drivers/gpu/drm/radeon/r600d.h #define G_038004_TEX_DEPTH(x) (((x) >> 13) & 0x1FFF) x 2103 drivers/gpu/drm/radeon/r600d.h #define S_038004_DATA_FORMAT(x) (((x) & 0x3F) << 26) x 2104 drivers/gpu/drm/radeon/r600d.h #define G_038004_DATA_FORMAT(x) (((x) >> 26) & 0x3F) x 2160 drivers/gpu/drm/radeon/r600d.h #define S_038010_FORMAT_COMP_X(x) (((x) & 0x3) << 0) x 2161 drivers/gpu/drm/radeon/r600d.h #define G_038010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3) x 2163 drivers/gpu/drm/radeon/r600d.h #define S_038010_FORMAT_COMP_Y(x) (((x) & 0x3) << 2) x 2164 drivers/gpu/drm/radeon/r600d.h #define G_038010_FORMAT_COMP_Y(x) (((x) >> 2) & 0x3) x 2166 drivers/gpu/drm/radeon/r600d.h #define S_038010_FORMAT_COMP_Z(x) (((x) & 0x3) << 4) x 2167 drivers/gpu/drm/radeon/r600d.h #define G_038010_FORMAT_COMP_Z(x) (((x) >> 4) & 0x3) x 2169 drivers/gpu/drm/radeon/r600d.h #define S_038010_FORMAT_COMP_W(x) (((x) & 0x3) << 6) x 2170 drivers/gpu/drm/radeon/r600d.h #define G_038010_FORMAT_COMP_W(x) (((x) >> 6) & 0x3) x 2172 drivers/gpu/drm/radeon/r600d.h #define S_038010_NUM_FORMAT_ALL(x) (((x) & 0x3) << 8) x 2173 drivers/gpu/drm/radeon/r600d.h #define G_038010_NUM_FORMAT_ALL(x) (((x) >> 8) & 0x3) x 2175 drivers/gpu/drm/radeon/r600d.h #define S_038010_SRF_MODE_ALL(x) (((x) & 0x1) << 10) x 2176 drivers/gpu/drm/radeon/r600d.h #define G_038010_SRF_MODE_ALL(x) (((x) >> 10) & 0x1) x 2178 drivers/gpu/drm/radeon/r600d.h #define S_038010_FORCE_DEGAMMA(x) (((x) & 0x1) << 11) x 2179 drivers/gpu/drm/radeon/r600d.h #define G_038010_FORCE_DEGAMMA(x) (((x) >> 11) & 0x1) x 2181 drivers/gpu/drm/radeon/r600d.h #define S_038010_ENDIAN_SWAP(x) (((x) & 0x3) << 12) x 2182 drivers/gpu/drm/radeon/r600d.h #define G_038010_ENDIAN_SWAP(x) (((x) >> 12) & 0x3) x 2184 drivers/gpu/drm/radeon/r600d.h #define S_038010_REQUEST_SIZE(x) (((x) & 0x3) << 14) x 2185 drivers/gpu/drm/radeon/r600d.h #define G_038010_REQUEST_SIZE(x) (((x) >> 14) & 0x3) x 2187 drivers/gpu/drm/radeon/r600d.h #define S_038010_DST_SEL_X(x) (((x) & 0x7) << 16) x 2188 drivers/gpu/drm/radeon/r600d.h #define G_038010_DST_SEL_X(x) (((x) >> 16) & 0x7) x 2190 drivers/gpu/drm/radeon/r600d.h #define S_038010_DST_SEL_Y(x) (((x) & 0x7) << 19) x 2191 drivers/gpu/drm/radeon/r600d.h #define G_038010_DST_SEL_Y(x) (((x) >> 19) & 0x7) x 2193 drivers/gpu/drm/radeon/r600d.h #define S_038010_DST_SEL_Z(x) (((x) & 0x7) << 22) x 2194 drivers/gpu/drm/radeon/r600d.h #define G_038010_DST_SEL_Z(x) (((x) >> 22) & 0x7) x 2196 drivers/gpu/drm/radeon/r600d.h #define S_038010_DST_SEL_W(x) (((x) & 0x7) << 25) x 2197 drivers/gpu/drm/radeon/r600d.h #define G_038010_DST_SEL_W(x) (((x) >> 25) & 0x7) x 2205 drivers/gpu/drm/radeon/r600d.h #define S_038010_BASE_LEVEL(x) (((x) & 0xF) << 28) x 2206 drivers/gpu/drm/radeon/r600d.h #define G_038010_BASE_LEVEL(x) (((x) >> 28) & 0xF) x 2209 drivers/gpu/drm/radeon/r600d.h #define S_038014_LAST_LEVEL(x) (((x) & 0xF) << 0) x 2210 drivers/gpu/drm/radeon/r600d.h #define G_038014_LAST_LEVEL(x) (((x) >> 0) & 0xF) x 2212 drivers/gpu/drm/radeon/r600d.h #define S_038014_BASE_ARRAY(x) (((x) & 0x1FFF) << 4) x 2213 drivers/gpu/drm/radeon/r600d.h #define G_038014_BASE_ARRAY(x) (((x) >> 4) & 0x1FFF) x 2215 drivers/gpu/drm/radeon/r600d.h #define S_038014_LAST_ARRAY(x) (((x) & 0x1FFF) << 17) x 2216 drivers/gpu/drm/radeon/r600d.h #define G_038014_LAST_ARRAY(x) (((x) >> 17) & 0x1FFF) x 2219 drivers/gpu/drm/radeon/r600d.h #define S_0288A8_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2220 drivers/gpu/drm/radeon/r600d.h #define G_0288A8_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2223 drivers/gpu/drm/radeon/r600d.h #define S_008C44_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2224 drivers/gpu/drm/radeon/r600d.h #define G_008C44_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2227 drivers/gpu/drm/radeon/r600d.h #define S_0288B0_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2228 drivers/gpu/drm/radeon/r600d.h #define G_0288B0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2231 drivers/gpu/drm/radeon/r600d.h #define S_008C54_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2232 drivers/gpu/drm/radeon/r600d.h #define G_008C54_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2235 drivers/gpu/drm/radeon/r600d.h #define S_0288C0_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2236 drivers/gpu/drm/radeon/r600d.h #define G_0288C0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2239 drivers/gpu/drm/radeon/r600d.h #define S_008C74_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2240 drivers/gpu/drm/radeon/r600d.h #define G_008C74_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2243 drivers/gpu/drm/radeon/r600d.h #define S_0288B4_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2244 drivers/gpu/drm/radeon/r600d.h #define G_0288B4_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2247 drivers/gpu/drm/radeon/r600d.h #define S_008C5C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2248 drivers/gpu/drm/radeon/r600d.h #define G_008C5C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2251 drivers/gpu/drm/radeon/r600d.h #define S_0288AC_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2252 drivers/gpu/drm/radeon/r600d.h #define G_0288AC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2255 drivers/gpu/drm/radeon/r600d.h #define S_008C4C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2256 drivers/gpu/drm/radeon/r600d.h #define G_008C4C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2259 drivers/gpu/drm/radeon/r600d.h #define S_0288BC_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2260 drivers/gpu/drm/radeon/r600d.h #define G_0288BC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2263 drivers/gpu/drm/radeon/r600d.h #define S_008C6C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2264 drivers/gpu/drm/radeon/r600d.h #define G_008C6C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2267 drivers/gpu/drm/radeon/r600d.h #define S_0288C4_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2268 drivers/gpu/drm/radeon/r600d.h #define G_0288C4_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2271 drivers/gpu/drm/radeon/r600d.h #define S_008C7C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2272 drivers/gpu/drm/radeon/r600d.h #define G_008C7C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2275 drivers/gpu/drm/radeon/r600d.h #define S_0288B8_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2276 drivers/gpu/drm/radeon/r600d.h #define G_0288B8_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2279 drivers/gpu/drm/radeon/r600d.h #define S_008C64_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) x 2280 drivers/gpu/drm/radeon/r600d.h #define G_008C64_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 2283 drivers/gpu/drm/radeon/r600d.h #define S_0288C8_ITEMSIZE(x) (((x) & 0x7FFF) << 0) x 2284 drivers/gpu/drm/radeon/r600d.h #define G_0288C8_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) x 2287 drivers/gpu/drm/radeon/r600d.h #define S_028010_FORMAT(x) (((x) & 0x7) << 0) x 2288 drivers/gpu/drm/radeon/r600d.h #define G_028010_FORMAT(x) (((x) >> 0) & 0x7) x 2298 drivers/gpu/drm/radeon/r600d.h #define S_028010_READ_SIZE(x) (((x) & 0x1) << 3) x 2299 drivers/gpu/drm/radeon/r600d.h #define G_028010_READ_SIZE(x) (((x) >> 3) & 0x1) x 2301 drivers/gpu/drm/radeon/r600d.h #define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15) x 2302 drivers/gpu/drm/radeon/r600d.h #define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF) x 2306 drivers/gpu/drm/radeon/r600d.h #define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25) x 2307 drivers/gpu/drm/radeon/r600d.h #define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1) x 2309 drivers/gpu/drm/radeon/r600d.h #define S_028010_TILE_COMPACT(x) (((x) & 0x1) << 26) x 2310 drivers/gpu/drm/radeon/r600d.h #define G_028010_TILE_COMPACT(x) (((x) >> 26) & 0x1) x 2312 drivers/gpu/drm/radeon/r600d.h #define S_028010_ZRANGE_PRECISION(x) (((x) & 0x1) << 31) x 2313 drivers/gpu/drm/radeon/r600d.h #define G_028010_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) x 2316 drivers/gpu/drm/radeon/r600d.h #define S_028000_PITCH_TILE_MAX(x) (((x) & 0x3FF) << 0) x 2317 drivers/gpu/drm/radeon/r600d.h #define G_028000_PITCH_TILE_MAX(x) (((x) >> 0) & 0x3FF) x 2319 drivers/gpu/drm/radeon/r600d.h #define S_028000_SLICE_TILE_MAX(x) (((x) & 0xFFFFF) << 10) x 2320 drivers/gpu/drm/radeon/r600d.h #define G_028000_SLICE_TILE_MAX(x) (((x) >> 10) & 0xFFFFF) x 2323 drivers/gpu/drm/radeon/r600d.h #define S_028004_SLICE_START(x) (((x) & 0x7FF) << 0) x 2324 drivers/gpu/drm/radeon/r600d.h #define G_028004_SLICE_START(x) (((x) >> 0) & 0x7FF) x 2326 drivers/gpu/drm/radeon/r600d.h #define S_028004_SLICE_MAX(x) (((x) & 0x7FF) << 13) x 2327 drivers/gpu/drm/radeon/r600d.h #define G_028004_SLICE_MAX(x) (((x) >> 13) & 0x7FF) x 2330 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0) x 2331 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) x 2333 drivers/gpu/drm/radeon/r600d.h #define S_028800_Z_ENABLE(x) (((x) & 0x1) << 1) x 2334 drivers/gpu/drm/radeon/r600d.h #define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) x 2336 drivers/gpu/drm/radeon/r600d.h #define S_028800_Z_WRITE_ENABLE(x) (((x) & 0x1) << 2) x 2337 drivers/gpu/drm/radeon/r600d.h #define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) x 2339 drivers/gpu/drm/radeon/r600d.h #define S_028800_ZFUNC(x) (((x) & 0x7) << 4) x 2340 drivers/gpu/drm/radeon/r600d.h #define G_028800_ZFUNC(x) (((x) >> 4) & 0x7) x 2342 drivers/gpu/drm/radeon/r600d.h #define S_028800_BACKFACE_ENABLE(x) (((x) & 0x1) << 7) x 2343 drivers/gpu/drm/radeon/r600d.h #define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) x 2345 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILFUNC(x) (((x) & 0x7) << 8) x 2346 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) x 2348 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILFAIL(x) (((x) & 0x7) << 11) x 2349 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7) x 2351 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILZPASS(x) (((x) & 0x7) << 14) x 2352 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7) x 2354 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILZFAIL(x) (((x) & 0x7) << 17) x 2355 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILZFAIL(x) (((x) >> 17) & 0x7) x 2357 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILFUNC_BF(x) (((x) & 0x7) << 20) x 2358 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7) x 2360 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILFAIL_BF(x) (((x) & 0x7) << 23) x 2361 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILFAIL_BF(x) (((x) >> 23) & 0x7) x 2363 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILZPASS_BF(x) (((x) & 0x7) << 26) x 2364 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILZPASS_BF(x) (((x) >> 26) & 0x7) x 2366 drivers/gpu/drm/radeon/r600d.h #define S_028800_STENCILZFAIL_BF(x) (((x) & 0x7) << 29) x 2367 drivers/gpu/drm/radeon/r600d.h #define G_028800_STENCILZFAIL_BF(x) (((x) >> 29) & 0x7) x 116 drivers/gpu/drm/radeon/radeon_connectors.c crtc->x, crtc->y, crtc->primary->fb); x 144 drivers/gpu/drm/radeon/radeon_cursor.c static int radeon_cursor_move_locked(struct drm_crtc *crtc, int x, int y) x 151 drivers/gpu/drm/radeon/radeon_cursor.c radeon_crtc->cursor_x = x; x 156 drivers/gpu/drm/radeon/radeon_cursor.c x += crtc->x; x 160 drivers/gpu/drm/radeon/radeon_cursor.c if (x < 0) x 161 drivers/gpu/drm/radeon/radeon_cursor.c xorigin = min(-x, radeon_crtc->max_cursor_width - 1); x 166 drivers/gpu/drm/radeon/radeon_cursor.c x += crtc->x; x 169 drivers/gpu/drm/radeon/radeon_cursor.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); x 192 drivers/gpu/drm/radeon/radeon_cursor.c cursor_end = x + w; x 193 drivers/gpu/drm/radeon/radeon_cursor.c frame_end = crtc->x + crtc->mode.crtc_hdisplay; x 209 drivers/gpu/drm/radeon/radeon_cursor.c if (x <= (crtc->x - w) || y <= (crtc->y - radeon_crtc->cursor_height) || x 210 drivers/gpu/drm/radeon/radeon_cursor.c x >= (crtc->x + crtc->mode.hdisplay) || x 214 drivers/gpu/drm/radeon/radeon_cursor.c x += xorigin; x 218 drivers/gpu/drm/radeon/radeon_cursor.c WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset, (x << 16) | y); x 223 drivers/gpu/drm/radeon/radeon_cursor.c WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, (x << 16) | y); x 228 drivers/gpu/drm/radeon/radeon_cursor.c x -= crtc->x; x 240 drivers/gpu/drm/radeon/radeon_cursor.c | (x << 16) x 265 drivers/gpu/drm/radeon/radeon_cursor.c int x, int y) x 270 drivers/gpu/drm/radeon/radeon_cursor.c ret = radeon_cursor_move_locked(crtc, x, y); x 332 drivers/gpu/drm/radeon/radeon_cursor.c int x, y; x 334 drivers/gpu/drm/radeon/radeon_cursor.c x = radeon_crtc->cursor_x + radeon_crtc->cursor_hot_x - hot_x; x 342 drivers/gpu/drm/radeon/radeon_cursor.c radeon_cursor_move_locked(crtc, x, y); x 552 drivers/gpu/drm/radeon/radeon_display.c int tile_addr = (((crtc->y >> 3) * pitch_pixels + crtc->x) >> (8 - byteshift)) << 11; x 553 drivers/gpu/drm/radeon/radeon_display.c base += tile_addr + ((crtc->x << byteshift) % 256) + ((crtc->y % 8) << 8); x 556 drivers/gpu/drm/radeon/radeon_display.c int offset = crtc->y * pitch_pixels + crtc->x; x 40 drivers/gpu/drm/radeon/radeon_dp_auxch.c #define AUX_SW_REPLY_GET_BYTE_COUNT(x) (((x) >> 24) & 0x1f) x 172 drivers/gpu/drm/radeon/radeon_dp_mst.c uint32_t x = drm_fixp2int(avg_time_slots_per_mtp); x 173 drivers/gpu/drm/radeon/radeon_dp_mst.c uint32_t y = drm_fixp2int_ceil((avg_time_slots_per_mtp - x) << 26); x 175 drivers/gpu/drm/radeon/radeon_dp_mst.c val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y); x 360 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 363 drivers/gpu/drm/radeon/radeon_legacy_crtc.c return radeon_crtc_do_set_base(crtc, old_fb, x, y, 0); x 368 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int x, int y, enum mode_set_atomic state) x 370 drivers/gpu/drm/radeon/radeon_legacy_crtc.c return radeon_crtc_do_set_base(crtc, fb, x, y, 1); x 375 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int x, int y, int atomic) x 501 drivers/gpu/drm/radeon/radeon_legacy_crtc.c crtc_tile_x0_y0 = x | (y << 16); x 505 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int tile_addr = (((y >> 3) * pitch_pixels + x) >> (8 - byteshift)) << 11; x 506 drivers/gpu/drm/radeon/radeon_legacy_crtc.c base += tile_addr + ((x << byteshift) % 256) + ((y % 8) << 8); x 510 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int offset = y * pitch_pixels + x; x 1038 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int x, int y, struct drm_framebuffer *old_fb) x 1043 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_crtc_set_base(crtc, x, y, old_fb); x 46 drivers/gpu/drm/radeon/radeon_mode.h #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) x 47 drivers/gpu/drm/radeon/radeon_mode.h #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) x 48 drivers/gpu/drm/radeon/radeon_mode.h #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) x 846 drivers/gpu/drm/radeon/radeon_mode.h extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 850 drivers/gpu/drm/radeon/radeon_mode.h int x, int y, x 855 drivers/gpu/drm/radeon/radeon_mode.h int x, int y, x 859 drivers/gpu/drm/radeon/radeon_mode.h extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, x 863 drivers/gpu/drm/radeon/radeon_mode.h int x, int y, x 867 drivers/gpu/drm/radeon/radeon_mode.h int x, int y, int atomic); x 876 drivers/gpu/drm/radeon/radeon_mode.h int x, int y); x 919 drivers/gpu/drm/radeon/radeon_reg.h # define R300_HPD_SEL(x) ((x) << 13) x 1109 drivers/gpu/drm/radeon/radeon_reg.h # define R200_DVI_I2C_PIN_SEL(x) ((x) << 3) x 3317 drivers/gpu/drm/radeon/radeon_reg.h # define R600_RB_BUFSZ(x) ((x) << 0) x 3318 drivers/gpu/drm/radeon/radeon_reg.h # define R600_RB_BLKSZ(x) ((x) << 8) x 3539 drivers/gpu/drm/radeon/radeon_reg.h # define RADEON_RGB_ATTEN_SEL(x) ((x) << 24) x 3541 drivers/gpu/drm/radeon/radeon_reg.h # define RADEON_RGB_ATTEN_VAL(x) ((x) << 28) x 33 drivers/gpu/drm/radeon/rs100d.h #define S_00015C_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 34 drivers/gpu/drm/radeon/rs100d.h #define G_00015C_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 36 drivers/gpu/drm/radeon/rs100d.h #define S_00015C_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 37 drivers/gpu/drm/radeon/rs100d.h #define G_00015C_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 33 drivers/gpu/drm/radeon/rs400d.h #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 34 drivers/gpu/drm/radeon/rs400d.h #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 36 drivers/gpu/drm/radeon/rs400d.h #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 37 drivers/gpu/drm/radeon/rs400d.h #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 40 drivers/gpu/drm/radeon/rs400d.h #define S_00015C_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 41 drivers/gpu/drm/radeon/rs400d.h #define G_00015C_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 43 drivers/gpu/drm/radeon/rs400d.h #define S_00015C_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 44 drivers/gpu/drm/radeon/rs400d.h #define G_00015C_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 47 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 48 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 50 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 51 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 53 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 54 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 56 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 57 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 59 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 60 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 62 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 63 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 65 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 66 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 68 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 69 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 71 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 72 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 74 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) x 75 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) x 77 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) x 78 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) x 80 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 81 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 83 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 84 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 86 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 87 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 89 drivers/gpu/drm/radeon/rs400d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 90 drivers/gpu/drm/radeon/rs400d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 93 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 94 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 96 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 97 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 99 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 100 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 102 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 103 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 105 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 106 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 108 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 109 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 111 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 112 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 114 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 115 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 117 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 118 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 120 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 121 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 123 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 124 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 126 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 127 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 129 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 130 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 132 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) x 133 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) x 135 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 136 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 138 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 139 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 141 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 142 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 144 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 145 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 147 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) x 148 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) x 150 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) x 151 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) x 153 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) x 154 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) x 156 drivers/gpu/drm/radeon/rs400d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 157 drivers/gpu/drm/radeon/rs400d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 33 drivers/gpu/drm/radeon/rs600d.h #define S_000040_SCRATCH_INT_MASK(x) (((x) & 0x1) << 18) x 34 drivers/gpu/drm/radeon/rs600d.h #define G_000040_SCRATCH_INT_MASK(x) (((x) >> 18) & 0x1) x 36 drivers/gpu/drm/radeon/rs600d.h #define S_000040_GUI_IDLE_MASK(x) (((x) & 0x1) << 19) x 37 drivers/gpu/drm/radeon/rs600d.h #define G_000040_GUI_IDLE_MASK(x) (((x) >> 19) & 0x1) x 39 drivers/gpu/drm/radeon/rs600d.h #define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) x 40 drivers/gpu/drm/radeon/rs600d.h #define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) x 42 drivers/gpu/drm/radeon/rs600d.h #define S_000040_DMA_VIPH2_INT_EN(x) (((x) & 0x1) << 14) x 43 drivers/gpu/drm/radeon/rs600d.h #define G_000040_DMA_VIPH2_INT_EN(x) (((x) >> 14) & 0x1) x 45 drivers/gpu/drm/radeon/rs600d.h #define S_000040_DMA_VIPH3_INT_EN(x) (((x) & 0x1) << 15) x 46 drivers/gpu/drm/radeon/rs600d.h #define G_000040_DMA_VIPH3_INT_EN(x) (((x) >> 15) & 0x1) x 48 drivers/gpu/drm/radeon/rs600d.h #define S_000040_I2C_INT_EN(x) (((x) & 0x1) << 17) x 49 drivers/gpu/drm/radeon/rs600d.h #define G_000040_I2C_INT_EN(x) (((x) >> 17) & 0x1) x 51 drivers/gpu/drm/radeon/rs600d.h #define S_000040_GUI_IDLE(x) (((x) & 0x1) << 19) x 52 drivers/gpu/drm/radeon/rs600d.h #define G_000040_GUI_IDLE(x) (((x) >> 19) & 0x1) x 54 drivers/gpu/drm/radeon/rs600d.h #define S_000040_VIPH_INT_EN(x) (((x) & 0x1) << 24) x 55 drivers/gpu/drm/radeon/rs600d.h #define G_000040_VIPH_INT_EN(x) (((x) >> 24) & 0x1) x 57 drivers/gpu/drm/radeon/rs600d.h #define S_000040_SW_INT_EN(x) (((x) & 0x1) << 25) x 58 drivers/gpu/drm/radeon/rs600d.h #define G_000040_SW_INT_EN(x) (((x) >> 25) & 0x1) x 60 drivers/gpu/drm/radeon/rs600d.h #define S_000040_GEYSERVILLE(x) (((x) & 0x1) << 27) x 61 drivers/gpu/drm/radeon/rs600d.h #define G_000040_GEYSERVILLE(x) (((x) >> 27) & 0x1) x 63 drivers/gpu/drm/radeon/rs600d.h #define S_000040_HDCP_AUTHORIZED_INT(x) (((x) & 0x1) << 28) x 64 drivers/gpu/drm/radeon/rs600d.h #define G_000040_HDCP_AUTHORIZED_INT(x) (((x) >> 28) & 0x1) x 66 drivers/gpu/drm/radeon/rs600d.h #define S_000040_DVI_I2C_INT(x) (((x) & 0x1) << 29) x 67 drivers/gpu/drm/radeon/rs600d.h #define G_000040_DVI_I2C_INT(x) (((x) >> 29) & 0x1) x 69 drivers/gpu/drm/radeon/rs600d.h #define S_000040_GUIDMA(x) (((x) & 0x1) << 30) x 70 drivers/gpu/drm/radeon/rs600d.h #define G_000040_GUIDMA(x) (((x) >> 30) & 0x1) x 72 drivers/gpu/drm/radeon/rs600d.h #define S_000040_VIDDMA(x) (((x) & 0x1) << 31) x 73 drivers/gpu/drm/radeon/rs600d.h #define G_000040_VIDDMA(x) (((x) >> 31) & 0x1) x 76 drivers/gpu/drm/radeon/rs600d.h #define S_000044_DISPLAY_INT_STAT(x) (((x) & 0x1) << 0) x 77 drivers/gpu/drm/radeon/rs600d.h #define G_000044_DISPLAY_INT_STAT(x) (((x) >> 0) & 0x1) x 79 drivers/gpu/drm/radeon/rs600d.h #define S_000044_VGA_INT_STAT(x) (((x) & 0x1) << 1) x 80 drivers/gpu/drm/radeon/rs600d.h #define G_000044_VGA_INT_STAT(x) (((x) >> 1) & 0x1) x 82 drivers/gpu/drm/radeon/rs600d.h #define S_000044_CAP0_INT_ACTIVE(x) (((x) & 0x1) << 8) x 83 drivers/gpu/drm/radeon/rs600d.h #define G_000044_CAP0_INT_ACTIVE(x) (((x) >> 8) & 0x1) x 85 drivers/gpu/drm/radeon/rs600d.h #define S_000044_DMA_VIPH0_INT(x) (((x) & 0x1) << 12) x 86 drivers/gpu/drm/radeon/rs600d.h #define G_000044_DMA_VIPH0_INT(x) (((x) >> 12) & 0x1) x 88 drivers/gpu/drm/radeon/rs600d.h #define S_000044_DMA_VIPH1_INT(x) (((x) & 0x1) << 13) x 89 drivers/gpu/drm/radeon/rs600d.h #define G_000044_DMA_VIPH1_INT(x) (((x) >> 13) & 0x1) x 91 drivers/gpu/drm/radeon/rs600d.h #define S_000044_DMA_VIPH2_INT(x) (((x) & 0x1) << 14) x 92 drivers/gpu/drm/radeon/rs600d.h #define G_000044_DMA_VIPH2_INT(x) (((x) >> 14) & 0x1) x 94 drivers/gpu/drm/radeon/rs600d.h #define S_000044_DMA_VIPH3_INT(x) (((x) & 0x1) << 15) x 95 drivers/gpu/drm/radeon/rs600d.h #define G_000044_DMA_VIPH3_INT(x) (((x) >> 15) & 0x1) x 97 drivers/gpu/drm/radeon/rs600d.h #define S_000044_MC_PROBE_FAULT_STAT(x) (((x) & 0x1) << 16) x 98 drivers/gpu/drm/radeon/rs600d.h #define G_000044_MC_PROBE_FAULT_STAT(x) (((x) >> 16) & 0x1) x 100 drivers/gpu/drm/radeon/rs600d.h #define S_000044_I2C_INT(x) (((x) & 0x1) << 17) x 101 drivers/gpu/drm/radeon/rs600d.h #define G_000044_I2C_INT(x) (((x) >> 17) & 0x1) x 103 drivers/gpu/drm/radeon/rs600d.h #define S_000044_SCRATCH_INT_STAT(x) (((x) & 0x1) << 18) x 104 drivers/gpu/drm/radeon/rs600d.h #define G_000044_SCRATCH_INT_STAT(x) (((x) >> 18) & 0x1) x 106 drivers/gpu/drm/radeon/rs600d.h #define S_000044_GUI_IDLE_STAT(x) (((x) & 0x1) << 19) x 107 drivers/gpu/drm/radeon/rs600d.h #define G_000044_GUI_IDLE_STAT(x) (((x) >> 19) & 0x1) x 109 drivers/gpu/drm/radeon/rs600d.h #define S_000044_ATI_OVERDRIVE_INT_STAT(x) (((x) & 0x1) << 20) x 110 drivers/gpu/drm/radeon/rs600d.h #define G_000044_ATI_OVERDRIVE_INT_STAT(x) (((x) >> 20) & 0x1) x 112 drivers/gpu/drm/radeon/rs600d.h #define S_000044_MC_PROTECTION_FAULT_STAT(x) (((x) & 0x1) << 21) x 113 drivers/gpu/drm/radeon/rs600d.h #define G_000044_MC_PROTECTION_FAULT_STAT(x) (((x) >> 21) & 0x1) x 115 drivers/gpu/drm/radeon/rs600d.h #define S_000044_RBBM_READ_INT_STAT(x) (((x) & 0x1) << 22) x 116 drivers/gpu/drm/radeon/rs600d.h #define G_000044_RBBM_READ_INT_STAT(x) (((x) >> 22) & 0x1) x 118 drivers/gpu/drm/radeon/rs600d.h #define S_000044_CB_CONTEXT_SWITCH_STAT(x) (((x) & 0x1) << 23) x 119 drivers/gpu/drm/radeon/rs600d.h #define G_000044_CB_CONTEXT_SWITCH_STAT(x) (((x) >> 23) & 0x1) x 121 drivers/gpu/drm/radeon/rs600d.h #define S_000044_VIPH_INT(x) (((x) & 0x1) << 24) x 122 drivers/gpu/drm/radeon/rs600d.h #define G_000044_VIPH_INT(x) (((x) >> 24) & 0x1) x 124 drivers/gpu/drm/radeon/rs600d.h #define S_000044_SW_INT(x) (((x) & 0x1) << 25) x 125 drivers/gpu/drm/radeon/rs600d.h #define G_000044_SW_INT(x) (((x) >> 25) & 0x1) x 127 drivers/gpu/drm/radeon/rs600d.h #define S_000044_SW_INT_SET(x) (((x) & 0x1) << 26) x 128 drivers/gpu/drm/radeon/rs600d.h #define G_000044_SW_INT_SET(x) (((x) >> 26) & 0x1) x 130 drivers/gpu/drm/radeon/rs600d.h #define S_000044_IDCT_INT_STAT(x) (((x) & 0x1) << 27) x 131 drivers/gpu/drm/radeon/rs600d.h #define G_000044_IDCT_INT_STAT(x) (((x) >> 27) & 0x1) x 133 drivers/gpu/drm/radeon/rs600d.h #define S_000044_GUIDMA_STAT(x) (((x) & 0x1) << 30) x 134 drivers/gpu/drm/radeon/rs600d.h #define G_000044_GUIDMA_STAT(x) (((x) >> 30) & 0x1) x 136 drivers/gpu/drm/radeon/rs600d.h #define S_000044_VIDDMA_STAT(x) (((x) & 0x1) << 31) x 137 drivers/gpu/drm/radeon/rs600d.h #define G_000044_VIDDMA_STAT(x) (((x) >> 31) & 0x1) x 140 drivers/gpu/drm/radeon/rs600d.h #define S_00004C_BUS_MASTER_DIS(x) (((x) & 0x1) << 14) x 141 drivers/gpu/drm/radeon/rs600d.h #define G_00004C_BUS_MASTER_DIS(x) (((x) >> 14) & 0x1) x 143 drivers/gpu/drm/radeon/rs600d.h #define S_00004C_BUS_MSI_REARM(x) (((x) & 0x1) << 20) x 144 drivers/gpu/drm/radeon/rs600d.h #define G_00004C_BUS_MSI_REARM(x) (((x) >> 20) & 0x1) x 147 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_ADDR(x) (((x) & 0xFFFF) << 0) x 148 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_ADDR(x) (((x) >> 0) & 0xFFFF) x 150 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_SEQ_RBS_0(x) (((x) & 0x1) << 16) x 151 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_SEQ_RBS_0(x) (((x) >> 16) & 0x1) x 153 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_SEQ_RBS_1(x) (((x) & 0x1) << 17) x 154 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_SEQ_RBS_1(x) (((x) >> 17) & 0x1) x 156 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_SEQ_RBS_2(x) (((x) & 0x1) << 18) x 157 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_SEQ_RBS_2(x) (((x) >> 18) & 0x1) x 159 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_SEQ_RBS_3(x) (((x) & 0x1) << 19) x 160 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_SEQ_RBS_3(x) (((x) >> 19) & 0x1) x 162 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_AIC_RBS(x) (((x) & 0x1) << 20) x 163 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_AIC_RBS(x) (((x) >> 20) & 0x1) x 165 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_CITF_ARB0(x) (((x) & 0x1) << 21) x 166 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_CITF_ARB0(x) (((x) >> 21) & 0x1) x 168 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_CITF_ARB1(x) (((x) & 0x1) << 22) x 169 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_CITF_ARB1(x) (((x) >> 22) & 0x1) x 171 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_WR_EN(x) (((x) & 0x1) << 23) x 172 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_WR_EN(x) (((x) >> 23) & 0x1) x 174 drivers/gpu/drm/radeon/rs600d.h #define S_000070_MC_IND_RD_INV(x) (((x) & 0x1) << 24) x 175 drivers/gpu/drm/radeon/rs600d.h #define G_000070_MC_IND_RD_INV(x) (((x) >> 24) & 0x1) x 178 drivers/gpu/drm/radeon/rs600d.h #define S_000074_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0) x 179 drivers/gpu/drm/radeon/rs600d.h #define G_000074_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF) x 182 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) x 183 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) x 185 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) x 186 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) x 188 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) x 189 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) x 191 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) x 192 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) x 194 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) x 195 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) x 197 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) x 198 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) x 200 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) x 201 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) x 203 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) x 204 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) x 206 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) x 207 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) x 209 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) x 210 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) x 212 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) x 213 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) x 215 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) x 216 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) x 218 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) x 219 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) x 221 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) x 222 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) x 224 drivers/gpu/drm/radeon/rs600d.h #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) x 225 drivers/gpu/drm/radeon/rs600d.h #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) x 228 drivers/gpu/drm/radeon/rs600d.h #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) x 229 drivers/gpu/drm/radeon/rs600d.h #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) x 232 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 233 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 235 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 236 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 238 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 239 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 241 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 242 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 244 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 245 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 247 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 248 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 250 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 251 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 253 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 254 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 256 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 257 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 259 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) x 260 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) x 262 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) x 263 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) x 265 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 266 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 268 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 269 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 271 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 272 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 274 drivers/gpu/drm/radeon/rs600d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 275 drivers/gpu/drm/radeon/rs600d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 278 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 279 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 281 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 282 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 284 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 285 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 287 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 288 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 290 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 291 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 293 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 294 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 296 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 297 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 299 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 300 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 302 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 303 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 305 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 306 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 308 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 309 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 311 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 312 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 314 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 315 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 317 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) x 318 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) x 320 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 321 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 323 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 324 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 326 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 327 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 329 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 330 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 332 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) x 333 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) x 335 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) x 336 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) x 338 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) x 339 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) x 341 drivers/gpu/drm/radeon/rs600d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 342 drivers/gpu/drm/radeon/rs600d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 345 drivers/gpu/drm/radeon/rs600d.h #define S_0060A4_D1CRTC_FRAME_COUNT(x) (((x) & 0xFFFFFF) << 0) x 346 drivers/gpu/drm/radeon/rs600d.h #define G_0060A4_D1CRTC_FRAME_COUNT(x) (((x) >> 0) & 0xFFFFFF) x 349 drivers/gpu/drm/radeon/rs600d.h #define S_006534_D1MODE_VBLANK_OCCURRED(x) (((x) & 0x1) << 0) x 350 drivers/gpu/drm/radeon/rs600d.h #define G_006534_D1MODE_VBLANK_OCCURRED(x) (((x) >> 0) & 0x1) x 352 drivers/gpu/drm/radeon/rs600d.h #define S_006534_D1MODE_VBLANK_ACK(x) (((x) & 0x1) << 4) x 353 drivers/gpu/drm/radeon/rs600d.h #define G_006534_D1MODE_VBLANK_ACK(x) (((x) >> 4) & 0x1) x 355 drivers/gpu/drm/radeon/rs600d.h #define S_006534_D1MODE_VBLANK_STAT(x) (((x) & 0x1) << 12) x 356 drivers/gpu/drm/radeon/rs600d.h #define G_006534_D1MODE_VBLANK_STAT(x) (((x) >> 12) & 0x1) x 358 drivers/gpu/drm/radeon/rs600d.h #define S_006534_D1MODE_VBLANK_INTERRUPT(x) (((x) & 0x1) << 16) x 359 drivers/gpu/drm/radeon/rs600d.h #define G_006534_D1MODE_VBLANK_INTERRUPT(x) (((x) >> 16) & 0x1) x 362 drivers/gpu/drm/radeon/rs600d.h #define S_006540_D1MODE_VBLANK_INT_MASK(x) (((x) & 0x1) << 0) x 363 drivers/gpu/drm/radeon/rs600d.h #define G_006540_D1MODE_VBLANK_INT_MASK(x) (((x) >> 0) & 0x1) x 365 drivers/gpu/drm/radeon/rs600d.h #define S_006540_D1MODE_VLINE_INT_MASK(x) (((x) & 0x1) << 4) x 366 drivers/gpu/drm/radeon/rs600d.h #define G_006540_D1MODE_VLINE_INT_MASK(x) (((x) >> 4) & 0x1) x 368 drivers/gpu/drm/radeon/rs600d.h #define S_006540_D2MODE_VBLANK_INT_MASK(x) (((x) & 0x1) << 8) x 369 drivers/gpu/drm/radeon/rs600d.h #define G_006540_D2MODE_VBLANK_INT_MASK(x) (((x) >> 8) & 0x1) x 371 drivers/gpu/drm/radeon/rs600d.h #define S_006540_D2MODE_VLINE_INT_MASK(x) (((x) & 0x1) << 12) x 372 drivers/gpu/drm/radeon/rs600d.h #define G_006540_D2MODE_VLINE_INT_MASK(x) (((x) >> 12) & 0x1) x 374 drivers/gpu/drm/radeon/rs600d.h #define S_006540_D1MODE_VBLANK_CP_SEL(x) (((x) & 0x1) << 30) x 375 drivers/gpu/drm/radeon/rs600d.h #define G_006540_D1MODE_VBLANK_CP_SEL(x) (((x) >> 30) & 0x1) x 377 drivers/gpu/drm/radeon/rs600d.h #define S_006540_D2MODE_VBLANK_CP_SEL(x) (((x) & 0x1) << 31) x 378 drivers/gpu/drm/radeon/rs600d.h #define G_006540_D2MODE_VBLANK_CP_SEL(x) (((x) >> 31) & 0x1) x 381 drivers/gpu/drm/radeon/rs600d.h #define S_0068A4_D2CRTC_FRAME_COUNT(x) (((x) & 0xFFFFFF) << 0) x 382 drivers/gpu/drm/radeon/rs600d.h #define G_0068A4_D2CRTC_FRAME_COUNT(x) (((x) >> 0) & 0xFFFFFF) x 385 drivers/gpu/drm/radeon/rs600d.h #define S_006D34_D2MODE_VBLANK_OCCURRED(x) (((x) & 0x1) << 0) x 386 drivers/gpu/drm/radeon/rs600d.h #define G_006D34_D2MODE_VBLANK_OCCURRED(x) (((x) >> 0) & 0x1) x 388 drivers/gpu/drm/radeon/rs600d.h #define S_006D34_D2MODE_VBLANK_ACK(x) (((x) & 0x1) << 4) x 389 drivers/gpu/drm/radeon/rs600d.h #define G_006D34_D2MODE_VBLANK_ACK(x) (((x) >> 4) & 0x1) x 391 drivers/gpu/drm/radeon/rs600d.h #define S_006D34_D2MODE_VBLANK_STAT(x) (((x) & 0x1) << 12) x 392 drivers/gpu/drm/radeon/rs600d.h #define G_006D34_D2MODE_VBLANK_STAT(x) (((x) >> 12) & 0x1) x 394 drivers/gpu/drm/radeon/rs600d.h #define S_006D34_D2MODE_VBLANK_INTERRUPT(x) (((x) & 0x1) << 16) x 395 drivers/gpu/drm/radeon/rs600d.h #define G_006D34_D2MODE_VBLANK_INTERRUPT(x) (((x) >> 16) & 0x1) x 398 drivers/gpu/drm/radeon/rs600d.h #define S_007EDC_LB_D1_VBLANK_INTERRUPT(x) (((x) & 0x1) << 4) x 399 drivers/gpu/drm/radeon/rs600d.h #define G_007EDC_LB_D1_VBLANK_INTERRUPT(x) (((x) >> 4) & 0x1) x 401 drivers/gpu/drm/radeon/rs600d.h #define S_007EDC_LB_D2_VBLANK_INTERRUPT(x) (((x) & 0x1) << 5) x 402 drivers/gpu/drm/radeon/rs600d.h #define G_007EDC_LB_D2_VBLANK_INTERRUPT(x) (((x) >> 5) & 0x1) x 404 drivers/gpu/drm/radeon/rs600d.h #define S_007EDC_DACA_AUTODETECT_INTERRUPT(x) (((x) & 0x1) << 16) x 405 drivers/gpu/drm/radeon/rs600d.h #define G_007EDC_DACA_AUTODETECT_INTERRUPT(x) (((x) >> 16) & 0x1) x 407 drivers/gpu/drm/radeon/rs600d.h #define S_007EDC_DACB_AUTODETECT_INTERRUPT(x) (((x) & 0x1) << 17) x 408 drivers/gpu/drm/radeon/rs600d.h #define G_007EDC_DACB_AUTODETECT_INTERRUPT(x) (((x) >> 17) & 0x1) x 410 drivers/gpu/drm/radeon/rs600d.h #define S_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(x) (((x) & 0x1) << 18) x 411 drivers/gpu/drm/radeon/rs600d.h #define G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(x) (((x) >> 18) & 0x1) x 413 drivers/gpu/drm/radeon/rs600d.h #define S_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(x) (((x) & 0x1) << 19) x 414 drivers/gpu/drm/radeon/rs600d.h #define G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(x) (((x) >> 19) & 0x1) x 417 drivers/gpu/drm/radeon/rs600d.h #define S_007828_DACA_AUTODETECT_MODE(x) (((x) & 0x3) << 0) x 418 drivers/gpu/drm/radeon/rs600d.h #define G_007828_DACA_AUTODETECT_MODE(x) (((x) >> 0) & 0x3) x 420 drivers/gpu/drm/radeon/rs600d.h #define S_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) & 0xff) << 8) x 421 drivers/gpu/drm/radeon/rs600d.h #define G_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) >> 8) & 0xff) x 423 drivers/gpu/drm/radeon/rs600d.h #define S_007828_DACA_AUTODETECT_CHECK_MASK(x) (((x) & 0x3) << 16) x 424 drivers/gpu/drm/radeon/rs600d.h #define G_007828_DACA_AUTODETECT_CHECK_MASK(x) (((x) >> 16) & 0x3) x 427 drivers/gpu/drm/radeon/rs600d.h #define S_007838_DACA_AUTODETECT_ACK(x) (((x) & 0x1) << 0) x 429 drivers/gpu/drm/radeon/rs600d.h #define S_007838_DACA_AUTODETECT_INT_ENABLE(x) (((x) & 0x1) << 16) x 430 drivers/gpu/drm/radeon/rs600d.h #define G_007838_DACA_AUTODETECT_INT_ENABLE(x) (((x) >> 16) & 0x1) x 433 drivers/gpu/drm/radeon/rs600d.h #define S_007A28_DACB_AUTODETECT_MODE(x) (((x) & 0x3) << 0) x 434 drivers/gpu/drm/radeon/rs600d.h #define G_007A28_DACB_AUTODETECT_MODE(x) (((x) >> 0) & 0x3) x 436 drivers/gpu/drm/radeon/rs600d.h #define S_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) & 0xff) << 8) x 437 drivers/gpu/drm/radeon/rs600d.h #define G_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) >> 8) & 0xff) x 439 drivers/gpu/drm/radeon/rs600d.h #define S_007A28_DACB_AUTODETECT_CHECK_MASK(x) (((x) & 0x3) << 16) x 440 drivers/gpu/drm/radeon/rs600d.h #define G_007A28_DACB_AUTODETECT_CHECK_MASK(x) (((x) >> 16) & 0x3) x 443 drivers/gpu/drm/radeon/rs600d.h #define S_007A38_DACB_AUTODETECT_ACK(x) (((x) & 0x1) << 0) x 445 drivers/gpu/drm/radeon/rs600d.h #define S_007A38_DACB_AUTODETECT_INT_ENABLE(x) (((x) & 0x1) << 16) x 446 drivers/gpu/drm/radeon/rs600d.h #define G_007A38_DACB_AUTODETECT_INT_ENABLE(x) (((x) >> 16) & 0x1) x 449 drivers/gpu/drm/radeon/rs600d.h #define S_007D00_DC_HOT_PLUG_DETECT1_EN(x) (((x) & 0x1) << 0) x 450 drivers/gpu/drm/radeon/rs600d.h #define G_007D00_DC_HOT_PLUG_DETECT1_EN(x) (((x) >> 0) & 0x1) x 453 drivers/gpu/drm/radeon/rs600d.h #define S_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS(x) (((x) & 0x1) << 0) x 454 drivers/gpu/drm/radeon/rs600d.h #define G_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS(x) (((x) >> 0) & 0x1) x 456 drivers/gpu/drm/radeon/rs600d.h #define S_007D04_DC_HOT_PLUG_DETECT1_SENSE(x) (((x) & 0x1) << 1) x 457 drivers/gpu/drm/radeon/rs600d.h #define G_007D04_DC_HOT_PLUG_DETECT1_SENSE(x) (((x) >> 1) & 0x1) x 460 drivers/gpu/drm/radeon/rs600d.h #define S_007D08_DC_HOT_PLUG_DETECT1_INT_ACK(x) (((x) & 0x1) << 0) x 462 drivers/gpu/drm/radeon/rs600d.h #define S_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(x) (((x) & 0x1) << 8) x 463 drivers/gpu/drm/radeon/rs600d.h #define G_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(x) (((x) >> 8) & 0x1) x 465 drivers/gpu/drm/radeon/rs600d.h #define S_007D08_DC_HOT_PLUG_DETECT1_INT_EN(x) (((x) & 0x1) << 16) x 466 drivers/gpu/drm/radeon/rs600d.h #define G_007D08_DC_HOT_PLUG_DETECT1_INT_EN(x) (((x) >> 16) & 0x1) x 469 drivers/gpu/drm/radeon/rs600d.h #define S_007D10_DC_HOT_PLUG_DETECT2_EN(x) (((x) & 0x1) << 0) x 470 drivers/gpu/drm/radeon/rs600d.h #define G_007D10_DC_HOT_PLUG_DETECT2_EN(x) (((x) >> 0) & 0x1) x 473 drivers/gpu/drm/radeon/rs600d.h #define S_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS(x) (((x) & 0x1) << 0) x 474 drivers/gpu/drm/radeon/rs600d.h #define G_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS(x) (((x) >> 0) & 0x1) x 476 drivers/gpu/drm/radeon/rs600d.h #define S_007D14_DC_HOT_PLUG_DETECT2_SENSE(x) (((x) & 0x1) << 1) x 477 drivers/gpu/drm/radeon/rs600d.h #define G_007D14_DC_HOT_PLUG_DETECT2_SENSE(x) (((x) >> 1) & 0x1) x 480 drivers/gpu/drm/radeon/rs600d.h #define S_007D18_DC_HOT_PLUG_DETECT2_INT_ACK(x) (((x) & 0x1) << 0) x 482 drivers/gpu/drm/radeon/rs600d.h #define S_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(x) (((x) & 0x1) << 8) x 483 drivers/gpu/drm/radeon/rs600d.h #define G_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(x) (((x) >> 8) & 0x1) x 485 drivers/gpu/drm/radeon/rs600d.h #define S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) & 0x1) << 16) x 486 drivers/gpu/drm/radeon/rs600d.h #define G_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x) (((x) >> 16) & 0x1) x 489 drivers/gpu/drm/radeon/rs600d.h #define S_007404_HDMI0_AZ_FORMAT_WTRIG(x) (((x) & 0x1) << 28) x 490 drivers/gpu/drm/radeon/rs600d.h #define G_007404_HDMI0_AZ_FORMAT_WTRIG(x) (((x) >> 28) & 0x1) x 492 drivers/gpu/drm/radeon/rs600d.h #define S_007404_HDMI0_AZ_FORMAT_WTRIG_INT(x) (((x) & 0x1) << 29) x 493 drivers/gpu/drm/radeon/rs600d.h #define G_007404_HDMI0_AZ_FORMAT_WTRIG_INT(x) (((x) >> 29) & 0x1) x 496 drivers/gpu/drm/radeon/rs600d.h #define S_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(x) (((x) & 0x1) << 28) x 497 drivers/gpu/drm/radeon/rs600d.h #define G_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(x) (((x) >> 28) & 0x1) x 499 drivers/gpu/drm/radeon/rs600d.h #define S_007408_HDMI0_AZ_FORMAT_WTRIG_ACK(x) (((x) & 0x1) << 29) x 500 drivers/gpu/drm/radeon/rs600d.h #define G_007408_HDMI0_AZ_FORMAT_WTRIG_ACK(x) (((x) >> 29) & 0x1) x 505 drivers/gpu/drm/radeon/rs600d.h #define S_000000_MC_IDLE(x) (((x) & 0x1) << 0) x 506 drivers/gpu/drm/radeon/rs600d.h #define G_000000_MC_IDLE(x) (((x) >> 0) & 0x1) x 509 drivers/gpu/drm/radeon/rs600d.h #define S_000004_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 510 drivers/gpu/drm/radeon/rs600d.h #define G_000004_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 512 drivers/gpu/drm/radeon/rs600d.h #define S_000004_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 513 drivers/gpu/drm/radeon/rs600d.h #define G_000004_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 516 drivers/gpu/drm/radeon/rs600d.h #define S_000005_MC_AGP_START(x) (((x) & 0xFFFF) << 0) x 517 drivers/gpu/drm/radeon/rs600d.h #define G_000005_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) x 519 drivers/gpu/drm/radeon/rs600d.h #define S_000005_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) x 520 drivers/gpu/drm/radeon/rs600d.h #define G_000005_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) x 523 drivers/gpu/drm/radeon/rs600d.h #define S_000006_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) x 524 drivers/gpu/drm/radeon/rs600d.h #define G_000006_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) x 527 drivers/gpu/drm/radeon/rs600d.h #define S_000007_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) x 528 drivers/gpu/drm/radeon/rs600d.h #define G_000007_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) x 531 drivers/gpu/drm/radeon/rs600d.h #define S_000009_ENABLE_PAGE_TABLES(x) (((x) & 0x1) << 26) x 532 drivers/gpu/drm/radeon/rs600d.h #define G_000009_ENABLE_PAGE_TABLES(x) (((x) >> 26) & 0x1) x 536 drivers/gpu/drm/radeon/rs600d.h #define S_000100_ENABLE_PT(x) (((x) & 0x1) << 0) x 537 drivers/gpu/drm/radeon/rs600d.h #define G_000100_ENABLE_PT(x) (((x) >> 0) & 0x1) x 539 drivers/gpu/drm/radeon/rs600d.h #define S_000100_EFFECTIVE_L2_CACHE_SIZE(x) (((x) & 0x7) << 15) x 540 drivers/gpu/drm/radeon/rs600d.h #define G_000100_EFFECTIVE_L2_CACHE_SIZE(x) (((x) >> 15) & 0x7) x 542 drivers/gpu/drm/radeon/rs600d.h #define S_000100_EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 0x7) << 21) x 543 drivers/gpu/drm/radeon/rs600d.h #define G_000100_EFFECTIVE_L2_QUEUE_SIZE(x) (((x) >> 21) & 0x7) x 545 drivers/gpu/drm/radeon/rs600d.h #define S_000100_INVALIDATE_ALL_L1_TLBS(x) (((x) & 0x1) << 28) x 546 drivers/gpu/drm/radeon/rs600d.h #define G_000100_INVALIDATE_ALL_L1_TLBS(x) (((x) >> 28) & 0x1) x 548 drivers/gpu/drm/radeon/rs600d.h #define S_000100_INVALIDATE_L2_CACHE(x) (((x) & 0x1) << 29) x 549 drivers/gpu/drm/radeon/rs600d.h #define G_000100_INVALIDATE_L2_CACHE(x) (((x) >> 29) & 0x1) x 552 drivers/gpu/drm/radeon/rs600d.h #define S_000102_ENABLE_PAGE_TABLE(x) (((x) & 0x1) << 0) x 553 drivers/gpu/drm/radeon/rs600d.h #define G_000102_ENABLE_PAGE_TABLE(x) (((x) >> 0) & 0x1) x 555 drivers/gpu/drm/radeon/rs600d.h #define S_000102_PAGE_TABLE_DEPTH(x) (((x) & 0x3) << 1) x 556 drivers/gpu/drm/radeon/rs600d.h #define G_000102_PAGE_TABLE_DEPTH(x) (((x) >> 1) & 0x3) x 567 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_ENABLE_TRANSLATION_MODE_OVERRIDE(x) (((x) & 0x1) << 0) x 568 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_ENABLE_TRANSLATION_MODE_OVERRIDE(x) (((x) >> 0) & 0x1) x 570 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_TRANSLATION_MODE_OVERRIDE(x) (((x) & 0x1) << 1) x 571 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_TRANSLATION_MODE_OVERRIDE(x) (((x) >> 1) & 0x1) x 573 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_SYSTEM_ACCESS_MODE_MASK(x) (((x) & 0x3) << 8) x 574 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_SYSTEM_ACCESS_MODE_MASK(x) (((x) >> 8) & 0x3) x 580 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_SYSTEM_APERTURE_UNMAPPED_ACCESS(x) (((x) & 0x1) << 10) x 581 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_SYSTEM_APERTURE_UNMAPPED_ACCESS(x) (((x) >> 10) & 0x1) x 585 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_EFFECTIVE_L1_CACHE_SIZE(x) (((x) & 0x7) << 11) x 586 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_EFFECTIVE_L1_CACHE_SIZE(x) (((x) >> 11) & 0x7) x 588 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_ENABLE_FRAGMENT_PROCESSING(x) (((x) & 0x1) << 14) x 589 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_ENABLE_FRAGMENT_PROCESSING(x) (((x) >> 14) & 0x1) x 591 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_EFFECTIVE_L1_QUEUE_SIZE(x) (((x) & 0x7) << 15) x 592 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_EFFECTIVE_L1_QUEUE_SIZE(x) (((x) >> 15) & 0x7) x 594 drivers/gpu/drm/radeon/rs600d.h #define S_00016C_INVALIDATE_L1_TLB(x) (((x) & 0x1) << 20) x 595 drivers/gpu/drm/radeon/rs600d.h #define G_00016C_INVALIDATE_L1_TLB(x) (((x) >> 20) & 0x1) x 599 drivers/gpu/drm/radeon/rs600d.h #define S_006548_D1MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0) x 600 drivers/gpu/drm/radeon/rs600d.h #define G_006548_D1MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF) x 602 drivers/gpu/drm/radeon/rs600d.h #define S_006548_D1MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16) x 603 drivers/gpu/drm/radeon/rs600d.h #define G_006548_D1MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1) x 605 drivers/gpu/drm/radeon/rs600d.h #define S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20) x 606 drivers/gpu/drm/radeon/rs600d.h #define G_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 608 drivers/gpu/drm/radeon/rs600d.h #define S_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24) x 609 drivers/gpu/drm/radeon/rs600d.h #define G_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1) x 612 drivers/gpu/drm/radeon/rs600d.h #define S_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0) x 613 drivers/gpu/drm/radeon/rs600d.h #define G_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF) x 615 drivers/gpu/drm/radeon/rs600d.h #define S_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16) x 616 drivers/gpu/drm/radeon/rs600d.h #define G_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1) x 618 drivers/gpu/drm/radeon/rs600d.h #define S_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20) x 619 drivers/gpu/drm/radeon/rs600d.h #define G_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 621 drivers/gpu/drm/radeon/rs600d.h #define S_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24) x 622 drivers/gpu/drm/radeon/rs600d.h #define G_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1) x 625 drivers/gpu/drm/radeon/rs600d.h #define S_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0) x 626 drivers/gpu/drm/radeon/rs600d.h #define G_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF) x 628 drivers/gpu/drm/radeon/rs600d.h #define S_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16) x 629 drivers/gpu/drm/radeon/rs600d.h #define G_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1) x 631 drivers/gpu/drm/radeon/rs600d.h #define S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20) x 632 drivers/gpu/drm/radeon/rs600d.h #define G_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 634 drivers/gpu/drm/radeon/rs600d.h #define S_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24) x 635 drivers/gpu/drm/radeon/rs600d.h #define G_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1) x 638 drivers/gpu/drm/radeon/rs600d.h #define S_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0) x 639 drivers/gpu/drm/radeon/rs600d.h #define G_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF) x 641 drivers/gpu/drm/radeon/rs600d.h #define S_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16) x 642 drivers/gpu/drm/radeon/rs600d.h #define G_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1) x 644 drivers/gpu/drm/radeon/rs600d.h #define S_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20) x 645 drivers/gpu/drm/radeon/rs600d.h #define G_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 647 drivers/gpu/drm/radeon/rs600d.h #define S_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24) x 648 drivers/gpu/drm/radeon/rs600d.h #define G_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1) x 656 drivers/gpu/drm/radeon/rs600d.h #define NORMAL_POWER_SCLK_HILEN(x) ((x) << 0) x 657 drivers/gpu/drm/radeon/rs600d.h #define NORMAL_POWER_SCLK_LOLEN(x) ((x) << 4) x 658 drivers/gpu/drm/radeon/rs600d.h #define REDUCED_POWER_SCLK_HILEN(x) ((x) << 8) x 659 drivers/gpu/drm/radeon/rs600d.h #define REDUCED_POWER_SCLK_LOLEN(x) ((x) << 12) x 660 drivers/gpu/drm/radeon/rs600d.h #define POWER_D1_SCLK_HILEN(x) ((x) << 16) x 661 drivers/gpu/drm/radeon/rs600d.h #define POWER_D1_SCLK_LOLEN(x) ((x) << 20) x 662 drivers/gpu/drm/radeon/rs600d.h #define STATIC_SCREEN_HILEN(x) ((x) << 24) x 663 drivers/gpu/drm/radeon/rs600d.h #define STATIC_SCREEN_LOLEN(x) ((x) << 28) x 667 drivers/gpu/drm/radeon/rs600d.h #define VOLTAGE_DELAY_SEL(x) ((x) << 3) x 34 drivers/gpu/drm/radeon/rs690d.h #define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) x 36 drivers/gpu/drm/radeon/rs690d.h #define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) x 37 drivers/gpu/drm/radeon/rs690d.h #define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF) x 39 drivers/gpu/drm/radeon/rs690d.h #define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9) x 40 drivers/gpu/drm/radeon/rs690d.h #define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1) x 43 drivers/gpu/drm/radeon/rs690d.h #define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0) x 44 drivers/gpu/drm/radeon/rs690d.h #define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF) x 47 drivers/gpu/drm/radeon/rs690d.h #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) x 48 drivers/gpu/drm/radeon/rs690d.h #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 51 drivers/gpu/drm/radeon/rs690d.h #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) x 52 drivers/gpu/drm/radeon/rs690d.h #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) x 55 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 56 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 58 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 59 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 61 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 62 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 64 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 65 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 67 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 68 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 70 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 71 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 73 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 74 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 76 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 77 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 79 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 80 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 82 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) x 83 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) x 85 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) x 86 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) x 88 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 89 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 91 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 92 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 94 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 95 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 97 drivers/gpu/drm/radeon/rs690d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 98 drivers/gpu/drm/radeon/rs690d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 101 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 102 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 104 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 105 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 107 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 108 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 110 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 111 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 113 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 114 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 116 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 117 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 119 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 120 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 122 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 123 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 125 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 126 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 128 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 129 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 131 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 132 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 134 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 135 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 137 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 138 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 140 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) x 141 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) x 143 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 144 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 146 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 147 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 149 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 150 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 152 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 153 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 155 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) x 156 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) x 158 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) x 159 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) x 161 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) x 162 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) x 164 drivers/gpu/drm/radeon/rs690d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 165 drivers/gpu/drm/radeon/rs690d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 168 drivers/gpu/drm/radeon/rs690d.h #define S_006520_DC_LB_MEMORY_SPLIT(x) (((x) & 0x3) << 0) x 169 drivers/gpu/drm/radeon/rs690d.h #define G_006520_DC_LB_MEMORY_SPLIT(x) (((x) >> 0) & 0x3) x 171 drivers/gpu/drm/radeon/rs690d.h #define S_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) & 0x1) << 2) x 172 drivers/gpu/drm/radeon/rs690d.h #define G_006520_DC_LB_MEMORY_SPLIT_MODE(x) (((x) >> 2) & 0x1) x 178 drivers/gpu/drm/radeon/rs690d.h #define S_006520_DC_LB_DISP1_END_ADR(x) (((x) & 0x7FF) << 4) x 179 drivers/gpu/drm/radeon/rs690d.h #define G_006520_DC_LB_DISP1_END_ADR(x) (((x) >> 4) & 0x7FF) x 182 drivers/gpu/drm/radeon/rs690d.h #define S_006548_D1MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0) x 183 drivers/gpu/drm/radeon/rs690d.h #define G_006548_D1MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF) x 185 drivers/gpu/drm/radeon/rs690d.h #define S_006548_D1MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16) x 186 drivers/gpu/drm/radeon/rs690d.h #define G_006548_D1MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1) x 188 drivers/gpu/drm/radeon/rs690d.h #define S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20) x 189 drivers/gpu/drm/radeon/rs690d.h #define G_006548_D1MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 191 drivers/gpu/drm/radeon/rs690d.h #define S_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24) x 192 drivers/gpu/drm/radeon/rs690d.h #define G_006548_D1MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1) x 195 drivers/gpu/drm/radeon/rs690d.h #define S_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0) x 196 drivers/gpu/drm/radeon/rs690d.h #define G_00654C_D1MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF) x 198 drivers/gpu/drm/radeon/rs690d.h #define S_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16) x 199 drivers/gpu/drm/radeon/rs690d.h #define G_00654C_D1MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1) x 201 drivers/gpu/drm/radeon/rs690d.h #define S_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20) x 202 drivers/gpu/drm/radeon/rs690d.h #define G_00654C_D1MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 204 drivers/gpu/drm/radeon/rs690d.h #define S_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24) x 205 drivers/gpu/drm/radeon/rs690d.h #define G_00654C_D1MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1) x 209 drivers/gpu/drm/radeon/rs690d.h #define S_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) & 0x7FFF) << 0) x 210 drivers/gpu/drm/radeon/rs690d.h #define G_006D48_D2MODE_PRIORITY_MARK_A(x) (((x) >> 0) & 0x7FFF) x 212 drivers/gpu/drm/radeon/rs690d.h #define S_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) & 0x1) << 16) x 213 drivers/gpu/drm/radeon/rs690d.h #define G_006D48_D2MODE_PRIORITY_A_OFF(x) (((x) >> 16) & 0x1) x 215 drivers/gpu/drm/radeon/rs690d.h #define S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) & 0x1) << 20) x 216 drivers/gpu/drm/radeon/rs690d.h #define G_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 218 drivers/gpu/drm/radeon/rs690d.h #define S_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) & 0x1) << 24) x 219 drivers/gpu/drm/radeon/rs690d.h #define G_006D48_D2MODE_PRIORITY_A_FORCE_MASK(x) (((x) >> 24) & 0x1) x 222 drivers/gpu/drm/radeon/rs690d.h #define S_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) & 0x7FFF) << 0) x 223 drivers/gpu/drm/radeon/rs690d.h #define G_006D4C_D2MODE_PRIORITY_MARK_B(x) (((x) >> 0) & 0x7FFF) x 225 drivers/gpu/drm/radeon/rs690d.h #define S_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) & 0x1) << 16) x 226 drivers/gpu/drm/radeon/rs690d.h #define G_006D4C_D2MODE_PRIORITY_B_OFF(x) (((x) >> 16) & 0x1) x 228 drivers/gpu/drm/radeon/rs690d.h #define S_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) & 0x1) << 20) x 229 drivers/gpu/drm/radeon/rs690d.h #define G_006D4C_D2MODE_PRIORITY_B_ALWAYS_ON(x) (((x) >> 20) & 0x1) x 231 drivers/gpu/drm/radeon/rs690d.h #define S_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) & 0x1) << 24) x 232 drivers/gpu/drm/radeon/rs690d.h #define G_006D4C_D2MODE_PRIORITY_B_FORCE_MASK(x) (((x) >> 24) & 0x1) x 235 drivers/gpu/drm/radeon/rs690d.h #define S_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 0) x 236 drivers/gpu/drm/radeon/rs690d.h #define G_006D58_LB_D1_MAX_REQ_OUTSTANDING(x) (((x) >> 0) & 0xF) x 238 drivers/gpu/drm/radeon/rs690d.h #define S_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) & 0xF) << 16) x 239 drivers/gpu/drm/radeon/rs690d.h #define G_006D58_LB_D2_MAX_REQ_OUTSTANDING(x) (((x) >> 16) & 0xF) x 244 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MC_SYSTEM_IDLE(x) (((x) & 0x1) << 0) x 245 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MC_SYSTEM_IDLE(x) (((x) >> 0) & 0x1) x 247 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MC_SEQUENCER_IDLE(x) (((x) & 0x1) << 1) x 248 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MC_SEQUENCER_IDLE(x) (((x) >> 1) & 0x1) x 250 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MC_ARBITER_IDLE(x) (((x) & 0x1) << 2) x 251 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MC_ARBITER_IDLE(x) (((x) >> 2) & 0x1) x 253 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MC_SELECT_PM(x) (((x) & 0x1) << 3) x 254 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MC_SELECT_PM(x) (((x) >> 3) & 0x1) x 256 drivers/gpu/drm/radeon/rs690d.h #define S_000090_RESERVED4(x) (((x) & 0xF) << 4) x 257 drivers/gpu/drm/radeon/rs690d.h #define G_000090_RESERVED4(x) (((x) >> 4) & 0xF) x 259 drivers/gpu/drm/radeon/rs690d.h #define S_000090_RESERVED8(x) (((x) & 0xF) << 8) x 260 drivers/gpu/drm/radeon/rs690d.h #define G_000090_RESERVED8(x) (((x) >> 8) & 0xF) x 262 drivers/gpu/drm/radeon/rs690d.h #define S_000090_RESERVED12(x) (((x) & 0xF) << 12) x 263 drivers/gpu/drm/radeon/rs690d.h #define G_000090_RESERVED12(x) (((x) >> 12) & 0xF) x 265 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MCA_INIT_EXECUTED(x) (((x) & 0x1) << 16) x 266 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MCA_INIT_EXECUTED(x) (((x) >> 16) & 0x1) x 268 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MCA_IDLE(x) (((x) & 0x1) << 17) x 269 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MCA_IDLE(x) (((x) >> 17) & 0x1) x 271 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MCA_SEQ_IDLE(x) (((x) & 0x1) << 18) x 272 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MCA_SEQ_IDLE(x) (((x) >> 18) & 0x1) x 274 drivers/gpu/drm/radeon/rs690d.h #define S_000090_MCA_ARB_IDLE(x) (((x) & 0x1) << 19) x 275 drivers/gpu/drm/radeon/rs690d.h #define G_000090_MCA_ARB_IDLE(x) (((x) >> 19) & 0x1) x 277 drivers/gpu/drm/radeon/rs690d.h #define S_000090_RESERVED20(x) (((x) & 0xFFF) << 20) x 278 drivers/gpu/drm/radeon/rs690d.h #define G_000090_RESERVED20(x) (((x) >> 20) & 0xFFF) x 281 drivers/gpu/drm/radeon/rs690d.h #define S_000100_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 282 drivers/gpu/drm/radeon/rs690d.h #define G_000100_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 284 drivers/gpu/drm/radeon/rs690d.h #define S_000100_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 285 drivers/gpu/drm/radeon/rs690d.h #define G_000100_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 288 drivers/gpu/drm/radeon/rs690d.h #define S_000104_MC_CPR_INIT_LAT(x) (((x) & 0xF) << 0) x 289 drivers/gpu/drm/radeon/rs690d.h #define G_000104_MC_CPR_INIT_LAT(x) (((x) >> 0) & 0xF) x 291 drivers/gpu/drm/radeon/rs690d.h #define S_000104_MC_VF_INIT_LAT(x) (((x) & 0xF) << 4) x 292 drivers/gpu/drm/radeon/rs690d.h #define G_000104_MC_VF_INIT_LAT(x) (((x) >> 4) & 0xF) x 294 drivers/gpu/drm/radeon/rs690d.h #define S_000104_MC_DISP0R_INIT_LAT(x) (((x) & 0xF) << 8) x 295 drivers/gpu/drm/radeon/rs690d.h #define G_000104_MC_DISP0R_INIT_LAT(x) (((x) >> 8) & 0xF) x 297 drivers/gpu/drm/radeon/rs690d.h #define S_000104_MC_DISP1R_INIT_LAT(x) (((x) & 0xF) << 12) x 298 drivers/gpu/drm/radeon/rs690d.h #define G_000104_MC_DISP1R_INIT_LAT(x) (((x) >> 12) & 0xF) x 300 drivers/gpu/drm/radeon/rs690d.h #define S_000104_MC_FIXED_INIT_LAT(x) (((x) & 0xF) << 16) x 301 drivers/gpu/drm/radeon/rs690d.h #define G_000104_MC_FIXED_INIT_LAT(x) (((x) >> 16) & 0xF) x 303 drivers/gpu/drm/radeon/rs690d.h #define S_000104_MC_E2R_INIT_LAT(x) (((x) & 0xF) << 20) x 304 drivers/gpu/drm/radeon/rs690d.h #define G_000104_MC_E2R_INIT_LAT(x) (((x) >> 20) & 0xF) x 306 drivers/gpu/drm/radeon/rs690d.h #define S_000104_SAME_PAGE_PRIO(x) (((x) & 0xF) << 24) x 307 drivers/gpu/drm/radeon/rs690d.h #define G_000104_SAME_PAGE_PRIO(x) (((x) >> 24) & 0xF) x 309 drivers/gpu/drm/radeon/rs690d.h #define S_000104_MC_GLOBW_INIT_LAT(x) (((x) & 0xF) << 28) x 310 drivers/gpu/drm/radeon/rs690d.h #define G_000104_MC_GLOBW_INIT_LAT(x) (((x) >> 28) & 0xF) x 29 drivers/gpu/drm/radeon/rs780d.h # define SPLL_REF_DIV(x) ((x) << 2) x 32 drivers/gpu/drm/radeon/rs780d.h # define SPLL_FB_DIV(x) ((x) << 5) x 36 drivers/gpu/drm/radeon/rs780d.h # define SPLL_PULSENUM(x) ((x) << 14) x 38 drivers/gpu/drm/radeon/rs780d.h # define SPLL_SW_HILEN(x) ((x) << 16) x 41 drivers/gpu/drm/radeon/rs780d.h # define SPLL_SW_LOLEN(x) ((x) << 20) x 53 drivers/gpu/drm/radeon/rs780d.h #define MINIMUM_CIP(x) ((x) << 1) x 56 drivers/gpu/drm/radeon/rs780d.h #define REFRESH_RATE_DIVISOR(x) ((x) << 25) x 65 drivers/gpu/drm/radeon/rs780d.h #define TARGET_IDLE_COUNT(x) ((x) << 0) x 83 drivers/gpu/drm/radeon/rs780d.h #define MIN_FEEDBACK_DIV(x) ((x) << 0) x 86 drivers/gpu/drm/radeon/rs780d.h #define MAX_FEEDBACK_DIV(x) ((x) << 12) x 90 drivers/gpu/drm/radeon/rs780d.h #define MAX_FEEDBACK_STEP(x) ((x) << 0) x 93 drivers/gpu/drm/radeon/rs780d.h #define STARTING_FEEDBACK_DIV(x) ((x) << 12) x 98 drivers/gpu/drm/radeon/rs780d.h #define FORCED_FEEDBACK_DIV(x) ((x) << 0) x 101 drivers/gpu/drm/radeon/rs780d.h #define FB_DIV_TIMER_VAL(x) ((x) << 12) x 109 drivers/gpu/drm/radeon/rs780d.h #define STARTING_PWM_HIGHTIME(x) ((x) << 0) x 112 drivers/gpu/drm/radeon/rs780d.h #define NUMBER_OF_CYCLES_IN_PERIOD(x) ((x) << 12) x 118 drivers/gpu/drm/radeon/rs780d.h #define MIN_PWM_HIGHTIME(x) ((x) << 0) x 121 drivers/gpu/drm/radeon/rs780d.h #define MAX_PWM_HIGHTIME(x) ((x) << 12) x 136 drivers/gpu/drm/radeon/rs780d.h #define RANGE0_PWM_FEEDBACK_DIV(x) ((x) << 0) x 141 drivers/gpu/drm/radeon/rs780d.h #define RANGE1_PWM_FEEDBACK_DIV(x) ((x) << 0) x 144 drivers/gpu/drm/radeon/rs780d.h #define RANGE2_PWM_FEEDBACK_DIV(x) ((x) << 12) x 148 drivers/gpu/drm/radeon/rs780d.h #define RANGE0_PWM(x) ((x) << 0) x 151 drivers/gpu/drm/radeon/rs780d.h #define RANGE1_PWM(x) ((x) << 12) x 155 drivers/gpu/drm/radeon/rs780d.h #define RANGE2_PWM(x) ((x) << 0) x 158 drivers/gpu/drm/radeon/rs780d.h #define RANGE3_PWM(x) ((x) << 12) x 162 drivers/gpu/drm/radeon/rs780d.h #define RANGE0_SLOW_CLK_FEEDBACK_DIV(x) ((x) << 0) x 32 drivers/gpu/drm/radeon/rv200d.h #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) x 33 drivers/gpu/drm/radeon/rv200d.h #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) x 32 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) x 33 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) x 35 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) x 36 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) x 38 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) x 39 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) x 41 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) x 42 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) x 44 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) x 45 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) x 47 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) x 48 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) x 50 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) x 51 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) x 53 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) x 54 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) x 56 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) x 57 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) x 59 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) x 60 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) x 62 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) x 63 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) x 65 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) x 66 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) x 68 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) x 69 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) x 71 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) x 72 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) x 74 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) x 75 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) x 77 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) x 78 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) x 80 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) x 81 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) x 83 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) x 84 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) x 86 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) x 87 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) x 89 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) x 90 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) x 92 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) x 93 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) x 95 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) x 96 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) x 98 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) x 99 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) x 101 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) x 102 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) x 104 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) x 105 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) x 107 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) x 108 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) x 110 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) x 111 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) x 113 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) x 114 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) x 116 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) x 117 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) x 119 drivers/gpu/drm/radeon/rv250d.h #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) x 120 drivers/gpu/drm/radeon/rv250d.h #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) x 33 drivers/gpu/drm/radeon/rv350d.h #define S_00000D_FORCE_VAP(x) (((x) & 0x1) << 21) x 34 drivers/gpu/drm/radeon/rv350d.h #define G_00000D_FORCE_VAP(x) (((x) >> 21) & 0x1) x 36 drivers/gpu/drm/radeon/rv350d.h #define S_00000D_FORCE_SR(x) (((x) & 0x1) << 25) x 37 drivers/gpu/drm/radeon/rv350d.h #define G_00000D_FORCE_SR(x) (((x) >> 25) & 0x1) x 39 drivers/gpu/drm/radeon/rv350d.h #define S_00000D_FORCE_PX(x) (((x) & 0x1) << 26) x 40 drivers/gpu/drm/radeon/rv350d.h #define G_00000D_FORCE_PX(x) (((x) >> 26) & 0x1) x 42 drivers/gpu/drm/radeon/rv350d.h #define S_00000D_FORCE_TX(x) (((x) & 0x1) << 27) x 43 drivers/gpu/drm/radeon/rv350d.h #define G_00000D_FORCE_TX(x) (((x) >> 27) & 0x1) x 45 drivers/gpu/drm/radeon/rv350d.h #define S_00000D_FORCE_US(x) (((x) & 0x1) << 28) x 46 drivers/gpu/drm/radeon/rv350d.h #define G_00000D_FORCE_US(x) (((x) >> 28) & 0x1) x 48 drivers/gpu/drm/radeon/rv350d.h #define S_00000D_FORCE_SU(x) (((x) & 0x1) << 30) x 49 drivers/gpu/drm/radeon/rv350d.h #define G_00000D_FORCE_SU(x) (((x) >> 30) & 0x1) x 210 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) x 211 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) x 213 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) x 214 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) x 216 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) x 217 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) x 219 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) x 220 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) x 222 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) x 223 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) x 225 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) x 226 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) x 228 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) x 229 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) x 231 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) x 232 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) x 234 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) x 235 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) x 237 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) x 238 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) x 240 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) x 241 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) x 243 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) x 244 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) x 246 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) x 247 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) x 249 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) x 250 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) x 252 drivers/gpu/drm/radeon/rv515d.h #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) x 253 drivers/gpu/drm/radeon/rv515d.h #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) x 256 drivers/gpu/drm/radeon/rv515d.h #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) x 257 drivers/gpu/drm/radeon/rv515d.h #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) x 260 drivers/gpu/drm/radeon/rv515d.h #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) x 261 drivers/gpu/drm/radeon/rv515d.h #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) x 264 drivers/gpu/drm/radeon/rv515d.h #define S_000300_VGA_BLINK_RATE(x) (((x) & 0x1F) << 0) x 265 drivers/gpu/drm/radeon/rv515d.h #define G_000300_VGA_BLINK_RATE(x) (((x) >> 0) & 0x1F) x 267 drivers/gpu/drm/radeon/rv515d.h #define S_000300_VGA_BLINK_MODE(x) (((x) & 0x3) << 5) x 268 drivers/gpu/drm/radeon/rv515d.h #define G_000300_VGA_BLINK_MODE(x) (((x) >> 5) & 0x3) x 270 drivers/gpu/drm/radeon/rv515d.h #define S_000300_VGA_CURSOR_BLINK_INVERT(x) (((x) & 0x1) << 7) x 271 drivers/gpu/drm/radeon/rv515d.h #define G_000300_VGA_CURSOR_BLINK_INVERT(x) (((x) >> 7) & 0x1) x 273 drivers/gpu/drm/radeon/rv515d.h #define S_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) (((x) & 0x1) << 8) x 274 drivers/gpu/drm/radeon/rv515d.h #define G_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) (((x) >> 8) & 0x1) x 276 drivers/gpu/drm/radeon/rv515d.h #define S_000300_VGA_VSTATUS_CNTL(x) (((x) & 0x3) << 16) x 277 drivers/gpu/drm/radeon/rv515d.h #define G_000300_VGA_VSTATUS_CNTL(x) (((x) >> 16) & 0x3) x 279 drivers/gpu/drm/radeon/rv515d.h #define S_000300_VGA_LOCK_8DOT(x) (((x) & 0x1) << 24) x 280 drivers/gpu/drm/radeon/rv515d.h #define G_000300_VGA_LOCK_8DOT(x) (((x) >> 24) & 0x1) x 282 drivers/gpu/drm/radeon/rv515d.h #define S_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) (((x) & 0x1) << 25) x 283 drivers/gpu/drm/radeon/rv515d.h #define G_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) (((x) >> 25) & 0x1) x 286 drivers/gpu/drm/radeon/rv515d.h #define S_000310_VGA_MEMORY_BASE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) x 287 drivers/gpu/drm/radeon/rv515d.h #define G_000310_VGA_MEMORY_BASE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) x 290 drivers/gpu/drm/radeon/rv515d.h #define S_000328_VGA_MEM_PAGE_SELECT_EN(x) (((x) & 0x1) << 0) x 291 drivers/gpu/drm/radeon/rv515d.h #define G_000328_VGA_MEM_PAGE_SELECT_EN(x) (((x) >> 0) & 0x1) x 293 drivers/gpu/drm/radeon/rv515d.h #define S_000328_VGA_RBBM_LOCK_DISABLE(x) (((x) & 0x1) << 8) x 294 drivers/gpu/drm/radeon/rv515d.h #define G_000328_VGA_RBBM_LOCK_DISABLE(x) (((x) >> 8) & 0x1) x 296 drivers/gpu/drm/radeon/rv515d.h #define S_000328_VGA_SOFT_RESET(x) (((x) & 0x1) << 16) x 297 drivers/gpu/drm/radeon/rv515d.h #define G_000328_VGA_SOFT_RESET(x) (((x) >> 16) & 0x1) x 299 drivers/gpu/drm/radeon/rv515d.h #define S_000328_VGA_TEST_RESET_CONTROL(x) (((x) & 0x1) << 24) x 300 drivers/gpu/drm/radeon/rv515d.h #define G_000328_VGA_TEST_RESET_CONTROL(x) (((x) >> 24) & 0x1) x 303 drivers/gpu/drm/radeon/rv515d.h #define S_000330_D1VGA_MODE_ENABLE(x) (((x) & 0x1) << 0) x 304 drivers/gpu/drm/radeon/rv515d.h #define G_000330_D1VGA_MODE_ENABLE(x) (((x) >> 0) & 0x1) x 306 drivers/gpu/drm/radeon/rv515d.h #define S_000330_D1VGA_TIMING_SELECT(x) (((x) & 0x1) << 8) x 307 drivers/gpu/drm/radeon/rv515d.h #define G_000330_D1VGA_TIMING_SELECT(x) (((x) >> 8) & 0x1) x 309 drivers/gpu/drm/radeon/rv515d.h #define S_000330_D1VGA_SYNC_POLARITY_SELECT(x) (((x) & 0x1) << 9) x 310 drivers/gpu/drm/radeon/rv515d.h #define G_000330_D1VGA_SYNC_POLARITY_SELECT(x) (((x) >> 9) & 0x1) x 312 drivers/gpu/drm/radeon/rv515d.h #define S_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) (((x) & 0x1) << 10) x 313 drivers/gpu/drm/radeon/rv515d.h #define G_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) (((x) >> 10) & 0x1) x 315 drivers/gpu/drm/radeon/rv515d.h #define S_000330_D1VGA_OVERSCAN_COLOR_EN(x) (((x) & 0x1) << 16) x 316 drivers/gpu/drm/radeon/rv515d.h #define G_000330_D1VGA_OVERSCAN_COLOR_EN(x) (((x) >> 16) & 0x1) x 318 drivers/gpu/drm/radeon/rv515d.h #define S_000330_D1VGA_ROTATE(x) (((x) & 0x3) << 24) x 319 drivers/gpu/drm/radeon/rv515d.h #define G_000330_D1VGA_ROTATE(x) (((x) >> 24) & 0x3) x 322 drivers/gpu/drm/radeon/rv515d.h #define S_000338_D2VGA_MODE_ENABLE(x) (((x) & 0x1) << 0) x 323 drivers/gpu/drm/radeon/rv515d.h #define G_000338_D2VGA_MODE_ENABLE(x) (((x) >> 0) & 0x1) x 325 drivers/gpu/drm/radeon/rv515d.h #define S_000338_D2VGA_TIMING_SELECT(x) (((x) & 0x1) << 8) x 326 drivers/gpu/drm/radeon/rv515d.h #define G_000338_D2VGA_TIMING_SELECT(x) (((x) >> 8) & 0x1) x 328 drivers/gpu/drm/radeon/rv515d.h #define S_000338_D2VGA_SYNC_POLARITY_SELECT(x) (((x) & 0x1) << 9) x 329 drivers/gpu/drm/radeon/rv515d.h #define G_000338_D2VGA_SYNC_POLARITY_SELECT(x) (((x) >> 9) & 0x1) x 331 drivers/gpu/drm/radeon/rv515d.h #define S_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) (((x) & 0x1) << 10) x 332 drivers/gpu/drm/radeon/rv515d.h #define G_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) (((x) >> 10) & 0x1) x 334 drivers/gpu/drm/radeon/rv515d.h #define S_000338_D2VGA_OVERSCAN_COLOR_EN(x) (((x) & 0x1) << 16) x 335 drivers/gpu/drm/radeon/rv515d.h #define G_000338_D2VGA_OVERSCAN_COLOR_EN(x) (((x) >> 16) & 0x1) x 337 drivers/gpu/drm/radeon/rv515d.h #define S_000338_D2VGA_ROTATE(x) (((x) & 0x3) << 24) x 338 drivers/gpu/drm/radeon/rv515d.h #define G_000338_D2VGA_ROTATE(x) (((x) >> 24) & 0x3) x 341 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) x 342 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) x 344 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) x 345 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) x 347 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) x 348 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) x 350 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) x 351 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) x 353 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) x 354 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) x 356 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) x 357 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) x 359 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) x 360 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) x 362 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) x 363 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) x 365 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) x 366 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) x 368 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) x 369 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) x 371 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) x 372 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) x 374 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) x 375 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) x 377 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) x 378 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) x 380 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) x 381 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) x 383 drivers/gpu/drm/radeon/rv515d.h #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) x 384 drivers/gpu/drm/radeon/rv515d.h #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) x 387 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) x 388 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) x 390 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) x 391 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) x 393 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) x 394 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) x 396 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) x 397 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) x 399 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) x 400 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) x 402 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) x 403 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) x 405 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) x 406 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) x 408 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) x 409 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) x 411 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) x 412 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) x 414 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) x 415 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) x 417 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) x 418 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) x 420 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) x 421 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) x 423 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) x 424 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) x 426 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) x 427 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) x 429 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) x 430 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) x 432 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) x 433 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) x 435 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) x 436 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) x 438 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) x 439 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) x 441 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) x 442 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) x 444 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) x 445 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) x 447 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) x 448 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) x 450 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_RBBM_HIBUSY(x) (((x) & 0x1) << 28) x 451 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_RBBM_HIBUSY(x) (((x) >> 28) & 0x1) x 453 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_SKID_CFBUSY(x) (((x) & 0x1) << 29) x 454 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_SKID_CFBUSY(x) (((x) >> 29) & 0x1) x 456 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_VAP_VF_BUSY(x) (((x) & 0x1) << 30) x 457 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_VAP_VF_BUSY(x) (((x) >> 30) & 0x1) x 459 drivers/gpu/drm/radeon/rv515d.h #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) x 460 drivers/gpu/drm/radeon/rv515d.h #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) x 463 drivers/gpu/drm/radeon/rv515d.h #define S_006080_D1CRTC_MASTER_EN(x) (((x) & 0x1) << 0) x 464 drivers/gpu/drm/radeon/rv515d.h #define G_006080_D1CRTC_MASTER_EN(x) (((x) >> 0) & 0x1) x 466 drivers/gpu/drm/radeon/rv515d.h #define S_006080_D1CRTC_SYNC_RESET_SEL(x) (((x) & 0x1) << 4) x 467 drivers/gpu/drm/radeon/rv515d.h #define G_006080_D1CRTC_SYNC_RESET_SEL(x) (((x) >> 4) & 0x1) x 469 drivers/gpu/drm/radeon/rv515d.h #define S_006080_D1CRTC_DISABLE_POINT_CNTL(x) (((x) & 0x3) << 8) x 470 drivers/gpu/drm/radeon/rv515d.h #define G_006080_D1CRTC_DISABLE_POINT_CNTL(x) (((x) >> 8) & 0x3) x 472 drivers/gpu/drm/radeon/rv515d.h #define S_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) (((x) & 0x1) << 16) x 473 drivers/gpu/drm/radeon/rv515d.h #define G_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) (((x) >> 16) & 0x1) x 475 drivers/gpu/drm/radeon/rv515d.h #define S_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) & 0x1) << 24) x 476 drivers/gpu/drm/radeon/rv515d.h #define G_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) >> 24) & 0x1) x 479 drivers/gpu/drm/radeon/rv515d.h #define S_0060E8_D1CRTC_UPDATE_LOCK(x) (((x) & 0x1) << 0) x 480 drivers/gpu/drm/radeon/rv515d.h #define G_0060E8_D1CRTC_UPDATE_LOCK(x) (((x) >> 0) & 0x1) x 483 drivers/gpu/drm/radeon/rv515d.h #define S_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) x 484 drivers/gpu/drm/radeon/rv515d.h #define G_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) x 487 drivers/gpu/drm/radeon/rv515d.h #define S_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) x 488 drivers/gpu/drm/radeon/rv515d.h #define G_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) x 491 drivers/gpu/drm/radeon/rv515d.h #define S_006880_D2CRTC_MASTER_EN(x) (((x) & 0x1) << 0) x 492 drivers/gpu/drm/radeon/rv515d.h #define G_006880_D2CRTC_MASTER_EN(x) (((x) >> 0) & 0x1) x 494 drivers/gpu/drm/radeon/rv515d.h #define S_006880_D2CRTC_SYNC_RESET_SEL(x) (((x) & 0x1) << 4) x 495 drivers/gpu/drm/radeon/rv515d.h #define G_006880_D2CRTC_SYNC_RESET_SEL(x) (((x) >> 4) & 0x1) x 497 drivers/gpu/drm/radeon/rv515d.h #define S_006880_D2CRTC_DISABLE_POINT_CNTL(x) (((x) & 0x3) << 8) x 498 drivers/gpu/drm/radeon/rv515d.h #define G_006880_D2CRTC_DISABLE_POINT_CNTL(x) (((x) >> 8) & 0x3) x 500 drivers/gpu/drm/radeon/rv515d.h #define S_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) (((x) & 0x1) << 16) x 501 drivers/gpu/drm/radeon/rv515d.h #define G_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) (((x) >> 16) & 0x1) x 503 drivers/gpu/drm/radeon/rv515d.h #define S_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) & 0x1) << 24) x 504 drivers/gpu/drm/radeon/rv515d.h #define G_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) >> 24) & 0x1) x 507 drivers/gpu/drm/radeon/rv515d.h #define S_0068E8_D2CRTC_UPDATE_LOCK(x) (((x) & 0x1) << 0) x 508 drivers/gpu/drm/radeon/rv515d.h #define G_0068E8_D2CRTC_UPDATE_LOCK(x) (((x) >> 0) & 0x1) x 511 drivers/gpu/drm/radeon/rv515d.h #define S_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) x 512 drivers/gpu/drm/radeon/rv515d.h #define G_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) x 515 drivers/gpu/drm/radeon/rv515d.h #define S_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) x 516 drivers/gpu/drm/radeon/rv515d.h #define G_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) x 521 drivers/gpu/drm/radeon/rv515d.h #define S_000001_MC_FB_START(x) (((x) & 0xFFFF) << 0) x 522 drivers/gpu/drm/radeon/rv515d.h #define G_000001_MC_FB_START(x) (((x) >> 0) & 0xFFFF) x 524 drivers/gpu/drm/radeon/rv515d.h #define S_000001_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) x 525 drivers/gpu/drm/radeon/rv515d.h #define G_000001_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) x 528 drivers/gpu/drm/radeon/rv515d.h #define S_000002_MC_AGP_START(x) (((x) & 0xFFFF) << 0) x 529 drivers/gpu/drm/radeon/rv515d.h #define G_000002_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) x 531 drivers/gpu/drm/radeon/rv515d.h #define S_000002_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) x 532 drivers/gpu/drm/radeon/rv515d.h #define G_000002_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) x 535 drivers/gpu/drm/radeon/rv515d.h #define S_000003_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) x 536 drivers/gpu/drm/radeon/rv515d.h #define G_000003_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) x 539 drivers/gpu/drm/radeon/rv515d.h #define S_000004_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) x 540 drivers/gpu/drm/radeon/rv515d.h #define G_000004_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) x 545 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_FORCEON(x) (((x) & 0x1) << 0) x 546 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_FORCEON(x) (((x) >> 0) & 0x1) x 548 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1) x 549 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1) x 551 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_CLOCK_STATUS(x) (((x) & 0x1) << 2) x 552 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_CLOCK_STATUS(x) (((x) >> 2) & 0x1) x 554 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_PROG_SHUTOFF(x) (((x) & 0x1) << 3) x 555 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_PROG_SHUTOFF(x) (((x) >> 3) & 0x1) x 557 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4) x 558 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF) x 560 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12) x 561 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF) x 563 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20) x 564 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1) x 566 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21) x 567 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1) x 569 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_SPARE(x) (((x) & 0x3) << 22) x 570 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_SPARE(x) (((x) >> 22) & 0x3) x 572 drivers/gpu/drm/radeon/rv515d.h #define S_00000F_CP_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24) x 573 drivers/gpu/drm/radeon/rv515d.h #define G_00000F_CP_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF) x 576 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_FORCEON(x) (((x) & 0x1) << 0) x 577 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_FORCEON(x) (((x) >> 0) & 0x1) x 579 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1) x 580 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1) x 582 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_CLOCK_STATUS(x) (((x) & 0x1) << 2) x 583 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_CLOCK_STATUS(x) (((x) >> 2) & 0x1) x 585 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_PROG_SHUTOFF(x) (((x) & 0x1) << 3) x 586 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_PROG_SHUTOFF(x) (((x) >> 3) & 0x1) x 588 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4) x 589 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF) x 591 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12) x 592 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF) x 594 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20) x 595 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1) x 597 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21) x 598 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1) x 600 drivers/gpu/drm/radeon/rv515d.h #define S_000011_SPARE(x) (((x) & 0x3) << 22) x 601 drivers/gpu/drm/radeon/rv515d.h #define G_000011_SPARE(x) (((x) >> 22) & 0x3) x 603 drivers/gpu/drm/radeon/rv515d.h #define S_000011_E2_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24) x 604 drivers/gpu/drm/radeon/rv515d.h #define G_000011_E2_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF) x 607 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_FORCEON(x) (((x) & 0x1) << 0) x 608 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_FORCEON(x) (((x) >> 0) & 0x1) x 610 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1) x 611 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1) x 613 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_CLOCK_STATUS(x) (((x) & 0x1) << 2) x 614 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_CLOCK_STATUS(x) (((x) >> 2) & 0x1) x 616 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_PROG_SHUTOFF(x) (((x) & 0x1) << 3) x 617 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_PROG_SHUTOFF(x) (((x) >> 3) & 0x1) x 619 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4) x 620 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF) x 622 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12) x 623 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF) x 625 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20) x 626 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1) x 628 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21) x 629 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1) x 631 drivers/gpu/drm/radeon/rv515d.h #define S_000013_SPARE(x) (((x) & 0x3) << 22) x 632 drivers/gpu/drm/radeon/rv515d.h #define G_000013_SPARE(x) (((x) >> 22) & 0x3) x 634 drivers/gpu/drm/radeon/rv515d.h #define S_000013_IDCT_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24) x 635 drivers/gpu/drm/radeon/rv515d.h #define G_000013_IDCT_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF) x 37 drivers/gpu/drm/radeon/rv6xxd.h # define SW_GPIO_INDEX(x) ((x) << 6) x 79 drivers/gpu/drm/radeon/rv6xxd.h # define LEVEL0_MPLL_POST_DIV(x) ((x) << 0) x 81 drivers/gpu/drm/radeon/rv6xxd.h # define LEVEL0_MPLL_FB_DIV(x) ((x) << 8) x 83 drivers/gpu/drm/radeon/rv6xxd.h # define LEVEL0_MPLL_REF_DIV(x) ((x) << 20) x 90 drivers/gpu/drm/radeon/rv6xxd.h # define VID_CRT(x) ((x) << 0) x 92 drivers/gpu/drm/radeon/rv6xxd.h # define VID_CRTU(x) ((x) << 13) x 94 drivers/gpu/drm/radeon/rv6xxd.h # define SSTU(x) ((x) << 16) x 96 drivers/gpu/drm/radeon/rv6xxd.h # define VID_SWT(x) ((x) << 19) x 98 drivers/gpu/drm/radeon/rv6xxd.h # define BRT(x) ((x) << 24) x 106 drivers/gpu/drm/radeon/rv6xxd.h # define DYN_PWR_ENTER_INDEX(x) ((x) << 4) x 117 drivers/gpu/drm/radeon/rv6xxd.h # define CTXSW_UPPER_GPIO_VALUES(x) ((x) << 0) x 119 drivers/gpu/drm/radeon/rv6xxd.h # define HIGH_UPPER_GPIO_VALUES(x) ((x) << 3) x 121 drivers/gpu/drm/radeon/rv6xxd.h # define MEDIUM_UPPER_GPIO_VALUES(x) ((x) << 6) x 123 drivers/gpu/drm/radeon/rv6xxd.h # define LOW_UPPER_GPIO_VALUES(x) ((x) << 9) x 131 drivers/gpu/drm/radeon/rv6xxd.h # define DISP1_GAP(x) ((x) << 0) x 133 drivers/gpu/drm/radeon/rv6xxd.h # define DISP2_GAP(x) ((x) << 2) x 135 drivers/gpu/drm/radeon/rv6xxd.h # define VBI_TIMER_COUNT(x) ((x) << 4) x 137 drivers/gpu/drm/radeon/rv6xxd.h # define VBI_TIMER_UNIT(x) ((x) << 20) x 139 drivers/gpu/drm/radeon/rv6xxd.h # define DISP1_GAP_MCHG(x) ((x) << 24) x 141 drivers/gpu/drm/radeon/rv6xxd.h # define DISP2_GAP_MCHG(x) ((x) << 26) x 145 drivers/gpu/drm/radeon/rv6xxd.h # define DPM_EVENT_SRC(x) ((x) << 0) x 148 drivers/gpu/drm/radeon/rv6xxd.h # define TOFFSET(x) ((x) << 4) x 150 drivers/gpu/drm/radeon/rv6xxd.h # define DIG_THERM_DPM(x) ((x) << 12) x 152 drivers/gpu/drm/radeon/rv6xxd.h # define CTF_SEL(x) ((x) << 20) x 159 drivers/gpu/drm/radeon/rv6xxd.h # define CLKS(x) ((x) << 3) x 162 drivers/gpu/drm/radeon/rv6xxd.h # define CLKV(x) ((x) << 11) x 187 drivers/gpu/drm/radeon/rv6xxd.h # define STATE0(x) ((x) << 0) x 189 drivers/gpu/drm/radeon/rv6xxd.h # define STATE1(x) ((x) << 8) x 191 drivers/gpu/drm/radeon/rv6xxd.h # define STATE2(x) ((x) << 16) x 193 drivers/gpu/drm/radeon/rv6xxd.h # define STATE3(x) ((x) << 24) x 199 drivers/gpu/drm/radeon/rv6xxd.h # define POWERMODE0(x) ((x) << 0) x 201 drivers/gpu/drm/radeon/rv6xxd.h # define POWERMODE1(x) ((x) << 8) x 203 drivers/gpu/drm/radeon/rv6xxd.h # define POWERMODE2(x) ((x) << 16) x 205 drivers/gpu/drm/radeon/rv6xxd.h # define POWERMODE3(x) ((x) << 24) x 228 drivers/gpu/drm/radeon/rv6xxd.h # define LC_L0S_INACTIVITY(x) ((x) << 8) x 231 drivers/gpu/drm/radeon/rv6xxd.h # define LC_L1_INACTIVITY(x) ((x) << 12) x 240 drivers/gpu/drm/radeon/rv6xxd.h # define LC_HW_VOLTAGE_IF_CONTROL(x) ((x) << 12) x 31 drivers/gpu/drm/radeon/rv730d.h #define SPLL_REF_DIV(x) ((x) << 4) x 33 drivers/gpu/drm/radeon/rv730d.h #define SPLL_HILEN(x) ((x) << 12) x 35 drivers/gpu/drm/radeon/rv730d.h #define SPLL_LOLEN(x) ((x) << 16) x 38 drivers/gpu/drm/radeon/rv730d.h #define SCLK_MUX_SEL(x) ((x) << 0) x 41 drivers/gpu/drm/radeon/rv730d.h #define SPLL_FB_DIV(x) ((x) << 0) x 50 drivers/gpu/drm/radeon/rv730d.h #define MPLL_REF_DIV(x) ((x) << 4) x 52 drivers/gpu/drm/radeon/rv730d.h #define MPLL_HILEN(x) ((x) << 12) x 54 drivers/gpu/drm/radeon/rv730d.h #define MPLL_LOLEN(x) ((x) << 16) x 57 drivers/gpu/drm/radeon/rv730d.h #define MCLK_MUX_SEL(x) ((x) << 0) x 60 drivers/gpu/drm/radeon/rv730d.h #define MPLL_FB_DIV(x) ((x) << 0) x 73 drivers/gpu/drm/radeon/rv730d.h # define SW_SMIO_INDEX(x) ((x) << 6) x 127 drivers/gpu/drm/radeon/rv730d.h #define CG_R(x) ((x) << 0) x 129 drivers/gpu/drm/radeon/rv730d.h #define CG_L(x) ((x) << 16) x 134 drivers/gpu/drm/radeon/rv730d.h #define CLK_S(x) ((x) << 4) x 137 drivers/gpu/drm/radeon/rv730d.h #define CLK_V(x) ((x) << 0) x 144 drivers/gpu/drm/radeon/rv730d.h #define POWERMODE0(x) ((x) << 0) x 146 drivers/gpu/drm/radeon/rv730d.h #define POWERMODE1(x) ((x) << 8) x 148 drivers/gpu/drm/radeon/rv730d.h #define POWERMODE2(x) ((x) << 16) x 150 drivers/gpu/drm/radeon/rv730d.h #define POWERMODE3(x) ((x) << 24) x 30 drivers/gpu/drm/radeon/rv740d.h #define SPLL_REF_DIV(x) ((x) << 4) x 32 drivers/gpu/drm/radeon/rv740d.h #define SPLL_PDIV_A(x) ((x) << 20) x 35 drivers/gpu/drm/radeon/rv740d.h #define SCLK_MUX_SEL(x) ((x) << 0) x 38 drivers/gpu/drm/radeon/rv740d.h #define SPLL_FB_DIV(x) ((x) << 0) x 46 drivers/gpu/drm/radeon/rv740d.h #define CLKF(x) ((x) << 0) x 48 drivers/gpu/drm/radeon/rv740d.h #define CLKR(x) ((x) << 7) x 50 drivers/gpu/drm/radeon/rv740d.h #define CLKFRAC(x) ((x) << 12) x 52 drivers/gpu/drm/radeon/rv740d.h #define YCLK_POST_DIV(x) ((x) << 17) x 54 drivers/gpu/drm/radeon/rv740d.h #define IBIAS(x) ((x) << 20) x 67 drivers/gpu/drm/radeon/rv740d.h #define DLL_SPEED(x) ((x) << 0) x 104 drivers/gpu/drm/radeon/rv740d.h #define CLK_S(x) ((x) << 4) x 107 drivers/gpu/drm/radeon/rv740d.h #define CLK_V(x) ((x) << 0) x 111 drivers/gpu/drm/radeon/rv740d.h #define CLKV(x) ((x) << 0) x 114 drivers/gpu/drm/radeon/rv740d.h #define CLKS(x) ((x) << 0) x 47 drivers/gpu/drm/radeon/rv770d.h # define UPLL_REF_DIV(x) ((x) << 16) x 52 drivers/gpu/drm/radeon/rv770d.h # define UPLL_SW_HILEN(x) ((x) << 0) x 53 drivers/gpu/drm/radeon/rv770d.h # define UPLL_SW_LOLEN(x) ((x) << 4) x 54 drivers/gpu/drm/radeon/rv770d.h # define UPLL_SW_HILEN2(x) ((x) << 8) x 55 drivers/gpu/drm/radeon/rv770d.h # define UPLL_SW_LOLEN2(x) ((x) << 12) x 57 drivers/gpu/drm/radeon/rv770d.h # define VCLK_SRC_SEL(x) ((x) << 20) x 59 drivers/gpu/drm/radeon/rv770d.h # define DCLK_SRC_SEL(x) ((x) << 25) x 62 drivers/gpu/drm/radeon/rv770d.h # define UPLL_FB_DIV(x) ((x) << 0) x 74 drivers/gpu/drm/radeon/rv770d.h #define HOST_SMC_MSG(x) ((x) << 0) x 77 drivers/gpu/drm/radeon/rv770d.h #define HOST_SMC_RESP(x) ((x) << 8) x 80 drivers/gpu/drm/radeon/rv770d.h #define SMC_HOST_MSG(x) ((x) << 16) x 83 drivers/gpu/drm/radeon/rv770d.h #define SMC_HOST_RESP(x) ((x) << 24) x 94 drivers/gpu/drm/radeon/rv770d.h #define SPLL_REF_DIV(x) ((x) << 4) x 96 drivers/gpu/drm/radeon/rv770d.h #define SPLL_HILEN(x) ((x) << 12) x 98 drivers/gpu/drm/radeon/rv770d.h #define SPLL_LOLEN(x) ((x) << 16) x 101 drivers/gpu/drm/radeon/rv770d.h #define SCLK_MUX_SEL(x) ((x) << 0) x 105 drivers/gpu/drm/radeon/rv770d.h #define SPLL_FB_DIV(x) ((x) << 0) x 119 drivers/gpu/drm/radeon/rv770d.h #define CLKF(x) ((x) << 0) x 121 drivers/gpu/drm/radeon/rv770d.h #define CLKR(x) ((x) << 7) x 123 drivers/gpu/drm/radeon/rv770d.h #define CLKFRAC(x) ((x) << 12) x 125 drivers/gpu/drm/radeon/rv770d.h #define YCLK_POST_DIV(x) ((x) << 17) x 127 drivers/gpu/drm/radeon/rv770d.h #define IBIAS(x) ((x) << 20) x 146 drivers/gpu/drm/radeon/rv770d.h # define SW_SMIO_INDEX(x) ((x) << 6) x 172 drivers/gpu/drm/radeon/rv770d.h # define DLL_SPEED(x) ((x) << 0) x 208 drivers/gpu/drm/radeon/rv770d.h # define MPLL_LOCK_TIME(x) ((x) << 0) x 210 drivers/gpu/drm/radeon/rv770d.h # define MPLL_RESET_TIME(x) ((x) << 16) x 228 drivers/gpu/drm/radeon/rv770d.h # define UTC_0(x) ((x) << 0) x 230 drivers/gpu/drm/radeon/rv770d.h # define DTC_0(x) ((x) << 10) x 234 drivers/gpu/drm/radeon/rv770d.h # define BSP(x) ((x) << 0) x 236 drivers/gpu/drm/radeon/rv770d.h # define BSU(x) ((x) << 16) x 239 drivers/gpu/drm/radeon/rv770d.h # define CG_R(x) ((x) << 0) x 241 drivers/gpu/drm/radeon/rv770d.h # define CG_L(x) ((x) << 16) x 244 drivers/gpu/drm/radeon/rv770d.h # define CG_GICST(x) ((x) << 0) x 246 drivers/gpu/drm/radeon/rv770d.h # define CG_GIPOT(x) ((x) << 16) x 250 drivers/gpu/drm/radeon/rv770d.h # define SST(x) ((x) << 0) x 252 drivers/gpu/drm/radeon/rv770d.h # define SSTU(x) ((x) << 16) x 256 drivers/gpu/drm/radeon/rv770d.h # define DISP1_GAP(x) ((x) << 0) x 258 drivers/gpu/drm/radeon/rv770d.h # define DISP2_GAP(x) ((x) << 2) x 260 drivers/gpu/drm/radeon/rv770d.h # define VBI_TIMER_COUNT(x) ((x) << 4) x 262 drivers/gpu/drm/radeon/rv770d.h # define VBI_TIMER_UNIT(x) ((x) << 20) x 264 drivers/gpu/drm/radeon/rv770d.h # define DISP1_GAP_MCHG(x) ((x) << 24) x 266 drivers/gpu/drm/radeon/rv770d.h # define DISP2_GAP_MCHG(x) ((x) << 26) x 271 drivers/gpu/drm/radeon/rv770d.h #define CLKS(x) ((x) << 4) x 274 drivers/gpu/drm/radeon/rv770d.h #define CLKV(x) ((x) << 0) x 291 drivers/gpu/drm/radeon/rv770d.h #define STATE0(x) ((x) << 0) x 293 drivers/gpu/drm/radeon/rv770d.h #define STATE1(x) ((x) << 8) x 295 drivers/gpu/drm/radeon/rv770d.h #define STATE2(x) ((x) << 16) x 297 drivers/gpu/drm/radeon/rv770d.h #define STATE3(x) ((x) << 24) x 301 drivers/gpu/drm/radeon/rv770d.h #define POWERMODE0(x) ((x) << 0) x 303 drivers/gpu/drm/radeon/rv770d.h #define POWERMODE1(x) ((x) << 8) x 305 drivers/gpu/drm/radeon/rv770d.h #define POWERMODE2(x) ((x) << 16) x 307 drivers/gpu/drm/radeon/rv770d.h #define POWERMODE3(x) ((x) << 24) x 325 drivers/gpu/drm/radeon/rv770d.h #define BACKEND_DISABLE(x) ((x) << 16) x 342 drivers/gpu/drm/radeon/rv770d.h #define STQ_SPLIT(x) ((x) << 0) x 347 drivers/gpu/drm/radeon/rv770d.h #define ROQ_IB1_START(x) ((x) << 0) x 348 drivers/gpu/drm/radeon/rv770d.h #define ROQ_IB2_START(x) ((x) << 8) x 350 drivers/gpu/drm/radeon/rv770d.h #define RB_BUFSZ(x) ((x) << 0) x 351 drivers/gpu/drm/radeon/rv770d.h #define RB_BLKSZ(x) ((x) << 8) x 366 drivers/gpu/drm/radeon/rv770d.h #define DB_CLK_OFF_DELAY(x) ((x) << 11) x 371 drivers/gpu/drm/radeon/rv770d.h #define PIPE_TILING(x) ((x) << 1) x 372 drivers/gpu/drm/radeon/rv770d.h #define BANK_TILING(x) ((x) << 4) x 373 drivers/gpu/drm/radeon/rv770d.h #define GROUP_SIZE(x) ((x) << 6) x 374 drivers/gpu/drm/radeon/rv770d.h #define ROW_TILING(x) ((x) << 8) x 375 drivers/gpu/drm/radeon/rv770d.h #define BANK_SWAPS(x) ((x) << 11) x 376 drivers/gpu/drm/radeon/rv770d.h #define SAMPLE_SPLIT(x) ((x) << 14) x 377 drivers/gpu/drm/radeon/rv770d.h #define BACKEND_MAP(x) ((x) << 16) x 393 drivers/gpu/drm/radeon/rv770d.h #define INACTIVE_QD_PIPES(x) ((x) << 8) x 396 drivers/gpu/drm/radeon/rv770d.h #define INACTIVE_SIMDS(x) ((x) << 16) x 400 drivers/gpu/drm/radeon/rv770d.h #define GRBM_READ_TIMEOUT(x) ((x) << 0) x 409 drivers/gpu/drm/radeon/rv770d.h #define DPM_EVENT_SRC(x) ((x) << 0) x 411 drivers/gpu/drm/radeon/rv770d.h #define DIG_THERM_DPM(x) ((x) << 14) x 416 drivers/gpu/drm/radeon/rv770d.h #define DIG_THERM_INTH(x) ((x) << 8) x 419 drivers/gpu/drm/radeon/rv770d.h #define DIG_THERM_INTL(x) ((x) << 16) x 426 drivers/gpu/drm/radeon/rv770d.h #define ASIC_T(x) ((x) << 16) x 472 drivers/gpu/drm/radeon/rv770d.h #define EFFECTIVE_L1_TLB_SIZE(x) ((x)<<15) x 473 drivers/gpu/drm/radeon/rv770d.h #define EFFECTIVE_L1_QUEUE_SIZE(x) ((x)<<18) x 484 drivers/gpu/drm/radeon/rv770d.h #define NUM_CLIP_SEQ(x) ((x) << 1) x 489 drivers/gpu/drm/radeon/rv770d.h #define SC_PRIM_FIFO_SIZE(x) ((x) << 0) x 490 drivers/gpu/drm/radeon/rv770d.h #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12) x 492 drivers/gpu/drm/radeon/rv770d.h #define FORCE_EOV_MAX_CLK_CNT(x) ((x)<<0) x 493 drivers/gpu/drm/radeon/rv770d.h #define FORCE_EOV_MAX_REZ_CNT(x) ((x)<<16) x 498 drivers/gpu/drm/radeon/rv770d.h #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20) x 514 drivers/gpu/drm/radeon/rv770d.h #define CACHE_DEPTH(x) ((x) << 1) x 518 drivers/gpu/drm/radeon/rv770d.h #define ES_FLUSH_CTL(x) ((x) << 0) x 519 drivers/gpu/drm/radeon/rv770d.h #define GS_FLUSH_CTL(x) ((x) << 3) x 520 drivers/gpu/drm/radeon/rv770d.h #define ACK_FLUSH_CTL(x) ((x) << 6) x 524 drivers/gpu/drm/radeon/rv770d.h #define GPR_WRITE_PRIORITY(x) ((x) << 0) x 527 drivers/gpu/drm/radeon/rv770d.h #define VTX_DONE_DELAY(x) ((x) << 0) x 531 drivers/gpu/drm/radeon/rv770d.h #define NUM_INTERP(x) ((x)<<0) x 534 drivers/gpu/drm/radeon/rv770d.h #define POSITION_ADDR(x) ((x)<<10) x 535 drivers/gpu/drm/radeon/rv770d.h #define PARAM_GEN(x) ((x)<<15) x 536 drivers/gpu/drm/radeon/rv770d.h #define PARAM_GEN_ADDR(x) ((x)<<19) x 537 drivers/gpu/drm/radeon/rv770d.h #define BARYC_SAMPLE_CNTL(x) ((x)<<26) x 549 drivers/gpu/drm/radeon/rv770d.h #define CLAUSE_SEQ_PRIO(x) ((x) << 8) x 550 drivers/gpu/drm/radeon/rv770d.h #define PS_PRIO(x) ((x) << 24) x 551 drivers/gpu/drm/radeon/rv770d.h #define VS_PRIO(x) ((x) << 26) x 552 drivers/gpu/drm/radeon/rv770d.h #define GS_PRIO(x) ((x) << 28) x 554 drivers/gpu/drm/radeon/rv770d.h #define SIMDA_RING0(x) ((x)<<0) x 555 drivers/gpu/drm/radeon/rv770d.h #define SIMDA_RING1(x) ((x)<<8) x 556 drivers/gpu/drm/radeon/rv770d.h #define SIMDB_RING0(x) ((x)<<16) x 557 drivers/gpu/drm/radeon/rv770d.h #define SIMDB_RING1(x) ((x)<<24) x 565 drivers/gpu/drm/radeon/rv770d.h #define ES_PRIO(x) ((x) << 30) x 567 drivers/gpu/drm/radeon/rv770d.h #define NUM_PS_GPRS(x) ((x) << 0) x 568 drivers/gpu/drm/radeon/rv770d.h #define NUM_VS_GPRS(x) ((x) << 16) x 570 drivers/gpu/drm/radeon/rv770d.h #define NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28) x 572 drivers/gpu/drm/radeon/rv770d.h #define NUM_GS_GPRS(x) ((x) << 0) x 573 drivers/gpu/drm/radeon/rv770d.h #define NUM_ES_GPRS(x) ((x) << 16) x 575 drivers/gpu/drm/radeon/rv770d.h #define CACHE_FIFO_SIZE(x) ((x) << 0) x 576 drivers/gpu/drm/radeon/rv770d.h #define FETCH_FIFO_HIWATER(x) ((x) << 8) x 577 drivers/gpu/drm/radeon/rv770d.h #define DONE_FIFO_HIWATER(x) ((x) << 16) x 578 drivers/gpu/drm/radeon/rv770d.h #define ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24) x 580 drivers/gpu/drm/radeon/rv770d.h #define NUM_PS_STACK_ENTRIES(x) ((x) << 0) x 581 drivers/gpu/drm/radeon/rv770d.h #define NUM_VS_STACK_ENTRIES(x) ((x) << 16) x 583 drivers/gpu/drm/radeon/rv770d.h #define NUM_GS_STACK_ENTRIES(x) ((x) << 0) x 584 drivers/gpu/drm/radeon/rv770d.h #define NUM_ES_STACK_ENTRIES(x) ((x) << 16) x 586 drivers/gpu/drm/radeon/rv770d.h #define NUM_PS_THREADS(x) ((x) << 0) x 587 drivers/gpu/drm/radeon/rv770d.h #define NUM_VS_THREADS(x) ((x) << 8) x 588 drivers/gpu/drm/radeon/rv770d.h #define NUM_GS_THREADS(x) ((x) << 16) x 589 drivers/gpu/drm/radeon/rv770d.h #define NUM_ES_THREADS(x) ((x) << 24) x 594 drivers/gpu/drm/radeon/rv770d.h #define COLOR_BUFFER_SIZE(x) ((x) << 0) x 595 drivers/gpu/drm/radeon/rv770d.h #define POSITION_BUFFER_SIZE(x) ((x) << 8) x 596 drivers/gpu/drm/radeon/rv770d.h #define SMX_BUFFER_SIZE(x) ((x) << 16) x 614 drivers/gpu/drm/radeon/rv770d.h #define CACHE_INVALIDATION(x) ((x)<<0) x 618 drivers/gpu/drm/radeon/rv770d.h #define AUTO_INVLD_EN(x) ((x) << 6) x 636 drivers/gpu/drm/radeon/rv770d.h #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) x 646 drivers/gpu/drm/radeon/rv770d.h #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) x 651 drivers/gpu/drm/radeon/rv770d.h #define BANK_SELECT(x) ((x) << 0) x 652 drivers/gpu/drm/radeon/rv770d.h #define CACHE_UPDATE_MODE(x) ((x) << 6) x 691 drivers/gpu/drm/radeon/rv770d.h # define HDMI_AUDIO_DELAY_EN(x) (((x) & 3) << 4) x 692 drivers/gpu/drm/radeon/rv770d.h # define HDMI_AUDIO_PACKETS_PER_LINE(x) (((x) & 0x1f) << 16) x 696 drivers/gpu/drm/radeon/rv770d.h # define HDMI_ACR_SELECT(x) (((x) & 3) << 4) x 715 drivers/gpu/drm/radeon/rv770d.h # define HDMI_AVI_INFO_LINE(x) (((x) & 0x3f) << 0) x 716 drivers/gpu/drm/radeon/rv770d.h # define HDMI_AUDIO_INFO_LINE(x) (((x) & 0x3f) << 8) x 717 drivers/gpu/drm/radeon/rv770d.h # define HDMI_MPEG_INFO_LINE(x) (((x) & 0x3f) << 16) x 723 drivers/gpu/drm/radeon/rv770d.h # define HDMI_GENERIC0_LINE(x) (((x) & 0x3f) << 16) x 724 drivers/gpu/drm/radeon/rv770d.h # define HDMI_GENERIC1_LINE(x) (((x) & 0x3f) << 24) x 731 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_CHANNEL_ENABLE(x) (((x) & 0xff) << 8) x 732 drivers/gpu/drm/radeon/rv770d.h # define AFMT_DP_AUDIO_STREAM_ID(x) (((x) & 0xff) << 16) x 734 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 735 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_S(x) (((x) & 3) << 8) x 736 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_B(x) (((x) & 3) << 10) x 737 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_A(x) (((x) & 1) << 12) x 738 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_Y(x) (((x) & 3) << 13) x 742 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_Y_A_B_S(x) (((x) & 0xff) << 8) x 743 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_R(x) (((x) & 0xf) << 16) x 744 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_M(x) (((x) & 0x3) << 20) x 745 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_C(x) (((x) & 0x3) << 22) x 746 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_C_M_R(x) (((x) & 0xff) << 16) x 747 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_SC(x) (((x) & 0x3) << 24) x 748 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_Q(x) (((x) & 0x3) << 26) x 749 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_EC(x) (((x) & 0x3) << 28) x 750 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_ITC(x) (((x) & 0x1) << 31) x 751 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_ITC_EC_Q_SC(x) (((x) & 0xff) << 24) x 753 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_VIC(x) (((x) & 0x7f) << 0) /* don't use avi infoframe v1 */ x 754 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_PR(x) (((x) & 0xf) << 8) /* don't use avi infoframe v1 */ x 755 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_TOP(x) (((x) & 0xffff) << 16) x 757 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_BOTTOM(x) (((x) & 0xffff) << 0) x 758 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_LEFT(x) (((x) & 0xffff) << 16) x 760 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_RIGHT(x) (((x) & 0xffff) << 0) x 761 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AVI_INFO_VERSION(x) (((x) & 3) << 24) x 763 drivers/gpu/drm/radeon/rv770d.h # define AFMT_MPEG_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 764 drivers/gpu/drm/radeon/rv770d.h # define AFMT_MPEG_INFO_MB0(x) (((x) & 0xff) << 8) x 765 drivers/gpu/drm/radeon/rv770d.h # define AFMT_MPEG_INFO_MB1(x) (((x) & 0xff) << 16) x 766 drivers/gpu/drm/radeon/rv770d.h # define AFMT_MPEG_INFO_MB2(x) (((x) & 0xff) << 24) x 768 drivers/gpu/drm/radeon/rv770d.h # define AFMT_MPEG_INFO_MB3(x) (((x) & 0xff) << 0) x 769 drivers/gpu/drm/radeon/rv770d.h # define AFMT_MPEG_INFO_MF(x) (((x) & 3) << 8) x 770 drivers/gpu/drm/radeon/rv770d.h # define AFMT_MPEG_INFO_FR(x) (((x) & 1) << 12) x 788 drivers/gpu/drm/radeon/rv770d.h # define HDMI_ACR_CTS_32(x) (((x) & 0xfffff) << 12) x 790 drivers/gpu/drm/radeon/rv770d.h # define HDMI_ACR_N_32(x) (((x) & 0xfffff) << 0) x 792 drivers/gpu/drm/radeon/rv770d.h # define HDMI_ACR_CTS_44(x) (((x) & 0xfffff) << 12) x 794 drivers/gpu/drm/radeon/rv770d.h # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0) x 796 drivers/gpu/drm/radeon/rv770d.h # define HDMI_ACR_CTS_48(x) (((x) & 0xfffff) << 12) x 798 drivers/gpu/drm/radeon/rv770d.h # define HDMI_ACR_N_48(x) (((x) & 0xfffff) << 0) x 802 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_INFO_CHECKSUM(x) (((x) & 0xff) << 0) x 803 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_INFO_CC(x) (((x) & 7) << 8) x 804 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_INFO_CHECKSUM_OFFSET(x) (((x) & 0xff) << 16) x 806 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_INFO_CA(x) (((x) & 0xff) << 0) x 807 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_INFO_LSV(x) (((x) & 0xf) << 11) x 808 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_INFO_DM_INH(x) (((x) & 1) << 15) x 809 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_INFO_DM_INH_LSV(x) (((x) & 0xff) << 8) x 811 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_A(x) (((x) & 1) << 0) x 812 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_B(x) (((x) & 1) << 1) x 813 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_C(x) (((x) & 1) << 2) x 814 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_D(x) (((x) & 3) << 3) x 815 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_MODE(x) (((x) & 3) << 6) x 816 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CATEGORY_CODE(x) (((x) & 0xff) << 8) x 817 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_SOURCE_NUMBER(x) (((x) & 0xf) << 16) x 818 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_L(x) (((x) & 0xf) << 20) x 819 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 24) x 820 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CLOCK_ACCURACY(x) (((x) & 3) << 28) x 822 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_WORD_LENGTH(x) (((x) & 0xf) << 0) x 823 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_ORIGINAL_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 4) x 824 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_VALID_L(x) (((x) & 1) << 16) x 825 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_VALID_R(x) (((x) & 1) << 18) x 826 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_R(x) (((x) & 0xf) << 20) x 830 drivers/gpu/drm/radeon/rv770d.h # define AFMT_RAMP_MAX_COUNT(x) (((x) & 0xffffff) << 0) x 833 drivers/gpu/drm/radeon/rv770d.h # define AFMT_RAMP_MIN_COUNT(x) (((x) & 0xffffff) << 0) x 834 drivers/gpu/drm/radeon/rv770d.h # define AFMT_AUDIO_TEST_CH_DISABLE(x) (((x) & 0xff) << 24) x 836 drivers/gpu/drm/radeon/rv770d.h # define AFMT_RAMP_INC_COUNT(x) (((x) & 0xffffff) << 0) x 838 drivers/gpu/drm/radeon/rv770d.h # define AFMT_RAMP_DEC_COUNT(x) (((x) & 0xffffff) << 0) x 840 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_2(x) (((x) & 0xf) << 0) x 841 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_3(x) (((x) & 0xf) << 4) x 842 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_4(x) (((x) & 0xf) << 8) x 843 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_5(x) (((x) & 0xf) << 12) x 844 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_6(x) (((x) & 0xf) << 16) x 845 drivers/gpu/drm/radeon/rv770d.h # define AFMT_60958_CS_CHANNEL_NUMBER_7(x) (((x) & 0xf) << 20) x 886 drivers/gpu/drm/radeon/rv770d.h # define MAX_CHANNELS(x) (((x) & 0x7) << 0) x 888 drivers/gpu/drm/radeon/rv770d.h # define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8) x 889 drivers/gpu/drm/radeon/rv770d.h # define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16) x 890 drivers/gpu/drm/radeon/rv770d.h # define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */ x 934 drivers/gpu/drm/radeon/rv770d.h # define LC_L0S_INACTIVITY(x) ((x) << 8) x 937 drivers/gpu/drm/radeon/rv770d.h # define LC_L1_INACTIVITY(x) ((x) << 12) x 969 drivers/gpu/drm/radeon/rv770d.h # define LC_HW_VOLTAGE_IF_CONTROL(x) ((x) << 12) x 166 drivers/gpu/drm/radeon/si.c #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc)) x 167 drivers/gpu/drm/radeon/si.c #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc)) x 168 drivers/gpu/drm/radeon/si.c #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc)) x 34 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_DEPTH(x) (((x) & 0x3) << 0) x 38 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) x 43 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_Z(x) (((x) & 0x3) << 4) x 44 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) x 49 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_FORMAT(x) (((x) & 0x7) << 8) x 68 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) x 73 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) x 81 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) x 86 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) x 91 drivers/gpu/drm/radeon/si_reg.h # define SI_GRPH_PIPE_CONFIG(x) (((x) & 0x1f) << 24) x 78 drivers/gpu/drm/radeon/sid.h #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) x 81 drivers/gpu/drm/radeon/sid.h #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) x 89 drivers/gpu/drm/radeon/sid.h #define SPLL_REF_DIV(x) ((x) << 4) x 91 drivers/gpu/drm/radeon/sid.h #define SPLL_PDIV_A(x) ((x) << 20) x 95 drivers/gpu/drm/radeon/sid.h #define SCLK_MUX_SEL(x) ((x) << 0) x 100 drivers/gpu/drm/radeon/sid.h #define SPLL_FB_DIV(x) ((x) << 0) x 110 drivers/gpu/drm/radeon/sid.h # define SPLL_REFCLK_SEL(x) ((x) << 26) x 115 drivers/gpu/drm/radeon/sid.h #define CLK_S(x) ((x) << 4) x 119 drivers/gpu/drm/radeon/sid.h #define CLK_V(x) ((x) << 0) x 137 drivers/gpu/drm/radeon/sid.h # define UPLL_PDIV_A(x) ((x) << 0) x 139 drivers/gpu/drm/radeon/sid.h # define UPLL_PDIV_B(x) ((x) << 8) x 141 drivers/gpu/drm/radeon/sid.h # define VCLK_SRC_SEL(x) ((x) << 20) x 143 drivers/gpu/drm/radeon/sid.h # define DCLK_SRC_SEL(x) ((x) << 25) x 146 drivers/gpu/drm/radeon/sid.h # define UPLL_FB_DIV(x) ((x) << 0) x 156 drivers/gpu/drm/radeon/sid.h # define MPLL_CLKOUT_SEL(x) ((x) << 8) x 167 drivers/gpu/drm/radeon/sid.h # define CMON_CLK_SEL(x) ((x) << 0) x 169 drivers/gpu/drm/radeon/sid.h # define TMON_CLK_SEL(x) ((x) << 8) x 172 drivers/gpu/drm/radeon/sid.h # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0) x 174 drivers/gpu/drm/radeon/sid.h # define ZCLK_SEL(x) ((x) << 8) x 178 drivers/gpu/drm/radeon/sid.h #define DPM_EVENT_SRC(x) ((x) << 0) x 180 drivers/gpu/drm/radeon/sid.h #define DIG_THERM_DPM(x) ((x) << 14) x 184 drivers/gpu/drm/radeon/sid.h #define FDO_PWM_DUTY(x) ((x) << 9) x 188 drivers/gpu/drm/radeon/sid.h #define DIG_THERM_INTH(x) ((x) << 8) x 191 drivers/gpu/drm/radeon/sid.h #define DIG_THERM_INTL(x) ((x) << 16) x 198 drivers/gpu/drm/radeon/sid.h #define TEMP_SEL(x) ((x) << 20) x 202 drivers/gpu/drm/radeon/sid.h #define ASIC_MAX_TEMP(x) ((x) << 0) x 205 drivers/gpu/drm/radeon/sid.h #define CTF_TEMP(x) ((x) << 9) x 210 drivers/gpu/drm/radeon/sid.h #define FDO_STATIC_DUTY(x) ((x) << 0) x 214 drivers/gpu/drm/radeon/sid.h #define FMAX_DUTY100(x) ((x) << 0) x 218 drivers/gpu/drm/radeon/sid.h #define TMIN(x) ((x) << 0) x 221 drivers/gpu/drm/radeon/sid.h #define FDO_PWM_MODE(x) ((x) << 11) x 224 drivers/gpu/drm/radeon/sid.h #define TACH_PWM_RESP_RATE(x) ((x) << 25) x 229 drivers/gpu/drm/radeon/sid.h # define EDGE_PER_REV(x) ((x) << 0) x 232 drivers/gpu/drm/radeon/sid.h # define TARGET_PERIOD(x) ((x) << 3) x 236 drivers/gpu/drm/radeon/sid.h # define TACH_PERIOD(x) ((x) << 0) x 245 drivers/gpu/drm/radeon/sid.h # define SW_SMIO_INDEX(x) ((x) << 6) x 273 drivers/gpu/drm/radeon/sid.h # define UTC_0(x) ((x) << 0) x 275 drivers/gpu/drm/radeon/sid.h # define DTC_0(x) ((x) << 10) x 279 drivers/gpu/drm/radeon/sid.h # define BSP(x) ((x) << 0) x 281 drivers/gpu/drm/radeon/sid.h # define BSU(x) ((x) << 16) x 284 drivers/gpu/drm/radeon/sid.h # define CG_R(x) ((x) << 0) x 286 drivers/gpu/drm/radeon/sid.h # define CG_L(x) ((x) << 16) x 290 drivers/gpu/drm/radeon/sid.h # define CG_GICST(x) ((x) << 0) x 292 drivers/gpu/drm/radeon/sid.h # define CG_GIPOT(x) ((x) << 16) x 296 drivers/gpu/drm/radeon/sid.h # define SST(x) ((x) << 0) x 298 drivers/gpu/drm/radeon/sid.h # define SSTU(x) ((x) << 16) x 302 drivers/gpu/drm/radeon/sid.h # define DISP1_GAP(x) ((x) << 0) x 304 drivers/gpu/drm/radeon/sid.h # define DISP2_GAP(x) ((x) << 2) x 306 drivers/gpu/drm/radeon/sid.h # define VBI_TIMER_COUNT(x) ((x) << 4) x 308 drivers/gpu/drm/radeon/sid.h # define VBI_TIMER_UNIT(x) ((x) << 20) x 310 drivers/gpu/drm/radeon/sid.h # define DISP1_GAP_MCHG(x) ((x) << 24) x 312 drivers/gpu/drm/radeon/sid.h # define DISP2_GAP_MCHG(x) ((x) << 26) x 321 drivers/gpu/drm/radeon/sid.h # define CAC_WINDOW(x) ((x) << 0) x 329 drivers/gpu/drm/radeon/sid.h # define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) x 372 drivers/gpu/drm/radeon/sid.h #define L2_CACHE_PTE_ENDIAN_SWAP_MODE(x) ((x) << 2) x 373 drivers/gpu/drm/radeon/sid.h #define L2_CACHE_PDE_ENDIAN_SWAP_MODE(x) ((x) << 4) x 376 drivers/gpu/drm/radeon/sid.h #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) x 377 drivers/gpu/drm/radeon/sid.h #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) x 381 drivers/gpu/drm/radeon/sid.h #define INVALIDATE_CACHE_MODE(x) ((x) << 26) x 386 drivers/gpu/drm/radeon/sid.h #define BANK_SELECT(x) ((x) << 0) x 387 drivers/gpu/drm/radeon/sid.h #define L2_CACHE_UPDATE_MODE(x) ((x) << 6) x 388 drivers/gpu/drm/radeon/sid.h #define L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15) x 394 drivers/gpu/drm/radeon/sid.h #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) x 407 drivers/gpu/drm/radeon/sid.h #define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) x 516 drivers/gpu/drm/radeon/sid.h #define STATE0(x) ((x) << 0) x 519 drivers/gpu/drm/radeon/sid.h #define STATE1(x) ((x) << 5) x 522 drivers/gpu/drm/radeon/sid.h #define STATE2(x) ((x) << 10) x 525 drivers/gpu/drm/radeon/sid.h #define STATE3(x) ((x) << 15) x 597 drivers/gpu/drm/radeon/sid.h # define DLL_SPEED(x) ((x) << 0) x 613 drivers/gpu/drm/radeon/sid.h #define BWCTRL(x) ((x) << 20) x 616 drivers/gpu/drm/radeon/sid.h #define VCO_MODE(x) ((x) << 0) x 618 drivers/gpu/drm/radeon/sid.h #define CLKFRAC(x) ((x) << 4) x 620 drivers/gpu/drm/radeon/sid.h #define CLKF(x) ((x) << 16) x 624 drivers/gpu/drm/radeon/sid.h #define YCLK_POST_DIV(x) ((x) << 0) x 627 drivers/gpu/drm/radeon/sid.h #define YCLK_SEL(x) ((x) << 4) x 631 drivers/gpu/drm/radeon/sid.h #define CLKV(x) ((x) << 0) x 634 drivers/gpu/drm/radeon/sid.h #define CLKS(x) ((x) << 0) x 653 drivers/gpu/drm/radeon/sid.h # define IH_IB_SIZE(x) ((x) << 1) /* log2 */ x 656 drivers/gpu/drm/radeon/sid.h # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ x 668 drivers/gpu/drm/radeon/sid.h # define IH_MC_SWAP(x) ((x) << 1) x 674 drivers/gpu/drm/radeon/sid.h # define MC_WRREQ_CREDIT(x) ((x) << 15) x 675 drivers/gpu/drm/radeon/sid.h # define MC_WR_CLEAN_CNT(x) ((x) << 20) x 676 drivers/gpu/drm/radeon/sid.h # define MC_VMID(x) ((x) << 25) x 697 drivers/gpu/drm/radeon/sid.h # define AZ_ENDPOINT_REG_INDEX(x) (((x) & 0xff) << 0) x 702 drivers/gpu/drm/radeon/sid.h #define SPEAKER_ALLOCATION(x) (((x) & 0x7f) << 0) x 722 drivers/gpu/drm/radeon/sid.h # define MAX_CHANNELS(x) (((x) & 0x7) << 0) x 724 drivers/gpu/drm/radeon/sid.h # define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8) x 725 drivers/gpu/drm/radeon/sid.h # define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16) x 726 drivers/gpu/drm/radeon/sid.h # define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */ x 738 drivers/gpu/drm/radeon/sid.h # define VIDEO_LIPSYNC(x) (((x) & 0xff) << 0) x 739 drivers/gpu/drm/radeon/sid.h # define AUDIO_LIPSYNC(x) (((x) & 0xff) << 8) x 749 drivers/gpu/drm/radeon/sid.h # define MANUFACTURER_ID(x) (((x) & 0xffff) << 0) x 750 drivers/gpu/drm/radeon/sid.h # define PRODUCT_ID(x) (((x) & 0xffff) << 16) x 752 drivers/gpu/drm/radeon/sid.h # define SINK_DESCRIPTION_LEN(x) (((x) & 0xff) << 0) x 754 drivers/gpu/drm/radeon/sid.h # define PORT_ID0(x) (((x) & 0xffffffff) << 0) x 756 drivers/gpu/drm/radeon/sid.h # define PORT_ID1(x) (((x) & 0xffffffff) << 0) x 758 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION0(x) (((x) & 0xff) << 0) x 759 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION1(x) (((x) & 0xff) << 8) x 760 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION2(x) (((x) & 0xff) << 16) x 761 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION3(x) (((x) & 0xff) << 24) x 763 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION4(x) (((x) & 0xff) << 0) x 764 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION5(x) (((x) & 0xff) << 8) x 765 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION6(x) (((x) & 0xff) << 16) x 766 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION7(x) (((x) & 0xff) << 24) x 768 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION8(x) (((x) & 0xff) << 0) x 769 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION9(x) (((x) & 0xff) << 8) x 770 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION10(x) (((x) & 0xff) << 16) x 771 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION11(x) (((x) & 0xff) << 24) x 773 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION12(x) (((x) & 0xff) << 0) x 774 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION13(x) (((x) & 0xff) << 8) x 775 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION14(x) (((x) & 0xff) << 16) x 776 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION15(x) (((x) & 0xff) << 24) x 778 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION16(x) (((x) & 0xff) << 0) x 779 drivers/gpu/drm/radeon/sid.h # define DESCRIPTION17(x) (((x) & 0xff) << 8) x 789 drivers/gpu/drm/radeon/sid.h #define DC_LB_MEMORY_CONFIG(x) ((x) << 20) x 798 drivers/gpu/drm/radeon/sid.h # define LATENCY_WATERMARK_MASK(x) ((x) << 16) x 800 drivers/gpu/drm/radeon/sid.h # define LATENCY_LOW_WATERMARK(x) ((x) << 0) x 801 drivers/gpu/drm/radeon/sid.h # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) x 898 drivers/gpu/drm/radeon/sid.h # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) x 899 drivers/gpu/drm/radeon/sid.h # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) x 910 drivers/gpu/drm/radeon/sid.h # define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) << 0) /* crtc0 - crtc5 */ x 919 drivers/gpu/drm/radeon/sid.h # define DENTIST_DPREFCLK_WDIVIDER(x) (((x) & 0x7f) << 24) x 924 drivers/gpu/drm/radeon/sid.h #define AFMT_AUDIO_SRC_SELECT(x) (((x) & 7) << 0) x 935 drivers/gpu/drm/radeon/sid.h #define GRBM_READ_TIMEOUT(x) ((x) << 0) x 999 drivers/gpu/drm/radeon/sid.h #define INSTANCE_INDEX(x) ((x) << 0) x 1000 drivers/gpu/drm/radeon/sid.h #define SH_INDEX(x) ((x) << 8) x 1001 drivers/gpu/drm/radeon/sid.h #define SE_INDEX(x) ((x) << 16) x 1040 drivers/gpu/drm/radeon/sid.h #define ROQ_IB1_START(x) ((x) << 0) x 1041 drivers/gpu/drm/radeon/sid.h #define ROQ_IB2_START(x) ((x) << 8) x 1043 drivers/gpu/drm/radeon/sid.h #define MEQ1_START(x) ((x) << 0) x 1044 drivers/gpu/drm/radeon/sid.h #define MEQ2_START(x) ((x) << 8) x 1051 drivers/gpu/drm/radeon/sid.h #define CACHE_INVALIDATION(x) ((x) << 0) x 1055 drivers/gpu/drm/radeon/sid.h #define AUTO_INVLD_EN(x) ((x) << 6) x 1084 drivers/gpu/drm/radeon/sid.h #define NUM_CLIP_SEQ(x) ((x) << 1) x 1091 drivers/gpu/drm/radeon/sid.h #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) x 1092 drivers/gpu/drm/radeon/sid.h #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) x 1095 drivers/gpu/drm/radeon/sid.h #define SC_FRONTEND_PRIM_FIFO_SIZE(x) ((x) << 0) x 1096 drivers/gpu/drm/radeon/sid.h #define SC_BACKEND_PRIM_FIFO_SIZE(x) ((x) << 6) x 1097 drivers/gpu/drm/radeon/sid.h #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 15) x 1098 drivers/gpu/drm/radeon/sid.h #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 23) x 1107 drivers/gpu/drm/radeon/sid.h #define MIN_POWER(x) ((x) << 0) x 1110 drivers/gpu/drm/radeon/sid.h #define MAX_POWER(x) ((x) << 16) x 1114 drivers/gpu/drm/radeon/sid.h #define MAX_POWER_DELTA(x) ((x) << 0) x 1117 drivers/gpu/drm/radeon/sid.h #define STI_SIZE(x) ((x) << 16) x 1120 drivers/gpu/drm/radeon/sid.h #define LTI_RATIO(x) ((x) << 27) x 1134 drivers/gpu/drm/radeon/sid.h #define VTX_DONE_DELAY(x) ((x) << 0) x 1151 drivers/gpu/drm/radeon/sid.h #define BACKEND_DISABLE(x) ((x) << 16) x 1153 drivers/gpu/drm/radeon/sid.h #define NUM_PIPES(x) ((x) << 0) x 1156 drivers/gpu/drm/radeon/sid.h #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) x 1159 drivers/gpu/drm/radeon/sid.h #define NUM_SHADER_ENGINES(x) ((x) << 12) x 1162 drivers/gpu/drm/radeon/sid.h #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) x 1165 drivers/gpu/drm/radeon/sid.h #define NUM_GPUS(x) ((x) << 20) x 1168 drivers/gpu/drm/radeon/sid.h #define MULTI_GPU_TILE_SIZE(x) ((x) << 24) x 1171 drivers/gpu/drm/radeon/sid.h #define ROW_SIZE(x) ((x) << 28) x 1176 drivers/gpu/drm/radeon/sid.h # define MICRO_TILE_MODE(x) ((x) << 0) x 1180 drivers/gpu/drm/radeon/sid.h # define ARRAY_MODE(x) ((x) << 2) x 1185 drivers/gpu/drm/radeon/sid.h # define PIPE_CONFIG(x) ((x) << 6) x 1198 drivers/gpu/drm/radeon/sid.h # define TILE_SPLIT(x) ((x) << 11) x 1206 drivers/gpu/drm/radeon/sid.h # define BANK_WIDTH(x) ((x) << 14) x 1211 drivers/gpu/drm/radeon/sid.h # define BANK_HEIGHT(x) ((x) << 16) x 1216 drivers/gpu/drm/radeon/sid.h # define MACRO_TILE_ASPECT(x) ((x) << 18) x 1221 drivers/gpu/drm/radeon/sid.h # define NUM_BANKS(x) ((x) << 20) x 1247 drivers/gpu/drm/radeon/sid.h #define RB_BUFSZ(x) ((x) << 0) x 1248 drivers/gpu/drm/radeon/sid.h #define RB_BLKSZ(x) ((x) << 8) x 1336 drivers/gpu/drm/radeon/sid.h # define RLC_PUD(x) ((x) << 0) x 1338 drivers/gpu/drm/radeon/sid.h # define RLC_PDD(x) ((x) << 8) x 1340 drivers/gpu/drm/radeon/sid.h # define RLC_TTPD(x) ((x) << 16) x 1342 drivers/gpu/drm/radeon/sid.h # define RLC_MSD(x) ((x) << 24) x 1349 drivers/gpu/drm/radeon/sid.h # define MAX_PU_CU(x) ((x) << 0) x 1353 drivers/gpu/drm/radeon/sid.h # define GRBM_REG_SGIT(x) ((x) << 3) x 1355 drivers/gpu/drm/radeon/sid.h # define PG_AFTER_GRBM_REG_ST(x) ((x) << 19) x 1418 drivers/gpu/drm/radeon/sid.h # define LS2_EXIT_TIME(x) ((x) << 17) x 1424 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) x 1427 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_OFF_0(x) ((x) << 10) x 1430 drivers/gpu/drm/radeon/sid.h # define PLL_RAMP_UP_TIME_0(x) ((x) << 24) x 1434 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_TXS2_1(x) ((x) << 7) x 1437 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_OFF_1(x) ((x) << 10) x 1440 drivers/gpu/drm/radeon/sid.h # define PLL_RAMP_UP_TIME_1(x) ((x) << 24) x 1445 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_TXS2_2(x) ((x) << 7) x 1448 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_OFF_2(x) ((x) << 10) x 1451 drivers/gpu/drm/radeon/sid.h # define PLL_RAMP_UP_TIME_2(x) ((x) << 24) x 1455 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_TXS2_3(x) ((x) << 7) x 1458 drivers/gpu/drm/radeon/sid.h # define PLL_POWER_STATE_IN_OFF_3(x) ((x) << 10) x 1461 drivers/gpu/drm/radeon/sid.h # define PLL_RAMP_UP_TIME_3(x) ((x) << 24) x 1491 drivers/gpu/drm/radeon/sid.h # define LC_L0S_INACTIVITY(x) ((x) << 8) x 1494 drivers/gpu/drm/radeon/sid.h # define LC_L1_INACTIVITY(x) ((x) << 12) x 1517 drivers/gpu/drm/radeon/sid.h # define LC_DYN_LANES_PWR_STATE(x) ((x) << 21) x 1521 drivers/gpu/drm/radeon/sid.h # define LC_XMIT_N_FTS(x) ((x) << 0) x 1570 drivers/gpu/drm/radeon/sid.h # define CG_DT(x) ((x) << 2) x 1572 drivers/gpu/drm/radeon/sid.h # define CLK_OD(x) ((x) << 6) x 1580 drivers/gpu/drm/radeon/sid.h # define G_DIV_ID(x) ((x) << 2) x 1604 drivers/gpu/drm/radeon/sid.h #define PACKET3_BASE_INDEX(x) ((x) << 0) x 1637 drivers/gpu/drm/radeon/sid.h #define WRITE_DATA_DST_SEL(x) ((x) << 8) x 1647 drivers/gpu/drm/radeon/sid.h #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) x 1657 drivers/gpu/drm/radeon/sid.h #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) x 1666 drivers/gpu/drm/radeon/sid.h #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) x 1670 drivers/gpu/drm/radeon/sid.h #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) x 1685 drivers/gpu/drm/radeon/sid.h # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) x 1689 drivers/gpu/drm/radeon/sid.h # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) x 1693 drivers/gpu/drm/radeon/sid.h # define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29) x 1701 drivers/gpu/drm/radeon/sid.h # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) x 1707 drivers/gpu/drm/radeon/sid.h # define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) x 1746 drivers/gpu/drm/radeon/sid.h #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) x 1749 drivers/gpu/drm/radeon/sid.h #define EVENT_TYPE(x) ((x) << 0) x 1750 drivers/gpu/drm/radeon/sid.h #define EVENT_INDEX(x) ((x) << 8) x 1763 drivers/gpu/drm/radeon/sid.h #define DATA_SEL(x) ((x) << 29) x 1769 drivers/gpu/drm/radeon/sid.h #define INT_SEL(x) ((x) << 24) x 1817 drivers/gpu/drm/radeon/sid.h # define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ x 1821 drivers/gpu/drm/radeon/sid.h # define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ x 1940 drivers/gpu/drm/radeon/sid.h # define VCEPLL_PDIV_A(x) ((x) << 0) x 1942 drivers/gpu/drm/radeon/sid.h # define VCEPLL_PDIV_B(x) ((x) << 8) x 1944 drivers/gpu/drm/radeon/sid.h # define EVCLK_SRC_SEL(x) ((x) << 20) x 1946 drivers/gpu/drm/radeon/sid.h # define ECCLK_SRC_SEL(x) ((x) << 25) x 1949 drivers/gpu/drm/radeon/sid.h # define VCEPLL_FB_DIV(x) ((x) << 0) x 37 drivers/gpu/drm/radeon/sumod.h # define PCV(x) ((x) << 3) x 40 drivers/gpu/drm/radeon/sumod.h # define PCP(x) ((x) << 8) x 43 drivers/gpu/drm/radeon/sumod.h # define RPW(x) ((x) << 16) x 46 drivers/gpu/drm/radeon/sumod.h # define ID(x) ((x) << 24) x 49 drivers/gpu/drm/radeon/sumod.h # define PGS(x) ((x) << 28) x 57 drivers/gpu/drm/radeon/sumod.h # define LCLK_SCALING_TIMER_PRESCALER(x) ((x) << 4) x 60 drivers/gpu/drm/radeon/sumod.h # define LCLK_SCALING_TIMER_PERIOD(x) ((x) << 16) x 65 drivers/gpu/drm/radeon/sumod.h # define MPPU(x) ((x) << 0) x 68 drivers/gpu/drm/radeon/sumod.h # define MPPD(x) ((x) << 16) x 72 drivers/gpu/drm/radeon/sumod.h # define DPPU(x) ((x) << 0) x 75 drivers/gpu/drm/radeon/sumod.h # define DPPD(x) ((x) << 16) x 79 drivers/gpu/drm/radeon/sumod.h # define RT(x) ((x) << 0) x 82 drivers/gpu/drm/radeon/sumod.h # define IT(x) ((x) << 16) x 125 drivers/gpu/drm/radeon/sumod.h # define SERV_INDEX(x) ((x) << 1) x 133 drivers/gpu/drm/radeon/sumod.h # define SCLK_DIVIDER(x) ((x) << 0) x 169 drivers/gpu/drm/radeon/sumod.h # define TARG_SCLK_INDEX(x) ((x) << 6) x 172 drivers/gpu/drm/radeon/sumod.h # define CURR_SCLK_INDEX(x) ((x) << 9) x 175 drivers/gpu/drm/radeon/sumod.h # define TARG_INDEX(x) ((x) << 12) x 178 drivers/gpu/drm/radeon/sumod.h # define CURR_INDEX(x) ((x) << 15) x 183 drivers/gpu/drm/radeon/sumod.h # define SCLK_FSTATE_0_DIV(x) ((x) << 0) x 187 drivers/gpu/drm/radeon/sumod.h # define SCLK_FSTATE_1_DIV(x) ((x) << 8) x 191 drivers/gpu/drm/radeon/sumod.h # define SCLK_FSTATE_2_DIV(x) ((x) << 16) x 195 drivers/gpu/drm/radeon/sumod.h # define SCLK_FSTATE_3_DIV(x) ((x) << 24) x 201 drivers/gpu/drm/radeon/sumod.h # define PHC(x) ((x) << 0) x 204 drivers/gpu/drm/radeon/sumod.h # define SDC(x) ((x) << 9) x 207 drivers/gpu/drm/radeon/sumod.h # define SU(x) ((x) << 23) x 210 drivers/gpu/drm/radeon/sumod.h # define DIV_ID(x) ((x) << 28) x 216 drivers/gpu/drm/radeon/sumod.h # define UTC_0(x) ((x) << 0) x 219 drivers/gpu/drm/radeon/sumod.h # define DTC_0(x) ((x) << 10) x 224 drivers/gpu/drm/radeon/sumod.h # define CG_GICST(x) ((x) << 0) x 227 drivers/gpu/drm/radeon/sumod.h # define CG_GIPOT(x) ((x) << 16) x 232 drivers/gpu/drm/radeon/sumod.h # define FORCE_SCLK_STATE(x) ((x) << 0) x 236 drivers/gpu/drm/radeon/sumod.h # define GNB_TT(x) ((x) << 8) x 247 drivers/gpu/drm/radeon/sumod.h # define SST(x) ((x) << 0) x 250 drivers/gpu/drm/radeon/sumod.h # define SSTU(x) ((x) << 16) x 255 drivers/gpu/drm/radeon/sumod.h # define SCLK_ACPI_DIV(x) ((x) << 0) x 260 drivers/gpu/drm/radeon/sumod.h # define DC_HDC(x) ((x) << 14) x 263 drivers/gpu/drm/radeon/sumod.h # define DC_HU(x) ((x) << 28) x 267 drivers/gpu/drm/radeon/sumod.h # define SCLK_FSTATE_BOOTUP(x) ((x) << 0) x 270 drivers/gpu/drm/radeon/sumod.h # define TT_TP(x) ((x) << 3) x 273 drivers/gpu/drm/radeon/sumod.h # define TT_TU(x) ((x) << 19) x 278 drivers/gpu/drm/radeon/sumod.h # define CG_R(x) ((x) << 0) x 281 drivers/gpu/drm/radeon/sumod.h # define CG_L(x) ((x) << 16) x 287 drivers/gpu/drm/radeon/sumod.h #define DIG_THERM_INTH(x) ((x) << 8) x 290 drivers/gpu/drm/radeon/sumod.h #define DIG_THERM_INTL(x) ((x) << 16) x 302 drivers/gpu/drm/radeon/sumod.h # define BSP(x) ((x) << 0) x 305 drivers/gpu/drm/radeon/sumod.h # define BSU(x) ((x) << 16) x 311 drivers/gpu/drm/radeon/sumod.h # define LEVEL(x) ((x) << 1) x 316 drivers/gpu/drm/radeon/sumod.h # define PERIOD(x) ((x) << 8) x 319 drivers/gpu/drm/radeon/sumod.h # define UNIT(x) ((x) << 24) x 337 drivers/gpu/drm/radeon/sumod.h # define PGP(x) ((x) << 8) x 340 drivers/gpu/drm/radeon/sumod.h # define PGU(x) ((x) << 24) x 349 drivers/gpu/drm/radeon/sumod.h # define HS(x) ((x) << 4) x 355 drivers/gpu/drm/radeon/sumod.h # define INOUT_C(x) ((x) << 4) x 35 drivers/gpu/drm/radeon/trinityd.h # define STATE_VALID(x) ((x) << 0) x 38 drivers/gpu/drm/radeon/trinityd.h # define CLK_DIVIDER(x) ((x) << 8) x 41 drivers/gpu/drm/radeon/trinityd.h # define VID(x) ((x) << 16) x 44 drivers/gpu/drm/radeon/trinityd.h # define LVRT(x) ((x) << 24) x 48 drivers/gpu/drm/radeon/trinityd.h # define DS_DIV(x) ((x) << 0) x 51 drivers/gpu/drm/radeon/trinityd.h # define DS_SH_DIV(x) ((x) << 8) x 54 drivers/gpu/drm/radeon/trinityd.h # define DISPLAY_WM(x) ((x) << 16) x 57 drivers/gpu/drm/radeon/trinityd.h # define VCE_WM(x) ((x) << 24) x 62 drivers/gpu/drm/radeon/trinityd.h # define GNB_SLOW(x) ((x) << 0) x 65 drivers/gpu/drm/radeon/trinityd.h # define FORCE_NBPS1(x) ((x) << 8) x 69 drivers/gpu/drm/radeon/trinityd.h # define AT(x) ((x) << 0) x 74 drivers/gpu/drm/radeon/trinityd.h # define PD_SCLK_DIVIDER(x) ((x) << 16) x 81 drivers/gpu/drm/radeon/trinityd.h # define SCLK_DPM_EN(x) ((x) << 0) x 84 drivers/gpu/drm/radeon/trinityd.h # define SCLK_DPM_BOOT_STATE(x) ((x) << 16) x 87 drivers/gpu/drm/radeon/trinityd.h # define VOLTAGE_CHG_EN(x) ((x) << 24) x 92 drivers/gpu/drm/radeon/trinityd.h # define SCLK_TT_EN(x) ((x) << 0) x 96 drivers/gpu/drm/radeon/trinityd.h # define LT(x) ((x) << 0) x 99 drivers/gpu/drm/radeon/trinityd.h # define HT(x) ((x) << 16) x 107 drivers/gpu/drm/radeon/trinityd.h # define DS_PG_EN(x) ((x) << 16) x 112 drivers/gpu/drm/radeon/trinityd.h # define PDS_DIV(x) ((x) << 0) x 115 drivers/gpu/drm/radeon/trinityd.h # define SSSD(x) ((x) << 8) x 123 drivers/gpu/drm/radeon/trinityd.h # define SCLK_DPM(x) ((x) << 0) x 126 drivers/gpu/drm/radeon/trinityd.h # define DS_PG_CNTL(x) ((x) << 16) x 132 drivers/gpu/drm/radeon/trinityd.h # define Dpm0PgNbPsLo(x) ((x) << 0) x 135 drivers/gpu/drm/radeon/trinityd.h # define Dpm0PgNbPsHi(x) ((x) << 2) x 138 drivers/gpu/drm/radeon/trinityd.h # define DpmXNbPsLo(x) ((x) << 4) x 141 drivers/gpu/drm/radeon/trinityd.h # define DpmXNbPsHi(x) ((x) << 6) x 148 drivers/gpu/drm/radeon/trinityd.h # define WINDOW_SIZE(x) ((x) << 0) x 153 drivers/gpu/drm/radeon/trinityd.h # define MinSClkDid(x) ((x) << 2) x 158 drivers/gpu/drm/radeon/trinityd.h # define RB_BACKEND_DISABLE(x) ((x) << 16) x 184 drivers/gpu/drm/radeon/trinityd.h # define TARGET_STATE(x) ((x) << 0) x 187 drivers/gpu/drm/radeon/trinityd.h # define CURRENT_STATE(x) ((x) << 4) x 192 drivers/gpu/drm/radeon/trinityd.h # define CG_GIPOT(x) ((x) << 16) x 197 drivers/gpu/drm/radeon/trinityd.h # define SP(x) ((x) << 0) x 200 drivers/gpu/drm/radeon/trinityd.h # define SU(x) ((x) << 16) x 207 drivers/gpu/drm/radeon/trinityd.h # define DIG_THERM_INTH(x) ((x) << 0) x 210 drivers/gpu/drm/radeon/trinityd.h # define DIG_THERM_INTL(x) ((x) << 8) x 45 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define STTS_BIT_CH(x) (0x3000c + ((x) << 2)) x 139 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define DP_VC_TABLE(x) (0x2218 + ((x) << 2)) x 211 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define SHA_256_DATA_OUT_(x) (0x5850 + ((x) << 2)) x 212 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define AES_32_KEY_(x) (0x5870 + ((x) << 2)) x 214 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define AES_32_DATA_OUT_(x) (0x5884 + ((x) << 2)) x 233 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define CRYPTO14_SHA1_V_VALUE_(x) (0x58e8 + ((x) << 2)) x 394 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define SAMPLING_FREQ(x) (((x) & 0xf) << 16) x 395 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define ORIGINAL_SAMP_FREQ(x) (((x) & 0xf) << 24) x 400 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define MAX_NUM_CH(x) (((x) & 0x1f) - 1) x 401 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define NUM_OF_I2S_PORTS(x) ((((x) / 2 - 1) & 0x3) << 5) x 403 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define CFG_SUB_PCKT_NUM(x) ((((x) - 1) & 0x7) << 11) x 404 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define AUDIO_CH_NUM(x) ((((x) - 1) & 0x1f) << 2) x 408 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define I2S_DEC_PORT_EN(x) (((x) & 0xf) << 17) x 412 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define SPDIF_FIFO_MID_RANGE(x) (((x) & 0xff) << 11) x 413 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define SPDIF_JITTER_THRSH(x) (((x) & 0xff) << 3) x 414 drivers/gpu/drm/rockchip/cdn-dp-reg.h #define SPDIF_JITTER_AVG_WIN(x) ((x) & 0x7) x 77 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c #define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x) x 28 drivers/gpu/drm/rockchip/inno_hdmi.c #define to_inno_hdmi(x) container_of(x, struct inno_hdmi, x) x 60 drivers/gpu/drm/rockchip/rk3066_hdmi.c #define to_rk3066_hdmi(x) container_of(x, struct rk3066_hdmi, x) x 18 drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c #define to_drm_private(x) \ x 19 drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c container_of(x, struct rockchip_drm_private, fbdev_helper) x 10 drivers/gpu/drm/rockchip/rockchip_drm_gem.h #define to_rockchip_obj(x) container_of(x, struct rockchip_gem_object, base) x 94 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define to_vop(x) container_of(x, struct vop, crtc) x 95 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define to_vop_win(x) container_of(x, struct vop_win, base) x 188 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4) x 189 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define FS_INTR_EN(x) ((x) << 5) x 190 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define LINE_FLAG_INTR_EN(x) ((x) << 6) x 191 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define BUS_ERROR_INTR_EN(x) ((x) << 7) x 203 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12) x 207 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24) x 208 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16) x 209 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6) x 210 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5) x 211 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_BLEND_M0(x) (((x) & 0x3) << 3) x 212 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2) x 213 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_COLOR_M0(x) (((x) & 0x1) << 1) x 214 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0) x 216 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define DST_FACTOR_M0(x) (((x) & 0x7) << 6) x 443 drivers/gpu/drm/savage/savage_drv.h #define BCI_X_Y(x, y) ((((y) << 16) | (x)) & 0x0FFF0FFF) x 444 drivers/gpu/drm/savage/savage_drv.h #define BCI_X_W(x, y) ((((w) << 16) | (x)) & 0x0FFF0FFF) x 449 drivers/gpu/drm/savage/savage_drv.h #define BCI_LINE_X_Y(x, y) (((y) << 16) | ((x) & 0xFFFF)) x 833 drivers/gpu/drm/savage/savage_state.c unsigned int x, y, w, h; x 835 drivers/gpu/drm/savage/savage_state.c x = boxes[i].x1, y = boxes[i].y1; x 858 drivers/gpu/drm/savage/savage_state.c DMA_WRITE(BCI_X_Y(x, y)); x 39 drivers/gpu/drm/selftests/drm_selftest.h #define SUBTEST(x) { x, #x } x 14 drivers/gpu/drm/selftests/test-drm_modeset_common.h #define FAIL_ON(x) FAIL((x), "%s", "FAIL_ON(" __stringify(x) ")\n") x 286 drivers/gpu/drm/shmobile/shmob_drm_crtc.c int x, int y) x 296 drivers/gpu/drm/shmobile/shmob_drm_crtc.c + y * fb->pitches[0] + x * bpp / 8; x 303 drivers/gpu/drm/shmobile/shmob_drm_crtc.c + x * (bpp == 16 ? 2 : 1); x 312 drivers/gpu/drm/shmobile/shmob_drm_crtc.c shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y); x 346 drivers/gpu/drm/shmobile/shmob_drm_crtc.c int x, int y, x 363 drivers/gpu/drm/shmobile/shmob_drm_crtc.c shmob_drm_crtc_compute_base(scrtc, x, y); x 373 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, x 41 drivers/gpu/drm/shmobile/shmob_drm_plane.c int x, int y) x 49 drivers/gpu/drm/shmobile/shmob_drm_plane.c + y * fb->pitches[0] + x * bpp / 8; x 56 drivers/gpu/drm/shmobile/shmob_drm_plane.c + x * (bpp == 16 ? 2 : 1); x 77 drivers/gpu/drm/sti/sti_cursor.c #define to_sti_cursor(x) container_of(x, struct sti_cursor, plane) x 265 drivers/gpu/drm/sti/sti_cursor.c u32 y, x; x 282 drivers/gpu/drm/sti/sti_cursor.c x = sti_vtg_get_pixel_number(*mode, 0); x 283 drivers/gpu/drm/sti/sti_cursor.c val = y << 16 | x; x 286 drivers/gpu/drm/sti/sti_cursor.c x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); x 287 drivers/gpu/drm/sti/sti_cursor.c val = y << 16 | x; x 296 drivers/gpu/drm/sti/sti_cursor.c x = sti_vtg_get_pixel_number(*mode, dst_x); x 297 drivers/gpu/drm/sti/sti_cursor.c writel((y << 16) | x, cursor->regs + CUR_VPO); x 107 drivers/gpu/drm/sti/sti_dvo.c #define to_sti_dvo_connector(x) \ x 108 drivers/gpu/drm/sti/sti_dvo.c container_of(x, struct sti_dvo_connector, drm_connector) x 133 drivers/gpu/drm/sti/sti_gdp.c #define to_sti_gdp(x) container_of(x, struct sti_gdp, plane) x 260 drivers/gpu/drm/sti/sti_hda.c #define to_sti_hda_connector(x) \ x 261 drivers/gpu/drm/sti/sti_hda.c container_of(x, struct sti_hda_connector, drm_connector) x 77 drivers/gpu/drm/sti/sti_hdmi.c #define XCAT(prefix, x, suffix) prefix ## x ## suffix x 78 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD) x 79 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0) x 80 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1) x 81 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2) x 82 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3) x 83 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4) x 84 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5) x 85 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6) x 94 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */ x 155 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0) x 156 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8) x 157 drivers/gpu/drm/sti/sti_hdmi.c #define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16) x 166 drivers/gpu/drm/sti/sti_hdmi.c #define to_sti_hdmi_connector(x) \ x 167 drivers/gpu/drm/sti/sti_hdmi.c container_of(x, struct sti_hdmi_connector, drm_connector) x 360 drivers/gpu/drm/sti/sti_hqvdp.c #define to_sti_hqvdp(x) container_of(x, struct sti_hqvdp, plane) x 21 drivers/gpu/drm/sti/sti_mixer.h #define to_sti_mixer(x) container_of(x, struct sti_mixer, drm_crtc) x 13 drivers/gpu/drm/sti/sti_plane.h #define to_sti_plane(x) container_of(x, struct sti_plane, drm_plane) x 128 drivers/gpu/drm/sti/sti_tvout.c #define to_sti_tvout_encoder(x) \ x 129 drivers/gpu/drm/sti/sti_tvout.c container_of(x, struct sti_tvout_encoder, encoder) x 131 drivers/gpu/drm/sti/sti_tvout.c #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout x 335 drivers/gpu/drm/sti/sti_vtg.c u32 sti_vtg_get_pixel_number(struct drm_display_mode mode, int x) x 337 drivers/gpu/drm/sti/sti_vtg.c return mode.htotal - mode.hsync_start + x; x 32 drivers/gpu/drm/sti/sti_vtg.h u32 sti_vtg_get_pixel_number(struct drm_display_mode mode, int x); x 48 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_LAYCOOR(x, y) ((((u32)(y) & 0xffff) << 16) | \ x 49 drivers/gpu/drm/sun4i/sun4i_backend.h ((u32)(x) & 0xffff)) x 68 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(x) ((x) << 24) x 70 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(x) ((x) << 15) x 72 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(x) ((x) << 10) x 144 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_KSHSCACOEF_REG(x) (0x9a0 + (0x4 * (x))) x 148 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_OCRCOEF_REG(x) (0x9d0 + (0x4 * (x))) x 150 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_OCGCOEF_REG(x) (0x9e0 + (0x4 * (x))) x 152 drivers/gpu/drm/sun4i/sun4i_backend.h #define SUN4I_BACKEND_OCBCOEF_REG(x) (0x9f0 + (0x4 * (x))) x 37 drivers/gpu/drm/sun4i/sun4i_hdmi.h #define SUN4I_HDMI_VID_TIMING_X(x) ((((x) - 1) & GENMASK(11, 0))) x 124 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c unsigned int x, y; x 155 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c x = mode->htotal - mode->hsync_start; x 157 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c writel(SUN4I_HDMI_VID_TIMING_X(x) | SUN4I_HDMI_VID_TIMING_Y(y), x 160 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c x = mode->hsync_start - mode->hdisplay; x 162 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c writel(SUN4I_HDMI_VID_TIMING_X(x) | SUN4I_HDMI_VID_TIMING_Y(y), x 165 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c x = mode->hsync_end - mode->hsync_start; x 167 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c writel(SUN4I_HDMI_VID_TIMING_X(x) | SUN4I_HDMI_VID_TIMING_Y(y), x 199 drivers/gpu/drm/sun4i/sun4i_tcon.h #define SUN6I_TCON0_LVDS_ANA0_EN_DRVD(x) (((x) & 0xf) << 20) x 200 drivers/gpu/drm/sun4i/sun4i_tcon.h #define SUN6I_TCON0_LVDS_ANA0_C(x) (((x) & 3) << 17) x 201 drivers/gpu/drm/sun4i/sun4i_tcon.h #define SUN6I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8) x 202 drivers/gpu/drm/sun4i/sun4i_tcon.h #define SUN6I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4) x 38 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_CFG0_RES(x) ((x) & 0xf) x 44 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20) x 46 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_DAC0_CHROMA(x) (((x) & 3) << 18) x 48 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16) x 53 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3)) x 58 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_PORCH_BACK(x) ((x) << 16) x 59 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_PORCH_FRONT(x) (x) x 62 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_LINE_FIRST(x) ((x) << 16) x 63 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_LINE_NUMBER(x) (x) x 66 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_LEVEL_BLANK(x) ((x) << 16) x 67 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_LEVEL_BLACK(x) (x) x 70 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x) ((x) << (dac * 8)) x 79 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x) ((x) << 8) x 80 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x) (x) x 83 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x) (x) x 86 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16) x 87 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x) ((x) << 8) x 88 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x) (x) x 91 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) << 8) x 92 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_CB_CR_GAIN_CB(x) (x) x 95 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_SYNC_VBI_SYNC(x) ((x) << 16) x 96 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_SYNC_VBI_VBLANK(x) (x) x 99 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_ACTIVE_LINE(x) (x) x 102 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_CHROMA_COMP_GAIN(x) ((x) & 3) x 111 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_RESYNC_LINE(x) ((x) << 16) x 112 drivers/gpu/drm/sun4i/sun4i_tv.c #define SUN4I_TVE_RESYNC_PIXEL(x) (x) x 39 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG1_REG_SVRCAL(x) ((x) << 26) x 40 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG1_REG_SVBH(x) ((x) << 24) x 71 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_PLR(x) ((x) << 23) x 74 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_CD(x) ((x) << 19) x 75 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_CKSS(x) ((x) << 17) x 78 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_CSMPS(x) ((x) << 13) x 79 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_SLV(x) ((x) << 10) x 80 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_BOOSTCK(x) ((x) << 8) x 81 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_BOOST(x) ((x) << 6) x 82 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG2_REG_RESDI(x) ((x) << 0) x 85 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG3_REG_SLOWCK(x) ((x) << 30) x 86 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG3_REG_SLOW(x) ((x) << 28) x 87 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG3_REG_WIRE(x) ((x) << 18) x 88 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG3_REG_AMPCK(x) ((x) << 14) x 89 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG3_REG_EMPCK(x) ((x) << 11) x 90 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG3_REG_AMP(x) ((x) << 7) x 91 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_ANA_CFG3_REG_EMP(x) ((x) << 4) x 106 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG1_LDO_VSET(x) ((x) << 22) x 107 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG1_UNKNOWN(x) ((x) << 20) x 110 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG1_CP_S(x) ((x) << 13) x 111 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG1_CNT_INT(x) ((x) << 7) x 118 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG2_PDCLKSEL(x) ((x) << 29) x 119 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG2_CLKSTEP(x) ((x) << 27) x 120 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG2_PSET(x) ((x) << 24) x 126 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG2_VCOGAIN(x) ((x) << 16) x 127 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG2_VCO_S(x) ((x) << 12) x 131 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG2_S(x) ((x) << 6) x 136 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h #define SUN8I_HDMI_PHY_PLL_CFG2_PREDIV(x) (((x) - 1) << 0) x 17 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN8I_MIXER_COORD(x, y) ((y) << 16 | (x)) x 40 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, x) ((base) + 0x4 + 0x10 * (x)) x 41 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN8I_MIXER_BLEND_ATTR_INSIZE(base, x) ((base) + 0x8 + 0x10 * (x)) x 42 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN8I_MIXER_BLEND_ATTR_COORD(base, x) ((base) + 0xc + 0x10 * (x)) x 47 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN8I_MIXER_BLEND_MODE(base, x) ((base) + 0x90 + 0x04 * (x)) x 50 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN8I_MIXER_BLEND_CK_MAX(base, x) ((base) + 0xc0 + 0x04 * (x)) x 51 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN8I_MIXER_BLEND_CK_MIN(base, x) ((base) + 0xe0 + 0x04 * (x)) x 54 drivers/gpu/drm/sun4i/sun8i_mixer.h #define SUN50I_MIXER_BLEND_CSC_COEFF(base, layer, x, y) \ x 55 drivers/gpu/drm/sun4i/sun8i_mixer.h ((base) + 0x110 + (layer) * 0x30 + (x) * 0x10 + 4 * (y)) x 38 drivers/gpu/drm/sun4i/sun8i_vi_layer.h #define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(x) ((x) << 24) x 40 drivers/gpu/drm/sun4i/sun8i_vi_layer.h #define SUN8I_MIXER_CHAN_VI_DS_N(x) ((x) << 16) x 41 drivers/gpu/drm/sun4i/sun8i_vi_layer.h #define SUN8I_MIXER_CHAN_VI_DS_M(x) ((x) << 0) x 57 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_SUB_ZERO_DIR_THR(x) (((x) << 24) & 0xFF) x 58 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_ZERO_DIR_THR(x) (((x) << 16) & 0xFF) x 59 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_HORZ_DIR_THR(x) (((x) << 8) & 0xFF) x 60 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_VERT_DIR_THR(x) ((x) & 0xFF) x 66 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_EDGE_SHIFT(x) (((x) << 16) & 0xF) x 67 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_EDGE_OFFSET(x) ((x) & 0xFF) x 69 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_ANGLE_SHIFT(x) (((x) << 16) & 0xF) x 70 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h #define SUN50I_SCALER_VSU_ANGLE_OFFSET(x) ((x) & 0xFF) x 360 drivers/gpu/drm/tegra/dc.c value = V_POSITION(window->dst.y) | H_POSITION(window->dst.x); x 366 drivers/gpu/drm/tegra/dc.c h_offset = window->src.x * bpp; x 387 drivers/gpu/drm/tegra/dc.c h_dda = compute_initial_dda(window->src.x); x 700 drivers/gpu/drm/tegra/dc.c window.src.x = plane->state->src.x1 >> 16; x 704 drivers/gpu/drm/tegra/dc.c window.dst.x = plane->state->dst.x1; x 126 drivers/gpu/drm/tegra/dc.h unsigned int x; x 132 drivers/gpu/drm/tegra/dc.h unsigned int x; x 257 drivers/gpu/drm/tegra/dc.h #define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x)) x 258 drivers/gpu/drm/tegra/dc.h #define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x)) x 261 drivers/gpu/drm/tegra/dc.h #define DC_COM_PIN_OUTPUT_DATA(x) (0x30a + (x)) x 262 drivers/gpu/drm/tegra/dc.h #define DC_COM_PIN_INPUT_ENABLE(x) (0x30e + (x)) x 263 drivers/gpu/drm/tegra/dc.h #define DC_COM_PIN_INPUT_DATA(x) (0x312 + (x)) x 264 drivers/gpu/drm/tegra/dc.h #define DC_COM_PIN_OUTPUT_SELECT(x) (0x314 + (x)) x 300 drivers/gpu/drm/tegra/dc.h #define SOR_ENABLE(x) (1 << (25 + (((x) > 1) ? ((x) + 1) : (x)))) x 303 drivers/gpu/drm/tegra/dc.h #define CURSOR_THRESHOLD(x) (((x) & 0x03) << 24) x 304 drivers/gpu/drm/tegra/dc.h #define WINDOW_A_THRESHOLD(x) (((x) & 0x7f) << 16) x 305 drivers/gpu/drm/tegra/dc.h #define WINDOW_B_THRESHOLD(x) (((x) & 0x7f) << 8) x 306 drivers/gpu/drm/tegra/dc.h #define WINDOW_C_THRESHOLD(x) (((x) & 0xff) << 0) x 309 drivers/gpu/drm/tegra/dc.h #define CURSOR_DELAY(x) (((x) & 0x3f) << 24) x 310 drivers/gpu/drm/tegra/dc.h #define WINDOW_A_DELAY(x) (((x) & 0x3f) << 16) x 311 drivers/gpu/drm/tegra/dc.h #define WINDOW_B_DELAY(x) (((x) & 0x3f) << 8) x 312 drivers/gpu/drm/tegra/dc.h #define WINDOW_C_DELAY(x) (((x) & 0x3f) << 0) x 315 drivers/gpu/drm/tegra/dc.h #define VSYNC_H_POSITION(x) ((x) & 0xfff) x 374 drivers/gpu/drm/tegra/dc.h #define PULSE_START(x) (((x) & 0xfff) << 0) x 375 drivers/gpu/drm/tegra/dc.h #define PULSE_END(x) (((x) & 0xfff) << 16) x 391 drivers/gpu/drm/tegra/dc.h #define SHIFT_CLK_DIVIDER(x) ((x) & 0xff) x 492 drivers/gpu/drm/tegra/dc.h #define DC_DISP_SD_LUT(x) (0x4c4 + (x)) x 495 drivers/gpu/drm/tegra/dc.h #define DC_DISP_SD_HISTOGRAM(x) (0x4cf + (x)) x 497 drivers/gpu/drm/tegra/dc.h #define DC_DISP_SD_BL_TF(x) (0x4d8 + (x)) x 503 drivers/gpu/drm/tegra/dc.h #define BACKGROUND_COLOR_ALPHA(x) (((x) & 0xff) << 24) x 504 drivers/gpu/drm/tegra/dc.h #define BACKGROUND_COLOR_BLUE(x) (((x) & 0xff) << 16) x 505 drivers/gpu/drm/tegra/dc.h #define BACKGROUND_COLOR_GREEN(x) (((x) & 0xff) << 8) x 506 drivers/gpu/drm/tegra/dc.h #define BACKGROUND_COLOR_RED(x) (((x) & 0xff) << 0) x 537 drivers/gpu/drm/tegra/dc.h #define PIPE_METER_INT(x) (((x) & 0xff) << 8) x 538 drivers/gpu/drm/tegra/dc.h #define PIPE_METER_FRAC(x) (((x) & 0xff) << 0) x 541 drivers/gpu/drm/tegra/dc.h #define MEMPOOL_ENTRIES(x) (((x) & 0xffff) << 0) x 544 drivers/gpu/drm/tegra/dc.h #define SLOTS(x) (((x) & 0xff) << 0) x 552 drivers/gpu/drm/tegra/dc.h #define THREAD_NUM(x) (((x) & 0x1f) << 1) x 628 drivers/gpu/drm/tegra/dc.h #define H_POSITION(x) (((x) & 0x1fff) << 0) /* XXX 0x7fff on Tegra186 */ x 629 drivers/gpu/drm/tegra/dc.h #define V_POSITION(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */ x 632 drivers/gpu/drm/tegra/dc.h #define H_SIZE(x) (((x) & 0x1fff) << 0) /* XXX 0x7fff on Tegra186 */ x 633 drivers/gpu/drm/tegra/dc.h #define V_SIZE(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */ x 636 drivers/gpu/drm/tegra/dc.h #define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0) x 637 drivers/gpu/drm/tegra/dc.h #define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */ x 642 drivers/gpu/drm/tegra/dc.h #define H_DDA_INC(x) (((x) & 0xffff) << 0) x 643 drivers/gpu/drm/tegra/dc.h #define V_DDA_INC(x) (((x) & 0xffff) << 16) x 657 drivers/gpu/drm/tegra/dc.h #define BLEND_WEIGHT1(x) (((x) & 0xff) << 16) x 658 drivers/gpu/drm/tegra/dc.h #define BLEND_WEIGHT0(x) (((x) & 0xff) << 8) x 693 drivers/gpu/drm/tegra/dc.h #define DC_WINBUF_SURFACE_KIND_BLOCK_HEIGHT(x) (((x) & 0x7) << 4) x 705 drivers/gpu/drm/tegra/dc.h #define DC_DISP_CORE_SOR_SET_CONTROL(x) (0x403 + (x)) x 711 drivers/gpu/drm/tegra/dc.h #define OWNER(x) (((x) & 0xf) << 0) x 716 drivers/gpu/drm/tegra/dc.h #define PITCH(x) (((x) >> 6) & 0x1fff) x 748 drivers/gpu/drm/tegra/dc.h #define K2(x) (((x) & 0xff) << 16) x 749 drivers/gpu/drm/tegra/dc.h #define K1(x) (((x) & 0xff) << 8) x 750 drivers/gpu/drm/tegra/dc.h #define WINDOW_LAYER_DEPTH(x) (((x) & 0xff) << 0) x 785 drivers/gpu/drm/tegra/dc.h #define OFFSET_Y(x) (((x) & 0xffff) << 16) x 786 drivers/gpu/drm/tegra/dc.h #define OFFSET_X(x) (((x) & 0xffff) << 0) x 18 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_DP_AUXDATA_WRITE(x) (0x09 + ((x) << 2)) x 19 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_DP_AUXDATA_READ(x) (0x19 + ((x) << 2)) x 33 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_DP_AUXCTL_CMDLEN(x) ((x) & 0xff) x 48 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_HPD_CONFIG_UNPLUG_MIN_TIME(x) (((x) & 0xffff) << 16) x 49 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_HPD_CONFIG_PLUG_MIN_TIME(x) ((x) & 0xffff) x 52 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_HPD_IRQ_CONFIG_MIN_LOW_TIME(x) ((x) & 0xffff) x 59 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_HYBRID_PADCTL_AUX_CMH(x) (((x) & 0x3) << 12) x 60 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_HYBRID_PADCTL_AUX_DRVZ(x) (((x) & 0x7) << 8) x 61 drivers/gpu/drm/tegra/dpaux.h #define DPAUX_HYBRID_PADCTL_AUX_DRVI(x) (((x) & 0x3f) << 2) x 37 drivers/gpu/drm/tegra/dsi.h #define DSI_CONTROL_TX_TRIG(x) (((x) & 0x3) << 8) x 88 drivers/gpu/drm/tegra/dsi.h #define DSI_TIMEOUT_LRX(x) (((x) & 0xffff) << 16) x 89 drivers/gpu/drm/tegra/dsi.h #define DSI_TIMEOUT_HTX(x) (((x) & 0xffff) << 0) x 91 drivers/gpu/drm/tegra/dsi.h #define DSI_TIMEOUT_PR(x) (((x) & 0xffff) << 16) x 92 drivers/gpu/drm/tegra/dsi.h #define DSI_TIMEOUT_TA(x) (((x) & 0xffff) << 0) x 94 drivers/gpu/drm/tegra/dsi.h #define DSI_TALLY_TA(x) (((x) & 0xff) << 16) x 95 drivers/gpu/drm/tegra/dsi.h #define DSI_TALLY_LRX(x) (((x) & 0xff) << 8) x 96 drivers/gpu/drm/tegra/dsi.h #define DSI_TALLY_HTX(x) (((x) & 0xff) << 0) x 98 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0) x 100 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16) x 107 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_OUT_CLK(x) (((x) & 0x7) << 0) x 108 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_LP_DN(x) (((x) & 0x7) << 4) x 109 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_LP_UP(x) (((x) & 0x7) << 8) x 110 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_SLEW_DN(x) (((x) & 0x7) << 12) x 111 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_SLEW_UP(x) (((x) & 0x7) << 16) x 113 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12) x 114 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8) x 115 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4) x 116 drivers/gpu/drm/tegra/dsi.h #define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0) x 9 drivers/gpu/drm/tegra/gr3d.h #define GR3D_IDX_ATTRIBUTE(x) (0x100 + (x) * 2) x 14 drivers/gpu/drm/tegra/gr3d.h #define GR3D_TEX_TEX_ADDR(x) (0x710 + (x)) x 16 drivers/gpu/drm/tegra/gr3d.h #define GR3D_GLOBAL_SURFADDR(x) (0xe00 + (x)) x 18 drivers/gpu/drm/tegra/gr3d.h #define GR3D_GLOBAL_SURFOVERADDR(x) (0xe30 + (x)) x 19 drivers/gpu/drm/tegra/gr3d.h #define GR3D_GLOBAL_SAMP01SURFADDR(x) (0xe50 + (x)) x 20 drivers/gpu/drm/tegra/gr3d.h #define GR3D_GLOBAL_SAMP23SURFADDR(x) (0xe60 + (x)) x 82 drivers/gpu/drm/tegra/hdmi.h #define INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0) x 83 drivers/gpu/drm/tegra/hdmi.h #define INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8) x 84 drivers/gpu/drm/tegra/hdmi.h #define INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16) x 120 drivers/gpu/drm/tegra/hdmi.h #define ACR_SUBPACK_CTS(x) (((x) & 0xffffff) << 8) x 121 drivers/gpu/drm/tegra/hdmi.h #define ACR_SUBPACK_N(x) (((x) & 0xffffff) << 0) x 125 drivers/gpu/drm/tegra/hdmi.h #define HDMI_CTRL_REKEY(x) (((x) & 0x7f) << 0) x 126 drivers/gpu/drm/tegra/hdmi.h #define HDMI_CTRL_MAX_AC_PACKET(x) (((x) & 0x1f) << 16) x 131 drivers/gpu/drm/tegra/hdmi.h #define VSYNC_WINDOW_END(x) (((x) & 0x3ff) << 0) x 132 drivers/gpu/drm/tegra/hdmi.h #define VSYNC_WINDOW_START(x) (((x) & 0x3ff) << 16) x 147 drivers/gpu/drm/tegra/hdmi.h #define SPARE_CTS_RESET_VAL(x) (((x) & 0x7) << 16) x 172 drivers/gpu/drm/tegra/hdmi.h #define SOR_PLL_VCOCAP(x) (((x) & 0xf) << 8) x 173 drivers/gpu/drm/tegra/hdmi.h #define SOR_PLL_BG_V17_S(x) (((x) & 0xf) << 12) x 174 drivers/gpu/drm/tegra/hdmi.h #define SOR_PLL_FILTER(x) (((x) & 0xf) << 16) x 175 drivers/gpu/drm/tegra/hdmi.h #define SOR_PLL_ICHPMP(x) (((x) & 0xf) << 24) x 176 drivers/gpu/drm/tegra/hdmi.h #define SOR_PLL_TX_REG_LOAD(x) (((x) & 0xf) << 28) x 180 drivers/gpu/drm/tegra/hdmi.h #define SOR_PLL_TMDS_TERMADJ(x) (((x) & 0xf) << 9) x 181 drivers/gpu/drm/tegra/hdmi.h #define SOR_PLL_LOADADJ(x) (((x) & 0xf) << 20) x 189 drivers/gpu/drm/tegra/hdmi.h #define SOR_CSTM_ROTCLK(x) (((x) & 0xf) << 24) x 201 drivers/gpu/drm/tegra/hdmi.h #define SOR_SEQ_PU_PC(x) (((x) & 0xf) << 0) x 202 drivers/gpu/drm/tegra/hdmi.h #define SOR_SEQ_PU_PC_ALT(x) (((x) & 0xf) << 4) x 203 drivers/gpu/drm/tegra/hdmi.h #define SOR_SEQ_PD_PC(x) (((x) & 0xf) << 8) x 204 drivers/gpu/drm/tegra/hdmi.h #define SOR_SEQ_PD_PC_ALT(x) (((x) & 0xf) << 12) x 205 drivers/gpu/drm/tegra/hdmi.h #define SOR_SEQ_PC(x) (((x) & 0xf) << 16) x 209 drivers/gpu/drm/tegra/hdmi.h #define HDMI_NV_PDISP_SOR_SEQ_INST(x) (0x60 + (x)) x 211 drivers/gpu/drm/tegra/hdmi.h #define SOR_SEQ_INST_WAIT_TIME(x) (((x) & 0x3ff) << 0) x 234 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE0(x) (((x) & 0x3f) << 0) x 235 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE1(x) (((x) & 0x3f) << 8) x 236 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE2(x) (((x) & 0x3f) << 16) x 237 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE3(x) (((x) & 0x3f) << 24) x 238 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE0_T114(x) (((x) & 0x7f) << 0) x 239 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE1_T114(x) (((x) & 0x7f) << 8) x 240 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE2_T114(x) (((x) & 0x7f) << 16) x 241 drivers/gpu/drm/tegra/hdmi.h #define DRIVE_CURRENT_LANE3_T114(x) (((x) & 0x7f) << 24) x 384 drivers/gpu/drm/tegra/hdmi.h #define HDMI_NV_PDISP_AUDIO_FS(x) (0x82 + (x)) x 385 drivers/gpu/drm/tegra/hdmi.h #define AUDIO_FS_LOW(x) (((x) & 0xfff) << 0) x 386 drivers/gpu/drm/tegra/hdmi.h #define AUDIO_FS_HIGH(x) (((x) & 0xfff) << 16) x 391 drivers/gpu/drm/tegra/hdmi.h #define AUDIO_CNTRL0_ERROR_TOLERANCE(x) (((x) & 0xff) << 0) x 395 drivers/gpu/drm/tegra/hdmi.h #define AUDIO_CNTRL0_FRAMES_PER_BLOCK(x) (((x) & 0xff) << 24) x 398 drivers/gpu/drm/tegra/hdmi.h #define AUDIO_N_VALUE(x) (((x) & 0xfffff) << 0) x 405 drivers/gpu/drm/tegra/hdmi.h #define SOR_REFCLK_DIV_INT(x) (((x) & 0xff) << 8) x 406 drivers/gpu/drm/tegra/hdmi.h #define SOR_REFCLK_DIV_FRAC(x) (((x) & 0x03) << 6) x 417 drivers/gpu/drm/tegra/hdmi.h #define PE_CURRENT0(x) (((x) & 0xf) << 0) x 418 drivers/gpu/drm/tegra/hdmi.h #define PE_CURRENT1(x) (((x) & 0xf) << 8) x 419 drivers/gpu/drm/tegra/hdmi.h #define PE_CURRENT2(x) (((x) & 0xf) << 16) x 420 drivers/gpu/drm/tegra/hdmi.h #define PE_CURRENT3(x) (((x) & 0xf) << 24) x 501 drivers/gpu/drm/tegra/hdmi.h #define PEAK_CURRENT_LANE0(x) (((x) & 0x7f) << 0) x 502 drivers/gpu/drm/tegra/hdmi.h #define PEAK_CURRENT_LANE1(x) (((x) & 0x7f) << 8) x 503 drivers/gpu/drm/tegra/hdmi.h #define PEAK_CURRENT_LANE2(x) (((x) & 0x7f) << 16) x 504 drivers/gpu/drm/tegra/hdmi.h #define PEAK_CURRENT_LANE3(x) (((x) & 0x7f) << 24) x 95 drivers/gpu/drm/tegra/hub.h #define CURS_SLOTS(x) (((x) & 0xff) << 8) x 96 drivers/gpu/drm/tegra/hub.h #define WGRP_SLOTS(x) (((x) & 0xff) << 0) x 43 drivers/gpu/drm/tegra/sor.h #define SOR_STATE_ASY_OWNER(x) (((x) & 0xf) << 0) x 45 drivers/gpu/drm/tegra/sor.h #define SOR_HEAD_STATE0(x) (0x05 + (x)) x 52 drivers/gpu/drm/tegra/sor.h #define SOR_HEAD_STATE1(x) (0x07 + (x)) x 53 drivers/gpu/drm/tegra/sor.h #define SOR_HEAD_STATE2(x) (0x09 + (x)) x 54 drivers/gpu/drm/tegra/sor.h #define SOR_HEAD_STATE3(x) (0x0b + (x)) x 55 drivers/gpu/drm/tegra/sor.h #define SOR_HEAD_STATE4(x) (0x0d + (x)) x 56 drivers/gpu/drm/tegra/sor.h #define SOR_HEAD_STATE5(x) (0x0f + (x)) x 63 drivers/gpu/drm/tegra/sor.h #define SOR_CLK_CNTRL_DP_LINK_SPEED(x) (((x) & 0x1f) << 2) x 88 drivers/gpu/drm/tegra/sor.h #define SOR_PLL0_ICHPMP(x) (((x) & 0xf) << 24) x 90 drivers/gpu/drm/tegra/sor.h #define SOR_PLL0_FILTER(x) (((x) & 0xf) << 16) x 92 drivers/gpu/drm/tegra/sor.h #define SOR_PLL0_VCOCAP(x) (((x) & 0xf) << 8) x 95 drivers/gpu/drm/tegra/sor.h #define SOR_PLL0_PLLREG_LEVEL(x) (((x) & 0x3) << 6) x 108 drivers/gpu/drm/tegra/sor.h #define SOR_PLL1_LOADADJ(x) (((x) & 0xf) << 20) x 111 drivers/gpu/drm/tegra/sor.h #define SOR_PLL1_TMDS_TERMADJ(x) (((x) & 0xf) << 9) x 125 drivers/gpu/drm/tegra/sor.h #define SOR_PLL3_BG_TEMP_COEF(x) (((x) & 0xf) << 28) x 127 drivers/gpu/drm/tegra/sor.h #define SOR_PLL3_BG_VREF_LEVEL(x) (((x) & 0xf) << 24) x 131 drivers/gpu/drm/tegra/sor.h #define SOR_PLL3_AVDD10_LEVEL(x) (((x) & 0xf) << 8) x 133 drivers/gpu/drm/tegra/sor.h #define SOR_PLL3_AVDD14_LEVEL(x) (((x) & 0xf) << 4) x 137 drivers/gpu/drm/tegra/sor.h #define SOR_CSTM_ROTCLK(x) (((x) & 0xf) << 24) x 150 drivers/gpu/drm/tegra/sor.h #define SOR_SEQ_CTL_PD_PC_ALT(x) (((x) & 0xf) << 12) x 151 drivers/gpu/drm/tegra/sor.h #define SOR_SEQ_CTL_PD_PC(x) (((x) & 0xf) << 8) x 152 drivers/gpu/drm/tegra/sor.h #define SOR_SEQ_CTL_PU_PC_ALT(x) (((x) & 0xf) << 4) x 153 drivers/gpu/drm/tegra/sor.h #define SOR_SEQ_CTL_PU_PC(x) (((x) & 0xf) << 0) x 162 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_SEQ_CTL_DELAY(x) (((x) & 0xf) << 12) x 164 drivers/gpu/drm/tegra/sor.h #define SOR_SEQ_INST(x) (0x22 + (x)) x 188 drivers/gpu/drm/tegra/sor.h #define SOR_SEQ_INST_WAIT(x) (((x) & 0x3ff) << 0) x 229 drivers/gpu/drm/tegra/sor.h #define SOR_DP_LINKCTL_LANE_COUNT(x) (((1 << (x)) - 1) << 16) x 232 drivers/gpu/drm/tegra/sor.h #define SOR_DP_LINKCTL_TU_SIZE(x) (((x) & 0x7f) << 2) x 241 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_DRIVE_CURRENT_LANE3(x) (((x) & 0xff) << 24) x 242 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_DRIVE_CURRENT_LANE2(x) (((x) & 0xff) << 16) x 243 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_DRIVE_CURRENT_LANE1(x) (((x) & 0xff) << 8) x 244 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_DRIVE_CURRENT_LANE0(x) (((x) & 0xff) << 0) x 250 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_PREEMPHASIS_LANE3(x) (((x) & 0xff) << 24) x 251 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_PREEMPHASIS_LANE2(x) (((x) & 0xff) << 16) x 252 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_PREEMPHASIS_LANE1(x) (((x) & 0xff) << 8) x 253 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_PREEMPHASIS_LANE0(x) (((x) & 0xff) << 0) x 257 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_POSTCURSOR_LANE3(x) (((x) & 0xff) << 24) x 258 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_POSTCURSOR_LANE2(x) (((x) & 0xff) << 16) x 259 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_POSTCURSOR_LANE1(x) (((x) & 0xff) << 8) x 260 drivers/gpu/drm/tegra/sor.h #define SOR_LANE_POSTCURSOR_LANE0(x) (((x) & 0xff) << 0) x 267 drivers/gpu/drm/tegra/sor.h #define SOR_DP_CONFIG_ACTIVE_SYM_FRAC(x) (((x) & 0xf) << 16) x 269 drivers/gpu/drm/tegra/sor.h #define SOR_DP_CONFIG_ACTIVE_SYM_COUNT(x) (((x) & 0x7f) << 8) x 271 drivers/gpu/drm/tegra/sor.h #define SOR_DP_CONFIG_WATERMARK(x) (((x) & 0x3f) << 0) x 281 drivers/gpu/drm/tegra/sor.h #define SOR_DP_PADCTL_TX_PU(x) (((x) & 0xff) << 8) x 344 drivers/gpu/drm/tegra/sor.h #define SOR_DP_PADCTL_SPAREPLL(x) (((x) & 0xff) << 24) x 360 drivers/gpu/drm/tegra/sor.h #define INFOFRAME_HEADER_LEN(x) (((x) & 0xff) << 16) x 361 drivers/gpu/drm/tegra/sor.h #define INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8) x 362 drivers/gpu/drm/tegra/sor.h #define INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0) x 367 drivers/gpu/drm/tegra/sor.h #define SOR_HDMI_ACR_SUBPACK_LOW_SB1(x) (((x) & 0xff) << 24) x 377 drivers/gpu/drm/tegra/sor.h #define SOR_HDMI_CTRL_MAX_AC_PACKET(x) (((x) & 0x1f) << 16) x 379 drivers/gpu/drm/tegra/sor.h #define SOR_HDMI_CTRL_REKEY(x) (((x) & 0x7f) << 0) x 383 drivers/gpu/drm/tegra/sor.h #define SOR_HDMI_SPARE_CTS_RESET(x) (((x) & 0x7) << 16) x 387 drivers/gpu/drm/tegra/sor.h #define SOR_REFCLK_DIV_INT(x) ((((x) >> 2) & 0xff) << 8) x 388 drivers/gpu/drm/tegra/sor.h #define SOR_REFCLK_DIV_FRAC(x) (((x) & 0x3) << 6) x 392 drivers/gpu/drm/tegra/sor.h #define SOR_INPUT_CONTROL_HDMI_SRC_SELECT(x) (((x) & 0x1) << 0) x 396 drivers/gpu/drm/tegra/sor.h #define SOR_AUDIO_CNTRL_SOURCE_SELECT(x) (((x) & 0x3) << 20) x 419 drivers/gpu/drm/tegra/sor.h #define SOR_AUDIO_HDA_ELD_BUFWR_INDEX(x) (((x) & 0xff) << 8) x 420 drivers/gpu/drm/tegra/sor.h #define SOR_AUDIO_HDA_ELD_BUFWR_DATA(x) (((x) & 0xff) << 0) x 60 drivers/gpu/drm/tilcdc/tilcdc_crtc.c #define to_tilcdc_crtc(x) container_of(x, struct tilcdc_crtc, base) x 74 drivers/gpu/drm/tilcdc/tilcdc_crtc.c crtc->x * fb->format->cpp[0]; x 30 drivers/gpu/drm/tilcdc/tilcdc_panel.c #define to_panel_module(x) container_of(x, struct panel_module, base) x 41 drivers/gpu/drm/tilcdc/tilcdc_panel.c #define to_panel_encoder(x) container_of(x, struct panel_encoder, base) x 129 drivers/gpu/drm/tilcdc/tilcdc_panel.c #define to_panel_connector(x) container_of(x, struct panel_connector, base) x 25 drivers/gpu/drm/tilcdc/tilcdc_regs.h #define LCDC_DMA_BURST_SIZE(x) ((x) << 4) x 32 drivers/gpu/drm/tilcdc/tilcdc_regs.h #define LCDC_DMA_FIFO_THRESHOLD(x) ((x) << 8) x 40 drivers/gpu/drm/tilcdc/tilcdc_regs.h #define LCDC_CLK_DIVISOR(x) ((x) << 8) x 45 drivers/gpu/drm/tilcdc/tilcdc_regs.h #define LCDC_PALETTE_LOAD_MODE(x) ((x) << 20) x 72 drivers/gpu/drm/tilcdc/tilcdc_regs.h #define LCDC_AC_BIAS_TRANSITIONS_PER_INT(x) ((x) << 16) x 74 drivers/gpu/drm/tilcdc/tilcdc_regs.h #define LCDC_AC_BIAS_FREQUENCY(x) ((x) << 8) x 26 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c #define to_tfp410_module(x) container_of(x, struct tfp410_module, base) x 50 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c #define to_tfp410_encoder(x) container_of(x, struct tfp410_encoder, base) x 140 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c #define to_tfp410_connector(x) container_of(x, struct tfp410_connector, base) x 521 drivers/gpu/drm/tiny/repaper.c int x = xb * 8 + i; x 524 drivers/gpu/drm/tiny/repaper.c if (gray8[y * width + x] >> 7) x 617 drivers/gpu/drm/tiny/repaper.c unsigned int x; x 619 drivers/gpu/drm/tiny/repaper.c for (x = 0; x < (fb->width / 8); x++) x 620 drivers/gpu/drm/tiny/repaper.c if (buf[x + (fb->width * (fb->height - 1) / 8)]) { x 69 drivers/gpu/drm/tiny/st7586.c unsigned int x, y; x 80 drivers/gpu/drm/tiny/st7586.c for (x = clip->x1; x < clip->x2; x += 3) { x 117 drivers/gpu/drm/tve200/tve200_drm.h #define to_tve200_connector(x) \ x 118 drivers/gpu/drm/tve200/tve200_drm.h container_of(x, struct tve200_drm_connector, connector) x 77 drivers/gpu/drm/udl/udl_drv.h #define to_udl(x) container_of(x, struct udl_device, drm) x 87 drivers/gpu/drm/udl/udl_drv.h #define to_udl_bo(x) container_of(x, struct udl_gem_object, base) x 95 drivers/gpu/drm/udl/udl_drv.h #define to_udl_fb(x) container_of(x, struct udl_framebuffer, base) x 146 drivers/gpu/drm/udl/udl_drv.h int udl_handle_damage(struct udl_framebuffer *fb, int x, int y, x 36 drivers/gpu/drm/udl/udl_fb.c #define DL_ALIGN_UP(x, a) ALIGN(x, a) x 37 drivers/gpu/drm/udl/udl_fb.c #define DL_ALIGN_DOWN(x, a) ALIGN_DOWN(x, a) x 77 drivers/gpu/drm/udl/udl_fb.c int udl_handle_damage(struct udl_framebuffer *fb, int x, int y, x 109 drivers/gpu/drm/udl/udl_fb.c aligned_x = DL_ALIGN_DOWN(x, sizeof(unsigned long)); x 110 drivers/gpu/drm/udl/udl_fb.c width = DL_ALIGN_UP(width + (x-aligned_x), sizeof(unsigned long)); x 111 drivers/gpu/drm/udl/udl_fb.c x = aligned_x; x 114 drivers/gpu/drm/udl/udl_fb.c (x + width > fb->base.width) || x 127 drivers/gpu/drm/udl/udl_fb.c const int byte_offset = line_offset + (x << log_bpp); x 128 drivers/gpu/drm/udl/udl_fb.c const int dev_byte_offset = (fb->base.width * i + x) << log_bpp; x 283 drivers/gpu/drm/udl/udl_modeset.c int x, int y, enum mode_set_atomic state) x 289 drivers/gpu/drm/udl/udl_modeset.c udl_pipe_set_base(struct drm_crtc *crtc, int x, int y, x 299 drivers/gpu/drm/udl/udl_modeset.c int x, int y, x 345 drivers/gpu/drm/v3d/v3d_regs.h #define V3D_V3_PCTR_0_PCTRSX(x) (V3D_V3_PCTR_0_PCTRS0 + \ x 346 drivers/gpu/drm/v3d/v3d_regs.h 4 * (x)) x 363 drivers/gpu/drm/v3d/v3d_regs.h #define V3D_PCTR_0_PCTRX(x) (V3D_PCTR_0_PCTR0 + \ x 364 drivers/gpu/drm/v3d/v3d_regs.h 4 * (x)) x 186 drivers/gpu/drm/vboxvideo/hgsmi_base.c u32 x, u32 y, u32 *x_host, u32 *y_host) x 196 drivers/gpu/drm/vboxvideo/hgsmi_base.c p->x = x; x 201 drivers/gpu/drm/vboxvideo/hgsmi_base.c *x_host = p->x; x 75 drivers/gpu/drm/vboxvideo/modesetting.c p->x = origin_x; x 129 drivers/gpu/drm/vboxvideo/vbox_drv.h u32 x; x 137 drivers/gpu/drm/vboxvideo/vbox_drv.h #define to_vbox_crtc(x) container_of(x, struct vbox_crtc, base) x 138 drivers/gpu/drm/vboxvideo/vbox_drv.h #define to_vbox_connector(x) container_of(x, struct vbox_connector, base) x 139 drivers/gpu/drm/vboxvideo/vbox_drv.h #define to_vbox_encoder(x) container_of(x, struct vbox_encoder, base) x 140 drivers/gpu/drm/vboxvideo/vbox_drv.h #define to_vbox_framebuffer(x) container_of(x, struct vbox_framebuffer, base) x 71 drivers/gpu/drm/vboxvideo/vbox_main.c cmd_hdr.x = (s16)rects[i].x1; x 43 drivers/gpu/drm/vboxvideo/vbox_mode.c x_offset = vbox->single_framebuffer ? vbox_crtc->x : vbox_crtc->x_hint; x 61 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc->fb_offset % pitch / bpp * 8 + vbox_crtc->x); x 71 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc->x * bpp / 8 + x 173 drivers/gpu/drm/vboxvideo/vbox_mode.c int x, int y) x 188 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc->x = x; x 57 drivers/gpu/drm/vboxvideo/vboxvideo.h s16 x; x 425 drivers/gpu/drm/vboxvideo/vboxvideo.h s32 x; /* Upper left X co-ordinate relative to the first screen. */ x 438 drivers/gpu/drm/vboxvideo/vboxvideo.h u32 x; /* Guest cursor X position */ x 38 drivers/gpu/drm/vboxvideo/vboxvideo_guest.h u32 x, u32 y, u32 *x_host, u32 *y_host); x 123 drivers/gpu/drm/vc4/vc4_regs.h #define V3D_PCTR(x) (0x00680 + ((x) * 8)) x 124 drivers/gpu/drm/vc4/vc4_regs.h #define V3D_PCTRS(x) (0x00684 + ((x) * 8)) x 224 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPCTRL_DSPEISLUR(x) BIT(13 + (x)) x 228 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPCTRL_DSPEIEOLN(x) BIT(8 + ((x) * 2)) x 230 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPCTRL_DSPEIEOF(x) BIT(7 + ((x) * 2)) x 238 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPCTRL_DISPEIRQ(x) BIT(1 + (x)) x 250 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_COBLOW(x) BIT(13 + ((x) * 8)) x 252 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_EOLN(x) BIT(12 + ((x) * 8)) x 256 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_ESFRAME(x) BIT(11 + ((x) * 8)) x 260 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_ESLINE(x) BIT(10 + ((x) * 8)) x 264 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_EUFLOW(x) BIT(9 + ((x) * 8)) x 266 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_EOF(x) BIT(8 + ((x) * 8)) x 268 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_IRQMASK(x) VC4_MASK(13 + ((x) * 8), \ x 269 drivers/gpu/drm/vc4/vc4_regs.h 8 + ((x) * 8)) x 284 drivers/gpu/drm/vc4/vc4_regs.h # define SCALER_DISPSTAT_IRQDISP(x) BIT(1 + (x)) x 297 drivers/gpu/drm/vc4/vc4_regs.h #define SCALER_DISPLISTX(x) (SCALER_DISPLIST0 + \ x 298 drivers/gpu/drm/vc4/vc4_regs.h (x) * (SCALER_DISPLIST1 - \ x 304 drivers/gpu/drm/vc4/vc4_regs.h #define SCALER_DISPLACTX(x) (SCALER_DISPLACT0 + \ x 305 drivers/gpu/drm/vc4/vc4_regs.h (x) * (SCALER_DISPLACT1 - \ x 372 drivers/gpu/drm/vc4/vc4_regs.h #define SCALER_DISPBKGNDX(x) (SCALER_DISPBKGND0 + \ x 373 drivers/gpu/drm/vc4/vc4_regs.h (x) * (SCALER_DISPBKGND1 - \ x 376 drivers/gpu/drm/vc4/vc4_regs.h #define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \ x 377 drivers/gpu/drm/vc4/vc4_regs.h (x) * (SCALER_DISPSTAT1 - \ x 380 drivers/gpu/drm/vc4/vc4_regs.h #define SCALER_DISPBASEX(x) (SCALER_DISPBASE0 + \ x 381 drivers/gpu/drm/vc4/vc4_regs.h (x) * (SCALER_DISPBASE1 - \ x 384 drivers/gpu/drm/vc4/vc4_regs.h #define SCALER_DISPCTRLX(x) (SCALER_DISPCTRL0 + \ x 385 drivers/gpu/drm/vc4/vc4_regs.h (x) * (SCALER_DISPCTRL1 - \ x 704 drivers/gpu/drm/vc4/vc4_regs.h #define VC4_HDMI_GCP(x) (0x400 + ((x) * 0x4)) x 705 drivers/gpu/drm/vc4/vc4_regs.h #define VC4_HDMI_RAM_PACKET(x) (0x400 + ((x) * 0x24)) x 102 drivers/gpu/drm/vc4/vc4_render_cl.c uint8_t x, uint8_t y) x 105 drivers/gpu/drm/vc4/vc4_render_cl.c (DIV_ROUND_UP(exec->args->width, 32) * y + x); x 116 drivers/gpu/drm/vc4/vc4_render_cl.c uint32_t x, uint32_t y) x 119 drivers/gpu/drm/vc4/vc4_render_cl.c rcl_u8(setup, x); x 125 drivers/gpu/drm/vc4/vc4_render_cl.c uint8_t x, uint8_t y, bool first, bool last) x 140 drivers/gpu/drm/vc4/vc4_render_cl.c &args->color_read, x, y) | x 153 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_tile_coordinates(setup, x, y); x 162 drivers/gpu/drm/vc4/vc4_render_cl.c &args->zs_read, x, y) | x 175 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_tile_coordinates(setup, x, y); x 186 drivers/gpu/drm/vc4/vc4_render_cl.c (y * exec->bin_tiles_x + x) * 32)); x 202 drivers/gpu/drm/vc4/vc4_render_cl.c &args->msaa_color_write, x, y) | x 212 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_tile_coordinates(setup, x, y); x 220 drivers/gpu/drm/vc4/vc4_render_cl.c &args->msaa_zs_write, x, y) | x 228 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_tile_coordinates(setup, x, y); x 243 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_tile_coordinates(setup, x, y); x 368 drivers/gpu/drm/vc4/vc4_render_cl.c int x = positive_x ? min_x_tile + xi : max_x_tile - xi; x 372 drivers/gpu/drm/vc4/vc4_render_cl.c emit_tile(exec, setup, x, y, first, last); x 44 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_CONFIG0_YDEL(x) ((x) << 26) x 46 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_CONFIG0_CDEL(x) ((x) << 24) x 106 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_CONFIG2_SYNC_ADJ(x) (((x) / 2) << 12) x 131 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_CFG_SG_MODE(x) ((x) << 5) x 141 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_DAC_CONFIG_LDO_BIAS_CTRL(x) ((x) << 24) x 142 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_DAC_CONFIG_DRIVER_CTRL(x) ((x) << 16) x 143 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_DAC_CONFIG_DAC_CTRL(x) (x) x 147 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_DAC_MISC_VCD_CTRL(x) ((x) << 16) x 42 drivers/gpu/drm/vgem/vgem_drv.h #define to_vgem_bo(x) container_of(x, struct drm_vgem_gem_object, base) x 48 drivers/gpu/drm/via/via_dmablit.c #define VIA_PGDN(x) (((unsigned long)(x)) & PAGE_MASK) x 49 drivers/gpu/drm/via/via_dmablit.c #define VIA_PGOFF(x) (((unsigned long)(x)) & ~PAGE_MASK) x 50 drivers/gpu/drm/via/via_dmablit.c #define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT) x 106 drivers/gpu/drm/virtio/virtgpu_drv.h #define to_virtio_fence(x) \ x 107 drivers/gpu/drm/virtio/virtgpu_drv.h container_of(x, struct virtio_gpu_fence, f) x 136 drivers/gpu/drm/virtio/virtgpu_drv.h #define drm_crtc_to_virtio_gpu_output(x) \ x 137 drivers/gpu/drm/virtio/virtgpu_drv.h container_of(x, struct virtio_gpu_output, crtc) x 138 drivers/gpu/drm/virtio/virtgpu_drv.h #define drm_connector_to_virtio_gpu_output(x) \ x 139 drivers/gpu/drm/virtio/virtgpu_drv.h container_of(x, struct virtio_gpu_output, conn) x 140 drivers/gpu/drm/virtio/virtgpu_drv.h #define drm_encoder_to_virtio_gpu_output(x) \ x 141 drivers/gpu/drm/virtio/virtgpu_drv.h container_of(x, struct virtio_gpu_output, enc) x 147 drivers/gpu/drm/virtio/virtgpu_drv.h #define to_virtio_gpu_framebuffer(x) \ x 148 drivers/gpu/drm/virtio/virtgpu_drv.h container_of(x, struct virtio_gpu_framebuffer, base) x 267 drivers/gpu/drm/virtio/virtgpu_drv.h __le32 x, __le32 y, x 271 drivers/gpu/drm/virtio/virtgpu_drv.h uint32_t x, uint32_t y, x 276 drivers/gpu/drm/virtio/virtgpu_drv.h uint32_t x, uint32_t y); x 40 drivers/gpu/drm/virtio/virtgpu_ioctl.c dst->x = cpu_to_le32(src->x); x 442 drivers/gpu/drm/virtio/virtgpu_ioctl.c box.w, box.h, box.x, box.y, NULL); x 249 drivers/gpu/drm/virtio/virtgpu_plane.c output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x); x 443 drivers/gpu/drm/virtio/virtgpu_vq.c uint32_t x, uint32_t y) x 456 drivers/gpu/drm/virtio/virtgpu_vq.c cmd_p->r.x = cpu_to_le32(x); x 464 drivers/gpu/drm/virtio/virtgpu_vq.c uint32_t x, uint32_t y, x 477 drivers/gpu/drm/virtio/virtgpu_vq.c cmd_p->r.x = cpu_to_le32(x); x 487 drivers/gpu/drm/virtio/virtgpu_vq.c __le32 x, __le32 y, x 507 drivers/gpu/drm/virtio/virtgpu_vq.c cmd_p->r.x = x; x 550 drivers/gpu/drm/virtio/virtgpu_vq.c le32_to_cpu(resp->pmodes[i].r.x), x 883 drivers/gpu/drm/vmwgfx/device_include/svga3d_dx.h uint32 x; x 1269 drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h u32 x, u32 y, u32 z) x 1279 drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h x / bw * desc->bytes_per_block); x 86 drivers/gpu/drm/vmwgfx/device_include/svga_escape.h int32 x, y; x 687 drivers/gpu/drm/vmwgfx/device_include/svga_reg.h uint32 x : 8; /* Unused */ x 1447 drivers/gpu/drm/vmwgfx/device_include/svga_reg.h int32 x; x 1711 drivers/gpu/drm/vmwgfx/device_include/svga_reg.h uint32 x; x 48 drivers/gpu/drm/vmwgfx/device_include/svga_types.h #define CONST64U(x) x##ULL x 473 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c set.x = 0; x 597 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c set.x = 0; x 129 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c bool show, int x, int y) x 136 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_mmio_write(x, fifo_mem + SVGA_FIFO_CURSOR_X); x 183 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c box->x != 0 || box->y != 0 || box->z != 0 || x 192 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c box->x, box->y, box->z, x 2377 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if ((rects[i].x + rects[i].w > INT_MAX) || x 2384 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_rects[i].x1 = curr_rect.x; x 2386 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_rects[i].x2 = curr_rect.x + curr_rect.w; x 2469 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c s32 crtc_x = unit->crtc.x; x 2504 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c dirty->fb_x = vclips_ptr->x; x 2631 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c box->x = clips->x1; x 204 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_framebuffer_to_vfb(x) \ x 205 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h container_of(x, struct vmw_framebuffer, base) x 206 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_framebuffer_to_vfbs(x) \ x 207 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h container_of(x, struct vmw_framebuffer_surface, base.base) x 208 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_framebuffer_to_vfbd(x) \ x 209 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h container_of(x, struct vmw_framebuffer_bo, base.base) x 261 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_crtc_state_to_vcs(x) container_of(x, struct vmw_crtc_state, base) x 262 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_plane_state_to_vps(x) container_of(x, struct vmw_plane_state, base) x 263 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_connector_state_to_vcs(x) \ x 264 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h container_of(x, struct vmw_connector_state, base) x 380 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_crtc_to_du(x) \ x 381 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h container_of(x, struct vmw_display_unit, crtc) x 382 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h #define vmw_connector_to_du(x) \ x 383 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h container_of(x, struct vmw_display_unit, connector) x 36 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c #define vmw_crtc_to_ldu(x) \ x 37 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c container_of(x, struct vmw_legacy_display_unit, base.crtc) x 38 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c #define vmw_encoder_to_ldu(x) \ x 39 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c container_of(x, struct vmw_legacy_display_unit, base.encoder) x 40 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c #define vmw_connector_to_ldu(x) \ x 41 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c container_of(x, struct vmw_legacy_display_unit, base.connector) x 93 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c w = max(w, crtc->x + crtc->mode.hdisplay); x 125 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x); x 566 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c cmd[i].body.x = clips->x1; x 154 drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c items[SVGA_VIDEO_SRC_X].value = arg->src.x; x 158 drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c items[SVGA_VIDEO_DST_X].value = arg->dst.x; x 37 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c #define vmw_crtc_to_sou(x) \ x 38 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c container_of(x, struct vmw_screen_object_unit, base.crtc) x 39 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c #define vmw_encoder_to_sou(x) \ x 40 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c container_of(x, struct vmw_screen_object_unit, base.encoder) x 41 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c #define vmw_connector_to_sou(x) \ x 42 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c container_of(x, struct vmw_screen_object_unit, base.connector) x 120 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c int x, int y, x 147 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c cmd->obj.root.x = x; x 149 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c sou->base.set_gui_x = cmd->obj.root.x; x 241 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c int x, y; x 249 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c x = vmw_conn_state->gui_x; x 252 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode); x 255 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c crtc->x, crtc->y); x 509 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c blit->body.srcOrigin.x = fb_x; x 1027 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x; x 1213 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c blit->body.srcOrigin.x = dirty->fb_x; x 1323 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c blit->body.destOrigin.x = dirty->fb_x; x 38 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c #define vmw_crtc_to_stdu(x) \ x 39 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c container_of(x, struct vmw_screen_target_display_unit, base.crtc) x 40 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c #define vmw_encoder_to_stdu(x) \ x 41 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c container_of(x, struct vmw_screen_target_display_unit, base.encoder) x 42 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c #define vmw_connector_to_stdu(x) \ x 43 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c container_of(x, struct vmw_screen_target_display_unit, base.connector) x 267 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c update->body.rect.x = left; x 370 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c int x, y, ret; x 394 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c x = vmw_conn_state->gui_x; x 398 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y); x 402 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c crtc->x, crtc->y); x 464 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c blit->x = dirty->unit_x1; x 761 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c blit->x = dirty->unit_x1; x 1232 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->x = clip->x1; x 1332 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->x = diff.rect.x1; x 1461 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->x = clip.x1; x 1505 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->x = clip->x1; x 304 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c cb->x = 0; x 123 drivers/gpu/drm/xen/xen_drm_front.c u32 x, u32 y, u32 width, u32 height, x 141 drivers/gpu/drm/xen/xen_drm_front.c req->op.set_config.x = x; x 143 drivers/gpu/drm/xen/xen_drm_front.h u32 x, u32 y, u32 width, u32 height, x 124 drivers/gpu/drm/xen/xen_drm_front_kms.c ret = xen_drm_front_mode_set(pipeline, crtc->x, crtc->y, x 52 drivers/gpu/drm/zte/zx_hdmi.c #define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x) x 40 drivers/gpu/drm/zte/zx_plane_regs.h #define GL_SRC_W(x) (((x) << GL_SRC_W_SHIFT) & GL_SRC_W_MASK) x 41 drivers/gpu/drm/zte/zx_plane_regs.h #define GL_SRC_H(x) (((x) << GL_SRC_H_SHIFT) & GL_SRC_H_MASK) x 42 drivers/gpu/drm/zte/zx_plane_regs.h #define GL_POS_X(x) (((x) << GL_POS_X_SHIFT) & GL_POS_X_MASK) x 43 drivers/gpu/drm/zte/zx_plane_regs.h #define GL_POS_Y(x) (((x) << GL_POS_Y_SHIFT) & GL_POS_Y_MASK) x 73 drivers/gpu/drm/zte/zx_plane_regs.h #define LUMA_STRIDE(x) (((x) << LUMA_STRIDE_SHIFT) & LUMA_STRIDE_MASK) x 74 drivers/gpu/drm/zte/zx_plane_regs.h #define CHROMA_STRIDE(x) (((x) << CHROMA_STRIDE_SHIFT) & CHROMA_STRIDE_MASK) x 98 drivers/gpu/drm/zte/zx_plane_regs.h #define RSZ_VER(x) (((x) << RSZ_VER_SHIFT) & RSZ_VER_MASK) x 99 drivers/gpu/drm/zte/zx_plane_regs.h #define RSZ_HOR(x) (((x) << RSZ_HOR_SHIFT) & RSZ_HOR_MASK) x 106 drivers/gpu/drm/zte/zx_plane_regs.h #define RSZ_DATA_STEP(x) (((x) << RSZ_DATA_STEP_SHIFT) & RSZ_DATA_STEP_MASK) x 107 drivers/gpu/drm/zte/zx_plane_regs.h #define RSZ_PARA_STEP(x) (((x) << RSZ_PARA_STEP_SHIFT) & RSZ_PARA_STEP_MASK) x 37 drivers/gpu/drm/zte/zx_tvenc.c #define to_zx_tvenc(x) container_of(x, struct zx_tvenc, x) x 45 drivers/gpu/drm/zte/zx_vga.c #define to_zx_vga(x) container_of(x, struct zx_vga, x) x 133 drivers/gpu/drm/zte/zx_vou.c #define to_zx_crtc(x) container_of(x, struct zx_crtc, crtc) x 143 drivers/gpu/drm/zte/zx_vou_regs.h #define V_ACTIVE(x) (((x) << V_ACTIVE_SHIFT) & V_ACTIVE_MASK) x 144 drivers/gpu/drm/zte/zx_vou_regs.h #define H_ACTIVE(x) (((x) << H_ACTIVE_SHIFT) & H_ACTIVE_MASK) x 146 drivers/gpu/drm/zte/zx_vou_regs.h #define SYNC_WIDE(x) (((x) << SYNC_WIDE_SHIFT) & SYNC_WIDE_MASK) x 147 drivers/gpu/drm/zte/zx_vou_regs.h #define BACK_PORCH(x) (((x) << BACK_PORCH_SHIFT) & BACK_PORCH_MASK) x 148 drivers/gpu/drm/zte/zx_vou_regs.h #define FRONT_PORCH(x) (((x) << FRONT_PORCH_SHIFT) & FRONT_PORCH_MASK) x 172 drivers/gpu/drm/zte/zx_vou_regs.h #define DTRC_ARID3(x) (((x) << DTRC_ARID3_SHIFT) & DTRC_ARID3_MASK) x 173 drivers/gpu/drm/zte/zx_vou_regs.h #define DTRC_ARID2(x) (((x) << DTRC_ARID2_SHIFT) & DTRC_ARID2_MASK) x 174 drivers/gpu/drm/zte/zx_vou_regs.h #define DTRC_ARID1(x) (((x) << DTRC_ARID1_SHIFT) & DTRC_ARID1_MASK) x 175 drivers/gpu/drm/zte/zx_vou_regs.h #define DTRC_ARID0(x) (((x) << DTRC_ARID0_SHIFT) & DTRC_ARID0_MASK) x 8 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(x) (0x2020 + (x * 4)) x 10 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(x) (x) x 11 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(x) ((x) << 16) x 15 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(x) (((x) >> 16) & 0xfff) x 16 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(x) ((x) & 0xfff) x 17 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CMDFIFO_SETUP(x) (0x2588 + (x * 4)) x 18 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(x) (((x) >> 16) & 0xfff) x 19 drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h #define HOST1X_HV_CMDFIFO_SETUP_BASE_V(x) ((x) & 0xfff) x 27 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_CPU_INCR(x) (0x6400 + 4*(x)) x 28 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(x) (0x6464 + 4*(x)) x 29 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(x) (0x652c + 4*(x)) x 30 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(x) (0x6590 + 4*(x)) x 31 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_BASE(x) (0x8000 + 4*(x)) x 32 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT(x) (0x8080 + 4*(x)) x 33 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_INT_THRESH(x) (0x8a00 + 4*(x)) x 34 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_CH_APP(x) (0x9384 + 4*(x)) x 8 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(x) (0x2020 + (x * 4)) x 10 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(x) (x) x 11 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(x) ((x) << 16) x 15 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(x) (((x) >> 16) & 0xfff) x 16 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(x) ((x) & 0xfff) x 17 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CMDFIFO_SETUP(x) (0x2588 + (x * 4)) x 18 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(x) (((x) >> 16) & 0xfff) x 19 drivers/gpu/host1x/hw/hw_host1x07_hypervisor.h #define HOST1X_HV_CMDFIFO_SETUP_BASE_V(x) ((x) & 0xfff) x 27 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT_CPU_INCR(x) (0x6400 + 4 * (x)) x 28 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(x) (0x6464 + 4 * (x)) x 29 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(x) (0x652c + 4 * (x)) x 30 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(x) (0x6590 + 4 * (x)) x 31 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT(x) (0x8080 + 4 * (x)) x 32 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT_INT_THRESH(x) (0x8d00 + 4 * (x)) x 33 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT_CH_APP(x) (0xa604 + 4 * (x)) x 34 drivers/gpu/host1x/mipi.c #define MIPI_CAL_CTRL_NOISE_FILTER(x) (((x) & 0xf) << 26) x 35 drivers/gpu/host1x/mipi.c #define MIPI_CAL_CTRL_PRESCALE(x) (((x) & 0x3) << 24) x 68 drivers/gpu/host1x/mipi.c #define MIPI_CAL_CONFIG_HSPDOS(x) (((x) & 0x1f) << 16) x 69 drivers/gpu/host1x/mipi.c #define MIPI_CAL_CONFIG_HSPUOS(x) (((x) & 0x1f) << 8) x 70 drivers/gpu/host1x/mipi.c #define MIPI_CAL_CONFIG_TERMOS(x) (((x) & 0x1f) << 0) x 73 drivers/gpu/host1x/mipi.c #define MIPI_CAL_CONFIG_HSCLKPDOSD(x) (((x) & 0x1f) << 8) x 74 drivers/gpu/host1x/mipi.c #define MIPI_CAL_CONFIG_HSCLKPUOSD(x) (((x) & 0x1f) << 0) x 81 drivers/gpu/host1x/mipi.c #define MIPI_CAL_BIAS_PAD_DRV_DN_REF(x) (((x) & 0x7) << 16) x 82 drivers/gpu/host1x/mipi.c #define MIPI_CAL_BIAS_PAD_DRV_UP_REF(x) (((x) & 0x7) << 8) x 85 drivers/gpu/host1x/mipi.c #define MIPI_CAL_BIAS_PAD_VCLAMP(x) (((x) & 0x7) << 16) x 86 drivers/gpu/host1x/mipi.c #define MIPI_CAL_BIAS_PAD_VAUXP(x) (((x) & 0x7) << 4) x 588 drivers/gpu/ipu-v3/ipu-cpmem.c #define Y_OFFSET(pix, x, y) ((x) + pix->width * (y)) x 589 drivers/gpu/ipu-v3/ipu-cpmem.c #define U_OFFSET(pix, x, y) ((pix->width * pix->height) + \ x 590 drivers/gpu/ipu-v3/ipu-cpmem.c (pix->width * ((y) / 2) / 2) + (x) / 2) x 591 drivers/gpu/ipu-v3/ipu-cpmem.c #define V_OFFSET(pix, x, y) ((pix->width * pix->height) + \ x 593 drivers/gpu/ipu-v3/ipu-cpmem.c (pix->width * ((y) / 2) / 2) + (x) / 2) x 594 drivers/gpu/ipu-v3/ipu-cpmem.c #define U2_OFFSET(pix, x, y) ((pix->width * pix->height) + \ x 595 drivers/gpu/ipu-v3/ipu-cpmem.c (pix->width * (y) / 2) + (x) / 2) x 596 drivers/gpu/ipu-v3/ipu-cpmem.c #define V2_OFFSET(pix, x, y) ((pix->width * pix->height) + \ x 598 drivers/gpu/ipu-v3/ipu-cpmem.c (pix->width * (y) / 2) + (x) / 2) x 599 drivers/gpu/ipu-v3/ipu-cpmem.c #define UV_OFFSET(pix, x, y) ((pix->width * pix->height) + \ x 600 drivers/gpu/ipu-v3/ipu-cpmem.c (pix->width * ((y) / 2)) + (x)) x 601 drivers/gpu/ipu-v3/ipu-cpmem.c #define UV2_OFFSET(pix, x, y) ((pix->width * pix->height) + \ x 602 drivers/gpu/ipu-v3/ipu-cpmem.c (pix->width * y) + (x)) x 90 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN0_RUN_COUNT(x) ((x) << 19) x 91 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN0_RUN_SRC(x) ((x) << 16) x 92 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN0_OFFSET_COUNT(x) ((x) << 3) x 93 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN0_OFFSET_SRC(x) ((x) << 0) x 95 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN1_CNT_POL_GEN_EN(x) ((x) << 29) x 96 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN1_CNT_CLR_SRC(x) ((x) << 25) x 97 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN1_CNT_POL_TRIGGER_SRC(x) ((x) << 12) x 98 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN1_CNT_POL_CLR_SRC(x) ((x) << 9) x 99 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN1_CNT_DOWN(x) ((x) << 16) x 100 drivers/gpu/ipu-v3/ipu-di.c #define DI_SW_GEN1_CNT_UP(x) (x) x 461 drivers/gpu/ipu-v3/ipu-image-convert.c #define round_closest(x, y) round_down((x) + (y)/2, (y)) x 1916 drivers/gpu/ipu-v3/ipu-image-convert.c static unsigned int clamp_align(unsigned int x, unsigned int min, x 1923 drivers/gpu/ipu-v3/ipu-image-convert.c x = clamp(x, (min + ~mask) & mask, max & mask); x 1927 drivers/gpu/ipu-v3/ipu-image-convert.c x = (x + (1 << (align - 1))) & mask; x 1929 drivers/gpu/ipu-v3/ipu-image-convert.c return x; x 320 drivers/hid/hid-alps.c unsigned int x, y, z; x 327 drivers/hid/hid-alps.c x = p_report->contact[i].x_hi << 8 | p_report->contact[i].x_lo; x 332 drivers/hid/hid-alps.c if (x == 0xffff) { x 333 drivers/hid/hid-alps.c x = 0; x 345 drivers/hid/hid-alps.c input_report_abs(hdata->input, ABS_MT_POSITION_X, x); x 359 drivers/hid/hid-alps.c unsigned int x, y, z; x 374 drivers/hid/hid-alps.c x = get_unaligned_le16(contact + 3); x 384 drivers/hid/hid-alps.c ABS_MT_POSITION_X, x); x 171 drivers/hid/hid-asus.c int touch_major, pressure, x, y; x 173 drivers/hid/hid-asus.c x = (data[0] & CONTACT_X_MSB_MASK) << 4 | data[1]; x 176 drivers/hid/hid-asus.c input_report_abs(input, ABS_MT_POSITION_X, x); x 214 drivers/hid/hid-elan.c int x, y, p; x 221 drivers/hid/hid-elan.c x = ((data[0] & 0xF0) << 4) | data[1]; x 226 drivers/hid/hid-elan.c input_report_abs(input, ABS_MT_POSITION_X, x); x 47 drivers/hid/hid-input.c __s32 x; x 1286 drivers/hid/hid-input.c input_event(input, usage->type, usage->code , hid_hat_to_axis[hat_dir].x); x 54 drivers/hid/hid-lg3ff.c int x, y; x 69 drivers/hid/hid-lg3ff.c x = effect->u.ramp.start_level; x 79 drivers/hid/hid-lg3ff.c report->field[0]->value[1] = (unsigned char)(-x); x 413 drivers/hid/hid-lg4ff.c int x; x 428 drivers/hid/hid-lg4ff.c #define CLAMP(x) do { if (x < 0) x = 0; else if (x > 0xff) x = 0xff; } while (0) x 432 drivers/hid/hid-lg4ff.c x = effect->u.ramp.start_level + 0x80; /* 0x80 is no force */ x 433 drivers/hid/hid-lg4ff.c CLAMP(x); x 436 drivers/hid/hid-lg4ff.c if (x == 0x80) { x 453 drivers/hid/hid-lg4ff.c value[2] = x; x 62 drivers/hid/hid-lgff.c int x, y; x 65 drivers/hid/hid-lgff.c #define CLAMP(x) if (x < 0) x = 0; if (x > 0xff) x = 0xff x 69 drivers/hid/hid-lgff.c x = effect->u.ramp.start_level + 0x7f; /* 0x7f is center */ x 71 drivers/hid/hid-lgff.c CLAMP(x); x 75 drivers/hid/hid-lgff.c report->field[0]->value[2] = x; x 77 drivers/hid/hid-lgff.c dbg_hid("(x, y)=(%04x, %04x)\n", x, y); x 1541 drivers/hid/hid-logitech-hidpp.c u16 x; x 1614 drivers/hid/hid-logitech-hidpp.c finger->x = x_m << 6 | data[1]; x 2256 drivers/hid/hid-logitech-hidpp.c touch_report->x); x 2296 drivers/hid/hid-logitech-hidpp.c .x = get_unaligned_le16(&data[3]), x 2304 drivers/hid/hid-logitech-hidpp.c .x = get_unaligned_le16(&data[9]), x 123 drivers/hid/hid-magicmouse.c short x; x 173 drivers/hid/hid-magicmouse.c int x = msc->touches[id].x; x 174 drivers/hid/hid-magicmouse.c if (x < middle_button_start) x 176 drivers/hid/hid-magicmouse.c else if (x > middle_button_stop) x 195 drivers/hid/hid-magicmouse.c int id, x, y, size, orientation, touch_major, touch_minor, state, down; x 200 drivers/hid/hid-magicmouse.c x = (tdata[1] << 28 | tdata[0] << 20) >> 20; x 210 drivers/hid/hid-magicmouse.c x = (tdata[1] << 27 | tdata[0] << 19) >> 19; x 221 drivers/hid/hid-magicmouse.c x = (tdata[1] << 27 | tdata[0] << 19) >> 19; x 233 drivers/hid/hid-magicmouse.c msc->touches[id].x = x; x 243 drivers/hid/hid-magicmouse.c int step_x = msc->touches[id].scroll_x - x; x 249 drivers/hid/hid-magicmouse.c msc->touches[id].scroll_x = x; x 292 drivers/hid/hid-magicmouse.c input_report_abs(input, ABS_MT_POSITION_X, x); x 313 drivers/hid/hid-magicmouse.c int x = 0, y = 0, ii, clicks = 0, npoints; x 373 drivers/hid/hid-magicmouse.c x = (int)(((data[3] & 0x0c) << 28) | (data[1] << 22)) >> 22; x 397 drivers/hid/hid-magicmouse.c input_report_rel(input, REL_X, x); x 98 drivers/hid/hid-multitouch.c __s32 *x, *y, *cx, *cy, *p, *w, *h, *a; x 514 drivers/hid/hid-multitouch.c usage->x = DEFAULT_ZERO; x 668 drivers/hid/hid-multitouch.c usage->x == DEFAULT_ZERO || x 724 drivers/hid/hid-multitouch.c MT_STORE_FIELD(x); x 1088 drivers/hid/hid-multitouch.c input_event(input, EV_ABS, ABS_MT_POSITION_X, *slot->x); x 53 drivers/hid/hid-ntrig.c __u16 x, y, w, h; x 601 drivers/hid/hid-ntrig.c nd->x = value; x 630 drivers/hid/hid-ntrig.c input_event(input, EV_ABS, ABS_X, nd->x); x 723 drivers/hid/hid-ntrig.c input_event(input, EV_ABS, ABS_X, nd->x); x 728 drivers/hid/hid-ntrig.c input_event(input, EV_ABS, ABS_MT_POSITION_X, nd->x); x 152 drivers/hid/hid-roccat-kone.h uint16_t x; x 428 drivers/hid/hid-sony.c static const struct {int x; int y; } ds4_hat_mapping[] = { x 983 drivers/hid/hid-sony.c input_report_abs(input_dev, ABS_HAT0X, ds4_hat_mapping[value].x); x 1104 drivers/hid/hid-sony.c u16 x, y; x 1107 drivers/hid/hid-sony.c x = rd[offset+1] | ((rd[offset+2] & 0xF) << 8); x 1115 drivers/hid/hid-sony.c input_report_abs(sc->touchpad, ABS_MT_POSITION_X, x); x 1159 drivers/hid/hid-sony.c u16 x, y; x 1162 drivers/hid/hid-sony.c x = rd[offset] | ((rd[offset+1] & 0x0F) << 8); x 1177 drivers/hid/hid-sony.c input_report_abs(sc->touchpad, ABS_MT_POSITION_X, x); x 844 drivers/hid/hid-steam.c s16 x = (s16) le16_to_cpup((__le16 *)data); x 846 drivers/hid/hid-steam.c return x == -32768 ? -32767 : x; x 920 drivers/hid/hid-steam.c s16 x, y; x 940 drivers/hid/hid-steam.c x = steam_le16(data + 16); x 943 drivers/hid/hid-steam.c input_report_abs(input, lpad_touched ? ABS_HAT0X : ABS_X, x); x 79 drivers/hid/hid-tmff.c int x, y; x 85 drivers/hid/hid-tmff.c x = tmff_scale_s8(effect->u.ramp.start_level, x 92 drivers/hid/hid-tmff.c dbg_hid("(x, y)=(%04x, %04x)\n", x, y); x 93 drivers/hid/hid-tmff.c ff_field->value[0] = x; x 106 drivers/hid/hid-udraw-ps3.c int x, y, z; x 130 drivers/hid/hid-udraw-ps3.c x = y = 0; x 137 drivers/hid/hid-udraw-ps3.c x = 127; x 140 drivers/hid/hid-udraw-ps3.c x = 127; x 144 drivers/hid/hid-udraw-ps3.c x = 127; x 151 drivers/hid/hid-udraw-ps3.c x = -127; x 154 drivers/hid/hid-udraw-ps3.c x = -127; x 158 drivers/hid/hid-udraw-ps3.c x = -127; x 164 drivers/hid/hid-udraw-ps3.c input_report_abs(udraw->joy_input_dev, ABS_X, x); x 170 drivers/hid/hid-udraw-ps3.c x = y = 0; x 173 drivers/hid/hid-udraw-ps3.c x = data[15] * 256 + data[17]; x 180 drivers/hid/hid-udraw-ps3.c udraw->last_one_finger_x = x; x 195 drivers/hid/hid-udraw-ps3.c udraw->last_two_finger_x = x; x 198 drivers/hid/hid-udraw-ps3.c x = udraw->last_one_finger_x; x 205 drivers/hid/hid-udraw-ps3.c x = x - (udraw->last_two_finger_x x 220 drivers/hid/hid-udraw-ps3.c input_report_abs(udraw->touch_input_dev, ABS_X, x); x 239 drivers/hid/hid-udraw-ps3.c input_report_abs(udraw->pen_input_dev, ABS_X, x); x 249 drivers/hid/hid-udraw-ps3.c x = (data[19] + (data[20] << 8)); x 250 drivers/hid/hid-udraw-ps3.c x = clamp_accel(x, AXIS_X); x 255 drivers/hid/hid-udraw-ps3.c input_report_abs(udraw->accel_input_dev, ABS_X, x); x 428 drivers/hid/hid-wiimote-modules.c __u16 x, y, z; x 445 drivers/hid/hid-wiimote-modules.c x = accel[2] << 2; x 449 drivers/hid/hid-wiimote-modules.c x |= (accel[0] >> 5) & 0x3; x 453 drivers/hid/hid-wiimote-modules.c input_report_abs(wdata->accel, ABS_RX, x - 0x200); x 553 drivers/hid/hid-wiimote-modules.c __u16 x, y; x 593 drivers/hid/hid-wiimote-modules.c x = ir[1] | ((ir[0] & 0x03) << 8); x 596 drivers/hid/hid-wiimote-modules.c x = ir[0] | ((ir[2] & 0x30) << 4); x 600 drivers/hid/hid-wiimote-modules.c input_report_abs(wdata->ir, xid, x); x 822 drivers/hid/hid-wiimote-modules.c __s16 x, y, z, bx, by; x 859 drivers/hid/hid-wiimote-modules.c x = ext[2] << 2; x 864 drivers/hid/hid-wiimote-modules.c x |= (ext[5] >> 3) & 0x02; x 869 drivers/hid/hid-wiimote-modules.c x |= (ext[5] >> 2) & 0x03; x 874 drivers/hid/hid-wiimote-modules.c x -= 0x200; x 881 drivers/hid/hid-wiimote-modules.c input_report_abs(wdata->extension.input, ABS_RX, x); x 2471 drivers/hid/hid-wiimote-modules.c __s32 x, y, z; x 2497 drivers/hid/hid-wiimote-modules.c x = ext[0]; x 2501 drivers/hid/hid-wiimote-modules.c x |= (((__u16)ext[3]) << 6) & 0xff00; x 2505 drivers/hid/hid-wiimote-modules.c x -= 8192; x 2510 drivers/hid/hid-wiimote-modules.c x = (x * 2000 * 9) / 440; x 2512 drivers/hid/hid-wiimote-modules.c x *= 9; x 2522 drivers/hid/hid-wiimote-modules.c input_report_abs(wdata->mp, ABS_RX, x); x 844 drivers/hid/wacom_wac.c unsigned int x, y, distance, t; x 880 drivers/hid/wacom_wac.c x = (be16_to_cpup((__be16 *)&data[2]) << 1) | ((data[9] >> 1) & 1); x 884 drivers/hid/wacom_wac.c x >>= 1; x 890 drivers/hid/wacom_wac.c input_report_abs(input, ABS_X, x); x 1175 drivers/hid/wacom_wac.c int x = x2 - x1; x 1178 drivers/hid/wacom_wac.c return int_sqrt(x*x + y*y); x 1390 drivers/hid/wacom_wac.c int x = get_unaligned_le16(&touch[2]); x 1400 drivers/hid/wacom_wac.c input_report_abs(touch_input, ABS_MT_POSITION_X, x); x 1626 drivers/hid/wacom_wac.c int x = get_unaligned_le16(&data[offset + x_offset + 7]); x 1628 drivers/hid/wacom_wac.c input_report_abs(input, ABS_MT_POSITION_X, x); x 1655 drivers/hid/wacom_wac.c int x = le16_to_cpup((__le16 *)&data[i * 2 + 2]) & 0x7fff; x 1658 drivers/hid/wacom_wac.c input_report_abs(input, ABS_MT_POSITION_X, x); x 1675 drivers/hid/wacom_wac.c int x = 0, y = 0; x 1682 drivers/hid/wacom_wac.c x = get_unaligned_le16(&data[1]); x 1686 drivers/hid/wacom_wac.c x = get_unaligned_le16(&data[3]); x 1690 drivers/hid/wacom_wac.c x = le16_to_cpup((__le16 *)&data[2]); x 1695 drivers/hid/wacom_wac.c input_report_abs(input, ABS_X, x); x 2556 drivers/hid/wacom_wac.c hid_data->x); x 2582 drivers/hid/wacom_wac.c wacom_wac->hid_data.x = value; x 2855 drivers/hid/wacom_wac.c int x = get_unaligned_be16(&data[offset + 3]) & 0x7ff; x 2858 drivers/hid/wacom_wac.c x <<= 5; x 2861 drivers/hid/wacom_wac.c input_report_abs(input, ABS_MT_POSITION_X, x); x 2893 drivers/hid/wacom_wac.c int x = (data[2] << 4) | (data[4] >> 4); x 2913 drivers/hid/wacom_wac.c input_report_abs(input, ABS_MT_POSITION_X, x); x 2972 drivers/hid/wacom_wac.c int x = 0, y = 0, p = 0, d = 0; x 2994 drivers/hid/wacom_wac.c x = le16_to_cpup((__le16 *)&data[2]); x 3025 drivers/hid/wacom_wac.c input_report_abs(input, ABS_X, x); x 3091 drivers/hid/wacom_wac.c int x, y; x 3107 drivers/hid/wacom_wac.c x = finger_data[0] | ((finger_data[1] & 0x0f) << 8); x 3110 drivers/hid/wacom_wac.c input_report_abs(input, ABS_MT_POSITION_X, x); x 303 drivers/hid/wacom_wac.h int x; x 45 drivers/hsi/clients/ssi_protocol.c #define SSIP_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1) x 23 drivers/hsi/controllers/omap_ssi.h #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1) x 635 drivers/hwmon/abituguru3.c u8 x; x 638 drivers/hwmon/abituguru3.c while ((x = inb_p(data->addr + ABIT_UGURU3_DATA)) & x 642 drivers/hwmon/abituguru3.c return x; x 656 drivers/hwmon/abituguru3.c u8 x; x 659 drivers/hwmon/abituguru3.c while (!((x = inb_p(data->addr + ABIT_UGURU3_DATA)) & x 663 drivers/hwmon/abituguru3.c return x; x 680 drivers/hwmon/abituguru3.c int x, timeout = ABIT_UGURU3_SYNCHRONIZE_TIMEOUT; x 682 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 683 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 685 drivers/hwmon/abituguru3.c "wait, status: 0x%02x\n", x); x 690 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 691 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 693 drivers/hwmon/abituguru3.c "status: 0x%02x\n", x); x 698 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 699 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 701 drivers/hwmon/abituguru3.c "status: 0x%02x\n", x); x 706 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 707 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 709 drivers/hwmon/abituguru3.c "status: 0x%02x\n", x); x 713 drivers/hwmon/abituguru3.c x = abituguru3_wait_for_read(data); x 714 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 716 drivers/hwmon/abituguru3.c "status: 0x%02x\n", x); x 720 drivers/hwmon/abituguru3.c while ((x = inb(data->addr + ABIT_UGURU3_CMD)) != 0xAC) { x 725 drivers/hwmon/abituguru3.c x); x 740 drivers/hwmon/abituguru3.c int i, x; x 742 drivers/hwmon/abituguru3.c x = abituguru3_synchronize(data); x 743 drivers/hwmon/abituguru3.c if (x) x 744 drivers/hwmon/abituguru3.c return x; x 747 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 748 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 751 drivers/hwmon/abituguru3.c (unsigned int)offset, x); x 756 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 757 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 760 drivers/hwmon/abituguru3.c (unsigned int)bank, (unsigned int)offset, x); x 765 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 766 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 769 drivers/hwmon/abituguru3.c (unsigned int)bank, (unsigned int)offset, x); x 774 drivers/hwmon/abituguru3.c x = abituguru3_wait_while_busy(data); x 775 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 778 drivers/hwmon/abituguru3.c (unsigned int)bank, (unsigned int)offset, x); x 783 drivers/hwmon/abituguru3.c x = abituguru3_wait_for_read(data); x 784 drivers/hwmon/abituguru3.c if (x != ABIT_UGURU3_SUCCESS) { x 787 drivers/hwmon/abituguru3.c (unsigned int)bank, (unsigned int)offset, x); x 803 drivers/hwmon/abituguru3.c int i, x; x 806 drivers/hwmon/abituguru3.c x = abituguru3_read(data, bank, offset + i, count, x 808 drivers/hwmon/abituguru3.c if (x != count) { x 809 drivers/hwmon/abituguru3.c if (x < 0) x 810 drivers/hwmon/abituguru3.c return x; x 811 drivers/hwmon/abituguru3.c return i * count + x; x 37 drivers/hwmon/ad7418.c #define AD7418_REG_ADC_CH(x) ((x) << 5) x 124 drivers/hwmon/adt7462.c #define ADT7462_TEMP_REG(x) (ADT7462_REG_TEMP_BASE_ADDR + ((x) * 2)) x 125 drivers/hwmon/adt7462.c #define ADT7462_TEMP_MIN_REG(x) (ADT7462_REG_MIN_TEMP_BASE_ADDR + (x)) x 126 drivers/hwmon/adt7462.c #define ADT7462_TEMP_MAX_REG(x) (ADT7462_REG_MAX_TEMP_BASE_ADDR + (x)) x 130 drivers/hwmon/adt7462.c #define ADT7462_REG_FAN_MIN(x) (ADT7462_REG_FAN_MIN_BASE_ADDR + (x)) x 133 drivers/hwmon/adt7462.c #define ADT7462_REG_PWM(x) (ADT7462_REG_PWM_BASE_ADDR + (x)) x 134 drivers/hwmon/adt7462.c #define ADT7462_REG_PWM_MIN(x) (ADT7462_REG_PWM_MIN_BASE_ADDR + (x)) x 135 drivers/hwmon/adt7462.c #define ADT7462_REG_PWM_TMIN(x) \ x 136 drivers/hwmon/adt7462.c (ADT7462_REG_PWM_TEMP_MIN_BASE_ADDR + (x)) x 137 drivers/hwmon/adt7462.c #define ADT7462_REG_PWM_TRANGE(x) \ x 138 drivers/hwmon/adt7462.c (ADT7462_REG_PWM_TEMP_RANGE_BASE_ADDR + (x)) x 141 drivers/hwmon/adt7462.c #define ADT7462_REG_PIN_CFG(x) (ADT7462_REG_PIN_CFG_BASE_ADDR + (x)) x 142 drivers/hwmon/adt7462.c #define ADT7462_REG_PWM_CFG(x) (ADT7462_REG_PWM_CFG_BASE_ADDR + (x)) x 183 drivers/hwmon/adt7462.c #define FAN_PERIOD_TO_RPM(x) ((90000 * 60) / (x)) x 186 drivers/hwmon/adt7462.c #define FAN_DATA_VALID(x) ((x) && (x) != FAN_PERIOD_INVALID) x 878 drivers/hwmon/adt7462.c int x = voltage_multiplier(data, attr->index); x 880 drivers/hwmon/adt7462.c x *= data->volt_max[attr->index]; x 881 drivers/hwmon/adt7462.c x /= 1000; /* convert from uV to mV */ x 883 drivers/hwmon/adt7462.c return sprintf(buf, "%d\n", x); x 893 drivers/hwmon/adt7462.c int x = voltage_multiplier(data, attr->index); x 896 drivers/hwmon/adt7462.c if (kstrtol(buf, 10, &temp) || !x) x 899 drivers/hwmon/adt7462.c temp = clamp_val(temp, 0, 255 * x / 1000); x 901 drivers/hwmon/adt7462.c temp = DIV_ROUND_CLOSEST(temp, x); x 918 drivers/hwmon/adt7462.c int x = voltage_multiplier(data, attr->index); x 920 drivers/hwmon/adt7462.c x *= data->volt_min[attr->index]; x 921 drivers/hwmon/adt7462.c x /= 1000; /* convert from uV to mV */ x 923 drivers/hwmon/adt7462.c return sprintf(buf, "%d\n", x); x 933 drivers/hwmon/adt7462.c int x = voltage_multiplier(data, attr->index); x 936 drivers/hwmon/adt7462.c if (kstrtol(buf, 10, &temp) || !x) x 939 drivers/hwmon/adt7462.c temp = clamp_val(temp, 0, 255 * x / 1000); x 941 drivers/hwmon/adt7462.c temp = DIV_ROUND_CLOSEST(temp, x); x 958 drivers/hwmon/adt7462.c int x = voltage_multiplier(data, attr->index); x 960 drivers/hwmon/adt7462.c x *= data->voltages[attr->index]; x 961 drivers/hwmon/adt7462.c x /= 1000; /* convert from uV to mV */ x 963 drivers/hwmon/adt7462.c return sprintf(buf, "%d\n", x); x 87 drivers/hwmon/adt7470.c #define ADT7470_TEMP_REG(x) (ADT7470_REG_TEMP_BASE_ADDR + (x)) x 88 drivers/hwmon/adt7470.c #define ADT7470_TEMP_MIN_REG(x) (ADT7470_REG_TEMP_LIMITS_BASE_ADDR + ((x) * 2)) x 89 drivers/hwmon/adt7470.c #define ADT7470_TEMP_MAX_REG(x) (ADT7470_REG_TEMP_LIMITS_BASE_ADDR + \ x 90 drivers/hwmon/adt7470.c ((x) * 2) + 1) x 93 drivers/hwmon/adt7470.c #define ADT7470_REG_FAN(x) (ADT7470_REG_FAN_BASE_ADDR + ((x) * 2)) x 94 drivers/hwmon/adt7470.c #define ADT7470_REG_FAN_MIN(x) (ADT7470_REG_FAN_MIN_BASE_ADDR + ((x) * 2)) x 95 drivers/hwmon/adt7470.c #define ADT7470_REG_FAN_MAX(x) (ADT7470_REG_FAN_MAX_BASE_ADDR + ((x) * 2)) x 98 drivers/hwmon/adt7470.c #define ADT7470_REG_PWM(x) (ADT7470_REG_PWM_BASE_ADDR + (x)) x 99 drivers/hwmon/adt7470.c #define ADT7470_REG_PWM_MAX(x) (ADT7470_REG_PWM_MAX_BASE_ADDR + (x)) x 100 drivers/hwmon/adt7470.c #define ADT7470_REG_PWM_MIN(x) (ADT7470_REG_PWM_MIN_BASE_ADDR + (x)) x 101 drivers/hwmon/adt7470.c #define ADT7470_REG_PWM_TMIN(x) (ADT7470_REG_PWM_TEMP_MIN_BASE_ADDR + (x)) x 102 drivers/hwmon/adt7470.c #define ADT7470_REG_PWM_CFG(x) (ADT7470_REG_PWM_CFG_BASE_ADDR + ((x) / 2)) x 103 drivers/hwmon/adt7470.c #define ADT7470_REG_PWM_AUTO_TEMP(x) (ADT7470_REG_PWM_AUTO_TEMP_BASE_ADDR + \ x 104 drivers/hwmon/adt7470.c ((x) / 2)) x 106 drivers/hwmon/adt7470.c #define ALARM2(x) ((x) << 8) x 129 drivers/hwmon/adt7470.c #define FAN_PERIOD_TO_RPM(x) ((90000 * 60) / (x)) x 132 drivers/hwmon/adt7470.c #define FAN_DATA_VALID(x) ((x) && (x) != FAN_PERIOD_INVALID) x 687 drivers/hwmon/applesmc.c s16 x, y; x 689 drivers/hwmon/applesmc.c if (applesmc_read_s16(MOTION_SENSOR_X_KEY, &x)) x 694 drivers/hwmon/applesmc.c x = -x; x 695 drivers/hwmon/applesmc.c input_report_abs(idev, ABS_X, x - rest_x); x 712 drivers/hwmon/applesmc.c s16 x, y, z; x 714 drivers/hwmon/applesmc.c ret = applesmc_read_s16(MOTION_SENSOR_X_KEY, &x); x 728 drivers/hwmon/applesmc.c return snprintf(buf, PAGE_SIZE, "(%d,%d,%d)\n", x, y, z); x 65 drivers/hwmon/aspeed-pwm-tacho.c #define ASPEED_PTCR_CTRL_FAN_NUM_EN(x) BIT(16 + (x)) x 108 drivers/hwmon/aspeed-pwm-tacho.c #define TACH_PWM_SOURCE_BIT01(x) ((x) * 2) x 109 drivers/hwmon/aspeed-pwm-tacho.c #define TACH_PWM_SOURCE_BIT2(x) ((x) * 2) x 110 drivers/hwmon/aspeed-pwm-tacho.c #define TACH_PWM_SOURCE_MASK_BIT01(x) (0x3 << ((x) * 2)) x 111 drivers/hwmon/aspeed-pwm-tacho.c #define TACH_PWM_SOURCE_MASK_BIT2(x) BIT((x) * 2) x 400 drivers/hwmon/ibmaem.c u8 *x = buf; x 401 drivers/hwmon/ibmaem.c *x = rs_resp->bytes[0]; x 405 drivers/hwmon/ibmaem.c u16 *x = buf; x 406 drivers/hwmon/ibmaem.c *x = be16_to_cpup((__be16 *)rs_resp->bytes); x 410 drivers/hwmon/ibmaem.c u32 *x = buf; x 411 drivers/hwmon/ibmaem.c *x = be32_to_cpup((__be32 *)rs_resp->bytes); x 415 drivers/hwmon/ibmaem.c u64 *x = buf; x 416 drivers/hwmon/ibmaem.c *x = be64_to_cpup((__be64 *)rs_resp->bytes); x 103 drivers/hwmon/ibmpowernv.c u64 x; x 108 drivers/hwmon/ibmpowernv.c ret = opal_get_sensor_data_u64(sdata->id, &x); x 115 drivers/hwmon/ibmpowernv.c x *= 1000; x 118 drivers/hwmon/ibmpowernv.c x *= 1000000; x 120 drivers/hwmon/ibmpowernv.c return sprintf(buf, "%llu\n", x); x 43 drivers/hwmon/ina3221.c #define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3) x 46 drivers/hwmon/ina3221.c #define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6) x 49 drivers/hwmon/ina3221.c #define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9) x 51 drivers/hwmon/ina3221.c #define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x)) x 38 drivers/hwmon/lm95234.c #define LM95234_REG_TEMPH(x) ((x) + 0x10) x 39 drivers/hwmon/lm95234.c #define LM95234_REG_TEMPL(x) ((x) + 0x20) x 40 drivers/hwmon/lm95234.c #define LM95234_REG_UTEMPH(x) ((x) + 0x19) /* Remote only */ x 41 drivers/hwmon/lm95234.c #define LM95234_REG_UTEMPL(x) ((x) + 0x29) x 44 drivers/hwmon/lm95234.c #define LM95234_REG_OFFSET(x) ((x) + 0x31) /* Remote only */ x 45 drivers/hwmon/lm95234.c #define LM95234_REG_TCRIT1(x) ((x) + 0x40) x 46 drivers/hwmon/lm95234.c #define LM95234_REG_TCRIT2(x) ((x) + 0x49) /* Remote channel 1,2 */ x 163 drivers/hwmon/max1111.c struct spi_transfer *x; x 166 drivers/hwmon/max1111.c x = &data->xfer[0]; x 170 drivers/hwmon/max1111.c x->tx_buf = &data->tx_buf[0]; x 171 drivers/hwmon/max1111.c x->len = MAX1111_TX_BUF_SIZE; x 172 drivers/hwmon/max1111.c spi_message_add_tail(x, m); x 174 drivers/hwmon/max1111.c x++; x 175 drivers/hwmon/max1111.c x->rx_buf = &data->rx_buf[0]; x 176 drivers/hwmon/max1111.c x->len = MAX1111_RX_BUF_SIZE; x 177 drivers/hwmon/max1111.c spi_message_add_tail(x, m); x 29 drivers/hwmon/max16065.c #define MAX16065_ADC(x) ((x) * 2) x 33 drivers/hwmon/max16065.c #define MAX16065_FAULT(x) (0x1b + (x)) x 34 drivers/hwmon/max16065.c #define MAX16065_SCALE(x) (0x43 + (x)) x 36 drivers/hwmon/max16065.c #define MAX16065_LIMIT(l, x) (0x48 + (l) + (x) * 3) /* x 132 drivers/hwmon/nct6683.c #define NCT6683_REG_MON(x) (0x100 + (x) * 2) x 133 drivers/hwmon/nct6683.c #define NCT6683_REG_FAN_RPM(x) (0x140 + (x) * 2) x 134 drivers/hwmon/nct6683.c #define NCT6683_REG_PWM(x) (0x160 + (x)) x 135 drivers/hwmon/nct6683.c #define NCT6683_REG_PWM_WRITE(x) (0xa28 + (x)) x 137 drivers/hwmon/nct6683.c #define NCT6683_REG_MON_STS(x) (0x174 + (x)) x 138 drivers/hwmon/nct6683.c #define NCT6683_REG_IDLE(x) (0x178 + (x)) x 140 drivers/hwmon/nct6683.c #define NCT6683_REG_FAN_STS(x) (0x17c + (x)) x 146 drivers/hwmon/nct6683.c #define NCT6683_REG_MON_CFG(x) (0x1a0 + (x)) x 147 drivers/hwmon/nct6683.c #define NCT6683_REG_FANIN_CFG(x) (0x1c0 + (x)) x 148 drivers/hwmon/nct6683.c #define NCT6683_REG_FANOUT_CFG(x) (0x1d0 + (x)) x 150 drivers/hwmon/nct6683.c #define NCT6683_REG_INTEL_TEMP_MAX(x) (0x901 + (x) * 16) x 151 drivers/hwmon/nct6683.c #define NCT6683_REG_INTEL_TEMP_CRIT(x) (0x90d + (x) * 16) x 153 drivers/hwmon/nct6683.c #define NCT6683_REG_TEMP_HYST(x) (0x330 + (x)) /* 8 bit */ x 154 drivers/hwmon/nct6683.c #define NCT6683_REG_TEMP_MAX(x) (0x350 + (x)) /* 8 bit */ x 155 drivers/hwmon/nct6683.c #define NCT6683_REG_MON_HIGH(x) (0x370 + (x) * 2) /* 8 bit */ x 156 drivers/hwmon/nct6683.c #define NCT6683_REG_MON_LOW(x) (0x371 + (x) * 2) /* 8 bit */ x 158 drivers/hwmon/nct6683.c #define NCT6683_REG_FAN_MIN(x) (0x3b8 + (x) * 2) /* 16 bit */ x 47 drivers/hwmon/nct7802.c #define REG_PWM(x) (0x60 + (x)) x 48 drivers/hwmon/nct7802.c #define REG_SMARTFAN_EN(x) (0x64 + (x) / 2) x 49 drivers/hwmon/nct7802.c #define SMARTFAN_EN_SHIFT(x) ((x) % 2 * 4) x 34 drivers/hwmon/occ/p8_i2c.c #define to_p8_i2c_occ(x) container_of((x), struct p8_i2c_occ, occ) x 17 drivers/hwmon/occ/p9_sbe.c #define to_p9_sbe_occ(x) container_of((x), struct p9_sbe_occ, occ) x 101 drivers/hwmon/pmbus/adm1275.c #define to_adm1275_data(x) container_of(x, struct adm1275_data, info) x 84 drivers/hwmon/pmbus/ibm-cffps.c #define to_psu(x, y) container_of((x), struct ibm_cffps, debugfs_entries[(y)]) x 212 drivers/hwmon/pmbus/lm25066.c #define to_lm25066_data(x) container_of(x, struct lm25066_data, info) x 108 drivers/hwmon/pmbus/ltc2978.c #define to_ltc2978_data(x) container_of(x, struct ltc2978_data, info) x 42 drivers/hwmon/pmbus/max34440.c #define to_max34440_data(x) container_of(x, struct max34440_data, info) x 1947 drivers/hwmon/pmbus/pmbus_core.c #define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr) x 40 drivers/hwmon/pmbus/ucd9000.c #define UCD9000_MON_TYPE(x) (((x) >> 5) & 0x07) x 41 drivers/hwmon/pmbus/ucd9000.c #define UCD9000_MON_PAGE(x) ((x) & 0x0f) x 30 drivers/hwmon/pmbus/zl6100.c #define to_zl6100_data(x) container_of(x, struct zl6100_data, info) x 21 drivers/hwmon/scmi-hwmon.c static inline u64 __pow10(u8 x) x 25 drivers/hwmon/scmi-hwmon.c while (x--) x 92 drivers/hwmon/ultra45_env.c #define FAN_PERIOD_TO_RPM(x) ((90000 * 60) / (x)) x 95 drivers/hwmon/ultra45_env.c #define FAN_DATA_VALID(x) ((x) && (x) != FAN_PERIOD_INVALID) x 75 drivers/hwmon/xgene-hwmon.c #define WATT_TO_mWATT(x) ((x) * 1000) x 76 drivers/hwmon/xgene-hwmon.c #define mWATT_TO_uWATT(x) ((x) * 1000) x 77 drivers/hwmon/xgene-hwmon.c #define CELSIUS_TO_mCELSIUS(x) ((x) * 1000) x 32 drivers/hwspinlock/sirf_hwspinlock.c #define HW_SPINLOCK_OFFSET(x) (HW_SPINLOCK_BASE + 0x4 * (x)) x 26 drivers/hwtracing/coresight/coresight-catu.c #define catu_dbg(x, ...) dev_dbg(x, __VA_ARGS__) x 28 drivers/hwtracing/coresight/coresight-catu.c #define catu_dbg(x, ...) do {} while (0) x 71 drivers/hwtracing/intel_th/gth.h #define CTS_ACTION_CONTROL_SET_STATE(x) \ x 72 drivers/hwtracing/intel_th/gth.h (((x) & 0x1f) << CTS_ACTION_CONTROL_STATE_OFF) x 31 drivers/hwtracing/intel_th/msu.c #define msc_dev(x) (&(x)->thdev->dev) x 25 drivers/i2c/algos/i2c-algo-pcf.c #define DEB2(x) if (i2c_debug >= 2) x x 26 drivers/i2c/algos/i2c-algo-pcf.c #define DEB3(x) if (i2c_debug >= 3) x /* print several statistical values */ x 27 drivers/i2c/algos/i2c-algo-pcf.c #define DEBPROTO(x) if (i2c_debug >= 9) x; x 53 drivers/i2c/busses/i2c-at91.h #define AT91_TWI_SMR_SADR(x) (((x) & AT91_TWI_SMR_SADR_MAX) << 16) x 59 drivers/i2c/busses/i2c-at91.h #define AT91_TWI_CWGR_HOLD(x) (((x) & AT91_TWI_CWGR_HOLD_MAX) << 24) x 74 drivers/i2c/busses/i2c-exynos5.c #define HSI2C_RXFIFO_TRIGGER_LEVEL(x) ((x) << 4) x 75 drivers/i2c/busses/i2c-exynos5.c #define HSI2C_TXFIFO_TRIGGER_LEVEL(x) ((x) << 16) x 109 drivers/i2c/busses/i2c-exynos5.c #define HSI2C_RX_FIFO_LVL(x) ((x >> 16) & 0x7f) x 112 drivers/i2c/busses/i2c-exynos5.c #define HSI2C_TX_FIFO_LVL(x) ((x >> 0) & 0x7f) x 162 drivers/i2c/busses/i2c-exynos5.c #define HSI2C_SLV_ADDR_SLV(x) ((x & 0x3ff) << 0) x 163 drivers/i2c/busses/i2c-exynos5.c #define HSI2C_SLV_ADDR_MAS(x) ((x & 0x3ff) << 10) x 164 drivers/i2c/busses/i2c-exynos5.c #define HSI2C_MASTER_ID(x) ((x & 0xff) << 24) x 165 drivers/i2c/busses/i2c-exynos5.c #define MASTER_ID(x) ((x & 0x7) + 0x08) x 70 drivers/i2c/busses/i2c-ibm_iic.c # define DBG(f,x...) printk(KERN_DEBUG "ibm-iic" f, ##x) x 72 drivers/i2c/busses/i2c-ibm_iic.c # define DBG(f,x...) ((void)0) x 75 drivers/i2c/busses/i2c-ibm_iic.c # define DBG2(f,x...) DBG(f, ##x) x 77 drivers/i2c/busses/i2c-ibm_iic.c # define DBG2(f,x...) ((void)0) x 229 drivers/i2c/busses/i2c-ibm_iic.c unsigned long x = jiffies + HZ / 28 + 2; x 231 drivers/i2c/busses/i2c-ibm_iic.c if (unlikely(time_after(jiffies, x))) x 378 drivers/i2c/busses/i2c-ibm_iic.c unsigned long x; x 388 drivers/i2c/busses/i2c-ibm_iic.c x = jiffies + 2; x 390 drivers/i2c/busses/i2c-ibm_iic.c if (time_after(jiffies, x)){ x 426 drivers/i2c/busses/i2c-ibm_iic.c unsigned long x = jiffies + dev->adap.timeout; x 429 drivers/i2c/busses/i2c-ibm_iic.c if (unlikely(time_after(jiffies, x))){ x 84 drivers/i2c/busses/i2c-mpc.c static inline void writeccr(struct mpc_i2c *i2c, u32 x) x 86 drivers/i2c/busses/i2c-mpc.c writeb(x, i2c->base + MPC_I2C_CR); x 47 drivers/i2c/busses/i2c-mt7621.c #define SM0CTL1_PGLEN(x) ((((x) - 1) << 8) & SM0CTL1_PGLEN_MASK) x 97 drivers/i2c/busses/i2c-octeon-core.h #define SW_TWSI(x) (x->roff.sw_twsi) x 98 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT(x) (x->roff.twsi_int) x 99 drivers/i2c/busses/i2c-octeon-core.h #define SW_TWSI_EXT(x) (x->roff.sw_twsi_ext) x 35 drivers/i2c/busses/i2c-owl.c #define OWL_I2C_CTL_GBCC(x) (((x) & 0x3) << 2) x 45 drivers/i2c/busses/i2c-owl.c #define OWL_I2C_DIV_FACTOR(x) ((x) & 0xff) x 70 drivers/i2c/busses/i2c-owl.c #define OWL_I2C_CMD_AS(x) (((x) & 0x7) << 1) x 71 drivers/i2c/busses/i2c-owl.c #define OWL_I2C_CMD_SAS(x) (((x) & 0x7) << 5) x 92 drivers/i2c/busses/i2c-qup.c #define QUP_OUTPUT_BLOCK_SIZE(x)(((x) >> 0) & 0x03) x 93 drivers/i2c/busses/i2c-qup.c #define QUP_OUTPUT_FIFO_SIZE(x) (((x) >> 2) & 0x07) x 94 drivers/i2c/busses/i2c-qup.c #define QUP_INPUT_BLOCK_SIZE(x) (((x) >> 5) & 0x03) x 95 drivers/i2c/busses/i2c-qup.c #define QUP_INPUT_FIFO_SIZE(x) (((x) >> 7) & 0x07) x 65 drivers/i2c/busses/i2c-rk3x.c #define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */ x 49 drivers/i2c/busses/i2c-s3c2410.c #define S3C2410_IICCON_SCALE(x) ((x) & 0xf) x 30 drivers/i2c/busses/i2c-sirf.c #define SIRFSOC_I2C_CMD(x) (SIRFSOC_I2C_CMD_BUF + (x)*0x04) x 31 drivers/i2c/busses/i2c-sirf.c #define SIRFSOC_I2C_DATA_MASK(x) (0xFF<<(((x)&3)*8)) x 32 drivers/i2c/busses/i2c-sirf.c #define SIRFSOC_I2C_DATA_SHIFT(x) (((x)&3)*8) x 58 drivers/i2c/busses/i2c-sirf.c #define SIRFSOC_I2C_CMD_RP(x) ((x)&0x7) x 46 drivers/i2c/busses/i2c-tegra.c #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5) x 47 drivers/i2c/busses/i2c-tegra.c #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2) x 111 drivers/i2c/busses/i2c-tegra.c #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4) x 112 drivers/i2c/busses/i2c-tegra.c #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16) x 69 drivers/i2c/busses/i2c-wmt.c #define SCL_TIMEOUT(x) (((x) & 0xFF) << 8) x 62 drivers/i2c/muxes/i2c-mux-pca9541.c #define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) x 63 drivers/i2c/muxes/i2c-mux-pca9541.c #define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) x 32 drivers/i3c/master/dw-i3c-master.c #define DEV_ADDR_DYNAMIC(x) (((x) << 16) & GENMASK(22, 16)) x 40 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_SPEED(x) (((x) << 21) & GENMASK(23, 21)) x 41 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_DEV_INDEX(x) (((x) << 16) & GENMASK(20, 16)) x 43 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_CMD(x) (((x) << 7) & GENMASK(14, 7)) x 44 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_TID(x) (((x) << 3) & GENMASK(6, 3)) x 46 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_ARG_DATA_LEN(x) (((x) << 16) & GENMASK(31, 16)) x 50 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_SDA_DATA_BYTE_3(x) (((x) << 24) & GENMASK(31, 24)) x 51 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_SDA_DATA_BYTE_2(x) (((x) << 16) & GENMASK(23, 16)) x 52 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_SDA_DATA_BYTE_1(x) (((x) << 8) & GENMASK(15, 8)) x 58 drivers/i3c/master/dw-i3c-master.c #define COMMAND_PORT_DEV_COUNT(x) (((x) << 21) & GENMASK(25, 21)) x 62 drivers/i3c/master/dw-i3c-master.c #define RESPONSE_PORT_ERR_STATUS(x) (((x) & GENMASK(31, 28)) >> 28) x 72 drivers/i3c/master/dw-i3c-master.c #define RESPONSE_PORT_TID(x) (((x) & GENMASK(27, 24)) >> 24) x 73 drivers/i3c/master/dw-i3c-master.c #define RESPONSE_PORT_DATA_LEN(x) ((x) & GENMASK(15, 0)) x 79 drivers/i3c/master/dw-i3c-master.c #define QUEUE_THLD_CTRL_RESP_BUF(x) (((x) - 1) << 8) x 133 drivers/i3c/master/dw-i3c-master.c #define QUEUE_STATUS_IBI_STATUS_CNT(x) (((x) & GENMASK(28, 24)) >> 24) x 134 drivers/i3c/master/dw-i3c-master.c #define QUEUE_STATUS_IBI_BUF_BLR(x) (((x) & GENMASK(23, 16)) >> 16) x 135 drivers/i3c/master/dw-i3c-master.c #define QUEUE_STATUS_LEVEL_RESP(x) (((x) & GENMASK(15, 8)) >> 8) x 136 drivers/i3c/master/dw-i3c-master.c #define QUEUE_STATUS_LEVEL_CMD(x) ((x) & GENMASK(7, 0)) x 139 drivers/i3c/master/dw-i3c-master.c #define DATA_BUFFER_STATUS_LEVEL_TX(x) ((x) & GENMASK(7, 0)) x 144 drivers/i3c/master/dw-i3c-master.c #define DEVICE_ADDR_TABLE_DEPTH(x) (((x) & GENMASK(31, 16)) >> 16) x 145 drivers/i3c/master/dw-i3c-master.c #define DEVICE_ADDR_TABLE_ADDR(x) ((x) & GENMASK(7, 0)) x 159 drivers/i3c/master/dw-i3c-master.c #define SCL_I3C_TIMING_HCNT(x) (((x) << 16) & GENMASK(23, 16)) x 160 drivers/i3c/master/dw-i3c-master.c #define SCL_I3C_TIMING_LCNT(x) ((x) & GENMASK(7, 0)) x 164 drivers/i3c/master/dw-i3c-master.c #define SCL_I2C_FM_TIMING_HCNT(x) (((x) << 16) & GENMASK(31, 16)) x 165 drivers/i3c/master/dw-i3c-master.c #define SCL_I2C_FM_TIMING_LCNT(x) ((x) & GENMASK(15, 0)) x 168 drivers/i3c/master/dw-i3c-master.c #define SCL_I2C_FMP_TIMING_HCNT(x) (((x) << 16) & GENMASK(23, 16)) x 169 drivers/i3c/master/dw-i3c-master.c #define SCL_I2C_FMP_TIMING_LCNT(x) ((x) & GENMASK(15, 0)) x 172 drivers/i3c/master/dw-i3c-master.c #define SCL_EXT_LCNT_4(x) (((x) << 24) & GENMASK(31, 24)) x 173 drivers/i3c/master/dw-i3c-master.c #define SCL_EXT_LCNT_3(x) (((x) << 16) & GENMASK(23, 16)) x 174 drivers/i3c/master/dw-i3c-master.c #define SCL_EXT_LCNT_2(x) (((x) << 8) & GENMASK(15, 8)) x 175 drivers/i3c/master/dw-i3c-master.c #define SCL_EXT_LCNT_1(x) ((x) & GENMASK(7, 0)) x 179 drivers/i3c/master/dw-i3c-master.c #define BUS_I3C_MST_FREE(x) ((x) & GENMASK(15, 0)) x 188 drivers/i3c/master/dw-i3c-master.c #define DEV_ADDR_TABLE_DYNAMIC_ADDR(x) (((x) << 16) & GENMASK(23, 16)) x 189 drivers/i3c/master/dw-i3c-master.c #define DEV_ADDR_TABLE_STATIC_ADDR(x) ((x) & GENMASK(6, 0)) x 30 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS0_CMDR_DEPTH(x) (4 << (((x) & GENMASK(31, 29)) >> 29)) x 36 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS0_GPO_NUM(x) (((x) & GENMASK(23, 16)) >> 16) x 37 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS0_GPI_NUM(x) (((x) & GENMASK(15, 8)) >> 8) x 38 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS0_IBIR_DEPTH(x) (4 << (((x) & GENMASK(7, 6)) >> 7)) x 41 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS0_DEVS_NUM(x) ((x) & GENMASK(3, 0)) x 44 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS1_IBI_HW_RES(x) ((((x) & GENMASK(31, 28)) >> 28) + 1) x 45 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS1_CMD_DEPTH(x) (4 << (((x) & GENMASK(27, 26)) >> 26)) x 46 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS1_SLVDDR_RX_DEPTH(x) (8 << (((x) & GENMASK(25, 21)) >> 21)) x 47 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS1_SLVDDR_TX_DEPTH(x) (8 << (((x) & GENMASK(20, 16)) >> 16)) x 48 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS1_IBI_DEPTH(x) (2 << (((x) & GENMASK(12, 10)) >> 10)) x 49 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS1_RX_DEPTH(x) (8 << (((x) & GENMASK(9, 5)) >> 5)) x 50 drivers/i3c/master/i3c-master-cdns.c #define CONF_STATUS1_TX_DEPTH(x) (8 << ((x) & GENMASK(4, 0))) x 75 drivers/i3c/master/i3c-master-cdns.c #define PRESCL_CTRL0_I2C(x) ((x) << 16) x 76 drivers/i3c/master/i3c-master-cdns.c #define PRESCL_CTRL0_I3C(x) (x) x 81 drivers/i3c/master/i3c-master-cdns.c #define PRESCL_CTRL1_PP_LOW(x) ((x) << 8) x 83 drivers/i3c/master/i3c-master-cdns.c #define PRESCL_CTRL1_OD_LOW(x) (x) x 139 drivers/i3c/master/i3c-master-cdns.c #define CMDR_ERROR(x) (((x) & GENMASK(27, 24)) >> 24) x 140 drivers/i3c/master/i3c-master-cdns.c #define CMDR_XFER_BYTES(x) (((x) & GENMASK(19, 8)) >> 8) x 143 drivers/i3c/master/i3c-master-cdns.c #define CMDR_CMDID(x) ((x) & GENMASK(7, 0)) x 147 drivers/i3c/master/i3c-master-cdns.c #define IBIR_SLVID(x) (((x) & GENMASK(11, 8)) >> 8) x 149 drivers/i3c/master/i3c-master-cdns.c #define IBIR_XFER_BYTES(x) (((x) & GENMASK(6, 2)) >> 2) x 153 drivers/i3c/master/i3c-master-cdns.c #define IBIR_TYPE(x) ((x) & GENMASK(1, 0)) x 192 drivers/i3c/master/i3c-master-cdns.c #define SLV_STATUS1_DA(x) (((s) & GENMASK(15, 9)) >> 9) x 267 drivers/i3c/master/i3c-master-cdns.c #define TTO_PRESCL_CTRL0_DIVB(x) ((x) << 16) x 268 drivers/i3c/master/i3c-master-cdns.c #define TTO_PRESCL_CTRL0_DIVA(x) (x) x 271 drivers/i3c/master/i3c-master-cdns.c #define TTO_PRESCL_CTRL1_DIVB(x) ((x) << 16) x 272 drivers/i3c/master/i3c-master-cdns.c #define TTO_PRESCL_CTRL1_DIVA(x) (x) x 289 drivers/i3c/master/i3c-master-cdns.c #define DEV_ID_RR0_GET_DEV_ADDR(x) ((((x) >> 1) & GENMASK(6, 0)) | \ x 290 drivers/i3c/master/i3c-master-cdns.c (((x) >> 6) & GENMASK(9, 7))) x 301 drivers/i3c/master/i3c-master-cdns.c #define SIR_MAP(x) (0x180 + ((x) * 4)) x 315 drivers/i3c/master/i3c-master-cdns.c #define GPIR_WORD(x) (0x200 + ((x) * 4)) x 319 drivers/i3c/master/i3c-master-cdns.c #define GPOR_WORD(x) (0x220 + ((x) * 4)) x 338 drivers/i3c/master/i3c-master-cdns.c #define ASF_SRAM_CORR_FAULT_INSTANCE(x) ((x) >> 24) x 339 drivers/i3c/master/i3c-master-cdns.c #define ASF_SRAM_CORR_FAULT_ADDR(x) ((x) & GENMASK(23, 0)) x 342 drivers/i3c/master/i3c-master-cdns.c #define ASF_SRAM_FAULT_UNCORR_STATS(x) ((x) >> 16) x 343 drivers/i3c/master/i3c-master-cdns.c #define ASF_SRAM_FAULT_CORR_STATS(x) ((x) & GENMASK(15, 0)) x 347 drivers/i3c/master/i3c-master-cdns.c #define ASF_TRANS_TOUT_VAL(x) (x) x 360 drivers/i3c/master/i3c-master-cdns.c #define ASF_PROTO_FAULT_S(x) BIT(16 + (x)) x 363 drivers/i3c/master/i3c-master-cdns.c #define ASF_PROTO_FAULT_M(x) BIT(x) x 315 drivers/ide/ide-dma.c int x, i; x 327 drivers/ide/ide-dma.c x = fls(mask) - 1; x 328 drivers/ide/ide-dma.c if (x >= 0) { x 329 drivers/ide/ide-dma.c mode = xfer_mode_bases[i] + x; x 402 drivers/ide/pmac.c #define PMAC_IDE_REG(x) \ x 403 drivers/ide/pmac.c ((void __iomem *)((drive)->hwif->io_ports.data_addr + (x))) x 87 drivers/iio/accel/adxl372.c #define ADXL372_POWER_CTL_MODE(x) (((x) & 0x3) << 0) x 91 drivers/iio/accel/adxl372.c #define ADXL372_MEASURE_LINKLOOP_MODE(x) (((x) & 0x3) << 4) x 93 drivers/iio/accel/adxl372.c #define ADXL372_MEASURE_BANDWIDTH_MODE(x) (((x) & 0x7) << 0) x 97 drivers/iio/accel/adxl372.c #define ADXL372_TIMING_ODR_MODE(x) (((x) & 0x7) << 5) x 101 drivers/iio/accel/adxl372.c #define ADXL372_FIFO_CTL_FORMAT_MODE(x) (((x) & 0x7) << 3) x 103 drivers/iio/accel/adxl372.c #define ADXL372_FIFO_CTL_MODE_MODE(x) (((x) & 0x3) << 1) x 105 drivers/iio/accel/adxl372.c #define ADXL372_FIFO_CTL_SAMPLES_MODE(x) (((x) > 0xFF) ? 1 : 0) x 108 drivers/iio/accel/adxl372.c #define ADXL372_STATUS_1_DATA_RDY(x) (((x) >> 0) & 0x1) x 109 drivers/iio/accel/adxl372.c #define ADXL372_STATUS_1_FIFO_RDY(x) (((x) >> 1) & 0x1) x 110 drivers/iio/accel/adxl372.c #define ADXL372_STATUS_1_FIFO_FULL(x) (((x) >> 2) & 0x1) x 111 drivers/iio/accel/adxl372.c #define ADXL372_STATUS_1_FIFO_OVR(x) (((x) >> 3) & 0x1) x 112 drivers/iio/accel/adxl372.c #define ADXL372_STATUS_1_USR_NVM_BUSY(x) (((x) >> 5) & 0x1) x 113 drivers/iio/accel/adxl372.c #define ADXL372_STATUS_1_AWAKE(x) (((x) >> 6) & 0x1) x 114 drivers/iio/accel/adxl372.c #define ADXL372_STATUS_1_ERR_USR_REGS(x) (((x) >> 7) & 0x1) x 118 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_DATA_RDY_MODE(x) (((x) & 0x1) << 0) x 120 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_FIFO_RDY_MODE(x) (((x) & 0x1) << 1) x 122 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_FIFO_FULL_MODE(x) (((x) & 0x1) << 2) x 124 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_FIFO_OVR_MODE(x) (((x) & 0x1) << 3) x 126 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_INACT_MODE(x) (((x) & 0x1) << 4) x 128 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_ACT_MODE(x) (((x) & 0x1) << 5) x 130 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_AWAKE_MODE(x) (((x) & 0x1) << 6) x 132 drivers/iio/accel/adxl372.c #define ADXL372_INT1_MAP_LOW_MODE(x) (((x) & 0x1) << 7) x 32 drivers/iio/adc/ad7124.c #define AD7124_CHANNEL(x) (0x09 + (x)) x 33 drivers/iio/adc/ad7124.c #define AD7124_CONFIG(x) (0x19 + (x)) x 34 drivers/iio/adc/ad7124.c #define AD7124_FILTER(x) (0x21 + (x)) x 35 drivers/iio/adc/ad7124.c #define AD7124_OFFSET(x) (0x29 + (x)) x 36 drivers/iio/adc/ad7124.c #define AD7124_GAIN(x) (0x31 + (x)) x 43 drivers/iio/adc/ad7124.c #define AD7124_ADC_CTRL_REF_EN(x) FIELD_PREP(AD7124_ADC_CTRL_REF_EN_MSK, x) x 45 drivers/iio/adc/ad7124.c #define AD7124_ADC_CTRL_PWR(x) FIELD_PREP(AD7124_ADC_CTRL_PWR_MSK, x) x 47 drivers/iio/adc/ad7124.c #define AD7124_ADC_CTRL_MODE(x) FIELD_PREP(AD7124_ADC_CTRL_MODE_MSK, x) x 51 drivers/iio/adc/ad7124.c #define AD7124_CHANNEL_EN(x) FIELD_PREP(AD7124_CHANNEL_EN_MSK, x) x 53 drivers/iio/adc/ad7124.c #define AD7124_CHANNEL_SETUP(x) FIELD_PREP(AD7124_CHANNEL_SETUP_MSK, x) x 55 drivers/iio/adc/ad7124.c #define AD7124_CHANNEL_AINP(x) FIELD_PREP(AD7124_CHANNEL_AINP_MSK, x) x 57 drivers/iio/adc/ad7124.c #define AD7124_CHANNEL_AINM(x) FIELD_PREP(AD7124_CHANNEL_AINM_MSK, x) x 61 drivers/iio/adc/ad7124.c #define AD7124_CONFIG_BIPOLAR(x) FIELD_PREP(AD7124_CONFIG_BIPOLAR_MSK, x) x 63 drivers/iio/adc/ad7124.c #define AD7124_CONFIG_REF_SEL(x) FIELD_PREP(AD7124_CONFIG_REF_SEL_MSK, x) x 65 drivers/iio/adc/ad7124.c #define AD7124_CONFIG_PGA(x) FIELD_PREP(AD7124_CONFIG_PGA_MSK, x) x 67 drivers/iio/adc/ad7124.c #define AD7124_CONFIG_IN_BUFF(x) FIELD_PREP(AD7124_CONFIG_IN_BUFF_MSK, x) x 71 drivers/iio/adc/ad7124.c #define AD7124_FILTER_FS(x) FIELD_PREP(AD7124_FILTER_FS_MSK, x) x 42 drivers/iio/adc/ad7291.c #define AD7291_DATA_HIGH(x) ((x) * 3 + 0x4) x 43 drivers/iio/adc/ad7291.c #define AD7291_DATA_LOW(x) ((x) * 3 + 0x5) x 44 drivers/iio/adc/ad7291.c #define AD7291_HYST(x) ((x) * 3 + 0x6) x 77 drivers/iio/adc/ad7291.c #define AD7291_V_LOW(x) BIT((x) * 2) x 78 drivers/iio/adc/ad7291.c #define AD7291_V_HIGH(x) BIT((x) * 2 + 1) x 30 drivers/iio/adc/ad7298.c #define AD7298_CH(x) BIT(13 - (x)) /* channel select */ x 65 drivers/iio/adc/ad7768-1.c #define AD7768_PWR_MCLK_DIV(x) FIELD_PREP(AD7768_PWR_MCLK_DIV_MSK, x) x 67 drivers/iio/adc/ad7768-1.c #define AD7768_PWR_PWRMODE(x) FIELD_PREP(AD7768_PWR_PWRMODE_MSK, x) x 71 drivers/iio/adc/ad7768-1.c #define AD7768_DIG_FIL_FIL(x) FIELD_PREP(AD7768_DIG_FIL_FIL_MSK, x) x 73 drivers/iio/adc/ad7768-1.c #define AD7768_DIG_FIL_DEC_RATE(x) FIELD_PREP(AD7768_DIG_FIL_DEC_MSK, x) x 77 drivers/iio/adc/ad7768-1.c #define AD7768_CONV_MODE(x) FIELD_PREP(AD7768_CONV_MODE_MSK, x) x 79 drivers/iio/adc/ad7768-1.c #define AD7768_RD_FLAG_MSK(x) (BIT(6) | ((x) & 0x3F)) x 80 drivers/iio/adc/ad7768-1.c #define AD7768_WR_FLAG_MSK(x) ((x) & 0x3F) x 65 drivers/iio/adc/ad7791.c #define AD7791_MODE_SEL(x) ((x) << 6) x 46 drivers/iio/adc/ad7793.c #define AD7793_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */ x 57 drivers/iio/adc/ad7793.c #define AD7793_MODE_SEL(x) (((x) & 0x7) << 13) /* Operation Mode Select */ x 59 drivers/iio/adc/ad7793.c #define AD7793_MODE_CLKSRC(x) (((x) & 0x3) << 6) /* ADC Clock Source Select */ x 60 drivers/iio/adc/ad7793.c #define AD7793_MODE_RATE(x) ((x) & 0xF) /* Filter Update Rate Select */ x 79 drivers/iio/adc/ad7793.c #define AD7793_CONF_VBIAS(x) (((x) & 0x3) << 14) /* Bias Voltage x 84 drivers/iio/adc/ad7793.c #define AD7793_CONF_GAIN(x) (((x) & 0x7) << 8) /* Gain Select */ x 85 drivers/iio/adc/ad7793.c #define AD7793_CONF_REFSEL(x) ((x) << 6) /* INT/EXT Reference Select */ x 87 drivers/iio/adc/ad7793.c #define AD7793_CONF_CHAN(x) ((x) & 0xf) /* Channel select */ x 65 drivers/iio/adc/ad799x.c #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4) x 66 drivers/iio/adc/ad799x.c #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5) x 67 drivers/iio/adc/ad799x.c #define AD7998_HYST_REG(x) ((x) * 3 + 0x6) x 163 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_TSMR_TSAV(x) ((x) << 4) x 167 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_TSMR_TSFREQ(x) ((x) << 8) x 171 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_TSMR_PENDBC(x) ((x) << 28) x 202 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_TRGR_TRGPER(x) ((x) << 16) x 54 drivers/iio/adc/at91_adc.c #define AT91_ADC_PRESCAL_(x) ((x) << 8) x 58 drivers/iio/adc/at91_adc.c #define AT91_ADC_STARTUP_(x) ((x) << 16) x 60 drivers/iio/adc/at91_adc.c #define AT91_ADC_SHTIM_(x) ((x) << 24) x 62 drivers/iio/adc/at91_adc.c #define AT91_ADC_PENDBC_(x) ((x) << 28) x 66 drivers/iio/adc/at91_adc.c #define AT91_ADC_TSR_SHTIM_(x) ((x) << 24) x 114 drivers/iio/adc/at91_adc.c #define AT91_ADC_TSMR_TSAV_(x) ((x) << 4) x 116 drivers/iio/adc/at91_adc.c #define AT91_ADC_TSMR_SCTIM_(x) ((x) << 16) x 118 drivers/iio/adc/at91_adc.c #define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28) x 133 drivers/iio/adc/at91_adc.c #define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16) x 293 drivers/iio/adc/at91_adc.c unsigned int x, y, pres, xpos, ypos; x 305 drivers/iio/adc/at91_adc.c x = (xpos << MAX_POS_BITS) - xpos; x 311 drivers/iio/adc/at91_adc.c x /= xscale; x 330 drivers/iio/adc/at91_adc.c pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor) x 340 drivers/iio/adc/at91_adc.c x, y, pres / factor); x 341 drivers/iio/adc/at91_adc.c input_report_abs(st->ts_input, ABS_X, x); x 31 drivers/iio/adc/axp20x_adc.c #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0)) x 32 drivers/iio/adc/axp20x_adc.c #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1) x 37 drivers/iio/adc/axp20x_adc.c #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK) x 38 drivers/iio/adc/axp20x_adc.c #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK) x 39 drivers/iio/adc/axp20x_adc.c #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x) x 40 drivers/iio/adc/axp20x_adc.c #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK) x 41 drivers/iio/adc/axp20x_adc.c #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x)) x 29 drivers/iio/adc/berlin2-adc.c #define BERLIN2_SM_CTRL_ADC_SEL(x) ((x) << 5) /* 0-15 */ x 55 drivers/iio/adc/berlin2-adc.c #define BERLIN2_SM_ADC_STATUS_DATA_RDY(x) BIT(x) /* 0-15 */ x 57 drivers/iio/adc/berlin2-adc.c #define BERLIN2_SM_ADC_STATUS_INT_EN(x) (BIT(x) << 16) /* 0-15 */ x 69 drivers/iio/adc/berlin2-adc.c #define BERLIN2_SM_TSEN_CTRL_TRIM(x) ((x) << 22) x 36 drivers/iio/adc/exynos_adc.c #define ADC_V1_CON(x) ((x) + 0x00) x 37 drivers/iio/adc/exynos_adc.c #define ADC_V1_TSC(x) ((x) + 0x04) x 38 drivers/iio/adc/exynos_adc.c #define ADC_V1_DLY(x) ((x) + 0x08) x 39 drivers/iio/adc/exynos_adc.c #define ADC_V1_DATX(x) ((x) + 0x0C) x 40 drivers/iio/adc/exynos_adc.c #define ADC_V1_DATY(x) ((x) + 0x10) x 41 drivers/iio/adc/exynos_adc.c #define ADC_V1_UPDN(x) ((x) + 0x14) x 42 drivers/iio/adc/exynos_adc.c #define ADC_V1_INTCLR(x) ((x) + 0x18) x 43 drivers/iio/adc/exynos_adc.c #define ADC_V1_MUX(x) ((x) + 0x1c) x 44 drivers/iio/adc/exynos_adc.c #define ADC_V1_CLRINTPNDNUP(x) ((x) + 0x20) x 47 drivers/iio/adc/exynos_adc.c #define ADC_S3C2410_MUX(x) ((x) + 0x18) x 50 drivers/iio/adc/exynos_adc.c #define ADC_V2_CON1(x) ((x) + 0x00) x 51 drivers/iio/adc/exynos_adc.c #define ADC_V2_CON2(x) ((x) + 0x04) x 52 drivers/iio/adc/exynos_adc.c #define ADC_V2_STAT(x) ((x) + 0x08) x 53 drivers/iio/adc/exynos_adc.c #define ADC_V2_INT_EN(x) ((x) + 0x10) x 54 drivers/iio/adc/exynos_adc.c #define ADC_V2_INT_ST(x) ((x) + 0x14) x 55 drivers/iio/adc/exynos_adc.c #define ADC_V2_VER(x) ((x) + 0x20) x 60 drivers/iio/adc/exynos_adc.c #define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6) x 64 drivers/iio/adc/exynos_adc.c #define ADC_S3C2410_CON_SELMUX(x) (((x) & 7) << 3) x 79 drivers/iio/adc/exynos_adc.c #define ADC_S3C2410_TSC_XY_PST(x) (((x) & 0x3) << 0) x 98 drivers/iio/adc/exynos_adc.c #define ADC_V2_CON2_C_TIME(x) (((x) & 7) << 4) x 99 drivers/iio/adc/exynos_adc.c #define ADC_V2_CON2_ACH_SEL(x) (((x) & 0xF) << 0) x 562 drivers/iio/adc/exynos_adc.c static int exynos_read_s3c64xx_ts(struct iio_dev *indio_dev, int *x, int *y) x 587 drivers/iio/adc/exynos_adc.c *x = info->ts_x; x 632 drivers/iio/adc/exynos_adc.c u32 x, y; x 637 drivers/iio/adc/exynos_adc.c ret = exynos_read_s3c64xx_ts(dev, &x, &y); x 641 drivers/iio/adc/exynos_adc.c pressed = x & y & ADC_DATX_PRESSED; x 648 drivers/iio/adc/exynos_adc.c input_report_abs(info->input, ABS_X, x & ADC_DATX_MASK); x 50 drivers/iio/adc/imx7d_adc.c #define IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(x) ((x) << 24) x 23 drivers/iio/adc/lpc32xx_adc.c #define LPC32XXAD_SELECT(x) ((x) + 0x04) x 24 drivers/iio/adc/lpc32xx_adc.c #define LPC32XXAD_CTRL(x) ((x) + 0x08) x 25 drivers/iio/adc/lpc32xx_adc.c #define LPC32XXAD_VALUE(x) ((x) + 0x48) x 38 drivers/iio/adc/mcp3911.c #define MCP3911_CHANNEL(x) (MCP3911_REG_CHANNEL0 + x * 3) x 39 drivers/iio/adc/mcp3911.c #define MCP3911_OFFCAL(x) (MCP3911_REG_OFFCAL_CH0 + x * 6) x 21 drivers/iio/adc/men_z188_adc.c #define ADC_DATA(x) (((x) >> 2) & 0x7ffffc) x 22 drivers/iio/adc/men_z188_adc.c #define ADC_OVR(x) ((x) & 0x1) x 20 drivers/iio/adc/nau7802.c #define NAU7802_PUCTRL_RR(x) (x << 0) x 22 drivers/iio/adc/nau7802.c #define NAU7802_PUCTRL_PUD(x) (x << 1) x 24 drivers/iio/adc/nau7802.c #define NAU7802_PUCTRL_PUA(x) (x << 2) x 26 drivers/iio/adc/nau7802.c #define NAU7802_PUCTRL_PUR(x) (x << 3) x 28 drivers/iio/adc/nau7802.c #define NAU7802_PUCTRL_CS(x) (x << 4) x 30 drivers/iio/adc/nau7802.c #define NAU7802_PUCTRL_CR(x) (x << 5) x 32 drivers/iio/adc/nau7802.c #define NAU7802_PUCTRL_AVDDS(x) (x << 7) x 35 drivers/iio/adc/nau7802.c #define NAU7802_CTRL1_VLDO(x) (x << 3) x 36 drivers/iio/adc/nau7802.c #define NAU7802_CTRL1_GAINS(x) (x) x 39 drivers/iio/adc/nau7802.c #define NAU7802_CTRL2_CHS(x) (x << 7) x 40 drivers/iio/adc/nau7802.c #define NAU7802_CTRL2_CRS(x) (x << 4) x 46 drivers/iio/adc/npcm_adc.c #define NPCM_ADCCON_CH(x) ((x) << 24) x 49 drivers/iio/adc/npcm_adc.c #define NPCM_ADC_DATA_MASK(x) ((x) & GENMASK(9, 0)) x 132 drivers/iio/adc/qcom-vadc-common.c if (pts[0].x < pts[1].x) x 137 drivers/iio/adc/qcom-vadc-common.c if ((descending) && (pts[i].x < input)) { x 142 drivers/iio/adc/qcom-vadc-common.c (pts[i].x > input)) { x 158 drivers/iio/adc/qcom-vadc-common.c (input - pts[i - 1].x)) / x 159 drivers/iio/adc/qcom-vadc-common.c (pts[i].x - pts[i - 1].x)) + x 60 drivers/iio/adc/qcom-vadc-common.h s32 x; x 25 drivers/iio/adc/spear_adc.c #define SPEAR600_ADC_SCAN_RATE_LO(x) ((x) & 0xFFFF) x 26 drivers/iio/adc/spear_adc.c #define SPEAR600_ADC_SCAN_RATE_HI(x) (((x) >> 0x10) & 0xFFFF) x 27 drivers/iio/adc/spear_adc.c #define SPEAR_ADC_CLK_LOW(x) (((x) & 0xf) << 0) x 28 drivers/iio/adc/spear_adc.c #define SPEAR_ADC_CLK_HIGH(x) (((x) & 0xf) << 4) x 32 drivers/iio/adc/spear_adc.c #define SPEAR_ADC_STATUS_CHANNEL_NUM(x) ((x) << 1) x 34 drivers/iio/adc/spear_adc.c #define SPEAR_ADC_STATUS_AVG_SAMPLE(x) ((x) << 5) x 91 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_FILTER_X_BASE_ADR(x) ((x) * 0x80 + DFSDM_FILTER_BASE_ADR) x 93 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x00) x 94 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x04) x 95 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x08) x 96 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ICR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x0C) x 97 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_JCHGR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x10) x 98 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_FCR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x14) x 99 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_JDATAR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x18) x 100 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_RDATAR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x1C) x 101 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWHTR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x20) x 102 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWLTR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x24) x 103 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWSR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x28) x 104 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWCFR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x2C) x 105 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_EXMAX(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x30) x 106 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_EXMIN(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x34) x 107 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CNVTIMR(x) (DFSDM_FILTER_X_BASE_ADR(x) + 0x38) x 22 drivers/iio/adc/ti-ads8688.c #define ADS8688_CMD_REG(x) (x << 8) x 28 drivers/iio/adc/ti-ads8688.c #define ADS8688_PROG_REG(x) (x << 9) x 87 drivers/iio/adc/vf610_adc.c #define VF610_ADC_ADCHC(x) ((x) & 0x1F) x 60 drivers/iio/adc/xilinx-xadc-core.c #define XADC_ZYNQ_CFG_IGAP(x) (x) x 76 drivers/iio/adc/xilinx-xadc-core.c #define XADC_ZYNQ_STATUS_ALM(x) BIT(x) x 133 drivers/iio/adc/xilinx-xadc.h #define XADC_REG_VAUX(x) (0x10 + (x)) x 153 drivers/iio/adc/xilinx-xadc.h #define XADC_REG_SEQ(x) (0x48 + (x)) x 154 drivers/iio/adc/xilinx-xadc.h #define XADC_REG_INPUT_MODE(x) (0x4c + (x)) x 155 drivers/iio/adc/xilinx-xadc.h #define XADC_REG_THRESHOLD(x) (0x50 + (x)) x 162 drivers/iio/adc/xilinx-xadc.h #define XADC_CONF0_CHAN(x) (x) x 311 drivers/iio/common/hid-sensors/hid-sensor-attributes.c int x; x 324 drivers/iio/common/hid-sensors/hid-sensor-attributes.c x = scale1 / divisor; x 325 drivers/iio/common/hid-sensors/hid-sensor-attributes.c res += int_pow(10, exp - 1 - i) * x; x 342 drivers/iio/common/hid-sensors/hid-sensor-attributes.c x = scale1 / divisor; x 343 drivers/iio/common/hid-sensors/hid-sensor-attributes.c res += int_pow(10, 8 - exp - i) * x; x 29 drivers/iio/dac/ad5064.c #define AD5064_ADDR(x) ((x) << 20) x 30 drivers/iio/dac/ad5064.c #define AD5064_CMD(x) ((x) << 24) x 21 drivers/iio/dac/ad5360.c #define AD5360_CMD(x) ((x) << 22) x 22 drivers/iio/dac/ad5360.c #define AD5360_ADDR(x) ((x) << 16) x 24 drivers/iio/dac/ad5360.c #define AD5360_READBACK_TYPE(x) ((x) << 13) x 25 drivers/iio/dac/ad5360.c #define AD5360_READBACK_ADDR(x) ((x) << 7) x 37 drivers/iio/dac/ad5360.c #define AD5360_REG_SF_OFS(x) (0x2 + (x)) x 23 drivers/iio/dac/ad5380.c #define AD5380_REG_DATA(x) (((x) << 2) | 3) x 24 drivers/iio/dac/ad5380.c #define AD5380_REG_OFFSET(x) (((x) << 2) | 2) x 25 drivers/iio/dac/ad5380.c #define AD5380_REG_GAIN(x) (((x) << 2) | 1) x 29 drivers/iio/dac/ad5449.c #define AD5449_CMD_LOAD_AND_UPDATE(x) (0x1 + (x) * 3) x 30 drivers/iio/dac/ad5449.c #define AD5449_CMD_READ(x) (0x2 + (x) * 3) x 31 drivers/iio/dac/ad5449.c #define AD5449_CMD_LOAD(x) (0x3 + (x) * 3) x 31 drivers/iio/dac/ad5504.c #define AD5504_ADDR_DAC(x) ((x) + 1) x 16 drivers/iio/dac/ad5686.h #define AD5310_CMD(x) ((x) << 12) x 18 drivers/iio/dac/ad5686.h #define AD5683_DATA(x) ((x) << 4) x 20 drivers/iio/dac/ad5686.h #define AD5686_ADDR(x) ((x) << 16) x 21 drivers/iio/dac/ad5686.h #define AD5686_CMD(x) ((x) << 20) x 23 drivers/iio/dac/ad5755.c #define AD5755_ADDR(x) ((x) << 16) x 53 drivers/iio/dac/ad5758.c #define AD5758_DAC_CONFIG_RANGE_MODE(x) (((x) & 0xF) << 0) x 55 drivers/iio/dac/ad5758.c #define AD5758_DAC_CONFIG_INT_EN_MODE(x) (((x) & 0x1) << 5) x 57 drivers/iio/dac/ad5758.c #define AD5758_DAC_CONFIG_OUT_EN_MODE(x) (((x) & 0x1) << 6) x 59 drivers/iio/dac/ad5758.c #define AD5758_DAC_CONFIG_SR_EN_MODE(x) (((x) & 0x1) << 8) x 61 drivers/iio/dac/ad5758.c #define AD5758_DAC_CONFIG_SR_CLOCK_MODE(x) (((x) & 0xF) << 9) x 63 drivers/iio/dac/ad5758.c #define AD5758_DAC_CONFIG_SR_STEP_MODE(x) (((x) & 0x7) << 13) x 74 drivers/iio/dac/ad5758.c #define AD5758_DCDC_CONFIG1_DCDC_VPROG_MODE(x) (((x) & 0x1F) << 0) x 76 drivers/iio/dac/ad5758.c #define AD5758_DCDC_CONFIG1_DCDC_MODE_MODE(x) (((x) & 0x3) << 5) x 80 drivers/iio/dac/ad5758.c #define AD5758_DCDC_CONFIG2_ILIMIT_MODE(x) (((x) & 0x7) << 1) x 88 drivers/iio/dac/ad5758.c #define AD5758_ADC_CONFIG_PPC_BUF_EN(x) (((x) & 0x1) << 11) x 91 drivers/iio/dac/ad5758.c #define AD5758_WR_FLAG_MSK(x) (0x80 | ((x) & 0x1F)) x 25 drivers/iio/dac/ad5764.c #define AD5764_REG_DATA(x) ((2 << 3) | (x)) x 26 drivers/iio/dac/ad5764.c #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x)) x 27 drivers/iio/dac/ad5764.c #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x)) x 28 drivers/iio/dac/ad5764.c #define AD5764_REG_OFFSET(x) ((5 << 3) | (x)) x 43 drivers/iio/dac/ad5791.c #define AD5761_CTRL_LINCOMP(x) ((x) << 6) x 27 drivers/iio/dac/vf610_dac.c #define VF610_DAC_DAT0(x) ((x) & 0xFFF) x 25 drivers/iio/frequency/ad9523.c #define AD9523_CNT(x) (((x) - 1) << 13) x 26 drivers/iio/frequency/ad9523.c #define AD9523_ADDR(x) ((x) & 0xFFF) x 31 drivers/iio/frequency/ad9523.c #define AD9523_TRANSF_LEN(x) ((x) >> 16) x 84 drivers/iio/frequency/ad9523.c #define AD9523_PLL1_CHARGE_PUMP_CURRENT_nA(x) (((x) / 500) & 0x7F) x 119 drivers/iio/frequency/ad9523.c #define AD9523_PLL1_REF_MODE(x) ((x) << 2) x 124 drivers/iio/frequency/ad9523.c #define AD9523_PLL1_LOOP_FILTER_RZERO(x) ((x) & 0xF) x 127 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_CHARGE_PUMP_CURRENT_nA(x) ((x) / 3500) x 130 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_FB_NDIV_A_CNT(x) (((x) & 0x3) << 6) x 131 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_FB_NDIV_B_CNT(x) (((x) & 0x3F) << 0) x 154 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_VCO_DIV_M1(x) ((((x) - 3) & 0x3) << 0) x 155 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_VCO_DIV_M2(x) ((((x) - 3) & 0x3) << 4) x 160 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_LOOP_FILTER_CPOLE1(x) (((x) & 0x7) << 0) x 161 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_LOOP_FILTER_RZERO(x) (((x) & 0x7) << 3) x 162 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_LOOP_FILTER_RPOLE2(x) (((x) & 0x7) << 6) x 166 drivers/iio/frequency/ad9523.c #define AD9523_PLL2_R2_DIVIDER_VAL(x) (((x) & 0x1F) << 0) x 169 drivers/iio/frequency/ad9523.c #define AD9523_CLK_DIST_DIV_PHASE(x) (((x) & 0x3F) << 18) x 170 drivers/iio/frequency/ad9523.c #define AD9523_CLK_DIST_DIV_PHASE_REV(x) ((ret >> 18) & 0x3F) x 171 drivers/iio/frequency/ad9523.c #define AD9523_CLK_DIST_DIV(x) ((((x) - 1) & 0x3FF) << 8) x 172 drivers/iio/frequency/ad9523.c #define AD9523_CLK_DIST_DIV_REV(x) (((ret >> 8) & 0x3FF) + 1) x 177 drivers/iio/frequency/ad9523.c #define AD9523_CLK_DIST_DRIVER_MODE(x) (((x) & 0xF) << 0) x 21 drivers/iio/frequency/adf4371.c #define ADF4371_REG(x) (x) x 25 drivers/iio/frequency/adf4371.c #define ADF4371_ADDR_ASC(x) FIELD_PREP(ADF4371_ADDR_ASC_MSK, x) x 27 drivers/iio/frequency/adf4371.c #define ADF4371_ADDR_ASC_R(x) FIELD_PREP(ADF4371_ADDR_ASC_R_MSK, x) x 32 drivers/iio/frequency/adf4371.c #define ADF4371_FRAC2WORD_L(x) FIELD_PREP(ADF4371_FRAC2WORD_L_MSK, x) x 34 drivers/iio/frequency/adf4371.c #define ADF4371_FRAC1WORD(x) FIELD_PREP(ADF4371_FRAC1WORD_MSK, x) x 38 drivers/iio/frequency/adf4371.c #define ADF4371_FRAC2WORD_H(x) FIELD_PREP(ADF4371_FRAC2WORD_H_MSK, x) x 42 drivers/iio/frequency/adf4371.c #define ADF4371_MOD2WORD(x) FIELD_PREP(ADF4371_MOD2WORD_MSK, x) x 46 drivers/iio/frequency/adf4371.c #define ADF4371_RF_DIV_SEL(x) FIELD_PREP(ADF4371_RF_DIV_SEL_MSK, x) x 50 drivers/iio/frequency/adf4371.c #define ADF4371_MUTE_LD(x) FIELD_PREP(ADF4371_MUTE_LD_MSK, x) x 54 drivers/iio/frequency/adf4371.c #define ADF4371_TIMEOUT(x) FIELD_PREP(ADF4371_TIMEOUT_MSK, x) x 58 drivers/iio/frequency/adf4371.c #define ADF4371_VCO_ALC_TOUT(x) FIELD_PREP(ADF4371_VCO_ALC_TOUT_MSK, x) x 108 drivers/iio/imu/adis16480.c #define ADIS16480_FIR_COEF(page) (x < 60 ? ADIS16480_REG(page, (x) + 8) : \ x 109 drivers/iio/imu/adis16480.c ADIS16480_REG((page) + 1, (x) - 60 + 8)) x 110 drivers/iio/imu/adis16480.c #define ADIS16480_FIR_COEF_A(x) ADIS16480_FIR_COEF(0x05, (x)) x 111 drivers/iio/imu/adis16480.c #define ADIS16480_FIR_COEF_B(x) ADIS16480_FIR_COEF(0x07, (x)) x 112 drivers/iio/imu/adis16480.c #define ADIS16480_FIR_COEF_C(x) ADIS16480_FIR_COEF(0x09, (x)) x 113 drivers/iio/imu/adis16480.c #define ADIS16480_FIR_COEF_D(x) ADIS16480_FIR_COEF(0x0B, (x)) x 117 drivers/iio/imu/adis16480.c #define ADIS16480_DRDY_SEL(x) FIELD_PREP(ADIS16480_DRDY_SEL_MSK, x) x 119 drivers/iio/imu/adis16480.c #define ADIS16480_DRDY_POL(x) FIELD_PREP(ADIS16480_DRDY_POL_MSK, x) x 121 drivers/iio/imu/adis16480.c #define ADIS16480_DRDY_EN(x) FIELD_PREP(ADIS16480_DRDY_EN_MSK, x) x 123 drivers/iio/imu/adis16480.c #define ADIS16480_SYNC_SEL(x) FIELD_PREP(ADIS16480_SYNC_SEL_MSK, x) x 125 drivers/iio/imu/adis16480.c #define ADIS16480_SYNC_EN(x) FIELD_PREP(ADIS16480_SYNC_EN_MSK, x) x 127 drivers/iio/imu/adis16480.c #define ADIS16480_SYNC_MODE(x) FIELD_PREP(ADIS16480_SYNC_MODE_MSK, x) x 51 drivers/iio/light/si1133.c #define SI1133_PARAM_REG_ADCCONFIG(x) ((x) * 4) + 2 x 52 drivers/iio/light/si1133.c #define SI1133_PARAM_REG_ADCSENS(x) ((x) * 4) + 3 x 53 drivers/iio/light/si1133.c #define SI1133_PARAM_REG_ADCPOST(x) ((x) * 4) + 4 x 57 drivers/iio/light/si1133.c #define SI1133_ADCCONFIG_DECIM_RATE(x) (x) << 5 x 64 drivers/iio/light/si1133.c #define SI1133_ADCSENS_NB_MEAS(x) fls(x) << SI1133_ADCSENS_SCALE_SHIFT x 67 drivers/iio/light/si1133.c #define SI1133_ADCPOST_POSTSHIFT_BITQTY(x) (x & GENMASK(2, 0)) << 3 x 90 drivers/iio/light/si1133.c #define SI1133_REG_HOSTOUT(x) (x) + 0x13 x 246 drivers/iio/light/si1133.c static int si1133_calculate_output(s32 x, s32 y, u8 x_order, u8 y_order, x 262 drivers/iio/light/si1133.c x1 = si1133_calculate_polynomial_inner(x, input_fraction, x 282 drivers/iio/light/si1133.c static int si1133_calc_polynomial(s32 x, s32 y, u8 input_fraction, u8 num_coeff, x 303 drivers/iio/light/si1133.c output += si1133_calculate_output(x, y, x_order, x 339 drivers/iio/light/si1145.c static u16 si1145_uncompress(u8 x) x 344 drivers/iio/light/si1145.c if (x < 8) x 347 drivers/iio/light/si1145.c exponent = (x & 0xf0) >> 4; x 348 drivers/iio/light/si1145.c result = 0x10 | (x & 0x0f); x 356 drivers/iio/light/si1145.c static u8 si1145_compress(u16 x) x 360 drivers/iio/light/si1145.c u32 tmp = x; x 362 drivers/iio/light/si1145.c if (x == 0x0000) x 364 drivers/iio/light/si1145.c if (x == 0x0001) x 375 drivers/iio/light/si1145.c significand = x << (4 - exponent); x 379 drivers/iio/light/si1145.c significand = x >> (exponent - 5); x 360 drivers/iio/magnetometer/bmc150_magn.c static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x, x 366 drivers/iio/magnetometer/bmc150_magn.c if (x == BMC150_MAGN_XY_OVERFLOW_VAL) x 373 drivers/iio/magnetometer/bmc150_magn.c val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) * x 77 drivers/iio/magnetometer/mmc35240.c #define MMC35240_X_COEFF(x) (x) x 99 drivers/iio/pressure/hp03.c int ab_val, d1_val, d2_val, diff_val, dut, off, sens, x; x 148 drivers/iio/pressure/hp03.c x = ((sens * (d1_val - 7168)) >> 14) - off; x 150 drivers/iio/pressure/hp03.c priv->pressure = ((x * 100) >> 5) + (cx_val[6] * 10); x 50 drivers/iio/proximity/as3935.c #define AS3935_ADDRESS(x) ((x) << 8) x 271 drivers/infiniband/core/device.c #define IB_MANDATORY_FUNC(x) { offsetof(struct ib_device_ops, x), #x } x 233 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define RQE_PG(x) (((x) & ~RQE_MAX_IDX_PER_PG) / RQE_CNT_PER_PG) x 234 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define RQE_IDX(x) ((x) & RQE_MAX_IDX_PER_PG) x 330 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define CQE_PG(x) (((x) & ~CQE_MAX_IDX_PER_PG) / CQE_CNT_PER_PG) x 331 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define CQE_IDX(x) ((x) & CQE_MAX_IDX_PER_PG) x 408 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define IRD_LIMIT_TO_IRRQ_SLOTS(x) (2 * (x) + 2) x 410 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define ORD_LIMIT_TO_ORRQ_SLOTS(x) ((x) + 1) x 417 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define NQE_PG(x) (((x) & ~NQE_MAX_IDX_PER_PG) / NQE_CNT_PER_PG) x 418 drivers/infiniband/hw/bnxt_re/qplib_fp.h #define NQE_IDX(x) ((x) & NQE_MAX_IDX_PER_PG) x 46 drivers/infiniband/hw/bnxt_re/qplib_res.h #define PTR_PG(x) (((x) & ~PTR_MAX_IDX_PER_PG) / PTR_CNT_PER_PG) x 47 drivers/infiniband/hw/bnxt_re/qplib_res.h #define PTR_IDX(x) ((x) & PTR_MAX_IDX_PER_PG) x 59 drivers/infiniband/hw/cxgb3/cxio_wr.h #define SEQ32_GE(x,y) (!( (((u32) (x)) - ((u32) (y))) & 0x80000000 )) x 139 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FW_RIWR_OP(x) ((x) << S_FW_RIWR_OP) x 140 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_FW_RIWR_OP(x) ((((x) >> S_FW_RIWR_OP)) & M_FW_RIWR_OP) x 144 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FW_RIWR_SOPEOP(x) ((x) << S_FW_RIWR_SOPEOP) x 148 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FW_RIWR_FLAGS(x) ((x) << S_FW_RIWR_FLAGS) x 149 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_FW_RIWR_FLAGS(x) ((((x) >> S_FW_RIWR_FLAGS)) & M_FW_RIWR_FLAGS) x 152 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FW_RIWR_TID(x) ((x) << S_FW_RIWR_TID) x 155 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FW_RIWR_LEN(x) ((x) << S_FW_RIWR_LEN) x 158 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FW_RIWR_GEN(x) ((x) << S_FW_RIWR_GEN) x 204 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FR_PAGE_COUNT(x) ((x) << S_FR_PAGE_COUNT) x 205 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_FR_PAGE_COUNT(x) ((((x) >> S_FR_PAGE_COUNT)) & M_FR_PAGE_COUNT) x 209 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FR_PAGE_SIZE(x) ((x) << S_FR_PAGE_SIZE) x 210 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_FR_PAGE_SIZE(x) ((((x) >> S_FR_PAGE_SIZE)) & M_FR_PAGE_SIZE) x 214 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FR_TYPE(x) ((x) << S_FR_TYPE) x 215 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_FR_TYPE(x) ((((x) >> S_FR_TYPE)) & M_FR_TYPE) x 219 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_FR_PERMS(x) ((x) << S_FR_PERMS) x 220 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_FR_PERMS(x) ((((x) >> S_FR_PERMS)) & M_FR_PERMS) x 327 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_RTR_TYPE(x) ((x) << S_RTR_TYPE) x 328 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_RTR_TYPE(x) ((((x) >> S_RTR_TYPE)) & M_RTR_TYPE) x 332 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CHAN(x) ((x) << S_CHAN) x 333 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CHAN(x) ((((x) >> S_CHAN)) & M_CHAN) x 486 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_VALID(x) ((x) << S_TPT_VALID) x 491 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_STAG_KEY(x) ((x) << S_TPT_STAG_KEY) x 492 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_STAG_KEY(x) (((x) >> S_TPT_STAG_KEY) & M_TPT_STAG_KEY) x 495 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_STAG_STATE(x) ((x) << S_TPT_STAG_STATE) x 500 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_STAG_TYPE(x) ((x) << S_TPT_STAG_TYPE) x 501 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_STAG_TYPE(x) (((x) >> S_TPT_STAG_TYPE) & M_TPT_STAG_TYPE) x 505 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_PDID(x) ((x) << S_TPT_PDID) x 506 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_PDID(x) (((x) >> S_TPT_PDID) & M_TPT_PDID) x 510 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_PERM(x) ((x) << S_TPT_PERM) x 511 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_PERM(x) (((x) >> S_TPT_PERM) & M_TPT_PERM) x 514 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_REM_INV_DIS(x) ((x) << S_TPT_REM_INV_DIS) x 518 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_ADDR_TYPE(x) ((x) << S_TPT_ADDR_TYPE) x 522 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_MW_BIND_ENABLE(x) ((x) << S_TPT_MW_BIND_ENABLE) x 527 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_PAGE_SIZE(x) ((x) << S_TPT_PAGE_SIZE) x 528 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_PAGE_SIZE(x) (((x) >> S_TPT_PAGE_SIZE) & M_TPT_PAGE_SIZE) x 532 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_PBL_ADDR(x) ((x) << S_TPT_PBL_ADDR) x 533 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_PBL_ADDR(x) (((x) >> S_TPT_PBL_ADDR) & M_TPT_PBL_ADDR) x 537 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_QPID(x) ((x) << S_TPT_QPID) x 538 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_QPID(x) (((x) >> S_TPT_QPID) & M_TPT_QPID) x 542 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_PSTAG(x) ((x) << S_TPT_PSTAG) x 543 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_PSTAG(x) (((x) >> S_TPT_PSTAG) & M_TPT_PSTAG) x 547 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_TPT_PBL_SIZE(x) ((x) << S_TPT_PBL_SIZE) x 548 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_TPT_PBL_SIZE(x) (((x) >> S_TPT_PBL_SIZE) & M_TPT_PBL_SIZE) x 570 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CQE_OOO(x) ((((x) >> S_CQE_OOO)) & M_CQE_OOO) x 571 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CEQ_OOO(x) ((x)<<S_CQE_OOO) x 575 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CQE_QPID(x) ((((x) >> S_CQE_QPID)) & M_CQE_QPID) x 576 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CQE_QPID(x) ((x)<<S_CQE_QPID) x 580 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CQE_SWCQE(x) ((((x) >> S_CQE_SWCQE)) & M_CQE_SWCQE) x 581 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CQE_SWCQE(x) ((x)<<S_CQE_SWCQE) x 585 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CQE_GENBIT(x) (((x) >> S_CQE_GENBIT) & M_CQE_GENBIT) x 586 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CQE_GENBIT(x) ((x)<<S_CQE_GENBIT) x 590 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CQE_STATUS(x) ((((x) >> S_CQE_STATUS)) & M_CQE_STATUS) x 591 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CQE_STATUS(x) ((x)<<S_CQE_STATUS) x 595 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CQE_TYPE(x) ((((x) >> S_CQE_TYPE)) & M_CQE_TYPE) x 596 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CQE_TYPE(x) ((x)<<S_CQE_TYPE) x 600 drivers/infiniband/hw/cxgb3/cxio_wr.h #define G_CQE_OPCODE(x) ((((x) >> S_CQE_OPCODE)) & M_CQE_OPCODE) x 601 drivers/infiniband/hw/cxgb3/cxio_wr.h #define V_CQE_OPCODE(x) ((x)<<S_CQE_OPCODE) x 603 drivers/infiniband/hw/cxgb3/cxio_wr.h #define SW_CQE(x) (G_CQE_SWCQE(be32_to_cpu((x).header))) x 604 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_OOO(x) (G_CQE_OOO(be32_to_cpu((x).header))) x 605 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_QPID(x) (G_CQE_QPID(be32_to_cpu((x).header))) x 606 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_GENBIT(x) (G_CQE_GENBIT(be32_to_cpu((x).header))) x 607 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_TYPE(x) (G_CQE_TYPE(be32_to_cpu((x).header))) x 608 drivers/infiniband/hw/cxgb3/cxio_wr.h #define SQ_TYPE(x) (CQE_TYPE((x))) x 609 drivers/infiniband/hw/cxgb3/cxio_wr.h #define RQ_TYPE(x) (!CQE_TYPE((x))) x 610 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_STATUS(x) (G_CQE_STATUS(be32_to_cpu((x).header))) x 611 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_OPCODE(x) (G_CQE_OPCODE(be32_to_cpu((x).header))) x 613 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_SEND_OPCODE(x)( \ x 614 drivers/infiniband/hw/cxgb3/cxio_wr.h (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND) || \ x 615 drivers/infiniband/hw/cxgb3/cxio_wr.h (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND_WITH_SE) || \ x 616 drivers/infiniband/hw/cxgb3/cxio_wr.h (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND_WITH_INV) || \ x 617 drivers/infiniband/hw/cxgb3/cxio_wr.h (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND_WITH_SE_INV)) x 619 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_LEN(x) (be32_to_cpu((x).len)) x 622 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_WRID_STAG(x) (be32_to_cpu((x).u.rcqe.stag)) x 623 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_WRID_MSN(x) (be32_to_cpu((x).u.rcqe.msn)) x 626 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_WRID_SQ_WPTR(x) ((x).u.scqe.wrid_hi) x 627 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_WRID_WPTR(x) ((x).u.scqe.wrid_low) x 630 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_WRID_HI(x) ((x).u.scqe.wrid_hi) x 631 drivers/infiniband/hw/cxgb3/cxio_wr.h #define CQE_WRID_LOW(x) ((x).u.scqe.wrid_low) x 38 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_STATE(x) ((x) << S_TCB_T_STATE) x 43 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TIMER(x) ((x) << S_TCB_TIMER) x 48 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_DACK_TIMER(x) ((x) << S_TCB_DACK_TIMER) x 53 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_DEL_FLAG(x) ((x) << S_TCB_DEL_FLAG) x 58 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX) x 63 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SMAC_SEL(x) ((x) << S_TCB_SMAC_SEL) x 68 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TOS(x) ((x) << S_TCB_TOS) x 73 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_MAX_RT(x) ((x) << S_TCB_MAX_RT) x 78 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_RXTSHIFT(x) ((x) << S_TCB_T_RXTSHIFT) x 83 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_DUPACKS(x) ((x) << S_TCB_T_DUPACKS) x 88 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_MAXSEG(x) ((x) << S_TCB_T_MAXSEG) x 93 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_FLAGS1(x) ((x) << S_TCB_T_FLAGS1) x 98 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_MIGRATION(x) ((x) << S_TCB_T_MIGRATION) x 103 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_FLAGS2(x) ((x) << S_TCB_T_FLAGS2) x 108 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SND_SCALE(x) ((x) << S_TCB_SND_SCALE) x 113 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RCV_SCALE(x) ((x) << S_TCB_RCV_SCALE) x 118 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SND_UNA_RAW(x) ((x) << S_TCB_SND_UNA_RAW) x 123 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SND_NXT_RAW(x) ((x) << S_TCB_SND_NXT_RAW) x 128 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RCV_NXT(x) ((x) << S_TCB_RCV_NXT) x 133 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RCV_ADV(x) ((x) << S_TCB_RCV_ADV) x 138 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SND_MAX_RAW(x) ((x) << S_TCB_SND_MAX_RAW) x 143 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SND_CWND(x) ((x) << S_TCB_SND_CWND) x 148 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SND_SSTHRESH(x) ((x) << S_TCB_SND_SSTHRESH) x 153 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_RTT_TS_RECENT_AGE(x) ((x) << S_TCB_T_RTT_TS_RECENT_AGE) x 158 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_RTSEQ_RECENT(x) ((x) << S_TCB_T_RTSEQ_RECENT) x 163 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_SRTT(x) ((x) << S_TCB_T_SRTT) x 168 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_T_RTTVAR(x) ((x) << S_TCB_T_RTTVAR) x 173 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TS_LAST_ACK_SENT_RAW(x) ((x) << S_TCB_TS_LAST_ACK_SENT_RAW) x 178 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_DIP(x) ((x) << S_TCB_DIP) x 183 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SIP(x) ((x) << S_TCB_SIP) x 188 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_DP(x) ((x) << S_TCB_DP) x 193 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SP(x) ((x) << S_TCB_SP) x 198 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TIMESTAMP(x) ((x) << S_TCB_TIMESTAMP) x 203 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TIMESTAMP_OFFSET(x) ((x) << S_TCB_TIMESTAMP_OFFSET) x 208 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_MAX(x) ((x) << S_TCB_TX_MAX) x 213 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_HDR_PTR_RAW(x) ((x) << S_TCB_TX_HDR_PTR_RAW) x 218 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_LAST_PTR_RAW(x) ((x) << S_TCB_TX_LAST_PTR_RAW) x 223 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_COMPACT(x) ((x) << S_TCB_TX_COMPACT) x 228 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_COMPACT(x) ((x) << S_TCB_RX_COMPACT) x 233 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RCV_WND(x) ((x) << S_TCB_RCV_WND) x 238 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_HDR_OFFSET(x) ((x) << S_TCB_RX_HDR_OFFSET) x 243 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG0_START_IDX_RAW(x) ((x) << S_TCB_RX_FRAG0_START_IDX_RAW) x 248 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG1_START_IDX_OFFSET(x) ((x) << S_TCB_RX_FRAG1_START_IDX_OFFSET) x 253 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG0_LEN(x) ((x) << S_TCB_RX_FRAG0_LEN) x 258 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG1_LEN(x) ((x) << S_TCB_RX_FRAG1_LEN) x 263 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_NEWRENO_RECOVER(x) ((x) << S_TCB_NEWRENO_RECOVER) x 268 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_PDU_HAVE_LEN(x) ((x) << S_TCB_PDU_HAVE_LEN) x 273 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_PDU_LEN(x) ((x) << S_TCB_PDU_LEN) x 278 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_QUIESCE(x) ((x) << S_TCB_RX_QUIESCE) x 283 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_PTR_RAW(x) ((x) << S_TCB_RX_PTR_RAW) x 288 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_CPU_NO(x) ((x) << S_TCB_CPU_NO) x 293 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_ULP_TYPE(x) ((x) << S_TCB_ULP_TYPE) x 298 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG1_PTR_RAW(x) ((x) << S_TCB_RX_FRAG1_PTR_RAW) x 303 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG2_START_IDX_OFFSET_RAW(x) ((x) << S_TCB_RX_FRAG2_START_IDX_OFFSET_RAW) x 308 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG2_PTR_RAW(x) ((x) << S_TCB_RX_FRAG2_PTR_RAW) x 313 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG2_LEN_RAW(x) ((x) << S_TCB_RX_FRAG2_LEN_RAW) x 318 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG3_PTR_RAW(x) ((x) << S_TCB_RX_FRAG3_PTR_RAW) x 323 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG3_LEN_RAW(x) ((x) << S_TCB_RX_FRAG3_LEN_RAW) x 328 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG3_START_IDX_OFFSET_RAW(x) ((x) << S_TCB_RX_FRAG3_START_IDX_OFFSET_RAW) x 333 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_PDU_HDR_LEN(x) ((x) << S_TCB_PDU_HDR_LEN) x 338 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SLUSH1(x) ((x) << S_TCB_SLUSH1) x 343 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_ULP_RAW(x) ((x) << S_TCB_ULP_RAW) x 348 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_DDP_RDMAP_VERSION(x) ((x) << S_TCB_DDP_RDMAP_VERSION) x 353 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_MARKER_ENABLE_RX(x) ((x) << S_TCB_MARKER_ENABLE_RX) x 358 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_MARKER_ENABLE_TX(x) ((x) << S_TCB_MARKER_ENABLE_TX) x 363 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_CRC_ENABLE(x) ((x) << S_TCB_CRC_ENABLE) x 368 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_IRS_ULP(x) ((x) << S_TCB_IRS_ULP) x 373 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_ISS_ULP(x) ((x) << S_TCB_ISS_ULP) x 378 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_PDU_LEN(x) ((x) << S_TCB_TX_PDU_LEN) x 383 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_PDU_OUT(x) ((x) << S_TCB_TX_PDU_OUT) x 388 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_CQ_IDX_SQ(x) ((x) << S_TCB_CQ_IDX_SQ) x 393 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_CQ_IDX_RQ(x) ((x) << S_TCB_CQ_IDX_RQ) x 398 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_QP_ID(x) ((x) << S_TCB_QP_ID) x 403 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_PD_ID(x) ((x) << S_TCB_PD_ID) x 408 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_STAG(x) ((x) << S_TCB_STAG) x 413 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RQ_START(x) ((x) << S_TCB_RQ_START) x 418 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RQ_MSN(x) ((x) << S_TCB_RQ_MSN) x 423 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RQ_MAX_OFFSET(x) ((x) << S_TCB_RQ_MAX_OFFSET) x 428 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RQ_WRITE_PTR(x) ((x) << S_TCB_RQ_WRITE_PTR) x 433 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_INB_WRITE_PERM(x) ((x) << S_TCB_INB_WRITE_PERM) x 438 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_INB_READ_PERM(x) ((x) << S_TCB_INB_READ_PERM) x 443 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_ORD_L_BIT_VLD(x) ((x) << S_TCB_ORD_L_BIT_VLD) x 448 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RDMAP_OPCODE(x) ((x) << S_TCB_RDMAP_OPCODE) x 453 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_FLUSH(x) ((x) << S_TCB_TX_FLUSH) x 458 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_OOS_RXMT(x) ((x) << S_TCB_TX_OOS_RXMT) x 463 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_TX_OOS_TXMT(x) ((x) << S_TCB_TX_OOS_TXMT) x 468 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SLUSH_AUX2(x) ((x) << S_TCB_SLUSH_AUX2) x 473 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_FRAG1_PTR_RAW2(x) ((x) << S_TCB_RX_FRAG1_PTR_RAW2) x 478 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_DDP_FLAGS(x) ((x) << S_TCB_RX_DDP_FLAGS) x 483 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_SLUSH_AUX3(x) ((x) << S_TCB_SLUSH_AUX3) x 488 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_DDP_BUF0_OFFSET(x) ((x) << S_TCB_RX_DDP_BUF0_OFFSET) x 493 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_DDP_BUF0_LEN(x) ((x) << S_TCB_RX_DDP_BUF0_LEN) x 498 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_DDP_BUF1_OFFSET(x) ((x) << S_TCB_RX_DDP_BUF1_OFFSET) x 503 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_DDP_BUF1_LEN(x) ((x) << S_TCB_RX_DDP_BUF1_LEN) x 508 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_DDP_BUF0_TAG(x) ((x) << S_TCB_RX_DDP_BUF0_TAG) x 513 drivers/infiniband/hw/cxgb3/tcb.h #define V_TCB_RX_DDP_BUF1_TAG(x) ((x) << S_TCB_RX_DDP_BUF1_TAG) x 516 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_DACK(x) ((x) << S_TF_DACK) x 519 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_NAGLE(x) ((x) << S_TF_NAGLE) x 522 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RECV_SCALE(x) ((x) << S_TF_RECV_SCALE) x 525 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RECV_TSTMP(x) ((x) << S_TF_RECV_TSTMP) x 528 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RECV_SACK(x) ((x) << S_TF_RECV_SACK) x 531 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_TURBO(x) ((x) << S_TF_TURBO) x 534 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_KEEPALIVE(x) ((x) << S_TF_KEEPALIVE) x 537 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_TCAM_BYPASS(x) ((x) << S_TF_TCAM_BYPASS) x 540 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_CORE_FIN(x) ((x) << S_TF_CORE_FIN) x 543 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_CORE_MORE(x) ((x) << S_TF_CORE_MORE) x 546 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_MIGRATING(x) ((x) << S_TF_MIGRATING) x 549 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_ACTIVE_OPEN(x) ((x) << S_TF_ACTIVE_OPEN) x 552 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_ASK_MODE(x) ((x) << S_TF_ASK_MODE) x 555 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_NON_OFFLOAD(x) ((x) << S_TF_NON_OFFLOAD) x 558 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_MOD_SCHD(x) ((x) << S_TF_MOD_SCHD) x 561 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_MOD_SCHD_REASON0(x) ((x) << S_TF_MOD_SCHD_REASON0) x 564 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_MOD_SCHD_REASON1(x) ((x) << S_TF_MOD_SCHD_REASON1) x 567 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_MOD_SCHD_RX(x) ((x) << S_TF_MOD_SCHD_RX) x 570 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_CORE_PUSH(x) ((x) << S_TF_CORE_PUSH) x 573 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RCV_COALESCE_ENABLE(x) ((x) << S_TF_RCV_COALESCE_ENABLE) x 576 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RCV_COALESCE_PUSH(x) ((x) << S_TF_RCV_COALESCE_PUSH) x 579 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RCV_COALESCE_LAST_PSH(x) ((x) << S_TF_RCV_COALESCE_LAST_PSH) x 582 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RCV_COALESCE_HEARTBEAT(x) ((x) << S_TF_RCV_COALESCE_HEARTBEAT) x 585 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_HALF_CLOSE(x) ((x) << S_TF_HALF_CLOSE) x 588 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_DACK_MSS(x) ((x) << S_TF_DACK_MSS) x 591 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_CCTRL_SEL0(x) ((x) << S_TF_CCTRL_SEL0) x 594 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_CCTRL_SEL1(x) ((x) << S_TF_CCTRL_SEL1) x 597 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_TCP_NEWRENO_FAST_RECOVERY(x) ((x) << S_TF_TCP_NEWRENO_FAST_RECOVERY) x 600 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_TX_PACE_AUTO(x) ((x) << S_TF_TX_PACE_AUTO) x 603 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_PEER_FIN_HELD(x) ((x) << S_TF_PEER_FIN_HELD) x 606 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_CORE_URG(x) ((x) << S_TF_CORE_URG) x 609 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RDMA_ERROR(x) ((x) << S_TF_RDMA_ERROR) x 612 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_SSWS_DISABLED(x) ((x) << S_TF_SSWS_DISABLED) x 615 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_DUPACK_COUNT_ODD(x) ((x) << S_TF_DUPACK_COUNT_ODD) x 618 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_TX_CHANNEL(x) ((x) << S_TF_TX_CHANNEL) x 621 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RX_CHANNEL(x) ((x) << S_TF_RX_CHANNEL) x 624 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_TX_PACE_FIXED(x) ((x) << S_TF_TX_PACE_FIXED) x 627 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RDMA_FLM_ERROR(x) ((x) << S_TF_RDMA_FLM_ERROR) x 630 drivers/infiniband/hw/cxgb3/tcb.h #define V_TF_RX_FLOW_CONTROL_DISABLE(x) ((x) << S_TF_RX_FLOW_CONTROL_DISABLE) x 224 drivers/infiniband/hw/cxgb4/t4.h #define CQE_QPID_G(x) ((((x) >> CQE_QPID_S)) & CQE_QPID_M) x 225 drivers/infiniband/hw/cxgb4/t4.h #define CQE_QPID_V(x) ((x)<<CQE_QPID_S) x 229 drivers/infiniband/hw/cxgb4/t4.h #define CQE_SWCQE_G(x) ((((x) >> CQE_SWCQE_S)) & CQE_SWCQE_M) x 230 drivers/infiniband/hw/cxgb4/t4.h #define CQE_SWCQE_V(x) ((x)<<CQE_SWCQE_S) x 234 drivers/infiniband/hw/cxgb4/t4.h #define CQE_DRAIN_G(x) ((((x) >> CQE_DRAIN_S)) & CQE_DRAIN_M) x 235 drivers/infiniband/hw/cxgb4/t4.h #define CQE_DRAIN_V(x) ((x)<<CQE_DRAIN_S) x 239 drivers/infiniband/hw/cxgb4/t4.h #define CQE_STATUS_G(x) ((((x) >> CQE_STATUS_S)) & CQE_STATUS_M) x 240 drivers/infiniband/hw/cxgb4/t4.h #define CQE_STATUS_V(x) ((x)<<CQE_STATUS_S) x 244 drivers/infiniband/hw/cxgb4/t4.h #define CQE_TYPE_G(x) ((((x) >> CQE_TYPE_S)) & CQE_TYPE_M) x 245 drivers/infiniband/hw/cxgb4/t4.h #define CQE_TYPE_V(x) ((x)<<CQE_TYPE_S) x 249 drivers/infiniband/hw/cxgb4/t4.h #define CQE_OPCODE_G(x) ((((x) >> CQE_OPCODE_S)) & CQE_OPCODE_M) x 250 drivers/infiniband/hw/cxgb4/t4.h #define CQE_OPCODE_V(x) ((x)<<CQE_OPCODE_S) x 252 drivers/infiniband/hw/cxgb4/t4.h #define SW_CQE(x) (CQE_SWCQE_G(be32_to_cpu((x)->header))) x 253 drivers/infiniband/hw/cxgb4/t4.h #define DRAIN_CQE(x) (CQE_DRAIN_G(be32_to_cpu((x)->header))) x 254 drivers/infiniband/hw/cxgb4/t4.h #define CQE_QPID(x) (CQE_QPID_G(be32_to_cpu((x)->header))) x 255 drivers/infiniband/hw/cxgb4/t4.h #define CQE_TYPE(x) (CQE_TYPE_G(be32_to_cpu((x)->header))) x 256 drivers/infiniband/hw/cxgb4/t4.h #define SQ_TYPE(x) (CQE_TYPE((x))) x 257 drivers/infiniband/hw/cxgb4/t4.h #define RQ_TYPE(x) (!CQE_TYPE((x))) x 258 drivers/infiniband/hw/cxgb4/t4.h #define CQE_STATUS(x) (CQE_STATUS_G(be32_to_cpu((x)->header))) x 259 drivers/infiniband/hw/cxgb4/t4.h #define CQE_OPCODE(x) (CQE_OPCODE_G(be32_to_cpu((x)->header))) x 261 drivers/infiniband/hw/cxgb4/t4.h #define CQE_SEND_OPCODE(x)( \ x 262 drivers/infiniband/hw/cxgb4/t4.h (CQE_OPCODE_G(be32_to_cpu((x)->header)) == FW_RI_SEND) || \ x 263 drivers/infiniband/hw/cxgb4/t4.h (CQE_OPCODE_G(be32_to_cpu((x)->header)) == FW_RI_SEND_WITH_SE) || \ x 264 drivers/infiniband/hw/cxgb4/t4.h (CQE_OPCODE_G(be32_to_cpu((x)->header)) == FW_RI_SEND_WITH_INV) || \ x 265 drivers/infiniband/hw/cxgb4/t4.h (CQE_OPCODE_G(be32_to_cpu((x)->header)) == FW_RI_SEND_WITH_SE_INV)) x 267 drivers/infiniband/hw/cxgb4/t4.h #define CQE_LEN(x) (be32_to_cpu((x)->len)) x 270 drivers/infiniband/hw/cxgb4/t4.h #define CQE_WRID_STAG(x) (be32_to_cpu((x)->u.rcqe.stag)) x 271 drivers/infiniband/hw/cxgb4/t4.h #define CQE_WRID_MSN(x) (be32_to_cpu((x)->u.rcqe.msn)) x 272 drivers/infiniband/hw/cxgb4/t4.h #define CQE_ABS_RQE_IDX(x) (be32_to_cpu((x)->u.srcqe.abs_rqe_idx)) x 273 drivers/infiniband/hw/cxgb4/t4.h #define CQE_IMM_DATA(x)( \ x 274 drivers/infiniband/hw/cxgb4/t4.h (x)->u.imm_data_rcqe.iw_imm_data.ib_imm_data.imm_data32) x 277 drivers/infiniband/hw/cxgb4/t4.h #define CQE_WRID_SQ_IDX(x) ((x)->u.scqe.cidx) x 278 drivers/infiniband/hw/cxgb4/t4.h #define CQE_WRID_FR_STAG(x) (be32_to_cpu((x)->u.scqe.stag)) x 281 drivers/infiniband/hw/cxgb4/t4.h #define CQE_WRID_HI(x) (be32_to_cpu((x)->u.gen.wrid_hi)) x 282 drivers/infiniband/hw/cxgb4/t4.h #define CQE_WRID_LOW(x) (be32_to_cpu((x)->u.gen.wrid_low)) x 283 drivers/infiniband/hw/cxgb4/t4.h #define CQE_DRAIN_COOKIE(x) ((x)->u.drain_cookie) x 288 drivers/infiniband/hw/cxgb4/t4.h #define CQE_GENBIT_G(x) (((x) >> CQE_GENBIT_S) & CQE_GENBIT_M) x 289 drivers/infiniband/hw/cxgb4/t4.h #define CQE_GENBIT_V(x) ((x)<<CQE_GENBIT_S) x 293 drivers/infiniband/hw/cxgb4/t4.h #define CQE_OVFBIT_G(x) ((((x) >> CQE_OVFBIT_S)) & CQE_OVFBIT_M) x 297 drivers/infiniband/hw/cxgb4/t4.h #define CQE_IQTYPE_G(x) ((((x) >> CQE_IQTYPE_S)) & CQE_IQTYPE_M) x 300 drivers/infiniband/hw/cxgb4/t4.h #define CQE_TS_G(x) ((x) & CQE_TS_M) x 302 drivers/infiniband/hw/cxgb4/t4.h #define CQE_OVFBIT(x) ((unsigned)CQE_OVFBIT_G(be64_to_cpu((x)->bits_type_ts))) x 303 drivers/infiniband/hw/cxgb4/t4.h #define CQE_GENBIT(x) ((unsigned)CQE_GENBIT_G(be64_to_cpu((x)->bits_type_ts))) x 304 drivers/infiniband/hw/cxgb4/t4.h #define CQE_TS(x) (CQE_TS_G(be64_to_cpu((x)->bits_type_ts))) x 169 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_VALID_V(x) ((x) << FW_RI_TPTE_VALID_S) x 170 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_VALID_G(x) \ x 171 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_VALID_S) & FW_RI_TPTE_VALID_M) x 176 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_STAGKEY_V(x) ((x) << FW_RI_TPTE_STAGKEY_S) x 177 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_STAGKEY_G(x) \ x 178 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_STAGKEY_S) & FW_RI_TPTE_STAGKEY_M) x 182 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_STAGSTATE_V(x) ((x) << FW_RI_TPTE_STAGSTATE_S) x 183 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_STAGSTATE_G(x) \ x 184 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_STAGSTATE_S) & FW_RI_TPTE_STAGSTATE_M) x 189 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_STAGTYPE_V(x) ((x) << FW_RI_TPTE_STAGTYPE_S) x 190 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_STAGTYPE_G(x) \ x 191 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_STAGTYPE_S) & FW_RI_TPTE_STAGTYPE_M) x 195 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PDID_V(x) ((x) << FW_RI_TPTE_PDID_S) x 196 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PDID_G(x) \ x 197 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_PDID_S) & FW_RI_TPTE_PDID_M) x 201 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PERM_V(x) ((x) << FW_RI_TPTE_PERM_S) x 202 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PERM_G(x) \ x 203 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_PERM_S) & FW_RI_TPTE_PERM_M) x 207 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_REMINVDIS_V(x) ((x) << FW_RI_TPTE_REMINVDIS_S) x 208 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_REMINVDIS_G(x) \ x 209 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_REMINVDIS_S) & FW_RI_TPTE_REMINVDIS_M) x 214 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_ADDRTYPE_V(x) ((x) << FW_RI_TPTE_ADDRTYPE_S) x 215 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_ADDRTYPE_G(x) \ x 216 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_ADDRTYPE_S) & FW_RI_TPTE_ADDRTYPE_M) x 221 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_MWBINDEN_V(x) ((x) << FW_RI_TPTE_MWBINDEN_S) x 222 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_MWBINDEN_G(x) \ x 223 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_MWBINDEN_S) & FW_RI_TPTE_MWBINDEN_M) x 228 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PS_V(x) ((x) << FW_RI_TPTE_PS_S) x 229 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PS_G(x) \ x 230 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_PS_S) & FW_RI_TPTE_PS_M) x 234 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_QPID_V(x) ((x) << FW_RI_TPTE_QPID_S) x 235 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_QPID_G(x) \ x 236 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_QPID_S) & FW_RI_TPTE_QPID_M) x 240 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_NOSNOOP_V(x) ((x) << FW_RI_TPTE_NOSNOOP_S) x 241 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_NOSNOOP_G(x) \ x 242 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_NOSNOOP_S) & FW_RI_TPTE_NOSNOOP_M) x 247 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PBLADDR_V(x) ((x) << FW_RI_TPTE_PBLADDR_S) x 248 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_PBLADDR_G(x) \ x 249 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_PBLADDR_S) & FW_RI_TPTE_PBLADDR_M) x 253 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_DCA_V(x) ((x) << FW_RI_TPTE_DCA_S) x 254 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_DCA_G(x) \ x 255 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_DCA_S) & FW_RI_TPTE_DCA_M) x 259 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_MWBCNT_PSTAT_V(x) \ x 260 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h ((x) << FW_RI_TPTE_MWBCNT_PSTAG_S) x 261 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_TPTE_MWBCNT_PSTAG_G(x) \ x 262 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_TPTE_MWBCNT_PSTAG_S) & FW_RI_TPTE_MWBCNT_PSTAG_M) x 330 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_NRES_V(x) ((x) << FW_RI_RES_WR_NRES_S) x 331 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_NRES_G(x) \ x 332 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_NRES_S) & FW_RI_RES_WR_NRES_M) x 336 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FETCHSZM_V(x) ((x) << FW_RI_RES_WR_FETCHSZM_S) x 337 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FETCHSZM_G(x) \ x 338 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_FETCHSZM_S) & FW_RI_RES_WR_FETCHSZM_M) x 343 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_STATUSPGNS_V(x) ((x) << FW_RI_RES_WR_STATUSPGNS_S) x 344 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_STATUSPGNS_G(x) \ x 345 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_STATUSPGNS_S) & FW_RI_RES_WR_STATUSPGNS_M) x 350 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_STATUSPGRO_V(x) ((x) << FW_RI_RES_WR_STATUSPGRO_S) x 351 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_STATUSPGRO_G(x) \ x 352 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_STATUSPGRO_S) & FW_RI_RES_WR_STATUSPGRO_M) x 357 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FETCHNS_V(x) ((x) << FW_RI_RES_WR_FETCHNS_S) x 358 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FETCHNS_G(x) \ x 359 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_FETCHNS_S) & FW_RI_RES_WR_FETCHNS_M) x 364 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FETCHRO_V(x) ((x) << FW_RI_RES_WR_FETCHRO_S) x 365 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FETCHRO_G(x) \ x 366 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_FETCHRO_S) & FW_RI_RES_WR_FETCHRO_M) x 371 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_HOSTFCMODE_V(x) ((x) << FW_RI_RES_WR_HOSTFCMODE_S) x 372 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_HOSTFCMODE_G(x) \ x 373 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_HOSTFCMODE_S) & FW_RI_RES_WR_HOSTFCMODE_M) x 377 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_CPRIO_V(x) ((x) << FW_RI_RES_WR_CPRIO_S) x 378 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_CPRIO_G(x) \ x 379 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_CPRIO_S) & FW_RI_RES_WR_CPRIO_M) x 384 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_ONCHIP_V(x) ((x) << FW_RI_RES_WR_ONCHIP_S) x 385 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_ONCHIP_G(x) \ x 386 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_ONCHIP_S) & FW_RI_RES_WR_ONCHIP_M) x 391 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_PCIECHN_V(x) ((x) << FW_RI_RES_WR_PCIECHN_S) x 392 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_PCIECHN_G(x) \ x 393 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_PCIECHN_S) & FW_RI_RES_WR_PCIECHN_M) x 397 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQID_V(x) ((x) << FW_RI_RES_WR_IQID_S) x 398 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQID_G(x) \ x 399 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQID_S) & FW_RI_RES_WR_IQID_M) x 403 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_DCAEN_V(x) ((x) << FW_RI_RES_WR_DCAEN_S) x 404 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_DCAEN_G(x) \ x 405 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_DCAEN_S) & FW_RI_RES_WR_DCAEN_M) x 410 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_DCACPU_V(x) ((x) << FW_RI_RES_WR_DCACPU_S) x 411 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_DCACPU_G(x) \ x 412 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_DCACPU_S) & FW_RI_RES_WR_DCACPU_M) x 416 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FBMIN_V(x) ((x) << FW_RI_RES_WR_FBMIN_S) x 417 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FBMIN_G(x) \ x 418 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_FBMIN_S) & FW_RI_RES_WR_FBMIN_M) x 422 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FBMAX_V(x) ((x) << FW_RI_RES_WR_FBMAX_S) x 423 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_FBMAX_G(x) \ x 424 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_FBMAX_S) & FW_RI_RES_WR_FBMAX_M) x 428 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_CIDXFTHRESHO_V(x) ((x) << FW_RI_RES_WR_CIDXFTHRESHO_S) x 429 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_CIDXFTHRESHO_G(x) \ x 430 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_CIDXFTHRESHO_S) & FW_RI_RES_WR_CIDXFTHRESHO_M) x 435 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_CIDXFTHRESH_V(x) ((x) << FW_RI_RES_WR_CIDXFTHRESH_S) x 436 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_CIDXFTHRESH_G(x) \ x 437 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_CIDXFTHRESH_S) & FW_RI_RES_WR_CIDXFTHRESH_M) x 441 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_EQSIZE_V(x) ((x) << FW_RI_RES_WR_EQSIZE_S) x 442 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_EQSIZE_G(x) \ x 443 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_EQSIZE_S) & FW_RI_RES_WR_EQSIZE_M) x 447 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANDST_V(x) ((x) << FW_RI_RES_WR_IQANDST_S) x 448 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANDST_G(x) \ x 449 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQANDST_S) & FW_RI_RES_WR_IQANDST_M) x 454 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANUS_V(x) ((x) << FW_RI_RES_WR_IQANUS_S) x 455 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANUS_G(x) \ x 456 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQANUS_S) & FW_RI_RES_WR_IQANUS_M) x 461 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANUD_V(x) ((x) << FW_RI_RES_WR_IQANUD_S) x 462 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANUD_G(x) \ x 463 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQANUD_S) & FW_RI_RES_WR_IQANUD_M) x 467 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANDSTINDEX_V(x) ((x) << FW_RI_RES_WR_IQANDSTINDEX_S) x 468 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQANDSTINDEX_G(x) \ x 469 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQANDSTINDEX_S) & FW_RI_RES_WR_IQANDSTINDEX_M) x 473 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQDROPRSS_V(x) ((x) << FW_RI_RES_WR_IQDROPRSS_S) x 474 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQDROPRSS_G(x) \ x 475 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQDROPRSS_S) & FW_RI_RES_WR_IQDROPRSS_M) x 480 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQGTSMODE_V(x) ((x) << FW_RI_RES_WR_IQGTSMODE_S) x 481 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQGTSMODE_G(x) \ x 482 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQGTSMODE_S) & FW_RI_RES_WR_IQGTSMODE_M) x 487 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQPCIECH_V(x) ((x) << FW_RI_RES_WR_IQPCIECH_S) x 488 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQPCIECH_G(x) \ x 489 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQPCIECH_S) & FW_RI_RES_WR_IQPCIECH_M) x 493 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQDCAEN_V(x) ((x) << FW_RI_RES_WR_IQDCAEN_S) x 494 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQDCAEN_G(x) \ x 495 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQDCAEN_S) & FW_RI_RES_WR_IQDCAEN_M) x 500 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQDCACPU_V(x) ((x) << FW_RI_RES_WR_IQDCACPU_S) x 501 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQDCACPU_G(x) \ x 502 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQDCACPU_S) & FW_RI_RES_WR_IQDCACPU_M) x 506 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQINTCNTTHRESH_V(x) \ x 507 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h ((x) << FW_RI_RES_WR_IQINTCNTTHRESH_S) x 508 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQINTCNTTHRESH_G(x) \ x 509 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQINTCNTTHRESH_S) & FW_RI_RES_WR_IQINTCNTTHRESH_M) x 513 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQO_V(x) ((x) << FW_RI_RES_WR_IQO_S) x 514 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQO_G(x) \ x 515 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQO_S) & FW_RI_RES_WR_IQO_M) x 520 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQCPRIO_V(x) ((x) << FW_RI_RES_WR_IQCPRIO_S) x 521 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQCPRIO_G(x) \ x 522 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQCPRIO_S) & FW_RI_RES_WR_IQCPRIO_M) x 527 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQESIZE_V(x) ((x) << FW_RI_RES_WR_IQESIZE_S) x 528 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQESIZE_G(x) \ x 529 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQESIZE_S) & FW_RI_RES_WR_IQESIZE_M) x 533 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQNS_V(x) ((x) << FW_RI_RES_WR_IQNS_S) x 534 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQNS_G(x) \ x 535 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQNS_S) & FW_RI_RES_WR_IQNS_M) x 540 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQRO_V(x) ((x) << FW_RI_RES_WR_IQRO_S) x 541 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_RES_WR_IQRO_G(x) \ x 542 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_RES_WR_IQRO_S) & FW_RI_RES_WR_IQRO_M) x 594 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_SEND_WR_SENDOP_V(x) ((x) << FW_RI_SEND_WR_SENDOP_S) x 595 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_SEND_WR_SENDOP_G(x) \ x 596 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_SEND_WR_SENDOP_S) & FW_RI_SEND_WR_SENDOP_M) x 675 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_BIND_MW_WR_QPBINDE_V(x) ((x) << FW_RI_BIND_MW_WR_QPBINDE_S) x 676 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_BIND_MW_WR_QPBINDE_G(x) \ x 677 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_BIND_MW_WR_QPBINDE_S) & FW_RI_BIND_MW_WR_QPBINDE_M) x 682 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_BIND_MW_WR_NS_V(x) ((x) << FW_RI_BIND_MW_WR_NS_S) x 683 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_BIND_MW_WR_NS_G(x) \ x 684 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_BIND_MW_WR_NS_S) & FW_RI_BIND_MW_WR_NS_M) x 689 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_BIND_MW_WR_DCACPU_V(x) ((x) << FW_RI_BIND_MW_WR_DCACPU_S) x 690 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_BIND_MW_WR_DCACPU_G(x) \ x 691 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_BIND_MW_WR_DCACPU_S) & FW_RI_BIND_MW_WR_DCACPU_M) x 712 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_FR_NSMR_WR_QPBINDE_V(x) ((x) << FW_RI_FR_NSMR_WR_QPBINDE_S) x 713 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_FR_NSMR_WR_QPBINDE_G(x) \ x 714 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_FR_NSMR_WR_QPBINDE_S) & FW_RI_FR_NSMR_WR_QPBINDE_M) x 719 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_FR_NSMR_WR_NS_V(x) ((x) << FW_RI_FR_NSMR_WR_NS_S) x 720 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_FR_NSMR_WR_NS_G(x) \ x 721 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_FR_NSMR_WR_NS_S) & FW_RI_FR_NSMR_WR_NS_M) x 726 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_FR_NSMR_WR_DCACPU_V(x) ((x) << FW_RI_FR_NSMR_WR_DCACPU_S) x 727 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_FR_NSMR_WR_DCACPU_G(x) \ x 728 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_FR_NSMR_WR_DCACPU_S) & FW_RI_FR_NSMR_WR_DCACPU_M) x 819 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_WR_MPAREQBIT_V(x) ((x) << FW_RI_WR_MPAREQBIT_S) x 820 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_WR_MPAREQBIT_G(x) \ x 821 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_WR_MPAREQBIT_S) & FW_RI_WR_MPAREQBIT_M) x 826 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_WR_P2PTYPE_V(x) ((x) << FW_RI_WR_P2PTYPE_S) x 827 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h #define FW_RI_WR_P2PTYPE_G(x) \ x 828 drivers/infiniband/hw/cxgb4/t4fw_ri_api.h (((x) >> FW_RI_WR_P2PTYPE_S) & FW_RI_WR_P2PTYPE_M) x 34 drivers/infiniband/hw/efa/efa_com.c #define EFA_DMA_ADDR_TO_UINT32_LOW(x) ((u32)((u64)(x))) x 35 drivers/infiniband/hw/efa/efa_com.c #define EFA_DMA_ADDR_TO_UINT32_HIGH(x) ((u32)(((u64)(x)) >> 32)) x 150 drivers/infiniband/hw/efa/efa_verbs.c #define field_avail(x, fld, sz) (offsetof(typeof(x), fld) + \ x 151 drivers/infiniband/hw/efa/efa_verbs.c FIELD_SIZEOF(typeof(x), fld) <= (sz)) x 1436 drivers/infiniband/hw/hfi1/pio.c #define dwords_to_blocks(x) DIV_ROUND_UP(x, BLOCK_DWORDS) x 178 drivers/infiniband/hw/hfi1/pio_copy.c #define zshift(x) (8 * (8 - (x))) x 184 drivers/infiniband/hw/hfi1/pio_copy.c #define mshift(x) (8 * (x)) x 11 drivers/infiniband/hw/hfi1/rc.h #define OP(x) IB_OPCODE_RC_##x x 53 drivers/infiniband/hw/hfi1/uc.c #define OP(x) UC_OP(x) x 64 drivers/infiniband/hw/hfi1/user_sdma.h #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT)) x 66 drivers/infiniband/hw/hfi1/user_sdma.h #define req_opcode(x) \ x 67 drivers/infiniband/hw/hfi1/user_sdma.h (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) x 68 drivers/infiniband/hw/hfi1/user_sdma.h #define req_version(x) \ x 69 drivers/infiniband/hw/hfi1/user_sdma.h (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) x 70 drivers/infiniband/hw/hfi1/user_sdma.h #define req_iovcnt(x) \ x 71 drivers/infiniband/hw/hfi1/user_sdma.h (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK) x 80 drivers/infiniband/hw/hfi1/user_sdma.h #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4) x 81 drivers/infiniband/hw/hfi1/user_sdma.h #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff) x 102 drivers/infiniband/hw/hfi1/verbs.h #define RC_OP(x) IB_OPCODE_RC_##x x 103 drivers/infiniband/hw/hfi1/verbs.h #define UC_OP(x) IB_OPCODE_UC_##x x 84 drivers/infiniband/hw/i40iw/i40iw_d.h #define I40E_HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF)) x 8342 drivers/infiniband/hw/qib/qib_iba7322.c #define BIT2BYTE(x) (((x) + BITS_PER_BYTE - 1) / BITS_PER_BYTE) x 39 drivers/infiniband/hw/qib/qib_rc.c #define OP(x) IB_OPCODE_RC_##x x 38 drivers/infiniband/hw/qib/qib_uc.c #define OP(x) IB_OPCODE_UC_##x x 75 drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h #define PVRDMA_PAGE_DIR_DIR(x) (((x) >> PVRDMA_PDIR_SHIFT) & 0x1) x 76 drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h #define PVRDMA_PAGE_DIR_TABLE(x) (((x) >> PVRDMA_PTABLE_SHIFT) & 0x1ff) x 77 drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h #define PVRDMA_PAGE_DIR_PAGE(x) ((x) & 0x1ff) x 105 drivers/infiniband/sw/rdmavt/rc.c u32 min, max, x; x 141 drivers/infiniband/sw/rdmavt/rc.c x = (min + max) / 2; x 142 drivers/infiniband/sw/rdmavt/rc.c if (credit_table[x] == credits) x 144 drivers/infiniband/sw/rdmavt/rc.c if (credit_table[x] > credits) { x 145 drivers/infiniband/sw/rdmavt/rc.c max = x; x 147 drivers/infiniband/sw/rdmavt/rc.c if (min == x) x 149 drivers/infiniband/sw/rdmavt/rc.c min = x; x 152 drivers/infiniband/sw/rdmavt/rc.c aeth |= x << IB_AETH_CREDIT_SHIFT; x 70 drivers/infiniband/ulp/opa_vnic/opa_vnic_vema.c #define GET_TRAP_SL_FROM_CLASS_PORT_INFO(x) (((x) >> 3) & 0x1f) x 631 drivers/input/evdev.c #define BITS_TO_LONGS_COMPAT(x) ((((x) - 1) / BITS_PER_LONG_COMPAT) + 1) x 249 drivers/input/ff-memless.c int x, y; x 258 drivers/input/ff-memless.c x = fixp_mult(fixp_sin16(i), level) * gain / 0xffff; x 266 drivers/input/ff-memless.c clamp_val(effect->u.ramp.start_level + x, -0x80, 0x7f); x 53 drivers/input/gameport/gameport.c #define DELTA(x,y) ((y)-(x)+((y)<(x)?1193182/HZ:0)) x 54 drivers/input/gameport/gameport.c #define GET_TIME(x) do { x = get_time_pit(); } while (0) x 241 drivers/input/input-mt.c int x = input_mt_get_value(oldest, ABS_MT_POSITION_X); x 244 drivers/input/input-mt.c input_event(dev, EV_ABS, ABS_X, x); x 367 drivers/input/input-mt.c int x, y; x 372 drivers/input/input-mt.c x = input_mt_get_value(s, ABS_MT_POSITION_X); x 375 drivers/input/input-mt.c int dx = x - p->x, dy = y - p->y; x 357 drivers/input/joydev.c data.x = (joydev->abs[0] / 256 + 128) >> joydev->glue.JS_CORR.x; x 84 drivers/input/joystick/adi.c int x; x 126 drivers/input/joystick/adi.c unsigned char u, v, w, x, z; x 143 drivers/input/joystick/adi.c w = u ^ (v = x = gameport_read(gameport)); x 144 drivers/input/joystick/adi.c for (i = 0; i < 2; i++, w >>= 2, x >>= 2) { x 151 drivers/input/joystick/adi.c } else if (!(x & 0x30)) s[i] = 1; x 227 drivers/input/joystick/adi.c input_report_abs(dev, *abs++, adi_hat_to_axis[t].x); x 430 drivers/input/joystick/adi.c int i, t, x; x 438 drivers/input/joystick/adi.c x = input_abs_get_val(adi->dev, t); x 441 drivers/input/joystick/adi.c x = i < adi->axes10 ? 512 : 128; x 444 drivers/input/joystick/adi.c input_set_abs_params(adi->dev, t, 64, x * 2 - 64, 2, 16); x 446 drivers/input/joystick/adi.c input_set_abs_params(adi->dev, t, 48, x * 2 - 48, 1, 16); x 130 drivers/input/joystick/analog.c #define GET_TIME(x) do { if (boot_cpu_has(X86_FEATURE_TSC)) x = (unsigned int)rdtsc(); else x = get_time_pit(); } while (0) x 131 drivers/input/joystick/analog.c #define DELTA(x,y) (boot_cpu_has(X86_FEATURE_TSC) ? ((y) - (x)) : ((x) - (y) + ((x) < (y) ? PIT_TICK_RATE / HZ : 0))) x 147 drivers/input/joystick/analog.c #define GET_TIME(x) do { x = (unsigned int)rdtsc(); } while (0) x 148 drivers/input/joystick/analog.c #define DELTA(x,y) ((y)-(x)) x 151 drivers/input/joystick/analog.c #define GET_TIME(x) do { x = get_cycles(); } while (0) x 152 drivers/input/joystick/analog.c #define DELTA(x,y) ((y)-(x)) x 157 drivers/input/joystick/analog.c #define GET_TIME(x) do { x = analog_faketime++; } while(0) x 158 drivers/input/joystick/analog.c #define DELTA(x,y) ((y)-(x)) x 168 drivers/input/joystick/analog.c unsigned int x; x 169 drivers/input/joystick/analog.c GET_TIME(x); x 170 drivers/input/joystick/analog.c return x; x 174 drivers/input/joystick/analog.c static inline unsigned int delta(u64 x, u64 y) x 177 drivers/input/joystick/analog.c return y - x; x 179 drivers/input/joystick/analog.c return DELTA((unsigned int)x, (unsigned int)y); x 448 drivers/input/joystick/analog.c int i, j, t, v, w, x, y, z; x 479 drivers/input/joystick/analog.c x = port->axes[i]; x 483 drivers/input/joystick/analog.c v = (x >> 3); x 484 drivers/input/joystick/analog.c w = (x >> 3); x 487 drivers/input/joystick/analog.c x = y; x 490 drivers/input/joystick/analog.c if (i == 2) x = port->axes[i]; x 491 drivers/input/joystick/analog.c v = x - (x >> 2); x 492 drivers/input/joystick/analog.c w = (x >> 4); x 495 drivers/input/joystick/analog.c input_set_abs_params(input_dev, t, v, (x << 1) - v, port->fuzz, w); x 501 drivers/input/joystick/analog.c for (x = 0; x < 2; x++) { x 129 drivers/input/joystick/as5011.c signed char x, y; x 131 drivers/input/joystick/as5011.c error = as5011_i2c_read(as5011->i2c_client, AS5011_X_RES_INT, &x); x 139 drivers/input/joystick/as5011.c input_report_abs(as5011->input_dev, ABS_X, x); x 210 drivers/input/joystick/gamecon.c signed char x, y; x 224 drivers/input/joystick/gamecon.c x = y = 0; x 228 drivers/input/joystick/gamecon.c x |= 1 << j; x 233 drivers/input/joystick/gamecon.c input_report_abs(dev, ABS_X, x); x 529 drivers/input/joystick/gamecon.c #define GC_PSX_ID(x) ((x) >> 4) /* High nibble is device type */ x 530 drivers/input/joystick/gamecon.c #define GC_PSX_LEN(x) (((x) & 0xf) << 1) /* Low nibble is length in bytes/2 */ x 121 drivers/input/joystick/grip_mp.c int x = pkt ^ (pkt >> 16); x 122 drivers/input/joystick/grip_mp.c x ^= x >> 8; x 123 drivers/input/joystick/grip_mp.c x ^= x >> 4; x 124 drivers/input/joystick/grip_mp.c x ^= x >> 2; x 125 drivers/input/joystick/grip_mp.c x ^= x >> 1; x 126 drivers/input/joystick/grip_mp.c return x & 1; x 38 drivers/input/joystick/guillemot.c int x; x 123 drivers/input/joystick/guillemot.c input_report_abs(dev, ABS_HAT0X, guillemot_hat_to_axis[data[4] >> 4].x); x 13 drivers/input/joystick/iforce/iforce-packets.c __s32 x; x 124 drivers/input/joystick/iforce/iforce-packets.c input_report_abs(dev, ABS_HAT0X, iforce_hat_to_axis[data[6] >> 4].x); x 32 drivers/input/joystick/psxpad-spi.c #define REVERSE_BIT(x) ((((x) & 0x80) >> 7) | (((x) & 0x40) >> 5) | \ x 33 drivers/input/joystick/psxpad-spi.c (((x) & 0x20) >> 3) | (((x) & 0x10) >> 1) | (((x) & 0x08) << 1) | \ x 34 drivers/input/joystick/psxpad-spi.c (((x) & 0x04) << 3) | (((x) & 0x02) << 5) | (((x) & 0x01) << 7)) x 94 drivers/input/joystick/sidewinder.c int x; x 251 drivers/input/joystick/sidewinder.c int x = t ^ (t >> 32); x 253 drivers/input/joystick/sidewinder.c x ^= x >> 16; x 254 drivers/input/joystick/sidewinder.c x ^= x >> 8; x 255 drivers/input/joystick/sidewinder.c x ^= x >> 4; x 256 drivers/input/joystick/sidewinder.c x ^= x >> 2; x 257 drivers/input/joystick/sidewinder.c x ^= x >> 1; x 258 drivers/input/joystick/sidewinder.c return x & 1; x 304 drivers/input/joystick/sidewinder.c input_report_abs(dev, ABS_HAT0X, sw_hat_to_axis[hat].x); x 347 drivers/input/joystick/sidewinder.c input_report_abs(dev, ABS_HAT0X, sw_hat_to_axis[hat].x); x 367 drivers/input/joystick/sidewinder.c input_report_abs(dev, ABS_HAT0X, sw_hat_to_axis[hat].x); x 72 drivers/input/joystick/tmdc.c int x; x 132 drivers/input/joystick/tmdc.c unsigned char u, v, w, x; x 149 drivers/input/joystick/tmdc.c x = w; x 152 drivers/input/joystick/tmdc.c for (k = 0, v = w, u = x; k < 2; k++, v >>= 2, u >>= 2) { x 201 drivers/input/joystick/tmdc.c input_report_abs(port->dev, ABS_HAT0X, tmdc_hat_to_axis[(data[i] - 141) / 25].x); x 29 drivers/input/keyboard/adp5588-keys.c #define KP_SEL(x) (0xFFFF >> (16 - x)) /* 2^x-1 */ x 157 drivers/input/keyboard/adp5589-keys.c #define CORE_CLK(x) (((x) & 0x3) << 5) x 939 drivers/input/keyboard/applespi.c static inline int le16_to_int(__le16 x) x 941 drivers/input/keyboard/applespi.c return (signed short)le16_to_cpu(x); x 1006 drivers/input/keyboard/applespi.c input_report_abs(input, ABS_MT_POSITION_X, pos->x); x 1029 drivers/input/keyboard/applespi.c applespi->pos[n].x = le16_to_int(f->abs_x); x 1221 drivers/input/keyboard/applespi.c int x, y, w, h; x 1223 drivers/input/keyboard/applespi.c sts = sscanf(touchpad_dimensions, "%dx%d+%u+%u", &x, &y, &w, &h); x 1227 drivers/input/keyboard/applespi.c applespi->tp_info.x_min = x; x 1229 drivers/input/keyboard/applespi.c applespi->tp_info.x_max = x + w; x 70 drivers/input/keyboard/hilkbd.c #define hil_command(x) do { hil_writeb((x), HILBASE + HIL_CMD); } while (0) x 72 drivers/input/keyboard/hilkbd.c #define hil_write_data(x) do { hil_writeb((x), HILBASE + HIL_DATA); } while (0) x 19 drivers/input/keyboard/hpps2atkbd.h # define CONFLICT(x,y) x x 21 drivers/input/keyboard/hpps2atkbd.h # define CONFLICT(x,y) y x 95 drivers/input/keyboard/lkkbd.c #define DBG(x...) printk(x) x 97 drivers/input/keyboard/lkkbd.c #define DBG(x...) do {} while (0) x 287 drivers/input/keyboard/lkkbd.c #define RESPONSE(x) { .value = (x), .name = #x, } x 32 drivers/input/keyboard/lpc32xx-keys.c #define LPC32XX_KS_DEB(x) ((x) + 0x00) x 33 drivers/input/keyboard/lpc32xx-keys.c #define LPC32XX_KS_STATE_COND(x) ((x) + 0x04) x 34 drivers/input/keyboard/lpc32xx-keys.c #define LPC32XX_KS_IRQ(x) ((x) + 0x08) x 35 drivers/input/keyboard/lpc32xx-keys.c #define LPC32XX_KS_SCAN_CTL(x) ((x) + 0x0C) x 36 drivers/input/keyboard/lpc32xx-keys.c #define LPC32XX_KS_FAST_TST(x) ((x) + 0x10) x 37 drivers/input/keyboard/lpc32xx-keys.c #define LPC32XX_KS_MATRIX_DIM(x) ((x) + 0x14) /* 1..8 */ x 38 drivers/input/keyboard/lpc32xx-keys.c #define LPC32XX_KS_DATA(x, y) ((x) + 0x40 + ((y) << 2)) x 35 drivers/input/keyboard/sun4i-lradc-keys.c #define FIRST_CONVERT_DLY(x) ((x) << 24) /* 8 bits */ x 36 drivers/input/keyboard/sun4i-lradc-keys.c #define CHAN_SELECT(x) ((x) << 22) /* 2 bits */ x 37 drivers/input/keyboard/sun4i-lradc-keys.c #define CONTINUE_TIME_SEL(x) ((x) << 16) /* 4 bits */ x 38 drivers/input/keyboard/sun4i-lradc-keys.c #define KEY_MODE_SEL(x) ((x) << 12) /* 2 bits */ x 39 drivers/input/keyboard/sun4i-lradc-keys.c #define LEVELA_B_CNT(x) ((x) << 8) /* 4 bits */ x 40 drivers/input/keyboard/sun4i-lradc-keys.c #define HOLD_KEY_EN(x) ((x) << 7) x 41 drivers/input/keyboard/sun4i-lradc-keys.c #define HOLD_EN(x) ((x) << 6) x 42 drivers/input/keyboard/sun4i-lradc-keys.c #define LEVELB_VOL(x) ((x) << 4) /* 2 bits */ x 43 drivers/input/keyboard/sun4i-lradc-keys.c #define SAMPLE_RATE(x) ((x) << 2) /* 2 bits */ x 44 drivers/input/keyboard/sun4i-lradc-keys.c #define ENABLE(x) ((x) << 0) x 100 drivers/input/misc/adxl34x.c #define RATE(x) ((x) & 0xF) x 107 drivers/input/misc/adxl34x.c #define PCTL_WAKEUP(x) ((x) & 0x3) x 115 drivers/input/misc/adxl34x.c #define RANGE(x) ((x) & 0x3) x 134 drivers/input/misc/adxl34x.c #define FIFO_MODE(x) (((x) & 0x3) << 6) x 140 drivers/input/misc/adxl34x.c #define SAMPLES(x) ((x) & 0x1F) x 144 drivers/input/misc/adxl34x.c #define ENTRIES(x) ((x) & 0x3F) x 155 drivers/input/misc/adxl34x.c #define ORIENT_DEADZONE(x) (((x) & 0x7) << 4) x 156 drivers/input/misc/adxl34x.c #define ORIENT_DIVISOR(x) ((x) & 0x7) x 160 drivers/input/misc/adxl34x.c #define ADXL346_2D_ORIENT(x) (((x) & 0x30) >> 4) x 162 drivers/input/misc/adxl34x.c #define ADXL346_3D_ORIENT(x) ((x) & 0x7) x 185 drivers/input/misc/adxl34x.c int x; x 245 drivers/input/misc/adxl34x.c ac->saved.x = (s16) le16_to_cpu(buf[0]); x 246 drivers/input/misc/adxl34x.c axis->x = ac->saved.x; x 264 drivers/input/misc/adxl34x.c axis.x - ac->swcal.x); x 490 drivers/input/misc/adxl34x.c ac->hwcal.x * 4 + ac->swcal.x, x 510 drivers/input/misc/adxl34x.c ac->hwcal.x -= (ac->saved.x / 4); x 511 drivers/input/misc/adxl34x.c ac->swcal.x = ac->saved.x % 4; x 519 drivers/input/misc/adxl34x.c AC_WRITE(ac, OFSX, (s8) ac->hwcal.x); x 611 drivers/input/misc/adxl34x.c ac->saved.x, ac->saved.y, ac->saved.z); x 830 drivers/input/misc/adxl34x.c ac->hwcal.x = pdata->x_axis_offset; x 310 drivers/input/misc/bma150.c s16 x, y, z; x 318 drivers/input/misc/bma150.c x = ((0xc0 & data[0]) >> 6) | (data[1] << 2); x 322 drivers/input/misc/bma150.c x = sign_extend32(x, 9); x 326 drivers/input/misc/bma150.c input_report_abs(bma150->input, ABS_X, x); x 266 drivers/input/misc/ims-pcu.c int x, y; x 268 drivers/input/misc/ims-pcu.c x = !!(data & (1 << 14)) - !!(data & (1 << 13)); x 271 drivers/input/misc/ims-pcu.c input_report_abs(input, ABS_X, x); x 107 drivers/input/misc/kxtj9.c s16 x, y, z; x 114 drivers/input/misc/kxtj9.c x = le16_to_cpu(acc_data[tj9->pdata.axis_map_x]); x 118 drivers/input/misc/kxtj9.c x >>= tj9->shift; x 122 drivers/input/misc/kxtj9.c input_report_abs(tj9->input_dev, ABS_X, tj9->pdata.negate_x ? -x : x); x 98 drivers/input/misc/mma8450.c int x, y, z; x 113 drivers/input/misc/mma8450.c x = ((int)(s8)buf[1] << 4) | (buf[0] & 0xf); x 117 drivers/input/misc/mma8450.c input_report_abs(dev->input, ABS_X, x); x 48 drivers/input/misc/pcf8574_keypad.c unsigned char x, y, a, b; x 51 drivers/input/misc/pcf8574_keypad.c x = 0xF & (~(i2c_smbus_read_byte(lp->client) >> 4)); x 56 drivers/input/misc/pcf8574_keypad.c for (a = 0; x > 0; a++) x 57 drivers/input/misc/pcf8574_keypad.c x = x >> 1; x 29 drivers/input/misc/pwm-beeper.c #define HZ_TO_NANOSECONDS(x) (1000000000UL/(x)) x 254 drivers/input/mouse/alps.c int x, y, z, ges, fin, left, right, middle; x 261 drivers/input/mouse/alps.c x = packet[1] | ((packet[0] & 0x07) << 7); x 268 drivers/input/mouse/alps.c x = packet[1] | ((packet[2] & 0x78) << (7 - 3)); x 289 drivers/input/mouse/alps.c input_report_rel(dev2, REL_X, (x > 383 ? (x - 768) : x)); x 317 drivers/input/mouse/alps.c input_report_abs(dev, ABS_X, x); x 331 drivers/input/mouse/alps.c input_report_abs(dev, ABS_X, x); x 430 drivers/input/mouse/alps.c corner[0].x = x 438 drivers/input/mouse/alps.c corner[1].x = x 446 drivers/input/mouse/alps.c corner[2].x = x 454 drivers/input/mouse/alps.c corner[3].x = x 464 drivers/input/mouse/alps.c corner[i].x = priv->x_max - corner[i].x; x 483 drivers/input/mouse/alps.c int dx = fields->st.x - corner[i].x; x 502 drivers/input/mouse/alps.c static void alps_set_slot(struct input_dev *dev, int slot, int x, int y) x 506 drivers/input/mouse/alps.c input_report_abs(dev, ABS_MT_POSITION_X, x); x 519 drivers/input/mouse/alps.c alps_set_slot(dev, slot[i], f->mt[i].x, f->mt[i].y); x 532 drivers/input/mouse/alps.c f->mt[0].x = f->st.x; x 539 drivers/input/mouse/alps.c alps_set_slot(dev, 0, f->mt[0].x, f->mt[0].y); x 541 drivers/input/mouse/alps.c alps_set_slot(dev, 1, f->mt[1].x, f->mt[1].y); x 560 drivers/input/mouse/alps.c int x, y, z, left, right, middle; x 582 drivers/input/mouse/alps.c x = (s8)(((packet[0] & 0x20) << 2) | (packet[1] & 0x7f)); x 591 drivers/input/mouse/alps.c x /= 8; x 594 drivers/input/mouse/alps.c input_report_rel(dev, REL_X, x); x 649 drivers/input/mouse/alps.c f->st.x = ((p[1] & 0x7f) << 4) | ((p[4] & 0x30) >> 2) | x 677 drivers/input/mouse/alps.c f->st.x = ((p[1] & 0x7f) << 4) | ((p[4] & 0x30) >> 2) | x 698 drivers/input/mouse/alps.c f->st.x = ((p[1] & 0x7f) | ((p[4] & 0x0f) << 7)); x 789 drivers/input/mouse/alps.c if (f->st.x && f->st.y && !f->pressure) x 829 drivers/input/mouse/alps.c int x, y, z; x 846 drivers/input/mouse/alps.c x = packet[1] | ((packet[3] & 0x20) << 2); x 851 drivers/input/mouse/alps.c if (x == 0x7F && y == 0x7F && z == 0x7F) x 852 drivers/input/mouse/alps.c x = y = z = 0; x 855 drivers/input/mouse/alps.c input_report_rel(dev2, REL_X, (char)x / 4); x 865 drivers/input/mouse/alps.c x = packet[1] | ((packet[3] & 0x78) << 4); x 875 drivers/input/mouse/alps.c input_report_abs(dev, ABS_X, x); x 916 drivers/input/mouse/alps.c f->st.x = ((packet[1] & 0x7f) << 4) | ((packet[3] & 0x30) >> 2) | x 973 drivers/input/mouse/alps.c mt[0].x = ((pkt[2] & 0x80) << 4); x 974 drivers/input/mouse/alps.c mt[0].x |= ((pkt[2] & 0x3F) << 5); x 975 drivers/input/mouse/alps.c mt[0].x |= ((pkt[3] & 0x30) >> 1); x 976 drivers/input/mouse/alps.c mt[0].x |= (pkt[3] & 0x07); x 979 drivers/input/mouse/alps.c mt[1].x = ((pkt[3] & 0x80) << 4); x 980 drivers/input/mouse/alps.c mt[1].x |= ((pkt[4] & 0x80) << 3); x 981 drivers/input/mouse/alps.c mt[1].x |= ((pkt[4] & 0x3F) << 4); x 987 drivers/input/mouse/alps.c mt[1].x &= ~0x000F; x 990 drivers/input/mouse/alps.c if (mt[1].y == 0x7ff && mt[1].x == 0xff0) { x 991 drivers/input/mouse/alps.c mt[1].x = 0; x 997 drivers/input/mouse/alps.c mt[1].x &= ~0x003F; x 1004 drivers/input/mouse/alps.c mt[1].x &= ~0x003F; x 1005 drivers/input/mouse/alps.c mt[1].x |= (pkt[0] & 0x20); x 1019 drivers/input/mouse/alps.c if (mt[i].x != 0 || mt[i].y != 0) x 1078 drivers/input/mouse/alps.c if (f->fingers == 1 && f->mt[0].x == 0 && f->mt[0].y == 0) { x 1079 drivers/input/mouse/alps.c f->mt[0].x = f->mt[1].x; x 1081 drivers/input/mouse/alps.c f->mt[1].x = 0; x 1093 drivers/input/mouse/alps.c int x, y, z; x 1102 drivers/input/mouse/alps.c x = ((packet[2] & 0xbf)) | ((packet[3] & 0x10) << 2); x 1107 drivers/input/mouse/alps.c input_report_rel(dev2, REL_X, (char)x); x 1189 drivers/input/mouse/alps.c f->mt[0].x = SS4_1F_X_V2(p); x 1206 drivers/input/mouse/alps.c f->mt[0].x = SS4_PLUS_BTL_MF_X_V2(p, 0); x 1207 drivers/input/mouse/alps.c f->mt[1].x = SS4_PLUS_BTL_MF_X_V2(p, 1); x 1209 drivers/input/mouse/alps.c f->mt[0].x = SS4_BTL_MF_X_V2(p, 0); x 1210 drivers/input/mouse/alps.c f->mt[1].x = SS4_BTL_MF_X_V2(p, 1); x 1216 drivers/input/mouse/alps.c f->mt[0].x = SS4_PLUS_STD_MF_X_V2(p, 0); x 1217 drivers/input/mouse/alps.c f->mt[1].x = SS4_PLUS_STD_MF_X_V2(p, 1); x 1219 drivers/input/mouse/alps.c f->mt[0].x = SS4_STD_MF_X_V2(p, 0); x 1220 drivers/input/mouse/alps.c f->mt[1].x = SS4_STD_MF_X_V2(p, 1); x 1240 drivers/input/mouse/alps.c f->mt[2].x = SS4_PLUS_BTL_MF_X_V2(p, 0); x 1241 drivers/input/mouse/alps.c f->mt[3].x = SS4_PLUS_BTL_MF_X_V2(p, 1); x 1244 drivers/input/mouse/alps.c f->mt[2].x = SS4_BTL_MF_X_V2(p, 0); x 1245 drivers/input/mouse/alps.c f->mt[3].x = SS4_BTL_MF_X_V2(p, 1); x 1254 drivers/input/mouse/alps.c f->mt[2].x = SS4_PLUS_STD_MF_X_V2(p, 0); x 1255 drivers/input/mouse/alps.c f->mt[3].x = SS4_PLUS_STD_MF_X_V2(p, 1); x 1258 drivers/input/mouse/alps.c f->mt[2].x = SS4_STD_MF_X_V2(p, 0); x 1259 drivers/input/mouse/alps.c f->mt[3].x = SS4_STD_MF_X_V2(p, 1); x 1273 drivers/input/mouse/alps.c } else if (f->mt[3].x == no_data_x && x 1275 drivers/input/mouse/alps.c f->mt[3].x = 0; x 517 drivers/input/mouse/appletouch.c int x, y, x_z, y_z, x_f, y_f; x 596 drivers/input/mouse/appletouch.c x = atp_calculate_abs(dev, 0, ATP_XSENSORS, x 604 drivers/input/mouse/appletouch.c if (x && y && fingers == dev->fingers_old) { x 606 drivers/input/mouse/appletouch.c x = (dev->x_old * 7 + x) >> 3; x 608 drivers/input/mouse/appletouch.c dev->x_old = x; x 614 drivers/input/mouse/appletouch.c x, y, x_z, y_z); x 617 drivers/input/mouse/appletouch.c input_report_abs(dev->input, ABS_X, x); x 623 drivers/input/mouse/appletouch.c dev->x_old = x; x 626 drivers/input/mouse/appletouch.c } else if (!x && !y) { x 657 drivers/input/mouse/appletouch.c int x, y, x_z, y_z, x_f, y_f; x 715 drivers/input/mouse/appletouch.c x = atp_calculate_abs(dev, 0, ATP_XSENSORS, x 724 drivers/input/mouse/appletouch.c if (x && y && fingers == dev->fingers_old) { x 726 drivers/input/mouse/appletouch.c x = (dev->x_old * 7 + x) >> 3; x 728 drivers/input/mouse/appletouch.c dev->x_old = x; x 734 drivers/input/mouse/appletouch.c x, y, x_z, y_z); x 737 drivers/input/mouse/appletouch.c input_report_abs(dev->input, ABS_X, x); x 743 drivers/input/mouse/appletouch.c dev->x_old = x; x 746 drivers/input/mouse/appletouch.c } else if (!x && !y) { x 776 drivers/input/mouse/appletouch.c if (!x && !y && !key) { x 268 drivers/input/mouse/bcm5974.c struct bcm5974_param x; /* horizontal limits */ x 503 drivers/input/mouse/bcm5974.c static inline int raw2int(__le16 x) x 505 drivers/input/mouse/bcm5974.c return (signed short)le16_to_cpu(x); x 534 drivers/input/mouse/bcm5974.c set_abs(input_dev, ABS_MT_POSITION_X, &cfg->x); x 581 drivers/input/mouse/bcm5974.c input_report_abs(input, ABS_MT_POSITION_X, pos->x); x 621 drivers/input/mouse/bcm5974.c dev->pos[n].x = raw2int(f->abs_x); x 28 drivers/input/mouse/cyapa_gen3.c #define GEN3_FINGER_NUM(x) (((x) >> 4) & 0x07) x 2714 drivers/input/mouse/cyapa_gen5.c int x, y; x 2721 drivers/input/mouse/cyapa_gen5.c x = (touch->x_hi << 8) | touch->x_lo; x 2723 drivers/input/mouse/cyapa_gen5.c x = cyapa->max_abs_x - x; x 2727 drivers/input/mouse/cyapa_gen5.c input_report_abs(input, ABS_MT_POSITION_X, x); x 455 drivers/input/mouse/cypress_ps2.c report_data->contacts[0].x = x 463 drivers/input/mouse/cypress_ps2.c report_data->contacts[0].x = x 470 drivers/input/mouse/cypress_ps2.c report_data->contacts[1].x = x 501 drivers/input/mouse/cypress_ps2.c report_data->contacts[i].x, x 532 drivers/input/mouse/cypress_ps2.c pos[i].x = contact->x; x 542 drivers/input/mouse/cypress_ps2.c input_report_abs(input, ABS_MT_POSITION_X, contact->x); x 8 drivers/input/mouse/cypress_ps2.h #define COMPOSIT(x, s) (((x) & CMD_BITS_MASK) << (s)) x 32 drivers/input/mouse/cypress_ps2.h #define DECODE_CMD_AA(x) (((x) >> 6) & CMD_BITS_MASK) x 33 drivers/input/mouse/cypress_ps2.h #define DECODE_CMD_BB(x) (((x) >> 4) & CMD_BITS_MASK) x 34 drivers/input/mouse/cypress_ps2.h #define DECODE_CMD_CC(x) (((x) >> 2) & CMD_BITS_MASK) x 35 drivers/input/mouse/cypress_ps2.h #define DECODE_CMD_DD(x) ((x) & CMD_BITS_MASK) x 137 drivers/input/mouse/cypress_ps2.h int x; x 975 drivers/input/mouse/elan_i2c_core.c int x, y; x 988 drivers/input/mouse/elan_i2c_core.c x = packet[4] - (int)((packet[1] ^ 0x80) << 1); x 991 drivers/input/mouse/elan_i2c_core.c input_report_rel(input, REL_X, x); x 343 drivers/input/mouse/elantech.c unsigned int x, unsigned int y) x 348 drivers/input/mouse/elantech.c input_report_abs(dev, ABS_MT_POSITION_X, x); x 469 drivers/input/mouse/elantech.c int x, y; x 479 drivers/input/mouse/elantech.c x = packet[4] - (int)((packet[1]^0x80) << 1); x 484 drivers/input/mouse/elantech.c input_report_rel(tp_dev, REL_X, x); x 537 drivers/input/mouse/elantech.c etd->mt[0].x = ((packet[1] & 0x0f) << 8) | packet[2]; x 551 drivers/input/mouse/elantech.c x1 = etd->mt[0].x; x 629 drivers/input/mouse/elantech.c etd->mt[id].x = ((packet[1] & 0x0f) << 8) | packet[2]; x 637 drivers/input/mouse/elantech.c input_report_abs(dev, ABS_MT_POSITION_X, etd->mt[id].x); x 671 drivers/input/mouse/elantech.c etd->mt[id].x += delta_x1 * weight; x 674 drivers/input/mouse/elantech.c input_report_abs(dev, ABS_MT_POSITION_X, etd->mt[id].x); x 678 drivers/input/mouse/elantech.c etd->mt[sid].x += delta_x2 * weight; x 681 drivers/input/mouse/elantech.c input_report_abs(dev, ABS_MT_POSITION_X, etd->mt[sid].x); x 134 drivers/input/mouse/elantech.h unsigned int x; x 81 drivers/input/mouse/focaltech.c unsigned int x; x 135 drivers/input/mouse/focaltech.c clamped_x = clamp(finger->x, 0U, priv->x_max); x 189 drivers/input/mouse/focaltech.c state->fingers[finger].x = ((packet[1] & 0xf) << 8) | packet[2]; x 205 drivers/input/mouse/focaltech.c state->fingers[finger1].x += (char)packet[1]; x 221 drivers/input/mouse/focaltech.c state->fingers[finger2].x += (char)packet[4]; x 50 drivers/input/mouse/gpio_mouse.c int x, y; x 62 drivers/input/mouse/gpio_mouse.c x = gpiod_get_value(gpio->right) - gpiod_get_value(gpio->left); x 65 drivers/input/mouse/gpio_mouse.c input_report_rel(input, REL_X, x); x 124 drivers/input/mouse/hgpk.c static int hgpk_discard_decay_hack(struct psmouse *psmouse, int x, int y) x 130 drivers/input/mouse/hgpk.c avx = abs(x); x 136 drivers/input/mouse/hgpk.c psmouse_warn(psmouse, "detected %dpx jump in x\n", x); x 139 drivers/input/mouse/hgpk.c psmouse_warn(psmouse, "detected secondary %dpx jump in x\n", x); x 212 drivers/input/mouse/hgpk.c int l, int r, int x, int y) x 225 drivers/input/mouse/hgpk.c if (abs(x) > 3 || abs(y) > 3) { x 233 drivers/input/mouse/hgpk.c priv->x_tally += x; x 348 drivers/input/mouse/hgpk.c int x = packet[1] | ((packet[2] & 0x78) << 4); x 371 drivers/input/mouse/hgpk.c left, right, x, y); x 390 drivers/input/mouse/hgpk.c if (x == priv->abs_x && y == priv->abs_y) { x 406 drivers/input/mouse/hgpk.c int x_diff = priv->abs_x - x; x 416 drivers/input/mouse/hgpk.c input_report_abs(idev, ABS_X, x); x 418 drivers/input/mouse/hgpk.c priv->abs_x = x; x 431 drivers/input/mouse/hgpk.c int x = packet[1] - ((packet[0] << 4) & 0x100); x 439 drivers/input/mouse/hgpk.c if (hgpk_discard_decay_hack(psmouse, x, y)) { x 445 drivers/input/mouse/hgpk.c hgpk_spewing_hack(psmouse, left, right, x, y); x 449 drivers/input/mouse/hgpk.c left, right, x, y); x 454 drivers/input/mouse/hgpk.c input_report_rel(dev, REL_X, x); x 83 drivers/input/mouse/navpoint.c int x, y, z; x 93 drivers/input/mouse/navpoint.c x = ((navpoint->data[2] & 0x1f) << 8) | navpoint->data[3]; x 97 drivers/input/mouse/navpoint.c input_report_abs(navpoint->input, ABS_X, x); x 130 drivers/input/mouse/psmouse-base.c int x, y; x 132 drivers/input/mouse/psmouse-base.c x = packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0; x 135 drivers/input/mouse/psmouse-base.c input_report_rel(dev, REL_X, x); x 53 drivers/input/mouse/pxa930_trkball.c int tbcntr, x, y; x 61 drivers/input/mouse/pxa930_trkball.c x = (TBCNTR_XP(tbcntr) - TBCNTR_XM(tbcntr)) / 2; x 64 drivers/input/mouse/pxa930_trkball.c input_report_rel(input, REL_X, x); x 38 drivers/input/mouse/rpcmouse.c short x, y, dx, dy, b; x 40 drivers/input/mouse/rpcmouse.c x = (short) iomd_readl(IOMD_MOUSEX); x 44 drivers/input/mouse/rpcmouse.c dx = x - rpcmouse_lastx; x 47 drivers/input/mouse/rpcmouse.c rpcmouse_lastx = x; x 683 drivers/input/mouse/sentelic.c unsigned int x, unsigned int y) x 688 drivers/input/mouse/sentelic.c input_report_abs(dev, ABS_MT_POSITION_X, x); x 744 drivers/input/mouse/synaptics.c agm->x = (((buf[4] & 0x0f) << 8) | buf[1]) << 1; x 787 drivers/input/mouse/synaptics.c hw->x = (((buf[3] & 0x10) << 8) | x 858 drivers/input/mouse/synaptics.c hw->x = (((buf[1] & 0x1f) << 8) | buf[2]); x 874 drivers/input/mouse/synaptics.c if (hw->x > X_MAX_POSITIVE) x 875 drivers/input/mouse/synaptics.c hw->x -= 1 << ABS_POS_BITS; x 876 drivers/input/mouse/synaptics.c else if (hw->x == X_MAX_POSITIVE) x 877 drivers/input/mouse/synaptics.c hw->x = XMAX; x 888 drivers/input/mouse/synaptics.c bool active, int x, int y) x 893 drivers/input/mouse/synaptics.c input_report_abs(dev, ABS_MT_POSITION_X, x); x 904 drivers/input/mouse/synaptics.c synaptics_report_semi_mt_slot(dev, 0, true, min(a->x, b->x), x 906 drivers/input/mouse/synaptics.c synaptics_report_semi_mt_slot(dev, 1, true, max(a->x, b->x), x 909 drivers/input/mouse/synaptics.c synaptics_report_semi_mt_slot(dev, 0, true, a->x, a->y); x 996 drivers/input/mouse/synaptics.c pos[i].x = hw[i]->x; x 1005 drivers/input/mouse/synaptics.c input_report_abs(dev, ABS_MT_POSITION_X, pos[i].x); x 1096 drivers/input/mouse/synaptics.c if (hw.z > 0 && hw.x > 1) { x 1137 drivers/input/mouse/synaptics.c input_report_abs(dev, ABS_X, hw.x); x 152 drivers/input/mouse/synaptics.h int x; x 106 drivers/input/mouse/synaptics_usb.c int x, y; x 110 drivers/input/mouse/synaptics_usb.c x = (s16)(be16_to_cpup((__be16 *)&synusb->data[2]) << 3) >> 7; x 114 drivers/input/mouse/synaptics_usb.c input_report_rel(input_dev, REL_X, x); x 129 drivers/input/mouse/synaptics_usb.c unsigned int x, y; x 133 drivers/input/mouse/synaptics_usb.c x = be16_to_cpup((__be16 *)&synusb->data[2]); x 169 drivers/input/mouse/synaptics_usb.c input_report_abs(input_dev, ABS_X, x); x 147 drivers/input/mouse/vmmouse.c u32 status, x, y, z; x 175 drivers/input/mouse/vmmouse.c VMMOUSE_CMD(ABSPOINTER_DATA, 4, status, x, y, z); x 186 drivers/input/mouse/vmmouse.c input_report_rel(rel_dev, REL_X, (s32)x); x 190 drivers/input/mouse/vmmouse.c input_report_abs(abs_dev, ABS_X, x); x 82 drivers/input/mouse/vsxxxaa.c #define DBG(x...) printk(x) x 84 drivers/input/mouse/vsxxxaa.c #define DBG(x...) do {} while (0) x 89 drivers/input/mouse/vsxxxaa.c #define IS_HDR_BYTE(x) \ x 90 drivers/input/mouse/vsxxxaa.c (((x) & VSXXXAA_INTRO_MASK) == VSXXXAA_INTRO_HEAD) x 257 drivers/input/mouse/vsxxxaa.c int x, y; x 273 drivers/input/mouse/vsxxxaa.c x = ((buf[2] & 0x3f) << 6) | (buf[1] & 0x3f); x 288 drivers/input/mouse/vsxxxaa.c mouse->name, mouse->phys, x, y, x 299 drivers/input/mouse/vsxxxaa.c input_report_abs(dev, ABS_X, x); x 53 drivers/input/mousedev.c int x, y; x 184 drivers/input/mousedev.c mousedev->packet.x = ((value - min) * xres) / size; x 285 drivers/input/mousedev.c p->dx += packet->x - client->pos_x; x 287 drivers/input/mousedev.c client->pos_x = packet->x; x 33 drivers/input/rmi4/rmi_2d_sensor.c obj->x = sensor->max_x - obj->x; x 39 drivers/input/rmi4/rmi_2d_sensor.c swap(obj->x, obj->y); x 49 drivers/input/rmi4/rmi_2d_sensor.c obj->x += axis_align->offset_x; x 52 drivers/input/rmi4/rmi_2d_sensor.c obj->x = max(axis_align->clip_x_low, obj->x); x 56 drivers/input/rmi4/rmi_2d_sensor.c obj->x = min(sensor->max_x, obj->x); x 61 drivers/input/rmi4/rmi_2d_sensor.c sensor->tracking_pos[slot].x = obj->x; x 83 drivers/input/rmi4/rmi_2d_sensor.c obj->x = sensor->tracking_pos[slot].x; x 98 drivers/input/rmi4/rmi_2d_sensor.c input_event(sensor->input, EV_ABS, ABS_MT_POSITION_X, obj->x); x 107 drivers/input/rmi4/rmi_2d_sensor.c __func__, slot, obj->type, obj->x, obj->y, obj->z, x 113 drivers/input/rmi4/rmi_2d_sensor.c void rmi_2d_sensor_rel_report(struct rmi_2d_sensor *sensor, int x, int y) x 117 drivers/input/rmi4/rmi_2d_sensor.c x = min(RMI_2D_REL_POS_MAX, max(RMI_2D_REL_POS_MIN, (int)x)); x 121 drivers/input/rmi4/rmi_2d_sensor.c x = min(RMI_2D_REL_POS_MAX, -x); x 127 drivers/input/rmi4/rmi_2d_sensor.c swap(x, y); x 129 drivers/input/rmi4/rmi_2d_sensor.c if (x || y) { x 130 drivers/input/rmi4/rmi_2d_sensor.c input_report_rel(sensor->input, REL_X, x); x 21 drivers/input/rmi4/rmi_2d_sensor.h u16 x; x 82 drivers/input/rmi4/rmi_2d_sensor.h void rmi_2d_sensor_rel_report(struct rmi_2d_sensor *sensor, int x, int y); x 526 drivers/input/rmi4/rmi_f11.c s8 x, y; x 528 drivers/input/rmi4/rmi_f11.c x = data->rel_pos[n_finger * RMI_F11_REL_BYTES]; x 531 drivers/input/rmi4/rmi_f11.c rmi_2d_sensor_rel_report(sensor, x, y); x 553 drivers/input/rmi4/rmi_f11.c obj->x = (pos_data[0] << 4) | (pos_data[2] & 0x0F); x 176 drivers/input/rmi4/rmi_f12.c obj->x = (data1[2] << 8) | data1[1]; x 107 drivers/input/serio/gscps2.c #define gscps2_readb_input(x) readb((x)+GSC_RCVDATA) x 108 drivers/input/serio/gscps2.c #define gscps2_readb_control(x) readb((x)+GSC_CONTROL) x 109 drivers/input/serio/gscps2.c #define gscps2_readb_status(x) readb((x)+GSC_STATUS) x 110 drivers/input/serio/gscps2.c #define gscps2_writeb_control(x, y) writeb((x), (y)+GSC_CONTROL) x 471 drivers/input/serio/hil_mlc.c #define TEST_PACKET(x) \ x 472 drivers/input/serio/hil_mlc.c (HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x) x 23 drivers/input/serio/i8042-x86ia64io.h # define I8042_MAP_IRQ(x) isa_irq_to_vector((x)) x 25 drivers/input/serio/i8042-x86ia64io.h # define I8042_MAP_IRQ(x) (x) x 69 drivers/input/tablet/acecad.c int x = data[1] | (data[2] << 8); x 76 drivers/input/tablet/acecad.c input_report_abs(dev, ABS_X, x); x 419 drivers/input/tablet/aiptek.c int retval, macro, x, y, z, left, right, middle, p, dv, tip, bs, pck; x 459 drivers/input/tablet/aiptek.c x = (signed char) data[2]; x 481 drivers/input/tablet/aiptek.c input_report_rel(inputdev, REL_X, x); x 510 drivers/input/tablet/aiptek.c x = get_unaligned_le16(data + 1); x 545 drivers/input/tablet/aiptek.c input_report_abs(inputdev, ABS_X, x); x 595 drivers/input/tablet/aiptek.c x = get_unaligned_le16(data + 1); x 622 drivers/input/tablet/aiptek.c input_report_abs(inputdev, ABS_X, x); x 1188 drivers/input/tablet/aiptek.c int x; x 1190 drivers/input/tablet/aiptek.c if (kstrtoint(buf, 10, &x)) { x 1198 drivers/input/tablet/aiptek.c if (x < AIPTEK_TILT_MIN || x > AIPTEK_TILT_MAX) x 1201 drivers/input/tablet/aiptek.c aiptek->newSetting.xTilt = x; x 151 drivers/input/tablet/gtco.c #define PREF_TAG(x) ((x)>>4) x 152 drivers/input/tablet/gtco.c #define PREF_TYPE(x) ((x>>2)&0x03) x 153 drivers/input/tablet/gtco.c #define PREF_SIZE(x) ((x)&0x03) x 204 drivers/input/tablet/gtco.c int x, i = 0; x 368 drivers/input/tablet/gtco.c for (x = 0; x < indent; x++) x 369 drivers/input/tablet/gtco.c indentstr[x] = '-'; x 370 drivers/input/tablet/gtco.c indentstr[x] = 0; x 373 drivers/input/tablet/gtco.c for (x = 0; x < TAG_GLOB_MAX; x++) x 374 drivers/input/tablet/gtco.c oldval[x] = globalval[x]; x 389 drivers/input/tablet/gtco.c for (x = 0; x < indent; x++) x 390 drivers/input/tablet/gtco.c indentstr[x] = '-'; x 391 drivers/input/tablet/gtco.c indentstr[x] = 0; x 394 drivers/input/tablet/gtco.c for (x = 0; x < TAG_GLOB_MAX; x++) x 395 drivers/input/tablet/gtco.c globalval[x] = oldval[x]; x 136 drivers/input/tablet/pegasus_notetaker.c u16 x, y; x 153 drivers/input/tablet/pegasus_notetaker.c x = le16_to_cpup((__le16 *)&data[2]); x 157 drivers/input/tablet/pegasus_notetaker.c if (x == 0 && y == 0) x 163 drivers/input/tablet/pegasus_notetaker.c input_report_abs(dev, ABS_X, (s16)x); x 313 drivers/input/tablet/wacom_serial4.c int x, y, z; x 318 drivers/input/tablet/wacom_serial4.c x = (wacom->data[0] & 3) << 14 | wacom->data[1]<<7 | wacom->data[2]; x 346 drivers/input/tablet/wacom_serial4.c input_report_abs(wacom->dev, ABS_X, x); x 53 drivers/input/touchscreen/88pm860x-ts.c int x, y, pen_down; x 62 drivers/input/touchscreen/88pm860x-ts.c x = ((buf[0] & 0xFF) << 4) | (buf[1] & 0x0F); x 68 drivers/input/touchscreen/88pm860x-ts.c if ((x != 0) && (z1 != 0) && (touch->res_x != 0)) { x 70 drivers/input/touchscreen/88pm860x-ts.c rt = (rt * touch->res_x * x) >> ACCURATE_BIT; x 74 drivers/input/touchscreen/88pm860x-ts.c input_report_abs(touch->idev, ABS_X, x); x 78 drivers/input/touchscreen/88pm860x-ts.c dev_dbg(chip->dev, "pen down at [%d, %d].\n", x, y); x 175 drivers/input/touchscreen/88pm860x-ts.c #define pm860x_touch_dt_init(x, y, z) (-1) x 110 drivers/input/touchscreen/ad7877.c #define AD7877_TMR(x) ((x & 0x3) << 0) x 111 drivers/input/touchscreen/ad7877.c #define AD7877_REF(x) ((x & 0x1) << 2) x 112 drivers/input/touchscreen/ad7877.c #define AD7877_POL(x) ((x & 0x1) << 3) x 113 drivers/input/touchscreen/ad7877.c #define AD7877_FCD(x) ((x & 0x3) << 4) x 114 drivers/input/touchscreen/ad7877.c #define AD7877_PM(x) ((x & 0x3) << 6) x 115 drivers/input/touchscreen/ad7877.c #define AD7877_ACQ(x) ((x & 0x3) << 8) x 116 drivers/input/touchscreen/ad7877.c #define AD7877_AVG(x) ((x & 0x3) << 10) x 127 drivers/input/touchscreen/ad7877.c #define AD7877_CHANADD(x) ((x&0xF)<<7) x 128 drivers/input/touchscreen/ad7877.c #define AD7877_READADD(x) ((x)<<2) x 129 drivers/input/touchscreen/ad7877.c #define AD7877_WRITEADD(x) ((x)<<12) x 131 drivers/input/touchscreen/ad7877.c #define AD7877_READ_CHAN(x) (AD7877_WRITEADD(AD7877_REG_CTRL1) | AD7877_SER | \ x 132 drivers/input/touchscreen/ad7877.c AD7877_MODE_SCC | AD7877_CHANADD(AD7877_REG_ ## x) | \ x 133 drivers/input/touchscreen/ad7877.c AD7877_READADD(AD7877_REG_ ## x)) x 321 drivers/input/touchscreen/ad7877.c u16 x, y, z1, z2; x 323 drivers/input/touchscreen/ad7877.c x = ts->conversion_data[AD7877_SEQ_XPOS] & MAX_12BIT; x 338 drivers/input/touchscreen/ad7877.c if (likely(x && z1)) { x 340 drivers/input/touchscreen/ad7877.c Rt = (z2 - z1) * x * ts->x_plate_ohms; x 354 drivers/input/touchscreen/ad7877.c input_report_abs(input_dev, ABS_X, x); x 54 drivers/input/touchscreen/ad7879.c #define AD7879_TMR(x) ((x & 0xFF) << 0) x 55 drivers/input/touchscreen/ad7879.c #define AD7879_ACQ(x) ((x & 0x3) << 8) x 63 drivers/input/touchscreen/ad7879.c #define AD7879_FCD(x) ((x & 0x3) << 0) x 65 drivers/input/touchscreen/ad7879.c #define AD7879_MFS(x) ((x & 0x3) << 5) x 66 drivers/input/touchscreen/ad7879.c #define AD7879_AVG(x) ((x & 0x3) << 7) x 73 drivers/input/touchscreen/ad7879.c #define AD7879_PM(x) ((x & 0x3) << 14) x 130 drivers/input/touchscreen/ad7879.c int x; x 169 drivers/input/touchscreen/ad7879.c u16 x, y, z1, z2; x 171 drivers/input/touchscreen/ad7879.c x = ts->conversion_data[AD7879_SEQ_XPOS] & MAX_12BIT; x 177 drivers/input/touchscreen/ad7879.c swap(x, y); x 191 drivers/input/touchscreen/ad7879.c if (likely(x && z1)) { x 193 drivers/input/touchscreen/ad7879.c Rt = (z2 - z1) * x * ts->x_plate_ohms; x 213 drivers/input/touchscreen/ad7879.c input_report_abs(input_dev, ABS_X, ts->x); x 219 drivers/input/touchscreen/ad7879.c ts->x = x; x 72 drivers/input/touchscreen/ads7846.c u16 x; x 182 drivers/input/touchscreen/ads7846.c #define READ_12BIT_DFR(x, adc, vref) (ADS_START | ADS_A2A1A0_d_ ## x \ x 190 drivers/input/touchscreen/ads7846.c #define READ_X(vref) (READ_12BIT_DFR(x, 1, vref)) x 196 drivers/input/touchscreen/ads7846.c #define READ_12BIT_SER(x) (ADS_START | ADS_A2A1A0_ ## x \ x 199 drivers/input/touchscreen/ads7846.c #define REF_ON (READ_12BIT_DFR(x, 1, 1)) x 753 drivers/input/touchscreen/ads7846.c u16 x, y, z1, z2; x 761 drivers/input/touchscreen/ads7846.c x = *(u16 *)packet->tc.x_buf; x 766 drivers/input/touchscreen/ads7846.c x = packet->tc.x; x 773 drivers/input/touchscreen/ads7846.c if (x == MAX_12BIT) x 774 drivers/input/touchscreen/ads7846.c x = 0; x 783 drivers/input/touchscreen/ads7846.c dev_vdbg(&ts->spi->dev, "x/y: %d/%d, PD %d\n", x, y, Rt); x 784 drivers/input/touchscreen/ads7846.c } else if (likely(x && z1)) { x 788 drivers/input/touchscreen/ads7846.c Rt *= x; x 835 drivers/input/touchscreen/ads7846.c touchscreen_report_pos(input, &ts->core_prop, x, y, false); x 839 drivers/input/touchscreen/ads7846.c dev_vdbg(&ts->spi->dev, "%4d/%4d/%4d\n", x, y, Rt); x 976 drivers/input/touchscreen/ads7846.c struct spi_transfer *x = ts->xfer; x 998 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_y_cmd[0]; x 999 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.y_buf[0]; x 1000 drivers/input/touchscreen/ads7846.c x->len = 3; x 1001 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1005 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_y; x 1006 drivers/input/touchscreen/ads7846.c x->len = 1; x 1007 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1009 drivers/input/touchscreen/ads7846.c x++; x 1010 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.y; x 1011 drivers/input/touchscreen/ads7846.c x->len = 2; x 1012 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1021 drivers/input/touchscreen/ads7846.c x->delay_usecs = pdata->settle_delay_usecs; x 1023 drivers/input/touchscreen/ads7846.c x++; x 1024 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_y; x 1025 drivers/input/touchscreen/ads7846.c x->len = 1; x 1026 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1028 drivers/input/touchscreen/ads7846.c x++; x 1029 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.y; x 1030 drivers/input/touchscreen/ads7846.c x->len = 2; x 1031 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1040 drivers/input/touchscreen/ads7846.c x++; x 1044 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_x_cmd[0]; x 1045 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.x_buf[0]; x 1046 drivers/input/touchscreen/ads7846.c x->len = 3; x 1047 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1050 drivers/input/touchscreen/ads7846.c x++; x 1052 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_x; x 1053 drivers/input/touchscreen/ads7846.c x->len = 1; x 1054 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1056 drivers/input/touchscreen/ads7846.c x++; x 1057 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.x; x 1058 drivers/input/touchscreen/ads7846.c x->len = 2; x 1059 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1064 drivers/input/touchscreen/ads7846.c x->delay_usecs = pdata->settle_delay_usecs; x 1066 drivers/input/touchscreen/ads7846.c x++; x 1067 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_x; x 1068 drivers/input/touchscreen/ads7846.c x->len = 1; x 1069 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1071 drivers/input/touchscreen/ads7846.c x++; x 1072 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.x; x 1073 drivers/input/touchscreen/ads7846.c x->len = 2; x 1074 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1084 drivers/input/touchscreen/ads7846.c x++; x 1086 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_z1; x 1087 drivers/input/touchscreen/ads7846.c x->len = 1; x 1088 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1090 drivers/input/touchscreen/ads7846.c x++; x 1091 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.z1; x 1092 drivers/input/touchscreen/ads7846.c x->len = 2; x 1093 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1097 drivers/input/touchscreen/ads7846.c x->delay_usecs = pdata->settle_delay_usecs; x 1099 drivers/input/touchscreen/ads7846.c x++; x 1100 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_z1; x 1101 drivers/input/touchscreen/ads7846.c x->len = 1; x 1102 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1104 drivers/input/touchscreen/ads7846.c x++; x 1105 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.z1; x 1106 drivers/input/touchscreen/ads7846.c x->len = 2; x 1107 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1115 drivers/input/touchscreen/ads7846.c x++; x 1117 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_z2; x 1118 drivers/input/touchscreen/ads7846.c x->len = 1; x 1119 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1121 drivers/input/touchscreen/ads7846.c x++; x 1122 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.z2; x 1123 drivers/input/touchscreen/ads7846.c x->len = 2; x 1124 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1128 drivers/input/touchscreen/ads7846.c x->delay_usecs = pdata->settle_delay_usecs; x 1130 drivers/input/touchscreen/ads7846.c x++; x 1131 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->read_z2; x 1132 drivers/input/touchscreen/ads7846.c x->len = 1; x 1133 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1135 drivers/input/touchscreen/ads7846.c x++; x 1136 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->tc.z2; x 1137 drivers/input/touchscreen/ads7846.c x->len = 2; x 1138 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1149 drivers/input/touchscreen/ads7846.c x++; x 1153 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->pwrdown_cmd[0]; x 1154 drivers/input/touchscreen/ads7846.c x->len = 3; x 1156 drivers/input/touchscreen/ads7846.c x++; x 1158 drivers/input/touchscreen/ads7846.c x->tx_buf = &packet->pwrdown; x 1159 drivers/input/touchscreen/ads7846.c x->len = 1; x 1160 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 1162 drivers/input/touchscreen/ads7846.c x++; x 1163 drivers/input/touchscreen/ads7846.c x->rx_buf = &packet->dummy; x 1164 drivers/input/touchscreen/ads7846.c x->len = 2; x 1167 drivers/input/touchscreen/ads7846.c CS_CHANGE(*x); x 1168 drivers/input/touchscreen/ads7846.c spi_message_add_tail(x, m); x 36 drivers/input/touchscreen/ar1021_i2c.c unsigned int x, y, button; x 49 drivers/input/touchscreen/ar1021_i2c.c x = ((data[2] & 0x1f) << 7) | (data[1] & 0x7f); x 52 drivers/input/touchscreen/ar1021_i2c.c input_report_abs(input, ABS_X, x); x 120 drivers/input/touchscreen/atmel_mxt_ts.c __le16 x; x 784 drivers/input/touchscreen/atmel_mxt_ts.c int x; x 791 drivers/input/touchscreen/atmel_mxt_ts.c x = (message[2] << 4) | ((message[4] >> 4) & 0xf); x 796 drivers/input/touchscreen/atmel_mxt_ts.c x >>= 2; x 814 drivers/input/touchscreen/atmel_mxt_ts.c x, y, area, amplitude); x 836 drivers/input/touchscreen/atmel_mxt_ts.c input_report_abs(input_dev, ABS_MT_POSITION_X, x); x 855 drivers/input/touchscreen/atmel_mxt_ts.c u16 x; x 870 drivers/input/touchscreen/atmel_mxt_ts.c x = get_unaligned_le16(&message[2]); x 937 drivers/input/touchscreen/atmel_mxt_ts.c id, type, x, y, major, pressure, orientation); x 940 drivers/input/touchscreen/atmel_mxt_ts.c input_report_abs(input_dev, ABS_MT_POSITION_X, x); x 1839 drivers/input/touchscreen/atmel_mxt_ts.c data->max_x = get_unaligned_le16(&range.x); x 2222 drivers/input/touchscreen/atmel_mxt_ts.c static u16 mxt_get_debug_value(struct mxt_data *data, unsigned int x, x 2239 drivers/input/touchscreen/atmel_mxt_ts.c ofs = (y + (x * col_width)) * sizeof(u16); x 2252 drivers/input/touchscreen/atmel_mxt_ts.c unsigned int x = 0; x 2258 drivers/input/touchscreen/atmel_mxt_ts.c rx = data->xy_switch ? y : x; x 2259 drivers/input/touchscreen/atmel_mxt_ts.c ry = data->xy_switch ? x : y; x 2266 drivers/input/touchscreen/atmel_mxt_ts.c if (++x >= (data->xy_switch ? data->ysize : data->xsize)) { x 2267 drivers/input/touchscreen/atmel_mxt_ts.c x = 0; x 200 drivers/input/touchscreen/bcm_iproc_tsc.c u16 x; x 239 drivers/input/touchscreen/bcm_iproc_tsc.c x = (raw_coordinate >> X_COORD_SHIFT) & x 245 drivers/input/touchscreen/bcm_iproc_tsc.c x = (x >> 4) & 0x0FFF; x 250 drivers/input/touchscreen/bcm_iproc_tsc.c x = priv->cfg_params.max_x - x; x 255 drivers/input/touchscreen/bcm_iproc_tsc.c input_report_abs(priv->idev, ABS_X, x); x 259 drivers/input/touchscreen/bcm_iproc_tsc.c dev_dbg(&priv->pdev->dev, "xy (0x%x 0x%x)\n", x, y); x 207 drivers/input/touchscreen/bu21013_ts.c unsigned int x, y; x 209 drivers/input/touchscreen/bu21013_ts.c x = data[0] << SHIFT_2 | (data[1] & MASK_BITS); x 211 drivers/input/touchscreen/bu21013_ts.c if (x != 0 && y != 0) x 213 drivers/input/touchscreen/bu21013_ts.c &ts->props, x, y); x 217 drivers/input/touchscreen/bu21013_ts.c (abs(pos[0].x - pos[1].x) < DELTA_MIN || x 226 drivers/input/touchscreen/bu21013_ts.c input_report_abs(input, ABS_MT_POSITION_X, pos[i].x); x 167 drivers/input/touchscreen/bu21029_ts.c u16 x, y, z1, z2; x 181 drivers/input/touchscreen/bu21029_ts.c x = (buf[0] << 4) | (buf[1] >> 4); x 195 drivers/input/touchscreen/bu21029_ts.c rz *= x; x 201 drivers/input/touchscreen/bu21029_ts.c x, y, false); x 31 drivers/input/touchscreen/chipone_icn8318.c __be16 x; x 121 drivers/input/touchscreen/chipone_icn8318.c be16_to_cpu(touch->x), x 51 drivers/input/touchscreen/chipone_icn8505.c u8 x[2]; x 352 drivers/input/touchscreen/chipone_icn8505.c get_unaligned_le16(touch->x), x 115 drivers/input/touchscreen/cy8ctmg110_ts.c int x, y; x 124 drivers/input/touchscreen/cy8ctmg110_ts.c x = reg_p[0] << 8 | reg_p[1]; x 131 drivers/input/touchscreen/cy8ctmg110_ts.c input_report_abs(input, ABS_X, x); x 50 drivers/input/touchscreen/cyttsp4_core.h #define GET_NUM_TOUCHES(x) ((x) & 0x1F) x 51 drivers/input/touchscreen/cyttsp4_core.h #define IS_LARGE_AREA(x) ((x) & 0x20) x 52 drivers/input/touchscreen/cyttsp4_core.h #define IS_BAD_PKT(x) ((x) & 0x20) x 32 drivers/input/touchscreen/cyttsp_core.c #define GET_NUM_TOUCHES(x) ((x) & 0x0F) x 33 drivers/input/touchscreen/cyttsp_core.c #define IS_LARGE_AREA(x) (((x) & 0x10) >> 4) x 34 drivers/input/touchscreen/cyttsp_core.c #define IS_BAD_PKT(x) ((x) & 0x20) x 35 drivers/input/touchscreen/cyttsp_core.c #define IS_VALID_APP(x) ((x) & 0x01) x 36 drivers/input/touchscreen/cyttsp_core.c #define IS_OPERATIONAL_ERR(x) ((x) & 0x3F) x 331 drivers/input/touchscreen/cyttsp_core.c input_report_abs(input, ABS_MT_POSITION_X, be16_to_cpu(tch->x)); x 30 drivers/input/touchscreen/cyttsp_core.h __be16 x, y; x 118 drivers/input/touchscreen/da9034-ts.c int x = touch->last_x; x 121 drivers/input/touchscreen/da9034-ts.c x &= 0xfff; x 123 drivers/input/touchscreen/da9034-ts.c x = 1024 - x; x 128 drivers/input/touchscreen/da9034-ts.c input_report_abs(touch->input_dev, ABS_X, x); x 55 drivers/input/touchscreen/da9052_tsi.c u16 x, y, z; x 62 drivers/input/touchscreen/da9052_tsi.c x = (u16) ret; x 82 drivers/input/touchscreen/da9052_tsi.c x = ((x << 2) & 0x3fc) | (v & 0x3); x 87 drivers/input/touchscreen/da9052_tsi.c input_report_abs(input, ABS_X, x); x 178 drivers/input/touchscreen/edt-ft5x06.c int i, type, x, y, id; x 242 drivers/input/touchscreen/edt-ft5x06.c x = get_unaligned_be16(buf) & 0x0fff; x 246 drivers/input/touchscreen/edt-ft5x06.c swap(x, y); x 254 drivers/input/touchscreen/edt-ft5x06.c x, y, true); x 47 drivers/input/touchscreen/eeti_ts.c u16 x, y; x 51 drivers/input/touchscreen/eeti_ts.c x = get_unaligned_be16(&buf[1]); x 55 drivers/input/touchscreen/eeti_ts.c x >>= res - EETI_TS_BITDEPTH; x 61 drivers/input/touchscreen/eeti_ts.c touchscreen_report_pos(eeti->input, &eeti->props, x, y, false); x 70 drivers/input/touchscreen/egalax_ts.c int id, ret, x, y, z; x 88 drivers/input/touchscreen/egalax_ts.c x = (buf[3] << 8) | buf[2]; x 105 drivers/input/touchscreen/egalax_ts.c down ? "down" : "up", id, x, y, z); x 108 drivers/input/touchscreen/egalax_ts.c input_report_abs(input_dev, ABS_MT_POSITION_X, x); x 52 drivers/input/touchscreen/egalax_ts_serial.c u16 x, y; x 59 drivers/input/touchscreen/egalax_ts_serial.c x = (((u16)(data[1] & mask) << 7) | (data[2] & 0x7f)) << shift; x 63 drivers/input/touchscreen/egalax_ts_serial.c input_report_abs(dev, ABS_X, x); x 59 drivers/input/touchscreen/ektf2127.c touches[i].x = (buf[index] & 0x0f); x 60 drivers/input/touchscreen/ektf2127.c touches[i].x <<= 8; x 61 drivers/input/touchscreen/ektf2127.c touches[i].x |= buf[index + 2]; x 91 drivers/input/touchscreen/ektf2127.c touches[i].x, touches[i].y, true); x 796 drivers/input/touchscreen/elants_i2c.c unsigned int x, y, p, w; x 800 drivers/input/touchscreen/elants_i2c.c x = (((u16)pos[0] & 0xf0) << 4) | pos[1]; x 806 drivers/input/touchscreen/elants_i2c.c i, x, y, p, w); x 810 drivers/input/touchscreen/elants_i2c.c input_event(input, EV_ABS, ABS_MT_POSITION_X, x); x 91 drivers/input/touchscreen/hideep.c __le16 x; x 283 drivers/input/touchscreen/hideep.c #define SET_PIO_SIG(x, y) \ x 284 drivers/input/touchscreen/hideep.c hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y)) x 289 drivers/input/touchscreen/hideep.c #define NVM_W_SFR(x, y) \ x 292 drivers/input/touchscreen/hideep.c SET_PIO_SIG(x, y); \ x 701 drivers/input/touchscreen/hideep.c le16_to_cpup(&event->x)); x 50 drivers/input/touchscreen/htcpen.c unsigned short x, y, xy; x 59 drivers/input/touchscreen/htcpen.c x = inb_p(HTCPEN_PORT_DATA); x 68 drivers/input/touchscreen/htcpen.c x = X_AXIS_MAX - ((x * 8) + ((xy >> 4) & 0xf)); x 71 drivers/input/touchscreen/htcpen.c x = X_AXIS_MAX - x; x 75 drivers/input/touchscreen/htcpen.c if (x != X_AXIS_MAX && x != 0) { x 77 drivers/input/touchscreen/htcpen.c input_report_abs(htcpen_dev, ABS_X, x); x 107 drivers/input/touchscreen/ili210x.c unsigned int *x, unsigned int *y) x 115 drivers/input/touchscreen/ili210x.c *x = get_unaligned_be16(touchdata + 1 + (finger * 4) + 0); x 123 drivers/input/touchscreen/ili210x.c unsigned int *x, unsigned int *y) x 128 drivers/input/touchscreen/ili210x.c *x = get_unaligned_be16(touchdata + 1 + (finger * 5) + 0); x 129 drivers/input/touchscreen/ili210x.c if (!(*x & BIT(15))) /* Touch indication */ x 132 drivers/input/touchscreen/ili210x.c *x &= 0x3fff; x 143 drivers/input/touchscreen/ili210x.c unsigned int x = 0, y = 0; x 148 drivers/input/touchscreen/ili210x.c i, &x, &y); x 151 drivers/input/touchscreen/ili210x.c i, &x, &y); x 160 drivers/input/touchscreen/ili210x.c touchscreen_report_pos(input, &priv->prop, x, y, x 265 drivers/input/touchscreen/imx6ul_tsc.c u32 x, y; x 281 drivers/input/touchscreen/imx6ul_tsc.c x = (value >> 16) & 0x0fff; x 291 drivers/input/touchscreen/imx6ul_tsc.c input_report_abs(tsc->input, ABS_X, x); x 69 drivers/input/touchscreen/jornada720_ts.c int x, y; x 82 drivers/input/touchscreen/jornada720_ts.c x = jornada720_ts_average(jornada_ts->x_data); x 86 drivers/input/touchscreen/jornada720_ts.c input_report_abs(input, ABS_X, x); x 49 drivers/input/touchscreen/lpc32xx_ts.c #define LPC32XX_TSC_FIFO_NORMALIZE_X_VAL(x) (((x) & 0x03FF0000) >> 16) x 122 drivers/input/touchscreen/mainstone-wm97xx.c u16 x, y, p = 0x100 | WM97XX_ADCSEL_PRES; x 137 drivers/input/touchscreen/mainstone-wm97xx.c x = MODR; x 138 drivers/input/touchscreen/mainstone-wm97xx.c if (x == last) { x 142 drivers/input/touchscreen/mainstone-wm97xx.c last = x; x 145 drivers/input/touchscreen/mainstone-wm97xx.c x = MODR; x 151 drivers/input/touchscreen/mainstone-wm97xx.c x, y, p); x 154 drivers/input/touchscreen/mainstone-wm97xx.c if ((x & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_X || x 161 drivers/input/touchscreen/mainstone-wm97xx.c input_report_abs(wm->input_dev, ABS_X, x & 0xfff); x 101 drivers/input/touchscreen/max11801_ts.c int x = -1; x 121 drivers/input/touchscreen/max11801_ts.c x = (buf[i] << XY_BUF_OFFSET) + x 135 drivers/input/touchscreen/max11801_ts.c input_report_abs(data->input_dev, ABS_X, x); x 111 drivers/input/touchscreen/mcs5000_ts.c int x; x 128 drivers/input/touchscreen/mcs5000_ts.c x = (buffer[READ_X_POS_UPPER] << 8) | buffer[READ_X_POS_LOWER]; x 132 drivers/input/touchscreen/mcs5000_ts.c input_report_abs(data->input_dev, ABS_X, x); x 471 drivers/input/touchscreen/melfas_mip4.c u16 x, y; x 486 drivers/input/touchscreen/melfas_mip4.c x = ((packet[1] & 0x0F) << 8) | packet[2]; x 507 drivers/input/touchscreen/melfas_mip4.c x = ((packet[2] & 0x0F) << 8) | packet[3]; x 521 drivers/input/touchscreen/melfas_mip4.c id, state, x, y, pressure); x 529 drivers/input/touchscreen/melfas_mip4.c input_report_abs(ts->input, ABS_MT_POSITION_X, x); x 158 drivers/input/touchscreen/mms114.c unsigned int x; x 172 drivers/input/touchscreen/mms114.c x = touch->x_lo | touch->x_hi << 8; x 178 drivers/input/touchscreen/mms114.c x, y, touch->width, touch->strength); x 184 drivers/input/touchscreen/mms114.c touchscreen_report_pos(input_dev, &data->props, x, y, true); x 150 drivers/input/touchscreen/of_touchscreen.c unsigned int *x, unsigned int *y) x 153 drivers/input/touchscreen/of_touchscreen.c *x = prop->max_x - *x; x 159 drivers/input/touchscreen/of_touchscreen.c swap(*x, *y); x 175 drivers/input/touchscreen/of_touchscreen.c unsigned int x, unsigned int y) x 177 drivers/input/touchscreen/of_touchscreen.c touchscreen_apply_prop_to_x_y(prop, &x, &y); x 178 drivers/input/touchscreen/of_touchscreen.c pos->x = x; x 197 drivers/input/touchscreen/of_touchscreen.c unsigned int x, unsigned int y, x 200 drivers/input/touchscreen/of_touchscreen.c touchscreen_apply_prop_to_x_y(prop, &x, &y); x 201 drivers/input/touchscreen/of_touchscreen.c input_report_abs(input, multitouch ? ABS_MT_POSITION_X : ABS_X, x); x 24 drivers/input/touchscreen/pcap_ts.c u16 x, y; x 52 drivers/input/touchscreen/pcap_ts.c pcap_ts->x = res[1]; x 53 drivers/input/touchscreen/pcap_ts.c if (pcap_ts->x <= X_AXIS_MIN || pcap_ts->x >= X_AXIS_MAX || x 63 drivers/input/touchscreen/pcap_ts.c input_report_abs(pcap_ts->input, ABS_X, pcap_ts->x); x 42 drivers/input/touchscreen/penmount.c unsigned short x, y; x 75 drivers/input/touchscreen/penmount.c input_event(input, EV_ABS, ABS_MT_POSITION_X, pm->slots[i].x); x 137 drivers/input/touchscreen/penmount.c pm->slots[slotnum].x = pm->data[2] * 256 + pm->data[1]; x 153 drivers/input/touchscreen/penmount.c pm->slots[slotnum].x = pm->data[2] * 256 + pm->data[1]; x 129 drivers/input/touchscreen/pixcir_i2c_ts.c report->pos[i].x); x 134 drivers/input/touchscreen/pixcir_i2c_ts.c i, slot, report->pos[i].x, report->pos[i].y); x 69 drivers/input/touchscreen/raspberrypi-ts.c int x, y; x 87 drivers/input/touchscreen/raspberrypi-ts.c x = (((int)regs.point[i].xh & 0xf) << 8) + regs.point[i].xl; x 98 drivers/input/touchscreen/raspberrypi-ts.c touchscreen_report_pos(input, &ts->prop, x, y, true); x 47 drivers/input/touchscreen/resistive-adc-touch.c unsigned int x, y, press = 0x0; x 50 drivers/input/touchscreen/resistive-adc-touch.c x = touch_info[0]; x 55 drivers/input/touchscreen/resistive-adc-touch.c if ((!x && !y) || (st->pressure && (press < st->pressure_min))) { x 63 drivers/input/touchscreen/resistive-adc-touch.c touchscreen_report_pos(st->input, &st->prop, x, y, false); x 557 drivers/input/touchscreen/rohm_bu21023.c pos[0].x = ((s16)READ_POS_BUF(POS_X1_H) << 2) | x 561 drivers/input/touchscreen/rohm_bu21023.c pos[1].x = ((s16)READ_POS_BUF(POS_X2_H) << 2) | x 580 drivers/input/touchscreen/rohm_bu21023.c if (pos[1].x != 0 && pos[1].y != 0) { x 581 drivers/input/touchscreen/rohm_bu21023.c pos[0].x = pos[1].x; x 583 drivers/input/touchscreen/rohm_bu21023.c pos[1].x = 0; x 616 drivers/input/touchscreen/rohm_bu21023.c ABS_MT_POSITION_X, pos[i].x); x 148 drivers/input/touchscreen/s6sy761.c u16 x = (event[1] << 3) | ((event[3] & S6SY761_MASK_X) >> 4); x 154 drivers/input/touchscreen/s6sy761.c input_report_abs(sdata->input, ABS_MT_POSITION_X, x); x 188 drivers/input/touchscreen/silead.c input_report_abs(input, ABS_MT_POSITION_X, data->pos[i].x); x 191 drivers/input/touchscreen/silead.c dev_dbg(dev, "x=%d y=%d hw_id=%d sw_id=%d\n", data->pos[i].x, x 56 drivers/input/touchscreen/sis_i2c.c #define SIS_PKT_IS_TOUCH(x) (((x) & 0x0f) == 0x01) x 57 drivers/input/touchscreen/sis_i2c.c #define SIS_PKT_IS_HIDI2C(x) (((x) & 0x0f) == 0x06) x 60 drivers/input/touchscreen/sis_i2c.c #define SIS_PKT_HAS_AREA(x) ((x) & BIT(4)) x 61 drivers/input/touchscreen/sis_i2c.c #define SIS_PKT_HAS_PRESSURE(x) ((x) & BIT(5)) x 62 drivers/input/touchscreen/sis_i2c.c #define SIS_PKT_HAS_SCANTIME(x) ((x) & BIT(6)) x 179 drivers/input/touchscreen/sis_i2c.c u16 x, y; x 208 drivers/input/touchscreen/sis_i2c.c x = get_unaligned_le16(&data[SIS_CONTACT_X_OFFSET]); x 216 drivers/input/touchscreen/sis_i2c.c input_report_abs(input, ABS_MT_POSITION_X, x); x 29 drivers/input/touchscreen/st1232.c u16 x; x 84 drivers/input/touchscreen/st1232.c finger[i].x = ((buf[i + y] & 0x0070) << 4) | x 120 drivers/input/touchscreen/st1232.c finger[i].x, finger[i].y, true); x 175 drivers/input/touchscreen/stmfts.c u16 x = event[1] | ((event[2] & STMFTS_MASK_X_MSB) << 8); x 185 drivers/input/touchscreen/stmfts.c input_report_abs(sdata->input, ABS_MT_POSITION_X, x); x 209 drivers/input/touchscreen/stmfts.c u16 x = (event[2] << 4) | (event[4] >> 4); x 213 drivers/input/touchscreen/stmfts.c input_report_abs(sdata->input, ABS_X, x); x 129 drivers/input/touchscreen/stmpe-ts.c int x, y, z; x 149 drivers/input/touchscreen/stmpe-ts.c x = (data_set[0] << 4) | (data_set[1] >> 4); x 153 drivers/input/touchscreen/stmpe-ts.c input_report_abs(ts->idev, ABS_X, x); x 54 drivers/input/touchscreen/sun4i-ts.c #define ADC_FIRST_DLY(x) ((x) << 24) /* 8 bits */ x 55 drivers/input/touchscreen/sun4i-ts.c #define ADC_FIRST_DLY_MODE(x) ((x) << 23) x 56 drivers/input/touchscreen/sun4i-ts.c #define ADC_CLK_SEL(x) ((x) << 22) x 57 drivers/input/touchscreen/sun4i-ts.c #define ADC_CLK_DIV(x) ((x) << 20) /* 3 bits */ x 58 drivers/input/touchscreen/sun4i-ts.c #define FS_DIV(x) ((x) << 16) /* 4 bits */ x 59 drivers/input/touchscreen/sun4i-ts.c #define T_ACQ(x) ((x) << 0) /* 16 bits */ x 62 drivers/input/touchscreen/sun4i-ts.c #define STYLUS_UP_DEBOUN(x) ((x) << 12) /* 8 bits */ x 63 drivers/input/touchscreen/sun4i-ts.c #define STYLUS_UP_DEBOUN_EN(x) ((x) << 9) x 64 drivers/input/touchscreen/sun4i-ts.c #define TOUCH_PAN_CALI_EN(x) ((x) << 6) x 65 drivers/input/touchscreen/sun4i-ts.c #define TP_DUAL_EN(x) ((x) << 5) x 66 drivers/input/touchscreen/sun4i-ts.c #define TP_MODE_EN(x) ((x) << 4) x 67 drivers/input/touchscreen/sun4i-ts.c #define TP_ADC_SELECT(x) ((x) << 3) x 68 drivers/input/touchscreen/sun4i-ts.c #define ADC_CHAN_SELECT(x) ((x) << 0) /* 3 bits */ x 71 drivers/input/touchscreen/sun4i-ts.c #define SUN6I_TP_MODE_EN(x) ((x) << 5) x 74 drivers/input/touchscreen/sun4i-ts.c #define TP_SENSITIVE_ADJUST(x) ((x) << 28) /* 4 bits */ x 75 drivers/input/touchscreen/sun4i-ts.c #define TP_MODE_SELECT(x) ((x) << 26) /* 2 bits */ x 76 drivers/input/touchscreen/sun4i-ts.c #define PRE_MEA_EN(x) ((x) << 24) x 77 drivers/input/touchscreen/sun4i-ts.c #define PRE_MEA_THRE_CNT(x) ((x) << 0) /* 24 bits */ x 80 drivers/input/touchscreen/sun4i-ts.c #define FILTER_EN(x) ((x) << 2) x 81 drivers/input/touchscreen/sun4i-ts.c #define FILTER_TYPE(x) ((x) << 0) /* 2 bits */ x 84 drivers/input/touchscreen/sun4i-ts.c #define TEMP_IRQ_EN(x) ((x) << 18) x 85 drivers/input/touchscreen/sun4i-ts.c #define OVERRUN_IRQ_EN(x) ((x) << 17) x 86 drivers/input/touchscreen/sun4i-ts.c #define DATA_IRQ_EN(x) ((x) << 16) x 87 drivers/input/touchscreen/sun4i-ts.c #define TP_DATA_XY_CHANGE(x) ((x) << 13) x 88 drivers/input/touchscreen/sun4i-ts.c #define FIFO_TRIG(x) ((x) << 8) /* 5 bits */ x 89 drivers/input/touchscreen/sun4i-ts.c #define DATA_DRQ_EN(x) ((x) << 7) x 90 drivers/input/touchscreen/sun4i-ts.c #define FIFO_FLUSH(x) ((x) << 4) x 91 drivers/input/touchscreen/sun4i-ts.c #define TP_UP_IRQ_EN(x) ((x) << 1) x 92 drivers/input/touchscreen/sun4i-ts.c #define TP_DOWN_IRQ_EN(x) ((x) << 0) x 103 drivers/input/touchscreen/sun4i-ts.c #define TEMP_ENABLE(x) ((x) << 16) x 104 drivers/input/touchscreen/sun4i-ts.c #define TEMP_PERIOD(x) ((x) << 0) /* t = x * 256 * 16 / clkin */ x 119 drivers/input/touchscreen/sun4i-ts.c u32 x, y; x 122 drivers/input/touchscreen/sun4i-ts.c x = readl(ts->base + TP_DATA); x 126 drivers/input/touchscreen/sun4i-ts.c input_report_abs(ts->input, ABS_X, x); x 41 drivers/input/touchscreen/surface3_spi.c __le16 x; x 52 drivers/input/touchscreen/surface3_spi.c __le16 x; x 82 drivers/input/touchscreen/surface3_spi.c get_unaligned_le16(&finger->x)); x 150 drivers/input/touchscreen/surface3_spi.c get_unaligned_le16(&pen->x)); x 135 drivers/input/touchscreen/sx8654.c u16 x, y; x 158 drivers/input/touchscreen/sx8654.c x = 0; x 173 drivers/input/touchscreen/sx8654.c x = chdata & MAX_12BIT; x 181 drivers/input/touchscreen/sx8654.c touchscreen_report_pos(ts->input, &ts->props, x, y, false); x 184 drivers/input/touchscreen/sx8654.c dev_dbg(dev, "point(%4d,%4d)\n", x, y); x 197 drivers/input/touchscreen/sx8654.c unsigned int x, y; x 225 drivers/input/touchscreen/sx8654.c x = ((data[0] & 0xf) << 8) | (data[1]); x 228 drivers/input/touchscreen/sx8654.c touchscreen_report_pos(sx8654->input, &sx8654->props, x, y, x 233 drivers/input/touchscreen/sx8654.c dev_dbg(&sx8654->client->dev, "point(%4d,%4d)\n", x, y); x 218 drivers/input/touchscreen/ti_am335x_tsc.c u32 *x, u32 *y, u32 *z1, u32 *z2) x 266 drivers/input/touchscreen/ti_am335x_tsc.c *x = xsum; x 274 drivers/input/touchscreen/ti_am335x_tsc.c unsigned int x = 0, y = 0; x 307 drivers/input/touchscreen/ti_am335x_tsc.c titsc_read_coordinates(ts_dev, &x, &y, &z1, &z2); x 316 drivers/input/touchscreen/ti_am335x_tsc.c z *= x; x 322 drivers/input/touchscreen/ti_am335x_tsc.c input_report_abs(input_dev, ABS_X, x); x 36 drivers/input/touchscreen/tps6507x-ts.c u16 x; x 182 drivers/input/touchscreen/tps6507x-ts.c &tsc->tc.x); x 191 drivers/input/touchscreen/tps6507x-ts.c input_report_abs(input_dev, ABS_X, tsc->tc.x); x 53 drivers/input/touchscreen/tsc2007.h u16 x; x 58 drivers/input/touchscreen/tsc2007_core.c tc->x = tsc2007_xfer(tsc, READ_X); x 73 drivers/input/touchscreen/tsc2007_core.c if (tc->x == MAX_12BIT) x 74 drivers/input/touchscreen/tsc2007_core.c tc->x = 0; x 76 drivers/input/touchscreen/tsc2007_core.c if (likely(tc->x && tc->z1)) { x 79 drivers/input/touchscreen/tsc2007_core.c rt *= tc->x; x 139 drivers/input/touchscreen/tsc2007_core.c tc.x, tc.y, rt); x 144 drivers/input/touchscreen/tsc2007_core.c input_report_abs(input, ABS_X, tc.x); x 73 drivers/input/touchscreen/tsc2007_iio.c tc.x = tsc2007_xfer(tsc, READ_X); x 68 drivers/input/touchscreen/tsc200x-core.c u16 x; x 113 drivers/input/touchscreen/tsc200x-core.c int x, int y, int pressure) x 116 drivers/input/touchscreen/tsc200x-core.c input_report_abs(ts->idev, ABS_X, x); x 131 drivers/input/touchscreen/tsc200x-core.c dev_dbg(ts->dev, "point(%4d,%4d), pressure (%4d)\n", x, y, x 150 drivers/input/touchscreen/tsc200x-core.c if (unlikely(tsdata.x > MAX_12BIT || tsdata.y > MAX_12BIT)) x 164 drivers/input/touchscreen/tsc200x-core.c ts->in_x == tsdata.x && ts->in_y == tsdata.y && x 173 drivers/input/touchscreen/tsc200x-core.c ts->in_x = tsdata.x; x 179 drivers/input/touchscreen/tsc200x-core.c pressure = tsdata.x * (tsdata.z2 - tsdata.z1) / tsdata.z1; x 186 drivers/input/touchscreen/tsc200x-core.c tsc200x_update_pen_state(ts, tsdata.x, tsdata.y, pressure); x 28 drivers/input/touchscreen/tsc40.c u32 x; x 31 drivers/input/touchscreen/tsc40.c x = ((data[1] & 0x03) << 8) | data[2]; x 34 drivers/input/touchscreen/tsc40.c input_report_abs(dev, ABS_X, x); x 147 drivers/input/touchscreen/ucb1400_ts.c static void ucb1400_ts_report_event(struct input_dev *idev, u16 pressure, u16 x, u16 y) x 149 drivers/input/touchscreen/ucb1400_ts.c input_report_abs(idev, ABS_X, x); x 188 drivers/input/touchscreen/ucb1400_ts.c unsigned int x, y, p; x 202 drivers/input/touchscreen/ucb1400_ts.c x = ucb1400_ts_read_xpos(ucb); x 207 drivers/input/touchscreen/ucb1400_ts.c ucb1400_ts_report_event(ucb->ts_idev, p, x, y); x 104 drivers/input/touchscreen/usbtouchscreen.c int x, y; x 267 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[2] << 8) | pkt[3]; x 337 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[3] & 0x0F) << 7) | (pkt[4] & 0x7F); x 382 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[1] & 0x1F) << 7) | (pkt[2] & 0x7F); x 413 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[2] & 0x0F) << 8) | pkt[1]; x 436 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[4] << 8) | pkt[3]; x 439 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[8] << 8) | pkt[7]; x 603 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[0] & 0x1F) << 7) | (pkt[3] & 0x7F); x 628 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[3] << 7) | pkt[4]) >> shift; x 655 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[0] & 0x1F) << 7) | (pkt[2] & 0x7F); x 738 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[2] & 0x03) << 8) | pkt[1]; x 753 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[3] << 8) | pkt[2]; x 767 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[2] & 0x0F) << 8) | pkt[1]; x 796 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[1] << 5) | (pkt[2] >> 2); x 803 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[2] << 5) | (pkt[1] >> 2); x 820 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[2] << 8) | pkt[1]; x 835 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[1] & 0x38) << 4) | pkt[2]; x 849 drivers/input/touchscreen/usbtouchscreen.c dev->x = ((pkt[0] & 0x3f) << 6) | (pkt[2] & 0x3f); x 871 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[1] & 0x7f) | ((pkt[2] & 0x07) << 7); x 874 drivers/input/touchscreen/usbtouchscreen.c dev_dbg(&intf->dev, "%s: down %d,%d\n", __func__, dev->x, dev->y); x 878 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[1] & 0x7f) | ((pkt[2] & 0x07) << 7); x 881 drivers/input/touchscreen/usbtouchscreen.c dev_dbg(&intf->dev, "%s: up %d,%d\n", __func__, dev->x, dev->y); x 1052 drivers/input/touchscreen/usbtouchscreen.c int x, y, begin_x, begin_y, end_x, end_y, w, h, ret; x 1082 drivers/input/touchscreen/usbtouchscreen.c for (x = 0; x < x_len; x++) { x 1083 drivers/input/touchscreen/usbtouchscreen.c if (begin_x == -1 && packet->data[x] > NEXIO_THRESHOLD) { x 1084 drivers/input/touchscreen/usbtouchscreen.c begin_x = x; x 1087 drivers/input/touchscreen/usbtouchscreen.c if (end_x == -1 && begin_x != -1 && packet->data[x] < NEXIO_THRESHOLD) { x 1088 drivers/input/touchscreen/usbtouchscreen.c end_x = x - 1; x 1104 drivers/input/touchscreen/usbtouchscreen.c ABS_MT_TOUCH_MINOR, min(x,h)); x 1114 drivers/input/touchscreen/usbtouchscreen.c usbtouch->x = 2 * begin_x + w; x 1138 drivers/input/touchscreen/usbtouchscreen.c dev->x = (pkt[3] << 8) | pkt[2]; x 1397 drivers/input/touchscreen/usbtouchscreen.c input_report_abs(usbtouch->input, ABS_Y, usbtouch->x); x 1399 drivers/input/touchscreen/usbtouchscreen.c input_report_abs(usbtouch->input, ABS_X, usbtouch->x); x 94 drivers/input/touchscreen/wacom_i2c.c unsigned int x, y, pressure; x 107 drivers/input/touchscreen/wacom_i2c.c x = le16_to_cpup((__le16 *)&data[4]); x 121 drivers/input/touchscreen/wacom_i2c.c input_report_abs(input, ABS_X, x); x 64 drivers/input/touchscreen/wacom_w8001.c u16 x; x 73 drivers/input/touchscreen/wacom_w8001.c u16 x; x 116 drivers/input/touchscreen/wacom_w8001.c coord->x = (data[1] & 0x7F) << 9; x 117 drivers/input/touchscreen/wacom_w8001.c coord->x |= (data[2] & 0x7F) << 2; x 118 drivers/input/touchscreen/wacom_w8001.c coord->x |= (data[6] & 0x60) >> 5; x 133 drivers/input/touchscreen/wacom_w8001.c coord->x = (data[1] << 7) | data[2]; x 139 drivers/input/touchscreen/wacom_w8001.c unsigned int *x, unsigned int *y) x 142 drivers/input/touchscreen/wacom_w8001.c *x = *x * w8001->max_pen_x / w8001->max_touch_x; x 152 drivers/input/touchscreen/wacom_w8001.c unsigned int x, y; x 162 drivers/input/touchscreen/wacom_w8001.c x = (data[6 * i + 1] << 7) | data[6 * i + 2]; x 167 drivers/input/touchscreen/wacom_w8001.c scale_touch_coordinates(w8001, &x, &y); x 169 drivers/input/touchscreen/wacom_w8001.c input_report_abs(dev, ABS_MT_POSITION_X, x); x 196 drivers/input/touchscreen/wacom_w8001.c query->x = data[3] << 9; x 197 drivers/input/touchscreen/wacom_w8001.c query->x |= data[4] << 2; x 198 drivers/input/touchscreen/wacom_w8001.c query->x |= (data[2] >> 5) & 0x3; x 205 drivers/input/touchscreen/wacom_w8001.c if (!query->x && !query->y) { x 206 drivers/input/touchscreen/wacom_w8001.c query->x = 1024; x 209 drivers/input/touchscreen/wacom_w8001.c query->x = query->y = (1 << query->panel_res); x 251 drivers/input/touchscreen/wacom_w8001.c input_report_abs(dev, ABS_X, coord->x); x 266 drivers/input/touchscreen/wacom_w8001.c unsigned int x = coord->x; x 270 drivers/input/touchscreen/wacom_w8001.c scale_touch_coordinates(w8001, &x, &y); x 272 drivers/input/touchscreen/wacom_w8001.c input_report_abs(dev, ABS_X, x); x 444 drivers/input/touchscreen/wacom_w8001.c w8001->max_pen_x = coord.x; x 447 drivers/input/touchscreen/wacom_w8001.c input_set_abs_params(dev, ABS_X, 0, coord.x, 0, 0); x 488 drivers/input/touchscreen/wacom_w8001.c w8001->max_touch_x = touch.x; x 493 drivers/input/touchscreen/wacom_w8001.c touch.x = w8001->max_pen_x; x 498 drivers/input/touchscreen/wacom_w8001.c input_set_abs_params(dev, ABS_X, 0, touch.x, 0, 0); x 531 drivers/input/touchscreen/wacom_w8001.c 0, touch.x, 0, 0); x 957 drivers/input/touchscreen/wdt87xx_i2c.c u32 x, y, w; x 973 drivers/input/touchscreen/wdt87xx_i2c.c x = get_unaligned_le16(buf + FINGER_EV_V1_OFFSET_X); x 979 drivers/input/touchscreen/wdt87xx_i2c.c if (x > param->max_x || y > param->max_y) x 983 drivers/input/touchscreen/wdt87xx_i2c.c finger_id, x, y); x 989 drivers/input/touchscreen/wdt87xx_i2c.c input_report_abs(input, ABS_MT_POSITION_X, x); x 274 drivers/input/touchscreen/wm9705.c rc = wm9705_poll_sample(wm, WM97XX_ADCSEL_X | WM97XX_PEN_DOWN, &data->x); x 334 drivers/input/touchscreen/wm9712.c data->x = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD); x 362 drivers/input/touchscreen/wm9712.c if (!(data->x & WM97XX_ADCSEL_X) || !(data->y & WM97XX_ADCSEL_Y)) x 367 drivers/input/touchscreen/wm9712.c if (!(data->x & WM97XX_PEN_DOWN) || !(data->y & WM97XX_PEN_DOWN)) { x 389 drivers/input/touchscreen/wm9712.c &data->x); x 345 drivers/input/touchscreen/wm9713.c data->x = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD); x 373 drivers/input/touchscreen/wm9713.c if (!(data->x & WM97XX_ADCSEL_X) || !(data->y & WM97XX_ADCSEL_Y)) x 378 drivers/input/touchscreen/wm9713.c if (!(data->x & WM97XX_PEN_DOWN) || !(data->y & WM97XX_PEN_DOWN)) { x 399 drivers/input/touchscreen/wm9713.c rc = wm9713_poll_sample(wm, WM97XX_ADCSEL_X | WM97XX_PEN_DOWN, &data->x); x 439 drivers/input/touchscreen/wm97xx-core.c data.x >> 12, data.x & 0xfff, data.y >> 12, x 442 drivers/input/touchscreen/wm97xx-core.c if (abs_x[0] > (data.x & 0xfff) || x 443 drivers/input/touchscreen/wm97xx-core.c abs_x[1] < (data.x & 0xfff) || x 451 drivers/input/touchscreen/wm97xx-core.c input_report_abs(wm->input_dev, ABS_X, data.x & 0xfff); x 227 drivers/input/touchscreen/zforce_ts.c static int zforce_resolution(struct zforce_ts *ts, u16 x, u16 y) x 231 drivers/input/touchscreen/zforce_ts.c (x & 0xff), ((x >> 8) & 0xff), x 234 drivers/input/touchscreen/zforce_ts.c dev_dbg(&client->dev, "set resolution to (%d,%d)\n", x, y); x 88 drivers/input/touchscreen/zylonite-wm97xx.c u16 x, y, p = 0x100 | WM97XX_ADCSEL_PRES; x 104 drivers/input/touchscreen/zylonite-wm97xx.c x = MODR; x 105 drivers/input/touchscreen/zylonite-wm97xx.c if (x == last) { x 109 drivers/input/touchscreen/zylonite-wm97xx.c last = x; x 112 drivers/input/touchscreen/zylonite-wm97xx.c x = MODR; x 118 drivers/input/touchscreen/zylonite-wm97xx.c x, y, p); x 121 drivers/input/touchscreen/zylonite-wm97xx.c if ((x & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_X || x 128 drivers/input/touchscreen/zylonite-wm97xx.c input_report_abs(wm->input_dev, ABS_X, x & 0xfff); x 1946 drivers/iommu/amd_iommu_init.c #define XT_INT_DEST_MODE(x) (((x) & 0x1ULL) << 2) x 1947 drivers/iommu/amd_iommu_init.c #define XT_INT_DEST_LO(x) (((x) & 0xFFFFFFULL) << 8) x 1948 drivers/iommu/amd_iommu_init.c #define XT_INT_VEC(x) (((x) & 0xFFULL) << 32) x 1949 drivers/iommu/amd_iommu_init.c #define XT_INT_DEST_HI(x) ((((x) >> 24) & 0xFFULL) << 56) x 43 drivers/iommu/amd_iommu_types.h #define MMIO_GET_LD(x) (((x) & MMIO_RANGE_LD_MASK) >> MMIO_RANGE_LD_SHIFT) x 44 drivers/iommu/amd_iommu_types.h #define MMIO_GET_FD(x) (((x) & MMIO_RANGE_FD_MASK) >> MMIO_RANGE_FD_SHIFT) x 45 drivers/iommu/amd_iommu_types.h #define MMIO_GET_BUS(x) (((x) & MMIO_RANGE_BUS_MASK) >> MMIO_RANGE_BUS_SHIFT) x 46 drivers/iommu/amd_iommu_types.h #define MMIO_MSI_NUM(x) ((x) & 0x1f) x 229 drivers/iommu/amd_iommu_types.h #define PPR_REQ_TYPE(x) (((x) >> 60) & 0xfULL) x 230 drivers/iommu/amd_iommu_types.h #define PPR_FLAGS(x) (((x) >> 48) & 0xfffULL) x 231 drivers/iommu/amd_iommu_types.h #define PPR_DEVID(x) ((x) & 0xffffULL) x 232 drivers/iommu/amd_iommu_types.h #define PPR_TAG(x) (((x) >> 32) & 0x3ffULL) x 233 drivers/iommu/amd_iommu_types.h #define PPR_PASID1(x) (((x) >> 16) & 0xffffULL) x 234 drivers/iommu/amd_iommu_types.h #define PPR_PASID2(x) (((x) >> 42) & 0xfULL) x 235 drivers/iommu/amd_iommu_types.h #define PPR_PASID(x) ((PPR_PASID2(x) << 16) | PPR_PASID1(x)) x 246 drivers/iommu/amd_iommu_types.h #define GA_TAG(x) (u32)(x & 0xffffffffULL) x 247 drivers/iommu/amd_iommu_types.h #define GA_DEVID(x) (u16)(((x) >> 32) & 0xffffULL) x 248 drivers/iommu/amd_iommu_types.h #define GA_REQ_TYPE(x) (((x) >> 60) & 0xfULL) x 269 drivers/iommu/amd_iommu_types.h #define PM_LEVEL_SHIFT(x) (12 + ((x) * 9)) x 270 drivers/iommu/amd_iommu_types.h #define PM_LEVEL_SIZE(x) (((x) < 6) ? \ x 271 drivers/iommu/amd_iommu_types.h ((1ULL << PM_LEVEL_SHIFT((x))) - 1): \ x 273 drivers/iommu/amd_iommu_types.h #define PM_LEVEL_INDEX(x, a) (((a) >> PM_LEVEL_SHIFT((x))) & 0x1ffULL) x 274 drivers/iommu/amd_iommu_types.h #define PM_LEVEL_ENC(x) (((x) << 9) & 0xe00ULL) x 275 drivers/iommu/amd_iommu_types.h #define PM_LEVEL_PDE(x, a) ((a) | PM_LEVEL_ENC((x)) | \ x 349 drivers/iommu/amd_iommu_types.h #define DTE_GCR3_VAL_A(x) (((x) >> 12) & 0x00007ULL) x 350 drivers/iommu/amd_iommu_types.h #define DTE_GCR3_VAL_B(x) (((x) >> 15) & 0x0ffffULL) x 351 drivers/iommu/amd_iommu_types.h #define DTE_GCR3_VAL_C(x) (((x) >> 31) & 0x1fffffULL) x 796 drivers/iommu/amd_iommu_types.h #define AMD_IOMMU_GUEST_IR_GA(x) (x == AMD_IOMMU_GUEST_IR_VAPIC || \ x 797 drivers/iommu/amd_iommu_types.h x == AMD_IOMMU_GUEST_IR_LEGACY_GA) x 799 drivers/iommu/amd_iommu_types.h #define AMD_IOMMU_GUEST_IR_VAPIC(x) (x == AMD_IOMMU_GUEST_IR_VAPIC) x 816 drivers/iommu/amd_iommu_types.h #define APICID_TO_IRTE_DEST_LO(x) (x & 0xffffff) x 817 drivers/iommu/amd_iommu_types.h #define APICID_TO_IRTE_DEST_HI(x) ((x >> 24) & 0xff) x 18 drivers/iommu/fsl_pamu.h #define set_bf(v, m, x) (v = ((v) & ~(m)) | (((x) << m##_SHIFT) & (m))) x 39 drivers/iommu/io-pgtable-arm-v7s.c #define io_pgtable_to_data(x) \ x 40 drivers/iommu/io-pgtable-arm-v7s.c container_of((x), struct arm_v7s_io_pgtable, iop) x 42 drivers/iommu/io-pgtable-arm-v7s.c #define io_pgtable_ops_to_data(x) \ x 43 drivers/iommu/io-pgtable-arm-v7s.c io_pgtable_to_data(io_pgtable_ops_to_pgtable(x)) x 28 drivers/iommu/io-pgtable-arm.c #define io_pgtable_to_data(x) \ x 29 drivers/iommu/io-pgtable-arm.c container_of((x), struct arm_lpae_io_pgtable, iop) x 31 drivers/iommu/io-pgtable-arm.c #define io_pgtable_ops_to_data(x) \ x 32 drivers/iommu/io-pgtable-arm.c io_pgtable_to_data(io_pgtable_ops_to_pgtable(x)) x 54 drivers/iommu/omap-iommu.c #define MMU_LOCK_BASE(x) \ x 55 drivers/iommu/omap-iommu.c ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT) x 59 drivers/iommu/omap-iommu.c #define MMU_LOCK_VICT(x) \ x 60 drivers/iommu/omap-iommu.c ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT) x 78 drivers/iommu/omap-iopgtable.h #define iopgd_is_table(x) (((x) & 3) == IOPGD_TABLE) x 79 drivers/iommu/omap-iopgtable.h #define iopgd_is_section(x) (((x) & (1 << 18 | 3)) == IOPGD_SECTION) x 80 drivers/iommu/omap-iopgtable.h #define iopgd_is_super(x) (((x) & (1 << 18 | 3)) == IOPGD_SUPER) x 85 drivers/iommu/omap-iopgtable.h #define iopte_is_small(x) (((x) & 2) == IOPTE_SMALL) x 86 drivers/iommu/omap-iopgtable.h #define iopte_is_large(x) (((x) & 3) == IOPTE_LARGE) x 87 drivers/iommu/tegra-smmu.c #define SMMU_PTC_CONFIG_REQ_LIMIT(x) (((x) & 0x0f) << 24) x 88 drivers/iommu/tegra-smmu.c #define SMMU_PTC_CONFIG_INDEX_MAP(x) ((x) & 0x3f) x 91 drivers/iommu/tegra-smmu.c #define SMMU_PTB_ASID_VALUE(x) ((x) & 0x7f) x 118 drivers/iommu/tegra-smmu.c #define SMMU_ASID_VALUE(x) ((x) & SMMU_ASID_MASK) x 43 drivers/irqchip/irq-gic-v2m.c #define V2M_MSI_TYPER_BASE_SPI(x) \ x 44 drivers/irqchip/irq-gic-v2m.c (((x) >> V2M_MSI_TYPER_BASE_SHIFT) & V2M_MSI_TYPER_BASE_MASK) x 46 drivers/irqchip/irq-gic-v2m.c #define V2M_MSI_TYPER_NUM_SPI(x) ((x) & V2M_MSI_TYPER_NUM_MASK) x 33 drivers/irqchip/irq-meson-gpio.c #define REG_EDGE_POL_EDGE(x) BIT(x) x 34 drivers/irqchip/irq-meson-gpio.c #define REG_EDGE_POL_LOW(x) BIT(16 + (x)) x 35 drivers/irqchip/irq-meson-gpio.c #define REG_BOTH_EDGE(x) BIT(8 + (x)) x 36 drivers/irqchip/irq-meson-gpio.c #define REG_EDGE_POL_MASK(x) ( \ x 37 drivers/irqchip/irq-meson-gpio.c REG_EDGE_POL_EDGE(x) | \ x 38 drivers/irqchip/irq-meson-gpio.c REG_EDGE_POL_LOW(x) | \ x 39 drivers/irqchip/irq-meson-gpio.c REG_BOTH_EDGE(x)) x 40 drivers/irqchip/irq-meson-gpio.c #define REG_PIN_SEL_SHIFT(x) (((x) % 4) * 8) x 41 drivers/irqchip/irq-meson-gpio.c #define REG_FILTER_SEL_SHIFT(x) ((x) * 4) x 41 drivers/irqchip/irq-mips-gic.c #define GIC_LOCAL_TO_HWIRQ(x) (GIC_LOCAL_HWIRQ_BASE + (x)) x 42 drivers/irqchip/irq-mips-gic.c #define GIC_HWIRQ_TO_LOCAL(x) ((x) - GIC_LOCAL_HWIRQ_BASE) x 44 drivers/irqchip/irq-mips-gic.c #define GIC_SHARED_TO_HWIRQ(x) (GIC_SHARED_HWIRQ_BASE + (x)) x 45 drivers/irqchip/irq-mips-gic.c #define GIC_HWIRQ_TO_SHARED(x) ((x) - GIC_SHARED_HWIRQ_BASE) x 19 drivers/irqchip/irq-mscc-ocelot.c #define ICPU_CFG_INTR_DST_INTR_IDENT(x) (0x38 + 0x4 * (x)) x 20 drivers/irqchip/irq-mscc-ocelot.c #define ICPU_CFG_INTR_INTR_TRIGGER(x) (0x5c + 0x4 * (x)) x 34 drivers/irqchip/irq-mvebu-icu.c #define ICU_INT_CFG(x) (0x100 + 4 * (x)) x 81 drivers/irqchip/irq-ompic.c #define OMPIC_DATA(x) ((x) & 0xffff) x 247 drivers/irqchip/irq-renesas-intc-irqpin.c #define INTC_IRQ_SENSE(x) (x + INTC_IRQ_SENSE_VALID) x 29 drivers/irqchip/irq-sun4i.c #define SUN4I_IRQ_PENDING_REG(x) (0x10 + 0x4 * x) x 30 drivers/irqchip/irq-sun4i.c #define SUN4I_IRQ_FIQ_PENDING_REG(x) (0x20 + 0x4 * x) x 31 drivers/irqchip/irq-sun4i.c #define SUN4I_IRQ_ENABLE_REG(data, x) ((data)->enable_reg_offset + 0x4 * x) x 32 drivers/irqchip/irq-sun4i.c #define SUN4I_IRQ_MASK_REG(data, x) ((data)->mask_reg_offset + 0x4 * x) x 191 drivers/isdn/capi/capiutil.c #define byteTLcpy(x, y) *(u8 *)(x) = *(u8 *)(y); x 192 drivers/isdn/capi/capiutil.c #define wordTLcpy(x, y) *(u16 *)(x) = *(u16 *)(y); x 193 drivers/isdn/capi/capiutil.c #define dwordTLcpy(x, y) memcpy(x, y, 4); x 194 drivers/isdn/capi/capiutil.c #define structTLcpy(x, y, l) memcpy(x, y, l) x 195 drivers/isdn/capi/capiutil.c #define structTLcpyovl(x, y, l) memmove(x, y, l) x 197 drivers/isdn/capi/capiutil.c #define byteTRcpy(x, y) *(u8 *)(y) = *(u8 *)(x); x 198 drivers/isdn/capi/capiutil.c #define wordTRcpy(x, y) *(u16 *)(y) = *(u16 *)(x); x 199 drivers/isdn/capi/capiutil.c #define dwordTRcpy(x, y) memcpy(y, x, 4); x 200 drivers/isdn/capi/capiutil.c #define structTRcpy(x, y, l) memcpy(y, x, l) x 201 drivers/isdn/capi/capiutil.c #define structTRcpyovl(x, y, l) memmove(y, x, l) x 736 drivers/isdn/hardware/mISDN/hfcmulti.c unsigned int i, x, y; x 739 drivers/isdn/hardware/mISDN/hfcmulti.c for (x = 0; x < NUM_EC; x++) { x 741 drivers/isdn/hardware/mISDN/hfcmulti.c if (!x) { x 742 drivers/isdn/hardware/mISDN/hfcmulti.c ver = vpm_in(wc, x, 0x1a0); x 743 drivers/isdn/hardware/mISDN/hfcmulti.c printk(KERN_DEBUG "VPM: Chip %d: ver %02x\n", x, ver); x 747 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x1a8 + y, 0x00); /* GPIO out */ x 748 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x1ac + y, 0x00); /* GPIO dir */ x 749 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x1b0 + y, 0x00); /* GPIO sel */ x 753 drivers/isdn/hardware/mISDN/hfcmulti.c reg = vpm_in(wc, x, 0x1a3); /* misc_con */ x 754 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x1a3, reg & ~2); x 757 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x022, 1); x 758 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x023, 0xff); x 761 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x02f, 0x00); x 762 drivers/isdn/hardware/mISDN/hfcmulti.c mask = 0x02020202 << (x * 4); x 766 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x33 - i, (mask >> (i << 3)) & 0xff); x 771 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x20, reg); x 775 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x24, 0x02); x 776 drivers/isdn/hardware/mISDN/hfcmulti.c reg = vpm_in(wc, x, 0x24); x 782 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, i, 0x00); x 802 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, i, 0x01); x 808 drivers/isdn/hardware/mISDN/hfcmulti.c vpm_out(wc, x, 0x78 + i, 0x01); x 5335 drivers/isdn/hardware/mISDN/hfcmulti.c #define H(x) ((unsigned long)&hfcm_map[x]) x 87 drivers/isdn/hardware/mISDN/isar.h #define SET_DPS(x) ((x << 6) & 0xc0) x 352 drivers/isdn/mISDN/dsp_blowfish.c #define GET32_3(x) (((x) & 0xff)) x 353 drivers/isdn/mISDN/dsp_blowfish.c #define GET32_2(x) (((x) >> (8)) & (0xff)) x 354 drivers/isdn/mISDN/dsp_blowfish.c #define GET32_1(x) (((x) >> (16)) & (0xff)) x 355 drivers/isdn/mISDN/dsp_blowfish.c #define GET32_0(x) (((x) >> (24)) & (0xff)) x 357 drivers/isdn/mISDN/dsp_blowfish.c #define bf_F(x) (((S[GET32_0(x)] + S[256 + GET32_1(x)]) ^ \ x 358 drivers/isdn/mISDN/dsp_blowfish.c S[512 + GET32_2(x)]) + S[768 + GET32_3(x)]) x 407 drivers/isdn/mISDN/tei.c u16 x; x 409 drivers/isdn/mISDN/tei.c get_random_bytes(&x, sizeof(x)); x 410 drivers/isdn/mISDN/tei.c return x; x 141 drivers/leds/leds-88pm860x.c #define pm860x_led_dt_init(x, y) (-1) x 24 drivers/leds/leds-an30259a.c #define AN30259A_LED_EN(x) BIT((x) - 1) x 25 drivers/leds/leds-an30259a.c #define AN30259A_LED_SLOPE(x) BIT(((x) - 1) + 4) x 27 drivers/leds/leds-an30259a.c #define AN30259A_REG_LEDCC(x) (0x03 + ((x) - 1)) x 30 drivers/leds/leds-an30259a.c #define AN30259A_REG_SLOPE(x) (0x06 + ((x) - 1)) x 31 drivers/leds/leds-an30259a.c #define AN30259A_LED_SLOPETIME1(x) (x) x 32 drivers/leds/leds-an30259a.c #define AN30259A_LED_SLOPETIME2(x) ((x) << 4) x 34 drivers/leds/leds-an30259a.c #define AN30259A_REG_LEDCNT1(x) (0x09 + (4 * ((x) - 1))) x 35 drivers/leds/leds-an30259a.c #define AN30259A_LED_DUTYMAX(x) ((x) << 4) x 36 drivers/leds/leds-an30259a.c #define AN30259A_LED_DUTYMID(x) (x) x 38 drivers/leds/leds-an30259a.c #define AN30259A_REG_LEDCNT2(x) (0x0A + (4 * ((x) - 1))) x 39 drivers/leds/leds-an30259a.c #define AN30259A_LED_DELAY(x) ((x) << 4) x 40 drivers/leds/leds-an30259a.c #define AN30259A_LED_DUTYMIN(x) (x) x 43 drivers/leds/leds-an30259a.c #define AN30259A_REG_LEDCNT3(x) (0x0B + (4 * ((x) - 1))) x 44 drivers/leds/leds-an30259a.c #define AN30259A_LED_DT1(x) (x) x 45 drivers/leds/leds-an30259a.c #define AN30259A_LED_DT2(x) ((x) << 4) x 47 drivers/leds/leds-an30259a.c #define AN30259A_REG_LEDCNT4(x) (0x0C + (4 * ((x) - 1))) x 48 drivers/leds/leds-an30259a.c #define AN30259A_LED_DT3(x) (x) x 49 drivers/leds/leds-an30259a.c #define AN30259A_LED_DT4(x) ((x) << 4) x 32 drivers/leds/leds-as3645a.c #define AS_DESIGN_INFO_FACTORY(x) (((x) >> 4)) x 33 drivers/leds/leds-as3645a.c #define AS_DESIGN_INFO_MODEL(x) ((x) & 0x0f) x 39 drivers/leds/leds-as3645a.c #define AS_VERSION_CONTROL_RFU(x) (((x) >> 4)) x 40 drivers/leds/leds-as3645a.c #define AS_VERSION_CONTROL_VERSION(x) ((x) & 0x0f) x 21 drivers/leds/leds-ktd2692.c #define KTD2692_MM_TO_FL_RATIO(x) ((x) / 3) x 27 drivers/leds/leds-ktd2692.c #define KTD2692_FLASH_MODE_CURR_PERCENT(x) (((x) * 16) / 100) x 29 drivers/leds/leds-tlc591xx.c #define TLC591XX_REG_PWM(x) (0x02 + (x)) x 225 drivers/macintosh/adb.c adb_probe_task(void *x) x 717 drivers/macintosh/adbhid.c adb_message_handler(struct notifier_block *this, unsigned long code, void *x) x 26 drivers/macintosh/ams/ams-core.c void ams_sensors(s8 *x, s8 *y, s8 *z) x 32 drivers/macintosh/ams/ams-core.c ams_info.get_xyz(y, x, z); x 34 drivers/macintosh/ams/ams-core.c ams_info.get_xyz(x, y, z); x 41 drivers/macintosh/ams/ams-core.c *x = ~(*x); x 47 drivers/macintosh/ams/ams-core.c s8 x, y, z; x 50 drivers/macintosh/ams/ams-core.c ams_sensors(&x, &y, &z); x 53 drivers/macintosh/ams/ams-core.c return snprintf(buf, PAGE_SIZE, "%d %d %d\n", x, y, z); x 151 drivers/macintosh/ams/ams-i2c.c static void ams_i2c_get_xyz(s8 *x, s8 *y, s8 *z) x 153 drivers/macintosh/ams/ams-i2c.c *x = ams_i2c_read(AMS_DATAX); x 31 drivers/macintosh/ams/ams-input.c s8 x, y, z; x 35 drivers/macintosh/ams/ams-input.c ams_sensors(&x, &y, &z); x 37 drivers/macintosh/ams/ams-input.c x -= ams_info.xcalib; x 41 drivers/macintosh/ams/ams-input.c input_report_abs(idev, ABS_X, invert ? -x : x); x 54 drivers/macintosh/ams/ams-input.c s8 x, y, z; x 57 drivers/macintosh/ams/ams-input.c ams_sensors(&x, &y, &z); x 58 drivers/macintosh/ams/ams-input.c ams_info.xcalib = x; x 123 drivers/macintosh/ams/ams-pmu.c static void ams_pmu_get_xyz(s8 *x, s8 *y, s8 *z) x 125 drivers/macintosh/ams/ams-pmu.c *x = ams_pmu_get_register(AMS_X); x 43 drivers/macintosh/ams/ams.h void (*get_xyz)(s8 *x, s8 *y, s8 *z); x 63 drivers/macintosh/ams/ams.h extern void ams_sensors(s8 *x, s8 *y, s8 *z); x 538 drivers/macintosh/mediabay.c static int media_bay_task(void *x) x 69 drivers/macintosh/therm_windtunnel.c } x; x 71 drivers/macintosh/therm_windtunnel.c #define T(x,y) (((x)<<8) | (y)*0x100/10 ) x 101 drivers/macintosh/therm_windtunnel.c return sprintf(buf, "%d.%d\n", x.temp>>8, (x.temp & 255)*10/256 ); x 107 drivers/macintosh/therm_windtunnel.c return sprintf(buf, "%d.%d\n", x.casetemp>>8, (x.casetemp & 255)*10/256 ); x 158 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x25, val, 1 ); x 159 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x20, 0, 1 ); x 160 drivers/macintosh/therm_windtunnel.c print_temp("CPU-temp: ", x.temp ); x 161 drivers/macintosh/therm_windtunnel.c if( x.casetemp ) x 162 drivers/macintosh/therm_windtunnel.c print_temp(", Case: ", x.casetemp ); x 163 drivers/macintosh/therm_windtunnel.c printk(", Fan: %d (tuned %+d)\n", 11-fan_setting, x.fan_level-fan_setting ); x 165 drivers/macintosh/therm_windtunnel.c x.fan_level = fan_setting; x 173 drivers/macintosh/therm_windtunnel.c temp = read_reg( x.thermostat, 0, 2 ); x 179 drivers/macintosh/therm_windtunnel.c casetemp = read_reg(x.fan, 0x0b, 1) << 8; x 180 drivers/macintosh/therm_windtunnel.c casetemp |= (read_reg(x.fan, 0x06, 1) & 0x7) << 5; x 182 drivers/macintosh/therm_windtunnel.c if( LOG_TEMP && x.temp != temp ) { x 185 drivers/macintosh/therm_windtunnel.c printk(", Fan: %d\n", 11-x.fan_level ); x 187 drivers/macintosh/therm_windtunnel.c x.temp = temp; x 188 drivers/macintosh/therm_windtunnel.c x.casetemp = casetemp; x 193 drivers/macintosh/therm_windtunnel.c if( i < x.downind ) x 195 drivers/macintosh/therm_windtunnel.c x.downind = i; x 199 drivers/macintosh/therm_windtunnel.c if( x.upind < i ) x 201 drivers/macintosh/therm_windtunnel.c x.upind = i; x 215 drivers/macintosh/therm_windtunnel.c x.r0 = read_reg( x.fan, 0x00, 1 ); x 216 drivers/macintosh/therm_windtunnel.c x.r1 = read_reg( x.fan, 0x01, 1 ); x 217 drivers/macintosh/therm_windtunnel.c x.r20 = read_reg( x.fan, 0x20, 1 ); x 218 drivers/macintosh/therm_windtunnel.c x.r23 = read_reg( x.fan, 0x23, 1 ); x 219 drivers/macintosh/therm_windtunnel.c x.r25 = read_reg( x.fan, 0x25, 1 ); x 222 drivers/macintosh/therm_windtunnel.c if( (val=read_reg(x.thermostat, 1, 1)) >= 0 ) { x 224 drivers/macintosh/therm_windtunnel.c if( write_reg( x.thermostat, 1, val, 1 ) ) x 228 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x01, 0x01, 1 ); x 230 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x23, 0x91, 1 ); x 232 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x00, 0x95, 1 ); x 239 drivers/macintosh/therm_windtunnel.c if( x.overheat_temp == (80 << 8) ) { x 240 drivers/macintosh/therm_windtunnel.c x.overheat_temp = 75 << 8; x 241 drivers/macintosh/therm_windtunnel.c x.overheat_hyst = 70 << 8; x 242 drivers/macintosh/therm_windtunnel.c write_reg( x.thermostat, 2, x.overheat_hyst, 2 ); x 243 drivers/macintosh/therm_windtunnel.c write_reg( x.thermostat, 3, x.overheat_temp, 2 ); x 245 drivers/macintosh/therm_windtunnel.c print_temp("Reducing overheating limit to ", x.overheat_temp ); x 246 drivers/macintosh/therm_windtunnel.c print_temp(" (Hyst: ", x.overheat_hyst ); x 251 drivers/macintosh/therm_windtunnel.c x.downind = 0xffff; x 252 drivers/macintosh/therm_windtunnel.c x.upind = -1; x 255 drivers/macintosh/therm_windtunnel.c err = device_create_file( &x.of_dev->dev, &dev_attr_cpu_temperature ); x 256 drivers/macintosh/therm_windtunnel.c err |= device_create_file( &x.of_dev->dev, &dev_attr_case_temperature ); x 265 drivers/macintosh/therm_windtunnel.c device_remove_file( &x.of_dev->dev, &dev_attr_cpu_temperature ); x 266 drivers/macintosh/therm_windtunnel.c device_remove_file( &x.of_dev->dev, &dev_attr_case_temperature ); x 268 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x01, x.r1, 1 ); x 269 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x20, x.r20, 1 ); x 270 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x23, x.r23, 1 ); x 271 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x25, x.r25, 1 ); x 272 drivers/macintosh/therm_windtunnel.c write_reg( x.fan, 0x00, x.r0, 1 ); x 277 drivers/macintosh/therm_windtunnel.c mutex_lock(&x.lock); x 279 drivers/macintosh/therm_windtunnel.c mutex_unlock(&x.lock); x 286 drivers/macintosh/therm_windtunnel.c mutex_lock(&x.lock); x 288 drivers/macintosh/therm_windtunnel.c mutex_unlock(&x.lock); x 291 drivers/macintosh/therm_windtunnel.c mutex_lock(&x.lock); x 293 drivers/macintosh/therm_windtunnel.c mutex_unlock(&x.lock); x 318 drivers/macintosh/therm_windtunnel.c if (x.running || strncmp(adapter->name, "uni-n", 5)) x 341 drivers/macintosh/therm_windtunnel.c if (x.running) { x 342 drivers/macintosh/therm_windtunnel.c x.running = 0; x 343 drivers/macintosh/therm_windtunnel.c kthread_stop(x.poll_task); x 344 drivers/macintosh/therm_windtunnel.c x.poll_task = NULL; x 346 drivers/macintosh/therm_windtunnel.c if (client == x.thermostat) x 347 drivers/macintosh/therm_windtunnel.c x.thermostat = NULL; x 348 drivers/macintosh/therm_windtunnel.c else if (client == x.fan) x 349 drivers/macintosh/therm_windtunnel.c x.fan = NULL; x 359 drivers/macintosh/therm_windtunnel.c if( x.fan ) x 367 drivers/macintosh/therm_windtunnel.c x.fan = cl; x 377 drivers/macintosh/therm_windtunnel.c if( x.thermostat ) x 397 drivers/macintosh/therm_windtunnel.c x.temp = temp; x 398 drivers/macintosh/therm_windtunnel.c x.overheat_temp = os_temp; x 399 drivers/macintosh/therm_windtunnel.c x.overheat_hyst = hyst_temp; x 400 drivers/macintosh/therm_windtunnel.c x.thermostat = cl; x 433 drivers/macintosh/therm_windtunnel.c if (!x.running && x.thermostat && x.fan) { x 434 drivers/macintosh/therm_windtunnel.c x.running = 1; x 435 drivers/macintosh/therm_windtunnel.c x.poll_task = kthread_run(control_loop, NULL, "g4fand"); x 473 drivers/macintosh/therm_windtunnel.c if (x.running) x 518 drivers/macintosh/therm_windtunnel.c mutex_init(&x.lock); x 534 drivers/macintosh/therm_windtunnel.c x.of_dev = of_platform_device_create(np, "temperature", NULL); x 537 drivers/macintosh/therm_windtunnel.c if( !x.of_dev ) { x 551 drivers/macintosh/therm_windtunnel.c if( x.of_dev ) x 552 drivers/macintosh/therm_windtunnel.c of_device_unregister( x.of_dev ); x 367 drivers/macintosh/via-cuda.c int x; \ x 368 drivers/macintosh/via-cuda.c for (x = 1000; !(cond); --x) { \ x 369 drivers/macintosh/via-cuda.c if (x == 0) { \ x 161 drivers/macintosh/via-macii.c unsigned char x; x 174 drivers/macintosh/via-macii.c x = via[SR]; x 369 drivers/macintosh/via-macii.c int x; x 397 drivers/macintosh/via-macii.c x = via[SR]; x 399 drivers/macintosh/via-macii.c if ((status & CTLR_IRQ) && (x == 0xFF)) { x 408 drivers/macintosh/via-macii.c *reply_ptr = x; x 439 drivers/macintosh/via-macii.c x = via[SR]; x 457 drivers/macintosh/via-macii.c x = via[SR]; x 473 drivers/macintosh/via-macii.c if (x == 0xFF) { x 479 drivers/macintosh/via-macii.c } else if (x == 0x00) { x 489 drivers/macintosh/via-macii.c *reply_ptr = x; x 498 drivers/macintosh/via-macii.c x = via[SR]; x 1212 drivers/macintosh/via-pmu.c send_byte(int x) x 1215 drivers/macintosh/via-pmu.c out_8(&via1[SR], x); x 2053 drivers/macintosh/via-pmu.c int i, x; x 2068 drivers/macintosh/via-pmu.c x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; x 2069 drivers/macintosh/via-pmu.c } while (x == 0); x 2070 drivers/macintosh/via-pmu.c if (x >= 0x100) x 2521 drivers/macintosh/via-pmu.c polled_send_byte(int x) x 2524 drivers/macintosh/via-pmu.c via1[SR] = x; eieio(); x 2531 drivers/macintosh/via-pmu.c int x; x 2534 drivers/macintosh/via-pmu.c x = via1[SR]; eieio(); x 2536 drivers/macintosh/via-pmu.c x = via1[SR]; eieio(); x 2537 drivers/macintosh/via-pmu.c return x; x 32 drivers/macintosh/windfarm_max6690_sensor.c #define wf_to_6690(x) container_of((x), struct wf_6690_sensor, sens) x 69 drivers/mailbox/bcm-pdc-mailbox.c #define XXD(x, max_mask) ((x) & (max_mask)) x 70 drivers/mailbox/bcm-pdc-mailbox.c #define TXD(x, max_mask) XXD((x), (max_mask)) x 71 drivers/mailbox/bcm-pdc-mailbox.c #define RXD(x, max_mask) XXD((x), (max_mask)) x 16 drivers/mailbox/imx-mailbox.c #define IMX_MU_xTRn(x) (0x00 + 4 * (x)) x 18 drivers/mailbox/imx-mailbox.c #define IMX_MU_xRRn(x) (0x10 + 4 * (x)) x 21 drivers/mailbox/imx-mailbox.c #define IMX_MU_xSR_GIPn(x) BIT(28 + (3 - (x))) x 22 drivers/mailbox/imx-mailbox.c #define IMX_MU_xSR_RFn(x) BIT(24 + (3 - (x))) x 23 drivers/mailbox/imx-mailbox.c #define IMX_MU_xSR_TEn(x) BIT(20 + (3 - (x))) x 29 drivers/mailbox/imx-mailbox.c #define IMX_MU_xCR_GIEn(x) BIT(28 + (3 - (x))) x 31 drivers/mailbox/imx-mailbox.c #define IMX_MU_xCR_RIEn(x) BIT(24 + (3 - (x))) x 33 drivers/mailbox/imx-mailbox.c #define IMX_MU_xCR_TIEn(x) BIT(20 + (3 - (x))) x 35 drivers/mailbox/imx-mailbox.c #define IMX_MU_xCR_GIRn(x) BIT(16 + (3 - (x))) x 17 drivers/mailbox/rockchip-mailbox.c #define MAILBOX_A2B_CMD(x) (0x08 + (x) * 8) x 18 drivers/mailbox/rockchip-mailbox.c #define MAILBOX_A2B_DAT(x) (0x0c + (x) * 8) x 22 drivers/mailbox/rockchip-mailbox.c #define MAILBOX_B2A_CMD(x) (0x30 + (x) * 8) x 23 drivers/mailbox/rockchip-mailbox.c #define MAILBOX_B2A_DAT(x) (0x34 + (x) * 8) x 20 drivers/mailbox/tegra-hsp.c #define HSP_INT_IE(x) (0x100 + ((x) * 4)) x 74 drivers/mcb/mcb-internal.h #define GDD_IRQ(x) ((x) & 0x1f) x 75 drivers/mcb/mcb-internal.h #define GDD_REV(x) (((x) >> 5) & 0x3f) x 76 drivers/mcb/mcb-internal.h #define GDD_VAR(x) (((x) >> 11) & 0x3f) x 77 drivers/mcb/mcb-internal.h #define GDD_DEV(x) (((x) >> 18) & 0x3ff) x 78 drivers/mcb/mcb-internal.h #define GDD_DTY(x) (((x) >> 28) & 0xf) x 81 drivers/mcb/mcb-internal.h #define GDD_BAR(x) ((x) & 0x7) x 82 drivers/mcb/mcb-internal.h #define GDD_INS(x) (((x) >> 3) & 0x3f) x 83 drivers/mcb/mcb-internal.h #define GDD_GRP(x) (((x) >> 9) & 0x3f) x 121 drivers/mcb/mcb-internal.h #define BAR_CNT(x) ((x) & 0x07) x 123 drivers/mcb/mcb-internal.h #define BAR_DESC_SIZE(x) ((x) * sizeof(struct chameleon_bar) + sizeof(__le32)) x 2535 drivers/md/bcache/super.c static int bcache_reboot(struct notifier_block *n, unsigned long code, void *x) x 136 drivers/md/bcache/util.c size_t i, j, x; x 143 drivers/md/bcache/util.c x = s[i] | 32; x 145 drivers/md/bcache/util.c switch (x) { x 147 drivers/md/bcache/util.c x -= '0'; x 150 drivers/md/bcache/util.c x -= 'a' - 10; x 157 drivers/md/bcache/util.c x <<= 4; x 158 drivers/md/bcache/util.c uuid[j++ >> 1] |= x; x 575 drivers/md/bcache/util.h static inline unsigned int fract_exp_two(unsigned int x, x 580 drivers/md/bcache/util.h mantissa += x & (mantissa - 1); x 581 drivers/md/bcache/util.h x >>= fract_bits; /* The exponent */ x 583 drivers/md/bcache/util.h return mantissa << x >> fract_bits; x 99 drivers/md/dm-integrity.c #define journal_entry_set_sector(je, x) do { smp_wmb(); WRITE_ONCE((je)->u.sector, cpu_to_le64(x)); } while (0) x 101 drivers/md/dm-integrity.c #define journal_entry_set_sector(je, x) do { (je)->u.s.sector_lo = cpu_to_le32(x); smp_wmb(); WRITE_ONCE((je)->u.s.sector_hi, cpu_to_le32((x) >> 32)); } while (0) x 326 drivers/md/dm-integrity.c #define DEBUG_print(x, ...) printk(KERN_DEBUG x, ##__VA_ARGS__) x 344 drivers/md/dm-integrity.c #define DEBUG_print(x, ...) do { } while (0) x 2770 drivers/md/dm-integrity.c static int dm_integrity_reboot(struct notifier_block *n, unsigned long code, void *x) x 960 drivers/md/dm-ioctl.c int r = -EINVAL, x; x 977 drivers/md/dm-ioctl.c x = sscanf(geostr, "%lu %lu %lu %lu%c", indata, x 980 drivers/md/dm-ioctl.c if (x != 4) { x 39 drivers/md/dm-snap.c #define DM_TRACKED_CHUNK_HASH(x) ((unsigned long)(x) & \ x 670 drivers/md/dm-stats.c struct dm_stat *s, size_t x) x 676 drivers/md/dm-stats.c p = &s->stat_percpu[smp_processor_id()][x]; x 697 drivers/md/dm-stats.c p = &s->stat_percpu[cpu][x]; x 721 drivers/md/dm-stats.c size_t x; x 725 drivers/md/dm-stats.c for (x = idx_start; x < idx_end; x++) { x 726 drivers/md/dm-stats.c shared = &s->stat_shared[x]; x 728 drivers/md/dm-stats.c __dm_stat_init_temporary_percpu_totals(shared, s, x); x 730 drivers/md/dm-stats.c p = &s->stat_percpu[smp_processor_id()][x]; x 748 drivers/md/dm-stats.c p = &s->stat_percpu[smp_processor_id()][x]; x 805 drivers/md/dm-stats.c size_t x; x 834 drivers/md/dm-stats.c for (x = idx_start; x < idx_end; x++, start = end) { x 835 drivers/md/dm-stats.c shared = &s->stat_shared[x]; x 840 drivers/md/dm-stats.c __dm_stat_init_temporary_percpu_totals(shared, s, x); x 684 drivers/md/dm-verity-target.c unsigned x; x 701 drivers/md/dm-verity-target.c for (x = 0; x < v->digest_size; x++) x 702 drivers/md/dm-verity-target.c DMEMIT("%02x", v->root_digest[x]); x 707 drivers/md/dm-verity-target.c for (x = 0; x < v->salt_size; x++) x 708 drivers/md/dm-verity-target.c DMEMIT("%02x", v->salt[x]); x 1876 drivers/md/dm-writecache.c uint64_t x; x 2234 drivers/md/dm-writecache.c x = (uint64_t)wc->n_blocks * (100 - high_wm_percent); x 2235 drivers/md/dm-writecache.c x += 50; x 2236 drivers/md/dm-writecache.c do_div(x, 100); x 2237 drivers/md/dm-writecache.c wc->freelist_high_watermark = x; x 2238 drivers/md/dm-writecache.c x = (uint64_t)wc->n_blocks * (100 - low_wm_percent); x 2239 drivers/md/dm-writecache.c x += 50; x 2240 drivers/md/dm-writecache.c do_div(x, 100); x 2241 drivers/md/dm-writecache.c wc->freelist_low_watermark = x; x 2272 drivers/md/dm-writecache.c uint64_t x; x 2303 drivers/md/dm-writecache.c x = (uint64_t)wc->freelist_high_watermark * 100; x 2304 drivers/md/dm-writecache.c x += wc->n_blocks / 2; x 2305 drivers/md/dm-writecache.c do_div(x, (size_t)wc->n_blocks); x 2306 drivers/md/dm-writecache.c DMEMIT(" high_watermark %u", 100 - (unsigned)x); x 2309 drivers/md/dm-writecache.c x = (uint64_t)wc->freelist_low_watermark * 100; x 2310 drivers/md/dm-writecache.c x += wc->n_blocks / 2; x 2311 drivers/md/dm-writecache.c do_div(x, (size_t)wc->n_blocks); x 2312 drivers/md/dm-writecache.c DMEMIT(" low_watermark %u", 100 - (unsigned)x); x 94 drivers/md/md-bitmap.h #define NEEDED(x) (((bitmap_counter_t) x) & NEEDED_MASK) x 95 drivers/md/md-bitmap.h #define RESYNC(x) (((bitmap_counter_t) x) & RESYNC_MASK) x 96 drivers/md/md-bitmap.h #define COUNTER(x) (((bitmap_counter_t) x) & COUNTER_MAX) x 7880 drivers/md/md.c int i, x = per_milli/50, y = 20-x; x 7882 drivers/md/md.c for (i = 0; i < x; i++) x 9275 drivers/md/md.c unsigned long code, void *x) x 309 drivers/md/persistent-data/dm-block-manager.c #define bl_init(x) do { } while (0) x 310 drivers/md/persistent-data/dm-block-manager.c #define bl_down_read(x) 0 x 311 drivers/md/persistent-data/dm-block-manager.c #define bl_down_read_nonblock(x) 0 x 312 drivers/md/persistent-data/dm-block-manager.c #define bl_up_read(x) do { } while (0) x 313 drivers/md/persistent-data/dm-block-manager.c #define bl_down_write(x) 0 x 314 drivers/md/persistent-data/dm-block-manager.c #define bl_up_write(x) do { } while (0) x 315 drivers/md/persistent-data/dm-block-manager.c #define report_recursive_bug(x, y) do { } while (0) x 19 drivers/md/persistent-data/dm-btree.h # define __dm_written_to_disk(x) __releases(x) x 20 drivers/md/persistent-data/dm-btree.h # define __dm_reads_from_disk(x) __acquires(x) x 21 drivers/md/persistent-data/dm-btree.h # define __dm_bless_for_disk(x) __acquire(x) x 22 drivers/md/persistent-data/dm-btree.h # define __dm_unbless_for_disk(x) __release(x) x 24 drivers/md/persistent-data/dm-btree.h # define __dm_written_to_disk(x) x 25 drivers/md/persistent-data/dm-btree.h # define __dm_reads_from_disk(x) x 26 drivers/md/persistent-data/dm-btree.h # define __dm_bless_for_disk(x) x 27 drivers/md/persistent-data/dm-btree.h # define __dm_unbless_for_disk(x) x 355 drivers/media/common/saa7146/saa7146_hlp.c int x[32], y[32], w[32], h[32]; x 366 drivers/media/common/saa7146/saa7146_hlp.c x[i] = vv->ov.clips[i].c.left; x 372 drivers/media/common/saa7146/saa7146_hlp.c x[i] += w[i]; w[i] = -w[i]; x 377 drivers/media/common/saa7146/saa7146_hlp.c if( x[i] < 0) { x 378 drivers/media/common/saa7146/saa7146_hlp.c w[i] += x[i]; x[i] = 0; x 387 drivers/media/common/saa7146/saa7146_hlp.c l = x[i]; x 388 drivers/media/common/saa7146/saa7146_hlp.c r = x[i]+w[i]; x 423 drivers/media/common/saa7146/saa7146_hlp.c if( x[j] < 0) x 424 drivers/media/common/saa7146/saa7146_hlp.c x[j] = 0; x 426 drivers/media/common/saa7146/saa7146_hlp.c if( pixel_list[i] < (x[j] + w[j])) { x 428 drivers/media/common/saa7146/saa7146_hlp.c if ( pixel_list[i] >= x[j] ) { x 1355 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c int x; x 1385 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c for (x = 1; x <= V4L2_XFER_FUNC_SMPTE2084; x++) { x 1396 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c csc(c, x, &r, &g, &b); x 1400 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c xfer_func_names[x], i, x 1587 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned pat_line, unsigned x) x 1613 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return bars[tpg->pattern][((x * 8) / tpg->src_width) % 8]; x 1615 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return bars[1][(pat_line + (x * 8) / tpg->src_width) % 8]; x 1629 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return (((x >> 4) & 1) ^ (pat_line & 1)) ? x 1632 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return ((x & 1) ^ (pat_line & 1)) ? x 1635 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return ((x & 1) ^ (pat_line & 1)) ? x 1638 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return (((x >> 1) & 1) ^ (pat_line & 1)) ? x 1641 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return (((x >> 1) & 1) ^ (pat_line & 1)) ? x 1646 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return (x & 1) ? TPG_COLOR_100_WHITE : TPG_COLOR_100_BLACK; x 1648 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (pat_line || (x % tpg->src_width) == tpg->src_width / 2) x 1652 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (pat_line || ((x % tpg->src_width) + 1) / 2 == tpg->src_width / 4) x 1656 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (pat_line || ((x % tpg->src_width) + 10) / 20 == tpg->src_width / 40) x 1660 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return TPG_COLOR_RAMP + ((x % tpg->src_width) * 256) / tpg->src_width; x 1758 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned x; x 1779 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (x = 0; x < tpg->scaled_width * 2; x += 2) { x 1809 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c u8 *pos = tpg->lines[pat][p] + tpg_hdiv(tpg, p, x); x 1828 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (x = 0; x < w; x++, pos1++, pos2++, dest++) x 1840 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (x = 0; x < tpg->scaled_width; x += 2, pos += twopixsize) x 1850 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (x = 0; x < tpg->scaled_width; x += 2, pos += twopixsize) x 1854 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (x = 0; x < tpg->scaled_width * 2; x += 2) { x 1859 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c u8 *pos = tpg->random_line[p] + x * twopixsize / 2; x 1887 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c (x / hdiv) * sizeof(PIXTYPE)); \ x 1930 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c int y, int x, char *text, unsigned len) x 1937 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c int y, int x, char *text, unsigned len) x 1944 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c int y, int x, char *text, unsigned len) x 1951 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c int y, int x, char *text, unsigned len) x 1957 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c int y, int x, char *text) x 1969 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (y + 16 >= tpg->compose.height || x + 8 >= tpg->compose.width) x 1972 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (len > (tpg->compose.width - x) / 8) x 1973 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c len = (tpg->compose.width - x) / 8; x 1977 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c x = tpg->compose.width - x - 8; x 1979 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c x += tpg->compose.left; x 1989 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_2(tpg, basep, p, first, div, step, y, x, x 1993 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_4(tpg, basep, p, first, div, step, y, x, x 1997 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_6(tpg, basep, p, first, div, step, y, x, x 2001 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_8(tpg, basep, p, first, div, step, y, x, x 53 drivers/media/dvb-core/dvb_demux.c #define dprintk_tscheck(x...) do { \ x 55 drivers/media/dvb-core/dvb_demux.c dprintk(x); \ x 59 drivers/media/dvb-core/dvb_demux.c # define dprintk_sect_loss(x...) dprintk(x) x 61 drivers/media/dvb-core/dvb_demux.c # define dprintk_sect_loss(x...) x 70 drivers/media/dvb-frontends/bcm3510.c #define dprintk(level,x...) if (level & debug) printk(x) x 33 drivers/media/dvb-frontends/cxd2841er.c #define INTLOG10X100(x) ((u32) (((u64) intlog10(x) * 100) >> 24)) x 1735 drivers/media/dvb-frontends/cxd2841er.c static uint32_t sony_log(uint32_t x) x 1737 drivers/media/dvb-frontends/cxd2841er.c return (((10000>>8)*(intlog2(x)>>16) + LOG2_E_100X/2)/LOG2_E_100X); x 1700 drivers/media/dvb-frontends/dib7000p.c unsigned x; x 1770 drivers/media/dvb-frontends/dib7000p.c if (value >= segments[0].x) x 1772 drivers/media/dvb-frontends/dib7000p.c if (value < segments[len-1].x) x 1777 drivers/media/dvb-frontends/dib7000p.c if (value == segments[i].x) x 1779 drivers/media/dvb-frontends/dib7000p.c if (value > segments[i].x) x 1785 drivers/media/dvb-frontends/dib7000p.c dx = segments[i - 1].x - segments[i].x; x 1787 drivers/media/dvb-frontends/dib7000p.c tmp64 = value - segments[i].x; x 3898 drivers/media/dvb-frontends/dib8000.c unsigned x; x 3958 drivers/media/dvb-frontends/dib8000.c if (value >= segments[0].x) x 3960 drivers/media/dvb-frontends/dib8000.c if (value < segments[len-1].x) x 3965 drivers/media/dvb-frontends/dib8000.c if (value == segments[i].x) x 3967 drivers/media/dvb-frontends/dib8000.c if (value > segments[i].x) x 3973 drivers/media/dvb-frontends/dib8000.c dx = segments[i - 1].x - segments[i].x; x 3975 drivers/media/dvb-frontends/dib8000.c tmp64 = value - segments[i].x; x 449 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_16TO8(x) ((u8) (((u16)x) & 0xFF)), \ x 450 drivers/media/dvb-frontends/drx39xyj/drx_driver.h ((u8)((((u16)x)>>8)&0xFF)) x 455 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_U16TODRXFREQ(x) ((x & 0x8000) ? \ x 457 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (((u32) x) | 0xFFFF0000)) : \ x 458 drivers/media/dvb-frontends/drx39xyj/drx_driver.h ((s32) x)) x 1923 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_STANDARD(x) ( \ x 1924 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_DVBT) ? "DVB-T" : \ x 1925 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_8VSB) ? "8VSB" : \ x 1926 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_NTSC) ? "NTSC" : \ x 1927 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_PAL_SECAM_BG) ? "PAL/SECAM B/G" : \ x 1928 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_PAL_SECAM_DK) ? "PAL/SECAM D/K" : \ x 1929 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_PAL_SECAM_I) ? "PAL/SECAM I" : \ x 1930 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_PAL_SECAM_L) ? "PAL/SECAM L" : \ x 1931 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_PAL_SECAM_LP) ? "PAL/SECAM LP" : \ x 1932 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_ITU_A) ? "ITU-A" : \ x 1933 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_ITU_B) ? "ITU-B" : \ x 1934 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_ITU_C) ? "ITU-C" : \ x 1935 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_ITU_D) ? "ITU-D" : \ x 1936 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_FM) ? "FM" : \ x 1937 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_DTMB) ? "DTMB" : \ x 1938 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_AUTO) ? "Auto" : \ x 1939 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_STANDARD_UNKNOWN) ? "Unknown" : \ x 1944 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_BANDWIDTH(x) ( \ x 1945 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_BANDWIDTH_8MHZ) ? "8 MHz" : \ x 1946 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_BANDWIDTH_7MHZ) ? "7 MHz" : \ x 1947 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_BANDWIDTH_6MHZ) ? "6 MHz" : \ x 1948 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_BANDWIDTH_AUTO) ? "Auto" : \ x 1949 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_BANDWIDTH_UNKNOWN) ? "Unknown" : \ x 1951 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_FFTMODE(x) ( \ x 1952 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FFTMODE_2K) ? "2k" : \ x 1953 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FFTMODE_4K) ? "4k" : \ x 1954 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FFTMODE_8K) ? "8k" : \ x 1955 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FFTMODE_AUTO) ? "Auto" : \ x 1956 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FFTMODE_UNKNOWN) ? "Unknown" : \ x 1958 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_GUARD(x) ( \ x 1959 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_GUARD_1DIV32) ? "1/32nd" : \ x 1960 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_GUARD_1DIV16) ? "1/16th" : \ x 1961 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_GUARD_1DIV8) ? "1/8th" : \ x 1962 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_GUARD_1DIV4) ? "1/4th" : \ x 1963 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_GUARD_AUTO) ? "Auto" : \ x 1964 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_GUARD_UNKNOWN) ? "Unknown" : \ x 1966 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_CONSTELLATION(x) ( \ x 1967 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_BPSK) ? "BPSK" : \ x 1968 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QPSK) ? "QPSK" : \ x 1969 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_PSK8) ? "PSK8" : \ x 1970 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QAM16) ? "QAM16" : \ x 1971 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QAM32) ? "QAM32" : \ x 1972 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QAM64) ? "QAM64" : \ x 1973 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QAM128) ? "QAM128" : \ x 1974 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QAM256) ? "QAM256" : \ x 1975 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QAM512) ? "QAM512" : \ x 1976 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QAM1024) ? "QAM1024" : \ x 1977 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_QPSK_NR) ? "QPSK_NR" : \ x 1978 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_AUTO) ? "Auto" : \ x 1979 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CONSTELLATION_UNKNOWN) ? "Unknown" : \ x 1981 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_CODERATE(x) ( \ x 1982 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CODERATE_1DIV2) ? "1/2nd" : \ x 1983 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CODERATE_2DIV3) ? "2/3rd" : \ x 1984 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CODERATE_3DIV4) ? "3/4th" : \ x 1985 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CODERATE_5DIV6) ? "5/6th" : \ x 1986 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CODERATE_7DIV8) ? "7/8th" : \ x 1987 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CODERATE_AUTO) ? "Auto" : \ x 1988 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CODERATE_UNKNOWN) ? "Unknown" : \ x 1990 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_HIERARCHY(x) ( \ x 1991 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_HIERARCHY_NONE) ? "None" : \ x 1992 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_HIERARCHY_ALPHA1) ? "Alpha=1" : \ x 1993 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_HIERARCHY_ALPHA2) ? "Alpha=2" : \ x 1994 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_HIERARCHY_ALPHA4) ? "Alpha=4" : \ x 1995 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_HIERARCHY_AUTO) ? "Auto" : \ x 1996 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_HIERARCHY_UNKNOWN) ? "Unknown" : \ x 1998 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_PRIORITY(x) ( \ x 1999 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_PRIORITY_LOW) ? "Low" : \ x 2000 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_PRIORITY_HIGH) ? "High" : \ x 2001 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_PRIORITY_UNKNOWN) ? "Unknown" : \ x 2003 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_MIRROR(x) ( \ x 2004 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MIRROR_NO) ? "Normal" : \ x 2005 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MIRROR_YES) ? "Mirrored" : \ x 2006 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MIRROR_AUTO) ? "Auto" : \ x 2007 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MIRROR_UNKNOWN) ? "Unknown" : \ x 2009 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_CLASSIFICATION(x) ( \ x 2010 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_GAUSS) ? "Gaussion" : \ x 2011 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_HVY_GAUSS) ? "Heavy Gaussion" : \ x 2012 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_COCHANNEL) ? "Co-channel" : \ x 2013 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_STATIC) ? "Static echo" : \ x 2014 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_MOVING) ? "Moving echo" : \ x 2015 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_ZERODB) ? "Zero dB echo" : \ x 2016 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_UNKNOWN) ? "Unknown" : \ x 2017 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CLASSIFICATION_AUTO) ? "Auto" : \ x 2020 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_INTERLEAVEMODE(x) ( \ x 2021 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J1) ? "I128_J1" : \ x 2022 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J1_V2) ? "I128_J1_V2" : \ x 2023 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J2) ? "I128_J2" : \ x 2024 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I64_J2) ? "I64_J2" : \ x 2025 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J3) ? "I128_J3" : \ x 2026 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I32_J4) ? "I32_J4" : \ x 2027 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J4) ? "I128_J4" : \ x 2028 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I16_J8) ? "I16_J8" : \ x 2029 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J5) ? "I128_J5" : \ x 2030 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I8_J16) ? "I8_J16" : \ x 2031 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J6) ? "I128_J6" : \ x 2032 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_RESERVED_11) ? "Reserved 11" : \ x 2033 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J7) ? "I128_J7" : \ x 2034 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_RESERVED_13) ? "Reserved 13" : \ x 2035 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I128_J8) ? "I128_J8" : \ x 2036 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_RESERVED_15) ? "Reserved 15" : \ x 2037 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I12_J17) ? "I12_J17" : \ x 2038 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_I5_J4) ? "I5_J4" : \ x 2039 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_B52_M240) ? "B52_M240" : \ x 2040 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_B52_M720) ? "B52_M720" : \ x 2041 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_B52_M48) ? "B52_M48" : \ x 2042 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_B52_M0) ? "B52_M0" : \ x 2043 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_UNKNOWN) ? "Unknown" : \ x 2044 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_INTERLEAVEMODE_AUTO) ? "Auto" : \ x 2047 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_LDPC(x) ( \ x 2048 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LDPC_0_4) ? "0.4" : \ x 2049 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LDPC_0_6) ? "0.6" : \ x 2050 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LDPC_0_8) ? "0.8" : \ x 2051 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LDPC_AUTO) ? "Auto" : \ x 2052 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LDPC_UNKNOWN) ? "Unknown" : \ x 2055 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_CARRIER(x) ( \ x 2056 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CARRIER_MULTI) ? "Multi" : \ x 2057 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CARRIER_SINGLE) ? "Single" : \ x 2058 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CARRIER_AUTO) ? "Auto" : \ x 2059 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_CARRIER_UNKNOWN) ? "Unknown" : \ x 2062 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_FRAMEMODE(x) ( \ x 2063 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FRAMEMODE_420) ? "420" : \ x 2064 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FRAMEMODE_595) ? "595" : \ x 2065 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FRAMEMODE_945) ? "945" : \ x 2066 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FRAMEMODE_420_FIXED_PN) ? "420 with fixed PN" : \ x 2067 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FRAMEMODE_945_FIXED_PN) ? "945 with fixed PN" : \ x 2068 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FRAMEMODE_AUTO) ? "Auto" : \ x 2069 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_FRAMEMODE_UNKNOWN) ? "Unknown" : \ x 2072 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_PILOT(x) ( \ x 2073 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_PILOT_ON) ? "On" : \ x 2074 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_PILOT_OFF) ? "Off" : \ x 2075 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_PILOT_AUTO) ? "Auto" : \ x 2076 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_PILOT_UNKNOWN) ? "Unknown" : \ x 2080 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_TPS_FRAME(x) ( \ x 2081 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_TPS_FRAME1) ? "Frame1" : \ x 2082 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_TPS_FRAME2) ? "Frame2" : \ x 2083 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_TPS_FRAME3) ? "Frame3" : \ x 2084 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_TPS_FRAME4) ? "Frame4" : \ x 2085 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_TPS_FRAME_UNKNOWN) ? "Unknown" : \ x 2090 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_LOCKSTATUS(x) ( \ x 2091 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_NEVER_LOCK) ? "Never" : \ x 2092 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_NOT_LOCKED) ? "No" : \ x 2093 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCKED) ? "Locked" : \ x 2094 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_1) ? "Lock state 1" : \ x 2095 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_2) ? "Lock state 2" : \ x 2096 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_3) ? "Lock state 3" : \ x 2097 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_4) ? "Lock state 4" : \ x 2098 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_5) ? "Lock state 5" : \ x 2099 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_6) ? "Lock state 6" : \ x 2100 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_7) ? "Lock state 7" : \ x 2101 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_8) ? "Lock state 8" : \ x 2102 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_LOCK_STATE_9) ? "Lock state 9" : \ x 2106 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_MODULE(x) ( \ x 2107 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_DEVICE) ? "Device" : \ x 2108 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_MICROCODE) ? "Microcode" : \ x 2109 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_DRIVERCORE) ? "CoreDriver" : \ x 2110 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_DEVICEDRIVER) ? "DeviceDriver" : \ x 2111 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_BSP_I2C) ? "BSP I2C" : \ x 2112 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_BSP_TUNER) ? "BSP Tuner" : \ x 2113 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_BSP_HOST) ? "BSP Host" : \ x 2114 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_DAP) ? "Data Access Protocol" : \ x 2115 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_MODULE_UNKNOWN) ? "Unknown" : \ x 2118 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_POWER_MODE(x) ( \ x 2119 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_UP) ? "DRX_POWER_UP " : \ x 2120 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_1) ? "DRX_POWER_MODE_1" : \ x 2121 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_2) ? "DRX_POWER_MODE_2" : \ x 2122 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_3) ? "DRX_POWER_MODE_3" : \ x 2123 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_4) ? "DRX_POWER_MODE_4" : \ x 2124 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_5) ? "DRX_POWER_MODE_5" : \ x 2125 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_6) ? "DRX_POWER_MODE_6" : \ x 2126 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_7) ? "DRX_POWER_MODE_7" : \ x 2127 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_8) ? "DRX_POWER_MODE_8" : \ x 2128 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_9) ? "DRX_POWER_MODE_9" : \ x 2129 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_10) ? "DRX_POWER_MODE_10" : \ x 2130 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_11) ? "DRX_POWER_MODE_11" : \ x 2131 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_12) ? "DRX_POWER_MODE_12" : \ x 2132 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_13) ? "DRX_POWER_MODE_13" : \ x 2133 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_14) ? "DRX_POWER_MODE_14" : \ x 2134 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_15) ? "DRX_POWER_MODE_15" : \ x 2135 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_MODE_16) ? "DRX_POWER_MODE_16" : \ x 2136 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_POWER_DOWN) ? "DRX_POWER_DOWN " : \ x 2139 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_OOB_STANDARD(x) ( \ x 2140 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_OOB_MODE_A) ? "ANSI 55-1 " : \ x 2141 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_OOB_MODE_B_GRADE_A) ? "ANSI 55-2 A" : \ x 2142 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_OOB_MODE_B_GRADE_B) ? "ANSI 55-2 B" : \ x 2145 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_AUD_STANDARD(x) ( \ x 2146 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_BTSC) ? "BTSC" : \ x 2147 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_A2) ? "A2" : \ x 2148 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_EIAJ) ? "EIAJ" : \ x 2149 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_FM_STEREO) ? "FM Stereo" : \ x 2150 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_AUTO) ? "Auto" : \ x 2151 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_M_MONO) ? "M-Standard Mono" : \ x 2152 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_D_K_MONO) ? "D/K Mono FM" : \ x 2153 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_BG_FM) ? "B/G-Dual Carrier FM (A2)" : \ x 2154 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_D_K1) ? "D/K1-Dual Carrier FM" : \ x 2155 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_D_K2) ? "D/K2-Dual Carrier FM" : \ x 2156 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_D_K3) ? "D/K3-Dual Carrier FM" : \ x 2157 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_BG_NICAM_FM) ? "B/G-NICAM-FM" : \ x 2158 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_L_NICAM_AM) ? "L-NICAM-AM" : \ x 2159 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_I_NICAM_FM) ? "I-NICAM-FM" : \ x 2160 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_D_K_NICAM_FM) ? "D/K-NICAM-FM" : \ x 2161 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_STANDARD_UNKNOWN) ? "Unknown" : \ x 2163 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_AUD_STEREO(x) ( \ x 2164 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == true) ? "Stereo" : \ x 2165 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == false) ? "Mono" : \ x 2168 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_AUD_SAP(x) ( \ x 2169 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == true) ? "Present" : \ x 2170 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == false) ? "Not present" : \ x 2173 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_AUD_CARRIER(x) ( \ x 2174 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == true) ? "Present" : \ x 2175 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == false) ? "Not present" : \ x 2178 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_AUD_RDS(x) ( \ x 2179 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == true) ? "Available" : \ x 2180 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == false) ? "Not Available" : \ x 2183 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_AUD_NICAM_STATUS(x) ( \ x 2184 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_NICAM_DETECTED) ? "Detected" : \ x 2185 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_NICAM_NOT_DETECTED) ? "Not detected" : \ x 2186 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == DRX_AUD_NICAM_BAD) ? "Bad" : \ x 2189 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_STR_RDS_VALID(x) ( \ x 2190 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == true) ? "Valid" : \ x 2191 drivers/media/dvb-frontends/drx39xyj/drx_driver.h (x == false) ? "Not Valid" : \ x 2230 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_ISMCVERTYPE(x) ((x) == AUX_VER_RECORD) x 2273 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_SET_PRESET(d, x) \ x 2274 drivers/media/dvb-frontends/drx39xyj/drx_driver.h DRX_ACCESSMACRO_SET((d), (x), DRX_XS_CFG_PRESET, char*) x 2275 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_GET_PRESET(d, x) \ x 2276 drivers/media/dvb-frontends/drx39xyj/drx_driver.h DRX_ACCESSMACRO_GET((d), (x), DRX_XS_CFG_PRESET, char*, "ERROR") x 2278 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_SET_AUD_BTSC_DETECT(d, x) DRX_ACCESSMACRO_SET((d), (x), \ x 2280 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_GET_AUD_BTSC_DETECT(d, x) DRX_ACCESSMACRO_GET((d), (x), \ x 2283 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_SET_QAM_LOCKRANGE(d, x) DRX_ACCESSMACRO_SET((d), (x), \ x 2285 drivers/media/dvb-frontends/drx39xyj/drx_driver.h #define DRX_GET_QAM_LOCKRANGE(d, x) DRX_ACCESSMACRO_GET((d), (x), \ x 487 drivers/media/dvb-frontends/drx39xyj/drxj.c #define DRXJ_16TO8(x) ((u8) (((u16)x) & 0xFF)), \ x 488 drivers/media/dvb-frontends/drx39xyj/drxj.c ((u8)((((u16)x)>>8)&0xFF)) x 494 drivers/media/dvb-frontends/drx39xyj/drxj.c #define DRXJ_8TO16(x) ((u16) (x[0] | (x[1] << 8))) x 1105 drivers/media/dvb-frontends/drx39xyj/drxj.c static u32 log1_times100(u32 x) x 1156 drivers/media/dvb-frontends/drx39xyj/drxj.c if (x == 0) x 1161 drivers/media/dvb-frontends/drx39xyj/drxj.c if ((x & (((u32) (-1)) << (scale + 1))) == 0) { x 1163 drivers/media/dvb-frontends/drx39xyj/drxj.c if (x & (((u32) 1) << scale)) x 1165 drivers/media/dvb-frontends/drx39xyj/drxj.c x <<= 1; x 1169 drivers/media/dvb-frontends/drx39xyj/drxj.c if ((x & (((u32) (-1)) << (scale + 1))) == 0) x 1171 drivers/media/dvb-frontends/drx39xyj/drxj.c x >>= 1; x 1182 drivers/media/dvb-frontends/drx39xyj/drxj.c x &= ((((u32) 1) << scale) - 1); x 1184 drivers/media/dvb-frontends/drx39xyj/drxj.c i = (u8) (x >> (scale - index_width)); x 1186 drivers/media/dvb-frontends/drx39xyj/drxj.c d = x & ((((u32) 1) << (scale - index_width)) - 1); x 4134 drivers/media/dvb-frontends/drx39xyj/drxj.c #define ADDR_AT_SCU_SPACE(x) ((x - 0x82E000) * 2) x 642 drivers/media/dvb-frontends/drx39xyj/drxj.h #define DRXJ_STR_OOB_LOCKSTATUS(x) ( \ x 643 drivers/media/dvb-frontends/drx39xyj/drxj.h (x == DRX_NEVER_LOCK) ? "Never" : \ x 644 drivers/media/dvb-frontends/drx39xyj/drxj.h (x == DRX_NOT_LOCKED) ? "No" : \ x 645 drivers/media/dvb-frontends/drx39xyj/drxj.h (x == DRX_LOCKED) ? "Locked" : \ x 646 drivers/media/dvb-frontends/drx39xyj/drxj.h (x == DRX_LOCK_STATE_1) ? "AGC lock" : \ x 647 drivers/media/dvb-frontends/drx39xyj/drxj.h (x == DRX_LOCK_STATE_2) ? "sync lock" : \ x 17 drivers/media/dvb-frontends/drxd_firm.c #define ADDRESS(x) ((x) & 0xFF), (((x)>>8) & 0xFF), (((x)>>16) & 0xFF), (((x)>>24) & 0xFF) x 18 drivers/media/dvb-frontends/drxd_firm.c #define LENGTH(x) ((x) & 0xFF), (((x)>>8) & 0xFF) x 21 drivers/media/dvb-frontends/drxd_firm.c #define DATA16(x) ((x) & 0xFF), (((x)>>8) & 0xFF) x 124 drivers/media/dvb-frontends/ix2505v.c u32 div_factor, N , A, x; x 148 drivers/media/dvb-frontends/ix2505v.c x = div_factor / psc; x 149 drivers/media/dvb-frontends/ix2505v.c N = x/100; x 150 drivers/media/dvb-frontends/ix2505v.c A = ((x - (N * 100)) * psc) / 100; x 156 drivers/media/dvb-frontends/ix2505v.c deb_info("Frq=%d x=%d N=%d A=%d\n", frequency, x, N, A); x 1473 drivers/media/dvb-frontends/lgdt3306a.c static u32 log10_x1000(u32 x) x 1479 drivers/media/dvb-frontends/lgdt3306a.c if (x <= 0) x 1482 drivers/media/dvb-frontends/lgdt3306a.c if (x == 10) x 1485 drivers/media/dvb-frontends/lgdt3306a.c if (x < 10) { x 1486 drivers/media/dvb-frontends/lgdt3306a.c while (x < 10) { x 1487 drivers/media/dvb-frontends/lgdt3306a.c x = x * 10; x 1491 drivers/media/dvb-frontends/lgdt3306a.c while (x >= 100) { x 1492 drivers/media/dvb-frontends/lgdt3306a.c x = x / 10; x 1498 drivers/media/dvb-frontends/lgdt3306a.c if (x == 10) /* was our input an exact multiple of 10 */ x 1503 drivers/media/dvb-frontends/lgdt3306a.c if (valx_x10[i] >= x) x 1509 drivers/media/dvb-frontends/lgdt3306a.c diff_val = x - valx_x10[i-1]; x 43 drivers/media/dvb-frontends/mb86a16.c #define dprintk(x, y, z, format, arg...) do { \ x 45 drivers/media/dvb-frontends/mb86a16.c if ((x > MB86A16_ERROR) && (x > y)) \ x 47 drivers/media/dvb-frontends/mb86a16.c else if ((x > MB86A16_NOTICE) && (x > y)) \ x 49 drivers/media/dvb-frontends/mb86a16.c else if ((x > MB86A16_INFO) && (x > y)) \ x 51 drivers/media/dvb-frontends/mb86a16.c else if ((x > MB86A16_DEBUG) && (x > y)) \ x 54 drivers/media/dvb-frontends/mb86a16.c if (x > y) \ x 1209 drivers/media/dvb-frontends/mb86a20s.c unsigned x, y; x 1359 drivers/media/dvb-frontends/mb86a20s.c if (value >= segments[0].x) x 1361 drivers/media/dvb-frontends/mb86a20s.c if (value < segments[len-1].x) x 1366 drivers/media/dvb-frontends/mb86a20s.c if (value == segments[i].x) x 1368 drivers/media/dvb-frontends/mb86a20s.c if (value > segments[i].x) x 1374 drivers/media/dvb-frontends/mb86a20s.c dx = segments[i - 1].x - segments[i].x; x 1375 drivers/media/dvb-frontends/mb86a20s.c tmp64 = value - segments[i].x; x 294 drivers/media/dvb-frontends/mn88443x.c u32 cnr = 0, x, y, d; x 299 drivers/media/dvb-frontends/mn88443x.c x = (tmpu << 8) | tmpl; x 306 drivers/media/dvb-frontends/mn88443x.c d = (y << 15) - x * x; x 310 drivers/media/dvb-frontends/mn88443x.c d_3 = div_u64(16 * x * x, d); x 318 drivers/media/dvb-frontends/mn88443x.c tmp = (s64)2 * intlog10(x) - intlog10(abs(d)) - d_3 x 24 drivers/media/dvb-frontends/mt352_priv.h #define msb(x) (((x) >> 8) & 0xff) x 25 drivers/media/dvb-frontends/mt352_priv.h #define lsb(x) ((x) & 0xff) x 385 drivers/media/dvb-frontends/mxl5xx.c u32 x, g, tmp = gold; x 389 drivers/media/dvb-frontends/mxl5xx.c for (g = 0, x = 1; g < tmp; g++) x 390 drivers/media/dvb-frontends/mxl5xx.c x = (((x ^ (x >> 7)) & 1) << 17) | (x >> 1); x 391 drivers/media/dvb-frontends/mxl5xx.c return x; x 149 drivers/media/dvb-frontends/mxl5xx_defs.h #define GET_BYTE(x, n) (((x) >> (8*(n))) & 0xFF) x 60 drivers/media/dvb-frontends/s5h1420.c #define dprintk(x...) do { \ x 62 drivers/media/dvb-frontends/s5h1420.c printk(KERN_DEBUG "S5H1420: " x); \ x 1249 drivers/media/dvb-frontends/stb0899_drv.c static inline void CONVERT32(u32 x, char *str) x 1251 drivers/media/dvb-frontends/stb0899_drv.c *str++ = (x >> 24) & 0xff; x 1252 drivers/media/dvb-frontends/stb0899_drv.c *str++ = (x >> 16) & 0xff; x 1253 drivers/media/dvb-frontends/stb0899_drv.c *str++ = (x >> 8) & 0xff; x 1254 drivers/media/dvb-frontends/stb0899_drv.c *str++ = (x >> 0) & 0xff; x 22 drivers/media/dvb-frontends/stb0899_priv.h #define dprintk(x, y, z, format, arg...) do { \ x 24 drivers/media/dvb-frontends/stb0899_priv.h if ((*x > FE_ERROR) && (*x > y)) \ x 26 drivers/media/dvb-frontends/stb0899_priv.h else if ((*x > FE_NOTICE) && (*x > y)) \ x 28 drivers/media/dvb-frontends/stb0899_priv.h else if ((*x > FE_INFO) && (*x > y)) \ x 30 drivers/media/dvb-frontends/stb0899_priv.h else if ((*x > FE_DEBUG) && (*x > y)) \ x 33 drivers/media/dvb-frontends/stb0899_priv.h if (*x > y) \ x 38 drivers/media/dvb-frontends/stb0899_priv.h #define INRANGE(val, x, y) (((x <= val) && (val <= y)) || \ x 39 drivers/media/dvb-frontends/stb0899_priv.h ((y <= val) && (val <= x)) ? 1 : 0) x 46 drivers/media/dvb-frontends/stb0899_priv.h #define GETBYTE(x, y) (((x) >> (y)) & 0xff) x 50 drivers/media/dvb-frontends/stb0899_priv.h #define LSB(x) ((x & 0xff)) x 30 drivers/media/dvb-frontends/stb6100.c #define dprintk(x, y, z, format, arg...) do { \ x 32 drivers/media/dvb-frontends/stb6100.c if ((x > FE_ERROR) && (x > y)) \ x 34 drivers/media/dvb-frontends/stb6100.c else if ((x > FE_NOTICE) && (x > y)) \ x 36 drivers/media/dvb-frontends/stb6100.c else if ((x > FE_INFO) && (x > y)) \ x 38 drivers/media/dvb-frontends/stb6100.c else if ((x > FE_DEBUG) && (x > y)) \ x 41 drivers/media/dvb-frontends/stb6100.c if (x > y) \ x 61 drivers/media/dvb-frontends/stb6100.h #define INRANGE(val, x, y) (((x <= val) && (val <= y)) || \ x 62 drivers/media/dvb-frontends/stb6100.h ((y <= val) && (val <= x)) ? 1 : 0) x 64 drivers/media/dvb-frontends/stb6100.h #define CHKRANGE(val, x, y) (((val >= x) && (val < y)) ? 1 : 0) x 31 drivers/media/dvb-frontends/stv0297.c #define dprintk(x...) printk(x) x 33 drivers/media/dvb-frontends/stv0297.c #define dprintk(x...) x 15 drivers/media/dvb-frontends/stv0900_reg.h extern s32 shiftx(s32 x, int demod, s32 shift); x 17 drivers/media/dvb-frontends/stv0900_reg.h #define REGx(x) shiftx(x, demod, 0x200) x 18 drivers/media/dvb-frontends/stv0900_reg.h #define FLDx(x) shiftx(x, demod, 0x2000000) x 16 drivers/media/dvb-frontends/stv0900_sw.c s32 shiftx(s32 x, int demod, s32 shift) x 19 drivers/media/dvb-frontends/stv0900_sw.c return x - shift; x 21 drivers/media/dvb-frontends/stv0900_sw.c return x; x 48 drivers/media/dvb-frontends/stv6110x_priv.h #define LSB(x) ((x & 0xff)) x 36 drivers/media/dvb-frontends/tda10021.c #define dprintk(x...) printk(x) x 38 drivers/media/dvb-frontends/tda10021.c #define dprintk(x...) x 48 drivers/media/dvb-frontends/tda10023.c #define dprintk(x...) x 15 drivers/media/dvb-frontends/zl10353_priv.h #define msb(x) (((x) >> 8) & 0xff) x 16 drivers/media/dvb-frontends/zl10353_priv.h #define lsb(x) ((x) & 0xff) x 1863 drivers/media/i2c/adv7604.c #define _BUS(x) [ADV7604_BUS_ORDER_##x] x 2045 drivers/media/i2c/adv7842.c #define _BUS(x) [ADV7842_BUS_ORDER_##x] x 24 drivers/media/i2c/cx25840/cx25840-firmware.c #define FWDEV(x) &((x)->dev) x 143 drivers/media/i2c/cx25840/cx25840-vbi.c int i, x; x 146 drivers/media/i2c/cx25840/cx25840-vbi.c for (x = 0; x <= 23; x++) x 147 drivers/media/i2c/cx25840/cx25840-vbi.c lcr[x] = 0x00; x 176 drivers/media/i2c/cx25840/cx25840-vbi.c for (x = 0; x <= 1; x++) { x 177 drivers/media/i2c/cx25840/cx25840-vbi.c switch (svbi->service_lines[1-x][i]) { x 179 drivers/media/i2c/cx25840/cx25840-vbi.c lcr[i] |= 1 << (4 * x); x 182 drivers/media/i2c/cx25840/cx25840-vbi.c lcr[i] |= 4 << (4 * x); x 185 drivers/media/i2c/cx25840/cx25840-vbi.c lcr[i] |= 6 << (4 * x); x 188 drivers/media/i2c/cx25840/cx25840-vbi.c lcr[i] |= 9 << (4 * x); x 195 drivers/media/i2c/cx25840/cx25840-vbi.c for (x = 1, i = state->vbi_regs_offset + 0x424; x 196 drivers/media/i2c/cx25840/cx25840-vbi.c i <= state->vbi_regs_offset + 0x434; i++, x++) x 197 drivers/media/i2c/cx25840/cx25840-vbi.c cx25840_write(client, i, lcr[6 + x]); x 199 drivers/media/i2c/cx25840/cx25840-vbi.c for (x = 1, i = state->vbi_regs_offset + 0x424; x 200 drivers/media/i2c/cx25840/cx25840-vbi.c i <= state->vbi_regs_offset + 0x430; i++, x++) x 201 drivers/media/i2c/cx25840/cx25840-vbi.c cx25840_write(client, i, lcr[9 + x]); x 53 drivers/media/i2c/mt9t112.c #define ECHECKER(ret, x) \ x 55 drivers/media/i2c/mt9t112.c (ret) = (x); \ x 31 drivers/media/i2c/ov2640.c #define VAL_SET(x, mask, rshift, lshift) \ x 32 drivers/media/i2c/ov2640.c ((((x) >> rshift) & mask) << lshift) x 44 drivers/media/i2c/ov2640.c #define CTRLI_V_DIV_SET(x) VAL_SET(x, 0x3, 0, 3) x 45 drivers/media/i2c/ov2640.c #define CTRLI_H_DIV_SET(x) VAL_SET(x, 0x3, 0, 0) x 47 drivers/media/i2c/ov2640.c #define HSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0) x 49 drivers/media/i2c/ov2640.c #define VSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0) x 51 drivers/media/i2c/ov2640.c #define XOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0) x 53 drivers/media/i2c/ov2640.c #define YOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0) x 55 drivers/media/i2c/ov2640.c #define VHYX_VSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 7) x 56 drivers/media/i2c/ov2640.c #define VHYX_HSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 3) x 57 drivers/media/i2c/ov2640.c #define VHYX_YOFF_SET(x) VAL_SET(x, 0x3, 8, 4) x 58 drivers/media/i2c/ov2640.c #define VHYX_XOFF_SET(x) VAL_SET(x, 0x3, 8, 0) x 61 drivers/media/i2c/ov2640.c #define TEST_HSIZE_SET(x) VAL_SET(x, 0x1, (9+2), 7) x 63 drivers/media/i2c/ov2640.c #define ZMOW_OUTW_SET(x) VAL_SET(x, 0xFF, 2, 0) x 65 drivers/media/i2c/ov2640.c #define ZMOH_OUTH_SET(x) VAL_SET(x, 0xFF, 2, 0) x 67 drivers/media/i2c/ov2640.c #define ZMHH_ZSPEED_SET(x) VAL_SET(x, 0x0F, 0, 4) x 68 drivers/media/i2c/ov2640.c #define ZMHH_OUTH_SET(x) VAL_SET(x, 0x1, (8+2), 2) x 69 drivers/media/i2c/ov2640.c #define ZMHH_OUTW_SET(x) VAL_SET(x, 0x3, (8+2), 0) x 82 drivers/media/i2c/ov2640.c #define SIZEL_HSIZE8_11_SET(x) VAL_SET(x, 0x1, 11, 6) x 83 drivers/media/i2c/ov2640.c #define SIZEL_HSIZE8_SET(x) VAL_SET(x, 0x7, 0, 3) x 84 drivers/media/i2c/ov2640.c #define SIZEL_VSIZE8_SET(x) VAL_SET(x, 0x7, 0, 0) x 86 drivers/media/i2c/ov2640.c #define HSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0) x 88 drivers/media/i2c/ov2640.c #define VSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0) x 177 drivers/media/i2c/ov2640.c #define REG04_AEC_SET(x) VAL_SET(x, 0x3, 0, 0) x 193 drivers/media/i2c/ov2640.c #define CLKRC_DIV_SET(x) (((x) - 1) & 0x1F) /* CLK = XVCLK/(x) */ x 235 drivers/media/i2c/ov2640.c #define VV_HIGH_TH_SET(x) VAL_SET(x, 0xF, 0, 4) x 236 drivers/media/i2c/ov2640.c #define VV_LOW_TH_SET(x) VAL_SET(x, 0xF, 0, 0) x 255 drivers/media/i2c/ov2640.c #define COM25_50HZ_BANDING_AEC_MSBS_SET(x) VAL_SET(x, 0x3, 8, 6) x 256 drivers/media/i2c/ov2640.c #define COM25_60HZ_BANDING_AEC_MSBS_SET(x) VAL_SET(x, 0x3, 8, 4) x 258 drivers/media/i2c/ov2640.c #define BD50_50HZ_BANDING_AEC_LSBS_SET(x) VAL_SET(x, 0xFF, 0, 0) x 260 drivers/media/i2c/ov2640.c #define BD60_60HZ_BANDING_AEC_LSBS_SET(x) VAL_SET(x, 0xFF, 0, 0) x 264 drivers/media/i2c/ov2640.c #define BD50_MAX_AEC_STEP_SET(x) VAL_SET((x - 1), 0x0F, 0, 4) x 265 drivers/media/i2c/ov2640.c #define BD60_MAX_AEC_STEP_SET(x) VAL_SET((x - 1), 0x0F, 0, 0) x 522 drivers/media/i2c/ov2640.c #define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div) \ x 525 drivers/media/i2c/ov2640.c { ZMOW, ZMOW_OUTW_SET(x) }, \ x 527 drivers/media/i2c/ov2640.c { ZMHH, ZMHH_OUTW_SET(x) | ZMHH_OUTH_SET(y) }, \ x 59 drivers/media/i2c/ov5645.c #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK) x 118 drivers/media/i2c/ov6650.c #define SET_SAT(x) (((x) << SAT_SHIFT) & SAT_MASK) x 123 drivers/media/i2c/ov6650.c #define SET_HUE(x) (HUE_EN | ((x) & HUE_MASK)) x 132 drivers/media/i2c/ov6650.c #define GET_CLKRC_DIV(x) (((x) & CLKRC_DIV_MASK) + 1) x 105 drivers/media/i2c/ov9640.h #define OV9640_CLKRC_DIV(x) ((x) & 0x3f) x 107 drivers/media/i2c/ov9640.h #define OV9640_PSHFT_VAL(x) ((x) & 0xff) x 155 drivers/media/i2c/ov9640.h #define OV9640_COM13_YUV_DLY(x) ((x) & 0x07) x 66 drivers/media/i2c/s5k4ecgx.c #define PREG(n, x) ((n) * 0x30 + (x)) x 143 drivers/media/i2c/s5k5baf.c #define PREG(n, x) ((n) * 0x26 + x) x 102 drivers/media/i2c/s5k6aa.c #define PREG(n, x) ((n) * 0x26 + x) x 1053 drivers/media/i2c/saa7115.c int i, x; x 1097 drivers/media/i2c/saa7115.c for (x = 0; x <= 1; x++) { x 1098 drivers/media/i2c/saa7115.c switch (fmt->service_lines[1-x][i]) { x 1100 drivers/media/i2c/saa7115.c lcr[i] |= 0xf << (4 * x); x 1103 drivers/media/i2c/saa7115.c lcr[i] |= 1 << (4 * x); x 1106 drivers/media/i2c/saa7115.c lcr[i] |= 4 << (4 * x); x 1109 drivers/media/i2c/saa7115.c lcr[i] |= 5 << (4 * x); x 1112 drivers/media/i2c/saa7115.c lcr[i] |= 7 << (4 * x); x 146 drivers/media/pci/bt8xx/bttv-input.c #define RC5_START(x) (((x) >> 12) & 0x03) x 147 drivers/media/pci/bt8xx/bttv-input.c #define RC5_TOGGLE(x) (((x) >> 11) & 0x01) x 148 drivers/media/pci/bt8xx/bttv-input.c #define RC5_ADDR(x) (((x) >> 6) & 0x1f) x 149 drivers/media/pci/bt8xx/bttv-input.c #define RC5_INSTR(x) (((x) >> 0) & 0x3f) x 337 drivers/media/pci/bt8xx/bttv.h #define to_bttv_sub_dev(x) container_of((x), struct bttv_sub_device, dev) x 345 drivers/media/pci/bt8xx/bttv.h #define to_bttv_sub_drv(x) container_of((x), struct bttv_sub_driver, drv) x 26 drivers/media/pci/bt8xx/dst_ca.c #define dprintk(x, y, z, format, arg...) do { \ x 28 drivers/media/pci/bt8xx/dst_ca.c if ((x > DST_CA_ERROR) && (x > y)) \ x 30 drivers/media/pci/bt8xx/dst_ca.c else if ((x > DST_CA_NOTICE) && (x > y)) \ x 32 drivers/media/pci/bt8xx/dst_ca.c else if ((x > DST_CA_INFO) && (x > y)) \ x 34 drivers/media/pci/bt8xx/dst_ca.c else if ((x > DST_CA_DEBUG) && (x > y)) \ x 37 drivers/media/pci/bt8xx/dst_ca.c if (x > y) \ x 29 drivers/media/pci/cobalt/cobalt-flash.c r.x[0] = cobalt_bus_read32(map->virt, ADRS(offset)); x 31 drivers/media/pci/cobalt/cobalt-flash.c r.x[0] >>= 16; x 33 drivers/media/pci/cobalt/cobalt-flash.c r.x[0] &= 0x0000ffff; x 41 drivers/media/pci/cobalt/cobalt-flash.c u16 data = (u16)datum.x[0]; x 40 drivers/media/pci/cx18/cx18-alsa.h #define CX18_ALSA_DEBUG(x, type, fmt, args...) \ x 42 drivers/media/pci/cx18/cx18-alsa.h if ((x) & cx18_alsa_debug) \ x 20 drivers/media/pci/cx18/cx18-av-core.c u32 x = cx18_read_reg(cx, reg); x 22 drivers/media/pci/cx18/cx18-av-core.c x = (x & ~(mask << shift)) | ((u32)value << shift); x 23 drivers/media/pci/cx18/cx18-av-core.c cx18_write_reg(cx, x, reg); x 31 drivers/media/pci/cx18/cx18-av-core.c u32 x = cx18_read_reg(cx, reg); x 33 drivers/media/pci/cx18/cx18-av-core.c x = (x & ~((u32)0xff << shift)) | ((u32)value << shift); x 34 drivers/media/pci/cx18/cx18-av-core.c cx18_write_reg_expect(cx, x, reg, x 60 drivers/media/pci/cx18/cx18-av-core.c u32 x = cx18_read_reg(cx, 0xc40000 + (addr & ~3)); x 63 drivers/media/pci/cx18/cx18-av-core.c return (x >> shift) & 0xff; x 180 drivers/media/pci/cx18/cx18-av-vbi.c int i, x; x 183 drivers/media/pci/cx18/cx18-av-vbi.c for (x = 0; x <= 23; x++) x 184 drivers/media/pci/cx18/cx18-av-vbi.c lcr[x] = 0x00; x 211 drivers/media/pci/cx18/cx18-av-vbi.c for (x = 0; x <= 1; x++) { x 212 drivers/media/pci/cx18/cx18-av-vbi.c switch (svbi->service_lines[1-x][i]) { x 214 drivers/media/pci/cx18/cx18-av-vbi.c lcr[i] |= 1 << (4 * x); x 217 drivers/media/pci/cx18/cx18-av-vbi.c lcr[i] |= 4 << (4 * x); x 220 drivers/media/pci/cx18/cx18-av-vbi.c lcr[i] |= 6 << (4 * x); x 223 drivers/media/pci/cx18/cx18-av-vbi.c lcr[i] |= 9 << (4 * x); x 230 drivers/media/pci/cx18/cx18-av-vbi.c for (x = 1, i = 0x424; i <= 0x434; i++, x++) x 231 drivers/media/pci/cx18/cx18-av-vbi.c cx18_av_write(cx, i, lcr[6 + x]); x 233 drivers/media/pci/cx18/cx18-av-vbi.c for (x = 1, i = 0x424; i <= 0x430; i++, x++) x 234 drivers/media/pci/cx18/cx18-av-vbi.c cx18_av_write(cx, i, lcr[9 + x]); x 159 drivers/media/pci/cx18/cx18-driver.h #define CX18_DEBUG(x, type, fmt, args...) \ x 161 drivers/media/pci/cx18/cx18-driver.h if ((x) & cx18_debug) \ x 173 drivers/media/pci/cx18/cx18-driver.h #define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \ x 175 drivers/media/pci/cx18/cx18-driver.h if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \ x 193 drivers/media/pci/cx18/cx18-driver.h #define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \ x 195 drivers/media/pci/cx18/cx18-driver.h if ((x) & cx18_debug) \ x 215 drivers/media/pci/cx18/cx18-driver.h #define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \ x 217 drivers/media/pci/cx18/cx18-driver.h if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \ x 32 drivers/media/pci/cx18/cx18-mailbox.c #define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x } x 258 drivers/media/pci/cx23885/cx23885-417.c #define MC417_SPD_CTL(x) (((x) << 4) & 0x00000030) x 259 drivers/media/pci/cx23885/cx23885-417.c #define MC417_GPIO_SEL(x) (((x) << 1) & 0x00000006) x 70 drivers/media/pci/cx88/cx88-dsp.c static s32 int_cos(u32 x) x 74 drivers/media/pci/cx88/cx88-dsp.c u16 period = x / INT_PI; x 77 drivers/media/pci/cx88/cx88-dsp.c return -int_cos(x - INT_PI); x 78 drivers/media/pci/cx88/cx88-dsp.c x = x % INT_PI; x 79 drivers/media/pci/cx88/cx88-dsp.c if (x > INT_PI / 2) x 80 drivers/media/pci/cx88/cx88-dsp.c return -int_cos(INT_PI / 2 - (x % (INT_PI / 2))); x 85 drivers/media/pci/cx88/cx88-dsp.c t2 = x * x / 32768 / 2; x 86 drivers/media/pci/cx88/cx88-dsp.c t4 = t2 * x / 32768 * x / 32768 / 3 / 4; x 87 drivers/media/pci/cx88/cx88-dsp.c t6 = t4 * x / 32768 * x / 32768 / 5 / 6; x 88 drivers/media/pci/cx88/cx88-dsp.c t8 = t6 * x / 32768 * x / 32768 / 7 / 8; x 93 drivers/media/pci/cx88/cx88-dsp.c static u32 int_goertzel(s16 x[], u32 N, u32 freq) x 108 drivers/media/pci/cx88/cx88-dsp.c s32 s = x[i] + ((s64)coeff * s_prev / 32768) - s_prev2; x 127 drivers/media/pci/cx88/cx88-dsp.c static u32 freq_magnitude(s16 x[], u32 N, u32 freq) x 129 drivers/media/pci/cx88/cx88-dsp.c u32 sum = int_goertzel(x, N, freq); x 134 drivers/media/pci/cx88/cx88-dsp.c static u32 noise_magnitude(s16 x[], u32 N, u32 freq_start, u32 freq_end) x 143 drivers/media/pci/cx88/cx88-dsp.c x += (N - 192); x 150 drivers/media/pci/cx88/cx88-dsp.c sum += int_goertzel(x, N, freq_start); x 157 drivers/media/pci/cx88/cx88-dsp.c static s32 detect_a2_a2m_eiaj(struct cx88_core *core, s16 x[], u32 N) x 186 drivers/media/pci/cx88/cx88-dsp.c carrier = freq_magnitude(x, N, carrier_freq); x 187 drivers/media/pci/cx88/cx88-dsp.c stereo = freq_magnitude(x, N, stereo_freq); x 188 drivers/media/pci/cx88/cx88-dsp.c dual = freq_magnitude(x, N, dual_freq); x 189 drivers/media/pci/cx88/cx88-dsp.c noise = noise_magnitude(x, N, FREQ_NOISE_START, FREQ_NOISE_END); x 224 drivers/media/pci/cx88/cx88-dsp.c static s32 detect_btsc(struct cx88_core *core, s16 x[], u32 N) x 226 drivers/media/pci/cx88/cx88-dsp.c s32 sap_ref = freq_magnitude(x, N, FREQ_BTSC_SAP_REF); x 227 drivers/media/pci/cx88/cx88-dsp.c s32 sap = freq_magnitude(x, N, FREQ_BTSC_SAP); x 228 drivers/media/pci/cx88/cx88-dsp.c s32 dual_ref = freq_magnitude(x, N, FREQ_BTSC_DUAL_REF); x 229 drivers/media/pci/cx88/cx88-dsp.c s32 dual = freq_magnitude(x, N, FREQ_BTSC_DUAL); x 41 drivers/media/pci/ivtv/ivtv-alsa.h #define IVTV_ALSA_DEBUG(x, type, fmt, args...) \ x 43 drivers/media/pci/ivtv/ivtv-alsa.h if ((x) & ivtv_alsa_debug) \ x 143 drivers/media/pci/ivtv/ivtv-driver.h #define IVTV_DEBUG(x, type, fmt, args...) \ x 145 drivers/media/pci/ivtv/ivtv-driver.h if ((x) & ivtv_debug) \ x 159 drivers/media/pci/ivtv/ivtv-driver.h #define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \ x 161 drivers/media/pci/ivtv/ivtv-driver.h if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \ x 253 drivers/media/pci/ivtv/ivtv-irq.c int x = 0; x 264 drivers/media/pci/ivtv/ivtv-irq.c if (x == 0 && ivtv_use_dma(s)) { x 293 drivers/media/pci/ivtv/ivtv-irq.c x++; x 36 drivers/media/pci/ivtv/ivtv-mailbox.c #define API_ENTRY(x, f) [x] = { (f), #x } x 114 drivers/media/pci/ivtv/ivtvfb.c #define IVTVFB_DEBUG(x, type, fmt, args...) \ x 116 drivers/media/pci/ivtv/ivtvfb.c if ((x) & ivtvfb_debug) \ x 184 drivers/media/pci/ivtv/ivtvfb.c int x; x 217 drivers/media/pci/ivtv/ivtvfb.c osd->x = data[3]; x 228 drivers/media/pci/ivtv/ivtvfb.c oi->set_osd_coords_x += osd->x; x 234 drivers/media/pci/ivtv/ivtvfb.c osd->lines, osd->x, osd->y); x 570 drivers/media/pci/ivtv/ivtvfb.c ivtv_osd.x = 0; x 204 drivers/media/pci/saa7134/saa7134-reg.h #define SAA7134_GREEN_PATH(x) (0x010 +x) x 205 drivers/media/pci/saa7134/saa7134-reg.h #define SAA7134_BLUE_PATH(x) (0x020 +x) x 206 drivers/media/pci/saa7134/saa7134-reg.h #define SAA7134_RED_PATH(x) (0x030 +x) x 206 drivers/media/pci/solo6x10/solo6x10-disp.c int x, y; x 213 drivers/media/pci/solo6x10/solo6x10-disp.c for (x = 0; x < SOLO_MOTION_SZ; x++) x 214 drivers/media/pci/solo6x10/solo6x10-disp.c buf[x] = cpu_to_le16(thresholds[y * SOLO_MOTION_SZ + x]); x 202 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_MOSAIC_SX(x) ((x)<<24) x 203 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_MOSAIC_EX(x) ((x)<<16) x 204 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_MOSAIC_SY(x) ((x)<<8) x 205 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_MOSAIC_EY(x) ((x)<<0) x 215 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_WIN_SX(x) ((x)<<12) x 216 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_WIN_EX(x) ((x)<<0) x 218 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_WIN_SY(x) ((x)<<12) x 219 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_WIN_EY(x) ((x)<<0) x 740 drivers/media/pci/ttpci/av7110_hw.c static int WriteText(struct av7110 *av7110, u8 win, u16 x, u16 y, char *buf) x 745 drivers/media/pci/ttpci/av7110_hw.c u16 cbuf[5] = { (COMTYPE_OSD << 8) + DText, 3, win, x, y }; x 791 drivers/media/pci/ttpci/av7110_hw.c u16 x, u16 y, u16 dx, u16 dy, u16 color) x 794 drivers/media/pci/ttpci/av7110_hw.c windownr, x, y, dx, dy, color); x 798 drivers/media/pci/ttpci/av7110_hw.c u16 x, u16 y, u16 dx, u16 dy, u16 color) x 801 drivers/media/pci/ttpci/av7110_hw.c windownr, x, y, dx, dy, color); x 809 drivers/media/pci/ttpci/av7110_hw.c static inline int MoveWindowRel(struct av7110 *av7110, u8 windownr, u16 x, u16 y) x 811 drivers/media/pci/ttpci/av7110_hw.c return av7110_fw_cmd(av7110, COMTYPE_OSD, WMoveD, 3, windownr, x, y); x 814 drivers/media/pci/ttpci/av7110_hw.c static inline int MoveWindowAbs(struct av7110 *av7110, u8 windownr, u16 x, u16 y) x 816 drivers/media/pci/ttpci/av7110_hw.c return av7110_fw_cmd(av7110, COMTYPE_OSD, WMoveA, 3, windownr, x, y); x 910 drivers/media/pci/ttpci/av7110_hw.c static int BlitBitmap(struct av7110 *av7110, u16 x, u16 y) x 914 drivers/media/pci/ttpci/av7110_hw.c return av7110_fw_cmd(av7110, COMTYPE_OSD, BlitBmp, 4, av7110->osdwin, x, y, 0); x 32 drivers/media/pci/ttpci/ttpci-eeprom.c #define dprintk(x...) do { printk(x); } while (0) x 34 drivers/media/pci/ttpci/ttpci-eeprom.c #define dprintk(x...) do { } while (0) x 132 drivers/media/pci/tw686x/tw686x-regs.h #define TW686X_FIFO_ERROR(x) (x & ~(0xff)) x 489 drivers/media/platform/am437x/am437x-vpfe.c int x; x 494 drivers/media/platform/am437x/am437x-vpfe.c x = copy_from_user(&raw_params, params, sizeof(raw_params)); x 495 drivers/media/platform/am437x/am437x-vpfe.c if (x) { x 498 drivers/media/platform/am437x/am437x-vpfe.c x); x 204 drivers/media/platform/aspeed-video.c #define to_aspeed_video_buffer(x) \ x 205 drivers/media/platform/aspeed-video.c container_of((x), struct aspeed_video_buffer, vb) x 244 drivers/media/platform/aspeed-video.c #define to_aspeed_video(x) container_of((x), struct aspeed_video, v4l2_dev) x 17 drivers/media/platform/coda/coda_regs.h #define CODA_DOWN_ADDRESS_SET(x) (((x) & 0xffff) << 16) x 18 drivers/media/platform/coda/coda_regs.h #define CODA_DOWN_DATA_SET(x) ((x) & 0xffff) x 58 drivers/media/platform/coda/coda_regs.h #define CODA_REG_BIT_RD_PTR(x) (0x120 + 8 * (x)) x 59 drivers/media/platform/coda/coda_regs.h #define CODA_REG_BIT_WR_PTR(x) (0x124 + 8 * (x)) x 60 drivers/media/platform/coda/coda_regs.h #define CODA_REG_BIT_FRM_DIS_FLG(x) (0x150 + 4 * (x)) x 96 drivers/media/platform/coda/coda_regs.h #define CODA_INDEX_SET(x) ((x) & 0x3) x 444 drivers/media/platform/coda/coda_regs.h #define CODA_FIRMWARE_PRODUCT(x) (((x) >> 16) & 0xffff) x 445 drivers/media/platform/coda/coda_regs.h #define CODA_FIRMWARE_MAJOR(x) (((x) >> 12) & 0x0f) x 446 drivers/media/platform/coda/coda_regs.h #define CODA_FIRMWARE_MINOR(x) (((x) >> 8) & 0x0f) x 447 drivers/media/platform/coda/coda_regs.h #define CODA_FIRMWARE_RELEASE(x) ((x) & 0xff) x 93 drivers/media/platform/exynos-gsc/gsc-core.h #define is_rgb(x) (!!((x) & 0x1)) x 94 drivers/media/platform/exynos-gsc/gsc-core.h #define is_yuv420(x) (!!((x) & 0x2)) x 95 drivers/media/platform/exynos-gsc/gsc-core.h #define is_yuv422(x) (!!((x) & 0x4)) x 67 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_SRCIMG_HEIGHT(x) ((x) << 16) x 68 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_SRCIMG_WIDTH(x) ((x) << 0) x 72 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16) x 73 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_SRCIMG_OFFSET_X(x) ((x) << 0) x 77 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_CROPPED_HEIGHT(x) ((x) << 16) x 78 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_CROPPED_WIDTH(x) ((x) << 0) x 83 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) x 112 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_SCALED_HEIGHT(x) ((x) << 16) x 113 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_SCALED_WIDTH(x) ((x) << 0) x 117 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_PRESC_SHFACTOR(x) ((x) << 28) x 118 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_PRESC_V_RATIO(x) ((x) << 16) x 119 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_PRESC_H_RATIO(x) ((x) << 0) x 123 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_MAIN_H_RATIO_VALUE(x) ((x) << 0) x 127 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_MAIN_V_RATIO_VALUE(x) ((x) << 0) x 131 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_DSTIMG_HEIGHT(x) ((x) << 16) x 132 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_DSTIMG_WIDTH(x) ((x) << 0) x 136 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_DSTIMG_OFFSET_Y(x) ((x) << 16) x 137 drivers/media/platform/exynos-gsc/gsc-regs.h #define GSC_DSTIMG_OFFSET_X(x) ((x) << 0) x 112 drivers/media/platform/exynos4-is/fimc-core.h #define fimc_fmt_is_user_defined(x) (!!((x) & 0x180)) x 113 drivers/media/platform/exynos4-is/fimc-core.h #define fimc_fmt_is_rgb(x) (!!((x) & 0x10)) x 50 drivers/media/platform/exynos4-is/fimc-is-regs.h #define INTSR0_GET_INTSD(x, __n) (((x) >> (__n)) & 0x1) x 52 drivers/media/platform/exynos4-is/fimc-is-regs.h #define INTSR0_GET_INTSC(x, __n) (((x) >> ((__n) + 16)) & 0x1) x 57 drivers/media/platform/exynos4-is/fimc-is-regs.h #define INTMSR0_GET_INTMSD(x, __n) (((x) >> (__n)) & 0x1) x 59 drivers/media/platform/exynos4-is/fimc-is-regs.h #define INTMSR0_GET_INTMSC(x, __n) (((x) >> ((__n) + 16)) & 0x1) x 30 drivers/media/platform/exynos4-is/fimc-lite-reg.h #define FLITE_REG_CIGCTRL_USER(x) ((0x30 + x - 1) << 24) x 123 drivers/media/platform/exynos4-is/fimc-lite-reg.h #define FLITE_REG_CIOSAN(x) (0x200 + (4 * (x))) x 139 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_CISCCTRL_MHRATIO(x) ((x) << 16) x 140 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_CISCCTRL_MVRATIO(x) ((x) << 0) x 143 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_CISCCTRL_MHRATIO_EXT(x) (((x) >> 6) << 16) x 144 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_CISCCTRL_MVRATIO_EXT(x) (((x) >> 6) << 0) x 236 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_MSCTRL_IN_BURST_COUNT(x) ((x) << 24) x 256 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_CIEXTEN_MHRATIO_EXT(x) (((x) & 0x3f) << 10) x 257 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_CIEXTEN_MVRATIO_EXT(x) ((x) & 0x3f) x 275 drivers/media/platform/exynos4-is/fimc-reg.h #define FIMC_REG_CSIIMGFMT_USER(x) (0x30 + x - 1) x 62 drivers/media/platform/exynos4-is/mipi-csis.c #define S5PCSIS_CFG_FMT_USER(x) ((0x30 + x - 1) << 2) x 82 drivers/media/platform/mtk-mdp/mtk_mdp_ipi.h int32_t x; x 82 drivers/media/platform/mtk-mdp/mtk_mdp_regs.c config->x = 0; x 113 drivers/media/platform/mtk-mdp/mtk_mdp_regs.c config->x = 0; x 116 drivers/media/platform/mx2_emmaprp.c #define PRP_CNTL_IN_TSKIP(x) ((x) << 16) x 117 drivers/media/platform/mx2_emmaprp.c #define PRP_CNTL_CH1_TSKIP(x) ((x) << 19) x 118 drivers/media/platform/mx2_emmaprp.c #define PRP_CNTL_CH2_TSKIP(x) ((x) << 22) x 119 drivers/media/platform/mx2_emmaprp.c #define PRP_CNTL_INPUT_FIFO_LEVEL(x) ((x) << 25) x 120 drivers/media/platform/mx2_emmaprp.c #define PRP_CNTL_RZ_FIFO_LEVEL(x) ((x) << 27) x 125 drivers/media/platform/mx2_emmaprp.c #define PRP_SIZE_HEIGHT(x) (x) x 126 drivers/media/platform/mx2_emmaprp.c #define PRP_SIZE_WIDTH(x) ((x) << 16) x 104 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_CTRL(x) ((0x050)+0x30*(x)) x 117 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_CODE(x) ((0x054)+0x30*(x)) x 118 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_STAT_START(x) ((0x058)+0x30*(x)) x 119 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_STAT_SIZE(x) ((0x05C)+0x30*(x)) x 120 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_SOF_ADDR(x) ((0x060)+0x30*(x)) x 121 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_EOF_ADDR(x) ((0x064)+0x30*(x)) x 122 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_DAT_START(x) ((0x068)+0x30*(x)) x 123 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_DAT_SIZE(x) ((0x06C)+0x30*(x)) x 126 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_DAT_PING_ADDR(x) ((0x070)+0x30*(x)) x 127 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_DAT_PONG_ADDR(x) ((0x074)+0x30*(x)) x 128 drivers/media/platform/omap3isp/ispreg.h #define ISPCCP2_LCx_DAT_OFST(x) ((0x078)+0x30*(x)) x 155 drivers/media/platform/pxa_camera.c #define CICR1_DW_VAL(x) ((x) & CICR1_DW) /* Data bus width */ x 156 drivers/media/platform/pxa_camera.c #define CICR1_PPL_VAL(x) (((x) << 15) & CICR1_PPL) /* Pixels per line */ x 157 drivers/media/platform/pxa_camera.c #define CICR1_COLOR_SP_VAL(x) (((x) << 3) & CICR1_COLOR_SP) /* color space */ x 158 drivers/media/platform/pxa_camera.c #define CICR1_RGB_BPP_VAL(x) (((x) << 7) & CICR1_RGB_BPP) /* bpp for rgb */ x 159 drivers/media/platform/pxa_camera.c #define CICR1_RGBT_CONV_VAL(x) (((x) << 29) & CICR1_RGBT_CONV) /* rgbt conv */ x 161 drivers/media/platform/pxa_camera.c #define CICR2_BLW_VAL(x) (((x) << 24) & CICR2_BLW) /* Beginning-of-line pixel clock wait count */ x 162 drivers/media/platform/pxa_camera.c #define CICR2_ELW_VAL(x) (((x) << 16) & CICR2_ELW) /* End-of-line pixel clock wait count */ x 163 drivers/media/platform/pxa_camera.c #define CICR2_HSW_VAL(x) (((x) << 10) & CICR2_HSW) /* Horizontal sync pulse width */ x 164 drivers/media/platform/pxa_camera.c #define CICR2_BFPW_VAL(x) (((x) << 3) & CICR2_BFPW) /* Beginning-of-frame pixel clock wait count */ x 165 drivers/media/platform/pxa_camera.c #define CICR2_FSW_VAL(x) (((x) << 0) & CICR2_FSW) /* Frame stabilization wait count */ x 167 drivers/media/platform/pxa_camera.c #define CICR3_BFW_VAL(x) (((x) << 24) & CICR3_BFW) /* Beginning-of-frame line clock wait count */ x 168 drivers/media/platform/pxa_camera.c #define CICR3_EFW_VAL(x) (((x) << 16) & CICR3_EFW) /* End-of-frame line clock wait count */ x 169 drivers/media/platform/pxa_camera.c #define CICR3_VSW_VAL(x) (((x) << 11) & CICR3_VSW) /* Vertical sync pulse width */ x 170 drivers/media/platform/pxa_camera.c #define CICR3_LPF_VAL(x) (((x) << 0) & CICR3_LPF) /* Lines per frame */ x 81 drivers/media/platform/qcom/camss/camss-vfe-4-1.c #define VFE_0_BUS_CMD_Mx_RLD_CMD(x) BIT(x) x 85 drivers/media/platform/qcom/camss/camss-vfe-4-1.c #define VFE_0_BUS_XBAR_CFG_x(x) (0x58 + 0x4 * ((x) / 2)) x 129 drivers/media/platform/qcom/camss/camss-vfe-4-1.c #define VFE_0_RDI_CFG_x(x) (0x2e8 + (0x4 * (x))) x 203 drivers/media/platform/qcom/camss/camss-vfe-4-1.c #define VFE_0_CGC_OVERRIDE_1_IMAGE_Mx_CGC_OVERRIDE(x) BIT(x) x 86 drivers/media/platform/qcom/camss/camss-vfe-4-7.c #define VFE_0_BUS_CMD_Mx_RLD_CMD(x) BIT(x) x 90 drivers/media/platform/qcom/camss/camss-vfe-4-7.c #define VFE_0_BUS_XBAR_CFG_x(x) (0x90 + 0x4 * ((x) / 2)) x 156 drivers/media/platform/qcom/camss/camss-vfe-4-7.c #define VFE_0_RDI_CFG_x(x) (0x46c + (0x4 * (x))) x 46 drivers/media/platform/rockchip/rga/rga-hw.c rga_get_addr_offset(struct rga_frame *frm, unsigned int x, unsigned int y, x 65 drivers/media/platform/rockchip/rga/rga-hw.c lt->y_off = y * frm->stride + x * pixel_width; x 67 drivers/media/platform/rockchip/rga/rga-hw.c frm->width * frm->height + (y / y_div) * uv_stride + x / x_div; x 74 drivers/media/platform/s3c-camif/camif-core.h #define img_fmt_is_rgb(x) ((x) & 0x10) x 75 drivers/media/platform/s3c-camif/camif-core.h #define img_fmt_is_ycbcr(x) ((x) & 0x60) x 86 drivers/media/platform/s3c-camif/camif-regs.h #define CITRGFMT_TARGETHSIZE(x) ((x) << 16) x 94 drivers/media/platform/s3c-camif/camif-regs.h #define CITRGFMT_TARGETVSIZE(x) ((x) << 0) x 101 drivers/media/platform/s3c-camif/camif-regs.h #define CICTRL_YBURST1(x) ((x) << 19) x 102 drivers/media/platform/s3c-camif/camif-regs.h #define CICTRL_YBURST2(x) ((x) << 14) x 103 drivers/media/platform/s3c-camif/camif-regs.h #define CICTRL_RGBBURST1(x) ((x) << 19) x 104 drivers/media/platform/s3c-camif/camif-regs.h #define CICTRL_RGBBURST2(x) ((x) << 14) x 105 drivers/media/platform/s3c-camif/camif-regs.h #define CICTRL_CBURST1(x) ((x) << 9) x 106 drivers/media/platform/s3c-camif/camif-regs.h #define CICTRL_CBURST2(x) ((x) << 4) x 192 drivers/media/platform/s3c-camif/camif-regs.h #define CIIMGEFF_PAT_CB(x) ((x) << 13) x 193 drivers/media/platform/s3c-camif/camif-regs.h #define CIIMGEFF_PAT_CR(x) (x) x 214 drivers/media/platform/s3c-camif/camif-regs.h #define MSHEIGHT(x) (((x) & 0x3ff) << 16) x 215 drivers/media/platform/s3c-camif/camif-regs.h #define MSWIDTH(x) ((x) & 0x3ff) x 235 drivers/media/platform/s3c-camif/camif-regs.h #define S3C_CISS_OFFS_INITIAL(x) ((x) << 16) x 236 drivers/media/platform/s3c-camif/camif-regs.h #define S3C_CISS_OFFS_LINE(x) ((x) << 0) x 14 drivers/media/platform/s5p-g2d/g2d-hw.c #define w(x, a) writel((x), d->regs + (a)) x 770 drivers/media/platform/s5p-jpeg/jpeg-core.c int c, x, components; x 792 drivers/media/platform/s5p-jpeg/jpeg-core.c x = get_byte(&jpeg_buffer); x 793 drivers/media/platform/s5p-jpeg/jpeg-core.c if (x == -1) x 796 drivers/media/platform/s5p-jpeg/jpeg-core.c (((x >> 4) & 0x1) << 1) | (x & 0x1)); x 865 drivers/media/platform/s5p-jpeg/jpeg-core.c int c, x, components; x 884 drivers/media/platform/s5p-jpeg/jpeg-core.c x = get_byte(&jpeg_buffer); x 885 drivers/media/platform/s5p-jpeg/jpeg-core.c if (x == -1) x 887 drivers/media/platform/s5p-jpeg/jpeg-core.c exynos4_jpeg_select_dec_q_tbl(jpeg->regs, c, x); x 225 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c void exynos3250_jpeg_set_x(void __iomem *regs, unsigned int x) x 229 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c reg = x & EXYNOS3250_JPGX_MASK; x 32 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.h void exynos3250_jpeg_set_x(void __iomem *regs, unsigned int x); x 265 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c void exynos4_jpeg_select_dec_q_tbl(void __iomem *base, char c, char x) x 271 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c reg |= EXYNOS4_Q_TBL_COMP(c, x); x 275 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c void exynos4_jpeg_select_dec_h_tbl(void __iomem *base, char c, char x) x 281 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c reg |= EXYNOS4_HUFF_TBL_COMP(c, x); x 33 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.h void exynos4_jpeg_select_dec_q_tbl(void __iomem *base, char c, char x); x 34 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.h void exynos4_jpeg_select_dec_h_tbl(void __iomem *base, char c, char x); x 148 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c void s5p_jpeg_x(void __iomem *regs, unsigned int x) x 154 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c reg |= (x >> 8) & 0xff; x 159 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c reg |= x & 0xff; x 37 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.h void s5p_jpeg_x(void __iomem *regs, unsigned int x); x 214 drivers/media/platform/s5p-jpeg/jpeg-regs.h #define EXYNOS4_RST_INTERVAL(x) (((x) & 0xffff) \ x 219 drivers/media/platform/s5p-jpeg/jpeg-regs.h #define EXYNOS4_HOR_SCALING(x) (((x) & 0x3) \ x 223 drivers/media/platform/s5p-jpeg/jpeg-regs.h #define EXYNOS4_VER_SCALING(x) (((x) & 0x3) \ x 252 drivers/media/platform/s5p-jpeg/jpeg-regs.h #define EXYNOS4_X_SIZE(x) (((x) & 0xffff) << EXYNOS4_X_SIZE_SHIFT) x 255 drivers/media/platform/s5p-jpeg/jpeg-regs.h #define EXYNOS4_Y_SIZE(x) (((x) & 0xffff) << EXYNOS4_Y_SIZE_SHIFT) x 370 drivers/media/platform/s5p-jpeg/jpeg-regs.h #define EXYNOS4_NF(x) \ x 371 drivers/media/platform/s5p-jpeg/jpeg-regs.h (((x) & EXYNOS4_NF_MASK) << EXYNOS4_NF_SHIFT) x 67 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define ENC_V100_BASE_SIZE(x, y) \ x 68 drivers/media/platform/s5p-mfc/regs-mfc-v10.h (((x + 3) * (y + 3) * 8) \ x 69 drivers/media/platform/s5p-mfc/regs-mfc-v10.h + ((y * 64) + 1280) * DIV_ROUND_UP(x, 8)) x 71 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define ENC_V100_H264_ME_SIZE(x, y) \ x 72 drivers/media/platform/s5p-mfc/regs-mfc-v10.h (ENC_V100_BASE_SIZE(x, y) \ x 73 drivers/media/platform/s5p-mfc/regs-mfc-v10.h + (DIV_ROUND_UP(x * y, 64) * 32)) x 75 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define ENC_V100_MPEG4_ME_SIZE(x, y) \ x 76 drivers/media/platform/s5p-mfc/regs-mfc-v10.h (ENC_V100_BASE_SIZE(x, y) \ x 77 drivers/media/platform/s5p-mfc/regs-mfc-v10.h + (DIV_ROUND_UP(x * y, 128) * 16)) x 79 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define ENC_V100_VP8_ME_SIZE(x, y) \ x 80 drivers/media/platform/s5p-mfc/regs-mfc-v10.h ENC_V100_BASE_SIZE(x, y) x 82 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define ENC_V100_HEVC_ME_SIZE(x, y) \ x 83 drivers/media/platform/s5p-mfc/regs-mfc-v10.h (((x + 3) * (y + 3) * 32) \ x 84 drivers/media/platform/s5p-mfc/regs-mfc-v10.h + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4)) x 1112 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c #define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_MPEG) \ x 1113 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c && V4L2_CTRL_DRIVER_PRIV(x)) x 2610 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c #define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_MPEG) \ x 2611 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c && V4L2_CTRL_DRIVER_PRIV(x)) x 30 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c #define OFFSETA(x) (((x) - dev->dma_base[BANK_L_CTX]) >> MFC_OFFSET_SHIFT) x 31 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c #define OFFSETB(x) (((x) - dev->dma_base[BANK_R_CTX]) >> MFC_OFFSET_SHIFT) x 22 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h #define S5P_MFC_DEC_MV_SIZE_V6(x, y) (MB_WIDTH(x) * \ x 24 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h #define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \ x 29 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h #define s5p_mfc_dec_hevc_mv_size(x, y) \ x 30 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h (DIV_ROUND_UP(x, 64) * DIV_ROUND_UP(y, 64) * 256 + 512) x 133 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_CHANNEL_OFFSET(x) ((x*0x40) + C8SECTPFE_INPUTBLK_OFFSET) x 135 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_IP_FMT_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x00) x 145 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_SYNCLCKDRP_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x04) x 146 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_SYNC(x) (x & 0xf) x 147 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_DROP(x) ((x<<4) & 0xf) x 148 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_TOKEN(x) ((x<<8) & 0xff00) x 151 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_TAGBYTES_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x08) x 152 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_TAG_HEADER(x) (x << 16) x 153 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_TAG_COUNTER(x) ((x<<1) & 0x7fff) x 156 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_PID_SET(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x0C) x 157 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_PID_OFFSET(x) (x & 0x3f) x 158 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_PID_NUMBITS(x) ((x << 6) & 0xfff) x 161 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_PKT_LEN(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x10) x 163 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_BUFF_STRT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x14) x 164 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_BUFF_END(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x18) x 165 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_READ_PNT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x1C) x 166 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_WRT_PNT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x20) x 168 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_PRI_THRLD(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x24) x 169 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_PRI_VALUE(x) (x & 0x7fffff) x 170 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_PRI_LOWPRI(x) ((x & 0xf) << 24) x 171 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_PRI_HIGHPRI(x) ((x & 0xf) << 28) x 173 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_STAT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x28) x 174 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_STAT_FIFO_OVERFLOW(x) (x & 0x1) x 175 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_STAT_BUFFER_OVERFLOW(x) (x & 0x2) x 176 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_STAT_OUTOFORDERRP(x) (x & 0x4) x 177 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_STAT_PID_OVERFLOW(x) (x & 0x8) x 178 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_STAT_PKT_OVERFLOW(x) (x & 0x10) x 179 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_STAT_ERROR_PACKETS(x) ((x >> 8) & 0xf) x 180 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_STAT_SHORT_PACKETS(x) ((x >> 12) & 0xf) x 182 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_MASK(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x2C) x 185 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_MASK_OUTOFORDERRP(x) BIT(2) x 186 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_MASK_PID_OVERFLOW(x) BIT(3) x 187 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_MASK_PKT_OVERFLOW(x) BIT(4) x 188 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_MASK_ERROR_PACKETS(x) ((x & 0xf) << 8) x 189 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_MASK_SHORT_PACKETS(x) ((x & 0xf) >> 12) x 191 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define C8SECTPFE_IB_SYS(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x30) x 213 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define DMA_PRDS_BUSBASE_TP(x) ((0x10*x) + TP0_OFFSET) x 214 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define DMA_PRDS_BUSTOP_TP(x) ((0x10*x) + TP0_OFFSET + 0x4) x 215 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define DMA_PRDS_BUSWP_TP(x) ((0x10*x) + TP0_OFFSET + 0x8) x 216 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h #define DMA_PRDS_BUSRP_TP(x) ((0x10*x) + TP0_OFFSET + 0xc) x 35 drivers/media/platform/tegra-cec/tegra_cec.h #define TEGRA_CEC_HWCTRL_RX_LADDR(x) \ x 36 drivers/media/platform/tegra-cec/tegra_cec.h ((x) & TEGRA_CEC_HWCTRL_RX_LADDR_MASK) x 35 drivers/media/platform/via-camera.c #define machine_is_olpc(x) 0 x 59 drivers/media/platform/vicodec/codec-fwht.c int x, y; x 67 drivers/media/platform/vicodec/codec-fwht.c for (x = 0; x < 8; x++) { x 68 drivers/media/platform/vicodec/codec-fwht.c *wp = in[x + y * 8]; x 165 drivers/media/platform/vicodec/codec-fwht.c int x = pos % 8; x 167 drivers/media/platform/vicodec/codec-fwht.c dwht_out[x + y * 8] = *wp++; x 272 drivers/media/platform/vim2m.c int x, depth = q_data_out->fmt->depth >> 3; x 277 drivers/media/platform/vim2m.c for (x = 0; x < q_data_out->width >> 1; x++) { x 453 drivers/media/platform/vim2m.c unsigned int x, y, y_in, y_out, x_int, x_fract, x_err, x_offset; x 529 drivers/media/platform/vim2m.c for (x = 0; x < width >> 1; x++) { x 103 drivers/media/platform/vivid/vivid-kthread-cap.c unsigned x; x 105 drivers/media/platform/vivid/vivid-kthread-cap.c for (x = 0; x < width; x++, vcapbuf += pixsize, vosdbuf += pixsize) { x 106 drivers/media/platform/vivid/vivid-kthread-cap.c copy_pix(dev, y_offset, x_offset + x, x 118 drivers/media/platform/vivid/vivid-kthread-cap.c unsigned x; x 128 drivers/media/platform/vivid/vivid-kthread-cap.c for (x = 0; x < dstw; x++, dst += twopixsize) { x 602 drivers/media/platform/vivid/vivid-kthread-cap.c int x, y, w, out_x = 0; x 616 drivers/media/platform/vivid/vivid-kthread-cap.c x = dev->overlay_cap_left; x 618 drivers/media/platform/vivid/vivid-kthread-cap.c if (x < 0) { x 619 drivers/media/platform/vivid/vivid-kthread-cap.c out_x = -x; x 621 drivers/media/platform/vivid/vivid-kthread-cap.c x = 0; x 623 drivers/media/platform/vivid/vivid-kthread-cap.c w = dev->fb_cap.fmt.width - x; x 639 drivers/media/platform/vivid/vivid-kthread-cap.c memcpy(vbase + x * pixsize, x 646 drivers/media/platform/vivid/vivid-kthread-cap.c px + out_x, y, px + x)) x 648 drivers/media/platform/vivid/vivid-kthread-cap.c memcpy(vbase + (px + x) * pixsize, x 52 drivers/media/platform/vivid/vivid-osd.c unsigned x, y; x 60 drivers/media/platform/vivid/vivid-osd.c for (x = 0; x < dev->display_width; x++) x 61 drivers/media/platform/vivid/vivid-osd.c d[x] = rgb[(y / 16 + x / 16) % 16]; x 46 drivers/media/radio/radio-miropcm20.c #define RDS_DATA(x) (((x) >> RDS_DATASHIFT) & 1) x 113 drivers/media/radio/radio-sf16fmr2.c #define TC9154A_ATT_MAJ(x) (1 << x) x 114 drivers/media/radio/radio-sf16fmr2.c #define TC9154A_ATT_MIN(x) (1 << (7 + x)) x 87 drivers/media/radio/radio-tea5764.c #define TEA5764_TUNCHK_LEVEL(x) (((x) & 0x00F0) >> 4) x 88 drivers/media/radio/radio-tea5764.c #define TEA5764_TUNCHK_IFCNT(x) (((x) & 0xFE00) >> 9) x 86 drivers/media/radio/radio-typhoon.c unsigned long x; x 99 drivers/media/radio/radio-typhoon.c x = freq / 160; x 100 drivers/media/radio/radio-typhoon.c outval = (x * x + 2500) / 5000; x 101 drivers/media/radio/radio-typhoon.c outval = (outval * x + 5000) / 10000; x 102 drivers/media/radio/radio-typhoon.c outval -= (10 * x * x + 10433) / 20866; x 103 drivers/media/radio/radio-typhoon.c outval += 4 * x - 11505; x 31 drivers/media/radio/radio-wl1273.c #define WL1273_FREQ(x) (x * 10000 / 625) x 32 drivers/media/radio/radio-wl1273.c #define WL1273_INV_FREQ(x) (x * 625 / 10000) x 83 drivers/media/radio/si4713/si4713.c #define msb(x) ((u8)((u16) x >> 8)) x 84 drivers/media/radio/si4713/si4713.c #define lsb(x) ((u8)((u16) x & 0x00FF)) x 1152 drivers/media/rc/imon.c static int x, y, prev_result, hits; x 1161 drivers/media/rc/imon.c x = 0; x 1166 drivers/media/rc/imon.c x += a; x 1171 drivers/media/rc/imon.c if (abs(x) > threshold || abs(y) > threshold) { x 1172 drivers/media/rc/imon.c if (abs(y) > abs(x)) x 1175 drivers/media/rc/imon.c result = (x > 0) ? 0x7F00 : 0x8000; x 1177 drivers/media/rc/imon.c x = 0; x 1192 drivers/media/rc/imon.c x = 17 * threshold / 30; x 1195 drivers/media/rc/imon.c x -= 17 * threshold / 30; x 184 drivers/media/rc/ir-mce_kbd-decoder.c int x, y; x 190 drivers/media/rc/ir-mce_kbd-decoder.c x = -((~xdata & 0x7f) + 1); x 192 drivers/media/rc/ir-mce_kbd-decoder.c x = xdata; x 200 drivers/media/rc/ir-mce_kbd-decoder.c x, y, left ? "L" : "", right ? "R" : ""); x 202 drivers/media/rc/ir-mce_kbd-decoder.c input_report_rel(dev->input_dev, REL_X, x); x 27 drivers/media/rc/mtk-cir.c #define MTK_OK_COUNT(x) (((x) & GENMASK(23, 16)) << 16) x 41 drivers/media/rc/mtk-cir.c #define MTK_DG_CNT(x) ((x) << 8) x 155 drivers/media/rc/rc-core-priv.h static inline bool is_transition(struct ir_raw_event *x, struct ir_raw_event *y) x 157 drivers/media/rc/rc-core-priv.h return x->pulse != y->pulse; x 19 drivers/media/rc/rc-loopback.c #define dprintk(x...) if (debug) printk(KERN_INFO DRIVER_NAME ": " x) x 23 drivers/media/rc/zx-irdec.c #define ZX_DEGL_VALUE(x) (((x) << 20) & ZX_DEGL_MASK) x 25 drivers/media/rc/zx-irdec.c #define ZX_WDBEGIN_VALUE(x) (((x) << 8) & ZX_WDBEGIN_MASK) x 294 drivers/media/usb/cx231xx/cx231xx-417.c #define MC417_SPD_CTL(x) (((x) << 4) & 0x00000030) x 295 drivers/media/usb/cx231xx/cx231xx-417.c #define MC417_GPIO_SEL(x) (((x) << 1) & 0x00000006) x 212 drivers/media/usb/dvb-usb-v2/lmedm04.c #define reg_to_16bits(x) ((x) | ((x) << 8)) x 809 drivers/media/usb/dvb-usb-v2/mxl111sf.c #define DbgAntHunt(x, pwr0, pwr1, pwr2, pwr3) \ x 812 drivers/media/usb/dvb-usb-v2/mxl111sf.c (ANT_PATH_EXTERNAL == x) ? "EXTERNAL" : "INTERNAL", \ x 229 drivers/media/usb/dvb-usb/af9005-fe.c u32 super_frame_count, x, bits; x 284 drivers/media/usb/dvb-usb/af9005-fe.c x = 1512; x 287 drivers/media/usb/dvb-usb/af9005-fe.c x = 6048; x 314 drivers/media/usb/dvb-usb/af9005-fe.c *pre_bit_count = super_frame_count * 68 * 4 * x * bits; x 324 drivers/media/usb/go7007/go7007-driver.c int fw_len, rv = 0, i, x, y; x 339 drivers/media/usb/go7007/go7007-driver.c for (x = 0; x < go->width / 16; x++) { x 340 drivers/media/usb/go7007/go7007-driver.c int idx = y * go->width / 16 + x; x 416 drivers/media/usb/go7007/go7007-driver.c unsigned x, y; x 422 drivers/media/usb/go7007/go7007-driver.c for (x = 0; x < go->width / 16; x++) { x 423 drivers/media/usb/go7007/go7007-driver.c if (!(go->active_map[y * stride + (x >> 3)] & (1 << (x & 7)))) x 425 drivers/media/usb/go7007/go7007-driver.c motion[go->modet_map[y * (go->width / 16) + x]]++; x 479 drivers/media/usb/go7007/go7007-driver.c int x, y, i, stride = ((go->width >> 4) + 7) >> 3; x 483 drivers/media/usb/go7007/go7007-driver.c x = (((go->parse_length - 1) << 3) + i) % (go->width >> 4); x 484 drivers/media/usb/go7007/go7007-driver.c if (stride * y + (x >> 3) < sizeof(go->active_map)) x 485 drivers/media/usb/go7007/go7007-driver.c go->active_map[stride * y + (x >> 3)] |= x 486 drivers/media/usb/go7007/go7007-driver.c (go->modet_word & 1) << (x & 0x7); x 261 drivers/media/usb/go7007/go7007-priv.h #define go7007_write_interrupt(go, x, y) \ x 262 drivers/media/usb/go7007/go7007-priv.h ((go)->hpi_ops->write_interrupt)((go), (x), (y)) x 267 drivers/media/usb/go7007/go7007-priv.h #define go7007_send_firmware(go, x, y) \ x 268 drivers/media/usb/go7007/go7007-priv.h ((go)->hpi_ops->send_firmware)((go), (x), (y)) x 269 drivers/media/usb/go7007/go7007-priv.h #define go7007_write_addr(go, x, y) \ x 270 drivers/media/usb/go7007/go7007-priv.h ((go)->hpi_ops->write_interrupt)((go), (x)|0x8000, (y)) x 213 drivers/media/usb/gspca/cpia1.c #define FIRMWARE_VERSION(x, y) (sd->params.version.firmwareVersion == (x) && \ x 280 drivers/media/usb/gspca/stv06xx/stv06xx_hdcs.c unsigned int x, y; x 306 drivers/media/usb/gspca/stv06xx/stv06xx_hdcs.c x = hdcs->array.left + (hdcs->array.width - width) / 2; x 309 drivers/media/usb/gspca/stv06xx/stv06xx_hdcs.c win[1] = x / 4; x 311 drivers/media/usb/gspca/stv06xx/stv06xx_hdcs.c win[3] = (x + width) / 4 - 1; x 398 drivers/media/usb/gspca/w996Xcf.c int start_cropx, start_cropy, x, y, fw, fh, cw, ch, x 430 drivers/media/usb/gspca/w996Xcf.c #define SC(x) ((x) << 10) x 442 drivers/media/usb/gspca/w996Xcf.c x = (max_width - cw) / 2; x 445 drivers/media/usb/gspca/w996Xcf.c reg_w(sd, 0x10, start_cropx + x); x 447 drivers/media/usb/gspca/w996Xcf.c reg_w(sd, 0x12, start_cropx + x + cw); x 726 drivers/media/usb/gspca/xirlink_cit.c static void cit_send_x_00(struct gspca_dev *gspca_dev, unsigned short x) x 728 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, x, 0x0127); x 732 drivers/media/usb/gspca/xirlink_cit.c static void cit_send_x_00_05(struct gspca_dev *gspca_dev, unsigned short x) x 734 drivers/media/usb/gspca/xirlink_cit.c cit_send_x_00(gspca_dev, x); x 738 drivers/media/usb/gspca/xirlink_cit.c static void cit_send_x_00_05_02(struct gspca_dev *gspca_dev, unsigned short x) x 740 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, x, 0x0127); x 746 drivers/media/usb/gspca/xirlink_cit.c static void cit_send_x_01_00_05(struct gspca_dev *gspca_dev, u16 x) x 748 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, x, 0x0127); x 754 drivers/media/usb/gspca/xirlink_cit.c static void cit_send_x_00_05_02_01(struct gspca_dev *gspca_dev, u16 x) x 756 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, x, 0x0127); x 763 drivers/media/usb/gspca/xirlink_cit.c static void cit_send_x_00_05_02_08_01(struct gspca_dev *gspca_dev, u16 x) x 765 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, x, 0x0127); x 289 drivers/media/usb/msi2500/msi2500.c struct {signed int x:14; } se; /* sign extension */ x 294 drivers/media/usb/msi2500/msi2500.c se.x = *s16src++; x 296 drivers/media/usb/msi2500/msi2500.c utmp = se.x + 8192; x 45 drivers/media/usb/pvrusb2/pvrusb2-hdw-internal.h #define LOCK_TAKE(x) do { mutex_lock(&x##_mutex); x##_held = !0; } while (0) x 46 drivers/media/usb/pvrusb2/pvrusb2-hdw-internal.h #define LOCK_GIVE(x) do { x##_held = 0; mutex_unlock(&x##_mutex); } while (0) x 278 drivers/media/usb/pwc/pwc-dec23.c #define CLAMP(x) (pwc_crop_table[MAX_OUTER_CROP_VALUE+(x)]) x 280 drivers/media/usb/pwc/pwc-dec23.c #define CLAMP(x) ((x)>255?255:((x)<0?0:x)) x 121 drivers/media/usb/pwc/pwc.h #define DEVICE_USE_CODEC1(x) ((x)<675) x 122 drivers/media/usb/pwc/pwc.h #define DEVICE_USE_CODEC2(x) ((x)>=675 && (x)<700) x 123 drivers/media/usb/pwc/pwc.h #define DEVICE_USE_CODEC3(x) ((x)>=700) x 124 drivers/media/usb/pwc/pwc.h #define DEVICE_USE_CODEC23(x) ((x)>=675) x 59 drivers/media/usb/stk1160/stk1160-v4l.c div_round_integer(unsigned int x, unsigned int y) x 62 drivers/media/usb/stk1160/stk1160-v4l.c if (x % y == 0) x 63 drivers/media/usb/stk1160/stk1160-v4l.c return x / y; x 62 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c #define dprintk(x...) do { if (debug) printk(KERN_DEBUG x); } while (0) x 1051 drivers/media/usb/ttusb-dec/ttusb_dec.c u8 x = 1; x 1057 drivers/media/usb/ttusb-dec/ttusb_dec.c memcpy(&b0[4], &x, 1); x 143 drivers/media/usb/usbvision/usbvision-video.c #define YES_NO(x) ((x) ? "Yes" : "No") x 178 drivers/media/usb/usbvision/usbvision.h #define LIMIT_RGB(x) (((x) < 0) ? 0 : (((x) > 255) ? 255 : (x))) x 279 drivers/media/usb/uvc/uvc_driver.c u32 x, y, r; x 291 drivers/media/usb/uvc/uvc_driver.c x = *numerator; x 295 drivers/media/usb/uvc/uvc_driver.c an[n] = x / y; x 302 drivers/media/usb/uvc/uvc_driver.c r = x - an[n] * y; x 303 drivers/media/usb/uvc/uvc_driver.c x = y; x 308 drivers/media/usb/uvc/uvc_driver.c x = 0; x 313 drivers/media/usb/uvc/uvc_driver.c y = an[i-1] * y + x; x 314 drivers/media/usb/uvc/uvc_driver.c x = r; x 318 drivers/media/usb/uvc/uvc_driver.c *denominator = x; x 94 drivers/media/v4l2-core/v4l2-common.c static unsigned int clamp_align(unsigned int x, unsigned int min, x 101 drivers/media/v4l2-core/v4l2-common.c x = clamp(x, (min + ~mask) & mask, max & mask); x 105 drivers/media/v4l2-core/v4l2-common.c x = (x + (1 << (align - 1))) & mask; x 107 drivers/media/v4l2-core/v4l2-common.c return x; x 110 drivers/media/v4l2-core/v4l2-common.c static unsigned int clamp_roundup(unsigned int x, unsigned int min, x 113 drivers/media/v4l2-core/v4l2-common.c x = clamp(x, min, max); x 115 drivers/media/v4l2-core/v4l2-common.c x = round_up(x, alignment); x 117 drivers/media/v4l2-core/v4l2-common.c return x; x 55 drivers/memory/brcmstb_dpfe.c #define DCPU_MSG_RAM(x) (DCPU_MSG_RAM_START + (x) * sizeof(u32)) x 12 drivers/memory/samsung/exynos-srom.h #define EXYNOS_SROMREG(x) (x) x 44 drivers/memory/tegra/mc.c #define MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE(x) (((x) & 0x1ff) << 0) x 32 drivers/memory/ti-aemif.c #define TA(x) ((x) << TA_SHIFT) x 33 drivers/memory/ti-aemif.c #define RHOLD(x) ((x) << RHOLD_SHIFT) x 34 drivers/memory/ti-aemif.c #define RSTROBE(x) ((x) << RSTROBE_SHIFT) x 35 drivers/memory/ti-aemif.c #define RSETUP(x) ((x) << RSETUP_SHIFT) x 36 drivers/memory/ti-aemif.c #define WHOLD(x) ((x) << WHOLD_SHIFT) x 37 drivers/memory/ti-aemif.c #define WSTROBE(x) ((x) << WSTROBE_SHIFT) x 38 drivers/memory/ti-aemif.c #define WSETUP(x) ((x) << WSETUP_SHIFT) x 39 drivers/memory/ti-aemif.c #define EW(x) ((x) << EW_SHIFT) x 40 drivers/memory/ti-aemif.c #define SS(x) ((x) << SS_SHIFT) x 54 drivers/memory/ti-aemif.c #define TA_VAL(x) (((x) & TA(TA_MAX)) >> TA_SHIFT) x 55 drivers/memory/ti-aemif.c #define RHOLD_VAL(x) (((x) & RHOLD(RHOLD_MAX)) >> RHOLD_SHIFT) x 56 drivers/memory/ti-aemif.c #define RSTROBE_VAL(x) (((x) & RSTROBE(RSTROBE_MAX)) >> RSTROBE_SHIFT) x 57 drivers/memory/ti-aemif.c #define RSETUP_VAL(x) (((x) & RSETUP(RSETUP_MAX)) >> RSETUP_SHIFT) x 58 drivers/memory/ti-aemif.c #define WHOLD_VAL(x) (((x) & WHOLD(WHOLD_MAX)) >> WHOLD_SHIFT) x 59 drivers/memory/ti-aemif.c #define WSTROBE_VAL(x) (((x) & WSTROBE(WSTROBE_MAX)) >> WSTROBE_SHIFT) x 60 drivers/memory/ti-aemif.c #define WSETUP_VAL(x) (((x) & WSETUP(WSETUP_MAX)) >> WSETUP_SHIFT) x 61 drivers/memory/ti-aemif.c #define EW_VAL(x) (((x) & EW(EW_MAX)) >> EW_SHIFT) x 62 drivers/memory/ti-aemif.c #define SS_VAL(x) (((x) & SS(SS_MAX)) >> SS_SHIFT) x 252 drivers/message/fusion/lsi/mpi.h #define MPI_GET_CONTEXT_REPLY_TYPE(x) (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \ x 255 drivers/message/fusion/lsi/mpi.h #define MPI_SET_CONTEXT_REPLY_TYPE(x, typ) \ x 256 drivers/message/fusion/lsi/mpi.h ((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) | \ x 598 drivers/message/fusion/lsi/mpi.h #define MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT) x 167 drivers/message/fusion/lsi/mpi_lan.h #define GET_LAN_PACKET_LENGTH(x) (((x) & LAN_REPLY_PACKET_LENGTH_MASK) \ x 170 drivers/message/fusion/lsi/mpi_lan.h #define SET_LAN_PACKET_LENGTH(x, lth) \ x 171 drivers/message/fusion/lsi/mpi_lan.h ((x) = ((x) & ~LAN_REPLY_PACKET_LENGTH_MASK) | \ x 175 drivers/message/fusion/lsi/mpi_lan.h #define GET_LAN_BUCKET_CONTEXT(x) (((x) & LAN_REPLY_BUCKET_CONTEXT_MASK) \ x 178 drivers/message/fusion/lsi/mpi_lan.h #define SET_LAN_BUCKET_CONTEXT(x, ctx) \ x 179 drivers/message/fusion/lsi/mpi_lan.h ((x) = ((x) & ~LAN_REPLY_BUCKET_CONTEXT_MASK) | \ x 183 drivers/message/fusion/lsi/mpi_lan.h #define GET_LAN_BUFFER_CONTEXT(x) (((x) & LAN_REPLY_BUFFER_CONTEXT_MASK) \ x 186 drivers/message/fusion/lsi/mpi_lan.h #define SET_LAN_BUFFER_CONTEXT(x, ctx) \ x 187 drivers/message/fusion/lsi/mpi_lan.h ((x) = ((x) & ~LAN_REPLY_BUFFER_CONTEXT_MASK) | \ x 191 drivers/message/fusion/lsi/mpi_lan.h #define GET_LAN_FORM(x) (((x) & LAN_REPLY_FORM_MASK) \ x 194 drivers/message/fusion/lsi/mpi_lan.h #define SET_LAN_FORM(x, frm) \ x 195 drivers/message/fusion/lsi/mpi_lan.h ((x) = ((x) & ~LAN_REPLY_FORM_MASK) | \ x 584 drivers/message/fusion/lsi/mpi_targ.h #define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \ x 592 drivers/message/fusion/lsi/mpi_targ.h #define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \ x 600 drivers/message/fusion/lsi/mpi_targ.h #define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \ x 607 drivers/message/fusion/lsi/mpi_targ.h #define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \ x 624 drivers/message/fusion/lsi/mpi_targ.h #define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \ x 632 drivers/message/fusion/lsi/mpi_targ.h #define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \ x 640 drivers/message/fusion/lsi/mpi_targ.h #define GET_INITIATOR_INDEX_0100(x) \ x 641 drivers/message/fusion/lsi/mpi_targ.h (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \ x 961 drivers/message/fusion/mptbase.h #define CAST_U32_TO_PTR(x) ((void *)(u64)x) x 962 drivers/message/fusion/mptbase.h #define CAST_PTR_TO_U32(x) ((u32)(u64)x) x 964 drivers/message/fusion/mptbase.h #define CAST_U32_TO_PTR(x) ((void *)x) x 965 drivers/message/fusion/mptbase.h #define CAST_PTR_TO_U32(x) ((u32)x) x 112 drivers/message/fusion/mptlan.h #define dioprintk(x) printk x x 114 drivers/message/fusion/mptlan.h #define dioprintk(x) x 118 drivers/message/fusion/mptlan.h #define dlprintk(x) printk x x 120 drivers/message/fusion/mptlan.h #define dlprintk(x) x 20 drivers/mfd/88pm80x.c #define PM80X_CHIP_ID_NUM(x) (((x) >> 5) & 0x7) x 21 drivers/mfd/88pm80x.c #define PM80X_CHIP_ID_REVISION(x) ((x) & 0x1F) x 30 drivers/mfd/intel_msic.c #define MSIC_IRQ_STATUS(x) (INTEL_MSIC_IRQ_PHYS_BASE + ((x) - 2)) x 273 drivers/mfd/max8998.c #define SAVE_ITEM(x) { .addr = (x), .val = 0x0, } x 77 drivers/mfd/omap-usb-host.c #define is_omap_usbhs_rev1(x) (x->usbhs_rev == OMAP_USBHS_REV1) x 78 drivers/mfd/omap-usb-host.c #define is_omap_usbhs_rev2(x) (x->usbhs_rev == OMAP_USBHS_REV2) x 80 drivers/mfd/omap-usb-host.c #define is_ehci_phy_mode(x) (x == OMAP_EHCI_PORT_MODE_PHY) x 81 drivers/mfd/omap-usb-host.c #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL) x 82 drivers/mfd/omap-usb-host.c #define is_ehci_hsic_mode(x) (x == OMAP_EHCI_PORT_MODE_HSIC) x 93 drivers/mfd/omap-usb-tll.c #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL) x 96 drivers/mfd/omap-usb-tll.c #define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\ x 97 drivers/mfd/omap-usb-tll.c (x) != OMAP_EHCI_PORT_MODE_PHY) x 25 drivers/mfd/si476x-cmd.c #define msb(x) ((u8)((u16) x >> 8)) x 26 drivers/mfd/si476x-cmd.c #define lsb(x) ((u8)((u16) x & 0x00FF)) x 60 drivers/mfd/si476x-cmd.c #define PIN_CFG_BYTE(x) (0x7F & (x)) x 126 drivers/mfd/sm501.c #define fmt_freq(x) ((x) / MHZ), ((x) % MHZ), (x) x 54 drivers/mfd/ucb1x00-ts.c static inline void ucb1x00_ts_evt_add(struct ucb1x00_ts *ts, u16 pressure, u16 x, u16 y) x 58 drivers/mfd/ucb1x00-ts.c input_report_abs(idev, ABS_X, x); x 214 drivers/mfd/ucb1x00-ts.c unsigned int x, y, p; x 222 drivers/mfd/ucb1x00-ts.c x = ucb1x00_ts_read_xpos(ts); x 267 drivers/mfd/ucb1x00-ts.c ucb1x00_ts_evt_add(ts, p, x, y); x 48 drivers/misc/cxl/cxl.h const int x; x 51 drivers/misc/cxl/cxl.h const int x; x 54 drivers/misc/cxl/cxl.h const int x; x 57 drivers/misc/cxl/cxl.h (reg.x) x 316 drivers/misc/genwqe/card_base.c u64 x; x 322 drivers/misc/genwqe/card_base.c x = ilog2(GENWQE_PF_JOBTIMEOUT_MSEC * x 326 drivers/misc/genwqe/card_base.c 0xff00 | (x & 0xff), 0); x 338 drivers/misc/genwqe/card_base.c u64 x; x 350 drivers/misc/genwqe/card_base.c x = ilog2(cd->vf_jobtimeout_msec[vf] * x 354 drivers/misc/genwqe/card_base.c 0xff00 | (x & 0xff), vf + 1); x 20 drivers/misc/ibmasm/lowlevel.h #define GET_MFA_ADDR(x) (x & 0xFFFFFF00) x 22 drivers/misc/ibmasm/lowlevel.h #define MAILBOX_FULL(x) (x & 0x00000001) x 127 drivers/misc/ibmasm/remote.c input->data.mouse.x, input->data.mouse.y, x 148 drivers/misc/ibmasm/remote.c input_report_abs(dev, ABS_X, input->data.mouse.x); x 51 drivers/misc/ibmasm/remote.h unsigned short x; x 364 drivers/misc/ics932s401.c int x; x 367 drivers/misc/ics932s401.c x = 48000; x 369 drivers/misc/ics932s401.c x = BASE_CLOCK; x 373 drivers/misc/ics932s401.c return sprintf(buf, "%d\n", x); x 172 drivers/misc/lis3lv02d/lis3lv02d.c static void lis3lv02d_get_xyz(struct lis3lv02d *lis3, int *x, int *y, int *z) x 199 drivers/misc/lis3lv02d/lis3lv02d.c *x = lis3lv02d_get_axis(lis3->ac.x, position); x 259 drivers/misc/lis3lv02d/lis3lv02d.c s16 x, y, z; x 299 drivers/misc/lis3lv02d/lis3lv02d.c x = lis3->read_data(lis3, OUTX); x 309 drivers/misc/lis3lv02d/lis3lv02d.c results[0] = x - lis3->read_data(lis3, OUTX); x 440 drivers/misc/lis3lv02d/lis3lv02d.c int x, y, z; x 443 drivers/misc/lis3lv02d/lis3lv02d.c lis3lv02d_get_xyz(lis3, &x, &y, &z); x 444 drivers/misc/lis3lv02d/lis3lv02d.c input_report_abs(pidev->input, ABS_X, x); x 715 drivers/misc/lis3lv02d/lis3lv02d.c lis3->mapped_btns[0] = lis3lv02d_get_axis(abs(lis3->ac.x), btns); x 797 drivers/misc/lis3lv02d/lis3lv02d.c int x, y, z; x 801 drivers/misc/lis3lv02d/lis3lv02d.c lis3lv02d_get_xyz(lis3, &x, &y, &z); x 803 drivers/misc/lis3lv02d/lis3lv02d.c return sprintf(buf, "(%d,%d,%d)\n", x, y, z); x 254 drivers/misc/lis3lv02d/lis3lv02d.h int x, y, z; x 126 drivers/misc/lis3lv02d/lis3lv02d_i2c.c lis3lv02d_axis_map.x = pdata->axis_x; x 394 drivers/misc/mic/host/mic_intr.c #define MK_COOKIE(x, y) ((x) | (y) << COOKIE_ID_SHIFT) x 33 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SBOX_SICR0_DBR(x) ((x) & 0xf) x 34 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SBOX_SICR0_DMA(x) (((x) >> 8) & 0xff) x 35 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SBOX_SICE0_DBR(x) ((x) & 0xf) x 36 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SBOX_DBR_BITS(x) ((x) & 0xf) x 37 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SBOX_SICE0_DMA(x) (((x) >> 8) & 0xff) x 38 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SBOX_DMA_BITS(x) (((x) & 0xff) << 8) x 60 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SPAD2_DOWNLOAD_STATUS(x) ((x) & 0x1) x 61 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SPAD2_APIC_ID(x) (((x) >> 1) & 0x1ff) x 62 drivers/misc/mic/host/mic_x100.h #define MIC_X100_SPAD2_DOWNLOAD_ADDR(x) ((x) & 0xfffff000) x 177 drivers/misc/ocxl/file.c #define CMD_STR(x) (x == OCXL_IOCTL_ATTACH ? "ATTACH" : \ x 178 drivers/misc/ocxl/file.c x == OCXL_IOCTL_IRQ_ALLOC ? "IRQ_ALLOC" : \ x 179 drivers/misc/ocxl/file.c x == OCXL_IOCTL_IRQ_FREE ? "IRQ_FREE" : \ x 180 drivers/misc/ocxl/file.c x == OCXL_IOCTL_IRQ_SET_FD ? "IRQ_SET_FD" : \ x 181 drivers/misc/ocxl/file.c x == OCXL_IOCTL_GET_METADATA ? "GET_METADATA" : \ x 182 drivers/misc/ocxl/file.c x == OCXL_IOCTL_ENABLE_P9_WAIT ? "ENABLE_P9_WAIT" : \ x 183 drivers/misc/ocxl/file.c x == OCXL_IOCTL_GET_FEATURES ? "GET_FEATURES" : \ x 270 drivers/misc/sgi-gru/grutables.h #define gru_dbg(dev, fmt, x...) \ x 273 drivers/misc/sgi-gru/grutables.h printk(KERN_DEBUG "GRU:%d %s: " fmt, smp_processor_id(), __func__, x);\ x 276 drivers/misc/sgi-gru/grutables.h #define gru_dbg(x...) x 16 drivers/misc/tifm_7xx1.c #define TIFM_IRQ_SOCKMASK(x) (x) x 17 drivers/misc/tifm_7xx1.c #define TIFM_IRQ_CARDMASK(x) ((x) << 8) x 18 drivers/misc/tifm_7xx1.c #define TIFM_IRQ_FIFOMASK(x) ((x) << 16) x 74 drivers/mmc/core/block.c #define MMC_EXTRACT_INDEX_FROM_ARG(x) ((x & 0x00FF0000) >> 16) x 75 drivers/mmc/core/block.c #define MMC_EXTRACT_VALUE_FROM_ARG(x) ((x & 0x0000FF00) >> 8) x 1986 drivers/mmc/core/core.c unsigned int max_discard, x, y, qty = 0, max_qty, min_qty, timeout; x 2017 drivers/mmc/core/core.c for (x = 1; x && x <= max_qty && max_qty - x >= qty; x <<= 1) { x 2018 drivers/mmc/core/core.c timeout = mmc_erase_timeout(card, arg, qty + x); x 2020 drivers/mmc/core/core.c if (qty + x > min_qty && timeout > max_busy_timeout) x 2026 drivers/mmc/core/core.c y = x; x 242 drivers/mmc/core/sdio_cis.c unsigned char x, fn; x 250 drivers/mmc/core/sdio_cis.c SDIO_FBR_BASE(fn) + SDIO_FBR_CIS + i, 0, &x); x 253 drivers/mmc/core/sdio_cis.c ptr |= x << (i * 8); x 243 drivers/mmc/core/sdio_uart.c #define sdio_uart_set_mctrl(port, x) sdio_uart_update_mctrl(port, x, 0) x 244 drivers/mmc/core/sdio_uart.c #define sdio_uart_clear_mctrl(port, x) sdio_uart_update_mctrl(port, 0, x) x 54 drivers/mmc/host/android-goldfish.c #define GOLDFISH_MMC_WRITE(host, addr, x) (writel(x, host->reg_base + addr)) x 56 drivers/mmc/host/atmel-mci.c #define ATMCI_MR_CLKDIV(x) ((x) << 0) /* Clock Divider */ x 57 drivers/mmc/host/atmel-mci.c #define ATMCI_MR_PWSDIV(x) ((x) << 8) /* Power Saving Divider */ x 63 drivers/mmc/host/atmel-mci.c #define ATMCI_MR_CLKODD(x) ((x) << 16) /* LSB of Clock Divider */ x 65 drivers/mmc/host/atmel-mci.c #define ATMCI_DTOCYC(x) ((x) << 0) /* Data Timeout Cycles */ x 66 drivers/mmc/host/atmel-mci.c #define ATMCI_DTOMUL(x) ((x) << 4) /* Data Timeout Multiplier */ x 77 drivers/mmc/host/atmel-mci.c #define ATMCI_CMDR_CMDNB(x) ((x) << 0) /* Command Opcode */ x 100 drivers/mmc/host/atmel-mci.c #define ATMCI_BCNT(x) ((x) << 0) /* Data Block Count */ x 101 drivers/mmc/host/atmel-mci.c #define ATMCI_BLKLEN(x) ((x) << 16) /* Data Block Length */ x 103 drivers/mmc/host/atmel-mci.c #define ATMCI_CSTOCYC(x) ((x) << 0) /* CST cycles */ x 104 drivers/mmc/host/atmel-mci.c #define ATMCI_CSTOMUL(x) ((x) << 4) /* CST multiplier */ x 146 drivers/mmc/host/atmel-mci.c #define ATMCI_DMA_OFFSET(x) ((x) << 0) /* DMA Write Buffer Offset */ x 147 drivers/mmc/host/atmel-mci.c #define ATMCI_DMA_CHKSIZE(x) ((x) << 4) /* DMA Channel Read and Write Chunk Size */ x 158 drivers/mmc/host/atmel-mci.c #define ATMCI_GET_WP_VS(x) ((x) & 0x0f) x 159 drivers/mmc/host/atmel-mci.c #define ATMCI_GET_WP_VSRC(x) (((x) >> 8) & 0xffff) x 26 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CFG(x) (0x00 + x->reg_off_dma) x 27 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_ADR(x) (0x10 + x->reg_off_dma) x 28 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD(x) (0x18 + x->reg_off_dma) x 29 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG(x) (0x20 + x->reg_off_dma) x 30 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_ADR(x) (0x28 + x->reg_off_dma) x 31 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT(x) (0x30 + x->reg_off_dma) x 32 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT_W1S(x) (0x38 + x->reg_off_dma) x 33 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT_ENA_W1S(x) (0x40 + x->reg_off_dma) x 34 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_INT_ENA_W1C(x) (0x48 + x->reg_off_dma) x 37 drivers/mmc/host/cavium.h #define MIO_EMM_CFG(x) (0x00 + x->reg_off) x 38 drivers/mmc/host/cavium.h #define MIO_EMM_SWITCH(x) (0x48 + x->reg_off) x 39 drivers/mmc/host/cavium.h #define MIO_EMM_DMA(x) (0x50 + x->reg_off) x 40 drivers/mmc/host/cavium.h #define MIO_EMM_CMD(x) (0x58 + x->reg_off) x 41 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS(x) (0x60 + x->reg_off) x 42 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_LO(x) (0x68 + x->reg_off) x 43 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_HI(x) (0x70 + x->reg_off) x 44 drivers/mmc/host/cavium.h #define MIO_EMM_INT(x) (0x78 + x->reg_off) x 45 drivers/mmc/host/cavium.h #define MIO_EMM_INT_EN(x) (0x80 + x->reg_off) x 46 drivers/mmc/host/cavium.h #define MIO_EMM_WDOG(x) (0x88 + x->reg_off) x 47 drivers/mmc/host/cavium.h #define MIO_EMM_SAMPLE(x) (0x90 + x->reg_off) x 48 drivers/mmc/host/cavium.h #define MIO_EMM_STS_MASK(x) (0x98 + x->reg_off) x 49 drivers/mmc/host/cavium.h #define MIO_EMM_RCA(x) (0xa0 + x->reg_off) x 50 drivers/mmc/host/cavium.h #define MIO_EMM_INT_EN_SET(x) (0xb0 + x->reg_off) x 51 drivers/mmc/host/cavium.h #define MIO_EMM_INT_EN_CLR(x) (0xb8 + x->reg_off) x 52 drivers/mmc/host/cavium.h #define MIO_EMM_BUF_IDX(x) (0xe0 + x->reg_off) x 53 drivers/mmc/host/cavium.h #define MIO_EMM_BUF_DAT(x) (0xe8 + x->reg_off) x 149 drivers/mmc/host/cb710-mmc.c u32 e, x; x 164 drivers/mmc/host/cb710-mmc.c x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); x 170 drivers/mmc/host/cb710-mmc.c limit, what, e, x); x 182 drivers/mmc/host/cb710-mmc.c u32 e, x; x 197 drivers/mmc/host/cb710-mmc.c x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); x 203 drivers/mmc/host/cb710-mmc.c limit, mask, e, x); x 98 drivers/mmc/host/cqhci.c #define CQHCI_DUMP(f, x...) \ x 99 drivers/mmc/host/cqhci.c pr_err("%s: " DRV_NAME ": " f, mmc_hostname(mmc), ## x) x 19 drivers/mmc/host/cqhci.h #define CQHCI_VER_MAJOR(x) (((x) & GENMASK(11, 8)) >> 8) x 20 drivers/mmc/host/cqhci.h #define CQHCI_VER_MINOR1(x) (((x) & GENMASK(7, 4)) >> 4) x 21 drivers/mmc/host/cqhci.h #define CQHCI_VER_MINOR2(x) ((x) & GENMASK(3, 0)) x 56 drivers/mmc/host/cqhci.h #define CQHCI_IC_ICCTH(x) (((x) & 0x1F) << 8) x 58 drivers/mmc/host/cqhci.h #define CQHCI_IC_ICTOVAL(x) ((x) & 0x7F) x 97 drivers/mmc/host/cqhci.h #define CQHCI_TERRI_C_INDEX(x) ((x) & GENMASK(5, 0)) x 98 drivers/mmc/host/cqhci.h #define CQHCI_TERRI_C_TASK(x) (((x) & GENMASK(12, 8)) >> 8) x 99 drivers/mmc/host/cqhci.h #define CQHCI_TERRI_C_VALID(x) ((x) & BIT(15)) x 100 drivers/mmc/host/cqhci.h #define CQHCI_TERRI_D_INDEX(x) (((x) & GENMASK(21, 16)) >> 16) x 101 drivers/mmc/host/cqhci.h #define CQHCI_TERRI_D_TASK(x) (((x) & GENMASK(28, 24)) >> 24) x 102 drivers/mmc/host/cqhci.h #define CQHCI_TERRI_D_VALID(x) ((x) & BIT(31)) x 115 drivers/mmc/host/cqhci.h #define CQHCI_VALID(x) (((x) & 1) << 0) x 116 drivers/mmc/host/cqhci.h #define CQHCI_END(x) (((x) & 1) << 1) x 117 drivers/mmc/host/cqhci.h #define CQHCI_INT(x) (((x) & 1) << 2) x 118 drivers/mmc/host/cqhci.h #define CQHCI_ACT(x) (((x) & 0x7) << 3) x 121 drivers/mmc/host/cqhci.h #define CQHCI_FORCED_PROG(x) (((x) & 1) << 6) x 122 drivers/mmc/host/cqhci.h #define CQHCI_CONTEXT(x) (((x) & 0xF) << 7) x 123 drivers/mmc/host/cqhci.h #define CQHCI_DATA_TAG(x) (((x) & 1) << 11) x 124 drivers/mmc/host/cqhci.h #define CQHCI_DATA_DIR(x) (((x) & 1) << 12) x 125 drivers/mmc/host/cqhci.h #define CQHCI_PRIORITY(x) (((x) & 1) << 13) x 126 drivers/mmc/host/cqhci.h #define CQHCI_QBAR(x) (((x) & 1) << 14) x 127 drivers/mmc/host/cqhci.h #define CQHCI_REL_WRITE(x) (((x) & 1) << 15) x 128 drivers/mmc/host/cqhci.h #define CQHCI_BLK_COUNT(x) (((x) & 0xFFFF) << 16) x 129 drivers/mmc/host/cqhci.h #define CQHCI_BLK_ADDR(x) (((x) & 0xFFFFFFFF) << 32) x 132 drivers/mmc/host/cqhci.h #define CQHCI_CMD_INDEX(x) (((x) & 0x3F) << 16) x 133 drivers/mmc/host/cqhci.h #define CQHCI_CMD_TIMING(x) (((x) & 1) << 22) x 134 drivers/mmc/host/cqhci.h #define CQHCI_RESP_TYPE(x) (((x) & 0x3) << 23) x 137 drivers/mmc/host/cqhci.h #define CQHCI_DAT_LENGTH(x) (((x) & 0xFFFF) << 16) x 138 drivers/mmc/host/cqhci.h #define CQHCI_DAT_ADDR_LO(x) (((x) & 0xFFFFFFFF) << 32) x 139 drivers/mmc/host/cqhci.h #define CQHCI_DAT_ADDR_HI(x) (((x) & 0xFFFFFFFF) << 0) x 20 drivers/mmc/host/dw_mmc-exynos.h #define SDMMC_CLKSEL_CCLK_SAMPLE(x) (((x) & 7) << 0) x 21 drivers/mmc/host/dw_mmc-exynos.h #define SDMMC_CLKSEL_CCLK_DRIVE(x) (((x) & 7) << 16) x 22 drivers/mmc/host/dw_mmc-exynos.h #define SDMMC_CLKSEL_CCLK_DIVIDER(x) (((x) & 7) << 24) x 23 drivers/mmc/host/dw_mmc-exynos.h #define SDMMC_CLKSEL_GET_DRV_WD3(x) (((x) >> 16) & 0x7) x 24 drivers/mmc/host/dw_mmc-exynos.h #define SDMMC_CLKSEL_GET_DIV(x) (((x) >> 24) & 0x7) x 25 drivers/mmc/host/dw_mmc-exynos.h #define SDMMC_CLKSEL_UP_SAMPLE(x, y) (((x) & ~SDMMC_CLKSEL_CCLK_SAMPLE(7)) |\ x 27 drivers/mmc/host/dw_mmc-exynos.h #define SDMMC_CLKSEL_TIMING(x, y, z) (SDMMC_CLKSEL_CCLK_SAMPLE(x) | \ x 38 drivers/mmc/host/dw_mmc-exynos.h #define DQS_CTRL_RD_DELAY(x, y) (((x) & ~0x3FF) | ((y) & 0x3FF)) x 39 drivers/mmc/host/dw_mmc-exynos.h #define DQS_CTRL_GET_RD_DELAY(x) ((x) & 0x3FF) x 11 drivers/mmc/host/dw_mmc-zx.h #define PARA_DLL_START(x) ((x) & 0xFF) x 14 drivers/mmc/host/dw_mmc-zx.h #define PARA_DLL_LOCK_NUM(x) (((x) & 7) << 16) x 16 drivers/mmc/host/dw_mmc-zx.h #define PARA_PHASE_DET_SEL(x) (((x) & 7) << 20) x 22 drivers/mmc/host/dw_mmc-zx.h #define READ_DQS_DELAY(x) ((x) & 0x7F) x 25 drivers/mmc/host/dw_mmc-zx.h #define CLK_SAMP_DELAY(x) (((x) & 0x7F) << 8) x 65 drivers/mmc/host/dw_mmc.c #define IDMAC_OWN_CLR64(x) \ x 66 drivers/mmc/host/dw_mmc.c !((x) & cpu_to_le32(IDMAC_DES0_OWN)) x 315 drivers/mmc/host/dw_mmc.h #define SDMMC_DATA(x) (x) x 402 drivers/mmc/host/dw_mmc.h #define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FFF) x 414 drivers/mmc/host/dw_mmc.h #define SDMMC_GET_TRANS_MODE(x) (((x)>>16) & 0x3) x 415 drivers/mmc/host/dw_mmc.h #define SDMMC_GET_SLOT_NUM(x) ((((x)>>1) & 0x1F) + 1) x 416 drivers/mmc/host/dw_mmc.h #define SDMMC_GET_HDATA_WIDTH(x) (((x)>>7) & 0x7) x 417 drivers/mmc/host/dw_mmc.h #define SDMMC_GET_ADDR_CONFIG(x) (((x)>>27) & 0x1) x 433 drivers/mmc/host/dw_mmc.h #define SDMMC_GET_VERID(x) ((x) & 0xFFFF) x 435 drivers/mmc/host/dw_mmc.h #define SDMMC_SET_THLD(v, x) (((v) & 0xFFF) << 16 | (x)) x 66 drivers/mmc/host/mmc_spi.c #define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f) x 81 drivers/mmc/host/mvsdio.h #define MVSD_CMD_INDEX(x) ((x) << 8) x 90 drivers/mmc/host/mvsdio.h #define MVSD_AUTOCMD12_INDEX(x) ((x) << 8) x 124 drivers/mmc/host/mvsdio.h #define MVSD_HOST_CTRL_TMOUT(x) ((x) << 11) x 798 drivers/mmc/host/mxcmmc.c int x; x 800 drivers/mmc/host/mxcmmc.c x = (clk_in / (divider + 1)); x 803 drivers/mmc/host/mxcmmc.c x /= (prescaler * 2); x 805 drivers/mmc/host/mxcmmc.c if (x <= clk_ios) x 110 drivers/mmc/host/omap_hsmmc.c #define DLEV_DAT(x) (1 << (20 + (x))) x 241 drivers/mmc/host/pxamci.c #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE)) x 83 drivers/mmc/host/sdhci-pci-arasan.c #define OTAPDLY(x) (((x) << 1) | OTAPDLY_EN) x 84 drivers/mmc/host/sdhci-pci-arasan.c #define ITAPDLY(x) (((x) << 1) | ITAPDLY_EN) x 85 drivers/mmc/host/sdhci-pci-arasan.c #define FREQSEL(x) (((x) << 5) | DLL_ENBL) x 86 drivers/mmc/host/sdhci-pci-arasan.c #define IOPAD(x, y) ((x) | ((y) << 2)) x 120 drivers/mmc/host/sdhci-pci.h #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) x 88 drivers/mmc/host/sdhci-st.c #define ST_TOP_MMC_DLY_FIX_OFF(x) (x - 0x8) x 38 drivers/mmc/host/sdhci.c #define DBG(f, x...) \ x 39 drivers/mmc/host/sdhci.c pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x) x 41 drivers/mmc/host/sdhci.c #define SDHCI_DUMP(f, x...) \ x 42 drivers/mmc/host/sdhci.c pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x) x 89 drivers/mmc/host/toshsd.h #define SD_CARDOPT_DATA_RESP_TIMEOUT(x) (((x) & 0x0f) << 4) /* 4 bits */ x 41 drivers/mmc/host/wbsd.c #define DBG(x...) \ x 42 drivers/mmc/host/wbsd.c pr_debug(DRIVER_NAME ": " x) x 43 drivers/mmc/host/wbsd.c #define DBGF(f, x...) \ x 44 drivers/mmc/host/wbsd.c pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x) x 882 drivers/mtd/chips/cfi_cmdset_0001.c "suspended: status = 0x%lx\n", map->name, status.x[0]); x 1265 drivers/mtd/chips/cfi_cmdset_0001.c #define XIP_INVAL_CACHED_RANGE(x...) x 1751 drivers/mtd/chips/cfi_cmdset_0001.c printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %lx). Clearing.\n", status.x[0]); x 1770 drivers/mtd/chips/cfi_cmdset_0001.c map->name, Xstatus.x[0], status.x[0]); x 1189 drivers/mtd/chips/cfi_cmdset_0002.c #define XIP_INVAL_CACHED_RANGE(x...) x 1806 drivers/mtd/chips/cfi_cmdset_0002.c datum.x[0]); x 2047 drivers/mtd/chips/cfi_cmdset_0002.c __func__, adr, datum.x[0]); x 2253 drivers/mtd/chips/cfi_cmdset_0002.c __func__, adr, datum.x[0]); x 301 drivers/mtd/chips/cfi_cmdset_0020.c "suspended: status = 0x%lx\n", status.x[0]); x 340 drivers/mtd/chips/cfi_cmdset_0020.c printk(KERN_ERR "waiting for chip to be ready timed out in read. WSM status = %lx\n", status.x[0]); x 475 drivers/mtd/chips/cfi_cmdset_0020.c status.x[0], map_read(map, cmd_adr).x[0]); x 516 drivers/mtd/chips/cfi_cmdset_0020.c printk(KERN_ERR "Chip not ready for buffer write. Xstatus = %lx\n", status.x[0]); x 592 drivers/mtd/chips/cfi_cmdset_0020.c printk("%s: 2 status[%lx]\n", __func__, status.x[0]); x 662 drivers/mtd/chips/cfi_cmdset_0020.c #define ECCBUF_DIV(x) ((x) & ~(ECCBUF_SIZE - 1)) x 663 drivers/mtd/chips/cfi_cmdset_0020.c #define ECCBUF_MOD(x) ((x) & (ECCBUF_SIZE - 1)) x 828 drivers/mtd/chips/cfi_cmdset_0020.c printk(KERN_ERR "waiting for erase to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]); x 850 drivers/mtd/chips/cfi_cmdset_0020.c unsigned char chipstatus = status.x[0]; x 855 drivers/mtd/chips/cfi_cmdset_0020.c chipstatus |= status.x[w] >> (cfi->device_type * 8); x 859 drivers/mtd/chips/cfi_cmdset_0020.c status.x[0], chipstatus); x 1111 drivers/mtd/chips/cfi_cmdset_0020.c printk(KERN_ERR "waiting for lock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]); x 1258 drivers/mtd/chips/cfi_cmdset_0020.c printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]); x 126 drivers/mtd/chips/cfi_util.c val.x[i] = onecmd; x 155 drivers/mtd/chips/cfi_util.c onestat = val.x[0]; x 158 drivers/mtd/chips/cfi_util.c onestat |= val.x[i]; x 1928 drivers/mtd/chips/jedec_probe.c } while ((result.x[0] & mask) == CFI_MFR_CONTINUATION); x 1930 drivers/mtd/chips/jedec_probe.c return result.x[0] & mask; x 1941 drivers/mtd/chips/jedec_probe.c return result.x[0] & mask; x 137 drivers/mtd/devices/lart.c #define DATA_TO_FLASH(x) \ x 139 drivers/mtd/devices/lart.c (((x) & 0x08009000) >> 11) + \ x 140 drivers/mtd/devices/lart.c (((x) & 0x00002000) >> 10) + \ x 141 drivers/mtd/devices/lart.c (((x) & 0x04004000) >> 8) + \ x 142 drivers/mtd/devices/lart.c (((x) & 0x00000010) >> 4) + \ x 143 drivers/mtd/devices/lart.c (((x) & 0x91000820) >> 3) + \ x 144 drivers/mtd/devices/lart.c (((x) & 0x22080080) >> 2) + \ x 145 drivers/mtd/devices/lart.c ((x) & 0x40000400) + \ x 146 drivers/mtd/devices/lart.c (((x) & 0x00040040) << 1) + \ x 147 drivers/mtd/devices/lart.c (((x) & 0x00110000) << 4) + \ x 148 drivers/mtd/devices/lart.c (((x) & 0x00220100) << 5) + \ x 149 drivers/mtd/devices/lart.c (((x) & 0x00800208) << 6) + \ x 150 drivers/mtd/devices/lart.c (((x) & 0x00400004) << 9) + \ x 151 drivers/mtd/devices/lart.c (((x) & 0x00000001) << 12) + \ x 152 drivers/mtd/devices/lart.c (((x) & 0x00000002) << 13) \ x 156 drivers/mtd/devices/lart.c #define FLASH_TO_DATA(x) \ x 158 drivers/mtd/devices/lart.c (((x) & 0x00010012) << 11) + \ x 159 drivers/mtd/devices/lart.c (((x) & 0x00000008) << 10) + \ x 160 drivers/mtd/devices/lart.c (((x) & 0x00040040) << 8) + \ x 161 drivers/mtd/devices/lart.c (((x) & 0x00000001) << 4) + \ x 162 drivers/mtd/devices/lart.c (((x) & 0x12200104) << 3) + \ x 163 drivers/mtd/devices/lart.c (((x) & 0x08820020) << 2) + \ x 164 drivers/mtd/devices/lart.c ((x) & 0x40000400) + \ x 165 drivers/mtd/devices/lart.c (((x) & 0x00080080) >> 1) + \ x 166 drivers/mtd/devices/lart.c (((x) & 0x01100000) >> 4) + \ x 167 drivers/mtd/devices/lart.c (((x) & 0x04402000) >> 5) + \ x 168 drivers/mtd/devices/lart.c (((x) & 0x20008200) >> 6) + \ x 169 drivers/mtd/devices/lart.c (((x) & 0x80000800) >> 9) + \ x 170 drivers/mtd/devices/lart.c (((x) & 0x00001000) >> 12) + \ x 171 drivers/mtd/devices/lart.c (((x) & 0x00004000) >> 13) \ x 213 drivers/mtd/devices/lart.c #define ADDR_TO_FLASH_U2(x) \ x 215 drivers/mtd/devices/lart.c (((x) & 0x00000f00) >> 4) + \ x 216 drivers/mtd/devices/lart.c (((x) & 0x00042000) << 1) + \ x 217 drivers/mtd/devices/lart.c (((x) & 0x0009c003) << 2) + \ x 218 drivers/mtd/devices/lart.c (((x) & 0x00021080) << 3) + \ x 219 drivers/mtd/devices/lart.c (((x) & 0x00000010) << 4) + \ x 220 drivers/mtd/devices/lart.c (((x) & 0x00000040) << 5) + \ x 221 drivers/mtd/devices/lart.c (((x) & 0x00000024) << 7) + \ x 222 drivers/mtd/devices/lart.c (((x) & 0x00000008) << 10) \ x 226 drivers/mtd/devices/lart.c #define FLASH_U2_TO_ADDR(x) \ x 228 drivers/mtd/devices/lart.c (((x) << 4) & 0x00000f00) + \ x 229 drivers/mtd/devices/lart.c (((x) >> 1) & 0x00042000) + \ x 230 drivers/mtd/devices/lart.c (((x) >> 2) & 0x0009c003) + \ x 231 drivers/mtd/devices/lart.c (((x) >> 3) & 0x00021080) + \ x 232 drivers/mtd/devices/lart.c (((x) >> 4) & 0x00000010) + \ x 233 drivers/mtd/devices/lart.c (((x) >> 5) & 0x00000040) + \ x 234 drivers/mtd/devices/lart.c (((x) >> 7) & 0x00000024) + \ x 235 drivers/mtd/devices/lart.c (((x) >> 10) & 0x00000008) \ x 239 drivers/mtd/devices/lart.c #define ADDR_TO_FLASH_U3(x) \ x 241 drivers/mtd/devices/lart.c (((x) & 0x00000080) >> 3) + \ x 242 drivers/mtd/devices/lart.c (((x) & 0x00000040) >> 1) + \ x 243 drivers/mtd/devices/lart.c (((x) & 0x00052020) << 1) + \ x 244 drivers/mtd/devices/lart.c (((x) & 0x00084f03) << 2) + \ x 245 drivers/mtd/devices/lart.c (((x) & 0x00029010) << 3) + \ x 246 drivers/mtd/devices/lart.c (((x) & 0x00000008) << 5) + \ x 247 drivers/mtd/devices/lart.c (((x) & 0x00000004) << 7) \ x 251 drivers/mtd/devices/lart.c #define FLASH_U3_TO_ADDR(x) \ x 253 drivers/mtd/devices/lart.c (((x) << 3) & 0x00000080) + \ x 254 drivers/mtd/devices/lart.c (((x) << 1) & 0x00000040) + \ x 255 drivers/mtd/devices/lart.c (((x) >> 1) & 0x00052020) + \ x 256 drivers/mtd/devices/lart.c (((x) >> 2) & 0x00084f03) + \ x 257 drivers/mtd/devices/lart.c (((x) >> 3) & 0x00029010) + \ x 258 drivers/mtd/devices/lart.c (((x) >> 5) & 0x00000008) + \ x 259 drivers/mtd/devices/lart.c (((x) >> 7) & 0x00000004) \ x 282 drivers/mtd/devices/lart.c static void write32 (__u32 x,__u32 offset) x 285 drivers/mtd/devices/lart.c *data = x; x 465 drivers/mtd/devices/lart.c static inline int write_dword (__u32 offset,__u32 x) x 470 drivers/mtd/devices/lart.c printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, x); x 477 drivers/mtd/devices/lart.c write32 (x,offset); x 491 drivers/mtd/devices/lart.c if ((status & STATUS_PGM_ERR) || read32 (offset) != x) x 39 drivers/mtd/devices/mchp23k256.c #define to_mchp23k256_flash(x) container_of(x, struct mchp23k256_flash, mtd) x 152 drivers/mtd/devices/mtd_dataflash.c struct spi_transfer x = { }; x 170 drivers/mtd/devices/mtd_dataflash.c x.tx_buf = command = priv->command; x 171 drivers/mtd/devices/mtd_dataflash.c x.len = 4; x 172 drivers/mtd/devices/mtd_dataflash.c spi_message_add_tail(&x, &msg); x 233 drivers/mtd/devices/mtd_dataflash.c struct spi_transfer x[2] = { }; x 253 drivers/mtd/devices/mtd_dataflash.c x[0].tx_buf = command; x 254 drivers/mtd/devices/mtd_dataflash.c x[0].len = 8; x 255 drivers/mtd/devices/mtd_dataflash.c spi_message_add_tail(&x[0], &msg); x 257 drivers/mtd/devices/mtd_dataflash.c x[1].rx_buf = buf; x 258 drivers/mtd/devices/mtd_dataflash.c x[1].len = len; x 259 drivers/mtd/devices/mtd_dataflash.c spi_message_add_tail(&x[1], &msg); x 298 drivers/mtd/devices/mtd_dataflash.c struct spi_transfer x[2] = { }; x 311 drivers/mtd/devices/mtd_dataflash.c x[0].tx_buf = command = priv->command; x 312 drivers/mtd/devices/mtd_dataflash.c x[0].len = 4; x 313 drivers/mtd/devices/mtd_dataflash.c spi_message_add_tail(&x[0], &msg); x 373 drivers/mtd/devices/mtd_dataflash.c x[1].tx_buf = writebuf; x 374 drivers/mtd/devices/mtd_dataflash.c x[1].len = writelen; x 375 drivers/mtd/devices/mtd_dataflash.c spi_message_add_tail(x + 1, &msg); x 377 drivers/mtd/devices/mtd_dataflash.c spi_transfer_del(x + 1); x 117 drivers/mtd/devices/pmc551.c #define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f)) x 118 drivers/mtd/devices/pmc551.c #define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12)) x 119 drivers/mtd/devices/pmc551.c #define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8)) x 423 drivers/mtd/devices/spear_smi.c u8 *x = (u8 *)&cmd; x 425 drivers/mtd/devices/spear_smi.c x[0] = flash->erase_cmd; x 426 drivers/mtd/devices/spear_smi.c x[1] = offset >> 16; x 427 drivers/mtd/devices/spear_smi.c x[2] = offset >> 8; x 428 drivers/mtd/devices/spear_smi.c x[3] = offset; x 60 drivers/mtd/devices/sst25l.c #define to_sst25l_flash(x) container_of(x, struct sst25l_flash, mtd) x 76 drivers/mtd/devices/st_spi_fsm.c #define SPI_CFG_MIN_CS_HIGH(x) (((x) & 0xfff) << 4) x 77 drivers/mtd/devices/st_spi_fsm.c #define SPI_CFG_CS_SETUPHOLD(x) (((x) & 0xff) << 16) x 78 drivers/mtd/devices/st_spi_fsm.c #define SPI_CFG_DATA_HOLD(x) (((x) & 0xff) << 24) x 87 drivers/mtd/devices/st_spi_fsm.c #define TRANSFER_SIZE(x) ((x) * 8) x 92 drivers/mtd/devices/st_spi_fsm.c #define ADR_CFG_CYCLES_ADD1(x) ((x) << 0) x 97 drivers/mtd/devices/st_spi_fsm.c #define ADR_CFG_CYCLES_ADD2(x) ((x) << (0+16)) x 106 drivers/mtd/devices/st_spi_fsm.c #define SEQ_OPC_OPCODE(x) ((x) << 0) x 107 drivers/mtd/devices/st_spi_fsm.c #define SEQ_OPC_CYCLES(x) ((x) << 8) x 128 drivers/mtd/devices/st_spi_fsm.c #define MODE_DATA(x) (x & 0xff) x 129 drivers/mtd/devices/st_spi_fsm.c #define MODE_CYCLES(x) ((x & 0x3f) << 16) x 138 drivers/mtd/devices/st_spi_fsm.c #define DUMMY_CYCLES(x) ((x & 0x3f) << 16) x 147 drivers/mtd/devices/st_spi_fsm.c #define STA_DATA_BYTE1(x) ((x & 0xff) << 0) x 148 drivers/mtd/devices/st_spi_fsm.c #define STA_DATA_BYTE2(x) ((x & 0xff) << 8) x 475 drivers/mtd/devices/st_spi_fsm.c #define N25Q_VCR_DUMMY_CYCLES(x) (((x) & 0xf) << 4) x 27 drivers/mtd/hyperbus/hyperbus-core.c read_data.x[0] = ctlr->ops->read16(hbdev, addr); x 38 drivers/mtd/hyperbus/hyperbus-core.c ctlr->ops->write16(hbdev, addr, d.x[0]); x 87 drivers/mtd/lpddr/lpddr2_nvm.c val.x[0] = myword; x 175 drivers/mtd/lpddr/lpddr2_nvm.c add_l.x[0] = cmd_add & 0x0000FFFF; x 176 drivers/mtd/lpddr/lpddr2_nvm.c add_h.x[0] = (cmd_add >> 16) & 0x0000FFFF; x 177 drivers/mtd/lpddr/lpddr2_nvm.c mpr_l.x[0] = cmd_mpr & 0x0000FFFF; x 178 drivers/mtd/lpddr/lpddr2_nvm.c mpr_h.x[0] = (cmd_mpr >> 16) & 0x0000FFFF; x 179 drivers/mtd/lpddr/lpddr2_nvm.c cmd.x[0] = cmd_code & 0x0000FFFF; x 180 drivers/mtd/lpddr/lpddr2_nvm.c exec_cmd.x[0] = 0x0001; x 181 drivers/mtd/lpddr/lpddr2_nvm.c data_l.x[0] = cmd_data & 0x0000FFFF; x 182 drivers/mtd/lpddr/lpddr2_nvm.c data_h.x[0] = (cmd_data >> 16) & 0x0000FFFF; /* only for 2x x16 */ x 204 drivers/mtd/lpddr/lpddr2_nvm.c ow_reg_add(map, PRG_BUFFER_OFS))).x[0]; x 219 drivers/mtd/lpddr/lpddr2_nvm.c status_reg = sr.x[0]; x 223 drivers/mtd/lpddr/lpddr2_nvm.c status_reg += sr.x[0] << 16; x 57 drivers/mtd/maps/dc21285.c val.x[0] = *(uint8_t*)(map->virt + ofs); x 64 drivers/mtd/maps/dc21285.c val.x[0] = *(uint16_t*)(map->virt + ofs); x 71 drivers/mtd/maps/dc21285.c val.x[0] = *(uint32_t*)(map->virt + ofs); x 86 drivers/mtd/maps/dc21285.c *(uint8_t*)(map->virt + adr) = d.x[0]; x 95 drivers/mtd/maps/dc21285.c *(uint16_t*)(map->virt + adr) = d.x[0]; x 102 drivers/mtd/maps/dc21285.c *(uint32_t*)(map->virt + adr) = d.x[0]; x 109 drivers/mtd/maps/dc21285.c d.x[0] = *((uint32_t*)from); x 121 drivers/mtd/maps/dc21285.c d.x[0] = *((uint16_t*)from); x 132 drivers/mtd/maps/dc21285.c d.x[0] = *((uint8_t*)from); x 92 drivers/mtd/maps/ixp4xx.c val.x[0] = flash_read16(map->virt + ofs); x 135 drivers/mtd/maps/ixp4xx.c flash_write16(d.x[0], map->virt + adr); x 143 drivers/mtd/maps/ixp4xx.c flash_write16(d.x[0], map->virt + adr); x 56 drivers/mtd/maps/lantiq-flash.c temp.x[0] = *(u16 *)(map->virt + adr); x 69 drivers/mtd/maps/lantiq-flash.c *(u16 *)(map->virt + adr) = d.x[0]; x 41 drivers/mtd/maps/pci.c val.x[0]= readb(map->base + map->translate(map, ofs)); x 49 drivers/mtd/maps/pci.c val.x[0] = readl(map->base + map->translate(map, ofs)); x 62 drivers/mtd/maps/pci.c writeb(val.x[0], map->base + map->translate(map, ofs)); x 68 drivers/mtd/maps/pci.c writel(val.x[0], map->base + map->translate(map, ofs)); x 117 drivers/mtd/maps/pcmciamtd.c d.x[0] = readb(addr); x 118 drivers/mtd/maps/pcmciamtd.c pr_debug("ofs = 0x%08lx (%p) data = 0x%02lx\n", ofs, addr, d.x[0]); x 132 drivers/mtd/maps/pcmciamtd.c d.x[0] = readw(addr); x 133 drivers/mtd/maps/pcmciamtd.c pr_debug("ofs = 0x%08lx (%p) data = 0x%04lx\n", ofs, addr, d.x[0]); x 171 drivers/mtd/maps/pcmciamtd.c pr_debug("adr = 0x%08lx (%p) data = 0x%02lx\n", adr, addr, d.x[0]); x 172 drivers/mtd/maps/pcmciamtd.c writeb(d.x[0], addr); x 182 drivers/mtd/maps/pcmciamtd.c pr_debug("adr = 0x%08lx (%p) data = 0x%04lx\n", adr, addr, d.x[0]); x 183 drivers/mtd/maps/pcmciamtd.c writew(d.x[0], addr); x 215 drivers/mtd/maps/pcmciamtd.c #define DEV_REMOVED(x) (!(pcmcia_dev_present(((struct pcmciamtd_dev *)map->map_priv_1)->p_dev))) x 225 drivers/mtd/maps/pcmciamtd.c d.x[0] = readb(win_base + ofs); x 227 drivers/mtd/maps/pcmciamtd.c ofs, win_base + ofs, d.x[0]); x 240 drivers/mtd/maps/pcmciamtd.c d.x[0] = readw(win_base + ofs); x 242 drivers/mtd/maps/pcmciamtd.c ofs, win_base + ofs, d.x[0]); x 267 drivers/mtd/maps/pcmciamtd.c adr, win_base + adr, d.x[0]); x 268 drivers/mtd/maps/pcmciamtd.c writeb(d.x[0], win_base + adr); x 280 drivers/mtd/maps/pcmciamtd.c adr, win_base + adr, d.x[0]); x 281 drivers/mtd/maps/pcmciamtd.c writew(d.x[0], win_base + adr); x 154 drivers/mtd/maps/physmap-core.c mw.x[0] = word; x 191 drivers/mtd/maps/physmap-core.c word = mw.x[0]; x 107 drivers/mtd/maps/sbc_gxx.c ret.x[0] = readb(iomapadr + (ofs & WINDOW_MASK)); x 133 drivers/mtd/maps/sbc_gxx.c writeb(d.x[0], iomapadr + (adr & WINDOW_MASK)); x 107 drivers/mtd/maps/sc520cdp.c #define SC520_PAR(x) ((0x88/sizeof(unsigned long)) + (x)) x 21 drivers/mtd/maps/tsunami_flash.c val.x[0] = tsunami_tig_readb(offset); x 27 drivers/mtd/maps/tsunami_flash.c tsunami_tig_writeb(value.x[0], offset); x 115 drivers/mtd/maps/vmu-flash.c int partition, error = 0, x, wait; x 144 drivers/mtd/maps/vmu-flash.c for (x = 0; x < card->readcnt; x++) { x 145 drivers/mtd/maps/vmu-flash.c sendbuf = cpu_to_be32(partition << 24 | x << 16 | num); x 205 drivers/mtd/maps/vmu-flash.c memcpy(buf + (card->blocklen/card->readcnt) * x, blockread, x 208 drivers/mtd/maps/vmu-flash.c memcpy(pcache->buffer + (card->blocklen/card->readcnt) * x, x 232 drivers/mtd/maps/vmu-flash.c int partition, error, locking, x, phaselen, wait; x 247 drivers/mtd/maps/vmu-flash.c for (x = 0; x < card->writecnt; x++) { x 248 drivers/mtd/maps/vmu-flash.c sendbuf[0] = cpu_to_be32(partition << 24 | x << 16 | num); x 249 drivers/mtd/maps/vmu-flash.c memcpy(&sendbuf[1], buf + phaselen * x, phaselen); x 281 drivers/mtd/maps/vmu-flash.c mdev->unit, num, x); x 695 drivers/mtd/maps/vmu-flash.c int x; x 699 drivers/mtd/maps/vmu-flash.c for (x = 0; x < card->partitions; x++) { x 700 drivers/mtd/maps/vmu-flash.c mpart = ((card->mtd)[x]).priv; x 702 drivers/mtd/maps/vmu-flash.c mtd_device_unregister(&((card->mtd)[x])); x 703 drivers/mtd/maps/vmu-flash.c kfree(((card->parts)[x]).name); x 716 drivers/mtd/maps/vmu-flash.c int x; x 720 drivers/mtd/maps/vmu-flash.c for (x = 0; x < card->partitions; x++) { x 721 drivers/mtd/maps/vmu-flash.c mtd = &((card->mtd)[x]); x 46 drivers/mtd/mtdconcat.c #define CONCAT(x) ((struct mtd_concat *)(x)) x 775 drivers/mtd/mtdswap.c unsigned int h, x, y, dist, base; x 795 drivers/mtd/mtdswap.c x = dist - base; x 796 drivers/mtd/mtdswap.c y = (x * h + base / 2) / base; x 1674 drivers/mtd/nand/onenand/onenand_base.c #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) x 70 drivers/mtd/nand/raw/atmel/nand-controller.c #define ATMEL_HSMC_NFC_CFG_SPARESIZE(x) (((x) / 4) << 24) x 79 drivers/mtd/nand/raw/atmel/nand-controller.c #define ATMEL_HSMC_NFC_CFG_PAGESIZE(x) (fls((x) / 512) - 1) x 105 drivers/mtd/nand/raw/atmel/nand-controller.c #define ATMEL_HSMC_NFC_SR_RBEDGE(x) BIT((x) + 24) x 71 drivers/mtd/nand/raw/atmel/pmecc.c #define PMECC_CFG_BCH_STRENGTH(x) (x) x 75 drivers/mtd/nand/raw/atmel/pmecc.c #define PMECC_CFG_NSECTORS(x) ((fls(x) - 1) << 8) x 132 drivers/mtd/nand/raw/atmel/pmecc.c #define ATMEL_PMERRLOC_SIGMA(x) (((x) * 0x4) + 0x28) x 134 drivers/mtd/nand/raw/atmel/pmecc.c #define ATMEL_PMERRLOC_EL(offs, x) (((x) * 0x4) + (offs)) x 195 drivers/mtd/nand/raw/atmel/pmecc.c unsigned int i, x = 1; x 204 drivers/mtd/nand/raw/atmel/pmecc.c gf_tables->alpha_to[i] = x; x 205 drivers/mtd/nand/raw/atmel/pmecc.c gf_tables->index_of[x] = i; x 206 drivers/mtd/nand/raw/atmel/pmecc.c if (i && (x == 1)) x 209 drivers/mtd/nand/raw/atmel/pmecc.c x <<= 1; x 210 drivers/mtd/nand/raw/atmel/pmecc.c if (x & k) x 211 drivers/mtd/nand/raw/atmel/pmecc.c x ^= poly; x 589 drivers/mtd/nand/raw/cafe_nand.c static int cafe_mul(int x) x 591 drivers/mtd/nand/raw/cafe_nand.c if (x == 0) x 593 drivers/mtd/nand/raw/cafe_nand.c return gf4096_mul(x, 0xe01); x 43 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_ECC0(v, x) \ x 44 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (GPMI_IS_MX6(x) \ x 54 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_GF(v, x) \ x 55 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ((GPMI_IS_MX6(x) && ((v) == 14)) \ x 66 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x) \ x 67 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (GPMI_IS_MX6(x) \ x 85 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT1_ECCN(v, x) \ x 86 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (GPMI_IS_MX6(x) \ x 96 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT1_GF(v, x) \ x 97 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ((GPMI_IS_MX6(x) && ((v) == 14)) \ x 108 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x) \ x 109 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (GPMI_IS_MX6(x) \ x 166 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h #define GPMI_IS_MX23(x) ((x)->devdata->type == IS_MX23) x 167 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h #define GPMI_IS_MX28(x) ((x)->devdata->type == IS_MX28) x 168 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h #define GPMI_IS_MX6Q(x) ((x)->devdata->type == IS_MX6Q) x 169 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h #define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX) x 170 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h #define GPMI_IS_MX7D(x) ((x)->devdata->type == IS_MX7D) x 172 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h #define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || \ x 173 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h GPMI_IS_MX7D(x)) x 174 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h #define GPMI_IS_MXS(x) (GPMI_IS_MX23(x) || GPMI_IS_MX28(x)) x 37 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL0_LOCK_CS(v, x) 0x0 x 43 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL0_CS(v, x) (((v) << BP_GPMI_CTRL0_CS) & \ x 44 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (GPMI_IS_MX23((x)) \ x 26 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c #define JZ_REG_NAND_ERR(x) (0x1C + ((x) << 2)) x 42 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_BUFF(x) (x + 0x00000) x 43 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_DATA(x) (x + 0x08000) x 44 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_CMD(x) (x + 0x10000) x 45 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ADDR(x) (x + 0x10004) x 46 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ECC_ENC_REG(x) (x + 0x10008) x 47 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ECC_DEC_REG(x) (x + 0x1000C) x 48 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ECC_AUTO_ENC_REG(x) (x + 0x10010) x 49 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ECC_AUTO_DEC_REG(x) (x + 0x10014) x 50 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_RPR(x) (x + 0x10018) x 51 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_WPR(x) (x + 0x1001C) x 52 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_RUBP(x) (x + 0x10020) x 53 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ROBP(x) (x + 0x10024) x 54 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_SW_WP_ADD_LOW(x) (x + 0x10028) x 55 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_SW_WP_ADD_HIG(x) (x + 0x1002C) x 56 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ICR(x) (x + 0x10030) x 57 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_TIME_REG(x) (x + 0x10034) x 58 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_IRQ_MR(x) (x + 0x10038) x 59 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_IRQ_SR(x) (x + 0x1003C) x 60 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_LOCK_PR(x) (x + 0x10044) x 61 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_ISR(x) (x + 0x10048) x 62 drivers/mtd/nand/raw/lpc32xx_mlc.c #define MLC_CEH(x) (x + 0x1004C) x 38 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_DATA(x) (x + 0x000) x 39 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_ADDR(x) (x + 0x004) x 40 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_CMD(x) (x + 0x008) x 41 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_STOP(x) (x + 0x00C) x 42 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_CTRL(x) (x + 0x010) x 43 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_CFG(x) (x + 0x014) x 44 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_STAT(x) (x + 0x018) x 45 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_INT_STAT(x) (x + 0x01C) x 46 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_IEN(x) (x + 0x020) x 47 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_ISR(x) (x + 0x024) x 48 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_ICR(x) (x + 0x028) x 49 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_TAC(x) (x + 0x02C) x 50 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_TC(x) (x + 0x030) x 51 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_ECC(x) (x + 0x034) x 52 drivers/mtd/nand/raw/lpc32xx_slc.c #define SLC_DMA_DATA(x) (x + 0x038) x 95 drivers/mtd/nand/raw/marvell_nand.c #define FIFO_REP(x) (x / sizeof(u32)) x 130 drivers/mtd/nand/raw/marvell_nand.c #define NDCR_RD_ID_CNT(x) (min_t(unsigned int, x, 0x7) << 16) x 131 drivers/mtd/nand/raw/marvell_nand.c #define NDCR_PAGE_SZ(x) (x >= 2048 ? BIT(24) : 0) x 143 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_TRP(x) ((min_t(unsigned int, x, 0xF) & 0x7) << 0) x 144 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_TRH(x) (min_t(unsigned int, x, 0x7) << 3) x 145 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_ETRP(x) ((min_t(unsigned int, x, 0xF) & 0x8) << 3) x 147 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_TWP(x) (min_t(unsigned int, x, 0x7) << 8) x 148 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_TWH(x) (min_t(unsigned int, x, 0x7) << 11) x 149 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_TCS(x) (min_t(unsigned int, x, 0x7) << 16) x 150 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_TCH(x) (min_t(unsigned int, x, 0x7) << 19) x 151 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_RD_CNT_DEL(x) (min_t(unsigned int, x, 0xF) << 22) x 153 drivers/mtd/nand/raw/marvell_nand.c #define NDTR0_TADL(x) (min_t(unsigned int, x, 0x1F) << 27) x 157 drivers/mtd/nand/raw/marvell_nand.c #define NDTR1_TAR(x) (min_t(unsigned int, x, 0xF) << 0) x 158 drivers/mtd/nand/raw/marvell_nand.c #define NDTR1_TWHR(x) (min_t(unsigned int, x, 0xF) << 4) x 159 drivers/mtd/nand/raw/marvell_nand.c #define NDTR1_TRHW(x) (min_t(unsigned int, x / 16, 0x3) << 8) x 162 drivers/mtd/nand/raw/marvell_nand.c #define NDTR1_TR(x) (min_t(unsigned int, x, 0xFFFF) << 16) x 173 drivers/mtd/nand/raw/marvell_nand.c #define NDSR_ERRCNT(x) ((x >> 16) & 0x1F) x 184 drivers/mtd/nand/raw/marvell_nand.c #define NDCB0_CMD1(x) ((x & 0xFF) << 0) x 185 drivers/mtd/nand/raw/marvell_nand.c #define NDCB0_CMD2(x) ((x & 0xFF) << 8) x 186 drivers/mtd/nand/raw/marvell_nand.c #define NDCB0_ADDR_CYC(x) ((x & 0x7) << 16) x 187 drivers/mtd/nand/raw/marvell_nand.c #define NDCB0_ADDR_GET_NUM_CYC(x) (((x) >> 16) & 0x7) x 189 drivers/mtd/nand/raw/marvell_nand.c #define NDCB0_CMD_TYPE(x) ((x & 0x7) << 21) x 193 drivers/mtd/nand/raw/marvell_nand.c #define NDCB0_CMD_XTYPE(x) ((x & 0x7) << 29) x 197 drivers/mtd/nand/raw/marvell_nand.c #define NDCB1_COLS(x) ((x & 0xFFFF) << 0) x 198 drivers/mtd/nand/raw/marvell_nand.c #define NDCB1_ADDRS_PAGE(x) (x << 16) x 202 drivers/mtd/nand/raw/marvell_nand.c #define NDCB2_ADDR5_PAGE(x) (((x >> 16) & 0xFF) << 0) x 203 drivers/mtd/nand/raw/marvell_nand.c #define NDCB2_ADDR5_CYC(x) ((x & 0xFF) << 0) x 207 drivers/mtd/nand/raw/marvell_nand.c #define NDCB3_ADDR6_CYC(x) ((x & 0xFF) << 16) x 208 drivers/mtd/nand/raw/marvell_nand.c #define NDCB3_ADDR7_CYC(x) ((x & 0xFF) << 24) x 41 drivers/mtd/nand/raw/meson_nand.c #define NFC_CMD_GET_SIZE(x) (((x) >> 22) & GENMASK(4, 0)) x 101 drivers/mtd/nand/raw/meson_nand.c #define ECC_ERR_CNT(x) (((x) >> 24) & GENMASK(5, 0)) x 102 drivers/mtd/nand/raw/meson_nand.c #define ECC_ZERO_CNT(x) (((x) >> 16) & GENMASK(5, 0)) x 78 drivers/mtd/nand/raw/mtk_nand.c #define NFI_FDML(x) (0xA0 + (x) * sizeof(u32) * 2) x 79 drivers/mtd/nand/raw/mtk_nand.c #define NFI_FDMM(x) (0xA4 + (x) * sizeof(u32) * 2) x 91 drivers/mtd/nand/raw/mtk_nand.c #define KB(x) ((x) * 1024UL) x 92 drivers/mtd/nand/raw/mtk_nand.c #define MB(x) (KB(x) * 1024UL) x 60 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V2_CONFIG1_PPB(x) (((x) & 0x3) << 9) x 81 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7 ) << 4) x 104 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG2_PPB(x, shift) (((x) & 0x3) << shift) x 105 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG2_NUM_ADDR_PHASE1(x) (((x) & 0x3) << 12) x 107 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24) x 108 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16) x 111 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0) x 113 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8) x 114 drivers/mtd/nand/raw/mxc_nand.c #define NFC_V3_CONFIG3_NUM_OF_DEVICES(x) (((x) & 0x7) << 12) x 22 drivers/mtd/nand/raw/mxic_nand.c #define HC_CFG_IF_CFG(x) ((x) << 27) x 25 drivers/mtd/nand/raw/mxic_nand.c #define HC_CFG_NIO(x) (((x) / 4) << 27) x 31 drivers/mtd/nand/raw/mxic_nand.c #define HC_CFG_SLV_ACT(x) ((x) << 21) x 36 drivers/mtd/nand/raw/mxic_nand.c #define HC_CFG_IDLE_SIO_LVL(x) ((x) << 16) x 63 drivers/mtd/nand/raw/mxic_nand.c #define TXD(x) (0x14 + ((x) * 4)) x 71 drivers/mtd/nand/raw/mxic_nand.c #define OP_DUMMY_CYC(x) ((x) << 17) x 72 drivers/mtd/nand/raw/mxic_nand.c #define OP_ADDR_BYTES(x) ((x) << 14) x 73 drivers/mtd/nand/raw/mxic_nand.c #define OP_CMD_BYTES(x) (((x) - 1) << 13) x 79 drivers/mtd/nand/raw/mxic_nand.c #define OP_DATA_BUSW(x) ((x) << 6) x 81 drivers/mtd/nand/raw/mxic_nand.c #define OP_ADDR_BUSW(x) ((x) << 3) x 83 drivers/mtd/nand/raw/mxic_nand.c #define OP_CMD_BUSW(x) (x) x 91 drivers/mtd/nand/raw/mxic_nand.c #define OCTA_CRC_CHUNK(s, x) ((fls((x) / 32)) << (1 + ((s) * 16))) x 100 drivers/mtd/nand/raw/mxic_nand.c #define LMODE_SLV_ACT(x) ((x) << 21) x 101 drivers/mtd/nand/raw/mxic_nand.c #define LMODE_CMD1(x) ((x) << 8) x 102 drivers/mtd/nand/raw/mxic_nand.c #define LMODE_CMD0(x) (x) x 116 drivers/mtd/nand/raw/mxic_nand.c #define DMAC_CFG_QE(x) (((x) + 1) << 16) x 117 drivers/mtd/nand/raw/mxic_nand.c #define DMAC_CFG_BURST_LEN(x) (((x) + 1) << 12) x 118 drivers/mtd/nand/raw/mxic_nand.c #define DMAC_CFG_BURST_SZ(x) ((x) << 8) x 130 drivers/mtd/nand/raw/mxic_nand.c #define DMAM_CFG_SDMA_GAP(x) (fls((x) / 8192) << 2) x 139 drivers/mtd/nand/raw/mxic_nand.c #define RDM_CFG0_POLY(x) (x) x 143 drivers/mtd/nand/raw/mxic_nand.c #define RDM_CFG1_SEED(x) (x) x 157 drivers/mtd/nand/raw/mxic_nand.c #define IDLY_CODE(x) (0xa4 + ((x) * 4)) x 158 drivers/mtd/nand/raw/mxic_nand.c #define IDLY_CODE_VAL(x, v) ((v) << (((x) % 4) * 8)) x 161 drivers/mtd/nand/raw/mxic_nand.c #define GPIO_PT(x) BIT(3 + ((x) * 16)) x 162 drivers/mtd/nand/raw/mxic_nand.c #define GPIO_RESET(x) BIT(2 + ((x) * 16)) x 163 drivers/mtd/nand/raw/mxic_nand.c #define GPIO_HOLDB(x) BIT(1 + ((x) * 16)) x 164 drivers/mtd/nand/raw/mxic_nand.c #define GPIO_WPB(x) BIT((x) * 16) x 168 drivers/mtd/nand/raw/mxic_nand.c #define HW_TEST(x) (0xe0 + ((x) * 4)) x 3946 drivers/mtd/nand/raw/nand_base.c #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0) x 256 drivers/mtd/nand/raw/nand_hynix.c #define NAND_HYNIX_1XNM_RR_SET_OFFS(x, setsize, inv) \ x 257 drivers/mtd/nand/raw/nand_hynix.c (16 + ((((x) * 2) + ((inv) ? 1 : 0)) * (setsize))) x 264 drivers/mtd/nand/raw/nandsim.c #define NS_STATE(x) ((x) & ~ACTION_MASK) x 71 drivers/mtd/nand/raw/orion_nand.c register uint64_t x asm ("r2"); x 73 drivers/mtd/nand/raw/orion_nand.c asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); x 74 drivers/mtd/nand/raw/orion_nand.c buf64[i++] = x; x 38 drivers/mtd/nand/raw/s3c2410.c #define S3C2410_NFREG(x) (x) x 57 drivers/mtd/nand/raw/s3c2410.c #define S3C2410_NFCONF_TACLS(x) ((x)<<8) x 58 drivers/mtd/nand/raw/s3c2410.c #define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) x 59 drivers/mtd/nand/raw/s3c2410.c #define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) x 61 drivers/mtd/nand/raw/s3c2410.c #define S3C2440_NFCONF_TACLS(x) ((x)<<12) x 62 drivers/mtd/nand/raw/s3c2410.c #define S3C2440_NFCONF_TWRPH0(x) ((x)<<8) x 63 drivers/mtd/nand/raw/s3c2410.c #define S3C2440_NFCONF_TWRPH1(x) ((x)<<4) x 89 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PCR_PWID(x) (((x) & 0x3) << 4) x 95 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PCR_TCLR(x) (((x) & 0xf) << 9) x 98 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PCR_TAR(x) (((x) & 0xf) << 13) x 101 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PCR_ECCSS(x) (((x) & 0x7) << 17) x 111 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PMEM_MEMSET(x) (((x) & 0xff) << 0) x 112 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PMEM_MEMWAIT(x) (((x) & 0xff) << 8) x 113 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PMEM_MEMHOLD(x) (((x) & 0xff) << 16) x 114 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PMEM_MEMHIZ(x) (((x) & 0xff) << 24) x 118 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PATT_ATTSET(x) (((x) & 0xff) << 0) x 119 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PATT_ATTWAIT(x) (((x) & 0xff) << 8) x 120 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PATT_ATTHOLD(x) (((x) & 0xff) << 16) x 121 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_PATT_ATTHIZ(x) (((x) & 0xff) << 24) x 136 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCFGR1_ACYNBR(x) (((x) & 0x7) << 4) x 137 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCFGR1_CMD1(x) (((x) & 0xff) << 8) x 138 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCFGR1_CMD2(x) (((x) & 0xff) << 16) x 146 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCFGR2_RCMD1(x) (((x) & 0xff) << 8) x 147 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCFGR2_RCMD2(x) (((x) & 0xff) << 16) x 152 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCFGR3_SNBR(x) (((x) & 0x1f) << 8) x 163 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCAR1_ADDC1(x) (((x) & 0xff) << 0) x 164 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCAR1_ADDC2(x) (((x) & 0xff) << 8) x 165 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCAR1_ADDC3(x) (((x) & 0xff) << 16) x 166 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCAR1_ADDC4(x) (((x) & 0xff) << 24) x 169 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCAR2_ADDC5(x) (((x) & 0xff) << 0) x 170 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCAR2_NANDCEN(x) (((x) & 0x3) << 10) x 171 drivers/mtd/nand/raw/stm32_fmc2_nand.c #define FMC2_CSQCAR2_SAO(x) (((x) & 0xffff) << 16) x 50 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_REG_ECC_ERR_CNT(x) ((0x0040 + (x)) & ~0x3) x 51 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_REG_USER_DATA(x) (0x0050 + ((x) * 4)) x 65 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_RB_SEL(x) ((x) << 3) x 67 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_CE_SEL(x) ((x) << 24) x 70 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8) x 83 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_RB_STATE(x) BIT(x + 8) x 105 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_CMD(x) (x) x 107 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_ADR_NUM(x) (((x) - 1) << 16) x 144 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_ECC_MODE(x) ((x) << 12) x 146 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_RANDOM_SEED(x) ((x) << 16) x 149 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_ECC_ERR(x) BIT(x) x 151 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_ECC_PAT_FOUND(x) BIT(x + 16) x 152 drivers/mtd/nand/raw/sunxi_nand.c #define NFC_ECC_ERR_CNT(b, x) (((x) >> (((b) % 4) * 8)) & 0xff) x 36 drivers/mtd/nand/raw/tegra_nand.c #define COMMAND_CE(x) BIT(8 + ((x) & 0x7)) x 50 drivers/mtd/nand/raw/tegra_nand.c #define IER_ERR_TRIG_VAL(x) (((x) & 0xf) << 16) x 77 drivers/mtd/nand/raw/tegra_nand.c #define CONFIG_TAG_BYTE_SIZE(x) ((x) & 0xff) x 80 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TRP_RESP(x) (((x) & 0xf) << 28) x 81 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TWB(x) (((x) & 0xf) << 24) x 82 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TCR_TAR_TRR(x) (((x) & 0xf) << 20) x 83 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TWHR(x) (((x) & 0xf) << 16) x 84 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TCS(x) (((x) & 0x3) << 14) x 85 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TWH(x) (((x) & 0x3) << 12) x 86 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TWP(x) (((x) & 0xf) << 8) x 87 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TRH(x) (((x) & 0x3) << 4) x 88 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TRP(x) (((x) & 0xf) << 0) x 93 drivers/mtd/nand/raw/tegra_nand.c #define TIMING_TADL(x) ((x) & 0xf) x 132 drivers/mtd/nand/raw/tegra_nand.c #define HWSTATUS_RDSTATUS_MASK(x) (((x) & 0xff) << 24) x 133 drivers/mtd/nand/raw/tegra_nand.c #define HWSTATUS_RDSTATUS_VALUE(x) (((x) & 0xff) << 16) x 134 drivers/mtd/nand/raw/tegra_nand.c #define HWSTATUS_RBSY_MASK(x) (((x) & 0xff) << 8) x 135 drivers/mtd/nand/raw/tegra_nand.c #define HWSTATUS_RBSY_VALUE(x) (((x) & 0xff) << 0) x 66 drivers/mtd/nand/raw/vf610_nfc.c #define COMMAND_NADDR_BYTES(x) GENMASK(13, 13 - (x) + 1) x 42 drivers/mtd/nand/raw/xway_nand.c #define ADDSEL1_MASK(x) (x << 4) x 32 drivers/mtd/parsers/bcm63xxpart.c #define STR_NULL_TERMINATE(x) \ x 33 drivers/mtd/parsers/bcm63xxpart.c do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0) x 49 drivers/mtd/parsers/cmdlinepart.c #define dbg(x) do { printk("DEBUG-CMDLINE-PART: "); printk x; } while(0) x 51 drivers/mtd/parsers/cmdlinepart.c #define dbg(x) x 25 drivers/mtd/parsers/parser_imagetag.c #define STR_NULL_TERMINATE(x) \ x 26 drivers/mtd/parsers/parser_imagetag.c do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0) x 42 drivers/mtd/ssfdc.c #define KiB(x) ( (x) * 1024L ) x 43 drivers/mtd/ssfdc.c #define MiB(x) ( KiB(x) * 1024L ) x 376 drivers/net/appletalk/cops.c int i, x, status; x 394 drivers/net/appletalk/cops.c for(x = 0xFFFF; x>0; x --) /* wait for response */ x 708 drivers/net/appletalk/ltpc.c static int set_30 (struct net_device *dev,int x) x 712 drivers/net/appletalk/ltpc.c c.setflags.flags = x; x 1018 drivers/net/appletalk/ltpc.c int x=0,y=0; x 1030 drivers/net/appletalk/ltpc.c x = inb_p(0x220+6); x 1031 drivers/net/appletalk/ltpc.c if ( (x!=0xff) && (x>=0xf0) ) { x 1047 drivers/net/appletalk/ltpc.c printk(KERN_ERR "LocalTalk card not found; 220 = %02x, 240 = %02x.\n", x,y); x 76 drivers/net/arcnet/arcdevice.h #define BUGLVL(x) ((x) & ARCNET_DEBUG_MAX & arcnet_debug) x 79 drivers/net/arcnet/arcdevice.h #define arc_printk(x, dev, fmt, ...) \ x 81 drivers/net/arcnet/arcdevice.h if (BUGLVL(x)) { \ x 82 drivers/net/arcnet/arcdevice.h if ((x) == D_NORMAL) \ x 84 drivers/net/arcnet/arcdevice.h else if ((x) < D_DURING) \ x 91 drivers/net/arcnet/arcdevice.h #define arc_cont(x, fmt, ...) \ x 93 drivers/net/arcnet/arcdevice.h if (BUGLVL(x)) \ x 103 drivers/net/arcnet/com20020.h #define XTOcfg(x) ((x) << 3) /* extended timeout */ x 31 drivers/net/caif/caif_hsi.c #define PAD_POW2(x, pow) ((((x)&((pow)-1)) == 0) ? 0 :\ x 32 drivers/net/caif/caif_hsi.c (((pow)-((x)&((pow)-1))))) x 35 drivers/net/caif/caif_spi.c #define PAD_POW2(x, pow) ((((x)&((pow)-1))==0) ? 0 : (((pow)-((x)&((pow)-1))))) x 56 drivers/net/can/flexcan.c #define FLEXCAN_MCR_MAXMB(x) ((x) & 0x7f) x 63 drivers/net/can/flexcan.c #define FLEXCAN_CTRL_PRESDIV(x) (((x) & 0xff) << 24) x 64 drivers/net/can/flexcan.c #define FLEXCAN_CTRL_RJW(x) (((x) & 0x03) << 22) x 65 drivers/net/can/flexcan.c #define FLEXCAN_CTRL_PSEG1(x) (((x) & 0x07) << 19) x 66 drivers/net/can/flexcan.c #define FLEXCAN_CTRL_PSEG2(x) (((x) & 0x07) << 16) x 78 drivers/net/can/flexcan.c #define FLEXCAN_CTRL_PROPSEG(x) ((x) & 0x07) x 89 drivers/net/can/flexcan.c #define FLEXCAN_CTRL2_RFFN(x) (((x) & 0x0f) << 24) x 90 drivers/net/can/flexcan.c #define FLEXCAN_CTRL2_TASD(x) (((x) & 0x1f) << 19) x 145 drivers/net/can/flexcan.c #define FLEXCAN_IFLAG_MB(x) BIT((x) & 0x1f) x 167 drivers/net/can/flexcan.c #define FLEXCAN_MB_CNT_LENGTH(x) (((x) & 0xf) << 16) x 168 drivers/net/can/flexcan.c #define FLEXCAN_MB_CNT_TIMESTAMP(x) ((x) & 0xffff) x 53 drivers/net/can/peak_canfd/peak_pciefd_main.c #define PCIEFD_FW_VERSION(x, y, z) (((u32)(x) << 24) | \ x 153 drivers/net/can/rcar/rcar_can.c #define RCAR_CAN_BCR_TSEG1(x) (((x) & 0x0f) << 20) x 154 drivers/net/can/rcar/rcar_can.c #define RCAR_CAN_BCR_BPR(x) (((x) & 0x3ff) << 8) x 155 drivers/net/can/rcar/rcar_can.c #define RCAR_CAN_BCR_SJW(x) (((x) & 0x3) << 4) x 156 drivers/net/can/rcar/rcar_can.c #define RCAR_CAN_BCR_TSEG2(x) ((x) & 0x07) x 83 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_GERFL_ERR(gpriv, x) ((x) & (RCANFD_GERFL_EEF1 |\ x 91 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_GAFLCFG_SETRNC(n, x) (((x) & 0xff) << (24 - n * 8)) x 92 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_GAFLCFG_GETRNC(n, x) (((x) >> (24 - n * 8)) & 0xff) x 96 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_GAFLECTR_AFLPN(x) ((x) & 0x1f) x 102 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_GAFLP1_GAFLFDP(x) (1 << (x)) x 107 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFG_SJW(x) (((x) & 0x3) << 24) x 108 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFG_TSEG2(x) (((x) & 0x7) << 20) x 109 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFG_TSEG1(x) (((x) & 0xf) << 16) x 110 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFG_BRP(x) (((x) & 0x3ff) << 0) x 113 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_NCFG_NTSEG2(x) (((x) & 0x1f) << 24) x 114 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_NCFG_NTSEG1(x) (((x) & 0x7f) << 16) x 115 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_NCFG_NSJW(x) (((x) & 0x1f) << 11) x 116 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_NCFG_NBRP(x) (((x) & 0x3ff) << 0) x 153 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CSTS_TECCNT(x) (((x) >> 24) & 0xff) x 154 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CSTS_RECCNT(x) (((x) >> 16) & 0xff) x 173 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CERFL_ERR(x) ((x) & (0x7fff)) /* above bits 14:0 */ x 176 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_DCFG_DSJW(x) (((x) & 0x7) << 24) x 177 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_DCFG_DTSEG2(x) (((x) & 0x7) << 20) x 178 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_DCFG_DTSEG1(x) (((x) & 0xf) << 16) x 179 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_DCFG_DBRP(x) (((x) & 0xff) << 0) x 184 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_FDCFG_TDCO(x) (((x) & 0x7f) >> 16) x 188 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFCC_RFDC(x) (((x) & 0x7) << 8) x 189 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFCC_RFPLS(x) (((x) & 0x7) << 4) x 204 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFPTR_RFDLC(x) (((x) >> 28) & 0xf) x 205 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFPTR_RFPTR(x) (((x) >> 16) & 0xfff) x 206 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFPTR_RFTS(x) (((x) >> 0) & 0xffff) x 216 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFCC_CFTML(x) (((x) & 0xf) << 20) x 217 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFCC_CFM(x) (((x) & 0x3) << 16) x 219 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFCC_CFDC(x) (((x) & 0x7) << 8) x 220 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFCC_CFPLS(x) (((x) & 0x7) << 4) x 225 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFSTS_CFMC(x) (((x) >> 8) & 0xff) x 234 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFID_CFID_MASK(x) ((x) & 0x1fffffff) x 237 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFPTR_CFDLC(x) (((x) & 0xf) << 28) x 238 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFPTR_CFPTR(x) (((x) & 0xfff) << 16) x 239 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_CFPTR_CFTS(x) (((x) & 0xff) << 0) x 289 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFCC(x) (0x00b8 + (0x04 * (x))) x 291 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFSTS(x) (0x00d8 + (0x04 * (x))) x 293 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_RFPCTR(x) (0x00f8 + (0x04 * (x))) x 385 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_C_RFID(x) (RCANFD_C_RFOFFSET + (0x10 * (x))) x 386 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_C_RFPTR(x) (RCANFD_C_RFOFFSET + 0x04 + \ x 387 drivers/net/can/rcar/rcar_canfd.c (0x10 * (x))) x 388 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_C_RFDF(x, df) (RCANFD_C_RFOFFSET + 0x08 + \ x 389 drivers/net/can/rcar/rcar_canfd.c (0x10 * (x)) + (0x04 * (df))) x 432 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_F_RFID(x) (RCANFD_F_RFOFFSET + (0x80 * (x))) x 433 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_F_RFPTR(x) (RCANFD_F_RFOFFSET + 0x04 + \ x 434 drivers/net/can/rcar/rcar_canfd.c (0x80 * (x))) x 435 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_F_RFFDSTS(x) (RCANFD_F_RFOFFSET + 0x08 + \ x 436 drivers/net/can/rcar/rcar_canfd.c (0x80 * (x))) x 437 drivers/net/can/rcar/rcar_canfd.c #define RCANFD_F_RFDF(x, df) (RCANFD_F_RFOFFSET + 0x0c + \ x 438 drivers/net/can/rcar/rcar_canfd.c (0x80 * (x)) + (0x04 * (df))) x 353 drivers/net/dsa/b53/b53_regs.h #define B53_ARL_SRCH_RSTL_MACVID(x) (B53_ARL_SRCH_RSTL_0_MACVID + ((x) * 0x10)) x 354 drivers/net/dsa/b53/b53_regs.h #define B53_ARL_SRCH_RSTL(x) (B53_ARL_SRCH_RSTL_0 + ((x) * 0x10)) x 22 drivers/net/dsa/b53/b53_serdes.h #define B53_SERDES_MII_REG(x) (0x20 + (x) * 2) x 23 drivers/net/dsa/b53/b53_serdes.h #define B53_SERDES_DIGITAL_CONTROL(x) (0x1e + (x) * 2) x 59 drivers/net/dsa/b53/b53_srab.c #define B53_SRAB_INTR_P(x) BIT(x) x 50 drivers/net/dsa/bcm_sf2_regs.h #define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x)) x 69 drivers/net/dsa/bcm_sf2_regs.h #define REG_LED_CNTRL(x) (REG_LED_0_CNTRL + (x)) x 82 drivers/net/dsa/bcm_sf2_regs.h #define P_LINK_UP_IRQ(x) (1 << (0 + (x))) x 83 drivers/net/dsa/bcm_sf2_regs.h #define P_LINK_DOWN_IRQ(x) (1 << (1 + (x))) x 84 drivers/net/dsa/bcm_sf2_regs.h #define P_ENERGY_ON_IRQ(x) (1 << (2 + (x))) x 85 drivers/net/dsa/bcm_sf2_regs.h #define P_ENERGY_OFF_IRQ(x) (1 << (3 + (x))) x 86 drivers/net/dsa/bcm_sf2_regs.h #define P_GPHY_IRQ(x) (1 << (4 + (x))) x 88 drivers/net/dsa/bcm_sf2_regs.h #define P_IRQ_MASK(x) (P_LINK_UP_IRQ((x)) | \ x 89 drivers/net/dsa/bcm_sf2_regs.h P_LINK_DOWN_IRQ((x)) | \ x 90 drivers/net/dsa/bcm_sf2_regs.h P_ENERGY_ON_IRQ((x)) | \ x 91 drivers/net/dsa/bcm_sf2_regs.h P_ENERGY_OFF_IRQ((x)) | \ x 92 drivers/net/dsa/bcm_sf2_regs.h P_GPHY_IRQ((x))) x 112 drivers/net/dsa/bcm_sf2_regs.h #define P_IRQ_OFF(x) ((6 - (x)) * P_NUM_IRQ) x 130 drivers/net/dsa/bcm_sf2_regs.h #define ACB_QUEUE_CFG(x) (ACB_QUEUE_0_CFG + ((x) * 0x4)) x 134 drivers/net/dsa/bcm_sf2_regs.h #define CORE_G_PCTL_PORT(x) (CORE_G_PCTL_PORT0 + (x * 0x4)) x 170 drivers/net/dsa/bcm_sf2_regs.h #define SW_LEARN_CNTL(x) (1 << (x)) x 172 drivers/net/dsa/bcm_sf2_regs.h #define CORE_STS_OVERRIDE_GMIIP_PORT(x) (0x160 + (x) * 4) x 173 drivers/net/dsa/bcm_sf2_regs.h #define CORE_STS_OVERRIDE_GMIIP2_PORT(x) (0x39000 + (x) * 8) x 246 drivers/net/dsa/bcm_sf2_regs.h #define P_TXQ_PSM_VDD(x) (P_TXQ_PSM_VDD_MASK << \ x 247 drivers/net/dsa/bcm_sf2_regs.h ((x) * P_TXQ_PSM_VDD_SHIFT)) x 249 drivers/net/dsa/bcm_sf2_regs.h #define CORE_PORT_TC2_QOS_MAP_PORT(x) (0xc1c0 + ((x) * 0x10)) x 253 drivers/net/dsa/bcm_sf2_regs.h #define CORE_PORT_VLAN_CTL_PORT(x) (0xc400 + ((x) * 0x8)) x 258 drivers/net/dsa/bcm_sf2_regs.h #define CORE_TXQ_THD_PAUSE_QN_PORT(x) (CORE_TXQ_THD_PAUSE_QN_PORT_0 + \ x 259 drivers/net/dsa/bcm_sf2_regs.h (x) * 0x8) x 261 drivers/net/dsa/bcm_sf2_regs.h #define CORE_DEFAULT_1Q_TAG_P(x) (0xd040 + ((x) * 8)) x 297 drivers/net/dsa/bcm_sf2_regs.h #define CORE_CFP_DATA_PORT(x) (CORE_CFP_DATA_PORT_0 + \ x 298 drivers/net/dsa/bcm_sf2_regs.h (x) * 0x10) x 313 drivers/net/dsa/bcm_sf2_regs.h #define SLICE_NUM(x) ((x) << SLICE_NUM_SHIFT) x 318 drivers/net/dsa/bcm_sf2_regs.h #define CORE_CFP_MASK_PORT(x) (CORE_CFP_MASK_PORT_0 + \ x 319 drivers/net/dsa/bcm_sf2_regs.h (x) * 0x10) x 40 drivers/net/dsa/lan9303-core.c # define LAN9303_PMI_ACCESS_PHY_ADDR(x) (((x) & 0x1f) << 11) x 41 drivers/net/dsa/lan9303-core.c # define LAN9303_PMI_ACCESS_MIIRINDA(x) (((x) & 0x1f) << 6) x 17 drivers/net/dsa/lan9303_mdio.c #define PHY_ADDR(x) ((((x) >> 6) + 0x10) & 0x1f) x 18 drivers/net/dsa/lan9303_mdio.c #define PHY_REG(x) (((x) >> 1) & 0x1f) x 131 drivers/net/dsa/lantiq_gswip.c #define GSWIP_BM_RAM_VAL(x) (0x043 - (x)) x 149 drivers/net/dsa/lantiq_gswip.c #define GSWIP_PCE_TBL_KEY(x) (0x447 - (x)) x 151 drivers/net/dsa/lantiq_gswip.c #define GSWIP_PCE_TBL_VAL(x) (0x44D - (x)) x 309 drivers/net/dsa/microchip/ksz_common.h #define swabnot_used(x) 0 x 21 drivers/net/dsa/mt7530.h #define TRGMII_BASE(x) (0x10000 + (x)) x 32 drivers/net/dsa/mt7530.h #define BC_FFP(x) (((x) & 0xff) << 24) x 33 drivers/net/dsa/mt7530.h #define UNM_FFP(x) (((x) & 0xff) << 16) x 35 drivers/net/dsa/mt7530.h #define UNU_FFP(x) (((x) & 0xff) << 8) x 38 drivers/net/dsa/mt7530.h #define CPU_PORT(x) ((x) << 4) x 52 drivers/net/dsa/mt7530.h #define ATC_HASH (((x) & 0xfff) << 16) x 57 drivers/net/dsa/mt7530.h #define ATC_MAT(x) (((x) & 0xf) << 8) x 94 drivers/net/dsa/mt7530.h #define VTCR_FUNC(x) (((x) & 0xf) << 12) x 95 drivers/net/dsa/mt7530.h #define VTCR_VID ((x) & 0xfff) x 113 drivers/net/dsa/mt7530.h #define PORT_MEM(x) (((x) & 0xff) << 16) x 121 drivers/net/dsa/mt7530.h #define ETAG_CTRL_P(p, x) (((x) & 0x3) << ((p) << 1)) x 131 drivers/net/dsa/mt7530.h #define MT7530_SSP_P(x) (0x2000 + ((x) * 0x100)) x 132 drivers/net/dsa/mt7530.h #define FID_PST(x) ((x) & 0x3) x 144 drivers/net/dsa/mt7530.h #define MT7530_PCR_P(x) (0x2004 + ((x) * 0x100)) x 145 drivers/net/dsa/mt7530.h #define PORT_VLAN(x) ((x) & 0x3) x 163 drivers/net/dsa/mt7530.h #define PCR_MATRIX(x) (((x) & 0xff) << 16) x 164 drivers/net/dsa/mt7530.h #define PORT_PRI(x) (((x) & 0x7) << 24) x 165 drivers/net/dsa/mt7530.h #define EG_TAG(x) (((x) & 0x3) << 28) x 171 drivers/net/dsa/mt7530.h #define MT7530_PSC_P(x) (0x200c + ((x) * 0x100)) x 175 drivers/net/dsa/mt7530.h #define MT7530_PVC_P(x) (0x2010 + ((x) * 0x100)) x 177 drivers/net/dsa/mt7530.h #define PVC_EG_TAG(x) (((x) & 0x7) << 8) x 179 drivers/net/dsa/mt7530.h #define VLAN_ATTR(x) (((x) & 0x3) << 6) x 192 drivers/net/dsa/mt7530.h #define STAG_VPID (((x) & 0xffff) << 16) x 195 drivers/net/dsa/mt7530.h #define MT7530_PPBV1_P(x) (0x2014 + ((x) * 0x100)) x 196 drivers/net/dsa/mt7530.h #define G0_PORT_VID(x) (((x) & 0xfff) << 0) x 201 drivers/net/dsa/mt7530.h #define MT7530_PMCR_P(x) (0x3000 + ((x) * 0x100)) x 202 drivers/net/dsa/mt7530.h #define PMCR_IFG_XMIT(x) (((x) & 0x3) << 18) x 219 drivers/net/dsa/mt7530.h #define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100) x 232 drivers/net/dsa/mt7530.h #define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100) x 276 drivers/net/dsa/mt7530.h #define P5_IO_CLK_DRV(x) ((x) & 0x3) x 277 drivers/net/dsa/mt7530.h #define P5_IO_DATA_DRV(x) (((x) & 0x3) << 4) x 281 drivers/net/dsa/mt7530.h #define P6_INTF_MODE(x) ((x) & 0x3) x 289 drivers/net/dsa/mt7530.h #define DQSI1_TAP(x) (((x) & 0x7f) << 8) x 290 drivers/net/dsa/mt7530.h #define DQSI0_TAP(x) ((x) & 0x7f) x 296 drivers/net/dsa/mt7530.h #define MT7530_TRGMII_RD(x) (0x7a10 + (x) * 8) x 300 drivers/net/dsa/mt7530.h #define RD_TAP(x) ((x) & 0x7f) x 308 drivers/net/dsa/mt7530.h #define TD_DM_DRVP(x) ((x) & 0xf) x 309 drivers/net/dsa/mt7530.h #define TD_DM_DRVN(x) (((x) & 0xf) << 4) x 312 drivers/net/dsa/mt7530.h #define TCK_TAP(x) (((x) & 0xf) << 8) x 316 drivers/net/dsa/mt7530.h #define CSR_RGMII_RXC_0DEG_CFG(x) ((x) & 0xf) x 319 drivers/net/dsa/mt7530.h #define CSR_RGMII_TXC_CFG(x) ((x) & 0x1f) x 330 drivers/net/dsa/mt7530.h #define RG_SYSPLL_RST_DLY(x) (((x) & 0x3) << 12) x 332 drivers/net/dsa/mt7530.h #define RG_SYSPLL_PREDIV(x) (((x) & 0x3) << 8) x 333 drivers/net/dsa/mt7530.h #define RG_SYSPLL_POSDIV(x) (((x) & 0x3) << 5) x 343 drivers/net/dsa/mt7530.h #define RG_LCDDS_PCW_NCPO1(x) ((x) & 0xffff) x 346 drivers/net/dsa/mt7530.h #define RG_LCDDS_PCW_NCPO0(x) ((x) & 0xffff) x 351 drivers/net/dsa/mt7530.h #define RG_LCCDS_C(x) (((x) & 0x7) << 4) x 355 drivers/net/dsa/mt7530.h #define RG_LCDDS_SSC_DELTA(x) ((x) & 0xfff) x 358 drivers/net/dsa/mt7530.h #define RG_LCDDS_SSC_DELTA1(x) ((x) & 0xfff) x 361 drivers/net/dsa/mt7530.h #define RG_GSWPLL_PREDIV(x) (((x) & 0x3) << 14) x 362 drivers/net/dsa/mt7530.h #define RG_GSWPLL_POSDIV_200M(x) (((x) & 0x3) << 12) x 367 drivers/net/dsa/mt7530.h #define RG_GSWPLL_FBKDIV_200M(x) ((x) & 0xff) x 370 drivers/net/dsa/mt7530.h #define RG_GSWPLL_POSDIV_500M(x) (((x) & 0x3) << 8) x 371 drivers/net/dsa/mt7530.h #define RG_GSWPLL_FBKDIV_500M(x) ((x) & 0xff) x 32 drivers/net/dsa/qca8k.h #define QCA8K_PORT_PAD_RGMII_TX_DELAY(x) \ x 33 drivers/net/dsa/qca8k.h ((0x8 + (x & 0x3)) << 22) x 34 drivers/net/dsa/qca8k.h #define QCA8K_PORT_PAD_RGMII_RX_DELAY(x) \ x 35 drivers/net/dsa/qca8k.h ((0x10 + (x & 0x3)) << 20) x 51 drivers/net/dsa/qca8k.h #define QCA8K_MDIO_MASTER_PHY_ADDR(x) ((x) << 21) x 52 drivers/net/dsa/qca8k.h #define QCA8K_MDIO_MASTER_REG_ADDR(x) ((x) << 16) x 53 drivers/net/dsa/qca8k.h #define QCA8K_MDIO_MASTER_DATA(x) (x) x 87 drivers/net/dsa/qca8k.h #define QCA8K_PORT_VLAN_CVID(x) (x << 16) x 88 drivers/net/dsa/qca8k.h #define QCA8K_PORT_VLAN_SVID(x) x x 133 drivers/net/dsa/qca8k.h #define QCA8K_EGRESS_VLAN(x) (0x0c70 + (4 * (x / 2))) x 100 drivers/net/ethernet/3com/3c59x.c #define RUN_AT(x) (jiffies + (x)) x 313 drivers/net/ethernet/3com/typhoon.c #define typhoon_post_pci_writes(x) \ x 314 drivers/net/ethernet/3com/typhoon.c do { if(likely(use_mmio)) ioread32(x+TYPHOON_REG_HEARTBEAT); } while(0) x 324 drivers/net/ethernet/3com/typhoon.c #define skb_tso_size(x) (skb_shinfo(x)->gso_size) x 329 drivers/net/ethernet/3com/typhoon.c #define skb_tso_size(x) 0 x 1180 drivers/net/ethernet/3com/typhoon.c #define shared_offset(x) offsetof(struct typhoon_shared, x) x 364 drivers/net/ethernet/3com/typhoon.h #define INIT_COMMAND_NO_RESPONSE(x, command) \ x 365 drivers/net/ethernet/3com/typhoon.h do { struct cmd_desc *_ptr = (x); \ x 372 drivers/net/ethernet/3com/typhoon.h #define INIT_COMMAND_WITH_RESPONSE(x, command) \ x 373 drivers/net/ethernet/3com/typhoon.h do { struct cmd_desc *_ptr = (x); \ x 151 drivers/net/ethernet/8390/8390.h #define EI_SHIFT(x) (x) x 53 drivers/net/ethernet/8390/ax88796.c #define EI_SHIFT(x) (ei_local->reg_offset[(x)]) x 49 drivers/net/ethernet/8390/etherh.c #define EI_SHIFT(x) (ei_local->reg_offset[x]) x 33 drivers/net/ethernet/8390/hydra.c #define EI_SHIFT(x) (ei_local->reg_offset[x]) x 47 drivers/net/ethernet/8390/mac8390.c #define EI_SHIFT(x) (ei_local->reg_offset[x]) x 40 drivers/net/ethernet/8390/xsurf100.c #define EI_SHIFT(x) (ei_local->reg_offset[(x)]) x 38 drivers/net/ethernet/8390/zorro8390.c #define EI_SHIFT(x) (ei_local->reg_offset[x]) x 143 drivers/net/ethernet/adaptec/starfire.c #define cpu_to_dma(x) cpu_to_le64(x) x 144 drivers/net/ethernet/adaptec/starfire.c #define dma_to_cpu(x) le64_to_cpu(x) x 152 drivers/net/ethernet/adaptec/starfire.c #define cpu_to_dma(x) cpu_to_le32(x) x 153 drivers/net/ethernet/adaptec/starfire.c #define dma_to_cpu(x) le32_to_cpu(x) x 207 drivers/net/ethernet/agere/et131x.h #define INDEX12(x) ((x) & ET_DMA12_MASK) x 208 drivers/net/ethernet/agere/et131x.h #define INDEX10(x) ((x) & ET_DMA10_MASK) x 209 drivers/net/ethernet/agere/et131x.h #define INDEX4(x) ((x) & ET_DMA4_MASK) x 57 drivers/net/ethernet/allwinner/sun4i-emac.h #define EMAC_RX_IO_DATA_LEN(x) (x & 0xffff) x 58 drivers/net/ethernet/allwinner/sun4i-emac.h #define EMAC_RX_IO_DATA_STATUS(x) ((x >> 16) & 0xffff) x 31 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_DESC_CTL_SET_CH(x) ((x) & 0xff) x 78 drivers/net/ethernet/altera/altera_tse_main.c #define TSE_TX_THRESH(x) (x->tx_ring_size / 4) x 56 drivers/net/ethernet/amazon/ena/ena_com.c #define ENA_DMA_ADDR_TO_UINT32_LOW(x) ((u32)((u64)(x))) x 57 drivers/net/ethernet/amazon/ena/ena_com.c #define ENA_DMA_ADDR_TO_UINT32_HIGH(x) ((u32)(((u64)(x)) >> 32)) x 45 drivers/net/ethernet/amd/7990.c #define WRITERAP(lp, x) out_be16(lp->base + LANCE_RAP, (x)) x 46 drivers/net/ethernet/amd/7990.c #define WRITERDP(lp, x) out_be16(lp->base + LANCE_RDP, (x)) x 59 drivers/net/ethernet/amd/7990.c #define WRITERAP(lp, x) (lp->writerap(lp, x)) x 60 drivers/net/ethernet/amd/7990.c #define WRITERDP(lp, x) (lp->writerdp(lp, x)) x 239 drivers/net/ethernet/amd/7990.h #define LANCE_ADDR(x) ((int)(x) & ~0xff000000) x 129 drivers/net/ethernet/amd/a2065.c #define LANCE_ADDR(x) ((int)(x) & ~0xff000000) x 70 drivers/net/ethernet/amd/ariadne.c #define swapw(x) (((x >> 8) & 0x00ff) | ((x << 8) & 0xff00)) x 72 drivers/net/ethernet/amd/ariadne.c #define lowb(x) (x & 0xff) x 74 drivers/net/ethernet/amd/ariadne.c #define swhighw(x) ((((x) >> 8) & 0xff00) | (((x) >> 24) & 0x00ff)) x 76 drivers/net/ethernet/amd/ariadne.c #define swloww(x) ((((x) << 8) & 0xff00) | (((x) >> 8) & 0x00ff)) x 980 drivers/net/ethernet/amd/pcnet32.c int x, i; /* counters */ x 1015 drivers/net/ethernet/amd/pcnet32.c for (x = 0; x < numbuffs; x++) { x 1025 drivers/net/ethernet/amd/pcnet32.c lp->tx_skbuff[x] = skb; x 1026 drivers/net/ethernet/amd/pcnet32.c lp->tx_ring[x].length = cpu_to_le16(-skb->len); x 1027 drivers/net/ethernet/amd/pcnet32.c lp->tx_ring[x].misc = 0; x 1038 drivers/net/ethernet/amd/pcnet32.c *packet++ = x; x 1043 drivers/net/ethernet/amd/pcnet32.c lp->tx_dma_addr[x] = x 1046 drivers/net/ethernet/amd/pcnet32.c if (pci_dma_mapping_error(lp->pci_dev, lp->tx_dma_addr[x])) { x 1052 drivers/net/ethernet/amd/pcnet32.c lp->tx_ring[x].base = cpu_to_le32(lp->tx_dma_addr[x]); x 1054 drivers/net/ethernet/amd/pcnet32.c lp->tx_ring[x].status = cpu_to_le16(status); x 1057 drivers/net/ethernet/amd/pcnet32.c x = a->read_bcr(ioaddr, 32); /* set internal loopback in BCR32 */ x 1058 drivers/net/ethernet/amd/pcnet32.c a->write_bcr(ioaddr, 32, x | 0x0002); x 1061 drivers/net/ethernet/amd/pcnet32.c x = a->read_csr(ioaddr, CSR15) & 0xfffc; x 1062 drivers/net/ethernet/amd/pcnet32.c lp->a->write_csr(ioaddr, CSR15, x | 0x0044); x 1068 drivers/net/ethernet/amd/pcnet32.c for (x = 0; x < numbuffs; x++) { x 1071 drivers/net/ethernet/amd/pcnet32.c while ((lp->rx_ring[x].status & teststatus) && (ticks < 200)) { x 1079 drivers/net/ethernet/amd/pcnet32.c netif_err(lp, hw, dev, "Desc %d failed to reset!\n", x); x 1089 drivers/net/ethernet/amd/pcnet32.c for (x = 0; x < numbuffs; x++) { x 1090 drivers/net/ethernet/amd/pcnet32.c netdev_printk(KERN_DEBUG, dev, "Packet %d: ", x); x 1091 drivers/net/ethernet/amd/pcnet32.c skb = lp->rx_skbuff[x]; x 1098 drivers/net/ethernet/amd/pcnet32.c x = 0; x 1100 drivers/net/ethernet/amd/pcnet32.c while (x < numbuffs && !rc) { x 1101 drivers/net/ethernet/amd/pcnet32.c skb = lp->rx_skbuff[x]; x 1102 drivers/net/ethernet/amd/pcnet32.c packet = lp->tx_skbuff[x]->data; x 1112 drivers/net/ethernet/amd/pcnet32.c x++; x 1119 drivers/net/ethernet/amd/pcnet32.c x = a->read_csr(ioaddr, CSR15); x 1120 drivers/net/ethernet/amd/pcnet32.c a->write_csr(ioaddr, CSR15, (x & ~0x0044)); /* reset bits 6 and 2 */ x 1122 drivers/net/ethernet/amd/pcnet32.c x = a->read_bcr(ioaddr, 32); /* reset internal loopback */ x 1123 drivers/net/ethernet/amd/pcnet32.c a->write_bcr(ioaddr, 32, (x & ~0x0002)); x 297 drivers/net/ethernet/amd/sunlance.c #define LANCE_ADDR(x) ((long)(x) & ~0xff000000) x 1363 drivers/net/ethernet/amd/xgbe/xgbe.h #define DBGPR(x...) pr_alert(x) x 1365 drivers/net/ethernet/amd/xgbe/xgbe.h #define DBGPR(x...) do { } while (0) x 1369 drivers/net/ethernet/amd/xgbe/xgbe.h #define DBGPR_MDIO(x...) pr_alert(x) x 1371 drivers/net/ethernet/amd/xgbe/xgbe.h #define DBGPR_MDIO(x...) do { } while (0) x 39 drivers/net/ethernet/apple/bmac.c #define trunc_page(x) ((void *)(((unsigned long)(x)) & ~((unsigned long)(PAGE_SIZE - 1)))) x 40 drivers/net/ethernet/apple/bmac.c #define round_page(x) trunc_page(((unsigned long)(x)) + ((unsigned long)(PAGE_SIZE - 1))) x 161 drivers/net/ethernet/apple/bmac.c #define DBDMA_SET(x) ( ((x) | (x) << 16) ) x 162 drivers/net/ethernet/apple/bmac.c #define DBDMA_CLEAR(x) ( (x) << 16) x 165 drivers/net/ethernet/apple/bmac.c dbdma_st32(volatile __u32 __iomem *a, unsigned long x) x 167 drivers/net/ethernet/apple/bmac.c __asm__ volatile( "stwbrx %0,0,%1" : : "r" (x), "r" (a) : "memory"); x 664 drivers/net/ethernet/apple/mace.c int intr, fs, i, stat, x; x 732 drivers/net/ethernet/apple/mace.c x = (in_8(&mb->fifofc) >> XMTFC_SH) & XMTFC_MASK; x 733 drivers/net/ethernet/apple/mace.c if (x != 0) { x 9 drivers/net/ethernet/apple/mace.h #define REG(x) volatile unsigned char x; char x ## _pad[15] x 29 drivers/net/ethernet/atheros/atl1e/atl1e_param.c #define ATL1E_PARAM(x, desc) \ x 30 drivers/net/ethernet/atheros/atl1e/atl1e_param.c static int x[ATL1E_MAX_NIC + 1] = ATL1E_PARAM_INIT; \ x 31 drivers/net/ethernet/atheros/atl1e/atl1e_param.c static unsigned int num_##x; \ x 32 drivers/net/ethernet/atheros/atl1e/atl1e_param.c module_param_array_named(x, x, int, &num_##x, 0); \ x 33 drivers/net/ethernet/atheros/atl1e/atl1e_param.c MODULE_PARM_DESC(x, desc); x 51 drivers/net/ethernet/aurora/nb8800.h #define MDIO_CMD_ADDR(x) ((x) << 21) x 52 drivers/net/ethernet/aurora/nb8800.h #define MDIO_CMD_REG(x) ((x) << 16) x 53 drivers/net/ethernet/aurora/nb8800.h #define MDIO_CMD_DATA(x) ((x) << 0) x 91 drivers/net/ethernet/aurora/nb8800.h #define TCR_BTS(x) (((x) & 0x7) << 8) x 93 drivers/net/ethernet/aurora/nb8800.h #define TCR_TFI(x) (((x) & 0x7) << 4) x 109 drivers/net/ethernet/aurora/nb8800.h #define TX_BYTES_TRANSFERRED(x) (((x) >> 16) & 0xffff) x 111 drivers/net/ethernet/aurora/nb8800.h #define TX_EARLY_COLLISIONS(x) (((x) >> 3) & 0xf) x 124 drivers/net/ethernet/aurora/nb8800.h #define RCR_BTS(x) (((x) & 7) << 8) x 126 drivers/net/ethernet/aurora/nb8800.h #define RCR_RFI(x) (((x) & 7) << 4) x 142 drivers/net/ethernet/aurora/nb8800.h #define RX_BYTES_TRANSFERRED(x) (((x) >> 16) & 0xFFFF) x 181 drivers/net/ethernet/aurora/nb8800.h #define DESC_BTS(x) (((x) & 0x7) << 16) x 143 drivers/net/ethernet/broadcom/b44.c #define _B44(x...) # x, x 347 drivers/net/ethernet/broadcom/b44.h #define _B44(x) u64 x; x 70 drivers/net/ethernet/broadcom/bnx2.c #define RUN_AT(x) (jiffies + (x)) x 6568 drivers/net/ethernet/broadcom/bnx2.h #define BNX2_NEXT_TX_BD(x) (((x) & (BNX2_MAX_TX_DESC_CNT - 1)) == \ x 6570 drivers/net/ethernet/broadcom/bnx2.h (x) + 2 : (x) + 1 x 6572 drivers/net/ethernet/broadcom/bnx2.h #define BNX2_TX_RING_IDX(x) ((x) & BNX2_MAX_TX_DESC_CNT) x 6574 drivers/net/ethernet/broadcom/bnx2.h #define BNX2_NEXT_RX_BD(x) (((x) & (BNX2_MAX_RX_DESC_CNT - 1)) == \ x 6576 drivers/net/ethernet/broadcom/bnx2.h (x) + 2 : (x) + 1 x 6578 drivers/net/ethernet/broadcom/bnx2.h #define BNX2_RX_RING_IDX(x) ((x) & bp->rx_max_ring_idx) x 6579 drivers/net/ethernet/broadcom/bnx2.h #define BNX2_RX_PG_RING_IDX(x) ((x) & bp->rx_max_pg_ring_idx) x 6581 drivers/net/ethernet/broadcom/bnx2.h #define BNX2_RX_RING(x) (((x) & ~BNX2_MAX_RX_DESC_CNT) >> (BNX2_PAGE_BITS - 4)) x 6582 drivers/net/ethernet/broadcom/bnx2.h #define BNX2_RX_IDX(x) ((x) & BNX2_MAX_RX_DESC_CNT) x 159 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define U64_LO(x) ((u32)(((u64)(x)) & 0xffffffff)) x 160 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define U64_HI(x) ((u32)(((u64)(x)) >> 32)) x 410 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define NEXT_SGE_IDX(x) ((((x) & RX_SGE_MASK) == \ x 412 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1 + NEXT_PAGE_SGE_DESC_CNT : \ x 413 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1) x 414 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define RX_SGE(x) ((x) & MAX_RX_SGE) x 650 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define NEXT_TX_IDX(x) ((((x) & MAX_TX_DESC_CNT) == \ x 652 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1 + NEXT_PAGE_TX_DESC_CNT : \ x 653 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1) x 654 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define TX_BD(x) ((x) & MAX_TX_BD) x 655 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define TX_BD_POFF(x) ((x) & MAX_TX_DESC_CNT) x 708 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define NEXT_RX_IDX(x) ((((x) & RX_DESC_MASK) == \ x 710 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1 + NEXT_PAGE_RX_DESC_CNT : \ x 711 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1) x 712 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define RX_BD(x) ((x) & MAX_RX_BD) x 726 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define NEXT_RCQ_IDX(x) ((((x) & MAX_RCQ_DESC_CNT) == \ x 728 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1 + NEXT_PAGE_RCQ_DESC_CNT : \ x 729 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x) + 1) x 730 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define RCQ_BD(x) ((x) & MAX_RCQ_BD) x 754 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define SW_CID(x) (le32_to_cpu(x) & BNX2X_SWCID_MASK) x 755 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define CQE_CMD(x) (le32_to_cpu(x) >> \ x 1224 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define NEXT_EQ_IDX(x) ((((x) & EQ_DESC_MAX_PAGE) == \ x 1225 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (EQ_DESC_MAX_PAGE - 1)) ? (x) + 2 : (x) + 1) x 1228 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define EQ_DESC(x) ((x) & EQ_DESC_MASK) x 2083 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define BNX2X_ILT_ZALLOC(x, y, size) \ x 2084 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL) x 2086 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define BNX2X_ILT_FREE(x, y, size) \ x 2088 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h if (x) { \ x 2089 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h dma_free_coherent(&bp->pdev->dev, size, x, y); \ x 2090 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h x = NULL; \ x 2095 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define ILOG2(x) (ilog2((x))) x 2111 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define ONCHIP_ADDR1(x) ((u32)(((u64)x >> 12) & 0xFFFFFFFF)) x 2112 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define ONCHIP_ADDR2(x) ((u32)((1 << 20) | ((u64)x >> 44))) x 2225 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ x 2227 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (x)) x 2389 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define CAM_IS_INVALID(x) \ x 2390 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h (GET_FLAG(x.flags, \ x 36 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h #define BNX2X_PCI_FREE(x, y, size) \ x 38 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h if (x) { \ x 39 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \ x 40 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h x = NULL; \ x 45 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h #define BNX2X_FREE(x) \ x 47 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h if (x) { \ x 48 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h kfree((void *)x); \ x 49 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h x = NULL; \ x 55 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ x 56 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h if (x) \ x 59 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h (unsigned long long)(*y), x); \ x 60 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h x; \ x 64 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ x 65 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h if (x) { \ x 66 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h memset(x, 0xff, size); \ x 69 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h (unsigned long long)(*y), x); \ x 71 drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h x; \ x 1230 drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) x 299 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h #define BITS_TO_BYTES(x) ((x)/8) x 34 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h #define BNX2X_ILT_FREE(x, y, sz) x 38 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h #define BNX2X_ILT_ZALLOC(x, y, sz) x 42 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h #define ILOG2(x) x x 614 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h #define ILT_ADDR1(x) ((u32)(((u64)x >> 12) & 0xFFFFFFFF)) x 615 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h #define ILT_ADDR2(x) ((u32)((1 << 20) | ((u64)x >> 44))) x 604 drivers/net/ethernet/broadcom/bnxt/bnxt.h #define RX_RING(x) (((x) & ~(RX_DESC_CNT - 1)) >> (BNXT_PAGE_SHIFT - 4)) x 605 drivers/net/ethernet/broadcom/bnxt/bnxt.h #define RX_IDX(x) ((x) & (RX_DESC_CNT - 1)) x 607 drivers/net/ethernet/broadcom/bnxt/bnxt.h #define TX_RING(x) (((x) & ~(TX_DESC_CNT - 1)) >> (BNXT_PAGE_SHIFT - 4)) x 608 drivers/net/ethernet/broadcom/bnxt/bnxt.h #define TX_IDX(x) ((x) & (TX_DESC_CNT - 1)) x 610 drivers/net/ethernet/broadcom/bnxt/bnxt.h #define CP_RING(x) (((x) & ~(CP_DESC_CNT - 1)) >> (BNXT_PAGE_SHIFT - 4)) x 611 drivers/net/ethernet/broadcom/bnxt/bnxt.h #define CP_IDX(x) ((x) & (CP_DESC_CNT - 1)) x 1211 drivers/net/ethernet/broadcom/bnxt/bnxt.h #define BNXT_LED_ALT_BLINK_CAP(x) ((x) & \ x 75 drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h #define BNXT_LED_DFLT_ENABLES(x) \ x 76 drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h cpu_to_le32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x))) x 1454 drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c #define low_bits(x, mask) ((x) & (mask)) x 1455 drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c #define high_bits(x, mask) ((x) & ~(mask)) x 92 drivers/net/ethernet/broadcom/cnic.h #define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BNX2_PAGE_BITS - 5)) x 93 drivers/net/ethernet/broadcom/cnic.h #define KWQ_IDX(x) ((x) & MAX_KWQE_CNT) x 95 drivers/net/ethernet/broadcom/cnic.h #define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BNX2_PAGE_BITS - 5)) x 96 drivers/net/ethernet/broadcom/cnic.h #define KCQ_IDX(x) ((x) & MAX_KCQE_CNT) x 98 drivers/net/ethernet/broadcom/cnic.h #define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) == \ x 100 drivers/net/ethernet/broadcom/cnic.h (x) + 2 : (x) + 1 x 102 drivers/net/ethernet/broadcom/cnic.h #define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp) x 103 drivers/net/ethernet/broadcom/cnic.h #define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp) x 104 drivers/net/ethernet/broadcom/cnic.h #define BNX2X_KWQ_DATA(cp, x) \ x 105 drivers/net/ethernet/broadcom/cnic.h &(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)] x 377 drivers/net/ethernet/broadcom/cnic.h #define BNX2X_NEXT_RCQE(x) (((x) & BNX2X_MAX_RCQ_DESC_CNT) == \ x 379 drivers/net/ethernet/broadcom/cnic.h ((x) + 2) : ((x) + 1) x 405 drivers/net/ethernet/broadcom/cnic.h #define BNX2X_HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ x 406 drivers/net/ethernet/broadcom/cnic.h (BP_VN(bp) << 17) | (x)) x 408 drivers/net/ethernet/broadcom/cnic.h #define BNX2X_SW_CID(x) (x & 0x1ffff) x 44 drivers/net/ethernet/broadcom/cnic_if.h #define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT) x 146 drivers/net/ethernet/broadcom/sb1250-mac.c #define NUMCACHEBLKS(x) DIV_ROUND_UP(x, SMP_CACHE_BYTES) x 172 drivers/net/ethernet/broadcom/tg3.c #define TG3_RX_DMA_TO_MAP_SZ(x) ((x) + TG3_DMA_BYTE_ENAB) x 517 drivers/net/ethernet/calxeda/xgmac.c struct xgmac_extra_stats *x = &priv->xstats; x 525 drivers/net/ethernet/calxeda/xgmac.c x->tx_jabber++; x 527 drivers/net/ethernet/calxeda/xgmac.c x->tx_frame_flushed++; x 531 drivers/net/ethernet/calxeda/xgmac.c x->tx_ip_header_error++; x 533 drivers/net/ethernet/calxeda/xgmac.c x->tx_local_fault++; x 535 drivers/net/ethernet/calxeda/xgmac.c x->tx_remote_fault++; x 537 drivers/net/ethernet/calxeda/xgmac.c x->tx_payload_error++; x 544 drivers/net/ethernet/calxeda/xgmac.c struct xgmac_extra_stats *x = &priv->xstats; x 551 drivers/net/ethernet/calxeda/xgmac.c x->rx_da_filter_fail++; x 577 drivers/net/ethernet/calxeda/xgmac.c x->rx_ip_header_error++; x 579 drivers/net/ethernet/calxeda/xgmac.c x->rx_payload_error++; x 1384 drivers/net/ethernet/calxeda/xgmac.c struct xgmac_extra_stats *x = &priv->xstats; x 1396 drivers/net/ethernet/calxeda/xgmac.c x->tx_jabber++; x 1399 drivers/net/ethernet/calxeda/xgmac.c x->rx_buf_unav++; x 1402 drivers/net/ethernet/calxeda/xgmac.c x->rx_process_stopped++; x 1406 drivers/net/ethernet/calxeda/xgmac.c x->tx_early++; x 1410 drivers/net/ethernet/calxeda/xgmac.c x->tx_process_stopped++; x 1415 drivers/net/ethernet/calxeda/xgmac.c x->fatal_bus_error++; x 35 drivers/net/ethernet/cavium/thunder/thunder_bgx.c #define BGX_MCAST_MODE(x) (x << 1) x 58 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define RX_DMACX_CAM_LMACID(x) (((u64)x) << 49) x 166 drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h #define V_OPCODE(x) ((x) << S_OPCODE) x 167 drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h #define G_OPCODE(x) (((x) >> S_OPCODE) & 0xFF) x 168 drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h #define G_TID(x) ((x) & 0xFFFFFF) x 58 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_MDI_ENABLE(x) ((x) << S_MI1_MDI_ENABLE) x 62 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_MDI_INVERT(x) ((x) << S_MI1_MDI_INVERT) x 66 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_PREAMBLE_ENABLE(x) ((x) << S_MI1_PREAMBLE_ENABLE) x 71 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_SOF(x) ((x) << S_MI1_SOF) x 72 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define G_MI1_SOF(x) (((x) >> S_MI1_SOF) & M_MI1_SOF) x 76 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_CLK_DIV(x) ((x) << S_MI1_CLK_DIV) x 77 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define G_MI1_CLK_DIV(x) (((x) >> S_MI1_CLK_DIV) & M_MI1_CLK_DIV) x 83 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_REG_ADDR(x) ((x) << S_MI1_REG_ADDR) x 84 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define G_MI1_REG_ADDR(x) (((x) >> S_MI1_REG_ADDR) & M_MI1_REG_ADDR) x 88 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_PHY_ADDR(x) ((x) << S_MI1_PHY_ADDR) x 89 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define G_MI1_PHY_ADDR(x) (((x) >> S_MI1_PHY_ADDR) & M_MI1_PHY_ADDR) x 95 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_DATA(x) ((x) << S_MI1_DATA) x 96 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define G_MI1_DATA(x) (((x) >> S_MI1_DATA) & M_MI1_DATA) x 102 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_OP(x) ((x) << S_MI1_OP) x 103 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define G_MI1_OP(x) (((x) >> S_MI1_OP) & M_MI1_OP) x 106 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_ADDR_AUTOINC(x) ((x) << S_MI1_ADDR_AUTOINC) x 110 drivers/net/ethernet/chelsio/cxgb/elmer0.h #define V_MI1_OP_BUSY(x) ((x) << S_MI1_OP_BUSY) x 56 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_CLK_DIV(x) ((x) << S_MI0_CLK_DIV) x 57 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_MI0_CLK_DIV(x) (((x) >> S_MI0_CLK_DIV) & M_MI0_CLK_DIV) x 61 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_CLK_CNT(x) ((x) << S_MI0_CLK_CNT) x 62 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_MI0_CLK_CNT(x) (((x) >> S_MI0_CLK_CNT) & M_MI0_CLK_CNT) x 67 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_CSR_POLL(x) ((x) << S_MI0_CSR_POLL) x 71 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_PREAMBLE(x) ((x) << S_MI0_PREAMBLE) x 75 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_INTR_ENABLE(x) ((x) << S_MI0_INTR_ENABLE) x 79 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_BUSY(x) ((x) << S_MI0_BUSY) x 83 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_MDIO(x) ((x) << S_MI0_MDIO) x 90 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_PHY_REG_ADDR(x) ((x) << S_MI0_PHY_REG_ADDR) x 91 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_MI0_PHY_REG_ADDR(x) (((x) >> S_MI0_PHY_REG_ADDR) & M_MI0_PHY_REG_ADDR) x 95 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MI0_PHY_ADDR(x) ((x) << S_MI0_PHY_ADDR) x 96 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_MI0_PHY_ADDR(x) (((x) >> S_MI0_PHY_ADDR) & M_MI0_PHY_ADDR) x 108 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_INTERFACE(x) ((x) << S_INTERFACE) x 109 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_INTERFACE(x) (((x) >> S_INTERFACE) & M_INTERFACE) x 112 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_TX_ENABLE(x) ((x) << S_MAC_TX_ENABLE) x 116 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_RX_ENABLE(x) ((x) << S_MAC_RX_ENABLE) x 120 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_LB_ENABLE(x) ((x) << S_MAC_LB_ENABLE) x 125 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_SPEED(x) ((x) << S_MAC_SPEED) x 126 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_MAC_SPEED(x) (((x) >> S_MAC_SPEED) & M_MAC_SPEED) x 129 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_HD_FC_ENABLE(x) ((x) << S_MAC_HD_FC_ENABLE) x 133 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_HALF_DUPLEX(x) ((x) << S_MAC_HALF_DUPLEX) x 137 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_PROMISC(x) ((x) << S_MAC_PROMISC) x 141 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_MC_ENABLE(x) ((x) << S_MAC_MC_ENABLE) x 145 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_RESET(x) ((x) << S_MAC_RESET) x 149 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_RX_PAUSE_ENABLE(x) ((x) << S_MAC_RX_PAUSE_ENABLE) x 153 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_TX_PAUSE_ENABLE(x) ((x) << S_MAC_TX_PAUSE_ENABLE) x 157 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_LWM_ENABLE(x) ((x) << S_MAC_LWM_ENABLE) x 161 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_MAGIC_PKT_ENABLE(x) ((x) << S_MAC_MAGIC_PKT_ENABLE) x 165 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_ISL_ENABLE(x) ((x) << S_MAC_ISL_ENABLE) x 169 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_JUMBO_ENABLE(x) ((x) << S_MAC_JUMBO_ENABLE) x 173 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_RX_PAD_ENABLE(x) ((x) << S_MAC_RX_PAD_ENABLE) x 177 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_RX_CRC_ENABLE(x) ((x) << S_MAC_RX_CRC_ENABLE) x 184 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_IFS2(x) ((x) << S_MAC_IFS2) x 185 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_MAC_IFS2(x) (((x) >> S_MAC_IFS2) & M_MAC_IFS2) x 189 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_MAC_IFS1(x) ((x) << S_MAC_IFS1) x 190 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_MAC_IFS1(x) (((x) >> S_MAC_IFS1) & M_MAC_IFS1) x 206 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_TXF_READ_THRESHOLD(x) ((x) << S_TXF_READ_THRESHOLD) x 207 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_TXF_READ_THRESHOLD(x) (((x) >> S_TXF_READ_THRESHOLD) & M_TXF_READ_THRESHOLD) x 211 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define V_TXF_WRITE_THRESHOLD(x) ((x) << S_TXF_WRITE_THRESHOLD) x 212 drivers/net/ethernet/chelsio/cxgb/fpga_defs.h #define G_TXF_WRITE_THRESHOLD(x) (((x) >> S_TXF_WRITE_THRESHOLD) & M_TXF_WRITE_THRESHOLD) x 72 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define V_PSCR_MDI_XOVER_MODE(x) ((x) << S_PSCR_MDI_XOVER_MODE) x 73 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define G_PSCR_MDI_XOVER_MODE(x) (((x) >> S_PSCR_MDI_XOVER_MODE) & M_PSCR_MDI_XOVER_MODE) x 81 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define V_DOWNSHIFT_CNT(x) ((x) << S_DOWNSHIFT_CNT) x 82 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define G_DOWNSHIFT_CNT(x) (((x) >> S_DOWNSHIFT_CNT) & M_DOWNSHIFT_CNT) x 108 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define V_PSSR_CABLE_LEN(x) ((x) << S_PSSR_CABLE_LEN) x 109 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define G_PSSR_CABLE_LEN(x) (((x) >> S_PSSR_CABLE_LEN) & M_PSSR_CABLE_LEN) x 125 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define V_PSSR_SPEED(x) ((x) << S_PSSR_SPEED) x 126 drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h #define G_PSSR_SPEED(x) (((x) >> S_PSSR_SPEED) & M_PSSR_SPEED) x 687 drivers/net/ethernet/chelsio/cxgb/pm3393.c u32 x; x 759 drivers/net/ethernet/chelsio/cxgb/pm3393.c x = (SUNI1x10GEXP_BITMSK_TOP_PL4_ID_DOOL x 764 drivers/net/ethernet/chelsio/cxgb/pm3393.c is_pl4_outof_lock = (val & x); x 45 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDQ0_ENABLE(x) ((x) << S_CMDQ0_ENABLE) x 49 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDQ1_ENABLE(x) ((x) << S_CMDQ1_ENABLE) x 53 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL0_ENABLE(x) ((x) << S_FL0_ENABLE) x 57 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL1_ENABLE(x) ((x) << S_FL1_ENABLE) x 61 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CPL_ENABLE(x) ((x) << S_CPL_ENABLE) x 65 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RESPONSE_QUEUE_ENABLE(x) ((x) << S_RESPONSE_QUEUE_ENABLE) x 70 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDQ_PRIORITY(x) ((x) << S_CMDQ_PRIORITY) x 71 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CMDQ_PRIORITY(x) (((x) >> S_CMDQ_PRIORITY) & M_CMDQ_PRIORITY) x 74 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DISABLE_CMDQ0_GTS(x) ((x) << S_DISABLE_CMDQ0_GTS) x 78 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DISABLE_CMDQ1_GTS(x) ((x) << S_DISABLE_CMDQ1_GTS) x 82 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DISABLE_FL0_GTS(x) ((x) << S_DISABLE_FL0_GTS) x 86 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DISABLE_FL1_GTS(x) ((x) << S_DISABLE_FL1_GTS) x 90 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ENABLE_BIG_ENDIAN(x) ((x) << S_ENABLE_BIG_ENDIAN) x 94 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL_SELECTION_CRITERIA(x) ((x) << S_FL_SELECTION_CRITERIA) x 98 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ISCSI_COALESCE(x) ((x) << S_ISCSI_COALESCE) x 103 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RX_PKT_OFFSET(x) ((x) << S_RX_PKT_OFFSET) x 104 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RX_PKT_OFFSET(x) (((x) >> S_RX_PKT_OFFSET) & M_RX_PKT_OFFSET) x 107 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_VLAN_XTRACT(x) ((x) << S_VLAN_XTRACT) x 123 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDQ0_SIZE(x) ((x) << S_CMDQ0_SIZE) x 124 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CMDQ0_SIZE(x) (((x) >> S_CMDQ0_SIZE) & M_CMDQ0_SIZE) x 130 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL0_SIZE(x) ((x) << S_FL0_SIZE) x 131 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_FL0_SIZE(x) (((x) >> S_FL0_SIZE) & M_FL0_SIZE) x 137 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RESPQ_SIZE(x) ((x) << S_RESPQ_SIZE) x 138 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RESPQ_SIZE(x) (((x) >> S_RESPQ_SIZE) & M_RESPQ_SIZE) x 146 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL_THRESHOLD(x) ((x) << S_FL_THRESHOLD) x 147 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_FL_THRESHOLD(x) (((x) >> S_FL_THRESHOLD) & M_FL_THRESHOLD) x 153 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RESPQ_CREDIT(x) ((x) << S_RESPQ_CREDIT) x 154 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RESPQ_CREDIT(x) (((x) >> S_RESPQ_CREDIT) & M_RESPQ_CREDIT) x 160 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SLEEPING(x) ((x) << S_SLEEPING) x 161 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SLEEPING(x) (((x) >> S_SLEEPING) & M_SLEEPING) x 167 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INTERRUPT_TIMER_COUNT(x) ((x) << S_INTERRUPT_TIMER_COUNT) x 168 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_INTERRUPT_TIMER_COUNT(x) (((x) >> S_INTERRUPT_TIMER_COUNT) & M_INTERRUPT_TIMER_COUNT) x 174 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDQ0_POINTER(x) ((x) << S_CMDQ0_POINTER) x 175 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CMDQ0_POINTER(x) (((x) >> S_CMDQ0_POINTER) & M_CMDQ0_POINTER) x 178 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CURRENT_GENERATION_BIT(x) ((x) << S_CURRENT_GENERATION_BIT) x 185 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDQ1_POINTER(x) ((x) << S_CMDQ1_POINTER) x 186 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CMDQ1_POINTER(x) (((x) >> S_CMDQ1_POINTER) & M_CMDQ1_POINTER) x 192 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL0_POINTER(x) ((x) << S_FL0_POINTER) x 193 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_FL0_POINTER(x) (((x) >> S_FL0_POINTER) & M_FL0_POINTER) x 199 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL1_POINTER(x) ((x) << S_FL1_POINTER) x 200 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_FL1_POINTER(x) (((x) >> S_FL1_POINTER) & M_FL1_POINTER) x 206 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DAY(x) ((x) << S_DAY) x 207 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DAY(x) (((x) >> S_DAY) & M_DAY) x 211 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MONTH(x) ((x) << S_MONTH) x 212 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MONTH(x) (((x) >> S_MONTH) & M_MONTH) x 218 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDQ1_SIZE(x) ((x) << S_CMDQ1_SIZE) x 219 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CMDQ1_SIZE(x) (((x) >> S_CMDQ1_SIZE) & M_CMDQ1_SIZE) x 225 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL1_SIZE(x) ((x) << S_FL1_SIZE) x 226 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_FL1_SIZE(x) (((x) >> S_FL1_SIZE) & M_FL1_SIZE) x 231 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RESPQ_EXHAUSTED(x) ((x) << S_RESPQ_EXHAUSTED) x 235 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RESPQ_OVERFLOW(x) ((x) << S_RESPQ_OVERFLOW) x 239 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FL_EXHAUSTED(x) ((x) << S_FL_EXHAUSTED) x 243 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PACKET_TOO_BIG(x) ((x) << S_PACKET_TOO_BIG) x 247 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PACKET_MISMATCH(x) ((x) << S_PACKET_MISMATCH) x 257 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CLK_ENABLE(x) ((x) << S_CLK_ENABLE) x 261 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_READY(x) ((x) << S_READY) x 266 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_READ_TO_WRITE_DELAY(x) ((x) << S_READ_TO_WRITE_DELAY) x 267 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_READ_TO_WRITE_DELAY(x) (((x) >> S_READ_TO_WRITE_DELAY) & M_READ_TO_WRITE_DELAY) x 271 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_WRITE_TO_READ_DELAY(x) ((x) << S_WRITE_TO_READ_DELAY) x 272 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_WRITE_TO_READ_DELAY(x) (((x) >> S_WRITE_TO_READ_DELAY) & M_WRITE_TO_READ_DELAY) x 276 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_BANK_CYCLE(x) ((x) << S_MC3_BANK_CYCLE) x 277 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC3_BANK_CYCLE(x) (((x) >> S_MC3_BANK_CYCLE) & M_MC3_BANK_CYCLE) x 281 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_REFRESH_CYCLE(x) ((x) << S_REFRESH_CYCLE) x 282 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_REFRESH_CYCLE(x) (((x) >> S_REFRESH_CYCLE) & M_REFRESH_CYCLE) x 286 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PRECHARGE_CYCLE(x) ((x) << S_PRECHARGE_CYCLE) x 287 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_PRECHARGE_CYCLE(x) (((x) >> S_PRECHARGE_CYCLE) & M_PRECHARGE_CYCLE) x 290 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ACTIVE_TO_READ_WRITE_DELAY(x) ((x) << S_ACTIVE_TO_READ_WRITE_DELAY) x 295 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ACTIVE_TO_PRECHARGE_DELAY(x) ((x) << S_ACTIVE_TO_PRECHARGE_DELAY) x 296 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ACTIVE_TO_PRECHARGE_DELAY(x) (((x) >> S_ACTIVE_TO_PRECHARGE_DELAY) & M_ACTIVE_TO_PRECHARGE_DELAY) x 300 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_WRITE_RECOVERY_DELAY(x) ((x) << S_WRITE_RECOVERY_DELAY) x 301 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_WRITE_RECOVERY_DELAY(x) (((x) >> S_WRITE_RECOVERY_DELAY) & M_WRITE_RECOVERY_DELAY) x 305 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DENSITY(x) ((x) << S_DENSITY) x 306 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DENSITY(x) (((x) >> S_DENSITY) & M_DENSITY) x 309 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ORGANIZATION(x) ((x) << S_ORGANIZATION) x 313 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_BANKS(x) ((x) << S_BANKS) x 317 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_UNREGISTERED(x) ((x) << S_UNREGISTERED) x 322 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_WIDTH(x) ((x) << S_MC3_WIDTH) x 323 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC3_WIDTH(x) (((x) >> S_MC3_WIDTH) & M_MC3_WIDTH) x 326 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_SLOW(x) ((x) << S_MC3_SLOW) x 333 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_MODE(x) ((x) << S_MC3_MODE) x 334 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC3_MODE(x) (((x) >> S_MC3_MODE) & M_MC3_MODE) x 337 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_BUSY(x) ((x) << S_BUSY) x 344 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_EXTENDED_MODE(x) ((x) << S_MC3_EXTENDED_MODE) x 345 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC3_EXTENDED_MODE(x) (((x) >> S_MC3_EXTENDED_MODE) & M_MC3_EXTENDED_MODE) x 351 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_REFRESH_ENABLE(x) ((x) << S_REFRESH_ENABLE) x 356 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_REFRESH_DIVISOR(x) ((x) << S_REFRESH_DIVISOR) x 357 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_REFRESH_DIVISOR(x) (((x) >> S_REFRESH_DIVISOR) & M_REFRESH_DIVISOR) x 362 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MASTER_DLL_RESET(x) ((x) << S_MASTER_DLL_RESET) x 367 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MASTER_DLL_TAP_COUNT(x) ((x) << S_MASTER_DLL_TAP_COUNT) x 368 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MASTER_DLL_TAP_COUNT(x) (((x) >> S_MASTER_DLL_TAP_COUNT) & M_MASTER_DLL_TAP_COUNT) x 371 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MASTER_DLL_LOCKED(x) ((x) << S_MASTER_DLL_LOCKED) x 375 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MASTER_DLL_MAX_TAP_COUNT(x) ((x) << S_MASTER_DLL_MAX_TAP_COUNT) x 380 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MASTER_DLL_TAP_COUNT_OFFSET(x) ((x) << S_MASTER_DLL_TAP_COUNT_OFFSET) x 381 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MASTER_DLL_TAP_COUNT_OFFSET(x) (((x) >> S_MASTER_DLL_TAP_COUNT_OFFSET) & M_MASTER_DLL_TAP_COUNT_OFFSET) x 384 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SLAVE_DLL_RESET(x) ((x) << S_SLAVE_DLL_RESET) x 389 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SLAVE_DLL_DELTA(x) ((x) << S_SLAVE_DLL_DELTA) x 390 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SLAVE_DLL_DELTA(x) (((x) >> S_SLAVE_DLL_DELTA) & M_SLAVE_DLL_DELTA) x 394 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x) ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT) x 395 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x) (((x) >> S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT) & M_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT) x 398 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE(x) ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE) x 403 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SLAVE_DELAY_LINE_TAP_COUNT(x) ((x) << S_SLAVE_DELAY_LINE_TAP_COUNT) x 404 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SLAVE_DELAY_LINE_TAP_COUNT(x) (((x) >> S_SLAVE_DELAY_LINE_TAP_COUNT) & M_SLAVE_DELAY_LINE_TAP_COUNT) x 409 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ECC_GENERATION_ENABLE(x) ((x) << S_ECC_GENERATION_ENABLE) x 413 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ECC_CHECK_ENABLE(x) ((x) << S_ECC_CHECK_ENABLE) x 418 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CORRECTABLE_ERROR_COUNT(x) ((x) << S_CORRECTABLE_ERROR_COUNT) x 419 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CORRECTABLE_ERROR_COUNT(x) (((x) >> S_CORRECTABLE_ERROR_COUNT) & M_CORRECTABLE_ERROR_COUNT) x 423 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_UNCORRECTABLE_ERROR_COUNT(x) ((x) << S_UNCORRECTABLE_ERROR_COUNT) x 424 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_UNCORRECTABLE_ERROR_COUNT(x) (((x) >> S_UNCORRECTABLE_ERROR_COUNT) & M_UNCORRECTABLE_ERROR_COUNT) x 430 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_CE_ADDR(x) ((x) << S_MC3_CE_ADDR) x 431 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC3_CE_ADDR(x) (((x) >> S_MC3_CE_ADDR) & M_MC3_CE_ADDR) x 442 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_UE_ADDR(x) ((x) << S_MC3_UE_ADDR) x 443 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC3_UE_ADDR(x) (((x) >> S_MC3_UE_ADDR) & M_MC3_UE_ADDR) x 459 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_BACK_DOOR_OPERATION(x) ((x) << S_BACK_DOOR_OPERATION) x 468 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_OP(x) ((x) << S_OP) x 473 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DATA_PATTERN(x) ((x) << S_DATA_PATTERN) x 474 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DATA_PATTERN(x) (((x) >> S_DATA_PATTERN) & M_DATA_PATTERN) x 477 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CONTINUOUS(x) ((x) << S_CONTINUOUS) x 483 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_CORR_ERR(x) ((x) << S_MC3_CORR_ERR) x 487 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_UNCORR_ERR(x) ((x) << S_MC3_UNCORR_ERR) x 492 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_PARITY_ERR(x) ((x) << S_MC3_PARITY_ERR) x 493 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC3_PARITY_ERR(x) (((x) >> S_MC3_PARITY_ERR) & M_MC3_PARITY_ERR) x 496 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC3_ADDR_ERR(x) ((x) << S_MC3_ADDR_ERR) x 505 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_POWER_UP(x) ((x) << S_POWER_UP) x 510 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_BANK_CYCLE(x) ((x) << S_MC4_BANK_CYCLE) x 511 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC4_BANK_CYCLE(x) (((x) >> S_MC4_BANK_CYCLE) & M_MC4_BANK_CYCLE) x 514 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_NARROW(x) ((x) << S_MC4_NARROW) x 518 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_SLOW(x) ((x) << S_MC4_SLOW) x 523 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4A_WIDTH(x) ((x) << S_MC4A_WIDTH) x 524 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC4A_WIDTH(x) (((x) >> S_MC4A_WIDTH) & M_MC4A_WIDTH) x 527 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4A_SLOW(x) ((x) << S_MC4A_SLOW) x 534 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_MODE(x) ((x) << S_MC4_MODE) x 535 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC4_MODE(x) (((x) >> S_MC4_MODE) & M_MC4_MODE) x 541 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_EXTENDED_MODE(x) ((x) << S_MC4_EXTENDED_MODE) x 542 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC4_EXTENDED_MODE(x) (((x) >> S_MC4_EXTENDED_MODE) & M_MC4_EXTENDED_MODE) x 551 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_CE_ADDR(x) ((x) << S_MC4_CE_ADDR) x 552 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC4_CE_ADDR(x) (((x) >> S_MC4_CE_ADDR) & M_MC4_CE_ADDR) x 563 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_UE_ADDR(x) ((x) << S_MC4_UE_ADDR) x 564 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC4_UE_ADDR(x) (((x) >> S_MC4_UE_ADDR) & M_MC4_UE_ADDR) x 575 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_BACK_DOOR_ADDR(x) ((x) << S_MC4_BACK_DOOR_ADDR) x 576 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MC4_BACK_DOOR_ADDR(x) (((x) >> S_MC4_BACK_DOOR_ADDR) & M_MC4_BACK_DOOR_ADDR) x 586 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_OPERATION(x) ((x) << S_OPERATION) x 596 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_CORR_ERR(x) ((x) << S_MC4_CORR_ERR) x 600 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_UNCORR_ERR(x) ((x) << S_MC4_UNCORR_ERR) x 604 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC4_ADDR_ERR(x) ((x) << S_MC4_ADDR_ERR) x 614 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TPI_ADDRESS(x) ((x) << S_TPI_ADDRESS) x 615 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TPI_ADDRESS(x) (((x) >> S_TPI_ADDRESS) & M_TPI_ADDRESS) x 622 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TPIWR(x) ((x) << S_TPIWR) x 626 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TPIRDY(x) ((x) << S_TPIRDY) x 630 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INT_DIR(x) ((x) << S_INT_DIR) x 637 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TPIPAR(x) ((x) << S_TPIPAR) x 638 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TPIPAR(x) (((x) >> S_TPIPAR) & M_TPIPAR) x 645 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_CSPI_TUNNEL(x) ((x) << S_TP_IN_CSPI_TUNNEL) x 649 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_CSPI_ETHERNET(x) ((x) << S_TP_IN_CSPI_ETHERNET) x 653 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_CSPI_CPL(x) ((x) << S_TP_IN_CSPI_CPL) x 657 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_CSPI_POS(x) ((x) << S_TP_IN_CSPI_POS) x 661 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_CSPI_CHECK_IP_CSUM(x) ((x) << S_TP_IN_CSPI_CHECK_IP_CSUM) x 665 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_CSPI_CHECK_TCP_CSUM(x) ((x) << S_TP_IN_CSPI_CHECK_TCP_CSUM) x 669 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_ESPI_TUNNEL(x) ((x) << S_TP_IN_ESPI_TUNNEL) x 673 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_ESPI_ETHERNET(x) ((x) << S_TP_IN_ESPI_ETHERNET) x 677 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_ESPI_CPL(x) ((x) << S_TP_IN_ESPI_CPL) x 681 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_ESPI_POS(x) ((x) << S_TP_IN_ESPI_POS) x 685 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_ESPI_CHECK_IP_CSUM(x) ((x) << S_TP_IN_ESPI_CHECK_IP_CSUM) x 689 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_IN_ESPI_CHECK_TCP_CSUM(x) ((x) << S_TP_IN_ESPI_CHECK_TCP_CSUM) x 693 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_OFFLOAD_DISABLE(x) ((x) << S_OFFLOAD_DISABLE) x 699 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_C_ETH(x) ((x) << S_TP_OUT_C_ETH) x 703 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_CSPI_CPL(x) ((x) << S_TP_OUT_CSPI_CPL) x 707 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_CSPI_POS(x) ((x) << S_TP_OUT_CSPI_POS) x 711 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_CSPI_GENERATE_IP_CSUM(x) ((x) << S_TP_OUT_CSPI_GENERATE_IP_CSUM) x 715 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_CSPI_GENERATE_TCP_CSUM(x) ((x) << S_TP_OUT_CSPI_GENERATE_TCP_CSUM) x 719 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_ESPI_ETHERNET(x) ((x) << S_TP_OUT_ESPI_ETHERNET) x 723 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_ESPI_TAG_ETHERNET(x) ((x) << S_TP_OUT_ESPI_TAG_ETHERNET) x 727 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_ESPI_CPL(x) ((x) << S_TP_OUT_ESPI_CPL) x 731 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_ESPI_POS(x) ((x) << S_TP_OUT_ESPI_POS) x 735 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_ESPI_GENERATE_IP_CSUM(x) ((x) << S_TP_OUT_ESPI_GENERATE_IP_CSUM) x 739 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_OUT_ESPI_GENERATE_TCP_CSUM(x) ((x) << S_TP_OUT_ESPI_GENERATE_TCP_CSUM) x 746 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_IP_TTL(x) ((x) << S_IP_TTL) x 747 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_IP_TTL(x) (((x) >> S_IP_TTL) & M_IP_TTL) x 751 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCAM_SERVER_REGION_USAGE(x) ((x) << S_TCAM_SERVER_REGION_USAGE) x 752 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TCAM_SERVER_REGION_USAGE(x) (((x) >> S_TCAM_SERVER_REGION_USAGE) & M_TCAM_SERVER_REGION_USAGE) x 755 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_QOS_MAPPING(x) ((x) << S_QOS_MAPPING) x 759 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCP_CSUM(x) ((x) << S_TCP_CSUM) x 763 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_UDP_CSUM(x) ((x) << S_UDP_CSUM) x 767 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_IP_CSUM(x) ((x) << S_IP_CSUM) x 771 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_IP_ID_SPLIT(x) ((x) << S_IP_ID_SPLIT) x 775 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PATH_MTU(x) ((x) << S_PATH_MTU) x 780 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_5TUPLE_LOOKUP(x) ((x) << S_5TUPLE_LOOKUP) x 781 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_5TUPLE_LOOKUP(x) (((x) >> S_5TUPLE_LOOKUP) & M_5TUPLE_LOOKUP) x 784 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_IP_FRAGMENT_DROP(x) ((x) << S_IP_FRAGMENT_DROP) x 788 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PING_DROP(x) ((x) << S_PING_DROP) x 792 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PROTECT_MODE(x) ((x) << S_PROTECT_MODE) x 796 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SYN_COOKIE_ALGORITHM(x) ((x) << S_SYN_COOKIE_ALGORITHM) x 800 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ATTACK_FILTER(x) ((x) << S_ATTACK_FILTER) x 804 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INTERFACE_TYPE(x) ((x) << S_INTERFACE_TYPE) x 808 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DISABLE_RX_FLOW_CONTROL(x) ((x) << S_DISABLE_RX_FLOW_CONTROL) x 813 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SYN_COOKIE_PARAMETER(x) ((x) << S_SYN_COOKIE_PARAMETER) x 814 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SYN_COOKIE_PARAMETER(x) (((x) >> S_SYN_COOKIE_PARAMETER) & M_SYN_COOKIE_PARAMETER) x 822 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CM_MEMMGR_BASE(x) ((x) << S_CM_MEMMGR_BASE) x 823 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CM_MEMMGR_BASE(x) (((x) >> S_CM_MEMMGR_BASE) & M_CM_MEMMGR_BASE) x 829 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CM_TIMER_BASE(x) ((x) << S_CM_TIMER_BASE) x 830 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CM_TIMER_BASE(x) (((x) >> S_CM_TIMER_BASE) & M_CM_TIMER_BASE) x 844 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TIMESTAMP(x) ((x) << S_TIMESTAMP) x 845 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TIMESTAMP(x) (((x) >> S_TIMESTAMP) & M_TIMESTAMP) x 849 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_WINDOW_SCALE(x) ((x) << S_WINDOW_SCALE) x 850 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_WINDOW_SCALE(x) (((x) >> S_WINDOW_SCALE) & M_WINDOW_SCALE) x 854 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SACK(x) ((x) << S_SACK) x 855 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SACK(x) (((x) >> S_SACK) & M_SACK) x 859 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ECN(x) ((x) << S_ECN) x 860 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ECN(x) (((x) >> S_ECN) & M_ECN) x 864 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SACK_ALGORITHM(x) ((x) << S_SACK_ALGORITHM) x 865 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SACK_ALGORITHM(x) (((x) >> S_SACK_ALGORITHM) & M_SACK_ALGORITHM) x 868 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MSS(x) ((x) << S_MSS) x 873 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DEFAULT_PEER_MSS(x) ((x) << S_DEFAULT_PEER_MSS) x 874 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DEFAULT_PEER_MSS(x) (((x) >> S_DEFAULT_PEER_MSS) & M_DEFAULT_PEER_MSS) x 879 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DACK_MODE(x) ((x) << S_DACK_MODE) x 883 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DACK_AUTO_MGMT(x) ((x) << S_DACK_AUTO_MGMT) x 887 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DACK_AUTO_CAREFUL(x) ((x) << S_DACK_AUTO_CAREFUL) x 892 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DACK_MSS_SELECTOR(x) ((x) << S_DACK_MSS_SELECTOR) x 893 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DACK_MSS_SELECTOR(x) (((x) >> S_DACK_MSS_SELECTOR) & M_DACK_MSS_SELECTOR) x 897 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DACK_BYTE_THRESHOLD(x) ((x) << S_DACK_BYTE_THRESHOLD) x 898 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DACK_BYTE_THRESHOLD(x) (((x) >> S_DACK_BYTE_THRESHOLD) & M_DACK_BYTE_THRESHOLD) x 904 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_ACCESS_LATENCY(x) ((x) << S_TP_ACCESS_LATENCY) x 905 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TP_ACCESS_LATENCY(x) (((x) >> S_TP_ACCESS_LATENCY) & M_TP_ACCESS_LATENCY) x 908 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_HELD_FIN_DISABLE(x) ((x) << S_HELD_FIN_DISABLE) x 912 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DDP_FC_ENABLE(x) ((x) << S_DDP_FC_ENABLE) x 916 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RDMA_ERR_ENABLE(x) ((x) << S_RDMA_ERR_ENABLE) x 920 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FAST_PDU_DELIVERY(x) ((x) << S_FAST_PDU_DELIVERY) x 924 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CLEAR_FIN(x) ((x) << S_CLEAR_FIN) x 928 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIS_TX_FILL_WIN_PUSH(x) ((x) << S_DIS_TX_FILL_WIN_PUSH) x 933 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_PC_REV(x) ((x) << S_TP_PC_REV) x 934 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TP_PC_REV(x) (((x) >> S_TP_PC_REV) & M_TP_PC_REV) x 940 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ELEMENT0(x) ((x) << S_ELEMENT0) x 941 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ELEMENT0(x) (((x) >> S_ELEMENT0) & M_ELEMENT0) x 945 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ELEMENT1(x) ((x) << S_ELEMENT1) x 946 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ELEMENT1(x) (((x) >> S_ELEMENT1) & M_ELEMENT1) x 950 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ELEMENT2(x) ((x) << S_ELEMENT2) x 951 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ELEMENT2(x) (((x) >> S_ELEMENT2) & M_ELEMENT2) x 955 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ELEMENT3(x) ((x) << S_ELEMENT3) x 956 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ELEMENT3(x) (((x) >> S_ELEMENT3) & M_ELEMENT3) x 965 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_VAR_MULT(x) ((x) << S_VAR_MULT) x 966 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_VAR_MULT(x) (((x) >> S_VAR_MULT) & M_VAR_MULT) x 970 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_VAR_GAIN(x) ((x) << S_VAR_GAIN) x 971 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_VAR_GAIN(x) (((x) >> S_VAR_GAIN) & M_VAR_GAIN) x 975 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SRTT_GAIN(x) ((x) << S_SRTT_GAIN) x 976 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SRTT_GAIN(x) (((x) >> S_SRTT_GAIN) & M_SRTT_GAIN) x 980 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RTTVAR_INIT(x) ((x) << S_RTTVAR_INIT) x 981 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RTTVAR_INIT(x) (((x) >> S_RTTVAR_INIT) & M_RTTVAR_INIT) x 985 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DUP_THRESH(x) ((x) << S_DUP_THRESH) x 986 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DUP_THRESH(x) (((x) >> S_DUP_THRESH) & M_DUP_THRESH) x 990 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INIT_CONG_WIN(x) ((x) << S_INIT_CONG_WIN) x 991 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_INIT_CONG_WIN(x) (((x) >> S_INIT_CONG_WIN) & M_INIT_CONG_WIN) x 997 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INITIAL_SLOW_START_THRESHOLD(x) ((x) << S_INITIAL_SLOW_START_THRESHOLD) x 998 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_INITIAL_SLOW_START_THRESHOLD(x) (((x) >> S_INITIAL_SLOW_START_THRESHOLD) & M_INITIAL_SLOW_START_THRESHOLD) x 1002 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RECEIVE_BUFFER_SIZE(x) ((x) << S_RECEIVE_BUFFER_SIZE) x 1003 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RECEIVE_BUFFER_SIZE(x) (((x) >> S_RECEIVE_BUFFER_SIZE) & M_RECEIVE_BUFFER_SIZE) x 1009 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RX_COALESCE_SIZE(x) ((x) << S_RX_COALESCE_SIZE) x 1010 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RX_COALESCE_SIZE(x) (((x) >> S_RX_COALESCE_SIZE) & M_RX_COALESCE_SIZE) x 1014 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MAX_RX_SIZE(x) ((x) << S_MAX_RX_SIZE) x 1015 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MAX_RX_SIZE(x) (((x) >> S_MAX_RX_SIZE) & M_MAX_RX_SIZE) x 1020 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RX_COALESCING_PSH_DELIVER(x) ((x) << S_RX_COALESCING_PSH_DELIVER) x 1024 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RX_COALESCING_ENABLE(x) ((x) << S_RX_COALESCING_ENABLE) x 1028 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TAHOE_ENABLE(x) ((x) << S_TAHOE_ENABLE) x 1033 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MAX_REORDER_FRAGMENTS(x) ((x) << S_MAX_REORDER_FRAGMENTS) x 1034 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MAX_REORDER_FRAGMENTS(x) (((x) >> S_MAX_REORDER_FRAGMENTS) & M_MAX_REORDER_FRAGMENTS) x 1040 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DELAYED_ACK_TIMER_RESOLUTION(x) ((x) << S_DELAYED_ACK_TIMER_RESOLUTION) x 1041 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DELAYED_ACK_TIMER_RESOLUTION(x) (((x) >> S_DELAYED_ACK_TIMER_RESOLUTION) & M_DELAYED_ACK_TIMER_RESOLUTION) x 1045 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_GENERIC_TIMER_RESOLUTION(x) ((x) << S_GENERIC_TIMER_RESOLUTION) x 1046 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_GENERIC_TIMER_RESOLUTION(x) (((x) >> S_GENERIC_TIMER_RESOLUTION) & M_GENERIC_TIMER_RESOLUTION) x 1052 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_2MSL(x) ((x) << S_2MSL) x 1053 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_2MSL(x) (((x) >> S_2MSL) & M_2MSL) x 1059 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RETRANSMIT_TIMER_MIN(x) ((x) << S_RETRANSMIT_TIMER_MIN) x 1060 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RETRANSMIT_TIMER_MIN(x) (((x) >> S_RETRANSMIT_TIMER_MIN) & M_RETRANSMIT_TIMER_MIN) x 1066 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RETRANSMIT_TIMER_MAX(x) ((x) << S_RETRANSMIT_TIMER_MAX) x 1067 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RETRANSMIT_TIMER_MAX(x) (((x) >> S_RETRANSMIT_TIMER_MAX) & M_RETRANSMIT_TIMER_MAX) x 1073 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PERSIST_TIMER_MIN(x) ((x) << S_PERSIST_TIMER_MIN) x 1074 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_PERSIST_TIMER_MIN(x) (((x) >> S_PERSIST_TIMER_MIN) & M_PERSIST_TIMER_MIN) x 1080 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PERSIST_TIMER_MAX(x) ((x) << S_PERSIST_TIMER_MAX) x 1081 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_PERSIST_TIMER_MAX(x) (((x) >> S_PERSIST_TIMER_MAX) & M_PERSIST_TIMER_MAX) x 1087 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_KEEP_ALIVE_IDLE_TIME(x) ((x) << S_KEEP_ALIVE_IDLE_TIME) x 1088 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_KEEP_ALIVE_IDLE_TIME(x) (((x) >> S_KEEP_ALIVE_IDLE_TIME) & M_KEEP_ALIVE_IDLE_TIME) x 1094 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_KEEP_ALIVE_INTERVAL_TIME(x) ((x) << S_KEEP_ALIVE_INTERVAL_TIME) x 1095 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_KEEP_ALIVE_INTERVAL_TIME(x) (((x) >> S_KEEP_ALIVE_INTERVAL_TIME) & M_KEEP_ALIVE_INTERVAL_TIME) x 1101 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INITIAL_SRTT(x) ((x) << S_INITIAL_SRTT) x 1102 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_INITIAL_SRTT(x) (((x) >> S_INITIAL_SRTT) & M_INITIAL_SRTT) x 1108 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DELAYED_ACK_TIME(x) ((x) << S_DELAYED_ACK_TIME) x 1109 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DELAYED_ACK_TIME(x) (((x) >> S_DELAYED_ACK_TIME) & M_DELAYED_ACK_TIME) x 1115 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FINWAIT2_TIME(x) ((x) << S_FINWAIT2_TIME) x 1116 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_FINWAIT2_TIME(x) (((x) >> S_FINWAIT2_TIME) & M_FINWAIT2_TIME) x 1122 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FAST_FINWAIT2_TIME(x) ((x) << S_FAST_FINWAIT2_TIME) x 1123 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_FAST_FINWAIT2_TIME(x) (((x) >> S_FAST_FINWAIT2_TIME) & M_FAST_FINWAIT2_TIME) x 1129 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_KEEPALIVE_MAX(x) ((x) << S_KEEPALIVE_MAX) x 1130 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_KEEPALIVE_MAX(x) (((x) >> S_KEEPALIVE_MAX) & M_KEEPALIVE_MAX) x 1134 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_WINDOWPROBE_MAX(x) ((x) << S_WINDOWPROBE_MAX) x 1135 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_WINDOWPROBE_MAX(x) (((x) >> S_WINDOWPROBE_MAX) & M_WINDOWPROBE_MAX) x 1139 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RETRANSMISSION_MAX(x) ((x) << S_RETRANSMISSION_MAX) x 1140 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RETRANSMISSION_MAX(x) (((x) >> S_RETRANSMISSION_MAX) & M_RETRANSMISSION_MAX) x 1144 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SYN_MAX(x) ((x) << S_SYN_MAX) x 1145 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SYN_MAX(x) (((x) >> S_SYN_MAX) & M_SYN_MAX) x 1151 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_L3_VALUE(x) ((x) << S_L3_VALUE) x 1152 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_L3_VALUE(x) (((x) >> S_L3_VALUE) & M_L3_VALUE) x 1172 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TP_RESET(x) ((x) << S_TP_RESET) x 1176 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CM_MEMMGR_INIT(x) ((x) << S_CM_MEMMGR_INIT) x 1187 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CM_MEMMGR_RX_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_RX_FREE_LIST_BASE) x 1188 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CM_MEMMGR_RX_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_RX_FREE_LIST_BASE) & M_CM_MEMMGR_RX_FREE_LIST_BASE) x 1194 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CM_MEMMGR_TX_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_TX_FREE_LIST_BASE) x 1195 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CM_MEMMGR_TX_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_TX_FREE_LIST_BASE) & M_CM_MEMMGR_TX_FREE_LIST_BASE) x 1201 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE) x 1202 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE) & M_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE) x 1208 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CM_MEMMGR_MAX_PSTRUCT(x) ((x) << S_CM_MEMMGR_MAX_PSTRUCT) x 1209 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CM_MEMMGR_MAX_PSTRUCT(x) (((x) >> S_CM_MEMMGR_MAX_PSTRUCT) & M_CM_MEMMGR_MAX_PSTRUCT) x 1214 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TX_FREE_LIST_EMPTY(x) ((x) << S_TX_FREE_LIST_EMPTY) x 1218 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RX_FREE_LIST_EMPTY(x) ((x) << S_RX_FREE_LIST_EMPTY) x 1225 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DISABLE_PAST_TIMER_INSERTION(x) ((x) << S_DISABLE_PAST_TIMER_INSERTION) x 1230 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MODULATION_TIMER_SEPARATOR(x) ((x) << S_MODULATION_TIMER_SEPARATOR) x 1231 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MODULATION_TIMER_SEPARATOR(x) (((x) >> S_MODULATION_TIMER_SEPARATOR) & M_MODULATION_TIMER_SEPARATOR) x 1235 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_GLOBAL_TIMER_SEPARATOR(x) ((x) << S_GLOBAL_TIMER_SEPARATOR) x 1236 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_GLOBAL_TIMER_SEPARATOR(x) (((x) >> S_GLOBAL_TIMER_SEPARATOR) & M_GLOBAL_TIMER_SEPARATOR) x 1243 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ENABLE_TX_DROP(x) ((x) << S_ENABLE_TX_DROP) x 1247 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ENABLE_TX_ERROR(x) ((x) << S_ENABLE_TX_ERROR) x 1252 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DROP_TICKS_CNT(x) ((x) << S_DROP_TICKS_CNT) x 1253 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DROP_TICKS_CNT(x) (((x) >> S_DROP_TICKS_CNT) & M_DROP_TICKS_CNT) x 1257 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_NUM_PKTS_DROPPED(x) ((x) << S_NUM_PKTS_DROPPED) x 1258 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_NUM_PKTS_DROPPED(x) (((x) >> S_NUM_PKTS_DROPPED) & M_NUM_PKTS_DROPPED) x 1266 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_USE_ROUTE_TABLE(x) ((x) << S_USE_ROUTE_TABLE) x 1270 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ENABLE_CSPI(x) ((x) << S_ENABLE_CSPI) x 1274 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ENABLE_PCIX(x) ((x) << S_ENABLE_PCIX) x 1281 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ROUTE_TABLE_INDEX(x) ((x) << S_ROUTE_TABLE_INDEX) x 1282 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ROUTE_TABLE_INDEX(x) (((x) >> S_ROUTE_TABLE_INDEX) & M_ROUTE_TABLE_INDEX) x 1289 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE) x 1290 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CPL_OPCODE(x) (((x) >> S_CPL_OPCODE) & M_CPL_OPCODE) x 1295 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ZEROROUTEERROR(x) ((x) << S_ZEROROUTEERROR) x 1299 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CSPIFRAMINGERROR(x) ((x) << S_CSPIFRAMINGERROR) x 1303 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SGEFRAMINGERROR(x) ((x) << S_SGEFRAMINGERROR) x 1307 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TPFRAMINGERROR(x) ((x) << S_TPFRAMINGERROR) x 1319 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CALENDARLENGTH(x) ((x) << S_CALENDARLENGTH) x 1320 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CALENDARLENGTH(x) (((x) >> S_CALENDARLENGTH) & M_CALENDARLENGTH) x 1325 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FIFOSTATUSENABLE(x) ((x) << S_FIFOSTATUSENABLE) x 1332 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MAXBURST1(x) ((x) << S_MAXBURST1) x 1333 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MAXBURST1(x) (((x) >> S_MAXBURST1) & M_MAXBURST1) x 1337 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MAXBURST2(x) ((x) << S_MAXBURST2) x 1338 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MAXBURST2(x) (((x) >> S_MAXBURST2) & M_MAXBURST2) x 1344 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CSPI_TRAIN_ALPHA(x) ((x) << S_CSPI_TRAIN_ALPHA) x 1345 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CSPI_TRAIN_ALPHA(x) (((x) >> S_CSPI_TRAIN_ALPHA) & M_CSPI_TRAIN_ALPHA) x 1349 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CSPI_TRAIN_DATA_MAXT(x) ((x) << S_CSPI_TRAIN_DATA_MAXT) x 1350 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CSPI_TRAIN_DATA_MAXT(x) (((x) >> S_CSPI_TRAIN_DATA_MAXT) & M_CSPI_TRAIN_DATA_MAXT) x 1355 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP4ERR(x) ((x) << S_DIP4ERR) x 1359 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXDROP(x) ((x) << S_RXDROP) x 1363 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXDROP(x) ((x) << S_TXDROP) x 1367 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXOVERFLOW(x) ((x) << S_RXOVERFLOW) x 1371 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RAMPARITYERR(x) ((x) << S_RAMPARITYERR) x 1381 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SCHTOKEN0(x) ((x) << S_SCHTOKEN0) x 1382 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SCHTOKEN0(x) (((x) >> S_SCHTOKEN0) & M_SCHTOKEN0) x 1388 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SCHTOKEN1(x) ((x) << S_SCHTOKEN1) x 1389 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SCHTOKEN1(x) (((x) >> S_SCHTOKEN1) & M_SCHTOKEN1) x 1395 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SCHTOKEN2(x) ((x) << S_SCHTOKEN2) x 1396 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SCHTOKEN2(x) (((x) >> S_SCHTOKEN2) & M_SCHTOKEN2) x 1402 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SCHTOKEN3(x) ((x) << S_SCHTOKEN3) x 1403 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SCHTOKEN3(x) (((x) >> S_SCHTOKEN3) & M_SCHTOKEN3) x 1409 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ALMOSTEMPTY(x) ((x) << S_ALMOSTEMPTY) x 1410 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ALMOSTEMPTY(x) (((x) >> S_ALMOSTEMPTY) & M_ALMOSTEMPTY) x 1416 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ALMOSTFULL(x) ((x) << S_ALMOSTFULL) x 1417 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_ALMOSTFULL(x) (((x) >> S_ALMOSTFULL) & M_ALMOSTFULL) x 1424 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RX_NPORTS(x) ((x) << S_RX_NPORTS) x 1425 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RX_NPORTS(x) (((x) >> S_RX_NPORTS) & M_RX_NPORTS) x 1429 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TX_NPORTS(x) ((x) << S_TX_NPORTS) x 1430 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TX_NPORTS(x) (((x) >> S_TX_NPORTS) & M_TX_NPORTS) x 1435 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXSTATUSENABLE(x) ((x) << S_RXSTATUSENABLE) x 1439 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXDROPENABLE(x) ((x) << S_TXDROPENABLE) x 1443 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXENDIANMODE(x) ((x) << S_RXENDIANMODE) x 1447 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXENDIANMODE(x) ((x) << S_TXENDIANMODE) x 1451 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INTEL1010MODE(x) ((x) << S_INTEL1010MODE) x 1459 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MAXTRAINALPHA(x) ((x) << S_MAXTRAINALPHA) x 1460 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MAXTRAINALPHA(x) (((x) >> S_MAXTRAINALPHA) & M_MAXTRAINALPHA) x 1464 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MAXTRAINDATA(x) ((x) << S_MAXTRAINDATA) x 1465 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MAXTRAINDATA(x) (((x) >> S_MAXTRAINDATA) & M_MAXTRAINDATA) x 1471 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXFIFOPARITYERROR(x) ((x) << S_RXFIFOPARITYERROR) x 1472 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RXFIFOPARITYERROR(x) (((x) >> S_RXFIFOPARITYERROR) & M_RXFIFOPARITYERROR) x 1476 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXFIFOPARITYERROR(x) ((x) << S_TXFIFOPARITYERROR) x 1477 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TXFIFOPARITYERROR(x) (((x) >> S_TXFIFOPARITYERROR) & M_TXFIFOPARITYERROR) x 1481 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXFIFOOVERFLOW(x) ((x) << S_RXFIFOOVERFLOW) x 1482 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RXFIFOOVERFLOW(x) (((x) >> S_RXFIFOOVERFLOW) & M_RXFIFOOVERFLOW) x 1488 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXPORT0DROPCNT(x) ((x) << S_TXPORT0DROPCNT) x 1489 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TXPORT0DROPCNT(x) (((x) >> S_TXPORT0DROPCNT) & M_TXPORT0DROPCNT) x 1493 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXPORT1DROPCNT(x) ((x) << S_TXPORT1DROPCNT) x 1494 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TXPORT1DROPCNT(x) (((x) >> S_TXPORT1DROPCNT) & M_TXPORT1DROPCNT) x 1500 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXPORT2DROPCNT(x) ((x) << S_TXPORT2DROPCNT) x 1501 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TXPORT2DROPCNT(x) (((x) >> S_TXPORT2DROPCNT) & M_TXPORT2DROPCNT) x 1505 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TXPORT3DROPCNT(x) ((x) << S_TXPORT3DROPCNT) x 1506 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TXPORT3DROPCNT(x) (((x) >> S_TXPORT3DROPCNT) & M_TXPORT3DROPCNT) x 1512 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXPORT0DROPCNT(x) ((x) << S_RXPORT0DROPCNT) x 1513 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RXPORT0DROPCNT(x) (((x) >> S_RXPORT0DROPCNT) & M_RXPORT0DROPCNT) x 1517 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXPORT1DROPCNT(x) ((x) << S_RXPORT1DROPCNT) x 1518 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RXPORT1DROPCNT(x) (((x) >> S_RXPORT1DROPCNT) & M_RXPORT1DROPCNT) x 1524 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXPORT2DROPCNT(x) ((x) << S_RXPORT2DROPCNT) x 1525 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RXPORT2DROPCNT(x) (((x) >> S_RXPORT2DROPCNT) & M_RXPORT2DROPCNT) x 1529 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RXPORT3DROPCNT(x) ((x) << S_RXPORT3DROPCNT) x 1530 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RXPORT3DROPCNT(x) (((x) >> S_RXPORT3DROPCNT) & M_RXPORT3DROPCNT) x 1536 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP4ERRORCNT(x) ((x) << S_DIP4ERRORCNT) x 1537 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DIP4ERRORCNT(x) (((x) >> S_DIP4ERRORCNT) & M_DIP4ERRORCNT) x 1541 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP4ERRORCNTSHADOW(x) ((x) << S_DIP4ERRORCNTSHADOW) x 1542 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DIP4ERRORCNTSHADOW(x) (((x) >> S_DIP4ERRORCNTSHADOW) & M_DIP4ERRORCNTSHADOW) x 1545 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TRICN_RX_TRAIN_ERR(x) ((x) << S_TRICN_RX_TRAIN_ERR) x 1549 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TRICN_RX_TRAINING(x) ((x) << S_TRICN_RX_TRAINING) x 1553 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TRICN_RX_TRAIN_OK(x) ((x) << S_TRICN_RX_TRAIN_OK) x 1559 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP2PARITYERR(x) ((x) << S_DIP2PARITYERR) x 1567 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ESPI_RX_LNK_RST(x) ((x) << S_ESPI_RX_LNK_RST) x 1571 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ESPI_RX_CORE_RST(x) ((x) << S_ESPI_RX_CORE_RST) x 1575 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RX_CLK_STATUS(x) ((x) << S_RX_CLK_STATUS) x 1582 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_OUT_OF_SYNC_COUNT(x) ((x) << S_OUT_OF_SYNC_COUNT) x 1583 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_OUT_OF_SYNC_COUNT(x) (((x) >> S_OUT_OF_SYNC_COUNT) & M_OUT_OF_SYNC_COUNT) x 1586 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP2_COUNT_MODE_ENABLE(x) ((x) << S_DIP2_COUNT_MODE_ENABLE) x 1591 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP2_PARITY_ERR_THRES(x) ((x) << S_DIP2_PARITY_ERR_THRES) x 1592 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DIP2_PARITY_ERR_THRES(x) (((x) >> S_DIP2_PARITY_ERR_THRES) & M_DIP2_PARITY_ERR_THRES) x 1596 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP4_THRES(x) ((x) << S_DIP4_THRES) x 1597 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DIP4_THRES(x) (((x) >> S_DIP4_THRES) & M_DIP4_THRES) x 1600 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP4_THRES_ENABLE(x) ((x) << S_DIP4_THRES_ENABLE) x 1604 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_FORCE_DISABLE_STATUS(x) ((x) << S_FORCE_DISABLE_STATUS) x 1608 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DYNAMIC_DESKEW(x) ((x) << S_DYNAMIC_DESKEW) x 1613 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MONITORED_PORT_NUM(x) ((x) << S_MONITORED_PORT_NUM) x 1614 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MONITORED_PORT_NUM(x) (((x) >> S_MONITORED_PORT_NUM) & M_MONITORED_PORT_NUM) x 1617 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MONITORED_DIRECTION(x) ((x) << S_MONITORED_DIRECTION) x 1621 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MONITORED_INTERFACE(x) ((x) << S_MONITORED_INTERFACE) x 1628 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DIP2_ERR_CNT(x) ((x) << S_DIP2_ERR_CNT) x 1629 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DIP2_ERR_CNT(x) (((x) >> S_DIP2_ERR_CNT) & M_DIP2_ERR_CNT) x 1635 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_WRITE_DATA(x) ((x) << S_WRITE_DATA) x 1636 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_WRITE_DATA(x) (((x) >> S_WRITE_DATA) & M_WRITE_DATA) x 1640 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_REGISTER_OFFSET(x) ((x) << S_REGISTER_OFFSET) x 1641 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_REGISTER_OFFSET(x) (((x) >> S_REGISTER_OFFSET) & M_REGISTER_OFFSET) x 1645 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CHANNEL_ADDR(x) ((x) << S_CHANNEL_ADDR) x 1646 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CHANNEL_ADDR(x) (((x) >> S_CHANNEL_ADDR) & M_CHANNEL_ADDR) x 1650 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MODULE_ADDR(x) ((x) << S_MODULE_ADDR) x 1651 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_MODULE_ADDR(x) (((x) >> S_MODULE_ADDR) & M_MODULE_ADDR) x 1655 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_BUNDLE_ADDR(x) ((x) << S_BUNDLE_ADDR) x 1656 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_BUNDLE_ADDR(x) (((x) >> S_BUNDLE_ADDR) & M_BUNDLE_ADDR) x 1660 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SPI4_COMMAND(x) ((x) << S_SPI4_COMMAND) x 1661 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SPI4_COMMAND(x) (((x) >> S_SPI4_COMMAND) & M_SPI4_COMMAND) x 1667 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_READ_DATA(x) ((x) << S_READ_DATA) x 1668 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_READ_DATA(x) (((x) >> S_READ_DATA) & M_READ_DATA) x 1671 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ESPI_CMD_BUSY(x) ((x) << S_ESPI_CMD_BUSY) x 1675 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_ERROR_ACK(x) ((x) << S_ERROR_ACK) x 1679 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_UNMAPPED_ERR(x) ((x) << S_UNMAPPED_ERR) x 1684 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TRANSACTION_TIMER(x) ((x) << S_TRANSACTION_TIMER) x 1685 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TRANSACTION_TIMER(x) (((x) >> S_TRANSACTION_TIMER) & M_TRANSACTION_TIMER) x 1697 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_HREG_PAR_ERR(x) ((x) << S_HREG_PAR_ERR) x 1701 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_EGRS_DATA_PAR_ERR(x) ((x) << S_EGRS_DATA_PAR_ERR) x 1705 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_INGRS_DATA_PAR_ERR(x) ((x) << S_INGRS_DATA_PAR_ERR) x 1709 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_INTR(x) ((x) << S_PM_INTR) x 1713 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_E2C_SYNC_ERR(x) ((x) << S_PM_E2C_SYNC_ERR) x 1717 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_C2E_SYNC_ERR(x) ((x) << S_PM_C2E_SYNC_ERR) x 1721 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_E2C_EMPTY_ERR(x) ((x) << S_PM_E2C_EMPTY_ERR) x 1725 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_C2E_EMPTY_ERR(x) ((x) << S_PM_C2E_EMPTY_ERR) x 1730 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_PAR_ERR(x) ((x) << S_PM_PAR_ERR) x 1731 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_PM_PAR_ERR(x) (((x) >> S_PM_PAR_ERR) & M_PM_PAR_ERR) x 1734 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_E2C_WRT_FULL(x) ((x) << S_PM_E2C_WRT_FULL) x 1738 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PM_C2E_WRT_FULL(x) ((x) << S_PM_C2E_WRT_FULL) x 1747 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_SGE_ERR(x) ((x) << S_PL_INTR_SGE_ERR) x 1751 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_SGE_DATA(x) ((x) << S_PL_INTR_SGE_DATA) x 1755 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_MC3(x) ((x) << S_PL_INTR_MC3) x 1759 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_MC4(x) ((x) << S_PL_INTR_MC4) x 1763 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_MC5(x) ((x) << S_PL_INTR_MC5) x 1767 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_RAT(x) ((x) << S_PL_INTR_RAT) x 1771 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_TP(x) ((x) << S_PL_INTR_TP) x 1775 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_ULP(x) ((x) << S_PL_INTR_ULP) x 1779 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_ESPI(x) ((x) << S_PL_INTR_ESPI) x 1783 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_CSPI(x) ((x) << S_PL_INTR_CSPI) x 1787 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_PCIX(x) ((x) << S_PL_INTR_PCIX) x 1791 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PL_INTR_EXT(x) ((x) << S_PL_INTR_EXT) x 1800 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MODE(x) ((x) << S_MODE) x 1804 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCAM_RESET(x) ((x) << S_TCAM_RESET) x 1808 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCAM_READY(x) ((x) << S_TCAM_READY) x 1812 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DBGI_ENABLE(x) ((x) << S_DBGI_ENABLE) x 1816 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_M_BUS_ENABLE(x) ((x) << S_M_BUS_ENABLE) x 1820 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PARITY_ENABLE(x) ((x) << S_PARITY_ENABLE) x 1825 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SYN_ISSUE_MODE(x) ((x) << S_SYN_ISSUE_MODE) x 1826 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SYN_ISSUE_MODE(x) (((x) >> S_SYN_ISSUE_MODE) & M_SYN_ISSUE_MODE) x 1829 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_BUILD(x) ((x) << S_BUILD) x 1833 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_COMPRESSION_ENABLE(x) ((x) << S_COMPRESSION_ENABLE) x 1838 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_NUM_LIP(x) ((x) << S_NUM_LIP) x 1839 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_NUM_LIP(x) (((x) >> S_NUM_LIP) & M_NUM_LIP) x 1843 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCAM_PART_CNT(x) ((x) << S_TCAM_PART_CNT) x 1844 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TCAM_PART_CNT(x) (((x) >> S_TCAM_PART_CNT) & M_TCAM_PART_CNT) x 1848 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCAM_PART_TYPE(x) ((x) << S_TCAM_PART_TYPE) x 1849 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TCAM_PART_TYPE(x) (((x) >> S_TCAM_PART_TYPE) & M_TCAM_PART_TYPE) x 1853 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCAM_PART_SIZE(x) ((x) << S_TCAM_PART_SIZE) x 1854 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_TCAM_PART_SIZE(x) (((x) >> S_TCAM_PART_SIZE) & M_TCAM_PART_SIZE) x 1857 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_TCAM_PART_TYPE_HI(x) ((x) << S_TCAM_PART_TYPE_HI) x 1864 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SIZE(x) ((x) << S_SIZE) x 1865 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SIZE(x) (((x) >> S_SIZE) & M_SIZE) x 1871 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_START_OF_ROUTING_TABLE(x) ((x) << S_START_OF_ROUTING_TABLE) x 1872 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_START_OF_ROUTING_TABLE(x) (((x) >> S_START_OF_ROUTING_TABLE) & M_START_OF_ROUTING_TABLE) x 1878 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_START_OF_SERVER_INDEX(x) ((x) << S_START_OF_SERVER_INDEX) x 1879 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_START_OF_SERVER_INDEX(x) (((x) >> S_START_OF_SERVER_INDEX) & M_START_OF_SERVER_INDEX) x 1885 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_LOCAL_IP_RAM_ADDR(x) ((x) << S_LOCAL_IP_RAM_ADDR) x 1886 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_LOCAL_IP_RAM_ADDR(x) (((x) >> S_LOCAL_IP_RAM_ADDR) & M_LOCAL_IP_RAM_ADDR) x 1889 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RAM_WRITE_ENABLE(x) ((x) << S_RAM_WRITE_ENABLE) x 1897 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SEARCH_RESPONSE_LATENCY(x) ((x) << S_SEARCH_RESPONSE_LATENCY) x 1898 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SEARCH_RESPONSE_LATENCY(x) (((x) >> S_SEARCH_RESPONSE_LATENCY) & M_SEARCH_RESPONSE_LATENCY) x 1902 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_LEARN_RESPONSE_LATENCY(x) ((x) << S_LEARN_RESPONSE_LATENCY) x 1903 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_LEARN_RESPONSE_LATENCY(x) (((x) >> S_LEARN_RESPONSE_LATENCY) & M_LEARN_RESPONSE_LATENCY) x 1909 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SRCHLAT(x) ((x) << S_SRCHLAT) x 1910 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_SRCHLAT(x) (((x) >> S_SRCHLAT) & M_SRCHLAT) x 1914 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PARLAT(x) ((x) << S_PARLAT) x 1915 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_PARLAT(x) (((x) >> S_PARLAT) & M_PARLAT) x 1920 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_POVEREN(x) ((x) << S_POVEREN) x 1924 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_LRNVEREN(x) ((x) << S_LRNVEREN) x 1928 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_VWVEREN(x) ((x) << S_VWVEREN) x 1935 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_IDINDEX(x) ((x) << S_IDINDEX) x 1936 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_IDINDEX(x) (((x) >> S_IDINDEX) & M_IDINDEX) x 1942 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RSTMAX(x) ((x) << S_RSTMAX) x 1943 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RSTMAX(x) (((x) >> S_RSTMAX) & M_RSTMAX) x 1948 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR(x) ((x) << S_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR) x 1952 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR(x) ((x) << S_MC5_INT_HIT_IN_ACTIVE_REGION_ERR) x 1956 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_HIT_IN_RT_REGION_ERR(x) ((x) << S_MC5_INT_HIT_IN_RT_REGION_ERR) x 1960 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_MISS_ERR(x) ((x) << S_MC5_INT_MISS_ERR) x 1964 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_LIP0_ERR(x) ((x) << S_MC5_INT_LIP0_ERR) x 1968 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_LIP_MISS_ERR(x) ((x) << S_MC5_INT_LIP_MISS_ERR) x 1972 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_PARITY_ERR(x) ((x) << S_MC5_INT_PARITY_ERR) x 1976 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_ACTIVE_REGION_FULL(x) ((x) << S_MC5_INT_ACTIVE_REGION_FULL) x 1980 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_NFA_SRCH_ERR(x) ((x) << S_MC5_INT_NFA_SRCH_ERR) x 1984 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_SYN_COOKIE(x) ((x) << S_MC5_INT_SYN_COOKIE) x 1988 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_SYN_COOKIE_BAD(x) ((x) << S_MC5_INT_SYN_COOKIE_BAD) x 1992 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_SYN_COOKIE_OFF(x) ((x) << S_MC5_INT_SYN_COOKIE_OFF) x 1996 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_UNKNOWN_CMD(x) ((x) << S_MC5_INT_UNKNOWN_CMD) x 2000 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_REQUESTQ_PARITY_ERR(x) ((x) << S_MC5_INT_REQUESTQ_PARITY_ERR) x 2004 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_DISPATCHQ_PARITY_ERR(x) ((x) << S_MC5_INT_DISPATCHQ_PARITY_ERR) x 2008 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MC5_INT_DEL_ACT_EMPTY(x) ((x) << S_MC5_INT_DEL_ACT_EMPTY) x 2019 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CMDMODE(x) ((x) << S_CMDMODE) x 2020 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CMDMODE(x) (((x) >> S_CMDMODE) & M_CMDMODE) x 2023 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SADRSEL(x) ((x) << S_SADRSEL) x 2028 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_WRITE_BURST_SIZE(x) ((x) << S_WRITE_BURST_SIZE) x 2029 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_WRITE_BURST_SIZE(x) (((x) >> S_WRITE_BURST_SIZE) & M_WRITE_BURST_SIZE) x 2047 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DBGI_RSP_VALID(x) ((x) << S_DBGI_RSP_VALID) x 2051 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DBGI_RSP_HIT(x) ((x) << S_DBGI_RSP_HIT) x 2055 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DBGI_RSP_ERR(x) ((x) << S_DBGI_RSP_ERR) x 2060 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DBGI_RSP_ERR_REASON(x) ((x) << S_DBGI_RSP_ERR_REASON) x 2061 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_DBGI_RSP_ERR_REASON(x) (((x) >> S_DBGI_RSP_ERR_REASON) & M_DBGI_RSP_ERR_REASON) x 2089 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_VPD_ADDR(x) ((x) << S_VPD_ADDR) x 2090 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_VPD_ADDR(x) (((x) >> S_VPD_ADDR) & M_VPD_ADDR) x 2093 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_VPD_OP_FLAG(x) ((x) << S_VPD_OP_FLAG) x 2101 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_MASTER_PARITY_ERR(x) ((x) << S_MASTER_PARITY_ERR) x 2105 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SIG_TARGET_ABORT(x) ((x) << S_SIG_TARGET_ABORT) x 2109 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RCV_TARGET_ABORT(x) ((x) << S_RCV_TARGET_ABORT) x 2113 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RCV_MASTER_ABORT(x) ((x) << S_RCV_MASTER_ABORT) x 2117 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_SIG_SYS_ERR(x) ((x) << S_SIG_SYS_ERR) x 2121 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_DET_PARITY_ERR(x) ((x) << S_DET_PARITY_ERR) x 2125 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PIO_PARITY_ERR(x) ((x) << S_PIO_PARITY_ERR) x 2129 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_WF_PARITY_ERR(x) ((x) << S_WF_PARITY_ERR) x 2134 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_RF_PARITY_ERR(x) ((x) << S_RF_PARITY_ERR) x 2135 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_RF_PARITY_ERR(x) (((x) >> S_RF_PARITY_ERR) & M_RF_PARITY_ERR) x 2139 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_CF_PARITY_ERR(x) ((x) << S_CF_PARITY_ERR) x 2140 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_CF_PARITY_ERR(x) (((x) >> S_CF_PARITY_ERR) & M_CF_PARITY_ERR) x 2146 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PCI_MODE_64BIT(x) ((x) << S_PCI_MODE_64BIT) x 2150 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PCI_MODE_66MHZ(x) ((x) << S_PCI_MODE_66MHZ) x 2155 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PCI_MODE_PCIX_INITPAT(x) ((x) << S_PCI_MODE_PCIX_INITPAT) x 2156 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_PCI_MODE_PCIX_INITPAT(x) (((x) >> S_PCI_MODE_PCIX_INITPAT) & M_PCI_MODE_PCIX_INITPAT) x 2159 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PCI_MODE_PCIX(x) ((x) << S_PCI_MODE_PCIX) x 2164 drivers/net/ethernet/chelsio/cxgb/regs.h #define V_PCI_MODE_CLK(x) ((x) << S_PCI_MODE_CLK) x 2165 drivers/net/ethernet/chelsio/cxgb/regs.h #define G_PCI_MODE_CLK(x) (((x) >> S_PCI_MODE_CLK) & M_PCI_MODE_CLK) x 106 drivers/net/ethernet/chelsio/cxgb3/common.h #define V_TP_VERSION_MAJOR(x) ((x) << S_TP_VERSION_MAJOR) x 107 drivers/net/ethernet/chelsio/cxgb3/common.h #define G_TP_VERSION_MAJOR(x) \ x 108 drivers/net/ethernet/chelsio/cxgb3/common.h (((x) >> S_TP_VERSION_MAJOR) & M_TP_VERSION_MAJOR) x 112 drivers/net/ethernet/chelsio/cxgb3/common.h #define V_TP_VERSION_MINOR(x) ((x) << S_TP_VERSION_MINOR) x 113 drivers/net/ethernet/chelsio/cxgb3/common.h #define G_TP_VERSION_MINOR(x) \ x 114 drivers/net/ethernet/chelsio/cxgb3/common.h (((x) >> S_TP_VERSION_MINOR) & M_TP_VERSION_MINOR) x 118 drivers/net/ethernet/chelsio/cxgb3/common.h #define V_TP_VERSION_MICRO(x) ((x) << S_TP_VERSION_MICRO) x 119 drivers/net/ethernet/chelsio/cxgb3/common.h #define G_TP_VERSION_MICRO(x) \ x 120 drivers/net/ethernet/chelsio/cxgb3/common.h (((x) >> S_TP_VERSION_MICRO) & M_TP_VERSION_MICRO) x 155 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define V_FW_VERSION_TYPE(x) ((x) << S_FW_VERSION_TYPE) x 156 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define G_FW_VERSION_TYPE(x) \ x 157 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE) x 161 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define V_FW_VERSION_MAJOR(x) ((x) << S_FW_VERSION_MAJOR) x 162 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define G_FW_VERSION_MAJOR(x) \ x 163 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR) x 167 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define V_FW_VERSION_MINOR(x) ((x) << S_FW_VERSION_MINOR) x 168 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define G_FW_VERSION_MINOR(x) \ x 169 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR) x 173 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define V_FW_VERSION_MICRO(x) ((x) << S_FW_VERSION_MICRO) x 174 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h #define G_FW_VERSION_MICRO(x) \ x 175 drivers/net/ethernet/chelsio/cxgb3/firmware_exports.h (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO) x 108 drivers/net/ethernet/chelsio/cxgb3/l2t.h #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX) x 5 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CONGMODE(x) ((x) << S_CONGMODE) x 9 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TNLFLMODE(x) ((x) << S_TNLFLMODE) x 13 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FATLPERREN(x) ((x) << S_FATLPERREN) x 17 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DROPPKT(x) ((x) << S_DROPPKT) x 21 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_EGRGENCTRL(x) ((x) << S_EGRGENCTRL) x 26 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_USERSPACESIZE(x) ((x) << S_USERSPACESIZE) x 30 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HOSTPAGESIZE(x) ((x) << S_HOSTPAGESIZE) x 33 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FLMODE(x) ((x) << S_FLMODE) x 38 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PKTSHIFT(x) ((x) << S_PKTSHIFT) x 41 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ONEINTMULTQ(x) ((x) << S_ONEINTMULTQ) x 45 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BIGENDIANINGRESS(x) ((x) << S_BIGENDIANINGRESS) x 49 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ISCSICOALESCING(x) ((x) << S_ISCSICOALESCING) x 53 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GLOBALENABLE(x) ((x) << S_GLOBALENABLE) x 57 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_AVOIDCQOVFL(x) ((x) << S_AVOIDCQOVFL) x 61 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OPTONEINTMULTQ(x) ((x) << S_OPTONEINTMULTQ) x 65 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CQCRDTCTRL(x) ((x) << S_CQCRDTCTRL) x 71 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SELEGRCNTX(x) ((x) << S_SELEGRCNTX) x 76 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_EGRCNTX(x) ((x) << S_EGRCNTX) x 82 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RSPQ(x) ((x) << S_RSPQ) x 83 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_RSPQ(x) (((x) >> S_RSPQ) & M_RSPQ) x 87 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_NEWTIMER(x) ((x) << S_NEWTIMER) x 91 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_NEWINDEX(x) ((x) << S_NEWINDEX) x 97 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CONTEXT_CMD_OPCODE(x) ((x) << S_CONTEXT_CMD_OPCODE) x 100 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CONTEXT_CMD_BUSY(x) ((x) << S_CONTEXT_CMD_BUSY) x 107 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CQ_CREDIT(x) ((x) << S_CQ_CREDIT) x 109 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_CQ_CREDIT(x) (((x) >> S_CQ_CREDIT) & M_CQ_CREDIT) x 113 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CQ(x) ((x) << S_CQ) x 117 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RESPONSEQ(x) ((x) << S_RESPONSEQ) x 121 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_EGRESS(x) ((x) << S_EGRESS) x 125 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FREELIST(x) ((x) << S_FREELIST) x 130 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CONTEXT(x) ((x) << S_CONTEXT) x 132 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_CONTEXT(x) (((x) >> S_CONTEXT) & M_CONTEXT) x 154 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CREDITS(x) ((x) << S_CREDITS) x 159 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ERRINTR(x) ((x) << S_ERRINTR) x 175 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FL0EMPTY(x) ((x) << S_FL0EMPTY) x 182 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HIRCQDRBTHRSH(x) ((x) << S_HIRCQDRBTHRSH) x 186 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LORCQDRBTHRSH(x) ((x) << S_LORCQDRBTHRSH) x 193 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HIRCQPARITYERROR(x) ((x) << S_HIRCQPARITYERROR) x 197 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LORCQPARITYERROR(x) ((x) << S_LORCQPARITYERROR) x 201 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HIDRBPARITYERROR(x) ((x) << S_HIDRBPARITYERROR) x 205 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LODRBPARITYERROR(x) ((x) << S_LODRBPARITYERROR) x 210 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FLPARITYERROR(x) ((x) << S_FLPARITYERROR) x 211 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_FLPARITYERROR(x) (((x) >> S_FLPARITYERROR) & M_FLPARITYERROR) x 215 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ITPARITYERROR(x) ((x) << S_ITPARITYERROR) x 216 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_ITPARITYERROR(x) (((x) >> S_ITPARITYERROR) & M_ITPARITYERROR) x 219 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IRPARITYERROR(x) ((x) << S_IRPARITYERROR) x 223 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RCPARITYERROR(x) ((x) << S_RCPARITYERROR) x 227 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCPARITYERROR(x) ((x) << S_OCPARITYERROR) x 231 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CPPARITYERROR(x) ((x) << S_CPPARITYERROR) x 235 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_R_REQ_FRAMINGERROR(x) ((x) << S_R_REQ_FRAMINGERROR) x 239 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UC_REQ_FRAMINGERROR(x) ((x) << S_UC_REQ_FRAMINGERROR) x 243 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HICTLDRBDROPERR(x) ((x) << S_HICTLDRBDROPERR) x 247 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LOCTLDRBDROPERR(x) ((x) << S_LOCTLDRBDROPERR) x 251 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HIPIODRBDROPERR(x) ((x) << S_HIPIODRBDROPERR) x 255 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LOPIODRBDROPERR(x) ((x) << S_LOPIODRBDROPERR) x 259 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HIPRIORITYDBFULL(x) ((x) << S_HIPRIORITYDBFULL) x 263 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HIPRIORITYDBEMPTY(x) ((x) << S_HIPRIORITYDBEMPTY) x 267 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LOPRIORITYDBFULL(x) ((x) << S_LOPRIORITYDBFULL) x 271 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LOPRIORITYDBEMPTY(x) ((x) << S_LOPRIORITYDBEMPTY) x 275 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RSPQDISABLED(x) ((x) << S_RSPQDISABLED) x 279 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RSPQCREDITOVERFOW(x) ((x) << S_RSPQCREDITOVERFOW) x 283 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FLEMPTY(x) ((x) << S_FLEMPTY) x 292 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TIMEOUT(x) ((x) << S_TIMEOUT) x 296 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_THRESHOLD(x) ((x) << S_THRESHOLD) x 306 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BASE1(x) ((x) << S_BASE1) x 315 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MSIXPARERR(x) ((x) << S_MSIXPARERR) x 320 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CFPARERR(x) ((x) << S_CFPARERR) x 325 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RFPARERR(x) ((x) << S_RFPARERR) x 330 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_WFPARERR(x) ((x) << S_WFPARERR) x 333 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PIOPARERR(x) ((x) << S_PIOPARERR) x 337 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DETUNCECCERR(x) ((x) << S_DETUNCECCERR) x 341 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DETCORECCERR(x) ((x) << S_DETCORECCERR) x 345 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RCVSPLCMPERR(x) ((x) << S_RCVSPLCMPERR) x 349 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UNXSPLCMP(x) ((x) << S_UNXSPLCMP) x 353 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SPLCMPDIS(x) ((x) << S_SPLCMPDIS) x 357 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DETPARERR(x) ((x) << S_DETPARERR) x 361 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SIGSYSERR(x) ((x) << S_SIGSYSERR) x 365 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RCVMSTABT(x) ((x) << S_RCVMSTABT) x 369 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RCVTARABT(x) ((x) << S_RCVTARABT) x 373 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SIGTARABT(x) ((x) << S_SIGTARABT) x 377 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MSTDETPARERR(x) ((x) << S_MSTDETPARERR) x 385 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DMASTOPEN(x) ((x) << S_DMASTOPEN) x 389 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CLIDECEN(x) ((x) << S_CLIDECEN) x 396 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCLKRANGE(x) ((x) << S_PCLKRANGE) x 397 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_PCLKRANGE(x) (((x) >> S_PCLKRANGE) & M_PCLKRANGE) x 401 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIXINITPAT(x) ((x) << S_PCIXINITPAT) x 402 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_PCIXINITPAT(x) (((x) >> S_PCIXINITPAT) & M_PCIXINITPAT) x 405 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_64BIT(x) ((x) << S_64BIT) x 413 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BISTERR(x) ((x) << S_BISTERR) x 416 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXPARERR(x) ((x) << S_TXPARERR) x 420 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXPARERR(x) ((x) << S_RXPARERR) x 424 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RETRYLUTPARERR(x) ((x) << S_RETRYLUTPARERR) x 428 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RETRYBUFPARERR(x) ((x) << S_RETRYBUFPARERR) x 434 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIE_MSIXPARERR(x) ((x) << S_PCIE_MSIXPARERR) x 437 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIE_CFPARERR(x) ((x) << S_PCIE_CFPARERR) x 441 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIE_RFPARERR(x) ((x) << S_PCIE_RFPARERR) x 445 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIE_WFPARERR(x) ((x) << S_PCIE_WFPARERR) x 449 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIE_PIOPARERR(x) ((x) << S_PCIE_PIOPARERR) x 453 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UNXSPLCPLERRC(x) ((x) << S_UNXSPLCPLERRC) x 457 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UNXSPLCPLERRR(x) ((x) << S_UNXSPLCPLERRR) x 461 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PEXERR(x) ((x) << S_PEXERR) x 467 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIE_DMASTOPEN(x) ((x) << S_PCIE_DMASTOPEN) x 473 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLELINKDWNDRST(x) ((x) << S_ENABLELINKDWNDRST) x 477 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLELINKDOWNRST(x) ((x) << S_ENABLELINKDOWNRST) x 481 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIE_CLIDECEN(x) ((x) << S_PCIE_CLIDECEN) x 485 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CRSTWRMMODE(x) ((x) << S_CRSTWRMMODE) x 492 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_NUMFSTTRNSEQRX(x) ((x) << S_NUMFSTTRNSEQRX) x 493 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_NUMFSTTRNSEQRX(x) (((x) >> S_NUMFSTTRNSEQRX) & M_NUMFSTTRNSEQRX) x 499 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_NUMFSTTRNSEQ(x) ((x) << S_NUMFSTTRNSEQ) x 500 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_NUMFSTTRNSEQ(x) (((x) >> S_NUMFSTTRNSEQ) & M_NUMFSTTRNSEQ) x 505 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_REPLAYLMT(x) ((x) << S_REPLAYLMT) x 512 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_T3A_ACKLAT(x) ((x) << S_T3A_ACKLAT) x 517 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ACKLAT(x) ((x) << S_ACKLAT) x 524 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO11_OEN(x) ((x) << S_GPIO11_OEN) x 528 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO10_OEN(x) ((x) << S_GPIO10_OEN) x 532 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO7_OEN(x) ((x) << S_GPIO7_OEN) x 536 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO6_OEN(x) ((x) << S_GPIO6_OEN) x 540 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO5_OEN(x) ((x) << S_GPIO5_OEN) x 544 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO4_OEN(x) ((x) << S_GPIO4_OEN) x 548 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO2_OEN(x) ((x) << S_GPIO2_OEN) x 552 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO1_OEN(x) ((x) << S_GPIO1_OEN) x 556 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO0_OEN(x) ((x) << S_GPIO0_OEN) x 560 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO10_OUT_VAL(x) ((x) << S_GPIO10_OUT_VAL) x 564 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO7_OUT_VAL(x) ((x) << S_GPIO7_OUT_VAL) x 568 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO6_OUT_VAL(x) ((x) << S_GPIO6_OUT_VAL) x 572 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO5_OUT_VAL(x) ((x) << S_GPIO5_OUT_VAL) x 576 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO4_OUT_VAL(x) ((x) << S_GPIO4_OUT_VAL) x 580 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO2_OUT_VAL(x) ((x) << S_GPIO2_OUT_VAL) x 584 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO1_OUT_VAL(x) ((x) << S_GPIO1_OUT_VAL) x 588 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO0_OUT_VAL(x) ((x) << S_GPIO0_OUT_VAL) x 594 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO11(x) ((x) << S_GPIO11) x 598 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO10(x) ((x) << S_GPIO10) x 602 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO9(x) ((x) << S_GPIO9) x 606 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO7(x) ((x) << S_GPIO7) x 610 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO6(x) ((x) << S_GPIO6) x 614 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO5(x) ((x) << S_GPIO5) x 618 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO4(x) ((x) << S_GPIO4) x 622 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO3(x) ((x) << S_GPIO3) x 626 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO2(x) ((x) << S_GPIO2) x 630 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO1(x) ((x) << S_GPIO1) x 634 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_GPIO0(x) ((x) << S_GPIO0) x 646 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IFEN(x) ((x) << S_IFEN) x 650 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TERM150(x) ((x) << S_TERM150) x 654 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SLOW(x) ((x) << S_SLOW) x 659 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_WIDTH(x) ((x) << S_WIDTH) x 660 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_WIDTH(x) (((x) >> S_WIDTH) & M_WIDTH) x 663 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BKS(x) ((x) << S_BKS) x 667 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ORG(x) ((x) << S_ORG) x 672 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DEN(x) ((x) << S_DEN) x 673 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_DEN(x) (((x) >> S_DEN) & M_DEN) x 676 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RDY(x) ((x) << S_RDY) x 680 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CLKEN(x) ((x) << S_CLKEN) x 686 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BUSY(x) ((x) << S_BUSY) x 701 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PREREFDIV(x) ((x) << S_PREREFDIV) x 704 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PERREFEN(x) ((x) << S_PERREFEN) x 710 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DLLENB(x) ((x) << S_DLLENB) x 714 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DLLRST(x) ((x) << S_DLLRST) x 721 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ACTTOPREDLY(x) ((x) << S_ACTTOPREDLY) x 725 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ACTTORDWRDLY(x) ((x) << S_ACTTORDWRDLY) x 729 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PRECYC(x) ((x) << S_PRECYC) x 733 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_REFCYC(x) ((x) << S_REFCYC) x 737 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BKCYC(x) ((x) << S_BKCYC) x 741 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_WRTORDDLY(x) ((x) << S_WRTORDDLY) x 745 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RDTOWRDLY(x) ((x) << S_RDTOWRDLY) x 750 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CAL_FAULT(x) ((x) << S_CAL_FAULT) x 754 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SGL_CAL_EN(x) ((x) << S_SGL_CAL_EN) x 762 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ECCCHKEN(x) ((x) << S_ECCCHKEN) x 766 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ECCGENEN(x) ((x) << S_ECCGENEN) x 780 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_DATA(x) (((x) >> S_DATA) & M_DATA) x 804 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OP(x) ((x) << S_OP) x 816 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CONT(x) ((x) << S_CONT) x 822 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_AE(x) ((x) << S_AE) x 828 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PE(x) ((x) << S_PE) x 830 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_PE(x) (((x) >> S_PE) & M_PE) x 833 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UE(x) ((x) << S_UE) x 837 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CE(x) ((x) << S_CE) x 850 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BOOTADDR(x) ((x) << S_BOOTADDR) x 859 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DTAGPARERR(x) ((x) << S_DTAGPARERR) x 863 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ITAGPARERR(x) ((x) << S_ITAGPARERR) x 867 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQTPPARERR(x) ((x) << S_IBQTPPARERR) x 871 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQULPPARERR(x) ((x) << S_IBQULPPARERR) x 875 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQSGEHIPARERR(x) ((x) << S_IBQSGEHIPARERR) x 879 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQSGELOPARERR(x) ((x) << S_IBQSGELOPARERR) x 883 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OBQULPLOPARERR(x) ((x) << S_OBQULPLOPARERR) x 887 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OBQULPHIPARERR(x) ((x) << S_OBQULPHIPARERR) x 891 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OBQSGEPARERR(x) ((x) << S_OBQSGEPARERR) x 895 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DCACHEPARERR(x) ((x) << S_DCACHEPARERR) x 899 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICACHEPARERR(x) ((x) << S_ICACHEPARERR) x 903 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DRAMPARERR(x) ((x) << S_DRAMPARERR) x 909 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BLKWRPLINT(x) ((x) << S_BLKWRPLINT) x 913 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BLKRDPLINT(x) ((x) << S_BLKRDPLINT) x 917 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BLKWRCTLINT(x) ((x) << S_BLKWRCTLINT) x 921 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BLKRDCTLINT(x) ((x) << S_BLKRDCTLINT) x 925 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BLKWRFLASHINT(x) ((x) << S_BLKWRFLASHINT) x 929 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BLKRDFLASHINT(x) ((x) << S_BLKRDFLASHINT) x 933 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SGLWRFLASHINT(x) ((x) << S_SGLWRFLASHINT) x 937 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_WRBLKFLASHINT(x) ((x) << S_WRBLKFLASHINT) x 941 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BLKWRBOOTINT(x) ((x) << S_BLKWRBOOTINT) x 945 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FLASHRANGEINT(x) ((x) << S_FLASHRANGEINT) x 949 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SDRAMRANGEINT(x) ((x) << S_SDRAMRANGEINT) x 953 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RSVDSPACEINT(x) ((x) << S_RSVDSPACEINT) x 959 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HOSTBUSY(x) ((x) << S_HOSTBUSY) x 968 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQDBGADDR(x) ((x) << S_IBQDBGADDR) x 969 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_IBQDBGADDR(x) (((x) >> S_IBQDBGADDR) & M_IBQDBGADDR) x 973 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQDBGQID(x) ((x) << S_IBQDBGQID) x 974 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_IBQDBGQID(x) (((x) >> S_IBQDBGQID) & M_IBQDBGQID) x 977 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQDBGWR(x) ((x) << S_IBQDBGWR) x 981 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQDBGBUSY(x) ((x) << S_IBQDBGBUSY) x 985 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IBQDBGEN(x) ((x) << S_IBQDBGEN) x 993 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXFBARBPRIO(x) ((x) << S_RXFBARBPRIO) x 997 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXFBARBPRIO(x) ((x) << S_TXFBARBPRIO) x 1001 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_NICMODE(x) ((x) << S_NICMODE) x 1005 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IPV6ENABLE(x) ((x) << S_IPV6ENABLE) x 1015 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXPACINGENABLE(x) ((x) << S_TXPACINGENABLE) x 1019 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PATHMTU(x) ((x) << S_PATHMTU) x 1023 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IPCHECKSUMOFFLOAD(x) ((x) << S_IPCHECKSUMOFFLOAD) x 1027 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UDPCHECKSUMOFFLOAD(x) ((x) << S_UDPCHECKSUMOFFLOAD) x 1031 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TCPCHECKSUMOFFLOAD(x) ((x) << S_TCPCHECKSUMOFFLOAD) x 1036 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IPTTL(x) ((x) << S_IPTTL) x 1044 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CMTIMERMAXNUM(x) ((x) << S_CMTIMERMAXNUM) x 1064 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MTUDEFAULT(x) ((x) << S_MTUDEFAULT) x 1067 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MTUENABLE(x) ((x) << S_MTUENABLE) x 1071 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SACKRX(x) ((x) << S_SACKRX) x 1078 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SACKMODE(x) ((x) << S_SACKMODE) x 1082 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_WINDOWSCALEMODE(x) ((x) << S_WINDOWSCALEMODE) x 1088 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TIMESTAMPSMODE(x) ((x) << S_TIMESTAMPSMODE) x 1094 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_AUTOSTATE3(x) ((x) << S_AUTOSTATE3) x 1098 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_AUTOSTATE2(x) ((x) << S_AUTOSTATE2) x 1102 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_AUTOSTATE1(x) ((x) << S_AUTOSTATE1) x 1106 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BYTETHRESHOLD(x) ((x) << S_BYTETHRESHOLD) x 1110 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MSSTHRESHOLD(x) ((x) << S_MSSTHRESHOLD) x 1113 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_AUTOCAREFUL(x) ((x) << S_AUTOCAREFUL) x 1117 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_AUTOENABLE(x) ((x) << S_AUTOENABLE) x 1121 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DACK_MODE(x) ((x) << S_DACK_MODE) x 1127 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXTOSQUEUEMAPMODE(x) ((x) << S_TXTOSQUEUEMAPMODE) x 1131 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLEEPCMDAFULL(x) ((x) << S_ENABLEEPCMDAFULL) x 1135 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MODULATEUNIONMODE(x) ((x) << S_MODULATEUNIONMODE) x 1139 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXDEFERENABLE(x) ((x) << S_TXDEFERENABLE) x 1143 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXCONGESTIONMODE(x) ((x) << S_RXCONGESTIONMODE) x 1147 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HEARBEATDACK(x) ((x) << S_HEARBEATDACK) x 1151 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXCONGESTIONMODE(x) ((x) << S_TXCONGESTIONMODE) x 1155 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLEOCSPIFULL(x) ((x) << S_ENABLEOCSPIFULL) x 1159 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LOCKTID(x) ((x) << S_LOCKTID) x 1164 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TABLELATENCYDELTA(x) ((x) << S_TABLELATENCYDELTA) x 1165 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_TABLELATENCYDELTA(x) \ x 1166 drivers/net/ethernet/chelsio/cxgb3/regs.h (((x) >> S_TABLELATENCYDELTA) & M_TABLELATENCYDELTA) x 1171 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DISBLEDAPARBIT0(x) ((x) << S_DISBLEDAPARBIT0) x 1175 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLEARPMISS(x) ((x) << S_ENABLEARPMISS) x 1179 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLENONOFDTNLSYN(x) ((x) << S_ENABLENONOFDTNLSYN) x 1183 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLEIPV6RSS(x) ((x) << S_ENABLEIPV6RSS) x 1187 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CHDRAFULL(x) ((x) << S_CHDRAFULL) x 1202 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MAXRXDATA(x) ((x) << S_MAXRXDATA) x 1206 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXCOALESCESIZE(x) ((x) << S_RXCOALESCESIZE) x 1213 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXDATAACKIDX(x) ((x) << S_TXDATAACKIDX) x 1216 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXPACEAUTOSTRICT(x) ((x) << S_TXPACEAUTOSTRICT) x 1220 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXPACEFIXED(x) ((x) << S_TXPACEFIXED) x 1224 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXPACEAUTO(x) ((x) << S_TXPACEAUTO) x 1228 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXCOALESCEENABLE(x) ((x) << S_RXCOALESCEENABLE) x 1232 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXCOALESCEPSHEN(x) ((x) << S_RXCOALESCEPSHEN) x 1240 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXDDPOFFINIT(x) ((x) << S_RXDDPOFFINIT) x 1246 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_T3A_ENABLEESND(x) ((x) << S_T3A_ENABLEESND) x 1250 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENABLEESND(x) ((x) << S_ENABLEESND) x 1257 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PMMAXXFERLEN1(x) ((x) << S_PMMAXXFERLEN1) x 1261 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PMMAXXFERLEN0(x) ((x) << S_PMMAXXFERLEN0) x 1267 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TIMERRESOLUTION(x) ((x) << S_TIMERRESOLUTION) x 1271 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TIMESTAMPRESOLUTION(x) ((x) << S_TIMESTAMPRESOLUTION) x 1275 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DELAYEDACKRESOLUTION(x) ((x) << S_DELAYEDACKRESOLUTION) x 1303 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SYNSHIFTMAX(x) ((x) << S_SYNSHIFTMAX) x 1309 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXTSHIFTMAXR1(x) ((x) << S_RXTSHIFTMAXR1) x 1315 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXTSHIFTMAXR2(x) ((x) << S_RXTSHIFTMAXR2) x 1319 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PERSHIFTBACKOFFMAX(x) ((x) << S_PERSHIFTBACKOFFMAX) x 1323 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PERSHIFTMAX(x) ((x) << S_PERSHIFTMAX) x 1329 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_KEEPALIVEMAX(x) ((x) << S_KEEPALIVEMAX) x 1344 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TNL4TUPEN(x) ((x) << S_TNL4TUPEN) x 1348 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TNL2TUPEN(x) ((x) << S_TNL2TUPEN) x 1352 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TNLPRTEN(x) ((x) << S_TNLPRTEN) x 1356 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TNLMAPEN(x) ((x) << S_TNLMAPEN) x 1360 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TNLLKPEN(x) ((x) << S_TNLLKPEN) x 1364 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RRCPLMAPEN(x) ((x) << S_RRCPLMAPEN) x 1369 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RRCPLCPUSIZE(x) ((x) << S_RRCPLCPUSIZE) x 1372 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RQFEEDBACKENABLE(x) ((x) << S_RQFEEDBACKENABLE) x 1376 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HASHTOEPLITZ(x) ((x) << S_HASHTOEPLITZ) x 1393 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TX_MOD_QUEUE_REQ_MAP(x) ((x) << S_TX_MOD_QUEUE_REQ_MAP) x 1410 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FLSTINITENABLE(x) ((x) << S_FLSTINITENABLE) x 1414 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TPRESET(x) ((x) << S_TPRESET) x 1432 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FLMTXFLSTEMPTY(x) ((x) << S_FLMTXFLSTEMPTY) x 1436 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FLMRXFLSTEMPTY(x) ((x) << S_FLMRXFLSTEMPTY) x 1440 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ARPLUTPERR(x) ((x) << S_ARPLUTPERR) x 1444 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CMCACHEPERR(x) ((x) << S_CMCACHEPERR) x 1458 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_REWRITEFORCETOSIZE(x) ((x) << S_REWRITEFORCETOSIZE) x 1469 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXDROPCNTCH0RCVD(x) ((x) << S_TXDROPCNTCH0RCVD) x 1470 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_TXDROPCNTCH0RCVD(x) (((x) >> S_TXDROPCNTCH0RCVD) & \ x 1485 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ROUND_ROBIN(x) ((x) << S_ROUND_ROBIN) x 1491 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DATASELFRAMEERR0(x) ((x) << S_DATASELFRAMEERR0) x 1495 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DATASELFRAMEERR1(x) ((x) << S_DATASELFRAMEERR1) x 1499 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCMDMUXPERR(x) ((x) << S_PCMDMUXPERR) x 1503 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ARBFPERR(x) ((x) << S_ARBFPERR) x 1507 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ARBPF0PERR(x) ((x) << S_ARBPF0PERR) x 1511 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ARBPF1PERR(x) ((x) << S_ARBPF1PERR) x 1515 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PARERRPCMD(x) ((x) << S_PARERRPCMD) x 1519 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PARERRDATA(x) ((x) << S_PARERRDATA) x 1539 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_HPZ0(x) ((x) << S_HPZ0) x 1540 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_HPZ0(x) (((x) >> S_HPZ0) & M_HPZ0) x 1559 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CFG_CQE_SOP_MASK(x) ((x) << S_CFG_CQE_SOP_MASK) x 1563 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CFG_RR_ARB(x) ((x) << S_CFG_RR_ARB) x 1569 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PBL_BOUND_ERR_CH1(x) ((x) << S_PBL_BOUND_ERR_CH1) x 1573 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PBL_BOUND_ERR_CH0(x) ((x) << S_PBL_BOUND_ERR_CH0) x 1590 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_D1_WEIGHT(x) ((x) << S_D1_WEIGHT) x 1594 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_D0_WEIGHT(x) ((x) << S_D0_WEIGHT) x 1602 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ZERO_E_CMD_ERROR(x) ((x) << S_ZERO_E_CMD_ERROR) x 1606 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IESPI0_FIFO2X_RX_FRAMING_ERROR(x) ((x) << S_IESPI0_FIFO2X_RX_FRAMING_ERROR) x 1610 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IESPI1_FIFO2X_RX_FRAMING_ERROR(x) ((x) << S_IESPI1_FIFO2X_RX_FRAMING_ERROR) x 1614 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IESPI0_RX_FRAMING_ERROR(x) ((x) << S_IESPI0_RX_FRAMING_ERROR) x 1618 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IESPI1_RX_FRAMING_ERROR(x) ((x) << S_IESPI1_RX_FRAMING_ERROR) x 1622 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IESPI0_TX_FRAMING_ERROR(x) ((x) << S_IESPI0_TX_FRAMING_ERROR) x 1626 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IESPI1_TX_FRAMING_ERROR(x) ((x) << S_IESPI1_TX_FRAMING_ERROR) x 1630 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCSPI0_RX_FRAMING_ERROR(x) ((x) << S_OCSPI0_RX_FRAMING_ERROR) x 1634 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCSPI1_RX_FRAMING_ERROR(x) ((x) << S_OCSPI1_RX_FRAMING_ERROR) x 1638 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCSPI0_TX_FRAMING_ERROR(x) ((x) << S_OCSPI0_TX_FRAMING_ERROR) x 1642 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCSPI1_TX_FRAMING_ERROR(x) ((x) << S_OCSPI1_TX_FRAMING_ERROR) x 1646 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCSPI0_OFIFO2X_TX_FRAMING_ERROR(x) ((x) << S_OCSPI0_OFIFO2X_TX_FRAMING_ERROR) x 1650 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCSPI1_OFIFO2X_TX_FRAMING_ERROR(x) ((x) << S_OCSPI1_OFIFO2X_TX_FRAMING_ERROR) x 1656 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_IESPI_PAR_ERROR(x) ((x) << S_IESPI_PAR_ERROR) x 1661 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OCSPI_PAR_ERROR(x) ((x) << S_OCSPI_PAR_ERROR) x 1671 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ZERO_C_CMD_ERROR(x) ((x) << S_ZERO_C_CMD_ERROR) x 1675 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICSPI0_FIFO2X_RX_FRAMING_ERROR(x) ((x) << S_ICSPI0_FIFO2X_RX_FRAMING_ERROR) x 1679 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICSPI1_FIFO2X_RX_FRAMING_ERROR(x) ((x) << S_ICSPI1_FIFO2X_RX_FRAMING_ERROR) x 1683 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICSPI0_RX_FRAMING_ERROR(x) ((x) << S_ICSPI0_RX_FRAMING_ERROR) x 1687 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICSPI1_RX_FRAMING_ERROR(x) ((x) << S_ICSPI1_RX_FRAMING_ERROR) x 1691 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICSPI0_TX_FRAMING_ERROR(x) ((x) << S_ICSPI0_TX_FRAMING_ERROR) x 1695 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICSPI1_TX_FRAMING_ERROR(x) ((x) << S_ICSPI1_TX_FRAMING_ERROR) x 1699 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OESPI0_RX_FRAMING_ERROR(x) ((x) << S_OESPI0_RX_FRAMING_ERROR) x 1703 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OESPI1_RX_FRAMING_ERROR(x) ((x) << S_OESPI1_RX_FRAMING_ERROR) x 1707 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OESPI0_TX_FRAMING_ERROR(x) ((x) << S_OESPI0_TX_FRAMING_ERROR) x 1711 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OESPI1_TX_FRAMING_ERROR(x) ((x) << S_OESPI1_TX_FRAMING_ERROR) x 1715 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OESPI0_OFIFO2X_TX_FRAMING_ERROR(x) ((x) << S_OESPI0_OFIFO2X_TX_FRAMING_ERROR) x 1719 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OESPI1_OFIFO2X_TX_FRAMING_ERROR(x) ((x) << S_OESPI1_OFIFO2X_TX_FRAMING_ERROR) x 1725 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ICSPI_PAR_ERROR(x) ((x) << S_ICSPI_PAR_ERROR) x 1730 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_OESPI_PAR_ERROR(x) ((x) << S_OESPI_PAR_ERROR) x 1737 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TPRXPORTEN(x) ((x) << S_TPRXPORTEN) x 1741 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TPTXPORT1EN(x) ((x) << S_TPTXPORT1EN) x 1745 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TPTXPORT0EN(x) ((x) << S_TPTXPORT0EN) x 1749 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PORT1ACTIVE(x) ((x) << S_PORT1ACTIVE) x 1753 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PORT0ACTIVE(x) ((x) << S_PORT0ACTIVE) x 1757 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENFORCEPKT(x) ((x) << S_ENFORCEPKT) x 1765 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MCAPARERRENB(x) ((x) << S_MCAPARERRENB) x 1770 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXTPPARERRENB(x) ((x) << S_RXTPPARERRENB) x 1775 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TX1TPPARERRENB(x) ((x) << S_TX1TPPARERRENB) x 1780 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TX0TPPARERRENB(x) ((x) << S_TX0TPPARERRENB) x 1787 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MCAPARERR(x) ((x) << S_MCAPARERR) x 1792 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXTPPARERR(x) ((x) << S_RXTPPARERR) x 1797 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TX1TPPARERR(x) ((x) << S_TX1TPPARERR) x 1802 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TX0TPPARERR(x) ((x) << S_TX0TPPARERR) x 1809 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CIM_OP_MAP_PERR(x) ((x) << S_CIM_OP_MAP_PERR) x 1813 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CIM_OVFL_ERROR(x) ((x) << S_CIM_OVFL_ERROR) x 1817 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TP_FRAMING_ERROR(x) ((x) << S_TP_FRAMING_ERROR) x 1821 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SGE_FRAMING_ERROR(x) ((x) << S_SGE_FRAMING_ERROR) x 1825 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CIM_FRAMING_ERROR(x) ((x) << S_CIM_FRAMING_ERROR) x 1829 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ZERO_SWITCH_ERROR(x) ((x) << S_ZERO_SWITCH_ERROR) x 1842 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_I2C_CLKDIV(x) ((x) << S_I2C_CLKDIV) x 1848 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CLKDIV(x) ((x) << S_CLKDIV) x 1854 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ST(x) ((x) << S_ST) x 1856 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_ST(x) (((x) >> S_ST) & M_ST) x 1859 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PREEN(x) ((x) << S_PREEN) x 1863 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MDIINV(x) ((x) << S_MDIINV) x 1867 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MDIEN(x) ((x) << S_MDIEN) x 1874 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PHYADDR(x) ((x) << S_PHYADDR) x 1878 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_REGADDR(x) ((x) << S_REGADDR) x 1886 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MDI_OP(x) ((x) << S_MDI_OP) x 1894 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_BYTECNT(x) ((x) << S_BYTECNT) x 1899 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_T3DBG(x) ((x) << S_T3DBG) x 1903 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XGMAC0_1(x) ((x) << S_XGMAC0_1) x 1907 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XGMAC0_0(x) ((x) << S_XGMAC0_0) x 1911 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MC5A(x) ((x) << S_MC5A) x 1915 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CPL_SWITCH(x) ((x) << S_CPL_SWITCH) x 1919 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MPS0(x) ((x) << S_MPS0) x 1923 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PM1_TX(x) ((x) << S_PM1_TX) x 1927 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PM1_RX(x) ((x) << S_PM1_RX) x 1931 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ULP2_TX(x) ((x) << S_ULP2_TX) x 1935 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ULP2_RX(x) ((x) << S_ULP2_RX) x 1939 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TP1(x) ((x) << S_TP1) x 1943 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CIM(x) ((x) << S_CIM) x 1947 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MC7_CM(x) ((x) << S_MC7_CM) x 1951 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MC7_PMTX(x) ((x) << S_MC7_PMTX) x 1955 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MC7_PMRX(x) ((x) << S_MC7_PMRX) x 1959 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCIM0(x) ((x) << S_PCIM0) x 1963 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SGE3(x) ((x) << S_SGE3) x 1971 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_FATALPERREN(x) ((x) << S_FATALPERREN) x 1975 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CRSTWRM(x) ((x) << S_CRSTWRM) x 1985 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TMTYPEHI(x) ((x) << S_TMTYPEHI) x 1990 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TMPARTSIZE(x) ((x) << S_TMPARTSIZE) x 1991 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_TMPARTSIZE(x) (((x) >> S_TMPARTSIZE) & M_TMPARTSIZE) x 1995 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TMTYPE(x) ((x) << S_TMTYPE) x 1996 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_TMTYPE(x) (((x) >> S_TMTYPE) & M_TMTYPE) x 1999 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_COMPEN(x) ((x) << S_COMPEN) x 2003 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PRTYEN(x) ((x) << S_PRTYEN) x 2007 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MBUSEN(x) ((x) << S_MBUSEN) x 2011 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DBGIEN(x) ((x) << S_DBGIEN) x 2015 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TMRDY(x) ((x) << S_TMRDY) x 2019 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TMRST(x) ((x) << S_TMRST) x 2023 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TMMODE(x) ((x) << S_TMMODE) x 2036 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RDLAT(x) ((x) << S_RDLAT) x 2040 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LRNLAT(x) ((x) << S_LRNLAT) x 2044 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SRCHLAT(x) ((x) << S_SRCHLAT) x 2051 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DELACTEMPTY(x) ((x) << S_DELACTEMPTY) x 2055 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DISPQPARERR(x) ((x) << S_DISPQPARERR) x 2059 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_REQQPARERR(x) ((x) << S_REQQPARERR) x 2063 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UNKNOWNCMD(x) ((x) << S_UNKNOWNCMD) x 2067 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_NFASRCHFAIL(x) ((x) << S_NFASRCHFAIL) x 2071 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ACTRGNFULL(x) ((x) << S_ACTRGNFULL) x 2075 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PARITYERR(x) ((x) << S_PARITYERR) x 2099 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DBGIRSPVALID(x) ((x) << S_DBGIRSPVALID) x 2137 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXEN(x) ((x) << S_TXEN) x 2143 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXPAUSEEN(x) ((x) << S_TXPAUSEEN) x 2151 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXEN(x) ((x) << S_RXEN) x 2157 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DISPAUSEFRAMES(x) ((x) << S_DISPAUSEFRAMES) x 2161 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_EN1536BFRAMES(x) ((x) << S_EN1536BFRAMES) x 2165 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENJUMBO(x) ((x) << S_ENJUMBO) x 2169 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RMFCS(x) ((x) << S_RMFCS) x 2173 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENHASHMCAST(x) ((x) << S_ENHASHMCAST) x 2177 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_COPYALLFRAMES(x) ((x) << S_COPYALLFRAMES) x 2181 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DISBCAST(x) ((x) << S_DISBCAST) x 2209 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LINKFAULTCHANGE(x) ((x) << S_LINKFAULTCHANGE) x 2218 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CLRSTATS(x) ((x) << S_CLRSTATS) x 2224 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXFIFO_EMPTY(x) ((x) << S_RXFIFO_EMPTY) x 2230 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXFIFOPAUSEHWM(x) ((x) << S_RXFIFOPAUSEHWM) x 2232 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_RXFIFOPAUSEHWM(x) (((x) >> S_RXFIFOPAUSEHWM) & M_RXFIFOPAUSEHWM) x 2237 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXFIFOPAUSELWM(x) ((x) << S_RXFIFOPAUSELWM) x 2239 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_RXFIFOPAUSELWM(x) (((x) >> S_RXFIFOPAUSELWM) & M_RXFIFOPAUSELWM) x 2242 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXSTRFRWRD(x) ((x) << S_RXSTRFRWRD) x 2246 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_DISERRFRAMES(x) ((x) << S_DISERRFRAMES) x 2252 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_UNDERUNFIX(x) ((x) << S_UNDERUNFIX) x 2257 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXIPG(x) ((x) << S_TXIPG) x 2258 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_TXIPG(x) (((x) >> S_TXIPG) & M_TXIPG) x 2263 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXFIFOTHRESH(x) ((x) << S_TXFIFOTHRESH) x 2266 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENDROPPKT(x) ((x) << S_ENDROPPKT) x 2273 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SERDESRESET_(x) ((x) << S_SERDESRESET_) x 2277 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXENABLE(x) ((x) << S_RXENABLE) x 2281 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXENABLE(x) ((x) << S_TXENABLE) x 2289 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XGM_IMPSETUPDATE(x) ((x) << S_XGM_IMPSETUPDATE) x 2294 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RGMIIIMPPD(x) ((x) << S_RGMIIIMPPD) x 2298 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RGMIIIMPPU(x) ((x) << S_RGMIIIMPPU) x 2301 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CALRESET(x) ((x) << S_CALRESET) x 2305 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CALUPDATE(x) ((x) << S_CALUPDATE) x 2311 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CALBUSY(x) ((x) << S_CALBUSY) x 2315 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XGM_CALFAULT(x) ((x) << S_XGM_CALFAULT) x 2320 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CALIMP(x) ((x) << S_CALIMP) x 2321 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_CALIMP(x) (((x) >> S_CALIMP) & M_CALIMP) x 2325 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XAUIIMP(x) ((x) << S_XAUIIMP) x 2331 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXMAXFRAMERSIZE(x) ((x) << S_RXMAXFRAMERSIZE) x 2332 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_RXMAXFRAMERSIZE(x) (((x) >> S_RXMAXFRAMERSIZE) & M_RXMAXFRAMERSIZE) x 2335 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXENFRAMER(x) ((x) << S_RXENFRAMER) x 2340 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXMAXPKTSIZE(x) ((x) << S_RXMAXPKTSIZE) x 2341 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_RXMAXPKTSIZE(x) (((x) >> S_RXMAXPKTSIZE) & M_RXMAXPKTSIZE) x 2346 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XGMAC_STOP_EN(x) ((x) << S_XGMAC_STOP_EN) x 2350 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XG2G_RESET_(x) ((x) << S_XG2G_RESET_) x 2354 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RGMII_RESET_(x) ((x) << S_RGMII_RESET_) x 2358 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PCS_RESET_(x) ((x) << S_PCS_RESET_) x 2362 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_MAC_RESET_(x) ((x) << S_MAC_RESET_) x 2368 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CLKDIVRESET_(x) ((x) << S_CLKDIVRESET_) x 2374 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PORTSPEED(x) ((x) << S_PORTSPEED) x 2377 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_ENRGMII(x) ((x) << S_ENRGMII) x 2385 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXFIFO_PRTY_ERR(x) ((x) << S_TXFIFO_PRTY_ERR) x 2390 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXFIFO_PRTY_ERR(x) ((x) << S_RXFIFO_PRTY_ERR) x 2393 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXFIFO_UNDERRUN(x) ((x) << S_TXFIFO_UNDERRUN) x 2397 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RXFIFO_OVERFLOW(x) ((x) << S_RXFIFO_OVERFLOW) x 2403 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_SERDES_LOS(x) ((x) << S_SERDES_LOS) x 2406 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XAUIPCSCTCERR(x) ((x) << S_XAUIPCSCTCERR) x 2410 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XAUIPCSALIGNCHANGE(x) ((x) << S_XAUIPCSALIGNCHANGE) x 2414 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_XGM_INT(x) ((x) << S_XGM_INT) x 2422 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXACTENABLE(x) ((x) << S_TXACTENABLE) x 2426 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RESET3(x) ((x) << S_RESET3) x 2430 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RESET2(x) ((x) << S_RESET2) x 2434 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RESET1(x) ((x) << S_RESET1) x 2438 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RESET0(x) ((x) << S_RESET0) x 2442 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PWRDN3(x) ((x) << S_PWRDN3) x 2446 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PWRDN2(x) ((x) << S_PWRDN2) x 2450 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PWRDN1(x) ((x) << S_PWRDN1) x 2454 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_PWRDN0(x) ((x) << S_PWRDN0) x 2458 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RESETPLL23(x) ((x) << S_RESETPLL23) x 2462 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_RESETPLL01(x) ((x) << S_RESETPLL01) x 2470 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_LOWSIG0(x) ((x) << S_LOWSIG0) x 2550 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_CMULOCK(x) ((x) << S_CMULOCK) x 2559 drivers/net/ethernet/chelsio/cxgb3/regs.h #define V_TXSPI4SOPCNT(x) ((x) << S_TXSPI4SOPCNT) x 2560 drivers/net/ethernet/chelsio/cxgb3/regs.h #define G_TXSPI4SOPCNT(x) (((x) >> S_TXSPI4SOPCNT) & M_TXSPI4SOPCNT) x 11 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS) x 12 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS) x 15 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_GTS(x) ((x) << S_EC_GTS) x 20 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_INDEX(x) ((x) << S_EC_INDEX) x 21 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX) x 25 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_SIZE(x) ((x) << S_EC_SIZE) x 26 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE) x 30 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO) x 31 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_BASE_LO(x) (((x) >> S_EC_BASE_LO) & M_EC_BASE_LO) x 35 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_BASE_HI(x) ((x) << S_EC_BASE_HI) x 36 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_BASE_HI(x) (((x) >> S_EC_BASE_HI) & M_EC_BASE_HI) x 40 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_RESPQ(x) ((x) << S_EC_RESPQ) x 41 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_RESPQ(x) (((x) >> S_EC_RESPQ) & M_EC_RESPQ) x 45 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_TYPE(x) ((x) << S_EC_TYPE) x 46 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_TYPE(x) (((x) >> S_EC_TYPE) & M_EC_TYPE) x 49 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_GEN(x) ((x) << S_EC_GEN) x 54 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_UP_TOKEN(x) ((x) << S_EC_UP_TOKEN) x 55 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_EC_UP_TOKEN(x) (((x) >> S_EC_UP_TOKEN) & M_EC_UP_TOKEN) x 58 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_EC_VALID(x) ((x) << S_EC_VALID) x 63 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RQ_MSI_VEC(x) ((x) << S_RQ_MSI_VEC) x 64 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_RQ_MSI_VEC(x) (((x) >> S_RQ_MSI_VEC) & M_RQ_MSI_VEC) x 67 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RQ_INTR_EN(x) ((x) << S_RQ_INTR_EN) x 71 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RQ_GEN(x) ((x) << S_RQ_GEN) x 76 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_INDEX(x) ((x) << S_CQ_INDEX) x 77 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_CQ_INDEX(x) (((x) >> S_CQ_INDEX) & M_CQ_INDEX) x 81 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_SIZE(x) ((x) << S_CQ_SIZE) x 82 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_CQ_SIZE(x) (((x) >> S_CQ_SIZE) & M_CQ_SIZE) x 86 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_BASE_HI(x) ((x) << S_CQ_BASE_HI) x 87 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_CQ_BASE_HI(x) (((x) >> S_CQ_BASE_HI) & M_CQ_BASE_HI) x 91 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_RSPQ(x) ((x) << S_CQ_RSPQ) x 92 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_CQ_RSPQ(x) (((x) >> S_CQ_RSPQ) & M_CQ_RSPQ) x 95 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_ASYNC_NOTIF(x) ((x) << S_CQ_ASYNC_NOTIF) x 99 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_ARMED(x) ((x) << S_CQ_ARMED) x 103 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_ASYNC_NOTIF_SOL(x) ((x) << S_CQ_ASYNC_NOTIF_SOL) x 107 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_GEN(x) ((x) << S_CQ_GEN) x 111 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_ERR(x) ((x) << S_CQ_ERR) x 115 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_OVERFLOW_MODE(x) ((x) << S_CQ_OVERFLOW_MODE) x 120 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_CREDITS(x) ((x) << S_CQ_CREDITS) x 121 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_CQ_CREDITS(x) (((x) >> S_CQ_CREDITS) & M_CQ_CREDITS) x 125 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_CQ_CREDIT_THRES(x) ((x) << S_CQ_CREDIT_THRES) x 126 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_CQ_CREDIT_THRES(x) (((x) >> S_CQ_CREDIT_THRES) & M_CQ_CREDIT_THRES) x 130 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_BASE_HI(x) ((x) << S_FL_BASE_HI) x 131 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_FL_BASE_HI(x) (((x) >> S_FL_BASE_HI) & M_FL_BASE_HI) x 135 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_INDEX_LO(x) ((x) << S_FL_INDEX_LO) x 136 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_FL_INDEX_LO(x) (((x) >> S_FL_INDEX_LO) & M_FL_INDEX_LO) x 140 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_INDEX_HI(x) ((x) << S_FL_INDEX_HI) x 141 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_FL_INDEX_HI(x) (((x) >> S_FL_INDEX_HI) & M_FL_INDEX_HI) x 145 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_SIZE(x) ((x) << S_FL_SIZE) x 146 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_FL_SIZE(x) (((x) >> S_FL_SIZE) & M_FL_SIZE) x 149 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_GEN(x) ((x) << S_FL_GEN) x 154 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_ENTRY_SIZE_LO(x) ((x) << S_FL_ENTRY_SIZE_LO) x 155 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_FL_ENTRY_SIZE_LO(x) (((x) >> S_FL_ENTRY_SIZE_LO) & M_FL_ENTRY_SIZE_LO) x 159 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_ENTRY_SIZE_HI(x) ((x) << S_FL_ENTRY_SIZE_HI) x 160 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_FL_ENTRY_SIZE_HI(x) (((x) >> S_FL_ENTRY_SIZE_HI) & M_FL_ENTRY_SIZE_HI) x 164 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_CONG_THRES(x) ((x) << S_FL_CONG_THRES) x 165 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_FL_CONG_THRES(x) (((x) >> S_FL_CONG_THRES) & M_FL_CONG_THRES) x 168 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FL_GTS(x) ((x) << S_FL_GTS) x 172 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FLD_GEN1(x) ((x) << S_FLD_GEN1) x 176 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_FLD_GEN2(x) ((x) << S_FLD_GEN2) x 181 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_TXQ1_CR(x) ((x) << S_RSPD_TXQ1_CR) x 182 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_RSPD_TXQ1_CR(x) (((x) >> S_RSPD_TXQ1_CR) & M_RSPD_TXQ1_CR) x 185 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_TXQ1_GTS(x) ((x) << S_RSPD_TXQ1_GTS) x 190 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_TXQ2_CR(x) ((x) << S_RSPD_TXQ2_CR) x 191 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_RSPD_TXQ2_CR(x) (((x) >> S_RSPD_TXQ2_CR) & M_RSPD_TXQ2_CR) x 194 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_TXQ2_GTS(x) ((x) << S_RSPD_TXQ2_GTS) x 199 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_TXQ0_CR(x) ((x) << S_RSPD_TXQ0_CR) x 200 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_RSPD_TXQ0_CR(x) (((x) >> S_RSPD_TXQ0_CR) & M_RSPD_TXQ0_CR) x 203 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_TXQ0_GTS(x) ((x) << S_RSPD_TXQ0_GTS) x 207 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_EOP(x) ((x) << S_RSPD_EOP) x 211 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_SOP(x) ((x) << S_RSPD_SOP) x 215 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_ASYNC_NOTIF(x) ((x) << S_RSPD_ASYNC_NOTIF) x 219 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_FL0_GTS(x) ((x) << S_RSPD_FL0_GTS) x 223 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_FL1_GTS(x) ((x) << S_RSPD_FL1_GTS) x 227 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_IMM_DATA_VALID(x) ((x) << S_RSPD_IMM_DATA_VALID) x 231 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_OFFLOAD(x) ((x) << S_RSPD_OFFLOAD) x 235 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_GEN1(x) ((x) << S_RSPD_GEN1) x 240 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN) x 241 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN) x 244 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_FLQ(x) ((x) << S_RSPD_FLQ) x 248 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_GEN2(x) ((x) << S_RSPD_GEN2) x 253 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define V_RSPD_INR_VEC(x) ((x) << S_RSPD_INR_VEC) x 254 drivers/net/ethernet/chelsio/cxgb3/sge_defs.h #define G_RSPD_INR_VEC(x) (((x) >> S_RSPD_INR_VEC) & M_RSPD_INR_VEC) x 190 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_OPCODE(x) ((x) << S_OPCODE) x 191 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_OPCODE(x) (((x) >> S_OPCODE) & 0xFF) x 192 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TID(x) ((x) & 0xFFFFFF) x 195 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_QNUM(x) (((x) >> S_QNUM) & 0xFFFF) x 199 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE) x 247 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_SGE_CREDITS(x) ((x) << S_WR_SGE_CREDITS) x 248 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_WR_SGE_CREDITS(x) (((x) >> S_WR_SGE_CREDITS) & M_WR_SGE_CREDITS) x 252 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_SGLSFLT(x) ((x) << S_WR_SGLSFLT) x 253 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_WR_SGLSFLT(x) (((x) >> S_WR_SGLSFLT) & M_WR_SGLSFLT) x 257 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_BCNTLFLT(x) ((x) << S_WR_BCNTLFLT) x 258 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_WR_BCNTLFLT(x) (((x) >> S_WR_BCNTLFLT) & M_WR_BCNTLFLT) x 261 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_DATATYPE(x) ((x) << S_WR_DATATYPE) x 265 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_COMPL(x) ((x) << S_WR_COMPL) x 269 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_EOP(x) ((x) << S_WR_EOP) x 273 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_SOP(x) ((x) << S_WR_SOP) x 278 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_OP(x) ((x) << S_WR_OP) x 279 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_WR_OP(x) (((x) >> S_WR_OP) & M_WR_OP) x 284 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_LEN(x) ((x) << S_WR_LEN) x 285 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_WR_LEN(x) (((x) >> S_WR_LEN) & M_WR_LEN) x 289 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_TID(x) ((x) << S_WR_TID) x 290 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_WR_TID(x) (((x) >> S_WR_TID) & M_WR_TID) x 293 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_CR_FLUSH(x) ((x) << S_WR_CR_FLUSH) x 297 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WR_GEN(x) ((x) << S_WR_GEN) x 310 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_CPL_STATUS(x) ((x) << S_CPL_STATUS) x 311 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_CPL_STATUS(x) (((x) >> S_CPL_STATUS) & M_CPL_STATUS) x 314 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_INJECT_TIMER(x) ((x) << S_INJECT_TIMER) x 318 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_NO_OFFLOAD(x) ((x) << S_NO_OFFLOAD) x 323 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ULP_MODE(x) ((x) << S_ULP_MODE) x 324 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_ULP_MODE(x) (((x) >> S_ULP_MODE) & M_ULP_MODE) x 328 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RCV_BUFSIZ(x) ((x) << S_RCV_BUFSIZ) x 329 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RCV_BUFSIZ(x) (((x) >> S_RCV_BUFSIZ) & M_RCV_BUFSIZ) x 333 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TOS(x) ((x) << S_TOS) x 334 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TOS(x) (((x) >> S_TOS) & M_TOS) x 338 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DELACK(x) ((x) << S_DELACK) x 342 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_NO_CONG(x) ((x) << S_NO_CONG) x 347 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_SRC_MAC_SEL(x) ((x) << S_SRC_MAC_SEL) x 348 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_SRC_MAC_SEL(x) (((x) >> S_SRC_MAC_SEL) & M_SRC_MAC_SEL) x 352 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_IDX(x) ((x) << S_L2T_IDX) x 353 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_IDX(x) (((x) >> S_L2T_IDX) & M_L2T_IDX) x 356 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_CHANNEL(x) ((x) << S_TX_CHANNEL) x 360 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TCAM_BYPASS(x) ((x) << S_TCAM_BYPASS) x 364 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_NAGLE(x) ((x) << S_NAGLE) x 369 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_WND_SCALE(x) ((x) << S_WND_SCALE) x 370 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_WND_SCALE(x) (((x) >> S_WND_SCALE) & M_WND_SCALE) x 373 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_KEEP_ALIVE(x) ((x) << S_KEEP_ALIVE) x 378 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_MAX_RETRANS(x) ((x) << S_MAX_RETRANS) x 379 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_MAX_RETRANS(x) (((x) >> S_MAX_RETRANS) & M_MAX_RETRANS) x 382 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_MAX_RETRANS_OVERRIDE(x) ((x) << S_MAX_RETRANS_OVERRIDE) x 387 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_MSS_IDX(x) ((x) << S_MSS_IDX) x 388 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX) x 392 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RSS_ENABLE(x) ((x) << S_RSS_ENABLE) x 397 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RSS_MASK_LEN(x) ((x) << S_RSS_MASK_LEN) x 398 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RSS_MASK_LEN(x) (((x) >> S_RSS_MASK_LEN) & M_RSS_MASK_LEN) x 402 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_CPU_IDX(x) ((x) << S_CPU_IDX) x 403 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_CPU_IDX(x) (((x) >> S_CPU_IDX) & M_CPU_IDX) x 406 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_MAC_MATCH_VALID(x) ((x) << S_MAC_MATCH_VALID) x 411 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_CONN_POLICY(x) ((x) << S_CONN_POLICY) x 412 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_CONN_POLICY(x) (((x) >> S_CONN_POLICY) & M_CONN_POLICY) x 415 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_SYN_DEFENSE(x) ((x) << S_SYN_DEFENSE) x 420 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_VLAN_PRI(x) ((x) << S_VLAN_PRI) x 421 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_VLAN_PRI(x) (((x) >> S_VLAN_PRI) & M_VLAN_PRI) x 424 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_VLAN_PRI_VALID(x) ((x) << S_VLAN_PRI_VALID) x 429 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_PKT_TYPE(x) ((x) << S_PKT_TYPE) x 430 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_PKT_TYPE(x) (((x) >> S_PKT_TYPE) & M_PKT_TYPE) x 434 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_MAC_MATCH(x) ((x) << S_MAC_MATCH) x 435 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_MAC_MATCH(x) (((x) >> S_MAC_MATCH) & M_MAC_MATCH) x 440 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_CPU_INDEX(x) ((x) << S_CPU_INDEX) x 441 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_CPU_INDEX(x) (((x) >> S_CPU_INDEX) & M_CPU_INDEX) x 444 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_CPU_INDEX_VALID(x) ((x) << S_CPU_INDEX_VALID) x 449 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_COALESCE(x) ((x) << S_RX_COALESCE) x 450 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RX_COALESCE(x) (((x) >> S_RX_COALESCE) & M_RX_COALESCE) x 453 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_COALESCE_VALID(x) ((x) << S_RX_COALESCE_VALID) x 458 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_CONG_CONTROL_FLAVOR(x) ((x) << S_CONG_CONTROL_FLAVOR) x 459 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_CONG_CONTROL_FLAVOR(x) (((x) >> S_CONG_CONTROL_FLAVOR) & M_CONG_CONTROL_FLAVOR) x 463 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_PACING_FLAVOR(x) ((x) << S_PACING_FLAVOR) x 464 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_PACING_FLAVOR(x) (((x) >> S_PACING_FLAVOR) & M_PACING_FLAVOR) x 467 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_FLAVORS_VALID(x) ((x) << S_FLAVORS_VALID) x 471 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_FC_DISABLE(x) ((x) << S_RX_FC_DISABLE) x 475 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_FC_VALID(x) ((x) << S_RX_FC_VALID) x 517 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_PASS_OPEN_TID(x) ((x) << S_PASS_OPEN_TID) x 518 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_PASS_OPEN_TID(x) (((x) >> S_PASS_OPEN_TID) & M_PASS_OPEN_TID) x 522 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_PASS_OPEN_TOS(x) ((x) << S_PASS_OPEN_TOS) x 523 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_PASS_OPEN_TOS(x) (((x) >> S_PASS_OPEN_TOS) & M_PASS_OPEN_TOS) x 528 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_IDX16(x) ((x) << S_L2T_IDX16) x 529 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_IDX16(x) (((x) >> S_L2T_IDX16) & M_L2T_IDX16) x 532 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TCPOPT_WSCALE_OK(x) (((x) >> 5) & 1) x 533 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TCPOPT_SACK(x) (((x) >> 6) & 1) x 534 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TCPOPT_TSTAMP(x) (((x) >> 7) & 1) x 535 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf) x 536 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TCPOPT_MSS(x) (((x) >> 12) & 0xf) x 591 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_AOPEN_VLAN_PRI(x) ((x) << S_AOPEN_VLAN_PRI) x 592 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_AOPEN_VLAN_PRI(x) (((x) >> S_AOPEN_VLAN_PRI) & M_AOPEN_VLAN_PRI) x 595 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_AOPEN_VLAN_PRI_VALID(x) ((x) << S_AOPEN_VLAN_PRI_VALID) x 600 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_AOPEN_PKT_TYPE(x) ((x) << S_AOPEN_PKT_TYPE) x 601 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_AOPEN_PKT_TYPE(x) (((x) >> S_AOPEN_PKT_TYPE) & M_AOPEN_PKT_TYPE) x 605 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_AOPEN_MAC_MATCH(x) ((x) << S_AOPEN_MAC_MATCH) x 606 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_AOPEN_MAC_MATCH(x) (((x) >> S_AOPEN_MAC_MATCH) & M_AOPEN_MAC_MATCH) x 609 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_AOPEN_MAC_MATCH_VALID(x) ((x) << S_AOPEN_MAC_MATCH_VALID) x 614 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_AOPEN_IFF_VLAN(x) ((x) << S_AOPEN_IFF_VLAN) x 615 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_AOPEN_IFF_VLAN(x) (((x) >> S_AOPEN_IFF_VLAN) & M_AOPEN_IFF_VLAN) x 665 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_NO_REPLY(x) ((x) << S_NO_REPLY) x 788 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES) x 789 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES) x 794 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_PORT(x) ((x) << S_TX_PORT) x 795 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_PORT(x) (((x) >> S_TX_PORT) & M_TX_PORT) x 799 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_MSS(x) ((x) << S_TX_MSS) x 800 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_MSS(x) (((x) >> S_TX_MSS) & M_TX_MSS) x 804 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_QOS(x) ((x) << S_TX_QOS) x 805 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_QOS(x) (((x) >> S_TX_QOS) & M_TX_QOS) x 809 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_SNDBUF(x) ((x) << S_TX_SNDBUF) x 810 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_SNDBUF(x) (((x) >> S_TX_SNDBUF) & M_TX_SNDBUF) x 823 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_ULP_SUBMODE(x) ((x) << S_TX_ULP_SUBMODE) x 824 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_ULP_SUBMODE(x) (((x) >> S_TX_ULP_SUBMODE) & M_TX_ULP_SUBMODE) x 828 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_ULP_MODE(x) ((x) << S_TX_ULP_MODE) x 829 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_ULP_MODE(x) (((x) >> S_TX_ULP_MODE) & M_TX_ULP_MODE) x 832 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_SHOVE(x) ((x) << S_TX_SHOVE) x 836 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_MORE(x) ((x) << S_TX_MORE) x 842 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_CPU_IDX(x) ((x) << S_TX_CPU_IDX) x 843 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TX_CPU_IDX(x) (((x) >> S_TX_CPU_IDX) & M_TX_CPU_IDX) x 846 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_URG(x) ((x) << S_TX_URG) x 850 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_CLOSE(x) ((x) << S_TX_CLOSE) x 854 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_INIT(x) ((x) << S_TX_INIT) x 858 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_IMM_ACK(x) ((x) << S_TX_IMM_ACK) x 862 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TX_IMM_DMA(x) ((x) << S_TX_IMM_DMA) x 910 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ISCSI_PDU_LEN(x) ((x) << S_ISCSI_PDU_LEN) x 911 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_ISCSI_PDU_LEN(x) (((x) >> S_ISCSI_PDU_LEN) & M_ISCSI_PDU_LEN) x 914 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ISCSI_DDP(x) ((x) << S_ISCSI_DDP) x 946 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_CREDITS(x) ((x) << S_RX_CREDITS) x 947 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RX_CREDITS(x) (((x) >> S_RX_CREDITS) & M_RX_CREDITS) x 950 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_MODULATE(x) ((x) << S_RX_MODULATE) x 954 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_FORCE_ACK(x) ((x) << S_RX_FORCE_ACK) x 959 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_DACK_MODE(x) ((x) << S_RX_DACK_MODE) x 960 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RX_DACK_MODE(x) (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE) x 963 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE) x 992 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_STATUS(x) ((x) << S_DDP_STATUS) x 993 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_DDP_STATUS(x) (((x) >> S_DDP_STATUS) & M_DDP_STATUS) x 997 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_VALID(x) ((x) << S_DDP_VALID) x 998 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_DDP_VALID(x) (((x) >> S_DDP_VALID) & M_DDP_VALID) x 1001 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_PPOD_MISMATCH(x) ((x) << S_DDP_PPOD_MISMATCH) x 1005 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_PDU(x) ((x) << S_DDP_PDU) x 1009 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_LLIMIT_ERR(x) ((x) << S_DDP_LLIMIT_ERR) x 1013 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_PPOD_PARITY_ERR(x) ((x) << S_DDP_PPOD_PARITY_ERR) x 1017 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_PADDING_ERR(x) ((x) << S_DDP_PADDING_ERR) x 1021 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_HDRCRC_ERR(x) ((x) << S_DDP_HDRCRC_ERR) x 1025 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_DATACRC_ERR(x) ((x) << S_DDP_DATACRC_ERR) x 1029 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_INVALID_TAG(x) ((x) << S_DDP_INVALID_TAG) x 1033 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_ULIMIT_ERR(x) ((x) << S_DDP_ULIMIT_ERR) x 1037 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_OFFSET_ERR(x) ((x) << S_DDP_OFFSET_ERR) x 1041 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_COLOR_ERR(x) ((x) << S_DDP_COLOR_ERR) x 1045 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_TID_MISMATCH(x) ((x) << S_DDP_TID_MISMATCH) x 1049 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_INVALID_PPOD(x) ((x) << S_DDP_INVALID_PPOD) x 1054 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_ULP_MODE(x) ((x) << S_DDP_ULP_MODE) x 1055 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_DDP_ULP_MODE(x) (((x) >> S_DDP_ULP_MODE) & M_DDP_ULP_MODE) x 1060 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_OFFSET(x) ((x) << S_DDP_OFFSET) x 1061 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_DDP_OFFSET(x) (((x) >> S_DDP_OFFSET) & M_DDP_OFFSET) x 1064 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_URG(x) ((x) << S_DDP_URG) x 1068 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_PSH(x) ((x) << S_DDP_PSH) x 1072 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_BUF_COMPLETE(x) ((x) << S_DDP_BUF_COMPLETE) x 1076 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_BUF_TIMED_OUT(x) ((x) << S_DDP_BUF_TIMED_OUT) x 1080 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_DDP_BUF_IDX(x) ((x) << S_DDP_BUF_IDX) x 1101 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TXPKT_VLAN(x) ((x) << S_TXPKT_VLAN) x 1102 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TXPKT_VLAN(x) (((x) >> S_TXPKT_VLAN) & M_TXPKT_VLAN) x 1106 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TXPKT_INTF(x) ((x) << S_TXPKT_INTF) x 1107 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TXPKT_INTF(x) (((x) >> S_TXPKT_INTF) & M_TXPKT_INTF) x 1110 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TXPKT_IPCSUM_DIS(x) ((x) << S_TXPKT_IPCSUM_DIS) x 1114 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TXPKT_L4CSUM_DIS(x) ((x) << S_TXPKT_L4CSUM_DIS) x 1118 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TXPKT_VLAN_VLD(x) ((x) << S_TXPKT_VLAN_VLD) x 1122 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TXPKT_LOOPBACK(x) ((x) << S_TXPKT_LOOPBACK) x 1127 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TXPKT_OPCODE(x) ((x) << S_TXPKT_OPCODE) x 1128 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TXPKT_OPCODE(x) (((x) >> S_TXPKT_OPCODE) & M_TXPKT_OPCODE) x 1133 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_LSO_MSS(x) ((x) << S_LSO_MSS) x 1134 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_LSO_MSS(x) (((x) >> S_LSO_MSS) & M_LSO_MSS) x 1138 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_LSO_ETH_TYPE(x) ((x) << S_LSO_ETH_TYPE) x 1139 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_LSO_ETH_TYPE(x) (((x) >> S_LSO_ETH_TYPE) & M_LSO_ETH_TYPE) x 1143 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_LSO_TCPHDR_WORDS(x) ((x) << S_LSO_TCPHDR_WORDS) x 1144 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_LSO_TCPHDR_WORDS(x) (((x) >> S_LSO_TCPHDR_WORDS) & M_LSO_TCPHDR_WORDS) x 1148 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_LSO_IPHDR_WORDS(x) ((x) << S_LSO_IPHDR_WORDS) x 1149 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_LSO_IPHDR_WORDS(x) (((x) >> S_LSO_IPHDR_WORDS) & M_LSO_IPHDR_WORDS) x 1152 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_LSO_IPV6(x) ((x) << S_LSO_IPV6) x 1219 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_W_IDX(x) ((x) << S_L2T_W_IDX) x 1220 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_W_IDX(x) (((x) >> S_L2T_W_IDX) & M_L2T_W_IDX) x 1224 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_W_VLAN(x) ((x) << S_L2T_W_VLAN) x 1225 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_W_VLAN(x) (((x) >> S_L2T_W_VLAN) & M_L2T_W_VLAN) x 1229 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_W_IFF(x) ((x) << S_L2T_W_IFF) x 1230 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_W_IFF(x) (((x) >> S_L2T_W_IFF) & M_L2T_W_IFF) x 1234 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_W_PRIO(x) ((x) << S_L2T_W_PRIO) x 1235 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_W_PRIO(x) (((x) >> S_L2T_W_PRIO) & M_L2T_W_PRIO) x 1260 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_R_PRIO(x) ((x) << S_L2T_R_PRIO) x 1261 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_R_PRIO(x) (((x) >> S_L2T_R_PRIO) & M_L2T_R_PRIO) x 1265 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_R_VLAN(x) ((x) << S_L2T_R_VLAN) x 1266 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_R_VLAN(x) (((x) >> S_L2T_R_VLAN) & M_L2T_R_VLAN) x 1270 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_R_IFF(x) ((x) << S_L2T_R_IFF) x 1271 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_R_IFF(x) (((x) >> S_L2T_R_IFF) & M_L2T_R_IFF) x 1275 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_L2T_STATUS(x) ((x) << S_L2T_STATUS) x 1276 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_L2T_STATUS(x) (((x) >> S_L2T_STATUS) & M_L2T_STATUS) x 1342 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RTE_REQ_LUT_IX(x) ((x) << S_RTE_REQ_LUT_IX) x 1343 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RTE_REQ_LUT_IX(x) (((x) >> S_RTE_REQ_LUT_IX) & M_RTE_REQ_LUT_IX) x 1347 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RTE_REQ_LUT_BASE(x) ((x) << S_RTE_REQ_LUT_BASE) x 1348 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RTE_REQ_LUT_BASE(x) (((x) >> S_RTE_REQ_LUT_BASE) & M_RTE_REQ_LUT_BASE) x 1351 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RTE_READ_REQ_SELECT(x) ((x) << S_RTE_READ_REQ_SELECT) x 1383 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RTE_WRITE_REQ_LUT_IX(x) ((x) << S_RTE_WRITE_REQ_LUT_IX) x 1384 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RTE_WRITE_REQ_LUT_IX(x) (((x) >> S_RTE_WRITE_REQ_LUT_IX) & M_RTE_WRITE_REQ_LUT_IX) x 1388 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_RTE_WRITE_REQ_LUT_BASE(x) ((x) << S_RTE_WRITE_REQ_LUT_BASE) x 1389 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_RTE_WRITE_REQ_LUT_BASE(x) (((x) >> S_RTE_WRITE_REQ_LUT_BASE) & M_RTE_WRITE_REQ_LUT_BASE) x 1457 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_FLIT_CNT(x) ((x) << S_FLIT_CNT) x 1458 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_FLIT_CNT(x) (((x) >> S_FLIT_CNT) & M_FLIT_CNT) x 1462 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_TERM_TID(x) ((x) << S_TERM_TID) x 1463 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define G_TERM_TID(x) (((x) >> S_TERM_TID) & M_TERM_TID) x 1470 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD) x 1474 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ULPTX_NFLITS(x) ((x) << S_ULPTX_NFLITS) x 1485 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR) x 1487 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK) x 1493 drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h #define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN) x 77 drivers/net/ethernet/chelsio/cxgb3/vsc8211.c #define V_ACSR_ACTIPHY_TMR(x) ((x) << S_ACSR_ACTIPHY_TMR) x 81 drivers/net/ethernet/chelsio/cxgb3/vsc8211.c #define G_ACSR_SPEED(x) (((x) >> S_ACSR_SPEED) & M_ACSR_SPEED) x 2085 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c static inline void cudbg_tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask) x 2087 drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c *mask = x | y; x 1664 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask) x 1666 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c *mask = x | y; x 2028 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static const char *yesno(int x) x 2033 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c return x ? yes : no; x 53 drivers/net/ethernet/chelsio/cxgb4/l2t.c #define SYNC_WR_V(x) ((x) << SYNC_WR_S) x 4179 drivers/net/ethernet/chelsio/cxgb4/sge.c #define READ_FL_BUF(x) \ x 4180 drivers/net/ethernet/chelsio/cxgb4/sge.c t4_read_reg(adap, SGE_FL_BUFFER_SIZE0_A+(x)*sizeof(u32)) x 226 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c be32_to_cpu(asrt.u.assert.x), be32_to_cpu(asrt.u.assert.y)); x 3449 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c #define SAME_INTF(x) (hdr1->intfver_##x == hdr2->intfver_##x) x 5607 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c #define STAT_IDX(x) ((TP_MIB_TCP_##x##_A) - TP_MIB_TCP_OUT_RST_A) x 5608 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c #define STAT(x) val[STAT_IDX(x)] x 5609 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c #define STAT64(x) (((u64)STAT(x##_HI) << 32) | STAT(x##_LO)) x 168 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define RSPD_NEWBUF_V(x) ((x) << RSPD_NEWBUF_S) x 173 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define RSPD_LEN_G(x) (((x) >> RSPD_LEN_S) & RSPD_LEN_M) x 177 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define RSPD_QID_G(x) RSPD_LEN_G(x) x 183 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define RSPD_TYPE_G(x) (((x) >> RSPD_TYPE_S) & RSPD_TYPE_M) x 187 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define QINTR_CNT_EN_V(x) ((x) << QINTR_CNT_EN_S) x 192 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define QINTR_TIMER_IDX_V(x) ((x) << QINTR_TIMER_IDX_S) x 193 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define QINTR_TIMER_IDX_G(x) (((x) >> QINTR_TIMER_IDX_S) & QINTR_TIMER_IDX_M) x 288 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define SGE_TIMESTAMP_V(x) ((__u64)(x) << SGE_TIMESTAMP_S) x 289 drivers/net/ethernet/chelsio/cxgb4/t4_hw.h #define SGE_TIMESTAMP_G(x) (((__u64)(x) >> SGE_TIMESTAMP_S) & SGE_TIMESTAMP_M) x 195 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_OPCODE_V(x) ((x) << CPL_OPCODE_S) x 196 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_OPCODE_G(x) (((x) >> CPL_OPCODE_S) & 0xFF) x 197 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TID_G(x) ((x) & 0xFFFFFF) x 210 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TID_TID_V(x) ((x) << TID_TID_S) x 211 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TID_TID_G(x) (((x) >> TID_TID_S) & TID_TID_M) x 215 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TID_QID_V(x) ((x) << TID_QID_S) x 216 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TID_QID_G(x) (((x) >> TID_QID_S) & TID_QID_M) x 247 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define WR_OP_V(x) ((__u64)(x) << WR_OP_S) x 253 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_CHAN_V(x) ((x) << TX_CHAN_S) x 256 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_MODE_V(x) ((x) << ULP_MODE_S) x 260 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RCV_BUFSIZ_V(x) ((x) << RCV_BUFSIZ_S) x 263 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SMAC_SEL_V(x) ((__u64)(x) << SMAC_SEL_S) x 266 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define L2T_IDX_V(x) ((__u64)(x) << L2T_IDX_S) x 269 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define WND_SCALE_V(x) ((__u64)(x) << WND_SCALE_S) x 272 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define KEEP_ALIVE_V(x) ((__u64)(x) << KEEP_ALIVE_S) x 277 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define MSS_IDX_V(x) ((__u64)(x) << MSS_IDX_S) x 278 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define MSS_IDX_G(x) (((x) >> MSS_IDX_S) & MSS_IDX_M) x 283 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RSS_QUEUE_V(x) ((x) << RSS_QUEUE_S) x 284 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RSS_QUEUE_G(x) (((x) >> RSS_QUEUE_S) & RSS_QUEUE_M) x 287 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RSS_QUEUE_VALID_V(x) ((x) << RSS_QUEUE_VALID_S) x 291 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_FC_DISABLE_V(x) ((x) << RX_FC_DISABLE_S) x 295 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_FC_VALID_V(x) ((x) << RX_FC_VALID_S) x 299 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_CHANNEL_V(x) ((x) << RX_CHANNEL_S) x 303 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define WND_SCALE_EN_V(x) ((x) << WND_SCALE_EN_S) x 307 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T5_OPT_2_VALID_V(x) ((x) << T5_OPT_2_VALID_S) x 323 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define NO_CONG_V(x) ((x) << NO_CONG_S) x 327 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define DELACK_V(x) ((x) << DELACK_S) x 331 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define NON_OFFLOAD_V(x) ((x) << NON_OFFLOAD_S) x 336 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define DSCP_V(x) ((x) << DSCP_S) x 337 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define DSCP_G(x) (((x) >> DSCP_S) & DSCP_M) x 340 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCAM_BYPASS_V(x) ((__u64)(x) << TCAM_BYPASS_S) x 344 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define NAGLE_V(x) ((__u64)(x) << NAGLE_S) x 349 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_RSS_ENABLE_V(x) ((x) << SYN_RSS_ENABLE_S) x 353 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_RSS_QUEUE_V(x) ((x) << SYN_RSS_QUEUE_S) x 356 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CONN_POLICY_V(x) ((x) << CONN_POLICY_S) x 409 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_RX_CHAN_V(x) ((x) << SYN_RX_CHAN_S) x 410 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_RX_CHAN_G(x) (((x) >> SYN_RX_CHAN_S) & SYN_RX_CHAN_M) x 414 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCP_HDR_LEN_V(x) ((x) << TCP_HDR_LEN_S) x 415 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCP_HDR_LEN_G(x) (((x) >> TCP_HDR_LEN_S) & TCP_HDR_LEN_M) x 419 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define IP_HDR_LEN_V(x) ((x) << IP_HDR_LEN_S) x 420 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define IP_HDR_LEN_G(x) (((x) >> IP_HDR_LEN_S) & IP_HDR_LEN_M) x 424 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ETH_HDR_LEN_V(x) ((x) << ETH_HDR_LEN_S) x 425 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ETH_HDR_LEN_G(x) (((x) >> ETH_HDR_LEN_S) & ETH_HDR_LEN_M) x 430 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_MAC_IDX_V(x) ((x) << SYN_MAC_IDX_S) x 431 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_MAC_IDX_G(x) (((x) >> SYN_MAC_IDX_S) & SYN_MAC_IDX_M) x 434 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_XACT_MATCH_V(x) ((x) << SYN_XACT_MATCH_S) x 439 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_INTF_V(x) ((x) << SYN_INTF_S) x 440 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SYN_INTF_G(x) (((x) >> SYN_INTF_S) & SYN_INTF_M) x 451 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CONG_CNTRL_V(x) ((x) << CONG_CNTRL_S) x 452 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CONG_CNTRL_G(x) (((x) >> CONG_CNTRL_S) & CONG_CNTRL_M) x 455 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T5_ISS_V(x) ((x) << T5_ISS_S) x 467 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_COALESCE_VALID_V(x) ((x) << RX_COALESCE_VALID_S) x 471 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_COALESCE_V(x) ((x) << RX_COALESCE_S) x 474 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define PACE_V(x) ((x) << PACE_S) x 478 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_QUEUE_V(x) ((x) << TX_QUEUE_S) x 479 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_QUEUE_G(x) (((x) >> TX_QUEUE_S) & TX_QUEUE_M) x 482 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CCTRL_ECN_V(x) ((x) << CCTRL_ECN_S) x 486 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TSTAMPS_EN_V(x) ((x) << TSTAMPS_EN_S) x 490 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SACK_EN_V(x) ((x) << SACK_EN_S) x 516 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define FILTER_TUPLE_V(x) ((x) << FILTER_TUPLE_S) x 517 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define FILTER_TUPLE_G(x) (((x) >> FILTER_TUPLE_S) & FILTER_TUPLE_M) x 600 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define AOPEN_STATUS_G(x) (((x) >> AOPEN_STATUS_S) & AOPEN_STATUS_M) x 604 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define AOPEN_ATID_G(x) (((x) >> AOPEN_ATID_S) & AOPEN_ATID_M) x 619 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define PASS_OPEN_TID_V(x) ((x) << PASS_OPEN_TID_S) x 620 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define PASS_OPEN_TID_G(x) (((x) >> PASS_OPEN_TID_S) & PASS_OPEN_TID_M) x 624 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define PASS_OPEN_TOS_V(x) ((x) << PASS_OPEN_TOS_S) x 625 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define PASS_OPEN_TOS_G(x) (((x) >> PASS_OPEN_TOS_S) & PASS_OPEN_TOS_M) x 630 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCPOPT_WSCALE_OK_G(x) \ x 631 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> TCPOPT_WSCALE_OK_S) & TCPOPT_WSCALE_OK_M) x 635 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCPOPT_SACK_G(x) (((x) >> TCPOPT_SACK_S) & TCPOPT_SACK_M) x 639 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCPOPT_TSTAMP_G(x) (((x) >> TCPOPT_TSTAMP_S) & TCPOPT_TSTAMP_M) x 643 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCPOPT_SND_WSCALE_G(x) \ x 644 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> TCPOPT_SND_WSCALE_S) & TCPOPT_SND_WSCALE_M) x 648 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCPOPT_MSS_G(x) (((x) >> TCPOPT_MSS_S) & TCPOPT_MSS_M) x 651 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_TCP_HDR_LEN_V(x) ((x) << T6_TCP_HDR_LEN_S) x 652 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_TCP_HDR_LEN_G(x) (((x) >> T6_TCP_HDR_LEN_S) & TCP_HDR_LEN_M) x 655 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_IP_HDR_LEN_V(x) ((x) << T6_IP_HDR_LEN_S) x 656 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_IP_HDR_LEN_G(x) (((x) >> T6_IP_HDR_LEN_S) & IP_HDR_LEN_M) x 660 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_ETH_HDR_LEN_V(x) ((x) << T6_ETH_HDR_LEN_S) x 661 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_ETH_HDR_LEN_G(x) (((x) >> T6_ETH_HDR_LEN_S) & T6_ETH_HDR_LEN_M) x 682 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define QUEUENO_V(x) ((x) << QUEUENO_S) x 685 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define REPLY_CHAN_V(x) ((x) << REPLY_CHAN_S) x 689 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define NO_REPLY_V(x) ((x) << NO_REPLY_S) x 710 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCB_WORD_V(x) ((x) << TCB_WORD_S) x 714 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCB_COOKIE_V(x) ((x) << TCB_COOKIE_S) x 715 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TCB_COOKIE_G(x) (((x) >> TCB_COOKIE_S) & TCB_COOKIE_M) x 748 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LISTSVR_IPV6_V(x) ((x) << LISTSVR_IPV6_S) x 770 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ABORT_RSS_STATUS_V(x) ((x) << ABORT_RSS_STATUS_S) x 771 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ABORT_RSS_STATUS_G(x) (((x) >> ABORT_RSS_STATUS_S) & ABORT_RSS_STATUS_M) x 775 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ABORT_RSS_SRQIDX_V(x) ((x) << ABORT_RSS_SRQIDX_S) x 776 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ABORT_RSS_SRQIDX_G(x) (((x) >> ABORT_RSS_SRQIDX_S) & ABORT_RSS_SRQIDX_M) x 834 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_VF_V(x) ((x) << TXPKT_VF_S) x 837 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_PF_V(x) ((x) << TXPKT_PF_S) x 840 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_VF_VLD_V(x) ((x) << TXPKT_VF_VLD_S) x 844 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_OVLAN_IDX_V(x) ((x) << TXPKT_OVLAN_IDX_S) x 847 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_T5_OVLAN_IDX_V(x) ((x) << TXPKT_T5_OVLAN_IDX_S) x 850 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_INTF_V(x) ((x) << TXPKT_INTF_S) x 853 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_INS_OVLAN_V(x) ((x) << TXPKT_INS_OVLAN_S) x 857 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_TSTAMP_V(x) ((x) << TXPKT_TSTAMP_S) x 861 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_OPCODE_V(x) ((x) << TXPKT_OPCODE_S) x 865 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_CSUM_END_V(x) ((x) << TXPKT_CSUM_END_S) x 868 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_CSUM_START_V(x) ((x) << TXPKT_CSUM_START_S) x 871 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_IPHDR_LEN_V(x) ((__u64)(x) << TXPKT_IPHDR_LEN_S) x 874 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_CSUM_LOC_V(x) ((__u64)(x) << TXPKT_CSUM_LOC_S) x 877 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_ETHHDR_LEN_V(x) ((__u64)(x) << TXPKT_ETHHDR_LEN_S) x 880 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_TXPKT_ETHHDR_LEN_V(x) ((__u64)(x) << T6_TXPKT_ETHHDR_LEN_S) x 883 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_CSUM_TYPE_V(x) ((__u64)(x) << TXPKT_CSUM_TYPE_S) x 886 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_VLAN_V(x) ((__u64)(x) << TXPKT_VLAN_S) x 889 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_VLAN_VLD_V(x) ((__u64)(x) << TXPKT_VLAN_VLD_S) x 893 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_IPCSUM_DIS_V(x) ((__u64)(x) << TXPKT_IPCSUM_DIS_S) x 897 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TXPKT_L4CSUM_DIS_V(x) ((__u64)(x) << TXPKT_L4CSUM_DIS_S) x 911 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_TCPHDR_LEN_V(x) ((x) << LSO_TCPHDR_LEN_S) x 914 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_IPHDR_LEN_V(x) ((x) << LSO_IPHDR_LEN_S) x 917 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_ETHHDR_LEN_V(x) ((x) << LSO_ETHHDR_LEN_S) x 920 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_IPV6_V(x) ((x) << LSO_IPV6_S) x 924 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_LAST_SLICE_V(x) ((x) << LSO_LAST_SLICE_S) x 928 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_FIRST_SLICE_V(x) ((x) << LSO_FIRST_SLICE_S) x 932 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_OPCODE_V(x) ((x) << LSO_OPCODE_S) x 935 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define LSO_T5_XFER_SIZE_V(x) ((x) << LSO_T5_XFER_SIZE_S) x 956 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ISCSI_PDU_LEN_V(x) ((x) << ISCSI_PDU_LEN_S) x 957 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ISCSI_PDU_LEN_G(x) (((x) >> ISCSI_PDU_LEN_S) & ISCSI_PDU_LEN_M) x 960 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ISCSI_DDP_V(x) ((x) << ISCSI_DDP_S) x 1018 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_OP_V(x) ((x) << CPL_TX_DATA_ISO_OP_S) x 1019 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_OP_G(x) \ x 1020 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_OP_S) & CPL_TX_DATA_ISO_OP_M) x 1024 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_FIRST_V(x) ((x) << CPL_TX_DATA_ISO_FIRST_S) x 1025 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_FIRST_G(x) \ x 1026 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_FIRST_S) & CPL_TX_DATA_ISO_FIRST_M) x 1031 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_LAST_V(x) ((x) << CPL_TX_DATA_ISO_LAST_S) x 1032 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_LAST_G(x) \ x 1033 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_LAST_S) & CPL_TX_DATA_ISO_LAST_M) x 1038 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_CPLHDRLEN_V(x) ((x) << CPL_TX_DATA_ISO_CPLHDRLEN_S) x 1039 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_CPLHDRLEN_G(x) \ x 1040 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_CPLHDRLEN_S) & CPL_TX_DATA_ISO_CPLHDRLEN_M) x 1045 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_HDRCRC_V(x) ((x) << CPL_TX_DATA_ISO_HDRCRC_S) x 1046 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_HDRCRC_G(x) \ x 1047 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_HDRCRC_S) & CPL_TX_DATA_ISO_HDRCRC_M) x 1052 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_PLDCRC_V(x) ((x) << CPL_TX_DATA_ISO_PLDCRC_S) x 1053 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_PLDCRC_G(x) \ x 1054 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_PLDCRC_S) & CPL_TX_DATA_ISO_PLDCRC_M) x 1059 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_IMMEDIATE_V(x) ((x) << CPL_TX_DATA_ISO_IMMEDIATE_S) x 1060 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_IMMEDIATE_G(x) \ x 1061 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_IMMEDIATE_S) & CPL_TX_DATA_ISO_IMMEDIATE_M) x 1066 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_SCSI_V(x) ((x) << CPL_TX_DATA_ISO_SCSI_S) x 1067 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_SCSI_G(x) \ x 1068 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_SCSI_S) & CPL_TX_DATA_ISO_SCSI_M) x 1073 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_V(x) \ x 1074 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_TX_DATA_ISO_SEGLEN_OFFSET_S) x 1075 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_G(x) \ x 1076 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_DATA_ISO_SEGLEN_OFFSET_S) & \ x 1109 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_CREDITS_V(x) ((x) << RX_CREDITS_S) x 1112 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_FORCE_ACK_V(x) ((x) << RX_FORCE_ACK_S) x 1117 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_DACK_MODE_V(x) ((x) << RX_DACK_MODE_S) x 1118 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_DACK_MODE_G(x) (((x) >> RX_DACK_MODE_S) & RX_DACK_MODE_M) x 1121 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_DACK_CHANGE_V(x) ((x) << RX_DACK_CHANGE_S) x 1149 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_T6_ETHHDR_LEN_G(x) (((x) >> RX_ETHHDR_LEN_S) & RX_T6_ETHHDR_LEN_M) x 1152 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_PSH_V(x) ((x) << RXF_PSH_S) x 1156 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_SYN_V(x) ((x) << RXF_SYN_S) x 1160 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_UDP_V(x) ((x) << RXF_UDP_S) x 1164 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_TCP_V(x) ((x) << RXF_TCP_S) x 1168 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_IP_V(x) ((x) << RXF_IP_S) x 1172 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_IP6_V(x) ((x) << RXF_IP6_S) x 1176 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_SYN_COOKIE_V(x) ((x) << RXF_SYN_COOKIE_S) x 1180 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_FCOE_V(x) ((x) << RXF_FCOE_S) x 1184 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_LRO_V(x) ((x) << RXF_LRO_S) x 1190 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_ETHHDR_LEN_V(x) ((x) << RX_ETHHDR_LEN_S) x 1191 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_ETHHDR_LEN_G(x) (((x) >> RX_ETHHDR_LEN_S) & RX_ETHHDR_LEN_M) x 1195 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_T5_ETHHDR_LEN_V(x) ((x) << RX_T5_ETHHDR_LEN_S) x 1196 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_T5_ETHHDR_LEN_G(x) (((x) >> RX_T5_ETHHDR_LEN_S) & RX_T5_ETHHDR_LEN_M) x 1200 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_MACIDX_V(x) ((x) << RX_MACIDX_S) x 1201 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_MACIDX_G(x) (((x) >> RX_MACIDX_S) & RX_MACIDX_M) x 1204 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXF_SYN_V(x) ((x) << RXF_SYN_S) x 1209 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_CHAN_V(x) ((x) << RX_CHAN_S) x 1210 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_CHAN_G(x) (((x) >> RX_CHAN_S) & RX_CHAN_M) x 1215 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_TCPHDR_LEN_V(x) ((x) << RX_TCPHDR_LEN_S) x 1216 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_TCPHDR_LEN_G(x) (((x) >> RX_TCPHDR_LEN_S) & RX_TCPHDR_LEN_M) x 1220 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_IPHDR_LEN_V(x) ((x) << RX_IPHDR_LEN_S) x 1221 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RX_IPHDR_LEN_G(x) (((x) >> RX_IPHDR_LEN_S) & RX_IPHDR_LEN_M) x 1225 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define RXERR_CSUM_V(x) ((x) << RXERR_CSUM_S) x 1229 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_COMPR_RXERR_LEN_V(x) ((x) << T6_COMPR_RXERR_LEN_S) x 1234 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_COMPR_RXERR_VEC_V(x) ((x) << T6_COMPR_RXERR_LEN_S) x 1235 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_COMPR_RXERR_VEC_G(x) \ x 1236 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> T6_COMPR_RXERR_VEC_S) & T6_COMPR_RXERR_VEC_M) x 1240 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_COMPR_RXERR_SUM_V(x) ((x) << T6_COMPR_RXERR_SUM_S) x 1245 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_RX_TNLHDR_LEN_V(x) ((x) << T6_RX_TNLHDR_LEN_S) x 1246 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_RX_TNLHDR_LEN_G(x) (((x) >> T6_RX_TNLHDR_LEN_S) & T6_RX_TNLHDR_LEN_M) x 1302 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define L2T_W_INFO_V(x) ((x) << L2T_W_INFO_S) x 1305 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define L2T_W_PORT_V(x) ((x) << L2T_W_PORT_S) x 1308 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define L2T_W_NOREPLY_V(x) ((x) << L2T_W_NOREPLY_S) x 1348 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SMTW_OVLAN_IDX_V(x) ((x) << SMTW_OVLAN_IDX_S) x 1351 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SMTW_IDX_V(x) ((x) << SMTW_IDX_S) x 1354 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SMTW_NORPL_V(x) ((x) << SMTW_NORPL_S) x 1372 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define EGR_QID_G(x) (((x) >> EGR_QID_S) & EGR_QID_M) x 1458 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_FORCE_V(x) ((x) << TX_FORCE_S) x 1461 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T6_TX_FORCE_V(x) ((x) << T6_TX_FORCE_S) x 1465 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_URG_V(x) ((x) << TX_URG_S) x 1468 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_SHOVE_V(x) ((x) << TX_SHOVE_S) x 1472 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_ULP_MODE_V(x) ((x) << TX_ULP_MODE_S) x 1473 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define TX_ULP_MODE_G(x) (((x) >> TX_ULP_MODE_S) & TX_ULP_MODE_M) x 1490 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULPTX_CMD_V(x) ((x) << ULPTX_CMD_S) x 1494 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULPTX_LEN16_V(x) ((x) << ULPTX_LEN16_S) x 1497 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TX_SC_MORE_V(x) ((x) << ULP_TX_SC_MORE_S) x 1524 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULPTX_CMD_V(x) ((x) << ULPTX_CMD_S) x 1527 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S) x 1530 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULPTX_MORE_V(x) ((x) << ULPTX_MORE_S) x 1535 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TXPKT_DEST_V(x) ((x) << ULP_TXPKT_DEST_S) x 1539 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TXPKT_FID_V(x) ((x) << ULP_TXPKT_FID_S) x 1542 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TXPKT_RO_V(x) ((x) << ULP_TXPKT_RO_S) x 1567 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_OPCODE_V(x) ((x) << CPL_TX_TNL_LSO_OPCODE_S) x 1568 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_OPCODE_G(x) \ x 1569 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_OPCODE_S) & CPL_TX_TNL_LSO_OPCODE_M) x 1573 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_FIRST_V(x) ((x) << CPL_TX_TNL_LSO_FIRST_S) x 1574 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_FIRST_G(x) \ x 1575 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_FIRST_S) & CPL_TX_TNL_LSO_FIRST_M) x 1580 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_LAST_V(x) ((x) << CPL_TX_TNL_LSO_LAST_S) x 1581 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_LAST_G(x) \ x 1582 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_LAST_S) & CPL_TX_TNL_LSO_LAST_M) x 1587 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_ETHHDRLENXOUT_V(x) \ x 1588 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_TX_TNL_LSO_ETHHDRLENXOUT_S) x 1589 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_ETHHDRLENXOUT_G(x) \ x 1590 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_ETHHDRLENXOUT_S) & \ x 1596 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPV6OUT_V(x) ((x) << CPL_TX_TNL_LSO_IPV6OUT_S) x 1597 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPV6OUT_G(x) \ x 1598 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_IPV6OUT_S) & CPL_TX_TNL_LSO_IPV6OUT_M) x 1603 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_ETHHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_ETHHDRLEN_S) x 1604 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_ETHHDRLEN_G(x) \ x 1605 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_ETHHDRLEN_S) & CPL_TX_TNL_LSO_ETHHDRLEN_M) x 1609 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRLEN_S) x 1610 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPHDRLEN_G(x) \ x 1611 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_IPHDRLEN_S) & CPL_TX_TNL_LSO_IPHDRLEN_M) x 1615 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_TCPHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_TCPHDRLEN_S) x 1616 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_TCPHDRLEN_G(x) \ x 1617 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_TCPHDRLEN_S) & CPL_TX_TNL_LSO_TCPHDRLEN_M) x 1621 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_MSS_V(x) ((x) << CPL_TX_TNL_LSO_MSS_S) x 1622 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_MSS_G(x) \ x 1623 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_MSS_S) & CPL_TX_TNL_LSO_MSS_M) x 1627 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_SIZE_V(x) ((x) << CPL_TX_TNL_LSO_SIZE_S) x 1628 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_SIZE_G(x) \ x 1629 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_SIZE_S) & CPL_TX_TNL_LSO_SIZE_M) x 1633 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_ETHHDRLENOUT_V(x) \ x 1634 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_TX_TNL_LSO_ETHHDRLENOUT_S) x 1635 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_ETHHDRLENOUT_G(x) \ x 1636 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_ETHHDRLENOUT_S) & CPL_TX_TNL_LSO_ETHHDRLENOUT_M) x 1640 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPHDRLENOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRLENOUT_S) x 1641 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPHDRLENOUT_G(x) \ x 1642 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_IPHDRLENOUT_S) & CPL_TX_TNL_LSO_IPHDRLENOUT_M) x 1646 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPHDRCHKOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRCHKOUT_S) x 1647 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPHDRCHKOUT_G(x) \ x 1648 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_IPHDRCHKOUT_S) & CPL_TX_TNL_LSO_IPHDRCHKOUT_M) x 1653 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPLENSETOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPLENSETOUT_S) x 1654 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPLENSETOUT_G(x) \ x 1655 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_IPLENSETOUT_S) & CPL_TX_TNL_LSO_IPLENSETOUT_M) x 1660 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPIDINCOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPIDINCOUT_S) x 1661 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPIDINCOUT_G(x) \ x 1662 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_IPIDINCOUT_S) & CPL_TX_TNL_LSO_IPIDINCOUT_M) x 1667 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_UDPCHKCLROUT_V(x) \ x 1668 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_TX_TNL_LSO_UDPCHKCLROUT_S) x 1669 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_UDPCHKCLROUT_G(x) \ x 1670 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_UDPCHKCLROUT_S) & \ x 1676 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_UDPLENSETOUT_V(x) \ x 1677 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_TX_TNL_LSO_UDPLENSETOUT_S) x 1678 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_UDPLENSETOUT_G(x) \ x 1679 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_UDPLENSETOUT_S) & \ x 1685 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_TNLTYPE_V(x) ((x) << CPL_TX_TNL_LSO_TNLTYPE_S) x 1686 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_TNLTYPE_G(x) \ x 1687 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_TNLTYPE_S) & CPL_TX_TNL_LSO_TNLTYPE_M) x 1691 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define V_CPL_TX_TNL_LSO_ETHHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLEN) x 1692 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define G_CPL_TX_TNL_LSO_ETHHDRLEN(x) \ x 1693 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLEN) & M_CPL_TX_TNL_LSO_ETHHDRLEN) x 1697 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_TNLHDRLEN_V(x) ((x) << CPL_TX_TNL_LSO_TNLHDRLEN_S) x 1698 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_TNLHDRLEN_G(x) \ x 1699 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_TNLHDRLEN_S) & CPL_TX_TNL_LSO_TNLHDRLEN_M) x 1703 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPV6_V(x) ((x) << CPL_TX_TNL_LSO_IPV6_S) x 1704 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TNL_LSO_IPV6_G(x) \ x 1705 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TNL_LSO_IPV6_S) & CPL_TX_TNL_LSO_IPV6_M) x 1709 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TX_SC_MORE_V(x) ((x) << ULP_TX_SC_MORE_S) x 1721 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_MEMIO_LOCK_V(x) ((x) << ULP_MEMIO_LOCK_S) x 1726 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_MEMIO_ORDER_V(x) ((x) << ULP_MEMIO_ORDER_S) x 1730 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T5_ULP_MEMIO_IMM_V(x) ((x) << T5_ULP_MEMIO_IMM_S) x 1734 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T5_ULP_MEMIO_ORDER_V(x) ((x) << T5_ULP_MEMIO_ORDER_S) x 1739 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define T5_ULP_MEMIO_FID_V(x) ((x) << T5_ULP_MEMIO_FID_S) x 1743 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_MEMIO_ADDR_V(x) ((x) << ULP_MEMIO_ADDR_S) x 1747 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_MEMIO_DATA_LEN_V(x) ((x) << ULP_MEMIO_DATA_LEN_S) x 1751 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S) x 1752 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULPTX_NSGE_G(x) (((x) >> ULPTX_NSGE_S) & ULPTX_NSGE_M) x 1761 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TXPKT_DATAMODIFY_V(x) ((x) << ULP_TXPKT_DATAMODIFY_S) x 1762 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TXPKT_DATAMODIFY_G(x) \ x 1763 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> ULP_TXPKT_DATAMODIFY_S) & ULP_TXPKT_DATAMODIFY__M) x 1768 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TXPKT_CHANNELID_V(x) ((x) << ULP_TXPKT_CHANNELID_S) x 1769 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define ULP_TXPKT_CHANNELID_G(x) \ x 1770 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> ULP_TXPKT_CHANNELID_S) & ULP_TXPKT_CHANNELID_M) x 1775 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_SEQ_NO_CTRL_V(x) ((x) << SCMD_SEQ_NO_CTRL_S) x 1776 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_SEQ_NO_CTRL_G(x) \ x 1777 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_SEQ_NO_CTRL_S) & SCMD_SEQ_NO_CTRL_M) x 1782 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_STATUS_PRESENT_V(x) ((x) << SCMD_STATUS_PRESENT_S) x 1783 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_STATUS_PRESENT_G(x) \ x 1784 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_STATUS_PRESENT_S) & SCMD_STATUS_PRESENT_M) x 1792 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_PROTO_VERSION_V(x) ((x) << SCMD_PROTO_VERSION_S) x 1793 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_PROTO_VERSION_G(x) \ x 1794 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_PROTO_VERSION_S) & SCMD_PROTO_VERSION_M) x 1799 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_ENC_DEC_CTRL_V(x) ((x) << SCMD_ENC_DEC_CTRL_S) x 1800 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_ENC_DEC_CTRL_G(x) \ x 1801 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_ENC_DEC_CTRL_S) & SCMD_ENC_DEC_CTRL_M) x 1807 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_CIPH_AUTH_SEQ_CTRL_V(x) \ x 1808 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << SCMD_CIPH_AUTH_SEQ_CTRL_S) x 1809 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_CIPH_AUTH_SEQ_CTRL_G(x) \ x 1810 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_CIPH_AUTH_SEQ_CTRL_S) & SCMD_CIPH_AUTH_SEQ_CTRL_M) x 1818 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_CIPH_MODE_V(x) ((x) << SCMD_CIPH_MODE_S) x 1819 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_CIPH_MODE_G(x) \ x 1820 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_CIPH_MODE_S) & SCMD_CIPH_MODE_M) x 1827 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_AUTH_MODE_V(x) ((x) << SCMD_AUTH_MODE_S) x 1828 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_AUTH_MODE_G(x) \ x 1829 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_AUTH_MODE_S) & SCMD_AUTH_MODE_M) x 1836 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_HMAC_CTRL_V(x) ((x) << SCMD_HMAC_CTRL_S) x 1837 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_HMAC_CTRL_G(x) \ x 1838 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_HMAC_CTRL_S) & SCMD_HMAC_CTRL_M) x 1843 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_IV_SIZE_V(x) ((x) << SCMD_IV_SIZE_S) x 1844 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_IV_SIZE_G(x) \ x 1845 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_IV_SIZE_S) & SCMD_IV_SIZE_M) x 1850 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_NUM_IVS_V(x) ((x) << SCMD_NUM_IVS_S) x 1851 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_NUM_IVS_G(x) \ x 1852 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_NUM_IVS_S) & SCMD_NUM_IVS_M) x 1861 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_ENB_DBGID_V(x) ((x) << SCMD_ENB_DBGID_S) x 1862 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_ENB_DBGID_G(x) \ x 1863 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_ENB_DBGID_S) & SCMD_ENB_DBGID_M) x 1868 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_IV_GEN_CTRL_V(x) ((x) << SCMD_IV_GEN_CTRL_S) x 1869 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_IV_GEN_CTRL_G(x) \ x 1870 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_IV_GEN_CTRL_S) & SCMD_IV_GEN_CTRL_M) x 1876 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_MORE_FRAGS_V(x) ((x) << SCMD_MORE_FRAGS_S) x 1877 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_MORE_FRAGS_G(x) (((x) >> SCMD_MORE_FRAGS_S) & SCMD_MORE_FRAGS_M) x 1882 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_LAST_FRAG_V(x) ((x) << SCMD_LAST_FRAG_S) x 1883 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_LAST_FRAG_G(x) (((x) >> SCMD_LAST_FRAG_S) & SCMD_LAST_FRAG_M) x 1888 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_TLS_COMPPDU_V(x) ((x) << SCMD_TLS_COMPPDU_S) x 1889 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_TLS_COMPPDU_G(x) (((x) >> SCMD_TLS_COMPPDU_S) & SCMD_TLS_COMPPDU_M) x 1894 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_KEY_CTX_INLINE_V(x) ((x) << SCMD_KEY_CTX_INLINE_S) x 1895 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_KEY_CTX_INLINE_G(x) \ x 1896 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_KEY_CTX_INLINE_S) & SCMD_KEY_CTX_INLINE_M) x 1902 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_TLS_FRAG_ENABLE_V(x) ((x) << SCMD_TLS_FRAG_ENABLE_S) x 1903 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_TLS_FRAG_ENABLE_G(x) \ x 1904 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_TLS_FRAG_ENABLE_S) & SCMD_TLS_FRAG_ENABLE_M) x 1913 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_MAC_ONLY_V(x) ((x) << SCMD_MAC_ONLY_S) x 1914 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_MAC_ONLY_G(x) \ x 1915 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_MAC_ONLY_S) & SCMD_MAC_ONLY_M) x 1923 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_AADIVDROP_V(x) ((x) << SCMD_AADIVDROP_S) x 1924 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_AADIVDROP_G(x) \ x 1925 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_AADIVDROP_S) & SCMD_AADIVDROP_M) x 1933 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_HDR_LEN_V(x) ((x) << SCMD_HDR_LEN_S) x 1934 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SCMD_HDR_LEN_G(x) \ x 1935 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> SCMD_HDR_LEN_S) & SCMD_HDR_LEN_M) x 1949 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_OPCODE_V(x) ((x) << CPL_TX_SEC_PDU_OPCODE_S) x 1950 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_OPCODE_G(x) \ x 1951 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_OPCODE_S) & CPL_TX_SEC_PDU_OPCODE_M) x 1956 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_RXCHID_V(x) ((x) << CPL_TX_SEC_PDU_RXCHID_S) x 1957 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_RXCHID_G(x) \ x 1958 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_RXCHID_S) & CPL_TX_SEC_PDU_RXCHID_M) x 1964 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_ACKFOLLOWS_V(x) ((x) << CPL_TX_SEC_PDU_ACKFOLLOWS_S) x 1965 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_ACKFOLLOWS_G(x) \ x 1966 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_ACKFOLLOWS_S) & CPL_TX_SEC_PDU_ACKFOLLOWS_M) x 1972 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_ULPTXLPBK_V(x) ((x) << CPL_TX_SEC_PDU_ULPTXLPBK_S) x 1973 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_ULPTXLPBK_G(x) \ x 1974 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_ULPTXLPBK_S) & CPL_TX_SEC_PDU_ULPTXLPBK_M) x 1980 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CPLLEN_V(x) ((x) << CPL_TX_SEC_PDU_CPLLEN_S) x 1981 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CPLLEN_G(x) \ x 1982 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_CPLLEN_S) & CPL_TX_SEC_PDU_CPLLEN_M) x 1987 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_PLACEHOLDER_V(x) ((x) << CPL_TX_SEC_PDU_PLACEHOLDER_S) x 1988 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_PLACEHOLDER_G(x) \ x 1989 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_PLACEHOLDER_S) & \ x 1995 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_IVINSRTOFST_V(x) ((x) << CPL_TX_SEC_PDU_IVINSRTOFST_S) x 1996 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_IVINSRTOFST_G(x) \ x 1997 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_IVINSRTOFST_S) & \ x 2005 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AADSTART_V(x) ((x) << CPL_TX_SEC_PDU_AADSTART_S) x 2006 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AADSTART_G(x) \ x 2007 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_AADSTART_S) & \ x 2015 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AADSTOP_V(x) ((x) << CPL_TX_SEC_PDU_AADSTOP_S) x 2016 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AADSTOP_G(x) \ x 2017 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_AADSTOP_S) & CPL_TX_SEC_PDU_AADSTOP_M) x 2024 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CIPHERSTART_V(x) ((x) << CPL_TX_SEC_PDU_CIPHERSTART_S) x 2025 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CIPHERSTART_G(x) \ x 2026 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_CIPHERSTART_S) & \ x 2034 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_V(x) \ x 2035 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_TX_SEC_PDU_CIPHERSTOP_HI_S) x 2036 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_G(x) \ x 2037 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_CIPHERSTOP_HI_S) & \ x 2042 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_V(x) \ x 2043 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_TX_SEC_PDU_CIPHERSTOP_LO_S) x 2044 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_G(x) \ x 2045 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_CIPHERSTOP_LO_S) & \ x 2053 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AUTHSTART_V(x) ((x) << CPL_TX_SEC_PDU_AUTHSTART_S) x 2054 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AUTHSTART_G(x) \ x 2055 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_AUTHSTART_S) & \ x 2063 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AUTHSTOP_V(x) ((x) << CPL_TX_SEC_PDU_AUTHSTOP_S) x 2064 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AUTHSTOP_G(x) \ x 2065 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_AUTHSTOP_S) & \ x 2073 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AUTHINSERT_V(x) ((x) << CPL_TX_SEC_PDU_AUTHINSERT_S) x 2074 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_SEC_PDU_AUTHINSERT_G(x) \ x 2075 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_SEC_PDU_AUTHINSERT_S) & \ x 2086 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_OPCODE_V(x) ((x) << CPL_RX_PHYS_DSGL_OPCODE_S) x 2087 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_OPCODE_G(x) \ x 2088 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_OPCODE_S) & CPL_RX_PHYS_DSGL_OPCODE_M) x 2092 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_ISRDMA_V(x) ((x) << CPL_RX_PHYS_DSGL_ISRDMA_S) x 2093 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_ISRDMA_G(x) \ x 2094 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_ISRDMA_S) & CPL_RX_PHYS_DSGL_ISRDMA_M) x 2099 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_RSVD1_V(x) ((x) << CPL_RX_PHYS_DSGL_RSVD1_S) x 2100 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_RSVD1_G(x) \ x 2101 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_RSVD1_S) & \ x 2106 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCIRLXORDER_V(x) \ x 2107 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_RX_PHYS_DSGL_PCIRLXORDER_S) x 2108 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCIRLXORDER_G(x) \ x 2109 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_PCIRLXORDER_S) & \ x 2115 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCINOSNOOP_V(x) \ x 2116 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_RX_PHYS_DSGL_PCINOSNOOP_S) x 2117 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCINOSNOOP_G(x) \ x 2118 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_PCINOSNOOP_S) & \ x 2125 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCITPHNTENB_V(x) \ x 2126 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_RX_PHYS_DSGL_PCITPHNTENB_S) x 2127 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCITPHNTENB_G(x) \ x 2128 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_PCITPHNTENB_S) & \ x 2134 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCITPHNT_V(x) ((x) << CPL_RX_PHYS_DSGL_PCITPHNT_S) x 2135 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_PCITPHNT_G(x) \ x 2136 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_PCITPHNT_S) & \ x 2141 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_DCAID_V(x) ((x) << CPL_RX_PHYS_DSGL_DCAID_S) x 2142 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_DCAID_G(x) \ x 2143 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_DCAID_S) & \ x 2148 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_NOOFSGENTR_V(x) \ x 2149 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h ((x) << CPL_RX_PHYS_DSGL_NOOFSGENTR_S) x 2150 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_PHYS_DSGL_NOOFSGENTR_G(x) \ x 2151 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_PHYS_DSGL_NOOFSGENTR_S) & \ x 2161 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_MPS_PKT_OP_V(x) ((x) << CPL_RX_MPS_PKT_OP_S) x 2162 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_MPS_PKT_OP_G(x) \ x 2163 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_MPS_PKT_OP_S) & CPL_RX_MPS_PKT_OP_M) x 2167 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_MPS_PKT_TYPE_V(x) ((x) << CPL_RX_MPS_PKT_TYPE_S) x 2168 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_MPS_PKT_TYPE_G(x) \ x 2169 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_MPS_PKT_TYPE_S) & CPL_RX_MPS_PKT_TYPE_M) x 2204 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_QLEN_V(x) ((x) << SRQT_QLEN_S) x 2205 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_QLEN_G(x) (((x) >> SRQT_QLEN_S) & SRQT_QLEN_M) x 2209 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_QBASE_V(x) ((x) << SRQT_QBASE_S) x 2210 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_QBASE_G(x) (((x) >> SRQT_QBASE_S) & SRQT_QBASE_M) x 2214 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_PDID_V(x) ((x) << SRQT_PDID_S) x 2215 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_PDID_G(x) (((x) >> SRQT_PDID_S) & SRQT_PDID_M) x 2219 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_IDX_V(x) ((x) << SRQT_IDX_S) x 2220 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define SRQT_IDX_G(x) (((x) >> SRQT_IDX_S) & SRQT_IDX_M) x 2234 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_OPCODE_V(x) ((x) << CPL_TX_TLS_SFO_OPCODE_S) x 2237 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_DATA_TYPE_V(x) ((x) << CPL_TX_TLS_SFO_DATA_TYPE_S) x 2240 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_CPL_LEN_V(x) ((x) << CPL_TX_TLS_SFO_CPL_LEN_S) x 2244 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_SEG_LEN_V(x) ((x) << CPL_TX_TLS_SFO_SEG_LEN_S) x 2245 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_SEG_LEN_G(x) \ x 2246 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TLS_SFO_SEG_LEN_S) & CPL_TX_TLS_SFO_SEG_LEN_M) x 2250 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_TYPE_V(x) ((x) << CPL_TX_TLS_SFO_TYPE_S) x 2251 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_TYPE_G(x) \ x 2252 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TLS_SFO_TYPE_S) & CPL_TX_TLS_SFO_TYPE_M) x 2256 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_PROTOVER_V(x) ((x) << CPL_TX_TLS_SFO_PROTOVER_S) x 2257 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TX_TLS_SFO_PROTOVER_G(x) \ x 2258 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TX_TLS_SFO_PROTOVER_S) & CPL_TX_TLS_SFO_PROTOVER_M) x 2270 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TLS_DATA_OPCODE_V(x) ((x) << CPL_TLS_DATA_OPCODE_S) x 2271 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TLS_DATA_OPCODE_G(x) \ x 2272 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TLS_DATA_OPCODE_S) & CPL_TLS_DATA_OPCODE_M) x 2276 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TLS_DATA_TID_V(x) ((x) << CPL_TLS_DATA_TID_S) x 2277 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TLS_DATA_TID_G(x) \ x 2278 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TLS_DATA_TID_S) & CPL_TLS_DATA_TID_M) x 2282 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TLS_DATA_LENGTH_V(x) ((x) << CPL_TLS_DATA_LENGTH_S) x 2283 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_TLS_DATA_LENGTH_G(x) \ x 2284 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_TLS_DATA_LENGTH_S) & CPL_TLS_DATA_LENGTH_M) x 2298 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_OPCODE_V(x) ((x) << CPL_RX_TLS_CMP_OPCODE_S) x 2299 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_OPCODE_G(x) \ x 2300 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_TLS_CMP_OPCODE_S) & CPL_RX_TLS_CMP_OPCODE_M) x 2304 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_TID_V(x) ((x) << CPL_RX_TLS_CMP_TID_S) x 2305 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_TID_G(x) \ x 2306 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_TLS_CMP_TID_S) & CPL_RX_TLS_CMP_TID_M) x 2310 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_PDULENGTH_V(x) ((x) << CPL_RX_TLS_CMP_PDULENGTH_S) x 2311 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_PDULENGTH_G(x) \ x 2312 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_TLS_CMP_PDULENGTH_S) & CPL_RX_TLS_CMP_PDULENGTH_M) x 2316 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_LENGTH_V(x) ((x) << CPL_RX_TLS_CMP_LENGTH_S) x 2317 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h #define CPL_RX_TLS_CMP_LENGTH_G(x) \ x 2318 drivers/net/ethernet/chelsio/cxgb4/t4_msg.h (((x) >> CPL_RX_TLS_CMP_LENGTH_S) & CPL_RX_TLS_CMP_LENGTH_M) x 77 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QID_V(x) ((x) << QID_S) x 80 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBPRIO_V(x) ((x) << DBPRIO_S) x 84 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIDX_V(x) ((x) << PIDX_S) x 89 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBTYPE_V(x) ((x) << DBTYPE_S) x 94 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIDX_T5_V(x) ((x) << PIDX_T5_S) x 95 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIDX_T5_G(x) (((x) >> PIDX_T5_S) & PIDX_T5_M) x 100 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INGRESSQID_V(x) ((x) << INGRESSQID_S) x 103 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERREG_V(x) ((x) << TIMERREG_S) x 106 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SEINTARM_V(x) ((x) << SEINTARM_S) x 110 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIDXINC_V(x) ((x) << CIDXINC_S) x 116 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXPKTCPLMODE_V(x) ((x) << RXPKTCPLMODE_S) x 120 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EGRSTATUSPAGESIZE_V(x) ((x) << EGRSTATUSPAGESIZE_S) x 125 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PKTSHIFT_V(x) ((x) << PKTSHIFT_S) x 126 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PKTSHIFT_G(x) (((x) >> PKTSHIFT_S) & PKTSHIFT_M) x 129 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INGPCIEBOUNDARY_V(x) ((x) << INGPCIEBOUNDARY_S) x 133 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INGPADBOUNDARY_V(x) ((x) << INGPADBOUNDARY_S) x 134 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INGPADBOUNDARY_G(x) (((x) >> INGPADBOUNDARY_S) & INGPADBOUNDARY_M) x 137 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EGRPCIEBOUNDARY_V(x) ((x) << EGRPCIEBOUNDARY_S) x 141 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INGPACKBOUNDARY_V(x) ((x) << INGPACKBOUNDARY_S) x 142 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INGPACKBOUNDARY_G(x) (((x) >> INGPACKBOUNDARY_S) \ x 146 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFIFO_ENABLE_V(x) ((x) << VFIFO_ENABLE_S) x 153 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBVFIFO_SIZE_G(x) (((x) >> DBVFIFO_SIZE_S) & DBVFIFO_SIZE_M) x 157 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_DBVFIFO_SIZE_G(x) (((x) >> T6_DBVFIFO_SIZE_S) & T6_DBVFIFO_SIZE_M) x 162 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BUSY_V(x) ((x) << BUSY_S) x 167 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CTXTTYPE_V(x) ((x) << CTXTTYPE_S) x 171 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CTXTQID_V(x) ((x) << CTXTQID_S) x 177 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define GLOBALENABLE_V(x) ((x) << GLOBALENABLE_S) x 184 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF7_V(x) ((x) << HOSTPAGESIZEPF7_S) x 185 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF7_G(x) (((x) >> HOSTPAGESIZEPF7_S) & HOSTPAGESIZEPF7_M) x 189 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF6_V(x) ((x) << HOSTPAGESIZEPF6_S) x 190 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF6_G(x) (((x) >> HOSTPAGESIZEPF6_S) & HOSTPAGESIZEPF6_M) x 194 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF5_V(x) ((x) << HOSTPAGESIZEPF5_S) x 195 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF5_G(x) (((x) >> HOSTPAGESIZEPF5_S) & HOSTPAGESIZEPF5_M) x 199 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF4_V(x) ((x) << HOSTPAGESIZEPF4_S) x 200 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF4_G(x) (((x) >> HOSTPAGESIZEPF4_S) & HOSTPAGESIZEPF4_M) x 204 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF3_V(x) ((x) << HOSTPAGESIZEPF3_S) x 205 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF3_G(x) (((x) >> HOSTPAGESIZEPF3_S) & HOSTPAGESIZEPF3_M) x 209 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF2_V(x) ((x) << HOSTPAGESIZEPF2_S) x 210 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF2_G(x) (((x) >> HOSTPAGESIZEPF2_S) & HOSTPAGESIZEPF2_M) x 214 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF1_V(x) ((x) << HOSTPAGESIZEPF1_S) x 215 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF1_G(x) (((x) >> HOSTPAGESIZEPF1_S) & HOSTPAGESIZEPF1_M) x 219 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF0_V(x) ((x) << HOSTPAGESIZEPF0_S) x 220 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTPAGESIZEPF0_G(x) (((x) >> HOSTPAGESIZEPF0_S) & HOSTPAGESIZEPF0_M) x 229 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEUESPERPAGEPF0_V(x) ((x) << QUEUESPERPAGEPF0_S) x 230 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEUESPERPAGEPF0_G(x) (((x) >> QUEUESPERPAGEPF0_S) & QUEUESPERPAGEPF0_M) x 237 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_FLM_DBP_V(x) ((x) << ERR_FLM_DBP_S) x 241 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_FLM_IDMA1_V(x) ((x) << ERR_FLM_IDMA1_S) x 245 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_FLM_IDMA0_V(x) ((x) << ERR_FLM_IDMA0_S) x 249 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_FLM_HINT_V(x) ((x) << ERR_FLM_HINT_S) x 253 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_PCIE_ERROR3_V(x) ((x) << ERR_PCIE_ERROR3_S) x 257 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_PCIE_ERROR2_V(x) ((x) << ERR_PCIE_ERROR2_S) x 261 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_PCIE_ERROR1_V(x) ((x) << ERR_PCIE_ERROR1_S) x 265 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_PCIE_ERROR0_V(x) ((x) << ERR_PCIE_ERROR0_S) x 269 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_CPL_EXCEED_IQE_SIZE_V(x) ((x) << ERR_CPL_EXCEED_IQE_SIZE_S) x 273 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_INVALID_CIDX_INC_V(x) ((x) << ERR_INVALID_CIDX_INC_S) x 277 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_CPL_OPCODE_0_V(x) ((x) << ERR_CPL_OPCODE_0_S) x 281 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_DROPPED_DB_V(x) ((x) << ERR_DROPPED_DB_S) x 285 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_DATA_CPL_ON_HIGH_QID1_V(x) ((x) << ERR_DATA_CPL_ON_HIGH_QID1_S) x 289 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_DATA_CPL_ON_HIGH_QID0_V(x) ((x) << ERR_DATA_CPL_ON_HIGH_QID0_S) x 293 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_BAD_DB_PIDX3_V(x) ((x) << ERR_BAD_DB_PIDX3_S) x 297 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_BAD_DB_PIDX2_V(x) ((x) << ERR_BAD_DB_PIDX2_S) x 301 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_BAD_DB_PIDX1_V(x) ((x) << ERR_BAD_DB_PIDX1_S) x 305 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_BAD_DB_PIDX0_V(x) ((x) << ERR_BAD_DB_PIDX0_S) x 309 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_ING_CTXT_PRIO_V(x) ((x) << ERR_ING_CTXT_PRIO_S) x 313 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERR_EGR_CTXT_PRIO_V(x) ((x) << ERR_EGR_CTXT_PRIO_S) x 317 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBFIFO_HP_INT_V(x) ((x) << DBFIFO_HP_INT_S) x 321 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBFIFO_LP_INT_V(x) ((x) << DBFIFO_LP_INT_S) x 325 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INGRESS_SIZE_ERR_V(x) ((x) << INGRESS_SIZE_ERR_S) x 329 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EGRESS_SIZE_ERR_V(x) ((x) << EGRESS_SIZE_ERR_S) x 348 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define NOHDR_V(x) ((x) << NOHDR_S) x 353 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HDRSTARTFLQ_G(x) (((x) >> HDRSTARTFLQ_S) & HDRSTARTFLQ_M) x 359 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_0_V(x) ((x) << THRESHOLD_0_S) x 360 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_0_G(x) (((x) >> THRESHOLD_0_S) & THRESHOLD_0_M) x 364 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_1_V(x) ((x) << THRESHOLD_1_S) x 365 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_1_G(x) (((x) >> THRESHOLD_1_S) & THRESHOLD_1_M) x 369 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_2_V(x) ((x) << THRESHOLD_2_S) x 370 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_2_G(x) (((x) >> THRESHOLD_2_S) & THRESHOLD_2_M) x 374 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_3_V(x) ((x) << THRESHOLD_3_S) x 375 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define THRESHOLD_3_G(x) (((x) >> THRESHOLD_3_S) & THRESHOLD_3_M) x 381 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EGRTHRESHOLD_V(x) ((x) << EGRTHRESHOLD_S) x 382 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EGRTHRESHOLD_G(x) (((x) >> EGRTHRESHOLD_S) & EGRTHRESHOLD_M) x 386 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EGRTHRESHOLDPACKING_V(x) ((x) << EGRTHRESHOLDPACKING_S) x 387 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EGRTHRESHOLDPACKING_G(x) \ x 388 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h (((x) >> EGRTHRESHOLDPACKING_S) & EGRTHRESHOLDPACKING_M) x 392 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_EGRTHRESHOLDPACKING_G(x) \ x 393 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h (((x) >> T6_EGRTHRESHOLDPACKING_S) & T6_EGRTHRESHOLDPACKING_M) x 400 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TSOP_V(x) ((x) << TSOP_S) x 401 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TSOP_G(x) (((x) >> TSOP_S) & TSOP_M) x 405 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TSVAL_V(x) ((x) << TSVAL_S) x 406 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TSVAL_G(x) (((x) >> TSVAL_S) & TSVAL_M) x 413 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HP_INT_THRESH_V(x) ((x) << HP_INT_THRESH_S) x 417 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LP_INT_THRESH_V(x) ((x) << LP_INT_THRESH_S) x 422 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define NOCOALESCE_V(x) ((x) << NOCOALESCE_S) x 426 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ENABLE_DROP_V(x) ((x) << ENABLE_DROP_S) x 433 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE0_V(x) ((x) << TIMERVALUE0_S) x 434 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE0_G(x) (((x) >> TIMERVALUE0_S) & TIMERVALUE0_M) x 438 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE1_V(x) ((x) << TIMERVALUE1_S) x 439 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE1_G(x) (((x) >> TIMERVALUE1_S) & TIMERVALUE1_M) x 445 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE2_V(x) ((x) << TIMERVALUE2_S) x 446 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE2_G(x) (((x) >> TIMERVALUE2_S) & TIMERVALUE2_M) x 450 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE3_V(x) ((x) << TIMERVALUE3_S) x 451 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE3_G(x) (((x) >> TIMERVALUE3_S) & TIMERVALUE3_M) x 457 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE4_V(x) ((x) << TIMERVALUE4_S) x 458 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE4_G(x) (((x) >> TIMERVALUE4_S) & TIMERVALUE4_M) x 462 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE5_V(x) ((x) << TIMERVALUE5_S) x 463 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERVALUE5_G(x) (((x) >> TIMERVALUE5_S) & TIMERVALUE5_M) x 479 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UNCAPTURED_ERROR_V(x) ((x) << UNCAPTURED_ERROR_S) x 483 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERROR_QID_VALID_V(x) ((x) << ERROR_QID_VALID_S) x 488 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ERROR_QID_G(x) (((x) >> ERROR_QID_S) & ERROR_QID_M) x 492 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HP_INT_THRESH_V(x) ((x) << HP_INT_THRESH_S) x 496 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HP_COUNT_G(x) (((x) >> HP_COUNT_S) & HP_COUNT_M) x 500 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LP_INT_THRESH_V(x) ((x) << LP_INT_THRESH_S) x 504 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LP_COUNT_G(x) (((x) >> LP_COUNT_S) & LP_COUNT_M) x 508 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LP_INT_THRESH_T5_V(x) ((x) << LP_INT_THRESH_T5_S) x 512 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LP_COUNT_T5_G(x) (((x) >> LP_COUNT_T5_S) & LP_COUNT_T5_M) x 521 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define STATMODE_V(x) ((x) << STATMODE_S) x 525 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define STATSOURCE_T5_V(x) ((x) << STATSOURCE_T5_S) x 526 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define STATSOURCE_T5_G(x) (((x) >> STATSOURCE_T5_S) & STATSOURCE_T5_M) x 529 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_STATMODE_V(x) ((x) << T6_STATMODE_S) x 535 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HP_INT_THRESH_T5_V(x) ((x) << HP_INT_THRESH_T5_S) x 539 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HP_COUNT_T5_G(x) (((x) >> HP_COUNT_T5_S) & HP_COUNT_T5_M) x 542 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ENABLE_DROP_V(x) ((x) << ENABLE_DROP_S) x 546 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DROPPED_DB_V(x) ((x) << DROPPED_DB_S) x 557 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define AIVEC_V(x) ((x) << AIVEC_S) x 563 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UNXSPLCPLERR_V(x) ((x) << UNXSPLCPLERR_S) x 567 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCIEPINT_V(x) ((x) << PCIEPINT_S) x 571 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCIESINT_V(x) ((x) << PCIESINT_S) x 575 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RPLPERR_V(x) ((x) << RPLPERR_S) x 579 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXWRPERR_V(x) ((x) << RXWRPERR_S) x 583 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXCPLPERR_V(x) ((x) << RXCPLPERR_S) x 587 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIOTAGPERR_V(x) ((x) << PIOTAGPERR_S) x 591 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MATAGPERR_V(x) ((x) << MATAGPERR_S) x 595 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INTXCLRPERR_V(x) ((x) << INTXCLRPERR_S) x 599 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FIDPERR_V(x) ((x) << FIDPERR_S) x 603 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CFGSNPPERR_V(x) ((x) << CFGSNPPERR_S) x 607 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HRSPPERR_V(x) ((x) << HRSPPERR_S) x 611 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HREQPERR_V(x) ((x) << HREQPERR_S) x 615 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HCNTPERR_V(x) ((x) << HCNTPERR_S) x 619 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DRSPPERR_V(x) ((x) << DRSPPERR_S) x 623 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DREQPERR_V(x) ((x) << DREQPERR_S) x 627 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DCNTPERR_V(x) ((x) << DCNTPERR_S) x 631 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CRSPPERR_V(x) ((x) << CRSPPERR_S) x 635 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CREQPERR_V(x) ((x) << CREQPERR_S) x 639 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CCNTPERR_V(x) ((x) << CCNTPERR_S) x 643 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TARTAGPERR_V(x) ((x) << TARTAGPERR_S) x 647 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIOREQPERR_V(x) ((x) << PIOREQPERR_S) x 651 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIOCPLPERR_V(x) ((x) << PIOCPLPERR_S) x 655 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIXDIPERR_V(x) ((x) << MSIXDIPERR_S) x 659 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIXDATAPERR_V(x) ((x) << MSIXDATAPERR_S) x 663 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIXADDRHPERR_V(x) ((x) << MSIXADDRHPERR_S) x 667 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIXADDRLPERR_V(x) ((x) << MSIXADDRLPERR_S) x 671 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIDATAPERR_V(x) ((x) << MSIDATAPERR_S) x 675 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIADDRHPERR_V(x) ((x) << MSIADDRHPERR_S) x 679 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIADDRLPERR_V(x) ((x) << MSIADDRLPERR_S) x 683 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define READRSPERR_V(x) ((x) << READRSPERR_S) x 687 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TRGT1GRPPERR_V(x) ((x) << TRGT1GRPPERR_S) x 691 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IPSOTPERR_V(x) ((x) << IPSOTPERR_S) x 695 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IPRETRYPERR_V(x) ((x) << IPRETRYPERR_S) x 699 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IPRXDATAGRPPERR_V(x) ((x) << IPRXDATAGRPPERR_S) x 703 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IPRXHDRGRPPERR_V(x) ((x) << IPRXHDRGRPPERR_S) x 707 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MAGRPPERR_V(x) ((x) << MAGRPPERR_S) x 711 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFIDPERR_V(x) ((x) << VFIDPERR_S) x 715 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HREQWRPERR_V(x) ((x) << HREQWRPERR_S) x 719 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DREQWRPERR_V(x) ((x) << DREQWRPERR_S) x 723 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CREQRDPERR_V(x) ((x) << CREQRDPERR_S) x 727 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSTTAGQPERR_V(x) ((x) << MSTTAGQPERR_S) x 731 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIOREQGRPPERR_V(x) ((x) << PIOREQGRPPERR_S) x 735 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIOCPLGRPPERR_V(x) ((x) << PIOCPLGRPPERR_S) x 739 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSIXSTIPERR_V(x) ((x) << MSIXSTIPERR_S) x 743 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSTTIMEOUTPERR_V(x) ((x) << MSTTIMEOUTPERR_S) x 747 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSTGRPPERR_V(x) ((x) << MSTGRPPERR_S) x 757 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCIEOFST_G(x) (((x) >> PCIEOFST_S) & PCIEOFST_M) x 761 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BIR_V(x) ((x) << BIR_S) x 762 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BIR_G(x) (((x) >> BIR_S) & BIR_M) x 766 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define WINDOW_V(x) ((x) << WINDOW_S) x 767 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define WINDOW_G(x) (((x) >> WINDOW_S) & WINDOW_M) x 772 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ENABLE_V(x) ((x) << ENABLE_S) x 776 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LOCALCFG_V(x) ((x) << LOCALCFG_S) x 780 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FUNCTION_V(x) ((x) << FUNCTION_S) x 783 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define REGISTER_V(x) ((x) << REGISTER_S) x 786 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_ENABLE_V(x) ((x) << T6_ENABLE_S) x 790 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PFNUM_V(x) ((x) << PFNUM_S) x 798 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RNPP_V(x) ((x) << RNPP_S) x 802 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RPCP_V(x) ((x) << RPCP_S) x 806 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RCIP_V(x) ((x) << RCIP_S) x 810 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RCCP_V(x) ((x) << RCCP_S) x 814 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RFTP_V(x) ((x) << RFTP_S) x 818 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PTRP_V(x) ((x) << PTRP_S) x 824 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TPCP_V(x) ((x) << TPCP_S) x 828 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNPP_V(x) ((x) << TNPP_S) x 832 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFTP_V(x) ((x) << TFTP_S) x 836 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TCAP_V(x) ((x) << TCAP_S) x 840 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TCIP_V(x) ((x) << TCIP_S) x 844 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RCAP_V(x) ((x) << RCAP_S) x 848 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PLUP_V(x) ((x) << PLUP_S) x 852 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PLDN_V(x) ((x) << PLDN_S) x 856 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OTDD_V(x) ((x) << OTDD_S) x 860 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define GTRP_V(x) ((x) << GTRP_S) x 864 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RDPE_V(x) ((x) << RDPE_S) x 868 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TDCE_V(x) ((x) << TDCE_S) x 872 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TDUE_V(x) ((x) << TDUE_S) x 880 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_UE_INT_CAUSE_V(x) ((x) << ECC_UE_INT_CAUSE_S) x 884 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_CE_INT_CAUSE_V(x) ((x) << ECC_CE_INT_CAUSE_S) x 888 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERR_INT_CAUSE_V(x) ((x) << PERR_INT_CAUSE_S) x 896 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SIGNAL_DET_V(x) ((x) << SIGNAL_DET_S) x 904 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_CECNT_V(x) ((x) << ECC_CECNT_S) x 905 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_CECNT_G(x) (((x) >> ECC_CECNT_S) & ECC_CECNT_M) x 909 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_UECNT_V(x) ((x) << ECC_UECNT_S) x 910 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_UECNT_G(x) (((x) >> ECC_UECNT_S) & ECC_UECNT_M) x 915 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define START_BIST_V(x) ((x) << START_BIST_S) x 919 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BIST_CMD_GAP_V(x) ((x) << BIST_CMD_GAP_S) x 922 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BIST_OPCODE_V(x) ((x) << BIST_OPCODE_S) x 935 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM0_BASE_G(x) (((x) >> EDRAM0_BASE_S) & EDRAM0_BASE_M) x 939 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM0_SIZE_V(x) ((x) << EDRAM0_SIZE_S) x 940 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM0_SIZE_G(x) (((x) >> EDRAM0_SIZE_S) & EDRAM0_SIZE_M) x 946 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM1_BASE_G(x) (((x) >> EDRAM1_BASE_S) & EDRAM1_BASE_M) x 950 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM1_SIZE_V(x) ((x) << EDRAM1_SIZE_S) x 951 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM1_SIZE_G(x) (((x) >> EDRAM1_SIZE_S) & EDRAM1_SIZE_M) x 957 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM_BASE_V(x) ((x) << EXT_MEM_BASE_S) x 958 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM_BASE_G(x) (((x) >> EXT_MEM_BASE_S) & EXT_MEM_BASE_M) x 962 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM_SIZE_V(x) ((x) << EXT_MEM_SIZE_S) x 963 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM_SIZE_G(x) (((x) >> EXT_MEM_SIZE_S) & EXT_MEM_SIZE_M) x 968 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HMA_MUX_V(x) ((x) << HMA_MUX_S) x 973 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM1_BASE_G(x) (((x) >> EXT_MEM1_BASE_S) & EXT_MEM1_BASE_M) x 977 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM1_SIZE_V(x) ((x) << EXT_MEM1_SIZE_S) x 978 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM1_SIZE_G(x) (((x) >> EXT_MEM1_SIZE_S) & EXT_MEM1_SIZE_M) x 984 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM0_BASE_G(x) (((x) >> EXT_MEM0_BASE_S) & EXT_MEM0_BASE_M) x 988 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM0_SIZE_V(x) ((x) << EXT_MEM0_SIZE_S) x 989 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM0_SIZE_G(x) (((x) >> EXT_MEM0_SIZE_S) & EXT_MEM0_SIZE_M) x 994 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM_ENABLE_V(x) ((x) << EXT_MEM_ENABLE_S) x 998 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM1_ENABLE_V(x) ((x) << EDRAM1_ENABLE_S) x 1002 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDRAM0_ENABLE_V(x) ((x) << EDRAM0_ENABLE_S) x 1006 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM1_ENABLE_V(x) ((x) << EXT_MEM1_ENABLE_S) x 1010 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EXT_MEM0_ENABLE_V(x) ((x) << EXT_MEM0_ENABLE_S) x 1016 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MEM_PERR_INT_CAUSE_V(x) ((x) << MEM_PERR_INT_CAUSE_S) x 1020 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MEM_WRAP_INT_CAUSE_V(x) ((x) << MEM_WRAP_INT_CAUSE_S) x 1027 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MEM_WRAP_ADDRESS_G(x) (((x) >> MEM_WRAP_ADDRESS_S) & MEM_WRAP_ADDRESS_M) x 1031 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MEM_WRAP_CLIENT_NUM_G(x) \ x 1032 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h (((x) >> MEM_WRAP_CLIENT_NUM_S) & MEM_WRAP_CLIENT_NUM_M) x 1049 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_UE_PAR_V(x) ((x) << ECC_UE_PAR_S) x 1053 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ECC_CE_PAR_V(x) ((x) << ECC_CE_PAR_S) x 1057 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERR_PAR_CAUSE_V(x) ((x) << PERR_PAR_CAUSE_S) x 1076 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPCRST_V(x) ((x) << UPCRST_S) x 1083 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBMSGVALID_V(x) ((x) << MBMSGVALID_S) x 1087 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBINTREQ_V(x) ((x) << MBINTREQ_S) x 1092 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBOWNER_V(x) ((x) << MBOWNER_S) x 1093 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBOWNER_G(x) (((x) >> MBOWNER_S) & MBOWNER_M) x 1098 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBMSGRDYINTEN_V(x) ((x) << MBMSGRDYINTEN_S) x 1104 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBMSGRDYINT_V(x) ((x) << MBMSGRDYINT_S) x 1110 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIEQOUTPARERRINT_V(x) ((x) << TIEQOUTPARERRINT_S) x 1114 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIEQINPARERRINT_V(x) ((x) << TIEQINPARERRINT_S) x 1118 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMER0INT_V(x) ((x) << TIMER0INT_S) x 1122 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PREFDROPINT_V(x) ((x) << PREFDROPINT_S) x 1126 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPACCNONZERO_V(x) ((x) << UPACCNONZERO_S) x 1130 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBHOSTPARERR_V(x) ((x) << MBHOSTPARERR_S) x 1134 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MBUPPARERR_V(x) ((x) << MBUPPARERR_S) x 1138 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQTP0PARERR_V(x) ((x) << IBQTP0PARERR_S) x 1142 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQTP1PARERR_V(x) ((x) << IBQTP1PARERR_S) x 1146 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQULPPARERR_V(x) ((x) << IBQULPPARERR_S) x 1150 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQSGELOPARERR_V(x) ((x) << IBQSGELOPARERR_S) x 1154 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQSGEHIPARERR_V(x) ((x) << IBQSGEHIPARERR_S) x 1158 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQNCSIPARERR_V(x) ((x) << IBQNCSIPARERR_S) x 1162 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQULP0PARERR_V(x) ((x) << OBQULP0PARERR_S) x 1166 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQULP1PARERR_V(x) ((x) << OBQULP1PARERR_S) x 1170 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQULP2PARERR_V(x) ((x) << OBQULP2PARERR_S) x 1174 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQULP3PARERR_V(x) ((x) << OBQULP3PARERR_S) x 1178 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQSGEPARERR_V(x) ((x) << OBQSGEPARERR_S) x 1182 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQNCSIPARERR_V(x) ((x) << OBQNCSIPARERR_S) x 1188 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EEPROMWRINT_V(x) ((x) << EEPROMWRINT_S) x 1192 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMEOUTMAINT_V(x) ((x) << TIMEOUTMAINT_S) x 1196 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMEOUTINT_V(x) ((x) << TIMEOUTINT_S) x 1200 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RSPOVRLOOKUPINT_V(x) ((x) << RSPOVRLOOKUPINT_S) x 1204 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define REQOVRLOOKUPINT_V(x) ((x) << REQOVRLOOKUPINT_S) x 1208 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKWRPLINT_V(x) ((x) << BLKWRPLINT_S) x 1212 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKRDPLINT_V(x) ((x) << BLKRDPLINT_S) x 1216 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLWRPLINT_V(x) ((x) << SGLWRPLINT_S) x 1220 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLRDPLINT_V(x) ((x) << SGLRDPLINT_S) x 1224 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKWRCTLINT_V(x) ((x) << BLKWRCTLINT_S) x 1228 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKRDCTLINT_V(x) ((x) << BLKRDCTLINT_S) x 1232 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLWRCTLINT_V(x) ((x) << SGLWRCTLINT_S) x 1236 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLRDCTLINT_V(x) ((x) << SGLRDCTLINT_S) x 1240 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKWREEPROMINT_V(x) ((x) << BLKWREEPROMINT_S) x 1244 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKRDEEPROMINT_V(x) ((x) << BLKRDEEPROMINT_S) x 1248 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLWREEPROMINT_V(x) ((x) << SGLWREEPROMINT_S) x 1252 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLRDEEPROMINT_V(x) ((x) << SGLRDEEPROMINT_S) x 1256 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKWRFLASHINT_V(x) ((x) << BLKWRFLASHINT_S) x 1260 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKRDFLASHINT_V(x) ((x) << BLKRDFLASHINT_S) x 1264 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLWRFLASHINT_V(x) ((x) << SGLWRFLASHINT_S) x 1268 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLRDFLASHINT_V(x) ((x) << SGLRDFLASHINT_S) x 1272 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKWRBOOTINT_V(x) ((x) << BLKWRBOOTINT_S) x 1276 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BLKRDBOOTINT_V(x) ((x) << BLKRDBOOTINT_S) x 1280 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLWRBOOTINT_V(x) ((x) << SGLWRBOOTINT_S) x 1284 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGLRDBOOTINT_V(x) ((x) << SGLRDBOOTINT_S) x 1288 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ILLWRBEINT_V(x) ((x) << ILLWRBEINT_S) x 1292 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ILLRDBEINT_V(x) ((x) << ILLRDBEINT_S) x 1296 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ILLRDINT_V(x) ((x) << ILLRDINT_S) x 1300 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ILLWRINT_V(x) ((x) << ILLWRINT_S) x 1304 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ILLTRANSINT_V(x) ((x) << ILLTRANSINT_S) x 1308 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RSVDSPACEINT_V(x) ((x) << RSVDSPACEINT_S) x 1313 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGLAWHLF_V(x) ((x) << DBGLAWHLF_S) x 1318 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGLAWPTR_G(x) (((x) >> DBGLAWPTR_S) & DBGLAWPTR_M) x 1321 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGLAENABLE_V(x) ((x) << DBGLAENABLE_S) x 1326 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGLARPTR_V(x) ((x) << DBGLARPTR_S) x 1329 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CRXPKTENC_V(x) ((x) << CRXPKTENC_S) x 1338 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ACTIVEFILTERCOUNTS_V(x) ((x) << ACTIVEFILTERCOUNTS_S) x 1353 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PMRXNUMCHN_V(x) ((x) << PMRXNUMCHN_S) x 1358 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PMTXNUMCHN_G(x) (((x) >> PMTXNUMCHN_S) & PMTXNUMCHN_M) x 1362 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PMTXMAXPAGE_G(x) (((x) >> PMTXMAXPAGE_S) & PMTXMAXPAGE_M) x 1366 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PMRXMAXPAGE_G(x) (((x) >> PMRXMAXPAGE_S) & PMRXMAXPAGE_M) x 1370 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGLAMODE_G(x) (((x) >> DBGLAMODE_S) & DBGLAMODE_M) x 1374 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FIVETUPLELOOKUP_V(x) ((x) << FIVETUPLELOOKUP_S) x 1375 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FIVETUPLELOOKUP_G(x) (((x) >> FIVETUPLELOOKUP_S) & FIVETUPLELOOKUP_M) x 1381 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MAXRXDATA_G(x) (((x) >> MAXRXDATA_S) & MAXRXDATA_M) x 1387 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERRESOLUTION_G(x) (((x) >> TIMERRESOLUTION_S) & TIMERRESOLUTION_M) x 1391 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMESTAMPRESOLUTION_G(x) \ x 1392 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h (((x) >> TIMESTAMPRESOLUTION_S) & TIMESTAMPRESOLUTION_M) x 1396 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DELAYEDACKRESOLUTION_G(x) \ x 1397 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h (((x) >> DELAYEDACKRESOLUTION_S) & DELAYEDACKRESOLUTION_M) x 1412 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define INITSRTT_G(x) (((x) >> INITSRTT_S) & INITSRTT_M) x 1416 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERSMAX_V(x) ((x) << PERSMAX_S) x 1417 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERSMAX_G(x) (((x) >> PERSMAX_S) & PERSMAX_M) x 1421 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYNSHIFTMAX_V(x) ((x) << SYNSHIFTMAX_S) x 1422 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYNSHIFTMAX_G(x) (((x) >> SYNSHIFTMAX_S) & SYNSHIFTMAX_M) x 1426 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXTSHIFTMAXR1_V(x) ((x) << RXTSHIFTMAXR1_S) x 1427 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXTSHIFTMAXR1_G(x) (((x) >> RXTSHIFTMAXR1_S) & RXTSHIFTMAXR1_M) x 1431 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXTSHIFTMAXR2_V(x) ((x) << RXTSHIFTMAXR2_S) x 1432 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXTSHIFTMAXR2_G(x) (((x) >> RXTSHIFTMAXR2_S) & RXTSHIFTMAXR2_M) x 1436 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERSHIFTBACKOFFMAX_V(x) ((x) << PERSHIFTBACKOFFMAX_S) x 1437 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERSHIFTBACKOFFMAX_G(x) \ x 1438 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h (((x) >> PERSHIFTBACKOFFMAX_S) & PERSHIFTBACKOFFMAX_M) x 1442 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERSHIFTMAX_V(x) ((x) << PERSHIFTMAX_S) x 1443 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERSHIFTMAX_G(x) (((x) >> PERSHIFTMAX_S) & PERSHIFTMAX_M) x 1447 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEEPALIVEMAXR1_V(x) ((x) << KEEPALIVEMAXR1_S) x 1448 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEEPALIVEMAXR1_G(x) (((x) >> KEEPALIVEMAXR1_S) & KEEPALIVEMAXR1_M) x 1452 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEEPALIVEMAXR2_V(x) ((x) << KEEPALIVEMAXR2_S) x 1453 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEEPALIVEMAXR2_G(x) (((x) >> KEEPALIVEMAXR2_S) & KEEPALIVEMAXR2_M) x 1456 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ROWINDEX_V(x) ((x) << ROWINDEX_S) x 1463 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MTUINDEX_V(x) ((x) << MTUINDEX_S) x 1467 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MTUWIDTH_V(x) ((x) << MTUWIDTH_S) x 1468 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MTUWIDTH_G(x) (((x) >> MTUWIDTH_S) & MTUWIDTH_M) x 1472 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MTUVALUE_V(x) ((x) << MTUVALUE_S) x 1473 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MTUVALUE_G(x) (((x) >> MTUVALUE_S) & MTUVALUE_M) x 1481 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LKPTBLROWVLD_V(x) ((x) << LKPTBLROWVLD_S) x 1486 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LKPTBLQUEUE1_G(x) (((x) >> LKPTBLQUEUE1_S) & LKPTBLQUEUE1_M) x 1490 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LKPTBLQUEUE0_G(x) (((x) >> LKPTBLQUEUE0_S) & LKPTBLQUEUE0_M) x 1498 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TIMERMODE_G(x) (((x) >> TIMERMODE_S) & TIMERMODE_M) x 1514 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FREEPSTRUCTCOUNT_G(x) (((x) >> FREEPSTRUCTCOUNT_S) & FREEPSTRUCTCOUNT_M) x 1518 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FREERXPAGECOUNT_V(x) ((x) << FREERXPAGECOUNT_S) x 1519 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FREERXPAGECOUNT_G(x) (((x) >> FREERXPAGECOUNT_S) & FREERXPAGECOUNT_M) x 1525 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FREETXPAGECOUNT_V(x) ((x) << FREETXPAGECOUNT_S) x 1526 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FREETXPAGECOUNT_G(x) (((x) >> FREETXPAGECOUNT_S) & FREETXPAGECOUNT_M) x 1529 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FLMTXFLSTEMPTY_V(x) ((x) << FLMTXFLSTEMPTY_S) x 1536 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDRATE3_G(x) (((x) >> OFDRATE3_S) & OFDRATE3_M) x 1540 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDRATE2_G(x) (((x) >> OFDRATE2_S) & OFDRATE2_M) x 1544 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDRATE1_G(x) (((x) >> OFDRATE1_S) & OFDRATE1_M) x 1548 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDRATE0_G(x) (((x) >> OFDRATE0_S) & OFDRATE0_M) x 1554 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLRATE3_G(x) (((x) >> TNLRATE3_S) & TNLRATE3_M) x 1558 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLRATE2_G(x) (((x) >> TNLRATE2_S) & TNLRATE2_M) x 1562 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLRATE1_G(x) (((x) >> TNLRATE1_S) & TNLRATE1_M) x 1566 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLRATE0_G(x) (((x) >> TNLRATE0_S) & TNLRATE0_M) x 1571 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FRAGMENTATION_V(x) ((x) << FRAGMENTATION_S) x 1575 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MPSHITTYPE_V(x) ((x) << MPSHITTYPE_S) x 1579 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MACMATCH_V(x) ((x) << MACMATCH_S) x 1583 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ETHERTYPE_V(x) ((x) << ETHERTYPE_S) x 1587 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PROTOCOL_V(x) ((x) << PROTOCOL_S) x 1591 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TOS_V(x) ((x) << TOS_S) x 1595 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VLAN_V(x) ((x) << VLAN_S) x 1599 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VNIC_ID_V(x) ((x) << VNIC_ID_S) x 1603 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PORT_V(x) ((x) << PORT_S) x 1607 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FCOE_V(x) ((x) << FCOE_S) x 1611 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FILTERMODE_V(x) ((x) << FILTERMODE_S) x 1615 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FCOEMASK_V(x) ((x) << FCOEMASK_S) x 1621 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VNIC_V(x) ((x) << VNIC_S) x 1625 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define USE_ENC_IDX_V(x) ((x) << USE_ENC_IDX_S) x 1629 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CSUM_HAS_PSEUDO_HDR_V(x) ((x) << CSUM_HAS_PSEUDO_HDR_S) x 1665 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PBL_BOUND_ERR_CH3_V(x) ((x) << PBL_BOUND_ERR_CH3_S) x 1669 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PBL_BOUND_ERR_CH2_V(x) ((x) << PBL_BOUND_ERR_CH2_S) x 1673 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PBL_BOUND_ERR_CH1_V(x) ((x) << PBL_BOUND_ERR_CH1_S) x 1677 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PBL_BOUND_ERR_CH0_V(x) ((x) << PBL_BOUND_ERR_CH0_S) x 1691 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ZERO_E_CMD_ERROR_V(x) ((x) << ZERO_E_CMD_ERROR_S) x 1695 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OCSPI_PAR_ERROR_V(x) ((x) << OCSPI_PAR_ERROR_S) x 1699 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DB_OPTIONS_PAR_ERROR_V(x) ((x) << DB_OPTIONS_PAR_ERROR_S) x 1703 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IESPI_PAR_ERROR_V(x) ((x) << IESPI_PAR_ERROR_S) x 1721 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PMRX_E_PCMD_PAR_ERROR_V(x) ((x) << PMRX_E_PCMD_PAR_ERROR_S) x 1733 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCMD_LEN_OVFL0_V(x) ((x) << PCMD_LEN_OVFL0_S) x 1737 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCMD_LEN_OVFL1_V(x) ((x) << PCMD_LEN_OVFL1_S) x 1741 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCMD_LEN_OVFL2_V(x) ((x) << PCMD_LEN_OVFL2_S) x 1745 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ZERO_C_CMD_ERROR_V(x) ((x) << ZERO_C_CMD_ERROR_S) x 1751 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OESPI_PAR_ERROR_V(x) ((x) << OESPI_PAR_ERROR_S) x 1755 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ICSPI_PAR_ERROR_V(x) ((x) << ICSPI_PAR_ERROR_S) x 1759 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PMTX_C_PCMD_PAR_ERROR_V(x) ((x) << PMTX_C_PCMD_PAR_ERROR_S) x 1909 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define COUNTPAUSEMCRX_V(x) ((x) << COUNTPAUSEMCRX_S) x 1913 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define COUNTPAUSESTATRX_V(x) ((x) << COUNTPAUSESTATRX_S) x 1917 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define COUNTPAUSEMCTX_V(x) ((x) << COUNTPAUSEMCTX_S) x 1921 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define COUNTPAUSESTATTX_V(x) ((x) << COUNTPAUSESTATTX_S) x 1926 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define NUMPORTS_G(x) (((x) >> NUMPORTS_S) & NUMPORTS_M) x 1933 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FRMERR_V(x) ((x) << FRMERR_S) x 1937 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SECNTERR_V(x) ((x) << SECNTERR_S) x 1941 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BUBBLE_V(x) ((x) << BUBBLE_S) x 1946 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TXDESCFIFO_V(x) ((x) << TXDESCFIFO_S) x 1950 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TXDATAFIFO_V(x) ((x) << TXDATAFIFO_S) x 1953 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define NCSIFIFO_V(x) ((x) << NCSIFIFO_S) x 1958 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TPFIFO_V(x) ((x) << TPFIFO_S) x 2000 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TRCFIFOEMPTY_V(x) ((x) << TRCFIFOEMPTY_S) x 2004 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TRCIGNOREDROPINPUT_V(x) ((x) << TRCIGNOREDROPINPUT_S) x 2008 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TRCKEEPDUPLICATES_V(x) ((x) << TRCKEEPDUPLICATES_S) x 2012 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TRCEN_V(x) ((x) << TRCEN_S) x 2016 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TRCMULTIFILTER_V(x) ((x) << TRCMULTIFILTER_S) x 2026 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RSSCONTROL_V(x) ((x) << RSSCONTROL_S) x 2029 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEUENUMBER_V(x) ((x) << QUEUENUMBER_S) x 2032 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFINVERTMATCH_V(x) ((x) << TFINVERTMATCH_S) x 2036 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFEN_V(x) ((x) << TFEN_S) x 2041 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFPORT_V(x) ((x) << TFPORT_S) x 2042 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFPORT_G(x) (((x) >> TFPORT_S) & TFPORT_M) x 2046 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFLENGTH_V(x) ((x) << TFLENGTH_S) x 2047 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFLENGTH_G(x) (((x) >> TFLENGTH_S) & TFLENGTH_M) x 2051 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFOFFSET_V(x) ((x) << TFOFFSET_S) x 2052 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFOFFSET_G(x) (((x) >> TFOFFSET_S) & TFOFFSET_M) x 2055 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T5_TFINVERTMATCH_V(x) ((x) << T5_TFINVERTMATCH_S) x 2059 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T5_TFEN_V(x) ((x) << T5_TFEN_S) x 2064 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T5_TFPORT_V(x) ((x) << T5_TFPORT_S) x 2065 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T5_TFPORT_G(x) (((x) >> T5_TFPORT_S) & T5_TFPORT_M) x 2072 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFMINPKTSIZE_V(x) ((x) << TFMINPKTSIZE_S) x 2073 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFMINPKTSIZE_G(x) (((x) >> TFMINPKTSIZE_S) & TFMINPKTSIZE_M) x 2077 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFCAPTUREMAX_V(x) ((x) << TFCAPTUREMAX_S) x 2078 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TFCAPTUREMAX_G(x) (((x) >> TFCAPTUREMAX_S) & TFCAPTUREMAX_M) x 2087 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNL4TUPENIPV6_V(x) ((x) << TNL4TUPENIPV6_S) x 2091 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNL2TUPENIPV6_V(x) ((x) << TNL2TUPENIPV6_S) x 2095 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNL4TUPENIPV4_V(x) ((x) << TNL4TUPENIPV4_S) x 2099 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNL2TUPENIPV4_V(x) ((x) << TNL2TUPENIPV4_S) x 2103 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLTCPSEL_V(x) ((x) << TNLTCPSEL_S) x 2107 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLIP6SEL_V(x) ((x) << TNLIP6SEL_S) x 2111 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLVRTSEL_V(x) ((x) << TNLVRTSEL_S) x 2115 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLMAPEN_V(x) ((x) << TNLMAPEN_S) x 2119 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDHASHSAVE_V(x) ((x) << OFDHASHSAVE_S) x 2123 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDVRTSEL_V(x) ((x) << OFDVRTSEL_S) x 2127 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDMAPEN_V(x) ((x) << OFDMAPEN_S) x 2131 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OFDLKPEN_V(x) ((x) << OFDLKPEN_S) x 2135 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYN4TUPENIPV6_V(x) ((x) << SYN4TUPENIPV6_S) x 2139 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYN2TUPENIPV6_V(x) ((x) << SYN2TUPENIPV6_S) x 2143 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYN4TUPENIPV4_V(x) ((x) << SYN4TUPENIPV4_S) x 2147 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYN2TUPENIPV4_V(x) ((x) << SYN2TUPENIPV4_S) x 2151 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYNIP6SEL_V(x) ((x) << SYNIP6SEL_S) x 2155 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYNVRTSEL_V(x) ((x) << SYNVRTSEL_S) x 2159 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYNMAPEN_V(x) ((x) << SYNMAPEN_S) x 2163 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SYNLKPEN_V(x) ((x) << SYNLKPEN_S) x 2167 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHANNELENABLE_V(x) ((x) << CHANNELENABLE_S) x 2171 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PORTENABLE_V(x) ((x) << PORTENABLE_S) x 2175 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TNLALLLOOKUP_V(x) ((x) << TNLALLLOOKUP_S) x 2179 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VIRTENABLE_V(x) ((x) << VIRTENABLE_S) x 2183 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CONGESTIONENABLE_V(x) ((x) << CONGESTIONENABLE_S) x 2187 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHTOEPLITZ_V(x) ((x) << HASHTOEPLITZ_S) x 2191 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UDPENABLE_V(x) ((x) << UDPENABLE_S) x 2195 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DISABLE_V(x) ((x) << DISABLE_S) x 2202 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MASKSIZE_V(x) ((x) << MASKSIZE_S) x 2203 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MASKSIZE_G(x) (((x) >> MASKSIZE_S) & MASKSIZE_M) x 2207 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MASKFILTER_V(x) ((x) << MASKFILTER_S) x 2208 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MASKFILTER_G(x) (((x) >> MASKFILTER_S) & MASKFILTER_M) x 2211 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define USEWIRECH_V(x) ((x) << USEWIRECH_S) x 2215 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHALL_V(x) ((x) << HASHALL_S) x 2219 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHETH_V(x) ((x) << HASHETH_S) x 2225 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RRCPLMAPEN_V(x) ((x) << RRCPLMAPEN_S) x 2230 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RRCPLQUEWIDTH_V(x) ((x) << RRCPLQUEWIDTH_S) x 2231 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RRCPLQUEWIDTH_G(x) (((x) >> RRCPLQUEWIDTH_S) & RRCPLQUEWIDTH_M) x 2237 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFRDRG_V(x) ((x) << VFRDRG_S) x 2241 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFRDEN_V(x) ((x) << VFRDEN_S) x 2245 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFPERREN_V(x) ((x) << VFPERREN_S) x 2249 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYPERREN_V(x) ((x) << KEYPERREN_S) x 2253 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DISABLEVLAN_V(x) ((x) << DISABLEVLAN_S) x 2257 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ENABLEUP0_V(x) ((x) << ENABLEUP0_S) x 2262 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHDELAY_V(x) ((x) << HASHDELAY_S) x 2263 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHDELAY_G(x) (((x) >> HASHDELAY_S) & HASHDELAY_M) x 2267 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFWRADDR_V(x) ((x) << VFWRADDR_S) x 2268 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFWRADDR_G(x) (((x) >> VFWRADDR_S) & VFWRADDR_M) x 2272 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYMODE_V(x) ((x) << KEYMODE_S) x 2273 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYMODE_G(x) (((x) >> KEYMODE_S) & KEYMODE_M) x 2276 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFWREN_V(x) ((x) << VFWREN_S) x 2280 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYWREN_V(x) ((x) << KEYWREN_S) x 2285 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYWRADDR_V(x) ((x) << KEYWRADDR_S) x 2286 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYWRADDR_G(x) (((x) >> KEYWRADDR_S) & KEYWRADDR_M) x 2290 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYWRADDRX_V(x) ((x) << KEYWRADDRX_S) x 2291 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYWRADDRX_G(x) (((x) >> KEYWRADDRX_S) & KEYWRADDRX_M) x 2294 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYEXTEND_V(x) ((x) << KEYEXTEND_S) x 2299 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LKPIDXSIZE_V(x) ((x) << LKPIDXSIZE_S) x 2300 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LKPIDXSIZE_G(x) (((x) >> LKPIDXSIZE_S) & LKPIDXSIZE_M) x 2306 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ENABLEUDPHASH_V(x) ((x) << ENABLEUDPHASH_S) x 2310 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFUPEN_V(x) ((x) << VFUPEN_S) x 2314 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFVLNEX_V(x) ((x) << VFVLNEX_S) x 2318 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFPRTEN_V(x) ((x) << VFPRTEN_S) x 2322 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFCHNEN_V(x) ((x) << VFCHNEN_S) x 2327 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DEFAULTQUEUE_G(x) (((x) >> DEFAULTQUEUE_S) & DEFAULTQUEUE_M) x 2330 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFIP6TWOTUPEN_V(x) ((x) << VFIP6TWOTUPEN_S) x 2334 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFIP4FOURTUPEN_V(x) ((x) << VFIP4FOURTUPEN_S) x 2338 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFIP4TWOTUPEN_V(x) ((x) << VFIP4TWOTUPEN_S) x 2343 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define KEYINDEX_G(x) (((x) >> KEYINDEX_S) & KEYINDEX_M) x 2346 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MAPENABLE_V(x) ((x) << MAPENABLE_S) x 2350 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNENABLE_V(x) ((x) << CHNENABLE_S) x 2356 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGICMDBUSY_V(x) ((x) << DBGICMDBUSY_S) x 2360 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGICMDSTRT_V(x) ((x) << DBGICMDSTRT_S) x 2365 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGICMDMODE_V(x) ((x) << DBGICMDMODE_S) x 2371 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGICMD_V(x) ((x) << DBGICMD_S) x 2375 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DBGITID_V(x) ((x) << DBGITID_S) x 2383 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PRTENABLE_V(x) ((x) << PRTENABLE_S) x 2387 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UDPFOURTUPEN_V(x) ((x) << UDPFOURTUPEN_S) x 2391 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IP6FOURTUPEN_V(x) ((x) << IP6FOURTUPEN_S) x 2395 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IP6TWOTUPEN_V(x) ((x) << IP6TWOTUPEN_S) x 2399 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IP4FOURTUPEN_V(x) ((x) << IP4FOURTUPEN_S) x 2403 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IP4TWOTUPEN_V(x) ((x) << IP4TWOTUPEN_S) x 2408 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IVFWIDTH_V(x) ((x) << IVFWIDTH_S) x 2409 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IVFWIDTH_G(x) (((x) >> IVFWIDTH_S) & IVFWIDTH_M) x 2413 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CH1DEFAULTQUEUE_V(x) ((x) << CH1DEFAULTQUEUE_S) x 2414 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CH1DEFAULTQUEUE_G(x) (((x) >> CH1DEFAULTQUEUE_S) & CH1DEFAULTQUEUE_M) x 2418 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CH0DEFAULTQUEUE_V(x) ((x) << CH0DEFAULTQUEUE_S) x 2419 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CH0DEFAULTQUEUE_G(x) (((x) >> CH0DEFAULTQUEUE_S) & CH0DEFAULTQUEUE_M) x 2423 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VFLKPIDX_G(x) (((x) >> VFLKPIDX_S) & VFLKPIDX_M) x 2427 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_VFWRADDR_V(x) ((x) << T6_VFWRADDR_S) x 2428 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_VFWRADDR_G(x) (((x) >> T6_VFWRADDR_S) & T6_VFWRADDR_M) x 2444 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNCOUNT3_V(x) ((x) << CHNCOUNT3_S) x 2448 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNCOUNT2_V(x) ((x) << CHNCOUNT2_S) x 2452 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNCOUNT1_V(x) ((x) << CHNCOUNT1_S) x 2456 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNCOUNT0_V(x) ((x) << CHNCOUNT0_S) x 2460 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNUNDFLOW3_V(x) ((x) << CHNUNDFLOW3_S) x 2464 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNUNDFLOW2_V(x) ((x) << CHNUNDFLOW2_S) x 2468 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNUNDFLOW1_V(x) ((x) << CHNUNDFLOW1_S) x 2472 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CHNUNDFLOW0_V(x) ((x) << CHNUNDFLOW0_S) x 2476 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RSTCHN3_V(x) ((x) << RSTCHN3_S) x 2480 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RSTCHN2_V(x) ((x) << RSTCHN2_S) x 2484 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RSTCHN1_V(x) ((x) << RSTCHN1_S) x 2488 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RSTCHN0_V(x) ((x) << RSTCHN0_S) x 2492 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDVLD_V(x) ((x) << UPDVLD_S) x 2496 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define XOFF_V(x) ((x) << XOFF_S) x 2500 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDCHN3_V(x) ((x) << UPDCHN3_S) x 2504 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDCHN2_V(x) ((x) << UPDCHN2_S) x 2508 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDCHN1_V(x) ((x) << UPDCHN1_S) x 2512 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDCHN0_V(x) ((x) << UPDCHN0_S) x 2517 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEUE_V(x) ((x) << QUEUE_S) x 2518 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEUE_G(x) (((x) >> QUEUE_S) & QUEUE_M) x 2523 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MISCPERR_V(x) ((x) << MISCPERR_S) x 2528 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PKTFIFO_V(x) ((x) << PKTFIFO_S) x 2532 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FILTMEM_V(x) ((x) << FILTMEM_S) x 2537 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHSRAM_V(x) ((x) << HASHSRAM_S) x 2541 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MATCHTCAM_V(x) ((x) << MATCHTCAM_S) x 2545 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MATCHSRAM_V(x) ((x) << MATCHSRAM_S) x 2557 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VXLAN_EN_V(x) ((x) << VXLAN_EN_S) x 2562 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VXLAN_V(x) ((x) << VXLAN_S) x 2563 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VXLAN_G(x) (((x) >> VXLAN_S) & VXLAN_M) x 2568 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define GENEVE_EN_V(x) ((x) << GENEVE_EN_S) x 2573 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define GENEVE_V(x) ((x) << GENEVE_S) x 2574 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define GENEVE_G(x) (((x) >> GENEVE_S) & GENEVE_M) x 2581 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CTLREQID_V(x) ((x) << CTLREQID_S) x 2594 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VIDL_G(x) (((x) >> VIDL_S) & VIDL_M) x 2598 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATALKPTYPE_G(x) (((x) >> DATALKPTYPE_S) & DATALKPTYPE_M) x 2602 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATAPORTNUM_V(x) ((x) << DATAPORTNUM_S) x 2603 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATAPORTNUM_G(x) (((x) >> DATAPORTNUM_S) & DATAPORTNUM_M) x 2607 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATALKPTYPE_V(x) ((x) << DATALKPTYPE_S) x 2608 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATALKPTYPE_G(x) (((x) >> DATALKPTYPE_S) & DATALKPTYPE_M) x 2611 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATADIPHIT_V(x) ((x) << DATADIPHIT_S) x 2615 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATAVIDH2_V(x) ((x) << DATAVIDH2_S) x 2620 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DATAVIDH1_G(x) (((x) >> DATAVIDH1_S) & DATAVIDH1_M) x 2628 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define USED_G(x) (((x) >> USED_S) & USED_M) x 2632 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ALLOC_G(x) (((x) >> ALLOC_S) & ALLOC_M) x 2636 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T5_USED_G(x) (((x) >> T5_USED_S) & T5_USED_M) x 2640 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T5_ALLOC_G(x) (((x) >> T5_ALLOC_S) & T5_ALLOC_M) x 2644 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define DMACH_G(x) (((x) >> DMACH_S) & DMACH_M) x 2650 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CTLCMDTYPE_V(x) ((x) << CTLCMDTYPE_S) x 2654 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CTLTCAMSEL_V(x) ((x) << CTLTCAMSEL_S) x 2657 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CTLTCAMINDEX_V(x) ((x) << CTLTCAMINDEX_S) x 2660 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CTLXYBITSEL_V(x) ((x) << CTLXYBITSEL_S) x 2674 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_SRAM_PRIO3_G(x) (((x) >> T6_SRAM_PRIO3_S) & T6_SRAM_PRIO3_M) x 2678 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_SRAM_PRIO2_G(x) (((x) >> T6_SRAM_PRIO2_S) & T6_SRAM_PRIO2_M) x 2682 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_SRAM_PRIO1_G(x) (((x) >> T6_SRAM_PRIO1_S) & T6_SRAM_PRIO1_M) x 2686 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_SRAM_PRIO0_G(x) (((x) >> T6_SRAM_PRIO0_S) & T6_SRAM_PRIO0_M) x 2689 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_SRAM_VLD_V(x) ((x) << T6_SRAM_VLD_S) x 2693 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_REPLICATE_V(x) ((x) << T6_REPLICATE_S) x 2698 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_PF_G(x) (((x) >> T6_PF_S) & T6_PF_M) x 2701 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_VF_VALID_V(x) ((x) << T6_VF_VALID_S) x 2706 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_VF_G(x) (((x) >> T6_VF_S) & T6_VF_M) x 2719 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define REPLICATE_V(x) ((x) << REPLICATE_S) x 2724 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PF_G(x) (((x) >> PF_S) & PF_M) x 2727 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VF_VALID_V(x) ((x) << VF_VALID_S) x 2732 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define VF_G(x) (((x) >> VF_S) & VF_M) x 2736 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SRAM_PRIO3_G(x) (((x) >> SRAM_PRIO3_S) & SRAM_PRIO3_M) x 2740 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SRAM_PRIO2_G(x) (((x) >> SRAM_PRIO2_S) & SRAM_PRIO2_M) x 2744 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SRAM_PRIO1_G(x) (((x) >> SRAM_PRIO1_S) & SRAM_PRIO1_M) x 2748 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SRAM_PRIO0_G(x) (((x) >> SRAM_PRIO0_S) & SRAM_PRIO0_M) x 2751 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SRAM_VLD_V(x) ((x) << SRAM_VLD_S) x 2756 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PORTMAP_G(x) (((x) >> PORTMAP_S) & PORTMAP_M) x 2761 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIM_OP_MAP_PERR_V(x) ((x) << CIM_OP_MAP_PERR_S) x 2765 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIM_OVFL_ERROR_V(x) ((x) << CIM_OVFL_ERROR_S) x 2769 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TP_FRAMING_ERROR_V(x) ((x) << TP_FRAMING_ERROR_S) x 2773 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGE_FRAMING_ERROR_V(x) ((x) << SGE_FRAMING_ERROR_S) x 2777 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIM_FRAMING_ERROR_V(x) ((x) << CIM_FRAMING_ERROR_S) x 2781 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ZERO_SWITCH_ERROR_V(x) ((x) << ZERO_SWITCH_ERROR_S) x 2787 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSTTXFIFOPARINT_V(x) ((x) << MSTTXFIFOPARINT_S) x 2791 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MSTRXFIFOPARINT_V(x) ((x) << MSTRXFIFOPARINT_S) x 2795 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SLVFIFOPARINT_V(x) ((x) << SLVFIFOPARINT_S) x 2822 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HPZ3_V(x) ((x) << HPZ3_S) x 2825 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HPZ2_V(x) ((x) << HPZ2_S) x 2828 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HPZ1_V(x) ((x) << HPZ1_S) x 2831 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HPZ0_V(x) ((x) << HPZ0_S) x 2840 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SF_BUSY_V(x) ((x) << SF_BUSY_S) x 2844 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SF_LOCK_V(x) ((x) << SF_LOCK_S) x 2848 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SF_CONT_V(x) ((x) << SF_CONT_S) x 2852 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BYTECNT_V(x) ((x) << BYTECNT_S) x 2855 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OP_V(x) ((x) << OP_S) x 2861 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PFSW_V(x) ((x) << PFSW_S) x 2865 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PFCIM_V(x) ((x) << PFCIM_S) x 2875 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SOURCEPF_G(x) (((x) >> SOURCEPF_S) & SOURCEPF_M) x 2879 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_SOURCEPF_G(x) (((x) >> T6_SOURCEPF_S) & T6_SOURCEPF_M) x 2884 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ULP_TX_V(x) ((x) << ULP_TX_S) x 2888 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SGE_V(x) ((x) << SGE_S) x 2892 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CPL_SWITCH_V(x) ((x) << CPL_SWITCH_S) x 2896 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ULP_RX_V(x) ((x) << ULP_RX_S) x 2900 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PM_RX_V(x) ((x) << PM_RX_S) x 2904 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PM_TX_V(x) ((x) << PM_TX_S) x 2908 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MA_V(x) ((x) << MA_S) x 2912 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TP_V(x) ((x) << TP_S) x 2916 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LE_V(x) ((x) << LE_S) x 2920 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDC1_V(x) ((x) << EDC1_S) x 2924 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EDC0_V(x) ((x) << EDC0_S) x 2928 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MC_V(x) ((x) << MC_S) x 2932 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PCIE_V(x) ((x) << PCIE_S) x 2936 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define XGMAC_KR1_V(x) ((x) << XGMAC_KR1_S) x 2940 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define XGMAC_KR0_V(x) ((x) << XGMAC_KR0_S) x 2944 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define XGMAC1_V(x) ((x) << XGMAC1_S) x 2948 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define XGMAC0_V(x) ((x) << XGMAC0_S) x 2952 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SMB_V(x) ((x) << SMB_S) x 2956 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SF_V(x) ((x) << SF_S) x 2960 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PL_V(x) ((x) << PL_S) x 2964 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define NCSI_V(x) ((x) << NCSI_S) x 2968 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MPS_V(x) ((x) << MPS_S) x 2972 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIM_V(x) ((x) << CIM_S) x 2976 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MC1_V(x) ((x) << MC1_S) x 2984 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIORST_V(x) ((x) << PIORST_S) x 2988 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PIORSTMODE_V(x) ((x) << PIORSTMODE_S) x 2994 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define FATALPERR_V(x) ((x) << FATALPERR_S) x 2998 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PERRVFID_V(x) ((x) << PERRVFID_S) x 3005 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define REV_V(x) ((x) << REV_S) x 3006 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define REV_G(x) (((x) >> REV_S) & REV_M) x 3009 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_UNKNOWNCMD_V(x) ((x) << T6_UNKNOWNCMD_S) x 3013 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_LIP0_V(x) ((x) << T6_LIP0_S) x 3017 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define T6_LIPMISS_V(x) ((x) << T6_LIPMISS_S) x 3033 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHTIDSIZE_G(x) (((x) >> HASHTIDSIZE_S) & HASHTIDSIZE_M) x 3043 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASHEN_V(x) ((x) << HASHEN_S) x 3047 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ASLIPCOMPEN_V(x) ((x) << ASLIPCOMPEN_S) x 3051 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define REQQPARERR_V(x) ((x) << REQQPARERR_S) x 3055 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UNKNOWNCMD_V(x) ((x) << UNKNOWNCMD_S) x 3059 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PARITYERR_V(x) ((x) << PARITYERR_S) x 3063 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LIPMISS_V(x) ((x) << LIPMISS_S) x 3067 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LIP0_V(x) ((x) << LIP0_S) x 3072 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define BASEADDR_G(x) (((x) >> BASEADDR_S) & BASEADDR_M) x 3075 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TCAMINTPERR_V(x) ((x) << TCAMINTPERR_S) x 3079 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define SSRAMINTPERR_V(x) ((x) << SSRAMINTPERR_S) x 3086 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TCAM_ACTV_HIT_V(x) ((x) << TCAM_ACTV_HIT_S) x 3087 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TCAM_ACTV_HIT_G(x) (((x) >> TCAM_ACTV_HIT_S) & TCAM_ACTV_HIT_M) x 3093 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASH_ACTV_HIT_V(x) ((x) << HASH_ACTV_HIT_S) x 3094 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HASH_ACTV_HIT_G(x) (((x) >> HASH_ACTV_HIT_S) & HASH_ACTV_HIT_M) x 3102 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIM_DM_PRTY_ERR_V(x) ((x) << CIM_DM_PRTY_ERR_S) x 3106 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MPS_DM_PRTY_ERR_V(x) ((x) << MPS_DM_PRTY_ERR_S) x 3110 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TXFIFO_PRTY_ERR_V(x) ((x) << TXFIFO_PRTY_ERR_S) x 3114 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define RXFIFO_PRTY_ERR_V(x) ((x) << RXFIFO_PRTY_ERR_S) x 3120 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PATEN_V(x) ((x) << PATEN_S) x 3124 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define MAGICEN_V(x) ((x) << MAGICEN_S) x 3137 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define EPIOWR_V(x) ((x) << EPIOWR_S) x 3141 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define ADDRESS_V(x) ((x) << ADDRESS_S) x 3152 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TX_MOD_QUEUE_REQ_MAP_V(x) ((x) << TX_MOD_QUEUE_REQ_MAP_S) x 3155 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TX_MODQ_WEIGHT3_V(x) ((x) << TX_MODQ_WEIGHT3_S) x 3158 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TX_MODQ_WEIGHT2_V(x) ((x) << TX_MODQ_WEIGHT2_S) x 3161 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TX_MODQ_WEIGHT1_V(x) ((x) << TX_MODQ_WEIGHT1_S) x 3164 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define TX_MODQ_WEIGHT0_V(x) ((x) << TX_MODQ_WEIGHT0_S) x 3214 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTBUSY_V(x) ((x) << HOSTBUSY_S) x 3218 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define HOSTWRITE_V(x) ((x) << HOSTWRITE_S) x 3225 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQDBGADDR_V(x) ((x) << IBQDBGADDR_S) x 3226 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQDBGADDR_G(x) (((x) >> IBQDBGADDR_S) & IBQDBGADDR_M) x 3229 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQDBGBUSY_V(x) ((x) << IBQDBGBUSY_S) x 3233 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQDBGEN_V(x) ((x) << IBQDBGEN_S) x 3240 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQDBGADDR_V(x) ((x) << OBQDBGADDR_S) x 3241 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQDBGADDR_G(x) (((x) >> OBQDBGADDR_S) & OBQDBGADDR_M) x 3244 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQDBGBUSY_V(x) ((x) << OBQDBGBUSY_S) x 3248 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQDBGEN_V(x) ((x) << OBQDBGEN_S) x 3258 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define POLADBGRDPTR_V(x) ((x) << POLADBGRDPTR_S) x 3262 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define POLADBGWRPTR_G(x) (((x) >> POLADBGWRPTR_S) & POLADBGWRPTR_M) x 3266 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PILADBGRDPTR_V(x) ((x) << PILADBGRDPTR_S) x 3270 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PILADBGWRPTR_G(x) (((x) >> PILADBGWRPTR_S) & PILADBGWRPTR_M) x 3273 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define LADBGEN_V(x) ((x) << LADBGEN_S) x 3282 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDBGLARDEN_V(x) ((x) << UPDBGLARDEN_S) x 3286 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDBGLAEN_V(x) ((x) << UPDBGLAEN_S) x 3291 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDBGLARDPTR_V(x) ((x) << UPDBGLARDPTR_S) x 3295 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDBGLAWRPTR_G(x) (((x) >> UPDBGLAWRPTR_S) & UPDBGLAWRPTR_M) x 3298 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define UPDBGLACAPTPCONLY_V(x) ((x) << UPDBGLACAPTPCONLY_S) x 3306 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIMQSIZE_G(x) (((x) >> CIMQSIZE_S) & CIMQSIZE_M) x 3310 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define CIMQBASE_G(x) (((x) >> CIMQBASE_S) & CIMQBASE_M) x 3314 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEFULLTHRSH_G(x) (((x) >> QUEFULLTHRSH_S) & QUEFULLTHRSH_M) x 3323 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQRDADDR_G(x) (((x) >> IBQRDADDR_S) & IBQRDADDR_M) x 3327 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQWRADDR_G(x) (((x) >> IBQWRADDR_S) & IBQWRADDR_M) x 3331 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUERDADDR_G(x) (((x) >> QUERDADDR_S) & QUERDADDR_M) x 3335 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEREMFLITS_G(x) (((x) >> QUEREMFLITS_S) & QUEREMFLITS_M) x 3339 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUEEOPCNT_G(x) (((x) >> QUEEOPCNT_S) & QUEEOPCNT_M) x 3343 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUESOPCNT_G(x) (((x) >> QUESOPCNT_S) & QUESOPCNT_M) x 3346 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define OBQSELECT_V(x) ((x) << OBQSELECT_S) x 3350 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define IBQSELECT_V(x) ((x) << IBQSELECT_S) x 3354 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define QUENUMSELECT_V(x) ((x) << QUENUMSELECT_S) x 41 drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h #define TCB_SMAC_SEL_V(x) ((x) << TCB_SMAC_SEL_S) x 46 drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h #define TCB_T_FLAGS_V(x) ((__u64)(x) << TCB_T_FLAGS_S) x 51 drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h #define TCB_RQ_START_V(x) ((x) << TCB_RQ_START_S) x 60 drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h #define TCB_RSS_INFO_V(x) ((x) << TCB_RSS_INFO_S) x 65 drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h #define TCB_TIMESTAMP_V(x) ((x) << TCB_TIMESTAMP_S) x 70 drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h #define TCB_RTT_TS_RECENT_AGE_V(x) ((x) << TCB_RTT_TS_RECENT_AGE_S) x 79 drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h #define TF_RX_PDU_OUT_V(x) ((__u64)(x) << TF_RX_PDU_OUT_S) x 96 drivers/net/ethernet/chelsio/cxgb4/t4_values.h #define CONMCTXT_CNGTPMODE_V(x) ((x) << CONMCTXT_CNGTPMODE_S) x 98 drivers/net/ethernet/chelsio/cxgb4/t4_values.h #define CONMCTXT_CNGCHMAP_V(x) ((x) << CONMCTXT_CNGCHMAP_S) x 150 drivers/net/ethernet/chelsio/cxgb4/t4_values.h #define FT_VLAN_VLD_V(x) ((x) << FT_VLAN_VLD_S) x 154 drivers/net/ethernet/chelsio/cxgb4/t4_values.h #define FT_VNID_ID_VF_V(x) ((x) << FT_VNID_ID_VF_S) x 157 drivers/net/ethernet/chelsio/cxgb4/t4_values.h #define FT_VNID_ID_PF_V(x) ((x) << FT_VNID_ID_PF_S) x 160 drivers/net/ethernet/chelsio/cxgb4/t4_values.h #define FT_VNID_ID_VLD_V(x) ((x) << FT_VNID_ID_VLD_S) x 122 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_OP_V(x) ((x) << FW_WR_OP_S) x 123 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_OP_G(x) (((x) >> FW_WR_OP_S) & FW_WR_OP_M) x 127 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_ATOMIC_V(x) ((x) << FW_WR_ATOMIC_S) x 133 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_FLUSH_V(x) ((x) << FW_WR_FLUSH_S) x 137 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_COMPL_V(x) ((x) << FW_WR_COMPL_S) x 143 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_IMMDLEN_V(x) ((x) << FW_WR_IMMDLEN_S) x 147 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_EQUIQ_V(x) ((x) << FW_WR_EQUIQ_S) x 152 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_EQUEQ_V(x) ((x) << FW_WR_EQUEQ_S) x 157 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_FLOWID_V(x) ((x) << FW_WR_FLOWID_S) x 161 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_WR_LEN16_V(x) ((x) << FW_WR_LEN16_S) x 254 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_TID_V(x) ((x) << FW_FILTER_WR_TID_S) x 255 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_TID_G(x) \ x 256 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_TID_S) & FW_FILTER_WR_TID_M) x 260 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RQTYPE_V(x) ((x) << FW_FILTER_WR_RQTYPE_S) x 261 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RQTYPE_G(x) \ x 262 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_RQTYPE_S) & FW_FILTER_WR_RQTYPE_M) x 267 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_NOREPLY_V(x) ((x) << FW_FILTER_WR_NOREPLY_S) x 268 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_NOREPLY_G(x) \ x 269 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_NOREPLY_S) & FW_FILTER_WR_NOREPLY_M) x 274 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_IQ_V(x) ((x) << FW_FILTER_WR_IQ_S) x 275 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_IQ_G(x) \ x 276 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_IQ_S) & FW_FILTER_WR_IQ_M) x 280 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DEL_FILTER_V(x) ((x) << FW_FILTER_WR_DEL_FILTER_S) x 281 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DEL_FILTER_G(x) \ x 282 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_DEL_FILTER_S) & FW_FILTER_WR_DEL_FILTER_M) x 287 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RPTTID_V(x) ((x) << FW_FILTER_WR_RPTTID_S) x 288 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RPTTID_G(x) \ x 289 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_RPTTID_S) & FW_FILTER_WR_RPTTID_M) x 294 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DROP_V(x) ((x) << FW_FILTER_WR_DROP_S) x 295 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DROP_G(x) \ x 296 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_DROP_S) & FW_FILTER_WR_DROP_M) x 301 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DIRSTEER_V(x) ((x) << FW_FILTER_WR_DIRSTEER_S) x 302 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DIRSTEER_G(x) \ x 303 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_DIRSTEER_S) & FW_FILTER_WR_DIRSTEER_M) x 308 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MASKHASH_V(x) ((x) << FW_FILTER_WR_MASKHASH_S) x 309 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MASKHASH_G(x) \ x 310 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_MASKHASH_S) & FW_FILTER_WR_MASKHASH_M) x 315 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DIRSTEERHASH_V(x) ((x) << FW_FILTER_WR_DIRSTEERHASH_S) x 316 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DIRSTEERHASH_G(x) \ x 317 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_DIRSTEERHASH_S) & FW_FILTER_WR_DIRSTEERHASH_M) x 322 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_LPBK_V(x) ((x) << FW_FILTER_WR_LPBK_S) x 323 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_LPBK_G(x) \ x 324 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_LPBK_S) & FW_FILTER_WR_LPBK_M) x 329 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DMAC_V(x) ((x) << FW_FILTER_WR_DMAC_S) x 330 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_DMAC_G(x) \ x 331 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_DMAC_S) & FW_FILTER_WR_DMAC_M) x 336 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_SMAC_V(x) ((x) << FW_FILTER_WR_SMAC_S) x 337 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_SMAC_G(x) \ x 338 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_SMAC_S) & FW_FILTER_WR_SMAC_M) x 343 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_INSVLAN_V(x) ((x) << FW_FILTER_WR_INSVLAN_S) x 344 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_INSVLAN_G(x) \ x 345 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_INSVLAN_S) & FW_FILTER_WR_INSVLAN_M) x 350 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RMVLAN_V(x) ((x) << FW_FILTER_WR_RMVLAN_S) x 351 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RMVLAN_G(x) \ x 352 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_RMVLAN_S) & FW_FILTER_WR_RMVLAN_M) x 357 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_HITCNTS_V(x) ((x) << FW_FILTER_WR_HITCNTS_S) x 358 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_HITCNTS_G(x) \ x 359 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_HITCNTS_S) & FW_FILTER_WR_HITCNTS_M) x 364 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_TXCHAN_V(x) ((x) << FW_FILTER_WR_TXCHAN_S) x 365 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_TXCHAN_G(x) \ x 366 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_TXCHAN_S) & FW_FILTER_WR_TXCHAN_M) x 370 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_PRIO_V(x) ((x) << FW_FILTER_WR_PRIO_S) x 371 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_PRIO_G(x) \ x 372 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_PRIO_S) & FW_FILTER_WR_PRIO_M) x 377 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_L2TIX_V(x) ((x) << FW_FILTER_WR_L2TIX_S) x 378 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_L2TIX_G(x) \ x 379 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_L2TIX_S) & FW_FILTER_WR_L2TIX_M) x 383 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FRAG_V(x) ((x) << FW_FILTER_WR_FRAG_S) x 384 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FRAG_G(x) \ x 385 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_FRAG_S) & FW_FILTER_WR_FRAG_M) x 390 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FRAGM_V(x) ((x) << FW_FILTER_WR_FRAGM_S) x 391 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FRAGM_G(x) \ x 392 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_FRAGM_S) & FW_FILTER_WR_FRAGM_M) x 397 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_IVLAN_VLD_V(x) ((x) << FW_FILTER_WR_IVLAN_VLD_S) x 398 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_IVLAN_VLD_G(x) \ x 399 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_IVLAN_VLD_S) & FW_FILTER_WR_IVLAN_VLD_M) x 404 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_OVLAN_VLD_V(x) ((x) << FW_FILTER_WR_OVLAN_VLD_S) x 405 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_OVLAN_VLD_G(x) \ x 406 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_OVLAN_VLD_S) & FW_FILTER_WR_OVLAN_VLD_M) x 411 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_IVLAN_VLDM_V(x) ((x) << FW_FILTER_WR_IVLAN_VLDM_S) x 412 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_IVLAN_VLDM_G(x) \ x 413 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_IVLAN_VLDM_S) & FW_FILTER_WR_IVLAN_VLDM_M) x 418 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_OVLAN_VLDM_V(x) ((x) << FW_FILTER_WR_OVLAN_VLDM_S) x 419 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_OVLAN_VLDM_G(x) \ x 420 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_OVLAN_VLDM_S) & FW_FILTER_WR_OVLAN_VLDM_M) x 425 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RX_CHAN_V(x) ((x) << FW_FILTER_WR_RX_CHAN_S) x 426 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RX_CHAN_G(x) \ x 427 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_RX_CHAN_S) & FW_FILTER_WR_RX_CHAN_M) x 432 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RX_RPL_IQ_V(x) ((x) << FW_FILTER_WR_RX_RPL_IQ_S) x 433 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_RX_RPL_IQ_G(x) \ x 434 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_RX_RPL_IQ_S) & FW_FILTER_WR_RX_RPL_IQ_M) x 438 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_FILTER_TYPE_V(x) ((x) << FW_FILTER2_WR_FILTER_TYPE_S) x 439 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_FILTER_TYPE_G(x) \ x 440 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER2_WR_FILTER_TYPE_S) & FW_FILTER2_WR_FILTER_TYPE_M) x 445 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_NATMODE_V(x) ((x) << FW_FILTER2_WR_NATMODE_S) x 446 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_NATMODE_G(x) \ x 447 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER2_WR_NATMODE_S) & FW_FILTER2_WR_NATMODE_M) x 451 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_NATFLAGCHECK_V(x) ((x) << FW_FILTER2_WR_NATFLAGCHECK_S) x 452 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_NATFLAGCHECK_G(x) \ x 453 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER2_WR_NATFLAGCHECK_S) & FW_FILTER2_WR_NATFLAGCHECK_M) x 458 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_ULP_TYPE_V(x) ((x) << FW_FILTER2_WR_ULP_TYPE_S) x 459 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER2_WR_ULP_TYPE_G(x) \ x 460 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER2_WR_ULP_TYPE_S) & FW_FILTER2_WR_ULP_TYPE_M) x 464 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MACI_V(x) ((x) << FW_FILTER_WR_MACI_S) x 465 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MACI_G(x) \ x 466 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_MACI_S) & FW_FILTER_WR_MACI_M) x 470 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MACIM_V(x) ((x) << FW_FILTER_WR_MACIM_S) x 471 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MACIM_G(x) \ x 472 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_MACIM_S) & FW_FILTER_WR_MACIM_M) x 476 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FCOE_V(x) ((x) << FW_FILTER_WR_FCOE_S) x 477 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FCOE_G(x) \ x 478 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_FCOE_S) & FW_FILTER_WR_FCOE_M) x 483 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FCOEM_V(x) ((x) << FW_FILTER_WR_FCOEM_S) x 484 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_FCOEM_G(x) \ x 485 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_FCOEM_S) & FW_FILTER_WR_FCOEM_M) x 490 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_PORT_V(x) ((x) << FW_FILTER_WR_PORT_S) x 491 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_PORT_G(x) \ x 492 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_PORT_S) & FW_FILTER_WR_PORT_M) x 496 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_PORTM_V(x) ((x) << FW_FILTER_WR_PORTM_S) x 497 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_PORTM_G(x) \ x 498 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_PORTM_S) & FW_FILTER_WR_PORTM_M) x 502 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MATCHTYPE_V(x) ((x) << FW_FILTER_WR_MATCHTYPE_S) x 503 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MATCHTYPE_G(x) \ x 504 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_MATCHTYPE_S) & FW_FILTER_WR_MATCHTYPE_M) x 508 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MATCHTYPEM_V(x) ((x) << FW_FILTER_WR_MATCHTYPEM_S) x 509 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FILTER_WR_MATCHTYPEM_G(x) \ x 510 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_FILTER_WR_MATCHTYPEM_S) & FW_FILTER_WR_MATCHTYPEM_M) x 520 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ULPTX_WR_DATA_V(x) ((x) << FW_ULPTX_WR_DATA_S) x 521 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ULPTX_WR_DATA_G(x) \ x 522 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_ULPTX_WR_DATA_S) & FW_ULPTX_WR_DATA_M) x 581 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_VERSION_V(x) \ x 582 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_OFLD_CONNECTION_WR_VERSION_S) x 583 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_VERSION_G(x) \ x 584 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_OFLD_CONNECTION_WR_VERSION_S) & \ x 591 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_CPL_V(x) ((x) << FW_OFLD_CONNECTION_WR_CPL_S) x 592 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_CPL_G(x) \ x 593 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_OFLD_CONNECTION_WR_CPL_S) & FW_OFLD_CONNECTION_WR_CPL_M) x 598 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_T_STATE_V(x) \ x 599 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_OFLD_CONNECTION_WR_T_STATE_S) x 600 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_T_STATE_G(x) \ x 601 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_OFLD_CONNECTION_WR_T_STATE_S) & \ x 606 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_RCV_SCALE_V(x) \ x 607 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_OFLD_CONNECTION_WR_RCV_SCALE_S) x 608 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_RCV_SCALE_G(x) \ x 609 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_OFLD_CONNECTION_WR_RCV_SCALE_S) & \ x 614 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_ASTID_V(x) \ x 615 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_OFLD_CONNECTION_WR_ASTID_S) x 616 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_ASTID_G(x) \ x 617 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_OFLD_CONNECTION_WR_ASTID_S) & FW_OFLD_CONNECTION_WR_ASTID_M) x 621 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_CPLRXDATAACK_V(x) \ x 622 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_OFLD_CONNECTION_WR_CPLRXDATAACK_S) x 623 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_CPLRXDATAACK_G(x) \ x 624 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_OFLD_CONNECTION_WR_CPLRXDATAACK_S) & \ x 631 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_V(x) \ x 632 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_S) x 633 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_G(x) \ x 634 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_S) & \ x 696 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_FLOWC_WR_NPARAMS_V(x) ((x) << FW_FLOWC_WR_NPARAMS_S) x 706 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_ALIGNPLD_V(x) ((x) << FW_OFLD_TX_DATA_WR_ALIGNPLD_S) x 710 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_SHOVE_V(x) ((x) << FW_OFLD_TX_DATA_WR_SHOVE_S) x 714 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_TUNNEL_V(x) ((x) << FW_OFLD_TX_DATA_WR_TUNNEL_S) x 717 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_SAVE_V(x) ((x) << FW_OFLD_TX_DATA_WR_SAVE_S) x 720 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_FLUSH_V(x) ((x) << FW_OFLD_TX_DATA_WR_FLUSH_S) x 724 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_URGENT_V(x) ((x) << FW_OFLD_TX_DATA_WR_URGENT_S) x 727 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_MORE_V(x) ((x) << FW_OFLD_TX_DATA_WR_MORE_S) x 730 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_ULPMODE_V(x) ((x) << FW_OFLD_TX_DATA_WR_ULPMODE_S) x 733 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_OFLD_TX_DATA_WR_ULPSUBMODE_V(x) \ x 734 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_OFLD_TX_DATA_WR_ULPSUBMODE_S) x 743 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_WR_DMA_V(x) ((x) << FW_CMD_WR_DMA_S) x 826 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_OP_V(x) ((x) << FW_CMD_OP_S) x 827 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_OP_G(x) (((x) >> FW_CMD_OP_S) & FW_CMD_OP_M) x 830 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_REQUEST_V(x) ((x) << FW_CMD_REQUEST_S) x 834 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_READ_V(x) ((x) << FW_CMD_READ_S) x 838 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_WRITE_V(x) ((x) << FW_CMD_WRITE_S) x 842 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_EXEC_V(x) ((x) << FW_CMD_EXEC_S) x 846 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_RAMASK_V(x) ((x) << FW_CMD_RAMASK_S) x 850 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_RETVAL_V(x) ((x) << FW_CMD_RETVAL_S) x 851 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_RETVAL_G(x) (((x) >> FW_CMD_RETVAL_S) & FW_CMD_RETVAL_M) x 854 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CMD_LEN16_V(x) ((x) << FW_CMD_LEN16_S) x 986 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_ADDRSPACE_V(x) ((x) << FW_LDST_CMD_ADDRSPACE_S) x 989 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_MSG_V(x) ((x) << FW_LDST_CMD_MSG_S) x 992 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_CTXTFLUSH_V(x) ((x) << FW_LDST_CMD_CTXTFLUSH_S) x 996 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_PADDR_V(x) ((x) << FW_LDST_CMD_PADDR_S) x 999 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_MMD_V(x) ((x) << FW_LDST_CMD_MMD_S) x 1002 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_FID_V(x) ((x) << FW_LDST_CMD_FID_S) x 1005 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_IDX_V(x) ((x) << FW_LDST_CMD_IDX_S) x 1008 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_RPLCPF_V(x) ((x) << FW_LDST_CMD_RPLCPF_S) x 1011 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_LC_V(x) ((x) << FW_LDST_CMD_LC_S) x 1015 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_FN_V(x) ((x) << FW_LDST_CMD_FN_S) x 1018 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_LDST_CMD_NACCESS_V(x) ((x) << FW_LDST_CMD_NACCESS_S) x 1029 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RESET_CMD_HALT_V(x) ((x) << FW_RESET_CMD_HALT_S) x 1030 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RESET_CMD_HALT_G(x) \ x 1031 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_RESET_CMD_HALT_S) & FW_RESET_CMD_HALT_M) x 1046 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_ERR_V(x) ((x) << FW_HELLO_CMD_ERR_S) x 1050 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_INIT_V(x) ((x) << FW_HELLO_CMD_INIT_S) x 1054 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_MASTERDIS_V(x) ((x) << FW_HELLO_CMD_MASTERDIS_S) x 1057 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_MASTERFORCE_V(x) ((x) << FW_HELLO_CMD_MASTERFORCE_S) x 1061 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_MBMASTER_V(x) ((x) << FW_HELLO_CMD_MBMASTER_S) x 1062 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_MBMASTER_G(x) \ x 1063 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HELLO_CMD_MBMASTER_S) & FW_HELLO_CMD_MBMASTER_M) x 1066 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_MBASYNCNOTINT_V(x) ((x) << FW_HELLO_CMD_MBASYNCNOTINT_S) x 1069 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_MBASYNCNOT_V(x) ((x) << FW_HELLO_CMD_MBASYNCNOT_S) x 1072 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_STAGE_V(x) ((x) << FW_HELLO_CMD_STAGE_S) x 1075 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HELLO_CMD_CLEARINIT_V(x) ((x) << FW_HELLO_CMD_CLEARINIT_S) x 1198 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CAPS_CONFIG_CMD_CFVALID_V(x) ((x) << FW_CAPS_CONFIG_CMD_CFVALID_S) x 1202 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CAPS_CONFIG_CMD_MEMTYPE_CF_V(x) \ x 1203 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CAPS_CONFIG_CMD_MEMTYPE_CF_S) x 1206 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_V(x) \ x 1207 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_S) x 1227 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_FILTER_MODE_V(x) \ x 1228 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_PARAMS_PARAM_FILTER_MODE_S) x 1229 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_FILTER_MODE_G(x) \ x 1230 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PARAMS_PARAM_FILTER_MODE_S) & \ x 1235 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_FILTER_MASK_V(x) \ x 1236 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_PARAMS_PARAM_FILTER_MASK_S) x 1237 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_FILTER_MASK_G(x) \ x 1238 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PARAMS_PARAM_FILTER_MASK_S) & \ x 1384 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_MNEM_V(x) ((x) << FW_PARAMS_MNEM_S) x 1387 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_X_V(x) ((x) << FW_PARAMS_PARAM_X_S) x 1391 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_Y_V(x) ((x) << FW_PARAMS_PARAM_Y_S) x 1392 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_Y_G(x) (((x) >> FW_PARAMS_PARAM_Y_S) &\ x 1397 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_Z_V(x) ((x) << FW_PARAMS_PARAM_Z_S) x 1398 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_Z_G(x) (((x) >> FW_PARAMS_PARAM_Z_S) &\ x 1402 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_XYZ_V(x) ((x) << FW_PARAMS_PARAM_XYZ_S) x 1405 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_PARAM_YZ_V(x) ((x) << FW_PARAMS_PARAM_YZ_S) x 1417 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_CMD_PFN_V(x) ((x) << FW_PARAMS_CMD_PFN_S) x 1420 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PARAMS_CMD_VFN_V(x) ((x) << FW_PARAMS_CMD_VFN_S) x 1435 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_PFN_V(x) ((x) << FW_PFVF_CMD_PFN_S) x 1438 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_VFN_V(x) ((x) << FW_PFVF_CMD_VFN_S) x 1442 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NIQFLINT_V(x) ((x) << FW_PFVF_CMD_NIQFLINT_S) x 1443 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NIQFLINT_G(x) \ x 1444 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_NIQFLINT_S) & FW_PFVF_CMD_NIQFLINT_M) x 1448 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NIQ_V(x) ((x) << FW_PFVF_CMD_NIQ_S) x 1449 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NIQ_G(x) \ x 1450 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_NIQ_S) & FW_PFVF_CMD_NIQ_M) x 1454 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_TYPE_V(x) ((x) << FW_PFVF_CMD_TYPE_S) x 1455 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_TYPE_G(x) \ x 1456 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_TYPE_S) & FW_PFVF_CMD_TYPE_M) x 1461 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_CMASK_V(x) ((x) << FW_PFVF_CMD_CMASK_S) x 1462 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_CMASK_G(x) \ x 1463 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_CMASK_S) & FW_PFVF_CMD_CMASK_M) x 1467 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_PMASK_V(x) ((x) << FW_PFVF_CMD_PMASK_S) x 1468 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_PMASK_G(x) \ x 1469 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_PMASK_S) & FW_PFVF_CMD_PMASK_M) x 1473 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NEQ_V(x) ((x) << FW_PFVF_CMD_NEQ_S) x 1474 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NEQ_G(x) \ x 1475 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_NEQ_S) & FW_PFVF_CMD_NEQ_M) x 1479 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_TC_V(x) ((x) << FW_PFVF_CMD_TC_S) x 1480 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_TC_G(x) (((x) >> FW_PFVF_CMD_TC_S) & FW_PFVF_CMD_TC_M) x 1484 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NVI_V(x) ((x) << FW_PFVF_CMD_NVI_S) x 1485 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NVI_G(x) (((x) >> FW_PFVF_CMD_NVI_S) & FW_PFVF_CMD_NVI_M) x 1489 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NEXACTF_V(x) ((x) << FW_PFVF_CMD_NEXACTF_S) x 1490 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NEXACTF_G(x) \ x 1491 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_NEXACTF_S) & FW_PFVF_CMD_NEXACTF_M) x 1495 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_R_CAPS_V(x) ((x) << FW_PFVF_CMD_R_CAPS_S) x 1496 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_R_CAPS_G(x) \ x 1497 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_R_CAPS_S) & FW_PFVF_CMD_R_CAPS_M) x 1501 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_WX_CAPS_V(x) ((x) << FW_PFVF_CMD_WX_CAPS_S) x 1502 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_WX_CAPS_G(x) \ x 1503 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_WX_CAPS_S) & FW_PFVF_CMD_WX_CAPS_M) x 1507 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NETHCTRL_V(x) ((x) << FW_PFVF_CMD_NETHCTRL_S) x 1508 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PFVF_CMD_NETHCTRL_G(x) \ x 1509 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PFVF_CMD_NETHCTRL_S) & FW_PFVF_CMD_NETHCTRL_M) x 1544 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_PFN_V(x) ((x) << FW_IQ_CMD_PFN_S) x 1547 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_VFN_V(x) ((x) << FW_IQ_CMD_VFN_S) x 1550 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_ALLOC_V(x) ((x) << FW_IQ_CMD_ALLOC_S) x 1554 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FREE_V(x) ((x) << FW_IQ_CMD_FREE_S) x 1558 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_MODIFY_V(x) ((x) << FW_IQ_CMD_MODIFY_S) x 1562 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQSTART_V(x) ((x) << FW_IQ_CMD_IQSTART_S) x 1566 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQSTOP_V(x) ((x) << FW_IQ_CMD_IQSTOP_S) x 1570 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_TYPE_V(x) ((x) << FW_IQ_CMD_TYPE_S) x 1573 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQASYNCH_V(x) ((x) << FW_IQ_CMD_IQASYNCH_S) x 1576 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_VIID_V(x) ((x) << FW_IQ_CMD_VIID_S) x 1579 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQANDST_V(x) ((x) << FW_IQ_CMD_IQANDST_S) x 1582 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQANUS_V(x) ((x) << FW_IQ_CMD_IQANUS_S) x 1585 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQANUD_V(x) ((x) << FW_IQ_CMD_IQANUD_S) x 1588 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQANDSTINDEX_V(x) ((x) << FW_IQ_CMD_IQANDSTINDEX_S) x 1591 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQDROPRSS_V(x) ((x) << FW_IQ_CMD_IQDROPRSS_S) x 1595 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQGTSMODE_V(x) ((x) << FW_IQ_CMD_IQGTSMODE_S) x 1599 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQPCIECH_V(x) ((x) << FW_IQ_CMD_IQPCIECH_S) x 1602 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQDCAEN_V(x) ((x) << FW_IQ_CMD_IQDCAEN_S) x 1605 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQDCACPU_V(x) ((x) << FW_IQ_CMD_IQDCACPU_S) x 1608 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQINTCNTTHRESH_V(x) ((x) << FW_IQ_CMD_IQINTCNTTHRESH_S) x 1611 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQO_V(x) ((x) << FW_IQ_CMD_IQO_S) x 1615 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQCPRIO_V(x) ((x) << FW_IQ_CMD_IQCPRIO_S) x 1618 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQESIZE_V(x) ((x) << FW_IQ_CMD_IQESIZE_S) x 1621 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQNS_V(x) ((x) << FW_IQ_CMD_IQNS_S) x 1624 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQRO_V(x) ((x) << FW_IQ_CMD_IQRO_S) x 1627 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQFLINTIQHSEN_V(x) ((x) << FW_IQ_CMD_IQFLINTIQHSEN_S) x 1630 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQFLINTCONGEN_V(x) ((x) << FW_IQ_CMD_IQFLINTCONGEN_S) x 1634 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQFLINTISCSIC_V(x) ((x) << FW_IQ_CMD_IQFLINTISCSIC_S) x 1638 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQTYPE_V(x) ((x) << FW_IQ_CMD_IQTYPE_S) x 1639 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_IQTYPE_G(x) \ x 1640 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_IQ_CMD_IQTYPE_S) & FW_IQ_CMD_IQTYPE_M) x 1643 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0CNGCHMAP_V(x) ((x) << FW_IQ_CMD_FL0CNGCHMAP_S) x 1646 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0CACHELOCK_V(x) ((x) << FW_IQ_CMD_FL0CACHELOCK_S) x 1649 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0DBP_V(x) ((x) << FW_IQ_CMD_FL0DBP_S) x 1652 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0DATANS_V(x) ((x) << FW_IQ_CMD_FL0DATANS_S) x 1655 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0DATARO_V(x) ((x) << FW_IQ_CMD_FL0DATARO_S) x 1659 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0CONGCIF_V(x) ((x) << FW_IQ_CMD_FL0CONGCIF_S) x 1663 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0ONCHIP_V(x) ((x) << FW_IQ_CMD_FL0ONCHIP_S) x 1666 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0STATUSPGNS_V(x) ((x) << FW_IQ_CMD_FL0STATUSPGNS_S) x 1669 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0STATUSPGRO_V(x) ((x) << FW_IQ_CMD_FL0STATUSPGRO_S) x 1672 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0FETCHNS_V(x) ((x) << FW_IQ_CMD_FL0FETCHNS_S) x 1675 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0FETCHRO_V(x) ((x) << FW_IQ_CMD_FL0FETCHRO_S) x 1679 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0HOSTFCMODE_V(x) ((x) << FW_IQ_CMD_FL0HOSTFCMODE_S) x 1682 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0CPRIO_V(x) ((x) << FW_IQ_CMD_FL0CPRIO_S) x 1685 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0PADEN_V(x) ((x) << FW_IQ_CMD_FL0PADEN_S) x 1689 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0PACKEN_V(x) ((x) << FW_IQ_CMD_FL0PACKEN_S) x 1693 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0CONGEN_V(x) ((x) << FW_IQ_CMD_FL0CONGEN_S) x 1697 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0DCAEN_V(x) ((x) << FW_IQ_CMD_FL0DCAEN_S) x 1700 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0DCACPU_V(x) ((x) << FW_IQ_CMD_FL0DCACPU_S) x 1703 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0FBMIN_V(x) ((x) << FW_IQ_CMD_FL0FBMIN_S) x 1706 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0FBMAX_V(x) ((x) << FW_IQ_CMD_FL0FBMAX_S) x 1709 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0CIDXFTHRESHO_V(x) ((x) << FW_IQ_CMD_FL0CIDXFTHRESHO_S) x 1713 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL0CIDXFTHRESH_V(x) ((x) << FW_IQ_CMD_FL0CIDXFTHRESH_S) x 1716 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1CNGCHMAP_V(x) ((x) << FW_IQ_CMD_FL1CNGCHMAP_S) x 1719 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1CACHELOCK_V(x) ((x) << FW_IQ_CMD_FL1CACHELOCK_S) x 1722 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1DBP_V(x) ((x) << FW_IQ_CMD_FL1DBP_S) x 1725 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1DATANS_V(x) ((x) << FW_IQ_CMD_FL1DATANS_S) x 1728 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1DATARO_V(x) ((x) << FW_IQ_CMD_FL1DATARO_S) x 1731 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1CONGCIF_V(x) ((x) << FW_IQ_CMD_FL1CONGCIF_S) x 1734 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1ONCHIP_V(x) ((x) << FW_IQ_CMD_FL1ONCHIP_S) x 1737 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1STATUSPGNS_V(x) ((x) << FW_IQ_CMD_FL1STATUSPGNS_S) x 1740 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1STATUSPGRO_V(x) ((x) << FW_IQ_CMD_FL1STATUSPGRO_S) x 1743 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1FETCHNS_V(x) ((x) << FW_IQ_CMD_FL1FETCHNS_S) x 1746 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1FETCHRO_V(x) ((x) << FW_IQ_CMD_FL1FETCHRO_S) x 1749 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1HOSTFCMODE_V(x) ((x) << FW_IQ_CMD_FL1HOSTFCMODE_S) x 1752 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1CPRIO_V(x) ((x) << FW_IQ_CMD_FL1CPRIO_S) x 1755 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1PADEN_V(x) ((x) << FW_IQ_CMD_FL1PADEN_S) x 1759 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1PACKEN_V(x) ((x) << FW_IQ_CMD_FL1PACKEN_S) x 1763 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1CONGEN_V(x) ((x) << FW_IQ_CMD_FL1CONGEN_S) x 1767 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1DCAEN_V(x) ((x) << FW_IQ_CMD_FL1DCAEN_S) x 1770 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1DCACPU_V(x) ((x) << FW_IQ_CMD_FL1DCACPU_S) x 1773 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1FBMIN_V(x) ((x) << FW_IQ_CMD_FL1FBMIN_S) x 1776 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1FBMAX_V(x) ((x) << FW_IQ_CMD_FL1FBMAX_S) x 1779 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1CIDXFTHRESHO_V(x) ((x) << FW_IQ_CMD_FL1CIDXFTHRESHO_S) x 1783 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_IQ_CMD_FL1CIDXFTHRESH_V(x) ((x) << FW_IQ_CMD_FL1CIDXFTHRESH_S) x 1799 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_PFN_V(x) ((x) << FW_EQ_ETH_CMD_PFN_S) x 1802 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_VFN_V(x) ((x) << FW_EQ_ETH_CMD_VFN_S) x 1805 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_ALLOC_V(x) ((x) << FW_EQ_ETH_CMD_ALLOC_S) x 1809 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_FREE_V(x) ((x) << FW_EQ_ETH_CMD_FREE_S) x 1813 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_MODIFY_V(x) ((x) << FW_EQ_ETH_CMD_MODIFY_S) x 1817 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_EQSTART_V(x) ((x) << FW_EQ_ETH_CMD_EQSTART_S) x 1821 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_EQSTOP_V(x) ((x) << FW_EQ_ETH_CMD_EQSTOP_S) x 1826 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_EQID_V(x) ((x) << FW_EQ_ETH_CMD_EQID_S) x 1827 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_EQID_G(x) \ x 1828 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_ETH_CMD_EQID_S) & FW_EQ_ETH_CMD_EQID_M) x 1832 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_PHYSEQID_V(x) ((x) << FW_EQ_ETH_CMD_PHYSEQID_S) x 1833 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_PHYSEQID_G(x) \ x 1834 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_ETH_CMD_PHYSEQID_S) & FW_EQ_ETH_CMD_PHYSEQID_M) x 1837 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_FETCHSZM_V(x) ((x) << FW_EQ_ETH_CMD_FETCHSZM_S) x 1841 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_STATUSPGNS_V(x) ((x) << FW_EQ_ETH_CMD_STATUSPGNS_S) x 1844 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_STATUSPGRO_V(x) ((x) << FW_EQ_ETH_CMD_STATUSPGRO_S) x 1847 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_FETCHNS_V(x) ((x) << FW_EQ_ETH_CMD_FETCHNS_S) x 1850 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_FETCHRO_V(x) ((x) << FW_EQ_ETH_CMD_FETCHRO_S) x 1854 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_HOSTFCMODE_V(x) ((x) << FW_EQ_ETH_CMD_HOSTFCMODE_S) x 1857 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_CPRIO_V(x) ((x) << FW_EQ_ETH_CMD_CPRIO_S) x 1860 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_ONCHIP_V(x) ((x) << FW_EQ_ETH_CMD_ONCHIP_S) x 1863 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_PCIECHN_V(x) ((x) << FW_EQ_ETH_CMD_PCIECHN_S) x 1866 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_IQID_V(x) ((x) << FW_EQ_ETH_CMD_IQID_S) x 1869 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_DCAEN_V(x) ((x) << FW_EQ_ETH_CMD_DCAEN_S) x 1872 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_DCACPU_V(x) ((x) << FW_EQ_ETH_CMD_DCACPU_S) x 1875 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_FBMIN_V(x) ((x) << FW_EQ_ETH_CMD_FBMIN_S) x 1878 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_FBMAX_V(x) ((x) << FW_EQ_ETH_CMD_FBMAX_S) x 1881 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_CIDXFTHRESHO_V(x) ((x) << FW_EQ_ETH_CMD_CIDXFTHRESHO_S) x 1884 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_CIDXFTHRESH_V(x) ((x) << FW_EQ_ETH_CMD_CIDXFTHRESH_S) x 1887 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_EQSIZE_V(x) ((x) << FW_EQ_ETH_CMD_EQSIZE_S) x 1890 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_AUTOEQUIQE_V(x) ((x) << FW_EQ_ETH_CMD_AUTOEQUIQE_S) x 1894 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_AUTOEQUEQE_V(x) ((x) << FW_EQ_ETH_CMD_AUTOEQUEQE_S) x 1898 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_VIID_V(x) ((x) << FW_EQ_ETH_CMD_VIID_S) x 1902 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_TIMEREN_V(x) ((x) << FW_EQ_ETH_CMD_TIMEREN_S) x 1903 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_TIMEREN_G(x) \ x 1904 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_ETH_CMD_TIMEREN_S) & FW_EQ_ETH_CMD_TIMEREN_M) x 1909 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_TIMERIX_V(x) ((x) << FW_EQ_ETH_CMD_TIMERIX_S) x 1910 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_ETH_CMD_TIMERIX_G(x) \ x 1911 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_ETH_CMD_TIMERIX_S) & FW_EQ_ETH_CMD_TIMERIX_M) x 1924 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_PFN_V(x) ((x) << FW_EQ_CTRL_CMD_PFN_S) x 1927 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_VFN_V(x) ((x) << FW_EQ_CTRL_CMD_VFN_S) x 1930 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_ALLOC_V(x) ((x) << FW_EQ_CTRL_CMD_ALLOC_S) x 1934 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_FREE_V(x) ((x) << FW_EQ_CTRL_CMD_FREE_S) x 1938 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_MODIFY_V(x) ((x) << FW_EQ_CTRL_CMD_MODIFY_S) x 1942 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_EQSTART_V(x) ((x) << FW_EQ_CTRL_CMD_EQSTART_S) x 1946 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_EQSTOP_V(x) ((x) << FW_EQ_CTRL_CMD_EQSTOP_S) x 1950 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_CMPLIQID_V(x) ((x) << FW_EQ_CTRL_CMD_CMPLIQID_S) x 1954 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_EQID_V(x) ((x) << FW_EQ_CTRL_CMD_EQID_S) x 1955 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_EQID_G(x) \ x 1956 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_CTRL_CMD_EQID_S) & FW_EQ_CTRL_CMD_EQID_M) x 1960 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_PHYSEQID_G(x) \ x 1961 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_CTRL_CMD_PHYSEQID_S) & FW_EQ_CTRL_CMD_PHYSEQID_M) x 1964 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_FETCHSZM_V(x) ((x) << FW_EQ_CTRL_CMD_FETCHSZM_S) x 1968 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_STATUSPGNS_V(x) ((x) << FW_EQ_CTRL_CMD_STATUSPGNS_S) x 1972 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_STATUSPGRO_V(x) ((x) << FW_EQ_CTRL_CMD_STATUSPGRO_S) x 1976 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_FETCHNS_V(x) ((x) << FW_EQ_CTRL_CMD_FETCHNS_S) x 1980 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_FETCHRO_V(x) ((x) << FW_EQ_CTRL_CMD_FETCHRO_S) x 1984 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_HOSTFCMODE_V(x) ((x) << FW_EQ_CTRL_CMD_HOSTFCMODE_S) x 1987 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_CPRIO_V(x) ((x) << FW_EQ_CTRL_CMD_CPRIO_S) x 1990 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_ONCHIP_V(x) ((x) << FW_EQ_CTRL_CMD_ONCHIP_S) x 1993 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_PCIECHN_V(x) ((x) << FW_EQ_CTRL_CMD_PCIECHN_S) x 1996 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_IQID_V(x) ((x) << FW_EQ_CTRL_CMD_IQID_S) x 1999 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_DCAEN_V(x) ((x) << FW_EQ_CTRL_CMD_DCAEN_S) x 2002 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_DCACPU_V(x) ((x) << FW_EQ_CTRL_CMD_DCACPU_S) x 2005 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_FBMIN_V(x) ((x) << FW_EQ_CTRL_CMD_FBMIN_S) x 2008 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_FBMAX_V(x) ((x) << FW_EQ_CTRL_CMD_FBMAX_S) x 2011 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_CIDXFTHRESHO_V(x) \ x 2012 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_EQ_CTRL_CMD_CIDXFTHRESHO_S) x 2015 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_CIDXFTHRESH_V(x) ((x) << FW_EQ_CTRL_CMD_CIDXFTHRESH_S) x 2018 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_CTRL_CMD_EQSIZE_V(x) ((x) << FW_EQ_CTRL_CMD_EQSIZE_S) x 2031 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_PFN_V(x) ((x) << FW_EQ_OFLD_CMD_PFN_S) x 2034 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_VFN_V(x) ((x) << FW_EQ_OFLD_CMD_VFN_S) x 2037 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_ALLOC_V(x) ((x) << FW_EQ_OFLD_CMD_ALLOC_S) x 2041 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_FREE_V(x) ((x) << FW_EQ_OFLD_CMD_FREE_S) x 2045 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_MODIFY_V(x) ((x) << FW_EQ_OFLD_CMD_MODIFY_S) x 2049 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_EQSTART_V(x) ((x) << FW_EQ_OFLD_CMD_EQSTART_S) x 2053 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_EQSTOP_V(x) ((x) << FW_EQ_OFLD_CMD_EQSTOP_S) x 2058 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_EQID_V(x) ((x) << FW_EQ_OFLD_CMD_EQID_S) x 2059 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_EQID_G(x) \ x 2060 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_OFLD_CMD_EQID_S) & FW_EQ_OFLD_CMD_EQID_M) x 2064 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_PHYSEQID_G(x) \ x 2065 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_EQ_OFLD_CMD_PHYSEQID_S) & FW_EQ_OFLD_CMD_PHYSEQID_M) x 2068 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_FETCHSZM_V(x) ((x) << FW_EQ_OFLD_CMD_FETCHSZM_S) x 2071 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_STATUSPGNS_V(x) ((x) << FW_EQ_OFLD_CMD_STATUSPGNS_S) x 2074 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_STATUSPGRO_V(x) ((x) << FW_EQ_OFLD_CMD_STATUSPGRO_S) x 2077 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_FETCHNS_V(x) ((x) << FW_EQ_OFLD_CMD_FETCHNS_S) x 2080 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_FETCHRO_V(x) ((x) << FW_EQ_OFLD_CMD_FETCHRO_S) x 2084 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_HOSTFCMODE_V(x) ((x) << FW_EQ_OFLD_CMD_HOSTFCMODE_S) x 2087 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_CPRIO_V(x) ((x) << FW_EQ_OFLD_CMD_CPRIO_S) x 2090 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_ONCHIP_V(x) ((x) << FW_EQ_OFLD_CMD_ONCHIP_S) x 2093 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_PCIECHN_V(x) ((x) << FW_EQ_OFLD_CMD_PCIECHN_S) x 2096 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_IQID_V(x) ((x) << FW_EQ_OFLD_CMD_IQID_S) x 2099 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_DCAEN_V(x) ((x) << FW_EQ_OFLD_CMD_DCAEN_S) x 2102 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_DCACPU_V(x) ((x) << FW_EQ_OFLD_CMD_DCACPU_S) x 2105 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_FBMIN_V(x) ((x) << FW_EQ_OFLD_CMD_FBMIN_S) x 2108 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_FBMAX_V(x) ((x) << FW_EQ_OFLD_CMD_FBMAX_S) x 2111 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_CIDXFTHRESHO_V(x) \ x 2112 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_EQ_OFLD_CMD_CIDXFTHRESHO_S) x 2115 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_CIDXFTHRESH_V(x) ((x) << FW_EQ_OFLD_CMD_CIDXFTHRESH_S) x 2118 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_EQ_OFLD_CMD_EQSIZE_V(x) ((x) << FW_EQ_OFLD_CMD_EQSIZE_S) x 2127 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VIID_PFN_G(x) (((x) >> FW_VIID_PFN_S) & FW_VIID_PFN_M) x 2131 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VIID_VIVLD_G(x) (((x) >> FW_VIID_VIVLD_S) & FW_VIID_VIVLD_M) x 2135 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VIID_VIN_G(x) (((x) >> FW_VIID_VIN_S) & FW_VIID_VIN_M) x 2156 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_PFN_V(x) ((x) << FW_VI_CMD_PFN_S) x 2159 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_VFN_V(x) ((x) << FW_VI_CMD_VFN_S) x 2162 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_ALLOC_V(x) ((x) << FW_VI_CMD_ALLOC_S) x 2166 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_FREE_V(x) ((x) << FW_VI_CMD_FREE_S) x 2171 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_VFVLD_V(x) ((x) << FW_VI_CMD_VFVLD_S) x 2172 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_VFVLD_G(x) \ x 2173 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_CMD_VFVLD_S) & FW_VI_CMD_VFVLD_M) x 2178 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_VIN_V(x) ((x) << FW_VI_CMD_VIN_S) x 2179 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_VIN_G(x) \ x 2180 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_CMD_VIN_S) & FW_VI_CMD_VIN_M) x 2184 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_VIID_V(x) ((x) << FW_VI_CMD_VIID_S) x 2185 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_VIID_G(x) (((x) >> FW_VI_CMD_VIID_S) & FW_VI_CMD_VIID_M) x 2189 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_PORTID_V(x) ((x) << FW_VI_CMD_PORTID_S) x 2190 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_PORTID_G(x) \ x 2191 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_CMD_PORTID_S) & FW_VI_CMD_PORTID_M) x 2195 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_CMD_RSSSIZE_G(x) \ x 2196 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_CMD_RSSSIZE_S) & FW_VI_CMD_RSSSIZE_M) x 2257 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_SMTID_V(x) ((x) << FW_VI_MAC_CMD_SMTID_S) x 2258 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_SMTID_G(x) \ x 2259 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_SMTID_S) & FW_VI_MAC_CMD_SMTID_M) x 2262 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_VIID_V(x) ((x) << FW_VI_MAC_CMD_VIID_S) x 2265 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_FREEMACS_V(x) ((x) << FW_VI_MAC_CMD_FREEMACS_S) x 2269 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_ENTRY_TYPE_V(x) ((x) << FW_VI_MAC_CMD_ENTRY_TYPE_S) x 2270 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_ENTRY_TYPE_G(x) \ x 2271 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_ENTRY_TYPE_S) & FW_VI_MAC_CMD_ENTRY_TYPE_M) x 2274 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_HASHVECEN_V(x) ((x) << FW_VI_MAC_CMD_HASHVECEN_S) x 2278 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_HASHUNIEN_V(x) ((x) << FW_VI_MAC_CMD_HASHUNIEN_S) x 2281 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_VALID_V(x) ((x) << FW_VI_MAC_CMD_VALID_S) x 2285 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_PRIO_V(x) ((x) << FW_VI_MAC_CMD_PRIO_S) x 2289 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_SMAC_RESULT_V(x) ((x) << FW_VI_MAC_CMD_SMAC_RESULT_S) x 2290 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_SMAC_RESULT_G(x) \ x 2291 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_SMAC_RESULT_S) & FW_VI_MAC_CMD_SMAC_RESULT_M) x 2295 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_IDX_V(x) ((x) << FW_VI_MAC_CMD_IDX_S) x 2296 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_IDX_G(x) \ x 2297 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_IDX_S) & FW_VI_MAC_CMD_IDX_M) x 2301 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_RAW_IDX_V(x) ((x) << FW_VI_MAC_CMD_RAW_IDX_S) x 2302 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_RAW_IDX_G(x) \ x 2303 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_RAW_IDX_S) & FW_VI_MAC_CMD_RAW_IDX_M) x 2307 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_LOOKUP_TYPE_V(x) ((x) << FW_VI_MAC_CMD_LOOKUP_TYPE_S) x 2308 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_LOOKUP_TYPE_G(x) \ x 2309 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_LOOKUP_TYPE_S) & FW_VI_MAC_CMD_LOOKUP_TYPE_M) x 2314 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_DIP_HIT_V(x) ((x) << FW_VI_MAC_CMD_DIP_HIT_S) x 2315 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_DIP_HIT_G(x) \ x 2316 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_DIP_HIT_S) & FW_VI_MAC_CMD_DIP_HIT_M) x 2321 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_VNI_V(x) ((x) << FW_VI_MAC_CMD_VNI_S) x 2322 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_VNI_G(x) \ x 2323 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_VNI_S) & FW_VI_MAC_CMD_VNI_M) x 2327 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_VNI_MASK_V(x) ((x) << FW_VI_MAC_CMD_VNI_MASK_S) x 2328 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_MAC_CMD_VNI_MASK_G(x) \ x 2329 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_VI_MAC_CMD_VNI_MASK_S) & FW_VI_MAC_CMD_VNI_MASK_M) x 2341 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_RXMODE_CMD_VIID_V(x) ((x) << FW_VI_RXMODE_CMD_VIID_S) x 2345 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_RXMODE_CMD_MTU_V(x) ((x) << FW_VI_RXMODE_CMD_MTU_S) x 2349 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_RXMODE_CMD_PROMISCEN_V(x) ((x) << FW_VI_RXMODE_CMD_PROMISCEN_S) x 2353 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_RXMODE_CMD_ALLMULTIEN_V(x) \ x 2354 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_VI_RXMODE_CMD_ALLMULTIEN_S) x 2358 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_RXMODE_CMD_BROADCASTEN_V(x) \ x 2359 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_VI_RXMODE_CMD_BROADCASTEN_S) x 2363 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_RXMODE_CMD_VLANEXEN_V(x) ((x) << FW_VI_RXMODE_CMD_VLANEXEN_S) x 2374 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_ENABLE_CMD_VIID_V(x) ((x) << FW_VI_ENABLE_CMD_VIID_S) x 2377 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_ENABLE_CMD_IEN_V(x) ((x) << FW_VI_ENABLE_CMD_IEN_S) x 2380 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_ENABLE_CMD_EEN_V(x) ((x) << FW_VI_ENABLE_CMD_EEN_S) x 2383 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_ENABLE_CMD_LED_V(x) ((x) << FW_VI_ENABLE_CMD_LED_S) x 2387 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_ENABLE_CMD_DCB_INFO_V(x) ((x) << FW_VI_ENABLE_CMD_DCB_INFO_S) x 2488 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_STATS_CMD_VIID_V(x) ((x) << FW_VI_STATS_CMD_VIID_S) x 2491 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_STATS_CMD_NSTATS_V(x) ((x) << FW_VI_STATS_CMD_NSTATS_S) x 2494 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_VI_STATS_CMD_IX_V(x) ((x) << FW_VI_STATS_CMD_IX_S) x 2512 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_MAC_CMD_PFN_V(x) ((x) << FW_ACL_MAC_CMD_PFN_S) x 2515 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_MAC_CMD_VFN_V(x) ((x) << FW_ACL_MAC_CMD_VFN_S) x 2518 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_MAC_CMD_EN_V(x) ((x) << FW_ACL_MAC_CMD_EN_S) x 2530 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_VLAN_CMD_PFN_V(x) ((x) << FW_ACL_VLAN_CMD_PFN_S) x 2533 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_VLAN_CMD_VFN_V(x) ((x) << FW_ACL_VLAN_CMD_VFN_S) x 2537 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_VLAN_CMD_EN_V(x) ((x) << FW_ACL_VLAN_CMD_EN_S) x 2538 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_VLAN_CMD_EN_G(x) \ x 2539 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> S_FW_ACL_VLAN_CMD_EN_S) & FW_ACL_VLAN_CMD_EN_M) x 2543 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_VLAN_CMD_DROPNOVLAN_V(x) ((x) << FW_ACL_VLAN_CMD_DROPNOVLAN_S) x 2548 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_VLAN_CMD_FM_V(x) ((x) << FW_ACL_VLAN_CMD_FM_S) x 2549 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_ACL_VLAN_CMD_FM_G(x) \ x 2550 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_ACL_VLAN_CMD_FM_S) & FW_ACL_VLAN_CMD_FM_M) x 2575 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP_SPEED_V(x) ((x) << FW_PORT_CAP_SPEED_S) x 2576 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP_SPEED_G(x) \ x 2577 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CAP_SPEED_S) & FW_PORT_CAP_SPEED_M) x 2587 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP_MDI_V(x) ((x) << FW_PORT_CAP_MDI_S) x 2620 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_SPEED_V(x) ((x) << FW_PORT_CAP32_SPEED_S) x 2621 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_SPEED_G(x) \ x 2622 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CAP32_SPEED_S) & FW_PORT_CAP32_SPEED_M) x 2626 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_FC_V(x) ((x) << FW_PORT_CAP32_FC_S) x 2627 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_FC_G(x) \ x 2628 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CAP32_FC_S) & FW_PORT_CAP32_FC_M) x 2632 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_802_3_V(x) ((x) << FW_PORT_CAP32_802_3_S) x 2633 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_802_3_G(x) \ x 2634 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CAP32_802_3_S) & FW_PORT_CAP32_802_3_M) x 2638 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_ANEG_V(x) ((x) << FW_PORT_CAP32_ANEG_S) x 2639 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_ANEG_G(x) \ x 2640 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CAP32_ANEG_S) & FW_PORT_CAP32_ANEG_M) x 2651 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_MDI_V(x) ((x) << FW_PORT_CAP32_MDI_S) x 2652 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_MDI_G(x) \ x 2653 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CAP32_MDI_S) & FW_PORT_CAP32_MDI_M) x 2657 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_FEC_V(x) ((x) << FW_PORT_CAP32_FEC_S) x 2658 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CAP32_FEC_G(x) \ x 2659 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CAP32_FEC_S) & FW_PORT_CAP32_FEC_M) x 2842 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_READ_V(x) ((x) << FW_PORT_CMD_READ_S) x 2847 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_PORTID_V(x) ((x) << FW_PORT_CMD_PORTID_S) x 2848 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_PORTID_G(x) \ x 2849 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_PORTID_S) & FW_PORT_CMD_PORTID_M) x 2853 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_ACTION_V(x) ((x) << FW_PORT_CMD_ACTION_S) x 2854 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_ACTION_G(x) \ x 2855 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_ACTION_S) & FW_PORT_CMD_ACTION_M) x 2858 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_OVLAN3_V(x) ((x) << FW_PORT_CMD_OVLAN3_S) x 2861 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_OVLAN2_V(x) ((x) << FW_PORT_CMD_OVLAN2_S) x 2864 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_OVLAN1_V(x) ((x) << FW_PORT_CMD_OVLAN1_S) x 2867 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_OVLAN0_V(x) ((x) << FW_PORT_CMD_OVLAN0_S) x 2870 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_IVLAN0_V(x) ((x) << FW_PORT_CMD_IVLAN0_S) x 2873 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_TXIPG_V(x) ((x) << FW_PORT_CMD_TXIPG_S) x 2877 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LSTATUS_V(x) ((x) << FW_PORT_CMD_LSTATUS_S) x 2878 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LSTATUS_G(x) \ x 2879 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_LSTATUS_S) & FW_PORT_CMD_LSTATUS_M) x 2884 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LSPEED_V(x) ((x) << FW_PORT_CMD_LSPEED_S) x 2885 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LSPEED_G(x) \ x 2886 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_LSPEED_S) & FW_PORT_CMD_LSPEED_M) x 2889 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_TXPAUSE_V(x) ((x) << FW_PORT_CMD_TXPAUSE_S) x 2893 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_RXPAUSE_V(x) ((x) << FW_PORT_CMD_RXPAUSE_S) x 2897 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MDIOCAP_V(x) ((x) << FW_PORT_CMD_MDIOCAP_S) x 2902 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MDIOADDR_G(x) \ x 2903 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_MDIOADDR_S) & FW_PORT_CMD_MDIOADDR_M) x 2906 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LPTXPAUSE_V(x) ((x) << FW_PORT_CMD_LPTXPAUSE_S) x 2910 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LPRXPAUSE_V(x) ((x) << FW_PORT_CMD_LPRXPAUSE_S) x 2915 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_PTYPE_G(x) \ x 2916 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_PTYPE_S) & FW_PORT_CMD_PTYPE_M) x 2920 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LINKDNRC_G(x) \ x 2921 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_LINKDNRC_S) & FW_PORT_CMD_LINKDNRC_M) x 2925 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MODTYPE_V(x) ((x) << FW_PORT_CMD_MODTYPE_S) x 2926 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MODTYPE_G(x) \ x 2927 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_MODTYPE_S) & FW_PORT_CMD_MODTYPE_M) x 2930 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_DCBXDIS_V(x) ((x) << FW_PORT_CMD_DCBXDIS_S) x 2934 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_APPLY_V(x) ((x) << FW_PORT_CMD_APPLY_S) x 2938 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_ALL_SYNCD_V(x) ((x) << FW_PORT_CMD_ALL_SYNCD_S) x 2943 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_DCB_VERSION_G(x) \ x 2944 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_DCB_VERSION_S) & FW_PORT_CMD_DCB_VERSION_M) x 2948 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LSTATUS32_V(x) ((x) << FW_PORT_CMD_LSTATUS32_S) x 2949 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LSTATUS32_G(x) \ x 2950 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_LSTATUS32_S) & FW_PORT_CMD_LSTATUS32_M) x 2955 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LINKDNRC32_V(x) ((x) << FW_PORT_CMD_LINKDNRC32_S) x 2956 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_LINKDNRC32_G(x) \ x 2957 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_LINKDNRC32_S) & FW_PORT_CMD_LINKDNRC32_M) x 2961 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_DCBXDIS32_V(x) ((x) << FW_PORT_CMD_DCBXDIS32_S) x 2962 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_DCBXDIS32_G(x) \ x 2963 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_DCBXDIS32_S) & FW_PORT_CMD_DCBXDIS32_M) x 2968 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MDIOCAP32_V(x) ((x) << FW_PORT_CMD_MDIOCAP32_S) x 2969 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MDIOCAP32_G(x) \ x 2970 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_MDIOCAP32_S) & FW_PORT_CMD_MDIOCAP32_M) x 2975 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MDIOADDR32_V(x) ((x) << FW_PORT_CMD_MDIOADDR32_S) x 2976 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MDIOADDR32_G(x) \ x 2977 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_MDIOADDR32_S) & FW_PORT_CMD_MDIOADDR32_M) x 2981 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_PORTTYPE32_V(x) ((x) << FW_PORT_CMD_PORTTYPE32_S) x 2982 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_PORTTYPE32_G(x) \ x 2983 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_PORTTYPE32_S) & FW_PORT_CMD_PORTTYPE32_M) x 2987 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MODTYPE32_V(x) ((x) << FW_PORT_CMD_MODTYPE32_S) x 2988 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MODTYPE32_G(x) \ x 2989 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_MODTYPE32_S) & FW_PORT_CMD_MODTYPE32_M) x 2993 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_CBLLEN32_V(x) ((x) << FW_PORT_CMD_CBLLEN32_S) x 2994 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_CBLLEN32_G(x) \ x 2995 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_CBLLEN32_S) & FW_PORT_CMD_CBLLEN32_M) x 2999 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_AUXLINFO32_V(x) ((x) << FW_PORT_CMD_AUXLINFO32_S) x 3000 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_AUXLINFO32_G(x) \ x 3001 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_AUXLINFO32_S) & FW_PORT_CMD_AUXLINFO32_M) x 3005 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_AUXLINFO32_KX4_V(x) \ x 3006 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_PORT_AUXLINFO32_KX4_S) x 3007 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_AUXLINFO32_KX4_G(x) \ x 3008 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_AUXLINFO32_KX4_S) & FW_PORT_AUXLINFO32_KX4_M) x 3013 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_AUXLINFO32_KR_V(x) \ x 3014 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_PORT_AUXLINFO32_KR_S) x 3015 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_AUXLINFO32_KR_G(x) \ x 3016 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_AUXLINFO32_KR_S) & FW_PORT_AUXLINFO32_KR_M) x 3021 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MTU32_V(x) ((x) << FW_PORT_CMD_MTU32_S) x 3022 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PORT_CMD_MTU32_G(x) \ x 3023 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PORT_CMD_MTU32_S) & FW_PORT_CMD_MTU32_M) x 3321 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PTP_CMD_PORTID_V(x) ((x) << FW_PTP_CMD_PORTID_S) x 3322 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_PTP_CMD_PORTID_G(x) \ x 3323 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_PTP_CMD_PORTID_S) & FW_PTP_CMD_PORTID_M) x 3346 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_IND_TBL_CMD_VIID_V(x) ((x) << FW_RSS_IND_TBL_CMD_VIID_S) x 3349 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_IND_TBL_CMD_IQ0_V(x) ((x) << FW_RSS_IND_TBL_CMD_IQ0_S) x 3352 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_IND_TBL_CMD_IQ1_V(x) ((x) << FW_RSS_IND_TBL_CMD_IQ1_S) x 3355 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_IND_TBL_CMD_IQ2_V(x) ((x) << FW_RSS_IND_TBL_CMD_IQ2_S) x 3378 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_MODE_V(x) ((x) << FW_RSS_GLB_CONFIG_CMD_MODE_S) x 3379 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_MODE_G(x) \ x 3380 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_RSS_GLB_CONFIG_CMD_MODE_S) & FW_RSS_GLB_CONFIG_CMD_MODE_M) x 3386 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_V(x) \ x 3387 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_S) x 3392 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_V(x) \ x 3393 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_S) x 3398 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_V(x) \ x 3399 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_S) x 3404 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_V(x) \ x 3405 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_S) x 3410 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_V(x) \ x 3411 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_S) x 3416 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_V(x) \ x 3417 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_S) x 3422 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_V(x) \ x 3423 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_S) x 3428 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_V(x) \ x 3429 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_S) x 3434 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_V(x) \ x 3435 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_S) x 3441 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_VIID(x) ((x) << 0) x 3459 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_VIID_V(x) ((x) << FW_RSS_VI_CONFIG_CMD_VIID_S) x 3463 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V(x) \ x 3464 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_VI_CONFIG_CMD_DEFAULTQ_S) x 3465 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(x) \ x 3466 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_RSS_VI_CONFIG_CMD_DEFAULTQ_S) & \ x 3470 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_V(x) \ x 3471 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_S) x 3476 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_V(x) \ x 3477 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_S) x 3482 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_V(x) \ x 3483 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_S) x 3488 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_V(x) \ x 3489 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_S) x 3494 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_RSS_VI_CONFIG_CMD_UDPEN_V(x) ((x) << FW_RSS_VI_CONFIG_CMD_UDPEN_S) x 3541 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CLIP_CMD_ALLOC_V(x) ((x) << FW_CLIP_CMD_ALLOC_S) x 3545 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CLIP_CMD_FREE_V(x) ((x) << FW_CLIP_CMD_FREE_S) x 3590 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h __be32 x; x 3609 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_DEBUG_CMD_TYPE_G(x) \ x 3610 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_DEBUG_CMD_TYPE_S) & FW_DEBUG_CMD_TYPE_M) x 3624 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_MODE_V(x) ((x) << FW_HMA_CMD_MODE_S) x 3625 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_MODE_G(x) \ x 3626 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HMA_CMD_MODE_S) & FW_HMA_CMD_MODE_M) x 3631 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_SOC_V(x) ((x) << FW_HMA_CMD_SOC_S) x 3632 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_SOC_G(x) (((x) >> FW_HMA_CMD_SOC_S) & FW_HMA_CMD_SOC_M) x 3637 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_EOC_V(x) ((x) << FW_HMA_CMD_EOC_S) x 3638 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_EOC_G(x) (((x) >> FW_HMA_CMD_EOC_S) & FW_HMA_CMD_EOC_M) x 3643 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_PCIE_PARAMS_V(x) ((x) << FW_HMA_CMD_PCIE_PARAMS_S) x 3644 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_PCIE_PARAMS_G(x) \ x 3645 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HMA_CMD_PCIE_PARAMS_S) & FW_HMA_CMD_PCIE_PARAMS_M) x 3649 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_NADDR_V(x) ((x) << FW_HMA_CMD_NADDR_S) x 3650 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_NADDR_G(x) \ x 3651 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HMA_CMD_NADDR_S) & FW_HMA_CMD_NADDR_M) x 3655 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_SIZE_V(x) ((x) << FW_HMA_CMD_SIZE_S) x 3656 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_SIZE_G(x) \ x 3657 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HMA_CMD_SIZE_S) & FW_HMA_CMD_SIZE_M) x 3661 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_ADDR_SIZE_V(x) ((x) << FW_HMA_CMD_ADDR_SIZE_S) x 3662 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HMA_CMD_ADDR_SIZE_G(x) \ x 3663 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HMA_CMD_ADDR_SIZE_S) & FW_HMA_CMD_ADDR_SIZE_M) x 3670 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_ERR_V(x) ((x) << PCIE_FW_ERR_S) x 3674 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_INIT_V(x) ((x) << PCIE_FW_INIT_S) x 3678 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_HALT_V(x) ((x) << PCIE_FW_HALT_S) x 3683 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_EVAL_G(x) (((x) >> PCIE_FW_EVAL_S) & PCIE_FW_EVAL_M) x 3686 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_MASTER_VLD_V(x) ((x) << PCIE_FW_MASTER_VLD_S) x 3691 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_MASTER_V(x) ((x) << PCIE_FW_MASTER_S) x 3692 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_MASTER_G(x) (((x) >> PCIE_FW_MASTER_S) & PCIE_FW_MASTER_M) x 3723 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_MAJOR_V(x) \ x 3724 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_HDR_FW_VER_MAJOR_S) x 3725 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_MAJOR_G(x) \ x 3726 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HDR_FW_VER_MAJOR_S) & FW_HDR_FW_VER_MAJOR_M) x 3730 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_MINOR_V(x) \ x 3731 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_HDR_FW_VER_MINOR_S) x 3732 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_MINOR_G(x) \ x 3733 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HDR_FW_VER_MINOR_S) & FW_HDR_FW_VER_MINOR_M) x 3737 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_MICRO_V(x) \ x 3738 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_HDR_FW_VER_MICRO_S) x 3739 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_MICRO_G(x) \ x 3740 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HDR_FW_VER_MICRO_S) & FW_HDR_FW_VER_MICRO_M) x 3744 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_BUILD_V(x) \ x 3745 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_HDR_FW_VER_BUILD_S) x 3746 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_HDR_FW_VER_BUILD_G(x) \ x 3747 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_HDR_FW_VER_BUILD_S) & FW_HDR_FW_VER_BUILD_M) x 3835 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_DEVLOG_CMD_MEMTYPE_DEVLOG_G(x) \ x 3836 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_DEVLOG_CMD_MEMTYPE_DEVLOG_S) & \ x 3841 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_DEVLOG_CMD_MEMADDR16_DEVLOG_G(x) \ x 3842 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_DEVLOG_CMD_MEMADDR16_DEVLOG_S) & \ x 3859 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_PF_DEVLOG_NENTRIES128_V(x) \ x 3860 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << PCIE_FW_PF_DEVLOG_NENTRIES128_S) x 3861 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_PF_DEVLOG_NENTRIES128_G(x) \ x 3862 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> PCIE_FW_PF_DEVLOG_NENTRIES128_S) & \ x 3867 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_PF_DEVLOG_ADDR16_V(x) ((x) << PCIE_FW_PF_DEVLOG_ADDR16_S) x 3868 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_PF_DEVLOG_ADDR16_G(x) \ x 3869 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> PCIE_FW_PF_DEVLOG_ADDR16_S) & PCIE_FW_PF_DEVLOG_ADDR16_M) x 3873 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_PF_DEVLOG_MEMTYPE_V(x) ((x) << PCIE_FW_PF_DEVLOG_MEMTYPE_S) x 3874 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define PCIE_FW_PF_DEVLOG_MEMTYPE_G(x) \ x 3875 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> PCIE_FW_PF_DEVLOG_MEMTYPE_S) & PCIE_FW_PF_DEVLOG_MEMTYPE_M) x 3891 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_OPCODE_V(x) \ x 3892 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_OPCODE_S) x 3893 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_OPCODE_G(x) \ x 3894 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_OPCODE_S) & \ x 3899 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_COMPL_V(x) \ x 3900 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_COMPL_S) x 3901 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_COMPL_G(x) \ x 3902 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_COMPL_S) & \ x 3908 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_V(x) \ x 3909 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_S) x 3910 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_G(x) \ x 3911 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_S) & \ x 3916 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_V(x) \ x 3917 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_S) x 3918 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_G(x) \ x 3919 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_S) & \ x 3924 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_V(x) \ x 3925 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_S) x 3926 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_G(x) \ x 3927 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_S) & \ x 3932 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_LEN16_V(x) \ x 3933 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_LEN16_S) x 3934 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_LEN16_G(x) \ x 3935 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_LEN16_S) & \ x 3940 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_RX_CHID_V(x) \ x 3941 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_RX_CHID_S) x 3942 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_RX_CHID_G(x) \ x 3943 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_RX_CHID_S) & \ x 3948 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_LCB_V(x) \ x 3949 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_LCB_S) x 3950 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_LCB_G(x) \ x 3951 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_LCB_S) & FW_CRYPTO_LOOKASIDE_WR_LCB_M) x 3955 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_PHASH_V(x) \ x 3956 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_PHASH_S) x 3957 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_PHASH_G(x) \ x 3958 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_PHASH_S) & \ x 3963 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_IV_V(x) \ x 3964 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_IV_S) x 3965 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_IV_G(x) \ x 3966 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_IV_S) & FW_CRYPTO_LOOKASIDE_WR_IV_M) x 3970 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_FQIDX_V(x) \ x 3971 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_FQIDX_S) x 3972 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_FQIDX_G(x) \ x 3973 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_FQIDX_S) & \ x 3978 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_TX_CH_V(x) \ x 3979 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_TX_CH_S) x 3980 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_TX_CH_G(x) \ x 3981 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_TX_CH_S) & \ x 3986 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_V(x) \ x 3987 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_S) x 3988 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_G(x) \ x 3989 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_S) & \ x 3994 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_V(x) \ x 3995 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_S) x 3996 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_G(x) \ x 3997 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_S) & \ x 4002 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_V(x) \ x 4003 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_S) x 4004 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_G(x) \ x 4005 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_S) & \ x 4024 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_OPCODE_V(x) ((x) << FW_TLSTX_DATA_WR_OPCODE_S) x 4025 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_OPCODE_G(x) \ x 4026 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_OPCODE_S) & FW_TLSTX_DATA_WR_OPCODE_M) x 4030 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_COMPL_V(x) ((x) << FW_TLSTX_DATA_WR_COMPL_S) x 4031 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_COMPL_G(x) \ x 4032 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_COMPL_S) & FW_TLSTX_DATA_WR_COMPL_M) x 4037 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_IMMDLEN_V(x) ((x) << FW_TLSTX_DATA_WR_IMMDLEN_S) x 4038 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_IMMDLEN_G(x) \ x 4039 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_IMMDLEN_S) & FW_TLSTX_DATA_WR_IMMDLEN_M) x 4043 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_FLOWID_V(x) ((x) << FW_TLSTX_DATA_WR_FLOWID_S) x 4044 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_FLOWID_G(x) \ x 4045 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_FLOWID_S) & FW_TLSTX_DATA_WR_FLOWID_M) x 4049 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_LEN16_V(x) ((x) << FW_TLSTX_DATA_WR_LEN16_S) x 4050 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_LEN16_G(x) \ x 4051 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_LEN16_S) & FW_TLSTX_DATA_WR_LEN16_M) x 4055 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_LSODISABLE_V(x) \ x 4056 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_TLSTX_DATA_WR_LSODISABLE_S) x 4057 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_LSODISABLE_G(x) \ x 4058 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_LSODISABLE_S) & FW_TLSTX_DATA_WR_LSODISABLE_M) x 4063 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_ALIGNPLD_V(x) ((x) << FW_TLSTX_DATA_WR_ALIGNPLD_S) x 4064 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_ALIGNPLD_G(x) \ x 4065 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_ALIGNPLD_S) & FW_TLSTX_DATA_WR_ALIGNPLD_M) x 4070 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_V(x) \ x 4071 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_S) x 4072 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_G(x) \ x 4073 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_S) & \ x 4079 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_FLAGS_V(x) ((x) << FW_TLSTX_DATA_WR_FLAGS_S) x 4080 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_FLAGS_G(x) \ x 4081 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_FLAGS_S) & FW_TLSTX_DATA_WR_FLAGS_M) x 4085 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_CTXLOC_V(x) ((x) << FW_TLSTX_DATA_WR_CTXLOC_S) x 4086 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_CTXLOC_G(x) \ x 4087 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_CTXLOC_S) & FW_TLSTX_DATA_WR_CTXLOC_M) x 4091 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_IVDSGL_V(x) ((x) << FW_TLSTX_DATA_WR_IVDSGL_S) x 4092 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_IVDSGL_G(x) \ x 4093 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_IVDSGL_S) & FW_TLSTX_DATA_WR_IVDSGL_M) x 4098 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_KEYSIZE_V(x) ((x) << FW_TLSTX_DATA_WR_KEYSIZE_S) x 4099 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_KEYSIZE_G(x) \ x 4100 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_KEYSIZE_S) & FW_TLSTX_DATA_WR_KEYSIZE_M) x 4104 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_NUMIVS_V(x) ((x) << FW_TLSTX_DATA_WR_NUMIVS_S) x 4105 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_NUMIVS_G(x) \ x 4106 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_NUMIVS_S) & FW_TLSTX_DATA_WR_NUMIVS_M) x 4110 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_EXP_V(x) ((x) << FW_TLSTX_DATA_WR_EXP_S) x 4111 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_EXP_G(x) \ x 4112 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h (((x) >> FW_TLSTX_DATA_WR_EXP_S) & FW_TLSTX_DATA_WR_EXP_M) x 4115 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_ADJUSTEDPLEN_V(x) \ x 4116 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_TLSTX_DATA_WR_ADJUSTEDPLEN_S) x 4119 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_EXPINPLENMAX_V(x) \ x 4120 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_TLSTX_DATA_WR_EXPINPLENMAX_S) x 4123 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h #define FW_TLSTX_DATA_WR_PDUSINPLENMAX_V(x) \ x 4124 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h ((x) << FW_TLSTX_DATA_WR_PDUSINPLENMAX_S) x 166 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_COLOR(x) ((x) << PPOD_COLOR_SHIFT) x 172 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_TID(x) ((x) << PPOD_TID_SHIFT) x 175 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_TAG(x) ((x) << PPOD_TAG_SHIFT) x 178 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_VALID(x) ((x) << PPOD_VALID_SHIFT) x 182 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_PI_EXTRACT_CTL(x) ((x) << PPOD_PI_EXTRACT_CTL_SHIFT) x 187 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_PI_TYPE(x) ((x) << PPOD_PI_TYPE_SHIFT) x 191 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_PI_CHECK_CTL(x) ((x) << PPOD_PI_CHECK_CTL_SHIFT) x 195 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h #define PPOD_PI_REPORT_CTL(x) ((x) << PPOD_PI_REPORT_CTL_SHIFT) x 43 drivers/net/ethernet/cortina/gemini.h #define TOE_CLASSIFICATION_QID(x) (0x22 + x) /* 0x22 ~ 0x2F */ x 44 drivers/net/ethernet/cortina/gemini.h #define TOE_TOE_QID(x) (0x40 + x) /* 0x40 ~ 0x7F */ x 57 drivers/net/ethernet/cortina/gemini.h #define __RWPTR_NEXT(x, mask) (((unsigned int)(x) + 1) & (mask)) x 58 drivers/net/ethernet/cortina/gemini.h #define __RWPTR_PREV(x, mask) (((unsigned int)(x) - 1) & (mask)) x 61 drivers/net/ethernet/cortina/gemini.h #define RWPTR_NEXT(x, order) __RWPTR_NEXT((x), __RWPTR_MASK((order))) x 62 drivers/net/ethernet/cortina/gemini.h #define RWPTR_PREV(x, order) __RWPTR_PREV((x), __RWPTR_MASK((order))) x 253 drivers/net/ethernet/cortina/gemini.h #define CLASS_RX_INT_BIT(x) BIT((x + 2)) x 268 drivers/net/ethernet/cortina/gemini.h #define TOE_QL_FULL_INT_BIT(x) BIT(x) x 274 drivers/net/ethernet/cortina/gemini.h #define TOE_QH_FULL_INT_BIT(x) BIT(x - 32) x 296 drivers/net/ethernet/cortina/gemini.h #define CLASS_RX_FULL_INT_BIT(x) BIT(x + 2) x 541 drivers/net/ethernet/cortina/gemini.h #define GMAC_RXDESC_0_T_chksum_status(x) BIT(x + 26) x 542 drivers/net/ethernet/cortina/gemini.h #define GMAC_RXDESC_0_T_status(x) BIT(x + 22) x 543 drivers/net/ethernet/cortina/gemini.h #define GMAC_RXDESC_0_T_desc_count(x) BIT(x + 16) x 666 drivers/net/ethernet/cortina/gemini.h #define MR_SPR_BIT(x) BIT(x) x 927 drivers/net/ethernet/cortina/gemini.h #define TOE_DEFAULT_Q_HDR_BASE(x) (TOE_NONTOE_QUE_HDR_BASE + 0x08 * (x)) x 4095 drivers/net/ethernet/dec/tulip/de4x5.c int x = dev->dev_addr[i]; x 4096 drivers/net/ethernet/dec/tulip/de4x5.c x = ((x & 0xf) << 4) + ((x & 0xf0) >> 4); x 4097 drivers/net/ethernet/dec/tulip/de4x5.c x = ((x & 0x33) << 2) + ((x & 0xcc) >> 2); x 4098 drivers/net/ethernet/dec/tulip/de4x5.c dev->dev_addr[i] = ((x & 0x55) << 1) + ((x & 0xaa) >> 1); x 364 drivers/net/ethernet/dec/tulip/tulip.h #define RUN_AT(x) (jiffies + (x)) x 299 drivers/net/ethernet/dlink/sundance.c #define ASIC_HI_WORD(x) ((x) + 2) x 605 drivers/net/ethernet/emulex/benet/be_main.c #define lo(x) (x & 0xFFFF) x 606 drivers/net/ethernet/emulex/benet/be_main.c #define hi(x) (x & 0xFFFF0000) x 100 drivers/net/ethernet/ethoc.c #define TX_BD_NUM_VAL(x) (((x) <= 0x80) ? (x) : 0x80) x 108 drivers/net/ethernet/ethoc.c #define MIIMODER_CLKDIV(x) ((x) & 0xfe) /* needs to be an even number */ x 117 drivers/net/ethernet/ethoc.c #define MIIADDRESS_FIAD(x) (((x) & 0x1f) << 0) x 118 drivers/net/ethernet/ethoc.c #define MIIADDRESS_RGAD(x) (((x) & 0x1f) << 8) x 123 drivers/net/ethernet/ethoc.c #define MIITX_DATA_VAL(x) ((x) & 0xffff) x 126 drivers/net/ethernet/ethoc.c #define MIIRX_DATA_VAL(x) ((x) & 0xffff) x 139 drivers/net/ethernet/ethoc.c #define TX_BD_RETRY(x) (((x) & 0x00f0) >> 4) x 146 drivers/net/ethernet/ethoc.c #define TX_BD_LEN(x) (((x) & 0xffff) << 16) x 165 drivers/net/ethernet/ethoc.c #define RX_BD_LEN(x) (((x) & 0xffff) << 16) x 93 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_ITC_RXINT_CNT(x) (((x) & 0xf) << 0) x 94 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_ITC_RXINT_THR(x) (((x) & 0x7) << 4) x 96 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_ITC_TXINT_CNT(x) (((x) & 0xf) << 8) x 97 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_ITC_TXINT_THR(x) (((x) & 0x7) << 12) x 103 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_APTC_RXPOLL_CNT(x) (((x) & 0xf) << 0) x 105 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_APTC_TXPOLL_CNT(x) (((x) & 0xf) << 8) x 111 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_DBLAC_RXFIFO_LTHR(x) (((x) & 0x7) << 0) x 112 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_DBLAC_RXFIFO_HTHR(x) (((x) & 0x7) << 3) x 114 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_DBLAC_RXBURST_SIZE(x) (((x) & 0x3) << 8) x 115 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_DBLAC_TXBURST_SIZE(x) (((x) & 0x3) << 10) x 116 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_DBLAC_RXDES_SIZE(x) (((x) & 0xf) << 12) x 117 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_DBLAC_TXDES_SIZE(x) (((x) & 0xf) << 16) x 118 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_DBLAC_IFG_CNT(x) (((x) & 0x7) << 20) x 145 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_RBSR_SIZE(x) ((x) & 0x3fff) x 176 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_PHYCR_MDC_CYCTHR(x) ((x) & 0x3f) x 177 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_PHYCR_PHYAD(x) (((x) & 0x1f) << 16) x 178 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_PHYCR_REGAD(x) (((x) & 0x1f) << 21) x 185 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_PHYDATA_MIIWDATA(x) ((x) & 0xffff) x 193 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_FCR_PAUSE_TIME(x) (((x) & 0xffff) << 16) x 205 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_TXDES0_TXBUF_SIZE(x) ((x) & 0x3fff) x 211 drivers/net/ethernet/faraday/ftgmac100.h #define FTGMAC100_TXDES1_VLANTAG_CI(x) ((x) & 0xffff) x 62 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_ITC_RXINT_CNT(x) (((x) & 0xf) << 0) x 63 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_ITC_RXINT_THR(x) (((x) & 0x7) << 4) x 65 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_ITC_TXINT_CNT(x) (((x) & 0xf) << 8) x 66 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_ITC_TXINT_THR(x) (((x) & 0x7) << 12) x 72 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_APTC_RXPOLL_CNT(x) (((x) & 0xf) << 0) x 74 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_APTC_TXPOLL_CNT(x) (((x) & 0xf) << 8) x 83 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_DBLAC_RXFIFO_LTHR(x) (((x) & 0x7) << 3) x 84 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_DBLAC_RXFIFO_HTHR(x) (((x) & 0x7) << 6) x 111 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_PHYCR_PHYAD(x) (((x) & 0x1f) << 16) x 112 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_PHYCR_REGAD(x) (((x) & 0x1f) << 21) x 119 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_PHYWDATA_MIIWDATA(x) ((x) & 0xffff) x 135 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_TXDES1_TXBUF_SIZE(x) ((x) & 0x7ff) x 164 drivers/net/ethernet/faraday/ftmac100.h #define FTMAC100_RXDES1_RXBUF_SIZE(x) ((x) & 0x7ff) x 108 drivers/net/ethernet/fealnx.c #define RUN_AT(x) (jiffies + (x)) x 21 drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h #define DPAA2_WRIOP_VERSION(x, y, z) ((x) << 10 | (y) << 5 | (z) << 0) x 25 drivers/net/ethernet/freescale/enetc/enetc_mdio.c #define MDIO_CFG_CLKDIV(x) ((((x) >> 1) & 0xff) << 8) x 32 drivers/net/ethernet/freescale/enetc/enetc_mdio.c #define MDIO_CTL_DEV_ADDR(x) ((x) & 0x1f) x 33 drivers/net/ethernet/freescale/enetc/enetc_mdio.c #define MDIO_CTL_PORT_ADDR(x) (((x) & 0x1f) << 5) x 35 drivers/net/ethernet/freescale/enetc/enetc_mdio.c #define MDIO_DATA(x) ((x) & 0xffff) x 207 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_out32(addr, x) __raw_writel(x, addr) x 208 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_out16(addr, x) __raw_writew(x, addr) x 213 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_out32(addr, x) out_be32(addr, x) x 214 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_out16(addr, x) out_be16(addr, x) x 49 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_out32(addr, x) __raw_writel(x, addr) x 50 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_out16(addr, x) __raw_writew(x, addr) x 55 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_out32(addr, x) out_be32(addr, x) x 56 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_out16(addr, x) out_be16(addr, x) x 45 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out32(addr, x) __raw_writel(x, addr) x 46 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out16(addr, x) __raw_writew(x, addr) x 47 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out8(addr, x) __raw_writeb(x, addr) x 53 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out32(addr, x) out_be32(addr, x) x 54 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out16(addr, x) out_be16(addr, x) x 57 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out8(addr, x) out_8(addr, x) x 234 drivers/net/ethernet/freescale/gianfar.h #define mk_ic_icft(x) \ x 235 drivers/net/ethernet/freescale/gianfar.h (((unsigned int)x << IC_ICFT_SHIFT)&IC_ICFT_MASK) x 237 drivers/net/ethernet/freescale/gianfar.h #define mk_ic_ictt(x) (x&IC_ICTT_MASK) x 268 drivers/net/ethernet/freescale/gianfar.h #define RCTRL_PADDING(x) ((x << 16) & RCTRL_PAL_MASK) x 374 drivers/net/ethernet/freescale/gianfar.h #define ATTRELI_EL(x) (x << 16) x 376 drivers/net/ethernet/freescale/gianfar.h #define ATTRELI_EI(x) (x) x 36 drivers/net/ethernet/freescale/xgmac_mdio.c #define MDIO_STAT_CLKDIV(x) (((x>>1) & 0xff) << 8) x 39 drivers/net/ethernet/freescale/xgmac_mdio.c #define MDIO_CTL_DEV_ADDR(x) (x & 0x1f) x 40 drivers/net/ethernet/freescale/xgmac_mdio.c #define MDIO_CTL_PORT_ADDR(x) ((x & 0x1f) << 5) x 46 drivers/net/ethernet/freescale/xgmac_mdio.c #define MDIO_DATA(x) (x & 0xffff) x 84 drivers/net/ethernet/google/gve/gve_desc.h #define GVE_SEQNO(x) (be16_to_cpu(x) & 0x7) x 87 drivers/net/ethernet/google/gve/gve_desc.h #define GVE_RXFLG(x) cpu_to_be16(1 << (3 + (x))) x 466 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c #define HCLGE_SSU_MEM_ECC_ERR(x) \ x 467 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c { .int_msk = BIT(x), .msg = "ssu_mem" #x "_ecc_mbit_err", \ x 703 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h #define calc_x(x, k, v) ((x) = (~(k) & (v))) x 89 drivers/net/ethernet/i825xx/82596.c #define DEB(x,y) if (i596_debug & (x)) y x 112 drivers/net/ethernet/i825xx/82596.c #define WSWAPrfd(x) ((struct i596_rfd *) (((u32)(x)<<16) | ((((u32)(x)))>>16))) x 113 drivers/net/ethernet/i825xx/82596.c #define WSWAPrbd(x) ((struct i596_rbd *) (((u32)(x)<<16) | ((((u32)(x)))>>16))) x 114 drivers/net/ethernet/i825xx/82596.c #define WSWAPiscp(x) ((struct i596_iscp *)(((u32)(x)<<16) | ((((u32)(x)))>>16))) x 115 drivers/net/ethernet/i825xx/82596.c #define WSWAPscb(x) ((struct i596_scb *) (((u32)(x)<<16) | ((((u32)(x)))>>16))) x 116 drivers/net/ethernet/i825xx/82596.c #define WSWAPcmd(x) ((struct i596_cmd *) (((u32)(x)<<16) | ((((u32)(x)))>>16))) x 117 drivers/net/ethernet/i825xx/82596.c #define WSWAPtbd(x) ((struct i596_tbd *) (((u32)(x)<<16) | ((((u32)(x)))>>16))) x 118 drivers/net/ethernet/i825xx/82596.c #define WSWAPchar(x) ((char *) (((u32)(x)<<16) | ((((u32)(x)))>>16))) x 129 drivers/net/ethernet/i825xx/82596.c #define WSWAPrfd(x) ((struct i596_rfd *)((long)x)) x 130 drivers/net/ethernet/i825xx/82596.c #define WSWAPrbd(x) ((struct i596_rbd *)((long)x)) x 131 drivers/net/ethernet/i825xx/82596.c #define WSWAPiscp(x) ((struct i596_iscp *)((long)x)) x 132 drivers/net/ethernet/i825xx/82596.c #define WSWAPscb(x) ((struct i596_scb *)((long)x)) x 133 drivers/net/ethernet/i825xx/82596.c #define WSWAPcmd(x) ((struct i596_cmd *)((long)x)) x 134 drivers/net/ethernet/i825xx/82596.c #define WSWAPtbd(x) ((struct i596_tbd *)((long)x)) x 135 drivers/net/ethernet/i825xx/82596.c #define WSWAPchar(x) ((char *)((long)x)) x 392 drivers/net/ethernet/i825xx/82596.c static inline void MPU_PORT(struct net_device *dev, int c, volatile void *x) x 397 drivers/net/ethernet/i825xx/82596.c p->porthi = ((c) | (u32) (x)) & 0xffff; x 398 drivers/net/ethernet/i825xx/82596.c p->portlo = ((c) | (u32) (x)) >> 16; x 403 drivers/net/ethernet/i825xx/82596.c u32 v = (u32) (c) | (u32) (x); x 142 drivers/net/ethernet/i825xx/ether1.h #define CFG9_ADDRLEN(x) (x) x 151 drivers/net/ethernet/i825xx/ether1.h #define CFG10_LINPRI(x) (x) x 152 drivers/net/ethernet/i825xx/ether1.h #define CFG10_ACR(x) (x << 4) x 157 drivers/net/ethernet/i825xx/ether1.h #define CFG13_SLOTH(x) (x) x 158 drivers/net/ethernet/i825xx/ether1.h #define CFG13_RETRY(x) (x << 4) x 169 drivers/net/ethernet/i825xx/ether1.h #define CFG15_CSTF(x) (x) x 171 drivers/net/ethernet/i825xx/ether1.h #define CFG15_CDTF(x) (x << 4) x 113 drivers/net/ethernet/i825xx/lasi_82596.c #define SWAP32(x) (((u32)(x)<<16) | ((((u32)(x)))>>16)) x 114 drivers/net/ethernet/i825xx/lasi_82596.c #define SWAP16(x) (x) x 130 drivers/net/ethernet/i825xx/lasi_82596.c static void mpu_port(struct net_device *dev, int c, dma_addr_t x) x 134 drivers/net/ethernet/i825xx/lasi_82596.c u32 v = (u32) (c) | (u32) (x); x 110 drivers/net/ethernet/i825xx/lib82596.c #define DEB(x, y) if (i596_debug & (x)) { y; } x 358 drivers/net/ethernet/i825xx/lib82596.c static void mpu_port(struct net_device *dev, int c, dma_addr_t x); x 36 drivers/net/ethernet/i825xx/sni_82596.c #define SWAP32(x) cpu_to_le32((u32)(x)) x 37 drivers/net/ethernet/i825xx/sni_82596.c #define SWAP16(x) cpu_to_le16((u16)(x)) x 58 drivers/net/ethernet/i825xx/sni_82596.c static void mpu_port(struct net_device *dev, int c, dma_addr_t x) x 62 drivers/net/ethernet/i825xx/sni_82596.c u32 v = (u32) (c) | (u32) (x); x 93 drivers/net/ethernet/i825xx/sun3_82586.c #define DELAY(x) mdelay(32 * x); x 23 drivers/net/ethernet/ibm/ehea/ehea_hw.h #define QPTEMM_OFFSET(x) offsetof(struct ehea_qptemm, x) x 85 drivers/net/ethernet/ibm/ehea/ehea_hw.h #define MRMWMM_OFFSET(x) offsetof(struct ehea_mrmwmm, x) x 100 drivers/net/ethernet/ibm/ehea/ehea_hw.h #define QPEDMM_OFFSET(x) offsetof(struct ehea_qpedmm, x) x 141 drivers/net/ethernet/ibm/ehea/ehea_hw.h #define CQTEMM_OFFSET(x) offsetof(struct ehea_cqtemm, x) x 160 drivers/net/ethernet/ibm/ehea/ehea_hw.h #define EQTEMM_OFFSET(x) offsetof(struct ehea_eqtemm, x) x 125 drivers/net/ethernet/ibm/ehea/ehea_main.c int x; x 127 drivers/net/ethernet/ibm/ehea/ehea_main.c for (x = 0; x < len; x += 16) { x 129 drivers/net/ethernet/ibm/ehea/ehea_main.c msg, deb, x, *((u64 *)&deb[0]), *((u64 *)&deb[8])); x 566 drivers/net/ethernet/ibm/ehea/ehea_main.c int x; x 568 drivers/net/ethernet/ibm/ehea/ehea_main.c x = skb_index + 1; x 569 drivers/net/ethernet/ibm/ehea/ehea_main.c x &= (arr_len - 1); x 571 drivers/net/ethernet/ibm/ehea/ehea_main.c pref = skb_array[x]; x 576 drivers/net/ethernet/ibm/ehea/ehea_main.c pref = (skb_array[x]->data); x 593 drivers/net/ethernet/ibm/ehea/ehea_main.c int x; x 595 drivers/net/ethernet/ibm/ehea/ehea_main.c x = wqe_index + 1; x 596 drivers/net/ethernet/ibm/ehea/ehea_main.c x &= (arr_len - 1); x 598 drivers/net/ethernet/ibm/ehea/ehea_main.c pref = skb_array[x]; x 603 drivers/net/ethernet/ibm/ehea/ehea_main.c pref = (skb_array[x]->data); x 32 drivers/net/ethernet/ibm/emac/debug.h # define DBG(d,f,x...) EMAC_DBG(d, emac, f, ##x) x 33 drivers/net/ethernet/ibm/emac/debug.h # define MAL_DBG(d,f,x...) EMAC_DBG(d, mal, f, ##x) x 34 drivers/net/ethernet/ibm/emac/debug.h # define ZMII_DBG(d,f,x...) EMAC_DBG(d, zmii, f, ##x) x 35 drivers/net/ethernet/ibm/emac/debug.h # define RGMII_DBG(d,f,x...) EMAC_DBG(d, rgmii, f, ##x) x 38 drivers/net/ethernet/ibm/emac/debug.h # define DBG(f,x...) ((void)0) x 39 drivers/net/ethernet/ibm/emac/debug.h # define MAL_DBG(d,f,x...) ((void)0) x 40 drivers/net/ethernet/ibm/emac/debug.h # define ZMII_DBG(d,f,x...) ((void)0) x 41 drivers/net/ethernet/ibm/emac/debug.h # define RGMII_DBG(d,f,x...) ((void)0) x 44 drivers/net/ethernet/ibm/emac/debug.h # define DBG2(d,f,x...) DBG(d,f, ##x) x 45 drivers/net/ethernet/ibm/emac/debug.h # define MAL_DBG2(d,f,x...) MAL_DBG(d,f, ##x) x 46 drivers/net/ethernet/ibm/emac/debug.h # define ZMII_DBG2(d,f,x...) ZMII_DBG(d,f, ##x) x 47 drivers/net/ethernet/ibm/emac/debug.h # define RGMII_DBG2(d,f,x...) RGMII_DBG(d,f, ##x) x 49 drivers/net/ethernet/ibm/emac/debug.h # define DBG2(f,x...) ((void)0) x 50 drivers/net/ethernet/ibm/emac/debug.h # define MAL_DBG2(d,f,x...) ((void)0) x 51 drivers/net/ethernet/ibm/emac/debug.h # define ZMII_DBG2(d,f,x...) ((void)0) x 52 drivers/net/ethernet/ibm/emac/debug.h # define RGMII_DBG2(d,f,x...) ((void)0) x 69 drivers/net/ethernet/ibm/emac/rgmii.h # define rgmii_attach(x,y,z) (-ENXIO) x 70 drivers/net/ethernet/ibm/emac/rgmii.h # define rgmii_detach(x,y) do { } while(0) x 73 drivers/net/ethernet/ibm/emac/rgmii.h # define rgmii_set_speed(x,y,z) do { } while(0) x 74 drivers/net/ethernet/ibm/emac/rgmii.h # define rgmii_get_regs_len(x) 0 x 75 drivers/net/ethernet/ibm/emac/rgmii.h # define rgmii_dump_regs(x,buf) (buf) x 83 drivers/net/ethernet/ibm/emac/tah.h # define tah_attach(x,y) (-ENXIO) x 84 drivers/net/ethernet/ibm/emac/tah.h # define tah_detach(x,y) do { } while(0) x 85 drivers/net/ethernet/ibm/emac/tah.h # define tah_reset(x) do { } while(0) x 86 drivers/net/ethernet/ibm/emac/tah.h # define tah_get_regs_len(x) 0 x 87 drivers/net/ethernet/ibm/emac/tah.h # define tah_dump_regs(x,buf) (buf) x 64 drivers/net/ethernet/ibm/emac/zmii.h # define zmii_attach(x,y,z) (-ENXIO) x 65 drivers/net/ethernet/ibm/emac/zmii.h # define zmii_detach(x,y) do { } while(0) x 66 drivers/net/ethernet/ibm/emac/zmii.h # define zmii_get_mdio(x,y) do { } while(0) x 67 drivers/net/ethernet/ibm/emac/zmii.h # define zmii_put_mdio(x,y) do { } while(0) x 68 drivers/net/ethernet/ibm/emac/zmii.h # define zmii_set_speed(x,y,z) do { } while(0) x 69 drivers/net/ethernet/ibm/emac/zmii.h # define zmii_get_regs_len(x) 0 x 70 drivers/net/ethernet/ibm/emac/zmii.h # define zmii_dump_regs(x,buf) (buf) x 455 drivers/net/ethernet/intel/i40e/i40e_txrx.h #define ITR_IS_BULK(x) (!((x) & I40E_ITR_ADAPTIVE_LATENCY)) x 412 drivers/net/ethernet/intel/iavf/iavf_txrx.h #define ITR_IS_BULK(x) (!((x) & IAVF_ITR_ADAPTIVE_LATENCY)) x 262 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_TXSCHED_GET_NODE_TEID(x) le32_to_cpu((x)->info.node_teid) x 19 drivers/net/ethernet/intel/ixgb/ixgb_osdep.h #define ASSERT(x) BUG_ON(!(x)) x 26 drivers/net/ethernet/intel/ixgbevf/mbx.h #define IXGBE_PFMAILBOX(x) (0x04B00 + (4 * (x))) x 18 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VTEITR(x) (0x00820 + (4 * (x))) x 19 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VTIVAR(x) (0x00120 + (4 * (x))) x 21 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VTRSCINT(x) (0x00180 + (4 * (x))) x 22 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * (x))) x 23 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * (x))) x 24 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * (x))) x 25 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRDH(x) (0x01010 + (0x40 * (x))) x 26 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRDT(x) (0x01018 + (0x40 * (x))) x 27 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * (x))) x 28 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * (x))) x 29 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRSCCTL(x) (0x0102C + (0x40 * (x))) x 31 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTDBAL(x) (0x02000 + (0x40 * (x))) x 32 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTDBAH(x) (0x02004 + (0x40 * (x))) x 33 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTDLEN(x) (0x02008 + (0x40 * (x))) x 34 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTDH(x) (0x02010 + (0x40 * (x))) x 35 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTDT(x) (0x02018 + (0x40 * (x))) x 36 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTXDCTL(x) (0x02028 + (0x40 * (x))) x 37 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTDWBAL(x) (0x02038 + (0x40 * (x))) x 38 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFTDWBAH(x) (0x0203C + (0x40 * (x))) x 39 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFDCA_RXCTRL(x) (0x0100C + (0x40 * (x))) x 40 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFDCA_TXCTRL(x) (0x0200c + (0x40 * (x))) x 49 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRSSRK(x) (0x3100 + ((x) * 4)) x 50 drivers/net/ethernet/intel/ixgbevf/regs.h #define IXGBE_VFRETA(x) (0x3200 + ((x) * 4)) x 806 drivers/net/ethernet/jme.h static inline u32 smi_reg_addr(int x) x 808 drivers/net/ethernet/jme.h return (x << SMI_REG_ADDR_SHIFT) & SMI_REG_ADDR_MASK; x 811 drivers/net/ethernet/jme.h static inline u32 smi_phy_addr(int x) x 813 drivers/net/ethernet/jme.h return (x << SMI_PHY_ADDR_SHIFT) & SMI_PHY_ADDR_MASK; x 67 drivers/net/ethernet/lantiq_etop.c #define IS_TX(x) (x == LTQ_ETOP_TX_CHANNEL) x 68 drivers/net/ethernet/lantiq_etop.c #define IS_RX(x) (x == LTQ_ETOP_RX_CHANNEL) x 70 drivers/net/ethernet/lantiq_etop.c #define ltq_etop_r32(x) ltq_r32(ltq_etop_membase + (x)) x 71 drivers/net/ethernet/lantiq_etop.c #define ltq_etop_w32(x, y) ltq_w32(x, ltq_etop_membase + (y)) x 72 drivers/net/ethernet/lantiq_etop.c #define ltq_etop_w32_mask(x, y, z) \ x 73 drivers/net/ethernet/lantiq_etop.c ltq_w32_mask(x, y, ltq_etop_membase + (z)) x 98 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_CLS_FLOW_TBL0_ENG(x) ((x) << 1) x 104 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_CLS_FLOW_TBL1_N_FIELDS(x) (x) x 107 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_CLS_FLOW_TBL1_PRIO(x) ((x) << 9) x 109 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_CLS_FLOW_TBL1_SEQ(x) ((x) << 15) x 113 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_CLS_FLOW_TBL2_FLD(n, x) ((x) << ((n) * 6)) x 26 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGX_OFFSET(x) ((x) * MAX_LMAC_PER_CGX) x 111 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define FIELD_SET(m, y, x) \ x 112 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h (((x) & ~(m)) | \ x 30 drivers/net/ethernet/marvell/octeontx2/af/common.h #define Q_COUNT(x) (16ULL << (2 * x)) x 31 drivers/net/ethernet/marvell/octeontx2/af/common.h #define Q_SIZE(x, n) ((ilog2(x) - (n)) / 2) x 119 drivers/net/ethernet/marvell/octeontx2/af/common.h #define NPA_AURA_COUNT(x) (1ULL << ((x) + 6)) x 360 drivers/net/ethernet/marvell/pxa168_eth.c static inline u8 flip_8_bits(u8 x) x 362 drivers/net/ethernet/marvell/pxa168_eth.c return (((x) & 0x01) << 3) | (((x) & 0x02) << 1) x 363 drivers/net/ethernet/marvell/pxa168_eth.c | (((x) & 0x04) >> 1) | (((x) & 0x08) >> 3) x 364 drivers/net/ethernet/marvell/pxa168_eth.c | (((x) & 0x10) << 3) | (((x) & 0x20) << 1) x 365 drivers/net/ethernet/marvell/pxa168_eth.c | (((x) & 0x40) >> 1) | (((x) & 0x80) >> 3); x 882 drivers/net/ethernet/marvell/skge.h #define WOL_REGS(port, x) (x + (port)*0x80) x 1452 drivers/net/ethernet/marvell/skge.h #define PHY_M_EC_M_DSC(x) ((u16)(x)<<10) /* 00=1x; 01=2x; 10=3x; 11=4x */ x 1453 drivers/net/ethernet/marvell/skge.h #define PHY_M_EC_S_DSC(x) ((u16)(x)<<8) /* 00=dis; 01=1x; 10=2x; 11=3x */ x 1454 drivers/net/ethernet/marvell/skge.h #define PHY_M_EC_MAC_S(x) ((u16)(x)<<4) /* 01X=0; 110=2.5; 111=25 (MHz) */ x 1456 drivers/net/ethernet/marvell/skge.h #define PHY_M_EC_M_DSC_2(x) ((u16)(x)<<9) /* 000=1x; 001=2x; 010=3x; 011=4x */ x 1475 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_PULS_DUR(x) (((u16)(x)<<12) & PHY_M_LEDC_PULS_MSK) x 1476 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_BLINK_RT(x) (((u16)(x)<<8) & PHY_M_LEDC_BL_R_MSK) x 1509 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_MO_SGMII(x) ((x)<<14) /* Bit 15..14: SGMII AN Timer */ x 1511 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_MO_DUP(x) ((x)<<10) /* Bit 11..10: Duplex */ x 1512 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_MO_10(x) ((x)<<8) /* Bit 9.. 8: Link 10 */ x 1513 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_MO_100(x) ((x)<<6) /* Bit 7.. 6: Link 100 */ x 1514 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_MO_1000(x) ((x)<<4) /* Bit 5.. 4: Link 1000 */ x 1515 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_MO_RX(x) ((x)<<2) /* Bit 3.. 2: Rx */ x 1516 drivers/net/ethernet/marvell/skge.h #define PHY_M_LED_MO_TX(x) ((x)<<0) /* Bit 1.. 0: Tx */ x 1578 drivers/net/ethernet/marvell/skge.h #define PHY_M_FELP_LED2_CTRL(x) (((x)<<8) & PHY_M_FELP_LED2_MSK) x 1579 drivers/net/ethernet/marvell/skge.h #define PHY_M_FELP_LED1_CTRL(x) (((x)<<4) & PHY_M_FELP_LED1_MSK) x 1580 drivers/net/ethernet/marvell/skge.h #define PHY_M_FELP_LED0_CTRL(x) (((x)<<0) & PHY_M_FELP_LED0_MSK) x 1617 drivers/net/ethernet/marvell/skge.h #define PHY_M_LEDC_LOS_CTRL(x) (((x)<<12) & PHY_M_LEDC_LOS_MSK) x 1618 drivers/net/ethernet/marvell/skge.h #define PHY_M_LEDC_INIT_CTRL(x) (((x)<<8) & PHY_M_LEDC_INIT_MSK) x 1619 drivers/net/ethernet/marvell/skge.h #define PHY_M_LEDC_STA1_CTRL(x) (((x)<<4) & PHY_M_LEDC_STA1_MSK) x 1620 drivers/net/ethernet/marvell/skge.h #define PHY_M_LEDC_STA0_CTRL(x) (((x)<<0) & PHY_M_LEDC_STA0_MSK) x 1766 drivers/net/ethernet/marvell/skge.h #define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK) x 1788 drivers/net/ethernet/marvell/skge.h #define TX_JAM_LEN_VAL(x) (((x)<<14) & GM_TXPA_JAMLEN_MSK) x 1789 drivers/net/ethernet/marvell/skge.h #define TX_JAM_IPG_VAL(x) (((x)<<9) & GM_TXPA_JAMIPG_MSK) x 1790 drivers/net/ethernet/marvell/skge.h #define TX_IPG_JAM_DATA(x) (((x)<<4) & GM_TXPA_JAMDAT_MSK) x 1802 drivers/net/ethernet/marvell/skge.h #define DATA_BLIND_VAL(x) (((x)<<11) & GM_SMOD_DATABL_MSK) x 1805 drivers/net/ethernet/marvell/skge.h #define IPG_DATA_VAL(x) (x & GM_SMOD_IPG_MSK) x 1817 drivers/net/ethernet/marvell/skge.h #define GM_SMI_CT_PHY_AD(x) (((x)<<11) & GM_SMI_CT_PHY_A_MSK) x 1818 drivers/net/ethernet/marvell/skge.h #define GM_SMI_CT_REG_AD(x) (((x)<<6) & GM_SMI_CT_REG_A_MSK) x 2005 drivers/net/ethernet/marvell/skge.h #define WOL_CTL_PATT_ENA(x) (1 << (x)) x 70 drivers/net/ethernet/marvell/sky2.c #define RING_NEXT(x, s) (((x)+1) & ((s)-1)) x 614 drivers/net/ethernet/marvell/sky2.h #define CFG_LED_MODE(x) (((x) & CFG_LED_MODE_MSK) >> 2) x 1127 drivers/net/ethernet/marvell/sky2.h #define WOL_REGS(port, x) (x + (port)*0x80) x 1331 drivers/net/ethernet/marvell/sky2.h #define PHY_M_PC_MDI_XMODE(x) (((u16)(x)<<5) & PHY_M_PC_MDIX_MSK) x 1435 drivers/net/ethernet/marvell/sky2.h #define PHY_M_EC_M_DSC(x) ((u16)(x)<<10 & PHY_M_EC_M_DSC_MSK) x 1437 drivers/net/ethernet/marvell/sky2.h #define PHY_M_EC_S_DSC(x) ((u16)(x)<<8 & PHY_M_EC_S_DSC_MSK) x 1439 drivers/net/ethernet/marvell/sky2.h #define PHY_M_EC_DSC_2(x) ((u16)(x)<<9 & PHY_M_EC_M_DSC_MSK2) x 1441 drivers/net/ethernet/marvell/sky2.h #define PHY_M_EC_MAC_S(x) ((u16)(x)<<4 & PHY_M_EC_MAC_S_MSK) x 1452 drivers/net/ethernet/marvell/sky2.h #define PHY_M_PC_DSC(x) (((u16)(x)<<12) & PHY_M_PC_DSC_MSK) x 1482 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_PULS_DUR(x) (((u16)(x)<<12) & PHY_M_LEDC_PULS_MSK) x 1494 drivers/net/ethernet/marvell/sky2.h #define PHY_M_POLC_LS1_P_MIX(x) (((x)<<12) & PHY_M_POLC_LS1M_MSK) x 1495 drivers/net/ethernet/marvell/sky2.h #define PHY_M_POLC_IS0_P_MIX(x) (((x)<<8) & PHY_M_POLC_IS0M_MSK) x 1496 drivers/net/ethernet/marvell/sky2.h #define PHY_M_POLC_LOS_CTRL(x) (((x)<<6) & PHY_M_POLC_LOS_MSK) x 1497 drivers/net/ethernet/marvell/sky2.h #define PHY_M_POLC_INIT_CTRL(x) (((x)<<4) & PHY_M_POLC_INIT_MSK) x 1498 drivers/net/ethernet/marvell/sky2.h #define PHY_M_POLC_STA1_CTRL(x) (((x)<<2) & PHY_M_POLC_STA1_MSK) x 1499 drivers/net/ethernet/marvell/sky2.h #define PHY_M_POLC_STA0_CTRL(x) (((x)<<0) & PHY_M_POLC_STA0_MSK) x 1512 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_BLINK_RT(x) (((u16)(x)<<8) & PHY_M_LEDC_BL_R_MSK) x 1523 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_MO_SGMII(x) ((x)<<14) /* Bit 15..14: SGMII AN Timer */ x 1525 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_MO_DUP(x) ((x)<<10) /* Bit 11..10: Duplex */ x 1526 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_MO_10(x) ((x)<<8) /* Bit 9.. 8: Link 10 */ x 1527 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_MO_100(x) ((x)<<6) /* Bit 7.. 6: Link 100 */ x 1528 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_MO_1000(x) ((x)<<4) /* Bit 5.. 4: Link 1000 */ x 1529 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_MO_RX(x) ((x)<<2) /* Bit 3.. 2: Rx */ x 1530 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LED_MO_TX(x) ((x)<<0) /* Bit 1.. 0: Tx */ x 1573 drivers/net/ethernet/marvell/sky2.h #define PHY_M_FELP_LED2_CTRL(x) (((u16)(x)<<8) & PHY_M_FELP_LED2_MSK) x 1574 drivers/net/ethernet/marvell/sky2.h #define PHY_M_FELP_LED1_CTRL(x) (((u16)(x)<<4) & PHY_M_FELP_LED1_MSK) x 1575 drivers/net/ethernet/marvell/sky2.h #define PHY_M_FELP_LED0_CTRL(x) (((u16)(x)<<0) & PHY_M_FELP_LED0_MSK) x 1620 drivers/net/ethernet/marvell/sky2.h #define PHY_M_MAC_MODE_SEL(x) (((x)<<7) & PHY_M_MAC_MD_MSK) x 1630 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LEDC_LOS_CTRL(x) (((x)<<12) & PHY_M_LEDC_LOS_MSK) x 1631 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LEDC_INIT_CTRL(x) (((x)<<8) & PHY_M_LEDC_INIT_MSK) x 1632 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LEDC_STA1_CTRL(x) (((x)<<4) & PHY_M_LEDC_STA1_MSK) x 1633 drivers/net/ethernet/marvell/sky2.h #define PHY_M_LEDC_STA0_CTRL(x) (((x)<<0) & PHY_M_LEDC_STA0_MSK) x 1777 drivers/net/ethernet/marvell/sky2.h #define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK) x 1801 drivers/net/ethernet/marvell/sky2.h #define TX_JAM_LEN_VAL(x) (((x)<<14) & GM_TXPA_JAMLEN_MSK) x 1802 drivers/net/ethernet/marvell/sky2.h #define TX_JAM_IPG_VAL(x) (((x)<<9) & GM_TXPA_JAMIPG_MSK) x 1803 drivers/net/ethernet/marvell/sky2.h #define TX_IPG_JAM_DATA(x) (((x)<<4) & GM_TXPA_JAMDAT_MSK) x 1804 drivers/net/ethernet/marvell/sky2.h #define TX_BACK_OFF_LIM(x) ((x) & GM_TXPA_BO_LIM_MSK) x 1819 drivers/net/ethernet/marvell/sky2.h #define DATA_BLIND_VAL(x) (((x)<<11) & GM_SMOD_DATABL_MSK) x 1820 drivers/net/ethernet/marvell/sky2.h #define IPG_DATA_VAL(x) (x & GM_SMOD_IPG_MSK) x 1835 drivers/net/ethernet/marvell/sky2.h #define GM_SMI_CT_PHY_AD(x) (((u16)(x)<<11) & GM_SMI_CT_PHY_A_MSK) x 1836 drivers/net/ethernet/marvell/sky2.h #define GM_SMI_CT_REG_AD(x) (((u16)(x)<<6) & GM_SMI_CT_REG_A_MSK) x 29 drivers/net/ethernet/mediatek/mtk_eth_soc.c #define MTK_ETHTOOL_STAT(x) { #x, \ x 30 drivers/net/ethernet/mediatek/mtk_eth_soc.c offsetof(struct mtk_hw_stats, x) / sizeof(u64) } x 83 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000)) x 89 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) x 92 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000)) x 96 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_PRX_BASE_PTR_CFG(x) (MTK_PRX_BASE_PTR0 + (x * 0x10)) x 100 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_PRX_MAX_CNT_CFG(x) (MTK_PRX_MAX_CNT0 + (x * 0x10)) x 104 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_PRX_CRX_IDX_CFG(x) (MTK_PRX_CRX_IDX0 + (x * 0x10)) x 128 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_PST_DRX_IDX_CFG(x) (MTK_PST_DRX_IDX0 << (x)) x 155 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_LRO_DIP_DW0_CFG(x) (MTK_LRO_RX_RING0_DIP_DW0 + (x * 0x40)) x 162 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_LRO_CTRL_DW1_CFG(x) (MTK_LRO_RX_RING0_CTRL_DW1 + (x * 0x40)) x 163 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_LRO_CTRL_DW2_CFG(x) (MTK_LRO_RX_RING0_CTRL_DW2 + (x * 0x40)) x 164 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_LRO_CTRL_DW3_CFG(x) (MTK_LRO_RX_RING0_CTRL_DW3 + (x * 0x40)) x 174 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_QTX_CFG(x) (0x1800 + (x * 0x10)) x 178 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_QTX_SCH(x) (0x1804 + (x * 0x10)) x 320 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_MAC_MCR(x) (0x10100 + (x * 0x100)) x 337 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define MTK_MAC_MSR(x) (0x10108 + (x * 0x100)) x 350 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define DQSI0(x) ((x << 0) & GENMASK(6, 0)) x 351 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define DQSI1(x) ((x << 8) & GENMASK(14, 8)) x 352 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define RXCTL_DMWTLAT(x) ((x << 16) & GENMASK(18, 16)) x 362 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define TXCTL_DMWTLAT(x) ((x << 16) & GENMASK(18, 16)) x 369 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define TD_DM_DRVP(x) ((x) & 0xf) x 370 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define TD_DM_DRVN(x) (((x) & 0xf) << 4) x 399 drivers/net/ethernet/mediatek/mtk_eth_soc.h #define SYSCFG0_GE_MODE(x, y) (x << (12 + (y * 2))) x 217 drivers/net/ethernet/mellanox/mlx4/mlx4_en.h #define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x)) x 218 drivers/net/ethernet/mellanox/mlx4/mlx4_en.h #define XNOR(x, y) (!(x) == !(y)) x 45 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c static struct mlx5e_ipsec_sa_entry *to_ipsec_sa_entry(struct xfrm_state *x) x 49 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (!x) x 52 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c sa = (struct mlx5e_ipsec_sa_entry *)x->xso.offload_handle; x 56 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c WARN_ON(sa->x != x); x 69 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c ret = sa_entry->x; x 122 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (!(sa_entry->x->props.flags & XFRM_STATE_ESN)) { x 127 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c replay_esn = sa_entry->x->replay_esn; x 131 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c sa_entry->esn_state.esn = xfrm_replay_seqhi(sa_entry->x, x 153 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c struct xfrm_state *x = sa_entry->x; x 163 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c crypto_data_len = (x->aead->alg_key_len + 7) / 8; x 166 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c memcpy(aes_gcm->aes_key, x->aead->alg_key, key_len); x 170 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c aead = x->data; x 174 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c memcpy(&aes_gcm->salt, x->aead->alg_key + key_len, x 178 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c aes_gcm->icv_len = x->aead->alg_icv_len; x 195 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c attrs->action = (!(x->xso.flags & XFRM_OFFLOAD_INBOUND)) ? x 199 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c attrs->flags |= (x->props.mode == XFRM_MODE_TRANSPORT) ? x 204 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c static inline int mlx5e_xfrm_validate_state(struct xfrm_state *x) x 206 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c struct net_device *netdev = x->xso.dev; x 211 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.aalgo != SADB_AALG_NONE) { x 215 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.ealgo != SADB_X_EALG_AES_GCM_ICV16) { x 219 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.calgo != SADB_X_CALG_NONE) { x 223 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.flags & XFRM_STATE_ESN && x 229 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.family != AF_INET && x 230 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c x->props.family != AF_INET6) { x 234 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.mode != XFRM_MODE_TRANSPORT && x 235 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c x->props.mode != XFRM_MODE_TUNNEL) { x 239 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->id.proto != IPPROTO_ESP) { x 243 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->encap) { x 247 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (!x->aead) { x 251 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->aead->alg_icv_len != 128) { x 255 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if ((x->aead->alg_key_len != 128 + 32) && x 256 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c (x->aead->alg_key_len != 256 + 32)) { x 260 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->tfcpad) { x 264 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (!x->geniv) { x 268 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (strcmp(x->geniv, "seqiv")) { x 272 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.family == AF_INET6 && x 281 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c static int mlx5e_xfrm_add_state(struct xfrm_state *x) x 284 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c struct net_device *netdev = x->xso.dev; x 293 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c err = mlx5e_xfrm_validate_state(x); x 303 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c sa_entry->x = x; x 309 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->xso.flags & XFRM_OFFLOAD_INBOUND) { x 316 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c sa_entry->set_iv_op = (x->props.flags & XFRM_STATE_ESN) ? x 334 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.family == AF_INET) { x 335 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c saddr[3] = x->props.saddr.a4; x 336 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c daddr[3] = x->id.daddr.a4; x 338 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c memcpy(saddr, x->props.saddr.a6, sizeof(saddr)); x 339 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c memcpy(daddr, x->id.daddr.a6, sizeof(daddr)); x 342 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c spi = x->id.spi; x 353 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c x->xso.offload_handle = (unsigned long)sa_entry; x 359 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->xso.flags & XFRM_OFFLOAD_INBOUND) { x 369 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c static void mlx5e_xfrm_del_state(struct xfrm_state *x) x 371 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c struct mlx5e_ipsec_sa_entry *sa_entry = to_ipsec_sa_entry(x); x 376 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->xso.flags & XFRM_OFFLOAD_INBOUND) x 380 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c static void mlx5e_xfrm_free_state(struct xfrm_state *x) x 382 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c struct mlx5e_ipsec_sa_entry *sa_entry = to_ipsec_sa_entry(x); x 393 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->xso.flags & XFRM_OFFLOAD_INBOUND) x 444 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c static bool mlx5e_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x) x 446 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c if (x->props.family == AF_INET) { x 481 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c static void mlx5e_xfrm_advance_esn_state(struct xfrm_state *x) x 483 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c struct mlx5e_ipsec_sa_entry *sa_entry = to_ipsec_sa_entry(x); x 99 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h struct xfrm_state *x; x 103 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h void (*set_iv_op)(struct sk_buff *skb, struct xfrm_state *x, x 109 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c static int mlx5e_ipsec_remove_trailer(struct sk_buff *skb, struct xfrm_state *x) x 111 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c unsigned int alen = crypto_aead_authsize(x->data); x 168 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c void mlx5e_ipsec_set_iv_esn(struct sk_buff *skb, struct xfrm_state *x, x 171 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 190 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c void mlx5e_ipsec_set_iv(struct sk_buff *skb, struct xfrm_state *x, x 244 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c struct xfrm_state *x; x 256 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c x = xfrm_input_state(skb); x 257 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c if (unlikely(!x)) { x 262 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c if (unlikely(!x->xso.offload_handle || x 270 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c if (unlikely(mlx5e_ipsec_remove_trailer(skb, x))) { x 279 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c mlx5e_ipsec_set_swp(skb, &wqe->eth, x->props.mode, xo); x 280 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c sa_entry = (struct mlx5e_ipsec_sa_entry *)x->xso.offload_handle; x 281 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c sa_entry->set_iv_op(skb, x, xo); x 368 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c struct xfrm_state *x; x 371 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c x = sp->xvec[0]; x 372 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c if (x && x->xso.offload_handle) x 51 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h void mlx5e_ipsec_set_iv_esn(struct sk_buff *skb, struct xfrm_state *x, x 53 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h void mlx5e_ipsec_set_iv(struct sk_buff *skb, struct xfrm_state *x, x 2523 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c #define MLX5_GET_CTR(p, x) \ x 2524 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c MLX5_GET64(query_vport_counter_out, p, x) x 88 drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c #define MLXFW_ALIGN_DOWN(x, align_bits) ((x) & ~((1 << (align_bits)) - 1)) x 89 drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c #define MLXFW_ALIGN_UP(x, align_bits) \ x 90 drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c MLXFW_ALIGN_DOWN((x) + ((1 << (align_bits)) - 1), (align_bits)) x 259 drivers/net/ethernet/microchip/enc28j60_hw.h #define TSV_BYTEOF(x) ((x) / 8) x 260 drivers/net/ethernet/microchip/enc28j60_hw.h #define TSV_BITMASK(x) (1 << ((x) % 8)) x 261 drivers/net/ethernet/microchip/enc28j60_hw.h #define TSV_GETBIT(x, y) (((x)[TSV_BYTEOF(y)] & TSV_BITMASK(y)) ? 1 : 0) x 279 drivers/net/ethernet/microchip/enc28j60_hw.h #define RSV_BITMASK(x) (1 << ((x) - 16)) x 280 drivers/net/ethernet/microchip/enc28j60_hw.h #define RSV_GETBIT(x, y) (((x) & RSV_BITMASK(y)) ? 1 : 0) x 419 drivers/net/ethernet/microchip/encx24j600_hw.h #define RSV_BITMASK(x) (1 << ((x) - 16)) x 420 drivers/net/ethernet/microchip/encx24j600_hw.h #define RSV_GETBIT(x, y) (((x) & RSV_BITMASK(y)) ? 1 : 0) x 178 drivers/net/ethernet/microchip/lan743x_main.h #define RFE_ADDR_FILT_HI(x) (0x400 + (8 * (x))) x 182 drivers/net/ethernet/microchip/lan743x_main.h #define RFE_ADDR_FILT_LO(x) (0x404 + (8 * (x))) x 37 drivers/net/ethernet/mscc/ocelot_ace.c #define BITS_TO_32BIT(x) (1 + (((x) - 1) / ENTRY_WIDTH)) x 15 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_ANAGEFIL_PID_VAL(x) (((x) << 14) & GENMASK(18, 14)) x 17 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_ANAGEFIL_PID_VAL_X(x) (((x) & GENMASK(18, 14)) >> 14) x 19 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_ANAGEFIL_VID_VAL(x) ((x) & GENMASK(12, 0)) x 24 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_STORMLIMIT_CFG_STORM_RATE(x) (((x) << 3) & GENMASK(6, 3)) x 26 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_STORMLIMIT_CFG_STORM_RATE_X(x) (((x) & GENMASK(6, 3)) >> 3) x 28 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_STORMLIMIT_CFG_STORM_MODE(x) ((x) & GENMASK(1, 0)) x 32 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_AUTOAGE_AGE_PERIOD(x) (((x) << 1) & GENMASK(20, 1)) x 34 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_AUTOAGE_AGE_PERIOD_X(x) (((x) & GENMASK(20, 1)) >> 1) x 40 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_AGENCTRL_FID_MASK(x) (((x) << 12) & GENMASK(23, 12)) x 42 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_AGENCTRL_FID_MASK_X(x) (((x) & GENMASK(23, 12)) >> 12) x 58 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_FLD_UNICAST(x) (((x) << 12) & GENMASK(17, 12)) x 60 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_FLD_UNICAST_X(x) (((x) & GENMASK(17, 12)) >> 12) x 61 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_FLD_BROADCAST(x) (((x) << 6) & GENMASK(11, 6)) x 63 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_FLD_BROADCAST_X(x) (((x) & GENMASK(11, 6)) >> 6) x 64 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_FLD_MULTICAST(x) ((x) & GENMASK(5, 0)) x 67 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_IPMC_FLD_MC4_CTRL(x) (((x) << 18) & GENMASK(23, 18)) x 69 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_IPMC_FLD_MC4_CTRL_X(x) (((x) & GENMASK(23, 18)) >> 18) x 70 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_IPMC_FLD_MC4_DATA(x) (((x) << 12) & GENMASK(17, 12)) x 72 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_IPMC_FLD_MC4_DATA_X(x) (((x) & GENMASK(17, 12)) >> 12) x 73 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_IPMC_FLD_MC6_CTRL(x) (((x) << 6) & GENMASK(11, 6)) x 75 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_IPMC_FLD_MC6_CTRL_X(x) (((x) & GENMASK(11, 6)) >> 6) x 76 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FLOODING_IPMC_FLD_MC6_DATA(x) ((x) & GENMASK(5, 0)) x 81 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SFLOW_CFG_SF_RATE(x) (((x) << 2) & GENMASK(13, 2)) x 83 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SFLOW_CFG_SF_RATE_X(x) (((x) & GENMASK(13, 2)) >> 2) x 90 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_MODE_VLAN_PARSE_CFG(x) (((x) << 1) & GENMASK(2, 1)) x 92 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_MODE_VLAN_PARSE_CFG_X(x) (((x) & GENMASK(2, 1)) >> 1) x 99 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PGID_PGID_PGID(x) ((x) & GENMASK(11, 0)) x 101 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PGID_PGID_CPUQ_DST_PGID(x) (((x) << 27) & GENMASK(29, 27)) x 103 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PGID_PGID_CPUQ_DST_PGID_X(x) (((x) & GENMASK(29, 27)) >> 27) x 105 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACHDATA_VID(x) (((x) << 16) & GENMASK(28, 16)) x 107 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACHDATA_VID_X(x) (((x) & GENMASK(28, 16)) >> 16) x 108 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACHDATA_MACHDATA(x) ((x) & GENMASK(15, 0)) x 112 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMDATA_SSID(x) (((x) << 9) & GENMASK(15, 9)) x 114 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMDATA_SSID_X(x) (((x) & GENMASK(15, 9)) >> 9) x 116 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMDATA_SFID(x) ((x) & GENMASK(7, 0)) x 124 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACACCESS_ENTRYTYPE(x) (((x) << 9) & GENMASK(10, 9)) x 126 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACACCESS_ENTRYTYPE_X(x) (((x) & GENMASK(10, 9)) >> 9) x 127 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACACCESS_DEST_IDX(x) (((x) << 3) & GENMASK(8, 3)) x 129 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACACCESS_DEST_IDX_X(x) (((x) & GENMASK(8, 3)) >> 3) x 130 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_MACACCESS_MAC_TABLE_CMD(x) ((x) & GENMASK(2, 0)) x 141 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_VLANACCESS_VLAN_PORT_MASK(x) (((x) << 2) & GENMASK(13, 2)) x 143 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_VLANACCESS_VLAN_PORT_MASK_X(x) (((x) & GENMASK(13, 2)) >> 2) x 144 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_VLANACCESS_VLAN_TBL_CMD(x) ((x) & GENMASK(1, 0)) x 156 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_VLANTIDX_V_INDEX(x) ((x) & GENMASK(11, 0)) x 159 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXACCESS_ISDX_PORT_MASK(x) (((x) << 2) & GENMASK(8, 2)) x 161 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXACCESS_ISDX_PORT_MASK_X(x) (((x) & GENMASK(8, 2)) >> 2) x 162 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXACCESS_ISDX_TBL_CMD(x) ((x) & GENMASK(1, 0)) x 165 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXTIDX_ISDX_SDLBI(x) (((x) << 21) & GENMASK(28, 21)) x 167 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXTIDX_ISDX_SDLBI_X(x) (((x) & GENMASK(28, 21)) >> 21) x 168 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXTIDX_ISDX_MSTI(x) (((x) << 15) & GENMASK(20, 15)) x 170 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXTIDX_ISDX_MSTI_X(x) (((x) & GENMASK(20, 15)) >> 15) x 173 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ISDXTIDX_ISDX_INDEX(x) ((x) & GENMASK(7, 0)) x 178 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ENTRYLIM_ENTRYLIM(x) (((x) << 14) & GENMASK(17, 14)) x 180 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ENTRYLIM_ENTRYLIM_X(x) (((x) & GENMASK(17, 14)) >> 14) x 181 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_ENTRYLIM_ENTRYSTAT(x) ((x) & GENMASK(13, 0)) x 184 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMACCESS_GEN_REC_SEQ_NUM(x) (((x) << 4) & GENMASK(31, 4)) x 186 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMACCESS_GEN_REC_SEQ_NUM_X(x) (((x) & GENMASK(31, 4)) >> 4) x 189 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMACCESS_STREAM_TBL_CMD(x) ((x) & GENMASK(1, 0)) x 192 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMTIDX_SEQ_GEN_ERR_STATUS(x) (((x) << 30) & GENMASK(31, 30)) x 194 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMTIDX_SEQ_GEN_ERR_STATUS_X(x) (((x) & GENMASK(31, 30)) >> 30) x 195 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMTIDX_S_INDEX(x) (((x) << 16) & GENMASK(22, 16)) x 197 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMTIDX_S_INDEX_X(x) (((x) & GENMASK(22, 16)) >> 16) x 199 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMTIDX_SEQ_HISTORY_LEN(x) (((x) << 8) & GENMASK(13, 8)) x 201 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMTIDX_SEQ_HISTORY_LEN_X(x) (((x) & GENMASK(13, 8)) >> 8) x 205 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_STREAMTIDX_SEQ_SPACE_LOG2(x) ((x) & GENMASK(4, 0)) x 208 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SEQ_MASK_SPLIT_MASK(x) (((x) << 16) & GENMASK(22, 16)) x 210 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SEQ_MASK_SPLIT_MASK_X(x) (((x) & GENMASK(22, 16)) >> 16) x 211 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SEQ_MASK_INPUT_PORT_MASK(x) ((x) & GENMASK(6, 0)) x 214 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFID_MASK_IGR_PORT_MASK(x) (((x) << 1) & GENMASK(7, 1)) x 216 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFID_MASK_IGR_PORT_MASK_X(x) (((x) & GENMASK(7, 1)) >> 1) x 220 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDACCESS_IGR_PRIO(x) (((x) << 19) & GENMASK(21, 19)) x 222 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDACCESS_IGR_PRIO_X(x) (((x) & GENMASK(21, 19)) >> 19) x 224 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDACCESS_MAX_SDU_LEN(x) (((x) << 2) & GENMASK(17, 2)) x 226 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDACCESS_MAX_SDU_LEN_X(x) (((x) & GENMASK(17, 2)) >> 2) x 227 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDACCESS_SFID_TBL_CMD(x) ((x) & GENMASK(1, 0)) x 231 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDTIDX_SGID(x) (((x) << 18) & GENMASK(25, 18)) x 233 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDTIDX_SGID_X(x) (((x) & GENMASK(25, 18)) >> 18) x 235 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDTIDX_POL_IDX(x) (((x) << 8) & GENMASK(16, 8)) x 237 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDTIDX_POL_IDX_X(x) (((x) & GENMASK(16, 8)) >> 8) x 238 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_TABLES_SFIDTIDX_SFID_INDEX(x) ((x) & GENMASK(7, 0)) x 245 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_ACCESS_CTRL_SGID(x) ((x) & GENMASK(7, 0)) x 249 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_CONFIG_REG_3_BASE_TIME_SEC_MSB(x) ((x) & GENMASK(15, 0)) x 251 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_CONFIG_REG_3_LIST_LENGTH(x) (((x) << 16) & GENMASK(18, 16)) x 253 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_CONFIG_REG_3_LIST_LENGTH_X(x) (((x) & GENMASK(18, 16)) >> 16) x 255 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_CONFIG_REG_3_INIT_IPS(x) (((x) << 24) & GENMASK(27, 24)) x 257 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_CONFIG_REG_3_INIT_IPS_X(x) (((x) & GENMASK(27, 24)) >> 24) x 262 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_GCL_GS_CONFIG_IPS(x) ((x) & GENMASK(3, 0)) x 268 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_STATUS_REG_3_CFG_CHG_TIME_SEC_MSB(x) ((x) & GENMASK(15, 0)) x 271 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_STATUS_REG_3_IPS(x) (((x) << 20) & GENMASK(23, 20)) x 273 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_SG_STATUS_REG_3_IPS_X(x) (((x) & GENMASK(23, 20)) >> 20) x 280 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VLAN_CFG_VLAN_POP_CNT(x) (((x) << 18) & GENMASK(19, 18)) x 282 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VLAN_CFG_VLAN_POP_CNT_X(x) (((x) & GENMASK(19, 18)) >> 18) x 286 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VLAN_CFG_VLAN_PCP(x) (((x) << 12) & GENMASK(14, 12)) x 288 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VLAN_CFG_VLAN_PCP_X(x) (((x) & GENMASK(14, 12)) >> 12) x 289 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VLAN_CFG_VLAN_VID(x) ((x) & GENMASK(11, 0)) x 305 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_QOS_CFG_QOS_DEFAULT_VAL(x) (((x) << 5) & GENMASK(7, 5)) x 307 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_QOS_CFG_QOS_DEFAULT_VAL_X(x) (((x) & GENMASK(7, 5)) >> 5) x 311 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_QOS_CFG_DSCP_REWR_CFG(x) ((x) & GENMASK(1, 0)) x 317 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_CFG_S1_DMAC_DIP_ENA(x) (((x) << 11) & GENMASK(13, 11)) x 319 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_CFG_S1_DMAC_DIP_ENA_X(x) (((x) & GENMASK(13, 11)) >> 11) x 320 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_CFG_S1_VLAN_INNER_TAG_ENA(x) (((x) << 8) & GENMASK(10, 8)) x 322 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_CFG_S1_VLAN_INNER_TAG_ENA_X(x) (((x) & GENMASK(10, 8)) >> 8) x 323 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_CFG_PAG_VAL(x) ((x) & GENMASK(7, 0)) x 329 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S1_KEY_CFG_S1_KEY_IP6_CFG(x) (((x) << 4) & GENMASK(6, 4)) x 331 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S1_KEY_CFG_S1_KEY_IP6_CFG_X(x) (((x) & GENMASK(6, 4)) >> 4) x 332 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S1_KEY_CFG_S1_KEY_IP4_CFG(x) (((x) << 2) & GENMASK(3, 2)) x 334 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S1_KEY_CFG_S1_KEY_IP4_CFG_X(x) (((x) & GENMASK(3, 2)) >> 2) x 335 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S1_KEY_CFG_S1_KEY_OTHER_CFG(x) ((x) & GENMASK(1, 0)) x 340 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_UDP_PAYLOAD_ENA(x) (((x) << 17) & GENMASK(18, 17)) x 342 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_UDP_PAYLOAD_ENA_X(x) (((x) & GENMASK(18, 17)) >> 17) x 343 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_ETYPE_PAYLOAD_ENA(x) (((x) << 15) & GENMASK(16, 15)) x 345 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_ETYPE_PAYLOAD_ENA_X(x) (((x) & GENMASK(16, 15)) >> 15) x 347 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS(x) (((x) << 12) & GENMASK(13, 12)) x 349 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS_X(x) (((x) & GENMASK(13, 12)) >> 12) x 350 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS(x) (((x) << 10) & GENMASK(11, 10)) x 352 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS_X(x) (((x) & GENMASK(11, 10)) >> 10) x 353 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS(x) (((x) << 8) & GENMASK(9, 8)) x 355 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS_X(x) (((x) & GENMASK(9, 8)) >> 8) x 356 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS(x) (((x) << 6) & GENMASK(7, 6)) x 358 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS_X(x) (((x) & GENMASK(7, 6)) >> 6) x 359 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_IP6_CFG(x) (((x) << 2) & GENMASK(5, 2)) x 361 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_IP6_CFG_X(x) (((x) & GENMASK(5, 2)) >> 2) x 362 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_VCAP_S2_CFG_S2_OAM_DIS(x) ((x) & GENMASK(1, 0)) x 369 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(x) ((x) & GENMASK(2, 0)) x 385 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_DROP_ENA(x) (((x) << 16) & GENMASK(31, 16)) x 387 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_DROP_ENA_X(x) (((x) & GENMASK(31, 16)) >> 16) x 388 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(x) ((x) & GENMASK(15, 0)) x 393 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_GARP_CFG_GARP_DROP_ENA(x) (((x) << 16) & GENMASK(31, 16)) x 395 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_GARP_CFG_GARP_DROP_ENA_X(x) (((x) & GENMASK(31, 16)) >> 16) x 396 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_GARP_CFG_GARP_REDIR_ENA(x) ((x) & GENMASK(15, 0)) x 401 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_CCM_CFG_CCM_DROP_ENA(x) (((x) << 16) & GENMASK(31, 16)) x 403 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_CCM_CFG_CCM_DROP_ENA_X(x) (((x) & GENMASK(31, 16)) >> 16) x 404 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_CPU_FWD_CCM_CFG_CCM_REDIR_ENA(x) ((x) & GENMASK(15, 0)) x 419 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_PORT_CFG_PORTID_VAL(x) (((x) << 2) & GENMASK(5, 2)) x 421 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_PORT_CFG_PORTID_VAL_X(x) (((x) & GENMASK(5, 2)) >> 2) x 430 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_POL_CFG_QUEUE_POL_ENA(x) (((x) << 9) & GENMASK(16, 9)) x 432 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_POL_CFG_QUEUE_POL_ENA_X(x) (((x) & GENMASK(16, 9)) >> 9) x 433 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_POL_CFG_POL_ORDER(x) ((x) & GENMASK(8, 0)) x 448 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PORT_SFID_CFG_SFID(x) ((x) & GENMASK(7, 0)) x 453 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PFC_PFC_CFG_RX_PFC_ENA(x) (((x) << 2) & GENMASK(9, 2)) x 455 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PFC_PFC_CFG_RX_PFC_ENA_X(x) (((x) & GENMASK(9, 2)) >> 2) x 456 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_PFC_PFC_CFG_FC_LINK_SPEED(x) ((x) & GENMASK(1, 0)) x 464 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_OAM_MEP_CFG_MEP_IDX_P(x) (((x) << 6) & GENMASK(10, 6)) x 466 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_OAM_MEP_CFG_MEP_IDX_P_X(x) (((x) & GENMASK(10, 6)) >> 6) x 467 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_OAM_MEP_CFG_MEP_IDX(x) (((x) << 1) & GENMASK(5, 1)) x 469 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_OAM_MEP_CFG_MEP_IDX_X(x) (((x) & GENMASK(5, 1)) >> 1) x 474 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_IPT_IPT_CFG(x) (((x) << 15) & GENMASK(16, 15)) x 476 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_IPT_IPT_CFG_X(x) (((x) & GENMASK(16, 15)) >> 15) x 477 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_IPT_ISDX_P(x) (((x) << 7) & GENMASK(14, 7)) x 479 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_IPT_ISDX_P_X(x) (((x) & GENMASK(14, 7)) >> 7) x 480 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_IPT_IPT_PPT_IDX(x) ((x) & GENMASK(6, 0)) x 487 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FID_MAP_FID_MAP_FID_C_VAL(x) (((x) << 6) & GENMASK(11, 6)) x 489 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FID_MAP_FID_MAP_FID_C_VAL_X(x) (((x) & GENMASK(11, 6)) >> 6) x 490 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_FID_MAP_FID_MAP_FID_B_VAL(x) ((x) & GENMASK(5, 0)) x 502 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_MLD(x) (((x) << 27) & GENMASK(29, 27)) x 504 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_MLD_X(x) (((x) & GENMASK(29, 27)) >> 27) x 505 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_IGMP(x) (((x) << 24) & GENMASK(26, 24)) x 507 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_IGMP_X(x) (((x) & GENMASK(26, 24)) >> 24) x 508 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_IPMC_CTRL(x) (((x) << 21) & GENMASK(23, 21)) x 510 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_IPMC_CTRL_X(x) (((x) & GENMASK(23, 21)) >> 21) x 511 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_ALLBRIDGE(x) (((x) << 18) & GENMASK(20, 18)) x 513 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_ALLBRIDGE_X(x) (((x) & GENMASK(20, 18)) >> 18) x 514 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_LOCKED_PORTMOVE(x) (((x) << 15) & GENMASK(17, 15)) x 516 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_LOCKED_PORTMOVE_X(x) (((x) & GENMASK(17, 15)) >> 15) x 517 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_SRC_COPY(x) (((x) << 12) & GENMASK(14, 12)) x 519 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_SRC_COPY_X(x) (((x) & GENMASK(14, 12)) >> 12) x 520 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_MAC_COPY(x) (((x) << 9) & GENMASK(11, 9)) x 522 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_MAC_COPY_X(x) (((x) & GENMASK(11, 9)) >> 9) x 523 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_LRN(x) (((x) << 6) & GENMASK(8, 6)) x 525 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_LRN_X(x) (((x) & GENMASK(8, 6)) >> 6) x 526 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_MIRROR(x) (((x) << 3) & GENMASK(5, 3)) x 528 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_MIRROR_X(x) (((x) & GENMASK(5, 3)) >> 3) x 529 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_CFG_CPUQ_SFLOW(x) ((x) & GENMASK(2, 0)) x 534 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_8021_CFG_CPUQ_BPDU_VAL(x) (((x) << 6) & GENMASK(8, 6)) x 536 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_8021_CFG_CPUQ_BPDU_VAL_X(x) (((x) & GENMASK(8, 6)) >> 6) x 537 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_8021_CFG_CPUQ_GARP_VAL(x) (((x) << 3) & GENMASK(5, 3)) x 539 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_8021_CFG_CPUQ_GARP_VAL_X(x) (((x) & GENMASK(5, 3)) >> 3) x 540 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_CPUQ_8021_CFG_CPUQ_CCM_VAL(x) ((x) & GENMASK(2, 0)) x 546 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_DSCP_CFG_QOS_DSCP_VAL(x) (((x) << 8) & GENMASK(10, 8)) x 548 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_DSCP_CFG_QOS_DSCP_VAL_X(x) (((x) & GENMASK(10, 8)) >> 8) x 549 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_DSCP_CFG_DSCP_TRANSLATE_VAL(x) (((x) << 2) & GENMASK(7, 2)) x 551 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_DSCP_CFG_DSCP_TRANSLATE_VAL_X(x) (((x) & GENMASK(7, 2)) >> 2) x 561 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_VCAP_RNG_VAL_CFG_VCAP_RNG_MIN_VAL(x) (((x) << 16) & GENMASK(31, 16)) x 563 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_VCAP_RNG_VAL_CFG_VCAP_RNG_MIN_VAL_X(x) (((x) & GENMASK(31, 16)) >> 16) x 564 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_VCAP_RNG_VAL_CFG_VCAP_RNG_MAX_VAL(x) ((x) & GENMASK(15, 0)) x 568 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_VRAP_CFG_VRAP_VID(x) ((x) & GENMASK(11, 0)) x 580 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_PIR_CFG_PIR_RATE(x) (((x) << 6) & GENMASK(20, 6)) x 582 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_PIR_CFG_PIR_RATE_X(x) (((x) & GENMASK(20, 6)) >> 6) x 583 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_PIR_CFG_PIR_BURST(x) ((x) & GENMASK(5, 0)) x 588 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_CIR_CFG_CIR_RATE(x) (((x) << 6) & GENMASK(20, 6)) x 590 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_CIR_CFG_CIR_RATE_X(x) (((x) & GENMASK(20, 6)) >> 6) x 591 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_CIR_CFG_CIR_BURST(x) ((x) & GENMASK(5, 0)) x 596 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_MODE_CFG_IPG_SIZE(x) (((x) << 5) & GENMASK(9, 5)) x 598 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_MODE_CFG_IPG_SIZE_X(x) (((x) & GENMASK(9, 5)) >> 5) x 599 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_MODE_CFG_FRM_MODE(x) (((x) << 3) & GENMASK(4, 3)) x 601 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_MODE_CFG_FRM_MODE_X(x) (((x) & GENMASK(4, 3)) >> 3) x 616 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_HYST_POL_FC_HYST(x) (((x) << 4) & GENMASK(9, 4)) x 618 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_HYST_POL_FC_HYST_X(x) (((x) & GENMASK(9, 4)) >> 4) x 619 drivers/net/ethernet/mscc/ocelot_ana.h #define ANA_POL_HYST_POL_STOP_HYST(x) ((x) & GENMASK(3, 0)) x 19 drivers/net/ethernet/mscc/ocelot_board.c #define IFH_EXTRACT_BITFIELD64(x, o, w) (((x) >> (o)) & GENMASK_ULL((w) - 1, 0)) x 19 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_CLOCK_CFG_LINK_SPEED(x) ((x) & GENMASK(1, 0)) x 35 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_EEE_CFG_EEE_TIMER_AGE(x) (((x) << 15) & GENMASK(21, 15)) x 37 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_EEE_CFG_EEE_TIMER_AGE_X(x) (((x) & GENMASK(21, 15)) >> 15) x 38 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_EEE_CFG_EEE_TIMER_WAKEUP(x) (((x) << 8) & GENMASK(14, 8)) x 40 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_EEE_CFG_EEE_TIMER_WAKEUP_X(x) (((x) & GENMASK(14, 8)) >> 8) x 41 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_EEE_CFG_EEE_TIMER_HOLDOFF(x) (((x) << 1) & GENMASK(7, 1)) x 43 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_EEE_CFG_EEE_TIMER_HOLDOFF_X(x) (((x) & GENMASK(7, 1)) >> 1) x 52 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PTP_PREDICT_CFG_PTP_PHY_PREDICT_CFG(x) (((x) << 4) & GENMASK(11, 4)) x 54 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PTP_PREDICT_CFG_PTP_PHY_PREDICT_CFG_X(x) (((x) & GENMASK(11, 4)) >> 4) x 55 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PTP_PREDICT_CFG_PTP_PHASE_PREDICT_CFG(x) ((x) & GENMASK(3, 0)) x 73 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_TAGS_CFG_TAG_ID(x) (((x) << 16) & GENMASK(31, 16)) x 75 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_TAGS_CFG_TAG_ID_X(x) (((x) & GENMASK(31, 16)) >> 16) x 88 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_IFG_CFG_TX_IFG(x) (((x) << 8) & GENMASK(12, 8)) x 90 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_IFG_CFG_TX_IFG_X(x) (((x) & GENMASK(12, 8)) >> 8) x 91 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_IFG_CFG_RX_IFG2(x) (((x) << 4) & GENMASK(7, 4)) x 93 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_IFG_CFG_RX_IFG2_X(x) (((x) & GENMASK(7, 4)) >> 4) x 94 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_IFG_CFG_RX_IFG1(x) ((x) & GENMASK(3, 0)) x 102 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_HDX_CFG_SEED(x) (((x) << 16) & GENMASK(23, 16)) x 104 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_HDX_CFG_SEED_X(x) (((x) & GENMASK(23, 16)) >> 16) x 107 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_MAC_HDX_CFG_LATE_COL_POS(x) ((x) & GENMASK(6, 0)) x 151 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_ANEG_CFG_ADV_ABILITY(x) (((x) << 16) & GENMASK(31, 16)) x 153 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_ANEG_CFG_ADV_ABILITY_X(x) (((x) & GENMASK(31, 16)) >> 16) x 160 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_ANEG_NP_CFG_NP_TX(x) (((x) << 16) & GENMASK(31, 16)) x 162 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_ANEG_NP_CFG_NP_TX_X(x) (((x) & GENMASK(31, 16)) >> 16) x 181 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_ANEG_STATUS_LP_ADV_ABILITY(x) (((x) << 16) & GENMASK(31, 16)) x 183 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_ANEG_STATUS_LP_ADV_ABILITY_X(x) (((x) & GENMASK(31, 16)) >> 16) x 192 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_LINK_STATUS_DELAY_VAR(x) (((x) << 12) & GENMASK(15, 12)) x 194 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_LINK_STATUS_DELAY_VAR_X(x) (((x) & GENMASK(15, 12)) >> 12) x 213 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_LPI_CFG_LPI_RX_WTIM(x) (((x) << 4) & GENMASK(5, 4)) x 215 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_LPI_CFG_LPI_RX_WTIM_X(x) (((x) & GENMASK(5, 4)) >> 4) x 234 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_TSTPAT_STATUS_JTP_ERR_CNT(x) (((x) << 8) & GENMASK(15, 8)) x 236 drivers/net/ethernet/mscc/ocelot_dev.h #define PCS1G_TSTPAT_STATUS_JTP_ERR_CNT_X(x) (((x) & GENMASK(15, 8)) >> 8) x 247 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_CFG_RXBITSEL(x) (((x) << 12) & GENMASK(15, 12)) x 249 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_CFG_RXBITSEL_X(x) (((x) & GENMASK(15, 12)) >> 12) x 250 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_CFG_SIGDET_CFG(x) (((x) << 9) & GENMASK(10, 9)) x 252 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_CFG_SIGDET_CFG_X(x) (((x) & GENMASK(10, 9)) >> 9) x 254 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_CFG_LINKHYSTTIMER(x) (((x) << 4) & GENMASK(7, 4)) x 256 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_CFG_LINKHYSTTIMER_X(x) (((x) & GENMASK(7, 4)) >> 4) x 264 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_STATUS_EDGE_POS_PTP(x) (((x) << 8) & GENMASK(11, 8)) x 266 drivers/net/ethernet/mscc/ocelot_dev.h #define DEV_PCS_FX100_STATUS_EDGE_POS_PTP_X(x) (((x) & GENMASK(11, 8)) >> 8) x 19 drivers/net/ethernet/mscc/ocelot_ptp.h #define PTP_PIN_CFG_ACTION(x) ((x) << 3) x 20 drivers/net/ethernet/mscc/ocelot_qs.h #define XTR_VALID_BYTES(x) (4 - (((x) >> 24) & 3)) x 24 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_XTR_GRP_CFG_MODE(x) (((x) << 2) & GENMASK(3, 2)) x 26 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_XTR_GRP_CFG_MODE_X(x) (((x) & GENMASK(3, 2)) >> 2) x 34 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_XTR_CFG_DP_WM(x) (((x) << 5) & GENMASK(7, 5)) x 36 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_XTR_CFG_DP_WM_X(x) (((x) & GENMASK(7, 5)) >> 5) x 37 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_XTR_CFG_SCH_WM(x) (((x) << 2) & GENMASK(4, 2)) x 39 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_XTR_CFG_SCH_WM_X(x) (((x) & GENMASK(4, 2)) >> 2) x 40 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_XTR_CFG_OFLW_ERR_STICKY(x) ((x) & GENMASK(1, 0)) x 45 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_GRP_CFG_MODE(x) (((x) << 2) & GENMASK(3, 2)) x 47 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_GRP_CFG_MODE_X(x) (((x) & GENMASK(3, 2)) >> 2) x 54 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_CTRL_GAP_SIZE(x) (((x) << 21) & GENMASK(24, 21)) x 56 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_CTRL_GAP_SIZE_X(x) (((x) & GENMASK(24, 21)) >> 21) x 60 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_CTRL_VLD_BYTES(x) (((x) << 16) & GENMASK(17, 16)) x 62 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_CTRL_VLD_BYTES_X(x) (((x) & GENMASK(17, 16)) >> 16) x 64 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_STATUS_WMARK_REACHED(x) (((x) << 4) & GENMASK(5, 4)) x 66 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_STATUS_WMARK_REACHED_X(x) (((x) & GENMASK(5, 4)) >> 4) x 67 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_STATUS_FIFO_RDY(x) (((x) << 2) & GENMASK(3, 2)) x 69 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_STATUS_FIFO_RDY_X(x) (((x) & GENMASK(3, 2)) >> 2) x 70 drivers/net/ethernet/mscc/ocelot_qs.h #define QS_INJ_STATUS_INJ_IN_PROGRESS(x) ((x) & GENMASK(1, 0)) x 19 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(x) (((x) << 11) & GENMASK(13, 11)) x 21 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG_X(x) (((x) & GENMASK(13, 11)) >> 11) x 24 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SWITCH_PORT_MODE_TX_PFC_ENA(x) (((x) << 1) & GENMASK(8, 1)) x 26 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SWITCH_PORT_MODE_TX_PFC_ENA_X(x) (((x) & GENMASK(8, 1)) >> 1) x 38 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EEE_THRES_EEE_HIGH_BYTES(x) (((x) << 8) & GENMASK(15, 8)) x 40 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EEE_THRES_EEE_HIGH_BYTES_X(x) (((x) & GENMASK(15, 8)) >> 8) x 41 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EEE_THRES_EEE_HIGH_FRAMES(x) ((x) & GENMASK(7, 0)) x 46 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EXT_CPU_CFG_EXT_CPU_PORT(x) (((x) << 8) & GENMASK(12, 8)) x 48 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_X(x) (((x) & GENMASK(12, 8)) >> 8) x 49 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK(x) ((x) & GENMASK(7, 0)) x 54 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_QMAP_SE_BASE(x) (((x) << 5) & GENMASK(12, 5)) x 56 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_QMAP_SE_BASE_X(x) (((x) & GENMASK(12, 5)) >> 5) x 57 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_QMAP_SE_IDX_SEL(x) (((x) << 2) & GENMASK(4, 2)) x 59 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_QMAP_SE_IDX_SEL_X(x) (((x) & GENMASK(4, 2)) >> 2) x 60 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_QMAP_SE_INP_SEL(x) ((x) & GENMASK(1, 0)) x 67 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT(x) (((x) << 9) & GENMASK(18, 9)) x 69 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT_X(x) (((x) & GENMASK(18, 9)) >> 9) x 72 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TFRM_MISC_TIMED_ENTRY_FAST_CNT(x) ((x) & GENMASK(6, 0)) x 77 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_RED_PROFILE_WM_RED_LOW(x) (((x) << 8) & GENMASK(15, 8)) x 79 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_RED_PROFILE_WM_RED_LOW_X(x) (((x) & GENMASK(15, 8)) >> 8) x 80 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_RED_PROFILE_WM_RED_HIGH(x) ((x) & GENMASK(7, 0)) x 87 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_RES_STAT_INUSE(x) (((x) << 12) & GENMASK(23, 12)) x 89 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_RES_STAT_INUSE_X(x) (((x) & GENMASK(23, 12)) >> 12) x 90 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_RES_STAT_MAXUSE(x) ((x) & GENMASK(11, 0)) x 93 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EVENTS_CORE_EV_FDC(x) (((x) << 2) & GENMASK(4, 2)) x 95 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EVENTS_CORE_EV_FDC_X(x) (((x) & GENMASK(4, 2)) >> 2) x 96 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EVENTS_CORE_EV_FRD(x) ((x) & GENMASK(1, 0)) x 117 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PREEMPTION_CFG_P_QUEUES(x) ((x) & GENMASK(7, 0)) x 119 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE(x) (((x) << 8) & GENMASK(9, 8)) x 121 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE_X(x) (((x) & GENMASK(9, 8)) >> 8) x 122 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PREEMPTION_CFG_STRICT_IPG(x) (((x) << 12) & GENMASK(13, 12)) x 124 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PREEMPTION_CFG_STRICT_IPG_X(x) (((x) & GENMASK(13, 12)) >> 12) x 125 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PREEMPTION_CFG_HOLD_ADVANCE(x) (((x) << 16) & GENMASK(31, 16)) x 127 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PREEMPTION_CFG_HOLD_ADVANCE_X(x) (((x) & GENMASK(31, 16)) >> 16) x 131 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_CIR_CFG_CIR_RATE(x) (((x) << 6) & GENMASK(20, 6)) x 133 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_CIR_CFG_CIR_RATE_X(x) (((x) & GENMASK(20, 6)) >> 6) x 134 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_CIR_CFG_CIR_BURST(x) ((x) & GENMASK(5, 0)) x 139 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EIR_CFG_EIR_RATE(x) (((x) << 7) & GENMASK(21, 7)) x 141 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EIR_CFG_EIR_RATE_X(x) (((x) & GENMASK(21, 7)) >> 7) x 142 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EIR_CFG_EIR_BURST(x) (((x) << 1) & GENMASK(6, 1)) x 144 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_EIR_CFG_EIR_BURST_X(x) (((x) & GENMASK(6, 1)) >> 1) x 149 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CFG_SE_DWRR_CNT(x) (((x) << 6) & GENMASK(9, 6)) x 151 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CFG_SE_DWRR_CNT_X(x) (((x) & GENMASK(9, 6)) >> 6) x 154 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CFG_SE_FRM_MODE(x) (((x) << 2) & GENMASK(3, 2)) x 156 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CFG_SE_FRM_MODE_X(x) (((x) & GENMASK(3, 2)) >> 2) x 165 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_OUTP_IDX(x) (((x) << 17) & GENMASK(24, 17)) x 167 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_OUTP_IDX_X(x) (((x) & GENMASK(24, 17)) >> 17) x 168 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_INP_IDX(x) (((x) << 9) & GENMASK(16, 9)) x 170 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_INP_IDX_X(x) (((x) & GENMASK(16, 9)) >> 9) x 171 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_OUTP_CON(x) (((x) << 5) & GENMASK(8, 5)) x 173 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_OUTP_CON_X(x) (((x) & GENMASK(8, 5)) >> 5) x 174 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_INP_CNT(x) (((x) << 1) & GENMASK(4, 1)) x 176 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_CONNECT_SE_INP_CNT_X(x) (((x) & GENMASK(4, 1)) >> 1) x 181 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_DLB_SENSE_SE_DLB_PRIO(x) (((x) << 11) & GENMASK(13, 11)) x 183 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_DLB_SENSE_SE_DLB_PRIO_X(x) (((x) & GENMASK(13, 11)) >> 11) x 184 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_DLB_SENSE_SE_DLB_SPORT(x) (((x) << 7) & GENMASK(10, 7)) x 186 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_DLB_SENSE_SE_DLB_SPORT_X(x) (((x) & GENMASK(10, 7)) >> 7) x 187 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_DLB_SENSE_SE_DLB_DPORT(x) (((x) << 3) & GENMASK(6, 3)) x 189 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_DLB_SENSE_SE_DLB_DPORT_X(x) (((x) & GENMASK(6, 3)) >> 3) x 196 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_CIR_STATE_CIR_LVL(x) (((x) << 4) & GENMASK(25, 4)) x 198 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_CIR_STATE_CIR_LVL_X(x) (((x) & GENMASK(25, 4)) >> 4) x 199 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_CIR_STATE_SHP_TIME(x) ((x) & GENMASK(3, 0)) x 206 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_STATE_SE_OUTP_LVL(x) (((x) << 1) & GENMASK(2, 1)) x 208 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_SE_STATE_SE_OUTP_LVL_X(x) (((x) & GENMASK(2, 1)) >> 1) x 212 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_HSCH_MISC_CFG_FRM_ADJ(x) (((x) << 3) & GENMASK(7, 3)) x 214 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_HSCH_MISC_CFG_FRM_ADJ_X(x) (((x) & GENMASK(7, 3)) >> 3) x 222 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TAG_CONFIG_LINK_SPEED(x) (((x) << 4) & GENMASK(5, 4)) x 224 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TAG_CONFIG_LINK_SPEED_X(x) (((x) & GENMASK(5, 4)) >> 4) x 225 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TAG_CONFIG_INIT_GATE_STATE(x) (((x) << 8) & GENMASK(15, 8)) x 227 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TAG_CONFIG_INIT_GATE_STATE_X(x) (((x) & GENMASK(15, 8)) >> 8) x 228 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TAG_CONFIG_SCH_TRAFFIC_QUEUES(x) (((x) << 16) & GENMASK(23, 16)) x 230 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TAG_CONFIG_SCH_TRAFFIC_QUEUES_X(x) (((x) & GENMASK(23, 16)) >> 16) x 232 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_TAS_PARAM_CFG_CTRL_PORT_NUM(x) ((x) & GENMASK(7, 0)) x 239 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_CFG_REG_3_BASE_TIME_SEC_MSB(x) ((x) & GENMASK(15, 0)) x 241 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_CFG_REG_3_LIST_LENGTH(x) (((x) << 16) & GENMASK(31, 16)) x 243 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_CFG_REG_3_LIST_LENGTH_X(x) (((x) & GENMASK(31, 16)) >> 16) x 245 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_GCL_CFG_REG_1_GCL_ENTRY_NUM(x) ((x) & GENMASK(5, 0)) x 247 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_GCL_CFG_REG_1_GATE_STATE(x) (((x) << 8) & GENMASK(15, 8)) x 249 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_GCL_CFG_REG_1_GATE_STATE_X(x) (((x) & GENMASK(15, 8)) >> 8) x 251 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_STATUS_REG_3_BASE_TIME_SEC_MSB(x) ((x) & GENMASK(15, 0)) x 253 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_STATUS_REG_3_LIST_LENGTH(x) (((x) << 16) & GENMASK(31, 16)) x 255 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_STATUS_REG_3_LIST_LENGTH_X(x) (((x) & GENMASK(31, 16)) >> 16) x 257 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_STATUS_REG_8_CFG_CHG_TIME_SEC_MSB(x) ((x) & GENMASK(15, 0)) x 259 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_STATUS_REG_8_OPER_GATE_STATE(x) (((x) << 16) & GENMASK(23, 16)) x 261 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_PARAM_STATUS_REG_8_OPER_GATE_STATE_X(x) (((x) & GENMASK(23, 16)) >> 16) x 264 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_GCL_STATUS_REG_1_GCL_ENTRY_NUM(x) ((x) & GENMASK(5, 0)) x 266 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_GCL_STATUS_REG_1_GATE_STATE(x) (((x) << 8) & GENMASK(15, 8)) x 268 drivers/net/ethernet/mscc/ocelot_qsys.h #define QSYS_GCL_STATUS_REG_1_GATE_STATE_X(x) (((x) & GENMASK(15, 8)) >> 8) x 13 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PORT_VLAN_CFG_PORT_TPID(x) (((x) << 16) & GENMASK(31, 16)) x 15 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PORT_VLAN_CFG_PORT_TPID_X(x) (((x) & GENMASK(31, 16)) >> 16) x 17 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PORT_VLAN_CFG_PORT_PCP(x) (((x) << 12) & GENMASK(14, 12)) x 19 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PORT_VLAN_CFG_PORT_PCP_X(x) (((x) & GENMASK(14, 12)) >> 12) x 20 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PORT_VLAN_CFG_PORT_VID(x) ((x) & GENMASK(11, 0)) x 25 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_TAG_CFG_TAG_CFG(x) (((x) << 7) & GENMASK(8, 7)) x 27 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_TAG_CFG_TAG_CFG_X(x) (((x) & GENMASK(8, 7)) >> 7) x 28 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_TAG_CFG_TAG_TPID_CFG(x) (((x) << 5) & GENMASK(6, 5)) x 30 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_TAG_CFG_TAG_TPID_CFG_X(x) (((x) & GENMASK(6, 5)) >> 5) x 32 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_TAG_CFG_TAG_PCP_CFG(x) (((x) << 2) & GENMASK(3, 2)) x 34 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_TAG_CFG_TAG_PCP_CFG_X(x) (((x) & GENMASK(3, 2)) >> 2) x 35 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_TAG_CFG_TAG_DEI_CFG(x) ((x) & GENMASK(1, 0)) x 41 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PORT_CFG_FCS_UPDATE_NONCPU_CFG(x) (((x) << 3) & GENMASK(4, 3)) x 43 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PORT_CFG_FCS_UPDATE_NONCPU_CFG_X(x) (((x) & GENMASK(4, 3)) >> 3) x 54 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PCP_DEI_QOS_MAP_CFG_PCP_QOS_VAL(x) ((x) & GENMASK(2, 0)) x 60 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PTP_CFG_GP_CFG_UNUSED(x) (((x) << 3) & GENMASK(6, 3)) x 62 drivers/net/ethernet/mscc/ocelot_rew.h #define REW_PTP_CFG_GP_CFG_UNUSED_X(x) (((x) & GENMASK(6, 3)) >> 3) x 9 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_CORE_UPDATE_CTRL_UPDATE_CMD(x) (((x) << 22) & GENMASK(24, 22)) x 11 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_CORE_UPDATE_CTRL_UPDATE_CMD_X(x) (((x) & GENMASK(24, 22)) >> 22) x 15 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_CORE_UPDATE_CTRL_UPDATE_ADDR(x) (((x) << 3) & GENMASK(18, 3)) x 17 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_CORE_UPDATE_CTRL_UPDATE_ADDR_X(x) (((x) & GENMASK(18, 3)) >> 3) x 22 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_CORE_MV_CFG_MV_NUM_POS(x) (((x) << 16) & GENMASK(31, 16)) x 24 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_CORE_MV_CFG_MV_NUM_POS_X(x) (((x) & GENMASK(31, 16)) >> 16) x 25 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_CORE_MV_CFG_MV_SIZE(x) ((x) & GENMASK(15, 0)) x 44 drivers/net/ethernet/mscc/ocelot_s2.h #define S2_BIST_CFG_TCAM_BIAS(x) ((x) & GENMASK(5, 0)) x 17 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PORT_MODE_DATA_WO_TS(x) (((x) << 5) & GENMASK(6, 5)) x 19 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PORT_MODE_DATA_WO_TS_X(x) (((x) & GENMASK(6, 5)) >> 5) x 20 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PORT_MODE_INCL_INJ_HDR(x) (((x) << 3) & GENMASK(4, 3)) x 22 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PORT_MODE_INCL_INJ_HDR_X(x) (((x) & GENMASK(4, 3)) >> 3) x 23 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PORT_MODE_INCL_XTR_HDR(x) (((x) << 1) & GENMASK(2, 1)) x 25 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PORT_MODE_INCL_XTR_HDR_X(x) (((x) & GENMASK(2, 1)) >> 1) x 33 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_FRM_AGING_MAX_AGE(x) ((x) & GENMASK(19, 0)) x 36 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_STAT_CFG_STAT_CLEAR_SHOT(x) (((x) << 10) & GENMASK(16, 10)) x 38 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_STAT_CFG_STAT_CLEAR_SHOT_X(x) (((x) & GENMASK(16, 10)) >> 10) x 39 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_STAT_CFG_STAT_VIEW(x) ((x) & GENMASK(9, 0)) x 53 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG(x) (((x) << 6) & GENMASK(21, 6)) x 55 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG_X(x) (((x) & GENMASK(21, 6)) >> 6) x 56 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_TIMESTAMP_OFFSET_TIMESTAMP_OFFSET(x) ((x) & GENMASK(5, 0)) x 61 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PAUSE_CFG_PAUSE_START(x) (((x) << 10) & GENMASK(18, 10)) x 63 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PAUSE_CFG_PAUSE_START_X(x) (((x) & GENMASK(18, 10)) >> 10) x 64 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PAUSE_CFG_PAUSE_STOP(x) (((x) << 1) & GENMASK(9, 1)) x 66 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PAUSE_CFG_PAUSE_STOP_X(x) (((x) & GENMASK(9, 1)) >> 1) x 69 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PAUSE_TOT_CFG_PAUSE_TOT_START(x) (((x) << 9) & GENMASK(17, 9)) x 71 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PAUSE_TOT_CFG_PAUSE_TOT_START_X(x) (((x) & GENMASK(17, 9)) >> 9) x 72 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PAUSE_TOT_CFG_PAUSE_TOT_STOP(x) ((x) & GENMASK(8, 0)) x 79 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MAC_FC_CFG_FC_LINK_SPEED(x) (((x) << 26) & GENMASK(27, 26)) x 81 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MAC_FC_CFG_FC_LINK_SPEED_X(x) (((x) & GENMASK(27, 26)) >> 26) x 82 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MAC_FC_CFG_FC_LATENCY_CFG(x) (((x) << 20) & GENMASK(25, 20)) x 84 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MAC_FC_CFG_FC_LATENCY_CFG_X(x) (((x) & GENMASK(25, 20)) >> 20) x 88 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MAC_FC_CFG_PAUSE_VAL_CFG(x) ((x) & GENMASK(15, 0)) x 91 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MMGT_RELCNT(x) (((x) << 16) & GENMASK(31, 16)) x 93 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MMGT_RELCNT_X(x) (((x) & GENMASK(31, 16)) >> 16) x 94 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MMGT_FREECNT(x) ((x) & GENMASK(15, 0)) x 97 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MMGT_FAST_FREEVLD(x) (((x) << 4) & GENMASK(7, 4)) x 99 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MMGT_FAST_FREEVLD_X(x) (((x) & GENMASK(7, 4)) >> 4) x 100 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_MMGT_FAST_RELVLD(x) ((x) & GENMASK(3, 0)) x 105 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_EVENTS_DIF_EV_DRX(x) (((x) << 6) & GENMASK(8, 6)) x 107 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_EVENTS_DIF_EV_DRX_X(x) (((x) & GENMASK(8, 6)) >> 6) x 108 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_EVENTS_DIF_EV_DTX(x) ((x) & GENMASK(5, 0)) x 112 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_EVENTS_CORE_EV_ANA(x) ((x) & GENMASK(1, 0)) x 120 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_STATUS_PTP_MESS_ID(x) (((x) << 21) & GENMASK(26, 21)) x 122 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_STATUS_PTP_MESS_ID_X(x) (((x) & GENMASK(26, 21)) >> 21) x 123 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_STATUS_PTP_MESS_TXPORT(x) (((x) << 16) & GENMASK(20, 16)) x 125 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_STATUS_PTP_MESS_TXPORT_X(x) (((x) & GENMASK(20, 16)) >> 16) x 126 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_STATUS_PTP_MESS_SEQ_ID(x) ((x) & GENMASK(15, 0)) x 129 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_TXSTAMP_PTP_TXSTAMP(x) ((x) & GENMASK(29, 0)) x 135 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_CFG_PTP_STAMP_WID(x) (((x) << 2) & GENMASK(7, 2)) x 137 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_CFG_PTP_STAMP_WID_X(x) (((x) & GENMASK(7, 2)) >> 2) x 138 drivers/net/ethernet/mscc/ocelot_sys.h #define SYS_PTP_CFG_PTP_CF_ROLL_MODE(x) ((x) & GENMASK(1, 0)) x 3049 drivers/net/ethernet/natsemi/natsemi.c #define SWAP_BITS(x) ( (((x) & 0x0001) << 15) | (((x) & 0x0002) << 13) \ x 3050 drivers/net/ethernet/natsemi/natsemi.c | (((x) & 0x0004) << 11) | (((x) & 0x0008) << 9) \ x 3051 drivers/net/ethernet/natsemi/natsemi.c | (((x) & 0x0010) << 7) | (((x) & 0x0020) << 5) \ x 3052 drivers/net/ethernet/natsemi/natsemi.c | (((x) & 0x0040) << 3) | (((x) & 0x0080) << 1) \ x 3053 drivers/net/ethernet/natsemi/natsemi.c | (((x) & 0x0100) >> 1) | (((x) & 0x0200) >> 3) \ x 3054 drivers/net/ethernet/natsemi/natsemi.c | (((x) & 0x0400) >> 5) | (((x) & 0x0800) >> 7) \ x 3055 drivers/net/ethernet/natsemi/natsemi.c | (((x) & 0x1000) >> 9) | (((x) & 0x2000) >> 11) \ x 3056 drivers/net/ethernet/natsemi/natsemi.c | (((x) & 0x4000) >> 13) | (((x) & 0x8000) >> 15) ) x 82 drivers/net/ethernet/natsemi/ns83820.c #define dprintk(x...) do { } while (0) x 3575 drivers/net/ethernet/neterion/s2io.c unsigned long long x = val64; x 3577 drivers/net/ethernet/neterion/s2io.c "Write failed, Xmsi_addr reads:0x%llx\n", x); x 16 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define RE_REG_IMM_encode(x) \ x 17 drivers/net/ethernet/netronome/nfp/nfp_asm.h (RE_REG_IMM | ((x) & 0x1f) | (((x) & 0x60) << 1)) x 33 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define UR_REG_IMM_encode(x) (UR_REG_IMM | (x)) x 310 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_both(x) __enc_swreg((x), NN_REG_GPR_BOTH) x 311 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_a(x) __enc_swreg((x), NN_REG_GPR_A) x 312 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_b(x) __enc_swreg((x), NN_REG_GPR_B) x 313 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_nnr(x) __enc_swreg((x), NN_REG_NNR) x 314 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_xfer(x) __enc_swreg((x), NN_REG_XFER) x 315 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_imm(x) __enc_swreg((x), NN_REG_IMM) x 317 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_lm(x, off) __enc_swreg_lm((x), NN_LM_MOD_NONE, (off)) x 318 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_lm_inc(x) __enc_swreg_lm((x), NN_LM_MOD_INC, 0) x 319 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define reg_lm_dec(x) __enc_swreg_lm((x), NN_LM_MOD_DEC, 0) x 320 drivers/net/ethernet/netronome/nfp/nfp_asm.h #define __reg_lm(x, mod, off) __enc_swreg_lm((x), (mod), (off)) x 166 drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.h #define NFP_NET_CFG_VERSION_CLASS(x) (((x) & 0xff) << 16) x 169 drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.h #define NFP_NET_CFG_VERSION_MAJOR(x) (((x) & 0xff) << 8) x 171 drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.h #define NFP_NET_CFG_VERSION_MINOR(x) (((x) & 0xff) << 0) x 15 drivers/net/ethernet/netronome/nfp/nfp_net_debugdump.c #define ALIGN8(x) ALIGN(x, 8) x 99 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c #define NFP_PCIE_P2C_GENERAL_TARGET_OFFSET(bar, x) ((x) << ((bar)->bitsize - 2)) x 100 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c #define NFP_PCIE_P2C_GENERAL_TOKEN_OFFSET(bar, x) ((x) << ((bar)->bitsize - 4)) x 36 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MAC1(x) (x + 0x000) x 37 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MAC2(x) (x + 0x004) x 38 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_IPGT(x) (x + 0x008) x 39 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_IPGR(x) (x + 0x00C) x 40 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_CLRT(x) (x + 0x010) x 41 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MAXF(x) (x + 0x014) x 42 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_SUPP(x) (x + 0x018) x 43 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TEST(x) (x + 0x01C) x 44 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MCFG(x) (x + 0x020) x 45 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MCMD(x) (x + 0x024) x 46 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MADR(x) (x + 0x028) x 47 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MWTD(x) (x + 0x02C) x 48 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MRDD(x) (x + 0x030) x 49 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_MIND(x) (x + 0x034) x 50 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_SA0(x) (x + 0x040) x 51 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_SA1(x) (x + 0x044) x 52 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_SA2(x) (x + 0x048) x 53 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_COMMAND(x) (x + 0x100) x 54 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_STATUS(x) (x + 0x104) x 55 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXDESCRIPTOR(x) (x + 0x108) x 56 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXSTATUS(x) (x + 0x10C) x 57 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXDESCRIPTORNUMBER(x) (x + 0x110) x 58 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXPRODUCEINDEX(x) (x + 0x114) x 59 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXCONSUMEINDEX(x) (x + 0x118) x 60 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TXDESCRIPTOR(x) (x + 0x11C) x 61 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TXSTATUS(x) (x + 0x120) x 62 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TXDESCRIPTORNUMBER(x) (x + 0x124) x 63 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TXPRODUCEINDEX(x) (x + 0x128) x 64 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TXCONSUMEINDEX(x) (x + 0x12C) x 65 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TSV0(x) (x + 0x158) x 66 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_TSV1(x) (x + 0x15C) x 67 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RSV(x) (x + 0x160) x 68 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_FLOWCONTROLCOUNTER(x) (x + 0x170) x 69 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_FLOWCONTROLSTATUS(x) (x + 0x174) x 70 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXFILTER_CTRL(x) (x + 0x200) x 71 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXFILTERWOLSTATUS(x) (x + 0x204) x 72 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_RXFILTERWOLCLEAR(x) (x + 0x208) x 73 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_HASHFILTERL(x) (x + 0x210) x 74 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_HASHFILTERH(x) (x + 0x214) x 75 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_INTSTATUS(x) (x + 0xFE0) x 76 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_INTENABLE(x) (x + 0xFE4) x 77 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_INTCLEAR(x) (x + 0xFE8) x 78 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_INTSET(x) (x + 0xFEC) x 79 drivers/net/ethernet/nxp/lpc_eth.c #define LPC_ENET_POWERDOWN(x) (x + 0xFF4) x 358 drivers/net/ethernet/nxp/lpc_eth.c #define TXSTATUS_COLLISIONS_GET(x) (((x) >> 21) & 0xF) x 193 drivers/net/ethernet/packetengines/hamachi.c #define RUN_AT(x) (jiffies + (x)) x 156 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_CFG_MACCFG_MAXF(x) (((x) << PAS_MAC_CFG_MACCFG_MAXF_S) & \ x 166 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_CFG_TXP_FPC(x) (((x) << PAS_MAC_CFG_TXP_FPC_S) & \ x 172 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_CFG_TXP_SL(x) (((x) << PAS_MAC_CFG_TXP_SL_S) & \ x 176 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_CFG_TXP_COB(x) (((x) << PAS_MAC_CFG_TXP_COB_S) & \ x 180 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_CFG_TXP_TIFT(x) (((x) << PAS_MAC_CFG_TXP_TIFT_S) & \ x 184 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_CFG_TXP_TIFG(x) (((x) << PAS_MAC_CFG_TXP_TIFG_S) & \ x 191 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_IPC_CHNL_DCHNO(x) (((x) << PAS_MAC_IPC_CHNL_DCHNO_S) & \ x 195 drivers/net/ethernet/pasemi/pasemi_mac.h #define PAS_MAC_IPC_CHNL_BCH(x) (((x) << PAS_MAC_IPC_CHNL_BCH_S) & \ x 1168 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define LSW(x) ((uint16_t)(x)) x 1169 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define LSD(x) ((uint32_t)((uint64_t)(x))) x 1170 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define MSD(x) ((uint32_t)((((uint64_t)(x)) >> 16) >> 16)) x 571 drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c #define lower32(x) ((u32)((x) & 0xffffffff)) x 572 drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c #define upper32(x) ((u32)(((u64)(x) >> 32) & 0xffffffff)) x 788 drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h #define nx_get_temp_val(x) ((x) >> 16) x 789 drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h #define nx_get_temp_state(x) ((x) & 0xffff) x 690 drivers/net/ethernet/qlogic/qla3xxx.h #define LS_64BITS(x) (u32)(0xffffffff & ((u64)x)) x 691 drivers/net/ethernet/qlogic/qla3xxx.h #define MS_64BITS(x) (u32)(0xffffffff & (((u64)x)>>16>>16) ) x 546 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define qlcnic_get_temp_val(x) ((x) >> 16) x 547 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define qlcnic_get_temp_state(x) ((x) & 0xffff) x 730 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define LSB(x) ((uint8_t)(x)) x 731 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define MSB(x) ((uint8_t)((uint16_t)(x) >> 8)) x 733 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define LSW(x) ((uint16_t)((uint32_t)(x))) x 734 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define MSW(x) ((uint16_t)((uint32_t)(x) >> 16)) x 736 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define LSD(x) ((uint32_t)((uint64_t)(x))) x 737 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define MSD(x) ((uint32_t)((((uint64_t)(x)) >> 16) >> 16)) x 27 drivers/net/ethernet/qualcomm/emac/emac-mac.c #define SPEED(x) (((x) & 0x3) << 20) x 50 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define PLL_IPSETI(x) ((x) & 0x3f) x 52 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define PLL_CPSETI(x) ((x) & 0xff) x 54 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define PLL_IPSETP(x) ((x) & 0x3f) x 56 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define PLL_CPSETP(x) ((x) & 0x1f) x 58 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define PLL_RCTRL(x) (((x) & 0xf) << 4) x 59 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define PLL_CCTRL(x) ((x) & 0xf) x 61 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define LANE_MODE(x) ((x) & 0x1f) x 77 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define DEC_START1(x) ((x) & 0x7f) x 80 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define DIV_FRAC_START(x) ((x) & 0x7f) x 83 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define DIV_FRAC_START3(x) ((x) & 0xf) x 91 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define TX_EMP_POST1_LVL(x) ((x) & 0x1f) x 94 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define TX_DRV_LVL(x) ((x) & 0xf) x 100 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define FIRSTORDER_THRESH(x) (((x) & 0x7) << 3) x 101 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define SECONDORDERGAIN(x) ((x) & 0x7) x 103 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define RX_EQ_GAIN2(x) (((x) & 0xf) << 4) x 104 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define RX_EQ_GAIN1(x) ((x) & 0xf) x 116 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define L0_RX_TERM_MODE(x) (((x) & 3) << 4) x 125 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define L0_DRV_LVL(x) ((x) & 0xf) x 128 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define CDR_MAX_CNT(x) ((x) & 0xff) x 130 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c #define PLLLOCK_CMP(x) ((x) & 0xff) x 48 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define UCDR_xO_GAIN_MODE(x) ((x) & 0x7f) x 50 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define UCDR_SO_SATURATION(x) ((x) & 0x3f) x 61 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define TX_MARGINING(x) ((x) & 0x3f) x 67 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define CML_GEAR_MODE(x) (((x) & 7) << 3) x 68 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define CML2CMOS_IBOOST_MODE(x) ((x) & 7) x 70 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define RESCODE_OFFSET(x) ((x) & 0x1f) x 72 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define MIXER_LOADB_MODE(x) (((x) & 0xf) << 2) x 73 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define MIXER_DATARATE_MODE(x) ((x) & 3) x 75 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define VGA_THRESH_DFE(x) ((x) & 0x3f) x 80 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define SIGDET_LVL(x) (((x) & 0xf) << 4) x 82 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define SIGDET_DEGLITCH_CTRL(x) (((x) & 0xf) << 1) x 87 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define DRVR_LOGIC_CLK_DIV(x) ((x) & 0xf) x 89 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define PARALLEL_RATE_MODE0(x) ((x) & 0x3) x 91 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define BAND_MODE0(x) ((x) & 0x3) x 93 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define LANE_MODE(x) ((x) & 0x1f) x 95 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define CDR_PD_SEL_MODE0(x) (((x) & 0x3) << 5) x 107 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c #define CDR_MAX_CNT(x) ((x) & 0xff) x 46 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define UCDR_xO_GAIN_MODE(x) ((x) & 0x7f) x 48 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define UCDR_SO_SATURATION(x) ((x) & 0x3f) x 59 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define TX_MARGINING(x) ((x) & 0x3f) x 65 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define CML_GEAR_MODE(x) (((x) & 7) << 3) x 66 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define CML2CMOS_IBOOST_MODE(x) ((x) & 7) x 68 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define MIXER_LOADB_MODE(x) (((x) & 0xf) << 2) x 69 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define MIXER_DATARATE_MODE(x) ((x) & 3) x 71 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define VGA_THRESH_DFE(x) ((x) & 0x3f) x 76 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define SIGDET_LVL(x) (((x) & 0xf) << 4) x 78 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define SIGDET_DEGLITCH_CTRL(x) (((x) & 0xf) << 1) x 81 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define DRVR_LOGIC_CLK_DIV(x) ((x) & 0xf) x 83 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define PARALLEL_RATE_MODE0(x) ((x) & 0x3) x 85 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define BAND_MODE0(x) ((x) & 0x3) x 87 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define LANE_MODE(x) ((x) & 0x1f) x 89 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define CDR_PD_SEL_MODE0(x) (((x) & 0x3) << 5) x 97 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c #define CDR_MAX_CNT(x) ((x) & 0xff) x 69 drivers/net/ethernet/rocker/rocker_hw.h #define ROCKER_DMA_DESC_ADDR(x) (0x1000 + (x) * 32) /* 8-byte */ x 70 drivers/net/ethernet/rocker/rocker_hw.h #define ROCKER_DMA_DESC_SIZE(x) (0x1008 + (x) * 32) x 71 drivers/net/ethernet/rocker/rocker_hw.h #define ROCKER_DMA_DESC_HEAD(x) (0x100c + (x) * 32) x 72 drivers/net/ethernet/rocker/rocker_hw.h #define ROCKER_DMA_DESC_TAIL(x) (0x1010 + (x) * 32) x 73 drivers/net/ethernet/rocker/rocker_hw.h #define ROCKER_DMA_DESC_CTRL(x) (0x1014 + (x) * 32) x 74 drivers/net/ethernet/rocker/rocker_hw.h #define ROCKER_DMA_DESC_CREDITS(x) (0x1018 + (x) * 32) x 75 drivers/net/ethernet/rocker/rocker_hw.h #define ROCKER_DMA_DESC_RES1(x) (0x101c + (x) * 32) x 328 drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h struct sxgbe_extra_stats *x); x 70 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c struct sxgbe_extra_stats *x) x 260 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c struct sxgbe_extra_stats *x, int *checksum) x 269 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_code_gmii_err++; x 273 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_watchdog_err++; x 277 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_crc_err++; x 281 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_gaint_pkt_err++; x 285 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip_hdr_err++; x 289 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip_payload_err++; x 293 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->overflow_error++; x 302 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->len_pkt++; x 305 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->mac_ctl_pkt++; x 308 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->dcb_ctl_pkt++; x 311 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->arp_pkt++; x 314 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->oam_pkt++; x 317 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->untag_okt++; x 320 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->other_pkt++; x 323 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->svlan_tag_pkt++; x 326 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->cvlan_tag_pkt++; x 329 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->dvlan_ocvlan_icvlan_pkt++; x 332 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->dvlan_osvlan_isvlan_pkt++; x 335 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->dvlan_osvlan_icvlan_pkt++; x 338 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->dvlan_ocvlan_icvlan_pkt++; x 349 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->not_ip_pkt++; x 352 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip4_tcp_pkt++; x 355 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip4_udp_pkt++; x 358 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip4_icmp_pkt++; x 361 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip4_unknown_pkt++; x 364 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip6_tcp_pkt++; x 367 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip6_udp_pkt++; x 370 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip6_icmp_pkt++; x 373 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->ip6_unknown_pkt++; x 382 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->vlan_filter_match++; x 386 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->sa_filter_fail++; x 390 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->da_filter_fail++; x 393 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->hash_filter_pass++; x 396 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->l3_filter_match++; x 399 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->l4_filter_match++; x 419 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c struct sxgbe_extra_stats *x) x 422 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->timestamp_dropped++; x 426 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_msg_type_no_ptp++; x 428 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_type_sync++; x 430 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_type_follow_up++; x 432 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_type_delay_req++; x 434 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_type_delay_resp++; x 436 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_type_pdelay_req++; x 438 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_type_pdelay_resp++; x 440 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_type_pdelay_follow_up++; x 442 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_announce++; x 444 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_mgmt++; x 446 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_signal++; x 448 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c x->rx_ptp_resv_msg_type++; x 272 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h struct sxgbe_extra_stats *x, int *checksum); x 282 drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h struct sxgbe_extra_stats *x); x 187 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c struct sxgbe_extra_stats *x) x 195 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->normal_irq_n++; x 198 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_normal_irq_n++; x 203 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_underflow_irq++; x 212 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_process_stopped_irq++; x 217 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->fatal_bus_error_irq++; x 226 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_read_transfer_err++; x 229 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_write_transfer_err++; x 233 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_desc_access_err++; x 236 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_buffer_access_err++; x 240 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_data_transfer_err++; x 247 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->tx_ctxt_desc_err++; x 259 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c struct sxgbe_extra_stats *x) x 267 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->normal_irq_n++; x 270 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_normal_irq_n++; x 278 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_underflow_irq++; x 284 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_process_stopped_irq++; x 289 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->fatal_bus_error_irq++; x 298 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_read_transfer_err++; x 301 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_write_transfer_err++; x 305 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_desc_access_err++; x 308 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_buffer_access_err++; x 312 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c x->rx_data_transfer_err++; x 36 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h struct sxgbe_extra_stats *x); x 38 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h struct sxgbe_extra_stats *x); x 42 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c #define SXGBE_ALIGN(x) L1_CACHE_ALIGN(x) x 68 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c #define SXGBE_COAL_TIMER(x) (jiffies + usecs_to_jiffies(x)) x 70 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c #define SXGBE_LPI_TIMER(x) (jiffies + msecs_to_jiffies(x)) x 190 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c #define SXGBE_TX_THRESH(x) (x->dma_tx_size/4) x 44 drivers/net/ethernet/sfc/falcon/net_driver.h #define EF4_BUG_ON_PARANOID(x) BUG_ON(x) x 45 drivers/net/ethernet/sfc/falcon/net_driver.h #define EF4_WARN_ON_PARANOID(x) WARN_ON(x) x 47 drivers/net/ethernet/sfc/falcon/net_driver.h #define EF4_BUG_ON_PARANOID(x) do {} while (0) x 48 drivers/net/ethernet/sfc/falcon/net_driver.h #define EF4_WARN_ON_PARANOID(x) do {} while (0) x 512 drivers/net/ethernet/sfc/falcon/net_driver.h #define EF4_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EF4_INT_MODE_MSI) x 44 drivers/net/ethernet/sfc/net_driver.h #define EFX_WARN_ON_ONCE_PARANOID(x) WARN_ON_ONCE(x) x 45 drivers/net/ethernet/sfc/net_driver.h #define EFX_WARN_ON_PARANOID(x) WARN_ON(x) x 47 drivers/net/ethernet/sfc/net_driver.h #define EFX_WARN_ON_ONCE_PARANOID(x) do {} while (0) x 48 drivers/net/ethernet/sfc/net_driver.h #define EFX_WARN_ON_PARANOID(x) do {} while (0) x 583 drivers/net/ethernet/sfc/net_driver.h #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI) x 161 drivers/net/ethernet/sgi/meth.h #define METH_RX_FIFO_WPTR(x) (((x)>>16)&0xf) x 162 drivers/net/ethernet/sgi/meth.h #define METH_RX_FIFO_RPTR(x) (((x)>>8)&0xf) x 163 drivers/net/ethernet/sgi/meth.h #define METH_RX_FIFO_DEPTH(x) ((x)&0x1f) x 243 drivers/net/ethernet/sgi/meth.h #define ADVANCE_RX_PTR(x) x=(x+1)&(RX_RING_ENTRIES-1) x 140 drivers/net/ethernet/smsc/smc911x.c #define PRINT_PKT(x...) do { } while (0) x 145 drivers/net/ethernet/smsc/smc911x.c #define SMC_ENABLE_INT(lp, x) do { \ x 148 drivers/net/ethernet/smsc/smc911x.c __mask |= (x); \ x 153 drivers/net/ethernet/smsc/smc911x.c #define SMC_DISABLE_INT(lp, x) do { \ x 156 drivers/net/ethernet/smsc/smc911x.c __mask &= ~(x); \ x 685 drivers/net/ethernet/smsc/smc911x.h #define IS_REV_A(x) ((x & 0xFFFF)==0) x 694 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_TX_FIFO(lp, x) SMC_outl( x, lp, TX_DATA_FIFO ) x 705 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_IRQ_CFG(lp, x) SMC_outl( x, lp, INT_CFG ) x 707 drivers/net/ethernet/smsc/smc911x.h #define SMC_ACK_INT(lp, x) SMC_outl( x, lp, INT_STS ) x 709 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_INT_EN(lp, x) SMC_outl( x, lp, INT_EN ) x 711 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_BYTE_TEST(lp, x) SMC_outl( x, lp, BYTE_TEST ) x 713 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_FIFO_INT(lp, x) SMC_outl( x, lp, FIFO_INT ) x 714 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_FIFO_TDA(lp, x) \ x 720 drivers/net/ethernet/smsc/smc911x.h SMC_SET_FIFO_INT( (lp), __mask | (x)<<24 ); \ x 723 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_FIFO_TSL(lp, x) \ x 729 drivers/net/ethernet/smsc/smc911x.h SMC_SET_FIFO_INT( (lp), __mask | (((x) & 0xFF)<<16)); \ x 732 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_FIFO_RSA(lp, x) \ x 738 drivers/net/ethernet/smsc/smc911x.h SMC_SET_FIFO_INT( (lp), __mask | (((x) & 0xFF)<<8)); \ x 741 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_FIFO_RSL(lp, x) \ x 747 drivers/net/ethernet/smsc/smc911x.h SMC_SET_FIFO_INT( (lp),__mask | ((x) & 0xFF)); \ x 751 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_RX_CFG(lp, x) SMC_outl( x, lp, RX_CFG ) x 753 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_TX_CFG(lp, x) SMC_outl( x, lp, TX_CFG ) x 755 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_HW_CFG(lp, x) SMC_outl( x, lp, HW_CFG ) x 757 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_RX_DP_CTRL(lp, x) SMC_outl( x, lp, RX_DP_CTRL ) x 759 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_PMT_CTRL(lp, x) SMC_outl( x, lp, PMT_CTRL ) x 761 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_GPIO_CFG(lp, x) SMC_outl( x, lp, GPIO_CFG ) x 763 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_RX_FIFO_INF(lp, x) SMC_outl( x, lp, RX_FIFO_INF ) x 765 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_TX_FIFO_INF(lp, x) SMC_outl( x, lp, TX_FIFO_INF ) x 767 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_GPT_CFG(lp, x) SMC_outl( x, lp, GPT_CFG ) x 769 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_RX_DROP(lp, x) SMC_outl( x, lp, RX_DROP ) x 771 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_MAC_CMD(lp, x) SMC_outl( x, lp, MAC_CSR_CMD ) x 773 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_MAC_DATA(lp, x) SMC_outl( x, lp, MAC_CSR_DATA ) x 775 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_AFC_CFG(lp, x) SMC_outl( x, lp, AFC_CFG ) x 777 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_E2P_CMD(lp, x) SMC_outl( x, lp, E2P_CMD ) x 779 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_E2P_DATA(lp, x) SMC_outl( x, lp, E2P_DATA ) x 797 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_MAC_CR(lp, x) SMC_GET_MAC_CSR( (lp), MAC_CR, x ) x 798 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_MAC_CR(lp, x) SMC_SET_MAC_CSR( (lp), MAC_CR, x ) x 799 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_ADDRH(lp, x) SMC_GET_MAC_CSR( (lp), ADDRH, x ) x 800 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_ADDRH(lp, x) SMC_SET_MAC_CSR( (lp), ADDRH, x ) x 801 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_ADDRL(lp, x) SMC_GET_MAC_CSR( (lp), ADDRL, x ) x 802 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_ADDRL(lp, x) SMC_SET_MAC_CSR( (lp), ADDRL, x ) x 803 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_HASHH(lp, x) SMC_GET_MAC_CSR( (lp), HASHH, x ) x 804 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_HASHH(lp, x) SMC_SET_MAC_CSR( (lp), HASHH, x ) x 805 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_HASHL(lp, x) SMC_GET_MAC_CSR( (lp), HASHL, x ) x 806 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_HASHL(lp, x) SMC_SET_MAC_CSR( (lp), HASHL, x ) x 807 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_MII_ACC(lp, x) SMC_GET_MAC_CSR( (lp), MII_ACC, x ) x 808 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_MII_ACC(lp, x) SMC_SET_MAC_CSR( (lp), MII_ACC, x ) x 809 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_MII_DATA(lp, x) SMC_GET_MAC_CSR( (lp), MII_DATA, x ) x 810 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_MII_DATA(lp, x) SMC_SET_MAC_CSR( (lp), MII_DATA, x ) x 811 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_FLOW(lp, x) SMC_GET_MAC_CSR( (lp), FLOW, x ) x 812 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_FLOW(lp, x) SMC_SET_MAC_CSR( (lp), FLOW, x ) x 813 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_VLAN1(lp, x) SMC_GET_MAC_CSR( (lp), VLAN1, x ) x 814 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_VLAN1(lp, x) SMC_SET_MAC_CSR( (lp), VLAN1, x ) x 815 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_VLAN2(lp, x) SMC_GET_MAC_CSR( (lp), VLAN2, x ) x 816 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_VLAN2(lp, x) SMC_SET_MAC_CSR( (lp), VLAN2, x ) x 817 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_WUFF(lp, x) SMC_SET_MAC_CSR( (lp), WUFF, x ) x 818 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_WUCSR(lp, x) SMC_GET_MAC_CSR( (lp), WUCSR, x ) x 819 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_WUCSR(lp, x) SMC_SET_MAC_CSR( (lp), WUCSR, x ) x 849 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_BMCR(lp,phy,x) SMC_GET_MII( (lp), MII_BMCR, phy, x ) x 850 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_PHY_BMCR(lp,phy,x) SMC_SET_MII( (lp), MII_BMCR, phy, x ) x 851 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_BMSR(lp,phy,x) SMC_GET_MII( (lp), MII_BMSR, phy, x ) x 852 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_ID1(lp,phy,x) SMC_GET_MII( (lp), MII_PHYSID1, phy, x ) x 853 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_ID2(lp,phy,x) SMC_GET_MII( (lp), MII_PHYSID2, phy, x ) x 854 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_MII_ADV(lp,phy,x) SMC_GET_MII( (lp), MII_ADVERTISE, phy, x ) x 855 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_PHY_MII_ADV(lp,phy,x) SMC_SET_MII( (lp), MII_ADVERTISE, phy, x ) x 856 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_MII_LPA(lp,phy,x) SMC_GET_MII( (lp), MII_LPA, phy, x ) x 857 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_PHY_MII_LPA(lp,phy,x) SMC_SET_MII( (lp), MII_LPA, phy, x ) x 858 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_CTRL_STS(lp,phy,x) SMC_GET_MII( (lp), PHY_MODE_CTRL_STS, phy, x ) x 859 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_PHY_CTRL_STS(lp,phy,x) SMC_SET_MII( (lp), PHY_MODE_CTRL_STS, phy, x ) x 860 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_INT_SRC(lp,phy,x) SMC_GET_MII( (lp), PHY_INT_SRC, phy, x ) x 861 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_PHY_INT_SRC(lp,phy,x) SMC_SET_MII( (lp), PHY_INT_SRC, phy, x ) x 862 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_INT_MASK(lp,phy,x) SMC_GET_MII( (lp), PHY_INT_MASK, phy, x ) x 863 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_PHY_INT_MASK(lp,phy,x) SMC_SET_MII( (lp), PHY_INT_MASK, phy, x ) x 864 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_PHY_SPECIAL(lp,phy,x) SMC_GET_MII( (lp), PHY_SPECIAL, phy, x ) x 147 drivers/net/ethernet/smsc/smc9194.c #define PRINTK3(x) printk x x 149 drivers/net/ethernet/smsc/smc9194.c #define PRINTK3(x) x 153 drivers/net/ethernet/smsc/smc9194.c #define PRINTK2(x) printk x x 155 drivers/net/ethernet/smsc/smc9194.c #define PRINTK2(x) x 159 drivers/net/ethernet/smsc/smc9194.c #define PRINTK(x) printk x x 161 drivers/net/ethernet/smsc/smc9194.c #define PRINTK(x) x 204 drivers/net/ethernet/smsc/smc9194.h #define SMC_SELECT_BANK(x) { outw( x, ioaddr + BANK_SELECT ); } x 212 drivers/net/ethernet/smsc/smc9194.h #define SMC_ENABLE_INT(x) {\ x 216 drivers/net/ethernet/smsc/smc9194.h mask |= (x);\ x 222 drivers/net/ethernet/smsc/smc9194.h #define SMC_DISABLE_INT(x) {\ x 226 drivers/net/ethernet/smsc/smc9194.h mask &= ~(x);\ x 146 drivers/net/ethernet/smsc/smc91c92_cs.c #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); } x 194 drivers/net/ethernet/smsc/smc91x.c #define SMC_ENABLE_INT(lp, x) do { \ x 199 drivers/net/ethernet/smsc/smc91x.c mask |= (x); \ x 205 drivers/net/ethernet/smsc/smc91x.c #define SMC_DISABLE_INT(lp, x) do { \ x 210 drivers/net/ethernet/smsc/smc91x.c mask &= ~(x); \ x 32 drivers/net/ethernet/smsc/smc91x.h #define SMC_outw_b(x, a, r) \ x 34 drivers/net/ethernet/smsc/smc91x.h unsigned int __val16 = (x); \ x 418 drivers/net/ethernet/smsc/smc91x.h #define SMC_outl(x, ioaddr, reg) BUG() x 430 drivers/net/ethernet/smsc/smc91x.h #define SMC_outw(lp, x, ioaddr, reg) SMC_outw_b(x, ioaddr, reg) x 446 drivers/net/ethernet/smsc/smc91x.h #define SMC_outb(x, ioaddr, reg) BUG() x 875 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_PN(lp, x) \ x 878 drivers/net/ethernet/smsc/smc91x.h SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \ x 880 drivers/net/ethernet/smsc/smc91x.h SMC_outb(x, ioaddr, PN_REG(lp)); \ x 882 drivers/net/ethernet/smsc/smc91x.h SMC_outw(lp, x, ioaddr, PN_REG(lp)); \ x 901 drivers/net/ethernet/smsc/smc91x.h #define SMC_ACK_INT(lp, x) \ x 904 drivers/net/ethernet/smsc/smc91x.h SMC_outb(x, ioaddr, INT_REG(lp)); \ x 910 drivers/net/ethernet/smsc/smc91x.h SMC_outw(lp, __mask | (x), ioaddr, INT_REG(lp)); \ x 919 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_INT_MASK(lp, x) \ x 922 drivers/net/ethernet/smsc/smc91x.h SMC_outb(x, ioaddr, IM_REG(lp)); \ x 924 drivers/net/ethernet/smsc/smc91x.h SMC_outw(lp, (x) << 8, ioaddr, INT_REG(lp)); \ x 929 drivers/net/ethernet/smsc/smc91x.h #define SMC_SELECT_BANK(lp, x) \ x 932 drivers/net/ethernet/smsc/smc91x.h SMC_outl((x)<<16, ioaddr, 12<<SMC_IO_SHIFT); \ x 934 drivers/net/ethernet/smsc/smc91x.h SMC_outw(lp, x, ioaddr, BANK_SELECT); \ x 939 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_BASE(lp, x) SMC_outw(lp, x, ioaddr, BASE_REG(lp)) x 943 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_CONFIG(lp, x) SMC_outw(lp, x, ioaddr, CONFIG_REG(lp)) x 949 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_CTL(lp, x) SMC_outw(lp, x, ioaddr, CTL_REG(lp)) x 955 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_GP(lp, x) \ x 958 drivers/net/ethernet/smsc/smc91x.h SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 1)); \ x 960 drivers/net/ethernet/smsc/smc91x.h SMC_outw(lp, x, ioaddr, GP_REG(lp)); \ x 963 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_MII(lp, x) SMC_outw(lp, x, ioaddr, MII_REG(lp)) x 967 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_MIR(lp, x) SMC_outw(lp, x, ioaddr, MIR_REG(lp)) x 971 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_MMU_CMD(lp, x) SMC_outw(lp, x, ioaddr, MMU_CMD_REG(lp)) x 977 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_PTR(lp, x) \ x 980 drivers/net/ethernet/smsc/smc91x.h SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \ x 982 drivers/net/ethernet/smsc/smc91x.h SMC_outw(lp, x, ioaddr, PTR_REG(lp)); \ x 989 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_RCR(lp, x) SMC_outw(lp, x, ioaddr, RCR_REG(lp)) x 995 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_RPC(lp, x) \ x 998 drivers/net/ethernet/smsc/smc91x.h SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \ x 1000 drivers/net/ethernet/smsc/smc91x.h SMC_outw(lp, x, ioaddr, RPC_REG(lp)); \ x 1005 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_TCR(lp, x) SMC_outw(lp, x, ioaddr, TCR_REG(lp)) x 1027 drivers/net/ethernet/smsc/smc91x.h #define SMC_SET_MCAST(lp, x) \ x 1029 drivers/net/ethernet/smsc/smc91x.h const unsigned char *mt = (x); \ x 249 drivers/net/ethernet/socionext/netsec.c #define NETSEC_F_NETSEC_VER_MAJOR_NUM(x) ((x) & 0xffff0000) x 42 drivers/net/ethernet/stmicro/stmmac/common.h #define STMMAC_GET_ENTRY(x, size) ((x + 1) & (size - 1)) x 34 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_GATE_PTP_EN(x) BIT(0x10 + x) x 35 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_GATE_RGMII_RX_EN(x) BIT(0x9 + (x * 2)) x 36 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_GATE_RGMII_TX_EN(x) BIT(0x8 + (x * 2)) x 37 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_GATE_GMII_RX_EN(x) BIT(0x4 + x) x 38 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_GATE_GMII_TX_EN(x) BIT(0x0 + x) x 41 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_DIV_OFFSET(x) (x * 8) x 45 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (x) x 51 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_SRC_CTRL_RGMII(x) 1 x 52 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_CLK_SRC_CTRL_SGMII(x) ((x >= 2) ? 1 : 0) x 54 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define NSS_COMMON_GMAC_CTL(x) (0x30 + (x * 4)) x 71 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c #define QSGMII_PHY_SGMII_CTL(x) ((x == 1) ? 0x134 : \ x 72 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c (0x13c + (4 * (x - 2)))) x 397 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c struct stmmac_extra_stats *x, u32 chan) x 406 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->tx_normal_irq_n++; x 410 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->tx_process_stopped_irq++; x 413 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->tx_process_stopped_irq++; x 420 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->tx_undeflow_irq++; x 424 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->tx_early_irq++; x 428 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->rx_normal_irq_n++; x 432 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->rx_buf_unav_irq++; x 435 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->rx_process_stopped_irq++; x 442 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->rx_overflow_irq++; x 446 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->rx_early_irq++; x 449 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c x->irq_rgmii_n++; x 273 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c static void dwmac1000_rgsmii(void __iomem *ioaddr, struct stmmac_extra_stats *x) x 278 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->irq_rgmii_n++; x 284 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->pcs_link = 1; x 289 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->pcs_speed = SPEED_1000; x 291 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->pcs_speed = SPEED_100; x 293 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->pcs_speed = SPEED_10; x 295 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->pcs_duplex = (status & GMAC_RGSMIIIS_LNKMOD_MASK); x 297 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c pr_info("Link is Up - %d/%s\n", (int)x->pcs_speed, x 298 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->pcs_duplex ? "Full" : "Half"); x 300 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->pcs_link = 0; x 306 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c struct stmmac_extra_stats *x) x 318 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mmc_tx_irq_n++; x 320 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mmc_rx_irq_n++; x 322 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mmc_rx_csum_offload_irq_n++; x 326 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->irq_receive_pmt_irq_n++; x 335 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->irq_tx_path_in_lpi_mode_n++; x 337 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->irq_tx_path_exit_lpi_mode_n++; x 339 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->irq_rx_path_in_lpi_mode_n++; x 341 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->irq_rx_path_exit_lpi_mode_n++; x 344 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); x 347 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c dwmac1000_rgsmii(ioaddr, x); x 425 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c static void dwmac1000_debug(void __iomem *ioaddr, struct stmmac_extra_stats *x, x 431 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_tx_status_fifo_full++; x 433 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_tx_fifo_not_empty++; x 435 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mmtl_fifo_ctrl++; x 440 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_tx_fifo_read_ctrl_write++; x 442 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_tx_fifo_read_ctrl_wait++; x 444 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_tx_fifo_read_ctrl_read++; x 446 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_tx_fifo_read_ctrl_idle++; x 449 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_tx_in_pause++; x 455 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_tx_frame_ctrl_xfer++; x 457 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_tx_frame_ctrl_pause++; x 459 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_tx_frame_ctrl_wait++; x 461 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_tx_frame_ctrl_idle++; x 464 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_gmii_tx_proto_engine++; x 470 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_fill_level_full++; x 472 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_fill_above_thresh++; x 474 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_fill_below_thresh++; x 476 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_fill_level_empty++; x 483 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_read_ctrl_flush++; x 485 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_read_ctrl_read_data++; x 487 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_read_ctrl_status++; x 489 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_read_ctrl_idle++; x 492 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mtl_rx_fifo_ctrl_active++; x 494 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_rx_frame_ctrl_fifo = (value & GMAC_DEBUG_RFCFCSTS_MASK) x 497 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c x->mac_gmii_rx_proto_engine++; x 65 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c struct stmmac_extra_stats *x) x 83 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c static void dwmac100_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x, x 92 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c x->rx_overflow_cntr += 0x800; x 97 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c x->rx_overflow_cntr += ove_cntr; x 102 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c x->rx_missed_cntr += 0xffff; x 106 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c x->rx_missed_cntr += miss_f; x 18 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define GMAC_HASH_TAB(x) (0x10 + (x) * 4) x 23 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define GMAC_QX_TX_FLOW_CTRL(x) (0x70 + x * 4) x 94 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define GMAC_RXQCTRL_PSRQX_MASK(x) GENMASK(7 + ((x) * 8), 0 + ((x) * 8)) x 95 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define GMAC_RXQCTRL_PSRQX_SHIFT(x) ((x) * 8) x 98 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define GMAC_TXQCTRL_PSTQX_MASK(x) GENMASK(7 + ((x) * 8), 0 + ((x) * 8)) x 99 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define GMAC_TXQCTRL_PSTQX_SHIFT(x) ((x) * 8) x 243 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_INT_QX(x) BIT(x) x 248 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_RXQ_DMA_Q04MDMACH(x) ((x) << 0) x 249 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_RXQ_DMA_QXMDMACH_MASK(x) GENMASK(11 + (8 * ((x) - 1)), 8 * (x)) x 254 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_CHANX_BASE_ADDR(x) (MTL_CHAN_BASE_ADDR + \ x 255 drivers/net/ethernet/stmicro/stmmac/dwmac4.h (x * MTL_CHAN_BASE_OFFSET)) x 257 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_CHAN_TX_OP_MODE(x) MTL_CHANX_BASE_ADDR(x) x 258 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_CHAN_TX_DEBUG(x) (MTL_CHANX_BASE_ADDR(x) + 0x8) x 259 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_CHAN_INT_CTRL(x) (MTL_CHANX_BASE_ADDR(x) + 0x2c) x 260 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_CHAN_RX_OP_MODE(x) (MTL_CHANX_BASE_ADDR(x) + 0x30) x 261 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_CHAN_RX_DEBUG(x) (MTL_CHANX_BASE_ADDR(x) + 0x38) x 306 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_ETSX_CTRL_BASE_ADDR(x) (MTL_ETS_CTRL_BASE_ADDR + \ x 307 drivers/net/ethernet/stmicro/stmmac/dwmac4.h ((x) * MTL_ETS_CTRL_BASE_OFFSET)) x 315 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_TXQX_WEIGHT_BASE_ADDR(x) (MTL_TXQ_WEIGHT_BASE_ADDR + \ x 316 drivers/net/ethernet/stmicro/stmmac/dwmac4.h ((x) * MTL_TXQ_WEIGHT_BASE_OFFSET)) x 322 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_SEND_SLP_CREDX_BASE_ADDR(x) (MTL_SEND_SLP_CRED_BASE_ADDR + \ x 323 drivers/net/ethernet/stmicro/stmmac/dwmac4.h ((x) * MTL_SEND_SLP_CRED_OFFSET)) x 330 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_HIGH_CREDX_BASE_ADDR(x) (MTL_HIGH_CRED_BASE_ADDR + \ x 331 drivers/net/ethernet/stmicro/stmmac/dwmac4.h ((x) * MTL_HIGH_CRED_OFFSET)) x 338 drivers/net/ethernet/stmicro/stmmac/dwmac4.h #define MTL_LOW_CREDX_BASE_ADDR(x) (MTL_LOW_CRED_BASE_ADDR + \ x 339 drivers/net/ethernet/stmicro/stmmac/dwmac4.h ((x) * MTL_LOW_CRED_OFFSET)) x 528 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c static void dwmac4_phystatus(void __iomem *ioaddr, struct stmmac_extra_stats *x) x 533 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->irq_rgmii_n++; x 539 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->pcs_link = 1; x 544 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->pcs_speed = SPEED_1000; x 546 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->pcs_speed = SPEED_100; x 548 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->pcs_speed = SPEED_10; x 550 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->pcs_duplex = (status & GMAC_PHYIF_CTRLSTATUS_LNKMOD_MASK); x 552 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c pr_info("Link is Up - %d/%s\n", (int)x->pcs_speed, x 553 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->pcs_duplex ? "Full" : "Half"); x 555 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->pcs_link = 0; x 585 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c struct stmmac_extra_stats *x) x 597 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mmc_tx_irq_n++; x 599 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mmc_rx_irq_n++; x 601 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mmc_rx_csum_offload_irq_n++; x 605 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->irq_receive_pmt_irq_n++; x 615 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->irq_tx_path_in_lpi_mode_n++; x 619 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->irq_tx_path_exit_lpi_mode_n++; x 622 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->irq_rx_path_in_lpi_mode_n++; x 624 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->irq_rx_path_exit_lpi_mode_n++; x 627 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); x 629 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c dwmac4_phystatus(ioaddr, x); x 634 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c static void dwmac4_debug(void __iomem *ioaddr, struct stmmac_extra_stats *x, x 644 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_tx_status_fifo_full++; x 646 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_tx_fifo_not_empty++; x 648 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mmtl_fifo_ctrl++; x 653 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_tx_fifo_read_ctrl_write++; x 655 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_tx_fifo_read_ctrl_wait++; x 657 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_tx_fifo_read_ctrl_read++; x 659 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_tx_fifo_read_ctrl_idle++; x 662 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_tx_in_pause++; x 673 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_fill_level_full++; x 675 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_fill_above_thresh++; x 677 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_fill_below_thresh++; x 679 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_fill_level_empty++; x 686 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_read_ctrl_flush++; x 688 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_read_ctrl_read_data++; x 690 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_read_ctrl_status++; x 692 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_read_ctrl_idle++; x 695 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mtl_rx_fifo_ctrl_active++; x 706 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_tx_frame_ctrl_xfer++; x 708 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_tx_frame_ctrl_pause++; x 710 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_tx_frame_ctrl_wait++; x 712 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_tx_frame_ctrl_idle++; x 715 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_gmii_tx_proto_engine++; x 717 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_rx_frame_ctrl_fifo = (value & GMAC_DEBUG_RFCFCSTS_MASK) x 720 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c x->mac_gmii_rx_proto_engine++; x 15 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c static int dwmac4_wrback_get_tx_status(void *data, struct stmmac_extra_stats *x, x 35 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_jabber++; x 37 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_frame_flushed++; x 39 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_losscarrier++; x 43 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_carrier++; x 53 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_deferred++; x 56 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_underflow++; x 59 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_ip_header_error++; x 62 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_payload_error++; x 68 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->tx_deferred++; x 73 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c static int dwmac4_wrback_get_rx_status(void *data, struct stmmac_extra_stats *x, x 94 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->rx_gmac_overflow++; x 97 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->rx_watchdog++; x 100 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->rx_mii++; x 103 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->rx_crc_errors++; x 108 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->dribbling_bit++; x 116 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ip_hdr_err++; x 118 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ip_csum_bypassed++; x 120 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ipv4_pkt_rcvd++; x 122 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ipv6_pkt_rcvd++; x 125 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->no_ptp_rx_msg_type_ext++; x 127 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_sync++; x 129 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_follow_up++; x 131 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_delay_req++; x 133 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_delay_resp++; x 135 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_pdelay_req++; x 137 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_pdelay_resp++; x 139 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_pdelay_follow_up++; x 141 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_announce++; x 143 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_type_management++; x 145 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_rx_msg_pkt_reserved_type++; x 148 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_frame_type++; x 150 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->ptp_ver++; x 152 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->timestamp_dropped++; x 155 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->sa_rx_filter_fail++; x 159 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->da_rx_filter_fail++; x 164 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->l3_filter_match++; x 166 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->l4_filter_match++; x 169 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c x->l3_l4_filter_no_match++; x 87 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHANX_BASE_ADDR(x) (DMA_CHAN_BASE_ADDR + \ x 88 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h (x * DMA_CHAN_BASE_OFFSET)) x 91 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CONTROL(x) DMA_CHANX_BASE_ADDR(x) x 92 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_CONTROL(x) (DMA_CHANX_BASE_ADDR(x) + 0x4) x 93 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_CONTROL(x) (DMA_CHANX_BASE_ADDR(x) + 0x8) x 94 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_BASE_ADDR(x) (DMA_CHANX_BASE_ADDR(x) + 0x14) x 95 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_BASE_ADDR(x) (DMA_CHANX_BASE_ADDR(x) + 0x1c) x 96 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_END_ADDR(x) (DMA_CHANX_BASE_ADDR(x) + 0x20) x 97 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_END_ADDR(x) (DMA_CHANX_BASE_ADDR(x) + 0x28) x 98 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_RING_LEN(x) (DMA_CHANX_BASE_ADDR(x) + 0x2c) x 99 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_RING_LEN(x) (DMA_CHANX_BASE_ADDR(x) + 0x30) x 100 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_INTR_ENA(x) (DMA_CHANX_BASE_ADDR(x) + 0x34) x 101 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_WATCHDOG(x) (DMA_CHANX_BASE_ADDR(x) + 0x38) x 102 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_SLOT_CTRL_STATUS(x) (DMA_CHANX_BASE_ADDR(x) + 0x3c) x 103 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_TX_DESC(x) (DMA_CHANX_BASE_ADDR(x) + 0x44) x 104 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_RX_DESC(x) (DMA_CHANX_BASE_ADDR(x) + 0x4c) x 105 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_TX_BUF_ADDR(x) (DMA_CHANX_BASE_ADDR(x) + 0x54) x 106 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_RX_BUF_ADDR(x) (DMA_CHANX_BASE_ADDR(x) + 0x5c) x 107 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_STATUS(x) (DMA_CHANX_BASE_ADDR(x) + 0x60) x 193 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h struct stmmac_extra_stats *x, u32 chan); x 118 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c struct stmmac_extra_stats *x, u32 chan) x 127 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->rx_buf_unav_irq++; x 129 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->rx_process_stopped_irq++; x 131 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->rx_watchdog_irq++; x 133 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->tx_early_irq++; x 135 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->tx_process_stopped_irq++; x 139 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->fatal_bus_error_irq++; x 145 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->normal_irq_n++; x 147 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->rx_normal_irq_n++; x 152 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->tx_normal_irq_n++; x 156 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c x->rx_early_irq++; x 15 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define PPS_MAXIDX(x) ((((x) + 1) * 8) - 1) x 16 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define PPS_MINIDX(x) ((x) * 8) x 17 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define PPSx_MASK(x) GENMASK(PPS_MAXIDX(x), PPS_MINIDX(x)) x 18 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define MCGRENx(x) BIT(PPS_MAXIDX(x)) x 19 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define TRGTMODSELx(x, val) \ x 20 drivers/net/ethernet/stmicro/stmmac/dwmac5.h GENMASK(PPS_MAXIDX(x) - 1, PPS_MAXIDX(x) - 2) & \ x 21 drivers/net/ethernet/stmicro/stmmac/dwmac5.h ((val) << (PPS_MAXIDX(x) - 2)) x 22 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define PPSCMDx(x, val) \ x 23 drivers/net/ethernet/stmicro/stmmac/dwmac5.h GENMASK(PPS_MINIDX(x) + 3, PPS_MINIDX(x)) & \ x 24 drivers/net/ethernet/stmicro/stmmac/dwmac5.h ((val) << PPS_MINIDX(x)) x 26 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define MAC_PPSx_TARGET_TIME_SEC(x) (0x00000b80 + ((x) * 0x10)) x 27 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define MAC_PPSx_TARGET_TIME_NSEC(x) (0x00000b84 + ((x) * 0x10)) x 30 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define MAC_PPSx_INTERVAL(x) (0x00000b88 + ((x) * 0x10)) x 31 drivers/net/ethernet/stmicro/stmmac/dwmac5.h #define MAC_PPSx_WIDTH(x) (0x00000b8c + ((x) * 0x10)) x 139 drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h int dwmac_dma_interrupt(void __iomem *ioaddr, struct stmmac_extra_stats *x, x 149 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c struct stmmac_extra_stats *x, u32 chan) x 165 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->tx_undeflow_irq++; x 168 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->tx_jabber_irq++; x 171 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->rx_overflow_irq++; x 174 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->rx_buf_unav_irq++; x 176 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->rx_process_stopped_irq++; x 178 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->rx_watchdog_irq++; x 180 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->tx_early_irq++; x 182 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->tx_process_stopped_irq++; x 186 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->fatal_bus_error_irq++; x 192 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->normal_irq_n++; x 197 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->rx_normal_irq_n++; x 202 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->tx_normal_irq_n++; x 206 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c x->rx_early_irq++; x 58 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_HASH_TABLE(x) (0x00000010 + (x) * 4) x 74 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_RXQEN(x) GENMASK((x) * 2 + 1, (x) * 2) x 75 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_RXQEN_SHIFT(x) ((x) * 2) x 78 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PSRQ(x) GENMASK((x) * 8 + 7, (x) * 8) x 79 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PSRQ_SHIFT(x) ((x) * 8) x 88 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_Qx_TX_FLOW_CTRL(x) (0x00000070 + (x) * 4) x 151 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_ADDRx_HIGH(x) (0x00000300 + (x) * 0x8) x 156 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_ADDRx_LOW(x) (0x00000304 + (x) * 0x8) x 203 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPS_MAXIDX(x) ((((x) + 1) * 8) - 1) x 204 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPS_MINIDX(x) ((x) * 8) x 205 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPSx_MASK(x) \ x 206 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h GENMASK(XGMAC_PPS_MAXIDX(x), XGMAC_PPS_MINIDX(x)) x 207 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_TRGTMODSELx(x, val) \ x 208 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h GENMASK(XGMAC_PPS_MAXIDX(x) - 1, XGMAC_PPS_MAXIDX(x) - 2) & \ x 209 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h ((val) << (XGMAC_PPS_MAXIDX(x) - 2)) x 210 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPSCMDx(x, val) \ x 211 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h GENMASK(XGMAC_PPS_MINIDX(x) + 3, XGMAC_PPS_MINIDX(x)) & \ x 212 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h ((val) << XGMAC_PPS_MINIDX(x)) x 216 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPSx_TARGET_TIME_SEC(x) (0x00000d80 + (x) * 0x10) x 217 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPSx_TARGET_TIME_NSEC(x) (0x00000d84 + (x) * 0x10) x 219 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPSx_INTERVAL(x) (0x00000d88 + (x) * 0x10) x 220 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PPSx_WIDTH(x) (0x00000d8c + (x) * 0x10) x 233 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_QxMDMACH(x) GENMASK((x) * 8 + 7, (x) * 8) x 234 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_QxMDMACH_SHIFT(x) ((x) * 8) x 238 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PSTC(x) GENMASK((x) * 8 + 7, (x) * 8) x 239 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_PSTC_SHIFT(x) ((x) * 8) x 259 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_TXQ_OPMODE(x) (0x00001100 + (0x80 * (x))) x 269 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_TCx_ETS_CONTROL(x) (0x00001110 + (0x80 * (x))) x 270 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_TCx_QUANTUM_WEIGHT(x) (0x00001118 + (0x80 * (x))) x 271 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_TCx_SENDSLOPE(x) (0x0000111c + (0x80 * (x))) x 272 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_TCx_HICREDIT(x) (0x00001120 + (0x80 * (x))) x 273 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_TCx_LOCREDIT(x) (0x00001124 + (0x80 * (x))) x 279 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_RXQ_OPMODE(x) (0x00001140 + (0x80 * (x))) x 286 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_RXQ_FLOW_CONTROL(x) (0x00001150 + (0x80 * (x))) x 291 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_QINTEN(x) (0x00001170 + (0x80 * (x))) x 293 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_MTL_QINT_STATUS(x) (0x00001174 + (0x80 * (x))) x 334 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_CONTROL(x) (0x00003100 + (0x80 * (x))) x 337 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_TX_CONTROL(x) (0x00003104 + (0x80 * (x))) x 343 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_RX_CONTROL(x) (0x00003108 + (0x80 * (x))) x 349 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_TxDESC_HADDR(x) (0x00003110 + (0x80 * (x))) x 350 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_TxDESC_LADDR(x) (0x00003114 + (0x80 * (x))) x 351 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_RxDESC_HADDR(x) (0x00003118 + (0x80 * (x))) x 352 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_RxDESC_LADDR(x) (0x0000311c + (0x80 * (x))) x 353 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_TxDESC_TAIL_LPTR(x) (0x00003124 + (0x80 * (x))) x 354 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_RxDESC_TAIL_LPTR(x) (0x0000312c + (0x80 * (x))) x 355 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_TxDESC_RING_LEN(x) (0x00003130 + (0x80 * (x))) x 356 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_RxDESC_RING_LEN(x) (0x00003134 + (0x80 * (x))) x 357 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_INT_EN(x) (0x00003138 + (0x80 * (x))) x 366 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_Rx_WATCHDOG(x) (0x0000313c + (0x80 * (x))) x 368 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h #define XGMAC_DMA_CH_STATUS(x) (0x00003160 + (0x80 * (x))) x 242 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c struct stmmac_extra_stats *x) x 254 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c x->irq_receive_pmt_irq_n++; x 263 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c x->irq_tx_path_in_lpi_mode_n++; x 267 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c x->irq_tx_path_exit_lpi_mode_n++; x 270 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c x->irq_rx_path_in_lpi_mode_n++; x 272 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c x->irq_rx_path_exit_lpi_mode_n++; x 11 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c static int dwxgmac2_get_tx_status(void *data, struct stmmac_extra_stats *x, x 25 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c static int dwxgmac2_get_rx_status(void *data, struct stmmac_extra_stats *x, x 317 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c struct stmmac_extra_stats *x, u32 chan) x 326 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c x->rx_buf_unav_irq++; x 330 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c x->tx_process_stopped_irq++; x 334 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c x->fatal_bus_error_irq++; x 341 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c x->normal_irq_n++; x 344 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c x->rx_normal_irq_n++; x 348 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c x->tx_normal_irq_n++; x 15 drivers/net/ethernet/stmicro/stmmac/enh_desc.c static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x, x 32 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_jabber++; x 35 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_frame_flushed++; x 40 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_losscarrier++; x 44 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_carrier++; x 53 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_deferred++; x 57 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_underflow++; x 61 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_ip_header_error++; x 64 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_payload_error++; x 72 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_deferred++; x 76 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->tx_vlan++; x 120 drivers/net/ethernet/stmicro/stmmac/enh_desc.c static void enh_desc_get_ext_status(void *data, struct stmmac_extra_stats *x, x 130 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ip_hdr_err++; x 132 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ip_payload_err++; x 134 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ip_csum_bypassed++; x 136 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ipv4_pkt_rcvd++; x 138 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ipv6_pkt_rcvd++; x 141 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->no_ptp_rx_msg_type_ext++; x 143 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_sync++; x 145 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_follow_up++; x 147 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_delay_req++; x 149 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_delay_resp++; x 151 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_pdelay_req++; x 153 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_pdelay_resp++; x 155 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_pdelay_follow_up++; x 157 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_announce++; x 159 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_type_management++; x 161 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_rx_msg_pkt_reserved_type++; x 164 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_frame_type++; x 166 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->ptp_ver++; x 168 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->timestamp_dropped++; x 170 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->av_pkt_rcvd++; x 172 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->av_tagged_pkt_rcvd++; x 174 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->vlan_tag_priority_val++; x 176 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->l3_filter_match++; x 178 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->l4_filter_match++; x 180 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->l3_l4_filter_no_match++; x 184 drivers/net/ethernet/stmicro/stmmac/enh_desc.c static int enh_desc_get_rx_status(void *data, struct stmmac_extra_stats *x, x 201 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->rx_desc++; x 205 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->rx_gmac_overflow++; x 213 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->rx_watchdog++; x 216 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->rx_mii++; x 219 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->rx_crc_errors++; x 235 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->dribbling_bit++; x 238 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->sa_rx_filter_fail++; x 242 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->da_rx_filter_fail++; x 246 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->rx_length++; x 251 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x->rx_vlan++; x 428 drivers/net/ethernet/stmicro/stmmac/enh_desc.c u64 x; x 430 drivers/net/ethernet/stmicro/stmmac/enh_desc.c x = *(u64 *)ep; x 433 drivers/net/ethernet/stmicro/stmmac/enh_desc.c (unsigned int)x, (unsigned int)(x >> 32), x 58 drivers/net/ethernet/stmicro/stmmac/hwif.h int (*tx_status)(void *data, struct stmmac_extra_stats *x, x 67 drivers/net/ethernet/stmicro/stmmac/hwif.h int (*rx_status)(void *data, struct stmmac_extra_stats *x, x 69 drivers/net/ethernet/stmicro/stmmac/hwif.h void (*rx_extended_status)(void *data, struct stmmac_extra_stats *x, x 187 drivers/net/ethernet/stmicro/stmmac/hwif.h void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x, x 197 drivers/net/ethernet/stmicro/stmmac/hwif.h struct stmmac_extra_stats *x, u32 chan); x 312 drivers/net/ethernet/stmicro/stmmac/hwif.h struct stmmac_extra_stats *x); x 332 drivers/net/ethernet/stmicro/stmmac/hwif.h void (*debug)(void __iomem *ioaddr, struct stmmac_extra_stats *x, x 15 drivers/net/ethernet/stmicro/stmmac/norm_desc.c static int ndesc_get_tx_status(void *data, struct stmmac_extra_stats *x, x 33 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->tx_underflow++; x 37 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->tx_carrier++; x 41 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->tx_losscarrier++; x 56 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->tx_vlan++; x 59 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->tx_deferred++; x 73 drivers/net/ethernet/stmicro/stmmac/norm_desc.c static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x, x 90 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->rx_desc++; x 92 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->sa_filter_fail++; x 94 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->overflow_error++; x 96 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->ipc_csum_error++; x 98 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->rx_collision++; x 102 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->rx_crc_errors++; x 108 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->dribbling_bit++; x 111 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->rx_length++; x 115 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->rx_mii++; x 120 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x->vlan_tag++; x 280 drivers/net/ethernet/stmicro/stmmac/norm_desc.c u64 x; x 282 drivers/net/ethernet/stmicro/stmmac/norm_desc.c x = *(u64 *)p; x 285 drivers/net/ethernet/stmicro/stmmac/norm_desc.c (unsigned int)x, (unsigned int)(x >> 32), x 48 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c #define STMMAC_ALIGN(x) ALIGN(ALIGN(x, SMP_CACHE_BYTES), 16) x 96 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c #define STMMAC_LPI_T(x) (jiffies + msecs_to_jiffies(x)) x 113 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c #define STMMAC_COAL_TIMER(x) (jiffies + usecs_to_jiffies(x)) x 17 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h #define GMAC_AN_CTRL(x) (x) /* AN control */ x 18 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h #define GMAC_AN_STATUS(x) (x + 0x4) /* AN status */ x 19 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h #define GMAC_ANE_ADV(x) (x + 0x8) /* ANE Advertisement */ x 20 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h #define GMAC_ANE_LPA(x) (x + 0xc) /* ANE link partener ability */ x 21 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h #define GMAC_ANE_EXP(x) (x + 0x10) /* ANE expansion */ x 22 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h #define GMAC_TBI(x) (x + 0x14) /* TBI extend status */ x 58 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h struct stmmac_extra_stats *x) x 63 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h x->irq_pcs_ane_n++; x 69 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h x->irq_pcs_link_n++; x 39 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c int x = mcast_bins; x 41 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c switch (x) { x 47 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c x = 0; x 52 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c return x; x 70 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c int x = ucast_entries; x 72 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c switch (x) { x 78 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c x = 1; x 83 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c return x; x 92 drivers/net/ethernet/sun/cassini.c #define cas_page_map(x) kmap_atomic((x)) x 93 drivers/net/ethernet/sun/cassini.c #define cas_page_unmap(x) kunmap_atomic((x)) x 96 drivers/net/ethernet/sun/cassini.c #define cas_skb_release(x) netif_rx(x) x 466 drivers/net/ethernet/sun/cassini.c #define RX_USED_ADD(x, y) ((x)->used += (y)) x 467 drivers/net/ethernet/sun/cassini.c #define RX_USED_SET(x, y) ((x)->used = (y)) x 469 drivers/net/ethernet/sun/cassini.c #define RX_USED_ADD(x, y) x 470 drivers/net/ethernet/sun/cassini.c #define RX_USED_SET(x, y) x 1829 drivers/net/ethernet/sun/cassini.c #define CAS_TABORT(x) (((x)->cas_flags & CAS_FLAG_TARGET_ABORT) ? 2 : 1) x 1830 drivers/net/ethernet/sun/cassini.c #define CAS_ROUND_PAGE(x) (((x) + PAGE_SIZE - 1) & PAGE_MASK) x 361 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_INTRN_MASK(x) (REG_PLUS_INTR_MASK_1 + ((x) - 1)*16) x 380 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_INTRN_STATUS(x) (REG_PLUS_INTR_STATUS_1 + ((x) - 1)*16) x 386 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_ALIASN_CLEAR(x) (REG_PLUS_ALIAS_CLEAR_1 + ((x) - 1)*16) x 390 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_INTRN_STATUS_ALIAS(x) (REG_PLUS_INTR_STATUS_ALIAS_1 + ((x) - 1)*16) x 517 drivers/net/ethernet/sun/cassini.h #define REG_TX_KICKN(x) (REG_TX_KICK0 + (x)*4) x 519 drivers/net/ethernet/sun/cassini.h #define REG_TX_COMPN(x) (REG_TX_COMP0 + (x)*4) x 546 drivers/net/ethernet/sun/cassini.h #define TX_COMPWB_NEXT(x) ((x) >> 16) x 552 drivers/net/ethernet/sun/cassini.h #define REG_TX_DBN_LOW(x) (REG_TX_DB0_LOW + (x)*8) x 553 drivers/net/ethernet/sun/cassini.h #define REG_TX_DBN_HI(x) (REG_TX_DB0_HI + (x)*8) x 1039 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_RX_CBN_LOW(x) (REG_PLUS_RX_CB1_LOW + 8*((x) - 1)) x 1040 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_RX_CBN_HI(x) (REG_PLUS_RX_CB1_HI + 8*((x) - 1)) x 1048 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_RX_COMPN_HEAD(x) (REG_PLUS_RX_COMP1_HEAD + 8*((x) - 1)) x 1049 drivers/net/ethernet/sun/cassini.h #define REG_PLUS_RX_COMPN_TAIL(x) (REG_PLUS_RX_COMP1_TAIL + 8*((x) - 1)) x 1146 drivers/net/ethernet/sun/cassini.h #define REG_HP_FLOW_DBN(x) (REG_HP_FLOW_DB0 + (x)*4) x 1572 drivers/net/ethernet/sun/cassini.h #define REG_MAC_ADDRN(x) (REG_MAC_ADDR0 + (x)*4) x 1592 drivers/net/ethernet/sun/cassini.h #define REG_MAC_HASH_TABLEN(x) (REG_MAC_HASH_TABLE0 + (x)*4) x 2067 drivers/net/ethernet/sun/cassini.h #define REG_ENTROPY_KEYN(x) (REG_ENTROPY_KEY0 + 4*(x)) x 2508 drivers/net/ethernet/sun/cassini.h #define CAS_PHY_MII(x) ((x) & (CAS_PHY_MII_MDIO0 | CAS_PHY_MII_MDIO1)) x 2521 drivers/net/ethernet/sun/cassini.h #define DESC_RING_I_TO_S(x) (32*(1 << (x))) x 2522 drivers/net/ethernet/sun/cassini.h #define COMP_RING_I_TO_S(x) (128*(1 << (x))) x 2550 drivers/net/ethernet/sun/cassini.h #define TX_DESC_RINGN_INDEX(x) TX_DESC_RING_INDEX x 2551 drivers/net/ethernet/sun/cassini.h #define RX_DESC_RINGN_INDEX(x) RX_DESC_RING_INDEX x 2552 drivers/net/ethernet/sun/cassini.h #define RX_COMP_RINGN_INDEX(x) RX_COMP_RING_INDEX x 2553 drivers/net/ethernet/sun/cassini.h #define TX_DESC_RINGN_SIZE(x) TX_DESC_RING_SIZE x 2554 drivers/net/ethernet/sun/cassini.h #define RX_DESC_RINGN_SIZE(x) RX_DESC_RING_SIZE x 2555 drivers/net/ethernet/sun/cassini.h #define RX_COMP_RINGN_SIZE(x) RX_COMP_RING_SIZE x 2558 drivers/net/ethernet/sun/cassini.h #define CAS_BASE(x, y) (((y) << (x ## _SHIFT)) & (x ## _MASK)) x 2559 drivers/net/ethernet/sun/cassini.h #define CAS_VAL(x, y) (((y) & (x ## _MASK)) >> (x ## _SHIFT)) x 2795 drivers/net/ethernet/sun/cassini.h #define CAS_FLAG_RXD_POST(x) ((1 << (CAS_FLAG_RXD_POST_SHIFT + (x))) & \ x 2867 drivers/net/ethernet/sun/cassini.h #define TX_DESC_NEXT(r, x) (((x) + 1) & (TX_DESC_RINGN_SIZE(r) - 1)) x 2868 drivers/net/ethernet/sun/cassini.h #define RX_DESC_ENTRY(r, x) ((x) & (RX_DESC_RINGN_SIZE(r) - 1)) x 2869 drivers/net/ethernet/sun/cassini.h #define RX_COMP_ENTRY(r, x) ((x) & (RX_COMP_RINGN_SIZE(r) - 1)) x 2871 drivers/net/ethernet/sun/cassini.h #define TX_BUFF_COUNT(r, x, y) ((x) <= (y) ? ((y) - (x)) : \ x 2872 drivers/net/ethernet/sun/cassini.h (TX_DESC_RINGN_SIZE(r) - (x) + (y))) x 2891 drivers/net/ethernet/sun/cassini.h #define RX_AE_FREEN_VAL(x) (RX_DESC_RINGN_SIZE(x) >> 1) x 59 drivers/net/ethernet/sun/sunbmac.c #define DP(x) printk x x 61 drivers/net/ethernet/sun/sunbmac.c #define DP(x) x 65 drivers/net/ethernet/sun/sunbmac.c #define DTX(x) printk x x 67 drivers/net/ethernet/sun/sunbmac.c #define DTX(x) x 71 drivers/net/ethernet/sun/sunbmac.c #define DIRQ(x) printk x x 73 drivers/net/ethernet/sun/sunbmac.c #define DIRQ(x) x 161 drivers/net/ethernet/sun/sunhme.c #define HMD(x) printk x x 163 drivers/net/ethernet/sun/sunhme.c #define HMD(x) x 169 drivers/net/ethernet/sun/sunhme.c #define ASD(x) printk x x 171 drivers/net/ethernet/sun/sunhme.c #define ASD(x) x 1913 drivers/net/ethernet/sun/sunhme.c #define TXD(x) printk x x 1915 drivers/net/ethernet/sun/sunhme.c #define TXD(x) x 1977 drivers/net/ethernet/sun/sunhme.c #define RXD(x) printk x x 1979 drivers/net/ethernet/sun/sunhme.c #define RXD(x) x 2244 drivers/net/ethernet/sun/sunhme.c #define SXD(x) printk x x 2246 drivers/net/ethernet/sun/sunhme.c #define SXD(x) x 657 drivers/net/ethernet/synopsys/dwc-xlgmac.h #define XLGMAC_PR(x...) do { } while (0) x 80 drivers/net/ethernet/tehuti/tehuti.h # define H32_64(x) (u32) ((u64)(x) >> 32) x 81 drivers/net/ethernet/tehuti/tehuti.h # define L32_64(x) (u32) ((u64)(x) & 0xffffffff) x 83 drivers/net/ethernet/tehuti/tehuti.h # define H32_64(x) 0 x 84 drivers/net/ethernet/tehuti/tehuti.h # define L32_64(x) ((u32) (x)) x 90 drivers/net/ethernet/tehuti/tehuti.h # define CPU_CHIP_SWAP32(x) swab32(x) x 91 drivers/net/ethernet/tehuti/tehuti.h # define CPU_CHIP_SWAP16(x) swab16(x) x 93 drivers/net/ethernet/tehuti/tehuti.h # define CPU_CHIP_SWAP32(x) (x) x 94 drivers/net/ethernet/tehuti/tehuti.h # define CPU_CHIP_SWAP16(x) (x) x 128 drivers/net/ethernet/tehuti/tehuti.h #define GET_BITS_SHIFT(x, nbits, nshift) (((x)>>nshift)&BITS_MASK(nbits)) x 130 drivers/net/ethernet/tehuti/tehuti.h #define BITS_SHIFT_VAL(x, nbits, nshift) (((x)&BITS_MASK(nbits))<<nshift) x 131 drivers/net/ethernet/tehuti/tehuti.h #define BITS_SHIFT_CLEAR(x, nbits, nshift) \ x 132 drivers/net/ethernet/tehuti/tehuti.h ((x)&(~BITS_SHIFT_MASK(nbits, nshift))) x 134 drivers/net/ethernet/tehuti/tehuti.h #define GET_INT_COAL(x) GET_BITS_SHIFT(x, 15, 0) x 135 drivers/net/ethernet/tehuti/tehuti.h #define GET_INT_COAL_RC(x) GET_BITS_SHIFT(x, 1, 15) x 136 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXF_TH(x) GET_BITS_SHIFT(x, 4, 16) x 137 drivers/net/ethernet/tehuti/tehuti.h #define GET_PCK_TH(x) GET_BITS_SHIFT(x, 4, 20) x 292 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_BC(x) GET_BITS_SHIFT((x), 5, 0) x 293 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_RXFQ(x) GET_BITS_SHIFT((x), 2, 8) x 294 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_TO(x) GET_BITS_SHIFT((x), 1, 15) x 295 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_TYPE(x) GET_BITS_SHIFT((x), 4, 16) x 296 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_ERR(x) GET_BITS_SHIFT((x), 6, 21) x 297 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_RXP(x) GET_BITS_SHIFT((x), 1, 27) x 298 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_PKT_ID(x) GET_BITS_SHIFT((x), 3, 28) x 299 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_VTAG(x) GET_BITS_SHIFT((x), 1, 31) x 300 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_VLAN_ID(x) GET_BITS_SHIFT((x), 12, 0) x 301 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_VLAN_TCI(x) GET_BITS_SHIFT((x), 16, 0) x 302 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_CFI(x) GET_BITS_SHIFT((x), 1, 12) x 303 drivers/net/ethernet/tehuti/tehuti.h #define GET_RXD_PRIO(x) GET_BITS_SHIFT((x), 3, 13) x 518 drivers/net/ethernet/tehuti/tehuti.h #define GET_DEV_CTRL_MAXPL(x) GET_BITS_SHIFT(x, 3, 5) x 519 drivers/net/ethernet/tehuti/tehuti.h #define GET_DEV_CTRL_MRRS(x) GET_BITS_SHIFT(x, 3, 12) x 526 drivers/net/ethernet/tehuti/tehuti.h #define GET_LINK_STATUS_LANES(x) GET_BITS_SHIFT(x, 6, 4) x 533 drivers/net/ethernet/tehuti/tehuti.h #define BDX_ASSERT(x) BUG_ON(x) x 194 drivers/net/ethernet/ti/netcp_core.c static int emac_arch_get_mac_addr(char *x, void __iomem *efuse_mac, u32 swap) x 210 drivers/net/ethernet/ti/netcp_core.c x[0] = (addr1 & 0x0000ff00) >> 8; x 211 drivers/net/ethernet/ti/netcp_core.c x[1] = addr1 & 0x000000ff; x 212 drivers/net/ethernet/ti/netcp_core.c x[2] = (addr0 & 0xff000000) >> 24; x 213 drivers/net/ethernet/ti/netcp_core.c x[3] = (addr0 & 0x00ff0000) >> 16; x 214 drivers/net/ethernet/ti/netcp_core.c x[4] = (addr0 & 0x0000ff00) >> 8; x 215 drivers/net/ethernet/ti/netcp_core.c x[5] = addr0 & 0x000000ff; x 128 drivers/net/ethernet/ti/netcp_ethss.c #define GBE_PORT_MASK(x) (BIT(x) - 1) x 22 drivers/net/ethernet/ti/netcp_sgmii.c #define SGMII23_OFFSET(x) ((x - 2) * 0x100) x 23 drivers/net/ethernet/ti/netcp_sgmii.c #define SGMII_OFFSET(x) ((x <= 1) ? (x * 0x100) : (SGMII23_OFFSET(x))) x 26 drivers/net/ethernet/ti/netcp_sgmii.c #define SGMII_SRESET_REG(x) (SGMII_OFFSET(x) + 0x004) x 27 drivers/net/ethernet/ti/netcp_sgmii.c #define SGMII_CTL_REG(x) (SGMII_OFFSET(x) + 0x010) x 28 drivers/net/ethernet/ti/netcp_sgmii.c #define SGMII_STATUS_REG(x) (SGMII_OFFSET(x) + 0x014) x 29 drivers/net/ethernet/ti/netcp_sgmii.c #define SGMII_MRADV_REG(x) (SGMII_OFFSET(x) + 0x018) x 487 drivers/net/ethernet/via/via-rhine.c #define BYTE_REG_BITS_ON(x, p) do { iowrite8((ioread8((p))|(x)), (p)); } while (0) x 488 drivers/net/ethernet/via/via-rhine.c #define WORD_REG_BITS_ON(x, p) do { iowrite16((ioread16((p))|(x)), (p)); } while (0) x 489 drivers/net/ethernet/via/via-rhine.c #define DWORD_REG_BITS_ON(x, p) do { iowrite32((ioread32((p))|(x)), (p)); } while (0) x 491 drivers/net/ethernet/via/via-rhine.c #define BYTE_REG_BITS_IS_ON(x, p) (ioread8((p)) & (x)) x 492 drivers/net/ethernet/via/via-rhine.c #define WORD_REG_BITS_IS_ON(x, p) (ioread16((p)) & (x)) x 493 drivers/net/ethernet/via/via-rhine.c #define DWORD_REG_BITS_IS_ON(x, p) (ioread32((p)) & (x)) x 495 drivers/net/ethernet/via/via-rhine.c #define BYTE_REG_BITS_OFF(x, p) do { iowrite8(ioread8((p)) & (~(x)), (p)); } while (0) x 496 drivers/net/ethernet/via/via-rhine.c #define WORD_REG_BITS_OFF(x, p) do { iowrite16(ioread16((p)) & (~(x)), (p)); } while (0) x 497 drivers/net/ethernet/via/via-rhine.c #define DWORD_REG_BITS_OFF(x, p) do { iowrite32(ioread32((p)) & (~(x)), (p)); } while (0) x 499 drivers/net/ethernet/via/via-rhine.c #define BYTE_REG_BITS_SET(x, m, p) do { iowrite8((ioread8((p)) & (~(m)))|(x), (p)); } while (0) x 500 drivers/net/ethernet/via/via-rhine.c #define WORD_REG_BITS_SET(x, m, p) do { iowrite16((ioread16((p)) & (~(m)))|(x), (p)); } while (0) x 501 drivers/net/ethernet/via/via-rhine.c #define DWORD_REG_BITS_SET(x, m, p) do { iowrite32((ioread32((p)) & (~(m)))|(x), (p)); } while (0) x 35 drivers/net/ethernet/via/via-velocity.h #define BYTE_REG_BITS_ON(x,p) do { writeb(readb((p))|(x),(p));} while (0) x 36 drivers/net/ethernet/via/via-velocity.h #define WORD_REG_BITS_ON(x,p) do { writew(readw((p))|(x),(p));} while (0) x 37 drivers/net/ethernet/via/via-velocity.h #define DWORD_REG_BITS_ON(x,p) do { writel(readl((p))|(x),(p));} while (0) x 39 drivers/net/ethernet/via/via-velocity.h #define BYTE_REG_BITS_IS_ON(x,p) (readb((p)) & (x)) x 40 drivers/net/ethernet/via/via-velocity.h #define WORD_REG_BITS_IS_ON(x,p) (readw((p)) & (x)) x 41 drivers/net/ethernet/via/via-velocity.h #define DWORD_REG_BITS_IS_ON(x,p) (readl((p)) & (x)) x 43 drivers/net/ethernet/via/via-velocity.h #define BYTE_REG_BITS_OFF(x,p) do { writeb(readb((p)) & (~(x)),(p));} while (0) x 44 drivers/net/ethernet/via/via-velocity.h #define WORD_REG_BITS_OFF(x,p) do { writew(readw((p)) & (~(x)),(p));} while (0) x 45 drivers/net/ethernet/via/via-velocity.h #define DWORD_REG_BITS_OFF(x,p) do { writel(readl((p)) & (~(x)),(p));} while (0) x 47 drivers/net/ethernet/via/via-velocity.h #define BYTE_REG_BITS_SET(x,m,p) do { writeb( (readb((p)) & (~(m))) |(x),(p));} while (0) x 48 drivers/net/ethernet/via/via-velocity.h #define WORD_REG_BITS_SET(x,m,p) do { writew( (readw((p)) & (~(m))) |(x),(p));} while (0) x 49 drivers/net/ethernet/via/via-velocity.h #define DWORD_REG_BITS_SET(x,m,p) do { writel( (readl((p)) & (~(m)))|(x),(p));} while (0) x 1149 drivers/net/ethernet/via/via-velocity.h #define mac_write_isr(regs, x) writel((x),&((regs)->ISR)) x 1264 drivers/net/ethernet/via/via-velocity.h #define MII_REG_BITS_ON(x,i,p) do {\ x 1267 drivers/net/ethernet/via/via-velocity.h (w)|=(x);\ x 1271 drivers/net/ethernet/via/via-velocity.h #define MII_REG_BITS_OFF(x,i,p) do {\ x 1274 drivers/net/ethernet/via/via-velocity.h (w)&=(~(x));\ x 1278 drivers/net/ethernet/via/via-velocity.h #define MII_REG_BITS_IS_ON(x,i,p) ({\ x 1281 drivers/net/ethernet/via/via-velocity.h ((int) ((w) & (x)));}) x 1303 drivers/net/ethernet/via/via-velocity.h #define ASSERT(x) { \ x 1304 drivers/net/ethernet/via/via-velocity.h if (!(x)) { \ x 1305 drivers/net/ethernet/via/via-velocity.h printk(KERN_ERR "assertion %s failed: file %s line %d\n", #x,\ x 1312 drivers/net/ethernet/via/via-velocity.h #define ASSERT(x) x 1313 drivers/net/ethernet/via/via-velocity.h #define VELOCITY_DBG(x) x 2932 drivers/net/fddi/defxx.c unsigned long x = (unsigned long)skb->data; x 2935 drivers/net/fddi/defxx.c v = ALIGN(x, n); /* Where we want to be */ x 2937 drivers/net/fddi/defxx.c skb_reserve(skb, v - x); x 109 drivers/net/fddi/defza.c unsigned long x, y; x 111 drivers/net/fddi/defza.c x = (unsigned long)skb->data; x 112 drivers/net/fddi/defza.c y = ALIGN(x, v); x 114 drivers/net/fddi/defza.c skb_reserve(skb, y - x); x 67 drivers/net/fddi/defza.h #define FZA_STATUS_GET_DLU(x) (((x) >> FZA_STATUS_DLU_SHIFT) & \ x 69 drivers/net/fddi/defza.h #define FZA_STATUS_GET_LINK(x) (((x) >> FZA_STATUS_LINK_SHIFT) & \ x 71 drivers/net/fddi/defza.h #define FZA_STATUS_GET_STATE(x) (((x) >> FZA_STATUS_STATE_SHIFT) & \ x 73 drivers/net/fddi/defza.h #define FZA_STATUS_GET_HALT(x) (((x) >> FZA_STATUS_HALT_SHIFT) & \ x 75 drivers/net/fddi/defza.h #define FZA_STATUS_GET_TEST(x) (((x) >> FZA_STATUS_TEST_SHIFT) & \ x 291 drivers/net/fddi/defza.h #define FZA_TX_BUFFER_ADDR(x) (0x200000 | (((x) & 0xffff) << 5)) x 47 drivers/net/fddi/skfp/cfm.c #define GO_STATE(x) (smc->mib.fddiSMTCF_State = (x)|AFLAG) x 49 drivers/net/fddi/skfp/cfm.c #define ACTIONS(x) (x|AFLAG) x 38 drivers/net/fddi/skfp/drvfbi.c #define MS2BCLK(x) ((x)*12500L) x 51 drivers/net/fddi/skfp/ecm.c #define GO_STATE(x) (smc->mib.fddiSMTECMState = (x)|AFLAG) x 53 drivers/net/fddi/skfp/ecm.c #define ACTIONS(x) (x|AFLAG) x 44 drivers/net/fddi/skfp/ess.c #define LINT_USE(x) x 46 drivers/net/fddi/skfp/ess.c #define LINT_USE(x) (x)=(x) x 48 drivers/net/fddi/skfp/ess.c #define MS2BCLK(x) ((x)*12500L) x 30 drivers/net/fddi/skfp/fplustm.c #define UNUSED(x) (x) = (x) x 32 drivers/net/fddi/skfp/fplustm.c #define UNUSED(x) x 37 drivers/net/fddi/skfp/fplustm.c #define MS2BCLK(x) ((x)*12500L) x 38 drivers/net/fddi/skfp/fplustm.c #define US2BCLK(x) ((x)*1250L) x 893 drivers/net/fddi/skfp/fplustm.c u_short t_max,x ; x 944 drivers/net/fddi/skfp/fplustm.c x = t_max/0x27 ; x 945 drivers/net/fddi/skfp/fplustm.c x *= 0x27 ; x 946 drivers/net/fddi/skfp/fplustm.c if ((t_max == 0xfffe) || (t_max - x == 0x16)) x 47 drivers/net/fddi/skfp/h/cmtdef.h #define LINT_USE(x) (x)=(x) x 49 drivers/net/fddi/skfp/h/cmtdef.h #define LINT_USE(x) x 230 drivers/net/fddi/skfp/h/cmtdef.h #define LS2MIB(x) ((x)-PC_QLS) x 231 drivers/net/fddi/skfp/h/cmtdef.h #define MIB2LS(x) ((x)+PC_QLS) x 249 drivers/net/fddi/skfp/h/fplustm.h #define AIX_REVERSE(x) ((((x)<<24L)&0xff000000L) + \ x 250 drivers/net/fddi/skfp/h/fplustm.h (((x)<< 8L)&0x00ff0000L) + \ x 251 drivers/net/fddi/skfp/h/fplustm.h (((x)>> 8L)&0x0000ff00L) + \ x 252 drivers/net/fddi/skfp/h/fplustm.h (((x)>>24L)&0x000000ffL)) x 255 drivers/net/fddi/skfp/h/fplustm.h #define AIX_REVERSE(x) (x) x 260 drivers/net/fddi/skfp/h/fplustm.h #define MDR_REVERSE(x) ((((x)<<24L)&0xff000000L) + \ x 261 drivers/net/fddi/skfp/h/fplustm.h (((x)<< 8L)&0x00ff0000L) + \ x 262 drivers/net/fddi/skfp/h/fplustm.h (((x)>> 8L)&0x0000ff00L) + \ x 263 drivers/net/fddi/skfp/h/fplustm.h (((x)>>24L)&0x000000ffL)) x 266 drivers/net/fddi/skfp/h/fplustm.h #define MDR_REVERSE(x) (x) x 43 drivers/net/fddi/skfp/h/mbuf.h #define smtod(x,t) ((t)((x)->sm_data + (x)->sm_off)) x 44 drivers/net/fddi/skfp/h/mbuf.h #define smtodoff(x,t,o) ((t)((x)->sm_data + (o))) x 120 drivers/net/fddi/skfp/h/osdef1st.h #define AIX_REVERSE(x) ((u32)le32_to_cpu((u32)(x))) x 121 drivers/net/fddi/skfp/h/osdef1st.h #define MDR_REVERSE(x) ((u32)le32_to_cpu((u32)(x))) x 256 drivers/net/fddi/skfp/h/smc.h #define SMT_IS_CONDITION(x) ((x)>=SMT_COND_BASE) x 1052 drivers/net/fddi/skfp/h/supern_2.h #define MSTOBCLK(x) ((u_long)(x)*12500L) x 1053 drivers/net/fddi/skfp/h/supern_2.h #define MSTOTVX(x) (((u_long)(x)*1000L)/80/255) x 167 drivers/net/fddi/skfp/hwmtm.c #define UNUSED(x) (x) = (x) x 169 drivers/net/fddi/skfp/hwmtm.c #define UNUSED(x) x 71 drivers/net/fddi/skfp/pcmplc.c #define GO_STATE(x) (mib->fddiPORTPCMState = (x)|AFLAG) x 73 drivers/net/fddi/skfp/pcmplc.c #define ACTIONS(x) (x|AFLAG) x 54 drivers/net/fddi/skfp/pmf.c #define MS2BCLK(x) ((x)*12500L) x 1074 drivers/net/fddi/skfp/pmf.c #define IFSET(x) if (set) (x) x 56 drivers/net/fddi/skfp/rmt.c #define GO_STATE(x) (smc->mib.m[MAC0].fddiMACRMTState = (x)|AFLAG) x 58 drivers/net/fddi/skfp/rmt.c #define ACTIONS(x) (x|AFLAG) x 1871 drivers/net/fddi/skfp/smt.c int x ; x 1898 drivers/net/fddi/skfp/smt.c x = data[0] ; x 1900 drivers/net/fddi/skfp/smt.c data[1] = x ; x 1905 drivers/net/fddi/skfp/smt.c x = data[0] ; x 1907 drivers/net/fddi/skfp/smt.c data[3] = x ; x 1908 drivers/net/fddi/skfp/smt.c x = data[1] ; x 1910 drivers/net/fddi/skfp/smt.c data[2] = x ; x 32 drivers/net/fddi/skfp/smtdef.c #define TTMS(x) ((u_long)(x)*1000L) x 33 drivers/net/fddi/skfp/smtdef.c #define TTS(x) ((u_long)(x)*1000000L) x 34 drivers/net/fddi/skfp/smtdef.c #define TTUS(x) ((u_long)(x)) x 75 drivers/net/fddi/skfp/smtdef.c #define MS2BCLK(x) ((x)*12500L) x 76 drivers/net/fddi/skfp/smtdef.c #define US2BCLK(x) ((x)*1250L) x 60 drivers/net/fjes/fjes_trace.h int x; x 64 drivers/net/fjes/fjes_trace.h for (x = 0; x < hw->max_epid; x++) { x 65 drivers/net/fjes/fjes_trace.h *((u8 *)__get_dynamic_array(zone) + x) = x 66 drivers/net/fjes/fjes_trace.h res_buf->info.info[x].zone; x 67 drivers/net/fjes/fjes_trace.h *((u8 *)__get_dynamic_array(status) + x) = x 68 drivers/net/fjes/fjes_trace.h res_buf->info.info[x].es_status; x 628 drivers/net/hamradio/baycom_epp.c #define GETTICK(x) \ x 631 drivers/net/hamradio/baycom_epp.c x = (unsigned int)rdtsc(); \ x 634 drivers/net/hamradio/baycom_epp.c #define GETTICK(x) x 1300 drivers/net/hamradio/scc.c #define CAST(x) (unsigned long)(x) x 2051 drivers/net/hamradio/scc.c #define K(x) kiss->x x 52 drivers/net/hippi/rrunner.c #define RUN_AT(x) (jiffies + (x)) x 117 drivers/net/ieee802154/adf7242.c #define PA_PWR(x) (((x) & 0xF) << 4) x 119 drivers/net/ieee802154/adf7242.c #define EXTPA_BIAS_MODE(x) (((x) & 0x7) << 0) x 122 drivers/net/ieee802154/adf7242.c #define PA_BRIDGE_DBIAS(x) (((x) & 0x1F) << 0) x 127 drivers/net/ieee802154/adf7242.c #define PA_BIAS_CTRL(x) (((x) & 0x1F) << 1) x 165 drivers/net/ieee802154/adf7242.c #define MAX_FRAME_RETRIES(x) ((x) & 0xF) x 166 drivers/net/ieee802154/adf7242.c #define MAX_CCA_RETRIES(x) (((x) & 0x7) << 4) x 169 drivers/net/ieee802154/adf7242.c #define CSMA_MAX_BE(x) ((x) & 0xF) x 170 drivers/net/ieee802154/adf7242.c #define CSMA_MIN_BE(x) (((x) & 0xF) << 4) x 181 drivers/net/ieee802154/adf7242.c #define CMD_SPI_MEM_WR(x) (0x18 + (x >> 8)) /* Write data to MCR or x 184 drivers/net/ieee802154/adf7242.c #define CMD_SPI_MEM_RD(x) (0x38 + (x >> 8)) /* Read data from MCR or x 187 drivers/net/ieee802154/adf7242.c #define CMD_SPI_MEMR_WR(x) (0x08 + (x >> 8)) /* Write data to MCR or Packet x 190 drivers/net/ieee802154/adf7242.c #define CMD_SPI_MEMR_RD(x) (0x28 + (x >> 8)) /* Read data from MCR or x 211 drivers/net/ieee802154/at86rf230.h #define TRAC_MASK(x) ((x & 0xe0) >> 5) x 196 drivers/net/ieee802154/ca8210.c #define LS_BYTE(x) ((u8)((x) & 0xFF)) x 197 drivers/net/ieee802154/ca8210.c #define MS_BYTE(x) ((u8)(((x) >> 8) & 0xFF)) x 35 drivers/net/ieee802154/mcr20a.c #define MCR20A_WRITE_REG(x) (x) x 36 drivers/net/ieee802154/mcr20a.c #define MCR20A_READ_REG(x) (REGISTER_READ | (x)) x 77 drivers/net/phy/adin.c #define ADIN1300_GE_RGMII_RX_SEL(x) \ x 78 drivers/net/phy/adin.c FIELD_PREP(ADIN1300_GE_RGMII_RX_MSK, x) x 80 drivers/net/phy/adin.c #define ADIN1300_GE_RGMII_GTX_SEL(x) \ x 81 drivers/net/phy/adin.c FIELD_PREP(ADIN1300_GE_RGMII_GTX_MSK, x) x 95 drivers/net/phy/adin.c #define ADIN1300_GE_RMII_FIFO_DEPTH_SEL(x) \ x 96 drivers/net/phy/adin.c FIELD_PREP(ADIN1300_GE_RMII_FIFO_DEPTH_MSK, x) x 54 drivers/net/phy/mdio-mux-mmioreg.c uint8_t x, y; x 56 drivers/net/phy/mdio-mux-mmioreg.c x = ioread8(p); x 57 drivers/net/phy/mdio-mux-mmioreg.c y = (x & ~s->mask) | desired_child; x 58 drivers/net/phy/mdio-mux-mmioreg.c if (x != y) { x 59 drivers/net/phy/mdio-mux-mmioreg.c iowrite8((x & ~s->mask) | desired_child, p); x 60 drivers/net/phy/mdio-mux-mmioreg.c pr_debug("%s: %02x -> %02x\n", __func__, x, y); x 66 drivers/net/phy/mdio-mux-mmioreg.c uint16_t x, y; x 68 drivers/net/phy/mdio-mux-mmioreg.c x = ioread16(p); x 69 drivers/net/phy/mdio-mux-mmioreg.c y = (x & ~s->mask) | desired_child; x 70 drivers/net/phy/mdio-mux-mmioreg.c if (x != y) { x 71 drivers/net/phy/mdio-mux-mmioreg.c iowrite16((x & ~s->mask) | desired_child, p); x 72 drivers/net/phy/mdio-mux-mmioreg.c pr_debug("%s: %04x -> %04x\n", __func__, x, y); x 78 drivers/net/phy/mdio-mux-mmioreg.c uint32_t x, y; x 80 drivers/net/phy/mdio-mux-mmioreg.c x = ioread32(p); x 81 drivers/net/phy/mdio-mux-mmioreg.c y = (x & ~s->mask) | desired_child; x 82 drivers/net/phy/mdio-mux-mmioreg.c if (x != y) { x 83 drivers/net/phy/mdio-mux-mmioreg.c iowrite32((x & ~s->mask) | desired_child, p); x 84 drivers/net/phy/mdio-mux-mmioreg.c pr_debug("%s: %08x -> %08x\n", __func__, x, y); x 84 drivers/net/phy/mscc.c #define LED_MODE_SEL_POS(x) ((x) * 4) x 85 drivers/net/phy/mscc.c #define LED_MODE_SEL_MASK(x) (GENMASK(3, 0) << LED_MODE_SEL_POS(x)) x 86 drivers/net/phy/mscc.c #define LED_MODE_SEL(x, mode) (((mode) << LED_MODE_SEL_POS(x)) & LED_MODE_SEL_MASK(x)) x 92 drivers/net/phy/mscc.c #define MSCC_PHY_CSR_CNTL_19_REG_ADDR(x) (x) x 93 drivers/net/phy/mscc.c #define MSCC_PHY_CSR_CNTL_19_TARGET(x) ((x) << 12) x 98 drivers/net/phy/mscc.c #define MSCC_PHY_CSR_CNTL_20_TARGET(x) (x) x 193 drivers/net/phy/mscc.c #define MICRO_CLK_DIVIDE(x) ((x) >> 1) x 197 drivers/net/phy/mscc.c #define MSCC_TRAP_ROM_ADDR(x) ((x) * 2 + 1) x 198 drivers/net/phy/mscc.c #define MSCC_PATCH_RAM_ADDR(x) (((x) + 1) * 2) x 207 drivers/net/phy/mscc.c #define EN_PATCH_RAM_TRAP_ADDR(x) (0x0100 << ((x) - 1)) x 209 drivers/net/phy/mscc.c #define INT_MEM_DATA(x) (INT_MEM_DATA_M & (x)) x 214 drivers/net/phy/mscc.c #define PROC_CMD_SGMII_PORT(x) ((x) << 8) x 215 drivers/net/phy/mscc.c #define PROC_CMD_FIBER_PORT(x) (0x0100 << (x) % 4) x 251 drivers/net/phy/mscc.c #define TR_ADDR(x) (0x7fff & (x)) x 106 drivers/net/ppp/bsd_comp.c #define BSD_VERSION(x) ((x) >> 5) x 107 drivers/net/ppp/bsd_comp.c #define BSD_NBITS(x) ((x) & 0x1F) x 89 drivers/net/rionet.c #define RIONET_MAC_MATCH(x) (!memcmp((x), "\00\01\00\01", 4)) x 90 drivers/net/rionet.c #define RIONET_GET_DESTID(x) ((*((u8 *)x + 4) << 8) | *((u8 *)x + 5)) x 84 drivers/net/slip/slhc.c static unsigned char * put16(unsigned char *cp, unsigned short x); x 171 drivers/net/slip/slhc.c put16(unsigned char *cp, unsigned short x) x 173 drivers/net/slip/slhc.c *cp++ = x >> 8; x 174 drivers/net/slip/slhc.c *cp++ = x; x 209 drivers/net/slip/slhc.c int x; x 211 drivers/net/slip/slhc.c x = *(*cpp)++; x 212 drivers/net/slip/slhc.c if(x == 0){ x 215 drivers/net/slip/slhc.c return x & 0xff; /* -1 if PULLCHAR returned error */ x 496 drivers/net/slip/slhc.c long x; x 514 drivers/net/slip/slhc.c x = *cp++; /* Read conn index */ x 515 drivers/net/slip/slhc.c if(x < 0 || x > comp->rslot_limit) x 519 drivers/net/slip/slhc.c if (!comp->rstate[x].initialized) x 523 drivers/net/slip/slhc.c comp->recv_current = x; x 567 drivers/net/slip/slhc.c if((x = decode(&cp)) == -1) { x 570 drivers/net/slip/slhc.c thp->urg_ptr = htons(x); x 574 drivers/net/slip/slhc.c if((x = decode(&cp)) == -1) { x 577 drivers/net/slip/slhc.c thp->window = htons( ntohs(thp->window) + x); x 580 drivers/net/slip/slhc.c if((x = decode(&cp)) == -1) { x 583 drivers/net/slip/slhc.c thp->ack_seq = htonl( ntohl(thp->ack_seq) + x); x 586 drivers/net/slip/slhc.c if((x = decode(&cp)) == -1) { x 589 drivers/net/slip/slhc.c thp->seq = htonl( ntohl(thp->seq) + x); x 594 drivers/net/slip/slhc.c if((x = decode(&cp)) == -1) { x 597 drivers/net/slip/slhc.c ip->id = htons (ntohs (ip->id) + x); x 416 drivers/net/usb/cdc_mbim.c int x; x 458 drivers/net/usb/cdc_mbim.c for (x = 0; x < nframes; x++, dpe16++) { x 467 drivers/net/usb/cdc_mbim.c if (!x) x 476 drivers/net/usb/cdc_mbim.c x, offset, len, skb_in); x 477 drivers/net/usb/cdc_mbim.c if (!x) x 1504 drivers/net/usb/cdc_ncm.c int x; x 1531 drivers/net/usb/cdc_ncm.c for (x = 0; x < nframes; x++, dpe16++) { x 1540 drivers/net/usb/cdc_ncm.c if (!x) x 1550 drivers/net/usb/cdc_ncm.c x, offset, len, skb_in); x 1551 drivers/net/usb/cdc_ncm.c if (!x) x 372 drivers/net/usb/r8152.c #define pwd_dn_scale(x) ((x) << 1) x 462 drivers/net/usb/r8152.c #define ups_flags_speed(x) ((x) << 16) x 512 drivers/net/usb/r8152.c #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */ x 525 drivers/net/usb/r8152.c #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */ x 562 drivers/net/usb/r8152.c #define clk_div_expo(x) (min(x, 5) << 8) x 625 drivers/net/usb/r8152.c #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + ETH_FCS_LEN + \ x 460 drivers/net/wan/hdlc_fr.c static inline u8 fr_lmi_nextseq(u8 x) x 462 drivers/net/wan/hdlc_fr.c x++; x 463 drivers/net/wan/hdlc_fr.c return x ? x : 1; x 7 drivers/net/wan/lmc/lmc_debug.h #define LMC_CONSOLE_LOG(x,y,z) lmcConsoleLog((x), (y), (z)) x 9 drivers/net/wan/lmc/lmc_debug.h #define LMC_CONSOLE_LOG(x,y,z) x 12 drivers/net/wan/lmc/lmc_debug.h #define LMC_CONSOLE_LOG(x,y,z) x 44 drivers/net/wan/lmc/lmc_debug.h #define LMC_EVENT_LOG(x, y, z) lmcEventLog((x), (y), (z)) x 46 drivers/net/wan/lmc/lmc_debug.h #define LMC_EVENT_LOG(x,y,z) x 653 drivers/net/wan/lmc/lmc_media.c av->x = 1; x 656 drivers/net/wan/lmc/lmc_media.c write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); x 668 drivers/net/wan/lmc/lmc_media.c write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); x 835 drivers/net/wan/lmc/lmc_media.c static void write_av9110(lmc_softc_t *sc, u32 n, u32 m, u32 v, u32 x, u32 r) x 841 drivers/net/wan/lmc/lmc_media.c LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r); x 868 drivers/net/wan/lmc/lmc_media.c write_av9110_bit (sc, x >> i); x 154 drivers/net/wan/lmc/lmc_var.h u32 x; x 70 drivers/net/wan/wanxl.h #define ALIGN32(x) (((x) + 3) & 0xFFFFFFFC) x 14 drivers/net/wan/x25_asy.h #define X25_ESCAPE(x) ((x)^0x20) x 15 drivers/net/wan/x25_asy.h #define X25_UNESCAPE(x) ((x)^0x20) x 318 drivers/net/wan/z85230.h #define Z8530_PORT_OF(x) ((x)&0xFFFF) x 461 drivers/net/wireless/admtek/adm8211.c #define ADM8211_INT(x) \ x 463 drivers/net/wireless/admtek/adm8211.c if (unlikely(stsr & ADM8211_STSR_ ## x)) \ x 464 drivers/net/wireless/admtek/adm8211.c wiphy_debug(dev->wiphy, "%s\n", #x); \ x 420 drivers/net/wireless/admtek/adm8211.h #define ADM8211_SRAM(x) (priv->pdev->revision < ADM8211_REV_BA ? \ x 421 drivers/net/wireless/admtek/adm8211.h ADM8211_SRAM_A_ ## x : ADM8211_SRAM_B_ ## x) x 369 drivers/net/wireless/ath/ar5523/ar5523.c #define GETCAP(x) do { \ x 370 drivers/net/wireless/ath/ar5523/ar5523.c error = ar5523_get_capability(ar, x, &cap); \ x 374 drivers/net/wireless/ath/ar5523/ar5523.c "%s=0x%08x\n", #x, cap); \ x 368 drivers/net/wireless/ath/ath10k/ce.h #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_GET(x) \ x 369 drivers/net/wireless/ath/ath10k/ce.h (((x) & CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_MASK) >> \ x 911 drivers/net/wireless/ath/ath10k/htt_rx.c #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63) x 756 drivers/net/wireless/ath/ath10k/htt_tx.c #define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4) x 775 drivers/net/wireless/ath/ath10k/htt_tx.c #define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4) x 978 drivers/net/wireless/ath/ath10k/hw.h #define CCNT_TO_MSEC(ar, x) ((x) / ar->hw_params.channel_counters_freq_hz) x 1130 drivers/net/wireless/ath/ath10k/hw.h #define RTC_STATE_V_GET(x) (((x) & RTC_STATE_V_MASK) >> RTC_STATE_V_LSB) x 1422 drivers/net/wireless/ath/ath10k/wmi-tlv.h #define SVCMAP(x, y, len) \ x 1424 drivers/net/wireless/ath/ath10k/wmi-tlv.h if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \ x 1425 drivers/net/wireless/ath/ath10k/wmi-tlv.h (WMI_TLV_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \ x 377 drivers/net/wireless/ath/ath10k/wmi.h #define SVCSTR(x) case x: return #x x 524 drivers/net/wireless/ath/ath10k/wmi.h #define SVCMAP(x, y, len) \ x 526 drivers/net/wireless/ath/ath10k/wmi.h if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \ x 527 drivers/net/wireless/ath/ath10k/wmi.h (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \ x 6926 drivers/net/wireless/ath/ath10k/wmi.h #define C2S(x) case x: return #x x 260 drivers/net/wireless/ath/ath6kl/core.h #define AGGR_WIN_IDX(x, y) ((x) % (y)) x 261 drivers/net/wireless/ath/ath6kl/core.h #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) x 262 drivers/net/wireless/ath/ath6kl/core.h #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) x 264 drivers/net/wireless/ath/ath6kl/core.h #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) x 1260 drivers/net/wireless/ath/ath9k/ar5008_phy.c #define CCK_DELTA(x) ((OLC_FOR_AR9280_20_LATER) ? max((x) - 2, 0) : (x)) x 27 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c #define LE16(x) cpu_to_le16(x) x 28 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c #define LE32(x) cpu_to_le32(x) x 43 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c static int ar9003_hw_power_interpolate(int32_t x, x 2963 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c static int interpolate(int x, int xa, int xb, int ya, int yb) x 2967 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c bf = 2 * (yb - ya) * (x - xa) / (xb - xa); x 4268 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c static int ar9003_hw_power_interpolate(int32_t x, x 4282 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c dx = x - px[ip]; x 4286 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c if (!hhave || dx > (x - hx)) { x 4295 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c if (!lhave || dx < (x - lx)) { x 4312 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c y = interpolate(x, lx, hx, ly, hy); x 49 drivers/net/wireless/ath/ath9k/ath9k.h #define ito64(x) (sizeof(x) == 1) ? \ x 50 drivers/net/wireless/ath/ath9k/ath9k.h (((unsigned long long int)(x)) & (0xff)) : \ x 51 drivers/net/wireless/ath/ath9k/ath9k.h (sizeof(x) == 2) ? \ x 52 drivers/net/wireless/ath/ath9k/ath9k.h (((unsigned long long int)(x)) & 0xffff) : \ x 53 drivers/net/wireless/ath/ath9k/ath9k.h ((sizeof(x) == 4) ? \ x 54 drivers/net/wireless/ath/ath9k/ath9k.h (((unsigned long long int)(x)) & 0xffffffff) : \ x 55 drivers/net/wireless/ath/ath9k/ath9k.h (unsigned long long int)(x)) x 39 drivers/net/wireless/ath/ath9k/common.h #define ATH_EP_MUL(x, mul) ((x) * (mul)) x 40 drivers/net/wireless/ath/ath9k/common.h #define ATH_RSSI_IN(x) (ATH_EP_MUL((x), ATH_RSSI_EP_MULTIPLIER)) x 41 drivers/net/wireless/ath/ath9k/common.h #define ATH_LPF_RSSI(x, y, len) \ x 42 drivers/net/wireless/ath/ath9k/common.h ((x != ATH_RSSI_DUMMY_MARKER) ? (((x) * ((len) - 1) + (y)) / (len)) : (y)) x 43 drivers/net/wireless/ath/ath9k/common.h #define ATH_RSSI_LPF(x, y) do { \ x 45 drivers/net/wireless/ath/ath9k/common.h x = ATH_LPF_RSSI((x), ATH_RSSI_IN((y)), ATH_RSSI_LPF_LEN); \ x 47 drivers/net/wireless/ath/ath9k/common.h #define ATH_EP_RND(x, mul) \ x 48 drivers/net/wireless/ath/ath9k/common.h (((x) + ((mul)/2)) / (mul)) x 50 drivers/net/wireless/ath/ath9k/common.h #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) x 109 drivers/net/wireless/ath/ath9k/eeprom.h #define FREQ2FBIN(x, y) (u8)((y) ? ((x) - 2300) : (((x) - 4800) / 5)) x 110 drivers/net/wireless/ath/ath9k/eeprom.h #define FBIN2FREQ(x, y) ((y) ? (2300 + x) : (4800 + 5 * x)) x 764 drivers/net/wireless/ath/ath9k/eeprom_def.c #define SM_PD_GAIN(x) SM(0x38, AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##x) x 765 drivers/net/wireless/ath/ath9k/eeprom_def.c #define SM_PDGAIN_B(x, y) \ x 766 drivers/net/wireless/ath/ath9k/eeprom_def.c SM((gainBoundaries[x]), AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##y) x 1148 drivers/net/wireless/ath/ath9k/eeprom_def.c #define RT_AR_DELTA(x) (ratesArray[x] - cck_ofdm_delta) x 2815 drivers/net/wireless/ath/ath9k/hw.c #define MS_REG_READ(x, y) \ x 2816 drivers/net/wireless/ath/ath9k/hw.c (MS(REG_READ(ah, AR_GPIO_IN_OUT), x##_GPIO_IN_VAL) & BIT(y)) x 132 drivers/net/wireless/ath/ath9k/hw.h #define DO_DELAY(x) do { \ x 133 drivers/net/wireless/ath/ath9k/hw.h if (((++(x) % 64) == 0) && \ x 71 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_BACK_OFF_SHIFT(x) ((x & 0xf) << 27) /* in usecs */ x 74 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_PATTERN_EN(x) (x & 0xff) x 76 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_PATTERN_FOUND(x) (x & (0xff << AR_WOW_PAT_FOUND_SHIFT)) x 83 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_STATUS(x) (x & (AR_WOW_PATTERN_FOUND_MASK | \ x 87 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_CLEAR_EVENTS(x) (x & ~(AR_WOW_PATTERN_EN(0xff) | \ x 93 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW2_PATTERN_EN(x) ((x & 0xff) << 0) x 95 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW2_PATTERN_FOUND(x) (x & (0xff << AR_WOW2_PATTERN_FOUND_SHIFT)) x 98 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_STATUS2(x) (x & AR_WOW2_PATTERN_FOUND_MASK) x 99 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_CLEAR_EVENTS2(x) (x & ~(AR_WOW2_PATTERN_EN(0xff))) x 101 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_AIFS_CNT(x) (x & 0xff) x 102 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_SLOT_CNT(x) ((x & 0xff) << 8) x 103 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_KEEP_ALIVE_CNT(x) ((x & 0xff) << 16) x 112 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_PAT_END_OF_PKT(x) (x & 0xf) x 113 drivers/net/wireless/ath/ath9k/reg_wow.h #define AR_WOW_PAT_OFF_MATCH(x) ((x & 0xf) << 8) x 25 drivers/net/wireless/ath/ath9k/rng.c #define ATH9K_RNG_ENTROPY(x) (((x) * 8 * 10) >> 5) /* quality: 10/32 */ x 1068 drivers/net/wireless/ath/carl9170/phy.c static s32 carl9170_interpolate_s32(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) x 1075 drivers/net/wireless/ath/carl9170/phy.c if (x == x1) x 1077 drivers/net/wireless/ath/carl9170/phy.c if (x == x2) x 1084 drivers/net/wireless/ath/carl9170/phy.c return y1 + (((y2 - y1) * (x - x1)) / (x2 - x1)); x 1087 drivers/net/wireless/ath/carl9170/phy.c static u8 carl9170_interpolate_u8(u8 x, u8 x1, u8 y1, u8 x2, u8 y2) x 1092 drivers/net/wireless/ath/carl9170/phy.c y = carl9170_interpolate_s32(x << SHIFT, x1 << SHIFT, x 1104 drivers/net/wireless/ath/carl9170/phy.c static u8 carl9170_interpolate_val(u8 x, u8 *x_array, u8 *y_array) x 1109 drivers/net/wireless/ath/carl9170/phy.c if (x <= x_array[i + 1]) x 1113 drivers/net/wireless/ath/carl9170/phy.c return carl9170_interpolate_u8(x, x_array[i], y_array[i], x 62 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CTRL_XTYPE_SET(x) ((x) << WCN36xx_DXE_CTRL_XTYPE_SHIFT) x 67 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CTRL_BTHLD_SEL_SET(x) ((x) << WCN36xx_DXE_CTRL_BTHLD_SEL_SHIFT) x 72 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CTRL_PRIO_SET(x) ((x) << WCN36xx_DXE_CTRL_PRIO_SHIFT) x 77 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CTRL_BDT_IDX_SET(x) ((x) << WCN36xx_DXE_CTRL_BDT_IDX_SHIFT) x 181 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CH_CTRL_XTYPE_SET(x) ((x) << WCN36xx_DXE_CH_CTRL_XTYPE_SHIFT) x 186 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CH_CTRL_BTHLD_SEL_SET(x) ((x) << WCN36xx_DXE_CH_CTRL_BTHLD_SEL_SHIFT) x 191 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CH_CTRL_PRIO_SET(x) ((x) << WCN36xx_DXE_CH_CTRL_PRIO_SHIFT) x 196 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CH_CTRL_SEL_SET(x) ((x) << WCN36xx_DXE_CH_CTRL_SEL_SHIFT) x 201 drivers/net/wireless/ath/wcn36xx/dxe.h #define WCN36xx_DXE_CH_CTRL_BDT_IDX_SET(x) ((x) << WCN36xx_DXE_CH_CTRL_BDT_IDX_SHIFT) x 252 drivers/net/wireless/ath/wcn36xx/main.c static const char *wcn36xx_get_cap_name(enum place_holder_in_cap_bitmap x) x 254 drivers/net/wireless/ath/wcn36xx/main.c if (x >= ARRAY_SIZE(wcn36xx_caps_names)) x 256 drivers/net/wireless/ath/wcn36xx/main.c return wcn36xx_caps_names[x]; x 66 drivers/net/wireless/ath/wil6210/boot_loader.h #define BL_SHUTDOWN_HS_PROT_VER(x) WIL_GET_BITS(x, 28, 31) x 89 drivers/net/wireless/ath/wil6210/debugfs.c void __iomem *x; x 108 drivers/net/wireless/ath/wil6210/debugfs.c x = wmi_addr(wil, RGF_DMA_SCM_SUBQ_CONS + 4 * (ring_id / 2)); x 109 drivers/net/wireless/ath/wil6210/debugfs.c v = readl_relaxed(x); x 115 drivers/net/wireless/ath/wil6210/debugfs.c x = wmi_addr(wil, ring->hwtail); x 116 drivers/net/wireless/ath/wil6210/debugfs.c if (x) { x 117 drivers/net/wireless/ath/wil6210/debugfs.c v = readl(x); x 207 drivers/net/wireless/ath/wil6210/debugfs.c void __iomem *x; x 223 drivers/net/wireless/ath/wil6210/debugfs.c x = wmi_addr(wil, RGF_DMA_SCM_COMPQ_PROD + 4 * (sring_idx / 2)); x 224 drivers/net/wireless/ath/wil6210/debugfs.c v = readl_relaxed(x); x 230 drivers/net/wireless/ath/wil6210/debugfs.c x = wmi_addr(wil, sring->hwtail); x 231 drivers/net/wireless/ath/wil6210/debugfs.c if (x) { x 232 drivers/net/wireless/ath/wil6210/debugfs.c v = readl_relaxed(x); x 328 drivers/net/wireless/ath/wil6210/debugfs.c void __iomem *x = wil->csr + HOSTADDR(r.base) + delta; x 330 drivers/net/wireless/ath/wil6210/debugfs.c wil_memcpy_fromio_32(&d, x, sizeof(d)); x 1280 drivers/net/wireless/ath/wil6210/debugfs.c u32 *x = x_; x 1283 drivers/net/wireless/ath/wil6210/debugfs.c for (n = 0; n < sz / sizeof(*x); n++) x 1284 drivers/net/wireless/ath/wil6210/debugfs.c if (x[n]) x 1491 drivers/net/wireless/ath/wil6210/debugfs.c #define CHECK_QSTATE(x) (state & BIT(__QUEUE_STATE_ ## x)) ? \ x 1492 drivers/net/wireless/ath/wil6210/debugfs.c " " __stringify(x) : "" x 388 drivers/net/wireless/ath/wil6210/fw_inc.c u32 x, y; x 393 drivers/net/wireless/ath/wil6210/fw_inc.c x = readl(dst); x 394 drivers/net/wireless/ath/wil6210/fw_inc.c y = (x & m) | (v & ~m); x 397 drivers/net/wireless/ath/wil6210/fw_inc.c le32_to_cpu(block[i].addr), y, x, v, m); x 63 drivers/net/wireless/ath/wil6210/interrupt.c static inline void wil_icr_clear(u32 x, void __iomem *addr) x 71 drivers/net/wireless/ath/wil6210/interrupt.c static inline void wil_icr_clear(u32 x, void __iomem *addr) x 73 drivers/net/wireless/ath/wil6210/interrupt.c writel(x, addr); x 79 drivers/net/wireless/ath/wil6210/interrupt.c u32 x = readl(addr); x 81 drivers/net/wireless/ath/wil6210/interrupt.c wil_icr_clear(x, addr); x 83 drivers/net/wireless/ath/wil6210/interrupt.c return x; x 850 drivers/net/wireless/ath/wil6210/interrupt.c u32 x = readl(addr); x 852 drivers/net/wireless/ath/wil6210/interrupt.c writel(x, addr); x 91 drivers/net/wireless/ath/wil6210/main.c uint x; x 93 drivers/net/wireless/ath/wil6210/main.c ret = kstrtouint(val, 0, &x); x 97 drivers/net/wireless/ath/wil6210/main.c if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX)) x 100 drivers/net/wireless/ath/wil6210/main.c *((uint *)kp->arg) = x; x 986 drivers/net/wireless/ath/wil6210/main.c u32 x, x1 = 0; x 996 drivers/net/wireless/ath/wil6210/main.c x = wil_r(wil, RGF_USER_BL + x 999 drivers/net/wireless/ath/wil6210/main.c if (x1 != x) { x 1001 drivers/net/wireless/ath/wil6210/main.c x1, x); x 1002 drivers/net/wireless/ath/wil6210/main.c x1 = x; x 1006 drivers/net/wireless/ath/wil6210/main.c x); x 1009 drivers/net/wireless/ath/wil6210/main.c } while (x != BL_READY); x 1120 drivers/net/wireless/ath/wil6210/main.c u32 x; x 1151 drivers/net/wireless/ath/wil6210/main.c x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS); x 1152 drivers/net/wireless/ath/wil6210/main.c if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) { x 1154 drivers/net/wireless/ath/wil6210/main.c "RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x); x 110 drivers/net/wireless/ath/wil6210/trace.h #define wil_pseudo_irq_cause(x) __print_flags(x, "|", \ x 116 drivers/net/wireless/ath/wil6210/trace.h TP_PROTO(u32 x), x 117 drivers/net/wireless/ath/wil6210/trace.h TP_ARGS(x), x 119 drivers/net/wireless/ath/wil6210/trace.h __field(u32, x) x 122 drivers/net/wireless/ath/wil6210/trace.h __entry->x = x; x 124 drivers/net/wireless/ath/wil6210/trace.h TP_printk("cause 0x%08x : %s", __entry->x, x 125 drivers/net/wireless/ath/wil6210/trace.h wil_pseudo_irq_cause(__entry->x)) x 129 drivers/net/wireless/ath/wil6210/trace.h TP_PROTO(u32 x), x 130 drivers/net/wireless/ath/wil6210/trace.h TP_ARGS(x), x 132 drivers/net/wireless/ath/wil6210/trace.h __field(u32, x) x 135 drivers/net/wireless/ath/wil6210/trace.h __entry->x = x; x 137 drivers/net/wireless/ath/wil6210/trace.h TP_printk("cause 0x%08x", __entry->x) x 141 drivers/net/wireless/ath/wil6210/trace.h TP_PROTO(u32 x), x 142 drivers/net/wireless/ath/wil6210/trace.h TP_ARGS(x) x 146 drivers/net/wireless/ath/wil6210/trace.h TP_PROTO(u32 x), x 147 drivers/net/wireless/ath/wil6210/trace.h TP_ARGS(x) x 151 drivers/net/wireless/ath/wil6210/trace.h TP_PROTO(u32 x), x 152 drivers/net/wireless/ath/wil6210/trace.h TP_ARGS(x) x 156 drivers/net/wireless/ath/wil6210/trace.h TP_PROTO(u32 x), x 157 drivers/net/wireless/ath/wil6210/trace.h TP_ARGS(x) x 76 drivers/net/wireless/ath/wil6210/wil6210.h static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) x 78 drivers/net/wireless/ath/wil6210/wil6210.h return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); x 246 drivers/net/wireless/ath/wil6210/wmi.c static u32 wmi_addr_remap(u32 x) x 252 drivers/net/wireless/ath/wil6210/wmi.c ((x >= fw_mapping[i].from) && (x < fw_mapping[i].to))) x 253 drivers/net/wireless/ath/wil6210/wmi.c return x + fw_mapping[i].host - fw_mapping[i].from; x 1095 drivers/net/wireless/broadcom/b43/b43.h # define B43_WARN_ON(x) WARN_ON(x) x 1097 drivers/net/wireless/broadcom/b43/b43.h static inline bool __b43_warn_on_dummy(bool x) { return x; } x 1098 drivers/net/wireless/broadcom/b43/b43.h # define B43_WARN_ON(x) __b43_warn_on_dummy(unlikely(!!(x))) x 51 drivers/net/wireless/broadcom/b43/debugfs.c #define fappend(fmt, x...) \ x 56 drivers/net/wireless/broadcom/b43/debugfs.c fmt , ##x); \ x 335 drivers/net/wireless/broadcom/b43legacy/b43legacy.h # define B43legacy_WARN_ON(x) WARN_ON(x) x 347 drivers/net/wireless/broadcom/b43legacy/b43legacy.h static inline bool __b43legacy_warn_on_dummy(bool x) { return x; } x 348 drivers/net/wireless/broadcom/b43legacy/b43legacy.h # define B43legacy_WARN_ON(x) __b43legacy_warn_on_dummy(unlikely(!!(x))) x 349 drivers/net/wireless/broadcom/b43legacy/b43legacy.h # define B43legacy_BUG_ON(x) do { /* nothing */ } while (0) x 54 drivers/net/wireless/broadcom/b43legacy/debugfs.c #define fappend(fmt, x...) \ x 59 drivers/net/wireless/broadcom/b43legacy/debugfs.c fmt , ##x); \ x 165 drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c #define BRCMF_FWS_MODE_SET_REUSESEQ(x, val) ((x) = \ x 166 drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c ((x) & ~(1 << BRCMF_FWS_MODE_REUSESEQ_SHIFT)) | \ x 168 drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c #define BRCMF_FWS_MODE_GET_REUSESEQ(x) \ x 169 drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c (((x) >> BRCMF_FWS_MODE_REUSESEQ_SHIFT) & 1) x 321 drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c #define GOODCOREADDR(x, b) \ x 322 drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c (((x) >= (b)) && ((x) < ((b) + SI_MAXCORES * SI_CORE_SIZE)) && \ x 323 drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c IS_ALIGNED((x), SI_CORE_SIZE)) x 76 drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c #define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1)) x 77 drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c #define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1)) x 308 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c static uint xxd(uint x, uint n) x 310 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c return x & (n - 1); /* faster than %, but n must be power of 2 */ x 313 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c static uint txd(struct dma_info *di, uint x) x 315 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c return xxd(x, di->ntxd); x 318 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c static uint rxd(struct dma_info *di, uint x) x 320 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c return xxd(x, di->nrxd); x 229 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h #define BRCMS_CHAN_PHYTYPE(x) (((x) & RXS_CHAN_PHYTYPE_MASK) \ x 231 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h #define BRCMS_CHAN_CHANNEL(x) (((x) & RXS_CHAN_ID_MASK) \ x 34 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c #define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1) x 37 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c #define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1)) x 38 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c #define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1)) x 38 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h #define PHY_SAT(x, n) ((x) > ((1<<((n)-1))-1) ? ((1<<((n)-1))-1) : \ x 39 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h ((x) < -(1<<((n)-1)) ? -(1<<((n)-1)) : (x))) x 40 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h #define PHY_SHIFT_ROUND(x, n) ((x) >= 0 ? ((x)+(1<<((n)-1)))>>(n) : (x)>>(n)) x 41 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h #define PHY_HW_ROUND(x, s) ((x >> s) + ((x >> (s-1)) & (s != 0))) x 3490 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c u16 x, y, data_rf; x 3504 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c x = 8 - k; x 3505 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c data_rf = (x * 16 + y); x 3510 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c x = 8 - k; x 3511 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c data_rf = (x * 16 + y); x 3518 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c x = 8 - k; x 3519 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c data_rf = (x * 16 + y); x 3524 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c x = 8 - k; x 3525 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c data_rf = (x * 16 + y); x 120 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) x 121 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c #define NPHY_RSSI_NB_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_NB_MAX_POS) || \ x 122 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c ((x) < NPHY_CALSANITY_RSSI_NB_MAX_NEG)) x 123 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c #define NPHY_RSSI_W1_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W1_MAX_POS) || \ x 124 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c ((x) < NPHY_CALSANITY_RSSI_W1_MAX_NEG)) x 125 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c #define NPHY_RSSI_W2_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W2_MAX_POS) || \ x 126 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c ((x) < NPHY_CALSANITY_RSSI_W2_MAX_NEG)) x 275 drivers/net/wireless/broadcom/brcm80211/brcmsmac/types.h #define CEIL(x, y) (((x) + ((y)-1)) / (y)) x 212 drivers/net/wireless/cisco/airo.c #define RUN_AT(x) (jiffies+(x)) x 817 drivers/net/wireless/cisco/airo.c tdsRssiEntry x[256]; x 3558 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_REG(x) { IPW_ ##x, #x } x 3567 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_NIC(x, s) { x, #x, s } x 3575 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_ORD(x, d) { IPW_ORD_ ##x, #x, d } x 4057 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define DUMP_VAR(x,y) len += sprintf(buf + len, # x ": %" y "\n", priv-> x) x 5358 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define WEP_STR_64(x) x[0],x[1],x[2],x[3],x[4] x 5359 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define WEP_STR_128(x) x[0],x[1],x[2],x[3],x[4],x[5],x[6],x[7],x[8],x[9],x[10] x 6488 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_DEV_ID(x) { PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, x } x 8316 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_FW_MINOR(x) ((x & 0xff) >> 8) x 8317 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_FW_MAJOR(x) (x & 0xff) x 8325 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_FW_NAME(x) IPW2100_FW_PREFIX "" x ".fw" x 388 drivers/net/wireless/intel/ipw2x00/ipw2100.h #define INIT_STAT(x) do { \ x 389 drivers/net/wireless/intel/ipw2x00/ipw2100.h (x)->value = (x)->hi = 0; \ x 390 drivers/net/wireless/intel/ipw2x00/ipw2100.h (x)->lo = 0x7fffffff; \ x 392 drivers/net/wireless/intel/ipw2x00/ipw2100.h #define SET_STAT(x,y) do { \ x 393 drivers/net/wireless/intel/ipw2x00/ipw2100.h (x)->value = y; \ x 394 drivers/net/wireless/intel/ipw2x00/ipw2100.h if ((x)->value > (x)->hi) (x)->hi = (x)->value; \ x 395 drivers/net/wireless/intel/ipw2x00/ipw2100.h if ((x)->value < (x)->lo) (x)->lo = (x)->value; \ x 397 drivers/net/wireless/intel/ipw2x00/ipw2100.h #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \ x 399 drivers/net/wireless/intel/ipw2x00/ipw2100.h #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \ x 657 drivers/net/wireless/intel/ipw2x00/ipw2100.h #define IPW_ERROR_ADDR(x) (x & 0x3FFFF) x 658 drivers/net/wireless/intel/ipw2x00/ipw2100.h #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24) x 812 drivers/net/wireless/intel/ipw2x00/ipw2100.h #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK) x 124 drivers/net/wireless/intel/ipw2x00/ipw2200.c #define ieee80211chan2mhz(x) \ x 125 drivers/net/wireless/intel/ipw2x00/ipw2200.c (((x) <= 14) ? \ x 126 drivers/net/wireless/intel/ipw2x00/ipw2200.c (((x) == 14) ? 2484 : ((x) * 5) + 2407) : \ x 127 drivers/net/wireless/intel/ipw2x00/ipw2200.c ((x) + 1000) * 5) x 2108 drivers/net/wireless/intel/ipw2x00/ipw2200.c #define IPW_CMD(x) case IPW_CMD_ ## x : return #x x 4519 drivers/net/wireless/intel/ipw2x00/ipw2200.c #define IPW_GET_PACKET_STYPE(x) WLAN_FC_GET_STYPE( \ x 4520 drivers/net/wireless/intel/ipw2x00/ipw2200.c le16_to_cpu(((struct ieee80211_hdr *)(x))->frame_control)) x 4729 drivers/net/wireless/intel/ipw2x00/ipw2200.c struct notif_channel_result *x = x 4732 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (size == sizeof(*x)) { x 4734 drivers/net/wireless/intel/ipw2x00/ipw2200.c x->channel_num); x 4738 drivers/net/wireless/intel/ipw2x00/ipw2200.c size, sizeof(*x)); x 4744 drivers/net/wireless/intel/ipw2x00/ipw2200.c struct notif_scan_complete *x = ¬if->u.scan_complete; x 4745 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (size == sizeof(*x)) { x 4748 drivers/net/wireless/intel/ipw2x00/ipw2200.c "%d status\n", x->scan_type, x 4749 drivers/net/wireless/intel/ipw2x00/ipw2200.c x->num_channels, x->status); x 4753 drivers/net/wireless/intel/ipw2x00/ipw2200.c size, sizeof(*x)); x 4786 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (x->status == SCAN_COMPLETED_STATUS_COMPLETE) x 4811 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (x->status == SCAN_COMPLETED_STATUS_COMPLETE) x 4817 drivers/net/wireless/intel/ipw2x00/ipw2200.c struct notif_frag_length *x = ¬if->u.frag_len; x 4819 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (size == sizeof(*x)) x 4821 drivers/net/wireless/intel/ipw2x00/ipw2200.c le16_to_cpu(x->frag_length)); x 4825 drivers/net/wireless/intel/ipw2x00/ipw2200.c size, sizeof(*x)); x 4830 drivers/net/wireless/intel/ipw2x00/ipw2200.c struct notif_link_deterioration *x = x 4833 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (size == sizeof(*x)) { x 4836 drivers/net/wireless/intel/ipw2x00/ipw2200.c x->silence_notification_type, x 4837 drivers/net/wireless/intel/ipw2x00/ipw2200.c x->silence_count); x 4838 drivers/net/wireless/intel/ipw2x00/ipw2200.c memcpy(&priv->last_link_deterioration, x, x 4839 drivers/net/wireless/intel/ipw2x00/ipw2200.c sizeof(*x)); x 4843 drivers/net/wireless/intel/ipw2x00/ipw2200.c size, sizeof(*x)); x 4858 drivers/net/wireless/intel/ipw2x00/ipw2200.c struct notif_beacon_state *x = ¬if->u.beacon_state; x 4859 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (size != sizeof(*x)) { x 4862 drivers/net/wireless/intel/ipw2x00/ipw2200.c "be %zd)\n", size, sizeof(*x)); x 4866 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (le32_to_cpu(x->state) == x 4869 drivers/net/wireless/intel/ipw2x00/ipw2200.c le32_to_cpu(x-> x 4876 drivers/net/wireless/intel/ipw2x00/ipw2200.c struct notif_tgi_tx_key *x = ¬if->u.tgi_tx_key; x 4877 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (size == sizeof(*x)) { x 4880 drivers/net/wireless/intel/ipw2x00/ipw2200.c x->key_state, x->security_type, x 4881 drivers/net/wireless/intel/ipw2x00/ipw2200.c x->station_index); x 4887 drivers/net/wireless/intel/ipw2x00/ipw2200.c size, sizeof(*x)); x 4892 drivers/net/wireless/intel/ipw2x00/ipw2200.c struct notif_calibration *x = ¬if->u.calibration; x 4894 drivers/net/wireless/intel/ipw2x00/ipw2200.c if (size == sizeof(*x)) { x 4895 drivers/net/wireless/intel/ipw2x00/ipw2200.c memcpy(&priv->calib, x, sizeof(*x)); x 4902 drivers/net/wireless/intel/ipw2x00/ipw2200.c size, sizeof(*x)); x 77 drivers/net/wireless/intel/ipw2x00/ipw2200.h #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK) x 1365 drivers/net/wireless/intel/ipw2x00/ipw2200.h #define BITC(x,y) (((x>>y)&1)?'1':'0') x 1366 drivers/net/wireless/intel/ipw2x00/ipw2200.h #define BIT_ARG8(x) \ x 1367 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,7),BITC(x,6),BITC(x,5),BITC(x,4),\ x 1368 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,3),BITC(x,2),BITC(x,1),BITC(x,0) x 1370 drivers/net/wireless/intel/ipw2x00/ipw2200.h #define BIT_ARG16(x) \ x 1371 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,15),BITC(x,14),BITC(x,13),BITC(x,12),\ x 1372 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,11),BITC(x,10),BITC(x,9),BITC(x,8),\ x 1373 drivers/net/wireless/intel/ipw2x00/ipw2200.h BIT_ARG8(x) x 1375 drivers/net/wireless/intel/ipw2x00/ipw2200.h #define BIT_ARG32(x) \ x 1376 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,31),BITC(x,30),BITC(x,29),BITC(x,28),\ x 1377 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,27),BITC(x,26),BITC(x,25),BITC(x,24),\ x 1378 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,23),BITC(x,22),BITC(x,21),BITC(x,20),\ x 1379 drivers/net/wireless/intel/ipw2x00/ipw2200.h BITC(x,19),BITC(x,18),BITC(x,17),BITC(x,16),\ x 1380 drivers/net/wireless/intel/ipw2x00/ipw2200.h BIT_ARG16(x) x 1077 drivers/net/wireless/intel/ipw2x00/libipw_rx.c #define MFIE_STRING(x) case WLAN_EID_ ##x: return #x x 196 drivers/net/wireless/intel/iwlegacy/3945.c #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x x 159 drivers/net/wireless/intel/iwlegacy/3945.h #define IL_RX_HDR(x) ((struct il3945_rx_frame_hdr *)(\ x 160 drivers/net/wireless/intel/iwlegacy/3945.h x->u.rx_frame.stats.payload + \ x 161 drivers/net/wireless/intel/iwlegacy/3945.h x->u.rx_frame.stats.phy_count)) x 162 drivers/net/wireless/intel/iwlegacy/3945.h #define IL_RX_END(x) ((struct il3945_rx_frame_end *)(\ x 163 drivers/net/wireless/intel/iwlegacy/3945.h IL_RX_HDR(x)->payload + \ x 164 drivers/net/wireless/intel/iwlegacy/3945.h le16_to_cpu(IL_RX_HDR(x)->len))) x 165 drivers/net/wireless/intel/iwlegacy/3945.h #define IL_RX_STATS(x) (&x->u.rx_frame.stats) x 166 drivers/net/wireless/intel/iwlegacy/3945.h #define IL_RX_DATA(x) (IL_RX_HDR(x)->payload) x 2986 drivers/net/wireless/intel/iwlegacy/4965-mac.c #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x x 2987 drivers/net/wireless/intel/iwlegacy/4965-mac.c #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x x 645 drivers/net/wireless/intel/iwlegacy/4965.c il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) x 652 drivers/net/wireless/intel/iwlegacy/4965.c il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val); x 963 drivers/net/wireless/intel/iwlegacy/4965.h #define FH49_MEM_CBBC_QUEUE(x) (FH49_MEM_CBBC_LOWER_BOUND + (x) * 0x4) x 837 drivers/net/wireless/intel/iwlegacy/common.c #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \ x 838 drivers/net/wireless/intel/iwlegacy/common.c ? # x " " : "") x 877 drivers/net/wireless/intel/iwlegacy/common.c #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \ x 878 drivers/net/wireless/intel/iwlegacy/common.c ? # x " " : "") x 334 drivers/net/wireless/intel/iwlegacy/common.h #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */ x 335 drivers/net/wireless/intel/iwlegacy/common.h #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ x 336 drivers/net/wireless/intel/iwlegacy/common.h #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ x 337 drivers/net/wireless/intel/iwlegacy/common.h #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ x 338 drivers/net/wireless/intel/iwlegacy/common.h #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ x 339 drivers/net/wireless/intel/iwlegacy/common.h #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ x 782 drivers/net/wireless/intel/iwlegacy/common.h #define KELVIN_TO_CELSIUS(x) ((x)-273) x 783 drivers/net/wireless/intel/iwlegacy/common.h #define CELSIUS_TO_KELVIN(x) ((x)+273) x 1512 drivers/net/wireless/intel/iwlegacy/common.h #define IL_CMD(x) case x: return #x x 2692 drivers/net/wireless/intel/iwlegacy/common.h #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y)) x 374 drivers/net/wireless/intel/iwlegacy/prph.h #define IL49_SCD_QUEUE_WRPTR(x) (IL49_SCD_START_OFFSET + 0x24 + (x) * 4) x 382 drivers/net/wireless/intel/iwlegacy/prph.h #define IL49_SCD_QUEUE_RDPTR(x) (IL49_SCD_START_OFFSET + 0x64 + (x) * 4) x 425 drivers/net/wireless/intel/iwlegacy/prph.h #define IL49_SCD_QUEUE_STATUS_BITS(x)\ x 426 drivers/net/wireless/intel/iwlegacy/prph.h (IL49_SCD_START_OFFSET + 0x104 + (x) * 4) x 473 drivers/net/wireless/intel/iwlegacy/prph.h #define IL49_SCD_CONTEXT_QUEUE_OFFSET(x) \ x 474 drivers/net/wireless/intel/iwlegacy/prph.h (IL49_SCD_CONTEXT_DATA_OFFSET + ((x) * 8)) x 513 drivers/net/wireless/intel/iwlegacy/prph.h #define IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(x) \ x 514 drivers/net/wireless/intel/iwlegacy/prph.h ((IL49_SCD_TRANSLATE_TBL_OFFSET + ((x) * 2)) & 0xfffffffc) x 241 drivers/net/wireless/intel/iwlwifi/dvm/dev.h #define KELVIN_TO_CELSIUS(x) ((x)-273) x 242 drivers/net/wireless/intel/iwlwifi/dvm/dev.h #define CELSIUS_TO_KELVIN(x) ((x)+273) x 247 drivers/net/wireless/intel/iwlwifi/dvm/rs.h #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y)) x 832 drivers/net/wireless/intel/iwlwifi/dvm/tx.c #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x x 833 drivers/net/wireless/intel/iwlwifi/dvm/tx.c #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x x 984 drivers/net/wireless/intel/iwlwifi/dvm/tx.c #define AGG_TX_STATE_FAIL(x) case AGG_TX_STATE_ ## x: return #x x 2386 drivers/net/wireless/intel/iwlwifi/fw/dbg.c #define FSEQ_REG(x) { .addr = (x), .str = #x, } x 70 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */ x 71 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ x 72 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define NVM_RF_CFG_TYPE_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ x 73 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define NVM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ x 74 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ x 75 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ x 77 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define EXT_NVM_RF_CFG_FLAVOR_MSK(x) ((x) & 0xF) x 78 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define EXT_NVM_RF_CFG_DASH_MSK(x) (((x) >> 4) & 0xF) x 79 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define EXT_NVM_RF_CFG_STEP_MSK(x) (((x) >> 8) & 0xF) x 80 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define EXT_NVM_RF_CFG_TYPE_MSK(x) (((x) >> 12) & 0xFFF) x 81 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define EXT_NVM_RF_CFG_TX_ANT_MSK(x) (((x) >> 24) & 0xF) x 82 drivers/net/wireless/intel/iwlwifi/iwl-drv.h #define EXT_NVM_RF_CFG_RX_ANT_MSK(x) (((x) >> 28) & 0xF) x 129 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */ x 130 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ x 131 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ x 132 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ x 133 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ x 134 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ x 381 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define TXP_CHECK_AND_PRINT(x) \ x 382 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) ? # x " " : "") x 521 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define CHECK_AND_PRINT(x) \ x 522 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c ((eeprom_ch->flags & EEPROM_CHANNEL_##x) ? # x " " : "") x 564 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c #define CHECK_AND_PRINT_I(x) \ x 565 drivers/net/wireless/intel/iwlwifi/iwl-eeprom-parse.c ((eeprom_ch_info[ch_idx].flags & EEPROM_CHANNEL_##x) ? # x " " : "") x 621 drivers/net/wireless/intel/iwlwifi/iwl-fh.h #define RX_QUEUE_CB_SIZE(x) ilog2(x) x 649 drivers/net/wireless/intel/iwlwifi/iwl-fh.h #define TFD_QUEUE_CB_SIZE(x) (ilog2(x) - 3) x 321 drivers/net/wireless/intel/iwlwifi/iwl-io.c #define IWL_CMD(x) case x: return #x x 259 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c #define CHECK_AND_PRINT_I(x) \ x 260 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c ((flags & NVM_CHANNEL_##x) ? " " #x : "") x 1291 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) x 1292 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c #define NVM_WORD2_ID(x) (x >> 12) x 1293 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8)) x 1294 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c #define EXT_NVM_WORD1_ID(x) ((x) >> 4) x 270 drivers/net/wireless/intel/iwlwifi/iwl-prph.h #define SCD_CONTEXT_QUEUE_OFFSET(x)\ x 271 drivers/net/wireless/intel/iwlwifi/iwl-prph.h (SCD_CONTEXT_MEM_LOWER_BOUND + ((x) * 8)) x 273 drivers/net/wireless/intel/iwlwifi/iwl-prph.h #define SCD_TX_STTS_QUEUE_OFFSET(x)\ x 274 drivers/net/wireless/intel/iwlwifi/iwl-prph.h (SCD_TX_STTS_MEM_LOWER_BOUND + ((x) * 16)) x 276 drivers/net/wireless/intel/iwlwifi/iwl-prph.h #define SCD_TRANS_TBL_OFFSET_QUEUE(x) \ x 277 drivers/net/wireless/intel/iwlwifi/iwl-prph.h ((SCD_TRANS_TBL_MEM_LOWER_BOUND + ((x) * 2)) & 0xfffc) x 378 drivers/net/wireless/intel/iwlwifi/iwl-trans.h #define HCMD_NAME(x) \ x 379 drivers/net/wireless/intel/iwlwifi/iwl-trans.h { .cmd_id = x, .cmd_name = #x } x 386 drivers/net/wireless/intel/iwlwifi/iwl-trans.h #define HCMD_ARR(x) \ x 387 drivers/net/wireless/intel/iwlwifi/iwl-trans.h { .arr = x, .size = ARRAY_SIZE(x) } x 36 drivers/net/wireless/intel/iwlwifi/mvm/rs.c #define RS_PERCENT(x) (128 * x) x 69 drivers/net/wireless/intel/iwlwifi/mvm/tdls.c #define TU_TO_US(x) (x * 1024) x 70 drivers/net/wireless/intel/iwlwifi/mvm/tdls.c #define TU_TO_MS(x) (TU_TO_US(x) / 1000) x 1306 drivers/net/wireless/intel/iwlwifi/mvm/tx.c #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x x 1307 drivers/net/wireless/intel/iwlwifi/mvm/tx.c #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x x 1671 drivers/net/wireless/intel/iwlwifi/mvm/tx.c #define AGG_TX_STATE_(x) case AGG_TX_STATE_ ## x: return #x x 87 drivers/net/wireless/intel/iwlwifi/pcie/internal.h #define IWL_PCIE_MAX_FRAGS(x) (x->max_tbs - 3) x 2444 drivers/net/wireless/intel/iwlwifi/pcie/trans.c #define IWL_CMD(x) case x: return #x x 22 drivers/net/wireless/intersil/orinoco/scan.c #define SIGNAL_TO_DBM(x) \ x 23 drivers/net/wireless/intersil/orinoco/scan.c (clamp_t(s32, (x), MIN_SIGNAL_LEVEL, MAX_SIGNAL_LEVEL) \ x 25 drivers/net/wireless/intersil/orinoco/scan.c #define SIGNAL_TO_MBM(x) (SIGNAL_TO_DBM(x) * 100) x 458 drivers/net/wireless/intersil/p54/eeprom.c #define SUB(x, y) (u8)(((x) - (y)) > (x) ? 0 : (x) - (y)) x 2772 drivers/net/wireless/intersil/prism54/isl_ioctl.c #define IWPRIV_SET_U32(n,x) { n, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "s_"x } x 2773 drivers/net/wireless/intersil/prism54/isl_ioctl.c #define IWPRIV_SET_SSID(n,x) { n, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 1, 0, "s_"x } x 2774 drivers/net/wireless/intersil/prism54/isl_ioctl.c #define IWPRIV_SET_ADDR(n,x) { n, IW_PRIV_TYPE_ADDR | IW_PRIV_SIZE_FIXED | 1, 0, "s_"x } x 2775 drivers/net/wireless/intersil/prism54/isl_ioctl.c #define IWPRIV_GET(n,x) { n, 0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | PRIV_STR_SIZE, "g_"x } x 2777 drivers/net/wireless/intersil/prism54/isl_ioctl.c #define IWPRIV_U32(n,x) IWPRIV_SET_U32(n,x), IWPRIV_GET(n,x) x 2778 drivers/net/wireless/intersil/prism54/isl_ioctl.c #define IWPRIV_SSID(n,x) IWPRIV_SET_SSID(n,x), IWPRIV_GET(n,x) x 2779 drivers/net/wireless/intersil/prism54/isl_ioctl.c #define IWPRIV_ADDR(n,x) IWPRIV_SET_ADDR(n,x), IWPRIV_GET(n,x) x 230 drivers/net/wireless/marvell/libertas/defs.h #define MRVL_FW_MAJOR_REV(x) ((x)>>24) x 311 drivers/net/wireless/marvell/mwifiex/fw.h #define SETHT_MCS32(x) (x[4] |= 1) x 451 drivers/net/wireless/marvell/mwl8k.c #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ x 452 drivers/net/wireless/marvell/mwl8k.c snprintf(buf, bufsize, "%s", #x);\ x 960 drivers/net/wireless/marvell/mwl8k.c #define MWL8K_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) x 1069 drivers/net/wireless/marvell/mwl8k.c #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) x 1070 drivers/net/wireless/marvell/mwl8k.c #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) x 58 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h #define MT_DFS_CHECK_EVENT(x) ((x) != GENMASK(31, 0)) x 59 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h #define MT_DFS_EVENT_ENGINE(x) (((x) & BIT(31)) ? 2 : 0) x 60 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h #define MT_DFS_EVENT_TIMESTAMP(x) ((x) & GENMASK(21, 0)) x 61 drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h #define MT_DFS_EVENT_WIDTH(x) ((x) & GENMASK(11, 0)) x 65 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie_ipc.h #define QTN_GET_LEN(x) ((x) & 0xFFFF) x 45 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_ipc.h #define QTN_BDA_VER(x) (((x) >> 4) & 0xFF) x 74 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_ipc.h #define QTN_GET_LEN(x) (((x) >> 16) & 0xFFFF) x 75 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_ipc.h #define QTN_GET_OFFSET(x) (((x) >> 8) & 0xFF) x 168 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define is_power_of_two(x) ( !((x) & ((x)-1)) ) x 169 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define low_bit_mask(x) ( ((x)-1) & ~(x) ) x 170 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x)) x 2652 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c u32 oldval, x, tx0_a, reg; x 2662 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c x = result[candidate][0]; x 2663 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c if ((x & 0x00000200) != 0) x 2664 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c x = x | 0xfffffc00; x 2665 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c tx0_a = (x * oldval) >> 8; x 2674 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c if ((x * oldval >> 7) & 0x1) x 2729 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c u32 oldval, x, tx1_a, reg; x 2739 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c x = result[candidate][4]; x 2740 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c if ((x & 0x00000200) != 0) x 2741 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c x = x | 0xfffffc00; x 2742 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c tx1_a = (x * oldval) >> 8; x 2751 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c if ((x * oldval >> 7) & 0x1) x 65 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_STATE(x) (FW_PS_STATE_MASK & (x)) x 66 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_STATE_HW(x) (FW_PS_STATE_HW_MASK & (x)) x 67 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_STATE_INT(x) (FW_PS_STATE_INT_MASK & (x)) x 68 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_ISR_VAL(x) ((x) & 0x70) x 69 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_IMR_MASK(x) ((x) & 0xDF) x 70 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_KEEP_IMR(x) ((x) & 0x20) x 95 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_IS_ACK(x) ((x) & FW_PS_ACK) x 96 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_IS_CLK_ON(x) ((x) & (FW_PS_RF_OFF | FW_PS_ALL_ON)) x 97 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_IS_RF_ON(x) ((x) & (FW_PS_ALL_ON)) x 98 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_IS_ACTIVE(x) ((x) & (FW_PS_ST_ACTIVE)) x 99 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_PS_IS_CPWM_INT(x) ((x) & 0x40) x 101 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h #define FW_CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) x 1506 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 oldval_0, x, tx0_a, reg; x 1514 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c x = result[final_candidate][0]; x 1515 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c if ((x & 0x00000200) != 0) x 1516 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c x = x | 0xFFFFFC00; x 1517 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c tx0_a = (x * oldval_0) >> 8; x 1520 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c ((x * oldval_0 >> 7) & 0x1)); x 843 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) x 849 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 853 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_BOSC(x) (((x) & 0x3) << 2) x 854 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_CADJ(x) (((x) & 0xF) << 4) x 856 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) x 858 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) x 860 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) x 862 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) x 864 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) x 865 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _XTAL_GPIO(x) (((x) & 0x7) << 23) x 962 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 969 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LBMODE(x) (((x) & 0xF) << 24) x 981 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _PSRX(x) (x) x 982 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _PSTX(x) ((x) << 4) x 1007 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) x 1008 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) x 1009 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) x 1010 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8) x 1011 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) x 1012 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) x 1022 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 1023 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 1024 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 1025 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 1031 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _HPQ(x) ((x) & 0xFF) x 1032 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LPQ(x) (((x) & 0xFF) << 8) x 1033 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 1034 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _NPQ(x) ((x) & 0xFF) x 1041 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define BCN_HEAD(x) (((x) & 0xFF) << 8) x 1051 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _INIRTSMCS_SEL(x) ((x) & 0x3F) x 1053 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 1054 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 1058 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RRSC_BITMAP(x) ((x) & 0xFFFFF) x 1060 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RRSR_RSC(x) (((x) & 0x3) << 21) x 1068 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS0(x) ((x) & 0xF) x 1069 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) x 1070 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) x 1071 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) x 1072 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) x 1073 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) x 1074 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) x 1075 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) x 1080 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC1(x) ((x) & 0x1F) x 1081 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC2(x) (((x) & 0x1F) << 8) x 1082 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC3(x) (((x) & 0x1F) << 16) x 1083 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC4(x) (((x) & 0x1F) << 24) x 1084 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC5(x) ((x) & 0x1F) x 1085 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC6(x) (((x) & 0x1F) << 8) x 1086 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC7(x) (((x) & 0x1F) << 16) x 1087 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _DARF_RC8(x) (((x) & 0x1F) << 24) x 1089 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC1(x) ((x) & 0x1F) x 1090 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC2(x) (((x) & 0x1F) << 8) x 1091 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC3(x) (((x) & 0x1F) << 16) x 1092 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC4(x) (((x) & 0x1F) << 24) x 1093 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC5(x) ((x) & 0x1F) x 1094 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC6(x) (((x) & 0x1F) << 8) x 1095 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC7(x) (((x) & 0x1F) << 16) x 1096 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _RARF_RC8(x) (((x) & 0x1F) << 24) x 1103 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _AIFS(x) (x) x 1104 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _ECW_MAX_MIN(x) ((x) << 8) x 1105 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TXOP_LIMIT(x) ((x) << 16) x 1107 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _BCNIFS(x) ((x) & 0xFF) x 1108 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _BCNECW(x) ((((x) & 0xF)) << 8) x 1110 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _LRL(x) ((x) & 0x3F) x 1111 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SRL(x) (((x) & 0x3F) << 8) x 1113 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SIFS_CCK_CTX(x) ((x) & 0xFF) x 1114 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); x 1116 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SIFS_OFDM_CTX(x) ((x) & 0xFF) x 1117 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); x 1119 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) x 1187 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _MIN_SPACE(x) ((x) & 0x7) x 1188 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) x 981 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c u32 oldval_0, x, tx0_a, reg; x 989 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c x = result[final_candidate][0]; x 990 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c if ((x & 0x00000200) != 0) x 991 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c x = x | 0xFFFFFC00; x 992 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c tx0_a = (x * oldval_0) >> 8; x 995 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c ((x * oldval_0 >> 7) & 0x1)); x 1021 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c u32 oldval_1, x, tx1_a, reg; x 1029 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c x = result[final_candidate][4]; x 1030 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c if ((x & 0x00000200) != 0) x 1031 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c x = x | 0xFFFFFC00; x 1032 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c tx1_a = (x * oldval_1) >> 8; x 1035 drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c ((x * oldval_1 >> 7) & 0x1)); x 762 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) x 768 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 772 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_BOSC(x) (((x) & 0x3) << 2) x 773 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_CADJ(x) (((x) & 0xF) << 4) x 775 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) x 777 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) x 779 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) x 781 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) x 783 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) x 784 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _XTAL_GPIO(x) (((x) & 0x7) << 23) x 883 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 890 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LBMODE(x) (((x) & 0xF) << 24) x 902 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _PSRX(x) (x) x 903 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _PSTX(x) ((x) << 4) x 928 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) x 929 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) x 930 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) x 931 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8) x 932 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) x 933 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) x 943 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 944 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 945 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 946 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 952 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _HPQ(x) ((x) & 0xFF) x 953 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LPQ(x) (((x) & 0xFF) << 8) x 954 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 955 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _NPQ(x) ((x) & 0xFF) x 962 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define BCN_HEAD(x) (((x) & 0xFF) << 8) x 972 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _INIRTSMCS_SEL(x) ((x) & 0x3F) x 974 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 975 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 979 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RRSC_BITMAP(x) ((x) & 0xFFFFF) x 981 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RRSR_RSC(x) (((x) & 0x3) << 21) x 989 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS0(x) ((x) & 0xF) x 990 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) x 991 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) x 992 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) x 993 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) x 994 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) x 995 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) x 996 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) x 1001 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC1(x) ((x) & 0x1F) x 1002 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC2(x) (((x) & 0x1F) << 8) x 1003 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC3(x) (((x) & 0x1F) << 16) x 1004 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC4(x) (((x) & 0x1F) << 24) x 1005 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC5(x) ((x) & 0x1F) x 1006 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC6(x) (((x) & 0x1F) << 8) x 1007 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC7(x) (((x) & 0x1F) << 16) x 1008 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _DARF_RC8(x) (((x) & 0x1F) << 24) x 1010 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC1(x) ((x) & 0x1F) x 1011 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC2(x) (((x) & 0x1F) << 8) x 1012 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC3(x) (((x) & 0x1F) << 16) x 1013 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC4(x) (((x) & 0x1F) << 24) x 1014 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC5(x) ((x) & 0x1F) x 1015 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC6(x) (((x) & 0x1F) << 8) x 1016 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC7(x) (((x) & 0x1F) << 16) x 1017 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _RARF_RC8(x) (((x) & 0x1F) << 24) x 1025 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _AIFS(x) (x) x 1026 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _ECW_MAX_MIN(x) ((x) << 8) x 1027 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TXOP_LIMIT(x) ((x) << 16) x 1029 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _BCNIFS(x) ((x) & 0xFF) x 1030 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _BCNECW(x) ((((x) & 0xF)) << 8) x 1032 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _LRL(x) ((x) & 0x3F) x 1033 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SRL(x) (((x) & 0x3F) << 8) x 1035 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SIFS_CCK_CTX(x) ((x) & 0xFF) x 1036 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8) x 1038 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SIFS_OFDM_CTX(x) ((x) & 0xFF) x 1039 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8) x 1041 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) x 1109 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _MIN_SPACE(x) ((x) & 0x7) x 1110 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) x 822 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) x 831 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 837 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_BOSC(x) (((x) & 0x3) << 2) x 838 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_CADJ(x) (((x) & 0xF) << 4) x 840 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) x 842 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) x 844 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) x 846 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) x 848 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) x 849 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _XTAL_GPIO(x) (((x) & 0x7) << 23) x 923 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 924 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 925 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 926 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 52 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/fw.h #define FW_PS_STATE(x) (FW_PS_STATE_MASK & (x)) x 63 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/fw.h #define FW_PS_IS_ACK(x) ((x) & FW_PS_ACK) x 2264 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 oldval_0, x, tx0_a, reg; x 2272 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c x = result[final_candidate][0]; x 2273 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c if ((x & 0x00000200) != 0) x 2274 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c x = x | 0xFFFFFC00; x 2275 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c tx0_a = (x * oldval_0) >> 8; x 2278 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c ((x * oldval_0 >> 7) & 0x1)); x 2309 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 oldval_1, x, tx1_a, reg; x 2317 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c x = result[final_candidate][4]; x 2318 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c if ((x & 0x00000200) != 0) x 2319 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c x = x | 0xFFFFFC00; x 2320 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c tx1_a = (x * oldval_1) >> 8; x 2323 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c ((x * oldval_1 >> 7) & 0x1)); x 805 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) x 811 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 815 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_BOSC(x) (((x) & 0x3) << 2) x 816 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_CADJ(x) (((x) & 0xF) << 4) x 818 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) x 820 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) x 822 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) x 824 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) x 826 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) x 827 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _XTAL_GPIO(x) (((x) & 0x7) << 23) x 924 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 931 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LBMODE(x) (((x) & 0xF) << 24) x 943 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _PSRX(x) (x) x 944 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _PSTX(x) ((x) << 4) x 969 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) x 970 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) x 971 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) x 972 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8) x 973 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) x 974 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) x 984 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 985 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 986 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 987 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 993 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _HPQ(x) ((x) & 0xFF) x 994 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LPQ(x) (((x) & 0xFF) << 8) x 995 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 996 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _NPQ(x) ((x) & 0xFF) x 1003 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define BCN_HEAD(x) (((x) & 0xFF) << 8) x 1013 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _INIRTSMCS_SEL(x) ((x) & 0x3F) x 1015 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 1016 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 1020 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RRSC_BITMAP(x) ((x) & 0xFFFFF) x 1022 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RRSR_RSC(x) (((x) & 0x3) << 21) x 1030 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS0(x) ((x) & 0xF) x 1031 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) x 1032 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) x 1033 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) x 1034 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) x 1035 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) x 1036 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) x 1037 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) x 1042 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC1(x) ((x) & 0x1F) x 1043 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC2(x) (((x) & 0x1F) << 8) x 1044 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC3(x) (((x) & 0x1F) << 16) x 1045 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC4(x) (((x) & 0x1F) << 24) x 1046 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC5(x) ((x) & 0x1F) x 1047 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC6(x) (((x) & 0x1F) << 8) x 1048 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC7(x) (((x) & 0x1F) << 16) x 1049 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _DARF_RC8(x) (((x) & 0x1F) << 24) x 1051 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC1(x) ((x) & 0x1F) x 1052 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC2(x) (((x) & 0x1F) << 8) x 1053 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC3(x) (((x) & 0x1F) << 16) x 1054 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC4(x) (((x) & 0x1F) << 24) x 1055 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC5(x) ((x) & 0x1F) x 1056 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC6(x) (((x) & 0x1F) << 8) x 1057 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC7(x) (((x) & 0x1F) << 16) x 1058 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _RARF_RC8(x) (((x) & 0x1F) << 24) x 1065 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _AIFS(x) (x) x 1066 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _ECW_MAX_MIN(x) ((x) << 8) x 1067 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TXOP_LIMIT(x) ((x) << 16) x 1069 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _BCNIFS(x) ((x) & 0xFF) x 1070 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _BCNECW(x) ((((x) & 0xF)) << 8) x 1072 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _LRL(x) ((x) & 0x3F) x 1073 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SRL(x) (((x) & 0x3F) << 8) x 1075 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SIFS_CCK_CTX(x) ((x) & 0xFF) x 1076 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8) x 1078 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SIFS_OFDM_CTX(x) ((x) & 0xFF) x 1079 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8) x 1081 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) x 1149 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _MIN_SPACE(x) ((x) & 0x7) x 1150 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) x 806 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) x 812 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 816 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_BOSC(x) (((x) & 0x3) << 2) x 817 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_CADJ(x) (((x) & 0xF) << 4) x 819 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) x 821 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) x 823 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) x 825 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) x 827 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) x 828 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _XTAL_GPIO(x) (((x) & 0x7) << 23) x 926 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 933 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LBMODE(x) (((x) & 0xF) << 24) x 945 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _PSRX(x) (x) x 946 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _PSTX(x) ((x) << 4) x 971 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) x 972 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) x 973 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) x 974 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8) x 975 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) x 976 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) x 986 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 987 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 988 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 989 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 995 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _HPQ(x) ((x) & 0xFF) x 996 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LPQ(x) (((x) & 0xFF) << 8) x 997 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 998 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _NPQ(x) ((x) & 0xFF) x 1005 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define BCN_HEAD(x) (((x) & 0xFF) << 8) x 1015 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _INIRTSMCS_SEL(x) ((x) & 0x3F) x 1017 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 1018 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 1022 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RRSC_BITMAP(x) ((x) & 0xFFFFF) x 1024 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RRSR_RSC(x) (((x) & 0x3) << 21) x 1032 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS0(x) ((x) & 0xF) x 1033 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) x 1034 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) x 1035 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) x 1036 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) x 1037 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) x 1038 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) x 1039 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) x 1044 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC1(x) ((x) & 0x1F) x 1045 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC2(x) (((x) & 0x1F) << 8) x 1046 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC3(x) (((x) & 0x1F) << 16) x 1047 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC4(x) (((x) & 0x1F) << 24) x 1048 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC5(x) ((x) & 0x1F) x 1049 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC6(x) (((x) & 0x1F) << 8) x 1050 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC7(x) (((x) & 0x1F) << 16) x 1051 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _DARF_RC8(x) (((x) & 0x1F) << 24) x 1053 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC1(x) ((x) & 0x1F) x 1054 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC2(x) (((x) & 0x1F) << 8) x 1055 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC3(x) (((x) & 0x1F) << 16) x 1056 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC4(x) (((x) & 0x1F) << 24) x 1057 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC5(x) ((x) & 0x1F) x 1058 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC6(x) (((x) & 0x1F) << 8) x 1059 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC7(x) (((x) & 0x1F) << 16) x 1060 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _RARF_RC8(x) (((x) & 0x1F) << 24) x 1067 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _AIFS(x) (x) x 1068 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _ECW_MAX_MIN(x) ((x) << 8) x 1069 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TXOP_LIMIT(x) ((x) << 16) x 1071 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _BCNIFS(x) ((x) & 0xFF) x 1072 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _BCNECW(x) ((((x) & 0xF)) << 8) x 1074 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _LRL(x) ((x) & 0x3F) x 1075 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SRL(x) (((x) & 0x3F) << 8) x 1077 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SIFS_CCK_CTX(x) ((x) & 0xFF) x 1078 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8) x 1080 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SIFS_OFDM_CTX(x) ((x) & 0xFF) x 1081 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8) x 1083 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) x 1151 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _MIN_SPACE(x) ((x) & 0x7) x 1152 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) x 2090 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define EFUSE_SEL(x) (((x) & 0x3) << 8) x 38 drivers/net/wireless/realtek/rtlwifi/rtl8723be/fw.h #define FW_PS_STATE(x) (FW_PS_STATE_MASK & (x)) x 54 drivers/net/wireless/realtek/rtlwifi/rtl8723be/fw.h #define FW_PS_IS_ACK(x) ((x) & FW_PS_ACK) x 1890 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c u32 oldval_1, x, tx1_a, reg; x 1898 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c x = result[final_candidate][4]; x 1899 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c if ((x & 0x00000200) != 0) x 1900 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c x = x | 0xFFFFFC00; x 1901 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c tx1_a = (x * oldval_1) >> 8; x 1904 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c ((x * oldval_1 >> 7) & 0x1)); x 838 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) x 844 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 848 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_BOSC(x) (((x) & 0x3) << 2) x 849 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_CADJ(x) (((x) & 0xF) << 4) x 851 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) x 853 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) x 855 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) x 857 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) x 859 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) x 860 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _XTAL_GPIO(x) (((x) & 0x7) << 23) x 957 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 964 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LBMODE(x) (((x) & 0xF) << 24) x 976 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _PSRX(x) (x) x 977 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _PSTX(x) ((x) << 4) x 1002 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) x 1003 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) x 1004 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) x 1005 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8) x 1006 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) x 1007 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) x 1017 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 1018 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 1019 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 1020 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 1026 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _HPQ(x) ((x) & 0xFF) x 1027 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LPQ(x) (((x) & 0xFF) << 8) x 1028 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 1029 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _NPQ(x) ((x) & 0xFF) x 1036 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define BCN_HEAD(x) (((x) & 0xFF) << 8) x 1046 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _INIRTSMCS_SEL(x) ((x) & 0x3F) x 1048 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 1049 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 1053 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RRSC_BITMAP(x) ((x) & 0xFFFFF) x 1055 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RRSR_RSC(x) (((x) & 0x3) << 21) x 1063 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS0(x) ((x) & 0xF) x 1064 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) x 1065 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) x 1066 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) x 1067 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) x 1068 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) x 1069 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) x 1070 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) x 1075 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC1(x) ((x) & 0x1F) x 1076 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC2(x) (((x) & 0x1F) << 8) x 1077 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC3(x) (((x) & 0x1F) << 16) x 1078 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC4(x) (((x) & 0x1F) << 24) x 1079 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC5(x) ((x) & 0x1F) x 1080 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC6(x) (((x) & 0x1F) << 8) x 1081 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC7(x) (((x) & 0x1F) << 16) x 1082 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _DARF_RC8(x) (((x) & 0x1F) << 24) x 1084 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC1(x) ((x) & 0x1F) x 1085 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC2(x) (((x) & 0x1F) << 8) x 1086 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC3(x) (((x) & 0x1F) << 16) x 1087 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC4(x) (((x) & 0x1F) << 24) x 1088 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC5(x) ((x) & 0x1F) x 1089 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC6(x) (((x) & 0x1F) << 8) x 1090 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC7(x) (((x) & 0x1F) << 16) x 1091 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _RARF_RC8(x) (((x) & 0x1F) << 24) x 1098 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _AIFS(x) (x) x 1099 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _ECW_MAX_MIN(x) ((x) << 8) x 1100 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TXOP_LIMIT(x) ((x) << 16) x 1102 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _BCNIFS(x) ((x) & 0xFF) x 1103 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _BCNECW(x) ((((x) & 0xF)) << 8) x 1105 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _LRL(x) ((x) & 0x3F) x 1106 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SRL(x) (((x) & 0x3F) << 8) x 1108 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SIFS_CCK_CTX(x) ((x) & 0xFF) x 1109 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8) x 1111 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SIFS_OFDM_CTX(x) ((x) & 0xFF) x 1112 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8) x 1114 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) x 1182 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _MIN_SPACE(x) ((x) & 0x7) x 1183 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) x 2266 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define EFUSE_SEL(x) (((x) & 0x3) << 8) x 286 drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c u32 oldval_0, x, tx0_a, reg; x 294 drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c x = result[final_candidate][0]; x 295 drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c if ((x & 0x00000200) != 0) x 296 drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c x = x | 0xFFFFFC00; x 297 drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c tx0_a = (x * oldval_0) >> 8; x 300 drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c ((x * oldval_0 >> 7) & 0x1)); x 75 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_STATE(x) (FW_PS_STATE_MASK & (x)) x 76 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_STATE_HW(x) (FW_PS_STATE_HW_MASK & (x)) x 77 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_STATE_INT(x) (FW_PS_STATE_INT_MASK & (x)) x 78 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_ISR_VAL(x) ((x) & 0x70) x 79 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_IMR_MASK(x) ((x) & 0xDF) x 80 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_KEEP_IMR(x) ((x) & 0x20) x 105 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_IS_ACK(x) ((x) & FW_PS_ACK) x 106 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_IS_CLK_ON(x) ((x) & (FW_PS_RF_OFF | FW_PS_ALL_ON)) x 107 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_IS_RF_ON(x) ((x) & (FW_PS_ALL_ON)) x 108 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_IS_ACTIVE(x) ((x) & (FW_PS_ST_ACTIVE)) x 109 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_PS_IS_CPWM_INT(x) ((x) & 0x40) x 111 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h #define FW_CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) x 867 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) x 873 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 877 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_BOSC(x) (((x) & 0x3) << 2) x 878 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_CADJ(x) (((x) & 0xF) << 4) x 880 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) x 882 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) x 884 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) x 886 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) x 888 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) x 889 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _XTAL_GPIO(x) (((x) & 0x7) << 23) x 986 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 993 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LBMODE(x) (((x) & 0xF) << 24) x 1005 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _PSRX(x) (x) x 1006 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _PSTX(x) ((x) << 4) x 1031 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) x 1032 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) x 1033 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) x 1034 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8) x 1035 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) x 1036 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) x 1046 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 1047 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 1048 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 1049 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 1055 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _HPQ(x) ((x) & 0xFF) x 1056 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LPQ(x) (((x) & 0xFF) << 8) x 1057 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 1058 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _NPQ(x) ((x) & 0xFF) x 1065 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define BCN_HEAD(x) (((x) & 0xFF) << 8) x 1075 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _INIRTSMCS_SEL(x) ((x) & 0x3F) x 1077 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 1078 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 1082 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RRSC_BITMAP(x) ((x) & 0xFFFFF) x 1084 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RRSR_RSC(x) (((x) & 0x3) << 21) x 1092 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS0(x) ((x) & 0xF) x 1093 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) x 1094 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) x 1095 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) x 1096 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) x 1097 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) x 1098 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) x 1099 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) x 1104 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC1(x) ((x) & 0x1F) x 1105 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC2(x) (((x) & 0x1F) << 8) x 1106 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC3(x) (((x) & 0x1F) << 16) x 1107 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC4(x) (((x) & 0x1F) << 24) x 1108 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC5(x) ((x) & 0x1F) x 1109 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC6(x) (((x) & 0x1F) << 8) x 1110 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC7(x) (((x) & 0x1F) << 16) x 1111 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _DARF_RC8(x) (((x) & 0x1F) << 24) x 1113 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC1(x) ((x) & 0x1F) x 1114 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC2(x) (((x) & 0x1F) << 8) x 1115 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC3(x) (((x) & 0x1F) << 16) x 1116 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC4(x) (((x) & 0x1F) << 24) x 1117 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC5(x) ((x) & 0x1F) x 1118 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC6(x) (((x) & 0x1F) << 8) x 1119 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC7(x) (((x) & 0x1F) << 16) x 1120 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _RARF_RC8(x) (((x) & 0x1F) << 24) x 1127 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _AIFS(x) (x) x 1128 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _ECW_MAX_MIN(x) ((x) << 8) x 1129 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TXOP_LIMIT(x) ((x) << 16) x 1131 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _BCNIFS(x) ((x) & 0xFF) x 1132 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _BCNECW(x) ((((x) & 0xF)) << 8) x 1134 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _LRL(x) ((x) & 0x3F) x 1135 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SRL(x) (((x) & 0x3F) << 8) x 1137 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SIFS_CCK_CTX(x) ((x) & 0xFF) x 1138 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8) x 1140 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SIFS_OFDM_CTX(x) ((x) & 0xFF) x 1141 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8) x 1143 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) x 1211 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _MIN_SPACE(x) ((x) & 0x7) x 1212 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) x 2366 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h #define EFUSE_SEL(x) (((x) & 0x3) << 8) x 3022 drivers/net/wireless/realtek/rtlwifi/wifi.h #define byte(x, n) ((x >> (8 * n)) & 0xff) x 3054 drivers/net/wireless/realtek/rtlwifi/wifi.h #define container_of_dwork_rtl(x, y, z) \ x 3055 drivers/net/wireless/realtek/rtlwifi/wifi.h container_of(to_delayed_work(x), y, z) x 91 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_VENDOR_ID(x) (((x) & BIT_MASK_VENDOR_ID) << BIT_SHIFT_VENDOR_ID) x 93 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_CLEAR_VENDOR_ID(x) ((x) & (~BITS_VENDOR_ID)) x 94 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_GET_VENDOR_ID(x) (((x) >> BIT_SHIFT_VENDOR_ID) & BIT_MASK_VENDOR_ID) x 97 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_CHIP_VER(x) (((x) & BIT_MASK_CHIP_VER) << BIT_SHIFT_CHIP_VER) x 99 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_CLEAR_CHIP_VER(x) ((x) & (~BITS_CHIP_VER)) x 100 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_GET_CHIP_VER(x) (((x) >> BIT_SHIFT_CHIP_VER) & BIT_MASK_CHIP_VER) x 123 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXDMA_VOQ_MAP(x) \ x 124 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXDMA_VOQ_MAP) << BIT_SHIFT_TXDMA_VOQ_MAP) x 127 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXDMA_VIQ_MAP(x) \ x 128 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXDMA_VIQ_MAP) << BIT_SHIFT_TXDMA_VIQ_MAP) x 132 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXDMA_BEQ_MAP(x) \ x 133 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXDMA_BEQ_MAP) << BIT_SHIFT_TXDMA_BEQ_MAP) x 136 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXDMA_BKQ_MAP(x) \ x 137 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXDMA_BKQ_MAP) << BIT_SHIFT_TXDMA_BKQ_MAP) x 140 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXDMA_MGQ_MAP(x) \ x 141 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXDMA_MGQ_MAP) << BIT_SHIFT_TXDMA_MGQ_MAP) x 144 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXDMA_HIQ_MAP(x) \ x 145 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXDMA_HIQ_MAP) << BIT_SHIFT_TXDMA_HIQ_MAP) x 148 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXSC_40M(x) \ x 149 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXSC_40M) << BIT_SHIFT_TXSC_40M) x 152 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_TXSC_20M(x) \ x 153 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_TXSC_20M) << BIT_SHIFT_TXSC_20M) x 398 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_RXGCK_VHT_FIFOTHR(x) \ x 399 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_RXGCK_VHT_FIFOTHR) << BIT_SHIFT_RXGCK_VHT_FIFOTHR) x 405 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_RXGCK_HT_FIFOTHR(x) \ x 406 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_RXGCK_HT_FIFOTHR) << BIT_SHIFT_RXGCK_HT_FIFOTHR) x 412 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_RXGCK_OFDM_FIFOTHR(x) \ x 413 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_RXGCK_OFDM_FIFOTHR) << BIT_SHIFT_RXGCK_OFDM_FIFOTHR) x 419 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_RXGCK_CCK_FIFOTHR(x) \ x 420 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_RXGCK_CCK_FIFOTHR) << BIT_SHIFT_RXGCK_CCK_FIFOTHR) x 428 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_RXPSF_PKTLENTHR(x) \ x 429 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_RXPSF_PKTLENTHR) << BIT_SHIFT_RXPSF_PKTLENTHR) x 432 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_CLEAR_RXPSF_PKTLENTHR(x) ((x) & (~BITS_RXPSF_PKTLENTHR)) x 433 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_SET_RXPSF_PKTLENTHR(x, v) \ x 434 drivers/net/wireless/realtek/rtw88/reg.h (BIT_CLEAR_RXPSF_PKTLENTHR(x) | BIT_RXPSF_PKTLENTHR(v)) x 449 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_RXPSF_ERRTHR(x) \ x 450 drivers/net/wireless/realtek/rtw88/reg.h (((x) & BIT_MASK_RXPSF_ERRTHR) << BIT_SHIFT_RXPSF_ERRTHR) x 452 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_CLEAR_RXPSF_ERRTHR(x) ((x) & (~BITS_RXPSF_ERRTHR)) x 453 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_GET_RXPSF_ERRTHR(x) \ x 454 drivers/net/wireless/realtek/rtw88/reg.h (((x) >> BIT_SHIFT_RXPSF_ERRTHR) & BIT_MASK_RXPSF_ERRTHR) x 455 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_SET_RXPSF_ERRTHR(x, v) \ x 456 drivers/net/wireless/realtek/rtw88/reg.h (BIT_CLEAR_RXPSF_ERRTHR(x) | BIT_RXPSF_ERRTHR(v)) x 450 drivers/net/wireless/ti/wlcore/debugfs.c #define DRIVER_STATE_PRINT(x, fmt) \ x 452 drivers/net/wireless/ti/wlcore/debugfs.c #x " = " fmt "\n", wl->x)) x 454 drivers/net/wireless/ti/wlcore/debugfs.c #define DRIVER_STATE_PRINT_GENERIC(x, fmt, args...) \ x 456 drivers/net/wireless/ti/wlcore/debugfs.c #x " = " fmt "\n", args)) x 458 drivers/net/wireless/ti/wlcore/debugfs.c #define DRIVER_STATE_PRINT_LONG(x) DRIVER_STATE_PRINT(x, "%ld") x 459 drivers/net/wireless/ti/wlcore/debugfs.c #define DRIVER_STATE_PRINT_INT(x) DRIVER_STATE_PRINT(x, "%d") x 460 drivers/net/wireless/ti/wlcore/debugfs.c #define DRIVER_STATE_PRINT_STR(x) DRIVER_STATE_PRINT(x, "%s") x 461 drivers/net/wireless/ti/wlcore/debugfs.c #define DRIVER_STATE_PRINT_LHEX(x) DRIVER_STATE_PRINT(x, "0x%lx") x 462 drivers/net/wireless/ti/wlcore/debugfs.c #define DRIVER_STATE_PRINT_HEX(x) DRIVER_STATE_PRINT(x, "0x%x") x 548 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT(x, fmt) \ x 550 drivers/net/wireless/ti/wlcore/debugfs.c #x " = " fmt "\n", wlvif->x)) x 552 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT_LONG(x) VIF_STATE_PRINT(x, "%ld") x 553 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT_INT(x) VIF_STATE_PRINT(x, "%d") x 554 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT_STR(x) VIF_STATE_PRINT(x, "%s") x 555 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT_LHEX(x) VIF_STATE_PRINT(x, "0x%lx") x 556 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT_LLHEX(x) VIF_STATE_PRINT(x, "0x%llx") x 557 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT_HEX(x) VIF_STATE_PRINT(x, "0x%x") x 559 drivers/net/wireless/ti/wlcore/debugfs.c #define VIF_STATE_PRINT_NSTR(x, len) \ x 562 drivers/net/wireless/ti/wlcore/debugfs.c memcpy(tmp_buf, wlvif->x, \ x 565 drivers/net/wireless/ti/wlcore/debugfs.c #x " = %s\n", tmp_buf); \ x 64 drivers/net/wireless/wl3501_cs.c #define WL3501_NOPLOOP(n) { int x = 0; while (x++ < n) slow_down_io(); } x 39 drivers/net/wireless/zydas/zd1211rw/zd_def.h # define ZD_ASSERT(x) \ x 41 drivers/net/wireless/zydas/zd1211rw/zd_def.h if (unlikely(!(x))) { \ x 43 drivers/net/wireless/zydas/zd1211rw/zd_def.h __FILE__, __LINE__, __stringify(x)); \ x 48 drivers/net/wireless/zydas/zd1211rw/zd_def.h # define ZD_ASSERT(x) do { } while (0) x 640 drivers/nfc/pn533/pn533.c #define PN533_TYPE_A_SENS_RES_NFCID1(x) ((u8)((be16_to_cpu(x) & 0x00C0) >> 6)) x 641 drivers/nfc/pn533/pn533.c #define PN533_TYPE_A_SENS_RES_SSD(x) ((u8)((be16_to_cpu(x) & 0x001F) >> 0)) x 642 drivers/nfc/pn533/pn533.c #define PN533_TYPE_A_SENS_RES_PLATCONF(x) ((u8)((be16_to_cpu(x) & 0x0F00) >> 8)) x 647 drivers/nfc/pn533/pn533.c #define PN533_TYPE_A_SEL_PROT(x) (((x) & 0x60) >> 5) x 648 drivers/nfc/pn533/pn533.c #define PN533_TYPE_A_SEL_CASCADE(x) (((x) & 0x04) >> 2) x 820 drivers/nfc/pn533/pn533.c #define PN533_TYPE_B_PROT_FCSI(x) (((x) & 0xF0) >> 4) x 821 drivers/nfc/pn533/pn533.c #define PN533_TYPE_B_PROT_TYPE(x) (((x) & 0x0F) >> 0) x 45 drivers/nfc/st-nci/se.c #define ST_NCI_EVT_HOT_PLUG_IS_INHIBITED(x) (x->data[0] & 0x80) x 82 drivers/nfc/st-nci/se.c #define ST_NCI_BWI_TO_TIMEOUT(x) ((1 << x) * 200) x 83 drivers/nfc/st-nci/se.c #define ST_NCI_ATR_GET_Y_FROM_TD(x) (x >> 4) x 86 drivers/nfc/st-nci/se.c #define ST_NCI_ATR_TA_PRESENT(x) (x & 0x01) x 88 drivers/nfc/st-nci/se.c #define ST_NCI_ATR_TB_PRESENT(x) (x & 0x02) x 69 drivers/nfc/st21nfca/core.c #define ST21NFCA_EVT_HOT_PLUG_IS_INHIBITED(x) (x->data[0] & 0x80) x 40 drivers/nfc/st21nfca/se.c #define ST21NFCA_BWI_TO_TIMEOUT(x) ((1 << x) * 200) x 41 drivers/nfc/st21nfca/se.c #define ST21NFCA_ATR_GET_Y_FROM_TD(x) (x >> 4) x 44 drivers/nfc/st21nfca/se.c #define ST21NFCA_ATR_TA_PRESENT(x) (x & 0x01) x 46 drivers/nfc/st21nfca/se.c #define ST21NFCA_ATR_TB_PRESENT(x) (x & 0x02) x 60 drivers/ntb/hw/amd/ntb_hw_amd.h #define NTB_LNK_STA_ACTIVE(x) (!!((x) & NTB_LIN_STA_ACTIVE_BIT)) x 61 drivers/ntb/hw/amd/ntb_hw_amd.h #define NTB_LNK_STA_SPEED(x) (((x) & NTB_LNK_STA_SPEED_MASK) >> 16) x 62 drivers/ntb/hw/amd/ntb_hw_amd.h #define NTB_LNK_STA_WIDTH(x) (((x) & NTB_LNK_STA_WIDTH_MASK) >> 20) x 89 drivers/ntb/hw/intel/ntb_hw_intel.h #define NTB_LNK_STA_ACTIVE(x) (!!((x) & NTB_LNK_STA_ACTIVE_BIT)) x 90 drivers/ntb/hw/intel/ntb_hw_intel.h #define NTB_LNK_STA_SPEED(x) ((x) & NTB_LNK_STA_SPEED_MASK) x 91 drivers/ntb/hw/intel/ntb_hw_intel.h #define NTB_LNK_STA_WIDTH(x) (((x) & NTB_LNK_STA_WIDTH_MASK) >> 4) x 47 drivers/nvme/target/nvmet.h #define IPO_IATTR_CONNECT_DATA(x) \ x 48 drivers/nvme/target/nvmet.h (cpu_to_le32((1 << 16) | (offsetof(struct nvmf_connect_data, x)))) x 49 drivers/nvme/target/nvmet.h #define IPO_IATTR_CONNECT_SQE(x) \ x 50 drivers/nvme/target/nvmet.h (cpu_to_le32(offsetof(struct nvmf_connect_command, x))) x 76 drivers/parisc/ccio-dma.c #define DBG_INIT(x...) printk(x) x 78 drivers/parisc/ccio-dma.c #define DBG_INIT(x...) x 82 drivers/parisc/ccio-dma.c #define DBG_RUN(x...) printk(x) x 84 drivers/parisc/ccio-dma.c #define DBG_RUN(x...) x 88 drivers/parisc/ccio-dma.c #define DBG_RES(x...) printk(x) x 90 drivers/parisc/ccio-dma.c #define DBG_RES(x...) x 94 drivers/parisc/ccio-dma.c #define DBG_RUN_SG(x...) printk(x) x 96 drivers/parisc/ccio-dma.c #define DBG_RUN_SG(x...) x 64 drivers/parisc/dino.c #define DBG(x...) printk(x) x 66 drivers/parisc/dino.c #define DBG(x...) x 127 drivers/parisc/dino.c #define DINO_MASK_IRQ(x) (1<<(x)) x 31 drivers/parisc/eisa_enumerator.c #define SLOT2PORT(x) (x<<12) x 37 drivers/parisc/eisa_enumerator.c #define get_8(x) (*(u_int8_t*)(x)) x 39 drivers/parisc/eisa_enumerator.c static inline u_int16_t get_16(const unsigned char *x) x 41 drivers/parisc/eisa_enumerator.c return (x[1] << 8) | x[0]; x 44 drivers/parisc/eisa_enumerator.c static inline u_int32_t get_32(const unsigned char *x) x 46 drivers/parisc/eisa_enumerator.c return (x[3] << 24) | (x[2] << 16) | (x[1] << 8) | x[0]; x 49 drivers/parisc/eisa_enumerator.c static inline u_int32_t get_24(const unsigned char *x) x 51 drivers/parisc/eisa_enumerator.c return (x[2] << 24) | (x[1] << 16) | (x[0] << 8); x 30 drivers/parisc/gsc.c #define DEBPRINTK(x,...) x 146 drivers/parisc/iosapic.c #define DBG(x...) printk(x) x 148 drivers/parisc/iosapic.c #define DBG(x...) x 152 drivers/parisc/iosapic.c #define DBG_IRT(x...) printk(x) x 154 drivers/parisc/iosapic.c #define DBG_IRT(x...) x 102 drivers/parisc/lasi.c #define lasi_led_init(x) /* nothing */ x 60 drivers/parisc/lba_pci.c #define DBG(x...) printk(x) x 62 drivers/parisc/lba_pci.c #define DBG(x...) x 66 drivers/parisc/lba_pci.c #define DBG_PORT(x...) printk(x) x 68 drivers/parisc/lba_pci.c #define DBG_PORT(x...) x 72 drivers/parisc/lba_pci.c #define DBG_CFG(x...) printk(x) x 74 drivers/parisc/lba_pci.c #define DBG_CFG(x...) x 78 drivers/parisc/lba_pci.c #define DBG_PAT(x...) printk(x) x 80 drivers/parisc/lba_pci.c #define DBG_PAT(x...) x 155 drivers/parisc/lba_pci.c #define LBA_NUM(x) ((((unsigned long) x) >> 13) & (ROPES_PER_IOC-1)) x 71 drivers/parisc/led.c #define DPRINTK(x) printk x x 73 drivers/parisc/led.c #define DPRINTK(x) x 167 drivers/parisc/power.c static void powerfail_interrupt(int code, void *x) x 67 drivers/parisc/sba_iommu.c #define DBG_INIT(x...) printk(x) x 69 drivers/parisc/sba_iommu.c #define DBG_INIT(x...) x 73 drivers/parisc/sba_iommu.c #define DBG_RUN(x...) printk(x) x 75 drivers/parisc/sba_iommu.c #define DBG_RUN(x...) x 79 drivers/parisc/sba_iommu.c #define DBG_RUN_SG(x...) printk(x) x 81 drivers/parisc/sba_iommu.c #define DBG_RUN_SG(x...) x 86 drivers/parisc/sba_iommu.c #define DBG_RES(x...) printk(x) x 88 drivers/parisc/sba_iommu.c #define DBG_RES(x...) x 181 drivers/parisc/sba_iommu.c #define sba_dump_ranges(x) x 182 drivers/parisc/sba_iommu.c #define sba_dump_tlb(x) x 85 drivers/parisc/superio.c #define DBG_INIT(x...) printk(x) x 87 drivers/parisc/superio.c #define DBG_INIT(x...) x 34 drivers/parport/parport_amiga.c #define DPRINTK(x...) do { } while (0) x 302 drivers/parport/parport_gsc.c #define printmode(x) {if(p->modes&PARPORT_MODE_##x){pr_cont("%s%s",f?",":"",#x);f++;}} x 2142 drivers/parport/parport_ip32.c #define printmode(x) if (p->modes & PARPORT_MODE_##x) \ x 2143 drivers/parport/parport_ip32.c printk("%s%s", f++ ? "," : "", #x) x 2158 drivers/parport/parport_pc.c #define printmode(x) \ x 2160 drivers/parport/parport_pc.c if (p->modes & PARPORT_MODE_##x) {\ x 2161 drivers/parport/parport_pc.c printk(KERN_CONT "%s%s", f ? "," : "", #x);\ x 46 drivers/parport/parport_sunbpp.c #define dprintk(x) printk x x 48 drivers/parport/parport_sunbpp.c #define dprintk(x) x 216 drivers/parport/procfs.c #define printmode(x) {if(port->modes&PARPORT_MODE_##x){len+=sprintf(buffer+len,"%s%s",f?",":"",#x);f++;}} x 104 drivers/pci/controller/dwc/pci-dra7xx.c #define to_dra7xx_pcie(x) dev_get_drvdata((x)->dev) x 28 drivers/pci/controller/dwc/pci-exynos.c #define to_exynos_pcie(x) dev_get_drvdata((x)->dev) x 43 drivers/pci/controller/dwc/pci-imx6.c #define to_imx6_pcie(x) dev_get_drvdata((x)->dev) x 110 drivers/pci/controller/dwc/pci-imx6.c #define PCIE_PHY_CTRL_DATA(x) FIELD_PREP(GENMASK(15, 0), (x)) x 44 drivers/pci/controller/dwc/pci-keystone.c #define CFG_BUS(x) (((x) & 0xff) << 16) x 45 drivers/pci/controller/dwc/pci-keystone.c #define CFG_DEVICE(x) (((x) & 0x1f) << 8) x 46 drivers/pci/controller/dwc/pci-keystone.c #define CFG_FUNC(x) ((x) & 0x7) x 108 drivers/pci/controller/dwc/pci-keystone.c #define to_keystone_pcie(x) dev_get_drvdata((x)->dev) x 27 drivers/pci/controller/dwc/pci-layerscape-ep.c #define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev) x 54 drivers/pci/controller/dwc/pci-layerscape.c #define to_ls_pcie(x) dev_get_drvdata((x)->dev) x 22 drivers/pci/controller/dwc/pci-meson.c #define to_meson_pcie(x) dev_get_drvdata((x)->dev) x 48 drivers/pci/controller/dwc/pci-meson.c #define PCIE_CAP_MAX_PAYLOAD_SIZE(x) ((x) << 5) x 50 drivers/pci/controller/dwc/pci-meson.c #define PCIE_CAP_MAX_READ_REQ_SIZE(x) ((x) << 12) x 57 drivers/pci/controller/dwc/pci-meson.c #define IS_SMLH_LINK_UP(x) ((x) & (1 << 6)) x 58 drivers/pci/controller/dwc/pci-meson.c #define IS_RDLH_LINK_UP(x) ((x) & (1 << 16)) x 59 drivers/pci/controller/dwc/pci-meson.c #define IS_LTSSM_UP(x) ((((x) >> 10) & 0x1f) == 0x11) x 62 drivers/pci/controller/dwc/pci-meson.c #define PM_CURRENT_STATE(x) (((x) >> 7) & 0x1) x 146 drivers/pci/controller/dwc/pcie-al.c #define PCIE_ECAM_DEVFN(x) (((x) & 0xff) << 12) x 148 drivers/pci/controller/dwc/pcie-al.c #define to_al_pcie(x) dev_get_drvdata((x)->dev) x 72 drivers/pci/controller/dwc/pcie-armada8k.c #define to_armada8k_pcie(x) dev_get_drvdata((x)->dev) x 25 drivers/pci/controller/dwc/pcie-artpec6.c #define to_artpec6_pcie(x) dev_get_drvdata((x)->dev) x 52 drivers/pci/controller/dwc/pcie-artpec6.c #define ACK_N_FTS(x) (((x) << 8) & ACK_N_FTS_MASK) x 55 drivers/pci/controller/dwc/pcie-artpec6.c #define FAST_TRAINING_SEQ(x) (((x) << 0) & FAST_TRAINING_SEQ_MASK) x 81 drivers/pci/controller/dwc/pcie-designware.h #define PCIE_ATU_BUS(x) FIELD_PREP(GENMASK(31, 24), x) x 82 drivers/pci/controller/dwc/pcie-designware.h #define PCIE_ATU_DEV(x) FIELD_PREP(GENMASK(23, 19), x) x 83 drivers/pci/controller/dwc/pcie-designware.h #define PCIE_ATU_FUNC(x) FIELD_PREP(GENMASK(18, 16), x) x 129 drivers/pci/controller/dwc/pcie-hisi.c #define to_hisi_pcie(x) dev_get_drvdata((x)->dev) x 26 drivers/pci/controller/dwc/pcie-histb.c #define to_histb_pcie(x) dev_get_drvdata((x)->dev) x 29 drivers/pci/controller/dwc/pcie-kirin.c #define to_kirin_pcie(x) dev_get_drvdata((x)->dev) x 171 drivers/pci/controller/dwc/pcie-qcom.c #define to_qcom_pcie(x) dev_get_drvdata((x)->dev) x 70 drivers/pci/controller/dwc/pcie-spear13xx.c #define to_spear13xx_pcie(x) dev_get_drvdata((x)->dev) x 69 drivers/pci/controller/dwc/pcie-uniphier.c #define to_uniphier_pcie(x) dev_get_drvdata((x)->dev) x 152 drivers/pci/controller/pci-tegra.c #define AFI_PCIE_CONFIG_PCIE_DISABLE(x) (1 << ((x) + 1)) x 165 drivers/pci/controller/pci-tegra.c #define AFI_PCIE_CONFIG_PCIE_CLKREQ_GPIO(x) (1 << ((x) + 29)) x 41 drivers/pci/controller/pcie-mediatek.c #define PCIE_PORT_INT_EN(x) BIT(20 + (x)) x 42 drivers/pci/controller/pcie-mediatek.c #define PCIE_PORT_PERST(x) BIT(1 + (x)) x 61 drivers/pci/controller/pcie-mediatek.c #define PCIE_FTS_NUM_L0(x) ((x) & 0xff << 8) x 65 drivers/pci/controller/pcie-mediatek.c #define PCIE_FC_CREDIT_VAL(x) ((x) << 16) x 69 drivers/pci/controller/pcie-mediatek.c #define PCIE_CSR_LTSSM_EN(x) BIT(0 + (x) * 8) x 70 drivers/pci/controller/pcie-mediatek.c #define PCIE_CSR_ASPM_L1_EN(x) BIT(1 + (x) * 8) x 91 drivers/pci/controller/pcie-mediatek.c #define AHB2PCIE_SIZE(x) ((x) & GENMASK(4, 0)) x 62 drivers/pci/controller/pcie-rcar.c #define PCIEPRAR(x) (0x02080 + ((x) * 0x4)) x 65 drivers/pci/controller/pcie-rcar.c #define PCIELAR(x) (0x02200 + ((x) * 0x20)) x 66 drivers/pci/controller/pcie-rcar.c #define PCIELAMR(x) (0x02208 + ((x) * 0x20)) x 72 drivers/pci/controller/pcie-rcar.c #define PCIEPALR(x) (0x03400 + ((x) * 0x20)) x 73 drivers/pci/controller/pcie-rcar.c #define PCIEPAUR(x) (0x03404 + ((x) * 0x20)) x 74 drivers/pci/controller/pcie-rcar.c #define PCIEPAMR(x) (0x03408 + ((x) * 0x20)) x 75 drivers/pci/controller/pcie-rcar.c #define PCIEPTCTLR(x) (0x0340c + ((x) * 0x20)) x 80 drivers/pci/controller/pcie-rcar.c #define PCICONF(x) (0x010000 + ((x) * 0x4)) x 81 drivers/pci/controller/pcie-rcar.c #define PMCAP(x) (0x010040 + ((x) * 0x4)) x 82 drivers/pci/controller/pcie-rcar.c #define EXPCAP(x) (0x010070 + ((x) * 0x4)) x 83 drivers/pci/controller/pcie-rcar.c #define VCCAP(x) (0x010100 + ((x) * 0x4)) x 122 drivers/pci/controller/pcie-rcar.c #define RCONF(x) (PCICONF(0) + (x)) x 123 drivers/pci/controller/pcie-rcar.c #define RPMCAP(x) (PMCAP(0) + (x)) x 124 drivers/pci/controller/pcie-rcar.c #define REXPCAP(x) (EXPCAP(0) + (x)) x 125 drivers/pci/controller/pcie-rcar.c #define RVCCAP(x) (VCCAP(0) + (x)) x 24 drivers/pci/controller/pcie-rockchip.h #define ENCODE_LANES(x) ((((x) >> 1) & 3) << 4) x 35 drivers/pci/controller/pcie-rockchip.h #define PCIE_CLIENT_CONF_LANE_NUM(x) HIWORD_UPDATE(0x0030, ENCODE_LANES(x)) x 92 drivers/pci/controller/pcie-rockchip.h #define PCIE_CORE_TXCREDIT_CFG1_MUI_ENCODE(x) \ x 93 drivers/pci/controller/pcie-rockchip.h (((x) >> 3) << PCIE_CORE_TXCREDIT_CFG1_MUI_SHIFT) x 181 drivers/pci/controller/pcie-rockchip.h #define PCIE_ECAM_BUS(x) (((x) & 0xff) << 20) x 182 drivers/pci/controller/pcie-rockchip.h #define PCIE_ECAM_DEV(x) (((x) & 0x1f) << 15) x 183 drivers/pci/controller/pcie-rockchip.h #define PCIE_ECAM_FUNC(x) (((x) & 0x7) << 12) x 184 drivers/pci/controller/pcie-rockchip.h #define PCIE_ECAM_REG(x) (((x) & 0xfff) << 0) x 188 drivers/pci/controller/pcie-rockchip.h #define PCIE_LINK_IS_L2(x) \ x 189 drivers/pci/controller/pcie-rockchip.h (((x) & PCIE_CLIENT_DEBUG_LTSSM_MASK) == PCIE_CLIENT_DEBUG_LTSSM_L2) x 190 drivers/pci/controller/pcie-rockchip.h #define PCIE_LINK_UP(x) \ x 191 drivers/pci/controller/pcie-rockchip.h (((x) & PCIE_CLIENT_LINK_STATUS_MASK) == PCIE_CLIENT_LINK_STATUS_UP) x 192 drivers/pci/controller/pcie-rockchip.h #define PCIE_LINK_IS_GEN2(x) \ x 193 drivers/pci/controller/pcie-rockchip.h (((x) & PCIE_CORE_PL_CONF_SPEED_MASK) == PCIE_CORE_PL_CONF_SPEED_5G) x 848 drivers/pci/hotplug/pciehp_hpc.c #define FLAG(x, y) (((x) & (y)) ? '+' : '-') x 159 drivers/pci/msi.c static inline __attribute_const__ u32 msi_mask(unsigned x) x 162 drivers/pci/msi.c if (x >= 5) x 164 drivers/pci/msi.c return (1 << (1 << x)) - 1; x 285 drivers/pci/pcie/dpc.c #define FLAG(x, y) (((x) & (y)) ? '+' : '-') x 69 drivers/pcmcia/db1xxx_ss.c #define to_db1x_socket(x) container_of(x, struct db1x_pcmcia_sock, socket) x 9 drivers/pcmcia/i82092aa.h #define enter(x) printk("Enter: %s, %s line %i\n",x,__FILE__,__LINE__) x 10 drivers/pcmcia/i82092aa.h #define leave(x) printk("Leave: %s, %s line %i\n",x,__FILE__,__LINE__) x 13 drivers/pcmcia/i82092aa.h #define enter(x) do {} while (0) x 14 drivers/pcmcia/i82092aa.h #define leave(x) do {} while (0) x 1154 drivers/pcmcia/i82365.c #define LOCKED(x) do { \ x 1158 drivers/pcmcia/i82365.c retval = x; \ x 81 drivers/pcmcia/soc_common.c #define to_soc_pcmcia_socket(x) \ x 82 drivers/pcmcia/soc_common.c container_of(x, struct soc_pcmcia_socket, socket) x 121 drivers/pcmcia/tcic.c #define TCIC_IRQ(x) ((x) ? (((x) == 11) ? 1 : (x)) : 15) x 134 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_EN(x) (0x40 << (x)) x 135 drivers/pcmcia/vrc4173_cardu.h #define MEM_WIN_EN(x) (0x01 << (x)) x 138 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_CNT_MASK(x) (0x03 << ((x) << 2)) x 139 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_DATA_AUTOSZ(x) (0x02 << ((x) << 2)) x 140 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_DATA_16BIT(x) (0x01 << ((x) << 2)) x 142 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_SA(x) (0x008 + ((x) << 2)) x 143 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_EA(x) (0x00a + ((x) << 2)) x 145 drivers/pcmcia/vrc4173_cardu.h #define MEM_WIN_SA(x) (0x010 + ((x) << 3)) x 148 drivers/pcmcia/vrc4173_cardu.h #define MEM_WIN_EA(x) (0x012 + ((x) << 3)) x 150 drivers/pcmcia/vrc4173_cardu.h #define MEM_WIN_OA(x) (0x014 + ((x) << 3)) x 164 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_OAL(x) (0x036 + ((x) << 1)) x 165 drivers/pcmcia/vrc4173_cardu.h #define IO_WIN_OAH(x) (0x037 + ((x) << 1)) x 167 drivers/pcmcia/vrc4173_cardu.h #define MEM_WIN_SAU(x) (0x040 + (x)) x 172 drivers/pcmcia/vrc4173_cardu.h #define MEM_SETUP_TIM(x) (0x084 + ((x) << 2)) x 173 drivers/pcmcia/vrc4173_cardu.h #define MEM_CMD_TIM(x) (0x085 + ((x) << 2)) x 174 drivers/pcmcia/vrc4173_cardu.h #define MEM_HOLD_TIM(x) (0x086 + ((x) << 2)) x 175 drivers/pcmcia/vrc4173_cardu.h #define TIM_CLOCKS(x) ((x) - 1) x 179 drivers/pcmcia/vrc4173_cardu.h #define MEM_WIN_TIMSEL1(x) (0x03 << (((x) & 3) << 1)) x 67 drivers/pcmcia/xxs1500_ss.c #define to_xxs_socket(x) container_of(x, struct xxs1500_pcmcia_sock, socket) x 58 drivers/pcmcia/yenta_socket.c #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args) x 29 drivers/perf/xgene_pmu.c #define CSW_CSWCR_MCB0_ROUTING(x) (((x) & 0x0C) >> 2) x 30 drivers/perf/xgene_pmu.c #define CSW_CSWCR_MCB1_ROUTING(x) (((x) & 0x30) >> 4) x 756 drivers/phy/broadcom/phy-brcm-usb-init.c unsigned int x; x 761 drivers/phy/broadcom/phy-brcm-usb-init.c for (x = 0; id_to_type_table[x].id; x++) { x 762 drivers/phy/broadcom/phy-brcm-usb-init.c if (family == id_to_type_table[x].id) x 763 drivers/phy/broadcom/phy-brcm-usb-init.c return id_to_type_table[x].type; x 764 drivers/phy/broadcom/phy-brcm-usb-init.c if (family_no_major == (id_to_type_table[x].id & 0xffffff00)) x 765 drivers/phy/broadcom/phy-brcm-usb-init.c if (family > id_to_type_table[x].id && x 766 drivers/phy/broadcom/phy-brcm-usb-init.c last_family < id_to_type_table[x].id) { x 767 drivers/phy/broadcom/phy-brcm-usb-init.c last_family = id_to_type_table[x].id; x 768 drivers/phy/broadcom/phy-brcm-usb-init.c last_type = id_to_type_table[x].type; x 774 drivers/phy/broadcom/phy-brcm-usb-init.c return id_to_type_table[x].type; x 152 drivers/phy/broadcom/phy-brcm-usb.c int x; x 155 drivers/phy/broadcom/phy-brcm-usb.c for (x = 0; x < count; x++) { x 156 drivers/phy/broadcom/phy-brcm-usb.c if (sysfs_streq(name, table[x].name)) { x 157 drivers/phy/broadcom/phy-brcm-usb.c *value = x; x 34 drivers/phy/cadence/cdns-dphy.c #define DPHY_CMN_PWM_DIV(x) ((x) << 20) x 35 drivers/phy/cadence/cdns-dphy.c #define DPHY_CMN_PWM_LOW(x) ((x) << 10) x 36 drivers/phy/cadence/cdns-dphy.c #define DPHY_CMN_PWM_HIGH(x) (x) x 44 drivers/phy/cadence/cdns-dphy.c #define DPHY_CMN_IPDIV(x) ((x) << 1) x 46 drivers/phy/cadence/cdns-dphy.c #define DPHY_CMN_OPDIV(x) ((x) << 7) x 50 drivers/phy/cadence/cdns-dphy.c #define DPHY_PSM_CLK_DIV(x) ((x) << 1) x 36 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c #define MBPS(x) ((x) * 1000000) x 46 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c #define CM(x) ( \ x 47 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c ((x) < 32) ? 0xe0 | ((x) - 16) : \ x 48 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c ((x) < 64) ? 0xc0 | ((x) - 32) : \ x 49 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c ((x) < 128) ? 0x80 | ((x) - 64) : \ x 50 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c ((x) - 128)) x 51 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c #define CN(x) (((x) == 1) ? 0x1f : (((CN_BUF) >> ((x) - 1)) & 0x1f)) x 52 drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c #define CO(x) ((CO_BUF) >> (8 - (x)) & 0x03) x 19 drivers/phy/marvell/phy-armada38x-comphy.c #define COMPHY_CFG1_GEN_TX(x) ((x) << 26) x 21 drivers/phy/marvell/phy-armada38x-comphy.c #define COMPHY_CFG1_GEN_RX(x) ((x) << 22) x 25 drivers/phy/marvell/phy-berlin-usb.c #define CLK_REF_DIV(x) ((x) << 4) x 26 drivers/phy/marvell/phy-berlin-usb.c #define FEEDBACK_CLK_DIV(x) ((x) << 8) x 44 drivers/phy/marvell/phy-berlin-usb.c #define IMPCAL_VTH_DIV(x) ((x) << 5) x 45 drivers/phy/marvell/phy-berlin-usb.c #define EXT_RS_RCAL_DIV(x) ((x) << 8) x 46 drivers/phy/marvell/phy-berlin-usb.c #define EXT_FS_RCAL_DIV(x) ((x) << 12) x 58 drivers/phy/marvell/phy-berlin-usb.c #define TX_OUT_AMP(x) ((x) << 9) x 61 drivers/phy/marvell/phy-berlin-usb.c #define TX_CHAN_CTRL_REG(x) ((x) << 0) x 62 drivers/phy/marvell/phy-berlin-usb.c #define DRV_SLEWRATE(x) ((x) << 4) x 67 drivers/phy/marvell/phy-berlin-usb.c #define FS_DRV_EN_MASK(x) ((x) << 8) x 68 drivers/phy/marvell/phy-berlin-usb.c #define HS_DRV_EN_MASK(x) ((x) << 12) x 85 drivers/phy/marvell/phy-berlin-usb.c #define SQ_THRESHOLD(x) ((x) << 8) x 86 drivers/phy/marvell/phy-berlin-usb.c #define LPF_COEF(x) ((x) << 12) x 95 drivers/phy/marvell/phy-berlin-usb.c #define V2I_VCO_RATIO(x) ((x) << 7) x 99 drivers/phy/marvell/phy-berlin-usb.c #define ANA_TEST_DC_CTRL(x) ((x) << 12) x 47 drivers/phy/mediatek/phy-mtk-tphy.c #define PA1_RG_VRT_SEL_VAL(x) ((0x7 & (x)) << 12) x 49 drivers/phy/mediatek/phy-mtk-tphy.c #define PA1_RG_TERM_SEL_VAL(x) ((0x7 & (x)) << 8) x 57 drivers/phy/mediatek/phy-mtk-tphy.c #define PA5_RG_U2_HSTX_SRCTRL_VAL(x) ((0x7 & (x)) << 12) x 64 drivers/phy/mediatek/phy-mtk-tphy.c #define PA6_RG_U2_SQTH_VAL(x) (0xf & (x)) x 83 drivers/phy/mediatek/phy-mtk-tphy.c #define P2C_RG_DATAIN_VAL(x) ((0xf & (x)) << 10) x 87 drivers/phy/mediatek/phy-mtk-tphy.c #define P2C_RG_XCVRSEL_VAL(x) ((0x3 & (x)) << 4) x 118 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_CLKDRV_OFF_VAL(x) ((0x3 & (x)) << 2) x 122 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_CLKDRV_AMP_VAL(x) ((0x7 & (x)) << 29) x 126 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_TX_EIDLE_CM_VAL(x) ((0xf & (x)) << 28) x 130 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_RX_DAC_MUX_VAL(x) ((0x1f & (x)) << 1) x 134 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_XTAL_EXT_PE2H_VAL(x) ((0x3 & (x)) << 16) x 136 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_XTAL_EXT_PE1H_VAL(x) ((0x3 & (x)) << 12) x 138 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_XTAL_EXT_EN_U3_VAL(x) ((0x3 & (x)) << 10) x 143 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_PLL_BC_PE2H_VAL(x) ((0x3 & (x)) << 6) x 147 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_PLL_BR_PE2H_VAL(x) ((0x3 & (x)) << 28) x 149 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_PLL_IC_PE2H_VAL(x) ((0xf & (x)) << 12) x 153 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_PLL_IR_PE2H_VAL(x) ((0xf & (x)) << 16) x 157 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_PLL_BP_PE2H_VAL(x) ((0xf & (x)) << 16) x 161 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_PLL_DELTA1_PE2H_VAL(x) ((0xffff & (x)) << 16) x 165 drivers/phy/mediatek/phy-mtk-tphy.c #define P3A_RG_PLL_DELTA_PE2H_VAL(x) (0xffff & (x)) x 169 drivers/phy/mediatek/phy-mtk-tphy.c #define P3D_RG_FWAKE_TH_VAL(x) ((0x3f & (x)) << 16) x 173 drivers/phy/mediatek/phy-mtk-tphy.c #define P3D_RG_CDR_BIR_LTD1_VAL(x) ((0x1f & (x)) << 24) x 175 drivers/phy/mediatek/phy-mtk-tphy.c #define P3D_RG_CDR_BIR_LTD0_VAL(x) ((0x1f & (x)) << 8) x 179 drivers/phy/mediatek/phy-mtk-tphy.c #define P3D_RG_RXDET_STB2_SET_VAL(x) ((0x1ff & (x)) << 9) x 183 drivers/phy/mediatek/phy-mtk-tphy.c #define P3D_RG_RXDET_STB2_SET_P3_VAL(x) (0x1ff & (x)) x 191 drivers/phy/mediatek/phy-mtk-tphy.c #define P2F_RG_MONCLK_SEL_VAL(x) ((0x3 & (x)) << 26) x 194 drivers/phy/mediatek/phy-mtk-tphy.c #define P2F_RG_CYCLECNT_VAL(x) ((P2F_RG_CYCLECNT) & (x)) x 211 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BICLTD1_GEN1_VAL(x) ((0xf & (x)) << 20) x 213 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BICLTD0_GEN1_VAL(x) ((0xf & (x)) << 8) x 218 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_LOCK_CNT_SEL_VAL(x) ((0x3 & (x)) << 4) x 223 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_TG_MAX_VAL(x) ((0x1f & (x)) << 16) x 226 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_T2_MAX_VAL(x) ((0x3f & (x)) << 8) x 229 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_TG_MIN_VAL(x) ((0x7 & (x)) << 5) x 232 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_T2_MIN_VAL(x) (0x1f & (x)) x 237 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_IDRV_0DB_GEN1_VAL(x) ((0x3f & (x)) << 8) x 241 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BICLTR_GEN1_VAL(x) ((0xf & (x)) << 20) x 244 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BR_GEN2_VAL(x) ((0x7 & (x)) << 8) x 249 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BC_GEN1_VAL(x) ((0x1f & (x)) << 24) x 251 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BIRLTR_GEN1_VAL(x) (0x1f & (x)) x 256 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_EQ_DLEQ_LFI_GEN1_VAL(x) ((0xf & (x)) << 8) x 260 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BIRLTD0_GEN1_VAL(x) ((0x1f & (x)) << 16) x 264 drivers/phy/mediatek/phy-mtk-tphy.c #define RG_CDR_BIRLTD0_GEN3_VAL(x) (0x1f & (x)) x 39 drivers/phy/mediatek/phy-mtk-xsphy.c #define P2F_RG_CYCLECNT_VAL(x) ((P2F_RG_CYCLECNT) & (x)) x 52 drivers/phy/mediatek/phy-mtk-xsphy.c #define P2A1_RG_INTR_CAL_VAL(x) ((0x1f & (x)) << 19) x 54 drivers/phy/mediatek/phy-mtk-xsphy.c #define P2A1_RG_VRT_SEL_VAL(x) ((0x7 & (x)) << 12) x 56 drivers/phy/mediatek/phy-mtk-xsphy.c #define P2A1_RG_TERM_SEL_VAL(x) ((0x7 & (x)) << 8) x 61 drivers/phy/mediatek/phy-mtk-xsphy.c #define P2A5_RG_HSTX_SRCTRL_VAL(x) ((0x7 & (x)) << 12) x 76 drivers/phy/mediatek/phy-mtk-xsphy.c #define RG_XTP_GLB_BIAS_INTR_CTRL_VAL(x) ((0x3f & (x)) << 16) x 80 drivers/phy/mediatek/phy-mtk-xsphy.c #define RG_XTP_LN0_TX_IMPSEL_VAL(x) (0x1f & (x)) x 84 drivers/phy/mediatek/phy-mtk-xsphy.c #define RG_XTP_LN0_RX_IMPSEL_VAL(x) (0x1f & (x)) x 108 drivers/phy/motorola/phy-mapphone-mdm6600.c static int phy_mdm6600_init(struct phy *x) x 110 drivers/phy/motorola/phy-mapphone-mdm6600.c struct phy_mdm6600 *ddata = phy_get_drvdata(x); x 121 drivers/phy/motorola/phy-mapphone-mdm6600.c static int phy_mdm6600_power_on(struct phy *x) x 123 drivers/phy/motorola/phy-mapphone-mdm6600.c struct phy_mdm6600 *ddata = phy_get_drvdata(x); x 138 drivers/phy/motorola/phy-mapphone-mdm6600.c if (pm_runtime_enabled(&x->dev)) x 139 drivers/phy/motorola/phy-mapphone-mdm6600.c phy_pm_runtime_put(x); x 144 drivers/phy/motorola/phy-mapphone-mdm6600.c static int phy_mdm6600_power_off(struct phy *x) x 146 drivers/phy/motorola/phy-mapphone-mdm6600.c struct phy_mdm6600 *ddata = phy_get_drvdata(x); x 154 drivers/phy/motorola/phy-mapphone-mdm6600.c if (pm_runtime_enabled(&x->dev)) { x 155 drivers/phy/motorola/phy-mapphone-mdm6600.c error = phy_pm_runtime_get(x); x 27 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM0_P0_TX_PREEMPH_GEN3(x) __set(x, 17, 12) x 29 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM0_P0_TX_PREEMPH_GEN2(x) __set(x, 11, 6) x 31 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM0_P0_TX_PREEMPH_GEN1(x) __set(x, 5, 0) x 35 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM1_RESERVED_BITS31_21(x) __set(x, 31, 21) x 36 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM1_P0_TX_AMPLITUDE_GEN3(x) __set(x, 20, 14) x 38 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM1_P0_TX_AMPLITUDE_GEN2(x) __set(x, 13, 7) x 40 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM1_P0_TX_AMPLITUDE_GEN1(x) __set(x, 6, 0) x 44 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define SATA_PHY_P0_PARAM2_RX_EQ(x) __set(x, 20, 18) x 12 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h #define COM_OFF(x) (0x000 + x) x 13 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h #define PHY_OFF(x) (0xC00 + x) x 14 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h #define TX_OFF(n, x) (0x400 + (0x400 * n) + x) x 15 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h #define RX_OFF(n, x) (0x600 + (0x400 * n) + x) x 13 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h #define COM_OFF(x) (0x000 + x) x 14 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h #define PHY_OFF(x) (0xC00 + x) x 15 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h #define TX_OFF(n, x) (0x400 + (0x400 * n) + x) x 16 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h #define RX_OFF(n, x) (0x600 + (0x400 * n) + x) x 71 drivers/phy/rockchip/phy-rockchip-emmc.c #define PHYCTRL_IS_CALDONE(x) \ x 72 drivers/phy/rockchip/phy-rockchip-emmc.c ((((x) >> PHYCTRL_CALDONE_SHIFT) & \ x 74 drivers/phy/rockchip/phy-rockchip-emmc.c #define PHYCTRL_IS_DLLRDY(x) \ x 75 drivers/phy/rockchip/phy-rockchip-emmc.c ((((x) >> PHYCTRL_DLLRDY_SHIFT) & \ x 24 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l))) x 37 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_AUTO_TERM_RES_CAL_SPEED_14_8(x) UPDATE(x, 6, 0) x 39 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_AUTO_TERM_RES_CAL_SPEED_7_0(x) UPDATE(x, 7, 0) x 54 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_FB_DIV_8(x) UPDATE((x) >> 8, 7, 7) x 56 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PCLK_VCO_DIV_5(x) UPDATE(x, 5, 5) x 58 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_PRE_DIV(x) UPDATE(x, 4, 0) x 60 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0) x 64 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_PCLK_DIV_B(x) UPDATE(x, 6, 5) x 66 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_PCLK_DIV_A(x) UPDATE(x, 4, 0) x 69 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_PCLK_DIV_C(x) UPDATE(x, 6, 5) x 71 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_PCLK_DIV_D(x) UPDATE(x, 4, 0) x 74 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_TMDSCLK_DIV_C(x) UPDATE(x, 5, 4) x 76 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_TMDSCLK_DIV_A(x) UPDATE(x, 3, 2) x 78 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_PRE_PLL_TMDSCLK_DIV_B(x) UPDATE(x, 1, 0) x 84 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_POST_PLL_PRE_DIV(x) UPDATE(x, 4, 0) x 86 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_POST_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0) x 89 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_POST_PLL_FB_DIV_8(x) UPDATE((x) >> 8, 7, 7) x 91 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_POST_PLL_POST_DIV(x) UPDATE(x, 5, 4) x 96 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_CLK_CH_TA(x) UPDATE(x, 7, 6) x 97 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH2_TA(x) UPDATE(x, 5, 4) x 98 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH1_TA(x) UPDATE(x, 3, 2) x 99 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH0_TA(x) UPDATE(x, 1, 0) x 102 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH2_PRE_EMPHASIS(x) UPDATE(x, 5, 4) x 104 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH1_PRE_EMPHASIS(x) UPDATE(x, 3, 2) x 106 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH0_PRE_EMPHASIS(x) UPDATE(x, 1, 0) x 108 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_CLK_CH_OUTPUT_SWING(x) UPDATE(x, 7, 4) x 109 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH2_OUTPUT_SWING(x) UPDATE(x, 3, 0) x 111 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH1_OUTPUT_SWING(x) UPDATE(x, 7, 4) x 112 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3228_TMDS_DATA_CH0_OUTPUT_SWING(x) UPDATE(x, 3, 0) x 123 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_INT_TMDS_CLK(x) UPDATE(x, 7, 4) x 124 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_INT_TMDS_D2(x) UPDATE(x, 3, 0) x 126 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_INT_TMDS_D1(x) UPDATE(x, 7, 4) x 127 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_INT_TMDS_D0(x) UPDATE(x, 3, 0) x 135 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PCLK_VCO_DIV_5(x) UPDATE(x, 1, 1) x 139 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_PRE_DIV(x) UPDATE(x, 5, 0) x 146 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_FB_DIV_11_8(x) UPDATE((x) >> 8, 3, 0) x 148 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0) x 151 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_TMDSCLK_DIV_C(x) UPDATE(x, 1, 0) x 153 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_TMDSCLK_DIV_B(x) UPDATE(x, 3, 2) x 155 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_TMDSCLK_DIV_A(x) UPDATE(x, 5, 4) x 159 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_PCLK_DIV_B(x) UPDATE(x, 6, 5) x 161 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_PCLK_DIV_A(x) UPDATE(x, 4, 0) x 165 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_PCLK_DIV_C(x) UPDATE(x, 6, 5) x 167 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_PCLK_DIV_D(x) UPDATE(x, 4, 0) x 175 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_POST_PLL_FB_DIV_8(x) UPDATE((x) >> 8, 7, 7) x 176 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_POST_PLL_PRE_DIV(x) UPDATE(x, 4, 0) x 178 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_POST_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0) x 199 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_TERM_RESISTOR_CALIB_SPEED_14_8(x) UPDATE((x) >> 8, 6, 0) x 201 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(x) UPDATE(x, 7, 0) x 222 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_FRAC_DIV_23_16(x) UPDATE((x) >> 16, 7, 0) x 224 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_FRAC_DIV_15_8(x) UPDATE((x) >> 8, 7, 0) x 226 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c #define RK3328_PRE_PLL_FRAC_DIV_7_0(x) UPDATE(x, 7, 0) x 123 drivers/phy/rockchip/phy-rockchip-typec.c #define CMN_CALIB_CODE(x) \ x 124 drivers/phy/rockchip/phy-rockchip-typec.c sign_extend32((x) >> CMN_CALIB_CODE_OFFSET, CMN_CALIB_CODE_WIDTH) x 127 drivers/phy/rockchip/phy-rockchip-typec.c #define CMN_CALIB_CODE_POS(x) \ x 128 drivers/phy/rockchip/phy-rockchip-typec.c (((x) >> CMN_CALIB_CODE_OFFSET) & CMN_CALIB_CODE_POS_MASK) x 53 drivers/phy/st/phy-spear1310-miphy.c #define SPEAR1310_PCIE_CFG_MASK(x) ((0xF << (x * 4)) | BIT((x + 29))) x 54 drivers/phy/st/phy-spear1310-miphy.c #define SPEAR1310_SATA_CFG_MASK(x) ((0xF << (x * 4 + 16)) | \ x 55 drivers/phy/st/phy-spear1310-miphy.c BIT((x + 29))) x 56 drivers/phy/st/phy-spear1310-miphy.c #define SPEAR1310_PCIE_CFG_VAL(x) \ x 57 drivers/phy/st/phy-spear1310-miphy.c (SPEAR1310_PCIE_SATA##x##_SEL_PCIE | \ x 58 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_PCIE##x##_CFG_AUX_CLK_EN | \ x 59 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_PCIE##x##_CFG_CORE_CLK_EN | \ x 60 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_PCIE##x##_CFG_POWERUP_RESET | \ x 61 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_PCIE##x##_CFG_DEVICE_PRESENT) x 62 drivers/phy/st/phy-spear1310-miphy.c #define SPEAR1310_SATA_CFG_VAL(x) \ x 63 drivers/phy/st/phy-spear1310-miphy.c (SPEAR1310_PCIE_SATA##x##_SEL_SATA | \ x 64 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_SATA##x##_CFG_PM_CLK_EN | \ x 65 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_SATA##x##_CFG_POWERUP_RESET | \ x 66 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_SATA##x##_CFG_RX_CLK_EN | \ x 67 drivers/phy/st/phy-spear1310-miphy.c SPEAR1310_SATA##x##_CFG_TX_CLK_EN) x 72 drivers/phy/st/phy-spear1310-miphy.c #define SPEAR1310_MIPHY_DUAL_PLL_RATIO_TOP(x) (x << 16) x 75 drivers/phy/st/phy-spear1310-miphy.c #define SPEAR1310_MIPHY_SINGLE_PLL_RATIO_TOP(x) (x << 0) x 62 drivers/phy/st/phy-spear1340-miphy.c #define SPEAR1340_MIPHY_PLL_RATIO_TOP(x) (x << 0) x 42 drivers/phy/tegra/phy-tegra194-p2u.c static int tegra_p2u_power_on(struct phy *x) x 44 drivers/phy/tegra/phy-tegra194-p2u.c struct tegra_p2u *phy = phy_get_drvdata(x); x 21 drivers/phy/tegra/xusb-tegra124.c #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? 15 : 0) x 31 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT(x) ((x) * 4) x 39 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(x) (1 << (((x) * 4) + 3)) x 40 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_SHIFT(x) ((x) * 4) x 41 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(x) (0x7 << ((x) * 4)) x 42 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(x, v) (((v) & 0x7) << ((x) * 4)) x 49 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN(x) (1 << (18 + (x) * 4)) x 50 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY(x) \ x 51 drivers/phy/tegra/xusb-tegra124.c (1 << (17 + (x) * 4)) x 52 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(x) (1 << (16 + (x) * 4)) x 64 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(x) (0x058 + (x) * 4) x 79 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(x) (0x068 + (x) * 4) x 86 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL2(x) ((x) < 2 ? 0x078 + (x) * 4 : \ x 87 drivers/phy/tegra/xusb-tegra124.c 0x0f8 + (x) * 4) x 92 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL5(x) ((x) < 2 ? 0x090 + (x) * 4 : \ x 93 drivers/phy/tegra/xusb-tegra124.c 0x11c + (x) * 4) x 96 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL6(x) ((x) < 2 ? 0x098 + (x) * 4 : \ x 97 drivers/phy/tegra/xusb-tegra124.c 0x128 + (x) * 4) x 110 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_USB2_OTG_PADX_CTL0(x) (0x0a0 + (x) * 4) x 116 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_VAL(x) ((x) ? 0x0 : 0x3) x 123 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_USB2_OTG_PADX_CTL1(x) (0x0ac + (x) * 4) x 140 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_HSIC_PADX_CTL0(x) (0x0c0 + (x) * 4) x 150 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_HSIC_PADX_CTL1(x) (0x0c8 + (x) * 4) x 161 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_HSIC_PADX_CTL2(x) (0x0d0 + (x) * 4) x 171 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(x) (1 << (1 + (x))) x 172 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(x) (1 << (6 + (x))) x 21 drivers/phy/tegra/xusb-tegra186.c #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0) x 33 drivers/phy/tegra/xusb-tegra186.c #define USB2_PORT_SHIFT(x) ((x) * 2) x 36 drivers/phy/tegra/xusb-tegra186.c #define HSIC_PORT_SHIFT(x) ((x) + 20) x 42 drivers/phy/tegra/xusb-tegra186.c #define PORTX_CAP_SHIFT(x) ((x) * 4) x 50 drivers/phy/tegra/xusb-tegra186.c #define USB2_PORT_WAKE_INTERRUPT_ENABLE(x) BIT(x) x 51 drivers/phy/tegra/xusb-tegra186.c #define USB2_PORT_WAKEUP_EVENT(x) BIT((x) + 7) x 52 drivers/phy/tegra/xusb-tegra186.c #define SS_PORT_WAKE_INTERRUPT_ENABLE(x) BIT((x) + 14) x 53 drivers/phy/tegra/xusb-tegra186.c #define SS_PORT_WAKEUP_EVENT(x) BIT((x) + 21) x 54 drivers/phy/tegra/xusb-tegra186.c #define USB2_HSIC_PORT_WAKE_INTERRUPT_ENABLE(x) BIT((x) + 28) x 55 drivers/phy/tegra/xusb-tegra186.c #define USB2_HSIC_PORT_WAKEUP_EVENT(x) BIT((x) + 30) x 63 drivers/phy/tegra/xusb-tegra186.c #define SSPX_ELPG_CLAMP_EN(x) BIT(0 + (x) * 3) x 64 drivers/phy/tegra/xusb-tegra186.c #define SSPX_ELPG_CLAMP_EN_EARLY(x) BIT(1 + (x) * 3) x 65 drivers/phy/tegra/xusb-tegra186.c #define SSPX_ELPG_VCORE_DOWN(x) BIT(2 + (x) * 3) x 67 drivers/phy/tegra/xusb-tegra186.c #define XUSB_PADCTL_USB2_OTG_PADX_CTL0(x) (0x88 + (x) * 0x40) x 68 drivers/phy/tegra/xusb-tegra186.c #define HS_CURR_LEVEL(x) ((x) & 0x3f) x 75 drivers/phy/tegra/xusb-tegra186.c #define XUSB_PADCTL_USB2_OTG_PADX_CTL1(x) (0x8c + (x) * 0x40) x 77 drivers/phy/tegra/xusb-tegra186.c #define TERM_RANGE_ADJ(x) (((x) & 0xf) << 3) x 78 drivers/phy/tegra/xusb-tegra186.c #define RPD_CTRL(x) (((x) & 0x1f) << 26) x 82 drivers/phy/tegra/xusb-tegra186.c #define HS_SQUELCH_LEVEL(x) (((x) & 0x7) << 0) x 85 drivers/phy/tegra/xusb-tegra186.c #define USB2_TRK_START_TIMER(x) (((x) & 0x7f) << 12) x 86 drivers/phy/tegra/xusb-tegra186.c #define USB2_TRK_DONE_RESET_TIMER(x) (((x) & 0x7f) << 19) x 89 drivers/phy/tegra/xusb-tegra186.c #define XUSB_PADCTL_HSIC_PADX_CTL0(x) (0x300 + (x) * 0x20) x 102 drivers/phy/tegra/xusb-tegra186.c #define HSIC_TRK_START_TIMER(x) (((x) & 0x7f) << 5) x 103 drivers/phy/tegra/xusb-tegra186.c #define HSIC_TRK_DONE_RESET_TIMER(x) (((x) & 0x7f) << 12) x 108 drivers/phy/tegra/xusb-tegra186.c #define ID_OVERRIDE(x) (((x) & 0xf) << 18) x 24 drivers/phy/tegra/xusb-tegra210.c #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(x) \ x 25 drivers/phy/tegra/xusb-tegra210.c ((x) ? (11 + ((x) - 1) * 6) : 0) x 42 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_HOST(x) (0x1 << ((x) * 4)) x 43 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_MASK(x) (0x3 << ((x) * 4)) x 46 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(x) (1 << (((x) * 5) + 4)) x 47 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_SHIFT(x) ((x) * 5) x 48 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(x) (0x7 << ((x) * 5)) x 49 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(x, v) (((v) & 0x7) << ((x) * 5)) x 55 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_VCORE_DOWN(x) (1 << (2 + (x) * 3)) x 56 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN_EARLY(x) \ x 57 drivers/phy/tegra/xusb-tegra210.c (1 << (1 + (x) * 3)) x 58 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN(x) (1 << ((x) * 3)) x 61 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(x) (1 << (1 + (x))) x 62 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(x) (1 << (8 + (x))) x 64 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1(x) (0x084 + (x) * 0x40) x 69 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_USB2_OTG_PADX_CTL0(x) (0x088 + (x) * 0x40) x 76 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_USB2_OTG_PADX_CTL1(x) (0x08c + (x) * 0x40) x 103 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_HSIC_PADX_CTL0(x) (0x300 + (x) * 0x20) x 120 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_HSIC_PADX_CTL1(x) (0x304 + (x) * 0x20) x 124 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_HSIC_PADX_CTL2(x) (0x308 + (x) * 0x20) x 185 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_UPHY_MISC_PAD_PX_CTL1(x) (0x460 + (x) * 0x40) x 204 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL1(x) (0xa60 + (x) * 0x40) x 209 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL2(x) (0xa64 + (x) * 0x40) x 214 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL3(x) (0xa68 + (x) * 0x40) x 217 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL4(x) (0xa6c + (x) * 0x40) x 222 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL6(x) (0xa74 + (x) * 0x40) x 170 drivers/phy/ti/phy-am654-serdes.c static int serdes_am654_power_on(struct phy *x) x 172 drivers/phy/ti/phy-am654-serdes.c struct serdes_am654 *phy = phy_get_drvdata(x); x 193 drivers/phy/ti/phy-am654-serdes.c static int serdes_am654_power_off(struct phy *x) x 195 drivers/phy/ti/phy-am654-serdes.c struct serdes_am654 *phy = phy_get_drvdata(x); x 203 drivers/phy/ti/phy-am654-serdes.c static int serdes_am654_init(struct phy *x) x 205 drivers/phy/ti/phy-am654-serdes.c struct serdes_am654 *phy = phy_get_drvdata(x); x 223 drivers/phy/ti/phy-am654-serdes.c static int serdes_am654_reset(struct phy *x) x 225 drivers/phy/ti/phy-am654-serdes.c struct serdes_am654 *phy = phy_get_drvdata(x); x 241 drivers/phy/ti/phy-am654-serdes.c static void serdes_am654_release(struct phy *x) x 243 drivers/phy/ti/phy-am654-serdes.c struct serdes_am654 *phy = phy_get_drvdata(x); x 81 drivers/phy/ti/phy-dm816x-usb.c static int dm816x_usb_phy_init(struct phy *x) x 83 drivers/phy/ti/phy-dm816x-usb.c struct dm816x_usb_phy *phy = phy_get_drvdata(x); x 46 drivers/phy/ti/phy-omap-usb2.c struct usb_phy *x = usb_get_phy(USB_PHY_TYPE_USB2); x 48 drivers/phy/ti/phy-omap-usb2.c if (IS_ERR(x)) x 51 drivers/phy/ti/phy-omap-usb2.c phy = phy_to_omapusb(x); x 116 drivers/phy/ti/phy-omap-usb2.c static int omap_usb_power_off(struct phy *x) x 118 drivers/phy/ti/phy-omap-usb2.c struct omap_usb *phy = phy_get_drvdata(x); x 123 drivers/phy/ti/phy-omap-usb2.c static int omap_usb_power_on(struct phy *x) x 125 drivers/phy/ti/phy-omap-usb2.c struct omap_usb *phy = phy_get_drvdata(x); x 166 drivers/phy/ti/phy-omap-usb2.c static int omap_usb_init(struct phy *x) x 168 drivers/phy/ti/phy-omap-usb2.c struct omap_usb *phy = phy_get_drvdata(x); x 190 drivers/phy/ti/phy-omap-usb2.c static int omap_usb_exit(struct phy *x) x 192 drivers/phy/ti/phy-omap-usb2.c struct omap_usb *phy = phy_get_drvdata(x); x 319 drivers/phy/ti/phy-ti-pipe3.c static int ti_pipe3_power_off(struct phy *x) x 322 drivers/phy/ti/phy-ti-pipe3.c struct ti_pipe3 *phy = phy_get_drvdata(x); x 336 drivers/phy/ti/phy-ti-pipe3.c static int ti_pipe3_power_on(struct phy *x) x 342 drivers/phy/ti/phy-ti-pipe3.c struct ti_pipe3 *phy = phy_get_drvdata(x); x 497 drivers/phy/ti/phy-ti-pipe3.c static int ti_pipe3_init(struct phy *x) x 499 drivers/phy/ti/phy-ti-pipe3.c struct ti_pipe3 *phy = phy_get_drvdata(x); x 546 drivers/phy/ti/phy-ti-pipe3.c static int ti_pipe3_exit(struct phy *x) x 548 drivers/phy/ti/phy-ti-pipe3.c struct ti_pipe3 *phy = phy_get_drvdata(x); x 170 drivers/phy/ti/phy-twl4030-usb.c #define phy_to_twl(x) container_of((x), struct twl4030_usb, phy) x 578 drivers/pinctrl/aspeed/pinmux-aspeed.h #define stringify(x) #x x 579 drivers/pinctrl/aspeed/pinmux-aspeed.h #define istringify(x) stringify(x) x 61 drivers/pinctrl/mediatek/pinctrl-mtk-common.h #define SET_ADDR(x, y) (x + (y->devdata->port_align)) x 62 drivers/pinctrl/mediatek/pinctrl-mtk-common.h #define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1)) x 161 drivers/pinctrl/meson/pinctrl-meson.h #define MESON_PIN(x) PINCTRL_PIN(x, #x) x 75 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_NUM(x) ((x) & PIN_NUM_MASK) x 79 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT) x 87 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT) x 94 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT) x 107 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT) x 113 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT) x 119 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_SLPM_PULL(x) \ x 120 drivers/pinctrl/nomadik/pinctrl-nomadik.c (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT) x 130 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_SLPM_DIR(x) \ x 131 drivers/pinctrl/nomadik/pinctrl-nomadik.c (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT) x 137 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_SLPM_VAL(x) \ x 138 drivers/pinctrl/nomadik/pinctrl-nomadik.c (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT) x 144 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_SLPM_PDIS(x) \ x 145 drivers/pinctrl/nomadik/pinctrl-nomadik.c (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT) x 152 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT) x 158 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT) x 164 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT) x 1311 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define NMK_CONFIG_PIN(x, y) { .property = x, .config = y, } x 1312 drivers/pinctrl/nomadik/pinctrl-nomadik.c #define NMK_CONFIG_PIN_ARRAY(x, y) { .property = x, .choice = y, \ x 646 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c #define NPCM7XX_GRP(x) { .name = #x, .pins = x ## _pins, \ x 647 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c .npins = ARRAY_SIZE(x ## _pins) } x 910 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c #define DSLO(x) (((x) >> DRIVE_STRENGTH_LO_SHIFT) & 0xF) x 911 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c #define DSHI(x) (((x) >> DRIVE_STRENGTH_HI_SHIFT) & 0xF) x 27 drivers/pinctrl/pinctrl-falcon.c #define LTQ_PADC_MUX(x) (x * 0x4) x 48 drivers/pinctrl/pinctrl-falcon.c #define PORT(x) (x / PINS) x 49 drivers/pinctrl/pinctrl-falcon.c #define PORT_PIN(x) (x % PINS) x 48 drivers/pinctrl/pinctrl-ingenic.c #define REG_SET(x) ((x) + 0x4) x 49 drivers/pinctrl/pinctrl-ingenic.c #define REG_CLEAR(x) ((x) + 0x8) x 21 drivers/pinctrl/pinctrl-lantiq.h #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) x 28 drivers/pinctrl/pinctrl-xway.c #define PORT(x) (x / PINS) x 29 drivers/pinctrl/pinctrl-xway.c #define PORT_PIN(x) (x % PINS) x 36 drivers/pinctrl/samsung/pinctrl-exynos.h #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \ x 35 drivers/pinctrl/samsung/pinctrl-s3c64xx.c #define SVC_GROUP(x) ((x >> SVC_GROUP_SHIFT) & \ x 1489 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define FM(x) PINMUX_DATA(x##_MARK, 0), x 4750 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define F_(x, y) FN_##y x 4751 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define FM(x) FN_##x x 5027 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define F_(x, y) x, x 5028 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define FM(x) FN_##x, x 5212 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define F_(x, y) x, x 5213 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define FM(x) FN_##x, x 1549 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define FM(x) PINMUX_DATA(x##_MARK, 0), x 5095 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define F_(x, y) FN_##y x 5096 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define FM(x) FN_##x x 5372 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define F_(x, y) x, x 5373 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define FM(x) FN_##x, x 5567 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define F_(x, y) x, x 5568 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define FM(x) FN_##x, x 1552 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define FM(x) PINMUX_DATA(x##_MARK, 0), x 5063 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define F_(x, y) FN_##y x 5064 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define FM(x) FN_##x x 5340 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define F_(x, y) x, x 5341 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define FM(x) FN_##x, x 5535 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define F_(x, y) x, x 5536 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define FM(x) FN_##x, x 1557 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define FM(x) PINMUX_DATA(x##_MARK, 0), x 5303 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define F_(x, y) FN_##y x 5304 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define FM(x) FN_##x x 5580 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define F_(x, y) x, x 5581 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define FM(x) FN_##x, x 5775 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define F_(x, y) x, x 5776 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define FM(x) FN_##x, x 2053 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define F_(x, y) FN_##y x 2054 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define FM(x) FN_##x x 2262 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define F_(x, y) x, x 2263 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define FM(x) FN_##x, x 2357 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define F_(x, y) x, x 2358 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define FM(x) FN_##x, x 2475 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define F_(x, y) FN_##y x 2476 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define FM(x) FN_##x x 2684 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define F_(x, y) x, x 2685 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define FM(x) FN_##x, x 2799 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define F_(x, y) x, x 2800 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define FM(x) FN_##x, x 1295 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define FM(x) PINMUX_DATA(x##_MARK, 0), x 4523 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define F_(x, y) FN_##y x 4524 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define FM(x) FN_##x x 4766 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define F_(x, y) x, x 4767 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define FM(x) FN_##x, x 4931 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define F_(x, y) x, x 4932 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define FM(x) FN_##x, x 2376 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define F_(x, y) FN_##y x 2377 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define FM(x) FN_##x x 2619 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define F_(x, y) x, x 2620 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define FM(x) FN_##x, x 2764 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define F_(x, y) x, x 2765 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define FM(x) FN_##x, x 225 drivers/pinctrl/spear/pinctrl-spear1310.c #define PCIE_CFG_VAL(x) (PCIE_SATA##x##_SEL_PCIE | \ x 226 drivers/pinctrl/spear/pinctrl-spear1310.c PCIE##x##_CFG_AUX_CLK_EN | \ x 227 drivers/pinctrl/spear/pinctrl-spear1310.c PCIE##x##_CFG_CORE_CLK_EN | \ x 228 drivers/pinctrl/spear/pinctrl-spear1310.c PCIE##x##_CFG_POWERUP_RESET | \ x 229 drivers/pinctrl/spear/pinctrl-spear1310.c PCIE##x##_CFG_DEVICE_PRESENT) x 230 drivers/pinctrl/spear/pinctrl-spear1310.c #define SATA_CFG_VAL(x) (PCIE_SATA##x##_SEL_SATA | \ x 231 drivers/pinctrl/spear/pinctrl-spear1310.c SATA##x##_CFG_PM_CLK_EN | \ x 232 drivers/pinctrl/spear/pinctrl-spear1310.c SATA##x##_CFG_POWERUP_RESET | \ x 233 drivers/pinctrl/spear/pinctrl-spear1310.c SATA##x##_CFG_RX_CLK_EN | \ x 234 drivers/pinctrl/spear/pinctrl-spear1310.c SATA##x##_CFG_TX_CLK_EN) x 13 drivers/pinctrl/stm32/pinctrl-stm32.h #define STM32_PIN_NO(x) ((x) << 8) x 14 drivers/pinctrl/stm32/pinctrl-stm32.h #define STM32_GET_PIN_NO(x) ((x) >> 8) x 15 drivers/pinctrl/stm32/pinctrl-stm32.h #define STM32_GET_PIN_FUNC(x) ((x) & 0xff) x 18 drivers/pinctrl/stm32/pinctrl-stm32.h #define STM32_PIN_AF(x) ((x) + 1) x 78 drivers/pinctrl/uniphier/pinctrl-uniphier.h #define UNIPHIER_PIN_IECTRL(x) \ x 79 drivers/pinctrl/uniphier/pinctrl-uniphier.h (((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT)) x 80 drivers/pinctrl/uniphier/pinctrl-uniphier.h #define UNIPHIER_PIN_DRVCTRL(x) \ x 81 drivers/pinctrl/uniphier/pinctrl-uniphier.h (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT)) x 82 drivers/pinctrl/uniphier/pinctrl-uniphier.h #define UNIPHIER_PIN_DRV_TYPE(x) \ x 83 drivers/pinctrl/uniphier/pinctrl-uniphier.h (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT)) x 84 drivers/pinctrl/uniphier/pinctrl-uniphier.h #define UNIPHIER_PIN_PUPDCTRL(x) \ x 85 drivers/pinctrl/uniphier/pinctrl-uniphier.h (((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT)) x 86 drivers/pinctrl/uniphier/pinctrl-uniphier.h #define UNIPHIER_PIN_PULL_DIR(x) \ x 87 drivers/pinctrl/uniphier/pinctrl-uniphier.h (((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT)) x 27 drivers/pinctrl/zte/pinctrl-zx.c #define ZX_DS_VALUE(x) (((x) << ZX_DS_SHIFT) & ZX_DS_MASK) x 632 drivers/platform/olpc/olpc-xo175-ec.c u8 x = 0; x 639 drivers/platform/olpc/olpc-xo175-ec.c olpc_ec_cmd(CMD_SUSPEND_HINT, &x, 1, NULL, 0); x 150 drivers/platform/x86/classmate-laptop.c int16_t *x, x 175 drivers/platform/x86/classmate-laptop.c *x = locs[0]; x 186 drivers/platform/x86/classmate-laptop.c int16_t x, y, z; x 189 drivers/platform/x86/classmate-laptop.c status = cmpc_get_accel_v4(dev->handle, &x, &y, &z); x 193 drivers/platform/x86/classmate-laptop.c input_report_abs(inputdev, ABS_X, x); x 498 drivers/platform/x86/classmate-laptop.c unsigned char *x, x 518 drivers/platform/x86/classmate-laptop.c *x = locs[0]; x 529 drivers/platform/x86/classmate-laptop.c unsigned char x, y, z; x 532 drivers/platform/x86/classmate-laptop.c status = cmpc_get_accel(dev->handle, &x, &y, &z); x 536 drivers/platform/x86/classmate-laptop.c input_report_abs(inputdev, ABS_X, x); x 167 drivers/platform/x86/hdaps.c int *x, int *y) x 174 drivers/platform/x86/hdaps.c *x = inw(port1); x 180 drivers/platform/x86/hdaps.c *x = -*x; x 264 drivers/platform/x86/hdaps.c int x, y; x 267 drivers/platform/x86/hdaps.c __hdaps_read_pair(HDAPS_PORT_XPOS, HDAPS_PORT_YPOS, &x, &y); x 324 drivers/platform/x86/hdaps.c int x, y; x 328 drivers/platform/x86/hdaps.c if (__hdaps_read_pair(HDAPS_PORT_XPOS, HDAPS_PORT_YPOS, &x, &y)) x 331 drivers/platform/x86/hdaps.c input_report_abs(input_dev, ABS_X, x - rest_x); x 345 drivers/platform/x86/hdaps.c int ret, x, y; x 347 drivers/platform/x86/hdaps.c ret = hdaps_read_pair(HDAPS_PORT_XPOS, HDAPS_PORT_YPOS, &x, &y); x 351 drivers/platform/x86/hdaps.c return sprintf(buf, "(%d,%d)\n", x, y); x 357 drivers/platform/x86/hdaps.c int ret, x, y; x 359 drivers/platform/x86/hdaps.c ret = hdaps_read_pair(HDAPS_PORT_XVAR, HDAPS_PORT_YVAR, &x, &y); x 363 drivers/platform/x86/hdaps.c return sprintf(buf, "(%d,%d)\n", x, y); x 116 drivers/platform/x86/hp-wmi.c #define IS_HWBLOCKED(x) ((x & (HPWMI_POWER_BIOS | HPWMI_POWER_HARD)) \ x 118 drivers/platform/x86/hp-wmi.c #define IS_SWBLOCKED(x) !(x & HPWMI_POWER_SOFT) x 159 drivers/platform/x86/hp_accel.c #define DEFINE_CONV(name, x, y, z) \ x 161 drivers/platform/x86/hp_accel.c { .as_array = { x, y, z } } x 350 drivers/platform/x86/hp_accel.c if (lis3_dev.ac.x && lis3_dev.ac.y && lis3_dev.ac.z) { x 352 drivers/platform/x86/hp_accel.c lis3_dev.ac.x, lis3_dev.ac.y, lis3_dev.ac.z); x 286 drivers/platform/x86/intel_scu_ipc.c u16 x[2] = {addr, addr + 1}; x 287 drivers/platform/x86/intel_scu_ipc.c return pwr_reg_rdwr(x, (u8 *)data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_R); x 303 drivers/platform/x86/intel_scu_ipc.c u16 x[4] = {addr, addr + 1, addr + 2, addr + 3}; x 304 drivers/platform/x86/intel_scu_ipc.c return pwr_reg_rdwr(x, (u8 *)data, 4, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_R); x 336 drivers/platform/x86/intel_scu_ipc.c u16 x[2] = {addr, addr + 1}; x 337 drivers/platform/x86/intel_scu_ipc.c return pwr_reg_rdwr(x, (u8 *)&data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_W); x 353 drivers/platform/x86/intel_scu_ipc.c u16 x[4] = {addr, addr + 1, addr + 2, addr + 3}; x 354 drivers/platform/x86/intel_scu_ipc.c return pwr_reg_rdwr(x, (u8 *)&data, 4, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_W); x 27 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_MIN_PERIOD(x) ((x) & 0x7F0000) x 28 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_MAX_PERIOD(x) ((x) & 0x7F000000) x 29 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_SAMPLE_PERIOD_INVALID(x) ((x) & (BIT(7))) x 30 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_CLEAR_SAMPLE_PERIOD(x) ((x) &= ~0x7F) x 62 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_DISABLE(x) ((x) &= ~(BIT(31))) x 63 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_CLEAR_EVENTS(x) ((x) |= (BIT(30))) x 64 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_ENABLE_SRAM_EVT_TRACE(x) ((x) &= ~(BIT(30) | BIT(24))) x 65 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_ENABLE_PERIODIC(x) ((x) |= (BIT(23) | BIT(31) | BIT(7))) x 66 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_EXTRACT_VERBOSITY(x, y) ((y) = (((x) >> 27) & 0x3)) x 67 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_CLEAR_VERBOSITY_BITS(x) ((x) &= ~(BIT(27) | BIT(28))) x 68 drivers/platform/x86/intel_telemetry_pltdrv.c #define TELEM_SET_VERBOSITY_BITS(x, y) ((x) |= ((y) << 27)) x 3799 drivers/platform/x86/sony-laptop.c int i, j, x; x 3811 drivers/platform/x86/sony-laptop.c for (x = 0; x < 100 && sony_pic_call2(0x91, 0x1); x++) x 98 drivers/pnp/isapnp/core.c static inline void write_data(unsigned char x) x 100 drivers/pnp/isapnp/core.c outb(x, _PNPWRP); x 103 drivers/pnp/isapnp/core.c static inline void write_address(unsigned char x) x 105 drivers/pnp/isapnp/core.c outb(x, _PIDXR); x 72 drivers/pnp/pnpbios/pnpbios.h #define pnpbios_is_static(x) (((x)->flags & 0x0100) == 0x0000) x 73 drivers/pnp/pnpbios/pnpbios.h #define pnpbios_is_dynamic(x) ((x)->flags & 0x0080) x 31 drivers/power/reset/at91-poweroff.c #define AT91_SHDW_CPTWK0_(x) ((x) << 4) x 41 drivers/power/reset/at91-sama5d2_shdwc.c #define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \ x 47 drivers/power/reset/at91-sama5d2_shdwc.c #define AT91_SHDW_WKUPIS(x) ((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \ x 52 drivers/power/reset/at91-sama5d2_shdwc.c #define AT91_SHDW_WKUPEN(x) ((1 << (x)) & AT91_SHDW_WKUPEN_MASK) x 55 drivers/power/reset/at91-sama5d2_shdwc.c #define AT91_SHDW_WKUPT(x) ((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \ x 64 drivers/power/reset/at91-sama5d2_shdwc.c #define DBC_PERIOD_US(x) DIV_ROUND_UP_ULL((1000000 * (x)), \ x 22 drivers/power/reset/qnap-poweroff.c #define UART1_REG(x) (base + ((UART_##x) << 2)) x 166 drivers/power/supply/ab8500_charger.c #define to_ab8500_charger_usb_device_info(x) container_of((x), \ x 168 drivers/power/supply/ab8500_charger.c #define to_ab8500_charger_ac_device_info(x) container_of((x), \ x 57 drivers/power/supply/ab8500_fg.c #define interpolate(x, x1, y1, x2, y2) \ x 58 drivers/power/supply/ab8500_fg.c ((y1) + ((((y2) - (y1)) * ((x) - (x1))) / ((x2) - (x1)))); x 40 drivers/power/supply/adp5061.c #define ADP5061_VINX_SET_ILIM_MODE(x) (((x) & 0x0F) << 0) x 44 drivers/power/supply/adp5061.c #define ADP5061_TERM_SET_VTRM_MODE(x) (((x) & 0x3F) << 2) x 46 drivers/power/supply/adp5061.c #define ADP5061_TERM_SET_CHG_VLIM_MODE(x) (((x) & 0x03) << 0) x 50 drivers/power/supply/adp5061.c #define ADP5061_CHG_CURR_ICHG_MODE(x) (((x) & 0x1F) << 2) x 52 drivers/power/supply/adp5061.c #define ADP5061_CHG_CURR_ITRK_DEAD_MODE(x) (((x) & 0x03) << 0) x 56 drivers/power/supply/adp5061.c #define ADP5061_VOLTAGE_TH_DIS_RCH_MODE(x) (((x) & 0x01) << 7) x 58 drivers/power/supply/adp5061.c #define ADP5061_VOLTAGE_TH_VRCH_MODE(x) (((x) & 0x03) << 5) x 60 drivers/power/supply/adp5061.c #define ADP5061_VOLTAGE_TH_VTRK_DEAD_MODE(x) (((x) & 0x03) << 3) x 62 drivers/power/supply/adp5061.c #define ADP5061_VOLTAGE_TH_VWEAK_MODE(x) (((x) & 0x07) << 0) x 65 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_1_VIN_OV(x) (((x) >> 7) & 0x1) x 66 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_1_VIN_OK(x) (((x) >> 6) & 0x1) x 67 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_1_VIN_ILIM(x) (((x) >> 5) & 0x1) x 68 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_1_THERM_LIM(x) (((x) >> 4) & 0x1) x 69 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_1_CHDONE(x) (((x) >> 3) & 0x1) x 70 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_1_CHG_STATUS(x) (((x) >> 0) & 0x7) x 73 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_2_THR_STATUS(x) (((x) >> 5) & 0x7) x 74 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_2_RCH_LIM_INFO(x) (((x) >> 3) & 0x1) x 75 drivers/power/supply/adp5061.c #define ADP5061_CHG_STATUS_2_BAT_STATUS(x) (((x) >> 0) & 0x7) x 79 drivers/power/supply/adp5061.c #define ADP5061_IEND_IEND_MODE(x) (((x) & 0x07) << 5) x 29 drivers/power/supply/axp20x_ac_power.c #define AXP813_VHOLD_UV_TO_BIT(x) ((((x) / 100000) - 40) << 3) x 30 drivers/power/supply/axp20x_ac_power.c #define AXP813_VHOLD_REG_TO_UV(x) \ x 31 drivers/power/supply/axp20x_ac_power.c (((((x) & AXP813_VHOLD_MASK) >> 3) + 40) * 100000) x 34 drivers/power/supply/axp20x_ac_power.c #define AXP813_CURR_LIMIT_UA_TO_BIT(x) (((x) / 500000) - 3) x 35 drivers/power/supply/axp20x_ac_power.c #define AXP813_CURR_LIMIT_REG_TO_UA(x) \ x 36 drivers/power/supply/axp20x_ac_power.c ((((x) & AXP813_CURR_LIMIT_MASK) + 3) * 500000) x 56 drivers/power/supply/charger-manager.c #define CM_MIN_VALID(x, y) x = (((y > 0) && ((x) > (y))) ? (y) : (x)) x 36 drivers/power/supply/da9052-battery.c #define DA9052_MEAN(x, y) ((x + y) / 2) x 52 drivers/power/supply/ds2782_battery.c #define to_ds278x_info(x) power_supply_get_drvdata(x) x 32 drivers/power/supply/goldfish_battery.c #define GOLDFISH_BATTERY_WRITE(data, addr, x) \ x 33 drivers/power/supply/goldfish_battery.c (writel(x, data->reg_base + addr)) x 22 drivers/power/supply/ltc2941-battery-gauge.c #define I16_MSB(x) ((x >> 8) & 0xFF) x 23 drivers/power/supply/ltc2941-battery-gauge.c #define I16_LSB(x) (x & 0xFF) x 65 drivers/power/supply/ltc2941-battery-gauge.c #define LTC294X_REG_CONTROL_PRESCALER_SET(x) \ x 66 drivers/power/supply/ltc2941-battery-gauge.c ((x << 3) & LTC294X_REG_CONTROL_PRESCALER_MASK) x 68 drivers/power/supply/ltc2941-battery-gauge.c #define LTC294X_REG_CONTROL_ADC_DISABLE(x) ((x) & ~(BIT(7) | BIT(6))) x 30 drivers/power/supply/pm2301_charger.c #define to_pm2xxx_charger_ac_device_info(x) container_of((x), \ x 24 drivers/power/supply/pmu_battery.c #define to_pmu_battery_dev(x) power_supply_get_drvdata(x) x 65 drivers/ps3/ps3av.c u32 x; x 885 drivers/ps3/ps3av.c *xres = video_mode_table[id].x; x 370 drivers/ps3/ps3av_cmd.c u32 x, y; x 378 drivers/ps3/ps3av_cmd.c if (ps3av_video_mode2res(id, &x, &y)) x 391 drivers/ps3/ps3av_cmd.c video_mode->width = (u16) x; x 18 drivers/pwm/pwm-atmel-hlcdc.c #define ATMEL_HLCDC_PWMCVAL(x) (((x) << 8) & ATMEL_HLCDC_PWMCVAL_MASK) x 22 drivers/pwm/pwm-atmel-hlcdc.c #define ATMEL_HLCDC_PWMPS(x) ((x) & ATMEL_HLCDC_PWMPS_MASK) x 15 drivers/pwm/pwm-bcm2835.c #define PWM_CONTROL_SHIFT(x) ((x) * 8) x 21 drivers/pwm/pwm-bcm2835.c #define PERIOD(x) (((x) * 0x10) + 0x10) x 22 drivers/pwm/pwm-bcm2835.c #define DUTY(x) (((x) * 0x10) + 0x14) x 18 drivers/pwm/pwm-hibvt.c #define PWM_CFG0_ADDR(x) (((x) * 0x20) + 0x0) x 19 drivers/pwm/pwm-hibvt.c #define PWM_CFG1_ADDR(x) (((x) * 0x20) + 0x4) x 20 drivers/pwm/pwm-hibvt.c #define PWM_CFG2_ADDR(x) (((x) * 0x20) + 0x8) x 21 drivers/pwm/pwm-hibvt.c #define PWM_CTRL_ADDR(x) (((x) * 0x20) + 0xC) x 74 drivers/pwm/pwm-imx27.c #define MX3_PWMCR_PRESCALER_SET(x) FIELD_PREP(MX3_PWMCR_PRESCALER, (x) - 1) x 75 drivers/pwm/pwm-imx27.c #define MX3_PWMCR_PRESCALER_GET(x) (FIELD_GET(MX3_PWMCR_PRESCALER, \ x 76 drivers/pwm/pwm-imx27.c (x)) + 1) x 39 drivers/pwm/pwm-lpc18xx-sct.c #define LPC18XX_PWM_PRE(x) (x << LPC18XX_PWM_PRE_SHIFT) x 25 drivers/pwm/pwm-sti.c #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */ x 26 drivers/pwm/pwm-sti.c #define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */ x 27 drivers/pwm/pwm-sti.c #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */ x 37 drivers/pwm/pwm-twl-led.c #define TWL4030_LED_TOGGLE(led, x) ((x) << (led)) x 32 drivers/pwm/pwm-twl.c #define TWL4030_PWM_TOGGLE(pwm, x) ((x) << (pwm)) x 46 drivers/pwm/pwm-twl.c #define TWL6030_PWM_TOGGLE(pwm, x) ((x) << (pwm * 3)) x 19 drivers/pwm/pwm-zx.c #define ZX_PWM_CLKDIV(x) (((x) << ZX_PWM_CLKDIV_SHIFT) & \ x 138 drivers/rapidio/devices/tsi721.h #define TSI721_RIO_PW_RX_CAPT(x) (0x10a20 + (x)*4) x 146 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_CTL(x) (0x20000 + (x) * 0x1000) x 150 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_STS(x) (0x20004 + (x) * 0x1000) x 153 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_MASK(x) (0x20008 + (x) * 0x1000) x 157 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_RP(x) (0x2000c + (x) * 0x1000) x 160 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_WP(x) (0x20010 + (x) * 0x1000) x 163 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_BASEL(x) (0x20014 + (x) * 0x1000) x 165 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_BASEU(x) (0x20018 + (x) * 0x1000) x 166 drivers/rapidio/devices/tsi721.h #define TSI721_IDQ_SIZE(x) (0x2001c + (x) * 0x1000) x 171 drivers/rapidio/devices/tsi721.h #define TSI721_SR_CHINT(x) (0x20040 + (x) * 0x1000) x 172 drivers/rapidio/devices/tsi721.h #define TSI721_SR_CHINTE(x) (0x20044 + (x) * 0x1000) x 173 drivers/rapidio/devices/tsi721.h #define TSI721_SR_CHINTSET(x) (0x20048 + (x) * 0x1000) x 184 drivers/rapidio/devices/tsi721.h #define TSI721_IBWIN_LB(x) (0x29000 + (x) * 0x20) x 188 drivers/rapidio/devices/tsi721.h #define TSI721_IBWIN_UB(x) (0x29004 + (x) * 0x20) x 189 drivers/rapidio/devices/tsi721.h #define TSI721_IBWIN_SZ(x) (0x29008 + (x) * 0x20) x 193 drivers/rapidio/devices/tsi721.h #define TSI721_IBWIN_TLA(x) (0x2900c + (x) * 0x20) x 195 drivers/rapidio/devices/tsi721.h #define TSI721_IBWIN_TUA(x) (0x29010 + (x) * 0x20) x 215 drivers/rapidio/devices/tsi721.h #define TSI721_INT_SR2PC_CHAN(x) (1 << (24 + (x))) x 217 drivers/rapidio/devices/tsi721.h #define TSI721_INT_IMSG_CHAN(x) (1 << (16 + (x))) x 219 drivers/rapidio/devices/tsi721.h #define TSI721_INT_OMSG_CHAN(x) (1 << (8 + (x))) x 221 drivers/rapidio/devices/tsi721.h #define TSI721_INT_BDMA_CHAN(x) (1 << (x)) x 228 drivers/rapidio/devices/tsi721.h #define TSI721_OBWINLB(x) (0x40000 + (x) * 0x20) x 232 drivers/rapidio/devices/tsi721.h #define TSI721_OBWINUB(x) (0x40004 + (x) * 0x20) x 234 drivers/rapidio/devices/tsi721.h #define TSI721_OBWINSZ(x) (0x40008 + (x) * 0x20) x 276 drivers/rapidio/devices/tsi721.h #define TSI721_DMAC_BASE(x) (0x51000 + (x) * 0x1000) x 343 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DWRCNT(x) (0x61000 + (x) * 0x1000) x 345 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DRDCNT(x) (0x61004 + (x) * 0x1000) x 347 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_CTL(x) (0x61008 + (x) * 0x1000) x 353 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_INT(x) (0x6100c + (x) * 0x1000) x 354 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_INTSET(x) (0x61010 + (x) * 0x1000) x 355 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_INTE(x) (0x61018 + (x) * 0x1000) x 364 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_STS(x) (0x61014 + (x) * 0x1000) x 370 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_PWE(x) (0x6101c + (x) * 0x1000) x 374 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DPTRL(x) (0x61020 + (x) * 0x1000) x 377 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DPTRH(x) (0x61024 + (x) * 0x1000) x 380 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DSBL(x) (0x61040 + (x) * 0x1000) x 383 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DSBH(x) (0x61044 + (x) * 0x1000) x 386 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DSSZ(x) (0x61048 + (x) * 0x1000) x 389 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DSRP(x) (0x6104c + (x) * 0x1000) x 392 drivers/rapidio/devices/tsi721.h #define TSI721_OBDMAC_DSWP(x) (0x61050 + (x) * 0x1000) x 405 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_FQBL(x) (0x61200 + (x) * 0x1000) x 408 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_FQBH(x) (0x61204 + (x) * 0x1000) x 412 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_FQSZ(x) (0x61208 + (x) * 0x1000) x 415 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_FQRP(x) (0x6120c + (x) * 0x1000) x 418 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_FQWP(x) (0x61210 + (x) * 0x1000) x 421 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_FQTH(x) (0x61214 + (x) * 0x1000) x 427 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_CTL(x) (0x61240 + (x) * 0x1000) x 432 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_STS(x) (0x61244 + (x) * 0x1000) x 438 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_INT(x) (0x61248 + (x) * 0x1000) x 439 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_INTSET(x) (0x6124c + (x) * 0x1000) x 440 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_INTE(x) (0x61250 + (x) * 0x1000) x 449 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_PWE(x) (0x61254 + (x) * 0x1000) x 456 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_DQBL(x) (0x61300 + (x) * 0x1000) x 460 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_DQBH(x) (0x61304 + (x) * 0x1000) x 463 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_DQRP(x) (0x61308 + (x) * 0x1000) x 466 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_DQWR(x) (0x6130c + (x) * 0x1000) x 469 drivers/rapidio/devices/tsi721.h #define TSI721_IBDMAC_DQSZ(x) (0x61314 + (x) * 0x1000) x 499 drivers/rapidio/devices/tsi721.h #define TSI721_SMSG_ECC_COR_LOG(x) (0x6a300 + (x) * 4) x 502 drivers/rapidio/devices/tsi721.h #define TSI721_SMSG_ECC_NCOR(x) (0x6a340 + (x) * 4) x 656 drivers/rapidio/devices/tsi721.h #define MSG_DMA_ENTRY_INX_TO_SIZE(x) ((0x10 << (x)) & 0xFFFF0) x 774 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_DMACH_DONE(x) (0 + (x)) x 775 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_DMACH_INT(x) (8 + (x)) x 777 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_OMSG_DONE(x) (17 + (x)) x 778 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_OMSG_INT(x) (25 + (x)) x 779 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_IMSG_DQ_RCV(x) (33 + (x)) x 780 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_IMSG_INT(x) (41 + (x)) x 782 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_SR2PC_IDBQ_RCV(x) (50 + (x)) x 783 drivers/rapidio/devices/tsi721.h #define TSI721_MSIX_SR2PC_CH_INT(x) (58 + (x)) x 54 drivers/rapidio/rio.h #define RIO_GET_DID(size, x) (size ? (x & 0xffff) : ((x & 0x00ff0000) >> 16)) x 55 drivers/rapidio/rio.h #define RIO_SET_DID(size, x) (size ? (x & 0xffff) : ((x & 0x000000ff) << 16)) x 25 drivers/rapidio/switches/idt_gen3.c #define RIO_PLM_SPx_IMP_SPEC_CTL(x) (0x10100 + (x)*0x100) x 28 drivers/rapidio/switches/idt_gen3.c #define RIO_PLM_SPx_PW_EN(x) (0x10118 + (x)*0x100) x 32 drivers/rapidio/switches/idt_gen3.c #define RIO_BC_L2_Gn_ENTRYx_CSR(n, x) (0x31000 + (n)*0x400 + (x)*0x4) x 33 drivers/rapidio/switches/idt_gen3.c #define RIO_SPx_L2_Gn_ENTRYy_CSR(x, n, y) \ x 34 drivers/rapidio/switches/idt_gen3.c (0x51000 + (x)*0x2000 + (n)*0x400 + (y)*0x4) x 57 drivers/regulator/axp20x-regulator.c #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE(x) \ x 58 drivers/regulator/axp20x-regulator.c ((x) << 0) x 60 drivers/regulator/axp20x-regulator.c #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE(x) \ x 61 drivers/regulator/axp20x-regulator.c ((x) << 1) x 92 drivers/regulator/axp20x-regulator.c #define AXP22X_WORKMODE_DCDCX_MASK(x) BIT_MASK(x) x 44 drivers/regulator/lp3971.c #define BUCK_VOL_CHANGE_SHIFT(x) (((!!x) << 2) | (x & ~0x01)) x 59 drivers/regulator/lp3971.c #define LP3971_BUCK_TARGET_VOL1_REG(x) (buck_base_addr[x]) x 60 drivers/regulator/lp3971.c #define LP3971_BUCK_TARGET_VOL2_REG(x) (buck_base_addr[x]+1) x 71 drivers/regulator/lp3971.c #define LP3971_BUCK_RAMP_REG(x) (buck_base_addr[x]+2) x 83 drivers/regulator/lp3971.c #define LP3971_LDO_VOL_CONTR_REG(x) (LP3971_LDO_VOL_CONTR_BASE + (x >> 1)) x 90 drivers/regulator/lp3971.c #define LDO_VOL_CONTR_SHIFT(x) ((x & 1) << 2) x 143 drivers/regulator/lp3972.c #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x]) x 144 drivers/regulator/lp3972.c #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x]) x 151 drivers/regulator/lp3972.c #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2) x 152 drivers/regulator/lp3972.c #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x]) x 153 drivers/regulator/lp3972.c #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6) x 155 drivers/regulator/lp3972.c #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f) x 156 drivers/regulator/lp3972.c #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00) x 157 drivers/regulator/lp3972.c #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c) x 159 drivers/regulator/lp3972.c #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x]) x 160 drivers/regulator/lp3972.c #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x]) x 68 drivers/regulator/lp8788-buck.c #define BUCK_FPWM_MASK(x) (1 << (x)) x 69 drivers/regulator/lp8788-buck.c #define BUCK_FPWM_SHIFT(x) (x) x 296 drivers/regulator/twl-regulator.c #define UNSUP(x) (UNSUP_MASK | (x)) x 297 drivers/regulator/twl-regulator.c #define IS_UNSUP(info, x) \ x 298 drivers/regulator/twl-regulator.c ((UNSUP_MASK & (x)) && \ x 300 drivers/regulator/twl-regulator.c #define LDO_MV(x) (~UNSUP_MASK & (x)) x 31 drivers/reset/hisilicon/hi6220_reset.c #define to_reset_data(x) container_of(x, struct hi6220_reset_data, rc_dev) x 312 drivers/rtc/rtc-88pm860x.c #define pm860x_rtc_dt_init(x, y) (-1) x 494 drivers/rtc/rtc-ds1305.c static void msg_init(struct spi_message *m, struct spi_transfer *x, x 498 drivers/rtc/rtc-ds1305.c memset(x, 0, 2 * sizeof(*x)); x 500 drivers/rtc/rtc-ds1305.c x->tx_buf = addr; x 501 drivers/rtc/rtc-ds1305.c x->len = 1; x 502 drivers/rtc/rtc-ds1305.c spi_message_add_tail(x, m); x 504 drivers/rtc/rtc-ds1305.c x++; x 506 drivers/rtc/rtc-ds1305.c x->tx_buf = tx; x 507 drivers/rtc/rtc-ds1305.c x->rx_buf = rx; x 508 drivers/rtc/rtc-ds1305.c x->len = count; x 509 drivers/rtc/rtc-ds1305.c spi_message_add_tail(x, m); x 519 drivers/rtc/rtc-ds1305.c struct spi_transfer x[2]; x 522 drivers/rtc/rtc-ds1305.c msg_init(&m, x, &addr, count, NULL, buf); x 534 drivers/rtc/rtc-ds1305.c struct spi_transfer x[2]; x 537 drivers/rtc/rtc-ds1305.c msg_init(&m, x, &addr, count, buf, NULL); x 50 drivers/rtc/rtc-lpc24xx.c #define CT0_SECS(x) (((x) >> 0) & 0x3f) x 51 drivers/rtc/rtc-lpc24xx.c #define CT0_MINS(x) (((x) >> 8) & 0x3f) x 52 drivers/rtc/rtc-lpc24xx.c #define CT0_HOURS(x) (((x) >> 16) & 0x1f) x 53 drivers/rtc/rtc-lpc24xx.c #define CT0_DOW(x) (((x) >> 24) & 0x07) x 54 drivers/rtc/rtc-lpc24xx.c #define CT1_DOM(x) (((x) >> 0) & 0x1f) x 55 drivers/rtc/rtc-lpc24xx.c #define CT1_MONTH(x) (((x) >> 8) & 0x0f) x 56 drivers/rtc/rtc-lpc24xx.c #define CT1_YEAR(x) (((x) >> 16) & 0xfff) x 57 drivers/rtc/rtc-lpc24xx.c #define CT2_DOY(x) (((x) >> 0) & 0xfff) x 19 drivers/rtc/rtc-ls1x.c #define LS1X_RTC_REGS(x) \ x 20 drivers/rtc/rtc-ls1x.c ((void __iomem *)KSEG1ADDR(LS1X_RTC_REG_OFFSET + (x))) x 37 drivers/rtc/rtc-m48t86.c #define M48T86_NVRAM(x) (0x0e + (x)) x 123 drivers/rtc/rtc-omap.c #define OMAP_RTC_PMIC_EXT_WKUP_EN(x) BIT(x) x 124 drivers/rtc/rtc-omap.c #define OMAP_RTC_PMIC_EXT_WKUP_POL(x) BIT(4 + x) x 43 drivers/rtc/rtc-pcf8583.c #define get_ctrl(x) ((struct pcf8583 *)i2c_get_clientdata(x))->ctrl x 44 drivers/rtc/rtc-pcf8583.c #define set_ctrl(x, v) get_ctrl(x) = v x 12 drivers/rtc/rtc-s3c.h #define S3C2410_RTCREG(x) (x) x 31 drivers/rtc/rtc-s3c.h #define S3C2443_TICNT_PART(x) ((x & 0x7f00) >> 8) x 33 drivers/rtc/rtc-s3c.h #define S3C2443_TICNT1_PART(x) (x & 0xff) x 41 drivers/rtc/rtc-s3c.h #define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15) x 75 drivers/rtc/rtc-sun6i.c #define SUN6I_DATE_GET_DAY_VALUE(x) ((x) & 0x0000001f) x 76 drivers/rtc/rtc-sun6i.c #define SUN6I_DATE_GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8) x 77 drivers/rtc/rtc-sun6i.c #define SUN6I_DATE_GET_YEAR_VALUE(x) (((x) & 0x003f0000) >> 16) x 78 drivers/rtc/rtc-sun6i.c #define SUN6I_LEAP_GET_VALUE(x) (((x) & 0x00400000) >> 22) x 83 drivers/rtc/rtc-sun6i.c #define SUN6I_TIME_GET_SEC_VALUE(x) ((x) & 0x0000003f) x 84 drivers/rtc/rtc-sun6i.c #define SUN6I_TIME_GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8) x 85 drivers/rtc/rtc-sun6i.c #define SUN6I_TIME_GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16) x 90 drivers/rtc/rtc-sun6i.c #define SUN6I_DATE_SET_DAY_VALUE(x) ((x) & 0x0000001f) x 91 drivers/rtc/rtc-sun6i.c #define SUN6I_DATE_SET_MON_VALUE(x) ((x) << 8 & 0x00000f00) x 92 drivers/rtc/rtc-sun6i.c #define SUN6I_DATE_SET_YEAR_VALUE(x) ((x) << 16 & 0x003f0000) x 93 drivers/rtc/rtc-sun6i.c #define SUN6I_LEAP_SET_VALUE(x) ((x) << 22 & 0x00400000) x 98 drivers/rtc/rtc-sun6i.c #define SUN6I_TIME_SET_SEC_VALUE(x) ((x) & 0x0000003f) x 99 drivers/rtc/rtc-sun6i.c #define SUN6I_TIME_SET_MIN_VALUE(x) ((x) << 8 & 0x00003f00) x 100 drivers/rtc/rtc-sun6i.c #define SUN6I_TIME_SET_HOUR_VALUE(x) ((x) << 16 & 0x001f0000) x 49 drivers/rtc/rtc-sunxi.c #define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \ x 52 drivers/rtc/rtc-sunxi.c #define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift)) x 57 drivers/rtc/rtc-sunxi.c #define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0) x 58 drivers/rtc/rtc-sunxi.c #define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8) x 59 drivers/rtc/rtc-sunxi.c #define SUNXI_DATE_GET_YEAR_VALUE(x, mask) SUNXI_GET(x, mask, 16) x 64 drivers/rtc/rtc-sunxi.c #define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0) x 65 drivers/rtc/rtc-sunxi.c #define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8) x 66 drivers/rtc/rtc-sunxi.c #define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16) x 71 drivers/rtc/rtc-sunxi.c #define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0) x 72 drivers/rtc/rtc-sunxi.c #define SUNXI_ALRM_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8) x 73 drivers/rtc/rtc-sunxi.c #define SUNXI_ALRM_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16) x 78 drivers/rtc/rtc-sunxi.c #define SUNXI_DATE_SET_DAY_VALUE(x) SUNXI_DATE_GET_DAY_VALUE(x) x 79 drivers/rtc/rtc-sunxi.c #define SUNXI_DATE_SET_MON_VALUE(x) SUNXI_SET(x, SUNXI_MASK_M, 8) x 80 drivers/rtc/rtc-sunxi.c #define SUNXI_DATE_SET_YEAR_VALUE(x, mask) SUNXI_SET(x, mask, 16) x 81 drivers/rtc/rtc-sunxi.c #define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift) x 86 drivers/rtc/rtc-sunxi.c #define SUNXI_TIME_SET_SEC_VALUE(x) SUNXI_TIME_GET_SEC_VALUE(x) x 87 drivers/rtc/rtc-sunxi.c #define SUNXI_TIME_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8) x 88 drivers/rtc/rtc-sunxi.c #define SUNXI_TIME_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16) x 93 drivers/rtc/rtc-sunxi.c #define SUNXI_ALRM_SET_SEC_VALUE(x) SUNXI_ALRM_GET_SEC_VALUE(x) x 94 drivers/rtc/rtc-sunxi.c #define SUNXI_ALRM_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8) x 95 drivers/rtc/rtc-sunxi.c #define SUNXI_ALRM_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16) x 96 drivers/rtc/rtc-sunxi.c #define SUNXI_ALRM_SET_DAY_VALUE(x) SUNXI_SET(x, SUNXI_MASK_D, 21) x 110 drivers/rtc/rtc-sunxi.c #define SUNXI_YEAR_OFF(x) ((x)->min - 1900) x 93 drivers/s390/char/sclp_sd.c #define to_sd_file(x) container_of(x, struct sclp_sd_file, kobj) x 22 drivers/s390/char/sclp_sdias.c #define TRACE(x...) debug_sprintf_event(sdias_dbf, 1, x) x 107 drivers/s390/char/vmur.h #define TRACE(x...) debug_sprintf_event(vmur_dbf, 1, x) x 34 drivers/s390/char/zcore.c #define TRACE(x...) debug_sprintf_event(zcore_dbf, 1, x) x 476 drivers/s390/cio/device_fsm.c scsw->x = 1; x 56 drivers/s390/cio/eadm_sch.c orb->eadm.x = 1; x 135 drivers/s390/cio/itcw.c #define CROSS4K(x, l) (((x) & ~4095) != ((x + l) & ~4095)) x 51 drivers/s390/cio/orb.h u32 x:1; x 73 drivers/s390/cio/orb.h u32 x:1; x 531 drivers/s390/crypto/ap_bus.c #define is_card_dev(x) ((x)->parent == ap_root_device) x 532 drivers/s390/crypto/ap_bus.c #define is_queue_dev(x) ((x)->parent != ap_root_device) x 143 drivers/s390/crypto/ap_bus.h #define to_ap_drv(x) container_of((x), struct ap_driver, driver) x 154 drivers/s390/crypto/ap_bus.h #define to_ap_dev(x) container_of((x), struct ap_device, device) x 168 drivers/s390/crypto/ap_bus.h #define to_ap_card(x) container_of((x), struct ap_card, ap_dev.device) x 190 drivers/s390/crypto/ap_bus.h #define to_ap_queue(x) container_of((x), struct ap_queue, ap_dev.device) x 130 drivers/s390/crypto/zcrypt_api.c #define to_zcdn_dev(x) container_of((x), struct zcdn_device, device) x 32 drivers/s390/crypto/zcrypt_msgtype6.c #define CEIL4(x) ((((x)+3)/4)*4) x 35 drivers/s390/net/ctcm_dbug.c int x; x 36 drivers/s390/net/ctcm_dbug.c for (x = 0; x < CTCM_DBF_INFOS; x++) { x 37 drivers/s390/net/ctcm_dbug.c debug_unregister(ctcm_dbf[x].id); x 38 drivers/s390/net/ctcm_dbug.c ctcm_dbf[x].id = NULL; x 44 drivers/s390/net/ctcm_dbug.c int x; x 45 drivers/s390/net/ctcm_dbug.c for (x = 0; x < CTCM_DBF_INFOS; x++) { x 47 drivers/s390/net/ctcm_dbug.c ctcm_dbf[x].id = debug_register(ctcm_dbf[x].name, x 48 drivers/s390/net/ctcm_dbug.c ctcm_dbf[x].pages, x 49 drivers/s390/net/ctcm_dbug.c ctcm_dbf[x].areas, x 50 drivers/s390/net/ctcm_dbug.c ctcm_dbf[x].len); x 51 drivers/s390/net/ctcm_dbug.c if (ctcm_dbf[x].id == NULL) { x 57 drivers/s390/net/ctcm_dbug.c debug_register_view(ctcm_dbf[x].id, &debug_hex_ascii_view); x 59 drivers/s390/net/ctcm_dbug.c debug_set_level(ctcm_dbf[x].id, ctcm_dbf[x].level); x 5407 drivers/s390/net/qeth_core_main.c int x; x 5408 drivers/s390/net/qeth_core_main.c for (x = 0; x < QETH_DBF_INFOS; x++) { x 5409 drivers/s390/net/qeth_core_main.c debug_unregister(qeth_dbf[x].id); x 5410 drivers/s390/net/qeth_core_main.c qeth_dbf[x].id = NULL; x 5431 drivers/s390/net/qeth_core_main.c int x; x 5433 drivers/s390/net/qeth_core_main.c for (x = 0; x < QETH_DBF_INFOS; x++) { x 5435 drivers/s390/net/qeth_core_main.c qeth_dbf[x].id = debug_register(qeth_dbf[x].name, x 5436 drivers/s390/net/qeth_core_main.c qeth_dbf[x].pages, x 5437 drivers/s390/net/qeth_core_main.c qeth_dbf[x].areas, x 5438 drivers/s390/net/qeth_core_main.c qeth_dbf[x].len); x 5439 drivers/s390/net/qeth_core_main.c if (qeth_dbf[x].id == NULL) { x 5445 drivers/s390/net/qeth_core_main.c ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); x 5452 drivers/s390/net/qeth_core_main.c debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); x 210 drivers/s390/net/qeth_core_mpc.c int x; x 212 drivers/s390/net/qeth_core_mpc.c for (x = 0; x < ARRAY_SIZE(qeth_ipa_rc_msg) - 1; x++) x 213 drivers/s390/net/qeth_core_mpc.c if (qeth_ipa_rc_msg[x].rc == rc) x 214 drivers/s390/net/qeth_core_mpc.c return qeth_ipa_rc_msg[x].msg; x 215 drivers/s390/net/qeth_core_mpc.c return qeth_ipa_rc_msg[x].msg; x 258 drivers/s390/net/qeth_core_mpc.c int x; x 260 drivers/s390/net/qeth_core_mpc.c for (x = 0; x < ARRAY_SIZE(qeth_ipa_cmd_names) - 1; x++) x 261 drivers/s390/net/qeth_core_mpc.c if (qeth_ipa_cmd_names[x].cmd == cmd) x 262 drivers/s390/net/qeth_core_mpc.c return qeth_ipa_cmd_names[x].name; x 263 drivers/s390/net/qeth_core_mpc.c return qeth_ipa_cmd_names[x].name; x 509 drivers/s390/scsi/zfcp_dbf.c int max_entries, x, last = 0; x 549 drivers/s390/scsi/zfcp_dbf.c for (x = 1; x < max_entries && !last; x++) { x 550 drivers/s390/scsi/zfcp_dbf.c if (x % (ZFCP_FC_GPN_FT_ENT_PAGE + 1)) x 557 drivers/s390/scsi/zfcp_dbf.c len = min(len, (u16)(x * sizeof(struct fc_gpn_ft_resp))); x 722 drivers/s390/scsi/zfcp_fc.c int ret = 0, x, last = 0; x 741 drivers/s390/scsi/zfcp_fc.c for (x = 1; x < max_entries && !last; x++) { x 742 drivers/s390/scsi/zfcp_fc.c if (x % (ZFCP_FC_GPN_FT_ENT_PAGE + 1)) x 30 drivers/sbus/char/uctrl.c #define dprintk(x) printk x x 32 drivers/sbus/char/uctrl.c #define dprintk(x) x 423 drivers/scsi/3w-9xxx.h #define TW_OPRES_IN(x,y) ((x << 5) | (y & 0x1f)) x 424 drivers/scsi/3w-9xxx.h #define TW_OP_OUT(x) (x & 0x1f) x 427 drivers/scsi/3w-9xxx.h #define TW_OPSGL_IN(x,y) ((x << 5) | (y & 0x1f)) x 428 drivers/scsi/3w-9xxx.h #define TW_SGL_OUT(x) ((x >> 5) & 0x7) x 431 drivers/scsi/3w-9xxx.h #define TW_SEV_OUT(x) (x & 0x7) x 434 drivers/scsi/3w-9xxx.h #define TW_RESID_OUT(x) ((x >> 4) & 0xff) x 441 drivers/scsi/3w-9xxx.h #define TW_CONTROL_REG_ADDR(x) (x->base_addr) x 442 drivers/scsi/3w-9xxx.h #define TW_STATUS_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0x4) x 443 drivers/scsi/3w-9xxx.h #define TW_COMMAND_QUEUE_REG_ADDR(x) (sizeof(dma_addr_t) > 4 ? ((unsigned char __iomem *)x->base_addr + 0x20) : ((unsigned char __iomem *)x->base_addr + 0x8)) x 444 drivers/scsi/3w-9xxx.h #define TW_COMMAND_QUEUE_REG_ADDR_LARGE(x) ((unsigned char __iomem *)x->base_addr + 0x20) x 445 drivers/scsi/3w-9xxx.h #define TW_RESPONSE_QUEUE_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0xC) x 446 drivers/scsi/3w-9xxx.h #define TW_RESPONSE_QUEUE_REG_ADDR_LARGE(x) ((unsigned char __iomem *)x->base_addr + 0x30) x 447 drivers/scsi/3w-9xxx.h #define TW_CLEAR_ALL_INTERRUPTS(x) (writel(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 448 drivers/scsi/3w-9xxx.h #define TW_CLEAR_ATTENTION_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 449 drivers/scsi/3w-9xxx.h #define TW_CLEAR_HOST_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_HOST_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 450 drivers/scsi/3w-9xxx.h #define TW_DISABLE_INTERRUPTS(x) (writel(TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) x 451 drivers/scsi/3w-9xxx.h #define TW_ENABLE_AND_CLEAR_INTERRUPTS(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT | TW_CONTROL_UNMASK_RESPONSE_INTERRUPT | TW_CONTROL_ENABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) x 452 drivers/scsi/3w-9xxx.h #define TW_MASK_COMMAND_INTERRUPT(x) (writel(TW_CONTROL_MASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 453 drivers/scsi/3w-9xxx.h #define TW_UNMASK_COMMAND_INTERRUPT(x) (writel(TW_CONTROL_UNMASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 454 drivers/scsi/3w-9xxx.h #define TW_SOFT_RESET(x) (writel(TW_CONTROL_ISSUE_SOFT_RESET | \ x 460 drivers/scsi/3w-9xxx.h TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) x 472 drivers/scsi/3w-9xxx.h #define TW_CPU_TO_SGL(x) (sizeof(dma_addr_t) > 4 ? cpu_to_le64(x) : cpu_to_le32(x)) x 155 drivers/scsi/3w-sas.h #define TW_OPRES_IN(x,y) ((x << 5) | (y & 0x1f)) x 156 drivers/scsi/3w-sas.h #define TW_OP_OUT(x) (x & 0x1f) x 159 drivers/scsi/3w-sas.h #define TW_OPSGL_IN(x,y) ((x << 5) | (y & 0x1f)) x 160 drivers/scsi/3w-sas.h #define TW_SGL_OUT(x) ((x >> 5) & 0x7) x 163 drivers/scsi/3w-sas.h #define TW_SEV_OUT(x) (x & 0x7) x 166 drivers/scsi/3w-sas.h #define TW_RESID_OUT(x) ((x >> 16) & 0xffff) x 167 drivers/scsi/3w-sas.h #define TW_NOTMFA_OUT(x) (x & 0x1) x 174 drivers/scsi/3w-sas.h #define TWL_STATUS_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_STATUS) x 175 drivers/scsi/3w-sas.h #define TWL_HOBQPL_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HOBQPL) x 176 drivers/scsi/3w-sas.h #define TWL_HOBQPH_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HOBQPH) x 177 drivers/scsi/3w-sas.h #define TWL_HOBDB_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HOBDB) x 178 drivers/scsi/3w-sas.h #define TWL_HOBDBC_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HOBDBC) x 179 drivers/scsi/3w-sas.h #define TWL_HIMASK_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HIMASK) x 180 drivers/scsi/3w-sas.h #define TWL_HISTAT_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HISTAT) x 181 drivers/scsi/3w-sas.h #define TWL_HIBQPH_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HIBQPH) x 182 drivers/scsi/3w-sas.h #define TWL_HIBQPL_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HIBQPL) x 183 drivers/scsi/3w-sas.h #define TWL_HIBDB_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HIBDB) x 184 drivers/scsi/3w-sas.h #define TWL_SCRPD3_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_SCRPD3) x 185 drivers/scsi/3w-sas.h #define TWL_MASK_INTERRUPTS(x) (writel(~0, TWL_HIMASK_REG_ADDR(tw_dev))) x 186 drivers/scsi/3w-sas.h #define TWL_UNMASK_INTERRUPTS(x) (writel(~TWL_HISTATUS_VALID_INTERRUPT, TWL_HIMASK_REG_ADDR(tw_dev))) x 187 drivers/scsi/3w-sas.h #define TWL_CLEAR_DB_INTERRUPT(x) (writel(~0, TWL_HOBDBC_REG_ADDR(tw_dev))) x 188 drivers/scsi/3w-sas.h #define TWL_SOFT_RESET(x) (writel(TWL_ISSUE_SOFT_RESET, TWL_HIBDB_REG_ADDR(tw_dev))) x 203 drivers/scsi/3w-sas.h #define TW_CPU_TO_SGL(x) (sizeof(dma_addr_t) > 4 ? cpu_to_le64(x) : cpu_to_le32(x)) x 238 drivers/scsi/3w-xxxx.h #define TW_OPSGL_IN(x,y) ((x << 5) | (y & 0x1f)) x 239 drivers/scsi/3w-xxxx.h #define TW_SGL_OUT(x) ((x >> 5) & 0x7) x 242 drivers/scsi/3w-xxxx.h #define TW_RESID_OUT(x) ((x >> 4) & 0xff) x 245 drivers/scsi/3w-xxxx.h #define TW_UNITHOST_IN(x,y) ((x << 4) | ( y & 0xf)) x 246 drivers/scsi/3w-xxxx.h #define TW_UNIT_OUT(x) (x & 0xf) x 249 drivers/scsi/3w-xxxx.h #define TW_CONTROL_REG_ADDR(x) (x->base_addr) x 250 drivers/scsi/3w-xxxx.h #define TW_STATUS_REG_ADDR(x) (x->base_addr + 0x4) x 251 drivers/scsi/3w-xxxx.h #define TW_COMMAND_QUEUE_REG_ADDR(x) (x->base_addr + 0x8) x 252 drivers/scsi/3w-xxxx.h #define TW_RESPONSE_QUEUE_REG_ADDR(x) (x->base_addr + 0xC) x 253 drivers/scsi/3w-xxxx.h #define TW_CLEAR_ALL_INTERRUPTS(x) (outl(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 254 drivers/scsi/3w-xxxx.h #define TW_CLEAR_ATTENTION_INTERRUPT(x) (outl(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 255 drivers/scsi/3w-xxxx.h #define TW_CLEAR_HOST_INTERRUPT(x) (outl(TW_CONTROL_CLEAR_HOST_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 256 drivers/scsi/3w-xxxx.h #define TW_DISABLE_INTERRUPTS(x) (outl(TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) x 257 drivers/scsi/3w-xxxx.h #define TW_ENABLE_AND_CLEAR_INTERRUPTS(x) (outl(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT | TW_CONTROL_UNMASK_RESPONSE_INTERRUPT | TW_CONTROL_ENABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) x 258 drivers/scsi/3w-xxxx.h #define TW_MASK_COMMAND_INTERRUPT(x) (outl(TW_CONTROL_MASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 259 drivers/scsi/3w-xxxx.h #define TW_UNMASK_COMMAND_INTERRUPT(x) (outl(TW_CONTROL_UNMASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x))) x 260 drivers/scsi/3w-xxxx.h #define TW_SOFT_RESET(x) (outl(TW_CONTROL_ISSUE_SOFT_RESET | \ x 266 drivers/scsi/3w-xxxx.h TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x))) x 267 drivers/scsi/3w-xxxx.h #define TW_STATUS_ERRORS(x) \ x 268 drivers/scsi/3w-xxxx.h (((x & TW_STATUS_PCI_ABORT) || \ x 269 drivers/scsi/3w-xxxx.h (x & TW_STATUS_PCI_PARITY_ERROR) || \ x 270 drivers/scsi/3w-xxxx.h (x & TW_STATUS_QUEUE_ERROR) || \ x 271 drivers/scsi/3w-xxxx.h (x & TW_STATUS_MICROCONTROLLER_ERROR)) && \ x 272 drivers/scsi/3w-xxxx.h (x & TW_STATUS_MICROCONTROLLER_READY)) x 141 drivers/scsi/53c700.c #define to32bit(x) ((__u32)((unsigned long)(x))) x 25 drivers/scsi/53c700.h #define DEBUG(x) printk x x 31 drivers/scsi/53c700.h #define DEBUG(x) do {} while (0) x 277 drivers/scsi/53c700.h #define bS_to_cpu(x) (bSWAP ? le32_to_cpu(x) : (x)) x 278 drivers/scsi/53c700.h #define bS_to_host(x) (bSWAP ? cpu_to_le32(x) : (x)) x 121 drivers/scsi/NCR5380.c #define NCR5380_io_delay(x) x 125 drivers/scsi/NCR5380.c #define NCR5380_acquire_dma_irq(x) (1) x 129 drivers/scsi/NCR5380.c #define NCR5380_release_dma_irq(x) x 104 drivers/scsi/aacraid/aachba.c #define BYTE0(x) (unsigned char)(x) x 105 drivers/scsi/aacraid/aachba.c #define BYTE1(x) (unsigned char)((x) >> 8) x 106 drivers/scsi/aacraid/aachba.c #define BYTE2(x) (unsigned char)((x) >> 16) x 107 drivers/scsi/aacraid/aachba.c #define BYTE3(x) (unsigned char)((x) >> 24) x 2322 drivers/scsi/aacraid/aachba.c if (nblank(dprintk(x))) { x 22 drivers/scsi/aacraid/aacraid.h # define dprintk(x) x 25 drivers/scsi/aacraid/aacraid.h #define _nblank(x) #x x 26 drivers/scsi/aacraid/aacraid.h #define nblank(x) _nblank(x)[0] x 112 drivers/scsi/aacraid/aacraid.h #define get_bus_number(x) (x/AAC_MAX_TARGETS) x 113 drivers/scsi/aacraid/aacraid.h #define get_target_number(x) (x%AAC_MAX_TARGETS) x 420 drivers/scsi/aacraid/aacraid.h #define aac_phys_to_logical(x) ((x)+1) x 421 drivers/scsi/aacraid/aacraid.h #define aac_logical_to_phys(x) ((x)?(x)-1:0) x 54 drivers/scsi/aacraid/linit.c #define _str(x) #x x 55 drivers/scsi/aacraid/linit.c #define str(x) _str(x) x 1261 drivers/scsi/aacraid/linit.c if (nblank(dprintk(x))) x 532 drivers/scsi/aha152x.c #define ADDMSGO(x) (MSGOLEN<256 ? (void)(MSGO(MSGOLEN++)=x) : aha152x_error(shpnt,"MSGO overflow")) x 536 drivers/scsi/aha152x.c #define ADDMSGI(x) (MSGILEN<256 ? (void)(MSGI(MSGILEN++)=x) : aha152x_error(shpnt,"MSGI overflow")) x 67 drivers/scsi/aha1740.c #define DEB(x) x x 69 drivers/scsi/aha1740.c #define DEB(x) x 177 drivers/scsi/aic7xxx/aic79xx.h #define AHD_QIN_WRAP(x) ((x) & (AHD_QIN_SIZE-1)) x 1035 drivers/scsi/aic7xxx/aic79xx.h #define AHD_MK_MSK(x) (0x01 << (x)) x 403 drivers/scsi/aic7xxx/aic79xx_osm.c uint8_t x; x 406 drivers/scsi/aic7xxx/aic79xx_osm.c x = readb(ahd->bshs[0].maddr + port); x 408 drivers/scsi/aic7xxx/aic79xx_osm.c x = inb(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF)); x 411 drivers/scsi/aic7xxx/aic79xx_osm.c return (x); x 418 drivers/scsi/aic7xxx/aic79xx_osm.c uint8_t x; x 421 drivers/scsi/aic7xxx/aic79xx_osm.c x = readw(ahd->bshs[0].maddr + port); x 423 drivers/scsi/aic7xxx/aic79xx_osm.c x = inw(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF)); x 426 drivers/scsi/aic7xxx/aic79xx_osm.c return (x); x 90 drivers/scsi/aic7xxx/aic79xx_osm.h #define powerof2(x) ((((x)-1)&(x))==0) x 98 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_htobe16(x) cpu_to_be16(x) x 99 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_htobe32(x) cpu_to_be32(x) x 100 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_htobe64(x) cpu_to_be64(x) x 101 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_htole16(x) cpu_to_le16(x) x 102 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_htole32(x) cpu_to_le32(x) x 103 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_htole64(x) cpu_to_le64(x) x 105 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_be16toh(x) be16_to_cpu(x) x 106 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_be32toh(x) be32_to_cpu(x) x 107 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_be64toh(x) be64_to_cpu(x) x 108 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_le16toh(x) le16_to_cpu(x) x 109 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_le32toh(x) le32_to_cpu(x) x 110 drivers/scsi/aic7xxx/aic79xx_osm.h #define ahd_le64toh(x) le64_to_cpu(x) x 48 drivers/scsi/aic7xxx/aic79xx_osm_pci.c #define ID(x) \ x 49 drivers/scsi/aic7xxx/aic79xx_osm_pci.c ID2C(x), \ x 50 drivers/scsi/aic7xxx/aic79xx_osm_pci.c ID2C(IDIROC(x)) x 401 drivers/scsi/aic7xxx/aic7xxx_osm.c uint8_t x; x 404 drivers/scsi/aic7xxx/aic7xxx_osm.c x = readb(ahc->bsh.maddr + port); x 406 drivers/scsi/aic7xxx/aic7xxx_osm.c x = inb(ahc->bsh.ioport + port); x 409 drivers/scsi/aic7xxx/aic7xxx_osm.c return (x); x 110 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_htobe16(x) cpu_to_be16(x) x 111 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_htobe32(x) cpu_to_be32(x) x 112 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_htobe64(x) cpu_to_be64(x) x 113 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_htole16(x) cpu_to_le16(x) x 114 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_htole32(x) cpu_to_le32(x) x 115 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_htole64(x) cpu_to_le64(x) x 117 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_be16toh(x) be16_to_cpu(x) x 118 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_be32toh(x) be32_to_cpu(x) x 119 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_be64toh(x) be64_to_cpu(x) x 120 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_le16toh(x) le16_to_cpu(x) x 121 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_le32toh(x) le32_to_cpu(x) x 122 drivers/scsi/aic7xxx/aic7xxx_osm.h #define ahc_le64toh(x) le64_to_cpu(x) x 47 drivers/scsi/aic7xxx/aic7xxx_osm_pci.c #define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI) x 160 drivers/scsi/aic7xxx/aiclib.h #define ID_C(x, c) \ x 162 drivers/scsi/aic7xxx/aiclib.h GETID(x,32), GETID(x,48), GETID(x,0), GETID(x,16), \ x 166 drivers/scsi/aic7xxx/aiclib.h #define ID2C(x) \ x 167 drivers/scsi/aic7xxx/aiclib.h ID_C(x, PCI_CLASS_STORAGE_SCSI), \ x 168 drivers/scsi/aic7xxx/aiclib.h ID_C(x, PCI_CLASS_STORAGE_RAID) x 170 drivers/scsi/aic7xxx/aiclib.h #define IDIROC(x) ((x) | ~ID_ALL_IROC_MASK) x 177 drivers/scsi/aic7xxx/aiclib.h #define ID16(x) \ x 178 drivers/scsi/aic7xxx/aiclib.h ID(x), \ x 179 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0001000000000000ull), \ x 180 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0002000000000000ull), \ x 181 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0003000000000000ull), \ x 182 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0004000000000000ull), \ x 183 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0005000000000000ull), \ x 184 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0006000000000000ull), \ x 185 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0007000000000000ull), \ x 186 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0008000000000000ull), \ x 187 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x0009000000000000ull), \ x 188 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x000A000000000000ull), \ x 189 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x000B000000000000ull), \ x 190 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x000C000000000000ull), \ x 191 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x000D000000000000ull), \ x 192 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x000E000000000000ull), \ x 193 drivers/scsi/aic7xxx/aiclib.h ID((x) | 0x000F000000000000ull) x 24 drivers/scsi/aic94xx/aic94xx_dump.c #define MD(x) (1 << (x)) x 493 drivers/scsi/aic94xx/aic94xx_scb.c u16 x; x 501 drivers/scsi/aic94xx/aic94xx_scb.c x = (unsigned long)dev->lldd_dev; x 502 drivers/scsi/aic94xx/aic94xx_scb.c if (x == conn_handle) x 519 drivers/scsi/aic94xx/aic94xx_scb.c u16 x; x 527 drivers/scsi/aic94xx/aic94xx_scb.c x = (unsigned long)dev->lldd_dev; x 528 drivers/scsi/aic94xx/aic94xx_scb.c if (x == conn_handle) x 307 drivers/scsi/arcmsr/arcmsr.h #define MEM_BASE0(x) (u32 __iomem *)((unsigned long)acb->mem_base0 + x) x 308 drivers/scsi/arcmsr/arcmsr.h #define MEM_BASE1(x) (u32 __iomem *)((unsigned long)acb->mem_base1 + x) x 148 drivers/scsi/be2iscsi/be_main.h #define PAGES_REQUIRED(x) \ x 149 drivers/scsi/be2iscsi/be_main.h ((x < PAGE_SIZE) ? 1 : ((x + PAGE_SIZE - 1) / PAGE_SIZE)) x 270 drivers/scsi/bnx2fc/bnx2fc.h #define bnx2fc_from_ctlr(x) \ x 271 drivers/scsi/bnx2fc/bnx2fc.h ((struct bnx2fc_interface *)((x) + 1)) x 273 drivers/scsi/bnx2fc/bnx2fc.h #define bnx2fc_to_ctlr(x) \ x 274 drivers/scsi/bnx2fc/bnx2fc.h ((struct fcoe_ctlr *)(((struct fcoe_ctlr *)(x)) - 1)) x 2232 drivers/scsi/csiostor/csio_hw.c #define SAME_INTF(x) (hdr1->intfver_##x == hdr2->intfver_##x) x 1152 drivers/scsi/csiostor/csio_mb.c ntohl(dbg->u.assert.x), x 313 drivers/scsi/csiostor/csio_wr.h #define IQWRF_LEN_GET(x) (((x) >> 0) & 0x7fffffffU) x 315 drivers/scsi/csiostor/csio_wr.h #define IQWRF_TYPE_GET(x) (((x) >> 4) & 0x3U) x 171 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_FLOWID_GET(x) (((x) >> 8) & 0xfffff) x 172 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_ASSOC_FLOWID_GET(x) (((x) >> 0) & 0xfffff) x 173 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_RPORT_TYPE_GET(x) (((x) >> 0) & 0x1f) x 174 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_NPIV_GET(x) (((x) >> 6) & 0x1) x 175 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_CLASS_GET(x) (((x) >> 4) & 0x3) x 176 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_TASK_RETRY_ID_GET(x) (((x) >> 5) & 0x1) x 177 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_RETRY_GET(x) (((x) >> 4) & 0x1) x 178 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_CONF_CMPL_GET(x) (((x) >> 3) & 0x1) x 179 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_INI_GET(x) (((x) >> 1) & 0x1) x 180 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_RDEV_WR_TGT_GET(x) (((x) >> 0) & 0x1) x 201 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_ELS_CT_WR_OPCODE(x) ((x) << 24) x 202 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_ELS_CT_WR_OPCODE_GET(x) (((x) >> 24) & 0xff) x 203 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_ELS_CT_WR_IMMDLEN(x) ((x) << 0) x 204 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_ELS_CT_WR_IMMDLEN_GET(x) (((x) >> 0) & 0xff) x 205 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_ELS_CT_WR_SP(x) ((x) << 0) x 231 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_SCSI_WRITE_WR_IMMDLEN(x) ((x) << 0) x 257 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_SCSI_READ_WR_IMMDLEN(x) ((x) << 0) x 282 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_SCSI_CMD_WR_IMMDLEN(x) ((x) << 0) x 298 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_SCSI_ABRT_CLS_WR_SUB_OPCODE(x) ((x) << 2) x 299 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_SCSI_ABRT_CLS_WR_SUB_OPCODE_GET(x) (((x) >> 2) & 0x3f) x 300 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_SCSI_ABRT_CLS_WR_CHK_ALL_IO(x) ((x) << 0) x 345 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_LINK_CMD_PORTID(x) ((x) << 0) x 346 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_LINK_CMD_PORTID_GET(x) (((x) >> 0) & 0xf) x 347 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_LINK_CMD_SUB_OPCODE(x) ((x) << 24U) x 348 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_LINK_CMD_FCFI(x) ((x) << 0) x 349 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_LINK_CMD_FCFI_GET(x) (((x) >> 0) & 0xffffff) x 350 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_LINK_CMD_VNPI_GET(x) (((x) >> 0) & 0xfffff) x 365 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_VNP_CMD_FCFI(x) ((x) << 0) x 371 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_VNP_CMD_VNPI(x) ((x) << 0) x 372 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_VNP_CMD_VNPI_GET(x) (((x) >> 0) & 0xfffff) x 385 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_SPARAMS_CMD_PORTID(x) ((x) << 0) x 505 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_STATS_CMD_FLOWID(x) ((x) << 0) x 507 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_STATS_CMD_NSTATS(x) ((x) << 4) x 508 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_STATS_CMD_PORT(x) ((x) << 0) x 510 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_STATS_CMD_IX(x) ((x) << 0) x 531 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_FCF_CMD_FCFI(x) ((x) << 0) x 532 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_FCF_CMD_FCFI_GET(x) (((x) >> 0) & 0xfffff) x 533 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_FCF_CMD_PRIORITY_GET(x) (((x) >> 0) & 0xff) x 534 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_FCF_CMD_FPMA_GET(x) (((x) >> 6) & 0x1) x 535 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_FCF_CMD_SPMA_GET(x) (((x) >> 5) & 0x1) x 536 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_FCF_CMD_LOGIN_GET(x) (((x) >> 4) & 0x1) x 537 drivers/scsi/csiostor/t4fw_api_stor.h #define FW_FCOE_FCF_CMD_PORTID_GET(x) (((x) >> 0) & 0xf) x 422 drivers/scsi/dpt/dpti_i2o.h #define I2O_MESSAGE_SIZE(x) ((x)<<16) x 27 drivers/scsi/dpt/dpti_ioctl.h # define _IOWR(x,y,z) (((x)<<8)|y) x 30 drivers/scsi/dpt/dpti_ioctl.h # define _IOW(x,y,z) (((x)<<8)|y) x 33 drivers/scsi/dpt/dpti_ioctl.h # define _IOR(x,y,z) (((x)<<8)|y) x 36 drivers/scsi/dpt/dpti_ioctl.h # define _IO(x,y) (((x)<<8)|y) x 49 drivers/scsi/dpt/dptsig.h # define sigWORDLittleEndian(x) ((((x)&0xFF)<<8)|(((x)>>8)&0xFF)) x 50 drivers/scsi/dpt/dptsig.h # define sigLONGLittleEndian(x) \ x 51 drivers/scsi/dpt/dptsig.h ((((x)&0xFF)<<24) | \ x 52 drivers/scsi/dpt/dptsig.h (((x)&0xFF00)<<8) | \ x 53 drivers/scsi/dpt/dptsig.h (((x)&0xFF0000L)>>8) | \ x 54 drivers/scsi/dpt/dptsig.h (((x)&0xFF000000L)>>24)) x 56 drivers/scsi/dpt/dptsig.h # define sigWORDLittleEndian(x) (x) x 57 drivers/scsi/dpt/dptsig.h # define sigLONGLittleEndian(x) (x) x 268 drivers/scsi/dpt/osd_util.h #define NET_SWAP_2(x) (((x) >> 8) | ((x) << 8)) x 272 drivers/scsi/dpt/osd_util.h #define NET_SWAP_4(x) netSwap4((x)) x 280 drivers/scsi/dpt/osd_util.h #define NET_SWAP_2(x) (x) x 284 drivers/scsi/dpt/osd_util.h #define NET_SWAP_4(x) (x) x 135 drivers/scsi/esas2r/esas2r.h #define LOBIT(x) ((x) & (0 - (x))) x 77 drivers/scsi/fcoe/fcoe.h #define fcoe_to_ctlr(x) \ x 78 drivers/scsi/fcoe/fcoe.h (struct fcoe_ctlr *)(((struct fcoe_ctlr *)(x)) - 1) x 80 drivers/scsi/fcoe/fcoe.h #define fcoe_from_ctlr(x) \ x 81 drivers/scsi/fcoe/fcoe.h ((struct fcoe_interface *)((x) + 1)) x 45 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_id(x) \ x 46 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->id) x 47 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_work_q_name(x) \ x 48 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->work_q_name) x 49 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_work_q(x) \ x 50 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->work_q) x 51 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_devloss_work_q_name(x) \ x 52 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->devloss_work_q_name) x 53 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_devloss_work_q(x) \ x 54 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->devloss_work_q) x 55 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_mode(x) \ x 56 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->mode) x 57 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_fcf_dev_loss_tmo(x) \ x 58 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->fcf_dev_loss_tmo) x 59 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_link_fail(x) \ x 60 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->lesb.lesb_link_fail) x 61 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_vlink_fail(x) \ x 62 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->lesb.lesb_vlink_fail) x 63 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_miss_fka(x) \ x 64 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->lesb.lesb_miss_fka) x 65 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_symb_err(x) \ x 66 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->lesb.lesb_symb_err) x 67 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_err_block(x) \ x 68 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->lesb.lesb_err_block) x 69 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_fcs_error(x) \ x 70 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->lesb.lesb_fcs_error) x 71 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_ctlr_enabled(x) \ x 72 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->enabled) x 73 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_state(x) \ x 74 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->state) x 75 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_fabric_name(x) \ x 76 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->fabric_name) x 77 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_switch_name(x) \ x 78 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->switch_name) x 79 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_fc_map(x) \ x 80 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->fc_map) x 81 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_vfid(x) \ x 82 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->vfid) x 83 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_mac(x) \ x 84 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->mac) x 85 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_priority(x) \ x 86 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->priority) x 87 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_fka_period(x) \ x 88 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->fka_period) x 89 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_dev_loss_tmo(x) \ x 90 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->dev_loss_tmo) x 91 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_selected(x) \ x 92 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->selected) x 93 drivers/scsi/fcoe/fcoe_sysfs.c #define fcoe_fcf_vlan_id(x) \ x 94 drivers/scsi/fcoe/fcoe_sysfs.c ((x)->vlan_id) x 63 drivers/scsi/g_NCR5380.c #define NCR5380_io_delay(x) udelay(x) x 239 drivers/scsi/hisi_sas/hisi_sas.h #define HISI_SAS_DEBUGFS_REG(x) {#x, x} x 260 drivers/scsi/hpsa_cmd.h #define MASKED_DEVICE(x) ((x)[3] & 0xC0) x 150 drivers/scsi/imm.c #define imm_fail(x,y) printk("imm: imm_fail(%i) from %s at line %d\n",\ x 151 drivers/scsi/imm.c y, __func__, __LINE__); imm_fail_func(x,y); x 781 drivers/scsi/imm.c int retv, x; x 847 drivers/scsi/imm.c x = (r_str(ppb) & 0xb8); x 848 drivers/scsi/imm.c dev->rd = (x & 0x10) ? 1 : 0; x 849 drivers/scsi/imm.c dev->dp = (x & 0x20) ? 0 : 1; x 116 drivers/scsi/imm.h #define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32) x 122 drivers/scsi/imm.h #define r_dtr(x) (unsigned char)inb((x)) x 123 drivers/scsi/imm.h #define r_str(x) (unsigned char)inb((x)+1) x 124 drivers/scsi/imm.h #define r_ctr(x) (unsigned char)inb((x)+2) x 125 drivers/scsi/imm.h #define r_epp(x) (unsigned char)inb((x)+4) x 126 drivers/scsi/imm.h #define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */ x 128 drivers/scsi/imm.h #define r_ecr(x) (unsigned char)inb((x)+2) /* x must be base_hi */ x 130 drivers/scsi/imm.h #define w_dtr(x,y) outb(y, (x)) x 131 drivers/scsi/imm.h #define w_str(x,y) outb(y, (x)+1) x 132 drivers/scsi/imm.h #define w_epp(x,y) outb(y, (x)+4) x 133 drivers/scsi/imm.h #define w_fifo(x,y) outb(y, (x)) /* x must be base_hi */ x 134 drivers/scsi/imm.h #define w_ecr(x,y) outb(y, (x)+0x2) /* x must be base_hi */ x 137 drivers/scsi/imm.h #define w_ctr(x,y) outb_p(y, (x)+2) x 139 drivers/scsi/imm.h #define w_ctr(x,y) outb(y, (x)+2) x 575 drivers/scsi/ipr.h #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK) x 577 drivers/scsi/ipr.h #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK) x 60 drivers/scsi/ips.h #define IPS_HA(x) ((ips_ha_t *) x->hostdata) x 92 drivers/scsi/ips.h #define min(x,y) ((x) < (y) ? x : y) x 107 drivers/scsi/isci/host.c #define NORMALIZE_PUT_POINTER(x) \ x 108 drivers/scsi/isci/host.c ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK) x 117 drivers/scsi/isci/host.c #define NORMALIZE_EVENT_POINTER(x) \ x 119 drivers/scsi/isci/host.c ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \ x 129 drivers/scsi/isci/host.c #define NORMALIZE_GET_POINTER(x) \ x 130 drivers/scsi/isci/host.c ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK) x 138 drivers/scsi/isci/host.c #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \ x 139 drivers/scsi/isci/host.c ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT)) x 146 drivers/scsi/isci/host.c #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000) x 191 drivers/scsi/isci/scu_task_context.h #define scu_get_command_request_type(x) \ x 192 drivers/scsi/isci/scu_task_context.h ((x) & SCU_CONTEXT_COMMAND_REQUEST_TYPE_MASK) x 196 drivers/scsi/isci/scu_task_context.h #define scu_get_command_request_subtype(x) \ x 197 drivers/scsi/isci/scu_task_context.h ((x) & SCU_CONTEXT_COMMAND_REQUEST_SUBTYPE_MASK) x 204 drivers/scsi/isci/scu_task_context.h #define scu_get_command_request_full_type(x) \ x 205 drivers/scsi/isci/scu_task_context.h ((x) & SCU_CONTEXT_COMMAND_REQUEST_FULLTYPE_MASK) x 209 drivers/scsi/isci/scu_task_context.h #define scu_get_command_protocl_engine_group(x) \ x 210 drivers/scsi/isci/scu_task_context.h ((x) & SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_MASK) x 214 drivers/scsi/isci/scu_task_context.h #define scu_get_command_reqeust_logical_port(x) \ x 215 drivers/scsi/isci/scu_task_context.h ((x) & SCU_CONTEXT_COMMAND_LOGICAL_PORT_MASK) x 75 drivers/scsi/libfc/fc_fcp.c #define fc_get_scsi_internal(x) ((struct fc_fcp_internal *)(x)->scsi_priv) x 249 drivers/scsi/libsas/sas_scsi_host.c struct domain_device *x = cmd_to_domain_dev(cmd); x 251 drivers/scsi/libsas/sas_scsi_host.c if (x == dev) x 263 drivers/scsi/libsas/sas_scsi_host.c struct asd_sas_port *x = dev->port; x 265 drivers/scsi/libsas/sas_scsi_host.c if (x == port) x 3851 drivers/scsi/lpfc/lpfc_debugfs.c int max_cnt, rc, x, len = 0; x 3869 drivers/scsi/lpfc/lpfc_debugfs.c x = phba->lpfc_idiag_last_eq; x 3877 drivers/scsi/lpfc/lpfc_debugfs.c x, phba->cfg_hdw_queue); x 3880 drivers/scsi/lpfc/lpfc_debugfs.c qp = phba->sli4_hba.hdwq[x].hba_eq; x 3894 drivers/scsi/lpfc/lpfc_debugfs.c max_cnt, x, qp->queue_id); x 3899 drivers/scsi/lpfc/lpfc_debugfs.c if (x) x 2685 drivers/scsi/lpfc/lpfc_scsi.c uint16_t x; x 2688 drivers/scsi/lpfc/lpfc_scsi.c x = cpu_to_be16(crc); x 2689 drivers/scsi/lpfc/lpfc_scsi.c return x; x 14519 drivers/scsi/lpfc/lpfc_sli.c uint16_t x, pgcnt; x 14554 drivers/scsi/lpfc/lpfc_sli.c for (x = 0; x < queue->page_count; x++) { x 14566 drivers/scsi/lpfc/lpfc_sli.c dmabuf->buffer_tag = x; x 14569 drivers/scsi/lpfc/lpfc_sli.c queue->q_pgs[x] = dmabuf->virt; x 130 drivers/scsi/mac53c94.c int x; x 139 drivers/scsi/mac53c94.c x = readb(®s->interrupt); x 129 drivers/scsi/mac53c94.h #define TIMO_VAL(x) ((x) * 5000 / 7682) x 113 drivers/scsi/mesh.h #define SYNC_OFF(x) ((x) >> 4) /* offset field */ x 114 drivers/scsi/mesh.h #define SYNC_PER(x) ((x) & 0xf) /* period field */ x 1104 drivers/scsi/mpt3sas/mpi/mpi2.h #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> \ x 2697 drivers/scsi/mpt3sas/mpt3sas_base.c #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) x 319 drivers/scsi/mvsas/mv_94xx.h u64 x = ~v; x 320 drivers/scsi/mvsas/mv_94xx.h return x ? __ffs64(x) : -1; x 124 drivers/scsi/pcmcia/sym53c500_cs.c #define REG0(x) (outb(C4_IMG, (x) + CONFIG4)) x 126 drivers/scsi/pcmcia/sym53c500_cs.c #define REG1(x) outb(C7_IMG, (x) + CONFIG7); outb(C5_IMG, (x) + CONFIG5) x 129 drivers/scsi/pcmcia/sym53c500_cs.c #define DEB(x) x x 131 drivers/scsi/pcmcia/sym53c500_cs.c #define DEB(x) x 135 drivers/scsi/pcmcia/sym53c500_cs.c #define VDEB(x) x x 137 drivers/scsi/pcmcia/sym53c500_cs.c #define VDEB(x) x 140 drivers/scsi/pcmcia/sym53c500_cs.c #define LOAD_DMA_COUNT(x, count) \ x 141 drivers/scsi/pcmcia/sym53c500_cs.c outb(count & 0xff, (x) + TC_LSB); \ x 142 drivers/scsi/pcmcia/sym53c500_cs.c outb((count >> 8) & 0xff, (x) + TC_MSB); \ x 143 drivers/scsi/pcmcia/sym53c500_cs.c outb((count >> 16) & 0xff, (x) + TC_HIGH); x 125 drivers/scsi/ppa.c unsigned long x; x 128 drivers/scsi/ppa.c x = simple_strtoul(buffer + 5, NULL, 0); x 129 drivers/scsi/ppa.c dev->mode = x; x 133 drivers/scsi/ppa.c x = simple_strtoul(buffer + 10, NULL, 0); x 134 drivers/scsi/ppa.c dev->recon_tmo = x; x 135 drivers/scsi/ppa.c printk(KERN_INFO "ppa: recon_tmo set to %ld\n", x); x 158 drivers/scsi/ppa.c #define ppa_fail(x,y) printk("ppa: ppa_fail(%i) from %s at line %d\n",\ x 159 drivers/scsi/ppa.c y, __func__, __LINE__); ppa_fail_func(x,y); x 123 drivers/scsi/ppa.h #define IN_EPP_MODE(x) (x == PPA_EPP_8 || x == PPA_EPP_16 || x == PPA_EPP_32) x 129 drivers/scsi/ppa.h #define r_dtr(x) (unsigned char)inb((x)) x 130 drivers/scsi/ppa.h #define r_str(x) (unsigned char)inb((x)+1) x 131 drivers/scsi/ppa.h #define r_ctr(x) (unsigned char)inb((x)+2) x 132 drivers/scsi/ppa.h #define r_epp(x) (unsigned char)inb((x)+4) x 133 drivers/scsi/ppa.h #define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */ x 135 drivers/scsi/ppa.h #define r_ecr(x) (unsigned char)inb((x)+0x2) /* x must be base_hi */ x 137 drivers/scsi/ppa.h #define w_dtr(x,y) outb(y, (x)) x 138 drivers/scsi/ppa.h #define w_str(x,y) outb(y, (x)+1) x 139 drivers/scsi/ppa.h #define w_epp(x,y) outb(y, (x)+4) x 140 drivers/scsi/ppa.h #define w_fifo(x,y) outb(y, (x)) /* x must be base_hi */ x 141 drivers/scsi/ppa.h #define w_ecr(x,y) outb(y, (x)+0x2)/* x must be base_hi */ x 144 drivers/scsi/ppa.h #define w_ctr(x,y) outb_p(y, (x)+2) x 146 drivers/scsi/ppa.h #define w_ctr(x,y) outb(y, (x)+2) x 569 drivers/scsi/qedf/qedf.h #define MIN_NUM_CPUS_MSIX(x) min_t(u32, x->dev_info.num_cqs, \ x 54 drivers/scsi/qedi/qedi.h #define MIN_NUM_CPUS_MSIX(x) min_t(u32, x->dev_info.num_cqs, \ x 112 drivers/scsi/qedi/qedi.h #define QEDI_NEXT_RX_IDX(x) ((((x) & (QEDI_MAX_RX_DESC_CNT)) == \ x 114 drivers/scsi/qedi/qedi.h (x) + 2 : (x) + 1) x 572 drivers/scsi/qla1280.c #define ENTER(x) dprintk(3, "qla1280 : Entering %s()\n", x); x 573 drivers/scsi/qla1280.c #define LEAVE(x) dprintk(3, "qla1280 : Leaving %s()\n", x); x 574 drivers/scsi/qla1280.c #define ENTER_INTR(x) dprintk(4, "qla1280 : Entering %s()\n", x); x 575 drivers/scsi/qla1280.c #define LEAVE_INTR(x) dprintk(4, "qla1280 : Leaving %s()\n", x); x 113 drivers/scsi/qla2xxx/qla_def.h #define LSB(x) ((uint8_t)(x)) x 114 drivers/scsi/qla2xxx/qla_def.h #define MSB(x) ((uint8_t)((uint16_t)(x) >> 8)) x 116 drivers/scsi/qla2xxx/qla_def.h #define LSW(x) ((uint16_t)(x)) x 117 drivers/scsi/qla2xxx/qla_def.h #define MSW(x) ((uint16_t)((uint32_t)(x) >> 16)) x 119 drivers/scsi/qla2xxx/qla_def.h #define LSD(x) ((uint32_t)((uint64_t)(x))) x 120 drivers/scsi/qla2xxx/qla_def.h #define MSD(x) ((uint32_t)((((uint64_t)(x)) >> 16) >> 16)) x 122 drivers/scsi/qla2xxx/qla_def.h #define MAKE_HANDLE(x, y) ((uint32_t)((((uint32_t)(x)) << 16) | (uint32_t)(y))) x 1729 drivers/scsi/qla2xxx/qla_fw.h #define LR_DIST_FW_FIELD(x) ((x) << LR_DIST_FW_SHIFT & 0xf000) x 1171 drivers/scsi/qla2xxx/qla_nx.h #define qla82xx_get_temp_val(x) ((x) >> 16) x 1172 drivers/scsi/qla2xxx/qla_nx.h #define qla82xx_get_temp_state(x) ((x) & 0xffff) x 20 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG(x) do {x;} while (0); x 22 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG(x) do {} while (0); x 26 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG2(x) do {if(ql4xextended_error_logging == 2) x;} while (0); x 27 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG2_3(x) do {x;} while (0); x 29 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG2(x) do {} while (0); x 33 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG3(x) do {if(ql4xextended_error_logging == 3) x;} while (0); x 35 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG3(x) do {} while (0); x 37 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG2_3(x) do {} while (0); x 41 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG4(x) do {x;} while (0); x 43 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG4(x) do {} while (0); x 47 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG5(x) do {x;} while (0); x 49 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG5(x) do {} while (0); x 53 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG7(x) do {x; } while (0) x 55 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG7(x) do {} while (0) x 59 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG9(x) do {x;} while (0); x 61 drivers/scsi/qla4xxx/ql4_dbg.h #define DEBUG9(x) do {} while (0); x 165 drivers/scsi/qla4xxx/ql4_def.h #define LSDW(x) ((u32)((u64)(x))) x 166 drivers/scsi/qla4xxx/ql4_def.h #define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16)) x 31 drivers/scsi/qla4xxx/ql4_nx.h #define qla82xx_get_temp_val(x) ((x) >> 16) x 32 drivers/scsi/qla4xxx/ql4_nx.h #define qla82xx_get_temp_state(x) ((x) & 0xffff) x 80 drivers/scsi/qlogicfas408.c int x; x 84 drivers/scsi/qlogicfas408.c x = inb(qbase + 0xd); x 88 drivers/scsi/qlogicfas408.c if (x & 0x80) x 103 drivers/scsi/qlogicfas408.h #define get_priv_by_cmd(x) (struct qlogicfas408_priv *)&((x)->device->host->hostdata[0]) x 104 drivers/scsi/qlogicfas408.h #define get_priv_by_host(x) (struct qlogicfas408_priv *)&((x)->hostdata[0]) x 56 drivers/scsi/scsi_transport_spi.c #define spi_dv_in_progress(x) (((struct spi_transport_attrs *)&(x)->starget_data)->dv_in_progress) x 57 drivers/scsi/scsi_transport_spi.c #define spi_dv_mutex(x) (((struct spi_transport_attrs *)&(x)->starget_data)->dv_mutex) x 609 drivers/scsi/scsi_transport_spi.c #define DV_SET(x, y) \ x 610 drivers/scsi/scsi_transport_spi.c if(i->f->set_##x) \ x 611 drivers/scsi/scsi_transport_spi.c i->f->set_##x(sdev->sdev_target, y) x 62 drivers/scsi/snic/snic_ctl.c int i = 0, x = 0; x 87 drivers/scsi/snic/snic_ctl.c x |= (v[0] << 24) | v[1] << 16 | v[2] << 8 | v[3]; x 90 drivers/scsi/snic/snic_ctl.c if (x == 0) { x 96 drivers/scsi/snic/snic_ctl.c return x; x 255 drivers/scsi/snic/snic_fwint.h #define SNIC_ICMND_TSK_MASK(x) ((x>>SNIC_ICMND_TSK_SHIFT) & ~(0xffff)) x 494 drivers/scsi/snic/snic_fwint.h #define VERIFY_REQ_SZ(x) x 495 drivers/scsi/snic/snic_fwint.h #define VERIFY_CMPL_SZ(x) x 172 drivers/scsi/st.c #define TAPE_NR(x) ( ((iminor(x) & ~255) >> (ST_NBR_MODE_BITS + 1)) | \ x 173 drivers/scsi/st.c (iminor(x) & ((1 << ST_MODE_SHIFT)-1))) x 174 drivers/scsi/st.c #define TAPE_MODE(x) ((iminor(x) & ST_MODE_MASK) >> ST_MODE_SHIFT) x 534 drivers/scsi/sun3_scsi.c unsigned char x; x 545 drivers/scsi/sun3_scsi.c if (sun3_map_test((unsigned long)dregs, &x)) { x 333 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 335 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0; x < 8; x++) x 336 drivers/scsi/sym53c8xx_2/sym_nvram.c S24C16_do_bit(np, NULL, (write_data >> (7 - x)) & 0x01, gpreg); x 348 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 352 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0; x < 8; x++) { x 354 drivers/scsi/sym53c8xx_2/sym_nvram.c *read_data |= ((read_bit & 0x01) << (7 - x)); x 370 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 390 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0; x < len ; x += 16) { x 394 drivers/scsi/sym53c8xx_2/sym_nvram.c 0xa0 | (((offset+x) >> 7) & 0x0e), x 398 drivers/scsi/sym53c8xx_2/sym_nvram.c S24C16_write_byte(np, &ack_data, (offset+x) & 0xff, x 402 drivers/scsi/sym53c8xx_2/sym_nvram.c S24C16_write_byte(np, &ack_data, data[x+y], x 424 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 472 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0; x < len; x++) x 473 drivers/scsi/sym53c8xx_2/sym_nvram.c S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl); x 503 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 516 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 6, csum = 0; x < len - 6; x++) x 517 drivers/scsi/sym53c8xx_2/sym_nvram.c csum += data[x]; x 594 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 597 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0; x < 9; x++) x 598 drivers/scsi/sym53c8xx_2/sym_nvram.c T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg); x 609 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 613 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0; x < 16; x++) { x 617 drivers/scsi/sym53c8xx_2/sym_nvram.c *nvram_data |= (0x01 << (15 - x)); x 619 drivers/scsi/sym53c8xx_2/sym_nvram.c *nvram_data &= ~(0x01 << (15 - x)); x 629 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 631 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0; x < len; x++) { x 634 drivers/scsi/sym53c8xx_2/sym_nvram.c T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg); x 637 drivers/scsi/sym53c8xx_2/sym_nvram.c T93C46_Read_Word(np, &data[x], gpreg); x 684 drivers/scsi/sym53c8xx_2/sym_nvram.c int x; x 690 drivers/scsi/sym53c8xx_2/sym_nvram.c x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS, x 694 drivers/scsi/sym53c8xx_2/sym_nvram.c x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS, x 696 drivers/scsi/sym53c8xx_2/sym_nvram.c if (!x) x 700 drivers/scsi/sym53c8xx_2/sym_nvram.c x = sym_read_T93C46_nvram(np, nvram); x 703 drivers/scsi/sym53c8xx_2/sym_nvram.c if (x) x 707 drivers/scsi/sym53c8xx_2/sym_nvram.c for (x = 0, csum = 0; x < len - 1; x += 2) x 708 drivers/scsi/sym53c8xx_2/sym_nvram.c csum += data[x] + (data[x+1] << 8); x 732 drivers/scsi/sym53c8xx_2/sym_nvram.c struct pdc_initiator *x) x 84 drivers/scsi/ufs/ufs-qcom.h #define UFS_CNTLR_2_x_x_VEN_REGS_OFFSET(x) (0x000 + x) x 85 drivers/scsi/ufs/ufs-qcom.h #define UFS_CNTLR_3_x_x_VEN_REGS_OFFSET(x) (0x400 + x) x 86 drivers/scsi/ufs/unipro.h #define UNIPRO_CB_OFFSET(x) (0x8000 | x) x 296 drivers/scsi/wd33c93.c uchar x = 0; x 303 drivers/scsi/wd33c93.c x = read_wd33c93(regs, WD_DATA); x 305 drivers/scsi/wd33c93.c return x; x 311 drivers/scsi/wd33c93.c int x; x 313 drivers/scsi/wd33c93.c for (x = 1; sx_table[x].period_ns; x++) { x 314 drivers/scsi/wd33c93.c if ((period <= sx_table[x - 0].period_ns) && x 315 drivers/scsi/wd33c93.c (period > sx_table[x - 1].period_ns)) { x 316 drivers/scsi/wd33c93.c return x; x 1808 drivers/scsi/wd33c93.c int x; x 1811 drivers/scsi/wd33c93.c for (x = 0; x < MAX_SETUP_ARGS; x++) { x 1812 drivers/scsi/wd33c93.c if (setup_used[x]) x 1814 drivers/scsi/wd33c93.c if (!strncmp(setup_args[x], key, strlen(key))) x 1816 drivers/scsi/wd33c93.c if (!strncmp(setup_args[x], "next", strlen("next"))) x 1819 drivers/scsi/wd33c93.c if (x == MAX_SETUP_ARGS) x 1821 drivers/scsi/wd33c93.c setup_used[x] = 1; x 1822 drivers/scsi/wd33c93.c cp = setup_args[x] + strlen(key); x 1825 drivers/scsi/wd33c93.c return ++x; x 1830 drivers/scsi/wd33c93.c return ++x; x 1851 drivers/scsi/wd33c93.c round_4(unsigned int x) x 1853 drivers/scsi/wd33c93.c switch (x & 3) { x 1854 drivers/scsi/wd33c93.c case 1: --x; x 1856 drivers/scsi/wd33c93.c case 2: ++x; x 1858 drivers/scsi/wd33c93.c case 3: ++x; x 1860 drivers/scsi/wd33c93.c return x; x 1893 drivers/scsi/wd33c93.c int x = freq; x 1901 drivers/scsi/wd33c93.c x = WD33C93_FS_8_10; x 1903 drivers/scsi/wd33c93.c x = WD33C93_FS_12_15; x 1905 drivers/scsi/wd33c93.c x = WD33C93_FS_16_20; x 1908 drivers/scsi/wd33c93.c x = WD33C93_FS_8_10; x 1912 drivers/scsi/wd33c93.c return x; x 2057 drivers/scsi/wd33c93.c int x; x 2082 drivers/scsi/wd33c93.c x = simple_strtoul(bp+11, &bp, 0); x 2083 drivers/scsi/wd33c93.c if (x < DIS_NEVER || x > DIS_ALWAYS) x 2084 drivers/scsi/wd33c93.c x = DIS_ADAPTIVE; x 2085 drivers/scsi/wd33c93.c hd->disconnect = x; x 2087 drivers/scsi/wd33c93.c x = simple_strtoul(bp+7, &bp, 0); x 2089 drivers/scsi/wd33c93.c hd->sx_table[round_period((unsigned int) x, x 2103 drivers/scsi/wd33c93.c x = !!simple_strtol(bp+5, &bp, 0); x 2104 drivers/scsi/wd33c93.c if (x != hd->fast) x 2106 drivers/scsi/wd33c93.c hd->fast = x; x 2108 drivers/scsi/wd33c93.c x = simple_strtoul(bp+7, &bp, 0); x 2109 drivers/scsi/wd33c93.c set_resync(hd, x ^ hd->no_sync); x 2110 drivers/scsi/wd33c93.c hd->no_sync = x; x 2127 drivers/scsi/wd33c93.c int x; x 2141 drivers/scsi/wd33c93.c for (x = 0; x < 7; x++) x 2142 drivers/scsi/wd33c93.c seq_printf(m, "\t%02x", hd->sync_xfer[x]); x 2144 drivers/scsi/wd33c93.c for (x = 0; x < 7; x++) x 2145 drivers/scsi/wd33c93.c seq_printf(m, "\t%02x", hd->sync_stat[x]); x 2150 drivers/scsi/wd33c93.c for (x = 0; x < 7; x++) x 2151 drivers/scsi/wd33c93.c seq_printf(m, "\t%ld", hd->cmd_cnt[x]); x 2153 drivers/scsi/wd33c93.c for (x = 0; x < 7; x++) x 2154 drivers/scsi/wd33c93.c seq_printf(m, "\t%ld", hd->disc_allowed_cnt[x]); x 2156 drivers/scsi/wd33c93.c for (x = 0; x < 7; x++) x 2157 drivers/scsi/wd33c93.c seq_printf(m, "\t%ld", hd->disc_done_cnt[x]); x 157 drivers/sh/intc/chip.c #define VALID(x) (x | SENSE_VALID_FLAG) x 23 drivers/sh/intc/internals.h #define IS_SMP(x) (x.smp) x 24 drivers/sh/intc/internals.h #define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c)) x 25 drivers/sh/intc/internals.h #define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1) x 27 drivers/sh/intc/internals.h #define IS_SMP(x) 0 x 28 drivers/sh/intc/internals.h #define INTC_REG(d, x, c) (d->reg[(x)]) x 29 drivers/sh/intc/internals.h #define SMP_NR(d, x) 1 x 448 drivers/sh/maple/maple.c int x, locking; x 471 drivers/sh/maple/maple.c for (x = 0; x < MAPLE_PORTS; x++) { x 472 drivers/sh/maple/maple.c if (checked[x] && empty[x]) { x 473 drivers/sh/maple/maple.c mdev = baseunits[x]; x 28 drivers/soc/atmel/soc.c #define AT91_CIDR_VERSION(x) ((x) & 0x1f) x 19 drivers/soc/bcm/brcmstb/biuctrl.c #define CPU_CREDIT_REG_MCPx_READ_CRED_SHIFT(x) ((x) * 8) x 20 drivers/soc/bcm/brcmstb/biuctrl.c #define CPU_CREDIT_REG_MCPx_WRITE_CRED_SHIFT(x) (((x) * 8) + 4) x 22 drivers/soc/bcm/brcmstb/biuctrl.c #define CPU_MCP_FLOW_REG_MCPx_RDBUFF_CRED_SHIFT(x) ((x) * 8) x 86 drivers/soc/fsl/qbman/dpaa_sys.h #define DPAA_ASSERT(x) WARN_ON(!(x)) x 88 drivers/soc/fsl/qbman/dpaa_sys.h #define DPAA_ASSERT(x) x 100 drivers/soc/fsl/qbman/qman_priv.h #define CGR_WORD(x) ((x) >> CGR_BITS_PER_WORD) x 101 drivers/soc/fsl/qbman/qman_priv.h #define CGR_BIT(x) (BIT(31) >> ((x) & 0x1f)) x 27 drivers/soc/mediatek/mtk-pmic-wrap.c #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff) x 28 drivers/soc/mediatek/mtk-pmic-wrap.c #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007) x 29 drivers/soc/mediatek/mtk-pmic-wrap.c #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001) x 127 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_CNTRL(x) (0x000 + ((x) << 2)) x 129 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_MASK_W(x) (0x180 + ((x) << 2)) x 130 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_MASK_R(x) (0x300 + ((x) << 2)) x 131 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_STATUS_W(x) (0x30c + ((x) << 2)) x 132 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_STATUS_R(x) (0x48c + ((x) << 2)) x 133 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_TIER0_ROUTING(x) (0x4b4 + ((x) << 2)) x 134 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_TIER1_ROUTING(x) (0x4c0 + ((x) << 2)) x 135 drivers/soc/tegra/pmc.c #define WAKE_AOWAKE_TIER2_ROUTING(x) (0x4cc + ((x) << 2)) x 29 drivers/soundwire/intel.c #define SDW_SHIM_CTLSCAP(x) (0x010 + 0x60 * (x)) x 30 drivers/soundwire/intel.c #define SDW_SHIM_CTLS0CM(x) (0x012 + 0x60 * (x)) x 31 drivers/soundwire/intel.c #define SDW_SHIM_CTLS1CM(x) (0x014 + 0x60 * (x)) x 32 drivers/soundwire/intel.c #define SDW_SHIM_CTLS2CM(x) (0x016 + 0x60 * (x)) x 33 drivers/soundwire/intel.c #define SDW_SHIM_CTLS3CM(x) (0x018 + 0x60 * (x)) x 34 drivers/soundwire/intel.c #define SDW_SHIM_PCMSCAP(x) (0x020 + 0x60 * (x)) x 36 drivers/soundwire/intel.c #define SDW_SHIM_PCMSYCHM(x, y) (0x022 + (0x60 * (x)) + (0x2 * (y))) x 37 drivers/soundwire/intel.c #define SDW_SHIM_PCMSYCHC(x, y) (0x042 + (0x60 * (x)) + (0x2 * (y))) x 38 drivers/soundwire/intel.c #define SDW_SHIM_PDMSCAP(x) (0x062 + 0x60 * (x)) x 39 drivers/soundwire/intel.c #define SDW_SHIM_IOCTL(x) (0x06C + 0x60 * (x)) x 40 drivers/soundwire/intel.c #define SDW_SHIM_CTMCTL(x) (0x06E + 0x60 * (x)) x 87 drivers/soundwire/intel.c #define SDW_ALH_STRMZCFG(x) (0x000 + (0x4 * (x))) x 16 drivers/spi/spi-axi-spi-engine.c #define SPI_ENGINE_VERSION_MAJOR(x) ((x >> 16) & 0xff) x 17 drivers/spi/spi-axi-spi-engine.c #define SPI_ENGINE_VERSION_MINOR(x) ((x >> 8) & 0xff) x 18 drivers/spi/spi-axi-spi-engine.c #define SPI_ENGINE_VERSION_PATCH(x) (x & 0xff) x 47 drivers/spi/spi-bcm63xx-hsspi.c #define HSSPI_PINGPONG_COMMAND_REG(x) (0x80 + (x) * 0x40) x 57 drivers/spi/spi-bcm63xx-hsspi.c #define HSSPI_PINGPONG_STATUS_REG(x) (0x84 + (x) * 0x40) x 59 drivers/spi/spi-bcm63xx-hsspi.c #define HSSPI_PROFILE_CLK_CTRL_REG(x) (0x100 + (x) * 0x20) x 64 drivers/spi/spi-bcm63xx-hsspi.c #define HSSPI_PROFILE_SIGNAL_CTRL_REG(x) (0x104 + (x) * 0x20) x 69 drivers/spi/spi-bcm63xx-hsspi.c #define HSSPI_PROFILE_MODE_CTRL_REG(x) (0x108 + (x) * 0x20) x 77 drivers/spi/spi-bcm63xx-hsspi.c #define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200) x 26 drivers/spi/spi-cavium.h #define OCTEON_SPI_CFG(x) (x->regs.config) x 27 drivers/spi/spi-cavium.h #define OCTEON_SPI_STS(x) (x->regs.status) x 28 drivers/spi/spi-cavium.h #define OCTEON_SPI_TX(x) (x->regs.tx) x 29 drivers/spi/spi-cavium.h #define OCTEON_SPI_DAT0(x) (x->regs.data) x 21 drivers/spi/spi-clps711x.c #define SYNCIO_FRMLEN(x) ((x) << 8) x 44 drivers/spi/spi-dw-mmio.c #define MSCC_SPI_MST_SW_MODE_SW_SPI_CS(x) (x << 5) x 38 drivers/spi/spi-fsl-dspi.c #define SPI_TCR_GET_TCNT(x) (((x) & GENMASK(31, 16)) >> 16) x 40 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR(x) (0x0c + (((x) & GENMASK(1, 0)) * 4)) x 41 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_FMSZ(x) (((x) << 27) & GENMASK(30, 27)) x 45 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_PCSSCK(x) (((x) << 22) & GENMASK(23, 22)) x 46 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_PASC(x) (((x) << 20) & GENMASK(21, 20)) x 47 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_PDT(x) (((x) << 18) & GENMASK(19, 18)) x 48 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_PBR(x) (((x) << 16) & GENMASK(17, 16)) x 49 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_CSSCK(x) (((x) << 12) & GENMASK(15, 12)) x 50 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_ASC(x) (((x) << 8) & GENMASK(11, 8)) x 51 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_DT(x) (((x) << 4) & GENMASK(7, 4)) x 52 drivers/spi/spi-fsl-dspi.c #define SPI_CTAR_BR(x) ((x) & GENMASK(3, 0)) x 85 drivers/spi/spi-fsl-dspi.c #define SPI_PUSHR_CMD_CTAS(x) (((x) << 12 & GENMASK(14, 12))) x 88 drivers/spi/spi-fsl-dspi.c #define SPI_PUSHR_CMD_PCS(x) (BIT(x) & GENMASK(5, 0)) x 103 drivers/spi/spi-fsl-dspi.c #define SPI_CTARE(x) (0x11c + (((x) & GENMASK(1, 0)) * 4)) x 104 drivers/spi/spi-fsl-dspi.c #define SPI_CTARE_FMSZE(x) (((x) & 0x1) << 16) x 105 drivers/spi/spi-fsl-dspi.c #define SPI_CTARE_DTCP(x) ((x) & 0x7ff) x 31 drivers/spi/spi-fsl-espi.c #define ESPI_SPMODEx(x) (ESPI_SPMODE0 + (x) * 4) x 36 drivers/spi/spi-fsl-espi.c #define SPMODE_TXTHR(x) ((x) << 8) x 37 drivers/spi/spi-fsl-espi.c #define SPMODE_RXTHR(x) ((x) << 0) x 44 drivers/spi/spi-fsl-espi.c #define CSMODE_PM(x) ((x) << 24) x 46 drivers/spi/spi-fsl-espi.c #define CSMODE_LEN(x) ((x) << 16) x 47 drivers/spi/spi-fsl-espi.c #define CSMODE_BEF(x) ((x) << 12) x 48 drivers/spi/spi-fsl-espi.c #define CSMODE_AFT(x) ((x) << 8) x 49 drivers/spi/spi-fsl-espi.c #define CSMODE_CG(x) ((x) << 3) x 80 drivers/spi/spi-fsl-espi.c #define SPCOM_CS(x) ((x) << 30) x 83 drivers/spi/spi-fsl-espi.c #define SPCOM_RXSKIP(x) ((x) << 16) x 84 drivers/spi/spi-fsl-espi.c #define SPCOM_TRANLEN(x) ((x) << 0) x 64 drivers/spi/spi-fsl-qspi.c #define QUADSPI_IPCR_SEQID(x) ((x) << 24) x 73 drivers/spi/spi-fsl-qspi.c #define QUADSPI_BUF3CR_ADATSZ(x) ((x) << 8) x 77 drivers/spi/spi-fsl-qspi.c #define QUADSPI_BFGENCR_SEQID(x) ((x) << 12) x 114 drivers/spi/spi-fsl-qspi.c #define QUADSPI_RBDR(x) (0x200 + ((x) * 4)) x 154 drivers/spi/spi-fsl-qspi.c #define LUT_PAD(x) (fls(x) - 1) x 43 drivers/spi/spi-fsl-spi.h #define SPMODE_LEN(x) ((x) << 20) x 44 drivers/spi/spi-fsl-spi.h #define SPMODE_PM(x) ((x) << 16) x 46 drivers/spi/spi-fsl-spi.h #define SPMODE_CG(x) ((x) << 7) x 49 drivers/spi/spi-fsl-spi.h #define SPCAP_SSEN(x) (((x) >> 16) & 0x1) x 50 drivers/spi/spi-fsl-spi.h #define SPCAP_SSSZ(x) (((x) >> 24) & 0xff) x 51 drivers/spi/spi-fsl-spi.h #define SPCAP_MAXWLEN(x) (((x) >> 20) & 0xf) x 25 drivers/spi/spi-img-spfi.c #define SPFI_DEVICE_PARAMETER(x) (0x00 + 0x4 * (x)) x 55 drivers/spi/spi-img-spfi.c #define SPFI_PORT_STATE_CK_POL(x) BIT(19 - (x)) x 56 drivers/spi/spi-img-spfi.c #define SPFI_PORT_STATE_CK_PHASE(x) BIT(14 - (x)) x 752 drivers/spi/spi-loopback-test.c struct spi_transfer *x; x 763 drivers/spi/spi-loopback-test.c x = &test->transfers[i]; x 766 drivers/spi/spi-loopback-test.c ret = spi_test_translate(spi, (void **)&x->tx_buf, x->len, x 772 drivers/spi/spi-loopback-test.c ret = spi_test_translate(spi, &x->rx_buf, x->len, x 778 drivers/spi/spi-loopback-test.c spi_message_add_tail(x, msg); x 21 drivers/spi/spi-mxic.c #define HC_CFG_IF_CFG(x) ((x) << 27) x 24 drivers/spi/spi-mxic.c #define HC_CFG_NIO(x) (((x) / 4) << 27) x 30 drivers/spi/spi-mxic.c #define HC_CFG_SLV_ACT(x) ((x) << 21) x 35 drivers/spi/spi-mxic.c #define HC_CFG_IDLE_SIO_LVL(x) ((x) << 16) x 62 drivers/spi/spi-mxic.c #define TXD(x) (0x14 + ((x) * 4)) x 70 drivers/spi/spi-mxic.c #define OP_DUMMY_CYC(x) ((x) << 17) x 71 drivers/spi/spi-mxic.c #define OP_ADDR_BYTES(x) ((x) << 14) x 72 drivers/spi/spi-mxic.c #define OP_CMD_BYTES(x) (((x) - 1) << 13) x 78 drivers/spi/spi-mxic.c #define OP_DATA_BUSW(x) ((x) << 6) x 80 drivers/spi/spi-mxic.c #define OP_ADDR_BUSW(x) ((x) << 3) x 82 drivers/spi/spi-mxic.c #define OP_CMD_BUSW(x) (x) x 90 drivers/spi/spi-mxic.c #define OCTA_CRC_CHUNK(s, x) ((fls((x) / 32)) << (1 + ((s) * 16))) x 99 drivers/spi/spi-mxic.c #define LMODE_SLV_ACT(x) ((x) << 21) x 100 drivers/spi/spi-mxic.c #define LMODE_CMD1(x) ((x) << 8) x 101 drivers/spi/spi-mxic.c #define LMODE_CMD0(x) (x) x 115 drivers/spi/spi-mxic.c #define DMAC_CFG_QE(x) (((x) + 1) << 16) x 116 drivers/spi/spi-mxic.c #define DMAC_CFG_BURST_LEN(x) (((x) + 1) << 12) x 117 drivers/spi/spi-mxic.c #define DMAC_CFG_BURST_SZ(x) ((x) << 8) x 129 drivers/spi/spi-mxic.c #define DMAM_CFG_SDMA_GAP(x) (fls((x) / 8192) << 2) x 138 drivers/spi/spi-mxic.c #define RDM_CFG0_POLY(x) (x) x 142 drivers/spi/spi-mxic.c #define RDM_CFG1_SEED(x) (x) x 156 drivers/spi/spi-mxic.c #define IDLY_CODE(x) (0xa4 + ((x) * 4)) x 157 drivers/spi/spi-mxic.c #define IDLY_CODE_VAL(x, v) ((v) << (((x) % 4) * 8)) x 160 drivers/spi/spi-mxic.c #define GPIO_PT(x) BIT(3 + ((x) * 16)) x 161 drivers/spi/spi-mxic.c #define GPIO_RESET(x) BIT(2 + ((x) * 16)) x 162 drivers/spi/spi-mxic.c #define GPIO_HOLDB(x) BIT(1 + ((x) * 16)) x 163 drivers/spi/spi-mxic.c #define GPIO_WPB(x) BIT((x) * 16) x 167 drivers/spi/spi-mxic.c #define HW_TEST(x) (0xe0 + ((x) * 4)) x 64 drivers/spi/spi-nxp-fspi.c #define FSPI_MCR0_AHB_TIMEOUT(x) ((x) << 24) x 65 drivers/spi/spi-nxp-fspi.c #define FSPI_MCR0_IP_TIMEOUT(x) ((x) << 16) x 74 drivers/spi/spi-nxp-fspi.c #define FSPI_MCR0_RXCLKSRC(x) ((x) << 4) x 75 drivers/spi/spi-nxp-fspi.c #define FSPI_MCR0_END_CFG(x) ((x) << 2) x 80 drivers/spi/spi-nxp-fspi.c #define FSPI_MCR1_SEQ_TIMEOUT(x) ((x) << 16) x 81 drivers/spi/spi-nxp-fspi.c #define FSPI_MCR1_AHB_TIMEOUT(x) (x) x 84 drivers/spi/spi-nxp-fspi.c #define FSPI_MCR2_IDLE_WAIT(x) ((x) << 24) x 163 drivers/spi/spi-nxp-fspi.c #define FSPI_FLSHXCR0_SZ(x) ((x) >> FSPI_FLSHXCR0_SZ_KB) x 169 drivers/spi/spi-nxp-fspi.c #define FSPI_FLSHXCR1_CSINTR(x) ((x) << 16) x 170 drivers/spi/spi-nxp-fspi.c #define FSPI_FLSHXCR1_CAS(x) ((x) << 11) x 172 drivers/spi/spi-nxp-fspi.c #define FSPI_FLSHXCR1_TCSH(x) ((x) << 5) x 173 drivers/spi/spi-nxp-fspi.c #define FSPI_FLSHXCR1_TCSS(x) (x) x 192 drivers/spi/spi-nxp-fspi.c #define FSPI_IPCR1_IDATSZ(x) (x) x 202 drivers/spi/spi-nxp-fspi.c #define FSPI_IPRXFCR_WMRK(x) ((x) << 2) x 207 drivers/spi/spi-nxp-fspi.c #define FSPI_IPTXFCR_WMRK(x) ((x) << 2) x 216 drivers/spi/spi-nxp-fspi.c #define FSPI_STS0_DLPHB(x) ((x) << 8) x 217 drivers/spi/spi-nxp-fspi.c #define FSPI_STS0_DLPHA(x) ((x) << 4) x 218 drivers/spi/spi-nxp-fspi.c #define FSPI_STS0_CMD_SRC(x) ((x) << 2) x 223 drivers/spi/spi-nxp-fspi.c #define FSPI_STS1_IP_ERRCD(x) ((x) << 24) x 224 drivers/spi/spi-nxp-fspi.c #define FSPI_STS1_IP_ERRID(x) ((x) << 16) x 225 drivers/spi/spi-nxp-fspi.c #define FSPI_STS1_AHB_ERRCD(x) ((x) << 8) x 226 drivers/spi/spi-nxp-fspi.c #define FSPI_STS1_AHB_ERRID(x) (x) x 229 drivers/spi/spi-nxp-fspi.c #define FSPI_AHBSPNST_DATLFT(x) ((x) << 16) x 230 drivers/spi/spi-nxp-fspi.c #define FSPI_AHBSPNST_BUFID(x) ((x) << 1) x 234 drivers/spi/spi-nxp-fspi.c #define FSPI_IPRXFSTS_RDCNTR(x) ((x) << 16) x 235 drivers/spi/spi-nxp-fspi.c #define FSPI_IPRXFSTS_FILL(x) (x) x 238 drivers/spi/spi-nxp-fspi.c #define FSPI_IPTXFSTS_WRCNTR(x) ((x) << 16) x 239 drivers/spi/spi-nxp-fspi.c #define FSPI_IPTXFSTS_FILL(x) (x) x 289 drivers/spi/spi-nxp-fspi.c #define LUT_PAD(x) (fls(x) - 1) x 42 drivers/spi/spi-omap-100k.c #define SPI_SETUP1_CLOCK_DIVISOR(x) ((x) << 1) x 52 drivers/spi/spi-omap-100k.c #define SPI_CTRL_SEN(x) ((x) << 7) x 53 drivers/spi/spi-omap-100k.c #define SPI_CTRL_WORD_SIZE(x) (((x) - 1) << 2) x 357 drivers/spi/spi-omap2-mcspi.c struct completion *x) x 360 drivers/spi/spi-omap2-mcspi.c if (wait_for_completion_interruptible(x) || x 364 drivers/spi/spi-omap2-mcspi.c wait_for_completion(x); x 435 drivers/spi/spi-omap2-mcspi.c int nb_sizes = 0, out_mapped_nents[2], ret, x; x 526 drivers/spi/spi-omap2-mcspi.c for (x = 0; x < nb_sizes; x++) x 527 drivers/spi/spi-omap2-mcspi.c kfree(sg_out[x]); x 333 drivers/spi/spi-pic32-sqi.c struct spi_transfer *x) x 67 drivers/spi/spi-qup.c #define QUP_IO_M_OUTPUT_BLOCK_SIZE(x) (((x) & (0x03 << 0)) >> 0) x 68 drivers/spi/spi-qup.c #define QUP_IO_M_OUTPUT_FIFO_SIZE(x) (((x) & (0x07 << 2)) >> 2) x 69 drivers/spi/spi-qup.c #define QUP_IO_M_INPUT_BLOCK_SIZE(x) (((x) & (0x03 << 5)) >> 5) x 70 drivers/spi/spi-qup.c #define QUP_IO_M_INPUT_FIFO_SIZE(x) (((x) & (0x07 << 7)) >> 7) x 105 drivers/spi/spi-qup.c #define SPI_IO_C_CS_SELECT(x) (((x) & 3) << 2) x 13 drivers/spi/spi-s3c24xx-fiq.h #define __REG_NR(x) r##x x 15 drivers/spi/spi-s3c24xx-fiq.h #define __REG_NR(x) (x) x 118 drivers/spi/spi-s3c64xx.c #define is_polling(x) (x->port_conf->quirks & S3C64XX_SPI_QUIRK_POLL) x 652 drivers/spi/spi-sh-msiof.c struct completion *x) x 655 drivers/spi/spi-sh-msiof.c if (wait_for_completion_interruptible(x) || x 661 drivers/spi/spi-sh-msiof.c if (!wait_for_completion_timeout(x, HZ)) { x 74 drivers/spi/spi-sh-sci.c #define spidelay(x) ndelay(x) x 58 drivers/spi/spi-sifive.c #define SIFIVE_SPI_DELAY0_CSSCK(x) ((u32)(x)) x 60 drivers/spi/spi-sifive.c #define SIFIVE_SPI_DELAY0_SCKCS(x) ((u32)(x) << 16) x 64 drivers/spi/spi-sifive.c #define SIFIVE_SPI_DELAY1_INTERCS(x) ((u32)(x)) x 66 drivers/spi/spi-sifive.c #define SIFIVE_SPI_DELAY1_INTERXFR(x) ((u32)(x) << 16) x 76 drivers/spi/spi-sifive.c #define SIFIVE_SPI_FMT_LEN(x) ((u32)(x) << 16) x 43 drivers/spi/spi-sirf.c #define SIRFSOC_SPI_CMD_BYTE_NUM(x) ((x & 3) << 28) x 154 drivers/spi/spi-sirf.c #define ALIGNED(x) (!((u32)x & 0x3)) x 155 drivers/spi/spi-sirf.c #define IS_DMA_VALID(x) (x && ALIGNED(x->tx_buf) && ALIGNED(x->rx_buf) && \ x 156 drivers/spi/spi-sirf.c ALIGNED(x->len) && (x->len < 2 * PAGE_SIZE)) x 28 drivers/spi/spi-tegra114.c #define SPI_BIT_LENGTH(x) (((x) & 0x1f) << 0) x 54 drivers/spi/spi-tegra114.c #define SPI_CS_SEL(x) (((x) & 0x3) << 26) x 60 drivers/spi/spi-tegra114.c #define SPI_MODE_SEL(x) (((x) & 0x3) << 28) x 65 drivers/spi/spi-tegra114.c #define SPI_TX_TAP_DELAY(x) (((x) & 0x3F) << 6) x 66 drivers/spi/spi-tegra114.c #define SPI_RX_TAP_DELAY(x) (((x) & 0x3F) << 0) x 75 drivers/spi/spi-tegra114.c #define CYCLES_BETWEEN_PACKETS_0(x) (((x) & 0x1F) << 0) x 77 drivers/spi/spi-tegra114.c #define CYCLES_BETWEEN_PACKETS_1(x) (((x) & 0x1F) << 8) x 79 drivers/spi/spi-tegra114.c #define CYCLES_BETWEEN_PACKETS_2(x) (((x) & 0x1F) << 16) x 81 drivers/spi/spi-tegra114.c #define CYCLES_BETWEEN_PACKETS_3(x) (((x) & 0x1F) << 24) x 139 drivers/spi/spi-tegra114.c #define SPI_DMA_BLK_SET(x) (((x) & 0xFFFF) << 0) x 313 drivers/spi/spi-tegra114.c u32 x = 0; x 316 drivers/spi/spi-tegra114.c x |= (u32)(*tx_buf++) << (i * 8); x 317 drivers/spi/spi-tegra114.c tegra_spi_writel(tspi, x, SPI_TX_FIFO); x 330 drivers/spi/spi-tegra114.c u32 x = 0; x 334 drivers/spi/spi-tegra114.c x |= (u32)(*tx_buf++) << (i * 8); x 335 drivers/spi/spi-tegra114.c tegra_spi_writel(tspi, x, SPI_TX_FIFO); x 359 drivers/spi/spi-tegra114.c u32 x = tegra_spi_readl(tspi, SPI_RX_FIFO); x 362 drivers/spi/spi-tegra114.c *rx_buf++ = (x >> i*8) & 0xFF; x 376 drivers/spi/spi-tegra114.c u32 x = tegra_spi_readl(tspi, SPI_RX_FIFO) & rx_mask; x 379 drivers/spi/spi-tegra114.c *rx_buf++ = (x >> (i*8)) & 0xFF; x 411 drivers/spi/spi-tegra114.c u32 x = 0; x 415 drivers/spi/spi-tegra114.c x |= (u32)(*tx_buf++) << (i * 8); x 416 drivers/spi/spi-tegra114.c tspi->tx_dma_buf[count] = x; x 451 drivers/spi/spi-tegra114.c u32 x = tspi->rx_dma_buf[count] & rx_mask; x 455 drivers/spi/spi-tegra114.c *rx_buf++ = (x >> (i*8)) & 0xFF; x 59 drivers/spi/spi-tegra20-sflash.c #define SPI_BIT_LENGTH(x) (((x) & 0x1f) << 0) x 187 drivers/spi/spi-tegra20-sflash.c u32 x = 0; x 191 drivers/spi/spi-tegra20-sflash.c x |= (u32)(*tx_buf++) << (i * 8); x 192 drivers/spi/spi-tegra20-sflash.c tegra_sflash_writel(tsd, x, SPI_TX_FIFO); x 212 drivers/spi/spi-tegra20-sflash.c u32 x = tegra_sflash_readl(tsd, SPI_RX_FIFO); x 215 drivers/spi/spi-tegra20-sflash.c *rx_buf++ = (x >> (i*8)) & 0xFF; x 28 drivers/spi/spi-tegra20-slink.c #define SLINK_BIT_LENGTH(x) (((x) & 0x1f) << 0) x 29 drivers/spi/spi-tegra20-slink.c #define SLINK_WORD_SIZE(x) (((x) & 0x1f) << 5) x 61 drivers/spi/spi-tegra20-slink.c #define SLINK_INT_SIZE(x) (((x) & 0x1f) << 8) x 63 drivers/spi/spi-tegra20-slink.c #define SLINK_SS_EN_CS(x) (((x) & 0x3) << 18) x 64 drivers/spi/spi-tegra20-slink.c #define SLINK_SS_SETUP(x) (((x) & 0x3) << 20) x 70 drivers/spi/spi-tegra20-slink.c #define SLINK_WAIT_PACK_INT(x) (((x) & 0x7) << 26) x 103 drivers/spi/spi-tegra20-slink.c #define SLINK_DMA_BLOCK_SIZE(x) (((x) & 0xffff) << 0) x 310 drivers/spi/spi-tegra20-slink.c u32 x = 0; x 312 drivers/spi/spi-tegra20-slink.c x |= (u32)(*tx_buf++) << (i * 8); x 313 drivers/spi/spi-tegra20-slink.c tegra_slink_writel(tspi, x, SLINK_TX_FIFO); x 320 drivers/spi/spi-tegra20-slink.c u32 x = 0; x 323 drivers/spi/spi-tegra20-slink.c x |= (u32)(*tx_buf++) << (i * 8); x 324 drivers/spi/spi-tegra20-slink.c tegra_slink_writel(tspi, x, SLINK_TX_FIFO); x 346 drivers/spi/spi-tegra20-slink.c u32 x = tegra_slink_readl(tspi, SLINK_RX_FIFO); x 348 drivers/spi/spi-tegra20-slink.c *rx_buf++ = (x >> i*8) & 0xFF; x 354 drivers/spi/spi-tegra20-slink.c u32 x = tegra_slink_readl(tspi, SLINK_RX_FIFO); x 356 drivers/spi/spi-tegra20-slink.c *rx_buf++ = (x >> (i*8)) & 0xFF; x 381 drivers/spi/spi-tegra20-slink.c u32 x = 0; x 384 drivers/spi/spi-tegra20-slink.c x |= (u32)(*tx_buf++) << (i * 8); x 385 drivers/spi/spi-tegra20-slink.c tspi->tx_dma_buf[count] = x; x 414 drivers/spi/spi-tegra20-slink.c u32 x = tspi->rx_dma_buf[count] & rx_mask; x 416 drivers/spi/spi-tegra20-slink.c *rx_buf++ = (x >> (i*8)) & 0xFF; x 35 drivers/spi/spi-topcliff-pch.c #define PCH_READABLE(x) (((x) & PCH_SPSR_RFD)>>11) x 36 drivers/spi/spi-topcliff-pch.c #define PCH_WRITABLE(x) (((x) & PCH_SPSR_TFD)>>6) x 3609 drivers/spi/spi.c struct spi_transfer x[2]; x 3627 drivers/spi/spi.c memset(x, 0, sizeof(x)); x 3629 drivers/spi/spi.c x[0].len = n_tx; x 3630 drivers/spi/spi.c spi_message_add_tail(&x[0], &message); x 3633 drivers/spi/spi.c x[1].len = n_rx; x 3634 drivers/spi/spi.c spi_message_add_tail(&x[1], &message); x 3638 drivers/spi/spi.c x[0].tx_buf = local_buf; x 3639 drivers/spi/spi.c x[1].rx_buf = local_buf + n_tx; x 3644 drivers/spi/spi.c memcpy(rxbuf, x[1].rx_buf, n_rx); x 3646 drivers/spi/spi.c if (x[0].tx_buf == buf) x 24 drivers/staging/android/ion/ion_cma_heap.c #define to_cma_heap(x) container_of(x, struct ion_cma_heap, heap) x 1009 drivers/staging/comedi/comedi.h #define _TERM_N(base, n, x) ((base) + ((x) & ((n) - 1))) x 1014 drivers/staging/comedi/comedi.h #define NI_PFI(x) _TERM_N(NI_NAMES_BASE, 64, x) x 1016 drivers/staging/comedi/comedi.h #define TRIGGER_LINE(x) _TERM_N(NI_PFI(-1) + 1, 8, x) x 1018 drivers/staging/comedi/comedi.h #define NI_RTSI_BRD(x) _TERM_N(TRIGGER_LINE(-1) + 1, 4, x) x 1023 drivers/staging/comedi/comedi.h #define NI_CtrSource(x) _TERM_N(NI_COUNTER_NAMES_BASE, NI_MAX_COUNTERS, x) x 1026 drivers/staging/comedi/comedi.h #define NI_CtrGate(x) _TERM_N(NI_GATES_NAMES_BASE, NI_MAX_COUNTERS, x) x 1027 drivers/staging/comedi/comedi.h #define NI_CtrAux(x) _TERM_N(NI_CtrGate(-1) + 1, NI_MAX_COUNTERS, x) x 1028 drivers/staging/comedi/comedi.h #define NI_CtrA(x) _TERM_N(NI_CtrAux(-1) + 1, NI_MAX_COUNTERS, x) x 1029 drivers/staging/comedi/comedi.h #define NI_CtrB(x) _TERM_N(NI_CtrA(-1) + 1, NI_MAX_COUNTERS, x) x 1030 drivers/staging/comedi/comedi.h #define NI_CtrZ(x) _TERM_N(NI_CtrB(-1) + 1, NI_MAX_COUNTERS, x) x 1032 drivers/staging/comedi/comedi.h #define NI_CtrArmStartTrigger(x) _TERM_N(NI_CtrZ(-1) + 1, NI_MAX_COUNTERS, x) x 1033 drivers/staging/comedi/comedi.h #define NI_CtrInternalOutput(x) \ x 1034 drivers/staging/comedi/comedi.h _TERM_N(NI_CtrArmStartTrigger(-1) + 1, NI_MAX_COUNTERS, x) x 1036 drivers/staging/comedi/comedi.h #define NI_CtrOut(x) _TERM_N(NI_CtrInternalOutput(-1) + 1, NI_MAX_COUNTERS, x) x 1038 drivers/staging/comedi/comedi.h #define NI_CtrSampleClock(x) _TERM_N(NI_CtrOut(-1) + 1, NI_MAX_COUNTERS, x) x 1106 drivers/staging/comedi/comedi.h #define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x))) x 1107 drivers/staging/comedi/comedi.h #define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b) x 1207 drivers/staging/comedi/comedi.h #define NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(x) (0x10 + (x)) x 1209 drivers/staging/comedi/comedi.h #define NI_GPCT_RTSI_CLOCK_SRC_BITS(x) (0x18 + (x)) x 1212 drivers/staging/comedi/comedi.h #define NI_GPCT_PFI_CLOCK_SRC_BITS(x) (0x20 + (x)) x 1243 drivers/staging/comedi/comedi.h #define NI_GPCT_GATE_PIN_GATE_SELECT(x) (0x102 + (x)) x 1244 drivers/staging/comedi/comedi.h #define NI_GPCT_RTSI_GATE_SELECT(x) NI_USUAL_RTSI_SELECT(x) x 1245 drivers/staging/comedi/comedi.h #define NI_GPCT_PFI_GATE_SELECT(x) NI_USUAL_PFI_SELECT(x) x 1246 drivers/staging/comedi/comedi.h #define NI_GPCT_UP_DOWN_PIN_GATE_SELECT(x) (0x202 + (x)) x 1264 drivers/staging/comedi/comedi.h #define NI_GPCT_PFI_OTHER_SELECT(x) NI_USUAL_PFI_SELECT(x) x 1323 drivers/staging/comedi/comedi.h #define NI_MIO_PLL_RTSI_CLOCK(x) (NI_MIO_PLL_RTSI0_CLOCK + (x)) x 1344 drivers/staging/comedi/comedi.h #define NI_RTSI_OUTPUT_RTSI_BRD(x) (NI_RTSI_OUTPUT_RTSI_BRD_0 + (x)) x 1380 drivers/staging/comedi/comedi.h #define NI_PFI_OUTPUT_RTSI(x) (NI_PFI_OUTPUT_RTSI0 + (x)) x 1400 drivers/staging/comedi/comedi.h #define NI_EXT_PFI(x) (NI_USUAL_PFI_SELECT(x) - 1) x 1401 drivers/staging/comedi/comedi.h #define NI_EXT_RTSI(x) (NI_USUAL_RTSI_SELECT(x) - 1) x 1421 drivers/staging/comedi/comedi.h #define NI_CDIO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) x 1422 drivers/staging/comedi/comedi.h #define NI_CDIO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) x 1429 drivers/staging/comedi/comedi.h #define NI_AO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) x 1430 drivers/staging/comedi/comedi.h #define NI_AO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) x 1080 drivers/staging/comedi/comedi_fops.c int x; x 1082 drivers/staging/comedi/comedi_fops.c x = (dev->minor << 28) | (it.subdev << 24) | (i << 16) | x 1084 drivers/staging/comedi/comedi_fops.c if (put_user(x, it.rangelist + i)) x 369 drivers/staging/comedi/comedidev.h unsigned int x); x 24 drivers/staging/comedi/drivers/8255.h #define I8255_CTRL_A_MODE(x) ((x) << 5) x 78 drivers/staging/comedi/drivers/addi_apci_1032.c #define APCI1032_CTRL_INT_MODE(x) (((x) & 0x1) << 1) x 92 drivers/staging/comedi/drivers/addi_apci_1564.c #define APCI1564_EEPROM_TO_REV(x) (((x) >> 4) & 0xf) x 150 drivers/staging/comedi/drivers/addi_apci_1564.c #define APCI1564_COUNTER(x) ((x) * 0x20) x 158 drivers/staging/comedi/drivers/addi_apci_1564.c #define APCI1564_EVENT_COUNTER(x) BIT(27 + (x)) /* counter 0-2 */ x 23 drivers/staging/comedi/drivers/addi_apci_16xx.c #define APCI16XX_IN_REG(x) (((x) * 4) + 0x08) x 24 drivers/staging/comedi/drivers/addi_apci_16xx.c #define APCI16XX_OUT_REG(x) (((x) * 4) + 0x14) x 25 drivers/staging/comedi/drivers/addi_apci_16xx.c #define APCI16XX_DIR_REG(x) (((x) * 4) + 0x20) x 33 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CTRL_GATE(x) BIT(12 + (x)) x 34 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CTRL_PR(x) (((x) & 0xf) << 8) x 35 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CTRL_PA(x) (((x) & 0xf) << 0) x 43 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_STATUS_TO_DI_BITS(x) (((x) >> 8) & 0xf) x 44 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_STATUS_TO_VERSION(x) (((x) >> 4) & 0xf) x 50 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CHANLIST_INDEX(x) (((x) & 0xf) << 8) x 52 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CHANLIST_GAIN(x) (((x) & 0x3) << 4) x 53 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CHANLIST_MUX(x) (((x) & 0xf) << 0) x 54 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_AO_REG(x) (0x08 + (((x) / 4) * 2)) x 55 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_AO_MUX(x) (((x) & 0x3) << 14) x 56 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_AO_DATA(x) ((x) << 0) x 65 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CTR0_DO_BITS(x) ((x) << 4) x 66 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_CTR0_TIMER_SEL(x) ((x) << 0) x 68 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_MODE_TIMER2_CLK(x) (((x) & 0x3) << 6) x 74 drivers/staging/comedi/drivers/addi_apci_3120.c #define APCI3120_MODE_TIMER2_AS(x) (((x) & 0x3) << 4) x 55 drivers/staging/comedi/drivers/addi_apci_3501.c #define APCI3501_AO_DATA_CHAN(x) ((x) << 0) x 56 drivers/staging/comedi/drivers/addi_apci_3501.c #define APCI3501_AO_DATA_VAL(x) ((x) << 8) x 33 drivers/staging/comedi/drivers/addi_tcw.h #define ADDI_TCW_CTRL_EXT_CLK(x) (((x) & 3) << 16) x 35 drivers/staging/comedi/drivers/addi_tcw.h #define ADDI_TCW_CTRL_MODE(x) (((x) & 7) << 13) x 37 drivers/staging/comedi/drivers/addi_tcw.h #define ADDI_TCW_CTRL_OUT(x) (((x) & 3) << 11) x 41 drivers/staging/comedi/drivers/addi_tcw.h #define ADDI_TCW_CTRL_EXT_GATE(x) (((x) & 3) << 7) x 43 drivers/staging/comedi/drivers/addi_tcw.h #define ADDI_TCW_CTRL_EXT_TRIG(x) (((x) & 3) << 5) x 33 drivers/staging/comedi/drivers/adl_pci6208.c #define PCI6208_AO_CONTROL(x) (0x00 + (2 * (x))) x 25 drivers/staging/comedi/drivers/adl_pci8164.c #define PCI8164_AXIS(x) ((x) * 0x08) x 71 drivers/staging/comedi/drivers/adl_pci9111.c #define PCI9111_AI_RANGE(x) (((x) & 0x7) << 0) x 92 drivers/staging/comedi/drivers/adl_pci9118.c #define PCI9118_AO_REG(x) (0x10 + ((x) * 4)) x 115 drivers/staging/comedi/drivers/adl_pci9118.c #define PCI9118_AI_CHANLIST_RANGE(x) (((x) & 0x3) << 8) x 116 drivers/staging/comedi/drivers/adl_pci9118.c #define PCI9118_AI_CHANLIST_CHAN(x) ((x) << 0) x 415 drivers/staging/comedi/drivers/adl_pci9118.c unsigned int whole_spans, n_samples, x; x 437 drivers/staging/comedi/drivers/adl_pci9118.c x = start_pos - dma_pos; x 438 drivers/staging/comedi/drivers/adl_pci9118.c if (x > n_raw_samples) x 439 drivers/staging/comedi/drivers/adl_pci9118.c x = n_raw_samples; x 440 drivers/staging/comedi/drivers/adl_pci9118.c dma_pos += x; x 441 drivers/staging/comedi/drivers/adl_pci9118.c n_raw_samples -= x; x 447 drivers/staging/comedi/drivers/adl_pci9118.c x = stop_pos - dma_pos; x 448 drivers/staging/comedi/drivers/adl_pci9118.c if (x > n_raw_samples) x 449 drivers/staging/comedi/drivers/adl_pci9118.c x = n_raw_samples; x 450 drivers/staging/comedi/drivers/adl_pci9118.c n_samples += x; x 451 drivers/staging/comedi/drivers/adl_pci9118.c dma_pos += x; x 452 drivers/staging/comedi/drivers/adl_pci9118.c n_raw_samples -= x; x 472 drivers/staging/comedi/drivers/adl_pci9118.c unsigned int x; x 487 drivers/staging/comedi/drivers/adl_pci9118.c x = start_pos - dma_pos; x 488 drivers/staging/comedi/drivers/adl_pci9118.c if (x > n_raw_samples) x 489 drivers/staging/comedi/drivers/adl_pci9118.c x = n_raw_samples; x 490 drivers/staging/comedi/drivers/adl_pci9118.c dma_pos += x; x 491 drivers/staging/comedi/drivers/adl_pci9118.c n_raw_samples -= x; x 497 drivers/staging/comedi/drivers/adl_pci9118.c x = stop_pos - dma_pos; x 498 drivers/staging/comedi/drivers/adl_pci9118.c if (x > n_raw_samples) x 499 drivers/staging/comedi/drivers/adl_pci9118.c x = n_raw_samples; x 500 drivers/staging/comedi/drivers/adl_pci9118.c comedi_buf_write_samples(s, dma_buffer, x); x 501 drivers/staging/comedi/drivers/adl_pci9118.c dma_pos += x; x 502 drivers/staging/comedi/drivers/adl_pci9118.c n_raw_samples -= x; x 58 drivers/staging/comedi/drivers/adq12b.c #define ADQ12B_CTREG_RANGE(x) ((x) << 4) x 59 drivers/staging/comedi/drivers/adq12b.c #define ADQ12B_CTREG_CHAN(x) ((x) << 0) x 47 drivers/staging/comedi/drivers/adv_pci1710.c #define PCI171X_RANGE_GAIN(x) (((x) & 0x7) << 0) x 49 drivers/staging/comedi/drivers/adv_pci1710.c #define PCI171X_MUX_CHANH(x) (((x) & 0xff) << 8) x 50 drivers/staging/comedi/drivers/adv_pci1710.c #define PCI171X_MUX_CHANL(x) (((x) & 0xff) << 0) x 51 drivers/staging/comedi/drivers/adv_pci1710.c #define PCI171X_MUX_CHAN(x) (PCI171X_MUX_CHANH(x) | PCI171X_MUX_CHANL(x)) x 67 drivers/staging/comedi/drivers/adv_pci1710.c #define PCI171X_DA_REG(x) (0x0a + ((x) * 2)) /* W: D/A register */ x 51 drivers/staging/comedi/drivers/adv_pci1720.c #define PCI1720_AO_LSB_REG(x) (0x00 + ((x) * 2)) x 52 drivers/staging/comedi/drivers/adv_pci1720.c #define PCI1720_AO_MSB_REG(x) (0x01 + ((x) * 2)) x 41 drivers/staging/comedi/drivers/adv_pci1723.c #define PCI1723_AO_REG(x) (0x00 + ((x) * 2)) x 45 drivers/staging/comedi/drivers/adv_pci1723.c #define PCI1723_SYNC_CTRL(x) (((x) & 0x1) << 0) x 52 drivers/staging/comedi/drivers/adv_pci1723.c #define PCI1723_CTRL_IDX(x) (((x) & 0x3) << 6) x 53 drivers/staging/comedi/drivers/adv_pci1723.c #define PCI1723_CTRL_RANGE(x) (((x) & 0x3) << 4) x 54 drivers/staging/comedi/drivers/adv_pci1723.c #define PCI1723_CTRL_SEL(x) (((x) & 0x1) << 3) x 57 drivers/staging/comedi/drivers/adv_pci1723.c #define PCI1723_CTRL_CHAN(x) (((x) & 0x7) << 0) x 73 drivers/staging/comedi/drivers/adv_pci1723.c #define PCI1723_VREF(x) (((x) & 0x3) << 0) x 48 drivers/staging/comedi/drivers/adv_pci1724.c #define PCI1724_DAC_CTRL_GX(x) BIT(20 + ((x) / 8)) x 49 drivers/staging/comedi/drivers/adv_pci1724.c #define PCI1724_DAC_CTRL_CX(x) (((x) % 8) << 16) x 50 drivers/staging/comedi/drivers/adv_pci1724.c #define PCI1724_DAC_CTRL_MODE(x) (((x) & 0x3) << 14) x 55 drivers/staging/comedi/drivers/adv_pci1724.c #define PCI1724_DAC_CTRL_DATA(x) (((x) & 0x3fff) << 0) x 49 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_OMB_REG(x) (0x0c + (x)) x 50 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_IMB_REG(x) (0x1c + (x)) x 51 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_INTCSR_REG(x) (0x38 + (x)) x 65 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_CMD_SET_PWM_HI(x) (0x10 + (x) * 2) /* Set "hi" period */ x 66 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_CMD_SET_PWM_LO(x) (0x11 + (x) * 2) /* Set "lo" period */ x 67 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_CMD_SET_PWM_CNT(x) (0x14 + (x)) /* Set burst count */ x 80 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_CMD_SET_HI_SAMP(x) (0x30 + (x)) /* Set "hi" sample time */ x 81 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_CMD_SET_LO_SAMP(x) (0x38 + (x)) /* Set "lo" sample time */ x 82 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_CMD_SET_CNT(x) (0x40 + (x)) /* Set counter reset val */ x 83 drivers/staging/comedi/drivers/adv_pci1760.c #define PCI1760_CMD_SET_CNT_MATCH(x) (0x48 + (x)) /* Set counter match val */ x 45 drivers/staging/comedi/drivers/adv_pci_dio.c #define PCI1753_INT_REG(x) (0x10 + (x)) /* R/W: control group 0 to 3 */ x 46 drivers/staging/comedi/drivers/adv_pci_dio.c #define PCI1753E_INT_REG(x) (0x30 + (x)) /* R/W: control group 0 to 3 */ x 49 drivers/staging/comedi/drivers/adv_pci_dio.c #define PCI1754_INT_REG(x) (0x08 + (x) * 2) /* R/W: control group 0 to 3 */ x 45 drivers/staging/comedi/drivers/aio_aio12_8.c #define AIO12_8_ADC_MODE(x) (((x) & 0x3) << 6) x 50 drivers/staging/comedi/drivers/aio_aio12_8.c #define AIO12_8_ADC_ACQ(x) (((x) & 0x1) << 5) x 53 drivers/staging/comedi/drivers/aio_aio12_8.c #define AIO12_8_ADC_RANGE(x) ((x) << 3) x 54 drivers/staging/comedi/drivers/aio_aio12_8.c #define AIO12_8_ADC_CHAN(x) ((x) << 0) x 55 drivers/staging/comedi/drivers/aio_aio12_8.c #define AIO12_8_DAC_REG(x) (0x04 + (x) * 2) x 61 drivers/staging/comedi/drivers/aio_aio12_8.c #define AIO12_8_ADC_TRIGGER_RANGE(x) ((x) << 3) x 62 drivers/staging/comedi/drivers/aio_aio12_8.c #define AIO12_8_ADC_TRIGGER_CHAN(x) ((x) << 0) x 48 drivers/staging/comedi/drivers/amcc_s5933.h #define INTCSR_OUTBOX_BYTE(x) ((x) & 0x3) x 49 drivers/staging/comedi/drivers/amcc_s5933.h #define INTCSR_OUTBOX_SELECT(x) (((x) & 0x3) << 2) x 51 drivers/staging/comedi/drivers/amcc_s5933.h #define INTCSR_INBOX_BYTE(x) (((x) & 0x3) << 8) x 52 drivers/staging/comedi/drivers/amcc_s5933.h #define INTCSR_INBOX_SELECT(x) (((x) & 0x3) << 10) x 25 drivers/staging/comedi/drivers/amplc_dio200_common.c #define DIO200_CLK_SCE(x) (0x18 + (x)) /* Group X/Y/Z clock sel reg */ x 26 drivers/staging/comedi/drivers/amplc_dio200_common.c #define DIO200_GAT_SCE(x) (0x1b + (x)) /* Group X/Y/Z gate sel reg */ x 126 drivers/staging/comedi/drivers/amplc_pci224.c #define PCI224_DACCON_TRIG(x) (((x) & 0x7) << 0) x 136 drivers/staging/comedi/drivers/amplc_pci224.c #define PCI224_DACCON_POLAR(x) (((x) & 0x1) << 3) x 141 drivers/staging/comedi/drivers/amplc_pci224.c #define PCI224_DACCON_VREF(x) (((x) & 0x3) << 4) x 152 drivers/staging/comedi/drivers/amplc_pci224.c #define PCI224_DACCON_FIFOINTR(x) (((x) & 0x7) << 9) x 161 drivers/staging/comedi/drivers/amplc_pci224.c #define PCI224_DACCON_FIFOFL(x) (((x) & 0x7) << 12) x 231 drivers/staging/comedi/drivers/amplc_pci230.c #define PCI230_DAC_OR(x) (((x) & 0x1) << 0) x 244 drivers/staging/comedi/drivers/amplc_pci230.c #define PCI230P2_DAC_TRIG(x) (((x) & 0x7) << 2) x 254 drivers/staging/comedi/drivers/amplc_pci230.c #define PCI230P2_DAC_INT_FIFO(x) (((x) & 7) << 9) x 301 drivers/staging/comedi/drivers/amplc_pci230.c #define PCI230_ADC_TRIG(x) (((x) & 0x7) << 0) x 310 drivers/staging/comedi/drivers/amplc_pci230.c #define PCI230_ADC_IR(x) (((x) & 0x1) << 3) x 314 drivers/staging/comedi/drivers/amplc_pci230.c #define PCI230_ADC_IM(x) (((x) & 0x1) << 4) x 319 drivers/staging/comedi/drivers/amplc_pci230.c #define PCI230_ADC_INT_FIFO(x) (((x) & 0x7) << 9) x 40 drivers/staging/comedi/drivers/c6xdigio.c #define C6XDIGIO_DATA_CHAN(x) (((x) + 1) << 4) x 40 drivers/staging/comedi/drivers/cb_das16_cs.c #define DAS16CS_AI_MUX_HI_CHAN(x) (((x) & 0xf) << 4) x 41 drivers/staging/comedi/drivers/cb_das16_cs.c #define DAS16CS_AI_MUX_LO_CHAN(x) (((x) & 0xf) << 0) x 42 drivers/staging/comedi/drivers/cb_das16_cs.c #define DAS16CS_AI_MUX_SINGLE_CHAN(x) (DAS16CS_AI_MUX_HI_CHAN(x) | \ x 43 drivers/staging/comedi/drivers/cb_das16_cs.c DAS16CS_AI_MUX_LO_CHAN(x)) x 46 drivers/staging/comedi/drivers/cb_das16_cs.c #define DAS16CS_MISC1_INT_SRC(x) (((x) & 0x7) << 12) /* interrupt src */ x 55 drivers/staging/comedi/drivers/cb_das16_cs.c #define DAS16CS_MISC1_AI_CONV(x) (((x) & 0x3) << 8) /* AI convert src */ x 72 drivers/staging/comedi/drivers/cb_das16_cs.c #define DAS16CS_MISC2_AI_GAIN(x) (((x) & 0xf) << 8) /* AI gain */ x 71 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_CTRL_INT(x) (((x) & 0x3) << 0) x 97 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_AI_FIRST(x) ((x) & 0xf) x 98 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_AI_LAST(x) (((x) & 0xf) << 4) x 99 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_AI_CHAN(x) (PCIDAS_AI_FIRST(x) | PCIDAS_AI_LAST(x)) x 100 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_AI_GAIN(x) (((x) & 0x3) << 8) x 103 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_AI_PACER(x) (((x) & 0x3) << 12) x 112 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_TRIG_SEL(x) (((x) & 0x3) << 0) x 128 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_CALIB_SRC(x) (((x) & 0x7) << 11) x 136 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_AO_PACER(x) (((x) & 0x3) << 3) /* (1602) */ x 164 drivers/staging/comedi/drivers/cb_pcidas.c #define PCIDAS_AO_DATA_REG(x) (0x00 + ((x) * 2)) x 47 drivers/staging/comedi/drivers/cb_pcidda.c #define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */ x 76 drivers/staging/comedi/drivers/cb_pcidda.c #define CB_DDA_DA_DATA_REG(x) (0x08 + ((x) * 2)) x 54 drivers/staging/comedi/drivers/cb_pcimdas.c #define PCIMDAS_AO_REG(x) (0x02 + ((x) * 2)) x 67 drivers/staging/comedi/drivers/cb_pcimdas.c #define PCIMDAS_STATUS_TO_CURR_MUX(x) ((x) & 0xf) x 81 drivers/staging/comedi/drivers/cb_pcimdas.c #define PCIMDAS_IRQ_INTSEL(x) ((x) << 0) x 92 drivers/staging/comedi/drivers/cb_pcimdas.c #define PCIMDAS_PACER_SRC(x) ((x) << 0) x 81 drivers/staging/comedi/drivers/cb_pcimdda.c #define PCIMDDA_DA_CHAN(x) (0x00 + (x) * 2) x 46 drivers/staging/comedi/drivers/comedi_8254.h #define I8254_CTRL_SEL_CTR(x) ((x) << 6) x 47 drivers/staging/comedi/drivers/comedi_8254.h #define I8254_CTRL_READBACK(x) (I8254_CTRL_SEL_CTR(3) | BIT(x)) x 50 drivers/staging/comedi/drivers/comedi_8254.h #define I8254_CTRL_READBACK_SEL_CTR(x) (2 << (x)) x 51 drivers/staging/comedi/drivers/comedi_8254.h #define I8254_CTRL_RW(x) (((x) & 0x3) << 4) x 65 drivers/staging/comedi/drivers/dac02.c #define DAC02_AO_LSB(x) (0x00 + ((x) * 2)) x 66 drivers/staging/comedi/drivers/dac02.c #define DAC02_AO_MSB(x) (0x01 + ((x) * 2)) x 148 drivers/staging/comedi/drivers/daqboard2000.c #define DB2K_REG_DAC_SETTING(x) (0x38 + (x) * 2) /* s16 */ x 151 drivers/staging/comedi/drivers/daqboard2000.c #define DB2K_REG_COUNTER_INPUT(x) (0x88 + (x) * 2) /* s16 */ x 152 drivers/staging/comedi/drivers/daqboard2000.c #define DB2K_REG_TIMER_DIV(x) (0xa0 + (x) * 2) /* u16 */ x 158 drivers/staging/comedi/drivers/daqboard2000.c #define DB2K_REG_DIO_P2_EXP_IO_16_BIT(x) (0xc0 + (x) * 2) /* s16 */ x 201 drivers/staging/comedi/drivers/daqboard2000.c #define DB2K_DAC_STATUS_DAC_BUSY(x) (0x0010 << (x)) x 207 drivers/staging/comedi/drivers/daqboard2000.c #define DB2K_DAC_CONTROL_DAC_DISABLE(x) (0x0020 + ((x) << 4)) x 208 drivers/staging/comedi/drivers/daqboard2000.c #define DB2K_DAC_CONTROL_DAC_ENABLE(x) (0x0021 + ((x) << 4)) x 44 drivers/staging/comedi/drivers/das08.c #define DAS08_STATUS_DI(x) (((x) & 0x70) >> 4) x 51 drivers/staging/comedi/drivers/das08.c #define DAS08_CONTROL_MUX(x) ((x) & DAS08_CONTROL_MUX_MASK) /* mux channel */ x 55 drivers/staging/comedi/drivers/das08.c #define DAS08_CONTROL_DO(x) (((x) << 4) & DAS08_CONTROL_DO_MASK) x 67 drivers/staging/comedi/drivers/das08.c #define DAS08JR_AO_LSB_REG(x) ((x) ? 0x06 : 0x04) x 69 drivers/staging/comedi/drivers/das08.c #define DAS08JR_AO_MSB_REG(x) ((x) ? 0x07 : 0x05) x 77 drivers/staging/comedi/drivers/das08.c #define DAS08AOX_AO_LSB_REG(x) ((x) ? 0x0a : 0x08) x 79 drivers/staging/comedi/drivers/das08.c #define DAS08AOX_AO_MSB_REG(x) ((x) ? 0x0b : 0x09) x 83 drivers/staging/comedi/drivers/das16.c #define DAS16_AO_LSB_REG(x) ((x) ? 0x06 : 0x04) x 84 drivers/staging/comedi/drivers/das16.c #define DAS16_AO_MSB_REG(x) ((x) ? 0x07 : 0x05) x 92 drivers/staging/comedi/drivers/das16.c #define DAS16_CTRL_IRQ(x) (((x) & 0x7) << 4) x 99 drivers/staging/comedi/drivers/das16.c #define DAS16_PACER_BURST_LEN(x) (((x) & 0xf) << 4) x 54 drivers/staging/comedi/drivers/das16m1.c #define DAS16M1_AI_TO_CHAN(x) (((x) >> 0) & 0xf) x 55 drivers/staging/comedi/drivers/das16m1.c #define DAS16M1_AI_TO_SAMPLE(x) (((x) >> 4) & 0xfff) x 64 drivers/staging/comedi/drivers/das16m1.c #define DAS16M1_INTR_CTRL_PACER(x) (((x) & 0x3) << 0) x 68 drivers/staging/comedi/drivers/das16m1.c #define DAS16M1_INTR_CTRL_IRQ(x) (((x) & 0x7) << 4) x 72 drivers/staging/comedi/drivers/das16m1.c #define DAS16M1_Q_CHAN(x) (((x) & 0x7) << 0) x 73 drivers/staging/comedi/drivers/das16m1.c #define DAS16M1_Q_RANGE(x) (((x) & 0xf) << 4) x 37 drivers/staging/comedi/drivers/das6402.c #define DAS6402_AI_MUX_LO(x) (((x) & 0x3f) << 0) x 38 drivers/staging/comedi/drivers/das6402.c #define DAS6402_AI_MUX_HI(x) (((x) & 0x3f) << 8) x 40 drivers/staging/comedi/drivers/das6402.c #define DAS6402_AO_DATA_REG(x) (0x04 + ((x) * 2)) x 41 drivers/staging/comedi/drivers/das6402.c #define DAS6402_AO_LSB_REG(x) (0x04 + ((x) * 2)) x 42 drivers/staging/comedi/drivers/das6402.c #define DAS6402_AO_MSB_REG(x) (0x05 + ((x) * 2)) x 60 drivers/staging/comedi/drivers/das6402.c #define DAS6402_CTRL_TRIG(x) ((x) << 0) x 67 drivers/staging/comedi/drivers/das6402.c #define DAS6402_CTRL_IRQ(x) ((x) << 4) x 77 drivers/staging/comedi/drivers/das6402.c #define DAS6402_MODE_RANGE(x) ((x) << 2) x 85 drivers/staging/comedi/drivers/das6402.c #define DAS6402_MODE_DMA(x) ((x) << 7) x 55 drivers/staging/comedi/drivers/dmm32at.c #define DMM32AT_AO_MSB_DACH(x) ((x) << 6) x 73 drivers/staging/comedi/drivers/dmm32at.c #define DMM32AT_CTRL_PAGE(x) ((x) << 0) x 97 drivers/staging/comedi/drivers/dmm32at.c #define DMM32AT_AI_CFG_SCINT(x) ((x) << 4) x 104 drivers/staging/comedi/drivers/dmm32at.c #define DMM32AT_AI_CFG_GAIN(x) ((x) << 0) x 56 drivers/staging/comedi/drivers/dt2811.c #define DT2811_ADCSR_ADMODE(x) (((x) & 0x3) << 0) x 59 drivers/staging/comedi/drivers/dt2811.c #define DT2811_ADGCR_GAIN(x) (((x) & 0x3) << 6) x 60 drivers/staging/comedi/drivers/dt2811.c #define DT2811_ADGCR_CHAN(x) (((x) & 0xf) << 0) x 65 drivers/staging/comedi/drivers/dt2811.c #define DT2811_DADATA_LO_REG(x) (0x02 + ((x) * 2)) /* w D/A Data low */ x 66 drivers/staging/comedi/drivers/dt2811.c #define DT2811_DADATA_HI_REG(x) (0x03 + ((x) * 2)) /* w D/A Data high */ x 72 drivers/staging/comedi/drivers/dt2811.c #define DT2811_TMRCTR_MANTISSA(x) (((x) & 0x7) << 3) x 73 drivers/staging/comedi/drivers/dt2811.c #define DT2811_TMRCTR_EXPONENT(x) (((x) & 0x7) << 0) x 68 drivers/staging/comedi/drivers/dt282x.c #define DT2821_ADCSR_GS(x) (((x) & 0x3) << 4) x 69 drivers/staging/comedi/drivers/dt282x.c #define DT2821_ADCSR_CHAN(x) (((x) & 0xf) << 0) x 72 drivers/staging/comedi/drivers/dt282x.c #define DT2821_CHANCSR_TO_PRESLA(x) (((x) >> 8) & 0xf) x 73 drivers/staging/comedi/drivers/dt282x.c #define DT2821_CHANCSR_NUMB(x) ((((x) - 1) & 0xf) << 0) x 77 drivers/staging/comedi/drivers/dt282x.c #define DT2821_DACSR_YSEL(x) ((x) << 9) x 91 drivers/staging/comedi/drivers/dt282x.c #define DT2821_SUPCSR_DS(x) (((x) & 0x3) << 10) x 107 drivers/staging/comedi/drivers/dt282x.c #define DT2821_TMRCTR_PRESCALE(x) (((x) & 0xf) << 8) x 108 drivers/staging/comedi/drivers/dt282x.c #define DT2821_TMRCTR_DIVIDER(x) ((255 - ((x) & 0xff)) << 0) x 112 drivers/staging/comedi/drivers/dt282x.c #define DT2821_PRESCALE(x) BIT(x) x 1016 drivers/staging/comedi/drivers/dt282x.c static const struct comedi_lrange *opt_ai_range_lkup(int ispgl, int x) x 1019 drivers/staging/comedi/drivers/dt282x.c if (x < 0 || x >= 2) x 1020 drivers/staging/comedi/drivers/dt282x.c x = 0; x 1021 drivers/staging/comedi/drivers/dt282x.c return ai_range_pgl_table[x]; x 1024 drivers/staging/comedi/drivers/dt282x.c if (x < 0 || x >= 4) x 1025 drivers/staging/comedi/drivers/dt282x.c x = 0; x 1026 drivers/staging/comedi/drivers/dt282x.c return ai_range_table[x]; x 63 drivers/staging/comedi/drivers/dt3000.c #define DPR_PARAMS(x) (4 * (0xfd5 + (x))) x 82 drivers/staging/comedi/drivers/dt3000.c #define DPR_CMD_COMPLETION(x) ((x) << 8) x 88 drivers/staging/comedi/drivers/dt3000.c #define DPR_CMD(x) ((x) << 0) x 112 drivers/staging/comedi/drivers/dt3000.c #define DPR_PARAM5_AD_TRIG(x) (((x) & 0x7) << 2) x 35 drivers/staging/comedi/drivers/fl512.c #define FL512_AO_DATA_REG(x) (0x04 + ((x) * 2)) x 36 drivers/staging/comedi/drivers/fl512.c #define FL512_AO_TRIG_REG(x) (0x04 + ((x) * 2)) x 76 drivers/staging/comedi/drivers/gsc_hpdi.c #define ALMOST_EMPTY_BITS(x) (((x) & 0xffff) << 0) x 77 drivers/staging/comedi/drivers/gsc_hpdi.c #define ALMOST_FULL_BITS(x) (((x) & 0xff) << 16) x 48 drivers/staging/comedi/drivers/icp_multi.c #define ICP_MULTI_ADC_CSR_DI_CHAN(x) (((x) & 0x7) << 9) x 49 drivers/staging/comedi/drivers/icp_multi.c #define ICP_MULTI_ADC_CSR_SE_CHAN(x) (((x) & 0xf) << 8) x 56 drivers/staging/comedi/drivers/icp_multi.c #define ICP_MULTI_DAC_CSR_CHAN(x) (((x) & 0x3) << 8) x 75 drivers/staging/comedi/drivers/ii_pci20kc.c #define II20K_AO_STRB_REG(x) (0x0b + ((x) * 0x08)) x 76 drivers/staging/comedi/drivers/ii_pci20kc.c #define II20K_AO_LSB_REG(x) (0x0d + ((x) * 0x08)) x 77 drivers/staging/comedi/drivers/ii_pci20kc.c #define II20K_AO_MSB_REG(x) (0x0e + ((x) * 0x08)) x 94 drivers/staging/comedi/drivers/ii_pci20kc.c #define II20K_AI_OPT_TIMEBASE(x) (((x) & 0x3) << 1) x 114 drivers/staging/comedi/drivers/ii_pci20kc.c #define II20K_AI_CHANLIST_GAIN(x) (((x) & 0x3) << 3) x 116 drivers/staging/comedi/drivers/ii_pci20kc.c #define II20K_AI_CHANLIST_CHAN(x) (((x) & 0x3) << 0) x 28 drivers/staging/comedi/drivers/ke_counter.c #define KE_RESET_REG(x) (0x00 + ((x) * 0x20)) x 29 drivers/staging/comedi/drivers/ke_counter.c #define KE_LATCH_REG(x) (0x00 + ((x) * 0x20)) x 30 drivers/staging/comedi/drivers/ke_counter.c #define KE_LSB_REG(x) (0x04 + ((x) * 0x20)) x 31 drivers/staging/comedi/drivers/ke_counter.c #define KE_MID_REG(x) (0x08 + ((x) * 0x20)) x 32 drivers/staging/comedi/drivers/ke_counter.c #define KE_MSB_REG(x) (0x0c + ((x) * 0x20)) x 33 drivers/staging/comedi/drivers/ke_counter.c #define KE_SIGN_REG(x) (0x10 + ((x) * 0x20)) x 35 drivers/staging/comedi/drivers/ke_counter.c #define KE_OSC_SEL_CLK(x) (((x) & 0x3) << 0) x 46 drivers/staging/comedi/drivers/me4000.c #define ME4000_AO_CHAN(x) ((x) * 0x18) x 48 drivers/staging/comedi/drivers/me4000.c #define ME4000_AO_CTRL_REG(x) (0x00 + ME4000_AO_CHAN(x)) x 59 drivers/staging/comedi/drivers/me4000.c #define ME4000_AO_STATUS_REG(x) (0x04 + ME4000_AO_CHAN(x)) x 64 drivers/staging/comedi/drivers/me4000.c #define ME4000_AO_FIFO_REG(x) (0x08 + ME4000_AO_CHAN(x)) x 65 drivers/staging/comedi/drivers/me4000.c #define ME4000_AO_SINGLE_REG(x) (0x0c + ME4000_AO_CHAN(x)) x 66 drivers/staging/comedi/drivers/me4000.c #define ME4000_AO_TIMER_REG(x) (0x10 + ME4000_AO_CHAN(x)) x 102 drivers/staging/comedi/drivers/me4000.c #define ME4000_AI_LIST_RANGE(x) ((3 - ((x) & 3)) << 6) x 49 drivers/staging/comedi/drivers/me_daq.c #define ME_CTRL1_ADC_MODE(x) (((x) & 0x3) << 0) x 77 drivers/staging/comedi/drivers/me_daq.c #define ME_TIMER_DATA_REG(x) (0x0a + ((x) * 2)) /* - | W */ x 81 drivers/staging/comedi/drivers/me_daq.c #define ME_AI_FIFO_CHANLIST_GAIN(x) (((x) & 0x3) << 4) x 82 drivers/staging/comedi/drivers/me_daq.c #define ME_AI_FIFO_CHANLIST_CHAN(x) (((x) & 0xf) << 0) x 84 drivers/staging/comedi/drivers/me_daq.c #define ME_DAC_CTRL_BIPOLAR(x) BIT(7 - ((x) & 0x3)) x 85 drivers/staging/comedi/drivers/me_daq.c #define ME_DAC_CTRL_GAIN(x) BIT(11 - ((x) & 0x3)) x 86 drivers/staging/comedi/drivers/me_daq.c #define ME_DAC_CTRL_MASK(x) (ME_DAC_CTRL_BIPOLAR(x) | \ x 87 drivers/staging/comedi/drivers/me_daq.c ME_DAC_CTRL_GAIN(x)) x 88 drivers/staging/comedi/drivers/me_daq.c #define ME_AO_DATA_REG(x) (0x14 + ((x) * 2)) /* - | W */ x 89 drivers/staging/comedi/drivers/me_daq.c #define ME_COUNTER_ENDDATA_REG(x) (0x1c + ((x) * 2)) /* - | W */ x 90 drivers/staging/comedi/drivers/me_daq.c #define ME_COUNTER_STARTDATA_REG(x) (0x20 + ((x) * 2)) /* - | W */ x 91 drivers/staging/comedi/drivers/me_daq.c #define ME_COUNTER_VALUE_REG(x) (0x20 + ((x) * 2)) /* R | - */ x 34 drivers/staging/comedi/drivers/mf6x4.c #define MF6X4_ADCTRL_CHAN(x) BIT(chan) x 39 drivers/staging/comedi/drivers/mf6x4.c #define MF6X4_DAC_REG(x) (0x20 + ((x) * 2)) x 54 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_IOWINS(x) (((x) >> 29) & 0x7) x 55 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_WINS(x) (((x) >> 24) & 0x1f) x 56 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_WPDEP(x) (((x) >> 20) & 0x7) x 57 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_DMAC(x) (((x) >> 16) & 0xf) x 58 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_IMODE(x) (((x) >> 12) & 0x3) /* pci=0x3 */ x 59 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_MMODE(x) (((x) >> 8) & 0x3) /* minimite=1 */ x 60 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_TYPE(x) (((x) >> 4) & 0xf) /* mite=0, minimite=1 */ x 61 drivers/staging/comedi/drivers/mite.c #define CSIGR_TO_VER(x) (((x) >> 0) & 0xf) x 63 drivers/staging/comedi/drivers/mite.c #define MITE_CHAN(x) (0x500 + 0x100 * (x)) x 64 drivers/staging/comedi/drivers/mite.c #define MITE_CHOR(x) (0x00 + MITE_CHAN(x)) /* channel operation */ x 78 drivers/staging/comedi/drivers/mite.c #define MITE_CHCR(x) (0x04 + MITE_CHAN(x)) /* channel control */ x 95 drivers/staging/comedi/drivers/mite.c #define CHCR_FIFO(x) (((x) & 0x1) << 15) x 98 drivers/staging/comedi/drivers/mite.c #define CHCR_BURST(x) (((x) & 0x1) << 14) x 103 drivers/staging/comedi/drivers/mite.c #define CHCR_DIR(x) (((x) & 0x1) << 3) x 106 drivers/staging/comedi/drivers/mite.c #define CHCR_MODE(x) (((x) & 0x7) << 0) x 112 drivers/staging/comedi/drivers/mite.c #define MITE_TCR(x) (0x08 + MITE_CHAN(x)) /* transfer count */ x 113 drivers/staging/comedi/drivers/mite.c #define MITE_MCR(x) (0x0c + MITE_CHAN(x)) /* memory config */ x 114 drivers/staging/comedi/drivers/mite.c #define MITE_MAR(x) (0x10 + MITE_CHAN(x)) /* memory address */ x 115 drivers/staging/comedi/drivers/mite.c #define MITE_DCR(x) (0x14 + MITE_CHAN(x)) /* device config */ x 117 drivers/staging/comedi/drivers/mite.c #define MITE_DAR(x) (0x18 + MITE_CHAN(x)) /* device address */ x 118 drivers/staging/comedi/drivers/mite.c #define MITE_LKCR(x) (0x1c + MITE_CHAN(x)) /* link config */ x 119 drivers/staging/comedi/drivers/mite.c #define MITE_LKAR(x) (0x20 + MITE_CHAN(x)) /* link address */ x 120 drivers/staging/comedi/drivers/mite.c #define MITE_LLKAR(x) (0x24 + MITE_CHAN(x)) /* see tnt5002 manual */ x 121 drivers/staging/comedi/drivers/mite.c #define MITE_BAR(x) (0x28 + MITE_CHAN(x)) /* base address */ x 122 drivers/staging/comedi/drivers/mite.c #define MITE_BCR(x) (0x2c + MITE_CHAN(x)) /* base count */ x 123 drivers/staging/comedi/drivers/mite.c #define MITE_SAR(x) (0x30 + MITE_CHAN(x)) /* ? address */ x 124 drivers/staging/comedi/drivers/mite.c #define MITE_WSCR(x) (0x34 + MITE_CHAN(x)) /* ? */ x 125 drivers/staging/comedi/drivers/mite.c #define MITE_WSER(x) (0x38 + MITE_CHAN(x)) /* ? */ x 126 drivers/staging/comedi/drivers/mite.c #define MITE_CHSR(x) (0x3c + MITE_CHAN(x)) /* channel status */ x 139 drivers/staging/comedi/drivers/mite.c #define CHSR_OPERR(x) (((x) & 0x3) << 10) x 148 drivers/staging/comedi/drivers/mite.c #define CHSR_LERR(x) (((x) & 0x3) << 4) x 153 drivers/staging/comedi/drivers/mite.c #define CHSR_MERR(x) (((x) & 0x3) << 2) x 158 drivers/staging/comedi/drivers/mite.c #define CHSR_DERR(x) (((x) & 0x3) << 0) x 163 drivers/staging/comedi/drivers/mite.c #define MITE_FCR(x) (0x40 + MITE_CHAN(x)) /* fifo count */ x 166 drivers/staging/comedi/drivers/mite.c #define CR_RL(x) (((x) & 0x7) << 21) x 167 drivers/staging/comedi/drivers/mite.c #define CR_REQS(x) (((x) & 0x7) << 16) x 169 drivers/staging/comedi/drivers/mite.c #define CR_ASEQ(x) (((x) & 0x3) << 10) x 174 drivers/staging/comedi/drivers/mite.c #define CR_PSIZE(x) (((x) & 0x3) << 8) x 178 drivers/staging/comedi/drivers/mite.c #define CR_PORT(x) (((x) & 0x3) << 6) x 74 drivers/staging/comedi/drivers/mpc624.c #define MPC624_OSR(x) (((x) & 0x1f) << 27) x 44 drivers/staging/comedi/drivers/multiq3.c #define MULTIQ3_CTRL_AO_CHAN(x) (((x) & 0x7) << 0) x 45 drivers/staging/comedi/drivers/multiq3.c #define MULTIQ3_CTRL_RC(x) (((x) & 0x3) << 0) x 46 drivers/staging/comedi/drivers/multiq3.c #define MULTIQ3_CTRL_AI_CHAN(x) (((x) & 0x7) << 3) x 47 drivers/staging/comedi/drivers/multiq3.c #define MULTIQ3_CTRL_E_CHAN(x) (((x) & 0x7) << 3) x 32 drivers/staging/comedi/drivers/ni_6527.c #define NI6527_DI_REG(x) (0x00 + (x)) x 33 drivers/staging/comedi/drivers/ni_6527.c #define NI6527_DO_REG(x) (0x03 + (x)) x 42 drivers/staging/comedi/drivers/ni_6527.c #define NI6527_FILT_INTERVAL_REG(x) (0x08 + (x)) x 43 drivers/staging/comedi/drivers/ni_6527.c #define NI6527_FILT_ENA_REG(x) (0x0c + (x)) x 58 drivers/staging/comedi/drivers/ni_6527.c #define NI6527_RISING_EDGE_REG(x) (0x18 + (x)) x 59 drivers/staging/comedi/drivers/ni_6527.c #define NI6527_FALLING_EDGE_REG(x) (0x20 + (x)) x 101 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_PORT(x) ((x) * 0x10) x 102 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_IO_DATA_REG(x) (0x40 + NI_65XX_PORT(x)) x 103 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_IO_SEL_REG(x) (0x41 + NI_65XX_PORT(x)) x 106 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_RISE_EDGE_ENA_REG(x) (0x42 + NI_65XX_PORT(x)) x 107 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_FALL_EDGE_ENA_REG(x) (0x43 + NI_65XX_PORT(x)) x 108 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_FILTER_ENA(x) (0x44 + NI_65XX_PORT(x)) x 109 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_WDOG_HIZ_REG(x) (0x46 + NI_65XX_PORT(x)) x 110 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_WDOG_ENA(x) (0x47 + NI_65XX_PORT(x)) x 111 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_WDOG_HI_LO_REG(x) (0x48 + NI_65XX_PORT(x)) x 112 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_RTSI_ENA(x) (0x49 + NI_65XX_PORT(x)) x 114 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_PORT_TO_CHAN(x) ((x) * 8) x 115 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_CHAN_TO_PORT(x) ((x) / 8) x 116 drivers/staging/comedi/drivers/ni_65xx.c #define NI_65XX_CHAN_TO_MASK(x) (1 << ((x) % 8)) x 87 drivers/staging/comedi/drivers/ni_660x.c #define NI660X_IO_CFG(x) (NI660X_IO_CFG_0_1 + ((x) / 2)) x 52 drivers/staging/comedi/drivers/ni_at_a2150.c #define CHANNEL_BITS(x) ((x) & 0x7) x 54 drivers/staging/comedi/drivers/ni_at_a2150.c #define CLOCK_SELECT_BITS(x) (((x) & 0x3) << 3) x 55 drivers/staging/comedi/drivers/ni_at_a2150.c #define CLOCK_DIVISOR_BITS(x) (((x) & 0x3) << 5) x 81 drivers/staging/comedi/drivers/ni_at_a2150.c #define ID_BITS(x) (((x) >> 8) & 0x3) x 83 drivers/staging/comedi/drivers/ni_at_a2150.c #define DMA_CHAN_BITS(x) ((x) & 0x7) /* sets dma channel */ x 85 drivers/staging/comedi/drivers/ni_at_a2150.c #define IRQ_LVL_BITS(x) (((x) & 0xf) << 4) /* sets irq level */ x 42 drivers/staging/comedi/drivers/ni_at_ao.c #define ATAO_CFG2_CALLD(x) ((((x) >> 3) + 1) << 14) x 44 drivers/staging/comedi/drivers/ni_at_ao.c #define ATAO_CFG2_DACS(x) (1 << (((x) / 2) + 8)) x 45 drivers/staging/comedi/drivers/ni_at_ao.c #define ATAO_CFG2_LDAC(x) (1 << (((x) / 2) + 3)) x 71 drivers/staging/comedi/drivers/ni_at_ao.c #define ATAO_CFG1_CH(x) (((x) & 0xf) << 0) x 82 drivers/staging/comedi/drivers/ni_at_ao.c #define ATAO_AO_REG(x) (0x0c + ((x) * 2)) x 20 drivers/staging/comedi/drivers/ni_labpc_regs.h #define CMD1_MA(x) (((x) & 0x7) << 0) x 22 drivers/staging/comedi/drivers/ni_labpc_regs.h #define CMD1_GAIN(x) (((x) & 0x7) << 4) x 31 drivers/staging/comedi/drivers/ni_labpc_regs.h #define CMD2_LDAC(x) BIT(6 + ((x) & 0x1)) x 40 drivers/staging/comedi/drivers/ni_labpc_regs.h #define DAC_LSB_REG(x) (0x04 + 2 * (x)) /* W: DAC0/1 LSB reg */ x 41 drivers/staging/comedi/drivers/ni_labpc_regs.h #define DAC_MSB_REG(x) (0x05 + 2 * (x)) /* W: DAC0/1 MSB reg */ x 49 drivers/staging/comedi/drivers/ni_labpc_regs.h #define CMD6_DACUNI(x) BIT(2 + ((x) & 0x1)) x 208 drivers/staging/comedi/drivers/ni_mio_common.c #define NI_GPCT_SUBDEV(x) (NI_GPCT0_SUBDEV + (x)) x 556 drivers/staging/comedi/drivers/ni_mio_common.c #define NI_STC_DMA_CHAN_SEL(x) (((x) < 4) ? BIT(x) : \ x 557 drivers/staging/comedi/drivers/ni_mio_common.c ((x) == 4) ? 0x3 : \ x 558 drivers/staging/comedi/drivers/ni_mio_common.c ((x) == 5) ? 0x5 : 0x0) x 59 drivers/staging/comedi/drivers/ni_pcidio.c #define INTERRUPT_LINE(x) ((x) & 3) x 94 drivers/staging/comedi/drivers/ni_pcidio.c #define PORT_IO(x) (28 + (x)) x 95 drivers/staging/comedi/drivers/ni_pcidio.c #define PORT_PIN_DIRECTIONS(x) (32 + (x)) x 96 drivers/staging/comedi/drivers/ni_pcidio.c #define PORT_PIN_MASK(x) (36 + (x)) x 97 drivers/staging/comedi/drivers/ni_pcidio.c #define PORT_PIN_POLARITIES(x) (40 + (x)) x 100 drivers/staging/comedi/drivers/ni_pcidio.c #define RTSI_CLOCKING(x) (((x) & 3) << 4) x 106 drivers/staging/comedi/drivers/ni_pcidio.c #define PORT_PATTERN(x) (48 + (x)) x 113 drivers/staging/comedi/drivers/ni_pcidio.c #define FUNNELING(x) (((x) & 3) << 4) x 118 drivers/staging/comedi/drivers/ni_pcidio.c #define RUN_MODE(x) ((x) & 7) x 123 drivers/staging/comedi/drivers/ni_pcidio.c #define CLOCK_LINE(x) (((x) & 3) << 5) x 125 drivers/staging/comedi/drivers/ni_pcidio.c #define DATA_LATCHING(x) (((x) & 3) << 5) x 135 drivers/staging/comedi/drivers/ni_pcidio.c #define REQ_CONDITIONING(x) (((x) & 7) << 3) x 141 drivers/staging/comedi/drivers/ni_pcidio.c #define READY_LEVEL(x) ((x) & 7) x 154 drivers/staging/comedi/drivers/ni_pcidio.c #define ACK_LINE(x) (((x) & 3) << 2) x 175 drivers/staging/comedi/drivers/ni_pcidio.c #define TRANSFER_WIDTH(x) ((x) & 3) x 176 drivers/staging/comedi/drivers/ni_pcidio.c #define TRANSFER_LENGTH(x) (((x) & 3) << 3) x 181 drivers/staging/comedi/drivers/ni_pcidio.c #define START_SOURCE(x) ((x) & 0x3) x 183 drivers/staging/comedi/drivers/ni_pcidio.c #define STOP_SOURCE(x) (((x) & 0x3) << 3) x 37 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define B(x) ((x) - NI_NAMES_BASE) x 40 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define V(x) (((x) & 0x7f) | 0x80) x 44 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define I(x) V(x) x 46 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define U(x) 0x0 x 51 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define I(x) (((x) & 0x7f) | 0x100) x 53 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define U(x) (((x) & 0x7f) | 0x200) x 56 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define MARKED_V(x) (((x) & 0x80) != 0) x 58 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define MARKED_I(x) (((x) & 0x100) != 0) x 60 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define MARKED_U(x) (((x) & 0x200) != 0) x 67 drivers/staging/comedi/drivers/ni_routing/ni_route_values.h #define UNMARK(x) ((x) & 0x7f) x 14 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c #define BIT(x) (1UL << (x)) x 85 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_CMD2_END_ON_BC_TC(x) (((x) & 0x3) << 14) x 140 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_DIO_OUT_SERIAL(x) (((x) & 0xff) << 8) x 142 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_DIO_OUT_PARALLEL(x) ((x) & 0xff) x 152 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_DIO_CTRL_DIR(x) ((x) & 0xff) x 156 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_MODE1_CONVERT_SRC(x) (((x) & 0x1f) << 11) x 157 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_MODE1_SI_SRC(x) (((x) & 0x1f) << 6) x 173 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_MODE2_SI_RELOAD_MODE(x) (((x) & 0x7) << 4) x 196 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_MODE1_UPDATE_SRC(x) (((x) & 0x1f) << 11) x 198 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_MODE1_UI_SRC(x) (((x) & 0x1f) << 6) x 208 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_MODE2_FIFO_MODE(x) (((x) & 0x3) << 14) x 221 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_MODE2_UI_RELOAD_MODE(x) (((x) & 0x7) << 4) x 247 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_CLK_FOUT_DIVIDER(x) (((x) & 0xf) << 0) x 248 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_CLK_FOUT_TO_DIVIDER(x) (((x) >> 0) & 0xf) x 264 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_INT_CTRL_INTB_SEL(x) (((x) & 0x7) << 12) x 266 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_INT_CTRL_INTA_SEL(x) (((x) & 0x7) << 8) x 274 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_OUT_CTRL_SCAN_IN_PROG_SEL(x) (((x) & 0x3) << 8) x 275 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_OUT_CTRL_EXTMUX_CLK_SEL(x) (((x) & 0x3) << 6) x 276 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_OUT_CTRL_LOCALMUX_CLK_SEL(x) (((x) & 0x3) << 4) x 277 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_OUT_CTRL_SC_TC_SEL(x) (((x) & 0x3) << 2) x 278 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_OUT_CTRL_CONVERT_SEL(x) (((x) & 0x3) << 0) x 287 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_ATRIG_ETC_GPFO_0_SEL(x) (((x) & 0x7) << 11) x 288 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_ATRIG_ETC_GPFO_0_SEL_TO_SRC(x) (((x) >> 11) & 0x7) x 290 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_ATRIG_ETC_GPFO_1_SEL_TO_SRC(x) (((x) >> 7) & 0x1) x 293 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_ATRIG_ETC_MODE(x) (((x) & 0x7) << 0) x 302 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_STOP_SEL(x) (((x) & 0x1f) << 7) x 305 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_START_SEL(x) (((x) & 0x1f) << 0) x 312 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_TRIG_START2_SEL(x) (((x) & 0x1f) << 7) x 315 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_TRIG_START1_SEL(x) (((x) & 0x1f) << 0) x 324 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_START_UI2_EXT_GATE_SEL(x) (((x) & 0x1f) << 7) x 327 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_START_SEL(x) (((x) & 0x1f) << 0) x 334 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_TRIG_UI2_SRC_SEL(x) (((x) & 0x1f) << 7) x 337 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_TRIG_START1_SEL(x) (((x) & 0x1f) << 0) x 446 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_OUT_CTRL_EXT_GATE_SEL(x) (((x) & 0x1f) << 10) x 447 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_OUT_CTRL_CHANS(x) (((x) & 0xf) << 6) x 448 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_OUT_CTRL_UPDATE2_SEL(x) (((x) & 0x3) << 4) x 451 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AO_OUT_CTRL_UPDATE_SEL(x) (((x) & 0x3) << 0) x 466 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_MODE3_FIFO_MODE(x) (((x) & 0x3) << 6) x 472 drivers/staging/comedi/drivers/ni_stc.h #define NISTC_AI_MODE3_EXT_GATE_SEL(x) (((x) & 0x1f) << 0) x 554 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_DMA_AI_SEL(x) (((x) & 0xf) << 0) x 556 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_DMA_AO_SEL(x) (((x) & 0xf) << 4) x 564 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_SERIAL_CMD_DAC_LD(x) BIT(3 + (x)) x 570 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_MISC_CMD_INTEXT_ATRIG(x) (((x) & 0x1) << 7) x 579 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_AI_CFG_LO_GAIN(x) ((x) << 0) x 582 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_AI_CFG_HI_TYPE(x) (((x) & 0x7) << 12) x 587 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_AI_CFG_HI_CHAN(x) (((x) & 0x3f) << 0) x 590 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_AO_DACSEL(x) ((x) << 8) x 596 drivers/staging/comedi/drivers/ni_stc.h #define NI_E_DAC_DIRECT_DATA_REG(x) (0x18 + ((x) * 2)) /* w16 */ x 635 drivers/staging/comedi/drivers/ni_stc.h #define NI6143_CALIB_CHAN(x) (((x) & 0xf) << 0) x 652 drivers/staging/comedi/drivers/ni_stc.h #define NI671X_DAC_DIRECT_DATA_REG(x) (0x00 + (x)) /* w16 */ x 675 drivers/staging/comedi/drivers/ni_stc.h #define CS5529_CMD_REG(x) (((x) & 0x7) << 1) x 685 drivers/staging/comedi/drivers/ni_stc.h #define CS5529_CFG_AOUT(x) BIT(22 + (x)) x 686 drivers/staging/comedi/drivers/ni_stc.h #define CS5529_CFG_DOUT(x) BIT(18 + (x)) x 688 drivers/staging/comedi/drivers/ni_stc.h #define CS5529_CFG_WORD_RATE(x) (((x) & 0x7) << 13) x 704 drivers/staging/comedi/drivers/ni_stc.h #define CS5529_CFG_CALIB(x) (((x) & 0x7) << 0) x 717 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CDIO_DMA_SEL_CDO(x) (((x) & 0xf) << 4) x 719 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CDIO_DMA_SEL_CDI(x) (((x) & 0xf) << 0) x 732 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CAL_PWM_HIGH_TIME(x) (((x) & 0xffff) << 16) x 733 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CAL_PWM_LOW_TIME(x) (((x) & 0xffff) << 0) x 734 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_GEN_PWM_REG(x) (0x044 + ((x) * 2)) x 739 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AI_CFG_GAIN(x) (((x) & 0x7) << 9) x 740 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AI_CFG_CHAN_TYPE(x) (((x) & 0x7) << 6) x 748 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AI_CFG_BANK_SEL(x) ((((x) & 0x40) << 4) | ((x) & 0x30)) x 749 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AI_CFG_CHAN_SEL(x) (((x) & 0xf) << 0) x 765 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_DAC_DIRECT_DATA_REG(x) (0x0c0 + ((x) * 4)) x 766 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AO_WAVEFORM_ORDER_REG(x) (0x0c2 + ((x) * 4)) x 767 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AO_CFG_BANK_REG(x) (0x0c3 + ((x) * 4)) x 770 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AO_CFG_BANK_REF(x) (((x) & 0x7) << 3) x 774 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AO_CFG_BANK_OFFSET(x) (((x) & 0x7) << 0) x 783 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CLK_FOUT2_PLL_SRC(x) (((x) & 0x1f) << 0) x 786 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CLK_FOUT2_PLL_SRC_RTSI(x) (((x) == NI_M_MAX_RTSI_CHAN) \ x 788 drivers/staging/comedi/drivers/ni_stc.h : NI_M_CLK_FOUT2_PLL_SRC(0xb + (x))) x 792 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_PLL_CTRL_VCO_MODE(x) (((x) & 0x3) << 13) x 799 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_PLL_CTRL_DIVISOR(x) (((x) & 0xf) << 8) x 801 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_PLL_CTRL_MULTIPLIER(x) (((x) & 0xff) << 0) x 804 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_PFI_OUT_SEL_REG(x) (0x1d0 + ((x) * 2)) x 815 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CFG_BYPASS_AI_GAIN(x) (((x) & 0x7) << 18) x 816 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CFG_BYPASS_AO_CAL(x) (((x) & 0xf) << 15) x 818 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CFG_BYPASS_AI_MODE_MUX(x) (((x) & 0x3) << 13) x 820 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CFG_BYPASS_AI_CAL_NEG(x) (((x) & 0x7) << 10) x 822 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CFG_BYPASS_AI_CAL_POS(x) (((x) & 0x7) << 7) x 828 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CFG_BYPASS_AI_BANK(x) (((x) & 0xf) << 3) x 830 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CFG_BYPASS_AI_CHAN(x) (((x) & 0x7) << 0) x 872 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CDI_MODE_DATA_LANE(x) (((x) & 0x3) << 12) x 883 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CDI_MODE_SAMPLE_SRC(x) (((x) & 0x3f) << 0) x 886 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CDO_MODE_DATA_LANE(x) (((x) & 0x3) << 12) x 898 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_CDO_MODE_SAMPLE_SRC(x) (((x) & 0x3f) << 0) x 902 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_STATIC_AI_CTRL_REG(x) ((x) ? (0x260 + (x)) : 0x064) x 903 drivers/staging/comedi/drivers/ni_stc.h #define NI_M_AO_REF_ATTENUATION_REG(x) (0x264 + (x)) x 43 drivers/staging/comedi/drivers/ni_tio.c #define NI_M_PFI_CLK(x) (((x) < 10) ? (1 + (x)) : (0xb + (x))) x 44 drivers/staging/comedi/drivers/ni_tio.c #define NI_M_RTSI_CLK(x) (((x) == 7) ? 0x1b : (0xb + (x))) x 62 drivers/staging/comedi/drivers/ni_tio.c #define NI_660X_SRC_PIN_CLK(x) (0x2 + (x)) x 64 drivers/staging/comedi/drivers/ni_tio.c #define NI_660X_RTSI_CLK(x) (0xb + (x)) x 74 drivers/staging/comedi/drivers/ni_tio.c #define NI_M_PFI_GATE_SEL(x) (((x) < 10) ? (1 + (x)) : (0xb + (x))) x 75 drivers/staging/comedi/drivers/ni_tio.c #define NI_M_RTSI_GATE_SEL(x) (((x) == 7) ? 0x1b : (0xb + (x))) x 87 drivers/staging/comedi/drivers/ni_tio.c #define NI_660X_PIN_GATE_SEL(x) (0x2 + (x)) x 89 drivers/staging/comedi/drivers/ni_tio.c #define NI_660X_RTSI_GATE_SEL(x) (0xb + (x)) x 97 drivers/staging/comedi/drivers/ni_tio.c #define NI_660X_UD_PIN_GATE2_SEL(x) (0x2 + (x)) x 99 drivers/staging/comedi/drivers/ni_tio.c #define NI_660X_RTSI_GATE2_SEL(x) (0xb + (x)) x 14 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_AUTO_INC_REG(x) (NITIO_G0_AUTO_INC + (x)) x 16 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_CMD_REG(x) (NITIO_G0_CMD + (x)) x 21 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_CNT_DIR(x) (((x) & 0x3) << 5) x 32 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_HW_SAVE_REG(x) (NITIO_G0_HW_SAVE + (x)) x 33 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_SW_SAVE_REG(x) (NITIO_G0_SW_SAVE + (x)) x 34 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_MODE_REG(x) (NITIO_G0_MODE + (x)) x 35 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_GATING_MODE(x) (((x) & 0x3) << 0) x 42 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_EDGE_GATE_MODE(x) (((x) & 0x3) << 3) x 48 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_STOP_MODE(x) (((x) & 0x3) << 5) x 54 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_OUTPUT_MODE(x) (((x) & 0x3) << 8) x 59 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_COUNTING_ONCE(x) (((x) & 0x3) << 10) x 69 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x)) x 70 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x)) x 71 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_INPUT_SEL_REG(x) (NITIO_G0_INPUT_SEL + (x)) x 74 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_BITS_TO_SRC(x) (((x) >> 2) & 0x1f) x 75 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_SRC_SEL(x) (((x) & 0x1f) << 2) x 77 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_BITS_TO_GATE(x) (((x) >> 7) & 0x1f) x 78 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_GATE_SEL(x) (((x) & 0x1f) << 7) x 84 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_CNT_MODE_REG(x) (NITIO_G0_CNT_MODE + (x)) x 85 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_CNT_MODE(x) (((x) & 0x7) << 0) x 94 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_INDEX_PHASE(x) (((x) & 0x3) << 5) x 97 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_HW_ARM_SEL(x) ((x) << 8) x 106 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_GATE2_REG(x) (NITIO_G0_GATE2 + (x)) x 108 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_BITS_TO_GATE2(x) (((x) >> 7) & 0x1f) x 109 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_GATE2_SEL(x) (((x) & 0x1f) << 7) x 114 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_SHARED_STATUS_REG(x) (NITIO_G01_STATUS + ((x) / 2)) x 115 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_SAVE(x) (((x) % 2) ? BIT(1) : BIT(0)) x 116 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_COUNTING(x) (((x) % 2) ? BIT(3) : BIT(2)) x 117 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_NEXT_LOAD_SRC(x) (((x) % 2) ? BIT(5) : BIT(4)) x 118 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_STALE_DATA(x) (((x) % 2) ? BIT(7) : BIT(6)) x 119 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_ARMED(x) (((x) % 2) ? BIT(9) : BIT(8)) x 120 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_NO_LOAD_BETWEEN_GATES(x) (((x) % 2) ? BIT(11) : BIT(10)) x 121 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_TC_ERROR(x) (((x) % 2) ? BIT(13) : BIT(12)) x 122 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_GATE_ERROR(x) (((x) % 2) ? BIT(15) : BIT(14)) x 123 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_RESET_REG(x) (NITIO_G01_RESET + ((x) / 2)) x 124 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_RESET(x) BIT(2 + ((x) % 2)) x 125 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_STATUS1_REG(x) (NITIO_G01_STATUS1 + ((x) / 2)) x 126 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_STATUS2_REG(x) (NITIO_G01_STATUS2 + ((x) / 2)) x 127 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_OUTPUT(x) (((x) % 2) ? BIT(1) : BIT(0)) x 128 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_HW_SAVE(x) (((x) % 2) ? BIT(13) : BIT(12)) x 129 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_PERMANENT_STALE(x) (((x) % 2) ? BIT(15) : BIT(14)) x 130 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_DMA_CFG_REG(x) (NITIO_G0_DMA_CFG + (x)) x 136 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_DMA_STATUS_REG(x) (NITIO_G0_DMA_STATUS + (x)) x 140 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_ABZ_REG(x) (NITIO_G0_ABZ + (x)) x 141 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_INT_ACK_REG(x) (NITIO_G0_INT_ACK + (x)) x 142 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_GATE_ERROR_CONFIRM(x) (((x) % 2) ? BIT(1) : BIT(5)) x 143 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_TC_ERROR_CONFIRM(x) (((x) % 2) ? BIT(2) : BIT(6)) x 146 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_STATUS_REG(x) (NITIO_G0_STATUS + (x)) x 150 drivers/staging/comedi/drivers/ni_tio_internal.h #define NITIO_INT_ENA_REG(x) (NITIO_G0_INT_ENA + (x)) x 151 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_TC_INTERRUPT_ENABLE(x) (((x) % 2) ? BIT(9) : BIT(6)) x 152 drivers/staging/comedi/drivers/ni_tio_internal.h #define GI_GATE_INTERRUPT_ENABLE(x) (((x) % 2) ? BIT(10) : BIT(8)) x 44 drivers/staging/comedi/drivers/pcl711.c #define PCL711_AO_LSB_REG(x) (0x04 + ((x) * 2)) x 45 drivers/staging/comedi/drivers/pcl711.c #define PCL711_AO_MSB_REG(x) (0x05 + ((x) * 2)) x 51 drivers/staging/comedi/drivers/pcl711.c #define PCL711_AI_GAIN(x) (((x) & 0xf) << 0) x 53 drivers/staging/comedi/drivers/pcl711.c #define PCL711_MUX_CHAN(x) (((x) & 0xf) << 0) x 58 drivers/staging/comedi/drivers/pcl711.c #define PCL711_MODE(x) (((x) & 0x7) << 0) x 65 drivers/staging/comedi/drivers/pcl711.c #define PCL711_MODE_IRQ(x) (((x) & 0x7) << 4) x 56 drivers/staging/comedi/drivers/pcl726.c #define PCL726_AO_MSB_REG(x) (0x00 + ((x) * 2)) x 57 drivers/staging/comedi/drivers/pcl726.c #define PCL726_AO_LSB_REG(x) (0x01 + ((x) * 2)) x 130 drivers/staging/comedi/drivers/pcl812.c #define PCL812_AO_LSB_REG(x) (0x04 + ((x) * 2)) x 131 drivers/staging/comedi/drivers/pcl812.c #define PCL812_AO_MSB_REG(x) (0x05 + ((x) * 2)) x 138 drivers/staging/comedi/drivers/pcl812.c #define PCL812_MUX_CHAN(x) ((x) << 0) x 142 drivers/staging/comedi/drivers/pcl812.c #define PCL812_CTRL_TRIG(x) (((x) & 0x7) << 0) x 63 drivers/staging/comedi/drivers/pcl816.c #define PCL816_CTRL_DMASRC_SLOT(x) (((x) & 0x3) << 6) x 66 drivers/staging/comedi/drivers/pcl816.c #define PCL816_STATUS_INTSRC_SLOT(x) (((x) & 0x3) << 4) x 115 drivers/staging/comedi/drivers/pcl818.c #define PCL818_AO_LSB_REG(x) (0x04 + ((x) * 2)) x 116 drivers/staging/comedi/drivers/pcl818.c #define PCL818_AO_MSB_REG(x) (0x05 + ((x) * 2)) x 124 drivers/staging/comedi/drivers/pcl818.c #define PCL818_CTRL_TRIG(x) (((x) & 0x3) << 0) x 130 drivers/staging/comedi/drivers/pcl818.c #define PCL818_CTRL_IRQ(x) ((x) << 4) x 80 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_AI_CMD_CHAN_SEL(x) (((x) & 0x3) << 4) x 81 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_AI_CMD_RANGE(x) (((x) & 0x3) << 2) x 83 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_RESOURCE_IRQ(x) (((x) & 0xf) << 0) x 100 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_AO_LSB_SPAN(x) (((x) & 0xf) << 0) x 116 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_AO_CMD_CHAN_SEL(x) (((x) & 0x03) << 1) x 147 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_PORT_REG(x) (0x10 + (x)) x 150 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_LOCK_PORT(x) ((1 << (x)) & 0x3f) x 151 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_PAGE(x) (((x) & 0x3) << 6) x 156 drivers/staging/comedi/drivers/pcmmio.c #define PCMMIO_PAGE_REG(x) (0x18 + (x)) x 88 drivers/staging/comedi/drivers/pcmuio.c #define PCMUIO_PORT_REG(x) (0x00 + (x)) x 91 drivers/staging/comedi/drivers/pcmuio.c #define PCMUIO_LOCK_PORT(x) ((1 << (x)) & 0x3f) x 92 drivers/staging/comedi/drivers/pcmuio.c #define PCMUIO_PAGE(x) (((x) & 0x3) << 6) x 97 drivers/staging/comedi/drivers/pcmuio.c #define PCMUIO_PAGE_REG(x) (0x08 + (x)) x 49 drivers/staging/comedi/drivers/plx9052.h #define PLX9052_CNTRL_PCIBAR(x) (((x) & 0x3) << 12) x 58 drivers/staging/comedi/drivers/plx9052.h #define PLX9052_CNTRL_RETRY_CLKS(x) (((x) & 0xf) << 19) /* retry clks */ x 86 drivers/staging/comedi/drivers/plx9080.h #define PLX_MARBR_LT(x) (BIT(0) * ((x) & 0xff)) x 90 drivers/staging/comedi/drivers/plx9080.h #define PLX_MARBR_PT(x) (BIT(8) * ((x) & 0xff)) x 171 drivers/staging/comedi/drivers/plx9080.h #define PLX_LBRD_MSIWS(x) (BIT(2) * ((x) & 0xf)) x 189 drivers/staging/comedi/drivers/plx9080.h #define PLX_LBRD_PFCOUNT(x) (BIT(11) * ((x) & 0xf)) x 199 drivers/staging/comedi/drivers/plx9080.h #define PLX_LBRD0_EROMIWS(x) (BIT(18) * ((x) & 0xf)) x 215 drivers/staging/comedi/drivers/plx9080.h #define PLX_LBRD0_TRDELAY(x) (BIT(28) * ((x) & 0xF)) x 246 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMPBAM_PAFL(x) ((BIT(10) * !!((x) & 0x10)) | \ x 247 drivers/staging/comedi/drivers/plx9080.h (BIT(5) * ((x) & 0xf))) x 274 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMCFGA_REGNUM(x) (BIT(2) * ((x) & 0x3f)) x 278 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMCFGA_FUNCNUM(x) (BIT(8) * ((x) & 0x7)) x 282 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMCFGA_DEVNUM(x) (BIT(11) * ((x) & 0x1f)) x 286 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMCFGA_BUSNUM(x) (BIT(16) * ((x) & 0xff)) x 397 drivers/staging/comedi/drivers/plx9080.h #define PLX_CNTRL_CCRDMA(x) (BIT(0) * ((x) & 0xf)) x 402 drivers/staging/comedi/drivers/plx9080.h #define PLX_CNTRL_CCWDMA(x) (BIT(4) * ((x) & 0xf)) x 407 drivers/staging/comedi/drivers/plx9080.h #define PLX_CNTRL_CCRDM(x) (BIT(8) * ((x) & 0xf)) x 412 drivers/staging/comedi/drivers/plx9080.h #define PLX_CNTRL_CCWDM(x) (BIT(12) * ((x) & 0xf)) x 467 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMAMODE_IWS(x) (BIT(2) * ((x) & 0xf)) x 554 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C0PLAF(x) (BIT(0) * ((x) & 0xf)) x 558 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C0LPAE(x) (BIT(4) * ((x) & 0xf)) x 562 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C0LPAF(x) (BIT(8) * ((x) & 0xf)) x 566 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C0PLAE(x) (BIT(12) * ((x) & 0xf)) x 570 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C1PLAF(x) (BIT(16) * ((x) & 0xf)) x 574 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C1LPAE(x) (BIT(20) * ((x) & 0xf)) x 578 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C1LPAF(x) (BIT(24) * ((x) & 0xf)) x 582 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMATHR_C1PLAE(x) (BIT(28) * ((x) & 0xf)) x 60 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_SCANLIST_GAIN(x) (((x) & 0x3) << 12) x 61 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_SCANLIST_CHANNEL(x) (((x) & 0xf) << 8) x 63 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_SCANLIST_EXT_GAIN(x) (((x) & 0x3) << 4) x 64 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_SCANLIST_EXT_CHANNEL(x) (((x) & 0xf) << 0) x 67 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_CTRL_PACER_CLK(x) (((x) & 0x3) << 6) x 107 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_CMD_SCANRATE(x) (((x) & 0x3) << 1) x 122 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_AUX_TIMER_MODE(x) (((x) & 0x3) << 3) x 128 drivers/staging/comedi/drivers/quatech_daqp_cs.c #define DAQP_AUX_DA_UPDATE(x) (((x) & 0x3) << 0) x 111 drivers/staging/comedi/drivers/rtd520.c #define LAS0_UPDATE_DAC(x) (0x0014 + ((x) * 0x4)) /* D/Ax Update (w) */ x 166 drivers/staging/comedi/drivers/rtd520.c #define LAS0_DAC_CTRL(x) (0x0150 + ((x) * 0x14)) /* D/Ax type/range */ x 167 drivers/staging/comedi/drivers/rtd520.c #define LAS0_DAC_SRC(x) (0x0154 + ((x) * 0x14)) /* D/Ax update source */ x 168 drivers/staging/comedi/drivers/rtd520.c #define LAS0_DAC_CYCLE(x) (0x0158 + ((x) * 0x14)) /* D/Ax cycle mode */ x 169 drivers/staging/comedi/drivers/rtd520.c #define LAS0_DAC_RESET(x) (0x015c + ((x) * 0x14)) /* D/Ax FIFO reset */ x 170 drivers/staging/comedi/drivers/rtd520.c #define LAS0_DAC_FIFO_CLEAR(x) (0x0160 + ((x) * 0x14)) /* D/Ax FIFO clear */ x 181 drivers/staging/comedi/drivers/rtd520.c #define LAS0_8254_CLK_SEL(x) (0x01ac + ((x) * 0x8)) /* 8254 clock select */ x 182 drivers/staging/comedi/drivers/rtd520.c #define LAS0_8254_GATE_SEL(x) (0x01b0 + ((x) * 0x8)) /* 8254 gate select */ x 193 drivers/staging/comedi/drivers/rtd520.c #define LAS1_DAC_FIFO(x) (0x0008 + ((x) * 0x4)) /* D/Ax FIFO (16bit) */ x 36 drivers/staging/comedi/drivers/s526.c #define S526_TIMER_LOAD(x) (((x) & 0xff) << 8) x 37 drivers/staging/comedi/drivers/s526.c #define S526_TIMER_MODE ((x) << 1) x 44 drivers/staging/comedi/drivers/s526.c #define S526_WDOG_INTERVAL(x) (((x) & 0x7) << 0) x 47 drivers/staging/comedi/drivers/s526.c #define S526_AO_CTRL_CHAN(x) (((x) & 0x3) << 1) x 51 drivers/staging/comedi/drivers/s526.c #define S526_AI_CTRL_CONV(x) (1 << (5 + ((x) & 0x9))) x 52 drivers/staging/comedi/drivers/s526.c #define S526_AI_CTRL_READ(x) (((x) & 0xf) << 1) x 66 drivers/staging/comedi/drivers/s526.c #define S526_INT_DIO(x) BIT(8 + ((x) & 0x7)) x 68 drivers/staging/comedi/drivers/s526.c #define S526_INT_CNTR(x) BIT(3 + (3 - ((x) & 0x3))) x 74 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_LSB_REG(x) (0x12 + ((x) * 8)) x 75 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MSB_REG(x) (0x14 + ((x) * 8)) x 76 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_REG(x) (0x16 + ((x) * 8)) x 77 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_COUT_SRC(x) ((x) << 0) x 81 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_COUT_POL(x) ((x) << 1) x 85 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_AUTOLOAD(x) ((x) << 2) x 92 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_HWCTEN_SRC(x) ((x) << 5) x 98 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_CTEN_CTRL(x) ((x) << 7) x 104 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_CLK_SRC(x) ((x) << 9) x 116 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_CT_DIR(x) ((x) << 11) x 121 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_CTDIR_CTRL(x) ((x) << 12) x 125 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_LATCH_CTRL(x) ((x) << 13) x 129 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_MODE_PR_SELECT(x) ((x) << 14) x 134 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_CTRL_REG(x) (0x18 + ((x) * 8)) x 135 drivers/staging/comedi/drivers/s526.c #define S526_GPCT_CTRL_EV_STATUS(x) ((x) << 0) /* RC */ x 145 drivers/staging/comedi/drivers/s526.c #define S525_GPCT_CTRL_INTEN(x) ((x) << 6) /* W */ x 153 drivers/staging/comedi/drivers/s526.c #define S525_GPCT_CTRL_LATCH_SEL(x) ((x) << 10) /* W */ x 165 drivers/staging/comedi/drivers/s526.c #define S526_EEPROM_CTRL_ADDR(x) (((x) & 0x3f) << 3) x 166 drivers/staging/comedi/drivers/s526.c #define S526_EEPROM_CTRL(x) (((x) & 0x3) << 1) x 263 drivers/staging/comedi/drivers/s626.h #define S626_LP_RDDIN(x) (0x0040 + (x) * 0x10) /* R: digital input */ x 264 drivers/staging/comedi/drivers/s626.h #define S626_LP_WRINTSEL(x) (0x0042 + (x) * 0x10) /* W: int enable */ x 265 drivers/staging/comedi/drivers/s626.h #define S626_LP_WREDGSEL(x) (0x0044 + (x) * 0x10) /* W: edge selection */ x 266 drivers/staging/comedi/drivers/s626.h #define S626_LP_WRCAPSEL(x) (0x0046 + (x) * 0x10) /* W: capture enable */ x 267 drivers/staging/comedi/drivers/s626.h #define S626_LP_RDCAPFLG(x) (0x0048 + (x) * 0x10) /* R: edges captured */ x 268 drivers/staging/comedi/drivers/s626.h #define S626_LP_WRDOUT(x) (0x0048 + (x) * 0x10) /* W: digital output */ x 269 drivers/staging/comedi/drivers/s626.h #define S626_LP_RDINTSEL(x) (0x004a + (x) * 0x10) /* R: int enable */ x 270 drivers/staging/comedi/drivers/s626.h #define S626_LP_RDEDGSEL(x) (0x004c + (x) * 0x10) /* R: edge selection */ x 271 drivers/staging/comedi/drivers/s626.h #define S626_LP_RDCAPSEL(x) (0x004e + (x) * 0x10) /* R: capture enable */ x 274 drivers/staging/comedi/drivers/s626.h #define S626_LP_CRA(x) (0x0000 + (((x) % 3) * 0x4)) x 275 drivers/staging/comedi/drivers/s626.h #define S626_LP_CRB(x) (0x0002 + (((x) % 3) * 0x4)) x 278 drivers/staging/comedi/drivers/s626.h #define S626_LP_CNTR(x) (0x000c + (((x) < 3) ? 0x0 : 0x4) + \ x 279 drivers/staging/comedi/drivers/s626.h (((x) % 3) * 0x8)) x 612 drivers/staging/comedi/drivers/s626.h #define S626_MAKE(x, w, p) (((x) & ((1 << (w)) - 1)) << (p)) x 649 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_INDXSRC_B(x) \ x 650 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_INDXSRC_B, S626_CRABIT_INDXSRC_B) x 651 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_CNTSRC_B(x) \ x 652 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_CNTSRC_B, S626_CRABIT_CNTSRC_B) x 653 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_INDXPOL_A(x) \ x 654 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_INDXPOL_A, S626_CRABIT_INDXPOL_A) x 655 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_LOADSRC_A(x) \ x 656 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_LOADSRC_A, S626_CRABIT_LOADSRC_A) x 657 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_CLKMULT_A(x) \ x 658 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_CLKMULT_A, S626_CRABIT_CLKMULT_A) x 659 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_INTSRC_A(x) \ x 660 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_INTSRC_A, S626_CRABIT_INTSRC_A) x 661 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_CLKPOL_A(x) \ x 662 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_CLKPOL_A, S626_CRABIT_CLKPOL_A) x 663 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_INDXSRC_A(x) \ x 664 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_INDXSRC_A, S626_CRABIT_INDXSRC_A) x 665 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRA_CNTSRC_A(x) \ x 666 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRAWID_CNTSRC_A, S626_CRABIT_CNTSRC_A) x 745 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_INTRESETCMD(x) \ x 746 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_INTRESETCMD, S626_CRBBIT_INTRESETCMD) x 747 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_INTRESET_B(x) \ x 748 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_INTRESET_B, S626_CRBBIT_INTRESET_B) x 749 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_INTRESET_A(x) \ x 750 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_INTRESET_A, S626_CRBBIT_INTRESET_A) x 751 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_CLKENAB_A(x) \ x 752 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_CLKENAB_A, S626_CRBBIT_CLKENAB_A) x 753 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_INTSRC_B(x) \ x 754 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_INTSRC_B, S626_CRBBIT_INTSRC_B) x 755 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_LATCHSRC(x) \ x 756 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_LATCHSRC, S626_CRBBIT_LATCHSRC) x 757 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_LOADSRC_B(x) \ x 758 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_LOADSRC_B, S626_CRBBIT_LOADSRC_B) x 759 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_CLEAR_B(x) \ x 760 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_CLEAR_B, S626_CRBBIT_CLEAR_B) x 761 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_CLKMULT_B(x) \ x 762 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_CLKMULT_B, S626_CRBBIT_CLKMULT_B) x 763 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_CLKENAB_B(x) \ x 764 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_CLKENAB_B, S626_CRBBIT_CLKENAB_B) x 765 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_INDXPOL_B(x) \ x 766 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_INDXPOL_B, S626_CRBBIT_INDXPOL_B) x 767 drivers/staging/comedi/drivers/s626.h #define S626_SET_CRB_CLKPOL_B(x) \ x 768 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_CRBWID_CLKPOL_B, S626_CRBBIT_CLKPOL_B) x 830 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_INTSRC(x) \ x 831 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_INTSRC, S626_STDBIT_INTSRC) x 832 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_LATCHSRC(x) \ x 833 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_LATCHSRC, S626_STDBIT_LATCHSRC) x 834 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_LOADSRC(x) \ x 835 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_LOADSRC, S626_STDBIT_LOADSRC) x 836 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_INDXSRC(x) \ x 837 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_INDXSRC, S626_STDBIT_INDXSRC) x 838 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_INDXPOL(x) \ x 839 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_INDXPOL, S626_STDBIT_INDXPOL) x 840 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_ENCMODE(x) \ x 841 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_ENCMODE, S626_STDBIT_ENCMODE) x 842 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_CLKPOL(x) \ x 843 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_CLKPOL, S626_STDBIT_CLKPOL) x 844 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_CLKMULT(x) \ x 845 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_CLKMULT, S626_STDBIT_CLKMULT) x 846 drivers/staging/comedi/drivers/s626.h #define S626_SET_STD_CLKENAB(x) \ x 847 drivers/staging/comedi/drivers/s626.h S626_MAKE((x), S626_STDWID_CLKENAB, S626_STDBIT_CLKENAB) x 28 drivers/staging/comedi/drivers/tests/ni_routes_test.c #define O(x) ((x) + NI_NAMES_BASE) x 29 drivers/staging/comedi/drivers/tests/ni_routes_test.c #define B(x) ((x) - NI_NAMES_BASE) x 30 drivers/staging/comedi/drivers/tests/ni_routes_test.c #define V(x) ((x) | 0x80) x 28 drivers/staging/comedi/drivers/z8536.h #define Z8536_CFG_CTRL_LC(x) (((x) & 0x3) << 0) /* Link Control */ x 47 drivers/staging/comedi/drivers/z8536.h #define Z8536_CT_CMDSTAT_REG(x) (0x0a + (x)) x 48 drivers/staging/comedi/drivers/z8536.h #define Z8536_CMD(x) (((x) & 0x7) << 5) x 87 drivers/staging/comedi/drivers/z8536.h #define Z8536_CT_VAL_MSB_REG(x) (0x10 + ((x) * 2)) x 88 drivers/staging/comedi/drivers/z8536.h #define Z8536_CT_VAL_LSB_REG(x) (0x11 + ((x) * 2)) x 97 drivers/staging/comedi/drivers/z8536.h #define Z8536_CT_RELOAD_MSB_REG(x) (0x16 + ((x) * 2)) x 98 drivers/staging/comedi/drivers/z8536.h #define Z8536_CT_RELOAD_LSB_REG(x) (0x17 + ((x) * 2)) x 104 drivers/staging/comedi/drivers/z8536.h #define Z8536_CT_MODE_REG(x) (0x1c + (x)) x 111 drivers/staging/comedi/drivers/z8536.h #define Z8536_CT_MODE_DCS(x) (((x) & 0x3) << 0) /* Duty Cycle */ x 121 drivers/staging/comedi/drivers/z8536.h #define Z8536_PAB_MODE_PTS(x) (((x) & 0x3) << 6) /* Port type */ x 130 drivers/staging/comedi/drivers/z8536.h #define Z8536_PAB_MODE_PMS(x) (((x) & 0x3) << 1) /* Pattern Mode */ x 142 drivers/staging/comedi/drivers/z8536.h #define Z8536_PAB_HANDSHAKE_HST(x) (((x) & 0x3) << 6) /* Handshake Type */ x 148 drivers/staging/comedi/drivers/z8536.h #define Z8536_PAB_HANDSHAKE_RWS(x) (((x) & 0x7) << 3) /* Req/Wait */ x 156 drivers/staging/comedi/drivers/z8536.h #define Z8536_PAB_HANDSHAKE_DESKEW(x) ((x) << 0)/* Deskew Time */ x 86 drivers/staging/exfat/exfat.h #define CLUSTER_16(x) ((u16)(x)) x 87 drivers/staging/exfat/exfat.h #define CLUSTER_32(x) ((u32)(x)) x 89 drivers/staging/exfat/exfat.h #define START_SECTOR(x) \ x 90 drivers/staging/exfat/exfat.h ((((sector_t)((x) - 2)) << p_fs->sectors_per_clu_bits) + \ x 44 drivers/staging/exfat/exfat_super.c #define INC_IVERSION(x) (inode_inc_iversion(x)) x 45 drivers/staging/exfat/exfat_super.c #define GET_IVERSION(x) (inode_peek_iversion_raw(x)) x 46 drivers/staging/exfat/exfat_super.c #define SET_IVERSION(x, y) (inode_set_iversion(x, y)) x 242 drivers/staging/fbtft/fb_agm1264k-fl.c int x, i; x 244 drivers/staging/fbtft/fb_agm1264k-fl.c for (x = xs; x < xe; ++x) { x 248 drivers/staging/fbtft/fb_agm1264k-fl.c if (src[(y * 8 + i) * par->info->var.xres + x]) x 258 drivers/staging/fbtft/fb_agm1264k-fl.c static void iterate_diffusion_matrix(u32 xres, u32 yres, int x, x 272 drivers/staging/fbtft/fb_agm1264k-fl.c if (x + i < 0 || x + i >= xres || y + j >= yres) x 274 drivers/staging/fbtft/fb_agm1264k-fl.c write_pos = &convert_buf[(y + j) * xres + x + i]; x 295 drivers/staging/fbtft/fb_agm1264k-fl.c int x, y; x 306 drivers/staging/fbtft/fb_agm1264k-fl.c for (x = 0; x < par->info->var.xres; ++x) x 308 drivers/staging/fbtft/fb_agm1264k-fl.c u16 pixel = vmem16[y * par->info->var.xres + x]; x 318 drivers/staging/fbtft/fb_agm1264k-fl.c convert_buf[y * par->info->var.xres + x] = x 323 drivers/staging/fbtft/fb_agm1264k-fl.c for (x = 0; x < par->info->var.xres; ++x) x 326 drivers/staging/fbtft/fb_agm1264k-fl.c convert_buf[y * par->info->var.xres + x]; x 346 drivers/staging/fbtft/fb_agm1264k-fl.c x, y, convert_buf, x 108 drivers/staging/fbtft/fb_pcd8544.c int x, y, i; x 111 drivers/staging/fbtft/fb_pcd8544.c for (x = 0; x < 84; x++) { x 115 drivers/staging/fbtft/fb_pcd8544.c *buf |= (vmem16[(y * 8 + i) * 84 + x] ? x 116 drivers/staging/fbtft/fb_sh1106.c int page, page_start, page_end, x, i, ret; x 128 drivers/staging/fbtft/fb_sh1106.c for (x = 0; x < xres; x++) x 130 drivers/staging/fbtft/fb_sh1106.c if (vmem16[(page * 8 + i) * xres + x]) x 131 drivers/staging/fbtft/fb_sh1106.c buf[x] |= BIT(i); x 156 drivers/staging/fbtft/fb_ssd1305.c int x, y, i; x 159 drivers/staging/fbtft/fb_ssd1305.c for (x = 0; x < par->info->var.xres; x++) { x 164 drivers/staging/fbtft/fb_ssd1305.c par->info->var.xres + x] ? x 180 drivers/staging/fbtft/fb_ssd1306.c int x, y, i; x 183 drivers/staging/fbtft/fb_ssd1306.c for (x = 0; x < xres; x++) { x 187 drivers/staging/fbtft/fb_ssd1306.c if (vmem16[(y * 8 + i) * xres + x]) x 143 drivers/staging/fbtft/fb_ssd1325.c int y, x; x 146 drivers/staging/fbtft/fb_ssd1325.c for (x = 0; x < par->info->var.xres; x++) { x 147 drivers/staging/fbtft/fb_ssd1325.c if (x % 2) x 150 drivers/staging/fbtft/fb_ssd1325.c n1 = rgb565_to_g16(vmem16[y * par->info->var.xres + x]); x 152 drivers/staging/fbtft/fb_ssd1325.c [y * par->info->var.xres + x + 1]); x 89 drivers/staging/fbtft/fb_tls8204.c int x, y, i; x 101 drivers/staging/fbtft/fb_tls8204.c for (x = 0; x < WIDTH; x++) { x 106 drivers/staging/fbtft/fb_tls8204.c if (vmem16[(y * 8 * WIDTH) + i + x]) x 221 drivers/staging/fbtft/fb_uc1611.c int x, y, i; x 231 drivers/staging/fbtft/fb_uc1611.c for (x = 0; x < line_length; x += 2) { x 244 drivers/staging/fbtft/fb_uc1611.c for (x = 0; x < line_length; x++) { x 265 drivers/staging/fbtft/fb_uc1611.c for (x = 0; x < line_length; x += 2) { x 279 drivers/staging/fbtft/fb_uc1611.c for (x = 0; x < line_length; x++) { x 122 drivers/staging/fbtft/fb_uc1701.c int x, y, i; x 127 drivers/staging/fbtft/fb_uc1701.c for (x = 0; x < WIDTH; x++) { x 131 drivers/staging/fbtft/fb_uc1701.c (i * WIDTH)) + x] ? x 34 drivers/staging/gasket/gasket_core.c #define trace_gasket_mmap_exit(x) x 35 drivers/staging/gasket/gasket_core.c #define trace_gasket_mmap_entry(x, ...) x 16 drivers/staging/gasket/gasket_interrupt.c #define trace_gasket_interrupt_event(x, ...) x 18 drivers/staging/gasket/gasket_ioctl.c #define trace_gasket_ioctl_entry(x, ...) x 19 drivers/staging/gasket/gasket_ioctl.c #define trace_gasket_ioctl_exit(x) x 20 drivers/staging/gasket/gasket_ioctl.c #define trace_gasket_ioctl_integer_data(x) x 21 drivers/staging/gasket/gasket_ioctl.c #define trace_gasket_ioctl_eventfd_data(x, ...) x 22 drivers/staging/gasket/gasket_ioctl.c #define trace_gasket_ioctl_page_table_data(x, ...) x 23 drivers/staging/gasket/gasket_ioctl.c #define trace_gasket_ioctl_config_coherent_allocator(x, ...) x 7 drivers/staging/gdm724x/gdm_endian.c __dev16 gdm_cpu_to_dev16(u8 dev_ed, u16 x) x 10 drivers/staging/gdm724x/gdm_endian.c return (__force __dev16)cpu_to_le16(x); x 12 drivers/staging/gdm724x/gdm_endian.c return (__force __dev16)cpu_to_be16(x); x 15 drivers/staging/gdm724x/gdm_endian.c u16 gdm_dev16_to_cpu(u8 dev_ed, __dev16 x) x 18 drivers/staging/gdm724x/gdm_endian.c return le16_to_cpu((__force __le16)x); x 20 drivers/staging/gdm724x/gdm_endian.c return be16_to_cpu((__force __be16)x); x 23 drivers/staging/gdm724x/gdm_endian.c __dev32 gdm_cpu_to_dev32(u8 dev_ed, u32 x) x 26 drivers/staging/gdm724x/gdm_endian.c return (__force __dev32)cpu_to_le32(x); x 28 drivers/staging/gdm724x/gdm_endian.c return (__force __dev32)cpu_to_be32(x); x 31 drivers/staging/gdm724x/gdm_endian.c u32 gdm_dev32_to_cpu(u8 dev_ed, __dev32 x) x 34 drivers/staging/gdm724x/gdm_endian.c return le32_to_cpu((__force __le32)x); x 36 drivers/staging/gdm724x/gdm_endian.c return be32_to_cpu((__force __be32)x); x 25 drivers/staging/gdm724x/gdm_endian.h __dev16 gdm_cpu_to_dev16(u8 dev_ed, u16 x); x 26 drivers/staging/gdm724x/gdm_endian.h u16 gdm_dev16_to_cpu(u8 dev_ed, __dev16 x); x 27 drivers/staging/gdm724x/gdm_endian.h __dev32 gdm_cpu_to_dev32(u8 dev_ed, u32 x); x 28 drivers/staging/gdm724x/gdm_endian.h u32 gdm_dev32_to_cpu(u8 dev_ed, __dev32 x); x 109 drivers/staging/goldfish/goldfish_audio.c int addr, unsigned int x) x 111 drivers/staging/goldfish/goldfish_audio.c writel(x, data->reg_base + addr); x 115 drivers/staging/goldfish/goldfish_audio.c int addr_lo, int addr_hi, unsigned int x) x 119 drivers/staging/goldfish/goldfish_audio.c gf_write_dma_addr(x, reg_base + addr_lo, reg_base + addr_hi); x 13 drivers/staging/greybus/audio_manager_module.c #define to_gb_audio_module_attr(x) \ x 14 drivers/staging/greybus/audio_manager_module.c container_of(x, struct gb_audio_manager_module_attribute, attr) x 15 drivers/staging/greybus/audio_manager_module.c #define to_gb_audio_module(x) \ x 16 drivers/staging/greybus/audio_manager_module.c container_of(x, struct gb_audio_manager_module, kobj) x 56 drivers/staging/greybus/power_supply.c #define to_gb_power_supply(x) power_supply_get_drvdata(x) x 45 drivers/staging/iio/adc/ad7192.c #define AD7192_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */ x 58 drivers/staging/iio/adc/ad7192.c #define AD7192_MODE_SEL(x) (((x) & 0x7) << 21) /* Operation Mode Select */ x 61 drivers/staging/iio/adc/ad7192.c #define AD7192_MODE_CLKSRC(x) (((x) & 0x3) << 18) /* Clock Source Select */ x 68 drivers/staging/iio/adc/ad7192.c #define AD7192_MODE_RATE(x) ((x) & 0x3FF) /* Filter Update Rate Select */ x 93 drivers/staging/iio/adc/ad7192.c #define AD7192_CONF_CHAN(x) ((x) << 8) /* Channel select */ x 99 drivers/staging/iio/adc/ad7192.c #define AD7192_CONF_GAIN(x) ((x) & 0x7) /* Gain Select */ x 72 drivers/staging/iio/adc/ad7280a.c #define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1) x 80 drivers/staging/iio/adc/ad7280a.c #define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5) x 69 drivers/staging/iio/cdc/ad7746.c #define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0) x 85 drivers/staging/iio/cdc/ad7746.c #define AD7746_CAPDAC_DACP(x) ((x) & 0x7F) x 62 drivers/staging/iio/frequency/ad9832.c #define AD9832_PHASE(x) (((x) & 3) << 9) x 50 drivers/staging/iio/impedance-analyzer/ad5933.c #define AD5933_CTRL_RANGE(x) ((x) << 1) x 26 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_CONFIG_DEC_AXI_RD_ID(x) (((x) & 0xff) << 24) x 35 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_CONFIG_DEC_LATENCY(x) (((x) & 0x3f) << 11) x 39 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_CONFIG_PRIORITY_MODE(x) (((x) & 0x7) << 5) x 43 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_CONFIG_DEC_MAX_BURST(x) (((x) & 0x1f) << 0) x 45 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL0_DEC_MODE(x) (((x) & 0xf) << 28) x 68 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL0_DEC_AXI_WR_ID(x) (((x) & 0xff) << 0) x 70 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL1_PIC_MB_WIDTH(x) (((x) & 0x1ff) << 23) x 71 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL1_MB_WIDTH_OFF(x) (((x) & 0xf) << 19) x 72 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL1_PIC_MB_HEIGHT_P(x) (((x) & 0xff) << 11) x 73 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL1_MB_HEIGHT_OFF(x) (((x) & 0xf) << 7) x 76 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL1_REF_FRAMES(x) (((x) & 0x1f) << 0) x 77 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL1_PIC_MB_W_EXT(x) (((x) & 0x7) << 3) x 78 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL1_PIC_MB_H_EXT(x) (((x) & 0x7) << 0) x 81 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_STRM_START_BIT(x) (((x) & 0x3f) << 26) x 84 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_CH_QP_OFFSET(x) (((x) & 0x1f) << 19) x 85 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_CH_QP_OFFSET2(x) (((x) & 0x1f) << 14) x 87 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_INTRADC_VLC_THR(x) (((x) & 0x7) << 16) x 88 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_VOP_TIME_INCR(x) (((x) & 0xffff) << 0) x 94 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_TRANSACFRM(x) (((x) & 0x3) << 15) x 95 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_TRANSACFRM2(x) (((x) & 0x3) << 13) x 96 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_MB_MODE_TAB(x) (((x) & 0x7) << 10) x 97 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_MVTAB(x) (((x) & 0x7) << 7) x 98 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_CBPTAB(x) (((x) & 0x7) << 4) x 99 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_2MV_BLK_PAT_TAB(x) (((x) & 0x3) << 2) x 100 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_4MV_BLK_PAT_TAB(x) (((x) & 0x3) << 0) x 103 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_INTRA_DC_PREC(x) (((x) & 0x3) << 2) x 106 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_JPEG_QTABLES(x) (((x) & 0x3) << 11) x 107 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_JPEG_MODE(x) (((x) & 0x7) << 8) x 116 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_STRM1_START_BIT(x) (((x) & 0x3f) << 18) x 119 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_BOOLEAN_VALUE(x) (((x) & 0xff) << 8) x 120 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_BOOLEAN_RANGE(x) (((x) & 0xff) << 0) x 121 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_ALPHA_OFFSET(x) (((x) & 0x1f) << 5) x 122 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL2_BETA_OFFSET(x) (((x) & 0x1f) << 0) x 125 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL3_INIT_QP(x) (((x) & 0x3f) << 25) x 127 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL3_STREAM_LEN_EXT(x) (((x) & 0xff) << 24) x 128 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL3_STREAM_LEN(x) (((x) & 0xffffff) << 0) x 134 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(x) (((x) & 0x3) << 26) x 136 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_FRAMENUM_LEN(x) (((x) & 0x1f) << 16) x 137 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_FRAMENUM(x) (((x) & 0xffff) << 0) x 141 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_ALT_PQUANT(x) (((x) & 0x1f) << 24) x 142 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_DQ_EDGES(x) (((x) & 0xf) << 20) x 144 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_PQINDEX(x) (((x) & 0x1f) << 14) x 149 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_TTFRM(x) (((x) & 0x3) << 8) x 156 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_PJPEG_AH(x) (((x) & 0xf) << 20) x 157 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_PJPEG_AL(x) (((x) & 0xf) << 16) x 158 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_PJPEG_SS(x) (((x) & 0xff) << 8) x 159 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_PJPEG_SE(x) (((x) & 0xff) << 0) x 160 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_DCT1_START_BIT(x) (((x) & 0x3f) << 26) x 161 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_DCT2_START_BIT(x) (((x) & 0x3f) << 20) x 163 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_INIT_DC_MATCH0(x) (((x) & 0x7) << 9) x 164 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL4_INIT_DC_MATCH1(x) (((x) & 0x7) << 6) x 171 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_REFPIC_MK_LEN(x) (((x) & 0x7ff) << 17) x 173 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_IDR_PIC_ID(x) (((x) & 0xffff) << 0) x 174 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_MV_SCALEFACTOR(x) (((x) & 0xff) << 24) x 175 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_REF_DIST_FWD(x) (((x) & 0x1f) << 19) x 176 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_REF_DIST_BWD(x) (((x) & 0x1f) << 14) x 177 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_LOOP_FILT_LIMIT(x) (((x) & 0xf) << 14) x 179 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_MV_THRESHOLD(x) (((x) & 0x7) << 10) x 180 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_VAR_THRESHOLD(x) (((x) & 0x3ff) << 0) x 182 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_DIVX3_SLICE_SIZE(x) (((x) & 0xff) << 0) x 183 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_PJPEG_REST_FREQ(x) (((x) & 0xffff) << 0) x 184 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_RV_PROFILE(x) (((x) & 0x3) << 30) x 185 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_RV_OSV_QUANT(x) (((x) & 0x3) << 28) x 186 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_RV_FWD_SCALE(x) (((x) & 0x3fff) << 14) x 187 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_RV_BWD_SCALE(x) (((x) & 0x3fff) << 0) x 188 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_INIT_DC_COMP0(x) (((x) & 0xffff) << 16) x 189 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL5_INIT_DC_COMP1(x) (((x) & 0xffff) << 0) x 191 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_PPS_ID(x) (((x) & 0xff) << 24) x 192 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_REFIDX1_ACTIVE(x) (((x) & 0x1f) << 19) x 193 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_REFIDX0_ACTIVE(x) (((x) & 0x1f) << 14) x 194 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_POC_LENGTH(x) (((x) & 0xff) << 0) x 196 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_ISCALE0(x) (((x) & 0xff) << 16) x 197 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_ISHIFT0(x) (((x) & 0xffff) << 0) x 198 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_STREAM1_LEN(x) (((x) & 0xffffff) << 0) x 199 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_PIC_SLICE_AM(x) (((x) & 0x1fff) << 0) x 200 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL6_COEFFS_PART_AM(x) (((x) & 0xf) << 24) x 202 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC_PINIT_RLIST_F5(x) (((x) & 0x1f) << 25) x 203 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC_PINIT_RLIST_F4(x) (((x) & 0x1f) << 20) x 204 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 15) x 205 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 10) x 206 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 5) x 207 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 0) x 209 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC1_ISCALE1(x) (((x) & 0xff) << 16) x 210 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC1_ISHIFT1(x) (((x) & 0xffff) << 0) x 211 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_FWD_PIC1_SEGMENT_BASE(x) ((x) << 0) x 215 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_PINIT_RLIST_F15(x) (((x) & 0x1f) << 25) x 216 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_PINIT_RLIST_F14(x) (((x) & 0x1f) << 20) x 217 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_PINIT_RLIST_F13(x) (((x) & 0x1f) << 15) x 218 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_PINIT_RLIST_F12(x) (((x) & 0x1f) << 10) x 219 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_PINIT_RLIST_F11(x) (((x) & 0x1f) << 5) x 220 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_PINIT_RLIST_F10(x) (((x) & 0x1f) << 0) x 222 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_ISCALE2(x) (((x) & 0xff) << 16) x 223 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_ISHIFT2(x) (((x) & 0xffff) << 0) x 224 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_DCT3_START_BIT(x) (((x) & 0x3f) << 24) x 225 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_DCT4_START_BIT(x) (((x) & 0x3f) << 18) x 226 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_DCT5_START_BIT(x) (((x) & 0x3f) << 12) x 227 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_DCT6_START_BIT(x) (((x) & 0x3f) << 6) x 228 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_DEC_CTRL7_DCT7_START_BIT(x) (((x) & 0x3f) << 0) x 236 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_FILT_SHARPNESS(x) (((x) & 0x7) << 28) x 237 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_MB_ADJ_0(x) (((x) & 0x7f) << 21) x 238 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_MB_ADJ_1(x) (((x) & 0x7f) << 14) x 239 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_MB_ADJ_2(x) (((x) & 0x7f) << 7) x 240 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_MB_ADJ_3(x) (((x) & 0x7f) << 0) x 241 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_REFER1_NBR(x) (((x) & 0xffff) << 16) x 242 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_REFER0_NBR(x) (((x) & 0xffff) << 0) x 243 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_LF_LEVEL_0(x) (((x) & 0x3f) << 18) x 244 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_LF_LEVEL_1(x) (((x) & 0x3f) << 12) x 245 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_LF_LEVEL_2(x) (((x) & 0x3f) << 6) x 246 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_LF_LEVEL_3(x) (((x) & 0x3f) << 0) x 247 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_QUANT_DELTA_0(x) (((x) & 0x1f) << 27) x 248 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_QUANT_DELTA_1(x) (((x) & 0x1f) << 22) x 249 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_QUANT_0(x) (((x) & 0x7ff) << 11) x 250 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_PIC_QUANT_1(x) (((x) & 0x7ff) << 0) x 256 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_BINIT_RLIST_B2(x) (((x) & 0x1f) << 25) x 257 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_BINIT_RLIST_F2(x) (((x) & 0x1f) << 20) x 258 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_BINIT_RLIST_B1(x) (((x) & 0x1f) << 15) x 259 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_BINIT_RLIST_F1(x) (((x) & 0x1f) << 10) x 260 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_BINIT_RLIST_B0(x) (((x) & 0x1f) << 5) x 261 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_BINIT_RLIST_F0(x) (((x) & 0x1f) << 0) x 262 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_PRED_TAP_2_M1(x) (((x) & 0x3) << 10) x 263 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_PRED_TAP_2_4(x) (((x) & 0x3) << 8) x 264 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_PRED_TAP_4_M1(x) (((x) & 0x3) << 6) x 265 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_PRED_TAP_4_4(x) (((x) & 0x3) << 4) x 266 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_PRED_TAP_6_M1(x) (((x) & 0x3) << 2) x 267 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_PRED_TAP_6_4(x) (((x) & 0x3) << 0) x 268 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_QUANT_DELTA_2(x) (((x) & 0x1f) << 27) x 269 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_QUANT_DELTA_3(x) (((x) & 0x1f) << 22) x 270 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_QUANT_2(x) (((x) & 0x7ff) << 11) x 271 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_REF_PIC_QUANT_3(x) (((x) & 0x7ff) << 0) x 273 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_P_REF_PIC_QUANT_DELTA_4(x) (((x) & 0x1f) << 27) x 274 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_P_REF_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 25) x 275 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_P_REF_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 20) x 276 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_P_REF_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 15) x 277 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_P_REF_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 10) x 278 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_P_REF_PIC_BINIT_RLIST_B15(x) (((x) & 0x1f) << 5) x 279 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_BD_P_REF_PIC_BINIT_RLIST_F15(x) (((x) & 0x1f) << 0) x 281 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_ERR_CONC_STARTMB_X(x) (((x) & 0x1ff) << 23) x 282 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_ERR_CONC_STARTMB_Y(x) (((x) & 0xff) << 15) x 284 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_PRED_FLT_PRED_BC_TAP_0_0(x) (((x) & 0x3ff) << 22) x 285 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_PRED_FLT_PRED_BC_TAP_0_1(x) (((x) & 0x3ff) << 12) x 286 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_PRED_FLT_PRED_BC_TAP_0_2(x) (((x) & 0x3ff) << 2) x 289 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_BUF_CTRL_REFBU_THR(x) (((x) & 0xfff) << 19) x 290 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_BUF_CTRL_REFBU_PICID(x) (((x) & 0x1f) << 14) x 293 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_BUF_CTRL_REFBU_Y_OFFSET(x) (((x) & 0x1ff) << 0) x 296 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_BUF_CTRL2_REFBU2_THR(x) (((x) & 0xfff) << 19) x 297 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_BUF_CTRL2_REFBU2_PICID(x) (((x) & 0x1f) << 14) x 298 drivers/staging/media/hantro/hantro_g1_regs.h #define G1_REG_REF_BUF_CTRL2_APF_THRESHOLD(x) (((x) & 0x3fff) << 0) x 20 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_AXI_CTRL_BURST_LEN(x) ((x) << 8) x 48 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_IN_IMG_CTRL_ROW_LEN(x) ((x) << 12) x 49 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_IN_IMG_CTRL_OVRFLR_D4(x) ((x) << 10) x 50 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_IN_IMG_CTRL_OVRFLB_D4(x) ((x) << 6) x 51 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_IN_IMG_CTRL_FMT(x) ((x) << 2) x 53 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL0_INIT_QP(x) ((x) << 26) x 54 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL0_SLICE_ALPHA(x) ((x) << 22) x 55 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL0_SLICE_BETA(x) ((x) << 18) x 56 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL0_CHROMA_QP_OFFSET(x) ((x) << 13) x 57 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL0_FILTER_DIS(x) ((x) << 5) x 58 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL0_IDR_PICID(x) ((x) << 1) x 61 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL1_PPS_ID(x) ((x) << 24) x 62 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL1_INTRA_PRED_MODE(x) ((x) << 16) x 63 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL1_FRAME_NUM(x) ((x)) x 65 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL2_DEBLOCKING_FILETER_MODE(x) ((x) << 30) x 66 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL2_H264_SLICE_SIZE(x) ((x) << 23) x 69 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL2_CABAC_INIT_IDC(x) ((x) << 19) x 73 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL2_INTRA16X16_MODE(x) ((x)) x 76 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL3_MV_PENALTY_1_4P(x) ((x) << 20) x 77 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL3_MV_PENALTY_4P(x) ((x) << 10) x 78 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL3_MV_PENALTY_1P(x) ((x)) x 80 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL4_MV_PENALTY_16X8_8X16(x) ((x) << 20) x 81 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL4_MV_PENALTY_8X8(x) ((x) << 10) x 82 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL4_8X4_4X8(x) ((x)) x 84 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL5_MACROBLOCK_PENALTY(x) ((x) << 24) x 85 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL5_COMPLETE_SLICES(x) ((x) << 16) x 86 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_ENC_CTRL5_INTER_MODE(x) ((x)) x 91 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_MAD_CTRL_QP_ADJUST(x) ((x) << 28) x 92 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_MAD_CTRL_MAD_THREDHOLD(x) ((x) << 22) x 93 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_MAD_CTRL_QP_SUM_DIV2(x) ((x)) x 96 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_QP_VAL_LUM(x) ((x) << 26) x 97 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_QP_VAL_MAX(x) ((x) << 20) x 98 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_QP_VAL_MIN(x) ((x) << 14) x 99 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_QP_VAL_CHECKPOINT_DISTAN(x) ((x)) x 102 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHECKPOINT_CHECK0(x) (((x) & 0xffff)) x 103 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHECKPOINT_CHECK1(x) (((x) & 0xffff) << 16) x 104 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHECKPOINT_RESULT(x) ((((x) >> (16 - 16 \ x 108 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_WORD_ERR_CHK0(x) (((x) & 0xffff)) x 109 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_WORD_ERR_CHK1(x) (((x) & 0xffff) << 16) x 112 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_DELTA_QP_CHK0(x) (((x) & 0x0f) << 0) x 113 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_DELTA_QP_CHK1(x) (((x) & 0x0f) << 4) x 114 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_DELTA_QP_CHK2(x) (((x) & 0x0f) << 8) x 115 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_DELTA_QP_CHK3(x) (((x) & 0x0f) << 12) x 116 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_DELTA_QP_CHK4(x) (((x) & 0x0f) << 16) x 117 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_DELTA_QP_CHK5(x) (((x) & 0x0f) << 20) x 118 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_CHKPT_DELTA_QP_CHK6(x) (((x) & 0x0f) << 24) x 123 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_RLC_CTRL_RLC_SUM(x) ((x)) x 125 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_MB_CNT_OUT(x) (((x) & 0xffff)) x 126 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_MB_CNT_SET(x) (((x) & 0xffff) << 16) x 142 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_MVC_CTRL_MV16X16_FAVOR(x) ((x) << 28) x 147 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_DMV_4P_1P_PENALTY_BIT(x, i) ((x) << (i) * 8) x 149 drivers/staging/media/hantro/hantro_h1_regs.h #define H1_REG_DMV_QPEL_PENALTY_BIT(x, i) ((x) << (i) * 8) x 25 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c #define VDPU_REG_DEC_CTRL0_DEC_MODE(x) (((x) & 0xf) << 0) x 34 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c #define VDPU_REG_CONFIG_DEC_MAX_BURST(x) (((x) & 0x1f) << 16) x 58 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c #define VDPU_REG_REF_PIC_FILT_SHARPNESS(x) (((x) & 0x7) << 28) x 67 drivers/staging/media/hantro/rk3399_vpu_hw_vp8_dec.c #define VDPU_REG_FWD_PIC1_SEGMENT_BASE(x) ((x) << 0) x 14 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16) x 15 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) x 17 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16) x 18 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) x 20 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16) x 21 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) x 23 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_ZB_DC_CHR(x) (((x) & 0x1ff) << 18) x 24 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_ZB_DC_Y2(x) (((x) & 0x1ff) << 9) x 25 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_ZB_DC_Y1(x) (((x) & 0x1ff) << 0) x 27 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_ZB_AC_CHR(x) (((x) & 0x1ff) << 18) x 28 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_ZB_AC_Y2(x) (((x) & 0x1ff) << 9) x 29 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_ZB_AC_Y1(x) (((x) & 0x1ff) << 0) x 31 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_RND_DC_CHR(x) (((x) & 0xff) << 16) x 32 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_RND_DC_Y2(x) (((x) & 0xff) << 8) x 33 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_RND_DC_Y1(x) (((x) & 0xff) << 0) x 35 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_RND_AC_CHR(x) (((x) & 0xff) << 16) x 36 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_RND_AC_Y2(x) (((x) & 0xff) << 8) x 37 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_QUT_RND_AC_Y1(x) (((x) & 0xff) << 0) x 39 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG_FILTER_LEVEL(x) (((x) & 0x3f) << 25) x 40 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_DEQUT_DC_CHR(x) (((x) & 0xff) << 17) x 41 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_DEQUT_DC_Y2(x) (((x) & 0x1ff) << 8) x 42 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_DEQUT_DC_Y1(x) (((x) & 0xff) << 0) x 44 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_DEQUT_AC_CHR(x) (((x) & 0x1ff) << 18) x 45 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_DEQUT_AC_Y2(x) (((x) & 0x1ff) << 9) x 46 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_DEQUT_AC_Y1(x) (((x) & 0x1ff) << 0) x 49 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_INTRA_4X4_PENALTY_0(x) (((x) & 0xfff) << 0) x 50 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_INTRA_4x4_PENALTY_1(x) (((x) & 0xfff) << 16) x 52 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_INTRA_16X16_PENALTY_0(x) (((x) & 0xfff) << 0) x 53 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_INTRA_16X16_PENALTY_1(x) (((x) & 0xfff) << 16) x 55 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_MODE_DELTA_BPRED(x) (((x) & 0x1f) << 24) x 56 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_REF_DELTA_INTRA_MB(x) (((x) & 0x7f) << 16) x 57 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_INTER_TYPE_BIT_COST(x) (((x) & 0xfff) << 0) x 59 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_COEF_DMV_PENALTY(x) (((x) & 0xfff) << 16) x 60 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_REF_FRAME(x) (((x) & 0xfff) << 0) x 62 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_REF_DELTA_ALT_REF(x) (((x) & 0x7f) << 16) x 63 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_REF_DELTA_LAST_REF(x) (((x) & 0x7f) << 8) x 64 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_REF_DELTA_GOLDEN(x) (((x) & 0x7f) << 0) x 66 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_MODE_DELTA_SPLITMV(x) (((x) & 0x7f) << 16) x 67 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_MODE_DELTA_ZEROMV(x) (((x) & 0x7f) << 8) x 68 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_LF_MODE_DELTA_NEWMV(x) (((x) & 0x7f) << 0) x 74 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_INTRA_AREA_TOP(x) (((x) & 0xff) << 24) x 75 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_INTRA_AREA_BOTTOM(x) (((x) & 0xff) << 16) x 76 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_INTRA_AREA_LEFT(x) (((x) & 0xff) << 8) x 77 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_INTRA_AREA_RIGHT(x) (((x) & 0xff) << 0) x 79 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CIR_INTRA_FIRST_MB(x) (((x) & 0xffff) << 16) x 80 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CIR_INTRA_INTERVAL(x) (((x) & 0xffff) << 0) x 88 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_AXI_CTRL_READ_ID(x) (((x) & 0xff) << 24) x 89 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_AXI_CTRL_WRITE_ID(x) (((x) & 0xff) << 16) x 90 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_AXI_CTRL_BURST_LEN(x) (((x) & 0x3f) << 8) x 91 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_AXI_CTRL_INCREMENT_MODE(x) (((x) & 0x01) << 2) x 92 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_AXI_CTRL_BIRST_DISCARD(x) (((x) & 0x01) << 1) x 95 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI_QP_DELTA_1 (((x) & 0xf) << 12) x 96 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI_QP_DELTA_2 (((x) & 0xf) << 8) x 97 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MAD_QP_ADJUSTMENT (((x) & 0xf) << 0) x 101 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_QP_SUM(x) (((x) & 0x001fffff) * 2) x 104 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_DEBLOCKING_FILTER_MODE(x) (((x) & 0x3) << 24) x 105 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CABAC_INIT_IDC(x) (((x) & 0x3) << 21) x 110 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_H264_SLICE_SIZE(x) (((x) & 0x7f) << 8) x 112 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_STREAM_START_OFFSET(x) (((x) & 0x3f) << 16) x 113 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_SKIP_MACROBLOCK_PENALTY(x) (((x) & 0xff) << 8) x 114 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IN_IMG_CTRL_OVRFLR_D4(x) (((x) & 0x3) << 4) x 115 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IN_IMG_CTRL_OVRFLB(x) (((x) & 0xf) << 0) x 117 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IN_IMG_CHROMA_OFFSET(x) (((x) & 0x7) << 20) x 118 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IN_IMG_LUMA_OFFSET(x) (((x) & 0x7) << 16) x 119 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IN_IMG_CTRL_ROW_LEN(x) (((x) & 0x3fff) << 0) x 121 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RLC_SUM_OUT(x) (((x) & 0x007fffff) * 4) x 123 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SPLIT_PENALTY_4X4 (((x) & 0x1ff) << 19) x 127 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHECKPOINT_CHECK0(x) (((x) & 0xffff)) x 128 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHECKPOINT_CHECK1(x) (((x) & 0xffff) << 16) x 129 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHECKPOINT_RESULT(x) \ x 130 drivers/staging/media/hantro/rk3399_vpu_regs.h ((((x) >> (16 - 16 * ((i) & 1))) & 0xffff) * 32) x 132 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_RND_AC_Y1(x) (((x) & 0xff) << 23) x 133 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_ZBIN_AC_Y1(x) (((x) & 0x1ff) << 14) x 134 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_QUT_AC_Y1(x) (((x) & 0x3fff) << 0) x 136 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_RND_DC_Y2(x) (((x) & 0xff) << 23) x 137 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_ZBIN_DC_Y2(x) (((x) & 0x1ff) << 14) x 138 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_QUT_DC_Y2(x) (((x) & 0x3fff) << 0) x 140 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_RND_AC_Y2(x) (((x) & 0xff) << 23) x 141 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_ZBIN_AC_Y2(x) (((x) & 0x1ff) << 14) x 142 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) x 144 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_RND_DC_CHR(x) (((x) & 0xff) << 23) x 145 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_ZBIN_DC_CHR(x) (((x) & 0x1ff) << 14) x 146 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) x 148 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_RND_AC_CHR(x) (((x) & 0xff) << 23) x 149 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_ZBIN_AC_CHR(x) (((x) & 0x1ff) << 14) x 150 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_QUT_AC_CHR(x) (((x) & 0x3fff) << 0) x 152 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_MV_REF_IDX1(x) (((x) & 0x03) << 26) x 153 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_DQUT_DC_Y2(x) (((x) & 0x1ff) << 17) x 154 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_DQUT_AC_Y1(x) (((x) & 0x1ff) << 8) x 155 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_DQUT_DC_Y1(x) (((x) & 0xff) << 0) x 157 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_WORD_ERR_CHK0(x) (((x) & 0xffff)) x 158 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_WORD_ERR_CHK1(x) (((x) & 0xffff) << 16) x 163 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_MV_REF_IDX2(x) (((x) & 0x03) << 26) x 164 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_DQUT_AC_CHR(x) (((x) & 0x1ff) << 17) x 165 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_DQUT_DC_CHR(x) (((x) & 0xff) << 9) x 166 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_DQUT_AC_Y2(x) (((x) & 0x1ff) << 0) x 169 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_DELTA_QP_CHK0(x) (((x) & 0x0f) << 0) x 170 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_DELTA_QP_CHK1(x) (((x) & 0x0f) << 4) x 171 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_DELTA_QP_CHK2(x) (((x) & 0x0f) << 8) x 172 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_DELTA_QP_CHK3(x) (((x) & 0x0f) << 12) x 173 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_DELTA_QP_CHK4(x) (((x) & 0x0f) << 16) x 174 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_DELTA_QP_CHK5(x) (((x) & 0x0f) << 20) x 175 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHKPT_DELTA_QP_CHK6(x) (((x) & 0x0f) << 24) x 177 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_ZERO_MV_PENALTY_FOR_REF2(x) (((x) & 0xff) << 24) x 178 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_FILTER_SHARPNESS(x) (((x) & 0x07) << 21) x 179 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_FILTER_LEVEL(x) (((x) & 0x3f) << 15) x 180 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_DCT_PARTITION_CNT(x) (((x) & 0x03) << 13) x 181 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_BOOL_ENC_VALUE_BITS(x) (((x) & 0x1f) << 8) x 182 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_BOOL_ENC_RANGE(x) (((x) & 0xff) << 0) x 184 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MAD_THRESHOLD(x) (((x) & 0x3f) << 24) x 185 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_COMPLETED_SLICES(x) (((x) & 0xff) << 16) x 186 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IN_IMG_CTRL_FMT(x) (((x) & 0xf) << 4) x 187 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IN_IMG_ROTATE_MODE(x) (((x) & 0x3) << 2) x 190 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_INTRA16X16_MODE(x) (((x) & 0xffff) << 16) x 191 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_INTER_MODE(x) (((x) & 0xffff) << 0) x 193 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_PPS_INIT_QP(x) (((x) & 0x3f) << 26) x 194 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_SLICE_FILTER_ALPHA(x) (((x) & 0xf) << 22) x 195 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_SLICE_FILTER_BETA(x) (((x) & 0xf) << 18) x 196 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_CHROMA_QP_OFFSET(x) (((x) & 0x1f) << 13) x 198 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_IDR_PIC_ID(x) (((x) & 0xf) << 1) x 206 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI1_TOP_MB(x) (((x) & 0xff) << 24) x 207 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI1_BOTTOM_MB(x) (((x) & 0xff) << 16) x 208 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI1_LEFT_MB(x) (((x) & 0xff) << 8) x 209 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI1_RIGHT_MB(x) (((x) & 0xff) << 0) x 211 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI2_TOP_MB(x) (((x) & 0xff) << 24) x 212 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI2_BOTTOM_MB(x) (((x) & 0xff) << 16) x 213 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI2_LEFT_MB(x) (((x) & 0xff) << 8) x 214 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ROI2_RIGHT_MB(x) (((x) & 0xff) << 0) x 218 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_STABLE_MIN_VALUE(x) (((x) & 0xffffff) << 8) x 219 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_STABLE_MODE_SEL(x) (((x) & 0x3) << 6) x 220 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_STABLE_HOR_GMV(x) (((x) & 0x3f) << 0) x 222 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB2YUV_CONVERSION_COEFB(x) (((x) & 0xffff) << 16) x 223 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB2YUV_CONVERSION_COEFA(x) (((x) & 0xffff) << 0) x 225 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB2YUV_CONVERSION_COEFE(x) (((x) & 0xffff) << 16) x 226 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB2YUV_CONVERSION_COEFC(x) (((x) & 0xffff) << 0) x 228 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB2YUV_CONVERSION_COEFF(x) (((x) & 0xffff) << 0) x 230 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB_MASK_B_MSB(x) (((x) & 0x1f) << 16) x 231 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB_MASK_G_MSB(x) (((x) & 0x1f) << 8) x 232 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_RGB_MASK_R_MSB(x) (((x) & 0x1f) << 0) x 234 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_1MV_PENALTY(x) (((x) & 0x3ff) << 21) x 235 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_QMV_PENALTY(x) (((x) & 0x3ff) << 11) x 236 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_4MV_PENALTY(x) (((x) & 0x3ff) << 1) x 239 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_H264_LUMA_INIT_QP(x) (((x) & 0x3f) << 26) x 240 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_H264_QP_MAX(x) (((x) & 0x3f) << 20) x 241 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_H264_QP_MIN(x) (((x) & 0x3f) << 14) x 242 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_H264_CHKPT_DISTANCE(x) (((x) & 0xfff) << 0) x 244 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_RND_DC_Y1(x) (((x) & 0xff) << 23) x 245 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_ZBIN_DC_Y1(x) (((x) & 0x1ff) << 14) x 246 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_VP8_SEG0_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) x 248 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_ZERO_MV_FAVOR_D2(x) (((x) & 0xf) << 20) x 249 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_PENALTY_4X4MV(x) (((x) & 0x1ff) << 11) x 250 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MVC_VIEW_ID(x) (((x) & 0x7) << 8) x 252 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MVC_PRIORITY_ID(x) (((x) & 0x7) << 4) x 253 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MVC_TEMPORAL_ID(x) (((x) & 0x7) << 1) x 256 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MB_HEIGHT(x) (((x) & 0x1ff) << 20) x 257 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MB_WIDTH(x) (((x) & 0x1ff) << 8) x 265 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MB_CNT_OUT(x) (((x) & 0xffff) << 16) x 266 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MB_CNT_SET(x) (((x) & 0xffff) << 0) x 275 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_TEST_COUNTER(x) (((x) & 0xf) << 20) x 278 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_TEST_LEN(x) (((x) & 0x3ffff) << 0) x 280 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_PPS_ID(x) (((x) & 0xff) << 24) x 281 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_INTRA_PRED_MODE(x) (((x) & 0xff) << 16) x 282 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_FRAME_NUM(x) (((x) & 0xffff) << 0) x 284 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MV_PENALTY_16X8_8X16(x) (((x) & 0x3ff) << 20) x 285 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MV_PENALTY_8X8(x) (((x) & 0x3ff) << 10) x 286 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_MV_PENALTY_8X4_4X8(x) (((x) & 0x3ff) << 0) x 305 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_DMV_PENALTY_TABLE_BIT(x, i) ((x) << (i) * 8) x 307 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VEPU_REG_DMV_Q_PIXEL_PENALTY_TABLE_BIT(x, i) ((x) << (i) * 8) x 311 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_BUF_CTRL2_REFBU2_PICID(x) (((x) & 0x1f) << 25) x 312 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_BUF_CTRL2_REFBU2_THR(x) (((x) & 0xfff) << 13) x 319 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_CONFIG_DEC_LATENCY(x) (((x) & 0x3f) << 1) x 320 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_CONFIG_TILED_MODE_MSB(x) BIT(0) x 323 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL3_INIT_QP(x) (((x) & 0x3f) << 25) x 325 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL3_STREAM_LEN(x) (((x) & 0xffffff) << 0) x 327 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_BUF_CTRL2_APF_THRESHOLD(x) (((x) & 0x3fff) << 17) x 328 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_ERR_CONC_STARTMB_X(x) (((x) & 0x1ff) << 8) x 329 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_ERR_CONC_STARTMB_Y(x) (((x) & 0xff) << 0) x 331 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL0_DEC_MODE(x) (((x) & 0xf) << 0) x 353 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PARAL_BUS_E(x) BIT(21) x 354 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_CONFIG_DEC_MAX_BURST(x) (((x) & 0x1f) << 16) x 355 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL0_DEC_AXI_WR_ID(x) (((x) & 0xff) << 8) x 356 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_CONFIG_DEC_AXI_RD_ID(x) (((x) & 0xff) << 0) x 388 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_0(x) (((x) & 0x3ff) << 22) x 389 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_1(x) (((x) & 0x3ff) << 12) x 390 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_2(x) (((x) & 0x3ff) << 2) x 398 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FWD_PIC_PINIT_RLIST_F5(x) (((x) & 0x1f) << 25) x 399 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FWD_PIC_PINIT_RLIST_F4(x) (((x) & 0x1f) << 20) x 400 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FWD_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 15) x 401 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FWD_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 10) x 402 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FWD_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 5) x 403 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FWD_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 0) x 405 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_REFER1_NBR(x) (((x) & 0xffff) << 16) x 406 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_REFER0_NBR(x) (((x) & 0xffff) << 0) x 411 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F5(x) (((x) & 0x1f) << 25) x 412 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F4(x) (((x) & 0x1f) << 20) x 413 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F3(x) (((x) & 0x1f) << 15) x 414 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F2(x) (((x) & 0x1f) << 10) x 415 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F1(x) (((x) & 0x1f) << 5) x 416 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F0(x) (((x) & 0x1f) << 0) x 418 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F11(x) (((x) & 0x1f) << 25) x 419 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F10(x) (((x) & 0x1f) << 20) x 420 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F9(x) (((x) & 0x1f) << 15) x 421 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F8(x) (((x) & 0x1f) << 10) x 422 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F7(x) (((x) & 0x1f) << 5) x 423 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F6(x) (((x) & 0x1f) << 0) x 425 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F15(x) (((x) & 0x1f) << 15) x 426 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F14(x) (((x) & 0x1f) << 10) x 427 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F13(x) (((x) & 0x1f) << 5) x 428 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F12(x) (((x) & 0x1f) << 0) x 430 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B5(x) (((x) & 0x1f) << 25) x 431 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B4(x) (((x) & 0x1f) << 20) x 432 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B3(x) (((x) & 0x1f) << 15) x 433 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B2(x) (((x) & 0x1f) << 10) x 434 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B1(x) (((x) & 0x1f) << 5) x 435 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B0(x) (((x) & 0x1f) << 0) x 437 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B11(x) (((x) & 0x1f) << 25) x 438 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B10(x) (((x) & 0x1f) << 20) x 439 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B9(x) (((x) & 0x1f) << 15) x 440 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B8(x) (((x) & 0x1f) << 10) x 441 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B7(x) (((x) & 0x1f) << 5) x 442 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B6(x) (((x) & 0x1f) << 0) x 444 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B15(x) (((x) & 0x1f) << 15) x 445 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B14(x) (((x) & 0x1f) << 10) x 446 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B13(x) (((x) & 0x1f) << 5) x 447 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B12(x) (((x) & 0x1f) << 0) x 449 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 15) x 450 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 10) x 451 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 5) x 452 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 0) x 456 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL2_CH_QP_OFFSET2(x) (((x) & 0x1f) << 22) x 457 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL2_CH_QP_OFFSET(x) (((x) & 0x1f) << 17) x 458 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL1_PIC_MB_HEIGHT_P(x) (((x) & 0xff) << 9) x 459 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL1_PIC_MB_WIDTH(x) (((x) & 0x1ff) << 0) x 461 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(x) (((x) & 0x3) << 16) x 462 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL1_REF_FRAMES(x) (((x) & 0x1f) << 0) x 466 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL4_FRAMENUM_LEN(x) (((x) & 0x1f) << 16) x 467 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL4_FRAMENUM(x) (((x) & 0xffff) << 0) x 469 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL5_REFPIC_MK_LEN(x) (((x) & 0x7ff) << 16) x 470 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL5_IDR_PIC_ID(x) (((x) & 0xffff) << 0) x 472 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL6_PPS_ID(x) (((x) & 0xff) << 24) x 473 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL6_REFIDX1_ACTIVE(x) (((x) & 0x1f) << 19) x 474 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL6_REFIDX0_ACTIVE(x) (((x) & 0x1f) << 14) x 475 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL6_POC_LENGTH(x) (((x) & 0xff) << 0) x 487 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_PIC_MB_WIDTH(x) (((x) & 0x1ff) << 23) x 488 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_MB_WIDTH_OFF(x) (((x) & 0xf) << 19) x 489 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_PIC_MB_HEIGHT_P(x) (((x) & 0xff) << 11) x 490 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_MB_HEIGHT_OFF(x) (((x) & 0xf) << 7) x 491 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL1_PIC_MB_W_EXT(x) (((x) & 0x7) << 3) x 492 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL1_PIC_MB_H_EXT(x) (((x) & 0x7) << 0) x 494 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL4_DCT1_START_BIT(x) (((x) & 0x3f) << 26) x 495 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL4_DCT2_START_BIT(x) (((x) & 0x3f) << 20) x 499 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL2_STRM_START_BIT(x) (((x) & 0x3f) << 26) x 500 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL2_STRM1_START_BIT(x) (((x) & 0x3f) << 18) x 501 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL2_BOOLEAN_VALUE(x) (((x) & 0xff) << 8) x 502 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL2_BOOLEAN_RANGE(x) (((x) & 0xff) << 0) x 504 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL6_COEFFS_PART_AM(x) (((x) & 0xf) << 24) x 505 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL6_STREAM1_LEN(x) (((x) & 0xffffff) << 0) x 507 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_1(x) (((x) & 0x3ff) << 22) x 508 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_2(x) (((x) & 0x3ff) << 12) x 509 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_3(x) (((x) & 0x3ff) << 2) x 511 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_0(x) (((x) & 0x3ff) << 22) x 512 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_1(x) (((x) & 0x3ff) << 12) x 513 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_2(x) (((x) & 0x3ff) << 2) x 515 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_3(x) (((x) & 0x3ff) << 22) x 516 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_0(x) (((x) & 0x3ff) << 12) x 517 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_1(x) (((x) & 0x3ff) << 2) x 519 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_2(x) (((x) & 0x3ff) << 22) x 520 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_3(x) (((x) & 0x3ff) << 12) x 521 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_PRED_TAP_2_M1(x) (((x) & 0x3) << 10) x 522 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_PRED_TAP_2_4(x) (((x) & 0x3) << 8) x 523 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_PRED_TAP_4_M1(x) (((x) & 0x3) << 6) x 524 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_PRED_TAP_4_4(x) (((x) & 0x3) << 4) x 525 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_PRED_TAP_6_M1(x) (((x) & 0x3) << 2) x 526 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_BD_REF_PIC_PRED_TAP_6_4(x) (((x) & 0x3) << 0) x 528 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_LF_LEVEL_0(x) (((x) & 0x3f) << 18) x 529 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_LF_LEVEL_1(x) (((x) & 0x3f) << 12) x 530 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_LF_LEVEL_2(x) (((x) & 0x3f) << 6) x 531 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_LF_LEVEL_3(x) (((x) & 0x3f) << 0) x 533 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_DELTA_0(x) (((x) & 0x1f) << 27) x 534 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_DELTA_1(x) (((x) & 0x1f) << 22) x 535 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_0(x) (((x) & 0x7ff) << 11) x 536 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_1(x) (((x) & 0x7ff) << 0) x 540 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_FILT_SHARPNESS(x) (((x) & 0x7) << 28) x 541 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FILT_MB_ADJ_0(x) (((x) & 0x7f) << 21) x 542 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FILT_MB_ADJ_1(x) (((x) & 0x7f) << 14) x 543 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FILT_MB_ADJ_2(x) (((x) & 0x7f) << 7) x 544 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FILT_MB_ADJ_3(x) (((x) & 0x7f) << 0) x 546 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_ADJ_0(x) (((x) & 0x7f) << 21) x 547 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_ADJ_1(x) (((x) & 0x7f) << 14) x 548 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_ADJ_2(x) (((x) & 0x7f) << 7) x 549 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_ADJ_3(x) (((x) & 0x7f) << 0) x 557 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_FWD_PIC1_SEGMENT_BASE(x) ((x) << 0) x 561 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL7_DCT3_START_BIT(x) (((x) & 0x3f) << 24) x 562 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL7_DCT4_START_BIT(x) (((x) & 0x3f) << 18) x 563 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL7_DCT5_START_BIT(x) (((x) & 0x3f) << 12) x 564 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL7_DCT6_START_BIT(x) (((x) & 0x3f) << 6) x 565 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_DEC_CTRL7_DCT7_START_BIT(x) (((x) & 0x3f) << 0) x 567 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_DELTA_2(x) (((x) & 0x1f) << 27) x 568 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_DELTA_3(x) (((x) & 0x1f) << 22) x 569 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_2(x) (((x) & 0x7ff) << 11) x 570 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_3(x) (((x) & 0x7ff) << 0) x 572 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_DELTA_4(x) (((x) & 0x1f) << 27) x 573 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_4(x) (((x) & 0x7ff) << 11) x 574 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_REF_PIC_QUANT_5(x) (((x) & 0x7ff) << 0) x 576 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_3(x) (((x) & 0x3ff) << 22) x 577 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_0(x) (((x) & 0x3ff) << 12) x 578 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_1(x) (((x) & 0x3ff) << 2) x 580 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_2(x) (((x) & 0x3ff) << 22) x 581 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_3(x) (((x) & 0x3ff) << 12) x 582 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_0(x) (((x) & 0x3ff) << 2) x 584 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_1(x) (((x) & 0x3ff) << 22) x 585 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_2(x) (((x) & 0x3ff) << 12) x 586 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_3(x) (((x) & 0x3ff) << 2) x 588 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_0(x) (((x) & 0x3ff) << 22) x 589 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_1(x) (((x) & 0x3ff) << 12) x 590 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_2(x) (((x) & 0x3ff) << 2) x 592 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_3(x) (((x) & 0x3ff) << 22) x 593 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_0(x) (((x) & 0x3ff) << 12) x 594 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_1(x) (((x) & 0x3ff) << 2) x 596 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_2(x) (((x) & 0x3ff) << 22) x 597 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_3(x) (((x) & 0x3ff) << 12) x 598 drivers/staging/media/hantro/rk3399_vpu_regs.h #define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_0(x) (((x) & 0x3ff) << 2) x 59 drivers/staging/media/imx/imx7-mipi-csis.c #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH3(x) ((x) << 28) x 60 drivers/staging/media/imx/imx7-mipi-csis.c #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH2(x) ((x) << 24) x 61 drivers/staging/media/imx/imx7-mipi-csis.c #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH1(x) ((x) << 20) x 62 drivers/staging/media/imx/imx7-mipi-csis.c #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH0(x) ((x) << 16) x 139 drivers/staging/media/imx/imx7-mipi-csis.c #define MIPI_CSIS_ISPCFG_MEM_FULL_GAP(x) ((x) << 24) x 148 drivers/staging/media/imx/imx7-mipi-csis.c #define MIPI_CSIS_ISPCFG_FMT_USER(x) ((0x30 + (x) - 1) << 2) x 1608 drivers/staging/media/ipu3/include/intel-ipu3.h __s32 x:13; x 2567 drivers/staging/media/ipu3/include/intel-ipu3.h __u16 x[IPU3_UAPI_ISP_VEC_ELEMS]; x 1332 drivers/staging/media/ipu3/ipu3-abi.h u16 x; x 2788 drivers/staging/media/ipu3/ipu3-css-params.c xnr_vmem->x[i] = imgu_css_xnr3_vmem_defaults.x x 2875 drivers/staging/media/ipu3/ipu3-css-params.c unsigned int y0, x0, x1, x, y; x 2926 drivers/staging/media/ipu3/ipu3-css-params.c x = (x0 * 2 + x1) * IMGU_DVS_BLOCK_W + OFFSET_X; x 2927 drivers/staging/media/ipu3/ipu3-css-params.c x &= XMEM_ALIGN_MASK; x 2931 drivers/staging/media/ipu3/ipu3-css-params.c (y * frame_in_x + x) * BYP; x 2936 drivers/staging/media/ipu3/ipu3-css-params.c x = x0 * IMGU_DVS_BLOCK_W + OFFSET_X / 2; x 2937 drivers/staging/media/ipu3/ipu3-css-params.c x &= XMEM_ALIGN_MASK; x 2940 drivers/staging/media/ipu3/ipu3-css-params.c gdc->in_addr_offset = (y * frame_in_x + x) * BYP; x 9296 drivers/staging/media/ipu3/ipu3-tables.c .x = { x 34 drivers/staging/media/ipu3/ipu3-tables.h s16 x[IMGU_XNR3_VMEM_LUT_LEN]; x 241 drivers/staging/media/soc_camera/soc_camera.c #define pixfmtstr(x) (x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, \ x 242 drivers/staging/media/soc_camera/soc_camera.c ((x) >> 24) & 0xff x 76 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) (24 - 4 * (y) - 8 * (x)) x 289 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_H264_VLD_ADDR_VAL(x) (((x) & 0x0ffffff0) | ((x) >> 28)) x 48 drivers/staging/most/dim2/hal.c #define ROUND_UP_TO(x, d) (DIV_ROUND_UP(x, (d)) * (d)) x 46 drivers/staging/mt7621-dma/mtk-hsdma.c #define HSDMA_NEXT_DESC(x) (((x) + 1) & HSDMA_DESCS_MASK) x 93 drivers/staging/mt7621-dma/mtk-hsdma.c #define HSDMA_DELAY_INIT(x) (HSDMA_DELAY_INT_EN | \ x 94 drivers/staging/mt7621-dma/mtk-hsdma.c ((x) << HSDMA_DELAY_PEND_OFFSET)) x 95 drivers/staging/mt7621-dma/mtk-hsdma.c #define HSDMA_DELAY(x) ((HSDMA_DELAY_INIT(x) << \ x 96 drivers/staging/mt7621-dma/mtk-hsdma.c HSDMA_DELAY_TX_OFFSET) | HSDMA_DELAY_INIT(x)) x 26 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_LCDDS_PCW_VAL(x) ((0x7fffffff & (x)) << 0) x 31 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_XTAL_TYPE_VAL(x) ((0x3 & (x)) << 9) x 39 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_PLL_BC_VAL(x) ((0x3 & (x)) << 22) x 41 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_PLL_BP_VAL(x) ((0xf & (x)) << 18) x 43 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_PLL_IR_VAL(x) ((0xf & (x)) << 12) x 45 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_PLL_IC_VAL(x) ((0xf & (x)) << 8) x 47 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_PLL_PREDIV_VAL(x) ((0x3 & (x)) << 6) x 49 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_PLL_DIVEN_VAL(x) ((0x7 & (x)) << 1) x 53 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_PLL_FBKSEL_VAL(x) ((0x3 & (x)) << 4) x 57 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_LCDDS_SSC_PRD_VAL(x) ((0xffff & (x)) << 0) x 61 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_LCDDS_SSC_DELTA_VAL(x) ((0xfff & (x)) << 0) x 63 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_LCDDS_SSC_DELTA1_VAL(x) ((0xff & (x)) << 16) x 70 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_H_PLL_BR_VAL(x) ((0x7 & (x)) << 16) x 74 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c #define RG_PE1_MSTCKDIV_VAL(x) ((0x3 & (x)) << 6) x 44 drivers/staging/mt7621-pci/pci-mt7621.c #define PCIE_FTS_NUM_L0(x) (((x) & 0xff) << 8) x 84 drivers/staging/mt7621-pci/pci-mt7621.c #define PCIE_PORT_INT_EN(x) BIT(20 + (x)) x 85 drivers/staging/mt7621-pci/pci-mt7621.c #define PCIE_PORT_CLK_EN(x) BIT(24 + (x)) x 10 drivers/staging/octeon/octeon-stubs.h #define OCTEON_IS_MODEL(x) 0 x 11 drivers/staging/octeon/octeon-stubs.h #define octeon_has_feature(x) 0 x 120 drivers/staging/olpc_dcon/olpc_dcon.c int x; x 125 drivers/staging/olpc_dcon/olpc_dcon.c x = olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0); x 126 drivers/staging/olpc_dcon/olpc_dcon.c if (x) { x 127 drivers/staging/olpc_dcon/olpc_dcon.c pr_warn("unable to force dcon to power up: %d!\n", x); x 128 drivers/staging/olpc_dcon/olpc_dcon.c return x; x 135 drivers/staging/olpc_dcon/olpc_dcon.c for (x = -1, timeout = 50; timeout && x < 0; timeout--) { x 137 drivers/staging/olpc_dcon/olpc_dcon.c x = dcon_read(dcon, DCON_REG_ID); x 139 drivers/staging/olpc_dcon/olpc_dcon.c if (x < 0) { x 195 drivers/staging/olpc_dcon/olpc_dcon.c int x; x 208 drivers/staging/olpc_dcon/olpc_dcon.c x = olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0); x 209 drivers/staging/olpc_dcon/olpc_dcon.c if (x) x 210 drivers/staging/olpc_dcon/olpc_dcon.c pr_warn("unable to force dcon to power down: %d!\n", x); x 217 drivers/staging/olpc_dcon/olpc_dcon.c x = dcon_bus_stabilize(dcon, 1); x 218 drivers/staging/olpc_dcon/olpc_dcon.c if (x) x 219 drivers/staging/olpc_dcon/olpc_dcon.c pr_warn("unable to reinit dcon hardware: %d!\n", x); x 143 drivers/staging/olpc_dcon/olpc_dcon_xo_1.c int x; x 167 drivers/staging/olpc_dcon/olpc_dcon_xo_1.c for (x = 0; x < 16; x++) { x 157 drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c int x; x 168 drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c for (x = 0; x < 16; x++) { x 44 drivers/staging/qlge/qlge.h #define MAX_DB_PAGES_PER_BQ(x) \ x 45 drivers/staging/qlge/qlge.h (((x * sizeof(u64)) / DB_PAGE_SIZE) + \ x 46 drivers/staging/qlge/qlge.h (((x * sizeof(u64)) % DB_PAGE_SIZE) ? 1 : 0)) x 75 drivers/staging/qlge/qlge.h #define LSW(x) ((u16)(x)) x 76 drivers/staging/qlge/qlge.h #define MSW(x) ((u16)((u32)(x) >> 16)) x 77 drivers/staging/qlge/qlge.h #define LSD(x) ((u32)((u64)(x))) x 78 drivers/staging/qlge/qlge.h #define MSD(x) ((u32)((((u64)(x)) >> 32))) x 23 drivers/staging/ralink-gdma/ralink-gdma.c #define GDMA_REG_SRC_ADDR(x) (0x00 + (x) * 0x10) x 24 drivers/staging/ralink-gdma/ralink-gdma.c #define GDMA_REG_DST_ADDR(x) (0x04 + (x) * 0x10) x 26 drivers/staging/ralink-gdma/ralink-gdma.c #define GDMA_REG_CTRL0(x) (0x08 + (x) * 0x10) x 39 drivers/staging/ralink-gdma/ralink-gdma.c #define GDMA_REG_CTRL1(x) (0x0c + (x) * 0x10) x 79 drivers/staging/ralink-gdma/ralink-gdma.c #define GDMA_REG_PERF_START(x) (0x230 + (x) * 0x8) x 80 drivers/staging/ralink-gdma/ralink-gdma.c #define GDMA_REG_PERF_END(x) (0x234 + (x) * 0x8) x 20 drivers/staging/rtl8188eu/core/rtw_security.c u32 x; x 34 drivers/staging/rtl8188eu/core/rtw_security.c parc4ctx->x = 0; x 53 drivers/staging/rtl8188eu/core/rtw_security.c u32 x; x 59 drivers/staging/rtl8188eu/core/rtw_security.c x = (parc4ctx->x + 1) & 0xff; x 60 drivers/staging/rtl8188eu/core/rtw_security.c sx = state[x]; x 63 drivers/staging/rtl8188eu/core/rtw_security.c parc4ctx->x = x; x 66 drivers/staging/rtl8188eu/core/rtw_security.c state[x] = (u8)sy; x 699 drivers/staging/rtl8188eu/hal/phy.c u32 oldval_0, x, tx0_a, reg; x 707 drivers/staging/rtl8188eu/hal/phy.c x = result[final_candidate][0]; x 708 drivers/staging/rtl8188eu/hal/phy.c if ((x & 0x00000200) != 0) x 709 drivers/staging/rtl8188eu/hal/phy.c x = x | 0xFFFFFC00; x 711 drivers/staging/rtl8188eu/hal/phy.c tx0_a = (x * oldval_0) >> 8; x 714 drivers/staging/rtl8188eu/hal/phy.c ((x * oldval_0>>7) & 0x1)); x 745 drivers/staging/rtl8188eu/hal/phy.c u32 oldval_1, x, tx1_a, reg; x 753 drivers/staging/rtl8188eu/hal/phy.c x = result[final_candidate][4]; x 754 drivers/staging/rtl8188eu/hal/phy.c if ((x & 0x00000200) != 0) x 755 drivers/staging/rtl8188eu/hal/phy.c x = x | 0xFFFFFC00; x 756 drivers/staging/rtl8188eu/hal/phy.c tx1_a = (x * oldval_1) >> 8; x 760 drivers/staging/rtl8188eu/hal/phy.c ((x * oldval_1>>7) & 0x1)); x 794 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 806 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define EFUSE_SEL(x) (((x) & 0x3) << 8) x 897 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 909 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _PSRX(x) (x) x 910 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _PSTX(x) ((x) << 4) x 937 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _TXDMA_HIQ_MAP(x) (((x) & 0x3) << 14) x 938 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _TXDMA_MGQ_MAP(x) (((x) & 0x3) << 12) x 939 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _TXDMA_BKQ_MAP(x) (((x) & 0x3) << 10) x 940 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _TXDMA_BEQ_MAP(x) (((x) & 0x3) << 8) x 941 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _TXDMA_VIQ_MAP(x) (((x) & 0x3) << 6) x 942 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _TXDMA_VOQ_MAP(x) (((x) & 0x3) << 4) x 955 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 956 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 957 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 958 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 962 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _HPQ(x) ((x) & 0xFF) x 963 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _LPQ(x) (((x) & 0xFF) << 8) x 964 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 966 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _NPQ(x) ((x) & 0xFF) x 974 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define BCN_HEAD(x) (((x) & 0xFF) << 8) x 998 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 999 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 1013 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _LRL(x) ((x) & 0x3F) x 1014 drivers/staging/rtl8188eu/include/rtl8188e_spec.h #define _SRL(x) (((x) & 0x3F) << 8) x 67 drivers/staging/rtl8188eu/include/rtw_pwrctrl.h #define PS_STATE(x) (PS_STATE_MASK & (x)) x 68 drivers/staging/rtl8188eu/include/rtw_pwrctrl.h #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) x 69 drivers/staging/rtl8188eu/include/rtw_pwrctrl.h #define PS_SEQ(x) (PS_SEQ_MASK & (x)) x 77 drivers/staging/rtl8188eu/include/rtw_pwrctrl.h #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) x 78 drivers/staging/rtl8188eu/include/rtw_pwrctrl.h #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) x 79 drivers/staging/rtl8188eu/include/rtw_pwrctrl.h #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) x 280 drivers/staging/rtl8188eu/include/rtw_security.h #define RORc(x, y) \ x 281 drivers/staging/rtl8188eu/include/rtw_security.h (((((unsigned long)(x) & 0xFFFFFFFFUL) >> (unsigned long)((y)&31)) | \ x 282 drivers/staging/rtl8188eu/include/rtw_security.h ((unsigned long)(x) << (unsigned long)(32-((y)&31)))) & 0xFFFFFFFFUL) x 283 drivers/staging/rtl8188eu/include/rtw_security.h #define Ch(x, y, z) (z ^ (x & (y ^ z))) x 284 drivers/staging/rtl8188eu/include/rtw_security.h #define Maj(x, y, z) (((x | y) & z) | (x & y)) x 285 drivers/staging/rtl8188eu/include/rtw_security.h #define S(x, n) RORc((x), (n)) x 286 drivers/staging/rtl8188eu/include/rtw_security.h #define R(x, n) (((x)&0xFFFFFFFFUL)>>(n)) x 287 drivers/staging/rtl8188eu/include/rtw_security.h #define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22)) x 288 drivers/staging/rtl8188eu/include/rtw_security.h #define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25)) x 289 drivers/staging/rtl8188eu/include/rtw_security.h #define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3)) x 290 drivers/staging/rtl8188eu/include/rtw_security.h #define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10)) x 330 drivers/staging/rtl8188eu/include/sta_info.h u32 x; x 332 drivers/staging/rtl8188eu/include/sta_info.h x = mac[0]; x 333 drivers/staging/rtl8188eu/include/sta_info.h x = (x << 2) ^ mac[1]; x 334 drivers/staging/rtl8188eu/include/sta_info.h x = (x << 2) ^ mac[2]; x 335 drivers/staging/rtl8188eu/include/sta_info.h x = (x << 2) ^ mac[3]; x 336 drivers/staging/rtl8188eu/include/sta_info.h x = (x << 2) ^ mac[4]; x 337 drivers/staging/rtl8188eu/include/sta_info.h x = (x << 2) ^ mac[5]; x 339 drivers/staging/rtl8188eu/include/sta_info.h x ^= x >> 8; x 340 drivers/staging/rtl8188eu/include/sta_info.h x = x & (NUM_STA - 1); x 341 drivers/staging/rtl8188eu/include/sta_info.h return x; x 96 drivers/staging/rtl8192e/rtl8192e/rtl_core.c u8 rtl92e_readb(struct net_device *dev, int x) x 98 drivers/staging/rtl8192e/rtl8192e/rtl_core.c return 0xff & readb((u8 __iomem *)dev->mem_start + x); x 101 drivers/staging/rtl8192e/rtl8192e/rtl_core.c u32 rtl92e_readl(struct net_device *dev, int x) x 103 drivers/staging/rtl8192e/rtl8192e/rtl_core.c return readl((u8 __iomem *)dev->mem_start + x); x 106 drivers/staging/rtl8192e/rtl8192e/rtl_core.c u16 rtl92e_readw(struct net_device *dev, int x) x 108 drivers/staging/rtl8192e/rtl8192e/rtl_core.c return readw((u8 __iomem *)dev->mem_start + x); x 111 drivers/staging/rtl8192e/rtl8192e/rtl_core.c void rtl92e_writeb(struct net_device *dev, int x, u8 y) x 113 drivers/staging/rtl8192e/rtl8192e/rtl_core.c writeb(y, (u8 __iomem *)dev->mem_start + x); x 118 drivers/staging/rtl8192e/rtl8192e/rtl_core.c void rtl92e_writel(struct net_device *dev, int x, u32 y) x 120 drivers/staging/rtl8192e/rtl8192e/rtl_core.c writel(y, (u8 __iomem *)dev->mem_start + x); x 125 drivers/staging/rtl8192e/rtl8192e/rtl_core.c void rtl92e_writew(struct net_device *dev, int x, u16 y) x 127 drivers/staging/rtl8192e/rtl8192e/rtl_core.c writew(y, (u8 __iomem *)dev->mem_start + x); x 563 drivers/staging/rtl8192e/rtl8192e/rtl_core.h u8 rtl92e_readb(struct net_device *dev, int x); x 564 drivers/staging/rtl8192e/rtl8192e/rtl_core.h u32 rtl92e_readl(struct net_device *dev, int x); x 565 drivers/staging/rtl8192e/rtl8192e/rtl_core.h u16 rtl92e_readw(struct net_device *dev, int x); x 566 drivers/staging/rtl8192e/rtl8192e/rtl_core.h void rtl92e_writeb(struct net_device *dev, int x, u8 y); x 567 drivers/staging/rtl8192e/rtl8192e/rtl_core.h void rtl92e_writew(struct net_device *dev, int x, u16 y); x 568 drivers/staging/rtl8192e/rtl8192e/rtl_core.h void rtl92e_writel(struct net_device *dev, int x, u32 y); x 1077 drivers/staging/rtl8192e/rtl8192e/rtl_wx.c #define IW_IOCTL(x) ((x) - SIOCSIWCOMMIT) x 67 drivers/staging/rtl8192e/rtllib.h #define queue_delayed_work_rsl(x, y, z) queue_delayed_work(x, y, z) x 68 drivers/staging/rtl8192e/rtllib.h #define INIT_DELAYED_WORK_RSL(x, y, z) INIT_DELAYED_WORK(x, y) x 70 drivers/staging/rtl8192e/rtllib.h #define queue_work_rsl(x, y) queue_work(x, y) x 71 drivers/staging/rtl8192e/rtllib.h #define INIT_WORK_RSL(x, y, z) INIT_WORK(x, y) x 73 drivers/staging/rtl8192e/rtllib.h #define container_of_work_rsl(x, y, z) container_of(x, y, z) x 74 drivers/staging/rtl8192e/rtllib.h #define container_of_dwork_rsl(x, y, z) \ x 75 drivers/staging/rtl8192e/rtllib.h container_of(to_delayed_work(x), y, z) x 47 drivers/staging/rtl8192e/rtllib_debug.h #define RT_TRACE(component, x, args...) \ x 50 drivers/staging/rtl8192e/rtllib_debug.h printk(KERN_DEBUG DRV_NAME ":" x "\n", ##args);\ x 1496 drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c #define MFIE_STRING(x) case MFIE_TYPE_ ##x: return #x x 49 drivers/staging/rtl8192u/r8192U.h #define DMESG(x, a...) x 50 drivers/staging/rtl8192u/r8192U.h #define DMESGW(x, a...) x 51 drivers/staging/rtl8192u/r8192U.h #define DMESGE(x, a...) x 53 drivers/staging/rtl8192u/r8192U.h #define RT_TRACE(component, x, args...) \ x 56 drivers/staging/rtl8192u/r8192U.h pr_debug("RTL8192U: " x "\n", ##args); \ x 1095 drivers/staging/rtl8192u/r8192U.h int read_nic_byte(struct net_device *dev, int x, u8 *data); x 1096 drivers/staging/rtl8192u/r8192U.h int read_nic_byte_E(struct net_device *dev, int x, u8 *data); x 1097 drivers/staging/rtl8192u/r8192U.h int read_nic_dword(struct net_device *dev, int x, u32 *data); x 1098 drivers/staging/rtl8192u/r8192U.h int read_nic_word(struct net_device *dev, int x, u16 *data); x 1099 drivers/staging/rtl8192u/r8192U.h int write_nic_byte(struct net_device *dev, int x, u8 y); x 1100 drivers/staging/rtl8192u/r8192U.h int write_nic_byte_E(struct net_device *dev, int x, u8 y); x 1101 drivers/staging/rtl8192u/r8192U.h int write_nic_word(struct net_device *dev, int x, u16 y); x 1102 drivers/staging/rtl8192u/r8192U.h int write_nic_dword(struct net_device *dev, int x, u32 y); x 20 drivers/staging/rtl8712/osdep_intf.h #define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0 : 1)) << 2) x 134 drivers/staging/rtl8712/rtl871x_debug.h #define MSG_8712(x, ...) {} x 136 drivers/staging/rtl8712/rtl871x_debug.h #define DBG_8712(x, ...) {} x 138 drivers/staging/rtl8712/rtl871x_debug.h #define WRN_8712(x, ...) {} x 140 drivers/staging/rtl8712/rtl871x_debug.h #define ERR_8712(x, ...) {} x 22 drivers/staging/rtl8712/rtl871x_eeprom.c static void up_clk(struct _adapter *padapter, u16 *x) x 24 drivers/staging/rtl8712/rtl871x_eeprom.c *x = *x | _EESK; x 25 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, (u8)*x); x 29 drivers/staging/rtl8712/rtl871x_eeprom.c static void down_clk(struct _adapter *padapter, u16 *x) x 31 drivers/staging/rtl8712/rtl871x_eeprom.c *x = *x & ~_EESK; x 32 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, (u8)*x); x 38 drivers/staging/rtl8712/rtl871x_eeprom.c u16 x, mask; x 43 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 44 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~(_EEDO | _EEDI); x 46 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~_EEDI; x 48 drivers/staging/rtl8712/rtl871x_eeprom.c x |= _EEDI; x 51 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, (u8)x); x 53 drivers/staging/rtl8712/rtl871x_eeprom.c up_clk(padapter, &x); x 54 drivers/staging/rtl8712/rtl871x_eeprom.c down_clk(padapter, &x); x 59 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~_EEDI; x 60 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, (u8)x); x 66 drivers/staging/rtl8712/rtl871x_eeprom.c u16 x, d = 0, i; x 70 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 71 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~(_EEDO | _EEDI); x 75 drivers/staging/rtl8712/rtl871x_eeprom.c up_clk(padapter, &x); x 78 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 79 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~(_EEDI); x 80 drivers/staging/rtl8712/rtl871x_eeprom.c if (x & _EEDO) x 82 drivers/staging/rtl8712/rtl871x_eeprom.c down_clk(padapter, &x); x 90 drivers/staging/rtl8712/rtl871x_eeprom.c u8 x; x 92 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 93 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~(_EECS | _EESK); x 94 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, x); x 96 drivers/staging/rtl8712/rtl871x_eeprom.c x |= _EECS; x 97 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, x); x 103 drivers/staging/rtl8712/rtl871x_eeprom.c u8 x; x 108 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 109 drivers/staging/rtl8712/rtl871x_eeprom.c if (x & _EEDO) x 118 drivers/staging/rtl8712/rtl871x_eeprom.c u16 x; x 122 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 125 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~(_EECS | _EEDI); x 126 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, (u8)x); x 129 drivers/staging/rtl8712/rtl871x_eeprom.c up_clk(padapter, &x); x 132 drivers/staging/rtl8712/rtl871x_eeprom.c down_clk(padapter, &x); x 137 drivers/staging/rtl8712/rtl871x_eeprom.c u8 x; x 148 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 149 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~(_EEDI | _EEDO | _EESK | _EEM0); x 150 drivers/staging/rtl8712/rtl871x_eeprom.c x |= _EEM1 | _EECS; x 151 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, x); x 185 drivers/staging/rtl8712/rtl871x_eeprom.c u16 x; x 200 drivers/staging/rtl8712/rtl871x_eeprom.c x = r8712_read8(padapter, EE_9346CR); x 203 drivers/staging/rtl8712/rtl871x_eeprom.c x &= ~(_EEDI | _EEDO | _EESK | _EEM0); x 204 drivers/staging/rtl8712/rtl871x_eeprom.c x |= _EEM1 | _EECS; x 205 drivers/staging/rtl8712/rtl871x_eeprom.c r8712_write8(padapter, EE_9346CR, (unsigned char)x); x 62 drivers/staging/rtl8712/rtl871x_io.h #define IO_WR_BURST(x) (IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | \ x 63 drivers/staging/rtl8712/rtl871x_io.h ((x) & _IOSZ_MASK_)) x 64 drivers/staging/rtl8712/rtl871x_io.h #define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) x 56 drivers/staging/rtl8712/rtl871x_pwrctrl.h #define PS_STATE(x) (PS_STATE_MASK & (x)) x 57 drivers/staging/rtl8712/rtl871x_pwrctrl.h #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) x 58 drivers/staging/rtl8712/rtl871x_pwrctrl.h #define PS_SEQ(x) (PS_SEQ_MASK & (x)) x 67 drivers/staging/rtl8712/rtl871x_pwrctrl.h #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) x 68 drivers/staging/rtl8712/rtl871x_pwrctrl.h #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) x 69 drivers/staging/rtl8712/rtl871x_pwrctrl.h #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) x 42 drivers/staging/rtl8712/rtl871x_security.c u32 x; x 56 drivers/staging/rtl8712/rtl871x_security.c parc4ctx->x = 0; x 75 drivers/staging/rtl8712/rtl871x_security.c u32 x; x 81 drivers/staging/rtl8712/rtl871x_security.c x = (parc4ctx->x + 1) & 0xff; x 82 drivers/staging/rtl8712/rtl871x_security.c sx = state[x]; x 85 drivers/staging/rtl8712/rtl871x_security.c parc4ctx->x = x; x 88 drivers/staging/rtl8712/rtl871x_security.c state[x] = (u8)sy; x 109 drivers/staging/rtl8712/sta_info.h u32 x; x 111 drivers/staging/rtl8712/sta_info.h x = mac[0]; x 112 drivers/staging/rtl8712/sta_info.h x = (x << 2) ^ mac[1]; x 113 drivers/staging/rtl8712/sta_info.h x = (x << 2) ^ mac[2]; x 114 drivers/staging/rtl8712/sta_info.h x = (x << 2) ^ mac[3]; x 115 drivers/staging/rtl8712/sta_info.h x = (x << 2) ^ mac[4]; x 116 drivers/staging/rtl8712/sta_info.h x = (x << 2) ^ mac[5]; x 117 drivers/staging/rtl8712/sta_info.h x ^= x >> 8; x 118 drivers/staging/rtl8712/sta_info.h x = x & (NUM_STA - 1); x 119 drivers/staging/rtl8712/sta_info.h return x; x 13 drivers/staging/rtl8723bs/core/rtw_eeprom.c void up_clk(_adapter *padapter, u16 *x) x 16 drivers/staging/rtl8723bs/core/rtw_eeprom.c *x = *x | _EESK; x 17 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, (u8)*x); x 24 drivers/staging/rtl8723bs/core/rtw_eeprom.c void down_clk(_adapter *padapter, u16 *x) x 27 drivers/staging/rtl8723bs/core/rtw_eeprom.c *x = *x & ~_EESK; x 28 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, (u8)*x); x 35 drivers/staging/rtl8723bs/core/rtw_eeprom.c u16 x, mask; x 43 drivers/staging/rtl8723bs/core/rtw_eeprom.c x = rtw_read8(padapter, EE_9346CR); x 45 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~(_EEDO | _EEDI); x 48 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~_EEDI; x 50 drivers/staging/rtl8723bs/core/rtw_eeprom.c x |= _EEDI; x 55 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, (u8)x); x 57 drivers/staging/rtl8723bs/core/rtw_eeprom.c up_clk(padapter, &x); x 58 drivers/staging/rtl8723bs/core/rtw_eeprom.c down_clk(padapter, &x); x 65 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~_EEDI; x 66 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, (u8)x); x 73 drivers/staging/rtl8723bs/core/rtw_eeprom.c u16 x, d = 0, i; x 79 drivers/staging/rtl8723bs/core/rtw_eeprom.c x = rtw_read8(padapter, EE_9346CR); x 81 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~(_EEDO | _EEDI); x 86 drivers/staging/rtl8723bs/core/rtw_eeprom.c up_clk(padapter, &x); x 91 drivers/staging/rtl8723bs/core/rtw_eeprom.c x = rtw_read8(padapter, EE_9346CR); x 93 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~(_EEDI); x 94 drivers/staging/rtl8723bs/core/rtw_eeprom.c if (x & _EEDO) x 97 drivers/staging/rtl8723bs/core/rtw_eeprom.c down_clk(padapter, &x); x 107 drivers/staging/rtl8723bs/core/rtw_eeprom.c u8 x; x 109 drivers/staging/rtl8723bs/core/rtw_eeprom.c x = rtw_read8(padapter, EE_9346CR); x 111 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~(_EECS | _EESK); x 112 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, x); x 115 drivers/staging/rtl8723bs/core/rtw_eeprom.c x |= _EECS; x 116 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, x); x 123 drivers/staging/rtl8723bs/core/rtw_eeprom.c u16 x; x 129 drivers/staging/rtl8723bs/core/rtw_eeprom.c x = rtw_read8(padapter, EE_9346CR); x 134 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~(_EECS | _EEDI); x 135 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, (u8)x); x 140 drivers/staging/rtl8723bs/core/rtw_eeprom.c up_clk(padapter, &x); x 145 drivers/staging/rtl8723bs/core/rtw_eeprom.c down_clk(padapter, &x); x 153 drivers/staging/rtl8723bs/core/rtw_eeprom.c u16 x; x 163 drivers/staging/rtl8723bs/core/rtw_eeprom.c x = rtw_read8(padapter, EE_9346CR); x 170 drivers/staging/rtl8723bs/core/rtw_eeprom.c x &= ~(_EEDI | _EEDO | _EESK | _EEM0); x 171 drivers/staging/rtl8723bs/core/rtw_eeprom.c x |= _EEM1 | _EECS; x 172 drivers/staging/rtl8723bs/core/rtw_eeprom.c rtw_write8(padapter, EE_9346CR, (unsigned char)x); x 92 drivers/staging/rtl8723bs/core/rtw_security.c u32 x; x 107 drivers/staging/rtl8723bs/core/rtw_security.c parc4ctx->x = 0; x 126 drivers/staging/rtl8723bs/core/rtw_security.c u32 x; x 132 drivers/staging/rtl8723bs/core/rtw_security.c x = (parc4ctx->x + 1) & 0xff; x 133 drivers/staging/rtl8723bs/core/rtw_security.c sx = state[x]; x 136 drivers/staging/rtl8723bs/core/rtw_security.c parc4ctx->x = x; x 139 drivers/staging/rtl8723bs/core/rtw_security.c state[x] = (u8)sy; x 420 drivers/staging/rtl8723bs/include/drv_types.h #define KEY_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \ x 421 drivers/staging/rtl8723bs/include/drv_types.h ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \ x 422 drivers/staging/rtl8723bs/include/drv_types.h ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15] x 1145 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _LDV12_VADJ(x) (((x) & 0xF) << 4) x 1153 drivers/staging/rtl8723bs/include/hal_com_reg.h #define EFUSE_SEL(x) (((x) & 0x3) << 8) x 1251 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _NETTYPE(x) (((x) & 0x3) << 16) x 1263 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _PSRX(x) (x) x 1264 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _PSTX(x) ((x) << 4) x 1292 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _TXDMA_CMQ_MAP(x) (((x)&0x3) << 16) x 1293 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) x 1294 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) x 1295 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) x 1296 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8) x 1297 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) x 1298 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) x 1314 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _LLT_INIT_DATA(x) ((x) & 0xFF) x 1315 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) x 1316 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _LLT_OP(x) (((x) & 0x3) << 30) x 1317 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) x 1326 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _HPQ(x) ((x) & 0xFF) x 1327 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _LPQ(x) (((x) & 0xFF) << 8) x 1328 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _PUBQ(x) (((x) & 0xFF) << 16) x 1329 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _NPQ(x) ((x) & 0xFF) /* NOTE: in RQPN_NPQ register */ x 1330 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _EPQ(x) (((x) & 0xFF) << 16) /* NOTE: in RQPN_EPQ register */ x 1349 drivers/staging/rtl8723bs/include/hal_com_reg.h #define BIT_TXPKTNUM(x) (((x) & BIT_MASK_TXPKTNUM) << BIT_SHIFT_TXPKTNUM) x 1356 drivers/staging/rtl8723bs/include/hal_com_reg.h #define BIT_Tx_OQT_free_space(x) (((x) & BIT_MASK_Tx_OQT_free_space) << BIT_SHIFT_Tx_OQT_free_space) x 1391 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) x 1392 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) x 1411 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _LRL(x) ((x) & 0x3F) x 1412 drivers/staging/rtl8723bs/include/hal_com_reg.h #define _SRL(x) (((x) & 0x3F) << 8) x 849 drivers/staging/rtl8723bs/include/ieee80211.h #define MAC_ARG(x) (x) x 851 drivers/staging/rtl8723bs/include/ieee80211.h #define IP_ARG(x) (x) x 88 drivers/staging/rtl8723bs/include/ioctl_cfg80211.h #define wiphy_to_adapter(x) (*((struct adapter **)wiphy_priv(x))) x 18 drivers/staging/rtl8723bs/include/osdep_service.h #define BIT(x) (1 << (x)) x 137 drivers/staging/rtl8723bs/include/osdep_service.h #define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2) x 165 drivers/staging/rtl8723bs/include/osdep_service.h #define MAC_ARG(x) (x) x 137 drivers/staging/rtl8723bs/include/rtw_debug.h #define DBG_871X(x, ...) do {} while (0) x 138 drivers/staging/rtl8723bs/include/rtw_debug.h #define MSG_8192C(x, ...) do {} while (0) x 139 drivers/staging/rtl8723bs/include/rtw_debug.h #define DBG_8192C(x,...) do {} while (0) x 140 drivers/staging/rtl8723bs/include/rtw_debug.h #define DBG_871X_LEVEL(x,...) do {} while (0) x 66 drivers/staging/rtl8723bs/include/rtw_io.h #define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) x 67 drivers/staging/rtl8723bs/include/rtw_io.h #define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) x 75 drivers/staging/rtl8723bs/include/rtw_pwrctrl.h #define PS_STATE(x) (PS_STATE_MASK & (x)) x 76 drivers/staging/rtl8723bs/include/rtw_pwrctrl.h #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) x 77 drivers/staging/rtl8723bs/include/rtw_pwrctrl.h #define PS_SEQ(x) (PS_SEQ_MASK & (x)) x 86 drivers/staging/rtl8723bs/include/rtw_pwrctrl.h #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) x 87 drivers/staging/rtl8723bs/include/rtw_pwrctrl.h #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) x 88 drivers/staging/rtl8723bs/include/rtw_pwrctrl.h #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) x 392 drivers/staging/rtl8723bs/include/rtw_security.h #define RORc(x, y) \ x 393 drivers/staging/rtl8723bs/include/rtw_security.h (((((unsigned long) (x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \ x 394 drivers/staging/rtl8723bs/include/rtw_security.h ((unsigned long) (x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL) x 395 drivers/staging/rtl8723bs/include/rtw_security.h #define Ch(x, y, z) (z ^ (x & (y ^ z))) x 396 drivers/staging/rtl8723bs/include/rtw_security.h #define Maj(x, y, z) (((x | y) & z) | (x & y)) x 397 drivers/staging/rtl8723bs/include/rtw_security.h #define S(x, n) RORc((x), (n)) x 398 drivers/staging/rtl8723bs/include/rtw_security.h #define R(x, n) (((x)&0xFFFFFFFFUL)>>(n)) x 399 drivers/staging/rtl8723bs/include/rtw_security.h #define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22)) x 400 drivers/staging/rtl8723bs/include/rtw_security.h #define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25)) x 401 drivers/staging/rtl8723bs/include/rtw_security.h #define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3)) x 402 drivers/staging/rtl8723bs/include/rtw_security.h #define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10)) x 404 drivers/staging/rtl8723bs/include/rtw_security.h #define MIN(x, y) (((x) < (y)) ? (x) : (y)) x 353 drivers/staging/rtl8723bs/include/sta_info.h u32 x; x 355 drivers/staging/rtl8723bs/include/sta_info.h x = mac[0]; x 356 drivers/staging/rtl8723bs/include/sta_info.h x = (x << 2) ^ mac[1]; x 357 drivers/staging/rtl8723bs/include/sta_info.h x = (x << 2) ^ mac[2]; x 358 drivers/staging/rtl8723bs/include/sta_info.h x = (x << 2) ^ mac[3]; x 359 drivers/staging/rtl8723bs/include/sta_info.h x = (x << 2) ^ mac[4]; x 360 drivers/staging/rtl8723bs/include/sta_info.h x = (x << 2) ^ mac[5]; x 362 drivers/staging/rtl8723bs/include/sta_info.h x ^= x >> 8; x 363 drivers/staging/rtl8723bs/include/sta_info.h x = x & (NUM_STA - 1); x 365 drivers/staging/rtl8723bs/include/sta_info.h return x; x 15 drivers/staging/rtl8723bs/include/wifi.h #define BIT(x) (1 << (x)) x 33 drivers/staging/rts5208/rtsx_sys.h #define RTSX_MSG_IN_INT(x) x 9 drivers/staging/sm750fb/ddk750_chip.c #define MHz(x) ((x) * 1000000) x 19 drivers/staging/sm750fb/ddk750_mode.c unsigned long x, y; x 21 drivers/staging/sm750fb/ddk750_mode.c x = pModeParam->horizontal_display_end; x 35 drivers/staging/sm750fb/ddk750_mode.c ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); x 48 drivers/staging/sm750fb/ddk750_mode.c if (x == 800 && y == 600) x 50 drivers/staging/sm750fb/ddk750_mode.c else if (x == 1024 && y == 768) x 52 drivers/staging/sm750fb/ddk750_mode.c else if (x == 1152 && y == 864) x 54 drivers/staging/sm750fb/ddk750_mode.c else if (x == 1280 && y == 768) x 56 drivers/staging/sm750fb/ddk750_mode.c else if (x == 1280 && y == 720) x 58 drivers/staging/sm750fb/ddk750_mode.c else if (x == 1280 && y == 960) x 60 drivers/staging/sm750fb/ddk750_mode.c else if (x == 1280 && y == 1024) x 7 drivers/staging/sm750fb/sm750.h #define MHZ(x) ((x) * 1000000) x 90 drivers/staging/sm750fb/sm750_accel.c u32 x, u32 y, u32 width, u32 height, x 118 drivers/staging/sm750fb/sm750_accel.c ((x << DE_DESTINATION_X_SHIFT) & DE_DESTINATION_X_MASK) | x 194 drivers/staging/sm750fb/sm750_accel.h u32 x, u32 y, u32 width, u32 height, x 67 drivers/staging/sm750fb/sm750_cursor.c void sm750_hw_cursor_setPos(struct lynx_cursor *cursor, int x, int y) x 72 drivers/staging/sm750fb/sm750_cursor.c (x & HWC_LOCATION_X_MASK); x 11 drivers/staging/sm750fb/sm750_cursor.h int x, int y); x 502 drivers/staging/speakup/kobjects.c int x; x 508 drivers/staging/speakup/kobjects.c x = strlen(buf); x 509 drivers/staging/speakup/kobjects.c if (x < 1 || x > 99) x 526 drivers/staging/speakup/kobjects.c memcpy(punc_buf, buf, x); x 528 drivers/staging/speakup/kobjects.c while (x && punc_buf[x - 1] == '\n') x 529 drivers/staging/speakup/kobjects.c x--; x 530 drivers/staging/speakup/kobjects.c punc_buf[x] = '\0'; x 535 drivers/staging/speakup/kobjects.c x = spk_set_mask_bits(NULL, var->value, 3); x 537 drivers/staging/speakup/kobjects.c x = spk_set_mask_bits(punc_buf, var->value, 3); x 39 drivers/staging/speakup/speakup.h #define IS_WDLM(x) (spk_chartab[((u_char)x)] & B_WDLM) x 40 drivers/staging/speakup/speakup.h #define IS_CHAR(x, type) (spk_chartab[((u_char)x)] & type) x 41 drivers/staging/speakup/speakup.h #define IS_TYPE(x, type) ((spk_chartab[((u_char)x)] & type) == type) x 583 drivers/staging/unisys/visorinput/visorinput.c static int calc_button(int x) x 585 drivers/staging/unisys/visorinput/visorinput.c switch (x) { x 672 drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c .x = dev->overlay.w.left, x 1083 drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c camera_port->es.video.crop.x = 0; x 1117 drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c preview_port->es.video.crop.x = 0; x 1171 drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c port->es.video.crop.x = 0; x 1615 drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c format->es->video.crop.x = 0; x 1629 drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c format->es->video.crop.x = 0; x 1642 drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c format->es->video.crop.x = 0; x 37 drivers/staging/vc04_services/bcm2835-camera/mmal-msg-common.h s32 x; /**< x coordinate (from left) */ x 627 drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h s32 x; x 734 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c port->es.video.crop.x, x 1529 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c dst->es.video.crop.x = src->es.video.crop.x; x 14 drivers/staging/vc04_services/interface/vchi/vchi.h #define VCHI_BULK_ROUND_UP(x) ((((unsigned long)(x))+VCHI_BULK_ALIGN-1) & ~(VCHI_BULK_ALIGN-1)) x 15 drivers/staging/vc04_services/interface/vchi/vchi.h #define VCHI_BULK_ROUND_DOWN(x) (((unsigned long)(x)) & ~(VCHI_BULK_ALIGN-1)) x 16 drivers/staging/vc04_services/interface/vchi/vchi.h #define VCHI_BULK_ALIGN_NBYTES(x) (VCHI_BULK_ALIGNED(x) ? 0 : (VCHI_BULK_ALIGN - ((unsigned long)(x) & (VCHI_BULK_ALIGN-1)))) x 19 drivers/staging/vc04_services/interface/vchi/vchi.h #define VCHI_BULK_ALIGNED(x) 1 x 21 drivers/staging/vc04_services/interface/vchi/vchi.h #define VCHI_BULK_ALIGNED(x) (((unsigned long)(x) & (VCHI_BULK_ALIGN-1)) == 0) x 32 drivers/staging/vc04_services/interface/vchi/vchi.h #define MAKE_FOURCC(x) ((int32_t)((x[0] << 24) | (x[1] << 16) | (x[2] << 8) | x[3])) x 20 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c #define BULK_INDEX(x) (x & (VCHIQ_NUM_SERVICE_BULKS - 1)) x 54 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h #define IS_POW2(x) (x && ((x & (x - 1)) == 0)) x 62 drivers/staging/wlan-ng/p80211wep.c #define WEP_KEY(x) (((x) & 0xC0) >> 6) x 137 drivers/staging/wusbcore/security.c const char *wusb_et_name(u8 x) x 139 drivers/staging/wusbcore/security.c switch (x) { x 19 drivers/tee/tee_core.c #define TEE_IOCTL_PARAM_SIZE(x) (sizeof(struct tee_param) * (x)) x 58 drivers/thermal/clock_cooling.c #define to_clock_cooling_device(x) \ x 59 drivers/thermal/clock_cooling.c container_of(x, struct clock_cooling_device, clk_rate_change_nb) x 77 drivers/thermal/mtk_thermal.c #define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff) x 79 drivers/thermal/mtk_thermal.c #define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff) << 16) x 80 drivers/thermal/mtk_thermal.c #define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff) x 82 drivers/thermal/mtk_thermal.c #define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x) x 124 drivers/thermal/mtk_thermal.c #define CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff) x 125 drivers/thermal/mtk_thermal.c #define CALIB_BUF0_VTS_TS1(x) (((x) >> 17) & 0x1ff) x 126 drivers/thermal/mtk_thermal.c #define CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff) x 127 drivers/thermal/mtk_thermal.c #define CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff) x 128 drivers/thermal/mtk_thermal.c #define CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff) x 129 drivers/thermal/mtk_thermal.c #define CALIB_BUF2_VTS_TS5(x) (((x) >> 5) & 0x1ff) x 130 drivers/thermal/mtk_thermal.c #define CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff) x 131 drivers/thermal/mtk_thermal.c #define CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f) x 132 drivers/thermal/mtk_thermal.c #define CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f) x 133 drivers/thermal/mtk_thermal.c #define CALIB_BUF0_O_SLOPE_SIGN(x) (((x) >> 7) & 0x1) x 134 drivers/thermal/mtk_thermal.c #define CALIB_BUF1_ID(x) (((x) >> 9) & 0x1) x 30 drivers/thermal/power_allocator.c #define int_to_frac(x) ((x) << FRAC_BITS) x 31 drivers/thermal/power_allocator.c #define frac_to_int(x) ((x) >> FRAC_BITS) x 41 drivers/thermal/power_allocator.c static inline s64 mul_frac(s64 x, s64 y) x 43 drivers/thermal/power_allocator.c return (x * y) >> FRAC_BITS; x 54 drivers/thermal/power_allocator.c static inline s64 div_frac(s64 x, s64 y) x 56 drivers/thermal/power_allocator.c return div_s64(x << FRAC_BITS, y); x 129 drivers/tty/n_tty.c #define MASK(x) ((x) & (N_TTY_BUF_SIZE - 1)) x 2658 drivers/tty/rocket.c Word_t x; x 2664 drivers/tty/rocket.c x = sInW(io + _INDX_DATA); x 2666 drivers/tty/rocket.c if (x != sInW(io + _INDX_DATA)) /* if different must be 8 chan */ x 330 drivers/tty/serial/8250/8250.h #define PRESL(x) ((x) & 0x30) x 487 drivers/tty/serial/8250/8250_core.c #define univ8250_rsa_support(x) do { } while (0) x 75 drivers/tty/serial/8250/8250_exar.c #define UART_EXAR_RS485_DLY(x) ((x) << 4) x 82 drivers/tty/serial/8250/8250_hp300.c #define FRODO_APCI_OFFSET(x) (FRODO_APCIBASE + ((x) * FRODO_APCISPACE)) x 77 drivers/tty/serial/8250/8250_omap.c #define TRIGGER_TLR_MASK(x) ((x & 0x3c) >> 2) x 78 drivers/tty/serial/8250/8250_omap.c #define TRIGGER_FCR_MASK(x) (x & 3) x 91 drivers/tty/serial/8250/8250_omap.c #define OMAP_UART_TCR_RESTORE(x) ((x / 4) << 4) x 92 drivers/tty/serial/8250/8250_omap.c #define OMAP_UART_TCR_HALT(x) ((x / 4) << 0) x 94 drivers/tty/serial/8250/8250_omap.c #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) x 513 drivers/tty/serial/amba-pl011.c u32 x; x 516 drivers/tty/serial/amba-pl011.c "poll-rate-ms", &x)) x 517 drivers/tty/serial/amba-pl011.c uap->dmarx.poll_rate = x; x 521 drivers/tty/serial/amba-pl011.c "poll-timeout-ms", &x)) x 522 drivers/tty/serial/amba-pl011.c uap->dmarx.poll_timeout = x; x 39 drivers/tty/serial/dz.h #define LINE(x) ((x & DZ_LINE_MASK) >> 8) /* Get the line number x 41 drivers/tty/serial/dz.h #define UCHAR(x) ((unsigned char)(x & DZ_RBUF_MASK)) x 217 drivers/tty/serial/fsl_lpuart.c #define UARTFIFO_DEPTH(x) (0x1 << ((x) ? ((x) + 1) : 0)) x 374 drivers/tty/serial/fsl_lpuart.c #define lpuart_enable_clks(x) __lpuart_enable_clks(x, true) x 375 drivers/tty/serial/fsl_lpuart.c #define lpuart_disable_clks(x) __lpuart_enable_clks(x, false) x 73 drivers/tty/serial/imx.c #define UCR1_ICD_REG(x) (((x) & 3) << 10) /* idle condition detect */ x 128 drivers/tty/serial/imx.c #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) x 129 drivers/tty/serial/kgdboc.c #define kgdboc_register_kbd(x) 0 x 34 drivers/tty/serial/lpc32xx_hs.c #define LPC32XX_HSUART_FIFO(x) ((x) + 0x00) x 35 drivers/tty/serial/lpc32xx_hs.c #define LPC32XX_HSUART_LEVEL(x) ((x) + 0x04) x 36 drivers/tty/serial/lpc32xx_hs.c #define LPC32XX_HSUART_IIR(x) ((x) + 0x08) x 37 drivers/tty/serial/lpc32xx_hs.c #define LPC32XX_HSUART_CTRL(x) ((x) + 0x0C) x 38 drivers/tty/serial/lpc32xx_hs.c #define LPC32XX_HSUART_RATE(x) ((x) + 0x10) x 35 drivers/tty/serial/men_z135_uart.c #define IRQ_ID(x) ((x) & 0x1f) x 96 drivers/tty/serial/men_z135_uart.c #define LCR(x) (((x) >> MEN_Z135_LCR_SHIFT) & 0xff) x 98 drivers/tty/serial/men_z135_uart.c #define BYTES_TO_ALIGN(x) ((x) & 0x3) x 29 drivers/tty/serial/mps2-uart.c #define MAKE_NAME(x) (DRIVER_NAME # x) x 152 drivers/tty/serial/msm_serial.c #define UARTDM_TX_AIGN(x) ((x) & ~0x3) /* valid for > 1p3 */ x 48 drivers/tty/serial/omap-serial.c #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) x 61 drivers/tty/serial/pmac_zilog.c #define of_machine_is_compatible(x) (0) x 45 drivers/tty/serial/pnx8xxx_uart.c #define SM_TO_FIFO(x) ((x) >> 10) x 46 drivers/tty/serial/pnx8xxx_uart.c #define SM_TO_ISTAT(x) ((x) & 0x000001ff) x 47 drivers/tty/serial/pnx8xxx_uart.c #define FIFO_TO_SM(x) ((x) << 10) x 48 drivers/tty/serial/pnx8xxx_uart.c #define ISTAT_TO_SM(x) ((x) & 0x000001ff) x 39 drivers/tty/serial/rda-uart.c #define RDA_UART_PARITY(x) (((x) & 0x3) << 4) x 50 drivers/tty/serial/rda-uart.c #define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28) x 53 drivers/tty/serial/rda-uart.c #define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0) x 55 drivers/tty/serial/rda-uart.c #define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8) x 70 drivers/tty/serial/rda-uart.c #define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0) x 71 drivers/tty/serial/rda-uart.c #define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0) x 98 drivers/tty/serial/rda-uart.c #define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0) x 99 drivers/tty/serial/rda-uart.c #define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8) x 100 drivers/tty/serial/rda-uart.c #define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16) x 44 drivers/tty/serial/sa1100.c #define SM_TO_UTSR0(x) ((x) & 0xff) x 45 drivers/tty/serial/sa1100.c #define SM_TO_UTSR1(x) ((x) >> 8) x 46 drivers/tty/serial/sa1100.c #define UTSR0_TO_SM(x) ((x)) x 47 drivers/tty/serial/sa1100.c #define UTSR1_TO_SM(x) ((x) << 8) x 85 drivers/tty/serial/sccnxp.c # define ISR_TXRDY(x) (1 << ((x * 4) + 0)) x 86 drivers/tty/serial/sccnxp.c # define ISR_RXRDY(x) (1 << ((x * 4) + 1)) x 39 drivers/tty/serial/serial-tegra.c #define BYTES_TO_ALIGN(x) ((unsigned long)(x) & 0x3) x 90 drivers/tty/serial/sh-sci.c #define SCI_SR(x) BIT((x) - 1) x 91 drivers/tty/serial/sh-sci.c #define SCI_SR_RANGE(x, y) GENMASK((y) - 1, (x) - 1) x 331 drivers/tty/serial/sirfsoc_uart.h #define SIRFUART_RECV_TIMEOUT_VALUE(x) \ x 332 drivers/tty/serial/sirfsoc_uart.h (((x) > 0xFFFF) ? 0xFFFF : ((x) & 0xFFFF)) x 333 drivers/tty/serial/sirfsoc_uart.h #define SIRFUART_USP_RECV_TIMEOUT(x) (x & 0xFFFF) x 334 drivers/tty/serial/sirfsoc_uart.h #define SIRFUART_UART_RECV_TIMEOUT(x) ((x & 0xFFFF) << 16) x 18 drivers/tty/serial/tegra-tcu.c #define TCU_MBOX_BYTE(i, x) ((x) << (i * 8)) x 19 drivers/tty/serial/tegra-tcu.c #define TCU_MBOX_BYTE_V(x, i) (((x) >> (i * 8)) & 0xff) x 20 drivers/tty/serial/tegra-tcu.c #define TCU_MBOX_NUM_BYTES(x) ((x) << 24) x 21 drivers/tty/serial/tegra-tcu.c #define TCU_MBOX_NUM_BYTES_V(x) (((x) >> 24) & 0x3) x 249 drivers/tty/tty_ioctl.c #define NOSET_MASK(x, y, z) (x = ((x) & ~(z)) | ((y) & (z))) x 393 drivers/tty/vt/vt.c unsigned int x = vc->vc_x, cols = vc->vc_cols; x 395 drivers/tty/vt/vt.c memmove(&ln[x + nr], &ln[x], (cols - x - nr) * sizeof(*ln)); x 396 drivers/tty/vt/vt.c memset32(&ln[x], ' ', nr); x 406 drivers/tty/vt/vt.c unsigned int x = vc->vc_x, cols = vc->vc_cols; x 408 drivers/tty/vt/vt.c memcpy(&ln[x], &ln[x + nr], (cols - x - nr) * sizeof(*ln)); x 413 drivers/tty/vt/vt.c static void vc_uniscr_clear_line(struct vc_data *vc, unsigned int x, x 421 drivers/tty/vt/vt.c memset32(&ln[x], ' ', nr); x 512 drivers/tty/vt/vt.c int x, y, mask; x 539 drivers/tty/vt/vt.c for (x = 0; x < vc->vc_cols; x++) { x 541 drivers/tty/vt/vt.c line[x] = inverse_translate(vc, glyph, true); x 595 drivers/tty/vt/vt.c int x, y, mask; x 610 drivers/tty/vt/vt.c for (x = 0; x < vc->vc_cols; x++) { x 612 drivers/tty/vt/vt.c char32_t uc = line[x]; x 621 drivers/tty/vt/vt.c __func__, x, y, glyph, tc); x 1387 drivers/tty/vt/vt.c #define set_kbd(vc, x) vt_set_kbd_mode_bit((vc)->vc_num, (x)) x 1388 drivers/tty/vt/vt.c #define clr_kbd(vc, x) vt_clr_kbd_mode_bit((vc)->vc_num, (x)) x 1389 drivers/tty/vt/vt.c #define is_kbd(vc, x) vt_get_kbd_mode_bit((vc)->vc_num, (x)) x 240 drivers/usb/atm/ueagle-atm.c #define UEA_IS_PREFIRM(x) \ x 241 drivers/usb/atm/ueagle-atm.c (!((x)->driver_info & PSTFIRM)) x 242 drivers/usb/atm/ueagle-atm.c #define UEA_CHIP_VERSION(x) \ x 243 drivers/usb/atm/ueagle-atm.c ((x)->driver_info & 0xf) x 245 drivers/usb/atm/ueagle-atm.c #define IS_ISDN(x) \ x 246 drivers/usb/atm/ueagle-atm.c ((x)->annex & ANNEXB) x 150 drivers/usb/atm/usbatm.c #define UDSL_SKB(x) ((struct usbatm_control *)(x)->cb) x 117 drivers/usb/c67x00/c67x00-hcd.h #define c67x00_hcd_dev(x) (c67x00_hcd_to_hcd(x)->self.controller) x 34 drivers/usb/c67x00/c67x00-ll-hpi.c #define COMM_R(x) (0x01C4 + 2 * (x)) x 36 drivers/usb/c67x00/c67x00-ll-hpi.c #define HUSB_SIE_pCurrentTDPtr(x) ((x) ? 0x01B2 : 0x01B0) x 37 drivers/usb/c67x00/c67x00-ll-hpi.c #define HUSB_SIE_pTDListDone_Sem(x) ((x) ? 0x01B8 : 0x01B6) x 42 drivers/usb/c67x00/c67x00-ll-hpi.c #define HUSB_SIE_INIT_INT(x) ((x) ? 0x0073 : 0x0072) x 29 drivers/usb/c67x00/c67x00.h #define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A) x 31 drivers/usb/c67x00/c67x00.h #define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400) x 33 drivers/usb/c67x00/c67x00.h #define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080) x 34 drivers/usb/c67x00/c67x00.h #define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001) x 37 drivers/usb/c67x00/c67x00.h #define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090) x 56 drivers/usb/c67x00/c67x00.h #define HOST_CTL_REG(x) ((x) ? 0xC0A0 : 0xC080) x 64 drivers/usb/c67x00/c67x00.h #define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) x 74 drivers/usb/c67x00/c67x00.h #define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010) x 75 drivers/usb/c67x00/c67x00.h #define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004) x 78 drivers/usb/c67x00/c67x00.h #define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096) x 86 drivers/usb/c67x00/c67x00.h #define DEVICE_N_PORT_SEL(x) ((x) ? 0xC0A4 : 0xC084) x 89 drivers/usb/c67x00/c67x00.h #define DEVICE_N_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) x 104 drivers/usb/c67x00/c67x00.h #define SOFEOP_FLG(x) (1 << ((x) ? 12 : 10)) x 105 drivers/usb/c67x00/c67x00.h #define SIEMSG_FLG(x) (1 << (4 + (x))) x 106 drivers/usb/c67x00/c67x00.h #define RESET_FLG(x) ((x) ? 0x0200 : 0x0002) x 107 drivers/usb/c67x00/c67x00.h #define DONE_FLG(x) (1 << (2 + (x))) x 108 drivers/usb/c67x00/c67x00.h #define RESUME_FLG(x) (1 << (6 + (x))) x 117 drivers/usb/c67x00/c67x00.h #define HPI_SWAP_ENABLE(x) ((x) ? 0x0100 : 0x0001) x 118 drivers/usb/c67x00/c67x00.h #define RESET_TO_HPI_ENABLE(x) ((x) ? 0x0200 : 0x0002) x 119 drivers/usb/c67x00/c67x00.h #define DONE_TO_HPI_ENABLE(x) ((x) ? 0x0008 : 0x0004) x 120 drivers/usb/c67x00/c67x00.h #define RESUME_TO_HPI_ENABLE(x) ((x) ? 0x0080 : 0x0040) x 121 drivers/usb/c67x00/c67x00.h #define SOFEOP_TO_HPI_EN(x) ((x) ? 0x2000 : 0x0800) x 122 drivers/usb/c67x00/c67x00.h #define SOFEOP_TO_CPU_EN(x) ((x) ? 0x1000 : 0x0400) x 127 drivers/usb/c67x00/c67x00.h #define SIEMSG_REG(x) ((x) ? 0x0148 : 0x0144) x 148 drivers/usb/c67x00/c67x00.h #define SUSBx_RECEIVE_INT(x) ((x) ? 97 : 81) x 149 drivers/usb/c67x00/c67x00.h #define SUSBx_SEND_INT(x) ((x) ? 96 : 80) x 151 drivers/usb/c67x00/c67x00.h #define SUSBx_DEV_DESC_VEC(x) ((x) ? 0x00D4 : 0x00B4) x 152 drivers/usb/c67x00/c67x00.h #define SUSBx_CONF_DESC_VEC(x) ((x) ? 0x00D6 : 0x00B6) x 153 drivers/usb/c67x00/c67x00.h #define SUSBx_STRING_DESC_VEC(x) ((x) ? 0x00D8 : 0x00B8) x 50 drivers/usb/chipidea/udc.h #define QH_ISO_MULT(x) ((x >> 11) & 0x03) x 1676 drivers/usb/class/cdc-acm.c #define NOKIA_PCSUITE_ACM_INFO(x) \ x 1677 drivers/usb/class/cdc-acm.c USB_DEVICE_AND_INTERFACE_INFO(0x0421, x, \ x 1681 drivers/usb/class/cdc-acm.c #define SAMSUNG_PCSUITE_ACM_INFO(x) \ x 1682 drivers/usb/class/cdc-acm.c USB_DEVICE_AND_INTERFACE_INFO(0x04e7, x, \ x 1234 drivers/usb/dwc2/core.h u32 x = dwc2_readl(hsotg, offset); x 1235 drivers/usb/dwc2/core.h *buf++ = x; x 41 drivers/usb/dwc2/hw.h #define HSOTG_REG(x) (x) x 227 drivers/usb/dwc3/core.h #define DWC3_GCTL_RAMCLKSEL(x) (((x) & DWC3_GCTL_CLK_MASK) << 6) x 509 drivers/usb/dwc3/core.h #define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT) x 510 drivers/usb/dwc3/core.h #define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f) x 511 drivers/usb/dwc3/core.h #define DWC3_DEPCMD_STATUS(x) (((x) >> 12) & 0x0F) x 530 drivers/usb/dwc3/core.h #define DWC3_DEPCMD_CMD(x) ((x) & 0xf) x 94 drivers/usb/early/ehci-dbgp.c static inline u32 dbgp_len_update(u32 x, u32 len) x 96 drivers/usb/early/ehci-dbgp.c return (x & ~0x0f) | (len & 0x0f); x 149 drivers/usb/early/ehci-dbgp.c static inline u32 dbgp_pid_write_update(u32 x, u32 tok) x 153 drivers/usb/early/ehci-dbgp.c return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff); x 156 drivers/usb/early/ehci-dbgp.c static inline u32 dbgp_pid_read_update(u32 x, u32 tok) x 158 drivers/usb/early/ehci-dbgp.c return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff); x 88 drivers/usb/gadget/function/storage_common.h #define SK(x) ((u8) ((x) >> 16)) /* Sense Key byte, etc. */ x 89 drivers/usb/gadget/function/storage_common.h #define ASC(x) ((u8) ((x) >> 8)) x 90 drivers/usb/gadget/function/storage_common.h #define ASCQ(x) ((u8) (x)) x 41 drivers/usb/gadget/function/uvc_configfs.c #define le8_to_cpu(x) (x) x 42 drivers/usb/gadget/function/uvc_configfs.c #define cpu_to_le8(x) (x) x 43 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_CTRL_SET_TEST_MODE(x) ((x) << 8) x 96 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_TOGGLE_SET_EPNUM(x) ((x) & 0x1f) x 102 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP0_RX_LEN(x) (((x) >> 16) & 0x7f) x 103 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP0_SET_TX_LEN(x) (((x) & 0x7f) << 8) x 121 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_DEV_EN_SET_ADDR(x) ((x) << 8) x 146 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_DEV_EP0_RX_LEN(x) VHUB_EP0_RX_LEN(x) x 147 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_DEV_EP0_SET_TX_LEN(x) VHUB_EP0_SET_TX_LEN(x) x 161 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_CFG_SET_MAX_PKT(x) (((x) & 0x3ff) << 16) x 164 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_CFG_SET_EP_NUM(x) (((x) & 0xf) << 8) x 165 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_CFG_SET_TYPE(x) ((x) << 5) x 171 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_CFG_SET_DEV(x) ((x) << 1) x 175 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_DMA_PROC_STATUS(x) (((x) >> 4) & 0xf) x 185 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_DMA_SET_TX_SIZE(x) ((x) << 16) x 186 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_DMA_TX_SIZE(x) (((x) >> 16) & 0x7ff) x 187 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_DMA_RPTR(x) (((x) >> 8) & 0xff) x 188 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_DMA_SET_RPTR(x) (((x) & 0xff) << 8) x 189 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_EP_DMA_SET_CPU_WPTR(x) (x) x 204 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_DSC1_IN_SET_LEN(x) ((x) & 0xfff) x 205 drivers/usb/gadget/udc/aspeed-vhub/vhub.h #define VHUB_DSC1_IN_LEN(x) ((x) & 0xfff) x 202 drivers/usb/gadget/udc/atmel_usba_udc.h #define USBA_EPT_BASE(x) (0x100 + (x) * 0x20) x 203 drivers/usb/gadget/udc/atmel_usba_udc.h #define USBA_DMA_BASE(x) (0x300 + (x) * 0x10) x 204 drivers/usb/gadget/udc/atmel_usba_udc.h #define USBA_FIFO_BASE(x) ((x) << 16) x 127 drivers/usb/gadget/udc/fsl_udc_core.c static inline u32 cpu_to_hc32(const u32 x) x 130 drivers/usb/gadget/udc/fsl_udc_core.c ? (__force u32)cpu_to_be32(x) x 131 drivers/usb/gadget/udc/fsl_udc_core.c : (__force u32)cpu_to_le32(x); x 134 drivers/usb/gadget/udc/fsl_udc_core.c static inline u32 hc32_to_cpu(const u32 x) x 137 drivers/usb/gadget/udc/fsl_udc_core.c ? be32_to_cpu((__force __be32)x) x 138 drivers/usb/gadget/udc/fsl_udc_core.c : le32_to_cpu((__force __le32)x); x 145 drivers/usb/gadget/udc/fsl_udc_core.c #define cpu_to_hc32(x) cpu_to_le32(x) x 146 drivers/usb/gadget/udc/fsl_udc_core.c #define hc32_to_cpu(x) le32_to_cpu(x) x 93 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_DAR_DRVADDR(x) (x & 0x7F) x 100 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_CSR_LEN(x) ((x & 0xFFFF) << 8) x 118 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET1_START_ENTRY(x) ((x & 0xFF) << 24) x 120 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET1_FIFOENTRY(x) ((x & 0x1F) << 12) x 122 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET1_INTERVAL(x) ((x & 0x7) << 6) x 123 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET1_BWNUM(x) ((x & 0x3) << 4) x 127 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET1_TYPE(x) ((x & 0x3) << 2) x 131 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET1_DIR(x) ((x & 0x1) << 1) x 140 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET2_ADDROFS(x) ((x & 0x7FFF) << 16) x 142 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_EPSET2_MPS(x) (x & 0x7FF) x 157 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_STRID_STRID(x) (x & 0xFFFF) x 189 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_SSCR0_MAX_INTERVAL(x) ((x & 0x7) << 4) x 211 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_SSCR2_U2_INACT_TIMEOUT(x) ((x & 0xFF) << 16) x 212 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_SSCR2_U1TIMEOUT(x) ((x & 0xFF) << 8) x 213 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_SSCR2_U2TIMEOUT(x) (x & 0xFF) x 218 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_DEVNOTF_CONTEXT0(x) ((x & 0xFFFFFF) << 8) x 236 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_VSIC_VCTL(x) (x & 0x3F) x 422 drivers/usb/gadget/udc/fusb300_udc.h #define FUSB300_IGR4_EP_RX0_INT(x) (1 << (x + 16)) x 52 drivers/usb/gadget/udc/gr_udc.c #define gr_read32(x) (ioread32be((x))) x 53 drivers/usb/gadget/udc/gr_udc.c #define gr_write32(x, v) (iowrite32be((v), (x))) x 203 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DEVINTST(x) ((x) + 0x200) x 204 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DEVINTEN(x) ((x) + 0x204) x 205 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DEVINTCLR(x) ((x) + 0x208) x 206 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DEVINTSET(x) ((x) + 0x20C) x 207 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_CMDCODE(x) ((x) + 0x210) x 208 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_CMDDATA(x) ((x) + 0x214) x 209 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_RXDATA(x) ((x) + 0x218) x 210 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_TXDATA(x) ((x) + 0x21C) x 211 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_RXPLEN(x) ((x) + 0x220) x 212 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_TXPLEN(x) ((x) + 0x224) x 213 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_CTRL(x) ((x) + 0x228) x 214 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DEVINTPRI(x) ((x) + 0x22C) x 215 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPINTST(x) ((x) + 0x230) x 216 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPINTEN(x) ((x) + 0x234) x 217 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPINTCLR(x) ((x) + 0x238) x 218 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPINTSET(x) ((x) + 0x23C) x 219 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPINTPRI(x) ((x) + 0x240) x 220 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_REEP(x) ((x) + 0x244) x 221 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPIND(x) ((x) + 0x248) x 222 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPMAXPSIZE(x) ((x) + 0x24C) x 226 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DMARST(x) ((x) + 0x250) x 227 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DMARCLR(x) ((x) + 0x254) x 228 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DMARSET(x) ((x) + 0x258) x 230 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_UDCAH(x) ((x) + 0x280) x 233 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPDMAST(x) ((x) + 0x284) x 234 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPDMAEN(x) ((x) + 0x288) x 235 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EPDMADIS(x) ((x) + 0x28C) x 237 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DMAINTST(x) ((x) + 0x290) x 238 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_DMAINTEN(x) ((x) + 0x294) x 240 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EOTINTST(x) ((x) + 0x2A0) x 241 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EOTINTCLR(x) ((x) + 0x2A4) x 242 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_EOTINTSET(x) ((x) + 0x2A8) x 244 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_NDDRTINTST(x) ((x) + 0x2AC) x 245 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_NDDRTINTCLR(x) ((x) + 0x2B0) x 246 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_NDDRTINTSET(x) ((x) + 0x2B4) x 248 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_SYSERRTINTST(x) ((x) + 0x2B8) x 249 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_SYSERRTINTCLR(x) ((x) + 0x2BC) x 250 drivers/usb/gadget/udc/lpc32xx_udc.c #define USBD_SYSERRTINTSET(x) ((x) + 0x2C0) x 392 drivers/usb/gadget/udc/lpc32xx_udc.c #define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16)) x 393 drivers/usb/gadget/udc/lpc32xx_udc.c #define CMD_SEL_EP(x) (0x00000500 | ((x) << 16)) x 394 drivers/usb/gadget/udc/lpc32xx_udc.c #define DAT_SEL_EP(x) (0x00000200 | ((x) << 16)) x 395 drivers/usb/gadget/udc/lpc32xx_udc.c #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16)) x 396 drivers/usb/gadget/udc/lpc32xx_udc.c #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16)) x 397 drivers/usb/gadget/udc/lpc32xx_udc.c #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16)) x 383 drivers/usb/gadget/udc/m66592-udc.h #define M66592_BUF_SIZE(x) ((((x) / 64) - 1) << 10) x 97 drivers/usb/gadget/udc/omap_udc.h # define UDC_DMA_RX_SRC(x) (((x)>>8) & 0xf) x 98 drivers/usb/gadget/udc/omap_udc.h # define UDC_DMA_TX_SRC(x) (((x)>>0) & 0xf) x 235 drivers/usb/gadget/udc/pxa25x_udc.h #define dump_udccr(x) do{}while(0) x 236 drivers/usb/gadget/udc/pxa25x_udc.h #define dump_udccs0(x) do{}while(0) x 237 drivers/usb/gadget/udc/pxa25x_udc.h #define dump_state(x) do{}while(0) x 31 drivers/usb/gadget/udc/pxa27x_udc.h #define UDCCSRn(x) (0x0100 + ((x)<<2)) /* UDC Control/Status register */ x 32 drivers/usb/gadget/udc/pxa27x_udc.h #define UDCBCRn(x) (0x0200 + ((x)<<2)) /* UDC Byte Count Register */ x 33 drivers/usb/gadget/udc/pxa27x_udc.h #define UDCDRn(x) (0x0300 + ((x)<<2)) /* UDC Data Register */ x 34 drivers/usb/gadget/udc/pxa27x_udc.h #define UDCCRn(x) (0x0400 + ((x)<<2)) /* UDC Control Register */ x 35 drivers/usb/gadget/udc/s3c-hsudc.c #define S3C_HSUDC_REG(x) (x) x 265 drivers/usb/host/ehci-sched.c unsigned uframe, uf, x; x 277 drivers/usb/host/ehci-sched.c x = ps->tt_usecs; x 281 drivers/usb/host/ehci-sched.c x += budget_line[uf]; x 284 drivers/usb/host/ehci-sched.c if (x <= 125) { x 285 drivers/usb/host/ehci-sched.c budget_line[uf] = x; x 289 drivers/usb/host/ehci-sched.c x -= 125; x 238 drivers/usb/host/ehci.h # define INCR(x) ((x)++) x 240 drivers/usb/host/ehci.h # define INCR(x) do {} while (0) x 555 drivers/usb/host/ehci.h #define SITD_LENGTH(x) (((x) >> 16) & 0x3ff) x 814 drivers/usb/host/ehci.h static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x) x 817 drivers/usb/host/ehci.h ? (__force __hc32)cpu_to_be32(x) x 818 drivers/usb/host/ehci.h : (__force __hc32)cpu_to_le32(x); x 822 drivers/usb/host/ehci.h static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x) x 825 drivers/usb/host/ehci.h ? be32_to_cpu((__force __be32)x) x 826 drivers/usb/host/ehci.h : le32_to_cpu((__force __le32)x); x 829 drivers/usb/host/ehci.h static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x) x 832 drivers/usb/host/ehci.h ? be32_to_cpup((__force __be32 *)x) x 833 drivers/usb/host/ehci.h : le32_to_cpup((__force __le32 *)x); x 839 drivers/usb/host/ehci.h static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x) x 841 drivers/usb/host/ehci.h return cpu_to_le32(x); x 845 drivers/usb/host/ehci.h static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x) x 847 drivers/usb/host/ehci.h return le32_to_cpu(x); x 850 drivers/usb/host/ehci.h static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x) x 852 drivers/usb/host/ehci.h return le32_to_cpup(x); x 180 drivers/usb/host/fotg210.h # define INCR(x) ((x)++) x 182 drivers/usb/host/fotg210.h # define INCR(x) do {} while (0) x 277 drivers/usb/host/fotg210.h #define PORT_USB11(x) (((x)&(3<<10)) == (1<<10)) /* USB 1.1 device */ x 665 drivers/usb/host/fotg210.h static inline __hc32 cpu_to_hc32(const struct fotg210_hcd *fotg210, const u32 x) x 667 drivers/usb/host/fotg210.h return cpu_to_le32(x); x 671 drivers/usb/host/fotg210.h static inline u32 hc32_to_cpu(const struct fotg210_hcd *fotg210, const __hc32 x) x 673 drivers/usb/host/fotg210.h return le32_to_cpu(x); x 677 drivers/usb/host/fotg210.h const __hc32 *x) x 679 drivers/usb/host/fotg210.h return le32_to_cpup(x); x 73 drivers/usb/host/imx21-hcd.h #define USBOTG_I2C_TXCVR_REG(x) (0x100 + (x)) x 83 drivers/usb/host/imx21-hcd.h #define USBH_HOST_CTRL_SCHDOVR(x) ((x) << 16) x 136 drivers/usb/host/imx21-hcd.h #define USBH_ROOTHUBB_PRTPWRCM(x) (1 << ((x) + 16)) x 137 drivers/usb/host/imx21-hcd.h #define USBH_ROOTHUBB_DEVREMOVE(x) (1 << (x)) x 146 drivers/usb/host/imx21-hcd.h #define USBH_PORTSTAT(x) (0xf4 + ((x) * 4)) x 188 drivers/usb/host/imx21-hcd.h #define USB_ETDSMSA(x) (0x900 + ((x) * 4)) x 189 drivers/usb/host/imx21-hcd.h #define USB_EPSMSA(x) (0x980 + ((x) * 4)) x 190 drivers/usb/host/imx21-hcd.h #define USB_ETDDMABUFPTR(x) (0xa00 + ((x) * 4)) x 191 drivers/usb/host/imx21-hcd.h #define USB_EPDMABUFPTR(x) (0xa80 + ((x) * 4)) x 193 drivers/usb/host/imx21-hcd.h #define USB_ETD_DWORD(x, w) (0x200 + ((x) * 16) + ((w) * 4)) x 236 drivers/usb/host/imx21-hcd.h #define USBCTRL_OTG_BYP_VAL(x) ((x) << 10) x 237 drivers/usb/host/imx21-hcd.h #define USBCTRL_HOST1_BYP_VAL(x) ((x) << 8) x 167 drivers/usb/host/ohci-omap.c #define omap_1510_local_bus_power(x) {} x 71 drivers/usb/host/ohci-pxa27x.c #define UHCRHDA_POTPGT(x) \ x 72 drivers/usb/host/ohci-pxa27x.c (((x) & 0xff) << 24) /* Power On To Power Good Time */ x 592 drivers/usb/host/ohci.h static inline __hc16 cpu_to_hc16 (const struct ohci_hcd *ohci, const u16 x) x 595 drivers/usb/host/ohci.h (__force __hc16)cpu_to_be16(x) : x 596 drivers/usb/host/ohci.h (__force __hc16)cpu_to_le16(x); x 599 drivers/usb/host/ohci.h static inline __hc16 cpu_to_hc16p (const struct ohci_hcd *ohci, const u16 *x) x 602 drivers/usb/host/ohci.h cpu_to_be16p(x) : x 603 drivers/usb/host/ohci.h cpu_to_le16p(x); x 606 drivers/usb/host/ohci.h static inline __hc32 cpu_to_hc32 (const struct ohci_hcd *ohci, const u32 x) x 609 drivers/usb/host/ohci.h (__force __hc32)cpu_to_be32(x) : x 610 drivers/usb/host/ohci.h (__force __hc32)cpu_to_le32(x); x 613 drivers/usb/host/ohci.h static inline __hc32 cpu_to_hc32p (const struct ohci_hcd *ohci, const u32 *x) x 616 drivers/usb/host/ohci.h cpu_to_be32p(x) : x 617 drivers/usb/host/ohci.h cpu_to_le32p(x); x 621 drivers/usb/host/ohci.h static inline u16 hc16_to_cpu (const struct ohci_hcd *ohci, const __hc16 x) x 624 drivers/usb/host/ohci.h be16_to_cpu((__force __be16)x) : x 625 drivers/usb/host/ohci.h le16_to_cpu((__force __le16)x); x 628 drivers/usb/host/ohci.h static inline u16 hc16_to_cpup (const struct ohci_hcd *ohci, const __hc16 *x) x 631 drivers/usb/host/ohci.h be16_to_cpup((__force __be16 *)x) : x 632 drivers/usb/host/ohci.h le16_to_cpup((__force __le16 *)x); x 635 drivers/usb/host/ohci.h static inline u32 hc32_to_cpu (const struct ohci_hcd *ohci, const __hc32 x) x 638 drivers/usb/host/ohci.h be32_to_cpu((__force __be32)x) : x 639 drivers/usb/host/ohci.h le32_to_cpu((__force __le32)x); x 642 drivers/usb/host/ohci.h static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x) x 645 drivers/usb/host/ohci.h be32_to_cpup((__force __be32 *)x) : x 646 drivers/usb/host/ohci.h le32_to_cpup((__force __le32 *)x); x 183 drivers/usb/host/oxu210hp-hcd.c #define PORT_USB11(x) (((x)&(3<<10)) == (1<<10)) /* USB 1.1 device */ x 207 drivers/usb/host/oxu210hp-hcd.c #define DBGP_ERRCODE(x) (((x)>>7)&0x07) x 213 drivers/usb/host/oxu210hp-hcd.c #define DBGP_LEN(x) (((x)>>0)&0x0f) x 215 drivers/usb/host/oxu210hp-hcd.c #define DBGP_PID_GET(x) (((x)>>16)&0xff) x 686 drivers/usb/host/uhci-hcd.h static inline __hc32 cpu_to_hc32(const struct uhci_hcd *uhci, const u32 x) x 689 drivers/usb/host/uhci-hcd.h ? (__force __hc32)cpu_to_be32(x) x 690 drivers/usb/host/uhci-hcd.h : (__force __hc32)cpu_to_le32(x); x 694 drivers/usb/host/uhci-hcd.h static inline u32 hc32_to_cpu(const struct uhci_hcd *uhci, const __hc32 x) x 697 drivers/usb/host/uhci-hcd.h ? be32_to_cpu((__force __be32)x) x 698 drivers/usb/host/uhci-hcd.h : le32_to_cpu((__force __le32)x); x 703 drivers/usb/host/uhci-hcd.h static inline __hc32 cpu_to_hc32(const struct uhci_hcd *uhci, const u32 x) x 705 drivers/usb/host/uhci-hcd.h return cpu_to_le32(x); x 709 drivers/usb/host/uhci-hcd.h static inline u32 hc32_to_cpu(const struct uhci_hcd *uhci, const __hc32 x) x 711 drivers/usb/host/uhci-hcd.h return le32_to_cpu(x); x 80 drivers/usb/host/uhci-hub.c #define CLR_RH_PORTSTAT(x) \ x 83 drivers/usb/host/uhci-hub.c status &= ~(x); \ x 84 drivers/usb/host/uhci-hub.c status |= RWC_BITS & (x); \ x 87 drivers/usb/host/uhci-hub.c #define SET_RH_PORTSTAT(x) \ x 89 drivers/usb/host/uhci-hub.c status |= (x); \ x 121 drivers/usb/host/xhci-debugfs.h static inline void xhci_debugfs_create_slot(struct xhci_hcd *x, int s) { } x 122 drivers/usb/host/xhci-debugfs.h static inline void xhci_debugfs_remove_slot(struct xhci_hcd *x, int s) { } x 62 drivers/usb/host/xhci-mtk.c #define WC1_IS_C(x) (((x) & 0xf) << 26) /* cycle debounce */ x 22 drivers/usb/host/xhci-plat.h #define xhci_to_priv(x) ((struct xhci_plat_priv *)(x)->priv) x 261 drivers/usb/host/xhci.h #define ENABLE_DEV_NOTE(x) (1 << (x)) x 566 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_MAJOR(x) (((x) >> 24) & 0xff) x 567 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_MINOR(x) (((x) >> 16) & 0xff) x 568 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_PSIC(x) (((x) >> 28) & 0x0f) x 569 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_OFF(x) ((x) & 0xff) x 570 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_COUNT(x) (((x) >> 8) & 0xff) x 572 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_PSIV(x) (((x) >> 0) & 0x0f) x 573 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_PSIE(x) (((x) >> 4) & 0x03) x 574 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_PLT(x) (((x) >> 6) & 0x03) x 575 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_PFD(x) (((x) >> 8) & 0x01) x 576 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_LP(x) (((x) >> 14) & 0x03) x 577 drivers/usb/host/xhci.h #define XHCI_EXT_PORT_PSIM(x) (((x) >> 16) & 0xffff) x 815 drivers/usb/host/xhci.h #define DROP_EP(x) (0x1 << x) x 817 drivers/usb/host/xhci.h #define ADD_EP(x) (0x1 << x) x 1494 drivers/usb/host/xhci.h #define TRB_TYPE_LINK(x) (((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) x 1496 drivers/usb/host/xhci.h #define TRB_TYPE_LINK_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ x 1498 drivers/usb/host/xhci.h #define TRB_TYPE_NOOP_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ x 169 drivers/usb/image/microtek.c #define MTS_WARNING(x...) \ x 170 drivers/usb/image/microtek.c printk( KERN_WARNING MTS_NAME x ) x 171 drivers/usb/image/microtek.c #define MTS_ERROR(x...) \ x 172 drivers/usb/image/microtek.c printk( KERN_ERR MTS_NAME x ) x 173 drivers/usb/image/microtek.c #define MTS_INT_ERROR(x...) \ x 174 drivers/usb/image/microtek.c MTS_ERROR(x) x 175 drivers/usb/image/microtek.c #define MTS_MESSAGE(x...) \ x 176 drivers/usb/image/microtek.c printk( KERN_INFO MTS_NAME x ) x 180 drivers/usb/image/microtek.c #define MTS_DEBUG(x...) \ x 181 drivers/usb/image/microtek.c printk( KERN_DEBUG MTS_NAME x ) x 195 drivers/usb/image/microtek.c #define MTS_DEBUG(x...) MTS_NUL_STATEMENT x 521 drivers/usb/image/microtek.c #define MTS_DIRECTION_IS_IN(x) ((mts_direction[x>>3] >> (x & 7)) & 1) x 72 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW0_VALID(x) ((x) & 0x01) x 73 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW0_LENGTH(x) (((u32) x) << 3) x 74 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW0_MAXPACKET(x) (((u32) x) << 18) x 75 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW0_MULTI(x) (((u32) x) << 29) x 76 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW0_ENDPOINT(x) (((u32) x) << 31) x 78 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3) x 79 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW1_PID_TOKEN(x) (((u32) x) << 10) x 84 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW1_PORT_NUM(x) (((u32) x) << 18) x 85 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW1_HUB_NUM(x) (((u32) x) << 25) x 87 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8) x 88 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW2_RL(x) ((x) << 25) x 89 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW2_RL(x) (((x) >> 25) & 0xf) x 91 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff) x 92 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff) x 93 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW3_NAKCOUNT(x) ((x) << 19) x 94 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf) x 95 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW3_CERR(x) ((x) << 23) x 96 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW3_CERR(x) (((x) >> 23) & 0x3) x 97 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW3_DATA_TOGGLE(x) ((x) << 25) x 98 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1) x 99 drivers/usb/isp1760/isp1760-hcd.c #define TO_DW3_PING(x) ((x) << 26) x 100 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW3_PING(x) (((x) >> 26) & 0x1) x 105 drivers/usb/isp1760/isp1760-hcd.c #define FROM_DW3_ACTIVE(x) (((x) >> 31) & 0x01) x 51 drivers/usb/isp1760/isp1760-regs.h #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */ x 97 drivers/usb/isp1760/isp1760-regs.h #define ISP_BANK(x) ((x) << 16) x 2906 drivers/usb/misc/sisusbvga/sisusb.c struct sisusb_info x; x 2926 drivers/usb/misc/sisusbvga/sisusb.c if (put_user(sizeof(x), argp)) x 2933 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_id = SISUSB_ID; x 2934 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_version = SISUSB_VERSION; x 2935 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_revision = SISUSB_REVISION; x 2936 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_patchlevel = SISUSB_PATCHLEVEL; x 2937 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_gfxinit = sisusb->gfxinit; x 2938 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_vrambase = SISUSB_PCI_PSEUDO_MEMBASE; x 2939 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_mmiobase = SISUSB_PCI_PSEUDO_MMIOBASE; x 2940 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_iobase = SISUSB_PCI_PSEUDO_IOPORTBASE; x 2941 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_pcibase = SISUSB_PCI_PSEUDO_PCIBASE; x 2942 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_vramsize = sisusb->vramsize; x 2943 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_minor = sisusb->minor; x 2944 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_fbdevactive = 0; x 2946 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_conactive = sisusb->haveconsole ? 1 : 0; x 2948 drivers/usb/misc/sisusbvga/sisusb.c x.sisusb_conactive = 0; x 2950 drivers/usb/misc/sisusbvga/sisusb.c memset(x.sisusb_reserved, 0, sizeof(x.sisusb_reserved)); x 2952 drivers/usb/misc/sisusbvga/sisusb.c if (copy_to_user((void __user *)arg, &x, sizeof(x))) x 349 drivers/usb/misc/sisusbvga/sisusb_con.c const struct vc_data *c, unsigned int x, unsigned int y) x 351 drivers/usb/misc/sisusbvga/sisusb_con.c return (u16 *)c->vc_origin + y * sisusb->sisusb_num_columns + x; x 355 drivers/usb/misc/sisusbvga/sisusb_con.c const struct vc_data *c, unsigned int x, unsigned int y) x 360 drivers/usb/misc/sisusbvga/sisusb_con.c offset += 2 * (y * sisusb->sisusb_num_columns + x); x 367 drivers/usb/misc/sisusbvga/sisusb_con.c sisusbcon_putc(struct vc_data *c, int ch, int y, int x) x 381 drivers/usb/misc/sisusbvga/sisusb_con.c sisusb_copy_memory(sisusb, sisusb_vaddr(sisusb, c, x, y), x 382 drivers/usb/misc/sisusbvga/sisusb_con.c sisusb_haddr(sisusb, c, x, y), 2); x 390 drivers/usb/misc/sisusbvga/sisusb_con.c int count, int y, int x) x 404 drivers/usb/misc/sisusbvga/sisusb_con.c memcpy(sisusb_vaddr(sisusb, c, x, y), s, count * 2); x 411 drivers/usb/misc/sisusbvga/sisusb_con.c sisusb_copy_memory(sisusb, sisusb_vaddr(sisusb, c, x, y), x 412 drivers/usb/misc/sisusbvga/sisusb_con.c sisusb_haddr(sisusb, c, x, y), count * 2); x 419 drivers/usb/misc/sisusbvga/sisusb_con.c sisusbcon_clear(struct vc_data *c, int y, int x, int height, int width) x 439 drivers/usb/misc/sisusbvga/sisusb_con.c dest = sisusb_vaddr(sisusb, c, x, y); x 446 drivers/usb/misc/sisusbvga/sisusb_con.c if (x == 0 && width >= c->vc_cols) { x 462 drivers/usb/misc/sisusbvga/sisusb_con.c length = ((height * cols) - x - (cols - width - x)) * 2; x 465 drivers/usb/misc/sisusbvga/sisusb_con.c sisusb_copy_memory(sisusb, sisusb_vaddr(sisusb, c, x, y), x 466 drivers/usb/misc/sisusbvga/sisusb_con.c sisusb_haddr(sisusb, c, x, y), length); x 65 drivers/usb/mon/mon_bin.c #define CHUNK_ALIGN(x) (((x)+CHUNK_SIZE-1) & ~(CHUNK_SIZE-1)) x 23 drivers/usb/mtu3/mtu3_host.c #define WC1_IS_C(x) (((x) & 0xf) << 26) /* cycle debounce */ x 107 drivers/usb/mtu3/mtu3_hw_regs.h #define EPRISR(x) (BIT(16) << (x)) x 109 drivers/usb/mtu3/mtu3_hw_regs.h #define EPTISR(x) (BIT(0) << (x)) x 122 drivers/usb/mtu3/mtu3_hw_regs.h #define EP0_MAXPKTSZ(x) ((x) & EP0_MAXPKTSZ_MSK) x 133 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_TXMAXPKTSZ(x) ((x) & TX_TXMAXPKTSZ_MSK) x 137 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_MAX_PKT_G2(x) (((x) & 0x7f) << 24) x 138 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_MULT_G2(x) (((x) & 0x7) << 21) x 139 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_MULT_OG(x) (((x) & 0x3) << 22) x 140 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_MAX_PKT_OG(x) (((x) & 0x3f) << 16) x 141 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_SLOT(x) (((x) & 0x3f) << 8) x 142 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_TYPE(x) (((x) & 0x3) << 4) x 143 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_SS_BURST(x) (((x) & 0xf) << 0) x 144 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_MULT(g2c, x) \ x 146 drivers/usb/mtu3/mtu3_hw_regs.h typeof(x) x_ = (x); \ x 149 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_MAX_PKT(g2c, x) \ x 151 drivers/usb/mtu3/mtu3_hw_regs.h typeof(x) x_ = (x); \ x 162 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_BINTERVAL(x) (((x) & 0xff) << 24) x 163 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_FIFOSEGSIZE(x) (((x) & 0xf) << 16) x 164 drivers/usb/mtu3/mtu3_hw_regs.h #define TX_FIFOADDR(x) (((x) & 0x1fff) << 0) x 172 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_RXMAXPKTSZ(x) ((x) & RX_RXMAXPKTSZ_MSK) x 176 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_MAX_PKT_G2(x) (((x) & 0x7f) << 24) x 177 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_MULT_G2(x) (((x) & 0x7) << 21) x 178 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_MULT_OG(x) (((x) & 0x3) << 22) x 179 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_MAX_PKT_OG(x) (((x) & 0x3f) << 16) x 180 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_SLOT(x) (((x) & 0x3f) << 8) x 181 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_TYPE(x) (((x) & 0x3) << 4) x 182 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_SS_BURST(x) (((x) & 0xf) << 0) x 183 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_MULT(g2c, x) \ x 185 drivers/usb/mtu3/mtu3_hw_regs.h typeof(x) x_ = (x); \ x 188 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_MAX_PKT(g2c, x) \ x 190 drivers/usb/mtu3/mtu3_hw_regs.h typeof(x) x_ = (x); \ x 195 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_BINTERVAL(x) (((x) & 0xff) << 24) x 196 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_FIFOSEGSIZE(x) (((x) & 0xf) << 16) x 197 drivers/usb/mtu3/mtu3_hw_regs.h #define RX_FIFOADDR(x) (((x) & 0x1fff) << 0) x 200 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_RX_CS_EN(x) (BIT(16) << (x)) x 201 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_TX_CS_EN(x) (BIT(0) << (x)) x 205 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_TX_ZLP(x) (BIT(0) << (x)) x 208 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_RX_COZ(x) (BIT(16) << (x)) x 209 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_RX_ZLP(x) (BIT(0) << (x)) x 213 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_LAST_DONE_PTR_HI(x) (((x) >> 16) & 0xf) x 214 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_CUR_GPD_ADDR_HI(x) (((x) >> 8) & 0xf) x 216 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_START_ADDR_HI(x) (((x) & 0xf) << 0) x 226 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_RX_DONE_INT(x) (BIT(16) << (x)) x 227 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_TX_DONE_INT(x) (BIT(0) << (x)) x 239 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_TX_LEN_ERR(x) (BIT(16) << (x)) x 240 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_TX_CS_ERR(x) (BIT(0) << (x)) x 243 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_RX_LEN_ERR(x) (BIT(16) << (x)) x 244 drivers/usb/mtu3/mtu3_hw_regs.h #define QMU_RX_CS_ERR(x) (BIT(0) << (x)) x 250 drivers/usb/mtu3/mtu3_hw_regs.h #define CAP_RX_EP_NUM(x) (((x) >> 8) & 0x1f) x 251 drivers/usb/mtu3/mtu3_hw_regs.h #define CAP_TX_EP_NUM(x) ((x) & 0x1f) x 271 drivers/usb/mtu3/mtu3_hw_regs.h #define DEV_ADDR(x) ((0x7f & (x)) << 24) x 275 drivers/usb/mtu3/mtu3_hw_regs.h #define SSUSB_DEV_SPEED(x) ((x) & 0x7) x 312 drivers/usb/mtu3/mtu3_hw_regs.h #define LTSSM_STATE(x) ((x) & 0x1f) x 349 drivers/usb/mtu3/mtu3_hw_regs.h #define DEV_U2_INACT_TIMEOUT_VALUE(x) (((x) & 0xff) << 16) x 352 drivers/usb/mtu3/mtu3_hw_regs.h #define U1_INACT_TIMEOUT_VALUE(x) ((x) & 0xff) x 388 drivers/usb/mtu3/mtu3_hw_regs.h #define LPM_MODE(x) (((x) & 0x3) << 8) x 425 drivers/usb/mtu3/mtu3_hw_regs.h #define LPM_BESLCK_U3(x) (((x) & 0xf) << 12) x 426 drivers/usb/mtu3/mtu3_hw_regs.h #define LPM_BESLCK(x) (((x) & 0xf) << 8) x 427 drivers/usb/mtu3/mtu3_hw_regs.h #define LPM_BESLDCK(x) (((x) & 0xf) << 4) x 493 drivers/usb/mtu3/mtu3_hw_regs.h #define SSUSB_IP_XHCI_U2_PORT_NUM(x) (((x) >> 8) & 0xff) x 494 drivers/usb/mtu3/mtu3_hw_regs.h #define SSUSB_IP_XHCI_U3_PORT_NUM(x) ((x) & 0xff) x 497 drivers/usb/mtu3/mtu3_hw_regs.h #define SSUSB_IP_DEV_U3_PORT_NUM(x) ((x) & 0xff) x 524 drivers/usb/mtu3/mtu3_hw_regs.h #define IP_TRUNK_VERS(x) (((x) >> 16) & 0xffff) x 36 drivers/usb/mtu3/mtu3_qmu.c #define GPD_RX_BUF_LEN_OG(x) (((x) & 0xffff) << 16) x 37 drivers/usb/mtu3/mtu3_qmu.c #define GPD_RX_BUF_LEN_EL(x) (((x) & 0xfffff) << 12) x 38 drivers/usb/mtu3/mtu3_qmu.c #define GPD_RX_BUF_LEN(mtu, x) \ x 40 drivers/usb/mtu3/mtu3_qmu.c typeof(x) x_ = (x); \ x 44 drivers/usb/mtu3/mtu3_qmu.c #define GPD_DATA_LEN_OG(x) ((x) & 0xffff) x 45 drivers/usb/mtu3/mtu3_qmu.c #define GPD_DATA_LEN_EL(x) ((x) & 0xfffff) x 46 drivers/usb/mtu3/mtu3_qmu.c #define GPD_DATA_LEN(mtu, x) \ x 48 drivers/usb/mtu3/mtu3_qmu.c typeof(x) x_ = (x); \ x 53 drivers/usb/mtu3/mtu3_qmu.c #define GPD_EXT_NGP_OG(x) (((x) & 0xf) << 20) x 54 drivers/usb/mtu3/mtu3_qmu.c #define GPD_EXT_BUF_OG(x) (((x) & 0xf) << 16) x 55 drivers/usb/mtu3/mtu3_qmu.c #define GPD_EXT_NGP_EL(x) (((x) & 0xf) << 28) x 56 drivers/usb/mtu3/mtu3_qmu.c #define GPD_EXT_BUF_EL(x) (((x) & 0xf) << 24) x 57 drivers/usb/mtu3/mtu3_qmu.c #define GPD_EXT_NGP(mtu, x) \ x 59 drivers/usb/mtu3/mtu3_qmu.c typeof(x) x_ = (x); \ x 63 drivers/usb/mtu3/mtu3_qmu.c #define GPD_EXT_BUF(mtu, x) \ x 65 drivers/usb/mtu3/mtu3_qmu.c typeof(x) x_ = (x); \ x 32 drivers/usb/musb/musb_core.h #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) x 33 drivers/usb/musb/musb_core.h #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) x 13 drivers/usb/musb/musb_cppi41.c #define RNDIS_REG(x) (0x80 + ((x - 1) * 4)) x 324 drivers/usb/musb/tusb6010.c static int tusb_draw_power(struct usb_phy *x, unsigned mA) x 340 drivers/usb/musb/tusb6010.c if (x->otg->default_a || mA < (musb->min_power << 1)) x 144 drivers/usb/phy/phy-ab8500-usb.c static inline struct ab8500_usb *phy_to_ab(struct usb_phy *x) x 146 drivers/usb/phy/phy-ab8500-usb.c return container_of(x, struct ab8500_usb, phy); x 603 drivers/usb/phy/phy-ab8500-usb.c static int ab8500_usb_set_suspend(struct usb_phy *x, int suspend) x 47 drivers/usb/phy/phy-generic.c static int nop_set_suspend(struct usb_phy *x, int suspend) x 49 drivers/usb/phy/phy-generic.c struct usb_phy_generic *nop = dev_get_drvdata(x->dev); x 38 drivers/usb/phy/phy-mxs-usb.c #define GM_USBPHY_TX_TXCAL45DP(x) (((x) & 0xf) << 16) x 39 drivers/usb/phy/phy-mxs-usb.c #define GM_USBPHY_TX_TXCAL45DN(x) (((x) & 0xf) << 8) x 40 drivers/usb/phy/phy-mxs-usb.c #define GM_USBPHY_TX_D_CAL(x) (((x) & 0xf) << 0) x 484 drivers/usb/phy/phy-mxs-usb.c static int mxs_phy_suspend(struct usb_phy *x, int suspend) x 487 drivers/usb/phy/phy-mxs-usb.c struct mxs_phy *mxs_phy = to_mxs_phy(x); x 505 drivers/usb/phy/phy-mxs-usb.c writel(0xffbfffff, x->io_priv + HW_USBPHY_PWD); x 507 drivers/usb/phy/phy-mxs-usb.c writel(0xffffffff, x->io_priv + HW_USBPHY_PWD); x 510 drivers/usb/phy/phy-mxs-usb.c x->io_priv + HW_USBPHY_CTRL_SET); x 518 drivers/usb/phy/phy-mxs-usb.c x->io_priv + HW_USBPHY_CTRL_CLR); x 519 drivers/usb/phy/phy-mxs-usb.c writel(0, x->io_priv + HW_USBPHY_PWD); x 525 drivers/usb/phy/phy-mxs-usb.c static int mxs_phy_set_wakeup(struct usb_phy *x, bool enabled) x 527 drivers/usb/phy/phy-mxs-usb.c struct mxs_phy *mxs_phy = to_mxs_phy(x); x 533 drivers/usb/phy/phy-mxs-usb.c writel_relaxed(value, x->io_priv + HW_USBPHY_CTRL_SET); x 535 drivers/usb/phy/phy-mxs-usb.c writel_relaxed(value, x->io_priv + HW_USBPHY_CTRL_CLR); x 571 drivers/usb/phy/phy-mxs-usb.c static int mxs_charger_data_contact_detect(struct mxs_phy *x) x 573 drivers/usb/phy/phy-mxs-usb.c struct regmap *regmap = x->regmap_anatop; x 580 drivers/usb/phy/phy-mxs-usb.c dev_err(x->phy.dev, "vbus is not valid\n"); x 612 drivers/usb/phy/phy-mxs-usb.c dev_err(x->phy.dev, x 624 drivers/usb/phy/phy-mxs-usb.c static enum usb_charger_type mxs_charger_primary_detection(struct mxs_phy *x) x 626 drivers/usb/phy/phy-mxs-usb.c struct regmap *regmap = x->regmap_anatop; x 645 drivers/usb/phy/phy-mxs-usb.c dev_dbg(x->phy.dev, "It is a standard downstream port\n"); x 660 drivers/usb/phy/phy-mxs-usb.c static enum usb_charger_type mxs_charger_secondary_detection(struct mxs_phy *x) x 662 drivers/usb/phy/phy-mxs-usb.c struct regmap *regmap = x->regmap_anatop; x 669 drivers/usb/phy/phy-mxs-usb.c dev_dbg(x->phy.dev, "It is a dedicate charging port\n"); x 672 drivers/usb/phy/phy-mxs-usb.c dev_dbg(x->phy.dev, "It is a charging downstream port\n"); x 35 drivers/usb/phy/phy-tegra-usb.c #define TEGRA_USB_PORTSC1_PTS(x) (((x) & 0x3) << 30) x 40 drivers/usb/phy/phy-tegra-usb.c #define TEGRA_USB_HOSTPC1_DEVLC_PTS(x) (((x) & 0x7) << 29) x 56 drivers/usb/phy/phy-tegra-usb.c #define USB_WAKEUP_DEBOUNCE_COUNT(x) (((x) & 0x7) << 16) x 73 drivers/usb/phy/phy-tegra-usb.c #define ULPI_DATA_TRIMMER_SEL(x) (((x) & 0x7) << 1) x 75 drivers/usb/phy/phy-tegra-usb.c #define ULPI_STPDIRNXT_TRIMMER_SEL(x) (((x) & 0x7) << 17) x 77 drivers/usb/phy/phy-tegra-usb.c #define ULPI_DIR_TRIMMER_SEL(x) (((x) & 0x7) << 25) x 80 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XTAL_FREQ_COUNT(x) (((x) & 0xfff) << 0) x 81 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_PLLU_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 27) x 84 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XCVR_SETUP(x) (((x) & 0xf) << 0) x 85 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XCVR_SETUP_MSB(x) ((((x) & 0x70) >> 4) << 22) x 86 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XCVR_LSRSLEW(x) (((x) & 0x3) << 8) x 87 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XCVR_LSFSLEW(x) (((x) & 0x3) << 10) x 92 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XCVR_HSSLEW(x) (((x) & 0x3) << 4) x 93 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XCVR_HSSLEW_MSB(x) ((((x) & 0x1fc) >> 2) << 25) x 98 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_HSSQUELCH_LEVEL(x) (((x) & 0x3) << 0) x 99 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_HSDISCON_LEVEL(x) (((x) & 0x3) << 2) x 100 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_HSDISCON_LEVEL_MSB(x) ((((x) & 0x4) >> 2) << 24) x 103 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_ELASTIC_LIMIT(x) (((x) & 0x1f) << 10) x 104 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_IDLE_WAIT(x) (((x) & 0x1f) << 15) x 107 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_HS_SYNC_START_DLY(x) (((x) & 0x1f) << 1) x 115 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_DPDM_OBSERVE_SEL(x) (((x) & 0xf) << 27) x 123 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_PLL_ACTIVE_DLY_COUNT(x) (((x) & 0x1f) << 18) x 124 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_PLLU_STABLE_COUNT(x) (((x) & 0xfff) << 6) x 127 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_BIAS_DEBOUNCE_A(x) (((x) & 0xffff) << 0) x 139 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_XCVR_TERM_RANGE_ADJ(x) (((x) & 0xf) << 18) x 142 drivers/usb/phy/phy-tegra-usb.c #define UTMIP_BIAS_PDTRK_COUNT(x) (((x) & 0x1f) << 3) x 791 drivers/usb/phy/phy-tegra-usb.c static int tegra_usb_phy_suspend(struct usb_phy *x, int suspend) x 793 drivers/usb/phy/phy-tegra-usb.c struct tegra_usb_phy *phy = container_of(x, struct tegra_usb_phy, u_phy); x 894 drivers/usb/phy/phy-tegra-usb.c void tegra_usb_phy_preresume(struct usb_phy *x) x 896 drivers/usb/phy/phy-tegra-usb.c struct tegra_usb_phy *phy = container_of(x, struct tegra_usb_phy, u_phy); x 903 drivers/usb/phy/phy-tegra-usb.c void tegra_usb_phy_postresume(struct usb_phy *x) x 905 drivers/usb/phy/phy-tegra-usb.c struct tegra_usb_phy *phy = container_of(x, struct tegra_usb_phy, u_phy); x 912 drivers/usb/phy/phy-tegra-usb.c void tegra_ehci_phy_restore_start(struct usb_phy *x, x 915 drivers/usb/phy/phy-tegra-usb.c struct tegra_usb_phy *phy = container_of(x, struct tegra_usb_phy, u_phy); x 922 drivers/usb/phy/phy-tegra-usb.c void tegra_ehci_phy_restore_end(struct usb_phy *x) x 924 drivers/usb/phy/phy-tegra-usb.c struct tegra_usb_phy *phy = container_of(x, struct tegra_usb_phy, u_phy); x 100 drivers/usb/phy/phy-twl6030-usb.c #define comparator_to_twl(x) container_of((x), struct twl6030_usb, comparator) x 17 drivers/usb/phy/phy-ulpi-viewport.c #define ULPI_VIEW_ADDR(x) (((x) & 0xff) << 16) x 18 drivers/usb/phy/phy-ulpi-viewport.c #define ULPI_VIEW_DATA_READ(x) (((x) >> 8) & 0xff) x 19 drivers/usb/phy/phy-ulpi-viewport.c #define ULPI_VIEW_DATA_WRITE(x) ((x) & 0xff) x 315 drivers/usb/phy/phy.c static int usb_add_extcon(struct usb_phy *x) x 319 drivers/usb/phy/phy.c if (of_property_read_bool(x->dev->of_node, "extcon")) { x 320 drivers/usb/phy/phy.c x->edev = extcon_get_edev_by_phandle(x->dev, 0); x 321 drivers/usb/phy/phy.c if (IS_ERR(x->edev)) x 322 drivers/usb/phy/phy.c return PTR_ERR(x->edev); x 324 drivers/usb/phy/phy.c x->id_edev = extcon_get_edev_by_phandle(x->dev, 1); x 325 drivers/usb/phy/phy.c if (IS_ERR(x->id_edev)) { x 326 drivers/usb/phy/phy.c x->id_edev = NULL; x 327 drivers/usb/phy/phy.c dev_info(x->dev, "No separate ID extcon device\n"); x 330 drivers/usb/phy/phy.c if (x->vbus_nb.notifier_call) { x 331 drivers/usb/phy/phy.c ret = devm_extcon_register_notifier(x->dev, x->edev, x 333 drivers/usb/phy/phy.c &x->vbus_nb); x 335 drivers/usb/phy/phy.c dev_err(x->dev, x 340 drivers/usb/phy/phy.c x->type_nb.notifier_call = usb_phy_get_charger_type; x 342 drivers/usb/phy/phy.c ret = devm_extcon_register_notifier(x->dev, x->edev, x 344 drivers/usb/phy/phy.c &x->type_nb); x 346 drivers/usb/phy/phy.c dev_err(x->dev, x 351 drivers/usb/phy/phy.c ret = devm_extcon_register_notifier(x->dev, x->edev, x 353 drivers/usb/phy/phy.c &x->type_nb); x 355 drivers/usb/phy/phy.c dev_err(x->dev, x 360 drivers/usb/phy/phy.c ret = devm_extcon_register_notifier(x->dev, x->edev, x 362 drivers/usb/phy/phy.c &x->type_nb); x 364 drivers/usb/phy/phy.c dev_err(x->dev, x 369 drivers/usb/phy/phy.c ret = devm_extcon_register_notifier(x->dev, x->edev, x 371 drivers/usb/phy/phy.c &x->type_nb); x 373 drivers/usb/phy/phy.c dev_err(x->dev, x 379 drivers/usb/phy/phy.c if (x->id_nb.notifier_call) { x 382 drivers/usb/phy/phy.c if (x->id_edev) x 383 drivers/usb/phy/phy.c id_ext = x->id_edev; x 385 drivers/usb/phy/phy.c id_ext = x->edev; x 387 drivers/usb/phy/phy.c ret = devm_extcon_register_notifier(x->dev, id_ext, x 389 drivers/usb/phy/phy.c &x->id_nb); x 391 drivers/usb/phy/phy.c dev_err(x->dev, x 398 drivers/usb/phy/phy.c if (x->type_nb.notifier_call) x 399 drivers/usb/phy/phy.c __usb_phy_get_charger_type(x); x 595 drivers/usb/phy/phy.c void usb_put_phy(struct usb_phy *x) x 597 drivers/usb/phy/phy.c if (x) { x 598 drivers/usb/phy/phy.c struct module *owner = x->dev->driver->owner; x 600 drivers/usb/phy/phy.c put_device(x->dev); x 615 drivers/usb/phy/phy.c int usb_add_phy(struct usb_phy *x, enum usb_phy_type type) x 621 drivers/usb/phy/phy.c if (x->type != USB_PHY_TYPE_UNDEFINED) { x 622 drivers/usb/phy/phy.c dev_err(x->dev, "not accepting initialized PHY %s\n", x->label); x 626 drivers/usb/phy/phy.c usb_charger_init(x); x 627 drivers/usb/phy/phy.c ret = usb_add_extcon(x); x 631 drivers/usb/phy/phy.c ATOMIC_INIT_NOTIFIER_HEAD(&x->notifier); x 638 drivers/usb/phy/phy.c dev_err(x->dev, "transceiver type %s already exists\n", x 644 drivers/usb/phy/phy.c x->type = type; x 645 drivers/usb/phy/phy.c list_add_tail(&x->head, &phy_list); x 661 drivers/usb/phy/phy.c int usb_add_phy_dev(struct usb_phy *x) x 666 drivers/usb/phy/phy.c if (!x->dev) { x 667 drivers/usb/phy/phy.c dev_err(x->dev, "no device provided for PHY\n"); x 671 drivers/usb/phy/phy.c usb_charger_init(x); x 672 drivers/usb/phy/phy.c ret = usb_add_extcon(x); x 676 drivers/usb/phy/phy.c ATOMIC_INIT_NOTIFIER_HEAD(&x->notifier); x 679 drivers/usb/phy/phy.c list_add_tail(&x->head, &phy_list); x 692 drivers/usb/phy/phy.c void usb_remove_phy(struct usb_phy *x) x 697 drivers/usb/phy/phy.c if (x) x 698 drivers/usb/phy/phy.c list_del(&x->head); x 709 drivers/usb/phy/phy.c void usb_phy_set_event(struct usb_phy *x, unsigned long event) x 711 drivers/usb/phy/phy.c x->last_event = event; x 238 drivers/usb/renesas_usbhs/common.h #define UPPHUB(x) (((x) & 0xF) << 11) /* HUB Register */ x 239 drivers/usb/renesas_usbhs/common.h #define HUBPORT(x) (((x) & 0x7) << 8) /* HUB Port for Target Device */ x 240 drivers/usb/renesas_usbhs/common.h #define USBSPD(x) (((x) & 0x3) << 6) /* Device Transfer Rate */ x 51 drivers/usb/serial/io_16654.h #define IS_REG_2ND_BANK(x) ((x) >= 8) x 647 drivers/usb/serial/io_usbvend.h #define TI_GET_CPU_REVISION(x) (__u8)((((x)>>4)&0x0f)) x 648 drivers/usb/serial/io_usbvend.h #define TI_GET_BOARD_REVISION(x) (__u8)(((x)&0x0f)) x 651 drivers/usb/serial/io_usbvend.h #define TI_GET_I2C_SIZE(x) ((((x) & TI_I2C_SIZE_MASK)+1)*256) x 1188 drivers/usb/serial/keyspan.c int i, len, x, err; x 1221 drivers/usb/serial/keyspan.c for (x = 1; x < len && i < urb->actual_length; ++x) x 1228 drivers/usb/serial/keyspan.c for (x = 0; x + 1 < len && x 1229 drivers/usb/serial/keyspan.c i + 1 < urb->actual_length; x += 2) { x 181 drivers/usb/serial/quatech2.c u16 x = ((u16) (data[1] << 8) | (u16) (data[0])); x 183 drivers/usb/serial/quatech2.c return qt2_control_msg(dev, QT_SET_GET_DEVICE, x, 0); x 322 drivers/usb/serial/quatech2.c u16 x = ((u16) (START_CHAR(tty) << 8) | (u16) (STOP_CHAR(tty))); x 325 drivers/usb/serial/quatech2.c x, port_priv->device_port); x 76 drivers/usb/serial/ssu100.c u16 x = ((u16)(data[1] << 8) | (u16)(data[0])); x 78 drivers/usb/serial/ssu100.c return ssu100_control_msg(dev, QT_SET_GET_DEVICE, x, 0); x 278 drivers/usb/serial/ssu100.c u16 x = ((u16)(START_CHAR(tty) << 8) | (u16)(STOP_CHAR(tty))); x 281 drivers/usb/serial/ssu100.c x, 0); x 39 drivers/usb/storage/debug.h #define US_DEBUG(x) x x 48 drivers/usb/storage/debug.h #define US_DEBUG(x) x 389 drivers/usb/storage/sddr09.c sddr09_readX(struct us_data *us, int x, unsigned long fromaddress, x 397 drivers/usb/storage/sddr09.c command[1] = LUNBITS | x; x 413 drivers/usb/storage/sddr09.c x, result); x 422 drivers/usb/storage/sddr09.c x, result); x 472 drivers/usb/storage/usb.c #define TOLOWER(x) ((x) | 0x20) x 2128 drivers/usb/typec/tcpm/tcpm.c #define min_power(x, y) min(pdo_max_power(x), pdo_max_power(y)) x 2129 drivers/usb/typec/tcpm/tcpm.c #define min_current(x, y) min(pdo_max_current(x), pdo_max_current(y)) x 2226 drivers/usb/typec/tcpm/tcpm.c #define min_pps_apdo_current(x, y) \ x 2227 drivers/usb/typec/tcpm/tcpm.c min(pdo_pps_apdo_max_current(x), pdo_pps_apdo_max_current(y)) x 112 drivers/usb/typec/ucsi/ucsi_ccg.c #define CCG_VERSION_PATCH(x) ((x) << 16) x 113 drivers/usb/typec/ucsi/ucsi_ccg.c #define CCG_VERSION(x) ((x) << 24) x 897 drivers/vhost/vhost.c #define vhost_put_user(vq, x, ptr) \ x 901 drivers/vhost/vhost.c ret = __put_user(x, ptr); \ x 907 drivers/vhost/vhost.c ret = __put_user(x, to); \ x 942 drivers/vhost/vhost.c #define vhost_get_user(vq, x, ptr, type) \ x 946 drivers/vhost/vhost.c ret = __get_user(x, ptr); \ x 953 drivers/vhost/vhost.c ret = __get_user(x, from); \ x 960 drivers/vhost/vhost.c #define vhost_get_avail(vq, x, ptr) \ x 961 drivers/vhost/vhost.c vhost_get_user(vq, x, ptr, VHOST_ADDR_AVAIL) x 963 drivers/vhost/vhost.c #define vhost_get_used(vq, x, ptr) \ x 964 drivers/vhost/vhost.c vhost_get_user(vq, x, ptr, VHOST_ADDR_USED) x 188 drivers/video/backlight/88pm860x_bl.c #define pm860x_backlight_dt_init(x, y, z) (-1) x 66 drivers/video/backlight/adp8860_bl.c #define ADP8860_DEVID(x) ((x) & 0xF) x 67 drivers/video/backlight/adp8860_bl.c #define ADP8860_MANID(x) ((x) >> 4) x 80 drivers/video/backlight/adp8870_bl.c #define ADP8870_DEVID(x) ((x) & 0xF) x 81 drivers/video/backlight/adp8870_bl.c #define ADP8870_MANID(x) ((x) >> 4) x 23 drivers/video/backlight/da903x_bl.c #define DA9030_WLED_TRIM(x) ((x) & 0x7) x 27 drivers/video/backlight/da903x_bl.c #define DA9034_WLED_ISET(x) ((x) & 0x1f) x 111 drivers/video/backlight/ili922x.c #define CHECK_FREQ_REG(s, x) \ x 114 drivers/video/backlight/ili922x.c ((struct spi_transfer *)x)->speed_hz = \ x 44 drivers/video/backlight/l4f00242t03.c #define param(x) ((x) | 0x100) x 24 drivers/video/backlight/ltv350qv.h #define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */ x 31 drivers/video/backlight/ltv350qv.h #define LTV_NL(x) (((x) & 0x001f) << 0) x 62 drivers/video/backlight/ltv350qv.h #define LTV_CLW(x) (((x) & 0x0007) << 12) x 73 drivers/video/backlight/ltv350qv.h #define LTV_FTI(x) (((x) & 0x0003) << 4) x 74 drivers/video/backlight/ltv350qv.h #define LTV_FWI(x) (((x) & 0x0003) << 0) x 77 drivers/video/backlight/ltv350qv.h #define LTV_SDT(x) (((x) & 0x0007) << 10) x 78 drivers/video/backlight/ltv350qv.h #define LTV_EQ(x) (((x) & 0x0007) << 2) x 84 drivers/video/backlight/ltv350qv.h #define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */ x 85 drivers/video/backlight/ltv350qv.h #define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */ x 89 drivers/video/backlight/ltv350qv.h #define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */ x 90 drivers/video/backlight/ltv350qv.h #define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */ x 22 drivers/video/backlight/max8925_bl.c #define LWX_FREQ(x) (((x - 601) / 100) & 0x7) x 41 drivers/video/backlight/tdo24m.c #define CMD0(x) ((0 << 30) | (x)) x 42 drivers/video/backlight/tdo24m.c #define CMD1(x, x1) ((1 << 30) | ((x) << 9) | 0x100 | (x1)) x 43 drivers/video/backlight/tdo24m.c #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\ x 177 drivers/video/backlight/tdo24m.c struct spi_transfer *x = &lcd->xfer; x 208 drivers/video/backlight/tdo24m.c x->len = nparams + 2; x 335 drivers/video/backlight/tdo24m.c struct spi_transfer *x; x 365 drivers/video/backlight/tdo24m.c x = &lcd->xfer; x 369 drivers/video/backlight/tdo24m.c x->cs_change = 0; x 370 drivers/video/backlight/tdo24m.c x->tx_buf = &lcd->buf[0]; x 371 drivers/video/backlight/tdo24m.c spi_message_add_tail(x, m); x 423 drivers/video/console/mdacon.c static inline u16 *mda_addr(unsigned int x, unsigned int y) x 425 drivers/video/console/mdacon.c return mda_vram_base + y * mda_num_columns + x; x 428 drivers/video/console/mdacon.c static void mdacon_putc(struct vc_data *c, int ch, int y, int x) x 430 drivers/video/console/mdacon.c scr_writew(mda_convert_attr(ch), mda_addr(x, y)); x 434 drivers/video/console/mdacon.c int count, int y, int x) x 436 drivers/video/console/mdacon.c u16 *dest = mda_addr(x, y); x 443 drivers/video/console/mdacon.c static void mdacon_clear(struct vc_data *c, int y, int x, x 446 drivers/video/console/mdacon.c u16 *dest = mda_addr(x, y); x 452 drivers/video/console/mdacon.c if (x==0 && width==mda_num_columns) { x 581 drivers/video/console/newport_con.c int count, x, y; x 604 drivers/video/console/newport_con.c x = 0; x 613 drivers/video/console/newport_con.c newport_putc(vc, chattr, y, x); x 617 drivers/video/console/newport_con.c if (++x == vc->vc_cols) { x 618 drivers/video/console/newport_con.c x = 0; x 624 drivers/video/console/newport_con.c x = 0; x 629 drivers/video/console/newport_con.c y, x); x 633 drivers/video/console/newport_con.c if (++x == vc->vc_cols) { x 634 drivers/video/console/newport_con.c x = 0; x 639 drivers/video/console/newport_con.c x = vc->vc_cols - 1; x 648 drivers/video/console/newport_con.c newport_putc(vc, chattr, y, x); x 652 drivers/video/console/newport_con.c if (x-- == 0) { x 653 drivers/video/console/newport_con.c x = vc->vc_cols - 1; x 659 drivers/video/console/newport_con.c x = 0; x 664 drivers/video/console/newport_con.c y, x); x 668 drivers/video/console/newport_con.c if (++x == vc->vc_cols) { x 669 drivers/video/console/newport_con.c x = 0; x 258 drivers/video/console/sticon.c int x, y; x 263 drivers/video/console/sticon.c x = offset % conp->vc_cols; x 267 drivers/video/console/sticon.c ret = pos + (conp->vc_cols - x) * 2; x 274 drivers/video/console/sticon.c x = offset % conp->vc_cols; x 276 drivers/video/console/sticon.c ret = pos + (conp->vc_cols - x) * 2; x 283 drivers/video/console/sticon.c x = y = 0; x 286 drivers/video/console/sticon.c if (px) *px = x; x 136 drivers/video/console/sticore.c sti_putc(struct sti_struct *sti, int c, int y, int x) x 144 drivers/video/console/sticore.c .dest_x = x * sti->font_width, x 311 drivers/video/console/sticore.c char *x; x 319 drivers/video/console/sticore.c if ((x = strchr(str, 'x')) || (x = strchr(str, '*'))) { x 321 drivers/video/console/sticore.c font_width[i] = simple_strtoul(x+1, NULL, 0); x 329 drivers/video/console/sticore.c if ((x = strchr(str, ','))) x 330 drivers/video/console/sticore.c *x++ = 0; x 331 drivers/video/console/sticore.c str = x; x 839 drivers/video/console/vgacon.c int x = c->vc_cols * VGA_FONTWIDTH; x 859 drivers/video/console/vgacon.c if ((vgacon_xres != x || vgacon_yres != y) && x 15 drivers/video/fbdev/acornfb.h #define EXTEND8(x) ((x)|(x)<<8) x 16 drivers/video/fbdev/acornfb.h #define EXTEND4(x) ((x)|(x)<<4|(x)<<8|(x)<<12) x 132 drivers/video/fbdev/acornfb.h #define VIDC20_ECTL_REG(x) ((x) & 0xf3) x 574 drivers/video/fbdev/amifb.c #define upx(x, v) (((v) + (x) - 1) & -(x)) x 575 drivers/video/fbdev/amifb.c #define downx(x, v) ((v) & -(x)) x 576 drivers/video/fbdev/amifb.c #define modx(x, v) ((v) & ((x) - 1)) x 588 drivers/video/fbdev/amifb.c #define highw(x) ((u_long)(x)>>16 & 0xffff) x 589 drivers/video/fbdev/amifb.c #define loww(x) ((u_long)(x) & 0xffff) x 639 drivers/video/fbdev/amifb.c #define CWAIT(x, y) (((y) & 0x1fe) << 23 | ((x) & 0x7f0) << 13 | 0x0001fffe) x 161 drivers/video/fbdev/arcfb.c unsigned int chipindex, unsigned char x) x 163 drivers/video/fbdev/arcfb.c ks108_writeb_ctl(par, chipindex, KS_SET_X|x); x 450 drivers/video/fbdev/arcfb.c unsigned int fbmemlength,x,y,w,h, bitppos, startpos, endpos, bitcount; x 483 drivers/video/fbdev/arcfb.c x = startpos % xres; x 487 drivers/video/fbdev/arcfb.c arcfb_lcd_update(par, x, y, w, h); x 182 drivers/video/fbdev/arkfb.c int x, y; x 191 drivers/video/fbdev/arkfb.c for (x = 0; x < image->width; x += 8) { x 208 drivers/video/fbdev/arkfb.c int x, y; x 215 drivers/video/fbdev/arkfb.c for (x = 0; x < rect->width; x += 8) { x 240 drivers/video/fbdev/arkfb.c int x, y; x 249 drivers/video/fbdev/arkfb.c for (x = 0; x < image->width; x += 8) { x 80 drivers/video/fbdev/atafb.c #define up(x, r) (((x) + (r) - 1) & ~((r)-1)) x 1438 drivers/video/fbdev/aty/aty128fb.c s32 x, b, p, ron, roff; x 1446 drivers/video/fbdev/aty/aty128fb.c x = round_div(n, d); x 1454 drivers/video/fbdev/aty/aty128fb.c x; x 1456 drivers/video/fbdev/aty/aty128fb.c DBG("x %x\n", x); x 1459 drivers/video/fbdev/aty/aty128fb.c while (x) { x 1460 drivers/video/fbdev/aty/aty128fb.c x >>= 1; x 1468 drivers/video/fbdev/aty/aty128fb.c x = round_div(n, d); x 1469 drivers/video/fbdev/aty/aty128fb.c roff = x * (fifo_depth - 4); x 1477 drivers/video/fbdev/aty/aty128fb.c p, m->Rloop, x, ron, roff); x 1479 drivers/video/fbdev/aty/aty128fb.c dsp->dda_config = p << 16 | m->Rloop << 20 | x; x 119 drivers/video/fbdev/aty/atyfb_base.c #define FAIL_MAX(msg, x, _max_) do { \ x 120 drivers/video/fbdev/aty/atyfb_base.c if (x > _max_) { \ x 122 drivers/video/fbdev/aty/atyfb_base.c printk(KERN_CRIT "atyfb: " msg " %x(%x)\n", x, _max_); \ x 189 drivers/video/fbdev/aty/mach64_accel.c static inline void draw_rect(s16 x, s16 y, u16 width, u16 height, x 194 drivers/video/fbdev/aty/mach64_accel.c aty_st_le32(DST_Y_X, (x << 16) | y, par); x 72 drivers/video/fbdev/aty/mach64_cursor.c int x, y, h; x 91 drivers/video/fbdev/aty/mach64_cursor.c x = cursor->image.dx - cursor->hot.x - info->var.xoffset; x 92 drivers/video/fbdev/aty/mach64_cursor.c if (x < 0) { x 93 drivers/video/fbdev/aty/mach64_cursor.c xoff = -x; x 94 drivers/video/fbdev/aty/mach64_cursor.c x = 0; x 121 drivers/video/fbdev/aty/mach64_cursor.c aty_st_le32(CUR_HORZ_VERT_POSN, ((u32) y << 16) | x, par); x 177 drivers/video/fbdev/bt431.h static inline void bt431_position_cursor(struct bt431_regs *regs, u16 x, u16 y) x 191 drivers/video/fbdev/bt431.h x += 412 - 52; x 196 drivers/video/fbdev/bt431.h bt431_write_reg_inc(regs, x & 0xff); /* BT431_REG_CXLO */ x 197 drivers/video/fbdev/bt431.h bt431_write_reg_inc(regs, (x >> 8) & 0x0f); /* BT431_REG_CXHI */ x 206 drivers/video/fbdev/bt431.h u16 x, y; x 213 drivers/video/fbdev/bt431.h for (x = 0; x < BT431_CURSOR_SIZE / 8; x++) { x 216 drivers/video/fbdev/bt431.h if (y < height && x < width) { x 163 drivers/video/fbdev/cg3.c #define D4M3(x) ((((x)>>2)<<1) + ((x)>>2)) /* (x/4)*3 */ x 164 drivers/video/fbdev/cg3.c #define D4M4(x) ((x)&~0x3) /* (x/4)*4 */ x 400 drivers/video/fbdev/cg6.c u32 x, y; x 423 drivers/video/fbdev/cg6.c x = image->dx; x 432 drivers/video/fbdev/cg6.c sbus_writel(x, &fbc->x0); x 433 drivers/video/fbdev/cg6.c sbus_writel(x + 32 - 1, &fbc->x1); x 442 drivers/video/fbdev/cg6.c x += 32; x 449 drivers/video/fbdev/cg6.c sbus_writel(x, &fbc->x0); x 450 drivers/video/fbdev/cg6.c sbus_writel(x + width - 1, &fbc->x1); x 468 drivers/video/fbdev/cg6.c x = image->dx; x 403 drivers/video/fbdev/cirrusfb.c u_short x, u_short y, x 2700 drivers/video/fbdev/cirrusfb.c u_short x, u_short y, u_short width, u_short height, x 2704 drivers/video/fbdev/cirrusfb.c u_long ndest = (y * line_length) + x; x 51 drivers/video/fbdev/cobalt_lcdfb.c #define LCD_CUR_POS(x) ((x) & LCD_CUR_POS_MASK) x 52 drivers/video/fbdev/cobalt_lcdfb.c #define LCD_TEXT_POS(x) ((x) | LCD_TEXT_MODE) x 239 drivers/video/fbdev/cobalt_lcdfb.c u32 x, y; x 244 drivers/video/fbdev/cobalt_lcdfb.c x = cursor->image.dx; x 246 drivers/video/fbdev/cobalt_lcdfb.c if (x >= LCD_XRES_MAX || y >= LCD_YRES_MAX) x 254 drivers/video/fbdev/cobalt_lcdfb.c LCD_TEXT_POS(info->fix.line_length * y + x)); x 68 drivers/video/fbdev/controlfb.c #define DIRTY(z) ((x)->z != (y)->z) x 69 drivers/video/fbdev/controlfb.c #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z))) x 70 drivers/video/fbdev/controlfb.c static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y) x 86 drivers/video/fbdev/controlfb.c static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y) x 33 drivers/video/fbdev/controlfb.h #define PAD(x) char x[12] x 305 drivers/video/fbdev/core/bitblit.c if (ops->cursor_state.hot.x || ops->cursor_state.hot.y || x 307 drivers/video/fbdev/core/bitblit.c ops->cursor_state.hot.x = cursor.hot.y = 0; x 375 drivers/video/fbdev/core/bitblit.c cursor.hot.x = ops->cursor_state.hot.x; x 175 drivers/video/fbdev/core/fb_draw.h #define _cpu_to_le_long(x) __cpu_to_le_long(x) x 176 drivers/video/fbdev/core/fb_draw.h #define __cpu_to_le_long(x) cpu_to_le##x x 179 drivers/video/fbdev/core/fb_draw.h #define _le_long_to_cpu(x) __le_long_to_cpu(x) x 180 drivers/video/fbdev/core/fb_draw.h #define __le_long_to_cpu(x) le##x##_to_cpu x 182 drivers/video/fbdev/core/fb_draw.h static inline unsigned long rolx(unsigned long word, unsigned int shift, unsigned int x) x 184 drivers/video/fbdev/core/fb_draw.h return (word << shift) | (word >> (x - shift)); x 1664 drivers/video/fbdev/core/fbcon.c int x = 0; x 1675 drivers/video/fbdev/core/fbcon.c line, x); x 1676 drivers/video/fbdev/core/fbcon.c x += s - start; x 1683 drivers/video/fbdev/core/fbcon.c line, x); x 1684 drivers/video/fbdev/core/fbcon.c x += s - start + 1; x 1687 drivers/video/fbdev/core/fbcon.c x++; x 1695 drivers/video/fbdev/core/fbcon.c fbcon_putcs(vc, start, s - start, line, x); x 1718 drivers/video/fbdev/core/fbcon.c int x = 0; x 1727 drivers/video/fbdev/core/fbcon.c dy, x); x 1728 drivers/video/fbdev/core/fbcon.c x += s - start; x 1736 drivers/video/fbdev/core/fbcon.c fbcon_putcs(vc, start, s - start, dy, x); x 1755 drivers/video/fbdev/core/fbcon.c int x = 0; x 1762 drivers/video/fbdev/core/fbcon.c ops->bmove(vc, info, line + ycount, x, x 1763 drivers/video/fbdev/core/fbcon.c line, x, 1, s-start); x 1764 drivers/video/fbdev/core/fbcon.c x += s - start + 1; x 1767 drivers/video/fbdev/core/fbcon.c x++; x 1778 drivers/video/fbdev/core/fbcon.c ops->bmove(vc, info, line + ycount, x, line, x, 1, x 1803 drivers/video/fbdev/core/fbcon.c int x = 0; x 1812 drivers/video/fbdev/core/fbcon.c line, x); x 1813 drivers/video/fbdev/core/fbcon.c x += s - start; x 1820 drivers/video/fbdev/core/fbcon.c line, x); x 1821 drivers/video/fbdev/core/fbcon.c x += s - start + 1; x 1824 drivers/video/fbdev/core/fbcon.c x++; x 1834 drivers/video/fbdev/core/fbcon.c fbcon_putcs(vc, start, s - start, line, x); x 2782 drivers/video/fbdev/core/fbcon.c int x, y; x 2787 drivers/video/fbdev/core/fbcon.c x = offset % vc->vc_cols; x 2791 drivers/video/fbdev/core/fbcon.c ret = pos + (vc->vc_cols - x) * 2; x 2798 drivers/video/fbdev/core/fbcon.c x = offset % vc->vc_cols; x 2800 drivers/video/fbdev/core/fbcon.c ret = pos + (vc->vc_cols - x) * 2; x 2807 drivers/video/fbdev/core/fbcon.c x = y = 0; x 2811 drivers/video/fbdev/core/fbcon.c *px = x; x 3323 drivers/video/fbdev/core/fbcon.c caps->x |= 1 << (vc->vc_font.width - 1); x 3337 drivers/video/fbdev/core/fbcon.c caps->x = 1 << (vc->vc_font.width - 1); x 262 drivers/video/fbdev/core/fbcon.h #define fbcon_set_rotate(x) do {} while(0) x 297 drivers/video/fbdev/core/fbcon_ccw.c if (ops->cursor_state.hot.x || ops->cursor_state.hot.y || x 299 drivers/video/fbdev/core/fbcon_ccw.c ops->cursor_state.hot.x = cursor.hot.y = 0; x 379 drivers/video/fbdev/core/fbcon_ccw.c cursor.hot.x = ops->cursor_state.hot.x; x 280 drivers/video/fbdev/core/fbcon_cw.c if (ops->cursor_state.hot.x || ops->cursor_state.hot.y || x 282 drivers/video/fbdev/core/fbcon_cw.c ops->cursor_state.hot.x = cursor.hot.y = 0; x 362 drivers/video/fbdev/core/fbcon_cw.c cursor.hot.x = ops->cursor_state.hot.x; x 23 drivers/video/fbdev/core/fbcon_rotate.h static inline int pattern_test_bit(u32 x, u32 y, u32 pitch, const char *pat) x 25 drivers/video/fbdev/core/fbcon_rotate.h u32 tmp = (y * pitch) + x, index = tmp / 8, bit = tmp % 8; x 31 drivers/video/fbdev/core/fbcon_rotate.h static inline void pattern_set_bit(u32 x, u32 y, u32 pitch, char *pat) x 33 drivers/video/fbdev/core/fbcon_rotate.h u32 tmp = (y * pitch) + x, index = tmp / 8, bit = tmp % 8; x 328 drivers/video/fbdev/core/fbcon_ud.c if (ops->cursor_state.hot.x || ops->cursor_state.hot.y || x 330 drivers/video/fbdev/core/fbcon_ud.c ops->cursor_state.hot.x = cursor.hot.y = 0; x 402 drivers/video/fbdev/core/fbcon_ud.c cursor.hot.x = ops->cursor_state.hot.x; x 421 drivers/video/fbdev/core/fbmem.c unsigned int x; x 427 drivers/video/fbdev/core/fbmem.c for (x = 0; x 428 drivers/video/fbdev/core/fbmem.c x < num && image->dx + image->width <= info->var.xres; x 429 drivers/video/fbdev/core/fbmem.c x++) { x 436 drivers/video/fbdev/core/fbmem.c for (x = 0; x < num && image->dx <= dx; x++) { x 441 drivers/video/fbdev/core/fbmem.c for (x = 0; x 442 drivers/video/fbdev/core/fbmem.c x < num && image->dy + image->height <= info->var.yres; x 443 drivers/video/fbdev/core/fbmem.c x++) { x 450 drivers/video/fbdev/core/fbmem.c for (x = 0; x < num && image->dy <= dy; x++) { x 944 drivers/video/fbdev/core/fbmem.c if (((fbcaps.x ^ caps.x) & caps.x) || x 23 drivers/video/fbdev/core/modedb.c #define res_matches(v, x, y) \ x 24 drivers/video/fbdev/core/modedb.c ((v).xres == (x) && (v).yres == (y)) x 356 drivers/video/fbdev/core/svgalib.c caps->x = 1 << (8 - 1); x 360 drivers/video/fbdev/core/svgalib.c caps->x = (var->bits_per_pixel == 4) ? 1 << (8 - 1) : ~(u32)0; x 32 drivers/video/fbdev/cyber2000fb.h #define debug_printf(x...) do { } while (0) x 44 drivers/video/fbdev/da8xx-fb.c #define LCD_DMA_BURST_SIZE(x) ((x) << 4) x 56 drivers/video/fbdev/da8xx-fb.c #define LCD_CLK_DIVISOR(x) ((x) << 8) x 60 drivers/video/fbdev/da8xx-fb.c #define LCD_PALETTE_LOAD_MODE(x) ((x) << 20) x 84 drivers/video/fbdev/da8xx-fb.c #define LCD_AC_BIAS_TRANSITIONS_PER_INT(x) ((x) << 16) x 85 drivers/video/fbdev/da8xx-fb.c #define LCD_AC_BIAS_FREQUENCY(x) ((x) << 8) x 60 drivers/video/fbdev/edid.h #define UPPER_NIBBLE( x ) \ x 61 drivers/video/fbdev/edid.h (((128|64|32|16) & (x)) >> 4) x 63 drivers/video/fbdev/edid.h #define LOWER_NIBBLE( x ) \ x 64 drivers/video/fbdev/edid.h ((1|2|4|8) & (x)) x 193 drivers/video/fbdev/ffb.c u32 x; x 234 drivers/video/fbdev/fm2fb.c int x, y; x 264 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0xffffff;/* white */ x 265 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0xffff00;/* yellow */ x 266 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0x00ffff;/* cyan */ x 267 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0x00ff00;/* green */ x 268 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0xff00ff;/* magenta */ x 269 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0xff0000;/* red */ x 270 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0x0000ff;/* blue */ x 271 drivers/video/fbdev/fm2fb.c for (x = 0; x < 96; x++) *ptr++ = 0x000000;/* black */ x 137 drivers/video/fbdev/g364fb.c ((x * fontwidth(p)) << 12) | ((y * fontheight(p)) - x 201 drivers/video/fbdev/gbefb.c unsigned int val, x, y, vpixen_off; x 252 drivers/video/fbdev/gbefb.c x = GET_GBE_FIELD(VT_XY, X, val); x 263 drivers/video/fbdev/gbefb.c x = GET_GBE_FIELD(VT_XY, X, val); x 241 drivers/video/fbdev/geode/gx1fb_core.c int x, y; x 243 drivers/video/fbdev/geode/gx1fb_core.c x = simple_strtol(panel_option, &s, 10); x 244 drivers/video/fbdev/geode/gx1fb_core.c if (!x) x 249 drivers/video/fbdev/geode/gx1fb_core.c par->panel_x = x; x 514 drivers/video/fbdev/hgafb.c u_int x; x 518 drivers/video/fbdev/hgafb.c for (x = 0; x < image->width; x+= 8) { x 520 drivers/video/fbdev/hgafb.c dest = rowaddr(info, y) + ((image->dx + x)>> 3); x 323 drivers/video/fbdev/hpfb.c #define topcat_sid_ok(x) (((x) == DIO_ID2_LRCATSEYE) || ((x) == DIO_ID2_HRCCATSEYE) \ x 324 drivers/video/fbdev/hpfb.c || ((x) == DIO_ID2_HRMCATSEYE) || ((x) == DIO_ID2_TOPCAT)) x 643 drivers/video/fbdev/hyperv_fb.c uint x = 0, y = 0; x 649 drivers/video/fbdev/hyperv_fb.c if (!*p || kstrtouint(p, 0, &x) || x 655 drivers/video/fbdev/hyperv_fb.c if (x < HVFB_WIDTH_MIN || y < HVFB_HEIGHT_MIN || x 657 drivers/video/fbdev/hyperv_fb.c x * y * screen_depth / 8 > SYNTHVID_FB_SIZE_WIN8) || x 659 drivers/video/fbdev/hyperv_fb.c (x > SYNTHVID_WIDTH_MAX_WIN7 || y > SYNTHVID_HEIGHT_MAX_WIN7))) { x 664 drivers/video/fbdev/hyperv_fb.c screen_width = x; x 437 drivers/video/fbdev/imsttfb.c __u32 clk_m, clk_n, x, stage, spilled; x 450 drivers/video/fbdev/imsttfb.c x = 20 * (clk_m + 1) / (clk_n + 1); x 451 drivers/video/fbdev/imsttfb.c if (x == MHz) x 453 drivers/video/fbdev/imsttfb.c if (x > MHz) { x 456 drivers/video/fbdev/imsttfb.c } else if (spilled && x < MHz) { x 1089 drivers/video/fbdev/imsttfb.c u_int x, y; x 1096 drivers/video/fbdev/imsttfb.c for (x = 0; x < 0x100; x++) { x 1097 drivers/video/fbdev/imsttfb.c par->cmap_regs[PIDXLO] = x; eieio(); x 1102 drivers/video/fbdev/imsttfb.c for (x = 0; x < width >> 2; x++) { x 1103 drivers/video/fbdev/imsttfb.c par->cmap_regs[PIDXLO] = x + y * 8; eieio(); x 1129 drivers/video/fbdev/imsttfb.c for (x = 0; x < 0x200; x++) { x 1132 drivers/video/fbdev/imsttfb.c for (x = 0; x < 0x200; x++) { x 1138 drivers/video/fbdev/imsttfb.c for (x = 0; x < width >> 3; x++) { x 1139 drivers/video/fbdev/imsttfb.c par->cmap_regs[TVPADDRW] = x + y * 8; eieio(); x 1145 drivers/video/fbdev/imsttfb.c for (x = 0; x < width >> 3; x++) { x 1146 drivers/video/fbdev/imsttfb.c par->cmap_regs[TVPADDRW] = x + y * 8; eieio(); x 1150 drivers/video/fbdev/imsttfb.c for (x = 0; x < 12; x++) { x 1183 drivers/video/fbdev/imsttfb.c __u16 x = d->dx + 0x40, y = d->dy + 0x40; x 1185 drivers/video/fbdev/imsttfb.c par->cmap_regs[TVPCXPOH] = x >> 8; eieio(); x 1186 drivers/video/fbdev/imsttfb.c par->cmap_regs[TVPCXPOL] = x & 0xff; eieio(); x 56 drivers/video/fbdev/imxfb.c #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) x 62 drivers/video/fbdev/imxfb.c #define VPW_VPW(x) ((x) & 0x3ff) x 68 drivers/video/fbdev/imxfb.c #define CPOS_CXP(x) (((x) & 3ff) << 16) x 74 drivers/video/fbdev/imxfb.c #define LCWHB_BD(x) ((x) & 0xff) x 81 drivers/video/fbdev/imxfb.c #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) x 82 drivers/video/fbdev/imxfb.c #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) x 83 drivers/video/fbdev/imxfb.c #define HCR_H_WAIT_2(x) ((x) & 0xff) x 86 drivers/video/fbdev/imxfb.c #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) x 87 drivers/video/fbdev/imxfb.c #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) x 88 drivers/video/fbdev/imxfb.c #define VCR_V_WAIT_2(x) ((x) & 0xff) x 91 drivers/video/fbdev/imxfb.c #define POS_POS(x) ((x) & 1f) x 79 drivers/video/fbdev/intelfb/intelfb.h #define KB(x) ((x) * 1024) x 80 drivers/video/fbdev/intelfb/intelfb.h #define MB(x) ((x) * 1024 * 1024) x 81 drivers/video/fbdev/intelfb/intelfb.h #define BtoKB(x) ((x) / 1024) x 82 drivers/video/fbdev/intelfb/intelfb.h #define BtoMB(x) ((x) / 1024 / 1024) x 86 drivers/video/fbdev/intelfb/intelfb.h #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y)) x 87 drivers/video/fbdev/intelfb/intelfb.h #define ROUND_DOWN_TO(x, y) ((x) / (y) * (y)) x 88 drivers/video/fbdev/intelfb/intelfb.h #define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE) x 89 drivers/video/fbdev/intelfb/intelfb.h #define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE) x 1657 drivers/video/fbdev/intelfb/intelfbhw.c void intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, u32 w, x 1664 drivers/video/fbdev/intelfb/intelfbhw.c "rop 0x%02x\n", x, y, w, h, color, pitch, bpp, rop); x 1668 drivers/video/fbdev/intelfb/intelfbhw.c br09 = dinfo->fb_start + (y * pitch + x * (bpp / 8)); x 1748 drivers/video/fbdev/intelfb/intelfbhw.c u32 h, const u8* cdat, u32 x, u32 y, u32 pitch, x 1757 drivers/video/fbdev/intelfb/intelfbhw.c DBG_MSG("intelfbhw_do_drawglyph: (%d,%d) %dx%d\n", x, y, w, h); x 1788 drivers/video/fbdev/intelfb/intelfbhw.c br22 = (x << WIDTH_SHIFT) | (y << HEIGHT_SHIFT); x 1789 drivers/video/fbdev/intelfb/intelfbhw.c br23 = ((x + w) << WIDTH_SHIFT) | ((y + h) << HEIGHT_SHIFT); x 1921 drivers/video/fbdev/intelfb/intelfbhw.c void intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y) x 1926 drivers/video/fbdev/intelfb/intelfbhw.c DBG_MSG("intelfbhw_cursor_setpos: (%d, %d)\n", x, y); x 1935 drivers/video/fbdev/intelfb/intelfbhw.c tmp = ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT) | x 586 drivers/video/fbdev/intelfb/intelfbhw.h extern void intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, x 593 drivers/video/fbdev/intelfb/intelfbhw.h u32 w, u32 h, const u8* cdat, u32 x, u32 y, x 598 drivers/video/fbdev/intelfb/intelfbhw.h extern void intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y); x 369 drivers/video/fbdev/kyro/fbdev.c static int kyro_dev_overlay_viewport_set(u32 x, u32 y, u32 ulWidth, u32 ulHeight) x 379 drivers/video/fbdev/kyro/fbdev.c x, y, x + ulWidth - 1, y + ulHeight - 1); x 388 drivers/video/fbdev/kyro/fbdev.c static inline unsigned long get_line_length(int x, int bpp) x 390 drivers/video/fbdev/kyro/fbdev.c return (unsigned long)((((x*bpp)+31)&~31) >> 3); x 85 drivers/video/fbdev/matrox/matroxfb_accel.c #define curr_ydstorg(x) ((x)->curr.ydstorg.pixels) x 1954 drivers/video/fbdev/matrox/matroxfb_base.c #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb) x 1955 drivers/video/fbdev/matrox/matroxfb_base.c #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node) x 57 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG(x) printk(KERN_DEBUG "matroxfb: %s\n", (x)); x 60 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_HEAVY(x) DBG(x) x 62 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_HEAVY(x) /* DBG_HEAVY */ x 66 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_LOOP(x) DBG(x) x 68 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_LOOP(x) /* DBG_LOOP */ x 72 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_REG(x) DBG(x) x 74 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_REG(x) /* DBG_REG */ x 79 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG(x) /* DBG */ x 80 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_HEAVY(x) /* DBG_HEAVY */ x 81 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_REG(x) /* DBG_REG */ x 82 drivers/video/fbdev/matrox/matroxfb_base.h #define DBG_LOOP(x) /* DBG_LOOP */ x 680 drivers/video/fbdev/matrox/matroxfb_base.h #define isInterleave(x) (x->interleave) x 681 drivers/video/fbdev/matrox/matroxfb_base.h #define isMillenium(x) (x->millenium) x 682 drivers/video/fbdev/matrox/matroxfb_base.h #define isMilleniumII(x) (x->milleniumII) x 684 drivers/video/fbdev/matrox/matroxfb_base.h #define isInterleave(x) (0) x 685 drivers/video/fbdev/matrox/matroxfb_base.h #define isMillenium(x) (0) x 686 drivers/video/fbdev/matrox/matroxfb_base.h #define isMilleniumII(x) (0) x 503 drivers/video/fbdev/matrox/matroxfb_g450.c #define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)]) x 523 drivers/video/fbdev/matrox/matroxfb_maven.c #define LR(x) maven_set_reg(c, (x), m->regs[(x)]) x 524 drivers/video/fbdev/matrox/matroxfb_maven.c #define LRP(x) maven_set_reg_pair(c, (x), m->regs[(x)] | (m->regs[(x)+1] << 8)) x 725 drivers/video/fbdev/matrox/matroxfb_maven.c unsigned int x; x 733 drivers/video/fbdev/matrox/matroxfb_maven.c for (x = 0; x < 8; x++) { x 737 drivers/video/fbdev/matrox/matroxfb_maven.c unsigned int h = ht + 2 + x; x 427 drivers/video/fbdev/mbx/mbxfb.c Vsadr_Xstart(set->x) | Vsadr_Ystart(set->y); x 878 drivers/video/fbdev/mbx/mbxfb.c #define mbxfb_debugfs_init(x) do {} while(0) x 879 drivers/video/fbdev/mbx/mbxfb.c #define mbxfb_debugfs_remove(x) do {} while(0) x 33 drivers/video/fbdev/mbx/reg_bits.h #define Core_Pll_M(x) ((x) << FShft(CORE_PLL_M)) x 35 drivers/video/fbdev/mbx/reg_bits.h #define Core_Pll_N(x) ((x) << FShft(CORE_PLL_N)) x 37 drivers/video/fbdev/mbx/reg_bits.h #define Core_Pll_P(x) ((x) << FShft(CORE_PLL_P)) x 42 drivers/video/fbdev/mbx/reg_bits.h #define Disp_Pll_M(x) ((x) << FShft(DISP_PLL_M)) x 44 drivers/video/fbdev/mbx/reg_bits.h #define Disp_Pll_N(x) ((x) << FShft(DISP_PLL_N)) x 46 drivers/video/fbdev/mbx/reg_bits.h #define Disp_Pll_P(x) ((x) << FShft(DISP_PLL_P)) x 88 drivers/video/fbdev/mbx/reg_bits.h #define Pixclkdiv_Pd(x) ((x) << FShft(PIXCLKDIV_PD)) x 92 drivers/video/fbdev/mbx/reg_bits.h #define Lcdcfg_In_Fmt(x) ((x) << FShft(LCDCFG_IN_FMT)) x 168 drivers/video/fbdev/mbx/reg_bits.h #define Lmtim_Tras(x) ((x) << FShft(LMTIM_TRAS)) x 170 drivers/video/fbdev/mbx/reg_bits.h #define Lmtim_Trp(x) ((x) << FShft(LMTIM_TRP)) x 172 drivers/video/fbdev/mbx/reg_bits.h #define Lmtim_Trcd(x) ((x) << FShft(LMTIM_TRCD)) x 174 drivers/video/fbdev/mbx/reg_bits.h #define Lmtim_Trc(x) ((x) << FShft(LMTIM_TRC)) x 176 drivers/video/fbdev/mbx/reg_bits.h #define Lmtim_Tdpl(x) ((x) << FShft(LMTIM_TDPL)) x 180 drivers/video/fbdev/mbx/reg_bits.h #define Lmrefresh_Tref(x) ((x) << FShft(LMREFRESH_TREF)) x 203 drivers/video/fbdev/mbx/reg_bits.h #define Gbbase_Glalpha(x) ((x) << FShft(GBBASE_GLALPHA)) x 206 drivers/video/fbdev/mbx/reg_bits.h #define Gbbase_Colkey(x) ((x) << FShft(GBBASE_COLKEY)) x 214 drivers/video/fbdev/mbx/reg_bits.h #define Gdrctrl_Colkeym(x) ((x) << FShft(GDRCTRL_COLKEYM)) x 230 drivers/video/fbdev/mbx/reg_bits.h #define Gscadr_Gbase_Adr(x) ((x) << FShft(GSCADR_GBASE_ADR)) x 234 drivers/video/fbdev/mbx/reg_bits.h #define Gsadr_Srcstride(x) ((x) << FShft(GSADR_SRCSTRIDE)) x 236 drivers/video/fbdev/mbx/reg_bits.h #define Gsadr_Xstart(x) ((x) << FShft(GSADR_XSTART)) x 242 drivers/video/fbdev/mbx/reg_bits.h #define Gplut_Lutadr(x) ((x) << FShft(GPLUT_LUTADR)) x 244 drivers/video/fbdev/mbx/reg_bits.h #define Gplut_Lutdata(x) ((x) << FShft(GPLUT_LUTDATA)) x 265 drivers/video/fbdev/mbx/reg_bits.h #define Vbbase_Glalpha(x) ((x) << FShft(VBBASE_GLALPHA)) x 268 drivers/video/fbdev/mbx/reg_bits.h #define Vbbase_Colkey(x) ((x) << FShft(VBBASE_COLKEY)) x 272 drivers/video/fbdev/mbx/reg_bits.h #define Vcmsk_colkey_m(x) ((x) << FShft(VCMSK_COLKEY_M)) x 288 drivers/video/fbdev/mbx/reg_bits.h #define Vscadr_Vbase_Adr(x) ((x) << FShft(VSCADR_VBASE_ADR)) x 293 drivers/video/fbdev/mbx/reg_bits.h #define Vubase_Ubase_Adr(x) ((x) << FShft(VUBASE_UBASE_ADR)) x 297 drivers/video/fbdev/mbx/reg_bits.h #define Vvbase_Vbase_Adr(x) ((x) << FShft(VVBASE_VBASE_ADR)) x 301 drivers/video/fbdev/mbx/reg_bits.h #define Vsadr_Srcstride(x) ((x) << FShft(VSADR_SRCSTRIDE)) x 303 drivers/video/fbdev/mbx/reg_bits.h #define Vsadr_Xstart(x) ((x) << FShft(VSADR_XSTART)) x 305 drivers/video/fbdev/mbx/reg_bits.h #define Vsadr_Ystart(x) ((x) << FShft(VSADR_YSTART)) x 326 drivers/video/fbdev/mbx/reg_bits.h #define Vbbase_Glalpha(x) ((x) << FShft(VBBASE_GLALPHA)) x 329 drivers/video/fbdev/mbx/reg_bits.h #define Vbbase_Colkey(x) ((x) << FShft(VBBASE_COLKEY)) x 333 drivers/video/fbdev/mbx/reg_bits.h #define Vcmsk_colkey_m(x) ((x) << FShft(VCMSK_COLKEY_M)) x 349 drivers/video/fbdev/mbx/reg_bits.h #define Vscadr_Vbase_Adr(x) ((x) << FShft(VSCADR_VBASE_ADR)) x 354 drivers/video/fbdev/mbx/reg_bits.h #define Vubase_Ubase_Adr(x) ((x) << FShft(VUBASE_UBASE_ADR)) x 358 drivers/video/fbdev/mbx/reg_bits.h #define Vvbase_Vbase_Adr(x) ((x) << FShft(VVBASE_VBASE_ADR)) x 362 drivers/video/fbdev/mbx/reg_bits.h #define Vsadr_Srcstride(x) ((x) << FShft(VSADR_SRCSTRIDE)) x 364 drivers/video/fbdev/mbx/reg_bits.h #define Vsadr_Xstart(x) ((x) << FShft(VSADR_XSTART)) x 366 drivers/video/fbdev/mbx/reg_bits.h #define Vsadr_Ystart(x) ((x) << FShft(VSADR_YSTART)) x 382 drivers/video/fbdev/mbx/reg_bits.h #define Hcctrl_Cbase_Adr(x) ((x) << FShft(HCCTRL_CBASE_ADR)) x 390 drivers/video/fbdev/mbx/reg_bits.h #define Hcsize_Cwidth(x) ((x) << FShft(HCSIZE_CWIDTH)) x 392 drivers/video/fbdev/mbx/reg_bits.h #define Hcsize_Cheight(x) ((x) << FShft(HCSIZE_CHEIGHT)) x 397 drivers/video/fbdev/mbx/reg_bits.h #define Hcpos_Curblink(x) ((x) << FShft(HCPOS_CURBLINK)) x 399 drivers/video/fbdev/mbx/reg_bits.h #define Hcpos_Xstart(x) ((x) << FShft(HCPOS_XSTART)) x 405 drivers/video/fbdev/mbx/reg_bits.h #define Hcbadr_Glalpha(x) ((x) << FShft(HCBADR_GLALPHA)) x 407 drivers/video/fbdev/mbx/reg_bits.h #define Hcbadr_Colkey(x) ((x) << FShft(HCBADR_COLKEY)) x 411 drivers/video/fbdev/mbx/reg_bits.h #define Hcckmsk_Colkey_M(x) ((x) << FShft(HCCKMSK_COLKEY_M)) x 421 drivers/video/fbdev/mbx/reg_bits.h #define Dsctrl_Updwait(x) ((x) << FShft(DSCTRL_UPDWAIT)) x 435 drivers/video/fbdev/mbx/reg_bits.h #define Dht01_Hbps(x) ((x) << FShft(DHT01_HBPS)) x 437 drivers/video/fbdev/mbx/reg_bits.h #define Dht01_Ht(x) ((x) << FShft(DHT01_HT)) x 441 drivers/video/fbdev/mbx/reg_bits.h #define Dht02_Has(x) ((x) << FShft(DHT02_HAS)) x 443 drivers/video/fbdev/mbx/reg_bits.h #define Dht02_Hlbs(x) ((x) << FShft(DHT02_HLBS)) x 447 drivers/video/fbdev/mbx/reg_bits.h #define Dht03_Hfps(x) ((x) << FShft(DHT03_HFPS)) x 449 drivers/video/fbdev/mbx/reg_bits.h #define Dht03_Hrbs(x) ((x) << FShft(DHT03_HRBS)) x 453 drivers/video/fbdev/mbx/reg_bits.h #define Dvt01_Vbps(x) ((x) << FShft(DVT01_VBPS)) x 455 drivers/video/fbdev/mbx/reg_bits.h #define Dvt01_Vt(x) ((x) << FShft(DVT01_VT)) x 459 drivers/video/fbdev/mbx/reg_bits.h #define Dvt02_Vas(x) ((x) << FShft(DVT02_VAS)) x 461 drivers/video/fbdev/mbx/reg_bits.h #define Dvt02_Vtbs(x) ((x) << FShft(DVT02_VTBS)) x 465 drivers/video/fbdev/mbx/reg_bits.h #define Dvt03_Vfps(x) ((x) << FShft(DVT03_VFPS)) x 467 drivers/video/fbdev/mbx/reg_bits.h #define Dvt03_Vbbs(x) ((x) << FShft(DVT03_VBBS)) x 471 drivers/video/fbdev/mbx/reg_bits.h #define Dvectrl_Vevent(x) ((x) << FShft(DVECTRL_VEVENT)) x 473 drivers/video/fbdev/mbx/reg_bits.h #define Dvectrl_Vfetch(x) ((x) << FShft(DVECTRL_VFETCH)) x 477 drivers/video/fbdev/mbx/reg_bits.h #define Dhdet_Hdes(x) ((x) << FShft(DHDET_HDES)) x 479 drivers/video/fbdev/mbx/reg_bits.h #define Dhdet_Hdef(x) ((x) << FShft(DHDET_HDEF)) x 483 drivers/video/fbdev/mbx/reg_bits.h #define Dvdet_Vdes(x) ((x) << FShft(DVDET_VDES)) x 485 drivers/video/fbdev/mbx/reg_bits.h #define Dvdet_Vdef(x) ((x) << FShft(DVDET_VDEF)) x 491 drivers/video/fbdev/mbx/reg_bits.h #define Dodmsk_Mask_B(x) ((x) << FShft(DODMSK_MASK_B)) x 493 drivers/video/fbdev/mbx/reg_bits.h #define Dodmsk_Mask_G(x) ((x) << FShft(DODMSK_MASK_G)) x 495 drivers/video/fbdev/mbx/reg_bits.h #define Dodmsk_Mask_R(x) ((x) << FShft(DODMSK_MASK_R)) x 499 drivers/video/fbdev/mbx/reg_bits.h #define Dbcol_Bordcol(x) ((x) << FShft(DBCOL_BORDCOL)) x 503 drivers/video/fbdev/mbx/reg_bits.h #define Dvlnum_Vline(x) ((x) << FShft(DVLNUM_VLINE)) x 512 drivers/video/fbdev/mbx/reg_bits.h #define Dmctrl_Uv_Thrhld(x) ((x) << FShft(DMCTRL_UV_THRHLD)) x 514 drivers/video/fbdev/mbx/reg_bits.h #define Dmctrl_V_Thrhld(x) ((x) << FShft(DMCTRL_V_THRHLD)) x 516 drivers/video/fbdev/mbx/reg_bits.h #define Dmctrl_D_Thrhld(x) ((x) << FShft(DMCTRL_D_THRHLD)) x 518 drivers/video/fbdev/mbx/reg_bits.h #define Dmctrl_Burstlen(x) ((x) << FShft(DMCTRL_BURSTLEN)) x 575 drivers/video/fbdev/mbx/reg_bits.h #define Dllctrl_Rld_Adrln(x) ((x) << FShft(DLLCTRL_RLD_ADRLN)) x 579 drivers/video/fbdev/mbx/reg_bits.h #define Clipctrl_Hskip ((x) << FShft(CLIPCTRL_HSKIP)) x 581 drivers/video/fbdev/mbx/reg_bits.h #define Clipctrl_Vskip ((x) << FShft(CLIPCTRL_VSKIP)) x 593 drivers/video/fbdev/mbx/reg_bits.h #define Spoctrl_Vpitch(x) ((x) << FShft(SPOCTRL_VPITCH)) x 597 drivers/video/fbdev/mbx/reg_bits.h #define Svctrl_Initial1(x) ((x) << FShft(SVCTRL_INITIAL1)) x 599 drivers/video/fbdev/mbx/reg_bits.h #define Svctrl_Initial2(x) ((x) << FShft(SVCTRL_INITIAL2)) x 603 drivers/video/fbdev/mbx/reg_bits.h #define Shctrl_Hinitial(x) ((x) << FShft(SHCTRL_HINITIAL)) x 606 drivers/video/fbdev/mbx/reg_bits.h #define Shctrl_Hpitch(x) ((x) << FShft(SHCTRL_HPITCH)) x 610 drivers/video/fbdev/mbx/reg_bits.h #define Sssize_Sc_Width(x) ((x) << FShft(SSSIZE_SC_WIDTH)) x 612 drivers/video/fbdev/mbx/reg_bits.h #define Sssize_Sc_Height(x) ((x) << FShft(SSSIZE_SC_HEIGHT)) x 7 drivers/video/fbdev/mbx/regs.h #define __REG_2700G(x) ((x)+virt_base_2700) x 200 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_DMA_OVSA_HPXL(x) (x) /* 0~0xfff */ x 205 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_DMA_HPXL(x) (x) x 210 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_DZM_HPXL(x) (x) x 222 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_GRA_OVSA_HPXL(x) (x) x 227 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_GRA_HPXL(x) (x) x 232 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_GZM_HPXL(x) (x) x 237 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_HWC_OVSA_HPXL(x) (x) x 242 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_HWC_HPXL(x) (x) x 247 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_H_TOTAL(x) (x) x 252 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_H_ACTIVE(x) (x) x 990 drivers/video/fbdev/nvidia/nvidia.c #define save_vga_x86(x) do {} while (0) x 991 drivers/video/fbdev/nvidia/nvidia.c #define restore_vga_x86(x) do {} while (0) x 71 drivers/video/fbdev/omap/hwa742.c int x, y, width, height; x 330 drivers/video/fbdev/omap/hwa742.c int x = par->x; x 345 drivers/video/fbdev/omap/hwa742.c x, y, w, h, scr_width, color_mode, flags); x 381 drivers/video/fbdev/omap/hwa742.c set_window_regs(x, y, x + w, y + h); x 383 drivers/video/fbdev/omap/hwa742.c offset = (scr_width * y + x) * bpp / 8; x 406 drivers/video/fbdev/omap/hwa742.c req->par.update.x = _x; \ x 419 drivers/video/fbdev/omap/hwa742.c int x = win->x; x 429 drivers/video/fbdev/omap/hwa742.c if (x & 1) { x 430 drivers/video/fbdev/omap/hwa742.c ADD_PREQ(x, y, 1, height); x 432 drivers/video/fbdev/omap/hwa742.c x++; x 442 drivers/video/fbdev/omap/hwa742.c ADD_PREQ(x, ystart, xspan, yspan); x 448 drivers/video/fbdev/omap/hwa742.c ADD_PREQ(x, ystart, xspan, yspan); x 449 drivers/video/fbdev/omap/hwa742.c x += xspan; x 454 drivers/video/fbdev/omap/hwa742.c ADD_PREQ(x, y, 1, height); x 986 drivers/video/fbdev/omap/hwa742.c hwa742.auto_update_window.x = 0; x 58 drivers/video/fbdev/omap/lcd_mipid.c struct spi_transfer *x, xfer[4]; x 67 drivers/video/fbdev/omap/lcd_mipid.c x = &xfer[0]; x 70 drivers/video/fbdev/omap/lcd_mipid.c x->tx_buf = &cmd; x 71 drivers/video/fbdev/omap/lcd_mipid.c x->bits_per_word = 9; x 72 drivers/video/fbdev/omap/lcd_mipid.c x->len = 2; x 73 drivers/video/fbdev/omap/lcd_mipid.c spi_message_add_tail(x, &m); x 76 drivers/video/fbdev/omap/lcd_mipid.c x++; x 77 drivers/video/fbdev/omap/lcd_mipid.c x->tx_buf = wbuf; x 78 drivers/video/fbdev/omap/lcd_mipid.c x->len = wlen; x 79 drivers/video/fbdev/omap/lcd_mipid.c x->bits_per_word = 9; x 80 drivers/video/fbdev/omap/lcd_mipid.c spi_message_add_tail(x, &m); x 84 drivers/video/fbdev/omap/lcd_mipid.c x++; x 85 drivers/video/fbdev/omap/lcd_mipid.c x->rx_buf = &w; x 86 drivers/video/fbdev/omap/lcd_mipid.c x->len = 1; x 87 drivers/video/fbdev/omap/lcd_mipid.c spi_message_add_tail(x, &m); x 93 drivers/video/fbdev/omap/lcd_mipid.c x->bits_per_word = 9; x 94 drivers/video/fbdev/omap/lcd_mipid.c x->len = 2; x 96 drivers/video/fbdev/omap/lcd_mipid.c x++; x 97 drivers/video/fbdev/omap/lcd_mipid.c x->rx_buf = &rbuf[1]; x 98 drivers/video/fbdev/omap/lcd_mipid.c x->len = rlen - 1; x 99 drivers/video/fbdev/omap/lcd_mipid.c spi_message_add_tail(x, &m); x 700 drivers/video/fbdev/omap/omapfb_main.c if (win->x >= xres || win->y >= yres || x 708 drivers/video/fbdev/omap/omapfb_main.c if (win->x + win->width > xres) x 709 drivers/video/fbdev/omap/omapfb_main.c win->width = xres - win->x; x 747 drivers/video/fbdev/omap/omapfb_main.c win.x = 0; x 1100 drivers/video/fbdev/omap/omapfb_main.c u->out_x = u->x; x 110 drivers/video/fbdev/omap/sossi.c #define HZ_TO_PS(x) (1000000000 / (x / 1000)) x 44 drivers/video/fbdev/omap2/omapfb/displays/connector-analog-tv.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 48 drivers/video/fbdev/omap2/omapfb/displays/connector-dvi.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 47 drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 31 drivers/video/fbdev/omap2/omapfb/displays/encoder-opa362.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 27 drivers/video/fbdev/omap2/omapfb/displays/encoder-tfp410.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 30 drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c #define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev) x 192 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c u16 x, u16 y, u16 w, u16 h) x 196 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c u16 x1 = x; x 197 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c u16 x2 = x + w - 1; x 862 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c u16 x, u16 y, u16 w, u16 h) x 868 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c dev_dbg(&ddata->pdev->dev, "update %d, %d, %d x %d\n", x, y, w, h); x 996 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c u16 x, u16 y, u16 w, u16 h) x 1033 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c dsicm_set_update_window(ddata, x, y, w, h); x 109 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c struct spi_transfer *x, xfer[5]; x 117 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x = &xfer[0]; x 120 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->tx_buf = &cmd; x 121 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->bits_per_word = 9; x 122 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->len = 2; x 130 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->bits_per_word = 10; x 133 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c spi_message_add_tail(x, &m); x 136 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x++; x 137 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->tx_buf = wbuf; x 138 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->len = wlen; x 139 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->bits_per_word = 9; x 140 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c spi_message_add_tail(x, &m); x 144 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x++; x 145 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->rx_buf = rbuf; x 146 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c x->len = rlen; x 147 drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c spi_message_add_tail(x, &m); x 20 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c #define TPO_R02_MODE(x) ((x) & 7) x 77 drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.c #define PIS(x) \ x 78 drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.c seq_printf(s, "%-20s %10d\n", #x, stats.irqs[ffs(DISPC_IRQ_##x)-1]); x 231 drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.c #define PIS(x) (status & DISPC_IRQ_##x) ? (#x " ") : "" x 692 drivers/video/fbdev/omap2/omapfb/dss/dispc.c #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) x 746 drivers/video/fbdev/omap2/omapfb/dss/dispc.c enum omap_overlay_caps caps, int x, int y) x 753 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); x 609 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define PIS(x) (status & DSI_IRQ_##x) ? (#x " ") : "" x 641 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define PIS(x) (status & DSI_VC_IRQ_##x) ? (#x " ") : "" x 663 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define PIS(x) (status & DSI_CIO_IRQ_##x) ? (#x " ") : "" x 1553 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define PIS(x) \ x 1554 drivers/video/fbdev/omap2/omapfb/dss/dsi.c seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]); x 1576 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define PIS(x) \ x 1577 drivers/video/fbdev/omap2/omapfb/dss/dsi.c seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ x 1578 drivers/video/fbdev/omap2/omapfb/dss/dsi.c stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ x 1579 drivers/video/fbdev/omap2/omapfb/dss/dsi.c stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ x 1580 drivers/video/fbdev/omap2/omapfb/dss/dsi.c stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ x 1581 drivers/video/fbdev/omap2/omapfb/dss/dsi.c stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); x 1595 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define PIS(x) \ x 1596 drivers/video/fbdev/omap2/omapfb/dss/dsi.c seq_printf(s, "%-20s %10d\n", #x, \ x 1597 drivers/video/fbdev/omap2/omapfb/dss/dsi.c stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); x 4327 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define TO_DSI_T(x) ((u32)div64_u64((u64)x * 1000000000llu, byteclk)) x 4358 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define TO_DISPC_T(x) ((u32)div64_u64((u64)x * 1000000000llu, pck)) x 279 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c u32 x, u32 y, u32 w, u32 h) x 292 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c if (x + w > dw || y + h > dh) x 295 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c return display->driver->update(display, x, y, w, h); x 501 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c mr->x, mr->y, mr->w, mr->h); x 629 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c r = omapfb_update_window(fbi, p.uwnd_o.x, p.uwnd_o.y, x 646 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c r = omapfb_update_window(fbi, p.uwnd.x, p.uwnd.y, x 54 drivers/video/fbdev/omap2/omapfb/omapfb-main.c static void draw_pixel(struct fb_info *fbi, int x, int y, unsigned color) x 68 drivers/video/fbdev/omap2/omapfb/omapfb-main.c p += y * line_len + x; x 77 drivers/video/fbdev/omap2/omapfb/omapfb-main.c p += (y * line_len + x) * 3; x 84 drivers/video/fbdev/omap2/omapfb/omapfb-main.c p += y * line_len + x; x 95 drivers/video/fbdev/omap2/omapfb/omapfb-main.c int y, x; x 103 drivers/video/fbdev/omap2/omapfb/omapfb-main.c for (x = 0; x < w; x++) { x 104 drivers/video/fbdev/omap2/omapfb/omapfb-main.c if (x < 20 && y < 20) x 105 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0xffffff); x 106 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (x < 20 && (y > 20 && y < h - 20)) x 107 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0xff); x 108 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (y < 20 && (x > 20 && x < w - 20)) x 109 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0xff00); x 110 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (x > w - 20 && (y > 20 && y < h - 20)) x 111 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0xff0000); x 112 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (y > h - 20 && (x > 20 && x < w - 20)) x 113 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0xffff00); x 114 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (x == 20 || x == w - 20 || x 116 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0xffffff); x 117 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (x == y || w - x == h - y) x 118 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0xff00ff); x 119 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (w - x == y || x == h - y) x 120 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0x00ffff); x 121 drivers/video/fbdev/omap2/omapfb/omapfb-main.c else if (x > 20 && y > 20 && x < w - 20 && y < h - 20) { x 122 drivers/video/fbdev/omap2/omapfb/omapfb-main.c int t = x * 3 / w; x 141 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, c); x 143 drivers/video/fbdev/omap2/omapfb/omapfb-main.c draw_pixel(fbi, x, y, 0); x 1263 drivers/video/fbdev/pm2fb.c int x = cursor->image.dx - info->var.xoffset; x 1272 drivers/video/fbdev/pm2fb.c x = 2047; /* push it outside display */ x 1273 drivers/video/fbdev/pm2fb.c pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_X_LOW, x & 0xff); x 1274 drivers/video/fbdev/pm2fb.c pm2v_RDAC_WR(par, PM2VI_RD_CURSOR_X_HIGH, (x >> 8) & 0xf); x 1288 drivers/video/fbdev/pm2fb.c cursor->hot.x & 0x3f); x 1392 drivers/video/fbdev/pm2fb.c int x = cursor->image.dx - info->var.xoffset + 63; x 1396 drivers/video/fbdev/pm2fb.c pm2_WR(par, PM2R_RD_CURSOR_X_LSB, x & 0xff); x 1397 drivers/video/fbdev/pm2fb.c pm2_WR(par, PM2R_RD_CURSOR_X_MSB, (x >> 8) & 0x7); x 641 drivers/video/fbdev/pm3fb.c int x = cursor->image.dx - info->var.xoffset; x 644 drivers/video/fbdev/pm3fb.c PM3_WRITE_DAC_REG(par, PM3RD_CursorXLow, x & 0xff); x 645 drivers/video/fbdev/pm3fb.c PM3_WRITE_DAC_REG(par, PM3RD_CursorXHigh, (x >> 8) & 0xf); x 652 drivers/video/fbdev/pm3fb.c cursor->hot.x & 0x3f); x 47 drivers/video/fbdev/ps3fb.c #define GPU_ALIGN_UP(x) _ALIGN_UP((x), 64) x 250 drivers/video/fbdev/pxa168fb.c u32 x = 0; x 269 drivers/video/fbdev/pxa168fb.c x = 0x80000000; x 290 drivers/video/fbdev/pxa168fb.c x |= divider_int; x 291 drivers/video/fbdev/pxa168fb.c writel(x, fbi->reg_base + LCD_CFG_SCLK_DIV); x 296 drivers/video/fbdev/pxa168fb.c u32 x; x 301 drivers/video/fbdev/pxa168fb.c x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0); x 302 drivers/video/fbdev/pxa168fb.c x &= ~CFG_GRA_ENA_MASK; x 303 drivers/video/fbdev/pxa168fb.c x |= fbi->active ? CFG_GRA_ENA(1) : CFG_GRA_ENA(0); x 310 drivers/video/fbdev/pxa168fb.c x |= 0x10000000; x 315 drivers/video/fbdev/pxa168fb.c x &= ~(0xF << 16); x 316 drivers/video/fbdev/pxa168fb.c x |= (fbi->pix_fmt >> 1) << 16; x 323 drivers/video/fbdev/pxa168fb.c x &= ~(1 << 12); x 324 drivers/video/fbdev/pxa168fb.c x |= ((fbi->pix_fmt & 1) ^ (fbi->panel_rbswap)) << 12; x 326 drivers/video/fbdev/pxa168fb.c writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL0); x 331 drivers/video/fbdev/pxa168fb.c u32 x; x 338 drivers/video/fbdev/pxa168fb.c x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL1); x 339 drivers/video/fbdev/pxa168fb.c x |= 0x2032ff81; x 346 drivers/video/fbdev/pxa168fb.c x |= 0x08000000; x 348 drivers/video/fbdev/pxa168fb.c writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL1); x 368 drivers/video/fbdev/pxa168fb.c u32 x; x 373 drivers/video/fbdev/pxa168fb.c x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL) & 0x00000001; x 375 drivers/video/fbdev/pxa168fb.c x |= (fbi->is_blanked ? 0x7 : mi->dumb_mode) << 28; x 376 drivers/video/fbdev/pxa168fb.c x |= mi->gpio_output_data << 20; x 377 drivers/video/fbdev/pxa168fb.c x |= mi->gpio_output_mask << 12; x 378 drivers/video/fbdev/pxa168fb.c x |= mi->panel_rgb_reverse_lanes ? 0x00000080 : 0; x 379 drivers/video/fbdev/pxa168fb.c x |= mi->invert_composite_blank ? 0x00000040 : 0; x 380 drivers/video/fbdev/pxa168fb.c x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0; x 381 drivers/video/fbdev/pxa168fb.c x |= mi->invert_pix_val_ena ? 0x00000010 : 0; x 382 drivers/video/fbdev/pxa168fb.c x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008; x 383 drivers/video/fbdev/pxa168fb.c x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004; x 384 drivers/video/fbdev/pxa168fb.c x |= mi->invert_pixclock ? 0x00000002 : 0; x 386 drivers/video/fbdev/pxa168fb.c writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL); x 393 drivers/video/fbdev/pxa168fb.c int x; x 396 drivers/video/fbdev/pxa168fb.c x = v->xres + v->right_margin + v->hsync_len + v->left_margin; x 399 drivers/video/fbdev/pxa168fb.c writel((y << 16) | x, fbi->reg_base + LCD_SPUT_V_H_TOTAL); x 407 drivers/video/fbdev/pxa168fb.c u32 x; x 422 drivers/video/fbdev/pxa168fb.c x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL); x 423 drivers/video/fbdev/pxa168fb.c writel(x & ~1, fbi->reg_base + LCD_SPU_DUMB_CTRL); x 446 drivers/video/fbdev/pxa168fb.c x = readl(fbi->reg_base + LCD_CFG_GRA_PITCH); x 447 drivers/video/fbdev/pxa168fb.c x = (x & ~0xFFFF) | ((var->xres_virtual * var->bits_per_pixel) >> 3); x 448 drivers/video/fbdev/pxa168fb.c writel(x, fbi->reg_base + LCD_CFG_GRA_PITCH); x 468 drivers/video/fbdev/pxa168fb.c x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL); x 469 drivers/video/fbdev/pxa168fb.c writel(x | 1, fbi->reg_base + LCD_SPU_DUMB_CTRL); x 27 drivers/video/fbdev/pxa168fb.h #define CFG_DMA_OVSA_HPXL(x) (x) /* 0~0xfff */ x 32 drivers/video/fbdev/pxa168fb.h #define CFG_DMA_HPXL(x) (x) x 37 drivers/video/fbdev/pxa168fb.h #define CFG_DZM_HPXL(x) (x) x 49 drivers/video/fbdev/pxa168fb.h #define CFG_GRA_OVSA_HPXL(x) (x) x 54 drivers/video/fbdev/pxa168fb.h #define CFG_GRA_HPXL(x) (x) x 59 drivers/video/fbdev/pxa168fb.h #define CFG_GZM_HPXL(x) (x) x 64 drivers/video/fbdev/pxa168fb.h #define CFG_HWC_OVSA_HPXL(x) (x) x 69 drivers/video/fbdev/pxa168fb.h #define CFG_HWC_HPXL(x) (x) x 74 drivers/video/fbdev/pxa168fb.h #define CFG_H_TOTAL(x) (x) x 79 drivers/video/fbdev/pxa168fb.h #define CFG_H_ACTIVE(x) (x) x 80 drivers/video/fbdev/pxafb.h #define NONSTD_TO_XPOS(x) (((x) >> 0) & 0x3ff) x 81 drivers/video/fbdev/pxafb.h #define NONSTD_TO_YPOS(x) (((x) >> 10) & 0x3ff) x 82 drivers/video/fbdev/pxafb.h #define NONSTD_TO_PFOR(x) (((x) >> 20) & 0x7) x 369 drivers/video/fbdev/riva/riva_hw.h U032 x; /* in pixels, 0 at left 0- 3*/ x 58 drivers/video/fbdev/s3c-fb.c #define VALID_BPP(x) (1 << ((x) - 1)) x 355 drivers/video/fbdev/s3fb.c int x, y; x 364 drivers/video/fbdev/s3fb.c for (x = 0; x < image->width; x += 8) { x 381 drivers/video/fbdev/s3fb.c int x, y; x 388 drivers/video/fbdev/s3fb.c for (x = 0; x < rect->width; x += 8) { x 412 drivers/video/fbdev/s3fb.c int x, y; x 421 drivers/video/fbdev/s3fb.c for (x = 0; x < image->width; x += 8) { x 22 drivers/video/fbdev/savage/savagefb.h # define DBG(x) printk (KERN_DEBUG "savagefb: %s\n", (x)); x 24 drivers/video/fbdev/savage/savagefb.h # define DBG(x) x 119 drivers/video/fbdev/savage/savagefb.h #define BCI_X_Y(x, y) (((y) << 16) | ((x) & 0xFFF)) x 382 drivers/video/fbdev/savage/savagefb.h #define savagefb_set_clip(x) x 3332 drivers/video/fbdev/sis/init.c int x = 1; /* Fix sync */ x 3345 drivers/video/fbdev/sis/init.c | (((SiS_Pr->CVSyncStart - x) & 0x100) >> 6) x 3350 drivers/video/fbdev/sis/init.c | (((SiS_Pr->CVSyncStart - x) & 0x200) >> 2); x 3359 drivers/video/fbdev/sis/init.c SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart - x) & 0xFF; /* CR10 */ x 3360 drivers/video/fbdev/sis/init.c SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd - x) & 0x0F) | 0x80; /* CR11 */ x 3369 drivers/video/fbdev/sis/init.c GETBITSTR((SiS_Pr->CVSyncStart -x), 10:10, 3:3) | x 74 drivers/video/fbdev/sis/initdef.h #define SISGETROMW(x) (ROMAddr[(x)] | (ROMAddr[(x)+1] << 8)) x 34 drivers/video/fbdev/sis/sis.h #define TWDEBUG(x) printk(KERN_INFO x "\n"); x 37 drivers/video/fbdev/sis/sis.h #define TWDEBUG(x) x 40 drivers/video/fbdev/sis/sis.h #define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0) x 146 drivers/video/fbdev/sis/sis_accel.c SiS300SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w, int h) x 155 drivers/video/fbdev/sis/sis_accel.c SiS300SetupDSTXY(x,y) x 248 drivers/video/fbdev/sis/sis_accel.c SiS310SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w, int h) x 258 drivers/video/fbdev/sis/sis_accel.c SiS310SetupDSTXY(x,y) x 40 drivers/video/fbdev/sis/sis_accel.h #define BR(x) (0x8200 | (x) << 2) x 41 drivers/video/fbdev/sis/sis_accel.h #define PBR(x) (0x8300 | (x) << 2) x 160 drivers/video/fbdev/sis/sis_accel.h #define SiS300SetupSRCXY(x,y) \ x 162 drivers/video/fbdev/sis/sis_accel.h MMIO_OUT32(ivideo->mmio_vbase, BR(2), (x)<<16 | (y) );\ x 170 drivers/video/fbdev/sis/sis_accel.h #define SiS300SetupDSTXY(x,y) \ x 172 drivers/video/fbdev/sis/sis_accel.h MMIO_OUT32(ivideo->mmio_vbase, BR(3), (x)<<16 | (y) );\ x 175 drivers/video/fbdev/sis/sis_accel.h #define SiS300SetupDSTRect(x,y) \ x 177 drivers/video/fbdev/sis/sis_accel.h MMIO_OUT32(ivideo->mmio_vbase, BR(5), (y)<<16 | (x) );\ x 290 drivers/video/fbdev/sis/sis_accel.h #define SiS310SetupSRCXY(x,y) \ x 292 drivers/video/fbdev/sis/sis_accel.h MMIO_OUT32(ivideo->mmio_vbase, SRC_Y, (x)<<16 | (y) );\ x 300 drivers/video/fbdev/sis/sis_accel.h #define SiS310SetupDSTXY(x,y) \ x 302 drivers/video/fbdev/sis/sis_accel.h MMIO_OUT32(ivideo->mmio_vbase, DST_Y, (x)<<16 | (y) );\ x 305 drivers/video/fbdev/sis/sis_accel.h #define SiS310SetupDSTRect(x,y) \ x 307 drivers/video/fbdev/sis/sis_accel.h MMIO_OUT32(ivideo->mmio_vbase, DST_PITCH, (y)<<16 | (x) );\ x 516 drivers/video/fbdev/sis/sis_main.c if((xres == sisfb_ddcfmodes[j].x) && x 3717 drivers/video/fbdev/sis/sis_main.c int x = ivideo->tvx; x 3721 drivers/video/fbdev/sis/sis_main.c x += val; x 3722 drivers/video/fbdev/sis/sis_main.c if(x < 0) x = 0; x 3724 drivers/video/fbdev/sis/sis_main.c SiS_SetCH700x(&ivideo->SiS_Pr, 0x0a, (x & 0xff)); x 3725 drivers/video/fbdev/sis/sis_main.c SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x08, ((x & 0x0100) >> 7), 0xFD); x 473 drivers/video/fbdev/sis/sis_main.h u16 x; x 267 drivers/video/fbdev/sm501fb.c #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x) x 1075 drivers/video/fbdev/sm501fb.c unsigned int x = cursor->image.dx; x 1078 drivers/video/fbdev/sm501fb.c if (x >= 2048 || y >= 2048 ) x 1081 drivers/video/fbdev/sm501fb.c dev_dbg(fbi->dev, "set position %d,%d\n", x, y); x 1085 drivers/video/fbdev/sm501fb.c smc501_writel(x | (y << 16), base + SM501_OFF_HWC_LOC); x 1115 drivers/video/fbdev/sm501fb.c int x, y; x 1130 drivers/video/fbdev/sm501fb.c for (x = 0; x < cursor->image.width; x++) { x 1131 drivers/video/fbdev/sm501fb.c if ((x % 8) == 0) { x 1141 drivers/video/fbdev/sm501fb.c op <<= ((x % 4) * 2); x 1143 drivers/video/fbdev/sm501fb.c op |= readb(dst + (x / 4)); x 1144 drivers/video/fbdev/sm501fb.c writeb(op, dst + (x / 4)); x 43 drivers/video/fbdev/smscufx.c #define all_bits_set(x, bits) (((x) & (bits)) == (bits)) x 72 drivers/video/fbdev/smscufx.c int x, y; x 810 drivers/video/fbdev/smscufx.c static void ufx_raw_rect(struct ufx_data *dev, u16 *cmd, int x, int y, x 826 drivers/video/fbdev/smscufx.c cmd[4] = cpu_to_le16(x); x 843 drivers/video/fbdev/smscufx.c const int byte_offset = line_offset + (x * BPP); x 849 drivers/video/fbdev/smscufx.c static int ufx_handle_damage(struct ufx_data *dev, int x, int y, x 856 drivers/video/fbdev/smscufx.c (x + width > dev->info->var.xres) || x 881 drivers/video/fbdev/smscufx.c ufx_raw_rect(dev, urb->transfer_buffer, x, (y + start_line), width, urb_lines); x 972 drivers/video/fbdev/smscufx.c const int x = 0; x 981 drivers/video/fbdev/smscufx.c ufx_handle_damage(dev, x, y, width, height); x 1015 drivers/video/fbdev/smscufx.c if (area->x < 0) x 1016 drivers/video/fbdev/smscufx.c area->x = 0; x 1018 drivers/video/fbdev/smscufx.c if (area->x > info->var.xres) x 1019 drivers/video/fbdev/smscufx.c area->x = info->var.xres; x 1027 drivers/video/fbdev/smscufx.c ufx_handle_damage(dev, area->x, area->y, area->w, area->h); x 8 drivers/video/fbdev/sticore.h #define DPRINTK(x) printk x x 10 drivers/video/fbdev/sticore.h #define DPRINTK(x) x 394 drivers/video/fbdev/sticore.h void sti_putc(struct sti_struct *sti, int c, int y, int x); x 412 drivers/video/fbdev/stifb.c #define NGLE_LONG_FB_ADDRESS(fbaddrbase, x, y) ( \ x 415 drivers/video/fbdev/stifb.c (unsigned int) ( (x) << 2 ) ) \ x 1088 drivers/video/fbdev/tdfxfb.c int x = cursor->image.dx; x 1091 drivers/video/fbdev/tdfxfb.c x += 63; x 1094 drivers/video/fbdev/tdfxfb.c tdfx_outl(par, HWCURLOC, (y << 16) + x); x 29 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_CSADR(x) (0x00000000 | ((x) & 0x001ffffe)) x 30 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_CHPIX(x) (0x01000000 | ((x) & 0x000003ff)) x 31 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_CVPIX(x) (0x02000000 | ((x) & 0x000003ff)) x 32 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_PSADR(x) (0x03000000 | ((x) & 0x00fffffe)) x 33 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_PHPIX(x) (0x04000000 | ((x) & 0x000003ff)) x 34 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_PVPIX(x) (0x05000000 | ((x) & 0x000003ff)) x 35 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_PHOFS(x) (0x06000000 | ((x) & 0x000003ff)) x 36 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_PVOFS(x) (0x07000000 | ((x) & 0x000003ff)) x 37 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_POADR(x) (0x08000000 | ((x) & 0x00fffffe)) x 38 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_RSTR(x) (0x09000000 | ((x) & 0x000000ff)) x 39 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_TCLOR(x) (0x0A000000 | ((x) & 0x0000ffff)) x 40 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_FILL(x) (0x0B000000 | ((x) & 0x0000ffff)) x 41 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_DSADR(x) (0x0C000000 | ((x) & 0x00fffffe)) x 42 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_SSADR(x) (0x0D000000 | ((x) & 0x00fffffe)) x 43 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_DHPIX(x) (0x0E000000 | ((x) & 0x000003ff)) x 44 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_DVPIX(x) (0x0F000000 | ((x) & 0x000003ff)) x 45 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_SHPIX(x) (0x10000000 | ((x) & 0x000003ff)) x 46 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_SVPIX(x) (0x11000000 | ((x) & 0x000003ff)) x 47 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_LBINI(x) (0x12000000 | ((x) & 0x0000ffff)) x 48 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_LBK2(x) (0x13000000 | ((x) & 0x0000ffff)) x 49 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_SHBINI(x) (0x14000000 | ((x) & 0x0000ffff)) x 50 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_SHBK2(x) (0x15000000 | ((x) & 0x0000ffff)) x 51 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_SVBINI(x) (0x16000000 | ((x) & 0x0000ffff)) x 52 drivers/video/fbdev/tmiofb.c #define TMIOFB_ACC_SVBK2(x) (0x17000000 | ((x) & 0x0000ffff)) x 303 drivers/video/fbdev/tridentfb.c #define point(x, y) ((y) << 16 | (x)) x 329 drivers/video/fbdev/tridentfb.c u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) x 335 drivers/video/fbdev/tridentfb.c writemmr(par, DST1, point(x, y)); x 336 drivers/video/fbdev/tridentfb.c writemmr(par, DST2, point(x + w - 1, y + h - 1)); x 340 drivers/video/fbdev/tridentfb.c u32 x, u32 y, u32 w, u32 h, u32 c, u32 b) x 348 drivers/video/fbdev/tridentfb.c writemmr(par, DST1, point(x, y)); x 349 drivers/video/fbdev/tridentfb.c writemmr(par, DST2, point(x + w - 1, y + h - 1)); x 381 drivers/video/fbdev/tridentfb.c unsigned char x = bpp == 24 ? 3 : (bpp >> 4); x 382 drivers/video/fbdev/tridentfb.c int v1 = pitch << (bpp == 24 ? 20 : (18 + x)); x 387 drivers/video/fbdev/tridentfb.c x |= 0x00; x 390 drivers/video/fbdev/tridentfb.c x |= 0x04; x 393 drivers/video/fbdev/tridentfb.c x |= 0x08; x 396 drivers/video/fbdev/tridentfb.c x |= 0x0C; x 400 drivers/video/fbdev/tridentfb.c t_outb(par, x, 0x2125); x 402 drivers/video/fbdev/tridentfb.c par->eng_oper = x | 0x40; x 431 drivers/video/fbdev/tridentfb.c u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) x 437 drivers/video/fbdev/tridentfb.c writemmr(par, OLDDST, point(y, x)); x 503 drivers/video/fbdev/tridentfb.c u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) x 510 drivers/video/fbdev/tridentfb.c writemmr(par, DST1, point(x, y)); x 511 drivers/video/fbdev/tridentfb.c writemmr(par, DST2, point(x + w - 1, y + h - 1)); x 545 drivers/video/fbdev/tridentfb.c unsigned char x = bpp == 24 ? 3 : (bpp >> 4); x 554 drivers/video/fbdev/tridentfb.c x |= 0x00; x 557 drivers/video/fbdev/tridentfb.c x |= 0x04; x 560 drivers/video/fbdev/tridentfb.c x |= 0x08; x 563 drivers/video/fbdev/tridentfb.c x |= 0x0C; x 567 drivers/video/fbdev/tridentfb.c fb_writew(x, par->io_virt + 0x2122); x 571 drivers/video/fbdev/tridentfb.c u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) x 577 drivers/video/fbdev/tridentfb.c writemmr(par, OLDDST, point(x, y)); x 764 drivers/video/fbdev/tridentfb.c int x, y, tmp; x 773 drivers/video/fbdev/tridentfb.c x = 1280; y = 1024; x 776 drivers/video/fbdev/tridentfb.c x = 1024; y = 768; x 779 drivers/video/fbdev/tridentfb.c x = 800; y = 600; x 783 drivers/video/fbdev/tridentfb.c x = 640; y = 480; x 787 drivers/video/fbdev/tridentfb.c output("%dx%d flat panel found\n", x, y); x 788 drivers/video/fbdev/tridentfb.c return x; x 594 drivers/video/fbdev/udlfb.c static int dlfb_handle_damage(struct dlfb_data *dlfb, int x, int y, int width, int height) x 608 drivers/video/fbdev/udlfb.c aligned_x = DL_ALIGN_DOWN(x, sizeof(unsigned long)); x 609 drivers/video/fbdev/udlfb.c width = DL_ALIGN_UP(width + (x-aligned_x), sizeof(unsigned long)); x 610 drivers/video/fbdev/udlfb.c x = aligned_x; x 613 drivers/video/fbdev/udlfb.c (x + width > dlfb->info->var.xres) || x 633 drivers/video/fbdev/udlfb.c const int byte_offset = line_offset + (x * BPP); x 680 drivers/video/fbdev/udlfb.c int x, x2, y, y2; x 683 drivers/video/fbdev/udlfb.c x = dlfb->damage_x; x 690 drivers/video/fbdev/udlfb.c if (x < x2 && y < y2) x 691 drivers/video/fbdev/udlfb.c dlfb_handle_damage(dlfb, x, y, x2 - x, y2 - y); x 694 drivers/video/fbdev/udlfb.c static void dlfb_offload_damage(struct dlfb_data *dlfb, int x, int y, int width, int height) x 697 drivers/video/fbdev/udlfb.c int x2 = x + width; x 700 drivers/video/fbdev/udlfb.c if (x >= x2 || y >= y2) x 704 drivers/video/fbdev/udlfb.c dlfb->damage_x = min(x, dlfb->damage_x); x 906 drivers/video/fbdev/udlfb.c if (area.x < 0) x 907 drivers/video/fbdev/udlfb.c area.x = 0; x 909 drivers/video/fbdev/udlfb.c if (area.x > info->var.xres) x 910 drivers/video/fbdev/udlfb.c area.x = info->var.xres; x 918 drivers/video/fbdev/udlfb.c dlfb_handle_damage(dlfb, area.x, area.y, area.w, area.h); x 851 drivers/video/fbdev/vga16fb.c int x; x 854 drivers/video/fbdev/vga16fb.c for (x = width; x > 0; --x) { x 883 drivers/video/fbdev/vga16fb.c int x, x2, y2, vxres, vyres, width, height, line_ofs; x 922 drivers/video/fbdev/vga16fb.c for (x = 0; x < width; x++) { x 938 drivers/video/fbdev/vga16fb.c for (x = 0; x < width; x++) { x 962 drivers/video/fbdev/vga16fb.c int height, line_ofs, x; x 978 drivers/video/fbdev/vga16fb.c for (x = 0; x < width; x++) { x 994 drivers/video/fbdev/vga16fb.c for (x = 0; x < width; x++) { x 1014 drivers/video/fbdev/vga16fb.c int x, x2, y2, old_dx, old_dy, vxres, vyres; x 1068 drivers/video/fbdev/vga16fb.c for (x = 0; x < width; x++) { x 1083 drivers/video/fbdev/vga16fb.c for (x = 0; x < width; x++) { x 1155 drivers/video/fbdev/vga16fb.c int x, y; x 1175 drivers/video/fbdev/vga16fb.c for (x = image->width/8; x--;) x 1190 drivers/video/fbdev/vga16fb.c for (x=image->width/8; x--;){ x 1223 drivers/video/fbdev/vga16fb.c int x, y; x 1234 drivers/video/fbdev/vga16fb.c for (x = 0; x < image->width; x++) { x 1235 drivers/video/fbdev/vga16fb.c dst = where + x/8; x 1239 drivers/video/fbdev/vga16fb.c setmask(1 << (7 - (x % 8))); x 25 drivers/video/fbdev/via/global.h #define machine_is_olpc(x) 0 x 43 drivers/video/fbdev/via/hw.h #define IGA2_HOR_TOTAL_SHADOW_FORMULA(x) ((x/8)-5) x 44 drivers/video/fbdev/via/hw.h #define IGA2_HOR_BLANK_END_SHADOW_FORMULA(x, y) (((x+y)/8)-1) x 45 drivers/video/fbdev/via/hw.h #define IGA2_VER_TOTAL_SHADOW_FORMULA(x) ((x)-2) x 46 drivers/video/fbdev/via/hw.h #define IGA2_VER_ADDR_SHADOW_FORMULA(x) ((x)-1) x 47 drivers/video/fbdev/via/hw.h #define IGA2_VER_BLANK_START_SHADOW_FORMULA(x) ((x)-1) x 48 drivers/video/fbdev/via/hw.h #define IGA2_VER_BLANK_END_SHADOW_FORMULA(x, y) ((x+y)-1) x 49 drivers/video/fbdev/via/hw.h #define IGA2_VER_SYNC_START_SHADOW_FORMULA(x) (x) x 50 drivers/video/fbdev/via/hw.h #define IGA2_VER_SYNC_END_SHADOW_FORMULA(x, y) (x+y) x 79 drivers/video/fbdev/via/hw.h #define IGA1_FETCH_COUNT_FORMULA(x, y) \ x 80 drivers/video/fbdev/via/hw.h (((x*y)/IGA1_FETCH_COUNT_ALIGN_BYTE) + IGA1_FETCH_COUNT_PATCH_VALUE) x 86 drivers/video/fbdev/via/hw.h #define IGA2_FETCH_COUNT_FORMULA(x, y) \ x 87 drivers/video/fbdev/via/hw.h (((x*y)/IGA2_FETCH_COUNT_ALIGN_BYTE) + IGA2_FETCH_COUNT_PATCH_VALUE) x 280 drivers/video/fbdev/via/hw.h #define IGA1_FIFO_DEPTH_SELECT_FORMULA(x) ((x/2)-1) x 281 drivers/video/fbdev/via/hw.h #define IGA1_FIFO_THRESHOLD_FORMULA(x) (x/4) x 282 drivers/video/fbdev/via/hw.h #define IGA1_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA(x) (x/4) x 283 drivers/video/fbdev/via/hw.h #define IGA1_FIFO_HIGH_THRESHOLD_FORMULA(x) (x/4) x 284 drivers/video/fbdev/via/hw.h #define IGA2_FIFO_DEPTH_SELECT_FORMULA(x) (((x/2)/4)-1) x 285 drivers/video/fbdev/via/hw.h #define IGA2_FIFO_THRESHOLD_FORMULA(x) (x/4) x 286 drivers/video/fbdev/via/hw.h #define IGA2_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA(x) (x/4) x 287 drivers/video/fbdev/via/hw.h #define IGA2_FIFO_HIGH_THRESHOLD_FORMULA(x) (x/4) x 308 drivers/video/fbdev/via/hw.h #define CLE266_POWER_SEQ_FORMULA(x) ((x)/CLE266_POWER_SEQ_UNIT) x 309 drivers/video/fbdev/via/hw.h #define K800_POWER_SEQ_FORMULA(x) ((x)/K800_POWER_SEQ_UNIT) x 310 drivers/video/fbdev/via/hw.h #define P880_POWER_SEQ_FORMULA(x) ((x)/P880_POWER_SEQ_UNIT) x 326 drivers/video/fbdev/via/hw.h #define CLE266_LCD_HOR_SCF_FORMULA(x, y) (((x-1)*1024)/(y-1)) x 328 drivers/video/fbdev/via/hw.h #define CLE266_LCD_VER_SCF_FORMULA(x, y) (((x-1)*1024)/(y-1)) x 330 drivers/video/fbdev/via/hw.h #define K800_LCD_HOR_SCF_FORMULA(x, y) (((x-1)*4096)/(y-1)) x 332 drivers/video/fbdev/via/hw.h #define K800_LCD_VER_SCF_FORMULA(x, y) (((x-1)*2048)/(y-1)) x 179 drivers/video/fbdev/via/ioctl.h int x; x 11 drivers/video/fbdev/via/lcd.c #define viafb_compact_res(x, y) (((x)<<16)|(y)) x 613 drivers/video/fbdev/via/viafbdev.c u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0; x 622 drivers/video/fbdev/via/viafbdev.c u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0; x 632 drivers/video/fbdev/via/viafbdev.c u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0; x 641 drivers/video/fbdev/via/viafbdev.c u.panel_pos_size_para.x = u.panel_pos_size_para.y = 0; x 777 drivers/video/fbdev/via/viafbdev.c temp = (cursor->hot.x << 16) + cursor->hot.y; x 149 drivers/video/fbdev/vt8623fb.c int x, y; x 158 drivers/video/fbdev/vt8623fb.c for (x = 0; x < image->width; x += 8) { x 174 drivers/video/fbdev/vt8623fb.c int x, y; x 181 drivers/video/fbdev/vt8623fb.c for (x = 0; x < rect->width; x += 8) { x 205 drivers/video/fbdev/vt8623fb.c int x, y; x 214 drivers/video/fbdev/vt8623fb.c for (x = 0; x < image->width; x += 8) { x 439 drivers/video/fbdev/w100fb.c static struct w100_mode *w100fb_get_mode(struct w100fb_par *par, unsigned int *x, unsigned int *y, int saveval) x 447 drivers/video/fbdev/w100fb.c if (modelist[i].xres >= *x && modelist[i].yres >= *y && x 452 drivers/video/fbdev/w100fb.c } else if(modelist[i].xres >= *y && modelist[i].yres >= *x && x 461 drivers/video/fbdev/w100fb.c *x = best_x; x 91 drivers/video/fbdev/xen-fbfront.c int x, int y, int w, int h) x 97 drivers/video/fbdev/xen-fbfront.c event.update.x = x; x 737 drivers/video/hdmi.c *ptr++ = frame->display_primaries[i].x; x 738 drivers/video/hdmi.c *ptr++ = frame->display_primaries[i].x >> 8; x 743 drivers/video/hdmi.c *ptr++ = frame->white_point.x; x 744 drivers/video/hdmi.c *ptr++ = frame->white_point.x >> 8; x 1434 drivers/video/hdmi.c hdmi_log("x[%d]: %d\n", i, frame->display_primaries[i].x); x 1438 drivers/video/hdmi.c hdmi_log("white point x: %d\n", frame->white_point.x); x 1824 drivers/video/hdmi.c frame->display_primaries[i].x = (x_msb << 8) | x_lsb; x 1830 drivers/video/hdmi.c frame->white_point.x = (ptr[15] << 8) | ptr[14]; x 464 drivers/virt/fsl_hypervisor.c #define nextp(x) (((x) + 1) & (QSIZE - 1)) x 279 drivers/virtio/virtio_balloon.c #define pages_to_bytes(x) ((u64)(x) << PAGE_SHIFT) x 27 drivers/vlynq/vlynq.c #define VLYNQ_CTRL_CLOCK_DIV(x) (((x) & 7) << 16) x 30 drivers/vlynq/vlynq.c #define VLYNQ_CTRL_INT_VECTOR(x) (((x) & 0x1f) << 8) x 46 drivers/vlynq/vlynq.c #define VINT_VECTOR(x) ((x) & 0x1f) x 22 drivers/w1/masters/mxc_w1.c # define MXC_W1_CONTROL_WR(x) BIT(5 - (x)) x 45 drivers/watchdog/ar7_wdt.c #define READ_REG(x) readl((void __iomem *)&(x)) x 46 drivers/watchdog/ar7_wdt.c #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x)) x 22 drivers/watchdog/at91sam9_wdt.h #define AT91_WDT_SET_WDV(x) ((x) & AT91_WDT_WDV) x 28 drivers/watchdog/at91sam9_wdt.h #define AT91_WDT_SET_WDD(x) (((x) << 16) & AT91_WDT_WDD) x 43 drivers/watchdog/bcm2835_wdt.c #define SECS_TO_WDOG_TICKS(x) ((x) << 16) x 44 drivers/watchdog/bcm2835_wdt.c #define WDOG_TICKS_TO_SECS(x) ((x) >> 16) x 32 drivers/watchdog/bcm_kona_wdt.c #define SECS_TO_TICKS(x, w) ((x) << (w)->resolution) x 33 drivers/watchdog/bcm_kona_wdt.c #define TICKS_TO_SECS(x, w) ((x) >> (w)->resolution) x 31 drivers/watchdog/booke_wdt.c #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15)) x 34 drivers/watchdog/booke_wdt.c #define WDTP(x) (TCR_WP(x)) x 26 drivers/watchdog/kempld_wdt.c #define KEMPLD_WDT_STAGE_TIMEOUT(x) (0x1b + (x) * 4) x 27 drivers/watchdog/kempld_wdt.c #define KEMPLD_WDT_STAGE_CFG(x) (0x18 + (x)) x 28 drivers/watchdog/kempld_wdt.c #define STAGE_CFG_GET_PRESCALER(x) (((x) & 0x30) >> 4) x 29 drivers/watchdog/kempld_wdt.c #define STAGE_CFG_SET_PRESCALER(x) (((x) & 0x3) << 4) x 49 drivers/watchdog/rc32434_wdt.c #define WTCOMP2SEC(x) (x / idt_cpu_freq) x 50 drivers/watchdog/rc32434_wdt.c #define SEC2WTCOMP(x) (x * idt_cpu_freq) x 49 drivers/watchdog/s3c2410_wdt.c #define S3C2410_WTCON_PRESCALE(x) ((x) << 8) x 131 drivers/watchdog/wdat_wdt.c u32 flags, value, mask, x, y; x 144 drivers/watchdog/wdat_wdt.c ret = wdat_wdt_read(wdat, instr, &x); x 147 drivers/watchdog/wdat_wdt.c x >>= gas->bit_offset; x 148 drivers/watchdog/wdat_wdt.c x &= mask; x 150 drivers/watchdog/wdat_wdt.c *retval = x == value; x 154 drivers/watchdog/wdat_wdt.c ret = wdat_wdt_read(wdat, instr, &x); x 157 drivers/watchdog/wdat_wdt.c x >>= gas->bit_offset; x 158 drivers/watchdog/wdat_wdt.c x &= mask; x 160 drivers/watchdog/wdat_wdt.c *retval = x; x 164 drivers/watchdog/wdat_wdt.c x = value & mask; x 165 drivers/watchdog/wdat_wdt.c x <<= gas->bit_offset; x 171 drivers/watchdog/wdat_wdt.c x |= y; x 173 drivers/watchdog/wdat_wdt.c ret = wdat_wdt_write(wdat, instr, x); x 179 drivers/watchdog/wdat_wdt.c x = param; x 180 drivers/watchdog/wdat_wdt.c x &= mask; x 181 drivers/watchdog/wdat_wdt.c x <<= gas->bit_offset; x 187 drivers/watchdog/wdat_wdt.c x |= y; x 189 drivers/watchdog/wdat_wdt.c ret = wdat_wdt_write(wdat, instr, x); x 37 drivers/xen/events/events_2l.c #define BM(x) (unsigned long *)(x) x 138 fs/afs/addr_list.c __be32 x[4]; x 155 fs/afs/addr_list.c if (in4_pton(p, q - p, (u8 *)&x[0], -1, &stop)) { x 157 fs/afs/addr_list.c } else if (in6_pton(p, q - p, (u8 *)x, -1, &stop)) { x 200 fs/afs/addr_list.c afs_merge_fs_addr4(alist, x[0], xport); x 202 fs/afs/addr_list.c afs_merge_fs_addr6(alist, x, xport); x 41 fs/afs/fsclient.c __be32 x[4]; x 46 fs/afs/fsclient.c memcpy(x, bp, 16); x 49 fs/afs/fsclient.c i, ntohl(x[0]), ntohl(x[1]), ntohl(x[2]), ntohl(x[3])); x 52 fs/afs/fsclient.c memcpy(x, bp, 4); x 53 fs/afs/fsclient.c pr_notice("0x50: %08x\n", ntohl(x[0])); x 64 fs/afs/protocol_yfs.h static inline u64 xdr_to_u64(const struct yfs_xdr_u64 x) x 66 fs/afs/protocol_yfs.h return ((u64)ntohl(x.msw) << 32) | ntohl(x.lsw); x 69 fs/afs/protocol_yfs.h static inline struct yfs_xdr_u64 u64_to_xdr(const u64 x) x 71 fs/afs/protocol_yfs.h return (struct yfs_xdr_u64){ .msw = htonl(x >> 32), .lsw = htonl(x) }; x 107 fs/afs/vl_list.c __be32 x[4]; x 117 fs/afs/vl_list.c memcpy(x, b, 4); x 118 fs/afs/vl_list.c afs_merge_fs_addr4(alist, x[0], port); x 127 fs/afs/vl_list.c memcpy(x, b, 16); x 128 fs/afs/vl_list.c afs_merge_fs_addr6(alist, x, port); x 25 fs/afs/yfsclient.c #define xdr_size(x) (sizeof(*x) / sizeof(__be32)) x 29 fs/afs/yfsclient.c const struct yfs_xdr_YFSFid *x = (const void *)*_bp; x 31 fs/afs/yfsclient.c fid->vid = xdr_to_u64(x->volume); x 32 fs/afs/yfsclient.c fid->vnode = xdr_to_u64(x->vnode.lo); x 33 fs/afs/yfsclient.c fid->vnode_hi = ntohl(x->vnode.hi); x 34 fs/afs/yfsclient.c fid->unique = ntohl(x->vnode.unique); x 35 fs/afs/yfsclient.c *_bp += xdr_size(x); x 46 fs/afs/yfsclient.c struct yfs_xdr_u64 *x = (void *)bp; x 48 fs/afs/yfsclient.c *x = u64_to_xdr(n); x 49 fs/afs/yfsclient.c return bp + xdr_size(x); x 54 fs/afs/yfsclient.c struct yfs_xdr_YFSFid *x = (void *)bp; x 56 fs/afs/yfsclient.c x->volume = u64_to_xdr(fid->vid); x 57 fs/afs/yfsclient.c x->vnode.lo = u64_to_xdr(fid->vnode); x 58 fs/afs/yfsclient.c x->vnode.hi = htonl(fid->vnode_hi); x 59 fs/afs/yfsclient.c x->vnode.unique = htonl(fid->unique); x 60 fs/afs/yfsclient.c return bp + xdr_size(x); x 90 fs/afs/yfsclient.c struct yfs_xdr_YFSStoreStatus *x = (void *)bp; x 92 fs/afs/yfsclient.c x->mask = htonl(AFS_SET_MODE); x 93 fs/afs/yfsclient.c x->mode = htonl(mode & S_IALLUGO); x 94 fs/afs/yfsclient.c x->mtime_client = u64_to_xdr(0); x 95 fs/afs/yfsclient.c x->owner = u64_to_xdr(0); x 96 fs/afs/yfsclient.c x->group = u64_to_xdr(0); x 97 fs/afs/yfsclient.c return bp + xdr_size(x); x 102 fs/afs/yfsclient.c struct yfs_xdr_YFSStoreStatus *x = (void *)bp; x 105 fs/afs/yfsclient.c x->mask = htonl(AFS_SET_MTIME); x 106 fs/afs/yfsclient.c x->mode = htonl(0); x 107 fs/afs/yfsclient.c x->mtime_client = u64_to_xdr(mtime); x 108 fs/afs/yfsclient.c x->owner = u64_to_xdr(0); x 109 fs/afs/yfsclient.c x->group = u64_to_xdr(0); x 110 fs/afs/yfsclient.c return bp + xdr_size(x); x 164 fs/afs/yfsclient.c __be32 x[4]; x 169 fs/afs/yfsclient.c memcpy(x, bp, 16); x 172 fs/afs/yfsclient.c i, ntohl(x[0]), ntohl(x[1]), ntohl(x[2]), ntohl(x[3])); x 175 fs/afs/yfsclient.c memcpy(x, bp, 8); x 176 fs/afs/yfsclient.c pr_notice("0x60: %08x %08x\n", ntohl(x[0]), ntohl(x[1])); x 243 fs/afs/yfsclient.c struct yfs_xdr_YFSCallBack *x = (void *)*_bp; x 248 fs/afs/yfsclient.c cb_expiry = ktime_add(cb_expiry, xdr_to_u64(x->expiration_time) * 100); x 251 fs/afs/yfsclient.c *_bp += xdr_size(x); x 260 fs/afs/yfsclient.c struct yfs_xdr_YFSVolSync *x = (void *)*_bp; x 264 fs/afs/yfsclient.c creation = xdr_to_u64(x->vol_creation_date); x 269 fs/afs/yfsclient.c *_bp += xdr_size(x); x 277 fs/afs/yfsclient.c struct yfs_xdr_YFSStoreStatus *x = (void *)bp; x 302 fs/afs/yfsclient.c x->mask = htonl(mask); x 303 fs/afs/yfsclient.c x->mode = htonl(mode); x 304 fs/afs/yfsclient.c x->mtime_client = u64_to_xdr(mtime); x 305 fs/afs/yfsclient.c x->owner = u64_to_xdr(owner); x 306 fs/afs/yfsclient.c x->group = u64_to_xdr(group); x 307 fs/afs/yfsclient.c return bp + xdr_size(x); x 316 fs/afs/yfsclient.c const struct yfs_xdr_YFSFetchVolumeStatus *x = (const void *)*_bp; x 319 fs/afs/yfsclient.c vs->vid = xdr_to_u64(x->vid); x 320 fs/afs/yfsclient.c vs->parent_id = xdr_to_u64(x->parent_id); x 321 fs/afs/yfsclient.c flags = ntohl(x->flags); x 326 fs/afs/yfsclient.c vs->type = ntohl(x->type); x 328 fs/afs/yfsclient.c vs->max_quota = xdr_to_u64(x->max_quota); x 329 fs/afs/yfsclient.c vs->blocks_in_use = xdr_to_u64(x->blocks_in_use); x 330 fs/afs/yfsclient.c vs->part_blocks_avail = xdr_to_u64(x->part_blocks_avail); x 331 fs/afs/yfsclient.c vs->part_max_blocks = xdr_to_u64(x->part_max_blocks); x 332 fs/afs/yfsclient.c vs->vol_copy_date = xdr_to_u64(x->vol_copy_date); x 333 fs/afs/yfsclient.c vs->vol_backup_date = xdr_to_u64(x->vol_backup_date); x 334 fs/afs/yfsclient.c *_bp += sizeof(*x) / sizeof(__be32); x 19 fs/bfs/dir.c #define dprintf(x...) printf(x) x 21 fs/bfs/dir.c #define dprintf(x...) x 20 fs/bfs/file.c #define dprintf(x...) printf(x) x 22 fs/bfs/file.c #define dprintf(x...) x 29 fs/bfs/inode.c #define dprintf(x...) printf(x) x 31 fs/bfs/inode.c #define dprintf(x...) x 43 fs/binfmt_aout.c #define BAD_ADDR(x) ((unsigned long)(x) >= TASK_SIZE) x 100 fs/binfmt_elf.c #define BAD_ADDR(x) ((unsigned long)(x) >= TASK_SIZE) x 118 fs/binfmt_elf_fdpic.c #define elf_check_fdpic(x) 0 x 122 fs/binfmt_elf_fdpic.c #define elf_check_const_displacement(x) 0 x 204 fs/btrfs/raid56.c struct btrfs_stripe_hash_table *x; x 237 fs/btrfs/raid56.c x = cmpxchg(&info->stripe_hash_table, NULL, table); x 238 fs/btrfs/raid56.c if (x) x 239 fs/btrfs/raid56.c kvfree(x); x 27 fs/btrfs/raid56.h #define is_parity_stripe(x) (((x) == RAID5_P_STRIPE) || \ x 28 fs/btrfs/raid56.h ((x) == RAID6_Q_STRIPE)) x 300 fs/btrfs/tests/extent-io-tests.c u32 x; x 357 fs/btrfs/tests/extent-io-tests.c x = 0; x 361 fs/btrfs/tests/extent-io-tests.c x = (0x19660dULL * (u64)x + 0x3c6ef35fULL) & 0xffffffffU; x 363 fs/btrfs/tests/extent-io-tests.c if (x & (1U << j)) { x 23 fs/cachefiles/proc.c unsigned x, y, z, t; x 34 fs/cachefiles/proc.c x = atomic_read(&cachefiles_lookup_histogram[index]); x 37 fs/cachefiles/proc.c if (x == 0 && y == 0 && z == 0) x 42 fs/cachefiles/proc.c seq_printf(m, "%4lu 0.%03u %9u %9u %9u\n", index, t, x, y, z); x 65 fs/cramfs/inode.c #define OFFSET(x) ((x)->i_ino) x 396 fs/dcache.c #define D_FLAG_VERIFY(dentry,x) WARN_ON_ONCE(((dentry)->d_flags & (DCACHE_LRU_LIST | DCACHE_SHRINK_LIST)) != (x)) x 129 fs/dlm/config.c unsigned int x; x 134 fs/dlm/config.c rc = kstrtouint(buf, 0, &x); x 138 fs/dlm/config.c if (check_zero && !x) x 141 fs/dlm/config.c *cl_field = x; x 142 fs/dlm/config.c *info_field = x; x 90 fs/dlm/dlm_internal.h #define DLM_ASSERT(x, do) \ x 92 fs/dlm/dlm_internal.h if (!(x)) \ x 97 fs/dlm/dlm_internal.h __LINE__, __FILE__, #x, jiffies); \ x 126 fs/dlm/lowcomms.c #define sock2con(x) ((struct connection *)(x)->sk_user_data) x 269 fs/dlm/lowcomms.c static int addr_compare(struct sockaddr_storage *x, struct sockaddr_storage *y) x 271 fs/dlm/lowcomms.c switch (x->ss_family) { x 273 fs/dlm/lowcomms.c struct sockaddr_in *sinx = (struct sockaddr_in *)x; x 282 fs/dlm/lowcomms.c struct sockaddr_in6 *sinx = (struct sockaddr_in6 *)x; x 387 fs/dlm/member.c int i, w, x = 0, total = 0, all_zero = 0, *array; x 418 fs/dlm/member.c DLM_ASSERT(x < total, printk("total %d x %d\n", total, x);); x 421 fs/dlm/member.c array[x++] = memb->nodeid; x 41 fs/ecryptfs/crypto.c int x; x 44 fs/ecryptfs/crypto.c for (x = 0; x < dst_size; x++) { x 45 fs/ecryptfs/crypto.c tmp[0] = src[x * 2]; x 46 fs/ecryptfs/crypto.c tmp[1] = src[x * 2 + 1]; x 47 fs/ecryptfs/crypto.c dst[x] = (unsigned char)simple_strtol(tmp, NULL, 16); x 34 fs/erofs/internal.h #define erofs_dbg(x, ...) pr_debug(x "\n", ##__VA_ARGS__) x 37 fs/erofs/internal.h #define erofs_dbg(x, ...) ((void)0) x 38 fs/erofs/internal.h #define DBG_BUGON(x) ((void)(x)) x 1472 fs/ext2/balloc.c unsigned long bitmap_count, x; x 1489 fs/ext2/balloc.c x = ext2_count_free(bitmap_bh, sb->s_blocksize); x 1491 fs/ext2/balloc.c i, le16_to_cpu(desc->bg_free_blocks_count), x); x 1492 fs/ext2/balloc.c bitmap_count += x; x 619 fs/ext2/ext2.h #define A(x,y) BUILD_BUG_ON(x != offsetof(struct ext2_super_block, y)); x 633 fs/ext2/ialloc.c unsigned x; x 644 fs/ext2/ialloc.c x = ext2_count_free(bitmap_bh, EXT2_INODES_PER_GROUP(sb) / 8); x 646 fs/ext2/ialloc.c i, le16_to_cpu(desc->bg_free_inodes_count), x); x 647 fs/ext2/ialloc.c bitmap_count += x; x 695 fs/ext4/balloc.c unsigned int x; x 719 fs/ext4/balloc.c x = ext4_count_free(bitmap_bh->b_data, x 722 fs/ext4/balloc.c i, ext4_free_group_clusters(sb, gdp), x); x 723 fs/ext4/balloc.c bitmap_count += x; x 34 fs/ext4/hash.c #define F(x, y, z) ((z) ^ ((x) & ((y) ^ (z)))) x 35 fs/ext4/hash.c #define G(x, y, z) (((x) & (y)) + (((x) ^ (y)) & (z))) x 36 fs/ext4/hash.c #define H(x, y, z) ((x) ^ (y) ^ (z)) x 44 fs/ext4/hash.c #define ROUND(f, a, b, c, d, x, s) \ x 45 fs/ext4/hash.c (a += f(b, c, d) + x, a = rol32(a, s)) x 1280 fs/ext4/ialloc.c unsigned long bitmap_count, x; x 1299 fs/ext4/ialloc.c x = ext4_count_free(bitmap_bh->b_data, x 1302 fs/ext4/ialloc.c (unsigned long) i, ext4_free_inodes_count(sb, gdp), x); x 1303 fs/ext4/ialloc.c bitmap_count += x; x 2747 fs/ext4/super.c #define PLURAL(x) (x), ((x) == 1) ? "" : "s" x 1862 fs/ext4/xattr.c #define header(x) ((struct ext4_xattr_header *)(x)) x 26 fs/f2fs/segment.c #define __reverse_ffz(x) __reverse_ffs(~(x)) x 76 fs/f2fs/xattr.h #define XATTR_SIZE(x,i) (((x) ? VALID_XATTR_BLOCK_SIZE : 0) + \ x 271 fs/fat/namei_vfat.c #define INIT_SHORTNAME_INFO(x) do { \ x 272 fs/fat/namei_vfat.c (x)->lower = 1; \ x 273 fs/fat/namei_vfat.c (x)->upper = 1; \ x 274 fs/fat/namei_vfat.c (x)->valid = 1; \ x 25 fs/file.c #define __const_min(x, y) ((x) < (y) ? (x) : (y)) x 247 fs/freevxfs/vxfs.h #define VXFS_ISFIFO(x) VXFS_IS_TYPE((x),VXFS_IFIFO) x 248 fs/freevxfs/vxfs.h #define VXFS_ISCHR(x) VXFS_IS_TYPE((x),VXFS_IFCHR) x 249 fs/freevxfs/vxfs.h #define VXFS_ISDIR(x) VXFS_IS_TYPE((x),VXFS_IFDIR) x 250 fs/freevxfs/vxfs.h #define VXFS_ISNAM(x) VXFS_IS_TYPE((x),VXFS_IFNAM) x 251 fs/freevxfs/vxfs.h #define VXFS_ISBLK(x) VXFS_IS_TYPE((x),VXFS_IFBLK) x 252 fs/freevxfs/vxfs.h #define VXFS_ISLNK(x) VXFS_IS_TYPE((x),VXFS_IFLNK) x 253 fs/freevxfs/vxfs.h #define VXFS_ISREG(x) VXFS_IS_TYPE((x),VXFS_IFREG) x 254 fs/freevxfs/vxfs.h #define VXFS_ISCMP(x) VXFS_IS_TYPE((x),VXFS_IFCMP) x 255 fs/freevxfs/vxfs.h #define VXFS_ISSOC(x) VXFS_IS_TYPE((x),VXFS_IFSOC) x 257 fs/freevxfs/vxfs.h #define VXFS_ISFSH(x) VXFS_IS_TYPE((x),VXFS_IFFSH) x 258 fs/freevxfs/vxfs.h #define VXFS_ISILT(x) VXFS_IS_TYPE((x),VXFS_IFILT) x 325 fs/gfs2/bmap.c unsigned int x, unsigned int h) x 327 fs/gfs2/bmap.c for (; x < h; x++) { x 328 fs/gfs2/bmap.c __be64 *ptr = metapointer(x, mp); x 334 fs/gfs2/bmap.c ret = gfs2_meta_indirect_buffer(ip, x + 1, dblock, &mp->mp_bh[x + 1]); x 338 fs/gfs2/bmap.c mp->mp_aheight = x + 1; x 377 fs/gfs2/bmap.c unsigned int x = 0; x 382 fs/gfs2/bmap.c for (x = h - 1; x > 0; x--) { x 383 fs/gfs2/bmap.c if (mp->mp_bh[x]) x 387 fs/gfs2/bmap.c ret = __fillup_metapath(ip, mp, x, h); x 390 fs/gfs2/bmap.c return mp->mp_aheight - x - 1; x 918 fs/gfs2/dir.c u32 x; x 944 fs/gfs2/dir.c x = 0; x 978 fs/gfs2/dir.c for (x = sdp->sd_hash_ptrs; x--; lp++) x 985 fs/gfs2/dir.c for (x = sdp->sd_hash_ptrs, y = -1; x; x >>= 1, y++) ; x 1014 fs/gfs2/dir.c int x; x 1065 fs/gfs2/dir.c for (x = 0; x < half_len; x++) x 1066 fs/gfs2/dir.c lp[x] = cpu_to_be64(bn); x 1160 fs/gfs2/dir.c int x; x 1182 fs/gfs2/dir.c for (x = 0; x < hsize; x++) { x 1274 fs/gfs2/dir.c unsigned int x, y; x 1284 fs/gfs2/dir.c for (x = 0, y = 1; x < entries; x++, y++) { x 1982 fs/gfs2/dir.c unsigned int x, size = len * sizeof(u64); x 2022 fs/gfs2/dir.c for (x = 0; x < rlist.rl_rgrps; x++) { x 2023 fs/gfs2/dir.c struct gfs2_rgrpd *rgd = gfs2_glock2rgrp(rlist.rl_ghs[x].gh_gl); x 1358 fs/gfs2/glock.c unsigned int x; x 1361 fs/gfs2/glock.c for (x = 0; x < num_gh; x++) x 1362 fs/gfs2/glock.c p[x] = &ghs[x]; x 1366 fs/gfs2/glock.c for (x = 0; x < num_gh; x++) { x 1367 fs/gfs2/glock.c p[x]->gh_flags &= ~(LM_FLAG_TRY | GL_ASYNC); x 1369 fs/gfs2/glock.c error = gfs2_glock_nq(p[x]); x 1371 fs/gfs2/glock.c while (x--) x 1372 fs/gfs2/glock.c gfs2_glock_dq(p[x]); x 205 fs/gfs2/glock.h #define GLOCK_BUG_ON(gl,x) do { if (unlikely(x)) { \ x 1356 fs/gfs2/inode.c unsigned int x; x 1406 fs/gfs2/inode.c for (x = 0; x < num_gh; x++) { x 1407 fs/gfs2/inode.c error = gfs2_glock_nq(ghs + x); x 1562 fs/gfs2/inode.c while (x--) { x 1563 fs/gfs2/inode.c if (gfs2_holder_queued(ghs + x)) x 1564 fs/gfs2/inode.c gfs2_glock_dq(ghs + x); x 1565 fs/gfs2/inode.c gfs2_holder_uninit(ghs + x); x 1596 fs/gfs2/inode.c unsigned int x; x 1640 fs/gfs2/inode.c for (x = 0; x < num_gh; x++) { x 1641 fs/gfs2/inode.c error = gfs2_glock_nq(ghs + x); x 1709 fs/gfs2/inode.c while (x--) { x 1710 fs/gfs2/inode.c if (gfs2_holder_queued(ghs + x)) x 1711 fs/gfs2/inode.c gfs2_glock_dq(ghs + x); x 1712 fs/gfs2/inode.c gfs2_holder_uninit(ghs + x); x 49 fs/gfs2/lops.h int x; x 50 fs/gfs2/lops.h for (x = 0; gfs2_log_ops[x]; x++) x 51 fs/gfs2/lops.h if (gfs2_log_ops[x]->lo_before_commit) x 52 fs/gfs2/lops.h gfs2_log_ops[x]->lo_before_commit(sdp, tr); x 58 fs/gfs2/lops.h int x; x 59 fs/gfs2/lops.h for (x = 0; gfs2_log_ops[x]; x++) x 60 fs/gfs2/lops.h if (gfs2_log_ops[x]->lo_after_commit) x 61 fs/gfs2/lops.h gfs2_log_ops[x]->lo_after_commit(sdp, tr); x 68 fs/gfs2/lops.h int x; x 69 fs/gfs2/lops.h for (x = 0; gfs2_log_ops[x]; x++) x 70 fs/gfs2/lops.h if (gfs2_log_ops[x]->lo_before_scan) x 71 fs/gfs2/lops.h gfs2_log_ops[x]->lo_before_scan(jd, head, pass); x 79 fs/gfs2/lops.h int x, error; x 80 fs/gfs2/lops.h for (x = 0; gfs2_log_ops[x]; x++) x 81 fs/gfs2/lops.h if (gfs2_log_ops[x]->lo_scan_elements) { x 82 fs/gfs2/lops.h error = gfs2_log_ops[x]->lo_scan_elements(jd, start, x 94 fs/gfs2/lops.h int x; x 95 fs/gfs2/lops.h for (x = 0; gfs2_log_ops[x]; x++) x 96 fs/gfs2/lops.h if (gfs2_log_ops[x]->lo_before_scan) x 97 fs/gfs2/lops.h gfs2_log_ops[x]->lo_after_scan(jd, error, pass); x 284 fs/gfs2/ops_fstype.c unsigned int x; x 330 fs/gfs2/ops_fstype.c for (x = 2;; x++) { x 334 fs/gfs2/ops_fstype.c space = sdp->sd_heightsize[x - 1] * sdp->sd_inptrs; x 338 fs/gfs2/ops_fstype.c if (d != sdp->sd_heightsize[x - 1] || m) x 340 fs/gfs2/ops_fstype.c sdp->sd_heightsize[x] = space; x 342 fs/gfs2/ops_fstype.c sdp->sd_max_height = x; x 343 fs/gfs2/ops_fstype.c sdp->sd_heightsize[x] = ~0; x 728 fs/gfs2/ops_fstype.c unsigned int x; x 729 fs/gfs2/ops_fstype.c for (x = 0; x < sdp->sd_journals; x++) { x 730 fs/gfs2/ops_fstype.c struct gfs2_jdesc *jd = gfs2_jdesc_find(sdp, x); x 741 fs/gfs2/ops_fstype.c x, error); x 620 fs/gfs2/quota.c u32 x; x 626 fs/gfs2/quota.c for (x = 0; x < ip->i_qadata->qa_qd_num; x++) { x 627 fs/gfs2/quota.c qdsb_put(ip->i_qadata->qa_qd[x]); x 628 fs/gfs2/quota.c ip->i_qadata->qa_qd[x] = NULL; x 650 fs/gfs2/quota.c s64 x; x 663 fs/gfs2/quota.c x = be64_to_cpu(qc->qc_change) + change; x 664 fs/gfs2/quota.c qc->qc_change = cpu_to_be64(x); x 667 fs/gfs2/quota.c qd->qd_change = x; x 670 fs/gfs2/quota.c if (!x) { x 872 fs/gfs2/quota.c unsigned int qx, x; x 903 fs/gfs2/quota.c for (x = 0; x < num_qd; x++) { x 904 fs/gfs2/quota.c offset = qd2offset(qda[x]); x 934 fs/gfs2/quota.c for (x = 0; x < num_qd; x++) { x 935 fs/gfs2/quota.c qd = qda[x]; x 1040 fs/gfs2/quota.c u32 x; x 1053 fs/gfs2/quota.c for (x = 0; x < ip->i_qadata->qa_qd_num; x++) { x 1054 fs/gfs2/quota.c qd = ip->i_qadata->qa_qd[x]; x 1055 fs/gfs2/quota.c error = do_glock(qd, NO_FORCE, &ip->i_qadata->qa_qd_ghs[x]); x 1063 fs/gfs2/quota.c while (x--) x 1064 fs/gfs2/quota.c gfs2_glock_dq_uninit(&ip->i_qadata->qa_qd_ghs[x]); x 1112 fs/gfs2/quota.c u32 x; x 1118 fs/gfs2/quota.c for (x = 0; x < ip->i_qadata->qa_qd_num; x++) { x 1122 fs/gfs2/quota.c qd = ip->i_qadata->qa_qd[x]; x 1125 fs/gfs2/quota.c gfs2_glock_dq_uninit(&ip->i_qadata->qa_qd_ghs[x]); x 1149 fs/gfs2/quota.c for (x = 0; x < count; x++) x 1150 fs/gfs2/quota.c qd_unlock(qda[x]); x 1194 fs/gfs2/quota.c u32 x; x 1204 fs/gfs2/quota.c for (x = 0; x < ip->i_qadata->qa_qd_num; x++) { x 1205 fs/gfs2/quota.c qd = ip->i_qadata->qa_qd[x]; x 1252 fs/gfs2/quota.c u32 x; x 1261 fs/gfs2/quota.c for (x = 0; x < ip->i_qadata->qa_qd_num; x++) { x 1262 fs/gfs2/quota.c qd = ip->i_qadata->qa_qd[x]; x 1277 fs/gfs2/quota.c unsigned int x; x 1302 fs/gfs2/quota.c for (x = 0; x < num_qd; x++) x 1303 fs/gfs2/quota.c qda[x]->qd_sync_gen = x 1306 fs/gfs2/quota.c for (x = 0; x < num_qd; x++) x 1307 fs/gfs2/quota.c qd_unlock(qda[x]); x 1340 fs/gfs2/quota.c unsigned int x, slot = 0; x 1362 fs/gfs2/quota.c for (x = 0; x < blocks; x++) { x 1369 fs/gfs2/quota.c error = gfs2_extent_map(&ip->i_inode, x, &new, &dblock, &extlen); x 455 fs/gfs2/rgrp.c int buf, x; x 462 fs/gfs2/rgrp.c for (x = 0; x < 4; x++) x 463 fs/gfs2/rgrp.c count[x] += gfs2_bitcount(rgd, x 466 fs/gfs2/rgrp.c bi->bi_bytes, x); x 594 fs/gfs2/rgrp.c int x; x 596 fs/gfs2/rgrp.c for (x = 0; x < rgd->rd_length; x++) { x 597 fs/gfs2/rgrp.c struct gfs2_bitmap *bi = rgd->rd_bits + x; x 772 fs/gfs2/rgrp.c int x; x 783 fs/gfs2/rgrp.c for (x = 0; x < length; x++) { x 784 fs/gfs2/rgrp.c bi = rgd->rd_bits + x; x 795 fs/gfs2/rgrp.c } else if (x == 0) { x 802 fs/gfs2/rgrp.c } else if (x + 1 == length) { x 1188 fs/gfs2/rgrp.c unsigned int x, y; x 1194 fs/gfs2/rgrp.c for (x = 0; x < length; x++) { x 1195 fs/gfs2/rgrp.c bi = rgd->rd_bits + x; x 1196 fs/gfs2/rgrp.c error = gfs2_meta_read(gl, rgd->rd_addr + x, 0, 0, &bi->bi_bh); x 1214 fs/gfs2/rgrp.c for (x = 0; x < length; x++) x 1215 fs/gfs2/rgrp.c clear_bit(GBF_FULL, &rgd->rd_bits[x].bi_flags); x 1239 fs/gfs2/rgrp.c while (x--) { x 1240 fs/gfs2/rgrp.c bi = rgd->rd_bits + x; x 1290 fs/gfs2/rgrp.c int x, length = rgd->rd_length; x 1292 fs/gfs2/rgrp.c for (x = 0; x < length; x++) { x 1293 fs/gfs2/rgrp.c struct gfs2_bitmap *bi = rgd->rd_bits + x; x 1327 fs/gfs2/rgrp.c unsigned int x; x 1331 fs/gfs2/rgrp.c for (x = 0; x < bi->bi_bytes; x++) { x 1334 fs/gfs2/rgrp.c clone += x; x 1336 fs/gfs2/rgrp.c const u8 *orig = bh->b_data + bi->bi_offset + x; x 1344 fs/gfs2/rgrp.c blk = offset + ((bi->bi_start + x) * GFS2_NBBY); x 1407 fs/gfs2/rgrp.c unsigned int x; x 1446 fs/gfs2/rgrp.c for (x = 0; x < rgd->rd_length; x++) { x 1447 fs/gfs2/rgrp.c struct gfs2_bitmap *bi = rgd->rd_bits + x; x 2604 fs/gfs2/rgrp.c unsigned int x; x 2630 fs/gfs2/rgrp.c for (x = 0; x < rlist->rl_rgrps; x++) { x 2631 fs/gfs2/rgrp.c if (rlist->rl_rgd[x] == rgd) { x 2632 fs/gfs2/rgrp.c swap(rlist->rl_rgd[x], x 2668 fs/gfs2/rgrp.c unsigned int x; x 2673 fs/gfs2/rgrp.c for (x = 0; x < rlist->rl_rgrps; x++) x 2674 fs/gfs2/rgrp.c gfs2_holder_init(rlist->rl_rgd[x]->rd_gl, x 2676 fs/gfs2/rgrp.c &rlist->rl_ghs[x]); x 2687 fs/gfs2/rgrp.c unsigned int x; x 2692 fs/gfs2/rgrp.c for (x = 0; x < rlist->rl_rgrps; x++) x 2693 fs/gfs2/rgrp.c gfs2_holder_uninit(&rlist->rl_ghs[x]); x 283 fs/gfs2/super.c s64 x, y; x 299 fs/gfs2/super.c x = 100 * l_sc->sc_free; x 301 fs/gfs2/super.c if (x >= y || x <= -y) x 846 fs/gfs2/super.c unsigned int x; x 854 fs/gfs2/super.c for (x = 0; x < slots; x++) x 855 fs/gfs2/super.c gfs2_holder_mark_uninitialized(gha + x); x 862 fs/gfs2/super.c for (x = 0; x < slots; x++) { x 863 fs/gfs2/super.c gh = gha + x; x 18 fs/gfs2/super.h unsigned int x; x 20 fs/gfs2/super.h x = sdp->sd_journals; x 22 fs/gfs2/super.h return x; x 558 fs/gfs2/sys.c unsigned int x, y; x 563 fs/gfs2/sys.c if (sscanf(buf, "%u %u", &x, &y) != 2 || !y) x 567 fs/gfs2/sys.c gt->gt_quota_scale_num = x; x 577 fs/gfs2/sys.c unsigned int x; x 583 fs/gfs2/sys.c error = kstrtouint(buf, 0, &x); x 587 fs/gfs2/sys.c if (check_zero && !x) x 591 fs/gfs2/sys.c *field = x; x 22 fs/gfs2/trace_gfs2.h #define glock_trace_name(x) __print_symbolic(x, \ x 31 fs/gfs2/trace_gfs2.h #define block_state_name(x) __print_symbolic(x, \ x 42 fs/gfs2/trace_gfs2.h #define rs_func_name(x) __print_symbolic(x, \ x 160 fs/gfs2/util.h unsigned int x; x 162 fs/gfs2/util.h x = *p; x 164 fs/gfs2/util.h return x; x 236 fs/gfs2/xattr.c unsigned int x; x 247 fs/gfs2/xattr.c for (x = 0; x < ea->ea_num_ptrs; x++, dataptrs++) { x 274 fs/gfs2/xattr.c for (x = 0; x < ea->ea_num_ptrs; x++, dataptrs++) { x 447 fs/gfs2/xattr.c unsigned int x; x 456 fs/gfs2/xattr.c for (x = 0; x < nptrs; x++) { x 458 fs/gfs2/xattr.c bh + x); x 460 fs/gfs2/xattr.c while (x--) x 461 fs/gfs2/xattr.c brelse(bh[x]); x 467 fs/gfs2/xattr.c for (x = 0; x < nptrs; x++) { x 468 fs/gfs2/xattr.c error = gfs2_meta_wait(sdp, bh[x]); x 470 fs/gfs2/xattr.c for (; x < nptrs; x++) x 471 fs/gfs2/xattr.c brelse(bh[x]); x 474 fs/gfs2/xattr.c if (gfs2_metatype_check(sdp, bh[x], GFS2_METATYPE_ED)) { x 475 fs/gfs2/xattr.c for (; x < nptrs; x++) x 476 fs/gfs2/xattr.c brelse(bh[x]); x 481 fs/gfs2/xattr.c pos = bh[x]->b_data + sizeof(struct gfs2_meta_header); x 490 fs/gfs2/xattr.c gfs2_trans_add_meta(ip->i_gl, bh[x]); x 496 fs/gfs2/xattr.c brelse(bh[x]); x 681 fs/gfs2/xattr.c unsigned int x; x 684 fs/gfs2/xattr.c for (x = 0; x < ea->ea_num_ptrs; x++) { x 1257 fs/gfs2/xattr.c unsigned int x; x 1302 fs/gfs2/xattr.c for (x = 0; x < rlist.rl_rgrps; x++) { x 1303 fs/gfs2/xattr.c rgd = gfs2_glock2rgrp(rlist.rl_ghs[x].gh_gl); x 67 fs/hostfs/hostfs.h extern int access_file(char *path, int r, int w, int x); x 765 fs/hostfs/hostfs_kern.c int r = 0, w = 0, x = 0, err; x 772 fs/hostfs/hostfs_kern.c if (desired & MAY_EXEC) x = 1; x 781 fs/hostfs/hostfs_kern.c err = access_file(name, r, w, x); x 55 fs/hostfs/hostfs_user.c int access_file(char *path, int r, int w, int x) x 63 fs/hostfs/hostfs_user.c if (x) x 22 fs/hpfs/dentry.c if (l == 1) if (qstr->name[0]=='.') goto x; x 23 fs/hpfs/dentry.c if (l == 2) if (qstr->name[0]=='.' || qstr->name[1]=='.') goto x; x 28 fs/hpfs/dentry.c x: x 44 fs/hpfs/hpfs_fn.h #define CHKCOND(x,y) if (!(x)) printk y x 55 fs/jffs2/debug.h #define D1(x) x x 57 fs/jffs2/debug.h #define D1(x) x 61 fs/jffs2/debug.h #define D2(x) x x 63 fs/jffs2/debug.h #define D2(x) x 121 fs/jffs2/malloc.c void jffs2_free_full_dirent(struct jffs2_full_dirent *x) x 123 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 124 fs/jffs2/malloc.c kfree(x); x 135 fs/jffs2/malloc.c void jffs2_free_full_dnode(struct jffs2_full_dnode *x) x 137 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 138 fs/jffs2/malloc.c kmem_cache_free(full_dnode_slab, x); x 149 fs/jffs2/malloc.c void jffs2_free_raw_dirent(struct jffs2_raw_dirent *x) x 151 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 152 fs/jffs2/malloc.c kmem_cache_free(raw_dirent_slab, x); x 163 fs/jffs2/malloc.c void jffs2_free_raw_inode(struct jffs2_raw_inode *x) x 165 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 166 fs/jffs2/malloc.c kmem_cache_free(raw_inode_slab, x); x 178 fs/jffs2/malloc.c void jffs2_free_tmp_dnode_info(struct jffs2_tmp_dnode_info *x) x 180 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 181 fs/jffs2/malloc.c kmem_cache_free(tmp_dnode_info_slab, x); x 242 fs/jffs2/malloc.c void jffs2_free_refblock(struct jffs2_raw_node_ref *x) x 244 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 245 fs/jffs2/malloc.c kmem_cache_free(raw_node_ref_slab, x); x 256 fs/jffs2/malloc.c void jffs2_free_node_frag(struct jffs2_node_frag *x) x 258 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 259 fs/jffs2/malloc.c kmem_cache_free(node_frag_slab, x); x 270 fs/jffs2/malloc.c void jffs2_free_inode_cache(struct jffs2_inode_cache *x) x 272 fs/jffs2/malloc.c dbg_memalloc("%p\n", x); x 273 fs/jffs2/malloc.c kmem_cache_free(inode_cache_slab, x); x 36 fs/jffs2/nodelist.h #define cpu_to_je16(x) ((jint16_t){x}) x 37 fs/jffs2/nodelist.h #define cpu_to_je32(x) ((jint32_t){x}) x 38 fs/jffs2/nodelist.h #define cpu_to_jemode(x) ((jmode_t){os_to_jffs2_mode(x)}) x 40 fs/jffs2/nodelist.h #define constant_cpu_to_je16(x) ((jint16_t){x}) x 41 fs/jffs2/nodelist.h #define constant_cpu_to_je32(x) ((jint32_t){x}) x 43 fs/jffs2/nodelist.h #define je16_to_cpu(x) ((x).v16) x 44 fs/jffs2/nodelist.h #define je32_to_cpu(x) ((x).v32) x 45 fs/jffs2/nodelist.h #define jemode_to_cpu(x) (jffs2_to_os_mode((x).m)) x 47 fs/jffs2/nodelist.h #define cpu_to_je16(x) ((jint16_t){cpu_to_be16(x)}) x 48 fs/jffs2/nodelist.h #define cpu_to_je32(x) ((jint32_t){cpu_to_be32(x)}) x 49 fs/jffs2/nodelist.h #define cpu_to_jemode(x) ((jmode_t){cpu_to_be32(os_to_jffs2_mode(x))}) x 51 fs/jffs2/nodelist.h #define constant_cpu_to_je16(x) ((jint16_t){__constant_cpu_to_be16(x)}) x 52 fs/jffs2/nodelist.h #define constant_cpu_to_je32(x) ((jint32_t){__constant_cpu_to_be32(x)}) x 54 fs/jffs2/nodelist.h #define je16_to_cpu(x) (be16_to_cpu(x.v16)) x 55 fs/jffs2/nodelist.h #define je32_to_cpu(x) (be32_to_cpu(x.v32)) x 56 fs/jffs2/nodelist.h #define jemode_to_cpu(x) (be32_to_cpu(jffs2_to_os_mode((x).m))) x 58 fs/jffs2/nodelist.h #define cpu_to_je16(x) ((jint16_t){cpu_to_le16(x)}) x 59 fs/jffs2/nodelist.h #define cpu_to_je32(x) ((jint32_t){cpu_to_le32(x)}) x 60 fs/jffs2/nodelist.h #define cpu_to_jemode(x) ((jmode_t){cpu_to_le32(os_to_jffs2_mode(x))}) x 62 fs/jffs2/nodelist.h #define constant_cpu_to_je16(x) ((jint16_t){__constant_cpu_to_le16(x)}) x 63 fs/jffs2/nodelist.h #define constant_cpu_to_je32(x) ((jint32_t){__constant_cpu_to_le32(x)}) x 65 fs/jffs2/nodelist.h #define je16_to_cpu(x) (le16_to_cpu(x.v16)) x 66 fs/jffs2/nodelist.h #define je32_to_cpu(x) (le32_to_cpu(x.v32)) x 67 fs/jffs2/nodelist.h #define jemode_to_cpu(x) (le32_to_cpu(jffs2_to_os_mode((x).m))) x 314 fs/jffs2/nodelist.h #define PAD(x) (((x)+3)&~3) x 16 fs/jffs2/os-linux.h #define os_to_jffs2_mode(x) (x) x 17 fs/jffs2/os-linux.h #define jffs2_to_os_mode(x) (x) x 65 fs/jffs2/os-linux.h #define SECTOR_ADDR(x) ( (((unsigned long)(x) / c->sector_size) * c->sector_size) ) x 1143 fs/jffs2/scan.c uint32_t x; x 1146 fs/jffs2/scan.c x = count_list(&c->clean_list); x 1147 fs/jffs2/scan.c if (x) { x 1148 fs/jffs2/scan.c rotateby = pseudo_random % x; x 1152 fs/jffs2/scan.c x = count_list(&c->very_dirty_list); x 1153 fs/jffs2/scan.c if (x) { x 1154 fs/jffs2/scan.c rotateby = pseudo_random % x; x 1158 fs/jffs2/scan.c x = count_list(&c->dirty_list); x 1159 fs/jffs2/scan.c if (x) { x 1160 fs/jffs2/scan.c rotateby = pseudo_random % x; x 1164 fs/jffs2/scan.c x = count_list(&c->erasable_list); x 1165 fs/jffs2/scan.c if (x) { x 1166 fs/jffs2/scan.c rotateby = pseudo_random % x; x 89 fs/jffs2/summary.c je32_to_cpu(item->x.xid), je32_to_cpu(item->x.version)); x 321 fs/jffs2/summary.c temp->nodetype = node->x.nodetype; x 322 fs/jffs2/summary.c temp->xid = node->x.xid; x 323 fs/jffs2/summary.c temp->version = node->x.version; x 324 fs/jffs2/summary.c temp->totlen = node->x.totlen; x 760 fs/jffs2/summary.c sxattr_ptr->nodetype = temp->x.nodetype; x 761 fs/jffs2/summary.c sxattr_ptr->xid = temp->x.xid; x 762 fs/jffs2/summary.c sxattr_ptr->version = temp->x.version; x 763 fs/jffs2/summary.c sxattr_ptr->offset = temp->x.offset; x 764 fs/jffs2/summary.c sxattr_ptr->totlen = temp->x.totlen; x 34 fs/jffs2/summary.h #define JFFS2_SUMMARY_DIRENT_SIZE(x) (sizeof(struct jffs2_sum_dirent_flash) + (x)) x 87 fs/jffs2/summary.h struct jffs2_sum_xattr_flash x; x 145 fs/jffs2/summary.h struct jffs2_sum_xattr_mem x; x 35 fs/jffs2/wbuf.c #define PAGE_DIV(x) ( ((unsigned long)(x) / (unsigned long)(c->wbuf_pagesize)) * (unsigned long)(c->wbuf_pagesize) ) x 36 fs/jffs2/wbuf.c #define PAGE_MOD(x) ( (unsigned long)(x) % (unsigned long)(c->wbuf_pagesize) ) x 100 fs/jfs/jfs_debug.h #define INCREMENT(x) ((x)++) x 101 fs/jfs/jfs_debug.h #define DECREMENT(x) ((x)--) x 102 fs/jfs/jfs_debug.h #define HIGHWATERMARK(x,y) ((x) = max((x), (y))) x 104 fs/jfs/jfs_debug.h #define INCREMENT(x) x 105 fs/jfs/jfs_debug.h #define DECREMENT(x) x 106 fs/jfs/jfs_debug.h #define HIGHWATERMARK(x,y) x 2961 fs/jfs/jfs_dmap.c int ti, n = 0, k, x = 0; x 2978 fs/jfs/jfs_dmap.c for (x = ti, n = 0; n < 4; n++) { x 2982 fs/jfs/jfs_dmap.c if (l2nb <= tp->dmt_stree[x + n]) x 2995 fs/jfs/jfs_dmap.c *leafidx = x + n - le32_to_cpu(tp->dmt_leafidx); x 3659 fs/jfs/jfs_dtree.c wchar_t *kname, x; x 3715 fs/jfs/jfs_dtree.c x = UniToupper(le16_to_cpu(*name)); x 3717 fs/jfs/jfs_dtree.c x = le16_to_cpu(*name); x 3718 fs/jfs/jfs_dtree.c if ((rc = *kname - x)) x 3735 fs/jfs/jfs_dtree.c x = UniToupper(le16_to_cpu(*name)); x 3737 fs/jfs/jfs_dtree.c x = le16_to_cpu(*name); x 3739 fs/jfs/jfs_dtree.c if ((rc = *kname - x)) x 137 fs/jfs/jfs_filsys.h #define LBOFFSET(x) ((x) & (PBSIZE - 1)) x 138 fs/jfs/jfs_filsys.h #define LBNUMBER(x) ((x) >> L2PBSIZE) x 1878 fs/namei.c #define HASH_MIX(x, y, a) \ x 1879 fs/namei.c ( x ^= (a), \ x 1880 fs/namei.c y ^= x, x = rol64(x,12),\ x 1881 fs/namei.c x += y, y = rol64(y,45),\ x 1889 fs/namei.c static inline unsigned int fold_hash(unsigned long x, unsigned long y) x 1891 fs/namei.c y ^= x * GOLDEN_RATIO_64; x 1908 fs/namei.c #define HASH_MIX(x, y, a) \ x 1909 fs/namei.c ( x ^= (a), \ x 1910 fs/namei.c y ^= x, x = rol32(x, 7),\ x 1911 fs/namei.c x += y, y = rol32(y,20),\ x 1914 fs/namei.c static inline unsigned int fold_hash(unsigned long x, unsigned long y) x 1917 fs/namei.c return __hash_32(y ^ __hash_32(x)); x 1931 fs/namei.c unsigned long a, x = 0, y = (unsigned long)salt; x 1939 fs/namei.c HASH_MIX(x, y, a); x 1943 fs/namei.c x ^= a & bytemask_from_count(len); x 1945 fs/namei.c return fold_hash(x, y); x 1952 fs/namei.c unsigned long a = 0, x = 0, y = (unsigned long)salt; x 1960 fs/namei.c HASH_MIX(x, y, a); x 1968 fs/namei.c x ^= a & zero_bytemask(mask); x 1970 fs/namei.c return hashlen_create(fold_hash(x, y), len + find_zero(mask)); x 1980 fs/namei.c unsigned long a = 0, b, x = 0, y = (unsigned long)salt; x 1988 fs/namei.c HASH_MIX(x, y, a); x 1998 fs/namei.c x ^= a & zero_bytemask(mask); x 2000 fs/namei.c return hashlen_create(fold_hash(x, y), len + find_zero(mask)); x 1102 fs/nfs/nfstrace.h #define nfs_show_status(x) \ x 1103 fs/nfs/nfstrace.h __print_symbolic(x, \ x 67 fs/nfs/pnfs_dev.c u32 x = 0; x 70 fs/nfs/pnfs_dev.c x *= 37; x 71 fs/nfs/pnfs_dev.c x += *cptr++; x 73 fs/nfs/pnfs_dev.c return x & NFS4_DEVICE_ID_HASH_MASK; x 197 fs/nfs_common/nfsacl.c cmp_acl_entry(const void *x, const void *y) x 199 fs/nfs_common/nfsacl.c const struct posix_acl_entry *a = x, *b = y; x 406 fs/nfsd/nfs4state.c u32 x = 0; x 408 fs/nfsd/nfs4state.c x *= 37; x 409 fs/nfsd/nfs4state.c x += *cptr++; x 411 fs/nfsd/nfs4state.c return x; x 111 fs/nfsd/nfs4xdr.c #define READMEM(x,nbytes) do { \ x 112 fs/nfsd/nfs4xdr.c x = (char *)p; \ x 115 fs/nfsd/nfs4xdr.c #define SAVEMEM(x,nbytes) do { \ x 116 fs/nfsd/nfs4xdr.c if (!(x = (p==argp->tmp || p == argp->tmpp) ? \ x 125 fs/nfsd/nfs4xdr.c #define COPYMEM(x,nbytes) do { \ x 126 fs/nfsd/nfs4xdr.c memcpy((x), p, nbytes); \ x 873 fs/nfsd/nfs4xdr.c static __be32 nfsd4_decode_share_deny(struct nfsd4_compoundargs *argp, u32 *x) x 878 fs/nfsd/nfs4xdr.c *x = be32_to_cpup(p++); x 880 fs/nfsd/nfs4xdr.c if (*x & ~NFS4_SHARE_DENY_BOTH) x 19 fs/ntfs/endian.h static inline s16 sle16_to_cpu(sle16 x) x 21 fs/ntfs/endian.h return le16_to_cpu((__force le16)x); x 24 fs/ntfs/endian.h static inline s32 sle32_to_cpu(sle32 x) x 26 fs/ntfs/endian.h return le32_to_cpu((__force le32)x); x 29 fs/ntfs/endian.h static inline s64 sle64_to_cpu(sle64 x) x 31 fs/ntfs/endian.h return le64_to_cpu((__force le64)x); x 34 fs/ntfs/endian.h static inline s16 sle16_to_cpup(sle16 *x) x 36 fs/ntfs/endian.h return le16_to_cpu(*(__force le16*)x); x 39 fs/ntfs/endian.h static inline s32 sle32_to_cpup(sle32 *x) x 41 fs/ntfs/endian.h return le32_to_cpu(*(__force le32*)x); x 44 fs/ntfs/endian.h static inline s64 sle64_to_cpup(sle64 *x) x 46 fs/ntfs/endian.h return le64_to_cpu(*(__force le64*)x); x 49 fs/ntfs/endian.h static inline sle16 cpu_to_sle16(s16 x) x 51 fs/ntfs/endian.h return (__force sle16)cpu_to_le16(x); x 54 fs/ntfs/endian.h static inline sle32 cpu_to_sle32(s32 x) x 56 fs/ntfs/endian.h return (__force sle32)cpu_to_le32(x); x 59 fs/ntfs/endian.h static inline sle64 cpu_to_sle64(s64 x) x 61 fs/ntfs/endian.h return (__force sle64)cpu_to_le64(x); x 64 fs/ntfs/endian.h static inline sle16 cpu_to_sle16p(s16 *x) x 66 fs/ntfs/endian.h return (__force sle16)cpu_to_le16(*x); x 69 fs/ntfs/endian.h static inline sle32 cpu_to_sle32p(s32 *x) x 71 fs/ntfs/endian.h return (__force sle32)cpu_to_le32(*x); x 74 fs/ntfs/endian.h static inline sle64 cpu_to_sle64p(s64 *x) x 76 fs/ntfs/endian.h return (__force sle64)cpu_to_le64(*x); x 120 fs/ntfs/layout.h static inline bool __ntfs_is_magic(le32 x, NTFS_RECORD_TYPE r) x 122 fs/ntfs/layout.h return (x == r); x 124 fs/ntfs/layout.h #define ntfs_is_magic(x, m) __ntfs_is_magic(x, magic_##m) x 135 fs/ntfs/layout.h #define ntfs_is_file_record(x) ( ntfs_is_magic (x, FILE) ) x 137 fs/ntfs/layout.h #define ntfs_is_mft_record(x) ( ntfs_is_file_record (x) ) x 139 fs/ntfs/layout.h #define ntfs_is_indx_record(x) ( ntfs_is_magic (x, INDX) ) x 141 fs/ntfs/layout.h #define ntfs_is_hole_record(x) ( ntfs_is_magic (x, HOLE) ) x 144 fs/ntfs/layout.h #define ntfs_is_rstr_record(x) ( ntfs_is_magic (x, RSTR) ) x 146 fs/ntfs/layout.h #define ntfs_is_rcrd_record(x) ( ntfs_is_magic (x, RCRD) ) x 149 fs/ntfs/layout.h #define ntfs_is_chkd_record(x) ( ntfs_is_magic (x, CHKD) ) x 152 fs/ntfs/layout.h #define ntfs_is_baad_record(x) ( ntfs_is_magic (x, BAAD) ) x 155 fs/ntfs/layout.h #define ntfs_is_empty_record(x) ( ntfs_is_magic (x, empty) ) x 296 fs/ntfs/layout.h #define MREF(x) ((unsigned long)((x) & MFT_REF_MASK_CPU)) x 297 fs/ntfs/layout.h #define MSEQNO(x) ((u16)(((x) >> 48) & 0xffff)) x 298 fs/ntfs/layout.h #define MREF_LE(x) ((unsigned long)(le64_to_cpu(x) & MFT_REF_MASK_CPU)) x 299 fs/ntfs/layout.h #define MSEQNO_LE(x) ((u16)((le64_to_cpu(x) >> 48) & 0xffff)) x 301 fs/ntfs/layout.h #define IS_ERR_MREF(x) (((x) & 0x0000800000000000ULL) ? true : false) x 302 fs/ntfs/layout.h #define ERR_MREF(x) ((u64)((s64)(x))) x 303 fs/ntfs/layout.h #define MREF_ERR(x) ((int)((s64)(x))) x 121 fs/ntfs/ntfs.h static inline int ntfs_ffs(int x) x 125 fs/ntfs/ntfs.h if (!x) x 127 fs/ntfs/ntfs.h if (!(x & 0xffff)) { x 128 fs/ntfs/ntfs.h x >>= 16; x 131 fs/ntfs/ntfs.h if (!(x & 0xff)) { x 132 fs/ntfs/ntfs.h x >>= 8; x 135 fs/ntfs/ntfs.h if (!(x & 0xf)) { x 136 fs/ntfs/ntfs.h x >>= 4; x 139 fs/ntfs/ntfs.h if (!(x & 3)) { x 140 fs/ntfs/ntfs.h x >>= 2; x 143 fs/ntfs/ntfs.h if (!(x & 1)) { x 144 fs/ntfs/ntfs.h x >>= 1; x 30 fs/omfs/bitmap.c int x; x 33 fs/omfs/bitmap.c x = find_next_bit(*addr, nbits, bit); x 34 fs/omfs/bitmap.c count += x - bit; x 36 fs/omfs/bitmap.c if (x < nbits || count > max) x 508 fs/orangefs/inode.c size_t x; x 509 fs/orangefs/inode.c x = wr->pos + wr->len - (page_offset(page) + offset); x 510 fs/orangefs/inode.c WARN_ON(x > wr->len); x 511 fs/orangefs/inode.c wr->len -= x; x 518 fs/orangefs/inode.c size_t x; x 519 fs/orangefs/inode.c x = page_offset(page) + offset + length - wr->pos; x 520 fs/orangefs/inode.c WARN_ON(x > wr->len); x 521 fs/orangefs/inode.c wr->pos += x; x 522 fs/orangefs/inode.c wr->len -= x; x 290 fs/orangefs/protocol.h #define llu(x) (unsigned long long)(x) x 291 fs/orangefs/protocol.h #define lld(x) (long long)(x) x 238 fs/proc/array.c int x = 0; x 241 fs/proc/array.c if (sigismember(set, i+1)) x |= 1; x 242 fs/proc/array.c if (sigismember(set, i+2)) x |= 2; x 243 fs/proc/array.c if (sigismember(set, i+3)) x |= 4; x 244 fs/proc/array.c if (sigismember(set, i+4)) x |= 8; x 245 fs/proc/array.c seq_putc(m, hex_asc[x]); x 49 fs/reiserfs/procfs.c #define SF( x ) ( r -> x ) x 50 fs/reiserfs/procfs.c #define SFP( x ) SF( s_proc_info_data.x ) x 51 fs/reiserfs/procfs.c #define SFPL( x ) SFP( x[ level ] ) x 52 fs/reiserfs/procfs.c #define SFPF( x ) SFP( scan_bitmap.x ) x 53 fs/reiserfs/procfs.c #define SFPJ( x ) SFP( journal.x ) x 55 fs/reiserfs/procfs.c #define D2C( x ) le16_to_cpu( x ) x 56 fs/reiserfs/procfs.c #define D4C( x ) le32_to_cpu( x ) x 57 fs/reiserfs/procfs.c #define DF( x ) D2C( rs -> s_v1.x ) x 58 fs/reiserfs/procfs.c #define DFL( x ) D4C( rs -> s_v1.x ) x 65 fs/reiserfs/procfs.c #define DJF( x ) le32_to_cpu( rs -> x ) x 66 fs/reiserfs/procfs.c #define DJV( x ) le32_to_cpu( s_v1 -> x ) x 67 fs/reiserfs/procfs.c #define DJP( x ) le32_to_cpu( jp -> x ) x 68 fs/reiserfs/procfs.c #define JF( x ) ( r -> s_journal -> x ) x 887 fs/reiserfs/reiserfs.h #define _ROUND_UP(x,n) (((x)+(n)-1u) & ~((n)-1u)) x 894 fs/reiserfs/reiserfs.h #define ROUND_UP(x) _ROUND_UP(x,8LL) x 293 fs/stat.c #define valid_dev(x) choose_32_64(old_valid_dev(x),true) x 294 fs/stat.c #define encode_dev(x) choose_32_64(old_encode_dev,new_encode_dev)(x) x 175 fs/sysv/sysv.h static inline u32 PDP_swab(u32 x) x 178 fs/sysv/sysv.h return ((x & 0xffff) << 16) | ((x & 0xffff0000) >> 16); x 181 fs/sysv/sysv.h return ((x & 0xff00ff) << 8) | ((x & 0xff00ff00) >> 8); x 1213 fs/ubifs/super.c long long x, y; x 1512 fs/ubifs/super.c x = (long long)c->main_lebs * c->leb_size; x 1518 fs/ubifs/super.c x, x >> 20, c->main_lebs, x 1559 fs/ubifs/super.c x = (long long)c->main_lebs * c->dark_wm; x 1561 fs/ubifs/super.c x, x >> 10, x >> 20); x 37 fs/udf/udfdecl.h #define udf_fixed_to_variable(x) ( ( ( (x) >> 5 ) * 39 ) + ( (x) & 0x0000001F ) ) x 38 fs/udf/udfdecl.h #define udf_variable_to_fixed(x) ( ( ( (x) / 39 ) << 5 ) + ( (x) % 39 ) ) x 229 fs/ufs/ufs_fs.h #define ufs_inotocg(x) ((x) / uspi->s_ipg) x 230 fs/ufs/ufs_fs.h #define ufs_inotocgoff(x) ((x) % uspi->s_ipg) x 231 fs/ufs/ufs_fs.h #define ufs_inotofsba(x) (((u64)ufs_cgimin(ufs_inotocg(x))) + ufs_inotocgoff(x) / uspi->s_inopf) x 232 fs/ufs/ufs_fs.h #define ufs_inotofsbo(x) ((x) % uspi->s_inopf) x 63 fs/unicode/mkutf8data.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 198 fs/xfs/libxfs/xfs_alloc_btree.c __u32 x; x 200 fs/xfs/libxfs/xfs_alloc_btree.c x = be32_to_cpu(rec->alloc.ar_startblock); x 201 fs/xfs/libxfs/xfs_alloc_btree.c x += be32_to_cpu(rec->alloc.ar_blockcount) - 1; x 202 fs/xfs/libxfs/xfs_alloc_btree.c key->alloc.ar_startblock = cpu_to_be32(x); x 3051 fs/xfs/libxfs/xfs_bmap.c #define ISVALID(x,y) \ x 3053 fs/xfs/libxfs/xfs_bmap.c (x) < mp->m_sb.sb_rblocks : \ x 3054 fs/xfs/libxfs/xfs_bmap.c XFS_FSB_TO_AGNO(mp, x) == XFS_FSB_TO_AGNO(mp, y) && \ x 3055 fs/xfs/libxfs/xfs_bmap.c XFS_FSB_TO_AGNO(mp, x) < mp->m_sb.sb_agcount && \ x 3056 fs/xfs/libxfs/xfs_bmap.c XFS_FSB_TO_AGBNO(mp, x) < mp->m_sb.sb_agblocks) x 763 fs/xfs/libxfs/xfs_da_format.h #define XFS_ATTR_NSP_ARGS_TO_ONDISK(x) (((x) & ATTR_ROOT ? XFS_ATTR_ROOT : 0) |\ x 764 fs/xfs/libxfs/xfs_da_format.h ((x) & ATTR_SECURE ? XFS_ATTR_SECURE : 0)) x 765 fs/xfs/libxfs/xfs_da_format.h #define XFS_ATTR_NSP_ONDISK_TO_ARGS(x) (((x) & XFS_ATTR_ROOT ? ATTR_ROOT : 0) |\ x 766 fs/xfs/libxfs/xfs_da_format.h ((x) & XFS_ATTR_SECURE ? ATTR_SECURE : 0)) x 1559 fs/xfs/libxfs/xfs_format.h static inline int isnullstartblock(xfs_fsblock_t x) x 1561 fs/xfs/libxfs/xfs_format.h return ((x) & STARTBLOCKMASK) == STARTBLOCKMASK; x 1570 fs/xfs/libxfs/xfs_format.h static inline xfs_filblks_t startblockval(xfs_fsblock_t x) x 1572 fs/xfs/libxfs/xfs_format.h return (xfs_filblks_t)((x) & ~STARTBLOCKMASK); x 181 fs/xfs/libxfs/xfs_ialloc_btree.c __u32 x; x 183 fs/xfs/libxfs/xfs_ialloc_btree.c x = be32_to_cpu(rec->inobt.ir_startino); x 184 fs/xfs/libxfs/xfs_ialloc_btree.c x += XFS_INODES_PER_CHUNK - 1; x 185 fs/xfs/libxfs/xfs_ialloc_btree.c key->inobt.ir_startino = cpu_to_be32(x); x 150 fs/xfs/libxfs/xfs_refcount_btree.c __u32 x; x 152 fs/xfs/libxfs/xfs_refcount_btree.c x = be32_to_cpu(rec->refc.rc_startblock); x 153 fs/xfs/libxfs/xfs_refcount_btree.c x += be32_to_cpu(rec->refc.rc_blockcount) - 1; x 154 fs/xfs/libxfs/xfs_refcount_btree.c key->refc.rc_startblock = cpu_to_be32(x); x 51 fs/xfs/libxfs/xfs_rmap.h __u64 x; x 53 fs/xfs/libxfs/xfs_rmap.h x = XFS_RMAP_OFF(irec->rm_offset); x 55 fs/xfs/libxfs/xfs_rmap.h x |= XFS_RMAP_OFF_ATTR_FORK; x 57 fs/xfs/libxfs/xfs_rmap.h x |= XFS_RMAP_OFF_BMBT_BLOCK; x 59 fs/xfs/libxfs/xfs_rmap.h x |= XFS_RMAP_OFF_UNWRITTEN; x 60 fs/xfs/libxfs/xfs_rmap.h return x; x 232 fs/xfs/libxfs/xfs_rmap_btree.c __u64 x, y; x 239 fs/xfs/libxfs/xfs_rmap_btree.c x = be64_to_cpu(kp->rm_owner); x 241 fs/xfs/libxfs/xfs_rmap_btree.c if (x > y) x 243 fs/xfs/libxfs/xfs_rmap_btree.c else if (y > x) x 246 fs/xfs/libxfs/xfs_rmap_btree.c x = XFS_RMAP_OFF(be64_to_cpu(kp->rm_offset)); x 248 fs/xfs/libxfs/xfs_rmap_btree.c if (x > y) x 250 fs/xfs/libxfs/xfs_rmap_btree.c else if (y > x) x 264 fs/xfs/libxfs/xfs_rmap_btree.c __u64 x, y; x 271 fs/xfs/libxfs/xfs_rmap_btree.c x = be64_to_cpu(kp1->rm_owner); x 273 fs/xfs/libxfs/xfs_rmap_btree.c if (x > y) x 275 fs/xfs/libxfs/xfs_rmap_btree.c else if (y > x) x 278 fs/xfs/libxfs/xfs_rmap_btree.c x = XFS_RMAP_OFF(be64_to_cpu(kp1->rm_offset)); x 280 fs/xfs/libxfs/xfs_rmap_btree.c if (x > y) x 282 fs/xfs/libxfs/xfs_rmap_btree.c else if (y > x) x 376 fs/xfs/libxfs/xfs_rmap_btree.c uint32_t x; x 381 fs/xfs/libxfs/xfs_rmap_btree.c x = be32_to_cpu(k1->rmap.rm_startblock); x 383 fs/xfs/libxfs/xfs_rmap_btree.c if (x < y) x 385 fs/xfs/libxfs/xfs_rmap_btree.c else if (x > y) x 406 fs/xfs/libxfs/xfs_rmap_btree.c uint32_t x; x 411 fs/xfs/libxfs/xfs_rmap_btree.c x = be32_to_cpu(r1->rmap.rm_startblock); x 413 fs/xfs/libxfs/xfs_rmap_btree.c if (x < y) x 415 fs/xfs/libxfs/xfs_rmap_btree.c else if (x > y) x 43 fs/xfs/xfs_error.h #define XFS_WANT_CORRUPTED_GOTO(mp, x, l) \ x 45 fs/xfs/xfs_error.h int fs_is_ok = (x); \ x 55 fs/xfs/xfs_error.h #define XFS_WANT_CORRUPTED_RETURN(mp, x) \ x 57 fs/xfs/xfs_error.h int fs_is_ok = (x); \ x 141 fs/xfs/xfs_linux.h #define howmany(x, y) (((x)+((y)-1))/(y)) x 208 fs/xfs/xfs_linux.h static inline uint64_t roundup_64(uint64_t x, uint32_t y) x 210 fs/xfs/xfs_linux.h x += y - 1; x 211 fs/xfs/xfs_linux.h do_div(x, y); x 212 fs/xfs/xfs_linux.h return x * y; x 215 fs/xfs/xfs_linux.h static inline uint64_t howmany_64(uint64_t x, uint32_t y) x 217 fs/xfs/xfs_linux.h x += y - 1; x 218 fs/xfs/xfs_linux.h do_div(x, y); x 219 fs/xfs/xfs_linux.h return x; x 91 fs/xfs/xfs_log.h #define XFS_LSN_CMP(x,y) _lsn_cmp(x,y) x 497 include/acpi/actypes.h #define ACPI_ARRAY_LENGTH(x) (sizeof(x) / sizeof((x)[0])) x 31 include/asm-generic/4level-fixup.h #define pud_free_tlb(tlb, x, addr) do { } while (0) x 32 include/asm-generic/4level-fixup.h #define pud_free(mm, x) do { } while (0) x 33 include/asm-generic/4level-fixup.h #define __pud_free_tlb(tlb, x, addr) do { } while (0) x 48 include/asm-generic/5level-fixup.h #define __p4d(x) __pgd(x) x 52 include/asm-generic/5level-fixup.h #define p4d_free_tlb(tlb, x, addr) do { } while (0) x 53 include/asm-generic/5level-fixup.h #define p4d_free(mm, x) do { } while (0) x 54 include/asm-generic/5level-fixup.h #define __p4d_free_tlb(tlb, x, addr) do { } while (0) x 13 include/asm-generic/bitops/builtin-ffs.h static __always_inline int ffs(int x) x 15 include/asm-generic/bitops/builtin-ffs.h return __builtin_ffs(x); x 12 include/asm-generic/bitops/builtin-fls.h static __always_inline int fls(unsigned int x) x 14 include/asm-generic/bitops/builtin-fls.h return x ? sizeof(x) * 8 - __builtin_clz(x) : 0; x 13 include/asm-generic/bitops/ffs.h static inline int ffs(int x) x 17 include/asm-generic/bitops/ffs.h if (!x) x 19 include/asm-generic/bitops/ffs.h if (!(x & 0xffff)) { x 20 include/asm-generic/bitops/ffs.h x >>= 16; x 23 include/asm-generic/bitops/ffs.h if (!(x & 0xff)) { x 24 include/asm-generic/bitops/ffs.h x >>= 8; x 27 include/asm-generic/bitops/ffs.h if (!(x & 0xf)) { x 28 include/asm-generic/bitops/ffs.h x >>= 4; x 31 include/asm-generic/bitops/ffs.h if (!(x & 3)) { x 32 include/asm-generic/bitops/ffs.h x >>= 2; x 35 include/asm-generic/bitops/ffs.h if (!(x & 1)) { x 36 include/asm-generic/bitops/ffs.h x >>= 1; x 11 include/asm-generic/bitops/ffz.h #define ffz(x) __ffs(~(x)) x 13 include/asm-generic/bitops/fls.h static __always_inline int fls(unsigned int x) x 17 include/asm-generic/bitops/fls.h if (!x) x 19 include/asm-generic/bitops/fls.h if (!(x & 0xffff0000u)) { x 20 include/asm-generic/bitops/fls.h x <<= 16; x 23 include/asm-generic/bitops/fls.h if (!(x & 0xff000000u)) { x 24 include/asm-generic/bitops/fls.h x <<= 8; x 27 include/asm-generic/bitops/fls.h if (!(x & 0xf0000000u)) { x 28 include/asm-generic/bitops/fls.h x <<= 4; x 31 include/asm-generic/bitops/fls.h if (!(x & 0xc0000000u)) { x 32 include/asm-generic/bitops/fls.h x <<= 2; x 35 include/asm-generic/bitops/fls.h if (!(x & 0x80000000u)) { x 36 include/asm-generic/bitops/fls.h x <<= 1; x 19 include/asm-generic/bitops/fls64.h static __always_inline int fls64(__u64 x) x 21 include/asm-generic/bitops/fls64.h __u32 h = x >> 32; x 24 include/asm-generic/bitops/fls64.h return fls(x); x 27 include/asm-generic/bitops/fls64.h static __always_inline int fls64(__u64 x) x 29 include/asm-generic/bitops/fls64.h if (x == 0) x 31 include/asm-generic/bitops/fls64.h return __fls(x) + 1; x 226 include/asm-generic/bug.h # define WARN_ON_SMP(x) WARN_ON(x) x 235 include/asm-generic/bug.h # define WARN_ON_SMP(x) ({0;}) x 26 include/asm-generic/cmpxchg.h unsigned long __xchg(unsigned long x, volatile void *ptr, int size) x 33 include/asm-generic/cmpxchg.h return __xchg_u8(x, ptr); x 37 include/asm-generic/cmpxchg.h *(volatile u8 *)ptr = x; x 44 include/asm-generic/cmpxchg.h return __xchg_u16(x, ptr); x 48 include/asm-generic/cmpxchg.h *(volatile u16 *)ptr = x; x 55 include/asm-generic/cmpxchg.h return __xchg_u32(x, ptr); x 59 include/asm-generic/cmpxchg.h *(volatile u32 *)ptr = x; x 67 include/asm-generic/cmpxchg.h return __xchg_u64(x, ptr); x 71 include/asm-generic/cmpxchg.h *(volatile u64 *)ptr = x; x 79 include/asm-generic/cmpxchg.h return x; x 83 include/asm-generic/cmpxchg.h #define xchg(ptr, x) ({ \ x 85 include/asm-generic/cmpxchg.h __xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))); \ x 13 include/asm-generic/exec.h #define arch_align_stack(x) (x) x 5 include/asm-generic/export.h #define KSYM_FUNC(x) x x 21 include/asm-generic/fixmap.h #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) x 22 include/asm-generic/fixmap.h #define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) x 25 include/asm-generic/int-ll64.h #define S8_C(x) x x 26 include/asm-generic/int-ll64.h #define U8_C(x) x ## U x 27 include/asm-generic/int-ll64.h #define S16_C(x) x x 28 include/asm-generic/int-ll64.h #define U16_C(x) x ## U x 29 include/asm-generic/int-ll64.h #define S32_C(x) x x 30 include/asm-generic/int-ll64.h #define U32_C(x) x ## U x 31 include/asm-generic/int-ll64.h #define S64_C(x) x ## LL x 32 include/asm-generic/int-ll64.h #define U64_C(x) x ## ULL x 36 include/asm-generic/int-ll64.h #define S8_C(x) x x 37 include/asm-generic/int-ll64.h #define U8_C(x) x x 38 include/asm-generic/int-ll64.h #define S16_C(x) x x 39 include/asm-generic/int-ll64.h #define U16_C(x) x x 40 include/asm-generic/int-ll64.h #define S32_C(x) x x 41 include/asm-generic/int-ll64.h #define U32_C(x) x x 42 include/asm-generic/int-ll64.h #define S64_C(x) x x 43 include/asm-generic/int-ll64.h #define U64_C(x) x x 324 include/asm-generic/io.h u8 x = __raw_readb(addr); x 325 include/asm-generic/io.h *buf++ = x; x 340 include/asm-generic/io.h u16 x = __raw_readw(addr); x 341 include/asm-generic/io.h *buf++ = x; x 356 include/asm-generic/io.h u32 x = __raw_readl(addr); x 357 include/asm-generic/io.h *buf++ = x; x 373 include/asm-generic/io.h u64 x = __raw_readq(addr); x 374 include/asm-generic/io.h *buf++ = x; x 888 include/asm-generic/io.h #define __io_virt(x) ((void __force *)(x)) x 51 include/asm-generic/page.h #define pte_val(x) ((x).pte) x 52 include/asm-generic/page.h #define pmd_val(x) ((&x)->pmd[0]) x 53 include/asm-generic/page.h #define pgd_val(x) ((x).pgd) x 54 include/asm-generic/page.h #define pgprot_val(x) ((x).pgprot) x 56 include/asm-generic/page.h #define __pte(x) ((pte_t) { (x) } ) x 57 include/asm-generic/page.h #define __pmd(x) ((pmd_t) { (x) } ) x 58 include/asm-generic/page.h #define __pgd(x) ((pgd_t) { (x) } ) x 59 include/asm-generic/page.h #define __pgprot(x) ((pgprot_t) { (x) } ) x 78 include/asm-generic/page.h #define __va(x) ((void *)((unsigned long) (x))) x 79 include/asm-generic/page.h #define __pa(x) ((unsigned long) (x)) x 21 include/asm-generic/percpu.h #define per_cpu_offset(x) (__per_cpu_offset[x]) x 46 include/asm-generic/pgtable-nop4d-hack.h #define pud_val(x) (pgd_val((x).pgd)) x 47 include/asm-generic/pgtable-nop4d-hack.h #define __pud(x) ((pud_t) { __pgd(x) }) x 57 include/asm-generic/pgtable-nop4d-hack.h #define pud_free(mm, x) do { } while (0) x 58 include/asm-generic/pgtable-nop4d-hack.h #define __pud_free_tlb(tlb, x, a) do { } while (0) x 41 include/asm-generic/pgtable-nop4d.h #define p4d_val(x) (pgd_val((x).pgd)) x 42 include/asm-generic/pgtable-nop4d.h #define __p4d(x) ((p4d_t) { __pgd(x) }) x 52 include/asm-generic/pgtable-nop4d.h #define p4d_free(mm, x) do { } while (0) x 53 include/asm-generic/pgtable-nop4d.h #define __p4d_free_tlb(tlb, x, a) do { } while (0) x 49 include/asm-generic/pgtable-nopmd.h #define pmd_val(x) (pud_val((x).pud)) x 50 include/asm-generic/pgtable-nopmd.h #define __pmd(x) ((pmd_t) { __pud(x) } ) x 63 include/asm-generic/pgtable-nopmd.h #define __pmd_free_tlb(tlb, x, a) do { } while (0) x 50 include/asm-generic/pgtable-nopud.h #define pud_val(x) (p4d_val((x).p4d)) x 51 include/asm-generic/pgtable-nopud.h #define __pud(x) ((pud_t) { __p4d(x) }) x 61 include/asm-generic/pgtable-nopud.h #define pud_free(mm, x) do { } while (0) x 62 include/asm-generic/pgtable-nopud.h #define __pud_free_tlb(tlb, x, a) do { } while (0) x 112 include/asm-generic/uaccess.h #define __put_user(x, ptr) \ x 114 include/asm-generic/uaccess.h __typeof__(*(ptr)) __x = (x); \ x 132 include/asm-generic/uaccess.h #define put_user(x, ptr) \ x 137 include/asm-generic/uaccess.h __put_user((x), ((__typeof__(*(ptr)) __user *)__p)) : \ x 143 include/asm-generic/uaccess.h static inline int __put_user_fn(size_t size, void __user *ptr, void *x) x 145 include/asm-generic/uaccess.h return unlikely(raw_copy_to_user(ptr, x, size)) ? -EFAULT : 0; x 154 include/asm-generic/uaccess.h #define __get_user(x, ptr) \ x 163 include/asm-generic/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 170 include/asm-generic/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 177 include/asm-generic/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 184 include/asm-generic/uaccess.h (x) = *(__force __typeof__(*(ptr)) *) &__x; \ x 194 include/asm-generic/uaccess.h #define get_user(x, ptr) \ x 199 include/asm-generic/uaccess.h __get_user((x), (__typeof__(*(ptr)) __user *)__p) :\ x 200 include/asm-generic/uaccess.h ((x) = (__typeof__(*(ptr)))0,-EFAULT); \ x 204 include/asm-generic/uaccess.h static inline int __get_user_fn(size_t size, const void __user *ptr, void *x) x 206 include/asm-generic/uaccess.h return unlikely(raw_copy_from_user(x, ptr, size)) ? -EFAULT : 0; x 19 include/asm-generic/vga.h #define VGA_MAP_MEM(x, s) (unsigned long)phys_to_virt(x) x 22 include/asm-generic/vga.h #define vga_readb(x) (*(x)) x 23 include/asm-generic/vga.h #define vga_writeb(x, y) (*(y) = (x)) x 17 include/crypto/arc4.h u32 x, y; x 176 include/crypto/gf128mul.h static inline u64 gf128mul_mask_from_bit(u64 x, int which) x 179 include/crypto/gf128mul.h return ((s64)(x << (63 - which)) >> 63); x 182 include/crypto/gf128mul.h static inline void gf128mul_x_lle(be128 *r, const be128 *x) x 184 include/crypto/gf128mul.h u64 a = be64_to_cpu(x->a); x 185 include/crypto/gf128mul.h u64 b = be64_to_cpu(x->b); x 195 include/crypto/gf128mul.h static inline void gf128mul_x_bbe(be128 *r, const be128 *x) x 197 include/crypto/gf128mul.h u64 a = be64_to_cpu(x->a); x 198 include/crypto/gf128mul.h u64 b = be64_to_cpu(x->b); x 208 include/crypto/gf128mul.h static inline void gf128mul_x_ble(le128 *r, const le128 *x) x 210 include/crypto/gf128mul.h u64 a = le64_to_cpu(x->a); x 211 include/crypto/gf128mul.h u64 b = le64_to_cpu(x->b); x 230 include/crypto/gf128mul.h void gf128mul_x8_ble(le128 *r, const le128 *x); x 11 include/crypto/xts.h #define XTS_TWEAK_CAST(x) ((void (*)(void *, u8*, const u8*))(x)) x 41 include/drm/bridge/mhl.h #define MHL_DCAP_CAT_PLIM(x) ((x) << 5) x 1415 include/drm/drm_connector.h #define obj_to_connector(x) container_of(x, struct drm_connector, base) x 466 include/drm/drm_crtc.h int (*cursor_move)(struct drm_crtc *crtc, int x, int y); x 994 include/drm/drm_crtc.h int x; x 1134 include/drm/drm_crtc.h uint32_t x; x 1141 include/drm/drm_crtc.h #define obj_to_crtc(x) container_of(x, struct drm_crtc, base) x 51 include/drm/drm_crtc_helper.h int x, int y, x 520 include/drm/drm_dp_helper.h # define DP_GET_SINK_COUNT(x) ((((x) & 0x80) >> 1) | ((x) & 0x3f)) x 986 include/drm/drm_dp_helper.h #define HDCP_2_2_DP_RXSTATUS_READY(x) ((x) & BIT(0)) x 987 include/drm/drm_dp_helper.h #define HDCP_2_2_DP_RXSTATUS_H_PRIME(x) ((x) & BIT(1)) x 988 include/drm/drm_dp_helper.h #define HDCP_2_2_DP_RXSTATUS_PAIRING(x) ((x) & BIT(2)) x 989 include/drm/drm_dp_helper.h #define HDCP_2_2_DP_RXSTATUS_REAUTH_REQ(x) ((x) & BIT(3)) x 990 include/drm/drm_dp_helper.h #define HDCP_2_2_DP_RXSTATUS_LINK_FAILED(x) ((x) & BIT(4)) x 426 include/drm/drm_dp_mst_helper.h #define to_dp_mst_topology_state(x) container_of(x, struct drm_dp_mst_topology_state, base) x 440 include/drm/drm_dp_mst_helper.h #define to_dp_mst_topology_mgr(x) container_of(x, struct drm_dp_mst_topology_mgr, base) x 180 include/drm/drm_encoder.h #define obj_to_encoder(x) container_of(x, struct drm_encoder, base) x 102 include/drm/drm_encoder_slave.h #define to_encoder_slave(x) container_of((x), struct drm_encoder_slave, base) x 128 include/drm/drm_encoder_slave.h #define to_drm_i2c_encoder_driver(x) container_of((x), \ x 188 include/drm/drm_fixed.h static inline s64 drm_fixp_exp(s64 x) x 191 include/drm/drm_fixed.h s64 sum = DRM_FIXED_ONE, term, y = x; x 194 include/drm/drm_fixed.h if (x < 0) x 195 include/drm/drm_fixed.h y = -1 * x; x 205 include/drm/drm_fixed.h if (x < 0) x 216 include/drm/drm_framebuffer.h #define obj_to_fb(x) container_of(x, struct drm_framebuffer, base) x 25 include/drm/drm_hdcp.h #define DRM_HDCP_NUM_DOWNSTREAM(x) (x & 0x7f) x 26 include/drm/drm_hdcp.h #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3)) x 27 include/drm/drm_hdcp.h #define DRM_HDCP_MAX_DEVICE_EXCEEDED(x) (x & BIT(7)) x 108 include/drm/drm_hdcp.h #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0)) x 109 include/drm/drm_hdcp.h #define HDCP_2_2_DP_HDCP_CAPABLE(x) ((x) & BIT(1)) x 113 include/drm/drm_hdcp.h #define HDCP_2_2_HDCP1_DEVICE_CONNECTED(x) ((x) & BIT(0)) x 116 include/drm/drm_hdcp.h #define HDCP_2_2_HDCP_2_0_REP_CONNECTED(x) ((x) & BIT(1)) x 117 include/drm/drm_hdcp.h #define HDCP_2_2_MAX_CASCADE_EXCEEDED(x) ((x) & BIT(2)) x 118 include/drm/drm_hdcp.h #define HDCP_2_2_MAX_DEVS_EXCEEDED(x) ((x) & BIT(3)) x 119 include/drm/drm_hdcp.h #define HDCP_2_2_DEV_COUNT_LO(x) (((x) & (0xF << 4)) >> 4) x 120 include/drm/drm_hdcp.h #define HDCP_2_2_DEV_COUNT_HI(x) ((x) & BIT(0)) x 121 include/drm/drm_hdcp.h #define HDCP_2_2_DEPTH(x) (((x) & (0x7 << 1)) >> 1) x 246 include/drm/drm_hdcp.h #define HDCP_2_2_HDMI_RXSTATUS_MSG_SZ_HI(x) ((x) & 0x3) x 247 include/drm/drm_hdcp.h #define HDCP_2_2_HDMI_RXSTATUS_READY(x) ((x) & BIT(2)) x 248 include/drm/drm_hdcp.h #define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x) ((x) & BIT(3)) x 446 include/drm/drm_modes.h #define obj_to_mode(x) container_of(x, struct drm_display_mode, base) x 207 include/drm/drm_modeset_helper_vtables.h struct drm_display_mode *adjusted_mode, int x, int y, x 250 include/drm/drm_modeset_helper_vtables.h int (*mode_set_base)(struct drm_crtc *crtc, int x, int y, x 268 include/drm/drm_modeset_helper_vtables.h struct drm_framebuffer *fb, int x, int y, x 710 include/drm/drm_plane.h #define obj_to_plane(x) container_of(x, struct drm_plane, base) x 223 include/drm/drm_property.h #define obj_to_property(x) container_of(x, struct drm_property, base) x 224 include/drm/drm_property.h #define obj_to_blob(x) container_of(x, struct drm_property_blob, base) x 73 include/drm/drm_scdc_helper.h #define SCDC_TEST_READ_REQUEST_DELAY(x) ((x) & 0x7f) x 82 include/drm/drm_scdc_helper.h #define SCDC_GET_DEVICE_HARDWARE_REVISION_MAJOR(x) (((x) >> 4) & 0xf) x 83 include/drm/drm_scdc_helper.h #define SCDC_GET_DEVICE_HARDWARE_REVISION_MINOR(x) (((x) >> 0) & 0xf) x 45 include/drm/drm_util.h #define EXPORT_SYMBOL_FOR_TESTS_ONLY(x) EXPORT_SYMBOL(x) x 47 include/drm/drm_util.h #define EXPORT_SYMBOL_FOR_TESTS_ONLY(x) x 20 include/dt-bindings/interrupt-controller/arm-gic.h #define GIC_CPU_MASK_RAW(x) ((x) << 8) x 33 include/dt-bindings/mailbox/tegra186-hsp.h #define TEGRA_HSP_SM_RX(x) (TEGRA_HSP_SM_FLAG_RX | ((x) & TEGRA_HSP_SM_MASK)) x 34 include/dt-bindings/mailbox/tegra186-hsp.h #define TEGRA_HSP_SM_TX(x) (TEGRA_HSP_SM_FLAG_TX | ((x) & TEGRA_HSP_SM_MASK)) x 6 include/dt-bindings/phy/phy-ocelot-serdes.h #define SERDES1G(x) (x) x 8 include/dt-bindings/phy/phy-ocelot-serdes.h #define SERDES6G(x) (SERDES1G_MAX + 1 + (x)) x 18 include/dt-bindings/pinctrl/at91.h #define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 8) x 21 include/dt-bindings/pinctrl/at91.h #define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17) x 10 include/dt-bindings/pinctrl/mt65xx.h #define MTK_PIN_NO(x) ((x) << 8) x 11 include/dt-bindings/pinctrl/mt65xx.h #define MTK_GET_PIN_NO(x) ((x) >> 8) x 12 include/dt-bindings/pinctrl/mt65xx.h #define MTK_GET_PIN_FUNC(x) ((x) & 0xf) x 10 include/dt-bindings/reset/tegra124-car.h #define TEGRA124_RESET(x) (6 * 32 + (x)) x 10 include/dt-bindings/reset/tegra210-car.h #define TEGRA210_RESET(x) (7 * 32 + (x)) x 36 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) x 40 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) x 41 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) x 44 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) x 50 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) x 52 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) x 54 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) x 56 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) x 59 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) x 61 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) x 62 include/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) x 11 include/linux/8250_pci.h #define FL_GET_BASE(x) (x & FL_BASE_MASK) x 29 include/linux/acct.h #define acct_collect(x,y) do { } while (0) x 68 include/linux/acct.h static inline u32 jiffies_to_AHZ(unsigned long x) x 72 include/linux/acct.h return x * (AHZ / HZ); x 74 include/linux/acct.h return x / (HZ / AHZ); x 77 include/linux/acct.h u64 tmp = (u64)x * TICK_NSEC; x 83 include/linux/acct.h static inline u64 nsec_to_AHZ(u64 x) x 86 include/linux/acct.h do_div(x, (NSEC_PER_SEC / AHZ)); x 88 include/linux/acct.h x *= AHZ/512; x 89 include/linux/acct.h do_div(x, (NSEC_PER_SEC / 512)); x 96 include/linux/acct.h x *= 9; x 97 include/linux/acct.h do_div(x, (unsigned long)((9ull * NSEC_PER_SEC + (AHZ/2)) x 100 include/linux/acct.h return x; x 72 include/linux/amba/clcd-regs.h #define CNTL_LCDVCOMP(x) ((x) << 12) x 54 include/linux/amba/pl080.h #define PL080_Cx_BASE(x) ((0x100 + (x * 0x20))) x 12 include/linux/amba/pl093.h #define SMB_BANK(x) ((x) * 0x20) /* each bank control set is 0x20 apart */ x 164 include/linux/arm-smccc.h #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x x 115 include/linux/assoc_array_priv.h static inline bool assoc_array_ptr_is_meta(const struct assoc_array_ptr *x) x 117 include/linux/assoc_array_priv.h return (unsigned long)x & ASSOC_ARRAY_PTR_TYPE_MASK; x 119 include/linux/assoc_array_priv.h static inline bool assoc_array_ptr_is_leaf(const struct assoc_array_ptr *x) x 121 include/linux/assoc_array_priv.h return !assoc_array_ptr_is_meta(x); x 123 include/linux/assoc_array_priv.h static inline bool assoc_array_ptr_is_shortcut(const struct assoc_array_ptr *x) x 125 include/linux/assoc_array_priv.h return (unsigned long)x & ASSOC_ARRAY_PTR_SUBTYPE_MASK; x 127 include/linux/assoc_array_priv.h static inline bool assoc_array_ptr_is_node(const struct assoc_array_ptr *x) x 129 include/linux/assoc_array_priv.h return !assoc_array_ptr_is_shortcut(x); x 132 include/linux/assoc_array_priv.h static inline void *assoc_array_ptr_to_leaf(const struct assoc_array_ptr *x) x 134 include/linux/assoc_array_priv.h return (void *)((unsigned long)x & ~ASSOC_ARRAY_PTR_TYPE_MASK); x 138 include/linux/assoc_array_priv.h unsigned long __assoc_array_ptr_to_meta(const struct assoc_array_ptr *x) x 140 include/linux/assoc_array_priv.h return (unsigned long)x & x 144 include/linux/assoc_array_priv.h struct assoc_array_node *assoc_array_ptr_to_node(const struct assoc_array_ptr *x) x 146 include/linux/assoc_array_priv.h return (struct assoc_array_node *)__assoc_array_ptr_to_meta(x); x 149 include/linux/assoc_array_priv.h struct assoc_array_shortcut *assoc_array_ptr_to_shortcut(const struct assoc_array_ptr *x) x 151 include/linux/assoc_array_priv.h return (struct assoc_array_shortcut *)__assoc_array_ptr_to_meta(x); x 15 include/linux/badblocks.h #define BB_OFFSET(x) (((x) & BB_OFFSET_MASK) >> 9) x 16 include/linux/badblocks.h #define BB_LEN(x) (((x) & BB_LEN_MASK) + 1) x 17 include/linux/badblocks.h #define BB_ACK(x) (!!((x) & BB_ACK_MASK)) x 7 include/linux/bcd.h #define bcd2bin(x) \ x 8 include/linux/bcd.h (__builtin_constant_p((u8 )(x)) ? \ x 9 include/linux/bcd.h const_bcd2bin(x) : \ x 10 include/linux/bcd.h _bcd2bin(x)) x 12 include/linux/bcd.h #define bin2bcd(x) \ x 13 include/linux/bcd.h (__builtin_constant_p((u8 )(x)) ? \ x 14 include/linux/bcd.h const_bin2bcd(x) : \ x 15 include/linux/bcd.h _bin2bcd(x)) x 17 include/linux/bcd.h #define const_bcd2bin(x) (((x) & 0x0f) + ((x) >> 4) * 10) x 18 include/linux/bcd.h #define const_bin2bcd(x) ((((x) / 10) << 4) + (x) % 10) x 42 include/linux/bitfield.h #define __bf_shf(x) (__builtin_ffsll(x) - 1) x 21 include/linux/bitrev.h static inline u16 __bitrev16(u16 x) x 23 include/linux/bitrev.h return (__bitrev8(x & 0xff) << 8) | __bitrev8(x >> 8); x 26 include/linux/bitrev.h static inline u32 __bitrev32(u32 x) x 28 include/linux/bitrev.h return (__bitrev16(x & 0xffff) << 16) | __bitrev16(x >> 16); x 33 include/linux/bitrev.h #define __bitrev8x4(x) (__bitrev32(swab32(x))) x 35 include/linux/bitrev.h #define __constant_bitrev32(x) \ x 37 include/linux/bitrev.h u32 ___x = x; \ x 46 include/linux/bitrev.h #define __constant_bitrev16(x) \ x 48 include/linux/bitrev.h u16 ___x = x; \ x 56 include/linux/bitrev.h #define __constant_bitrev8x4(x) \ x 58 include/linux/bitrev.h u32 ___x = x; \ x 65 include/linux/bitrev.h #define __constant_bitrev8(x) \ x 67 include/linux/bitrev.h u8 ___x = x; \ x 74 include/linux/bitrev.h #define bitrev32(x) \ x 76 include/linux/bitrev.h u32 __x = x; \ x 82 include/linux/bitrev.h #define bitrev16(x) \ x 84 include/linux/bitrev.h u16 __x = x; \ x 90 include/linux/bitrev.h #define bitrev8x4(x) \ x 92 include/linux/bitrev.h u32 __x = x; \ x 98 include/linux/bitrev.h #define bitrev8(x) \ x 100 include/linux/bitrev.h u8 __x = x; \ x 74 include/linux/brcmphy.h #define PHY_BRCM_7XXX_REV(x) (((x) >> 8) & 0xff) x 75 include/linux/brcmphy.h #define PHY_BRCM_7XXX_PATCH(x) ((x) & 0xff) x 113 include/linux/brcmphy.h #define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10) x 114 include/linux/brcmphy.h #define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0) x 134 include/linux/byteorder/generic.h #define ___htonl(x) __cpu_to_be32(x) x 135 include/linux/byteorder/generic.h #define ___htons(x) __cpu_to_be16(x) x 136 include/linux/byteorder/generic.h #define ___ntohl(x) __be32_to_cpu(x) x 137 include/linux/byteorder/generic.h #define ___ntohs(x) __be16_to_cpu(x) x 139 include/linux/byteorder/generic.h #define htonl(x) ___htonl(x) x 140 include/linux/byteorder/generic.h #define ntohl(x) ___ntohl(x) x 141 include/linux/byteorder/generic.h #define htons(x) ___htons(x) x 142 include/linux/byteorder/generic.h #define ntohs(x) ___ntohs(x) x 9 include/linux/cache.h #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES) x 528 include/linux/ccp.h struct scatterlist *x; x 37 include/linux/ceph/ceph_features.h #define CEPH_HAVE_FEATURE(x, name) \ x 38 include/linux/ceph/ceph_features.h (((x) & (CEPH_FEATUREMASK_##name)) == (CEPH_FEATUREMASK_##name)) x 604 include/linux/ceph/ceph_fs.h #define CEPH_CAP_FILE(x) (x << CEPH_CAP_SFILE) x 98 include/linux/ceph/rados.h static inline int ceph_stable_mod(int x, int b, int bmask) x 100 include/linux/ceph/rados.h if ((x & bmask) < b) x 101 include/linux/ceph/rados.h return x & bmask; x 103 include/linux/ceph/rados.h return x & (bmask >> 1); x 49 include/linux/ceph/string_table.h #define ceph_try_get_string(x) \ x 54 include/linux/ceph/string_table.h ___str = rcu_dereference(x); \ x 74 include/linux/compat.h #define COMPAT_SYSCALL_DEFINEx(x, name, ...) \ x 78 include/linux/compat.h asmlinkage long compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \ x 79 include/linux/compat.h asmlinkage long compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) \ x 82 include/linux/compat.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__));\ x 83 include/linux/compat.h asmlinkage long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 84 include/linux/compat.h asmlinkage long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 86 include/linux/compat.h long ret = __do_compat_sys##name(__MAP(x,__SC_DELOUSE,__VA_ARGS__));\ x 87 include/linux/compat.h __MAP(x,__SC_TEST,__VA_ARGS__); \ x 91 include/linux/compat.h static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 110 include/linux/compat.h #define compat_jiffies_to_clock_t(x) \ x 111 include/linux/compat.h (((unsigned long)(x) * COMPAT_USER_HZ) / HZ) x 8 include/linux/compiler-clang.h #define uninitialized_var(x) x = *(&(x)) x 65 include/linux/compiler-gcc.h #define uninitialized_var(x) x = x x 120 include/linux/compiler-gcc.h #define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) x 20 include/linux/compiler.h #define likely_notrace(x) __builtin_expect(!!(x), 1) x 21 include/linux/compiler.h #define unlikely_notrace(x) __builtin_expect(!!(x), 0) x 23 include/linux/compiler.h #define __branch_check__(x, expect, is_constant) ({ \ x 33 include/linux/compiler.h ______r = __builtin_expect(!!(x), expect); \ x 45 include/linux/compiler.h # define likely(x) (__branch_check__(x, 1, __builtin_constant_p(x))) x 48 include/linux/compiler.h # define unlikely(x) (__branch_check__(x, 0, __builtin_constant_p(x))) x 77 include/linux/compiler.h # define likely(x) __builtin_expect(!!(x), 1) x 78 include/linux/compiler.h # define unlikely(x) __builtin_expect(!!(x), 0) x 259 include/linux/compiler.h #define __READ_ONCE(x, check) \ x 261 include/linux/compiler.h union { typeof(x) __val; char __c[1]; } __u; \ x 263 include/linux/compiler.h __read_once_size(&(x), __u.__c, sizeof(x)); \ x 265 include/linux/compiler.h __read_once_size_nocheck(&(x), __u.__c, sizeof(x)); \ x 269 include/linux/compiler.h #define READ_ONCE(x) __READ_ONCE(x, 1) x 275 include/linux/compiler.h #define READ_ONCE_NOCHECK(x) __READ_ONCE(x, 0) x 284 include/linux/compiler.h #define WRITE_ONCE(x, val) \ x 286 include/linux/compiler.h union { typeof(x) __val; char __c[1]; } __u = \ x 287 include/linux/compiler.h { .__val = (__force typeof(x)) (val) }; \ x 288 include/linux/compiler.h __write_once_size(&(x), __u.__c, sizeof(x)); \ x 35 include/linux/compiler_attributes.h # define __has_attribute(x) __GCC4_has_attribute_##x x 56 include/linux/compiler_attributes.h #define __aligned(x) __attribute__((__aligned__(x))) x 176 include/linux/compiler_attributes.h #define __mode(x) __attribute__((__mode__(x))) x 14 include/linux/compiler_types.h # define __must_hold(x) __attribute__((context(x,1,1))) x 15 include/linux/compiler_types.h # define __acquires(x) __attribute__((context(x,0,1))) x 16 include/linux/compiler_types.h # define __releases(x) __attribute__((context(x,1,0))) x 17 include/linux/compiler_types.h # define __acquire(x) __context__(x,1) x 18 include/linux/compiler_types.h # define __release(x) __context__(x,-1) x 19 include/linux/compiler_types.h # define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) x 37 include/linux/compiler_types.h # define __chk_user_ptr(x) (void)0 x 38 include/linux/compiler_types.h # define __chk_io_ptr(x) (void)0 x 39 include/linux/compiler_types.h # define __builtin_warning(x, y...) (1) x 40 include/linux/compiler_types.h # define __must_hold(x) x 41 include/linux/compiler_types.h # define __acquires(x) x 42 include/linux/compiler_types.h # define __releases(x) x 43 include/linux/compiler_types.h # define __acquire(x) (void)0 x 44 include/linux/compiler_types.h # define __release(x) (void)0 x 45 include/linux/compiler_types.h # define __cond_lock(x,c) (c) x 206 include/linux/compiler_types.h #define asm_volatile_goto(x...) asm goto(x) x 31 include/linux/completion.h #define init_completion_map(x, m) __init_completion(x) x 32 include/linux/completion.h #define init_completion(x) __init_completion(x) x 33 include/linux/completion.h static inline void complete_acquire(struct completion *x) {} x 34 include/linux/completion.h static inline void complete_release(struct completion *x) {} x 85 include/linux/completion.h static inline void __init_completion(struct completion *x) x 87 include/linux/completion.h x->done = 0; x 88 include/linux/completion.h init_waitqueue_head(&x->wait); x 98 include/linux/completion.h static inline void reinit_completion(struct completion *x) x 100 include/linux/completion.h x->done = 0; x 105 include/linux/completion.h extern int wait_for_completion_interruptible(struct completion *x); x 106 include/linux/completion.h extern int wait_for_completion_killable(struct completion *x); x 107 include/linux/completion.h extern unsigned long wait_for_completion_timeout(struct completion *x, x 109 include/linux/completion.h extern unsigned long wait_for_completion_io_timeout(struct completion *x, x 112 include/linux/completion.h struct completion *x, unsigned long timeout); x 114 include/linux/completion.h struct completion *x, unsigned long timeout); x 115 include/linux/completion.h extern bool try_wait_for_completion(struct completion *x); x 116 include/linux/completion.h extern bool completion_done(struct completion *x); x 6 include/linux/const.h #define UL(x) (_UL(x)) x 7 include/linux/const.h #define ULL(x) (_ULL(x)) x 23 include/linux/count_zeros.h static inline int count_leading_zeros(unsigned long x) x 25 include/linux/count_zeros.h if (sizeof(x) == 4) x 26 include/linux/count_zeros.h return BITS_PER_LONG - fls(x); x 28 include/linux/count_zeros.h return BITS_PER_LONG - fls64(x); x 43 include/linux/count_zeros.h static inline int count_trailing_zeros(unsigned long x) x 47 include/linux/count_zeros.h if (sizeof(x) == 4) x 48 include/linux/count_zeros.h return ffs(x); x 50 include/linux/count_zeros.h return (x != 0) ? __ffs(x) : COUNT_TRAILING_ZEROS_0; x 44 include/linux/cpufeature.h #define module_cpu_feature_match(x, __initfunc) \ x 45 include/linux/cpufeature.h static struct cpu_feature const __maybe_unused cpu_feature_match_ ## x[] = \ x 46 include/linux/cpufeature.h { { .feature = cpu_feature(x) }, { } }; \ x 47 include/linux/cpufeature.h MODULE_DEVICE_TABLE(cpu, cpu_feature_match_ ## x); \ x 49 include/linux/cpufeature.h static int __init cpu_feature_match_ ## x ## _init(void) \ x 51 include/linux/cpufeature.h if (!cpu_have_feature(cpu_feature(x))) \ x 55 include/linux/cpufeature.h module_init(cpu_feature_match_ ## x ## _init) x 734 include/linux/cpumask.h #define this_cpu_cpumask_var_ptr(x) this_cpu_read(x) x 753 include/linux/cpumask.h #define this_cpu_cpumask_var_ptr(x) this_cpu_ptr(x) x 38 include/linux/crash_dump.h #define vmcore_elf_check_arch_cross(x) 0 x 47 include/linux/crash_dump.h #define vmcore_elf32_check_arch(x) elf_check_arch(x) x 51 include/linux/crash_dump.h #define vmcore_elf64_check_arch(x) (elf_check_arch(x) || vmcore_elf_check_arch_cross(x)) x 7 include/linux/crc4.h extern uint8_t crc4(uint8_t c, uint64_t x, int bits); x 73 include/linux/crush/crush.h #define CRUSH_CHOOSE_N_MINUS(x) (-(x)) x 16 include/linux/crush/mapper.h int ruleno, int x, int *result, int result_max, x 21 include/linux/ctype.h #define __ismask(x) (_ctype[(int)(unsigned char)(x)]) x 29 include/linux/dcache.h #define IS_ROOT(x) ((x) == (x)->d_parent) x 10 include/linux/decompress/bunzip2.h void(*error)(char *x)); x 10 include/linux/decompress/generic.h void(*error)(char *x)); x 10 include/linux/decompress/inflate.h void(*error_fn)(char *x)); x 10 include/linux/decompress/unlz4.h void(*error)(char *x)); x 10 include/linux/decompress/unlzma.h void(*error)(char *x) x 10 include/linux/decompress/unlzo.h void(*error)(char *x)); x 17 include/linux/decompress/unxz.h void (*error)(char *x)); x 49 include/linux/delay.h static inline void ndelay(unsigned long x) x 51 include/linux/delay.h udelay(DIV_ROUND_UP(x, 1000)); x 53 include/linux/delay.h #define ndelay(x) ndelay(x) x 551 include/linux/device-mapper.h #define DMEMIT(x...) sz += ((sz >= maxlen) ? \ x 552 include/linux/device-mapper.h 0 : scnprintf(result + sz, maxlen - sz, x)) x 571 include/linux/device-mapper.h #define dm_sector_div64(x, y)( \ x 574 include/linux/device-mapper.h (x) = div64_u64_rem(x, y, &_res); \ x 1410 include/linux/dmaengine.h #define dma_request_channel(mask, x, y) \ x 1411 include/linux/dmaengine.h __dma_request_channel(&(mask), x, y, NULL) x 1412 include/linux/dmaengine.h #define dma_request_slave_channel_compat(mask, x, y, dev, name) \ x 1413 include/linux/dmaengine.h __dma_request_slave_channel_compat(&(mask), x, y, dev, name) x 46 include/linux/efs_vh.h #define IS_EFS(x) (((x) == SGI_EFS) || ((x) == SGI_SYSV)) x 52 include/linux/eisa.h unsigned long x = (unsigned long) addr; x 54 include/linux/eisa.h x &= 0xc00; x 55 include/linux/eisa.h return (x >> 12); x 22 include/linux/err.h #define IS_ERR_VALUE(x) unlikely((unsigned long)(void *)(x) >= (unsigned long)-MAX_ERRNO) x 22 include/linux/f2fs_fs.h #define F2FS_BLK_ALIGN(x) (((x) + F2FS_BLKSIZE - 1) >> F2FS_BLKSIZE_BITS) x 497 include/linux/f2fs_fs.h #define GET_DENTRY_SLOTS(x) (((x) + F2FS_SLOT_LEN - 1) >> F2FS_SLOT_LEN_BITS) x 145 include/linux/fb.h u32 x; x 340 include/linux/filter.h #define BPF_CAST_CALL(x) \ x 341 include/linux/filter.h ((u64 (*)(u64, u64, u64, u64, u64))(x)) x 464 include/linux/filter.h #define BPF_CALL_x(x, name, ...) \ x 466 include/linux/filter.h u64 ____##name(__BPF_MAP(x, __BPF_DECL_ARGS, __BPF_V, __VA_ARGS__)); \ x 467 include/linux/filter.h u64 name(__BPF_REG(x, __BPF_DECL_REGS, __BPF_N, __VA_ARGS__)); \ x 468 include/linux/filter.h u64 name(__BPF_REG(x, __BPF_DECL_REGS, __BPF_N, __VA_ARGS__)) \ x 470 include/linux/filter.h return ____##name(__BPF_MAP(x,__BPF_CAST,__BPF_N,__VA_ARGS__));\ x 473 include/linux/filter.h u64 ____##name(__BPF_MAP(x, __BPF_DECL_ARGS, __BPF_V, __VA_ARGS__)) x 32 include/linux/firmware.h #define __fw_concat1(x, y) x##y x 33 include/linux/firmware.h #define __fw_concat(x, y) __fw_concat1(x, y) x 989 include/linux/fs.h #define get_file_rcu_many(x, cnt) \ x 990 include/linux/fs.h atomic_long_add_unless(&(x)->f_count, (cnt), 0) x 991 include/linux/fs.h #define get_file_rcu(x) get_file_rcu_many((x), 1) x 992 include/linux/fs.h #define file_count(x) atomic_long_read(&(x)->f_count) x 1127 include/linux/fs.h #define INT_LIMIT(x) (~((x)1 << (sizeof(x)*8 - 1))) x 3518 include/linux/fs.h #define ACC_MODE(x) ("\004\002\006\006"[(x)&O_ACCMODE]) x 135 include/linux/fsl/guts.h #define MPC85xx_PMUXCR_QE(x) (0x8000 >> (x)) x 206 include/linux/fsl/guts.h #define CCSR_GUTS_CLKDVDR_PXCKDLY(x) \ x 207 include/linux/fsl/guts.h (((x) & 3) << CCSR_GUTS_CLKDVDR_PXCKDLY_SHIFT) x 210 include/linux/fsl/guts.h #define CCSR_GUTS_CLKDVDR_PXCLK(x) (((x) & 31) << CCSR_GUTS_CLKDVDR_PXCLK_SHIFT) x 212 include/linux/fsl/guts.h #define CCSR_GUTS_CLKDVDR_SSICLK(x) ((x) & CCSR_GUTS_CLKDVDR_SSICLK_MASK) x 383 include/linux/genl_magic_func.h x->name = default; x 386 include/linux/genl_magic_func.h x->name = default; x 389 include/linux/genl_magic_func.h x->name = default; x 392 include/linux/genl_magic_func.h memset(x->name, 0, sizeof(x->name)); \ x 393 include/linux/genl_magic_func.h x->name ## _len = 0; x 396 include/linux/genl_magic_func.h static void set_ ## s_name ## _defaults(struct s_name *x) __attribute__((unused)); \ x 397 include/linux/genl_magic_func.h static void set_ ## s_name ## _defaults(struct s_name *x) { \ x 57 include/linux/genl_magic_struct.h #define __nla_type(x) ((__u16)((x) & NLA_TYPE_MASK & ~DRBD_GENLA_F_MANDATORY)) x 5 include/linux/gpio-pxa.h #define GPIO_bit(x) (1 << ((x) & 0x1f)) x 199 include/linux/hdmi.h u16 x, y; x 202 include/linux/hdmi.h u16 x, y; x 95 include/linux/highuid.h #define low_16_bits(x) ((x) & 0xFFFF) x 96 include/linux/highuid.h #define high_16_bits(x) (((x) & 0xFFFF0000) >> 16) x 293 include/linux/huge_mm.h #define hpage_nr_pages(x) 1 x 21 include/linux/hugetlb.h #define __hugepd(x) ((hugepd_t) { (x) }) x 182 include/linux/hugetlb.h #define pmd_huge(x) 0 x 183 include/linux/hugetlb.h #define pud_huge(x) 0 x 230 include/linux/hugetlb.h #define pgd_huge(x) 0 x 233 include/linux/hugetlb.h #define p4d_huge(x) 0 x 34 include/linux/i3c/ccc.h #define I3C_CCC_ENTHDR(x) I3C_CCC_ID(0x20 + (x), true) x 269 include/linux/i3c/ccc.h #define I3C_CCC_MAX_SDR_FSCL(x) ((x) & I3C_CCC_MAX_SDR_FSCL_MASK) x 325 include/linux/i3c/ccc.h #define I3C_CCC_GETXTIME_ASYNC_MODE(x) BIT((x) + 1) x 48 include/linux/i3c/master.h #define I3C_LVR_I2C_INDEX(x) ((x) << 5) x 3321 include/linux/ieee80211.h #define TU_TO_JIFFIES(x) (usecs_to_jiffies((x) * 1024)) x 3322 include/linux/ieee80211.h #define TU_TO_EXP_TIME(x) (jiffies + TU_TO_JIFFIES(x)) x 61 include/linux/ieee802154.h #define IEEE802154_FC_TYPE(x) ((x & IEEE802154_FC_TYPE_MASK) >> IEEE802154_FC_TYPE_SHIFT) x 62 include/linux/ieee802154.h #define IEEE802154_FC_SET_TYPE(v, x) do { \ x 64 include/linux/ieee802154.h (((x) << IEEE802154_FC_TYPE_SHIFT) & IEEE802154_FC_TYPE_MASK)); \ x 83 include/linux/ieee802154.h #define IEEE802154_FC_VERSION(x) ((x & IEEE802154_FC_VERSION_MASK) >> IEEE802154_FC_VERSION_SHIFT) x 85 include/linux/ieee802154.h #define IEEE802154_FC_SAMODE(x) \ x 86 include/linux/ieee802154.h (((x) & IEEE802154_FC_SAMODE_MASK) >> IEEE802154_FC_SAMODE_SHIFT) x 88 include/linux/ieee802154.h #define IEEE802154_FC_DAMODE(x) \ x 89 include/linux/ieee802154.h (((x) & IEEE802154_FC_DAMODE_MASK) >> IEEE802154_FC_DAMODE_SHIFT) x 93 include/linux/ieee802154.h #define IEEE802154_SCF_SECLEVEL(x) (x & IEEE802154_SCF_SECLEVEL_MASK) x 96 include/linux/ieee802154.h #define IEEE802154_SCF_KEY_ID_MODE(x) \ x 97 include/linux/ieee802154.h ((x & IEEE802154_SCF_KEY_ID_MODE_MASK) >> IEEE802154_SCF_KEY_ID_MODE_SHIFT) x 20 include/linux/iio/frequency/adf4350.h #define ADF4350_REG0_FRACT(x) (((x) & 0xFFF) << 3) x 21 include/linux/iio/frequency/adf4350.h #define ADF4350_REG0_INT(x) (((x) & 0xFFFF) << 15) x 24 include/linux/iio/frequency/adf4350.h #define ADF4350_REG1_MOD(x) (((x) & 0xFFF) << 3) x 25 include/linux/iio/frequency/adf4350.h #define ADF4350_REG1_PHASE(x) (((x) & 0xFFF) << 15) x 37 include/linux/iio/frequency/adf4350.h #define ADF4350_REG2_CHARGE_PUMP_CURR_uA(x) (((((x)-312) / 312) & 0xF) << 9) x 39 include/linux/iio/frequency/adf4350.h #define ADF4350_REG2_10BIT_R_CNT(x) ((x) << 14) x 42 include/linux/iio/frequency/adf4350.h #define ADF4350_REG2_MUXOUT(x) ((x) << 26) x 43 include/linux/iio/frequency/adf4350.h #define ADF4350_REG2_NOISE_MODE(x) (((unsigned)(x)) << 29) x 53 include/linux/iio/frequency/adf4350.h #define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3) x 54 include/linux/iio/frequency/adf4350.h #define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 16) x 61 include/linux/iio/frequency/adf4350.h #define ADF4350_REG4_OUTPUT_PWR(x) ((x) << 3) x 63 include/linux/iio/frequency/adf4350.h #define ADF4350_REG4_AUX_OUTPUT_PWR(x) ((x) << 6) x 69 include/linux/iio/frequency/adf4350.h #define ADF4350_REG4_8BIT_BAND_SEL_CLKDIV(x) ((x) << 12) x 70 include/linux/iio/frequency/adf4350.h #define ADF4350_REG4_RF_DIV_SEL(x) ((x) << 20) x 304 include/linux/init.h #define __exit_p(x) x x 306 include/linux/init.h #define __exit_p(x) NULL x 32 include/linux/init_task.h #define INIT_PREV_CPUTIME(x) .prev_cputime = { \ x 33 include/linux/init_task.h .lock = __RAW_SPIN_LOCK_UNLOCKED(x.prev_cputime.lock), \ x 36 include/linux/init_task.h #define INIT_PREV_CPUTIME(x) x 119 include/linux/input/adp5589.h #define ADP_ROW(x) (1 << (x)) x 120 include/linux/input/adp5589.h #define ADP_COL(x) (1 << (x + 8)) x 143 include/linux/input/adp5589.h #define ADP5585_ROW(x) (1 << ((x) & ADP5585_ROW_MASK)) x 144 include/linux/input/adp5589.h #define ADP5585_COL(x) (1 << (((x) & ADP5585_COL_MASK) + ADP5585_COL_SHIFT)) x 115 include/linux/input/mt.h s16 x, y; x 25 include/linux/input/touchscreen.h unsigned int x, unsigned int y); x 29 include/linux/input/touchscreen.h unsigned int x, unsigned int y, x 378 include/linux/intel-iommu.h #define QI_PGRP_LPIG(x) (((u64)(x)) << 2) x 14 include/linux/interconnect.h #define Bps_to_icc(x) ((x) / 1000) x 15 include/linux/interconnect.h #define kBps_to_icc(x) (x) x 16 include/linux/interconnect.h #define MBps_to_icc(x) ((x) * 1000) x 17 include/linux/interconnect.h #define GBps_to_icc(x) ((x) * 1000 * 1000) x 18 include/linux/interconnect.h #define bps_to_icc(x) (1) x 19 include/linux/interconnect.h #define kbps_to_icc(x) ((x) / 8 + ((x) % 8 ? 1 : 0)) x 20 include/linux/interconnect.h #define Mbps_to_icc(x) ((x) * 1000 / 8) x 21 include/linux/interconnect.h #define Gbps_to_icc(x) ((x) * 1000 * 1000 / 8) x 492 include/linux/interrupt.h #define set_softirq_pending(x) (__this_cpu_write(local_softirq_pending_ref, (x))) x 493 include/linux/interrupt.h #define or_softirq_pending(x) (__this_cpu_or(local_softirq_pending_ref, (x))) x 190 include/linux/io-pgtable.h #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops) x 190 include/linux/irqchip/arm-gic-v3.h #define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12)) x 191 include/linux/irqchip/arm-gic-v3.h #define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16)) x 453 include/linux/irqchip/arm-gic-v3.h #define GITS_CMD_GICv4(x) ((x) | 0x20) x 18 include/linux/irqreturn.h #define IRQ_RETVAL(x) ((x) ? IRQ_HANDLED : IRQ_NONE) x 25 include/linux/isa.h #define to_isa_driver(x) container_of((x), struct isa_driver, driver) x 20 include/linux/isapnp.h #define ISAPNP_DEVICE(x) ((((x)&0xf000)>>8)|\ x 21 include/linux/isapnp.h (((x)&0x0f00)>>8)|\ x 22 include/linux/isapnp.h (((x)&0x00f0)<<8)|\ x 23 include/linux/isapnp.h (((x)&0x000f)<<8)) x 24 include/linux/isapnp.h #define ISAPNP_FUNCTION(x) ISAPNP_DEVICE(x) x 1535 include/linux/jbd2.h static inline int tid_gt(tid_t x, tid_t y) x 1537 include/linux/jbd2.h int difference = (x - y); x 1541 include/linux/jbd2.h static inline int tid_geq(tid_t x, tid_t y) x 1543 include/linux/jbd2.h int difference = (x - y); x 445 include/linux/jiffies.h extern clock_t jiffies_to_clock_t(unsigned long x); x 456 include/linux/jiffies.h extern unsigned long clock_t_to_jiffies(unsigned long x); x 457 include/linux/jiffies.h extern u64 jiffies_64_to_clock_t(u64 x); x 458 include/linux/jiffies.h extern u64 nsec_to_clock_t(u64 x); x 387 include/linux/jump_label.h #define static_key_enabled(x) \ x 389 include/linux/jump_label.h if (!__builtin_types_compatible_p(typeof(*x), struct static_key) && \ x 390 include/linux/jump_label.h !__builtin_types_compatible_p(typeof(*x), struct static_key_true) &&\ x 391 include/linux/jump_label.h !__builtin_types_compatible_p(typeof(*x), struct static_key_false)) \ x 393 include/linux/jump_label.h static_key_count((struct static_key *)x) > 0; \ x 454 include/linux/jump_label.h #define static_branch_likely(x) \ x 457 include/linux/jump_label.h if (__builtin_types_compatible_p(typeof(*x), struct static_key_true)) \ x 458 include/linux/jump_label.h branch = !arch_static_branch(&(x)->key, true); \ x 459 include/linux/jump_label.h else if (__builtin_types_compatible_p(typeof(*x), struct static_key_false)) \ x 460 include/linux/jump_label.h branch = !arch_static_branch_jump(&(x)->key, true); \ x 466 include/linux/jump_label.h #define static_branch_unlikely(x) \ x 469 include/linux/jump_label.h if (__builtin_types_compatible_p(typeof(*x), struct static_key_true)) \ x 470 include/linux/jump_label.h branch = arch_static_branch_jump(&(x)->key, false); \ x 471 include/linux/jump_label.h else if (__builtin_types_compatible_p(typeof(*x), struct static_key_false)) \ x 472 include/linux/jump_label.h branch = arch_static_branch(&(x)->key, false); \ x 480 include/linux/jump_label.h #define static_branch_likely(x) likely(static_key_enabled(&(x)->key)) x 481 include/linux/jump_label.h #define static_branch_unlikely(x) unlikely(static_key_enabled(&(x)->key)) x 489 include/linux/jump_label.h #define static_branch_inc(x) static_key_slow_inc(&(x)->key) x 490 include/linux/jump_label.h #define static_branch_dec(x) static_key_slow_dec(&(x)->key) x 491 include/linux/jump_label.h #define static_branch_inc_cpuslocked(x) static_key_slow_inc_cpuslocked(&(x)->key) x 492 include/linux/jump_label.h #define static_branch_dec_cpuslocked(x) static_key_slow_dec_cpuslocked(&(x)->key) x 498 include/linux/jump_label.h #define static_branch_enable(x) static_key_enable(&(x)->key) x 499 include/linux/jump_label.h #define static_branch_disable(x) static_key_disable(&(x)->key) x 500 include/linux/jump_label.h #define static_branch_enable_cpuslocked(x) static_key_enable_cpuslocked(&(x)->key) x 501 include/linux/jump_label.h #define static_branch_disable_cpuslocked(x) static_key_disable_cpuslocked(&(x)->key) x 27 include/linux/jump_label_ratelimit.h #define static_key_slow_dec_deferred(x) \ x 28 include/linux/jump_label_ratelimit.h __static_key_slow_dec_deferred(&(x)->key, &(x)->work, (x)->timeout) x 29 include/linux/jump_label_ratelimit.h #define static_branch_slow_dec_deferred(x) \ x 30 include/linux/jump_label_ratelimit.h __static_key_slow_dec_deferred(&(x)->key.key, &(x)->work, (x)->timeout) x 32 include/linux/jump_label_ratelimit.h #define static_key_deferred_flush(x) \ x 33 include/linux/jump_label_ratelimit.h __static_key_deferred_flush((x), &(x)->work) x 78 include/linux/jump_label_ratelimit.h #define static_branch_slow_dec_deferred(x) static_branch_dec(&(x)->key) x 97 include/linux/jump_label_ratelimit.h #define static_branch_deferred_inc(x) static_branch_inc(&(x)->key) x 30 include/linux/jz4740-adc.h #define JZ_ADC_CONFIG_SAMPLE_NUM(x) ((x) << 10) x 133 include/linux/kbd_kern.h #define U(x) ((x) ^ 0xf000) x 13 include/linux/kbuild.h #define COMMENT(x) \ x 14 include/linux/kbuild.h asm volatile("\n.ascii \"->#" x "\"") x 20 include/linux/kconfig.h #define __and(x, y) ___and(x, y) x 21 include/linux/kconfig.h #define ___and(x, y) ____and(__ARG_PLACEHOLDER_##x, y) x 24 include/linux/kconfig.h #define __or(x, y) ___or(x, y) x 25 include/linux/kconfig.h #define ___or(x, y) ____or(__ARG_PLACEHOLDER_##x, y) x 41 include/linux/kconfig.h #define __is_defined(x) ___is_defined(x) x 30 include/linux/kernel.h #define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) x 33 include/linux/kernel.h #define ALIGN(x, a) __ALIGN_KERNEL((x), (a)) x 34 include/linux/kernel.h #define ALIGN_DOWN(x, a) __ALIGN_KERNEL((x) - ((a) - 1), (a)) x 35 include/linux/kernel.h #define __ALIGN_MASK(x, mask) __ALIGN_KERNEL_MASK((x), (mask)) x 37 include/linux/kernel.h #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) x 49 include/linux/kernel.h #define u64_to_user_ptr(x) ( \ x 51 include/linux/kernel.h typecheck(u64, (x)); \ x 52 include/linux/kernel.h (void __user *)(uintptr_t)(x); \ x 62 include/linux/kernel.h #define __round_mask(x, y) ((__typeof__(x))((y)-1)) x 71 include/linux/kernel.h #define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) x 80 include/linux/kernel.h #define round_down(x, y) ((x) & ~__round_mask(x, y)) x 115 include/linux/kernel.h #define roundup(x, y) ( \ x 118 include/linux/kernel.h (((x) + (__y - 1)) / __y) * __y; \ x 129 include/linux/kernel.h #define rounddown(x, y) ( \ x 131 include/linux/kernel.h typeof(x) __x = (x); \ x 142 include/linux/kernel.h #define DIV_ROUND_CLOSEST(x, divisor)( \ x 144 include/linux/kernel.h typeof(x) __x = x; \ x 146 include/linux/kernel.h (((typeof(x))-1) > 0 || \ x 157 include/linux/kernel.h #define DIV_ROUND_CLOSEST_ULL(x, divisor)( \ x 160 include/linux/kernel.h unsigned long long _tmp = (x) + (__d) / 2; \ x 170 include/linux/kernel.h #define mult_frac(x, numer, denom)( \ x 172 include/linux/kernel.h typeof(x) quot = (x) / (denom); \ x 173 include/linux/kernel.h typeof(x) rem = (x) % (denom); \ x 277 include/linux/kernel.h #define abs(x) __abs_choose_expr(x, long long, \ x 278 include/linux/kernel.h __abs_choose_expr(x, long, \ x 279 include/linux/kernel.h __abs_choose_expr(x, int, \ x 280 include/linux/kernel.h __abs_choose_expr(x, short, \ x 281 include/linux/kernel.h __abs_choose_expr(x, char, \ x 283 include/linux/kernel.h __builtin_types_compatible_p(typeof(x), char), \ x 284 include/linux/kernel.h (char)({ signed char __x = (x); __x<0?-__x:__x; }), \ x 287 include/linux/kernel.h #define __abs_choose_expr(x, type, other) __builtin_choose_expr( \ x 288 include/linux/kernel.h __builtin_types_compatible_p(typeof(x), signed type) || \ x 289 include/linux/kernel.h __builtin_types_compatible_p(typeof(x), unsigned type), \ x 290 include/linux/kernel.h ({ signed type __x = (x); __x < 0 ? -__x : __x; }), other) x 515 include/linux/kernel.h u32 int_sqrt64(u64 x); x 517 include/linux/kernel.h static inline u32 int_sqrt64(u64 x) x 519 include/linux/kernel.h return (u32)int_sqrt(x); x 609 include/linux/kernel.h #define hex_asc_lo(x) hex_asc[((x) & 0x0f)] x 610 include/linux/kernel.h #define hex_asc_hi(x) hex_asc[((x) & 0xf0) >> 4] x 620 include/linux/kernel.h #define hex_asc_upper_lo(x) hex_asc_upper[((x) & 0x0f)] x 621 include/linux/kernel.h #define hex_asc_upper_hi(x) hex_asc_upper[((x) & 0xf0) >> 4] x 841 include/linux/kernel.h #define __typecheck(x, y) \ x 842 include/linux/kernel.h (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) x 849 include/linux/kernel.h #define __is_constexpr(x) \ x 850 include/linux/kernel.h (sizeof(int) == sizeof(*(8 ? ((void *)((long)(x) * 0l)) : (int *)8))) x 852 include/linux/kernel.h #define __no_side_effects(x, y) \ x 853 include/linux/kernel.h (__is_constexpr(x) && __is_constexpr(y)) x 855 include/linux/kernel.h #define __safe_cmp(x, y) \ x 856 include/linux/kernel.h (__typecheck(x, y) && __no_side_effects(x, y)) x 858 include/linux/kernel.h #define __cmp(x, y, op) ((x) op (y) ? (x) : (y)) x 860 include/linux/kernel.h #define __cmp_once(x, y, unique_x, unique_y, op) ({ \ x 861 include/linux/kernel.h typeof(x) unique_x = (x); \ x 865 include/linux/kernel.h #define __careful_cmp(x, y, op) \ x 866 include/linux/kernel.h __builtin_choose_expr(__safe_cmp(x, y), \ x 867 include/linux/kernel.h __cmp(x, y, op), \ x 868 include/linux/kernel.h __cmp_once(x, y, __UNIQUE_ID(__x), __UNIQUE_ID(__y), op)) x 875 include/linux/kernel.h #define min(x, y) __careful_cmp(x, y, <) x 882 include/linux/kernel.h #define max(x, y) __careful_cmp(x, y, >) x 890 include/linux/kernel.h #define min3(x, y, z) min((typeof(x))min(x, y), z) x 898 include/linux/kernel.h #define max3(x, y, z) max((typeof(x))max(x, y), z) x 905 include/linux/kernel.h #define min_not_zero(x, y) ({ \ x 906 include/linux/kernel.h typeof(x) __x = (x); \ x 934 include/linux/kernel.h #define min_t(type, x, y) __careful_cmp((type)(x), (type)(y), <) x 942 include/linux/kernel.h #define max_t(type, x, y) __careful_cmp((type)(x), (type)(y), >) x 104 include/linux/key.h unsigned long x; x 27 include/linux/kmod.h #define try_then_request_module(x, mod...) \ x 28 include/linux/kmod.h ((x) ?: (__request_module(true, mod), (x))) x 32 include/linux/kmod.h #define try_then_request_module(x, mod...) (x) x 331 include/linux/leds.h #define DEFINE_LED_TRIGGER(x) static struct led_trigger *x; x 332 include/linux/leds.h #define DEFINE_LED_TRIGGER_GLOBAL(x) struct led_trigger *x; x 17 include/linux/libfdt_env.h #define fdt32_to_cpu(x) be32_to_cpu(x) x 18 include/linux/libfdt_env.h #define cpu_to_fdt32(x) cpu_to_be32(x) x 19 include/linux/libfdt_env.h #define fdt64_to_cpu(x) be64_to_cpu(x) x 20 include/linux/libfdt_env.h #define cpu_to_fdt64(x) cpu_to_be64(x) x 26 include/linux/linkage.h #define cond_syscall(x) asm( \ x 27 include/linux/linkage.h ".weak " __stringify(x) "\n\t" \ x 28 include/linux/linkage.h ".set " __stringify(x) "," \ x 28 include/linux/list_bl.h #define LIST_BL_BUG_ON(x) BUG_ON(x) x 30 include/linux/list_bl.h #define LIST_BL_BUG_ON(x) x 33 include/linux/lp.h #define LP_BASE(x) lp_table[(x)].dev->port->base x 1777 include/linux/lsm_hooks.h int (*xfrm_state_alloc)(struct xfrm_state *x, x 1779 include/linux/lsm_hooks.h int (*xfrm_state_alloc_acquire)(struct xfrm_state *x, x 1782 include/linux/lsm_hooks.h void (*xfrm_state_free_security)(struct xfrm_state *x); x 1783 include/linux/lsm_hooks.h int (*xfrm_state_delete_security)(struct xfrm_state *x); x 1786 include/linux/lsm_hooks.h int (*xfrm_state_pol_flow_match)(struct xfrm_state *x, x 21 include/linux/lzo.h #define lzo1x_worst_compress(x) ((x) + ((x) / 16) + 64 + 3 + 2) x 10 include/linux/math64.h #define div64_long(x, y) div64_s64((x), (y)) x 11 include/linux/math64.h #define div64_ul(x, y) div64_u64((x), (y)) x 84 include/linux/math64.h #define div64_long(x, y) div_s64((x), (y)) x 85 include/linux/math64.h #define div64_ul(x, y) div_u64((x), (y)) x 31 include/linux/mem_encrypt.h #define __sme_set(x) ((x) | sme_me_mask) x 32 include/linux/mem_encrypt.h #define __sme_clr(x) ((x) & ~sme_me_mask) x 34 include/linux/mem_encrypt.h #define __sme_set(x) (x) x 35 include/linux/mem_encrypt.h #define __sme_clr(x) (x) x 178 include/linux/memcontrol.h char x[0]; x 596 include/linux/memcontrol.h long x = atomic_long_read(&memcg->vmstats[idx]); x 598 include/linux/memcontrol.h if (x < 0) x 599 include/linux/memcontrol.h x = 0; x 601 include/linux/memcontrol.h return x; x 611 include/linux/memcontrol.h long x = 0; x 615 include/linux/memcontrol.h x += per_cpu(memcg->vmstats_local->stat[idx], cpu); x 617 include/linux/memcontrol.h if (x < 0) x 618 include/linux/memcontrol.h x = 0; x 620 include/linux/memcontrol.h return x; x 671 include/linux/memcontrol.h long x; x 677 include/linux/memcontrol.h x = atomic_long_read(&pn->lruvec_stat[idx]); x 679 include/linux/memcontrol.h if (x < 0) x 680 include/linux/memcontrol.h x = 0; x 682 include/linux/memcontrol.h return x; x 689 include/linux/memcontrol.h long x = 0; x 697 include/linux/memcontrol.h x += per_cpu(pn->lruvec_stat_local->count[idx], cpu); x 699 include/linux/memcontrol.h if (x < 0) x 700 include/linux/memcontrol.h x = 0; x 702 include/linux/memcontrol.h return x; x 91 include/linux/mfd/88pm80x.h #define PM800_GPIO0_GPIO_MODE(x) (x << 1) x 93 include/linux/mfd/88pm80x.h #define PM800_GPIO1_GPIO_MODE(x) (x << 5) x 97 include/linux/mfd/88pm80x.h #define PM800_GPIO2_GPIO_MODE(x) (x << 1) x 99 include/linux/mfd/88pm80x.h #define PM800_GPIO3_GPIO_MODE(x) (x << 5) x 105 include/linux/mfd/88pm80x.h #define PM800_GPIO4_GPIO_MODE(x) (x << 1) x 153 include/linux/mfd/88pm80x.h #define PM800_GPADC_SLOW_MODE(x) (x << 3) x 159 include/linux/mfd/88pm80x.h #define PM800_GPADC0_GP_PREBIAS_TIME(x) (x << 0) x 107 include/linux/mfd/88pm860x.h #define PM8606_WLED_CURRENT(x) ((x & 0x1F) << 1) x 109 include/linux/mfd/88pm860x.h #define PM8606_LED_CURRENT(x) (((x >> 2) & 0x07) << 5) x 18 include/linux/mfd/abx500/ux500_chargalg.h #define psy_to_ux500_charger(x) power_supply_get_drvdata(psy) x 173 include/linux/mfd/ac100.h #define AC100_RTC_GP(x) (0xe0 + (x)) x 91 include/linux/mfd/adp5520.h #define ADP5520_BL_LVL ((x) << 5) x 92 include/linux/mfd/adp5520.h #define ADP5520_BL_LAW ((x) << 4) x 161 include/linux/mfd/asic3.h #define PWM_TIMEBASE_VALUE(x) ((x)&0xf) /* Low 4 bits sets time base */ x 242 include/linux/mfd/asic3.h #define ASIC3_INTR_CPS(x) ((x)&0x0f) /* 4 bits, max 14 */ x 55 include/linux/mfd/atmel-hlcdc.h #define ATMEL_HLCDC_LAYER_STATUS(x) BIT((x) + 8) x 17 include/linux/mfd/hi6421-pmic.h #define HI6421_REG_TO_BUS_ADDR(x) (x << 2) x 17 include/linux/mfd/hi655x-pmic.h #define HI655X_BUS_ADDR(x) ((x) << 2) x 30 include/linux/mfd/imx25-tsadc.h #define MX25_TGCR_PDBTIME(x) ((x) << 25) x 34 include/linux/mfd/imx25-tsadc.h #define MX25_TGCR_ADCCLKCFG(x) ((x) << 16) x 35 include/linux/mfd/imx25-tsadc.h #define MX25_TGCR_GET_ADCCLK(x) (((x) >> 16) & 0x1f) x 52 include/linux/mfd/imx25-tsadc.h #define _MX25_ADCQ_ITEM(item, x) ((x) << ((item) * 4)) x 53 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_ITEM(item, x) ((item) >= 8 ? \ x 54 include/linux/mfd/imx25-tsadc.h _MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x))) x 57 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_FIFO_DATA(x) (((x) >> 4) & 0xfff) x 58 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_FIFO_ID(x) ((x) & 0xf) x 66 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_CR_RWAIT(x) ((x) << 12) x 68 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_CR_WMRK(x) ((x) << 8) x 70 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_CR_LITEMID(x) ((x) << 4) x 82 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_SR_FDN(x) (((x) >> 8) & 0x1f) x 104 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_CFG_SETTLING_TIME(x) ((x) << 24) x 107 include/linux/mfd/imx25-tsadc.h #define MX25_ADCQ_CFG_NOS(x) (((x) - 1) << 16) x 19 include/linux/mfd/intel_soc_pmic_mrfld.h #define BCOVE_MINOR(x) (unsigned int)(((x) & BCOVE_ID_MINREV0) >> 0) x 20 include/linux/mfd/intel_soc_pmic_mrfld.h #define BCOVE_MAJOR(x) (unsigned int)(((x) & BCOVE_ID_MAJREV0) >> 3) x 21 include/linux/mfd/intel_soc_pmic_mrfld.h #define BCOVE_VENDOR(x) (unsigned int)(((x) & BCOVE_ID_VENDID0) >> 6) x 19 include/linux/mfd/kempld.h #define KEMPLD_VERSION_GET_MINOR(x) (x & 0x1f) x 20 include/linux/mfd/kempld.h #define KEMPLD_VERSION_GET_MAJOR(x) ((x >> 5) & 0x1f) x 21 include/linux/mfd/kempld.h #define KEMPLD_VERSION_GET_NUMBER(x) ((x >> 10) & 0xf) x 22 include/linux/mfd/kempld.h #define KEMPLD_VERSION_GET_TYPE(x) ((x >> 14) & 0x3) x 37 include/linux/mfd/kempld.h #define KEMPLD_SPEC_GET_MINOR(x) (x & 0x0f) x 38 include/linux/mfd/kempld.h #define KEMPLD_SPEC_GET_MAJOR(x) ((x >> 4) & 0x0f) x 77 include/linux/mfd/max77693-private.h #define TORCH_IOUT_MASK(x) (0xf << (x)) x 104 include/linux/mfd/max77693-private.h #define FLASH_EN_SHIFT(x) (6 - (x) * 2) x 105 include/linux/mfd/max77693-private.h #define TORCH_EN_SHIFT(x) (2 - (x) * 2) x 132 include/linux/mfd/mc13xxx.h #define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11) x 133 include/linux/mfd/mc13xxx.h #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14) x 138 include/linux/mfd/mc13xxx.h #define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0) x 139 include/linux/mfd/mc13xxx.h #define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3) x 140 include/linux/mfd/mc13xxx.h #define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6) x 141 include/linux/mfd/mc13xxx.h #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21) x 144 include/linux/mfd/mc13xxx.h #define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0) x 145 include/linux/mfd/mc13xxx.h #define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2) x 146 include/linux/mfd/mc13xxx.h #define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4) x 147 include/linux/mfd/mc13xxx.h #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21) x 150 include/linux/mfd/mc13xxx.h #define MC13783_LED_C4_CURRENT_R2(x) (((x) & 0x3) << 0) x 151 include/linux/mfd/mc13xxx.h #define MC13783_LED_C4_CURRENT_G2(x) (((x) & 0x3) << 2) x 152 include/linux/mfd/mc13xxx.h #define MC13783_LED_C4_CURRENT_B2(x) (((x) & 0x3) << 4) x 153 include/linux/mfd/mc13xxx.h #define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 21) x 156 include/linux/mfd/mc13xxx.h #define MC13783_LED_C5_CURRENT_R3(x) (((x) & 0x3) << 0) x 157 include/linux/mfd/mc13xxx.h #define MC13783_LED_C5_CURRENT_G3(x) (((x) & 0x3) << 2) x 158 include/linux/mfd/mc13xxx.h #define MC13783_LED_C5_CURRENT_B3(x) (((x) & 0x3) << 4) x 159 include/linux/mfd/mc13xxx.h #define MC13783_LED_C5_PERIOD(x) (((x) & 0x3) << 21) x 162 include/linux/mfd/mc13xxx.h #define MC13892_LED_C0_CURRENT_MD(x) (((x) & 0x7) << 9) x 163 include/linux/mfd/mc13xxx.h #define MC13892_LED_C0_CURRENT_AD(x) (((x) & 0x7) << 21) x 165 include/linux/mfd/mc13xxx.h #define MC13892_LED_C1_CURRENT_KP(x) (((x) & 0x7) << 9) x 167 include/linux/mfd/mc13xxx.h #define MC13892_LED_C2_CURRENT_R(x) (((x) & 0x7) << 9) x 168 include/linux/mfd/mc13xxx.h #define MC13892_LED_C2_CURRENT_G(x) (((x) & 0x7) << 21) x 170 include/linux/mfd/mc13xxx.h #define MC13892_LED_C3_CURRENT_B(x) (((x) & 0x7) << 9) x 172 include/linux/mfd/mc13xxx.h #define MC34708_LED_C0_CURRENT_R(x) (((x) & 0x3) << 9) x 173 include/linux/mfd/mc13xxx.h #define MC34708_LED_C0_CURRENT_G(x) (((x) & 0x3) << 21) x 74 include/linux/mfd/mxs-lradc.h #define LRADC_CH_NUM_SAMPLES(x) \ x 75 include/linux/mfd/mxs-lradc.h ((x) << LRADC_CH_NUM_SAMPLES_OFFSET) x 82 include/linux/mfd/mxs-lradc.h #define LRADC_DELAY_TRIGGER(x) \ x 83 include/linux/mfd/mxs-lradc.h (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \ x 88 include/linux/mfd/mxs-lradc.h #define LRADC_DELAY_TRIGGER_DELAYS(x) \ x 89 include/linux/mfd/mxs-lradc.h (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \ x 93 include/linux/mfd/mxs-lradc.h #define LRADC_DELAY_LOOP(x) \ x 94 include/linux/mfd/mxs-lradc.h (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \ x 98 include/linux/mfd/mxs-lradc.h #define LRADC_DELAY_DELAY(x) \ x 99 include/linux/mfd/mxs-lradc.h (((x) << LRADC_DELAY_DELAY_OFFSET) & \ x 105 include/linux/mfd/mxs-lradc.h #define LRADC_CTRL4_LRADCSELECT(n, x) \ x 106 include/linux/mfd/mxs-lradc.h (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \ x 593 include/linux/mfd/palmas.h #define comparator_to_palmas(x) container_of((x), struct palmas_usb, comparator) x 646 include/linux/mfd/palmas.h #define PALMAS_BASE_TO_SLAVE(x) ((x >> 8) - 1) x 647 include/linux/mfd/palmas.h #define PALMAS_BASE_TO_REG(x, y) ((x & 0xFF) + y) x 13 include/linux/mfd/stmpe.h #define STMPE_SAMPLE_TIME(x) ((x & 0xf) << 4) x 14 include/linux/mfd/stmpe.h #define STMPE_MOD_12B(x) ((x & 0x1) << 3) x 15 include/linux/mfd/stmpe.h #define STMPE_REF_SEL(x) ((x & 0x1) << 1) x 16 include/linux/mfd/stmpe.h #define STMPE_ADC_FREQ(x) (x & 0x3) x 17 include/linux/mfd/stmpe.h #define STMPE_AVE_CTRL(x) ((x & 0x3) << 6) x 18 include/linux/mfd/stmpe.h #define STMPE_DET_DELAY(x) ((x & 0x7) << 3) x 19 include/linux/mfd/stmpe.h #define STMPE_SETTLING(x) (x & 0x7) x 20 include/linux/mfd/stmpe.h #define STMPE_FRACTION_Z(x) (x & 0x7) x 21 include/linux/mfd/stmpe.h #define STMPE_I_DRIVE(x) (x & 0x1) x 22 include/linux/mfd/stmpe.h #define STMPE_OP_MODE(x) ((x & 0x7) << 1) x 12 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY(x) ((GENMASK(7, 0) & (x)) << 24) x 15 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(x) ((GENMASK(1, 0) & (x)) << 20) x 16 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL0_FS_DIV(x) ((GENMASK(3, 0) & (x)) << 16) x 17 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL0_T_ACQ(x) (GENMASK(15, 0) & (x)) x 21 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE(x) ((GENMASK(7, 0) & (x)) << 12) x 27 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(2, 0) & (x)) x 35 include/linux/mfd/sun4i-gpadc.h #define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x)) x 44 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28) x 45 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL2_TP_MODE_SELECT(x) ((GENMASK(1, 0) & (x)) << 26) x 47 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL2_PRE_MEA_THRE_CNT(x) (GENMASK(23, 0) & (x)) x 52 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_CTRL3_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) x 57 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_TPR_TEMP_PERIOD(x) (GENMASK(15, 0) & (x)) x 65 include/linux/mfd/sun4i-gpadc.h #define SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(x) ((GENMASK(4, 0) & (x)) << 8) x 63 include/linux/mfd/syscon/atmel-matrix.h #define AT91_MATRIX_MCFG(o, x) ((o) + ((x) * 0x4)) x 71 include/linux/mfd/syscon/atmel-matrix.h #define AT91_MATRIX_SCFG(o, x) ((o) + ((x) * 0x4)) x 93 include/linux/mfd/syscon/atmel-matrix.h #define AT91_MATRIX_PRAS(o, x) ((o) + ((x) * 0x8)) x 94 include/linux/mfd/syscon/atmel-matrix.h #define AT91_MATRIX_PRBS(o, x) ((o) + ((x) * 0x8) + 0x4) x 95 include/linux/mfd/syscon/atmel-matrix.h #define AT91_MATRIX_MPR(x) GENMASK(((x) * 0x4) + 1, ((x) * 0x4)) x 97 include/linux/mfd/syscon/atmel-matrix.h #define AT91_MATRIX_RCB(x) BIT(x) x 35 include/linux/mfd/syscon/atmel-mc.h #define AT91_MPR_MSTP(n) GENMASK(2 + ((x) * 4), ((x) * 4)) x 39 include/linux/mfd/syscon/atmel-mc.h #define AT91_MC_EBI_CS(n) BIT(x) x 48 include/linux/mfd/syscon/atmel-mc.h #define AT91_MC_SMC_NWS_(x) ((x) << 0) x 51 include/linux/mfd/syscon/atmel-mc.h #define AT91_MC_SMC_TDF_(x) ((x) << 8) x 59 include/linux/mfd/syscon/atmel-mc.h #define AT91_MC_SMC_ACSS_(x) ((x) << 16) x 62 include/linux/mfd/syscon/atmel-mc.h #define AT91_MC_SMC_RWSETUP_(x) ((x) << 24) x 64 include/linux/mfd/syscon/atmel-mc.h #define AT91_MC_SMC_RWHOLD_(x) ((x) << 28) x 53 include/linux/mfd/syscon/atmel-smc.h #define ATMEL_SMC_MODE_TDF(x) (((x) - 1) << 16) x 67 include/linux/mfd/syscon/atmel-smc.h #define ATMEL_HSMC_TIMINGS_RBNSEL(x) ((x) << 28) x 14 include/linux/mfd/syscon/clps711x.h #define SYSCON1_KBDSCAN(x) ((x) & 15) x 27 include/linux/mfd/syscon/clps711x.h #define SYSCON1_ADCKSEL(x) (((x) & 3) << 16) x 51 include/linux/mfd/syscon/clps711x.h #define SYSCON3_VERSN(x) (((x) >> 5) & 7) x 75 include/linux/mfd/syscon/clps711x.h #define SYSFLG1_VERID(x) (((x) >> 30) & 3) x 464 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define MCLK_DIR(x) (x == 1 ? IMX6UL_GPR1_SAI1_MCLK_DIR : x == 2 ? \ x 78 include/linux/mfd/tps68470.h #define TPS68470_GPIO_CTL_REG_A(x) (TPS68470_REG_GPCTL0A + (x) * 2) x 79 include/linux/mfd/tps68470.h #define TPS68470_GPIO_CTL_REG_B(x) (TPS68470_REG_GPCTL0B + (x) * 2) x 148 include/linux/mfd/twl6040.h #define TWL6040_I2CMODE(x) ((x & 0x3) << 4) x 94 include/linux/mfd/ucb1x00.h #define UCB_ADC_DAT(x) (((x) & 0x7fe0) >> 5) x 354 include/linux/mfd/wm8350/gpio.h #define WM8350_IRQ_GPIO(x) (50 + x) x 83 include/linux/mfd/wm8350/supply.h #define WM8350_CHG_FAST_LIMIT_mA(x) ((x / 50) & 0xf) x 84 include/linux/mfd/wm8350/supply.h #define WM8350_CHG_EOC_mA(x) (((x - 10) & 0x7) << 10) x 51 include/linux/mfd/wm8994/core.h #define WM8994_IRQ_GPIO(x) (x + WM8994_IRQ_TEMP_WARN) x 114 include/linux/mm.h #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) x 118 include/linux/mm.h #define page_to_virt(x) __va(PFN_PHYS(page_to_pfn(x))) x 122 include/linux/mm.h #define lm_alias(x) __va(__pa_symbol(x)) x 643 include/linux/mm.h static inline bool is_vmalloc_addr(const void *x) x 646 include/linux/mm.h unsigned long addr = (unsigned long)x; x 655 include/linux/mm.h #define is_ioremap_addr(x) is_vmalloc_addr(x) x 659 include/linux/mm.h extern int is_vmalloc_or_module_addr(const void *x); x 661 include/linux/mm.h static inline int is_vmalloc_or_module_addr(const void *x) x 756 include/linux/mm.h static inline struct page *virt_to_head_page(const void *x) x 758 include/linux/mm.h struct page *page = virt_to_page(x); x 695 include/linux/mm_types.h #define VM_FAULT_SET_HINDEX(x) ((__force vm_fault_t)((x) << 16)) x 696 include/linux/mm_types.h #define VM_FAULT_GET_HINDEX(x) (((__force unsigned int)(x) >> 16) & 0xf) x 108 include/linux/mman.h #define _calc_vm_trans(x, bit1, bit2) \ x 110 include/linux/mman.h ((bit1) <= (bit2) ? ((x) & (bit1)) * ((bit2) / (bit1)) \ x 111 include/linux/mman.h : ((x) & (bit1)) / ((bit1) / (bit2)))) x 490 include/linux/mmc/host.h #define mmc_dev(x) ((x)->parent) x 491 include/linux/mmc/host.h #define mmc_classdev(x) (&(x)->class_dev) x 492 include/linux/mmc/host.h #define mmc_hostname(x) (dev_name(&(x)->class_dev)) x 147 include/linux/mmc/mmc.h #define R1_STATUS(x) (x & 0xFFF9A000) x 148 include/linux/mmc/mmc.h #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ x 60 include/linux/mmc/sdio.h #define R5_STATUS(x) (x & 0xCB00) x 61 include/linux/mmc/sdio.h #define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12) /* s, b */ x 169 include/linux/mmzone.h char x[0]; x 675 include/linux/mod_devicetable.h #define X86_FEATURE_MATCH(x) \ x 676 include/linux/mod_devicetable.h { X86_VENDOR_ANY, X86_FAMILY_ANY, X86_MODEL_ANY, x } x 85 include/linux/module.h #define module_init(x) __initcall(x); x 97 include/linux/module.h #define module_exit(x) __exitcall(x); x 286 include/linux/module.h #define symbol_get(x) ((typeof(&x))(__symbol_get(__stringify(x)))) x 611 include/linux/module.h #define symbol_put(x) __symbol_put(__stringify(x)) x 635 include/linux/module.h #define symbol_put(x) do { } while (0) x 737 include/linux/module.h #define symbol_get(x) ({ extern typeof(x) x __attribute__((weak)); &(x); }) x 738 include/linux/module.h #define symbol_put(x) do { } while (0) x 739 include/linux/module.h #define symbol_put_addr(x) do { } while (0) x 842 include/linux/module.h #define symbol_request(x) try_then_request_module(symbol_get(x), "symbol:" #x) x 846 include/linux/module.h #define __MODULE_STRING(x) __stringify(x) x 296 include/linux/mtd/cfi.h #define CMD(x) cfi_build_cmd((x), map, cfi) x 300 include/linux/mtd/cfi.h #define MERGESTATUS(x) cfi_merge_status((x), map, cfi) x 311 include/linux/mtd/cfi.h return val.x[0]; x 313 include/linux/mtd/cfi.h return cfi16_to_cpu(map, val.x[0]); x 318 include/linux/mtd/cfi.h return cfi32_to_cpu(map, val.x[0]); x 327 include/linux/mtd/cfi.h return val.x[0] & 0xff; x 329 include/linux/mtd/cfi.h return cfi16_to_cpu(map, val.x[0]); x 334 include/linux/mtd/cfi.h return cfi32_to_cpu(map, val.x[0]); x 27 include/linux/mtd/cfi_endian.h #define cpu_to_cfi8(map, x) (x) x 28 include/linux/mtd/cfi_endian.h #define cfi8_to_cpu(map, x) (x) x 29 include/linux/mtd/cfi_endian.h #define cpu_to_cfi16(map, x) _cpu_to_cfi(16, (map)->swap, (x)) x 30 include/linux/mtd/cfi_endian.h #define cpu_to_cfi32(map, x) _cpu_to_cfi(32, (map)->swap, (x)) x 31 include/linux/mtd/cfi_endian.h #define cpu_to_cfi64(map, x) _cpu_to_cfi(64, (map)->swap, (x)) x 32 include/linux/mtd/cfi_endian.h #define cfi16_to_cpu(map, x) _cfi_to_cpu(16, (map)->swap, (x)) x 33 include/linux/mtd/cfi_endian.h #define cfi32_to_cpu(map, x) _cfi_to_cpu(32, (map)->swap, (x)) x 34 include/linux/mtd/cfi_endian.h #define cfi64_to_cpu(map, x) _cfi_to_cpu(64, (map)->swap, (x)) x 36 include/linux/mtd/cfi_endian.h #define _cpu_to_cfi(w, s, x) (cfi_host(s)?(x):_swap_to_cfi(w, s, x)) x 37 include/linux/mtd/cfi_endian.h #define _cfi_to_cpu(w, s, x) (cfi_host(s)?(x):_swap_to_cpu(w, s, x)) x 38 include/linux/mtd/cfi_endian.h #define _swap_to_cfi(w, s, x) (cfi_be(s)?cpu_to_be##w(x):cpu_to_le##w(x)) x 39 include/linux/mtd/cfi_endian.h #define _swap_to_cpu(w, s, x) (cfi_be(s)?be##w##_to_cpu(x):le##w##_to_cpu(x)) x 170 include/linux/mtd/map.h unsigned long x[MAX_MAP_LONGS]; x 263 include/linux/mtd/map.h if ((val1).x[i] != (val2).x[i]) { \ x 275 include/linux/mtd/map.h r.x[i] = (val1).x[i] & (val2).x[i]; \ x 284 include/linux/mtd/map.h r.x[i] = (val1).x[i] & ~(val2).x[i]; \ x 293 include/linux/mtd/map.h r.x[i] = (val1).x[i] | (val2).x[i]; \ x 301 include/linux/mtd/map.h if (((val1).x[i] & (val2).x[i]) != (val3).x[i]) { \ x 313 include/linux/mtd/map.h if ((val1).x[i] & (val2).x[i]) { \ x 326 include/linux/mtd/map.h r.x[0] = *(unsigned char *)ptr; x 328 include/linux/mtd/map.h r.x[0] = get_unaligned((uint16_t *)ptr); x 330 include/linux/mtd/map.h r.x[0] = get_unaligned((uint32_t *)ptr); x 333 include/linux/mtd/map.h r.x[0] = get_unaligned((uint64_t *)ptr); x 336 include/linux/mtd/map.h memcpy(r.x, ptr, map->bankwidth); x 360 include/linux/mtd/map.h orig.x[0] &= ~(0xff << bitpos); x 361 include/linux/mtd/map.h orig.x[0] |= (unsigned long)buf[i-start] << bitpos; x 381 include/linux/mtd/map.h r.x[0] = (1UL << bw) - 1; x 384 include/linux/mtd/map.h r.x[i] = ~0UL; x 394 include/linux/mtd/map.h r.x[0] = __raw_readb(map->virt + ofs); x 396 include/linux/mtd/map.h r.x[0] = __raw_readw(map->virt + ofs); x 398 include/linux/mtd/map.h r.x[0] = __raw_readl(map->virt + ofs); x 401 include/linux/mtd/map.h r.x[0] = __raw_readq(map->virt + ofs); x 404 include/linux/mtd/map.h memcpy_fromio(r.x, map->virt + ofs, map->bankwidth); x 414 include/linux/mtd/map.h __raw_writeb(datum.x[0], map->virt + ofs); x 416 include/linux/mtd/map.h __raw_writew(datum.x[0], map->virt + ofs); x 418 include/linux/mtd/map.h __raw_writel(datum.x[0], map->virt + ofs); x 421 include/linux/mtd/map.h __raw_writeq(datum.x[0], map->virt + ofs); x 424 include/linux/mtd/map.h memcpy_toio(map->virt+ofs, datum.x, map->bankwidth); x 33 include/linux/mtd/ndfc.h #define NDFC_CCR_BS(x) (((x) & 0x3) << 24) /* Select Bank on CE[x] */ x 15 include/linux/mtd/onenand_regs.h #define ONENAND_MEMORY_MAP(x) ((x) << 1) x 82 include/linux/mtd/qinfo.h val.x[0] = cmd; x 86 include/linux/mtd/qinfo.h #define CMD(x) lpddr_build_cmd(x, map) x 87 include/linux/mtd/qinfo.h #define CMDVAL(cmd) cmd.x[0] x 624 include/linux/mtd/rawnand.h #define PSEC_TO_NSEC(x) __DIVIDE(x, 1000) x 625 include/linux/mtd/rawnand.h #define PSEC_TO_MSEC(x) __DIVIDE(x, 1000000000) x 74 include/linux/mtd/xip.h #define xip_elapsed_since(x) (0) x 69 include/linux/mux/driver.h #define to_mux_chip(x) container_of((x), struct mux_chip, dev) x 32 include/linux/mv643xx_eth.h #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) x 913 include/linux/netdevice.h int (*xdo_dev_state_add) (struct xfrm_state *x); x 914 include/linux/netdevice.h void (*xdo_dev_state_delete) (struct xfrm_state *x); x 915 include/linux/netdevice.h void (*xdo_dev_state_free) (struct xfrm_state *x); x 917 include/linux/netdevice.h struct xfrm_state *x); x 918 include/linux/netdevice.h void (*xdo_dev_state_advance_esn) (struct xfrm_state *x); x 590 include/linux/nfs_fs.h # define NFS_IFDEBUG(x) x x 593 include/linux/nfs_fs.h # define NFS_IFDEBUG(x) x 536 include/linux/nodemask.h #define NODEMASK_SCRATCH(x) \ x 537 include/linux/nodemask.h NODEMASK_ALLOC(struct nodemask_scratch, x, \ x 539 include/linux/nodemask.h #define NODEMASK_SCRATCH_FREE(x) NODEMASK_FREE(x) x 253 include/linux/of.h #define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) x 254 include/linux/of.h #define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) x 219 include/linux/pagemap.h static inline struct page *page_cache_alloc(struct address_space *x) x 221 include/linux/pagemap.h return __page_cache_alloc(mapping_gfp_mask(x)); x 224 include/linux/pagemap.h static inline gfp_t readahead_gfp_mask(struct address_space *x) x 226 include/linux/pagemap.h return mapping_gfp_mask(x) | __GFP_NORETRY | __GFP_NOWARN; x 491 include/linux/parport.h #define parport_write_data(p,x) parport_pc_write_data(p,x) x 493 include/linux/parport.h #define parport_write_control(p,x) parport_pc_write_control(p,x) x 505 include/linux/parport.h #define parport_write_data(p,x) (p)->ops->write_data(p,x) x 507 include/linux/parport.h #define parport_write_control(p,x) (p)->ops->write_control(p,x) x 59 include/linux/pci.h #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) x 1660 include/linux/pci.h #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ x 1661 include/linux/pci.h _PCI_NOP(o, word, u16 x) \ x 1662 include/linux/pci.h _PCI_NOP(o, dword, u32 x) x 2164 include/linux/pci.h #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT) x 1431 include/linux/perf_event.h #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) x 18 include/linux/pfn.h #define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK) x 19 include/linux/pfn.h #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) x 20 include/linux/pfn.h #define PFN_DOWN(x) ((x) >> PAGE_SHIFT) x 21 include/linux/pfn.h #define PFN_PHYS(x) ((phys_addr_t)(x) << PAGE_SHIFT) x 22 include/linux/pfn.h #define PHYS_PFN(x) ((unsigned long)((x) >> PAGE_SHIFT)) x 68 include/linux/phy/omap_usb.h #define phy_to_omapusb(x) container_of((x), struct omap_usb, phy) x 18 include/linux/platform_data/dma-iop32x.h #define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x)) x 20 include/linux/platform_data/media/omap1_camera.h #define OMAP1_CAMERA_MIN_BUF_COUNT(x) ((x) == OMAP1_CAM_DMA_CONTIG ? 3 : 2) x 33 include/linux/platform_data/video-imxfb.h #define PCR_ACD(x) (((x) & 0x7f) << 8) x 36 include/linux/platform_data/video-imxfb.h #define PCR_PCD(x) ((x) & 0x3f) x 38 include/linux/platform_data/video-imxfb.h #define PWMR_CLS(x) (((x) & 0x1ff) << 16) x 43 include/linux/platform_data/video-imxfb.h #define PWMR_PW(x) ((x) & 0xff) x 45 include/linux/platform_data/video-imxfb.h #define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) x 46 include/linux/platform_data/video-imxfb.h #define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) x 47 include/linux/platform_data/video-imxfb.h #define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) x 48 include/linux/platform_data/video-imxfb.h #define LSCR1_GRAY2(x) (((x) & 0xf) << 4) x 49 include/linux/platform_data/video-imxfb.h #define LSCR1_GRAY1(x) (((x) & 0xf)) x 53 include/linux/platform_data/video-pxafb.h #define LCD_AC_BIAS_FREQ(x) (((x) & 0xff) << 10) x 44 include/linux/platform_device.h #define to_platform_device(x) container_of((x), struct platform_device, dev) x 42 include/linux/preempt.h #define __IRQ_MASK(x) ((1UL << (x))-1) x 39 include/linux/prefetch.h #define prefetch(x) __builtin_prefetch(x) x 43 include/linux/prefetch.h #define prefetchw(x) __builtin_prefetch(x,1) x 47 include/linux/prefetch.h #define spin_lock_prefetch(x) prefetchw(x) x 7 include/linux/prime_numbers.h bool is_prime_number(unsigned long x); x 8 include/linux/prime_numbers.h unsigned long next_prime_number(unsigned long x); x 20 include/linux/psp-sev.h #define __psp_pa(x) __sme_pa(x) x 22 include/linux/psp-sev.h #define __psp_pa(x) __pa(x) x 47 include/linux/pxa2xx_ssp.h #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */ x 54 include/linux/pxa2xx_ssp.h #define SSCR0_SCR(x) ((x) << 8) /* Serial Clock Rate (mask) */ x 62 include/linux/pxa2xx_ssp.h #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ x 90 include/linux/pxa2xx_ssp.h #define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */ x 92 include/linux/pxa2xx_ssp.h #define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */ x 101 include/linux/pxa2xx_ssp.h #define CE4100_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..4] */ x 103 include/linux/pxa2xx_ssp.h #define CE4100_SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..4] */ x 107 include/linux/pxa2xx_ssp.h #define QUARK_X1000_SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..32] */ x 118 include/linux/pxa2xx_ssp.h #define QUARK_X1000_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..32] */ x 120 include/linux/pxa2xx_ssp.h #define QUARK_X1000_SSCR1_RxTresh(x) (((x) - 1) << 11) /* level [1..32] */ x 153 include/linux/pxa2xx_ssp.h #define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */ x 156 include/linux/pxa2xx_ssp.h #define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */ x 157 include/linux/pxa2xx_ssp.h #define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */ x 158 include/linux/pxa2xx_ssp.h #define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */ x 159 include/linux/pxa2xx_ssp.h #define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */ x 160 include/linux/pxa2xx_ssp.h #define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */ x 164 include/linux/pxa2xx_ssp.h #define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */ x 165 include/linux/pxa2xx_ssp.h #define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */ x 169 include/linux/pxa2xx_ssp.h #define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */ x 170 include/linux/pxa2xx_ssp.h #define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ x 183 include/linux/pxa2xx_ssp.h #define SSITF_TxLoThresh(x) (((x) - 1) << 8) x 184 include/linux/pxa2xx_ssp.h #define SSITF_TxHiThresh(x) ((x) - 1) x 187 include/linux/pxa2xx_ssp.h #define SSIRF_RxThresh(x) ((x) - 1) x 42 include/linux/qed/common_hsi.h #define PTR_LO(x) ((u32)(((uintptr_t)(x)) & 0xffffffff)) x 43 include/linux/qed/common_hsi.h #define PTR_HI(x) ((u32)((((uintptr_t)(x)) >> 16) >> 16)) x 44 include/linux/qed/common_hsi.h #define DMA_LO_LE(x) cpu_to_le32(lower_32_bits(x)) x 45 include/linux/qed/common_hsi.h #define DMA_HI_LE(x) cpu_to_le32(upper_32_bits(x)) x 46 include/linux/qed/common_hsi.h #define DMA_REGPAIR_LE(x, val) do { \ x 47 include/linux/qed/common_hsi.h (x).hi = DMA_HI_LE((val)); \ x 48 include/linux/qed/common_hsi.h (x).lo = DMA_LO_LE((val)); \ x 57 include/linux/raid/pq.h #define cpu_has_feature(x) 1 x 67 include/linux/raid/pq.h #define subsys_initcall(x) x 68 include/linux/raid/pq.h #define module_exit(x) x 70 include/linux/raid/pq.h #define IS_ENABLED(x) (x) x 171 include/linux/raid/pq.h # define __get_free_pages(x, y) ((unsigned long)mmap(NULL, PAGE_SIZE << (y), \ x 175 include/linux/raid/pq.h # define free_pages(x, y) munmap((void *)(x), PAGE_SIZE << (y)) x 147 include/linux/random.h static inline u32 __seed(u32 x, u32 m) x 149 include/linux/random.h return (x < m) ? x + m : x; x 54 include/linux/rio_regs.h #define RIO_GET_TOTAL_PORTS(x) ((x & RIO_SWP_INFO_PORT_TOTAL_MASK) >> 8) x 55 include/linux/rio_regs.h #define RIO_GET_PORT_NUM(x) (x & RIO_SWP_INFO_PORT_NUM_MASK) x 191 include/linux/rio_regs.h #define RIO_GET_BLOCK_PTR(x) ((x & RIO_EFB_PTR_MASK) >> 16) x 192 include/linux/rio_regs.h #define RIO_GET_BLOCK_ID(x) (x & RIO_EFB_ID_MASK) x 326 include/linux/rio_regs.h #define RIO_EM_PN_ERR_DETECT(x) (0x040 + x*0x40) /* Port N Error Detect CSR */ x 333 include/linux/rio_regs.h #define RIO_EM_PN_ERRRATE_EN(x) (0x044 + x*0x40) /* Port N Error Rate Enable CSR */ x 338 include/linux/rio_regs.h #define RIO_EM_PN_ATTRIB_CAP(x) (0x048 + x*0x40) /* Port N Attributes Capture CSR */ x 339 include/linux/rio_regs.h #define RIO_EM_PN_PKT_CAP_0(x) (0x04c + x*0x40) /* Port N Packet/Control Symbol Capture 0 CSR */ x 340 include/linux/rio_regs.h #define RIO_EM_PN_PKT_CAP_1(x) (0x050 + x*0x40) /* Port N Packet Capture 1 CSR */ x 341 include/linux/rio_regs.h #define RIO_EM_PN_PKT_CAP_2(x) (0x054 + x*0x40) /* Port N Packet Capture 2 CSR */ x 342 include/linux/rio_regs.h #define RIO_EM_PN_PKT_CAP_3(x) (0x058 + x*0x40) /* Port N Packet Capture 3 CSR */ x 343 include/linux/rio_regs.h #define RIO_EM_PN_ERRRATE(x) (0x068 + x*0x40) /* Port N Error Rate CSR */ x 344 include/linux/rio_regs.h #define RIO_EM_PN_ERRRATE_TR(x) (0x06c + x*0x40) /* Port N Error Rate Threshold CSR */ x 345 include/linux/rio_regs.h #define RIO_EM_PN_LINK_UDT(x) (0x070 + x*0x40) /* Port N Link Uninit Discard Timer CSR */ x 378 include/linux/rio_regs.h #define RIO_SPx_RT_CTL_CSR(x) (0x040 + (0x20 * x)) x 379 include/linux/rio_regs.h #define RIO_SPx_RT_LVL0_INFO_CSR(x) (0x50 + (0x20 * x)) x 380 include/linux/rio_regs.h #define RIO_SPx_RT_LVL1_INFO_CSR(x) (0x54 + (0x20 * x)) x 381 include/linux/rio_regs.h #define RIO_SPx_RT_LVL2_INFO_CSR(x) (0x58 + (0x20 * x)) x 122 include/linux/rslib.h static inline int rs_modnn(struct rs_codec *rs, int x) x 124 include/linux/rslib.h while (x >= rs->nn) { x 125 include/linux/rslib.h x -= rs->nn; x 126 include/linux/rslib.h x = (x >> rs->mm) + (x & rs->nn); x 128 include/linux/rslib.h return x; x 43 include/linux/rwlock_types.h #define DEFINE_RWLOCK(x) rwlock_t x = __RW_LOCK_UNLOCKED(x) x 43 include/linux/sched/loadavg.h #define LOAD_INT(x) ((x) >> FSHIFT) x 44 include/linux/sched/loadavg.h #define LOAD_FRAC(x) LOAD_INT(((x) & (FIXED_1-1)) * 100) x 1579 include/linux/security.h int security_xfrm_state_alloc(struct xfrm_state *x, struct xfrm_user_sec_ctx *sec_ctx); x 1580 include/linux/security.h int security_xfrm_state_alloc_acquire(struct xfrm_state *x, x 1582 include/linux/security.h int security_xfrm_state_delete(struct xfrm_state *x); x 1583 include/linux/security.h void security_xfrm_state_free(struct xfrm_state *x); x 1585 include/linux/security.h int security_xfrm_state_pol_flow_match(struct xfrm_state *x, x 1614 include/linux/security.h static inline int security_xfrm_state_alloc(struct xfrm_state *x, x 1620 include/linux/security.h static inline int security_xfrm_state_alloc_acquire(struct xfrm_state *x, x 1626 include/linux/security.h static inline void security_xfrm_state_free(struct xfrm_state *x) x 1630 include/linux/security.h static inline int security_xfrm_state_delete(struct xfrm_state *x) x 1640 include/linux/security.h static inline int security_xfrm_state_pol_flow_match(struct xfrm_state *x, x 89 include/linux/seqlock.h # define seqcount_lockdep_reader_access(x) x 419 include/linux/seqlock.h #define seqlock_init(x) \ x 421 include/linux/seqlock.h seqcount_init(&(x)->seqcount); \ x 422 include/linux/seqlock.h spin_lock_init(&(x)->lock); \ x 425 include/linux/seqlock.h #define DEFINE_SEQLOCK(x) \ x 426 include/linux/seqlock.h seqlock_t x = __SEQLOCK_UNLOCKED(x) x 268 include/linux/serdev.h #define serdev_device_driver_register(x) x 269 include/linux/serdev.h #define serdev_device_driver_unregister(x) x 70 include/linux/serial_bcm63xx.h #define UART_EXTINP_IRSTAT(x) (1 << (x + 4)) x 71 include/linux/serial_bcm63xx.h #define UART_EXTINP_IRMASK(x) (1 << (x + 8)) x 87 include/linux/serial_bcm63xx.h #define UART_IR_MASK(x) (1 << (x + 16)) x 88 include/linux/serial_bcm63xx.h #define UART_IR_STAT(x) (1 << (x)) x 146 include/linux/signal.h #define _sig_or(x,y) ((x) | (y)) x 149 include/linux/signal.h #define _sig_and(x,y) ((x) & (y)) x 152 include/linux/signal.h #define _sig_andn(x,y) ((x) & ~(y)) x 176 include/linux/signal.h #define _sig_not(x) (~(x)) x 3714 include/linux/skbuff.h #define __it(x, op) (x -= sizeof(u##op)) x 133 include/linux/slab.h #define ZERO_OR_NULL_PTR(x) ((unsigned long)(x) <= \ x 93 include/linux/slab_def.h void *x) x 95 include/linux/slab_def.h void *object = x - (x - page->s_mem) % cache->size; x 76 include/linux/slub_def.h unsigned int x; x 175 include/linux/slub_def.h void *x) { x 176 include/linux/slub_def.h void *object = x - (x - page_address(page)) % cache->size; x 26 include/linux/smc91x.h #define SMC91X_IO_SHIFT(x) (((x) >> 4) & 0x3) x 212 include/linux/smp.h #define __smp_processor_id(x) raw_smp_processor_id(x) x 25 include/linux/soc/ti/knav_dma.h #define MASK(x) (BIT(x) - 1) x 20 include/linux/spinlock_api_smp.h #define assert_raw_spin_locked(x) BUG_ON(!raw_spin_is_locked(x)) x 59 include/linux/spinlock_types.h #define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) x 81 include/linux/spinlock_types.h #define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) x 27 include/linux/spinlock_up.h #define arch_spin_is_locked(x) ((x)->slock == 0) x 23 include/linux/ssb/ssb_driver_extif.h #define SSB_EXTIF_PCMCIA_MEMBASE(x) (x) x 24 include/linux/ssb/ssb_driver_extif.h #define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000) x 25 include/linux/ssb/ssb_driver_extif.h #define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000) x 26 include/linux/ssb/ssb_driver_extif.h #define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000) x 27 include/linux/ssb/ssb_driver_extif.h #define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000) x 180 include/linux/string.h extern void kfree_const(const void *x); x 263 include/linux/string.h #define __RENAME(x) __asm__(#x) x 9 include/linux/stringify.h #define __stringify_1(x...) #x x 10 include/linux/stringify.h #define __stringify(x...) __stringify_1(x) x 67 include/linux/sunrpc/debug.h # define RPC_IFDEBUG(x) x x 73 include/linux/sunrpc/debug.h # define RPC_IFDEBUG(x) x 94 include/linux/sunrpc/gss_err.h #define GSS_CALLING_ERROR(x) \ x 95 include/linux/sunrpc/gss_err.h ((x) & (GSS_C_CALLING_ERROR_MASK << GSS_C_CALLING_ERROR_OFFSET)) x 96 include/linux/sunrpc/gss_err.h #define GSS_ROUTINE_ERROR(x) \ x 97 include/linux/sunrpc/gss_err.h ((x) & (GSS_C_ROUTINE_ERROR_MASK << GSS_C_ROUTINE_ERROR_OFFSET)) x 98 include/linux/sunrpc/gss_err.h #define GSS_SUPPLEMENTARY_INFO(x) \ x 99 include/linux/sunrpc/gss_err.h ((x) & (GSS_C_SUPPLEMENTARY_MASK << GSS_C_SUPPLEMENTARY_OFFSET)) x 100 include/linux/sunrpc/gss_err.h #define GSS_ERROR(x) \ x 101 include/linux/sunrpc/gss_err.h ((x) & ((GSS_C_CALLING_ERROR_MASK << GSS_C_CALLING_ERROR_OFFSET) | \ x 156 include/linux/sunrpc/gss_err.h #define GSS_CALLING_ERROR_FIELD(x) \ x 157 include/linux/sunrpc/gss_err.h (((x) >> GSS_C_CALLING_ERROR_OFFSET) & GSS_C_CALLING_ERROR_MASK) x 158 include/linux/sunrpc/gss_err.h #define GSS_ROUTINE_ERROR_FIELD(x) \ x 159 include/linux/sunrpc/gss_err.h (((x) >> GSS_C_ROUTINE_ERROR_OFFSET) & GSS_C_ROUTINE_ERROR_MASK) x 160 include/linux/sunrpc/gss_err.h #define GSS_SUPPLEMENTARY_INFO_FIELD(x) \ x 161 include/linux/sunrpc/gss_err.h (((x) >> GSS_C_SUPPLEMENTARY_OFFSET) & GSS_C_SUPPLEMENTARY_MASK) x 223 include/linux/syscalls.h #define SYSCALL_DEFINEx(x, sname, ...) \ x 224 include/linux/syscalls.h SYSCALL_METADATA(sname, x, __VA_ARGS__) \ x 225 include/linux/syscalls.h __SYSCALL_DEFINEx(x, sname, __VA_ARGS__) x 235 include/linux/syscalls.h #define __SYSCALL_DEFINEx(x, name, ...) \ x 239 include/linux/syscalls.h asmlinkage long sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) \ x 242 include/linux/syscalls.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__));\ x 243 include/linux/syscalls.h asmlinkage long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \ x 244 include/linux/syscalls.h asmlinkage long __se_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \ x 246 include/linux/syscalls.h long ret = __do_sys##name(__MAP(x,__SC_CAST,__VA_ARGS__));\ x 247 include/linux/syscalls.h __MAP(x,__SC_TEST,__VA_ARGS__); \ x 248 include/linux/syscalls.h __PROTECT(x, ret,__MAP(x,__SC_ARGS,__VA_ARGS__)); \ x 252 include/linux/syscalls.h static inline long __do_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)) x 143 include/linux/timex.h #define shift_right(x, s) ({ \ x 144 include/linux/timex.h __typeof__(x) __x = (x); \ x 16 include/linux/tpm_eventlog.h #define do_endian_conversion(x) be32_to_cpu(x) x 18 include/linux/tpm_eventlog.h #define do_endian_conversion(x) x x 97 include/linux/tracepoint.h #define TRACE_DEFINE_ENUM(x) x 98 include/linux/tracepoint.h #define TRACE_DEFINE_SIZEOF(x) x 53 include/linux/transport_class.h #define class_to_transport_class(x) \ x 54 include/linux/transport_class.h container_of(x, struct transport_class, class) x 61 include/linux/transport_class.h #define attribute_container_to_transport_container(x) \ x 62 include/linux/transport_class.h container_of(x, struct transport_container, ac) x 9 include/linux/typecheck.h #define typecheck(type,x) \ x 11 include/linux/typecheck.h typeof(x) __dummy2; \ x 371 include/linux/uaccess.h #define unsafe_get_user(x,p,e) unsafe_op_wrap(__get_user(x,p),e) x 372 include/linux/uaccess.h #define unsafe_put_user(x,p,e) unsafe_op_wrap(__put_user(x,p),e) x 6 include/linux/unaligned/packed_struct.h struct __una_u16 { u16 x; } __packed; x 7 include/linux/unaligned/packed_struct.h struct __una_u32 { u32 x; } __packed; x 8 include/linux/unaligned/packed_struct.h struct __una_u64 { u64 x; } __packed; x 13 include/linux/unaligned/packed_struct.h return ptr->x; x 19 include/linux/unaligned/packed_struct.h return ptr->x; x 25 include/linux/unaligned/packed_struct.h return ptr->x; x 31 include/linux/unaligned/packed_struct.h ptr->x = val; x 37 include/linux/unaligned/packed_struct.h ptr->x = val; x 43 include/linux/unaligned/packed_struct.h ptr->x = val; x 89 include/linux/usb/cdc_ncm.h #define cdc_ncm_comm_intf_is_mbim(x) ((x)->desc.bInterfaceSubClass == USB_CDC_SUBCLASS_MBIM && \ x 90 include/linux/usb/cdc_ncm.h (x)->desc.bInterfaceProtocol == USB_CDC_PROTO_NONE) x 91 include/linux/usb/cdc_ncm.h #define cdc_ncm_data_intf_is_mbim(x) ((x)->desc.bInterfaceProtocol == USB_CDC_MBIM_PROTO_NTB) x 60 include/linux/usb/composite.h #define USB_MS_TO_HS_INTERVAL(x) (ilog2((x * 1000 / 125)) + 1) x 30 include/linux/usb/ehci-dbgp.h #define DBGP_ERRCODE(x) (((x)>>7)&0x07) x 36 include/linux/usb/ehci-dbgp.h #define DBGP_LEN(x) (((x)>>0)&0x0f) x 38 include/linux/usb/ehci-dbgp.h #define DBGP_PID_GET(x) (((x)>>16)&0xff) x 144 include/linux/usb/ehci_def.h #define PORT_TEST(x) (((x)&0xf)<<16) /* Port Test Control */ x 153 include/linux/usb/ehci_def.h #define PORT_USB11(x) (((x)&(3<<10)) == (1<<10)) /* USB 1.1 device */ x 37 include/linux/usb/pd_vdo.h #define VDO_SVDM_VERS(x) ((x) << 13) x 38 include/linux/usb/pd_vdo.h #define VDO_OPOS(x) ((x) << 8) x 39 include/linux/usb/pd_vdo.h #define VDO_CMDT(x) ((x) << 6) x 59 include/linux/usb/pd_vdo.h #define VDO_CMD_VENDOR(x) (((0x10 + (x)) & 0x1f)) x 73 include/linux/usb/phy.h int (*read)(struct usb_phy *x, u32 reg); x 74 include/linux/usb/phy.h int (*write)(struct usb_phy *x, u32 val, u32 reg); x 126 include/linux/usb/phy.h int (*init)(struct usb_phy *x); x 127 include/linux/usb/phy.h void (*shutdown)(struct usb_phy *x); x 130 include/linux/usb/phy.h int (*set_vbus)(struct usb_phy *x, int on); x 133 include/linux/usb/phy.h int (*set_power)(struct usb_phy *x, x 137 include/linux/usb/phy.h int (*set_suspend)(struct usb_phy *x, x 145 include/linux/usb/phy.h int (*set_wakeup)(struct usb_phy *x, bool enabled); x 148 include/linux/usb/phy.h int (*notify_connect)(struct usb_phy *x, x 150 include/linux/usb/phy.h int (*notify_disconnect)(struct usb_phy *x, x 157 include/linux/usb/phy.h enum usb_charger_type (*charger_detect)(struct usb_phy *x); x 166 include/linux/usb/phy.h static inline int usb_phy_io_read(struct usb_phy *x, u32 reg) x 168 include/linux/usb/phy.h if (x && x->io_ops && x->io_ops->read) x 169 include/linux/usb/phy.h return x->io_ops->read(x, reg); x 174 include/linux/usb/phy.h static inline int usb_phy_io_write(struct usb_phy *x, u32 val, u32 reg) x 176 include/linux/usb/phy.h if (x && x->io_ops && x->io_ops->write) x 177 include/linux/usb/phy.h return x->io_ops->write(x, val, reg); x 183 include/linux/usb/phy.h usb_phy_init(struct usb_phy *x) x 185 include/linux/usb/phy.h if (x && x->init) x 186 include/linux/usb/phy.h return x->init(x); x 192 include/linux/usb/phy.h usb_phy_shutdown(struct usb_phy *x) x 194 include/linux/usb/phy.h if (x && x->shutdown) x 195 include/linux/usb/phy.h x->shutdown(x); x 199 include/linux/usb/phy.h usb_phy_vbus_on(struct usb_phy *x) x 201 include/linux/usb/phy.h if (!x || !x->set_vbus) x 204 include/linux/usb/phy.h return x->set_vbus(x, true); x 208 include/linux/usb/phy.h usb_phy_vbus_off(struct usb_phy *x) x 210 include/linux/usb/phy.h if (!x || !x->set_vbus) x 213 include/linux/usb/phy.h return x->set_vbus(x, false); x 226 include/linux/usb/phy.h extern void devm_usb_put_phy(struct device *dev, struct usb_phy *x); x 227 include/linux/usb/phy.h extern void usb_phy_set_event(struct usb_phy *x, unsigned long event); x 258 include/linux/usb/phy.h static inline void usb_put_phy(struct usb_phy *x) x 262 include/linux/usb/phy.h static inline void devm_usb_put_phy(struct device *dev, struct usb_phy *x) x 266 include/linux/usb/phy.h static inline void usb_phy_set_event(struct usb_phy *x, unsigned long event) x 288 include/linux/usb/phy.h usb_phy_set_power(struct usb_phy *x, unsigned mA) x 290 include/linux/usb/phy.h if (!x) x 293 include/linux/usb/phy.h usb_phy_set_charger_current(x, mA); x 295 include/linux/usb/phy.h if (x->set_power) x 296 include/linux/usb/phy.h return x->set_power(x, mA); x 302 include/linux/usb/phy.h usb_phy_set_suspend(struct usb_phy *x, int suspend) x 304 include/linux/usb/phy.h if (x && x->set_suspend != NULL) x 305 include/linux/usb/phy.h return x->set_suspend(x, suspend); x 311 include/linux/usb/phy.h usb_phy_set_wakeup(struct usb_phy *x, bool enabled) x 313 include/linux/usb/phy.h if (x && x->set_wakeup) x 314 include/linux/usb/phy.h return x->set_wakeup(x, enabled); x 320 include/linux/usb/phy.h usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed) x 322 include/linux/usb/phy.h if (x && x->notify_connect) x 323 include/linux/usb/phy.h return x->notify_connect(x, speed); x 329 include/linux/usb/phy.h usb_phy_notify_disconnect(struct usb_phy *x, enum usb_device_speed speed) x 331 include/linux/usb/phy.h if (x && x->notify_disconnect) x 332 include/linux/usb/phy.h return x->notify_disconnect(x, speed); x 339 include/linux/usb/phy.h usb_register_notifier(struct usb_phy *x, struct notifier_block *nb) x 341 include/linux/usb/phy.h return atomic_notifier_chain_register(&x->notifier, nb); x 345 include/linux/usb/phy.h usb_unregister_notifier(struct usb_phy *x, struct notifier_block *nb) x 347 include/linux/usb/phy.h atomic_notifier_chain_unregister(&x->notifier, nb); x 29 include/linux/usb/phy_companion.h int (*set_vbus)(struct phy_companion *x, bool enabled); x 32 include/linux/usb/phy_companion.h int (*start_srp)(struct phy_companion *x); x 5 include/linux/util_macros.h #define __find_closest(x, a, as, op) \ x 8 include/linux/util_macros.h typeof(x) __fc_x = (x); \ x 27 include/linux/util_macros.h #define find_closest(x, a, as) __find_closest(x, a, as, <=) x 39 include/linux/util_macros.h #define find_closest_descending(x, a, as) __find_closest(x, a, as, >=) x 253 include/linux/visorbus.h #define to_visor_device(x) container_of(x, struct visor_device, device) x 316 include/linux/visorbus.h #define to_visor_driver(x) (container_of(x, struct visor_driver, driver)) x 104 include/linux/vmstat.h #define count_vm_numa_event(x) count_vm_event(x) x 105 include/linux/vmstat.h #define count_vm_numa_events(x, y) count_vm_events(x, y) x 107 include/linux/vmstat.h #define count_vm_numa_event(x) do {} while (0) x 108 include/linux/vmstat.h #define count_vm_numa_events(x, y) do { (void)(y); } while (0) x 112 include/linux/vmstat.h #define count_vm_tlb_event(x) count_vm_event(x) x 113 include/linux/vmstat.h #define count_vm_tlb_events(x, y) count_vm_events(x, y) x 115 include/linux/vmstat.h #define count_vm_tlb_event(x) do {} while (0) x 116 include/linux/vmstat.h #define count_vm_tlb_events(x, y) do { (void)(y); } while (0) x 120 include/linux/vmstat.h #define count_vm_vmacache_event(x) count_vm_event(x) x 122 include/linux/vmstat.h #define count_vm_vmacache_event(x) do {} while (0) x 136 include/linux/vmstat.h static inline void zone_numa_state_add(long x, struct zone *zone, x 139 include/linux/vmstat.h atomic_long_add(x, &zone->vm_numa_stat[item]); x 140 include/linux/vmstat.h atomic_long_add(x, &vm_numa_stat[item]); x 145 include/linux/vmstat.h long x = atomic_long_read(&vm_numa_stat[item]); x 147 include/linux/vmstat.h return x; x 153 include/linux/vmstat.h long x = atomic_long_read(&zone->vm_numa_stat[item]); x 157 include/linux/vmstat.h x += per_cpu_ptr(zone->pageset, cpu)->vm_numa_stat_diff[item]; x 159 include/linux/vmstat.h return x; x 163 include/linux/vmstat.h static inline void zone_page_state_add(long x, struct zone *zone, x 166 include/linux/vmstat.h atomic_long_add(x, &zone->vm_stat[item]); x 167 include/linux/vmstat.h atomic_long_add(x, &vm_zone_stat[item]); x 170 include/linux/vmstat.h static inline void node_page_state_add(long x, struct pglist_data *pgdat, x 173 include/linux/vmstat.h atomic_long_add(x, &pgdat->vm_stat[item]); x 174 include/linux/vmstat.h atomic_long_add(x, &vm_node_stat[item]); x 179 include/linux/vmstat.h long x = atomic_long_read(&vm_zone_stat[item]); x 181 include/linux/vmstat.h if (x < 0) x 182 include/linux/vmstat.h x = 0; x 184 include/linux/vmstat.h return x; x 189 include/linux/vmstat.h long x = atomic_long_read(&vm_node_stat[item]); x 191 include/linux/vmstat.h if (x < 0) x 192 include/linux/vmstat.h x = 0; x 194 include/linux/vmstat.h return x; x 200 include/linux/vmstat.h long x = atomic_long_read(&zone->vm_stat[item]); x 202 include/linux/vmstat.h if (x < 0) x 203 include/linux/vmstat.h x = 0; x 205 include/linux/vmstat.h return x; x 217 include/linux/vmstat.h long x = atomic_long_read(&zone->vm_stat[item]); x 222 include/linux/vmstat.h x += per_cpu_ptr(zone->pageset, cpu)->vm_stat_diff[item]; x 224 include/linux/vmstat.h if (x < 0) x 225 include/linux/vmstat.h x = 0; x 227 include/linux/vmstat.h return x; x 54 include/linux/vt_kern.h #define update_screen(x) redraw_screen(x, 0) x 55 include/linux/vt_kern.h #define switch_screen(x) redraw_screen(x, 1) x 208 include/linux/wait.h #define wake_up(x) __wake_up(x, TASK_NORMAL, 1, NULL) x 209 include/linux/wait.h #define wake_up_nr(x, nr) __wake_up(x, TASK_NORMAL, nr, NULL) x 210 include/linux/wait.h #define wake_up_all(x) __wake_up(x, TASK_NORMAL, 0, NULL) x 211 include/linux/wait.h #define wake_up_locked(x) __wake_up_locked((x), TASK_NORMAL, 1) x 212 include/linux/wait.h #define wake_up_all_locked(x) __wake_up_locked((x), TASK_NORMAL, 0) x 214 include/linux/wait.h #define wake_up_interruptible(x) __wake_up(x, TASK_INTERRUPTIBLE, 1, NULL) x 215 include/linux/wait.h #define wake_up_interruptible_nr(x, nr) __wake_up(x, TASK_INTERRUPTIBLE, nr, NULL) x 216 include/linux/wait.h #define wake_up_interruptible_all(x) __wake_up(x, TASK_INTERRUPTIBLE, 0, NULL) x 217 include/linux/wait.h #define wake_up_interruptible_sync(x) __wake_up_sync((x), TASK_INTERRUPTIBLE, 1) x 224 include/linux/wait.h #define wake_up_poll(x, m) \ x 225 include/linux/wait.h __wake_up(x, TASK_NORMAL, 1, poll_to_key(m)) x 226 include/linux/wait.h #define wake_up_locked_poll(x, m) \ x 227 include/linux/wait.h __wake_up_locked_key((x), TASK_NORMAL, poll_to_key(m)) x 228 include/linux/wait.h #define wake_up_interruptible_poll(x, m) \ x 229 include/linux/wait.h __wake_up(x, TASK_INTERRUPTIBLE, 1, poll_to_key(m)) x 230 include/linux/wait.h #define wake_up_interruptible_sync_poll(x, m) \ x 231 include/linux/wait.h __wake_up_sync_key((x), TASK_INTERRUPTIBLE, 1, poll_to_key(m)) x 166 include/linux/wm97xx.h int x; x 1109 include/linux/xarray.h #define XA_BUG_ON(xa, x) do { \ x 1110 include/linux/xarray.h if (x) { \ x 1115 include/linux/xarray.h #define XA_NODE_BUG_ON(node, x) do { \ x 1116 include/linux/xarray.h if (x) { \ x 1122 include/linux/xarray.h #define XA_BUG_ON(xa, x) do { } while (0) x 1123 include/linux/xarray.h #define XA_NODE_BUG_ON(node, x) do { } while (0) x 843 include/math-emu/op-common.h #define __FP_CLZ(r, x) \ x 845 include/math-emu/op-common.h _FP_W_TYPE _t = (x); \ x 858 include/math-emu/op-common.h #define __FP_CLZ(r, x) \ x 860 include/math-emu/op-common.h _FP_W_TYPE _t = (x); \ x 181 include/math-emu/soft-fp.h #define _FP_CLS_COMBINE(x,y) (((x) << 2) | (y)) x 47 include/media/drv-intf/exynos-fimc.h #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2) x 48 include/media/drv-intf/exynos-fimc.h #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4) x 54 include/media/drv-intf/saa7146.h #define SAA7146_ISR_CLEAR(x,y) \ x 55 include/media/drv-intf/saa7146.h saa7146_write(x, ISR, (y)); x 456 include/media/drv-intf/saa7146.h static inline void SAA7146_IER_DISABLE(struct saa7146_dev *x, unsigned y) x 459 include/media/drv-intf/saa7146.h spin_lock_irqsave(&x->int_slock, flags); x 460 include/media/drv-intf/saa7146.h saa7146_write(x, IER, saa7146_read(x, IER) & ~y); x 461 include/media/drv-intf/saa7146.h spin_unlock_irqrestore(&x->int_slock, flags); x 464 include/media/drv-intf/saa7146.h static inline void SAA7146_IER_ENABLE(struct saa7146_dev *x, unsigned y) x 467 include/media/drv-intf/saa7146.h spin_lock_irqsave(&x->int_slock, flags); x 468 include/media/drv-intf/saa7146.h saa7146_write(x, IER, saa7146_read(x, IER) | y); x 469 include/media/drv-intf/saa7146.h spin_unlock_irqrestore(&x->int_slock, flags); x 14 include/media/drv-intf/saa7146_vv.h #define WRITE_RPS0(x) do { \ x 15 include/media/drv-intf/saa7146_vv.h dev->d_rps0.cpu_addr[ count++ ] = cpu_to_le32(x); \ x 18 include/media/drv-intf/saa7146_vv.h #define WRITE_RPS1(x) do { \ x 19 include/media/drv-intf/saa7146_vv.h dev->d_rps1.cpu_addr[ count++ ] = cpu_to_le32(x); \ x 259 include/media/drv-intf/saa7146_vv.h #define IS_PLANAR(x) (x & 0xf000) x 75 include/media/rc-map.h #define RC_SCANCODE_UNKNOWN(x) (x) x 76 include/media/rc-map.h #define RC_SCANCODE_OTHER(x) (x) x 316 include/media/soc_camera.h #define SOCAM_DATAWIDTH(x) BIT((x) - 1) x 244 include/media/tpg/v4l2-tpg.h u8 *basep[TPG_MAX_PLANES][2], int y, int x, char *text); x 437 include/media/tpg/v4l2-tpg.h unsigned plane, unsigned x) x 439 include/media/tpg/v4l2-tpg.h return ((x / tpg->hdownsampling[plane]) & tpg->hmask[plane]) * x 443 include/media/tpg/v4l2-tpg.h static inline unsigned tpg_hscale(const struct tpg_data *tpg, unsigned x) x 445 include/media/tpg/v4l2-tpg.h return (x * tpg->scaled_width) / tpg->src_width; x 449 include/media/tpg/v4l2-tpg.h unsigned plane, unsigned x) x 451 include/media/tpg/v4l2-tpg.h return tpg_hdiv(tpg, plane, tpg_hscale(tpg, x)); x 12 include/net/bond_options.h #define BOND_MODE_ALL_EX(x) (~(x)) x 226 include/net/cfg80211.h #define IEEE80211_PRIVACY(x) \ x 227 include/net/cfg80211.h ((x) ? IEEE80211_PRIVACY_ON : IEEE80211_PRIVACY_OFF) x 27 include/net/esp.h int esp_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp); x 28 include/net/esp.h int esp_output_tail(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp); x 30 include/net/esp.h int esp6_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp); x 31 include/net/esp.h int esp6_output_tail(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp); x 32 include/net/ip6_fib.h #define RT6_TRACE(x...) pr_debug(x) x 34 include/net/ip6_fib.h #define RT6_TRACE(x...) do { ; } while (0) x 20 include/net/ipcomp.h int ipcomp_input(struct xfrm_state *x, struct sk_buff *skb); x 21 include/net/ipcomp.h int ipcomp_output(struct xfrm_state *x, struct sk_buff *skb); x 22 include/net/ipcomp.h void ipcomp_destroy(struct xfrm_state *x); x 23 include/net/ipcomp.h int ipcomp_init_state(struct xfrm_state *x); x 651 include/net/ipv6.h unsigned long x = ul[0] ^ ul[1]; x 653 include/net/ipv6.h return (u32)(x ^ (x >> 32)); x 24 include/net/netfilter/nf_queue.h #define nf_queue_entry_reroute(x) ((void *)x + sizeof(struct nf_queue_entry)) x 223 include/net/nfc/hci.h #define NFC_HCI_TYPE_A_SEL_PROT(x) (((x) & 0x60) >> 5) x 52 include/net/pkt_sched.h #define PSCHED_TICKS2NS(x) ((s64)(x) << PSCHED_SHIFT) x 53 include/net/pkt_sched.h #define PSCHED_NS2TICKS(x) ((x) >> PSCHED_SHIFT) x 324 include/net/sctp/sctp.h #define SCTP_SAT_LEN(x) (sizeof(struct sctp_paramhdr) + (x) * sizeof(__u16)) x 262 include/net/xfrm.h static inline struct net *xs_net(struct xfrm_state *x) x 264 include/net/xfrm.h return read_pnet(&x->xs_net); x 297 include/net/xfrm.h void (*advance)(struct xfrm_state *x, __be32 net_seq); x 298 include/net/xfrm.h int (*check)(struct xfrm_state *x, x 301 include/net/xfrm.h int (*recheck)(struct xfrm_state *x, x 304 include/net/xfrm.h void (*notify)(struct xfrm_state *x, int event); x 305 include/net/xfrm.h int (*overflow)(struct xfrm_state *x, struct sk_buff *skb); x 340 include/net/xfrm.h void km_state_notify(struct xfrm_state *x, const struct km_event *c); x 343 include/net/xfrm.h int km_query(struct xfrm_state *x, struct xfrm_tmpl *t, x 345 include/net/xfrm.h void km_state_expired(struct xfrm_state *x, int hard, u32 portid); x 346 include/net/xfrm.h int __xfrm_state_delete(struct xfrm_state *x); x 364 include/net/xfrm.h int (*extract_input)(struct xfrm_state *x, x 366 include/net/xfrm.h int (*extract_output)(struct xfrm_state *x, x 388 include/net/xfrm.h void xfrm_state_delete_tunnel(struct xfrm_state *x); x 400 include/net/xfrm.h int (*init_state)(struct xfrm_state *x); x 417 include/net/xfrm.h int (*input_tail)(struct xfrm_state *x, struct sk_buff *skb); x 436 include/net/xfrm.h static inline const struct xfrm_mode *xfrm_ip2inner_mode(struct xfrm_state *x, int ipproto) x 438 include/net/xfrm.h if ((ipproto == IPPROTO_IPIP && x->props.family == AF_INET) || x 439 include/net/xfrm.h (ipproto == IPPROTO_IPV6 && x->props.family == AF_INET6)) x 440 include/net/xfrm.h return &x->inner_mode; x 442 include/net/xfrm.h return &x->inner_mode_iaf; x 571 include/net/xfrm.h int (*notify)(struct xfrm_state *x, const struct km_event *c); x 572 include/net/xfrm.h int (*acquire)(struct xfrm_state *x, struct xfrm_tmpl *, struct xfrm_policy *xp); x 574 include/net/xfrm.h int (*new_mapping)(struct xfrm_state *x, xfrm_address_t *ipaddr, __be16 sport); x 575 include/net/xfrm.h int (*notify_policy)(struct xfrm_policy *x, int dir, const struct km_event *c); x 703 include/net/xfrm.h void xfrm_audit_state_add(struct xfrm_state *x, int result, bool task_valid); x 704 include/net/xfrm.h void xfrm_audit_state_delete(struct xfrm_state *x, int result, bool task_valid); x 705 include/net/xfrm.h void xfrm_audit_state_replay_overflow(struct xfrm_state *x, x 707 include/net/xfrm.h void xfrm_audit_state_replay(struct xfrm_state *x, struct sk_buff *skb, x 712 include/net/xfrm.h void xfrm_audit_state_icvfail(struct xfrm_state *x, struct sk_buff *skb, x 726 include/net/xfrm.h static inline void xfrm_audit_state_add(struct xfrm_state *x, int result, x 731 include/net/xfrm.h static inline void xfrm_audit_state_delete(struct xfrm_state *x, int result, x 736 include/net/xfrm.h static inline void xfrm_audit_state_replay_overflow(struct xfrm_state *x, x 741 include/net/xfrm.h static inline void xfrm_audit_state_replay(struct xfrm_state *x, x 756 include/net/xfrm.h static inline void xfrm_audit_state_icvfail(struct xfrm_state *x, x 785 include/net/xfrm.h static inline void __xfrm_state_put(struct xfrm_state *x) x 787 include/net/xfrm.h refcount_dec(&x->refcnt); x 790 include/net/xfrm.h static inline void xfrm_state_put(struct xfrm_state *x) x 792 include/net/xfrm.h if (refcount_dec_and_test(&x->refcnt)) x 793 include/net/xfrm.h __xfrm_state_destroy(x, false); x 796 include/net/xfrm.h static inline void xfrm_state_put_sync(struct xfrm_state *x) x 798 include/net/xfrm.h if (refcount_dec_and_test(&x->refcnt)) x 799 include/net/xfrm.h __xfrm_state_destroy(x, true); x 802 include/net/xfrm.h static inline void xfrm_state_hold(struct xfrm_state *x) x 804 include/net/xfrm.h refcount_inc(&x->refcnt); x 1060 include/net/xfrm.h __xfrm4_state_addr_cmp(const struct xfrm_tmpl *tmpl, const struct xfrm_state *x) x 1063 include/net/xfrm.h tmpl->saddr.a4 != x->props.saddr.a4); x 1067 include/net/xfrm.h __xfrm6_state_addr_cmp(const struct xfrm_tmpl *tmpl, const struct xfrm_state *x) x 1070 include/net/xfrm.h !ipv6_addr_equal((struct in6_addr *)&tmpl->saddr, (struct in6_addr*)&x->props.saddr)); x 1074 include/net/xfrm.h xfrm_state_addr_cmp(const struct xfrm_tmpl *tmpl, const struct xfrm_state *x, unsigned short family) x 1078 include/net/xfrm.h return __xfrm4_state_addr_cmp(tmpl, x); x 1080 include/net/xfrm.h return __xfrm6_state_addr_cmp(tmpl, x); x 1275 include/net/xfrm.h __xfrm4_state_addr_check(const struct xfrm_state *x, x 1278 include/net/xfrm.h if (daddr->a4 == x->id.daddr.a4 && x 1279 include/net/xfrm.h (saddr->a4 == x->props.saddr.a4 || !saddr->a4 || !x->props.saddr.a4)) x 1285 include/net/xfrm.h __xfrm6_state_addr_check(const struct xfrm_state *x, x 1288 include/net/xfrm.h if (ipv6_addr_equal((struct in6_addr *)daddr, (struct in6_addr *)&x->id.daddr) && x 1289 include/net/xfrm.h (ipv6_addr_equal((struct in6_addr *)saddr, (struct in6_addr *)&x->props.saddr) || x 1291 include/net/xfrm.h ipv6_addr_any((struct in6_addr *)&x->props.saddr))) x 1297 include/net/xfrm.h xfrm_state_addr_check(const struct xfrm_state *x, x 1303 include/net/xfrm.h return __xfrm4_state_addr_check(x, daddr, saddr); x 1305 include/net/xfrm.h return __xfrm6_state_addr_check(x, daddr, saddr); x 1311 include/net/xfrm.h xfrm_state_addr_flow_check(const struct xfrm_state *x, const struct flowi *fl, x 1316 include/net/xfrm.h return __xfrm4_state_addr_check(x, x 1320 include/net/xfrm.h return __xfrm6_state_addr_check(x, x 1327 include/net/xfrm.h static inline int xfrm_state_kern(const struct xfrm_state *x) x 1329 include/net/xfrm.h return atomic_read(&x->tunnel_users); x 1477 include/net/xfrm.h void xfrm_state_free(struct xfrm_state *x); x 1491 include/net/xfrm.h int xfrm_state_check_expire(struct xfrm_state *x); x 1492 include/net/xfrm.h void xfrm_state_insert(struct xfrm_state *x); x 1493 include/net/xfrm.h int xfrm_state_add(struct xfrm_state *x); x 1494 include/net/xfrm.h int xfrm_state_update(struct xfrm_state *x); x 1538 include/net/xfrm.h int xfrm_state_delete(struct xfrm_state *x); x 1543 include/net/xfrm.h u32 xfrm_replay_seqhi(struct xfrm_state *x, __be32 net_seq); x 1544 include/net/xfrm.h int xfrm_init_replay(struct xfrm_state *x); x 1545 include/net/xfrm.h u32 xfrm_state_mtu(struct xfrm_state *x, int mtu); x 1546 include/net/xfrm.h int __xfrm_init_state(struct xfrm_state *x, bool init_replay, bool offload); x 1547 include/net/xfrm.h int xfrm_init_state(struct xfrm_state *x); x 1557 include/net/xfrm.h int pktgen_xfrm_outer_mode_output(struct xfrm_state *x, struct sk_buff *skb); x 1562 include/net/xfrm.h int xfrm4_extract_input(struct xfrm_state *x, struct sk_buff *skb); x 1577 include/net/xfrm.h int xfrm4_extract_output(struct xfrm_state *x, struct sk_buff *skb); x 1586 include/net/xfrm.h int xfrm6_extract_input(struct xfrm_state *x, struct sk_buff *skb); x 1601 include/net/xfrm.h int xfrm6_extract_output(struct xfrm_state *x, struct sk_buff *skb); x 1604 include/net/xfrm.h int xfrm6_find_1stfragopt(struct xfrm_state *x, struct sk_buff *skb, x 1649 include/net/xfrm.h int xfrm_alloc_spi(struct xfrm_state *x, u32 minspi, u32 maxspi); x 1663 include/net/xfrm.h struct xfrm_state *xfrm_state_migrate(struct xfrm_state *x, x 1672 include/net/xfrm.h int km_new_mapping(struct xfrm_state *x, xfrm_address_t *ipaddr, __be16 sport); x 1769 include/net/xfrm.h static inline int xfrm_replay_clone(struct xfrm_state *x, x 1772 include/net/xfrm.h x->replay_esn = kzalloc(xfrm_replay_state_esn_len(orig->replay_esn), x 1774 include/net/xfrm.h if (!x->replay_esn) x 1777 include/net/xfrm.h x->replay_esn->bmp_len = orig->replay_esn->bmp_len; x 1778 include/net/xfrm.h x->replay_esn->replay_window = orig->replay_esn->replay_window; x 1780 include/net/xfrm.h x->preplay_esn = kmemdup(x->replay_esn, x 1781 include/net/xfrm.h xfrm_replay_state_esn_len(x->replay_esn), x 1783 include/net/xfrm.h if (!x->preplay_esn) { x 1784 include/net/xfrm.h kfree(x->replay_esn); x 1851 include/net/xfrm.h int xfrm_dev_state_add(struct net *net, struct xfrm_state *x, x 1853 include/net/xfrm.h bool xfrm_dev_offload_ok(struct sk_buff *skb, struct xfrm_state *x); x 1855 include/net/xfrm.h static inline void xfrm_dev_state_advance_esn(struct xfrm_state *x) x 1857 include/net/xfrm.h struct xfrm_state_offload *xso = &x->xso; x 1860 include/net/xfrm.h xso->dev->xfrmdev_ops->xdo_dev_state_advance_esn(x); x 1865 include/net/xfrm.h struct xfrm_state *x = dst->xfrm; x 1868 include/net/xfrm.h if (!x || !x->type_offload) x 1872 include/net/xfrm.h if (!x->xso.offload_handle && !xdst->child->xfrm) x 1874 include/net/xfrm.h if (x->xso.offload_handle && (x->xso.dev == xfrm_dst_path(dst)->dev) && x 1881 include/net/xfrm.h static inline void xfrm_dev_state_delete(struct xfrm_state *x) x 1883 include/net/xfrm.h struct xfrm_state_offload *xso = &x->xso; x 1886 include/net/xfrm.h xso->dev->xfrmdev_ops->xdo_dev_state_delete(x); x 1889 include/net/xfrm.h static inline void xfrm_dev_state_free(struct xfrm_state *x) x 1891 include/net/xfrm.h struct xfrm_state_offload *xso = &x->xso; x 1896 include/net/xfrm.h dev->xfrmdev_ops->xdo_dev_state_free(x); x 1915 include/net/xfrm.h static inline int xfrm_dev_state_add(struct net *net, struct xfrm_state *x, struct xfrm_user_offload *xuo) x 1920 include/net/xfrm.h static inline void xfrm_dev_state_delete(struct xfrm_state *x) x 1924 include/net/xfrm.h static inline void xfrm_dev_state_free(struct xfrm_state *x) x 1928 include/net/xfrm.h static inline bool xfrm_dev_offload_ok(struct sk_buff *skb, struct xfrm_state *x) x 1933 include/net/xfrm.h static inline void xfrm_dev_state_advance_esn(struct xfrm_state *x) x 1962 include/net/xfrm.h static inline __u32 xfrm_smark_get(__u32 mark, struct xfrm_state *x) x 1964 include/net/xfrm.h struct xfrm_mark *m = &x->props.smark; x 1978 include/net/xfrm.h static inline int xfrm_tunnel_check(struct sk_buff *skb, struct xfrm_state *x, x 1993 include/net/xfrm.h if (tunnel && !(x->outer_mode.flags & XFRM_MODE_FLAG_TUNNEL)) x 54 include/rdma/opa_addr.h #define OPA_MAKE_ID(x) (cpu_to_be64(OPA_SPECIAL_OUI << 40 | (x))) x 55 include/rdma/opa_addr.h #define OPA_TO_IB_UCAST_LID(x) (((x) >= be16_to_cpu(IB_MULTICAST_LID_BASE)) \ x 56 include/rdma/opa_addr.h ? 0 : x) x 74 include/rdma/rdmavt_cq.h #define RDMA_WRITE_UAPI_ATOMIC(member, x) smp_store_release(&(member).val, x) x 97 include/rdma/tid_rdma_defs.h #define TID_OP(x) IB_OPCODE_TID_RDMA_##x x 42 include/rdma/uverbs_named_ioctl.h #define _UVERBS_PASTE(x, y) x ## y x 43 include/rdma/uverbs_named_ioctl.h #define _UVERBS_NAME(x, y) _UVERBS_PASTE(x, y) x 49 include/scsi/fc/fc_encaps.h #define FC_XY(x, y) ((((x) & 0xff) << 8) | ((y) & 0xff)) x 50 include/scsi/fc/fc_encaps.h #define FC_XYXY(x, y) ((FCIP_XY(x, y) << 16) | FCIP_XY(x, y)) x 51 include/scsi/fc/fc_encaps.h #define FC_XYNN(x, y) (FCIP_XYXY(x, y) ^ 0xffff) x 23 include/scsi/fc_frame.h #define ntohll(x) be64_to_cpu(x) x 24 include/scsi/fc_frame.h #define htonll(x) cpu_to_be64(x) x 105 include/scsi/fcoe_sysfs.h #define fcoe_fcf_dev_to_ctlr_dev(x) \ x 106 include/scsi/fcoe_sysfs.h dev_to_ctlr((x)->dev.parent) x 107 include/scsi/fcoe_sysfs.h #define fcoe_fcf_device_priv(x) \ x 108 include/scsi/fcoe_sysfs.h ((x)->priv) x 169 include/scsi/libfcoe.h #define fcoe_ctlr_to_ctlr_dev(x) \ x 170 include/scsi/libfcoe.h (x)->cdev x 219 include/scsi/libfcoe.h #define fcoe_fcf_to_fcf_dev(x) \ x 220 include/scsi/libfcoe.h ((x)->fcf_dev) x 387 include/scsi/scsi_transport_fc.h #define fc_starget_node_name(x) \ x 388 include/scsi/scsi_transport_fc.h (((struct fc_starget_attrs *)&(x)->starget_data)->node_name) x 389 include/scsi/scsi_transport_fc.h #define fc_starget_port_name(x) \ x 390 include/scsi/scsi_transport_fc.h (((struct fc_starget_attrs *)&(x)->starget_data)->port_name) x 391 include/scsi/scsi_transport_fc.h #define fc_starget_port_id(x) \ x 392 include/scsi/scsi_transport_fc.h (((struct fc_starget_attrs *)&(x)->starget_data)->port_id) x 541 include/scsi/scsi_transport_fc.h #define shost_to_fc_host(x) \ x 542 include/scsi/scsi_transport_fc.h ((struct fc_host_attrs *)(x)->shost_data) x 544 include/scsi/scsi_transport_fc.h #define fc_host_node_name(x) \ x 545 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->node_name) x 546 include/scsi/scsi_transport_fc.h #define fc_host_port_name(x) \ x 547 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->port_name) x 548 include/scsi/scsi_transport_fc.h #define fc_host_permanent_port_name(x) \ x 549 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->permanent_port_name) x 550 include/scsi/scsi_transport_fc.h #define fc_host_supported_classes(x) \ x 551 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->supported_classes) x 552 include/scsi/scsi_transport_fc.h #define fc_host_supported_fc4s(x) \ x 553 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->supported_fc4s) x 554 include/scsi/scsi_transport_fc.h #define fc_host_supported_speeds(x) \ x 555 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->supported_speeds) x 556 include/scsi/scsi_transport_fc.h #define fc_host_maxframe_size(x) \ x 557 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->maxframe_size) x 558 include/scsi/scsi_transport_fc.h #define fc_host_max_npiv_vports(x) \ x 559 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->max_npiv_vports) x 560 include/scsi/scsi_transport_fc.h #define fc_host_serial_number(x) \ x 561 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->serial_number) x 562 include/scsi/scsi_transport_fc.h #define fc_host_manufacturer(x) \ x 563 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->manufacturer) x 564 include/scsi/scsi_transport_fc.h #define fc_host_model(x) \ x 565 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->model) x 566 include/scsi/scsi_transport_fc.h #define fc_host_model_description(x) \ x 567 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->model_description) x 568 include/scsi/scsi_transport_fc.h #define fc_host_hardware_version(x) \ x 569 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->hardware_version) x 570 include/scsi/scsi_transport_fc.h #define fc_host_driver_version(x) \ x 571 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->driver_version) x 572 include/scsi/scsi_transport_fc.h #define fc_host_firmware_version(x) \ x 573 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->firmware_version) x 574 include/scsi/scsi_transport_fc.h #define fc_host_optionrom_version(x) \ x 575 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->optionrom_version) x 576 include/scsi/scsi_transport_fc.h #define fc_host_port_id(x) \ x 577 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->port_id) x 578 include/scsi/scsi_transport_fc.h #define fc_host_port_type(x) \ x 579 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->port_type) x 580 include/scsi/scsi_transport_fc.h #define fc_host_port_state(x) \ x 581 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->port_state) x 582 include/scsi/scsi_transport_fc.h #define fc_host_active_fc4s(x) \ x 583 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->active_fc4s) x 584 include/scsi/scsi_transport_fc.h #define fc_host_speed(x) \ x 585 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->speed) x 586 include/scsi/scsi_transport_fc.h #define fc_host_fabric_name(x) \ x 587 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->fabric_name) x 588 include/scsi/scsi_transport_fc.h #define fc_host_symbolic_name(x) \ x 589 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->symbolic_name) x 590 include/scsi/scsi_transport_fc.h #define fc_host_system_hostname(x) \ x 591 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->system_hostname) x 592 include/scsi/scsi_transport_fc.h #define fc_host_tgtid_bind_type(x) \ x 593 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->tgtid_bind_type) x 594 include/scsi/scsi_transport_fc.h #define fc_host_rports(x) \ x 595 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->rports) x 596 include/scsi/scsi_transport_fc.h #define fc_host_rport_bindings(x) \ x 597 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->rport_bindings) x 598 include/scsi/scsi_transport_fc.h #define fc_host_vports(x) \ x 599 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->vports) x 600 include/scsi/scsi_transport_fc.h #define fc_host_next_rport_number(x) \ x 601 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->next_rport_number) x 602 include/scsi/scsi_transport_fc.h #define fc_host_next_target_id(x) \ x 603 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->next_target_id) x 604 include/scsi/scsi_transport_fc.h #define fc_host_next_vport_number(x) \ x 605 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->next_vport_number) x 606 include/scsi/scsi_transport_fc.h #define fc_host_npiv_vports_inuse(x) \ x 607 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->npiv_vports_inuse) x 608 include/scsi/scsi_transport_fc.h #define fc_host_work_q_name(x) \ x 609 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->work_q_name) x 610 include/scsi/scsi_transport_fc.h #define fc_host_work_q(x) \ x 611 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->work_q) x 612 include/scsi/scsi_transport_fc.h #define fc_host_devloss_work_q_name(x) \ x 613 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->devloss_work_q_name) x 614 include/scsi/scsi_transport_fc.h #define fc_host_devloss_work_q(x) \ x 615 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->devloss_work_q) x 616 include/scsi/scsi_transport_fc.h #define fc_host_dev_loss_tmo(x) \ x 617 include/scsi/scsi_transport_fc.h (((struct fc_host_attrs *)(x)->shost_data)->dev_loss_tmo) x 62 include/scsi/scsi_transport_spi.h #define spi_period(x) (((struct spi_transport_attrs *)&(x)->starget_data)->period) x 63 include/scsi/scsi_transport_spi.h #define spi_min_period(x) (((struct spi_transport_attrs *)&(x)->starget_data)->min_period) x 64 include/scsi/scsi_transport_spi.h #define spi_offset(x) (((struct spi_transport_attrs *)&(x)->starget_data)->offset) x 65 include/scsi/scsi_transport_spi.h #define spi_max_offset(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_offset) x 66 include/scsi/scsi_transport_spi.h #define spi_width(x) (((struct spi_transport_attrs *)&(x)->starget_data)->width) x 67 include/scsi/scsi_transport_spi.h #define spi_max_width(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_width) x 68 include/scsi/scsi_transport_spi.h #define spi_iu(x) (((struct spi_transport_attrs *)&(x)->starget_data)->iu) x 69 include/scsi/scsi_transport_spi.h #define spi_max_iu(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_iu) x 70 include/scsi/scsi_transport_spi.h #define spi_dt(x) (((struct spi_transport_attrs *)&(x)->starget_data)->dt) x 71 include/scsi/scsi_transport_spi.h #define spi_qas(x) (((struct spi_transport_attrs *)&(x)->starget_data)->qas) x 72 include/scsi/scsi_transport_spi.h #define spi_max_qas(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_qas) x 73 include/scsi/scsi_transport_spi.h #define spi_wr_flow(x) (((struct spi_transport_attrs *)&(x)->starget_data)->wr_flow) x 74 include/scsi/scsi_transport_spi.h #define spi_rd_strm(x) (((struct spi_transport_attrs *)&(x)->starget_data)->rd_strm) x 75 include/scsi/scsi_transport_spi.h #define spi_rti(x) (((struct spi_transport_attrs *)&(x)->starget_data)->rti) x 76 include/scsi/scsi_transport_spi.h #define spi_pcomp_en(x) (((struct spi_transport_attrs *)&(x)->starget_data)->pcomp_en) x 77 include/scsi/scsi_transport_spi.h #define spi_hold_mcs(x) (((struct spi_transport_attrs *)&(x)->starget_data)->hold_mcs) x 78 include/scsi/scsi_transport_spi.h #define spi_initial_dv(x) (((struct spi_transport_attrs *)&(x)->starget_data)->initial_dv) x 79 include/scsi/scsi_transport_spi.h #define spi_dv_pending(x) (((struct spi_transport_attrs *)&(x)->starget_data)->dv_pending) x 81 include/scsi/scsi_transport_spi.h #define spi_support_sync(x) (((struct spi_transport_attrs *)&(x)->starget_data)->support_sync) x 82 include/scsi/scsi_transport_spi.h #define spi_support_wide(x) (((struct spi_transport_attrs *)&(x)->starget_data)->support_wide) x 83 include/scsi/scsi_transport_spi.h #define spi_support_dt(x) (((struct spi_transport_attrs *)&(x)->starget_data)->support_dt) x 84 include/scsi/scsi_transport_spi.h #define spi_support_dt_only(x) (((struct spi_transport_attrs *)&(x)->starget_data)->support_dt_only) x 85 include/scsi/scsi_transport_spi.h #define spi_support_ius(x) (((struct spi_transport_attrs *)&(x)->starget_data)->support_ius) x 86 include/scsi/scsi_transport_spi.h #define spi_support_qas(x) (((struct spi_transport_attrs *)&(x)->starget_data)->support_qas) x 88 include/scsi/scsi_transport_spi.h #define spi_flags(x) (((struct spi_transport_attrs *)&(x)->starget_data)->flags) x 32 include/soc/at91/atmel-sfr.h #define AT91_SFR_OHCIICR_RES(x) BIT(x) x 35 include/soc/at91/atmel-sfr.h #define AT91_SFR_OHCIICR_USB_SUSP(x) BIT(8 + (x)) x 39 include/soc/at91/atmel-sfr.h #define AT91_SFR_OHCIISR_RIS(x) BIT(x) x 43 include/soc/at91/atmel-sfr.h #define AT91_SFR_UTMISWAP_PORT(x) BIT(x) x 45 include/soc/at91/atmel-sfr.h #define AT91_SFR_LS_VALUE(x) BIT(x) x 25 include/soc/fsl/qe/qe_tdm.h #define SIR_CNT(x) ((x) << 2) x 26 include/soc/fsl/qe/qe_tdm.h #define SIR_CSEL(x) ((x) << 5) x 33 include/soc/fsl/qe/qe_tdm.h #define SIMR_SAD(x) ((x) << 12) x 90 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_SELBGV820(x) (((x) << 23) & GENMASK(26, 23)) x 92 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_SELBGV820_X(x) (((x) & GENMASK(26, 23)) >> 23) x 93 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_LOOP_BW_RES(x) (((x) << 18) & GENMASK(22, 18)) x 95 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_LOOP_BW_RES_X(x) (((x) & GENMASK(22, 18)) >> 18) x 96 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_SELCPI(x) (((x) << 16) & GENMASK(17, 16)) x 98 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_SELCPI_X(x) (((x) & GENMASK(17, 16)) >> 16) x 103 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_CPU_CLK_DIV(x) (((x) << 6) & GENMASK(11, 6)) x 105 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_CPU_CLK_DIV_X(x) (((x) & GENMASK(11, 6)) >> 6) x 106 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG0_CORE_CLK_DIV(x) ((x) & GENMASK(5, 0)) x 114 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG1_RC_CTRL_DATA(x) (((x) << 6) & GENMASK(13, 6)) x 116 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG1_RC_CTRL_DATA_X(x) (((x) & GENMASK(13, 6)) >> 6) x 131 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG2_AMPC_SEL(x) (((x) << 16) & GENMASK(23, 16)) x 133 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG2_AMPC_SEL_X(x) (((x) & GENMASK(23, 16)) >> 16) x 140 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG2_GAIN_TEST(x) (((x) << 5) & GENMASK(9, 5)) x 142 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG2_GAIN_TEST_X(x) (((x) & GENMASK(9, 5)) >> 5) x 149 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG3_TEST_ANA_OUT_SEL(x) (((x) << 22) & GENMASK(23, 22)) x 151 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG3_TEST_ANA_OUT_SEL_X(x) (((x) & GENMASK(23, 22)) >> 22) x 152 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG3_TESTOUT_SEL(x) (((x) << 19) & GENMASK(21, 19)) x 154 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG3_TESTOUT_SEL_X(x) (((x) & GENMASK(21, 19)) >> 19) x 166 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG3_FBDIVSEL(x) ((x) & GENMASK(7, 0)) x 169 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG4_IB_BIAS_CTRL(x) (((x) << 16) & GENMASK(23, 16)) x 171 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG4_IB_BIAS_CTRL_X(x) (((x) & GENMASK(23, 16)) >> 16) x 172 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG4_IB_CTRL(x) ((x) & GENMASK(15, 0)) x 175 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG5_OB_BIAS_CTRL(x) (((x) << 16) & GENMASK(23, 16)) x 177 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG5_OB_BIAS_CTRL_X(x) (((x) & GENMASK(23, 16)) >> 16) x 178 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG5_OB_CTRL(x) ((x) & GENMASK(15, 0)) x 182 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG6_REFCLK_SEL(x) (((x) << 20) & GENMASK(22, 20)) x 184 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG6_REFCLK_SEL_X(x) (((x) & GENMASK(22, 20)) >> 20) x 186 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG6_POR_DEL_SEL(x) (((x) << 16) & GENMASK(17, 16)) x 188 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG6_POR_DEL_SEL_X(x) (((x) & GENMASK(17, 16)) >> 16) x 189 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG6_DIV125REF_SEL(x) (((x) << 8) & GENMASK(15, 8)) x 191 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG6_DIV125REF_SEL_X(x) (((x) & GENMASK(15, 8)) >> 8) x 194 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_CFG6_DDR_CLK_DIV(x) ((x) & GENMASK(5, 0)) x 201 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS0_READBACK_DATA(x) (((x) << 1) & GENMASK(8, 1)) x 203 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS0_READBACK_DATA_X(x) (((x) & GENMASK(8, 1)) >> 1) x 206 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_SIG_DEL(x) (((x) << 21) & GENMASK(28, 21)) x 208 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_SIG_DEL_X(x) (((x) & GENMASK(28, 21)) >> 21) x 209 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_GAIN_STAT(x) (((x) << 16) & GENMASK(20, 16)) x 211 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_GAIN_STAT_X(x) (((x) & GENMASK(20, 16)) >> 16) x 212 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_FBCNT_DIF(x) (((x) << 4) & GENMASK(13, 4)) x 214 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_FBCNT_DIF_X(x) (((x) & GENMASK(13, 4)) >> 4) x 215 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_FSM_STAT(x) (((x) << 1) & GENMASK(3, 1)) x 217 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_STATUS1_FSM_STAT_X(x) (((x) & GENMASK(3, 1)) >> 1) x 222 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_CFG0_PLLB_LOCK_REPEAT(x) (((x) << 20) & GENMASK(23, 20)) x 224 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_CFG0_PLLB_LOCK_REPEAT_X(x) (((x) & GENMASK(23, 20)) >> 20) x 225 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_CFG0_PLLB_LOCK_UNCERT(x) (((x) << 16) & GENMASK(19, 16)) x 227 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_CFG0_PLLB_LOCK_UNCERT_X(x) (((x) & GENMASK(19, 16)) >> 16) x 228 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_CFG0_PLLB_DIV_FACTOR_PRE(x) ((x) & GENMASK(15, 0)) x 231 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_STAT0_PLLB_FSM_STAT(x) (((x) << 4) & GENMASK(7, 4)) x 233 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_STAT0_PLLB_FSM_STAT_X(x) (((x) & GENMASK(7, 4)) >> 4) x 238 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_STAT1_PLLB_CNT_OUT(x) (((x) << 16) & GENMASK(31, 16)) x 240 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_STAT1_PLLB_CNT_OUT_X(x) (((x) & GENMASK(31, 16)) >> 16) x 241 include/soc/mscc/ocelot_hsio.h #define HSIO_PLL5G_BIST_STAT1_PLLB_CNT_REF_DIFF(x) ((x) & GENMASK(15, 0)) x 246 include/soc/mscc/ocelot_hsio.h #define HSIO_RCOMP_CFG0_SPEED_SEL(x) (((x) << 10) & GENMASK(11, 10)) x 248 include/soc/mscc/ocelot_hsio.h #define HSIO_RCOMP_CFG0_SPEED_SEL_X(x) (((x) & GENMASK(11, 10)) >> 10) x 249 include/soc/mscc/ocelot_hsio.h #define HSIO_RCOMP_CFG0_MODE_SEL(x) (((x) << 8) & GENMASK(9, 8)) x 251 include/soc/mscc/ocelot_hsio.h #define HSIO_RCOMP_CFG0_MODE_SEL_X(x) (((x) & GENMASK(9, 8)) >> 8) x 253 include/soc/mscc/ocelot_hsio.h #define HSIO_RCOMP_CFG0_RCOMP_VAL(x) ((x) & GENMASK(3, 0)) x 258 include/soc/mscc/ocelot_hsio.h #define HSIO_RCOMP_STATUS_RCOMP(x) ((x) & GENMASK(3, 0)) x 263 include/soc/mscc/ocelot_hsio.h #define HSIO_SYNC_ETH_CFG_SEL_RECO_CLK_SRC(x) (((x) << 4) & GENMASK(7, 4)) x 265 include/soc/mscc/ocelot_hsio.h #define HSIO_SYNC_ETH_CFG_SEL_RECO_CLK_SRC_X(x) (((x) & GENMASK(7, 4)) >> 4) x 266 include/soc/mscc/ocelot_hsio.h #define HSIO_SYNC_ETH_CFG_SEL_RECO_CLK_DIV(x) (((x) << 1) & GENMASK(3, 1)) x 268 include/soc/mscc/ocelot_hsio.h #define HSIO_SYNC_ETH_CFG_SEL_RECO_CLK_DIV_X(x) (((x) & GENMASK(3, 1)) >> 1) x 273 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_PHS_CTRL(x) (((x) << 13) & GENMASK(16, 13)) x 275 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_PHS_CTRL_X(x) (((x) & GENMASK(16, 13)) >> 13) x 276 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_CPMD_SEL(x) (((x) << 11) & GENMASK(12, 11)) x 278 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_CPMD_SEL_X(x) (((x) & GENMASK(12, 11)) >> 11) x 279 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_MBTR_CTRL(x) (((x) << 8) & GENMASK(10, 8)) x 281 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_MBTR_CTRL_X(x) (((x) & GENMASK(10, 8)) >> 8) x 282 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_BW_ANA(x) (((x) << 5) & GENMASK(7, 5)) x 284 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_BW_ANA_X(x) (((x) & GENMASK(7, 5)) >> 5) x 286 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_BW_HYST(x) (((x) << 1) & GENMASK(3, 1)) x 288 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DES_CFG_DES_BW_HYST_X(x) (((x) & GENMASK(3, 1)) >> 1) x 292 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_ACJTAG_HYST(x) (((x) << 24) & GENMASK(26, 24)) x 294 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_ACJTAG_HYST_X(x) (((x) & GENMASK(26, 24)) >> 24) x 295 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_IB_DET_LEV(x) (((x) << 19) & GENMASK(21, 19)) x 297 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_IB_DET_LEV_X(x) (((x) & GENMASK(21, 19)) >> 19) x 304 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_IB_EQ_GAIN(x) (((x) << 6) & GENMASK(8, 6)) x 306 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_IB_EQ_GAIN_X(x) (((x) & GENMASK(8, 6)) >> 6) x 307 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_IB_SEL_CORNER_FREQ(x) (((x) << 4) & GENMASK(5, 4)) x 309 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_IB_SEL_CORNER_FREQ_X(x) (((x) & GENMASK(5, 4)) >> 4) x 310 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_IB_CFG_IB_RESISTOR_CTRL(x) ((x) & GENMASK(3, 0)) x 313 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_SLP(x) (((x) << 17) & GENMASK(18, 17)) x 315 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_SLP_X(x) (((x) & GENMASK(18, 17)) >> 17) x 316 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_AMP_CTRL(x) (((x) << 13) & GENMASK(16, 13)) x 318 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_AMP_CTRL_X(x) (((x) & GENMASK(16, 13)) >> 13) x 319 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_CMM_BIAS_CTRL(x) (((x) << 10) & GENMASK(12, 10)) x 321 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_CMM_BIAS_CTRL_X(x) (((x) & GENMASK(12, 10)) >> 10) x 324 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_VCM_CTRL(x) (((x) << 4) & GENMASK(7, 4)) x 326 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_VCM_CTRL_X(x) (((x) & GENMASK(7, 4)) >> 4) x 327 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_OB_CFG_OB_RESISTOR_CTRL(x) ((x) & GENMASK(3, 0)) x 334 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_SER_CFG_SER_ALISEL(x) (((x) << 4) & GENMASK(5, 4)) x 336 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_SER_CFG_SER_ALISEL_X(x) (((x) & GENMASK(5, 4)) >> 4) x 347 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_COMMON_CFG_LANE_CTRL(x) (((x) << 13) & GENMASK(15, 13)) x 349 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_COMMON_CFG_LANE_CTRL_X(x) (((x) & GENMASK(15, 13)) >> 13) x 360 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA(x) (((x) << 8) & GENMASK(15, 8)) x 362 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_PLL_CFG_PLL_FSM_CTRL_DATA_X(x) (((x) & GENMASK(15, 8)) >> 8) x 371 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_PLL_STATUS_PLL_RB_DATA(x) ((x) & GENMASK(7, 0)) x 376 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG0_PRBS_SEL(x) (((x) << 20) & GENMASK(21, 20)) x 378 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG0_PRBS_SEL_X(x) (((x) & GENMASK(21, 20)) >> 20) x 379 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG0_TEST_MODE(x) (((x) << 16) & GENMASK(18, 16)) x 381 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG0_TEST_MODE_X(x) (((x) & GENMASK(18, 16)) >> 16) x 387 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG1_TX_JITTER_AMPL(x) (((x) << 8) & GENMASK(17, 8)) x 389 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG1_TX_JITTER_AMPL_X(x) (((x) & GENMASK(17, 8)) >> 8) x 390 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG1_TX_STEP_FREQ(x) (((x) << 4) & GENMASK(7, 4)) x 392 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG1_TX_STEP_FREQ_X(x) (((x) & GENMASK(7, 4)) >> 4) x 398 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG2_RX_JITTER_AMPL(x) (((x) << 8) & GENMASK(17, 8)) x 400 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG2_RX_JITTER_AMPL_X(x) (((x) & GENMASK(17, 8)) >> 8) x 401 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG2_RX_STEP_FREQ(x) (((x) << 4) & GENMASK(7, 4)) x 403 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_DFT_CFG2_RX_STEP_FREQ_X(x) (((x) & GENMASK(7, 4)) >> 4) x 410 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_RC_PLL_BIST_CFG_PLL_BIST_FBS_HIGH(x) (((x) << 16) & GENMASK(17, 16)) x 412 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_RC_PLL_BIST_CFG_PLL_BIST_FBS_HIGH_X(x) (((x) & GENMASK(17, 16)) >> 16) x 413 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_RC_PLL_BIST_CFG_PLL_BIST_HIGH(x) (((x) << 8) & GENMASK(15, 8)) x 415 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_RC_PLL_BIST_CFG_PLL_BIST_HIGH_X(x) (((x) & GENMASK(15, 8)) >> 8) x 416 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_RC_PLL_BIST_CFG_PLL_BIST_LOW(x) ((x) & GENMASK(7, 0)) x 419 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_MISC_CFG_DES_100FX_KICK_MODE(x) (((x) << 11) & GENMASK(12, 11)) x 421 include/soc/mscc/ocelot_hsio.h #define HSIO_S1G_MISC_CFG_DES_100FX_KICK_MODE_X(x) (((x) & GENMASK(12, 11)) >> 11) x 443 include/soc/mscc/ocelot_hsio.h #define HSIO_MCB_S1G_ADDR_CFG_SERDES1G_ADDR(x) ((x) & GENMASK(8, 0)) x 446 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DIG_CFG_GP(x) (((x) << 16) & GENMASK(18, 16)) x 448 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DIG_CFG_GP_X(x) (((x) & GENMASK(18, 16)) >> 16) x 451 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DIG_CFG_SIGDET_AST(x) (((x) << 3) & GENMASK(5, 3)) x 453 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DIG_CFG_SIGDET_AST_X(x) (((x) & GENMASK(5, 3)) >> 3) x 454 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DIG_CFG_SIGDET_DST(x) ((x) & GENMASK(2, 0)) x 459 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG0_PRBS_SEL(x) (((x) << 20) & GENMASK(21, 20)) x 461 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG0_PRBS_SEL_X(x) (((x) & GENMASK(21, 20)) >> 20) x 462 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG0_TEST_MODE(x) (((x) << 16) & GENMASK(18, 16)) x 464 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG0_TEST_MODE_X(x) (((x) & GENMASK(18, 16)) >> 16) x 470 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG1_TX_JITTER_AMPL(x) (((x) << 8) & GENMASK(17, 8)) x 472 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG1_TX_JITTER_AMPL_X(x) (((x) & GENMASK(17, 8)) >> 8) x 473 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG1_TX_STEP_FREQ(x) (((x) << 4) & GENMASK(7, 4)) x 475 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG1_TX_STEP_FREQ_X(x) (((x) & GENMASK(7, 4)) >> 4) x 481 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG2_RX_JITTER_AMPL(x) (((x) << 8) & GENMASK(17, 8)) x 483 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG2_RX_JITTER_AMPL_X(x) (((x) & GENMASK(17, 8)) >> 8) x 484 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG2_RX_STEP_FREQ(x) (((x) << 4) & GENMASK(7, 4)) x 486 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DFT_CFG2_RX_STEP_FREQ_X(x) (((x) & GENMASK(7, 4)) >> 4) x 493 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_RC_PLL_BIST_CFG_PLL_BIST_FBS_HIGH(x) (((x) << 16) & GENMASK(19, 16)) x 495 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_RC_PLL_BIST_CFG_PLL_BIST_FBS_HIGH_X(x) (((x) & GENMASK(19, 16)) >> 16) x 496 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_RC_PLL_BIST_CFG_PLL_BIST_HIGH(x) (((x) << 8) & GENMASK(15, 8)) x 498 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_RC_PLL_BIST_CFG_PLL_BIST_HIGH_X(x) (((x) & GENMASK(15, 8)) >> 8) x 499 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_RC_PLL_BIST_CFG_PLL_BIST_LOW(x) ((x) & GENMASK(7, 0)) x 502 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_MISC_CFG_SEL_RECO_CLK(x) (((x) << 13) & GENMASK(14, 13)) x 504 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_MISC_CFG_SEL_RECO_CLK_X(x) (((x) & GENMASK(14, 13)) >> 13) x 505 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_MISC_CFG_DES_100FX_KICK_MODE(x) (((x) << 11) & GENMASK(12, 11)) x 507 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_MISC_CFG_DES_100FX_KICK_MODE_X(x) (((x) & GENMASK(12, 11)) >> 11) x 519 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_POST0(x) (((x) << 23) & GENMASK(28, 23)) x 521 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_POST0_X(x) (((x) & GENMASK(28, 23)) >> 23) x 522 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_POST1(x) (((x) << 18) & GENMASK(22, 18)) x 524 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_POST1_X(x) (((x) & GENMASK(22, 18)) >> 18) x 525 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_PREC(x) (((x) << 13) & GENMASK(17, 13)) x 527 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_PREC_X(x) (((x) & GENMASK(17, 13)) >> 13) x 528 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_ENA_CAS(x) (((x) << 6) & GENMASK(8, 6)) x 530 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_ENA_CAS_X(x) (((x) & GENMASK(8, 6)) >> 6) x 531 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_ANEG_CFG_AN_OB_LEV(x) ((x) & GENMASK(5, 0)) x 545 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_PHS_CTRL(x) (((x) << 13) & GENMASK(16, 13)) x 547 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_PHS_CTRL_X(x) (((x) & GENMASK(16, 13)) >> 13) x 548 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_MBTR_CTRL(x) (((x) << 10) & GENMASK(12, 10)) x 550 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_MBTR_CTRL_X(x) (((x) & GENMASK(12, 10)) >> 10) x 551 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_CPMD_SEL(x) (((x) << 8) & GENMASK(9, 8)) x 553 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_CPMD_SEL_X(x) (((x) & GENMASK(9, 8)) >> 8) x 554 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_BW_HYST(x) (((x) << 5) & GENMASK(7, 5)) x 556 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_BW_HYST_X(x) (((x) & GENMASK(7, 5)) >> 5) x 558 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_BW_ANA(x) (((x) << 1) & GENMASK(3, 1)) x 560 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_DES_CFG_DES_BW_ANA_X(x) (((x) & GENMASK(3, 1)) >> 1) x 563 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_SOFSI(x) (((x) << 29) & GENMASK(30, 29)) x 565 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_SOFSI_X(x) (((x) & GENMASK(30, 29)) >> 29) x 567 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_RTRM_ADJ(x) (((x) << 24) & GENMASK(27, 24)) x 569 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_RTRM_ADJ_X(x) (((x) & GENMASK(27, 24)) >> 24) x 570 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_ICML_ADJ(x) (((x) << 20) & GENMASK(23, 20)) x 572 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_ICML_ADJ_X(x) (((x) & GENMASK(23, 20)) >> 20) x 573 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_TERM_MODE_SEL(x) (((x) << 18) & GENMASK(19, 18)) x 575 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_TERM_MODE_SEL_X(x) (((x) & GENMASK(19, 18)) >> 18) x 576 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_SIG_DET_CLK_SEL(x) (((x) << 15) & GENMASK(17, 15)) x 578 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_SIG_DET_CLK_SEL_X(x) (((x) & GENMASK(17, 15)) >> 15) x 579 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_HP(x) (((x) << 13) & GENMASK(14, 13)) x 581 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_HP_X(x) (((x) & GENMASK(14, 13)) >> 13) x 582 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_MID(x) (((x) << 11) & GENMASK(12, 11)) x 584 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_MID_X(x) (((x) & GENMASK(12, 11)) >> 11) x 585 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_LP(x) (((x) << 9) & GENMASK(10, 9)) x 587 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_LP_X(x) (((x) & GENMASK(10, 9)) >> 9) x 588 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_OFFSET(x) (((x) << 7) & GENMASK(8, 7)) x 590 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG_IB_REG_PAT_SEL_OFFSET_X(x) (((x) & GENMASK(8, 7)) >> 7) x 599 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG1_IB_TJTAG(x) (((x) << 17) & GENMASK(21, 17)) x 601 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG1_IB_TJTAG_X(x) (((x) & GENMASK(21, 17)) >> 17) x 602 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG1_IB_TSDET(x) (((x) << 12) & GENMASK(16, 12)) x 604 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG1_IB_TSDET_X(x) (((x) & GENMASK(16, 12)) >> 12) x 605 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG1_IB_SCALY(x) (((x) << 8) & GENMASK(11, 8)) x 607 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG1_IB_SCALY_X(x) (((x) & GENMASK(11, 8)) >> 8) x 617 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_TINFV(x) (((x) << 27) & GENMASK(29, 27)) x 619 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_TINFV_X(x) (((x) & GENMASK(29, 27)) >> 27) x 620 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_OINFI(x) (((x) << 22) & GENMASK(26, 22)) x 622 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_OINFI_X(x) (((x) & GENMASK(26, 22)) >> 22) x 623 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_TAUX(x) (((x) << 19) & GENMASK(21, 19)) x 625 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_TAUX_X(x) (((x) & GENMASK(21, 19)) >> 19) x 626 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_OINFS(x) (((x) << 16) & GENMASK(18, 16)) x 628 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_OINFS_X(x) (((x) & GENMASK(18, 16)) >> 16) x 629 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_OCALS(x) (((x) << 10) & GENMASK(15, 10)) x 631 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_OCALS_X(x) (((x) & GENMASK(15, 10)) >> 10) x 632 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_TCALV(x) (((x) << 5) & GENMASK(9, 5)) x 634 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_TCALV_X(x) (((x) & GENMASK(9, 5)) >> 5) x 635 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_UMAX(x) (((x) << 3) & GENMASK(4, 3)) x 637 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_UMAX_X(x) (((x) & GENMASK(4, 3)) >> 3) x 638 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG2_IB_UREG(x) ((x) & GENMASK(2, 0)) x 641 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG3_IB_INI_HP(x) (((x) << 18) & GENMASK(23, 18)) x 643 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG3_IB_INI_HP_X(x) (((x) & GENMASK(23, 18)) >> 18) x 644 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG3_IB_INI_MID(x) (((x) << 12) & GENMASK(17, 12)) x 646 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG3_IB_INI_MID_X(x) (((x) & GENMASK(17, 12)) >> 12) x 647 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG3_IB_INI_LP(x) (((x) << 6) & GENMASK(11, 6)) x 649 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG3_IB_INI_LP_X(x) (((x) & GENMASK(11, 6)) >> 6) x 650 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG3_IB_INI_OFFSET(x) ((x) & GENMASK(5, 0)) x 653 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG4_IB_MAX_HP(x) (((x) << 18) & GENMASK(23, 18)) x 655 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG4_IB_MAX_HP_X(x) (((x) & GENMASK(23, 18)) >> 18) x 656 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG4_IB_MAX_MID(x) (((x) << 12) & GENMASK(17, 12)) x 658 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG4_IB_MAX_MID_X(x) (((x) & GENMASK(17, 12)) >> 12) x 659 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG4_IB_MAX_LP(x) (((x) << 6) & GENMASK(11, 6)) x 661 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG4_IB_MAX_LP_X(x) (((x) & GENMASK(11, 6)) >> 6) x 662 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG4_IB_MAX_OFFSET(x) ((x) & GENMASK(5, 0)) x 665 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG5_IB_MIN_HP(x) (((x) << 18) & GENMASK(23, 18)) x 667 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG5_IB_MIN_HP_X(x) (((x) & GENMASK(23, 18)) >> 18) x 668 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG5_IB_MIN_MID(x) (((x) << 12) & GENMASK(17, 12)) x 670 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG5_IB_MIN_MID_X(x) (((x) & GENMASK(17, 12)) >> 12) x 671 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG5_IB_MIN_LP(x) (((x) << 6) & GENMASK(11, 6)) x 673 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG5_IB_MIN_LP_X(x) (((x) & GENMASK(11, 6)) >> 6) x 674 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_CFG5_IB_MIN_OFFSET(x) ((x) & GENMASK(5, 0)) x 680 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_POST0(x) (((x) << 23) & GENMASK(28, 23)) x 682 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_POST0_X(x) (((x) & GENMASK(28, 23)) >> 23) x 683 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_PREC(x) (((x) << 18) & GENMASK(22, 18)) x 685 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_PREC_X(x) (((x) & GENMASK(22, 18)) >> 18) x 688 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_POST1(x) (((x) << 11) & GENMASK(15, 11)) x 690 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_POST1_X(x) (((x) & GENMASK(15, 11)) >> 11) x 694 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_SR(x) (((x) << 4) & GENMASK(7, 4)) x 696 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_SR_X(x) (((x) & GENMASK(7, 4)) >> 4) x 697 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG_OB_RESISTOR_CTRL(x) ((x) & GENMASK(3, 0)) x 700 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG1_OB_ENA_CAS(x) (((x) << 6) & GENMASK(8, 6)) x 702 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG1_OB_ENA_CAS_X(x) (((x) & GENMASK(8, 6)) >> 6) x 703 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_OB_CFG1_OB_LEV(x) ((x) & GENMASK(5, 0)) x 709 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_SER_CFG_SER_ALISEL(x) (((x) << 4) & GENMASK(5, 4)) x 711 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_SER_CFG_SER_ALISEL_X(x) (((x) & GENMASK(5, 4)) >> 4) x 723 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_COMMON_CFG_LANE_CTRL(x) (((x) << 9) & GENMASK(11, 9)) x 725 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_COMMON_CFG_LANE_CTRL_X(x) (((x) & GENMASK(11, 9)) >> 9) x 733 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_COMMON_CFG_IF_MODE(x) ((x) & GENMASK(1, 0)) x 736 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_PLL_CFG_PLL_ENA_OFFS(x) (((x) << 16) & GENMASK(17, 16)) x 738 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_PLL_CFG_PLL_ENA_OFFS_X(x) (((x) & GENMASK(17, 16)) >> 16) x 741 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_PLL_CFG_PLL_FSM_CTRL_DATA(x) (((x) << 6) & GENMASK(13, 6)) x 743 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_PLL_CFG_PLL_FSM_CTRL_DATA_X(x) (((x) & GENMASK(13, 6)) >> 6) x 758 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_GP_CFG_GP_MSB(x) (((x) << 16) & GENMASK(31, 16)) x 760 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_GP_CFG_GP_MSB_X(x) (((x) & GENMASK(31, 16)) >> 16) x 761 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_GP_CFG_GP_LSB(x) ((x) & GENMASK(15, 0)) x 774 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_STATUS1_IB_HP_GAIN_STAT(x) (((x) << 18) & GENMASK(23, 18)) x 776 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_STATUS1_IB_HP_GAIN_STAT_X(x) (((x) & GENMASK(23, 18)) >> 18) x 777 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_STATUS1_IB_MID_GAIN_STAT(x) (((x) << 12) & GENMASK(17, 12)) x 779 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_STATUS1_IB_MID_GAIN_STAT_X(x) (((x) & GENMASK(17, 12)) >> 12) x 780 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_STATUS1_IB_LP_GAIN_STAT(x) (((x) << 6) & GENMASK(11, 6)) x 782 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_STATUS1_IB_LP_GAIN_STAT_X(x) (((x) & GENMASK(11, 6)) >> 6) x 783 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_IB_STATUS1_IB_OFFSET_STAT(x) ((x) & GENMASK(5, 0)) x 793 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_PLL_STATUS_PLL_RB_DATA(x) ((x) & GENMASK(7, 0)) x 796 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_SERDES_REV(x) (((x) << 26) & GENMASK(31, 26)) x 798 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_SERDES_REV_X(x) (((x) & GENMASK(31, 26)) >> 26) x 799 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_RCPLL_REV(x) (((x) << 21) & GENMASK(25, 21)) x 801 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_RCPLL_REV_X(x) (((x) & GENMASK(25, 21)) >> 21) x 802 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_SER_REV(x) (((x) << 16) & GENMASK(20, 16)) x 804 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_SER_REV_X(x) (((x) & GENMASK(20, 16)) >> 16) x 805 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_DES_REV(x) (((x) << 10) & GENMASK(15, 10)) x 807 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_DES_REV_X(x) (((x) & GENMASK(15, 10)) >> 10) x 808 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_OB_REV(x) (((x) << 5) & GENMASK(9, 5)) x 810 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_OB_REV_X(x) (((x) & GENMASK(9, 5)) >> 5) x 811 include/soc/mscc/ocelot_hsio.h #define HSIO_S6G_REVID_IB_REV(x) ((x) & GENMASK(4, 0)) x 816 include/soc/mscc/ocelot_hsio.h #define HSIO_MCB_S6G_ADDR_CFG_SERDES6G_ADDR(x) ((x) & GENMASK(24, 0)) x 832 include/soc/mscc/ocelot_hsio.h #define HSIO_HW_QSGMII_STAT_DELAY_VAR_X200PS(x) (((x) << 1) & GENMASK(6, 1)) x 834 include/soc/mscc/ocelot_hsio.h #define HSIO_HW_QSGMII_STAT_DELAY_VAR_X200PS_X(x) (((x) & GENMASK(6, 1)) >> 1) x 837 include/soc/mscc/ocelot_hsio.h #define HSIO_CLK_CFG_CLKDIV_PHY(x) (((x) << 1) & GENMASK(8, 1)) x 839 include/soc/mscc/ocelot_hsio.h #define HSIO_CLK_CFG_CLKDIV_PHY_X(x) (((x) & GENMASK(8, 1)) >> 1) x 849 include/soc/mscc/ocelot_hsio.h #define HSIO_TEMP_SENSOR_CFG_RUN_WID(x) (((x) << 8) & GENMASK(15, 8)) x 851 include/soc/mscc/ocelot_hsio.h #define HSIO_TEMP_SENSOR_CFG_RUN_WID_X(x) (((x) & GENMASK(15, 8)) >> 8) x 852 include/soc/mscc/ocelot_hsio.h #define HSIO_TEMP_SENSOR_CFG_SAMPLE_PER(x) ((x) & GENMASK(7, 0)) x 856 include/soc/mscc/ocelot_hsio.h #define HSIO_TEMP_SENSOR_STAT_TEMP(x) ((x) & GENMASK(7, 0)) x 2131 include/soc/tegra/bpmp-abi.h uint32_t x; x 175 include/sound/ak4113.h #define AK4113_IPS(x) ((x)&7) x 104 include/sound/ak4114.h #define AK4114_IPS(x) ((x)&7) x 12 include/sound/cs4231-regs.h #define CS4231P(x) (c_d_c_CS4231##x) x 43 include/sound/es1688.h #define ES1688P(codec, x) ((codec)->port + e_s_s_ESS1688##x) x 19 include/sound/gus.h #define GUSP(gus, x) ((gus)->gf1.port + SNDRV_g_u_s_##x) x 133 include/sound/gus.h #define SNDRV_GF1_ATTEN(x) (snd_gf1_atten_table[x]) x 25 include/sound/memalloc.h #define snd_dma_continuous_data(x) ((struct device *)(__force unsigned long)(x)) x 105 include/sound/sb.h #define SBP(chip, x) ((chip)->port + s_b_SB_##x) x 106 include/sound/sb.h #define SBP1(port, x) ((port) + s_b_SB_##x) x 740 include/sound/soc-dapm.h #define SND_SOC_DAPM_DIR_TO_EP(x) BIT(x) x 34 include/sound/sof/header.h #define SOF_GLB_TYPE(x) ((x) << SOF_GLB_TYPE_SHIFT) x 39 include/sound/sof/header.h #define SOF_CMD_TYPE(x) ((x) << SOF_CMD_TYPE_SHIFT) x 112 include/sound/sof/header.h #define SOF_IPC_MESSAGE_ID(x) ((x) & 0xffff) x 37 include/trace/bpf_probe.h #define __CAST_TO_U64(x) ({ \ x 38 include/trace/bpf_probe.h typeof(x) __src = (x); \ x 39 include/trace/bpf_probe.h UINTTYPE(sizeof(x)) __dst; \ x 86 include/trace/bpf_probe.h #define FIRST(x, ...) x x 10 include/trace/events/kvm.h #define ERSN(x) { KVM_EXIT_##x, "KVM_EXIT_" #x } x 14 include/trace/events/power.h #define TPS(x) tracepoint_string(x) x 35 include/trace/events/rdma.h #define ib_event(x) TRACE_DEFINE_ENUM(IB_EVENT_##x); x 36 include/trace/events/rdma.h #define ib_event_end(x) TRACE_DEFINE_ENUM(IB_EVENT_##x); x 43 include/trace/events/rdma.h #define ib_event(x) { IB_EVENT_##x, #x }, x 44 include/trace/events/rdma.h #define ib_event_end(x) { IB_EVENT_##x, #x } x 46 include/trace/events/rdma.h #define rdma_show_ib_event(x) \ x 47 include/trace/events/rdma.h __print_symbolic(x, IB_EVENT_LIST) x 79 include/trace/events/rdma.h #define ib_wc_status(x) TRACE_DEFINE_ENUM(IB_WC_##x); x 80 include/trace/events/rdma.h #define ib_wc_status_end(x) TRACE_DEFINE_ENUM(IB_WC_##x); x 87 include/trace/events/rdma.h #define ib_wc_status(x) { IB_WC_##x, #x }, x 88 include/trace/events/rdma.h #define ib_wc_status_end(x) { IB_WC_##x, #x } x 90 include/trace/events/rdma.h #define rdma_show_wc_status(x) \ x 91 include/trace/events/rdma.h __print_symbolic(x, IB_WC_STATUS_LIST) x 117 include/trace/events/rdma.h #define rdma_cm_event(x) TRACE_DEFINE_ENUM(RDMA_CM_EVENT_##x); x 118 include/trace/events/rdma.h #define rdma_cm_event_end(x) TRACE_DEFINE_ENUM(RDMA_CM_EVENT_##x); x 125 include/trace/events/rdma.h #define rdma_cm_event(x) { RDMA_CM_EVENT_##x, #x }, x 126 include/trace/events/rdma.h #define rdma_cm_event_end(x) { RDMA_CM_EVENT_##x, #x } x 128 include/trace/events/rdma.h #define rdma_show_cm_event(x) \ x 129 include/trace/events/rdma.h __print_symbolic(x, RDMA_CM_EVENT_LIST) x 44 include/trace/events/rpcgss.h #define show_gss_status(x) \ x 45 include/trace/events/rpcgss.h __print_flags(x, "|", \ x 328 include/trace/events/rpcgss.h #define show_pseudoflavor(x) \ x 329 include/trace/events/rpcgss.h __print_symbolic(x, \ x 224 include/trace/events/rpcrdma.h #define xprtrdma_show_direction(x) \ x 225 include/trace/events/rpcrdma.h __print_symbolic(x, \ x 540 include/trace/events/rpcrdma.h #define xprtrdma_show_chunktype(x) \ x 541 include/trace/events/rpcrdma.h __print_symbolic(x, \ x 1307 include/trace/events/rpcrdma.h #define show_rpcrdma_proc(x) \ x 1308 include/trace/events/rpcrdma.h __print_symbolic(x, \ x 578 include/trace/events/writeback.h #define KBps(x) ((x) << (PAGE_SHIFT - 10)) x 20 include/trace/events/xdp.h #define __XDP_ACT_TP_FN(x) \ x 21 include/trace/events/xdp.h TRACE_DEFINE_ENUM(XDP_##x); x 22 include/trace/events/xdp.h #define __XDP_ACT_SYM_FN(x) \ x 23 include/trace/events/xdp.h { XDP_##x, #x }, x 310 include/trace/events/xdp.h #define __MEM_TYPE_TP_FN(x) \ x 311 include/trace/events/xdp.h TRACE_DEFINE_ENUM(MEM_TYPE_##x); x 312 include/trace/events/xdp.h #define __MEM_TYPE_SYM_FN(x) \ x 313 include/trace/events/xdp.h { MEM_TYPE_##x, #x }, x 26 include/trace/trace_events.h #define __app__(x, y) str__##x##y x 27 include/trace/trace_events.h #define __app(x, y) __app__(x, y) x 16 include/uapi/asm-generic/unistd.h #define __SYSCALL(x, y) x 263 include/uapi/drm/drm_mode.h __u32 x; /**< x Position on the framebuffer */ x 593 include/uapi/drm/drm_mode.h __s32 x; x 604 include/uapi/drm/drm_mode.h __s32 x; x 671 include/uapi/drm/drm_mode.h __u16 x, y; x 682 include/uapi/drm/drm_mode.h __u16 x, y; x 66 include/uapi/drm/drm_sarea.h unsigned int x; x 291 include/uapi/drm/exynos_drm.h __u32 x; x 174 include/uapi/drm/i915_drm.h #define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) x 58 include/uapi/drm/msm_drm.h #define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK) x 59 include/uapi/drm/msm_drm.h #define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK) x 286 include/uapi/drm/r128_drm.h unsigned short x, y; x 298 include/uapi/drm/r128_drm.h int __user *x; x 671 include/uapi/drm/radeon_drm.h unsigned int x, y; /* Blit coordinates */ x 107 include/uapi/drm/virtgpu_drm.h __u32 x; x 454 include/uapi/drm/vmwgfx_drm.h __s32 x; x 77 include/uapi/linux/a.out.h #define N_BADMAG(x) (N_MAGIC(x) != OMAGIC \ x 78 include/uapi/linux/a.out.h && N_MAGIC(x) != NMAGIC \ x 79 include/uapi/linux/a.out.h && N_MAGIC(x) != ZMAGIC \ x 80 include/uapi/linux/a.out.h && N_MAGIC(x) != QMAGIC) x 83 include/uapi/linux/a.out.h #define _N_HDROFF(x) (1024 - sizeof (struct exec)) x 86 include/uapi/linux/a.out.h #define N_TXTOFF(x) \ x 87 include/uapi/linux/a.out.h (N_MAGIC(x) == ZMAGIC ? _N_HDROFF((x)) + sizeof (struct exec) : \ x 88 include/uapi/linux/a.out.h (N_MAGIC(x) == QMAGIC ? 0 : sizeof (struct exec))) x 92 include/uapi/linux/a.out.h #define N_DATOFF(x) (N_TXTOFF(x) + (x).a_text) x 96 include/uapi/linux/a.out.h #define N_TRELOFF(x) (N_DATOFF(x) + (x).a_data) x 100 include/uapi/linux/a.out.h #define N_DRELOFF(x) (N_TRELOFF(x) + N_TRSIZE(x)) x 104 include/uapi/linux/a.out.h #define N_SYMOFF(x) (N_DRELOFF(x) + N_DRSIZE(x)) x 108 include/uapi/linux/a.out.h #define N_STROFF(x) (N_SYMOFF(x) + N_SYMSIZE(x)) x 113 include/uapi/linux/a.out.h #define N_TXTADDR(x) (N_MAGIC(x) == QMAGIC ? PAGE_SIZE : 0) x 130 include/uapi/linux/a.out.h #define _N_SEGMENT_ROUND(x) ALIGN(x, SEGMENT_SIZE) x 132 include/uapi/linux/a.out.h #define _N_TXTENDADDR(x) (N_TXTADDR(x)+(x).a_text) x 135 include/uapi/linux/a.out.h #define N_DATADDR(x) \ x 136 include/uapi/linux/a.out.h (N_MAGIC(x)==OMAGIC? (_N_TXTENDADDR(x)) \ x 137 include/uapi/linux/a.out.h : (_N_SEGMENT_ROUND (_N_TXTENDADDR(x)))) x 142 include/uapi/linux/a.out.h #define N_BSSADDR(x) (N_DATADDR(x) + (x).a_data) x 35 include/uapi/linux/arm_sdei.h #define SDEI_VERSION_MAJOR(x) (x>>SDEI_VERSION_MAJOR_SHIFT & SDEI_VERSION_MAJOR_MASK) x 36 include/uapi/linux/arm_sdei.h #define SDEI_VERSION_MINOR(x) (x>>SDEI_VERSION_MINOR_SHIFT & SDEI_VERSION_MINOR_MASK) x 37 include/uapi/linux/arm_sdei.h #define SDEI_VERSION_VENDOR(x) (x>>SDEI_VERSION_VENDOR_SHIFT & SDEI_VERSION_VENDOR_MASK) x 481 include/uapi/linux/audit.h #define audit_feature_valid(x) ((x) >= 0 && (x) <= AUDIT_LAST_FEATURE) x 482 include/uapi/linux/audit.h #define AUDIT_FEATURE_TO_MASK(x) (1 << ((x) & 31)) /* mask for __u32 */ x 2870 include/uapi/linux/bpf.h #define __BPF_ENUM_FN(x) BPF_FUNC_ ## x x 15 include/uapi/linux/byteorder/big_endian.h #define __constant_htonl(x) ((__force __be32)(__u32)(x)) x 16 include/uapi/linux/byteorder/big_endian.h #define __constant_ntohl(x) ((__force __u32)(__be32)(x)) x 17 include/uapi/linux/byteorder/big_endian.h #define __constant_htons(x) ((__force __be16)(__u16)(x)) x 18 include/uapi/linux/byteorder/big_endian.h #define __constant_ntohs(x) ((__force __u16)(__be16)(x)) x 19 include/uapi/linux/byteorder/big_endian.h #define __constant_cpu_to_le64(x) ((__force __le64)___constant_swab64((x))) x 20 include/uapi/linux/byteorder/big_endian.h #define __constant_le64_to_cpu(x) ___constant_swab64((__force __u64)(__le64)(x)) x 21 include/uapi/linux/byteorder/big_endian.h #define __constant_cpu_to_le32(x) ((__force __le32)___constant_swab32((x))) x 22 include/uapi/linux/byteorder/big_endian.h #define __constant_le32_to_cpu(x) ___constant_swab32((__force __u32)(__le32)(x)) x 23 include/uapi/linux/byteorder/big_endian.h #define __constant_cpu_to_le16(x) ((__force __le16)___constant_swab16((x))) x 24 include/uapi/linux/byteorder/big_endian.h #define __constant_le16_to_cpu(x) ___constant_swab16((__force __u16)(__le16)(x)) x 25 include/uapi/linux/byteorder/big_endian.h #define __constant_cpu_to_be64(x) ((__force __be64)(__u64)(x)) x 26 include/uapi/linux/byteorder/big_endian.h #define __constant_be64_to_cpu(x) ((__force __u64)(__be64)(x)) x 27 include/uapi/linux/byteorder/big_endian.h #define __constant_cpu_to_be32(x) ((__force __be32)(__u32)(x)) x 28 include/uapi/linux/byteorder/big_endian.h #define __constant_be32_to_cpu(x) ((__force __u32)(__be32)(x)) x 29 include/uapi/linux/byteorder/big_endian.h #define __constant_cpu_to_be16(x) ((__force __be16)(__u16)(x)) x 30 include/uapi/linux/byteorder/big_endian.h #define __constant_be16_to_cpu(x) ((__force __u16)(__be16)(x)) x 31 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_le64(x) ((__force __le64)__swab64((x))) x 32 include/uapi/linux/byteorder/big_endian.h #define __le64_to_cpu(x) __swab64((__force __u64)(__le64)(x)) x 33 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_le32(x) ((__force __le32)__swab32((x))) x 34 include/uapi/linux/byteorder/big_endian.h #define __le32_to_cpu(x) __swab32((__force __u32)(__le32)(x)) x 35 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_le16(x) ((__force __le16)__swab16((x))) x 36 include/uapi/linux/byteorder/big_endian.h #define __le16_to_cpu(x) __swab16((__force __u16)(__le16)(x)) x 37 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_be64(x) ((__force __be64)(__u64)(x)) x 38 include/uapi/linux/byteorder/big_endian.h #define __be64_to_cpu(x) ((__force __u64)(__be64)(x)) x 39 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_be32(x) ((__force __be32)(__u32)(x)) x 40 include/uapi/linux/byteorder/big_endian.h #define __be32_to_cpu(x) ((__force __u32)(__be32)(x)) x 41 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_be16(x) ((__force __be16)(__u16)(x)) x 42 include/uapi/linux/byteorder/big_endian.h #define __be16_to_cpu(x) ((__force __u16)(__be16)(x)) x 92 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_le64s(x) __swab64s((x)) x 93 include/uapi/linux/byteorder/big_endian.h #define __le64_to_cpus(x) __swab64s((x)) x 94 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_le32s(x) __swab32s((x)) x 95 include/uapi/linux/byteorder/big_endian.h #define __le32_to_cpus(x) __swab32s((x)) x 96 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_le16s(x) __swab16s((x)) x 97 include/uapi/linux/byteorder/big_endian.h #define __le16_to_cpus(x) __swab16s((x)) x 98 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_be64s(x) do { (void)(x); } while (0) x 99 include/uapi/linux/byteorder/big_endian.h #define __be64_to_cpus(x) do { (void)(x); } while (0) x 100 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_be32s(x) do { (void)(x); } while (0) x 101 include/uapi/linux/byteorder/big_endian.h #define __be32_to_cpus(x) do { (void)(x); } while (0) x 102 include/uapi/linux/byteorder/big_endian.h #define __cpu_to_be16s(x) do { (void)(x); } while (0) x 103 include/uapi/linux/byteorder/big_endian.h #define __be16_to_cpus(x) do { (void)(x); } while (0) x 15 include/uapi/linux/byteorder/little_endian.h #define __constant_htonl(x) ((__force __be32)___constant_swab32((x))) x 16 include/uapi/linux/byteorder/little_endian.h #define __constant_ntohl(x) ___constant_swab32((__force __be32)(x)) x 17 include/uapi/linux/byteorder/little_endian.h #define __constant_htons(x) ((__force __be16)___constant_swab16((x))) x 18 include/uapi/linux/byteorder/little_endian.h #define __constant_ntohs(x) ___constant_swab16((__force __be16)(x)) x 19 include/uapi/linux/byteorder/little_endian.h #define __constant_cpu_to_le64(x) ((__force __le64)(__u64)(x)) x 20 include/uapi/linux/byteorder/little_endian.h #define __constant_le64_to_cpu(x) ((__force __u64)(__le64)(x)) x 21 include/uapi/linux/byteorder/little_endian.h #define __constant_cpu_to_le32(x) ((__force __le32)(__u32)(x)) x 22 include/uapi/linux/byteorder/little_endian.h #define __constant_le32_to_cpu(x) ((__force __u32)(__le32)(x)) x 23 include/uapi/linux/byteorder/little_endian.h #define __constant_cpu_to_le16(x) ((__force __le16)(__u16)(x)) x 24 include/uapi/linux/byteorder/little_endian.h #define __constant_le16_to_cpu(x) ((__force __u16)(__le16)(x)) x 25 include/uapi/linux/byteorder/little_endian.h #define __constant_cpu_to_be64(x) ((__force __be64)___constant_swab64((x))) x 26 include/uapi/linux/byteorder/little_endian.h #define __constant_be64_to_cpu(x) ___constant_swab64((__force __u64)(__be64)(x)) x 27 include/uapi/linux/byteorder/little_endian.h #define __constant_cpu_to_be32(x) ((__force __be32)___constant_swab32((x))) x 28 include/uapi/linux/byteorder/little_endian.h #define __constant_be32_to_cpu(x) ___constant_swab32((__force __u32)(__be32)(x)) x 29 include/uapi/linux/byteorder/little_endian.h #define __constant_cpu_to_be16(x) ((__force __be16)___constant_swab16((x))) x 30 include/uapi/linux/byteorder/little_endian.h #define __constant_be16_to_cpu(x) ___constant_swab16((__force __u16)(__be16)(x)) x 31 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_le64(x) ((__force __le64)(__u64)(x)) x 32 include/uapi/linux/byteorder/little_endian.h #define __le64_to_cpu(x) ((__force __u64)(__le64)(x)) x 33 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_le32(x) ((__force __le32)(__u32)(x)) x 34 include/uapi/linux/byteorder/little_endian.h #define __le32_to_cpu(x) ((__force __u32)(__le32)(x)) x 35 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_le16(x) ((__force __le16)(__u16)(x)) x 36 include/uapi/linux/byteorder/little_endian.h #define __le16_to_cpu(x) ((__force __u16)(__le16)(x)) x 37 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_be64(x) ((__force __be64)__swab64((x))) x 38 include/uapi/linux/byteorder/little_endian.h #define __be64_to_cpu(x) __swab64((__force __u64)(__be64)(x)) x 39 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_be32(x) ((__force __be32)__swab32((x))) x 40 include/uapi/linux/byteorder/little_endian.h #define __be32_to_cpu(x) __swab32((__force __u32)(__be32)(x)) x 41 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_be16(x) ((__force __be16)__swab16((x))) x 42 include/uapi/linux/byteorder/little_endian.h #define __be16_to_cpu(x) __swab16((__force __u16)(__be16)(x)) x 92 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_le64s(x) do { (void)(x); } while (0) x 93 include/uapi/linux/byteorder/little_endian.h #define __le64_to_cpus(x) do { (void)(x); } while (0) x 94 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_le32s(x) do { (void)(x); } while (0) x 95 include/uapi/linux/byteorder/little_endian.h #define __le32_to_cpus(x) do { (void)(x); } while (0) x 96 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_le16s(x) do { (void)(x); } while (0) x 97 include/uapi/linux/byteorder/little_endian.h #define __le16_to_cpus(x) do { (void)(x); } while (0) x 98 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_be64s(x) __swab64s((x)) x 99 include/uapi/linux/byteorder/little_endian.h #define __be64_to_cpus(x) __swab64s((x)) x 100 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_be32s(x) __swab32s((x)) x 101 include/uapi/linux/byteorder/little_endian.h #define __be32_to_cpus(x) __swab32s((x)) x 102 include/uapi/linux/byteorder/little_endian.h #define __cpu_to_be16s(x) __swab16s((x)) x 103 include/uapi/linux/byteorder/little_endian.h #define __be16_to_cpus(x) __swab16s((x)) x 372 include/uapi/linux/capability.h #define cap_valid(x) ((x) >= 0 && (x) <= CAP_LAST_CAP) x 378 include/uapi/linux/capability.h #define CAP_TO_INDEX(x) ((x) >> 5) /* 1 << 5 == bits in __u32 */ x 379 include/uapi/linux/capability.h #define CAP_TO_MASK(x) (1 << ((x) & 31)) /* mask for indexed __u32 */ x 110 include/uapi/linux/coff.h #define COFF_I386BADMAG(x) ((COFF_SHORT((x).f_magic) != COFF_I386MAGIC) \ x 111 include/uapi/linux/coff.h && COFF_SHORT((x).f_magic) != COFF_I386PTXMAGIC \ x 112 include/uapi/linux/coff.h && COFF_SHORT((x).f_magic) != COFF_I386AIXMAGIC) x 114 include/uapi/linux/coff.h #define COFF_I386BADMAG(x) (COFF_SHORT((x).f_magic) != COFF_I386MAGIC) x 25 include/uapi/linux/const.h #define _UL(x) (_AC(x, UL)) x 26 include/uapi/linux/const.h #define _ULL(x) (_AC(x, ULL)) x 28 include/uapi/linux/const.h #define _BITUL(x) (_UL(1) << (x)) x 29 include/uapi/linux/const.h #define _BITULL(x) (_ULL(1) << (x)) x 27 include/uapi/linux/dqblk_xfs.h #define XQM_CMD(x) (('X'<<8)+(x)) /* note: forms first QCMD argument */ x 28 include/uapi/linux/dqblk_xfs.h #define XQM_COMMAND(x) (((x) & (0xff<<8)) == ('X'<<8)) /* test if for XFS */ x 20 include/uapi/linux/efs_fs_sb.h #define IS_EFS_MAGIC(x) ((x == EFS_MAGIC) || (x == EFS_NEWMAGIC)) x 131 include/uapi/linux/elf.h #define ELF_ST_BIND(x) ((x) >> 4) x 132 include/uapi/linux/elf.h #define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf) x 133 include/uapi/linux/elf.h #define ELF32_ST_BIND(x) ELF_ST_BIND(x) x 134 include/uapi/linux/elf.h #define ELF32_ST_TYPE(x) ELF_ST_TYPE(x) x 135 include/uapi/linux/elf.h #define ELF64_ST_BIND(x) ELF_ST_BIND(x) x 136 include/uapi/linux/elf.h #define ELF64_ST_TYPE(x) ELF_ST_TYPE(x) x 155 include/uapi/linux/elf.h #define ELF32_R_SYM(x) ((x) >> 8) x 156 include/uapi/linux/elf.h #define ELF32_R_TYPE(x) ((x) & 0xff) x 384 include/uapi/linux/fb.h __u16 x, y; x 812 include/uapi/linux/fuse.h #define FUSE_DIRENT_ALIGN(x) \ x 813 include/uapi/linux/fuse.h (((x) + sizeof(uint64_t) - 1) & ~(sizeof(uint64_t) - 1)) x 388 include/uapi/linux/gfs2_ondisk.h #define GFS2_EATYPE_VALID(x) ((x) <= GFS2_EATYPE_LAST) x 142 include/uapi/linux/if_packet.h #define TPACKET_ALIGN(x) (((x)+TPACKET_ALIGNMENT-1)&~(TPACKET_ALIGNMENT-1)) x 206 include/uapi/linux/jffs2.h struct jffs2_raw_xattr x; x 110 include/uapi/linux/joystick.h __s32 x; x 10 include/uapi/linux/kernel.h #define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1) x 11 include/uapi/linux/kernel.h #define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) x 46 include/uapi/linux/keyboard.h #define KTYP(x) ((x) >> 8) x 47 include/uapi/linux/keyboard.h #define KVAL(x) ((x) & 0xff) x 782 include/uapi/linux/kvm.h #define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ x 783 include/uapi/linux/kvm.h ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) x 42 include/uapi/linux/lirc.h #define LIRC_MODE2SEND(x) (x) x 43 include/uapi/linux/lirc.h #define LIRC_SEND2MODE(x) (x) x 44 include/uapi/linux/lirc.h #define LIRC_MODE2REC(x) ((x) << 16) x 45 include/uapi/linux/lirc.h #define LIRC_REC2MODE(x) ((x) >> 16) x 85 include/uapi/linux/lirc.h #define LIRC_CAN_SEND(x) ((x)&LIRC_CAN_SEND_MASK) x 86 include/uapi/linux/lirc.h #define LIRC_CAN_REC(x) ((x)&LIRC_CAN_REC_MASK) x 27 include/uapi/linux/mic_common.h #define __mic_align(a, x) (((a) + (x) - 1) & ~((x) - 1)) x 85 include/uapi/linux/msdos_fs.h #define IS_FSINFO(x) (le32_to_cpu((x)->signature1) == FAT_FSINFO_SIG1 \ x 86 include/uapi/linux/msdos_fs.h && le32_to_cpu((x)->signature2) == FAT_FSINFO_SIG2) x 140 include/uapi/linux/mtio.h #define GMT_EOF(x) ((x) & 0x80000000) x 141 include/uapi/linux/mtio.h #define GMT_BOT(x) ((x) & 0x40000000) x 142 include/uapi/linux/mtio.h #define GMT_EOT(x) ((x) & 0x20000000) x 143 include/uapi/linux/mtio.h #define GMT_SM(x) ((x) & 0x10000000) /* DDS setmark */ x 144 include/uapi/linux/mtio.h #define GMT_EOD(x) ((x) & 0x08000000) /* DDS EOD */ x 145 include/uapi/linux/mtio.h #define GMT_WR_PROT(x) ((x) & 0x04000000) x 147 include/uapi/linux/mtio.h #define GMT_ONLINE(x) ((x) & 0x01000000) x 148 include/uapi/linux/mtio.h #define GMT_D_6250(x) ((x) & 0x00800000) x 149 include/uapi/linux/mtio.h #define GMT_D_1600(x) ((x) & 0x00400000) x 150 include/uapi/linux/mtio.h #define GMT_D_800(x) ((x) & 0x00200000) x 153 include/uapi/linux/mtio.h #define GMT_DR_OPEN(x) ((x) & 0x00040000) /* door open (no tape) */ x 155 include/uapi/linux/mtio.h #define GMT_IM_REP_EN(x) ((x) & 0x00010000) /* immediate report mode */ x 156 include/uapi/linux/mtio.h #define GMT_CLN(x) ((x) & 0x00008000) /* cleaning requested */ x 13 include/uapi/linux/net_dropmon.h #define is_drop_point_hw(x) do {\ x 16 include/uapi/linux/net_dropmon.h ____j |= x[____i];\ x 31 include/uapi/linux/netfilter.h #define NF_QUEUE_NR(x) ((((x) << 16) & NF_VERDICT_QMASK) | NF_QUEUE) x 33 include/uapi/linux/netfilter.h #define NF_DROP_ERR(x) (((-x) << 16) | NF_DROP) x 46 include/uapi/linux/netfilter/nfnetlink.h #define NFNL_SUBSYS_ID(x) ((x & 0xff00) >> 8) x 47 include/uapi/linux/netfilter/nfnetlink.h #define NFNL_MSG_TYPE(x) (x & 0x00ff) x 46 include/uapi/linux/netfilter_bridge/ebt_among.h #define ebt_mac_wormhash_size(x) ((x) ? sizeof(struct ebt_mac_wormhash) \ x 47 include/uapi/linux/netfilter_bridge/ebt_among.h + (x)->poolsize * sizeof(struct ebt_mac_wormhash_tuple) : 0) x 58 include/uapi/linux/netfilter_bridge/ebt_among.h #define ebt_among_wh_dst(x) ((x)->wh_dst_ofs ? \ x 59 include/uapi/linux/netfilter_bridge/ebt_among.h (struct ebt_mac_wormhash*)((char*)(x) + (x)->wh_dst_ofs) : NULL) x 60 include/uapi/linux/netfilter_bridge/ebt_among.h #define ebt_among_wh_src(x) ((x)->wh_src_ofs ? \ x 61 include/uapi/linux/netfilter_bridge/ebt_among.h (struct ebt_mac_wormhash*)((char*)(x) + (x)->wh_src_ofs) : NULL) x 14 include/uapi/linux/nvram.h #define NVRAM_OFFSET(x) ((x)-NVRAM_FIRST_BYTE) x 112 include/uapi/linux/omapfb.h __u32 x, y; x 121 include/uapi/linux/omapfb.h __u32 x, y; x 181 include/uapi/linux/omapfb.h __u16 x; x 431 include/uapi/linux/pci_regs.h #define PCI_X_CMD_VERSION(x) (((x) >> 12) & 3) /* Version */ x 759 include/uapi/linux/pci_regs.h #define PCI_ERR_CAP_FEP(x) ((x) & 31) /* First Error Pointer */ x 815 include/uapi/linux/pci_regs.h #define PCI_PWR_DATA_BASE(x) ((x) & 0xff) /* Base Power */ x 816 include/uapi/linux/pci_regs.h #define PCI_PWR_DATA_SCALE(x) (((x) >> 8) & 3) /* Data Scale */ x 817 include/uapi/linux/pci_regs.h #define PCI_PWR_DATA_PM_SUB(x) (((x) >> 10) & 7) /* PM Sub State */ x 818 include/uapi/linux/pci_regs.h #define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */ x 819 include/uapi/linux/pci_regs.h #define PCI_PWR_DATA_TYPE(x) (((x) >> 15) & 7) /* Type */ x 820 include/uapi/linux/pci_regs.h #define PCI_PWR_DATA_RAIL(x) (((x) >> 18) & 7) /* Power Rail */ x 822 include/uapi/linux/pci_regs.h #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ x 827 include/uapi/linux/pci_regs.h #define PCI_VNDR_HEADER_ID(x) ((x) & 0xffff) x 828 include/uapi/linux/pci_regs.h #define PCI_VNDR_HEADER_REV(x) (((x) >> 16) & 0xf) x 829 include/uapi/linux/pci_regs.h #define PCI_VNDR_HEADER_LEN(x) (((x) >> 20) & 0xfff) x 869 include/uapi/linux/pci_regs.h #define PCI_ARI_CAP_NFN(x) (((x) >> 8) & 0xff) /* Next Function Number */ x 873 include/uapi/linux/pci_regs.h #define PCI_ARI_CTRL_FG(x) (((x) >> 4) & 7) /* Function Group */ x 878 include/uapi/linux/pci_regs.h #define PCI_ATS_CAP_QDEP(x) ((x) & 0x1f) /* Invalidate Queue Depth */ x 883 include/uapi/linux/pci_regs.h #define PCI_ATS_CTRL_STU(x) ((x) & 0x1f) /* Smallest Translation Unit */ x 913 include/uapi/linux/pci_regs.h #define PCI_SRIOV_CAP_INTR(x) ((x) >> 21) /* Interrupt Message Number */ x 934 include/uapi/linux/pci_regs.h #define PCI_SRIOV_VFM_BIR(x) ((x) & 7) /* State BIR */ x 935 include/uapi/linux/pci_regs.h #define PCI_SRIOV_VFM_OFFSET(x) ((x) & ~7) /* State Offset */ x 53 include/uapi/linux/ppp-comp.h #define BSD_NBITS(x) ((x) & 0x1F) /* number of bits requested */ x 54 include/uapi/linux/ppp-comp.h #define BSD_VERSION(x) ((x) >> 5) /* version of option format */ x 72 include/uapi/linux/ppp-comp.h #define DEFLATE_SIZE(x) (((x) >> 4) + 8) x 73 include/uapi/linux/ppp-comp.h #define DEFLATE_METHOD(x) ((x) & 0x0F) x 51 include/uapi/linux/raid/md_p.h #define MD_NEW_SIZE_SECTORS(x) ((x & ~(MD_RESERVED_SECTORS - 1)) - MD_RESERVED_SECTORS) x 149 include/uapi/linux/sctp.h #define __SCTP_PR_INDEX(x) ((x >> 4) - 1) x 150 include/uapi/linux/sctp.h #define SCTP_PR_INDEX(x) __SCTP_PR_INDEX(SCTP_PR_SCTP_ ## x) x 152 include/uapi/linux/sctp.h #define SCTP_PR_POLICY(x) ((x) & SCTP_PR_SCTP_MASK) x 153 include/uapi/linux/sctp.h #define SCTP_PR_SET_POLICY(flags, x) \ x 156 include/uapi/linux/sctp.h flags |= x; \ x 159 include/uapi/linux/sctp.h #define SCTP_PR_TTL_ENABLED(x) (SCTP_PR_POLICY(x) == SCTP_PR_SCTP_TTL) x 160 include/uapi/linux/sctp.h #define SCTP_PR_RTX_ENABLED(x) (SCTP_PR_POLICY(x) == SCTP_PR_SCTP_RTX) x 161 include/uapi/linux/sctp.h #define SCTP_PR_PRIO_ENABLED(x) (SCTP_PR_POLICY(x) == SCTP_PR_SCTP_PRIO) x 32 include/uapi/linux/seg6_iptunnel.h #define SEG6_IPTUN_ENCAP_SIZE(x) ((sizeof(*x)) + (((x)->srh->hdrlen + 1) << 3)) x 94 include/uapi/linux/serial_reg.h #define UART_FCR_R_TRIG_BITS(x) \ x 95 include/uapi/linux/serial_reg.h (((x) & UART_FCR_TRIGGER_MASK) >> UART_FCR_R_TRIG_SHIFT) x 115 include/uapi/linux/soundcard.h #define _SIO(x,y) ((int)(SIOC_VOID|(x<<8)|y)) x 116 include/uapi/linux/soundcard.h #define _SIOR(x,y,t) ((int)(SIOC_OUT|((sizeof(t)&SIOCPARM_MASK)<<16)|(x<<8)|y)) x 117 include/uapi/linux/soundcard.h #define _SIOW(x,y,t) ((int)(SIOC_IN|((sizeof(t)&SIOCPARM_MASK)<<16)|(x<<8)|y)) x 119 include/uapi/linux/soundcard.h #define _SIOWR(x,y,t) ((int)(SIOC_INOUT|((sizeof(t)&SIOCPARM_MASK)<<16)|(x<<8)|y)) x 120 include/uapi/linux/soundcard.h #define _SIOC_SIZE(x) ((x>>16)&SIOCPARM_MASK) x 121 include/uapi/linux/soundcard.h #define _SIOC_DIR(x) (x & 0xf0000000) x 14 include/uapi/linux/swab.h #define ___constant_swab16(x) ((__u16)( \ x 15 include/uapi/linux/swab.h (((__u16)(x) & (__u16)0x00ffU) << 8) | \ x 16 include/uapi/linux/swab.h (((__u16)(x) & (__u16)0xff00U) >> 8))) x 18 include/uapi/linux/swab.h #define ___constant_swab32(x) ((__u32)( \ x 19 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \ x 20 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ x 21 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ x 22 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0xff000000UL) >> 24))) x 24 include/uapi/linux/swab.h #define ___constant_swab64(x) ((__u64)( \ x 25 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \ x 26 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \ x 27 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \ x 28 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \ x 29 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \ x 30 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ x 31 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \ x 32 include/uapi/linux/swab.h (((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56))) x 34 include/uapi/linux/swab.h #define ___constant_swahw32(x) ((__u32)( \ x 35 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ x 36 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0xffff0000UL) >> 16))) x 38 include/uapi/linux/swab.h #define ___constant_swahb32(x) ((__u32)( \ x 39 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ x 40 include/uapi/linux/swab.h (((__u32)(x) & (__u32)0xff00ff00UL) >> 8))) x 102 include/uapi/linux/swab.h #define __swab16(x) (__u16)__builtin_bswap16((__u16)(x)) x 104 include/uapi/linux/swab.h #define __swab16(x) \ x 105 include/uapi/linux/swab.h (__builtin_constant_p((__u16)(x)) ? \ x 106 include/uapi/linux/swab.h ___constant_swab16(x) : \ x 107 include/uapi/linux/swab.h __fswab16(x)) x 115 include/uapi/linux/swab.h #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x)) x 117 include/uapi/linux/swab.h #define __swab32(x) \ x 118 include/uapi/linux/swab.h (__builtin_constant_p((__u32)(x)) ? \ x 119 include/uapi/linux/swab.h ___constant_swab32(x) : \ x 120 include/uapi/linux/swab.h __fswab32(x)) x 128 include/uapi/linux/swab.h #define __swab64(x) (__u64)__builtin_bswap64((__u64)(x)) x 130 include/uapi/linux/swab.h #define __swab64(x) \ x 131 include/uapi/linux/swab.h (__builtin_constant_p((__u64)(x)) ? \ x 132 include/uapi/linux/swab.h ___constant_swab64(x) : \ x 133 include/uapi/linux/swab.h __fswab64(x)) x 151 include/uapi/linux/swab.h #define __swahw32(x) \ x 152 include/uapi/linux/swab.h (__builtin_constant_p((__u32)(x)) ? \ x 153 include/uapi/linux/swab.h ___constant_swahw32(x) : \ x 154 include/uapi/linux/swab.h __fswahw32(x)) x 162 include/uapi/linux/swab.h #define __swahb32(x) \ x 163 include/uapi/linux/swab.h (__builtin_constant_p((__u32)(x)) ? \ x 164 include/uapi/linux/swab.h ___constant_swahb32(x) : \ x 165 include/uapi/linux/swab.h __fswahb32(x)) x 114 include/uapi/linux/virtio_gpu.h __le32 x; x 132 include/uapi/linux/virtio_gpu.h __le32 x; x 213 include/uapi/linux/virtio_gpu.h __le32 x, y, z; x 65 include/uapi/sound/emu10k1.h #define FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x0f */ x 66 include/uapi/sound/emu10k1.h #define EXTIN(x) (0x10 + (x)) /* x = 0x00 - 0x0f */ x 67 include/uapi/sound/emu10k1.h #define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f physical outs -> FXWC low 16 bits */ x 68 include/uapi/sound/emu10k1.h #define FXBUS2(x) (0x30 + (x)) /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bits */ x 99 include/uapi/sound/emu10k1.h #define GPR(x) (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */ x 100 include/uapi/sound/emu10k1.h #define ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */ x 101 include/uapi/sound/emu10k1.h #define ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */ x 102 include/uapi/sound/emu10k1.h #define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */ x 103 include/uapi/sound/emu10k1.h #define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */ x 105 include/uapi/sound/emu10k1.h #define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */ x 106 include/uapi/sound/emu10k1.h #define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */ x 107 include/uapi/sound/emu10k1.h #define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */ x 108 include/uapi/sound/emu10k1.h #define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */ x 109 include/uapi/sound/emu10k1.h #define A_ITRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */ x 110 include/uapi/sound/emu10k1.h #define A_ETRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */ x 112 include/uapi/sound/emu10k1.h #define A_FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x3f FX buses */ x 113 include/uapi/sound/emu10k1.h #define A_EXTIN(x) (0x40 + (x)) /* x = 0x00 - 0x0f physical ins */ x 114 include/uapi/sound/emu10k1.h #define A_P16VIN(x) (0x50 + (x)) /* x = 0x00 - 0x0f p16v ins (A2 only) "EMU32 inputs" */ x 115 include/uapi/sound/emu10k1.h #define A_EXTOUT(x) (0x60 + (x)) /* x = 0x00 - 0x1f physical outs -> A_FXWC1 0x79-7f unknown */ x 116 include/uapi/sound/emu10k1.h #define A_FXBUS2(x) (0x80 + (x)) /* x = 0x00 - 0x1f extra outs used for EFX capture -> A_FXWC2 */ x 117 include/uapi/sound/emu10k1.h #define A_EMU32OUTH(x) (0xa0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_10 - _1F" - ??? */ x 118 include/uapi/sound/emu10k1.h #define A_EMU32OUTL(x) (0xb0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_1 - _F" - ??? */ x 119 include/uapi/sound/emu10k1.h #define A3_EMU32IN(x) (0x160 + (x)) /* x = 0x00 - 0x3f "EMU32_IN_00 - _3F" - Only when .device = 0x0008 */ x 120 include/uapi/sound/emu10k1.h #define A3_EMU32OUT(x) (0x1E0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_00 - _3F" - Only when .device = 0x0008 */ x 121 include/uapi/sound/emu10k1.h #define A_GPR(x) (A_FXGPREGBASE + (x)) x 12 include/video/ili9320.h #define ILI9320_REG(x) (x) x 84 include/video/ili9320.h #define ILI9320_ENTRYMODE_ID(x) ((x) << 4) x 92 include/video/ili9320.h #define ILI9320_RESIZING_RSZ(x) ((x) << 0) x 93 include/video/ili9320.h #define ILI9320_RESIZING_RCH(x) ((x) << 4) x 94 include/video/ili9320.h #define ILI9320_RESIZING_RCV(x) ((x) << 8) x 97 include/video/ili9320.h #define ILI9320_DISPLAY1_D(x) ((x) << 0) x 102 include/video/ili9320.h #define ILI9320_DISPLAY1_PTDE(x) ((x) << 12) x 105 include/video/ili9320.h #define ILI9320_DISPLAY2_BP(x) ((x) << 0) x 106 include/video/ili9320.h #define ILI9320_DISPLAY2_FP(x) ((x) << 8) x 119 include/video/ili9320.h #define ILI9320_RGBIF1_ENC_FRAMES(x) (((x) - 1)<< 13) x 129 include/video/ili9320.h #define ILI9320_POWER1_AP(x) ((x) << 4) x 131 include/video/ili9320.h #define ILI9320_POWER1_BT(x) ((x) << 8) x 135 include/video/ili9320.h #define ILI9320_POWER2_VC(x) ((x) << 0) x 136 include/video/ili9320.h #define ILI9320_POWER2_DC0(x) ((x) << 4) x 137 include/video/ili9320.h #define ILI9320_POWER2_DC1(x) ((x) << 8) x 140 include/video/ili9320.h #define ILI9320_POWER3_VRH(x) ((x) << 0) x 145 include/video/ili9320.h #define ILI9320_POWER4_VREOUT(x) ((x) << 8) x 148 include/video/ili9320.h #define ILI9320_DRIVER2_SCNL(x) ((x) << 0) x 149 include/video/ili9320.h #define ILI9320_DRIVER2_NL(x) ((x) << 8) x 158 include/video/ili9320.h #define ILI9320_INTERFACE4_RTNE(x) (x) x 159 include/video/ili9320.h #define ILI9320_INTERFACE4_DIVE(x) ((x) << 8) x 164 include/video/ili9320.h #define ILI9320_SPI_ID(x) ((x) << 2) x 43 include/video/mbxfb.h __u32 x, y; x 78 include/video/neomagic.h # define DBG(x) printk (KERN_DEBUG "neofb: %s\n", (x)); x 80 include/video/neomagic.h # define DBG(x) x 701 include/video/omapfb_dss.h u16 x, u16 y, u16 w, u16 h); x 715 include/video/omapfb_dss.h u16 x, u16 y, u16 w, u16 h); x 230 include/video/pm3fb.h #define PM3VideoOverlayOrigin_XORIGIN(x) (((x) & 0xfff) << 0) x 549 include/video/pm3fb.h #define PM3FBDestReadBufferOffset_XOffset(x) ((x) & 0xffff) x 609 include/video/pm3fb.h #define PM3FBSourceReadBufferOffset_XOffset(x) ((x) & 0xffff) x 638 include/video/pm3fb.h #define PM3FBWriteBufferOffset_XOffset(x) ((x) & 0xffff) x 958 include/video/pm3fb.h #define PM3GlyphPosition_XOffset(x) ((x) & 0xffff) x 964 include/video/pm3fb.h #define PM3RectanglePosition_XOffset(x) ((x) & 0xffff) x 982 include/video/pm3fb.h #define PM3Render2DGlyph_XOffset(x) (((x) & 0x1ff) << 14) x 985 include/video/pm3fb.h #define PM3RenderPatchOffset_XOffset(x) ((x) & 0xffff) x 1015 include/video/pm3fb.h #define PM3FillFBSourceReadBufferOffset_XOffset(x) ((x) & 0xffff) x 1022 include/video/pm3fb.h #define PM3FillGlyphPosition_XOffset(x) ((x) & 0xffff) x 1025 include/video/pm3fb.h #define PM3FillRectanglePosition_XOffset(x) ((x) & 0xffff) x 72 include/video/sstfb.h #define POW2(x) (1ul<<(x)) x 15 include/video/udlfb.h int x, y; x 100 include/video/udlfb.h #define DL_ALIGN_UP(x, a) ALIGN(x, a) x 101 include/video/udlfb.h #define DL_ALIGN_DOWN(x, a) ALIGN_DOWN(x, a) x 27 include/xen/arm/page.h #define XMADDR(x) ((xmaddr_t) { .maddr = (x) }) x 28 include/xen/arm/page.h #define XPADDR(x) ((xpaddr_t) { .paddr = (x) }) x 11 include/xen/hvm.h #define PARAM(x) [HVM_PARAM_##x] = #x x 58 include/xen/hvm.h #define HVM_CALLBACK_VECTOR(x) (((uint64_t)HVM_CALLBACK_VIA_TYPE_VECTOR)<<\ x 59 include/xen/hvm.h HVM_CALLBACK_VIA_TYPE_SHIFT | (x)) x 702 include/xen/interface/io/displif.h uint32_t x; x 46 include/xen/interface/io/fbif.h int32_t x; /* source x */ x 47 include/xen/interface/io/xs_wire.h #define XSD_ERROR(x) { x, #x } x 749 include/xen/interface/xen.h #define __mk_unsigned_long(x) x ## UL x 750 include/xen/interface/xen.h #define mk_unsigned_long(x) __mk_unsigned_long(x) x 778 include/xen/interface/xen.h #define mk_unsigned_long(x) x x 25 include/xen/page.h #define XEN_PFN_DOWN(x) ((x) >> XEN_PAGE_SHIFT) x 26 include/xen/page.h #define XEN_PFN_UP(x) (((x) + XEN_PAGE_SIZE-1) >> XEN_PAGE_SHIFT) x 27 include/xen/page.h #define XEN_PFN_PHYS(x) ((phys_addr_t)(x) << XEN_PAGE_SHIFT) x 322 init/do_mounts_rd.c static void __init error(char *x) x 324 init/do_mounts_rd.c printk(KERN_ERR "%s\n", x); x 38 init/initramfs.c static void __init error(char *x) x 41 init/initramfs.c message = x; x 3157 kernel/bpf/btf.c const struct btf_sec_info *x = a; x 3160 kernel/bpf/btf.c return (int)(x->off - y->off) ? : (int)(x->len - y->len); x 1274 kernel/bpf/core.c #define BPF_INSN_2_TBL(x, y) [BPF_##x | BPF_##y] = true x 1275 kernel/bpf/core.c #define BPF_INSN_3_TBL(x, y, z) [BPF_##x | BPF_##y | BPF_##z] = true x 1304 kernel/bpf/core.c #define BPF_INSN_2_LBL(x, y) [BPF_##x | BPF_##y] = &&x##_##y x 1305 kernel/bpf/core.c #define BPF_INSN_3_LBL(x, y, z) [BPF_##x | BPF_##y | BPF_##z] = &&x##_##y##_##z x 10 kernel/bpf/disasm.c #define __BPF_FUNC_STR_FN(x) [BPF_FUNC_ ## x] = __stringify(bpf_ ## x) x 2278 kernel/cpu.c #define MASK_DECLARE_1(x) [x+1][0] = (1UL << (x)) x 2279 kernel/cpu.c #define MASK_DECLARE_2(x) MASK_DECLARE_1(x), MASK_DECLARE_1(x+1) x 2280 kernel/cpu.c #define MASK_DECLARE_4(x) MASK_DECLARE_2(x), MASK_DECLARE_2(x+2) x 2281 kernel/cpu.c #define MASK_DECLARE_8(x) MASK_DECLARE_4(x), MASK_DECLARE_4(x+4) x 928 kernel/debug/debug_core.c dbg_notify_reboot(struct notifier_block *this, unsigned long code, void *x) x 2549 kernel/debug/kdb/kdb_main.c #define K(x) ((x) << (PAGE_SHIFT - 10)) x 97 kernel/debug/kdb/kdb_private.h #define kdb_getarea(x, addr) kdb_getarea_size(&(x), addr, sizeof((x))) x 98 kernel/debug/kdb/kdb_private.h #define kdb_putarea(addr, x) kdb_putarea_size(addr, &(x), sizeof((x))) x 128 kernel/fork.c #define NAMED_ARRAY_INDEX(x) [x] = __stringify(x) x 661 kernel/fork.c long x = atomic_long_read(&mm->rss_stat.count[i]); x 663 kernel/fork.c if (unlikely(x)) x 665 kernel/fork.c mm, resident_page_types[i], x); x 142 kernel/kexec_core.c #define PAGE_COUNT(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT) x 1567 kernel/power/snapshot.c static unsigned long __fraction(u64 x, u64 multiplier, u64 base) x 1569 kernel/power/snapshot.c x *= multiplier; x 1570 kernel/power/snapshot.c do_div(x, base); x 1571 kernel/power/snapshot.c return (unsigned long)x; x 257 kernel/rcu/rcu.h #define TPS(x) tracepoint_string(x) x 1493 kernel/resource.c int x = reserved; x 1500 kernel/resource.c if (x < MAXRESERVE) { x 1501 kernel/resource.c struct resource *res = reserve + x; x 1521 kernel/resource.c reserved = x+1; x 249 kernel/sched/clock.c static inline u64 wrap_min(u64 x, u64 y) x 251 kernel/sched/clock.c return (s64)(x - y) < 0 ? x : y; x 254 kernel/sched/clock.c static inline u64 wrap_max(u64 x, u64 y) x 256 kernel/sched/clock.c return (s64)(x - y) > 0 ? x : y; x 28 kernel/sched/completion.c void complete(struct completion *x) x 32 kernel/sched/completion.c spin_lock_irqsave(&x->wait.lock, flags); x 34 kernel/sched/completion.c if (x->done != UINT_MAX) x 35 kernel/sched/completion.c x->done++; x 36 kernel/sched/completion.c __wake_up_locked(&x->wait, TASK_NORMAL, 1); x 37 kernel/sched/completion.c spin_unlock_irqrestore(&x->wait.lock, flags); x 57 kernel/sched/completion.c void complete_all(struct completion *x) x 61 kernel/sched/completion.c spin_lock_irqsave(&x->wait.lock, flags); x 62 kernel/sched/completion.c x->done = UINT_MAX; x 63 kernel/sched/completion.c __wake_up_locked(&x->wait, TASK_NORMAL, 0); x 64 kernel/sched/completion.c spin_unlock_irqrestore(&x->wait.lock, flags); x 69 kernel/sched/completion.c do_wait_for_common(struct completion *x, x 72 kernel/sched/completion.c if (!x->done) { x 75 kernel/sched/completion.c __add_wait_queue_entry_tail_exclusive(&x->wait, &wait); x 82 kernel/sched/completion.c spin_unlock_irq(&x->wait.lock); x 84 kernel/sched/completion.c spin_lock_irq(&x->wait.lock); x 85 kernel/sched/completion.c } while (!x->done && timeout); x 86 kernel/sched/completion.c __remove_wait_queue(&x->wait, &wait); x 87 kernel/sched/completion.c if (!x->done) x 90 kernel/sched/completion.c if (x->done != UINT_MAX) x 91 kernel/sched/completion.c x->done--; x 96 kernel/sched/completion.c __wait_for_common(struct completion *x, x 101 kernel/sched/completion.c complete_acquire(x); x 103 kernel/sched/completion.c spin_lock_irq(&x->wait.lock); x 104 kernel/sched/completion.c timeout = do_wait_for_common(x, action, timeout, state); x 105 kernel/sched/completion.c spin_unlock_irq(&x->wait.lock); x 107 kernel/sched/completion.c complete_release(x); x 113 kernel/sched/completion.c wait_for_common(struct completion *x, long timeout, int state) x 115 kernel/sched/completion.c return __wait_for_common(x, schedule_timeout, timeout, state); x 119 kernel/sched/completion.c wait_for_common_io(struct completion *x, long timeout, int state) x 121 kernel/sched/completion.c return __wait_for_common(x, io_schedule_timeout, timeout, state); x 134 kernel/sched/completion.c void __sched wait_for_completion(struct completion *x) x 136 kernel/sched/completion.c wait_for_common(x, MAX_SCHEDULE_TIMEOUT, TASK_UNINTERRUPTIBLE); x 153 kernel/sched/completion.c wait_for_completion_timeout(struct completion *x, unsigned long timeout) x 155 kernel/sched/completion.c return wait_for_common(x, timeout, TASK_UNINTERRUPTIBLE); x 167 kernel/sched/completion.c void __sched wait_for_completion_io(struct completion *x) x 169 kernel/sched/completion.c wait_for_common_io(x, MAX_SCHEDULE_TIMEOUT, TASK_UNINTERRUPTIBLE); x 187 kernel/sched/completion.c wait_for_completion_io_timeout(struct completion *x, unsigned long timeout) x 189 kernel/sched/completion.c return wait_for_common_io(x, timeout, TASK_UNINTERRUPTIBLE); x 202 kernel/sched/completion.c int __sched wait_for_completion_interruptible(struct completion *x) x 204 kernel/sched/completion.c long t = wait_for_common(x, MAX_SCHEDULE_TIMEOUT, TASK_INTERRUPTIBLE); x 223 kernel/sched/completion.c wait_for_completion_interruptible_timeout(struct completion *x, x 226 kernel/sched/completion.c return wait_for_common(x, timeout, TASK_INTERRUPTIBLE); x 239 kernel/sched/completion.c int __sched wait_for_completion_killable(struct completion *x) x 241 kernel/sched/completion.c long t = wait_for_common(x, MAX_SCHEDULE_TIMEOUT, TASK_KILLABLE); x 261 kernel/sched/completion.c wait_for_completion_killable_timeout(struct completion *x, x 264 kernel/sched/completion.c return wait_for_common(x, timeout, TASK_KILLABLE); x 280 kernel/sched/completion.c bool try_wait_for_completion(struct completion *x) x 291 kernel/sched/completion.c if (!READ_ONCE(x->done)) x 294 kernel/sched/completion.c spin_lock_irqsave(&x->wait.lock, flags); x 295 kernel/sched/completion.c if (!x->done) x 297 kernel/sched/completion.c else if (x->done != UINT_MAX) x 298 kernel/sched/completion.c x->done--; x 299 kernel/sched/completion.c spin_unlock_irqrestore(&x->wait.lock, flags); x 313 kernel/sched/completion.c bool completion_done(struct completion *x) x 317 kernel/sched/completion.c if (!READ_ONCE(x->done)) x 325 kernel/sched/completion.c spin_lock_irqsave(&x->wait.lock, flags); x 326 kernel/sched/completion.c spin_unlock_irqrestore(&x->wait.lock, flags); x 17 kernel/sched/debug.c #define SEQ_printf(m, x...) \ x 20 kernel/sched/debug.c seq_printf(m, x); \ x 22 kernel/sched/debug.c pr_cont(x); \ x 48 kernel/sched/debug.c #define SPLIT_NS(x) nsec_high(x), nsec_low(x) x 571 kernel/sched/debug.c #define P(x) \ x 572 kernel/sched/debug.c SEQ_printf(m, " .%-30s: %Ld\n", #x, (long long)(rt_rq->x)) x 573 kernel/sched/debug.c #define PU(x) \ x 574 kernel/sched/debug.c SEQ_printf(m, " .%-30s: %lu\n", #x, (unsigned long)(rt_rq->x)) x 575 kernel/sched/debug.c #define PN(x) \ x 576 kernel/sched/debug.c SEQ_printf(m, " .%-30s: %Ld.%06ld\n", #x, SPLIT_NS(rt_rq->x)) x 598 kernel/sched/debug.c #define PU(x) \ x 599 kernel/sched/debug.c SEQ_printf(m, " .%-30s: %lu\n", #x, (unsigned long)(dl_rq->x)) x 630 kernel/sched/debug.c #define P(x) \ x 632 kernel/sched/debug.c if (sizeof(rq->x) == 4) \ x 633 kernel/sched/debug.c SEQ_printf(m, " .%-30s: %ld\n", #x, (long)(rq->x)); \ x 635 kernel/sched/debug.c SEQ_printf(m, " .%-30s: %Ld\n", #x, (long long)(rq->x));\ x 638 kernel/sched/debug.c #define PN(x) \ x 639 kernel/sched/debug.c SEQ_printf(m, " .%-30s: %Ld.%06ld\n", #x, SPLIT_NS(rq->x)) x 701 kernel/sched/debug.c #define P(x) \ x 702 kernel/sched/debug.c SEQ_printf(m, "%-40s: %Ld\n", #x, (long long)(x)) x 703 kernel/sched/debug.c #define PN(x) \ x 704 kernel/sched/debug.c SEQ_printf(m, "%-40s: %Ld.%06ld\n", #x, SPLIT_NS(x)) x 718 kernel/sched/debug.c #define P(x) \ x 719 kernel/sched/debug.c SEQ_printf(m, " .%-40s: %Ld\n", #x, (long long)(x)) x 720 kernel/sched/debug.c #define PN(x) \ x 721 kernel/sched/debug.c SEQ_printf(m, " .%-40s: %Ld.%06ld\n", #x, SPLIT_NS(x)) x 110 kernel/sched/loadavg.c fixed_power_int(unsigned long x, unsigned int frac_bits, unsigned int n) x 117 kernel/sched/loadavg.c result *= x; x 124 kernel/sched/loadavg.c x *= x; x 125 kernel/sched/loadavg.c x += 1UL << (frac_bits - 1); x 126 kernel/sched/loadavg.c x >>= frac_bits; x 79 kernel/sched/sched.h # define SCHED_WARN_ON(x) WARN_ONCE(x, #x) x 81 kernel/sched/sched.h # define SCHED_WARN_ON(x) ({ (void)(x), 0; }) x 1587 kernel/sched/sched.h #define sched_feat(x) (static_branch_##x(&sched_feat_keys[__SCHED_FEAT_##x])) x 1603 kernel/sched/sched.h #define sched_feat(x) !!(sysctl_sched_features & (1UL << __SCHED_FEAT_##x)) x 210 kernel/signal.c unsigned long i, *s, *m, x; x 220 kernel/signal.c x = *s &~ *m; x 221 kernel/signal.c if (x) { x 222 kernel/signal.c if (x & SYNCHRONOUS_MASK) x 223 kernel/signal.c x &= SYNCHRONOUS_MASK; x 224 kernel/signal.c sig = ffz(~x) + 1; x 231 kernel/signal.c x = *++s &~ *++m; x 232 kernel/signal.c if (!x) x 234 kernel/signal.c sig = ffz(~x) + i*_NSIG_BPW + 1; x 240 kernel/signal.c x = s[1] &~ m[1]; x 241 kernel/signal.c if (!x) x 243 kernel/signal.c sig = ffz(~x) + _NSIG_BPW + 1; x 970 kernel/sys.c static compat_clock_t clock_t_to_compat_clock_t(clock_t x) x 972 kernel/sys.c return compat_jiffies_to_clock_t(clock_t_to_jiffies(x)); x 1451 kernel/sys.c struct rlimit x; x 1457 kernel/sys.c x = current->signal->rlim[resource]; x 1459 kernel/sys.c if (x.rlim_cur > 0x7FFFFFFF) x 1460 kernel/sys.c x.rlim_cur = 0x7FFFFFFF; x 1461 kernel/sys.c if (x.rlim_max > 0x7FFFFFFF) x 1462 kernel/sys.c x.rlim_max = 0x7FFFFFFF; x 1463 kernel/sys.c return copy_to_user(rlim, &x, sizeof(x)) ? -EFAULT : 0; x 711 kernel/time/time.c clock_t jiffies_to_clock_t(unsigned long x) x 715 kernel/time/time.c return x * (USER_HZ / HZ); x 717 kernel/time/time.c return x / (HZ / USER_HZ); x 720 kernel/time/time.c return div_u64((u64)x * TICK_NSEC, NSEC_PER_SEC / USER_HZ); x 725 kernel/time/time.c unsigned long clock_t_to_jiffies(unsigned long x) x 728 kernel/time/time.c if (x >= ~0UL / (HZ / USER_HZ)) x 730 kernel/time/time.c return x * (HZ / USER_HZ); x 733 kernel/time/time.c if (x >= ~0UL / HZ * USER_HZ) x 737 kernel/time/time.c return div_u64((u64)x * HZ, USER_HZ); x 742 kernel/time/time.c u64 jiffies_64_to_clock_t(u64 x) x 746 kernel/time/time.c x = div_u64(x * USER_HZ, HZ); x 748 kernel/time/time.c x = div_u64(x, HZ / USER_HZ); x 758 kernel/time/time.c x = div_u64(x * TICK_NSEC, (NSEC_PER_SEC / USER_HZ)); x 760 kernel/time/time.c return x; x 764 kernel/time/time.c u64 nsec_to_clock_t(u64 x) x 767 kernel/time/time.c return div_u64(x, NSEC_PER_SEC / USER_HZ); x 769 kernel/time/time.c return div_u64(x * USER_HZ / 512, NSEC_PER_SEC / 512); x 776 kernel/time/time.c return div_u64(x * 9, (9ull * NSEC_PER_SEC + (USER_HZ / 2)) / USER_HZ); x 13 kernel/time/timekeeping_internal.h #define tk_debug_account_sleep_time(x) x 140 kernel/time/timer_list.c #define P(x) \ x 141 kernel/time/timer_list.c SEQ_printf(m, " .%-15s: %Lu\n", #x, \ x 142 kernel/time/timer_list.c (unsigned long long)(cpu_base->x)) x 143 kernel/time/timer_list.c #define P_ns(x) \ x 144 kernel/time/timer_list.c SEQ_printf(m, " .%-15s: %Lu nsecs\n", #x, \ x 145 kernel/time/timer_list.c (unsigned long long)(ktime_to_ns(cpu_base->x))) x 159 kernel/time/timer_list.c # define P(x) \ x 160 kernel/time/timer_list.c SEQ_printf(m, " .%-15s: %Lu\n", #x, \ x 161 kernel/time/timer_list.c (unsigned long long)(ts->x)) x 162 kernel/time/timer_list.c # define P_ns(x) \ x 163 kernel/time/timer_list.c SEQ_printf(m, " .%-15s: %Lu nsecs\n", #x, \ x 164 kernel/time/timer_list.c (unsigned long long)(ktime_to_ns(ts->x))) x 1362 kernel/trace/bpf_trace.c #define BPF_TRACE_DEFN_x(x) \ x 1363 kernel/trace/bpf_trace.c void bpf_trace_run##x(struct bpf_prog *prog, \ x 1364 kernel/trace/bpf_trace.c REPEAT(x, SARG, __DL_COM, __SEQ_0_11)) \ x 1366 kernel/trace/bpf_trace.c u64 args[x]; \ x 1367 kernel/trace/bpf_trace.c REPEAT(x, COPY, __DL_SEM, __SEQ_0_11); \ x 1370 kernel/trace/bpf_trace.c EXPORT_SYMBOL_GPL(bpf_trace_run##x) x 135 kernel/trace/trace_hwlat.c #define time_to_us(x) div_u64(x, 1000) x 35 kernel/trace/trace_output.h #define SEQ_PUT_FIELD(s, x) \ x 36 kernel/trace/trace_output.h trace_seq_putmem(s, &(x), sizeof(x)) x 38 kernel/trace/trace_output.h #define SEQ_PUT_HEX_FIELD(s, x) \ x 39 kernel/trace/trace_output.h trace_seq_putmem_hex(s, &(x), sizeof(x)) x 171 kernel/trace/trace_probe.h #define __DEFAULT_FETCH_TYPE(t) x##t x 1056 kernel/trace/trace_selftest.c struct wakeup_test_data *x = data; x 1061 kernel/trace/trace_selftest.c complete(&x->is_ready); x 1065 kernel/trace/trace_selftest.c while (!x->go) { x 1070 kernel/trace/trace_selftest.c complete(&x->is_ready); x 160 kernel/trace/trace_stack.c int i, x; x 211 kernel/trace/trace_stack.c x = 0; x 226 kernel/trace/trace_stack.c stack_trace_index[x] = this_size; x 235 kernel/trace/trace_stack.c stack_dump_trace[x] = stack_dump_trace[i++]; x 236 kernel/trace/trace_stack.c this_size = stack_trace_index[x++] = x 267 kernel/trace/trace_stack.c if (x > 1) { x 269 kernel/trace/trace_stack.c sizeof(stack_trace_index[0]) * (x - 1)); x 270 kernel/trace/trace_stack.c x--; x 274 kernel/trace/trace_stack.c stack_trace_nr_entries = x; x 731 lib/assoc_array.c int x = ops->diff_objects(assoc_array_ptr_to_leaf(node->slots[i]), x 733 lib/assoc_array.c if (x < diff) { x 734 lib/assoc_array.c BUG_ON(x < 0); x 735 lib/assoc_array.c diff = x; x 291 lib/bch.c static inline int parity(unsigned int x) x 297 lib/bch.c x ^= x >> 1; x 298 lib/bch.c x ^= x >> 2; x 299 lib/bch.c x = (x & 0x11111111U) * 0x11111111U; x 300 lib/bch.c return (x >> 28) & 1; x 334 lib/bch.c static inline int a_log(struct bch_control *bch, unsigned int x) x 336 lib/bch.c return bch->a_log_tab[x]; x 339 lib/bch.c static inline int a_ilog(struct bch_control *bch, unsigned int x) x 341 lib/bch.c return mod_s(bch, GF_N(bch)-bch->a_log_tab[x]); x 1063 lib/bch.c unsigned int i, x = 1; x 1071 lib/bch.c bch->a_pow_tab[i] = x; x 1072 lib/bch.c bch->a_log_tab[x] = i; x 1073 lib/bch.c if (i && (x == 1)) x 1076 lib/bch.c x <<= 1; x 1077 lib/bch.c if (x & k) x 1078 lib/bch.c x ^= poly; x 1127 lib/bch.c unsigned int sum, x, y, remaining, ak = 0, xi[BCH_MAX_M]; x 1143 lib/bch.c for (x = 0; (x <= GF_N(bch)) && remaining; x++) { x 1144 lib/bch.c y = gf_sqr(bch, x)^x; x 1148 lib/bch.c bch->xi_tab[r] = x; x 1151 lib/bch.c dbg("x%d = %x\n", r, x); x 15 lib/chacha.c static void chacha_permute(u32 *x, int nrounds) x 23 lib/chacha.c x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 16); x 24 lib/chacha.c x[1] += x[5]; x[13] = rol32(x[13] ^ x[1], 16); x 25 lib/chacha.c x[2] += x[6]; x[14] = rol32(x[14] ^ x[2], 16); x 26 lib/chacha.c x[3] += x[7]; x[15] = rol32(x[15] ^ x[3], 16); x 28 lib/chacha.c x[8] += x[12]; x[4] = rol32(x[4] ^ x[8], 12); x 29 lib/chacha.c x[9] += x[13]; x[5] = rol32(x[5] ^ x[9], 12); x 30 lib/chacha.c x[10] += x[14]; x[6] = rol32(x[6] ^ x[10], 12); x 31 lib/chacha.c x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 12); x 33 lib/chacha.c x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 8); x 34 lib/chacha.c x[1] += x[5]; x[13] = rol32(x[13] ^ x[1], 8); x 35 lib/chacha.c x[2] += x[6]; x[14] = rol32(x[14] ^ x[2], 8); x 36 lib/chacha.c x[3] += x[7]; x[15] = rol32(x[15] ^ x[3], 8); x 38 lib/chacha.c x[8] += x[12]; x[4] = rol32(x[4] ^ x[8], 7); x 39 lib/chacha.c x[9] += x[13]; x[5] = rol32(x[5] ^ x[9], 7); x 40 lib/chacha.c x[10] += x[14]; x[6] = rol32(x[6] ^ x[10], 7); x 41 lib/chacha.c x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 7); x 43 lib/chacha.c x[0] += x[5]; x[15] = rol32(x[15] ^ x[0], 16); x 44 lib/chacha.c x[1] += x[6]; x[12] = rol32(x[12] ^ x[1], 16); x 45 lib/chacha.c x[2] += x[7]; x[13] = rol32(x[13] ^ x[2], 16); x 46 lib/chacha.c x[3] += x[4]; x[14] = rol32(x[14] ^ x[3], 16); x 48 lib/chacha.c x[10] += x[15]; x[5] = rol32(x[5] ^ x[10], 12); x 49 lib/chacha.c x[11] += x[12]; x[6] = rol32(x[6] ^ x[11], 12); x 50 lib/chacha.c x[8] += x[13]; x[7] = rol32(x[7] ^ x[8], 12); x 51 lib/chacha.c x[9] += x[14]; x[4] = rol32(x[4] ^ x[9], 12); x 53 lib/chacha.c x[0] += x[5]; x[15] = rol32(x[15] ^ x[0], 8); x 54 lib/chacha.c x[1] += x[6]; x[12] = rol32(x[12] ^ x[1], 8); x 55 lib/chacha.c x[2] += x[7]; x[13] = rol32(x[13] ^ x[2], 8); x 56 lib/chacha.c x[3] += x[4]; x[14] = rol32(x[14] ^ x[3], 8); x 58 lib/chacha.c x[10] += x[15]; x[5] = rol32(x[5] ^ x[10], 7); x 59 lib/chacha.c x[11] += x[12]; x[6] = rol32(x[6] ^ x[11], 7); x 60 lib/chacha.c x[8] += x[13]; x[7] = rol32(x[7] ^ x[8], 7); x 61 lib/chacha.c x[9] += x[14]; x[4] = rol32(x[4] ^ x[9], 7); x 77 lib/chacha.c u32 x[16]; x 80 lib/chacha.c memcpy(x, state, 64); x 82 lib/chacha.c chacha_permute(x, nrounds); x 84 lib/chacha.c for (i = 0; i < ARRAY_SIZE(x); i++) x 85 lib/chacha.c put_unaligned_le32(x[i] + state[i], &stream[i * sizeof(u32)]); x 104 lib/chacha.c u32 x[16]; x 106 lib/chacha.c memcpy(x, in, 64); x 108 lib/chacha.c chacha_permute(x, nrounds); x 110 lib/chacha.c memcpy(&out[0], &x[0], 16); x 111 lib/chacha.c memcpy(&out[4], &x[12], 16); x 37 lib/checksum.c static inline unsigned short from32to16(unsigned int x) x 40 lib/checksum.c x = (x & 0xffff) + (x >> 16); x 42 lib/checksum.c x = (x & 0xffff) + (x >> 16); x 43 lib/checksum.c return x; x 180 lib/checksum.c static inline u32 from64to32(u64 x) x 183 lib/checksum.c x = (x & 0xffffffff) + (x >> 32); x 185 lib/checksum.c x = (x & 0xffffffff) + (x >> 32); x 186 lib/checksum.c return (u32)x; x 25 lib/cmdline.c int x, inc_counter, upper_range; x 30 lib/cmdline.c for (x = *pint; n && x < upper_range; x++, n--) x 31 lib/cmdline.c *pint++ = x; x 37 lib/crc32.c # define tole(x) ((__force u32) cpu_to_le32(x)) x 39 lib/crc32.c # define tole(x) (x) x 43 lib/crc32.c # define tobe(x) ((__force u32) cpu_to_be32(x)) x 45 lib/crc32.c # define tobe(x) (x) x 61 lib/crc32.c # define DO_CRC(x) crc = t0[(crc ^ (x)) & 255] ^ (crc >> 8) x 67 lib/crc32.c # define DO_CRC(x) crc = t0[((crc >> 24) ^ (x)) & 255] ^ (crc << 8) x 217 lib/crc32.c static u32 __attribute_const__ gf2_multiply(u32 x, u32 y, u32 modulus) x 219 lib/crc32.c u32 product = x & 1 ? y : 0; x 224 lib/crc32.c x >>= 1; x 225 lib/crc32.c product ^= x & 1 ? y : 0; x 25 lib/crc4.c uint8_t crc4(uint8_t c, uint64_t x, int bits) x 30 lib/crc4.c x &= (1ull << bits) - 1; x 37 lib/crc4.c c = crc4_tab[c ^ ((x >> i) & 0xf)]; x 93 lib/crypto/aes.c u32 x = w & 0x7f7f7f7f; x 97 lib/crypto/aes.c return (x << 1) ^ (y >> 7) * 0x1b; x 102 lib/crypto/aes.c u32 x = w & 0x3f3f3f3f; x 107 lib/crypto/aes.c return (x << 2) ^ (y >> 7) * 0x36 ^ (z >> 6) * 0x1b; x 110 lib/crypto/aes.c static u32 mix_columns(u32 x) x 120 lib/crypto/aes.c u32 y = mul_by_x(x) ^ ror32(x, 16); x 122 lib/crypto/aes.c return y ^ ror32(x ^ y, 8); x 125 lib/crypto/aes.c static u32 inv_mix_columns(u32 x) x 142 lib/crypto/aes.c u32 y = mul_by_x2(x); x 144 lib/crypto/aes.c return mix_columns(x ^ y ^ ror32(y, 16)); x 17 lib/crypto/arc4.c ctx->x = 1; x 40 lib/crypto/arc4.c u32 x, y, a, b; x 46 lib/crypto/arc4.c x = ctx->x; x 49 lib/crypto/arc4.c a = S[x]; x 56 lib/crypto/arc4.c S[x] = b; x 57 lib/crypto/arc4.c x = (x + 1) & 0xff; x 58 lib/crypto/arc4.c ta = S[x]; x 69 lib/crypto/arc4.c ctx->x = x; x 25 lib/crypto/des.c #define ROL(x, r) ((x) = rol32((x), (r))) x 26 lib/crypto/des.c #define ROR(x, r) ((x) = ror32((x), (r))) x 604 lib/crypto/des.c #define T1(x) pt[2 * (x) + 0] x 605 lib/crypto/des.c #define T2(x) pt[2 * (x) + 1] x 606 lib/crypto/des.c #define T3(x) pt[2 * (x) + 2] x 607 lib/crypto/des.c #define T4(x) pt[2 * (x) + 3] x 21 lib/crypto/sha256.c static inline u32 Ch(u32 x, u32 y, u32 z) x 23 lib/crypto/sha256.c return z ^ (x & (y ^ z)); x 26 lib/crypto/sha256.c static inline u32 Maj(u32 x, u32 y, u32 z) x 28 lib/crypto/sha256.c return (x & y) | (z & (x | y)); x 31 lib/crypto/sha256.c #define e0(x) (ror32(x, 2) ^ ror32(x, 13) ^ ror32(x, 22)) x 32 lib/crypto/sha256.c #define e1(x) (ror32(x, 6) ^ ror32(x, 11) ^ ror32(x, 25)) x 33 lib/crypto/sha256.c #define s0(x) (ror32(x, 7) ^ ror32(x, 18) ^ (x >> 3)) x 34 lib/crypto/sha256.c #define s1(x) (ror32(x, 17) ^ ror32(x, 19) ^ (x >> 10)) x 684 lib/decompress_bunzip2.c void(*error)(char *x)) x 752 lib/decompress_bunzip2.c void (*error)(char *x)) x 43 lib/decompress_inflate.c void(*error)(char *x)) { x 192 lib/decompress_inflate.c void (*error)(char *x)) x 202 lib/decompress_inflate.c void (*error)(char *x)) x 35 lib/decompress_unlz4.c void (*error) (char *x)) x 204 lib/decompress_unlz4.c void (*error)(char *x) x 52 lib/decompress_unlzma.c #define ENDIAN_CONVERT(x) \ x 53 lib/decompress_unlzma.c x = (typeof(x))read_int((unsigned char *)&x, sizeof(x)) x 542 lib/decompress_unlzma.c void(*error)(char *x) x 675 lib/decompress_unlzma.c void (*error)(char *x)) x 102 lib/decompress_unlzo.c void (*error) (char *x)) x 283 lib/decompress_unlzo.c void (*error)(char *x)) x 179 lib/decompress_unxz.c const uint8_t *x = a; x 184 lib/decompress_unxz.c if (x[i] != y[i]) x 255 lib/decompress_unxz.c void (*error)(char *x)) x 403 lib/decompress_unxz.c void (*error)(char *x)) x 66 lib/earlycpio.c unsigned char c, x; x 88 lib/earlycpio.c x = c - '0'; x 89 lib/earlycpio.c if (x < 10) { x 90 lib/earlycpio.c v += x; x 94 lib/earlycpio.c x = (c | 0x20) - 'a'; x 95 lib/earlycpio.c if (x < 6) { x 96 lib/earlycpio.c v += x + 10; x 16 lib/extable.c #define ex_to_insn(x) ((x)->insn) x 18 lib/extable.c static inline unsigned long ex_to_insn(const struct exception_table_entry *x) x 20 lib/extable.c return (unsigned long)&x->insn + x->insn; x 30 lib/extable.c struct exception_table_entry *x = a, *y = b, tmp; x 33 lib/extable.c tmp = *x; x 34 lib/extable.c x->insn = y->insn + delta; x 38 lib/extable.c swap_ex_entry_fixup(x, y, tmp, delta); x 40 lib/extable.c x->fixup = y->fixup + delta; x 54 lib/extable.c const struct exception_table_entry *x = a, *y = b; x 57 lib/extable.c if (ex_to_insn(x) > ex_to_insn(y)) x 59 lib/extable.c if (ex_to_insn(x) < ex_to_insn(y)) x 2 lib/inflate.c #define DEBG(x) x 3 lib/inflate.c #define DEBG1(x) x 356 lib/inflate.c unsigned x[BMAX+1]; /* bit offsets, then code stack */ x 358 lib/inflate.c unsigned *c, *v, *x; x 370 lib/inflate.c x = stk->x; x 425 lib/inflate.c x[1] = j = 0; x 426 lib/inflate.c p = c + 1; xp = x + 2; x 437 lib/inflate.c v[x[j]++] = i; x 439 lib/inflate.c n = x[g]; /* set n to length of v */ x 444 lib/inflate.c x[0] = i = 0; /* first Huffman code is zero */ x 506 lib/inflate.c x[h] = i; /* save pattern for backing up */ x 545 lib/inflate.c while ((i & ((1 << w) - 1)) != x[h]) x 212 lib/locking-selftest.c #define L(x) raw_spin_lock(&lock_##x) x 213 lib/locking-selftest.c #define U(x) raw_spin_unlock(&lock_##x) x 214 lib/locking-selftest.c #define LU(x) L(x); U(x) x 215 lib/locking-selftest.c #define SI(x) raw_spin_lock_init(&lock_##x) x 217 lib/locking-selftest.c #define WL(x) write_lock(&rwlock_##x) x 218 lib/locking-selftest.c #define WU(x) write_unlock(&rwlock_##x) x 219 lib/locking-selftest.c #define WLU(x) WL(x); WU(x) x 221 lib/locking-selftest.c #define RL(x) read_lock(&rwlock_##x) x 222 lib/locking-selftest.c #define RU(x) read_unlock(&rwlock_##x) x 223 lib/locking-selftest.c #define RLU(x) RL(x); RU(x) x 224 lib/locking-selftest.c #define RWI(x) rwlock_init(&rwlock_##x) x 226 lib/locking-selftest.c #define ML(x) mutex_lock(&mutex_##x) x 227 lib/locking-selftest.c #define MU(x) mutex_unlock(&mutex_##x) x 228 lib/locking-selftest.c #define MI(x) mutex_init(&mutex_##x) x 230 lib/locking-selftest.c #define RTL(x) rt_mutex_lock(&rtmutex_##x) x 231 lib/locking-selftest.c #define RTU(x) rt_mutex_unlock(&rtmutex_##x) x 232 lib/locking-selftest.c #define RTI(x) rt_mutex_init(&rtmutex_##x) x 234 lib/locking-selftest.c #define WSL(x) down_write(&rwsem_##x) x 235 lib/locking-selftest.c #define WSU(x) up_write(&rwsem_##x) x 237 lib/locking-selftest.c #define RSL(x) down_read(&rwsem_##x) x 238 lib/locking-selftest.c #define RSU(x) up_read(&rwsem_##x) x 239 lib/locking-selftest.c #define RWSI(x) init_rwsem(&rwsem_##x) x 242 lib/locking-selftest.c #define WWAI(x) ww_acquire_init(x, &ww_lockdep) x 244 lib/locking-selftest.c #define WWAI(x) do { ww_acquire_init(x, &ww_lockdep); (x)->deadlock_inject_countdown = ~0U; } while (0) x 246 lib/locking-selftest.c #define WWAD(x) ww_acquire_done(x) x 247 lib/locking-selftest.c #define WWAF(x) ww_acquire_fini(x) x 249 lib/locking-selftest.c #define WWL(x, c) ww_mutex_lock(x, c) x 250 lib/locking-selftest.c #define WWT(x) ww_mutex_trylock(x) x 251 lib/locking-selftest.c #define WWL1(x) ww_mutex_lock(x, NULL) x 252 lib/locking-selftest.c #define WWU(x) ww_mutex_unlock(x) x 255 lib/locking-selftest.c #define LOCK_UNLOCK_2(x,y) LOCK(x); LOCK(y); UNLOCK(y); UNLOCK(x) x 1066 lib/locking-selftest.c # define I_SPINLOCK(x) lockdep_reset_lock(&lock_##x.dep_map) x 1067 lib/locking-selftest.c # define I_RWLOCK(x) lockdep_reset_lock(&rwlock_##x.dep_map) x 1068 lib/locking-selftest.c # define I_MUTEX(x) lockdep_reset_lock(&mutex_##x.dep_map) x 1069 lib/locking-selftest.c # define I_RWSEM(x) lockdep_reset_lock(&rwsem_##x.dep_map) x 1070 lib/locking-selftest.c # define I_WW(x) lockdep_reset_lock(&x.dep_map) x 1072 lib/locking-selftest.c # define I_RTMUTEX(x) lockdep_reset_lock(&rtmutex_##x.dep_map) x 1075 lib/locking-selftest.c # define I_SPINLOCK(x) x 1076 lib/locking-selftest.c # define I_RWLOCK(x) x 1077 lib/locking-selftest.c # define I_MUTEX(x) x 1078 lib/locking-selftest.c # define I_RWSEM(x) x 1079 lib/locking-selftest.c # define I_WW(x) x 1083 lib/locking-selftest.c # define I_RTMUTEX(x) x 1087 lib/locking-selftest.c #define I2_RTMUTEX(x) rt_mutex_init(&rtmutex_##x) x 1089 lib/locking-selftest.c #define I2_RTMUTEX(x) x 1092 lib/locking-selftest.c #define I1(x) \ x 1094 lib/locking-selftest.c I_SPINLOCK(x); \ x 1095 lib/locking-selftest.c I_RWLOCK(x); \ x 1096 lib/locking-selftest.c I_MUTEX(x); \ x 1097 lib/locking-selftest.c I_RWSEM(x); \ x 1098 lib/locking-selftest.c I_RTMUTEX(x); \ x 1101 lib/locking-selftest.c #define I2(x) \ x 1103 lib/locking-selftest.c raw_spin_lock_init(&lock_##x); \ x 1104 lib/locking-selftest.c rwlock_init(&rwlock_##x); \ x 1105 lib/locking-selftest.c mutex_init(&mutex_##x); \ x 1106 lib/locking-selftest.c init_rwsem(&rwsem_##x); \ x 1107 lib/locking-selftest.c I2_RTMUTEX(x); \ x 34 lib/lru_cache.c #define RETURN(x...) do { \ x 36 lib/lru_cache.c return x ; } while (0) x 23 lib/lzo/lzo1x_decompress_safe.c #define HAVE_IP(x) ((size_t)(ip_end - ip) >= (size_t)(x)) x 24 lib/lzo/lzo1x_decompress_safe.c #define HAVE_OP(x) ((size_t)(op_end - op) >= (size_t)(x)) x 25 lib/lzo/lzo1x_decompress_safe.c #define NEED_IP(x) if (!HAVE_IP(x)) goto input_overrun x 26 lib/lzo/lzo1x_decompress_safe.c #define NEED_OP(x) if (!HAVE_OP(x)) goto output_overrun x 19 lib/math/int_sqrt.c unsigned long int_sqrt(unsigned long x) x 23 lib/math/int_sqrt.c if (x <= 1) x 24 lib/math/int_sqrt.c return x; x 26 lib/math/int_sqrt.c m = 1UL << (__fls(x) & ~1UL); x 31 lib/math/int_sqrt.c if (x >= b) { x 32 lib/math/int_sqrt.c x -= b; x 48 lib/math/int_sqrt.c u32 int_sqrt64(u64 x) x 52 lib/math/int_sqrt.c if (x <= ULONG_MAX) x 53 lib/math/int_sqrt.c return int_sqrt((unsigned long) x); x 55 lib/math/int_sqrt.c m = 1ULL << ((fls64(x) - 1) & ~1ULL); x 60 lib/math/int_sqrt.c if (x >= b) { x 61 lib/math/int_sqrt.c x -= b; x 69 lib/math/prime_numbers.c static bool slow_is_prime_number(unsigned long x) x 71 lib/math/prime_numbers.c unsigned long y = int_sqrt(x); x 74 lib/math/prime_numbers.c if ((x % y) == 0) x 82 lib/math/prime_numbers.c static unsigned long slow_next_prime_number(unsigned long x) x 84 lib/math/prime_numbers.c while (x < ULONG_MAX && !slow_is_prime_number(++x)) x 87 lib/math/prime_numbers.c return x; x 90 lib/math/prime_numbers.c static unsigned long clear_multiples(unsigned long x, x 97 lib/math/prime_numbers.c m = 2 * x; x 99 lib/math/prime_numbers.c m = roundup(start, x); x 103 lib/math/prime_numbers.c m += x; x 106 lib/math/prime_numbers.c return x; x 109 lib/math/prime_numbers.c static bool expand_to_next_prime(unsigned long x) x 123 lib/math/prime_numbers.c sz = 2 * x; x 124 lib/math/prime_numbers.c if (sz < x) x 135 lib/math/prime_numbers.c if (x < p->last) { x 150 lib/math/prime_numbers.c BUG_ON(new->last <= x); x 188 lib/math/prime_numbers.c unsigned long next_prime_number(unsigned long x) x 194 lib/math/prime_numbers.c while (x >= p->last) { x 197 lib/math/prime_numbers.c if (!expand_to_next_prime(x)) x 198 lib/math/prime_numbers.c return slow_next_prime_number(x); x 203 lib/math/prime_numbers.c x = find_next_bit(p->primes, p->last, x + 1); x 206 lib/math/prime_numbers.c return x; x 221 lib/math/prime_numbers.c bool is_prime_number(unsigned long x) x 228 lib/math/prime_numbers.c while (x >= p->sz) { x 231 lib/math/prime_numbers.c if (!expand_to_next_prime(x)) x 232 lib/math/prime_numbers.c return slow_is_prime_number(x); x 237 lib/math/prime_numbers.c result = test_bit(x, p->primes); x 266 lib/math/prime_numbers.c unsigned long x, last; x 271 lib/math/prime_numbers.c for (last = 0, x = 2; x < max; x++) { x 272 lib/math/prime_numbers.c bool slow = slow_is_prime_number(x); x 273 lib/math/prime_numbers.c bool fast = is_prime_number(x); x 277 lib/math/prime_numbers.c x, slow ? "yes" : "no", fast ? "yes" : "no"); x 284 lib/math/prime_numbers.c if (next_prime_number(last) != x) { x 286 lib/math/prime_numbers.c last, x, next_prime_number(last)); x 289 lib/math/prime_numbers.c last = x; x 292 lib/math/prime_numbers.c pr_info("selftest(%lu) passed, last prime was %lu", x, last); x 24 lib/mpi/generic_mpih-add1.c mpi_limb_t x, y, cy; x 39 lib/mpi/generic_mpih-add1.c x = s1_ptr[j]; x 42 lib/mpi/generic_mpih-add1.c y += x; /* add other addend */ x 43 lib/mpi/generic_mpih-add1.c cy += y < x; /* get out carry from that add, combine */ x 26 lib/mpi/generic_mpih-mul2.c mpi_limb_t x; x 41 lib/mpi/generic_mpih-mul2.c x = res_ptr[j]; x 42 lib/mpi/generic_mpih-mul2.c prod_low = x + prod_low; x 43 lib/mpi/generic_mpih-mul2.c cy_limb += prod_low < x ? 1 : 0; x 26 lib/mpi/generic_mpih-mul3.c mpi_limb_t x; x 41 lib/mpi/generic_mpih-mul3.c x = res_ptr[j]; x 42 lib/mpi/generic_mpih-mul3.c prod_low = x - prod_low; x 43 lib/mpi/generic_mpih-mul3.c cy_limb += prod_low > x ? 1 : 0; x 23 lib/mpi/generic_mpih-sub1.c mpi_limb_t x, y, cy; x 38 lib/mpi/generic_mpih-sub1.c x = s1_ptr[j]; x 41 lib/mpi/generic_mpih-sub1.c y = x - y; /* main subtract */ x 42 lib/mpi/generic_mpih-sub1.c cy += y > x; /* get out carry from the subtract, combine */ x 46 lib/mpi/longlong.h #define __MPN(x) __##x x 27 lib/mpi/mpi-inline.h mpi_limb_t x; x 29 lib/mpi/mpi-inline.h x = *s1_ptr++; x 30 lib/mpi/mpi-inline.h s2_limb += x; x 32 lib/mpi/mpi-inline.h if (s2_limb < x) { /* sum is less than the left operand: handle carry */ x 34 lib/mpi/mpi-inline.h x = *s1_ptr++ + 1; /* add carry */ x 35 lib/mpi/mpi-inline.h *res_ptr++ = x; /* and store */ x 36 lib/mpi/mpi-inline.h if (x) /* not 0 (no overflow): we can stop */ x 70 lib/mpi/mpi-inline.h mpi_limb_t x; x 72 lib/mpi/mpi-inline.h x = *s1_ptr++; x 73 lib/mpi/mpi-inline.h s2_limb = x - s2_limb; x 75 lib/mpi/mpi-inline.h if (s2_limb > x) { x 77 lib/mpi/mpi-inline.h x = *s1_ptr++; x 78 lib/mpi/mpi-inline.h *res_ptr++ = x - 1; x 79 lib/mpi/mpi-inline.h if (x) x 30 lib/mpi/mpi-internal.h #define assert(x) \ x 32 lib/mpi/mpi-internal.h if (!x) \ x 260 lib/mpi/mpicoder.c int i, x, buf_len; x 302 lib/mpi/mpicoder.c for (x = 0; x < sizeof(alimb); x++) { x 334 lib/mpi/mpicoder.c int x, j, z, lzeros, ents; x 402 lib/mpi/mpicoder.c for (x = 0; x < len; x++) { x 405 lib/mpi/mpicoder.c if (((z + x + 1) % BYTES_PER_MPI_LIMB) == 0) { x 410 lib/mpi/mpicoder.c z += x; x 124 lib/raid6/algos.c #define time_before(x, y) ((x) < (y)) x 33 lib/raid6/x86.h #define __aligned(x) __attribute__((aligned(x))) x 164 lib/random32.c #define LCG(x) ((x) * 69069U) /* super-duper LCG */ x 17 lib/sg_pool.c #define SP(x) { .size = x, "sgpool-" __stringify(x) } x 38 lib/sha1.c #define setW(x, val) (*(volatile __u32 *)&W(x) = (val)) x 40 lib/sha1.c #define setW(x, val) do { W(x) = (val); __asm__("":::"memory"); } while (0) x 42 lib/sha1.c #define setW(x, val) (W(x) = (val)) x 46 lib/sha1.c #define W(x) (array[(x)&15]) x 27 lib/test_bitmap.c const unsigned int exp_uint, unsigned int x) x 29 lib/test_bitmap.c if (exp_uint != x) { x 31 lib/test_bitmap.c srcfile, line, exp_uint, x); x 38 lib/test_hash.c mod255(u32 x) x 40 lib/test_hash.c x = (x & 0xffff) + (x >> 16); /* 1 <= x <= 0x1fffe */ x 41 lib/test_hash.c x = (x & 0xff) + (x >> 8); /* 1 <= x <= 0x2fd */ x 42 lib/test_hash.c x = (x & 0xff) + (x >> 8); /* 1 <= x <= 0x100 */ x 43 lib/test_hash.c x = (x & 0xff) + (x >> 8); /* 1 <= x <= 0xff */ x 44 lib/test_hash.c return x; x 18 lib/test_ida.c #define IDA_BUG_ON(ida, x) do { \ x 20 lib/test_ida.c if (x) { \ x 368 lib/test_vmalloc.c int i, j, x; x 377 lib/test_vmalloc.c x = arr[i]; x 379 lib/test_vmalloc.c arr[j] = x; x 23 lib/test_xarray.c #define XA_BUG_ON(xa, x) do { \ x 25 lib/test_xarray.c if (x) { \ x 98 lib/ts_bm.c int x = i+g-1, y = j+g-1, ret = 0; x 100 lib/ts_bm.c while(pattern[x--] == pattern[y--]) { x 164 lib/vsprintf.c #define _(x) (__force u16) cpu_to_le16(((x % 10) | ((x / 10) << 8)) + 0x3030) x 287 lib/vsprintf.c unsigned put_dec_helper4(char *buf, unsigned x) x 289 lib/vsprintf.c uint32_t q = (x * (uint64_t)0x346DC5D7) >> 43; x 291 lib/vsprintf.c put_dec_full4(buf, x - q * 10000); x 52 lib/xxhash.c #define xxh_rotl32(x, r) ((x << r) | (x >> (32 - r))) x 53 lib/xxhash.c #define xxh_rotl64(x, r) ((x << r) | (x >> (64 - r))) x 235 lib/zstd/zstd_internal.h #define ZSTD_ALIGN(x) ALIGN(x, sizeof(size_t)) x 75 mm/backing-dev.c #define K(x) ((x) << (PAGE_SHIFT - 10)) x 30 mm/hugetlb_cgroup.c #define MEMFILE_PRIVATE(x, val) (((x) << 16) | (val)) x 239 mm/kmemleak.c #define kmemleak_warn(x...) do { \ x 240 mm/kmemleak.c pr_warn(x); \ x 250 mm/kmemleak.c #define kmemleak_stop(x...) do { \ x 251 mm/kmemleak.c kmemleak_warn(x); \ x 46 mm/ksm.c #define NUMA(x) (x) x 47 mm/ksm.c #define DO_NUMA(x) do { (x); } while (0) x 49 mm/ksm.c #define NUMA(x) (0) x 50 mm/ksm.c #define DO_NUMA(x) do { } while (0) x 228 mm/memcontrol.c #define MEMFILE_PRIVATE(x, val) ((x) << 16 | (val)) x 693 mm/memcontrol.c long x; x 698 mm/memcontrol.c x = val + __this_cpu_read(memcg->vmstats_percpu->stat[idx]); x 699 mm/memcontrol.c if (unlikely(abs(x) > MEMCG_CHARGE_BATCH)) { x 706 mm/memcontrol.c __this_cpu_add(memcg->vmstats_local->stat[idx], x); x 708 mm/memcontrol.c atomic_long_add(x, &mi->vmstats[idx]); x 709 mm/memcontrol.c x = 0; x 711 mm/memcontrol.c __this_cpu_write(memcg->vmstats_percpu->stat[idx], x); x 741 mm/memcontrol.c long x; x 758 mm/memcontrol.c x = val + __this_cpu_read(pn->lruvec_stat_cpu->count[idx]); x 759 mm/memcontrol.c if (unlikely(abs(x) > MEMCG_CHARGE_BATCH)) { x 763 mm/memcontrol.c atomic_long_add(x, &pi->lruvec_stat[idx]); x 764 mm/memcontrol.c x = 0; x 766 mm/memcontrol.c __this_cpu_write(pn->lruvec_stat_cpu->count[idx], x); x 809 mm/memcontrol.c unsigned long x; x 814 mm/memcontrol.c x = count + __this_cpu_read(memcg->vmstats_percpu->events[idx]); x 815 mm/memcontrol.c if (unlikely(x > MEMCG_CHARGE_BATCH)) { x 822 mm/memcontrol.c __this_cpu_add(memcg->vmstats_local->events[idx], x); x 824 mm/memcontrol.c atomic_long_add(x, &mi->vmevents[idx]); x 825 mm/memcontrol.c x = 0; x 827 mm/memcontrol.c __this_cpu_write(memcg->vmstats_percpu->events[idx], x); x 837 mm/memcontrol.c long x = 0; x 841 mm/memcontrol.c x += per_cpu(memcg->vmstats_local->events[event], cpu); x 842 mm/memcontrol.c return x; x 1502 mm/memcontrol.c #define K(x) ((x) << (PAGE_SHIFT-10)) x 2319 mm/memcontrol.c long x; x 2321 mm/memcontrol.c x = this_cpu_xchg(memcg->vmstats_percpu->stat[i], 0); x 2322 mm/memcontrol.c if (x) x 2324 mm/memcontrol.c atomic_long_add(x, &memcg->vmstats[i]); x 2333 mm/memcontrol.c x = this_cpu_xchg(pn->lruvec_stat_cpu->count[i], 0); x 2334 mm/memcontrol.c if (x) x 2336 mm/memcontrol.c atomic_long_add(x, &pn->lruvec_stat[i]); x 2342 mm/memcontrol.c long x; x 2344 mm/memcontrol.c x = this_cpu_xchg(memcg->vmstats_percpu->events[i], 0); x 2345 mm/memcontrol.c if (x) x 2347 mm/memcontrol.c atomic_long_add(x, &memcg->vmevents[i]); x 4410 mm/memcontrol.c long x = atomic_long_read(&memcg->vmstats[idx]); x 4414 mm/memcontrol.c x += per_cpu_ptr(memcg->vmstats_percpu, cpu)->stat[idx]; x 4415 mm/memcontrol.c if (x < 0) x 4416 mm/memcontrol.c x = 0; x 4417 mm/memcontrol.c return x; x 482 mm/oom_kill.c #define K(x) ((x) << (PAGE_SHIFT-10)) x 308 mm/page-writeback.c unsigned long x = 0; x 328 mm/page-writeback.c x += nr_pages; x 341 mm/page-writeback.c if ((long)x < 0) x 342 mm/page-writeback.c x = 0; x 350 mm/page-writeback.c return min(x, total); x 364 mm/page-writeback.c unsigned long x; x 366 mm/page-writeback.c x = global_zone_page_state(NR_FREE_PAGES); x 372 mm/page-writeback.c x -= min(x, totalreserve_pages); x 374 mm/page-writeback.c x += global_node_page_state(NR_INACTIVE_FILE); x 375 mm/page-writeback.c x += global_node_page_state(NR_ACTIVE_FILE); x 378 mm/page-writeback.c x -= highmem_dirtyable_memory(x); x 380 mm/page-writeback.c return x + 1; /* Ensure that we never return 0 */ x 817 mm/page-writeback.c long x; x 819 mm/page-writeback.c x = div64_s64(((s64)setpoint - (s64)dirty) << RATELIMIT_CALC_SHIFT, x 821 mm/page-writeback.c pos_ratio = x; x 822 mm/page-writeback.c pos_ratio = pos_ratio * x >> RATELIMIT_CALC_SHIFT; x 823 mm/page-writeback.c pos_ratio = pos_ratio * x >> RATELIMIT_CALC_SHIFT; x 916 mm/page-writeback.c long x; x 1047 mm/page-writeback.c x = div_u64((u64)wb_thresh << 16, dtc->thresh | 1); x 1048 mm/page-writeback.c wb_setpoint = setpoint * (u64)x >> 16; x 1057 mm/page-writeback.c span = (dtc->thresh - wb_thresh + 8 * write_bw) * (u64)x >> 16; x 1202 mm/page-writeback.c unsigned long x; x 1312 mm/page-writeback.c x = min3(wb->balanced_dirty_ratelimit, x 1314 mm/page-writeback.c if (dirty_ratelimit < x) x 1315 mm/page-writeback.c step = x - dirty_ratelimit; x 1317 mm/page-writeback.c x = max3(wb->balanced_dirty_ratelimit, x 1319 mm/page-writeback.c if (dirty_ratelimit > x) x 1320 mm/page-writeback.c step = dirty_ratelimit - x; x 5210 mm/page_alloc.c #define K(x) ((x) << (PAGE_SHIFT-10)) x 588 mm/percpu.c static inline bool pcpu_region_overlap(int a, int b, int x, int y) x 590 mm/percpu.c return (a < y) && (x < b); x 256 mm/slab.c #define OBJFREELIST_SLAB(x) ((x)->flags & CFLGS_OBJFREELIST_SLAB) x 257 mm/slab.c #define OFF_SLAB(x) ((x)->flags & CFLGS_OFF_SLAB) x 271 mm/slab.c #define STATS_INC_ACTIVE(x) ((x)->num_active++) x 272 mm/slab.c #define STATS_DEC_ACTIVE(x) ((x)->num_active--) x 273 mm/slab.c #define STATS_INC_ALLOCED(x) ((x)->num_allocations++) x 274 mm/slab.c #define STATS_INC_GROWN(x) ((x)->grown++) x 275 mm/slab.c #define STATS_ADD_REAPED(x,y) ((x)->reaped += (y)) x 276 mm/slab.c #define STATS_SET_HIGH(x) \ x 278 mm/slab.c if ((x)->num_active > (x)->high_mark) \ x 279 mm/slab.c (x)->high_mark = (x)->num_active; \ x 281 mm/slab.c #define STATS_INC_ERR(x) ((x)->errors++) x 282 mm/slab.c #define STATS_INC_NODEALLOCS(x) ((x)->node_allocs++) x 283 mm/slab.c #define STATS_INC_NODEFREES(x) ((x)->node_frees++) x 284 mm/slab.c #define STATS_INC_ACOVERFLOW(x) ((x)->node_overflow++) x 285 mm/slab.c #define STATS_SET_FREEABLE(x, i) \ x 287 mm/slab.c if ((x)->max_freeable < i) \ x 288 mm/slab.c (x)->max_freeable = i; \ x 290 mm/slab.c #define STATS_INC_ALLOCHIT(x) atomic_inc(&(x)->allochit) x 291 mm/slab.c #define STATS_INC_ALLOCMISS(x) atomic_inc(&(x)->allocmiss) x 292 mm/slab.c #define STATS_INC_FREEHIT(x) atomic_inc(&(x)->freehit) x 293 mm/slab.c #define STATS_INC_FREEMISS(x) atomic_inc(&(x)->freemiss) x 295 mm/slab.c #define STATS_INC_ACTIVE(x) do { } while (0) x 296 mm/slab.c #define STATS_DEC_ACTIVE(x) do { } while (0) x 297 mm/slab.c #define STATS_INC_ALLOCED(x) do { } while (0) x 298 mm/slab.c #define STATS_INC_GROWN(x) do { } while (0) x 299 mm/slab.c #define STATS_ADD_REAPED(x,y) do { (void)(y); } while (0) x 300 mm/slab.c #define STATS_SET_HIGH(x) do { } while (0) x 301 mm/slab.c #define STATS_INC_ERR(x) do { } while (0) x 302 mm/slab.c #define STATS_INC_NODEALLOCS(x) do { } while (0) x 303 mm/slab.c #define STATS_INC_NODEFREES(x) do { } while (0) x 304 mm/slab.c #define STATS_INC_ACOVERFLOW(x) do { } while (0) x 305 mm/slab.c #define STATS_SET_FREEABLE(x, i) do { } while (0) x 306 mm/slab.c #define STATS_INC_ALLOCHIT(x) do { } while (0) x 307 mm/slab.c #define STATS_INC_ALLOCMISS(x) do { } while (0) x 308 mm/slab.c #define STATS_INC_FREEHIT(x) do { } while (0) x 309 mm/slab.c #define STATS_INC_FREEMISS(x) do { } while (0) x 358 mm/slab.c #define obj_offset(x) 0 x 2115 mm/slab.c #define check_spinlock_acquired(x) do { } while(0) x 2116 mm/slab.c #define check_spinlock_acquired_node(x, y) do { } while(0) x 2746 mm/slab.c #define kfree_debugcheck(x) do { } while(0) x 2747 mm/slab.c #define cache_free_debugcheck(x,objp,z) (objp) x 504 mm/slab.h static inline struct kmem_cache *cache_from_obj(struct kmem_cache *s, void *x) x 520 mm/slab.h cachep = virt_to_cache(x); x 659 mm/slab.h void ___cache_free(struct kmem_cache *cache, void *x, unsigned long addr); x 122 mm/slab_common.c void *x = p[i] = kmem_cache_alloc(s, flags); x 123 mm/slab_common.c if (!x) { x 332 mm/slub.c struct kmem_cache_order_objects x = { x 336 mm/slub.c return x; x 339 mm/slub.c static inline unsigned int oo_order(struct kmem_cache_order_objects x) x 341 mm/slub.c return x.x >> OO_SHIFT; x 344 mm/slub.c static inline unsigned int oo_objects(struct kmem_cache_order_objects x) x 346 mm/slub.c return x.x & OO_MASK; x 1396 mm/slub.c static __always_inline void kfree_hook(void *x) x 1398 mm/slub.c kmemleak_free(x); x 1399 mm/slub.c kasan_kfree_large(x, _RET_IP_); x 1402 mm/slub.c static __always_inline bool slab_free_hook(struct kmem_cache *s, void *x) x 1404 mm/slub.c kmemleak_free_recursive(x, s->flags); x 1416 mm/slub.c debug_check_no_locks_freed(x, s->object_size); x 1421 mm/slub.c debug_check_no_obj_freed(x, s->object_size); x 1424 mm/slub.c return kasan_slab_free(s, x, _RET_IP_); x 2393 mm/slub.c unsigned long x = 0; x 2398 mm/slub.c x += get_count(page); x 2400 mm/slub.c return x; x 3019 mm/slub.c void ___cache_free(struct kmem_cache *cache, void *x, unsigned long addr) x 3021 mm/slub.c do_slab_free(cache, virt_to_head_page(x), x, NULL, 1, addr); x 3025 mm/slub.c void kmem_cache_free(struct kmem_cache *s, void *x) x 3027 mm/slub.c s = cache_from_obj(s, x); x 3030 mm/slub.c slab_free(s, virt_to_head_page(x), x, NULL, 1, _RET_IP_); x 3031 mm/slub.c trace_kmem_cache_free(_RET_IP_, x); x 3954 mm/slub.c void kfree(const void *x) x 3957 mm/slub.c void *object = (void *)x; x 3959 mm/slub.c trace_kfree(_RET_IP_, x); x 3961 mm/slub.c if (unlikely(ZERO_OR_NULL_PTR(x))) x 3964 mm/slub.c page = virt_to_head_page(x); x 4811 mm/slub.c int x; x 4833 mm/slub.c x = page->objects; x 4835 mm/slub.c x = page->inuse; x 4837 mm/slub.c x = 1; x 4839 mm/slub.c total += x; x 4840 mm/slub.c nodes[node] += x; x 4850 mm/slub.c x = page->pages; x 4851 mm/slub.c total += x; x 4852 mm/slub.c nodes[node] += x; x 4875 mm/slub.c x = atomic_long_read(&n->total_objects); x 4877 mm/slub.c x = atomic_long_read(&n->total_objects) - x 4880 mm/slub.c x = atomic_long_read(&n->nr_slabs); x 4881 mm/slub.c total += x; x 4882 mm/slub.c nodes[node] += x; x 4892 mm/slub.c x = count_partial(n, count_total); x 4894 mm/slub.c x = count_partial(n, count_inuse); x 4896 mm/slub.c x = n->nr_partial; x 4897 mm/slub.c total += x; x 4898 mm/slub.c nodes[node] += x; x 4901 mm/slub.c x = sprintf(buf, "%lu", total); x 4905 mm/slub.c x += sprintf(buf + x, " N%d=%lu", x 4909 mm/slub.c return x + sprintf(buf + x, "\n"); x 4932 mm/slub.c ssize_t (*store)(struct kmem_cache *s, const char *x, size_t count); x 5372 mm/slub.c unsigned x = per_cpu_ptr(s->cpu_slab, cpu)->stat[si]; x 5374 mm/slub.c data[cpu] = x; x 5375 mm/slub.c sum += x; x 61 mm/swap_state.c #define INC_CACHE_INFO(x) do { swap_cache_info.x++; } while (0) x 62 mm/swap_state.c #define ADD_CACHE_INFO(x, nr) do { swap_cache_info.x += (nr); } while (0) x 37 mm/util.c void kfree_const(const void *x) x 39 mm/util.c if (!is_kernel_rodata((unsigned long)x)) x 40 mm/util.c kfree(x); x 252 mm/vmalloc.c int is_vmalloc_or_module_addr(const void *x) x 260 mm/vmalloc.c unsigned long addr = (unsigned long)x; x 264 mm/vmalloc.c return is_vmalloc_addr(x); x 1391 mm/vmalloc.c #define VMAP_MIN(x, y) ((x) < (y) ? (x) : (y)) /* can't use min() */ x 1392 mm/vmalloc.c #define VMAP_MAX(x, y) ((x) > (y) ? (x) : (y)) /* can't use max() */ x 321 mm/vmstat.c long x; x 324 mm/vmstat.c x = delta + __this_cpu_read(*p); x 328 mm/vmstat.c if (unlikely(x > t || x < -t)) { x 329 mm/vmstat.c zone_page_state_add(x, zone, item); x 330 mm/vmstat.c x = 0; x 332 mm/vmstat.c __this_cpu_write(*p, x); x 341 mm/vmstat.c long x; x 344 mm/vmstat.c x = delta + __this_cpu_read(*p); x 348 mm/vmstat.c if (unlikely(x > t || x < -t)) { x 349 mm/vmstat.c node_page_state_add(x, pgdat, item); x 350 mm/vmstat.c x = 0; x 352 mm/vmstat.c __this_cpu_write(*p, x); x 995 mm/vmstat.c long x = atomic_long_read(&pgdat->vm_stat[item]); x 997 mm/vmstat.c if (x < 0) x 998 mm/vmstat.c x = 0; x 1000 mm/vmstat.c return x; x 303 net/batman-adv/main.h #define batadv_smallest_signed_int(x) (1u << (7u + 8u * (sizeof(x) - 1u))) x 323 net/batman-adv/main.h #define batadv_seq_before(x, y) ({ \ x 324 net/batman-adv/main.h typeof(x)_d1 = (x); \ x 326 net/batman-adv/main.h typeof(x)_dummy = (_d1 - _d2); \ x 349 net/batman-adv/main.h #define batadv_seq_after(x, y) batadv_seq_before(y, x) x 2148 net/bluetooth/rfcomm/core.c static int rfcomm_dlc_debugfs_show(struct seq_file *f, void *x) x 214 net/bluetooth/smp.c const u8 v[32], const u8 x[16], u8 z, u8 res[16]) x 221 net/bluetooth/smp.c SMP_DBG("x %16phN z %02x", x, z); x 227 net/bluetooth/smp.c err = aes_cmac(tfm_cmac, x, m, sizeof(m), res); x 318 net/bluetooth/smp.c const u8 x[16], const u8 y[16], u32 *val) x 325 net/bluetooth/smp.c SMP_DBG("x %16phN y %16phN", x, y); x 331 net/bluetooth/smp.c err = aes_cmac(tfm_cmac, x, m, sizeof(m), tmp); x 3642 net/bluetooth/smp.c const u8 x[16] = { x 3652 net/bluetooth/smp.c err = smp_f4(tfm_cmac, u, v, x, z, res); x 3744 net/bluetooth/smp.c const u8 x[16] = { x 3754 net/bluetooth/smp.c err = smp_g2(tfm_cmac, u, v, x, y, &val); x 111 net/bluetooth/smp.h __u8 x[32]; x 1111 net/bridge/br_private.h #define br_netfilter_rtable_init(x) x 1121 net/bridge/br_private.h int br_set_forward_delay(struct net_bridge *br, unsigned long x); x 1122 net/bridge/br_private.h int br_set_hello_time(struct net_bridge *br, unsigned long x); x 1123 net/bridge/br_private.h int br_set_max_age(struct net_bridge *br, unsigned long x); x 26 net/bridge/netfilter/ebt_limit.c #define _POW2_BELOW2(x) ((x)|((x)>>1)) x 27 net/bridge/netfilter/ebt_limit.c #define _POW2_BELOW4(x) (_POW2_BELOW2(x)|_POW2_BELOW2((x)>>2)) x 28 net/bridge/netfilter/ebt_limit.c #define _POW2_BELOW8(x) (_POW2_BELOW4(x)|_POW2_BELOW4((x)>>4)) x 29 net/bridge/netfilter/ebt_limit.c #define _POW2_BELOW16(x) (_POW2_BELOW8(x)|_POW2_BELOW8((x)>>8)) x 30 net/bridge/netfilter/ebt_limit.c #define _POW2_BELOW32(x) (_POW2_BELOW16(x)|_POW2_BELOW16((x)>>16)) x 31 net/bridge/netfilter/ebt_limit.c #define POW2_BELOW32(x) ((_POW2_BELOW32(x)>>1) + 1) x 37 net/bridge/netfilter/ebtables.c #define SMP_ALIGN(x) (((x) + SMP_CACHE_BYTES-1) & ~(SMP_CACHE_BYTES-1)) x 31 net/ceph/crush/hash.c __u32 x = 231232; x 33 net/ceph/crush/hash.c crush_hashmix(b, x, hash); x 41 net/ceph/crush/hash.c __u32 x = 231232; x 44 net/ceph/crush/hash.c crush_hashmix(x, a, hash); x 52 net/ceph/crush/hash.c __u32 x = 231232; x 55 net/ceph/crush/hash.c crush_hashmix(c, x, hash); x 57 net/ceph/crush/hash.c crush_hashmix(b, x, hash); x 65 net/ceph/crush/hash.c __u32 x = 231232; x 69 net/ceph/crush/hash.c crush_hashmix(a, x, hash); x 71 net/ceph/crush/hash.c crush_hashmix(c, x, hash); x 80 net/ceph/crush/hash.c __u32 x = 231232; x 84 net/ceph/crush/hash.c crush_hashmix(e, x, hash); x 86 net/ceph/crush/hash.c crush_hashmix(b, x, hash); x 88 net/ceph/crush/hash.c crush_hashmix(d, x, hash); x 76 net/ceph/crush/mapper.c int x, int r) x 82 net/ceph/crush/mapper.c if (work->perm_x != (__u32)x || work->perm_n == 0) { x 83 net/ceph/crush/mapper.c dprintk("bucket %d new x=%d\n", bucket->id, x); x 84 net/ceph/crush/mapper.c work->perm_x = x; x 88 net/ceph/crush/mapper.c s = crush_hash32_3(bucket->hash, x, bucket->id, 0) % x 113 net/ceph/crush/mapper.c i = crush_hash32_3(bucket->hash, x, bucket->id, p) % x 130 net/ceph/crush/mapper.c bucket->size, x, r, pr, s); x 136 net/ceph/crush/mapper.c struct crush_work_bucket *work, int x, int r) x 138 net/ceph/crush/mapper.c return bucket_perm_choose(&bucket->h, work, x, r); x 143 net/ceph/crush/mapper.c int x, int r) x 148 net/ceph/crush/mapper.c __u64 w = crush_hash32_4(bucket->h.hash, x, bucket->h.items[i], x 153 net/ceph/crush/mapper.c i, x, r, bucket->h.items[i], bucket->item_weights[i], x 179 net/ceph/crush/mapper.c static int left(int x) x 181 net/ceph/crush/mapper.c int h = height(x); x 182 net/ceph/crush/mapper.c return x - (1 << (h-1)); x 185 net/ceph/crush/mapper.c static int right(int x) x 187 net/ceph/crush/mapper.c int h = height(x); x 188 net/ceph/crush/mapper.c return x + (1 << (h-1)); x 191 net/ceph/crush/mapper.c static int terminal(int x) x 193 net/ceph/crush/mapper.c return x & 1; x 197 net/ceph/crush/mapper.c int x, int r) x 210 net/ceph/crush/mapper.c t = (__u64)crush_hash32_4(bucket->h.hash, x, n, r, x 229 net/ceph/crush/mapper.c int x, int r) x 237 net/ceph/crush/mapper.c draw = crush_hash32_3(bucket->h.hash, x, bucket->h.items[i], r); x 251 net/ceph/crush/mapper.c unsigned int x = xin; x 255 net/ceph/crush/mapper.c x++; x 264 net/ceph/crush/mapper.c if (!(x & 0x18000)) { x 265 net/ceph/crush/mapper.c int bits = __builtin_clz(x & 0x1FFFF) - 16; x 266 net/ceph/crush/mapper.c x <<= bits; x 270 net/ceph/crush/mapper.c index1 = (x >> 8) << 1; x 277 net/ceph/crush/mapper.c xl64 = (__s64)x * RH; x 327 net/ceph/crush/mapper.c int x, int r, x 340 net/ceph/crush/mapper.c u = crush_hash32_3(bucket->h.hash, x, ids[i], r); x 378 net/ceph/crush/mapper.c int x, int r, x 382 net/ceph/crush/mapper.c dprintk(" crush_bucket_choose %d x=%d r=%d\n", in->id, x, r); x 388 net/ceph/crush/mapper.c work, x, r); x 391 net/ceph/crush/mapper.c x, r); x 394 net/ceph/crush/mapper.c x, r); x 398 net/ceph/crush/mapper.c x, r); x 402 net/ceph/crush/mapper.c x, r, arg, position); x 415 net/ceph/crush/mapper.c int item, int x) x 423 net/ceph/crush/mapper.c if ((crush_hash32_2(CRUSH_HASH_RJENKINS1, x, item) & 0xffff) x 453 net/ceph/crush/mapper.c int x, int numrep, int type, x 480 net/ceph/crush/mapper.c bucket->id, x, outpos, numrep, x 511 net/ceph/crush/mapper.c x, r); x 515 net/ceph/crush/mapper.c x, r, x 566 net/ceph/crush/mapper.c x, stable ? 1 : outpos+1, 0, x 590 net/ceph/crush/mapper.c item, x); x 647 net/ceph/crush/mapper.c int x, int left, int numrep, int type, x 667 net/ceph/crush/mapper.c bucket->id, x, outpos, numrep); x 726 net/ceph/crush/mapper.c x, r, x 780 net/ceph/crush/mapper.c x, 1, numrep, 0, x 797 net/ceph/crush/mapper.c is_out(map, weight, weight_max, item, x)) x 895 net/ceph/crush/mapper.c int ruleno, int x, int *result, int result_max, x 1035 net/ceph/crush/mapper.c x, numrep, x 1057 net/ceph/crush/mapper.c x, out_size, numrep, x 2851 net/ceph/messenger.c #define CASE(x) \ x 2852 net/ceph/messenger.c case CON_STATE_ ## x: \ x 2853 net/ceph/messenger.c con->error_msg = "socket closed (con state " #x ")"; \ x 2276 net/ceph/osdmap.c static int do_crush(struct ceph_osdmap *map, int ruleno, int x, x 2293 net/ceph/osdmap.c r = crush_do_rule(map->crush, ruleno, x, result, result_max, x 629 net/compat.c #define AL(x) ((x) * sizeof(u32)) x 134 net/core/filter.c BPF_CALL_3(bpf_skb_get_nlattr, struct sk_buff *, skb, u32, a, u32, x) x 147 net/core/filter.c nla = nla_find((struct nlattr *) &skb->data[a], skb->len - a, x); x 154 net/core/filter.c BPF_CALL_3(bpf_skb_get_nlattr_nest, struct sk_buff *, skb, u32, a, u32, x) x 171 net/core/filter.c nla = nla_find_nested(nla, x); x 4557 net/core/filter.c const struct xfrm_state *x; x 4562 net/core/filter.c x = sp->xvec[index]; x 4567 net/core/filter.c to->reqid = x->props.reqid; x 4568 net/core/filter.c to->spi = x->id.spi; x 4569 net/core/filter.c to->family = x->props.family; x 4573 net/core/filter.c memcpy(to->remote_ipv6, x->props.saddr.a6, x 4576 net/core/filter.c to->remote_ipv4 = x->props.saddr.a4; x 429 net/core/neighbour.c static void neigh_get_hash_rnd(u32 *x) x 431 net/core/neighbour.c *x = get_random_u32() | 1; x 9 net/core/net-procfs.c #define get_bucket(x) ((x) >> BUCKET_SPACE) x 10 net/core/net-procfs.c #define get_offset(x) ((x) & ((1 << BUCKET_SPACE) - 1)) x 242 net/core/pktgen.c #define VLAN_TAG_SIZE(x) ((x)->vlan_id == 0xffff ? 0 : 4) x 243 net/core/pktgen.c #define SVLAN_TAG_SIZE(x) ((x)->svlan_id == 0xffff ? 0 : 4) x 249 net/core/pktgen.c struct xfrm_state *x; x 2239 net/core/pktgen.c struct xfrm_state *x = pkt_dev->flows[flow].x; x 2241 net/core/pktgen.c if (!x) { x 2247 net/core/pktgen.c x = xfrm_state_lookup_byspi(pn->net, htonl(pkt_dev->spi), AF_INET); x 2250 net/core/pktgen.c x = xfrm_stateonly_find(pn->net, DUMMY_MARK, 0, x 2257 net/core/pktgen.c if (x) { x 2258 net/core/pktgen.c pkt_dev->flows[flow].x = x; x 2260 net/core/pktgen.c pkt_dev->pkt_overhead += x->props.header_len; x 2499 net/core/pktgen.c struct xfrm_state *x = pkt_dev->flows[pkt_dev->curfl].x; x 2503 net/core/pktgen.c if (!x) x 2507 net/core/pktgen.c if ((x->props.mode != XFRM_MODE_TRANSPORT) && (pkt_dev->spi == 0)) x 2513 net/core/pktgen.c if ((x->props.mode == XFRM_MODE_TUNNEL) && (pkt_dev->spi != 0)) x 2517 net/core/pktgen.c err = pktgen_xfrm_outer_mode_output(x, skb); x 2523 net/core/pktgen.c err = x->type->output(x, skb); x 2528 net/core/pktgen.c spin_lock_bh(&x->lock); x 2529 net/core/pktgen.c x->curlft.bytes += skb->len; x 2530 net/core/pktgen.c x->curlft.packets++; x 2531 net/core/pktgen.c spin_unlock_bh(&x->lock); x 2542 net/core/pktgen.c struct xfrm_state *x = pkt_dev->flows[i].x; x 2543 net/core/pktgen.c if (x) { x 2544 net/core/pktgen.c xfrm_state_put(x); x 2545 net/core/pktgen.c pkt_dev->flows[i].x = NULL; x 2555 net/core/pktgen.c struct xfrm_state *x = pkt_dev->flows[pkt_dev->curfl].x; x 2557 net/core/pktgen.c if (x) { x 2562 net/core/pktgen.c nhead = x->props.header_len - skb_headroom(skb); x 983 net/core/skbuff.c #define C(x) n->x = skb->x x 4100 net/core/skbuff.c #define SKB_EXT_CHUNKSIZEOF(x) (ALIGN((sizeof(x)), SKB_EXT_ALIGN_VALUE) / SKB_EXT_ALIGN_VALUE) x 210 net/core/sock.c #define _sock_locks(x) \ x 211 net/core/sock.c x "AF_UNSPEC", x "AF_UNIX" , x "AF_INET" , \ x 212 net/core/sock.c x "AF_AX25" , x "AF_IPX" , x "AF_APPLETALK", \ x 213 net/core/sock.c x "AF_NETROM", x "AF_BRIDGE" , x "AF_ATMPVC" , \ x 214 net/core/sock.c x "AF_X25" , x "AF_INET6" , x "AF_ROSE" , \ x 215 net/core/sock.c x "AF_DECnet", x "AF_NETBEUI" , x "AF_SECURITY" , \ x 216 net/core/sock.c x "AF_KEY" , x "AF_NETLINK" , x "AF_PACKET" , \ x 217 net/core/sock.c x "AF_ASH" , x "AF_ECONET" , x "AF_ATMSVC" , \ x 218 net/core/sock.c x "AF_RDS" , x "AF_SNA" , x "AF_IRDA" , \ x 219 net/core/sock.c x "AF_PPPOX" , x "AF_WANPIPE" , x "AF_LLC" , \ x 220 net/core/sock.c x "27" , x "28" , x "AF_CAN" , \ x 221 net/core/sock.c x "AF_TIPC" , x "AF_BLUETOOTH", x "IUCV" , \ x 222 net/core/sock.c x "AF_RXRPC" , x "AF_ISDN" , x "AF_PHONET" , \ x 223 net/core/sock.c x "AF_IEEE802154", x "AF_CAIF" , x "AF_ALG" , \ x 224 net/core/sock.c x "AF_NFC" , x "AF_VSOCK" , x "AF_KCM" , \ x 225 net/core/sock.c x "AF_QIPCRTR", x "AF_SMC" , x "AF_XDP" , \ x 226 net/core/sock.c x "AF_MAX" x 105 net/dccp/dccp.h #define COMPLEMENT48(x) (0x1000000000000LL - (x)) /* 2^48 - x */ x 106 net/dccp/dccp.h #define TO_SIGNED48(x) (((x) < INT48_MIN)? (x) : -COMPLEMENT48( (x))) x 107 net/dccp/dccp.h #define TO_UNSIGNED48(x) (((x) >= 0)? (x) : COMPLEMENT48(-(x))) x 2199 net/decnet/af_decnet.c #define IS_NOT_PRINTABLE(x) ((x) < 32 || (x) > 126) x 151 net/decnet/dn_dev.c #define DN_DEV_PARMS_OFFSET(x) offsetof(struct dn_dev_parms, x) x 63 net/decnet/sysctl_net_decnet.c #define ISNUM(x) (((x) >= '0') && ((x) <= '9')) x 64 net/decnet/sysctl_net_decnet.c #define ISLOWER(x) (((x) >= 'a') && ((x) <= 'z')) x 65 net/decnet/sysctl_net_decnet.c #define ISUPPER(x) (((x) >= 'A') && ((x) <= 'Z')) x 66 net/decnet/sysctl_net_decnet.c #define ISALPHA(x) (ISLOWER(x) || ISUPPER(x)) x 67 net/decnet/sysctl_net_decnet.c #define INVALID_END_CHAR(x) (ISNUM(x) || ISALPHA(x)) x 47 net/dsa/tag_8021q.c #define DSA_8021Q_DIR(x) (((x) << DSA_8021Q_DIR_SHIFT) & \ x 54 net/dsa/tag_8021q.c #define DSA_8021Q_SWITCH_ID(x) (((x) << DSA_8021Q_SWITCH_ID_SHIFT) & \ x 59 net/dsa/tag_8021q.c #define DSA_8021Q_PORT(x) (((x) << DSA_8021Q_PORT_SHIFT) & \ x 125 net/ipv4/ah4.c struct xfrm_state *x = skb_dst(skb)->xfrm; x 126 net/ipv4/ah4.c struct ah_data *ahp = x->data; x 147 net/ipv4/ah4.c static int ah_output(struct xfrm_state *x, struct sk_buff *skb) x 165 net/ipv4/ah4.c ahp = x->data; x 176 net/ipv4/ah4.c if (x->props.flags & XFRM_STATE_ESN) { x 215 net/ipv4/ah4.c if (x->props.flags & XFRM_STATE_ALIGN4) x 221 net/ipv4/ah4.c ah->spi = x->id.spi; x 229 net/ipv4/ah4.c if (x->props.flags & XFRM_STATE_ESN) { x 271 net/ipv4/ah4.c struct xfrm_state *x = xfrm_input_state(skb); x 272 net/ipv4/ah4.c struct ah_data *ahp = x->data; x 294 net/ipv4/ah4.c if (x->props.mode == XFRM_MODE_TUNNEL) x 303 net/ipv4/ah4.c static int ah_input(struct xfrm_state *x, struct sk_buff *skb) x 328 net/ipv4/ah4.c ahp = x->data; x 334 net/ipv4/ah4.c if (x->props.flags & XFRM_STATE_ALIGN4) { x 363 net/ipv4/ah4.c if (x->props.flags & XFRM_STATE_ESN) { x 404 net/ipv4/ah4.c if (x->props.flags & XFRM_STATE_ESN) { x 429 net/ipv4/ah4.c if (x->props.mode == XFRM_MODE_TUNNEL) x 447 net/ipv4/ah4.c struct xfrm_state *x; x 459 net/ipv4/ah4.c x = xfrm_state_lookup(net, skb->mark, (const xfrm_address_t *)&iph->daddr, x 461 net/ipv4/ah4.c if (!x) x 468 net/ipv4/ah4.c xfrm_state_put(x); x 473 net/ipv4/ah4.c static int ah_init_state(struct xfrm_state *x) x 479 net/ipv4/ah4.c if (!x->aalg) x 482 net/ipv4/ah4.c if (x->encap) x 489 net/ipv4/ah4.c ahash = crypto_alloc_ahash(x->aalg->alg_name, 0, 0); x 494 net/ipv4/ah4.c if (crypto_ahash_setkey(ahash, x->aalg->alg_key, x 495 net/ipv4/ah4.c (x->aalg->alg_key_len + 7) / 8)) x 504 net/ipv4/ah4.c aalg_desc = xfrm_aalg_get_byname(x->aalg->alg_name, 0); x 510 net/ipv4/ah4.c __func__, x->aalg->alg_name, x 517 net/ipv4/ah4.c ahp->icv_trunc_len = x->aalg->alg_trunc_len/8; x 519 net/ipv4/ah4.c if (x->props.flags & XFRM_STATE_ALIGN4) x 520 net/ipv4/ah4.c x->props.header_len = XFRM_ALIGN4(sizeof(struct ip_auth_hdr) + x 523 net/ipv4/ah4.c x->props.header_len = XFRM_ALIGN8(sizeof(struct ip_auth_hdr) + x 525 net/ipv4/ah4.c if (x->props.mode == XFRM_MODE_TUNNEL) x 526 net/ipv4/ah4.c x->props.header_len += sizeof(struct iphdr); x 527 net/ipv4/ah4.c x->data = ahp; x 539 net/ipv4/ah4.c static void ah_destroy(struct xfrm_state *x) x 541 net/ipv4/ah4.c struct ah_data *ahp = x->data; x 96 net/ipv4/esp4.c static void esp_ssg_unref(struct xfrm_state *x, void *tmp) x 99 net/ipv4/esp4.c struct crypto_aead *aead = x->data; x 105 net/ipv4/esp4.c if (x->props.flags & XFRM_STATE_ESN) x 125 net/ipv4/esp4.c struct xfrm_state *x; x 130 net/ipv4/esp4.c x = sp->xvec[sp->len - 1]; x 132 net/ipv4/esp4.c x = skb_dst(skb)->xfrm; x 136 net/ipv4/esp4.c esp_ssg_unref(x, tmp); x 141 net/ipv4/esp4.c XFRM_INC_STATS(xs_net(x), LINUX_MIB_XFRMOUTSTATEPROTOERROR); x 175 net/ipv4/esp4.c struct xfrm_state *x, x 183 net/ipv4/esp4.c if ((x->props.flags & XFRM_STATE_ESN)) { x 199 net/ipv4/esp4.c esph->spi = x->id.spi; x 228 net/ipv4/esp4.c static int esp_output_udp_encap(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp) x 234 net/ipv4/esp4.c struct xfrm_encap_tmpl *encap = x->encap; x 238 net/ipv4/esp4.c spin_lock_bh(&x->lock); x 242 net/ipv4/esp4.c spin_unlock_bh(&x->lock); x 272 net/ipv4/esp4.c int esp_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp) x 283 net/ipv4/esp4.c if (x->encap) { x 284 net/ipv4/esp4.c int err = esp_output_udp_encap(x, skb, esp); x 301 net/ipv4/esp4.c struct page_frag *pfrag = &x->xfrag; x 307 net/ipv4/esp4.c spin_lock_bh(&x->lock); x 310 net/ipv4/esp4.c spin_unlock_bh(&x->lock); x 333 net/ipv4/esp4.c spin_unlock_bh(&x->lock); x 365 net/ipv4/esp4.c int esp_output_tail(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp) x 384 net/ipv4/esp4.c if (x->props.flags & XFRM_STATE_ESN) { x 389 net/ipv4/esp4.c aead = x->data; x 407 net/ipv4/esp4.c esph = esp_output_set_extra(skb, x, esp->esph, extra); x 419 net/ipv4/esp4.c struct page_frag *pfrag = &x->xfrag; x 423 net/ipv4/esp4.c spin_lock_bh(&x->lock); x 425 net/ipv4/esp4.c spin_unlock_bh(&x->lock); x 436 net/ipv4/esp4.c spin_unlock_bh(&x->lock); x 446 net/ipv4/esp4.c if ((x->props.flags & XFRM_STATE_ESN)) x 470 net/ipv4/esp4.c if ((x->props.flags & XFRM_STATE_ESN)) x 475 net/ipv4/esp4.c esp_ssg_unref(x, tmp); x 484 net/ipv4/esp4.c static int esp_output(struct xfrm_state *x, struct sk_buff *skb) x 499 net/ipv4/esp4.c aead = x->data; x 503 net/ipv4/esp4.c if (x->tfcpad) { x 507 net/ipv4/esp4.c padto = min(x->tfcpad, xfrm_state_mtu(x, dst->child_mtu_cached)); x 518 net/ipv4/esp4.c esp.nfrags = esp_output_head(x, skb, &esp); x 523 net/ipv4/esp4.c esph->spi = x->id.spi; x 531 net/ipv4/esp4.c return esp_output_tail(x, skb, &esp); x 536 net/ipv4/esp4.c struct xfrm_state *x = xfrm_input_state(skb); x 538 net/ipv4/esp4.c struct crypto_aead *aead = x->data; x 582 net/ipv4/esp4.c struct xfrm_state *x = xfrm_input_state(skb); x 584 net/ipv4/esp4.c struct crypto_aead *aead = x->data; x 601 net/ipv4/esp4.c if (x->encap) { x 602 net/ipv4/esp4.c struct xfrm_encap_tmpl *encap = x->encap; x 611 net/ipv4/esp4.c if (iph->saddr != x->props.saddr.a4 || x 616 net/ipv4/esp4.c km_new_mapping(x, &ipaddr, uh->source); x 634 net/ipv4/esp4.c if (x->props.mode == XFRM_MODE_TRANSPORT) x 639 net/ipv4/esp4.c if (x->props.mode == XFRM_MODE_TUNNEL) x 668 net/ipv4/esp4.c struct xfrm_state *x = xfrm_input_state(skb); x 675 net/ipv4/esp4.c if ((x->props.flags & XFRM_STATE_ESN)) { x 696 net/ipv4/esp4.c static int esp_input(struct xfrm_state *x, struct sk_buff *skb) x 698 net/ipv4/esp4.c struct crypto_aead *aead = x->data; x 721 net/ipv4/esp4.c if (x->props.flags & XFRM_STATE_ESN) { x 768 net/ipv4/esp4.c if ((x->props.flags & XFRM_STATE_ESN)) x 780 net/ipv4/esp4.c if ((x->props.flags & XFRM_STATE_ESN)) x 794 net/ipv4/esp4.c struct xfrm_state *x; x 806 net/ipv4/esp4.c x = xfrm_state_lookup(net, skb->mark, (const xfrm_address_t *)&iph->daddr, x 808 net/ipv4/esp4.c if (!x) x 815 net/ipv4/esp4.c xfrm_state_put(x); x 820 net/ipv4/esp4.c static void esp_destroy(struct xfrm_state *x) x 822 net/ipv4/esp4.c struct crypto_aead *aead = x->data; x 830 net/ipv4/esp4.c static int esp_init_aead(struct xfrm_state *x) x 838 net/ipv4/esp4.c x->geniv, x->aead->alg_name) >= CRYPTO_MAX_ALG_NAME) x 846 net/ipv4/esp4.c x->data = aead; x 848 net/ipv4/esp4.c err = crypto_aead_setkey(aead, x->aead->alg_key, x 849 net/ipv4/esp4.c (x->aead->alg_key_len + 7) / 8); x 853 net/ipv4/esp4.c err = crypto_aead_setauthsize(aead, x->aead->alg_icv_len / 8); x 861 net/ipv4/esp4.c static int esp_init_authenc(struct xfrm_state *x) x 873 net/ipv4/esp4.c if (!x->ealg) x 878 net/ipv4/esp4.c if ((x->props.flags & XFRM_STATE_ESN)) { x 881 net/ipv4/esp4.c x->geniv ?: "", x->geniv ? "(" : "", x 882 net/ipv4/esp4.c x->aalg ? x->aalg->alg_name : "digest_null", x 883 net/ipv4/esp4.c x->ealg->alg_name, x 884 net/ipv4/esp4.c x->geniv ? ")" : "") >= CRYPTO_MAX_ALG_NAME) x 889 net/ipv4/esp4.c x->geniv ?: "", x->geniv ? "(" : "", x 890 net/ipv4/esp4.c x->aalg ? x->aalg->alg_name : "digest_null", x 891 net/ipv4/esp4.c x->ealg->alg_name, x 892 net/ipv4/esp4.c x->geniv ? ")" : "") >= CRYPTO_MAX_ALG_NAME) x 901 net/ipv4/esp4.c x->data = aead; x 903 net/ipv4/esp4.c keylen = (x->aalg ? (x->aalg->alg_key_len + 7) / 8 : 0) + x 904 net/ipv4/esp4.c (x->ealg->alg_key_len + 7) / 8 + RTA_SPACE(sizeof(*param)); x 917 net/ipv4/esp4.c if (x->aalg) { x 920 net/ipv4/esp4.c memcpy(p, x->aalg->alg_key, (x->aalg->alg_key_len + 7) / 8); x 921 net/ipv4/esp4.c p += (x->aalg->alg_key_len + 7) / 8; x 923 net/ipv4/esp4.c aalg_desc = xfrm_aalg_get_byname(x->aalg->alg_name, 0); x 930 net/ipv4/esp4.c x->aalg->alg_name, x 937 net/ipv4/esp4.c aead, x->aalg->alg_trunc_len / 8); x 942 net/ipv4/esp4.c param->enckeylen = cpu_to_be32((x->ealg->alg_key_len + 7) / 8); x 943 net/ipv4/esp4.c memcpy(p, x->ealg->alg_key, (x->ealg->alg_key_len + 7) / 8); x 954 net/ipv4/esp4.c static int esp_init_state(struct xfrm_state *x) x 960 net/ipv4/esp4.c x->data = NULL; x 962 net/ipv4/esp4.c if (x->aead) x 963 net/ipv4/esp4.c err = esp_init_aead(x); x 965 net/ipv4/esp4.c err = esp_init_authenc(x); x 970 net/ipv4/esp4.c aead = x->data; x 972 net/ipv4/esp4.c x->props.header_len = sizeof(struct ip_esp_hdr) + x 974 net/ipv4/esp4.c if (x->props.mode == XFRM_MODE_TUNNEL) x 975 net/ipv4/esp4.c x->props.header_len += sizeof(struct iphdr); x 976 net/ipv4/esp4.c else if (x->props.mode == XFRM_MODE_BEET && x->sel.family != AF_INET6) x 977 net/ipv4/esp4.c x->props.header_len += IPV4_BEET_PHMAXLEN; x 978 net/ipv4/esp4.c if (x->encap) { x 979 net/ipv4/esp4.c struct xfrm_encap_tmpl *encap = x->encap; x 986 net/ipv4/esp4.c x->props.header_len += sizeof(struct udphdr); x 989 net/ipv4/esp4.c x->props.header_len += sizeof(struct udphdr) + 2 * sizeof(u32); x 995 net/ipv4/esp4.c x->props.trailer_len = align + 1 + crypto_aead_authsize(aead); x 33 net/ipv4/esp4_offload.c struct xfrm_state *x; x 54 net/ipv4/esp4_offload.c x = xfrm_state_lookup(dev_net(skb->dev), skb->mark, x 57 net/ipv4/esp4_offload.c if (!x) x 60 net/ipv4/esp4_offload.c skb->mark = xfrm_smark_get(skb->mark, x); x 62 net/ipv4/esp4_offload.c sp->xvec[sp->len++] = x; x 92 net/ipv4/esp4_offload.c static void esp4_gso_encap(struct xfrm_state *x, struct sk_buff *skb) x 103 net/ipv4/esp4_offload.c esph->spi = x->id.spi; x 109 net/ipv4/esp4_offload.c static struct sk_buff *xfrm4_tunnel_gso_segment(struct xfrm_state *x, x 117 net/ipv4/esp4_offload.c static struct sk_buff *xfrm4_transport_gso_segment(struct xfrm_state *x, x 125 net/ipv4/esp4_offload.c skb->transport_header += x->props.header_len; x 133 net/ipv4/esp4_offload.c static struct sk_buff *xfrm4_outer_mode_gso_segment(struct xfrm_state *x, x 137 net/ipv4/esp4_offload.c switch (x->outer_mode.encap) { x 139 net/ipv4/esp4_offload.c return xfrm4_tunnel_gso_segment(x, skb, features); x 141 net/ipv4/esp4_offload.c return xfrm4_transport_gso_segment(x, skb, features); x 150 net/ipv4/esp4_offload.c struct xfrm_state *x; x 164 net/ipv4/esp4_offload.c x = sp->xvec[sp->len - 1]; x 165 net/ipv4/esp4_offload.c aead = x->data; x 168 net/ipv4/esp4_offload.c if (esph->spi != x->id.spi) x 179 net/ipv4/esp4_offload.c !(features & NETIF_F_HW_ESP)) || x->xso.dev != skb->dev) x 187 net/ipv4/esp4_offload.c return xfrm4_outer_mode_gso_segment(x, skb, esp_features); x 190 net/ipv4/esp4_offload.c static int esp_input_tail(struct xfrm_state *x, struct sk_buff *skb) x 192 net/ipv4/esp4_offload.c struct crypto_aead *aead = x->data; x 204 net/ipv4/esp4_offload.c static int esp_xmit(struct xfrm_state *x, struct sk_buff *skb, netdev_features_t features) x 225 net/ipv4/esp4_offload.c x->xso.dev != skb->dev) { x 234 net/ipv4/esp4_offload.c aead = x->data; x 249 net/ipv4/esp4_offload.c esp.nfrags = esp_output_head(x, skb, &esp); x 257 net/ipv4/esp4_offload.c esph->spi = x->id.spi; x 278 net/ipv4/esp4_offload.c err = esp_output_tail(x, skb, &esp); x 1892 net/ipv4/igmp.c #define igmp_ifc_event(x) do { } while (0) x 125 net/ipv4/ip_vti.c struct xfrm_state *x; x 143 net/ipv4/ip_vti.c x = xfrm_input_state(skb); x 145 net/ipv4/ip_vti.c inner_mode = &x->inner_mode; x 147 net/ipv4/ip_vti.c if (x->sel.family == AF_UNSPEC) { x 148 net/ipv4/ip_vti.c inner_mode = xfrm_ip2inner_mode(x, XFRM_MODE_SKB_CB(skb)->protocol); x 178 net/ipv4/ip_vti.c static bool vti_state_check(const struct xfrm_state *x, __be32 dst, __be32 src) x 186 net/ipv4/ip_vti.c if (!x || x->props.mode != XFRM_MODE_TUNNEL || x 187 net/ipv4/ip_vti.c x->props.family != AF_INET) x 191 net/ipv4/ip_vti.c return xfrm_addr_equal(saddr, &x->props.saddr, AF_INET); x 193 net/ipv4/ip_vti.c if (!xfrm_state_addr_check(x, daddr, saddr, AF_INET)) x 343 net/ipv4/ip_vti.c struct xfrm_state *x; x 387 net/ipv4/ip_vti.c x = xfrm_state_lookup(net, mark, (const xfrm_address_t *)&iph->daddr, x 389 net/ipv4/ip_vti.c if (!x) x 396 net/ipv4/ip_vti.c xfrm_state_put(x); x 28 net/ipv4/ipcomp.c struct xfrm_state *x; x 41 net/ipv4/ipcomp.c x = xfrm_state_lookup(net, skb->mark, (const xfrm_address_t *)&iph->daddr, x 43 net/ipv4/ipcomp.c if (!x) x 50 net/ipv4/ipcomp.c xfrm_state_put(x); x 56 net/ipv4/ipcomp.c static struct xfrm_state *ipcomp_tunnel_create(struct xfrm_state *x) x 58 net/ipv4/ipcomp.c struct net *net = xs_net(x); x 66 net/ipv4/ipcomp.c t->id.spi = x->props.saddr.a4; x 67 net/ipv4/ipcomp.c t->id.daddr.a4 = x->id.daddr.a4; x 68 net/ipv4/ipcomp.c memcpy(&t->sel, &x->sel, sizeof(t->sel)); x 70 net/ipv4/ipcomp.c t->props.mode = x->props.mode; x 71 net/ipv4/ipcomp.c t->props.saddr.a4 = x->props.saddr.a4; x 72 net/ipv4/ipcomp.c t->props.flags = x->props.flags; x 73 net/ipv4/ipcomp.c t->props.extra_flags = x->props.extra_flags; x 74 net/ipv4/ipcomp.c memcpy(&t->mark, &x->mark, sizeof(t->mark)); x 94 net/ipv4/ipcomp.c static int ipcomp_tunnel_attach(struct xfrm_state *x) x 96 net/ipv4/ipcomp.c struct net *net = xs_net(x); x 99 net/ipv4/ipcomp.c u32 mark = x->mark.v & x->mark.m; x 101 net/ipv4/ipcomp.c t = xfrm_state_lookup(net, mark, (xfrm_address_t *)&x->id.daddr.a4, x 102 net/ipv4/ipcomp.c x->props.saddr.a4, IPPROTO_IPIP, AF_INET); x 104 net/ipv4/ipcomp.c t = ipcomp_tunnel_create(x); x 112 net/ipv4/ipcomp.c x->tunnel = t; x 118 net/ipv4/ipcomp.c static int ipcomp4_init_state(struct xfrm_state *x) x 122 net/ipv4/ipcomp.c x->props.header_len = 0; x 123 net/ipv4/ipcomp.c switch (x->props.mode) { x 127 net/ipv4/ipcomp.c x->props.header_len += sizeof(struct iphdr); x 133 net/ipv4/ipcomp.c err = ipcomp_init_state(x); x 137 net/ipv4/ipcomp.c if (x->props.mode == XFRM_MODE_TUNNEL) { x 138 net/ipv4/ipcomp.c err = ipcomp_tunnel_attach(x); x 45 net/ipv4/tcp_cubic.c #define HYSTART_DELAY_THRESH(x) clamp(x, HYSTART_DELAY_MIN, HYSTART_DELAY_MAX) x 180 net/ipv4/tcp_cubic.c u32 x, b, shift; x 209 net/ipv4/tcp_cubic.c x = ((u32)(((u32)v[shift] + 10) << b)) >> 6; x 217 net/ipv4/tcp_cubic.c x = (2 * x + (u32)div64_u64(a, (u64)x * (u64)(x - 1))); x 218 net/ipv4/tcp_cubic.c x = ((x * 341) >> 10); x 219 net/ipv4/tcp_cubic.c return x; x 21 net/ipv4/xfrm4_input.c int xfrm4_extract_input(struct xfrm_state *x, struct sk_buff *skb) x 44 net/ipv4/xfrm4_output.c int xfrm4_extract_output(struct xfrm_state *x, struct sk_buff *skb) x 68 net/ipv4/xfrm4_output.c struct xfrm_state *x = skb_dst(skb)->xfrm; x 73 net/ipv4/xfrm4_output.c if (!x) { x 80 net/ipv4/xfrm4_output.c afinfo = xfrm_state_afinfo_get_rcu(x->outer_mode.family); x 16 net/ipv4/xfrm4_tunnel.c static int ipip_output(struct xfrm_state *x, struct sk_buff *skb) x 22 net/ipv4/xfrm4_tunnel.c static int ipip_xfrm_rcv(struct xfrm_state *x, struct sk_buff *skb) x 27 net/ipv4/xfrm4_tunnel.c static int ipip_init_state(struct xfrm_state *x) x 29 net/ipv4/xfrm4_tunnel.c if (x->props.mode != XFRM_MODE_TUNNEL) x 32 net/ipv4/xfrm4_tunnel.c if (x->encap) x 35 net/ipv4/xfrm4_tunnel.c x->props.header_len = sizeof(struct iphdr); x 40 net/ipv4/xfrm4_tunnel.c static void ipip_destroy(struct xfrm_state *x) x 24 net/ipv6/addrlabel.c #define ADDRLABEL(x...) printk(x) x 26 net/ipv6/addrlabel.c #define ADDRLABEL(x...) do { ; } while (0) x 293 net/ipv6/ah6.c struct xfrm_state *x = skb_dst(skb)->xfrm; x 294 net/ipv6/ah6.c struct ah_data *ahp = x->data; x 322 net/ipv6/ah6.c static int ah6_output(struct xfrm_state *x, struct sk_buff *skb) x 343 net/ipv6/ah6.c ahp = x->data; x 356 net/ipv6/ah6.c if (x->props.flags & XFRM_STATE_ESN) { x 412 net/ipv6/ah6.c ah->spi = x->id.spi; x 420 net/ipv6/ah6.c if (x->props.flags & XFRM_STATE_ESN) { x 463 net/ipv6/ah6.c struct xfrm_state *x = xfrm_input_state(skb); x 464 net/ipv6/ah6.c struct ah_data *ahp = x->data; x 485 net/ipv6/ah6.c if (x->props.mode == XFRM_MODE_TUNNEL) x 496 net/ipv6/ah6.c static int ah6_input(struct xfrm_state *x, struct sk_buff *skb) x 545 net/ipv6/ah6.c ahp = x->data; x 568 net/ipv6/ah6.c if (x->props.flags & XFRM_STATE_ESN) { x 605 net/ipv6/ah6.c if (x->props.flags & XFRM_STATE_ESN) { x 632 net/ipv6/ah6.c if (x->props.mode == XFRM_MODE_TUNNEL) x 651 net/ipv6/ah6.c struct xfrm_state *x; x 657 net/ipv6/ah6.c x = xfrm_state_lookup(net, skb->mark, (xfrm_address_t *)&iph->daddr, ah->spi, IPPROTO_AH, AF_INET6); x 658 net/ipv6/ah6.c if (!x) x 666 net/ipv6/ah6.c xfrm_state_put(x); x 671 net/ipv6/ah6.c static int ah6_init_state(struct xfrm_state *x) x 677 net/ipv6/ah6.c if (!x->aalg) x 680 net/ipv6/ah6.c if (x->encap) x 687 net/ipv6/ah6.c ahash = crypto_alloc_ahash(x->aalg->alg_name, 0, 0); x 692 net/ipv6/ah6.c if (crypto_ahash_setkey(ahash, x->aalg->alg_key, x 693 net/ipv6/ah6.c (x->aalg->alg_key_len + 7) / 8)) x 702 net/ipv6/ah6.c aalg_desc = xfrm_aalg_get_byname(x->aalg->alg_name, 0); x 708 net/ipv6/ah6.c x->aalg->alg_name, crypto_ahash_digestsize(ahash), x 714 net/ipv6/ah6.c ahp->icv_trunc_len = x->aalg->alg_trunc_len/8; x 716 net/ipv6/ah6.c x->props.header_len = XFRM_ALIGN8(sizeof(struct ip_auth_hdr) + x 718 net/ipv6/ah6.c switch (x->props.mode) { x 723 net/ipv6/ah6.c x->props.header_len += sizeof(struct ipv6hdr); x 728 net/ipv6/ah6.c x->data = ahp; x 740 net/ipv6/ah6.c static void ah6_destroy(struct xfrm_state *x) x 742 net/ipv6/ah6.c struct ah_data *ahp = x->data; x 105 net/ipv6/esp6.c static void esp_ssg_unref(struct xfrm_state *x, void *tmp) x 107 net/ipv6/esp6.c struct crypto_aead *aead = x->data; x 113 net/ipv6/esp6.c if (x->props.flags & XFRM_STATE_ESN) x 132 net/ipv6/esp6.c struct xfrm_state *x; x 137 net/ipv6/esp6.c x = sp->xvec[sp->len - 1]; x 139 net/ipv6/esp6.c x = skb_dst(skb)->xfrm; x 143 net/ipv6/esp6.c esp_ssg_unref(x, tmp); x 148 net/ipv6/esp6.c XFRM_INC_STATS(xs_net(x), LINUX_MIB_XFRMOUTSTATEPROTOERROR); x 178 net/ipv6/esp6.c struct xfrm_state *x, x 186 net/ipv6/esp6.c if ((x->props.flags & XFRM_STATE_ESN)) { x 197 net/ipv6/esp6.c esph->spi = x->id.spi; x 226 net/ipv6/esp6.c int esp6_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp) x 246 net/ipv6/esp6.c struct page_frag *pfrag = &x->xfrag; x 252 net/ipv6/esp6.c spin_lock_bh(&x->lock); x 255 net/ipv6/esp6.c spin_unlock_bh(&x->lock); x 278 net/ipv6/esp6.c spin_unlock_bh(&x->lock); x 307 net/ipv6/esp6.c int esp6_output_tail(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *esp) x 326 net/ipv6/esp6.c if (x->props.flags & XFRM_STATE_ESN) { x 331 net/ipv6/esp6.c aead = x->data; x 349 net/ipv6/esp6.c esph = esp_output_set_esn(skb, x, ip_esp_hdr(skb), seqhi); x 360 net/ipv6/esp6.c struct page_frag *pfrag = &x->xfrag; x 364 net/ipv6/esp6.c spin_lock_bh(&x->lock); x 366 net/ipv6/esp6.c spin_unlock_bh(&x->lock); x 377 net/ipv6/esp6.c spin_unlock_bh(&x->lock); x 387 net/ipv6/esp6.c if ((x->props.flags & XFRM_STATE_ESN)) x 411 net/ipv6/esp6.c if ((x->props.flags & XFRM_STATE_ESN)) x 416 net/ipv6/esp6.c esp_ssg_unref(x, tmp); x 425 net/ipv6/esp6.c static int esp6_output(struct xfrm_state *x, struct sk_buff *skb) x 440 net/ipv6/esp6.c aead = x->data; x 444 net/ipv6/esp6.c if (x->tfcpad) { x 448 net/ipv6/esp6.c padto = min(x->tfcpad, xfrm_state_mtu(x, dst->child_mtu_cached)); x 457 net/ipv6/esp6.c esp.nfrags = esp6_output_head(x, skb, &esp); x 462 net/ipv6/esp6.c esph->spi = x->id.spi; x 470 net/ipv6/esp6.c return esp6_output_tail(x, skb, &esp); x 475 net/ipv6/esp6.c struct xfrm_state *x = xfrm_input_state(skb); x 477 net/ipv6/esp6.c struct crypto_aead *aead = x->data; x 520 net/ipv6/esp6.c struct xfrm_state *x = xfrm_input_state(skb); x 522 net/ipv6/esp6.c struct crypto_aead *aead = x->data; x 539 net/ipv6/esp6.c if (x->props.mode == XFRM_MODE_TUNNEL) x 568 net/ipv6/esp6.c struct xfrm_state *x = xfrm_input_state(skb); x 574 net/ipv6/esp6.c if ((x->props.flags & XFRM_STATE_ESN)) { x 591 net/ipv6/esp6.c static int esp6_input(struct xfrm_state *x, struct sk_buff *skb) x 593 net/ipv6/esp6.c struct crypto_aead *aead = x->data; x 620 net/ipv6/esp6.c if (x->props.flags & XFRM_STATE_ESN) { x 667 net/ipv6/esp6.c if ((x->props.flags & XFRM_STATE_ESN)) x 679 net/ipv6/esp6.c if ((x->props.flags & XFRM_STATE_ESN)) x 694 net/ipv6/esp6.c struct xfrm_state *x; x 700 net/ipv6/esp6.c x = xfrm_state_lookup(net, skb->mark, (const xfrm_address_t *)&iph->daddr, x 702 net/ipv6/esp6.c if (!x) x 710 net/ipv6/esp6.c xfrm_state_put(x); x 715 net/ipv6/esp6.c static void esp6_destroy(struct xfrm_state *x) x 717 net/ipv6/esp6.c struct crypto_aead *aead = x->data; x 725 net/ipv6/esp6.c static int esp_init_aead(struct xfrm_state *x) x 733 net/ipv6/esp6.c x->geniv, x->aead->alg_name) >= CRYPTO_MAX_ALG_NAME) x 741 net/ipv6/esp6.c x->data = aead; x 743 net/ipv6/esp6.c err = crypto_aead_setkey(aead, x->aead->alg_key, x 744 net/ipv6/esp6.c (x->aead->alg_key_len + 7) / 8); x 748 net/ipv6/esp6.c err = crypto_aead_setauthsize(aead, x->aead->alg_icv_len / 8); x 756 net/ipv6/esp6.c static int esp_init_authenc(struct xfrm_state *x) x 768 net/ipv6/esp6.c if (!x->ealg) x 773 net/ipv6/esp6.c if ((x->props.flags & XFRM_STATE_ESN)) { x 776 net/ipv6/esp6.c x->geniv ?: "", x->geniv ? "(" : "", x 777 net/ipv6/esp6.c x->aalg ? x->aalg->alg_name : "digest_null", x 778 net/ipv6/esp6.c x->ealg->alg_name, x 779 net/ipv6/esp6.c x->geniv ? ")" : "") >= CRYPTO_MAX_ALG_NAME) x 784 net/ipv6/esp6.c x->geniv ?: "", x->geniv ? "(" : "", x 785 net/ipv6/esp6.c x->aalg ? x->aalg->alg_name : "digest_null", x 786 net/ipv6/esp6.c x->ealg->alg_name, x 787 net/ipv6/esp6.c x->geniv ? ")" : "") >= CRYPTO_MAX_ALG_NAME) x 796 net/ipv6/esp6.c x->data = aead; x 798 net/ipv6/esp6.c keylen = (x->aalg ? (x->aalg->alg_key_len + 7) / 8 : 0) + x 799 net/ipv6/esp6.c (x->ealg->alg_key_len + 7) / 8 + RTA_SPACE(sizeof(*param)); x 812 net/ipv6/esp6.c if (x->aalg) { x 815 net/ipv6/esp6.c memcpy(p, x->aalg->alg_key, (x->aalg->alg_key_len + 7) / 8); x 816 net/ipv6/esp6.c p += (x->aalg->alg_key_len + 7) / 8; x 818 net/ipv6/esp6.c aalg_desc = xfrm_aalg_get_byname(x->aalg->alg_name, 0); x 825 net/ipv6/esp6.c x->aalg->alg_name, x 832 net/ipv6/esp6.c aead, x->aalg->alg_trunc_len / 8); x 837 net/ipv6/esp6.c param->enckeylen = cpu_to_be32((x->ealg->alg_key_len + 7) / 8); x 838 net/ipv6/esp6.c memcpy(p, x->ealg->alg_key, (x->ealg->alg_key_len + 7) / 8); x 849 net/ipv6/esp6.c static int esp6_init_state(struct xfrm_state *x) x 855 net/ipv6/esp6.c if (x->encap) x 858 net/ipv6/esp6.c x->data = NULL; x 860 net/ipv6/esp6.c if (x->aead) x 861 net/ipv6/esp6.c err = esp_init_aead(x); x 863 net/ipv6/esp6.c err = esp_init_authenc(x); x 868 net/ipv6/esp6.c aead = x->data; x 870 net/ipv6/esp6.c x->props.header_len = sizeof(struct ip_esp_hdr) + x 872 net/ipv6/esp6.c switch (x->props.mode) { x 874 net/ipv6/esp6.c if (x->sel.family != AF_INET6) x 875 net/ipv6/esp6.c x->props.header_len += IPV4_BEET_PHMAXLEN + x 882 net/ipv6/esp6.c x->props.header_len += sizeof(struct ipv6hdr); x 887 net/ipv6/esp6.c x->props.trailer_len = align + 1 + crypto_aead_authsize(aead); x 54 net/ipv6/esp6_offload.c struct xfrm_state *x; x 76 net/ipv6/esp6_offload.c x = xfrm_state_lookup(dev_net(skb->dev), skb->mark, x 79 net/ipv6/esp6_offload.c if (!x) x 82 net/ipv6/esp6_offload.c skb->mark = xfrm_smark_get(skb->mark, x); x 84 net/ipv6/esp6_offload.c sp->xvec[sp->len++] = x; x 119 net/ipv6/esp6_offload.c static void esp6_gso_encap(struct xfrm_state *x, struct sk_buff *skb) x 128 net/ipv6/esp6_offload.c if (x->outer_mode.encap == XFRM_MODE_TRANSPORT) { x 137 net/ipv6/esp6_offload.c esph->spi = x->id.spi; x 143 net/ipv6/esp6_offload.c static struct sk_buff *xfrm6_tunnel_gso_segment(struct xfrm_state *x, x 151 net/ipv6/esp6_offload.c static struct sk_buff *xfrm6_transport_gso_segment(struct xfrm_state *x, x 159 net/ipv6/esp6_offload.c skb->transport_header += x->props.header_len; x 167 net/ipv6/esp6_offload.c static struct sk_buff *xfrm6_outer_mode_gso_segment(struct xfrm_state *x, x 171 net/ipv6/esp6_offload.c switch (x->outer_mode.encap) { x 173 net/ipv6/esp6_offload.c return xfrm6_tunnel_gso_segment(x, skb, features); x 175 net/ipv6/esp6_offload.c return xfrm6_transport_gso_segment(x, skb, features); x 184 net/ipv6/esp6_offload.c struct xfrm_state *x; x 198 net/ipv6/esp6_offload.c x = sp->xvec[sp->len - 1]; x 199 net/ipv6/esp6_offload.c aead = x->data; x 202 net/ipv6/esp6_offload.c if (esph->spi != x->id.spi) x 212 net/ipv6/esp6_offload.c if (!(features & NETIF_F_HW_ESP) || x->xso.dev != skb->dev) x 219 net/ipv6/esp6_offload.c return xfrm6_outer_mode_gso_segment(x, skb, esp_features); x 222 net/ipv6/esp6_offload.c static int esp6_input_tail(struct xfrm_state *x, struct sk_buff *skb) x 224 net/ipv6/esp6_offload.c struct crypto_aead *aead = x->data; x 236 net/ipv6/esp6_offload.c static int esp6_xmit(struct xfrm_state *x, struct sk_buff *skb, netdev_features_t features) x 256 net/ipv6/esp6_offload.c if (!(features & NETIF_F_HW_ESP) || x->xso.dev != skb->dev) { x 265 net/ipv6/esp6_offload.c aead = x->data; x 277 net/ipv6/esp6_offload.c esp.nfrags = esp6_output_head(x, skb, &esp); x 285 net/ipv6/esp6_offload.c esph->spi = x->id.spi; x 309 net/ipv6/esp6_offload.c err = esp6_output_tail(x, skb, &esp); x 340 net/ipv6/ip6_vti.c struct xfrm_state *x; x 358 net/ipv6/ip6_vti.c x = xfrm_input_state(skb); x 360 net/ipv6/ip6_vti.c inner_mode = &x->inner_mode; x 362 net/ipv6/ip6_vti.c if (x->sel.family == AF_UNSPEC) { x 363 net/ipv6/ip6_vti.c inner_mode = xfrm_ip2inner_mode(x, XFRM_MODE_SKB_CB(skb)->protocol); x 411 net/ipv6/ip6_vti.c static bool vti6_state_check(const struct xfrm_state *x, x 421 net/ipv6/ip6_vti.c if (!x || x->props.mode != XFRM_MODE_TUNNEL || x 422 net/ipv6/ip6_vti.c x->props.family != AF_INET6) x 426 net/ipv6/ip6_vti.c return xfrm_addr_equal(saddr, &x->props.saddr, AF_INET6); x 428 net/ipv6/ip6_vti.c if (!xfrm_state_addr_check(x, daddr, saddr, AF_INET6)) x 447 net/ipv6/ip6_vti.c struct xfrm_state *x; x 490 net/ipv6/ip6_vti.c x = dst->xfrm; x 491 net/ipv6/ip6_vti.c if (!vti6_state_check(x, &t->parms.raddr, &t->parms.laddr)) x 494 net/ipv6/ip6_vti.c if (!ip6_tnl_xmit_ctl(t, (const struct in6_addr *)&x->props.saddr, x 495 net/ipv6/ip6_vti.c (const struct in6_addr *)&x->id.daddr)) x 594 net/ipv6/ip6_vti.c struct xfrm_state *x; x 630 net/ipv6/ip6_vti.c x = xfrm_state_lookup(net, mark, (const xfrm_address_t *)&iph->daddr, x 632 net/ipv6/ip6_vti.c if (!x) x 640 net/ipv6/ip6_vti.c xfrm_state_put(x); x 52 net/ipv6/ipcomp6.c struct xfrm_state *x; x 59 net/ipv6/ipcomp6.c x = xfrm_state_lookup(net, skb->mark, (const xfrm_address_t *)&iph->daddr, x 61 net/ipv6/ipcomp6.c if (!x) x 69 net/ipv6/ipcomp6.c xfrm_state_put(x); x 74 net/ipv6/ipcomp6.c static struct xfrm_state *ipcomp6_tunnel_create(struct xfrm_state *x) x 76 net/ipv6/ipcomp6.c struct net *net = xs_net(x); x 84 net/ipv6/ipcomp6.c t->id.spi = xfrm6_tunnel_alloc_spi(net, (xfrm_address_t *)&x->props.saddr); x 88 net/ipv6/ipcomp6.c memcpy(t->id.daddr.a6, x->id.daddr.a6, sizeof(struct in6_addr)); x 89 net/ipv6/ipcomp6.c memcpy(&t->sel, &x->sel, sizeof(t->sel)); x 91 net/ipv6/ipcomp6.c t->props.mode = x->props.mode; x 92 net/ipv6/ipcomp6.c memcpy(t->props.saddr.a6, x->props.saddr.a6, sizeof(struct in6_addr)); x 93 net/ipv6/ipcomp6.c memcpy(&t->mark, &x->mark, sizeof(t->mark)); x 110 net/ipv6/ipcomp6.c static int ipcomp6_tunnel_attach(struct xfrm_state *x) x 112 net/ipv6/ipcomp6.c struct net *net = xs_net(x); x 116 net/ipv6/ipcomp6.c u32 mark = x->mark.m & x->mark.v; x 118 net/ipv6/ipcomp6.c spi = xfrm6_tunnel_spi_lookup(net, (xfrm_address_t *)&x->props.saddr); x 120 net/ipv6/ipcomp6.c t = xfrm_state_lookup(net, mark, (xfrm_address_t *)&x->id.daddr, x 123 net/ipv6/ipcomp6.c t = ipcomp6_tunnel_create(x); x 131 net/ipv6/ipcomp6.c x->tunnel = t; x 138 net/ipv6/ipcomp6.c static int ipcomp6_init_state(struct xfrm_state *x) x 142 net/ipv6/ipcomp6.c x->props.header_len = 0; x 143 net/ipv6/ipcomp6.c switch (x->props.mode) { x 147 net/ipv6/ipcomp6.c x->props.header_len += sizeof(struct ipv6hdr); x 153 net/ipv6/ipcomp6.c err = ipcomp_init_state(x); x 157 net/ipv6/ipcomp6.c if (x->props.mode == XFRM_MODE_TUNNEL) { x 158 net/ipv6/ipcomp6.c err = ipcomp6_tunnel_attach(x); x 119 net/ipv6/mip6.c static int mip6_destopt_input(struct xfrm_state *x, struct sk_buff *skb) x 125 net/ipv6/mip6.c spin_lock(&x->lock); x 126 net/ipv6/mip6.c if (!ipv6_addr_equal(&iph->saddr, (struct in6_addr *)x->coaddr) && x 127 net/ipv6/mip6.c !ipv6_addr_any((struct in6_addr *)x->coaddr)) x 129 net/ipv6/mip6.c spin_unlock(&x->lock); x 138 net/ipv6/mip6.c static int mip6_destopt_output(struct xfrm_state *x, struct sk_buff *skb) x 165 net/ipv6/mip6.c spin_lock_bh(&x->lock); x 166 net/ipv6/mip6.c memcpy(&iph->saddr, x->coaddr, sizeof(iph->saddr)); x 167 net/ipv6/mip6.c spin_unlock_bh(&x->lock); x 169 net/ipv6/mip6.c WARN_ON(len != x->props.header_len); x 170 net/ipv6/mip6.c dstopt->hdrlen = (x->props.header_len >> 3) - 1; x 196 net/ipv6/mip6.c static int mip6_destopt_reject(struct xfrm_state *x, struct sk_buff *skb, x 199 net/ipv6/mip6.c struct net *net = xs_net(x); x 250 net/ipv6/mip6.c static int mip6_destopt_offset(struct xfrm_state *x, struct sk_buff *skb, x 298 net/ipv6/mip6.c static int mip6_destopt_init_state(struct xfrm_state *x) x 300 net/ipv6/mip6.c if (x->id.spi) { x 301 net/ipv6/mip6.c pr_info("%s: spi is not 0: %u\n", __func__, x->id.spi); x 304 net/ipv6/mip6.c if (x->props.mode != XFRM_MODE_ROUTEOPTIMIZATION) { x 306 net/ipv6/mip6.c __func__, XFRM_MODE_ROUTEOPTIMIZATION, x->props.mode); x 310 net/ipv6/mip6.c x->props.header_len = sizeof(struct ipv6_destopt_hdr) + x 313 net/ipv6/mip6.c WARN_ON(x->props.header_len != 24); x 322 net/ipv6/mip6.c static void mip6_destopt_destroy(struct xfrm_state *x) x 339 net/ipv6/mip6.c static int mip6_rthdr_input(struct xfrm_state *x, struct sk_buff *skb) x 345 net/ipv6/mip6.c spin_lock(&x->lock); x 346 net/ipv6/mip6.c if (!ipv6_addr_equal(&iph->daddr, (struct in6_addr *)x->coaddr) && x 347 net/ipv6/mip6.c !ipv6_addr_any((struct in6_addr *)x->coaddr)) x 349 net/ipv6/mip6.c spin_unlock(&x->lock); x 357 net/ipv6/mip6.c static int mip6_rthdr_output(struct xfrm_state *x, struct sk_buff *skb) x 371 net/ipv6/mip6.c rt2->rt_hdr.hdrlen = (x->props.header_len >> 3) - 1; x 379 net/ipv6/mip6.c spin_lock_bh(&x->lock); x 380 net/ipv6/mip6.c memcpy(&iph->daddr, x->coaddr, sizeof(iph->daddr)); x 381 net/ipv6/mip6.c spin_unlock_bh(&x->lock); x 386 net/ipv6/mip6.c static int mip6_rthdr_offset(struct xfrm_state *x, struct sk_buff *skb, x 433 net/ipv6/mip6.c static int mip6_rthdr_init_state(struct xfrm_state *x) x 435 net/ipv6/mip6.c if (x->id.spi) { x 436 net/ipv6/mip6.c pr_info("%s: spi is not 0: %u\n", __func__, x->id.spi); x 439 net/ipv6/mip6.c if (x->props.mode != XFRM_MODE_ROUTEOPTIMIZATION) { x 441 net/ipv6/mip6.c __func__, XFRM_MODE_ROUTEOPTIMIZATION, x->props.mode); x 445 net/ipv6/mip6.c x->props.header_len = sizeof(struct rt2_hdr); x 454 net/ipv6/mip6.c static void mip6_rthdr_destroy(struct xfrm_state *x) x 414 net/ipv6/sit.c struct ip_tunnel_prl_entry *x; x 422 net/ipv6/sit.c (x = rtnl_dereference(*p)) != NULL; x 423 net/ipv6/sit.c p = &x->next) { x 424 net/ipv6/sit.c if (x->addr == a->addr) { x 425 net/ipv6/sit.c *p = x->next; x 426 net/ipv6/sit.c kfree_rcu(x, rcu_head); x 433 net/ipv6/sit.c x = rtnl_dereference(t->prl); x 434 net/ipv6/sit.c if (x) { x 436 net/ipv6/sit.c call_rcu(&x->rcu_head, prl_list_destroy_rcu); x 20 net/ipv6/xfrm6_input.c int xfrm6_extract_input(struct xfrm_state *x, struct sk_buff *skb) x 88 net/ipv6/xfrm6_input.c struct xfrm_state *x = NULL; x 123 net/ipv6/xfrm6_input.c x = xfrm_state_lookup_byaddr(net, skb->mark, dst, src, proto, AF_INET6); x 124 net/ipv6/xfrm6_input.c if (!x) x 127 net/ipv6/xfrm6_input.c spin_lock(&x->lock); x 129 net/ipv6/xfrm6_input.c if ((!i || (x->props.flags & XFRM_STATE_WILDRECV)) && x 130 net/ipv6/xfrm6_input.c likely(x->km.state == XFRM_STATE_VALID) && x 131 net/ipv6/xfrm6_input.c !xfrm_state_check_expire(x)) { x 132 net/ipv6/xfrm6_input.c spin_unlock(&x->lock); x 133 net/ipv6/xfrm6_input.c if (x->type->input(x, skb) > 0) { x 138 net/ipv6/xfrm6_input.c spin_unlock(&x->lock); x 140 net/ipv6/xfrm6_input.c xfrm_state_put(x); x 141 net/ipv6/xfrm6_input.c x = NULL; x 144 net/ipv6/xfrm6_input.c if (!x) { x 150 net/ipv6/xfrm6_input.c sp->xvec[sp->len++] = x; x 152 net/ipv6/xfrm6_input.c spin_lock(&x->lock); x 154 net/ipv6/xfrm6_input.c x->curlft.bytes += skb->len; x 155 net/ipv6/xfrm6_input.c x->curlft.packets++; x 157 net/ipv6/xfrm6_input.c spin_unlock(&x->lock); x 19 net/ipv6/xfrm6_output.c int xfrm6_find_1stfragopt(struct xfrm_state *x, struct sk_buff *skb, x 97 net/ipv6/xfrm6_output.c int xfrm6_extract_output(struct xfrm_state *x, struct sk_buff *skb) x 119 net/ipv6/xfrm6_output.c static int __xfrm6_output_state_finish(struct xfrm_state *x, struct sock *sk, x 126 net/ipv6/xfrm6_output.c afinfo = xfrm_state_afinfo_get_rcu(x->outer_mode.family); x 138 net/ipv6/xfrm6_output.c struct xfrm_state *x = skb_dst(skb)->xfrm; x 140 net/ipv6/xfrm6_output.c return __xfrm6_output_state_finish(x, sk, skb); x 146 net/ipv6/xfrm6_output.c struct xfrm_state *x = dst->xfrm; x 151 net/ipv6/xfrm6_output.c if (!x) { x 157 net/ipv6/xfrm6_output.c if (x->props.mode != XFRM_MODE_TUNNEL) x 182 net/ipv6/xfrm6_output.c return __xfrm6_output_state_finish(x, sk, skb); x 211 net/ipv6/xfrm6_tunnel.c static int xfrm6_tunnel_output(struct xfrm_state *x, struct sk_buff *skb) x 217 net/ipv6/xfrm6_tunnel.c static int xfrm6_tunnel_input(struct xfrm_state *x, struct sk_buff *skb) x 273 net/ipv6/xfrm6_tunnel.c static int xfrm6_tunnel_init_state(struct xfrm_state *x) x 275 net/ipv6/xfrm6_tunnel.c if (x->props.mode != XFRM_MODE_TUNNEL) x 278 net/ipv6/xfrm6_tunnel.c if (x->encap) x 281 net/ipv6/xfrm6_tunnel.c x->props.header_len = sizeof(struct ipv6hdr); x 286 net/ipv6/xfrm6_tunnel.c static void xfrm6_tunnel_destroy(struct xfrm_state *x) x 288 net/ipv6/xfrm6_tunnel.c struct net *net = xs_net(x); x 290 net/ipv6/xfrm6_tunnel.c xfrm6_tunnel_free_spi(net, (xfrm_address_t *)&x->props.saddr); x 32 net/key/af_key.c #define _X2KEY(x) ((x) == XFRM_INF ? 0 : (x)) x 33 net/key/af_key.c #define _KEY2X(x) ((x) == 0 ? XFRM_INF : (x)) x 764 net/key/af_key.c static struct sk_buff *__pfkey_xfrm_state2msg(const struct xfrm_state *x, x 785 net/key/af_key.c sockaddr_size = pfkey_sockaddr_size(x->props.family); x 799 net/key/af_key.c if ((xfrm_ctx = x->security)) { x 805 net/key/af_key.c if (!xfrm_addr_equal(&x->sel.saddr, &x->props.saddr, x->props.family)) x 809 net/key/af_key.c if (x->aalg && x->aalg->alg_key_len) { x 811 net/key/af_key.c PFKEY_ALIGN8((x->aalg->alg_key_len + 7) / 8); x 814 net/key/af_key.c if (x->ealg && x->ealg->alg_key_len) { x 816 net/key/af_key.c PFKEY_ALIGN8((x->ealg->alg_key_len+7) / 8); x 820 net/key/af_key.c if (x->encap) x 821 net/key/af_key.c natt = x->encap; x 842 net/key/af_key.c sa->sadb_sa_spi = x->id.spi; x 843 net/key/af_key.c sa->sadb_sa_replay = x->props.replay_window; x 844 net/key/af_key.c switch (x->km.state) { x 846 net/key/af_key.c sa->sadb_sa_state = x->km.dying ? x 857 net/key/af_key.c if (x->aalg) { x 858 net/key/af_key.c struct xfrm_algo_desc *a = xfrm_aalg_get_byname(x->aalg->alg_name, 0); x 863 net/key/af_key.c BUG_ON(x->ealg && x->calg); x 864 net/key/af_key.c if (x->ealg) { x 865 net/key/af_key.c struct xfrm_algo_desc *a = xfrm_ealg_get_byname(x->ealg->alg_name, 0); x 870 net/key/af_key.c if (x->calg) { x 871 net/key/af_key.c struct xfrm_algo_desc *a = xfrm_calg_get_byname(x->calg->alg_name, 0); x 877 net/key/af_key.c if (x->props.flags & XFRM_STATE_NOECN) x 879 net/key/af_key.c if (x->props.flags & XFRM_STATE_DECAP_DSCP) x 881 net/key/af_key.c if (x->props.flags & XFRM_STATE_NOPMTUDISC) x 890 net/key/af_key.c lifetime->sadb_lifetime_allocations = _X2KEY(x->lft.hard_packet_limit); x 891 net/key/af_key.c lifetime->sadb_lifetime_bytes = _X2KEY(x->lft.hard_byte_limit); x 892 net/key/af_key.c lifetime->sadb_lifetime_addtime = x->lft.hard_add_expires_seconds; x 893 net/key/af_key.c lifetime->sadb_lifetime_usetime = x->lft.hard_use_expires_seconds; x 901 net/key/af_key.c lifetime->sadb_lifetime_allocations = _X2KEY(x->lft.soft_packet_limit); x 902 net/key/af_key.c lifetime->sadb_lifetime_bytes = _X2KEY(x->lft.soft_byte_limit); x 903 net/key/af_key.c lifetime->sadb_lifetime_addtime = x->lft.soft_add_expires_seconds; x 904 net/key/af_key.c lifetime->sadb_lifetime_usetime = x->lft.soft_use_expires_seconds; x 911 net/key/af_key.c lifetime->sadb_lifetime_allocations = x->curlft.packets; x 912 net/key/af_key.c lifetime->sadb_lifetime_bytes = x->curlft.bytes; x 913 net/key/af_key.c lifetime->sadb_lifetime_addtime = x->curlft.add_time; x 914 net/key/af_key.c lifetime->sadb_lifetime_usetime = x->curlft.use_time; x 928 net/key/af_key.c pfkey_sockaddr_fill(&x->props.saddr, 0, x 930 net/key/af_key.c x->props.family); x 943 net/key/af_key.c pfkey_sockaddr_fill(&x->id.daddr, 0, x 945 net/key/af_key.c x->props.family); x 948 net/key/af_key.c if (!xfrm_addr_equal(&x->sel.saddr, &x->props.saddr, x 949 net/key/af_key.c x->props.family)) { x 957 net/key/af_key.c pfkey_proto_from_xfrm(x->sel.proto); x 958 net/key/af_key.c addr->sadb_address_prefixlen = x->sel.prefixlen_s; x 961 net/key/af_key.c pfkey_sockaddr_fill(&x->sel.saddr, x->sel.sport, x 963 net/key/af_key.c x->props.family); x 972 net/key/af_key.c key->sadb_key_bits = x->aalg->alg_key_len; x 974 net/key/af_key.c memcpy(key + 1, x->aalg->alg_key, (x->aalg->alg_key_len+7)/8); x 982 net/key/af_key.c key->sadb_key_bits = x->ealg->alg_key_len; x 984 net/key/af_key.c memcpy(key + 1, x->ealg->alg_key, x 985 net/key/af_key.c (x->ealg->alg_key_len+7)/8); x 992 net/key/af_key.c if ((mode = pfkey_mode_from_xfrm(x->props.mode)) < 0) { x 1000 net/key/af_key.c sa2->sadb_x_sa2_reqid = x->props.reqid; x 1048 net/key/af_key.c static inline struct sk_buff *pfkey_xfrm_state2msg(const struct xfrm_state *x) x 1052 net/key/af_key.c skb = __pfkey_xfrm_state2msg(x, 1, 3); x 1057 net/key/af_key.c static inline struct sk_buff *pfkey_xfrm_state2msg_expire(const struct xfrm_state *x, x 1060 net/key/af_key.c return __pfkey_xfrm_state2msg(x, 0, hsc); x 1067 net/key/af_key.c struct xfrm_state *x; x 1126 net/key/af_key.c x = xfrm_state_alloc(net); x 1127 net/key/af_key.c if (x == NULL) x 1130 net/key/af_key.c x->id.proto = proto; x 1131 net/key/af_key.c x->id.spi = sa->sadb_sa_spi; x 1132 net/key/af_key.c x->props.replay_window = min_t(unsigned int, sa->sadb_sa_replay, x 1133 net/key/af_key.c (sizeof(x->replay.bitmap) * 8)); x 1135 net/key/af_key.c x->props.flags |= XFRM_STATE_NOECN; x 1137 net/key/af_key.c x->props.flags |= XFRM_STATE_DECAP_DSCP; x 1139 net/key/af_key.c x->props.flags |= XFRM_STATE_NOPMTUDISC; x 1143 net/key/af_key.c x->lft.hard_packet_limit = _KEY2X(lifetime->sadb_lifetime_allocations); x 1144 net/key/af_key.c x->lft.hard_byte_limit = _KEY2X(lifetime->sadb_lifetime_bytes); x 1145 net/key/af_key.c x->lft.hard_add_expires_seconds = lifetime->sadb_lifetime_addtime; x 1146 net/key/af_key.c x->lft.hard_use_expires_seconds = lifetime->sadb_lifetime_usetime; x 1150 net/key/af_key.c x->lft.soft_packet_limit = _KEY2X(lifetime->sadb_lifetime_allocations); x 1151 net/key/af_key.c x->lft.soft_byte_limit = _KEY2X(lifetime->sadb_lifetime_bytes); x 1152 net/key/af_key.c x->lft.soft_add_expires_seconds = lifetime->sadb_lifetime_addtime; x 1153 net/key/af_key.c x->lft.soft_use_expires_seconds = lifetime->sadb_lifetime_usetime; x 1163 net/key/af_key.c err = security_xfrm_state_alloc(x, uctx); x 1181 net/key/af_key.c x->aalg = kmalloc(sizeof(*x->aalg) + keysize, GFP_KERNEL); x 1182 net/key/af_key.c if (!x->aalg) { x 1186 net/key/af_key.c strcpy(x->aalg->alg_name, a->name); x 1187 net/key/af_key.c x->aalg->alg_key_len = 0; x 1189 net/key/af_key.c x->aalg->alg_key_len = key->sadb_key_bits; x 1190 net/key/af_key.c memcpy(x->aalg->alg_key, key+1, keysize); x 1192 net/key/af_key.c x->aalg->alg_trunc_len = a->uinfo.auth.icv_truncbits; x 1193 net/key/af_key.c x->props.aalgo = sa->sadb_sa_auth; x 1203 net/key/af_key.c x->calg = kmalloc(sizeof(*x->calg), GFP_KERNEL); x 1204 net/key/af_key.c if (!x->calg) { x 1208 net/key/af_key.c strcpy(x->calg->alg_name, a->name); x 1209 net/key/af_key.c x->props.calgo = sa->sadb_sa_encrypt; x 1220 net/key/af_key.c x->ealg = kmalloc(sizeof(*x->ealg) + keysize, GFP_KERNEL); x 1221 net/key/af_key.c if (!x->ealg) { x 1225 net/key/af_key.c strcpy(x->ealg->alg_name, a->name); x 1226 net/key/af_key.c x->ealg->alg_key_len = 0; x 1228 net/key/af_key.c x->ealg->alg_key_len = key->sadb_key_bits; x 1229 net/key/af_key.c memcpy(x->ealg->alg_key, key+1, keysize); x 1231 net/key/af_key.c x->props.ealgo = sa->sadb_sa_encrypt; x 1232 net/key/af_key.c x->geniv = a->uinfo.encr.geniv; x 1237 net/key/af_key.c x->props.family = pfkey_sadb_addr2xfrm_addr((struct sadb_address *) ext_hdrs[SADB_EXT_ADDRESS_SRC-1], x 1238 net/key/af_key.c &x->props.saddr); x 1240 net/key/af_key.c &x->id.daddr); x 1249 net/key/af_key.c x->props.mode = mode; x 1250 net/key/af_key.c x->props.reqid = sa2->sadb_x_sa2_reqid; x 1257 net/key/af_key.c x->sel.family = pfkey_sadb_addr2xfrm_addr(addr, &x->sel.saddr); x 1258 net/key/af_key.c x->sel.prefixlen_s = addr->sadb_address_prefixlen; x 1261 net/key/af_key.c if (!x->sel.family) x 1262 net/key/af_key.c x->sel.family = x->props.family; x 1268 net/key/af_key.c x->encap = kmalloc(sizeof(*x->encap), GFP_KERNEL); x 1269 net/key/af_key.c if (!x->encap) { x 1274 net/key/af_key.c natt = x->encap; x 1291 net/key/af_key.c err = xfrm_init_state(x); x 1295 net/key/af_key.c x->km.seq = hdr->sadb_msg_seq; x 1296 net/key/af_key.c return x; x 1299 net/key/af_key.c x->km.state = XFRM_STATE_DEAD; x 1300 net/key/af_key.c xfrm_state_put(x); x 1317 net/key/af_key.c struct xfrm_state *x = NULL; x 1362 net/key/af_key.c x = xfrm_find_acq_byseq(net, DUMMY_MARK, hdr->sadb_msg_seq); x 1363 net/key/af_key.c if (x && !xfrm_addr_equal(&x->id.daddr, xdaddr, family)) { x 1364 net/key/af_key.c xfrm_state_put(x); x 1365 net/key/af_key.c x = NULL; x 1369 net/key/af_key.c if (!x) x 1370 net/key/af_key.c x = xfrm_find_acq(net, &dummy_mark, mode, reqid, 0, proto, xdaddr, xsaddr, 1, family); x 1372 net/key/af_key.c if (x == NULL) x 1384 net/key/af_key.c err = verify_spi_info(x->id.proto, min_spi, max_spi); x 1386 net/key/af_key.c xfrm_state_put(x); x 1390 net/key/af_key.c err = xfrm_alloc_spi(x, min_spi, max_spi); x 1391 net/key/af_key.c resp_skb = err ? ERR_PTR(err) : pfkey_xfrm_state2msg(x); x 1394 net/key/af_key.c xfrm_state_put(x); x 1407 net/key/af_key.c xfrm_state_put(x); x 1417 net/key/af_key.c struct xfrm_state *x; x 1425 net/key/af_key.c x = xfrm_find_acq_byseq(net, DUMMY_MARK, hdr->sadb_msg_seq); x 1426 net/key/af_key.c if (x == NULL) x 1429 net/key/af_key.c spin_lock_bh(&x->lock); x 1430 net/key/af_key.c if (x->km.state == XFRM_STATE_ACQ) x 1431 net/key/af_key.c x->km.state = XFRM_STATE_ERROR; x 1433 net/key/af_key.c spin_unlock_bh(&x->lock); x 1434 net/key/af_key.c xfrm_state_put(x); x 1477 net/key/af_key.c static int key_notify_sa(struct xfrm_state *x, const struct km_event *c) x 1482 net/key/af_key.c skb = pfkey_xfrm_state2msg(x); x 1490 net/key/af_key.c hdr->sadb_msg_satype = pfkey_proto2satype(x->id.proto); x 1496 net/key/af_key.c pfkey_broadcast(skb, GFP_ATOMIC, BROADCAST_ALL, NULL, xs_net(x)); x 1504 net/key/af_key.c struct xfrm_state *x; x 1508 net/key/af_key.c x = pfkey_msg2xfrm_state(net, hdr, ext_hdrs); x 1509 net/key/af_key.c if (IS_ERR(x)) x 1510 net/key/af_key.c return PTR_ERR(x); x 1512 net/key/af_key.c xfrm_state_hold(x); x 1514 net/key/af_key.c err = xfrm_state_add(x); x 1516 net/key/af_key.c err = xfrm_state_update(x); x 1518 net/key/af_key.c xfrm_audit_state_add(x, err ? 0 : 1, true); x 1521 net/key/af_key.c x->km.state = XFRM_STATE_DEAD; x 1522 net/key/af_key.c __xfrm_state_put(x); x 1532 net/key/af_key.c km_state_notify(x, &c); x 1534 net/key/af_key.c xfrm_state_put(x); x 1541 net/key/af_key.c struct xfrm_state *x; x 1550 net/key/af_key.c x = pfkey_xfrm_state_lookup(net, hdr, ext_hdrs); x 1551 net/key/af_key.c if (x == NULL) x 1554 net/key/af_key.c if ((err = security_xfrm_state_delete(x))) x 1557 net/key/af_key.c if (xfrm_state_kern(x)) { x 1562 net/key/af_key.c err = xfrm_state_delete(x); x 1570 net/key/af_key.c km_state_notify(x, &c); x 1572 net/key/af_key.c xfrm_audit_state_delete(x, err ? 0 : 1, true); x 1573 net/key/af_key.c xfrm_state_put(x); x 1584 net/key/af_key.c struct xfrm_state *x; x 1591 net/key/af_key.c x = pfkey_xfrm_state_lookup(net, hdr, ext_hdrs); x 1592 net/key/af_key.c if (x == NULL) x 1595 net/key/af_key.c out_skb = pfkey_xfrm_state2msg(x); x 1596 net/key/af_key.c proto = x->id.proto; x 1597 net/key/af_key.c xfrm_state_put(x); x 1788 net/key/af_key.c static int dump_sa(struct xfrm_state *x, int count, void *ptr) x 1797 net/key/af_key.c out_skb = pfkey_xfrm_state2msg(x); x 1804 net/key/af_key.c out_hdr->sadb_msg_satype = pfkey_proto2satype(x->id.proto); x 3021 net/key/af_key.c static int key_notify_sa_expire(struct xfrm_state *x, const struct km_event *c) x 3034 net/key/af_key.c out_skb = pfkey_xfrm_state2msg_expire(x, hsc); x 3041 net/key/af_key.c out_hdr->sadb_msg_satype = pfkey_proto2satype(x->id.proto); x 3048 net/key/af_key.c xs_net(x)); x 3052 net/key/af_key.c static int pfkey_send_notify(struct xfrm_state *x, const struct km_event *c) x 3054 net/key/af_key.c struct net *net = x ? xs_net(x) : c->net; x 3062 net/key/af_key.c return key_notify_sa_expire(x, c); x 3066 net/key/af_key.c return key_notify_sa(x, c); x 3132 net/key/af_key.c static int pfkey_send_acquire(struct xfrm_state *x, struct xfrm_tmpl *t, struct xfrm_policy *xp) x 3144 net/key/af_key.c sockaddr_size = pfkey_sockaddr_size(x->props.family); x 3153 net/key/af_key.c if (x->id.proto == IPPROTO_AH) x 3155 net/key/af_key.c else if (x->id.proto == IPPROTO_ESP) x 3158 net/key/af_key.c if ((xfrm_ctx = x->security)) { x 3170 net/key/af_key.c hdr->sadb_msg_satype = pfkey_proto2satype(x->id.proto); x 3174 net/key/af_key.c hdr->sadb_msg_seq = x->km.seq = get_acqseq(); x 3186 net/key/af_key.c pfkey_sockaddr_fill(&x->props.saddr, 0, x 3188 net/key/af_key.c x->props.family); x 3201 net/key/af_key.c pfkey_sockaddr_fill(&x->id.daddr, 0, x 3203 net/key/af_key.c x->props.family); x 3217 net/key/af_key.c if (x->id.proto == IPPROTO_AH) x 3219 net/key/af_key.c else if (x->id.proto == IPPROTO_ESP) x 3237 net/key/af_key.c xs_net(x)); x 3328 net/key/af_key.c static int pfkey_send_new_mapping(struct xfrm_state *x, xfrm_address_t *ipaddr, __be16 sport) x 3337 net/key/af_key.c __u8 satype = (x->id.proto == IPPROTO_ESP ? SADB_SATYPE_ESP : 0); x 3340 net/key/af_key.c sockaddr_size = pfkey_sockaddr_size(x->props.family); x 3347 net/key/af_key.c if (!x->encap) x 3350 net/key/af_key.c natt = x->encap; x 3375 net/key/af_key.c hdr->sadb_msg_seq = x->km.seq = get_acqseq(); x 3382 net/key/af_key.c sa->sadb_sa_spi = x->id.spi; x 3398 net/key/af_key.c pfkey_sockaddr_fill(&x->props.saddr, 0, x 3400 net/key/af_key.c x->props.family); x 3422 net/key/af_key.c x->props.family); x 3434 net/key/af_key.c xs_net(x)); x 39 net/mac80211/mesh_hwmp.c #define AE_F_SET(x) (*x & AE_F) x 40 net/mac80211/mesh_hwmp.c #define PREQ_IE_FLAGS(x) (*(x)) x 41 net/mac80211/mesh_hwmp.c #define PREQ_IE_HOPCOUNT(x) (*(x + 1)) x 42 net/mac80211/mesh_hwmp.c #define PREQ_IE_TTL(x) (*(x + 2)) x 43 net/mac80211/mesh_hwmp.c #define PREQ_IE_PREQ_ID(x) u32_field_get(x, 3, 0) x 44 net/mac80211/mesh_hwmp.c #define PREQ_IE_ORIG_ADDR(x) (x + 7) x 45 net/mac80211/mesh_hwmp.c #define PREQ_IE_ORIG_SN(x) u32_field_get(x, 13, 0) x 46 net/mac80211/mesh_hwmp.c #define PREQ_IE_LIFETIME(x) u32_field_get(x, 17, AE_F_SET(x)) x 47 net/mac80211/mesh_hwmp.c #define PREQ_IE_METRIC(x) u32_field_get(x, 21, AE_F_SET(x)) x 48 net/mac80211/mesh_hwmp.c #define PREQ_IE_TARGET_F(x) (*(AE_F_SET(x) ? x + 32 : x + 26)) x 49 net/mac80211/mesh_hwmp.c #define PREQ_IE_TARGET_ADDR(x) (AE_F_SET(x) ? x + 33 : x + 27) x 50 net/mac80211/mesh_hwmp.c #define PREQ_IE_TARGET_SN(x) u32_field_get(x, 33, AE_F_SET(x)) x 53 net/mac80211/mesh_hwmp.c #define PREP_IE_FLAGS(x) PREQ_IE_FLAGS(x) x 54 net/mac80211/mesh_hwmp.c #define PREP_IE_HOPCOUNT(x) PREQ_IE_HOPCOUNT(x) x 55 net/mac80211/mesh_hwmp.c #define PREP_IE_TTL(x) PREQ_IE_TTL(x) x 56 net/mac80211/mesh_hwmp.c #define PREP_IE_ORIG_ADDR(x) (AE_F_SET(x) ? x + 27 : x + 21) x 57 net/mac80211/mesh_hwmp.c #define PREP_IE_ORIG_SN(x) u32_field_get(x, 27, AE_F_SET(x)) x 58 net/mac80211/mesh_hwmp.c #define PREP_IE_LIFETIME(x) u32_field_get(x, 13, AE_F_SET(x)) x 59 net/mac80211/mesh_hwmp.c #define PREP_IE_METRIC(x) u32_field_get(x, 17, AE_F_SET(x)) x 60 net/mac80211/mesh_hwmp.c #define PREP_IE_TARGET_ADDR(x) (x + 3) x 61 net/mac80211/mesh_hwmp.c #define PREP_IE_TARGET_SN(x) u32_field_get(x, 9, 0) x 63 net/mac80211/mesh_hwmp.c #define PERR_IE_TTL(x) (*(x)) x 64 net/mac80211/mesh_hwmp.c #define PERR_IE_TARGET_FLAGS(x) (*(x + 2)) x 65 net/mac80211/mesh_hwmp.c #define PERR_IE_TARGET_ADDR(x) (x + 3) x 66 net/mac80211/mesh_hwmp.c #define PERR_IE_TARGET_SN(x) u32_field_get(x, 9, 0) x 67 net/mac80211/mesh_hwmp.c #define PERR_IE_TARGET_RCODE(x) u16_field_get(x, 13, 0) x 69 net/mac80211/mesh_hwmp.c #define MSEC_TO_TU(x) (x*1000/1024) x 70 net/mac80211/mesh_hwmp.c #define SN_GT(x, y) ((s32)(y - x) < 0) x 71 net/mac80211/mesh_hwmp.c #define SN_LT(x, y) ((s32)(x - y) < 0) x 74 net/mac80211/mesh_hwmp.c static inline u32 SN_DELTA(u32 x, u32 y) x 76 net/mac80211/mesh_hwmp.c return x >= y ? x - y : y - x; x 121 net/netfilter/ipset/ip_set_bitmap_gen.h void *x = get_ext(set, map, e->id); x 126 net/netfilter/ipset/ip_set_bitmap_gen.h return ip_set_match_extensions(set, ext, mext, flags, x); x 135 net/netfilter/ipset/ip_set_bitmap_gen.h void *x = get_ext(set, map, e->id); x 140 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_timeout_expired(ext_timeout(x, set))) { x 148 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_ext_destroy(set, x); x 155 net/netfilter/ipset/ip_set_bitmap_gen.h mtype_add_timeout(ext_timeout(x, set), e, ext, set, map, ret); x 157 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_timeout_set(ext_timeout(x, set), ext->timeout); x 161 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_init_counter(ext_counter(x, set), ext); x 163 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_init_comment(set, ext_comment(x, set), ext); x 165 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_init_skbinfo(ext_skbinfo(x, set), ext); x 180 net/netfilter/ipset/ip_set_bitmap_gen.h void *x = get_ext(set, map, e->id); x 185 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_ext_destroy(set, x); x 188 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_timeout_expired(ext_timeout(x, set))) x 196 net/netfilter/ipset/ip_set_bitmap_gen.h mtype_is_filled(const struct mtype_elem *x) x 208 net/netfilter/ipset/ip_set_bitmap_gen.h void *x; x 221 net/netfilter/ipset/ip_set_bitmap_gen.h x = get_ext(set, map, id); x 225 net/netfilter/ipset/ip_set_bitmap_gen.h mtype_is_filled(x) && x 227 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_timeout_expired(ext_timeout(x, set)))) x 241 net/netfilter/ipset/ip_set_bitmap_gen.h if (ip_set_put_extensions(skb, set, x, mtype_is_filled(x))) x 269 net/netfilter/ipset/ip_set_bitmap_gen.h void *x; x 278 net/netfilter/ipset/ip_set_bitmap_gen.h x = get_ext(set, map, id); x 279 net/netfilter/ipset/ip_set_bitmap_gen.h if (ip_set_timeout_expired(ext_timeout(x, set))) { x 281 net/netfilter/ipset/ip_set_bitmap_gen.h ip_set_ext_destroy(set, x); x 199 net/netfilter/ipset/ip_set_bitmap_ip.c const struct bitmap_ip *x = a->data; x 202 net/netfilter/ipset/ip_set_bitmap_ip.c return x->first_ip == y->first_ip && x 203 net/netfilter/ipset/ip_set_bitmap_ip.c x->last_ip == y->last_ip && x 204 net/netfilter/ipset/ip_set_bitmap_ip.c x->netmask == y->netmask && x 283 net/netfilter/ipset/ip_set_bitmap_ipmac.c const struct bitmap_ipmac *x = a->data; x 286 net/netfilter/ipset/ip_set_bitmap_ipmac.c return x->first_ip == y->first_ip && x 287 net/netfilter/ipset/ip_set_bitmap_ipmac.c x->last_ip == y->last_ip && x 185 net/netfilter/ipset/ip_set_bitmap_port.c const struct bitmap_port *x = a->data; x 188 net/netfilter/ipset/ip_set_bitmap_port.c return x->first_port == y->first_port && x 189 net/netfilter/ipset/ip_set_bitmap_port.c x->last_port == y->last_port && x 497 net/netfilter/ipset/ip_set_hash_gen.h const struct htype *x = a->data; x 501 net/netfilter/ipset/ip_set_hash_gen.h return x->maxelem == y->maxelem && x 504 net/netfilter/ipset/ip_set_hash_gen.h x->netmask == y->netmask && x 507 net/netfilter/ipset/ip_set_hash_gen.h x->markmask == y->markmask && x 656 net/netfilter/ipset/ip_set_hash_gen.h struct mtype_resize_ad *x; x 791 net/netfilter/ipset/ip_set_hash_gen.h x = list_entry(l, struct mtype_resize_ad, list); x 792 net/netfilter/ipset/ip_set_hash_gen.h if (x->ad == IPSET_ADD) { x 793 net/netfilter/ipset/ip_set_hash_gen.h mtype_add(set, &x->d, &x->ext, &x->mext, x->flags); x 795 net/netfilter/ipset/ip_set_hash_gen.h mtype_del(set, &x->d, NULL, NULL, 0); x 1010 net/netfilter/ipset/ip_set_hash_gen.h struct mtype_resize_ad *x; x 1012 net/netfilter/ipset/ip_set_hash_gen.h x = kzalloc(sizeof(struct mtype_resize_ad), GFP_ATOMIC); x 1013 net/netfilter/ipset/ip_set_hash_gen.h if (!x) x 1016 net/netfilter/ipset/ip_set_hash_gen.h x->ad = IPSET_ADD; x 1017 net/netfilter/ipset/ip_set_hash_gen.h memcpy(&x->d, value, sizeof(struct mtype_elem)); x 1018 net/netfilter/ipset/ip_set_hash_gen.h memcpy(&x->ext, ext, sizeof(struct ip_set_ext)); x 1019 net/netfilter/ipset/ip_set_hash_gen.h memcpy(&x->mext, mext, sizeof(struct ip_set_ext)); x 1020 net/netfilter/ipset/ip_set_hash_gen.h x->flags = flags; x 1022 net/netfilter/ipset/ip_set_hash_gen.h list_add_tail(&x->list, &h->ad); x 1053 net/netfilter/ipset/ip_set_hash_gen.h struct mtype_resize_ad *x = NULL; x 1100 net/netfilter/ipset/ip_set_hash_gen.h x = kzalloc(sizeof(struct mtype_resize_ad), x 1102 net/netfilter/ipset/ip_set_hash_gen.h if (x) { x 1103 net/netfilter/ipset/ip_set_hash_gen.h x->ad = IPSET_DEL; x 1104 net/netfilter/ipset/ip_set_hash_gen.h memcpy(&x->d, value, x 1106 net/netfilter/ipset/ip_set_hash_gen.h x->flags = flags; x 1143 net/netfilter/ipset/ip_set_hash_gen.h if (x) { x 1145 net/netfilter/ipset/ip_set_hash_gen.h list_add(&x->list, &h->ad); x 540 net/netfilter/ipset/ip_set_list_set.c const struct list_set *x = a->data; x 543 net/netfilter/ipset/ip_set_list_set.c return x->size == y->size && x 3192 net/netfilter/nf_conntrack_netlink.c ctnetlink_change_expect(struct nf_conntrack_expect *x, x 3196 net/netfilter/nf_conntrack_netlink.c if (!del_timer(&x->timeout)) x 3199 net/netfilter/nf_conntrack_netlink.c x->timeout.expires = jiffies + x 3201 net/netfilter/nf_conntrack_netlink.c add_timer(&x->timeout); x 185 net/netfilter/nf_flow_table_core.c const struct flow_offload_tuple_rhash *x = ptr; x 187 net/netfilter/nf_flow_table_core.c if (memcmp(&x->tuple, tuple, offsetof(struct flow_offload_tuple, dir))) x 53 net/netfilter/nfnetlink_log.c #define PRINTR(x, args...) do { if (net_ratelimit()) \ x 54 net/netfilter/nfnetlink_log.c printk(x, ## args); } while (0); x 57 net/netfilter/nft_set_hash.c const struct nft_rhash_cmp_arg *x = arg->key; x 60 net/netfilter/nft_set_hash.c if (memcmp(nft_set_ext_key(&he->ext), x->key, x->set->klen)) x 64 net/netfilter/nft_set_hash.c if (!nft_set_elem_active(&he->ext, x->genmask)) x 464 net/netfilter/xt_hashlimit.c #define _POW2_BELOW2(x) ((x)|((x)>>1)) x 465 net/netfilter/xt_hashlimit.c #define _POW2_BELOW4(x) (_POW2_BELOW2(x)|_POW2_BELOW2((x)>>2)) x 466 net/netfilter/xt_hashlimit.c #define _POW2_BELOW8(x) (_POW2_BELOW4(x)|_POW2_BELOW4((x)>>4)) x 467 net/netfilter/xt_hashlimit.c #define _POW2_BELOW16(x) (_POW2_BELOW8(x)|_POW2_BELOW8((x)>>8)) x 468 net/netfilter/xt_hashlimit.c #define _POW2_BELOW32(x) (_POW2_BELOW16(x)|_POW2_BELOW16((x)>>16)) x 469 net/netfilter/xt_hashlimit.c #define _POW2_BELOW64(x) (_POW2_BELOW32(x)|_POW2_BELOW32((x)>>32)) x 470 net/netfilter/xt_hashlimit.c #define POW2_BELOW32(x) ((_POW2_BELOW32(x)>>1) + 1) x 471 net/netfilter/xt_hashlimit.c #define POW2_BELOW64(x) ((_POW2_BELOW64(x)>>1) + 1) x 55 net/netfilter/xt_limit.c #define _POW2_BELOW2(x) ((x)|((x)>>1)) x 56 net/netfilter/xt_limit.c #define _POW2_BELOW4(x) (_POW2_BELOW2(x)|_POW2_BELOW2((x)>>2)) x 57 net/netfilter/xt_limit.c #define _POW2_BELOW8(x) (_POW2_BELOW4(x)|_POW2_BELOW4((x)>>4)) x 58 net/netfilter/xt_limit.c #define _POW2_BELOW16(x) (_POW2_BELOW8(x)|_POW2_BELOW8((x)>>8)) x 59 net/netfilter/xt_limit.c #define _POW2_BELOW32(x) (_POW2_BELOW16(x)|_POW2_BELOW16((x)>>16)) x 60 net/netfilter/xt_limit.c #define POW2_BELOW32(x) ((_POW2_BELOW32(x)>>1) + 1) x 35 net/netfilter/xt_policy.c match_xfrm_state(const struct xfrm_state *x, const struct xt_policy_elem *e, x 38 net/netfilter/xt_policy.c #define MATCH_ADDR(x,y,z) (!e->match.x || \ x 39 net/netfilter/xt_policy.c (xt_addr_cmp(&e->x, &e->y, (const union nf_inet_addr *)(z), family) \ x 40 net/netfilter/xt_policy.c ^ e->invert.x)) x 41 net/netfilter/xt_policy.c #define MATCH(x,y) (!e->match.x || ((e->x == (y)) ^ e->invert.x)) x 43 net/netfilter/xt_policy.c return MATCH_ADDR(saddr, smask, &x->props.saddr) && x 44 net/netfilter/xt_policy.c MATCH_ADDR(daddr, dmask, &x->id.daddr) && x 45 net/netfilter/xt_policy.c MATCH(proto, x->id.proto) && x 46 net/netfilter/xt_policy.c MATCH(mode, x->props.mode) && x 47 net/netfilter/xt_policy.c MATCH(spi, x->id.spi) && x 48 net/netfilter/xt_policy.c MATCH(reqid, x->props.reqid); x 482 net/netlink/af_netlink.c const struct netlink_compare_arg *x = arg->key; x 485 net/netlink/af_netlink.c return nlk->portid != x->portid || x 486 net/netlink/af_netlink.c !net_eq(sock_net(&nlk->sk), read_pnet(&x->pnet)); x 20 net/netlink/af_netlink.h #define NLGRPSZ(x) (ALIGN(x, sizeof(unsigned long) * 8) / 8) x 21 net/netlink/af_netlink.h #define NLGRPLONGS(x) (NLGRPSZ(x)/sizeof(unsigned long)) x 81 net/netrom/nr_route.c static void re_sort_routes(struct nr_node *nr_node, int x, int y) x 83 net/netrom/nr_route.c if (nr_node->routes[y].quality > nr_node->routes[x].quality) { x 84 net/netrom/nr_route.c if (nr_node->which == x) x 87 net/netrom/nr_route.c nr_node->which = x; x 89 net/netrom/nr_route.c swap(nr_node->routes[x], nr_node->routes[y]); x 109 net/nfc/hci/llc_shdlc.c static bool llc_shdlc_x_lt_y_lteq_z(int x, int y, int z) x 111 net/nfc/hci/llc_shdlc.c if (x < z) x 112 net/nfc/hci/llc_shdlc.c return ((x < y) && (y <= z)) ? true : false; x 114 net/nfc/hci/llc_shdlc.c return ((y > x) || (y <= z)) ? true : false; x 118 net/nfc/hci/llc_shdlc.c static bool llc_shdlc_x_lteq_y_lt_z(int x, int y, int z) x 120 net/nfc/hci/llc_shdlc.c if (x <= z) x 121 net/nfc/hci/llc_shdlc.c return ((x <= y) && (y < z)) ? true : false; x 123 net/nfc/hci/llc_shdlc.c return ((y >= x) || (y < z)) ? true : false; x 174 net/packet/af_packet.c #define BLOCK_STATUS(x) ((x)->hdr.bh1.block_status) x 175 net/packet/af_packet.c #define BLOCK_NUM_PKTS(x) ((x)->hdr.bh1.num_pkts) x 176 net/packet/af_packet.c #define BLOCK_O2FP(x) ((x)->hdr.bh1.offset_to_first_pkt) x 177 net/packet/af_packet.c #define BLOCK_LEN(x) ((x)->hdr.bh1.blk_len) x 178 net/packet/af_packet.c #define BLOCK_SNUM(x) ((x)->hdr.bh1.seq_num) x 179 net/packet/af_packet.c #define BLOCK_O2PRIV(x) ((x)->offset_to_priv) x 180 net/packet/af_packet.c #define BLOCK_PRIV(x) ((void *)((char *)(x) + BLOCK_O2PRIV(x))) x 226 net/packet/af_packet.c #define GET_PBDQC_FROM_RB(x) ((struct tpacket_kbdq_core *)(&(x)->prb_bdqc)) x 227 net/packet/af_packet.c #define GET_PBLOCK_DESC(x, bid) \ x 228 net/packet/af_packet.c ((struct tpacket_block_desc *)((x)->pkbdq[(bid)].buffer)) x 229 net/packet/af_packet.c #define GET_CURR_PBLOCK_DESC_FROM_CORE(x) \ x 230 net/packet/af_packet.c ((struct tpacket_block_desc *)((x)->pkbdq[(x)->kactive_blk_num].buffer)) x 231 net/packet/af_packet.c #define GET_NEXT_PRB_BLK_NUM(x) \ x 232 net/packet/af_packet.c (((x)->kactive_blk_num < ((x)->knum_blocks-1)) ? \ x 233 net/packet/af_packet.c ((x)->kactive_blk_num+1) : 0) x 272 net/rds/threads.c u64 x, y; x 283 net/rds/threads.c x = be64_to_cpu(*++a1); x 285 net/rds/threads.c if (x < y) x 287 net/rds/threads.c else if (x > y) x 28 net/rxrpc/ar-internal.h u8 x[FCRYPT_BSIZE]; x 1129 net/rxrpc/key.c #define ENCODE(x) \ x 1131 net/rxrpc/key.c *xdr++ = htonl(x); \ x 1142 net/rxrpc/key.c #define ENCODE64(x) \ x 1144 net/rxrpc/key.c __be64 y = cpu_to_be64(x); \ x 136 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, &sg, &sg, tmpsize, iv.x); x 204 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, &sg, &sg, 8, iv.x); x 247 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, &sg[0], &sg[0], sizeof(rxkhdr), iv.x); x 262 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, sg, sg, len, iv.x); x 285 net/rxrpc/rxkad.c u32 x, y; x 306 net/rxrpc/rxkad.c memcpy(&iv, call->conn->csum_iv.x, sizeof(iv)); x 309 net/rxrpc/rxkad.c x = (call->cid & RXRPC_CHANNELMASK) << (32 - RXRPC_CIDSHIFT); x 310 net/rxrpc/rxkad.c x |= sp->hdr.seq & 0x3fffffff; x 312 net/rxrpc/rxkad.c call->crypto_buf[1] = htonl(x); x 317 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, &sg, &sg, 8, iv.x); x 385 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, sg, sg, 8, iv.x); x 477 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, sg, sg, len, iv.x); x 536 net/rxrpc/rxkad.c u32 x, y; x 549 net/rxrpc/rxkad.c memcpy(&iv, call->conn->csum_iv.x, sizeof(iv)); x 552 net/rxrpc/rxkad.c x = (call->cid & RXRPC_CHANNELMASK) << (32 - RXRPC_CIDSHIFT); x 553 net/rxrpc/rxkad.c x |= seq & 0x3fffffff; x 555 net/rxrpc/rxkad.c call->crypto_buf[1] = htonl(x); x 560 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, &sg, &sg, 8, iv.x); x 799 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, sg, sg, sizeof(resp->encrypted), iv.x); x 943 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, sg, sg, ticket_len, iv.x); x 1064 net/rxrpc/rxkad.c if (crypto_sync_skcipher_setkey(rxkad_ci, session_key->x, x 1074 net/rxrpc/rxkad.c skcipher_request_set_crypt(req, sg, sg, sizeof(resp->encrypted), iv.x); x 23 net/sched/sch_etf.c #define DEADLINE_MODE_IS_ON(x) ((x)->flags & TC_ETF_DEADLINE_MODE_ON) x 24 net/sched/sch_etf.c #define OFFLOAD_IS_ON(x) ((x)->flags & TC_ETF_OFFLOAD_ON) x 25 net/sched/sch_etf.c #define SKIP_SOCK_CHECK_IS_SET(x) ((x)->flags & TC_ETF_SKIP_SOCK_CHECK) x 95 net/sched/sch_hfsc.c u64 x; /* current starting position on x-axis */ x 383 net/sched/sch_hfsc.c seg_x2y(u64 x, u64 sm) x 392 net/sched/sch_hfsc.c y = (x >> SM_SHIFT) * sm + (((x & SM_MASK) * sm) >> SM_SHIFT); x 399 net/sched/sch_hfsc.c u64 x; x 402 net/sched/sch_hfsc.c x = 0; x 404 net/sched/sch_hfsc.c x = HT_INFINITY; x 406 net/sched/sch_hfsc.c x = (y >> ISM_SHIFT) * ism x 409 net/sched/sch_hfsc.c return x; x 489 net/sched/sch_hfsc.c rtsc_init(struct runtime_sc *rtsc, struct internal_sc *isc, u64 x, u64 y) x 491 net/sched/sch_hfsc.c rtsc->x = x; x 508 net/sched/sch_hfsc.c u64 x; x 511 net/sched/sch_hfsc.c x = rtsc->x; x 515 net/sched/sch_hfsc.c x = rtsc->x + rtsc->dx; x 517 net/sched/sch_hfsc.c x = rtsc->x + seg_y2x(y - rtsc->y, rtsc->ism1); x 520 net/sched/sch_hfsc.c x = rtsc->x + rtsc->dx x 523 net/sched/sch_hfsc.c return x; x 527 net/sched/sch_hfsc.c rtsc_x2y(struct runtime_sc *rtsc, u64 x) x 531 net/sched/sch_hfsc.c if (x <= rtsc->x) x 533 net/sched/sch_hfsc.c else if (x <= rtsc->x + rtsc->dx) x 535 net/sched/sch_hfsc.c y = rtsc->y + seg_x2y(x - rtsc->x, rtsc->sm1); x 539 net/sched/sch_hfsc.c + seg_x2y(x - rtsc->x - rtsc->dx, rtsc->sm2); x 548 net/sched/sch_hfsc.c rtsc_min(struct runtime_sc *rtsc, struct internal_sc *isc, u64 x, u64 y) x 555 net/sched/sch_hfsc.c y1 = rtsc_x2y(rtsc, x); x 559 net/sched/sch_hfsc.c rtsc->x = x; x 570 net/sched/sch_hfsc.c y1 = rtsc_x2y(rtsc, x); x 576 net/sched/sch_hfsc.c y2 = rtsc_x2y(rtsc, x + isc->dx); x 579 net/sched/sch_hfsc.c rtsc->x = x; x 599 net/sched/sch_hfsc.c if (rtsc->x + rtsc->dx > x) x 600 net/sched/sch_hfsc.c dx += rtsc->x + rtsc->dx - x; x 603 net/sched/sch_hfsc.c rtsc->x = x; x 322 net/sched/sch_netem.c s64 x; x 336 net/sched/sch_netem.c x = (sigma % NETEM_DIST_SCALE) * t; x 337 net/sched/sch_netem.c if (x >= 0) x 338 net/sched/sch_netem.c x += NETEM_DIST_SCALE/2; x 340 net/sched/sch_netem.c x -= NETEM_DIST_SCALE/2; x 342 net/sched/sch_netem.c return x / NETEM_DIST_SCALE + (sigma / NETEM_DIST_SCALE) * t + mu; x 203 net/sched/sch_sfq.c static inline void sfq_link(struct sfq_sched_data *q, sfq_index x) x 206 net/sched/sch_sfq.c struct sfq_slot *slot = &q->slots[x]; x 215 net/sched/sch_sfq.c q->dep[qlen].next = x; /* sfq_dep_head(q, p)->next = x */ x 216 net/sched/sch_sfq.c sfq_dep_head(q, n)->prev = x; x 219 net/sched/sch_sfq.c #define sfq_unlink(q, x, n, p) \ x 221 net/sched/sch_sfq.c n = q->slots[x].dep.next; \ x 222 net/sched/sch_sfq.c p = q->slots[x].dep.prev; \ x 228 net/sched/sch_sfq.c static inline void sfq_dec(struct sfq_sched_data *q, sfq_index x) x 233 net/sched/sch_sfq.c sfq_unlink(q, x, n, p); x 235 net/sched/sch_sfq.c d = q->slots[x].qlen--; x 238 net/sched/sch_sfq.c sfq_link(q, x); x 241 net/sched/sch_sfq.c static inline void sfq_inc(struct sfq_sched_data *q, sfq_index x) x 246 net/sched/sch_sfq.c sfq_unlink(q, x, n, p); x 248 net/sched/sch_sfq.c d = ++q->slots[x].qlen; x 251 net/sched/sch_sfq.c sfq_link(q, x); x 296 net/sched/sch_sfq.c sfq_index x, d = q->cur_depth; x 303 net/sched/sch_sfq.c x = q->dep[d].next; x 304 net/sched/sch_sfq.c slot = &q->slots[x]; x 309 net/sched/sch_sfq.c sfq_dec(q, x); x 318 net/sched/sch_sfq.c x = q->tail->next; x 319 net/sched/sch_sfq.c slot = &q->slots[x]; x 350 net/sched/sch_sfq.c sfq_index x, qlen; x 365 net/sched/sch_sfq.c x = q->ht[hash]; x 366 net/sched/sch_sfq.c slot = &q->slots[x]; x 367 net/sched/sch_sfq.c if (x == SFQ_EMPTY_SLOT) { x 368 net/sched/sch_sfq.c x = q->dep[0].next; /* get a free slot */ x 369 net/sched/sch_sfq.c if (x >= SFQ_MAX_FLOWS) x 371 net/sched/sch_sfq.c q->ht[hash] = x; x 372 net/sched/sch_sfq.c slot = &q->slots[x]; x 445 net/sched/sch_sfq.c sfq_inc(q, x); x 448 net/sched/sch_sfq.c slot->next = x; x 451 net/sched/sch_sfq.c q->tail->next = x; x 564 net/sched/sch_sfq.c sfq_index x = q->ht[hash]; x 566 net/sched/sch_sfq.c slot = &q->slots[x]; x 567 net/sched/sch_sfq.c if (x == SFQ_EMPTY_SLOT) { x 568 net/sched/sch_sfq.c x = q->dep[0].next; /* get a free slot */ x 569 net/sched/sch_sfq.c if (x >= SFQ_MAX_FLOWS) { x 577 net/sched/sch_sfq.c q->ht[hash] = x; x 578 net/sched/sch_sfq.c slot = &q->slots[x]; x 589 net/sched/sch_sfq.c sfq_inc(q, x); x 592 net/sched/sch_sfq.c slot->next = x; x 595 net/sched/sch_sfq.c q->tail->next = x; x 877 net/sctp/input.c const struct sctp_hash_cmp_arg *x = arg->key; x 880 net/sctp/input.c if (!sctp_cmp_addr_exact(&t->ipaddr, x->paddr)) x 885 net/sctp/input.c if (!net_eq(t->asoc->base.net, x->net)) x 887 net/sctp/input.c if (x->lport != htons(t->asoc->base.bind_addr.port)) x 907 net/sctp/input.c const struct sctp_hash_cmp_arg *x = data; x 909 net/sctp/input.c return sctp_hashfn(x->net, x->lport, x->paddr, seed); x 2719 net/sctp/sm_make_chunk.c __u32 x; x 2722 net/sctp/sm_make_chunk.c get_random_bytes(&x, sizeof(__u32)); x 2723 net/sctp/sm_make_chunk.c } while (x == 0); x 2725 net/sctp/sm_make_chunk.c return x; x 2800 net/socket.c #define AL(x) ((x) * sizeof(unsigned long)) x 243 net/sunrpc/auth_gss/gss_krb5_keys.c #define pstep(x, step) (((x)&smask(step))^(((x)>>step)&smask(step))) x 244 net/sunrpc/auth_gss/gss_krb5_keys.c #define parity_char(x) pstep(pstep(pstep((x), 4), 2), 1) x 438 net/sunrpc/xprtrdma/xprt_rdma.h #define rpcx_to_rdmax(x) container_of(x, struct rpcrdma_xprt, rx_xprt) x 169 net/tipc/core.h static inline u16 mod(u16 x) x 171 net/tipc/core.h return x & 0xffffu; x 84 net/tipc/name_table.c static int hash(int x) x 86 net/tipc/name_table.c return x & (TIPC_NAMETBL_SIZE - 1); x 2701 net/unix/af_unix.c #define get_bucket(x) ((x) >> BUCKET_SPACE) x 2702 net/unix/af_unix.c #define get_offset(x) ((x) & ((1L << BUCKET_SPACE) - 1)) x 91 net/unix/garbage.c static void scan_inflight(struct sock *x, void (*func)(struct unix_sock *), x 97 net/unix/garbage.c spin_lock(&x->sk_receive_queue.lock); x 98 net/unix/garbage.c skb_queue_walk_safe(&x->sk_receive_queue, skb, next) { x 125 net/unix/garbage.c __skb_unlink(skb, &x->sk_receive_queue); x 130 net/unix/garbage.c spin_unlock(&x->sk_receive_queue.lock); x 133 net/unix/garbage.c static void scan_children(struct sock *x, void (*func)(struct unix_sock *), x 136 net/unix/garbage.c if (x->sk_state != TCP_LISTEN) { x 137 net/unix/garbage.c scan_inflight(x, func, hitlist); x 147 net/unix/garbage.c spin_lock(&x->sk_receive_queue.lock); x 148 net/unix/garbage.c skb_queue_walk_safe(&x->sk_receive_queue, skb, next) { x 157 net/unix/garbage.c spin_unlock(&x->sk_receive_queue.lock); x 1487 net/wireless/reg.c unsigned int x, y; x 1504 net/wireless/reg.c for (x = 0; x < rd1->n_reg_rules; x++) { x 1505 net/wireless/reg.c rule1 = &rd1->reg_rules[x]; x 1521 net/wireless/reg.c for (x = 0; x < rd1->n_reg_rules; x++) { x 1522 net/wireless/reg.c rule1 = &rd1->reg_rules[x]; x 22 net/xfrm/xfrm_device.c static void __xfrm_transport_prep(struct xfrm_state *x, struct sk_buff *skb, x 29 net/xfrm/xfrm_device.c skb->transport_header -= x->props.header_len; x 31 net/xfrm/xfrm_device.c pskb_pull(skb, skb_transport_offset(skb) + x->props.header_len); x 34 net/xfrm/xfrm_device.c static void __xfrm_mode_tunnel_prep(struct xfrm_state *x, struct sk_buff *skb, x 44 net/xfrm/xfrm_device.c pskb_pull(skb, skb->mac_len + x->props.header_len); x 48 net/xfrm/xfrm_device.c static void xfrm_outer_mode_prep(struct xfrm_state *x, struct sk_buff *skb) x 50 net/xfrm/xfrm_device.c switch (x->outer_mode.encap) { x 52 net/xfrm/xfrm_device.c if (x->outer_mode.family == AF_INET) x 53 net/xfrm/xfrm_device.c return __xfrm_mode_tunnel_prep(x, skb, x 55 net/xfrm/xfrm_device.c if (x->outer_mode.family == AF_INET6) x 56 net/xfrm/xfrm_device.c return __xfrm_mode_tunnel_prep(x, skb, x 60 net/xfrm/xfrm_device.c if (x->outer_mode.family == AF_INET) x 61 net/xfrm/xfrm_device.c return __xfrm_transport_prep(x, skb, x 63 net/xfrm/xfrm_device.c if (x->outer_mode.family == AF_INET6) x 64 net/xfrm/xfrm_device.c return __xfrm_transport_prep(x, skb, x 78 net/xfrm/xfrm_device.c struct xfrm_state *x; x 92 net/xfrm/xfrm_device.c x = sp->xvec[sp->len - 1]; x 93 net/xfrm/xfrm_device.c if (xo->flags & XFRM_GRO || x->xso.flags & XFRM_OFFLOAD_INBOUND) x 109 net/xfrm/xfrm_device.c if (unlikely(x->xso.dev != dev)) { x 130 net/xfrm/xfrm_device.c xfrm_outer_mode_prep(x, skb); x 134 net/xfrm/xfrm_device.c err = x->type_offload->xmit(x, skb, esp_features); x 139 net/xfrm/xfrm_device.c XFRM_INC_STATS(xs_net(x), LINUX_MIB_XFRMOUTSTATEPROTOERROR); x 160 net/xfrm/xfrm_device.c xfrm_outer_mode_prep(x, skb2); x 162 net/xfrm/xfrm_device.c err = x->type_offload->xmit(x, skb2, esp_features); x 166 net/xfrm/xfrm_device.c XFRM_INC_STATS(xs_net(x), LINUX_MIB_XFRMOUTSTATEPROTOERROR); x 190 net/xfrm/xfrm_device.c int xfrm_dev_state_add(struct net *net, struct xfrm_state *x, x 196 net/xfrm/xfrm_device.c struct xfrm_state_offload *xso = &x->xso; x 200 net/xfrm/xfrm_device.c if (!x->type_offload) x 204 net/xfrm/xfrm_device.c if (x->encap || x->tfcpad) x 210 net/xfrm/xfrm_device.c saddr = &x->props.saddr; x 211 net/xfrm/xfrm_device.c daddr = &x->id.daddr; x 213 net/xfrm/xfrm_device.c saddr = &x->id.daddr; x 214 net/xfrm/xfrm_device.c daddr = &x->props.saddr; x 218 net/xfrm/xfrm_device.c x->props.family, x 219 net/xfrm/xfrm_device.c xfrm_smark_get(0, x)); x 235 net/xfrm/xfrm_device.c if (x->props.flags & XFRM_STATE_ESN && x 246 net/xfrm/xfrm_device.c err = dev->xfrmdev_ops->xdo_dev_state_add(x); x 261 net/xfrm/xfrm_device.c bool xfrm_dev_offload_ok(struct sk_buff *skb, struct xfrm_state *x) x 266 net/xfrm/xfrm_device.c struct net_device *dev = x->xso.dev; x 268 net/xfrm/xfrm_device.c if (!x->type_offload || x->encap) x 273 net/xfrm/xfrm_device.c mtu = xfrm_state_mtu(x, xdst->child_mtu_cached); x 285 net/xfrm/xfrm_device.c return x->xso.dev->xfrmdev_ops->xdo_dev_offload_ok(skb, x); x 171 net/xfrm/xfrm_input.c static int xfrm4_remove_beet_encap(struct xfrm_state *x, struct sk_buff *skb) x 208 net/xfrm/xfrm_input.c iph->daddr = x->sel.daddr.a4; x 209 net/xfrm/xfrm_input.c iph->saddr = x->sel.saddr.a4; x 225 net/xfrm/xfrm_input.c static int xfrm4_remove_tunnel_encap(struct xfrm_state *x, struct sk_buff *skb) x 239 net/xfrm/xfrm_input.c if (x->props.flags & XFRM_STATE_DECAP_DSCP) x 241 net/xfrm/xfrm_input.c if (!(x->props.flags & XFRM_STATE_NOECN)) x 263 net/xfrm/xfrm_input.c static int xfrm6_remove_tunnel_encap(struct xfrm_state *x, struct sk_buff *skb) x 276 net/xfrm/xfrm_input.c if (x->props.flags & XFRM_STATE_DECAP_DSCP) x 279 net/xfrm/xfrm_input.c if (!(x->props.flags & XFRM_STATE_NOECN)) x 293 net/xfrm/xfrm_input.c static int xfrm6_remove_beet_encap(struct xfrm_state *x, struct sk_buff *skb) x 311 net/xfrm/xfrm_input.c ip6h->daddr = x->sel.daddr.in6; x 312 net/xfrm/xfrm_input.c ip6h->saddr = x->sel.saddr.in6; x 329 net/xfrm/xfrm_input.c xfrm_inner_mode_encap_remove(struct xfrm_state *x, x 336 net/xfrm/xfrm_input.c return xfrm4_remove_beet_encap(x, skb); x 338 net/xfrm/xfrm_input.c return xfrm6_remove_beet_encap(x, skb); x 342 net/xfrm/xfrm_input.c return xfrm4_remove_tunnel_encap(x, skb); x 344 net/xfrm/xfrm_input.c return xfrm6_remove_tunnel_encap(x, skb); x 352 net/xfrm/xfrm_input.c static int xfrm_prepare_input(struct xfrm_state *x, struct sk_buff *skb) x 354 net/xfrm/xfrm_input.c const struct xfrm_mode *inner_mode = &x->inner_mode; x 359 net/xfrm/xfrm_input.c afinfo = xfrm_state_afinfo_get_rcu(x->outer_mode.family); x 361 net/xfrm/xfrm_input.c err = afinfo->extract_input(x, skb); x 367 net/xfrm/xfrm_input.c if (x->sel.family == AF_UNSPEC) { x 368 net/xfrm/xfrm_input.c inner_mode = xfrm_ip2inner_mode(x, XFRM_MODE_SKB_CB(skb)->protocol); x 385 net/xfrm/xfrm_input.c return xfrm_inner_mode_encap_remove(x, inner_mode, skb); x 396 net/xfrm/xfrm_input.c static int xfrm4_transport_input(struct xfrm_state *x, struct sk_buff *skb) x 410 net/xfrm/xfrm_input.c static int xfrm6_transport_input(struct xfrm_state *x, struct sk_buff *skb) x 430 net/xfrm/xfrm_input.c static int xfrm_inner_mode_input(struct xfrm_state *x, x 437 net/xfrm/xfrm_input.c return xfrm_prepare_input(x, skb); x 440 net/xfrm/xfrm_input.c return xfrm4_transport_input(x, skb); x 442 net/xfrm/xfrm_input.c return xfrm6_transport_input(x, skb); x 463 net/xfrm/xfrm_input.c struct xfrm_state *x = NULL; x 475 net/xfrm/xfrm_input.c x = xfrm_input_state(skb); x 477 net/xfrm/xfrm_input.c if (unlikely(x->km.state != XFRM_STATE_VALID)) { x 478 net/xfrm/xfrm_input.c if (x->km.state == XFRM_STATE_ACQ) x 489 net/xfrm/xfrm_input.c family = x->outer_mode.family; x 513 net/xfrm/xfrm_input.c xfrm_audit_state_icvfail(x, skb, x 514 net/xfrm/xfrm_input.c x->type->proto); x 515 net/xfrm/xfrm_input.c x->stats.integrity_failed++; x 576 net/xfrm/xfrm_input.c x = xfrm_state_lookup(net, mark, daddr, spi, nexthdr, family); x 577 net/xfrm/xfrm_input.c if (x == NULL) { x 584 net/xfrm/xfrm_input.c skb->mark = xfrm_smark_get(skb->mark, x); x 586 net/xfrm/xfrm_input.c sp->xvec[sp->len++] = x; x 595 net/xfrm/xfrm_input.c spin_lock(&x->lock); x 597 net/xfrm/xfrm_input.c if (unlikely(x->km.state != XFRM_STATE_VALID)) { x 598 net/xfrm/xfrm_input.c if (x->km.state == XFRM_STATE_ACQ) x 606 net/xfrm/xfrm_input.c if ((x->encap ? x->encap->encap_type : 0) != encap_type) { x 611 net/xfrm/xfrm_input.c if (x->repl->check(x, skb, seq)) { x 616 net/xfrm/xfrm_input.c if (xfrm_state_check_expire(x)) { x 621 net/xfrm/xfrm_input.c spin_unlock(&x->lock); x 623 net/xfrm/xfrm_input.c if (xfrm_tunnel_check(skb, x, family)) { x 628 net/xfrm/xfrm_input.c seq_hi = htonl(xfrm_replay_seqhi(x, seq)); x 636 net/xfrm/xfrm_input.c nexthdr = x->type_offload->input_tail(x, skb); x 638 net/xfrm/xfrm_input.c nexthdr = x->type->input(x, skb); x 645 net/xfrm/xfrm_input.c spin_lock(&x->lock); x 648 net/xfrm/xfrm_input.c xfrm_audit_state_icvfail(x, skb, x 649 net/xfrm/xfrm_input.c x->type->proto); x 650 net/xfrm/xfrm_input.c x->stats.integrity_failed++; x 659 net/xfrm/xfrm_input.c if (async && x->repl->recheck(x, skb, seq)) { x 664 net/xfrm/xfrm_input.c x->repl->advance(x, seq); x 666 net/xfrm/xfrm_input.c x->curlft.bytes += skb->len; x 667 net/xfrm/xfrm_input.c x->curlft.packets++; x 669 net/xfrm/xfrm_input.c spin_unlock(&x->lock); x 673 net/xfrm/xfrm_input.c inner_mode = &x->inner_mode; x 675 net/xfrm/xfrm_input.c if (x->sel.family == AF_UNSPEC) { x 676 net/xfrm/xfrm_input.c inner_mode = xfrm_ip2inner_mode(x, XFRM_MODE_SKB_CB(skb)->protocol); x 683 net/xfrm/xfrm_input.c if (xfrm_inner_mode_input(x, inner_mode, skb)) { x 688 net/xfrm/xfrm_input.c if (x->outer_mode.flags & XFRM_MODE_FLAG_TUNNEL) { x 697 net/xfrm/xfrm_input.c daddr = &x->id.daddr; x 698 net/xfrm/xfrm_input.c family = x->outer_mode.family; x 708 net/xfrm/xfrm_input.c err = xfrm_rcv_cb(skb, family, x->type->proto, 0); x 728 net/xfrm/xfrm_input.c afinfo = xfrm_state_afinfo_get_rcu(x->inner_mode.family); x 745 net/xfrm/xfrm_input.c spin_unlock(&x->lock); x 747 net/xfrm/xfrm_input.c xfrm_rcv_cb(skb, family, x && x->type ? x->type->proto : nexthdr, -1); x 59 net/xfrm/xfrm_interface.c static struct xfrm_if *xfrmi_lookup(struct net *net, struct xfrm_state *x) x 65 net/xfrm/xfrm_interface.c if (x->if_id == xi->p.if_id && x 205 net/xfrm/xfrm_interface.c struct xfrm_state *x; x 212 net/xfrm/xfrm_interface.c x = xfrm_input_state(skb); x 214 net/xfrm/xfrm_interface.c xi = xfrmi_lookup(xs_net(x), x); x 231 net/xfrm/xfrm_interface.c inner_mode = &x->inner_mode; x 233 net/xfrm/xfrm_interface.c if (x->sel.family == AF_UNSPEC) { x 234 net/xfrm/xfrm_interface.c inner_mode = xfrm_ip2inner_mode(x, XFRM_MODE_SKB_CB(skb)->protocol); x 267 net/xfrm/xfrm_interface.c struct xfrm_state *x; x 279 net/xfrm/xfrm_interface.c x = dst->xfrm; x 280 net/xfrm/xfrm_interface.c if (!x) x 283 net/xfrm/xfrm_interface.c if (x->if_id != xi->p.if_id) x 408 net/xfrm/xfrm_interface.c struct xfrm_state *x; x 439 net/xfrm/xfrm_interface.c x = xfrm_state_lookup(net, skb->mark, (const xfrm_address_t *)&iph->daddr, x 441 net/xfrm/xfrm_interface.c if (!x) x 444 net/xfrm/xfrm_interface.c xi = xfrmi_lookup(net, x); x 446 net/xfrm/xfrm_interface.c xfrm_state_put(x); x 454 net/xfrm/xfrm_interface.c xfrm_state_put(x); x 468 net/xfrm/xfrm_interface.c struct xfrm_state *x; x 493 net/xfrm/xfrm_interface.c x = xfrm_state_lookup(net, skb->mark, (const xfrm_address_t *)&iph->daddr, x 495 net/xfrm/xfrm_interface.c if (!x) x 498 net/xfrm/xfrm_interface.c xi = xfrmi_lookup(net, x); x 500 net/xfrm/xfrm_interface.c xfrm_state_put(x); x 509 net/xfrm/xfrm_interface.c xfrm_state_put(x); x 38 net/xfrm/xfrm_ipcomp.c static int ipcomp_decompress(struct xfrm_state *x, struct sk_buff *skb) x 40 net/xfrm/xfrm_ipcomp.c struct ipcomp_data *ipcd = x->data; x 106 net/xfrm/xfrm_ipcomp.c int ipcomp_input(struct xfrm_state *x, struct sk_buff *skb) x 123 net/xfrm/xfrm_ipcomp.c err = ipcomp_decompress(x, skb); x 134 net/xfrm/xfrm_ipcomp.c static int ipcomp_compress(struct xfrm_state *x, struct sk_buff *skb) x 136 net/xfrm/xfrm_ipcomp.c struct ipcomp_data *ipcd = x->data; x 167 net/xfrm/xfrm_ipcomp.c int ipcomp_output(struct xfrm_state *x, struct sk_buff *skb) x 171 net/xfrm/xfrm_ipcomp.c struct ipcomp_data *ipcd = x->data; x 181 net/xfrm/xfrm_ipcomp.c err = ipcomp_compress(x, skb); x 191 net/xfrm/xfrm_ipcomp.c ipch->cpi = htons((u16 )ntohl(x->id.spi)); x 324 net/xfrm/xfrm_ipcomp.c void ipcomp_destroy(struct xfrm_state *x) x 326 net/xfrm/xfrm_ipcomp.c struct ipcomp_data *ipcd = x->data; x 329 net/xfrm/xfrm_ipcomp.c xfrm_state_delete_tunnel(x); x 337 net/xfrm/xfrm_ipcomp.c int ipcomp_init_state(struct xfrm_state *x) x 344 net/xfrm/xfrm_ipcomp.c if (!x->calg) x 347 net/xfrm/xfrm_ipcomp.c if (x->encap) x 359 net/xfrm/xfrm_ipcomp.c ipcd->tfms = ipcomp_alloc_tfms(x->calg->alg_name); x 364 net/xfrm/xfrm_ipcomp.c calg_desc = xfrm_calg_get_byname(x->calg->alg_name, 0); x 367 net/xfrm/xfrm_ipcomp.c x->data = ipcd; x 22 net/xfrm/xfrm_output.c static int xfrm_inner_extract_output(struct xfrm_state *x, struct sk_buff *skb); x 58 net/xfrm/xfrm_output.c static int xfrm4_transport_output(struct xfrm_state *x, struct sk_buff *skb) x 65 net/xfrm/xfrm_output.c skb_set_network_header(skb, -x->props.header_len); x 79 net/xfrm/xfrm_output.c static int xfrm6_transport_output(struct xfrm_state *x, struct sk_buff *skb) x 89 net/xfrm/xfrm_output.c hdr_len = x->type->hdr_offset(x, skb, &prevhdr); x 93 net/xfrm/xfrm_output.c (prevhdr - x->props.header_len) - skb->data); x 94 net/xfrm/xfrm_output.c skb_set_network_header(skb, -x->props.header_len); x 110 net/xfrm/xfrm_output.c static int xfrm6_ro_output(struct xfrm_state *x, struct sk_buff *skb) x 119 net/xfrm/xfrm_output.c hdr_len = x->type->hdr_offset(x, skb, &prevhdr); x 123 net/xfrm/xfrm_output.c (prevhdr - x->props.header_len) - skb->data); x 124 net/xfrm/xfrm_output.c skb_set_network_header(skb, -x->props.header_len); x 129 net/xfrm/xfrm_output.c x->lastused = ktime_get_real_seconds(); x 142 net/xfrm/xfrm_output.c static int xfrm4_beet_encap_add(struct xfrm_state *x, struct sk_buff *skb) x 153 net/xfrm/xfrm_output.c skb_set_network_header(skb, -x->props.header_len - hdrlen + x 155 net/xfrm/xfrm_output.c if (x->sel.family != AF_INET6) x 181 net/xfrm/xfrm_output.c top_iph->saddr = x->props.saddr.a4; x 182 net/xfrm/xfrm_output.c top_iph->daddr = x->id.daddr.a4; x 191 net/xfrm/xfrm_output.c static int xfrm4_tunnel_encap_add(struct xfrm_state *x, struct sk_buff *skb) x 200 net/xfrm/xfrm_output.c skb_set_network_header(skb, -x->props.header_len); x 212 net/xfrm/xfrm_output.c if (x->props.extra_flags & XFRM_SA_XFLAG_DONT_ENCAP_DSCP) x 219 net/xfrm/xfrm_output.c flags = x->props.flags; x 228 net/xfrm/xfrm_output.c top_iph->saddr = x->props.saddr.a4; x 229 net/xfrm/xfrm_output.c top_iph->daddr = x->id.daddr.a4; x 236 net/xfrm/xfrm_output.c static int xfrm6_tunnel_encap_add(struct xfrm_state *x, struct sk_buff *skb) x 245 net/xfrm/xfrm_output.c skb_set_network_header(skb, -x->props.header_len); x 257 net/xfrm/xfrm_output.c if (x->props.extra_flags & XFRM_SA_XFLAG_DONT_ENCAP_DSCP) x 262 net/xfrm/xfrm_output.c if (x->props.flags & XFRM_STATE_NOECN) x 266 net/xfrm/xfrm_output.c top_iph->saddr = *(struct in6_addr *)&x->props.saddr; x 267 net/xfrm/xfrm_output.c top_iph->daddr = *(struct in6_addr *)&x->id.daddr; x 271 net/xfrm/xfrm_output.c static int xfrm6_beet_encap_add(struct xfrm_state *x, struct sk_buff *skb) x 282 net/xfrm/xfrm_output.c skb_set_network_header(skb, -x->props.header_len - hdr_len); x 283 net/xfrm/xfrm_output.c if (x->sel.family != AF_INET6) x 306 net/xfrm/xfrm_output.c top_iph->saddr = *(struct in6_addr *)&x->props.saddr; x 307 net/xfrm/xfrm_output.c top_iph->daddr = *(struct in6_addr *)&x->id.daddr; x 322 net/xfrm/xfrm_output.c static int xfrm4_prepare_output(struct xfrm_state *x, struct sk_buff *skb) x 326 net/xfrm/xfrm_output.c err = xfrm_inner_extract_output(x, skb); x 333 net/xfrm/xfrm_output.c switch (x->outer_mode.encap) { x 335 net/xfrm/xfrm_output.c return xfrm4_beet_encap_add(x, skb); x 337 net/xfrm/xfrm_output.c return xfrm4_tunnel_encap_add(x, skb); x 344 net/xfrm/xfrm_output.c static int xfrm6_prepare_output(struct xfrm_state *x, struct sk_buff *skb) x 349 net/xfrm/xfrm_output.c err = xfrm_inner_extract_output(x, skb); x 356 net/xfrm/xfrm_output.c switch (x->outer_mode.encap) { x 358 net/xfrm/xfrm_output.c return xfrm6_beet_encap_add(x, skb); x 360 net/xfrm/xfrm_output.c return xfrm6_tunnel_encap_add(x, skb); x 370 net/xfrm/xfrm_output.c static int xfrm_outer_mode_output(struct xfrm_state *x, struct sk_buff *skb) x 372 net/xfrm/xfrm_output.c switch (x->outer_mode.encap) { x 375 net/xfrm/xfrm_output.c if (x->outer_mode.family == AF_INET) x 376 net/xfrm/xfrm_output.c return xfrm4_prepare_output(x, skb); x 377 net/xfrm/xfrm_output.c if (x->outer_mode.family == AF_INET6) x 378 net/xfrm/xfrm_output.c return xfrm6_prepare_output(x, skb); x 381 net/xfrm/xfrm_output.c if (x->outer_mode.family == AF_INET) x 382 net/xfrm/xfrm_output.c return xfrm4_transport_output(x, skb); x 383 net/xfrm/xfrm_output.c if (x->outer_mode.family == AF_INET6) x 384 net/xfrm/xfrm_output.c return xfrm6_transport_output(x, skb); x 387 net/xfrm/xfrm_output.c if (x->outer_mode.family == AF_INET6) x 388 net/xfrm/xfrm_output.c return xfrm6_ro_output(x, skb); x 400 net/xfrm/xfrm_output.c int pktgen_xfrm_outer_mode_output(struct xfrm_state *x, struct sk_buff *skb) x 402 net/xfrm/xfrm_output.c return xfrm_outer_mode_output(x, skb); x 410 net/xfrm/xfrm_output.c struct xfrm_state *x = dst->xfrm; x 411 net/xfrm/xfrm_output.c struct net *net = xs_net(x); x 423 net/xfrm/xfrm_output.c skb->mark = xfrm_smark_get(skb->mark, x); x 425 net/xfrm/xfrm_output.c err = xfrm_outer_mode_output(x, skb); x 431 net/xfrm/xfrm_output.c spin_lock_bh(&x->lock); x 433 net/xfrm/xfrm_output.c if (unlikely(x->km.state != XFRM_STATE_VALID)) { x 439 net/xfrm/xfrm_output.c err = xfrm_state_check_expire(x); x 445 net/xfrm/xfrm_output.c err = x->repl->overflow(x, skb); x 451 net/xfrm/xfrm_output.c x->curlft.bytes += skb->len; x 452 net/xfrm/xfrm_output.c x->curlft.packets++; x 454 net/xfrm/xfrm_output.c spin_unlock_bh(&x->lock); x 464 net/xfrm/xfrm_output.c x->type_offload->encap(x, skb); x 469 net/xfrm/xfrm_output.c err = x->type->output(x, skb); x 487 net/xfrm/xfrm_output.c x = dst->xfrm; x 488 net/xfrm/xfrm_output.c } while (x && !(x->outer_mode.flags & XFRM_MODE_FLAG_TUNNEL)); x 493 net/xfrm/xfrm_output.c spin_unlock_bh(&x->lock); x 568 net/xfrm/xfrm_output.c struct xfrm_state *x = skb_dst(skb)->xfrm; x 573 net/xfrm/xfrm_output.c if (xfrm_dev_offload_ok(skb, x)) { x 585 net/xfrm/xfrm_output.c sp->xvec[sp->len++] = x; x 586 net/xfrm/xfrm_output.c xfrm_state_hold(x); x 596 net/xfrm/xfrm_output.c if (x->xso.dev && x->xso.dev->features & NETIF_F_HW_ESP_TX_CSUM) x 617 net/xfrm/xfrm_output.c static int xfrm_inner_extract_output(struct xfrm_state *x, struct sk_buff *skb) x 623 net/xfrm/xfrm_output.c if (x->sel.family == AF_UNSPEC) x 624 net/xfrm/xfrm_output.c inner_mode = xfrm_ip2inner_mode(x, x 627 net/xfrm/xfrm_output.c inner_mode = &x->inner_mode; x 635 net/xfrm/xfrm_output.c err = afinfo->extract_output(x, skb); x 270 net/xfrm/xfrm_policy.c static inline struct dst_entry *xfrm_dst_lookup(struct xfrm_state *x, x 276 net/xfrm/xfrm_policy.c struct net *net = xs_net(x); x 277 net/xfrm/xfrm_policy.c xfrm_address_t *saddr = &x->props.saddr; x 278 net/xfrm/xfrm_policy.c xfrm_address_t *daddr = &x->id.daddr; x 281 net/xfrm/xfrm_policy.c if (x->type->flags & XFRM_TYPE_LOCAL_COADDR) { x 282 net/xfrm/xfrm_policy.c saddr = x->coaddr; x 285 net/xfrm/xfrm_policy.c if (x->type->flags & XFRM_TYPE_REMOTE_COADDR) { x 287 net/xfrm/xfrm_policy.c daddr = x->coaddr; x 1815 net/xfrm/xfrm_policy.c struct xfrm_policy_walk_entry *x; x 1827 net/xfrm/xfrm_policy.c x = list_first_entry(&net->xfrm.policy_all, struct xfrm_policy_walk_entry, all); x 1829 net/xfrm/xfrm_policy.c x = list_first_entry(&walk->walk.all, x 1832 net/xfrm/xfrm_policy.c list_for_each_entry_from(x, &net->xfrm.policy_all, all) { x 1833 net/xfrm/xfrm_policy.c if (x->dead) x 1835 net/xfrm/xfrm_policy.c pol = container_of(x, struct xfrm_policy, walk); x 1842 net/xfrm/xfrm_policy.c list_move_tail(&walk->walk.all, &x->all); x 2369 net/xfrm/xfrm_policy.c struct xfrm_state *x; x 2388 net/xfrm/xfrm_policy.c x = xfrm_state_find(remote, local, fl, tmpl, policy, &error, x 2391 net/xfrm/xfrm_policy.c if (x && x->km.state == XFRM_STATE_VALID) { x 2392 net/xfrm/xfrm_policy.c xfrm[nx++] = x; x 2397 net/xfrm/xfrm_policy.c if (x) { x 2398 net/xfrm/xfrm_policy.c error = (x->km.state == XFRM_STATE_ERROR ? x 2400 net/xfrm/xfrm_policy.c xfrm_state_put(x); x 3200 net/xfrm/xfrm_policy.c struct xfrm_state *x; x 3204 net/xfrm/xfrm_policy.c x = sp->xvec[idx]; x 3205 net/xfrm/xfrm_policy.c if (!x->type->reject) x 3207 net/xfrm/xfrm_policy.c return x->type->reject(x, skb, fl); x 3217 net/xfrm/xfrm_policy.c xfrm_state_ok(const struct xfrm_tmpl *tmpl, const struct xfrm_state *x, x 3220 net/xfrm/xfrm_policy.c if (xfrm_state_kern(x)) x 3221 net/xfrm/xfrm_policy.c return tmpl->optional && !xfrm_state_addr_cmp(tmpl, x, tmpl->encap_family); x 3222 net/xfrm/xfrm_policy.c return x->id.proto == tmpl->id.proto && x 3223 net/xfrm/xfrm_policy.c (x->id.spi == tmpl->id.spi || !tmpl->id.spi) && x 3224 net/xfrm/xfrm_policy.c (x->props.reqid == tmpl->reqid || !tmpl->reqid) && x 3225 net/xfrm/xfrm_policy.c x->props.mode == tmpl->mode && x 3226 net/xfrm/xfrm_policy.c (tmpl->allalgs || (tmpl->aalgos & (1<<x->props.aalgo)) || x 3228 net/xfrm/xfrm_policy.c !(x->props.mode != XFRM_MODE_TRANSPORT && x 3229 net/xfrm/xfrm_policy.c xfrm_state_addr_cmp(tmpl, x, family)); x 3547 net/xfrm/xfrm_policy.c struct xfrm_state *x = sp->xvec[i]; x 3548 net/xfrm/xfrm_policy.c if (!xfrm_selector_match(&x->sel, &fl, family)) { x 4390 net/xfrm/xfrm_policy.c struct xfrm_state *x, *xc; x 4412 net/xfrm/xfrm_policy.c if ((x = xfrm_migrate_state_find(mp, net))) { x 4413 net/xfrm/xfrm_policy.c x_cur[nx_cur] = x; x 4415 net/xfrm/xfrm_policy.c xc = xfrm_state_migrate(x, mp, encap); x 12 net/xfrm/xfrm_replay.c u32 xfrm_replay_seqhi(struct xfrm_state *x, __be32 net_seq) x 15 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 17 net/xfrm/xfrm_replay.c if (!(x->props.flags & XFRM_STATE_ESN)) x 38 net/xfrm/xfrm_replay.c static void xfrm_replay_notify(struct xfrm_state *x, int event) x 53 net/xfrm/xfrm_replay.c if (!x->replay_maxdiff || x 54 net/xfrm/xfrm_replay.c ((x->replay.seq - x->preplay.seq < x->replay_maxdiff) && x 55 net/xfrm/xfrm_replay.c (x->replay.oseq - x->preplay.oseq < x->replay_maxdiff))) { x 56 net/xfrm/xfrm_replay.c if (x->xflags & XFRM_TIME_DEFER) x 65 net/xfrm/xfrm_replay.c if (memcmp(&x->replay, &x->preplay, x 67 net/xfrm/xfrm_replay.c x->xflags |= XFRM_TIME_DEFER; x 74 net/xfrm/xfrm_replay.c memcpy(&x->preplay, &x->replay, sizeof(struct xfrm_replay_state)); x 77 net/xfrm/xfrm_replay.c km_state_notify(x, &c); x 79 net/xfrm/xfrm_replay.c if (x->replay_maxage && x 80 net/xfrm/xfrm_replay.c !mod_timer(&x->rtimer, jiffies + x->replay_maxage)) x 81 net/xfrm/xfrm_replay.c x->xflags &= ~XFRM_TIME_DEFER; x 84 net/xfrm/xfrm_replay.c static int xfrm_replay_overflow(struct xfrm_state *x, struct sk_buff *skb) x 87 net/xfrm/xfrm_replay.c struct net *net = xs_net(x); x 89 net/xfrm/xfrm_replay.c if (x->type->flags & XFRM_TYPE_REPLAY_PROT) { x 90 net/xfrm/xfrm_replay.c XFRM_SKB_CB(skb)->seq.output.low = ++x->replay.oseq; x 92 net/xfrm/xfrm_replay.c if (unlikely(x->replay.oseq == 0)) { x 93 net/xfrm/xfrm_replay.c x->replay.oseq--; x 94 net/xfrm/xfrm_replay.c xfrm_audit_state_replay_overflow(x, skb); x 100 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 106 net/xfrm/xfrm_replay.c static int xfrm_replay_check(struct xfrm_state *x, x 112 net/xfrm/xfrm_replay.c if (!x->props.replay_window) x 118 net/xfrm/xfrm_replay.c if (likely(seq > x->replay.seq)) x 121 net/xfrm/xfrm_replay.c diff = x->replay.seq - seq; x 122 net/xfrm/xfrm_replay.c if (diff >= x->props.replay_window) { x 123 net/xfrm/xfrm_replay.c x->stats.replay_window++; x 127 net/xfrm/xfrm_replay.c if (x->replay.bitmap & (1U << diff)) { x 128 net/xfrm/xfrm_replay.c x->stats.replay++; x 134 net/xfrm/xfrm_replay.c xfrm_audit_state_replay(x, skb, net_seq); x 138 net/xfrm/xfrm_replay.c static void xfrm_replay_advance(struct xfrm_state *x, __be32 net_seq) x 143 net/xfrm/xfrm_replay.c if (!x->props.replay_window) x 146 net/xfrm/xfrm_replay.c if (seq > x->replay.seq) { x 147 net/xfrm/xfrm_replay.c diff = seq - x->replay.seq; x 148 net/xfrm/xfrm_replay.c if (diff < x->props.replay_window) x 149 net/xfrm/xfrm_replay.c x->replay.bitmap = ((x->replay.bitmap) << diff) | 1; x 151 net/xfrm/xfrm_replay.c x->replay.bitmap = 1; x 152 net/xfrm/xfrm_replay.c x->replay.seq = seq; x 154 net/xfrm/xfrm_replay.c diff = x->replay.seq - seq; x 155 net/xfrm/xfrm_replay.c x->replay.bitmap |= (1U << diff); x 158 net/xfrm/xfrm_replay.c if (xfrm_aevent_is_on(xs_net(x))) x 159 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 162 net/xfrm/xfrm_replay.c static int xfrm_replay_overflow_bmp(struct xfrm_state *x, struct sk_buff *skb) x 165 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 166 net/xfrm/xfrm_replay.c struct net *net = xs_net(x); x 168 net/xfrm/xfrm_replay.c if (x->type->flags & XFRM_TYPE_REPLAY_PROT) { x 173 net/xfrm/xfrm_replay.c xfrm_audit_state_replay_overflow(x, skb); x 179 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 185 net/xfrm/xfrm_replay.c static int xfrm_replay_check_bmp(struct xfrm_state *x, x 189 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 204 net/xfrm/xfrm_replay.c x->stats.replay_window++; x 223 net/xfrm/xfrm_replay.c x->stats.replay++; x 225 net/xfrm/xfrm_replay.c xfrm_audit_state_replay(x, skb, net_seq); x 229 net/xfrm/xfrm_replay.c static void xfrm_replay_advance_bmp(struct xfrm_state *x, __be32 net_seq) x 233 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 273 net/xfrm/xfrm_replay.c if (xfrm_aevent_is_on(xs_net(x))) x 274 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 277 net/xfrm/xfrm_replay.c static void xfrm_replay_notify_bmp(struct xfrm_state *x, int event) x 280 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 281 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *preplay_esn = x->preplay_esn; x 295 net/xfrm/xfrm_replay.c if (!x->replay_maxdiff || x 296 net/xfrm/xfrm_replay.c ((replay_esn->seq - preplay_esn->seq < x->replay_maxdiff) && x 298 net/xfrm/xfrm_replay.c < x->replay_maxdiff))) { x 299 net/xfrm/xfrm_replay.c if (x->xflags & XFRM_TIME_DEFER) x 308 net/xfrm/xfrm_replay.c if (memcmp(x->replay_esn, x->preplay_esn, x 310 net/xfrm/xfrm_replay.c x->xflags |= XFRM_TIME_DEFER; x 317 net/xfrm/xfrm_replay.c memcpy(x->preplay_esn, x->replay_esn, x 321 net/xfrm/xfrm_replay.c km_state_notify(x, &c); x 323 net/xfrm/xfrm_replay.c if (x->replay_maxage && x 324 net/xfrm/xfrm_replay.c !mod_timer(&x->rtimer, jiffies + x->replay_maxage)) x 325 net/xfrm/xfrm_replay.c x->xflags &= ~XFRM_TIME_DEFER; x 328 net/xfrm/xfrm_replay.c static void xfrm_replay_notify_esn(struct xfrm_state *x, int event) x 332 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 333 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *preplay_esn = x->preplay_esn; x 347 net/xfrm/xfrm_replay.c if (x->replay_maxdiff) { x 361 net/xfrm/xfrm_replay.c if (seq_diff >= x->replay_maxdiff || x 362 net/xfrm/xfrm_replay.c oseq_diff >= x->replay_maxdiff) x 366 net/xfrm/xfrm_replay.c if (x->xflags & XFRM_TIME_DEFER) x 374 net/xfrm/xfrm_replay.c if (memcmp(x->replay_esn, x->preplay_esn, x 376 net/xfrm/xfrm_replay.c x->xflags |= XFRM_TIME_DEFER; x 383 net/xfrm/xfrm_replay.c memcpy(x->preplay_esn, x->replay_esn, x 387 net/xfrm/xfrm_replay.c km_state_notify(x, &c); x 389 net/xfrm/xfrm_replay.c if (x->replay_maxage && x 390 net/xfrm/xfrm_replay.c !mod_timer(&x->rtimer, jiffies + x->replay_maxage)) x 391 net/xfrm/xfrm_replay.c x->xflags &= ~XFRM_TIME_DEFER; x 394 net/xfrm/xfrm_replay.c static int xfrm_replay_overflow_esn(struct xfrm_state *x, struct sk_buff *skb) x 397 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 398 net/xfrm/xfrm_replay.c struct net *net = xs_net(x); x 400 net/xfrm/xfrm_replay.c if (x->type->flags & XFRM_TYPE_REPLAY_PROT) { x 410 net/xfrm/xfrm_replay.c xfrm_audit_state_replay_overflow(x, skb); x 417 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 423 net/xfrm/xfrm_replay.c static int xfrm_replay_check_esn(struct xfrm_state *x, x 428 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 457 net/xfrm/xfrm_replay.c x->stats.replay_window++; x 476 net/xfrm/xfrm_replay.c x->stats.replay++; x 478 net/xfrm/xfrm_replay.c xfrm_audit_state_replay(x, skb, net_seq); x 482 net/xfrm/xfrm_replay.c static int xfrm_replay_recheck_esn(struct xfrm_state *x, x 486 net/xfrm/xfrm_replay.c htonl(xfrm_replay_seqhi(x, net_seq)))) { x 487 net/xfrm/xfrm_replay.c x->stats.replay_window++; x 491 net/xfrm/xfrm_replay.c return xfrm_replay_check_esn(x, skb, net_seq); x 494 net/xfrm/xfrm_replay.c static void xfrm_replay_advance_esn(struct xfrm_state *x, __be32 net_seq) x 499 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 506 net/xfrm/xfrm_replay.c seq_hi = xfrm_replay_seqhi(x, net_seq); x 542 net/xfrm/xfrm_replay.c xfrm_dev_state_advance_esn(x); x 548 net/xfrm/xfrm_replay.c if (xfrm_aevent_is_on(xs_net(x))) x 549 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 553 net/xfrm/xfrm_replay.c static int xfrm_replay_overflow_offload(struct xfrm_state *x, struct sk_buff *skb) x 556 net/xfrm/xfrm_replay.c struct net *net = xs_net(x); x 558 net/xfrm/xfrm_replay.c __u32 oseq = x->replay.oseq; x 561 net/xfrm/xfrm_replay.c return xfrm_replay_overflow(x, skb); x 563 net/xfrm/xfrm_replay.c if (x->type->flags & XFRM_TYPE_REPLAY_PROT) { x 575 net/xfrm/xfrm_replay.c if (unlikely(oseq < x->replay.oseq)) { x 576 net/xfrm/xfrm_replay.c xfrm_audit_state_replay_overflow(x, skb); x 582 net/xfrm/xfrm_replay.c x->replay.oseq = oseq; x 585 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 591 net/xfrm/xfrm_replay.c static int xfrm_replay_overflow_offload_bmp(struct xfrm_state *x, struct sk_buff *skb) x 595 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 596 net/xfrm/xfrm_replay.c struct net *net = xs_net(x); x 600 net/xfrm/xfrm_replay.c return xfrm_replay_overflow_bmp(x, skb); x 602 net/xfrm/xfrm_replay.c if (x->type->flags & XFRM_TYPE_REPLAY_PROT) { x 615 net/xfrm/xfrm_replay.c xfrm_audit_state_replay_overflow(x, skb); x 624 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 630 net/xfrm/xfrm_replay.c static int xfrm_replay_overflow_offload_esn(struct xfrm_state *x, struct sk_buff *skb) x 634 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 635 net/xfrm/xfrm_replay.c struct net *net = xs_net(x); x 640 net/xfrm/xfrm_replay.c return xfrm_replay_overflow_esn(x, skb); x 642 net/xfrm/xfrm_replay.c if (x->type->flags & XFRM_TYPE_REPLAY_PROT) { x 663 net/xfrm/xfrm_replay.c xfrm_audit_state_replay_overflow(x, skb); x 673 net/xfrm/xfrm_replay.c x->repl->notify(x, XFRM_REPLAY_UPDATE); x 728 net/xfrm/xfrm_replay.c int xfrm_init_replay(struct xfrm_state *x) x 730 net/xfrm/xfrm_replay.c struct xfrm_replay_state_esn *replay_esn = x->replay_esn; x 737 net/xfrm/xfrm_replay.c if (x->props.flags & XFRM_STATE_ESN) { x 740 net/xfrm/xfrm_replay.c x->repl = &xfrm_replay_esn; x 742 net/xfrm/xfrm_replay.c x->repl = &xfrm_replay_bmp; x 745 net/xfrm/xfrm_replay.c x->repl = &xfrm_replay_legacy; x 53 net/xfrm/xfrm_state.c static inline bool xfrm_state_hold_rcu(struct xfrm_state __rcu *x) x 55 net/xfrm/xfrm_state.c return refcount_inc_not_zero(&x->refcnt); x 89 net/xfrm/xfrm_state.c struct xfrm_state *x; x 91 net/xfrm/xfrm_state.c hlist_for_each_entry_safe(x, tmp, list, bydst) { x 94 net/xfrm/xfrm_state.c h = __xfrm_dst_hash(&x->id.daddr, &x->props.saddr, x 95 net/xfrm/xfrm_state.c x->props.reqid, x->props.family, x 97 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bydst, ndsttable + h); x 99 net/xfrm/xfrm_state.c h = __xfrm_src_hash(&x->id.daddr, &x->props.saddr, x 100 net/xfrm/xfrm_state.c x->props.family, x 102 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bysrc, nsrctable + h); x 104 net/xfrm/xfrm_state.c if (x->id.spi) { x 105 net/xfrm/xfrm_state.c h = __xfrm_spi_hash(&x->id.daddr, x->id.spi, x 106 net/xfrm/xfrm_state.c x->id.proto, x->props.family, x 108 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->byspi, nspitable + h); x 176 net/xfrm/xfrm_state.c int __xfrm_state_delete(struct xfrm_state *x); x 178 net/xfrm/xfrm_state.c int km_query(struct xfrm_state *x, struct xfrm_tmpl *t, struct xfrm_policy *pol); x 180 net/xfrm/xfrm_state.c void km_state_expired(struct xfrm_state *x, int hard, u32 portid); x 474 net/xfrm/xfrm_state.c void xfrm_state_free(struct xfrm_state *x) x 476 net/xfrm/xfrm_state.c kmem_cache_free(xfrm_state_cache, x); x 480 net/xfrm/xfrm_state.c static void ___xfrm_state_destroy(struct xfrm_state *x) x 482 net/xfrm/xfrm_state.c hrtimer_cancel(&x->mtimer); x 483 net/xfrm/xfrm_state.c del_timer_sync(&x->rtimer); x 484 net/xfrm/xfrm_state.c kfree(x->aead); x 485 net/xfrm/xfrm_state.c kfree(x->aalg); x 486 net/xfrm/xfrm_state.c kfree(x->ealg); x 487 net/xfrm/xfrm_state.c kfree(x->calg); x 488 net/xfrm/xfrm_state.c kfree(x->encap); x 489 net/xfrm/xfrm_state.c kfree(x->coaddr); x 490 net/xfrm/xfrm_state.c kfree(x->replay_esn); x 491 net/xfrm/xfrm_state.c kfree(x->preplay_esn); x 492 net/xfrm/xfrm_state.c if (x->type_offload) x 493 net/xfrm/xfrm_state.c xfrm_put_type_offload(x->type_offload); x 494 net/xfrm/xfrm_state.c if (x->type) { x 495 net/xfrm/xfrm_state.c x->type->destructor(x); x 496 net/xfrm/xfrm_state.c xfrm_put_type(x->type); x 498 net/xfrm/xfrm_state.c if (x->xfrag.page) x 499 net/xfrm/xfrm_state.c put_page(x->xfrag.page); x 500 net/xfrm/xfrm_state.c xfrm_dev_state_free(x); x 501 net/xfrm/xfrm_state.c security_xfrm_state_free(x); x 502 net/xfrm/xfrm_state.c xfrm_state_free(x); x 507 net/xfrm/xfrm_state.c struct xfrm_state *x; x 517 net/xfrm/xfrm_state.c hlist_for_each_entry_safe(x, tmp, &gc_list, gclist) x 518 net/xfrm/xfrm_state.c ___xfrm_state_destroy(x); x 523 net/xfrm/xfrm_state.c struct xfrm_state *x = container_of(me, struct xfrm_state, mtimer); x 530 net/xfrm/xfrm_state.c spin_lock(&x->lock); x 531 net/xfrm/xfrm_state.c if (x->km.state == XFRM_STATE_DEAD) x 533 net/xfrm/xfrm_state.c if (x->km.state == XFRM_STATE_EXPIRED) x 535 net/xfrm/xfrm_state.c if (x->lft.hard_add_expires_seconds) { x 536 net/xfrm/xfrm_state.c long tmo = x->lft.hard_add_expires_seconds + x 537 net/xfrm/xfrm_state.c x->curlft.add_time - now; x 539 net/xfrm/xfrm_state.c if (x->xflags & XFRM_SOFT_EXPIRE) { x 544 net/xfrm/xfrm_state.c x->curlft.add_time = now - x->saved_tmo - 1; x 545 net/xfrm/xfrm_state.c tmo = x->lft.hard_add_expires_seconds - x->saved_tmo; x 552 net/xfrm/xfrm_state.c if (x->lft.hard_use_expires_seconds) { x 553 net/xfrm/xfrm_state.c long tmo = x->lft.hard_use_expires_seconds + x 554 net/xfrm/xfrm_state.c (x->curlft.use_time ? : now) - now; x 560 net/xfrm/xfrm_state.c if (x->km.dying) x 562 net/xfrm/xfrm_state.c if (x->lft.soft_add_expires_seconds) { x 563 net/xfrm/xfrm_state.c long tmo = x->lft.soft_add_expires_seconds + x 564 net/xfrm/xfrm_state.c x->curlft.add_time - now; x 567 net/xfrm/xfrm_state.c x->xflags &= ~XFRM_SOFT_EXPIRE; x 570 net/xfrm/xfrm_state.c x->xflags |= XFRM_SOFT_EXPIRE; x 571 net/xfrm/xfrm_state.c x->saved_tmo = tmo; x 574 net/xfrm/xfrm_state.c if (x->lft.soft_use_expires_seconds) { x 575 net/xfrm/xfrm_state.c long tmo = x->lft.soft_use_expires_seconds + x 576 net/xfrm/xfrm_state.c (x->curlft.use_time ? : now) - now; x 583 net/xfrm/xfrm_state.c x->km.dying = warn; x 585 net/xfrm/xfrm_state.c km_state_expired(x, 0, 0); x 588 net/xfrm/xfrm_state.c hrtimer_forward_now(&x->mtimer, ktime_set(next, 0)); x 595 net/xfrm/xfrm_state.c if (x->km.state == XFRM_STATE_ACQ && x->id.spi == 0) x 596 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_EXPIRED; x 598 net/xfrm/xfrm_state.c err = __xfrm_state_delete(x); x 600 net/xfrm/xfrm_state.c km_state_expired(x, 1, 0); x 602 net/xfrm/xfrm_state.c xfrm_audit_state_delete(x, err ? 0 : 1, true); x 605 net/xfrm/xfrm_state.c spin_unlock(&x->lock); x 613 net/xfrm/xfrm_state.c struct xfrm_state *x; x 615 net/xfrm/xfrm_state.c x = kmem_cache_alloc(xfrm_state_cache, GFP_ATOMIC | __GFP_ZERO); x 617 net/xfrm/xfrm_state.c if (x) { x 618 net/xfrm/xfrm_state.c write_pnet(&x->xs_net, net); x 619 net/xfrm/xfrm_state.c refcount_set(&x->refcnt, 1); x 620 net/xfrm/xfrm_state.c atomic_set(&x->tunnel_users, 0); x 621 net/xfrm/xfrm_state.c INIT_LIST_HEAD(&x->km.all); x 622 net/xfrm/xfrm_state.c INIT_HLIST_NODE(&x->bydst); x 623 net/xfrm/xfrm_state.c INIT_HLIST_NODE(&x->bysrc); x 624 net/xfrm/xfrm_state.c INIT_HLIST_NODE(&x->byspi); x 625 net/xfrm/xfrm_state.c hrtimer_init(&x->mtimer, CLOCK_BOOTTIME, HRTIMER_MODE_ABS_SOFT); x 626 net/xfrm/xfrm_state.c x->mtimer.function = xfrm_timer_handler; x 627 net/xfrm/xfrm_state.c timer_setup(&x->rtimer, xfrm_replay_timer_handler, 0); x 628 net/xfrm/xfrm_state.c x->curlft.add_time = ktime_get_real_seconds(); x 629 net/xfrm/xfrm_state.c x->lft.soft_byte_limit = XFRM_INF; x 630 net/xfrm/xfrm_state.c x->lft.soft_packet_limit = XFRM_INF; x 631 net/xfrm/xfrm_state.c x->lft.hard_byte_limit = XFRM_INF; x 632 net/xfrm/xfrm_state.c x->lft.hard_packet_limit = XFRM_INF; x 633 net/xfrm/xfrm_state.c x->replay_maxage = 0; x 634 net/xfrm/xfrm_state.c x->replay_maxdiff = 0; x 635 net/xfrm/xfrm_state.c spin_lock_init(&x->lock); x 637 net/xfrm/xfrm_state.c return x; x 641 net/xfrm/xfrm_state.c void __xfrm_state_destroy(struct xfrm_state *x, bool sync) x 643 net/xfrm/xfrm_state.c WARN_ON(x->km.state != XFRM_STATE_DEAD); x 647 net/xfrm/xfrm_state.c ___xfrm_state_destroy(x); x 650 net/xfrm/xfrm_state.c hlist_add_head(&x->gclist, &xfrm_state_gc_list); x 657 net/xfrm/xfrm_state.c int __xfrm_state_delete(struct xfrm_state *x) x 659 net/xfrm/xfrm_state.c struct net *net = xs_net(x); x 662 net/xfrm/xfrm_state.c if (x->km.state != XFRM_STATE_DEAD) { x 663 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_DEAD; x 665 net/xfrm/xfrm_state.c list_del(&x->km.all); x 666 net/xfrm/xfrm_state.c hlist_del_rcu(&x->bydst); x 667 net/xfrm/xfrm_state.c hlist_del_rcu(&x->bysrc); x 668 net/xfrm/xfrm_state.c if (x->id.spi) x 669 net/xfrm/xfrm_state.c hlist_del_rcu(&x->byspi); x 673 net/xfrm/xfrm_state.c xfrm_dev_state_delete(x); x 679 net/xfrm/xfrm_state.c xfrm_state_put(x); x 687 net/xfrm/xfrm_state.c int xfrm_state_delete(struct xfrm_state *x) x 691 net/xfrm/xfrm_state.c spin_lock_bh(&x->lock); x 692 net/xfrm/xfrm_state.c err = __xfrm_state_delete(x); x 693 net/xfrm/xfrm_state.c spin_unlock_bh(&x->lock); x 706 net/xfrm/xfrm_state.c struct xfrm_state *x; x 708 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+i, bydst) { x 709 net/xfrm/xfrm_state.c if (xfrm_id_proto_match(x->id.proto, proto) && x 710 net/xfrm/xfrm_state.c (err = security_xfrm_state_delete(x)) != 0) { x 711 net/xfrm/xfrm_state.c xfrm_audit_state_delete(x, 0, task_valid); x 726 net/xfrm/xfrm_state.c struct xfrm_state *x; x 729 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+i, bydst) { x 730 net/xfrm/xfrm_state.c xso = &x->xso; x 733 net/xfrm/xfrm_state.c (err = security_xfrm_state_delete(x)) != 0) { x 734 net/xfrm/xfrm_state.c xfrm_audit_state_delete(x, 0, task_valid); x 767 net/xfrm/xfrm_state.c struct xfrm_state *x; x 769 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+i, bydst) { x 770 net/xfrm/xfrm_state.c if (!xfrm_state_kern(x) && x 771 net/xfrm/xfrm_state.c xfrm_id_proto_match(x->id.proto, proto)) { x 772 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 775 net/xfrm/xfrm_state.c err = xfrm_state_delete(x); x 776 net/xfrm/xfrm_state.c xfrm_audit_state_delete(x, err ? 0 : 1, x 779 net/xfrm/xfrm_state.c xfrm_state_put_sync(x); x 781 net/xfrm/xfrm_state.c xfrm_state_put(x); x 810 net/xfrm/xfrm_state.c struct xfrm_state *x; x 813 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+i, bydst) { x 814 net/xfrm/xfrm_state.c xso = &x->xso; x 816 net/xfrm/xfrm_state.c if (!xfrm_state_kern(x) && xso->dev == dev) { x 817 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 820 net/xfrm/xfrm_state.c err = xfrm_state_delete(x); x 821 net/xfrm/xfrm_state.c xfrm_audit_state_delete(x, err ? 0 : 1, x 823 net/xfrm/xfrm_state.c xfrm_state_put(x); x 889 net/xfrm/xfrm_state.c xfrm_init_tempstate(struct xfrm_state *x, const struct flowi *fl, x 896 net/xfrm/xfrm_state.c __xfrm4_init_tempsel(&x->sel, fl); x 899 net/xfrm/xfrm_state.c __xfrm6_init_tempsel(&x->sel, fl); x 903 net/xfrm/xfrm_state.c x->id = tmpl->id; x 907 net/xfrm/xfrm_state.c if (x->id.daddr.a4 == 0) x 908 net/xfrm/xfrm_state.c x->id.daddr.a4 = daddr->a4; x 909 net/xfrm/xfrm_state.c x->props.saddr = tmpl->saddr; x 910 net/xfrm/xfrm_state.c if (x->props.saddr.a4 == 0) x 911 net/xfrm/xfrm_state.c x->props.saddr.a4 = saddr->a4; x 914 net/xfrm/xfrm_state.c if (ipv6_addr_any((struct in6_addr *)&x->id.daddr)) x 915 net/xfrm/xfrm_state.c memcpy(&x->id.daddr, daddr, sizeof(x->sel.daddr)); x 916 net/xfrm/xfrm_state.c memcpy(&x->props.saddr, &tmpl->saddr, sizeof(x->props.saddr)); x 917 net/xfrm/xfrm_state.c if (ipv6_addr_any((struct in6_addr *)&x->props.saddr)) x 918 net/xfrm/xfrm_state.c memcpy(&x->props.saddr, saddr, sizeof(x->props.saddr)); x 922 net/xfrm/xfrm_state.c x->props.mode = tmpl->mode; x 923 net/xfrm/xfrm_state.c x->props.reqid = tmpl->reqid; x 924 net/xfrm/xfrm_state.c x->props.family = tmpl->encap_family; x 933 net/xfrm/xfrm_state.c struct xfrm_state *x; x 935 net/xfrm/xfrm_state.c hlist_for_each_entry_rcu(x, net->xfrm.state_byspi + h, byspi) { x 936 net/xfrm/xfrm_state.c if (x->props.family != family || x 937 net/xfrm/xfrm_state.c x->id.spi != spi || x 938 net/xfrm/xfrm_state.c x->id.proto != proto || x 939 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x->id.daddr, daddr, family)) x 942 net/xfrm/xfrm_state.c if ((mark & x->mark.m) != x->mark.v) x 944 net/xfrm/xfrm_state.c if (!xfrm_state_hold_rcu(x)) x 946 net/xfrm/xfrm_state.c return x; x 958 net/xfrm/xfrm_state.c struct xfrm_state *x; x 960 net/xfrm/xfrm_state.c hlist_for_each_entry_rcu(x, net->xfrm.state_bysrc + h, bysrc) { x 961 net/xfrm/xfrm_state.c if (x->props.family != family || x 962 net/xfrm/xfrm_state.c x->id.proto != proto || x 963 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x->id.daddr, daddr, family) || x 964 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x->props.saddr, saddr, family)) x 967 net/xfrm/xfrm_state.c if ((mark & x->mark.m) != x->mark.v) x 969 net/xfrm/xfrm_state.c if (!xfrm_state_hold_rcu(x)) x 971 net/xfrm/xfrm_state.c return x; x 978 net/xfrm/xfrm_state.c __xfrm_state_locate(struct xfrm_state *x, int use_spi, int family) x 980 net/xfrm/xfrm_state.c struct net *net = xs_net(x); x 981 net/xfrm/xfrm_state.c u32 mark = x->mark.v & x->mark.m; x 984 net/xfrm/xfrm_state.c return __xfrm_state_lookup(net, mark, &x->id.daddr, x 985 net/xfrm/xfrm_state.c x->id.spi, x->id.proto, family); x 988 net/xfrm/xfrm_state.c &x->id.daddr, x 989 net/xfrm/xfrm_state.c &x->props.saddr, x 990 net/xfrm/xfrm_state.c x->id.proto, family); x 1001 net/xfrm/xfrm_state.c static void xfrm_state_look_at(struct xfrm_policy *pol, struct xfrm_state *x, x 1017 net/xfrm/xfrm_state.c if (x->km.state == XFRM_STATE_VALID) { x 1018 net/xfrm/xfrm_state.c if ((x->sel.family && x 1019 net/xfrm/xfrm_state.c !xfrm_selector_match(&x->sel, fl, x->sel.family)) || x 1020 net/xfrm/xfrm_state.c !security_xfrm_state_pol_flow_match(x, pol, fl)) x 1024 net/xfrm/xfrm_state.c (*best)->km.dying > x->km.dying || x 1025 net/xfrm/xfrm_state.c ((*best)->km.dying == x->km.dying && x 1026 net/xfrm/xfrm_state.c (*best)->curlft.add_time < x->curlft.add_time)) x 1027 net/xfrm/xfrm_state.c *best = x; x 1028 net/xfrm/xfrm_state.c } else if (x->km.state == XFRM_STATE_ACQ) { x 1030 net/xfrm/xfrm_state.c } else if (x->km.state == XFRM_STATE_ERROR || x 1031 net/xfrm/xfrm_state.c x->km.state == XFRM_STATE_EXPIRED) { x 1032 net/xfrm/xfrm_state.c if (xfrm_selector_match(&x->sel, fl, x->sel.family) && x 1033 net/xfrm/xfrm_state.c security_xfrm_state_pol_flow_match(x, pol, fl)) x 1047 net/xfrm/xfrm_state.c struct xfrm_state *x, *x0, *to_put; x 1062 net/xfrm/xfrm_state.c hlist_for_each_entry_rcu(x, net->xfrm.state_bydst + h, bydst) { x 1063 net/xfrm/xfrm_state.c if (x->props.family == encap_family && x 1064 net/xfrm/xfrm_state.c x->props.reqid == tmpl->reqid && x 1065 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && x 1066 net/xfrm/xfrm_state.c x->if_id == if_id && x 1067 net/xfrm/xfrm_state.c !(x->props.flags & XFRM_STATE_WILDRECV) && x 1068 net/xfrm/xfrm_state.c xfrm_state_addr_check(x, daddr, saddr, encap_family) && x 1069 net/xfrm/xfrm_state.c tmpl->mode == x->props.mode && x 1070 net/xfrm/xfrm_state.c tmpl->id.proto == x->id.proto && x 1071 net/xfrm/xfrm_state.c (tmpl->id.spi == x->id.spi || !tmpl->id.spi)) x 1072 net/xfrm/xfrm_state.c xfrm_state_look_at(pol, x, fl, encap_family, x 1079 net/xfrm/xfrm_state.c hlist_for_each_entry_rcu(x, net->xfrm.state_bydst + h_wildcard, bydst) { x 1080 net/xfrm/xfrm_state.c if (x->props.family == encap_family && x 1081 net/xfrm/xfrm_state.c x->props.reqid == tmpl->reqid && x 1082 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && x 1083 net/xfrm/xfrm_state.c x->if_id == if_id && x 1084 net/xfrm/xfrm_state.c !(x->props.flags & XFRM_STATE_WILDRECV) && x 1085 net/xfrm/xfrm_state.c xfrm_addr_equal(&x->id.daddr, daddr, encap_family) && x 1086 net/xfrm/xfrm_state.c tmpl->mode == x->props.mode && x 1087 net/xfrm/xfrm_state.c tmpl->id.proto == x->id.proto && x 1088 net/xfrm/xfrm_state.c (tmpl->id.spi == x->id.spi || !tmpl->id.spi)) x 1089 net/xfrm/xfrm_state.c xfrm_state_look_at(pol, x, fl, encap_family, x 1094 net/xfrm/xfrm_state.c x = best; x 1095 net/xfrm/xfrm_state.c if (!x && !error && !acquire_in_progress) { x 1114 net/xfrm/xfrm_state.c x = xfrm_state_alloc(net); x 1115 net/xfrm/xfrm_state.c if (x == NULL) { x 1121 net/xfrm/xfrm_state.c xfrm_init_tempstate(x, fl, tmpl, daddr, saddr, family); x 1122 net/xfrm/xfrm_state.c memcpy(&x->mark, &pol->mark, sizeof(x->mark)); x 1123 net/xfrm/xfrm_state.c x->if_id = if_id; x 1125 net/xfrm/xfrm_state.c error = security_xfrm_state_alloc_acquire(x, pol->security, fl->flowi_secid); x 1127 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_DEAD; x 1128 net/xfrm/xfrm_state.c to_put = x; x 1129 net/xfrm/xfrm_state.c x = NULL; x 1133 net/xfrm/xfrm_state.c if (km_query(x, tmpl, pol) == 0) { x 1135 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_ACQ; x 1136 net/xfrm/xfrm_state.c list_add(&x->km.all, &net->xfrm.state_all); x 1137 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bydst, net->xfrm.state_bydst + h); x 1139 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bysrc, net->xfrm.state_bysrc + h); x 1140 net/xfrm/xfrm_state.c if (x->id.spi) { x 1141 net/xfrm/xfrm_state.c h = xfrm_spi_hash(net, &x->id.daddr, x->id.spi, x->id.proto, encap_family); x 1142 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->byspi, net->xfrm.state_byspi + h); x 1144 net/xfrm/xfrm_state.c x->lft.hard_add_expires_seconds = net->xfrm.sysctl_acq_expires; x 1145 net/xfrm/xfrm_state.c hrtimer_start(&x->mtimer, x 1149 net/xfrm/xfrm_state.c xfrm_hash_grow_check(net, x->bydst.next != NULL); x 1152 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_DEAD; x 1153 net/xfrm/xfrm_state.c to_put = x; x 1154 net/xfrm/xfrm_state.c x = NULL; x 1159 net/xfrm/xfrm_state.c if (x) { x 1160 net/xfrm/xfrm_state.c if (!xfrm_state_hold_rcu(x)) { x 1162 net/xfrm/xfrm_state.c x = NULL; x 1173 net/xfrm/xfrm_state.c if (x) { x 1174 net/xfrm/xfrm_state.c xfrm_state_put(x); x 1175 net/xfrm/xfrm_state.c x = NULL; x 1179 net/xfrm/xfrm_state.c return x; x 1188 net/xfrm/xfrm_state.c struct xfrm_state *rx = NULL, *x = NULL; x 1192 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+h, bydst) { x 1193 net/xfrm/xfrm_state.c if (x->props.family == family && x 1194 net/xfrm/xfrm_state.c x->props.reqid == reqid && x 1195 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && x 1196 net/xfrm/xfrm_state.c x->if_id == if_id && x 1197 net/xfrm/xfrm_state.c !(x->props.flags & XFRM_STATE_WILDRECV) && x 1198 net/xfrm/xfrm_state.c xfrm_state_addr_check(x, daddr, saddr, family) && x 1199 net/xfrm/xfrm_state.c mode == x->props.mode && x 1200 net/xfrm/xfrm_state.c proto == x->id.proto && x 1201 net/xfrm/xfrm_state.c x->km.state == XFRM_STATE_VALID) { x 1202 net/xfrm/xfrm_state.c rx = x; x 1219 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1224 net/xfrm/xfrm_state.c x = container_of(w, struct xfrm_state, km); x 1225 net/xfrm/xfrm_state.c if (x->props.family != family || x 1226 net/xfrm/xfrm_state.c x->id.spi != spi) x 1229 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 1231 net/xfrm/xfrm_state.c return x; x 1238 net/xfrm/xfrm_state.c static void __xfrm_state_insert(struct xfrm_state *x) x 1240 net/xfrm/xfrm_state.c struct net *net = xs_net(x); x 1243 net/xfrm/xfrm_state.c list_add(&x->km.all, &net->xfrm.state_all); x 1245 net/xfrm/xfrm_state.c h = xfrm_dst_hash(net, &x->id.daddr, &x->props.saddr, x 1246 net/xfrm/xfrm_state.c x->props.reqid, x->props.family); x 1247 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bydst, net->xfrm.state_bydst + h); x 1249 net/xfrm/xfrm_state.c h = xfrm_src_hash(net, &x->id.daddr, &x->props.saddr, x->props.family); x 1250 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bysrc, net->xfrm.state_bysrc + h); x 1252 net/xfrm/xfrm_state.c if (x->id.spi) { x 1253 net/xfrm/xfrm_state.c h = xfrm_spi_hash(net, &x->id.daddr, x->id.spi, x->id.proto, x 1254 net/xfrm/xfrm_state.c x->props.family); x 1256 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->byspi, net->xfrm.state_byspi + h); x 1259 net/xfrm/xfrm_state.c hrtimer_start(&x->mtimer, ktime_set(1, 0), HRTIMER_MODE_REL_SOFT); x 1260 net/xfrm/xfrm_state.c if (x->replay_maxage) x 1261 net/xfrm/xfrm_state.c mod_timer(&x->rtimer, jiffies + x->replay_maxage); x 1265 net/xfrm/xfrm_state.c xfrm_hash_grow_check(net, x->bydst.next != NULL); x 1274 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1280 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+h, bydst) { x 1281 net/xfrm/xfrm_state.c if (x->props.family == family && x 1282 net/xfrm/xfrm_state.c x->props.reqid == reqid && x 1283 net/xfrm/xfrm_state.c x->if_id == if_id && x 1284 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && x 1285 net/xfrm/xfrm_state.c xfrm_addr_equal(&x->id.daddr, &xnew->id.daddr, family) && x 1286 net/xfrm/xfrm_state.c xfrm_addr_equal(&x->props.saddr, &xnew->props.saddr, family)) x 1287 net/xfrm/xfrm_state.c x->genid++; x 1291 net/xfrm/xfrm_state.c void xfrm_state_insert(struct xfrm_state *x) x 1293 net/xfrm/xfrm_state.c struct net *net = xs_net(x); x 1296 net/xfrm/xfrm_state.c __xfrm_state_bump_genids(x); x 1297 net/xfrm/xfrm_state.c __xfrm_state_insert(x); x 1312 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1315 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+h, bydst) { x 1316 net/xfrm/xfrm_state.c if (x->props.reqid != reqid || x 1317 net/xfrm/xfrm_state.c x->props.mode != mode || x 1318 net/xfrm/xfrm_state.c x->props.family != family || x 1319 net/xfrm/xfrm_state.c x->km.state != XFRM_STATE_ACQ || x 1320 net/xfrm/xfrm_state.c x->id.spi != 0 || x 1321 net/xfrm/xfrm_state.c x->id.proto != proto || x 1322 net/xfrm/xfrm_state.c (mark & x->mark.m) != x->mark.v || x 1323 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x->id.daddr, daddr, family) || x 1324 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x->props.saddr, saddr, family)) x 1327 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 1328 net/xfrm/xfrm_state.c return x; x 1334 net/xfrm/xfrm_state.c x = xfrm_state_alloc(net); x 1335 net/xfrm/xfrm_state.c if (likely(x)) { x 1338 net/xfrm/xfrm_state.c x->sel.daddr.a4 = daddr->a4; x 1339 net/xfrm/xfrm_state.c x->sel.saddr.a4 = saddr->a4; x 1340 net/xfrm/xfrm_state.c x->sel.prefixlen_d = 32; x 1341 net/xfrm/xfrm_state.c x->sel.prefixlen_s = 32; x 1342 net/xfrm/xfrm_state.c x->props.saddr.a4 = saddr->a4; x 1343 net/xfrm/xfrm_state.c x->id.daddr.a4 = daddr->a4; x 1347 net/xfrm/xfrm_state.c x->sel.daddr.in6 = daddr->in6; x 1348 net/xfrm/xfrm_state.c x->sel.saddr.in6 = saddr->in6; x 1349 net/xfrm/xfrm_state.c x->sel.prefixlen_d = 128; x 1350 net/xfrm/xfrm_state.c x->sel.prefixlen_s = 128; x 1351 net/xfrm/xfrm_state.c x->props.saddr.in6 = saddr->in6; x 1352 net/xfrm/xfrm_state.c x->id.daddr.in6 = daddr->in6; x 1356 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_ACQ; x 1357 net/xfrm/xfrm_state.c x->id.proto = proto; x 1358 net/xfrm/xfrm_state.c x->props.family = family; x 1359 net/xfrm/xfrm_state.c x->props.mode = mode; x 1360 net/xfrm/xfrm_state.c x->props.reqid = reqid; x 1361 net/xfrm/xfrm_state.c x->if_id = if_id; x 1362 net/xfrm/xfrm_state.c x->mark.v = m->v; x 1363 net/xfrm/xfrm_state.c x->mark.m = m->m; x 1364 net/xfrm/xfrm_state.c x->lft.hard_add_expires_seconds = net->xfrm.sysctl_acq_expires; x 1365 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 1366 net/xfrm/xfrm_state.c hrtimer_start(&x->mtimer, x 1369 net/xfrm/xfrm_state.c list_add(&x->km.all, &net->xfrm.state_all); x 1370 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bydst, net->xfrm.state_bydst + h); x 1372 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->bysrc, net->xfrm.state_bysrc + h); x 1376 net/xfrm/xfrm_state.c xfrm_hash_grow_check(net, x->bydst.next != NULL); x 1379 net/xfrm/xfrm_state.c return x; x 1384 net/xfrm/xfrm_state.c int xfrm_state_add(struct xfrm_state *x) x 1386 net/xfrm/xfrm_state.c struct net *net = xs_net(x); x 1390 net/xfrm/xfrm_state.c u32 mark = x->mark.v & x->mark.m; x 1391 net/xfrm/xfrm_state.c int use_spi = xfrm_id_proto_match(x->id.proto, IPSEC_PROTO_ANY); x 1393 net/xfrm/xfrm_state.c family = x->props.family; x 1399 net/xfrm/xfrm_state.c x1 = __xfrm_state_locate(x, use_spi, family); x 1407 net/xfrm/xfrm_state.c if (use_spi && x->km.seq) { x 1408 net/xfrm/xfrm_state.c x1 = __xfrm_find_acq_byseq(net, mark, x->km.seq); x 1409 net/xfrm/xfrm_state.c if (x1 && ((x1->id.proto != x->id.proto) || x 1410 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x1->id.daddr, &x->id.daddr, family))) { x 1417 net/xfrm/xfrm_state.c x1 = __find_acq_core(net, &x->mark, family, x->props.mode, x 1418 net/xfrm/xfrm_state.c x->props.reqid, x->if_id, x->id.proto, x 1419 net/xfrm/xfrm_state.c &x->id.daddr, &x->props.saddr, 0); x 1421 net/xfrm/xfrm_state.c __xfrm_state_bump_genids(x); x 1422 net/xfrm/xfrm_state.c __xfrm_state_insert(x); x 1445 net/xfrm/xfrm_state.c struct xfrm_state *x = xfrm_state_alloc(net); x 1446 net/xfrm/xfrm_state.c if (!x) x 1449 net/xfrm/xfrm_state.c memcpy(&x->id, &orig->id, sizeof(x->id)); x 1450 net/xfrm/xfrm_state.c memcpy(&x->sel, &orig->sel, sizeof(x->sel)); x 1451 net/xfrm/xfrm_state.c memcpy(&x->lft, &orig->lft, sizeof(x->lft)); x 1452 net/xfrm/xfrm_state.c x->props.mode = orig->props.mode; x 1453 net/xfrm/xfrm_state.c x->props.replay_window = orig->props.replay_window; x 1454 net/xfrm/xfrm_state.c x->props.reqid = orig->props.reqid; x 1455 net/xfrm/xfrm_state.c x->props.family = orig->props.family; x 1456 net/xfrm/xfrm_state.c x->props.saddr = orig->props.saddr; x 1459 net/xfrm/xfrm_state.c x->aalg = xfrm_algo_auth_clone(orig->aalg); x 1460 net/xfrm/xfrm_state.c if (!x->aalg) x 1463 net/xfrm/xfrm_state.c x->props.aalgo = orig->props.aalgo; x 1466 net/xfrm/xfrm_state.c x->aead = xfrm_algo_aead_clone(orig->aead); x 1467 net/xfrm/xfrm_state.c x->geniv = orig->geniv; x 1468 net/xfrm/xfrm_state.c if (!x->aead) x 1472 net/xfrm/xfrm_state.c x->ealg = xfrm_algo_clone(orig->ealg); x 1473 net/xfrm/xfrm_state.c if (!x->ealg) x 1476 net/xfrm/xfrm_state.c x->props.ealgo = orig->props.ealgo; x 1479 net/xfrm/xfrm_state.c x->calg = xfrm_algo_clone(orig->calg); x 1480 net/xfrm/xfrm_state.c if (!x->calg) x 1483 net/xfrm/xfrm_state.c x->props.calgo = orig->props.calgo; x 1487 net/xfrm/xfrm_state.c x->encap = kmemdup(encap, sizeof(*x->encap), x 1490 net/xfrm/xfrm_state.c x->encap = kmemdup(orig->encap, sizeof(*x->encap), x 1493 net/xfrm/xfrm_state.c if (!x->encap) x 1498 net/xfrm/xfrm_state.c x->coaddr = kmemdup(orig->coaddr, sizeof(*x->coaddr), x 1500 net/xfrm/xfrm_state.c if (!x->coaddr) x 1505 net/xfrm/xfrm_state.c if (xfrm_replay_clone(x, orig)) x 1509 net/xfrm/xfrm_state.c memcpy(&x->mark, &orig->mark, sizeof(x->mark)); x 1511 net/xfrm/xfrm_state.c if (xfrm_init_state(x) < 0) x 1514 net/xfrm/xfrm_state.c x->props.flags = orig->props.flags; x 1515 net/xfrm/xfrm_state.c x->props.extra_flags = orig->props.extra_flags; x 1517 net/xfrm/xfrm_state.c x->if_id = orig->if_id; x 1518 net/xfrm/xfrm_state.c x->tfcpad = orig->tfcpad; x 1519 net/xfrm/xfrm_state.c x->replay_maxdiff = orig->replay_maxdiff; x 1520 net/xfrm/xfrm_state.c x->replay_maxage = orig->replay_maxage; x 1521 net/xfrm/xfrm_state.c x->curlft.add_time = orig->curlft.add_time; x 1522 net/xfrm/xfrm_state.c x->km.state = orig->km.state; x 1523 net/xfrm/xfrm_state.c x->km.seq = orig->km.seq; x 1524 net/xfrm/xfrm_state.c x->replay = orig->replay; x 1525 net/xfrm/xfrm_state.c x->preplay = orig->preplay; x 1527 net/xfrm/xfrm_state.c return x; x 1530 net/xfrm/xfrm_state.c xfrm_state_put(x); x 1538 net/xfrm/xfrm_state.c struct xfrm_state *x = NULL; x 1545 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+h, bydst) { x 1546 net/xfrm/xfrm_state.c if (x->props.mode != m->mode || x 1547 net/xfrm/xfrm_state.c x->id.proto != m->proto) x 1549 net/xfrm/xfrm_state.c if (m->reqid && x->props.reqid != m->reqid) x 1551 net/xfrm/xfrm_state.c if (!xfrm_addr_equal(&x->id.daddr, &m->old_daddr, x 1553 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x->props.saddr, &m->old_saddr, x 1556 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 1562 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bysrc+h, bysrc) { x 1563 net/xfrm/xfrm_state.c if (x->props.mode != m->mode || x 1564 net/xfrm/xfrm_state.c x->id.proto != m->proto) x 1566 net/xfrm/xfrm_state.c if (!xfrm_addr_equal(&x->id.daddr, &m->old_daddr, x 1568 net/xfrm/xfrm_state.c !xfrm_addr_equal(&x->props.saddr, &m->old_saddr, x 1571 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 1578 net/xfrm/xfrm_state.c return x; x 1582 net/xfrm/xfrm_state.c struct xfrm_state *xfrm_state_migrate(struct xfrm_state *x, x 1588 net/xfrm/xfrm_state.c xc = xfrm_state_clone(x, encap); x 1596 net/xfrm/xfrm_state.c if (xfrm_addr_equal(&x->id.daddr, &m->new_daddr, m->new_family)) { x 1613 net/xfrm/xfrm_state.c int xfrm_state_update(struct xfrm_state *x) x 1617 net/xfrm/xfrm_state.c int use_spi = xfrm_id_proto_match(x->id.proto, IPSEC_PROTO_ANY); x 1618 net/xfrm/xfrm_state.c struct net *net = xs_net(x); x 1623 net/xfrm/xfrm_state.c x1 = __xfrm_state_locate(x, use_spi, x->props.family); x 1636 net/xfrm/xfrm_state.c __xfrm_state_insert(x); x 1637 net/xfrm/xfrm_state.c x = NULL; x 1650 net/xfrm/xfrm_state.c if (!x) { x 1659 net/xfrm/xfrm_state.c if (x->encap && x1->encap && x 1660 net/xfrm/xfrm_state.c x->encap->encap_type == x1->encap->encap_type) x 1661 net/xfrm/xfrm_state.c memcpy(x1->encap, x->encap, sizeof(*x1->encap)); x 1662 net/xfrm/xfrm_state.c else if (x->encap || x1->encap) x 1665 net/xfrm/xfrm_state.c if (x->coaddr && x1->coaddr) { x 1666 net/xfrm/xfrm_state.c memcpy(x1->coaddr, x->coaddr, sizeof(*x1->coaddr)); x 1668 net/xfrm/xfrm_state.c if (!use_spi && memcmp(&x1->sel, &x->sel, sizeof(x1->sel))) x 1669 net/xfrm/xfrm_state.c memcpy(&x1->sel, &x->sel, sizeof(x1->sel)); x 1670 net/xfrm/xfrm_state.c memcpy(&x1->lft, &x->lft, sizeof(x1->lft)); x 1678 net/xfrm/xfrm_state.c if (x->props.smark.m || x->props.smark.v || x->if_id) { x 1681 net/xfrm/xfrm_state.c if (x->props.smark.m || x->props.smark.v) x 1682 net/xfrm/xfrm_state.c x1->props.smark = x->props.smark; x 1684 net/xfrm/xfrm_state.c if (x->if_id) x 1685 net/xfrm/xfrm_state.c x1->if_id = x->if_id; x 1692 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_DEAD; x 1693 net/xfrm/xfrm_state.c __xfrm_state_put(x); x 1705 net/xfrm/xfrm_state.c int xfrm_state_check_expire(struct xfrm_state *x) x 1707 net/xfrm/xfrm_state.c if (!x->curlft.use_time) x 1708 net/xfrm/xfrm_state.c x->curlft.use_time = ktime_get_real_seconds(); x 1710 net/xfrm/xfrm_state.c if (x->curlft.bytes >= x->lft.hard_byte_limit || x 1711 net/xfrm/xfrm_state.c x->curlft.packets >= x->lft.hard_packet_limit) { x 1712 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_EXPIRED; x 1713 net/xfrm/xfrm_state.c hrtimer_start(&x->mtimer, 0, HRTIMER_MODE_REL_SOFT); x 1717 net/xfrm/xfrm_state.c if (!x->km.dying && x 1718 net/xfrm/xfrm_state.c (x->curlft.bytes >= x->lft.soft_byte_limit || x 1719 net/xfrm/xfrm_state.c x->curlft.packets >= x->lft.soft_packet_limit)) { x 1720 net/xfrm/xfrm_state.c x->km.dying = 1; x 1721 net/xfrm/xfrm_state.c km_state_expired(x, 0, 0); x 1731 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1734 net/xfrm/xfrm_state.c x = __xfrm_state_lookup(net, mark, daddr, spi, proto, family); x 1736 net/xfrm/xfrm_state.c return x; x 1745 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1748 net/xfrm/xfrm_state.c x = __xfrm_state_lookup_byaddr(net, mark, daddr, saddr, proto, family); x 1750 net/xfrm/xfrm_state.c return x; x 1759 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1762 net/xfrm/xfrm_state.c x = __find_acq_core(net, mark, family, mode, reqid, if_id, proto, daddr, saddr, create); x 1765 net/xfrm/xfrm_state.c return x; x 1902 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1904 net/xfrm/xfrm_state.c hlist_for_each_entry(x, net->xfrm.state_bydst+i, bydst) { x 1905 net/xfrm/xfrm_state.c if (x->km.seq == seq && x 1906 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && x 1907 net/xfrm/xfrm_state.c x->km.state == XFRM_STATE_ACQ) { x 1908 net/xfrm/xfrm_state.c xfrm_state_hold(x); x 1909 net/xfrm/xfrm_state.c return x; x 1918 net/xfrm/xfrm_state.c struct xfrm_state *x; x 1921 net/xfrm/xfrm_state.c x = __xfrm_find_acq_byseq(net, mark, seq); x 1923 net/xfrm/xfrm_state.c return x; x 1964 net/xfrm/xfrm_state.c int xfrm_alloc_spi(struct xfrm_state *x, u32 low, u32 high) x 1966 net/xfrm/xfrm_state.c struct net *net = xs_net(x); x 1972 net/xfrm/xfrm_state.c u32 mark = x->mark.v & x->mark.m; x 1974 net/xfrm/xfrm_state.c spin_lock_bh(&x->lock); x 1975 net/xfrm/xfrm_state.c if (x->km.state == XFRM_STATE_DEAD) x 1979 net/xfrm/xfrm_state.c if (x->id.spi) x 1985 net/xfrm/xfrm_state.c x0 = xfrm_state_lookup(net, mark, &x->id.daddr, minspi, x->id.proto, x->props.family); x 1990 net/xfrm/xfrm_state.c x->id.spi = minspi; x 1995 net/xfrm/xfrm_state.c x0 = xfrm_state_lookup(net, mark, &x->id.daddr, htonl(spi), x->id.proto, x->props.family); x 1997 net/xfrm/xfrm_state.c x->id.spi = htonl(spi); x 2003 net/xfrm/xfrm_state.c if (x->id.spi) { x 2005 net/xfrm/xfrm_state.c h = xfrm_spi_hash(net, &x->id.daddr, x->id.spi, x->id.proto, x->props.family); x 2006 net/xfrm/xfrm_state.c hlist_add_head_rcu(&x->byspi, net->xfrm.state_byspi + h); x 2013 net/xfrm/xfrm_state.c spin_unlock_bh(&x->lock); x 2019 net/xfrm/xfrm_state.c static bool __xfrm_state_filter_match(struct xfrm_state *x, x 2025 net/xfrm/xfrm_state.c x->props.family != filter->family) x 2028 net/xfrm/xfrm_state.c return addr_match(&x->props.saddr, &filter->saddr, x 2030 net/xfrm/xfrm_state.c addr_match(&x->id.daddr, &filter->daddr, x 2041 net/xfrm/xfrm_state.c struct xfrm_state_walk *x; x 2049 net/xfrm/xfrm_state.c x = list_first_entry(&net->xfrm.state_all, struct xfrm_state_walk, all); x 2051 net/xfrm/xfrm_state.c x = list_first_entry(&walk->all, struct xfrm_state_walk, all); x 2052 net/xfrm/xfrm_state.c list_for_each_entry_from(x, &net->xfrm.state_all, all) { x 2053 net/xfrm/xfrm_state.c if (x->state == XFRM_STATE_DEAD) x 2055 net/xfrm/xfrm_state.c state = container_of(x, struct xfrm_state, km); x 2062 net/xfrm/xfrm_state.c list_move_tail(&walk->all, &x->all); x 2104 net/xfrm/xfrm_state.c struct xfrm_state *x = from_timer(x, t, rtimer); x 2106 net/xfrm/xfrm_state.c spin_lock(&x->lock); x 2108 net/xfrm/xfrm_state.c if (x->km.state == XFRM_STATE_VALID) { x 2109 net/xfrm/xfrm_state.c if (xfrm_aevent_is_on(xs_net(x))) x 2110 net/xfrm/xfrm_state.c x->repl->notify(x, XFRM_REPLAY_TIMEOUT); x 2112 net/xfrm/xfrm_state.c x->xflags |= XFRM_TIME_DEFER; x 2115 net/xfrm/xfrm_state.c spin_unlock(&x->lock); x 2131 net/xfrm/xfrm_state.c void km_state_notify(struct xfrm_state *x, const struct km_event *c) x 2137 net/xfrm/xfrm_state.c km->notify(x, c); x 2144 net/xfrm/xfrm_state.c void km_state_expired(struct xfrm_state *x, int hard, u32 portid) x 2151 net/xfrm/xfrm_state.c km_state_notify(x, &c); x 2159 net/xfrm/xfrm_state.c int km_query(struct xfrm_state *x, struct xfrm_tmpl *t, struct xfrm_policy *pol) x 2166 net/xfrm/xfrm_state.c acqret = km->acquire(x, t, pol); x 2175 net/xfrm/xfrm_state.c int km_new_mapping(struct xfrm_state *x, xfrm_address_t *ipaddr, __be16 sport) x 2183 net/xfrm/xfrm_state.c err = km->new_mapping(x, ipaddr, sport); x 2396 net/xfrm/xfrm_state.c void xfrm_state_delete_tunnel(struct xfrm_state *x) x 2398 net/xfrm/xfrm_state.c if (x->tunnel) { x 2399 net/xfrm/xfrm_state.c struct xfrm_state *t = x->tunnel; x 2405 net/xfrm/xfrm_state.c x->tunnel = NULL; x 2410 net/xfrm/xfrm_state.c u32 xfrm_state_mtu(struct xfrm_state *x, int mtu) x 2412 net/xfrm/xfrm_state.c const struct xfrm_type *type = READ_ONCE(x->type); x 2416 net/xfrm/xfrm_state.c if (x->km.state != XFRM_STATE_VALID || x 2418 net/xfrm/xfrm_state.c return mtu - x->props.header_len; x 2420 net/xfrm/xfrm_state.c aead = x->data; x 2423 net/xfrm/xfrm_state.c switch (x->props.mode) { x 2426 net/xfrm/xfrm_state.c if (x->props.family == AF_INET) x 2428 net/xfrm/xfrm_state.c else if (x->props.family == AF_INET6) x 2438 net/xfrm/xfrm_state.c return ((mtu - x->props.header_len - crypto_aead_authsize(aead) - x 2443 net/xfrm/xfrm_state.c int __xfrm_init_state(struct xfrm_state *x, bool init_replay, bool offload) x 2447 net/xfrm/xfrm_state.c int family = x->props.family; x 2451 net/xfrm/xfrm_state.c xs_net(x)->ipv4.sysctl_ip_no_pmtu_disc) x 2452 net/xfrm/xfrm_state.c x->props.flags |= XFRM_STATE_NOPMTUDISC; x 2456 net/xfrm/xfrm_state.c if (x->sel.family != AF_UNSPEC) { x 2457 net/xfrm/xfrm_state.c inner_mode = xfrm_get_mode(x->props.mode, x->sel.family); x 2462 net/xfrm/xfrm_state.c family != x->sel.family) x 2465 net/xfrm/xfrm_state.c x->inner_mode = *inner_mode; x 2470 net/xfrm/xfrm_state.c inner_mode = xfrm_get_mode(x->props.mode, x->props.family); x 2477 net/xfrm/xfrm_state.c x->inner_mode = *inner_mode; x 2479 net/xfrm/xfrm_state.c if (x->props.family == AF_INET) x 2482 net/xfrm/xfrm_state.c inner_mode_iaf = xfrm_get_mode(x->props.mode, iafamily); x 2485 net/xfrm/xfrm_state.c x->inner_mode_iaf = *inner_mode_iaf; x 2489 net/xfrm/xfrm_state.c x->type = xfrm_get_type(x->id.proto, family); x 2490 net/xfrm/xfrm_state.c if (x->type == NULL) x 2493 net/xfrm/xfrm_state.c x->type_offload = xfrm_get_type_offload(x->id.proto, family, offload); x 2495 net/xfrm/xfrm_state.c err = x->type->init_state(x); x 2499 net/xfrm/xfrm_state.c outer_mode = xfrm_get_mode(x->props.mode, family); x 2505 net/xfrm/xfrm_state.c x->outer_mode = *outer_mode; x 2507 net/xfrm/xfrm_state.c err = xfrm_init_replay(x); x 2518 net/xfrm/xfrm_state.c int xfrm_init_state(struct xfrm_state *x) x 2522 net/xfrm/xfrm_state.c err = __xfrm_init_state(x, true, false); x 2524 net/xfrm/xfrm_state.c x->km.state = XFRM_STATE_VALID; x 2587 net/xfrm/xfrm_state.c static void xfrm_audit_helper_sainfo(struct xfrm_state *x, x 2590 net/xfrm/xfrm_state.c struct xfrm_sec_ctx *ctx = x->security; x 2591 net/xfrm/xfrm_state.c u32 spi = ntohl(x->id.spi); x 2597 net/xfrm/xfrm_state.c switch (x->props.family) { x 2600 net/xfrm/xfrm_state.c &x->props.saddr.a4, &x->id.daddr.a4); x 2604 net/xfrm/xfrm_state.c x->props.saddr.a6, x->id.daddr.a6); x 2635 net/xfrm/xfrm_state.c void xfrm_audit_state_add(struct xfrm_state *x, int result, bool task_valid) x 2643 net/xfrm/xfrm_state.c xfrm_audit_helper_sainfo(x, audit_buf); x 2649 net/xfrm/xfrm_state.c void xfrm_audit_state_delete(struct xfrm_state *x, int result, bool task_valid) x 2657 net/xfrm/xfrm_state.c xfrm_audit_helper_sainfo(x, audit_buf); x 2663 net/xfrm/xfrm_state.c void xfrm_audit_state_replay_overflow(struct xfrm_state *x, x 2672 net/xfrm/xfrm_state.c xfrm_audit_helper_pktinfo(skb, x->props.family, audit_buf); x 2675 net/xfrm/xfrm_state.c spi = ntohl(x->id.spi); x 2681 net/xfrm/xfrm_state.c void xfrm_audit_state_replay(struct xfrm_state *x, x 2690 net/xfrm/xfrm_state.c xfrm_audit_helper_pktinfo(skb, x->props.family, audit_buf); x 2691 net/xfrm/xfrm_state.c spi = ntohl(x->id.spi); x 2727 net/xfrm/xfrm_state.c void xfrm_audit_state_icvfail(struct xfrm_state *x, x 2737 net/xfrm/xfrm_state.c xfrm_audit_helper_pktinfo(skb, x->props.family, audit_buf); x 315 net/xfrm/xfrm_user.c static int attach_crypt(struct xfrm_state *x, struct nlattr *rta) x 328 net/xfrm/xfrm_user.c x->props.ealgo = algo->desc.sadb_alg_id; x 335 net/xfrm/xfrm_user.c x->ealg = p; x 336 net/xfrm/xfrm_user.c x->geniv = algo->uinfo.encr.geniv; x 400 net/xfrm/xfrm_user.c static int attach_aead(struct xfrm_state *x, struct nlattr *rta) x 413 net/xfrm/xfrm_user.c x->props.ealgo = algo->desc.sadb_alg_id; x 420 net/xfrm/xfrm_user.c x->aead = p; x 421 net/xfrm/xfrm_user.c x->geniv = algo->uinfo.aead.geniv; x 494 net/xfrm/xfrm_user.c static void copy_from_user_state(struct xfrm_state *x, struct xfrm_usersa_info *p) x 496 net/xfrm/xfrm_user.c memcpy(&x->id, &p->id, sizeof(x->id)); x 497 net/xfrm/xfrm_user.c memcpy(&x->sel, &p->sel, sizeof(x->sel)); x 498 net/xfrm/xfrm_user.c memcpy(&x->lft, &p->lft, sizeof(x->lft)); x 499 net/xfrm/xfrm_user.c x->props.mode = p->mode; x 500 net/xfrm/xfrm_user.c x->props.replay_window = min_t(unsigned int, p->replay_window, x 501 net/xfrm/xfrm_user.c sizeof(x->replay.bitmap) * 8); x 502 net/xfrm/xfrm_user.c x->props.reqid = p->reqid; x 503 net/xfrm/xfrm_user.c x->props.family = p->family; x 504 net/xfrm/xfrm_user.c memcpy(&x->props.saddr, &p->saddr, sizeof(x->props.saddr)); x 505 net/xfrm/xfrm_user.c x->props.flags = p->flags; x 507 net/xfrm/xfrm_user.c if (!x->sel.family && !(p->flags & XFRM_STATE_AF_UNSPEC)) x 508 net/xfrm/xfrm_user.c x->sel.family = p->family; x 516 net/xfrm/xfrm_user.c static void xfrm_update_ae_params(struct xfrm_state *x, struct nlattr **attrs, x 528 net/xfrm/xfrm_user.c memcpy(x->replay_esn, replay_esn, x 530 net/xfrm/xfrm_user.c memcpy(x->preplay_esn, replay_esn, x 537 net/xfrm/xfrm_user.c memcpy(&x->replay, replay, sizeof(*replay)); x 538 net/xfrm/xfrm_user.c memcpy(&x->preplay, replay, sizeof(*replay)); x 544 net/xfrm/xfrm_user.c x->curlft.bytes = ltime->bytes; x 545 net/xfrm/xfrm_user.c x->curlft.packets = ltime->packets; x 546 net/xfrm/xfrm_user.c x->curlft.add_time = ltime->add_time; x 547 net/xfrm/xfrm_user.c x->curlft.use_time = ltime->use_time; x 551 net/xfrm/xfrm_user.c x->replay_maxage = nla_get_u32(et); x 554 net/xfrm/xfrm_user.c x->replay_maxdiff = nla_get_u32(rt); x 575 net/xfrm/xfrm_user.c struct xfrm_state *x = xfrm_state_alloc(net); x 578 net/xfrm/xfrm_user.c if (!x) x 581 net/xfrm/xfrm_user.c copy_from_user_state(x, p); x 584 net/xfrm/xfrm_user.c x->props.extra_flags = nla_get_u32(attrs[XFRMA_SA_EXTRA_FLAGS]); x 586 net/xfrm/xfrm_user.c if ((err = attach_aead(x, attrs[XFRMA_ALG_AEAD]))) x 588 net/xfrm/xfrm_user.c if ((err = attach_auth_trunc(&x->aalg, &x->props.aalgo, x 591 net/xfrm/xfrm_user.c if (!x->props.aalgo) { x 592 net/xfrm/xfrm_user.c if ((err = attach_auth(&x->aalg, &x->props.aalgo, x 596 net/xfrm/xfrm_user.c if ((err = attach_crypt(x, attrs[XFRMA_ALG_CRYPT]))) x 598 net/xfrm/xfrm_user.c if ((err = attach_one_algo(&x->calg, &x->props.calgo, x 604 net/xfrm/xfrm_user.c x->encap = kmemdup(nla_data(attrs[XFRMA_ENCAP]), x 605 net/xfrm/xfrm_user.c sizeof(*x->encap), GFP_KERNEL); x 606 net/xfrm/xfrm_user.c if (x->encap == NULL) x 611 net/xfrm/xfrm_user.c x->tfcpad = nla_get_u32(attrs[XFRMA_TFCPAD]); x 614 net/xfrm/xfrm_user.c x->coaddr = kmemdup(nla_data(attrs[XFRMA_COADDR]), x 615 net/xfrm/xfrm_user.c sizeof(*x->coaddr), GFP_KERNEL); x 616 net/xfrm/xfrm_user.c if (x->coaddr == NULL) x 620 net/xfrm/xfrm_user.c xfrm_mark_get(attrs, &x->mark); x 622 net/xfrm/xfrm_user.c xfrm_smark_init(attrs, &x->props.smark); x 625 net/xfrm/xfrm_user.c x->if_id = nla_get_u32(attrs[XFRMA_IF_ID]); x 627 net/xfrm/xfrm_user.c err = __xfrm_init_state(x, false, attrs[XFRMA_OFFLOAD_DEV]); x 632 net/xfrm/xfrm_user.c err = security_xfrm_state_alloc(x, x 638 net/xfrm/xfrm_user.c if ((err = xfrm_alloc_replay_state_esn(&x->replay_esn, &x->preplay_esn, x 642 net/xfrm/xfrm_user.c x->km.seq = p->seq; x 643 net/xfrm/xfrm_user.c x->replay_maxdiff = net->xfrm.sysctl_aevent_rseqth; x 645 net/xfrm/xfrm_user.c x->replay_maxage = (net->xfrm.sysctl_aevent_etime*HZ)/XFRM_AE_ETH_M; x 647 net/xfrm/xfrm_user.c if ((err = xfrm_init_replay(x))) x 651 net/xfrm/xfrm_user.c xfrm_update_ae_params(x, attrs, 0); x 655 net/xfrm/xfrm_user.c err = xfrm_dev_state_add(net, x, x 661 net/xfrm/xfrm_user.c return x; x 664 net/xfrm/xfrm_user.c x->km.state = XFRM_STATE_DEAD; x 665 net/xfrm/xfrm_user.c xfrm_state_put(x); x 676 net/xfrm/xfrm_user.c struct xfrm_state *x; x 684 net/xfrm/xfrm_user.c x = xfrm_state_construct(net, p, attrs, &err); x 685 net/xfrm/xfrm_user.c if (!x) x 688 net/xfrm/xfrm_user.c xfrm_state_hold(x); x 690 net/xfrm/xfrm_user.c err = xfrm_state_add(x); x 692 net/xfrm/xfrm_user.c err = xfrm_state_update(x); x 694 net/xfrm/xfrm_user.c xfrm_audit_state_add(x, err ? 0 : 1, true); x 697 net/xfrm/xfrm_user.c x->km.state = XFRM_STATE_DEAD; x 698 net/xfrm/xfrm_user.c xfrm_dev_state_delete(x); x 699 net/xfrm/xfrm_user.c __xfrm_state_put(x); x 703 net/xfrm/xfrm_user.c if (x->km.state == XFRM_STATE_VOID) x 704 net/xfrm/xfrm_user.c x->km.state = XFRM_STATE_VALID; x 710 net/xfrm/xfrm_user.c km_state_notify(x, &c); x 712 net/xfrm/xfrm_user.c xfrm_state_put(x); x 721 net/xfrm/xfrm_user.c struct xfrm_state *x = NULL; x 728 net/xfrm/xfrm_user.c x = xfrm_state_lookup(net, mark, &p->daddr, p->spi, p->proto, p->family); x 739 net/xfrm/xfrm_user.c x = xfrm_state_lookup_byaddr(net, mark, x 745 net/xfrm/xfrm_user.c if (!x && errp) x 747 net/xfrm/xfrm_user.c return x; x 754 net/xfrm/xfrm_user.c struct xfrm_state *x; x 759 net/xfrm/xfrm_user.c x = xfrm_user_state_lookup(net, p, attrs, &err); x 760 net/xfrm/xfrm_user.c if (x == NULL) x 763 net/xfrm/xfrm_user.c if ((err = security_xfrm_state_delete(x)) != 0) x 766 net/xfrm/xfrm_user.c if (xfrm_state_kern(x)) { x 771 net/xfrm/xfrm_user.c err = xfrm_state_delete(x); x 779 net/xfrm/xfrm_user.c km_state_notify(x, &c); x 782 net/xfrm/xfrm_user.c xfrm_audit_state_delete(x, err ? 0 : 1, true); x 783 net/xfrm/xfrm_user.c xfrm_state_put(x); x 787 net/xfrm/xfrm_user.c static void copy_to_user_state(struct xfrm_state *x, struct xfrm_usersa_info *p) x 790 net/xfrm/xfrm_user.c memcpy(&p->id, &x->id, sizeof(p->id)); x 791 net/xfrm/xfrm_user.c memcpy(&p->sel, &x->sel, sizeof(p->sel)); x 792 net/xfrm/xfrm_user.c memcpy(&p->lft, &x->lft, sizeof(p->lft)); x 793 net/xfrm/xfrm_user.c memcpy(&p->curlft, &x->curlft, sizeof(p->curlft)); x 794 net/xfrm/xfrm_user.c put_unaligned(x->stats.replay_window, &p->stats.replay_window); x 795 net/xfrm/xfrm_user.c put_unaligned(x->stats.replay, &p->stats.replay); x 796 net/xfrm/xfrm_user.c put_unaligned(x->stats.integrity_failed, &p->stats.integrity_failed); x 797 net/xfrm/xfrm_user.c memcpy(&p->saddr, &x->props.saddr, sizeof(p->saddr)); x 798 net/xfrm/xfrm_user.c p->mode = x->props.mode; x 799 net/xfrm/xfrm_user.c p->replay_window = x->props.replay_window; x 800 net/xfrm/xfrm_user.c p->reqid = x->props.reqid; x 801 net/xfrm/xfrm_user.c p->family = x->props.family; x 802 net/xfrm/xfrm_user.c p->flags = x->props.flags; x 803 net/xfrm/xfrm_user.c p->seq = x->km.seq; x 882 net/xfrm/xfrm_user.c static int copy_to_user_state_extra(struct xfrm_state *x, x 888 net/xfrm/xfrm_user.c copy_to_user_state(x, p); x 890 net/xfrm/xfrm_user.c if (x->props.extra_flags) { x 892 net/xfrm/xfrm_user.c x->props.extra_flags); x 897 net/xfrm/xfrm_user.c if (x->coaddr) { x 898 net/xfrm/xfrm_user.c ret = nla_put(skb, XFRMA_COADDR, sizeof(*x->coaddr), x->coaddr); x 902 net/xfrm/xfrm_user.c if (x->lastused) { x 903 net/xfrm/xfrm_user.c ret = nla_put_u64_64bit(skb, XFRMA_LASTUSED, x->lastused, x 908 net/xfrm/xfrm_user.c if (x->aead) { x 909 net/xfrm/xfrm_user.c ret = nla_put(skb, XFRMA_ALG_AEAD, aead_len(x->aead), x->aead); x 913 net/xfrm/xfrm_user.c if (x->aalg) { x 914 net/xfrm/xfrm_user.c ret = copy_to_user_auth(x->aalg, skb); x 917 net/xfrm/xfrm_user.c xfrm_alg_auth_len(x->aalg), x->aalg); x 921 net/xfrm/xfrm_user.c if (x->ealg) { x 922 net/xfrm/xfrm_user.c ret = nla_put(skb, XFRMA_ALG_CRYPT, xfrm_alg_len(x->ealg), x->ealg); x 926 net/xfrm/xfrm_user.c if (x->calg) { x 927 net/xfrm/xfrm_user.c ret = nla_put(skb, XFRMA_ALG_COMP, sizeof(*(x->calg)), x->calg); x 931 net/xfrm/xfrm_user.c if (x->encap) { x 932 net/xfrm/xfrm_user.c ret = nla_put(skb, XFRMA_ENCAP, sizeof(*x->encap), x->encap); x 936 net/xfrm/xfrm_user.c if (x->tfcpad) { x 937 net/xfrm/xfrm_user.c ret = nla_put_u32(skb, XFRMA_TFCPAD, x->tfcpad); x 941 net/xfrm/xfrm_user.c ret = xfrm_mark_put(skb, &x->mark); x 945 net/xfrm/xfrm_user.c ret = xfrm_smark_put(skb, &x->props.smark); x 949 net/xfrm/xfrm_user.c if (x->replay_esn) x 951 net/xfrm/xfrm_user.c xfrm_replay_state_esn_len(x->replay_esn), x 952 net/xfrm/xfrm_user.c x->replay_esn); x 954 net/xfrm/xfrm_user.c ret = nla_put(skb, XFRMA_REPLAY_VAL, sizeof(x->replay), x 955 net/xfrm/xfrm_user.c &x->replay); x 958 net/xfrm/xfrm_user.c if(x->xso.dev) x 959 net/xfrm/xfrm_user.c ret = copy_user_offload(&x->xso, skb); x 962 net/xfrm/xfrm_user.c if (x->if_id) { x 963 net/xfrm/xfrm_user.c ret = nla_put_u32(skb, XFRMA_IF_ID, x->if_id); x 967 net/xfrm/xfrm_user.c if (x->security) x 968 net/xfrm/xfrm_user.c ret = copy_sec_ctx(x->security, skb); x 973 net/xfrm/xfrm_user.c static int dump_one_state(struct xfrm_state *x, int count, void *ptr) x 989 net/xfrm/xfrm_user.c err = copy_to_user_state_extra(x, p, skb); x 1055 net/xfrm/xfrm_user.c struct xfrm_state *x, u32 seq) x 1070 net/xfrm/xfrm_user.c err = dump_one_state(x, 0, &info); x 1286 net/xfrm/xfrm_user.c struct xfrm_state *x; x 1290 net/xfrm/xfrm_user.c x = xfrm_user_state_lookup(net, p, attrs, &err); x 1291 net/xfrm/xfrm_user.c if (x == NULL) x 1294 net/xfrm/xfrm_user.c resp_skb = xfrm_state_netlink(skb, x, nlh->nlmsg_seq); x 1300 net/xfrm/xfrm_user.c xfrm_state_put(x); x 1309 net/xfrm/xfrm_user.c struct xfrm_state *x; x 1327 net/xfrm/xfrm_user.c x = NULL; x 1335 net/xfrm/xfrm_user.c x = xfrm_find_acq_byseq(net, mark, p->info.seq); x 1336 net/xfrm/xfrm_user.c if (x && !xfrm_addr_equal(&x->id.daddr, daddr, family)) { x 1337 net/xfrm/xfrm_user.c xfrm_state_put(x); x 1338 net/xfrm/xfrm_user.c x = NULL; x 1342 net/xfrm/xfrm_user.c if (!x) x 1343 net/xfrm/xfrm_user.c x = xfrm_find_acq(net, &m, p->info.mode, p->info.reqid, x 1348 net/xfrm/xfrm_user.c if (x == NULL) x 1351 net/xfrm/xfrm_user.c err = xfrm_alloc_spi(x, p->min, p->max); x 1355 net/xfrm/xfrm_user.c resp_skb = xfrm_state_netlink(skb, x, nlh->nlmsg_seq); x 1364 net/xfrm/xfrm_user.c xfrm_state_put(x); x 1719 net/xfrm/xfrm_user.c static inline int copy_to_user_state_sec_ctx(struct xfrm_state *x, struct sk_buff *skb) x 1721 net/xfrm/xfrm_user.c if (x->security) { x 1722 net/xfrm/xfrm_user.c return copy_sec_ctx(x->security, skb); x 1960 net/xfrm/xfrm_user.c static inline unsigned int xfrm_aevent_msgsize(struct xfrm_state *x) x 1962 net/xfrm/xfrm_user.c unsigned int replay_size = x->replay_esn ? x 1963 net/xfrm/xfrm_user.c xfrm_replay_state_esn_len(x->replay_esn) : x 1974 net/xfrm/xfrm_user.c static int build_aevent(struct sk_buff *skb, struct xfrm_state *x, const struct km_event *c) x 1986 net/xfrm/xfrm_user.c memcpy(&id->sa_id.daddr, &x->id.daddr, sizeof(x->id.daddr)); x 1987 net/xfrm/xfrm_user.c id->sa_id.spi = x->id.spi; x 1988 net/xfrm/xfrm_user.c id->sa_id.family = x->props.family; x 1989 net/xfrm/xfrm_user.c id->sa_id.proto = x->id.proto; x 1990 net/xfrm/xfrm_user.c memcpy(&id->saddr, &x->props.saddr, sizeof(x->props.saddr)); x 1991 net/xfrm/xfrm_user.c id->reqid = x->props.reqid; x 1994 net/xfrm/xfrm_user.c if (x->replay_esn) { x 1996 net/xfrm/xfrm_user.c xfrm_replay_state_esn_len(x->replay_esn), x 1997 net/xfrm/xfrm_user.c x->replay_esn); x 1999 net/xfrm/xfrm_user.c err = nla_put(skb, XFRMA_REPLAY_VAL, sizeof(x->replay), x 2000 net/xfrm/xfrm_user.c &x->replay); x 2004 net/xfrm/xfrm_user.c err = nla_put_64bit(skb, XFRMA_LTIME_VAL, sizeof(x->curlft), &x->curlft, x 2010 net/xfrm/xfrm_user.c err = nla_put_u32(skb, XFRMA_REPLAY_THRESH, x->replay_maxdiff); x 2016 net/xfrm/xfrm_user.c x->replay_maxage * 10 / HZ); x 2020 net/xfrm/xfrm_user.c err = xfrm_mark_put(skb, &x->mark); x 2024 net/xfrm/xfrm_user.c err = xfrm_if_id_put(skb, x->if_id); x 2040 net/xfrm/xfrm_user.c struct xfrm_state *x; x 2051 net/xfrm/xfrm_user.c x = xfrm_state_lookup(net, mark, &id->daddr, id->spi, id->proto, id->family); x 2052 net/xfrm/xfrm_user.c if (x == NULL) x 2055 net/xfrm/xfrm_user.c r_skb = nlmsg_new(xfrm_aevent_msgsize(x), GFP_ATOMIC); x 2057 net/xfrm/xfrm_user.c xfrm_state_put(x); x 2066 net/xfrm/xfrm_user.c spin_lock_bh(&x->lock); x 2071 net/xfrm/xfrm_user.c err = build_aevent(r_skb, x, &c); x 2075 net/xfrm/xfrm_user.c spin_unlock_bh(&x->lock); x 2076 net/xfrm/xfrm_user.c xfrm_state_put(x); x 2084 net/xfrm/xfrm_user.c struct xfrm_state *x; x 2105 net/xfrm/xfrm_user.c x = xfrm_state_lookup(net, mark, &p->sa_id.daddr, p->sa_id.spi, p->sa_id.proto, p->sa_id.family); x 2106 net/xfrm/xfrm_user.c if (x == NULL) x 2109 net/xfrm/xfrm_user.c if (x->km.state != XFRM_STATE_VALID) x 2112 net/xfrm/xfrm_user.c err = xfrm_replay_verify_len(x->replay_esn, re); x 2116 net/xfrm/xfrm_user.c spin_lock_bh(&x->lock); x 2117 net/xfrm/xfrm_user.c xfrm_update_ae_params(x, attrs, 1); x 2118 net/xfrm/xfrm_user.c spin_unlock_bh(&x->lock); x 2124 net/xfrm/xfrm_user.c km_state_notify(x, &c); x 2127 net/xfrm/xfrm_user.c xfrm_state_put(x); x 2227 net/xfrm/xfrm_user.c struct xfrm_state *x; x 2234 net/xfrm/xfrm_user.c x = xfrm_state_lookup(net, mark, &p->id.daddr, p->id.spi, p->id.proto, p->family); x 2237 net/xfrm/xfrm_user.c if (x == NULL) x 2240 net/xfrm/xfrm_user.c spin_lock_bh(&x->lock); x 2242 net/xfrm/xfrm_user.c if (x->km.state != XFRM_STATE_VALID) x 2244 net/xfrm/xfrm_user.c km_state_expired(x, ue->hard, nlh->nlmsg_pid); x 2247 net/xfrm/xfrm_user.c __xfrm_state_delete(x); x 2248 net/xfrm/xfrm_user.c xfrm_audit_state_delete(x, 1, true); x 2252 net/xfrm/xfrm_user.c spin_unlock_bh(&x->lock); x 2253 net/xfrm/xfrm_user.c xfrm_state_put(x); x 2268 net/xfrm/xfrm_user.c struct xfrm_state *x = xfrm_state_alloc(net); x 2271 net/xfrm/xfrm_user.c if (!x) x 2288 net/xfrm/xfrm_user.c memcpy(&x->id, &ua->id, sizeof(ua->id)); x 2289 net/xfrm/xfrm_user.c memcpy(&x->props.saddr, &ua->saddr, sizeof(ua->saddr)); x 2290 net/xfrm/xfrm_user.c memcpy(&x->sel, &ua->sel, sizeof(ua->sel)); x 2291 net/xfrm/xfrm_user.c xp->mark.m = x->mark.m = mark.m; x 2292 net/xfrm/xfrm_user.c xp->mark.v = x->mark.v = mark.v; x 2297 net/xfrm/xfrm_user.c memcpy(&x->id, &t->id, sizeof(x->id)); x 2298 net/xfrm/xfrm_user.c x->props.mode = t->mode; x 2299 net/xfrm/xfrm_user.c x->props.reqid = t->reqid; x 2300 net/xfrm/xfrm_user.c x->props.family = ut->family; x 2304 net/xfrm/xfrm_user.c err = km_query(x, t, xp); x 2308 net/xfrm/xfrm_user.c xfrm_state_free(x); x 2314 net/xfrm/xfrm_user.c xfrm_state_free(x); x 2698 net/xfrm/xfrm_user.c static int build_expire(struct sk_buff *skb, struct xfrm_state *x, const struct km_event *c) x 2709 net/xfrm/xfrm_user.c copy_to_user_state(x, &ue->state); x 2714 net/xfrm/xfrm_user.c err = xfrm_mark_put(skb, &x->mark); x 2718 net/xfrm/xfrm_user.c err = xfrm_if_id_put(skb, x->if_id); x 2726 net/xfrm/xfrm_user.c static int xfrm_exp_state_notify(struct xfrm_state *x, const struct km_event *c) x 2728 net/xfrm/xfrm_user.c struct net *net = xs_net(x); x 2735 net/xfrm/xfrm_user.c if (build_expire(skb, x, c) < 0) { x 2743 net/xfrm/xfrm_user.c static int xfrm_aevent_state_notify(struct xfrm_state *x, const struct km_event *c) x 2745 net/xfrm/xfrm_user.c struct net *net = xs_net(x); x 2749 net/xfrm/xfrm_user.c skb = nlmsg_new(xfrm_aevent_msgsize(x), GFP_ATOMIC); x 2753 net/xfrm/xfrm_user.c err = build_aevent(skb, x, c); x 2785 net/xfrm/xfrm_user.c static inline unsigned int xfrm_sa_len(struct xfrm_state *x) x 2788 net/xfrm/xfrm_user.c if (x->aead) x 2789 net/xfrm/xfrm_user.c l += nla_total_size(aead_len(x->aead)); x 2790 net/xfrm/xfrm_user.c if (x->aalg) { x 2792 net/xfrm/xfrm_user.c (x->aalg->alg_key_len + 7) / 8); x 2793 net/xfrm/xfrm_user.c l += nla_total_size(xfrm_alg_auth_len(x->aalg)); x 2795 net/xfrm/xfrm_user.c if (x->ealg) x 2796 net/xfrm/xfrm_user.c l += nla_total_size(xfrm_alg_len(x->ealg)); x 2797 net/xfrm/xfrm_user.c if (x->calg) x 2798 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(*x->calg)); x 2799 net/xfrm/xfrm_user.c if (x->encap) x 2800 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(*x->encap)); x 2801 net/xfrm/xfrm_user.c if (x->tfcpad) x 2802 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(x->tfcpad)); x 2803 net/xfrm/xfrm_user.c if (x->replay_esn) x 2804 net/xfrm/xfrm_user.c l += nla_total_size(xfrm_replay_state_esn_len(x->replay_esn)); x 2807 net/xfrm/xfrm_user.c if (x->security) x 2809 net/xfrm/xfrm_user.c x->security->ctx_len); x 2810 net/xfrm/xfrm_user.c if (x->coaddr) x 2811 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(*x->coaddr)); x 2812 net/xfrm/xfrm_user.c if (x->props.extra_flags) x 2813 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(x->props.extra_flags)); x 2814 net/xfrm/xfrm_user.c if (x->xso.dev) x 2815 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(x->xso)); x 2816 net/xfrm/xfrm_user.c if (x->props.smark.v | x->props.smark.m) { x 2817 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(x->props.smark.v)); x 2818 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(x->props.smark.m)); x 2820 net/xfrm/xfrm_user.c if (x->if_id) x 2821 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(x->if_id)); x 2829 net/xfrm/xfrm_user.c static int xfrm_notify_sa(struct xfrm_state *x, const struct km_event *c) x 2831 net/xfrm/xfrm_user.c struct net *net = xs_net(x); x 2836 net/xfrm/xfrm_user.c unsigned int len = xfrm_sa_len(x); x 2863 net/xfrm/xfrm_user.c memcpy(&id->daddr, &x->id.daddr, sizeof(id->daddr)); x 2864 net/xfrm/xfrm_user.c id->spi = x->id.spi; x 2865 net/xfrm/xfrm_user.c id->family = x->props.family; x 2866 net/xfrm/xfrm_user.c id->proto = x->id.proto; x 2875 net/xfrm/xfrm_user.c err = copy_to_user_state_extra(x, p, skb); x 2888 net/xfrm/xfrm_user.c static int xfrm_send_state_notify(struct xfrm_state *x, const struct km_event *c) x 2893 net/xfrm/xfrm_user.c return xfrm_exp_state_notify(x, c); x 2895 net/xfrm/xfrm_user.c return xfrm_aevent_state_notify(x, c); x 2899 net/xfrm/xfrm_user.c return xfrm_notify_sa(x, c); x 2912 net/xfrm/xfrm_user.c static inline unsigned int xfrm_acquire_msgsize(struct xfrm_state *x, x 2918 net/xfrm/xfrm_user.c + nla_total_size(xfrm_user_sec_ctx_size(x->security)) x 2922 net/xfrm/xfrm_user.c static int build_acquire(struct sk_buff *skb, struct xfrm_state *x, x 2935 net/xfrm/xfrm_user.c memcpy(&ua->id, &x->id, sizeof(ua->id)); x 2936 net/xfrm/xfrm_user.c memcpy(&ua->saddr, &x->props.saddr, sizeof(ua->saddr)); x 2937 net/xfrm/xfrm_user.c memcpy(&ua->sel, &x->sel, sizeof(ua->sel)); x 2942 net/xfrm/xfrm_user.c ua->seq = x->km.seq = seq; x 2946 net/xfrm/xfrm_user.c err = copy_to_user_state_sec_ctx(x, skb); x 2962 net/xfrm/xfrm_user.c static int xfrm_send_acquire(struct xfrm_state *x, struct xfrm_tmpl *xt, x 2965 net/xfrm/xfrm_user.c struct net *net = xs_net(x); x 2969 net/xfrm/xfrm_user.c skb = nlmsg_new(xfrm_acquire_msgsize(x, xp), GFP_ATOMIC); x 2973 net/xfrm/xfrm_user.c err = build_acquire(skb, x, xt, xp); x 3266 net/xfrm/xfrm_user.c static int build_mapping(struct sk_buff *skb, struct xfrm_state *x, x 3278 net/xfrm/xfrm_user.c memcpy(&um->id.daddr, &x->id.daddr, sizeof(um->id.daddr)); x 3279 net/xfrm/xfrm_user.c um->id.spi = x->id.spi; x 3280 net/xfrm/xfrm_user.c um->id.family = x->props.family; x 3281 net/xfrm/xfrm_user.c um->id.proto = x->id.proto; x 3283 net/xfrm/xfrm_user.c memcpy(&um->old_saddr, &x->props.saddr, sizeof(um->old_saddr)); x 3285 net/xfrm/xfrm_user.c um->old_sport = x->encap->encap_sport; x 3286 net/xfrm/xfrm_user.c um->reqid = x->props.reqid; x 3292 net/xfrm/xfrm_user.c static int xfrm_send_mapping(struct xfrm_state *x, xfrm_address_t *ipaddr, x 3295 net/xfrm/xfrm_user.c struct net *net = xs_net(x); x 3299 net/xfrm/xfrm_user.c if (x->id.proto != IPPROTO_ESP) x 3302 net/xfrm/xfrm_user.c if (!x->encap) x 3309 net/xfrm/xfrm_user.c err = build_mapping(skb, x, ipaddr, sport); x 28 samples/auxdisplay/cfag12864b-example.c #define CFAG12864B_ADDRESS(x, y) ((y) * CFAG12864B_WIDTH / \ x 29 samples/auxdisplay/cfag12864b-example.c CFAG12864B_BPB + (x) / CFAG12864B_BPB) x 34 samples/auxdisplay/cfag12864b-example.c #define CFAG12864B_CHECK(x, y) ((x) < CFAG12864B_WIDTH && \ x 37 samples/auxdisplay/cfag12864b-example.c #define CFAG12864B_CHECK(x, y) (1) x 79 samples/auxdisplay/cfag12864b-example.c static void cfag12864b_set(unsigned char x, unsigned char y) x 81 samples/auxdisplay/cfag12864b-example.c if (CFAG12864B_CHECK(x, y)) x 82 samples/auxdisplay/cfag12864b-example.c cfag12864b_buffer[CFAG12864B_ADDRESS(x, y)] |= x 83 samples/auxdisplay/cfag12864b-example.c CFAG12864B_BIT(x % CFAG12864B_BPB); x 89 samples/auxdisplay/cfag12864b-example.c static void cfag12864b_unset(unsigned char x, unsigned char y) x 91 samples/auxdisplay/cfag12864b-example.c if (CFAG12864B_CHECK(x, y)) x 92 samples/auxdisplay/cfag12864b-example.c cfag12864b_buffer[CFAG12864B_ADDRESS(x, y)] &= x 93 samples/auxdisplay/cfag12864b-example.c ~CFAG12864B_BIT(x % CFAG12864B_BPB); x 102 samples/auxdisplay/cfag12864b-example.c static unsigned char cfag12864b_isset(unsigned char x, unsigned char y) x 104 samples/auxdisplay/cfag12864b-example.c if (CFAG12864B_CHECK(x, y)) x 105 samples/auxdisplay/cfag12864b-example.c if (cfag12864b_buffer[CFAG12864B_ADDRESS(x, y)] & x 106 samples/auxdisplay/cfag12864b-example.c CFAG12864B_BIT(x % CFAG12864B_BPB)) x 115 samples/auxdisplay/cfag12864b-example.c static void cfag12864b_not(unsigned char x, unsigned char y) x 117 samples/auxdisplay/cfag12864b-example.c if (cfag12864b_isset(x, y)) x 118 samples/auxdisplay/cfag12864b-example.c cfag12864b_unset(x, y); x 120 samples/auxdisplay/cfag12864b-example.c cfag12864b_set(x, y); x 14 samples/bpf/asm_goto_workaround.h #define asm_volatile_goto(x...) asm volatile("invalid use of asm_volatile_goto") x 27 samples/bpf/asm_goto_workaround.h #define volatile(x...) volatile("") x 34 samples/bpf/cookie_uid_helper_example.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x))) x 35 samples/kobject/kset-example.c #define to_foo_obj(x) container_of(x, struct foo_obj, kobj) x 43 samples/kobject/kset-example.c #define to_foo_attr(x) container_of(x, struct foo_attribute, attr) x 40 samples/mic/mpssd/mpssd.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 42 samples/mic/mpssd/mpssd.c #define min_t(type, x, y) ({ \ x 43 samples/mic/mpssd/mpssd.c type __min1 = (x); \ x 57 samples/mic/mpssd/mpssd.c #define READ_ONCE(x) (*(volatile typeof(x) *)&(x)) x 1595 samples/mic/mpssd/mpssd.c change_virtblk_backend(int x, siginfo_t *siginfo, void *p) x 76 samples/seccomp/bpf-helper.h #define JEQ(x, jt) JEQ32(x, EXPAND(jt)) x 77 samples/seccomp/bpf-helper.h #define JNE(x, jt) JNE32(x, EXPAND(jt)) x 78 samples/seccomp/bpf-helper.h #define JGT(x, jt) JGT32(x, EXPAND(jt)) x 79 samples/seccomp/bpf-helper.h #define JLT(x, jt) JLT32(x, EXPAND(jt)) x 80 samples/seccomp/bpf-helper.h #define JGE(x, jt) JGE32(x, EXPAND(jt)) x 81 samples/seccomp/bpf-helper.h #define JLE(x, jt) JLE32(x, EXPAND(jt)) x 82 samples/seccomp/bpf-helper.h #define JA(x, jt) JA32(x, EXPAND(jt)) x 103 samples/seccomp/bpf-helper.h #define JEQ(x, jt) \ x 104 samples/seccomp/bpf-helper.h JEQ64(((union arg64){.u64 = (x)}).lo32, \ x 105 samples/seccomp/bpf-helper.h ((union arg64){.u64 = (x)}).hi32, \ x 107 samples/seccomp/bpf-helper.h #define JGT(x, jt) \ x 108 samples/seccomp/bpf-helper.h JGT64(((union arg64){.u64 = (x)}).lo32, \ x 109 samples/seccomp/bpf-helper.h ((union arg64){.u64 = (x)}).hi32, \ x 111 samples/seccomp/bpf-helper.h #define JGE(x, jt) \ x 112 samples/seccomp/bpf-helper.h JGE64(((union arg64){.u64 = (x)}).lo32, \ x 113 samples/seccomp/bpf-helper.h ((union arg64){.u64 = (x)}).hi32, \ x 115 samples/seccomp/bpf-helper.h #define JNE(x, jt) \ x 116 samples/seccomp/bpf-helper.h JNE64(((union arg64){.u64 = (x)}).lo32, \ x 117 samples/seccomp/bpf-helper.h ((union arg64){.u64 = (x)}).hi32, \ x 119 samples/seccomp/bpf-helper.h #define JLT(x, jt) \ x 120 samples/seccomp/bpf-helper.h JLT64(((union arg64){.u64 = (x)}).lo32, \ x 121 samples/seccomp/bpf-helper.h ((union arg64){.u64 = (x)}).hi32, \ x 123 samples/seccomp/bpf-helper.h #define JLE(x, jt) \ x 124 samples/seccomp/bpf-helper.h JLE64(((union arg64){.u64 = (x)}).lo32, \ x 125 samples/seccomp/bpf-helper.h ((union arg64){.u64 = (x)}).hi32, \ x 128 samples/seccomp/bpf-helper.h #define JA(x, jt) \ x 129 samples/seccomp/bpf-helper.h JA64(((union arg64){.u64 = (x)}).lo32, \ x 130 samples/seccomp/bpf-helper.h ((union arg64){.u64 = (x)}).hi32, \ x 24 samples/seccomp/user-trap.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x))) x 18 samples/vfs/test-fsmount.c #define E(x) do { if ((x) == -1) { perror(#x); exit(1); } } while(0) x 1441 scripts/asn1_compiler.c struct element *ec, *x; x 1497 scripts/asn1_compiler.c x = tag ?: e; x 1498 scripts/asn1_compiler.c if (x->name) x 1499 scripts/asn1_compiler.c render_more(out, "\t\t// %s", x->name->content); x 26 scripts/dtc/dtc.c static int is_power_of_2(int x) x 28 scripts/dtc/dtc.c return (x > 0) && ((x & (x - 1)) == 0); x 59 scripts/dtc/dtc.h #define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) x 17 scripts/dtc/fdtdump.c #define ALIGN(x, a) (((x) + ((a) - 1)) & ~((a) - 1)) x 20 scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h #define GIC_CPU_MASK_RAW(x) ((x) << 8) x 33 scripts/dtc/include-prefixes/dt-bindings/mailbox/tegra186-hsp.h #define TEGRA_HSP_SM_RX(x) (TEGRA_HSP_SM_FLAG_RX | ((x) & TEGRA_HSP_SM_MASK)) x 34 scripts/dtc/include-prefixes/dt-bindings/mailbox/tegra186-hsp.h #define TEGRA_HSP_SM_TX(x) (TEGRA_HSP_SM_FLAG_TX | ((x) & TEGRA_HSP_SM_MASK)) x 6 scripts/dtc/include-prefixes/dt-bindings/phy/phy-ocelot-serdes.h #define SERDES1G(x) (x) x 8 scripts/dtc/include-prefixes/dt-bindings/phy/phy-ocelot-serdes.h #define SERDES6G(x) (SERDES1G_MAX + 1 + (x)) x 18 scripts/dtc/include-prefixes/dt-bindings/pinctrl/at91.h #define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 8) x 21 scripts/dtc/include-prefixes/dt-bindings/pinctrl/at91.h #define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17) x 10 scripts/dtc/include-prefixes/dt-bindings/pinctrl/mt65xx.h #define MTK_PIN_NO(x) ((x) << 8) x 11 scripts/dtc/include-prefixes/dt-bindings/pinctrl/mt65xx.h #define MTK_GET_PIN_NO(x) ((x) >> 8) x 12 scripts/dtc/include-prefixes/dt-bindings/pinctrl/mt65xx.h #define MTK_GET_PIN_FUNC(x) ((x) & 0xf) x 10 scripts/dtc/include-prefixes/dt-bindings/reset/tegra124-car.h #define TEGRA124_RESET(x) (6 * 32 + (x)) x 10 scripts/dtc/include-prefixes/dt-bindings/reset/tegra210-car.h #define TEGRA210_RESET(x) (7 * 32 + (x)) x 36 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) x 40 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) x 41 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) x 44 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) x 50 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) x 52 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) x 54 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) x 56 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) x 59 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) x 61 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) x 62 scripts/dtc/include-prefixes/dt-bindings/sound/fsl-imx-audmux.h #define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) x 29 scripts/dtc/libfdt/libfdt_env.h #define EXTRACT_BYTE(x, n) ((unsigned long long)((uint8_t *)&x)[n]) x 30 scripts/dtc/libfdt/libfdt_env.h #define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1)) x 31 scripts/dtc/libfdt/libfdt_env.h #define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \ x 32 scripts/dtc/libfdt/libfdt_env.h (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3)) x 33 scripts/dtc/libfdt/libfdt_env.h #define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \ x 34 scripts/dtc/libfdt/libfdt_env.h (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \ x 35 scripts/dtc/libfdt/libfdt_env.h (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \ x 36 scripts/dtc/libfdt/libfdt_env.h (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7)) x 38 scripts/dtc/libfdt/libfdt_env.h static inline uint16_t fdt16_to_cpu(fdt16_t x) x 40 scripts/dtc/libfdt/libfdt_env.h return (FDT_FORCE uint16_t)CPU_TO_FDT16(x); x 42 scripts/dtc/libfdt/libfdt_env.h static inline fdt16_t cpu_to_fdt16(uint16_t x) x 44 scripts/dtc/libfdt/libfdt_env.h return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x); x 47 scripts/dtc/libfdt/libfdt_env.h static inline uint32_t fdt32_to_cpu(fdt32_t x) x 49 scripts/dtc/libfdt/libfdt_env.h return (FDT_FORCE uint32_t)CPU_TO_FDT32(x); x 51 scripts/dtc/libfdt/libfdt_env.h static inline fdt32_t cpu_to_fdt32(uint32_t x) x 53 scripts/dtc/libfdt/libfdt_env.h return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x); x 56 scripts/dtc/libfdt/libfdt_env.h static inline uint64_t fdt64_to_cpu(fdt64_t x) x 58 scripts/dtc/libfdt/libfdt_env.h return (FDT_FORCE uint64_t)CPU_TO_FDT64(x); x 60 scripts/dtc/libfdt/libfdt_env.h static inline fdt64_t cpu_to_fdt64(uint64_t x) x 62 scripts/dtc/libfdt/libfdt_env.h return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x); x 10 scripts/dtc/libfdt/libfdt_internal.h #define FDT_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) x 11 scripts/dtc/libfdt/libfdt_internal.h #define FDT_TAGALIGN(x) (FDT_ALIGN((x), FDT_TAGSIZE)) x 145 scripts/dtc/util.c char x[4]; x 149 scripts/dtc/util.c x[3] = '\0'; x 150 scripts/dtc/util.c strncpy(x, s + *i, 3); x 152 scripts/dtc/util.c val = strtol(x, &endx, 8); x 154 scripts/dtc/util.c assert(endx > x); x 156 scripts/dtc/util.c (*i) += endx - x; x 168 scripts/dtc/util.c char x[3]; x 172 scripts/dtc/util.c x[2] = '\0'; x 173 scripts/dtc/util.c strncpy(x, s + *i, 2); x 175 scripts/dtc/util.c val = strtol(x, &endx, 16); x 176 scripts/dtc/util.c if (!(endx > x)) x 179 scripts/dtc/util.c (*i) += endx - x; x 22 scripts/dtc/util.h #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 567 scripts/gcc-plugins/gcc-common.h rtx emit_move_insn(rtx x, rtx y); x 24 scripts/gcc-plugins/gcc-generate-gimple-pass.h #define _GCC_PLUGIN_CONCAT2(x, y) x ## y x 25 scripts/gcc-plugins/gcc-generate-gimple-pass.h #define _GCC_PLUGIN_CONCAT3(x, y, z) x ## y ## z x 32 scripts/gcc-plugins/gcc-generate-ipa-pass.h #define _GCC_PLUGIN_CONCAT2(x, y) x ## y x 33 scripts/gcc-plugins/gcc-generate-ipa-pass.h #define _GCC_PLUGIN_CONCAT3(x, y, z) x ## y ## z x 24 scripts/gcc-plugins/gcc-generate-rtl-pass.h #define _GCC_PLUGIN_CONCAT2(x, y) x ## y x 25 scripts/gcc-plugins/gcc-generate-rtl-pass.h #define _GCC_PLUGIN_CONCAT3(x, y, z) x ## y ## z x 24 scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h #define _GCC_PLUGIN_CONCAT2(x, y) x ## y x 25 scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h #define _GCC_PLUGIN_CONCAT3(x, y, z) x ## y ## z x 144 scripts/gcc-plugins/randomize_layout_plugin.c #define rot(x,k) (((x)<<(k))|((x)>>(64-(k)))) x 145 scripts/gcc-plugins/randomize_layout_plugin.c static u64 ranval(ranctx *x) { x 146 scripts/gcc-plugins/randomize_layout_plugin.c u64 e = x->a - rot(x->b, 7); x 147 scripts/gcc-plugins/randomize_layout_plugin.c x->a = x->b ^ rot(x->c, 13); x 148 scripts/gcc-plugins/randomize_layout_plugin.c x->b = x->c + rot(x->d, 37); x 149 scripts/gcc-plugins/randomize_layout_plugin.c x->c = x->d + e; x 150 scripts/gcc-plugins/randomize_layout_plugin.c x->d = e + x->a; x 151 scripts/gcc-plugins/randomize_layout_plugin.c return x->d; x 154 scripts/gcc-plugins/randomize_layout_plugin.c static void raninit(ranctx *x, u64 *seed) { x 157 scripts/gcc-plugins/randomize_layout_plugin.c x->a = seed[0]; x 158 scripts/gcc-plugins/randomize_layout_plugin.c x->b = seed[1]; x 159 scripts/gcc-plugins/randomize_layout_plugin.c x->c = seed[2]; x 160 scripts/gcc-plugins/randomize_layout_plugin.c x->d = seed[3]; x 163 scripts/gcc-plugins/randomize_layout_plugin.c (void)ranval(x); x 212 scripts/gcc-plugins/randomize_layout_plugin.c unsigned long i, x; x 226 scripts/gcc-plugins/randomize_layout_plugin.c for (x = 0; x < num_groups; x++) { x 227 scripts/gcc-plugins/randomize_layout_plugin.c for (i = size_group[x].start + size_group[x].length - 1; i > size_group[x].start; i--) { x 70 scripts/insert-sys-cert.c Elf_Shdr *x; x 73 scripts/insert-sys-cert.c x = (void *)hdr + hdr->e_shoff; x 75 scripts/insert-sys-cert.c num_sections = x[0].sh_size; x 80 scripts/insert-sys-cert.c unsigned long start = x[i].sh_addr; x 81 scripts/insert-sys-cert.c unsigned long end = start + x[i].sh_size; x 82 scripts/insert-sys-cert.c unsigned long offset = x[i].sh_offset; x 138 scripts/insert-sys-cert.c Elf_Shdr *x; x 141 scripts/insert-sys-cert.c x = (void *)hdr + hdr->e_shoff; x 145 scripts/insert-sys-cert.c strtab = (void *)hdr + x[link].sh_offset; x 163 scripts/insert-sys-cert.c Elf_Shdr *x; x 165 scripts/insert-sys-cert.c x = (void *)hdr + hdr->e_shoff; x 175 scripts/insert-sys-cert.c sec = &x[secndx]; x 186 scripts/insert-sys-cert.c Elf_Shdr *x; x 189 scripts/insert-sys-cert.c x = (void *)hdr + hdr->e_shoff; x 191 scripts/insert-sys-cert.c num_sections = x[0].sh_size; x 196 scripts/insert-sys-cert.c if (x[i].sh_type == SHT_SYMTAB) x 197 scripts/insert-sys-cert.c return &x[i]; x 890 scripts/kconfig/gconf.c gint tx = (gint) event->x; x 1006 scripts/kconfig/gconf.c gint tx = (gint) event->x; x 53 scripts/kconfig/lxdialog/checklist.c int y, int x, int height) x 55 scripts/kconfig/lxdialog/checklist.c wmove(win, y, x); x 70 scripts/kconfig/lxdialog/checklist.c wmove(win, y, x); x 90 scripts/kconfig/lxdialog/checklist.c int x = width / 2 - 11; x 93 scripts/kconfig/lxdialog/checklist.c print_button(dialog, "Select", y, x, selected == 0); x 94 scripts/kconfig/lxdialog/checklist.c print_button(dialog, " Help ", y, x + 14, selected == 1); x 96 scripts/kconfig/lxdialog/checklist.c wmove(dialog, y, x + 1 + 14 * selected); x 107 scripts/kconfig/lxdialog/checklist.c int i, x, y, box_x, box_y; x 130 scripts/kconfig/lxdialog/checklist.c x = (getmaxx(stdscr) - width) / 2; x 133 scripts/kconfig/lxdialog/checklist.c draw_shadow(stdscr, y, x, height, width); x 135 scripts/kconfig/lxdialog/checklist.c dialog = newwin(height, width, y, x); x 158 scripts/kconfig/lxdialog/checklist.c x + box_x + 1); x 43 scripts/kconfig/lxdialog/dialog.h #define MIN(x,y) (x < y ? x : y) x 44 scripts/kconfig/lxdialog/dialog.h #define MAX(x,y) (x > y ? x : y) x 201 scripts/kconfig/lxdialog/dialog.h void end_dialog(int x, int y); x 204 scripts/kconfig/lxdialog/dialog.h void print_autowrap(WINDOW * win, const char *prompt, int width, int y, int x); x 205 scripts/kconfig/lxdialog/dialog.h void print_button(WINDOW * win, const char *label, int y, int x, int selected); x 207 scripts/kconfig/lxdialog/dialog.h void draw_box(WINDOW * win, int y, int x, int height, int width, chtype box, x 209 scripts/kconfig/lxdialog/dialog.h void draw_shadow(WINDOW * win, int y, int x, int height, int width); x 18 scripts/kconfig/lxdialog/inputbox.c int x = width / 2 - 11; x 21 scripts/kconfig/lxdialog/inputbox.c print_button(dialog, " Ok ", y, x, selected == 0); x 22 scripts/kconfig/lxdialog/inputbox.c print_button(dialog, " Help ", y, x + 14, selected == 1); x 24 scripts/kconfig/lxdialog/inputbox.c wmove(dialog, y, x + 1 + 14 * selected); x 34 scripts/kconfig/lxdialog/inputbox.c int i, x, y, box_y, box_x, box_width; x 52 scripts/kconfig/lxdialog/inputbox.c x = (getmaxx(stdscr) - width) / 2; x 55 scripts/kconfig/lxdialog/inputbox.c draw_shadow(stdscr, y, x, height, width); x 57 scripts/kconfig/lxdialog/inputbox.c dialog = newwin(height, width, y, x); x 76 scripts/kconfig/lxdialog/inputbox.c getyx(dialog, y, x); x 98 scripts/kconfig/lxdialog/menubox.c static void print_arrows(WINDOW * win, int item_no, int scroll, int y, int x, x 105 scripts/kconfig/lxdialog/menubox.c wmove(win, y, x); x 120 scripts/kconfig/lxdialog/menubox.c wmove(win, y, x); x 144 scripts/kconfig/lxdialog/menubox.c int x = width / 2 - 28; x 147 scripts/kconfig/lxdialog/menubox.c print_button(win, "Select", y, x, selected == 0); x 148 scripts/kconfig/lxdialog/menubox.c print_button(win, " Exit ", y, x + 12, selected == 1); x 149 scripts/kconfig/lxdialog/menubox.c print_button(win, " Help ", y, x + 24, selected == 2); x 150 scripts/kconfig/lxdialog/menubox.c print_button(win, " Save ", y, x + 36, selected == 3); x 151 scripts/kconfig/lxdialog/menubox.c print_button(win, " Load ", y, x + 48, selected == 4); x 153 scripts/kconfig/lxdialog/menubox.c wmove(win, y, x + 1 + 12 * selected); x 174 scripts/kconfig/lxdialog/menubox.c int i, j, x, y, box_x, box_y; x 193 scripts/kconfig/lxdialog/menubox.c x = (getmaxx(stdscr) - width) / 2; x 196 scripts/kconfig/lxdialog/menubox.c draw_shadow(stdscr, y, x, height, width); x 198 scripts/kconfig/lxdialog/menubox.c dialog = newwin(height, width, y, x); x 222 scripts/kconfig/lxdialog/menubox.c y + box_y + 1, x + box_x + 1); x 47 scripts/kconfig/lxdialog/textbox.c int i, x, y, cur_x, cur_y, key = 0; x 88 scripts/kconfig/lxdialog/textbox.c x = (getmaxx(stdscr) - width) / 2; x 91 scripts/kconfig/lxdialog/textbox.c draw_shadow(stdscr, y, x, height, width); x 93 scripts/kconfig/lxdialog/textbox.c dialog = newwin(height, width, y, x); x 99 scripts/kconfig/lxdialog/textbox.c box = subwin(dialog, boxh, boxw, y + 1, x + 1); x 341 scripts/kconfig/lxdialog/textbox.c int x = getcurx(win); x 343 scripts/kconfig/lxdialog/textbox.c for (i = 0; i < width - x; i++) x 341 scripts/kconfig/lxdialog/util.c void end_dialog(int x, int y) x 344 scripts/kconfig/lxdialog/util.c move(y, x); x 369 scripts/kconfig/lxdialog/util.c void print_autowrap(WINDOW * win, const char *prompt, int width, int y, int x) x 379 scripts/kconfig/lxdialog/util.c if (prompt_len <= width - x * 2) { /* If prompt is short */ x 383 scripts/kconfig/lxdialog/util.c cur_x = x; x 406 scripts/kconfig/lxdialog/util.c cur_x = x; x 415 scripts/kconfig/lxdialog/util.c cur_x = x; x 434 scripts/kconfig/lxdialog/util.c void print_button(WINDOW * win, const char *label, int y, int x, int selected) x 438 scripts/kconfig/lxdialog/util.c wmove(win, y, x); x 457 scripts/kconfig/lxdialog/util.c wmove(win, y, x + temp + 1); x 464 scripts/kconfig/lxdialog/util.c draw_box(WINDOW * win, int y, int x, int height, int width, x 471 scripts/kconfig/lxdialog/util.c wmove(win, y + i, x); x 498 scripts/kconfig/lxdialog/util.c void draw_shadow(WINDOW * win, int y, int x, int height, int width) x 504 scripts/kconfig/lxdialog/util.c wmove(win, y + height, x + 2); x 508 scripts/kconfig/lxdialog/util.c wmove(win, i, x + width); x 16 scripts/kconfig/lxdialog/yesno.c int x = width / 2 - 10; x 19 scripts/kconfig/lxdialog/yesno.c print_button(dialog, " Yes ", y, x, selected == 0); x 20 scripts/kconfig/lxdialog/yesno.c print_button(dialog, " No ", y, x + 13, selected == 1); x 22 scripts/kconfig/lxdialog/yesno.c wmove(dialog, y, x + 1 + 13 * selected); x 31 scripts/kconfig/lxdialog/yesno.c int i, x, y, key = 0, button = 0; x 41 scripts/kconfig/lxdialog/yesno.c x = (getmaxx(stdscr) - width) / 2; x 44 scripts/kconfig/lxdialog/yesno.c draw_shadow(stdscr, y, x, height, width); x 46 scripts/kconfig/lxdialog/yesno.c dialog = newwin(height, width, y, x); x 153 scripts/kconfig/nconf.gui.c { int length, x, y; x 159 scripts/kconfig/nconf.gui.c getyx(win, y, x); x 161 scripts/kconfig/nconf.gui.c x = startx; x 169 scripts/kconfig/nconf.gui.c x = startx + (int)temp; x 171 scripts/kconfig/nconf.gui.c mvwprintw(win, y, x, "%s", string); x 216 scripts/kconfig/nconf.gui.c int x, y; x 220 scripts/kconfig/nconf.gui.c getmaxyx(win, y, x); x 224 scripts/kconfig/nconf.gui.c char tmp[x+10]; x 227 scripts/kconfig/nconf.gui.c strncpy(tmp, line, min(len, x)); x 255 scripts/kconfig/nconf.gui.c int i, x, y; x 280 scripts/kconfig/nconf.gui.c x = (getmaxx(stdscr)-(total_width+4))/2; x 289 scripts/kconfig/nconf.gui.c win = newwin(win_rows, total_width+4, y, x); x 367 scripts/kconfig/nconf.gui.c int i, x, y, lines, columns, win_lines, win_cols; x 398 scripts/kconfig/nconf.gui.c x = (columns-win_cols)/2; x 403 scripts/kconfig/nconf.gui.c win = newwin(win_lines, win_cols, y, x); x 556 scripts/kconfig/nconf.gui.c int x, y, lines, columns; x 589 scripts/kconfig/nconf.gui.c x = (columns-win_cols)/2; x 591 scripts/kconfig/nconf.gui.c win = newwin(win_lines, win_cols, y, x); x 775 scripts/kconfig/qconf.cc int idx, x; x 781 scripts/kconfig/qconf.cc x = header()->offset() + p.x(); x 782 scripts/kconfig/qconf.cc idx = header()->logicalIndexAt(x); x 787 scripts/kconfig/qconf.cc int off = header()->sectionPosition(0) + visualRect(indexAt(p)).x() + 4; // 4 is Hardcoded image offset. There might be a way to do it properly. x 788 scripts/kconfig/qconf.cc if (x >= off && x < off + icon.availableSizes().first().width()) { x 1278 scripts/kconfig/qconf.cc QVariant x, y; x 1286 scripts/kconfig/qconf.cc x = configSettings->value("/window x"); x 1288 scripts/kconfig/qconf.cc if ((x.isValid())&&(y.isValid())) x 1289 scripts/kconfig/qconf.cc move(x.toInt(), y.toInt()); x 1302 scripts/kconfig/qconf.cc configSettings->setValue("/window x", pos().x()); x 1339 scripts/kconfig/qconf.cc QVariant x, y; x 1353 scripts/kconfig/qconf.cc x = configSettings->value("/window x"); x 1355 scripts/kconfig/qconf.cc if ((x.isValid())&&(y.isValid())) x 1356 scripts/kconfig/qconf.cc move(x.toInt(), y.toInt()); x 1796 scripts/kconfig/qconf.cc configSettings->setValue("/window x", pos().x()); x 713 scripts/mod/file2alias.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 84 scripts/mod/modpost.h #define TO_NATIVE(x) \ x 86 scripts/mod/modpost.h typeof(x) __x; \ x 87 scripts/mod/modpost.h __endian(&(x), &(__x), sizeof(__x)); \ x 93 scripts/mod/modpost.h #define TO_NATIVE(x) (x) x 46 scripts/mod/sumversion.c static inline uint32_t lshift(uint32_t x, unsigned int s) x 48 scripts/mod/sumversion.c x &= 0xFFFFFFFF; x 49 scripts/mod/sumversion.c return ((x << s) & 0xFFFFFFFF) | (x >> (32 - s)); x 52 scripts/mod/sumversion.c static inline uint32_t F(uint32_t x, uint32_t y, uint32_t z) x 54 scripts/mod/sumversion.c return (x & y) | ((~x) & z); x 57 scripts/mod/sumversion.c static inline uint32_t G(uint32_t x, uint32_t y, uint32_t z) x 59 scripts/mod/sumversion.c return (x & y) | (x & z) | (y & z); x 62 scripts/mod/sumversion.c static inline uint32_t H(uint32_t x, uint32_t y, uint32_t z) x 64 scripts/mod/sumversion.c return x ^ y ^ z; x 359 scripts/recordmcount.c static uint64_t w8rev(uint64_t const x) x 361 scripts/recordmcount.c return ((0xff & (x >> (0 * 8))) << (7 * 8)) x 362 scripts/recordmcount.c | ((0xff & (x >> (1 * 8))) << (6 * 8)) x 363 scripts/recordmcount.c | ((0xff & (x >> (2 * 8))) << (5 * 8)) x 364 scripts/recordmcount.c | ((0xff & (x >> (3 * 8))) << (4 * 8)) x 365 scripts/recordmcount.c | ((0xff & (x >> (4 * 8))) << (3 * 8)) x 366 scripts/recordmcount.c | ((0xff & (x >> (5 * 8))) << (2 * 8)) x 367 scripts/recordmcount.c | ((0xff & (x >> (6 * 8))) << (1 * 8)) x 368 scripts/recordmcount.c | ((0xff & (x >> (7 * 8))) << (0 * 8)); x 371 scripts/recordmcount.c static uint32_t w4rev(uint32_t const x) x 373 scripts/recordmcount.c return ((0xff & (x >> (0 * 8))) << (3 * 8)) x 374 scripts/recordmcount.c | ((0xff & (x >> (1 * 8))) << (2 * 8)) x 375 scripts/recordmcount.c | ((0xff & (x >> (2 * 8))) << (1 * 8)) x 376 scripts/recordmcount.c | ((0xff & (x >> (3 * 8))) << (0 * 8)); x 379 scripts/recordmcount.c static uint32_t w2rev(uint16_t const x) x 381 scripts/recordmcount.c return ((0xff & (x >> (0 * 8))) << (1 * 8)) x 382 scripts/recordmcount.c | ((0xff & (x >> (1 * 8))) << (0 * 8)); x 385 scripts/recordmcount.c static uint64_t w8nat(uint64_t const x) x 387 scripts/recordmcount.c return x; x 390 scripts/recordmcount.c static uint32_t w4nat(uint32_t const x) x 392 scripts/recordmcount.c return x; x 395 scripts/recordmcount.c static uint32_t w2nat(uint16_t const x) x 397 scripts/recordmcount.c return x; x 112 scripts/sortextable.c static uint64_t r8be(const uint64_t *x) x 114 scripts/sortextable.c return get_unaligned_be64(x); x 116 scripts/sortextable.c static uint32_t rbe(const uint32_t *x) x 118 scripts/sortextable.c return get_unaligned_be32(x); x 120 scripts/sortextable.c static uint16_t r2be(const uint16_t *x) x 122 scripts/sortextable.c return get_unaligned_be16(x); x 124 scripts/sortextable.c static uint64_t r8le(const uint64_t *x) x 126 scripts/sortextable.c return get_unaligned_le64(x); x 128 scripts/sortextable.c static uint32_t rle(const uint32_t *x) x 130 scripts/sortextable.c return get_unaligned_le32(x); x 132 scripts/sortextable.c static uint16_t r2le(const uint16_t *x) x 134 scripts/sortextable.c return get_unaligned_le16(x); x 137 scripts/sortextable.c static void w8be(uint64_t val, uint64_t *x) x 139 scripts/sortextable.c put_unaligned_be64(val, x); x 141 scripts/sortextable.c static void wbe(uint32_t val, uint32_t *x) x 143 scripts/sortextable.c put_unaligned_be32(val, x); x 145 scripts/sortextable.c static void w2be(uint16_t val, uint16_t *x) x 147 scripts/sortextable.c put_unaligned_be16(val, x); x 149 scripts/sortextable.c static void w8le(uint64_t val, uint64_t *x) x 151 scripts/sortextable.c put_unaligned_le64(val, x); x 153 scripts/sortextable.c static void wle(uint32_t val, uint32_t *x) x 155 scripts/sortextable.c put_unaligned_le32(val, x); x 157 scripts/sortextable.c static void w2le(uint16_t val, uint16_t *x) x 159 scripts/sortextable.c put_unaligned_le16(val, x); x 318 security/apparmor/lib.c static u32 map_other(u32 x) x 320 security/apparmor/lib.c return ((x & 0x3) << 8) | /* SETATTR/GETATTR */ x 321 security/apparmor/lib.c ((x & 0x1c) << 18) | /* ACCEPT/BIND/LISTEN */ x 322 security/apparmor/lib.c ((x & 0x60) << 19); /* SETOPT/GETOPT */ x 36 security/keys/keyring.c static inline bool keyring_ptr_is_keyring(const struct assoc_array_ptr *x) x 38 security/keys/keyring.c return (unsigned long)x & KEYRING_PTR_SUBTYPE; x 40 security/keys/keyring.c static inline struct key *keyring_ptr_to_key(const struct assoc_array_ptr *x) x 42 security/keys/keyring.c void *object = assoc_array_ptr_to_leaf(x); x 153 security/keys/keyring.c static u64 mult_64x32_and_fold(u64 x, u32 y) x 155 security/keys/keyring.c u64 hi = (u64)(u32)(x >> 32) * y; x 156 security/keys/keyring.c u64 lo = (u64)(u32)(x) * y; x 280 security/keys/keyring.c return index_key->x; x 344 security/keys/keyring.c seg_a = a->x; x 345 security/keys/keyring.c seg_b = b->x; x 2252 security/security.c int security_xfrm_state_alloc(struct xfrm_state *x, x 2255 security/security.c return call_int_hook(xfrm_state_alloc, 0, x, sec_ctx); x 2259 security/security.c int security_xfrm_state_alloc_acquire(struct xfrm_state *x, x 2262 security/security.c return call_int_hook(xfrm_state_alloc_acquire, 0, x, polsec, secid); x 2265 security/security.c int security_xfrm_state_delete(struct xfrm_state *x) x 2267 security/security.c return call_int_hook(xfrm_state_delete_security, 0, x); x 2271 security/security.c void security_xfrm_state_free(struct xfrm_state *x) x 2273 security/security.c call_void_hook(xfrm_state_free_security, x); x 2281 security/security.c int security_xfrm_state_pol_flow_match(struct xfrm_state *x, x 2299 security/security.c rc = hp->hook.xfrm_state_pol_flow_match(x, xp, fl); x 203 security/selinux/include/security.h #define security_xperm_set(perms, x) (perms[x >> 5] |= 1 << (x & 0x1f)) x 204 security/selinux/include/security.h #define security_xperm_test(perms, x) (1 & (perms[x >> 5] >> (x & 0x1f))) x 20 security/selinux/include/xfrm.h int selinux_xfrm_state_alloc(struct xfrm_state *x, x 22 security/selinux/include/xfrm.h int selinux_xfrm_state_alloc_acquire(struct xfrm_state *x, x 24 security/selinux/include/xfrm.h void selinux_xfrm_state_free(struct xfrm_state *x); x 25 security/selinux/include/xfrm.h int selinux_xfrm_state_delete(struct xfrm_state *x); x 27 security/selinux/include/xfrm.h int selinux_xfrm_state_pol_flow_match(struct xfrm_state *x, x 31 security/selinux/ss/ebitmap.h #define EBITMAP_SHIFT_UNIT_SIZE(x) \ x 32 security/selinux/ss/ebitmap.h (((x) >> EBITMAP_UNIT_SIZE / 2) >> EBITMAP_UNIT_SIZE / 2) x 65 security/selinux/xfrm.c static inline int selinux_authorizable_xfrm(struct xfrm_state *x) x 67 security/selinux/xfrm.c return selinux_authorizable_ctx(x->security); x 176 security/selinux/xfrm.c int selinux_xfrm_state_pol_flow_match(struct xfrm_state *x, x 183 security/selinux/xfrm.c if (x->security) x 190 security/selinux/xfrm.c if (!x->security) x 194 security/selinux/xfrm.c if (!selinux_authorizable_xfrm(x)) x 198 security/selinux/xfrm.c state_sid = x->security->ctx_sid; x 215 security/selinux/xfrm.c struct xfrm_state *x; x 219 security/selinux/xfrm.c x = dst->xfrm; x 220 security/selinux/xfrm.c if (x == NULL || !selinux_authorizable_xfrm(x)) x 223 security/selinux/xfrm.c return x->security->ctx_sid; x 236 security/selinux/xfrm.c struct xfrm_state *x = sp->xvec[i]; x 237 security/selinux/xfrm.c if (selinux_authorizable_xfrm(x)) { x 238 security/selinux/xfrm.c struct xfrm_sec_ctx *ctx = x->security; x 333 security/selinux/xfrm.c int selinux_xfrm_state_alloc(struct xfrm_state *x, x 336 security/selinux/xfrm.c return selinux_xfrm_alloc_user(&x->security, uctx, GFP_KERNEL); x 343 security/selinux/xfrm.c int selinux_xfrm_state_alloc_acquire(struct xfrm_state *x, x 374 security/selinux/xfrm.c x->security = ctx; x 384 security/selinux/xfrm.c void selinux_xfrm_state_free(struct xfrm_state *x) x 386 security/selinux/xfrm.c selinux_xfrm_free(x->security); x 392 security/selinux/xfrm.c int selinux_xfrm_state_delete(struct xfrm_state *x) x 394 security/selinux/xfrm.c return selinux_xfrm_delete(x->security); x 413 security/selinux/xfrm.c struct xfrm_state *x = sp->xvec[i]; x 415 security/selinux/xfrm.c if (x && selinux_authorizable_xfrm(x)) { x 416 security/selinux/xfrm.c struct xfrm_sec_ctx *ctx = x->security; x 460 security/selinux/xfrm.c struct xfrm_state *x = iter->xfrm; x 462 security/selinux/xfrm.c if (x && selinux_authorizable_xfrm(x)) x 169 sound/arm/aaci.h #define MAINCR_SCRA(x) ((x) << 10) /* secondary codec reg access */ x 26 sound/core/info_oss.c char *x; x 34 sound/core/info_oss.c if ((x = snd_sndstat_strings[num][dev]) != NULL) { x 35 sound/core/info_oss.c kfree(x); x 36 sound/core/info_oss.c x = NULL; x 39 sound/core/info_oss.c x = kstrdup(string, GFP_KERNEL); x 40 sound/core/info_oss.c if (x == NULL) { x 45 sound/core/info_oss.c snd_sndstat_strings[num][dev] = x; x 3567 sound/core/pcm_native.c #define __OLD_TO_NEW_MASK(x) ((x&7)|((x&0x07fffff8)<<5)) x 3568 sound/core/pcm_native.c #define __NEW_TO_OLD_MASK(x) ((x&7)|((x&0xffffff00)>>5)) x 61 sound/core/seq/oss/seq_oss_event.c return snd_seq_oss_synth_sysex(dp, q->x.dev, q->x.buf, ev); x 86 sound/core/seq/oss/seq_oss_event.h struct evrec_sysex x; x 114 sound/drivers/aloop.c static inline unsigned int byte_pos(struct loopback_pcm *dpcm, unsigned int x) x 117 sound/drivers/aloop.c x /= HZ; x 119 sound/drivers/aloop.c x = div_u64(NO_PITCH * (unsigned long long)x, x 122 sound/drivers/aloop.c return x - (x % dpcm->pcm_salign); x 125 sound/drivers/aloop.c static inline unsigned int frac_pos(struct loopback_pcm *dpcm, unsigned int x) x 128 sound/drivers/aloop.c return x * HZ; x 130 sound/drivers/aloop.c x = div_u64(dpcm->pcm_rate_shift * (unsigned long long)x * HZ, x 133 sound/drivers/aloop.c return x; x 1030 sound/drivers/dummy.c #define dummy_proc_init(x) x 287 sound/drivers/ml403-ac97cr.c #define CR_REG(ml403_ac97cr, x) ((ml403_ac97cr)->port + CR_REG_##x) x 61 sound/firewire/digi00x/amdtp-dot.c #define MAGIC_BYTE_OFF(x) (((x) * BYTE_PER_SAMPLE) + MAGIC_DOT_BYTE) x 12 sound/isa/gus/gus_irq.c #define STAT_ADD(x) ((x)++) x 14 sound/isa/gus/gus_irq.c #define STAT_ADD(x) while (0) { ; } x 779 sound/isa/msnd/msnd_pinnacle.c #define has_isapnp(x) isapnp[x] x 781 sound/isa/msnd/msnd_pinnacle.c #define has_isapnp(x) 0 x 45 sound/isa/sb/emu8000_callback.c #define LIMITVALUE(x, a, b) do { if ((x) < (a)) (x) = (a); else if ((x) > (b)) (x) = (b); } while (0) x 46 sound/isa/sb/emu8000_callback.c #define LIMITMAX(x, a) do {if ((x) > (a)) (x) = (a); } while (0) x 381 sound/isa/sscape.c int x; x 384 sound/isa/sscape.c x = host_read_unsafe(s->io_base); x 386 sound/isa/sscape.c if (x == 0xfe || x == 0xff) x 408 sound/isa/sscape.c int x; x 411 sound/isa/sscape.c x = host_read_unsafe(s->io_base); x 413 sound/isa/sscape.c if (x == 0xfe) x 31 sound/isa/wavefront/wavefront_fx.c unsigned int x = 0x80; x 34 sound/isa/wavefront/wavefront_fx.c x = inb (dev->fx_status); x 35 sound/isa/wavefront/wavefront_fx.c if ((x & 0x80) == 0) { x 40 sound/isa/wavefront/wavefront_fx.c if (x & 0x80) { x 601 sound/isa/wavefront/wavefront_synth.c int x; x 606 sound/isa/wavefront/wavefront_synth.c if ((x = snd_wavefront_cmd (dev, WFC_DELETE_SAMPLE, NULL, wbuf)) == 0) { x 610 sound/isa/wavefront/wavefront_synth.c return x; x 688 sound/isa/wavefront/wavefront_synth.c int i, x, cnt, cnt2; x 694 sound/isa/wavefront/wavefront_synth.c if ((x = snd_wavefront_cmd (dev, WFC_UPLOAD_PATCH, patchbuf, x 703 sound/isa/wavefront/wavefront_synth.c } else if (x == 3) { /* Bad patch number */ x 707 sound/isa/wavefront/wavefront_synth.c "error 0x%x\n", x); x 736 sound/isa/wavefront/wavefront_synth.c int i, x, l, cnt; x 741 sound/isa/wavefront/wavefront_synth.c if ((x = snd_wavefront_cmd (dev, WFC_UPLOAD_PROGRAM, progbuf, x 756 sound/isa/wavefront/wavefront_synth.c } else if (x == 1) { /* Bad program number */ x 760 sound/isa/wavefront/wavefront_synth.c "error 0x%x\n", x); x 895 sound/isa/wavefront/wavefront_synth.c int x; x 897 sound/isa/wavefront/wavefront_synth.c if ((x = wavefront_find_free_sample (dev)) < 0) { x 900 sound/isa/wavefront/wavefront_synth.c snd_printk ("unspecified sample => %d\n", x); x 901 sound/isa/wavefront/wavefront_synth.c header->number = x; x 353 sound/mips/sgio2audio.c u64 x; x 374 sound/mips/sgio2audio.c x = *src; x 375 sound/mips/sgio2audio.c dst[0] = (x >> CHANNEL_LEFT_SHIFT) & 0xffff; x 376 sound/mips/sgio2audio.c dst[1] = (x >> CHANNEL_RIGHT_SHIFT) & 0xffff; x 43 sound/oss/dmasound/dmasound.h #define le2be16(x) (((x)<<8 & 0xff00) | ((x)>>8 & 0x00ff)) x 44 sound/oss/dmasound/dmasound.h #define le2be16dbl(x) (((x)<<8 & 0xff00ff00) | ((x)>>8 & 0x00ff00ff)) x 227 sound/oss/dmasound/dmasound_paula.c #define AMI_CT_ULAW(x) (dmasound_ulaw2dma8[(x)]) x 228 sound/oss/dmasound/dmasound_paula.c #define AMI_CT_ALAW(x) (dmasound_alaw2dma8[(x)]) x 229 sound/oss/dmasound/dmasound_paula.c #define AMI_CT_U8(x) ((x) ^ 0x80) x 287 sound/oss/dmasound/dmasound_paula.c #define AMI_CT_S16BE(x) (x) x 288 sound/oss/dmasound/dmasound_paula.c #define AMI_CT_U16BE(x) ((x) ^ 0x8000) x 289 sound/oss/dmasound/dmasound_paula.c #define AMI_CT_S16LE(x) (le2be16((x))) x 290 sound/oss/dmasound/dmasound_paula.c #define AMI_CT_U16LE(x) (le2be16((x)) ^ 0x8000) x 769 sound/pci/ac97/ac97_codec.c int x = (val >> 12) & 0x03; x 770 sound/pci/ac97/ac97_codec.c switch (x) { x 771 sound/pci/ac97/ac97_codec.c case 0: x = 1; break; // 44.1 x 772 sound/pci/ac97/ac97_codec.c case 2: x = 0; break; // 48.0 x 773 sound/pci/ac97/ac97_codec.c default: x = 0; break; // illegal. x 775 sound/pci/ac97/ac97_codec.c change |= snd_ac97_update_bits_nolock(ac97, AC97_CSR_SPDIF, 0x3fff, ((val & 0xcfff) | (x << 12))); x 1144 sound/pci/ac97/ac97_codec.c static inline int printable(unsigned int x) x 1146 sound/pci/ac97/ac97_codec.c x &= 0xff; x 1147 sound/pci/ac97/ac97_codec.c if (x < ' ' || x >= 0x71) { x 1148 sound/pci/ac97/ac97_codec.c if (x <= 0x89) x 1149 sound/pci/ac97/ac97_codec.c return x - 0x71 + 'A'; x 1152 sound/pci/ac97/ac97_codec.c return x; x 142 sound/pci/ali5451/ali5451.c #define ALI_REG(codec, x) ((codec)->port + x) x 279 sound/pci/asihpi/asihpi.c #define hpi_handle_error(x) handle_error(x, __LINE__, __FILE__) x 144 sound/pci/atiixp.c #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3)) x 84 sound/pci/au88x0/au8810.h #define ADB_DMA(x) (x) x 85 sound/pci/au88x0/au8810.h #define ADB_SRCOUT(x) (x + OFFSET_SRCOUT) x 86 sound/pci/au88x0/au8810.h #define ADB_SRCIN(x) (x + OFFSET_SRCIN) x 87 sound/pci/au88x0/au8810.h #define ADB_MIXOUT(x) (x + OFFSET_MIXOUT) x 88 sound/pci/au88x0/au8810.h #define ADB_MIXIN(x) (x + OFFSET_MIXIN) x 89 sound/pci/au88x0/au8810.h #define ADB_CODECIN(x) (x + OFFSET_CODECIN) x 90 sound/pci/au88x0/au8810.h #define ADB_CODECOUT(x) (x + OFFSET_CODECOUT) x 91 sound/pci/au88x0/au8810.h #define ADB_SPORTIN(x) (x + OFFSET_SPORTIN) x 92 sound/pci/au88x0/au8810.h #define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT) x 93 sound/pci/au88x0/au8810.h #define ADB_SPDIFOUT(x) (x + OFFSET_SPDIFOUT) x 94 sound/pci/au88x0/au8810.h #define ADB_EQIN(x) (x + OFFSET_EQIN) x 95 sound/pci/au88x0/au8810.h #define ADB_EQOUT(x) (x + OFFSET_EQOUT) x 96 sound/pci/au88x0/au8810.h #define ADB_A3DOUT(x) (x + OFFSET_A3DOUT) /* 0x10 A3D blocks */ x 97 sound/pci/au88x0/au8810.h #define ADB_A3DIN(x) (x + OFFSET_A3DIN) x 98 sound/pci/au88x0/au8810.h #define ADB_XTALKIN(x) (x + OFFSET_XTALKIN) x 99 sound/pci/au88x0/au8810.h #define ADB_XTALKOUT(x) (x + OFFSET_XTALKOUT) x 76 sound/pci/au88x0/au8820.h #define ADB_DMA(x) (x + OFFSET_ADBDMA) x 77 sound/pci/au88x0/au8820.h #define ADB_SRCOUT(x) (x + OFFSET_SRCOUT) x 78 sound/pci/au88x0/au8820.h #define ADB_SRCIN(x) (x + OFFSET_SRCIN) x 79 sound/pci/au88x0/au8820.h #define ADB_MIXOUT(x) (x + OFFSET_MIXOUT) x 80 sound/pci/au88x0/au8820.h #define ADB_MIXIN(x) (x + OFFSET_MIXIN) x 81 sound/pci/au88x0/au8820.h #define ADB_CODECIN(x) (x + OFFSET_CODECIN) x 82 sound/pci/au88x0/au8820.h #define ADB_CODECOUT(x) (x + OFFSET_CODECOUT) x 83 sound/pci/au88x0/au8820.h #define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT) x 84 sound/pci/au88x0/au8820.h #define ADB_SPORTIN(x) (x + OFFSET_SPORTIN) /* */ x 85 sound/pci/au88x0/au8820.h #define ADB_A3DOUT(x) (x + OFFSET_A3DOUT) /* 8 A3D blocks */ x 86 sound/pci/au88x0/au8820.h #define ADB_A3DIN(x) (x + OFFSET_A3DIN) x 87 sound/pci/au88x0/au8820.h #define ADB_WTOUT(x,y) (y + OFFSET_WTOUT) x 105 sound/pci/au88x0/au8830.h #define ADB_DMA(x) (x) x 106 sound/pci/au88x0/au8830.h #define ADB_SRCOUT(x) (x + OFFSET_SRCOUT) x 107 sound/pci/au88x0/au8830.h #define ADB_SRCIN(x) (x + OFFSET_SRCIN) x 108 sound/pci/au88x0/au8830.h #define ADB_MIXOUT(x) (x + OFFSET_MIXOUT) x 109 sound/pci/au88x0/au8830.h #define ADB_MIXIN(x) (x + OFFSET_MIXIN) x 110 sound/pci/au88x0/au8830.h #define ADB_CODECIN(x) (x + OFFSET_CODECIN) x 111 sound/pci/au88x0/au8830.h #define ADB_CODECOUT(x) (x + OFFSET_CODECOUT) x 112 sound/pci/au88x0/au8830.h #define ADB_SPORTIN(x) (x + OFFSET_SPORTIN) x 113 sound/pci/au88x0/au8830.h #define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT) x 114 sound/pci/au88x0/au8830.h #define ADB_SPDIFIN(x) (x + OFFSET_SPDIFIN) x 115 sound/pci/au88x0/au8830.h #define ADB_SPDIFOUT(x) (x + OFFSET_SPDIFOUT) x 116 sound/pci/au88x0/au8830.h #define ADB_EQIN(x) (x + OFFSET_EQIN) x 117 sound/pci/au88x0/au8830.h #define ADB_EQOUT(x) (x + OFFSET_EQOUT) x 118 sound/pci/au88x0/au8830.h #define ADB_A3DOUT(x) (x + OFFSET_A3DOUT) /* 0x10 A3D blocks */ x 119 sound/pci/au88x0/au8830.h #define ADB_A3DIN(x) (x + OFFSET_A3DIN) x 121 sound/pci/au88x0/au8830.h #define ADB_WTOUT(x,y) (((x)==0)?((y) + OFFSET_WT0):((y) + OFFSET_WT1)) x 122 sound/pci/au88x0/au8830.h #define ADB_XTALKIN(x) ((x) + OFFSET_XTALKIN) x 123 sound/pci/au88x0/au8830.h #define ADB_XTALKOUT(x) ((x) + OFFSET_XTALKOUT) x 26 sound/pci/au88x0/au88x0.h #define hwread(x,y) readl((x)+(y)) x 27 sound/pci/au88x0/au88x0.h #define hwwrite(x,y,z) writel((z),(x)+(y)) x 37 sound/pci/au88x0/au88x0.h #define SRC_RATIO(x,y) ((((x<<15)/y) + 1)/2) x 74 sound/pci/au88x0/au88x0.h #define VORTEX_IS_QUAD(x) ((x)->isquad) x 76 sound/pci/au88x0/au88x0.h #define IS_BAD_CHIP(x) (\ x 77 sound/pci/au88x0/au88x0.h (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_VORTEX_2) || \ x 78 sound/pci/au88x0/au88x0.h (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_ADVANTAGE)) x 89 sound/pci/au88x0/au88x0.h #define MIX_CAPT(x) (vortex->mixcapt[x]) x 90 sound/pci/au88x0/au88x0.h #define MIX_PLAYB(x) (vortex->mixplayb[x]) x 91 sound/pci/au88x0/au88x0.h #define MIX_SPDIF(x) (vortex->mixspdif[x]) x 368 sound/pci/au88x0/au88x0_core.c int x; x 375 sound/pci/au88x0/au88x0_core.c for (x = 0x5f; x >= 0; x--) { x 380 sound/pci/au88x0/au88x0_core.c for (x = 0x7f; x >= 0; x--) { x 385 sound/pci/au88x0/au88x0_core.c for (x = 0x5f; x >= 0; x--) { x 390 sound/pci/au88x0/au88x0_core.c for (x = 0x1ff; x >= 0; x--) { x 395 sound/pci/au88x0/au88x0_core.c for (x = 0xf; x >= 0; x--) { x 400 sound/pci/au88x0/au88x0_core.c for (x = 0x1ff; x >= 0; x--) { x 405 sound/pci/au88x0/au88x0_core.c for (x = 0xf; x >= 0; x--) { x 410 sound/pci/au88x0/au88x0_core.c for (x = (MIXER_RTBASE_SIZE - 1); x >= 0; x--) { x 631 sound/pci/au88x0/au88x0_core.c int x; x 641 sound/pci/au88x0/au88x0_core.c for (x = 0xf; x >= 0; x--) { x 648 sound/pci/au88x0/au88x0_core.c for (x = 0x15; x >= 0; x--) { x 767 sound/pci/au88x0/au88x0_core.c vortex_fifo_clearadbdata(vortex_t * vortex, int fifo, int x) x 769 sound/pci/au88x0/au88x0_core.c for (x--; x >= 0; x--) x 772 sound/pci/au88x0/au88x0_core.c (((fifo << FIFO_SIZE_BITS) + x) << 2), 0); x 867 sound/pci/au88x0/au88x0_core.c static void vortex_fifo_clearwtdata(vortex_t * vortex, int fifo, int x) x 869 sound/pci/au88x0/au88x0_core.c if (x < 1) x 871 sound/pci/au88x0/au88x0_core.c for (x--; x >= 0; x--) x 874 sound/pci/au88x0/au88x0_core.c (((fifo << FIFO_SIZE_BITS) + x) << 2), 0); x 1026 sound/pci/au88x0/au88x0_core.c int x; x 1031 sound/pci/au88x0/au88x0_core.c for (x = NR_ADB - 1; x >= 0; x--) { x 1035 sound/pci/au88x0/au88x0_core.c vortex_fifo_clearadbdata(vortex, x, FIFO_SIZE); x 1042 sound/pci/au88x0/au88x0_core.c for (x = NR_WT - 1; x >= 0; x--) { x 1048 sound/pci/au88x0/au88x0_core.c vortex_fifo_clearwtdata(vortex, x, FIFO_SIZE); x 18 sound/pci/au88x0/au88x0_pcm.c #define VORTEX_PCM_TYPE(x) (x->name[40]) x 18 sound/pci/au88x0/au88x0_wt.h #define WT_BAR(x) (((x)&0xffe0)<<0x8) x 19 sound/pci/au88x0/au88x0_wt.h #define WT_BANK(x) (x>>5) x 34 sound/pci/au88x0/au88x0_wt.h #define WT_PARM(x,y) (((WT_BAR(x))+ 0x80 +(((x)&0x1f)<<2)+(y))<<2) /* 0x0200 */ x 35 sound/pci/au88x0/au88x0_wt.h #define WT_DELAY(x,y) (((WT_BAR(x))+ 0x100 +(((x)&0x1f)<<2)+(y))<<2) /* 0x0400 */ x 341 sound/pci/azt3328.h #define AZF_ALIGN(x) (((x) + 3) & (~3)) x 147 sound/pci/cs4281.c #define BA0_FCR_RS(x) (((x)&0x1f)<<24) /* Right Slot Mapping */ x 148 sound/pci/cs4281.c #define BA0_FCR_LS(x) (((x)&0x1f)<<16) /* Left Slot Mapping */ x 149 sound/pci/cs4281.c #define BA0_FCR_SZ(x) (((x)&0x7f)<<8) /* FIFO buffer size (in samples) */ x 150 sound/pci/cs4281.c #define BA0_FCR_OF(x) (((x)&0x7f)<<0) /* FIFO starting offset (in samples) */ x 158 sound/pci/cs4281.c #define BA0_FCHS_RCO(x) (1<<(7+(((x)&3)<<3))) /* Right Channel Out */ x 159 sound/pci/cs4281.c #define BA0_FCHS_LCO(x) (1<<(6+(((x)&3)<<3))) /* Left Channel Out */ x 160 sound/pci/cs4281.c #define BA0_FCHS_MRP(x) (1<<(5+(((x)&3)<<3))) /* Move Read Pointer */ x 161 sound/pci/cs4281.c #define BA0_FCHS_FE(x) (1<<(4+(((x)&3)<<3))) /* FIFO Empty */ x 162 sound/pci/cs4281.c #define BA0_FCHS_FF(x) (1<<(3+(((x)&3)<<3))) /* FIFO Full */ x 163 sound/pci/cs4281.c #define BA0_FCHS_IOR(x) (1<<(2+(((x)&3)<<3))) /* Internal Overrun Flag */ x 164 sound/pci/cs4281.c #define BA0_FCHS_RCI(x) (1<<(1+(((x)&3)<<3))) /* Right Channel In */ x 165 sound/pci/cs4281.c #define BA0_FCHS_LCI(x) (1<<(0+(((x)&3)<<3))) /* Left Channel In */ x 172 sound/pci/cs4281.c #define BA0_FSIC_FIC(x) (((x)&0x7f)<<24) /* FIFO Interrupt Count */ x 176 sound/pci/cs4281.c #define BA0_FSIC_FSC(x) (((x)&0x7f)<<8) /* FIFO Sample Count */ x 212 sound/pci/cs4281.c #define BA0_CLKCR1_DLLSS (((x)&3)<<3) /* DLL Source Select */ x 224 sound/pci/cs4281.c #define BA0_SERMC_TCID(x) (((x)&3)<<16) /* Target Secondary Codec ID */ x 232 sound/pci/cs4281.c #define BA0_SERC1_SO1F(x) (((x)&7)>>1) /* Primary Output Port Format */ x 237 sound/pci/cs4281.c #define BA0_SERC2_SI1F(x) (((x)&7)>>1) /* Primary Input Port Format */ x 255 sound/pci/cs4281.c #define BA0_ACOSV_SLV(x) (1<<((x)-3)) x 261 sound/pci/cs4281.c #define BA0_ACISV_SLV(x) (1<<((x)-3)) x 291 sound/pci/cs4281.c #define BA0_AODSD1_NDS(x) (1<<((x)-3)) x 294 sound/pci/cs4281.c #define BA0_AODSD2_NDS(x) (1<<((x)-3)) x 137 sound/pci/ctxfi/cthardware.h int (*amixer_set_x)(void *blk, unsigned int x); x 615 sound/pci/ctxfi/cthw20k1.c static int amixer_set_x(void *blk, unsigned int x) x 619 sound/pci/ctxfi/cthw20k1.c set_field(&ctl->amoplo, AMOPLO_X, x); x 617 sound/pci/ctxfi/cthw20k2.c static int amixer_set_x(void *blk, unsigned int x) x 621 sound/pci/ctxfi/cthw20k2.c set_field(&ctl->amoplo, AMOPLO_X, x); x 286 sound/pci/ctxfi/ctmixer.c static unsigned int uint16_to_float14(unsigned int x) x 290 sound/pci/ctxfi/ctmixer.c if (x < 17) x 293 sound/pci/ctxfi/ctmixer.c x *= 2031; x 294 sound/pci/ctxfi/ctmixer.c x /= 65535; x 295 sound/pci/ctxfi/ctmixer.c x += 16; x 298 sound/pci/ctxfi/ctmixer.c for (i = 0; !(x & 0x400); i++) x 299 sound/pci/ctxfi/ctmixer.c x <<= 1; x 301 sound/pci/ctxfi/ctmixer.c x = (((7 - i) & 0x7) << 10) | (x & 0x3ff); x 303 sound/pci/ctxfi/ctmixer.c return x; x 306 sound/pci/ctxfi/ctmixer.c static unsigned int float14_to_uint16(unsigned int x) x 310 sound/pci/ctxfi/ctmixer.c if (!x) x 311 sound/pci/ctxfi/ctmixer.c return x; x 313 sound/pci/ctxfi/ctmixer.c e = (x >> 10) & 0x7; x 314 sound/pci/ctxfi/ctmixer.c x &= 0x3ff; x 315 sound/pci/ctxfi/ctmixer.c x += 1024; x 316 sound/pci/ctxfi/ctmixer.c x >>= (7 - e); x 317 sound/pci/ctxfi/ctmixer.c x -= 16; x 318 sound/pci/ctxfi/ctmixer.c x *= 65535; x 319 sound/pci/ctxfi/ctmixer.c x /= 2031; x 321 sound/pci/ctxfi/ctmixer.c return x; x 44 sound/pci/emu10k1/emu10k1_callback.c #define LIMITVALUE(x, a, b) do { if ((x) < (a)) (x) = (a); else if ((x) > (b)) (x) = (b); } while (0) x 45 sound/pci/emu10k1/emu10k1_callback.c #define LIMITMAX(x, a) do {if ((x) > (a)) (x) = (a); } while (0) x 461 sound/pci/emu10k1/emufx.c u32 op, u32 r, u32 a, u32 x, u32 y) x 468 sound/pci/emu10k1/emufx.c code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff); x 473 sound/pci/emu10k1/emufx.c #define OP(icode, ptr, op, r, a, x, y) \ x 474 sound/pci/emu10k1/emufx.c snd_emu10k1_write_op(icode, ptr, op, r, a, x, y) x 478 sound/pci/emu10k1/emufx.c u32 op, u32 r, u32 a, u32 x, u32 y) x 485 sound/pci/emu10k1/emufx.c code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff); x 490 sound/pci/emu10k1/emufx.c #define A_OP(icode, ptr, op, r, a, x, y) \ x 491 sound/pci/emu10k1/emufx.c snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y) x 129 sound/pci/ens1370.c #define ES_REG(ensoniq, x) ((ensoniq)->port + ES_REG_##x) x 353 sound/pci/ens1370.c #define ES_1370_SRTODIV(x) (ES_1370_SRCLOCK/(x)-2) x 604 sound/pci/ens1370.c unsigned int t, x, flag; x 611 sound/pci/ens1370.c x = snd_es1371_wait_src_ready(ensoniq); x 612 sound/pci/ens1370.c outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | x 632 sound/pci/ens1370.c outl(x, ES_REG(ensoniq, 1371_SMPRATE)); x 646 sound/pci/ens1370.c unsigned int t, x, flag, fail = 0; x 654 sound/pci/ens1370.c x = snd_es1371_wait_src_ready(ensoniq); x 655 sound/pci/ens1370.c outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | x 675 sound/pci/ens1370.c outl(x, ES_REG(ensoniq, 1371_SMPRATE)); x 683 sound/pci/ens1370.c if ((x = inl(ES_REG(ensoniq, 1371_CODEC))) & ES_1371_CODEC_RDY) { x 687 sound/pci/ens1370.c x = inl(ES_REG(ensoniq, 1371_CODEC)); x 690 sound/pci/ens1370.c return ES_1371_CODEC_READ(x); x 75 sound/pci/es1938.c #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x) x 77 sound/pci/es1938.c #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x) x 79 sound/pci/es1938.c #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x) x 1882 sound/pci/es1968.c int x, val; x 1887 sound/pci/es1968.c x = inb(chip->io_port + 0x1c) & 0xee; x 1902 sound/pci/es1968.c switch (x) { x 1930 sound/pci/es1968.c switch (x) { x 133 sound/pci/fm801.c #define FM801_GPIO_GP(x) (1<<(0+(x))) x 138 sound/pci/fm801.c #define FM801_GPIO_GD(x) (1<<(8+(x))) x 143 sound/pci/fm801.c #define FM801_GPIO_GS(x) (1<<(12+(x))) x 39 sound/pci/ice1712/envy24ht.h #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x) x 117 sound/pci/ice1712/envy24ht.h #define ICEMT1724(ice, x) ((ice)->profi_port + VT1724_MT_##x) x 30 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_0_BOX(r, x) r[0] = ((r[0] & ~3) | ((x)&3)) x 31 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_0_DAREAR(r, x) r[0] = ((r[0] & ~4) | (((x)&1)<<2)) x 32 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_1_CHN1(r, x) r[1] = ((r[1] & ~1) | ((x)&1)) x 33 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_1_CHN2(r, x) r[1] = ((r[1] & ~2) | (((x)&1)<<1)) x 34 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_1_CHN3(r, x) r[1] = ((r[1] & ~4) | (((x)&1)<<2)) x 35 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_2_CHN4(r, x) r[2] = ((r[2] & ~1) | ((x)&1)) x 36 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_2_MIDIIN(r, x) r[2] = ((r[2] & ~2) | (((x)&1)<<1)) x 37 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_2_MIDI1(r, x) r[2] = ((r[2] & ~4) | (((x)&1)<<2)) x 38 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_3_MIDI2(r, x) r[3] = ((r[3] & ~1) | ((x)&1)) x 39 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_3_MUTE(r, x) r[3] = ((r[3] & ~2) | (((x)&1)<<1)) x 40 sound/pci/ice1712/hoontech.h #define ICE1712_STDSP24_3_INSEL(r, x) r[3] = ((r[3] & ~4) | (((x)&1)<<2)) x 27 sound/pci/ice1712/ice1712.h #define ICEREG(ice, x) ((ice)->port + ICE1712_REG_##x) x 104 sound/pci/ice1712/ice1712.h #define ICEDS(ice, x) ((ice)->dmapath_port + ICE1712_DS_##x) x 135 sound/pci/ice1712/ice1712.h #define ICEMT(ice, x) ((ice)->profi_port + ICE1712_MT_##x) x 94 sound/pci/intel8x0.c #define ICHREG(x) ICH_REG_##x x 64 sound/pci/intel8x0m.c #define ICHREG(x) ICH_REG_##x x 133 sound/pci/lola/lola.h #define LOLA_BAR1_PEAKMETERS_AGC(x) \ x 134 sound/pci/lola/lola.h (LOLA_BAR1_PEAKMETERS_AGC00_01 + (x) * 2) x 1155 sound/pci/maestro3.c #define LO(x) ((x) & 0xffff) x 1156 sound/pci/maestro3.c #define HI(x) LO((x) >> 16) x 1531 sound/pci/maestro3.c int x, val; x 1536 sound/pci/maestro3.c x = inb(chip->iobase + SHADOW_MIX_REG_VOICE) & 0xee; x 1562 sound/pci/maestro3.c switch (x) { x 1592 sound/pci/maestro3.c switch (x) { x 16 sound/pci/mixart/mixart_hwdep.h #define readl_be(x) be32_to_cpu((__force __be32)__raw_readl(x)) x 24 sound/pci/mixart/mixart_hwdep.h #define readl_le(x) le32_to_cpu((__force __le32)__raw_readl(x)) x 31 sound/pci/mixart/mixart_hwdep.h #define MIXART_MEM(mgr,x) ((mgr)->mem[0].virt + (x)) x 32 sound/pci/mixart/mixart_hwdep.h #define MIXART_REG(mgr,x) ((mgr)->mem[1].virt + (x)) x 178 sound/pci/pcxhr/pcxhr.c #define PCXHR_BOARD_HAS_AES1(x) (x->fw_file_set != 4) x 180 sound/pci/pcxhr/pcxhr.c #define PCXHR_BOARD_AESIN_NO_192K(x) ((x->capture_chips == 0) || \ x 181 sound/pci/pcxhr/pcxhr.c (x->fw_file_set == 0) || \ x 182 sound/pci/pcxhr/pcxhr.c (x->fw_file_set == 2)) x 55 sound/pci/pcxhr/pcxhr_core.c #undef PCXHR_REG_TO_PORT(x) x 57 sound/pci/pcxhr/pcxhr_core.c #define PCXHR_REG_TO_PORT(x) ((x)>PCXHR_DSP_OFFSET_MAX ? PCXHR_PLX : PCXHR_DSP) x 59 sound/pci/pcxhr/pcxhr_core.c #define PCXHR_INPB(mgr,x) inb((mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) x 60 sound/pci/pcxhr/pcxhr_core.c #define PCXHR_INPL(mgr,x) inl((mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) x 61 sound/pci/pcxhr/pcxhr_core.c #define PCXHR_OUTPB(mgr,x,data) outb((data), (mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) x 62 sound/pci/pcxhr/pcxhr_core.c #define PCXHR_OUTPL(mgr,x,data) outl((data), (mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) x 88 sound/pci/pcxhr/pcxhr_core.h #define DSP_EXT_CMD_SET(x) (x->dsp_version > 0x012800) x 36 sound/pci/pcxhr/pcxhr_mix22.c #define PCXHR_INPB(mgr, x) inb((mgr)->port[PCXHR_DSP] + (x)) x 37 sound/pci/pcxhr/pcxhr_mix22.c #define PCXHR_OUTPB(mgr, x, data) outb((data), (mgr)->port[PCXHR_DSP] + (x)) x 167 sound/pci/riptide/riptide.c #define WRITE_PORT_ULONG(p,x) outl(x,(unsigned long)&(p)) x 170 sound/pci/riptide/riptide.c #define WRITE_AUDIO_CONTROL(p,x) WRITE_PORT_ULONG(p->audio_control,x) x 171 sound/pci/riptide/riptide.c #define UMASK_AUDIO_CONTROL(p,x) WRITE_PORT_ULONG(p->audio_control,READ_PORT_ULONG(p->audio_control)|x) x 172 sound/pci/riptide/riptide.c #define MASK_AUDIO_CONTROL(p,x) WRITE_PORT_ULONG(p->audio_control,READ_PORT_ULONG(p->audio_control)&x) x 297 sound/pci/rme9652/hdsp.c #define hdsp_encode_latency(x) (((x)<<1) & HDSP_LatencyMask) x 298 sound/pci/rme9652/hdsp.c #define hdsp_decode_latency(x) (((x) & HDSP_LatencyMask)>>1) x 300 sound/pci/rme9652/hdsp.c #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14) x 301 sound/pci/rme9652/hdsp.c #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3) x 3329 sound/pci/rme9652/hdsp.c int x; x 3381 sound/pci/rme9652/hdsp.c x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask)); x 3383 sound/pci/rme9652/hdsp.c snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes); x 3585 sound/pci/rme9652/hdsp.c x = hdsp_spdif_sample_rate(hdsp); x 3586 sound/pci/rme9652/hdsp.c if (x != 0) x 3587 sound/pci/rme9652/hdsp.c snd_iprintf(buffer, "IEC958 sample rate: %d\n", x); x 3594 sound/pci/rme9652/hdsp.c x = status & HDSP_Sync0; x 3596 sound/pci/rme9652/hdsp.c snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); x 3603 sound/pci/rme9652/hdsp.c x = status & HDSP_Sync1; x 3605 sound/pci/rme9652/hdsp.c snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); x 3608 sound/pci/rme9652/hdsp.c x = status & HDSP_Sync2; x 3610 sound/pci/rme9652/hdsp.c snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); x 3619 sound/pci/rme9652/hdsp.c x = status & HDSP_SPDIFSync; x 3623 sound/pci/rme9652/hdsp.c snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock"); x 3625 sound/pci/rme9652/hdsp.c x = status2 & HDSP_wc_sync; x 3627 sound/pci/rme9652/hdsp.c snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock"); x 3631 sound/pci/rme9652/hdsp.c x = status & HDSP_TimecodeSync; x 3633 sound/pci/rme9652/hdsp.c snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock"); x 412 sound/pci/rme9652/hdspm.c #define hdspm_encode_latency(x) (((x)<<1) & HDSPM_LatencyMask) x 413 sound/pci/rme9652/hdspm.c #define hdspm_decode_latency(x) ((((x) & HDSPM_LatencyMask)>>1)) x 415 sound/pci/rme9652/hdspm.c #define hdspm_encode_in(x) (((x)&0x3)<<14) x 416 sound/pci/rme9652/hdspm.c #define hdspm_decode_in(x) (((x)>>14)&0x3) x 4869 sound/pci/rme9652/hdspm.c int x, x2; x 4926 sound/pci/rme9652/hdspm.c x = hdspm_get_latency(hdspm); x 4930 sound/pci/rme9652/hdspm.c x, (unsigned long) hdspm->period_bytes); x 4975 sound/pci/rme9652/hdspm.c x = status & HDSPM_madiSync; x 4979 sound/pci/rme9652/hdspm.c (status & HDSPM_madiLock) ? (x ? "Sync" : "Lock") : x 5032 sound/pci/rme9652/hdspm.c int x; x 5082 sound/pci/rme9652/hdspm.c x = hdspm_get_latency(hdspm); x 5086 sound/pci/rme9652/hdspm.c x, (unsigned long) hdspm->period_bytes); x 5130 sound/pci/rme9652/hdspm.c for (x = 0; x < 8; x++) { x 5132 sound/pci/rme9652/hdspm.c x+1, x 5133 sound/pci/rme9652/hdspm.c (status2 & (HDSPM_LockAES >> x)) ? x 5135 sound/pci/rme9652/hdspm.c HDSPM_bit2freq((timecode >> (4*x)) & 0xF)); x 96 sound/pci/rme9652/rme9652.c #define rme9652_decode_spdif_rate(x) ((x)>>22) x 106 sound/pci/rme9652/rme9652.c #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) x 158 sound/pci/rme9652/rme9652.c #define rme9652_encode_latency(x) (((x)&0x7)<<1) x 159 sound/pci/rme9652/rme9652.c #define rme9652_decode_latency(x) (((x)>>1)&0x7) x 162 sound/pci/rme9652/rme9652.c #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) x 163 sound/pci/rme9652/rme9652.c #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) x 716 sound/pci/rme9652/rme9652.c int x, y, ret; x 718 sound/pci/rme9652/rme9652.c x = rme9652_spdif_read_codec (s, 30); x 720 sound/pci/rme9652/rme9652.c if (x != 0) x 721 sound/pci/rme9652/rme9652.c y = 48000 * 64 / x; x 1559 sound/pci/rme9652/rme9652.c int x; x 1572 sound/pci/rme9652/rme9652.c x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & x 1576 sound/pci/rme9652/rme9652.c x, (unsigned long) rme9652->period_bytes); x 1679 sound/pci/rme9652/rme9652.c x = status & RME9652_sync_0; x 1681 sound/pci/rme9652/rme9652.c snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); x 1686 sound/pci/rme9652/rme9652.c x = status & RME9652_sync_1; x 1688 sound/pci/rme9652/rme9652.c snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); x 1693 sound/pci/rme9652/rme9652.c x = status & RME9652_sync_2; x 1695 sound/pci/rme9652/rme9652.c snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); x 62 sound/pci/sonicvibes.c #define SV_REG(sonic, x) ((sonic)->enh_port + SV_REG_##x) x 36 sound/pci/trident/trident.h #define TRID_REG(trident, x) ((trident)->port + (x)) x 124 sound/pci/via82xx.c #define VIAREG(via, x) ((via)->port + VIA_REG_##x) x 125 sound/pci/via82xx.c #define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x) x 63 sound/pci/via82xx_modem.c #define VIAREG(via, x) ((via)->port + VIA_REG_##x) x 64 sound/pci/via82xx_modem.c #define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x) x 29 sound/pci/vx222/vx222.h #define to_vx222(x) container_of(x, struct snd_vx222, core) x 45 sound/pcmcia/pdaudiocf/pdaudiocf.h #define PDAUDIOCF_FPGAREV(x) ((x>>12)&0x0f) /* FPGA revision */ x 33 sound/pcmcia/vx/vxpocket.h #define to_vxpocket(x) container_of(x, struct snd_vxpocket, core) x 88 sound/ppc/awacs.h #define GAINRIGHT(x) ((x) & MASK_GAINRIGHT) x 89 sound/ppc/awacs.h #define GAINLEFT(x) (((x) << 4) & MASK_GAINLEFT) x 130 sound/ppc/awacs.h #define VOLRIGHT(x) (((~(x)) & MASK_OUTVOLRIGHT)) x 131 sound/ppc/awacs.h #define VOLLEFT(x) (((~(x)) << 6) & MASK_OUTVOLLEFT) x 21 sound/ppc/snd_ps3_reg.h #define PS3_AUDIO_DMAC_REGBASE(x) (0x0000210 + 0x20 * (x)) x 57 sound/ppc/snd_ps3_reg.h #define PS3_AUDIO_AO_SPDUB(n, x) \ x 58 sound/ppc/snd_ps3_reg.h (PS3_AUDIO_AO_SPD_REGBASE(n) + 0x04 + 0x04 * (x)) x 327 sound/soc/atmel/atmel-pcm-pdc.c snd_pcm_uframes_t x; x 330 sound/soc/atmel/atmel-pcm-pdc.c x = bytes_to_frames(runtime, ptr - prtd->dma_buffer); x 332 sound/soc/atmel/atmel-pcm-pdc.c if (x == runtime->buffer_size) x 333 sound/soc/atmel/atmel-pcm-pdc.c x = 0; x 335 sound/soc/atmel/atmel-pcm-pdc.c return x; x 34 sound/soc/au1x/ac97c.c #define CFG_RC(x) (((x) & 0x3ff) << 13) /* valid rx slots mask */ x 35 sound/soc/au1x/ac97c.c #define CFG_XS(x) (((x) & 0x3ff) << 3) /* valid tx slots mask */ x 49 sound/soc/au1x/ac97c.c #define CMD_SET_DATA(x) (((x) & 0xffff) << 16) x 50 sound/soc/au1x/ac97c.c #define CMD_GET_DATA(x) ((x) & 0xffff) x 53 sound/soc/au1x/ac97c.c #define CMD_IDX(x) ((x) & 0x7f) x 70 sound/soc/au1x/ac97c.c #define ac97_to_ctx(x) ac97c_workdata x 33 sound/soc/au1x/dbdma2.c #define MSG(x...) printk(KERN_INFO "au1xpsc_pcm: " x) x 37 sound/soc/au1x/dbdma2.c #define DBG(x...) do {} while (0) x 58 sound/soc/au1x/psc-ac97.c static inline struct au1xpsc_audio_data *ac97_to_pscdata(struct snd_ac97 *x) x 60 sound/soc/au1x/psc-ac97.c struct snd_soc_card *c = x->bus->card->private_data; x 66 sound/soc/au1x/psc-ac97.c #define ac97_to_pscdata(x) au1xpsc_ac97_workdata x 26 sound/soc/au1x/psc.h #define PSC_CTRL(x) ((x)->mmio + PSC_CTRL_OFFSET) x 27 sound/soc/au1x/psc.h #define PSC_SEL(x) ((x)->mmio + PSC_SEL_OFFSET) x 28 sound/soc/au1x/psc.h #define I2S_STAT(x) ((x)->mmio + PSC_I2SSTAT_OFFSET) x 29 sound/soc/au1x/psc.h #define I2S_CFG(x) ((x)->mmio + PSC_I2SCFG_OFFSET) x 30 sound/soc/au1x/psc.h #define I2S_PCR(x) ((x)->mmio + PSC_I2SPCR_OFFSET) x 31 sound/soc/au1x/psc.h #define AC97_CFG(x) ((x)->mmio + PSC_AC97CFG_OFFSET) x 32 sound/soc/au1x/psc.h #define AC97_CDC(x) ((x)->mmio + PSC_AC97CDC_OFFSET) x 33 sound/soc/au1x/psc.h #define AC97_EVNT(x) ((x)->mmio + PSC_AC97EVNT_OFFSET) x 34 sound/soc/au1x/psc.h #define AC97_PCR(x) ((x)->mmio + PSC_AC97PCR_OFFSET) x 35 sound/soc/au1x/psc.h #define AC97_RST(x) ((x)->mmio + PSC_AC97RST_OFFSET) x 36 sound/soc/au1x/psc.h #define AC97_STAT(x) ((x)->mmio + PSC_AC97STAT_OFFSET) x 45 sound/soc/codecs/ad1836.c #define AD1836_DAC_VOLUME(x) \ x 46 sound/soc/codecs/ad1836.c SOC_DOUBLE_R("DAC" #x " Playback Volume", AD1836_DAC_L_VOL(x), \ x 47 sound/soc/codecs/ad1836.c AD1836_DAC_R_VOL(x), 0, 0x3FF, 0) x 49 sound/soc/codecs/ad1836.c #define AD1836_DAC_SWITCH(x) \ x 50 sound/soc/codecs/ad1836.c SOC_DOUBLE("DAC" #x " Playback Switch", AD1836_DAC_CTRL2, \ x 51 sound/soc/codecs/ad1836.c AD1836_MUTE_LEFT(x), AD1836_MUTE_RIGHT(x), 1, 1) x 53 sound/soc/codecs/ad1836.c #define AD1836_ADC_SWITCH(x) \ x 54 sound/soc/codecs/ad1836.c SOC_DOUBLE("ADC" #x " Capture Switch", AD1836_ADC_CTRL2, \ x 55 sound/soc/codecs/ad1836.c AD1836_MUTE_LEFT(x), AD1836_MUTE_RIGHT(x), 1, 1) x 24 sound/soc/codecs/ad1836.h #define AD1836_MUTE_LEFT(x) (((x) * 2) - 2) x 25 sound/soc/codecs/ad1836.h #define AD1836_MUTE_RIGHT(x) (((x) * 2) - 1) x 27 sound/soc/codecs/ad1836.h #define AD1836_DAC_L_VOL(x) ((x) * 2) x 28 sound/soc/codecs/ad1836.h #define AD1836_DAC_R_VOL(x) (1 + ((x) * 2)) x 32 sound/soc/codecs/ad73311.h #define REGA_DEVC(x) ((x & 0x7) << 4) x 38 sound/soc/codecs/ad73311.h #define REGB_DIRATE(x) (x & 0x3) x 39 sound/soc/codecs/ad73311.h #define REGB_SCDIV(x) ((x & 0x3) << 2) x 40 sound/soc/codecs/ad73311.h #define REGB_MCDIV(x) ((x & 0x7) << 4) x 55 sound/soc/codecs/ad73311.h #define REGD_IGS(x) (x & 0x7) x 57 sound/soc/codecs/ad73311.h #define REGD_OGS(x) ((x & 0x7) << 4) x 63 sound/soc/codecs/ad73311.h #define REGE_DA(x) (x & 0x1f) x 40 sound/soc/codecs/adau1373.c #define ADAU1373_AINL_CTRL(x) (0x01 + (x) * 2) x 41 sound/soc/codecs/adau1373.c #define ADAU1373_AINR_CTRL(x) (0x02 + (x) * 2) x 42 sound/soc/codecs/adau1373.c #define ADAU1373_LLINE_OUT(x) (0x9 + (x) * 2) x 43 sound/soc/codecs/adau1373.c #define ADAU1373_RLINE_OUT(x) (0xa + (x) * 2) x 70 sound/soc/codecs/adau1373.c #define ADAU1373_DPLL_CTRL(x) (0x28 + (x) * 7) x 71 sound/soc/codecs/adau1373.c #define ADAU1373_PLL_CTRL1(x) (0x29 + (x) * 7) x 72 sound/soc/codecs/adau1373.c #define ADAU1373_PLL_CTRL2(x) (0x2a + (x) * 7) x 73 sound/soc/codecs/adau1373.c #define ADAU1373_PLL_CTRL3(x) (0x2b + (x) * 7) x 74 sound/soc/codecs/adau1373.c #define ADAU1373_PLL_CTRL4(x) (0x2c + (x) * 7) x 75 sound/soc/codecs/adau1373.c #define ADAU1373_PLL_CTRL5(x) (0x2d + (x) * 7) x 76 sound/soc/codecs/adau1373.c #define ADAU1373_PLL_CTRL6(x) (0x2e + (x) * 7) x 80 sound/soc/codecs/adau1373.c #define ADAU1373_DAI(x) (0x44 + (x)) x 81 sound/soc/codecs/adau1373.c #define ADAU1373_CLK_SRC_DIV(x) (0x40 + (x) * 2) x 82 sound/soc/codecs/adau1373.c #define ADAU1373_BCLKDIV(x) (0x47 + (x)) x 83 sound/soc/codecs/adau1373.c #define ADAU1373_SRC_RATIOA(x) (0x4a + (x) * 2) x 84 sound/soc/codecs/adau1373.c #define ADAU1373_SRC_RATIOB(x) (0x4b + (x) * 2) x 86 sound/soc/codecs/adau1373.c #define ADAU1373_SRC_DAI_CTRL(x) (0x51 + (x)) x 87 sound/soc/codecs/adau1373.c #define ADAU1373_DIN_MIX_CTRL(x) (0x56 + (x)) x 88 sound/soc/codecs/adau1373.c #define ADAU1373_DOUT_MIX_CTRL(x) (0x5b + (x)) x 89 sound/soc/codecs/adau1373.c #define ADAU1373_DAI_PBL_VOL(x) (0x62 + (x) * 2) x 90 sound/soc/codecs/adau1373.c #define ADAU1373_DAI_PBR_VOL(x) (0x63 + (x) * 2) x 91 sound/soc/codecs/adau1373.c #define ADAU1373_DAI_RECL_VOL(x) (0x68 + (x) * 2) x 92 sound/soc/codecs/adau1373.c #define ADAU1373_DAI_RECR_VOL(x) (0x69 + (x) * 2) x 107 sound/soc/codecs/adau1373.c #define ADAU1373_DRC(x) (0x80 + (x) * 0x10) x 123 sound/soc/codecs/adau17x1.h #define ADAU17X1_CONVERTER0_DAC_PAIR(x) (((x) - 1) << 5) x 125 sound/soc/codecs/adau17x1.h #define ADAU17X1_CONVERTER1_ADC_PAIR(x) ((x) - 1) x 39 sound/soc/codecs/adau1977.c #define ADAU1977_REG_POST_ADC_GAIN(x) (0x0a + (x)) x 42 sound/soc/codecs/adau1977.c #define ADAU1977_REG_STATUS(x) (0x11 + (x)) x 97 sound/soc/codecs/adau1977.c #define ADAU1977_SAI_OVERTEMP_DRV_C(x) BIT(4 + (x)) x 194 sound/soc/codecs/adau1977.c #define ADAU1977_VOLUME(x) \ x 195 sound/soc/codecs/adau1977.c SOC_SINGLE_TLV("ADC" #x " Capture Volume", \ x 196 sound/soc/codecs/adau1977.c ADAU1977_REG_POST_ADC_GAIN((x) - 1), \ x 199 sound/soc/codecs/adau1977.c #define ADAU1977_HPF_SWITCH(x) \ x 200 sound/soc/codecs/adau1977.c SOC_SINGLE("ADC" #x " Highpass-Filter Capture Switch", \ x 201 sound/soc/codecs/adau1977.c ADAU1977_REG_DC_HPF_CAL, (x) - 1, 1, 0) x 203 sound/soc/codecs/adau1977.c #define ADAU1977_DC_SUB_SWITCH(x) \ x 204 sound/soc/codecs/adau1977.c SOC_SINGLE("ADC" #x " DC Subtraction Capture Switch", \ x 205 sound/soc/codecs/adau1977.c ADAU1977_REG_DC_HPF_CAL, (x) + 3, 1, 0) x 59 sound/soc/codecs/adav80x.c #define ADAV80X_PLL_CTRL2_FIELD(pll, x) ((x) << ((pll) * 4)) x 113 sound/soc/codecs/adav80x.c #define ADAV80X_PLL_OUTE_SYSCLKPD(x) BIT(2 - (x)) x 24 sound/soc/codecs/ak4104.c #define AK4104_REG_CHN_STATUS(x) ((x) + 0x04) x 40 sound/soc/codecs/cs42l51.h #define CS42L51_MIC_POWER_CTL_SPEED(x) (((x)&3)<<5) x 54 sound/soc/codecs/cs42l51.h #define CS42L51_INTF_CTL_DAC_FORMAT(x) (((x)&7)<<3) x 70 sound/soc/codecs/cs42l51.h #define CS42L51_MIC_CTL_MICBIAS_LVL(x) (((x)&3)<<2) x 85 sound/soc/codecs/cs42l51.h #define CS42L51_ADC_INPUT_AINB_MUX(x) (((x)&3)<<6) x 86 sound/soc/codecs/cs42l51.h #define CS42L51_ADC_INPUT_AINA_MUX(x) (((x)&3)<<4) x 93 sound/soc/codecs/cs42l51.h #define CS42L51_DAC_OUT_CTL_HP_GAIN(x) (((x)&7)<<5) x 101 sound/soc/codecs/cs42l51.h #define CS42L51_DAC_CTL_DATA_SEL(x) (((x)&3)<<6) x 105 sound/soc/codecs/cs42l51.h #define CS42L51_DAC_CTL_DACSZ(x) (((x)&3)<<0) x 111 sound/soc/codecs/cs42l51.h #define CS42L51_ALC_PGX_PGX_VOL(x) (((x)&0x1f)<<0) x 121 sound/soc/codecs/cs42l51.h #define CS42L51_MIX_VOLUME(x) (((x)&0x7f)<<0) x 128 sound/soc/codecs/cs42l51.h #define CS42L51_TONE_CTL_TREB(x) (((x)&0xf)<<4) x 129 sound/soc/codecs/cs42l51.h #define CS42L51_TONE_CTL_BASS(x) (((x)&0xf)<<0) x 101 sound/soc/codecs/cs42xx8.h #define CS42XX8_FUNCMOD_xC_FM_MASK(x) ((x) ? CS42XX8_FUNCMOD_DAC_FM_MASK : CS42XX8_FUNCMOD_ADC_FM_MASK) x 102 sound/soc/codecs/cs42xx8.h #define CS42XX8_FUNCMOD_xC_FM(x, v) ((x) ? CS42XX8_FUNCMOD_DAC_FM(v) : CS42XX8_FUNCMOD_ADC_FM(v)) x 58 sound/soc/codecs/cs4349.h #define MODE_FORMAT(x) (((x)&7)<<4) x 66 sound/soc/codecs/cs53l30.h #define CS53L30_ASP_TDMTX_CTL(x) (CS53L30_ASP_TDMTX_CTL1 + (x)) x 68 sound/soc/codecs/cs53l30.h #define CS53L30_ASP_TDMTX_ENx(x) (CS53L30_ASP_TDMTX_EN6 - (x)) x 200 sound/soc/codecs/cs53l30.h #define CS53L30_ASP_CHx_TX_LOC(x) ((x) << CS53L30_ASP_CHx_TX_LOC_SHIFT) x 221 sound/soc/codecs/cs53l30.h #define CS53L30_LRCK_TPWH(x) (((x) << CS53L30_LRCK_TPWH_SHIFT) & CS53L30_LRCK_TPWH_MASK) x 245 sound/soc/codecs/cs53l30.h #define CS53L30_MUTE_MxB_PDN_SHIFT(x) (CS53L30_MUTE_M1B_PDN_SHIFT + (x)) x 246 sound/soc/codecs/cs53l30.h #define CS53L30_MUTE_MxB_PDN_MASK(x) (1 << CS53L30_MUTE_MxB_PDN_SHIFT(x)) x 247 sound/soc/codecs/cs53l30.h #define CS53L30_MUTE_MxB_PDN(x) (1 << CS53L30_MUTE_MxB_PDN_SHIFT(x)) x 269 sound/soc/codecs/cs53l30.h #define CS53L30_MUTE_ASP_SDOUTx_PDN_SHIFT(x) ((x) + CS53L30_MUTE_ASP_SDOUT1_PDN_SHIFT) x 270 sound/soc/codecs/cs53l30.h #define CS53L30_MUTE_ASP_SDOUTx_PDN_MASK(x) (1 << CS53L30_MUTE_ASP_SDOUTx_PDN_SHIFT(x)) x 271 sound/soc/codecs/cs53l30.h #define CS53L30_MUTE_ASP_SDOUTx_PDN (1 << CS53L30_MUTE_ASP_SDOUTx_PDN_SHIFT(x)) x 320 sound/soc/codecs/max98373.c int x, slot_found; x 364 sound/soc/codecs/max98373.c for (x = 0 ; x < 16 ; x++, mask >>= 1) { x 369 sound/soc/codecs/max98373.c MAX98373_PCM_TO_SPK_CH0_SRC_MASK, x); x 373 sound/soc/codecs/max98373.c x); x 41 sound/soc/codecs/mc13783.c #define SSI_NETWORK_CDCTXRXSLOT(x) (((x) & 0x3) << 2) x 42 sound/soc/codecs/mc13783.c #define SSI_NETWORK_CDCTXSECSLOT(x) (((x) & 0x3) << 4) x 43 sound/soc/codecs/mc13783.c #define SSI_NETWORK_CDCRXSECSLOT(x) (((x) & 0x3) << 6) x 44 sound/soc/codecs/mc13783.c #define SSI_NETWORK_CDCRXSECGAIN(x) (((x) & 0x3) << 8) x 45 sound/soc/codecs/mc13783.c #define SSI_NETWORK_CDCSUMGAIN(x) (1 << 10) x 46 sound/soc/codecs/mc13783.c #define SSI_NETWORK_CDCFSDLY(x) (1 << 11) x 56 sound/soc/codecs/mc13783.c #define SSI_NETWORK_STDCRXSECSLOT(x) (((x) & 0x3) << 16) x 57 sound/soc/codecs/mc13783.c #define SSI_NETWORK_STDCRXSECGAIN(x) (((x) & 0x3) << 18) x 69 sound/soc/codecs/mc13783.c #define AUDIO_CFS(x) (((x) & 0x3) << 5) x 70 sound/soc/codecs/mc13783.c #define AUDIO_CLK(x) (((x) & 0x7) << 7) x 327 sound/soc/codecs/rt5514-spi.c struct spi_transfer x[3]; x 342 sound/soc/codecs/rt5514-spi.c memset(x, 0, sizeof(x)); x 344 sound/soc/codecs/rt5514-spi.c x[0].len = 5; x 345 sound/soc/codecs/rt5514-spi.c x[0].tx_buf = write_buf; x 346 sound/soc/codecs/rt5514-spi.c spi_message_add_tail(&x[0], &message); x 348 sound/soc/codecs/rt5514-spi.c x[1].len = 4; x 349 sound/soc/codecs/rt5514-spi.c x[1].tx_buf = write_buf; x 350 sound/soc/codecs/rt5514-spi.c spi_message_add_tail(&x[1], &message); x 352 sound/soc/codecs/rt5514-spi.c x[2].len = end; x 353 sound/soc/codecs/rt5514-spi.c x[2].rx_buf = rxbuf + offset; x 354 sound/soc/codecs/rt5514-spi.c spi_message_add_tail(&x[2], &message); x 79 sound/soc/codecs/sirf-audio-codec.h #define TX_FIFO_SC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ x 81 sound/soc/codecs/sirf-audio-codec.h #define TX_FIFO_LC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ x 83 sound/soc/codecs/sirf-audio-codec.h #define TX_FIFO_HC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ x 91 sound/soc/codecs/sirf-audio-codec.h #define RX_FIFO_SC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ x 93 sound/soc/codecs/sirf-audio-codec.h #define RX_FIFO_LC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ x 95 sound/soc/codecs/sirf-audio-codec.h #define RX_FIFO_HC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ x 86 sound/soc/codecs/ssm4567.c #define SSM4567_SAI_CTRL_2_TDM_SLOT(x) (x) x 106 sound/soc/codecs/tas2552.h #define TAS2552_L_DATA_OUT(x) ((x) << 0) x 107 sound/soc/codecs/tas2552.h #define TAS2552_R_DATA_OUT(x) ((x) << 3) x 134 sound/soc/codecs/tas2552.h #define TAS2552_PLL_D_UPPER(x) (((x) >> 8) & 0x3f) x 135 sound/soc/codecs/tas2552.h #define TAS2552_PLL_D_LOWER(x) ((x) & 0xff) x 219 sound/soc/codecs/tlv320aic23.c #define A(x) (SR_MULT/x) x 45 sound/soc/codecs/tlv320aic23.h #define TLV320AIC23_STA_REG(x) ((x)<<6) x 103 sound/soc/codecs/tlv320dac33.h #define DAC33_ADJSTEP(x) (x << 0) x 104 sound/soc/codecs/tlv320dac33.h #define DAC33_ADJTHRSHLD(x) (x << 4) x 107 sound/soc/codecs/tlv320dac33.h #define DAC33_REFDIV(x) (x << 4) x 136 sound/soc/codecs/tlv320dac33.h #define DAC33_DATA_DELAY(x) (x << 2) x 149 sound/soc/codecs/tlv320dac33.h #define DAC33_THRREG(x) (((x) & 0x1FFF) << 3) x 167 sound/soc/codecs/tlv320dac33.h #define DAC33_UTM(x) (x << 0) x 168 sound/soc/codecs/tlv320dac33.h #define DAC33_UFM(x) (x << 2) x 169 sound/soc/codecs/tlv320dac33.h #define DAC33_OFM(x) (x << 4) x 172 sound/soc/codecs/tlv320dac33.h #define DAC33_NSM(x) (x << 0) x 173 sound/soc/codecs/tlv320dac33.h #define DAC33_PSM(x) (x << 2) x 174 sound/soc/codecs/tlv320dac33.h #define DAC33_ATM(x) (x << 4) x 175 sound/soc/codecs/tlv320dac33.h #define DAC33_LTM(x) (x << 6) x 178 sound/soc/codecs/tlv320dac33.h #define DAC33_DACRATE(x) (x << 0) x 223 sound/soc/codecs/tlv320dac33.h #define DAC33_SRCLKDIV(x) (x << 3) x 226 sound/soc/codecs/tlv320dac33.h #define DAC33_SRCSETUP(x) (x << 0) x 228 sound/soc/codecs/tlv320dac33.h #define DAC33_SRCREFDIV(x) (x << 5) x 240 sound/soc/codecs/tlv320dac33.h #define DAC33_LROUT_GAIN(x) (x << 0) x 24 sound/soc/codecs/tpa6130a2.h #define TPA6130A2_MODE(x) (x << 4) x 35 sound/soc/codecs/tpa6130a2.h #define TPA6130A2_VOLUME(x) ((x & 0x3f) << 0) x 20 sound/soc/codecs/twl6040.h #define TWL6040_HSF_TRIM_LEFT(x) (x & 0x0f) x 21 sound/soc/codecs/twl6040.h #define TWL6040_HSF_TRIM_RIGHT(x) ((x >> 4) & 0x0f) x 23 sound/soc/codecs/wm9713.h #define WM9713_PCMDIV(x) ((x - 1) << 8) x 26 sound/soc/codecs/wm9713.h #define WM9713_HIFIDIV(x) ((x - 1) << 12) x 35 sound/soc/dwc/local.h #define LRBR_LTHR(x) (0x40 * x + 0x020) x 36 sound/soc/dwc/local.h #define RRBR_RTHR(x) (0x40 * x + 0x024) x 37 sound/soc/dwc/local.h #define RER(x) (0x40 * x + 0x028) x 38 sound/soc/dwc/local.h #define TER(x) (0x40 * x + 0x02C) x 39 sound/soc/dwc/local.h #define RCR(x) (0x40 * x + 0x030) x 40 sound/soc/dwc/local.h #define TCR(x) (0x40 * x + 0x034) x 41 sound/soc/dwc/local.h #define ISR(x) (0x40 * x + 0x038) x 42 sound/soc/dwc/local.h #define IMR(x) (0x40 * x + 0x03C) x 43 sound/soc/dwc/local.h #define ROR(x) (0x40 * x + 0x040) x 44 sound/soc/dwc/local.h #define TOR(x) (0x40 * x + 0x044) x 45 sound/soc/dwc/local.h #define RFCR(x) (0x40 * x + 0x048) x 46 sound/soc/dwc/local.h #define TFCR(x) (0x40 * x + 0x04C) x 47 sound/soc/dwc/local.h #define RFF(x) (0x40 * x + 0x050) x 48 sound/soc/dwc/local.h #define TFF(x) (0x40 * x + 0x054) x 57 sound/soc/fsl/fsl_asrc.h #define REG_ASRDx(x, i) ((x) == IN ? REG_ASRDI(i) : REG_ASRDO(i)) x 38 sound/soc/fsl/fsl_dma.h #define CCSR_DMA_MR_BWC(x) \ x 39 sound/soc/fsl/fsl_dma.h ((ilog2(x) << CCSR_DMA_MR_BWC_SHIFT) & CCSR_DMA_MR_BWC_MASK) x 75 sound/soc/fsl/fsl_dma.h static inline u32 CCSR_DMA_ECLNDAR_ADDR(u64 x) x 77 sound/soc/fsl/fsl_dma.h return (x >> 32) & 0xf; x 80 sound/soc/fsl/fsl_dma.h #define CCSR_DMA_CLNDAR_ADDR(x) ((x) & 0xFFFFFFFE) x 130 sound/soc/fsl/fsl_esai.h #define ESAI_xFCR_TE(x) ((ESAI_xFCR_TE_MASK >> (ESAI_xFCR_TE_WIDTH - x)) & ESAI_xFCR_TE_MASK) x 131 sound/soc/fsl/fsl_esai.h #define ESAI_xFCR_RE(x) ((ESAI_xFCR_RE_MASK >> (ESAI_xFCR_RE_WIDTH - x)) & ESAI_xFCR_RE_MASK) x 272 sound/soc/fsl/fsl_esai.h #define ESAI_xCR_TE(x) ((ESAI_xCR_TE_MASK >> (ESAI_xCR_TE_WIDTH - x)) & ESAI_xCR_TE_MASK) x 273 sound/soc/fsl/fsl_esai.h #define ESAI_xCR_RE(x) ((ESAI_xCR_RE_MASK >> (ESAI_xCR_RE_WIDTH - x)) & ESAI_xCR_RE_MASK) x 65 sound/soc/fsl/fsl_micfil.h #define MICFIL_CTRL1_CHEN_MASK(x) (BIT(x) << MICFIL_CTRL1_CHEN_SHIFT) x 66 sound/soc/fsl/fsl_micfil.h #define MICFIL_CTRL1_CHEN(x) (MICFIL_CTRL1_CHEN_MASK(x)) x 114 sound/soc/fsl/fsl_sai.h #define FSL_SAI_CR3_WDFL(x) (x) x 118 sound/soc/fsl/fsl_sai.h #define FSL_SAI_CR4_FRSZ(x) (((x) - 1) << 16) x 120 sound/soc/fsl/fsl_sai.h #define FSL_SAI_CR4_SYWD(x) (((x) - 1) << 8) x 128 sound/soc/fsl/fsl_sai.h #define FSL_SAI_CR5_WNW(x) (((x) - 1) << 24) x 130 sound/soc/fsl/fsl_sai.h #define FSL_SAI_CR5_W0W(x) (((x) - 1) << 16) x 132 sound/soc/fsl/fsl_sai.h #define FSL_SAI_CR5_FBT(x) ((x) << 8) x 103 sound/soc/fsl/fsl_spdif.h #define SRPC_CLKSRC_SEL_SET(x) ((x << SRPC_CLKSRC_SEL_OFFSET) & SRPC_CLKSRC_SEL_MASK) x 108 sound/soc/fsl/fsl_spdif.h #define SRPC_GAINSEL_SET(x) ((x << SRPC_GAINSEL_OFFSET) & SRPC_GAINSEL_MASK) x 147 sound/soc/fsl/fsl_spdif.h #define STC_SYSCLK_DF(x) ((((x) - 1) << STC_SYSCLK_DF_OFFSET) & STC_SYSCLK_DF_MASK) x 150 sound/soc/fsl/fsl_spdif.h #define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK) x 156 sound/soc/fsl/fsl_spdif.h #define STC_TXCLK_DF(x) ((((x) - 1) << STC_TXCLK_DF_OFFSET) & STC_TXCLK_DF_MASK) x 186 sound/soc/fsl/fsl_ssi.h #define SSI_SxCCR_WL(x) \ x 187 sound/soc/fsl/fsl_ssi.h (((((x) / 2) - 1) << SSI_SxCCR_WL_SHIFT) & SSI_SxCCR_WL_MASK) x 190 sound/soc/fsl/fsl_ssi.h #define SSI_SxCCR_DC(x) \ x 191 sound/soc/fsl/fsl_ssi.h ((((x) - 1) << SSI_SxCCR_DC_SHIFT) & SSI_SxCCR_DC_MASK) x 194 sound/soc/fsl/fsl_ssi.h #define SSI_SxCCR_PM(x) \ x 195 sound/soc/fsl/fsl_ssi.h ((((x) - 1) << SSI_SxCCR_PM_SHIFT) & SSI_SxCCR_PM_MASK) x 205 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_RFCNT1(x) \ x 206 sound/soc/fsl/fsl_ssi.h (((x) & SSI_SFCSR_RFCNT1_MASK) >> SSI_SFCSR_RFCNT1_SHIFT) x 209 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_TFCNT1(x) \ x 210 sound/soc/fsl/fsl_ssi.h (((x) & SSI_SFCSR_TFCNT1_MASK) >> SSI_SFCSR_TFCNT1_SHIFT) x 213 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_RFWM1(x) \ x 214 sound/soc/fsl/fsl_ssi.h (((x) << SSI_SFCSR_RFWM1_SHIFT) & SSI_SFCSR_RFWM1_MASK) x 217 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_TFWM1(x) \ x 218 sound/soc/fsl/fsl_ssi.h (((x) << SSI_SFCSR_TFWM1_SHIFT) & SSI_SFCSR_TFWM1_MASK) x 221 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_RFCNT0(x) \ x 222 sound/soc/fsl/fsl_ssi.h (((x) & SSI_SFCSR_RFCNT0_MASK) >> SSI_SFCSR_RFCNT0_SHIFT) x 225 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_TFCNT0(x) \ x 226 sound/soc/fsl/fsl_ssi.h (((x) & SSI_SFCSR_TFCNT0_MASK) >> SSI_SFCSR_TFCNT0_SHIFT) x 229 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_RFWM0(x) \ x 230 sound/soc/fsl/fsl_ssi.h (((x) << SSI_SFCSR_RFWM0_SHIFT) & SSI_SFCSR_RFWM0_MASK) x 233 sound/soc/fsl/fsl_ssi.h #define SSI_SFCSR_TFWM0(x) \ x 234 sound/soc/fsl/fsl_ssi.h (((x) << SSI_SFCSR_TFWM0_SHIFT) & SSI_SFCSR_TFWM0_MASK) x 240 sound/soc/fsl/fsl_ssi.h #define SSI_STR_RXSTATE(x) (((x) >> 8) & 0x1F) x 244 sound/soc/fsl/fsl_ssi.h #define SSI_STR_TXSTATE(x) ((x) & 0x1F) x 254 sound/soc/fsl/fsl_ssi.h #define SSI_SOR_WAIT(x) (((x) & 3) << SSI_SOR_WAIT_SHIFT) x 258 sound/soc/fsl/fsl_ssi.h #define SSI_SACNT_FRDIV(x) (((x) & 0x3f) << 5) x 29 sound/soc/fsl/imx-audmux.c #define IMX_AUDMUX_V2_PTCR(x) ((x) * 8) x 30 sound/soc/fsl/imx-audmux.c #define IMX_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) x 102 sound/soc/fsl/imx-ssi.h #define SSI_SRCCR_WL(x) ((((x) - 2) >> 1) << 13) x 103 sound/soc/fsl/imx-ssi.h #define SSI_SRCCR_DC(x) (((x) & 0x1f) << 8) x 104 sound/soc/fsl/imx-ssi.h #define SSI_SRCCR_PM(x) (((x) & 0xff) << 0) x 112 sound/soc/fsl/imx-ssi.h #define SSI_STCCR_WL(x) ((((x) - 2) >> 1) << 13) x 113 sound/soc/fsl/imx-ssi.h #define SSI_STCCR_DC(x) (((x) & 0x1f) << 8) x 114 sound/soc/fsl/imx-ssi.h #define SSI_STCCR_PM(x) (((x) & 0xff) << 0) x 120 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_RFCNT1(x) (((x) & 0xf) << 28) x 122 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_TFCNT1(x) (((x) & 0xf) << 24) x 124 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_RFWM1(x) (((x) & 0xf) << 20) x 125 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_TFWM1(x) (((x) & 0xf) << 16) x 126 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_RFCNT0(x) (((x) & 0xf) << 12) x 128 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_TFCNT0(x) (((x) & 0xf) << 8) x 130 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_RFWM0(x) (((x) & 0xf) << 4) x 131 sound/soc/fsl/imx-ssi.h #define SSI_SFCSR_TFWM0(x) (((x) & 0xf) << 0) x 139 sound/soc/fsl/imx-ssi.h #define SSI_STR_RXSTATE(x) (((x) & 0xf) << 8) x 143 sound/soc/fsl/imx-ssi.h #define SSI_STR_TXSTATE(x) (((x) & 0xf) << 0) x 150 sound/soc/fsl/imx-ssi.h #define SSI_SOR_WAIT(x) (((x) & 0x3) << 1) x 155 sound/soc/fsl/imx-ssi.h #define SSI_SACNT_FRDIV(x) (((x) & 0x3f) << 5) x 27 sound/soc/intel/atom/sst-atom-controls.h #define SST_MIX_IP(x) (x) x 35 sound/soc/intel/baytrail/sst-baytrail-ipc.c #define IPC_HEADER_MSG_ID(x) ((x) & IPC_HEADER_MSG_ID_MASK) x 38 sound/soc/intel/baytrail/sst-baytrail-ipc.c #define IPC_HEADER_STR_ID(x) (((x) & 0x1f) << IPC_HEADER_STR_ID_SHIFT) x 40 sound/soc/intel/baytrail/sst-baytrail-ipc.c #define IPC_HEADER_LARGE(x) (((x) & 0x1) << IPC_HEADER_LARGE_SHIFT) x 43 sound/soc/intel/baytrail/sst-baytrail-ipc.c #define IPC_HEADER_DATA(x) (((x) & 0x3fff) << IPC_HEADER_DATA_SHIFT) x 67 sound/soc/intel/common/sst-dsp.h #define SST_CSR_DCS(x) (x << 4) x 115 sound/soc/intel/common/sst-dsp.h #define SST_CLKCTL_SMOS(x) (x << 24) x 126 sound/soc/intel/common/sst-dsp.h #define SST_LTRC_VAL(x) (x << 0) x 129 sound/soc/intel/common/sst-dsp.h #define SST_HMDC_HDDA0(x) (x << 0) x 130 sound/soc/intel/common/sst-dsp.h #define SST_HMDC_HDDA1(x) (x << 7) x 34 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_GLB_TYPE(x) (x << IPC_GLB_TYPE_SHIFT) x 39 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_GLB_REPLY_TYPE(x) (x << IPC_GLB_REPLY_TYPE_SHIFT) x 44 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_STR_TYPE(x) (x << IPC_STR_TYPE_SHIFT) x 47 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_STR_ID(x) (x << IPC_STR_ID_SHIFT) x 56 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_STG_TYPE(x) (x << IPC_STG_TYPE_SHIFT) x 59 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_STG_ID(x) (x << IPC_STG_ID_SHIFT) x 68 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_LOG_OP_TYPE(x) (x << IPC_LOG_OP_SHIFT) x 71 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_LOG_ID(x) (x << IPC_LOG_ID_SHIFT) x 76 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_MODULE_OPERATION(x) (x << IPC_MODULE_OPERATION_SHIFT) x 80 sound/soc/intel/haswell/sst-haswell-ipc.c #define IPC_MODULE_ID(x) (x << IPC_MODULE_ID_SHIFT) x 32 sound/soc/intel/haswell/sst-haswell-pcm.c #define SST_SAMPLES(r, x) (bytes_to_samples(r, \ x 33 sound/soc/intel/haswell/sst-haswell-pcm.c frames_to_bytes(r, (x)))) x 71 sound/soc/intel/skylake/cnl-sst-dsp.h #define CNL_ADSPCS_CRST(x) (x << CNL_ADSPCS_CRST_SHIFT) x 75 sound/soc/intel/skylake/cnl-sst-dsp.h #define CNL_ADSPCS_CSTALL(x) (x << CNL_ADSPCS_CSTALL_SHIFT) x 79 sound/soc/intel/skylake/cnl-sst-dsp.h #define CNL_ADSPCS_SPA(x) (x << CNL_ADSPCS_SPA_SHIFT) x 83 sound/soc/intel/skylake/cnl-sst-dsp.h #define CNL_ADSPCS_CPA(x) (x << CNL_ADSPCS_CPA_SHIFT) x 289 sound/soc/intel/skylake/cnl-sst.c #define CNL_IPC_GLB_NOTIFY_RSP_TYPE(x) (((x) >> CNL_IPC_GLB_NOTIFY_RSP_SHIFT) \ x 19 sound/soc/intel/skylake/skl-i2s.h #define SKL_SHIFT(x) (ffs(x) - 1) x 22 sound/soc/intel/skylake/skl-i2s.h #define is_legacy_blob(x) (x.signature != 0xEE) x 14 sound/soc/intel/skylake/skl-sst-cldma.h #define BDL_ALIGN(x) (x >> DMA_ADDRESS_128_BITS_ALIGNMENT) x 51 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_SRST(x) \ x 52 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_SRST_SHIFT) & CL_SD_CTL_SRST_MASK) x 57 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_RUN(x) \ x 58 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_RUN_SHIFT) & CL_SD_CTL_RUN_MASK) x 63 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_IOCE(x) \ x 64 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_IOCE_SHIFT) & CL_SD_CTL_IOCE_MASK) x 69 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_FEIE(x) \ x 70 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_FEIE_SHIFT) & CL_SD_CTL_FEIE_MASK) x 75 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_DEIE(x) \ x 76 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_DEIE_SHIFT) & CL_SD_CTL_DEIE_MASK) x 81 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_FIFOLC(x) \ x 82 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_FIFOLC_SHIFT) & CL_SD_CTL_FIFOLC_MASK) x 87 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_STRIPE(x) \ x 88 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_STRIPE_SHIFT) & CL_SD_CTL_STRIPE_MASK) x 93 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_TP(x) \ x 94 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_TP_SHIFT) & CL_SD_CTL_TP_MASK) x 99 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_DIR(x) \ x 100 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_DIR_SHIFT) & CL_SD_CTL_DIR_MASK) x 105 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_CTL_STRM(x) \ x 106 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_CTL_STRM_SHIFT) & CL_SD_CTL_STRM_MASK) x 111 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_STS_BCIS(x) CL_SD_CTL_IOCE(x) x 114 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_STS_FIFOE(x) CL_SD_CTL_FEIE(x) x 117 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_STS_DESE(x) CL_SD_CTL_DEIE(x) x 120 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_STS_FIFORDY(x) CL_SD_CTL_FIFOLC(x) x 126 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_LVI(x) ((x << CL_SD_LVI_SHIFT) & CL_SD_LVI_MASK) x 131 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_FIFOW(x) \ x 132 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_FIFOW_SHIFT) & CL_SD_FIFOW_MASK) x 139 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_BDLPLBA_PROT(x) \ x 140 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SD_BDLPLBA_PROT_SHIFT) & CL_SD_BDLPLBA_PROT_MASK) x 145 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_BDLPLBA(x) \ x 146 sound/soc/intel/skylake/skl-sst-cldma.h ((BDL_ALIGN(lower_32_bits(x)) << CL_SD_BDLPLBA_SHIFT) & CL_SD_BDLPLBA_MASK) x 151 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SD_BDLPUBA(x) \ x 152 sound/soc/intel/skylake/skl-sst-cldma.h ((upper_32_bits(x) << CL_SD_BDLPUBA_SHIFT) & CL_SD_BDLPUBA_MASK) x 162 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SPBFIFO_SPBFCH_PTR(x) \ x 163 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SPBFIFO_SPBFCH_PTR_SHIFT) & CL_SPBFIFO_SPBFCH_PTR_MASK) x 168 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SPBFIFO_SPBFCH_ID(x) \ x 169 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SPBFIFO_SPBFCH_ID_SHIFT) & CL_SPBFIFO_SPBFCH_ID_MASK) x 174 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SPBFIFO_SPBFCH_VER(x) \ x 175 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SPBFIFO_SPBFCH_VER_SHIFT) & CL_SPBFIFO_SPBFCH_VER_MASK) x 180 sound/soc/intel/skylake/skl-sst-cldma.h #define CL_SPBFIFO_SPBFCCTL_SPIBE(x) \ x 181 sound/soc/intel/skylake/skl-sst-cldma.h ((x << CL_SPBFIFO_SPBFCCTL_SPIBE_SHIFT) & CL_SPBFIFO_SPBFCCTL_SPIBE_MASK) x 22 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_GLB_TYPE(x) ((x) << IPC_GLB_TYPE_SHIFT) x 27 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_GLB_REPLY_STATUS(x) ((x) << IPC_GLB_REPLY_STATUS_SHIFT) x 31 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_GLB_REPLY_TYPE(x) (((x) >> IPC_GLB_REPLY_TYPE_SHIFT) \ x 40 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_MSG_TARGET(x) (((x) & IPC_MSG_TARGET_MASK) \ x 45 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_MSG_DIR(x) (((x) & IPC_MSG_DIR_MASK) \ x 50 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_GLB_NOTIFY_TYPE(x) (((x) >> IPC_GLB_NOTIFY_TYPE_SHIFT) \ x 55 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_GLB_NOTIFY_MSG_TYPE(x) (((x) >> IPC_GLB_NOTIFY_MSG_TYPE_SHIFT) \ x 60 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_GLB_NOTIFY_RSP_TYPE(x) (((x) >> IPC_GLB_NOTIFY_RSP_SHIFT) \ x 68 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_PPL_MEM_SIZE(x) (((x) & IPC_PPL_MEM_SIZE_MASK) \ x 73 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_PPL_TYPE(x) (((x) & IPC_PPL_TYPE_MASK) \ x 78 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_INSTANCE_ID(x) (((x) & IPC_INSTANCE_ID_MASK) \ x 83 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_PPL_LP_MODE(x) (((x) & IPC_PPL_LP_MODE_MASK) \ x 89 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_PPL_STATE(x) (((x) & IPC_PPL_STATE_MASK) \ x 95 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_MOD_ID(x) (((x) & IPC_MOD_ID_MASK) \ x 100 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_MOD_INSTANCE_ID(x) (((x) & IPC_MOD_INSTANCE_ID_MASK) \ x 106 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_PARAM_BLOCK_SIZE(x) (((x) & IPC_PARAM_BLOCK_SIZE_MASK) \ x 111 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_PPL_INSTANCE_ID(x) (((x) & IPC_PPL_INSTANCE_ID_MASK) \ x 116 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_CORE_ID(x) (((x) & IPC_CORE_ID_MASK) \ x 121 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_DOMAIN(x) (((x) & IPC_DOMAIN_MASK) \ x 126 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_DST_MOD_ID(x) (((x) & IPC_MOD_ID_MASK) \ x 130 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_DST_MOD_INSTANCE_ID(x) (((x) & IPC_MOD_INSTANCE_ID_MASK) \ x 135 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_DST_QUEUE(x) (((x) & IPC_DST_QUEUE_MASK) \ x 140 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_SRC_QUEUE(x) (((x) & IPC_SRC_QUEUE_MASK) \ x 145 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_LOAD_MODULE_CNT(x) (((x) & IPC_LOAD_MODULE_MASK) \ x 151 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_DMA_ID(x) (((x) & IPC_DMA_ID_MASK) \ x 156 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_DATA_OFFSET_SZ(x) (((x) & IPC_DATA_OFFSET_SZ_MASK) \ x 163 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_LARGE_PARAM_ID(x) (((x) & IPC_LARGE_PARAM_ID_MASK) \ x 168 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_FINAL_BLOCK(x) (((x) & IPC_FINAL_BLOCK_MASK) \ x 173 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_INITIAL_BLOCK(x) (((x) & IPC_INITIAL_BLOCK_MASK) \ x 180 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_D0IX_WAKE(x) (((x) & IPC_D0IX_WAKE_MASK) \ x 185 sound/soc/intel/skylake/skl-sst-ipc.c #define IPC_D0IX_STREAMING(x) (((x) & IPC_D0IX_STREAMING_MASK) \ x 124 sound/soc/mediatek/mt2701/mt2701-reg.h #define AFE_MEMIF_PBUF_SIZE_DLM_CH(x) ((x) << 24) x 130 sound/soc/mediatek/mt2701/mt2701-reg.h #define ASYS_I2S_CON_FS_SET(x) ((x) << 8) x 138 sound/soc/mediatek/mt2701/mt2701-reg.h #define ASYS_I2S_CON_WIDE_MODE_SET(x) ((x) << 1) x 90 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c #define AFE_I2S_CON1_RATE(x) (((x) & 0xf) << 8) x 96 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c #define AFE_I2S_CON2_RATE(x) (((x) & 0xf) << 8) x 115 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c #define AFE_TDM_CON1_LRCK_WIDTH(x) (((x) - 1) << 24) x 47 sound/soc/meson/axg-fifo.h #define CTRL0_INT_EN(x) ((x) << 16) x 51 sound/soc/meson/axg-fifo.h #define CTRL1_INT_CLR(x) ((x) << 0) x 53 sound/soc/meson/axg-fifo.h #define CTRL1_STATUS2_SEL(x) ((x) << 8) x 56 sound/soc/meson/axg-fifo.h #define CTRL1_FRDDR_DEPTH(x) ((x) << 24) x 61 sound/soc/meson/axg-fifo.h #define STATUS1_INT_STS(x) ((x) << 0) x 21 sound/soc/meson/axg-pdm.c #define PDM_CTRL_CHAN_RSTN(x) ((x) << 8) x 23 sound/soc/meson/axg-pdm.c #define PDM_CTRL_CHAN_EN(x) ((x) << 0) x 27 sound/soc/meson/axg-pdm.c #define PDM_HCIC_CTRL1_GAIN_SFT(x) ((x) << 24) x 29 sound/soc/meson/axg-pdm.c #define PDM_HCIC_CTRL1_GAIN_MULT(x) ((x) << 16) x 31 sound/soc/meson/axg-pdm.c #define PDM_HCIC_CTRL1_DSR(x) ((x) << 4) x 33 sound/soc/meson/axg-pdm.c #define PDM_HCIC_CTRL1_STAGE_NUM(x) ((x) << 0) x 37 sound/soc/meson/axg-pdm.c #define PDM_LPF_ROUND_MODE(x) ((x) << 16) x 39 sound/soc/meson/axg-pdm.c #define PDM_LPF_DSR(x) ((x) << 12) x 41 sound/soc/meson/axg-pdm.c #define PDM_LPF_STAGE_NUM(x) ((x) << 0) x 48 sound/soc/meson/axg-pdm.c #define PDM_HPF_SFT_STEPS(x) ((x) << 16) x 50 sound/soc/meson/axg-pdm.c #define PDM_HPF_OUT_FACTOR(x) ((x) << 0) x 37 sound/soc/meson/axg-spdifout.c #define SPDIFOUT_CTRL0_MASK(x) ((x) << 4) x 40 sound/soc/meson/axg-spdifout.c #define SPDIFOUT_CTRL1_MSB_POS(x) ((x) << 8) x 42 sound/soc/meson/axg-spdifout.c #define SPDIFOUT_CTRL1_TYPE(x) ((x) << 4) x 22 sound/soc/meson/axg-tdmin.c #define TDMIN_CTRL_IN_BIT_SKEW(x) ((x) << 16) x 25 sound/soc/meson/axg-tdmin.c #define TDMIN_CTRL_BITNUM(x) ((x) << 0) x 16 sound/soc/meson/axg-tdmout.c #define TDMOUT_CTRL0_BITNUM(x) ((x) << 0) x 18 sound/soc/meson/axg-tdmout.c #define TDMOUT_CTRL0_SLOTNUM(x) ((x) << 5) x 20 sound/soc/meson/axg-tdmout.c #define TDMOUT_CTRL0_INIT_BITNUM(x) ((x) << 15) x 26 sound/soc/meson/axg-tdmout.c #define TDMOUT_CTRL1_TYPE(x) ((x) << 4) x 29 sound/soc/meson/axg-tdmout.c #define TDMOUT_CTRL1_MSB_POS(x) ((x) << 8) x 22 sound/soc/meson/axg-toddr.c #define CTRL0_TODDR_TYPE(x) ((x) << 13) x 24 sound/soc/meson/axg-toddr.c #define CTRL0_TODDR_MSB_POS(x) ((x) << 8) x 26 sound/soc/meson/axg-toddr.c #define CTRL0_TODDR_LSB_POS(x) ((x) << 3) x 38 sound/soc/pxa/mmp-sspa.h #define SSPA_CTL_XFRLEN2(x) ((x) << 24) /* Transmit Frame Length in Phase 2 */ x 40 sound/soc/pxa/mmp-sspa.h #define SSPA_CTL_XWDLEN2(x) ((x) << 21) /* Transmit Word Length in Phase 2 */ x 41 sound/soc/pxa/mmp-sspa.h #define SSPA_CTL_XDATDLY(x) ((x) << 19) /* Tansmit Data Delay */ x 43 sound/soc/pxa/mmp-sspa.h #define SSPA_CTL_XSSZ2(x) ((x) << 16) /* Transmit Sample Audio Size */ x 45 sound/soc/pxa/mmp-sspa.h #define SSPA_CTL_XFRLEN1(x) ((x) << 8) /* Transmit Frame Length in Phase 1 */ x 47 sound/soc/pxa/mmp-sspa.h #define SSPA_CTL_XWDLEN1(x) ((x) << 5) /* Transmit Word Length in Phase 1 */ x 49 sound/soc/pxa/mmp-sspa.h #define SSPA_CTL_XSSZ1(x) ((x) << 0) /* XSSZ1 */ x 66 sound/soc/pxa/mmp-sspa.h #define SSPA_SP_FWID(x) ((x) << 20) /* Frame-Sync Width */ x 67 sound/soc/pxa/mmp-sspa.h #define SSPA_TXSP_FPER(x) ((x) << 4) /* Frame-Sync Active */ x 40 sound/soc/pxa/pxa2xx-i2s.c #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ x 41 sound/soc/pxa/pxa2xx-i2s.c #define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ x 21 sound/soc/rockchip/rockchip_i2s.h #define I2S_TXCR_CSR(x) (x << I2S_TXCR_CSR_SHIFT) x 36 sound/soc/rockchip/rockchip_i2s.h #define I2S_TXCR_PBM_MODE(x) (x << I2S_TXCR_PBM_SHIFT) x 43 sound/soc/rockchip/rockchip_i2s.h #define I2S_TXCR_VDW(x) ((x - 1) << I2S_TXCR_VDW_SHIFT) x 51 sound/soc/rockchip/rockchip_i2s.h #define I2S_RXCR_CSR(x) (x << I2S_RXCR_CSR_SHIFT) x 66 sound/soc/rockchip/rockchip_i2s.h #define I2S_RXCR_PBM_MODE(x) (x << I2S_RXCR_PBM_SHIFT) x 73 sound/soc/rockchip/rockchip_i2s.h #define I2S_RXCR_VDW(x) ((x - 1) << I2S_RXCR_VDW_SHIFT) x 81 sound/soc/rockchip/rockchip_i2s.h #define I2S_CKR_TRCM(x) (x << I2S_CKR_TRCM_SHIFT) x 101 sound/soc/rockchip/rockchip_i2s.h #define I2S_CKR_MDIV(x) ((x - 1) << I2S_CKR_MDIV_SHIFT) x 104 sound/soc/rockchip/rockchip_i2s.h #define I2S_CKR_RSD(x) ((x - 1) << I2S_CKR_RSD_SHIFT) x 107 sound/soc/rockchip/rockchip_i2s.h #define I2S_CKR_TSD(x) ((x - 1) << I2S_CKR_TSD_SHIFT) x 133 sound/soc/rockchip/rockchip_i2s.h #define I2S_DMACR_RDL(x) ((x - 1) << I2S_DMACR_RDL_SHIFT) x 139 sound/soc/rockchip/rockchip_i2s.h #define I2S_DMACR_TDL(x) ((x) << I2S_DMACR_TDL_SHIFT) x 147 sound/soc/rockchip/rockchip_i2s.h #define I2S_INTCR_RFT(x) ((x - 1) << I2S_INTCR_RFT_SHIFT) x 156 sound/soc/rockchip/rockchip_i2s.h #define I2S_INTCR_TFT(x) ((x - 1) << I2S_INTCR_TFT_SHIFT) x 18 sound/soc/rockchip/rockchip_spdif.h #define SPDIF_CFGR_CLK_DIV(x) (x << SPDIF_CFGR_CLK_DIV_SHIFT) x 25 sound/soc/rockchip/rockchip_spdif.h #define SPDIF_CFGR_VDW(x) (x << SPDIF_CFGR_VDW_SHIFT) x 41 sound/soc/rockchip/rockchip_spdif.h #define SPDIF_DMACR_TDL(x) ((x) << SPDIF_DMACR_TDL_SHIFT) x 136 sound/soc/samsung/i2s-regs.h #define FIC_TX2COUNT(x) (((x) >> 24) & 0xf) x 137 sound/soc/samsung/i2s-regs.h #define FIC_TX1COUNT(x) (((x) >> 16) & 0xf) x 142 sound/soc/samsung/i2s-regs.h #define FIC_TXCOUNT(x) (((x) >> 8) & 0xf) x 143 sound/soc/samsung/i2s-regs.h #define FIC_RXCOUNT(x) (((x) >> 0) & 0xf) x 144 sound/soc/samsung/i2s-regs.h #define FICS_TXCOUNT(x) (((x) >> 8) & 0x7f) x 100 sound/soc/samsung/regs-i2s-v2.h #define S3C64XX_IISFIC_TX2COUNT(x) (((x) >> 24) & 0xf) x 101 sound/soc/samsung/regs-i2s-v2.h #define S3C64XX_IISFIC_TX1COUNT(x) (((x) >> 16) & 0xf) x 105 sound/soc/samsung/regs-i2s-v2.h #define S3C2412_IISFIC_TXCOUNT(x) (((x) >> 8) & 0xf) x 106 sound/soc/samsung/regs-i2s-v2.h #define S3C2412_IISFIC_RXCOUNT(x) (((x) >> 0) & 0xf) x 109 sound/soc/samsung/regs-i2s-v2.h #define S5PC1XX_IISFICS_TXCOUNT(x) (((x) >> 8) & 0x7f) x 73 sound/soc/sh/dma-sh7760.c #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x))) x 22 sound/soc/sh/rcar/adg.c #define BRRx_MASK(x) (0x3FF & x) x 725 sound/soc/sh/rcar/rsnd.h #define rsnd_kctrl_size(x) ((x).cfg.size) x 726 sound/soc/sh/rcar/rsnd.h #define rsnd_kctrl_max(x) ((x).cfg.max) x 727 sound/soc/sh/rcar/rsnd.h #define rsnd_kctrl_valm(x, i) ((x).val[i]) /* = (x).cfg.val[i] */ x 728 sound/soc/sh/rcar/rsnd.h #define rsnd_kctrl_vals(x) ((x).val) /* = (x).cfg.val[0] */ x 175 sound/soc/sirf/sirf-usp.h #define USP_ASYNC_TIMEOUT(x) (((x)&USP_ASYNC_TIMEOUT_MASK) \ x 201 sound/soc/sirf/sirf-usp.h #define TX_FIFO_SC(x) (((x) & USP_TX_FIFO_LEVEL_CHECK_MASK) \ x 203 sound/soc/sirf/sirf-usp.h #define TX_FIFO_LC(x) (((x) & USP_TX_FIFO_LEVEL_CHECK_MASK) \ x 205 sound/soc/sirf/sirf-usp.h #define TX_FIFO_HC(x) (((x) & USP_TX_FIFO_LEVEL_CHECK_MASK) \ x 245 sound/soc/sirf/sirf-usp.h #define RX_FIFO_SC(x) (((x) & USP_RX_FIFO_LEVEL_CHECK_MASK) \ x 247 sound/soc/sirf/sirf-usp.h #define RX_FIFO_LC(x) (((x) & USP_RX_FIFO_LEVEL_CHECK_MASK) \ x 249 sound/soc/sirf/sirf-usp.h #define RX_FIFO_HC(x) (((x) & USP_RX_FIFO_LEVEL_CHECK_MASK) \ x 44 sound/soc/soc-dapm.c #define SND_SOC_DAPM_DIR_REVERSE(x) ((x == SND_SOC_DAPM_DIR_IN) ? \ x 52 sound/soc/sof/intel/bdw.c #define BDW_PANIC_OFFSET(x) ((x) & 0xFFFF) x 51 sound/soc/sof/intel/byt.c #define BYT_PANIC_OFFSET(x) (((x) & GENMASK_ULL(47, 32)) >> 32) x 23 sound/soc/sof/intel/hda-pcm.c #define SDnFMT_BASE(x) ((x) << 14) x 24 sound/soc/sof/intel/hda-pcm.c #define SDnFMT_MULT(x) (((x) - 1) << 11) x 25 sound/soc/sof/intel/hda-pcm.c #define SDnFMT_DIV(x) (((x) - 1) << 8) x 26 sound/soc/sof/intel/hda-pcm.c #define SDnFMT_BITS(x) ((x) << 4) x 27 sound/soc/sof/intel/hda-pcm.c #define SDnFMT_CHAN(x) ((x) << 0) x 143 sound/soc/sof/intel/hda.h #define SRAM_WINDOW_OFFSET(x) (0x80000 + (x) * 0x20000) x 147 sound/soc/sof/intel/hda.h #define HDA_DSP_PANIC_OFFSET(x) \ x 148 sound/soc/sof/intel/hda.h (((x) & 0xFFFFFF) + HDA_DSP_MBOX_OFFSET) x 369 sound/soc/sof/intel/hda.h #define HDA_IDISP_CODEC(x) ((x) & BIT(2)) x 49 sound/soc/sof/intel/shim.h #define SHIM_CSR_DCS(x) ((x) << 4) x 98 sound/soc/sof/intel/shim.h #define SHIM_CLKCTL_SMOS(x) ((x) << 24) x 109 sound/soc/sof/intel/shim.h #define SHIM_LTRC_VAL(x) ((x) << 0) x 112 sound/soc/sof/intel/shim.h #define SHIM_HMDC_HDDA0(x) ((x) << 0) x 113 sound/soc/sof/intel/shim.h #define SHIM_HMDC_HDDA1(x) ((x) << 7) x 223 sound/soc/sof/topology.c static inline u32 vol_shift_64(u64 i, u32 x) x 226 sound/soc/sof/topology.c if (x > 32) x 227 sound/soc/sof/topology.c x = 32; x 229 sound/soc/sof/topology.c if (x == 0) x 232 sound/soc/sof/topology.c return (u32)(((i >> (x - 1)) + 1) >> 1); x 399 sound/soc/sprd/sprd-pcm-dma.c snd_pcm_uframes_t x; x 440 sound/soc/sprd/sprd-pcm-dma.c x = bytes_to_frames(runtime, bytes_of_pointer); x 441 sound/soc/sprd/sprd-pcm-dma.c if (x == runtime->buffer_size) x 442 sound/soc/sprd/sprd-pcm-dma.c x = 0; x 444 sound/soc/sprd/sprd-pcm-dma.c return x; x 55 sound/soc/stm/stm32_i2s.c #define I2S_CFG1_FTHVL_SET(x) ((x) << I2S_CFG1_FTHVL_SHIFT) x 110 sound/soc/stm/stm32_i2s.c #define I2S_CGFR_I2SCFG_SET(x) ((x) << I2S_CGFR_I2SCFG_SHIFT) x 114 sound/soc/stm/stm32_i2s.c #define I2S_CGFR_I2SSTD_SET(x) ((x) << I2S_CGFR_I2SSTD_SHIFT) x 120 sound/soc/stm/stm32_i2s.c #define I2S_CGFR_DATLEN_SET(x) ((x) << I2S_CGFR_DATLEN_SHIFT) x 133 sound/soc/stm/stm32_i2s.c #define I2S_CGFR_I2SDIV_SET(x) ((x) << I2S_CGFR_I2SDIV_SHIFT) x 196 sound/soc/stm/stm32_i2s.c #define STM32_I2S_IS_MASTER(x) ((x)->ms_flg == I2S_MS_MASTER) x 197 sound/soc/stm/stm32_i2s.c #define STM32_I2S_IS_SLAVE(x) ((x)->ms_flg == I2S_MS_SLAVE) x 54 sound/soc/stm/stm32_sai.h #define SAI_XCR1_PRTCFG_SET(x) ((x) << SAI_XCR1_PRTCFG_SHIFT) x 58 sound/soc/stm/stm32_sai.h #define SAI_XCR1_DS_SET(x) ((x) << SAI_XCR1_DS_SHIFT) x 67 sound/soc/stm/stm32_sai.h #define SAI_XCR1_SYNCEN_SET(x) ((x) << SAI_XCR1_SYNCEN_SHIFT) x 81 sound/soc/stm/stm32_sai.h #define SAI_XCR1_MCKDIV_WIDTH(x) (((x) == STM_SAI_STM32F4) ? 4 : 6) x 82 sound/soc/stm/stm32_sai.h #define SAI_XCR1_MCKDIV_MASK(x) GENMASK((SAI_XCR1_MCKDIV_SHIFT + (x) - 1),\ x 84 sound/soc/stm/stm32_sai.h #define SAI_XCR1_MCKDIV_SET(x) ((x) << SAI_XCR1_MCKDIV_SHIFT) x 85 sound/soc/stm/stm32_sai.h #define SAI_XCR1_MCKDIV_MAX(x) ((1 << SAI_XCR1_MCKDIV_WIDTH(x)) - 1) x 96 sound/soc/stm/stm32_sai.h #define SAI_XCR2_FTH_SET(x) ((x) << SAI_XCR2_FTH_SHIFT) x 109 sound/soc/stm/stm32_sai.h #define SAI_XCR2_MUTECNT_SET(x) ((x) << SAI_XCR2_MUTECNT_SHIFT) x 116 sound/soc/stm/stm32_sai.h #define SAI_XCR2_COMP_SET(x) ((x) << SAI_XCR2_COMP_SHIFT) x 121 sound/soc/stm/stm32_sai.h #define SAI_XFRCR_FRL_SET(x) ((x) << SAI_XFRCR_FRL_SHIFT) x 125 sound/soc/stm/stm32_sai.h #define SAI_XFRCR_FSALL_SET(x) ((x) << SAI_XFRCR_FSALL_SHIFT) x 137 sound/soc/stm/stm32_sai.h #define SAI_XSLOTR_FBOFF_SET(x) ((x) << SAI_XSLOTR_FBOFF_SHIFT) x 141 sound/soc/stm/stm32_sai.h #define SAI_XSLOTR_SLOTSZ_SET(x) ((x) << SAI_XSLOTR_SLOTSZ_SHIFT) x 145 sound/soc/stm/stm32_sai.h #define SAI_XSLOTR_NBSLOT_SET(x) ((x) << SAI_XSLOTR_NBSLOT_SHIFT) x 150 sound/soc/stm/stm32_sai.h #define SAI_XSLOTR_SLOTEN_SET(x) ((x) << SAI_XSLOTR_SLOTEN_SHIFT) x 193 sound/soc/stm/stm32_sai.h #define SAI_PDMCR_MICNBR_SET(x) ((x) << SAI_PDMCR_MICNBR_SHIFT) x 46 sound/soc/stm/stm32_sai_sub.c #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID) x 47 sound/soc/stm/stm32_sai_sub.c #define STM_SAI_IS_SUB_B(x) ((x)->id == STM_SAI_B_ID) x 48 sound/soc/stm/stm32_sai_sub.c #define STM_SAI_BLOCK_NAME(x) (((x)->id == STM_SAI_A_ID) ? "A" : "B") x 55 sound/soc/stm/stm32_sai_sub.c #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf.has_spdif_pdm) x 56 sound/soc/stm/stm32_sai_sub.c #define STM_SAI_HAS_PDM(x) ((x)->pdata->conf.has_spdif_pdm) x 57 sound/soc/stm/stm32_sai_sub.c #define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4(sai->pdata)) x 36 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_CR_SPDIFENSET(x) ((x) << SPDIFRX_CR_SPDIFEN_SHIFT) x 43 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_CR_DRFMTSET(x) ((x) << SPDIFRX_CR_DRFMT_SHIFT) x 55 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_CR_NBTRSET(x) ((x) << SPDIFRX_CR_NBTR_SHIFT) x 61 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_CR_INSELSET(x) ((x) << SPDIFRX_CR_INSEL_SHIFT) x 91 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_SR_WIDTH5SET(x) ((x) << SPDIFRX_SR_WIDTH5_SHIFT) x 104 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DR0_DRSET(x) ((x) << SPDIFRX_DR0_DR_SHIFT) x 114 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DR0_PTSET(x) ((x) << SPDIFRX_DR0_PT_SHIFT) x 124 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DR1_PTSET(x) ((x) << SPDIFRX_DR1_PT_SHIFT) x 128 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DR1_DRSET(x) ((x) << SPDIFRX_DR1_DR_SHIFT) x 133 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DR1_DRNL1SET(x) ((x) << SPDIFRX_DR1_DRNL1_SHIFT) x 137 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DR1_DRNL2SET(x) ((x) << SPDIFRX_DR1_DRNL2_SHIFT) x 142 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_CSR_USRGET(x) (((x) & SPDIFRX_CSR_USR_MASK)\ x 147 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_CSR_CSGET(x) (((x) & SPDIFRX_CSR_CS_MASK)\ x 155 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DIR_THI_SET(x) ((x) << SPDIFRX_DIR_THI_SHIFT) x 159 sound/soc/stm/stm32_spdifrx.c #define SPDIFRX_DIR_TLO_SET(x) ((x) << SPDIFRX_DIR_TLO_SHIFT) x 209 sound/soc/ti/davinci-mcasp.h #define DISMOD_VAL(x) ((x) << 2) x 295 sound/soc/ti/davinci-mcasp.h #define NUMEVT(x) (((x) & 0xFF) << 8) x 49 sound/soc/ti/omap-dmic.h #define OMAP_DMIC_CLK_DIV(x) (((x) & 0x7) << 7) x 59 sound/soc/ti/omap-mcpdm.h #define MCPDM_PDM_UPLINK_EN(x) (1 << (x - 1)) /* ch1 is at bit 0 */ x 60 sound/soc/ti/omap-mcpdm.h #define MCPDM_PDM_DOWNLINK_EN(x) (1 << (x + 2)) /* ch1 is at bit 3 */ x 86 sound/soc/ti/omap-mcpdm.h #define MCPDM_DNOFST_RX1(x) ((x & 0x1f) << 1) x 88 sound/soc/ti/omap-mcpdm.h #define MCPDM_DNOFST_RX2(x) ((x & 0x1f) << 9) x 130 sound/soc/xtensa/xtfpga-i2s.c static unsigned xtfpga_pcm_tx_##channels##x##sample_bits( \ x 65 sound/soc/zte/zx-i2s.c #define ZX_I2S_TIMING_CHN(x) ((x - 1) << 8) x 67 sound/soc/zte/zx-i2s.c #define ZX_I2S_TIMING_LANE(x) ((x - 1) << 11) x 69 sound/soc/zte/zx-i2s.c #define ZX_I2S_TIMING_TSCFG(x) (x << 13) x 71 sound/soc/zte/zx-i2s.c #define ZX_I2S_TIMING_TS_WIDTH(x) ((x - 1) << 16) x 73 sound/soc/zte/zx-i2s.c #define ZX_I2S_TIMING_DATA_SIZE(x) ((x - 1) << 21) x 61 sound/soc/zte/zx-spdif.c #define ZX_FIFOCTRL_TXTH(x) (x << 8) x 44 sound/soc/zte/zx-tdm.c #define FIFOCTRL_THRESHOLD(x) ((x) << 2) x 55 sound/soc/zte/zx-tdm.c #define TIMING_TS_WIDTH(x) ((x) << TIMING_WIDTH_SHIFT) x 60 sound/soc/zte/zx-tdm.c #define TIMING_TS_NUM(x) (((x) - 1) << 7) x 85 sound/sparc/amd7930.c __u16 x[8]; x 129 sound/sparc/cs4231.c #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) x 112 sound/sparc/dbri.c #define dprintk(a, x...) if (dbri_debug & a) printk(KERN_DEBUG x) x 115 sound/sparc/dbri.c #define dprintk(a, x...) do { } while (0) x 1841 sound/sparc/dbri.c static void dbri_process_one_interrupt(struct snd_dbri *dbri, int x) x 1843 sound/sparc/dbri.c int val = D_INTR_GETVAL(x); x 1844 sound/sparc/dbri.c int channel = D_INTR_GETCHAN(x); x 1845 sound/sparc/dbri.c int command = D_INTR_GETCMD(x); x 1846 sound/sparc/dbri.c int code = D_INTR_GETCODE(x); x 1848 sound/sparc/dbri.c int rval = D_INTR_GETRVAL(x); x 1904 sound/sparc/dbri.c "DBRI: Ignored Interrupt: %d (0x%x)\n", code, x); x 1915 sound/sparc/dbri.c s32 x; x 1917 sound/sparc/dbri.c while ((x = dbri->dma->intr[dbri->dbri_irqp]) != 0) { x 1923 sound/sparc/dbri.c dbri_process_one_interrupt(dbri, x); x 1931 sound/sparc/dbri.c int x; x 1940 sound/sparc/dbri.c x = sbus_readl(dbri->regs + REG1); x 1942 sound/sparc/dbri.c if (x & (D_MRR | D_MLE | D_LBG | D_MBE)) { x 1945 sound/sparc/dbri.c if (x & D_MRR) x 1948 sound/sparc/dbri.c x); x 1949 sound/sparc/dbri.c if (x & D_MLE) x 1952 sound/sparc/dbri.c x); x 1953 sound/sparc/dbri.c if (x & D_LBG) x 1955 sound/sparc/dbri.c "DBRI: Lost Bus Grant on SBus reg1=0x%x\n", x); x 1956 sound/sparc/dbri.c if (x & D_MBE) x 1958 sound/sparc/dbri.c "DBRI: Burst Error on SBus reg1=0x%x\n", x); x 23 sound/synth/emux/emux_synth.c #define LIMITVALUE(x, a, b) do { if ((x) < (a)) (x) = (a); else if ((x) > (b)) (x) = (b); } while (0) x 24 sound/synth/emux/emux_synth.c #define LIMITMAX(x, a) do {if ((x) > (a)) (x) = (a); } while (0) x 73 sound/usb/line6/pod.c #define line6_to_pod(x) container_of(x, struct usb_line6_pod, line6) x 42 sound/usb/line6/podhd.c #define line6_to_podhd(x) container_of(x, struct usb_line6_podhd, line6) x 60 sound/usb/line6/toneport.c #define line6_to_toneport(x) container_of(x, struct usb_line6_toneport, line6) x 46 sound/usb/line6/variax.c #define line6_to_variax(x) container_of(x, struct usb_line6_variax, line6) x 1826 sound/usb/mixer_quirks.c #define SND_RME_CLK_SYSTEM(x) \ x 1827 sound/usb/mixer_quirks.c ((x >> SND_RME_CLK_SYSTEM_SHIFT) & SND_RME_CLK_SYSTEM_MASK) x 1828 sound/usb/mixer_quirks.c #define SND_RME_CLK_AES(x) \ x 1829 sound/usb/mixer_quirks.c ((x >> SND_RME_CLK_AES_SHIFT) & SND_RME_CLK_AES_SPDIF_MASK) x 1830 sound/usb/mixer_quirks.c #define SND_RME_CLK_SPDIF(x) \ x 1831 sound/usb/mixer_quirks.c ((x >> SND_RME_CLK_SPDIF_SHIFT) & SND_RME_CLK_AES_SPDIF_MASK) x 1832 sound/usb/mixer_quirks.c #define SND_RME_CLK_SYNC(x) \ x 1833 sound/usb/mixer_quirks.c ((x >> SND_RME_CLK_SYNC_SHIFT) & SND_RME_CLK_SYNC_MASK) x 1834 sound/usb/mixer_quirks.c #define SND_RME_CLK_FREQMUL(x) \ x 1835 sound/usb/mixer_quirks.c ((x >> SND_RME_CLK_FREQMUL_SHIFT) & SND_RME_CLK_FREQMUL_MASK) x 1843 sound/usb/mixer_quirks.c #define SND_RME_SPDIF_IF(x) \ x 1844 sound/usb/mixer_quirks.c ((x >> SND_RME_SPDIF_IF_SHIFT) & SND_RME_BINARY_MASK) x 1845 sound/usb/mixer_quirks.c #define SND_RME_SPDIF_FORMAT(x) \ x 1846 sound/usb/mixer_quirks.c ((x >> SND_RME_SPDIF_FORMAT_SHIFT) & SND_RME_BINARY_MASK) x 18 sound/usb/mixer_us16x08.h #define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) x 19 sound/usb/mixer_us16x08.h #define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) x 20 sound/usb/mixer_us16x08.h #define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) x 21 sound/usb/mixer_us16x08.h #define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) x 34 sound/usb/mixer_us16x08.h #define MUA0(x, y) ((x)[(y) * 10 + 4]) x 35 sound/usb/mixer_us16x08.h #define MUA1(x, y) ((x)[(y) * 10 + 5]) x 36 sound/usb/mixer_us16x08.h #define MUA2(x, y) ((x)[(y) * 10 + 6]) x 37 sound/usb/mixer_us16x08.h #define MUB0(x, y) ((x)[(y) * 10 + 7]) x 38 sound/usb/mixer_us16x08.h #define MUB1(x, y) ((x)[(y) * 10 + 8]) x 39 sound/usb/mixer_us16x08.h #define MUB2(x, y) ((x)[(y) * 10 + 9]) x 40 sound/usb/mixer_us16x08.h #define MUC0(x, y) ((x)[(y) * 10 + 10]) x 41 sound/usb/mixer_us16x08.h #define MUC1(x, y) ((x)[(y) * 10 + 11]) x 42 sound/usb/mixer_us16x08.h #define MUC2(x, y) ((x)[(y) * 10 + 12]) x 43 sound/usb/mixer_us16x08.h #define MUC3(x, y) ((x)[(y) * 10 + 13]) x 75 sound/usb/mixer_us16x08.h #define EQ_STORE_BAND_IDX(x) ((x) & 0xf) x 76 sound/usb/mixer_us16x08.h #define EQ_STORE_PARAM_IDX(x) (((x) & 0xf0) >> 4) x 90 sound/usb/mixer_us16x08.h #define COMP_STORE_IDX(x) ((x) - SND_US16X08_ID_COMP_BASE) x 865 sound/x86/intel_hdmi_audio.c #define AUD_BUF_ADDR(x) (AUD_BUF_A_ADDR + (x) * HAD_REG_WIDTH) x 866 sound/x86/intel_hdmi_audio.c #define AUD_BUF_LEN(x) (AUD_BUF_A_LENGTH + (x) * HAD_REG_WIDTH) x 162 tools/arch/arm/include/uapi/asm/kvm.h #define ARM_CP15_REG_SHIFT_MASK(x,n) \ x 163 tools/arch/arm/include/uapi/asm/kvm.h (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK) x 203 tools/arch/arm64/include/uapi/asm/kvm.h #define ARM64_SYS_REG_SHIFT_MASK(x,n) \ x 204 tools/arch/arm64/include/uapi/asm/kvm.h (((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) & \ x 372 tools/arch/x86/include/asm/cpufeatures.h #define X86_BUG(x) (NCAPINTS*32 + (x)) x 82 tools/bpf/bpf_dbg.c # define array_size(x) (sizeof(x) / sizeof((x)[0])) x 21 tools/bpf/bpftool/tracelog.c #define _textify(x) #x x 22 tools/bpf/bpftool/tracelog.c #define textify(x) _textify(x) x 4 tools/build/feature/test-sync-compare-and-swap.c volatile uint64_t x; x 12 tools/build/feature/test-sync-compare-and-swap.c old = __sync_val_compare_and_swap(&x, 0, 0); x 13 tools/build/feature/test-sync-compare-and-swap.c } while (!__sync_bool_compare_and_swap(&x, old, new)); x 24 tools/firmware/ihex2fw.c #define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) x 25 tools/firmware/ihex2fw.c #define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1) x 26 tools/firmware/ihex2fw.c #define ALIGN(x, a) __ALIGN_KERNEL((x), (a)) x 560 tools/hv/hv_kvp_daemon.c char *p, *x; x 582 tools/hv/hv_kvp_daemon.c x = strchr(p, '\n'); x 583 tools/hv/hv_kvp_daemon.c if (x) x 584 tools/hv/hv_kvp_daemon.c *x = '\0'; x 610 tools/hv/hv_kvp_daemon.c char *p, *x; x 625 tools/hv/hv_kvp_daemon.c x = strchr(p, '\n'); x 626 tools/hv/hv_kvp_daemon.c if (x) x 627 tools/hv/hv_kvp_daemon.c *x = '\0'; x 643 tools/hv/hv_kvp_daemon.c char *x; x 659 tools/hv/hv_kvp_daemon.c x = strchr(p, '\n'); x 660 tools/hv/hv_kvp_daemon.c if (x) x 661 tools/hv/hv_kvp_daemon.c *x = '\0'; x 951 tools/hv/hv_kvp_daemon.c char *p, *x; x 978 tools/hv/hv_kvp_daemon.c x = strchr(p, '\n'); x 979 tools/hv/hv_kvp_daemon.c if (x) x 980 tools/hv/hv_kvp_daemon.c *x = '\0'; x 1050 tools/hv/hv_kvp_daemon.c char *x; x 1060 tools/hv/hv_kvp_daemon.c x = strchr(start, ';'); x 1061 tools/hv/hv_kvp_daemon.c if (x) x 1062 tools/hv/hv_kvp_daemon.c *x = 0; x 1064 tools/hv/hv_kvp_daemon.c x = start + strlen(start); x 1074 tools/hv/hv_kvp_daemon.c if ((x - start) <= out_len) { x 1076 tools/hv/hv_kvp_daemon.c *offset += (x - start) + 1; x 292 tools/iio/iio_utils.c int x, y; x 294 tools/iio/iio_utils.c for (x = 0; x < cnt; x++) x 10 tools/include/asm-generic/bitops/__ffz.h #define ffz(x) __ffs(~(x)) x 13 tools/include/asm-generic/bitops/fls.h static __always_inline int fls(unsigned int x) x 17 tools/include/asm-generic/bitops/fls.h if (!x) x 19 tools/include/asm-generic/bitops/fls.h if (!(x & 0xffff0000u)) { x 20 tools/include/asm-generic/bitops/fls.h x <<= 16; x 23 tools/include/asm-generic/bitops/fls.h if (!(x & 0xff000000u)) { x 24 tools/include/asm-generic/bitops/fls.h x <<= 8; x 27 tools/include/asm-generic/bitops/fls.h if (!(x & 0xf0000000u)) { x 28 tools/include/asm-generic/bitops/fls.h x <<= 4; x 31 tools/include/asm-generic/bitops/fls.h if (!(x & 0xc0000000u)) { x 32 tools/include/asm-generic/bitops/fls.h x <<= 2; x 35 tools/include/asm-generic/bitops/fls.h if (!(x & 0x80000000u)) { x 36 tools/include/asm-generic/bitops/fls.h x <<= 1; x 19 tools/include/asm-generic/bitops/fls64.h static __always_inline int fls64(__u64 x) x 21 tools/include/asm-generic/bitops/fls64.h __u32 h = x >> 32; x 24 tools/include/asm-generic/bitops/fls64.h return fls(x); x 27 tools/include/asm-generic/bitops/fls64.h static __always_inline int fls64(__u64 x) x 29 tools/include/asm-generic/bitops/fls64.h if (x == 0) x 31 tools/include/asm-generic/bitops/fls64.h return __fls(x) + 1; x 4 tools/include/asm/export.h #define EXPORT_SYMBOL(x) x 5 tools/include/asm/export.h #define EXPORT_SYMBOL_GPL(x) x 37 tools/include/linux/compiler-gcc.h #define __aligned(x) __attribute__((aligned(x))) x 70 tools/include/linux/compiler.h # define likely(x) __builtin_expect(!!(x), 1) x 74 tools/include/linux/compiler.h # define unlikely(x) __builtin_expect(!!(x), 0) x 85 tools/include/linux/compiler.h #define uninitialized_var(x) x = *(&(x)) x 154 tools/include/linux/compiler.h #define READ_ONCE(x) \ x 156 tools/include/linux/compiler.h union { typeof(x) __val; char __c[1]; } __u = \ x 158 tools/include/linux/compiler.h __read_once_size(&(x), __u.__c, sizeof(x)); \ x 162 tools/include/linux/compiler.h #define WRITE_ONCE(x, val) \ x 164 tools/include/linux/compiler.h union { typeof(x) __val; char __c[1]; } __u = \ x 166 tools/include/linux/compiler.h __write_once_size(&(x), __u.__c, sizeof(x)); \ x 6 tools/include/linux/const.h #define UL(x) (_UL(x)) x 7 tools/include/linux/const.h #define ULL(x) (_ULL(x)) x 21 tools/include/linux/ctype.h #define __ismask(x) (_ctype[(int)(unsigned char)(x)]) x 9 tools/include/linux/debug_locks.h #define DEBUG_LOCKS_WARN_ON(x) WARN_ON(x) x 33 tools/include/linux/err.h #define IS_ERR_VALUE(x) unlikely((x) >= (unsigned long)-MAX_ERRNO) x 36 tools/include/linux/irqflags.h #define trace_lock_release(x, y) x 18 tools/include/linux/kernel.h #define PERF_ALIGN(x, a) __PERF_ALIGN_MASK(x, (typeof(x))(a)-1) x 19 tools/include/linux/kernel.h #define __PERF_ALIGN_MASK(x, mask) (((x)+(mask))&~(mask)) x 42 tools/include/linux/kernel.h #define max(x, y) ({ \ x 43 tools/include/linux/kernel.h typeof(x) _max1 = (x); \ x 50 tools/include/linux/kernel.h #define min(x, y) ({ \ x 51 tools/include/linux/kernel.h typeof(x) _min1 = (x); \ x 58 tools/include/linux/kernel.h #define roundup(x, y) ( \ x 61 tools/include/linux/kernel.h (((x) + (__y - 1)) / __y) * __y; \ x 115 tools/include/linux/kernel.h #define __round_mask(x, y) ((__typeof__(x))((y)-1)) x 116 tools/include/linux/kernel.h #define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) x 117 tools/include/linux/kernel.h #define round_down(x, y) ((x) & ~__round_mask(x, y)) x 59 tools/include/linux/lockdep.h #define atomic_inc(x) ((*(x))++) x 62 tools/include/linux/lockdep.h #define static_obj(x) 1 x 9 tools/include/linux/spinlock.h #define DEFINE_SPINLOCK(x) pthread_mutex_t x = PTHREAD_MUTEX_INITIALIZER x 10 tools/include/linux/spinlock.h #define __SPIN_LOCK_UNLOCKED(x) (pthread_mutex_t)PTHREAD_MUTEX_INITIALIZER x 11 tools/include/linux/spinlock.h #define spin_lock_init(x) pthread_mutex_init(x, NULL) x 13 tools/include/linux/spinlock.h #define spin_lock(x) pthread_mutex_lock(x) x 14 tools/include/linux/spinlock.h #define spin_unlock(x) pthread_mutex_unlock(x) x 15 tools/include/linux/spinlock.h #define spin_lock_bh(x) pthread_mutex_lock(x) x 16 tools/include/linux/spinlock.h #define spin_unlock_bh(x) pthread_mutex_unlock(x) x 17 tools/include/linux/spinlock.h #define spin_lock_irq(x) pthread_mutex_lock(x) x 18 tools/include/linux/spinlock.h #define spin_unlock_irq(x) pthread_mutex_unlock(x) x 19 tools/include/linux/spinlock.h #define spin_lock_irqsave(x, f) (void)f, pthread_mutex_lock(x) x 20 tools/include/linux/spinlock.h #define spin_unlock_irqrestore(x, f) (void)f, pthread_mutex_unlock(x) x 10 tools/include/linux/stringify.h #define __stringify_1(x...) #x x 11 tools/include/linux/stringify.h #define __stringify(x...) __stringify_1(x) x 7 tools/include/linux/unaligned/packed_struct.h struct __una_u16 { u16 x; } __packed; x 8 tools/include/linux/unaligned/packed_struct.h struct __una_u32 { u32 x; } __packed; x 9 tools/include/linux/unaligned/packed_struct.h struct __una_u64 { u64 x; } __packed; x 14 tools/include/linux/unaligned/packed_struct.h return ptr->x; x 20 tools/include/linux/unaligned/packed_struct.h return ptr->x; x 26 tools/include/linux/unaligned/packed_struct.h return ptr->x; x 32 tools/include/linux/unaligned/packed_struct.h ptr->x = val; x 38 tools/include/linux/unaligned/packed_struct.h ptr->x = val; x 44 tools/include/linux/unaligned/packed_struct.h ptr->x = val; x 23 tools/include/tools/config.h #define __is_defined(x) ___is_defined(x) x 10 tools/include/tools/endian.h #define htole16(x) (x) x 13 tools/include/tools/endian.h #define htole32(x) (x) x 16 tools/include/tools/endian.h #define htole64(x) (x) x 20 tools/include/tools/endian.h #define le16toh(x) (x) x 24 tools/include/tools/endian.h #define le32toh(x) (x) x 28 tools/include/tools/endian.h #define le64toh(x) (x) x 34 tools/include/tools/endian.h #define htole16(x) __bswap_16(x) x 37 tools/include/tools/endian.h #define htole32(x) __bswap_32(x) x 40 tools/include/tools/endian.h #define htole64(x) __bswap_64(x) x 44 tools/include/tools/endian.h #define le16toh(x) __bswap_16(x) x 48 tools/include/tools/endian.h #define le32toh(x) __bswap_32(x) x 52 tools/include/tools/endian.h #define le64toh(x) __bswap_64(x) x 16 tools/include/uapi/asm-generic/unistd.h #define __SYSCALL(x, y) x 174 tools/include/uapi/drm/i915_drm.h #define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) x 2870 tools/include/uapi/linux/bpf.h #define __BPF_ENUM_FN(x) BPF_FUNC_ ## x x 25 tools/include/uapi/linux/const.h #define _UL(x) (_AC(x, UL)) x 26 tools/include/uapi/linux/const.h #define _ULL(x) (_AC(x, ULL)) x 28 tools/include/uapi/linux/const.h #define _BITUL(x) (_UL(1) << (x)) x 29 tools/include/uapi/linux/const.h #define _BITULL(x) (_ULL(1) << (x)) x 782 tools/include/uapi/linux/kvm.h #define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ x 783 tools/include/uapi/linux/kvm.h ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) x 42 tools/include/uapi/linux/lirc.h #define LIRC_MODE2SEND(x) (x) x 43 tools/include/uapi/linux/lirc.h #define LIRC_SEND2MODE(x) (x) x 44 tools/include/uapi/linux/lirc.h #define LIRC_MODE2REC(x) ((x) << 16) x 45 tools/include/uapi/linux/lirc.h #define LIRC_REC2MODE(x) ((x) >> 16) x 85 tools/include/uapi/linux/lirc.h #define LIRC_CAN_SEND(x) ((x)&LIRC_CAN_SEND_MASK) x 86 tools/include/uapi/linux/lirc.h #define LIRC_CAN_REC(x) ((x)&LIRC_CAN_REC_MASK) x 19 tools/laptop/dslm/dslm.c #define D(x) x x 21 tools/laptop/dslm/dslm.c #define D(x) x 19 tools/lib/api/fs/fs.c #define _STR(x) #x x 20 tools/lib/api/fs/fs.c #define STR(x) _STR(x) x 2951 tools/lib/bpf/libbpf.c static void *u32_as_hash_key(__u32 x) x 2953 tools/lib/bpf/libbpf.c return (void *)(uintptr_t)x; x 27 tools/lib/bpf/libbpf_internal.h # define min(x, y) ((x) < (y) ? (x) : (y)) x 30 tools/lib/bpf/libbpf_internal.h # define max(x, y) ((x) < (y) ? (y) : (x)) x 16 tools/lib/subcmd/run-command.h #define IS_RUN_COMMAND_ERR(x) (-(x) >= ERR_RUN_COMMAND_FORK) x 30 tools/lib/subcmd/subcmd-util.h #define alloc_nr(x) (((x)+16)*3/2) x 39 tools/lib/subcmd/subcmd-util.h #define ALLOC_GROW(x, nr, alloc) \ x 46 tools/lib/subcmd/subcmd-util.h x = xrealloc((x), alloc * sizeof(*(x))); \ x 118 tools/lib/traceevent/event-parse.c static int x; x 119 tools/lib/traceevent/event-parse.c x++; x 126 tools/lib/traceevent/event-parse.h #define _MAKE_STR(x) #x x 127 tools/lib/traceevent/event-parse.h #define MAKE_STR(x) _MAKE_STR(x) x 23 tools/lib/traceevent/event-utils.h #define min(x, y) ({ \ x 24 tools/lib/traceevent/event-utils.h typeof(x) _min1 = (x); \ x 14 tools/lib/traceevent/plugins/plugin_cfg80211.c # define le16toh(x) (x) x 16 tools/lib/traceevent/plugins/plugin_cfg80211.c # define le16toh(x) __bswap_16 (x) x 179 tools/lib/traceevent/plugins/plugin_function.c int i, x; x 185 tools/lib/traceevent/plugins/plugin_function.c for (x = 0; x < fstack[i].size && fstack[i].stack[x]; x++) x 186 tools/lib/traceevent/plugins/plugin_function.c free(fstack[i].stack[x]); x 54 tools/lib/traceevent/plugins/plugin_xen.c #define N(x) [__HYPERVISOR_##x] = "("#x")" x 26 tools/perf/arch/arm64/util/arm-spe.c #define KiB(x) ((x) * 1024) x 27 tools/perf/arch/arm64/util/arm-spe.c #define MiB(x) ((x) * 1024 * 1024) x 22 tools/perf/arch/arm64/util/dwarf-regs.c {.name = __stringify(%x##num), .dwarfnum = num} x 80 tools/perf/arch/x86/include/perf_regs.h #define XMM(x) \ x 81 tools/perf/arch/x86/include/perf_regs.h case PERF_REG_X86_XMM ## x: \ x 82 tools/perf/arch/x86/include/perf_regs.h case PERF_REG_X86_XMM ## x + 1: \ x 83 tools/perf/arch/x86/include/perf_regs.h return "XMM" #x; x 25 tools/perf/arch/x86/tests/perf-time-to-tsc.c #define CHECK__(x) { \ x 26 tools/perf/arch/x86/tests/perf-time-to-tsc.c while ((x) < 0) { \ x 27 tools/perf/arch/x86/tests/perf-time-to-tsc.c pr_debug(#x " failed!\n"); \ x 32 tools/perf/arch/x86/tests/perf-time-to-tsc.c #define CHECK_NOT_NULL__(x) { \ x 33 tools/perf/arch/x86/tests/perf-time-to-tsc.c while ((x) == NULL) { \ x 34 tools/perf/arch/x86/tests/perf-time-to-tsc.c pr_debug(#x " failed!\n"); \ x 28 tools/perf/arch/x86/util/intel-bts.c #define KiB(x) ((x) * 1024) x 29 tools/perf/arch/x86/util/intel-bts.c #define MiB(x) ((x) * 1024 * 1024) x 30 tools/perf/arch/x86/util/intel-bts.c #define KiB_MASK(x) (KiB(x) - 1) x 31 tools/perf/arch/x86/util/intel-bts.c #define MiB_MASK(x) (MiB(x) - 1) x 33 tools/perf/arch/x86/util/intel-pt.c #define KiB(x) ((x) * 1024) x 34 tools/perf/arch/x86/util/intel-pt.c #define MiB(x) ((x) * 1024 * 1024) x 35 tools/perf/arch/x86/util/intel-pt.c #define KiB_MASK(x) (KiB(x) - 1) x 36 tools/perf/arch/x86/util/intel-pt.c #define MiB_MASK(x) (MiB(x) - 1) x 99 tools/perf/bench/mem-functions.c #define print_bps(x) do { \ x 100 tools/perf/bench/mem-functions.c if (x < K) \ x 101 tools/perf/bench/mem-functions.c printf(" %14lf bytes/sec\n", x); \ x 102 tools/perf/bench/mem-functions.c else if (x < K * K) \ x 103 tools/perf/bench/mem-functions.c printf(" %14lfd KB/sec\n", x / K); \ x 104 tools/perf/bench/mem-functions.c else if (x < K * K * K) \ x 105 tools/perf/bench/mem-functions.c printf(" %14lf MB/sec\n", x / K / K); \ x 107 tools/perf/bench/mem-functions.c printf(" %14lf GB/sec\n", x / K / K / K); \ x 47 tools/perf/bench/numa.c #define tprintf(x...) do { if (g && g->p.show_details >= 0) printf(x); } while (0) x 53 tools/perf/bench/numa.c #define dprintf(x...) do { if (g && g->p.show_details >= 1) printf(x); } while (0) x 736 tools/perf/bench/numa.c #define BIT(x) (1ul << x) x 1484 tools/perf/builtin-kmem.c double x, y; x 1488 tools/perf/builtin-kmem.c x = fragmentation(l->bytes_req, l->bytes_alloc); x 1491 tools/perf/builtin-kmem.c if (x < y) x 1493 tools/perf/builtin-kmem.c else if (x > y) x 350 tools/perf/builtin-script.c #define PRINT_FIELD(x) (output[output_type(attr->type)].fields & PERF_OUTPUT_##x) x 952 tools/perf/builtin-script.c struct perf_insn *x, u8 *inbuf, int len, x 956 tools/perf/builtin-script.c dump_insn(x, ip, inbuf, len, NULL), x 1016 tools/perf/builtin-script.c struct perf_insn x; x 1028 tools/perf/builtin-script.c x.thread = thread; x 1029 tools/perf/builtin-script.c x.cpu = sample->cpu; x 1036 tools/perf/builtin-script.c machine, thread, &x.is64bit, &x.cpumode, false); x 1039 tools/perf/builtin-script.c x.cpumode, x.cpu, &lastsym, attr, fp); x 1041 tools/perf/builtin-script.c &x, buffer, len, 0, fp, &total_cycles); x 1043 tools/perf/builtin-script.c printed += print_srccode(thread, x.cpumode, br->entries[nr - 1].from); x 1055 tools/perf/builtin-script.c len = grab_bb(buffer, start, end, machine, thread, &x.is64bit, &x.cpumode, false); x 1060 tools/perf/builtin-script.c len = grab_bb(buffer, start, end, machine, thread, &x.is64bit, &x.cpumode, false); x 1069 tools/perf/builtin-script.c printed += ip__fprintf_sym(ip, thread, x.cpumode, x.cpu, &lastsym, attr, fp); x 1071 tools/perf/builtin-script.c printed += ip__fprintf_jump(ip, &br->entries[i], &x, buffer + off, len - off, ++insn, fp, x 1074 tools/perf/builtin-script.c printed += print_srccode(thread, x.cpumode, ip); x 1079 tools/perf/builtin-script.c dump_insn(&x, ip, buffer + off, len - off, &ilen)); x 1083 tools/perf/builtin-script.c print_srccode(thread, x.cpumode, ip); x 1114 tools/perf/builtin-script.c len = grab_bb(buffer, start, end, machine, thread, &x.is64bit, &x.cpumode, true); x 1115 tools/perf/builtin-script.c printed += ip__fprintf_sym(start, thread, x.cpumode, x.cpu, &lastsym, attr, fp); x 1119 tools/perf/builtin-script.c machine, thread, &x.is64bit, &x.cpumode, false); x 1123 tools/perf/builtin-script.c dump_insn(&x, sample->ip, buffer, len, NULL)); x 1125 tools/perf/builtin-script.c print_srccode(thread, x.cpumode, sample->ip); x 1131 tools/perf/builtin-script.c dump_insn(&x, start + off, buffer + off, len - off, &ilen)); x 1134 tools/perf/builtin-script.c if (arch_is_branch(buffer + off, len - off, x.is64bit) && start + off != sample->ip) { x 1142 tools/perf/builtin-script.c print_srccode(thread, x.cpumode, start + off); x 238 tools/perf/builtin-stat.c #define SID(e, x, y) xyarray__entry(e->core.sample_id, x, y) x 182 tools/perf/lib/evlist.c #define SID(e, x, y) xyarray__entry(e->sample_id, x, y) x 40 tools/perf/lib/evsel.c #define FD(e, x, y) (*(int *) xyarray__entry(e->fd, x, y)) x 21 tools/perf/lib/include/internal/xyarray.h static inline void *xyarray__entry(struct xyarray *xy, int x, int y) x 23 tools/perf/lib/include/internal/xyarray.h return &xy->contents[x * xy->row_size + y * xy->entry_size]; x 15 tools/perf/pmu-events/jevents.h #define min(x, y) ({ \ x 16 tools/perf/pmu-events/jevents.h typeof(x) _min1 = (x); \ x 31 tools/perf/pmu-events/json.h #define roundup(x, y) ( \ x 34 tools/perf/pmu-events/json.h (((x) + (__y - 1)) / __y) * __y; \ x 18 tools/perf/tests/keep-tracking.c #define CHECK__(x) { \ x 19 tools/perf/tests/keep-tracking.c while ((x) < 0) { \ x 20 tools/perf/tests/keep-tracking.c pr_debug(#x " failed!\n"); \ x 25 tools/perf/tests/keep-tracking.c #define CHECK_NOT_NULL__(x) { \ x 26 tools/perf/tests/keep-tracking.c while ((x) == NULL) { \ x 27 tools/perf/tests/keep-tracking.c pr_debug(#x " failed!\n"); \ x 15 tools/perf/tests/vmlinux-kallsyms.c #define UM(x) kallsyms_map->unmap_ip(kallsyms_map, (x)) x 47 tools/perf/ui/browser.c void ui_browser__gotorc_title(struct ui_browser *browser, int y, int x) x 49 tools/perf/ui/browser.c SLsmg_gotorc(browser->y + y, browser->x + x); x 52 tools/perf/ui/browser.c void ui_browser__gotorc(struct ui_browser *browser, int y, int x) x 54 tools/perf/ui/browser.c SLsmg_gotorc(browser->y + y + browser->extra_title_lines, browser->x + x); x 200 tools/perf/ui/browser.c browser->x = 0; x 345 tools/perf/ui/browser.c SLsmg_fill_region(browser->y + row + browser->extra_title_lines, browser->x, x 20 tools/perf/ui/browser.h u16 y, x, width, height, rows, columns, horiz_scroll; x 44 tools/perf/ui/browser.h void ui_browser__gotorc_title(struct ui_browser *browser, int y, int x); x 45 tools/perf/ui/browser.h void ui_browser__gotorc(struct ui_browser *browser, int y, int x); x 74 tools/perf/ui/tui/util.c int x, y, len, key; x 99 tools/perf/ui/tui/util.c x = SLtt_Screen_Cols / 2 - max_len / 2; x 102 tools/perf/ui/tui/util.c SLsmg_draw_box(y, x++, nr_lines, max_len); x 104 tools/perf/ui/tui/util.c SLsmg_gotorc(y, x + 1); x 107 tools/perf/ui/tui/util.c SLsmg_gotorc(++y, x); x 110 tools/perf/ui/tui/util.c SLsmg_write_wrapped_string((unsigned char *)text, y, x, x 115 tools/perf/ui/tui/util.c SLsmg_gotorc(y + len - 1, x); x 118 tools/perf/ui/tui/util.c SLsmg_draw_box(y++, x + 1, 3, max_len - 2); x 120 tools/perf/ui/tui/util.c SLsmg_gotorc(y + 3, x); x 126 tools/perf/ui/tui/util.c x += 2; x 137 tools/perf/ui/tui/util.c SLsmg_gotorc(y, x + --len); x 141 tools/perf/ui/tui/util.c SLsmg_gotorc(y, x + len++); x 165 tools/perf/ui/tui/util.c int x, y; x 190 tools/perf/ui/tui/util.c x = SLtt_Screen_Cols / 2 - max_len / 2; x 193 tools/perf/ui/tui/util.c SLsmg_draw_box(y, x++, nr_lines, max_len); x 195 tools/perf/ui/tui/util.c SLsmg_gotorc(y, x + 1); x 198 tools/perf/ui/tui/util.c SLsmg_gotorc(++y, x); x 202 tools/perf/ui/tui/util.c SLsmg_write_wrapped_string((unsigned char *)text, y, x, x 205 tools/perf/ui/tui/util.c SLsmg_gotorc(y + nr_lines - 2, x); x 207 tools/perf/ui/tui/util.c SLsmg_gotorc(y + nr_lines - 1, x); x 22 tools/perf/util/cache.h #define alloc_nr(x) (((x)+16)*3/2) x 161 tools/perf/util/cs-etm.h #define KiB(x) ((x) * 1024) x 162 tools/perf/util/cs-etm.h #define MiB(x) ((x) * 1024 * 1024) x 8 tools/perf/util/dump-insn.c const char *dump_insn(struct perf_insn *x __maybe_unused, x 21 tools/perf/util/dump-insn.h const char *dump_insn(struct perf_insn *x, u64 ip, x 52 tools/perf/util/evlist.c #define FD(e, x, y) (*(int *)xyarray__entry(e->core.fd, x, y)) x 53 tools/perf/util/evlist.c #define SID(e, x, y) xyarray__entry(e->core.sample_id, x, y) x 103 tools/perf/util/evsel.c #define FD(e, x, y) (*(int *)xyarray__entry(e->core.fd, x, y)) x 513 tools/perf/util/evsel.c #define C(x) PERF_COUNT_HW_CACHE_##x x 517 tools/perf/util/evsel.c #define COP(x) (1 << x) x 192 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c static uint64_t intel_pt_lower_power_of_2(uint64_t x) x 196 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c for (i = 0; x != 1; i++) x 197 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c x >>= 1; x 199 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c return x << i; x 182 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c const char *dump_insn(struct perf_insn *x, uint64_t ip __maybe_unused, x 189 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c insn_init(&insn, inbuf, inlen, x->is64bit); x 195 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c left = sizeof(x->out); x 196 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c n = snprintf(x->out, left, "insn: "); x 199 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c n += snprintf(x->out + n, left, "%02x ", inbuf[i]); x 202 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c return x->out; x 22 tools/perf/util/jitdump.h #define PADDING_8ALIGNED(x) ((((x) + 7) & 7) ^ 7) x 23 tools/perf/util/jitdump.h #define ALIGN_8(x) (((x) + 7) & (~7)) x 633 tools/perf/util/stat-shadow.c static double sanitize_val(double x) x 635 tools/perf/util/stat-shadow.c if (x < 0 && x >= -0.02) x 637 tools/perf/util/stat-shadow.c return x; x 88 tools/perf/util/stat.c ID(NONE, x), x 317 tools/perf/util/trace-event-read.c int i,x; x 329 tools/perf/util/trace-event-read.c for (x=0; x < count; x++) { x 34 tools/perf/util/util.h #define KVER_VERSION(x) (((x) >> 16) & 0xff) x 35 tools/perf/util/util.h #define KVER_PATCHLEVEL(x) (((x) >> 8) & 0xff) x 36 tools/perf/util/util.h #define KVER_SUBLEVEL(x) ((x) & 0xff) x 38 tools/perf/util/util.h #define KVER_PARAM(x) KVER_VERSION(x), KVER_PATCHLEVEL(x), KVER_SUBLEVEL(x) x 8 tools/power/cpupower/bench/benchmark.h #define ROUNDS(x) {unsigned int rcnt; \ x 9 tools/power/cpupower/bench/benchmark.h for (rcnt = 0; rcnt < x*1000; rcnt++) { \ x 23 tools/power/cpupower/utils/cpupower.c #define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) x 122 tools/power/cpupower/utils/cpupower.c int ret, x, new_argc = 0; x 127 tools/power/cpupower/utils/cpupower.c for (x = 0; x < *argc && ((*argv)[x])[0] == '-'; x++) { x 128 tools/power/cpupower/utils/cpupower.c const char *param = (*argv)[x]; x 137 tools/power/cpupower/utils/cpupower.c if (!strcmp((*argv)[x+1], "all")) x 141 tools/power/cpupower/utils/cpupower.c (*argv)[x+1], cpus_chosen); x 148 tools/power/cpupower/utils/cpupower.c x += 1; x 12 tools/power/cpupower/utils/helpers/bitmask.c #define howmany(x, y) (((x)+((y)-1))/(y)) x 50 tools/power/cpupower/utils/helpers/cpuid.c unsigned int proc, x; x 79 tools/power/cpupower/utils/helpers/cpuid.c for (x = 1; x < X86_VENDOR_MAX; x++) { x 80 tools/power/cpupower/utils/helpers/cpuid.c if (strstr(value, cpu_vendor_table[x])) x 81 tools/power/cpupower/utils/helpers/cpuid.c cpu_info->vendor = x; x 24 tools/power/cpupower/utils/idle_monitor/cpupower-monitor.c #define DEF(x) & x ## _monitor , x 68 tools/power/cpupower/utils/idle_monitor/cpupower-monitor.c int x; x 69 tools/power/cpupower/utils/idle_monitor/cpupower-monitor.c for (x = 0; x < n; x++) x 11 tools/power/cpupower/utils/idle_monitor/idle_monitors.h #define DEF(x) extern struct cpuidle_monitor x ##_monitor; x 31 tools/power/x86/intel-speed-select/isst.h #define BIT(x) (1 << (x)) x 17 tools/testing/nvdimm/watermark.h #define nfit_test_watermark(x) \ x 18 tools/testing/nvdimm/watermark.h int x##_test(void) \ x 23 tools/testing/nvdimm/watermark.h EXPORT_SYMBOL(x##_test) x 411 tools/testing/radix-tree/idr-test.c #define module_init(x) x 412 tools/testing/radix-tree/idr-test.c #define module_exit(x) x 413 tools/testing/radix-tree/idr-test.c #define MODULE_AUTHOR(x) x 414 tools/testing/radix-tree/idr-test.c #define MODULE_LICENSE(x) x 21 tools/testing/radix-tree/linux/kernel.h #define __acquires(x) x 22 tools/testing/radix-tree/linux/kernel.h #define __releases(x) x 23 tools/testing/radix-tree/linux/kernel.h #define __must_hold(x) x 24 tools/testing/radix-tree/linux/radix-tree.h #define call_rcu(x, y) trace_call_rcu(x, y) x 10 tools/testing/radix-tree/xarray.c #define module_init(x) x 11 tools/testing/radix-tree/xarray.c #define module_exit(x) x 12 tools/testing/radix-tree/xarray.c #define MODULE_AUTHOR(x) x 13 tools/testing/radix-tree/xarray.c #define MODULE_LICENSE(x) x 15 tools/testing/scatterlist/linux/mm.h #define BUG_ON(x) assert(!(x)) x 33 tools/testing/scatterlist/linux/mm.h #define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1) x 34 tools/testing/scatterlist/linux/mm.h #define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) x 35 tools/testing/scatterlist/linux/mm.h #define ALIGN(x, a) __ALIGN_KERNEL((x), (a)) x 41 tools/testing/scatterlist/linux/mm.h #define virt_to_page(x) ((void *)x) x 42 tools/testing/scatterlist/linux/mm.h #define page_address(x) ((void *)x) x 55 tools/testing/scatterlist/linux/mm.h #define __min(t1, t2, min1, min2, x, y) ({ \ x 56 tools/testing/scatterlist/linux/mm.h t1 min1 = (x); \ x 66 tools/testing/scatterlist/linux/mm.h #define min(x, y) \ x 67 tools/testing/scatterlist/linux/mm.h __min(typeof(x), typeof(y), \ x 69 tools/testing/scatterlist/linux/mm.h x, y) x 71 tools/testing/scatterlist/linux/mm.h #define min_t(type, x, y) \ x 74 tools/testing/scatterlist/linux/mm.h x, y) x 117 tools/testing/scatterlist/linux/mm.h #define kfree(x) free(x) x 24 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_ntohs(x) __builtin_bswap16(x) x 25 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_htons(x) __builtin_bswap16(x) x 26 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_ntohs(x) ___constant_swab16(x) x 27 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_htons(x) ___constant_swab16(x) x 28 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_ntohl(x) __builtin_bswap32(x) x 29 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_htonl(x) __builtin_bswap32(x) x 30 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_ntohl(x) ___constant_swab32(x) x 31 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_htonl(x) ___constant_swab32(x) x 32 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_be64_to_cpu(x) __builtin_bswap64(x) x 33 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_cpu_to_be64(x) __builtin_bswap64(x) x 34 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_be64_to_cpu(x) ___constant_swab64(x) x 35 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_cpu_to_be64(x) ___constant_swab64(x) x 37 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_ntohs(x) (x) x 38 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_htons(x) (x) x 39 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_ntohs(x) (x) x 40 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_htons(x) (x) x 41 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_ntohl(x) (x) x 42 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_htonl(x) (x) x 43 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_ntohl(x) (x) x 44 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_htonl(x) (x) x 45 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_be64_to_cpu(x) (x) x 46 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_cpu_to_be64(x) (x) x 47 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_be64_to_cpu(x) (x) x 48 tools/testing/selftests/bpf/bpf_endian.h # define __bpf_constant_cpu_to_be64(x) (x) x 53 tools/testing/selftests/bpf/bpf_endian.h #define bpf_htons(x) \ x 54 tools/testing/selftests/bpf/bpf_endian.h (__builtin_constant_p(x) ? \ x 55 tools/testing/selftests/bpf/bpf_endian.h __bpf_constant_htons(x) : __bpf_htons(x)) x 56 tools/testing/selftests/bpf/bpf_endian.h #define bpf_ntohs(x) \ x 57 tools/testing/selftests/bpf/bpf_endian.h (__builtin_constant_p(x) ? \ x 58 tools/testing/selftests/bpf/bpf_endian.h __bpf_constant_ntohs(x) : __bpf_ntohs(x)) x 59 tools/testing/selftests/bpf/bpf_endian.h #define bpf_htonl(x) \ x 60 tools/testing/selftests/bpf/bpf_endian.h (__builtin_constant_p(x) ? \ x 61 tools/testing/selftests/bpf/bpf_endian.h __bpf_constant_htonl(x) : __bpf_htonl(x)) x 62 tools/testing/selftests/bpf/bpf_endian.h #define bpf_ntohl(x) \ x 63 tools/testing/selftests/bpf/bpf_endian.h (__builtin_constant_p(x) ? \ x 64 tools/testing/selftests/bpf/bpf_endian.h __bpf_constant_ntohl(x) : __bpf_ntohl(x)) x 65 tools/testing/selftests/bpf/bpf_endian.h #define bpf_cpu_to_be64(x) \ x 66 tools/testing/selftests/bpf/bpf_endian.h (__builtin_constant_p(x) ? \ x 67 tools/testing/selftests/bpf/bpf_endian.h __bpf_constant_cpu_to_be64(x) : __bpf_cpu_to_be64(x)) x 68 tools/testing/selftests/bpf/bpf_endian.h #define bpf_be64_to_cpu(x) \ x 69 tools/testing/selftests/bpf/bpf_endian.h (__builtin_constant_p(x) ? \ x 70 tools/testing/selftests/bpf/bpf_endian.h __bpf_constant_be64_to_cpu(x) : __bpf_be64_to_cpu(x)) x 373 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) ((x)->di) x 374 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) ((x)->si) x 375 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) ((x)->dx) x 376 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) ((x)->cx) x 377 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) ((x)->r8) x 378 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) ((x)->sp) x 379 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_FP(x) ((x)->bp) x 380 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) ((x)->ax) x 381 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) ((x)->sp) x 382 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->ip) x 386 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) ((x)->eax) x 387 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) ((x)->edx) x 388 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) ((x)->ecx) x 389 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) 0 x 390 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) 0 x 391 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) ((x)->esp) x 392 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_FP(x) ((x)->ebp) x 393 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) ((x)->eax) x 394 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) ((x)->esp) x 395 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->eip) x 397 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) ((x)->rdi) x 398 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) ((x)->rsi) x 399 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) ((x)->rdx) x 400 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) ((x)->rcx) x 401 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) ((x)->r8) x 402 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) ((x)->rsp) x 403 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_FP(x) ((x)->rbp) x 404 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) ((x)->rax) x 405 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) ((x)->rsp) x 406 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->rip) x 415 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) (((PT_REGS_S390 *)(x))->gprs[2]) x 416 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) (((PT_REGS_S390 *)(x))->gprs[3]) x 417 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) (((PT_REGS_S390 *)(x))->gprs[4]) x 418 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) (((PT_REGS_S390 *)(x))->gprs[5]) x 419 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) (((PT_REGS_S390 *)(x))->gprs[6]) x 420 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) (((PT_REGS_S390 *)(x))->gprs[14]) x 422 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_FP(x) (((PT_REGS_S390 *)(x))->gprs[11]) x 423 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) (((PT_REGS_S390 *)(x))->gprs[2]) x 424 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) (((PT_REGS_S390 *)(x))->gprs[15]) x 425 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) (((PT_REGS_S390 *)(x))->psw.addr) x 429 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) ((x)->uregs[0]) x 430 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) ((x)->uregs[1]) x 431 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) ((x)->uregs[2]) x 432 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) ((x)->uregs[3]) x 433 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) ((x)->uregs[4]) x 434 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) ((x)->uregs[14]) x 435 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_FP(x) ((x)->uregs[11]) /* Works only with CONFIG_FRAME_POINTER */ x 436 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) ((x)->uregs[0]) x 437 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) ((x)->uregs[13]) x 438 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->uregs[12]) x 445 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) (((PT_REGS_ARM64 *)(x))->regs[0]) x 446 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) (((PT_REGS_ARM64 *)(x))->regs[1]) x 447 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) (((PT_REGS_ARM64 *)(x))->regs[2]) x 448 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) (((PT_REGS_ARM64 *)(x))->regs[3]) x 449 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) (((PT_REGS_ARM64 *)(x))->regs[4]) x 450 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) (((PT_REGS_ARM64 *)(x))->regs[30]) x 452 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_FP(x) (((PT_REGS_ARM64 *)(x))->regs[29]) x 453 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) (((PT_REGS_ARM64 *)(x))->regs[0]) x 454 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) (((PT_REGS_ARM64 *)(x))->sp) x 455 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) (((PT_REGS_ARM64 *)(x))->pc) x 459 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) ((x)->regs[4]) x 460 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) ((x)->regs[5]) x 461 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) ((x)->regs[6]) x 462 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) ((x)->regs[7]) x 463 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) ((x)->regs[8]) x 464 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) ((x)->regs[31]) x 465 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_FP(x) ((x)->regs[30]) /* Works only with CONFIG_FRAME_POINTER */ x 466 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) ((x)->regs[1]) x 467 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) ((x)->regs[29]) x 468 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->cp0_epc) x 472 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) ((x)->gpr[3]) x 473 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) ((x)->gpr[4]) x 474 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) ((x)->gpr[5]) x 475 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) ((x)->gpr[6]) x 476 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) ((x)->gpr[7]) x 477 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) ((x)->gpr[3]) x 478 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) ((x)->sp) x 479 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->nip) x 483 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM1(x) ((x)->u_regs[UREG_I0]) x 484 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM2(x) ((x)->u_regs[UREG_I1]) x 485 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM3(x) ((x)->u_regs[UREG_I2]) x 486 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM4(x) ((x)->u_regs[UREG_I3]) x 487 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_PARM5(x) ((x)->u_regs[UREG_I4]) x 488 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RET(x) ((x)->u_regs[UREG_I7]) x 489 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_RC(x) ((x)->u_regs[UREG_I0]) x 490 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_SP(x) ((x)->u_regs[UREG_FP]) x 494 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->tpc) x 496 tools/testing/selftests/bpf/bpf_helpers.h #define PT_REGS_IP(x) ((x)->pc) x 15 tools/testing/selftests/bpf/bpf_rand.h #define bpf_rand_ux(x, m) \ x 16 tools/testing/selftests/bpf/bpf_rand.h static inline uint64_t bpf_rand_u##x(int shift) \ x 31 tools/testing/selftests/bpf/bpf_util.h # define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 121 tools/testing/selftests/bpf/prog_tests/core_reloc.c .g = { .x = 7 }, \ x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays.c void f(struct core_reloc_arrays x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays___diff_arr_dim.c void f(struct core_reloc_arrays___diff_arr_dim x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays___diff_arr_val_sz.c void f(struct core_reloc_arrays___diff_arr_val_sz x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays___err_non_array.c void f(struct core_reloc_arrays___err_non_array x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays___err_too_shallow.c void f(struct core_reloc_arrays___err_too_shallow x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays___err_too_small.c void f(struct core_reloc_arrays___err_too_small x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays___err_wrong_val_type1.c void f(struct core_reloc_arrays___err_wrong_val_type1 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_arrays___err_wrong_val_type2.c void f(struct core_reloc_arrays___err_wrong_val_type2 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_flavors.c void f(struct core_reloc_flavors x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_flavors__err_wrong_name.c void f(struct core_reloc_flavors__err_wrong_name x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints.c void f(struct core_reloc_ints x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints___bool.c void f(struct core_reloc_ints___bool x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints___err_bitfield.c void f(struct core_reloc_ints___err_bitfield x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints___err_wrong_sz_16.c void f(struct core_reloc_ints___err_wrong_sz_16 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints___err_wrong_sz_32.c void f(struct core_reloc_ints___err_wrong_sz_32 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints___err_wrong_sz_64.c void f(struct core_reloc_ints___err_wrong_sz_64 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints___err_wrong_sz_8.c void f(struct core_reloc_ints___err_wrong_sz_8 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ints___reverse_sign.c void f(struct core_reloc_ints___reverse_sign x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_misc.c void f1(struct core_reloc_misc___a x) {} x 4 tools/testing/selftests/bpf/progs/btf__core_reloc_misc.c void f2(struct core_reloc_misc___b x) {} x 5 tools/testing/selftests/bpf/progs/btf__core_reloc_misc.c void f3(struct core_reloc_misc_extensible x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_mods.c void f(struct core_reloc_mods x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_mods___mod_swap.c void f(struct core_reloc_mods___mod_swap x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_mods___typedefs.c void f(struct core_reloc_mods___typedefs x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting.c void f(struct core_reloc_nesting x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___anon_embed.c void f(struct core_reloc_nesting___anon_embed x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___dup_compat_types.c void f1(struct core_reloc_nesting___dup_compat_types x) {} x 4 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___dup_compat_types.c void f2(struct core_reloc_nesting___dup_compat_types__2 x) {} x 5 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___dup_compat_types.c void f3(struct core_reloc_nesting___dup_compat_types__3 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_array_container.c void f(struct core_reloc_nesting___err_array_container x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_array_field.c void f(struct core_reloc_nesting___err_array_field x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_dup_incompat_types.c void f1(struct core_reloc_nesting___err_dup_incompat_types__1 x) {} x 4 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_dup_incompat_types.c void f2(struct core_reloc_nesting___err_dup_incompat_types__2 x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_missing_container.c void f(struct core_reloc_nesting___err_missing_container x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_missing_field.c void f(struct core_reloc_nesting___err_missing_field x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_nonstruct_container.c void f(struct core_reloc_nesting___err_nonstruct_container x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_partial_match_dups.c void f1(struct core_reloc_nesting___err_partial_match_dups__a x) {} x 4 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_partial_match_dups.c void f2(struct core_reloc_nesting___err_partial_match_dups__b x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___err_too_deep.c void f(struct core_reloc_nesting___err_too_deep x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___extra_nesting.c void f(struct core_reloc_nesting___extra_nesting x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_nesting___struct_union_mixup.c void f(struct core_reloc_nesting___struct_union_mixup x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_primitives.c void f(struct core_reloc_primitives x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_primitives___diff_enum_def.c void f(struct core_reloc_primitives___diff_enum_def x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_primitives___diff_func_proto.c void f(struct core_reloc_primitives___diff_func_proto x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_primitives___diff_ptr_type.c void f(struct core_reloc_primitives___diff_ptr_type x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_primitives___err_non_enum.c void f(struct core_reloc_primitives___err_non_enum x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_primitives___err_non_int.c void f(struct core_reloc_primitives___err_non_int x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_primitives___err_non_ptr.c void f(struct core_reloc_primitives___err_non_ptr x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ptr_as_arr.c void f(struct core_reloc_ptr_as_arr x) {} x 3 tools/testing/selftests/bpf/progs/btf__core_reloc_ptr_as_arr___diff_sz.c void f(struct core_reloc_ptr_as_arr___diff_sz x) {} x 64 tools/testing/selftests/bpf/progs/btf_dump_test_case_namespacing.c struct X x; x 96 tools/testing/selftests/bpf/progs/btf_dump_test_case_padding.c char x[0]; x 115 tools/testing/selftests/bpf/progs/btf_dump_test_case_syntax.c int x; x 168 tools/testing/selftests/bpf/progs/core_reloc_types.h int x; x 195 tools/testing/selftests/bpf/progs/core_reloc_types.h int x; x 473 tools/testing/selftests/bpf/progs/core_reloc_types.h int x; x 478 tools/testing/selftests/bpf/progs/core_reloc_types.h int x; x 503 tools/testing/selftests/bpf/progs/core_reloc_types.h int x; x 24 tools/testing/selftests/bpf/progs/test_core_reloc_mods.c int x; x 29 tools/testing/selftests/bpf/progs/test_core_reloc_mods.c int x; x 56 tools/testing/selftests/bpf/progs/test_core_reloc_mods.c BPF_CORE_READ(&out->g, &in->g.x) || x 13 tools/testing/selftests/bpf/progs/test_sysctl_loop1.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 13 tools/testing/selftests/bpf/progs/test_sysctl_loop2.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 19 tools/testing/selftests/bpf/progs/test_sysctl_prog.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 700 tools/testing/selftests/bpf/progs/test_tunnel_kern.c struct bpf_xfrm_state x; x 704 tools/testing/selftests/bpf/progs/test_tunnel_kern.c ret = bpf_skb_get_xfrm_state(skb, 0, &x, sizeof(x), 0); x 708 tools/testing/selftests/bpf/progs/test_tunnel_kern.c bpf_trace_printk(fmt, sizeof(fmt), x.reqid, bpf_ntohl(x.spi), x 709 tools/testing/selftests/bpf/progs/test_tunnel_kern.c bpf_ntohl(x.remote_ipv4)); x 7 tools/testing/selftests/bpf/progs/test_xdp_meta.c #define __round_mask(x, y) ((__typeof__(x))((y) - 1)) x 8 tools/testing/selftests/bpf/progs/test_xdp_meta.c #define round_up(x, y) ((((x) - 1) | __round_mask(x, y)) + 1) x 8 tools/testing/selftests/cgroup/cgroup_util.h #define MB(x) (x << 20) x 357 tools/testing/selftests/cgroup/test_core.c #define T(x) { x, #x } x 864 tools/testing/selftests/cgroup/test_freezer.c #define T(x) { x, #x } x 1173 tools/testing/selftests/cgroup/test_memcontrol.c #define T(x) { x, #x } x 16 tools/testing/selftests/kselftest_module.h #define KSTM_CHECK_ZERO(x) do { \ x 18 tools/testing/selftests/kselftest_module.h if (x) { \ x 13 tools/testing/selftests/kvm/include/aarch64/processor.h #define ARM64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ x 14 tools/testing/selftests/kvm/include/aarch64/processor.h KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x)) x 576 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_HIGHEST_PERF(x) (((x) >> 0) & 0xff) x 577 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_GUARANTEED_PERF(x) (((x) >> 8) & 0xff) x 578 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_MOSTEFFICIENT_PERF(x) (((x) >> 16) & 0xff) x 579 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_LOWEST_PERF(x) (((x) >> 24) & 0xff) x 582 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_MIN_PERF(x) (x & 0xff) x 583 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_MAX_PERF(x) ((x & 0xff) << 8) x 584 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_DESIRED_PERF(x) ((x & 0xff) << 16) x 585 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_ENERGY_PERF_PREFERENCE(x) (((unsigned long long) x & 0xff) << 24) x 590 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_ACTIVITY_WINDOW(x) ((unsigned long long)(x & 0xff3) << 32) x 591 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_PACKAGE_CONTROL(x) ((unsigned long long)(x & 0x1) << 42) x 594 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_GUARANTEED_CHANGE(x) (x & 0x1) x 595 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_EXCURSION_TO_MINIMUM(x) (x & 0x4) x 598 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_CHANGE_TO_GUARANTEED_INT(x) (x & 0x1) x 599 tools/testing/selftests/kvm/include/x86_64/processor.h #define HWP_EXCURSION_TO_MINIMUM_INT(x) (x & 0x2) x 603 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) x 604 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) x 605 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x)) x 606 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x)) x 608 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_AMD64_MCx_MASK(x) (MSR_AMD64_MC0_MASK + (x)) x 612 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x)) x 23 tools/testing/selftests/kvm/lib/kvm_util.c static void *align(void *x, size_t size) x 28 tools/testing/selftests/kvm/lib/kvm_util.c return (void *) (((size_t) x + mask) & ~mask); x 2063 tools/testing/selftests/kvm/lib/sparsebit.c uint64_t x; x 2065 tools/testing/selftests/kvm/lib/sparsebit.c x = get8(); x 2066 tools/testing/selftests/kvm/lib/sparsebit.c x = (x << 8) | get8(); x 2067 tools/testing/selftests/kvm/lib/sparsebit.c x = (x << 8) | get8(); x 2068 tools/testing/selftests/kvm/lib/sparsebit.c x = (x << 8) | get8(); x 2069 tools/testing/selftests/kvm/lib/sparsebit.c x = (x << 8) | get8(); x 2070 tools/testing/selftests/kvm/lib/sparsebit.c x = (x << 8) | get8(); x 2071 tools/testing/selftests/kvm/lib/sparsebit.c x = (x << 8) | get8(); x 2072 tools/testing/selftests/kvm/lib/sparsebit.c return (x << 8) | get8(); x 31 tools/testing/selftests/kvm/x86_64/smm_test.c #define STR(x) #x x 31 tools/testing/selftests/net/ipv6_flowlabel_mgr.c #define explain(x) \ x 32 tools/testing/selftests/net/ipv6_flowlabel_mgr.c do { if (cfg_verbose) fprintf(stderr, " " x "\n"); } while (0) x 34 tools/testing/selftests/net/ipv6_flowlabel_mgr.c #define __expect(x) \ x 36 tools/testing/selftests/net/ipv6_flowlabel_mgr.c if (!(x)) \ x 37 tools/testing/selftests/net/ipv6_flowlabel_mgr.c fprintf(stderr, "[OK] " #x "\n"); \ x 39 tools/testing/selftests/net/ipv6_flowlabel_mgr.c error(1, 0, "[ERR] " #x " (line %d)", __LINE__); \ x 42 tools/testing/selftests/net/ipv6_flowlabel_mgr.c #define expect_pass(x) __expect(x) x 43 tools/testing/selftests/net/ipv6_flowlabel_mgr.c #define expect_fail(x) __expect(!(x)) x 60 tools/testing/selftests/net/psock_tpacket.c # define __align_tpacket(x) __attribute__((aligned(TPACKET_ALIGN(x)))) x 64 tools/testing/selftests/net/psock_tpacket.c #define ALIGN_8(x) (((x) + 8 - 1) & ~(8 - 1)) x 89 tools/testing/selftests/net/tcp_mmap.c static inline void prefetch(const void *x) x 92 tools/testing/selftests/net/tcp_mmap.c asm volatile("prefetcht0 %P0" : : "m" (*(const char *)x)); x 2 tools/testing/selftests/powerpc/copyloops/asm/export.h #define EXPORT_SYMBOL(x) x 3 tools/testing/selftests/powerpc/copyloops/asm/export.h #define EXPORT_SYMBOL_GPL(x) x 4 tools/testing/selftests/powerpc/copyloops/asm/export.h #define EXPORT_SYMBOL_KASAN(x) x 32 tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h #define EX_TABLE(x, y) \ x 34 tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h .8byte x, y; \ x 39 tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h #define ALT_FTR_SECTION_END_IFCLR(x) .endif x 40 tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h #define ALT_FTR_SECTION_END_IFSET(x) .endif x 41 tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h #define ALT_FTR_SECTION_END(x, y) .endif x 42 tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h #define END_FTR_SECTION_IFCLR(x) .endif x 43 tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h #define END_FTR_SECTION_IFSET(x) .endif x 39 tools/testing/selftests/powerpc/dscr/dscr.h #define READ_ONCE(x) (*(volatile typeof(x) *)&(x)) x 9 tools/testing/selftests/powerpc/include/reg.h #define __stringify_1(x) #x x 10 tools/testing/selftests/powerpc/include/reg.h #define __stringify(x) __stringify_1(x) x 64 tools/testing/selftests/powerpc/include/utils.h #define FAIL_IF(x) \ x 66 tools/testing/selftests/powerpc/include/utils.h if ((x)) { \ x 76 tools/testing/selftests/powerpc/include/utils.h #define SKIP_IF(x) \ x 78 tools/testing/selftests/powerpc/include/utils.h if ((x)) { \ x 85 tools/testing/selftests/powerpc/include/utils.h #define SKIP_IF_MSG(x, msg) \ x 87 tools/testing/selftests/powerpc/include/utils.h if ((x)) { \ x 6 tools/testing/selftests/powerpc/primitives/asm/asm-const.h # define ASM_CONST(x) x x 11 tools/testing/selftests/powerpc/primitives/asm/asm-const.h # define __ASM_CONST(x) x##UL x 12 tools/testing/selftests/powerpc/primitives/asm/asm-const.h # define ASM_CONST(x) __ASM_CONST(x) x 320 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h .macro __LOAD_REG_IMMEDIATE_32 r, x x 331 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h .macro __LOAD_REG_IMMEDIATE r, x x 24 tools/testing/selftests/powerpc/primitives/load_unaligned_zeropad.c static inline unsigned long __fls(unsigned long x); x 30 tools/testing/selftests/powerpc/primitives/load_unaligned_zeropad.c static inline unsigned long __fls(unsigned long x) x 34 tools/testing/selftests/powerpc/primitives/load_unaligned_zeropad.c asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x)); x 29 tools/testing/selftests/powerpc/ptrace/child.h #define CHILD_FAIL_IF(x, sync) \ x 31 tools/testing/selftests/powerpc/ptrace/child.h if (x) { \ x 40 tools/testing/selftests/powerpc/ptrace/child.h #define PARENT_FAIL_IF(x, sync) \ x 42 tools/testing/selftests/powerpc/ptrace/child.h if (x) { \ x 51 tools/testing/selftests/powerpc/ptrace/child.h #define PARENT_SKIP_IF_UNSUPPORTED(x, sync) \ x 53 tools/testing/selftests/powerpc/ptrace/child.h if ((x) == -1 && (errno == ENODEV || errno == EINVAL)) { \ x 65 tools/testing/selftests/powerpc/signal/sigfuz.c static int one_in_chance(int x) x 67 tools/testing/selftests/powerpc/signal/sigfuz.c return rand() % x == 0; x 1 tools/testing/selftests/powerpc/stringloops/asm/export.h #define EXPORT_SYMBOL(x) x 13 tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h # define ASM_CONST(x) x x 39 tools/testing/selftests/powerpc/stringloops/memcmp.c int x, y; x 43 tools/testing/selftests/powerpc/stringloops/memcmp.c x = test_memcmp(s1+offset, s2+offset, size); x 45 tools/testing/selftests/powerpc/stringloops/memcmp.c if (((x ^ y) < 0) && /* Trick to compare sign */ x 46 tools/testing/selftests/powerpc/stringloops/memcmp.c ((x | y) != 0)) { /* check for zero */ x 47 tools/testing/selftests/powerpc/stringloops/memcmp.c printf("memcmp returned %d, should have returned %d (offset %ld size %ld)\n", x, y, offset, size); x 20 tools/testing/selftests/powerpc/stringloops/strlen.c int x, y; x 24 tools/testing/selftests/powerpc/stringloops/strlen.c x = test_strlen(s + offset); x 26 tools/testing/selftests/powerpc/stringloops/strlen.c if (x != y) { x 27 tools/testing/selftests/powerpc/stringloops/strlen.c printf("strlen() returned %d, should have returned %d (%p offset %ld)\n", x, y, s, offset); x 8 tools/testing/selftests/powerpc/vphn/test-vphn.c #define cpu_to_be32(x) bswap_32(x) x 9 tools/testing/selftests/powerpc/vphn/test-vphn.c #define be32_to_cpu(x) bswap_32(x) x 10 tools/testing/selftests/powerpc/vphn/test-vphn.c #define be16_to_cpup(x) bswap_16(*x) x 11 tools/testing/selftests/powerpc/vphn/test-vphn.c #define cpu_to_be64(x) bswap_64(x) x 13 tools/testing/selftests/powerpc/vphn/test-vphn.c #define cpu_to_be32(x) (x) x 14 tools/testing/selftests/powerpc/vphn/test-vphn.c #define be32_to_cpu(x) (x) x 15 tools/testing/selftests/powerpc/vphn/test-vphn.c #define be16_to_cpup(x) (*x) x 16 tools/testing/selftests/powerpc/vphn/test-vphn.c #define cpu_to_be64(x) (x) x 112 tools/testing/selftests/proc/proc-pid-vm.c #define mov_rdi(x) \ x 114 tools/testing/selftests/proc/proc-pid-vm.c (x)&0xff, ((x)>>8)&0xff, ((x)>>16)&0xff, ((x)>>24)&0xff, \ x 115 tools/testing/selftests/proc/proc-pid-vm.c ((x)>>32)&0xff, ((x)>>40)&0xff, ((x)>>48)&0xff, ((x)>>56)&0xff x 117 tools/testing/selftests/proc/proc-pid-vm.c #define mov_rsi(x) \ x 119 tools/testing/selftests/proc/proc-pid-vm.c (x)&0xff, ((x)>>8)&0xff, ((x)>>16)&0xff, ((x)>>24)&0xff, \ x 120 tools/testing/selftests/proc/proc-pid-vm.c ((x)>>32)&0xff, ((x)>>40)&0xff, ((x)>>48)&0xff, ((x)>>56)&0xff x 122 tools/testing/selftests/proc/proc-pid-vm.c #define mov_eax(x) \ x 123 tools/testing/selftests/proc/proc-pid-vm.c 0xb8, (x)&0xff, ((x)>>8)&0xff, ((x)>>16)&0xff, ((x)>>24)&0xff x 7 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/assume.h #define assume(x) \ x 10 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/assume.h (void) (x); \ x 14 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/assume.h #define assume(x) __CPROVER_assume(x) x 38 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/barriers.h #define READ_ONCE(x) (*(volatile typeof(x) *) &(x)) x 39 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/barriers.h #define WRITE_ONCE(x) ((*(volatile typeof(x) *) &(x)) = (val)) x 8 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/bug_on.h #define BUG_ON(x) assert(!(x)) x 12 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/bug_on.h #define WARN_ON(x) (BUG_ON(x), false) x 25 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define S8_C(x) INT8_C(x) x 26 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define U8_C(x) UINT8_C(x) x 27 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define S16_C(x) INT16_C(x) x 28 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define U16_C(x) UINT16_C(x) x 29 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define S32_C(x) INT32_C(x) x 30 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define U32_C(x) UINT32_C(x) x 31 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define S64_C(x) INT64_C(x) x 32 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h #define U64_C(x) UINT64_C(x) x 15 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define __acquire(x) x 16 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define __acquires(x) x 17 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define __release(x) x 18 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define __releases(x) x 128 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define __SPIN_LOCK_UNLOCKED(x) SPIN_LOCK_UNLOCKED x 129 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define DEFINE_SPINLOCK(x) spinlock_t x = SPIN_LOCK_UNLOCKED x 181 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define COMPLETION_INITIALIZER(x) {.count = 0} x 182 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define DECLARE_COMPLETION(x) struct completion x = COMPLETION_INITIALIZER(x) x 183 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/locks.h #define DECLARE_COMPLETION_ONSTACK(x) DECLARE_COMPLETION(x) x 16 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/misc.h #define EXPORT_SYMBOL_GPL(x) x 25 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/misc.h #define udelay(x) assume(0) x 30 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/misc.h #define udelay(x) do { } while (0) x 41 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/percpu.h #define THIS_CPU_ADD_HELPER(ptr, x) (*(ptr) += (x)) x 47 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/percpu.h #define THIS_CPU_ADD_HELPER(ptr, x) \ x 50 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/percpu.h typeof(ptr) this_cpu_add_helper_x = (x); \ x 4 tools/testing/selftests/rcutorture/formal/srcu-cbmc/tests/store_buffering/test.c int x; x 26 tools/testing/selftests/rcutorture/formal/srcu-cbmc/tests/store_buffering/test.c WRITE_ONCE(x, 1); x 41 tools/testing/selftests/rcutorture/formal/srcu-cbmc/tests/store_buffering/test.c __unbuffered_tpr_x = READ_ONCE(x); x 73 tools/testing/selftests/rseq/rseq-mips.h # define U32_U64_PAD(x) x x 81 tools/testing/selftests/rseq/rseq-mips.h # define U32_U64_PAD(x) "0x0, " x x 83 tools/testing/selftests/rseq/rseq-mips.h # define U32_U64_PAD(x) x ", 0x0" x 49 tools/testing/selftests/rseq/rseq.h #define rseq_likely(x) __builtin_expect(!!(x), 1) x 50 tools/testing/selftests/rseq/rseq.h #define rseq_unlikely(x) __builtin_expect(!!(x), 0) x 53 tools/testing/selftests/rseq/rseq.h #define RSEQ_ACCESS_ONCE(x) (*(__volatile__ __typeof__(x) *)&(x)) x 54 tools/testing/selftests/rseq/rseq.h #define RSEQ_WRITE_ONCE(x, v) __extension__ ({ RSEQ_ACCESS_ONCE(x) = (v); }) x 55 tools/testing/selftests/rseq/rseq.h #define RSEQ_READ_ONCE(x) RSEQ_ACCESS_ONCE(x) x 57 tools/testing/selftests/rseq/rseq.h #define __rseq_str_1(x) #x x 58 tools/testing/selftests/rseq/rseq.h #define __rseq_str(x) __rseq_str_1(x) x 28 tools/testing/selftests/sparc64/drivers/adi-test.c # define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 52 tools/testing/selftests/sparc64/drivers/adi-test.c #define min(x, y) ((x) < (y) ? x : y) x 41 tools/testing/selftests/sync/synctest.h #define RUN_TEST(x) run_test((x), #x) x 114 tools/testing/selftests/timers/freq-step.c double x, y, r, x_sum, y_sum, xy_sum, x2_sum, r2_sum; x 120 tools/testing/selftests/timers/freq-step.c x = samples[i].time; x 123 tools/testing/selftests/timers/freq-step.c x_sum += x; x 125 tools/testing/selftests/timers/freq-step.c xy_sum += x * y; x 126 tools/testing/selftests/timers/freq-step.c x2_sum += x * x; x 135 tools/testing/selftests/timers/freq-step.c x = samples[i].time; x 137 tools/testing/selftests/timers/freq-step.c r = fabs(x * *slope + *intercept - y); x 33 tools/testing/selftests/timers/raw_skew.c #define shift_right(x, s) ({ \ x 34 tools/testing/selftests/timers/raw_skew.c __typeof__(x) __x = (x); \ x 57 tools/testing/selftests/vDSO/parse_vdso.c #define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x x 58 tools/testing/selftests/vDSO/parse_vdso.c #define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x) x 59 tools/testing/selftests/vDSO/parse_vdso.c #define ELF(x) ELF_BITS_XFORM(ELF_BITS, x) x 44 tools/testing/selftests/vm/hugepage-shm.c #define dprintf(x) printf(x) x 28 tools/testing/selftests/vm/thuge-gen.c #define err(x) perror(x), exit(1) x 69 tools/testing/selftests/x86/check_initial_reg_state.c #define SHOW(x) printf("\t" #x " = 0x%lx\n", x); x 456 tools/testing/selftests/x86/ldt_gdt.c unsigned int x = -2; x 458 tools/testing/selftests/x86/ldt_gdt.c [x] "+r" (x), [ftx] "+m" (ftx)); x 459 tools/testing/selftests/x86/ldt_gdt.c if (x != 2) x 54 tools/testing/selftests/x86/protection_keys.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x))) x 55 tools/testing/selftests/x86/protection_keys.c #define ALIGN_UP(x, align_to) (((x) + ((align_to)-1)) & ~((align_to)-1)) x 56 tools/testing/selftests/x86/protection_keys.c #define ALIGN_DOWN(x, align_to) ((x) & ~((align_to)-1)) x 59 tools/testing/selftests/x86/protection_keys.c #define __stringify_1(x...) #x x 60 tools/testing/selftests/x86/protection_keys.c #define __stringify(x...) __stringify_1(x) x 337 tools/testing/selftests/x86/protection_keys.c void sig_chld(int x) x 340 tools/testing/selftests/x86/protection_keys.c dprintf2("[%d] SIGCHLD: %d\n", getpid(), x); x 60 tools/testing/selftests/x86/test_vdso.c char r, x; x 66 tools/testing/selftests/x86/test_vdso.c &start, &end, &r, &x, name) != 5) x 24 tools/testing/selftests/x86/test_vsyscall.c # define VSYS(x) (x) x 26 tools/testing/selftests/x86/test_vsyscall.c # define VSYS(x) 0 x 116 tools/testing/selftests/x86/test_vsyscall.c char r, x; x 122 tools/testing/selftests/x86/test_vsyscall.c &start, &end, &r, &x, name) != 5) x 136 tools/testing/selftests/x86/test_vsyscall.c printf("\tvsyscall permissions are %c-%c\n", r, x); x 138 tools/testing/selftests/x86/test_vsyscall.c vsyscall_map_x = (x == 'x'); x 152 tools/thermal/tmon/tmon.h extern void write_status_bar(int x, char *line); x 24 tools/thermal/tmon/tui.c #define min(x, y) ({ \ x 25 tools/thermal/tmon/tui.c typeof(x) _min1 = (x); \ x 30 tools/thermal/tmon/tui.c #define max(x, y) ({ \ x 31 tools/thermal/tmon/tui.c typeof(x) _max1 = (x); \ x 98 tools/thermal/tmon/tui.c void write_status_bar(int x, char *line) x 100 tools/thermal/tmon/tui.c mvwprintw(status_bar_window, 0, x, "%s", line); x 201 tools/thermal/tmon/tui.c int i, j, x, y = 0; x 229 tools/thermal/tmon/tui.c x = tz_inst * TZONE_RECORD_SIZE + TZ_LEFT_ALIGN; x 231 tools/thermal/tmon/tui.c draw_hbar(cooling_device_window, y+2, x, x 235 tools/thermal/tmon/tui.c mvwprintw(cooling_device_window, y+2, x-1, " "); x 257 tools/thermal/tmon/tui.c x + ptdata.tzi[i].nr_trip_pts - x 278 tools/thermal/tmon/tui.c int j, x = 0, y = 0; x 297 tools/thermal/tmon/tui.c x += 20; x 300 tools/thermal/tmon/tui.c mvwprintw(w, y+1, x+1, "%C-%.12s", 'A'+j, "Set Temp"); x 302 tools/thermal/tmon/tui.c mvwprintw(w, y+1, x+1, "%C-%.10s-%2d", 'A'+j, x 315 tools/thermal/tmon/tui.c void write_dialogue_win(char *buf, int y, int x) x 319 tools/thermal/tmon/tui.c mvwprintw(w, y, x, "%s", buf); x 379 tools/thermal/tmon/tui.c int x = 0; x 399 tools/thermal/tmon/tui.c mvwprintw(status_bar_window, 0, x, "%s", status_bar_slots[i]); x 401 tools/thermal/tmon/tui.c x += strlen(status_bar_slots[i]) + 1; x 552 tools/thermal/tmon/tui.c int x; x 555 tools/thermal/tmon/tui.c x = ptdata.tzi[tz].tp[j].temp / 1000; x 556 tools/thermal/tmon/tui.c mvwprintw(thermal_data_window, y + 0, x + TDATA_LEFT, x 558 tools/thermal/tmon/tui.c x); x 41 tools/usb/ffs-test.c #define cpu_to_le16(x) (x) x 42 tools/usb/ffs-test.c #define cpu_to_le32(x) (x) x 44 tools/usb/ffs-test.c #define cpu_to_le16(x) ((((x) >> 8) & 0xffu) | (((x) & 0xffu) << 8)) x 45 tools/usb/ffs-test.c #define cpu_to_le32(x) \ x 46 tools/usb/ffs-test.c ((((x) & 0xff000000u) >> 24) | (((x) & 0x00ff0000u) >> 8) | \ x 47 tools/usb/ffs-test.c (((x) & 0x0000ff00u) << 8) | (((x) & 0x000000ffu) << 24)) x 50 tools/usb/ffs-test.c #define le32_to_cpu(x) le32toh(x) x 51 tools/usb/ffs-test.c #define le16_to_cpu(x) le16toh(x) x 7 tools/virtio/linux/bug.h #define BUILD_BUG_ON(x) x 6 tools/virtio/linux/err.h #define IS_ERR_VALUE(x) unlikely((x) >= (unsigned long)-MAX_ERRNO) x 24 tools/virtio/linux/kernel.h #define PAGE_ALIGN(x) ((x + PAGE_SIZE - 1) & PAGE_MASK) x 50 tools/virtio/linux/kernel.h #define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) x 112 tools/virtio/linux/kernel.h #define uninitialized_var(x) x = x x 115 tools/virtio/linux/kernel.h # define likely(x) (__builtin_expect(!!(x), 1)) x 118 tools/virtio/linux/kernel.h # define unlikely(x) (__builtin_expect(!!(x), 0)) x 132 tools/virtio/linux/kernel.h #define min(x, y) ({ \ x 133 tools/virtio/linux/kernel.h typeof(x) _min1 = (x); \ x 3 tools/virtio/linux/ratelimit.h #define __ratelimit(x) (*(x)) x 14 tools/virtio/linux/uaccess.h #define put_user(x, ptr) \ x 18 tools/virtio/linux/uaccess.h WRITE_ONCE(*(__pu_ptr), x); \ x 22 tools/virtio/linux/uaccess.h #define get_user(x, ptr) \ x 26 tools/virtio/linux/uaccess.h x = READ_ONCE(*(__pu_ptr)); \ x 178 tools/virtio/ringtest/main.h #define READ_ONCE(x) \ x 180 tools/virtio/ringtest/main.h union { typeof(x) __val; char __c[1]; } __u; \ x 181 tools/virtio/ringtest/main.h __read_once_size(&(x), __u.__c, sizeof(x)); \ x 186 tools/virtio/ringtest/main.h #define WRITE_ONCE(x, val) \ x 188 tools/virtio/ringtest/main.h union { typeof(x) __val; char __c[1]; } __u = \ x 189 tools/virtio/ringtest/main.h { .__val = (typeof(x)) (val) }; \ x 190 tools/virtio/ringtest/main.h __write_once_size(&(x), __u.__c, sizeof(x)); \ x 16 tools/virtio/ringtest/ptr_ring.c #define unlikely(x) (__builtin_expect(!!(x), 0)) x 17 tools/virtio/ringtest/ptr_ring.c #define likely(x) (__builtin_expect(!!(x), 1)) x 18 tools/virtio/ringtest/ptr_ring.c #define ALIGN(x, a) (((x) + (a) - 1) / (a) * (a)) x 40 tools/vm/page-types.c # define _STR(x) #x x 41 tools/vm/page-types.c # define STR(x) _STR(x) x 51 tools/vm/page-types.c #define PM_PFRAME(x) ((x) & PM_PFRAME_MASK) x 53 tools/vm/page-types.c #define PM_SWAP_OFFSET(x) (((x) & PM_PFRAME_MASK) >> MAX_SWAPFILES_SHIFT) x 209 tools/vm/page-types.c #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) x 211 tools/vm/page-types.c #define min_t(type, x, y) ({ \ x 212 tools/vm/page-types.c type __min1 = (x); \ x 216 tools/vm/page-types.c #define max_t(type, x, y) ({ \ x 217 tools/vm/page-types.c type __max1 = (x); \ x 226 tools/vm/page-types.c static void fatal(const char *x, ...) x 230 tools/vm/page-types.c va_start(ap, x); x 231 tools/vm/page-types.c vfprintf(stderr, x, ap); x 908 tools/vm/page-types.c char r, w, x, s; x 915 tools/vm/page-types.c &r, &w, &x, &s, x 101 tools/vm/slabinfo.c static void fatal(const char *x, ...) x 105 tools/vm/slabinfo.c va_start(ap, x); x 106 tools/vm/slabinfo.c vfprintf(stderr, x, ap); x 184 tools/vm/slabinfo.c static unsigned long get_obj_and_str(const char *name, char **x) x 189 tools/vm/slabinfo.c *x = NULL; x 192 tools/vm/slabinfo.c x = NULL; x 199 tools/vm/slabinfo.c *x = strdup(p); x 205 tools/vm/slabinfo.c char x[100]; x 208 tools/vm/slabinfo.c snprintf(x, 100, "%s/%s", s->name, name); x 209 tools/vm/slabinfo.c f = fopen(x, "w"); x 211 tools/vm/slabinfo.c fatal("Cannot write to %s\n", x); x 219 tools/vm/slabinfo.c char x[100]; x 223 tools/vm/slabinfo.c snprintf(x, 100, "%s/%s", s->name, name); x 224 tools/vm/slabinfo.c f = fopen(x, "r"); x 439 tools/vm/slabinfo.c static const char *onoff(int x) x 441 tools/vm/slabinfo.c if (x)