wrlp              453 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, RXQ_COMMAND, 1 << rxq->index);
wrlp              461 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, RXQ_COMMAND, mask << 8);
wrlp              473 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, TXQ_CURRENT_DESC_PTR(txq->index), addr);
wrlp              479 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, TXQ_COMMAND, 1 << txq->index);
wrlp              487 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, TXQ_COMMAND, mask << 8);
wrlp             1156 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, TX_BW_RATE, token_rate);
wrlp             1157 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, TX_BW_MTU, mtu);
wrlp             1158 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, TX_BW_BURST, bucket_size);
wrlp             1161 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, TX_BW_RATE_MOVED, token_rate);
wrlp             1162 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, TX_BW_MTU_MOVED, mtu);
wrlp             1163 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, TX_BW_BURST_MOVED, bucket_size);
wrlp             1182 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, TXQ_BW_TOKENS(txq->index), token_rate << 14);
wrlp             1183 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, TXQ_BW_CONF(txq->index), (bucket_size << 10) | token_rate);
wrlp             1208 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, off, val);
wrlp             1251 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_SERIAL_CONTROL, pscr);
wrlp             1396 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, SDMA_CONFIG, val);
wrlp             1422 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, TX_FIFO_URGENT_THRESHOLD, temp << 4);
wrlp             1686 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_CONFIG, rx_csum ? 0x02000000 : 0x00000000);
wrlp             1774 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, MAC_ADDR_HIGH,
wrlp             1776 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, MAC_ADDR_LOW, (addr[4] << 8) | addr[5]);
wrlp             1835 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_CONFIG, port_config);
wrlp             2157 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, INT_CAUSE, ~int_cause);
wrlp             2165 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, INT_CAUSE_EXT, ~int_cause_ext);
wrlp             2182 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK, 0);
wrlp             2299 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, INT_MASK, mp->int_mask);
wrlp             2337 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_SERIAL_CONTROL, pscr);
wrlp             2342 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_SERIAL_CONTROL, pscr);
wrlp             2366 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_CONFIG_EXT, 0x00000000);
wrlp             2382 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, RXQ_CURRENT_DESC_PTR(i), addr);
wrlp             2422 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_CAUSE, 0);
wrlp             2423 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_CAUSE_EXT, 0);
wrlp             2469 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK_EXT, INT_EXT_LINK_PHY | INT_EXT_TX);
wrlp             2470 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK, mp->int_mask);
wrlp             2507 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_SERIAL_CONTROL, data);
wrlp             2515 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK_EXT, 0x00000000);
wrlp             2516 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK, 0x00000000);
wrlp             2607 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK, 0x00000000);
wrlp             2612 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK, mp->int_mask);
wrlp             3040 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, PORT_SERIAL_CONTROL, pscr);
wrlp             3058 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, PORT_SERIAL_CONTROL, pscr);
wrlp             3118 drivers/net/ethernet/marvell/mv643xx_eth.c 		wrlp(mp, PORT_SERIAL_CONTROL1,
wrlp             3208 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, SDMA_CONFIG, PORT_SDMA_CONFIG_DEFAULT_VALUE);
wrlp             3256 drivers/net/ethernet/marvell/mv643xx_eth.c 	wrlp(mp, INT_MASK, 0);