writel_be 14 arch/powerpc/include/asm/io-defs.h DEF_PCI_AC_NORET(writel_be, (u32 val, PCI_IO_ADDR addr), (val, addr), mem, addr) writel_be 752 arch/powerpc/include/asm/io.h #define mmio_write32be(val, addr) writel_be(val, addr) writel_be 94 arch/powerpc/kernel/iomap.c writel_be(val, addr); writel_be 70 drivers/misc/ocxl/mmio.c writel_be(val, (char *)afu->global_mmio_ptr + offset); writel_be 126 drivers/misc/ocxl/mmio.c writel_be(tmp, (char *)afu->global_mmio_ptr + offset); writel_be 188 drivers/misc/ocxl/mmio.c writel_be(tmp, (char *)afu->global_mmio_ptr + offset); writel_be 31 drivers/usb/host/ehci-ps3.c writel_be(0x01000020, (void __iomem *)ehci->regs + writel_be 36 drivers/usb/host/ehci-ps3.c writel_be(0x00000001, (void __iomem *)ehci->regs + writel_be 767 drivers/usb/host/ehci.h writel_be(val, regs) : writel_be 793 drivers/usb/host/ehci.h writel_be(hc_control, ehci->ohci_hcctrl_reg); writel_be 165 drivers/usb/host/ohci-ppc-of.c writel_be((readl_be(&ohci->regs->control) | writel_be 578 drivers/usb/host/ohci.h writel_be (val, regs) : writel_be 613 drivers/usb/host/uhci-hcd.h writel_be(val, uhci->regs + reg); writel_be 58 sound/pci/mixart/mixart_core.c writel_be(tailptr, MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL)); writel_be 112 sound/pci/mixart/mixart_core.c writel_be(msg_frame_address, MIXART_MEM(mgr, headptr)); writel_be 119 sound/pci/mixart/mixart_core.c writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD)); writel_be 166 sound/pci/mixart/mixart_core.c writel_be(tailptr, MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL)); writel_be 171 sound/pci/mixart/mixart_core.c writel_be( msg->size + MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address) ); /* size of descriptor + request */ writel_be 172 sound/pci/mixart/mixart_core.c writel_be( msg->message_id , MIXART_MEM(mgr, msg_frame_address + 4) ); /* dwMessageID */ writel_be 173 sound/pci/mixart/mixart_core.c writel_be( msg->uid.object_id, MIXART_MEM(mgr, msg_frame_address + 8) ); /* uidDest */ writel_be 174 sound/pci/mixart/mixart_core.c writel_be( msg->uid.desc, MIXART_MEM(mgr, msg_frame_address + 12) ); /* */ writel_be 175 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 16) ); /* SizeHeader */ writel_be 176 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 20) ); /* OffsetDLL_T16 */ writel_be 177 sound/pci/mixart/mixart_core.c writel_be( msg->size, MIXART_MEM(mgr, msg_frame_address + 24) ); /* SizeDLL_T16 */ writel_be 178 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 28) ); /* OffsetDLL_DRV */ writel_be 179 sound/pci/mixart/mixart_core.c writel_be( 0, MIXART_MEM(mgr, msg_frame_address + 32) ); /* SizeDLL_DRV */ writel_be 180 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE + max_answersize, MIXART_MEM(mgr, msg_frame_address + 36) ); /* dwExpectedAnswerSize */ writel_be 184 sound/pci/mixart/mixart_core.c writel_be( *(u32*)(msg->data + i), MIXART_MEM(mgr, MSG_HEADER_SIZE + msg_frame_address + i) ); writel_be 211 sound/pci/mixart/mixart_core.c writel_be(msg_frame_address, MIXART_MEM(mgr, headptr)); writel_be 218 sound/pci/mixart/mixart_core.c writel_be(headptr, MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD)); writel_be 587 sound/pci/mixart/mixart_core.c writel_be( 1, MIXART_REG(mgr, MIXART_BA1_BRUTAL_RESET_OFFSET) ); writel_be 374 sound/pci/mixart/mixart_hwdep.c writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); writel_be 377 sound/pci/mixart/mixart_hwdep.c writel_be( MIXART_MOTHERBOARD_XLX_BASE_ADDRESS, MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET )); writel_be 379 sound/pci/mixart/mixart_hwdep.c writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_SIZE_OFFSET )); writel_be 385 sound/pci/mixart/mixart_hwdep.c writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); writel_be 414 sound/pci/mixart/mixart_hwdep.c writel_be( 0, MIXART_MEM( mgr, MIXART_PSEUDOREG_BOARDNUMBER ) ); /* set miXart boardnumber to 0 */ writel_be 415 sound/pci/mixart/mixart_hwdep.c writel_be( 0, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* reset pointer to flow table on miXart */ writel_be 418 sound/pci/mixart/mixart_hwdep.c writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); writel_be 425 sound/pci/mixart/mixart_hwdep.c writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); writel_be 435 sound/pci/mixart/mixart_hwdep.c writel_be( (u32)mgr->flowinfo.addr, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* give pointer of flow table to miXart */ writel_be 481 sound/pci/mixart/mixart_hwdep.c writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_SIZE_OFFSET )); writel_be 484 sound/pci/mixart/mixart_hwdep.c writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); writel_be 502 sound/pci/mixart/mixart_hwdep.c writel_be( 4, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); writel_be 19 sound/pci/mixart/mixart_hwdep.h #ifndef writel_be