writel            167 arch/alpha/include/asm/io.h REMAP2(u32, writel, volatile)
writel            253 arch/alpha/include/asm/io.h extern void		writel(u32 b, volatile void __iomem *addr);
writel            456 arch/alpha/include/asm/io.h 	IO_CONCAT(__IO_PREFIX,writel)(b, addr);
writel            116 arch/alpha/include/asm/io_trivial.h IO_CONCAT(__IO_PREFIX,writel)(u32 b, volatile void __iomem *a)
writel            132 arch/alpha/kernel/io.c 	IO_CONCAT(__IO_PREFIX,writel)(b, addr);
writel            207 arch/alpha/kernel/io.c EXPORT_SYMBOL(writel);
writel            225 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_0));
writel            226 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_DMAC_0));
writel            227 arch/arc/plat-hsdk/platform.c 	writel(axi_m_slv1, CREG_AXI_M_SLV1(M_DMAC_0));
writel            228 arch/arc/plat-hsdk/platform.c 	writel(axi_m_oft1, CREG_AXI_M_OFT1(M_DMAC_0));
writel            229 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_0));
writel            231 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_1));
writel            232 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_DMAC_1));
writel            233 arch/arc/plat-hsdk/platform.c 	writel(axi_m_slv1, CREG_AXI_M_SLV1(M_DMAC_1));
writel            234 arch/arc/plat-hsdk/platform.c 	writel(axi_m_oft1, CREG_AXI_M_OFT1(M_DMAC_1));
writel            235 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_1));
writel            248 arch/arc/plat-hsdk/platform.c 	writel(reg, CREG_AXI_M_HS_CORE_BOOT);
writel            249 arch/arc/plat-hsdk/platform.c 	writel(0x11111111, CREG_AXI_M_SLV0(M_HS_CORE));
writel            250 arch/arc/plat-hsdk/platform.c 	writel(0x63111111, CREG_AXI_M_SLV1(M_HS_CORE));
writel            251 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_HS_CORE));
writel            252 arch/arc/plat-hsdk/platform.c 	writel(0x0E543210, CREG_AXI_M_OFT1(M_HS_CORE));
writel            253 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_CORE));
writel            255 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_HS_RTT));
writel            256 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_HS_RTT));
writel            257 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_HS_RTT));
writel            258 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_HS_RTT));
writel            259 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_RTT));
writel            261 arch/arc/plat-hsdk/platform.c 	writel(0x88888888, CREG_AXI_M_SLV0(M_AXI_TUN));
writel            262 arch/arc/plat-hsdk/platform.c 	writel(0x88888888, CREG_AXI_M_SLV1(M_AXI_TUN));
writel            263 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_AXI_TUN));
writel            264 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_AXI_TUN));
writel            265 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_AXI_TUN));
writel            267 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_HDMI_VIDEO));
writel            268 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_HDMI_VIDEO));
writel            269 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_HDMI_VIDEO));
writel            270 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_HDMI_VIDEO));
writel            271 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_VIDEO));
writel            273 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_HDMI_AUDIO));
writel            274 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_HDMI_AUDIO));
writel            275 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_HDMI_AUDIO));
writel            276 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_HDMI_AUDIO));
writel            277 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_AUDIO));
writel            279 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_USB_HOST));
writel            280 arch/arc/plat-hsdk/platform.c 	writel(0x77999999, CREG_AXI_M_SLV1(M_USB_HOST));
writel            281 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_USB_HOST));
writel            282 arch/arc/plat-hsdk/platform.c 	writel(0x76DCBA98, CREG_AXI_M_OFT1(M_USB_HOST));
writel            283 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_USB_HOST));
writel            285 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_ETHERNET));
writel            286 arch/arc/plat-hsdk/platform.c 	writel(0x77999999, CREG_AXI_M_SLV1(M_ETHERNET));
writel            287 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_ETHERNET));
writel            288 arch/arc/plat-hsdk/platform.c 	writel(0x76DCBA98, CREG_AXI_M_OFT1(M_ETHERNET));
writel            289 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_ETHERNET));
writel            291 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_SDIO));
writel            292 arch/arc/plat-hsdk/platform.c 	writel(0x77999999, CREG_AXI_M_SLV1(M_SDIO));
writel            293 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_SDIO));
writel            294 arch/arc/plat-hsdk/platform.c 	writel(0x76DCBA98, CREG_AXI_M_OFT1(M_SDIO));
writel            295 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_SDIO));
writel            297 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV0(M_GPU));
writel            298 arch/arc/plat-hsdk/platform.c 	writel(0x77777777, CREG_AXI_M_SLV1(M_GPU));
writel            299 arch/arc/plat-hsdk/platform.c 	writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_GPU));
writel            300 arch/arc/plat-hsdk/platform.c 	writel(0x76543210, CREG_AXI_M_OFT1(M_GPU));
writel            301 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_GPU));
writel            303 arch/arc/plat-hsdk/platform.c 	writel(0x00000000, CREG_AXI_M_SLV0(M_DVFS));
writel            304 arch/arc/plat-hsdk/platform.c 	writel(0x60000000, CREG_AXI_M_SLV1(M_DVFS));
writel            305 arch/arc/plat-hsdk/platform.c 	writel(0x00000000, CREG_AXI_M_OFT0(M_DVFS));
writel            306 arch/arc/plat-hsdk/platform.c 	writel(0x00000000, CREG_AXI_M_OFT1(M_DVFS));
writel            307 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DVFS));
writel            317 arch/arc/plat-hsdk/platform.c 	writel(0x00000000, CREG_PAE);
writel            318 arch/arc/plat-hsdk/platform.c 	writel(UPDATE_VAL, CREG_PAE_UPDT);
writel            269 arch/arm/common/sa1111.c 	writel(ie, mapbase + SA1111_INTEN0);
writel             90 arch/arm/include/asm/cachetype.h 	writel(cache_selector, BASEADDR_V7M_SCB + V7M_SCB_CTR);
writel             36 arch/arm/kernel/io.c 	writel(value, reg);
writel             66 arch/arm/mach-actions/platsmp.c 	writel(__pa_symbol(secondary_startup),
writel             68 arch/arm/mach-actions/platsmp.c 	writel(OWL_CPUx_FLAG_BOOT,
writel             89 arch/arm/mach-actions/platsmp.c 	writel(0, timer_base_addr + OWL_CPU1_ADDR + (cpu - 1) * 4);
writel             90 arch/arm/mach-actions/platsmp.c 	writel(0, timer_base_addr + OWL_CPU1_FLAG + (cpu - 1) * 4);
writel             35 arch/arm/mach-alpine/alpine_cpu_pm.c 	writel(phys_resume_addr,
writel            142 arch/arm/mach-at91/pm.c 		writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);
writel            199 arch/arm/mach-at91/pm.c 	writel(mode, pmc + AT91_PMC_FSMR);
writel            200 arch/arm/mach-at91/pm.c 	writel(polarity, pmc + AT91_PMC_FSPR);
writel            207 arch/arm/mach-at91/pm.c 	writel(mode, pmc + AT91_PMC_FSMR);
writel            557 arch/arm/mach-at91/pm.c 	writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
writel            567 arch/arm/mach-at91/pm.c 	writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
writel             46 arch/arm/mach-axxia/platsmp.c 	writel(0xab, syscon + SC_CRIT_WRITE_KEY);
writel             48 arch/arm/mach-axxia/platsmp.c 	writel(tmp, syscon + SC_RST_CPU_HOLD);
writel            152 arch/arm/mach-bcm/bcm_kona_smc.c 	writel(data->arg3, args);
writel             53 arch/arm/mach-bcm/board_bcm281xx.c 	writel(val, base + SECWDOG_OFFSET);
writel             99 arch/arm/mach-bcm/platsmp-brcmstb.c 	writel((readl(base) & mask) | val, base);
writel            105 arch/arm/mach-bcm/platsmp-brcmstb.c 	writel((readl(base) & mask) & ~val, base);
writel            304 arch/arm/mach-bcm/platsmp.c 	writel(virt_to_phys(secondary_startup),
writel             39 arch/arm/mach-berlin/platsmp.c 	writel(val, cpu_ctrl + CPU_RESET_NON_SC);
writel             41 arch/arm/mach-berlin/platsmp.c 	writel(val, cpu_ctrl + CPU_RESET_NON_SC);
writel             86 arch/arm/mach-berlin/platsmp.c 	writel(boot_inst, vectors_base + RESET_VECT);
writel             92 arch/arm/mach-berlin/platsmp.c 	writel(__pa_symbol(secondary_startup), vectors_base + SW_RESET_ADDR);
writel            113 arch/arm/mach-berlin/platsmp.c 	writel(val, cpu_ctrl + CPU_RESET_NON_SC);
writel            104 arch/arm/mach-cns3xxx/core.c 	writel(clkctrl, pm_base + PM_SYS_CLK_CTRL_OFFSET);
writel            115 arch/arm/mach-cns3xxx/core.c 	writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
writel            125 arch/arm/mach-cns3xxx/core.c 	writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
writel            136 arch/arm/mach-cns3xxx/core.c 	writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
writel            138 arch/arm/mach-cns3xxx/core.c 	writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
writel            147 arch/arm/mach-cns3xxx/core.c 	writel(evt, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
writel            148 arch/arm/mach-cns3xxx/core.c 	writel(ctrl | (1 << 0), cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
writel            185 arch/arm/mach-cns3xxx/core.c 	writel(val & ~(1 << 2), stat);
writel            211 arch/arm/mach-cns3xxx/core.c 	writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
writel            213 arch/arm/mach-cns3xxx/core.c 	writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
writel            216 arch/arm/mach-cns3xxx/core.c 	writel(0x5C800, cns3xxx_tmr1 + TIMER1_COUNTER_OFFSET);
writel            217 arch/arm/mach-cns3xxx/core.c 	writel(0x5C800, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
writel            219 arch/arm/mach-cns3xxx/core.c 	writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V1_OFFSET);
writel            220 arch/arm/mach-cns3xxx/core.c 	writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V2_OFFSET);
writel            226 arch/arm/mach-cns3xxx/core.c 	writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
writel            231 arch/arm/mach-cns3xxx/core.c 	writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
writel            234 arch/arm/mach-cns3xxx/core.c 	writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V1_OFFSET);
writel            235 arch/arm/mach-cns3xxx/core.c 	writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V2_OFFSET);
writel            240 arch/arm/mach-cns3xxx/core.c 	writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
writel            245 arch/arm/mach-cns3xxx/core.c 	writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
writel            281 arch/arm/mach-cns3xxx/core.c 	writel(val, base + L310_TAG_LATENCY_CTRL);
writel            294 arch/arm/mach-cns3xxx/core.c 	writel(val, base + L310_DATA_LATENCY_CTRL);
writel            491 arch/arm/mach-davinci/dm355.c 		writel(VPSS_DACCLKEN_ENABLE | VPSS_VENCCLKEN_ENABLE,
writel            500 arch/arm/mach-davinci/dm355.c 			writel(VPSS_MUXSEL_EXTCLK_ENABLE, vpss_clk_ctrl_reg);
writel            993 arch/arm/mach-davinci/dm365.c 	writel(val, vpss_clkctl_reg);
writel            424 arch/arm/mach-davinci/dm644x.c 		writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
writel            429 arch/arm/mach-davinci/dm644x.c 			writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
writel            436 arch/arm/mach-davinci/dm644x.c 			writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
writel            445 arch/arm/mach-dove/common.c 	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
writel            450 arch/arm/mach-dove/common.c 	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
writel             77 arch/arm/mach-dove/mpp.c 	writel(mpp_gen_cfg, DOVE_MPP_GENERAL_VIRT_BASE);
writel            114 arch/arm/mach-dove/mpp.c 	writel(mpp_ctrl4, DOVE_MPP_CTRL4_VIRT_BASE);
writel            115 arch/arm/mach-dove/mpp.c 	writel(ssp_ctrl1, DOVE_SSP_CTRL_STATUS_1);
writel            116 arch/arm/mach-dove/mpp.c 	writel(mpp_gen_ctrl, DOVE_MPP_GENERAL_VIRT_BASE);
writel            117 arch/arm/mach-dove/mpp.c 	writel(global_cfg_2, DOVE_GLOBAL_CONFIG_2);
writel            143 arch/arm/mach-dove/mpp.c 	writel(mpp_ctrl4, DOVE_MPP_CTRL4_VIRT_BASE);
writel             80 arch/arm/mach-ep93xx/timer-ep93xx.c 	writel(tmode, EP93XX_TIMER3_CONTROL);
writel             83 arch/arm/mach-ep93xx/timer-ep93xx.c 	writel(next, EP93XX_TIMER3_LOAD);
writel             84 arch/arm/mach-ep93xx/timer-ep93xx.c 	writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
writel             93 arch/arm/mach-ep93xx/timer-ep93xx.c 	writel(0, EP93XX_TIMER3_CONTROL);
writel            113 arch/arm/mach-ep93xx/timer-ep93xx.c 	writel(1, EP93XX_TIMER3_CLEAR);
writel            130 arch/arm/mach-ep93xx/timer-ep93xx.c 	writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
writel            119 arch/arm/mach-exynos/firmware.c 	writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
writel            128 arch/arm/mach-exynos/firmware.c 	writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
writel            129 arch/arm/mach-exynos/firmware.c 	writel(__pa_symbol(exynos_cpu_resume_ns),
writel            137 arch/arm/mach-exynos/firmware.c 	writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
writel            100 arch/arm/mach-highbank/highbank.c 		writel(val | 0xff01, sregs_base + reg);
writel             47 arch/arm/mach-highbank/sysregs.h 	writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
writel             53 arch/arm/mach-highbank/sysregs.h 	writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
writel             59 arch/arm/mach-highbank/sysregs.h 	writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
writel             65 arch/arm/mach-highbank/sysregs.h 	writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
writel             71 arch/arm/mach-highbank/sysregs.h 	writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
writel             70 arch/arm/mach-imx/ehci-imx27.c 	writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
writel             71 arch/arm/mach-imx/ehci-imx31.c 	writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
writel             86 arch/arm/mach-imx/ehci-imx35.c 	writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
writel             93 arch/arm/mach-imx/mm-imx3.c 		writel(0x00000515, clkctl_base + L2_MEM_VAL);
writel            341 arch/arm/mach-imx/mmdc.c 	writel(DBG_RST, reg);
writel            348 arch/arm/mach-imx/mmdc.c 	writel(val, reg);
writel            355 arch/arm/mach-imx/mmdc.c 	writel(val, reg);
writel            387 arch/arm/mach-imx/mmdc.c 	writel(PRF_FRZ, reg);
writel            390 arch/arm/mach-imx/mmdc.c 	writel(MMDC_PRF_AXI_ID_CLEAR, reg);
writel            261 arch/arm/mach-imx/pm-imx6.c 	writel(val, ccm_base + CCR);
writel             56 arch/arm/mach-integrator/core.c 	writel(val | set, cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
writel             63 arch/arm/mach-integrator/core.c 	writel(0xffffffffU, cm_base + INTEGRATOR_HDR_IC_OFFSET +
writel             48 arch/arm/mach-integrator/impd1.c 	writel(cur | val, impd1->base + IMPD1_CTRL);
writel             78 arch/arm/mach-integrator/integrator_ap.c 	writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
writel             79 arch/arm/mach-integrator/integrator_ap.c 	writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
writel             81 arch/arm/mach-integrator/integrator_ap.c 	writel(ic_irq_enable, VA_IC_BASE + IRQ_ENABLE_SET);
writel             72 arch/arm/mach-integrator/integrator_cp.c 	writel(8, intcp_con_base + 8);
writel            145 arch/arm/mach-ixp4xx/include/mach/io.h 		writel(*vaddr++, bus_addr);
writel             88 arch/arm/mach-lpc32xx/serial.c 	writel(tmp, LPC32XX_UARTCTL_CLOOP);
writel             31 arch/arm/mach-mediatek/mediatek.c 		writel(GPT_ENABLE, gpt_base);
writel             57 arch/arm/mach-meson/platsmp.c 	writel(val, sram_base + MESON_SMP_SRAM_CPU_CTRL_REG);
writel            122 arch/arm/mach-meson/platsmp.c 	writel(__pa_symbol(secondary_startup),
writel            145 arch/arm/mach-meson/platsmp.c 	writel(__pa_symbol(secondary_startup),
writel             40 arch/arm/mach-milbeaut/platsmp.c 	writel(__pa_symbol(secondary_startup), m10v_smp_base + cpu * 4);
writel             65 arch/arm/mach-milbeaut/platsmp.c 		writel(KERNEL_UNBOOT_FLAG, m10v_smp_base + cpu * 4);
writel             83 arch/arm/mach-milbeaut/platsmp.c 	writel(KERNEL_UNBOOT_FLAG, m10v_smp_base + cpu * 4);
writel            415 arch/arm/mach-mv78xx0/common.c 	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
writel            420 arch/arm/mach-mv78xx0/common.c 	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
writel             91 arch/arm/mach-mvebu/coherency.c 	writel(reg, cpu_config_base);
writel             39 arch/arm/mach-mvebu/cpu-reset.c 	writel(reg, cpu_reset_base + CPU_RESET_OFFSET(cpu));
writel            156 arch/arm/mach-mvebu/kirkwood.c 	writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
writel            211 arch/arm/mach-mvebu/platsmp.c 	writel(0, base + MV98DX3236_CPU_RESUME_CTRL_REG);
writel            212 arch/arm/mach-mvebu/platsmp.c 	writel(__pa_symbol(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG);
writel             39 arch/arm/mach-mvebu/pm-board.c 	writel(reg, gpio_ctrl);
writel             55 arch/arm/mach-mvebu/pm.c 	writel(reg, sdram_ctrl + SDRAM_DLB_EVICTION_OFFS);
writel             62 arch/arm/mach-mvebu/pm.c 	writel(reg, sdram_ctrl + SDRAM_CONFIG_OFFS);
writel            124 arch/arm/mach-mvebu/pm.c 	writel(BOOT_MAGIC_WORD, store_addr++);
writel            125 arch/arm/mach-mvebu/pm.c 	writel(resume_pc, store_addr++);
writel            133 arch/arm/mach-mvebu/pm.c 	writel(MBUS_WINDOW_12_CTRL, store_addr++);
writel            134 arch/arm/mach-mvebu/pm.c 	writel(0x0, store_addr++);
writel            140 arch/arm/mach-mvebu/pm.c 	writel(MBUS_INTERNAL_REG_ADDRESS, store_addr++);
writel            141 arch/arm/mach-mvebu/pm.c 	writel(mvebu_internal_reg_base(), store_addr++);
writel            150 arch/arm/mach-mvebu/pm.c 	writel(BOOT_MAGIC_LIST_END, store_addr);
writel            115 arch/arm/mach-mvebu/pmsu.c 	writel(__pa_symbol(boot_addr), pmsu_mp_base +
writel            217 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
writel            247 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
writel            256 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
writel            262 arch/arm/mach-mvebu/pmsu.c 		writel(reg, pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu));
writel            351 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
writel            359 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
writel            455 arch/arm/mach-mvebu/pmsu.c 	writel(reg, mpsoc_base + MPCORE_RESET_CTL);
writel            463 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_POWERDOWN_DELAY);
writel            550 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(cpu));
writel            555 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(cpu));
writel            566 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(cpu));
writel            580 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_EVENT_STATUS_AND_MASK(hwcpu));
writel            585 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_EVENT_STATUS_AND_MASK(hwcpu));
writel            606 arch/arm/mach-mvebu/pmsu.c 	writel(reg, pmsu_mp_base + PMSU_EVENT_STATUS_AND_MASK(hwcpu));
writel            102 arch/arm/mach-mvebu/system-controller.c 		writel(mvebu_sc->rstoutn_mask_reset_out_en,
writel            108 arch/arm/mach-mvebu/system-controller.c 		writel(mvebu_sc->system_soft_reset,
writel            156 arch/arm/mach-mvebu/system-controller.c 	writel(__pa_symbol(boot_addr), system_controller_base +
writel             94 arch/arm/mach-nomadik/cpu-8815.c 	writel(1, srcbase + 0x18);
writel             36 arch/arm/mach-nspire/nspire.c 	writel(2, base + NSPIRE_MISC_HWRESET);
writel             82 arch/arm/mach-omap1/time.c 	writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl);
writel             89 arch/arm/mach-omap1/time.c 	writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl);
writel            101 arch/arm/mach-omap1/time.c 	writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl);
writel            103 arch/arm/mach-omap1/time.c 	writel(load_val, &timer->load_tim);
writel            105 arch/arm/mach-omap1/time.c 	writel(timerflags, &timer->cntl);
writel            112 arch/arm/mach-omap1/time.c 	writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl);
writel             75 arch/arm/mach-orion5x/board-mss2.c 	writel(reg, RSTOUTn_MASK);
writel             79 arch/arm/mach-orion5x/board-mss2.c 	writel(reg, CPU_SOFT_RESET);
writel             85 arch/arm/mach-orion5x/common.h #define orion5x_setbits(r, mask)	writel(readl(r) | (mask), (r))
writel             86 arch/arm/mach-orion5x/common.h #define orion5x_clrbits(r, mask)	writel(readl(r) & ~(mask), (r))
writel            178 arch/arm/mach-orion5x/db88f5281-setup.c 	writel(0, db88f5281_7seg + (count << 4));
writel            332 arch/arm/mach-orion5x/db88f5281-setup.c 	writel(0, MPP_DEV_CTRL);		/* DEV_D[31:16] */
writel            554 arch/arm/mach-orion5x/dns323-setup.c 	writel((3 << 21)	/* phy ID reg */ |
writel            599 arch/arm/mach-orion5x/dns323-setup.c 		writel(0, MPP_DEV_CTRL);		/* DEV_D[31:16] */
writel            707 arch/arm/mach-orion5x/dns323-setup.c 		writel(0x5, ORION5X_SATA_VIRT_BASE + 0x2c);
writel            216 arch/arm/mach-orion5x/kurobox_pro-setup.c 		writel(buf[i++], UART1_REG(TX));
writel            300 arch/arm/mach-orion5x/kurobox_pro-setup.c 	writel(0x83, UART1_REG(LCR));
writel            301 arch/arm/mach-orion5x/kurobox_pro-setup.c 	writel(divisor & 0xff, UART1_REG(DLL));
writel            302 arch/arm/mach-orion5x/kurobox_pro-setup.c 	writel((divisor >> 8) & 0xff, UART1_REG(DLM));
writel            303 arch/arm/mach-orion5x/kurobox_pro-setup.c 	writel(0x1b, UART1_REG(LCR));
writel            304 arch/arm/mach-orion5x/kurobox_pro-setup.c 	writel(0x00, UART1_REG(IER));
writel            305 arch/arm/mach-orion5x/kurobox_pro-setup.c 	writel(0x07, UART1_REG(FCR));
writel            306 arch/arm/mach-orion5x/kurobox_pro-setup.c 	writel(0x00, UART1_REG(MCR));
writel            279 arch/arm/mach-orion5x/pci.c 	writel(PCI_CONF_BUS(bus) |
writel            303 arch/arm/mach-orion5x/pci.c 	writel(PCI_CONF_BUS(bus) |
writel            390 arch/arm/mach-orion5x/pci.c 		writel(p2p, PCI_P2P_CONF);
writel            418 arch/arm/mach-orion5x/pci.c 	writel(win_enable, PCI_BAR_ENABLE);
writel            444 arch/arm/mach-orion5x/pci.c 		writel((cs->size - 1) & 0xfffff000,
writel            446 arch/arm/mach-orion5x/pci.c 		writel(cs->base & 0xfffff000,
writel            458 arch/arm/mach-orion5x/pci.c 	writel(win_enable, PCI_BAR_ENABLE);
writel            191 arch/arm/mach-orion5x/terastation_pro2-setup.c 		writel(buf[i++], UART1_REG(TX));
writel            275 arch/arm/mach-orion5x/terastation_pro2-setup.c 	writel(0x83, UART1_REG(LCR));
writel            276 arch/arm/mach-orion5x/terastation_pro2-setup.c 	writel(divisor & 0xff, UART1_REG(DLL));
writel            277 arch/arm/mach-orion5x/terastation_pro2-setup.c 	writel((divisor >> 8) & 0xff, UART1_REG(DLM));
writel            278 arch/arm/mach-orion5x/terastation_pro2-setup.c 	writel(0x1b, UART1_REG(LCR));
writel            279 arch/arm/mach-orion5x/terastation_pro2-setup.c 	writel(0x00, UART1_REG(IER));
writel            280 arch/arm/mach-orion5x/terastation_pro2-setup.c 	writel(0x07, UART1_REG(FCR));
writel            281 arch/arm/mach-orion5x/terastation_pro2-setup.c 	writel(0x00, UART1_REG(MCR));
writel             32 arch/arm/mach-orion5x/tsx09-common.c 	writel(0x83, UART1_REG(LCR));
writel             33 arch/arm/mach-orion5x/tsx09-common.c 	writel(divisor & 0xff, UART1_REG(DLL));
writel             34 arch/arm/mach-orion5x/tsx09-common.c 	writel((divisor >> 8) & 0xff, UART1_REG(DLM));
writel             35 arch/arm/mach-orion5x/tsx09-common.c 	writel(0x03, UART1_REG(LCR));
writel             36 arch/arm/mach-orion5x/tsx09-common.c 	writel(0x00, UART1_REG(IER));
writel             37 arch/arm/mach-orion5x/tsx09-common.c 	writel(0x00, UART1_REG(FCR));
writel             38 arch/arm/mach-orion5x/tsx09-common.c 	writel(0x00, UART1_REG(MCR));
writel             41 arch/arm/mach-orion5x/tsx09-common.c 	writel('A', UART1_REG(TX));
writel             38 arch/arm/mach-oxnas/platsmp.c 	writel(virt_to_phys(ox820_secondary_startup),
writel             41 arch/arm/mach-oxnas/platsmp.c 	writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET);
writel             46 arch/arm/mach-oxnas/platsmp.c 	writel(GIC_CPU_CTRL_ENABLE,
writel             43 arch/arm/mach-prima2/rstc.c 	writel(readl(sirfsoc_rstc_base +
writel             47 arch/arm/mach-prima2/rstc.c 	writel(readl(sirfsoc_rstc_base +
writel             69 arch/arm/mach-prima2/rstc.c 	writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
writel            133 arch/arm/mach-pxa/cm-x2xx-pci.c 		writel(0x848, IT8152_PCI_CFG_ADDR);
writel            134 arch/arm/mach-pxa/cm-x2xx-pci.c 		writel(0, IT8152_PCI_CFG_DATA);
writel            137 arch/arm/mach-pxa/cm-x2xx-pci.c 		writel(0x840, IT8152_PCI_CFG_ADDR);
writel            138 arch/arm/mach-pxa/cm-x2xx-pci.c 		writel(0, IT8152_PCI_CFG_DATA);
writel            140 arch/arm/mach-pxa/cm-x2xx-pci.c 		writel(0x20, IT8152_GPIO_GPDR);
writel            143 arch/arm/mach-pxa/cm-x2xx-pci.c 		writel(0x4000, IT8152_PCI_CFG_ADDR);
writel            148 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x408C, IT8152_PCI_CFG_ADDR);
writel            149 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x1022, IT8152_PCI_CFG_DATA);
writel            151 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x4080, IT8152_PCI_CFG_ADDR);
writel            152 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x3844d060, IT8152_PCI_CFG_DATA);
writel            154 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x4090, IT8152_PCI_CFG_ADDR);
writel            155 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
writel            159 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x4018, IT8152_PCI_CFG_ADDR);
writel            160 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0xb0000000, IT8152_PCI_CFG_DATA);
writel            163 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x418C, IT8152_PCI_CFG_ADDR);
writel            164 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x1022, IT8152_PCI_CFG_DATA);
writel            166 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x4180, IT8152_PCI_CFG_ADDR);
writel            167 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x3844d060, IT8152_PCI_CFG_DATA);
writel            169 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x4190, IT8152_PCI_CFG_ADDR);
writel            170 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
writel            174 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0x4118, IT8152_PCI_CFG_ADDR);
writel            175 arch/arm/mach-pxa/cm-x2xx-pci.c 			writel(0xb0000000, IT8152_PCI_CFG_DATA);
writel            310 arch/arm/mach-pxa/em-x270.c 		writel(dat, this->legacy.IO_ADDR_W);
writel            141 arch/arm/mach-pxa/gumstix.c 	writel(readl(OSCC) | OSCC_OON, OSCC);
writel             58 arch/arm/mach-pxa/pxa_cplds_irqs.c 	writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
writel             68 arch/arm/mach-pxa/pxa_cplds_irqs.c 	writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR);
writel             71 arch/arm/mach-pxa/pxa_cplds_irqs.c 	writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
writel            102 arch/arm/mach-pxa/pxa_cplds_irqs.c 	writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
writel            134 arch/arm/mach-pxa/pxa_cplds_irqs.c 	writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
writel            135 arch/arm/mach-pxa/pxa_cplds_irqs.c 	writel(0, fpga->base + FPGA_IRQ_SET_CLR);
writel            939 arch/arm/mach-pxa/zeus.c 	writel(readl(OSCC) | OSCC_OON, OSCC);
writel            150 arch/arm/mach-rockchip/platsmp.c 		writel(__pa_symbol(secondary_startup), sram_base_addr + 8);
writel            151 arch/arm/mach-rockchip/platsmp.c 		writel(0xDEADBEAF, sram_base_addr + 4);
writel             38 arch/arm/mach-rockchip/rockchip.c 			writel(0, reg_base + 0x30);
writel             39 arch/arm/mach-rockchip/rockchip.c 			writel(0xffffffff, reg_base + 0x20);
writel             40 arch/arm/mach-rockchip/rockchip.c 			writel(0xffffffff, reg_base + 0x24);
writel             41 arch/arm/mach-rockchip/rockchip.c 			writel(1, reg_base + 0x30);
writel            119 arch/arm/mach-rpc/dma.c 		writel(idma->cur_addr, base + cur);
writel            120 arch/arm/mach-rpc/dma.c 		writel(idma->cur_len, base + end);
writel            709 arch/arm/mach-s3c24xx/mach-h1940.c 	writel(tmp, S3C2410_UPLLCON);
writel            254 arch/arm/mach-s3c64xx/pl080.c 	writel(0xffffff, S3C64XX_SDMA_SEL);
writel             25 arch/arm/mach-s3c64xx/setup-ide.c 	writel(reg | MEM_SYS_CFG_INDEP_CF |
writel             28 arch/arm/mach-s3c64xx/setup-usb-phy.c 	writel(readl(S3C64XX_OTHERS) | S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
writel             51 arch/arm/mach-s3c64xx/setup-usb-phy.c 	writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK);
writel             54 arch/arm/mach-s3c64xx/setup-usb-phy.c 	writel((readl(S3C_PHYPWR) & ~S3C_PHYPWR_NORMAL_MASK), S3C_PHYPWR);
writel             58 arch/arm/mach-s3c64xx/setup-usb-phy.c 	writel(S3C_RSTCON_PHY | S3C_RSTCON_HCLK | S3C_RSTCON_PHYCLK,
writel             61 arch/arm/mach-s3c64xx/setup-usb-phy.c 	writel(0, S3C_RSTCON);
writel             68 arch/arm/mach-s3c64xx/setup-usb-phy.c 	writel((readl(S3C_PHYPWR) | S3C_PHYPWR_ANALOG_POWERDOWN |
writel             71 arch/arm/mach-s3c64xx/setup-usb-phy.c 	writel(readl(S3C64XX_OTHERS) & ~S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
writel             65 arch/arm/mach-sa1100/simpad.c 	writel(cs3_shadow, CS3_BASE);
writel            200 arch/arm/mach-shmobile/platsmp-apmu.c 	writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS);
writel             42 arch/arm/mach-socfpga/l2_cache.c 	writel(0x01, mapped_l2_edac_addr);
writel             70 arch/arm/mach-socfpga/l2_cache.c 	writel(A10_SYSMGR_MPU_CLEAR_L2_ECC, (sys_manager_base_addr +
writel             73 arch/arm/mach-socfpga/l2_cache.c 	writel(A10_SYSMGR_ECC_INTMASK_CLR_L2, sys_manager_base_addr +
writel             75 arch/arm/mach-socfpga/l2_cache.c 	writel(A10_MPU_CTRL_L2_ECC_EN, mapped_l2_edac_addr +
writel             37 arch/arm/mach-socfpga/ocram.c 	writel(ALTR_OCRAM_CLEAR_ECC, mapped_ocr_edac_addr);
writel             38 arch/arm/mach-socfpga/ocram.c 	writel(ALTR_OCRAM_ECC_EN, mapped_ocr_edac_addr);
writel             72 arch/arm/mach-socfpga/ocram.c 	writel(value, ioaddr);
writel             80 arch/arm/mach-socfpga/ocram.c 	writel(value, ioaddr);
writel            109 arch/arm/mach-socfpga/ocram.c 	writel(ALTR_A10_ECC_ERRPENA_MASK,
writel            142 arch/arm/mach-socfpga/ocram.c 	writel(ALTR_A10_OCRAM_ECC_EN_CTL,
writel            164 arch/arm/mach-socfpga/ocram.c 	writel(ALTR_A10_OCRAM_ECC_EN_CTL,
writel             27 arch/arm/mach-socfpga/platsmp.c 		writel(RSTMGR_MPUMODRST_CPU1,
writel             32 arch/arm/mach-socfpga/platsmp.c 		writel(__pa_symbol(secondary_startup),
writel             40 arch/arm/mach-socfpga/platsmp.c 		writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
writel             51 arch/arm/mach-socfpga/platsmp.c 		writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr +
writel             55 arch/arm/mach-socfpga/platsmp.c 		writel(__pa_symbol(secondary_startup),
writel             63 arch/arm/mach-socfpga/platsmp.c 		writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST);
writel             80 arch/arm/mach-socfpga/socfpga.c 	writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
writel             93 arch/arm/mach-socfpga/socfpga.c 	writel(temp, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL);
writel             55 arch/arm/mach-spear/pl080.c 		writel(val, DMA_CHN_CFG);
writel            130 arch/arm/mach-sunxi/mc_smp.c 		writel(0xff, prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
writel            132 arch/arm/mach-sunxi/mc_smp.c 		writel(0xfe, prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
writel            134 arch/arm/mach-sunxi/mc_smp.c 		writel(0xf8, prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
writel            136 arch/arm/mach-sunxi/mc_smp.c 		writel(0xf0, prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
writel            138 arch/arm/mach-sunxi/mc_smp.c 		writel(0x00, prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
writel            141 arch/arm/mach-sunxi/mc_smp.c 		writel(0xff, prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
writel            151 arch/arm/mach-sunxi/mc_smp.c 		writel(CPU0_SUPPORT_HOTPLUG_MAGIC0, sram_b_smp_base);
writel            152 arch/arm/mach-sunxi/mc_smp.c 		writel(CPU0_SUPPORT_HOTPLUG_MAGIC1, sram_b_smp_base + 0x4);
writel            154 arch/arm/mach-sunxi/mc_smp.c 		writel(0x0, sram_b_smp_base);
writel            155 arch/arm/mach-sunxi/mc_smp.c 		writel(0x0, sram_b_smp_base + 0x4);
writel            174 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
writel            181 arch/arm/mach-sunxi/mc_smp.c 		writel(reg, r_cpucfg_base +
writel            190 arch/arm/mach-sunxi/mc_smp.c 		writel(reg, cpucfg_base + CPUCFG_CX_CTRL_REG0(cluster));
writel            204 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
writel            218 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
writel            230 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
writel            236 arch/arm/mach-sunxi/mc_smp.c 		writel(reg, r_cpucfg_base +
writel            249 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
writel            266 arch/arm/mach-sunxi/mc_smp.c 		writel(reg, cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
writel            273 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_CTRL_REG1(cluster));
writel            278 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
writel            285 arch/arm/mach-sunxi/mc_smp.c 		writel(reg, r_cpucfg_base +
writel            304 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
writel            316 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_CTRL_REG0(cluster));
writel            324 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
writel            332 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
writel            337 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_CTRL_REG1(cluster));
writel            441 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_CTRL_REG1(cluster));
writel            496 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
writel            519 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
writel            528 arch/arm/mach-sunxi/mc_smp.c 	writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
writel            885 arch/arm/mach-sunxi/mc_smp.c 	writel(__pa_symbol(sunxi_mc_smp_secondary_startup), addr);
writel             85 arch/arm/mach-sunxi/platsmp.c 	writel(__pa_symbol(secondary_startup),
writel             89 arch/arm/mach-sunxi/platsmp.c 	writel(0, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));
writel             93 arch/arm/mach-sunxi/platsmp.c 	writel(reg & ~BIT(cpu), cpucfg_membase + CPUCFG_GEN_CTRL_REG);
writel             97 arch/arm/mach-sunxi/platsmp.c 	writel(reg & ~BIT(cpu), cpucfg_membase + CPUCFG_DBG_CTL1_REG);
writel            101 arch/arm/mach-sunxi/platsmp.c 		writel(0xff >> i, prcm_membase + PRCM_CPU_PWR_CLAMP_REG(cpu));
writel            106 arch/arm/mach-sunxi/platsmp.c 	writel(reg & ~BIT(cpu), prcm_membase + PRCM_CPU_PWROFF_REG);
writel            110 arch/arm/mach-sunxi/platsmp.c 	writel(3, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));
writel            114 arch/arm/mach-sunxi/platsmp.c 	writel(reg | BIT(cpu), cpucfg_membase + CPUCFG_DBG_CTL1_REG);
writel            169 arch/arm/mach-sunxi/platsmp.c 	writel(__pa_symbol(secondary_startup),
writel            173 arch/arm/mach-sunxi/platsmp.c 	writel(0, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));
writel            177 arch/arm/mach-sunxi/platsmp.c 	writel(reg & ~BIT(cpu), cpucfg_membase + CPUCFG_GEN_CTRL_REG);
writel            181 arch/arm/mach-sunxi/platsmp.c 	writel(reg & ~BIT(cpu), prcm_membase + PRCM_CPU_PWROFF_REG);
writel            185 arch/arm/mach-sunxi/platsmp.c 	writel(3, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));
writel             42 arch/arm/mach-tegra/reset.c 	writel(reset_address, evp_cpu_reset);
writel             52 arch/arm/mach-tegra/reset.c 	writel(reg, sb_ctrl);
writel             77 arch/arm/mach-ux500/platsmp.c 	writel(__pa_symbol(secondary_startup),
writel             79 arch/arm/mach-ux500/platsmp.c 	writel(0xA1FEED01,
writel             52 arch/arm/mach-ux500/pm.c 	writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
writel             70 arch/arm/mach-ux500/pm.c 	writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ);
writel            151 arch/arm/mach-ux500/pm.c 		writel(er, PRCM_ARMITMSK31TO0 + i * 4);
writel            119 arch/arm/mach-versatile/versatile_dt.c 	writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) |
writel            144 arch/arm/mach-versatile/versatile_dt.c 		writel(1, versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET);
writel            346 arch/arm/mach-vexpress/spc.c 	writel(perf, info->baseaddr + perf_cfg_reg);
writel            366 arch/arm/mach-vexpress/spc.c 	writel(SYSCFG_START | func | offset >> 2, info->baseaddr + COMMS);
writel             36 arch/arm/mach-vt8500/vt8500.c 		writel(1, pmc_base + VT8500_PMSR_REG);
writel             88 arch/arm/mach-vt8500/vt8500.c 			writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
writel            120 arch/arm/mach-vt8500/vt8500.c 			writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
writel             62 arch/arm/mach-zynq/platsmp.c 			writel(address, zero + trampoline_size);
writel             69 arch/arm/mach-zynq/pm.c 		writel(reg, ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS);
writel            185 arch/arm/mach-zynq/slcr.c 	writel(state, zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET);
writel            383 arch/arm/mm/cache-feroceon-l2.c 			writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
writel            385 arch/arm/mm/cache-feroceon-l2.c 			writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
writel            105 arch/arm/plat-orion/gpio.c 	writel(u, GPIO_IO_CONF(ochip));
writel            117 arch/arm/plat-orion/gpio.c 	writel(u, GPIO_OUT(ochip));
writel            130 arch/arm/plat-orion/gpio.c 	writel(u, GPIO_BLINK_EN(ochip));
writel            381 arch/arm/plat-orion/gpio.c 		writel(u, GPIO_IN_POL(ochip));
writel            385 arch/arm/plat-orion/gpio.c 		writel(u, GPIO_IN_POL(ochip));
writel            399 arch/arm/plat-orion/gpio.c 		writel(u, GPIO_IN_POL(ochip));
writel            431 arch/arm/plat-orion/gpio.c 			writel(polarity, GPIO_IN_POL(ochip));
writel            569 arch/arm/plat-orion/gpio.c 	writel(0, GPIO_EDGE_CAUSE(ochip));
writel            570 arch/arm/plat-orion/gpio.c 	writel(0, GPIO_EDGE_MASK(ochip));
writel            571 arch/arm/plat-orion/gpio.c 	writel(0, GPIO_LEVEL_MASK(ochip));
writel             30 arch/arm/plat-orion/irq.c 	writel(0, maskaddr);
writel             78 arch/arm/plat-orion/mpp.c 		writel(mpp_ctrl[i], mpp_ctrl_addr(i, dev_bus));
writel             89 arch/arm/plat-orion/pcie.c 	writel(stat, base + PCIE_STAT_OFF);
writel            105 arch/arm/plat-orion/pcie.c 	writel(reg, base + PCIE_DEBUG_CTRL);
writel            115 arch/arm/plat-orion/pcie.c 	writel(reg, base + PCIE_DEBUG_CTRL);
writel            135 arch/arm/plat-orion/pcie.c 		writel(0, base + PCIE_BAR_CTRL_OFF(i));
writel            136 arch/arm/plat-orion/pcie.c 		writel(0, base + PCIE_BAR_LO_OFF(i));
writel            137 arch/arm/plat-orion/pcie.c 		writel(0, base + PCIE_BAR_HI_OFF(i));
writel            141 arch/arm/plat-orion/pcie.c 		writel(0, base + PCIE_WIN04_CTRL_OFF(i));
writel            142 arch/arm/plat-orion/pcie.c 		writel(0, base + PCIE_WIN04_BASE_OFF(i));
writel            143 arch/arm/plat-orion/pcie.c 		writel(0, base + PCIE_WIN04_REMAP_OFF(i));
writel            146 arch/arm/plat-orion/pcie.c 	writel(0, base + PCIE_WIN5_CTRL_OFF);
writel            147 arch/arm/plat-orion/pcie.c 	writel(0, base + PCIE_WIN5_BASE_OFF);
writel            148 arch/arm/plat-orion/pcie.c 	writel(0, base + PCIE_WIN5_REMAP_OFF);
writel            157 arch/arm/plat-orion/pcie.c 		writel(cs->base & 0xffff0000, base + PCIE_WIN04_BASE_OFF(i));
writel            158 arch/arm/plat-orion/pcie.c 		writel(0, base + PCIE_WIN04_REMAP_OFF(i));
writel            159 arch/arm/plat-orion/pcie.c 		writel(((cs->size - 1) & 0xffff0000) |
writel            176 arch/arm/plat-orion/pcie.c 	writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1));
writel            177 arch/arm/plat-orion/pcie.c 	writel(0, base + PCIE_BAR_HI_OFF(1));
writel            178 arch/arm/plat-orion/pcie.c 	writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));
writel            205 arch/arm/plat-orion/pcie.c 	writel(mask, base + PCIE_MASK_OFF);
writel            211 arch/arm/plat-orion/pcie.c 	writel(PCIE_CONF_BUS(bus->number) |
writel            230 arch/arm/plat-orion/pcie.c 	writel(PCIE_CONF_BUS(bus->number) |
writel            271 arch/arm/plat-orion/pcie.c 	writel(PCIE_CONF_BUS(bus->number) |
writel            278 arch/arm/plat-orion/pcie.c 		writel(val, base + PCIE_CONF_DATA_OFF);
writel             87 arch/arm/plat-orion/time.c 	writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
writel             91 arch/arm/plat-orion/time.c 	writel(u, bridge_base + BRIDGE_MASK_OFF);
writel             96 arch/arm/plat-orion/time.c 	writel(delta, timer_base + TIMER1_VAL_OFF);
writel            103 arch/arm/plat-orion/time.c 	writel(u, timer_base + TIMER_CTRL_OFF);
writel            119 arch/arm/plat-orion/time.c 	writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
writel            123 arch/arm/plat-orion/time.c 	writel(u & ~BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
writel            126 arch/arm/plat-orion/time.c 	writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
writel            141 arch/arm/plat-orion/time.c 	writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
writel            142 arch/arm/plat-orion/time.c 	writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
writel            146 arch/arm/plat-orion/time.c 	writel(u | BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
writel            150 arch/arm/plat-orion/time.c 	writel(u | TIMER1_EN | TIMER1_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
writel            174 arch/arm/plat-orion/time.c 	writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
writel            227 arch/arm/plat-orion/time.c 	writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
writel            228 arch/arm/plat-orion/time.c 	writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
writel            230 arch/arm/plat-orion/time.c 	writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
writel            232 arch/arm/plat-orion/time.c 	writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
writel             88 arch/arm/plat-samsung/adc.c 	writel(con, adc->regs + S3C2410_ADCCON);
writel            106 arch/arm/plat-samsung/adc.c 			writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
writel            108 arch/arm/plat-samsung/adc.c 			writel(client->channel & 0xf,
writel            114 arch/arm/plat-samsung/adc.c 	writel(con, adc->regs + S3C2410_ADCCON);
writel            327 arch/arm/plat-samsung/adc.c 		writel(0, adc->regs + S3C64XX_ADCCLRINT);
writel            394 arch/arm/plat-samsung/adc.c 	writel(tmp, adc->regs + S3C2410_ADCCON);
writel            425 arch/arm/plat-samsung/adc.c 	writel(con, adc->regs + S3C2410_ADCCON);
writel            457 arch/arm/plat-samsung/adc.c 	writel(tmp, adc->regs + S3C2410_ADCCON);
writel            156 arch/hexagon/include/asm/io.h #define __raw_writel writel
writel            184 arch/hexagon/include/asm/io.h #define __raw_writel writel
writel            244 arch/hexagon/include/asm/io.h 	writel(data, _IO_BASE + (port & IO_SPACE_LIMIT));
writel             68 arch/ia64/include/asm/iosapic.h 	writel(reg, iosapic + IOSAPIC_REG_SELECT);
writel             75 arch/ia64/include/asm/iosapic.h 	writel(reg, iosapic + IOSAPIC_REG_SELECT);
writel             76 arch/ia64/include/asm/iosapic.h 	writel(val, iosapic + IOSAPIC_WINDOW);
writel             81 arch/ia64/include/asm/iosapic.h 	writel(vector, iosapic + IOSAPIC_EOI);
writel             78 arch/ia64/kernel/cyclone.c 	writel(0x00000001,reg);
writel             90 arch/ia64/kernel/cyclone.c 	writel(0x00000001,reg);
writel             25 arch/m68k/coldfire/intc-5249.c 	writel(imr, MCFSIM2_GPIOINTENABLE);
writel             33 arch/m68k/coldfire/intc-5249.c 	writel(imr, MCFSIM2_GPIOINTENABLE);
writel             38 arch/m68k/coldfire/intc-5249.c 	writel(0x1 << (d->irq - MCF_IRQ_GPIO0), MCFSIM2_GPIOINTCLEAR);
writel             31 arch/m68k/coldfire/intc-525x.c 	writel(imr, MCFSIM2_GPIOINTENABLE);
writel             44 arch/m68k/coldfire/intc-525x.c 	writel(imr, MCFSIM2_GPIOINTENABLE);
writel             57 arch/m68k/coldfire/intc-525x.c 	writel(imr, MCFSIM2_GPIOINTCLEAR);
writel             80 arch/m68k/coldfire/intc-525x.c 	writel(MCFINTC2_VECBASE, MCFINTC2_INTBASE);
writel             89 arch/m68k/coldfire/intc-5272.c 		writel(v, intc_irqmap[irq].icr);
writel            101 arch/m68k/coldfire/intc-5272.c 		writel(v, intc_irqmap[irq].icr);
writel            117 arch/m68k/coldfire/intc-5272.c 			writel(v, intc_irqmap[irq].icr);
writel            135 arch/m68k/coldfire/intc-5272.c 			writel(v, MCFSIM_PITR);
writel            166 arch/m68k/coldfire/intc-5272.c 	writel(0x88888888, MCFSIM_ICR1);
writel            167 arch/m68k/coldfire/intc-5272.c 	writel(0x88888888, MCFSIM_ICR2);
writel            168 arch/m68k/coldfire/intc-5272.c 	writel(0x88888888, MCFSIM_ICR3);
writel            169 arch/m68k/coldfire/intc-5272.c 	writel(0x88888888, MCFSIM_ICR4);
writel            107 arch/m68k/coldfire/m5249.c 	writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));
writel            121 arch/m68k/coldfire/m5249.c 	writel(gpio | 0x40, MCFSIM2_GPIOINTENABLE);
writel            124 arch/m68k/coldfire/m5249.c 	writel(gpio | 0x04000000, MCFINTC2_INTPRI5);
writel             56 arch/m68k/coldfire/m525x.c 	writel(f, MCFSIM2_GPIOFUNC);
writel             79 arch/m68k/coldfire/m525x.c 	writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));
writel             69 arch/m68k/coldfire/m5272.c 	writel(v, MCFSIM_PBCNT);
writel             73 arch/m68k/coldfire/m5272.c 	writel(v, MCFSIM_PDCNT);
writel            317 arch/m68k/coldfire/m53xx.c 	writel(0x77777777, MCF_SCM_MPR);
writel            321 arch/m68k/coldfire/m53xx.c 	writel(0, MCF_SCM_PACRA);
writel            322 arch/m68k/coldfire/m53xx.c 	writel(0, MCF_SCM_PACRB);
writel            323 arch/m68k/coldfire/m53xx.c 	writel(0, MCF_SCM_PACRC);
writel            324 arch/m68k/coldfire/m53xx.c 	writel(0, MCF_SCM_PACRD);
writel            325 arch/m68k/coldfire/m53xx.c 	writel(0, MCF_SCM_PACRE);
writel            326 arch/m68k/coldfire/m53xx.c 	writel(0, MCF_SCM_PACRF);
writel            329 arch/m68k/coldfire/m53xx.c 	writel(MCF_SCM_BCR_GBR | MCF_SCM_BCR_GBW, MCF_SCM_BCR);
writel            338 arch/m68k/coldfire/m53xx.c 	writel(0x10080000, MCF_FBCS1_CSAR);
writel            340 arch/m68k/coldfire/m53xx.c 	writel(0x002A3780, MCF_FBCS1_CSCR);
writel            341 arch/m68k/coldfire/m53xx.c 	writel(MCF_FBCS_CSMR_BAM_2M | MCF_FBCS_CSMR_V, MCF_FBCS1_CSMR);
writel            347 arch/m68k/coldfire/m53xx.c 	writel(EXT_SRAM_ADDRESS, MCF_FBCS1_CSAR);
writel            348 arch/m68k/coldfire/m53xx.c 	writel(MCF_FBCS_CSCR_PS_16 |
writel            353 arch/m68k/coldfire/m53xx.c 	writel(MCF_FBCS_CSMR_BAM_512K | MCF_FBCS_CSMR_V, MCF_FBCS1_CSMR);
writel            356 arch/m68k/coldfire/m53xx.c 	writel(FLASH_ADDRESS, MCF_FBCS0_CSAR);
writel            357 arch/m68k/coldfire/m53xx.c 	writel(MCF_FBCS_CSCR_PS_16 |
writel            363 arch/m68k/coldfire/m53xx.c 	writel(MCF_FBCS_CSMR_BAM_32M | MCF_FBCS_CSMR_V, MCF_FBCS0_CSMR);
writel            376 arch/m68k/coldfire/m53xx.c 		writel(MCF_SDRAMC_SDCS_BA(SDRAM_ADDRESS) |
writel            383 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_SDCFG1_SRD2RW((int)((SDRAM_CASL + 2) + 0.5)) |
writel            391 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_SDCFG2_BRD2PRE(SDRAM_BL / 2 + 1) |
writel            401 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_SDCR_MODE_EN |
writel            413 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_SDMR_BNKAD_LEMR |
writel            421 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_SDMR_BNKAD_LMR |
writel            429 arch/m68k/coldfire/m53xx.c 	writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IPALL, MCF_SDRAMC_SDCR);
writel            434 arch/m68k/coldfire/m53xx.c 	writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IREF, MCF_SDRAMC_SDCR);
writel            435 arch/m68k/coldfire/m53xx.c 	writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IREF, MCF_SDRAMC_SDCR);
writel            440 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_SDMR_BNKAD_LMR |
writel            448 arch/m68k/coldfire/m53xx.c 	writel(readl(MCF_SDRAMC_SDCR) & ~MCF_SDRAMC_SDCR_MODE_EN,
writel            450 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_SDCR_REF | MCF_SDRAMC_SDCR_DQS_OE(0xC),
writel            507 arch/m68k/coldfire/m53xx.c 		writel(readl(MCF_SDRAMC_SDCR) & ~MCF_SDRAMC_SDCR_CKE,
writel            532 arch/m68k/coldfire/m53xx.c 		writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_CKE,
writel            536 arch/m68k/coldfire/m53xx.c 	writel(MCF_SDRAMC_REFRESH, MCF_SDRAMC_LIMP_FIX);
writel             79 arch/m68k/coldfire/m54xx.c 	writel(r, MCF_PAR_FECI2CIRQ);
writel            411 arch/m68k/include/asm/io_mm.h #define writel_relaxed(b, addr)	writel(b, addr)
writel             90 arch/m68k/include/asm/io_no.h #define writel writel
writel            228 arch/mips/ar7/clock.c 	writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
writel            230 arch/mips/ar7/clock.c 	writel(4, &clock->pll);
writel            233 arch/mips/ar7/clock.c 	writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
writel            269 arch/mips/ar7/clock.c 	writel(0, &clock->ctrl);
writel            270 arch/mips/ar7/clock.c 	writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv);
writel            271 arch/mips/ar7/clock.c 	writel((mul - 1) & 0xF, &clock->mul);
writel            276 arch/mips/ar7/clock.c 	writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv);
writel            278 arch/mips/ar7/clock.c 	writel(readl(&clock->cmden) | 1, &clock->cmden);
writel            279 arch/mips/ar7/clock.c 	writel(readl(&clock->cmd) | 1, &clock->cmd);
writel            284 arch/mips/ar7/clock.c 	writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2);
writel            286 arch/mips/ar7/clock.c 	writel(readl(&clock->cmden) | 1, &clock->cmden);
writel            287 arch/mips/ar7/clock.c 	writel(readl(&clock->cmd) | 1, &clock->cmd);
writel            292 arch/mips/ar7/clock.c 	writel(readl(&clock->ctrl) | 1, &clock->ctrl);
writel             49 arch/mips/ar7/gpio.c 	writel(tmp, gpio_out);
writel             63 arch/mips/ar7/gpio.c 	writel(tmp, gpio >> 5 ? gpio_out1 : gpio_out0);
writel             71 arch/mips/ar7/gpio.c 	writel(readl(gpio_dir) | (1 << gpio), gpio_dir);
writel             85 arch/mips/ar7/gpio.c 	writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) | (1 << (gpio & 0x1f)),
writel             97 arch/mips/ar7/gpio.c 	writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir);
writel            113 arch/mips/ar7/gpio.c 	writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) & ~(1 <<
writel            147 arch/mips/ar7/gpio.c 	writel(readl(gpio_en) | (1 << gpio), gpio_en);
writel            157 arch/mips/ar7/gpio.c 	writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) | (1 << (gpio & 0x1f)),
writel            174 arch/mips/ar7/gpio.c 	writel(readl(gpio_en) & ~(1 << gpio), gpio_en);
writel            184 arch/mips/ar7/gpio.c 	writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) & ~(1 << (gpio & 0x1f)),
writel            280 arch/mips/ar7/gpio.c 	writel(tmp, pin_sel + pin_sel_reg);
writel             41 arch/mips/ar7/irq.c 	writel(1 << ((d->irq - ar7_irq_base) % 32),
writel             47 arch/mips/ar7/irq.c 	writel(1 << ((d->irq - ar7_irq_base) % 32),
writel             53 arch/mips/ar7/irq.c 	writel(1 << ((d->irq - ar7_irq_base) % 32),
writel             59 arch/mips/ar7/irq.c 	writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET));
writel             64 arch/mips/ar7/irq.c 	writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET));
writel             69 arch/mips/ar7/irq.c 	writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET));
writel             98 arch/mips/ar7/irq.c 	writel(0xffffffff, REG(ECR_OFFSET(0)));
writel             99 arch/mips/ar7/irq.c 	writel(0xff, REG(ECR_OFFSET(32)));
writel            100 arch/mips/ar7/irq.c 	writel(0xffffffff, REG(SEC_ECR_OFFSET));
writel            101 arch/mips/ar7/irq.c 	writel(0xffffffff, REG(CR_OFFSET(0)));
writel            102 arch/mips/ar7/irq.c 	writel(0xff, REG(CR_OFFSET(32)));
writel            103 arch/mips/ar7/irq.c 	writel(0xffffffff, REG(SEC_CR_OFFSET));
writel            108 arch/mips/ar7/irq.c 		writel(i, REG(CHNL_OFFSET(i)));
writel            143 arch/mips/ar7/irq.c 	writel(1, REG(CR_OFFSET(irq)));
writel             40 arch/mips/ar7/memory.c 	writel((u32)tmpaddr, &addr);
writel            248 arch/mips/ar7/prom.c 	writel(value, (void *)PORT(offset));
writel             19 arch/mips/ar7/setup.c 	writel(1, softres_reg);
writel             33 arch/mips/ar7/setup.c 	writel(power_state, power_reg);
writel            158 arch/mips/include/asm/mach-ar7/ar7.h 	writel(readl(reset_reg) | (1 << bit), reset_reg);
writel            166 arch/mips/include/asm/mach-ar7/ar7.h 	writel(readl(reset_reg) & ~(1 << bit), reset_reg);
writel            179 arch/mips/include/asm/mach-ar7/ar7.h 	writel(readl(power_reg) | (1 << bit), power_reg);
writel            186 arch/mips/include/asm/mach-ar7/ar7.h 	writel(readl(power_reg) & ~(1 << bit), power_reg);
writel             57 arch/mips/include/asm/mach-jz4740/timer.h 	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
writel             62 arch/mips/include/asm/mach-jz4740/timer.h 	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
writel            102 arch/mips/include/asm/mach-jz4740/timer.h 	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
writel            107 arch/mips/include/asm/mach-jz4740/timer.h 	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
writel            108 arch/mips/include/asm/mach-jz4740/timer.h 	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_CLEAR);
writel            113 arch/mips/include/asm/mach-jz4740/timer.h 	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_SET);
writel            338 arch/mips/include/asm/mips-cm.h 	writel(0, mips_cm_l2sync_base);
writel             20 arch/mips/jz4740/timer.c 	writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
writel             26 arch/mips/jz4740/timer.c 	writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
writel             38 arch/mips/jz4740/timer.c 	writel(0x000100fc, jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
writel             41 arch/mips/jz4740/timer.c 	writel(0x00ff00ff, jz4740_timer_base + JZ_REG_TIMER_MASK_SET);
writel             41 arch/mips/loongson64/loongson-3/smp.c 		writel(action, addr);		\
writel            186 arch/mips/netlogic/xlp/usb-init-xlp2.c 	writel(0x240002, corebase + 0xc2c0);
writel            191 arch/mips/netlogic/xlp/usb-init-xlp2.c 	writel(val, corebase + 0xc110);
writel            197 arch/mips/netlogic/xlp/usb-init-xlp2.c 	writel(val, corebase + 0xc200);
writel            203 arch/mips/netlogic/xlp/usb-init-xlp2.c 	writel(val, corebase + 0xc2c0);
writel             61 arch/mips/pci/ops-bonito64.c 		writel(cpu_to_le32(*data), addrp);
writel             93 arch/mips/pci/ops-loongson2.c 		writel(cpu_to_le32(*data), addrp);
writel             54 arch/mips/pci/ops-loongson3.c 		writel(*data, addrp);
writel             32 arch/mips/pci/ops-vr41xx.c 		writel((1U << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) |
writel             41 arch/mips/pci/ops-vr41xx.c 		writel(((uint32_t)number << 16) | ((devfn & 0xff) << 8) |
writel            105 arch/mips/pci/ops-vr41xx.c 	writel(data, PCICONFDREG);
writel             53 arch/mips/pci/pci-rt2880.c 	writel(val, rt2880_pci_base + reg);
writel             31 arch/mips/pci/pci-vr41xx.c #define pciu_write(offset, value)	writel((value), pciu_base + (offset))
writel             46 arch/mips/pic32/pic32mzda/config.c 	writel(v, pic32_conf_base + offset);
writel             83 arch/mips/pic32/pic32mzda/config.c 	writel(0x00000000, syskey);
writel             84 arch/mips/pic32/pic32mzda/config.c 	writel(0xAA996655, syskey);
writel             85 arch/mips/pic32/pic32mzda/config.c 	writel(0x556699AA, syskey);
writel            112 arch/mips/pic32/pic32mzda/config.c 	writel(-1, PIC32_CLR(pic32_conf_base + PIC32_RCON));
writel             71 arch/mips/rb532/gpio.c 	writel(val, ioaddr);
writel             32 arch/mips/rb532/setup.c 	writel(0x80000001, IDT434_REG_BASE + RST);
writel             91 arch/nds32/include/asm/l2_cache.h #define L2C_W_REG(offset, value)        writel(value, atl2c_base + offset)
writel             51 arch/nios2/boot/compressed/console.c 	writel(ALTERA_JTAGUART_CONTROL_AC_MSK,
writel             26 arch/nios2/include/asm/io.h #define writel_relaxed(x, addr)	writel(x, addr)
writel            220 arch/parisc/include/asm/io.h #define writel	writel
writel            229 arch/parisc/include/asm/io.h #define writel_relaxed(l, addr)	writel(l, addr)
writel            205 arch/parisc/lib/iomap.c 	writel(datum, addr);
writel            215 arch/parisc/lib/iomap.c 	writel(datum, addr);
writel             12 arch/powerpc/include/asm/io-defs.h DEF_PCI_AC_NORET(writel, (u32 val, PCI_IO_ADDR addr), (val, addr), mem, addr)
writel            523 arch/powerpc/include/asm/io.h #define __do_outl(val, port)	writel(val,(PCI_IO_ADDR)_IO_BASE+port);
writel            638 arch/powerpc/include/asm/io.h #define writel_relaxed(v, addr)	writel(v, addr)
writel             90 arch/powerpc/kernel/iomap.c 	writel(val, addr);
writel            244 arch/powerpc/platforms/4xx/pci.c 	writel(plb_addr, reg + PCIL0_PMM0LA + (0x10 * index));
writel            245 arch/powerpc/platforms/4xx/pci.c 	writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * index));
writel            246 arch/powerpc/platforms/4xx/pci.c 	writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * index));
writel            247 arch/powerpc/platforms/4xx/pci.c 	writel(ma, reg + PCIL0_PMM0MA + (0x10 * index));
writel            307 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIL0_PTM1LA);
writel            308 arch/powerpc/platforms/4xx/pci.c 	writel(sa, reg + PCIL0_PTM1MS);
writel            375 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIL0_PMM0MA);
writel            376 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIL0_PMM1MA);
writel            377 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIL0_PMM2MA);
writel            378 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIL0_PTM1MS);
writel            379 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIL0_PTM2MS);
writel            435 arch/powerpc/platforms/4xx/pci.c 		writel(lah, reg + PCIX0_POM0LAH);
writel            436 arch/powerpc/platforms/4xx/pci.c 		writel(lal, reg + PCIX0_POM0LAL);
writel            437 arch/powerpc/platforms/4xx/pci.c 		writel(pciah, reg + PCIX0_POM0PCIAH);
writel            438 arch/powerpc/platforms/4xx/pci.c 		writel(pcial, reg + PCIX0_POM0PCIAL);
writel            439 arch/powerpc/platforms/4xx/pci.c 		writel(sa, reg + PCIX0_POM0SA);
writel            441 arch/powerpc/platforms/4xx/pci.c 		writel(lah, reg + PCIX0_POM1LAH);
writel            442 arch/powerpc/platforms/4xx/pci.c 		writel(lal, reg + PCIX0_POM1LAL);
writel            443 arch/powerpc/platforms/4xx/pci.c 		writel(pciah, reg + PCIX0_POM1PCIAH);
writel            444 arch/powerpc/platforms/4xx/pci.c 		writel(pcial, reg + PCIX0_POM1PCIAL);
writel            445 arch/powerpc/platforms/4xx/pci.c 		writel(sa, reg + PCIX0_POM1SA);
writel            504 arch/powerpc/platforms/4xx/pci.c 	writel(0x00000000, reg + PCIX0_PIM0LAH);
writel            505 arch/powerpc/platforms/4xx/pci.c 	writel(0x00000000, reg + PCIX0_PIM0LAL);
writel            514 arch/powerpc/platforms/4xx/pci.c 	writel(sa, reg + PCIX0_PIM0SA);
writel            516 arch/powerpc/platforms/4xx/pci.c 		writel(0xffffffff, reg + PCIX0_PIM0SAH);
writel            519 arch/powerpc/platforms/4xx/pci.c 	writel(0x00000000, reg + PCIX0_BAR0H);
writel            520 arch/powerpc/platforms/4xx/pci.c 	writel(res->start, reg + PCIX0_BAR0L);
writel            582 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIX0_POM0SA);
writel            583 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIX0_POM1SA);
writel            584 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIX0_POM2SA);
writel            585 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIX0_PIM0SA);
writel            586 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIX0_PIM1SA);
writel            587 arch/powerpc/platforms/4xx/pci.c 	writel(0, reg + PCIX0_PIM2SA);
writel            589 arch/powerpc/platforms/4xx/pci.c 		writel(0, reg + PCIX0_PIM0SAH);
writel            590 arch/powerpc/platforms/4xx/pci.c 		writel(0, reg + PCIX0_PIM2SAH);
writel            112 arch/powerpc/platforms/chrp/pegasos_eth.c #define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset)
writel            382 arch/powerpc/sysdev/mpic.c 		writel(mask, fixup->applebase + soff);
writel            386 arch/powerpc/sysdev/mpic.c 		writel(fixup->data, fixup->base + 4);
writel            410 arch/powerpc/sysdev/mpic.c 	writel(tmp, fixup->base + 4);
writel            436 arch/powerpc/sysdev/mpic.c 	writel(tmp, fixup->base + 4);
writel            525 arch/powerpc/sysdev/mpic.c 		writel(tmp, base + 4);
writel           1981 arch/powerpc/sysdev/mpic.c 			writel(mpic->save_data[i].fixup_data & ~1,
writel             52 arch/riscv/mm/sifive_l2_cache.c 		writel(val, l2_base + SIFIVE_L2_ECCINJECTERR);
writel             57 arch/sh/boards/board-sh7757lcr.c 		writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
writel             59 arch/sh/boards/board-sh7757lcr.c 		writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
writel            120 arch/sh/boards/board-sh7757lcr.c 		writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
writel            123 arch/sh/boards/board-sh7757lcr.c 		writel(readl(GBECONT) & ~GBECONT_RMII1, GBECONT);
writel            350 arch/sh/boards/board-sh7785lcr.c 	writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
writel            294 arch/sh/boards/mach-r2d/setup.c 	writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
writel             32 arch/sh/drivers/pci/fixups-se7751.c #define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
writel             61 arch/sh/kernel/iomap.c 	writel(val, addr);
writel            598 arch/sparc/include/asm/floppy_64.h 		writel(readl(auxio_reg)|0x2, auxio_reg);
writel            175 arch/sparc/include/asm/io_64.h #define writel writel
writel            176 arch/sparc/include/asm/io_64.h #define writel_relaxed writel
writel            228 arch/sparc/include/asm/io_64.h 	writel(l, (volatile void __iomem *)addr);
writel            426 arch/sparc/include/asm/io_64.h #define iowrite32		writel
writel             47 arch/sparc/kernel/auxio_64.c 			writel((u32) newval, auxio_register);
writel             55 arch/sparc/kernel/ebus.c 	writel(EBDMA_CSR_RESET, p->regs + EBDMA_CSR);
writel             78 arch/sparc/kernel/ebus.c 	writel(csr, p->regs + EBDMA_CSR);
writel            118 arch/sparc/kernel/ebus.c 	writel(csr, p->regs + EBDMA_CSR);
writel            138 arch/sparc/kernel/ebus.c 		writel(csr, p->regs + EBDMA_CSR);
writel            144 arch/sparc/kernel/ebus.c 		writel(csr, p->regs + EBDMA_CSR);
writel            166 arch/sparc/kernel/ebus.c 		writel(csr, p->regs + EBDMA_CSR);
writel            194 arch/sparc/kernel/ebus.c 	writel(len,      p->regs + EBDMA_COUNT);
writel            195 arch/sparc/kernel/ebus.c 	writel(bus_addr, p->regs + EBDMA_ADDR);
writel            223 arch/sparc/kernel/ebus.c 	writel(csr, p->regs + EBDMA_CSR);
writel            254 arch/sparc/kernel/ebus.c 		writel(csr, p->regs + EBDMA_CSR);
writel            189 arch/sparc/kernel/pcic.c 	writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
writel            246 arch/sparc/kernel/pcic.c 	writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
writel            247 arch/sparc/kernel/pcic.c 	writel(value, pcic->pcic_config_space_data + (where&4));
writel            433 arch/sparc/kernel/pcic.c 	writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0);
writel            434 arch/sparc/kernel/pcic.c 	writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY, 
writel            721 arch/sparc/kernel/pcic.c 	writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT);
writel            725 arch/sparc/kernel/pcic.c 	writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),
writel            777 arch/sparc/kernel/pcic.c 	writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
writel            787 arch/sparc/kernel/pcic.c 	writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
writel             76 arch/unicore32/include/asm/gpio.h 			writel(GPIO_GPIO(gpio), GPIO_GPSR);
writel             78 arch/unicore32/include/asm/gpio.h 			writel(GPIO_GPIO(gpio), GPIO_GPCR);
writel             37 arch/unicore32/include/mach/dma.h 	writel(readl(DMAC_CONFIG(ch)) & ~DMAC_CONFIG_EN, DMAC_CONFIG(ch));
writel             42 arch/unicore32/include/mach/dma.h 	writel(readl(DMAC_CONFIG(ch)) | DMAC_CONFIG_EN, DMAC_CONFIG(ch));
writel            157 arch/unicore32/kernel/clock.c 		writel(pll_vgacfg, PM_PLLVGACFG);
writel            159 arch/unicore32/kernel/clock.c 		writel(PM_PMCR_CFBVGA, PM_PMCR);
writel            165 arch/unicore32/kernel/clock.c 		writel(readl(PM_PCGR) | PM_PCGR_VGACLK, PM_PCGR);
writel            167 arch/unicore32/kernel/clock.c 		writel((readl(PM_DIVCFG) & ~PM_DIVCFG_VGACLK_MASK)
writel            170 arch/unicore32/kernel/clock.c 		writel(readl(PM_SWRESET) | PM_SWRESET_VGADIV, PM_SWRESET);
writel            175 arch/unicore32/kernel/clock.c 		writel(readl(PM_PCGR) & ~PM_PCGR_VGACLK, PM_PCGR);
writel            201 arch/unicore32/kernel/clock.c 		writel(pll_rate, PM_PLLSYSCFG);
writel            203 arch/unicore32/kernel/clock.c 		writel(PM_PMCR_CFBSYS, PM_PMCR);
writel            331 arch/unicore32/kernel/clock.c 	writel(pcgr_val, PM_PCGR);
writel            102 arch/unicore32/kernel/dma.c 			writel(DMAC_CHANNEL(i), DMAC_ITCCR);
writel            103 arch/unicore32/kernel/dma.c 			writel(0, DMAC_ITCCR);
writel            130 arch/unicore32/kernel/dma.c 			writel(DMAC_CHANNEL(i), DMAC_IECR);
writel            131 arch/unicore32/kernel/dma.c 			writel(0, DMAC_IECR);
writel             60 arch/unicore32/kernel/gpio.c 		writel(GPIO_GPIO(offset), GPIO_GPSR);
writel             62 arch/unicore32/kernel/gpio.c 		writel(GPIO_GPIO(offset), GPIO_GPCR);
writel             70 arch/unicore32/kernel/gpio.c 	writel(readl(GPIO_GPDR) & ~GPIO_GPIO(offset), GPIO_GPDR);
writel             82 arch/unicore32/kernel/gpio.c 	writel(readl(GPIO_GPDR) | GPIO_GPIO(offset), GPIO_GPDR);
writel             99 arch/unicore32/kernel/gpio.c 	writel(GPIO_DIR, GPIO_GPDR);
writel             64 arch/unicore32/kernel/irq.c 	writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER);
writel             65 arch/unicore32/kernel/irq.c 	writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER);
writel             75 arch/unicore32/kernel/irq.c 	writel((1 << d->irq), GPIO_GEDR);
writel             80 arch/unicore32/kernel/irq.c 	writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR);
writel             85 arch/unicore32/kernel/irq.c 	writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR);
writel             91 arch/unicore32/kernel/irq.c 		writel(readl(PM_PWER) | (1 << d->irq), PM_PWER);
writel             93 arch/unicore32/kernel/irq.c 		writel(readl(PM_PWER) & ~(1 << d->irq), PM_PWER);
writel            121 arch/unicore32/kernel/irq.c 		writel(mask, GPIO_GEDR);
writel            143 arch/unicore32/kernel/irq.c 	writel(mask, GPIO_GEDR);
writel            152 arch/unicore32/kernel/irq.c 	writel(readl(GPIO_GRER) & ~mask, GPIO_GRER);
writel            153 arch/unicore32/kernel/irq.c 	writel(readl(GPIO_GFER) & ~mask, GPIO_GFER);
writel            162 arch/unicore32/kernel/irq.c 	writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER);
writel            163 arch/unicore32/kernel/irq.c 	writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER);
writel            169 arch/unicore32/kernel/irq.c 		writel(readl(PM_PWER) | PM_PWER_GPIOHIGH, PM_PWER);
writel            171 arch/unicore32/kernel/irq.c 		writel(readl(PM_PWER) & ~PM_PWER_GPIOHIGH, PM_PWER);
writel            190 arch/unicore32/kernel/irq.c 	writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR);
writel            195 arch/unicore32/kernel/irq.c 	writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR);
writel            205 arch/unicore32/kernel/irq.c 			writel(readl(PM_PWER) | PM_PWER_RTC, PM_PWER);
writel            207 arch/unicore32/kernel/irq.c 			writel(readl(PM_PWER) & ~PM_PWER_RTC, PM_PWER);
writel            246 arch/unicore32/kernel/irq.c 	writel(readl(INTC_ICMR) & ~(0x1ff), INTC_ICMR);
writel            251 arch/unicore32/kernel/irq.c 	writel(readl(PM_PWER) & GPIO_IRQ_rising_edge, GPIO_GRER);
writel            252 arch/unicore32/kernel/irq.c 	writel(readl(PM_PWER) & GPIO_IRQ_falling_edge, GPIO_GFER);
writel            257 arch/unicore32/kernel/irq.c 	writel(readl(GPIO_GEDR), GPIO_GEDR);
writel            267 arch/unicore32/kernel/irq.c 		writel(st->iccr, INTC_ICCR);
writel            268 arch/unicore32/kernel/irq.c 		writel(st->iclr, INTC_ICLR);
writel            270 arch/unicore32/kernel/irq.c 		writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER);
writel            271 arch/unicore32/kernel/irq.c 		writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER);
writel            273 arch/unicore32/kernel/irq.c 		writel(st->icmr, INTC_ICMR);
writel            297 arch/unicore32/kernel/irq.c 	writel(0, INTC_ICMR);
writel            300 arch/unicore32/kernel/irq.c 	writel(0, INTC_ICLR);
writel            303 arch/unicore32/kernel/irq.c 	writel(FMASK(8, 0) & ~FIELD(1, 1, GPI_SOFF_REQ), GPIO_GPIR);
writel            304 arch/unicore32/kernel/irq.c 	writel(0, GPIO_GFER);
writel            305 arch/unicore32/kernel/irq.c 	writel(0, GPIO_GRER);
writel            306 arch/unicore32/kernel/irq.c 	writel(0x0FFFFFFF, GPIO_GEDR);
writel            308 arch/unicore32/kernel/irq.c 	writel(1, INTC_ICCR);
writel             28 arch/unicore32/kernel/pci.c 	writel(CONFIG_CMD(bus, devfn, where), PCICFG_ADDR);
writel             47 arch/unicore32/kernel/pci.c 	writel(CONFIG_CMD(bus, devfn, where), PCICFG_ADDR);
writel             50 arch/unicore32/kernel/pci.c 		writel((readl(PCICFG_DATA) & ~FMASK(8, (where&3)*8))
writel             54 arch/unicore32/kernel/pci.c 		writel((readl(PCICFG_DATA) & ~FMASK(16, (where&2)*8))
writel             58 arch/unicore32/kernel/pci.c 		writel(value, PCICFG_DATA);
writel             73 arch/unicore32/kernel/pci.c 	writel(io_v2p(PKUNITY_PCIBRI_BASE), PCICFG_BRIBASE);
writel             75 arch/unicore32/kernel/pci.c 	writel(0, PCIBRI_AHBCTL0);
writel             76 arch/unicore32/kernel/pci.c 	writel(io_v2p(PKUNITY_PCIBRI_BASE) | PCIBRI_BARx_MEM, PCIBRI_AHBBAR0);
writel             77 arch/unicore32/kernel/pci.c 	writel(0xFFFF0000, PCIBRI_AHBAMR0);
writel             78 arch/unicore32/kernel/pci.c 	writel(0, PCIBRI_AHBTAR0);
writel             80 arch/unicore32/kernel/pci.c 	writel(PCIBRI_CTLx_AT, PCIBRI_AHBCTL1);
writel             81 arch/unicore32/kernel/pci.c 	writel(io_v2p(PKUNITY_PCILIO_BASE) | PCIBRI_BARx_IO, PCIBRI_AHBBAR1);
writel             82 arch/unicore32/kernel/pci.c 	writel(0xFFFF0000, PCIBRI_AHBAMR1);
writel             83 arch/unicore32/kernel/pci.c 	writel(0x00000000, PCIBRI_AHBTAR1);
writel             85 arch/unicore32/kernel/pci.c 	writel(PCIBRI_CTLx_PREF, PCIBRI_AHBCTL2);
writel             86 arch/unicore32/kernel/pci.c 	writel(io_v2p(PKUNITY_PCIMEM_BASE) | PCIBRI_BARx_MEM, PCIBRI_AHBBAR2);
writel             87 arch/unicore32/kernel/pci.c 	writel(0xF8000000, PCIBRI_AHBAMR2);
writel             88 arch/unicore32/kernel/pci.c 	writel(0, PCIBRI_AHBTAR2);
writel             90 arch/unicore32/kernel/pci.c 	writel(io_v2p(PKUNITY_PCIAHB_BASE) | PCIBRI_BARx_MEM, PCIBRI_BAR1);
writel             92 arch/unicore32/kernel/pci.c 	writel(PCIBRI_CTLx_AT | PCIBRI_CTLx_PREF, PCIBRI_PCICTL0);
writel             93 arch/unicore32/kernel/pci.c 	writel(io_v2p(PKUNITY_PCIAHB_BASE) | PCIBRI_BARx_MEM, PCIBRI_PCIBAR0);
writel             94 arch/unicore32/kernel/pci.c 	writel(0xF8000000, PCIBRI_PCIAMR0);
writel             95 arch/unicore32/kernel/pci.c 	writel(PKUNITY_SDRAM_BASE, PCIBRI_PCITAR0);
writel             97 arch/unicore32/kernel/pci.c 	writel(readl(PCIBRI_CMD) | PCIBRI_CMD_IO | PCIBRI_CMD_MEM, PCIBRI_CMD);
writel             99 arch/unicore32/kernel/process.c 		writel(0x00002001, PM_PLLSYSCFG); /* cpu clk = 250M */
writel            100 arch/unicore32/kernel/process.c 		writel(0x00100800, PM_PLLDDRCFG); /* ddr clk =  44M */
writel            101 arch/unicore32/kernel/process.c 		writel(0x00002001, PM_PLLVGACFG); /* vga clk = 250M */
writel            194 arch/unicore32/kernel/puv3-core.c 	writel(virt_to_phys(puv3_cpu_resume), PM_DIVCFG);
writel            201 arch/unicore32/kernel/puv3-core.c 	writel(RESETC_RSSR_HWR | RESETC_RSSR_WDR
writel            249 arch/unicore32/kernel/puv3-core.c 	writel(clk_get_rate(bclk32) / 200000, PS2_CNT); /* should > 5us */
writel             26 arch/unicore32/kernel/time.c 	writel(readl(OST_OIER) & ~OST_OIER_E0, OST_OIER);
writel             27 arch/unicore32/kernel/time.c 	writel(readl(OST_OSSR) & ~OST_OSSR_M0, OST_OSSR);
writel             38 arch/unicore32/kernel/time.c 	writel(readl(OST_OIER) | OST_OIER_E0, OST_OIER);
writel             40 arch/unicore32/kernel/time.c 	writel(next, OST_OSMR0);
writel             48 arch/unicore32/kernel/time.c 	writel(readl(OST_OIER) & ~OST_OIER_E0, OST_OIER);
writel             49 arch/unicore32/kernel/time.c 	writel(readl(OST_OSSR) & ~OST_OSSR_M0, OST_OSSR);
writel             84 arch/unicore32/kernel/time.c 	writel(0, OST_OIER);		/* disable any timer interrupts */
writel             85 arch/unicore32/kernel/time.c 	writel(0, OST_OSSR);		/* clear status on all timers */
writel            117 arch/unicore32/kernel/time.c 	writel(0, OST_OSSR);
writel            118 arch/unicore32/kernel/time.c 	writel(osmr[0], OST_OSMR0);
writel            119 arch/unicore32/kernel/time.c 	writel(osmr[1], OST_OSMR1);
writel            120 arch/unicore32/kernel/time.c 	writel(osmr[2], OST_OSMR2);
writel            121 arch/unicore32/kernel/time.c 	writel(osmr[3], OST_OSMR3);
writel            122 arch/unicore32/kernel/time.c 	writel(oier, OST_OIER);
writel            127 arch/unicore32/kernel/time.c 	writel(readl(OST_OSMR0) - LATCH, OST_OSCR);
writel           4405 arch/x86/events/intel/uncore_snbep.c 	writel(IVBEP_PMON_BOX_CTL_INT, box->io_addr);
writel           4417 arch/x86/events/intel/uncore_snbep.c 	writel(config, box->io_addr);
writel           4429 arch/x86/events/intel/uncore_snbep.c 	writel(config, box->io_addr);
writel           4440 arch/x86/events/intel/uncore_snbep.c 	writel(hwc->config | SNBEP_PMON_CTL_EN,
writel           4452 arch/x86/events/intel/uncore_snbep.c 	writel(hwc->config, box->io_addr + hwc->config_base);
writel             67 arch/x86/include/asm/io.h build_mmio_write(writel, "l", unsigned int, "r", :"memory")
writel             85 arch/x86/include/asm/io.h #define writel writel
writel             52 arch/x86/include/asm/numachip/numachip_csr.h 	writel(swab32(val), lcsr_address(offset));
writel             85 arch/x86/include/asm/numachip/numachip_csr.h 	writel(val, numachip2_lcsr_address(offset));
writel            283 arch/x86/kernel/apic/io_apic.c 	writel(vector, &io_apic->eoi);
writel            289 arch/x86/kernel/apic/io_apic.c 	writel(reg, &io_apic->index);
writel            298 arch/x86/kernel/apic/io_apic.c 	writel(reg, &io_apic->index);
writel            299 arch/x86/kernel/apic/io_apic.c 	writel(value, &io_apic->data);
writel            202 arch/x86/kernel/early_printk.c 	writel(value, vaddr + offset);
writel             82 arch/x86/kernel/hpet.c 	writel(d, hpet_virt_address + a);
writel            538 arch/x86/kernel/pci-calgary_64.c 	writel(0, target);
writel            559 arch/x86/kernel/pci-calgary_64.c 	writel(aer, target);
writel            583 arch/x86/kernel/pci-calgary_64.c 	writel(cpu_to_be32(val), target);
writel            635 arch/x86/kernel/pci-calgary_64.c 	writel(cpu_to_be32(val), target);
writel            889 arch/x86/kernel/pci-calgary_64.c 		writel(0, target);
writel            896 arch/x86/kernel/pci-calgary_64.c 		writel(cpu_to_be32(val32), target);
writel            949 arch/x86/kernel/pci-calgary_64.c 	writel(cpu_to_be32(val), target);
writel            988 arch/x86/kernel/pci-calgary_64.c 	writel(cpu_to_be32(val32), target);
writel           1013 arch/x86/kernel/pci-calgary_64.c 	writel(cpu_to_be32(val32), target);
writel             85 arch/x86/kernel/quirks.c 		writel(val | 0x80, rcba_base + 0x3404);
writel            134 arch/x86/kernel/quirks.c 	writel(val | 0x80, rcba_base + 0x3404);
writel             52 arch/x86/kernel/vsmp_64.c 	writel(ctl, address + 4);
writel             79 arch/x86/platform/ce4100/ce4100.c 	writel(value, p->membase + offset);
writel            113 arch/x86/platform/intel-mid/pwr.c 	writel(value, pwr->regs + PM_SSC(reg));
writel            118 arch/x86/platform/intel-mid/pwr.c 	writel(value, pwr->regs + PM_WKC(reg));
writel            123 arch/x86/platform/intel-mid/pwr.c 	writel(~PM_ICS_IE, pwr->regs + PM_ICS);
writel            149 arch/x86/platform/intel-mid/pwr.c 	writel(PM_CMD_CMD(cmd) | PM_CMD_CM_IMMEDIATE, pwr->regs + PM_CMD);
writel            300 arch/x86/platform/intel-mid/pwr.c 	writel(cmd, pwr->regs + PM_CMD);
writel            338 arch/x86/platform/intel-mid/pwr.c 	writel(ics | PM_ICS_IP, pwr->regs + PM_ICS);
writel            280 arch/x86/platform/uv/uv_nmi.c 		writel(writed, addr);
writel            283 arch/x86/platform/uv/uv_nmi.c 		writel(data, addr);
writel            133 drivers/acpi/acpi_lpss.c 	writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
writel            140 drivers/acpi/acpi_lpss.c 		writel(val, pdata->mmio_base + offset);
writel            152 drivers/acpi/acpi_lpss.c 	writel(val, pdata->mmio_base + offset);
writel            201 drivers/acpi/acpi_lpss.c 	writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
writel            431 drivers/acpi/acpi_lpss.c 			writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
writel            723 drivers/acpi/acpi_lpss.c 	writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
writel            761 drivers/acpi/osl.c 		writel(value, virt_addr);
writel            133 drivers/amba/tegra-ahb.c 	writel(value, ahb->regs + offset);
writel            133 drivers/ata/acard-ahci.c 		writel(ctl, mmio + HOST_CTL);
writel            656 drivers/ata/ahci.c 		writel(0, port_mmio + PORT_IRQ_MASK);
writel            662 drivers/ata/ahci.c 			writel(tmp, port_mmio + PORT_IRQ_STAT);
writel            824 drivers/ata/ahci.c 	writel(ctl, mmio + HOST_CTL);
writel           1466 drivers/ata/ahci.c 		writel(irq_stat, mmio + HOST_IRQ_STAT);
writel            135 drivers/ata/ahci_brcm.c 			writel(0xff1003fc,
writel            270 drivers/ata/ahci_brcm.c 	writel(ctl, mmio + HOST_CTL);
writel            304 drivers/ata/ahci_brcm.c 	writel(ctl, mmio + HOST_CTL);
writel            131 drivers/ata/ahci_ceva.c 	writel(tmp, mmio + HOST_CTL);
writel            136 drivers/ata/ahci_ceva.c 		writel(tmp, mmio + AHCI_VEND_PCFG);
writel            146 drivers/ata/ahci_ceva.c 		writel(tmp, mmio + AHCI_VEND_PAXIC);
writel            155 drivers/ata/ahci_ceva.c 			writel(tmp, mmio + AHCI_VEND_AXICC);
writel            160 drivers/ata/ahci_ceva.c 		writel(tmp, mmio + AHCI_VEND_PPCFG);
writel            163 drivers/ata/ahci_ceva.c 		writel(cevapriv->pp2c[i], mmio + AHCI_VEND_PP2C);
writel            166 drivers/ata/ahci_ceva.c 		writel(cevapriv->pp3c[i], mmio + AHCI_VEND_PP3C);
writel            169 drivers/ata/ahci_ceva.c 		writel(cevapriv->pp4c[i], mmio + AHCI_VEND_PP4C);
writel            172 drivers/ata/ahci_ceva.c 		writel(cevapriv->pp5c[i], mmio + AHCI_VEND_PP5C);
writel            176 drivers/ata/ahci_ceva.c 		writel(tmp, mmio + AHCI_VEND_PTC);
writel            182 drivers/ata/ahci_ceva.c 		writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i);
writel             36 drivers/ata/ahci_da850.c 	writel(val, pwrdn_reg);
writel             41 drivers/ata/ahci_da850.c 	writel(val, ahci_base + SATA_P0PHYCR_REG);
writel             93 drivers/ata/ahci_dm816.c 	writel(val, hpriv->mmio + AHCI_DM816_P0PHYCR_REG);
writel             98 drivers/ata/ahci_dm816.c 	writel(val, hpriv->mmio + AHCI_DM816_P1PHYCR_REG);
writel            129 drivers/ata/ahci_imx.c 	writel(crval, mmio + IMX_P0PHYCR);
writel            148 drivers/ata/ahci_imx.c 	writel(crval, mmio + IMX_P0PHYCR);
writel            169 drivers/ata/ahci_imx.c 	writel(crval, mmio + IMX_P0PHYCR);
writel            187 drivers/ata/ahci_imx.c 		writel(crval, mmio + IMX_P0PHYCR);
writel            770 drivers/ata/ahci_imx.c 	writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR);
writel           1162 drivers/ata/ahci_imx.c 		writel(reg_val, hpriv->mmio + HOST_CAP);
writel           1167 drivers/ata/ahci_imx.c 		writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);
writel           1171 drivers/ata/ahci_imx.c 	writel(reg_val, hpriv->mmio + IMX_TIMER1MS);
writel             42 drivers/ata/ahci_mvebu.c 		writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
writel             43 drivers/ata/ahci_mvebu.c 		writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
writel             44 drivers/ata/ahci_mvebu.c 		writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
writel             50 drivers/ata/ahci_mvebu.c 		writel((cs->mbus_attr << 8) |
writel             53 drivers/ata/ahci_mvebu.c 		writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
writel             54 drivers/ata/ahci_mvebu.c 		writel(((cs->size - 1) & 0xffff0000),
writel             66 drivers/ata/ahci_mvebu.c 	writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
writel             67 drivers/ata/ahci_mvebu.c 	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
writel             90 drivers/ata/ahci_mvebu.c 	writel(0, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
writel             94 drivers/ata/ahci_mvebu.c 	writel(reg, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
writel            135 drivers/ata/ahci_mvebu.c 	writel(tmp, port_mmio + PORT_CMD);
writel            142 drivers/ata/ahci_mvebu.c 	writel(port_fbs, port_mmio + PORT_FBS);
writel            131 drivers/ata/ahci_qoriq.c 			writel(px_cmd, port_mmio + PORT_CMD);
writel            135 drivers/ata/ahci_qoriq.c 			writel(px_is, port_mmio + PORT_IRQ_STAT);
writel            173 drivers/ata/ahci_qoriq.c 			writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
writel            174 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel            175 drivers/ata/ahci_qoriq.c 		writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2);
writel            176 drivers/ata/ahci_qoriq.c 		writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3);
writel            177 drivers/ata/ahci_qoriq.c 		writel(LS1021A_PORT_PHY4, reg_base + PORT_PHY4);
writel            178 drivers/ata/ahci_qoriq.c 		writel(LS1021A_PORT_PHY5, reg_base + PORT_PHY5);
writel            179 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
writel            181 drivers/ata/ahci_qoriq.c 			writel(AHCI_PORT_AXICC_CFG,
writel            189 drivers/ata/ahci_qoriq.c 			writel(readl(qpriv->ecc_addr) |
writel            192 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel            193 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel            194 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
writel            195 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
writel            197 drivers/ata/ahci_qoriq.c 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
writel            201 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel            202 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel            203 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
writel            204 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
writel            206 drivers/ata/ahci_qoriq.c 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
writel            213 drivers/ata/ahci_qoriq.c 			writel(readl(qpriv->ecc_addr) |
writel            216 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel            217 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel            218 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
writel            219 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
writel            221 drivers/ata/ahci_qoriq.c 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
writel            230 drivers/ata/ahci_qoriq.c 			writel(readl(qpriv->ecc_addr) |
writel            233 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel            234 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel            235 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
writel            236 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
writel            238 drivers/ata/ahci_qoriq.c 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
writel            242 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel            243 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel            244 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
writel            245 drivers/ata/ahci_qoriq.c 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
writel            247 drivers/ata/ahci_qoriq.c 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
writel             49 drivers/ata/ahci_st.c 	writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
writel             50 drivers/ata/ahci_st.c 	writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
writel             51 drivers/ata/ahci_st.c 	writel(new_val, mmio + ST_AHCI_OOBR);
writel             59 drivers/ata/ahci_sunxi.c 	writel(reg_val, reg);
writel             68 drivers/ata/ahci_sunxi.c 	writel(reg_val, reg);
writel             78 drivers/ata/ahci_sunxi.c 	writel(reg_val, reg);
writel             92 drivers/ata/ahci_sunxi.c 	writel(0, reg_base + AHCI_RWCR);
writel            142 drivers/ata/ahci_sunxi.c 	writel(0x7, reg_base + AHCI_RWCR);
writel            185 drivers/ata/ahci_tegra.c 		writel(val, tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0);
writel            203 drivers/ata/ahci_tegra.c 	writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
writel            211 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET +
writel            220 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET +
writel            223 drivers/ata/ahci_tegra.c 	writel(T_SATA0_CHX_PHY_CTRL11_GEN2_RX_EQ,
writel            225 drivers/ata/ahci_tegra.c 	writel(T_SATA0_CHX_PHY_CTRL2_CDR_CNTL_GEN1,
writel            228 drivers/ata/ahci_tegra.c 	writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
writel            308 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SATA_FPCI_BAR5);
writel            313 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SATA_CONFIGURATION_0);
writel            317 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL17_0);
writel            319 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL18_0);
writel            321 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL20_0);
writel            323 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL21_0);
writel            330 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
writel            339 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
writel            347 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
writel            359 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
writel            361 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9);
writel            366 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
writel            373 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
writel            377 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
writel            385 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
writel            394 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
writel            397 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_IDP1);
writel            402 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);
writel            407 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SATA_CONFIGURATION_0);
writel            415 drivers/ata/ahci_tegra.c 	writel(val, tegra->sata_regs + SATA_INTR_MASK);
writel             94 drivers/ata/ahci_xgene.c 	writel(0x0, ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN);
writel            164 drivers/ata/ahci_xgene.c 		writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS);
writel            206 drivers/ata/ahci_xgene.c 		writel(port_fbs, port_mmio + PORT_FBS);
writel            276 drivers/ata/ahci_xgene.c 	writel(val, mmio + PORTCFG);
writel            279 drivers/ata/ahci_xgene.c 	writel(0x0001fffe, mmio + PORTPHY1CFG);
writel            281 drivers/ata/ahci_xgene.c 	writel(0x28183219, mmio + PORTPHY2CFG);
writel            283 drivers/ata/ahci_xgene.c 	writel(0x13081008, mmio + PORTPHY3CFG);
writel            285 drivers/ata/ahci_xgene.c 	writel(0x00480815, mmio + PORTPHY4CFG);
writel            290 drivers/ata/ahci_xgene.c 	writel(val, mmio + PORTPHY5CFG);
writel            295 drivers/ata/ahci_xgene.c 	writel(val, mmio + PORTAXICFG);
writel            300 drivers/ata/ahci_xgene.c 	writel(val, mmio + PORTRANSCFG);
writel            385 drivers/ata/ahci_xgene.c 	writel(val, port_mmio + PORT_SCR_ERR);
writel            416 drivers/ata/ahci_xgene.c 	writel(portcmd_saved, port_mmio + PORT_CMD);
writel            417 drivers/ata/ahci_xgene.c 	writel(portclb_saved, port_mmio + PORT_LST_ADDR);
writel            418 drivers/ata/ahci_xgene.c 	writel(portclbhi_saved, port_mmio + PORT_LST_ADDR_HI);
writel            419 drivers/ata/ahci_xgene.c 	writel(portrxfis_saved, port_mmio + PORT_FIS_ADDR);
writel            420 drivers/ata/ahci_xgene.c 	writel(portrxfishi_saved, port_mmio + PORT_FIS_ADDR_HI);
writel            467 drivers/ata/ahci_xgene.c 	writel(port_fbs, port_mmio + PORT_FBS);
writel            517 drivers/ata/ahci_xgene.c 	writel(port_fbs, port_mmio + PORT_FBS);
writel            530 drivers/ata/ahci_xgene.c 			writel(port_fbs_save, port_mmio + PORT_FBS);
writel            609 drivers/ata/ahci_xgene.c 	writel(irq_stat, mmio + HOST_IRQ_STAT);
writel            667 drivers/ata/ahci_xgene.c 	writel(0xffffffff, hpriv->mmio + HOST_IRQ_STAT);
writel            669 drivers/ata/ahci_xgene.c 	writel(0, ctx->csr_core + INTSTATUSMASK);
writel            674 drivers/ata/ahci_xgene.c 	writel(0x0, ctx->csr_core + ERRINTSTATUSMASK);
writel            676 drivers/ata/ahci_xgene.c 	writel(0x0, ctx->csr_axi + INT_SLV_TMOMASK);
writel            680 drivers/ata/ahci_xgene.c 	writel(0xffffffff, ctx->csr_core + SLVRDERRATTRIBUTES);
writel            681 drivers/ata/ahci_xgene.c 	writel(0xffffffff, ctx->csr_core + SLVWRERRATTRIBUTES);
writel            682 drivers/ata/ahci_xgene.c 	writel(0xffffffff, ctx->csr_core + MSTRDERRATTRIBUTES);
writel            683 drivers/ata/ahci_xgene.c 	writel(0xffffffff, ctx->csr_core + MSTWRERRATTRIBUTES);
writel            689 drivers/ata/ahci_xgene.c 	writel(val, ctx->csr_core + BUSCTLREG);
writel            694 drivers/ata/ahci_xgene.c 	writel(val, ctx->csr_core + IOFMSTRWAUX);
writel            712 drivers/ata/ahci_xgene.c 	writel(val, ctx->csr_mux + SATA_ENET_CONFIG_REG);
writel            203 drivers/ata/libahci.c 		writel(tmp, mmio + HOST_CTL);
writel            375 drivers/ata/libahci.c 		writel(msg, em_mmio + i);
writel            378 drivers/ata/libahci.c 	writel(em_ctl | EM_CTL_TM, mmio + HOST_EM_CTL);
writel            569 drivers/ata/libahci.c 	writel(hpriv->saved_cap, mmio + HOST_CAP);
writel            571 drivers/ata/libahci.c 		writel(hpriv->saved_cap2, mmio + HOST_CAP2);
writel            572 drivers/ata/libahci.c 	writel(hpriv->saved_port_map, mmio + HOST_PORTS_IMPL);
writel            611 drivers/ata/libahci.c 		writel(val, port_mmio + offset);
writel            625 drivers/ata/libahci.c 	writel(tmp, port_mmio + PORT_CMD);
writel            667 drivers/ata/libahci.c 	writel(tmp, port_mmio + PORT_CMD);
writel            688 drivers/ata/libahci.c 		writel((pp->cmd_slot_dma >> 16) >> 16,
writel            690 drivers/ata/libahci.c 	writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
writel            693 drivers/ata/libahci.c 		writel((pp->rx_fis_dma >> 16) >> 16,
writel            695 drivers/ata/libahci.c 	writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
writel            700 drivers/ata/libahci.c 	writel(tmp, port_mmio + PORT_CMD);
writel            715 drivers/ata/libahci.c 	writel(tmp, port_mmio + PORT_CMD);
writel            737 drivers/ata/libahci.c 		writel(cmd, port_mmio + PORT_CMD);
writel            741 drivers/ata/libahci.c 	writel(cmd | PORT_CMD_ICC_ACTIVE, port_mmio + PORT_CMD);
writel            762 drivers/ata/libahci.c 		writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
writel            775 drivers/ata/libahci.c 			writel(cmd, port_mmio + PORT_CMD);
writel            791 drivers/ata/libahci.c 			writel(cmd, port_mmio + PORT_CMD);
writel            811 drivers/ata/libahci.c 		writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
writel            830 drivers/ata/libahci.c 	writel(scontrol, port_mmio + PORT_SCR_CTL);
writel            835 drivers/ata/libahci.c 	writel(cmd, port_mmio + PORT_CMD);
writel            924 drivers/ata/libahci.c 			writel(tmp | HOST_RESET, mmio + HOST_CTL);
writel           1042 drivers/ata/libahci.c 	writel(em_ctl | EM_CTL_RST, mmio + HOST_EM_CTL);
writel           1091 drivers/ata/libahci.c 		writel(message[0], mmio + hpriv->em_loc);
writel           1092 drivers/ata/libahci.c 		writel(message[1], mmio + hpriv->em_loc+4);
writel           1097 drivers/ata/libahci.c 		writel(em_ctl | EM_CTL_TM, mmio + HOST_EM_CTL);
writel           1214 drivers/ata/libahci.c 	writel(tmp, port_mmio + PORT_SCR_ERR);
writel           1220 drivers/ata/libahci.c 		writel(tmp, port_mmio + PORT_IRQ_STAT);
writel           1222 drivers/ata/libahci.c 	writel(1 << port_no, mmio + HOST_IRQ_STAT);
writel           1250 drivers/ata/libahci.c 	writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
writel           1327 drivers/ata/libahci.c 	writel(tmp, port_mmio + PORT_CMD);
writel           1361 drivers/ata/libahci.c 		writel(tmp, port_mmio + PORT_FBS);
writel           1366 drivers/ata/libahci.c 	writel(1, port_mmio + PORT_CMD_ISSUE);
writel           1588 drivers/ata/libahci.c 		writel(new_tmp, port_mmio + PORT_CMD);
writel           1678 drivers/ata/libahci.c 	writel(fbs | PORT_FBS_DEC, port_mmio + PORT_FBS);
writel           1890 drivers/ata/libahci.c 	writel(status, port_mmio + PORT_IRQ_STAT);
writel           1904 drivers/ata/libahci.c 	writel(status, port_mmio + PORT_IRQ_STAT);
writel           1976 drivers/ata/libahci.c 	writel(irq_stat, mmio + HOST_IRQ_STAT);
writel           1998 drivers/ata/libahci.c 		writel(1 << qc->hw_tag, port_mmio + PORT_SCR_ACT);
writel           2004 drivers/ata/libahci.c 		writel(fbs, port_mmio + PORT_FBS);
writel           2008 drivers/ata/libahci.c 	writel(1 << qc->hw_tag, port_mmio + PORT_CMD_ISSUE);
writel           2045 drivers/ata/libahci.c 	writel(0, port_mmio + PORT_IRQ_MASK);
writel           2058 drivers/ata/libahci.c 	writel(tmp, port_mmio + PORT_IRQ_STAT);
writel           2059 drivers/ata/libahci.c 	writel(1 << ap->port_no, mmio + HOST_IRQ_STAT);
writel           2062 drivers/ata/libahci.c 	writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
writel           2109 drivers/ata/libahci.c 			writel(devslp & ~PORT_DEVSLP_ADSE,
writel           2159 drivers/ata/libahci.c 	writel(devslp, port_mmio + PORT_DEVSLP);
writel           2193 drivers/ata/libahci.c 	writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS);
writel           2226 drivers/ata/libahci.c 	writel(fbs & ~PORT_FBS_EN, port_mmio + PORT_FBS);
writel           2246 drivers/ata/libahci.c 	writel(cmd, port_mmio + PORT_CMD);
writel           2261 drivers/ata/libahci.c 		writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
writel           2274 drivers/ata/libahci.c 	writel(cmd, port_mmio + PORT_CMD);
writel           2280 drivers/ata/libahci.c 		writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
writel           2430 drivers/ata/libahci.c 	writel(1 << ap->port_no, host_mmio + HOST_IRQ_STAT);
writel            702 drivers/ata/libahci_platform.c 	writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
writel            704 drivers/ata/libahci_platform.c 	writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
writel            739 drivers/ata/libahci_platform.c 	writel(ctl, mmio + HOST_CTL);
writel            248 drivers/ata/pata_arasan_cf.c 	writel(enable, acdev->vbase + GIRQ_STS_EN);
writel            249 drivers/ata/pata_arasan_cf.c 	writel(enable, acdev->vbase + GIRQ_SGN_EN);
writel            259 drivers/ata/pata_arasan_cf.c 		writel(mask, acdev->vbase + IRQ_STS);
writel            260 drivers/ata/pata_arasan_cf.c 		writel(val | mask, acdev->vbase + IRQ_EN);
writel            262 drivers/ata/pata_arasan_cf.c 		writel(val & ~mask, acdev->vbase + IRQ_EN);
writel            269 drivers/ata/pata_arasan_cf.c 	writel(val | CARD_RESET, acdev->vbase + OP_MODE);
writel            271 drivers/ata/pata_arasan_cf.c 	writel(val & ~CARD_RESET, acdev->vbase + OP_MODE);
writel            276 drivers/ata/pata_arasan_cf.c 	writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB,
writel            278 drivers/ata/pata_arasan_cf.c 	writel(readl(acdev->vbase + OP_MODE) | CFHOST_ENB,
writel            333 drivers/ata/pata_arasan_cf.c 	writel(if_clk, acdev->vbase + CLK_CFG);
writel            335 drivers/ata/pata_arasan_cf.c 	writel(TRUE_IDE_MODE | CFHOST_ENB, acdev->vbase + OP_MODE);
writel            351 drivers/ata/pata_arasan_cf.c 	writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB,
writel            460 drivers/ata/pata_arasan_cf.c 		writel(xfer_ctr | xfer_cnt | XFER_START,
writel            500 drivers/ata/pata_arasan_cf.c 	writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START,
writel            603 drivers/ata/pata_arasan_cf.c 	writel(irqsts, acdev->vbase + IRQ_STS);		/* clear irqs */
writel            604 drivers/ata/pata_arasan_cf.c 	writel(GIRQ_CF, acdev->vbase + GIRQ_STS);	/* clear girqs */
writel            617 drivers/ata/pata_arasan_cf.c 		writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START,
writel            648 drivers/ata/pata_arasan_cf.c 	writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START,
writel            680 drivers/ata/pata_arasan_cf.c 	writel(xfer_ctr, acdev->vbase + XFER_CTR);
writel            736 drivers/ata/pata_arasan_cf.c 	writel(val, acdev->vbase + OP_MODE);
writel            739 drivers/ata/pata_arasan_cf.c 	writel(val, acdev->vbase + TM_CFG);
writel            772 drivers/ata/pata_arasan_cf.c 	writel(opmode, acdev->vbase + OP_MODE);
writel            773 drivers/ata/pata_arasan_cf.c 	writel(tmcfg, acdev->vbase + TM_CFG);
writel            774 drivers/ata/pata_arasan_cf.c 	writel(DMA_XFER_MODE, acdev->vbase + XFER_CTR);
writel            144 drivers/ata/pata_ep93xx.c 	writel(IDECTRL_CS0N | IDECTRL_CS1N | IDECTRL_DIORN |
writel            147 drivers/ata/pata_ep93xx.c 	writel(0, base + IDECFG);
writel            148 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEMDMAOP);
writel            149 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEUDMAOP);
writel            150 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEDATAOUT);
writel            151 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEDATAIN);
writel            152 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEMDMADATAOUT);
writel            153 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEMDMADATAIN);
writel            154 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEUDMADATAOUT);
writel            155 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEUDMADATAIN);
writel            156 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEUDMADEBUG);
writel            194 drivers/ata/pata_ep93xx.c 	writel(IDECFG_IDEEN | IDECFG_PIO |
writel            242 drivers/ata/pata_ep93xx.c 	writel(IDECTRL_DIOWN | IDECTRL_DIORN | addr, base + IDECTRL);
writel            255 drivers/ata/pata_ep93xx.c 	writel(IDECTRL_DIOWN | IDECTRL_DIORN | addr, base + IDECTRL);
writel            273 drivers/ata/pata_ep93xx.c 	writel(IDECTRL_DIOWN | addr, base + IDECTRL);
writel            311 drivers/ata/pata_ep93xx.c 	writel(value, base + IDEDATAOUT);
writel            312 drivers/ata/pata_ep93xx.c 	writel(IDECTRL_DIORN | addr, base + IDECTRL);
writel            734 drivers/ata/pata_ep93xx.c 	writel(v, base + IDEUDMAOP);
writel            736 drivers/ata/pata_ep93xx.c 	writel(v | IDEUDMAOP_UEN, base + IDEUDMAOP);
writel            738 drivers/ata/pata_ep93xx.c 	writel(IDECFG_IDEEN | IDECFG_UDMA |
writel            756 drivers/ata/pata_ep93xx.c 	writel(0, base + IDEUDMAOP);
writel            757 drivers/ata/pata_ep93xx.c 	writel(readl(base + IDECTRL) | IDECTRL_DIOWN | IDECTRL_DIORN |
writel            377 drivers/ata/pata_macio.c 		writel(priv->treg[device][0], rbase + IDE_KAUAI_PIO_CONFIG);
writel            378 drivers/ata/pata_macio.c 		writel(priv->treg[device][1], rbase + IDE_KAUAI_ULTRA_CONFIG);
writel            380 drivers/ata/pata_macio.c 		writel(priv->treg[device][0], rbase + IDE_TIMING_CONFIG);
writel            582 drivers/ata/pata_macio.c 		writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control);
writel            601 drivers/ata/pata_macio.c 	writel(priv->dma_table_dma, &dma_regs->cmdptr);
writel            613 drivers/ata/pata_macio.c 		writel(reg, rbase + IDE_TIMING_CONFIG);
writel            628 drivers/ata/pata_macio.c 	writel((RUN << 16) | RUN, &dma_regs->control);
writel            643 drivers/ata/pata_macio.c 	writel (((RUN|WAKE|DEAD) << 16), &dma_regs->control);
writel            691 drivers/ata/pata_macio.c 	writel((FLUSH << 16) | FLUSH, &dma_regs->control);
writel            789 drivers/ata/pata_macio.c 		writel(KAUAI_FCR_UATA_MAGIC |
writel            876 drivers/ata/pata_macio.c 		writel(fcr, priv->kauai_fcr);
writel             80 drivers/ata/pata_samsung_cf.c 	writel(reg, s3c_ide_regbase + S3C_ATA_CFG);
writel             86 drivers/ata/pata_samsung_cf.c 	writel(readl(s3c_ide_sfrbase + S3C_CFATA_MUX) | S3C_CFATA_MUX_TRUEIDE,
writel            124 drivers/ata/pata_samsung_cf.c 	writel(ata_cfg, info->ide_addr + S3C_ATA_CFG);
writel            125 drivers/ata/pata_samsung_cf.c 	writel(piotime, info->ide_addr + S3C_ATA_PIO_TIME);
writel            445 drivers/ata/pata_samsung_cf.c 	writel(temp, s3c_ide_regbase + S3C_ATA_CTRL);
writel            455 drivers/ata/pata_samsung_cf.c 	writel(reg, info->ide_addr + S3C_ATA_IRQ);
writel            472 drivers/ata/pata_samsung_cf.c 		writel(0x1f, info->ide_addr + S3C_ATA_IRQ);
writel            473 drivers/ata/pata_samsung_cf.c 		writel(0x1b, info->ide_addr + S3C_ATA_IRQ_MSK);
writel            483 drivers/ata/pata_samsung_cf.c 		writel(0x3f, info->ide_addr + S3C_ATA_IRQ);
writel            484 drivers/ata/pata_samsung_cf.c 		writel(0x3f, info->ide_addr + S3C_ATA_IRQ_MSK);
writel            204 drivers/ata/pdc_adma.c 	writel((u32)pp->pkt_dma, chan + ADMA_CPB_NEXT);
writel            163 drivers/ata/sata_gemini.c 		writel(val, sg->base + GEMINI_SATA0_CTRL);
writel            169 drivers/ata/sata_gemini.c 		writel(val, sg->base + GEMINI_SATA1_CTRL);
writel            219 drivers/ata/sata_highbank.c 	writel(CPHY_MAP(dev, addr), port_data[sata_port].phy_base + 0x800);
writel            229 drivers/ata/sata_highbank.c 	writel(CPHY_MAP(dev, addr), port_data[sata_port].phy_base + 0x800);
writel            230 drivers/ata/sata_highbank.c 	writel(data, port_data[sata_port].phy_base + CPHY_ADDR(addr));
writel            588 drivers/ata/sata_highbank.c 	writel(ctl, mmio + HOST_CTL);
writel            313 drivers/ata/sata_inic162x.c 	writel(val, scr_addr + scr_map[sc_reg] * 4);
writel            689 drivers/ata/sata_inic162x.c 	writel(pp->cpb_tbl_dma, port_base + PORT_CPB_CPBLAR);
writel            858 drivers/ata/sata_mv.c 	writel(data, addr);
writel            984 drivers/ata/sata_mv.c 		writel(new, addr); /* unaffected by the errata */
writel           1001 drivers/ata/sata_mv.c 	writel((pp->crqb_dma >> 16) >> 16, port_mmio + EDMA_REQ_Q_BASE_HI);
writel           1013 drivers/ata/sata_mv.c 	writel((pp->crpb_dma >> 16) >> 16, port_mmio + EDMA_RSP_Q_BASE_HI);
writel           1118 drivers/ata/sata_mv.c 		writel(clks,  mmio + IRQ_COAL_TIME_THRESHOLD);
writel           1119 drivers/ata/sata_mv.c 		writel(count, mmio + IRQ_COAL_IO_THRESHOLD);
writel           1121 drivers/ata/sata_mv.c 		writel(~ALL_PORTS_COAL_IRQ, mmio + IRQ_COAL_CAUSE);
writel           1131 drivers/ata/sata_mv.c 	writel(clks,  hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD);
writel           1132 drivers/ata/sata_mv.c 	writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD);
writel           1133 drivers/ata/sata_mv.c 	writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE);
writel           1138 drivers/ata/sata_mv.c 		writel(clks,  hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD);
writel           1139 drivers/ata/sata_mv.c 		writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD);
writel           1140 drivers/ata/sata_mv.c 		writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE);
writel           1519 drivers/ata/sata_mv.c 		writel(new, hpriv->base + GPIO_PORT_CTL);
writel           1572 drivers/ata/sata_mv.c 	writel(led_ctrl | SOC_LED_CTRL_BLINK, hc_mmio + SOC_LED_CTRL);
writel           1598 drivers/ata/sata_mv.c 	writel(led_ctrl & ~SOC_LED_CTRL_BLINK, hc_mmio + SOC_LED_CTRL);
writel           1890 drivers/ata/sata_mv.c 	writel(0, port_mmio + BMDMA_CMD);
writel           1893 drivers/ata/sata_mv.c 	writel((pp->sg_tbl_dma[qc->hw_tag] >> 16) >> 16,
writel           2238 drivers/ata/sata_mv.c 		writel(fis[i], port_mmio + VENDOR_UNIQUE_FIS);
writel           2889 drivers/ata/sata_mv.c 		writel(~ALL_PORTS_COAL_IRQ, mmio + IRQ_COAL_CAUSE);
writel           3091 drivers/ata/sata_mv.c 		writel(tmp, mmio + MV_PCI_EXP_ROM_BAR_CTL);
writel           3099 drivers/ata/sata_mv.c 	writel(0x0fcfffff, mmio + FLASH_CTL);
writel           3118 drivers/ata/sata_mv.c 	writel(0, mmio + GPIO_PORT_CTL);
writel           3124 drivers/ata/sata_mv.c 	writel(tmp, mmio + MV_PCI_EXP_ROM_BAR_CTL);
writel           3138 drivers/ata/sata_mv.c 		writel(tmp, phy_mmio + MV5_LTMODE);
writel           3143 drivers/ata/sata_mv.c 		writel(tmp, phy_mmio + MV5_PHY_CTL);
writel           3150 drivers/ata/sata_mv.c 	writel(tmp, phy_mmio + MV5_PHY_MODE);
writel           3155 drivers/ata/sata_mv.c #define ZERO(reg) writel(0, port_mmio + (reg))
writel           3164 drivers/ata/sata_mv.c 	writel(0x11f, port_mmio + EDMA_CFG);
writel           3175 drivers/ata/sata_mv.c 	writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
writel           3179 drivers/ata/sata_mv.c #define ZERO(reg) writel(0, hc_mmio + (reg))
writel           3194 drivers/ata/sata_mv.c 	writel(tmp, hc_mmio + 0x20);
writel           3215 drivers/ata/sata_mv.c #define ZERO(reg) writel(0, mmio + (reg))
writel           3223 drivers/ata/sata_mv.c 	writel(tmp, mmio + MV_PCI_MODE);
writel           3227 drivers/ata/sata_mv.c 	writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT);
writel           3247 drivers/ata/sata_mv.c 	writel(tmp, mmio + GPIO_PORT_CTL);
writel           3270 drivers/ata/sata_mv.c 	writel(t | STOP_PCI_MASTER, reg);
writel           3287 drivers/ata/sata_mv.c 		writel(t | GLOB_SFT_RST, reg);
writel           3301 drivers/ata/sata_mv.c 		writel(t & ~(GLOB_SFT_RST | STOP_PCI_MASTER), reg);
writel           3336 drivers/ata/sata_mv.c 	writel(0x00000060, mmio + GPIO_PORT_CTL);
writel           3355 drivers/ata/sata_mv.c 		writel(m2, port_mmio + PHY_MODE2);
writel           3361 drivers/ata/sata_mv.c 		writel(m2, port_mmio + PHY_MODE2);
writel           3388 drivers/ata/sata_mv.c 		writel(m4, port_mmio + PHY_MODE4);
writel           3396 drivers/ata/sata_mv.c 	writel(m3, port_mmio + PHY_MODE3);
writel           3412 drivers/ata/sata_mv.c 	writel(m2, port_mmio + PHY_MODE2);
writel           3437 drivers/ata/sata_mv.c #define ZERO(reg) writel(0, port_mmio + (reg))
writel           3446 drivers/ata/sata_mv.c 	writel(0x101f, port_mmio + EDMA_CFG);
writel           3457 drivers/ata/sata_mv.c 	writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
writel           3462 drivers/ata/sata_mv.c #define ZERO(reg) writel(0, hc_mmio + (reg))
writel           3511 drivers/ata/sata_mv.c 	writel(reg, port_mmio + PHY_MODE3);
writel           3516 drivers/ata/sata_mv.c 	writel(reg, port_mmio + PHY_MODE4);
writel           3522 drivers/ata/sata_mv.c 	writel(reg, port_mmio + PHY_MODE9_GEN2);
writel           3528 drivers/ata/sata_mv.c 	writel(reg, port_mmio + PHY_MODE9_GEN1);
writel           3673 drivers/ata/sata_mv.c 	writel(0, port_mmio + EDMA_ERR_IRQ_CAUSE);
writel           4023 drivers/ata/sata_mv.c 		writel(0, hpriv->base + WINDOW_CTRL(i));
writel           4024 drivers/ata/sata_mv.c 		writel(0, hpriv->base + WINDOW_BASE(i));
writel           4030 drivers/ata/sata_mv.c 		writel(((cs->size - 1) & 0xffff0000) |
writel           4034 drivers/ata/sata_mv.c 		writel(cs->base, hpriv->base + WINDOW_BASE(i));
writel            995 drivers/ata/sata_nv.c 		writel(notifier_clears[0], pp->notifier_clear_block);
writel            997 drivers/ata/sata_nv.c 		writel(notifier_clears[1], pp->notifier_clear_block);
writel           1073 drivers/ata/sata_nv.c 	writel(notifier_clears[0], pp->notifier_clear_block);
writel           1075 drivers/ata/sata_nv.c 	writel(notifier_clears[1], pp->notifier_clear_block);
writel           1144 drivers/ata/sata_nv.c 	writel(mem_dma & 0xFFFFFFFF, 	mmio + NV_ADMA_CPB_BASE_LOW);
writel           1145 drivers/ata/sata_nv.c 	writel((mem_dma >> 16) >> 16,	mmio + NV_ADMA_CPB_BASE_HIGH);
writel           1216 drivers/ata/sata_nv.c 	writel(pp->cpb_dma & 0xFFFFFFFF, 	mmio + NV_ADMA_CPB_BASE_LOW);
writel           1217 drivers/ata/sata_nv.c 	writel((pp->cpb_dma >> 16) >> 16,	mmio + NV_ADMA_CPB_BASE_HIGH);
writel           1612 drivers/ata/sata_nv.c 	writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55);
writel           1616 drivers/ata/sata_nv.c 	writel(mask, mmio_base + NV_INT_ENABLE_MCP55);
writel           1625 drivers/ata/sata_nv.c 	writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55);
writel           1629 drivers/ata/sata_nv.c 	writel(mask, mmio_base + NV_INT_ENABLE_MCP55);
writel           1820 drivers/ata/sata_nv.c 	writel(~0, mmio + NV_INT_STATUS_MCP55);
writel           1823 drivers/ata/sata_nv.c 	writel(0, mmio + NV_INT_ENABLE_MCP55);
writel           1828 drivers/ata/sata_nv.c 	writel(tmp, mmio + NV_CTL_MCP55);
writel           1839 drivers/ata/sata_nv.c 	writel(~0, mmio + NV_INT_STATUS_MCP55);
writel           1842 drivers/ata/sata_nv.c 	writel(0x00fd00fd, mmio + NV_INT_ENABLE_MCP55);
writel           1846 drivers/ata/sata_nv.c 	writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55);
writel           1867 drivers/ata/sata_nv.c 	writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55);
writel           1872 drivers/ata/sata_nv.c 	writel(tmp | 0x00fd00fd, mmio + NV_INT_ENABLE_MCP55);
writel           1875 drivers/ata/sata_nv.c 	writel(~0x0, mmio + NV_INT_STATUS_MCP55);
writel           2012 drivers/ata/sata_nv.c 	writel((1 << qc->hw_tag), pp->sactive_block);
writel            354 drivers/ata/sata_promise.c 		writel(tmp, sata_mmio + PDC_PHYMODE4);
writel            401 drivers/ata/sata_promise.c 		writel(0, sata_mmio + PDC_INTERNAL_DEBUG_1);
writel            413 drivers/ata/sata_promise.c 	writel(0xffffffff, sata_mmio + PDC_SATA_ERROR);
writel            414 drivers/ata/sata_promise.c 	writel(0xffff0000, sata_mmio + PDC_LINK_LAYER_ERRORS);
writel            428 drivers/ata/sata_promise.c 	writel(tmp, ata_ctlstat_mmio);
writel            438 drivers/ata/sata_promise.c 		writel(tmp, ata_ctlstat_mmio);
writel            442 drivers/ata/sata_promise.c 	writel(tmp, ata_ctlstat_mmio);
writel            481 drivers/ata/sata_promise.c 	writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
writel            708 drivers/ata/sata_promise.c 	writel(tmp, ata_mmio + PDC_CTLSTAT);
writel            729 drivers/ata/sata_promise.c 	writel(hotplug_status, host_mmio + hotplug_offset);
writel            746 drivers/ata/sata_promise.c 	writel(tmp, ata_mmio + PDC_CTLSTAT);
writel            766 drivers/ata/sata_promise.c 	writel(hotplug_status, host_mmio + hotplug_offset);
writel            945 drivers/ata/sata_promise.c 			writel(hotplug_status | 0xff, host_mmio + hotplug_offset);
writel            964 drivers/ata/sata_promise.c 	writel(mask, host_mmio + PDC_INT_SEQMASK);
writel           1014 drivers/ata/sata_promise.c 	writel(0x00000001, host_mmio + (seq * 4));
writel           1019 drivers/ata/sata_promise.c 	writel(pp->pkt_dma, ata_mmio + PDC_PKT_SUBMIT);
writel           1135 drivers/ata/sata_promise.c 	writel(tmp, host_mmio + PDC_FLASH_CTL);
writel           1139 drivers/ata/sata_promise.c 	writel(tmp | 0xff, host_mmio + hotplug_offset);
writel           1143 drivers/ata/sata_promise.c 		writel(tmp & ~0xff0000, host_mmio + hotplug_offset);
writel           1145 drivers/ata/sata_promise.c 		writel(tmp | 0xff0000, host_mmio + hotplug_offset);
writel           1155 drivers/ata/sata_promise.c 	writel(tmp, host_mmio + PDC_TBG_MODE);
writel           1164 drivers/ata/sata_promise.c 	writel(tmp, host_mmio + PDC_SLEW_CTL);
writel            232 drivers/ata/sata_qstor.c 	writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 8));
writel            309 drivers/ata/sata_qstor.c 	writel(QS_CCF_RUN_PKT, chan + QS_CCT_CFF);
writel            484 drivers/ata/sata_qstor.c 	writel((u32) addr,        chan + QS_CCF_CPBA);
writel            485 drivers/ata/sata_qstor.c 	writel((u32)(addr >> 32), chan + QS_CCF_CPBA + 4);
writel            371 drivers/ata/sata_sil.c 	writel(tmp, addr);
writel            412 drivers/ata/sata_sil.c 		writel(val, mmio);
writel            541 drivers/ata/sata_sil.c 	writel(0, mmio_base + sil_port[ap->port_no].sien);
writel            546 drivers/ata/sata_sil.c 	writel(tmp, mmio_base + SIL_SYSCFG);
writel            574 drivers/ata/sata_sil.c 		writel(SIL_SIEN_N, mmio_base + sil_port[ap->port_no].sien);
writel            579 drivers/ata/sata_sil.c 	writel(tmp, mmio_base + SIL_SYSCFG);
writel            680 drivers/ata/sata_sil.c 			writel(tmp & ~0x3, mmio_base + sil_port[i].sfis_cfg);
writel            689 drivers/ata/sata_sil.c 			writel(tmp | SIL_INTR_STEERING,
writel            474 drivers/ata/sata_sil24.c 		writel(PORT_CS_CDB16, port + PORT_CTRL_STAT);
writel            476 drivers/ata/sata_sil24.c 		writel(PORT_CS_CDB16, port + PORT_CTRL_CLR);
writel            513 drivers/ata/sata_sil24.c 		writel(val, scr_addr + sil24_scr_map[sc_reg] * 4);
writel            525 drivers/ata/sata_sil24.c 		writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_STAT);
writel            527 drivers/ata/sata_sil24.c 		writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR);
writel            538 drivers/ata/sata_sil24.c 	writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR);
writel            541 drivers/ata/sata_sil24.c 	writel(PORT_CS_PMP_EN | PORT_CS_PMP_RESUME, port + PORT_CTRL_CLR);
writel            549 drivers/ata/sata_sil24.c 		writel(PORT_CS_PMP_EN, port + PORT_CTRL_STAT);
writel            551 drivers/ata/sata_sil24.c 		writel(PORT_CS_PMP_EN, port + PORT_CTRL_CLR);
writel            559 drivers/ata/sata_sil24.c 	writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_CLR);
writel            564 drivers/ata/sata_sil24.c 		writel(0, pmp_base + PORT_PMP_STATUS);
writel            565 drivers/ata/sata_sil24.c 		writel(0, pmp_base + PORT_PMP_QACTIVE);
writel            579 drivers/ata/sata_sil24.c 	writel(PORT_CS_INIT, port + PORT_CTRL_STAT);
writel            611 drivers/ata/sata_sil24.c 	writel(PORT_IRQ_COMPLETE | PORT_IRQ_ERROR, port + PORT_IRQ_ENABLE_CLR);
writel            618 drivers/ata/sata_sil24.c 	writel((u32)paddr, port + PORT_CMD_ACTIVATE);
writel            619 drivers/ata/sata_sil24.c 	writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4);
writel            625 drivers/ata/sata_sil24.c 	writel(irq_mask, port + PORT_IRQ_STAT); /* clear IRQs */
writel            641 drivers/ata/sata_sil24.c 	writel(irq_enabled, port + PORT_IRQ_ENABLE_SET);
writel            709 drivers/ata/sata_sil24.c 		writel(PORT_CS_PORT_RST, port + PORT_CTRL_STAT);
writel            711 drivers/ata/sata_sil24.c 		writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR);
writel            730 drivers/ata/sata_sil24.c 	writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT);
writel            896 drivers/ata/sata_sil24.c 	writel((u32)paddr, activate);
writel            897 drivers/ata/sata_sil24.c 	writel((u64)paddr >> 32, activate + 4);
writel            952 drivers/ata/sata_sil24.c 	writel(0xffff, port + PORT_IRQ_ENABLE_CLR);
writel            962 drivers/ata/sata_sil24.c 	writel(tmp, port + PORT_IRQ_STAT);
writel            965 drivers/ata/sata_sil24.c 	writel(DEF_PORT_IRQ, port + PORT_IRQ_ENABLE_SET);
writel            980 drivers/ata/sata_sil24.c 	writel(irq_stat, port + PORT_IRQ_STAT);
writel           1081 drivers/ata/sata_sil24.c 			writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_STAT);
writel           1109 drivers/ata/sata_sil24.c 		writel(PORT_IRQ_COMPLETE, port + PORT_IRQ_STAT);
writel           1224 drivers/ata/sata_sil24.c 	writel(0, host_base + HOST_FLASH_CMD);
writel           1227 drivers/ata/sata_sil24.c 	writel(0, host_base + HOST_CTRL);
writel           1236 drivers/ata/sata_sil24.c 		writel(0x20c, port + PORT_PHY_CFG);
writel           1241 drivers/ata/sata_sil24.c 			writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR);
writel           1255 drivers/ata/sata_sil24.c 	writel(IRQ_STAT_4PORTS, host_base + HOST_CTRL);
writel           1339 drivers/ata/sata_sil24.c 		writel(HOST_CTRL_GLOBAL_RST, host_base + HOST_CTRL);
writel            120 drivers/ata/sata_svw.c 	writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
writel            239 drivers/ata/sata_svw.c 	writel(ap->bmdma_prd_dma, mmio + ATA_DMA_TABLE_OFS);
writel            482 drivers/ata/sata_svw.c 	writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000,
writel            486 drivers/ata/sata_svw.c 	writel(0xffffffff, mmio_base + K2_SATA_SCR_ERROR_OFFSET);
writel            487 drivers/ata/sata_svw.c 	writel(0x0, mmio_base + K2_SATA_SIM_OFFSET);
writel            491 drivers/ata/sata_sx4.c 	writel(0x00000001, mmio + PDC_20621_GENERAL_CTL);
writel            526 drivers/ata/sata_sx4.c 	writel(0x00000001, mmio + PDC_20621_GENERAL_CTL);
writel            558 drivers/ata/sata_sx4.c 	writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4));
writel            561 drivers/ata/sata_sx4.c 	writel(pkt_ofs, mmio + PDC_HDMA_PKT_SUBMIT);
writel            651 drivers/ata/sata_sx4.c 		writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4));
writel            654 drivers/ata/sata_sx4.c 		writel(port_ofs + PDC_DIMM_ATA_PKT,
writel            734 drivers/ata/sata_sx4.c 			writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4));
writel            736 drivers/ata/sata_sx4.c 			writel(port_ofs + PDC_DIMM_ATA_PKT,
writel            847 drivers/ata/sata_sx4.c 	writel(tmp, mmio + PDC_CTLSTAT);
writel            864 drivers/ata/sata_sx4.c 	writel(tmp, mmio + PDC_CTLSTAT);
writel            884 drivers/ata/sata_sx4.c 		writel(tmp, mmio);
writel            888 drivers/ata/sata_sx4.c 	writel(tmp, mmio);
writel            998 drivers/ata/sata_sx4.c 	writel(0x01, mmio + PDC_GENERAL_CTLR);
writel           1000 drivers/ata/sata_sx4.c 	writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
writel           1012 drivers/ata/sata_sx4.c 		writel(0x01, mmio + PDC_GENERAL_CTLR);
writel           1014 drivers/ata/sata_sx4.c 		writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
writel           1023 drivers/ata/sata_sx4.c 		writel(0x01, mmio + PDC_GENERAL_CTLR);
writel           1025 drivers/ata/sata_sx4.c 		writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
writel           1050 drivers/ata/sata_sx4.c 	writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
writel           1057 drivers/ata/sata_sx4.c 	writel(0x01, mmio + PDC_GENERAL_CTLR);
writel           1063 drivers/ata/sata_sx4.c 		writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
writel           1066 drivers/ata/sata_sx4.c 		writel(0x01, mmio + PDC_GENERAL_CTLR);
writel           1074 drivers/ata/sata_sx4.c 		writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
writel           1077 drivers/ata/sata_sx4.c 		writel(0x01, mmio + PDC_GENERAL_CTLR);
writel           1098 drivers/ata/sata_sx4.c 	writel(i2creg, mmio + PDC_I2C_ADDR_DATA);
writel           1102 drivers/ata/sata_sx4.c 	writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT,
writel           1198 drivers/ata/sata_sx4.c 	writel(data, mmio + PDC_DIMM0_CONTROL);
writel           1221 drivers/ata/sata_sx4.c 	writel(data, mmio + PDC_SDRAM_CONTROL);
writel           1233 drivers/ata/sata_sx4.c 		writel(data, mmio + PDC_SDRAM_CONTROL);
writel           1241 drivers/ata/sata_sx4.c 	writel(data, mmio + PDC_SDRAM_CONTROL);
writel           1273 drivers/ata/sata_sx4.c 	writel(0xffffffff, mmio + PDC_TIME_PERIOD);
writel           1278 drivers/ata/sata_sx4.c 	writel(PDC_TIMER_DEFAULT, mmio + PDC_TIME_CONTROL);
writel           1317 drivers/ata/sata_sx4.c 	writel(pci_status, mmio + PDC_CTL_STATUS);
writel           1410 drivers/ata/sata_sx4.c 	writel(tmp, mmio + PDC_20621_DIMM_WINDOW);
writel           1417 drivers/ata/sata_sx4.c 	writel(tmp, mmio + PDC_HDMA_CTLSTAT);
writel           1424 drivers/ata/sata_sx4.c 	writel(tmp, mmio + PDC_HDMA_CTLSTAT);
writel             99 drivers/ata/sata_vsc.c 	writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
writel            315 drivers/ata/sata_vsc.c 	writel(0, base + VSC_SATA_UP_DESCRIPTOR_OFFSET);
writel            316 drivers/ata/sata_vsc.c 	writel(0, base + VSC_SATA_UP_DATA_BUFFER_OFFSET);
writel            161 drivers/atm/eni.c #define eni_out(v,r)	writel((v),eni_dev->reg+(r)*4)
writel            470 drivers/atm/eni.c 		writel(dma[i*2],eni_dev->rx_dma+dma_wr*8);
writel            471 drivers/atm/eni.c 		writel(dma[i*2+1],eni_dev->rx_dma+dma_wr*8+4);
writel            637 drivers/atm/eni.c 	writel(readl(vci_dsc) & ~MID_VCI_IN_SERVICE,vci_dsc);
writel            827 drivers/atm/eni.c 	writel(0,here+4); /* descr, read = 0 */
writel            828 drivers/atm/eni.c 	writel(0,here+8); /* write, state, count = 0 */
writel            833 drivers/atm/eni.c 	writel(((vcc->qos.aal != ATM_AAL5 ? MID_MODE_RAW : MID_MODE_AAL5) <<
writel            854 drivers/atm/eni.c 		writel((readl(here) & ~MID_VCI_MODE) | (MID_MODE_TRASH <<
writel            859 drivers/atm/eni.c 		writel(readl(here) & ~MID_VCI_IN_SERVICE,here);
writel           1153 drivers/atm/eni.c 	writel((MID_SEG_TX_ID << MID_SEG_ID_SHIFT) |
writel           1158 drivers/atm/eni.c 	writel((vcc->vci << MID_SEG_VCI_SHIFT) |
writel           1164 drivers/atm/eni.c 		writel(skb->len,tx->send+
writel           1168 drivers/atm/eni.c 		writel(eni_dev->dma[i*2],eni_dev->tx_dma+dma_wr*8);
writel           1169 drivers/atm/eni.c 		writel(eni_dev->dma[i*2+1],eni_dev->tx_dma+dma_wr*8+4);
writel           1754 drivers/atm/eni.c 		writel(0x55555555,eni_dev->ram+i);
writel           1757 drivers/atm/eni.c 			writel(0xAAAAAAAA,eni_dev->ram+i);
writel           1759 drivers/atm/eni.c 			else writel(i,eni_dev->ram+i);
writel           1988 drivers/atm/eni.c 		writel((readl(dsc) & ~(MID_SEG_RATE | MID_SEG_PR)) |
writel           2089 drivers/atm/eni.c 	writel(value,ENI_DEV(dev)->phy+addr*4);
writel            566 drivers/atm/firestream.c 	writel (val, dev->base + offset);
writel            447 drivers/atm/fore200e.c     writel(cpu_to_le32(val), addr);
writel            469 drivers/atm/fore200e.c     writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
writel            476 drivers/atm/fore200e.c     writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
writel            478 drivers/atm/fore200e.c     writel(0, fore200e->regs.pca.hcr);
writel            176 drivers/atm/he.c #define he_writel(dev, val, reg)	do { writel(val, (dev)->membase + (reg)); wmb(); } while (0)
writel            177 drivers/atm/idt77252.c 	writel(SAR_CMD_READ_SRAM | (addr << 2), SAR_REG_CMD);
writel            199 drivers/atm/idt77252.c 	writel(value, SAR_REG_DR0);
writel            200 drivers/atm/idt77252.c 	writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
writel            218 drivers/atm/idt77252.c 	writel(SAR_CMD_READ_UTILITY + ubus_addr, SAR_REG_CMD);
writel            237 drivers/atm/idt77252.c 	writel((u32) value, SAR_REG_DR0);
writel            238 drivers/atm/idt77252.c 	writel(SAR_CMD_WRITE_UTILITY + ubus_addr, SAR_REG_CMD);
writel            374 drivers/atm/idt77252.c 	writel(value, SAR_REG_GP);
writel            735 drivers/atm/idt77252.c 				writel(TCMDQ_LACR | (vc->lacr << 16) |
writel            764 drivers/atm/idt77252.c 		writel(TCMDQ_START_LACR | (vc->lacr << 16) | vc->index,
writel            986 drivers/atm/idt77252.c 	writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
writel            988 drivers/atm/idt77252.c 	writel(card->rsq.paddr, SAR_REG_RSQB);
writel           1231 drivers/atm/idt77252.c 	writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
writel           1388 drivers/atm/idt77252.c 	writel(card->tsq.paddr, SAR_REG_TSQB);
writel           1389 drivers/atm/idt77252.c 	writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
writel           1520 drivers/atm/idt77252.c 	writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
writel           1836 drivers/atm/idt77252.c 	writel(handle, card->fbq[queue]);
writel           1837 drivers/atm/idt77252.c 	writel(addr, card->fbq[queue]);
writel           2105 drivers/atm/idt77252.c 		writel(TCMDQ_LACR|(vc->lacr << 16)|vc->index, SAR_REG_TCMDQ);
writel           2300 drivers/atm/idt77252.c 			writel(TCMDQ_START | vc->index, SAR_REG_TCMDQ);
writel           2377 drivers/atm/idt77252.c 	writel(SAR_CMD_OPEN_CONNECTION | (addr << 2), SAR_REG_CMD);
writel           2516 drivers/atm/idt77252.c 		writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2), SAR_REG_CMD);
writel           2554 drivers/atm/idt77252.c 		writel(TCMDQ_HALT | vc->index, SAR_REG_TCMDQ);
writel           2599 drivers/atm/idt77252.c 					writel(TCMDQ_LACR | (vc->lacr << 16) |
writel           2726 drivers/atm/idt77252.c 	writel(stat, SAR_REG_STAT);	/* reset interrupt */
writel           2782 drivers/atm/idt77252.c 		writel(readl(SAR_REG_CFG) & ~(SAR_CFG_FBIE), SAR_REG_CFG);
writel           2841 drivers/atm/idt77252.c 	writel(readl(SAR_REG_CFG) | SAR_CFG_FBIE, SAR_REG_CFG);
writel           2878 drivers/atm/idt77252.c 			writel(SAR_CMD_OPEN_CONNECTION | (addr << 2),
writel           2905 drivers/atm/idt77252.c 			writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2),
writel           2956 drivers/atm/idt77252.c 	writel(TCMDQ_START | 0, SAR_REG_TCMDQ);
writel           2988 drivers/atm/idt77252.c 	writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
writel           3023 drivers/atm/idt77252.c 	writel(readl(SAR_REG_CFG) & ~(conf), SAR_REG_CFG);
writel           3048 drivers/atm/idt77252.c 	writel(0, SAR_REG_CFG);
writel           3175 drivers/atm/idt77252.c 	writel((SAR_FBQ0_LOW << 28) | (SAR_FB_SIZE_0 / 48), SAR_REG_FBQS0);
writel           3176 drivers/atm/idt77252.c 	writel((SAR_FBQ1_LOW << 28) | (SAR_FB_SIZE_1 / 48), SAR_REG_FBQS1);
writel           3177 drivers/atm/idt77252.c 	writel((SAR_FBQ2_LOW << 28) | (SAR_FB_SIZE_2 / 48), SAR_REG_FBQS2);
writel           3178 drivers/atm/idt77252.c 	writel((SAR_FBQ3_LOW << 28) | (SAR_FB_SIZE_3 / 48), SAR_REG_FBQS3);
writel           3214 drivers/atm/idt77252.c 	writel(card->rt_base << 2, SAR_REG_RTBL);
writel           3234 drivers/atm/idt77252.c 	writel(card->tst[0] << 2, SAR_REG_TSTB);
writel           3238 drivers/atm/idt77252.c 	writel(card->abrst_size | (card->abrst_base << 2),
writel           3242 drivers/atm/idt77252.c 	writel(card->fifo_size | (card->fifo_base << 2),
writel           3307 drivers/atm/idt77252.c 		writel(SAR_STAT_TMROF, SAR_REG_STAT);
writel           3354 drivers/atm/idt77252.c 	writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
writel           3386 drivers/atm/idt77252.c 	writel(0, SAR_REG_VPM);
writel           3389 drivers/atm/idt77252.c 	writel(0, SAR_REG_GP);
writel           3401 drivers/atm/idt77252.c 	writel(card->raw_cell_paddr, SAR_REG_RAWHND);
writel           3512 drivers/atm/idt77252.c 	writel(0xffff, SAR_REG_MDFCT);
writel           3560 drivers/atm/idt77252.c 	writel(SAR_CFG_SWRST, SAR_REG_CFG);
writel           3562 drivers/atm/idt77252.c 	writel(0, SAR_REG_CFG);
writel           3573 drivers/atm/idt77252.c 	writel(0, SAR_REG_DR0);
writel           3574 drivers/atm/idt77252.c 	writel(SAR_CMD_WRITE_SRAM | (0 << 2), SAR_REG_CMD);
writel           3577 drivers/atm/idt77252.c 		writel(ATM_POISON, SAR_REG_DR0);
writel           3578 drivers/atm/idt77252.c 		writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
writel           3580 drivers/atm/idt77252.c 		writel(SAR_CMD_READ_SRAM | (0 << 2), SAR_REG_CMD);
writel            829 drivers/atm/iphase.c 	writel(val, ia->phy + (reg >> 2));
writel           1202 drivers/atm/iphase.c 	writel(1, iadev->dma+IPHASE5575_RX_COUNTER);   
writel           1366 drivers/atm/iphase.c         writel(state & ~(RX_FREEQ_EMPT |/* RX_EXCP_RCVD |*/ RX_PKT_RCVD),
writel           1450 drivers/atm/iphase.c 	writel(iadev->rx_dle_dma & 0xfffff000,
writel           1934 drivers/atm/iphase.c 	writel(iadev->tx_dle_dma & 0xfffff000,
writel           2244 drivers/atm/iphase.c 	   writel(STAT_DLERINT, iadev->reg + IPHASE5575_BUS_STATUS_REG);
writel           2255 drivers/atm/iphase.c 	   writel(STAT_DLETINT, iadev->reg + IPHASE5575_BUS_STATUS_REG);
writel           2301 drivers/atm/iphase.c 	writel(0, iadev->reg+IPHASE5575_EXT_RESET);  
writel           2447 drivers/atm/iphase.c                  writel(ctrl_reg, ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
writel           2453 drivers/atm/iphase.c                  writel(ctrl_reg, ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
writel           2469 drivers/atm/iphase.c 	writel(value, INPH_IA_DEV(dev)->phy+addr);  
writel           2552 drivers/atm/iphase.c        writel(ctrl_reg, iadev->reg+IPHASE5575_BUS_CONTROL_REG);   
writel           2568 drivers/atm/iphase.c        	writel(ctrl_reg | CTRL_FE_RST, iadev->reg+IPHASE5575_BUS_CONTROL_REG);   
writel           3056 drivers/atm/iphase.c 	writel(2, iadev->dma+IPHASE5575_TX_COUNTER);  
writel           1377 drivers/atm/iphase.h 		writel(t, iadev->reg+IPHASE5575_EEPROM_ACCESS); \
writel           1391 drivers/atm/iphase.h 		writel(t, iadev->reg+IPHASE5575_EEPROM_ACCESS); \
writel            489 drivers/atm/lanai.c 	writel(val, reg_addr(lanai, reg));
writel            548 drivers/atm/lanai.c 	writel(val, sram_addr(lanai, offset));
writel            666 drivers/atm/lanai.c 	writel(val, lvcc->vbase + offset);
writel            214 drivers/atm/nicstar.c 	writel(0x00000000, card->membase + CFG);
writel            316 drivers/atm/nicstar.c 	writel(sram_address, card->membase + CMD);
writel            334 drivers/atm/nicstar.c 		writel(*(value++), card->membase + i);
writel            340 drivers/atm/nicstar.c 	writel(sram_address, card->membase + CMD);
writel            431 drivers/atm/nicstar.c 		writel(NS_STAT_TMROF, card->membase + STAT);
writel            434 drivers/atm/nicstar.c 	writel(NS_CFG_SWRST, card->membase + CFG);
writel            436 drivers/atm/nicstar.c 	writel(0x00000000, card->membase + CFG);
writel            439 drivers/atm/nicstar.c 	writel(0x00000008, card->membase + GP);
writel            441 drivers/atm/nicstar.c 	writel(0x00000001, card->membase + GP);
writel            444 drivers/atm/nicstar.c 	writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD);	/* Sync UTOPIA with SAR clock */
writel            449 drivers/atm/nicstar.c 	writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
writel            457 drivers/atm/nicstar.c 		writel(0x00000008, card->membase + DR0);
writel            458 drivers/atm/nicstar.c 		writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
writel            460 drivers/atm/nicstar.c 		writel(NS_STAT_SFBQF, card->membase + STAT);
writel            463 drivers/atm/nicstar.c 		writel(0x00000022, card->membase + DR0);
writel            464 drivers/atm/nicstar.c 		writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
writel            473 drivers/atm/nicstar.c 		writel(0x00000002, card->membase + DR0);
writel            474 drivers/atm/nicstar.c 		writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
writel            483 drivers/atm/nicstar.c 	writel(0x00000000, card->membase + GP);
writel            526 drivers/atm/nicstar.c 	writel(0x00000000, card->membase + VPM);
writel            543 drivers/atm/nicstar.c 	writel(0x00000000, card->membase + TSQH);
writel            544 drivers/atm/nicstar.c 	writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
writel            562 drivers/atm/nicstar.c 	writel(0x00000000, card->membase + RSQH);
writel            563 drivers/atm/nicstar.c 	writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
writel            600 drivers/atm/nicstar.c 	writel(NS_TST0 << 2, card->membase + TSTB);
writel            804 drivers/atm/nicstar.c 	writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE |	/* Only enabled if RCQ_SUPPORT */
writel            816 drivers/atm/nicstar.c 		writel(0x00000000, card->membase + CFG);
writel           1031 drivers/atm/nicstar.c 		writel(addr2, card->membase + DR3);
writel           1032 drivers/atm/nicstar.c 		writel(id2, card->membase + DR2);
writel           1033 drivers/atm/nicstar.c 		writel(addr1, card->membase + DR1);
writel           1034 drivers/atm/nicstar.c 		writel(id1, card->membase + DR0);
writel           1035 drivers/atm/nicstar.c 		writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
writel           1048 drivers/atm/nicstar.c 		writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
writel           1077 drivers/atm/nicstar.c 		writel(NS_STAT_TSIF, card->membase + STAT);
writel           1082 drivers/atm/nicstar.c 		writel(NS_STAT_TXICP, card->membase + STAT);
writel           1089 drivers/atm/nicstar.c 		writel(NS_STAT_TSQF, card->membase + STAT);
writel           1096 drivers/atm/nicstar.c 		writel(NS_STAT_TMROF, card->membase + STAT);
writel           1102 drivers/atm/nicstar.c 		writel(NS_STAT_PHYI, card->membase + STAT);
writel           1111 drivers/atm/nicstar.c 		writel(NS_STAT_SFBQF, card->membase + STAT);
writel           1118 drivers/atm/nicstar.c 		writel(NS_STAT_LFBQF, card->membase + STAT);
writel           1125 drivers/atm/nicstar.c 		writel(NS_STAT_RSQF, card->membase + STAT);
writel           1134 drivers/atm/nicstar.c 		writel(NS_STAT_EOPDU, card->membase + STAT);
writel           1139 drivers/atm/nicstar.c 		writel(NS_STAT_RAWCF, card->membase + STAT);
writel           1171 drivers/atm/nicstar.c 		writel(NS_STAT_SFBQE, card->membase + STAT);
writel           1177 drivers/atm/nicstar.c 				writel(readl(card->membase + CFG) &
writel           1196 drivers/atm/nicstar.c 		writel(NS_STAT_LFBQE, card->membase + STAT);
writel           1202 drivers/atm/nicstar.c 				writel(readl(card->membase + CFG) &
writel           1218 drivers/atm/nicstar.c 		writel(NS_STAT_RSQAF, card->membase + STAT);
writel           1433 drivers/atm/nicstar.c 		writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
writel           1900 drivers/atm/nicstar.c 		writel(PTR_DIFF(previous, card->tsq.base),
writel           1961 drivers/atm/nicstar.c 	writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
writel           2439 drivers/atm/nicstar.c 			writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
writel           2708 drivers/atm/nicstar.c 		writel(stat_w, card->membase + STAT);
writel           2724 drivers/atm/nicstar.c 	writel((u32) value, card->membase + DR0);
writel           2725 drivers/atm/nicstar.c 	writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
writel           2739 drivers/atm/nicstar.c 	writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
writel            111 drivers/atm/nicstarmac.c 	writel((val),(base)+(reg))
writel             83 drivers/auxdisplay/arm-charlcd.c 	writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
writel             99 drivers/auxdisplay/arm-charlcd.c 	writel(0x00, lcd->virtbase + CHAR_MASK);
writel            133 drivers/auxdisplay/arm-charlcd.c 		writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
writel            151 drivers/auxdisplay/arm-charlcd.c 	writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
writel            167 drivers/auxdisplay/arm-charlcd.c 		writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
writel            169 drivers/auxdisplay/arm-charlcd.c 		writel(0x01, lcd->virtbase + CHAR_MASK);
writel            191 drivers/auxdisplay/arm-charlcd.c 	writel(cmdhi, lcd->virtbase + CHAR_COM);
writel            193 drivers/auxdisplay/arm-charlcd.c 	writel(cmdlo, lcd->virtbase + CHAR_COM);
writel            202 drivers/auxdisplay/arm-charlcd.c 	writel(chhi, lcd->virtbase + CHAR_DAT);
writel            204 drivers/auxdisplay/arm-charlcd.c 	writel(chlo, lcd->virtbase + CHAR_DAT);
writel            236 drivers/auxdisplay/arm-charlcd.c 	writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
writel            238 drivers/auxdisplay/arm-charlcd.c 	writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
writel            240 drivers/auxdisplay/arm-charlcd.c 	writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
writel            243 drivers/auxdisplay/arm-charlcd.c 	writel(HD_FUNCSET, lcd->virtbase + CHAR_COM);
writel             96 drivers/base/regmap/regmap-mmio.c 	writel(val, ctx->regs + reg);
writel             38 drivers/bcma/driver_chipcommon_b.c 	writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
writel             40 drivers/bcma/driver_chipcommon_b.c 	writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
writel            215 drivers/bcma/driver_pci_host.c 		writel(val, mmio);
writel             46 drivers/bcma/host_soc.c 	writel(value, core->io_addr + offset);
writel            150 drivers/bcma/host_soc.c 	writel(value, core->io_wrap + offset);
writel            184 drivers/block/mtip32xx/mtip32xx.c 	writel(HOST_RESET, dd->mmio + HOST_CTL);
writel            226 drivers/block/mtip32xx/mtip32xx.c 	writel((1 << MTIP_TAG_BIT(tag)),
writel            228 drivers/block/mtip32xx/mtip32xx.c 	writel((1 << MTIP_TAG_BIT(tag)),
writel            249 drivers/block/mtip32xx/mtip32xx.c 		writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
writel            251 drivers/block/mtip32xx/mtip32xx.c 		writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
writel            275 drivers/block/mtip32xx/mtip32xx.c 		writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
writel            277 drivers/block/mtip32xx/mtip32xx.c 		writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
writel            310 drivers/block/mtip32xx/mtip32xx.c 	writel(0, port->mmio + PORT_IRQ_MASK);
writel            339 drivers/block/mtip32xx/mtip32xx.c 		writel((port->command_list_dma >> 16) >> 16,
writel            341 drivers/block/mtip32xx/mtip32xx.c 		writel((port->rxfis_dma >> 16) >> 16,
writel            346 drivers/block/mtip32xx/mtip32xx.c 	writel(port->command_list_dma & 0xFFFFFFFF,
writel            348 drivers/block/mtip32xx/mtip32xx.c 	writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
writel            351 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
writel            355 drivers/block/mtip32xx/mtip32xx.c 		writel(0xFFFFFFFF, port->completed[i]);
writel            358 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
writel            361 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(port->dd->mmio + HOST_IRQ_STAT),
writel            365 drivers/block/mtip32xx/mtip32xx.c 	writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
writel            411 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(port->mmio + PORT_SCR_CTL) |
writel            424 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
writel            461 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
writel            540 drivers/block/mtip32xx/mtip32xx.c 		writel(completed, port->completed[group]);
writel            669 drivers/block/mtip32xx/mtip32xx.c 	writel(completed, port->completed[group]);
writel            688 drivers/block/mtip32xx/mtip32xx.c 		writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
writel            716 drivers/block/mtip32xx/mtip32xx.c 		writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
writel            722 drivers/block/mtip32xx/mtip32xx.c 		writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
writel            757 drivers/block/mtip32xx/mtip32xx.c 		writel(port_stat, port->mmio + PORT_IRQ_STAT);
writel            815 drivers/block/mtip32xx/mtip32xx.c 		writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
writel            839 drivers/block/mtip32xx/mtip32xx.c 	writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]);
writel           2467 drivers/block/mtip32xx/mtip32xx.c 	writel(hwdata |
writel           2960 drivers/block/mtip32xx/mtip32xx.c 		writel(readl(dd->mmio + HOST_IRQ_STAT),
writel           2978 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
writel           2992 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
writel           3046 drivers/block/mtip32xx/mtip32xx.c 		writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
writel           3112 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
writel           3151 drivers/block/mtip32xx/mtip32xx.c 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
writel            295 drivers/block/skd_main.c 	writel(val, skdev->mem_map[1] + offset);
writel            458 drivers/block/sx8.c 		writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i));
writel            489 drivers/block/sx8.c 		writel(tmp, mmio + CARM_INT_MASK);
writel            495 drivers/block/sx8.c 		writel(msg | (cm_bucket << 1), mmio + CARM_IHQP);
writel           1023 drivers/block/sx8.c 			writel(idx << 3, mmio + CARM_RESP_IDX);
writel           1077 drivers/block/sx8.c 		writel(mask, mmio + CARM_INT_STAT);
writel           1253 drivers/block/sx8.c 	writel(0, mmio + CARM_RESP_IDX);
writel           1265 drivers/block/sx8.c 	writel(0, mmio + CARM_INT_MASK);
writel           1296 drivers/block/sx8.c 	writel(tmp, mmio + CARM_HMUC);
writel           1307 drivers/block/sx8.c 	writel(host->shm_dma & 0xffffffff, mmio + RBUF_ADDR_LO);
writel           1308 drivers/block/sx8.c 	writel((host->shm_dma >> 16) >> 16, mmio + RBUF_ADDR_HI);
writel           1309 drivers/block/sx8.c 	writel(RBUF_LEN, mmio + RBUF_BYTE_SZ);
writel           1313 drivers/block/sx8.c 	writel(tmp, mmio + CARM_HMUC);
writel           1322 drivers/block/sx8.c 	writel(0, mmio + CARM_HMPHA);
writel           1323 drivers/block/sx8.c 	writel(INT_DEF_MASK, mmio + CARM_INT_MASK);
writel            274 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_PCI_ADDR);
writel            275 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
writel            277 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_LOCAL_ADDR);
writel            278 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
writel            280 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
writel            281 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
writel            283 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
writel            284 drivers/block/umem.c 	writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
writel            287 drivers/block/umem.c 	writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
writel            291 drivers/block/umem.c 	writel(cpu_to_le32(((u64)page->page_dma)>>32),
writel            295 drivers/block/umem.c 	writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
writel            559 drivers/block/umem.c 		writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
writel            242 drivers/bus/da8xx-mstpri.c 		writel(reg, mstpri + prio_descr->reg);
writel            127 drivers/bus/hisi_lpc.c 	writel(LPC_REG_STARTUP_SIGNAL_START,
writel            182 drivers/bus/hisi_lpc.c 	writel(LPC_REG_STARTUP_SIGNAL_START,
writel            178 drivers/bus/imx-weim.c 			writel(value[i],
writel            209 drivers/bus/imx-weim.c 			writel(reg | devtype->wcr_bcm,
writel            245 drivers/bus/mvebu-mbus.c 	writel(0, addr + WIN_BASE_OFF);
writel            246 drivers/bus/mvebu-mbus.c 	writel(0, addr + WIN_CTRL_OFF);
writel            250 drivers/bus/mvebu-mbus.c 		writel(0, addr + WIN_REMAP_LO_OFF);
writel            251 drivers/bus/mvebu-mbus.c 		writel(0, addr + WIN_REMAP_HI_OFF);
writel            355 drivers/bus/mvebu-mbus.c 	writel(base & WIN_BASE_LOW, addr + WIN_BASE_OFF);
writel            356 drivers/bus/mvebu-mbus.c 	writel(ctrl, addr + WIN_CTRL_OFF);
writel            366 drivers/bus/mvebu-mbus.c 		writel(remap_addr & WIN_REMAP_LOW, addr_rmp + WIN_REMAP_LO_OFF);
writel            367 drivers/bus/mvebu-mbus.c 		writel(0, addr_rmp + WIN_REMAP_HI_OFF);
writel            739 drivers/bus/mvebu-mbus.c 		writel(mbus->sdramwins_phys_base + DDR_BASE_CS_OFF(i),
writel            741 drivers/bus/mvebu-mbus.c 		writel(base, store_addr++);
writel            742 drivers/bus/mvebu-mbus.c 		writel(mbus->sdramwins_phys_base + DDR_SIZE_CS_OFF(i),
writel            744 drivers/bus/mvebu-mbus.c 		writel(size, store_addr++);
writel            790 drivers/bus/mvebu-mbus.c 		writel(mbus->sdramwins_phys_base + DOVE_DDR_BASE_CS_OFF(i),
writel            792 drivers/bus/mvebu-mbus.c 		writel(map, store_addr++);
writel           1068 drivers/bus/mvebu-mbus.c 	writel(s->mbus_bridge_ctrl,
writel           1070 drivers/bus/mvebu-mbus.c 	writel(s->mbus_bridge_base,
writel           1078 drivers/bus/mvebu-mbus.c 		writel(s->wins[win].base, addr + WIN_BASE_OFF);
writel           1079 drivers/bus/mvebu-mbus.c 		writel(s->wins[win].ctrl, addr + WIN_CTRL_OFF);
writel           1087 drivers/bus/mvebu-mbus.c 		writel(s->wins[win].remap_lo, addr_rmp + WIN_REMAP_LO_OFF);
writel           1088 drivers/bus/mvebu-mbus.c 		writel(s->wins[win].remap_hi, addr_rmp + WIN_REMAP_HI_OFF);
writel           1138 drivers/bus/mvebu-mbus.c 		writel(UNIT_SYNC_BARRIER_ALL,
writel            241 drivers/bus/qcom-ebi2.c 	writel(val, ebi2_base);
writel            287 drivers/bus/qcom-ebi2.c 		writel(slowcfg, ebi2_xmem + csd->slow_cfg);
writel            289 drivers/bus/qcom-ebi2.c 		writel(fastcfg, ebi2_xmem + csd->fast_cfg);
writel            343 drivers/bus/qcom-ebi2.c 	writel(0UL, ebi2_xmem + EBI2_XMEM_CFG);
writel            348 drivers/bus/qcom-ebi2.c 	writel(val, ebi2_base);
writel            276 drivers/bus/sunxi-rsb.c 	writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER,
writel            278 drivers/bus/sunxi-rsb.c 	writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
writel            286 drivers/bus/sunxi-rsb.c 		writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL);
writel            289 drivers/bus/sunxi-rsb.c 		writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
writel            340 drivers/bus/sunxi-rsb.c 	writel(addr, rsb->regs + RSB_ADDR);
writel            341 drivers/bus/sunxi-rsb.c 	writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
writel            342 drivers/bus/sunxi-rsb.c 	writel(cmd, rsb->regs + RSB_CMD);
writel            382 drivers/bus/sunxi-rsb.c 	writel(addr, rsb->regs + RSB_ADDR);
writel            383 drivers/bus/sunxi-rsb.c 	writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
writel            384 drivers/bus/sunxi-rsb.c 	writel(*buf, rsb->regs + RSB_DATA);
writel            385 drivers/bus/sunxi-rsb.c 	writel(cmd, rsb->regs + RSB_CMD);
writel            486 drivers/bus/sunxi-rsb.c 	writel(status, rsb->regs + RSB_INTS);
writel            499 drivers/bus/sunxi-rsb.c 	writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
writel            508 drivers/bus/sunxi-rsb.c 	writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
writel            583 drivers/bus/sunxi-rsb.c 		writel(RSB_CMD_STRA, rsb->regs + RSB_CMD);
writel            584 drivers/bus/sunxi-rsb.c 		writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
writel            689 drivers/bus/sunxi-rsb.c 	writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
writel            711 drivers/bus/sunxi-rsb.c 	writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
writel             67 drivers/bus/tegra-gmi.c 	writel(gmi->snor_timing0, gmi->base + TEGRA_GMI_TIMING0);
writel             68 drivers/bus/tegra-gmi.c 	writel(gmi->snor_timing1, gmi->base + TEGRA_GMI_TIMING1);
writel             71 drivers/bus/tegra-gmi.c 	writel(gmi->snor_config, gmi->base + TEGRA_GMI_CONFIG);
writel             83 drivers/bus/tegra-gmi.c 	writel(config, gmi->base + TEGRA_GMI_CONFIG);
writel            171 drivers/bus/uniphier-system-bus.c 		writel(val, base_reg + UNIPHIER_SBC_STRIDE * i);
writel             49 drivers/char/agp/amd-k7-agp.c 		writel(agp_bridge->scratch_page, page_map->remapped+i);
writel            158 drivers/char/agp/amd-k7-agp.c 		writel(virt_to_phys(amd_irongate_private.gatt_pages[i]->real) | 1,
writel            166 drivers/char/agp/amd-k7-agp.c 		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
writel            225 drivers/char/agp/amd-k7-agp.c 	writel(agp_bridge->gatt_bus_addr, amd_irongate_private.registers+AMD_ATTBASE);
writel            246 drivers/char/agp/amd-k7-agp.c 	writel(1, amd_irongate_private.registers+AMD_TLBFLUSH);
writel            281 drivers/char/agp/amd-k7-agp.c 	writel(1, amd_irongate_private.registers+AMD_TLBFLUSH);
writel            317 drivers/char/agp/amd-k7-agp.c 		writel(agp_generic_mask_memory(agp_bridge,
writel            340 drivers/char/agp/amd-k7-agp.c 		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
writel             91 drivers/char/agp/amd64-agp.c 		writel(pte, agp_bridge->gatt_table+j);
writel             69 drivers/char/agp/ati-agp.c 		writel(agp_bridge->scratch_page, page_map->remapped+i);
writel            174 drivers/char/agp/ati-agp.c 	writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
writel            222 drivers/char/agp/ati-agp.c 	writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
writel            230 drivers/char/agp/ati-agp.c 	writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE);
writel            306 drivers/char/agp/ati-agp.c 		writel(agp_bridge->driver->mask_memory(agp_bridge,	
writel            334 drivers/char/agp/ati-agp.c 		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
writel            395 drivers/char/agp/ati-agp.c 		writel(virt_to_phys(ati_generic_private.gatt_pages[i]->real) | 1,
writel            403 drivers/char/agp/ati-agp.c 		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
writel            964 drivers/char/agp/generic.c 		writel(bridge->scratch_page, bridge->gatt_table+i);
writel           1098 drivers/char/agp/generic.c 		writel(bridge->driver->mask_memory(bridge,
writel           1140 drivers/char/agp/generic.c 		writel(bridge->scratch_page, bridge->gatt_table+i);
writel            247 drivers/char/agp/hp-agp.c 		writel(virt_to_phys(hp->io_pdir), hp->ioc_regs+HP_ZX1_PDIR_BASE);
writel            249 drivers/char/agp/hp-agp.c 		writel(hp->io_tlb_ps, hp->ioc_regs+HP_ZX1_TCNFG);
writel            251 drivers/char/agp/hp-agp.c 		writel((unsigned int)(~(HP_ZX1_IOVA_SIZE-1)), hp->ioc_regs+HP_ZX1_IMASK);
writel            253 drivers/char/agp/hp-agp.c 		writel(hp->iova_base|1, hp->ioc_regs+HP_ZX1_IBASE);
writel            255 drivers/char/agp/hp-agp.c 		writel(hp->iova_base|ilog2(HP_ZX1_IOVA_SIZE), hp->ioc_regs+HP_ZX1_PCOM);
writel            412 drivers/char/agp/hp-agp.c 	writel(command, hp->lba_regs+hp->lba_cap_offset+PCI_AGP_COMMAND);
writel             56 drivers/char/agp/i460-agp.c #define WR_GATT(index, val)	writel((val), (u32 *) i460.gatt + (index))
writel            190 drivers/char/agp/intel-gtt.c 	writel(virt_to_phys(gtt_table) | I810_PGETBL_ENABLED,
writel            207 drivers/char/agp/intel-gtt.c 	writel(0, intel_private.registers+I810_PGETBL_CTL);
writel            438 drivers/char/agp/intel-gtt.c 	writel(pgetbl_ctl2, intel_private.registers+I965_PGETBL_CTL2);
writel            444 drivers/char/agp/intel-gtt.c 	writel(pgetbl_ctl, intel_private.registers+I810_PGETBL_CTL);
writel            722 drivers/char/agp/intel-gtt.c 	writel(readl(intel_private.registers+I830_HIC) | (1<<31),
writel            771 drivers/char/agp/intel-gtt.c 		writel(0, intel_private.registers+GFX_FLSH_CNTL);
writel            774 drivers/char/agp/intel-gtt.c 	writel(intel_private.PGETBL_save, reg);
writel            783 drivers/char/agp/intel-gtt.c 		writel(0, intel_private.registers+GFX_FLSH_CNTL);
writel           1111 drivers/char/agp/intel-gtt.c 		writel(1, intel_private.i9xx_flush_page);
writel            227 drivers/char/agp/nvidia-agp.c 		writel(agp_bridge->driver->mask_memory(agp_bridge,
writel            254 drivers/char/agp/nvidia-agp.c 		writel(agp_bridge->scratch_page, agp_bridge->gatt_table+nvidia_private.pg_offset+i);
writel            208 drivers/char/agp/parisc-agp.c 	writel(command, info->lba_regs + info->lba_cap_offset + PCI_AGP_COMMAND);
writel             61 drivers/char/agp/sworks-agp.c 		writel(agp_bridge->scratch_page, page_map->remapped+i);
writel            158 drivers/char/agp/sworks-agp.c 		writel(agp_bridge->scratch_page, serverworks_private.scratch_dir.remapped+i);
writel            159 drivers/char/agp/sworks-agp.c 		writel(virt_to_phys(serverworks_private.scratch_dir.real) | 1, page_dir.remapped+i);
writel            183 drivers/char/agp/sworks-agp.c 		writel(virt_to_phys(serverworks_private.gatt_pages[i]->real)|1, page_dir.remapped+i);
writel            251 drivers/char/agp/sworks-agp.c 	writel(1, serverworks_private.registers+SVWRKS_DIRFLUSH);
writel            284 drivers/char/agp/sworks-agp.c 	writel(agp_bridge->gatt_bus_addr, serverworks_private.registers+SVWRKS_GATTBASE);
writel            353 drivers/char/agp/sworks-agp.c 		writel(agp_bridge->driver->mask_memory(agp_bridge, 
writel            378 drivers/char/agp/sworks-agp.c 		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
writel             59 drivers/char/hpet.c #define	write_counter(V, MC)	writel(V, MC)
writel            134 drivers/char/hpet.c 	writel(v & 0xffffffff, addr);
writel            135 drivers/char/hpet.c 	writel(v >> 32, addr + 4);
writel            188 drivers/char/hpet.c 		writel(isr, &devp->hd_hpet->hpet_isr);
writel            216 drivers/char/hpet.c 		writel(v, &timer->hpet_config);
writel            250 drivers/char/hpet.c 		writel(v, &timer->hpet_config);
writel            493 drivers/char/hpet.c 			writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
writel            499 drivers/char/hpet.c 			writel(isr, &hpet->hpet_isr);
writel            555 drivers/char/hpet.c 		writel(isr, &hpet->hpet_isr);
writel             54 drivers/char/hw_random/atmel-rng.c 	writel(TRNG_KEY | 1, trng->base + TRNG_CR);
writel             59 drivers/char/hw_random/atmel-rng.c 	writel(TRNG_KEY, trng->base + TRNG_CR);
writel             59 drivers/char/hw_random/bcm2835-rng.c 		writel(val, priv->base + offset);
writel             70 drivers/char/hw_random/imx-rngc.c 	writel(ctrl, rngc->base + RNGC_CONTROL);
writel             79 drivers/char/hw_random/imx-rngc.c 	writel(cmd, rngc->base + RNGC_COMMAND);
writel             88 drivers/char/hw_random/imx-rngc.c 	writel(ctrl, rngc->base + RNGC_CONTROL);
writel            100 drivers/char/hw_random/imx-rngc.c 	writel(cmd | RNGC_CMD_SELF_TEST, rngc->base + RNGC_COMMAND);
writel            175 drivers/char/hw_random/imx-rngc.c 	writel(cmd | RNGC_CMD_CLR_ERR, rngc->base + RNGC_COMMAND);
writel            183 drivers/char/hw_random/imx-rngc.c 		writel(cmd | RNGC_CMD_SEED, rngc->base + RNGC_COMMAND);
writel            102 drivers/char/hw_random/ks-sa-rng.c 	writel(0, &ks_sa_rng->reg_rng->control);
writel            104 drivers/char/hw_random/ks-sa-rng.c 	writel(value, &ks_sa_rng->reg_rng->control);
writel            113 drivers/char/hw_random/ks-sa-rng.c 	writel(value, &ks_sa_rng->reg_rng->config);
writel            116 drivers/char/hw_random/ks-sa-rng.c 	writel(0, &ks_sa_rng->reg_rng->intmask);
writel            121 drivers/char/hw_random/ks-sa-rng.c 	writel(value, &ks_sa_rng->reg_rng->control);
writel            132 drivers/char/hw_random/ks-sa-rng.c 	writel(0, &ks_sa_rng->reg_rng->control);
writel            146 drivers/char/hw_random/ks-sa-rng.c 	writel(TRNG_INTACK_REG_READY, &ks_sa_rng->reg_rng->intack);
writel             53 drivers/char/hw_random/mtk-rng.c 	writel(val, priv->base + RNG_CTRL);
writel             65 drivers/char/hw_random/mtk-rng.c 	writel(val, priv->base + RNG_CTRL);
writel             96 drivers/char/hw_random/pic32-rng.c 	writel(v, priv->base + RNGCON);
writel            119 drivers/char/hw_random/pic32-rng.c 	writel(0, rng->base + RNGCON);
writel            112 drivers/char/hw_random/xgene-rng.c 	writel(fro_val, ctx->csr_base + RNG_FRODETUNE);
writel            113 drivers/char/hw_random/xgene-rng.c 	writel(0x00000000, ctx->csr_base + RNG_ALARMMASK);
writel            114 drivers/char/hw_random/xgene-rng.c 	writel(0x00000000, ctx->csr_base + RNG_ALARMSTOP);
writel            115 drivers/char/hw_random/xgene-rng.c 	writel(0xFFFFFFFF, ctx->csr_base + RNG_FROENABLE);
writel            198 drivers/char/hw_random/xgene-rng.c 	writel(val, ctx->csr_base + RNG_INTR_STS_ACK);
writel            235 drivers/char/hw_random/xgene-rng.c 	writel(READY_MASK, ctx->csr_base + RNG_INTR_STS_ACK);
writel            244 drivers/char/hw_random/xgene-rng.c 	writel(0x00000000, ctx->csr_base + RNG_CONTROL);
writel            248 drivers/char/hw_random/xgene-rng.c 	writel(val, ctx->csr_base + RNG_CONFIG);
writel            251 drivers/char/hw_random/xgene-rng.c 	writel(val, ctx->csr_base + RNG_ALARMCNT);
writel            255 drivers/char/hw_random/xgene-rng.c 	writel(MONOBIT_FAIL_MASK |
writel            272 drivers/char/hw_random/xgene-rng.c 	writel(val, ctx->csr_base + RNG_CONTROL);
writel             41 drivers/char/ipmi/ipmi_si_mem_io.c 	writel(b << io->regshift, (io->addr)+(offset * io->regspacing));
writel             77 drivers/clk/at91/sckc.c 	writel(tmp | osc->bits->cr_osc32en, sckcr);
writel             96 drivers/clk/at91/sckc.c 	writel(tmp & ~osc->bits->cr_osc32en, sckcr);
writel            149 drivers/clk/at91/sckc.c 		writel((readl(sckcr) & ~osc->bits->cr_osc32en) |
writel            191 drivers/clk/at91/sckc.c 	writel(readl(sckcr) | osc->bits->cr_rcen, sckcr);
writel            206 drivers/clk/at91/sckc.c 	writel(readl(sckcr) & ~osc->bits->cr_rcen, sckcr);
writel            295 drivers/clk/at91/sckc.c 	writel(tmp, sckcr);
writel            188 drivers/clk/axis/clk-artpec6.c 			writel(muxreg, clkdata->syscon_base + 0x14);
writel            197 drivers/clk/axis/clk-artpec6.c 			writel(muxreg, clkdata->syscon_base + 0x14);
writel            335 drivers/clk/bcm/clk-bcm2835.c 	writel(CM_PASSWORD | val, cprman->regs + reg);
writel             58 drivers/clk/bcm/clk-iproc-asiu.c 	writel(val, asiu->gate_base + clk->gate.offset);
writel             75 drivers/clk/bcm/clk-iproc-asiu.c 	writel(val, asiu->gate_base + clk->gate.offset);
writel            144 drivers/clk/bcm/clk-iproc-asiu.c 		writel(val, asiu->div_base + clk->div.offset);
writel            172 drivers/clk/bcm/clk-iproc-asiu.c 	writel(val, asiu->div_base + clk->div.offset);
writel            178 drivers/clk/bcm/clk-iproc-pll.c 	writel(val, base + offset);
writel            139 drivers/clk/bcm/clk-kona.c 	writel(reg_val, ccu->base + reg_offset);
writel            163 drivers/clk/clk-axi-clkgen.c 	writel(val, axi_clkgen->base + reg);
writel            104 drivers/clk/clk-clps711x.c 	writel(tmp, base + CLPS711X_SYSCON1);
writel             41 drivers/clk/clk-divider.c 		writel(val, divider->reg);
writel             30 drivers/clk/clk-fractional-divider.c 		writel(val, fd->reg);
writel             39 drivers/clk/clk-gate.c 		writel(val, gate->reg);
writel             51 drivers/clk/clk-highbank.c 	writel(reg, hbclk->reg);
writel             68 drivers/clk/clk-highbank.c 	writel(reg, hbclk->reg);
writel             78 drivers/clk/clk-highbank.c 	writel(reg, hbclk->reg);
writel             90 drivers/clk/clk-highbank.c 	writel(reg, hbclk->reg);
writel            158 drivers/clk/clk-highbank.c 		writel(reg | HB_PLL_EXT_BYPASS, hbclk->reg);
writel            160 drivers/clk/clk-highbank.c 		writel(reg | HB_PLL_RESET, hbclk->reg);
writel            163 drivers/clk/clk-highbank.c 		writel(reg | HB_PLL_RESET, hbclk->reg);
writel            164 drivers/clk/clk-highbank.c 		writel(reg, hbclk->reg);
writel            173 drivers/clk/clk-highbank.c 		writel(reg | HB_PLL_EXT_BYPASS, hbclk->reg);
writel            176 drivers/clk/clk-highbank.c 		writel(reg | HB_PLL_EXT_BYPASS, hbclk->reg);
writel            178 drivers/clk/clk-highbank.c 	writel(reg, hbclk->reg);
writel            253 drivers/clk/clk-highbank.c 	writel(div >> 1, hbclk->reg);
writel            309 drivers/clk/clk-milbeaut.c 	writel(reg, mux->reg);
writel            433 drivers/clk/clk-milbeaut.c 	writel(val, divider->reg);
writel            436 drivers/clk/clk-milbeaut.c 		writel(M10V_DCHREQ, divider->write_valid_reg);
writel             28 drivers/clk/clk-multiplier.c 		writel(val, mult->reg);
writel             39 drivers/clk/clk-mux.c 		writel(val, mux->reg);
writel             75 drivers/clk/clk-nomadik.c 	writel(val, src_base + SRC_XTALCR);
writel            115 drivers/clk/clk-nomadik.c 	writel(val, src_base + SRC_CR);
writel            133 drivers/clk/clk-nomadik.c 	writel(val, src_base + SRC_XTALCR);
writel            174 drivers/clk/clk-nomadik.c 			writel(val, src_base + SRC_PLLCR);
writel            178 drivers/clk/clk-nomadik.c 		writel(val, src_base + SRC_PLLCR);
writel            194 drivers/clk/clk-nomadik.c 			writel(val, src_base + SRC_PLLCR);
writel            198 drivers/clk/clk-nomadik.c 		writel(val, src_base + SRC_PLLCR);
writel            306 drivers/clk/clk-nomadik.c 	writel(sclk->clkbit, src_base + enreg);
writel            319 drivers/clk/clk-nomadik.c 	writel(sclk->clkbit, src_base + disreg);
writel            682 drivers/clk/clk-stm32f4.c 	writel(val | ((n & 0x1ff) <<  6), base + pll->offset);
writel            908 drivers/clk/clk-stm32f4.c 	writel(val | BIT(16), base + STM32F4_RCC_BDCR);
writel            909 drivers/clk/clk-stm32f4.c 	writel(val & ~BIT(16), base + STM32F4_RCC_BDCR);
writel             65 drivers/clk/clk-tango4.c 	writel(0x100, base + CPUCLK_DIV); /* disable frequency ramping */
writel             85 drivers/clk/clk-vt8500.c 	writel(en_val, cdev->en_reg);
writel            101 drivers/clk/clk-vt8500.c 	writel(en_val, cdev->en_reg);
writel            189 drivers/clk/clk-vt8500.c 	writel(divisor, cdev->div_reg);
writel            589 drivers/clk/clk-vt8500.c 	writel(pll_val, pll->reg);
writel            324 drivers/clk/clk-xgene.c 	writel(val, fd->reg);
writel            188 drivers/clk/davinci/pll.c 	writel(mult - 1, pll->base + PLLM);
writel            319 drivers/clk/davinci/pll.c 		writel(ctrl, pll->base + PLLCTL);
writel            325 drivers/clk/davinci/pll.c 		writel(ctrl, pll->base + PLLCTL);
writel            331 drivers/clk/davinci/pll.c 		writel(ctrl, pll->base + PLLCTL);
writel            337 drivers/clk/davinci/pll.c 		writel(ctrl, pll->base + PLLCTL);
writel            614 drivers/clk/davinci/pll.c 	writel(oscdiv, base + OSCDIV);
writel            653 drivers/clk/davinci/pll.c 		writel(pllcmd, pll->base + PLLCMD);
writel             81 drivers/clk/hisilicon/clk-hisi-phase.c 	writel(val, phase->reg);
writel             57 drivers/clk/hisilicon/reset.c 	writel(reg | BIT(bit), rstc->membase + offset);
writel             78 drivers/clk/hisilicon/reset.c 	writel(reg & ~BIT(bit), rstc->membase + offset);
writel            113 drivers/clk/imx/clk-composite-8m.c 	writel(val, divider->reg);
writel             93 drivers/clk/imx/clk-divider-gate.c 		writel(val, div->reg);
writel            119 drivers/clk/imx/clk-divider-gate.c 	writel(val, div->reg);
writel            139 drivers/clk/imx/clk-divider-gate.c 	writel(0, div->reg);
writel             75 drivers/clk/imx/clk-fixup-div.c 	writel(val, div->reg);
writel             54 drivers/clk/imx/clk-fixup-mux.c 	writel(val, mux->reg);
writel             53 drivers/clk/imx/clk-gate2.c 	writel(reg, gate->reg);
writel             78 drivers/clk/imx/clk-gate2.c 	writel(reg, gate->reg);
writel            112 drivers/clk/imx/clk-gate2.c 		writel(reg, gate->reg);
writel            485 drivers/clk/imx/clk-imx5.c 	writel(val, MXC_CCM_CCDR);
writel            489 drivers/clk/imx/clk-imx5.c 	writel(val, MXC_CCM_CLPCR);
writel            571 drivers/clk/imx/clk-imx6q.c 	writel(readl(base + 0x160) & ~0x3c00, base + 0x160);
writel             56 drivers/clk/imx/clk-lpcg-scu.c 	writel(reg, clk->reg);
writel             73 drivers/clk/imx/clk-lpcg-scu.c 	writel(reg, clk->reg);
writel            170 drivers/clk/imx/clk-pll14xx.c 	writel(tmp, pll->base);
writel            378 drivers/clk/imx/clk-sccg-pll.c 	writel(val, pll->base + PLL_CFG0);
writel            415 drivers/clk/imx/clk-sccg-pll.c 	writel(val, pll->base + PLL_CFG0);
writel             63 drivers/clk/ingenic/cgu.c 	writel(clkgr, cgu->base + info->reg);
writel            197 drivers/clk/ingenic/cgu.c 	writel(ctl, cgu->base + pll_info->reg);
writel            220 drivers/clk/ingenic/cgu.c 	writel(ctl, cgu->base + pll_info->reg);
writel            252 drivers/clk/ingenic/cgu.c 	writel(ctl, cgu->base + pll_info->reg);
writel            354 drivers/clk/ingenic/cgu.c 		writel(reg, cgu->base + clk_info->mux.reg);
writel            500 drivers/clk/ingenic/cgu.c 		writel(reg, cgu->base + clk_info->div.reg);
writel             54 drivers/clk/ingenic/jz4770-cgu.c 	writel(readl(reg_opcr) & ~OPCR_SPENDH, reg_opcr);
writel             55 drivers/clk/ingenic/jz4770-cgu.c 	writel(readl(reg_usbpcr1) | USBPCR1_UHC_POWER, reg_usbpcr1);
writel             64 drivers/clk/ingenic/jz4770-cgu.c 	writel(readl(reg_usbpcr1) & ~USBPCR1_UHC_POWER, reg_usbpcr1);
writel             65 drivers/clk/ingenic/jz4770-cgu.c 	writel(readl(reg_opcr) | OPCR_SPENDH, reg_opcr);
writel            113 drivers/clk/ingenic/jz4780-cgu.c 	writel(usbpcr1, cgu->base + CGU_REG_USBPCR1);
writel            193 drivers/clk/ingenic/jz4780-cgu.c 	writel(usbpcr1, cgu->base + CGU_REG_USBPCR1);
writel             22 drivers/clk/ingenic/pm.c 	writel(val | LCR_LOW_POWER_MODE, ingenic_cgu_base + CGU_REG_LCR);
writel             31 drivers/clk/ingenic/pm.c 	writel(val & ~LCR_LOW_POWER_MODE, ingenic_cgu_base + CGU_REG_LCR);
writel             83 drivers/clk/keystone/gate.c 	writel(mdctl, control_base + MDCTL);
writel             89 drivers/clk/keystone/gate.c 		writel(pdctl, domain_base + PDCTL);
writel             93 drivers/clk/keystone/gate.c 	writel(ptcmd, domain_transition_base + PTCMD);
writel             44 drivers/clk/mediatek/clk-apmixed.c 	writel(val, tx->base_addr);
writel             48 drivers/clk/mediatek/clk-apmixed.c 	writel(val, tx->base_addr);
writel             51 drivers/clk/mediatek/clk-apmixed.c 	writel(val, tx->base_addr);
writel             63 drivers/clk/mediatek/clk-apmixed.c 	writel(val, tx->base_addr);
writel             95 drivers/clk/mediatek/clk-pll.c 		writel(r, pll->tuner_en_addr);
writel             98 drivers/clk/mediatek/clk-pll.c 		writel(r, pll->tuner_addr);
writel            108 drivers/clk/mediatek/clk-pll.c 		writel(r, pll->tuner_en_addr);
writel            111 drivers/clk/mediatek/clk-pll.c 		writel(r, pll->tuner_addr);
writel            130 drivers/clk/mediatek/clk-pll.c 		writel(val, pll->pd_addr);
writel            138 drivers/clk/mediatek/clk-pll.c 	writel(val, pll->pcw_addr);
writel            140 drivers/clk/mediatek/clk-pll.c 	writel(chg, pll->pcw_chg_addr);
writel            142 drivers/clk/mediatek/clk-pll.c 		writel(val + 1, pll->tuner_addr);
writel            243 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
writel            247 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
writel            252 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->base_addr + REG_CON0);
writel            261 drivers/clk/mediatek/clk-pll.c 		writel(r, pll->base_addr + REG_CON0);
writel            275 drivers/clk/mediatek/clk-pll.c 		writel(r, pll->base_addr + REG_CON0);
writel            282 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->base_addr + REG_CON0);
writel            285 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
writel            288 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
writel            108 drivers/clk/microchip/clk-core.c 	writel(PB_DIV_ENABLE, PIC32_SET(pb->ctrl_reg));
writel            116 drivers/clk/microchip/clk-core.c 	writel(PB_DIV_ENABLE, PIC32_CLR(pb->ctrl_reg));
writel            191 drivers/clk/microchip/clk-core.c 	writel(v, pb->ctrl_reg);
writel            258 drivers/clk/microchip/clk-core.c 	writel(REFO_ON | REFO_OE, PIC32_SET(refo->ctrl_reg));
writel            266 drivers/clk/microchip/clk-core.c 	writel(REFO_ON | REFO_OE, PIC32_CLR(refo->ctrl_reg));
writel            466 drivers/clk/microchip/clk-core.c 	writel(v, refo->ctrl_reg);
writel            513 drivers/clk/microchip/clk-core.c 	writel(v, refo->ctrl_reg);
writel            519 drivers/clk/microchip/clk-core.c 	writel(v, refo->ctrl_reg + REFO_TRIM_REG);
writel            522 drivers/clk/microchip/clk-core.c 	writel(REFO_ON | REFO_DIVSW_EN, PIC32_SET(refo->ctrl_reg));
writel            528 drivers/clk/microchip/clk-core.c 	writel(REFO_ON, PIC32_CLR(refo->ctrl_reg));
writel            708 drivers/clk/microchip/clk-core.c 	writel(v, pll->ctrl_reg);
writel            806 drivers/clk/microchip/clk-core.c 	writel(v, sclk->slew_reg);
writel            852 drivers/clk/microchip/clk-core.c 	writel(v, sclk->mux_reg);
writel            855 drivers/clk/microchip/clk-core.c 	writel(OSC_SWEN, PIC32_SET(sclk->mux_reg));
writel            899 drivers/clk/microchip/clk-core.c 		writel(v, sclk->slew_reg);
writel            966 drivers/clk/microchip/clk-core.c 	writel(sosc->enable_mask, PIC32_SET(sosc->enable_reg));
writel            978 drivers/clk/microchip/clk-core.c 	writel(sosc->enable_mask, PIC32_CLR(sosc->enable_reg));
writel            144 drivers/clk/mmp/clk-frac.c 		writel(val, factor->base);
writel             40 drivers/clk/mmp/clk-gate.c 	writel(tmp, gate->reg);
writel             66 drivers/clk/mmp/clk-gate.c 	writel(tmp, gate->reg);
writel            170 drivers/clk/mmp/clk-mix.c 		writel(mux_div, ri->reg_clk_ctrl);
writel            173 drivers/clk/mmp/clk-mix.c 		writel(mux_div, ri->reg_clk_ctrl);
writel            191 drivers/clk/mmp/clk-mix.c 		writel(fc_req, ri->reg_clk_ctrl);
writel            192 drivers/clk/mmp/clk-mix.c 		writel(mux_div, ri->reg_clk_sel);
writel             48 drivers/clk/mmp/reset.c 	writel(val, cell->reg);
writel             70 drivers/clk/mmp/reset.c 	writel(val, cell->reg);
writel            704 drivers/clk/mvebu/armada-37xx-periph.c 	writel(data->clk_dis, data->reg + CLK_DIS);
writel            705 drivers/clk/mvebu/armada-37xx-periph.c 	writel(data->div_sel0, data->reg + DIV_SEL0);
writel            706 drivers/clk/mvebu/armada-37xx-periph.c 	writel(data->div_sel1, data->reg + DIV_SEL1);
writel            707 drivers/clk/mvebu/armada-37xx-periph.c 	writel(data->div_sel2, data->reg + DIV_SEL2);
writel            708 drivers/clk/mvebu/armada-37xx-periph.c 	writel(data->tbg_sel, data->reg + TBG_SEL);
writel            709 drivers/clk/mvebu/armada-37xx-periph.c 	writel(data->clk_sel, data->reg + CLK_SEL);
writel            101 drivers/clk/mvebu/clk-corediv.c 	writel(reg, corediv->reg);
writel            120 drivers/clk/mvebu/clk-corediv.c 	writel(reg, corediv->reg);
writel            170 drivers/clk/mvebu/clk-corediv.c 	writel(reg, corediv->reg + soc_desc->ratio_offset);
writel            174 drivers/clk/mvebu/clk-corediv.c 	writel(reg, corediv->reg);
writel            178 drivers/clk/mvebu/clk-corediv.c 	writel(reg, corediv->reg);
writel            186 drivers/clk/mvebu/clk-corediv.c 	writel(reg, corediv->reg);
writel             86 drivers/clk/mvebu/clk-cpu.c 	writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_VALUE_OFFSET);
writel             92 drivers/clk/mvebu/clk-cpu.c 	writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET);
writel             97 drivers/clk/mvebu/clk-cpu.c 	writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET);
writel            102 drivers/clk/mvebu/clk-cpu.c 	writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET);
writel            141 drivers/clk/mvebu/clk-cpu.c 	writel(reg, cpuclk->pmu_dfs);
writel            146 drivers/clk/mvebu/clk-cpu.c 	writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET);
writel            226 drivers/clk/mvebu/common.c 	writel(ctrl->saved_reg, ctrl->base);
writel             48 drivers/clk/mxs/clk-ssp.c 	writel(val, ssp->base + HW_SSP_TIMING(ssp));
writel            159 drivers/clk/nxp/clk-lpc18xx-ccu.c 		writel(val, gate->reg);
writel            164 drivers/clk/nxp/clk-lpc18xx-ccu.c 	writel(val, gate->reg);
writel            423 drivers/clk/nxp/clk-lpc18xx-cgu.c 	writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
writel            426 drivers/clk/nxp/clk-lpc18xx-cgu.c 	writel(m, pll->reg + LPC18XX_CGU_PLL0USB_MDIV);
writel            427 drivers/clk/nxp/clk-lpc18xx-cgu.c 	writel(LPC18XX_PLL0_NP_DIVS_1, pll->reg + LPC18XX_CGU_PLL0USB_NP_DIV);
writel            431 drivers/clk/nxp/clk-lpc18xx-cgu.c 	writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
writel            437 drivers/clk/nxp/clk-lpc18xx-cgu.c 			writel(ctrl, pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
writel            385 drivers/clk/nxp/clk-lpc32xx.c 	writel(val, usb_clk_vbase + LPC32XX_USB_CLK_CTRL);
writel             85 drivers/clk/pistachio/clk-pll.c 	writel(val, pll->base + reg);
writel            187 drivers/clk/pxa/clk-pxa.c 	writel(freq->cccr, cccr);
writel             55 drivers/clk/renesas/clk-div6.c 	writel(val, clock->reg);
writel             75 drivers/clk/renesas/clk-div6.c 	writel(val, clock->reg);
writel            125 drivers/clk/renesas/clk-div6.c 		writel(val | CPG_DIV6_DIV(clock->div - 1), clock->reg);
writel            163 drivers/clk/renesas/clk-div6.c 	writel((readl(clock->reg) & mask) | (hw_index << clock->src_shift),
writel             72 drivers/clk/renesas/clk-mstp.c 	group->width_8bit ? writeb(val, reg) : writel(val, reg);
writel            101 drivers/clk/renesas/clk-rcar-gen2.c 	writel(val, zclk->reg);
writel            109 drivers/clk/renesas/clk-rcar-gen2.c 	writel(kick, zclk->kick_reg);
writel            194 drivers/clk/renesas/clk-sh73a0.c 	writel(0x108, cpg->reg + CPG_SD0CKCR);
writel            195 drivers/clk/renesas/clk-sh73a0.c 	writel(0x108, cpg->reg + CPG_SD1CKCR);
writel            196 drivers/clk/renesas/clk-sh73a0.c 	writel(0x108, cpg->reg + CPG_SD2CKCR);
writel            327 drivers/clk/renesas/r9a06g032-clocks.c 	writel(val, reg);
writel            659 drivers/clk/renesas/r9a06g032-clocks.c 	writel(div | BIT(31), reg);
writel             98 drivers/clk/renesas/rcar-gen2-cpg.c 	writel(val, zclk->reg);
writel            106 drivers/clk/renesas/rcar-gen2-cpg.c 	writel(kick, zclk->kick_reg);
writel             45 drivers/clk/renesas/rcar-gen3-cpg.c 	writel(val, reg);
writel             67 drivers/clk/renesas/rcar-gen3-cpg.c 		writel(csn->saved, csn->reg);
writel            410 drivers/clk/renesas/rcar-gen3-cpg.c 	writel(val, clock->csn.reg);
writel            634 drivers/clk/renesas/rcar-gen3-cpg.c 			writel(value, csn->reg);
writel            197 drivers/clk/renesas/renesas-cpg-mssr.c 		writel(value, priv->base + SMSTPCR(reg));
writel            580 drivers/clk/renesas/renesas-cpg-mssr.c 	writel(bitmask, priv->base + SRCR(reg));
writel            586 drivers/clk/renesas/renesas-cpg-mssr.c 	writel(bitmask, priv->base + SRSTCLR(reg));
writel            600 drivers/clk/renesas/renesas-cpg-mssr.c 	writel(bitmask, priv->base + SRCR(reg));
writel            614 drivers/clk/renesas/renesas-cpg-mssr.c 	writel(bitmask, priv->base + SRSTCLR(reg));
writel            848 drivers/clk/renesas/renesas-cpg-mssr.c 			writel(newval, priv->base + SMSTPCR(reg));
writel            116 drivers/clk/rockchip/clk-cpu.c 		writel(clksel->val, cpuclk->reg_base + clksel->reg);
writel            165 drivers/clk/rockchip/clk-cpu.c 		writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask,
writel            173 drivers/clk/rockchip/clk-cpu.c 		writel(HIWORD_UPDATE(reg_data->mux_core_alt,
writel            209 drivers/clk/rockchip/clk-cpu.c 	writel(HIWORD_UPDATE(0, reg_data->div_core_mask,
writel            132 drivers/clk/rockchip/clk-half-divider.c 	writel(val, divider->reg);
writel             49 drivers/clk/rockchip/clk-inverter.c 		writel(HIWORD_UPDATE(val, INVERTER_MASK, inv_clock->shift),
writel             60 drivers/clk/rockchip/clk-inverter.c 		writel(reg, inv_clock->reg);
writel            138 drivers/clk/rockchip/clk-mmc-phase.c 	writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift),
writel            261 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(0, RK3036_PLLCON1_PWRDOWN, 0),
writel            272 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(RK3036_PLLCON1_PWRDOWN,
writel            434 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(RK3066_PLLCON3_RESET, RK3066_PLLCON3_RESET, 0),
writel            438 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(rate->nr - 1, RK3066_PLLCON0_NR_MASK,
writel            452 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(0, RK3066_PLLCON3_RESET, 0),
writel            494 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(0, RK3066_PLLCON3_PWRDOWN, 0),
writel            505 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(RK3066_PLLCON3_PWRDOWN,
writel            740 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(0, RK3399_PLLCON3_PWRDOWN, 0),
writel            751 drivers/clk/rockchip/clk-pll.c 	writel(HIWORD_UPDATE(RK3399_PLLCON3_PWRDOWN,
writel            615 drivers/clk/rockchip/clk.c 	writel(0xfdb9, rst_base + reg_restart);
writel             32 drivers/clk/rockchip/softrst.c 		writel(BIT(offset) | (BIT(offset) << 16),
writel             41 drivers/clk/rockchip/softrst.c 		writel(reg | BIT(offset), softrst->reg_base + (bank * 4));
writel             59 drivers/clk/rockchip/softrst.c 		writel((BIT(offset) << 16), softrst->reg_base + (bank * 4));
writel             67 drivers/clk/rockchip/softrst.c 		writel(reg & ~BIT(offset), softrst->reg_base + (bank * 4));
writel            144 drivers/clk/samsung/clk-cpu.c 	writel(div0, base + E4210_DIV_CPU0);
writel            208 drivers/clk/samsung/clk-cpu.c 	writel(mux_reg | (1 << 16), base + E4210_SRC_CPU);
writel            212 drivers/clk/samsung/clk-cpu.c 	writel(div0, base + E4210_DIV_CPU0);
writel            216 drivers/clk/samsung/clk-cpu.c 		writel(div1, base + E4210_DIV_CPU1);
writel            247 drivers/clk/samsung/clk-cpu.c 	writel(mux_reg & ~(1 << 16), base + E4210_SRC_CPU);
writel            272 drivers/clk/samsung/clk-cpu.c 	writel(div0, base + E5433_DIV_CPU0);
writel            322 drivers/clk/samsung/clk-cpu.c 	writel(mux_reg | 1, base + E5433_MUX_SEL2);
writel            326 drivers/clk/samsung/clk-cpu.c 	writel(div0, base + E5433_DIV_CPU0);
writel            329 drivers/clk/samsung/clk-cpu.c 	writel(div1, base + E5433_DIV_CPU1);
writel            348 drivers/clk/samsung/clk-cpu.c 	writel(mux_reg & ~1, base + E5433_MUX_SEL2);
writel             57 drivers/clk/samsung/clk-exynos-audss.c 		writel(reg_save[i][1], reg_base + reg_save[i][0]);
writel             46 drivers/clk/samsung/clk-exynos-clkout.c 	writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG);
writel             26 drivers/clk/samsung/clk-exynos5-subcmu.c 		writel((rd->save & ~rd->mask) | rd->value, base + rd->offset);
writel             36 drivers/clk/samsung/clk-exynos5-subcmu.c 		writel((readl(base + rd->offset) & ~rd->mask) | rd->save,
writel             53 drivers/clk/samsung/clk-s5pv210-audss.c 		writel(reg_save[i][1], reg_base + reg_save[i][0]);
writel             36 drivers/clk/samsung/clk.c 		writel(rd->value, base + rd->offset);
writel            343 drivers/clk/sirf/clk-atlas7.c 	writel(val, sirfsoc_clk_vbase + reg);
writel             66 drivers/clk/sirf/clk-common.c 	writel(val, sirfsoc_clk_vbase + reg);
writel            246 drivers/clk/sirf/clk-common.c 	writel(reg, sirfsoc_rsc_vbase + SIRFSOC_USBPHY_PLL_CTRL);
writel            258 drivers/clk/sirf/clk-common.c 	writel(reg, sirfsoc_rsc_vbase + SIRFSOC_USBPHY_PLL_CTRL);
writel             65 drivers/clk/socfpga/clk-gate.c 		writel(src_reg, clk_mgr_base_addr + CLKMGR_L4SRC);
writel             70 drivers/clk/socfpga/clk-gate.c 		writel(src_reg, clk_mgr_base_addr + CLKMGR_L4SRC);
writel             84 drivers/clk/socfpga/clk-gate.c 		writel(src_reg, clk_mgr_base_addr + CLKMGR_PERPLL_SRC);
writel             94 drivers/clk/socfpga/clk-pll-s10.c 	writel(reg, socfpgaclk->hw.reg);
writel            165 drivers/clk/st/clk-flexgen.c 		writel(reg, config->reg);
writel             31 drivers/clk/st/clkgen.h 	writel((readl(base + field->offset) &
writel           1452 drivers/clk/sunxi-ng/ccu-sun4i-a10.c 	writel(val | (1 << 26), reg + SUN4I_PLL_AUDIO_REG);
writel           1465 drivers/clk/sunxi-ng/ccu-sun4i-a10.c 	writel(val | (2 << 6), reg + SUN4I_AHB_REG);
writel            953 drivers/clk/sunxi-ng/ccu-sun50i-a64.c 	writel(val | (0 << 16), reg + SUN50I_A64_PLL_AUDIO_REG);
writel            955 drivers/clk/sunxi-ng/ccu-sun50i-a64.c 	writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
writel           1191 drivers/clk/sunxi-ng/ccu-sun50i-h6.c 		writel(val, reg + pll_regs[i]);
writel           1202 drivers/clk/sunxi-ng/ccu-sun50i-h6.c 		writel(val, reg + pll_video_regs[i]);
writel           1214 drivers/clk/sunxi-ng/ccu-sun50i-h6.c 		writel (val, reg + usb2_clk_regs[i]);
writel           1223 drivers/clk/sunxi-ng/ccu-sun50i-h6.c 	writel(val | (7 << 16), reg + SUN50I_H6_PLL_AUDIO_REG);
writel           1232 drivers/clk/sunxi-ng/ccu-sun50i-h6.c 	writel(val, reg + SUN50I_H6_HDMI_CEC_CLK_REG);
writel           1002 drivers/clk/sunxi-ng/ccu-sun5i.c 	writel(val | (0 << 26), reg + SUN5I_PLL_AUDIO_REG);
writel           1013 drivers/clk/sunxi-ng/ccu-sun5i.c 	writel(val | (2 << 6), reg + SUN5I_AHB_REG);
writel           1243 drivers/clk/sunxi-ng/ccu-sun6i-a31.c 	writel(val | (0 << 16), reg + SUN6I_A31_PLL_AUDIO_REG);
writel           1248 drivers/clk/sunxi-ng/ccu-sun6i-a31.c 	writel(val, reg + SUN6I_A31_PLL_MIPI_REG);
writel           1258 drivers/clk/sunxi-ng/ccu-sun6i-a31.c 	writel(val, reg + SUN6I_A31_AHB1_REG);
writel            741 drivers/clk/sunxi-ng/ccu-sun8i-a23.c 	writel(val | (0 << 16), reg + SUN8I_A23_PLL_AUDIO_REG);
writel            746 drivers/clk/sunxi-ng/ccu-sun8i-a23.c 	writel(val, reg + SUN8I_A23_PLL_MIPI_REG);
writel            801 drivers/clk/sunxi-ng/ccu-sun8i-a33.c 	writel(val | (0 << 16), reg + SUN8I_A33_PLL_AUDIO_REG);
writel            806 drivers/clk/sunxi-ng/ccu-sun8i-a33.c 	writel(val, reg + SUN8I_A33_PLL_MIPI_REG);
writel            885 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c 	writel(val, reg);
writel            903 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c 	writel(val, reg + SUN8I_A83T_PLL_AUDIO_REG);
writel           1154 drivers/clk/sunxi-ng/ccu-sun8i-h3.c 	writel(val | (0 << 16), reg + SUN8I_H3_PLL_AUDIO_REG);
writel           1313 drivers/clk/sunxi-ng/ccu-sun8i-r40.c 	writel(val | (3 << 16), reg + SUN8I_R40_PLL_AUDIO_REG);
writel           1318 drivers/clk/sunxi-ng/ccu-sun8i-r40.c 	writel(val, reg + SUN8I_R40_PLL_MIPI_REG);
writel           1323 drivers/clk/sunxi-ng/ccu-sun8i-r40.c 	writel(val, reg + SUN8I_R40_USB_CLK_REG);
writel           1330 drivers/clk/sunxi-ng/ccu-sun8i-r40.c 	writel(SUN8I_R40_SYS_32K_CLK_KEY | BIT(8),
writel            812 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c 	writel(val | (3 << 16), reg + SUN8I_V3S_PLL_AUDIO_REG);
writel           1211 drivers/clk/sunxi-ng/ccu-sun9i-a80.c 	writel(val, reg);
writel           1228 drivers/clk/sunxi-ng/ccu-sun9i-a80.c 	writel(val, reg + SUN9I_A80_PLL_AUDIO_REG);
writel            539 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c 	writel(val | (3 << 16), reg + SUNIV_PLL_AUDIO_REG);
writel            110 drivers/clk/sunxi-ng/ccu_div.c 	writel(reg | (val << cd->div.shift),
writel             33 drivers/clk/sunxi-ng/ccu_frac.c 	writel(reg & ~cf->enable, common->base + common->reg);
writel             48 drivers/clk/sunxi-ng/ccu_frac.c 	writel(reg | cf->enable, common->base + common->reg);
writel            103 drivers/clk/sunxi-ng/ccu_frac.c 	writel(reg | sel, common->base + common->reg);
writel             23 drivers/clk/sunxi-ng/ccu_gate.c 	writel(reg & ~gate, common->base + common->reg);
writel             46 drivers/clk/sunxi-ng/ccu_gate.c 	writel(reg | gate, common->base + common->reg);
writel             37 drivers/clk/sunxi-ng/ccu_mmc_timing.c 	writel(val, cm->base + cm->reg);
writel            215 drivers/clk/sunxi-ng/ccu_mp.c 	writel(reg, cmp->common.base + cmp->common.reg);
writel            138 drivers/clk/sunxi-ng/ccu_mult.c 	writel(reg, cm->common.base + cm->common.reg);
writel            192 drivers/clk/sunxi-ng/ccu_mux.c 	writel(reg | (index << cm->shift), common->base + common->reg);
writel            142 drivers/clk/sunxi-ng/ccu_nk.c 	writel(reg, nk->common.base + nk->common.reg);
writel            174 drivers/clk/sunxi-ng/ccu_nkm.c 	writel(reg, nkm->common.base + nkm->common.reg);
writel            215 drivers/clk/sunxi-ng/ccu_nkmp.c 	writel(reg, nkmp->common.base + nkmp->common.reg);
writel            187 drivers/clk/sunxi-ng/ccu_nm.c 		writel(reg, nm->common.base + nm->common.reg);
writel            223 drivers/clk/sunxi-ng/ccu_nm.c 	writel(reg, nm->common.base + nm->common.reg);
writel            113 drivers/clk/sunxi-ng/ccu_phase.c 	writel(reg | (delay << phase->shift),
writel             24 drivers/clk/sunxi-ng/ccu_reset.c 	writel(reg & ~map->bit, ccu->base + map->reg);
writel             42 drivers/clk/sunxi-ng/ccu_reset.c 	writel(reg | map->bit, ccu->base + map->reg);
writel             38 drivers/clk/sunxi-ng/ccu_sdm.c 			writel(sdm->table[i].pattern,
writel             44 drivers/clk/sunxi-ng/ccu_sdm.c 	writel(reg | sdm->tuning_enable, common->base + sdm->tuning_reg);
writel             49 drivers/clk/sunxi-ng/ccu_sdm.c 	writel(reg | sdm->enable, common->base + common->reg);
writel             64 drivers/clk/sunxi-ng/ccu_sdm.c 	writel(reg & ~sdm->enable, common->base + common->reg);
writel             69 drivers/clk/sunxi-ng/ccu_sdm.c 	writel(reg & ~sdm->tuning_enable, common->base + sdm->tuning_reg);
writel            118 drivers/clk/sunxi/clk-a10-pll2.c 	writel(val, reg);
writel             45 drivers/clk/sunxi/clk-a10-ve.c 	writel(reg & ~BIT(SUN4I_VE_RESET), data->reg);
writel             64 drivers/clk/sunxi/clk-a10-ve.c 	writel(reg | BIT(SUN4I_VE_RESET), data->reg);
writel            159 drivers/clk/sunxi/clk-factors.c 	writel(reg, factors->reg);
writel            272 drivers/clk/sunxi/clk-mod0.c 	writel(value, phase->reg);
writel             56 drivers/clk/sunxi/clk-sun4i-display.c 	writel(reg & ~BIT(data->offset + id), data->reg);
writel             73 drivers/clk/sunxi/clk-sun4i-display.c 	writel(reg | BIT(data->offset + id), data->reg);
writel             43 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	writel(reg, tclk->reg);
writel             56 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	writel(reg, tclk->reg);
writel             92 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	writel(reg, tclk->reg);
writel            205 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	writel(reg, tclk->reg);
writel            170 drivers/clk/sunxi/clk-sun9i-cpus.c 	writel(reg, cpus->reg);
writel             49 drivers/clk/sunxi/clk-sun9i-mmc.c 	writel(val & ~BIT(SUN9I_MMC_RESET_BIT), reg);
writel             71 drivers/clk/sunxi/clk-sun9i-mmc.c 	writel(val | BIT(SUN9I_MMC_RESET_BIT), reg);
writel             42 drivers/clk/sunxi/clk-usb.c 	writel(reg & ~BIT(id), data->reg);
writel             63 drivers/clk/sunxi/clk-usb.c 	writel(reg | BIT(id), data->reg);
writel            258 drivers/clk/tegra/clk-emc.c 	writel(car_value, tegra->clk_regs + CLK_SOURCE_EMC);
writel             37 drivers/clk/tegra/clk-periph-fixed.c 	writel(mask, fixed->base + fixed->regs->enb_set_reg);
writel             47 drivers/clk/tegra/clk-periph-fixed.c 	writel(mask, fixed->base + fixed->regs->enb_clr_reg);
writel            240 drivers/clk/tegra/clk-pll.c #define pll_override_writel(val, offset, p) writel(val, p->pmc + offset)
writel            905 drivers/clk/tegra/clk-pll.c 	writel(val, pll->pmc + PMC_SATA_PWRGT);
writel            909 drivers/clk/tegra/clk-pll.c 	writel(val, pll->pmc + PMC_SATA_PWRGT);
writel            913 drivers/clk/tegra/clk-pll.c 	writel(val, pll->pmc + PMC_SATA_PWRGT);
writel            982 drivers/clk/tegra/clk-pll.c 	writel(val, pll->clk_base + PLLE_SS_CTRL);
writel             82 drivers/clk/tegra/clk-sdmmc-mux.c 	writel(val, sdmmc_mux->reg);
writel            157 drivers/clk/tegra/clk-sdmmc-mux.c 	writel(val, sdmmc_mux->reg);
writel           1113 drivers/clk/tegra/clk-tegra114.c 	writel(3 << 30, clk_base + CLK_SOURCE_CSITE);
writel           1123 drivers/clk/tegra/clk-tegra114.c 	writel(tegra114_cpu_clk_sctx.clk_csite_src,
writel           1126 drivers/clk/tegra/clk-tegra114.c 	writel(tegra114_cpu_clk_sctx.cclkg_burst,
writel           1128 drivers/clk/tegra/clk-tegra114.c 	writel(tegra114_cpu_clk_sctx.cclkg_divider,
writel           1209 drivers/clk/tegra/clk-tegra124.c 	writel(3 << 30, clk_base + CLK_SOURCE_CSITE);
writel           1219 drivers/clk/tegra/clk-tegra124.c 	writel(tegra124_cpu_clk_sctx.clk_csite_src,
writel           1222 drivers/clk/tegra/clk-tegra124.c 	writel(tegra124_cpu_clk_sctx.cclkg_burst,
writel           1224 drivers/clk/tegra/clk-tegra124.c 	writel(tegra124_cpu_clk_sctx.cclkg_divider,
writel           1459 drivers/clk/tegra/clk-tegra124.c 	writel(plld_base, clk_base + PLLD_BASE);
writel            927 drivers/clk/tegra/clk-tegra20.c 	writel(CPU_RESET(cpu),
writel            934 drivers/clk/tegra/clk-tegra20.c 	writel(CPU_RESET(cpu),
writel            944 drivers/clk/tegra/clk-tegra20.c 	writel(reg & ~CPU_CLOCK(cpu),
writel            955 drivers/clk/tegra/clk-tegra20.c 	writel(reg | CPU_CLOCK(cpu),
writel            975 drivers/clk/tegra/clk-tegra20.c 	writel(3<<30, clk_base + CLK_SOURCE_CSITE);
writel           1004 drivers/clk/tegra/clk-tegra20.c 		writel(tegra20_cpu_clk_sctx.pllx_misc,
writel           1006 drivers/clk/tegra/clk-tegra20.c 		writel(tegra20_cpu_clk_sctx.pllx_base,
writel           1018 drivers/clk/tegra/clk-tegra20.c 	writel(tegra20_cpu_clk_sctx.cclk_divider,
writel           1020 drivers/clk/tegra/clk-tegra20.c 	writel(tegra20_cpu_clk_sctx.cpu_burst,
writel           1023 drivers/clk/tegra/clk-tegra20.c 	writel(tegra20_cpu_clk_sctx.clk_csite_src,
writel           2851 drivers/clk/tegra/clk-tegra210.c 	writel(reg, clk_base + PLLU_BASE);
writel           2854 drivers/clk/tegra/clk-tegra210.c 	writel(reg, clk_base + PLLU_BASE);
writel           2885 drivers/clk/tegra/clk-tegra210.c 		writel(reg, clk_base + PLLU_BASE);
writel           3295 drivers/clk/tegra/clk-tegra210.c 	writel(3 << 30, clk_base + CLK_SOURCE_CSITE);
writel           3300 drivers/clk/tegra/clk-tegra210.c 	writel(tegra210_cpu_clk_sctx.clk_csite_src,
writel           3439 drivers/clk/tegra/clk-tegra210.c 		writel(GENMASK(26, 21) | BIT(7),
writel           3452 drivers/clk/tegra/clk-tegra210.c 		writel(BIT(21), clk_base + CLK_RST_CONTROLLER_RST_DEV_Y_CLR);
writel           3459 drivers/clk/tegra/clk-tegra210.c 		writel(GENMASK(26, 22) | BIT(7),
writel           3574 drivers/clk/tegra/clk-tegra210.c 	writel(value, clk_base + PLLD_BASE);
writel           1101 drivers/clk/tegra/clk-tegra30.c 	writel(CPU_RESET(cpu),
writel           1108 drivers/clk/tegra/clk-tegra30.c 	writel(CPU_RESET(cpu),
writel           1117 drivers/clk/tegra/clk-tegra30.c 	writel(CPU_CLOCK(cpu),
writel           1128 drivers/clk/tegra/clk-tegra30.c 	writel(reg | CPU_CLOCK(cpu),
writel           1155 drivers/clk/tegra/clk-tegra30.c 	writel(3 << 30, clk_base + CLK_RESET_SOURCE_CSITE);
writel           1184 drivers/clk/tegra/clk-tegra30.c 		writel(tegra30_cpu_clk_sctx.pllx_misc,
writel           1186 drivers/clk/tegra/clk-tegra30.c 		writel(tegra30_cpu_clk_sctx.pllx_base,
writel           1198 drivers/clk/tegra/clk-tegra30.c 	writel(tegra30_cpu_clk_sctx.cclk_divider,
writel           1200 drivers/clk/tegra/clk-tegra30.c 	writel(tegra30_cpu_clk_sctx.cpu_burst,
writel           1203 drivers/clk/tegra/clk-tegra30.c 	writel(tegra30_cpu_clk_sctx.clk_csite_src,
writel             39 drivers/clk/ux500/clk-prcc.c 	writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
writel             51 drivers/clk/ux500/clk-prcc.c 	writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
writel             59 drivers/clk/ux500/clk-prcc.c 	writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
writel             71 drivers/clk/ux500/clk-prcc.c 	writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
writel             58 drivers/clk/versatile/clk-sp810.c 	writel(val, sp810->base + SCCTRL);
writel            101 drivers/clk/x86/clk-pmc-atom.c 	writel(tmp, clk->reg);
writel            131 drivers/clk/zynq/pll.c 	writel(reg, clk->pll_ctrl);
writel            161 drivers/clk/zynq/pll.c 	writel(reg, clk->pll_ctrl);
writel            216 drivers/clk/zynq/pll.c 	writel(reg, pll->pll_ctrl);
writel            120 drivers/clocksource/arm_global_timer.c 	writel(ctrl, gt_base + GT_CONTROL);
writel            207 drivers/clocksource/arm_global_timer.c 		writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);
writel            243 drivers/clocksource/arm_global_timer.c 	writel(0, gt_base + GT_CONTROL);
writel            244 drivers/clocksource/arm_global_timer.c 	writel(0, gt_base + GT_COUNTER0);
writel            245 drivers/clocksource/arm_global_timer.c 	writel(0, gt_base + GT_COUNTER1);
writel            247 drivers/clocksource/arm_global_timer.c 	writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);
writel             65 drivers/clocksource/bcm_kona_timer.c 	writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
writel            123 drivers/clocksource/bcm_kona_timer.c 	writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
writel            128 drivers/clocksource/bcm_kona_timer.c 	writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
writel             64 drivers/clocksource/clksrc-dbx500-prcmu.c 		writel(TIMER_MODE_CONTINOUS,
writel             66 drivers/clocksource/clksrc-dbx500-prcmu.c 		writel(TIMER_DOWNCOUNT_VAL,
writel             57 drivers/clocksource/dw_apb_timer.c 	writel(val, timer->base + offs);
writel             67 drivers/clocksource/jcore-pit.c 	writel(0, pit->base + REG_PITEN);
writel             74 drivers/clocksource/jcore-pit.c 	writel(delta, pit->base + REG_THROT);
writel             75 drivers/clocksource/jcore-pit.c 	writel(pit->enable_val, pit->base + REG_PITEN);
writel             90 drivers/clocksource/nomadik-mtu.c 	writel(1 << 1, mtu_base + MTU_IMSC);
writel             91 drivers/clocksource/nomadik-mtu.c 	writel(evt, mtu_base + MTU_LR(1));
writel             93 drivers/clocksource/nomadik-mtu.c 	writel(MTU_CRn_ONESHOT | clk_prescale |
writel            104 drivers/clocksource/nomadik-mtu.c 		writel(nmdk_cycle, mtu_base + MTU_LR(1));
writel            105 drivers/clocksource/nomadik-mtu.c 		writel(nmdk_cycle, mtu_base + MTU_BGLR(1));
writel            107 drivers/clocksource/nomadik-mtu.c 		writel(MTU_CRn_PERIODIC | clk_prescale |
writel            110 drivers/clocksource/nomadik-mtu.c 		writel(1 << 1, mtu_base + MTU_IMSC);
writel            119 drivers/clocksource/nomadik-mtu.c 	writel(0, mtu_base + MTU_IMSC);
writel            121 drivers/clocksource/nomadik-mtu.c 	writel(0, mtu_base + MTU_CR(1));
writel            123 drivers/clocksource/nomadik-mtu.c 	writel(0xffffffff, mtu_base + MTU_LR(1));
writel            143 drivers/clocksource/nomadik-mtu.c 	writel(0, mtu_base + MTU_CR(0));
writel            146 drivers/clocksource/nomadik-mtu.c 	writel(nmdk_cycle, mtu_base + MTU_LR(0));
writel            147 drivers/clocksource/nomadik-mtu.c 	writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
writel            149 drivers/clocksource/nomadik-mtu.c 	writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
writel            179 drivers/clocksource/nomadik-mtu.c 	writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */
writel             78 drivers/clocksource/renesas-ostm.c 	writel(0, ostm->base + OSTM_CMP);
writel            106 drivers/clocksource/renesas-ostm.c 	writel(delta, ostm->base + OSTM_CMP);
writel            128 drivers/clocksource/renesas-ostm.c 	writel(ostm->ticks_per_jiffy - 1, ostm->base + OSTM_CMP);
writel             96 drivers/clocksource/samsung_pwm_timer.c 	writel(reg, pwm.base + REG_TCFG0);
writel            115 drivers/clocksource/samsung_pwm_timer.c 	writel(reg, pwm.base + REG_TCFG1);
writel            228 drivers/clocksource/samsung_pwm_timer.c 		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
writel            251 drivers/clocksource/samsung_pwm_timer.c 		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
writel            289 drivers/clocksource/samsung_pwm_timer.c 		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
writel             93 drivers/clocksource/timer-armada-370-xp.c 	writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set,
writel            112 drivers/clocksource/timer-armada-370-xp.c 	writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
writel            117 drivers/clocksource/timer-armada-370-xp.c 	writel(delta, local_base + TIMER0_VAL_OFF);
writel            136 drivers/clocksource/timer-armada-370-xp.c 	writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
writel            145 drivers/clocksource/timer-armada-370-xp.c 	writel(ticks_per_jiffy - 1, local_base + TIMER0_RELOAD_OFF);
writel            146 drivers/clocksource/timer-armada-370-xp.c 	writel(ticks_per_jiffy - 1, local_base + TIMER0_VAL_OFF);
writel            164 drivers/clocksource/timer-armada-370-xp.c 	writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
writel            223 drivers/clocksource/timer-armada-370-xp.c 	writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
writel            224 drivers/clocksource/timer-armada-370-xp.c 	writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
writel            225 drivers/clocksource/timer-armada-370-xp.c 	writel(timer0_ctrl_reg, timer_base + TIMER_CTRL_OFF);
writel            226 drivers/clocksource/timer-armada-370-xp.c 	writel(timer0_local_ctrl_reg, local_base + TIMER_CTRL_OFF);
writel            282 drivers/clocksource/timer-armada-370-xp.c 	writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
writel            283 drivers/clocksource/timer-armada-370-xp.c 	writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
writel             73 drivers/clocksource/timer-atcpit100.c 	writel(~0, base + CH1_REL);
writel             74 drivers/clocksource/timer-atcpit100.c 	writel(APB_CLK|TMR_32, base + CH1_CTL);
writel             79 drivers/clocksource/timer-atcpit100.c 	writel(APB_CLK|TMR_32, base + CH0_CTL);
writel             84 drivers/clocksource/timer-atcpit100.c 	writel(delay, base + CH0_CNT);
writel             85 drivers/clocksource/timer-atcpit100.c 	writel(delay, base + CH0_REL);
writel             93 drivers/clocksource/timer-atcpit100.c 	writel(val | CH0INT0, base + INT_STA);
writel            101 drivers/clocksource/timer-atcpit100.c 	writel(val | CH1TMR0EN, base + CH_EN);
writel            109 drivers/clocksource/timer-atcpit100.c 	writel(val | CH0TMR0EN, base + CH_EN);
writel            118 drivers/clocksource/timer-atcpit100.c 	writel(val & ~CH0TMR0EN, base + CH_EN);
writel            128 drivers/clocksource/timer-atcpit100.c 	writel(val & ~CH0TMR0EN, timer_of_base(to) + CH_EN);
writel            129 drivers/clocksource/timer-atcpit100.c 	writel(evt, timer_of_base(to) + CH0_REL);
writel            130 drivers/clocksource/timer-atcpit100.c 	writel(val | CH0TMR0EN, timer_of_base(to) + CH_EN);
writel            157 drivers/clocksource/timer-atcpit100.c 	writel(~0x0, timer_of_base(to) + CH0_REL);
writel            159 drivers/clocksource/timer-atcpit100.c 	writel(val | CH0TMR0EN, timer_of_base(to) + CH_EN);
writel            257 drivers/clocksource/timer-atcpit100.c 	writel(val | CH0INT0EN, base + INT_EN);
writel             91 drivers/clocksource/timer-atmel-tcb.c 		writel(tcb_cache[i].cmr, tcaddr + ATMEL_TC_REG(i, CMR));
writel             92 drivers/clocksource/timer-atmel-tcb.c 		writel(tcb_cache[i].rc, tcaddr + ATMEL_TC_REG(i, RC));
writel             93 drivers/clocksource/timer-atmel-tcb.c 		writel(0, tcaddr + ATMEL_TC_REG(i, RA));
writel             94 drivers/clocksource/timer-atmel-tcb.c 		writel(0, tcaddr + ATMEL_TC_REG(i, RB));
writel             96 drivers/clocksource/timer-atmel-tcb.c 		writel(0xff, tcaddr + ATMEL_TC_REG(i, IDR));
writel             98 drivers/clocksource/timer-atmel-tcb.c 		writel(tcb_cache[i].imr, tcaddr + ATMEL_TC_REG(i, IER));
writel            101 drivers/clocksource/timer-atmel-tcb.c 			writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(i, CCR));
writel            105 drivers/clocksource/timer-atmel-tcb.c 	writel(bmr_cache, tcaddr + ATMEL_TC_BMR);
writel            107 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
writel            168 drivers/clocksource/timer-atmel-tcb.c 	writel(0xff, regs + ATMEL_TC_REG(2, IDR));
writel            169 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
writel            187 drivers/clocksource/timer-atmel-tcb.c 	writel(timer_clock | ATMEL_TC_CPCSTOP | ATMEL_TC_WAVE |
writel            189 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
writel            209 drivers/clocksource/timer-atmel-tcb.c 	writel(timer_clock | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
writel            211 drivers/clocksource/timer-atmel-tcb.c 	writel((32768 + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
writel            214 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
writel            217 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG, regs +
writel            310 drivers/clocksource/timer-atmel-tcb.c 	writel(mck_divisor_idx			/* likely divide-by-8 */
writel            316 drivers/clocksource/timer-atmel-tcb.c 	writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA));
writel            317 drivers/clocksource/timer-atmel-tcb.c 	writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
writel            318 drivers/clocksource/timer-atmel-tcb.c 	writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR));	/* no irqs */
writel            319 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
writel            322 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_XC1			/* input: TIOA0 */
writel            326 drivers/clocksource/timer-atmel-tcb.c 	writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR));	/* no irqs */
writel            327 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
writel            330 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_TC1XC1S_TIOA0, tcaddr + ATMEL_TC_BMR);
writel            332 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
writel            338 drivers/clocksource/timer-atmel-tcb.c 	writel(mck_divisor_idx			/* likely divide-by-8 */
writel            342 drivers/clocksource/timer-atmel-tcb.c 	writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR));	/* no irqs */
writel            343 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
writel            346 drivers/clocksource/timer-atmel-tcb.c 	writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
writel            405 drivers/clocksource/timer-atmel-tcb.c 		writel(ATMEL_TC_ALL_IRQ, tc.regs + ATMEL_TC_REG(i, IDR));
writel             88 drivers/clocksource/timer-digicolor.c 	writel(count, dt->base + COUNT(dt->timer_id));
writel            184 drivers/clocksource/timer-digicolor.c 	writel(UINT_MAX, dc_timer_dev.base + COUNT(TIMER_B));
writel            145 drivers/clocksource/timer-fttmr010.c 	writel(cr, fttmr010->base + TIMER_CR);
writel            152 drivers/clocksource/timer-fttmr010.c 		writel(cycles, fttmr010->base + TIMER1_LOAD);
writel            156 drivers/clocksource/timer-fttmr010.c 		writel(cr + cycles, fttmr010->base + TIMER1_MATCH1);
writel            162 drivers/clocksource/timer-fttmr010.c 	writel(cr, fttmr010->base + TIMER_CR);
writel            175 drivers/clocksource/timer-fttmr010.c 	writel(cr, fttmr010->base + TIMER_CR);
writel            188 drivers/clocksource/timer-fttmr010.c 	writel(cr, fttmr010->base + TIMER_CR);
writel            191 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER1_COUNT);
writel            193 drivers/clocksource/timer-fttmr010.c 		writel(~0, fttmr010->base + TIMER1_LOAD);
writel            195 drivers/clocksource/timer-fttmr010.c 		writel(0, fttmr010->base + TIMER1_LOAD);
writel            201 drivers/clocksource/timer-fttmr010.c 		writel(cr, fttmr010->base + TIMER_INTR_MASK);
writel            216 drivers/clocksource/timer-fttmr010.c 	writel(cr, fttmr010->base + TIMER_CR);
writel            220 drivers/clocksource/timer-fttmr010.c 		writel(period, fttmr010->base + TIMER1_LOAD);
writel            223 drivers/clocksource/timer-fttmr010.c 		writel(cr, fttmr010->base + TIMER1_COUNT);
writel            224 drivers/clocksource/timer-fttmr010.c 		writel(cr, fttmr010->base + TIMER1_LOAD);
writel            230 drivers/clocksource/timer-fttmr010.c 		writel(cr, fttmr010->base + TIMER_INTR_MASK);
writel            236 drivers/clocksource/timer-fttmr010.c 	writel(cr, fttmr010->base + TIMER_CR);
writel            310 drivers/clocksource/timer-fttmr010.c 		writel(TIMER_INT_ALL_MASK, fttmr010->base + TIMER_INTR_MASK);
writel            311 drivers/clocksource/timer-fttmr010.c 		writel(0, fttmr010->base + TIMER_INTR_STATE);
writel            324 drivers/clocksource/timer-fttmr010.c 	writel(val, fttmr010->base + TIMER_CR);
writel            331 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER2_COUNT);
writel            332 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER2_MATCH1);
writel            333 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER2_MATCH2);
writel            336 drivers/clocksource/timer-fttmr010.c 		writel(~0, fttmr010->base + TIMER2_LOAD);
writel            344 drivers/clocksource/timer-fttmr010.c 		writel(0, fttmr010->base + TIMER2_LOAD);
writel            356 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER1_COUNT);
writel            357 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER1_LOAD);
writel            358 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER1_MATCH1);
writel            359 drivers/clocksource/timer-fttmr010.c 	writel(0, fttmr010->base + TIMER1_MATCH2);
writel             30 drivers/clocksource/timer-imx-sysctr.c 	writel(enable ? cmpcr | SYS_CTR_EN : cmpcr, sys_ctr_base + CMPCR);
writel             47 drivers/clocksource/timer-imx-tpm.c 	writel(val, timer_base + TPM_C0SC);
writel             58 drivers/clocksource/timer-imx-tpm.c 	writel(val, timer_base + TPM_C0SC);
writel             63 drivers/clocksource/timer-imx-tpm.c 	writel(TPM_STATUS_CH0F, timer_base + TPM_STATUS);
writel             90 drivers/clocksource/timer-imx-tpm.c 	writel(next, timer_base + TPM_C0V);
writel            211 drivers/clocksource/timer-imx-tpm.c 	writel(0, timer_base + TPM_SC);
writel            213 drivers/clocksource/timer-imx-tpm.c 	writel(TPM_SC_TOF_MASK, timer_base + TPM_SC);
writel            214 drivers/clocksource/timer-imx-tpm.c 	writel(0, timer_base + TPM_CNT);
writel            216 drivers/clocksource/timer-imx-tpm.c 	writel(TPM_C0SC_CHF_MASK, timer_base + TPM_C0SC);
writel            222 drivers/clocksource/timer-imx-tpm.c 	writel(TPM_SC_CMOD_INC_PER_CNT |
writel            228 drivers/clocksource/timer-imx-tpm.c 	writel(GENMASK(counter_width - 1, 0), timer_base + TPM_MOD);
writel             38 drivers/clocksource/timer-integrator-ap.c 	writel(0xffff, base + TIMER_LOAD);
writel             39 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl, base + TIMER_CTRL);
writel             63 drivers/clocksource/timer-integrator-ap.c 	writel(1, clkevt_base + TIMER_INTCLR);
writel             75 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl, clkevt_base + TIMER_CTRL);
writel             85 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl, clkevt_base + TIMER_CTRL);
writel             94 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl, clkevt_base + TIMER_CTRL);
writel             97 drivers/clocksource/timer-integrator-ap.c 	writel(timer_reload, clkevt_base + TIMER_LOAD);
writel             99 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl, clkevt_base + TIMER_CTRL);
writel            107 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
writel            108 drivers/clocksource/timer-integrator-ap.c 	writel(next, clkevt_base + TIMER_LOAD);
writel            109 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
writel            150 drivers/clocksource/timer-integrator-ap.c 	writel(ctrl, clkevt_base + TIMER_CTRL);
writel            184 drivers/clocksource/timer-integrator-ap.c 	writel(0, base + TIMER_CTRL);
writel             78 drivers/clocksource/timer-mediatek.c 	writel(SYST_CON_IRQ_CLR | SYST_CON_EN, SYST_CON_REG(to));
writel             98 drivers/clocksource/timer-mediatek.c 	writel(SYST_CON_EN, SYST_CON_REG(to));
writel            104 drivers/clocksource/timer-mediatek.c 	writel(ticks, SYST_VAL_REG(to));
writel            107 drivers/clocksource/timer-mediatek.c 	writel(SYST_CON_EN | SYST_CON_IRQ_EN, SYST_CON_REG(to));
writel            115 drivers/clocksource/timer-mediatek.c 	writel(0, SYST_CON_REG(to_timer_of(clkevt)));
writel            140 drivers/clocksource/timer-mediatek.c 	writel(val & ~GPT_CTRL_ENABLE, timer_of_base(to) +
writel            147 drivers/clocksource/timer-mediatek.c 	writel(delay, timer_of_base(to) + GPT_CMP_REG(timer));
writel            156 drivers/clocksource/timer-mediatek.c 	writel(GPT_IRQ_ACK(timer), timer_of_base(to) + GPT_IRQ_ACK_REG);
writel            168 drivers/clocksource/timer-mediatek.c 	writel(val | GPT_CTRL_ENABLE | GPT_CTRL_CLEAR,
writel            208 drivers/clocksource/timer-mediatek.c 	writel(GPT_IRQ_ACK(TIMER_CLK_EVT), timer_of_base(to) + GPT_IRQ_ACK_REG);
writel            217 drivers/clocksource/timer-mediatek.c 	writel(GPT_CTRL_CLEAR | GPT_CTRL_DISABLE,
writel            220 drivers/clocksource/timer-mediatek.c 	writel(GPT_CLK_SRC(GPT_CLK_SRC_SYS13M) | GPT_CLK_DIV1,
writel            223 drivers/clocksource/timer-mediatek.c 	writel(0x0, timer_of_base(to) + GPT_CMP_REG(timer));
writel            225 drivers/clocksource/timer-mediatek.c 	writel(GPT_CTRL_OP(option) | GPT_CTRL_ENABLE,
writel            234 drivers/clocksource/timer-mediatek.c 	writel(0x0, timer_of_base(to) + GPT_IRQ_EN_REG);
writel            237 drivers/clocksource/timer-mediatek.c 	writel(0x3f, timer_of_base(to) + GPT_IRQ_ACK_REG);
writel            240 drivers/clocksource/timer-mediatek.c 	writel(val | GPT_IRQ_ENABLE(timer),
writel             79 drivers/clocksource/timer-meson6.c 	writel(val & ~MESON_ISA_TIMER_MUX_TIMERA_EN,
writel             85 drivers/clocksource/timer-meson6.c 	writel(delay, timer_base + MESON_ISA_TIMERA);
writel             97 drivers/clocksource/timer-meson6.c 	writel(val | MESON_ISA_TIMER_MUX_TIMERA_EN,
writel            182 drivers/clocksource/timer-meson6.c 	writel(val, timer_base + MESON_ISA_TIMER_MUX);
writel            192 drivers/clocksource/timer-meson6.c 	writel(val, timer_base + MESON_ISA_TIMER_MUX);
writel             63 drivers/clocksource/timer-npcm7xx.c 	writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
writel             75 drivers/clocksource/timer-npcm7xx.c 	writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
writel             88 drivers/clocksource/timer-npcm7xx.c 	writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
writel             98 drivers/clocksource/timer-npcm7xx.c 	writel(timer_of_period(to), timer_of_base(to) + NPCM7XX_REG_TICR0);
writel            103 drivers/clocksource/timer-npcm7xx.c 	writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
writel            114 drivers/clocksource/timer-npcm7xx.c 	writel(evt, timer_of_base(to) + NPCM7XX_REG_TICR0);
writel            117 drivers/clocksource/timer-npcm7xx.c 	writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
writel            127 drivers/clocksource/timer-npcm7xx.c 	writel(NPCM7XX_T0_CLR_INT, timer_of_base(to) + NPCM7XX_REG_TISR);
writel            157 drivers/clocksource/timer-npcm7xx.c 	writel(NPCM7XX_DEFAULT_CSR,
writel            160 drivers/clocksource/timer-npcm7xx.c 	writel(NPCM7XX_Tx_RESETINT,
writel            173 drivers/clocksource/timer-npcm7xx.c 	writel(NPCM7XX_DEFAULT_CSR,
writel            175 drivers/clocksource/timer-npcm7xx.c 	writel(NPCM7XX_Tx_MAX_CNT,
writel            180 drivers/clocksource/timer-npcm7xx.c 	writel(val, timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TCSR1);
writel             72 drivers/clocksource/timer-orion.c 	writel(delta, timer_base + TIMER1_VAL);
writel             90 drivers/clocksource/timer-orion.c 	writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD);
writel             91 drivers/clocksource/timer-orion.c 	writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL);
writel            158 drivers/clocksource/timer-orion.c 	writel(~0, timer_base + TIMER0_VAL);
writel            159 drivers/clocksource/timer-orion.c 	writel(~0, timer_base + TIMER0_RELOAD);
writel             36 drivers/clocksource/timer-owl.c 	writel(0, base + OWL_Tx_CTL);
writel             37 drivers/clocksource/timer-owl.c 	writel(0, base + OWL_Tx_VAL);
writel             38 drivers/clocksource/timer-owl.c 	writel(0, base + OWL_Tx_CMP);
writel             53 drivers/clocksource/timer-owl.c 	writel(ctl, base + OWL_Tx_CTL);
writel             86 drivers/clocksource/timer-owl.c 	writel(OWL_Tx_CTL_INTEN, base + OWL_Tx_CTL);
writel             87 drivers/clocksource/timer-owl.c 	writel(0, base + OWL_Tx_VAL);
writel             88 drivers/clocksource/timer-owl.c 	writel(evt, base + OWL_Tx_CMP);
writel            109 drivers/clocksource/timer-owl.c 	writel(OWL_Tx_CTL_PD, owl_clkevt_base + OWL_Tx_CTL);
writel             67 drivers/clocksource/timer-pistachio.c 	writel(value, base + 0x20 * gpt_id + offset);
writel            211 drivers/clocksource/timer-pistachio.c 	writel(TIMER_ME_GLOBAL, pcs_gpt.base);
writel             65 drivers/clocksource/timer-sp804.c 	writel(0, base + TIMER_CTRL);
writel             89 drivers/clocksource/timer-sp804.c 	writel(0, base + TIMER_CTRL);
writel             90 drivers/clocksource/timer-sp804.c 	writel(0xffffffff, base + TIMER_LOAD);
writel             91 drivers/clocksource/timer-sp804.c 	writel(0xffffffff, base + TIMER_VALUE);
writel             92 drivers/clocksource/timer-sp804.c 	writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
writel            118 drivers/clocksource/timer-sp804.c 	writel(1, clkevt_base + TIMER_INTCLR);
writel            127 drivers/clocksource/timer-sp804.c 	writel(0, clkevt_base + TIMER_CTRL);
writel            142 drivers/clocksource/timer-sp804.c 	writel(clkevt_reload, clkevt_base + TIMER_LOAD);
writel            143 drivers/clocksource/timer-sp804.c 	writel(ctrl, clkevt_base + TIMER_CTRL);
writel            153 drivers/clocksource/timer-sp804.c 	writel(next, clkevt_base + TIMER_LOAD);
writel            154 drivers/clocksource/timer-sp804.c 	writel(ctrl, clkevt_base + TIMER_CTRL);
writel            201 drivers/clocksource/timer-sp804.c 	writel(0, base + TIMER_CTRL);
writel            223 drivers/clocksource/timer-sp804.c 	writel(0, base + TIMER_CTRL);
writel            224 drivers/clocksource/timer-sp804.c 	writel(0, base + TIMER_2_BASE + TIMER_CTRL);
writel            301 drivers/clocksource/timer-sp804.c 	writel(0, base + TIMER_CTRL);
writel             61 drivers/clocksource/timer-sun4i.c 	writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer));
writel             68 drivers/clocksource/timer-sun4i.c 	writel(delay, base + TIMER_INTVAL_REG(timer));
writel             81 drivers/clocksource/timer-sun4i.c 	writel(val | TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
writel            129 drivers/clocksource/timer-sun4i.c 	writel(TIMER_IRQ_EN(0), base + TIMER_IRQ_ST_REG);
writel            178 drivers/clocksource/timer-sun4i.c 	writel(~0, timer_of_base(&to) + TIMER_INTVAL_REG(1));
writel            179 drivers/clocksource/timer-sun4i.c 	writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD |
writel            202 drivers/clocksource/timer-sun4i.c 	writel(TIMER_CTL_CLK_SRC(TIMER_CTL_CLK_SRC_OSC24M),
writel            216 drivers/clocksource/timer-sun4i.c 	writel(val | TIMER_IRQ_EN(0), timer_of_base(&to) + TIMER_IRQ_EN_REG);
writel             84 drivers/clocksource/timer-sun5i.c 	writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer));
writel             91 drivers/clocksource/timer-sun5i.c 	writel(delay, ce->timer.base + TIMER_INTVAL_LO_REG(timer));
writel            103 drivers/clocksource/timer-sun5i.c 	writel(val | TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
writel            150 drivers/clocksource/timer-sun5i.c 	writel(0x1, ce->timer.base + TIMER_IRQ_ST_REG);
writel            222 drivers/clocksource/timer-sun5i.c 	writel(~0, base + TIMER_INTVAL_LO_REG(1));
writel            223 drivers/clocksource/timer-sun5i.c 	writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
writel            314 drivers/clocksource/timer-sun5i.c 	writel(val | TIMER_IRQ_EN(0), base + TIMER_IRQ_EN_REG);
writel            193 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IE_IRQ_DISABLE,
writel            196 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_DGPT1_TIMER_DISABLE,
writel            214 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IE_IRQ_DISABLE,
writel            217 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_DGPT1_TIMER_DISABLE,
writel            223 drivers/clocksource/timer-u300.c 	writel(0xFFFFFFFF, u300_timer_base + U300_TIMER_APP_GPT1TC);
writel            225 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_SGPT1M_MODE_ONE_SHOT,
writel            228 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IE_IRQ_ENABLE,
writel            231 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_EGPT1_TIMER_ENABLE,
writel            242 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IE_IRQ_DISABLE,
writel            245 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_DGPT1_TIMER_DISABLE,
writel            251 drivers/clocksource/timer-u300.c 	writel(cevdata->ticks_per_jiffy,
writel            257 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_SGPT1M_MODE_CONTINUOUS,
writel            260 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IE_IRQ_ENABLE,
writel            263 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_EGPT1_TIMER_ENABLE,
writel            281 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IE_IRQ_DISABLE,
writel            284 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_DGPT1_TIMER_DISABLE,
writel            287 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_RGPT1_TIMER_RESET,
writel            290 drivers/clocksource/timer-u300.c 	writel(cycles, u300_timer_base + U300_TIMER_APP_GPT1TC);
writel            295 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_SGPT1M_MODE_ONE_SHOT,
writel            298 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IE_IRQ_ENABLE,
writel            301 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_EGPT1_TIMER_ENABLE,
writel            327 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT1IA_IRQ_ACK,
writel            407 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_CRC_CLOCK_REQUEST_ENABLE,
writel            409 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_ROST_TIMER_RESET,
writel            411 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_DOST_TIMER_DISABLE,
writel            413 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_RDDT_TIMER_RESET,
writel            415 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_DDDT_TIMER_DISABLE,
writel            419 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_RGPT1_TIMER_RESET,
writel            428 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_RGPT2_TIMER_RESET,
writel            431 drivers/clocksource/timer-u300.c 	writel(0xFFFFFFFFU, u300_timer_base + U300_TIMER_APP_GPT2TC);
writel            433 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_SGPT2M_MODE_CONTINUOUS,
writel            436 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_GPT2IE_IRQ_DISABLE,
writel            439 drivers/clocksource/timer-u300.c 	writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE,
writel             46 drivers/clocksource/timer-vt8500.c 	writel(3, regbase + TIMER_CTRL_VAL);
writel             69 drivers/clocksource/timer-vt8500.c 	writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
writel             74 drivers/clocksource/timer-vt8500.c 	writel(1, regbase + TIMER_IER_VAL);
writel             81 drivers/clocksource/timer-vt8500.c 	writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
writel             82 drivers/clocksource/timer-vt8500.c 	writel(0, regbase + TIMER_IER_VAL);
writel             98 drivers/clocksource/timer-vt8500.c 	writel(0xf, regbase + TIMER_STATUS_VAL);
writel            129 drivers/clocksource/timer-vt8500.c 	writel(1, regbase + TIMER_CTRL_VAL);
writel            130 drivers/clocksource/timer-vt8500.c 	writel(0xf, regbase + TIMER_STATUS_VAL);
writel            131 drivers/clocksource/timer-vt8500.c 	writel(~0, regbase + TIMER_MATCH_VAL);
writel             68 drivers/clocksource/timer-zevio.c 	writel(delta, timer->timer1 + IO_CURRENT_VAL);
writel             69 drivers/clocksource/timer-zevio.c 	writel(CNTL_RUN_TIMER | CNTL_DEC | CNTL_MATCH(TIMER_MATCH),
writel             81 drivers/clocksource/timer-zevio.c 	writel(0, timer->interrupt_regs + IO_INTR_MSK);
writel             82 drivers/clocksource/timer-zevio.c 	writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
writel             84 drivers/clocksource/timer-zevio.c 	writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
writel             94 drivers/clocksource/timer-zevio.c 	writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_MSK);
writel             95 drivers/clocksource/timer-zevio.c 	writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
writel            108 drivers/clocksource/timer-zevio.c 	writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_ACK);
writel            109 drivers/clocksource/timer-zevio.c 	writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
writel            165 drivers/clocksource/timer-zevio.c 		writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
writel            166 drivers/clocksource/timer-zevio.c 		writel(0, timer->timer1 + IO_DIVIDER);
writel            169 drivers/clocksource/timer-zevio.c 		writel(0, timer->interrupt_regs + IO_INTR_MSK);
writel            170 drivers/clocksource/timer-zevio.c 		writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
writel            173 drivers/clocksource/timer-zevio.c 		writel(0, timer->base + IO_MATCH(TIMER_MATCH));
writel            187 drivers/clocksource/timer-zevio.c 	writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL);
writel            188 drivers/clocksource/timer-zevio.c 	writel(0, timer->timer2 + IO_CURRENT_VAL);
writel            189 drivers/clocksource/timer-zevio.c 	writel(0, timer->timer2 + IO_DIVIDER);
writel            190 drivers/clocksource/timer-zevio.c 	writel(CNTL_RUN_TIMER | CNTL_FOREVER | CNTL_INC,
writel            226 drivers/cpufreq/brcmstb-avs-cpufreq.c 	writel(AVS_STATUS_CLEAR, base + AVS_MBOX_STATUS);
writel            231 drivers/cpufreq/brcmstb-avs-cpufreq.c 			writel(args[i], base + AVS_MBOX_PARAM(i));
writel            238 drivers/cpufreq/brcmstb-avs-cpufreq.c 	writel(cmd, base + AVS_MBOX_COMMAND);
writel            239 drivers/cpufreq/brcmstb-avs-cpufreq.c 	writel(AVS_CPU_L2_INT_MASK, priv->avs_intr_base + AVS_CPU_L2_SET0);
writel            266 drivers/cpufreq/brcmstb-avs-cpufreq.c 	writel(AVS_STATUS_CLEAR, base + AVS_MBOX_STATUS);
writel             89 drivers/cpufreq/tegra186-cpufreq.c 	writel(edvd_val, edvd_reg);
writel             21 drivers/cpuidle/cpuidle-clps711x.c 	writel(0xaa, clps711x_halt);
writel             35 drivers/cpuidle/cpuidle-kirkwood.c 	writel(0x7, ddr_operation_base);
writel             60 drivers/crypto/amcc/crypto4xx_core.c 	writel(PPC4XX_BYTE_ORDER, dev->ce_base + CRYPTO4XX_BYTE_ORDER_CFG);
writel             71 drivers/crypto/amcc/crypto4xx_core.c 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);
writel             78 drivers/crypto/amcc/crypto4xx_core.c 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);
writel             79 drivers/crypto/amcc/crypto4xx_core.c 	writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_PDR_BASE);
writel             80 drivers/crypto/amcc/crypto4xx_core.c 	writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_RDR_BASE);
writel             81 drivers/crypto/amcc/crypto4xx_core.c 	writel(PPC4XX_PRNG_CTRL_AUTO_EN, dev->ce_base + CRYPTO4XX_PRNG_CTRL);
writel             83 drivers/crypto/amcc/crypto4xx_core.c 	writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_L);
writel             85 drivers/crypto/amcc/crypto4xx_core.c 	writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_H);
writel             89 drivers/crypto/amcc/crypto4xx_core.c 	writel(ring_size.w, dev->ce_base + CRYPTO4XX_RING_SIZE);
writel             91 drivers/crypto/amcc/crypto4xx_core.c 	writel(ring_ctrl.w, dev->ce_base + CRYPTO4XX_RING_CTRL);
writel             94 drivers/crypto/amcc/crypto4xx_core.c 	writel(device_ctrl, dev->ce_base + CRYPTO4XX_DEVICE_CTRL);
writel             95 drivers/crypto/amcc/crypto4xx_core.c 	writel(dev->gdr_pa, dev->ce_base + CRYPTO4XX_GATH_RING_BASE);
writel             96 drivers/crypto/amcc/crypto4xx_core.c 	writel(dev->sdr_pa, dev->ce_base + CRYPTO4XX_SCAT_RING_BASE);
writel            100 drivers/crypto/amcc/crypto4xx_core.c 	writel(part_ring_size.w, dev->ce_base + CRYPTO4XX_PART_RING_SIZE);
writel            101 drivers/crypto/amcc/crypto4xx_core.c 	writel(PPC4XX_SD_BUFFER_SIZE, dev->ce_base + CRYPTO4XX_PART_RING_CFG);
writel            105 drivers/crypto/amcc/crypto4xx_core.c 	writel(io_threshold.w, dev->ce_base + CRYPTO4XX_IO_THRESHOLD);
writel            106 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_PDR_BASE_UADDR);
writel            107 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_RDR_BASE_UADDR);
writel            108 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_PKT_SRC_UADDR);
writel            109 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_PKT_DEST_UADDR);
writel            110 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_SA_UADDR);
writel            111 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_GATH_RING_BASE_UADDR);
writel            112 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_SCAT_RING_BASE_UADDR);
writel            119 drivers/crypto/amcc/crypto4xx_core.c 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);
writel            121 drivers/crypto/amcc/crypto4xx_core.c 	writel(PPC4XX_INTERRUPT_CLR, dev->ce_base + CRYPTO4XX_INT_CLR);
writel            122 drivers/crypto/amcc/crypto4xx_core.c 	writel(PPC4XX_INT_DESCR_CNT, dev->ce_base + CRYPTO4XX_INT_DESCR_CNT);
writel            123 drivers/crypto/amcc/crypto4xx_core.c 	writel(PPC4XX_INT_DESCR_CNT, dev->ce_base + CRYPTO4XX_INT_DESCR_CNT);
writel            124 drivers/crypto/amcc/crypto4xx_core.c 	writel(PPC4XX_INT_CFG, dev->ce_base + CRYPTO4XX_INT_CFG);
writel            126 drivers/crypto/amcc/crypto4xx_core.c 		writel(PPC4XX_INT_TIMEOUT_CNT_REVB << 10,
writel            128 drivers/crypto/amcc/crypto4xx_core.c 		writel(PPC4XX_PD_DONE_INT | PPC4XX_TMO_ERR_INT,
writel            131 drivers/crypto/amcc/crypto4xx_core.c 		writel(PPC4XX_PD_DONE_INT, dev->ce_base + CRYPTO4XX_INT_EN);
writel            927 drivers/crypto/amcc/crypto4xx_core.c 	writel(0, dev->ce_base + CRYPTO4XX_INT_DESCR_RD);
writel            928 drivers/crypto/amcc/crypto4xx_core.c 	writel(1, dev->ce_base + CRYPTO4XX_INT_DESCR_RD);
writel           1108 drivers/crypto/amcc/crypto4xx_core.c 	writel(clr_val, core_dev->dev->ce_base + CRYPTO4XX_INT_CLR);
writel           1133 drivers/crypto/amcc/crypto4xx_core.c 		writel(PPC4XX_PRNG_CTRL_AUTO_EN,
writel             61 drivers/crypto/amcc/crypto4xx_trng.c 	writel(device_ctrl, dev->ce_base + CRYPTO4XX_DEVICE_CTRL);
writel            640 drivers/crypto/hifn_795x.c 	writel((__force u32)cpu_to_le32(val), dev->bar[0] + reg);
writel            645 drivers/crypto/hifn_795x.c 	writel((__force u32)cpu_to_le32(val), dev->bar[1] + reg);
writel            425 drivers/crypto/hisilicon/qm.c 	writel(0x1, qm->io_base + QM_MEM_START_INIT);
writel            588 drivers/crypto/hisilicon/qm.c 	writel(error_status, qm->io_base + QM_ABNORMAL_INT_SOURCE);
writel            696 drivers/crypto/hisilicon/qm.c 	writel(lower_32_bits(tmp), qm->io_base + QM_VFT_CFG_DATA_L);
writel            697 drivers/crypto/hisilicon/qm.c 	writel(upper_32_bits(tmp), qm->io_base + QM_VFT_CFG_DATA_H);
writel            711 drivers/crypto/hisilicon/qm.c 	writel(0x0, qm->io_base + QM_VFT_CFG_OP_WR);
writel            712 drivers/crypto/hisilicon/qm.c 	writel(type, qm->io_base + QM_VFT_CFG_TYPE);
writel            713 drivers/crypto/hisilicon/qm.c 	writel(fun_num, qm->io_base + QM_VFT_CFG);
writel            717 drivers/crypto/hisilicon/qm.c 	writel(0x0, qm->io_base + QM_VFT_CFG_RDY);
writel            718 drivers/crypto/hisilicon/qm.c 	writel(0x1, qm->io_base + QM_VFT_CFG_OP_ENABLE);
writel            781 drivers/crypto/hisilicon/qm.c 	writel(tmp, qm->io_base + QM_DFX_SQE_CNT_VF_SQN);
writel            785 drivers/crypto/hisilicon/qm.c 	writel(tmp, qm->io_base + QM_DFX_CQE_CNT_VF_CQN);
writel            805 drivers/crypto/hisilicon/qm.c 	writel(rd_clr_ctrl, qm->io_base + QM_DFX_CNT_CLR_CE);
writel            987 drivers/crypto/hisilicon/qm.c 	writel(QM_ABNORMAL_INT_MASK_VALUE, qm->io_base + QM_ABNORMAL_INT_MASK);
writel           1000 drivers/crypto/hisilicon/qm.c 	writel(ce, qm->io_base + QM_RAS_CE_ENABLE);
writel           1001 drivers/crypto/hisilicon/qm.c 	writel(QM_RAS_CE_TIMES_PER_IRQ, qm->io_base + QM_RAS_CE_THRESHOLD);
writel           1002 drivers/crypto/hisilicon/qm.c 	writel(nfe, qm->io_base + QM_RAS_NFE_ENABLE);
writel           1003 drivers/crypto/hisilicon/qm.c 	writel(fe, qm->io_base + QM_RAS_FE_ENABLE);
writel           1006 drivers/crypto/hisilicon/qm.c 	writel(msi, qm->io_base + QM_RAS_MSI_INT_SEL);
writel           1009 drivers/crypto/hisilicon/qm.c 	writel(irq_unmask, qm->io_base + QM_ABNORMAL_INT_MASK);
writel           1064 drivers/crypto/hisilicon/qm.c 		writel(error_status, qm->io_base + QM_ABNORMAL_INT_SOURCE);
writel           1387 drivers/crypto/hisilicon/qm.c 		writel(0x1, qm->io_base + QM_CACHE_WB_START);
writel           1675 drivers/crypto/hisilicon/qm.c 	writel(0x0, qm->io_base + QM_VF_EQ_INT_MASK);
writel           1676 drivers/crypto/hisilicon/qm.c 	writel(0x0, qm->io_base + QM_VF_AEQ_INT_MASK);
writel           1750 drivers/crypto/hisilicon/qm.c 	writel(0x1, qm->io_base + QM_VF_EQ_INT_MASK);
writel           1751 drivers/crypto/hisilicon/qm.c 	writel(0x1, qm->io_base + QM_VF_AEQ_INT_MASK);
writel           1824 drivers/crypto/hisilicon/qm.c 	writel(0x0, qm->io_base + QM_DFX_SQE_CNT_VF_SQN);
writel           1825 drivers/crypto/hisilicon/qm.c 	writel(0x0, qm->io_base + QM_DFX_CQE_CNT_VF_CQN);
writel           1831 drivers/crypto/hisilicon/qm.c 	writel(0x1, qm->io_base + QM_DFX_CNT_CLR_CE);
writel           1839 drivers/crypto/hisilicon/qm.c 	writel(0x0, qm->io_base + QM_DFX_CNT_CLR_CE);
writel            716 drivers/crypto/hisilicon/sec/sec_drv.c 		writel(ooo_read, base + SEC_Q_OUTORDER_RD_PTR_REG);
writel            876 drivers/crypto/hisilicon/sec/sec_drv.c 	writel(write, base + SEC_Q_WR_PTR_REG);
writel            296 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXUSER_BASE, base + QM_ARUSER_M_CFG_1);
writel            297 drivers/crypto/hisilicon/zip/zip_main.c 	writel(ARUSER_M_CFG_ENABLE, base + QM_ARUSER_M_CFG_ENABLE);
writel            298 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXUSER_BASE, base + QM_AWUSER_M_CFG_1);
writel            299 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AWUSER_M_CFG_ENABLE, base + QM_AWUSER_M_CFG_ENABLE);
writel            300 drivers/crypto/hisilicon/zip/zip_main.c 	writel(WUSER_M_CFG_ENABLE, base + QM_WUSER_M_CFG_ENABLE);
writel            303 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXI_M_CFG, base + QM_AXI_M_CFG);
writel            304 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXI_M_CFG_ENABLE, base + QM_AXI_M_CFG_ENABLE);
writel            306 drivers/crypto/hisilicon/zip/zip_main.c 	writel(PEH_AXUSER_CFG, base + QM_PEH_AXUSER_CFG);
writel            307 drivers/crypto/hisilicon/zip/zip_main.c 	writel(PEH_AXUSER_CFG_ENABLE, base + QM_PEH_AXUSER_CFG_ENABLE);
writel            310 drivers/crypto/hisilicon/zip/zip_main.c 	writel(CACHE_ALL_EN, base + HZIP_PORT_ARCA_CHE_0);
writel            311 drivers/crypto/hisilicon/zip/zip_main.c 	writel(CACHE_ALL_EN, base + HZIP_PORT_ARCA_CHE_1);
writel            312 drivers/crypto/hisilicon/zip/zip_main.c 	writel(CACHE_ALL_EN, base + HZIP_PORT_AWCA_CHE_0);
writel            313 drivers/crypto/hisilicon/zip/zip_main.c 	writel(CACHE_ALL_EN, base + HZIP_PORT_AWCA_CHE_1);
writel            316 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXUSER_BASE, base + HZIP_BD_RUSER_32_63);
writel            317 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXUSER_BASE, base + HZIP_SGL_RUSER_32_63);
writel            318 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXUSER_BASE, base + HZIP_BD_WUSER_32_63);
writel            319 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXUSER_BASE, base + HZIP_DATA_RUSER_32_63);
writel            320 drivers/crypto/hisilicon/zip/zip_main.c 	writel(AXUSER_BASE, base + HZIP_DATA_WUSER_32_63);
writel            323 drivers/crypto/hisilicon/zip/zip_main.c 	writel(DECOMP_CHECK_ENABLE | ALL_COMP_DECOMP_EN,
writel            327 drivers/crypto/hisilicon/zip/zip_main.c 	writel(SQC_CACHE_ENABLE | CQC_CACHE_ENABLE | SQC_CACHE_WB_ENABLE |
writel            337 drivers/crypto/hisilicon/zip/zip_main.c 		writel(HZIP_CORE_INT_DISABLE, qm->io_base + HZIP_CORE_INT_MASK);
writel            345 drivers/crypto/hisilicon/zip/zip_main.c 		writel(HZIP_CORE_INT_DISABLE, hisi_zip->qm.io_base +
writel            348 drivers/crypto/hisilicon/zip/zip_main.c 		writel(0, hisi_zip->qm.io_base + HZIP_CORE_INT_MASK);
writel            351 drivers/crypto/hisilicon/zip/zip_main.c 		writel(HZIP_CORE_INT_DISABLE,
writel            392 drivers/crypto/hisilicon/zip/zip_main.c 	writel(val, qm->io_base + QM_DFX_MB_CNT_VF);
writel            393 drivers/crypto/hisilicon/zip/zip_main.c 	writel(val, qm->io_base + QM_DFX_DB_CNT_VF);
writel            397 drivers/crypto/hisilicon/zip/zip_main.c 	writel(tmp, qm->io_base + QM_DFX_SQE_CNT_VF_SQN);
writel            401 drivers/crypto/hisilicon/zip/zip_main.c 	writel(tmp, qm->io_base + QM_DFX_CQE_CNT_VF_CQN);
writel            424 drivers/crypto/hisilicon/zip/zip_main.c 	writel(tmp, qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE);
writel            598 drivers/crypto/hisilicon/zip/zip_main.c 	writel(0x0, qm->io_base + QM_DFX_MB_CNT_VF);
writel            599 drivers/crypto/hisilicon/zip/zip_main.c 	writel(0x0, qm->io_base + QM_DFX_DB_CNT_VF);
writel            600 drivers/crypto/hisilicon/zip/zip_main.c 	writel(0x0, qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE);
writel            896 drivers/crypto/hisilicon/zip/zip_main.c 		writel(err_sts, hisi_zip->qm.io_base + HZIP_CORE_INT_SOURCE);
writel             45 drivers/crypto/inside-secure/safexcel.c 		writel(0, priv->base + EIP197_FLUE_IFC_LUT(i));
writel             52 drivers/crypto/inside-secure/safexcel.c 		writel(0, priv->base + EIP197_FLUE_CACHEBASE_LO(i));
writel             53 drivers/crypto/inside-secure/safexcel.c 		writel(0, priv->base + EIP197_FLUE_CACHEBASE_HI(i));
writel             54 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_FLUE_CONFIG_MAGIC,
writel             57 drivers/crypto/inside-secure/safexcel.c 	writel(0, priv->base + EIP197_FLUE_OFFSETS);
writel             58 drivers/crypto/inside-secure/safexcel.c 	writel(0, priv->base + EIP197_FLUE_ARC4_OFFSET);
writel             72 drivers/crypto/inside-secure/safexcel.c 		writel(val, priv->base + EIP197_CS_RAM_CTRL);
writel             94 drivers/crypto/inside-secure/safexcel.c 		writel((addrmid | (addrlo << 16)) & probemask,
writel            100 drivers/crypto/inside-secure/safexcel.c 		writel((addrlo | (addrhi << 16)) & probemask,
writel            130 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_CS_RC_NEXT(EIP197_RC_NULL) |
writel            139 drivers/crypto/inside-secure/safexcel.c 		writel(val, priv->base + offset + 4);
writel            141 drivers/crypto/inside-secure/safexcel.c 		writel(0, priv->base + offset + 8);
writel            142 drivers/crypto/inside-secure/safexcel.c 		writel(0, priv->base + offset + 12);
writel            148 drivers/crypto/inside-secure/safexcel.c 		writel(GENMASK(29, 0),
writel            170 drivers/crypto/inside-secure/safexcel.c 	writel(val, priv->base + EIP197_CS_RAM_CTRL);
writel            175 drivers/crypto/inside-secure/safexcel.c 	writel(0, priv->base + EIP197_TRC_ECCCTRL);
writel            183 drivers/crypto/inside-secure/safexcel.c 	writel(val, priv->base + EIP197_TRC_PARAMS);
writel            196 drivers/crypto/inside-secure/safexcel.c 	writel(val, priv->base + EIP197_TRC_PARAMS);
writel            202 drivers/crypto/inside-secure/safexcel.c 	writel(0, priv->base + EIP197_TRC_ECCCTRL);
writel            234 drivers/crypto/inside-secure/safexcel.c 	writel(val, priv->base + EIP197_CS_RAM_CTRL);
writel            239 drivers/crypto/inside-secure/safexcel.c 	writel(val, priv->base + EIP197_TRC_FREECHAIN);
writel            244 drivers/crypto/inside-secure/safexcel.c 	writel(val, priv->base + EIP197_TRC_PARAMS2);
writel            250 drivers/crypto/inside-secure/safexcel.c 	writel(val, priv->base + EIP197_TRC_PARAMS);
writel            263 drivers/crypto/inside-secure/safexcel.c 		writel(3, EIP197_PE(priv) + EIP197_PE_ICE_PUTF_CTRL(pe));
writel            264 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_PE(priv) + EIP197_PE_ICE_PPTF_CTRL(pe));
writel            272 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_PE(priv) + EIP197_PE_ICE_SCRATCH_CTRL(pe));
writel            276 drivers/crypto/inside-secure/safexcel.c 			writel(0, EIP197_PE(priv) +
writel            280 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_PE_ICE_x_CTRL_SW_RESET |
writel            286 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_PE_ICE_x_CTRL_SW_RESET |
writel            292 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_PE_ICE_RAM_CTRL_FPP_PROG_EN,
writel            306 drivers/crypto/inside-secure/safexcel.c 		writel(be32_to_cpu(data[i]),
writel            352 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_PE(priv) + EIP197_PE_ICE_RAM_CTRL(pe));
writel            361 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_PE(priv) + EIP197_PE_ICE_FPP_CTRL(pe));
writel            370 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_PE(priv) + EIP197_PE_ICE_PUE_CTRL(pe));
writel            426 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_PE_ICE_RAM_CTRL_PUE_PROG_EN,
writel            477 drivers/crypto/inside-secure/safexcel.c 		writel(lower_32_bits(priv->ring[i].cdr.base_dma),
writel            479 drivers/crypto/inside-secure/safexcel.c 		writel(upper_32_bits(priv->ring[i].cdr.base_dma),
writel            482 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_xDR_DESC_MODE_64BIT | (priv->config.cd_offset << 16) |
writel            485 drivers/crypto/inside-secure/safexcel.c 		writel(((cd_fetch_cnt *
writel            493 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_HIA_CDR(priv, i) + EIP197_HIA_xDR_DMA_CFG);
writel            496 drivers/crypto/inside-secure/safexcel.c 		writel(GENMASK(5, 0),
writel            525 drivers/crypto/inside-secure/safexcel.c 		writel(lower_32_bits(priv->ring[i].rdr.base_dma),
writel            527 drivers/crypto/inside-secure/safexcel.c 		writel(upper_32_bits(priv->ring[i].rdr.base_dma),
writel            530 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_xDR_DESC_MODE_64BIT | (priv->config.rd_offset << 16) |
writel            534 drivers/crypto/inside-secure/safexcel.c 		writel(((rd_fetch_cnt *
writel            543 drivers/crypto/inside-secure/safexcel.c 		writel(val,
writel            547 drivers/crypto/inside-secure/safexcel.c 		writel(GENMASK(7, 0),
writel            553 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_HIA_AIC_R(priv) + EIP197_HIA_AIC_R_ENABLE_CTRL(i));
writel            574 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
writel            578 drivers/crypto/inside-secure/safexcel.c 	writel(EIP197_MST_CTRL_RD_CACHE(RD_CACHE_4BITS) |
writel            585 drivers/crypto/inside-secure/safexcel.c 	writel(0, EIP197_HIA_AIC_G(priv) + EIP197_HIA_AIC_G_ENABLE_CTRL);
writel            588 drivers/crypto/inside-secure/safexcel.c 	writel(GENMASK(31, 0), EIP197_HIA_AIC_G(priv) + EIP197_HIA_AIC_G_ACK);
writel            595 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_DxE_THR_CTRL_RESET_PE,
writel            600 drivers/crypto/inside-secure/safexcel.c 			writel(EIP197_HIA_RA_PE_CTRL_RESET,
writel            611 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_HIA_DFE(priv) + EIP197_HIA_DFE_CFG(pe));
writel            614 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_DFE_THR(priv) + EIP197_HIA_DFE_THR_CTRL(pe));
writel            617 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_PE_IN_xBUF_THRES_MIN(6) |
writel            620 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_PE_IN_xBUF_THRES_MIN(6) |
writel            626 drivers/crypto/inside-secure/safexcel.c 			writel(EIP197_HIA_RA_PE_CTRL_EN |
writel            633 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_DxE_THR_CTRL_RESET_PE,
writel            652 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_HIA_DSE(priv) + EIP197_HIA_DSE_CFG(pe));
writel            655 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_DSE_THR(priv) + EIP197_HIA_DSE_THR_CTRL(pe));
writel            658 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_PE_OUT_DBUF_THRES_MIN(7) |
writel            668 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_PE(priv) + EIP197_PE_EIP96_TOKEN_CTRL(pe));
writel            671 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_FUNCTION_ALL,
writel            673 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_FUNCTION_ALL,
writel            680 drivers/crypto/inside-secure/safexcel.c 		writel(GENMASK(31, 0),
writel            684 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_CDR(priv, i) + EIP197_HIA_xDR_CFG);
writel            687 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_xDR_PREP_CLR_COUNT,
writel            691 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_xDR_PROC_CLR_COUNT,
writel            694 drivers/crypto/inside-secure/safexcel.c 		writel(0,
writel            696 drivers/crypto/inside-secure/safexcel.c 		writel(0,
writel            699 drivers/crypto/inside-secure/safexcel.c 		writel((EIP197_DEFAULT_RING_SIZE * priv->config.cd_offset) << 2,
writel            706 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_RDR(priv, i) + EIP197_HIA_xDR_CFG);
writel            709 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_xDR_PREP_CLR_COUNT,
writel            713 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_xDR_PROC_CLR_COUNT,
writel            716 drivers/crypto/inside-secure/safexcel.c 		writel(0,
writel            718 drivers/crypto/inside-secure/safexcel.c 		writel(0,
writel            722 drivers/crypto/inside-secure/safexcel.c 		writel((EIP197_DEFAULT_RING_SIZE * priv->config.rd_offset) << 2,
writel            728 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_DxE_THR_CTRL_EN | GENMASK(priv->config.rings - 1, 0),
writel            732 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_DxE_THR_CTRL_EN | GENMASK(priv->config.rings - 1, 0),
writel            737 drivers/crypto/inside-secure/safexcel.c 	writel(GENMASK(30, 20), EIP197_HIA_AIC_G(priv) + EIP197_HIA_AIC_G_ACK);
writel            764 drivers/crypto/inside-secure/safexcel.c 	writel(EIP197_HIA_RDR_THRESH_PKT_MODE |
writel            839 drivers/crypto/inside-secure/safexcel.c 	writel((rdesc * priv->config.rd_offset) << 2,
writel            843 drivers/crypto/inside-secure/safexcel.c 	writel((cdesc * priv->config.cd_offset) << 2,
writel           1005 drivers/crypto/inside-secure/safexcel.c 		writel(EIP197_xDR_PROC_xD_PKT(i) |
writel           1067 drivers/crypto/inside-secure/safexcel.c 		writel(stat & 0xff,
writel           1072 drivers/crypto/inside-secure/safexcel.c 	writel(status, EIP197_HIA_AIC_R(priv) + EIP197_HIA_AIC_R_ACK(ring));
writel           1364 drivers/crypto/inside-secure/safexcel.c 		writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
writel           1537 drivers/crypto/inside-secure/safexcel.c 		writel(GENMASK(5, 0), EIP197_HIA_CDR(priv, i) + EIP197_HIA_xDR_STAT);
writel           1538 drivers/crypto/inside-secure/safexcel.c 		writel(GENMASK(7, 0), EIP197_HIA_RDR(priv, i) + EIP197_HIA_xDR_STAT);
writel           1541 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_CDR(priv, i) + EIP197_HIA_xDR_RING_BASE_ADDR_LO);
writel           1542 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_CDR(priv, i) + EIP197_HIA_xDR_RING_BASE_ADDR_HI);
writel           1545 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_RDR(priv, i) + EIP197_HIA_xDR_RING_BASE_ADDR_LO);
writel           1546 drivers/crypto/inside-secure/safexcel.c 		writel(0, EIP197_HIA_RDR(priv, i) + EIP197_HIA_xDR_RING_BASE_ADDR_HI);
writel           1727 drivers/crypto/inside-secure/safexcel.c 			writel(EIP197_XLX_USER_VECT_LUT0_IDENT,
writel           1729 drivers/crypto/inside-secure/safexcel.c 			writel(EIP197_XLX_USER_VECT_LUT1_IDENT,
writel           1731 drivers/crypto/inside-secure/safexcel.c 			writel(EIP197_XLX_USER_VECT_LUT2_IDENT,
writel           1733 drivers/crypto/inside-secure/safexcel.c 			writel(EIP197_XLX_USER_VECT_LUT3_IDENT,
writel           1737 drivers/crypto/inside-secure/safexcel.c 			writel(GENMASK(31, 0),
writel           1747 drivers/crypto/inside-secure/safexcel.c 		writel(1, priv->base + EIP197_XLX_GPIO_BASE);
writel           1750 drivers/crypto/inside-secure/safexcel.c 		writel(0, priv->base + EIP197_XLX_GPIO_BASE);
writel            134 drivers/crypto/marvell/cesa.c 		writel(~status, engine->regs + CESA_SA_FPGA_INT_STATUS);
writel            135 drivers/crypto/marvell/cesa.c 		writel(~status, engine->regs + CESA_SA_INT_STATUS);
writel            322 drivers/crypto/marvell/cesa.c 		writel(0, iobase + CESA_TDMA_WINDOW_CTRL(i));
writel            323 drivers/crypto/marvell/cesa.c 		writel(0, iobase + CESA_TDMA_WINDOW_BASE(i));
writel            329 drivers/crypto/marvell/cesa.c 		writel(((cs->size - 1) & 0xffff0000) |
writel            333 drivers/crypto/marvell/cesa.c 		writel(cs->base, iobase + CESA_TDMA_WINDOW_BASE(i));
writel            538 drivers/crypto/marvell/cesa.c 		writel(0, engine->regs + CESA_SA_INT_STATUS);
writel            539 drivers/crypto/marvell/cesa.c 		writel(CESA_SA_CFG_STOP_DIG_ERR,
writel            541 drivers/crypto/marvell/cesa.c 		writel(engine->sram_dma & CESA_SA_SRAM_MSK,
writel            111 drivers/crypto/marvell/cipher.c 	writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
writel            250 drivers/crypto/marvell/hash.c 	writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
writel             55 drivers/crypto/marvell/tdma.c 	writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
writel            123 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DFE_THR_CTRL);
writel            124 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DSE_THR_CTRL);
writel            136 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DFSE_MIN_DATA(ipbuf - 1) |
writel            142 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DFSE_MIN_DATA(opbuf - 1) |
writel            146 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_IN_BUF_MIN_THRESH(ipbuf - 1) |
writel            150 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_IN_BUF_MIN_THRESH(itbuf - 1) |
writel            154 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_OUT_BUF_MIN_THRESH(opbuf - 1) |
writel            158 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + PE_OUT_TBUF_THRESH);
writel            159 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + PE_OUT_BUF_CTRL);
writel            177 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + DFE_THR_CTRL);
writel            178 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + DSE_THR_CTRL);
writel            191 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DFSE_THR_CTRL_RESET, cryp->base + DFE_THR_CTRL);
writel            192 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DFE_PRIO_0);
writel            193 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DFE_PRIO_1);
writel            194 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DFE_PRIO_2);
writel            195 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DFE_PRIO_3);
writel            197 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DFSE_THR_CTRL_RESET, cryp->base + DSE_THR_CTRL);
writel            198 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DSE_PRIO_0);
writel            199 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DSE_PRIO_1);
writel            200 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DSE_PRIO_2);
writel            201 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + DSE_PRIO_3);
writel            218 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + CDR_CFG(i));
writel            221 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_CNT_RST, cryp->base + CDR_PREP_COUNT(i));
writel            222 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_CNT_RST, cryp->base + CDR_PROC_COUNT(i));
writel            224 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + CDR_PREP_PNTR(i));
writel            225 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + CDR_PROC_PNTR(i));
writel            226 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + CDR_DMA_CFG(i));
writel            229 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + CDR_BASE_ADDR_HI(i));
writel            230 drivers/crypto/mediatek/mtk-platform.c 	writel(cryp->ring[i]->cmd_dma, cryp->base + CDR_BASE_ADDR_LO(i));
writel            232 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DESC_RING_SZ, cryp->base + CDR_RING_SIZE(i));
writel            235 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_CDR_STAT_CLR, cryp->base + CDR_STAT(i));
writel            241 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DESC_SIZE(MTK_DESC_SZ) |
writel            246 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DESC_FETCH_SIZE(count * MTK_DESC_OFF) |
writel            258 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + RDR_CFG(i));
writel            261 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_CNT_RST, cryp->base + RDR_PREP_COUNT(i));
writel            262 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_CNT_RST, cryp->base + RDR_PROC_COUNT(i));
writel            264 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + RDR_PREP_PNTR(i));
writel            265 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + RDR_PROC_PNTR(i));
writel            266 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + RDR_DMA_CFG(i));
writel            269 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + RDR_BASE_ADDR_HI(i));
writel            270 drivers/crypto/mediatek/mtk-platform.c 	writel(cryp->ring[i]->res_dma, cryp->base + RDR_BASE_ADDR_LO(i));
writel            272 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DESC_RING_SZ, cryp->base + RDR_RING_SIZE(i));
writel            273 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_RDR_STAT_CLR, cryp->base + RDR_STAT(i));
writel            280 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE,
writel            288 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DESC_SIZE(MTK_DESC_SZ) | MTK_DESC_OFFSET(MTK_DESC_OFF),
writel            295 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_DESC_FETCH_SIZE(count * MTK_DESC_OFF) |
writel            315 drivers/crypto/mediatek/mtk-platform.c 	writel(0, cryp->base + EIP97_MST_CTRL);
writel            321 drivers/crypto/mediatek/mtk-platform.c 	writel(val, cryp->base + HIA_MST_CTRL);
writel            339 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_PE_TK_LOC_AVL | MTK_PE_PROC_HELD | MTK_PE_TK_TIMEOUT_EN,
writel            343 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_AIC_G_CLR, cryp->base + AIC_G_ACK);
writel            344 drivers/crypto/mediatek/mtk-platform.c 	writel(MTK_PE_INPUT_DMA_ERR | MTK_PE_OUTPUT_DMA_ERR |
writel            390 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_G_ENABLE_CTRL);
writel            391 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_G_POL_CTRL);
writel            392 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_G_TYPE_CTRL);
writel            393 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_G_ENABLE_SET);
writel            395 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_ENABLE_CTRL(hw));
writel            396 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_POL_CTRL(hw));
writel            397 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_TYPE_CTRL(hw));
writel            398 drivers/crypto/mediatek/mtk-platform.c 		writel(0, cryp->base + AIC_ENABLE_SET(hw));
writel            183 drivers/crypto/mxs-dcp.c 	writel(0xffffffff, sdcp->base + MXS_DCP_CH_N_STAT_CLR(chan));
writel            186 drivers/crypto/mxs-dcp.c 	writel(desc_phys, sdcp->base + MXS_DCP_CH_N_CMDPTR(chan));
writel            189 drivers/crypto/mxs-dcp.c 	writel(1, sdcp->base + MXS_DCP_CH_N_SEMA(chan));
writel            972 drivers/crypto/mxs-dcp.c 	writel(stat, sdcp->base + MXS_DCP_STAT_CLR);
writel           1054 drivers/crypto/mxs-dcp.c 	writel(MXS_DCP_CTRL_GATHER_RESIDUAL_WRITES |
writel           1059 drivers/crypto/mxs-dcp.c 	writel(MXS_DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK,
writel           1069 drivers/crypto/mxs-dcp.c 	writel(0xffff0000, sdcp->base + MXS_DCP_CONTEXT);
writel           1071 drivers/crypto/mxs-dcp.c 		writel(0xffffffff, sdcp->base + MXS_DCP_CH_N_STAT_CLR(i));
writel           1072 drivers/crypto/mxs-dcp.c 	writel(0xffffffff, sdcp->base + MXS_DCP_STAT_CLR);
writel            216 drivers/crypto/picoxcell_crypto.c 		writel(*src32++, dst++);
writel            249 drivers/crypto/picoxcell_crypto.c 	writel(ciph_len | (indx << SPA_KEY_SZ_CTX_INDEX_OFFSET) |
writel            255 drivers/crypto/picoxcell_crypto.c 		writel(hash_len | (indx << SPA_KEY_SZ_CTX_INDEX_OFFSET),
writel            573 drivers/crypto/picoxcell_crypto.c 	writel(req->src_addr, engine->regs + SPA_SRC_PTR_REG_OFFSET);
writel            574 drivers/crypto/picoxcell_crypto.c 	writel(req->dst_addr, engine->regs + SPA_DST_PTR_REG_OFFSET);
writel            575 drivers/crypto/picoxcell_crypto.c 	writel(0, engine->regs + SPA_OFFSET_REG_OFFSET);
writel            587 drivers/crypto/picoxcell_crypto.c 	writel(proc_len, engine->regs + SPA_PROC_LEN_REG_OFFSET);
writel            588 drivers/crypto/picoxcell_crypto.c 	writel(assoc_len, engine->regs + SPA_AAD_LEN_REG_OFFSET);
writel            589 drivers/crypto/picoxcell_crypto.c 	writel(authsize, engine->regs + SPA_ICV_LEN_REG_OFFSET);
writel            590 drivers/crypto/picoxcell_crypto.c 	writel(0, engine->regs + SPA_ICV_OFFSET_REG_OFFSET);
writel            591 drivers/crypto/picoxcell_crypto.c 	writel(0, engine->regs + SPA_AUX_INFO_REG_OFFSET);
writel            602 drivers/crypto/picoxcell_crypto.c 	writel(ctrl, engine->regs + SPA_CTRL_REG_OFFSET);
writel            890 drivers/crypto/picoxcell_crypto.c 	writel(req->src_addr, engine->regs + SPA_SRC_PTR_REG_OFFSET);
writel            891 drivers/crypto/picoxcell_crypto.c 	writel(req->dst_addr, engine->regs + SPA_DST_PTR_REG_OFFSET);
writel            892 drivers/crypto/picoxcell_crypto.c 	writel(0, engine->regs + SPA_OFFSET_REG_OFFSET);
writel            894 drivers/crypto/picoxcell_crypto.c 	writel(ablk_req->nbytes, engine->regs + SPA_PROC_LEN_REG_OFFSET);
writel            895 drivers/crypto/picoxcell_crypto.c 	writel(0, engine->regs + SPA_ICV_OFFSET_REG_OFFSET);
writel            896 drivers/crypto/picoxcell_crypto.c 	writel(0, engine->regs + SPA_AUX_INFO_REG_OFFSET);
writel            897 drivers/crypto/picoxcell_crypto.c 	writel(0, engine->regs + SPA_AAD_LEN_REG_OFFSET);
writel            905 drivers/crypto/picoxcell_crypto.c 	writel(ctrl, engine->regs + SPA_CTRL_REG_OFFSET);
writel           1083 drivers/crypto/picoxcell_crypto.c 		writel(~0, engine->regs + SPA_STAT_POP_REG_OFFSET);
writel           1122 drivers/crypto/picoxcell_crypto.c 	writel(spacc_irq_stat, engine->regs + SPA_IRQ_STAT_REG_OFFSET);
writel           1222 drivers/crypto/picoxcell_crypto.c 	writel(engine->stat_irq_thresh << SPA_IRQ_CTRL_STAT_CNT_OFFSET,
writel           1717 drivers/crypto/picoxcell_crypto.c 	writel(engine->stat_irq_thresh << SPA_IRQ_CTRL_STAT_CNT_OFFSET,
writel           1719 drivers/crypto/picoxcell_crypto.c 	writel(SPA_IRQ_EN_STAT_EN | SPA_IRQ_EN_GLBL_EN,
writel             27 drivers/crypto/qce/common.c 	writel(val, qce->base + offset);
writel            115 drivers/crypto/qcom-rng.c 	writel(val, rng->base + PRNG_LFSR_CFG);
writel            119 drivers/crypto/qcom-rng.c 	writel(val, rng->base + PRNG_CONFIG);
writel            233 drivers/crypto/sahara.c 	writel(data, dev->regs_base + reg);
writel             48 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 		writel(*(op->key + i / 4), ss->base + SS_KEY0 + i);
writel             53 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 			writel(v, ss->base + SS_IV0 + i * 4);
writel             56 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 	writel(mode, ss->base + SS_CTL);
writel            114 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 	writel(0, ss->base + SS_CTL);
writel            210 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 		writel(*(op->key + i / 4), ss->base + SS_KEY0 + i);
writel            215 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 			writel(v, ss->base + SS_IV0 + i * 4);
writel            218 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 	writel(mode, ss->base + SS_CTL);
writel            340 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c 	writel(0, ss->base + SS_CTL);
writel            334 drivers/crypto/sunxi-ss/sun4i-ss-core.c 	writel(SS_ENABLED, ss->base + SS_CTL);
writel            339 drivers/crypto/sunxi-ss/sun4i-ss-core.c 	writel(0, ss->base + SS_CTL);
writel            418 drivers/crypto/sunxi-ss/sun4i-ss-core.c 	writel(0, ss->base + SS_CTL);
writel            220 drivers/crypto/sunxi-ss/sun4i-ss-hash.c 			writel(op->hash[i], ss->base + SS_IV0 + i * 4);
writel            223 drivers/crypto/sunxi-ss/sun4i-ss-hash.c 	writel(op->mode | SS_ENABLED | ivmode, ss->base + SS_CTL);
writel            347 drivers/crypto/sunxi-ss/sun4i-ss-hash.c 	writel(op->mode | SS_ENABLED | SS_DATA_END, ss->base + SS_CTL);
writel            438 drivers/crypto/sunxi-ss/sun4i-ss-hash.c 	writel(op->mode | SS_ENABLED | SS_DATA_END, ss->base + SS_CTL);
writel            481 drivers/crypto/sunxi-ss/sun4i-ss-hash.c 	writel(0, ss->base + SS_CTL);
writel             33 drivers/crypto/sunxi-ss/sun4i-ss-prng.c 	writel(mode, ss->base + SS_CTL);
writel             38 drivers/crypto/sunxi-ss/sun4i-ss-prng.c 			writel(ss->seed[i], ss->base + SS_KEY0 + i * 4);
writel             53 drivers/crypto/sunxi-ss/sun4i-ss-prng.c 	writel(0, ss->base + SS_CTL);
writel            416 drivers/crypto/ux500/cryp/cryp_core.c 	writel(control_register |
writel            518 drivers/dma/amba-pl08x.c 	writel(ccfg, phychan->reg_config);
writel            560 drivers/dma/amba-pl08x.c 		writel(val | FTDMAC020_CH_CSR_EN,
writel            568 drivers/dma/amba-pl08x.c 		writel(val | PL080_CONFIG_ENABLE, phychan->reg_config);
writel            591 drivers/dma/amba-pl08x.c 		writel(val, ch->reg_control);
writel            598 drivers/dma/amba-pl08x.c 	writel(val, ch->reg_config);
writel            618 drivers/dma/amba-pl08x.c 		writel(val, ch->reg_control);
writel            625 drivers/dma/amba-pl08x.c 	writel(val, ch->reg_config);
writel            646 drivers/dma/amba-pl08x.c 		writel(val, ch->reg_config);
writel            652 drivers/dma/amba-pl08x.c 		writel(val, ch->reg_control);
writel            655 drivers/dma/amba-pl08x.c 		writel(BIT(ch->id) | BIT(ch->id + 16),
writel            657 drivers/dma/amba-pl08x.c 		writel(BIT(ch->id), pl08x->base + PL080_TC_CLEAR);
writel            665 drivers/dma/amba-pl08x.c 	writel(val, ch->reg_config);
writel            667 drivers/dma/amba-pl08x.c 	writel(BIT(ch->id), pl08x->base + PL080_ERR_CLEAR);
writel            668 drivers/dma/amba-pl08x.c 	writel(BIT(ch->id), pl08x->base + PL080_TC_CLEAR);
writel           2286 drivers/dma/amba-pl08x.c 		writel(PL080_CONFIG_ENABLE, pl08x->base + FTDMAC020_CSR);
writel           2289 drivers/dma/amba-pl08x.c 	writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG);
writel           2302 drivers/dma/amba-pl08x.c 		writel(err, pl08x->base + PL080_ERR_CLEAR);
writel           2306 drivers/dma/amba-pl08x.c 		writel(tc, pl08x->base + PL080_TC_CLEAR);
writel           2855 drivers/dma/amba-pl08x.c 		writel(0x0000FFFF, pl08x->base + PL080_ERR_CLEAR);
writel           2857 drivers/dma/amba-pl08x.c 		writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR);
writel           2858 drivers/dma/amba-pl08x.c 	writel(0x000000FF, pl08x->base + PL080_TC_CLEAR);
writel            425 drivers/dma/bcm2835-dma.c 	writel(0, chan_base + BCM2835_DMA_CS);
writel            437 drivers/dma/bcm2835-dma.c 	writel(BCM2835_DMA_RESET, chan_base + BCM2835_DMA_CS);
writel            454 drivers/dma/bcm2835-dma.c 	writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
writel            455 drivers/dma/bcm2835-dma.c 	writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
writel            482 drivers/dma/bcm2835-dma.c 	writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE,
writel           1448 drivers/dma/coh901318.c 	writel(control,
writel           1459 drivers/dma/coh901318.c 	writel(conf,
writel           1479 drivers/dma/coh901318.c 	writel(val, virtbase + COH901318_CX_CFG +
writel           1495 drivers/dma/coh901318.c 	writel(lli->src_addr,
writel           1499 drivers/dma/coh901318.c 	writel(lli->dst_addr, virtbase +
writel           1503 drivers/dma/coh901318.c 	writel(lli->link_addr, virtbase + COH901318_CX_LNK_ADDR +
writel           1506 drivers/dma/coh901318.c 	writel(lli->control, virtbase + COH901318_CX_CTRL +
writel           1705 drivers/dma/coh901318.c 	writel(val, virtbase + COH901318_CX_CFG +
writel           1707 drivers/dma/coh901318.c 	writel(val, virtbase + COH901318_CX_CFG +
writel           1747 drivers/dma/coh901318.c 		writel(val, cohc->base->virtbase + COH901318_CX_CFG +
writel           1814 drivers/dma/coh901318.c 		writel(1 << channel, virtbase + COH901318_BE_INT_CLEAR1);
writel           1815 drivers/dma/coh901318.c 		writel(1 << channel, virtbase + COH901318_TC_INT_CLEAR1);
writel           1817 drivers/dma/coh901318.c 		writel(1 << (channel - 32), virtbase +
writel           1819 drivers/dma/coh901318.c 		writel(1 << (channel - 32), virtbase +
writel           2110 drivers/dma/coh901318.c 		writel(1 << cohc->id, virtbase + COH901318_BE_INT_CLEAR1);
writel           2111 drivers/dma/coh901318.c 		writel(1 << cohc->id, virtbase + COH901318_TC_INT_CLEAR1);
writel           2113 drivers/dma/coh901318.c 		writel(1 << (cohc->id - 32), virtbase +
writel           2115 drivers/dma/coh901318.c 		writel(1 << (cohc->id - 32), virtbase +
writel           2181 drivers/dma/coh901318.c 	writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CFG +
writel           2183 drivers/dma/coh901318.c 	writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CTRL +
writel            160 drivers/dma/dma-axi-dmac.c 	writel(val, axi_dmac->base + reg);
writel            191 drivers/dma/dma-jz4780.c 	writel(val, jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn));
writel            203 drivers/dma/dma-jz4780.c 	writel(val, jzdma->ctrl_base + reg);
writel             32 drivers/dma/dw-edma/dw-edma-v0-core.c 	writel(value, &(__dw_regs(dw)->name))
writel             81 drivers/dma/dw-edma/dw-edma-v0-core.c 		writel(viewport_sel,
writel             83 drivers/dma/dw-edma/dw-edma-v0-core.c 		writel(value, addr);
writel             87 drivers/dma/dw-edma/dw-edma-v0-core.c 		writel(value, addr);
writel            106 drivers/dma/dw-edma/dw-edma-v0-core.c 		writel(viewport_sel,
writel            125 drivers/dma/dw-edma/dw-edma-v0-core.c 	writel(value, ll)
writel             85 drivers/dma/dw-edma/dw-edma-v0-debugfs.c 		writel(viewport_sel, &regs->type.legacy.viewport_sel);
writel            303 drivers/dma/dw/regs.h 	writel((val), &(__dwc_regs(dwc)->name))
writel            349 drivers/dma/dw/regs.h 	writel((val), &(__dw_regs(dw)->name))
writel            309 drivers/dma/ep93xx_dma.c 	writel(control, edmac->regs + M2P_CONTROL);
writel            322 drivers/dma/ep93xx_dma.c 	writel(data->port & 0xf, edmac->regs + M2P_PPALLOC);
writel            378 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2P_MAXCNT0);
writel            379 drivers/dma/ep93xx_dma.c 		writel(bus_addr, edmac->regs + M2P_BASE0);
writel            381 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2P_MAXCNT1);
writel            382 drivers/dma/ep93xx_dma.c 		writel(bus_addr, edmac->regs + M2P_BASE1);
writel            412 drivers/dma/ep93xx_dma.c 		writel(1, edmac->regs + M2P_INTERRUPT);
writel            464 drivers/dma/ep93xx_dma.c 		writel(control, edmac->regs + M2M_CONTROL);
writel            514 drivers/dma/ep93xx_dma.c 	writel(control, edmac->regs + M2M_CONTROL);
writel            521 drivers/dma/ep93xx_dma.c 	writel(0, edmac->regs + M2M_CONTROL);
writel            535 drivers/dma/ep93xx_dma.c 		writel(desc->src_addr, edmac->regs + M2M_SAR_BASE0);
writel            536 drivers/dma/ep93xx_dma.c 		writel(desc->dst_addr, edmac->regs + M2M_DAR_BASE0);
writel            537 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2M_BCR0);
writel            539 drivers/dma/ep93xx_dma.c 		writel(desc->src_addr, edmac->regs + M2M_SAR_BASE1);
writel            540 drivers/dma/ep93xx_dma.c 		writel(desc->dst_addr, edmac->regs + M2M_DAR_BASE1);
writel            541 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2M_BCR1);
writel            573 drivers/dma/ep93xx_dma.c 	writel(control, edmac->regs + M2M_CONTROL);
writel            581 drivers/dma/ep93xx_dma.c 		writel(control, edmac->regs + M2M_CONTROL);
writel            611 drivers/dma/ep93xx_dma.c 		writel(0, edmac->regs + M2M_INTERRUPT);
writel            641 drivers/dma/ep93xx_dma.c 				writel(control, edmac->regs + M2M_CONTROL);
writel            660 drivers/dma/ep93xx_dma.c 		writel(control, edmac->regs + M2M_CONTROL);
writel            107 drivers/dma/hsu/hsu.h 	writel(value, hsuc->reg + offset);
writel            159 drivers/dma/idma64.h 	writel(value, idma64c->regs + offset);
writel            205 drivers/dma/idma64.h 	writel(value, idma64->regs + offset);
writel            156 drivers/dma/img-mdc-dma.c 	writel(val, mdma->regs + reg);
writel            661 drivers/dma/imx-sdma.c 	writel(BIT(channel), sdma->regs + SDMA_H_START);
writel            148 drivers/dma/ioat/dca.c 			writel(id | IOAT_DCA_GREQID_VALID,
writel            174 drivers/dma/ioat/dca.c 			writel(0, ioatdca->iobase + global_req_table + (i * 4));
writel            693 drivers/dma/ioat/dma.c 	writel(lower_32_bits(ioat_chan->completion_dma),
writel            695 drivers/dma/ioat/dma.c 	writel(upper_32_bits(ioat_chan->completion_dma),
writel            852 drivers/dma/ioat/dma.c 	writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
writel            992 drivers/dma/ioat/dma.c 	writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
writel            350 drivers/dma/ioat/dma.h 	writel(addr & 0x00000000FFFFFFFF,
writel            352 drivers/dma/ioat/dma.h 	writel(addr >> 32,
writel            702 drivers/dma/ioat/init.c 	writel(((u64)ioat_chan->completion_dma) & 0x00000000FFFFFFFF,
writel            704 drivers/dma/ioat/init.c 	writel(((u64)ioat_chan->completion_dma) >> 32,
writel            730 drivers/dma/ioat/init.c 		writel(lat_val, ioat_chan->reg_base +
writel            736 drivers/dma/ioat/init.c 		writel(lat_val, ioat_chan->reg_base +
writel           1083 drivers/dma/ioat/init.c 			writel(errmask, ioat_chan->reg_base +
writel           1182 drivers/dma/ioat/init.c 		writel(IOAT_DMA_DCA_ANY_CPU,
writel           1261 drivers/dma/ioat/init.c 		writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
writel            276 drivers/dma/mediatek/mtk-hsdma.c 	writel(val, hsdma->base + reg);
writel            124 drivers/dma/mediatek/mtk-uart-apdma.c 	writel(val, c->base + reg);
writel            149 drivers/dma/mmp_pdma.c 	writel(addr, phy->base + reg);
writel            160 drivers/dma/mmp_pdma.c 	writel(DRCMR_MAPVLD | phy->idx, phy->base + reg);
writel            167 drivers/dma/mmp_pdma.c 	writel(dalgn, phy->base + DALGN);
writel            170 drivers/dma/mmp_pdma.c 	writel(readl(phy->base + reg) | DCSR_RUN, phy->base + reg);
writel            181 drivers/dma/mmp_pdma.c 	writel(readl(phy->base + reg) & ~DCSR_RUN, phy->base + reg);
writel            195 drivers/dma/mmp_pdma.c 	writel(dcsr, phy->base + reg);
writel            285 drivers/dma/mmp_pdma.c 	writel(0, pchan->phy->base + reg);
writel            145 drivers/dma/mmp_tdma.c 	writel(phys, tdmac->reg_base + TDNDPR);
writel            146 drivers/dma/mmp_tdma.c 	writel(readl(tdmac->reg_base + TDCR) | TDCR_FETCHND,
writel            153 drivers/dma/mmp_tdma.c 		writel(TDIMR_COMP, tdmac->reg_base + TDIMR);
writel            155 drivers/dma/mmp_tdma.c 		writel(0, tdmac->reg_base + TDIMR);
writel            161 drivers/dma/mmp_tdma.c 	writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
writel            174 drivers/dma/mmp_tdma.c 	writel(tdcr, tdmac->reg_base + TDCR);
writel            185 drivers/dma/mmp_tdma.c 	writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
writel            196 drivers/dma/mmp_tdma.c 	writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
writel            284 drivers/dma/mmp_tdma.c 	writel(tdcr, tdmac->reg_base + TDCR);
writel            295 drivers/dma/mmp_tdma.c 		writel(reg, tdmac->reg_base + TDISR);
writel            204 drivers/dma/moxart-dma.c 	writel(ctrl, ch->base + REG_OFF_CTRL);
writel            264 drivers/dma/moxart-dma.c 	writel(ctrl, ch->base + REG_OFF_CTRL);
writel            374 drivers/dma/moxart-dma.c 	writel(src_addr, ch->base + REG_OFF_ADDRESS_SOURCE);
writel            375 drivers/dma/moxart-dma.c 	writel(dst_addr, ch->base + REG_OFF_ADDRESS_DEST);
writel            389 drivers/dma/moxart-dma.c 	writel(d->dma_cycles, ch->base + REG_OFF_CYCLES);
writel            401 drivers/dma/moxart-dma.c 	writel(ctrl, ch->base + REG_OFF_CTRL);
writel            560 drivers/dma/moxart-dma.c 		writel(ctrl, ch->base + REG_OFF_CTRL);
writel            161 drivers/dma/mv_xor.c 	writel(BIT(0), XOR_ACTIVATION(chan));
writel            538 drivers/dma/mv_xor.c 	writel((addr & 0xffff0000) | (attr << 8) | target,
writel            540 drivers/dma/mv_xor.c 	writel(size & 0xffff0000, base + WINDOW_SIZE(i));
writel            548 drivers/dma/mv_xor.c 	writel(win_enable, base + WINDOW_BAR_ENABLE(0));
writel            549 drivers/dma/mv_xor.c 	writel(win_enable, base + WINDOW_BAR_ENABLE(1));
writel           1171 drivers/dma/mv_xor.c 		writel(0, base + WINDOW_BASE(i));
writel           1172 drivers/dma/mv_xor.c 		writel(0, base + WINDOW_SIZE(i));
writel           1174 drivers/dma/mv_xor.c 			writel(0, base + WINDOW_REMAP_HIGH(i));
writel           1180 drivers/dma/mv_xor.c 		writel((cs->base & 0xffff0000) |
writel           1183 drivers/dma/mv_xor.c 		writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
writel           1193 drivers/dma/mv_xor.c 	writel(win_enable, base + WINDOW_BAR_ENABLE(0));
writel           1194 drivers/dma/mv_xor.c 	writel(win_enable, base + WINDOW_BAR_ENABLE(1));
writel           1195 drivers/dma/mv_xor.c 	writel(0, base + WINDOW_OVERRIDE_CTRL(0));
writel           1196 drivers/dma/mv_xor.c 	writel(0, base + WINDOW_OVERRIDE_CTRL(1));
writel           1207 drivers/dma/mv_xor.c 		writel(0, base + WINDOW_BASE(i));
writel           1208 drivers/dma/mv_xor.c 		writel(0, base + WINDOW_SIZE(i));
writel           1210 drivers/dma/mv_xor.c 			writel(0, base + WINDOW_REMAP_HIGH(i));
writel           1216 drivers/dma/mv_xor.c 	writel(0xffff0000, base + WINDOW_SIZE(0));
writel           1220 drivers/dma/mv_xor.c 	writel(win_enable, base + WINDOW_BAR_ENABLE(0));
writel           1221 drivers/dma/mv_xor.c 	writel(win_enable, base + WINDOW_BAR_ENABLE(1));
writel           1222 drivers/dma/mv_xor.c 	writel(0, base + WINDOW_OVERRIDE_CTRL(0));
writel           1223 drivers/dma/mv_xor.c 	writel(0, base + WINDOW_OVERRIDE_CTRL(1));
writel            227 drivers/dma/mv_xor_v2.c 	writel(num_of_desc, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ADD_OFF);
writel            237 drivers/dma/mv_xor_v2.c 	writel(num_of_desc, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_DEALLOC_OFF);
writel            246 drivers/dma/mv_xor_v2.c 	writel(MV_XOR_V2_DMA_DESQ_CTRL_128B,
writel            265 drivers/dma/mv_xor_v2.c 	writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);
writel            271 drivers/dma/mv_xor_v2.c 	writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
writel            617 drivers/dma/mv_xor_v2.c 	writel(msg->address_lo,
writel            619 drivers/dma/mv_xor_v2.c 	writel(msg->address_hi & 0xFFFF,
writel            621 drivers/dma/mv_xor_v2.c 	writel(msg->data,
writel            630 drivers/dma/mv_xor_v2.c 	writel(MV_XOR_V2_DESC_NUM,
writel            634 drivers/dma/mv_xor_v2.c 	writel(lower_32_bits(xor_dev->hw_desq),
writel            636 drivers/dma/mv_xor_v2.c 	writel(upper_32_bits(xor_dev->hw_desq),
writel            652 drivers/dma/mv_xor_v2.c 	writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ARATTR_OFF);
writel            658 drivers/dma/mv_xor_v2.c 	writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_AWATTR_OFF);
writel            675 drivers/dma/mv_xor_v2.c 	writel(reg, xor_dev->glob_base + MV_XOR_V2_GLOB_BW_CTRL);
writel            680 drivers/dma/mv_xor_v2.c 	writel(reg, xor_dev->glob_base + MV_XOR_V2_GLOB_PAUSE);
writel            683 drivers/dma/mv_xor_v2.c 	writel(0, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF);
writel            693 drivers/dma/mv_xor_v2.c 	writel(0x1, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF);
writel            220 drivers/dma/mxs-dma.c 		writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL),
writel            245 drivers/dma/mxs-dma.c 		writel(1 << (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL),
writel            259 drivers/dma/mxs-dma.c 	writel(mxs_chan->ccw_phys,
writel            268 drivers/dma/mxs-dma.c 		writel(2, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id));
writel            270 drivers/dma/mxs-dma.c 		writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id));
writel            290 drivers/dma/mxs-dma.c 		writel(1 << chan_id,
writel            293 drivers/dma/mxs-dma.c 		writel(1 << chan_id,
writel            308 drivers/dma/mxs-dma.c 		writel(1 << chan_id,
writel            311 drivers/dma/mxs-dma.c 		writel(1 << chan_id,
writel            357 drivers/dma/mxs-dma.c 	writel((1 << chan),
writel            372 drivers/dma/mxs-dma.c 	writel((1 << chan),
writel            396 drivers/dma/mxs-dma.c 				writel(1, mxs_dma->base +
writel            706 drivers/dma/mxs-dma.c 		writel(BM_APBH_CTRL0_APB_BURST_EN,
writel            708 drivers/dma/mxs-dma.c 		writel(BM_APBH_CTRL0_APB_BURST8_EN,
writel            713 drivers/dma/mxs-dma.c 	writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS,
writel            241 drivers/dma/owl-dma.c 	writel(val, pchan->base + reg);
writel            246 drivers/dma/owl-dma.c 	writel(data, pchan->base + reg);
writel            265 drivers/dma/owl-dma.c 	writel(val, od->base + reg);
writel            270 drivers/dma/owl-dma.c 	writel(data, od->base + reg);
writel            113 drivers/dma/pch_dma.c 	writel((val), (pdc)->membase + PDC_##name)
writel            135 drivers/dma/pch_dma.c 	writel((val), (pd)->membase + PCH_DMA_##name)
writel            893 drivers/dma/pl330.c 	writel(val, regs + DBGINST0);
writel            896 drivers/dma/pl330.c 	writel(val, regs + DBGINST1);
writel            905 drivers/dma/pl330.c 	writel(0, regs + DBGCMD);
writel            987 drivers/dma/pl330.c 		writel(1 << thrd->ev, regs + INTCLR);
writel            989 drivers/dma/pl330.c 	writel(inten & ~(1 << thrd->ev), regs + INTEN);
writel           1041 drivers/dma/pl330.c 	writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN);
writel           1680 drivers/dma/pl330.c 				writel(1 << ev, regs + INTCLR);
writel            158 drivers/dma/pxa_dma.c 		writel((val), (phy)->base + _reg((phy)->idx));		\
writel            676 drivers/dma/qcom/hidma.c 		writel(msg->address_lo, dmadev->dev_evca + 0x118);
writel            677 drivers/dma/qcom/hidma.c 		writel(msg->address_hi, dmadev->dev_evca + 0x11C);
writel            678 drivers/dma/qcom/hidma.c 		writel(msg->data, dmadev->dev_evca + 0x120);
writel            294 drivers/dma/qcom/hidma_ll.c 		writel(evre_read_off, lldev->evca + HIDMA_EVCA_DOORBELL_REG);
writel            320 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->trca + HIDMA_TRCA_CTRLSTS_REG);
writel            337 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->evca + HIDMA_EVCA_CTRLSTS_REG);
writel            395 drivers/dma/qcom/hidma_ll.c 		writel(cause, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel            466 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->evca + HIDMA_EVCA_CTRLSTS_REG);
writel            479 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->trca + HIDMA_TRCA_CTRLSTS_REG);
writel            493 drivers/dma/qcom/hidma_ll.c 	writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            503 drivers/dma/qcom/hidma_ll.c 	writel(lldev->tre_write_offset, lldev->trca + HIDMA_TRCA_DOORBELL_REG);
writel            563 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->trca + HIDMA_TRCA_CTRLSTS_REG);
writel            578 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->evca + HIDMA_EVCA_CTRLSTS_REG);
writel            594 drivers/dma/qcom/hidma_ll.c 	writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            646 drivers/dma/qcom/hidma_ll.c 	writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            650 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel            661 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel            664 drivers/dma/qcom/hidma_ll.c 	writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            667 drivers/dma/qcom/hidma_ll.c 	writel(lower_32_bits(addr), lldev->trca + HIDMA_TRCA_RING_LOW_REG);
writel            668 drivers/dma/qcom/hidma_ll.c 	writel(upper_32_bits(addr), lldev->trca + HIDMA_TRCA_RING_HIGH_REG);
writel            669 drivers/dma/qcom/hidma_ll.c 	writel(lldev->tre_ring_size, lldev->trca + HIDMA_TRCA_RING_LEN_REG);
writel            672 drivers/dma/qcom/hidma_ll.c 	writel(lower_32_bits(addr), lldev->evca + HIDMA_EVCA_RING_LOW_REG);
writel            673 drivers/dma/qcom/hidma_ll.c 	writel(upper_32_bits(addr), lldev->evca + HIDMA_EVCA_RING_HIGH_REG);
writel            674 drivers/dma/qcom/hidma_ll.c 	writel(HIDMA_EVRE_SIZE * nr_tres,
writel            694 drivers/dma/qcom/hidma_ll.c 	writel(0, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel            695 drivers/dma/qcom/hidma_ll.c 	writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            702 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->evca + HIDMA_EVCA_INTCTRL_REG);
writel            705 drivers/dma/qcom/hidma_ll.c 	writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel            706 drivers/dma/qcom/hidma_ll.c 	writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            797 drivers/dma/qcom/hidma_ll.c 	writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            829 drivers/dma/qcom/hidma_ll.c 	writel(val, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel            830 drivers/dma/qcom/hidma_ll.c 	writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
writel            125 drivers/dma/qcom/hidma_mgmt.c 	writel(val, mgmtdev->virtaddr + HIDMA_MAX_BUS_REQ_LEN_OFFSET);
writel            132 drivers/dma/qcom/hidma_mgmt.c 	writel(val, mgmtdev->virtaddr + HIDMA_MAX_XACTIONS_OFFSET);
writel            148 drivers/dma/qcom/hidma_mgmt.c 		writel(val, mgmtdev->virtaddr + HIDMA_QOS_N_OFFSET + (4 * i));
writel            154 drivers/dma/qcom/hidma_mgmt.c 	writel(val, mgmtdev->virtaddr + HIDMA_CHRESET_TIMEOUT_OFFSET);
writel            298 drivers/dma/qcom/hidma_mgmt.c 	writel(val, mgmtdev->virtaddr + HIDMA_CFG_OFFSET);
writel            357 drivers/dma/s3c24xx-dma.c 	writel(S3C24XX_DMASKTRIG_STOP, phy->base + S3C24XX_DMASKTRIG);
writel            497 drivers/dma/s3c24xx-dma.c 	writel(val, phy->base + S3C24XX_DMASKTRIG);
writel            214 drivers/dma/sa11x0-dma.c 	writel(dcsr, base + DMA_DCSR_S);
writel            714 drivers/dma/sa11x0-dma.c 			writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_C);
writel            740 drivers/dma/sa11x0-dma.c 			writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_S);
writel            769 drivers/dma/sa11x0-dma.c 		writel(DCSR_RUN | DCSR_IE |
writel           1015 drivers/dma/sa11x0-dma.c 			writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_C);
writel           1036 drivers/dma/sa11x0-dma.c 		writel(DCSR_STRTA | DCSR_STRTB, p->base + DMA_DCSR_C);
writel            301 drivers/dma/sh/rcar-dmac.c 		writel(data, dmac->iomem + reg);
writel            325 drivers/dma/sh/rcar-dmac.c 		writel(data, chan->iomem + reg);
writel            153 drivers/dma/sh/usb-dmac.c 	writel(data, dmac->iomem + reg);
writel            168 drivers/dma/sh/usb-dmac.c 	writel(data, chan->iomem + reg);
writel            188 drivers/dma/sirf-dma.c 	writel(sdesc->addr, base + SIRFSOC_DMA_CH_ADDR);
writel            190 drivers/dma/sirf-dma.c 		writel(0x10001, base + SIRFSOC_DMA_LOOP_CTRL_ATLAS7);
writel            206 drivers/dma/sirf-dma.c 	writel(sdesc->addr >> 2, base + cid * 0x10 + SIRFSOC_DMA_CH_ADDR);
writel            208 drivers/dma/sirf-dma.c 		writel((1 << cid) | 1 << (cid + 16) |
writel            226 drivers/dma/sirf-dma.c 	writel(sdesc->addr >> 2, base + cid * 0x10 + SIRFSOC_DMA_CH_ADDR);
writel            228 drivers/dma/sirf-dma.c 		writel((1 << cid) | 1 << (cid + 16) |
writel            245 drivers/dma/sprd-dma.c 	writel(tmp, sdev->glb_base + reg);
writel            255 drivers/dma/sprd-dma.c 	writel(tmp, schan->chn_base + reg);
writel            296 drivers/dma/sprd-dma.c 		writel(schan->chn_num + 1, sdev->glb_base + uid_offset);
writel            309 drivers/dma/sprd-dma.c 		writel(0, sdev->glb_base + uid_offset);
writel            491 drivers/dma/sprd-dma.c 	writel(cfg->pause, schan->chn_base + SPRD_DMA_CHN_PAUSE);
writel            492 drivers/dma/sprd-dma.c 	writel(cfg->cfg, schan->chn_base + SPRD_DMA_CHN_CFG);
writel            493 drivers/dma/sprd-dma.c 	writel(cfg->intc, schan->chn_base + SPRD_DMA_CHN_INTC);
writel            494 drivers/dma/sprd-dma.c 	writel(cfg->src_addr, schan->chn_base + SPRD_DMA_CHN_SRC_ADDR);
writel            495 drivers/dma/sprd-dma.c 	writel(cfg->des_addr, schan->chn_base + SPRD_DMA_CHN_DES_ADDR);
writel            496 drivers/dma/sprd-dma.c 	writel(cfg->frg_len, schan->chn_base + SPRD_DMA_CHN_FRG_LEN);
writel            497 drivers/dma/sprd-dma.c 	writel(cfg->blk_len, schan->chn_base + SPRD_DMA_CHN_BLK_LEN);
writel            498 drivers/dma/sprd-dma.c 	writel(cfg->trsc_len, schan->chn_base + SPRD_DMA_CHN_TRSC_LEN);
writel            499 drivers/dma/sprd-dma.c 	writel(cfg->trsf_step, schan->chn_base + SPRD_DMA_CHN_TRSF_STEP);
writel            500 drivers/dma/sprd-dma.c 	writel(cfg->wrap_ptr, schan->chn_base + SPRD_DMA_CHN_WARP_PTR);
writel            501 drivers/dma/sprd-dma.c 	writel(cfg->wrap_to, schan->chn_base + SPRD_DMA_CHN_WARP_TO);
writel            502 drivers/dma/sprd-dma.c 	writel(cfg->llist_ptr, schan->chn_base + SPRD_DMA_CHN_LLIST_PTR);
writel            503 drivers/dma/sprd-dma.c 	writel(cfg->frg_step, schan->chn_base + SPRD_DMA_CHN_FRAG_STEP);
writel            504 drivers/dma/sprd-dma.c 	writel(cfg->src_blk_step, schan->chn_base + SPRD_DMA_CHN_SRC_BLK_STEP);
writel            505 drivers/dma/sprd-dma.c 	writel(cfg->des_blk_step, schan->chn_base + SPRD_DMA_CHN_DES_BLK_STEP);
writel            506 drivers/dma/sprd-dma.c 	writel(cfg->req, schan->chn_base + SPRD_DMA_CHN_REQ);
writel             90 drivers/dma/st_fdma.c 	writel(cmd,
writel            170 drivers/dma/st_fdma.h 	writel((val), (fdev)->slim_rproc->peri + name)
writel            190 drivers/dma/st_fdma.h 	writel((val), (fchan)->fdev->slim_rproc->mem[ST_SLIM_DMEM].cpu_addr \
writel            197 drivers/dma/st_fdma.h 	writel((val), (fchan)->fdev->slim_rproc->mem[ST_SLIM_DMEM].cpu_addr \
writel            212 drivers/dma/st_fdma.h 	writel((val), (fchan)->fdev->slim_rproc->mem[ST_SLIM_DMEM].cpu_addr \
writel            812 drivers/dma/ste_dma40.c 	writel(lli_src->reg_cfg, base + D40_CHAN_REG_SSCFG);
writel            813 drivers/dma/ste_dma40.c 	writel(lli_src->reg_elt, base + D40_CHAN_REG_SSELT);
writel            814 drivers/dma/ste_dma40.c 	writel(lli_src->reg_ptr, base + D40_CHAN_REG_SSPTR);
writel            815 drivers/dma/ste_dma40.c 	writel(lli_src->reg_lnk, base + D40_CHAN_REG_SSLNK);
writel            817 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_cfg, base + D40_CHAN_REG_SDCFG);
writel            818 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_elt, base + D40_CHAN_REG_SDELT);
writel            819 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_ptr, base + D40_CHAN_REG_SDPTR);
writel            820 drivers/dma/ste_dma40.c 	writel(lli_dst->reg_lnk, base + D40_CHAN_REG_SDLNK);
writel           1071 drivers/dma/ste_dma40.c 	writel(wmask | (command << D40_CHAN_POS(d40c->phy_chan->num)),
writel           1167 drivers/dma/ste_dma40.c 		writel((D40_DEACTIVATE_EVENTLINE << D40_EVENTLINE_POS(event))
writel           1179 drivers/dma/ste_dma40.c 		writel((D40_SUSPEND_REQ_EVENTLINE << D40_EVENTLINE_POS(event))
writel           1214 drivers/dma/ste_dma40.c 			writel((D40_ACTIVATE_EVENTLINE <<
writel           1358 drivers/dma/ste_dma40.c 	writel(var, d40c->base->virtbase + D40_DREG_PRMSE + addr_base);
writel           1363 drivers/dma/ste_dma40.c 	writel(var, d40c->base->virtbase + D40_DREG_PRMOE + addr_base);
writel           1371 drivers/dma/ste_dma40.c 		writel(d40c->src_def_cfg, chanbase + D40_CHAN_REG_SSCFG);
writel           1372 drivers/dma/ste_dma40.c 		writel(d40c->dst_def_cfg, chanbase + D40_CHAN_REG_SDCFG);
writel           1375 drivers/dma/ste_dma40.c 		writel(lidx, chanbase + D40_CHAN_REG_SSELT);
writel           1376 drivers/dma/ste_dma40.c 		writel(lidx, chanbase + D40_CHAN_REG_SDELT);
writel           1379 drivers/dma/ste_dma40.c 		writel(0, chanbase + D40_CHAN_REG_SSLNK);
writel           1380 drivers/dma/ste_dma40.c 		writel(0, chanbase + D40_CHAN_REG_SDLNK);
writel           1684 drivers/dma/ste_dma40.c 		writel(BIT(idx), base->virtbase + il[row].clr);
writel           2322 drivers/dma/ste_dma40.c 	writel(bit, d40c->base->virtbase + prioreg + group * 4);
writel           2323 drivers/dma/ste_dma40.c 	writel(bit, d40c->base->virtbase + rtreg + group * 4);
writel           3099 drivers/dma/ste_dma40.c 	writel(D40_DREG_GCC_ENABLE_ALL, base->virtbase + D40_DREG_GCC);
writel           3331 drivers/dma/ste_dma40.c 		writel(dma_init_reg[i].val,
writel           3357 drivers/dma/ste_dma40.c 	writel(prmseo[1], base->virtbase + D40_DREG_PRMSE);
writel           3358 drivers/dma/ste_dma40.c 	writel(prmseo[0], base->virtbase + D40_DREG_PRMSO);
writel           3359 drivers/dma/ste_dma40.c 	writel(activeo[1], base->virtbase + D40_DREG_ACTIVE);
writel           3360 drivers/dma/ste_dma40.c 	writel(activeo[0], base->virtbase + D40_DREG_ACTIVO);
writel           3363 drivers/dma/ste_dma40.c 	writel(pcmis, base->virtbase + base->gen_dmac.interrupt_en);
writel           3366 drivers/dma/ste_dma40.c 	writel(pcicr, base->virtbase + base->gen_dmac.interrupt_clear);
writel           3448 drivers/dma/ste_dma40.c 	writel(virt_to_phys(base->lcla_pool.base),
writel           3564 drivers/dma/ste_dma40.c 		writel(res->start, base->virtbase + D40_DREG_LCPA);
writel           3589 drivers/dma/ste_dma40.c 		writel(res->start, base->virtbase + D40_DREG_LCLA);
writel            880 drivers/dma/sun4i-dma.c 			writel(0, pchan->base + SUN4I_DDMA_CFG_REG);
writel            882 drivers/dma/sun4i-dma.c 			writel(0, pchan->base + SUN4I_NDMA_CFG_REG);
writel           1215 drivers/dma/sun4i-dma.c 	writel(0, priv->base + SUN4I_DMA_IRQ_ENABLE_REG);
writel           1216 drivers/dma/sun4i-dma.c 	writel(0xFFFFFFFF, priv->base + SUN4I_DMA_IRQ_PENDING_STATUS_REG);
writel            297 drivers/dma/sun6i-dma.c 	writel(SUN8I_DMA_GATE_ENABLE, sdev->base + SUN8I_DMA_GATE);
writel            302 drivers/dma/sun6i-dma.c 	writel(SUNXI_H3_DMA_GATE_ENABLE, sdev->base + SUNXI_H3_DMA_GATE);
writel            459 drivers/dma/sun6i-dma.c 	writel(irq_val, sdev->base + DMA_IRQ_EN(irq_reg));
writel            461 drivers/dma/sun6i-dma.c 	writel(pchan->desc->p_lli, pchan->base + DMA_CHAN_LLI_ADDR);
writel            462 drivers/dma/sun6i-dma.c 	writel(DMA_CHAN_ENABLE_START, pchan->base + DMA_CHAN_ENABLE);
writel            551 drivers/dma/sun6i-dma.c 		writel(status, sdev->base + DMA_IRQ_STAT(i));
writel            848 drivers/dma/sun6i-dma.c 		writel(DMA_CHAN_PAUSE_PAUSE,
writel            871 drivers/dma/sun6i-dma.c 		writel(DMA_CHAN_PAUSE_RESUME,
writel            911 drivers/dma/sun6i-dma.c 		writel(DMA_CHAN_ENABLE_STOP, pchan->base + DMA_CHAN_ENABLE);
writel            912 drivers/dma/sun6i-dma.c 		writel(DMA_CHAN_PAUSE_RESUME, pchan->base + DMA_CHAN_PAUSE);
writel           1029 drivers/dma/sun6i-dma.c 	writel(0, sdev->base + DMA_IRQ_EN(0));
writel           1030 drivers/dma/sun6i-dma.c 	writel(0, sdev->base + DMA_IRQ_EN(1));
writel            234 drivers/dma/tegra20-apb-dma.c 	writel(val, tdma->base_addr + reg);
writel            245 drivers/dma/tegra20-apb-dma.c 	writel(val, tdc->chan_addr + reg);
writel            172 drivers/dma/tegra210-adma.c 	writel(val, tdma->base_addr + tdma->cdata->global_reg_offset + reg);
writel            182 drivers/dma/tegra210-adma.c 	writel(val, tdc->chan_addr + reg);
writel           2092 drivers/dma/ti/edma.c 		writel(mux, (xbar + offset));
writel            130 drivers/dma/uniphier-mdmac.c 	writel(src_mode, mc->reg_ch_base + UNIPHIER_MDMAC_CH_SRC_MODE);
writel            131 drivers/dma/uniphier-mdmac.c 	writel(dest_mode, mc->reg_ch_base + UNIPHIER_MDMAC_CH_DEST_MODE);
writel            132 drivers/dma/uniphier-mdmac.c 	writel(src_addr, mc->reg_ch_base + UNIPHIER_MDMAC_CH_SRC_ADDR);
writel            133 drivers/dma/uniphier-mdmac.c 	writel(dest_addr, mc->reg_ch_base + UNIPHIER_MDMAC_CH_DEST_ADDR);
writel            134 drivers/dma/uniphier-mdmac.c 	writel(chunk_size, mc->reg_ch_base + UNIPHIER_MDMAC_CH_SIZE);
writel            137 drivers/dma/uniphier-mdmac.c 	writel(irq_flag, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_REQ);
writel            139 drivers/dma/uniphier-mdmac.c 	writel(irq_flag, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_EN);
writel            141 drivers/dma/uniphier-mdmac.c 	writel(BIT(mc->chan_id), mdev->reg_base + UNIPHIER_MDMAC_CMD);
writel            162 drivers/dma/uniphier-mdmac.c 	writel(irq_flag, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_REQ);
writel            164 drivers/dma/uniphier-mdmac.c 	writel(UNIPHIER_MDMAC_CMD_ABORT | BIT(mc->chan_id),
writel            196 drivers/dma/uniphier-mdmac.c 	writel(irq_stat, mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_REQ);
writel            515 drivers/dma/xilinx/xilinx_dma.c 	writel(value_lsb, chan->xdev->regs + chan->desc_offset + reg);
writel            518 drivers/dma/xilinx/xilinx_dma.c 	writel(value_msb, chan->xdev->regs + chan->desc_offset + reg + 4);
writel            336 drivers/dma/xilinx/zynqmp_dma.c 	writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IDS);
writel            338 drivers/dma/xilinx/zynqmp_dma.c 	writel(val, chan->regs + ZYNQMP_DMA_ISR);
writel            344 drivers/dma/xilinx/zynqmp_dma.c 		writel(val, chan->regs + ZYNQMP_DMA_DSCR_ATTR);
writel            354 drivers/dma/xilinx/zynqmp_dma.c 	writel(val, chan->regs + ZYNQMP_DMA_DATA_ATTR);
writel            514 drivers/dma/xilinx/zynqmp_dma.c 	writel(ZYNQMP_DMA_INT_EN_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IER);
writel            515 drivers/dma/xilinx/zynqmp_dma.c 	writel(0, chan->regs + ZYNQMP_DMA_TOTAL_BYTE);
writel            517 drivers/dma/xilinx/zynqmp_dma.c 	writel(ZYNQMP_DMA_ENABLE, chan->regs + ZYNQMP_DMA_CTRL2);
writel            528 drivers/dma/xilinx/zynqmp_dma.c 		writel(0, chan->regs + ZYNQMP_DMA_TOTAL_BYTE);
writel            541 drivers/dma/xilinx/zynqmp_dma.c 	writel(val, chan->regs + ZYNQMP_DMA_CTRL0);
writel            548 drivers/dma/xilinx/zynqmp_dma.c 	writel(val, chan->regs + ZYNQMP_DMA_DATA_ATTR);
writel            688 drivers/dma/xilinx/zynqmp_dma.c 	writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IDS);
writel            713 drivers/dma/xilinx/zynqmp_dma.c 	writel(isr, chan->regs + ZYNQMP_DMA_ISR);
writel            783 drivers/dma/xilinx/zynqmp_dma.c 	writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IDS);
writel            618 drivers/edac/altera_edac.c 			writel(priv->ce_clear_mask, drvdata->base);
writel            623 drivers/edac/altera_edac.c 			writel(priv->ue_clear_mask, drvdata->base);
writel            681 drivers/edac/altera_edac.c 		writel(error_mask, (drvdata->base + priv->set_err_ofst));
writel            682 drivers/edac/altera_edac.c 		writel(priv->ecc_enable_mask, (drvdata->base +
writel            920 drivers/edac/altera_edac.c 		writel(ALTR_A10_ECC_SERRPENA,
writel            926 drivers/edac/altera_edac.c 		writel(ALTR_A10_ECC_DERRPENA,
writel            958 drivers/edac/altera_edac.c 	writel(value, ioaddr);
writel            966 drivers/edac/altera_edac.c 	writel(value, ioaddr);
writel           1007 drivers/edac/altera_edac.c 	writel(clear_mask, (ioaddr + ALTR_A10_ECC_INTSTAT_OFST));
writel           1082 drivers/edac/altera_edac.c 	writel(ALTR_A10_ECC_SERRINTEN,
writel           1112 drivers/edac/altera_edac.c 	writel(ALTR_A10_ECC_SERRINTEN,
writel           1260 drivers/edac/altera_edac.c 	writel(ALTR_A10_ECC_SERRINTEN, (base + ALTR_A10_ECC_ERRINTENS_OFST));
writel           1708 drivers/edac/altera_edac.c 		writel(priv->ce_clear_mask,
writel           1713 drivers/edac/altera_edac.c 		writel(priv->ue_clear_mask,
writel           1810 drivers/edac/altera_edac.c 		writel(priv->ue_set_mask, set_addr);
writel           1812 drivers/edac/altera_edac.c 		writel(priv->ce_set_mask, set_addr);
writel           1842 drivers/edac/altera_edac.c 		writel(priv->ue_set_mask, set_addr);
writel           1845 drivers/edac/altera_edac.c 		writel(ECC_WORD_WRITE, drvdata->base + ECC_BLK_DBYTECTRL_OFST);
writel           1847 drivers/edac/altera_edac.c 		writel(0, drvdata->base + ECC_BLK_ADDRESS_OFST);
writel           1849 drivers/edac/altera_edac.c 		writel(ECC_READ_EDOVR, drvdata->base + ECC_BLK_ACCCTRL_OFST);
writel           1851 drivers/edac/altera_edac.c 		writel(ECC_XACT_KICK, drvdata->base + ECC_BLK_STARTACC_OFST);
writel           1853 drivers/edac/altera_edac.c 		writel(readl(drvdata->base + ECC_BLK_RDATA0_OFST) ^ 0x1,
writel           1855 drivers/edac/altera_edac.c 		writel(readl(drvdata->base + ECC_BLK_RDATA1_OFST),
writel           1857 drivers/edac/altera_edac.c 		writel(readl(drvdata->base + ECC_BLK_RDATA2_OFST),
writel           1859 drivers/edac/altera_edac.c 		writel(readl(drvdata->base + ECC_BLK_RDATA3_OFST),
writel           1863 drivers/edac/altera_edac.c 		writel(readl(drvdata->base + ECC_BLK_RECC0_OFST),
writel           1865 drivers/edac/altera_edac.c 		writel(readl(drvdata->base + ECC_BLK_RECC1_OFST),
writel           1868 drivers/edac/altera_edac.c 		writel(ECC_WRITE_EDOVR, drvdata->base + ECC_BLK_ACCCTRL_OFST);
writel           1870 drivers/edac/altera_edac.c 		writel(ECC_XACT_KICK, drvdata->base + ECC_BLK_STARTACC_OFST);
writel           1872 drivers/edac/altera_edac.c 		writel(ECC_READ_EDOVR, drvdata->base + ECC_BLK_ACCCTRL_OFST);
writel           1874 drivers/edac/altera_edac.c 		writel(ECC_XACT_KICK, drvdata->base + ECC_BLK_STARTACC_OFST);
writel           2148 drivers/edac/altera_edac.c 			writel(ALTR_A10_ECC_DERRPENA,
writel            145 drivers/edac/armada_xp_edac.c 	writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK),
writel            147 drivers/edac/armada_xp_edac.c 	writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK),
writel            152 drivers/edac/armada_xp_edac.c 		writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG);
writel            154 drivers/edac/armada_xp_edac.c 		writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG);
writel            342 drivers/edac/armada_xp_edac.c 	writel(1 << SDRAM_ERR_CTRL_THR_OFFSET, drvdata->base + SDRAM_ERR_CTRL_REG);
writel            345 drivers/edac/armada_xp_edac.c 	writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_ERR_REG);
writel            346 drivers/edac/armada_xp_edac.c 	writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_MSG_REG);
writel            349 drivers/edac/armada_xp_edac.c 	writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG);
writel            350 drivers/edac/armada_xp_edac.c 	writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG);
writel            401 drivers/edac/armada_xp_edac.c 	writel(0, drvdata->base + AURORA_ERR_INJECT_CTL_REG);
writel            402 drivers/edac/armada_xp_edac.c 	writel(drvdata->inject_mask, drvdata->base + AURORA_ERR_INJECT_MASK_REG);
writel            403 drivers/edac/armada_xp_edac.c 	writel(drvdata->inject_addr | drvdata->inject_ctl, drvdata->base + AURORA_ERR_INJECT_CTL_REG);
writel            425 drivers/edac/armada_xp_edac.c 		writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG);
writel            474 drivers/edac/armada_xp_edac.c 	writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG);
writel            556 drivers/edac/armada_xp_edac.c 	writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG);
writel            557 drivers/edac/armada_xp_edac.c 	writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG);
writel             46 drivers/edac/aspeed_edac.c 	writel(ASPEED_MCR_PROT_PASSWD, regs + ASPEED_MCR_PROT);
writel             48 drivers/edac/aspeed_edac.c 	writel(val, regs + reg);
writel             51 drivers/edac/aspeed_edac.c 	writel(~ASPEED_MCR_PROT_PASSWD, regs + ASPEED_MCR_PROT);
writel            112 drivers/edac/bluefield_edac.c 	writel(ecc_latch_select, priv->emi_base + MLXBF_ECC_LATCH_SEL);
writel            176 drivers/edac/bluefield_edac.c 		writel(ecc_error, priv->emi_base + MLXBF_ECC_ERR);
writel             30 drivers/edac/highbank_l2_edac.c 		writel(1, drvdata->base + SR_CLR_SB_ECC_INTR);
writel             34 drivers/edac/highbank_l2_edac.c 		writel(1, drvdata->base + SR_CLR_DB_ECC_INTR);
writel             82 drivers/edac/highbank_mc_edac.c 	writel(status, drvdata->mc_int_base + HB_DDR_ECC_INT_ACK);
writel             94 drivers/edac/highbank_mc_edac.c 	writel(reg, pdata->mc_err_base + HB_DDR_ECC_OPT);
writel             49 drivers/edac/mv64x60_edac.c 	writel(~cause, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
writel             96 drivers/edac/mv64x60_edac.c 	writel(readl(pci_serr) & ~0x1, pci_serr);
writel            164 drivers/edac/mv64x60_edac.c 	writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
writel            165 drivers/edac/mv64x60_edac.c 	writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_MASK);
writel            166 drivers/edac/mv64x60_edac.c 	writel(MV64X60_PCIx_ERR_MASK_VAL,
writel            252 drivers/edac/mv64x60_edac.c 	writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
writel            325 drivers/edac/mv64x60_edac.c 	writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
writel            418 drivers/edac/mv64x60_edac.c 	writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE);
writel            518 drivers/edac/mv64x60_edac.c 	writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE);
writel            519 drivers/edac/mv64x60_edac.c 	writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK);
writel            520 drivers/edac/mv64x60_edac.c 	writel(0x000000ff, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK);
writel            623 drivers/edac/mv64x60_edac.c 	writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
writel            781 drivers/edac/mv64x60_edac.c 	writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
writel            784 drivers/edac/mv64x60_edac.c 	writel(ctl, pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL);
writel            400 drivers/edac/synopsys_edac.c 	writel(clearval, base + ECC_CTRL_OFST);
writel            401 drivers/edac/synopsys_edac.c 	writel(0x0, base + ECC_CTRL_OFST);
writel            460 drivers/edac/synopsys_edac.c 	writel(clearval, base + ECC_CLR_OFST);
writel            461 drivers/edac/synopsys_edac.c 	writel(0x0, base + ECC_CLR_OFST);
writel            551 drivers/edac/synopsys_edac.c 	writel(regval, priv->baseaddr + DDR_QOS_IRQ_STAT_OFST);
writel            837 drivers/edac/synopsys_edac.c 	writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
writel            844 drivers/edac/synopsys_edac.c 	writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
writel            964 drivers/edac/synopsys_edac.c 	writel(regval, priv->baseaddr + ECC_POISON0_OFST);
writel            969 drivers/edac/synopsys_edac.c 	writel(regval, priv->baseaddr + ECC_POISON1_OFST);
writel           1020 drivers/edac/synopsys_edac.c 	writel(0, priv->baseaddr + DDRC_SWCTL);
writel           1022 drivers/edac/synopsys_edac.c 		writel(ECC_CEPOISON_MASK, priv->baseaddr + ECC_CFG1_OFST);
writel           1024 drivers/edac/synopsys_edac.c 		writel(ECC_UEPOISON_MASK, priv->baseaddr + ECC_CFG1_OFST);
writel           1025 drivers/edac/synopsys_edac.c 	writel(1, priv->baseaddr + DDRC_SWCTL);
writel           1364 drivers/edac/synopsys_edac.c 		writel(0x0, baseaddr + ECC_CTRL_OFST);
writel             79 drivers/edac/xgene_edac.c 	writel(val, edac->pcp_csr + reg);
writel             91 drivers/edac/xgene_edac.c 	writel(val, edac->pcp_csr + reg);
writel            149 drivers/edac/xgene_edac.c 		writel(MCU_ESRR_MULTUCERR_MASK | MCU_ESRR_BACKUCERR_MASK |
writel            226 drivers/edac/xgene_edac.c 		writel(0x0, ctx->mcu_csr + MCUEBLRR0 + rank * MCU_RANK_STRIDE);
writel            227 drivers/edac/xgene_edac.c 		writel(0x0, ctx->mcu_csr + MCUERCRR0 + rank * MCU_RANK_STRIDE);
writel            228 drivers/edac/xgene_edac.c 		writel(0x0, ctx->mcu_csr + MCUSBECNT0 +
writel            230 drivers/edac/xgene_edac.c 		writel(reg, ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE);
writel            243 drivers/edac/xgene_edac.c 		writel(reg, ctx->mcu_csr + MCUGESR);
writel            286 drivers/edac/xgene_edac.c 		writel(val, ctx->mcu_csr + MCUGECR);
writel            294 drivers/edac/xgene_edac.c 		writel(val, ctx->mcu_csr + MCUGECR);
writel            561 drivers/edac/xgene_edac.c 	writel(val, pg_f + MEMERR_CPU_ICFESR_PAGE_OFFSET);
writel            605 drivers/edac/xgene_edac.c 	writel(val, pg_f + MEMERR_CPU_LSUESR_PAGE_OFFSET);
writel            654 drivers/edac/xgene_edac.c 	writel(val, pg_f + MEMERR_CPU_MMUESR_PAGE_OFFSET);
writel            711 drivers/edac/xgene_edac.c 	writel(val, pg_e + MEMERR_L2C_L2ESR_PAGE_OFFSET);
writel            730 drivers/edac/xgene_edac.c 		writel(val, pg_d + CPUX_L2C_L2RTOSR_PAGE_OFFSET);
writel            763 drivers/edac/xgene_edac.c 	writel(0x00000301, pg_f + MEMERR_CPU_ICFECR_PAGE_OFFSET);
writel            764 drivers/edac/xgene_edac.c 	writel(0x00000301, pg_f + MEMERR_CPU_LSUECR_PAGE_OFFSET);
writel            765 drivers/edac/xgene_edac.c 	writel(0x00000101, pg_f + MEMERR_CPU_MMUECR_PAGE_OFFSET);
writel            775 drivers/edac/xgene_edac.c 	writel(0x00000703, pg_e + MEMERR_L2C_L2ECR_PAGE_OFFSET);
writel            778 drivers/edac/xgene_edac.c 		writel(0x00000119, pg_d + CPUX_L2C_L2RTOCR_PAGE_OFFSET);
writel            819 drivers/edac/xgene_edac.c 		writel(MEMERR_CPU_ICFESR_MULTCERR_MASK |
writel            822 drivers/edac/xgene_edac.c 		writel(MEMERR_CPU_LSUESR_MULTCERR_MASK |
writel            825 drivers/edac/xgene_edac.c 		writel(MEMERR_CPU_MMUESR_MULTCERR_MASK |
writel            840 drivers/edac/xgene_edac.c 	writel(MEMERR_L2C_L2ESR_MULTUCERR_MASK |
writel           1100 drivers/edac/xgene_edac.c 	writel(0, ctx->dev_csr + L3C_ESR);
writel           1128 drivers/edac/xgene_edac.c 	writel(val, ctx->dev_csr + L3C_ECR);
writel           1154 drivers/edac/xgene_edac.c 	writel(0xFFFFFFFF, ctx->dev_csr + L3C_ESR);
writel           1414 drivers/edac/xgene_edac.c 	writel(reg, ctx->dev_csr + XGICTRANSERRINTSTS);
writel           1427 drivers/edac/xgene_edac.c 		writel(err_addr_lo, ctx->dev_csr + GLBL_SEC_ERRL);
writel           1428 drivers/edac/xgene_edac.c 		writel(err_addr_hi, ctx->dev_csr + GLBL_SEC_ERRH);
writel           1436 drivers/edac/xgene_edac.c 		writel(err_addr_lo, ctx->dev_csr + GLBL_MSEC_ERRL);
writel           1437 drivers/edac/xgene_edac.c 		writel(err_addr_hi, ctx->dev_csr + GLBL_MSEC_ERRH);
writel           1448 drivers/edac/xgene_edac.c 		writel(err_addr_lo, ctx->dev_csr + GLBL_DED_ERRL);
writel           1449 drivers/edac/xgene_edac.c 		writel(err_addr_hi, ctx->dev_csr + GLBL_DED_ERRH);
writel           1457 drivers/edac/xgene_edac.c 		writel(err_addr_lo, ctx->dev_csr + GLBL_MDED_ERRL);
writel           1458 drivers/edac/xgene_edac.c 		writel(err_addr_hi, ctx->dev_csr + GLBL_MDED_ERRH);
writel           1572 drivers/edac/xgene_edac.c 	writel(reg, ctx->dev_csr + IOBBATRANSERRINTSTS);
writel           1606 drivers/edac/xgene_edac.c 	writel(reg, ctx->dev_csr + IOBPATRANSERRINTSTS);
writel           1620 drivers/edac/xgene_edac.c 	writel(reg, ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);
writel           1634 drivers/edac/xgene_edac.c 	writel(reg, ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);
writel           1714 drivers/edac/xgene_edac.c 		writel(enable ? 0x0 : 0xFFFFFFFF,
writel           1716 drivers/edac/xgene_edac.c 		writel(enable ? 0x0 : 0xFFFFFFFF,
writel           1718 drivers/edac/xgene_edac.c 		writel(enable ? 0x0 : 0xFFFFFFFF,
writel             42 drivers/firewire/init_ohci1394_dma.c 	writel(data, ohci->registers + offset);
writel            216 drivers/firewire/nosy.c 	writel(data, lynx->registers + offset);
writel            529 drivers/firewire/ohci.c 	writel(data, ohci->registers + offset);
writel            144 drivers/firmware/tegra/bpmp-tegra210.c 	writel(index << TRIGGER_ID_SHIFT | TRIGGER_CMD_GET,
writel            135 drivers/fpga/altera-cvp.c 	writel(val, conf->map);
writel             54 drivers/fpga/altera-freeze-bridge.c 			writel(1, csr_illegal_req_addr);
writel            108 drivers/fpga/altera-freeze-bridge.c 	writel(FREEZE_CSR_CTRL_FREEZE_REQ, csr_ctrl_addr);
writel            114 drivers/fpga/altera-freeze-bridge.c 		writel(0, csr_ctrl_addr);
writel            116 drivers/fpga/altera-freeze-bridge.c 		writel(FREEZE_CSR_CTRL_RESET_REQ, csr_ctrl_addr);
writel            130 drivers/fpga/altera-freeze-bridge.c 	writel(0, csr_ctrl_addr);
writel            145 drivers/fpga/altera-freeze-bridge.c 	writel(FREEZE_CSR_CTRL_UNFREEZE_REQ, csr_ctrl_addr);
writel            154 drivers/fpga/altera-freeze-bridge.c 	writel(0, csr_ctrl_addr);
writel             99 drivers/fpga/altera-pr-ip-core.c 	writel(val | ALT_PR_CSR_PR_START, priv->reg_base + ALT_PR_CSR_OFST);
writel            116 drivers/fpga/altera-pr-ip-core.c 		writel(buffer_32[i++], priv->reg_base);
writel            123 drivers/fpga/altera-pr-ip-core.c 		writel(buffer_32[i++] & 0x00ffffff, priv->reg_base);
writel            126 drivers/fpga/altera-pr-ip-core.c 		writel(buffer_32[i++] & 0x0000ffff, priv->reg_base);
writel            129 drivers/fpga/altera-pr-ip-core.c 		writel(buffer_32[i++] & 0x000000ff, priv->reg_base);
writel            366 drivers/fpga/socfpga-a10.c 		writel(buffer_32[i++], priv->fpga_data_addr);
writel            373 drivers/fpga/socfpga-a10.c 		writel(buffer_32[i++] & 0x00ffffff, priv->fpga_data_addr);
writel            376 drivers/fpga/socfpga-a10.c 		writel(buffer_32[i++] & 0x0000ffff, priv->fpga_data_addr);
writel            379 drivers/fpga/socfpga-a10.c 		writel(buffer_32[i++] & 0x000000ff, priv->fpga_data_addr);
writel            142 drivers/fpga/socfpga.c 	writel(value, priv->fpga_base_addr + reg_offset);
writel            159 drivers/fpga/socfpga.c 	writel(value, priv->fpga_data_addr);
writel             29 drivers/fpga/xilinx-pr-decoupler.c 	writel(val, d->io_base + offset);
writel            140 drivers/fpga/zynq-fpga.c 	writel(val, priv->io_base + offset);
writel             50 drivers/gpio/gpio-altera.c 	writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
writel             68 drivers/gpio/gpio-altera.c 	writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
writel            130 drivers/gpio/gpio-altera.c 	writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);
writel            148 drivers/gpio/gpio-altera.c 	writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);
writel            172 drivers/gpio/gpio-altera.c 	writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);
writel            177 drivers/gpio/gpio-altera.c 	writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);
writel            202 drivers/gpio/gpio-altera.c 		writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP);
writel             48 drivers/gpio/gpio-amdpt.c 	writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG);
writel             65 drivers/gpio/gpio-amdpt.c 	writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG);
writel            121 drivers/gpio/gpio-amdpt.c 	writel(0, pt_gpio->reg_base + PT_SYNC_REG);
writel            122 drivers/gpio/gpio-amdpt.c 	writel(0, pt_gpio->reg_base + PT_CLOCKRATE_REG);
writel            733 drivers/gpio/gpio-aspeed.c 	writel(val, treg);
writel             51 drivers/gpio/gpio-ath79.c 	writel(val, ctrl->base + reg);
writel             87 drivers/gpio/gpio-bcm-kona.c 	writel(BCM_GPIO_PASSWD, reg_base + GPIO_GPPWR_OFFSET);
writel             88 drivers/gpio/gpio-bcm-kona.c 	writel(lockcode, reg_base + GPIO_PWD_STATUS(bank_id));
writel            154 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + reg_offset);
writel            216 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + GPIO_CONTROL(gpio));
writel            240 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + GPIO_CONTROL(gpio));
writel            245 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + reg_offset);
writel            304 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + GPIO_CONTROL(gpio));
writel            354 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + GPIO_INT_STATUS(bank_id));
writel            375 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + GPIO_INT_MASK(bank_id));
writel            397 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + GPIO_INT_MSKCLR(bank_id));
writel            441 drivers/gpio/gpio-bcm-kona.c 	writel(val, reg_base + GPIO_CONTROL(gpio));
writel            477 drivers/gpio/gpio-bcm-kona.c 			writel(readl(reg_base + GPIO_INT_STATUS(bank_id)) |
writel            560 drivers/gpio/gpio-bcm-kona.c 		writel(0xffffffff, reg_base + GPIO_INT_MASK(i));
writel            561 drivers/gpio/gpio-bcm-kona.c 		writel(0xffffffff, reg_base + GPIO_INT_STATUS(i));
writel             60 drivers/gpio/gpio-bt8xx.c #define bgwrite(dat, adr)	writel((dat), bg->mmio+(adr))
writel             48 drivers/gpio/gpio-creg-snps.c 	writel(reg, hcg->regs);
writel             61 drivers/gpio/gpio-ftgpio010.c 	writel(BIT(irqd_to_hwirq(d)), g->base + GPIO_INT_CLR);
writel             72 drivers/gpio/gpio-ftgpio010.c 	writel(val, g->base + GPIO_INT_EN);
writel             83 drivers/gpio/gpio-ftgpio010.c 	writel(val, g->base + GPIO_INT_EN);
writel            130 drivers/gpio/gpio-ftgpio010.c 	writel(reg_type, g->base + GPIO_INT_TYPE);
writel            131 drivers/gpio/gpio-ftgpio010.c 	writel(reg_level, g->base + GPIO_INT_LEVEL);
writel            132 drivers/gpio/gpio-ftgpio010.c 	writel(reg_both, g->base + GPIO_INT_BOTH_EDGE);
writel            203 drivers/gpio/gpio-ftgpio010.c 		writel(val, g->base + GPIO_DEBOUNCE_EN);
writel            217 drivers/gpio/gpio-ftgpio010.c 	writel(deb_div, g->base + GPIO_DEBOUNCE_PRESCALE);
writel            220 drivers/gpio/gpio-ftgpio010.c 	writel(val, g->base + GPIO_DEBOUNCE_EN);
writel            302 drivers/gpio/gpio-ftgpio010.c 	writel(0x0, g->base + GPIO_INT_EN);
writel            303 drivers/gpio/gpio-ftgpio010.c 	writel(0x0, g->base + GPIO_INT_MASK);
writel            304 drivers/gpio/gpio-ftgpio010.c 	writel(~0x0, g->base + GPIO_INT_CLR);
writel            307 drivers/gpio/gpio-ftgpio010.c 	writel(0x0, g->base + GPIO_DEBOUNCE_EN);
writel             95 drivers/gpio/gpio-intel-mid.c 		writel(value, gafr);
writel            113 drivers/gpio/gpio-intel-mid.c 		writel(BIT(offset % 32), gpsr);
writel            116 drivers/gpio/gpio-intel-mid.c 		writel(BIT(offset % 32), gpcr);
writel            133 drivers/gpio/gpio-intel-mid.c 	writel(value, gpdr);
writel            157 drivers/gpio/gpio-intel-mid.c 	writel(value, gpdr);
writel            187 drivers/gpio/gpio-intel-mid.c 	writel(value, grer);
writel            193 drivers/gpio/gpio-intel-mid.c 	writel(value, gfer);
writel            287 drivers/gpio/gpio-intel-mid.c 			writel(mask, gedr);
writel            305 drivers/gpio/gpio-intel-mid.c 		writel(0, reg);
writel            308 drivers/gpio/gpio-intel-mid.c 		writel(0, reg);
writel            311 drivers/gpio/gpio-intel-mid.c 		writel(~0, reg);
writel            296 drivers/gpio/gpio-lpc18xx.c 	writel(dir, gc->base + LPC18XX_REG_DIR(port));
writel             53 drivers/gpio/gpio-mb86s7x.c 	writel(val, gchip->base + PFR(gpio));
writel             70 drivers/gpio/gpio-mb86s7x.c 	writel(val, gchip->base + PFR(gpio));
writel             85 drivers/gpio/gpio-mb86s7x.c 	writel(val, gchip->base + DDR(gpio));
writel            106 drivers/gpio/gpio-mb86s7x.c 	writel(val, gchip->base + PDR(gpio));
writel            110 drivers/gpio/gpio-mb86s7x.c 	writel(val, gchip->base + DDR(gpio));
writel            137 drivers/gpio/gpio-mb86s7x.c 	writel(val, gchip->base + PDR(gpio));
writel             79 drivers/gpio/gpio-menz127.c 	writel(db_en, priv->reg_base + MEN_Z127_DBER);
writel             80 drivers/gpio/gpio-menz127.c 	writel(db_cnt, priv->reg_base + GPIO_TO_DBCNT_REG(gpio));
writel            103 drivers/gpio/gpio-menz127.c 	writel(od_en, priv->reg_base + MEN_Z127_ODER);
writel            113 drivers/gpio/gpio-merrifield.c 		writel(BIT(offset % 32), gpsr);
writel            116 drivers/gpio/gpio-merrifield.c 		writel(BIT(offset % 32), gpcr);
writel            134 drivers/gpio/gpio-merrifield.c 	writel(value, gpdr);
writel            154 drivers/gpio/gpio-merrifield.c 	writel(value, gpdr);
writel            182 drivers/gpio/gpio-merrifield.c 	writel(value, gfbr);
writel            210 drivers/gpio/gpio-merrifield.c 	writel(BIT(gpio % 32), gisr);
writel            229 drivers/gpio/gpio-merrifield.c 	writel(value, gimr);
writel            262 drivers/gpio/gpio-merrifield.c 	writel(value, grer);
writel            268 drivers/gpio/gpio-merrifield.c 	writel(value, gfer);
writel            278 drivers/gpio/gpio-merrifield.c 	writel(value, glpr);
writel            282 drivers/gpio/gpio-merrifield.c 		writel(value, gitr);
writel            287 drivers/gpio/gpio-merrifield.c 		writel(value, gitr);
writel            310 drivers/gpio/gpio-merrifield.c 	writel(BIT(gpio % 32), gwsr);
writel            316 drivers/gpio/gpio-merrifield.c 	writel(value, gwmr);
writel            373 drivers/gpio/gpio-merrifield.c 		writel(0, reg);
writel            376 drivers/gpio/gpio-merrifield.c 		writel(0, reg);
writel             85 drivers/gpio/gpio-mmio.c 	writel(data, reg);
writel            216 drivers/gpio/gpio-mxc.c 			writel(val | (1 << gpio_idx),
writel            219 drivers/gpio/gpio-mxc.c 			writel(val & ~(1 << gpio_idx),
writel            227 drivers/gpio/gpio-mxc.c 		writel(val | (edge << (bit << 1)), reg);
writel            230 drivers/gpio/gpio-mxc.c 	writel(1 << gpio_idx, port->base + GPIO_ISR);
writel            257 drivers/gpio/gpio-mxc.c 	writel(val | (edge << (bit << 1)), reg);
writel            459 drivers/gpio/gpio-mxc.c 	writel(0, port->base + GPIO_IMR);
writel            460 drivers/gpio/gpio-mxc.c 	writel(~0, port->base + GPIO_ISR);
writel            551 drivers/gpio/gpio-mxc.c 	writel(port->gpio_saved_reg.icr1, port->base + GPIO_ICR1);
writel            552 drivers/gpio/gpio-mxc.c 	writel(port->gpio_saved_reg.icr2, port->base + GPIO_ICR2);
writel            553 drivers/gpio/gpio-mxc.c 	writel(port->gpio_saved_reg.imr, port->base + GPIO_IMR);
writel            554 drivers/gpio/gpio-mxc.c 	writel(port->gpio_saved_reg.gdir, port->base + GPIO_GDIR);
writel            555 drivers/gpio/gpio-mxc.c 	writel(port->gpio_saved_reg.edge_sel, port->base + GPIO_EDGE_SEL);
writel            556 drivers/gpio/gpio-mxc.c 	writel(port->gpio_saved_reg.dr, port->base + GPIO_DR);
writel            113 drivers/gpio/gpio-mxs.c 		writel(pin_mask, pin_addr + MXS_SET);
writel            114 drivers/gpio/gpio-mxs.c 		writel(pin_mask, port->base + PINCTRL_IRQEN(port) + MXS_SET);
writel            116 drivers/gpio/gpio-mxs.c 		writel(pin_mask, pin_addr + MXS_CLR);
writel            117 drivers/gpio/gpio-mxs.c 		writel(pin_mask, port->base + PINCTRL_PIN2IRQ(port) + MXS_SET);
writel            123 drivers/gpio/gpio-mxs.c 		writel(pin_mask, pin_addr + MXS_SET);
writel            125 drivers/gpio/gpio-mxs.c 		writel(pin_mask, pin_addr + MXS_CLR);
writel            127 drivers/gpio/gpio-mxs.c 	writel(pin_mask, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
writel            144 drivers/gpio/gpio-mxs.c 		writel(bit, pin_addr + MXS_CLR);
writel            146 drivers/gpio/gpio-mxs.c 		writel(bit, pin_addr + MXS_SET);
writel            310 drivers/gpio/gpio-mxs.c 	writel(0, port->base + PINCTRL_PIN2IRQ(port));
writel            311 drivers/gpio/gpio-mxs.c 	writel(0, port->base + PINCTRL_IRQEN(port));
writel            314 drivers/gpio/gpio-mxs.c 	writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
writel             72 drivers/gpio/gpio-sodaville.c 	writel(reg, type_reg);
writel            137 drivers/gpio/gpio-sodaville.c 	writel(0, sd->gpio_pub_base + GPIO_INT);
writel            138 drivers/gpio/gpio-sodaville.c 	writel((1 << 11) - 1, sd->gpio_pub_base + GPSTR);
writel            207 drivers/gpio/gpio-sodaville.c 		writel(mux_val, sd->gpio_pub_base + GPMUXCTL);
writel             60 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dats);
writel             62 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->datc);
writel             81 drivers/gpio/gpio-sta2x11.c 	writel(bit, &regs->dirs);
writel             84 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dats);
writel             86 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->datc);
writel             96 drivers/gpio/gpio-sta2x11.c 	writel(bit, &regs->dirc);
writel            164 drivers/gpio/gpio-sta2x11.c 	writel(val | bit, &regs->afsela);
writel            173 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dirs);
writel            174 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->datc);
writel            177 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dirs);
writel            178 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dats);
writel            181 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dirc);
writel            183 drivers/gpio/gpio-sta2x11.c 		writel(val, &regs->pdis);
writel            186 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dirc);
writel            188 drivers/gpio/gpio-sta2x11.c 		writel(val, &regs->pdis);
writel            189 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dats);
writel            192 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->dirc);
writel            194 drivers/gpio/gpio-sta2x11.c 		writel(val, &regs->pdis);
writel            195 drivers/gpio/gpio-sta2x11.c 		writel(bit, &regs->datc);
writel            223 drivers/gpio/gpio-sta2x11.c 		writel(val, &regs->rimsc);
writel            227 drivers/gpio/gpio-sta2x11.c 		writel(val, &regs->fimsc);
writel            249 drivers/gpio/gpio-sta2x11.c 		writel(val | bit, &regs->rimsc);
writel            251 drivers/gpio/gpio-sta2x11.c 		writel(val & ~bit, &regs->rimsc);
writel            254 drivers/gpio/gpio-sta2x11.c 		writel(val | bit, &regs->fimsc);
writel            256 drivers/gpio/gpio-sta2x11.c 		writel(val & ~bit, &regs->fimsc);
writel            294 drivers/gpio/gpio-sta2x11.c 			writel(1 << nr, &regs->ic);
writel            369 drivers/gpio/gpio-sta2x11.c 		writel(0, &chip->regs[i]->rimsc);
writel            370 drivers/gpio/gpio-sta2x11.c 		writel(0, &chip->regs[i]->fimsc);
writel            371 drivers/gpio/gpio-sta2x11.c 		writel(~0, &chip->regs[i]->ic);
writel            131 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_OUTPUT_CONTROL);
writel            136 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_ENABLE_CONFIG);
writel            158 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_OUTPUT_CONTROL);
writel            163 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_ENABLE_CONFIG);
writel            204 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_OUTPUT_VALUE);
writel            246 drivers/gpio/gpio-tegra186.c 	writel(1, base + TEGRA186_GPIO_INTERRUPT_CLEAR);
writel            261 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_ENABLE_CONFIG);
writel            276 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_ENABLE_CONFIG);
writel            323 drivers/gpio/gpio-tegra186.c 	writel(value, base + TEGRA186_GPIO_ENABLE_CONFIG);
writel             72 drivers/gpio/gpio-uniphier.c 	writel(tmp, priv->regs + reg);
writel            333 drivers/gpio/gpio-uniphier.c 	writel(0xff, priv->regs + UNIPHIER_GPIO_IRQ_FLT_CYC);
writel            462 drivers/gpio/gpio-uniphier.c 		writel(*val++, priv->regs + reg + UNIPHIER_GPIO_PORT_DATA);
writel            463 drivers/gpio/gpio-uniphier.c 		writel(*val++, priv->regs + reg + UNIPHIER_GPIO_PORT_DIR);
writel            466 drivers/gpio/gpio-uniphier.c 	writel(*val++, priv->regs + UNIPHIER_GPIO_IRQ_EN);
writel            467 drivers/gpio/gpio-uniphier.c 	writel(*val++, priv->regs + UNIPHIER_GPIO_IRQ_MODE);
writel            468 drivers/gpio/gpio-uniphier.c 	writel(*val++, priv->regs + UNIPHIER_GPIO_IRQ_FLT_EN);
writel             27 drivers/gpio/gpio-xilinx.c # define xgpio_writereg(offset, val)	writel(val, offset)
writel            119 drivers/gpio/gpio-xlp.c 	writel(value, addr + regset);
writel             71 drivers/gpio/gpio-zevio.c 	writel(val, IOMEM(c->chip.regs + section_offset + port_offset));
writel            180 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		writel((reg * 4), ((void __iomem *)adev->rmmio) + (mmMM_INDEX * 4));
writel            253 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
writel            258 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		writel((reg * 4), ((void __iomem *)adev->rmmio) + (mmMM_INDEX * 4));
writel            259 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		writel(v, ((void __iomem *)adev->rmmio) + (mmMM_DATA * 4));
writel            345 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		writel(v, adev->doorbell.ptr + index);
writel            213 drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c 		writel(value, db);
writel             21 drivers/gpu/drm/arm/display/include/malidp_io.h 	writel(v, (base + (offset >> 2)));
writel             27 drivers/gpu/drm/arm/display/include/malidp_io.h 	writel(lower_32_bits(v), (base + (offset >> 2)));
writel             28 drivers/gpu/drm/arm/display/include/malidp_io.h 	writel(upper_32_bits(v), (base + (offset >> 2) + 1));
writel             27 drivers/gpu/drm/arm/hdlcd_drv.h 	writel(value, hdlcd->mmio + reg);
writel            266 drivers/gpu/drm/arm/malidp_hw.h 	writel(value, hwdev->regs + reg);
writel            232 drivers/gpu/drm/armada/armada_crtc.c 		writel(dcrtc->irq_ena, dcrtc->base + LCD_SPU_IRQ_ENA);
writel            240 drivers/gpu/drm/armada/armada_crtc.c 		writel(dcrtc->irq_ena, dcrtc->base + LCD_SPU_IRQ_ENA);
writel            242 drivers/gpu/drm/armada/armada_crtc.c 			writel(0, dcrtc->base + LCD_SPU_IRQ_ISR);
writel             80 drivers/gpu/drm/armada/armada_debugfs.c 	writel(v, dcrtc->base + reg);
writel             52 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl1, priv->base + CRT_CTRL1);
writel             65 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl1 | CRT_CTRL_EN, priv->base + CRT_CTRL1);
writel             66 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
writel             74 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl1 & ~CRT_CTRL_EN, priv->base + CRT_CTRL1);
writel             75 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
writel            110 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl1, priv->base + CRT_CTRL1);
writel            113 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(CRT_H_TOTAL(m->htotal - 1) | CRT_H_DE(m->hdisplay - 1),
writel            115 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(CRT_H_RS_START(m->hsync_start - 1) | CRT_H_RS_END(m->hsync_end),
writel            120 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(CRT_V_TOTAL(m->vtotal - 1) | CRT_V_DE(m->vdisplay - 1),
writel            122 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(CRT_V_RS_START(m->vsync_start) | CRT_V_RS_END(m->vsync_end),
writel            131 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(CRT_DISP_OFFSET(d_offset) | CRT_TERM_COUNT(t_count),
writel            138 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(G5_CRT_THROD_VAL, priv->base + CRT_THROD);
writel            189 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(gem->paddr, priv->base + CRT_ADDR);
writel            198 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(reg | CRT_CTRL_VERTICAL_INTR_STS, priv->base + CRT_CTRL1);
writel            201 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(reg, priv->base + CRT_CTRL1);
writel            212 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(reg, priv->base + CRT_CTRL1);
writel            215 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(reg | CRT_CTRL_VERTICAL_INTR_STS, priv->base + CRT_CTRL1);
writel             87 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 		writel(reg, priv->base + CRT_CTRL1);
writel            149 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 	writel(0, priv->base + CRT_CTRL1);
writel            150 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 	writel(0, priv->base + CRT_CTRL2);
writel           1129 drivers/gpu/drm/ast/ast_mode.c 			writel(data32.ul, dstxor);
writel           1215 drivers/gpu/drm/ast/ast_mode.c 		writel(csum, dst);
writel           1216 drivers/gpu/drm/ast/ast_mode.c 		writel(width, dst + AST_HWC_SIGNATURE_SizeX);
writel           1217 drivers/gpu/drm/ast/ast_mode.c 		writel(height, dst + AST_HWC_SIGNATURE_SizeY);
writel           1218 drivers/gpu/drm/ast/ast_mode.c 		writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
writel           1219 drivers/gpu/drm/ast/ast_mode.c 		writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
writel           1262 drivers/gpu/drm/ast/ast_mode.c 	writel(x, sig + AST_HWC_SIGNATURE_X);
writel           1263 drivers/gpu/drm/ast/ast_mode.c 	writel(y, sig + AST_HWC_SIGNATURE_Y);
writel            191 drivers/gpu/drm/ati_pcigart.c 				writel(val, (void __iomem *)map->handle + offset);
writel             56 drivers/gpu/drm/bochs/bochs_hw.c 	writel(0xbebebebe, bochs->mmio + 0x604);
writel             64 drivers/gpu/drm/bochs/bochs_hw.c 	writel(0x1e1e1e1e, bochs->mmio + 0x604);
writel             33 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
writel             37 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
writel             47 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
writel             61 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP);
writel             69 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1);
writel             72 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
writel             79 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
writel             80 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
writel             81 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
writel             82 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
writel             83 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5);
writel             87 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3);
writel             91 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1);
writel             95 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL);
writel            101 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(INT_POL1 | INT_POL0, dp->reg_base + ANALOGIX_DP_INT_CTL);
writel            104 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0xff, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
writel            105 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x4f, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_2);
writel            106 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0xe0, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_3);
writel            107 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0xe7, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
writel            108 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x63, dp->reg_base + ANALOGIX_DP_INT_STA);
writel            111 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
writel            112 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
writel            113 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
writel            114 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
writel            115 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x00, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
writel            133 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
writel            138 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
writel            144 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
writel            145 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
writel            146 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
writel            147 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
writel            149 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x0, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
writel            150 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x0, dp->reg_base + ANALOGIX_DP_HDCP_CTL);
writel            152 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x5e, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_L);
writel            153 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x1a, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_H);
writel            155 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x10, dp->reg_base + ANALOGIX_DP_LINK_DEBUG_CTL);
writel            157 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x0, dp->reg_base + ANALOGIX_DP_PHY_TEST);
writel            159 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x0, dp->reg_base + ANALOGIX_DP_VIDEO_FIFO_THRD);
writel            160 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x20, dp->reg_base + ANALOGIX_DP_AUDIO_MARGIN);
writel            162 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x4, dp->reg_base + ANALOGIX_DP_M_VID_GEN_FILTER_TH);
writel            163 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x2, dp->reg_base + ANALOGIX_DP_M_AUD_GEN_FILTER_TH);
writel            165 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x00000101, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
writel            170 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(RESET_DP_TX, dp->reg_base + ANALOGIX_DP_TX_SW_RESET);
writel            179 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
writel            182 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
writel            185 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
writel            188 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
writel            191 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
writel            201 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
writel            205 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
writel            214 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
writel            217 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
writel            247 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + pd_addr);
writel            273 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + phy_pd_addr);
writel            283 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + phy_pd_addr);
writel            293 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + phy_pd_addr);
writel            303 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + phy_pd_addr);
writel            313 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + phy_pd_addr);
writel            332 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + phy_pd_addr);
writel            339 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 			writel(reg, dp->reg_base + phy_pd_addr);
writel            342 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 			writel(reg, dp->reg_base + phy_pd_addr);
writel            345 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 			writel(reg, dp->reg_base + phy_pd_addr);
writel            348 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 			writel(0x00, dp->reg_base + phy_pd_addr);
writel            364 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
writel            368 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
writel            388 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
writel            400 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
writel            403 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
writel            417 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
writel            426 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
writel            463 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
writel            472 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
writel            490 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
writel            494 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL);
writel            499 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
writel            524 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
writel            536 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
writel            551 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA);
writel            556 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
writel            582 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
writel            586 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
writel            588 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
writel            590 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
writel            594 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
writel            602 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
writel            621 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
writel            637 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
writel            656 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
writel            660 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
writel            672 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
writel            676 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
writel            680 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
writel            684 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
writel            690 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
writel            705 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
writel            716 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
writel            727 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
writel            738 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
writel            747 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
writel            756 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
writel            765 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
writel            774 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
writel            803 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
writel            809 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
writel            817 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
writel            820 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
writel            823 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
writel            826 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
writel            829 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8);
writel            840 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2);
writel            849 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
writel            857 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
writel            867 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
writel            889 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
writel            891 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0);
writel            893 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1);
writel            895 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2);
writel            898 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0);
writel            900 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1);
writel            902 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2);
writel            906 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
writel            908 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_0);
writel            909 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(0x80, dp->reg_base + ANALOGIX_DP_N_VID_1);
writel            910 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_2);
writel            921 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
writel            925 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
writel            937 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
writel            942 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
writel            952 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
writel            960 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
writel            982 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
writel            987 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
writel            992 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
writel            997 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
writel           1000 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
writel           1009 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
writel           1018 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
writel           1023 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(PSR_VID_CRC_ENABLE, dp->reg_base + ANALOGIX_DP_CRC_CON);
writel           1049 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
writel           1052 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(PSR_FRAME_UP_TYPE_BURST | PSR_CRC_SEL_HARDWARE,
writel           1056 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(vsc->sdp_header.HB0, dp->reg_base + ANALOGIX_DP_SPD_HB0);
writel           1057 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(vsc->sdp_header.HB1, dp->reg_base + ANALOGIX_DP_SPD_HB1);
writel           1058 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(vsc->sdp_header.HB2, dp->reg_base + ANALOGIX_DP_SPD_HB2);
writel           1059 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(vsc->sdp_header.HB3, dp->reg_base + ANALOGIX_DP_SPD_HB3);
writel           1062 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x00, dp->reg_base + ANALOGIX_DP_SPD_PB0);
writel           1063 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x16, dp->reg_base + ANALOGIX_DP_SPD_PB1);
writel           1064 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0xCE, dp->reg_base + ANALOGIX_DP_SPD_PB2);
writel           1065 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(0x5D, dp->reg_base + ANALOGIX_DP_SPD_PB3);
writel           1068 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(vsc->db[0], dp->reg_base + ANALOGIX_DP_VSC_SHADOW_DB0);
writel           1069 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(vsc->db[1], dp->reg_base + ANALOGIX_DP_VSC_SHADOW_DB1);
writel           1074 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(val, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
writel           1079 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
writel           1084 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
writel           1117 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
writel           1145 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
writel           1149 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
writel           1151 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
writel           1153 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
writel           1158 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 			writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 +
writel           1171 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
writel           1190 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA);
writel           1196 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
writel            705 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(val, dsi->regs + MCTL_MAIN_DATA_CTL);
writel            708 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(val, dsi->regs + MCTL_MAIN_EN);
writel            721 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(DPHY_CMN_PSO | DPHY_PLL_PSO | DPHY_ALL_D_PDN | DPHY_C_PDN |
writel            731 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(PLL_LOCKED, dsi->regs + MCTL_MAIN_STS_CLR);
writel            732 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(DPHY_CMN_PSO | DPHY_ALL_D_PDN | DPHY_C_PDN | DPHY_CMN_PDN,
writel            737 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(DPHY_CMN_PSO | DPHY_ALL_D_PDN | DPHY_C_PDN | DPHY_CMN_PDN |
writel            759 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(val, dsi->regs + MCTL_MAIN_PHY_CTL);
writel            764 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(CLK_LANE_ULPOUT_TIME(ulpout) | DATA_LANE_ULPOUT_TIME(ulpout),
writel            767 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(LINK_EN, dsi->regs + MCTL_MAIN_DATA_CTL);
writel            773 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(val, dsi->regs + MCTL_MAIN_EN);
writel            802 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(HBP_LEN(dsi_cfg.hbp) | HSA_LEN(dsi_cfg.hsa),
writel            804 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(HFP_LEN(dsi_cfg.hfp) | HACT_LEN(dsi_cfg.hact),
writel            807 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(VBP_LEN(mode->crtc_vtotal - mode->crtc_vsync_end - 1) |
writel            811 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(mode->crtc_vdisplay, dsi->regs + VID_VSIZE2);
writel            816 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(BLK_LINE_PULSE_PKT_LEN(tmp), dsi->regs + VID_BLKSIZE2);
writel            818 drivers/gpu/drm/bridge/cdns-dsi.c 		writel(MAX_LINE_LIMIT(tmp - DSI_NULL_FRAME_OVERHEAD),
writel            823 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(BLK_LINE_EVENT_PKT_LEN(tmp), dsi->regs + VID_BLKSIZE1);
writel            825 drivers/gpu/drm/bridge/cdns-dsi.c 		writel(MAX_LINE_LIMIT(tmp - DSI_NULL_FRAME_OVERHEAD),
writel            837 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(REG_WAKEUP_TIME(reg_wakeup) | REG_LINE_DURATION(tmp),
writel            858 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(CLK_DIV(div) | HSTX_TIMEOUT(tmp),
writel            861 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(LPRX_TIMEOUT(tmp), dsi->regs + MCTL_DPHY_TIMEOUT2);
writel            898 drivers/gpu/drm/bridge/cdns-dsi.c 		writel(tmp, dsi->regs + VID_MAIN_CTL);
writel            910 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(tmp, dsi->regs + MCTL_MAIN_DATA_CTL);
writel            913 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(tmp, dsi->regs + MCTL_MAIN_EN);
writel           1013 drivers/gpu/drm/bridge/cdns-dsi.c 		writel(ctl, dsi->regs + DIRECT_CMD_STS_CTL);
writel           1079 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(readl(dsi->regs + MCTL_MAIN_DATA_CTL) | ctl,
writel           1082 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(cmd, dsi->regs + DIRECT_CMD_MAIN_SETTINGS);
writel           1092 drivers/gpu/drm/bridge/cdns-dsi.c 		writel(val, dsi->regs + DIRECT_CMD_WRDATA);
writel           1096 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(wait, dsi->regs + DIRECT_CMD_STS_CLR);
writel           1097 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(wait, dsi->regs + DIRECT_CMD_STS_CTL);
writel           1099 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + DIRECT_CMD_SEND);
writel           1105 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(wait, dsi->regs + DIRECT_CMD_STS_CLR);
writel           1106 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + DIRECT_CMD_STS_CTL);
writel           1108 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(readl(dsi->regs + MCTL_MAIN_DATA_CTL) & ~ctl,
writel           1226 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + MCTL_MAIN_DATA_CTL);
writel           1227 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + MCTL_MAIN_EN);
writel           1228 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + MCTL_MAIN_PHY_CTL);
writel           1239 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + MCTL_MAIN_STS_CTL);
writel           1240 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + MCTL_DPHY_ERR_CTL1);
writel           1241 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + CMD_MODE_STS_CTL);
writel           1242 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + DIRECT_CMD_STS_CTL);
writel           1243 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + DIRECT_CMD_RD_STS_CTL);
writel           1244 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + VID_MODE_STS_CTL);
writel           1245 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + TVG_STS_CTL);
writel           1246 drivers/gpu/drm/bridge/cdns-dsi.c 	writel(0, dsi->regs + DPI_IRQ_EN);
writel            285 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c 	writel(val, dsi->base + reg);
writel            152 drivers/gpu/drm/etnaviv/etnaviv_gpu.h 	writel(data, gpu->mmio + reg);
writel             99 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + reg);
writel            113 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + DECON_VIDINTCON0);
writel            130 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(0, ctx->addr + DECON_VIDINTCON0);
writel            181 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
writel            187 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F | TRIGCON_HWTRIGMASK
writel            223 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + DECON_VIDOUTCON0);
writel            231 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + DECON_VIDTCON2);
writel            240 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDTCON00);
writel            244 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDTCON01);
writel            250 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDTCON10);
writel            254 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDTCON11);
writel            415 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDOSDxA(win));
writel            419 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDOSDxB(win));
writel            422 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDOSDxA(win));
writel            426 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDOSDxB(win));
writel            431 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + DECON_VIDOSDxC(win));
writel            435 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + DECON_VIDOSDxD(win));
writel            437 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(dma_addr, ctx->addr + DECON_VIDW0xADD0B0(win));
writel            440 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
writel            448 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(val, ctx->addr + DECON_VIDW0xADD2(win));
writel            489 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(0, ctx->addr + DECON_VIDCON0);
writel            493 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(VIDCON0_SWRESET, ctx->addr + DECON_VIDCON0);
writel            506 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);
writel            509 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);
writel            510 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 	writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,
writel            693 drivers/gpu/drm/exynos/exynos5433_drm_decon.c 		writel(val, ctx->addr + DECON_VIDINTCON1);
writel            114 drivers/gpu/drm/exynos/exynos7_drm_decon.c 			writel(val, ctx->regs + WINCON(win));
writel            173 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VIDTCON0);
writel            176 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VIDTCON1);
writel            185 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VIDTCON2);
writel            188 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VIDTCON3);
writel            194 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + VIDTCON4);
writel            196 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(mode->vdisplay - 1, ctx->regs + LINECNT_OP_THRESHOLD);
writel            203 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + VIDCON0);
writel            208 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VCLKCON1);
writel            209 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VCLKCON2);
writel            214 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + DECON_UPDATE);
writel            236 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VIDINTCON0);
writel            257 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(val, ctx->regs + VIDINTCON0);
writel            330 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + WINCON(win));
writel            342 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
writel            343 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
writel            364 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + SHADOWCON);
writel            409 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + VIDW_BUF_START(win));
writel            414 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));
writel            415 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));
writel            418 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(state->src.x, ctx->regs + VIDW_OFFSET_X(win));
writel            419 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(state->src.y, ctx->regs + VIDW_OFFSET_Y(win));
writel            428 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + VIDOSD_A(win));
writel            439 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + VIDOSD_B(win));
writel            449 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(alpha, ctx->regs + VIDOSD_C(win));
writel            455 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(alpha, ctx->regs + VIDOSD_D(win));
writel            467 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + WINCON(win));
writel            474 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + DECON_UPDATE);
writel            493 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + WINCON(win));
writel            497 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + DECON_UPDATE);
writel            517 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(VIDCON0_SWRESET, ctx->regs + VIDCON0);
writel            522 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(val, ctx->regs + VIDOUTCON0);
writel            524 drivers/gpu/drm/exynos/exynos7_drm_decon.c 	writel(VCLKCON0_CLKVALUP | VCLKCON0_VCLKFREE, ctx->regs + VCLKCON0);
writel            527 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(VIDCON1_VCLK_HOLD, ctx->regs + VIDCON1(0));
writel            592 drivers/gpu/drm/exynos/exynos7_drm_decon.c 		writel(clear_bit, ctx->regs + VIDINTCON1);
writel            322 drivers/gpu/drm/exynos/exynos_drm_dsi.c 	writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]);
writel            613 drivers/gpu/drm/exynos/exynos_drm_dsi.c 	writel(driver_data->reg_values[PLL_TIMER],
writel            122 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	writel(val, ctx->regs + reg);
writel            129 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	writel(readl(r) | bits, r);
writel            136 drivers/gpu/drm/exynos/exynos_drm_fimc.c 	writel(readl(r) & ~bits, r);
writel            241 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + reg);
writel            270 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(val, ctx->regs + VIDINTCON0);
writel            296 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(val, ctx->regs + VIDINTCON0);
writel            329 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + WINCON(win));
writel            343 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + SHADOWCON);
writel            451 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, timing_base + TRIGCON);
writel            471 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(val, timing_base + I80IFCONFAx(0));
writel            474 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(0, timing_base + I80IFCONFBx(0));
writel            496 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
writel            506 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
writel            516 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
writel            520 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(ctx->vidout_con, timing_base + VIDOUT_CON);
writel            550 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
writel            567 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDCON0);
writel            623 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDOSD_C(win));
writel            627 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDWnALPHA0(win));
writel            631 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDWnALPHA1(win));
writel            721 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
writel            722 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
writel            759 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + reg);
writel            811 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
writel            816 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
writel            831 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
writel            838 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDOSD_A(win));
writel            850 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + VIDOSD_B(win));
writel            862 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(val, ctx->regs + offset);
writel            936 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(0, ctx->regs + VIDCON0);
writel            961 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(reg, timing_base + TRIGCON);
writel           1006 drivers/gpu/drm/exynos/exynos_drm_fimd.c 	writel(val, ctx->regs + DP_MIE_CLKCON);
writel           1031 drivers/gpu/drm/exynos/exynos_drm_fimd.c 		writel(clear_bit, ctx->regs + VIDINTCON1);
writel            264 drivers/gpu/drm/exynos/exynos_drm_g2d.c 	writel(G2D_R | G2D_SFRCLEAR, g2d->regs + G2D_SOFT_RESET);
writel             65 drivers/gpu/drm/exynos/exynos_drm_gsc.c #define gsc_write(cfg, offset)	writel(cfg, ctx->regs + (offset))
writel            141 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(MIC_SW_RST, mic->reg + MIC_OP);
writel            162 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(reg, mic->reg + MIC_V_TIMING_0);
writel            166 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(reg, mic->reg + MIC_V_TIMING_1);
writel            171 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(reg, mic->reg + MIC_INPUT_TIMING_0);
writel            175 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(reg, mic->reg + MIC_INPUT_TIMING_1);
writel            186 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(reg, mic->reg + MIC_IMG_SIZE);
writel            197 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(reg, mic->reg + MIC_2D_OUTPUT_TIMING_2);
writel            203 drivers/gpu/drm/exynos/exynos_drm_mic.c 		writel(reg, mic->reg + MIC_2D_OUTPUT_TIMING_0);
writel            207 drivers/gpu/drm/exynos/exynos_drm_mic.c 		writel(reg, mic->reg + MIC_2D_OUTPUT_TIMING_1);
writel            227 drivers/gpu/drm/exynos/exynos_drm_mic.c 	writel(reg, mic->reg + MIC_OP);
writel             36 drivers/gpu/drm/exynos/exynos_drm_rotator.c #define rot_write(cfg, offset)	writel(cfg, rot->regs + (offset))
writel             27 drivers/gpu/drm/exynos/exynos_drm_scaler.c #define scaler_write(cfg, offset)	writel(cfg, scaler->regs + (offset))
writel            681 drivers/gpu/drm/exynos/exynos_hdmi.c 	writel(value, hdata->regs + hdmi_map_reg(hdata, reg_id));
writel            690 drivers/gpu/drm/exynos/exynos_hdmi.c 		writel(val & 0xff, hdata->regs + reg_id);
writel            700 drivers/gpu/drm/exynos/exynos_hdmi.c 		writel(*buf++, hdata->regs + reg_id);
writel            711 drivers/gpu/drm/exynos/exynos_hdmi.c 	writel(value, hdata->regs + reg_id);
writel            730 drivers/gpu/drm/exynos/exynos_hdmi.c 			writel(buf[i], hdata->regs_hdmiphy +
writel           1418 drivers/gpu/drm/exynos/exynos_hdmi.c 		writel(v, hdata->regs_hdmiphy + HDMIPHY5433_MODE_SET_DONE);
writel            190 drivers/gpu/drm/exynos/exynos_mixer.c 	writel(val, ctx->vp_regs + reg_id);
writel            199 drivers/gpu/drm/exynos/exynos_mixer.c 	writel(val, ctx->vp_regs + reg_id);
writel            210 drivers/gpu/drm/exynos/exynos_mixer.c 	writel(val, ctx->mixer_regs + reg_id);
writel            219 drivers/gpu/drm/exynos/exynos_mixer.c 	writel(val, ctx->mixer_regs + reg_id);
writel             36 drivers/gpu/drm/gma500/oaktrail_hdmi.c #define HDMI_WRITE(reg, val)	writel(val, hdmi_dev->regs + (reg))
writel            247 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	writel(0xff11d118, base + 0x0c);
writel            248 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	writel(0x7fffffdf, base + 0x80);
writel            249 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	writel(0x42005, base + 0x0);
writel            253 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	writel(0xff11d118, base + 0x0c);
writel            254 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	writel(0x7fffffff, base + 0x80);
writel            255 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	writel(0x42005, base + 0x0);
writel             36 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c #define HDMI_WRITE(reg, val)	writel(val, hdmi_dev->regs + (reg))
writel            266 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c 	writel((temp | 0x00000a00), (base +  0x44));
writel            123 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(gpu_addr, priv->mmio + HIBMC_CRT_FB_ADDRESS);
writel            131 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_WIDTH, reg) |
writel            140 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL);
writel            261 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(val, priv->mmio + CRT_PLL1_HS);
writel            264 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(val, priv->mmio + CRT_PLL1_HS);
writel            266 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(pll, priv->mmio + CRT_PLL1_HS);
writel            271 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(val, priv->mmio + CRT_PLL1_HS);
writel            276 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(val, priv->mmio + CRT_PLL1_HS);
writel            281 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(val, priv->mmio + CRT_PLL1_HS);
writel            324 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(pll2, priv->mmio + CRT_PLL2_HS);
writel            333 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_FIELD(HIBMC_CRT_AUTO_CENTERING_TL_TOP, 0) |
writel            337 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_FIELD(HIBMC_CRT_AUTO_CENTERING_BR_BOTTOM, y - 1) |
writel            356 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(ctrl, priv->mmio + HIBMC_CRT_DISP_CTL);
writel            370 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(format_pll_reg(), priv->mmio + HIBMC_CRT_PLL_CTRL);
writel            371 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_FIELD(HIBMC_CRT_HORZ_TOTAL_TOTAL, mode->htotal - 1) |
writel            375 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_FIELD(HIBMC_CRT_HORZ_SYNC_WIDTH, width) |
writel            379 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_FIELD(HIBMC_CRT_VERT_TOTAL_TOTAL, mode->vtotal - 1) |
writel            383 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_FIELD(HIBMC_CRT_VERT_SYNC_HEIGHT, height) |
writel            432 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(1),
writel            442 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(0),
writel             45 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 		writel(HIBMC_RAW_INTERRUPT_VBLANK(1),
writel            148 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	writel(control_value, mmio + HIBMC_POWER_MODE_CTRL);
writel            174 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	writel(gate, mmio + gate_reg);
writel            202 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	writel(reg, priv->mmio + HIBMC_MISC_CTRL);
writel            207 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	writel(reg, priv->mmio + HIBMC_MISC_CTRL);
writel             85 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c 	writel(reg, priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE);
writel            317 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(reg_write, base + PHY_TST_CTRL1);
writel            318 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0x02, base + PHY_TST_CTRL0);
writel            319 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0x00, base + PHY_TST_CTRL0);
writel            324 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(val, base + PHY_TST_CTRL1);
writel            325 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0x02, base + PHY_TST_CTRL0);
writel            326 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0x00, base + PHY_TST_CTRL0);
writel            339 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(val, base + PHY_IF_CFG);
writel            345 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(val, base + CLKMGR_CFG);
writel            376 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0, base + PHY_RSTZ);
writel            377 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0, base + PHY_TST_CTRL0);
writel            378 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(1, base + PHY_TST_CTRL0);
writel            379 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0, base + PHY_TST_CTRL0);
writel            422 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(PHY_ENABLECLK, base + PHY_RSTZ);
writel            424 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(PHY_ENABLECLK | PHY_UNSHUTDOWNZ, base + PHY_RSTZ);
writel            426 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(PHY_ENABLECLK | PHY_UNRSTZ | PHY_UNSHUTDOWNZ, base + PHY_RSTZ);
writel            461 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(val, base + DPI_COLOR_CODING);
writel            465 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(val, base +  DPI_CFG_POL);
writel            494 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(hsa_time, base + VID_HSA_TIME);
writel            495 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(hbp_time, base + VID_HBP_TIME);
writel            496 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(hline_time, base + VID_HLINE_TIME);
writel            498 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(vsw, base + VID_VSA_LINES);
writel            499 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(vbp, base + VID_VBP_LINES);
writel            500 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(vfp, base + VID_VFP_LINES);
writel            501 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(mode->vdisplay, base + VID_VACTIVE_LINES);
writel            502 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(mode->hdisplay, base + VID_PKT_SIZE);
writel            530 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(val, base + VID_MODE_CFG);
writel            532 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(PHY_TXREQUESTCLKHS, base + LPCLK_CTRL);
writel            533 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(DSI_VIDEO_MODE, base + MODE_CFG);
writel            552 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(RESET, base + PWR_UP);
writel            564 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(POWERUP, base + PWR_UP);
writel            579 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0, base + PWR_UP);
writel            580 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0, base + LPCLK_CTRL);
writel            581 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	writel(0, base + PHY_RSTZ);
writel             96 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h 	writel(tmp, addr);
writel            223 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h 	writel(tmp, addr);
writel            124 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(0, base + ADE_OVLY1_TRANS_CFG);
writel            125 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(0, base + ADE_OVLY_CTL);
writel            126 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(0, base + ADE_OVLYX_CTL(OUT_OVLY));
writel            128 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(MASK(32), base + ADE_SOFT_RST_SEL(0));
writel            129 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(MASK(32), base + ADE_SOFT_RST_SEL(1));
writel            130 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(MASK(32), base + ADE_RELOAD_DIS(0));
writel            131 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(MASK(32), base + ADE_RELOAD_DIS(1));
writel            193 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel((hbp << HBP_OFST) | hfp, base + LDI_HRZ_CTRL0);
writel            195 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(hsw - 1, base + LDI_HRZ_CTRL1);
writel            196 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel((vbp << VBP_OFST) | vfp, base + LDI_VRT_CTRL0);
writel            198 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(vsw - 1, base + LDI_VRT_CTRL1);
writel            200 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(((height - 1) << VSIZE_OFST) | (width - 1),
writel            202 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(plr_flags, base + LDI_PLR_CTRL);
writel            205 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(((width - 1) << OUTPUT_XSIZE_OFST) | (height - 1),
writel            209 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(CTRAN_BYPASS_ON, base + ADE_CTRAN_DIS(ADE_CTRAN6));
writel            211 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(width * height - 1, base + ADE_CTRAN_IMAGE_SIZE(ADE_CTRAN6));
writel            250 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(ADE_DISABLE, base + LDI_CTRL);
writel            252 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(DSI_PCLK_OFF, base + LDI_HDMI_DSI_GT);
writel            331 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(ADE_ENABLE, base + ADE_OVLYX_CTL(OUT_OVLY));
writel            335 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(DISP_SRC_OVLY2, base + ADE_DISP_SRC_CFG);
writel            338 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(ADE_ENABLE, base + ADE_EN);
writel            340 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(NORMAL_MODE, base + LDI_WORK_MODE);
writel            341 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel((out_fmt << BPP_OFST) | DATA_GATE_EN | LDI_EN,
writel            344 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(DSI_PCLK_ON, base + LDI_HDMI_DSI_GT);
writel            409 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(ADE_ENABLE, base + ADE_OVLYX_CTL(comp));
writel            513 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 		writel(ADE_ENABLE, base + ADE_EN);
writel            574 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel((fmt << 16) & 0x1f0000, base + reg_ctrl);
writel            575 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(addr, base + reg_addr);
writel            576 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel((in_h << 16) | stride, base + reg_size);
writel            577 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(stride, base + reg_stride);
writel            578 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(in_h * stride, base + reg_space);
writel            579 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(ADE_ENABLE, base + reg_en);
writel            589 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(0, base + reg_en);
writel            616 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(disable_val, base + ADE_CLIP_DISABLE(ch));
writel            617 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel((fb_w - 1) << 16 | (in_h - 1), base + ADE_CLIP_SIZE0(ch));
writel            618 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(clip_left << 16 | clip_right, base + ADE_CLIP_SIZE1(ch));
writel            624 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(1, base + ADE_CLIP_DISABLE(ch));
writel            681 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(x0 << 16 | y0, base + ADE_OVLY_CH_XY0(ovly_ch));
writel            682 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(x1 << 16 | y1, base + ADE_OVLY_CH_XY1(ovly_ch));
writel            688 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	writel(val, base + ADE_OVLY_CH_CTL(ovly_ch));
writel            701 drivers/gpu/drm/i915/gt/intel_lrc.c 		writel(lower_32_bits(desc), execlists->submit_reg + port * 2);
writel            702 drivers/gpu/drm/i915/gt/intel_lrc.c 		writel(upper_32_bits(desc), execlists->submit_reg + port * 2 + 1);
writel            704 drivers/gpu/drm/i915/gt/intel_lrc.c 		writel(upper_32_bits(desc), execlists->submit_reg);
writel            705 drivers/gpu/drm/i915/gt/intel_lrc.c 		writel(lower_32_bits(desc), execlists->submit_reg);
writel            794 drivers/gpu/drm/i915/gt/intel_lrc.c 		writel(EL_CTRL_LOAD, execlists->ctrl_reg);
writel             89 drivers/gpu/drm/i915/intel_uncore.c #define fw_set(d, val) writel(_MASKED_BIT_ENABLE((val)), (d)->reg_set)
writel             90 drivers/gpu/drm/i915/intel_uncore.c #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
writel            415 drivers/gpu/drm/i915/intel_uncore.h 	writel(value, base + i915_mmio_reg_offset(reg))
writel             11 drivers/gpu/drm/lima/lima_bcast.c #define bcast_write(reg, data) writel(data, ip->iomem + reg)
writel             12 drivers/gpu/drm/lima/lima_dlbu.c #define dlbu_write(reg, data) writel(data, ip->iomem + reg)
writel             15 drivers/gpu/drm/lima/lima_gp.c #define gp_write(reg, data) writel(data, ip->iomem + reg)
writel            135 drivers/gpu/drm/lima/lima_gp.c 		writel(f[i], ip->iomem + LIMA_GP_VSCL_START_ADDR + i * 4);
writel             11 drivers/gpu/drm/lima/lima_l2_cache.c #define l2_cache_write(reg, data) writel(data, ip->iomem + reg)
writel             14 drivers/gpu/drm/lima/lima_mmu.c #define mmu_write(reg, data) writel(data, ip->iomem + reg)
writel             11 drivers/gpu/drm/lima/lima_pmu.c #define pmu_write(reg, data) writel(data, ip->iomem + reg)
writel             18 drivers/gpu/drm/lima/lima_pp.c #define pp_write(reg, data) writel(data, ip->iomem + reg)
writel            163 drivers/gpu/drm/lima/lima_pp.c 		writel(frame[i], ip->iomem + LIMA_PP_FRAME + i * 4);
writel            167 drivers/gpu/drm/lima/lima_pp.c 			writel(wb[n++], ip->iomem + LIMA_PP_WB(i) + j * 4);
writel             99 drivers/gpu/drm/mcde/mcde_display.c 				writel(val, mcde->regs + MCDE_CRA0);
writel            122 drivers/gpu/drm/mcde/mcde_display.c 	writel(mispp, mcde->regs + MCDE_RISPP);
writel            129 drivers/gpu/drm/mcde/mcde_display.c 	writel(misovl, mcde->regs + MCDE_RISOVL);
writel            134 drivers/gpu/drm/mcde/mcde_display.c 	writel(mischnl, mcde->regs + MCDE_RISCHNL);
writel            140 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + MCDE_IMSCPP);
writel            141 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + MCDE_IMSCOVL);
writel            142 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + MCDE_IMSCCHNL);
writel            145 drivers/gpu/drm/mcde/mcde_display.c 	writel(0xFFFFFFFF, mcde->regs + MCDE_RISPP);
writel            146 drivers/gpu/drm/mcde/mcde_display.c 	writel(0xFFFFFFFF, mcde->regs + MCDE_RISOVL);
writel            147 drivers/gpu/drm/mcde/mcde_display.c 	writel(0xFFFFFFFF, mcde->regs + MCDE_RISCHNL);
writel            322 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + conf);
writel            327 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + cr);
writel            401 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + conf1);
writel            431 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + conf2);
writel            434 drivers/gpu/drm/mcde/mcde_display.c 	writel(mcde->stride, mcde->regs + ljinc);
writel            436 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + crop);
writel            448 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + cr);
writel            455 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + comp);
writel            519 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + sync);
writel            524 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + conf);
writel            532 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + stat);
writel            533 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + bgcol);
writel            538 drivers/gpu/drm/mcde/mcde_display.c 		writel(MCDE_CHNLXMUXING_FIFO_ID_FIFO_A,
writel            542 drivers/gpu/drm/mcde/mcde_display.c 		writel(MCDE_CHNLXMUXING_FIFO_ID_FIFO_B,
writel            576 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + ctrl);
writel            581 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + cr0);
writel            589 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + cr1);
writel            663 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + conf0);
writel            665 drivers/gpu/drm/mcde/mcde_display.c 	writel(formatter_frame, mcde->regs + frame);
writel            666 drivers/gpu/drm/mcde/mcde_display.c 	writel(pkt_size, mcde->regs + pkt);
writel            667 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + sync);
writel            673 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + cmdw);
writel            679 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + delay0);
writel            680 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + delay1);
writel            704 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + cr);
writel            732 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + cr);
writel            791 drivers/gpu/drm/mcde/mcde_display.c 		writel(MCDE_CHNLXSYNCHSW_SW_TRIG, mcde->regs + synsw);
writel            932 drivers/gpu/drm/mcde/mcde_display.c 		writel(val, mcde->regs + MCDE_VSCRC0);
writel            936 drivers/gpu/drm/mcde/mcde_display.c 		writel(val, mcde->regs + MCDE_CRC);
writel            980 drivers/gpu/drm/mcde/mcde_display.c 	writel(MCDE_CHNLXSYNCHSW_SW_TRIG,
writel            998 drivers/gpu/drm/mcde/mcde_display.c 	writel(buffer_address, mcde->regs + MCDE_EXTSRCXA0);
writel           1003 drivers/gpu/drm/mcde/mcde_display.c 	writel(buffer_address + mcde->stride, mcde->regs + MCDE_EXTSRCXA1);
writel           1078 drivers/gpu/drm/mcde/mcde_display.c 	writel(val, mcde->regs + MCDE_IMSCPP);
writel           1090 drivers/gpu/drm/mcde/mcde_display.c 	writel(0, mcde->regs + MCDE_IMSCPP);
writel           1092 drivers/gpu/drm/mcde/mcde_display.c 	writel(0xFFFFFFFF, mcde->regs + MCDE_RISPP);
writel            157 drivers/gpu/drm/mcde/mcde_drv.c 	writel(val, mcde->regs + MCDE_RISERR);
writel            458 drivers/gpu/drm/mcde/mcde_drv.c 	writel(val, mcde->regs + MCDE_CONF0);
writel            463 drivers/gpu/drm/mcde/mcde_drv.c 	writel(val, mcde->regs + MCDE_CR);
writel            467 drivers/gpu/drm/mcde/mcde_drv.c 	writel(0, mcde->regs + MCDE_IMSCERR);
writel            468 drivers/gpu/drm/mcde/mcde_drv.c 	writel(0xFFFFFFFF, mcde->regs + MCDE_RISERR);
writel             96 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_DIRECT_CMD_STS_CLR);
writel            113 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_CMD_MODE_STS_CLR);
writel            118 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_DIRECT_CMD_RD_STS_CLR);
writel            123 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_TG_STS_CLR);
writel            128 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_MODE_STS_CLR);
writel            220 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_DIRECT_CMD_MAIN_SETTINGS);
writel            228 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_DIRECT_CMD_WRDAT0);
writel            233 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_DIRECT_CMD_WRDAT1);
writel            239 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_DIRECT_CMD_WRDAT2);
writel            245 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_DIRECT_CMD_WRDAT3);
writel            248 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(~0, d->regs + DSI_DIRECT_CMD_STS_CLR);
writel            249 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(~0, d->regs + DSI_CMD_MODE_STS_CLR);
writel            251 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(1, d->regs + DSI_DIRECT_CMD_SEND);
writel            281 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(1, d->regs + DSI_DIRECT_CMD_RD_INIT);
writel            314 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(~0, d->regs + DSI_DIRECT_CMD_STS_CLR);
writel            315 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(~0, d->regs + DSI_CMD_MODE_STS_CLR);
writel            341 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_DIRECT_CMD_MAIN_SETTINGS);
writel            344 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR |
writel            350 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_DIRECT_CMD_STS_CTL);
writel            353 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR |
writel            359 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_CMD_MODE_STS_CTL);
writel            362 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(1, d->regs + DSI_DIRECT_CMD_SEND);
writel            420 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_MAIN_CTL);
writel            433 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_VSIZE);
writel            475 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_HSIZE1);
writel            479 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_HSIZE2);
writel            502 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_VID_BLKSIZE2);
writel            506 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_VID_BLKSIZE1);
writel            517 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_DPHY_TIME);
writel            529 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_VID_BLKSIZE1);
writel            530 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(blkeol_pck, d->regs + DSI_VID_VCA_SETTING2);
writel            532 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(blkeol_duration, d->regs + DSI_VID_PCK_TIME);
writel            533 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(blkeol_duration - 6, d->regs + DSI_VID_VCA_SETTING1);
writel            540 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_VCA_SETTING2);
writel            545 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL);
writel            550 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_CMD_MODE_CTL);
writel            556 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_VID_MODE_STS_CTL);
writel            561 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL);
writel            571 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(0, d->regs + DSI_MCTL_INTEGRATION_MODE);
writel            580 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL);
writel            584 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_CMD_MODE_CTL);
writel            597 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_DPHY_STATIC);
writel            613 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_MAIN_PHY_CTL);
writel            617 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_ULPOUT_TIME);
writel            619 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_0_90,
writel            626 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_DPHY_TIMEOUT);
writel            634 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_MCTL_MAIN_EN);
writel            662 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(val, d->regs + DSI_CMD_MODE_CTL);
writel            745 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_CMD_MODE_CTL);
writel            796 drivers/gpu/drm/mcde/mcde_dsi.c 	writel(0, d->regs + DSI_VID_MODE_STS_CTL);
writel            802 drivers/gpu/drm/mcde/mcde_dsi.c 		writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL);
writel             67 drivers/gpu/drm/mediatek/mtk_cec.c 	writel(tmp, reg);
writel             78 drivers/gpu/drm/mediatek/mtk_cec.c 	writel(tmp, reg);
writel             87 drivers/gpu/drm/mediatek/mtk_cec.c 	writel(val, cec->regs + offset);
writel             52 drivers/gpu/drm/mediatek/mtk_disp_color.c 	writel(w, comp->regs + DISP_COLOR_WIDTH(color));
writel             53 drivers/gpu/drm/mediatek/mtk_disp_color.c 	writel(h, comp->regs + DISP_COLOR_HEIGHT(color));
writel             60 drivers/gpu/drm/mediatek/mtk_disp_color.c 	writel(COLOR_BYPASS_ALL | COLOR_SEQ_SEL,
writel             62 drivers/gpu/drm/mediatek/mtk_disp_color.c 	writel(0x1, comp->regs + DISP_COLOR_START(color));
writel             77 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(0x0, ovl->regs + DISP_REG_OVL_INTSTA);
writel             93 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(0x0, comp->regs + DISP_REG_OVL_INTSTA);
writel            123 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(0x1, comp->regs + DISP_REG_OVL_RST);
writel            124 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(0x0, comp->regs + DISP_REG_OVL_RST);
writel            136 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(0x1, comp->regs + DISP_REG_OVL_RDMA_CTRL(idx));
writel            137 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(OVL_RDMA_MEM_GMC, comp->regs + DISP_REG_OVL_RDMA_GMC(idx));
writel            141 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(reg, comp->regs + DISP_REG_OVL_SRC_CON);
writel            150 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(reg, comp->regs + DISP_REG_OVL_SRC_CON);
writel            152 drivers/gpu/drm/mediatek/mtk_disp_ovl.c 	writel(0x0, comp->regs + DISP_REG_OVL_RDMA_CTRL(idx));
writel             78 drivers/gpu/drm/mediatek/mtk_disp_rdma.c 	writel(0x0, rdma->regs + DISP_REG_RDMA_INT_STATUS);
writel             94 drivers/gpu/drm/mediatek/mtk_disp_rdma.c 	writel(tmp, comp->regs + reg);
writel            147 drivers/gpu/drm/mediatek/mtk_disp_rdma.c 	writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);
writel            218 drivers/gpu/drm/mediatek/mtk_disp_rdma.c 	writel(RDMA_MEM_GMC, comp->regs + DISP_RDMA_MEM_GMC_SETTING_0);
writel            295 drivers/gpu/drm/mediatek/mtk_disp_rdma.c 	writel(0x0, priv->ddp_comp.regs + DISP_REG_RDMA_INT_ENABLE);
writel            296 drivers/gpu/drm/mediatek/mtk_disp_rdma.c 	writel(0x0, priv->ddp_comp.regs + DISP_REG_RDMA_INT_STATUS);
writel            121 drivers/gpu/drm/mediatek/mtk_dpi.c 	writel(tmp, dpi->regs + offset);
writel            519 drivers/gpu/drm/mediatek/mtk_drm_ddp.c 	writel(1, ddp->regs + DISP_REG_MUTEX_EN(mutex->id));
writel            529 drivers/gpu/drm/mediatek/mtk_drm_ddp.c 	writel(0, ddp->regs + DISP_REG_MUTEX_EN(mutex->id));
writel            538 drivers/gpu/drm/mediatek/mtk_drm_ddp.c 	writel(1, ddp->regs + DISP_REG_MUTEX_EN(mutex->id));
writel            539 drivers/gpu/drm/mediatek/mtk_drm_ddp.c 	writel(1, ddp->regs + DISP_REG_MUTEX(mutex->id));
writel            550 drivers/gpu/drm/mediatek/mtk_drm_ddp.c 	writel(0, ddp->regs + DISP_REG_MUTEX(mutex->id));
writel             75 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 		writel(0, comp->regs + DISP_DITHER_5);
writel             76 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 		writel(0, comp->regs + DISP_DITHER_7);
writel             77 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 		writel(DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |
writel             81 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 		writel(DITHER_LSB_ERR_SHIFT_B(MTK_MAX_BPC - bpc) |
writel             86 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 		writel(DISP_DITHERING, comp->regs + CFG);
writel             94 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(w << 16 | h, comp->regs + DISP_OD_SIZE);
writel             95 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(OD_RELAYMODE, comp->regs + DISP_OD_CFG);
writel            101 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(1, comp->regs + DISP_OD_EN);
writel            106 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(UFO_BYPASS, comp->regs + DISP_REG_UFO_START);
writel            113 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(h << 16 | w, comp->regs + DISP_AAL_SIZE);
writel            118 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(AAL_EN, comp->regs + DISP_AAL_EN);
writel            130 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(h << 16 | w, comp->regs + DISP_GAMMA_SIZE);
writel            136 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 	writel(GAMMA_EN, comp->regs  + DISP_GAMMA_EN);
writel            155 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 		writel(reg, comp->regs + DISP_GAMMA_CFG);
writel            162 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 			writel(word, (lut_base + i * 4));
writel            200 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel((temp & ~mask) | (data & mask), dsi->regs + offset);
writel            219 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(timcon0, dsi->regs + DSI_PHY_TIMECON0);
writel            220 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(timcon1, dsi->regs + DSI_PHY_TIMECON1);
writel            221 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(timcon2, dsi->regs + DSI_PHY_TIMECON2);
writel            222 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(timcon3, dsi->regs + DSI_PHY_TIMECON3);
writel            296 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(vid_mode, dsi->regs + DSI_MODE_CTRL);
writel            334 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(vm->vactive, dsi->regs + DSI_VACT_NL);
writel            335 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(ps_bpp_mode, dsi->regs + DSI_PSCTRL);
writel            336 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(ps_wc, dsi->regs + DSI_HSTX_CKL_WC);
writel            364 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(tmp_reg, dsi->regs + DSI_TXRX_CTRL);
writel            396 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(tmp_reg, dsi->regs + DSI_PSCTRL);
writel            413 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(vm->vsync_len, dsi->regs + DSI_VSA_NL);
writel            414 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(vm->vback_porch, dsi->regs + DSI_VBP_NL);
writel            415 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL);
writel            416 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(vm->vactive, dsi->regs + DSI_VACT_NL);
writel            429 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
writel            430 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
writel            431 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
writel            438 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(0, dsi->regs + DSI_START);
writel            439 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(1, dsi->regs + DSI_START);
writel            444 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(0, dsi->regs + DSI_START);
writel            449 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(CMD_MODE, dsi->regs + DSI_MODE_CTRL);
writel            456 drivers/gpu/drm/mediatek/mtk_dsi.c 	writel(inten, dsi->regs + DSI_INTEN);
writel            190 drivers/gpu/drm/mediatek/mtk_hdmi.c 	writel(val, hdmi->regs + offset);
writel            200 drivers/gpu/drm/mediatek/mtk_hdmi.c 	writel(tmp, reg);
writel            210 drivers/gpu/drm/mediatek/mtk_hdmi.c 	writel(tmp, reg);
writel            220 drivers/gpu/drm/mediatek/mtk_hdmi.c 	writel(tmp, reg);
writel             65 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c 	writel(readl(ddc->regs + offset) | val, ddc->regs + offset);
writel             71 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c 	writel(readl(ddc->regs + offset) & ~val, ddc->regs + offset);
writel             89 drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c 	writel(tmp, ddc->regs + offset);
writel             26 drivers/gpu/drm/mediatek/mtk_hdmi_phy.c 	writel(tmp, reg);
writel             37 drivers/gpu/drm/mediatek/mtk_hdmi_phy.c 	writel(tmp, reg);
writel             48 drivers/gpu/drm/mediatek/mtk_hdmi_phy.c 	writel(tmp, reg);
writel            145 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel(temp & ~bits, mipi_tx->regs + offset);
writel            153 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel(temp | bits, mipi_tx->regs + offset);
writel            161 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel((temp & ~mask) | (data & mask), mipi_tx->regs + offset);
writel            235 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel(pcw, mipi_tx->regs + MIPITX_DSI_PLL_CON2);
writel             89 drivers/gpu/drm/meson/meson_crtc.c 	writel(FIELD_PREP(GENMASK(11, 0), 2303),
writel             93 drivers/gpu/drm/meson/meson_crtc.c 	writel(crtc_state->mode.hdisplay |
writel            125 drivers/gpu/drm/meson/meson_crtc.c 	writel(crtc_state->mode.hdisplay,
writel            129 drivers/gpu/drm/meson/meson_crtc.c 	writel(FIELD_PREP(GENMASK(11, 0), 2303),
writel            172 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
writel            173 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
writel            198 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
writel            199 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);
writel            202 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
writel            210 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));
writel            236 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
writel            237 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
writel            262 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
writel            263 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);
writel            266 drivers/gpu/drm/meson/meson_dw_hdmi.c 	writel(data, dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
writel           1102 drivers/gpu/drm/meson/meson_venc.c 		writel(vmode->enci.sch_adjust,
writel           1617 drivers/gpu/drm/meson/meson_venc.c 	writel(mode->sch_adjust, priv->io_base + _REG(ENCI_VIDEO_SCH));
writel             82 drivers/gpu/drm/meson/meson_viu.c 	writel(((m[0] & 0xfff) << 16) | (m[1] & 0xfff),
writel             84 drivers/gpu/drm/meson/meson_viu.c 	writel(m[2] & 0xfff,
writel             86 drivers/gpu/drm/meson/meson_viu.c 	writel(((m[3] & 0x1fff) << 16) | (m[4] & 0x1fff),
writel             88 drivers/gpu/drm/meson/meson_viu.c 	writel(((m[5] & 0x1fff) << 16) | (m[6] & 0x1fff),
writel             90 drivers/gpu/drm/meson/meson_viu.c 	writel(((m[7] & 0x1fff) << 16) | (m[8] & 0x1fff),
writel             92 drivers/gpu/drm/meson/meson_viu.c 	writel(((m[9] & 0x1fff) << 16) | (m[10] & 0x1fff),
writel             94 drivers/gpu/drm/meson/meson_viu.c 	writel((m[11] & 0x1fff) << 16,
writel             97 drivers/gpu/drm/meson/meson_viu.c 	writel(((m[18] & 0xfff) << 16) | (m[19] & 0xfff),
writel             99 drivers/gpu/drm/meson/meson_viu.c 	writel(m[20] & 0xfff,
writel            112 drivers/gpu/drm/meson/meson_viu.c 		writel(((m[0] & 0xfff) << 16) | (m[1] & 0xfff),
writel            114 drivers/gpu/drm/meson/meson_viu.c 		writel(m[2] & 0xfff,
writel            116 drivers/gpu/drm/meson/meson_viu.c 		writel(((m[3] & 0x1fff) << 16) | (m[4] & 0x1fff),
writel            118 drivers/gpu/drm/meson/meson_viu.c 		writel(((m[5] & 0x1fff) << 16) | (m[6] & 0x1fff),
writel            120 drivers/gpu/drm/meson/meson_viu.c 		writel(((m[7] & 0x1fff) << 16) | (m[8] & 0x1fff),
writel            122 drivers/gpu/drm/meson/meson_viu.c 		writel(((m[9] & 0x1fff) << 16) | (m[10] & 0x1fff),
writel            126 drivers/gpu/drm/meson/meson_viu.c 			writel(((m[11] & 0x1fff) << 16) | (m[12] & 0x1fff),
writel            129 drivers/gpu/drm/meson/meson_viu.c 			writel(((m[13] & 0x1fff) << 16) | (m[14] & 0x1fff),
writel            132 drivers/gpu/drm/meson/meson_viu.c 			writel(((m[15] & 0x1fff) << 16) | (m[16] & 0x1fff),
writel            135 drivers/gpu/drm/meson/meson_viu.c 			writel(m[17] & 0x1fff, priv->io_base +
writel            138 drivers/gpu/drm/meson/meson_viu.c 			writel((m[11] & 0x1fff) << 16, priv->io_base +
writel            141 drivers/gpu/drm/meson/meson_viu.c 		writel(((m[18] & 0xfff) << 16) | (m[19] & 0xfff),
writel            143 drivers/gpu/drm/meson/meson_viu.c 		writel(m[20] & 0xfff,
writel            161 drivers/gpu/drm/meson/meson_viu.c 			writel(((m[i * 2] & 0x1fff) << 16) |
writel            197 drivers/gpu/drm/meson/meson_viu.c 		writel(0, priv->io_base + _REG(addr_port));
writel            200 drivers/gpu/drm/meson/meson_viu.c 			writel(r_map[i * 2] | (r_map[i * 2 + 1] << 16),
writel            203 drivers/gpu/drm/meson/meson_viu.c 		writel(r_map[OSD_OETF_LUT_SIZE - 1] | (g_map[0] << 16),
writel            207 drivers/gpu/drm/meson/meson_viu.c 			writel(g_map[i * 2 + 1] | (g_map[i * 2 + 2] << 16),
writel            211 drivers/gpu/drm/meson/meson_viu.c 			writel(b_map[i * 2] | (b_map[i * 2 + 1] << 16),
writel            214 drivers/gpu/drm/meson/meson_viu.c 		writel(b_map[OSD_OETF_LUT_SIZE - 1],
writel            224 drivers/gpu/drm/meson/meson_viu.c 		writel(0, priv->io_base + _REG(addr_port));
writel            227 drivers/gpu/drm/meson/meson_viu.c 			writel(r_map[i * 2] | (r_map[i * 2 + 1] << 16),
writel            230 drivers/gpu/drm/meson/meson_viu.c 		writel(r_map[OSD_EOTF_LUT_SIZE - 1] | (g_map[0] << 16),
writel            234 drivers/gpu/drm/meson/meson_viu.c 			writel(g_map[i * 2 + 1] | (g_map[i * 2 + 2] << 16),
writel            238 drivers/gpu/drm/meson/meson_viu.c 			writel(b_map[i * 2] | (b_map[i * 2 + 1] << 16),
writel            241 drivers/gpu/drm/meson/meson_viu.c 		writel(b_map[OSD_EOTF_LUT_SIZE - 1],
writel             38 drivers/gpu/drm/meson/meson_vpp.c 	writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL));
writel            222 drivers/gpu/drm/mga/mga_drv.h 	writel(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))
writel            157 drivers/gpu/drm/msm/msm_drv.c 	writel(data, addr);
writel             83 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(ctrl1, mxsfb->base + LCDC_CTRL1);
writel             84 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(ctrl, mxsfb->base + LCDC_CTRL);
writel            116 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(reg, mxsfb->base + LCDC_CTRL);
writel            128 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET);
writel            133 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(reg, mxsfb->base + LCDC_VDCTRL4);
writel            135 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET);
writel            146 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_CLR);
writel            153 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(reg, mxsfb->base + LCDC_VDCTRL4);
writel            169 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(mask, addr + MXS_CLR_ADDR);
writel            181 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(MODULE_CLKGATE, reset_addr + MXS_CLR_ADDR);
writel            224 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET);
writel            232 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(TRANSFER_COUNT_SET_VCOUNT(m->crtc_vdisplay) |
writel            258 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(vdctrl0, mxsfb->base + LCDC_VDCTRL0);
writel            263 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(m->crtc_vtotal, mxsfb->base + LCDC_VDCTRL1);
writel            267 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(set_hsync_pulse_width(mxsfb, hsync_pulse_len) |
writel            271 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(SET_HOR_WAIT_CNT(m->crtc_htotal - m->crtc_hsync_start) |
writel            275 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 	writel(SET_DOTCLK_H_VALID_DATA_CNT(m->hdisplay),
writel            289 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 		writel(paddr, mxsfb->base + mxsfb->devdata->cur_buf);
writel            290 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 		writel(paddr, mxsfb->base + mxsfb->devdata->next_buf);
writel            326 drivers/gpu/drm/mxsfb/mxsfb_crtc.c 		writel(paddr, mxsfb->base + mxsfb->devdata->next_buf);
writel            148 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
writel            149 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET);
writel            161 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR);
writel            162 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
writel            309 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
writel            139 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c 	writel(val, dmm->wa_dma_data);
writel            154 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c 		writel(val, dmm->base + reg);
writel            183 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c 		writel(val, dmm->base + reg);
writel             23 drivers/gpu/drm/panfrost/panfrost_job.c #define job_write(dev, reg, data) writel(data, dev->iomem + (reg))
writel             23 drivers/gpu/drm/panfrost/panfrost_mmu.c #define mmu_write(dev, reg, data) writel(data, dev->iomem + reg)
writel            317 drivers/gpu/drm/panfrost/panfrost_regs.h #define gpu_write(dev, reg, data) writel(data, dev->iomem + reg)
writel             45 drivers/gpu/drm/pl111/pl111_display.c 	writel(irq_stat, priv->regs + CLCD_PL111_ICR);
writel            159 drivers/gpu/drm/pl111/pl111_display.c 	writel((ppl << 2) |
writel            164 drivers/gpu/drm/pl111/pl111_display.c 	writel(lpp |
writel            231 drivers/gpu/drm/pl111/pl111_display.c 	writel(tim2, priv->regs + CLCD_TIM2);
writel            234 drivers/gpu/drm/pl111/pl111_display.c 	writel(0, priv->regs + CLCD_TIM3);
writel            338 drivers/gpu/drm/pl111/pl111_display.c 	writel(cntl, priv->regs + priv->ctrl);
writel            351 drivers/gpu/drm/pl111/pl111_display.c 	writel(cntl, priv->regs + priv->ctrl);
writel            371 drivers/gpu/drm/pl111/pl111_display.c 		writel(cntl, priv->regs + priv->ctrl);
writel            384 drivers/gpu/drm/pl111/pl111_display.c 	writel(0, priv->regs + priv->ctrl);
writel            403 drivers/gpu/drm/pl111/pl111_display.c 		writel(addr, priv->regs + CLCD_UBAS);
writel            424 drivers/gpu/drm/pl111/pl111_display.c 	writel(CLCD_IRQ_NEXTBASE_UPDATE, priv->regs + priv->ienb);
writel            435 drivers/gpu/drm/pl111/pl111_display.c 	writel(0, priv->regs + priv->ienb);
writel            524 drivers/gpu/drm/pl111/pl111_display.c 	writel(tim2, priv->regs + CLCD_TIM2);
writel            309 drivers/gpu/drm/pl111/pl111_drv.c 	writel(0, priv->regs + priv->ienb);
writel            407 drivers/gpu/drm/r128/r128_drv.h #define R128_WRITE(reg, val)	writel(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))
writel           1764 drivers/gpu/drm/radeon/cik.c 		writel(v, rdev->doorbell.ptr + index);
writel           4120 drivers/gpu/drm/radeon/r100.c 	writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
writel           4131 drivers/gpu/drm/radeon/r100.c 	writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
writel           4132 drivers/gpu/drm/radeon/r100.c 	writel(v, ((void __iomem *)rdev->rmmio) + RADEON_MM_DATA);
writel            128 drivers/gpu/drm/radeon/r300.c 	writel(entry, ((void __iomem *)ptr) + (i * 4));
writel           2479 drivers/gpu/drm/radeon/radeon.h 		writel(v, ((void __iomem *)rdev->rmmio) + reg);
writel             26 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(clk / 1000000, dp->regs + SW_CLK_H);
writel             45 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SOURCE_DPTX_CAR);
writel             48 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SOURCE_PHY_CAR);
writel             54 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SOURCE_PKT_CAR);
writel             62 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SOURCE_AIF_CAR);
writel             68 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SOURCE_CIPHER_CAR);
writel             72 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SOURCE_CRYPTO_CAR);
writel             75 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + APB_INT_MASK);
writel            101 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + MAILBOX0_WR_DATA);
writel            288 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(APB_IRAM_PATH | APB_DRAM_PATH | APB_XT_RESET,
writel            292 drivers/gpu/drm/rockchip/cdn-dp-reg.c 		writel(*i_mem++, dp->regs + ADDR_IMEM + i);
writel            295 drivers/gpu/drm/rockchip/cdn-dp-reg.c 		writel(*d_mem++, dp->regs + ADDR_DMEM + i);
writel            298 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + APB_CTRL);
writel            795 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + SPDIF_CTRL_ADDR);
writel            798 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + AUDIO_SRC_CNTL);
writel            799 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + AUDIO_SRC_CNFG);
writel            800 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(AUDIO_SW_RST, dp->regs + AUDIO_SRC_CNTL);
writel            801 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + AUDIO_SRC_CNTL);
writel            804 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + SMPL2PKT_CNTL);
writel            805 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(AUDIO_SW_RST, dp->regs + SMPL2PKT_CNTL);
writel            806 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + SMPL2PKT_CNTL);
writel            809 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(AUDIO_SW_RST, dp->regs + FIFO_CNTL);
writel            810 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0, dp->regs + FIFO_CNTL);
writel            846 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(0x0, dp->regs + SPDIF_CTRL_ADDR);
writel            848 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(SYNC_WR_TO_CH_ZERO, dp->regs + FIFO_CNTL);
writel            854 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SMPL2PKT_CNFG);
writel            866 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + AUDIO_SRC_CNFG);
writel            875 drivers/gpu/drm/rockchip/cdn-dp-reg.c 		writel(val, dp->regs + STTS_BIT_CH(i));
writel            909 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + COM_CH_STTS_BITS);
writel            911 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(SMPL2PKT_EN, dp->regs + SMPL2PKT_CNTL);
writel            912 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(I2S_DEC_START, dp->regs + AUDIO_SRC_CNTL);
writel            919 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(SYNC_WR_TO_CH_ZERO, dp->regs + FIFO_CNTL);
writel            922 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SMPL2PKT_CNFG);
writel            923 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(SMPL2PKT_EN, dp->regs + SMPL2PKT_CNTL);
writel            926 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	writel(val, dp->regs + SPDIF_CTRL_ADDR);
writel            300 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 	writel(val, dsi->base + reg);
writel            173 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 	writel(v, vop->regs + offset);
writel            215 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 		writel(v, vop->regs + offset);
writel            494 drivers/gpu/drm/savage/savage_drv.h 	writel(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))
writel             52 drivers/gpu/drm/sis/sis_drv.h #define SIS_WRITE(reg, val)   writel(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))
writel            284 drivers/gpu/drm/sti/sti_cursor.c 	writel(val, cursor->regs + CUR_AWS);
writel            288 drivers/gpu/drm/sti/sti_cursor.c 	writel(val, cursor->regs + CUR_AWE);
writel            291 drivers/gpu/drm/sti/sti_cursor.c 	writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
writel            292 drivers/gpu/drm/sti/sti_cursor.c 	writel(cursor->width, cursor->regs + CUR_PMP);
writel            293 drivers/gpu/drm/sti/sti_cursor.c 	writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);
writel            297 drivers/gpu/drm/sti/sti_cursor.c 	writel((y << 16) | x, cursor->regs + CUR_VPO);
writel            300 drivers/gpu/drm/sti/sti_cursor.c 	writel(cursor->clut_paddr, cursor->regs + CUR_CML);
writel            301 drivers/gpu/drm/sti/sti_cursor.c 	writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
writel            154 drivers/gpu/drm/sti/sti_dvo.c 		writel(awg_ram_code[i],
writel            157 drivers/gpu/drm/sti/sti_dvo.c 		writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
writel            159 drivers/gpu/drm/sti/sti_dvo.c 	writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
writel            220 drivers/gpu/drm/sti/sti_dvo.c 		writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
writel            222 drivers/gpu/drm/sti/sti_dvo.c 	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
writel            245 drivers/gpu/drm/sti/sti_dvo.c 	writel(0x00000000, dvo->regs + DVO_DOF_CFG);
writel            246 drivers/gpu/drm/sti/sti_dvo.c 	writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
writel            267 drivers/gpu/drm/sti/sti_dvo.c 	writel(config->lowbyte,  dvo->regs + DVO_LUT_PROG_LOW);
writel            268 drivers/gpu/drm/sti/sti_dvo.c 	writel(config->midbyte,  dvo->regs + DVO_LUT_PROG_MID);
writel            269 drivers/gpu/drm/sti/sti_dvo.c 	writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
writel            273 drivers/gpu/drm/sti/sti_dvo.c 	writel(val, dvo->regs + DVO_DOF_CFG);
writel            833 drivers/gpu/drm/sti/sti_gdp.c 		writel(gdp->is_curr_top ?
writel            847 drivers/gpu/drm/sti/sti_gdp.c 			writel(dma_updated_top,
writel            852 drivers/gpu/drm/sti/sti_gdp.c 		writel(dma_updated_top, gdp->regs + GAM_GDP_NVN_OFFSET);
writel            270 drivers/gpu/drm/sti/sti_hda.c 	writel(val, hda->regs + offset);
writel            310 drivers/gpu/drm/sti/sti_hda.c 		writel(val, hda->video_dacs_ctrl);
writel            176 drivers/gpu/drm/sti/sti_hdmi.c 	writel(val, hdmi->regs + offset);
writel            397 drivers/gpu/drm/sti/sti_hdmi.c 	writel(val, hdmi->regs + head_offset);
writel            411 drivers/gpu/drm/sti/sti_hdmi.c 		writel(val, hdmi->regs + pack_offset + i);
writel            765 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
writel            835 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(hqvdp->hqvdp_cmd_paddr + btm_cmd_offset,
writel            873 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_RD_PLUG_PAGE_SIZE);
writel            874 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_RD_PLUG_MIN_OPC);
writel            875 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_RD_PLUG_MAX_OPC);
writel            876 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_RD_PLUG_MAX_CHK);
writel            877 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_RD_PLUG_MAX_MSG);
writel            878 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_RD_PLUG_MIN_SPACE);
writel            879 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_RD_PLUG_CONTROL);
writel            881 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_WR_PLUG_PAGE_SIZE);
writel            882 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_WR_PLUG_MIN_OPC);
writel            883 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_WR_PLUG_MAX_OPC);
writel            884 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_WR_PLUG_MAX_CHK);
writel            885 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_WR_PLUG_MAX_MSG);
writel            886 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_WR_PLUG_MIN_SPACE);
writel            887 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_WR_PLUG_CONTROL);
writel            957 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(SW_RESET_CTRL_FULL, hqvdp->regs + HQVDP_MBX_SW_RESET_CTRL);
writel            973 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_rd_plug[i], hqvdp->regs + HQVDP_RD_PLUG + i * 4);
writel            975 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_wr_plug[i], hqvdp->regs + HQVDP_WR_PLUG + i * 4);
writel            980 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(STARTUP_CTRL1_AUTH_IDLE, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1);
writel            983 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(SOFT_VSYNC_SW_CTRL_IRQ, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
writel            984 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
writel            988 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_pmem[i], hqvdp->regs + HQVDP_PMEM + i * 4);
writel            990 drivers/gpu/drm/sti/sti_hqvdp.c 		writel(fw_dmem[i], hqvdp->regs + HQVDP_DMEM + i * 4);
writel            993 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(STARTUP_CTRL2_FETCH_EN, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2);
writel           1009 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(SOFT_VSYNC_HW, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
writel           1225 drivers/gpu/drm/sti/sti_hqvdp.c 	writel(hqvdp->hqvdp_cmd_paddr + cmd_offset,
writel             74 drivers/gpu/drm/sti/sti_mixer.c 	writel(val, mixer->regs + reg_id);
writel            152 drivers/gpu/drm/sti/sti_tvout.c 	writel(val, tvout->regs + offset);
writel            159 drivers/gpu/drm/sti/sti_vid.c 	writel(val, vid->regs + VID_CTL);
writel            166 drivers/gpu/drm/sti/sti_vid.c 	writel((ydo << 16) | xdo, vid->regs + VID_VPO);
writel            167 drivers/gpu/drm/sti/sti_vid.c 	writel((yds << 16) | xds, vid->regs + VID_VPS);
writel            171 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR0_BT709, vid->regs + VID_MPR0);
writel            172 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR1_BT709, vid->regs + VID_MPR1);
writel            173 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR2_BT709, vid->regs + VID_MPR2);
writel            174 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR3_BT709, vid->regs + VID_MPR3);
writel            176 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR0_BT601, vid->regs + VID_MPR0);
writel            177 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR1_BT601, vid->regs + VID_MPR1);
writel            178 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR2_BT601, vid->regs + VID_MPR2);
writel            179 drivers/gpu/drm/sti/sti_vid.c 		writel(VID_MPR3_BT601, vid->regs + VID_MPR3);
writel            190 drivers/gpu/drm/sti/sti_vid.c 	writel(val, vid->regs + VID_CTL);
writel            196 drivers/gpu/drm/sti/sti_vid.c 	writel(VID_CTL_PSI_ENABLE | VID_CTL_IGNORE, vid->regs + VID_CTL);
writel            199 drivers/gpu/drm/sti/sti_vid.c 	writel(VID_ALP_OPAQUE, vid->regs + VID_ALP);
writel            202 drivers/gpu/drm/sti/sti_vid.c 	writel(VID_BC_DFLT, vid->regs + VID_BC);
writel            203 drivers/gpu/drm/sti/sti_vid.c 	writel(VID_TINT_DFLT, vid->regs + VID_TINT);
writel            204 drivers/gpu/drm/sti/sti_vid.c 	writel(VID_CSAT_DFLT, vid->regs + VID_CSAT);
writel            156 drivers/gpu/drm/sti/sti_vtg.c 	writel(1, vtg->regs + VTG_DRST_AUTOC);
writel            179 drivers/gpu/drm/sti/sti_vtg.c 	writel(video_top_field_start, regs + VTG_VID_TFO);
writel            180 drivers/gpu/drm/sti/sti_vtg.c 	writel(video_top_field_stop, regs + VTG_VID_TFS);
writel            181 drivers/gpu/drm/sti/sti_vtg.c 	writel(video_bottom_field_start, regs + VTG_VID_BFO);
writel            182 drivers/gpu/drm/sti/sti_vtg.c 	writel(video_bottom_field_stop, regs + VTG_VID_BFS);
writel            246 drivers/gpu/drm/sti/sti_vtg.c 	writel(mode->htotal, vtg->regs + VTG_CLKLN);
writel            249 drivers/gpu/drm/sti/sti_vtg.c 	writel(mode->vtotal * 2, vtg->regs + VTG_HLFLN);
writel            268 drivers/gpu/drm/sti/sti_vtg.c 		writel(sync[i].hsync,
writel            270 drivers/gpu/drm/sti/sti_vtg.c 		writel(sync[i].vsync_line_top,
writel            272 drivers/gpu/drm/sti/sti_vtg.c 		writel(sync[i].vsync_line_bot,
writel            274 drivers/gpu/drm/sti/sti_vtg.c 		writel(sync[i].vsync_off_top,
writel            276 drivers/gpu/drm/sti/sti_vtg.c 		writel(sync[i].vsync_off_bot,
writel            281 drivers/gpu/drm/sti/sti_vtg.c 	writel(type, vtg->regs + VTG_MODE);
writel            287 drivers/gpu/drm/sti/sti_vtg.c 	writel(0xFFFF, vtg->regs + VTG_HOST_ITS_BCLR);
writel            288 drivers/gpu/drm/sti/sti_vtg.c 	writel(0xFFFF, vtg->regs + VTG_HOST_ITM_BCLR);
writel            289 drivers/gpu/drm/sti/sti_vtg.c 	writel(VTG_IRQ_MASK, vtg->regs + VTG_HOST_ITM_BSET);
writel            371 drivers/gpu/drm/sti/sti_vtg.c 	writel(vtg->irq_status, vtg->regs + VTG_HOST_ITS_BCLR);
writel             89 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c 	writel(val, dsi->base + reg);
writel             92 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
writel            110 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(val, hdmi->base + SUN4I_HDMI_PKT_CTRL_REG(0));
writel            116 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
writel            131 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(SUN4I_HDMI_UNKNOWN_INPUT_SYNC,
writel            147 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(val, hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
writel            151 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(SUN4I_HDMI_VID_TIMING_X(mode->hdisplay) |
writel            157 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(SUN4I_HDMI_VID_TIMING_X(x) | SUN4I_HDMI_VID_TIMING_Y(y),
writel            162 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(SUN4I_HDMI_VID_TIMING_X(x) | SUN4I_HDMI_VID_TIMING_Y(y),
writel            167 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(SUN4I_HDMI_VID_TIMING_X(x) | SUN4I_HDMI_VID_TIMING_Y(y),
writel            177 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(val, hdmi->base + SUN4I_HDMI_VID_TIMING_POL_REG);
writel            297 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(SUN4I_HDMI_CEC_ENABLE, hdmi->base + SUN4I_HDMI_CEC);
writel            308 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(0, hdmi->base + SUN4I_HDMI_CEC);
writel            586 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(SUN4I_HDMI_CTRL_ENABLE, hdmi->base + SUN4I_HDMI_CTRL_REG);
writel            588 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(hdmi->variant->pad_ctrl0_init_val,
writel            594 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(reg, hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
writel            637 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	writel(readl(hdmi->base + SUN4I_HDMI_CEC) & ~SUN4I_HDMI_CEC_TX,
writel             82 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 		writel(reg, hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
writel            158 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 	writel(reg, tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
writel            162 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 	writel(reg | SUN4I_HDMI_PLL_CTRL_DIV(div - tmds->div_offset),
writel            188 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c 	writel(reg | SUN4I_HDMI_PLL_DBG0_TMDS_PARENT(index),
writel             49 drivers/gpu/drm/sun4i/sun8i_tcon_top.c 	writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG);
writel             88 drivers/gpu/drm/sun4i/sun8i_tcon_top.c 	writel(reg, tcon_top->regs + TCON_TOP_PORT_SEL_REG);
writel            183 drivers/gpu/drm/sun4i/sun8i_tcon_top.c 	writel(0, regs + TCON_TOP_PORT_SEL_REG);
writel            184 drivers/gpu/drm/sun4i/sun8i_tcon_top.c 	writel(0, regs + TCON_TOP_GATE_SRC_REG);
writel            112 drivers/gpu/drm/tegra/dc.h 	writel(value, dc->regs + (offset << 2));
writel             81 drivers/gpu/drm/tegra/dpaux.c 	writel(value, dpaux->regs + (offset << 2));
writel            119 drivers/gpu/drm/tegra/dsi.c 	writel(value, dsi->regs + (offset << 2));
writel             22 drivers/gpu/drm/tegra/falcon.c 	writel(value, falcon->regs + offset);
writel            117 drivers/gpu/drm/tegra/hdmi.c 	writel(value, hdmi->regs + (offset << 2));
writel            487 drivers/gpu/drm/tegra/sor.c 	writel(value, sor->regs + (offset << 2));
writel             53 drivers/gpu/drm/tegra/vic.c 	writel(value, vic->regs + offset);
writel             60 drivers/gpu/drm/tve200/tve200_display.c 		writel(val, priv->regs + TVE200_CTRL);
writel             65 drivers/gpu/drm/tve200/tve200_display.c 	writel(stat, priv->regs + TVE200_INT_CLR);
writel            220 drivers/gpu/drm/tve200/tve200_display.c 	writel(ctrl1, priv->regs + TVE200_CTRL);
writel            234 drivers/gpu/drm/tve200/tve200_display.c 	writel(0, priv->regs + TVE200_CTRL);
writel            252 drivers/gpu/drm/tve200/tve200_display.c 		writel(drm_fb_cma_get_gem_addr(fb, pstate, 0),
writel            257 drivers/gpu/drm/tve200/tve200_display.c 			writel(drm_fb_cma_get_gem_addr(fb, pstate, 1),
writel            259 drivers/gpu/drm/tve200/tve200_display.c 			writel(drm_fb_cma_get_gem_addr(fb, pstate, 2),
writel            282 drivers/gpu/drm/tve200/tve200_display.c 	writel(TVE200_INT_V_STATUS, priv->regs + TVE200_INT_EN);
writel            292 drivers/gpu/drm/tve200/tve200_display.c 	writel(0, priv->regs + TVE200_INT_EN);
writel            219 drivers/gpu/drm/tve200/tve200_drv.c 	writel(0, priv->regs + TVE200_INT_EN);
writel            172 drivers/gpu/drm/v3d/v3d_drv.h #define V3D_WRITE(offset, val) writel(val, v3d->hub_regs + offset)
writel            175 drivers/gpu/drm/v3d/v3d_drv.h #define V3D_BRIDGE_WRITE(offset, val) writel(val, v3d->bridge_regs + offset)
writel            178 drivers/gpu/drm/v3d/v3d_drv.h #define V3D_GCA_WRITE(offset, val) writel(val, v3d->gca_regs + offset)
writel            181 drivers/gpu/drm/v3d/v3d_drv.h #define V3D_CORE_WRITE(core, offset, val) writel(val, v3d->core_regs[core] + offset)
writel             68 drivers/gpu/drm/vc4/vc4_crtc.c #define CRTC_WRITE(offset, val) writel(val, vc4_crtc->regs + (offset))
writel            720 drivers/gpu/drm/vc4/vc4_crtc.c 	writel(SCALER_CTL0_END, dlist_next);
writel             98 drivers/gpu/drm/vc4/vc4_dpi.c #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
writel            479 drivers/gpu/drm/vc4/vc4_drv.h #define V3D_WRITE(offset, val) writel(val, vc4->v3d->regs + offset)
writel            481 drivers/gpu/drm/vc4/vc4_drv.h #define HVS_WRITE(offset, val) writel(val, vc4->hvs->regs + offset)
writel            557 drivers/gpu/drm/vc4/vc4_dsi.c 		writel(val, dsi->regs + offset);
writel             98 drivers/gpu/drm/vc4/vc4_hdmi.c #define HDMI_WRITE(offset, val) writel(val, vc4->hdmi->hdmicore_regs + offset)
writel            100 drivers/gpu/drm/vc4/vc4_hdmi.c #define HD_WRITE(offset, val) writel(val, vc4->hdmi->hd_regs + offset)
writel            147 drivers/gpu/drm/vc4/vc4_hvs.c 			writel(kernel[i], &dst_kernel[i]);
writel            149 drivers/gpu/drm/vc4/vc4_hvs.c 			writel(kernel[VC4_KERNEL_DWORDS - i - 1],
writel            977 drivers/gpu/drm/vc4/vc4_plane.c 		writel(vc4_state->dlist[i], &dlist[i]);
writel           1009 drivers/gpu/drm/vc4/vc4_plane.c 	writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
writel           1079 drivers/gpu/drm/vc4/vc4_plane.c 	writel(vc4_state->dlist[vc4_state->pos0_offset],
writel           1081 drivers/gpu/drm/vc4/vc4_plane.c 	writel(vc4_state->dlist[vc4_state->pos2_offset],
writel           1083 drivers/gpu/drm/vc4/vc4_plane.c 	writel(vc4_state->dlist[vc4_state->ptr0_offset],
writel            145 drivers/gpu/drm/vc4/vc4_txp.c #define TXP_WRITE(offset, val) writel(val, txp->regs + (offset))
writel            173 drivers/gpu/drm/vc4/vc4_vec.c #define VEC_WRITE(offset, val) writel(val, vec->regs + (offset))
writel            132 drivers/gpu/drm/via/via_drv.h 	writel(val, (void __iomem *)(dev_priv->mmio->handle + reg));
writel             40 drivers/gpu/host1x/dev.c 	writel(v, host1x->hv_regs + r);
writel             52 drivers/gpu/host1x/dev.c 	writel(v, sync_regs + r);
writel             64 drivers/gpu/host1x/dev.c 	writel(v, ch->regs + r);
writel            145 drivers/gpu/host1x/mipi.c 	writel(value, mipi->regs + (offset << 2));
writel             36 drivers/gpu/ipu-v3/ipu-common.c 	writel(value, ipu->cm_reg + offset);
writel            116 drivers/gpu/ipu-v3/ipu-cpmem.c 	writel(val, &base->word[word].data[i]);
writel            122 drivers/gpu/ipu-v3/ipu-cpmem.c 		writel(val, &base->word[word].data[i + 1]);
writel            235 drivers/gpu/ipu-v3/ipu-cpmem.c 		writel(0, base + i * sizeof(u32));
writel            185 drivers/gpu/ipu-v3/ipu-csi.c 	writel(value, csi->base + offset);
writel            116 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg, dc->base + DC_RL_CH(event));
writel            135 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg1, priv->dc_tmpl_reg + word * 8);
writel            136 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg2, priv->dc_tmpl_reg + word * 8 + 4);
writel            217 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg, dc->base + DC_WR_CH_CONF);
writel            219 drivers/gpu/ipu-v3/ipu-dc.c 	writel(0x0, dc->base + DC_WR_CH_ADDR);
writel            220 drivers/gpu/ipu-v3/ipu-dc.c 	writel(width, priv->dc_reg + DC_DISP_CONF2(dc->di));
writel            247 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg, dc->base + DC_WR_CH_CONF);
writel            257 drivers/gpu/ipu-v3/ipu-dc.c 	writel(val, dc->base + DC_WR_CH_CONF);
writel            287 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg, priv->dc_reg + DC_MAP_CONF_VAL(ptr));
writel            292 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg, priv->dc_reg + DC_MAP_CONF_PTR(map));
writel            299 drivers/gpu/ipu-v3/ipu-dc.c 	writel(reg & ~(0xffff << (16 * (map & 0x1))),
writel            365 drivers/gpu/ipu-v3/ipu-dc.c 	writel(DC_WR_CH_CONF_WORD_SIZE_24 | DC_WR_CH_CONF_DISP_ID_PARALLEL(1) |
writel            368 drivers/gpu/ipu-v3/ipu-dc.c 	writel(DC_WR_CH_CONF_WORD_SIZE_24 | DC_WR_CH_CONF_DISP_ID_PARALLEL(0),
writel            371 drivers/gpu/ipu-v3/ipu-dc.c 	writel(DC_GEN_SYNC_1_6_SYNC | DC_GEN_SYNC_PRIORITY_1,
writel            130 drivers/gpu/ipu-v3/ipu-di.c 	writel(value, di->base + offset);
writel            149 drivers/gpu/ipu-v3/ipu-dmfc.c 	writel(dmfc_gen1, priv->base + DMFC_GENERAL1);
writel            203 drivers/gpu/ipu-v3/ipu-dmfc.c 	writel(0x00000050, priv->base + DMFC_WR_CHAN);
writel            204 drivers/gpu/ipu-v3/ipu-dmfc.c 	writel(0x00005654, priv->base + DMFC_DP_CHAN);
writel            205 drivers/gpu/ipu-v3/ipu-dmfc.c 	writel(0x202020f6, priv->base + DMFC_WR_CHAN_DEF);
writel            206 drivers/gpu/ipu-v3/ipu-dmfc.c 	writel(0x2020f6f6, priv->base + DMFC_DP_CHAN_DEF);
writel            207 drivers/gpu/ipu-v3/ipu-dmfc.c 	writel(0x00000003, priv->base + DMFC_GENERAL1);
writel             92 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);
writel             96 drivers/gpu/ipu-v3/ipu-dp.c 		writel(reg | ((u32) alpha << 24),
writel            100 drivers/gpu/ipu-v3/ipu-dp.c 		writel(reg | DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
writel            103 drivers/gpu/ipu-v3/ipu-dp.c 		writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
writel            119 drivers/gpu/ipu-v3/ipu-dp.c 	writel((x_pos << 16) | y_pos, flow->base + DP_FG_POS);
writel            138 drivers/gpu/ipu-v3/ipu-dp.c 		writel(reg, flow->base + DP_COM_CONF);
writel            143 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x099 | (0x12d << 16), flow->base + DP_CSC_A_0);
writel            144 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x03a | (0x3a9 << 16), flow->base + DP_CSC_A_1);
writel            145 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x356 | (0x100 << 16), flow->base + DP_CSC_A_2);
writel            146 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x100 | (0x329 << 16), flow->base + DP_CSC_A_3);
writel            147 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x3d6 | (0x0000 << 16) | (2 << 30),
writel            149 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x200 | (2 << 14) | (0x200 << 16) | (2 << 30),
writel            152 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x095 | (0x000 << 16), flow->base + DP_CSC_A_0);
writel            153 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x0cc | (0x095 << 16), flow->base + DP_CSC_A_1);
writel            154 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x3ce | (0x398 << 16), flow->base + DP_CSC_A_2);
writel            155 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x095 | (0x0ff << 16), flow->base + DP_CSC_A_3);
writel            156 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x000 | (0x3e42 << 16) | (1 << 30),
writel            158 drivers/gpu/ipu-v3/ipu-dp.c 		writel(0x10a | (1 << 14) | (0x3dd6 << 16) | (1 << 30),
writel            164 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);
writel            240 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);
writel            270 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);
writel            272 drivers/gpu/ipu-v3/ipu-dp.c 	writel(0, flow->base + DP_FG_POS);
writel            171 drivers/gpu/ipu-v3/ipu-ic.c 	writel(value, ic->priv->base + offset);
writel            193 drivers/gpu/ipu-v3/ipu-ic.c 	writel(param, base++);
writel            197 drivers/gpu/ipu-v3/ipu-ic.c 	writel(param, base++);
writel            201 drivers/gpu/ipu-v3/ipu-ic.c 	writel(param, base++);
writel            204 drivers/gpu/ipu-v3/ipu-ic.c 	writel(param, base++);
writel            208 drivers/gpu/ipu-v3/ipu-ic.c 	writel(param, base++);
writel            211 drivers/gpu/ipu-v3/ipu-ic.c 	writel(param, base++);
writel            145 drivers/gpu/ipu-v3/ipu-pre.c 	writel(0, pre->regs + IPU_PRE_CTRL);
writel            152 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_CTRL);
writel            160 drivers/gpu/ipu-v3/ipu-pre.c 	writel(IPU_PRE_CTRL_SFTRST, pre->regs + IPU_PRE_CTRL);
writel            179 drivers/gpu/ipu-v3/ipu-pre.c 	writel(bufaddr, pre->regs + IPU_PRE_CUR_BUF);
writel            180 drivers/gpu/ipu-v3/ipu-pre.c 	writel(bufaddr, pre->regs + IPU_PRE_NEXT_BUF);
writel            188 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_PREFETCH_ENG_CTRL);
writel            192 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_PREFETCH_ENG_INPUT_SIZE);
writel            195 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_PREFETCH_ENG_PITCH);
writel            200 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_STORE_ENG_CTRL);
writel            204 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_STORE_ENG_SIZE);
writel            207 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_STORE_ENG_PITCH);
writel            209 drivers/gpu/ipu-v3/ipu-pre.c 	writel(pre->buffer_paddr, pre->regs + IPU_PRE_STORE_ENG_ADDR);
writel            221 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_TPR_CTRL);
writel            230 drivers/gpu/ipu-v3/ipu-pre.c 	writel(val, pre->regs + IPU_PRE_CTRL);
writel            242 drivers/gpu/ipu-v3/ipu-pre.c 	writel(bufaddr, pre->regs + IPU_PRE_NEXT_BUF);
writel            257 drivers/gpu/ipu-v3/ipu-pre.c 	writel(IPU_PRE_CTRL_SDW_UPDATE, pre->regs + IPU_PRE_CTRL_SET);
writel            260 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_CTL);
writel            263 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_REG_UPDATE);
writel            305 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_STRIDE(prg_chan));
writel            311 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_HEIGHT(prg_chan));
writel            315 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_BADDR(prg_chan));
writel            324 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_CTL);
writel            327 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_REG_UPDATE);
writel            408 drivers/gpu/ipu-v3/ipu-prg.c 	writel(val, prg->regs + IPU_PRG_CTL);
writel            411 drivers/gpu/ipu-v3/ipu-prg.c 	writel(0xffffffff, prg->regs + IPU_PRG_THD);
writel            210 drivers/gpu/ipu-v3/ipu-prv.h 	writel(value, ipu->idmac_reg + offset);
writel             48 drivers/gpu/ipu-v3/ipu-smfc.c 	writel(val, priv->base + SMFC_BS);
writel             68 drivers/gpu/ipu-v3/ipu-smfc.c 	writel(val, priv->base + SMFC_MAP);
writel             88 drivers/gpu/ipu-v3/ipu-smfc.c 	writel(val, priv->base + SMFC_WMC);
writel             53 drivers/gpu/ipu-v3/ipu-vdi.c 	writel(value, vdi->base + offset);
writel             51 drivers/hid/intel-ish-hid/ipc/ipc.c 	writel(value, hw->mem_addr + offset);
writel            145 drivers/hsi/controllers/omap_ssi_port.c 	writel(val, omap_port->sst_base + SSI_SST_DIVISOR_REG);
writel            312 drivers/hsi/controllers/omap_ssi_port.c 	writel(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
writel            353 drivers/hsi/controllers/omap_ssi_port.c 		writel(1, omap_port->sst_base + SSI_SST_BREAK_REG);
writel            364 drivers/hsi/controllers/omap_ssi_port.c 		writel(tmp | SSI_BREAKDETECTED,
writel            564 drivers/hsi/controllers/omap_ssi_port.c 	writel(0xff, omap_ssi->sys + SSI_GDD_MPU_IRQ_STATUS_REG);
writel            594 drivers/hsi/controllers/omap_ssi_port.c 	writel(SSI_WAKE(0), omap_ssi->sys + SSI_SET_WAKE_REG(port->num));
writel            631 drivers/hsi/controllers/omap_ssi_port.c 	writel(SSI_WAKE(0), omap_ssi->sys + SSI_CLEAR_WAKE_REG(port->num));
writel            756 drivers/hsi/controllers/omap_ssi_port.c 	writel(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_STATUS_REG);
writel            761 drivers/hsi/controllers/omap_ssi_port.c 	writel(mode, omap_port->sst_base + SSI_SST_MODE_REG);
writel            762 drivers/hsi/controllers/omap_ssi_port.c 	writel(mode, omap_port->ssr_base + SSI_SSR_MODE_REG);
writel            879 drivers/hsi/controllers/omap_ssi_port.c 	writel(SSI_BREAKDETECTED,
writel            916 drivers/hsi/controllers/omap_ssi_port.c 			writel(*buf, omap_port->sst_base +
writel            933 drivers/hsi/controllers/omap_ssi_port.c 			writel(val, omap_ssi->sys +
writel           1015 drivers/hsi/controllers/omap_ssi_port.c 			writel(SSI_WAKE(0),
writel           1022 drivers/hsi/controllers/omap_ssi_port.c 			writel(SSI_WAKE(0),
writel            351 drivers/hwmon/aspeed-pwm-tacho.c 	writel(val, regs + reg);
writel             50 drivers/hwspinlock/omap_hwspinlock.c 	writel(SPINLOCK_NOTTAKEN, lock_addr);
writel             47 drivers/hwspinlock/sirf_hwspinlock.c 	writel(0, lock_addr);
writel             67 drivers/hwspinlock/sprd_hwspinlock.c 	writel(HWSPINLOCK_NOTTAKEN, lock_addr);
writel            113 drivers/hwspinlock/sprd_hwspinlock.c 	writel(HWSPINLOCK_USER_BITS, sprd_hwlock->base + HWSPINLOCK_RECCTRL);
writel             33 drivers/hwspinlock/stm32_hwspinlock.c 	writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr);
writel             43 drivers/hwspinlock/stm32_hwspinlock.c 	writel(STM32_MUTEX_COREID, lock_addr);
writel             55 drivers/hwspinlock/u8500_hsem.c 	writel(HSEM_MASTER_ID, lock_addr);
writel             69 drivers/hwspinlock/u8500_hsem.c 	writel(RESET_SEMAPHORE, lock_addr);
writel            109 drivers/hwspinlock/u8500_hsem.c 	writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG);
writel            112 drivers/hwspinlock/u8500_hsem.c 	writel(0xFFFF, io_base + HSEM_ICRALL);
writel            150 drivers/hwspinlock/u8500_hsem.c 	writel(0xFFFF, io_base + HSEM_ICRALL);
writel            107 drivers/i2c/busses/i2c-altera.c 	writel(idev->isr_mask, idev->base + ALTR_I2C_ISER);
writel            116 drivers/i2c/busses/i2c-altera.c 	writel(int_en | mask, idev->base + ALTR_I2C_ISR);
writel            123 drivers/i2c/busses/i2c-altera.c 	writel(tmp & ~ALTR_I2C_CTRL_EN, idev->base + ALTR_I2C_CTRL);
writel            130 drivers/i2c/busses/i2c-altera.c 	writel(tmp | ALTR_I2C_CTRL_EN, idev->base + ALTR_I2C_CTRL);
writel            141 drivers/i2c/busses/i2c-altera.c 	writel(ALTR_I2C_TFR_CMD_STO, idev->base + ALTR_I2C_TFR_CMD);
writel            163 drivers/i2c/busses/i2c-altera.c 	writel(tmp, idev->base + ALTR_I2C_CTRL);
writel            172 drivers/i2c/busses/i2c-altera.c 	writel(t_high, idev->base + ALTR_I2C_SCL_HIGH);
writel            174 drivers/i2c/busses/i2c-altera.c 	writel(t_low, idev->base + ALTR_I2C_SCL_LOW);
writel            176 drivers/i2c/busses/i2c-altera.c 	writel(3 * clk_mhz / 10, idev->base + ALTR_I2C_SDA_HOLD);
writel            192 drivers/i2c/busses/i2c-altera.c 		writel(data, idev->base + ALTR_I2C_TFR_CMD);
writel            333 drivers/i2c/busses/i2c-altera.c 	writel(ALTR_I2C_TFR_CMD_STA | addr, idev->base + ALTR_I2C_TFR_CMD);
writel             52 drivers/i2c/busses/i2c-amd-mp2-pci.c 	writel(i2c_cmd_base.ul, reg);
writel            226 drivers/i2c/busses/i2c-amd-mp2-pci.c 			writel(0, reg);
writel            227 drivers/i2c/busses/i2c-amd-mp2-pci.c 			writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
writel            238 drivers/i2c/busses/i2c-amd-mp2-pci.c 			writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
writel            289 drivers/i2c/busses/i2c-amd-mp2-pci.c 		writel(0, privdata->mmio + reg);
writel            292 drivers/i2c/busses/i2c-amd-mp2-pci.c 		writel(0, privdata->mmio + reg);
writel            325 drivers/i2c/busses/i2c-amd-mp2-pci.c 	writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
writel            191 drivers/i2c/busses/i2c-aspeed.c 		writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
writel            213 drivers/i2c/busses/i2c-aspeed.c 		writel(ASPEED_I2CD_BUS_RECOVER_CMD,
writel            299 drivers/i2c/busses/i2c-aspeed.c 		writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
writel            300 drivers/i2c/busses/i2c-aspeed.c 		writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG);
writel            310 drivers/i2c/busses/i2c-aspeed.c 		writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG);
writel            311 drivers/i2c/busses/i2c-aspeed.c 		writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG);
writel            367 drivers/i2c/busses/i2c-aspeed.c 	writel(slave_addr, bus->base + ASPEED_I2C_BYTE_BUF_REG);
writel            368 drivers/i2c/busses/i2c-aspeed.c 	writel(command, bus->base + ASPEED_I2C_CMD_REG);
writel            375 drivers/i2c/busses/i2c-aspeed.c 	writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
writel            464 drivers/i2c/busses/i2c-aspeed.c 			writel(readl(bus->base + ASPEED_I2C_CMD_REG) &
writel            511 drivers/i2c/busses/i2c-aspeed.c 			writel(msg->buf[bus->buf_index++],
writel            513 drivers/i2c/busses/i2c-aspeed.c 			writel(ASPEED_I2CD_M_TX_CMD,
writel            550 drivers/i2c/busses/i2c-aspeed.c 			writel(command, bus->base + ASPEED_I2C_CMD_REG);
writel            604 drivers/i2c/busses/i2c-aspeed.c 	writel(irq_received & ~ASPEED_I2CD_INTR_RX_DONE,
writel            650 drivers/i2c/busses/i2c-aspeed.c 		writel(ASPEED_I2CD_INTR_RX_DONE,
writel            732 drivers/i2c/busses/i2c-aspeed.c 	writel(addr_reg_val, bus->base + ASPEED_I2C_DEV_ADDR_REG);
writel            737 drivers/i2c/busses/i2c-aspeed.c 	writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG);
writel            775 drivers/i2c/busses/i2c-aspeed.c 	writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG);
writel            889 drivers/i2c/busses/i2c-aspeed.c 	writel(clk_reg_val, bus->base + ASPEED_I2C_AC_TIMING_REG1);
writel            890 drivers/i2c/busses/i2c-aspeed.c 	writel(ASPEED_NO_TIMEOUT_CTRL, bus->base + ASPEED_I2C_AC_TIMING_REG2);
writel            903 drivers/i2c/busses/i2c-aspeed.c 	writel(0, bus->base + ASPEED_I2C_FUN_CTRL_REG);
writel            915 drivers/i2c/busses/i2c-aspeed.c 	writel(readl(bus->base + ASPEED_I2C_FUN_CTRL_REG) | fun_ctrl_reg,
writel            925 drivers/i2c/busses/i2c-aspeed.c 	writel(ASPEED_I2CD_INTR_ALL, bus->base + ASPEED_I2C_INTR_CTRL_REG);
writel            939 drivers/i2c/busses/i2c-aspeed.c 	writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);
writel            940 drivers/i2c/busses/i2c-aspeed.c 	writel(0xffffffff, bus->base + ASPEED_I2C_INTR_STS_REG);
writel           1023 drivers/i2c/busses/i2c-aspeed.c 	writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);
writel           1024 drivers/i2c/busses/i2c-aspeed.c 	writel(0xffffffff, bus->base + ASPEED_I2C_INTR_STS_REG);
writel           1059 drivers/i2c/busses/i2c-aspeed.c 	writel(0, bus->base + ASPEED_I2C_FUN_CTRL_REG);
writel           1060 drivers/i2c/busses/i2c-aspeed.c 	writel(0, bus->base + ASPEED_I2C_INTR_CTRL_REG);
writel            157 drivers/i2c/busses/i2c-axxia.c 	writel(int_en & ~mask, idev->base + MST_INT_ENABLE);
writel            165 drivers/i2c/busses/i2c-axxia.c 	writel(int_en | mask, idev->base + MST_INT_ENABLE);
writel            190 drivers/i2c/busses/i2c-axxia.c 	writel(0x01, idev->base + SOFT_RESET);
writel            200 drivers/i2c/busses/i2c-axxia.c 	writel(0x1, idev->base + GLOBAL_CONTROL);
writel            215 drivers/i2c/busses/i2c-axxia.c 	writel(t_high, idev->base + SCL_HIGH_PERIOD);
writel            217 drivers/i2c/busses/i2c-axxia.c 	writel(t_low, idev->base + SCL_LOW_PERIOD);
writel            219 drivers/i2c/busses/i2c-axxia.c 	writel(t_setup, idev->base + SDA_SETUP_TIME);
writel            221 drivers/i2c/busses/i2c-axxia.c 	writel(ns_to_clk(300, clk_mhz), idev->base + SDA_HOLD_TIME);
writel            223 drivers/i2c/busses/i2c-axxia.c 	writel(ns_to_clk(50, clk_mhz), idev->base + SPIKE_FLTR_LEN);
writel            238 drivers/i2c/busses/i2c-axxia.c 	writel(prescale, idev->base + TIMER_CLOCK_DIV);
writel            240 drivers/i2c/busses/i2c-axxia.c 	writel(WT_EN | WT_VALUE(tmo_clk), idev->base + WAIT_TIMER_CONTROL);
writel            246 drivers/i2c/busses/i2c-axxia.c 	writel(0x01, idev->base + INTERRUPT_ENABLE);
writel            290 drivers/i2c/busses/i2c-axxia.c 			writel(msg->len, idev->base + MST_RX_XFER);
writel            310 drivers/i2c/busses/i2c-axxia.c 		writel(msg->buf[idev->msg_xfrd++], idev->base + MST_DATA);
writel            349 drivers/i2c/busses/i2c-axxia.c 		writel(val, idev->base + SLV_DATA);
writel            353 drivers/i2c/busses/i2c-axxia.c 		writel(val, idev->base + SLV_DATA);
writel            358 drivers/i2c/busses/i2c-axxia.c 	writel(INT_SLV, idev->base + INTERRUPT_STATUS);
writel            431 drivers/i2c/busses/i2c-axxia.c 	writel(INT_MST, idev->base + INTERRUPT_STATUS);
writel            458 drivers/i2c/busses/i2c-axxia.c 	writel(addr_1, idev->base + MST_ADDR_1);
writel            459 drivers/i2c/busses/i2c-axxia.c 	writel(addr_2, idev->base + MST_ADDR_2);
writel            487 drivers/i2c/busses/i2c-axxia.c 	writel(msgs[0].len, idev->base + MST_TX_XFER);
writel            488 drivers/i2c/busses/i2c-axxia.c 	writel(rlen, idev->base + MST_RX_XFER);
writel            497 drivers/i2c/busses/i2c-axxia.c 	writel(CMD_SEQUENCE, idev->base + MST_COMMAND);
writel            551 drivers/i2c/busses/i2c-axxia.c 	writel(rx_xfer, idev->base + MST_RX_XFER);
writel            552 drivers/i2c/busses/i2c-axxia.c 	writel(tx_xfer, idev->base + MST_TX_XFER);
writel            561 drivers/i2c/busses/i2c-axxia.c 	writel(wt_value, idev->base + WAIT_TIMER_CONTROL);
writel            567 drivers/i2c/busses/i2c-axxia.c 		writel(CMD_MANUAL, idev->base + MST_COMMAND);
writel            570 drivers/i2c/busses/i2c-axxia.c 		writel(CMD_AUTO, idev->base + MST_COMMAND);
writel            574 drivers/i2c/busses/i2c-axxia.c 	writel(WT_EN | wt_value, idev->base + WAIT_TIMER_CONTROL);
writel            650 drivers/i2c/busses/i2c-axxia.c 	writel(tmp, idev->base + I2C_BUS_MONITOR);
writel            686 drivers/i2c/busses/i2c-axxia.c 	writel(GLOBAL_MST_EN | GLOBAL_SLV_EN, idev->base + GLOBAL_CONTROL);
writel            687 drivers/i2c/busses/i2c-axxia.c 	writel(INT_MST | INT_SLV, idev->base + INTERRUPT_ENABLE);
writel            694 drivers/i2c/busses/i2c-axxia.c 	writel(SLV_RX_ACSA1, idev->base + SLV_RX_CTL);
writel            695 drivers/i2c/busses/i2c-axxia.c 	writel(dec_ctl, idev->base + SLV_ADDR_DEC_CTL);
writel            696 drivers/i2c/busses/i2c-axxia.c 	writel(slave->addr, idev->base + SLV_ADDR_1);
writel            701 drivers/i2c/busses/i2c-axxia.c 	writel(slv_int_mask, idev->base + SLV_INT_ENABLE);
writel            711 drivers/i2c/busses/i2c-axxia.c 	writel(GLOBAL_MST_EN, idev->base + GLOBAL_CONTROL);
writel            712 drivers/i2c/busses/i2c-axxia.c 	writel(INT_MST, idev->base + INTERRUPT_ENABLE);
writel            230 drivers/i2c/busses/i2c-bcm-iproc.c 		writel(iproc_i2c->ape_addr_mask,
writel            246 drivers/i2c/busses/i2c-bcm-iproc.c 		writel(iproc_i2c->ape_addr_mask,
writel            248 drivers/i2c/busses/i2c-bcm-iproc.c 		writel(val, iproc_i2c->base + offset);
writel            251 drivers/i2c/busses/i2c-bcm-iproc.c 		writel(val, iproc_i2c->base + offset);
writel            176 drivers/i2c/busses/i2c-bcm-kona.c 		writel((CS_CMD_CMD_NO_ACTION << CS_CMD_SHIFT) |
writel            182 drivers/i2c/busses/i2c-bcm-kona.c 		writel((CS_ACK_CMD_GEN_START << CS_ACK_SHIFT) |
writel            189 drivers/i2c/busses/i2c-bcm-kona.c 		writel((CS_ACK_CMD_GEN_RESTART << CS_ACK_SHIFT) |
writel            196 drivers/i2c/busses/i2c-bcm-kona.c 		writel((CS_CMD_CMD_STOP << CS_CMD_SHIFT) |
writel            208 drivers/i2c/busses/i2c-bcm-kona.c 	writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK,
writel            214 drivers/i2c/busses/i2c-bcm-kona.c 	writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK,
writel            228 drivers/i2c/busses/i2c-bcm-kona.c 		writel(TXFCR_FIFO_FLUSH_MASK | TXFCR_FIFO_EN_MASK,
writel            231 drivers/i2c/busses/i2c-bcm-kona.c 	writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET);
writel            264 drivers/i2c/busses/i2c-bcm-kona.c 	writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);
writel            276 drivers/i2c/busses/i2c-bcm-kona.c 	writel(0, dev->base + IER_OFFSET);
writel            300 drivers/i2c/busses/i2c-bcm-kona.c 	writel(IER_READ_COMPLETE_INT_MASK, dev->base + IER_OFFSET);
writel            303 drivers/i2c/busses/i2c-bcm-kona.c 	writel((last_byte_nak << RXFCR_NACK_EN_SHIFT) |
writel            311 drivers/i2c/busses/i2c-bcm-kona.c 	writel(0, dev->base + IER_OFFSET);
writel            368 drivers/i2c/busses/i2c-bcm-kona.c 	writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET);
writel            371 drivers/i2c/busses/i2c-bcm-kona.c 	writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET);
writel            377 drivers/i2c/busses/i2c-bcm-kona.c 	writel(data, dev->base + DAT_OFFSET);
writel            383 drivers/i2c/busses/i2c-bcm-kona.c 	writel(0, dev->base + IER_OFFSET);
writel            412 drivers/i2c/busses/i2c-bcm-kona.c 	writel(IER_FIFO_INT_EN_MASK | IER_NOACK_EN_MASK,
writel            420 drivers/i2c/busses/i2c-bcm-kona.c 		writel(buf[k], (dev->base + DAT_OFFSET));
writel            432 drivers/i2c/busses/i2c-bcm-kona.c 	writel(0, dev->base + IER_OFFSET);
writel            515 drivers/i2c/busses/i2c-bcm-kona.c 	writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK,
writel            521 drivers/i2c/busses/i2c-bcm-kona.c 	writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK,
writel            524 drivers/i2c/busses/i2c-bcm-kona.c 	writel((dev->std_cfg->prescale << TIM_PRESCALE_SHIFT) |
writel            530 drivers/i2c/busses/i2c-bcm-kona.c 	writel((dev->std_cfg->time_m << CLKEN_M_SHIFT) |
writel            538 drivers/i2c/busses/i2c-bcm-kona.c 	writel((dev->hs_cfg->prescale << TIM_PRESCALE_SHIFT) |
writel            544 drivers/i2c/busses/i2c-bcm-kona.c 	writel((dev->hs_cfg->hs_hold << HSTIM_HS_HOLD_SHIFT) |
writel            549 drivers/i2c/busses/i2c-bcm-kona.c 	writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK,
writel            617 drivers/i2c/busses/i2c-bcm-kona.c 	writel(0, dev->base + PADCTL_OFFSET);
writel            693 drivers/i2c/busses/i2c-bcm-kona.c 	writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);
writel            802 drivers/i2c/busses/i2c-bcm-kona.c 	writel(0, dev->base + TOUT_OFFSET);
writel            808 drivers/i2c/busses/i2c-bcm-kona.c 	writel(TXFCR_FIFO_FLUSH_MASK | TXFCR_FIFO_EN_MASK,
writel            812 drivers/i2c/busses/i2c-bcm-kona.c 	writel(0, dev->base + IER_OFFSET);
writel            815 drivers/i2c/busses/i2c-bcm-kona.c 	writel(ISR_CMDBUSY_MASK |
writel            843 drivers/i2c/busses/i2c-bcm-kona.c 	writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);
writel             71 drivers/i2c/busses/i2c-bcm2835.c 	writel(val, i2c_dev->regs + reg);
writel            150 drivers/i2c/busses/i2c-designware-platdrv.c 	writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
writel            136 drivers/i2c/busses/i2c-efm32.c 	writel(value, ddata->base + offset);
writel            259 drivers/i2c/busses/i2c-exynos5.c 	writel(readl(i2c->regs + HSI2C_INT_STATUS),
writel            338 drivers/i2c/busses/i2c-exynos5.c 		writel(i2c_timing_s1, i2c->regs + HSI2C_TIMING_HS1);
writel            339 drivers/i2c/busses/i2c-exynos5.c 		writel(i2c_timing_s2, i2c->regs + HSI2C_TIMING_HS2);
writel            340 drivers/i2c/busses/i2c-exynos5.c 		writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_HS3);
writel            342 drivers/i2c/busses/i2c-exynos5.c 		writel(i2c_timing_s1, i2c->regs + HSI2C_TIMING_FS1);
writel            343 drivers/i2c/busses/i2c-exynos5.c 		writel(i2c_timing_s2, i2c->regs + HSI2C_TIMING_FS2);
writel            344 drivers/i2c/busses/i2c-exynos5.c 		writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_FS3);
writel            346 drivers/i2c/busses/i2c-exynos5.c 	writel(i2c_timing_sla, i2c->regs + HSI2C_TIMING_SLA);
writel            373 drivers/i2c/busses/i2c-exynos5.c 	writel(i2c_timeout, i2c->regs + HSI2C_TIMEOUT);
writel            375 drivers/i2c/busses/i2c-exynos5.c 	writel((HSI2C_FUNC_MODE_I2C | HSI2C_MASTER),
writel            377 drivers/i2c/busses/i2c-exynos5.c 	writel(HSI2C_TRAILING_COUNT, i2c->regs + HSI2C_TRAILIG_CTL);
writel            380 drivers/i2c/busses/i2c-exynos5.c 		writel(HSI2C_MASTER_ID(MASTER_ID(i2c->adap.nr)),
writel            385 drivers/i2c/busses/i2c-exynos5.c 	writel(i2c_conf | HSI2C_AUTO_MODE, i2c->regs + HSI2C_CONF);
writel            395 drivers/i2c/busses/i2c-exynos5.c 	writel(i2c_ctl, i2c->regs + HSI2C_CTL);
writel            399 drivers/i2c/busses/i2c-exynos5.c 	writel(i2c_ctl, i2c->regs + HSI2C_CTL);
writel            426 drivers/i2c/busses/i2c-exynos5.c 	writel(int_status, i2c->regs + HSI2C_INT_STATUS);
writel            496 drivers/i2c/busses/i2c-exynos5.c 			writel(int_en, i2c->regs + HSI2C_INT_ENABLE);
writel            502 drivers/i2c/busses/i2c-exynos5.c 			writel(byte, i2c->regs + HSI2C_TX_DATA);
writel            511 drivers/i2c/busses/i2c-exynos5.c 		writel(0, i2c->regs + HSI2C_INT_ENABLE);
writel            552 drivers/i2c/busses/i2c-exynos5.c 	writel(val, i2c->regs + HSI2C_CTL);
writel            554 drivers/i2c/busses/i2c-exynos5.c 	writel(val, i2c->regs + HSI2C_CONF);
writel            561 drivers/i2c/busses/i2c-exynos5.c 	writel(HSI2C_CMD_READ_DATA, i2c->regs + HSI2C_MANUAL_CMD);
writel            563 drivers/i2c/busses/i2c-exynos5.c 	writel(HSI2C_CMD_SEND_STOP, i2c->regs + HSI2C_MANUAL_CMD);
writel            567 drivers/i2c/busses/i2c-exynos5.c 	writel(val, i2c->regs + HSI2C_CTL);
writel            569 drivers/i2c/busses/i2c-exynos5.c 	writel(val, i2c->regs + HSI2C_CONF);
writel            647 drivers/i2c/busses/i2c-exynos5.c 	writel(HSI2C_SLV_ADDR_MAS(i2c->msg->addr), i2c->regs + HSI2C_ADDR);
writel            649 drivers/i2c/busses/i2c-exynos5.c 	writel(fifo_ctl, i2c->regs + HSI2C_FIFO_CTL);
writel            650 drivers/i2c/busses/i2c-exynos5.c 	writel(i2c_ctl, i2c->regs + HSI2C_CTL);
writel            659 drivers/i2c/busses/i2c-exynos5.c 	writel(int_en, i2c->regs + HSI2C_INT_ENABLE);
writel            665 drivers/i2c/busses/i2c-exynos5.c 	writel(i2c_auto_conf, i2c->regs + HSI2C_AUTO_CONF);
writel             35 drivers/i2c/busses/i2c-hydra.c 	writel(val, &hydra->CachePD);
writel            416 drivers/i2c/busses/i2c-img-scb.c 	writel(value, i2c->base + offset);
writel            120 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(enable, lpi2c_imx->base + LPI2C_MIER);
writel            133 drivers/i2c/busses/i2c-imx-lpi2c.c 			writel(temp, lpi2c_imx->base + LPI2C_MSR);
writel            176 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MCR);
writel            177 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(0x7f00, lpi2c_imx->base + LPI2C_MSR);
writel            180 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MTDR);
writel            190 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(GEN_STOP << 8, lpi2c_imx->base + LPI2C_MTDR);
writel            244 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MCFGR1);
writel            248 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MCFGR2);
writel            256 drivers/i2c/busses/i2c-imx-lpi2c.c 		writel(temp, lpi2c_imx->base + LPI2C_MCCR1);
writel            258 drivers/i2c/busses/i2c-imx-lpi2c.c 		writel(temp, lpi2c_imx->base + LPI2C_MCCR0);
writel            273 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MCR);
writel            274 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(0, lpi2c_imx->base + LPI2C_MCR);
writel            282 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MCR);
writel            299 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MCR);
writel            342 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(lpi2c_imx->txfifosize >> 1, lpi2c_imx->base + LPI2C_MFCR);
writel            356 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp << 16, lpi2c_imx->base + LPI2C_MFCR);
writel            370 drivers/i2c/busses/i2c-imx-lpi2c.c 		writel(data, lpi2c_imx->base + LPI2C_MTDR);
writel            417 drivers/i2c/busses/i2c-imx-lpi2c.c 		writel(temp, lpi2c_imx->base + LPI2C_MTDR);
writel            421 drivers/i2c/busses/i2c-imx-lpi2c.c 		writel(temp, lpi2c_imx->base + LPI2C_MTDR);
writel            446 drivers/i2c/busses/i2c-imx-lpi2c.c 	writel(temp, lpi2c_imx->base + LPI2C_MTDR);
writel            303 drivers/i2c/busses/i2c-ismt.c 	writel((val & ~ISMT_MCTRL_FMHP) | fmhp,
writel            308 drivers/i2c/busses/i2c-ismt.c 	writel(val | ISMT_MCTRL_SS,
writel            672 drivers/i2c/busses/i2c-ismt.c 		writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS,
writel            701 drivers/i2c/busses/i2c-ismt.c 	writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
writel            704 drivers/i2c/busses/i2c-ismt.c 	writel(0, priv->smba + ISMT_MSTR_MSTS);
writel            708 drivers/i2c/busses/i2c-ismt.c 	writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1),
writel            723 drivers/i2c/busses/i2c-ismt.c 		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K),
writel            729 drivers/i2c/busses/i2c-ismt.c 		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K),
writel            735 drivers/i2c/busses/i2c-ismt.c 		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K),
writel            741 drivers/i2c/busses/i2c-ismt.c 		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M),
writel             87 drivers/i2c/busses/i2c-lpc2k.c 	writel(LPC24XX_CLEAR_ALL, i2c->base + LPC24XX_I2CONCLR);
writel             88 drivers/i2c/busses/i2c-lpc2k.c 	writel(0, i2c->base + LPC24XX_I2ADDR);
writel             89 drivers/i2c/busses/i2c-lpc2k.c 	writel(LPC24XX_I2EN, i2c->base + LPC24XX_I2CONSET);
writel            100 drivers/i2c/busses/i2c-lpc2k.c 	writel(LPC24XX_STO, i2c->base + LPC24XX_I2CONSET);
writel            133 drivers/i2c/busses/i2c-lpc2k.c 		writel(data, i2c->base + LPC24XX_I2DAT);
writel            134 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
writel            144 drivers/i2c/busses/i2c-lpc2k.c 			writel(i2c->msg->buf[i2c->msg_idx],
writel            148 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
writel            149 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
writel            164 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONCLR);
writel            167 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONSET);
writel            170 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
writel            188 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
writel            189 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
writel            205 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONCLR);
writel            208 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONSET);
writel            211 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONCLR);
writel            219 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_STO_AA, i2c->base + LPC24XX_I2CONSET);
writel            229 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_STA | LPC24XX_STO, i2c->base + LPC24XX_I2CONCLR);
writel            249 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
writel            256 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONSET);
writel            268 drivers/i2c/busses/i2c-lpc2k.c 				writel(i2c->msg->buf[0],
writel            274 drivers/i2c/busses/i2c-lpc2k.c 			writel(LPC24XX_STA, i2c->base + LPC24XX_I2CONSET);
writel            277 drivers/i2c/busses/i2c-lpc2k.c 		writel(LPC24XX_SI, i2c->base + LPC24XX_I2CONCLR);
writel            417 drivers/i2c/busses/i2c-lpc2k.c 	writel(scl_high, i2c->base + LPC24XX_I2SCLH);
writel            418 drivers/i2c/busses/i2c-lpc2k.c 	writel(clkrate - scl_high, i2c->base + LPC24XX_I2SCLL);
writel            110 drivers/i2c/busses/i2c-meson.c 	writel(data, i2c->regs + reg);
writel            182 drivers/i2c/busses/i2c-meson.c 	writel(wdata0, i2c->regs + REG_TOK_WDATA0);
writel            183 drivers/i2c/busses/i2c-meson.c 	writel(wdata1, i2c->regs + REG_TOK_WDATA1);
writel            212 drivers/i2c/busses/i2c-meson.c 	writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0);
writel            213 drivers/i2c/busses/i2c-meson.c 	writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1);
writel            276 drivers/i2c/busses/i2c-meson.c 	writel(msg->addr << 1, i2c->regs + REG_SLAVE_ADDR);
writel            423 drivers/i2c/busses/i2c-mt65xx.c 	writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST);
writel            425 drivers/i2c/busses/i2c-mt65xx.c 	writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST);
writel            629 drivers/i2c/busses/i2c-mt65xx.c 		writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG);
writel            630 drivers/i2c/busses/i2c-mt65xx.c 		writel(I2C_DMA_CON_RX, i2c->pdmabase + OFFSET_CON);
writel            646 drivers/i2c/busses/i2c-mt65xx.c 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE);
writel            649 drivers/i2c/busses/i2c-mt65xx.c 		writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR);
writel            650 drivers/i2c/busses/i2c-mt65xx.c 		writel(msgs->len, i2c->pdmabase + OFFSET_RX_LEN);
writel            652 drivers/i2c/busses/i2c-mt65xx.c 		writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG);
writel            653 drivers/i2c/busses/i2c-mt65xx.c 		writel(I2C_DMA_CON_TX, i2c->pdmabase + OFFSET_CON);
writel            669 drivers/i2c/busses/i2c-mt65xx.c 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE);
writel            672 drivers/i2c/busses/i2c-mt65xx.c 		writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR);
writel            673 drivers/i2c/busses/i2c-mt65xx.c 		writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN);
writel            675 drivers/i2c/busses/i2c-mt65xx.c 		writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_INT_FLAG);
writel            676 drivers/i2c/busses/i2c-mt65xx.c 		writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_CON);
writel            715 drivers/i2c/busses/i2c-mt65xx.c 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE);
writel            718 drivers/i2c/busses/i2c-mt65xx.c 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE);
writel            721 drivers/i2c/busses/i2c-mt65xx.c 		writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR);
writel            722 drivers/i2c/busses/i2c-mt65xx.c 		writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR);
writel            723 drivers/i2c/busses/i2c-mt65xx.c 		writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN);
writel            724 drivers/i2c/busses/i2c-mt65xx.c 		writel((msgs + 1)->len, i2c->pdmabase + OFFSET_RX_LEN);
writel            727 drivers/i2c/busses/i2c-mt65xx.c 	writel(I2C_DMA_START_EN, i2c->pdmabase + OFFSET_EN);
writel            206 drivers/i2c/busses/i2c-mv64xxx.c 		writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL);
writel            207 drivers/i2c/busses/i2c-mv64xxx.c 		writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_TIMING);
writel            208 drivers/i2c/busses/i2c-mv64xxx.c 		writel(0, drv_data->reg_base +
writel            210 drivers/i2c/busses/i2c-mv64xxx.c 		writel(0, drv_data->reg_base +
writel            214 drivers/i2c/busses/i2c-mv64xxx.c 	writel(0, drv_data->reg_base + drv_data->reg_offsets.soft_reset);
writel            215 drivers/i2c/busses/i2c-mv64xxx.c 	writel(MV64XXX_I2C_BAUD_DIV_M(drv_data->freq_m) | MV64XXX_I2C_BAUD_DIV_N(drv_data->freq_n),
writel            217 drivers/i2c/busses/i2c-mv64xxx.c 	writel(0, drv_data->reg_base + drv_data->reg_offsets.addr);
writel            218 drivers/i2c/busses/i2c-mv64xxx.c 	writel(0, drv_data->reg_base + drv_data->reg_offsets.ext_addr);
writel            219 drivers/i2c/busses/i2c-mv64xxx.c 	writel(MV64XXX_I2C_REG_CONTROL_TWSIEN | MV64XXX_I2C_REG_CONTROL_STOP,
writel            341 drivers/i2c/busses/i2c-mv64xxx.c 	writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
writel            369 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->cntl_bits,
writel            374 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->addr1,
writel            376 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->cntl_bits,
writel            381 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->addr2,
writel            383 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->cntl_bits,
writel            388 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->msg->buf[drv_data->byte_posn++],
writel            390 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->cntl_bits,
writel            397 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->cntl_bits,
writel            405 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
writel            424 drivers/i2c/busses/i2c-mv64xxx.c 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
writel            486 drivers/i2c/busses/i2c-mv64xxx.c 	writel(0, drv_data->reg_base +	MV64XXX_I2C_REG_BRIDGE_CONTROL);
writel            487 drivers/i2c/busses/i2c-mv64xxx.c 	writel(0, drv_data->reg_base +
writel            516 drivers/i2c/busses/i2c-mv64xxx.c 			writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_IFLG,
writel            598 drivers/i2c/busses/i2c-mv64xxx.c 	writel(buf[0], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO);
writel            599 drivers/i2c/busses/i2c-mv64xxx.c 	writel(buf[1], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI);
writel            653 drivers/i2c/busses/i2c-mv64xxx.c 	writel(ctrl_reg, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL);
writel            145 drivers/i2c/busses/i2c-mxs.c 	writel(i2c->timing0, i2c->regs + MXS_I2C_TIMING0);
writel            146 drivers/i2c/busses/i2c-mxs.c 	writel(i2c->timing1, i2c->regs + MXS_I2C_TIMING1);
writel            147 drivers/i2c/busses/i2c-mxs.c 	writel(i2c->timing2, i2c->regs + MXS_I2C_TIMING2);
writel            149 drivers/i2c/busses/i2c-mxs.c 	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
writel            337 drivers/i2c/busses/i2c-mxs.c 	writel(cmd, i2c->regs + MXS_I2C_CTRL0);
writel            342 drivers/i2c/busses/i2c-mxs.c 	writel(reg, i2c->regs + MXS_I2C_CTRL0);
writel            356 drivers/i2c/busses/i2c-mxs.c 	writel(cmd, i2c->regs + MXS_I2C_CTRL0);
writel            359 drivers/i2c/busses/i2c-mxs.c 		writel(MXS_I2C_CTRL0_PIO_MODE, i2c->regs + MXS_I2C_CTRL0_SET);
writel            361 drivers/i2c/busses/i2c-mxs.c 	writel(data, i2c->regs + MXS_I2C_DATA(i2c));
writel            362 drivers/i2c/busses/i2c-mxs.c 	writel(MXS_I2C_CTRL0_RUN, i2c->regs + MXS_I2C_CTRL0_SET);
writel            375 drivers/i2c/busses/i2c-mxs.c 	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_CLR);
writel            509 drivers/i2c/busses/i2c-mxs.c 			writel(MXS_I2C_DEBUG0_DMAREQ,
writel            543 drivers/i2c/busses/i2c-mxs.c 	writel(MXS_I2C_IRQ_MASK, i2c->regs + MXS_I2C_CTRL1_CLR);
writel            544 drivers/i2c/busses/i2c-mxs.c 	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
writel            548 drivers/i2c/busses/i2c-mxs.c 		writel(MXS_I2C_CTRL0_PIO_MODE, i2c->regs + MXS_I2C_CTRL0_CLR);
writel            605 drivers/i2c/busses/i2c-mxs.c 		writel(MXS_I2C_CTRL1_CLR_GOT_A_NAK,
writel            673 drivers/i2c/busses/i2c-mxs.c 	writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
writel            863 drivers/i2c/busses/i2c-mxs.c 		writel(MXS_I2C_CTRL0_SFTRST,
writel            880 drivers/i2c/busses/i2c-mxs.c 	writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET);
writel            199 drivers/i2c/busses/i2c-nomadik.c 	writel(readl(reg) | mask, reg);
writel            204 drivers/i2c/busses/i2c-nomadik.c 	writel(readl(reg) & ~mask, reg);
writel            227 drivers/i2c/busses/i2c-nomadik.c 	writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR);
writel            253 drivers/i2c/busses/i2c-nomadik.c 	writel(mask, dev->virtbase + I2C_IMSCR);
writel            264 drivers/i2c/busses/i2c-nomadik.c 	writel(mask, dev->virtbase + I2C_ICR);
writel            355 drivers/i2c/busses/i2c-nomadik.c 	writel(0x0, dev->virtbase + I2C_CR);
writel            356 drivers/i2c/busses/i2c-nomadik.c 	writel(0x0, dev->virtbase + I2C_HSMCR);
writel            357 drivers/i2c/busses/i2c-nomadik.c 	writel(0x0, dev->virtbase + I2C_TFTR);
writel            358 drivers/i2c/busses/i2c-nomadik.c 	writel(0x0, dev->virtbase + I2C_RFTR);
writel            359 drivers/i2c/busses/i2c-nomadik.c 	writel(0x0, dev->virtbase + I2C_DMAR);
writel            392 drivers/i2c/busses/i2c-nomadik.c 	writel(slsu << 16, dev->virtbase + I2C_SCR);
writel            412 drivers/i2c/busses/i2c-nomadik.c 	writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
writel            424 drivers/i2c/busses/i2c-nomadik.c 		writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR);
writel            425 drivers/i2c/busses/i2c-nomadik.c 		writel(I2C_FREQ_MODE_STANDARD << 4,
writel            428 drivers/i2c/busses/i2c-nomadik.c 	writel(dev->sm << 4, dev->virtbase + I2C_CR);
writel            431 drivers/i2c/busses/i2c-nomadik.c 	writel(dev->tft, dev->virtbase + I2C_TFTR);
writel            432 drivers/i2c/busses/i2c-nomadik.c 	writel(dev->rft, dev->virtbase + I2C_RFTR);
writel            451 drivers/i2c/busses/i2c-nomadik.c 	writel(mcr, dev->virtbase + I2C_MCR);
writel            454 drivers/i2c/busses/i2c-nomadik.c 	writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
writel            473 drivers/i2c/busses/i2c-nomadik.c 	writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
writel            521 drivers/i2c/busses/i2c-nomadik.c 	writel(mcr, dev->virtbase + I2C_MCR);
writel            524 drivers/i2c/busses/i2c-nomadik.c 	writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
writel            553 drivers/i2c/busses/i2c-nomadik.c 	writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask,
writel            708 drivers/i2c/busses/i2c-nomadik.c 	writel(readl(dev->virtbase + I2C_IMSCR) & ~(I2C_CLEAR_ALL_INTS & irq),
writel             67 drivers/i2c/busses/i2c-nvidia-gpu.c 	writel(val, i2cd->regs + I2C_MST_HYBRID_PADCTL);
writel             74 drivers/i2c/busses/i2c-nvidia-gpu.c 	writel(val, i2cd->regs + I2C_MST_I2C0_TIMING);
writel            113 drivers/i2c/busses/i2c-nvidia-gpu.c 	writel(val, i2cd->regs + I2C_MST_CNTL);
writel            142 drivers/i2c/busses/i2c-nvidia-gpu.c 	writel(I2C_MST_CNTL_GEN_START, i2cd->regs + I2C_MST_CNTL);
writel            148 drivers/i2c/busses/i2c-nvidia-gpu.c 	writel(I2C_MST_CNTL_GEN_STOP, i2cd->regs + I2C_MST_CNTL);
writel            156 drivers/i2c/busses/i2c-nvidia-gpu.c 	writel(data, i2cd->regs + I2C_MST_DATA);
writel            159 drivers/i2c/busses/i2c-nvidia-gpu.c 	writel(val, i2cd->regs + I2C_MST_CNTL);
writel            180 drivers/i2c/busses/i2c-nvidia-gpu.c 			writel(msgs[i].addr, i2cd->regs + I2C_MST_ADDR);
writel            117 drivers/i2c/busses/i2c-owl.c 	writel(regval, reg);
writel            129 drivers/i2c/busses/i2c-owl.c 	writel(0, i2c_dev->base + OWL_I2C_REG_STAT);
writel            164 drivers/i2c/busses/i2c-owl.c 	writel(OWL_I2C_DIV_FACTOR(val), i2c_dev->base + OWL_I2C_REG_CLKDIV);
writel            203 drivers/i2c/busses/i2c-owl.c 			writel(msg->buf[i2c_dev->msg_ptr++],
writel            281 drivers/i2c/busses/i2c-owl.c 		writel(val, i2c_dev->base + OWL_I2C_REG_STAT);
writel            307 drivers/i2c/busses/i2c-owl.c 		writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT);
writel            311 drivers/i2c/busses/i2c-owl.c 			writel(msgs[0].buf[idx],
writel            325 drivers/i2c/busses/i2c-owl.c 	writel(msg->len, i2c_dev->base + OWL_I2C_REG_DATCNT);
writel            328 drivers/i2c/busses/i2c-owl.c 	writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT);
writel            338 drivers/i2c/busses/i2c-owl.c 			writel(msg->buf[idx],
writel            354 drivers/i2c/busses/i2c-owl.c 	writel(i2c_cmd, i2c_dev->base + OWL_I2C_REG_CMD);
writel             59 drivers/i2c/busses/i2c-puv3.c 		writel(i2c_reg | I2C_DATACMD_WRITE, I2C_DATACMD);
writel             65 drivers/i2c/busses/i2c-puv3.c 		writel(I2C_DATACMD_READ, I2C_DATACMD);
writel             98 drivers/i2c/busses/i2c-puv3.c 		writel(i2c_reg | I2C_DATACMD_WRITE, I2C_DATACMD);
writel            101 drivers/i2c/busses/i2c-puv3.c 		writel(*buf | I2C_DATACMD_WRITE, I2C_DATACMD);
writel            125 drivers/i2c/busses/i2c-puv3.c 	writel(I2C_ENABLE_DISABLE, I2C_ENABLE);
writel            128 drivers/i2c/busses/i2c-puv3.c 	writel(I2C_CON_MASTER | I2C_CON_SPEED_STD | I2C_CON_SLAVEDISABLE, I2C_CON);
writel            130 drivers/i2c/busses/i2c-puv3.c 	writel(pmsg->addr, I2C_TAR);
writel            133 drivers/i2c/busses/i2c-puv3.c 	writel(I2C_ENABLE_ENABLE, I2C_ENABLE);
writel            246 drivers/i2c/busses/i2c-puv3.c 	writel(I2C_ENABLE_DISABLE, I2C_ENABLE);
writel            356 drivers/i2c/busses/i2c-pxa.c 		writel(icr, _ICR(i2c));
writel            364 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP),
writel            433 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
writel            483 drivers/i2c/busses/i2c-pxa.c 			writel(readl(_ICR(i2c)) & ~ICR_STOP, _ICR(i2c));
writel            493 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~(ICR_STOP|ICR_ACKNAK|ICR_MA), _ICR(i2c));
writel            494 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
writel            513 drivers/i2c/busses/i2c-pxa.c 	writel(ICR_UR, _ICR(i2c));
writel            514 drivers/i2c/busses/i2c-pxa.c 	writel(I2C_ISR_INIT, _ISR(i2c));
writel            515 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
writel            518 drivers/i2c/busses/i2c-pxa.c 		writel(i2c->slave_addr, _ISAR(i2c));
writel            521 drivers/i2c/busses/i2c-pxa.c 	writel(I2C_ICR_INIT | (i2c->fast_mode ? i2c->fm_mask : 0), _ICR(i2c));
writel            522 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | (i2c->high_mode ? i2c->hs_mask : 0), _ICR(i2c));
writel            526 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c));
writel            532 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
writel            552 drivers/i2c/busses/i2c-pxa.c 		writel(ret, _IDBR(i2c));
writel            553 drivers/i2c/busses/i2c-pxa.c 		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));   /* allow next byte */
writel            564 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
writel            584 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
writel            585 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
writel            601 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
writel            628 drivers/i2c/busses/i2c-pxa.c 		writel(0, _IDBR(i2c));
writel            629 drivers/i2c/busses/i2c-pxa.c 		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
writel            635 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
writel            647 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
writel            648 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
writel            664 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
writel            695 drivers/i2c/busses/i2c-pxa.c 	writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
writel            702 drivers/i2c/busses/i2c-pxa.c 	writel(icr | ICR_START | ICR_TB, _ICR(i2c));
writel            714 drivers/i2c/busses/i2c-pxa.c 	writel(icr, _ICR(i2c));
writel            740 drivers/i2c/busses/i2c-pxa.c 	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
writel            758 drivers/i2c/busses/i2c-pxa.c 	writel(i2c->master_code, _IDBR(i2c));
writel            762 drivers/i2c/busses/i2c-pxa.c 	writel(icr, _ICR(i2c));
writel            977 drivers/i2c/busses/i2c-pxa.c 		writel(i2c->msg->buf[i2c->msg_ptr++], _IDBR(i2c));
writel           1009 drivers/i2c/busses/i2c-pxa.c 		writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
writel           1031 drivers/i2c/busses/i2c-pxa.c 	writel(icr, _ICR(i2c));
writel           1059 drivers/i2c/busses/i2c-pxa.c 	writel(icr, _ICR(i2c));
writel           1086 drivers/i2c/busses/i2c-pxa.c 	writel(isr & VALID_INT_SOURCE, _ISR(i2c));
writel            299 drivers/i2c/busses/i2c-qup.c 		writel(QUP_RESET_STATE, qup->base + QUP_STATE);
writel            308 drivers/i2c/busses/i2c-qup.c 		writel(qup_err, qup->base + QUP_ERROR_FLAGS);
writel            312 drivers/i2c/busses/i2c-qup.c 		writel(bus_err, qup->base + QUP_I2C_STATUS);
writel            331 drivers/i2c/busses/i2c-qup.c 			writel(QUP_RESET_STATE, qup->base + QUP_STATE);
writel            336 drivers/i2c/busses/i2c-qup.c 		writel(QUP_OUT_SVC_FLAG, qup->base + QUP_OPERATIONAL);
writel            348 drivers/i2c/busses/i2c-qup.c 		writel(QUP_IN_SVC_FLAG, qup->base + QUP_OPERATIONAL);
writel            414 drivers/i2c/busses/i2c-qup.c 	writel(val, qup->base + QUP_STATE);
writel            432 drivers/i2c/busses/i2c-qup.c 	writel(state, qup->base + QUP_STATE);
writel            492 drivers/i2c/busses/i2c-qup.c 			writel(val, qup->base + QUP_OUT_FIFO_BASE);
writel            853 drivers/i2c/busses/i2c-qup.c 	writel(0, qup->base + QUP_MX_INPUT_CNT);
writel            854 drivers/i2c/busses/i2c-qup.c 	writel(0, qup->base + QUP_MX_OUTPUT_CNT);
writel            857 drivers/i2c/busses/i2c-qup.c 	writel(QUP_REPACK_EN | QUP_BAM_MODE, qup->base + QUP_IO_MODE);
writel            860 drivers/i2c/busses/i2c-qup.c 	writel((0x3 << 8), qup->base + QUP_OPERATIONAL_MASK);
writel            867 drivers/i2c/busses/i2c-qup.c 	writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL);
writel            911 drivers/i2c/busses/i2c-qup.c 		writel(1, qup->base + QUP_SW_RESET);
writel            955 drivers/i2c/busses/i2c-qup.c 	writel(val, qup->base + QUP_OUT_FIFO_BASE);
writel            971 drivers/i2c/busses/i2c-qup.c 		writel(0, qup->base + QUP_MX_WRITE_CNT);
writel            972 drivers/i2c/busses/i2c-qup.c 		writel(blk->total_tx_len, qup->base + QUP_MX_OUTPUT_CNT);
writel            974 drivers/i2c/busses/i2c-qup.c 		writel(0, qup->base + QUP_MX_OUTPUT_CNT);
writel            975 drivers/i2c/busses/i2c-qup.c 		writel(blk->total_tx_len, qup->base + QUP_MX_WRITE_CNT);
writel            981 drivers/i2c/busses/i2c-qup.c 			writel(0, qup->base + QUP_MX_READ_CNT);
writel            982 drivers/i2c/busses/i2c-qup.c 			writel(blk->total_rx_len, qup->base + QUP_MX_INPUT_CNT);
writel            984 drivers/i2c/busses/i2c-qup.c 			writel(0, qup->base + QUP_MX_INPUT_CNT);
writel            985 drivers/i2c/busses/i2c-qup.c 			writel(blk->total_rx_len, qup->base + QUP_MX_READ_CNT);
writel            991 drivers/i2c/busses/i2c-qup.c 	writel(qup_config, qup->base + QUP_CONFIG);
writel            992 drivers/i2c/busses/i2c-qup.c 	writel(io_mode, qup->base + QUP_IO_MODE);
writel           1013 drivers/i2c/busses/i2c-qup.c 	writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL);
writel           1082 drivers/i2c/busses/i2c-qup.c 	writel(1, qup->base + QUP_SW_RESET);
writel           1088 drivers/i2c/busses/i2c-qup.c 	writel(I2C_MINI_CORE | I2C_N_VAL, qup->base + QUP_CONFIG);
writel           1135 drivers/i2c/busses/i2c-qup.c 		writel(qup->config_run | blk->total_tx_len,
writel           1138 drivers/i2c/busses/i2c-qup.c 		writel(qup->config_run | blk->total_tx_len,
writel           1143 drivers/i2c/busses/i2c-qup.c 			writel(qup->config_run | blk->total_rx_len,
writel           1146 drivers/i2c/busses/i2c-qup.c 			writel(qup->config_run | blk->total_rx_len,
writel           1152 drivers/i2c/busses/i2c-qup.c 	writel(qup_config, qup->base + QUP_CONFIG);
writel           1167 drivers/i2c/busses/i2c-qup.c 		writel(0, qup->base + QUP_MX_WRITE_CNT);
writel           1169 drivers/i2c/busses/i2c-qup.c 		writel(0, qup->base + QUP_MX_OUTPUT_CNT);
writel           1174 drivers/i2c/busses/i2c-qup.c 		writel(0, qup->base + QUP_MX_READ_CNT);
writel           1176 drivers/i2c/busses/i2c-qup.c 		writel(0, qup->base + QUP_MX_INPUT_CNT);
writel           1179 drivers/i2c/busses/i2c-qup.c 	writel(io_mode, qup->base + QUP_IO_MODE);
writel           1270 drivers/i2c/busses/i2c-qup.c 			writel(blk->tx_fifo_data,
writel           1289 drivers/i2c/busses/i2c-qup.c 		writel(blk->tx_fifo_data, qup->base + QUP_OUT_FIFO_BASE);
writel           1341 drivers/i2c/busses/i2c-qup.c 	writel(blk->tx_fifo_data, qup->base + QUP_OUT_FIFO_BASE);
writel           1387 drivers/i2c/busses/i2c-qup.c 		writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL);
writel           1562 drivers/i2c/busses/i2c-qup.c 	writel(1, qup->base + QUP_SW_RESET);
writel           1568 drivers/i2c/busses/i2c-qup.c 	writel(I2C_MINI_CORE | I2C_N_VAL_V2, qup->base + QUP_CONFIG);
writel           1569 drivers/i2c/busses/i2c-qup.c 	writel(QUP_V2_TAGS_EN, qup->base + QUP_I2C_MASTER_GEN);
writel           1653 drivers/i2c/busses/i2c-qup.c 	writel(config, qup->base + QUP_CONFIG);
writel           1804 drivers/i2c/busses/i2c-qup.c 	writel(1, qup->base + QUP_SW_RESET);
writel            153 drivers/i2c/busses/i2c-rcar.c 	writel(val, priv->io + reg);
writel            226 drivers/i2c/busses/i2c-rk3x.c 	writel(value, i2c->regs + offset);
writel            193 drivers/i2c/busses/i2c-s3c2410.c 	writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
writel            201 drivers/i2c/busses/i2c-s3c2410.c 	writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
writel            210 drivers/i2c/busses/i2c-s3c2410.c 	writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
writel            218 drivers/i2c/busses/i2c-s3c2410.c 	writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
writel            264 drivers/i2c/busses/i2c-s3c2410.c 	writel(stat, i2c->regs + S3C2410_IICSTAT);
writel            276 drivers/i2c/busses/i2c-s3c2410.c 	writel(iiccon, i2c->regs + S3C2410_IICCON);
writel            279 drivers/i2c/busses/i2c-s3c2410.c 	writel(stat, i2c->regs + S3C2410_IICSTAT);
writel            339 drivers/i2c/busses/i2c-s3c2410.c 	writel(iicstat, i2c->regs + S3C2410_IICSTAT);
writel            550 drivers/i2c/busses/i2c-s3c2410.c 	writel(tmp, i2c->regs + S3C2410_IICCON);
writel            576 drivers/i2c/busses/i2c-s3c2410.c 		writel(tmp, i2c->regs +  S3C2410_IICCON);
writel            606 drivers/i2c/busses/i2c-s3c2410.c 	writel(tmp, i2c->regs + S3C2410_IICSTAT);
writel            612 drivers/i2c/busses/i2c-s3c2410.c 	writel(tmp, i2c->regs + S3C2410_IICCON);
writel            867 drivers/i2c/busses/i2c-s3c2410.c 	writel(iiccon, i2c->regs + S3C2410_IICCON);
writel            883 drivers/i2c/busses/i2c-s3c2410.c 		writel(sda_delay, i2c->regs + S3C2440_IICLC);
writel            992 drivers/i2c/busses/i2c-s3c2410.c 	writel(0, i2c->regs + S3C2410_IICCON);
writel            993 drivers/i2c/busses/i2c-s3c2410.c 	writel(0, i2c->regs + S3C2410_IICSTAT);
writel            114 drivers/i2c/busses/i2c-sirf.c 			writel(regval,
writel            127 drivers/i2c/busses/i2c-sirf.c 			writel(regval,
writel            129 drivers/i2c/busses/i2c-sirf.c 			writel(siic->buf[siic->finished_len++],
writel            136 drivers/i2c/busses/i2c-sirf.c 	writel(SIRFSOC_I2C_START_CMD, siic->base + SIRFSOC_I2C_CMD_START);
writel            147 drivers/i2c/busses/i2c-sirf.c 		writel(SIRFSOC_I2C_STAT_ERR, siic->base + SIRFSOC_I2C_STATUS);
writel            159 drivers/i2c/busses/i2c-sirf.c 		writel(readl(siic->base + SIRFSOC_I2C_CTRL) | SIRFSOC_I2C_RESET,
writel            174 drivers/i2c/busses/i2c-sirf.c 		writel(SIRFSOC_I2C_STAT_CMD_DONE, siic->base + SIRFSOC_I2C_STATUS);
writel            190 drivers/i2c/busses/i2c-sirf.c 	writel(regval, siic->base + SIRFSOC_I2C_CMD(siic->cmd_ptr++));
writel            198 drivers/i2c/busses/i2c-sirf.c 	writel(addr, siic->base + SIRFSOC_I2C_CMD(siic->cmd_ptr++));
writel            209 drivers/i2c/busses/i2c-sirf.c 	writel(regval | SIRFSOC_I2C_CMD_DONE_EN | SIRFSOC_I2C_ERR_INT_EN,
writel            218 drivers/i2c/busses/i2c-sirf.c 	writel(regval & ~(SIRFSOC_I2C_CMD_DONE_EN | SIRFSOC_I2C_ERR_INT_EN),
writel            220 drivers/i2c/busses/i2c-sirf.c 	writel(0, siic->base + SIRFSOC_I2C_CMD_START);
writel            224 drivers/i2c/busses/i2c-sirf.c 		writel(readl(siic->base + SIRFSOC_I2C_CTRL) | SIRFSOC_I2C_RESET,
writel            345 drivers/i2c/busses/i2c-sirf.c 	writel(SIRFSOC_I2C_RESET, siic->base + SIRFSOC_I2C_CTRL);
writel            348 drivers/i2c/busses/i2c-sirf.c 	writel(SIRFSOC_I2C_CORE_EN | SIRFSOC_I2C_MASTER_MODE,
writel            382 drivers/i2c/busses/i2c-sirf.c 	writel(regval, siic->base + SIRFSOC_I2C_CLK_CTRL);
writel            384 drivers/i2c/busses/i2c-sirf.c 		writel(0xFF, siic->base + SIRFSOC_I2C_SDA_DELAY);
writel            386 drivers/i2c/busses/i2c-sirf.c 		writel(regval, siic->base + SIRFSOC_I2C_SDA_DELAY);
writel            413 drivers/i2c/busses/i2c-sirf.c 	writel(SIRFSOC_I2C_RESET, siic->base + SIRFSOC_I2C_CTRL);
writel            439 drivers/i2c/busses/i2c-sirf.c 	writel(SIRFSOC_I2C_RESET, siic->base + SIRFSOC_I2C_CTRL);
writel            442 drivers/i2c/busses/i2c-sirf.c 	writel(SIRFSOC_I2C_CORE_EN | SIRFSOC_I2C_MASTER_MODE,
writel            444 drivers/i2c/busses/i2c-sirf.c 	writel(siic->clk_div, siic->base + SIRFSOC_I2C_CLK_CTRL);
writel            445 drivers/i2c/busses/i2c-sirf.c 	writel(siic->sda_delay, siic->base + SIRFSOC_I2C_SDA_DELAY);
writel             94 drivers/i2c/busses/i2c-sprd.c 	writel(count, i2c_dev->base + I2C_COUNT);
writel            102 drivers/i2c/busses/i2c-sprd.c 		writel(tmp & ~STP_EN, i2c_dev->base + I2C_CTL);
writel            104 drivers/i2c/busses/i2c-sprd.c 		writel(tmp | STP_EN, i2c_dev->base + I2C_CTL);
writel            111 drivers/i2c/busses/i2c-sprd.c 	writel(tmp & ~I2C_START, i2c_dev->base + I2C_CTL);
writel            118 drivers/i2c/busses/i2c-sprd.c 	writel(tmp & ~I2C_RX_ACK, i2c_dev->base + I2C_STATUS);
writel            125 drivers/i2c/busses/i2c-sprd.c 	writel(tmp & ~I2C_INT, i2c_dev->base + I2C_STATUS);
writel            130 drivers/i2c/busses/i2c-sprd.c 	writel(I2C_RST, i2c_dev->base + ADDR_RST);
writel            135 drivers/i2c/busses/i2c-sprd.c 	writel(m->addr << 1, i2c_dev->base + I2C_ADDR_CFG);
writel            160 drivers/i2c/busses/i2c-sprd.c 	writel(tmp, i2c_dev->base + I2C_CTL);
writel            169 drivers/i2c/busses/i2c-sprd.c 	writel(tmp, i2c_dev->base + I2C_CTL);
writel            181 drivers/i2c/busses/i2c-sprd.c 	writel(tmp, i2c_dev->base + I2C_CTL);
writel            193 drivers/i2c/busses/i2c-sprd.c 	writel(tmp, i2c_dev->base + I2C_CTL);
writel            200 drivers/i2c/busses/i2c-sprd.c 	writel(tmp | I2C_START, i2c_dev->base + I2C_CTL);
writel            207 drivers/i2c/busses/i2c-sprd.c 	writel(cmd | rw << 3, i2c_dev->base + I2C_CTL);
writel            336 drivers/i2c/busses/i2c-sprd.c 	writel(div0, i2c_dev->base + ADDR_DVD0);
writel            337 drivers/i2c/busses/i2c-sprd.c 	writel(div1, i2c_dev->base + ADDR_DVD1);
writel            341 drivers/i2c/busses/i2c-sprd.c 		writel((6 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD);
writel            343 drivers/i2c/busses/i2c-sprd.c 		writel((4 * apb_clk) / 1000000, i2c_dev->base + ADDR_STA0_DVD);
writel            350 drivers/i2c/busses/i2c-sprd.c 	writel(tmp, i2c_dev->base + I2C_CTL);
writel            360 drivers/i2c/busses/i2c-sprd.c 	writel(tmp | I2C_EN | I2C_INT_EN, i2c_dev->base + I2C_CTL);
writel            177 drivers/i2c/busses/i2c-stu300.c 	writel((value << 16) | value, address);
writel            105 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(status, p2wi->regs + P2WI_INTS);
writel            132 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(command, p2wi->regs + P2WI_DADDR0);
writel            137 drivers/i2c/busses/i2c-sun6i-p2wi.c 		writel(data->byte, p2wi->regs + P2WI_DATA0);
writel            139 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(dlen, p2wi->regs + P2WI_DLEN);
writel            148 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(P2WI_INTS_LOAD_BSY | P2WI_INTS_TRANS_ERR | P2WI_INTS_TRANS_OVER,
writel            151 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(P2WI_CTRL_START_TRANS | P2WI_CTRL_GLOBAL_INT_ENB,
writel            289 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(P2WI_CTRL_SOFT_RST, p2wi->regs + P2WI_CTRL);
writel            304 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div),
writel            287 drivers/i2c/busses/i2c-tegra.c 	writel(val, i2c_dev->base + reg);
writel            310 drivers/i2c/busses/i2c-tegra.c 	writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
writel            111 drivers/i2c/busses/i2c-uniphier-f.c 		writel(*priv->buf++, priv->membase + UNIPHIER_FI2C_DTTX);
writel            132 drivers/i2c/busses/i2c-uniphier-f.c 	writel(priv->enabled_irqs, priv->membase + UNIPHIER_FI2C_IE);
writel            138 drivers/i2c/busses/i2c-uniphier-f.c 	writel(mask, priv->membase + UNIPHIER_FI2C_IC);
writel            145 drivers/i2c/busses/i2c-uniphier-f.c 	writel(UNIPHIER_FI2C_CR_MST | UNIPHIER_FI2C_CR_STO,
writel            213 drivers/i2c/busses/i2c-uniphier-f.c 				writel(UNIPHIER_FI2C_CR_MST |
writel            256 drivers/i2c/busses/i2c-uniphier-f.c 	writel(0, priv->membase + UNIPHIER_FI2C_TBC);
writel            258 drivers/i2c/busses/i2c-uniphier-f.c 	writel(UNIPHIER_FI2C_DTTX_CMD | addr << 1,
writel            277 drivers/i2c/busses/i2c-uniphier-f.c 		writel(priv->len, priv->membase + UNIPHIER_FI2C_RBC);
writel            286 drivers/i2c/busses/i2c-uniphier-f.c 		writel(0, priv->membase + UNIPHIER_FI2C_RBC);
writel            294 drivers/i2c/busses/i2c-uniphier-f.c 	writel(UNIPHIER_FI2C_DTTX_CMD | UNIPHIER_FI2C_DTTX_RD | addr << 1,
writel            300 drivers/i2c/busses/i2c-uniphier-f.c 	writel(UNIPHIER_FI2C_RST_RST, priv->membase + UNIPHIER_FI2C_RST);
writel            305 drivers/i2c/busses/i2c-uniphier-f.c 	writel(UNIPHIER_FI2C_BRST_FOEN | UNIPHIER_FI2C_BRST_RSCL,
writel            334 drivers/i2c/busses/i2c-uniphier-f.c 	writel(UNIPHIER_FI2C_RST_TBRST | UNIPHIER_FI2C_RST_RBRST,
writel            350 drivers/i2c/busses/i2c-uniphier-f.c 		writel(UNIPHIER_FI2C_CR_MST | UNIPHIER_FI2C_CR_STA,
writel            456 drivers/i2c/busses/i2c-uniphier-f.c 	writel(val ? UNIPHIER_FI2C_BRST_RSCL : 0,
writel            488 drivers/i2c/busses/i2c-uniphier-f.c 	writel(tmp, priv->membase + UNIPHIER_FI2C_CR);
writel            496 drivers/i2c/busses/i2c-uniphier-f.c 	writel(cyc, priv->membase + UNIPHIER_FI2C_CYC);
writel            502 drivers/i2c/busses/i2c-uniphier-f.c 	writel(cyc * 5 / 9, priv->membase + UNIPHIER_FI2C_LCTL);
writel            507 drivers/i2c/busses/i2c-uniphier-f.c 	writel(cyc / 2, priv->membase + UNIPHIER_FI2C_SSUT);
writel            512 drivers/i2c/busses/i2c-uniphier-f.c 	writel(cyc / 16, priv->membase + UNIPHIER_FI2C_DSUT);
writel             74 drivers/i2c/busses/i2c-uniphier.c 	writel(txdata, priv->membase + UNIPHIER_I2C_DTRM);
writel            256 drivers/i2c/busses/i2c-uniphier.c 	writel(val, priv->membase + UNIPHIER_I2C_BRST);
writel            271 drivers/i2c/busses/i2c-uniphier.c 	writel(val ? UNIPHIER_I2C_BRST_RSCL : 0,
writel            308 drivers/i2c/busses/i2c-uniphier.c 	writel((cyc * 5 / 9 << 16) | cyc, priv->membase + UNIPHIER_I2C_CLK);
writel             33 drivers/i2c/busses/i2c-versatile.c 	writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC));
writel             40 drivers/i2c/busses/i2c-versatile.c 	writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC));
writel             79 drivers/i2c/busses/i2c-versatile.c 	writel(SCL | SDA, i2c->base + I2C_CONTROLS);
writel            106 drivers/i2c/busses/i2c-xlp9xx.c 	writel(val, priv->base + reg);
writel            303 drivers/i3c/master/dw-i3c-master.c 	writel(readl(master->regs + DEVICE_CTRL) & ~DEV_CTRL_ENABLE,
writel            309 drivers/i3c/master/dw-i3c-master.c 	writel(readl(master->regs + DEVICE_CTRL) | DEV_CTRL_ENABLE,
writel            396 drivers/i3c/master/dw-i3c-master.c 	writel(thld_ctrl, master->regs + QUEUE_THLD_CTRL);
writel            401 drivers/i3c/master/dw-i3c-master.c 		writel(cmd->cmd_hi, master->regs + COMMAND_QUEUE_PORT);
writel            402 drivers/i3c/master/dw-i3c-master.c 		writel(cmd->cmd_lo, master->regs + COMMAND_QUEUE_PORT);
writel            430 drivers/i3c/master/dw-i3c-master.c 		writel(RESET_CTRL_RX_FIFO | RESET_CTRL_TX_FIFO |
writel            504 drivers/i3c/master/dw-i3c-master.c 		writel(readl(master->regs + DEVICE_CTRL) | DEV_CTRL_RESUME,
writel            539 drivers/i3c/master/dw-i3c-master.c 	writel(scl_timing, master->regs + SCL_I3C_PP_TIMING);
writel            542 drivers/i3c/master/dw-i3c-master.c 		writel(BUS_I3C_MST_FREE(lcnt), master->regs + BUS_FREE_TIMING);
writel            546 drivers/i3c/master/dw-i3c-master.c 	writel(scl_timing, master->regs + SCL_I3C_OD_TIMING);
writel            556 drivers/i3c/master/dw-i3c-master.c 	writel(scl_timing, master->regs + SCL_EXT_LCNT_TIMING);
writel            577 drivers/i3c/master/dw-i3c-master.c 	writel(scl_timing, master->regs + SCL_I2C_FMP_TIMING);
writel            583 drivers/i3c/master/dw-i3c-master.c 	writel(scl_timing, master->regs + SCL_I2C_FM_TIMING);
writel            585 drivers/i3c/master/dw-i3c-master.c 	writel(BUS_I3C_MST_FREE(lcnt), master->regs + BUS_FREE_TIMING);
writel            586 drivers/i3c/master/dw-i3c-master.c 	writel(readl(master->regs + DEVICE_CTRL) | DEV_CTRL_I2C_SLAVE_PRESENT,
writel            618 drivers/i3c/master/dw-i3c-master.c 	writel(thld_ctrl, master->regs + QUEUE_THLD_CTRL);
writel            622 drivers/i3c/master/dw-i3c-master.c 	writel(thld_ctrl, master->regs + DATA_BUFFER_THLD_CTRL);
writel            624 drivers/i3c/master/dw-i3c-master.c 	writel(INTR_ALL, master->regs + INTR_STATUS);
writel            625 drivers/i3c/master/dw-i3c-master.c 	writel(INTR_MASTER_MASK, master->regs + INTR_STATUS_EN);
writel            626 drivers/i3c/master/dw-i3c-master.c 	writel(INTR_MASTER_MASK, master->regs + INTR_SIGNAL_EN);
writel            632 drivers/i3c/master/dw-i3c-master.c 	writel(DEV_ADDR_DYNAMIC_ADDR_VALID | DEV_ADDR_DYNAMIC(ret),
writel            642 drivers/i3c/master/dw-i3c-master.c 	writel(IBI_REQ_REJECT_ALL, master->regs + IBI_SIR_REQ_REJECT);
writel            643 drivers/i3c/master/dw-i3c-master.c 	writel(IBI_REQ_REJECT_ALL, master->regs + IBI_MR_REQ_REJECT);
writel            646 drivers/i3c/master/dw-i3c-master.c 	writel(readl(master->regs + DEVICE_CTRL) | DEV_CTRL_HOT_JOIN_NACK,
writel            786 drivers/i3c/master/dw-i3c-master.c 		writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(ret),
writel            903 drivers/i3c/master/dw-i3c-master.c 	writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(dev->info.dyn_addr),
writel            932 drivers/i3c/master/dw-i3c-master.c 	writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(master->addrs[pos]),
writel            945 drivers/i3c/master/dw-i3c-master.c 	writel(0,
writel           1040 drivers/i3c/master/dw-i3c-master.c 	writel(DEV_ADDR_TABLE_LEGACY_I2C_DEV |
writel           1054 drivers/i3c/master/dw-i3c-master.c 	writel(0,
writel           1072 drivers/i3c/master/dw-i3c-master.c 		writel(INTR_ALL, master->regs + INTR_STATUS);
writel           1079 drivers/i3c/master/dw-i3c-master.c 		writel(INTR_TRANSFER_ERR_STAT, master->regs + INTR_STATUS);
writel           1133 drivers/i3c/master/dw-i3c-master.c 	writel(INTR_ALL, master->regs + INTR_STATUS);
writel            488 drivers/i3c/master/i3c-master-cdns.c 	writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN, master->regs + CTRL);
writel            496 drivers/i3c/master/i3c-master-cdns.c 	writel(readl(master->regs + CTRL) | CTRL_DEV_EN, master->regs + CTRL);
writel            528 drivers/i3c/master/i3c-master-cdns.c 	writel(MST_INT_CMDD_EMP, master->regs + MST_ICR);
writel            539 drivers/i3c/master/i3c-master-cdns.c 		writel(cmd->cmd1 | CMD1_FIFO_CMDID(i),
writel            541 drivers/i3c/master/i3c-master-cdns.c 		writel(cmd->cmd0, master->regs + CMD0_FIFO);
writel            544 drivers/i3c/master/i3c-master-cdns.c 	writel(readl(master->regs + CTRL) | CTRL_MCS,
writel            546 drivers/i3c/master/i3c-master-cdns.c 	writel(MST_INT_CMDD_EMP, master->regs + MST_IER);
writel            562 drivers/i3c/master/i3c-master-cdns.c 	writel(MST_INT_CMDD_EMP, master->regs + MST_IDR);
writel            648 drivers/i3c/master/i3c-master-cdns.c 		writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN,
writel            654 drivers/i3c/master/i3c-master-cdns.c 		writel(FLUSH_RX_FIFO | FLUSH_TX_FIFO | FLUSH_CMD_FIFO |
writel            657 drivers/i3c/master/i3c-master-cdns.c 		writel(MST_INT_CMDD_EMP, master->regs + MST_IDR);
writel            658 drivers/i3c/master/i3c-master-cdns.c 		writel(readl(master->regs + CTRL) | CTRL_DEV_EN,
writel            900 drivers/i3c/master/i3c-master-cdns.c 	writel(DEV_ID_RR0_IS_I3C | rr, master->regs + DEV_ID_RR0(data->id));
writel            964 drivers/i3c/master/i3c-master-cdns.c 		writel(readl(master->regs + DEVS_CTRL) |
writel            978 drivers/i3c/master/i3c-master-cdns.c 	writel(readl(master->regs + DEVS_CTRL) |
writel           1006 drivers/i3c/master/i3c-master-cdns.c 	writel(prepare_rr0_dev_address(dev->addr),
writel           1008 drivers/i3c/master/i3c-master-cdns.c 	writel(dev->lvr, master->regs + DEV_ID_RR2(data->id));
writel           1009 drivers/i3c/master/i3c-master-cdns.c 	writel(readl(master->regs + DEVS_CTRL) |
writel           1022 drivers/i3c/master/i3c-master-cdns.c 	writel(readl(master->regs + DEVS_CTRL) |
writel           1118 drivers/i3c/master/i3c-master-cdns.c 	writel(prescl1, master->regs + PRESCL_CTRL1);
writel           1143 drivers/i3c/master/i3c-master-cdns.c 		writel(prepare_rr0_dev_address(last_addr) | DEV_ID_RR0_IS_I3C,
writel           1145 drivers/i3c/master/i3c-master-cdns.c 		writel(0, master->regs + DEV_ID_RR1(slot));
writel           1146 drivers/i3c/master/i3c-master-cdns.c 		writel(0, master->regs + DEV_ID_RR2(slot));
writel           1169 drivers/i3c/master/i3c-master-cdns.c 	writel(readl(master->regs + DEVS_CTRL) |
writel           1234 drivers/i3c/master/i3c-master-cdns.c 	writel(prescl0, master->regs + PRESCL_CTRL0);
writel           1242 drivers/i3c/master/i3c-master-cdns.c 	writel(prescl1, master->regs + PRESCL_CTRL1);
writel           1249 drivers/i3c/master/i3c-master-cdns.c 	writel(prepare_rr0_dev_address(ret) | DEV_ID_RR0_IS_I3C,
writel           1267 drivers/i3c/master/i3c-master-cdns.c 	writel(ctrl, master->regs + CTRL);
writel           1332 drivers/i3c/master/i3c-master-cdns.c 	writel(MST_INT_IBIR_THR, master->regs + MST_ICR);
writel           1395 drivers/i3c/master/i3c-master-cdns.c 	writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
writel           1422 drivers/i3c/master/i3c-master-cdns.c 	writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
writel           1433 drivers/i3c/master/i3c-master-cdns.c 		writel(sirmap, master->regs + SIR_MAP_DEV_REG(data->ibi));
writel           1569 drivers/i3c/master/i3c-master-cdns.c 	writel(0xffffffff, master->regs + MST_IDR);
writel           1570 drivers/i3c/master/i3c-master-cdns.c 	writel(0xffffffff, master->regs + SLV_IDR);
writel           1599 drivers/i3c/master/i3c-master-cdns.c 	writel(IBIR_THR(1), master->regs + CMD_IBI_THR_CTRL);
writel           1600 drivers/i3c/master/i3c-master-cdns.c 	writel(MST_INT_IBIR_THR, master->regs + MST_IER);
writel           1601 drivers/i3c/master/i3c-master-cdns.c 	writel(DEVS_CTRL_DEV_CLR_ALL, master->regs + DEVS_CTRL);
writel            203 drivers/ide/ide-dma-sff.c 		writel(hwif->dmatable_dma,
writel             81 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_UDMASTB);
writel             86 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_UDMATRP);
writel             91 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_UDMAENV);
writel            119 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_DMASTB);
writel            123 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_DMARCVR);
writel            149 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_DATSTB);
writel            153 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_DATRCVR);
writel            171 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_REGSTB);
writel            175 drivers/ide/palm_bk3710.c 	writel(val32, base + BK3710_REGRCVR);
writel            245 drivers/ide/palm_bk3710.c 	writel(0x001, base + BK3710_MISCCTL);
writel            251 drivers/ide/palm_bk3710.c 	writel(0xFFFF, base + BK3710_IORDYTMP);
writel            416 drivers/ide/pmac.c 		writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG));
writel            418 drivers/ide/pmac.c 		writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG));
writel            433 drivers/ide/pmac.c 		writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
writel            434 drivers/ide/pmac.c 		writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
writel            436 drivers/ide/pmac.c 		writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
writel            437 drivers/ide/pmac.c 		writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
writel            870 drivers/ide/pmac.c 		writel(fcr, pmif->kauai_fcr);
writel            896 drivers/ide/pmac.c 			writel(fcr, pmif->kauai_fcr);
writel           1062 drivers/ide/pmac.c 		writel(KAUAI_FCR_UATA_MAGIC |
writel           1467 drivers/ide/pmac.c 	writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control);
writel           1517 drivers/ide/pmac.c 		writel(hwif->dmatable_dma, &dma->cmdptr);
writel           1542 drivers/ide/pmac.c 		writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL),
writel           1563 drivers/ide/pmac.c 	writel((RUN << 16) | RUN, &dma->control);
writel           1580 drivers/ide/pmac.c 	writel(((RUN|WAKE|DEAD) << 16), &dma->control);
writel           1629 drivers/ide/pmac.c 	writel((FLUSH << 16) | FLUSH, &dma->control);
writel            180 drivers/ide/siimage.c 		writel(val, (void __iomem *)addr);
writel            373 drivers/ide/siimage.c 			writel(sata_error, sata_error_addr);
writel            475 drivers/ide/siimage.c 			writel(tmp32, ioaddr + 0x48);
writel            478 drivers/ide/siimage.c 		writel(0, ioaddr + 0x148);
writel            479 drivers/ide/siimage.c 		writel(0, ioaddr + 0x1C8);
writel            518 drivers/ide/siimage.c 		writel(0xFFFF0000, ioaddr + 0x108);
writel            519 drivers/ide/siimage.c 		writel(0xFFFF0000, ioaddr + 0x188);
writel            520 drivers/ide/siimage.c 		writel(0x00680000, ioaddr + 0x148);
writel            521 drivers/ide/siimage.c 		writel(0x00680000, ioaddr + 0x1C8);
writel            231 drivers/iio/adc/aspeed_adc.c 		writel(ASPEED_OPERATION_MODE_NORMAL | ASPEED_ENGINE_ENABLE,
writel            252 drivers/iio/adc/aspeed_adc.c 	writel(adc_engine_control_reg_val,
writel            270 drivers/iio/adc/aspeed_adc.c 	writel(ASPEED_OPERATION_MODE_POWER_DOWN,
writel            289 drivers/iio/adc/aspeed_adc.c 	writel(ASPEED_OPERATION_MODE_POWER_DOWN,
writel             70 drivers/iio/adc/cc10001_adc.c 	writel(val, adc_dev->reg_base + reg);
writel            228 drivers/iio/adc/exynos_adc.c 	writel(con1, ADC_V1_CON(info->regs));
writel            231 drivers/iio/adc/exynos_adc.c 	writel(info->delay, ADC_V1_DLY(info->regs));
writel            243 drivers/iio/adc/exynos_adc.c 	writel(con, ADC_V1_CON(info->regs));
writel            248 drivers/iio/adc/exynos_adc.c 	writel(1, ADC_V1_INTCLR(info->regs));
writel            256 drivers/iio/adc/exynos_adc.c 	writel(addr, ADC_V1_MUX(info->regs));
writel            259 drivers/iio/adc/exynos_adc.c 	writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
writel            305 drivers/iio/adc/exynos_adc.c 	writel(con1, ADC_V1_CON(info->regs));
writel            308 drivers/iio/adc/exynos_adc.c 	writel(addr, ADC_S3C2410_MUX(info->regs));
writel            311 drivers/iio/adc/exynos_adc.c 	writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
writel            329 drivers/iio/adc/exynos_adc.c 	writel(addr, ADC_S3C2410_MUX(info->regs));
writel            332 drivers/iio/adc/exynos_adc.c 	writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
writel            352 drivers/iio/adc/exynos_adc.c 	writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
writel            382 drivers/iio/adc/exynos_adc.c 	writel(con1, ADC_V2_CON1(info->regs));
writel            386 drivers/iio/adc/exynos_adc.c 	writel(con2, ADC_V2_CON2(info->regs));
writel            389 drivers/iio/adc/exynos_adc.c 	writel(1, ADC_V2_INT_EN(info->regs));
writel            401 drivers/iio/adc/exynos_adc.c 	writel(con, ADC_V2_CON1(info->regs));
writel            406 drivers/iio/adc/exynos_adc.c 	writel(1, ADC_V2_INT_ST(info->regs));
writel            417 drivers/iio/adc/exynos_adc.c 	writel(con2, ADC_V2_CON2(info->regs));
writel            420 drivers/iio/adc/exynos_adc.c 	writel(con1 | ADC_CON_EN_START, ADC_V2_CON1(info->regs));
writel            456 drivers/iio/adc/exynos_adc.c 	writel(con1, ADC_V2_CON1(info->regs));
writel            461 drivers/iio/adc/exynos_adc.c 	writel(con2, ADC_V2_CON2(info->regs));
writel            464 drivers/iio/adc/exynos_adc.c 	writel(1, ADC_V2_INT_EN(info->regs));
writel            573 drivers/iio/adc/exynos_adc.c 	writel(ADC_S3C2410_TSC_PULL_UP_DISABLE | ADC_TSC_AUTOPST,
writel            607 drivers/iio/adc/exynos_adc.c 		writel(ADC_TSC_WAIT4INT | ADC_S3C2443_TSC_UD_SEN, ADC_V1_TSC(info->regs));
writel            656 drivers/iio/adc/exynos_adc.c 	writel(0, ADC_V1_CLRINTPNDNUP(info->regs));
writel            199 drivers/iio/adc/imx7d_adc.c 		writel(tmp_cfg1,
writel            208 drivers/iio/adc/imx7d_adc.c 	writel(sample_rate, info->regs + IMX7D_REG_ADC_TIMER_UNIT);
writel            220 drivers/iio/adc/imx7d_adc.c 	writel(cfg, info->regs + IMX7D_REG_ADC_ADC_CFG);
writel            223 drivers/iio/adc/imx7d_adc.c 	writel(IMX7D_REG_ADC_INT_CHANNEL_INT_EN,
writel            225 drivers/iio/adc/imx7d_adc.c 	writel(IMX7D_REG_ADC_INT_CHANNEL_INT_EN,
writel            265 drivers/iio/adc/imx7d_adc.c 	writel(cfg2, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel +
writel            267 drivers/iio/adc/imx7d_adc.c 	writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel);
writel            374 drivers/iio/adc/imx7d_adc.c 		writel(status, info->regs + IMX7D_REG_ADC_INT_STATUS);
writel            386 drivers/iio/adc/imx7d_adc.c 		writel(status, info->regs + IMX7D_REG_ADC_INT_STATUS);
writel            425 drivers/iio/adc/imx7d_adc.c 	writel(adc_cfg, info->regs + IMX7D_REG_ADC_ADC_CFG);
writel             72 drivers/iio/adc/ingenic-adc.c 	writel(cfg, adc->base + JZ_ADC_REG_CFG);
writel            190 drivers/iio/adc/ingenic-adc.c 	writel(((div_10us - 1) << JZ_ADC_REG_ADCLK_CLKDIV10US_LSB) |
writel             76 drivers/iio/adc/lpc18xx_adc.c 	writel(reg, adc->base + LPC18XX_ADC_CR);
writel            177 drivers/iio/adc/lpc18xx_adc.c 	writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR);
writel            188 drivers/iio/adc/lpc18xx_adc.c 	writel(0, adc->base + LPC18XX_ADC_CR);
writel            202 drivers/iio/adc/lpc18xx_adc.c 	writel(0, adc->base + LPC18XX_ADC_CR);
writel             90 drivers/iio/adc/men_z188_adc.c 	writel(ctl, addr + Z188_CTRL_REG);
writel             96 drivers/iio/adc/men_z188_adc.c 		writel(cfg, addr + i);
writel             98 drivers/iio/adc/mt6577_auxadc.c 	writel(val, reg);
writel            155 drivers/iio/adc/mxs-lradc-adc.c 		writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
writel            157 drivers/iio/adc/mxs-lradc-adc.c 	writel(0x1, adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
writel            161 drivers/iio/adc/mxs-lradc-adc.c 		writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
writel            164 drivers/iio/adc/mxs-lradc-adc.c 		writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
writel            168 drivers/iio/adc/mxs-lradc-adc.c 	writel(LRADC_CTRL4_LRADCSELECT_MASK(0),
writel            170 drivers/iio/adc/mxs-lradc-adc.c 	writel(chan, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
writel            172 drivers/iio/adc/mxs-lradc-adc.c 	writel(0, adc->base + LRADC_CH(0));
writel            175 drivers/iio/adc/mxs-lradc-adc.c 	writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
writel            177 drivers/iio/adc/mxs-lradc-adc.c 	writel(BIT(0), adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
writel            191 drivers/iio/adc/mxs-lradc-adc.c 	writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
writel            404 drivers/iio/adc/mxs-lradc-adc.c 	writel(reg & mxs_lradc_irq_mask(lradc),
writel            423 drivers/iio/adc/mxs-lradc-adc.c 		writel(chan_value, adc->base + LRADC_CH(j));
writel            442 drivers/iio/adc/mxs-lradc-adc.c 	writel(LRADC_DELAY_KICK, adc->base + (LRADC_DELAY(0) + st));
writel            495 drivers/iio/adc/mxs-lradc-adc.c 		writel(lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
writel            497 drivers/iio/adc/mxs-lradc-adc.c 	writel(lradc->buffer_vchans,
writel            504 drivers/iio/adc/mxs-lradc-adc.c 		writel(chan_value, adc->base + LRADC_CH(ofs));
writel            509 drivers/iio/adc/mxs-lradc-adc.c 	writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
writel            511 drivers/iio/adc/mxs-lradc-adc.c 	writel(ctrl4_clr, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
writel            512 drivers/iio/adc/mxs-lradc-adc.c 	writel(ctrl4_set, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
writel            513 drivers/iio/adc/mxs-lradc-adc.c 	writel(ctrl1_irq, adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
writel            514 drivers/iio/adc/mxs-lradc-adc.c 	writel(enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
writel            525 drivers/iio/adc/mxs-lradc-adc.c 	writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
writel            528 drivers/iio/adc/mxs-lradc-adc.c 	writel(lradc->buffer_vchans,
writel            531 drivers/iio/adc/mxs-lradc-adc.c 		writel(lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
writel            674 drivers/iio/adc/mxs-lradc-adc.c 	writel(adc_cfg, adc->base + LRADC_DELAY(0));
writel            681 drivers/iio/adc/mxs-lradc-adc.c 	writel(0, adc->base + LRADC_CTRL2);
writel            686 drivers/iio/adc/mxs-lradc-adc.c 	writel(0, adc->base + LRADC_DELAY(0));
writel             91 drivers/iio/adc/rcar-gyroadc.c 	writel(0, priv->regs + RCAR_GYROADC_START_STOP);
writel             95 drivers/iio/adc/rcar-gyroadc.c 		writel(0, priv->regs + RCAR_GYROADC_INTENR);
writel             98 drivers/iio/adc/rcar-gyroadc.c 	writel(priv->mode, priv->regs + RCAR_GYROADC_MODE_SELECT);
writel             99 drivers/iio/adc/rcar-gyroadc.c 	writel(clk_len, priv->regs + RCAR_GYROADC_CLOCK_LENGTH);
writel            100 drivers/iio/adc/rcar-gyroadc.c 	writel(clk_mhz * 1250, priv->regs + RCAR_GYROADC_1_25MS_LENGTH);
writel            106 drivers/iio/adc/rcar-gyroadc.c 	writel(RCAR_GYROADC_START_STOP_START,
writel            121 drivers/iio/adc/rcar-gyroadc.c 	writel(0, priv->regs + RCAR_GYROADC_START_STOP);
writel             71 drivers/iio/adc/rockchip_saradc.c 		writel(SARADC_CTRL_POWER_CTRL
writel             70 drivers/iio/adc/ti_am335x_adc.c 	writel(val, adc->mfd_tscadc->tscadc_base + reg);
writel            286 drivers/iio/adc/vf610_adc.c 	writel(cfg_data, info->regs + VF610_REG_ADC_CFG);
writel            287 drivers/iio/adc/vf610_adc.c 	writel(gc_data, info->regs + VF610_REG_ADC_GC);
writel            299 drivers/iio/adc/vf610_adc.c 	writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
writel            302 drivers/iio/adc/vf610_adc.c 	writel(adc_gc | VF610_ADC_CAL, info->regs + VF610_REG_ADC_GC);
writel            329 drivers/iio/adc/vf610_adc.c 	writel(cfg_data, info->regs + VF610_REG_ADC_CFG);
writel            444 drivers/iio/adc/vf610_adc.c 	writel(cfg_data, info->regs + VF610_REG_ADC_CFG);
writel            445 drivers/iio/adc/vf610_adc.c 	writel(gc_data, info->regs + VF610_REG_ADC_GC);
writel            644 drivers/iio/adc/vf610_adc.c 		writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
writel            736 drivers/iio/adc/vf610_adc.c 	writel(val, info->regs + VF610_REG_ADC_GC);
writel            744 drivers/iio/adc/vf610_adc.c 	writel(val, info->regs + VF610_REG_ADC_HC0);
writel            757 drivers/iio/adc/vf610_adc.c 	writel(val, info->regs + VF610_REG_ADC_GC);
writel            762 drivers/iio/adc/vf610_adc.c 	writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
writel            930 drivers/iio/adc/vf610_adc.c 	writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);
writel            118 drivers/iio/adc/xilinx-xadc-core.c 	writel(val, xadc->base + reg);
writel             90 drivers/iio/dac/lpc18xx_dac.c 		writel(reg, dac->base + LPC18XX_DAC_CR);
writel             91 drivers/iio/dac/lpc18xx_dac.c 		writel(LPC18XX_DAC_CTRL_DMA_ENA, dac->base + LPC18XX_DAC_CTRL);
writel            156 drivers/iio/dac/lpc18xx_dac.c 	writel(0, dac->base + LPC18XX_DAC_CTRL);
writel            157 drivers/iio/dac/lpc18xx_dac.c 	writel(0, dac->base + LPC18XX_DAC_CR);
writel            181 drivers/iio/dac/lpc18xx_dac.c 	writel(0, dac->base + LPC18XX_DAC_CTRL);
writel             48 drivers/iio/dac/vf610_dac.c 	writel(val, info->regs + VF610_DACx_STATCTRL);
writel             57 drivers/iio/dac/vf610_dac.c 	writel(val, info->regs + VF610_DACx_STATCTRL);
writel             74 drivers/iio/dac/vf610_dac.c 	writel(val, info->regs + VF610_DACx_STATCTRL);
writel            151 drivers/iio/dac/vf610_dac.c 		writel(VF610_DAC_DAT0(val), info->regs);
writel            458 drivers/infiniband/hw/bnxt_re/qplib_fp.h 		writel(NQ_DB_CP_FLAGS_REARM | (index & DBC_DBC32_XID_MASK), db);
writel            470 drivers/infiniband/hw/bnxt_re/qplib_fp.h 		writel(NQ_DB_CP_FLAGS | (index & DBC_DBC32_XID_MASK), db);
writel            194 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c 	writel(cmdq_prod, rcfw->cmdq_bar_reg_iomem +
writel            196 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c 	writel(RCFW_CMDQ_TRIG_VAL, rcfw->cmdq_bar_reg_iomem +
writel            189 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h 		writel(CREQ_DB_CP_FLAGS_REARM | (index & DBC_DBC32_XID_MASK),
writel            202 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h 		writel(CREQ_DB_CP_FLAGS | (index & DBC_DBC32_XID_MASK),
writel             56 drivers/infiniband/hw/cxgb3/cxio_wr.h 	writel(((1<<31) | qpid), doorbell);
writel            604 drivers/infiniband/hw/cxgb4/t4.h 		writel(PIDX_T5_V(inc) | QID_V(srq->bar2_qid),
writel            624 drivers/infiniband/hw/cxgb4/t4.h 			writel(PIDX_T5_V(inc) | QID_V(wq->sq.bar2_qid),
writel            632 drivers/infiniband/hw/cxgb4/t4.h 	writel(QID_V(wq->sq.qid) | PIDX_V(inc), wq->db);
writel            649 drivers/infiniband/hw/cxgb4/t4.h 			writel(PIDX_T5_V(inc) | QID_V(wq->rq.bar2_qid),
writel            657 drivers/infiniband/hw/cxgb4/t4.h 	writel(QID_V(wq->rq.qid) | PIDX_V(inc), wq->db);
writel            721 drivers/infiniband/hw/cxgb4/t4.h 		writel(val | INGRESSQID_V(cq->bar2_qid),
writel            724 drivers/infiniband/hw/cxgb4/t4.h 		writel(val | INGRESSQID_V(cq->cqid), cq->gts);
writel            102 drivers/infiniband/hw/efa/efa_com.c 	writel(mmio_read_reg, edev->reg_bar + EFA_REGS_MMIO_REG_READ_OFF);
writel            160 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_AQ_BASE_LO_OFF);
writel            161 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_AQ_BASE_HI_OFF);
writel            168 drivers/infiniband/hw/efa/efa_com.c 	writel(aq_caps, edev->reg_bar + EFA_REGS_AQ_CAPS_OFF);
writel            195 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_ACQ_BASE_LO_OFF);
writel            196 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_ACQ_BASE_HI_OFF);
writel            206 drivers/infiniband/hw/efa/efa_com.c 	writel(acq_caps, edev->reg_bar + EFA_REGS_ACQ_CAPS_OFF);
writel            237 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_AENQ_BASE_LO_OFF);
writel            238 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_AENQ_BASE_HI_OFF);
writel            247 drivers/infiniband/hw/efa/efa_com.c 	writel(aenq_caps, edev->reg_bar + EFA_REGS_AENQ_CAPS_OFF);
writel            253 drivers/infiniband/hw/efa/efa_com.c 	writel(edev->aenq.cc, edev->reg_bar + EFA_REGS_AENQ_CONS_DB_OFF);
writel            365 drivers/infiniband/hw/efa/efa_com.c 	writel(aq->sq.pc, aq->sq.db_addr);
writel            710 drivers/infiniband/hw/efa/efa_com.c 	writel(mask_value, edev->reg_bar + EFA_REGS_INTR_MASK_OFF);
writel            896 drivers/infiniband/hw/efa/efa_com.c 	writel(aenq->cc, edev->reg_bar + EFA_REGS_AENQ_CONS_DB_OFF);
writel            909 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_high, edev->reg_bar + EFA_REGS_MMIO_RESP_HI_OFF);
writel            910 drivers/infiniband/hw/efa/efa_com.c 	writel(addr_low, edev->reg_bar + EFA_REGS_MMIO_RESP_LO_OFF);
writel           1072 drivers/infiniband/hw/efa/efa_com.c 	writel(reset_val, edev->reg_bar + EFA_REGS_DEV_CTL_OFF);
writel           1085 drivers/infiniband/hw/efa/efa_com.c 	writel(0, edev->reg_bar + EFA_REGS_DEV_CTL_OFF);
writel             40 drivers/infiniband/hw/hns/hns_roce_common.h #define roce_write(dev, reg, val)	writel((val), (dev)->reg_base + (reg))
writel           1704 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(in_modifier, hcr + 4);
writel           1708 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(val, hcr + 5);
writel           2668 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->qp1c_bytes_4), addr);
writel           2669 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->sq_rq_bt_l), addr + 1);
writel           2670 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->qp1c_bytes_12), addr + 2);
writel           2671 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->qp1c_bytes_16), addr + 3);
writel           2672 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->qp1c_bytes_20), addr + 4);
writel           2673 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->cur_rq_wqe_ba_l), addr + 5);
writel           2674 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->qp1c_bytes_28), addr + 6);
writel           2675 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->qp1c_bytes_32), addr + 7);
writel           2676 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->cur_sq_wqe_ba_l), addr + 8);
writel           2677 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 		writel(le32_to_cpu(context->qp1c_bytes_40), addr + 9);
writel           4217 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(val, eqc);
writel           4269 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(eqshift_val, eqc);
writel           4272 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel((u32)(eq->buf_list[0].map >> 12), eqc + 4);
writel           4286 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(eqcuridx_val, eqc + 8);
writel           4292 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(eqconsindx_val, eqc + 0xc);
writel            104 drivers/infiniband/hw/i40iw/i40iw_uk.c 				writel(qp->qp_id, qp->wqe_alloc_reg);
writel            109 drivers/infiniband/hw/i40iw/i40iw_uk.c 				writel(qp->qp_id, qp->wqe_alloc_reg);
writel            726 drivers/infiniband/hw/i40iw/i40iw_uk.c 	writel(cq->cq_id, cq->cqe_alloc_reg);
writel            124 drivers/infiniband/hw/i40iw/i40iw_utils.c 	writel(value, hw->hw_addr + reg);
writel            216 drivers/infiniband/hw/mthca/mthca_eq.c 	writel(eqn_mask, dev->eq_regs.arbel.eq_arm);
writel            398 drivers/infiniband/hw/mthca/mthca_eq.c 		writel(dev->eq_table.clr_mask, dev->eq_table.clr_int);
writel            404 drivers/infiniband/hw/mthca/mthca_eq.c 	writel(ecr, dev->eq_regs.tavor.ecr_base +
writel            438 drivers/infiniband/hw/mthca/mthca_eq.c 		writel(dev->eq_table.clr_mask, dev->eq_table.clr_int);
writel            154 drivers/infiniband/hw/mthca/mthca_reset.c 		writel(MTHCA_RESET_VALUE, reset);
writel           2030 drivers/infiniband/hw/qedr/verbs.c 				writel(qp->rq.db_data.raw, qp->rq.db);
writel           3448 drivers/infiniband/hw/qedr/verbs.c 	writel(qp->sq.db_data.raw, qp->sq.db);
writel           3638 drivers/infiniband/hw/qedr/verbs.c 		writel(qp->rq.db_data.raw, qp->rq.db);
writel           3641 drivers/infiniband/hw/qedr/verbs.c 			writel(qp->rq.iwarp_db2_data.raw, qp->rq.iwarp_db2);
writel            498 drivers/infiniband/hw/qib/qib_diag.c 		writel(data, reg_addr);
writel           1885 drivers/infiniband/hw/qib/qib_iba6120.c 	writel(pa, tidp32);
writel           1929 drivers/infiniband/hw/qib/qib_iba6120.c 	writel(pa, tidp32);
writel            301 drivers/infiniband/hw/vmw_pvrdma/pvrdma.h 	writel(cpu_to_le32(val), dev->regs + reg);
writel            311 drivers/infiniband/hw/vmw_pvrdma/pvrdma.h 	writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_CQ_OFFSET);
writel            316 drivers/infiniband/hw/vmw_pvrdma/pvrdma.h 	writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_QP_OFFSET);
writel            112 drivers/input/keyboard/bcm-keypad.c 	writel(0xFFFFFFFF, kp->base + KPICRN_OFFSET(reg_num));
writel            153 drivers/input/keyboard/bcm-keypad.c 	writel(kp->kpior, kp->base + KPIOR_OFFSET);
writel            155 drivers/input/keyboard/bcm-keypad.c 	writel(kp->imr0_val, kp->base + KPIMR0_OFFSET);
writel            156 drivers/input/keyboard/bcm-keypad.c 	writel(kp->imr1_val, kp->base + KPIMR1_OFFSET);
writel            158 drivers/input/keyboard/bcm-keypad.c 	writel(kp->kpemr, kp->base + KPEMR0_OFFSET);
writel            159 drivers/input/keyboard/bcm-keypad.c 	writel(kp->kpemr, kp->base + KPEMR1_OFFSET);
writel            160 drivers/input/keyboard/bcm-keypad.c 	writel(kp->kpemr, kp->base + KPEMR2_OFFSET);
writel            161 drivers/input/keyboard/bcm-keypad.c 	writel(kp->kpemr, kp->base + KPEMR3_OFFSET);
writel            163 drivers/input/keyboard/bcm-keypad.c 	writel(0xFFFFFFFF, kp->base + KPICR0_OFFSET);
writel            164 drivers/input/keyboard/bcm-keypad.c 	writel(0xFFFFFFFF, kp->base + KPICR1_OFFSET);
writel            169 drivers/input/keyboard/bcm-keypad.c 	writel(kp->kpcr | KPCR_ENABLE, kp->base + KPCR_OFFSET);
writel            180 drivers/input/keyboard/bcm-keypad.c 	writel(0, kp->base + KPCR_OFFSET);
writel            181 drivers/input/keyboard/bcm-keypad.c 	writel(0, kp->base + KPIMR0_OFFSET);
writel            182 drivers/input/keyboard/bcm-keypad.c 	writel(0, kp->base + KPIMR1_OFFSET);
writel            183 drivers/input/keyboard/bcm-keypad.c 	writel(0xFFFFFFFF, kp->base + KPICR0_OFFSET);
writel            184 drivers/input/keyboard/bcm-keypad.c 	writel(0xFFFFFFFF, kp->base + KPICR1_OFFSET);
writel            102 drivers/input/keyboard/lpc32xx-keys.c 	writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base));
writel            118 drivers/input/keyboard/lpc32xx-keys.c 	writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base));
writel            127 drivers/input/keyboard/lpc32xx-keys.c 	writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base));
writel            240 drivers/input/keyboard/lpc32xx-keys.c 	writel(kscandat->deb_clks, LPC32XX_KS_DEB(kscandat->kscan_base));
writel            241 drivers/input/keyboard/lpc32xx-keys.c 	writel(kscandat->scan_delay, LPC32XX_KS_SCAN_CTL(kscandat->kscan_base));
writel            242 drivers/input/keyboard/lpc32xx-keys.c 	writel(LPC32XX_KSCAN_FTST_USE32K_CLK,
writel            244 drivers/input/keyboard/lpc32xx-keys.c 	writel(kscandat->matrix_sz,
writel            246 drivers/input/keyboard/lpc32xx-keys.c 	writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base));
writel            278 drivers/input/keyboard/lpc32xx-keys.c 		writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base));
writel            299 drivers/input/keyboard/lpc32xx-keys.c 			writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base));
writel             83 drivers/input/keyboard/nomadik-ske-keypad.c 	writel(ret, keypad->reg_base + addr);
writel            114 drivers/input/keyboard/nomadik-ske-keypad.c 	writel(value, keypad->reg_base + SKE_DBCR);
writel             91 drivers/input/keyboard/nspire-keypad.c 	writel(0x3, keypad->reg_base + KEYPAD_INT);
writel            115 drivers/input/keyboard/nspire-keypad.c 	writel(val, keypad->reg_base + KEYPAD_SCAN_MODE);
writel            118 drivers/input/keyboard/nspire-keypad.c 	writel(val, keypad->reg_base + KEYPAD_CNTL);
writel            122 drivers/input/keyboard/nspire-keypad.c 	writel(keypad->int_mask, keypad->reg_base + KEYPAD_INTMSK);
writel            126 drivers/input/keyboard/nspire-keypad.c 	writel(0, keypad->reg_base + KEYPAD_UNKNOWN_INT);
writel            128 drivers/input/keyboard/nspire-keypad.c 	writel(~0, keypad->reg_base + KEYPAD_UNKNOWN_INT_STS);
writel             94 drivers/input/keyboard/samsung-keypad.c 		writel(val, keypad->base + SAMSUNG_KEYIFCOL);
writel            102 drivers/input/keyboard/samsung-keypad.c 	writel(0, keypad->base + SAMSUNG_KEYIFCOL);
writel            157 drivers/input/keyboard/samsung-keypad.c 		writel(~0x0, keypad->base + SAMSUNG_KEYIFSTSCLR);
writel            187 drivers/input/keyboard/samsung-keypad.c 	writel(val, keypad->base + SAMSUNG_KEYIFCON);
writel            190 drivers/input/keyboard/samsung-keypad.c 	writel(0, keypad->base + SAMSUNG_KEYIFCOL);
writel            207 drivers/input/keyboard/samsung-keypad.c 	writel(~0x0, keypad->base + SAMSUNG_KEYIFSTSCLR);
writel            212 drivers/input/keyboard/samsung-keypad.c 	writel(val, keypad->base + SAMSUNG_KEYIFCON);
writel            480 drivers/input/keyboard/samsung-keypad.c 	writel(val, keypad->base + SAMSUNG_KEYIFCON);
writel            500 drivers/input/keyboard/samsung-keypad.c 	writel(val, keypad->base + SAMSUNG_KEYIFCON);
writel            527 drivers/input/keyboard/samsung-keypad.c 	writel(val, keypad->base + SAMSUNG_KEYIFCON);
writel             67 drivers/input/keyboard/st-keyscan.c 	writel(keypad->debounce_us * (clk_get_rate(keypad->clk) / 1000000),
writel             70 drivers/input/keyboard/st-keyscan.c 	writel(((keypad->n_cols - 1) << KEYSCAN_MATRIX_DIM_X_SHIFT) |
writel             74 drivers/input/keyboard/st-keyscan.c 	writel(KEYSCAN_CONFIG_ENABLE, keypad->base + KEYSCAN_CONFIG_OFF);
writel             81 drivers/input/keyboard/st-keyscan.c 	writel(0, keypad->base + KEYSCAN_CONFIG_OFF);
writel            129 drivers/input/keyboard/sun4i-lradc-keys.c 	writel(ints, lradc->base + LRADC_INTS);
writel            150 drivers/input/keyboard/sun4i-lradc-keys.c 	writel(FIRST_CONVERT_DLY(2) | LEVELA_B_CNT(1) | HOLD_EN(1) |
writel            153 drivers/input/keyboard/sun4i-lradc-keys.c 	writel(CHAN0_KEYUP_IRQ | CHAN0_KEYDOWN_IRQ, lradc->base + LRADC_INTC);
writel            163 drivers/input/keyboard/sun4i-lradc-keys.c 	writel(FIRST_CONVERT_DLY(2) | LEVELA_B_CNT(1) | HOLD_EN(1) |
writel            165 drivers/input/keyboard/sun4i-lradc-keys.c 	writel(0, lradc->base + LRADC_INTC);
writel            238 drivers/input/keyboard/tegra-kbc.c 	writel(val, kbc->mmio + KBC_CONTROL_0);
writel            290 drivers/input/keyboard/tegra-kbc.c 	writel(val, kbc->mmio + KBC_INT_0);
writel            318 drivers/input/keyboard/tegra-kbc.c 		writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
writel            351 drivers/input/keyboard/tegra-kbc.c 		writel(row_cfg, kbc->mmio + r_offs);
writel            352 drivers/input/keyboard/tegra-kbc.c 		writel(col_cfg, kbc->mmio + c_offs);
writel            375 drivers/input/keyboard/tegra-kbc.c 	writel(kbc->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
writel            383 drivers/input/keyboard/tegra-kbc.c 	writel(val, kbc->mmio + KBC_CONTROL_0);
writel            407 drivers/input/keyboard/tegra-kbc.c 	writel(0x7, kbc->mmio + KBC_INT_0);
writel            422 drivers/input/keyboard/tegra-kbc.c 	writel(val, kbc->mmio + KBC_CONTROL_0);
writel            727 drivers/input/keyboard/tegra-kbc.c 	writel(val, kbc->mmio + KBC_CONTROL_0);
writel            742 drivers/input/keyboard/tegra-kbc.c 		writel(0x7, kbc->mmio + KBC_INT_0);
writel            748 drivers/input/keyboard/tegra-kbc.c 		writel(0, kbc->mmio + KBC_TO_CNT_0);
writel            781 drivers/input/keyboard/tegra-kbc.c 		writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
writel             47 drivers/input/misc/msm-vibrator.c 	writel(value, vibrator->base + offset);
writel             52 drivers/input/serio/altera_ps2.c 	writel(val, ps2if->base);
writel             64 drivers/input/serio/altera_ps2.c 	writel(1, ps2if->base + 4); /* enable rx irq */
writel             72 drivers/input/serio/altera_ps2.c 	writel(0, ps2if->base + 4); /* disable rx irq */
writel             87 drivers/input/serio/olpc_apsp.c 			writel(which | val,
writel            128 drivers/input/serio/olpc_apsp.c 	writel(tmp | SP_COMMAND_COMPLETE_RESET, priv->base + PJ_RST_INTERRUPT);
writel            129 drivers/input/serio/olpc_apsp.c 	writel(PORT_MASK, priv->base + SECURE_PROCESSOR_COMMAND);
writel            150 drivers/input/serio/olpc_apsp.c 		writel(tmp & ~INT_0, priv->base + PJ_INTERRUPT_MASK);
writel            164 drivers/input/serio/olpc_apsp.c 		writel(tmp | INT_0, priv->base + PJ_INTERRUPT_MASK);
writel            118 drivers/input/serio/sun4i-ps2.c 		writel(rval, drvdata->reg_base + PS2_REG_LSTS);
writel            125 drivers/input/serio/sun4i-ps2.c 		writel(rval, drvdata->reg_base + PS2_REG_FSTS);
writel            134 drivers/input/serio/sun4i-ps2.c 	writel(intr_status, drvdata->reg_base + PS2_REG_LSTS);
writel            135 drivers/input/serio/sun4i-ps2.c 	writel(fifo_status, drvdata->reg_base + PS2_REG_FSTS);
writel            154 drivers/input/serio/sun4i-ps2.c 	writel(rval, drvdata->reg_base + PS2_REG_LCTL);
writel            161 drivers/input/serio/sun4i-ps2.c 	writel(rval, drvdata->reg_base + PS2_REG_FCTL);
writel            168 drivers/input/serio/sun4i-ps2.c 	writel(rval, drvdata->reg_base + PS2_REG_CLKDR);
writel            175 drivers/input/serio/sun4i-ps2.c 	writel(rval, drvdata->reg_base + PS2_REG_GCTL);
writel            188 drivers/input/serio/sun4i-ps2.c 	writel(rval & ~(PS2_GCTL_INTEN), drvdata->reg_base + PS2_REG_GCTL);
writel            200 drivers/input/serio/sun4i-ps2.c 			writel(val, drvdata->reg_base + PS2_REG_DATA);
writel            264 drivers/input/serio/sun4i-ps2.c 	writel(0, drvdata->reg_base + PS2_REG_GCTL);
writel            123 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
writel            128 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
writel            135 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
writel            153 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
writel            168 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
writel            171 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
writel            174 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
writel            177 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
writel            180 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
writel            195 drivers/input/touchscreen/imx6ul_tsc.c 	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
writel            197 drivers/input/touchscreen/imx6ul_tsc.c 	writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
writel            199 drivers/input/touchscreen/imx6ul_tsc.c 	writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
writel            200 drivers/input/touchscreen/imx6ul_tsc.c 	writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
writel            201 drivers/input/touchscreen/imx6ul_tsc.c 	writel(MEASURE_SIG_EN | VALID_SIG_EN,
writel            208 drivers/input/touchscreen/imx6ul_tsc.c 	writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
writel            232 drivers/input/touchscreen/imx6ul_tsc.c 	writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
writel            237 drivers/input/touchscreen/imx6ul_tsc.c 	writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
writel            271 drivers/input/touchscreen/imx6ul_tsc.c 	writel(MEASURE_SIGNAL | DETECT_SIGNAL,
writel            277 drivers/input/touchscreen/imx6ul_tsc.c 	writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
writel            100 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL4_LRADCSELECT_MASK(vch),
writel            102 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL4_LRADCSELECT(vch, ch),
writel            116 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CH_ACCUMULATE |
writel            124 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CH_VALUE_MASK,
writel            135 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_DELAY_TRIGGER(1 << ch) | LRADC_DELAY_TRIGGER_DELAYS(0) |
writel            140 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_LRADC_IRQ(ch),
writel            149 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_DELAY_TRIGGER(0) | LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) |
writel            175 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(reg, ts->base + LRADC_CH(ch1));
writel            176 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(reg, ts->base + LRADC_CH(ch2));
writel            182 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CH_VALUE_MASK,
writel            184 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CH_VALUE_MASK,
writel            188 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_DELAY_TRIGGER(1 << ch1) | LRADC_DELAY_TRIGGER(1 << ch2) |
writel            194 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_LRADC_IRQ(ch2),
writel            203 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_DELAY_TRIGGER(0) | LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) |
writel            282 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].mask,
writel            284 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].bit,
writel            304 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].mask,
writel            306 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].x_plate,
writel            330 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].mask,
writel            332 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].y_plate,
writel            356 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].mask,
writel            358 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].pressure,
writel            373 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ | LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
writel            375 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
writel            381 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
writel            383 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1),
writel            409 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(0, ts->base + LRADC_CH(TOUCHSCREEN_VCHANNEL1));
writel            410 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
writel            413 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) |
writel            445 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(0, ts->base + LRADC_DELAY(2));
writel            446 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(0, ts->base + LRADC_DELAY(3));
writel            447 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ |
writel            451 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
writel            462 drivers/input/touchscreen/mxs-lradc-ts.c 		writel(LRADC_CTRL1_TOUCH_DETECT_IRQ,
writel            515 drivers/input/touchscreen/mxs-lradc-ts.c 		writel(reg & clr_irq,
writel            538 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
writel            544 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(info[lradc->soc].mask,
writel            547 drivers/input/touchscreen/mxs-lradc-ts.c 	writel(lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
writel            551 drivers/input/touchscreen/mxs-lradc-ts.c 		writel(0, ts->base + LRADC_DELAY(i));
writel            567 drivers/input/touchscreen/mxs-lradc-ts.c 		writel(LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
writel            571 drivers/input/touchscreen/mxs-lradc-ts.c 			writel(LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
writel            131 drivers/input/touchscreen/s3c2410_ts.c 		writel(WAIT4INT | INT_DOWN, ts.io + S3C2410_ADCTSC);
writel            166 drivers/input/touchscreen/s3c2410_ts.c 		writel(0x0, ts.io + S3C64XX_ADCCLRINTPNDNUP);
writel            212 drivers/input/touchscreen/s3c2410_ts.c 		writel(S3C2410_ADCTSC_PULL_UP_DISABLE | AUTOPST,
writel            216 drivers/input/touchscreen/s3c2410_ts.c 		writel(WAIT4INT | INT_UP, ts.io + S3C2410_ADCTSC);
writel            295 drivers/input/touchscreen/s3c2410_ts.c 		writel(info->delay & 0xffff, ts.io + S3C2410_ADCDLY);
writel            297 drivers/input/touchscreen/s3c2410_ts.c 	writel(WAIT4INT | INT_DOWN, ts.io + S3C2410_ADCTSC);
writel            377 drivers/input/touchscreen/s3c2410_ts.c 	writel(TSC_SLEEP, ts.io + S3C2410_ADCTSC);
writel            394 drivers/input/touchscreen/s3c2410_ts.c 		writel(info->delay & 0xffff, ts.io + S3C2410_ADCDLY);
writel            396 drivers/input/touchscreen/s3c2410_ts.c 	writel(WAIT4INT | INT_DOWN, ts.io + S3C2410_ADCTSC);
writel            160 drivers/input/touchscreen/sun4i-ts.c 	writel(reg_val, ts->base + TP_INT_FIFOS);
writel            170 drivers/input/touchscreen/sun4i-ts.c 	writel(TEMP_IRQ_EN(1) | DATA_IRQ_EN(1) | FIFO_TRIG(1) | FIFO_FLUSH(1) |
writel            181 drivers/input/touchscreen/sun4i-ts.c 	writel(TEMP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
writel            317 drivers/input/touchscreen/sun4i-ts.c 	writel(ADC_CLK_SEL(0) | ADC_CLK_DIV(2) | FS_DIV(7) | T_ACQ(63),
writel            326 drivers/input/touchscreen/sun4i-ts.c 	writel(TP_SENSITIVE_ADJUST(tp_sensitive_adjust) | TP_MODE_SELECT(0),
writel            334 drivers/input/touchscreen/sun4i-ts.c 	writel(FILTER_EN(1) | FILTER_TYPE(filter_type), ts->base + TP_CTRL3);
writel            337 drivers/input/touchscreen/sun4i-ts.c 	writel(TEMP_ENABLE(1) | TEMP_PERIOD(1953), ts->base + TP_TPR);
writel            348 drivers/input/touchscreen/sun4i-ts.c 	writel(reg, ts->base + TP_CTRL1);
writel            364 drivers/input/touchscreen/sun4i-ts.c 	writel(TEMP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
writel            369 drivers/input/touchscreen/sun4i-ts.c 			writel(0, ts->base + TP_INT_FIFOC);
writel            387 drivers/input/touchscreen/sun4i-ts.c 	writel(0, ts->base + TP_INT_FIFOC);
writel             71 drivers/input/touchscreen/ti_am335x_tsc.c 	writel(val, tsc->mfd_tscadc->tscadc_base + reg);
writel            653 drivers/iommu/amd_iommu.c 	writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);
writel            714 drivers/iommu/amd_iommu.c 		writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
writel            758 drivers/iommu/amd_iommu.c 		writel(head, iommu->mmio_base + MMIO_GA_HEAD_OFFSET);
writel            792 drivers/iommu/amd_iommu.c 		writel(AMD_IOMMU_INT_MASK,
writel            872 drivers/iommu/amd_iommu.c 	writel(iommu->cmd_buf_tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
writel            612 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
writel            613 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
writel            673 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);
writel            674 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_EVT_TAIL_OFFSET);
writel            714 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
writel            715 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_PPR_TAIL_OFFSET);
writel            795 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_GA_HEAD_OFFSET);
writel            796 drivers/iommu/amd_iommu_init.c 	writel(0x00, iommu->mmio_base + MMIO_GA_TAIL_OFFSET);
writel           3158 drivers/iommu/amd_iommu_init.c 		writel((u32)val, iommu->mmio_base + offset);
writel           3159 drivers/iommu/amd_iommu_init.c 		writel((val >> 32), iommu->mmio_base + offset + 4);
writel           1831 drivers/iommu/arm-smmu-v3.c 	writel(gerror, smmu->base + ARM_SMMU_GERRORN);
writel           1189 drivers/iommu/dmar.c 			writel(DMA_FSTS_IQE, iommu->reg + DMAR_FSTS_REG);
writel           1205 drivers/iommu/dmar.c 		writel(DMA_FSTS_ITE, iommu->reg + DMAR_FSTS_REG);
writel           1218 drivers/iommu/dmar.c 		writel(DMA_FSTS_ICE, iommu->reg + DMAR_FSTS_REG);
writel           1274 drivers/iommu/dmar.c 	writel(qi->free_head << shift, iommu->reg + DMAR_IQT_REG);
writel           1407 drivers/iommu/dmar.c 	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
writel           1438 drivers/iommu/dmar.c 	writel(0, iommu->reg + DMAR_IQT_REG);
writel           1443 drivers/iommu/dmar.c 	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
writel           1638 drivers/iommu/dmar.c 	writel(0, iommu->reg + reg);
writel           1652 drivers/iommu/dmar.c 	writel(DMA_FECTL_IM, iommu->reg + reg);
writel           1665 drivers/iommu/dmar.c 	writel(msg->data, iommu->reg + reg + 4);
writel           1666 drivers/iommu/dmar.c 	writel(msg->address_lo, iommu->reg + reg + 8);
writel           1667 drivers/iommu/dmar.c 	writel(msg->address_hi, iommu->reg + reg + 12);
writel           1761 drivers/iommu/dmar.c 		writel(DMA_FRCD_F, iommu->reg + reg +
writel           1778 drivers/iommu/dmar.c 	writel(DMA_FSTS_PFO | DMA_FSTS_PPF | DMA_FSTS_PRO,
writel           1833 drivers/iommu/dmar.c 		writel(fault_status, iommu->reg + DMAR_FSTS_REG);
writel            288 drivers/iommu/exynos-iommu.c 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
writel            295 drivers/iommu/exynos-iommu.c 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
writel            310 drivers/iommu/exynos-iommu.c 		writel(0x1, data->sfrbase + REG_MMU_FLUSH);
writel            312 drivers/iommu/exynos-iommu.c 		writel(0x1, data->sfrbase + REG_V5_MMU_FLUSH_ALL);
writel            322 drivers/iommu/exynos-iommu.c 			writel((iova & SPAGE_MASK) | 1,
writel            328 drivers/iommu/exynos-iommu.c 			writel((iova & SPAGE_MASK) | 1,
writel            331 drivers/iommu/exynos-iommu.c 			writel((iova & SPAGE_MASK),
writel            333 drivers/iommu/exynos-iommu.c 			writel((iova & SPAGE_MASK) + (num_inv - 1) * SPAGE_SIZE,
writel            335 drivers/iommu/exynos-iommu.c 			writel(1, data->sfrbase + REG_V5_MMU_FLUSH_RANGE);
writel            343 drivers/iommu/exynos-iommu.c 		writel(pgd, data->sfrbase + REG_PT_BASE_ADDR);
writel            345 drivers/iommu/exynos-iommu.c 		writel(pgd >> PAGE_SHIFT,
writel            449 drivers/iommu/exynos-iommu.c 	writel(1 << itype, data->sfrbase + reg_clear);
writel            467 drivers/iommu/exynos-iommu.c 	writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);
writel            468 drivers/iommu/exynos-iommu.c 	writel(0, data->sfrbase + REG_MMU_CFG);
writel            488 drivers/iommu/exynos-iommu.c 	writel(cfg, data->sfrbase + REG_MMU_CFG);
writel            498 drivers/iommu/exynos-iommu.c 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
writel            501 drivers/iommu/exynos-iommu.c 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
writel           1224 drivers/iommu/intel-iommu.c 	writel(iommu->gcmd | DMA_GCMD_SRTP, iommu->reg + DMAR_GCMD_REG);
writel           1242 drivers/iommu/intel-iommu.c 	writel(iommu->gcmd | DMA_GCMD_WBF, iommu->reg + DMAR_GCMD_REG);
writel           1562 drivers/iommu/intel-iommu.c 	writel(pmen, iommu->reg + DMAR_PMEN_REG);
writel           1578 drivers/iommu/intel-iommu.c 	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
writel           1594 drivers/iommu/intel-iommu.c 	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
writel           4274 drivers/iommu/intel-iommu.c 		writel(iommu->iommu_state[SR_DMAR_FECTL_REG],
writel           4276 drivers/iommu/intel-iommu.c 		writel(iommu->iommu_state[SR_DMAR_FEDATA_REG],
writel           4278 drivers/iommu/intel-iommu.c 		writel(iommu->iommu_state[SR_DMAR_FEADDR_REG],
writel           4280 drivers/iommu/intel-iommu.c 		writel(iommu->iommu_state[SR_DMAR_FEUADDR_REG],
writel            539 drivers/iommu/intel-svm.c 	writel(DMA_PRS_PPR, iommu->reg + DMAR_PRS_REG);
writel            488 drivers/iommu/intel_irq_remapping.c 	writel(iommu->gcmd | DMA_GCMD_SIRTP, iommu->reg + DMAR_GCMD_REG);
writel            511 drivers/iommu/intel_irq_remapping.c 	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
writel            672 drivers/iommu/intel_irq_remapping.c 	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
writel             14 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_GLOBAL_REG(reg, base, val)	writel((val), ((base) + (reg)))
writel             17 drivers/iommu/msm_iommu_hw-8xxx.h 			writel((val), ((base) + (reg) + ((ctx) << CTX_SHIFT)))
writel             38 drivers/iommu/msm_iommu_hw-8xxx.h 	writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\
writel            410 drivers/iommu/mtk_iommu.c 		writel(dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
writel            821 drivers/iommu/mtk_iommu.c 		writel(m4u_dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
writel            232 drivers/iommu/mtk_iommu_v1.c 	writel(dom->pgt_pa, data->base + REG_MMU_PT_BASE_ADDR);
writel            282 drivers/iommu/rockchip-iommu.c 	writel(value, base + offset);
writel            290 drivers/iommu/rockchip-iommu.c 		writel(command, iommu->bases[i] + RK_MMU_COMMAND);
writel            295 drivers/iommu/rockchip-iommu.c 	writel(command, base + RK_MMU_COMMAND);
writel             68 drivers/iommu/tegra-smmu.c 	writel(value, smmu->regs + offset);
writel            177 drivers/irqchip/irq-armada-370-xp.c 		writel(hwirq, main_int_base +
writel            180 drivers/irqchip/irq-armada-370-xp.c 		writel(hwirq, per_cpu_int_base +
writel            189 drivers/irqchip/irq-armada-370-xp.c 		writel(hwirq, main_int_base +
writel            192 drivers/irqchip/irq-armada-370-xp.c 		writel(hwirq, per_cpu_int_base +
writel            297 drivers/irqchip/irq-armada-370-xp.c 	writel(reg, per_cpu_int_base +
writel            301 drivers/irqchip/irq-armada-370-xp.c 	writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
writel            330 drivers/irqchip/irq-armada-370-xp.c 	writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
writel            355 drivers/irqchip/irq-armada-370-xp.c 		writel(hw, per_cpu_int_base +
writel            358 drivers/irqchip/irq-armada-370-xp.c 		writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
writel            384 drivers/irqchip/irq-armada-370-xp.c 		writel(i, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
writel            387 drivers/irqchip/irq-armada-370-xp.c 	writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
writel            390 drivers/irqchip/irq-armada-370-xp.c 	writel(IPI_DOORBELL_MASK, per_cpu_int_base +
writel            394 drivers/irqchip/irq-armada-370-xp.c 	writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
writel            402 drivers/irqchip/irq-armada-370-xp.c 	writel(ARMADA_370_XP_INT_CAUSE_PERF(cpuid),
writel            424 drivers/irqchip/irq-armada-370-xp.c 	writel((map << 8) | irq, main_int_base +
writel            481 drivers/irqchip/irq-armada-370-xp.c 	writel(~msimask, per_cpu_int_base +
writel            571 drivers/irqchip/irq-armada-370-xp.c 			writel(~ipimask, per_cpu_int_base +
writel            613 drivers/irqchip/irq-armada-370-xp.c 			writel(irq, per_cpu_int_base +
writel            619 drivers/irqchip/irq-armada-370-xp.c 			writel(irq, main_int_base +
writel            633 drivers/irqchip/irq-armada-370-xp.c 	writel(doorbell_mask_reg,
writel            636 drivers/irqchip/irq-armada-370-xp.c 		writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
writel            638 drivers/irqchip/irq-armada-370-xp.c 		writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
writel            675 drivers/irqchip/irq-armada-370-xp.c 		writel(i, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS);
writel             63 drivers/irqchip/irq-aspeed-vic.c 	writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR);
writel             64 drivers/irqchip/irq-aspeed-vic.c 	writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR + 4);
writel             67 drivers/irqchip/irq-aspeed-vic.c 	writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR);
writel             68 drivers/irqchip/irq-aspeed-vic.c 	writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR + 4);
writel             71 drivers/irqchip/irq-aspeed-vic.c 	writel(0, vic->base + AVIC_INT_SELECT);
writel             72 drivers/irqchip/irq-aspeed-vic.c 	writel(0, vic->base + AVIC_INT_SELECT + 4);
writel             84 drivers/irqchip/irq-aspeed-vic.c 	writel(0xffffffff, vic->base + AVIC_EDGE_CLR);
writel             85 drivers/irqchip/irq-aspeed-vic.c 	writel(0xffffffff, vic->base + AVIC_EDGE_CLR + 4);
writel            115 drivers/irqchip/irq-aspeed-vic.c 		writel(sbit, vic->base + AVIC_EDGE_CLR + sidx * 4);
writel            124 drivers/irqchip/irq-aspeed-vic.c 	writel(sbit, vic->base + AVIC_INT_ENABLE_CLR + sidx * 4);
writel            133 drivers/irqchip/irq-aspeed-vic.c 	writel(sbit, vic->base + AVIC_INT_ENABLE + sidx * 4);
writel            144 drivers/irqchip/irq-aspeed-vic.c 	writel(sbit, vic->base + AVIC_INT_ENABLE_CLR + sidx * 4);
writel            148 drivers/irqchip/irq-aspeed-vic.c 		writel(sbit, vic->base + AVIC_EDGE_CLR + sidx * 4);
writel            159 drivers/irqchip/irq-atmel-aic-common.c 	writel(AT91_RTC_IRQ_MASK, regs + AT91_RTC_IDR);
writel            182 drivers/irqchip/irq-atmel-aic-common.c 		writel(readl(regs + AT91_RTT_MR) &
writel             30 drivers/irqchip/irq-bcm2836.c 	writel(readl(reg) & ~BIT(bit), reg);
writel             39 drivers/irqchip/irq-bcm2836.c 	writel(readl(reg) | BIT(bit), reg);
writel             64 drivers/irqchip/irq-bcm2836.c 	writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_CLR);
writel             69 drivers/irqchip/irq-bcm2836.c 	writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_SET);
writel            137 drivers/irqchip/irq-bcm2836.c 		writel(1 << ipi, mailbox0);
writel            161 drivers/irqchip/irq-bcm2836.c 		writel(1 << ipi, mailbox0_base + 16 * cpu);
writel            210 drivers/irqchip/irq-bcm2836.c 	writel(0, intc.base + LOCAL_CONTROL);
writel            216 drivers/irqchip/irq-bcm2836.c 	writel(0x80000000, intc.base + LOCAL_PRESCALER);
writel            111 drivers/irqchip/irq-bcm7038-l1.c 		writel(val, reg);
writel            183 drivers/irqchip/irq-brcmstb-l2.c 	writel(0xffffffff, base + init_params->cpu_mask_set);
writel            188 drivers/irqchip/irq-brcmstb-l2.c 		writel(0xffffffff, base + init_params->cpu_clear);
writel             47 drivers/irqchip/irq-crossbar.c 	writel(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
writel             98 drivers/irqchip/irq-csky-apb-intc.c 		writel(build_channel_val(i, magic), reg_addr + i);
writel            175 drivers/irqchip/irq-csky-apb-intc.c 	writel(0x0, reg_base + GX_INTC_NEN31_00);
writel            176 drivers/irqchip/irq-csky-apb-intc.c 	writel(0x0, reg_base + GX_INTC_NEN63_32);
writel            181 drivers/irqchip/irq-csky-apb-intc.c 	writel(0x0, reg_base + GX_INTC_NMASK31_00);
writel            182 drivers/irqchip/irq-csky-apb-intc.c 	writel(0x0, reg_base + GX_INTC_NMASK63_32);
writel            240 drivers/irqchip/irq-csky-apb-intc.c 	writel(0, reg_base + CK_INTC_NEN31_00);
writel            241 drivers/irqchip/irq-csky-apb-intc.c 	writel(0, reg_base + CK_INTC_NEN63_32);
writel            244 drivers/irqchip/irq-csky-apb-intc.c 	writel(BIT(31), reg_base + CK_INTC_ICR);
writel            270 drivers/irqchip/irq-csky-apb-intc.c 	writel(0, reg_base + CK_INTC_NEN31_00 + CK_INTC_DUAL_BASE);
writel            271 drivers/irqchip/irq-csky-apb-intc.c 	writel(0, reg_base + CK_INTC_NEN63_32 + CK_INTC_DUAL_BASE);
writel             86 drivers/irqchip/irq-digicolor.c 	writel(0, reg_base + IC_INT0ENABLE_LO);
writel             87 drivers/irqchip/irq-digicolor.c 	writel(0, reg_base + IC_INT0ENABLE_XLO);
writel             61 drivers/irqchip/irq-ftintc010.c 	writel(mask, FT010_IRQ_MASK(f->base));
writel             71 drivers/irqchip/irq-ftintc010.c 	writel(mask, FT010_IRQ_MASK(f->base));
writel             78 drivers/irqchip/irq-ftintc010.c 	writel(BIT(irqd_to_hwirq(d)), FT010_IRQ_CLEAR(f->base));
writel            112 drivers/irqchip/irq-ftintc010.c 	writel(mode, FT010_IRQ_MODE(f->base));
writel            113 drivers/irqchip/irq-ftintc010.c 	writel(polarity, FT010_IRQ_POLARITY(f->base));
writel            181 drivers/irqchip/irq-ftintc010.c 	writel(0, FT010_IRQ_MASK(f->base));
writel            182 drivers/irqchip/irq-ftintc010.c 	writel(0, FT010_FIQ_MASK(f->base));
writel             86 drivers/irqchip/irq-goldfish-pic.c 	writel(1, gfpic->base + GFPIC_REG_IRQ_DISABLE_ALL);
writel             57 drivers/irqchip/irq-ingenic.c 	writel(mask, gc->reg_base + regs->enable);
writel             58 drivers/irqchip/irq-ingenic.c 	writel(~mask, gc->reg_base + regs->disable);
writel            121 drivers/irqchip/irq-ingenic.c 		writel(0xffffffff, intc->base + (i * CHIP_SIZE) +
writel             65 drivers/irqchip/irq-ls1x.c 		writel(readl(gc->reg_base + offset) | mask,
writel             68 drivers/irqchip/irq-ls1x.c 		writel(readl(gc->reg_base + offset) & ~mask,
writel            147 drivers/irqchip/irq-ls1x.c 	writel(0x0, priv->intc_base + LS_REG_INTC_EN);
writel            150 drivers/irqchip/irq-ls1x.c 	writel(0xffffffff, priv->intc_base + LS_REG_INTC_CLR);
writel            153 drivers/irqchip/irq-ls1x.c 	writel(0xffffffff, priv->intc_base + LS_REG_INTC_POL);
writel             38 drivers/irqchip/irq-mvebu-pic.c 	writel(0, pic->base + PIC_MASK);
writel             39 drivers/irqchip/irq-mvebu-pic.c 	writel(PIC_MAX_IRQ_MASK, pic->base + PIC_CAUSE);
writel             46 drivers/irqchip/irq-mvebu-pic.c 	writel(1 << d->hwirq, pic->base + PIC_CAUSE);
writel             56 drivers/irqchip/irq-mvebu-pic.c 	writel(reg, pic->base + PIC_MASK);
writel             66 drivers/irqchip/irq-mvebu-pic.c 	writel(reg, pic->base + PIC_MASK);
writel            232 drivers/irqchip/irq-mxs.c 		writel(0, icoll_priv.intr + i);
writel             95 drivers/irqchip/irq-orion.c 		writel(0, gc->reg_base + ORION_IRQ_MASK);
writel            197 drivers/irqchip/irq-orion.c 	writel(0, gc->reg_base + ORION_BRIDGE_IRQ_MASK);
writel            198 drivers/irqchip/irq-orion.c 	writel(0, gc->reg_base + ORION_BRIDGE_IRQ_CAUSE);
writel             65 drivers/irqchip/irq-pic32-evic.c 		writel(BIT(bit), evic_base + PIC32_SET(REG_INTCON));
writel             68 drivers/irqchip/irq-pic32-evic.c 		writel(BIT(bit), evic_base + PIC32_CLR(REG_INTCON));
writel            103 drivers/irqchip/irq-pic32-evic.c 	writel(set, evic_base + REG_OFF_OFFSET + irq * 4);
writel            113 drivers/irqchip/irq-pic32-evic.c 	writel(PRIORITY_MASK << shift,
writel            115 drivers/irqchip/irq-pic32-evic.c 	writel(priority << shift,
writel            156 drivers/irqchip/irq-pic32-evic.c 	writel(mask, evic_base + iecclr);
writel            157 drivers/irqchip/irq-pic32-evic.c 	writel(mask, evic_base + ifsclr);
writel             80 drivers/irqchip/irq-sifive-plic.c 		writel(readl(reg) | hwirq_mask, reg);
writel             82 drivers/irqchip/irq-sifive-plic.c 		writel(readl(reg) & ~hwirq_mask, reg);
writel             91 drivers/irqchip/irq-sifive-plic.c 	writel(enable, plic_regs + PRIORITY_BASE + hwirq * PRIORITY_PER_ID);
writel            141 drivers/irqchip/irq-sifive-plic.c 	writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
writel            292 drivers/irqchip/irq-sifive-plic.c 		writel(threshold, handler->hart_base + CONTEXT_THRESHOLD);
writel             44 drivers/irqchip/irq-sni-exiu.c 	writel(BIT(d->hwirq), data->base + EIREQCLR);
writel             56 drivers/irqchip/irq-sun4i.c 	writel(BIT(0), irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(0));
writel             68 drivers/irqchip/irq-sun4i.c 	writel(val & ~(1 << irq_off),
writel             81 drivers/irqchip/irq-sun4i.c 	writel(val | (1 << irq_off),
writel            116 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, 0));
writel            117 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, 1));
writel            118 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_ENABLE_REG(irq_ic_data, 2));
writel            121 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_MASK_REG(irq_ic_data, 0));
writel            122 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_MASK_REG(irq_ic_data, 1));
writel            123 drivers/irqchip/irq-sun4i.c 	writel(0, irq_ic_data->irq_base + SUN4I_IRQ_MASK_REG(irq_ic_data, 2));
writel            126 drivers/irqchip/irq-sun4i.c 	writel(0xffffffff, irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(0));
writel            127 drivers/irqchip/irq-sun4i.c 	writel(0xffffffff, irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(1));
writel            128 drivers/irqchip/irq-sun4i.c 	writel(0xffffffff, irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(2));
writel            131 drivers/irqchip/irq-sun4i.c 	writel(0x01, irq_ic_data->irq_base + SUN4I_IRQ_PROTECTION_REG);
writel            134 drivers/irqchip/irq-sun4i.c 	writel(0x00, irq_ic_data->irq_base + SUN4I_IRQ_NMI_CTRL_REG);
writel             59 drivers/irqchip/irq-versatile-fpga.c 	writel(mask, f->base + IRQ_ENABLE_CLEAR);
writel             67 drivers/irqchip/irq-versatile-fpga.c 	writel(mask, f->base + IRQ_ENABLE_SET);
writel            215 drivers/irqchip/irq-versatile-fpga.c 	writel(clear_mask, base + IRQ_ENABLE_CLEAR);
writel            216 drivers/irqchip/irq-versatile-fpga.c 	writel(clear_mask, base + FIQ_ENABLE_CLEAR);
writel            233 drivers/irqchip/irq-versatile-fpga.c 		writel(0xffd00000, base + PIC_ENABLES);
writel             92 drivers/irqchip/irq-vic.c 		writel(VIC_VECT_CNTL_ENABLE | i, reg);
writel             95 drivers/irqchip/irq-vic.c 	writel(32, base + VIC_PL190_DEF_VECT_ADDR);
writel            108 drivers/irqchip/irq-vic.c 	writel(vic->int_select, base + VIC_INT_SELECT);
writel            109 drivers/irqchip/irq-vic.c 	writel(vic->protect, base + VIC_PROTECT);
writel            112 drivers/irqchip/irq-vic.c 	writel(vic->int_enable, base + VIC_INT_ENABLE);
writel            113 drivers/irqchip/irq-vic.c 	writel(~vic->int_enable, base + VIC_INT_ENABLE_CLEAR);
writel            117 drivers/irqchip/irq-vic.c 	writel(vic->soft_int, base + VIC_INT_SOFT);
writel            118 drivers/irqchip/irq-vic.c 	writel(~vic->soft_int, base + VIC_INT_SOFT_CLEAR);
writel            143 drivers/irqchip/irq-vic.c 	writel(vic->resume_irqs, base + VIC_INT_ENABLE);
writel            144 drivers/irqchip/irq-vic.c 	writel(~vic->resume_irqs, base + VIC_INT_ENABLE_CLEAR);
writel            307 drivers/irqchip/irq-vic.c 	writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
writel            309 drivers/irqchip/irq-vic.c 	writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
writel            316 drivers/irqchip/irq-vic.c 	writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
writel            323 drivers/irqchip/irq-vic.c 	writel(1 << irq, base + VIC_INT_ENABLE);
writel            374 drivers/irqchip/irq-vic.c 	writel(0, base + VIC_INT_SELECT);
writel            375 drivers/irqchip/irq-vic.c 	writel(0, base + VIC_INT_ENABLE);
writel            376 drivers/irqchip/irq-vic.c 	writel(~0, base + VIC_INT_ENABLE_CLEAR);
writel            377 drivers/irqchip/irq-vic.c 	writel(0, base + VIC_ITCR);
writel            378 drivers/irqchip/irq-vic.c 	writel(~0, base + VIC_INT_SOFT_CLEAR);
writel            385 drivers/irqchip/irq-vic.c 	writel(0, base + VIC_PL190_VECT_ADDR);
writel            390 drivers/irqchip/irq-vic.c 		writel(value, base + VIC_PL190_VECT_ADDR);
writel            422 drivers/irqchip/irq-vic.c 			writel(0, reg);
writel            425 drivers/irqchip/irq-vic.c 		writel(32, base + VIC_PL190_DEF_VECT_ADDR);
writel             83 drivers/irqchip/irq-vt8500.c 		writel(status, stat_reg);
writel            145 drivers/irqchip/irq-vt8500.c 	writel(ICPC_ROTATE, base + VT8500_ICPC_IRQ);
writel            146 drivers/irqchip/irq-vt8500.c 	writel(0x00, base + VT8500_ICPC_FIQ);
writel             60 drivers/irqchip/irq-zevio.c 	writel(~0, base + IO_DISABLE);
writel             63 drivers/irqchip/irq-zevio.c 	writel(0xF, base + IO_MAX_PRIOTY);
writel             83 drivers/irqchip/irq-zevio.c 	writel(~0, zevio_irq_io + IO_INVERT_SEL);
writel             86 drivers/irqchip/irq-zevio.c 	writel(0, zevio_irq_io + IO_STICKY_SEL);
writel             66 drivers/irqchip/spear-shirq.c 	writel(val, reg);
writel             78 drivers/irqchip/spear-shirq.c 	writel(val, reg);
writel            472 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(cpu_to_le32(*(u32 *)data),
writel            947 drivers/isdn/hardware/mISDN/hfcmulti.c 			writel(pv, plx_acc_32);
writel            969 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(pv, plx_acc_32);
writel           1000 drivers/isdn/hardware/mISDN/hfcmulti.c 			writel(pv, plx_acc_32);
writel           1064 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(PLX_GPIOC_INIT, plx_acc_32);
writel           1074 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(pv, plx_acc_32);
writel           1197 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(PLX_GPIOC_INIT, plx_acc_32);
writel           1207 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(pv, plx_acc_32);
writel           1235 drivers/isdn/hardware/mISDN/hfcmulti.c 			writel(pv, plx_acc_32);
writel           1310 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(pv, plx_acc_32);
writel           1416 drivers/isdn/hardware/mISDN/hfcmulti.c 				writel(pv, plx_acc_32);
writel           1451 drivers/isdn/hardware/mISDN/hfcmulti.c 		writel(pv, plx_acc_32);
writel            395 drivers/isdn/hardware/mISDN/mISDNinfineon.c 		writel(PITA_INT0_ENABLE, hw->cfg.p);
writel            439 drivers/isdn/hardware/mISDN/mISDNinfineon.c 		writel(0, hw->cfg.p);
writel            502 drivers/isdn/hardware/mISDN/mISDNinfineon.c 		writel(PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE,
writel            505 drivers/isdn/hardware/mISDN/mISDNinfineon.c 		writel(PITA_PARA_MPX_MODE, hw->cfg.p + PITA_MISC_REG);
writel            509 drivers/isdn/hardware/mISDN/mISDNinfineon.c 		writel(PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE,
writel            512 drivers/isdn/hardware/mISDN/mISDNinfineon.c 		writel(PITA_PARA_MPX_MODE | PITA_SER_SOFTRESET,
writel             78 drivers/leds/leds-bcm6328.c 	writel(data, reg);
writel             51 drivers/leds/leds-bcm6358.c 	writel(data, reg);
writel            154 drivers/macintosh/smu.c 	writel(smu->cmd_buf_abs, smu->db_buf);
writel             70 drivers/mailbox/armada-37xx-rwtm-mailbox.c 	writel(reg, mbox->base + RWTM_HOST_INT_RESET);
writel             97 drivers/mailbox/armada-37xx-rwtm-mailbox.c 		writel(msg->args[i], mbox->base + RWTM_MBOX_PARAM(i));
writel             98 drivers/mailbox/armada-37xx-rwtm-mailbox.c 	writel(msg->command, mbox->base + RWTM_MBOX_COMMAND);
writel            119 drivers/mailbox/armada-37xx-rwtm-mailbox.c 	writel(reg, mbox->base + RWTM_HOST_INT_MASK);
writel            132 drivers/mailbox/armada-37xx-rwtm-mailbox.c 	writel(reg, mbox->base + RWTM_HOST_INT_MASK);
writel             86 drivers/mailbox/bcm2835-mailbox.c 	writel(msg, mbox->regs + MAIL1_WRT);
writel             97 drivers/mailbox/bcm2835-mailbox.c 	writel(ARM_MC_IHAVEDATAIRQEN, mbox->regs + MAIL0_CNF);
writel            106 drivers/mailbox/bcm2835-mailbox.c 	writel(0, mbox->regs + MAIL0_CNF);
writel            108 drivers/mailbox/hi3660-mailbox.c 	writel(BIT(mchan->ack_irq), base + MBOX_ICLR_REG);
writel            119 drivers/mailbox/hi3660-mailbox.c 		writel(MBOX_IPC_UNLOCK, mbox->base + MBOX_IPC_LOCK_REG);
writel            145 drivers/mailbox/hi3660-mailbox.c 			writel(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
writel            203 drivers/mailbox/hi3660-mailbox.c 	writel(BIT(mchan->ack_irq), base + MBOX_SEND_REG);
writel             96 drivers/mailbox/hi6220-mailbox.c 	writel(status, mbox->base + MBOX_MODE_REG(slot));
writel            106 drivers/mailbox/hi6220-mailbox.c 	writel(mode, mbox->base + MBOX_MODE_REG(slot));
writel            141 drivers/mailbox/hi6220-mailbox.c 		writel(buf[i], mbox->base + MBOX_DATA_REG(slot) + i * 4);
writel            144 drivers/mailbox/hi6220-mailbox.c 	writel(BIT(mchan->dst_irq), DST_INT_RAW_REG(mbox->ipc));
writel            186 drivers/mailbox/hi6220-mailbox.c 		writel(BIT(mchan->ack_irq), ACK_INT_CLR_REG(mbox->ipc));
writel            201 drivers/mailbox/hi6220-mailbox.c 	writel(BIT(mchan->ack_irq), ACK_INT_ENA_REG(mbox->ipc));
writel            211 drivers/mailbox/hi6220-mailbox.c 	writel(BIT(mchan->ack_irq), ACK_INT_DIS_REG(mbox->ipc));
writel            327 drivers/mailbox/hi6220-mailbox.c 	writel(0x0,  ACK_INT_MSK_REG(mbox->ipc));
writel            328 drivers/mailbox/hi6220-mailbox.c 	writel(~0x0, ACK_INT_CLR_REG(mbox->ipc));
writel             70 drivers/mailbox/mailbox-xgene-slimpro.c 	writel(msg[1], mb_chan->reg + REG_DB_DOUT0);
writel             71 drivers/mailbox/mailbox-xgene-slimpro.c 	writel(msg[2], mb_chan->reg + REG_DB_DOUT1);
writel             72 drivers/mailbox/mailbox-xgene-slimpro.c 	writel(msg[0], mb_chan->reg + REG_DB_OUT);
writel             87 drivers/mailbox/mailbox-xgene-slimpro.c 		writel(MBOX_STATUS_ACK_MASK, mb_chan->reg + REG_DB_STAT);
writel             99 drivers/mailbox/mailbox-xgene-slimpro.c 		writel(MBOX_STATUS_AVAIL_MASK, mb_chan->reg + REG_DB_STAT);
writel            141 drivers/mailbox/mailbox-xgene-slimpro.c 	writel(MBOX_STATUS_ACK_MASK | MBOX_STATUS_AVAIL_MASK,
writel            146 drivers/mailbox/mailbox-xgene-slimpro.c 	writel(val, mb_chan->reg + REG_DB_STATMASK);
writel            159 drivers/mailbox/mailbox-xgene-slimpro.c 	writel(val, mb_chan->reg + REG_DB_STATMASK);
writel             85 drivers/mailbox/mtk-cmdq-mailbox.c 	writel(CMDQ_THR_SUSPEND, thread->base + CMDQ_THR_SUSPEND_TASK);
writel            103 drivers/mailbox/mtk-cmdq-mailbox.c 	writel(CMDQ_THR_RESUME, thread->base + CMDQ_THR_SUSPEND_TASK);
writel            111 drivers/mailbox/mtk-cmdq-mailbox.c 	writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
writel            113 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
writel            121 drivers/mailbox/mtk-cmdq-mailbox.c 	writel(CMDQ_THR_DO_WARM_RESET, thread->base + CMDQ_THR_WARM_RESET);
writel            136 drivers/mailbox/mtk-cmdq-mailbox.c 	writel(CMDQ_THR_DISABLED, thread->base + CMDQ_THR_ENABLE_TASK);
writel            142 drivers/mailbox/mtk-cmdq-mailbox.c 	writel(readl(thread->base + CMDQ_THR_CURR_ADDR),
writel            230 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(next_task->pa_base, thread->base + CMDQ_THR_CURR_ADDR);
writel            242 drivers/mailbox/mtk-cmdq-mailbox.c 	writel(~irq_flag, thread->base + CMDQ_THR_IRQ_STATUS);
writel            376 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(task->pa_base, thread->base + CMDQ_THR_CURR_ADDR);
writel            377 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(task->pa_base + pkt->cmd_buf_size,
writel            379 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
writel            380 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
writel            381 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
writel            398 drivers/mailbox/mtk-cmdq-mailbox.c 				writel(task->pa_base,
writel            410 drivers/mailbox/mtk-cmdq-mailbox.c 				writel(task->pa_base,
writel            417 drivers/mailbox/mtk-cmdq-mailbox.c 		writel(task->pa_base + pkt->cmd_buf_size,
writel            137 drivers/mailbox/pcc.c 		writel(val, vaddr);
writel            115 drivers/mailbox/tegra-hsp.c 	writel(value, hsp->regs + offset);
writel            127 drivers/mailbox/tegra-hsp.c 	writel(value, channel->regs + offset);
writel            379 drivers/mailbox/ti-msgmgr.c 		writel(*word_data, data_reg);
writel            387 drivers/mailbox/ti-msgmgr.c 		writel(data_trail, data_reg);
writel            395 drivers/mailbox/ti-msgmgr.c 		writel(0, qinst->queue_buff_end);
writel            101 drivers/media/pci/b2c2/flexcop-pci.c 	writel(v.raw, fc_pci->io_mem + r);
writel            133 drivers/media/pci/bt8xx/bt878.h #define bmtwrite(dat,adr)  writel((dat), (adr))
writel            516 drivers/media/pci/bt8xx/bttvp.h #define btwrite(dat,adr)    writel((dat), btv->bt848_mmio+(adr))
writel             54 drivers/media/pci/cx18/cx18-io.h 	writel(val, addr);
writel            497 drivers/media/pci/cx23885/cx23885.h #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
writel            500 drivers/media/pci/cx23885/cx23885.h   writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
writel            352 drivers/media/pci/cx25821/cx25821.h #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
writel            355 drivers/media/pci/cx25821/cx25821.h 	writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
writel            584 drivers/media/pci/cx88/cx88.h #define cx_write(reg, value)     writel((value), core->lmmio + ((reg) >> 2))
writel            588 drivers/media/pci/cx88/cx88.h 	writel((readl(core->lmmio + ((reg) >> 2)) & ~(mask)) |\
writel            599 drivers/media/pci/cx88/cx88.h 	writel(core->shadow[sreg], core->lmmio + ((reg) >> 2)))
writel            603 drivers/media/pci/cx88/cx88.h 				writel(core->shadow[sreg], \
writel             35 drivers/media/pci/ddbridge/ddbridge-io.h 	writel(val, link->dev->regs + adr);
writel             45 drivers/media/pci/ddbridge/ddbridge-io.h 	writel(val, dev->regs + adr);
writel            375 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(timing.clk_termen, q->csi_rx_base +
writel            377 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(timing.clk_settle, q->csi_rx_base +
writel            381 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(timing.dat_termen, q->csi_rx_base +
writel            383 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(timing.dat_settle, q->csi_rx_base +
writel            387 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_PBM_WMCTRL1_MIN_2CK |
writel            390 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_PBM_WMCTRL2_HWM_2CK << CIO2_PBM_WMCTRL2_HWM_2CK_SHIFT |
writel            396 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_PBM_ARB_CTRL_LANES_DIV <<
writel            404 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_CSIRX_STATUS_DLANE_HS_MASK,
writel            406 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_CSIRX_STATUS_DLANE_LP_MASK,
writel            409 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_FB_HPLL_FREQ, base + CIO2_REG_FB_HPLL_FREQ);
writel            410 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_ISCLK_RATIO, base + CIO2_REG_ISCLK_RATIO);
writel            414 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(1, q->csi_rx_base + CIO2_REG_MIPIBE_SP_LUT_ENTRY(i));
writel            418 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(CIO2_MIPIBE_LP_LUT_ENTRY_DISREGARD,
writel            420 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_MIPIBE_GLOBAL_LUT_DISREGARD,
writel            423 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_INT_EN_EXT_IE_MASK, base + CIO2_REG_INT_EN_EXT_IE);
writel            424 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_MASK);
writel            425 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_ENABLE);
writel            426 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_EDGE);
writel            427 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_LEVEL_NOT_PULSE);
writel            428 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_INT_EN_EXT_OE_MASK, base + CIO2_REG_INT_EN_EXT_OE);
writel            430 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_REG_INT_EN_IRQ | CIO2_INT_IOC(CIO2_DMA_CHAN) |
writel            434 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel((CIO2_PXM_PXF_FMT_CFG_BPP_10 | CIO2_PXM_PXF_FMT_CFG_PCK_64B)
writel            437 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(SID << CIO2_MIPIBE_LP_LUT_ENTRY_SID_SHIFT |
writel            441 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_COMP_FORMAT(sensor_vc));
writel            442 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_FORCE_RAW8);
writel            443 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, base + CIO2_REG_PXM_SID2BID0(csi2bus));
writel            445 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(lanes, q->csi_rx_base + CIO2_REG_CSIRX_NOF_ENABLED_LANES);
writel            446 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_CGC_PRIM_TGE |
writel            459 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_LTRCTRL_LTRDYNEN, base + CIO2_REG_LTRCTRL);
writel            460 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_LTRVAL0_VAL << CIO2_LTRVAL02_VAL_SHIFT |
writel            465 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_LTRVAL2_VAL << CIO2_LTRVAL02_VAL_SHIFT |
writel            472 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(0, base + CIO2_REG_CDMABA(i));
writel            473 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(0, base + CIO2_REG_CDMAC0(i));
writel            474 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(0, base + CIO2_REG_CDMAC1(i));
writel            478 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(q->fbpt_bus_addr >> PAGE_SHIFT,
writel            481 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(num_buffers1 << CIO2_CDMAC0_FBPT_LEN_SHIFT |
writel            489 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(1 << CIO2_CDMAC1_LINENUMUPDATE_SHIFT,
writel            492 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, base + CIO2_REG_PBM_FOPN_ABORT);
writel            494 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_PXM_FRF_CFG_CRC_TH << CIO2_PXM_FRF_CFG_CRC_TH_SHIFT |
writel            501 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_IRQCTRL_MASK, q->csi_rx_base + CIO2_REG_IRQCTRL_CLEAR);
writel            502 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(~0, base + CIO2_REG_INT_STS_EXT_OE);
writel            503 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(~0, base + CIO2_REG_INT_STS_EXT_IE);
writel            504 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(~0, base + CIO2_REG_INT_STS);
writel            507 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(1, q->csi_rx_base + CIO2_REG_MIPIBE_ENABLE);
writel            508 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(1, q->csi_rx_base + CIO2_REG_CSIRX_ENABLE);
writel            519 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_MASK);
writel            520 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_IRQCTRL_ENABLE);
writel            521 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_CSIRX_ENABLE);
writel            522 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, q->csi_rx_base + CIO2_REG_MIPIBE_ENABLE);
writel            525 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(0, base + CIO2_REG_CDMAC0(CIO2_DMA_CHAN));
writel            537 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(readl(base + CIO2_REG_PXM_FRF_CFG(i)) |
writel            539 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(readl(base + CIO2_REG_PBM_FOPN_ABORT) |
writel            669 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(oe_clear, base + CIO2_REG_INT_STS_EXT_OE);
writel            744 drivers/media/pci/intel/ipu3/ipu3-cio2.c 				writel(csi2_clear,
writel            755 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(ie_clear, base + CIO2_REG_INT_STS_EXT_IE);
writel            780 drivers/media/pci/intel/ipu3/ipu3-cio2.c 		writel(int_status, base + CIO2_REG_INT_STS);
writel           1877 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_D0I3C_I3, base + CIO2_REG_D0I3C);
writel           1895 drivers/media/pci/intel/ipu3/ipu3-cio2.c 	writel(CIO2_D0I3C_RR, base + CIO2_REG_D0I3C);
writel            812 drivers/media/pci/ivtv/ivtv-driver.h 	do { writel(val, reg); readl(reg); } while (0)
writel            815 drivers/media/pci/ivtv/ivtv-driver.h #define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
writel            820 drivers/media/pci/ivtv/ivtv-driver.h #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
writel            825 drivers/media/pci/ivtv/ivtv-driver.h #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
writel            712 drivers/media/pci/ivtv/ivtv-ioctl.c 		writel(*val, reg + reg_start);
writel            749 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[0]);
writel            750 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[1]);
writel            751 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[2]);
writel            752 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[3]);
writel            753 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[0]);
writel            754 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[1]);
writel            755 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[2]);
writel            756 drivers/media/pci/ivtv/ivtv-streams.c 	writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[3]);
writel             45 drivers/media/pci/mantis/mantis_common.h #define mwrite(dat, addr)	writel((dat), addr)
writel            437 drivers/media/pci/meye/meye.c 	writel(v, meye.mchip_mmregs + reg);
writel            483 drivers/media/pci/meye/meye.c 		writel(tables[i], meye.mchip_mmregs + MCHIP_VRJ_TABLE_DATA);
writel            487 drivers/media/pci/meye/meye.c 		writel(tables[i], meye.mchip_mmregs + MCHIP_VRJ_TABLE_DATA);
writel            173 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(AVL_IRQ_ENABLE, ndev->bmmio0 + AVL_PCIE_IENR);
writel            197 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 		writel(BIT_DMA_RUN, &dma->regs->ctrlstat_set);
writel            200 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 		writel(BIT_DMA_RUN, &dma->regs->ctrlstat_clear);
writel            216 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(BIT_DMA_IRQ, &dma->regs->ctrlstat_clear);
writel            255 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(0, ndev->bmmio0 + AVL_PCIE_IENR);
writel            280 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(AVL_IRQ_ENABLE, ndev->bmmio0 + AVL_PCIE_IENR);
writel            673 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel((NETUP_DMA_BLOCKS_COUNT << 24) |
writel            675 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel((u32)(dma->addr_phys & 0x3FFFFFFF), &dma->regs->start_addr_lo);
writel            676 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(0, &dma->regs->start_addr_hi);
writel            677 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(dma->high_addr, ndev->bmmio0 + 0x1000);
writel            678 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(375000000, &dma->regs->timeout);
writel            680 drivers/media/pci/netup_unidvb/netup_unidvb_core.c 	writel(BIT_DMA_IRQ, &dma->regs->ctrlstat_clear);
writel             42 drivers/media/pci/ngene/ngene-core.c #define ngwritel(dat, adr)         writel((dat), dev->iomem + (adr))
writel            132 drivers/media/pci/pluto2/pluto2.c 	writel(val, &pluto->io_mem[reg]);
writel            140 drivers/media/pci/pluto2/pluto2.c 	writel(val, &pluto->io_mem[reg]);
writel            290 drivers/media/pci/pt1/pt1.c 	writel(data, pt1->regs + reg * 4);
writel            691 drivers/media/pci/saa7134/saa7134.h #define saa_writel(reg,value)      writel((value), dev->lmmio + (reg));
writel            693 drivers/media/pci/saa7134/saa7134.h   writel((readl(dev->lmmio+(reg)) & ~(mask)) |\
writel            619 drivers/media/pci/saa7164/saa7164.h #define saa7164_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
writel            622 drivers/media/pci/saa7164/saa7164.h #define saa7164_writeb(reg, value)     writel((value), dev->bmmio + (reg))
writel            296 drivers/media/pci/smipcie/smipcie.h #define smi_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
writel            299 drivers/media/pci/smipcie/smipcie.h 	writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
writel            285 drivers/media/pci/solo6x10/solo6x10.h 	writel(data, solo_dev->reg_base + reg);
writel            172 drivers/media/pci/tw5864/tw5864.h #define tw_writel(reg, value) writel((value), dev->mmio + reg)
writel            169 drivers/media/pci/tw68/tw68.h #define tw_writel(reg, value)	writel((value), dev->lmmio + ((reg) >> 2))
writel            173 drivers/media/pci/tw68/tw68.h 		writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
writel            181 drivers/media/pci/tw68/tw68.h 		writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
writel            153 drivers/media/pci/tw686x/tw686x.h 	writel(value, dev->mmio + reg);
writel            410 drivers/media/platform/aspeed-video.c 	writel(t, video->base + reg);
writel            425 drivers/media/platform/aspeed-video.c 	writel(val, video->base + reg);
writel            138 drivers/media/platform/atmel/atmel-isi.c 	writel(val, isi->regs + reg);
writel             97 drivers/media/platform/cadence/cdns-csi2rx.c 	writel(CSI2RX_SOFT_RESET_PROTOCOL | CSI2RX_SOFT_RESET_FRONT,
writel            102 drivers/media/platform/cadence/cdns-csi2rx.c 	writel(0, csi2rx->base + CSI2RX_SOFT_RESET_REG);
writel            137 drivers/media/platform/cadence/cdns-csi2rx.c 	writel(reg, csi2rx->base + CSI2RX_STATIC_CFG_REG);
writel            158 drivers/media/platform/cadence/cdns-csi2rx.c 		writel(CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF,
writel            161 drivers/media/platform/cadence/cdns-csi2rx.c 		writel(CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT |
writel            165 drivers/media/platform/cadence/cdns-csi2rx.c 		writel(CSI2RX_STREAM_CTRL_START,
writel            195 drivers/media/platform/cadence/cdns-csi2rx.c 		writel(0, csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
writel            235 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(CSI2TX_DPHY_CLK_WAKEUP_ULPS_CYCLES(32),
writel            253 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(reg, csi2tx->base + CSI2TX_DPHY_CFG_REG);
writel            259 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(reg | CSI2TX_DPHY_CFG_MODE_HS,
writel            275 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(reg, csi2tx->base + CSI2TX_DPHY_CFG_REG);
writel            289 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(reg, csi2tx->base + CSI2TX_V2_DPHY_CFG_REG);
writel            296 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(CSI2TX_CONFIG_SRST_REQ, csi2tx->base + CSI2TX_CONFIG_REG);
writel            309 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(CSI2TX_CONFIG_CFG_REQ, csi2tx->base + CSI2TX_CONFIG_REG);
writel            363 drivers/media/platform/cadence/cdns-csi2tx.c 		writel(CSI2TX_DT_CFG_DT(fmt->dt),
writel            366 drivers/media/platform/cadence/cdns-csi2tx.c 		writel(CSI2TX_DT_FORMAT_BYTES_PER_LINE(mfmt->width * fmt->bpp) |
writel            374 drivers/media/platform/cadence/cdns-csi2tx.c 		writel(CSI2TX_STREAM_IF_CFG_FILL_LEVEL(4),
writel            379 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(0, csi2tx->base + CSI2TX_CONFIG_REG);
writel            386 drivers/media/platform/cadence/cdns-csi2tx.c 	writel(CSI2TX_CONFIG_CFG_REQ | CSI2TX_CONFIG_SRST_REQ,
writel             79 drivers/media/platform/coda/coda-common.c 	writel(data, dev->regs_base + reg);
writel            107 drivers/media/platform/coda/imx-vdoa.c 	writel(0, vdoa->regs + VDOAIE);
writel            117 drivers/media/platform/coda/imx-vdoa.c 	writel(val, vdoa->regs + VDOAIST);
writel            170 drivers/media/platform/coda/imx-vdoa.c 	writel(val, vdoa->regs + VDOAC);
writel            172 drivers/media/platform/coda/imx-vdoa.c 	writel(dst_q_data->height << 16 | dst_q_data->width,
writel            176 drivers/media/platform/coda/imx-vdoa.c 	writel(val, vdoa->regs + VDOAIEBA00);
writel            178 drivers/media/platform/coda/imx-vdoa.c 	writel(src_q_data->bytesperline << 16 | dst_q_data->bytesperline,
writel            186 drivers/media/platform/coda/imx-vdoa.c 	writel(val, vdoa->regs + VDOAIUBO);
writel            189 drivers/media/platform/coda/imx-vdoa.c 	writel(val, vdoa->regs + VDOAVEBA0);
writel            191 drivers/media/platform/coda/imx-vdoa.c 	writel(val, vdoa->regs + VDOAVUBO);
writel            194 drivers/media/platform/coda/imx-vdoa.c 	writel(VDOAIE_EITERR | VDOAIE_EIEOT, vdoa->regs + VDOAIE);
writel            195 drivers/media/platform/coda/imx-vdoa.c 	writel(VDOASRR_START, vdoa->regs + VDOASRR);
writel             59 drivers/media/platform/davinci/vpbe_osd.c 	writel(val, osd->osd_base + offset);
writel             71 drivers/media/platform/davinci/vpbe_osd.c 	writel(val, addr);
writel             83 drivers/media/platform/davinci/vpbe_osd.c 	writel(val, addr);
writel             96 drivers/media/platform/davinci/vpbe_osd.c 	writel(new_val, addr);
writel             81 drivers/media/platform/davinci/vpbe_venc.c 	writel(val, (venc->venc_base + offset));
writel            100 drivers/media/platform/davinci/vpbe_venc.c 	writel(val, venc->vdaccfg_reg);
writel             33 drivers/media/platform/davinci/vpif.h #define regw(value, reg)        writel(value, (reg + vpif_base))
writel            517 drivers/media/platform/davinci/vpss.c 	writel(VPSS_CLK_CTRL_VENCCLKEN |
writel            438 drivers/media/platform/exynos-gsc/gsc-core.h 	writel(cfg, dev->regs + GSC_ENABLE);
writel            458 drivers/media/platform/exynos-gsc/gsc-core.h 	writel(cfg, dev->regs + GSC_IRQ);
writel             16 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(GSC_SW_RESET_SRESET, dev->regs + GSC_SW_RESET);
writel             43 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IRQ);
writel             55 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IRQ);
writel             67 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_BASE_ADDR_Y_MASK);
writel             68 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_BASE_ADDR_CB_MASK);
writel             69 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_BASE_ADDR_CR_MASK);
writel             81 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_Y_MASK);
writel             82 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_CB_MASK);
writel             83 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_CR_MASK);
writel             91 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(addr->y, dev->regs + GSC_IN_BASE_ADDR_Y(index));
writel             92 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(addr->cb, dev->regs + GSC_IN_BASE_ADDR_CB(index));
writel             93 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(addr->cr, dev->regs + GSC_IN_BASE_ADDR_CR(index));
writel            102 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(addr->y, dev->regs + GSC_OUT_BASE_ADDR_Y(index));
writel            103 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(addr->cb, dev->regs + GSC_OUT_BASE_ADDR_CB(index));
writel            104 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(addr->cr, dev->regs + GSC_OUT_BASE_ADDR_CR(index));
writel            117 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_CON);
writel            129 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_SRCIMG_OFFSET);
writel            134 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_SRCIMG_SIZE);
writel            139 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_CROPPED_SIZE);
writel            159 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_CON);
writel            173 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_CON);
writel            215 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_CON);
writel            230 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_CON);
writel            243 drivers/media/platform/exynos-gsc/gsc-regs.c 		writel(cfg, dev->regs + GSC_DSTIMG_OFFSET);
writel            247 drivers/media/platform/exynos-gsc/gsc-regs.c 		writel(cfg, dev->regs + GSC_DSTIMG_SIZE);
writel            259 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_SCALED_SIZE);
writel            279 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_CON);
writel            293 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_CON);
writel            339 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_CON);
writel            351 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_PRE_SCALE_RATIO);
writel            361 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_MAIN_H_RATIO);
writel            364 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_MAIN_V_RATIO);
writel            397 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_IN_CON);
writel            415 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_OUT_CON);
writel            425 drivers/media/platform/exynos-gsc/gsc-regs.c 	writel(cfg, dev->regs + GSC_ENABLE);
writel            317 drivers/media/platform/exynos4-is/fimc-is.h 	writel(v, is->regs + offset);
writel            327 drivers/media/platform/exynos4-is/fimc-is.h 	writel(v, is->pmu_regs + offset);
writel             27 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel             37 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel             44 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CISTATUS);
writel             58 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CISTATUS2);
writel             80 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel             87 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIIMGCPT);
writel             94 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIIMGCPT);
writel            108 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel            147 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel            154 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CISRCSIZE);
writel            167 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIWDOFST);
writel            173 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIWDOFST2);
writel            184 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGENERAL);
writel            212 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel            226 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIODMAFMT);
writel            244 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg | pixcode[i][1], dev->regs + FLITE_REG_CIODMAFMT);
writel            255 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIOCAN);
writel            261 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIOOFF);
writel            275 drivers/media/platform/exynos4-is/fimc-lite-reg.c 		writel(buf->paddr, dev->regs + FLITE_REG_CIOSA);
writel            277 drivers/media/platform/exynos4-is/fimc-lite-reg.c 		writel(buf->paddr, dev->regs + FLITE_REG_CIOSAN(index - 1));
writel            281 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIFCNTSEQ);
writel            293 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIFCNTSEQ);
writel            304 drivers/media/platform/exynos4-is/fimc-lite-reg.c 		writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel            309 drivers/media/platform/exynos4-is/fimc-lite-reg.c 	writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
writel            152 drivers/media/platform/exynos4-is/fimc-lite-reg.h 	writel(mask, dev->regs + FLITE_REG_CIFCNTSEQ);
writel             25 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CISRCFMT);
writel             30 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIGCTRL);
writel             35 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIGCTRL);
writel             94 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(cfg, dev->regs + FIMC_REG_CITRGFMT);
writel            100 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(flip, dev->regs + FIMC_REG_MSCTRL);
writel            139 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CITRGFMT);
writel            144 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CITAREA);
writel            154 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_ORGOSIZE);
writel            162 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIGCTRL);
writel            176 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIOYOFF);
writel            179 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIOCBOFF);
writel            182 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIOCROFF);
writel            208 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIOCTRL);
writel            218 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_ORGISIZE);
writel            228 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIOCTRL);
writel            241 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CISCPRERATIO);
writel            244 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CISCPREDST);
writel            308 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CISCCTRL);
writel            330 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(cfg, dev->regs + FIMC_REG_CISCCTRL);
writel            338 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(cfg, dev->regs + FIMC_REG_CIEXTEN);
writel            342 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(cfg, dev->regs + FIMC_REG_CISCCTRL);
writel            360 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIIMGCPT);
writel            368 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIIMGCPT);
writel            385 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIIMGEFF);
writel            400 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIOCTRL);
writel            416 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg_o, dev->regs + FIMC_REG_ORGISIZE);
writel            417 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg_r, dev->regs + FIMC_REG_CIREAL_ISIZE);
writel            429 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIIYOFF);
writel            432 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIICBOFF);
writel            435 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIICROFF);
writel            487 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_MSCTRL);
writel            499 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIDMAPARAM);
writel            515 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_MSCTRL);
writel            526 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CISCCTRL);
writel            533 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIREAL_ISIZE);
writel            535 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(paddr->y, dev->regs + FIMC_REG_CIIYSA(0));
writel            536 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(paddr->cb, dev->regs + FIMC_REG_CIICBSA(0));
writel            537 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(paddr->cr, dev->regs + FIMC_REG_CIICRSA(0));
writel            540 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIREAL_ISIZE);
writel            548 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(paddr->y, dev->regs + FIMC_REG_CIOYSA(i));
writel            549 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(paddr->cb, dev->regs + FIMC_REG_CIOCBSA(i));
writel            550 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(paddr->cr, dev->regs + FIMC_REG_CIOCRSA(i));
writel            580 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, fimc->regs + FIMC_REG_CIGCTRL);
writel            642 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, fimc->regs + FIMC_REG_CISRCFMT);
writel            656 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, fimc->regs + FIMC_REG_CIWDOFST);
writel            662 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, fimc->regs + FIMC_REG_CIWDOFST2);
writel            705 drivers/media/platform/exynos4-is/fimc-reg.c 		writel(tmp, fimc->regs + FIMC_REG_CSIIMGFMT);
writel            726 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, fimc->regs + FIMC_REG_CIGCTRL);
writel            735 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CIGCTRL);
writel            745 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_CISCCTRL);
writel            755 drivers/media/platform/exynos4-is/fimc-reg.c 	writel(cfg, dev->regs + FIMC_REG_MSCTRL);
writel            334 drivers/media/platform/exynos4-is/fimc-reg.h 	writel(mask, dev->regs + FIMC_REG_CIFCNTSEQ);
writel            271 drivers/media/platform/exynos4-is/mipi-csis.c #define s5pcsis_write(__csis, __r, __v) writel(__v, __csis->regs + __r)
writel            488 drivers/media/platform/imx-pxp.c 		writel(csc1_coef[0], dev->mmio + HW_PXP_CSC1_COEF0);
writel            489 drivers/media/platform/imx-pxp.c 		writel(csc1_coef[1], dev->mmio + HW_PXP_CSC1_COEF1);
writel            490 drivers/media/platform/imx-pxp.c 		writel(csc1_coef[2], dev->mmio + HW_PXP_CSC1_COEF2);
writel            492 drivers/media/platform/imx-pxp.c 		writel(BM_PXP_CSC1_COEF0_BYPASS, dev->mmio + HW_PXP_CSC1_COEF0);
writel            708 drivers/media/platform/imx-pxp.c 		writel(csc2_ctrl, dev->mmio + HW_PXP_CSC2_CTRL);
writel            709 drivers/media/platform/imx-pxp.c 		writel(csc2_coef[0], dev->mmio + HW_PXP_CSC2_COEF0);
writel            710 drivers/media/platform/imx-pxp.c 		writel(csc2_coef[1], dev->mmio + HW_PXP_CSC2_COEF1);
writel            711 drivers/media/platform/imx-pxp.c 		writel(csc2_coef[2], dev->mmio + HW_PXP_CSC2_COEF2);
writel            712 drivers/media/platform/imx-pxp.c 		writel(csc2_coef[3], dev->mmio + HW_PXP_CSC2_COEF3);
writel            713 drivers/media/platform/imx-pxp.c 		writel(csc2_coef[4], dev->mmio + HW_PXP_CSC2_COEF4);
writel            714 drivers/media/platform/imx-pxp.c 		writel(csc2_coef[5], dev->mmio + HW_PXP_CSC2_COEF5);
writel            716 drivers/media/platform/imx-pxp.c 		writel(BM_PXP_CSC2_CTRL_BYPASS, dev->mmio + HW_PXP_CSC2_CTRL);
writel            867 drivers/media/platform/imx-pxp.c 	writel(ctrl, dev->mmio + HW_PXP_CTRL);
writel            869 drivers/media/platform/imx-pxp.c 	writel(out_ctrl, dev->mmio + HW_PXP_OUT_CTRL);
writel            870 drivers/media/platform/imx-pxp.c 	writel(out_buf, dev->mmio + HW_PXP_OUT_BUF);
writel            871 drivers/media/platform/imx-pxp.c 	writel(out_buf2, dev->mmio + HW_PXP_OUT_BUF2);
writel            872 drivers/media/platform/imx-pxp.c 	writel(out_pitch, dev->mmio + HW_PXP_OUT_PITCH);
writel            873 drivers/media/platform/imx-pxp.c 	writel(out_lrc, dev->mmio + HW_PXP_OUT_LRC);
writel            874 drivers/media/platform/imx-pxp.c 	writel(out_ps_ulc, dev->mmio + HW_PXP_OUT_PS_ULC);
writel            875 drivers/media/platform/imx-pxp.c 	writel(out_ps_lrc, dev->mmio + HW_PXP_OUT_PS_LRC);
writel            876 drivers/media/platform/imx-pxp.c 	writel(as_ulc, dev->mmio + HW_PXP_OUT_AS_ULC);
writel            877 drivers/media/platform/imx-pxp.c 	writel(as_lrc, dev->mmio + HW_PXP_OUT_AS_LRC);
writel            878 drivers/media/platform/imx-pxp.c 	writel(ps_ctrl, dev->mmio + HW_PXP_PS_CTRL);
writel            879 drivers/media/platform/imx-pxp.c 	writel(ps_buf, dev->mmio + HW_PXP_PS_BUF);
writel            880 drivers/media/platform/imx-pxp.c 	writel(ps_ubuf, dev->mmio + HW_PXP_PS_UBUF);
writel            881 drivers/media/platform/imx-pxp.c 	writel(ps_vbuf, dev->mmio + HW_PXP_PS_VBUF);
writel            882 drivers/media/platform/imx-pxp.c 	writel(ps_pitch, dev->mmio + HW_PXP_PS_PITCH);
writel            883 drivers/media/platform/imx-pxp.c 	writel(0x00ffffff, dev->mmio + HW_PXP_PS_BACKGROUND_0);
writel            884 drivers/media/platform/imx-pxp.c 	writel(ps_scale, dev->mmio + HW_PXP_PS_SCALE);
writel            885 drivers/media/platform/imx-pxp.c 	writel(ps_offset, dev->mmio + HW_PXP_PS_OFFSET);
writel            887 drivers/media/platform/imx-pxp.c 	writel(0x00ffffff, dev->mmio + HW_PXP_PS_CLRKEYLOW_0);
writel            888 drivers/media/platform/imx-pxp.c 	writel(0x00000000, dev->mmio + HW_PXP_PS_CLRKEYHIGH_0);
writel            891 drivers/media/platform/imx-pxp.c 	writel(0x00ffffff, dev->mmio + HW_PXP_AS_CLRKEYLOW_0);
writel            892 drivers/media/platform/imx-pxp.c 	writel(0x00000000, dev->mmio + HW_PXP_AS_CLRKEYHIGH_0);
writel            898 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_LUT_CTRL_BYPASS, dev->mmio + HW_PXP_LUT_CTRL);
writel            900 drivers/media/platform/imx-pxp.c 	writel(BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(0)|
writel            917 drivers/media/platform/imx-pxp.c 	writel(BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(1) |
writel            921 drivers/media/platform/imx-pxp.c 	writel(0xffff, dev->mmio + HW_PXP_IRQ_MASK);
writel            924 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_IRQ_ENABLE, dev->mmio + HW_PXP_CTRL_SET);
writel            925 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_ENABLE | BM_PXP_CTRL_ENABLE_CSC2 |
writel           1007 drivers/media/platform/imx-pxp.c 		writel(BM_PXP_STAT_IRQ0, dev->mmio + HW_PXP_STAT_CLR);
writel           1016 drivers/media/platform/imx-pxp.c 		writel(irq, dev->mmio + HW_PXP_IRQ_CLR);
writel           1620 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_CLR);
writel           1621 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_CLKGATE, dev->mmio + HW_PXP_CTRL_CLR);
writel           1623 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_SET);
writel           1630 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_CLR);
writel           1631 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_CLKGATE, dev->mmio + HW_PXP_CTRL_CLR);
writel           1734 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_CLKGATE, dev->mmio + HW_PXP_CTRL_SET);
writel           1735 drivers/media/platform/imx-pxp.c 	writel(BM_PXP_CTRL_SFTRST, dev->mmio + HW_PXP_CTRL_SET);
writel            198 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 		writel(ret, base + JPGDEC_REG_INTERRUPT_STATUS);
writel            221 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(0, base + JPGDEC_REG_TRIG);
writel            226 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(0x0000FFFF, base + JPGDEC_REG_INTERRUPT_STATUS);
writel            227 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(0x00, base + JPGDEC_REG_RESET);
writel            228 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(0x01, base + JPGDEC_REG_RESET);
writel            233 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(0x00, base + JPGDEC_REG_RESET);
writel            234 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(0x10, base + JPGDEC_REG_RESET);
writel            250 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(val, base + JPGDEC_REG_BRZ_FACTOR);
writel            257 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(addr_y, base + JPGDEC_REG_DEST_ADDR0_Y);
writel            259 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(addr_u, base + JPGDEC_REG_DEST_ADDR0_U);
writel            261 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(addr_v, base + JPGDEC_REG_DEST_ADDR0_V);
writel            267 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(addr_y, base + JPGDEC_REG_DEST_ADDR1_Y);
writel            268 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(addr_u, base + JPGDEC_REG_DEST_ADDR1_U);
writel            269 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(addr_v, base + JPGDEC_REG_DEST_ADDR1_V);
writel            275 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel((stride_y & 0xFFFF), base + JPGDEC_REG_STRIDE_Y);
writel            276 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel((stride_uv & 0xFFFF), base + JPGDEC_REG_STRIDE_UV);
writel            282 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel((stride_y & 0xFFFF), base + JPGDEC_REG_IMG_STRIDE_Y);
writel            283 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel((stride_uv & 0xFFFF), base + JPGDEC_REG_IMG_STRIDE_UV);
writel            288 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(idx & 0x0003FFFFFF, base + JPGDEC_REG_PAUSE_MCU_NUM);
writel            293 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(mode & 0x03, base + JPGDEC_REG_OPERATION_MODE);
writel            299 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(ptr, base + JPGDEC_REG_FILE_BRP);
writel            306 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(addr, base + JPGDEC_REG_FILE_ADDR);
writel            307 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(size, base + JPGDEC_REG_FILE_TOTAL_SIZE);
writel            317 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(val, base + JPGDEC_REG_COMP_ID);
writel            322 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(num - 1, base + JPGDEC_REG_TOTAL_MCU_NUM);
writel            327 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(num - 1, base + JPGDEC_REG_COMP0_DATA_UNIT_NUM);
writel            336 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(member, base + JPGDEC_REG_DU_CTRL);
writel            345 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(val, base + JPGDEC_REG_QT_ID);
writel            356 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(val, base + JPGDEC_REG_WDMA_CTRL);
writel            372 drivers/media/platform/mtk-jpeg/mtk_jpeg_hw.c 	writel(val, base + JPGDEC_REG_DU_NUM);
writel             66 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c 	writel((readl(vdec_misc_addr) | VDEC_IRQ_CFG),
writel             68 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c 	writel((readl(vdec_misc_addr) & ~VDEC_IRQ_CLR),
writel             40 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c 		writel(MTK_VENC_IRQ_STATUS_PAUSE, addr);
writel             43 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c 		writel(MTK_VENC_IRQ_STATUS_SWITCH, addr);
writel             46 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c 		writel(MTK_VENC_IRQ_STATUS_DRAM, addr);
writel             49 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c 		writel(MTK_VENC_IRQ_STATUS_SPS, addr);
writel             52 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c 		writel(MTK_VENC_IRQ_STATUS_PPS, addr);
writel             55 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c 		writel(MTK_VENC_IRQ_STATUS_FRM, addr);
writel            192 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 			writel(val, cm + VP8_HW_VLD_ADDR);
writel            195 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 			writel(val, cm + VP8_HW_VLD_VALUE);
writel            213 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 			writel(val, cm + VP8_HW_VLD_ADDR);
writel            231 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x1, sys + VP8_RW_CKEN_SET);
writel            232 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x101, ld + VP8_WO_VLD_SRST);
writel            233 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x101, hwb + VP8_WO_VLD_SRST);
writel            235 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(1, sys);
writel            237 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel((val & 0xFFFFFFFE), misc + VP8_RW_MISC_SRST);
writel            239 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x1, misc + VP8_RW_MISC_SYS_SEL);
writel            240 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x17F, misc + VP8_RW_MISC_SPEC_CON);
writel            241 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x71201100, misc + VP8_RW_MISC_FUNC_CON);
writel            242 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x0, ld + VP8_WO_VLD_SRST);
writel            243 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x0, hwb + VP8_WO_VLD_SRST);
writel            244 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x1, sys + VP8_RW_DCM_CON);
writel            245 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x1, misc + VP8_RW_MISC_DCM_CON);
writel            246 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 	writel(0x1, hwd + VP8_RW_VP8_CTRL);
writel            257 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 		writel(addr, hwd + VP8_BSASET);
writel            260 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 			writel(val, hwd + VP8_BSDSET);
writel            274 drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c 		writel(addr, hwd + VP8_BSASET);
writel            220 drivers/media/platform/mtk-vpu/mtk_vpu.c 	writel(val, vpu->reg.cfg + offset);
writel            299 drivers/media/platform/mx2_emmaprp.c 	writel(p_in, pcdev->base_emma + PRP_SOURCE_Y_PTR);
writel            300 drivers/media/platform/mx2_emmaprp.c 	writel(PRP_SIZE_WIDTH(s_width) | PRP_SIZE_HEIGHT(s_height),
writel            304 drivers/media/platform/mx2_emmaprp.c 	writel(p_out, pcdev->base_emma + PRP_DEST_Y_PTR);
writel            305 drivers/media/platform/mx2_emmaprp.c 	writel(p_out + d_size, pcdev->base_emma + PRP_DEST_CB_PTR);
writel            306 drivers/media/platform/mx2_emmaprp.c 	writel(p_out + d_size + (d_size >> 2),
writel            308 drivers/media/platform/mx2_emmaprp.c 	writel(PRP_SIZE_WIDTH(d_width) | PRP_SIZE_HEIGHT(d_height),
writel            313 drivers/media/platform/mx2_emmaprp.c 	writel(tmp | PRP_INTR_RDERR |
writel            322 drivers/media/platform/mx2_emmaprp.c 	writel(tmp | PRP_CNTL_CH2_OUT_YUV420 |
writel            338 drivers/media/platform/mx2_emmaprp.c 	writel(irqst, pcdev->base_emma + PRP_INTRSTATUS);
writel            351 drivers/media/platform/mx2_emmaprp.c 			writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL);
writel             53 drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c 	writel(CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_SHOW_REV_ID,
writel            179 drivers/media/platform/qcom/camss/camss-ispif.c 	writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);
writel            237 drivers/media/platform/qcom/camss/camss-ispif.c 	writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);
writel            577 drivers/media/platform/qcom/camss/camss-ispif.c 	writel(val, ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe));
writel            619 drivers/media/platform/qcom/camss/camss-ispif.c 	writel(val, ispif->base + addr);
writel            682 drivers/media/platform/qcom/camss/camss-ispif.c 	writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);
writel             32 drivers/media/platform/qcom/venus/firmware.c 	writel(0, base + WRAPPER_FW_START_ADDR);
writel             33 drivers/media/platform/qcom/venus/firmware.c 	writel(fw_size, base + WRAPPER_FW_END_ADDR);
writel             34 drivers/media/platform/qcom/venus/firmware.c 	writel(0, base + WRAPPER_CPA_START_ADDR);
writel             35 drivers/media/platform/qcom/venus/firmware.c 	writel(fw_size, base + WRAPPER_CPA_END_ADDR);
writel             36 drivers/media/platform/qcom/venus/firmware.c 	writel(fw_size, base + WRAPPER_NONPIX_START_ADDR);
writel             37 drivers/media/platform/qcom/venus/firmware.c 	writel(fw_size, base + WRAPPER_NONPIX_END_ADDR);
writel             38 drivers/media/platform/qcom/venus/firmware.c 	writel(0x0, base + WRAPPER_CPU_CGC_DIS);
writel             39 drivers/media/platform/qcom/venus/firmware.c 	writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG);
writel             42 drivers/media/platform/qcom/venus/firmware.c 	writel(0, base + WRAPPER_A9SS_SW_RESET);
writel             59 drivers/media/platform/qcom/venus/firmware.c 		writel(1, core->base + WRAPPER_A9SS_SW_RESET);
writel           1349 drivers/media/platform/qcom/venus/helpers.c 			writel(0, ctrl);
writel           1351 drivers/media/platform/qcom/venus/helpers.c 			writel(1, ctrl);
writel           1365 drivers/media/platform/qcom/venus/helpers.c 		writel(0, ctrl);
writel           1371 drivers/media/platform/qcom/venus/helpers.c 		writel(1, ctrl);
writel            350 drivers/media/platform/qcom/venus/hfi_venus.c 	writel(value, hdev->core->base + reg);
writel            248 drivers/media/platform/rcar_drif.c 	writel(data, ch->base + offset);
writel             97 drivers/media/platform/rockchip/rga/rga.h 	writel(value, rga->regs + reg);
writel             13 drivers/media/platform/s3c-camif/camif-regs.c #define camif_write(_camif, _off, _val)	writel(_val, (_camif)->io_base + (_off))
writel             14 drivers/media/platform/s5p-g2d/g2d-hw.c #define w(x, a)	writel((x), d->regs + (a))
writel            621 drivers/media/platform/s5p-jpeg/jpeg-core.c 		writel((unsigned int)qtbl[i], regs + tab + (i * 0x04));
writel            647 drivers/media/platform/s5p-jpeg/jpeg-core.c 		writel((unsigned int)htbl[i], regs + tab + (i * 0x04));
writel            690 drivers/media/platform/s5p-jpeg/jpeg-core.c 		writel(dword, regs + tab + i);
writel            831 drivers/media/platform/s5p-jpeg/jpeg-core.c 					writel(word, jpeg->regs +
writel            845 drivers/media/platform/s5p-jpeg/jpeg-core.c 					writel(word, jpeg->regs +
writel            852 drivers/media/platform/s5p-jpeg/jpeg-core.c 				writel(word, jpeg->regs +
writel            922 drivers/media/platform/s5p-jpeg/jpeg-core.c 					writel(word, jpeg->regs +
writel             23 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(1, regs + EXYNOS3250_SW_RESET);
writel             35 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 		writel(1, regs + EXYNOS3250_JPGDRI);
writel             41 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(0, regs + EXYNOS3250_JPGDRI);
writel             46 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(EXYNOS3250_POWER_ON, regs + EXYNOS3250_JPGCLKCON);
writel             51 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(((EXYNOS3250_DMA_MO_COUNT << EXYNOS3250_WDMA_ISSUE_NUM_SHIFT) &
writel             66 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg | EXYNOS3250_HALF_EN, base + EXYNOS3250_JPGCMOD);
writel            117 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGCMOD);
writel            129 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGCMOD);
writel            143 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGMOD);
writel            165 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGMOD);
writel            179 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGDRI);
writel            190 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_QHTBL);
writel            202 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_QHTBL);
writel            214 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_QHTBL);
writel            222 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGY);
writel            230 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGX);
writel            257 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_JPGINTSE);
writel            265 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_ENC_STREAM_BOUND);
writel            313 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_OUTFORM);
writel            318 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(addr, regs + EXYNOS3250_JPG_JPGADR);
writel            323 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(img_addr->y, regs + EXYNOS3250_LUMA_BASE);
writel            324 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(img_addr->cb, regs + EXYNOS3250_CHROMA_BASE);
writel            325 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(img_addr->cr, regs + EXYNOS3250_CHROMA_CR_BASE);
writel            358 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg_luma, regs + EXYNOS3250_LUMA_STRIDE);
writel            359 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg_cb, regs + EXYNOS3250_CHROMA_STRIDE);
writel            360 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg_cr, regs + EXYNOS3250_CHROMA_CR_STRIDE);
writel            373 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_LUMA_XY_OFFSET);
writel            380 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_CHROMA_XY_OFFSET);
writel            387 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(reg, regs + EXYNOS3250_CHROMA_CR_XY_OFFSET);
writel            393 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 		writel(EXYNOS3250_JPEG_ENC_COEF1,
writel            395 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 		writel(EXYNOS3250_JPEG_ENC_COEF2,
writel            397 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 		writel(EXYNOS3250_JPEG_ENC_COEF3,
writel            400 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 		writel(EXYNOS3250_JPEG_DEC_COEF1,
writel            402 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 		writel(EXYNOS3250_JPEG_DEC_COEF2,
writel            404 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 		writel(EXYNOS3250_JPEG_DEC_COEF3,
writel            411 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(1, regs + EXYNOS3250_JSTART);
writel            416 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(1, regs + EXYNOS3250_JRSTART);
writel            427 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(value, regs + EXYNOS3250_JPGINTST);
writel            443 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(size & EXYNOS3250_DEC_STREAM_MASK,
writel            466 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(sratio & EXYNOS3250_DEC_SCALE_FACTOR_MASK,
writel            474 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(EXYNOS3250_TIMER_INT_STAT | time_value,
writel            485 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c 	writel(EXYNOS3250_TIMER_INT_STAT, regs + EXYNOS3250_TIMER_ST);
writel             21 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE),
writel             25 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
writel             29 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
writel             39 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) |
writel             43 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) |
writel             47 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(reg & EXYNOS4_ENC_DEC_MODE_MASK,
writel            133 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg, base + EXYNOS4_IMG_FMT_REG);
writel            166 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg, base + EXYNOS4_IMG_FMT_REG);
writel            175 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(reg | EXYNOS4_INT_EN_ALL, base + EXYNOS4_INT_EN_REG);
writel            179 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(reg | EXYNOS5433_INT_EN_ALL, base + EXYNOS4_INT_EN_REG);
writel            200 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(reg | EXYNOS4_HUF_TBL_EN,
writel            203 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(reg & ~EXYNOS4_HUF_TBL_EN,
writel            214 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(reg | EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG);
writel            216 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(reg & ~EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG);
writel            222 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(address, base + EXYNOS4_OUT_MEM_BASE_REG);
writel            228 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(0x0, base + EXYNOS4_JPEG_IMG_SIZE_REG); /* clear */
writel            229 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(EXYNOS4_X_SIZE(x_value) | EXYNOS4_Y_SIZE(y_value),
writel            236 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(exynos4_jpeg_addr->y, base + EXYNOS4_IMG_BA_PLANE_1_REG);
writel            237 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(exynos4_jpeg_addr->cb, base + EXYNOS4_IMG_BA_PLANE_2_REG);
writel            238 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(exynos4_jpeg_addr->cr, base + EXYNOS4_IMG_BA_PLANE_3_REG);
writel            252 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg, base + EXYNOS4_TBL_SEL_REG);
writel            262 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg, base + EXYNOS4_TBL_SEL_REG);
writel            272 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg, base + EXYNOS4_TBL_SEL_REG);
writel            282 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(reg, base + EXYNOS4_TBL_SEL_REG);
writel            288 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(0xd2, base + EXYNOS4_HUFF_CNT_REG);
writel            290 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 		writel(0x1a2, base + EXYNOS4_HUFF_CNT_REG);
writel            300 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(size, base + EXYNOS4_BITSTREAM_SIZE_REG);
writel            320 drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c 	writel(size, base + EXYNOS4_INT_TIMER_COUNT_REG);
writel             21 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(1, regs + S5P_JPG_SW_RESET);
writel             32 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(S5P_POWER_ON, regs + S5P_JPGCLKCON);
writel             48 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGCMOD);
writel             63 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGMOD);
writel             78 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGMOD);
writel             93 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGDRI_U);
writel             98 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGDRI_L);
writel            108 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_QTBL);
writel            119 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_HTBL);
writel            130 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_HTBL);
writel            140 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGY_U);
writel            145 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGY_L);
writel            155 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGX_U);
writel            160 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGX_L);
writel            171 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGINTSE);
writel            182 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGINTSE);
writel            193 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPGINTSE);
writel            208 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_TIMER_SE);
writel            219 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_ENC_STREAM_INTSE);
writel            234 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_ENC_STREAM_INTSE);
writel            249 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_OUTFORM);
writel            254 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(addr, regs + S5P_JPG_JPGADR);
writel            259 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(addr, regs + S5P_JPG_IMGADR);
writel            270 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(reg, regs + S5P_JPG_COEF(i));
writel            275 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(1, regs + S5P_JSTART);
writel            293 drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c 	writel(S5P_INT_RELEASE, regs + S5P_JPGCOM);
writel            102 drivers/media/platform/s5p-mfc/s5p_mfc_common.h #define mfc_write(dev, data, offset)	writel((data), dev->regs_base + \
writel            502 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(strm_size, mfc_regs->d_stream_data_size);
writel            503 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(buf_addr, mfc_regs->d_cpb_buffer_addr);
writel            504 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(buf_size->cpb, mfc_regs->d_cpb_buffer_size);
writel            505 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(start_num_byte, mfc_regs->d_cpb_buffer_offset);
writel            529 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->total_dpb_count, mfc_regs->d_num_dpb);
writel            530 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->luma_size, mfc_regs->d_first_plane_dpb_size);
writel            531 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->chroma_size, mfc_regs->d_second_plane_dpb_size);
writel            533 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(buf_addr1, mfc_regs->d_scratch_buffer_addr);
writel            534 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size);
writel            537 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->img_width,
writel            539 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->img_width,
writel            549 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->mv_size, mfc_regs->d_mv_buffer_size);
writel            550 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->mv_count, mfc_regs->d_num_mv);
writel            563 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->dst_bufs[i].cookie.raw.luma,
writel            567 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->dst_bufs[i].cookie.raw.chroma,
writel            582 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(buf_addr1, mfc_regs->d_mv_buffer + i * 4);
writel            588 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(buf_addr1, mfc_regs->d_static_buffer_addr);
writel            589 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(DEC_VP9_STATIC_BUFFER_SIZE,
writel            602 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->inst_no, mfc_regs->instance_id);
writel            617 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(addr, mfc_regs->e_stream_buffer_addr); /* 16B align */
writel            618 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(size, mfc_regs->e_stream_buffer_size);
writel            632 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(y_addr, mfc_regs->e_source_first_plane_addr);
writel            633 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(c_addr, mfc_regs->e_source_second_plane_addr);
writel            674 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
writel            679 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
writel            684 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
writel            690 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
writel            692 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
writel            694 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
writel            701 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
writel            702 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->scratch_buf_size, mfc_regs->e_scratch_buffer_size);
writel            706 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(buf_addr1, mfc_regs->e_tmv_buffer0);
writel            708 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(buf_addr1, mfc_regs->e_tmv_buffer1);
writel            719 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->inst_no, mfc_regs->instance_id);
writel            735 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->slice_mode, mfc_regs->e_mslice_mode);
writel            737 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->slice_size.mb, mfc_regs->e_mslice_size_mb);
writel            740 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->slice_size.bits, mfc_regs->e_mslice_size_bits);
writel            742 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0x0, mfc_regs->e_mslice_size_mb);
writel            743 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0x0, mfc_regs->e_mslice_size_bits);
writel            759 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->img_width, mfc_regs->e_frame_width); /* 16 align */
writel            761 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->img_height, mfc_regs->e_frame_height); /* 16 align */
writel            764 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->img_width, mfc_regs->e_cropped_frame_width);
writel            766 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->img_height, mfc_regs->e_cropped_frame_height);
writel            768 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_frame_crop_offset);
writel            773 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_gop_config);
writel            781 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_enc_options);
writel            785 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_enc_options);
writel            789 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_enc_options);
writel            795 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(p->intra_refresh_mb, mfc_regs->e_ir_size);
writel            801 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_enc_options);
writel            806 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_enc_options);
writel            813 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_enc_options);
writel            815 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0x0, mfc_regs->pixel_format);
writel            820 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_enc_options);
writel            822 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0x1, mfc_regs->pixel_format);
writel            827 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_enc_options);
writel            829 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0x0, mfc_regs->pixel_format);
writel            836 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_enc_options);
writel            839 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_padding_ctrl);
writel            850 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_padding_ctrl);
writel            857 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel            861 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(p->rc_bitrate,
writel            864 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(1, mfc_regs->e_rc_bit_rate);
writel            869 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(1, mfc_regs->e_rc_mode);
writel            871 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(2, mfc_regs->e_rc_mode);
writel            882 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_enc_options);
writel            887 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel            891 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_mv_hor_range);
writel            894 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_mv_ver_range);
writel            896 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_frame_insertion);
writel            897 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_roi_buffer_addr);
writel            898 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_param_change);
writel            899 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_rc_roi_ctrl);
writel            900 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_picture_tag);
writel            902 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_bit_count_enable);
writel            903 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_max_bit_count);
writel            904 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_min_bit_count);
writel            906 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_metadata_buffer_addr);
writel            907 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_metadata_buffer_size);
writel            931 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_gop_config);
writel            939 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_picture_profile);
writel            946 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel            951 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel            959 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_qp_bound);
writel            962 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_fixed_picture_qp);
writel            968 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_fixed_picture_qp);
writel            976 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_rc_frame_rate);
writel            982 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(p_h264->cpb_size & 0xFFFF,
writel            986 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
writel            992 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel            996 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->img_height >> 1,
writel            999 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->img_height >> 1,
writel           1007 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1017 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_lf_alpha_offset);
writel           1027 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_lf_beta_offset);
writel           1033 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1039 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1045 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1048 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_mb_rc_config);
writel           1059 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_mb_rc_config);
writel           1066 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1068 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_aspect_ratio);
writel           1069 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_extended_sar);
writel           1074 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_aspect_ratio);
writel           1080 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(reg, mfc_regs->e_extended_sar);
writel           1089 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1092 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_h264_i_period);
writel           1096 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_h264_i_period);
writel           1102 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1107 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1113 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1119 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1124 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_h264_num_t_layer);
writel           1128 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p_h264->hier_qp_layer_qp[i],
writel           1134 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_num_t_layer);
writel           1140 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_h264_options);
writel           1147 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_h264_frame_packing_sei_info);
writel           1156 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 				writel(p_h264->fmo_run_len[i] - 1,
writel           1168 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p_h264->fmo_chg_dir & 0x1,
writel           1171 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p_h264->fmo_chg_rate,
writel           1182 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(p_h264->fmo_map_type,
writel           1184 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(p_h264->fmo_slice_grp - 1,
writel           1187 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0, mfc_regs->e_h264_fmo_num_slice_grp_minus1);
writel           1211 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_gop_config);
writel           1219 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_picture_profile);
writel           1226 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1231 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1239 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_qp_bound);
writel           1242 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_fixed_picture_qp);
writel           1248 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_fixed_picture_qp);
writel           1256 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_rc_frame_rate);
writel           1262 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size);
writel           1265 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
writel           1269 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_mpeg4_options);
writel           1270 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_mpeg4_hec_period);
writel           1293 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_picture_profile);
writel           1300 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1305 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1313 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_qp_bound);
writel           1316 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_fixed_picture_qp);
writel           1322 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_fixed_picture_qp);
writel           1330 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_rc_frame_rate);
writel           1336 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size);
writel           1339 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
writel           1364 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_gop_config);
writel           1368 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_picture_profile);
writel           1375 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1382 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_rc_frame_rate);
writel           1388 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1391 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_fixed_picture_qp);
writel           1396 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_fixed_picture_qp);
writel           1403 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_qp_bound);
writel           1408 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size);
writel           1411 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
writel           1433 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_vp8_options);
writel           1458 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_gop_config);
writel           1476 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_picture_profile);
writel           1513 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_hevc_options);
writel           1518 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_hevc_refresh_period);
writel           1524 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
writel           1527 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
writel           1534 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_num_t_layer);
writel           1538 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 				writel(p_hevc->hier_qp_layer[i],
writel           1543 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 				writel(p_hevc->hier_bit_layer[i],
writel           1554 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1558 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_config);
writel           1567 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_rc_frame_rate);
writel           1578 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(reg, mfc_regs->e_rc_qp_bound);
writel           1580 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0x0, mfc_regs->e_fixed_picture_qp);
writel           1589 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->e_fixed_picture_qp);
writel           1617 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->display_delay, mfc_regs->d_display_delay);
writel           1621 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->d_dec_options);
writel           1636 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->d_init_buffer_options);
writel           1638 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(reg, mfc_regs->d_dec_options);
writel           1642 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0x1, mfc_regs->pixel_format);
writel           1644 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(0x0, mfc_regs->pixel_format);
writel           1648 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->sei_fp_parse & 0x1, mfc_regs->d_sei_enable);
writel           1650 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->inst_no, mfc_regs->instance_id);
writel           1665 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->inst_no, mfc_regs->instance_id);
writel           1678 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->dec_dst_flag, mfc_regs->d_available_dpb_flag_lower);
writel           1679 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->slice_interface & 0x1, mfc_regs->d_slice_if_enable);
writel           1681 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->inst_no, mfc_regs->instance_id);
writel           1725 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->img_width, mfc_regs->e_source_first_plane_stride);
writel           1726 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 		writel(ctx->img_width, mfc_regs->e_source_second_plane_stride);
writel           1729 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->inst_no, mfc_regs->instance_id);
writel           1746 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 			writel(p_h264->aso_slice_order[i],
writel           1774 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(ctx->inst_no, mfc_regs->instance_id);
writel           2082 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0, mfc_regs->risc2host_command);
writel           2083 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 	writel(0, mfc_regs->risc2host_int);
writel            374 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(0, bdisp->regs + BLT_ITM0);
writel            377 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(readl(bdisp->regs + BLT_CTL) | BLT_CTL_RESET,
writel            379 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(0, bdisp->regs + BLT_CTL);
writel            411 drivers/media/platform/sti/bdisp/bdisp-hw.c 		writel(its, bdisp->regs + BLT_ITS);
writel            416 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(its, bdisp->regs + BLT_ITS);
writel            417 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(0, bdisp->regs + BLT_ITM0);
writel           1104 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(BLT_AQ1_CTL_CFG, bdisp->regs + BLT_AQ1_CTL);
writel           1105 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(BLT_ITS_AQ1_LNA, bdisp->regs + BLT_ITM0);
writel           1108 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(ctx->node_paddr[0], bdisp->regs + BLT_AQ1_IP);
writel           1115 drivers/media/platform/sti/bdisp/bdisp-hw.c 	writel(ctx->node_paddr[node_id], bdisp->regs + BLT_AQ1_LNA);
writel            128 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->back_buffer_busaddr, channel->irec +
writel            131 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(wp, channel->irec + DMA_PRDS_BUSRP_TP(0));
writel            186 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(tmp, fei->io + C8SECTPFE_IB_PID_SET(channel->tsin_id));
writel            215 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->fifo,
writel            217 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->fifo + FIFO_LEN - 1,
writel            220 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->fifo,
writel            222 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->fifo,
writel            227 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->back_buffer_busaddr, channel->irec +
writel            231 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(tmp, channel->irec + DMA_PRDS_BUSTOP_TP(0));
writel            233 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->back_buffer_busaddr, channel->irec +
writel            237 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(C8SECTPFE_SYS_ENABLE | C8SECTPFE_SYS_RESET
writel            241 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(0x1, channel->irec + DMA_PRDS_TPENABLE);
writel            282 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(tmp, fei->io + C8SECTPFE_IB_PID_SET(channel->tsin_id));
writel            300 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(0, fei->io + C8SECTPFE_IB_SYS(channel->tsin_id));
writel            303 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(0,  channel->irec + DMA_PRDS_TPENABLE);
writel            309 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(idlereq, fei->io + DMA_IDLE_REQ);
writel            324 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->back_buffer_busaddr,
writel            328 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(tmp, channel->irec + DMA_PRDS_BUSTOP_TP(0));
writel            330 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(channel->back_buffer_busaddr,
writel            420 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(0, fei->io + DMA_IDLE_REQ);
writel            553 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tmp, fei->io + SYS_INPUT_CLKEN);
writel            566 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tmp, fei->io + C8SECTPFE_IB_IP_FMT_CFG(tsin->tsin_id));
writel            568 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(C8SECTPFE_SYNC(0x9) |
writel            573 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(TS_PKT_SIZE, fei->io + C8SECTPFE_IB_PKT_LEN(tsin->tsin_id));
writel            579 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->fifo, fei->io + C8SECTPFE_IB_BUFF_STRT(tsin->tsin_id));
writel            580 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->fifo + FIFO_LEN - 1,
writel            583 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->fifo, fei->io + C8SECTPFE_IB_READ_PNT(tsin->tsin_id));
writel            584 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->fifo, fei->io + C8SECTPFE_IB_WRT_PNT(tsin->tsin_id));
writel            586 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->pid_buffer_busaddr,
writel            604 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tmp, fei->io + C8SECTPFE_IB_PID_SET(tsin->tsin_id));
writel            622 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->fifo, tsin->irec + DMA_PRDS_MEMBASE);
writel            624 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->fifo + FIFO_LEN - 1, tsin->irec + DMA_PRDS_MEMTOP);
writel            626 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel((188 + 7)&~7, tsin->irec + DMA_PRDS_PKTSIZE);
writel            628 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(0x1, tsin->irec + DMA_PRDS_TPENABLE);
writel            632 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSBASE_TP(0));
writel            635 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tmp, tsin->irec + DMA_PRDS_BUSTOP_TP(0));
writel            637 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSWP_TP(0));
writel            638 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSRP_TP(0));
writel            718 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(0, fei->io + SYS_INPUT_CLKEN);
writel            721 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(MEMDMAENABLE, fei->io + SYS_OTHER_CLKEN);
writel            909 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(0x0,  fei->io + DMA_CPU_RUN);
writel            913 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(0, fei->io + SYS_INPUT_CLKEN);
writel            916 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 		writel(0, fei->io + SYS_OTHER_CLKEN);
writel           1172 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(0x1, fei->io + DMA_PER_STBUS_SYNC);
writel           1175 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c 	writel(0x1,  fei->io + DMA_CPU_RUN);
writel            141 drivers/media/platform/sti/cec/stih-cec.c 		writel(cec_clk_div, cec->regs + CEC_CLK_DIV);
writel            144 drivers/media/platform/sti/cec/stih-cec.c 		writel(CEC_SBIT_TOUT_47MS | (CEC_DBIT_TOUT_28MS << 4),
writel            148 drivers/media/platform/sti/cec/stih-cec.c 		writel(CEC_BIT_LPULSE_03MS | CEC_BIT_HPULSE_03MS,
writel            152 drivers/media/platform/sti/cec/stih-cec.c 		writel(BIT(5) | BIT(7), cec->regs + CEC_TX_CTRL);
writel            155 drivers/media/platform/sti/cec/stih-cec.c 		writel(CEC_TX_ARRAY_EN | CEC_RX_ARRAY_EN | CEC_TX_STOP_ON_NACK,
writel            159 drivers/media/platform/sti/cec/stih-cec.c 		writel(CEC_IN_FILTER_EN | CEC_EN | CEC_RX_RESET_EN,
writel            163 drivers/media/platform/sti/cec/stih-cec.c 		writel(0, cec->regs + CEC_ADDR_TABLE);
writel            166 drivers/media/platform/sti/cec/stih-cec.c 		writel(0x0, cec->regs + CEC_STATUS);
writel            169 drivers/media/platform/sti/cec/stih-cec.c 		writel(CEC_TX_DONE_IRQ_EN | CEC_RX_DONE_IRQ_EN |
writel            176 drivers/media/platform/sti/cec/stih-cec.c 		writel(0, cec->regs + CEC_ADDR_TABLE);
writel            179 drivers/media/platform/sti/cec/stih-cec.c 		writel(0x0, cec->regs + CEC_STATUS);
writel            182 drivers/media/platform/sti/cec/stih-cec.c 		writel(0, cec->regs + CEC_IRQ_CTRL);
writel            198 drivers/media/platform/sti/cec/stih-cec.c 	writel(reg, cec->regs + CEC_ADDR_TABLE);
writel            217 drivers/media/platform/sti/cec/stih-cec.c 	writel(CEC_TX_AUTO_SOM_EN | CEC_TX_AUTO_EOM_EN | CEC_TX_START |
writel            288 drivers/media/platform/sti/cec/stih-cec.c 	writel(cec->irq_status, cec->regs + CEC_STATUS);
writel            299 drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c 	writel(1, csi->regs + CSI_EN_REG);
writel             38 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(CSI_CPT_CTRL_VIDEO_START, csi->regs + CSI_CPT_CTRL_REG);
writel             43 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(0, csi->regs + CSI_CPT_CTRL_REG);
writel            103 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 		writel(addr, csi->regs + CSI_BUF_ADDR_REG(plane, slot));
writel            138 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 		writel(buf_addr, csi->regs + CSI_BUF_ADDR_REG(plane, slot));
writel            276 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(CSI_WIN_CTRL_W_ACTIVE(csi->fmt.width * 2),
writel            278 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(CSI_WIN_CTRL_H_ACTIVE(csi->fmt.height),
writel            292 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(CSI_CFG_INPUT_FMT(csi_fmt->input) |
writel            300 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(csi->fmt.plane_fmt[0].bytesperline,
writel            311 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(CSI_BUF_CTRL_DBE, csi->regs + CSI_BUF_CTRL_REG);
writel            314 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(CSI_INT_FRM_DONE, csi->regs + 0x34);
writel            317 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(CSI_INT_FRM_DONE, csi->regs + CSI_INT_EN_REG);
writel            386 drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c 	writel(reg, csi->regs + CSI_INT_STA_REG);
writel             59 drivers/media/platform/tegra-cec/tegra_cec.c 	writel(val, cec->cec_base + reg);
writel             76 drivers/media/rc/meson-ir.c 	writel(data, ir->reg + reg);
writel            116 drivers/media/rc/st_rc.c 			writel(IRB_RX_OVERRUN_INT,
writel            153 drivers/media/rc/st_rc.c 	writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_CLEAR);
writel            173 drivers/media/rc/st_rc.c 	writel(1, dev->rx_base + IRB_RX_POLARITY_INV);
writel            176 drivers/media/rc/st_rc.c 	writel(rx_sampling_freq_div, dev->base + IRB_SAMPLE_RATE_COMM);
writel            186 drivers/media/rc/st_rc.c 	writel(rx_max_symbol_per, dev->rx_base + IRB_MAX_SYM_PERIOD);
writel            206 drivers/media/rc/st_rc.c 	writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_EN);
writel            207 drivers/media/rc/st_rc.c 	writel(0x01, dev->rx_base + IRB_RX_EN);
writel            217 drivers/media/rc/st_rc.c 	writel(0x00, dev->rx_base + IRB_RX_EN);
writel            218 drivers/media/rc/st_rc.c 	writel(0x00, dev->rx_base + IRB_RX_INT_EN);
writel            351 drivers/media/rc/st_rc.c 		writel(0x00, rc_dev->rx_base + IRB_RX_EN);
writel            352 drivers/media/rc/st_rc.c 		writel(0x00, rc_dev->rx_base + IRB_RX_INT_EN);
writel            372 drivers/media/rc/st_rc.c 			writel(IRB_RX_INTS, rc_dev->rx_base + IRB_RX_INT_EN);
writel            373 drivers/media/rc/st_rc.c 			writel(0x01, rc_dev->rx_base + IRB_RX_EN);
writel            117 drivers/media/rc/sunxi-cir.c 	writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
writel            270 drivers/media/rc/sunxi-cir.c 	writel(REG_CTL_MD, ir->base+SUNXI_IR_CTL_REG);
writel            273 drivers/media/rc/sunxi-cir.c 	writel(REG_CIR_NTHR(SUNXI_IR_RXNOISE)|REG_CIR_ITHR(SUNXI_IR_RXIDLE),
writel            277 drivers/media/rc/sunxi-cir.c 	writel(REG_RXCTL_RPPI, ir->base + SUNXI_IR_RXCTL_REG);
writel            280 drivers/media/rc/sunxi-cir.c 	writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
writel            286 drivers/media/rc/sunxi-cir.c 	writel(REG_RXINT_ROI_EN | REG_RXINT_RPEI_EN |
writel            292 drivers/media/rc/sunxi-cir.c 	writel(tmp | REG_CTL_GEN | REG_CTL_RXEN, ir->base + SUNXI_IR_CTL_REG);
writel            320 drivers/media/rc/sunxi-cir.c 	writel(0, ir->base + SUNXI_IR_RXINT_REG);
writel            322 drivers/media/rc/sunxi-cir.c 	writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
writel            324 drivers/media/rc/sunxi-cir.c 	writel(0, ir->base + SUNXI_IR_CTL_REG);
writel             45 drivers/media/rc/zx-irdec.c 	writel(data, irdec->base + reg);
writel             57 drivers/media/rc/zx-irdec.c 	writel(1, irdec->base + ZX_IR_INTSTCLR);
writel            142 drivers/media/rc/zx-irdec.c 	writel(1, irdec->base + ZX_IR_INTEN);
writel            158 drivers/media/rc/zx-irdec.c 	writel(0, irdec->base + ZX_IR_INTEN);
writel            148 drivers/memory/da8xx-ddrctl.c 		writel(reg, ddrctl + knob->reg);
writel            296 drivers/memory/emif.c 	writel(temp, base + EMIF_POWER_MANAGEMENT_CONTROL);
writel            844 drivers/memory/emif.c 	writel(DDR_MR4, base + EMIF_LPDDR2_MODE_REG_CONFIG);
writel            850 drivers/memory/emif.c 		writel(DDR_MR4 | CS_MASK, base + EMIF_LPDDR2_MODE_REG_CONFIG);
writel            874 drivers/memory/emif.c 	writel(regs->sdram_tim2_shdw, base + EMIF_SDRAM_TIMING_2_SHDW);
writel            875 drivers/memory/emif.c 	writel(regs->phy_ctrl_1_shdw, base + EMIF_DDR_PHY_CTRL_1_SHDW);
writel            876 drivers/memory/emif.c 	writel(regs->pwr_mgmt_ctrl_shdw,
writel            882 drivers/memory/emif.c 	writel(regs->ext_phy_ctrl_2_shdw, base + EMIF_EXT_PHY_CTRL_2_SHDW);
writel            883 drivers/memory/emif.c 	writel(regs->ext_phy_ctrl_3_shdw, base + EMIF_EXT_PHY_CTRL_3_SHDW);
writel            884 drivers/memory/emif.c 	writel(regs->ext_phy_ctrl_4_shdw, base + EMIF_EXT_PHY_CTRL_4_SHDW);
writel            908 drivers/memory/emif.c 	writel(calib_ctrl, base + EMIF_DLL_CALIB_CTRL_SHDW);
writel            946 drivers/memory/emif.c 	writel(tim1, base + EMIF_SDRAM_TIMING_1_SHDW);
writel            947 drivers/memory/emif.c 	writel(tim3, base + EMIF_SDRAM_TIMING_3_SHDW);
writel            948 drivers/memory/emif.c 	writel(ref_ctrl, base + EMIF_SDRAM_REFRESH_CTRL_SHDW);
writel           1020 drivers/memory/emif.c 	writel(interrupts, base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);
writel           1036 drivers/memory/emif.c 		writel(interrupts, base + EMIF_LL_OCP_INTERRUPT_STATUS);
writel           1081 drivers/memory/emif.c 	writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS),
writel           1084 drivers/memory/emif.c 		writel(readl(base + EMIF_LL_OCP_INTERRUPT_STATUS),
writel           1093 drivers/memory/emif.c 	writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET),
writel           1096 drivers/memory/emif.c 		writel(readl(base + EMIF_LL_OCP_INTERRUPT_ENABLE_SET),
writel           1116 drivers/memory/emif.c 	writel(interrupts, base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET);
writel           1122 drivers/memory/emif.c 		writel(interrupts, base + EMIF_LL_OCP_INTERRUPT_ENABLE_SET);
writel           1152 drivers/memory/emif.c 	writel(pwr_mgmt_ctrl, base + EMIF_POWER_MANAGEMENT_CONTROL);
writel           1157 drivers/memory/emif.c 	writel(zq, base + EMIF_SDRAM_OUTPUT_IMPEDANCE_CALIBRATION_CONFIG);
writel           1168 drivers/memory/emif.c 	writel(temp_alert_cfg, base + EMIF_TEMPERATURE_ALERT_CONFIG);
writel           1176 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_1_VAL, base + EMIF_EXT_PHY_CTRL_1_SHDW);
writel           1177 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_5_VAL, base + EMIF_EXT_PHY_CTRL_5_SHDW);
writel           1178 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_6_VAL, base + EMIF_EXT_PHY_CTRL_6_SHDW);
writel           1179 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_7_VAL, base + EMIF_EXT_PHY_CTRL_7_SHDW);
writel           1180 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_8_VAL, base + EMIF_EXT_PHY_CTRL_8_SHDW);
writel           1181 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_9_VAL, base + EMIF_EXT_PHY_CTRL_9_SHDW);
writel           1182 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_10_VAL, base + EMIF_EXT_PHY_CTRL_10_SHDW);
writel           1183 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_11_VAL, base + EMIF_EXT_PHY_CTRL_11_SHDW);
writel           1184 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_12_VAL, base + EMIF_EXT_PHY_CTRL_12_SHDW);
writel           1185 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_13_VAL, base + EMIF_EXT_PHY_CTRL_13_SHDW);
writel           1186 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_14_VAL, base + EMIF_EXT_PHY_CTRL_14_SHDW);
writel           1187 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_15_VAL, base + EMIF_EXT_PHY_CTRL_15_SHDW);
writel           1188 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_16_VAL, base + EMIF_EXT_PHY_CTRL_16_SHDW);
writel           1189 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_17_VAL, base + EMIF_EXT_PHY_CTRL_17_SHDW);
writel           1190 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_18_VAL, base + EMIF_EXT_PHY_CTRL_18_SHDW);
writel           1191 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_19_VAL, base + EMIF_EXT_PHY_CTRL_19_SHDW);
writel           1192 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_20_VAL, base + EMIF_EXT_PHY_CTRL_20_SHDW);
writel           1193 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_21_VAL, base + EMIF_EXT_PHY_CTRL_21_SHDW);
writel           1194 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_22_VAL, base + EMIF_EXT_PHY_CTRL_22_SHDW);
writel           1195 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_23_VAL, base + EMIF_EXT_PHY_CTRL_23_SHDW);
writel           1196 drivers/memory/emif.c 	writel(EMIF_EXT_PHY_CTRL_24_VAL, base + EMIF_EXT_PHY_CTRL_24_SHDW);
writel            110 drivers/memory/jz4780-nemc.c 	writel(nfcsr, nemc->base + NEMC_NFCSR);
writel            135 drivers/memory/jz4780-nemc.c 	writel(nfcsr, nemc->base + NEMC_NFCSR);
writel            264 drivers/memory/jz4780-nemc.c 	writel(smcr, nemc->base + NEMC_SMCRn(bank));
writel            297 drivers/memory/jz4780-nemc.c 	writel(0, nemc->base + NEMC_NFCSR);
writel            171 drivers/memory/mtk-smi.c 		writel(reg, larb->base + SMI_LARB_NONSEC_CON(i));
writel            179 drivers/memory/mtk-smi.c 	writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
writel            207 drivers/memory/mtk-smi.c 		writel(reg_val,
writel            498 drivers/memory/mtk-smi.c 		writel(bus_sel, common->base + SMI_BUS_SEL);
writel            225 drivers/memory/mvebu-devbus.c 	writel(value, devbus->base);
writel            248 drivers/memory/mvebu-devbus.c 	writel(value, devbus->base + ARMADA_READ_PARAM_OFFSET);
writel            260 drivers/memory/mvebu-devbus.c 	writel(value, devbus->base + ARMADA_WRITE_PARAM_OFFSET);
writel             76 drivers/memory/pl172.c 		writel(cycles, pl172->base + reg_offset);
writel            128 drivers/memory/pl172.c 	writel(cfg, pl172->base + MPMC_STATIC_CFG(cs));
writel            104 drivers/memory/pl353-smc.c 	writel(bw, pl353_smc_base + PL353_SMC_SET_OPMODE_OFFS);
writel            105 drivers/memory/pl353-smc.c 	writel(PL353_SMC_DC_UPT_NAND_REGS, pl353_smc_base +
writel            141 drivers/memory/pl353-smc.c 	writel(timings[0], pl353_smc_base + PL353_SMC_SET_CYCLES_OFFS);
writel            142 drivers/memory/pl353-smc.c 	writel(PL353_SMC_DC_UPT_NAND_REGS, pl353_smc_base +
writel            199 drivers/memory/pl353-smc.c 	writel(PL353_SMC_CFG_CLR_INT_CLR_1,
writel            222 drivers/memory/pl353-smc.c 		writel(reg, pl353_smc_base + PL353_SMC_ECC_MEMCFG_OFFS);
writel            262 drivers/memory/pl353-smc.c 	writel(reg, pl353_smc_base + PL353_SMC_ECC_MEMCFG_OFFS);
writel            315 drivers/memory/pl353-smc.c 	writel(PL353_SMC_CFG_CLR_INT_CLR_1,
writel            317 drivers/memory/pl353-smc.c 	writel(PL353_SMC_DC_UPT_NAND_REGS, pl353_smc_base +
writel            332 drivers/memory/pl353-smc.c 	writel(PL353_NAND_ECC_CMD1,
writel            334 drivers/memory/pl353-smc.c 	writel(PL353_NAND_ECC_CMD2,
writel            397 drivers/memory/pl353-smc.c 	writel(PL353_SMC_CFG_CLR_DEFAULT_MASK,
writel            172 drivers/memory/samsung/exynos-srom.c 		writel(rd->value, base + rd->offset);
writel            483 drivers/memory/tegra/tegra124-emc.c 	writel(value, emc->regs + EMC_CCFIFO_DATA);
writel            484 drivers/memory/tegra/tegra124-emc.c 	writel(offset, emc->regs + EMC_CCFIFO_ADDR);
writel            492 drivers/memory/tegra/tegra124-emc.c 	writel(1, emc->regs + EMC_TIMING_CONTROL);
writel            509 drivers/memory/tegra/tegra124-emc.c 	writel(0, emc->regs + EMC_AUTO_CAL_INTERVAL);
writel            579 drivers/memory/tegra/tegra124-emc.c 	writel(EMC_INTSTATUS_CLKCHANGE_COMPLETE, emc->regs + EMC_INTSTATUS);
writel            585 drivers/memory/tegra/tegra124-emc.c 		writel(val, emc->regs + EMC_CFG);
writel            599 drivers/memory/tegra/tegra124-emc.c 		writel(val, emc->regs + EMC_SEL_DPD_CTRL);
writel            618 drivers/memory/tegra/tegra124-emc.c 		writel(val2, emc->regs + EMC_BGBIAS_CTL0);
writel            638 drivers/memory/tegra/tegra124-emc.c 		writel(val, emc->regs + EMC_XM2DQSPADCTRL2);
writel            652 drivers/memory/tegra/tegra124-emc.c 		writel(timing->emc_ctt_term_ctrl,
writel            659 drivers/memory/tegra/tegra124-emc.c 		writel(timing->emc_burst_data[i],
writel            662 drivers/memory/tegra/tegra124-emc.c 	writel(timing->emc_xm2dqspadctrl2, emc->regs + EMC_XM2DQSPADCTRL2);
writel            663 drivers/memory/tegra/tegra124-emc.c 	writel(timing->emc_zcal_interval, emc->regs + EMC_ZCAL_INTERVAL);
writel            705 drivers/memory/tegra/tegra124-emc.c 		writel(val, emc->regs + EMC_MRS_WAIT_CNT);
writel            800 drivers/memory/tegra/tegra124-emc.c 		writel(timing->emc_auto_cal_interval,
writel            805 drivers/memory/tegra/tegra124-emc.c 		writel(timing->emc_cfg, emc->regs + EMC_CFG);
writel            808 drivers/memory/tegra/tegra124-emc.c 	writel(timing->emc_zcal_cnt_long, emc->regs + EMC_ZCAL_WAIT_CNT);
writel            817 drivers/memory/tegra/tegra124-emc.c 		writel(val, emc->regs + EMC_BGBIAS_CTL0);
writel            822 drivers/memory/tegra/tegra124-emc.c 			writel(timing->emc_bgbias_ctl0,
writel            826 drivers/memory/tegra/tegra124-emc.c 		writel(timing->emc_auto_cal_interval,
writel            834 drivers/memory/tegra/tegra124-emc.c 	writel(timing->emc_sel_dpd_ctrl, emc->regs + EMC_SEL_DPD_CTRL);
writel            565 drivers/memory/tegra/tegra186.c 		writel(client->sid, mc->regs + client->regs.override);
writel            212 drivers/memory/ti-aemif.c 	writel(val, aemif->base + offset);
writel            185 drivers/memory/ti-emif-pm.c 	writel(EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES,
writel            189 drivers/memory/ti-emif-pm.c 	writel(EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES,
writel            234 drivers/memstick/host/jmb38x_ms.c 		writel(host->io_word[0], host->addr + DATA);
writel            356 drivers/memstick/host/jmb38x_ms.c 			writel(host->io_word[0], host->addr + TPC_P0);
writel            357 drivers/memstick/host/jmb38x_ms.c 			writel(host->io_word[1], host->addr + TPC_P1);
writel            359 drivers/memstick/host/jmb38x_ms.c 			writel(host->io_word[0], host->addr + DATA);
writel            426 drivers/memstick/host/jmb38x_ms.c 		writel(sg_dma_address(&host->req->sg),
writel            428 drivers/memstick/host/jmb38x_ms.c 		writel(((1 << 16) & BLOCK_COUNT_MASK)
writel            431 drivers/memstick/host/jmb38x_ms.c 		writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL);
writel            433 drivers/memstick/host/jmb38x_ms.c 		writel(((1 << 16) & BLOCK_COUNT_MASK)
writel            441 drivers/memstick/host/jmb38x_ms.c 			writel(t_val, host->addr + INT_STATUS_ENABLE);
writel            442 drivers/memstick/host/jmb38x_ms.c 			writel(t_val, host->addr + INT_SIGNAL_ENABLE);
writel            450 drivers/memstick/host/jmb38x_ms.c 			writel(host->io_word[0], host->addr + TPC_P0);
writel            451 drivers/memstick/host/jmb38x_ms.c 			writel(host->io_word[1], host->addr + TPC_P1);
writel            456 drivers/memstick/host/jmb38x_ms.c 	writel(HOST_CONTROL_LED | readl(host->addr + HOST_CONTROL),
writel            460 drivers/memstick/host/jmb38x_ms.c 	writel(cmd, host->addr + TPC);
writel            482 drivers/memstick/host/jmb38x_ms.c 	writel(0, host->addr + BLOCK);
writel            483 drivers/memstick/host/jmb38x_ms.c 	writel(0, host->addr + DMA_CONTROL);
writel            496 drivers/memstick/host/jmb38x_ms.c 		writel(t_val, host->addr + INT_STATUS_ENABLE);
writel            497 drivers/memstick/host/jmb38x_ms.c 		writel(t_val, host->addr + INT_SIGNAL_ENABLE);
writel            500 drivers/memstick/host/jmb38x_ms.c 	writel((~HOST_CONTROL_LED) & readl(host->addr + HOST_CONTROL),
writel            579 drivers/memstick/host/jmb38x_ms.c 	writel(irq_status, host->addr + INT_STATUS);
writel            639 drivers/memstick/host/jmb38x_ms.c 	writel(HOST_CONTROL_RESET_REQ | HOST_CONTROL_CLOCK_EN
writel            653 drivers/memstick/host/jmb38x_ms.c 	writel(HOST_CONTROL_RESET | HOST_CONTROL_CLOCK_EN
writel            668 drivers/memstick/host/jmb38x_ms.c 	writel(INT_STATUS_ALL, host->addr + INT_SIGNAL_ENABLE);
writel            669 drivers/memstick/host/jmb38x_ms.c 	writel(INT_STATUS_ALL, host->addr + INT_STATUS_ENABLE);
writel            692 drivers/memstick/host/jmb38x_ms.c 			writel(host_ctl, host->addr + HOST_CONTROL);
writel            694 drivers/memstick/host/jmb38x_ms.c 			writel(host->id ? PAD_PU_PD_ON_MS_SOCK1
writel            698 drivers/memstick/host/jmb38x_ms.c 			writel(PAD_OUTPUT_ENABLE_MS,
writel            706 drivers/memstick/host/jmb38x_ms.c 			writel(host_ctl, host->addr +  HOST_CONTROL);
writel            707 drivers/memstick/host/jmb38x_ms.c 			writel(0, host->addr + PAD_OUTPUT_ENABLE);
writel            708 drivers/memstick/host/jmb38x_ms.c 			writel(PAD_PU_PD_OFF, host->addr + PAD_PU_PD);
writel            743 drivers/memstick/host/jmb38x_ms.c 		writel(host_ctl, host->addr + HOST_CONTROL);
writel            744 drivers/memstick/host/jmb38x_ms.c 		writel(CLOCK_CONTROL_OFF, host->addr + CLOCK_CONTROL);
writel            745 drivers/memstick/host/jmb38x_ms.c 		writel(clock_ctl, host->addr + CLOCK_CONTROL);
writel           1002 drivers/memstick/host/jmb38x_ms.c 		writel(0, host->addr + INT_SIGNAL_ENABLE);
writel           1003 drivers/memstick/host/jmb38x_ms.c 		writel(0, host->addr + INT_STATUS_ENABLE);
writel             67 drivers/memstick/host/r592.c 	writel(value, dev->mmio + address);
writel             92 drivers/memstick/host/r592.c 	writel(reg | mask , dev->mmio + address);
writel            102 drivers/memstick/host/r592.c 	writel(reg & ~mask, dev->mmio + address);
writel            138 drivers/memstick/host/tifm_ms.c 		writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
writel            140 drivers/memstick/host/tifm_ms.c 		writel(host->io_word, sock->addr + SOCK_MS_DATA);
writel            153 drivers/memstick/host/tifm_ms.c 		writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
writel            236 drivers/memstick/host/tifm_ms.c 			writel(TIFM_MS_SYS_FDIR
writel            239 drivers/memstick/host/tifm_ms.c 			writel(host->io_word, sock->addr + SOCK_MS_DATA);
writel            241 drivers/memstick/host/tifm_ms.c 		writel(TIFM_MS_SYS_FDIR
writel            244 drivers/memstick/host/tifm_ms.c 		writel(0, sock->addr + SOCK_MS_DATA);
writel            274 drivers/memstick/host/tifm_ms.c 	writel(TIFM_FIFO_INT_SETALL,
writel            276 drivers/memstick/host/tifm_ms.c 	writel(TIFM_FIFO_ENABLE,
writel            289 drivers/memstick/host/tifm_ms.c 		writel(ilog2(data_len) - 2,
writel            291 drivers/memstick/host/tifm_ms.c 		writel(TIFM_FIFO_INTMASK,
writel            297 drivers/memstick/host/tifm_ms.c 		writel(TIFM_FIFO_INTMASK,
writel            300 drivers/memstick/host/tifm_ms.c 		writel(sg_dma_address(&host->req->sg),
writel            302 drivers/memstick/host/tifm_ms.c 		writel(sys_param, sock->addr + SOCK_DMA_CONTROL);
writel            304 drivers/memstick/host/tifm_ms.c 		writel(host->mode_mask | TIFM_MS_SYS_FIFO,
writel            307 drivers/memstick/host/tifm_ms.c 		writel(TIFM_FIFO_MORE,
writel            312 drivers/memstick/host/tifm_ms.c 	writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
writel            324 drivers/memstick/host/tifm_ms.c 	writel(sys_param, sock->addr + SOCK_MS_SYSTEM);
writel            328 drivers/memstick/host/tifm_ms.c 	writel(cmd, sock->addr + SOCK_MS_COMMAND);
writel            346 drivers/memstick/host/tifm_ms.c 	writel(TIFM_FIFO_INT_SETALL,
writel            348 drivers/memstick/host/tifm_ms.c 	writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
writel            357 drivers/memstick/host/tifm_ms.c 	writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
writel            408 drivers/memstick/host/tifm_ms.c 	writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
writel            445 drivers/memstick/host/tifm_ms.c 	writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
writel            506 drivers/memstick/host/tifm_ms.c 			writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM);
writel            507 drivers/memstick/host/tifm_ms.c 			writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
writel            509 drivers/memstick/host/tifm_ms.c 			writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
writel            511 drivers/memstick/host/tifm_ms.c 			writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
writel            513 drivers/memstick/host/tifm_ms.c 			writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
writel            520 drivers/memstick/host/tifm_ms.c 			writel((~TIFM_CTRL_FAST_CLK)
writel            525 drivers/memstick/host/tifm_ms.c 			writel(TIFM_CTRL_FAST_CLK
writel            604 drivers/memstick/host/tifm_ms.c 		writel(TIFM_FIFO_INT_SETALL,
writel            606 drivers/memstick/host/tifm_ms.c 		writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
writel            221 drivers/message/fusion/mptbase.c #define CHIPREG_WRITE32(addr,val) 	writel(val, addr)
writel             77 drivers/mfd/atmel-flexcom.c 	writel(FLEX_MR_OPMODE(ddata->opmode), ddata->base + FLEX_MR);
writel            102 drivers/mfd/atmel-flexcom.c 	writel(val, ddata->base + FLEX_MR);
writel             48 drivers/mfd/atmel-hlcdc.c 	writel(val, hregmap->regs + reg);
writel            584 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_RESET_DSIPLL, PRCM_APE_RESETN_CLR);
writel            586 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_UNCLAMP_DSIPLL, PRCM_MMIP_LS_CLAMP_CLR);
writel            589 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_PLLDSI_FREQ_SETTING, PRCM_PLLDSI_FREQ);
writel            590 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_DSI_PLLOUT_SEL_SETTING, PRCM_DSI_PLLOUT_SEL);
writel            592 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_ENABLE_ESCAPE_CLOCK_DIV, PRCM_DSITVCLK_DIV);
writel            595 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_ENABLE_PLLDSI, PRCM_PLLDSI_ENABLE);
writel            597 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_DSI_RESET_SW, PRCM_DSI_SW_RESET);
writel            605 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_RESET_DSIPLL, PRCM_APE_RESETN_SET);
writel            612 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_DISABLE_PLLDSI, PRCM_PLLDSI_ENABLE);
writel            614 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_DISABLE_ESCAPE_CLOCK_DIV, PRCM_DSITVCLK_DIV);
writel            628 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_DSI_CLOCK_SETTING, prcmu_base + PRCM_HDMICLK_MGT);
writel            629 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_DSI_LP_CLOCK_SETTING, prcmu_base + PRCM_TVCLK_MGT);
writel            630 drivers/mfd/db8500-prcmu.c 	writel(PRCMU_DPI_CLOCK_SETTING, prcmu_base + PRCM_LCDCLK_MGT);
writel            633 drivers/mfd/db8500-prcmu.c 	writel(0, PRCM_SEM);
writel            650 drivers/mfd/db8500-prcmu.c 	writel(value, (prcmu_base + reg));
writel            662 drivers/mfd/db8500-prcmu.c 	writel(val, (prcmu_base + reg));
writel            772 drivers/mfd/db8500-prcmu.c 	writel((bits | (val & ~mask)), PRCM_CLKOCR);
writel            798 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(0), PRCM_MBOX_CPU_SET);
writel            834 drivers/mfd/db8500-prcmu.c 		writel(dbb_events, (tcdm_base + PRCM_REQ_MB0_WAKEUP_8500));
writel            835 drivers/mfd/db8500-prcmu.c 		writel(abb_events, (tcdm_base + PRCM_REQ_MB0_WAKEUP_4500));
writel            837 drivers/mfd/db8500-prcmu.c 		writel(MBOX_BIT(0), PRCM_MBOX_CPU_SET);
writel            909 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(1), PRCM_MBOX_CPU_SET);
writel            977 drivers/mfd/db8500-prcmu.c 		writel(val, prcmu_base + clock_reg[i]);
writel            982 drivers/mfd/db8500-prcmu.c 	writel(0, PRCM_SEM);
writel           1017 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(1), PRCM_MBOX_CPU_SET);
writel           1079 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(1), PRCM_MBOX_CPU_SET);
writel           1109 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(1), PRCM_MBOX_CPU_SET);
writel           1140 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(1), PRCM_MBOX_CPU_SET);
writel           1196 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(2), PRCM_MBOX_CPU_SET);
writel           1254 drivers/mfd/db8500-prcmu.c 	writel(sleep_cfg, (tcdm_base + PRCM_REQ_MB2_AUTO_PM_SLEEP));
writel           1255 drivers/mfd/db8500-prcmu.c 	writel(idle_cfg, (tcdm_base + PRCM_REQ_MB2_AUTO_PM_IDLE));
writel           1289 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(3), PRCM_MBOX_CPU_SET);
writel           1315 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_TCR);
writel           1338 drivers/mfd/db8500-prcmu.c 	writel(val, prcmu_base + clk_mgt[clock].offset);
writel           1341 drivers/mfd/db8500-prcmu.c 	writel(0, PRCM_SEM);
writel           1355 drivers/mfd/db8500-prcmu.c 		writel(val | PRCM_CGATING_BYPASS_ICN2, PRCM_CGATING_BYPASS);
writel           1362 drivers/mfd/db8500-prcmu.c 		writel(val & ~PRCM_CGATING_BYPASS_ICN2, PRCM_CGATING_BYPASS);
writel           1382 drivers/mfd/db8500-prcmu.c 	writel((PRCM_MMIP_LS_CLAMP_DSIPLL_CLAMP |
writel           1391 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_PLLDSI_ENABLE);
writel           1402 drivers/mfd/db8500-prcmu.c 			writel(PRCM_APE_RESETN_DSIPLL_RESETN,
writel           1405 drivers/mfd/db8500-prcmu.c 			writel((PRCM_MMIP_LS_CLAMP_DSIPLL_CLAMP |
writel           1409 drivers/mfd/db8500-prcmu.c 			writel(val, PRCM_PLLDSI_ENABLE);
writel           1413 drivers/mfd/db8500-prcmu.c 		writel(PRCM_APE_RESETN_DSIPLL_RESETN, PRCM_APE_RESETN_CLR);
writel           1426 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_DSI_PLLOUT_SEL);
writel           1436 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_DSITVCLK_DIV);
writel           1864 drivers/mfd/db8500-prcmu.c 	writel(val, prcmu_base + clk_mgt[clock].offset);
writel           1867 drivers/mfd/db8500-prcmu.c 	writel(0, PRCM_SEM);
writel           1944 drivers/mfd/db8500-prcmu.c 	writel(pll_freq, PRCM_PLLDSI_FREQ);
writel           1964 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_DSI_PLLOUT_SEL);
writel           1976 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_DSITVCLK_DIV);
writel           2012 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(4), PRCM_MBOX_CPU_SET);
writel           2030 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(4), PRCM_MBOX_CPU_SET);
writel           2051 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(4), PRCM_MBOX_CPU_SET);
writel           2070 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(4), PRCM_MBOX_CPU_SET);
writel           2108 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(4), PRCM_MBOX_CPU_SET);
writel           2190 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET);
writel           2240 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET);
writel           2295 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_HOSTACCESS_REQ);
writel           2300 drivers/mfd/db8500-prcmu.c 	writel(val, PRCM_HOSTACCESS_REQ);
writel           2327 drivers/mfd/db8500-prcmu.c 	writel((val & ~PRCM_HOSTACCESS_REQ_HOSTACCESS_REQ),
writel           2356 drivers/mfd/db8500-prcmu.c 	writel(1, PRCM_APE_SOFTRST);
writel           2381 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(1), PRCM_MBOX_CPU_SET);
writel           2402 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(0), PRCM_MBOX_CPU_SET);
writel           2447 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(0), PRCM_ARM_IT1_CLR);
writel           2460 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(1), PRCM_ARM_IT1_CLR);
writel           2468 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(2), PRCM_ARM_IT1_CLR);
writel           2475 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(3), PRCM_ARM_IT1_CLR);
writel           2502 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(4), PRCM_ARM_IT1_CLR);
writel           2514 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(5), PRCM_ARM_IT1_CLR);
writel           2521 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(6), PRCM_ARM_IT1_CLR);
writel           2527 drivers/mfd/db8500-prcmu.c 	writel(MBOX_BIT(7), PRCM_ARM_IT1_CLR);
writel           2775 drivers/mfd/db8500-prcmu.c 	writel(val, (PRCM_A9PL_FORCE_CLKEN));
writel           3109 drivers/mfd/db8500-prcmu.c 	writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);
writel            189 drivers/mfd/intel-lpss.c 	writel(ltr, lpss->priv + LPSS_PRIV_ACTIVELTR);
writel            190 drivers/mfd/intel-lpss.c 	writel(ltr, lpss->priv + LPSS_PRIV_IDLELTR);
writel            256 drivers/mfd/intel-lpss.c 	writel(value, lpss->priv + LPSS_PRIV_RESETS);
writel            264 drivers/mfd/intel-lpss.c 	writel(0, lpss->priv + LPSS_PRIV_RESETS);
writel            275 drivers/mfd/intel-lpss.c 		writel(value, lpss->priv + LPSS_PRIV_SSP_REG);
writel            495 drivers/mfd/intel-lpss.c 		writel(0, lpss->priv + LPSS_PRIV_RESETS);
writel            510 drivers/mfd/intel-lpss.c 		writel(lpss->priv_ctx[i], lpss->priv + i * 4);
writel             57 drivers/mfd/ipaq-micro.c 	writel(val, micro->base + UTCR3);
writel            288 drivers/mfd/ipaq-micro.c 		writel(tx->buf[tx->index], micro->base + UTDR);
writel            295 drivers/mfd/ipaq-micro.c 	writel(val, micro->base + UTCR3);
writel            310 drivers/mfd/ipaq-micro.c 	writel(0x01, micro->sdlc + 0x0); /* Select UART mode */
writel            313 drivers/mfd/ipaq-micro.c 	writel(0x0, micro->base + UTCR3);
writel            316 drivers/mfd/ipaq-micro.c 	writel(UTCR0_8BitData | UTCR0_1StpBit, micro->base + UTCR0);
writel            319 drivers/mfd/ipaq-micro.c 	writel(0x0, micro->base + UTCR1);
writel            320 drivers/mfd/ipaq-micro.c 	writel(0x1, micro->base + UTCR2);
writel            323 drivers/mfd/ipaq-micro.c 	writel(0xff, micro->base + UTSR0);
writel            326 drivers/mfd/ipaq-micro.c 	writel(UTCR3_TXE | UTCR3_RXE | UTCR3_RIE, micro->base + UTCR3);
writel            329 drivers/mfd/ipaq-micro.c 	writel(val, micro->base + UTCR3);
writel            343 drivers/mfd/ipaq-micro.c 				writel(UTSR0_RID, micro->base + UTSR0);
writel            349 drivers/mfd/ipaq-micro.c 			writel(status & (UTSR0_RBB | UTSR0_REB),
writel            128 drivers/mfd/mcp-sa11x0.c 	writel(-1, MCSR(m));
writel            267 drivers/mfd/mcp-sa11x0.c 	writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
writel            502 drivers/mfd/qcom_rpm.c 	writel(0, RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
writel            627 drivers/mfd/qcom_rpm.c 	writel(fw_version[0], RPM_CTRL_REG(rpm, 0));
writel            628 drivers/mfd/qcom_rpm.c 	writel(fw_version[1], RPM_CTRL_REG(rpm, 1));
writel            629 drivers/mfd/qcom_rpm.c 	writel(fw_version[2], RPM_CTRL_REG(rpm, 2));
writel             82 drivers/mfd/ssbi.c 	writel(val, ssbi->base + reg);
writel            115 drivers/mfd/sta2x11-mfd.c 		writel(r, regs + reg);
writel             59 drivers/mfd/vexpress-sysreg.c 	writel(~0, base + SYS_FLAGSCLR);
writel             60 drivers/mfd/vexpress-sysreg.c 	writel(data, base + SYS_FLAGSSET);
writel            170 drivers/misc/atmel_tclib.c 		writel(ATMEL_TC_ALL_IRQ, tc->regs + ATMEL_TC_REG(i, IDR));
writel            187 drivers/misc/atmel_tclib.c 		writel(ATMEL_TC_ALL_IRQ, tc->regs + ATMEL_TC_REG(i, IDR));
writel             64 drivers/misc/cardreader/alcor_pci.c 	writel(val, priv->iobase + addr);
writel           1438 drivers/misc/habanalabs/device.c 	writel(val, hdev->rmmio + reg);
writel           4127 drivers/misc/habanalabs/goya/goya.c 		writel(val, hdev->pcie_bar[SRAM_CFG_BAR_ID] +
writel           4138 drivers/misc/habanalabs/goya/goya.c 			writel(val, hdev->pcie_bar[DDR_BAR_ID] +
writel            539 drivers/misc/ibmasm/ibmasmfs.c 	writel(value, address);
writel             54 drivers/misc/ibmasm/lowlevel.h 	writel( readl(ctrl_reg) & ~mask, ctrl_reg);
writel             60 drivers/misc/ibmasm/lowlevel.h 	writel( readl(ctrl_reg) | mask, ctrl_reg);
writel            100 drivers/misc/ibmasm/lowlevel.h 	writel(mfa, base_address + OUTBOUND_QUEUE_PORT);
writel            115 drivers/misc/ibmasm/lowlevel.h 	writel(mfa, base_address + INBOUND_QUEUE_PORT);
writel             84 drivers/misc/ibmasm/remote.h #define clear_mouse_interrupt(sp)	writel(0, mouse_addr(sp) + CONDOR_MOUSE_ISR_STATUS)
writel             85 drivers/misc/ibmasm/remote.h #define enable_mouse_interrupts(sp)	writel(1, mouse_addr(sp) + CONDOR_MOUSE_ISR_CONTROL)
writel             86 drivers/misc/ibmasm/remote.h #define disable_mouse_interrupts(sp)	writel(0, mouse_addr(sp) + CONDOR_MOUSE_ISR_CONTROL)
writel             93 drivers/misc/ibmasm/remote.h #define set_queue_reader(sp, reader)	writel(reader, mouse_addr(sp) + CONDOR_MOUSE_Q_READER)
writel             74 drivers/misc/ocxl/mmio.c 		writel(val, (char *)afu->global_mmio_ptr + offset);
writel            132 drivers/misc/ocxl/mmio.c 		writel(tmp, (char *)afu->global_mmio_ptr + offset);
writel            194 drivers/misc/ocxl/mmio.c 		writel(tmp, (char *)afu->global_mmio_ptr + offset);
writel            124 drivers/misc/pci_endpoint_test.c 	writel(value, test->base + offset);
writel            136 drivers/misc/pci_endpoint_test.c 	writel(value, test->bar[bar] + offset);
writel             50 drivers/misc/tifm_7xx1.c 		writel(TIFM_IRQ_ENABLE, fm->addr + FM_CLEAR_INTERRUPT_ENABLE);
writel             65 drivers/misc/tifm_7xx1.c 	writel(irq_status, fm->addr + FM_INTERRUPT_STATUS);
writel             70 drivers/misc/tifm_7xx1.c 		writel(TIFM_IRQ_ENABLE, fm->addr + FM_SET_INTERRUPT_ENABLE);
writel             83 drivers/misc/tifm_7xx1.c 	writel(0x0e00, sock_addr + SOCK_CONTROL);
writel             97 drivers/misc/tifm_7xx1.c 	writel(readl(sock_addr + SOCK_CONTROL) | TIFM_CTRL_LED,
writel            105 drivers/misc/tifm_7xx1.c 	writel((s_state & TIFM_CTRL_POWER_MASK) | 0x0c00,
writel            117 drivers/misc/tifm_7xx1.c 	writel(readl(sock_addr + SOCK_CONTROL) & (~TIFM_CTRL_LED),
writel            125 drivers/misc/tifm_7xx1.c 	writel((~TIFM_CTRL_POWER_MASK) & readl(sock_addr + SOCK_CONTROL),
writel            171 drivers/misc/tifm_7xx1.c 			writel(0x0e00, sock_addr + SOCK_CONTROL);
writel            198 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_FIFOMASK(socket_change_set)
writel            202 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_FIFOMASK(socket_change_set)
writel            206 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_ENABLE, fm->addr + FM_SET_INTERRUPT_ENABLE);
writel            267 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_ENABLE | TIFM_IRQ_SOCKMASK((1 << fm->num_sockets) - 1),
writel            278 drivers/misc/tifm_7xx1.c 		writel(TIFM_IRQ_FIFOMASK(good_sockets)
writel            281 drivers/misc/tifm_7xx1.c 		writel(TIFM_IRQ_FIFOMASK(good_sockets)
writel            294 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_ENABLE,
writel            373 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_ENABLE | TIFM_IRQ_SOCKMASK((1 << fm->num_sockets) - 1),
writel            375 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_ENABLE | TIFM_IRQ_SOCKMASK((1 << fm->num_sockets) - 1),
writel            401 drivers/misc/tifm_7xx1.c 	writel(TIFM_IRQ_SETALL, fm->addr + FM_CLEAR_INTERRUPT_ENABLE);
writel             74 drivers/misc/vexpress-syscfg.c 	writel(*data, syscfg->base + SYS_CFGDATA);
writel             75 drivers/misc/vexpress-syscfg.c 	writel(0, syscfg->base + SYS_CFGSTAT);
writel             76 drivers/misc/vexpress-syscfg.c 	writel(command, syscfg->base + SYS_CFGCTRL);
writel             54 drivers/mmc/host/android-goldfish.c #define GOLDFISH_MMC_WRITE(host, addr, x)   (writel(x, host->reg_base + addr))
writel            246 drivers/mmc/host/bcm2835.c 	writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD);
writel            247 drivers/mmc/host/bcm2835.c 	writel(0, host->ioaddr + SDCMD);
writel            248 drivers/mmc/host/bcm2835.c 	writel(0, host->ioaddr + SDARG);
writel            249 drivers/mmc/host/bcm2835.c 	writel(0xf00000, host->ioaddr + SDTOUT);
writel            250 drivers/mmc/host/bcm2835.c 	writel(0, host->ioaddr + SDCDIV);
writel            251 drivers/mmc/host/bcm2835.c 	writel(0x7f8, host->ioaddr + SDHSTS); /* Write 1s to clear */
writel            252 drivers/mmc/host/bcm2835.c 	writel(0, host->ioaddr + SDHCFG);
writel            253 drivers/mmc/host/bcm2835.c 	writel(0, host->ioaddr + SDHBCT);
writel            254 drivers/mmc/host/bcm2835.c 	writel(0, host->ioaddr + SDHBLC);
writel            262 drivers/mmc/host/bcm2835.c 	writel(temp, host->ioaddr + SDEDM);
writel            264 drivers/mmc/host/bcm2835.c 	writel(SDVDD_POWER_ON, host->ioaddr + SDVDD);
writel            267 drivers/mmc/host/bcm2835.c 	writel(host->hcfg, host->ioaddr + SDHCFG);
writel            268 drivers/mmc/host/bcm2835.c 	writel(host->cdiv, host->ioaddr + SDCDIV);
writel            303 drivers/mmc/host/bcm2835.c 			writel(edm | SDEDM_FORCE_DATA_MODE,
writel            414 drivers/mmc/host/bcm2835.c 					writel(*(buf++), host->ioaddr + SDDATA);
writel            541 drivers/mmc/host/bcm2835.c 	writel(host->hcfg, host->ioaddr + SDHCFG);
writel            572 drivers/mmc/host/bcm2835.c 	writel(data->blksz, host->ioaddr + SDHBCT);
writel            573 drivers/mmc/host/bcm2835.c 	writel(data->blocks, host->ioaddr + SDHBLC);
writel            652 drivers/mmc/host/bcm2835.c 		writel(sdhsts, host->ioaddr + SDHSTS);
writel            663 drivers/mmc/host/bcm2835.c 	writel(cmd->arg, host->ioaddr + SDARG);
writel            686 drivers/mmc/host/bcm2835.c 	writel(sdcmd | SDCMD_NEW_FLAG, host->ioaddr + SDCMD);
writel            724 drivers/mmc/host/bcm2835.c 	writel(host->hcfg, host->ioaddr + SDHCFG);
writel            761 drivers/mmc/host/bcm2835.c 		writel(SDHSTS_ERROR_MASK, host->ioaddr + SDHSTS);
writel            780 drivers/mmc/host/bcm2835.c 				writel(edm | SDEDM_FORCE_DATA_MODE,
writel            933 drivers/mmc/host/bcm2835.c 		writel(host->hcfg, host->ioaddr + SDHCFG);
writel            945 drivers/mmc/host/bcm2835.c 	writel(host->hcfg, host->ioaddr + SDHCFG);
writel            984 drivers/mmc/host/bcm2835.c 	writel(SDHSTS_BUSY_IRPT |
writel           1131 drivers/mmc/host/bcm2835.c 		writel(host->cdiv, host->ioaddr + SDCDIV);
writel           1154 drivers/mmc/host/bcm2835.c 	writel(host->cdiv, host->ioaddr + SDCDIV);
writel           1157 drivers/mmc/host/bcm2835.c 	writel(mmc->actual_clock / 2, host->ioaddr + SDTOUT);
writel           1254 drivers/mmc/host/bcm2835.c 	writel(host->hcfg, host->ioaddr + SDHCFG);
writel           1446 drivers/mmc/host/bcm2835.c 	writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD);
writel            248 drivers/mmc/host/davinci_mmc.c 			writel(*((u32 *)p), host->base + DAVINCI_MMCDXR);
writel            343 drivers/mmc/host/davinci_mmc.c 	writel(0x1FFF, host->base + DAVINCI_MMCTOR);
writel            366 drivers/mmc/host/davinci_mmc.c 	writel(cmd->arg, host->base + DAVINCI_MMCARGHL);
writel            367 drivers/mmc/host/davinci_mmc.c 	writel(cmd_reg,  host->base + DAVINCI_MMCCMD);
writel            381 drivers/mmc/host/davinci_mmc.c 		writel(im_val, host->base + DAVINCI_MMCIM);
writel            528 drivers/mmc/host/davinci_mmc.c 		writel(0, host->base + DAVINCI_MMCBLEN);
writel            529 drivers/mmc/host/davinci_mmc.c 		writel(0, host->base + DAVINCI_MMCNBLK);
writel            543 drivers/mmc/host/davinci_mmc.c 	writel(timeout, host->base + DAVINCI_MMCTOD);
writel            544 drivers/mmc/host/davinci_mmc.c 	writel(data->blocks, host->base + DAVINCI_MMCNBLK);
writel            545 drivers/mmc/host/davinci_mmc.c 	writel(data->blksz, host->base + DAVINCI_MMCBLEN);
writel            550 drivers/mmc/host/davinci_mmc.c 		writel(fifo_lev | MMCFIFOCTL_FIFODIR_WR | MMCFIFOCTL_FIFORST,
writel            552 drivers/mmc/host/davinci_mmc.c 		writel(fifo_lev | MMCFIFOCTL_FIFODIR_WR,
writel            556 drivers/mmc/host/davinci_mmc.c 		writel(fifo_lev | MMCFIFOCTL_FIFODIR_RD | MMCFIFOCTL_FIFORST,
writel            558 drivers/mmc/host/davinci_mmc.c 		writel(fifo_lev | MMCFIFOCTL_FIFODIR_RD,
writel            660 drivers/mmc/host/davinci_mmc.c 		writel(temp, host->base + DAVINCI_MMCCLK);
writel            672 drivers/mmc/host/davinci_mmc.c 		writel(temp, host->base + DAVINCI_MMCCLK);
writel            678 drivers/mmc/host/davinci_mmc.c 		writel(temp, host->base + DAVINCI_MMCCLK);
writel            680 drivers/mmc/host/davinci_mmc.c 		writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK);
writel            711 drivers/mmc/host/davinci_mmc.c 		writel((readl(host->base + DAVINCI_MMCCTL) &
writel            718 drivers/mmc/host/davinci_mmc.c 			writel((readl(host->base + DAVINCI_MMCCTL) &
writel            722 drivers/mmc/host/davinci_mmc.c 			writel(readl(host->base + DAVINCI_MMCCTL) |
writel            729 drivers/mmc/host/davinci_mmc.c 			writel(readl(host->base + DAVINCI_MMCCTL) &
writel            733 drivers/mmc/host/davinci_mmc.c 			writel(readl(host->base + DAVINCI_MMCCTL) &
writel            747 drivers/mmc/host/davinci_mmc.c 		writel(0, host->base + DAVINCI_MMCARGHL);
writel            748 drivers/mmc/host/davinci_mmc.c 		writel(MMCCMD_INITCK, host->base + DAVINCI_MMCCMD);
writel            778 drivers/mmc/host/davinci_mmc.c 			writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST);
writel            794 drivers/mmc/host/davinci_mmc.c 		writel(0, host->base + DAVINCI_MMCIM);
writel            822 drivers/mmc/host/davinci_mmc.c 		writel(0, host->base + DAVINCI_MMCIM);
writel            838 drivers/mmc/host/davinci_mmc.c 	writel(temp, host->base + DAVINCI_MMCCTL);
writel            858 drivers/mmc/host/davinci_mmc.c 		writel(status | SDIOIST_IOINT, host->base + DAVINCI_SDIOIST);
writel            877 drivers/mmc/host/davinci_mmc.c 		writel(0, host->base + DAVINCI_MMCIM);
writel            902 drivers/mmc/host/davinci_mmc.c 		writel(0, host->base + DAVINCI_MMCIM);
writel            917 drivers/mmc/host/davinci_mmc.c 		writel(im_val, host->base + DAVINCI_MMCIM);
writel           1037 drivers/mmc/host/davinci_mmc.c 			writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST);
writel           1041 drivers/mmc/host/davinci_mmc.c 			writel(readl(host->base + DAVINCI_SDIOIEN) |
writel           1046 drivers/mmc/host/davinci_mmc.c 		writel(readl(host->base + DAVINCI_SDIOIEN) & ~SDIOIEN_IOINTEN,
writel           1112 drivers/mmc/host/davinci_mmc.c 	writel(0, host->base + DAVINCI_MMCCLK);
writel           1113 drivers/mmc/host/davinci_mmc.c 	writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK);
writel           1115 drivers/mmc/host/davinci_mmc.c 	writel(0x1FFF, host->base + DAVINCI_MMCTOR);
writel           1116 drivers/mmc/host/davinci_mmc.c 	writel(0xFFFF, host->base + DAVINCI_MMCTOD);
writel           1369 drivers/mmc/host/davinci_mmc.c 	writel(0, host->base + DAVINCI_MMCIM);
writel            178 drivers/mmc/host/jz4740_mmc.c 		return writel(val, host->base + JZ_REG_MMC_IMASK);
writel            187 drivers/mmc/host/jz4740_mmc.c 		writel(val, host->base + JZ_REG_MMC_IREG);
writel            484 drivers/mmc/host/jz4740_mmc.c 			writel(buf[0], fifo_addr);
writel            485 drivers/mmc/host/jz4740_mmc.c 			writel(buf[1], fifo_addr);
writel            486 drivers/mmc/host/jz4740_mmc.c 			writel(buf[2], fifo_addr);
writel            487 drivers/mmc/host/jz4740_mmc.c 			writel(buf[3], fifo_addr);
writel            488 drivers/mmc/host/jz4740_mmc.c 			writel(buf[4], fifo_addr);
writel            489 drivers/mmc/host/jz4740_mmc.c 			writel(buf[5], fifo_addr);
writel            490 drivers/mmc/host/jz4740_mmc.c 			writel(buf[6], fifo_addr);
writel            491 drivers/mmc/host/jz4740_mmc.c 			writel(buf[7], fifo_addr);
writel            501 drivers/mmc/host/jz4740_mmc.c 				writel(*buf, fifo_addr);
writel            674 drivers/mmc/host/jz4740_mmc.c 				writel(JZ_MMC_DMAC_DMA_EN | JZ_MMC_DMAC_DMA_SEL,
writel            680 drivers/mmc/host/jz4740_mmc.c 			writel(0, host->base + JZ_REG_MMC_DMAC);
writel            688 drivers/mmc/host/jz4740_mmc.c 	writel(cmd->arg, host->base + JZ_REG_MMC_ARG);
writel            689 drivers/mmc/host/jz4740_mmc.c 	writel(cmdat, host->base + JZ_REG_MMC_CMDAT);
writel            321 drivers/mmc/host/meson-gx-mmc.c 		writel(cfg, host->regs + SD_EMMC_CFG);
writel            335 drivers/mmc/host/meson-gx-mmc.c 	writel(cfg, host->regs + SD_EMMC_CFG);
writel            361 drivers/mmc/host/meson-gx-mmc.c 	writel(cfg, host->regs + SD_EMMC_CFG);
writel            370 drivers/mmc/host/meson-gx-mmc.c 	writel(cfg, host->regs + SD_EMMC_CFG);
writel            421 drivers/mmc/host/meson-gx-mmc.c 	writel(clk_reg, host->regs + SD_EMMC_CLOCK);
writel            497 drivers/mmc/host/meson-gx-mmc.c 	writel(val, host->regs + host->data->adjust);
writel            508 drivers/mmc/host/meson-gx-mmc.c 	writel(val, host->regs + host->data->adjust);
writel            523 drivers/mmc/host/meson-gx-mmc.c 	writel(val, host->regs + host->data->adjust);
writel            533 drivers/mmc/host/meson-gx-mmc.c 		writel(val, host->regs + host->data->adjust);
writel            641 drivers/mmc/host/meson-gx-mmc.c 	writel(val, host->regs + SD_EMMC_CFG);
writel            682 drivers/mmc/host/meson-gx-mmc.c 	writel(cfg, host->regs + SD_EMMC_CFG);
writel            737 drivers/mmc/host/meson-gx-mmc.c 	writel(start, host->regs + SD_EMMC_START);
writel            796 drivers/mmc/host/meson-gx-mmc.c 	writel(cmd_cfg, host->regs + SD_EMMC_CMD_CFG);
writel            797 drivers/mmc/host/meson-gx-mmc.c 	writel(cmd_data, host->regs + SD_EMMC_CMD_DAT);
writel            798 drivers/mmc/host/meson-gx-mmc.c 	writel(0, host->regs + SD_EMMC_CMD_RSP);
writel            800 drivers/mmc/host/meson-gx-mmc.c 	writel(cmd->arg, host->regs + SD_EMMC_CMD_ARG);
writel            819 drivers/mmc/host/meson-gx-mmc.c 	writel(0, host->regs + SD_EMMC_START);
writel            864 drivers/mmc/host/meson-gx-mmc.c 	writel(status, host->regs + SD_EMMC_STATUS);
writel            906 drivers/mmc/host/meson-gx-mmc.c 		writel(start, host->regs + SD_EMMC_START);
writel            992 drivers/mmc/host/meson-gx-mmc.c 	writel(cfg, host->regs + SD_EMMC_CFG);
writel           1137 drivers/mmc/host/meson-gx-mmc.c 	writel(0, host->regs + SD_EMMC_START);
writel           1140 drivers/mmc/host/meson-gx-mmc.c 	writel(0, host->regs + SD_EMMC_IRQ_EN);
writel           1141 drivers/mmc/host/meson-gx-mmc.c 	writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN,
writel           1143 drivers/mmc/host/meson-gx-mmc.c 	writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN,
writel           1230 drivers/mmc/host/meson-gx-mmc.c 	writel(0, host->regs + SD_EMMC_IRQ_EN);
writel            135 drivers/mmc/host/meson-mx-sdio.c 	writel(regval, host->base + reg);
writel            140 drivers/mmc/host/meson-mx-sdio.c 	writel(MESON_MX_SDIO_IRQC_SOFT_RESET, host->base + MESON_MX_SDIO_IRQC);
writel            222 drivers/mmc/host/meson-mx-sdio.c 	writel(mult, host->base + MESON_MX_SDIO_MULT);
writel            234 drivers/mmc/host/meson-mx-sdio.c 	writel(cmd->arg, host->base + MESON_MX_SDIO_ARGU);
writel            235 drivers/mmc/host/meson-mx-sdio.c 	writel(ext, host->base + MESON_MX_SDIO_EXT);
writel            236 drivers/mmc/host/meson-mx-sdio.c 	writel(send, host->base + MESON_MX_SDIO_SEND);
writel            351 drivers/mmc/host/meson-mx-sdio.c 		writel(sg_dma_address(mrq->data->sg),
writel            371 drivers/mmc/host/meson-mx-sdio.c 	writel(mult, host->base + MESON_MX_SDIO_MULT);
writel            432 drivers/mmc/host/meson-mx-sdio.c 	writel(irqs, host->base + MESON_MX_SDIO_IRQS);
writel            477 drivers/mmc/host/meson-mx-sdio.c 	writel(irqc, host->base + MESON_MX_SDIO_IRQC);
writel            705 drivers/mmc/host/meson-mx-sdio.c 	writel(conf, host->base + MESON_MX_SDIO_CONF);
writel            331 drivers/mmc/host/mmci.c 		writel(clk, host->base + MMCICLOCK);
writel            342 drivers/mmc/host/mmci.c 		writel(pwr, host->base + MMCIPOWER);
writel            356 drivers/mmc/host/mmci.c 		writel(datactrl, host->base + MMCIDATACTRL);
writel            528 drivers/mmc/host/mmci.c 	writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK,
writel            554 drivers/mmc/host/mmci.c 	writel(0, host->base + MMCICOMMAND);
writel            575 drivers/mmc/host/mmci.c 		writel(mask0, base + MMCIMASK0);
writel            579 drivers/mmc/host/mmci.c 		writel(mask, base + MMCIMASK1);
writel           1010 drivers/mmc/host/mmci.c 	writel(timeout, base + MMCIDATATIMER);
writel           1011 drivers/mmc/host/mmci.c 	writel(host->size, base + MMCIDATALENGTH);
writel           1070 drivers/mmc/host/mmci.c 	writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
writel           1083 drivers/mmc/host/mmci.c 		writel(0, base + MMCICOMMAND);
writel           1108 drivers/mmc/host/mmci.c 	writel(cmd->arg, base + MMCIARGUMENT);
writel           1109 drivers/mmc/host/mmci.c 	writel(c, base + MMCICOMMAND);
writel           1242 drivers/mmc/host/mmci.c 			writel(readl(base + MMCIMASK0) |
writel           1264 drivers/mmc/host/mmci.c 			writel(host->variant->busy_detect_mask,
writel           1277 drivers/mmc/host/mmci.c 			writel(host->variant->busy_detect_mask,
writel           1280 drivers/mmc/host/mmci.c 			writel(readl(base + MMCIMASK0) &
writel           1491 drivers/mmc/host/mmci.c 		writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
writel           1524 drivers/mmc/host/mmci.c 			writel(status & ~host->variant->busy_detect_mask,
writel           1527 drivers/mmc/host/mmci.c 			writel(status, host->base + MMCICLEAR);
writel           2004 drivers/mmc/host/mmci.c 	writel(0, host->base + MMCIMASK0);
writel           2007 drivers/mmc/host/mmci.c 		writel(0, host->base + MMCIMASK1);
writel           2009 drivers/mmc/host/mmci.c 	writel(0xfff, host->base + MMCICLEAR);
writel           2042 drivers/mmc/host/mmci.c 	writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0);
writel           2084 drivers/mmc/host/mmci.c 		writel(0, host->base + MMCIMASK0);
writel           2087 drivers/mmc/host/mmci.c 			writel(0, host->base + MMCIMASK1);
writel           2089 drivers/mmc/host/mmci.c 		writel(0, host->base + MMCICOMMAND);
writel           2090 drivers/mmc/host/mmci.c 		writel(0, host->base + MMCIDATACTRL);
writel           2107 drivers/mmc/host/mmci.c 	writel(0, host->base + MMCIMASK0);
writel           2109 drivers/mmc/host/mmci.c 		writel(0, host->base + MMCIDATACTRL);
writel           2110 drivers/mmc/host/mmci.c 		writel(0, host->base + MMCIPOWER);
writel           2111 drivers/mmc/host/mmci.c 		writel(0, host->base + MMCICLOCK);
writel           2125 drivers/mmc/host/mmci.c 		writel(host->clk_reg, host->base + MMCICLOCK);
writel           2126 drivers/mmc/host/mmci.c 		writel(host->datactrl_reg, host->base + MMCIDATACTRL);
writel           2127 drivers/mmc/host/mmci.c 		writel(host->pwr_reg, host->base + MMCIPOWER);
writel           2129 drivers/mmc/host/mmci.c 	writel(MCI_IRQENABLE | host->variant->start_err,
writel            257 drivers/mmc/host/mmci_stm32_sdmmc.c 		writel(MCI_IRQENABLE | host->variant->start_err,
writel            192 drivers/mmc/host/moxart-mmc.c 		writel(*status & mask, host->base + REG_CLEAR);
writel            209 drivers/mmc/host/moxart-mmc.c 	writel(RSP_TIMEOUT  | RSP_CRC_OK |
writel            211 drivers/mmc/host/moxart-mmc.c 	writel(cmd->arg, host->base + REG_ARGUMENT);
writel            225 drivers/mmc/host/moxart-mmc.c 	writel(cmdctrl | CMD_EN, host->base + REG_COMMAND);
writel            388 drivers/mmc/host/moxart-mmc.c 	writel(DCR_DATA_FIFO_RESET, host->base + REG_DATA_CONTROL);
writel            389 drivers/mmc/host/moxart-mmc.c 	writel(MASK_DATA | FIFO_URUN | FIFO_ORUN, host->base + REG_CLEAR);
writel            390 drivers/mmc/host/moxart-mmc.c 	writel(host->rate, host->base + REG_DATA_TIMER);
writel            391 drivers/mmc/host/moxart-mmc.c 	writel(host->data_len, host->base + REG_DATA_LENGTH);
writel            392 drivers/mmc/host/moxart-mmc.c 	writel(datactrl, host->base + REG_DATA_CONTROL);
writel            420 drivers/mmc/host/moxart-mmc.c 			writel(CARD_CHANGE, host->base + REG_INTERRUPT_MASK);
writel            429 drivers/mmc/host/moxart-mmc.c 			writel(MASK_INTR_PIO, host->base + REG_INTERRUPT_MASK);
writel            480 drivers/mmc/host/moxart-mmc.c 		writel(MASK_INTR_PIO, host->base + REG_CLEAR);
writel            481 drivers/mmc/host/moxart-mmc.c 		writel(CARD_CHANGE, host->base + REG_INTERRUPT_MASK);
writel            510 drivers/mmc/host/moxart-mmc.c 		writel(ctrl, host->base + REG_CLOCK_CONTROL);
writel            514 drivers/mmc/host/moxart-mmc.c 		writel(readl(host->base + REG_POWER_CONTROL) & ~SD_POWER_ON,
writel            522 drivers/mmc/host/moxart-mmc.c 		writel(SD_POWER_ON | (u32) power,
writel            528 drivers/mmc/host/moxart-mmc.c 		writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH);
writel            531 drivers/mmc/host/moxart-mmc.c 		writel(BUS_WIDTH_8, host->base + REG_BUS_WIDTH);
writel            534 drivers/mmc/host/moxart-mmc.c 		writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH);
writel            659 drivers/mmc/host/moxart-mmc.c 	writel(0, host->base + REG_INTERRUPT_MASK);
writel            661 drivers/mmc/host/moxart-mmc.c 	writel(CMD_SDC_RESET, host->base + REG_COMMAND);
writel            700 drivers/mmc/host/moxart-mmc.c 		writel(0, host->base + REG_INTERRUPT_MASK);
writel            701 drivers/mmc/host/moxart-mmc.c 		writel(0, host->base + REG_POWER_CONTROL);
writel            702 drivers/mmc/host/moxart-mmc.c 		writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF,
writel            549 drivers/mmc/host/mtk-sd.c 	writel(val, reg);
writel            557 drivers/mmc/host/mtk-sd.c 	writel(val, reg);
writel            566 drivers/mmc/host/mtk-sd.c 	writel(tv, reg);
writel            589 drivers/mmc/host/mtk-sd.c 	writel(val, host->base + MSDC_INT);
writel            674 drivers/mmc/host/mtk-sd.c 	writel(lower_32_bits(dma->gpd_addr), host->base + MSDC_DMA_SA);
writel            851 drivers/mmc/host/mtk-sd.c 		writel(host->def_tune_para.iocon, host->base + MSDC_IOCON);
writel            853 drivers/mmc/host/mtk-sd.c 			writel(host->def_tune_para.emmc_top_control,
writel            855 drivers/mmc/host/mtk-sd.c 			writel(host->def_tune_para.emmc_top_cmd,
writel            858 drivers/mmc/host/mtk-sd.c 			writel(host->def_tune_para.pad_tune,
writel            862 drivers/mmc/host/mtk-sd.c 		writel(host->saved_tune_para.iocon, host->base + MSDC_IOCON);
writel            863 drivers/mmc/host/mtk-sd.c 		writel(host->saved_tune_para.pad_cmd_tune,
writel            866 drivers/mmc/host/mtk-sd.c 			writel(host->saved_tune_para.emmc_top_control,
writel            868 drivers/mmc/host/mtk-sd.c 			writel(host->saved_tune_para.emmc_top_cmd,
writel            871 drivers/mmc/host/mtk-sd.c 			writel(host->saved_tune_para.pad_tune,
writel            962 drivers/mmc/host/mtk-sd.c 		writel(data->blocks, host->base + SDC_BLK_NUM);
writel           1172 drivers/mmc/host/mtk-sd.c 	writel(cmd->arg, host->base + SDC_ARG);
writel           1173 drivers/mmc/host/mtk-sd.c 	writel(rawcmd, host->base + SDC_CMD);
writel           1326 drivers/mmc/host/mtk-sd.c 	writel(val, host->base + SDC_CFG);
writel           1434 drivers/mmc/host/mtk-sd.c 		writel(events & event_mask, host->base + MSDC_INT);
writel           1484 drivers/mmc/host/mtk-sd.c 	writel(0, host->base + MSDC_INTEN);
writel           1486 drivers/mmc/host/mtk-sd.c 	writel(val, host->base + MSDC_INT);
writel           1502 drivers/mmc/host/mtk-sd.c 		writel(0, host->top_base + EMMC_TOP_CONTROL);
writel           1503 drivers/mmc/host/mtk-sd.c 		writel(0, host->top_base + EMMC_TOP_CMD);
writel           1505 drivers/mmc/host/mtk-sd.c 		writel(0, host->base + tune_reg);
writel           1507 drivers/mmc/host/mtk-sd.c 	writel(0, host->base + MSDC_IOCON);
writel           1509 drivers/mmc/host/mtk-sd.c 	writel(0x403c0046, host->base + MSDC_PATCH_BIT);
writel           1511 drivers/mmc/host/mtk-sd.c 	writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
writel           1616 drivers/mmc/host/mtk-sd.c 	writel(0, host->base + MSDC_INTEN);
writel           1619 drivers/mmc/host/mtk-sd.c 	writel(val, host->base + MSDC_INT);
writel           2088 drivers/mmc/host/mtk-sd.c 		writel(host->hs400_ds_delay,
writel           2091 drivers/mmc/host/mtk-sd.c 		writel(host->hs400_ds_delay, host->base + PAD_DS_TUNE);
writel           2419 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.msdc_cfg, host->base + MSDC_CFG);
writel           2420 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.iocon, host->base + MSDC_IOCON);
writel           2421 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.sdc_cfg, host->base + SDC_CFG);
writel           2422 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.patch_bit0, host->base + MSDC_PATCH_BIT);
writel           2423 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.patch_bit1, host->base + MSDC_PATCH_BIT1);
writel           2424 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.patch_bit2, host->base + MSDC_PATCH_BIT2);
writel           2425 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE);
writel           2426 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE);
writel           2427 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0);
writel           2428 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.emmc50_cfg3, host->base + EMMC50_CFG3);
writel           2429 drivers/mmc/host/mtk-sd.c 	writel(host->save_para.sdc_fifo_cfg, host->base + SDC_FIFO_CFG);
writel           2431 drivers/mmc/host/mtk-sd.c 		writel(host->save_para.emmc_top_control,
writel           2433 drivers/mmc/host/mtk-sd.c 		writel(host->save_para.emmc_top_cmd,
writel           2435 drivers/mmc/host/mtk-sd.c 		writel(host->save_para.emmc50_pad_ds_tune,
writel           2438 drivers/mmc/host/mtk-sd.c 		writel(host->save_para.pad_tune, host->base + tune_reg);
writel             53 drivers/mmc/host/mvsdio.c #define mvsd_write(offs, val)	writel(val, iobase + (offs))
writel            679 drivers/mmc/host/mvsdio.c 		writel(0, iobase + MVSD_WINDOW_CTRL(i));
writel            680 drivers/mmc/host/mvsdio.c 		writel(0, iobase + MVSD_WINDOW_BASE(i));
writel            685 drivers/mmc/host/mvsdio.c 		writel(((cs->size - 1) & 0xffff0000) |
writel            689 drivers/mmc/host/mvsdio.c 		writel(cs->base, iobase + MVSD_WINDOW_BASE(i));
writel            215 drivers/mmc/host/mxcmmc.c 		writel(val, host->base + reg);
writel            106 drivers/mmc/host/mxs-mmc.c 	writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
writel            116 drivers/mmc/host/mxs-mmc.c 	writel(ctrl0, ssp->base + HW_SSP_CTRL0);
writel            117 drivers/mmc/host/mxs-mmc.c 	writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp));
writel            187 drivers/mmc/host/mxs-mmc.c 	writel(stat & MXS_MMC_IRQ_BITS,
writel            407 drivers/mmc/host/mxs-mmc.c 		writel(data_size, ssp->base + HW_SSP_XFER_SIZE);
writel            408 drivers/mmc/host/mxs-mmc.c 		writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
writel            428 drivers/mmc/host/mxs-mmc.c 	writel(val, ssp->base + HW_SSP_TIMING(ssp));
writel            521 drivers/mmc/host/mxs-mmc.c 		writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
writel            523 drivers/mmc/host/mxs-mmc.c 		writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
writel            526 drivers/mmc/host/mxs-mmc.c 		writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
writel            528 drivers/mmc/host/mxs-mmc.c 		writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
writel            123 drivers/mmc/host/pxamci.c 		writel(STOP_CLOCK, host->base + MMC_STRPCL);
writel            143 drivers/mmc/host/pxamci.c 	writel(host->imask, host->base + MMC_I_MASK);
writel            153 drivers/mmc/host/pxamci.c 	writel(host->imask, host->base + MMC_I_MASK);
writel            172 drivers/mmc/host/pxamci.c 	writel(nob, host->base + MMC_NOB);
writel            173 drivers/mmc/host/pxamci.c 	writel(data->blksz, host->base + MMC_BLKLEN);
writel            178 drivers/mmc/host/pxamci.c 	writel((timeout + 255) / 256, host->base + MMC_RDTO);
writel            256 drivers/mmc/host/pxamci.c 	writel(cmd->opcode, host->base + MMC_CMD);
writel            257 drivers/mmc/host/pxamci.c 	writel(cmd->arg >> 16, host->base + MMC_ARGH);
writel            258 drivers/mmc/host/pxamci.c 	writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
writel            259 drivers/mmc/host/pxamci.c 	writel(cmdat, host->base + MMC_CMDAT);
writel            260 drivers/mmc/host/pxamci.c 	writel(host->clkrt, host->base + MMC_CLKRT);
writel            262 drivers/mmc/host/pxamci.c 	writel(START_CLOCK, host->base + MMC_STRPCL);
writel            550 drivers/mmc/host/pxamci.c 		writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
writel            702 drivers/mmc/host/pxamci.c 	writel(0, host->base + MMC_SPI);
writel            703 drivers/mmc/host/pxamci.c 	writel(64, host->base + MMC_RESTO);
writel            704 drivers/mmc/host/pxamci.c 	writel(host->imask, host->base + MMC_I_MASK);
writel            792 drivers/mmc/host/pxamci.c 		writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
writel            285 drivers/mmc/host/renesas_sdhi_core.c 	writel(val, priv->scc_ctl + (addr << host->bus_shift));
writel            269 drivers/mmc/host/s3cmci.c 	writel(newmask, host->base + host->sdiimsk);
writel            281 drivers/mmc/host/s3cmci.c 	writel(newmask, host->base + host->sdiimsk);
writel            292 drivers/mmc/host/s3cmci.c 	writel(mask, host->base + host->sdiimsk);
writel            429 drivers/mmc/host/s3cmci.c 	writel(host->prescaler, host->base + S3C2410_SDIPRE);
writel            545 drivers/mmc/host/s3cmci.c 			writel(*ptr++, to_ptr);
writel            623 drivers/mmc/host/s3cmci.c 			writel(mci_dclear, host->base + S3C2410_SDIDSTA);
writel            784 drivers/mmc/host/s3cmci.c 	writel(mci_cclear, host->base + S3C2410_SDICMDSTAT);
writel            785 drivers/mmc/host/s3cmci.c 	writel(mci_dclear, host->base + S3C2410_SDIDSTA);
writel            858 drivers/mmc/host/s3cmci.c 	writel(host->prescaler, host->base + S3C2410_SDIPRE);
writel            869 drivers/mmc/host/s3cmci.c 	writel(0, host->base + S3C2410_SDICMDARG);
writel            870 drivers/mmc/host/s3cmci.c 	writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
writel            871 drivers/mmc/host/s3cmci.c 	writel(0, host->base + S3C2410_SDICMDCON);
writel            903 drivers/mmc/host/s3cmci.c 			writel(S3C2440_SDIFSTA_FIFORESET |
writel            913 drivers/mmc/host/s3cmci.c 			writel(mci_con, host->base + S3C2410_SDICON);
writel            943 drivers/mmc/host/s3cmci.c 	writel(cmd->arg, host->base + S3C2410_SDICMDARG);
writel            954 drivers/mmc/host/s3cmci.c 	writel(ccon, host->base + S3C2410_SDICMDCON);
writel            964 drivers/mmc/host/s3cmci.c 		writel(0, host->base + S3C2410_SDIDCON);
writel            985 drivers/mmc/host/s3cmci.c 		writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
writel           1019 drivers/mmc/host/s3cmci.c 	writel(dcon, host->base + S3C2410_SDIDCON);
writel           1023 drivers/mmc/host/s3cmci.c 	writel(data->blksz, host->base + S3C2410_SDIBSIZE);
writel           1034 drivers/mmc/host/s3cmci.c 		writel(0x007FFFFF, host->base + S3C2410_SDITIMER);
writel           1036 drivers/mmc/host/s3cmci.c 		writel(0x0000FFFF, host->base + S3C2410_SDITIMER);
writel           1040 drivers/mmc/host/s3cmci.c 			writel(0xFF, host->base + S3C2410_SDIPRE);
writel           1084 drivers/mmc/host/s3cmci.c 	writel(host->prescaler, host->base + S3C2410_SDIPRE);
writel           1125 drivers/mmc/host/s3cmci.c 	writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT);
writel           1126 drivers/mmc/host/s3cmci.c 	writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA);
writel           1127 drivers/mmc/host/s3cmci.c 	writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA);
writel           1197 drivers/mmc/host/s3cmci.c 	writel(host->prescaler, host->base + S3C2410_SDIPRE);
writel           1251 drivers/mmc/host/s3cmci.c 	writel(mci_con, host->base + S3C2410_SDICON);
writel           1269 drivers/mmc/host/s3cmci.c 	writel(con, host->base + S3C2410_SDICON);
writel           1304 drivers/mmc/host/s3cmci.c 	writel(con, host->base + S3C2410_SDICON);
writel            102 drivers/mmc/host/sdhci-cadence.c 	writel(tmp, reg);
writel            105 drivers/mmc/host/sdhci-cadence.c 	writel(tmp, reg);
writel            112 drivers/mmc/host/sdhci-cadence.c 	writel(tmp, reg);
writel            186 drivers/mmc/host/sdhci-cadence.c 	writel(tmp, priv->hrs_addr + SDHCI_CDNS_HRS06);
writel            269 drivers/mmc/host/sdhci-cadence.c 		writel(tmp, reg);
writel            302 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
writel            384 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(SDHCI_INT_RESPONSE, host->ioaddr +
writel            412 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
writel            414 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
writel            429 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
writel            436 drivers/mmc/host/sdhci-esdhc-imx.c 				writel(data, host->ioaddr + SDHCI_TRANSFER_MODE);
writel            441 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(val, host->ioaddr + reg);
writel            517 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);
writel            525 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);
writel            535 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(new_val , host->ioaddr + ESDHC_MIX_CTRL);
writel            555 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(v, host->ioaddr + SDHCI_AUTO_CMD_STATUS);
writel            556 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);
writel            567 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
writel            579 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);
writel            594 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(m, host->ioaddr + ESDHC_WTMK_LVL);
writel            612 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(val << 16,
writel            615 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(val << 16 | imx_data->scratchpad,
writel            707 drivers/mmc/host/sdhci-esdhc-imx.c 				writel(new_val & ESDHC_MIX_CTRL_TUNING_MASK,
writel            750 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
writel            766 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(val | BIT(10), host->ioaddr + ESDHC_DLL_CTRL);
writel            768 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(val, host->ioaddr + ESDHC_DLL_CTRL);
writel            808 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(val | ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
writel            878 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
writel            879 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(val << 8, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
writel            892 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
writel            941 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(m, host->ioaddr + ESDHC_MIX_CTRL);
writel            991 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(readl(host->ioaddr + ESDHC_VENDOR_SPEC) &
writel            996 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(ESDHC_STROBE_DLL_CTRL_RESET,
writel            999 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(0, host->ioaddr + ESDHC_STROBE_DLL_CTRL);
writel           1008 drivers/mmc/host/sdhci-esdhc-imx.c 	writel(v, host->ioaddr + ESDHC_STROBE_DLL_CTRL);
writel           1032 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL);
writel           1033 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
writel           1037 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(ctrl, host->ioaddr + SDHCI_AUTO_CMD_STATUS);
writel           1061 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);
writel           1066 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);
writel           1075 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(v, host->ioaddr + ESDHC_DLL_CTRL);
writel           1080 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);
writel           1174 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(ESDHC_WTMK_DEFAULT_VAL, host->ioaddr + ESDHC_WTMK_LVL);
writel           1187 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(readl(host->ioaddr + SDHCI_HOST_CONTROL)
writel           1195 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(readl(host->ioaddr + 0x6c) & ~BIT(7),
writel           1199 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(0x0, host->ioaddr + ESDHC_DLL_CTRL);
writel           1213 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(tmp, host->ioaddr + ESDHC_VEND_SPEC2);
writel           1232 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(tmp, host->ioaddr + ESDHC_TUNING_CTRL);
writel           1241 drivers/mmc/host/sdhci-esdhc-imx.c 			writel(tmp, host->ioaddr + ESDHC_TUNING_CTRL);
writel           1508 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(0x0, host->ioaddr + ESDHC_MIX_CTRL);
writel           1509 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(0x0, host->ioaddr + SDHCI_AUTO_CMD_STATUS);
writel           1510 drivers/mmc/host/sdhci-esdhc-imx.c 		writel(0x0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
writel             85 drivers/mmc/host/sdhci-iproc.c 	writel(val, host->ioaddr + reg);
writel             49 drivers/mmc/host/sdhci-of-aspeed.c 	writel(info, sdc->regs + ASPEED_SDC_INFO);
writel            185 drivers/mmc/host/sdhci-of-at91.c 		writel(SDMMC_CACR_KEY | SDMMC_CACR_CAPWREN,
writel            187 drivers/mmc/host/sdhci-of-at91.c 		writel(caps1, host->ioaddr + SDHCI_CAPABILITIES_1);
writel            189 drivers/mmc/host/sdhci-of-at91.c 		writel(0, host->ioaddr + SDMMC_CACR);
writel            123 drivers/mmc/host/sdhci-omap.c 	writel(data, host->base + offset);
writel            121 drivers/mmc/host/sdhci-pic32.c 	writel(bus, host->ioaddr + SDH_SHARED_BUS_CTRL);
writel             97 drivers/mmc/host/sdhci-pxav3.c 		writel(0, regs + SDHCI_WINDOW_CTRL(i));
writel             98 drivers/mmc/host/sdhci-pxav3.c 		writel(0, regs + SDHCI_WINDOW_BASE(i));
writel            105 drivers/mmc/host/sdhci-pxav3.c 		writel(((cs->size - 1) & 0xffff0000) |
writel            110 drivers/mmc/host/sdhci-pxav3.c 		writel(cs->base, regs + SDHCI_WINDOW_BASE(i));
writel            270 drivers/mmc/host/sdhci-s3c.c 	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
writel            273 drivers/mmc/host/sdhci-s3c.c 	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
writel            282 drivers/mmc/host/sdhci-s3c.c 	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
writel            288 drivers/mmc/host/sdhci-s3c.c 	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
writel            183 drivers/mmc/host/sdhci-tegra.c 		writel((val << 16) | pltfm_host->xfer_mode_shadow,
writel            204 drivers/mmc/host/sdhci-tegra.c 	writel(val, host->ioaddr + reg);
writel           1148 drivers/mmc/host/sdhci-tegra.c 		writel(val, cq_host->mmio + reg);
writel           1161 drivers/mmc/host/sdhci-tegra.c 			writel(val, cq_host->mmio + reg);
writel           1163 drivers/mmc/host/sdhci-tegra.c 		writel(val, cq_host->mmio + reg);
writel            287 drivers/mmc/host/sdhci-xenon-phy.c 		writel(ARMADA_3700_SOC_PAD_1_8V, params->pad_ctrl.reg);
writel            290 drivers/mmc/host/sdhci-xenon-phy.c 			writel(ARMADA_3700_SOC_PAD_1_8V, params->pad_ctrl.reg);
writel            292 drivers/mmc/host/sdhci-xenon-phy.c 			writel(ARMADA_3700_SOC_PAD_3_3V, params->pad_ctrl.reg);
writel            658 drivers/mmc/host/sdhci.h 		writel(val, host->ioaddr + reg);
writel            705 drivers/mmc/host/sdhci.h 	writel(val, host->ioaddr + reg);
writel             99 drivers/mmc/host/sdricoh_cs.c 	writel(value, host->iobase + reg);
writel            263 drivers/mmc/host/sh_mmcif.c 	writel(val | readl(host->addr + reg), host->addr + reg);
writel            269 drivers/mmc/host/sh_mmcif.c 	writel(~val & readl(host->addr + reg), host->addr + reg);
writel             79 drivers/mmc/host/sunxi-mmc.c 	writel((value), (host)->reg_base + SDXC_##reg)
writel            712 drivers/mmc/host/sunxi-mmc.c 	writel(SDXC_CAL_DL_SW_EN, host->reg_base + reg_off);
writel            146 drivers/mmc/host/tifm_sd.c 		writel(val, sock->addr + SOCK_MMCSD_DATA);
writel            158 drivers/mmc/host/tifm_sd.c 		writel(val, sock->addr + SOCK_MMCSD_DATA);
writel            181 drivers/mmc/host/tifm_sd.c 					writel(host->bounce_buf_data[0],
writel            315 drivers/mmc/host/tifm_sd.c 	writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS);
writel            317 drivers/mmc/host/tifm_sd.c 		writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
writel            320 drivers/mmc/host/tifm_sd.c 		writel((dma_blk_cnt << 8) | TIFM_DMA_EN,
writel            383 drivers/mmc/host/tifm_sd.c 	writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
writel            384 drivers/mmc/host/tifm_sd.c 	writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
writel            385 drivers/mmc/host/tifm_sd.c 	writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
writel            430 drivers/mmc/host/tifm_sd.c 					writel(TIFM_MMCSD_EOFB
writel            441 drivers/mmc/host/tifm_sd.c 					writel((~TIFM_MMCSD_EOFB)
writel            450 drivers/mmc/host/tifm_sd.c 				writel((~TIFM_MMCSD_EOFB)
writel            496 drivers/mmc/host/tifm_sd.c 	writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
writel            519 drivers/mmc/host/tifm_sd.c 			writel(host_status & TIFM_MMCSD_ERRMASK,
writel            533 drivers/mmc/host/tifm_sd.c 			writel(TIFM_FIFO_INT_SETALL,
writel            535 drivers/mmc/host/tifm_sd.c 			writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
writel            566 drivers/mmc/host/tifm_sd.c 				writel(host_status & TIFM_MMCSD_AE,
writel            586 drivers/mmc/host/tifm_sd.c 	writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
writel            603 drivers/mmc/host/tifm_sd.c 		writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
writel            604 drivers/mmc/host/tifm_sd.c 		writel((~TIFM_MMCSD_DPE)
writel            611 drivers/mmc/host/tifm_sd.c 		writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
writel            612 drivers/mmc/host/tifm_sd.c 		writel(TIFM_MMCSD_DPE
writel            651 drivers/mmc/host/tifm_sd.c 			 writel(TIFM_MMCSD_EOFB
writel            656 drivers/mmc/host/tifm_sd.c 			writel(TIFM_MMCSD_BUFINT
writel            659 drivers/mmc/host/tifm_sd.c 			writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
writel            694 drivers/mmc/host/tifm_sd.c 			writel(TIFM_FIFO_INT_SETALL,
writel            696 drivers/mmc/host/tifm_sd.c 			writel(ilog2(r_data->blksz) - 2,
writel            698 drivers/mmc/host/tifm_sd.c 			writel(TIFM_FIFO_ENABLE,
writel            700 drivers/mmc/host/tifm_sd.c 			writel(TIFM_FIFO_INTMASK,
writel            704 drivers/mmc/host/tifm_sd.c 				writel(TIFM_MMCSD_TXDE,
writel            707 drivers/mmc/host/tifm_sd.c 				writel(TIFM_MMCSD_RXDE,
writel            713 drivers/mmc/host/tifm_sd.c 		writel(r_data->blocks - 1,
writel            715 drivers/mmc/host/tifm_sd.c 		writel(r_data->blksz - 1,
writel            721 drivers/mmc/host/tifm_sd.c 	writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
writel            757 drivers/mmc/host/tifm_sd.c 			writel((~TIFM_MMCSD_BUFINT)
writel            776 drivers/mmc/host/tifm_sd.c 	writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
writel            809 drivers/mmc/host/tifm_sd.c 		writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
writel            812 drivers/mmc/host/tifm_sd.c 		writel((~TIFM_MMCSD_4BBUS)
writel            833 drivers/mmc/host/tifm_sd.c 			writel((~TIFM_CTRL_FAST_CLK)
writel            839 drivers/mmc/host/tifm_sd.c 			writel(TIFM_CTRL_FAST_CLK
writel            847 drivers/mmc/host/tifm_sd.c 	writel(host->clk_div
writel            887 drivers/mmc/host/tifm_sd.c 	writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
writel            890 drivers/mmc/host/tifm_sd.c 	writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
writel            891 drivers/mmc/host/tifm_sd.c 	writel(host->clk_div | TIFM_MMCSD_POWER,
writel            909 drivers/mmc/host/tifm_sd.c 	writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
writel            910 drivers/mmc/host/tifm_sd.c 	writel(host->clk_div | TIFM_MMCSD_POWER,
writel            912 drivers/mmc/host/tifm_sd.c 	writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
writel            915 drivers/mmc/host/tifm_sd.c 	writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
writel            916 drivers/mmc/host/tifm_sd.c 	writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
writel            920 drivers/mmc/host/tifm_sd.c 		writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
writel            935 drivers/mmc/host/tifm_sd.c 	writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC
writel           1001 drivers/mmc/host/tifm_sd.c 	writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
writel           1008 drivers/mmc/host/tifm_sd.c 		writel(TIFM_FIFO_INT_SETALL,
writel           1010 drivers/mmc/host/tifm_sd.c 		writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
writel            242 drivers/mmc/host/uniphier-sd.c 	writel(UNIPHIER_SD_DMA_CTL_START, host->ctl + UNIPHIER_SD_DMA_CTL);
writel            281 drivers/mmc/host/uniphier-sd.c 	writel(dma_mode, host->ctl + UNIPHIER_SD_DMA_MODE);
writel            284 drivers/mmc/host/uniphier-sd.c 	writel(lower_32_bits(dma_addr), host->ctl + UNIPHIER_SD_DMA_ADDR_L);
writel            285 drivers/mmc/host/uniphier-sd.c 	writel(upper_32_bits(dma_addr), host->ctl + UNIPHIER_SD_DMA_ADDR_H);
writel            332 drivers/mmc/host/uniphier-sd.c 	writel(tmp, host->ctl + UNIPHIER_SD_DMA_RST);
writel            335 drivers/mmc/host/uniphier-sd.c 	writel(tmp, host->ctl + UNIPHIER_SD_DMA_RST);
writel            436 drivers/mmc/host/uniphier-sd.c 	writel(tmp, host->ctl + (CTL_SD_CARD_CLK_CTL << 1));
writel            462 drivers/mmc/host/uniphier-sd.c 	writel(tmp, host->ctl + (CTL_SD_CARD_CLK_CTL << 1));
writel            465 drivers/mmc/host/uniphier-sd.c 	writel(tmp, host->ctl + (CTL_SD_CARD_CLK_CTL << 1));
writel            485 drivers/mmc/host/uniphier-sd.c 	writel(val, host->ctl + UNIPHIER_SD_HOST_MODE);
writel            495 drivers/mmc/host/uniphier-sd.c 	writel(val, host->ctl + (CTL_SD_CARD_CLK_CTL << 1));
writel            522 drivers/mmc/host/uniphier-sd.c 	writel(tmp, host->ctl + UNIPHIER_SD_VOLT);
writel            427 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdcontrol_reg, addrbase + VIA_CRDR_SDCTRL);
writel            428 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdcmdarg_reg, addrbase + VIA_CRDR_SDCARG);
writel            429 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdbusmode_reg, addrbase + VIA_CRDR_SDBUSMODE);
writel            430 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdblklen_reg, addrbase + VIA_CRDR_SDBLKLEN);
writel            431 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdcurblkcnt_reg, addrbase + VIA_CRDR_SDCURBLKCNT);
writel            432 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdintmask_reg, addrbase + VIA_CRDR_SDINTMASK);
writel            433 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdstatus_reg, addrbase + VIA_CRDR_SDSTATUS);
writel            434 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdrsptmo_reg, addrbase + VIA_CRDR_SDRSPTMO);
writel            435 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdclksel_reg, addrbase + VIA_CRDR_SDCLKSEL);
writel            436 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhc_reg->sdextctrl_reg, addrbase + VIA_CRDR_SDEXTCTRL);
writel            461 drivers/mmc/host/via-sdmmc.c 	writel(dmaaddr, addrbase + VIA_CRDR_DMABASEADD);
writel            462 drivers/mmc/host/via-sdmmc.c 	writel(count, addrbase + VIA_CRDR_DMACOUNTER);
writel            463 drivers/mmc/host/via-sdmmc.c 	writel(ctrl_data, addrbase + VIA_CRDR_DMACTRL);
writel            464 drivers/mmc/host/via-sdmmc.c 	writel(0x01, addrbase + VIA_CRDR_DMASTART);
writel            504 drivers/mmc/host/via-sdmmc.c 	writel(blk_reg, addrbase + VIA_CRDR_SDBLKLEN);
writel            616 drivers/mmc/host/via-sdmmc.c 	writel(cmd->arg, addrbase + VIA_CRDR_SDCARG);
writel            617 drivers/mmc/host/via-sdmmc.c 	writel(cmdctrl, addrbase + VIA_CRDR_SDCTRL);
writel            745 drivers/mmc/host/via-sdmmc.c 	writel(org_data, addrbase + VIA_CRDR_SDBUSMODE);
writel            746 drivers/mmc/host/via-sdmmc.c 	writel(sdextctrl, addrbase + VIA_CRDR_SDEXTCTRL);
writel            941 drivers/mmc/host/via-sdmmc.c 			writel(VIA_CRDR_DMACTRL_SFTRST,
writel            988 drivers/mmc/host/via-sdmmc.c 	writel(VIA_CRDR_DMACTRL_SFTRST, addrbase + VIA_CRDR_DMACTRL);
writel           1052 drivers/mmc/host/via-sdmmc.c 	writel(0x0, addrbase + VIA_CRDR_SDINTMASK);
writel           1056 drivers/mmc/host/via-sdmmc.c 	writel(lenreg, addrbase + VIA_CRDR_SDBLKLEN);
writel           1068 drivers/mmc/host/via-sdmmc.c 	writel(VIA_CRDR_SDACTIVE_INTMASK, addrbase + VIA_CRDR_SDINTMASK);
writel           1185 drivers/mmc/host/via-sdmmc.c 		writel(VIA_CRDR_DMACTRL_SFTRST,
writel           1230 drivers/mmc/host/via-sdmmc.c 	writel(0x0, addrbase + VIA_CRDR_SDINTMASK);
writel           1233 drivers/mmc/host/via-sdmmc.c 	writel(lenreg, addrbase + VIA_CRDR_SDBLKLEN);
writel           1243 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhcreg->sdcontrol_reg, addrbase + VIA_CRDR_SDCTRL);
writel           1244 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhcreg->sdcmdarg_reg, addrbase + VIA_CRDR_SDCARG);
writel           1245 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhcreg->sdintmask_reg, addrbase + VIA_CRDR_SDINTMASK);
writel           1246 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhcreg->sdrsptmo_reg, addrbase + VIA_CRDR_SDRSPTMO);
writel           1247 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhcreg->sdclksel_reg, addrbase + VIA_CRDR_SDCLKSEL);
writel           1248 drivers/mmc/host/via-sdmmc.c 	writel(pm_sdhcreg->sdextctrl_reg, addrbase + VIA_CRDR_SDEXTCTRL);
writel            264 drivers/mmc/host/wmt-sdmmc.c 	writel(arg, priv->sdmmc_base + SDMMC_ARG);
writel            290 drivers/mmc/host/wmt-sdmmc.c 	writel(DMA_ISR_INT_STS, priv->sdmmc_base + SDDMA_ISR);
writel            291 drivers/mmc/host/wmt-sdmmc.c 	writel(0, priv->sdmmc_base + SDDMA_IER);
writel            507 drivers/mmc/host/wmt-sdmmc.c 	writel(DMA_GCR_SOFT_RESET, priv->sdmmc_base + SDDMA_GCR);
writel            508 drivers/mmc/host/wmt-sdmmc.c 	writel(DMA_GCR_DMA_EN, priv->sdmmc_base + SDDMA_GCR);
writel            533 drivers/mmc/host/wmt-sdmmc.c 	writel(DMA_IER_INT_EN, priv->sdmmc_base + SDDMA_IER);
writel            536 drivers/mmc/host/wmt-sdmmc.c 	writel(descaddr, priv->sdmmc_base + SDDMA_DESPR);
writel            538 drivers/mmc/host/wmt-sdmmc.c 	writel(0x00, priv->sdmmc_base + SDDMA_CCR);
writel            542 drivers/mmc/host/wmt-sdmmc.c 		writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base +
writel            546 drivers/mmc/host/wmt-sdmmc.c 		writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base +
writel            556 drivers/mmc/host/wmt-sdmmc.c 	writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR);
writel            893 drivers/mmc/host/wmt-sdmmc.c 	writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);
writel            231 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1);
writel            234 drivers/mtd/devices/spear_smi.c 	writel((bank << BANK_SHIFT) | RD_STATUS_REG | TFIE,
writel            248 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1, dev->io_base + SMI_CR1);
writel            249 drivers/mtd/devices/spear_smi.c 	writel(0, dev->io_base + SMI_CR2);
writel            307 drivers/mtd/devices/spear_smi.c 	writel(0, dev->io_base + SMI_SR);
writel            343 drivers/mtd/devices/spear_smi.c 	writel(0, dev->io_base + SMI_SR);
writel            345 drivers/mtd/devices/spear_smi.c 	writel(val, dev->io_base + SMI_CR1);
writel            389 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1 & ~SW_MODE, dev->io_base + SMI_CR1);
writel            392 drivers/mtd/devices/spear_smi.c 	writel((bank << BANK_SHIFT) | WE | TFIE, dev->io_base + SMI_CR2);
writel            398 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1, dev->io_base + SMI_CR1);
writel            399 drivers/mtd/devices/spear_smi.c 	writel(0, dev->io_base + SMI_CR2);
writel            461 drivers/mtd/devices/spear_smi.c 	writel((ctrlreg1 | SW_MODE) & ~WB_MODE, dev->io_base + SMI_CR1);
writel            464 drivers/mtd/devices/spear_smi.c 	writel(command, dev->io_base + SMI_TR);
writel            466 drivers/mtd/devices/spear_smi.c 	writel((bank << BANK_SHIFT) | SEND | TFIE | (bytes << TX_LEN_SHIFT),
writel            479 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1, dev->io_base + SMI_CR1);
writel            480 drivers/mtd/devices/spear_smi.c 	writel(0, dev->io_base + SMI_CR2);
writel            581 drivers/mtd/devices/spear_smi.c 	writel(val, dev->io_base + SMI_CR1);
writel            586 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1, dev->io_base + SMI_CR1);
writel            635 drivers/mtd/devices/spear_smi.c 	writel((ctrlreg1 | WB_MODE) & ~SW_MODE, dev->io_base + SMI_CR1);
writel            655 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1, dev->io_base + SMI_CR1);
writel            759 drivers/mtd/devices/spear_smi.c 	writel(val | SW_MODE, dev->io_base + SMI_CR1);
writel            762 drivers/mtd/devices/spear_smi.c 	writel(OPCODE_RDID, dev->io_base + SMI_TR);
writel            766 drivers/mtd/devices/spear_smi.c 	writel(val, dev->io_base + SMI_CR2);
writel            784 drivers/mtd/devices/spear_smi.c 	writel(val & ~SW_MODE, dev->io_base + SMI_CR1);
writel            723 drivers/mtd/devices/st_spi_fsm.c 		writel(*src, dst);
writel            904 drivers/mtd/devices/st_spi_fsm.c 			writel(seq->seq_cfg, fsm->base + SPI_FAST_SEQ_CFG);
writel           1621 drivers/mtd/devices/st_spi_fsm.c 	writel(0x00040000, fsm->base + SPI_FAST_SEQ_CFG);
writel           1892 drivers/mtd/devices/st_spi_fsm.c 	writel(mode, fsm->base + SPI_MODESELECT);
writel           1930 drivers/mtd/devices/st_spi_fsm.c 	writel(clk_div, fsm->base + SPI_CLOCKDIV);
writel           1938 drivers/mtd/devices/st_spi_fsm.c 	writel(SEQ_CFG_SWRESET, fsm->base + SPI_FAST_SEQ_CFG);
writel           1940 drivers/mtd/devices/st_spi_fsm.c 	writel(0, fsm->base + SPI_FAST_SEQ_CFG);
writel           1951 drivers/mtd/devices/st_spi_fsm.c 	writel(SPI_CFG_DEVICE_ST            |
writel           1956 drivers/mtd/devices/st_spi_fsm.c 	writel(STFSM_DEFAULT_WR_TIME, fsm->base + SPI_STATUS_WR_TIME_REG);
writel           1963 drivers/mtd/devices/st_spi_fsm.c 	writel(0x00000001, fsm->base + SPI_PROGRAM_ERASE_TIME);
writel            105 drivers/mtd/maps/intel_vr_nor.c 	writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
writel            164 drivers/mtd/maps/intel_vr_nor.c 	writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
writel            234 drivers/mtd/maps/intel_vr_nor.c 	writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
writel             68 drivers/mtd/maps/pci.c 	writel(val.x[0], map->base + map->translate(map, ofs));
writel            133 drivers/mtd/maps/pci.c 		writel(0x00000008, map->base + 0x1558);
writel            134 drivers/mtd/maps/pci.c 		writel(0x00000000, map->base + 0x1550);
writel            136 drivers/mtd/maps/pci.c 		writel(0x00000007, map->base + 0x1558);
writel            137 drivers/mtd/maps/pci.c 		writel(0x00800000, map->base + 0x1550);
writel            107 drivers/mtd/maps/physmap-versatile.c 	writel(INTEGRATOR_EBI_LOCK_VAL, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
writel            112 drivers/mtd/maps/physmap-versatile.c 	writel(val, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
writel            115 drivers/mtd/maps/physmap-versatile.c 	writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
writel            196 drivers/mtd/maps/sc520cdp.c 				writel(par_table[i].new_par, &mmcr[SC520_PAR(j)]);
writel            152 drivers/mtd/nand/onenand/samsung.c 	writel(value, onenand->base + offset);
writel            162 drivers/mtd/nand/onenand/samsung.c 	writel(value, onenand->ahb_addr + cmd);
writel            523 drivers/mtd/nand/onenand/samsung.c 	writel(src, base + S5PC110_DMA_SRC_ADDR);
writel            524 drivers/mtd/nand/onenand/samsung.c 	writel(dst, base + S5PC110_DMA_DST_ADDR);
writel            527 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_SRC_CFG_READ, base + S5PC110_DMA_SRC_CFG);
writel            528 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_DST_CFG_READ, base + S5PC110_DMA_DST_CFG);
writel            530 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_SRC_CFG_WRITE, base + S5PC110_DMA_SRC_CFG);
writel            531 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_DST_CFG_WRITE, base + S5PC110_DMA_DST_CFG);
writel            534 drivers/mtd/nand/onenand/samsung.c 	writel(count, base + S5PC110_DMA_TRANS_SIZE);
writel            535 drivers/mtd/nand/onenand/samsung.c 	writel(direction, base + S5PC110_DMA_TRANS_DIR);
writel            537 drivers/mtd/nand/onenand/samsung.c 	writel(S5PC110_DMA_TRANS_CMD_TR, base + S5PC110_DMA_TRANS_CMD);
writel            549 drivers/mtd/nand/onenand/samsung.c 			writel(S5PC110_DMA_TRANS_CMD_TEC,
writel            556 drivers/mtd/nand/onenand/samsung.c 	writel(S5PC110_DMA_TRANS_CMD_TDC, base + S5PC110_DMA_TRANS_CMD);
writel            574 drivers/mtd/nand/onenand/samsung.c 	writel(cmd, base + S5PC110_DMA_TRANS_CMD);
writel            575 drivers/mtd/nand/onenand/samsung.c 	writel(status, base + S5PC110_INTC_DMA_CLR);
writel            591 drivers/mtd/nand/onenand/samsung.c 		writel(status, base + S5PC110_INTC_DMA_MASK);
writel            594 drivers/mtd/nand/onenand/samsung.c 	writel(src, base + S5PC110_DMA_SRC_ADDR);
writel            595 drivers/mtd/nand/onenand/samsung.c 	writel(dst, base + S5PC110_DMA_DST_ADDR);
writel            598 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_SRC_CFG_READ, base + S5PC110_DMA_SRC_CFG);
writel            599 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_DST_CFG_READ, base + S5PC110_DMA_DST_CFG);
writel            601 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_SRC_CFG_WRITE, base + S5PC110_DMA_SRC_CFG);
writel            602 drivers/mtd/nand/onenand/samsung.c 		writel(S5PC110_DMA_DST_CFG_WRITE, base + S5PC110_DMA_DST_CFG);
writel            605 drivers/mtd/nand/onenand/samsung.c 	writel(count, base + S5PC110_DMA_TRANS_SIZE);
writel            606 drivers/mtd/nand/onenand/samsung.c 	writel(direction, base + S5PC110_DMA_TRANS_DIR);
writel            608 drivers/mtd/nand/onenand/samsung.c 	writel(S5PC110_DMA_TRANS_CMD_TR, base + S5PC110_DMA_TRANS_CMD);
writel            652 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(PMERRLOC_DISABLE, pmecc->regs.errloc + ATMEL_PMERRLOC_ELDIS);
writel            664 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(val, pmecc->regs.errloc + ATMEL_PMERRLOC_ELCFG);
writel            665 drivers/mtd/nand/raw/atmel/pmecc.c 	writel((sector_size * 8) + (degree * strength),
writel            767 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL);
writel            768 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL);
writel            790 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(cfg, pmecc->regs.base + ATMEL_PMECC_CFG);
writel            791 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(user->cache.sarea, pmecc->regs.base + ATMEL_PMECC_SAREA);
writel            792 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(user->cache.saddr, pmecc->regs.base + ATMEL_PMECC_SADDR);
writel            793 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(user->cache.eaddr, pmecc->regs.base + ATMEL_PMECC_EADDR);
writel            795 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(PMECC_CTRL_ENABLE, pmecc->regs.base + ATMEL_PMECC_CTRL);
writel            796 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(PMECC_CTRL_DATA, pmecc->regs.base + ATMEL_PMECC_CTRL);
writel            858 drivers/mtd/nand/raw/atmel/pmecc.c 	writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR);
writel            102 drivers/mtd/nand/raw/cafe_nand.c #define cafe_writel(cafe, datum, addr)		writel(datum, (cafe)->mmio + CAFE_##addr)
writel             59 drivers/mtd/nand/raw/cmx270_nand.c 		writel((*buf++ << 16), this->legacy.IO_ADDR_W);
writel            110 drivers/mtd/nand/raw/cmx270_nand.c 		writel((dat << 16), this->legacy.IO_ADDR_W);
writel            963 drivers/mtd/nand/raw/fsmc_nand.c 	writel(val, host->regs_va + FSMC_PC);
writel             43 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(mask, addr + MXS_CLR_ADDR);
writel             88 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(MODULE_CLKGATE, reset_addr + MXS_CLR_ADDR);
writel             92 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 		writel(MODULE_SFTRST, reset_addr + MXS_SET_ADDR);
writel            168 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_GPMI_CTRL1_GPMI_MODE, r->gpmi_regs + HW_GPMI_CTRL1_CLR);
writel            171 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_GPMI_CTRL1_ATA_IRQRDY_POLARITY,
writel            175 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_GPMI_CTRL1_DEV_RESET, r->gpmi_regs + HW_GPMI_CTRL1_SET);
writel            178 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET);
writel            184 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_GPMI_CTRL1_DECOUPLE_CS, r->gpmi_regs + HW_GPMI_CTRL1_SET);
writel            556 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(0, r->bch_regs + HW_BCH_LAYOUTSELECT);
writel            718 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(hw->timing0, gpmi_regs + HW_GPMI_TIMING0);
writel            719 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(hw->timing1, gpmi_regs + HW_GPMI_TIMING1);
writel            725 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_GPMI_CTRL1_CLEAR_MASK, gpmi_regs + HW_GPMI_CTRL1_CLR);
writel            726 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(hw->ctrl1n, gpmi_regs + HW_GPMI_CTRL1_SET);
writel            768 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_BCH_CTRL_COMPLETE_IRQ, r->bch_regs + HW_BCH_CTRL_CLR);
writel           2493 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 		writel(this->bch_flashlayout0,
writel           2495 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 		writel(this->bch_flashlayout1,
writel           2500 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 		writel(BM_BCH_CTRL_COMPLETE_IRQ_EN,
writel           2522 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	writel(BM_BCH_CTRL_COMPLETE_IRQ_EN,
writel            152 drivers/mtd/nand/raw/hisi504_nand.c 	writel(value, host->iobase + reg);
writel             64 drivers/mtd/nand/raw/ingenic/jz4725b_bch.c 	writel(cfg, bch->base + BCH_BHCSR);
writel             69 drivers/mtd/nand/raw/ingenic/jz4725b_bch.c 	writel(cfg, bch->base + BCH_BHCCR);
writel             78 drivers/mtd/nand/raw/ingenic/jz4725b_bch.c 	writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
writel            107 drivers/mtd/nand/raw/ingenic/jz4725b_bch.c 	writel(reg, bch->base + BCH_BHCNT);
writel            115 drivers/mtd/nand/raw/ingenic/jz4725b_bch.c 	writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
writel            178 drivers/mtd/nand/raw/ingenic/jz4725b_bch.c 	writel(reg, bch->base + BCH_BHINT);
writel             50 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c 	writel(0, ecc->base + JZ_REG_NAND_IRQ_STAT);
writel             62 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c 	writel(reg, ecc->base + JZ_REG_NAND_ECC_CTRL);
writel             84 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c 	writel(reg, ecc->base + JZ_REG_NAND_ECC_CTRL);
writel            132 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c 	writel(reg, ecc->base + JZ_REG_NAND_ECC_CTRL);
writel            143 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c 	writel(reg, ecc->base + JZ_REG_NAND_ECC_CTRL);
writel            168 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c 	writel(0, ecc->base + JZ_REG_NAND_IRQ_STAT);
writel            171 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c 	writel(reg, ecc->base + JZ_REG_NAND_ECC_CTRL);
writel             68 drivers/mtd/nand/raw/ingenic/jz4780_bch.c 	writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
writel             73 drivers/mtd/nand/raw/ingenic/jz4780_bch.c 	writel(reg, bch->base + BCH_BHCNT);
writel             80 drivers/mtd/nand/raw/ingenic/jz4780_bch.c 	writel(reg, bch->base + BCH_BHCR);
writel             85 drivers/mtd/nand/raw/ingenic/jz4780_bch.c 	writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
writel             86 drivers/mtd/nand/raw/ingenic/jz4780_bch.c 	writel(BCH_BHCR_BCHE, bch->base + BCH_BHCCR);
writel             99 drivers/mtd/nand/raw/ingenic/jz4780_bch.c 		writel(*src32++, bch->base + BCH_BHDR);
writel            156 drivers/mtd/nand/raw/ingenic/jz4780_bch.c 	writel(reg, bch->base + BCH_BHINT);
writel            237 drivers/mtd/nand/raw/lpc32xx_mlc.c 	writel(MLCCMD_RESET, MLC_CMD(host->io_base));
writel            251 drivers/mtd/nand/raw/lpc32xx_mlc.c 	writel(tmp, MLC_ICR(host->io_base));
writel            266 drivers/mtd/nand/raw/lpc32xx_mlc.c 	writel(tmp, MLC_TIME_REG(host->io_base));
writel            273 drivers/mtd/nand/raw/lpc32xx_mlc.c 	writel(MLCCEH_NORMAL, MLC_CEH(host->io_base));
writel            286 drivers/mtd/nand/raw/lpc32xx_mlc.c 			writel(cmd, MLC_CMD(host->io_base));
writel            288 drivers/mtd/nand/raw/lpc32xx_mlc.c 			writel(cmd, MLC_ADDR(host->io_base));
writel            530 drivers/mtd/nand/raw/lpc32xx_mlc.c 				writel(*((uint32_t *)(buf)),
writel            535 drivers/mtd/nand/raw/lpc32xx_mlc.c 		writel(*((uint32_t *)(oobbuf)), MLC_BUFF(host->io_base));
writel            243 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(SLCCTRL_SW_RESET, SLC_CTRL(host->io_base));
writel            247 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(0, SLC_CFG(host->io_base));
writel            248 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(0, SLC_IEN(host->io_base));
writel            249 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel((SLCSTAT_INT_TC | SLCSTAT_INT_RDY_EN),
writel            266 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(tmp, SLC_TAC(host->io_base));
writel            284 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(tmp, SLC_CFG(host->io_base));
writel            288 drivers/mtd/nand/raw/lpc32xx_slc.c 			writel(cmd, SLC_CMD(host->io_base));
writel            290 drivers/mtd/nand/raw/lpc32xx_slc.c 			writel(cmd, SLC_ADDR(host->io_base));
writel            380 drivers/mtd/nand/raw/lpc32xx_slc.c 		writel((uint32_t)*buf++, SLC_DATA(host->io_base));
writel            511 drivers/mtd/nand/raw/lpc32xx_slc.c 		writel(readl(SLC_CFG(host->io_base)) |
writel            515 drivers/mtd/nand/raw/lpc32xx_slc.c 		writel((readl(SLC_CFG(host->io_base)) |
writel            522 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(SLCCTRL_ECC_CLEAR, SLC_CTRL(host->io_base));
writel            525 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(mtd->writesize, SLC_TC(host->io_base));
writel            528 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(readl(SLC_CTRL(host->io_base)) | SLCCTRL_DMA_START,
writel            586 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(readl(SLC_CTRL(host->io_base)) & ~SLCCTRL_DMA_START,
writel            588 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(readl(SLC_CFG(host->io_base)) &
writel            957 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(tmp, SLC_CTRL(host->io_base));
writel            993 drivers/mtd/nand/raw/lpc32xx_slc.c 	writel(tmp, SLC_CTRL(host->io_base));
writel            636 drivers/mtd/nand/raw/marvell_nand.c 	writel(nfc_op->ndcb[2], nfc->regs + NDCB0);
writel            645 drivers/mtd/nand/raw/marvell_nand.c 			writel(nfc_op->ndcb[3], nfc->regs + NDCB0);
writel            247 drivers/mtd/nand/raw/meson_nand.c 		writel(value, nfc->reg_base + NFC_REG_CFG);
writel            248 drivers/mtd/nand/raw/meson_nand.c 		writel((1 << 31), nfc->reg_base + NFC_REG_CMD);
writel            255 drivers/mtd/nand/raw/meson_nand.c 	writel(nfc->param.chip_select | NFC_CMD_IDLE | (time & 0x3ff),
writel            261 drivers/mtd/nand/raw/meson_nand.c 	writel(NFC_CMD_SEED | (0xc2 + (seed & 0x7fff)),
writel            279 drivers/mtd/nand/raw/meson_nand.c 		writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            288 drivers/mtd/nand/raw/meson_nand.c 	writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            401 drivers/mtd/nand/raw/meson_nand.c 	writel(cfg, nfc->reg_base + NFC_REG_CFG);
writel            408 drivers/mtd/nand/raw/meson_nand.c 	writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            488 drivers/mtd/nand/raw/meson_nand.c 	writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            491 drivers/mtd/nand/raw/meson_nand.c 	writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            503 drivers/mtd/nand/raw/meson_nand.c 		writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            506 drivers/mtd/nand/raw/meson_nand.c 		writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            540 drivers/mtd/nand/raw/meson_nand.c 	writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            564 drivers/mtd/nand/raw/meson_nand.c 	writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            617 drivers/mtd/nand/raw/meson_nand.c 		writel(nfc->cmdfifo.rw.cmd1, nfc->reg_base + NFC_REG_CMD);
writel            663 drivers/mtd/nand/raw/meson_nand.c 	writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            912 drivers/mtd/nand/raw/meson_nand.c 			writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel            920 drivers/mtd/nand/raw/meson_nand.c 				writel(cmd, nfc->reg_base + NFC_REG_CMD);
writel           1341 drivers/mtd/nand/raw/meson_nand.c 	writel(cfg, nfc->reg_base + NFC_REG_CFG);
writel           1413 drivers/mtd/nand/raw/meson_nand.c 	writel(0, nfc->reg_base + NFC_REG_CFG);
writel            189 drivers/mtd/nand/raw/mtk_ecc.c 		writel(reg, ecc->regs + ECC_ENCCNFG);
writel            192 drivers/mtd/nand/raw/mtk_ecc.c 			writel(lower_32_bits(config->addr),
writel            203 drivers/mtd/nand/raw/mtk_ecc.c 		writel(reg, ecc->regs + ECC_DECCNFG);
writel            253 drivers/mtd/nand/raw/mtk_ecc.c 	writel(ECC_OP_DISABLE, ecc->regs + ECC_DECCON);
writel            231 drivers/mtd/nand/raw/mtk_nand.c 	writel(val, nfc->regs + reg);
writel            353 drivers/mtd/nand/raw/mxc_nand.c 	writel(tmp, NFC_V3_IPC);
writel            397 drivers/mtd/nand/raw/mxc_nand.c 	writel(tmp, NFC_V3_CONFIG2);
writel            494 drivers/mtd/nand/raw/mxc_nand.c 	writel(cmd, NFC_V3_FLASH_CMD);
writel            497 drivers/mtd/nand/raw/mxc_nand.c 	writel(NFC_CMD, NFC_V3_LAUNCH);
writel            533 drivers/mtd/nand/raw/mxc_nand.c 	writel(addr, NFC_V3_FLASH_ADDR0);
writel            536 drivers/mtd/nand/raw/mxc_nand.c 	writel(NFC_ADDR, NFC_V3_LAUNCH);
writel            563 drivers/mtd/nand/raw/mxc_nand.c 	writel(tmp, NFC_V3_CONFIG1);
writel            566 drivers/mtd/nand/raw/mxc_nand.c 	writel(ops, NFC_V3_LAUNCH);
writel            611 drivers/mtd/nand/raw/mxc_nand.c 	writel(NFC_ID, NFC_V3_LAUNCH);
writel            662 drivers/mtd/nand/raw/mxc_nand.c 	writel(store, main_buf);
writel            700 drivers/mtd/nand/raw/mxc_nand.c 	writel(config2, NFC_V3_CONFIG2);
writel           1272 drivers/mtd/nand/raw/mxc_nand.c 	writel(NFC_V3_CONFIG1_RBA(0), NFC_V3_CONFIG1);
writel           1273 drivers/mtd/nand/raw/mxc_nand.c 	writel(NFC_V3_IPC_CREQ, NFC_V3_IPC);
writel           1276 drivers/mtd/nand/raw/mxc_nand.c 	writel(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_UNLOCK,
writel           1281 drivers/mtd/nand/raw/mxc_nand.c 		writel(0xffff << 16, NFC_V3_WRPROT_UNLOCK_BLK_ADD0 + (i << 2));
writel           1283 drivers/mtd/nand/raw/mxc_nand.c 	writel(0, NFC_V3_IPC);
writel           1317 drivers/mtd/nand/raw/mxc_nand.c 	writel(config2, NFC_V3_CONFIG2);
writel           1328 drivers/mtd/nand/raw/mxc_nand.c 	writel(config3, NFC_V3_CONFIG3);
writel           1330 drivers/mtd/nand/raw/mxc_nand.c 	writel(0, NFC_V3_DELAY_LINE);
writel            219 drivers/mtd/nand/raw/mxic_nand.c 	writel(IDLY_CODE_VAL(0, idly_code) |
writel            224 drivers/mtd/nand/raw/mxic_nand.c 	writel(IDLY_CODE_VAL(4, idly_code) |
writel            299 drivers/mtd/nand/raw/mxic_nand.c 	writel(HC_CFG_NIO(8) | HC_CFG_TYPE(1, HC_CFG_TYPE_RAW_NAND) |
writel            302 drivers/mtd/nand/raw/mxic_nand.c 	writel(INT_STS_ALL, nfc->regs + INT_STS_EN);
writel            303 drivers/mtd/nand/raw/mxic_nand.c 	writel(INT_RDY_PIN, nfc->regs + INT_SIG_EN);
writel            304 drivers/mtd/nand/raw/mxic_nand.c 	writel(0x0, nfc->regs + ONFI_DIN_CNT(0));
writel            305 drivers/mtd/nand/raw/mxic_nand.c 	writel(0, nfc->regs + LRD_CFG);
writel            306 drivers/mtd/nand/raw/mxic_nand.c 	writel(0, nfc->regs + LRD_CTRL);
writel            307 drivers/mtd/nand/raw/mxic_nand.c 	writel(0x0, nfc->regs + HC_EN);
writel            312 drivers/mtd/nand/raw/mxic_nand.c 	writel(readl(nfc->regs + HC_CFG) | HC_CFG_MAN_CS_EN,
writel            314 drivers/mtd/nand/raw/mxic_nand.c 	writel(HC_CFG_MAN_CS_ASSERT | readl(nfc->regs + HC_CFG),
writel            320 drivers/mtd/nand/raw/mxic_nand.c 	writel(~HC_CFG_MAN_CS_ASSERT & readl(nfc->regs + HC_CFG),
writel            361 drivers/mtd/nand/raw/mxic_nand.c 		writel(data, nfc->regs + TXD(nbytes % 4));
writel            403 drivers/mtd/nand/raw/mxic_nand.c 			writel(0, nfc->regs + HC_EN);
writel            404 drivers/mtd/nand/raw/mxic_nand.c 			writel(HC_EN_BIT, nfc->regs + HC_EN);
writel            405 drivers/mtd/nand/raw/mxic_nand.c 			writel(OP_CMD_BUSW(OP_BUSW_8) |  OP_DUMMY_CYC(0x3F) |
writel            414 drivers/mtd/nand/raw/mxic_nand.c 			writel(OP_ADDR_BUSW(OP_BUSW_8) | OP_DUMMY_CYC(0x3F) |
writel            423 drivers/mtd/nand/raw/mxic_nand.c 			writel(0x0, nfc->regs + ONFI_DIN_CNT(0));
writel            424 drivers/mtd/nand/raw/mxic_nand.c 			writel(OP_DATA_BUSW(OP_BUSW_8) | OP_DUMMY_CYC(0x3F) |
writel            432 drivers/mtd/nand/raw/mxic_nand.c 			writel(instr->ctx.data.len,
writel            434 drivers/mtd/nand/raw/mxic_nand.c 			writel(OP_DATA_BUSW(OP_BUSW_8) | OP_DUMMY_CYC(0x3F),
writel            473 drivers/mtd/nand/raw/mxic_nand.c 		writel(DATA_STROB_EDO_EN, nfc->regs + DATA_STROB);
writel             64 drivers/mtd/nand/raw/ndfc.c 		writel(cmd & 0xFF, ndfc->ndfcbase + NDFC_CMD);
writel             66 drivers/mtd/nand/raw/ndfc.c 		writel(cmd & 0xFF, ndfc->ndfcbase + NDFC_ALE);
writel            201 drivers/mtd/nand/raw/omap2.c 	writel(u32_count, info->reg.gpmc_prefetch_config2);
writel            209 drivers/mtd/nand/raw/omap2.c 	writel(val, info->reg.gpmc_prefetch_config1);
writel            212 drivers/mtd/nand/raw/omap2.c 	writel(0x1, info->reg.gpmc_prefetch_control);
writel            230 drivers/mtd/nand/raw/omap2.c 	writel(0x0, info->reg.gpmc_prefetch_control);
writel            233 drivers/mtd/nand/raw/omap2.c 	writel(0x0, info->reg.gpmc_prefetch_config1);
writel            953 drivers/mtd/nand/raw/omap2.c 	writel(val, info->reg.gpmc_ecc_control);
writel            958 drivers/mtd/nand/raw/omap2.c 	writel(val, info->reg.gpmc_ecc_size_config);
writel            963 drivers/mtd/nand/raw/omap2.c 		writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
writel            966 drivers/mtd/nand/raw/omap2.c 		writel(ECCCLEAR, info->reg.gpmc_ecc_control);
writel            976 drivers/mtd/nand/raw/omap2.c 	writel(val, info->reg.gpmc_ecc_config);
writel           1103 drivers/mtd/nand/raw/omap2.c 	writel(ECC1, info->reg.gpmc_ecc_control);
writel           1107 drivers/mtd/nand/raw/omap2.c 	writel(val, info->reg.gpmc_ecc_size_config);
writel           1120 drivers/mtd/nand/raw/omap2.c 	writel(val, info->reg.gpmc_ecc_config);
writel           1123 drivers/mtd/nand/raw/omap2.c 	writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
writel             87 drivers/mtd/nand/raw/omap_elm.c 	writel(val, info->elm_base + offset);
writel             59 drivers/mtd/nand/raw/r852.c 	writel(cpu_to_le32(value), dev->mmio + address);
writel            353 drivers/mtd/nand/raw/s3c2410.c 	writel(cfg, info->regs + S3C2410_NFCONF);
writel            386 drivers/mtd/nand/raw/s3c2410.c 		writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT);
writel            435 drivers/mtd/nand/raw/s3c2410.c 	writel(cur, info->sel_reg);
writel            594 drivers/mtd/nand/raw/s3c2410.c 	writel(ctrl, info->regs + S3C2410_NFCONF);
writel            604 drivers/mtd/nand/raw/s3c2410.c 	writel(ctrl | S3C2412_NFCONT_INIT_MAIN_ECC,
writel            615 drivers/mtd/nand/raw/s3c2410.c 	writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT);
writel           1221 drivers/mtd/nand/raw/s3c2410.c 		writel(info->save_sel | info->sel_bit, info->sel_reg);
writel           1243 drivers/mtd/nand/raw/s3c2410.c 		writel(sel, info->sel_reg);
writel            117 drivers/mtd/nand/raw/sh_flctl.c 	writel(flctl->flintdmacr_base | AC1CLR | AC0CLR, FLINTDMACR(flctl));
writel            118 drivers/mtd/nand/raw/sh_flctl.c 	writel(flctl->flintdmacr_base, FLINTDMACR(flctl));
writel            242 drivers/mtd/nand/raw/sh_flctl.c 				writel(addr2, FLADR2(flctl));
writel            251 drivers/mtd/nand/raw/sh_flctl.c 	writel(addr, FLADR(flctl));
writel            330 drivers/mtd/nand/raw/sh_flctl.c 			writel(0, FL4ECCCR(flctl));
writel            356 drivers/mtd/nand/raw/sh_flctl.c 		writel(0, FL4ECCCR(flctl));
writel            406 drivers/mtd/nand/raw/sh_flctl.c 		writel(reg, FLINTDMACR(flctl));
writel            440 drivers/mtd/nand/raw/sh_flctl.c 	writel(reg, FLINTDMACR(flctl));
writel            510 drivers/mtd/nand/raw/sh_flctl.c 		writel(cpu_to_be32(buf[i]), FLDTFIFO(flctl));
writel            533 drivers/mtd/nand/raw/sh_flctl.c 		writel(buf[i], FLECFIFO(flctl));
writel            594 drivers/mtd/nand/raw/sh_flctl.c 	writel(flcmncr_val, FLCMNCR(flctl));
writel            595 drivers/mtd/nand/raw/sh_flctl.c 	writel(flcmdcr_val, FLCMDCR(flctl));
writel            596 drivers/mtd/nand/raw/sh_flctl.c 	writel(flcmcdr_val, FLCMCDR(flctl));
writel            631 drivers/mtd/nand/raw/sh_flctl.c 	writel(readl(FLCMNCR(flctl)) | ACM_SACCES_MODE | _4ECCCORRECT,
writel            633 drivers/mtd/nand/raw/sh_flctl.c 	writel(readl(FLCMDCR(flctl)) | page_sectors, FLCMDCR(flctl));
writel            634 drivers/mtd/nand/raw/sh_flctl.c 	writel(page_addr << 2, FLADR(flctl));
writel            665 drivers/mtd/nand/raw/sh_flctl.c 	writel(readl(FLCMNCR(flctl)) & ~(ACM_SACCES_MODE | _4ECCCORRECT),
writel            682 drivers/mtd/nand/raw/sh_flctl.c 		writel(16, FLDTCNTR(flctl));
writel            702 drivers/mtd/nand/raw/sh_flctl.c 	writel(readl(FLCMNCR(flctl)) | ACM_SACCES_MODE, FLCMNCR(flctl));
writel            703 drivers/mtd/nand/raw/sh_flctl.c 	writel(readl(FLCMDCR(flctl)) | page_sectors, FLCMDCR(flctl));
writel            704 drivers/mtd/nand/raw/sh_flctl.c 	writel(page_addr << 2, FLADR(flctl));
writel            713 drivers/mtd/nand/raw/sh_flctl.c 	writel(readl(FLCMNCR(flctl)) & ~ACM_SACCES_MODE, FLCMNCR(flctl));
writel            730 drivers/mtd/nand/raw/sh_flctl.c 		writel(16, FLDTCNTR(flctl));	/* set read size */
writel            815 drivers/mtd/nand/raw/sh_flctl.c 		writel(flctl->read_bytes, FLDTCNTR(flctl)); /* set read size */
writel            858 drivers/mtd/nand/raw/sh_flctl.c 			writel(0, FLDTCNTR(flctl));	/* set 0 size */
writel            874 drivers/mtd/nand/raw/sh_flctl.c 		writel(flctl->index, FLDTCNTR(flctl));	/* set write size */
writel            885 drivers/mtd/nand/raw/sh_flctl.c 		writel(flctl->read_bytes, FLDTCNTR(flctl)); /* set read size */
writel            894 drivers/mtd/nand/raw/sh_flctl.c 		writel(0, FLDTCNTR(flctl));	/* set 0 size */
writel            905 drivers/mtd/nand/raw/sh_flctl.c 	writel(flctl->read_bytes, FLDTCNTR(flctl));	/* set read size */
writel            925 drivers/mtd/nand/raw/sh_flctl.c 		writel(flctl->flcmncr_base, FLCMNCR(flctl));
writel            950 drivers/mtd/nand/raw/sh_flctl.c 			writel(HOLDEN, FLHOLDCR(flctl));
writel           1063 drivers/mtd/nand/raw/sh_flctl.c 	writel(flctl->flintdmacr_base, FLINTDMACR(flctl));
writel            429 drivers/mtd/nand/raw/stm32_fmc2_nand.c 	writel(pcr, fmc2->io_base + FMC2_PCR);
writel            269 drivers/mtd/nand/raw/sunxi_nand.c 	writel(st & NFC_INT_MASK, nfc->regs + NFC_REG_ST);
writel            270 drivers/mtd/nand/raw/sunxi_nand.c 	writel(~st & ien & NFC_INT_MASK, nfc->regs + NFC_REG_INT);
writel            289 drivers/mtd/nand/raw/sunxi_nand.c 		writel(events, nfc->regs + NFC_REG_INT);
writel            298 drivers/mtd/nand/raw/sunxi_nand.c 		writel(0, nfc->regs + NFC_REG_INT);
writel            307 drivers/mtd/nand/raw/sunxi_nand.c 	writel(events & NFC_INT_MASK, nfc->regs + NFC_REG_ST);
writel            334 drivers/mtd/nand/raw/sunxi_nand.c 	writel(0, nfc->regs + NFC_REG_ECC_CTL);
writel            335 drivers/mtd/nand/raw/sunxi_nand.c 	writel(NFC_RESET, nfc->regs + NFC_REG_CTL);
writel            372 drivers/mtd/nand/raw/sunxi_nand.c 	writel(readl(nfc->regs + NFC_REG_CTL) | NFC_RAM_METHOD,
writel            374 drivers/mtd/nand/raw/sunxi_nand.c 	writel(nchunks, nfc->regs + NFC_REG_SECTOR_NUM);
writel            375 drivers/mtd/nand/raw/sunxi_nand.c 	writel(chunksize, nfc->regs + NFC_REG_CNT);
writel            377 drivers/mtd/nand/raw/sunxi_nand.c 		writel(chunksize * nchunks, nfc->regs + NFC_REG_MDMA_CNT);
writel            388 drivers/mtd/nand/raw/sunxi_nand.c 	writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_RAM_METHOD,
writel            401 drivers/mtd/nand/raw/sunxi_nand.c 	writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_RAM_METHOD,
writel            424 drivers/mtd/nand/raw/sunxi_nand.c 	writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
writel            431 drivers/mtd/nand/raw/sunxi_nand.c 	writel(sunxi_nand->timing_ctl, nfc->regs + NFC_REG_TIMING_CTL);
writel            432 drivers/mtd/nand/raw/sunxi_nand.c 	writel(sunxi_nand->timing_cfg, nfc->regs + NFC_REG_TIMING_CFG);
writel            433 drivers/mtd/nand/raw/sunxi_nand.c 	writel(ctl, nfc->regs + NFC_REG_CTL);
writel            454 drivers/mtd/nand/raw/sunxi_nand.c 		writel(cnt, nfc->regs + NFC_REG_CNT);
writel            456 drivers/mtd/nand/raw/sunxi_nand.c 		writel(tmp, nfc->regs + NFC_REG_CMD);
writel            492 drivers/mtd/nand/raw/sunxi_nand.c 		writel(cnt, nfc->regs + NFC_REG_CNT);
writel            496 drivers/mtd/nand/raw/sunxi_nand.c 		writel(tmp, nfc->regs + NFC_REG_CMD);
writel            625 drivers/mtd/nand/raw/sunxi_nand.c 	writel(ecc_ctl | NFC_RANDOM_SEED(state), nfc->regs + NFC_REG_ECC_CTL);
writel            635 drivers/mtd/nand/raw/sunxi_nand.c 	writel(readl(nfc->regs + NFC_REG_ECC_CTL) | NFC_RANDOM_EN,
writel            646 drivers/mtd/nand/raw/sunxi_nand.c 	writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_EN,
writel            692 drivers/mtd/nand/raw/sunxi_nand.c 	writel(ecc_ctl, nfc->regs + NFC_REG_ECC_CTL);
writel            699 drivers/mtd/nand/raw/sunxi_nand.c 	writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_ECC_EN,
writel            743 drivers/mtd/nand/raw/sunxi_nand.c 	writel(sunxi_nfc_buf_to_user_data(oob),
writel            822 drivers/mtd/nand/raw/sunxi_nand.c 	writel(NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD | NFC_ECC_OP,
writel            929 drivers/mtd/nand/raw/sunxi_nand.c 	writel((NAND_CMD_RNDOUTSTART << 16) | (NAND_CMD_RNDOUT << 8) |
writel            934 drivers/mtd/nand/raw/sunxi_nand.c 	writel(NFC_PAGE_OP | NFC_DATA_SWAP_METHOD | NFC_DATA_TRANS,
writel           1051 drivers/mtd/nand/raw/sunxi_nand.c 	writel(NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD |
writel           1304 drivers/mtd/nand/raw/sunxi_nand.c 	writel((NAND_CMD_RNDIN << 8) | NAND_CMD_PAGEPROG,
writel           1309 drivers/mtd/nand/raw/sunxi_nand.c 	writel(NFC_PAGE_OP | NFC_DATA_SWAP_METHOD |
writel           1840 drivers/mtd/nand/raw/sunxi_nand.c 		writel(addrs[0], nfc->regs + NFC_REG_ADDR_LOW);
writel           1841 drivers/mtd/nand/raw/sunxi_nand.c 		writel(addrs[1], nfc->regs + NFC_REG_ADDR_HIGH);
writel           1845 drivers/mtd/nand/raw/sunxi_nand.c 		writel(extcmd,
writel           1851 drivers/mtd/nand/raw/sunxi_nand.c 		writel(cnt, nfc->regs + NFC_REG_CNT);
writel           1853 drivers/mtd/nand/raw/sunxi_nand.c 	writel(cmd, nfc->regs + NFC_REG_CMD);
writel           2122 drivers/mtd/nand/raw/sunxi_nand.c 	writel(0, nfc->regs + NFC_REG_INT);
writel           2141 drivers/mtd/nand/raw/sunxi_nand.c 			writel(readl(nfc->regs + NFC_REG_CTL) |
writel            180 drivers/mtd/nand/raw/vf610_nfc.c 	writel(val, nfc->regs + reg);
writel            274 drivers/mtd/spi-nor/aspeed-smc.c 	writel(reg, controller->regs + CONFIG_REG);
writel            290 drivers/mtd/spi-nor/aspeed-smc.c 	writel(ctl, chip->ctl);
writel            293 drivers/mtd/spi-nor/aspeed-smc.c 	writel(ctl, chip->ctl);
writel            304 drivers/mtd/spi-nor/aspeed-smc.c 	writel(ctl2, chip->ctl);	/* stop user CE control */
writel            305 drivers/mtd/spi-nor/aspeed-smc.c 	writel(ctl, chip->ctl);		/* default to fread or read mode */
writel            494 drivers/mtd/spi-nor/aspeed-smc.c 	writel(seg_newval, seg_reg);
writel            503 drivers/mtd/spi-nor/aspeed-smc.c 		writel(seg_oldval, seg_reg);
writel            603 drivers/mtd/spi-nor/aspeed-smc.c 	writel(reg, controller->regs + CONFIG_REG);
writel            616 drivers/mtd/spi-nor/aspeed-smc.c 	writel(reg, controller->regs + CONFIG_REG);
writel            631 drivers/mtd/spi-nor/aspeed-smc.c 	writel(reg, controller->regs + CE_CONTROL_REG);
writel            278 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(irq_status, cqspi->iobase + CQSPI_REG_IRQSTATUS);
writel            339 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_CMDCTRL);
writel            342 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_CMDCTRL);
writel            378 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(rdreg, reg_base + CQSPI_REG_RD_INSTR);
writel            433 drivers/mtd/spi-nor/cadence-quadspi.c 		writel(data, reg_base + CQSPI_REG_CMDWRITEDATALOWER);
writel            439 drivers/mtd/spi-nor/cadence-quadspi.c 			writel(data, reg_base + CQSPI_REG_CMDWRITEDATAUPPER);
writel            459 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(addr, reg_base + CQSPI_REG_CMDADDRESS);
writel            483 drivers/mtd/spi-nor/cadence-quadspi.c 		writel(0xFF, reg_base + CQSPI_REG_MODE_BIT);
writel            494 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_RD_INSTR);
writel            500 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_SIZE);
writel            517 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(from_addr, reg_base + CQSPI_REG_INDIRECTRDSTARTADDR);
writel            518 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(remaining, reg_base + CQSPI_REG_INDIRECTRDBYTES);
writel            521 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_IRQ_STATUS_MASK, reg_base + CQSPI_REG_IRQSTATUS);
writel            523 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_IRQ_MASK_RD, reg_base + CQSPI_REG_IRQMASK);
writel            526 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTRD_START_MASK,
writel            579 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, reg_base + CQSPI_REG_IRQMASK);
writel            582 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTRD_DONE_MASK, reg_base + CQSPI_REG_INDIRECTRD);
writel            588 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, reg_base + CQSPI_REG_IRQMASK);
writel            591 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK,
writel            605 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_WR_INSTR);
writel            607 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_RD_INSTR);
writel            612 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_SIZE);
writel            627 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(to_addr, reg_base + CQSPI_REG_INDIRECTWRSTARTADDR);
writel            628 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(remaining, reg_base + CQSPI_REG_INDIRECTWRBYTES);
writel            631 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_IRQ_STATUS_MASK, reg_base + CQSPI_REG_IRQSTATUS);
writel            633 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_IRQ_MASK_WR, reg_base + CQSPI_REG_IRQMASK);
writel            636 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTWR_START_MASK,
writel            690 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, reg_base + CQSPI_REG_IRQMASK);
writel            693 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTWR_DONE_MASK, reg_base + CQSPI_REG_INDIRECTWR);
writel            701 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, reg_base + CQSPI_REG_IRQMASK);
writel            704 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK,
writel            736 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_CONFIG);
writel            754 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, iobase + CQSPI_REG_SIZE);
writel            806 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, iobase + CQSPI_REG_DELAY);
writel            821 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_CONFIG);
writel            844 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_READCAPTURE);
writel            859 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, reg_base + CQSPI_REG_CONFIG);
writel           1177 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, cqspi->iobase + CQSPI_REG_REMAP);
writel           1180 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, cqspi->iobase + CQSPI_REG_IRQMASK);
writel           1183 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->fifo_depth / 2, cqspi->iobase + CQSPI_REG_SRAMPARTITION);
writel           1186 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->trigger_address,
writel           1190 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->fifo_depth * cqspi->fifo_width / 2,
writel           1193 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->fifo_depth * cqspi->fifo_width / 8,
writel           1199 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
writel            144 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_SPI_TIMING_CFG);
writel            187 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_CMD);
writel            190 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_DATA_NUM);
writel            193 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_OP_CFG);
writel            195 drivers/mtd/spi-nor/hisi-sfc.c 	writel(0xff, host->regbase + FMC_INT_CLR);
writel            197 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_OP);
writel            242 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_CFG);
writel            244 drivers/mtd/spi-nor/hisi-sfc.c 	writel(start_off, host->regbase + FMC_ADDRL);
writel            245 drivers/mtd/spi-nor/hisi-sfc.c 	writel(dma_buf, host->regbase + FMC_DMA_SADDR_D0);
writel            246 drivers/mtd/spi-nor/hisi-sfc.c 	writel(FMC_DMA_LEN_SET(len), host->regbase + FMC_DMA_LEN);
writel            256 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_OP_CFG);
writel            258 drivers/mtd/spi-nor/hisi-sfc.c 	writel(0xff, host->regbase + FMC_INT_CLR);
writel            263 drivers/mtd/spi-nor/hisi-sfc.c 	writel(reg, host->regbase + FMC_OP_DMA);
writel            318 drivers/mtd/spi-nor/intel-spi.c 				writel(val, ispi->base + BYT_BCR);
writel            350 drivers/mtd/spi-nor/intel-spi.c 	writel(val, ispi->base + HSFSTS_CTL);
writel            379 drivers/mtd/spi-nor/intel-spi.c 		writel(val, ispi->sregs + SSFSTS_CTL);
writel            422 drivers/mtd/spi-nor/intel-spi.c 	writel(opcode, ispi->sregs + OPMENU0);
writel            424 drivers/mtd/spi-nor/intel-spi.c 	writel(optype << 16 | preop, ispi->sregs + PREOP_OPTYPE);
writel            457 drivers/mtd/spi-nor/intel-spi.c 	writel(val, ispi->base + HSFSTS_CTL);
writel            523 drivers/mtd/spi-nor/intel-spi.c 	writel(val, ispi->sregs + SSFSTS_CTL);
writel            544 drivers/mtd/spi-nor/intel-spi.c 	writel(0, ispi->base + FADDR);
writel            582 drivers/mtd/spi-nor/intel-spi.c 			writel(opcode, ispi->sregs + PREOP_OPTYPE);
writel            593 drivers/mtd/spi-nor/intel-spi.c 	writel(0, ispi->base + FADDR);
writel            638 drivers/mtd/spi-nor/intel-spi.c 		writel(from, ispi->base + FADDR);
writel            646 drivers/mtd/spi-nor/intel-spi.c 		writel(val, ispi->base + HSFSTS_CTL);
writel            695 drivers/mtd/spi-nor/intel-spi.c 		writel(to, ispi->base + FADDR);
writel            711 drivers/mtd/spi-nor/intel-spi.c 		writel(val, ispi->base + HSFSTS_CTL);
writel            758 drivers/mtd/spi-nor/intel-spi.c 			writel(offs, ispi->base + FADDR);
writel            776 drivers/mtd/spi-nor/intel-spi.c 		writel(offs, ispi->base + FADDR);
writel            783 drivers/mtd/spi-nor/intel-spi.c 		writel(val, ispi->base + HSFSTS_CTL);
writel            211 drivers/mtd/spi-nor/mtk-quadspi.c 	writel(MTK_NOR_WR_BUF_ENABLE, mtk_nor->base + MTK_NOR_CFG2_REG);
writel            220 drivers/mtd/spi-nor/mtk-quadspi.c 	writel(MTK_NOR_WR_BUF_DISABLE, mtk_nor->base + MTK_NOR_CFG2_REG);
writel            312 drivers/mtd/spi-nor/mtk-quadspi.c 		writel(data, mtk_nor->base + MTK_NOR_PP_DATA_REG);
writel            435 drivers/mtd/spi-nor/mtk-quadspi.c 	writel(MTK_NOR_ENABLE_SF_CMD, mtk_nor->base + MTK_NOR_WRPROT_REG);
writel             82 drivers/mtd/spi-nor/nxp-spifi.c 	writel(SPIFI_STAT_RESET, spifi->io_base + SPIFI_STAT);
writel            115 drivers/mtd/spi-nor/nxp-spifi.c 	writel(spifi->mcmd, spifi->io_base + SPIFI_MCMD);
writel            140 drivers/mtd/spi-nor/nxp-spifi.c 	writel(cmd, spifi->io_base + SPIFI_CMD);
writel            163 drivers/mtd/spi-nor/nxp-spifi.c 	writel(cmd, spifi->io_base + SPIFI_CMD);
writel            198 drivers/mtd/spi-nor/nxp-spifi.c 	writel(to, spifi->io_base + SPIFI_ADDR);
writel            205 drivers/mtd/spi-nor/nxp-spifi.c 	writel(cmd, spifi->io_base + SPIFI_CMD);
writel            227 drivers/mtd/spi-nor/nxp-spifi.c 	writel(offs, spifi->io_base + SPIFI_ADDR);
writel            232 drivers/mtd/spi-nor/nxp-spifi.c 	writel(cmd, spifi->io_base + SPIFI_CMD);
writel            330 drivers/mtd/spi-nor/nxp-spifi.c 	writel(ctrl, spifi->io_base + SPIFI_CTRL);
writel            423 drivers/mtd/spi-nor/nxp-spifi.c 	writel(0, spifi->io_base + SPIFI_IDATA);
writel            424 drivers/mtd/spi-nor/nxp-spifi.c 	writel(0, spifi->io_base + SPIFI_MCMD);
writel            167 drivers/net/can/c_can/c_can_platform.c 	writel(val, priv->base + priv->regs[index]);
writel            241 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_IRQMASK_SET_ERR |
writel            315 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_RXSTCMD_REMOVE_MSG, priv->base + IFI_CANFD_RXSTCMD);
writel            316 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(rx_irq_mask, priv->base + IFI_CANFD_INTERRUPT);
writel            428 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv->base + IFI_CANFD_ERROR_CTR);
writel            429 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_INTERRUPT_ERROR_COUNTER,
writel            431 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_ERROR_CTR_ER_ENABLE, priv->base + IFI_CANFD_ERROR_CTR);
writel            622 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(clr_irq_mask, priv->base + IFI_CANFD_INTERRUPT);
writel            667 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel((tseg2 << IFI_CANFD_TIME_TIMEB_OFF) |
writel            678 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel((tseg2 << IFI_CANFD_TIME_TIMEB_OFF) |
writel            687 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_TDELAY_EN | tdc, priv->base + IFI_CANFD_TDELAY);
writel            695 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(mask, priv->base + IFI_CANFD_FILTER_MASK(id));
writel            696 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(ident, priv->base + IFI_CANFD_FILTER_IDENT(id));
writel            730 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_STCMD_HARDRESET, priv->base + IFI_CANFD_STCMD);
writel            731 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_STCMD_ENABLE_7_9_8_8_TIMING,
writel            738 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_RXSTCMD_RESET, priv->base + IFI_CANFD_RXSTCMD);
writel            739 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(0, priv->base + IFI_CANFD_RXSTCMD);
writel            740 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_TXSTCMD_RESET, priv->base + IFI_CANFD_TXSTCMD);
writel            741 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(0, priv->base + IFI_CANFD_TXSTCMD);
writel            744 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(0, priv->base + IFI_CANFD_REPEAT);
writel            745 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(0, priv->base + IFI_CANFD_SUSPEND);
writel            748 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel((u32)(~IFI_CANFD_INTERRUPT_SET_IRQ),
writel            772 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_ERROR_CTR_UNLOCK_MAGIC,
writel            774 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv->base + IFI_CANFD_ERROR_CTR);
writel            775 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_ERROR_CTR_ER_ENABLE, priv->base + IFI_CANFD_ERROR_CTR);
writel            778 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(stcmd, priv->base + IFI_CANFD_STCMD);
writel            786 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv->base + IFI_CANFD_ERROR_CTR);
writel            787 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(0, priv->base + IFI_CANFD_ERROR_CTR);
writel            790 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_STCMD_HARDRESET, priv->base + IFI_CANFD_STCMD);
writel            793 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(~0, priv->base + IFI_CANFD_IRQMASK);
writel            796 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel((u32)(~IFI_CANFD_INTERRUPT_SET_IRQ),
writel            914 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(txid, priv->base + IFI_CANFD_TXFIFO_ID);
writel            915 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(txdlc, priv->base + IFI_CANFD_TXFIFO_DLC);
writel            918 drivers/net/can/ifi_canfd/ifi_canfd.c 		writel(*(u32 *)(cf->data + i),
writel            922 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(0, priv->base + IFI_CANFD_TXFIFO_REPEATCOUNT);
writel            923 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(0, priv->base + IFI_CANFD_TXFIFO_SUSPEND_US);
writel            928 drivers/net/can/ifi_canfd/ifi_canfd.c 	writel(IFI_CANFD_TXSTCMD_ADD_MSG, priv->base + IFI_CANFD_TXSTCMD);
writel             35 drivers/net/can/m_can/m_can_platform.c 	writel(val, priv->base + reg);
writel             44 drivers/net/can/m_can/m_can_platform.c 	writel(val, priv->mram_base + offset);
writel            224 drivers/net/can/peak_canfd/peak_pciefd_main.c 	writel(val, priv->reg_base + reg);
writel            237 drivers/net/can/peak_canfd/peak_pciefd_main.c 	writel(val, priv->reg_base + reg);
writel            440 drivers/net/can/rcar/rcar_can.c 	writel((bcr << 8) | priv->clock_select, &priv->regs->bcr);
writel            474 drivers/net/can/rcar/rcar_can.c 	writel(0, &priv->regs->mkr_2_9[6]);
writel            475 drivers/net/can/rcar/rcar_can.c 	writel(0, &priv->regs->mkr_2_9[7]);
writel            477 drivers/net/can/rcar/rcar_can.c 	writel(0, &priv->regs->mkivlr1);
writel            479 drivers/net/can/rcar/rcar_can.c 	writel(0, &priv->regs->fidcr[0]);
writel            480 drivers/net/can/rcar/rcar_can.c 	writel(RCAR_CAN_FIDCR_IDE | RCAR_CAN_FIDCR_RTR, &priv->regs->fidcr[1]);
writel            482 drivers/net/can/rcar/rcar_can.c 	writel(RCAR_CAN_MIER1_RXFIE | RCAR_CAN_MIER1_TXFIE, &priv->regs->mier1);
writel            567 drivers/net/can/rcar/rcar_can.c 	writel(0, &priv->regs->mier0);
writel            568 drivers/net/can/rcar/rcar_can.c 	writel(0, &priv->regs->mier1);
writel            615 drivers/net/can/rcar/rcar_can.c 	writel(data, &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].id);
writel            564 drivers/net/can/rcar/rcar_canfd.c 	writel(data, reg);
writel            574 drivers/net/can/rcar/rcar_canfd.c 	writel(val, base + (offset));
writel            128 drivers/net/can/sja1000/ems_pci.c 	writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0,
writel            147 drivers/net/can/sja1000/ems_pci.c 	writel(PLX_ICSR_ENA_CLR, card->conf_addr + PLX_ICSR);
writel            265 drivers/net/can/sja1000/ems_pci.c 		writel(PITA2_MISC_CONFIG, card->conf_addr + PITA2_MISC);
writel            319 drivers/net/can/sja1000/ems_pci.c 				writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0,
writel            323 drivers/net/can/sja1000/ems_pci.c 				writel(PLX_ICSR_ENA_CLR,
writel            227 drivers/net/can/sun4i_can.c 	writel(val, priv->base + SUN4I_REG_CMD_ADDR);
writel            240 drivers/net/can/sun4i_can.c 		writel(mod_reg_val, priv->base + SUN4I_REG_MSEL_ADDR);
writel            261 drivers/net/can/sun4i_can.c 		writel(mod_reg_val, priv->base + SUN4I_REG_MSEL_ADDR);
writel            288 drivers/net/can/sun4i_can.c 	writel(cfg, priv->base + SUN4I_REG_BTIME_ADDR);
writel            330 drivers/net/can/sun4i_can.c 	writel(0x00000000, priv->base + SUN4I_REG_ACPC_ADDR);
writel            331 drivers/net/can/sun4i_can.c 	writel(0xFFFFFFFF, priv->base + SUN4I_REG_ACPM_ADDR);
writel            334 drivers/net/can/sun4i_can.c 	writel(0, priv->base + SUN4I_REG_ERRC_ADDR);
writel            338 drivers/net/can/sun4i_can.c 		writel(0xFF, priv->base + SUN4I_REG_INTEN_ADDR);
writel            340 drivers/net/can/sun4i_can.c 		writel(0xFF & ~SUN4I_INTEN_BERR,
writel            349 drivers/net/can/sun4i_can.c 	writel(mod_reg_val, priv->base + SUN4I_REG_MSEL_ADDR);
writel            381 drivers/net/can/sun4i_can.c 	writel(0, priv->base + SUN4I_REG_INTEN_ADDR);
writel            436 drivers/net/can/sun4i_can.c 		writel((id >> 21) & 0xFF, priv->base + SUN4I_REG_BUF1_ADDR);
writel            437 drivers/net/can/sun4i_can.c 		writel((id >> 13) & 0xFF, priv->base + SUN4I_REG_BUF2_ADDR);
writel            438 drivers/net/can/sun4i_can.c 		writel((id >> 5)  & 0xFF, priv->base + SUN4I_REG_BUF3_ADDR);
writel            439 drivers/net/can/sun4i_can.c 		writel((id << 3)  & 0xF8, priv->base + SUN4I_REG_BUF4_ADDR);
writel            442 drivers/net/can/sun4i_can.c 		writel((id >> 3) & 0xFF, priv->base + SUN4I_REG_BUF1_ADDR);
writel            443 drivers/net/can/sun4i_can.c 		writel((id << 5) & 0xE0, priv->base + SUN4I_REG_BUF2_ADDR);
writel            447 drivers/net/can/sun4i_can.c 		writel(cf->data[i], priv->base + (dreg + i * 4));
writel            449 drivers/net/can/sun4i_can.c 	writel(msg_flag_n, priv->base + SUN4I_REG_BUF0_ADDR);
writel            680 drivers/net/can/sun4i_can.c 		writel(isrc, priv->base + SUN4I_REG_INT_ADDR);
writel            173 drivers/net/dsa/b53/b53_mmap.c 		writel(value, regs + (page << 8) + reg);
writel            100 drivers/net/dsa/b53/b53_srab.c 	writel(ctrls, regs + B53_SRAB_CTRLS);
writel            122 drivers/net/dsa/b53/b53_srab.c 	writel(ctrls, regs + B53_SRAB_CTRLS);
writel            137 drivers/net/dsa/b53/b53_srab.c 	writel(cmdstat, regs + B53_SRAB_CMDSTAT);
writel            275 drivers/net/dsa/b53/b53_srab.c 	writel(value, regs + B53_SRAB_WD_L);
writel            296 drivers/net/dsa/b53/b53_srab.c 	writel(value, regs + B53_SRAB_WD_L);
writel            317 drivers/net/dsa/b53/b53_srab.c 	writel(value, regs + B53_SRAB_WD_L);
writel            338 drivers/net/dsa/b53/b53_srab.c 	writel((u32)value, regs + B53_SRAB_WD_L);
writel            339 drivers/net/dsa/b53/b53_srab.c 	writel((u16)(value >> 32), regs + B53_SRAB_WD_H);
writel            360 drivers/net/dsa/b53/b53_srab.c 	writel((u32)value, regs + B53_SRAB_WD_L);
writel            361 drivers/net/dsa/b53/b53_srab.c 	writel((u32)(value >> 32), regs + B53_SRAB_WD_H);
writel            389 drivers/net/dsa/b53/b53_srab.c 	writel(BIT(port->num), priv->regs + B53_SRAB_INTR);
writel            500 drivers/net/dsa/b53/b53_srab.c 	writel(reg, priv->regs + B53_SRAB_CTRLS);
writel            512 drivers/net/dsa/b53/b53_srab.c 	writel(0xffffffff, priv->regs + B53_SRAB_INTR);
writel            725 drivers/net/ethernet/adaptec/starfire.c 	writel(MiiSoftReset, base + TxMode);
writel            727 drivers/net/ethernet/adaptec/starfire.c 	writel(0, base + TxMode);
writel            730 drivers/net/ethernet/adaptec/starfire.c 	writel(1, base + PCIDeviceConfig);
writel            868 drivers/net/ethernet/adaptec/starfire.c 	writel(value, mdio_addr);
writel            891 drivers/net/ethernet/adaptec/starfire.c 	writel(0, ioaddr + GenCtrl);
writel            892 drivers/net/ethernet/adaptec/starfire.c 	writel(1, ioaddr + PCIDeviceConfig);
writel            924 drivers/net/ethernet/adaptec/starfire.c 	writel((np->rx_buf_sz << RxBufferLenShift) |
writel            933 drivers/net/ethernet/adaptec/starfire.c 	writel(RxChecksumIgnore |
writel            940 drivers/net/ethernet/adaptec/starfire.c 	writel((2 << TxHiPriFIFOThreshShift) |
writel            947 drivers/net/ethernet/adaptec/starfire.c 	writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + RxDescQHiAddr);
writel            948 drivers/net/ethernet/adaptec/starfire.c 	writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + TxRingHiAddr);
writel            949 drivers/net/ethernet/adaptec/starfire.c 	writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + CompletionHiAddr);
writel            950 drivers/net/ethernet/adaptec/starfire.c 	writel(np->rx_ring_dma, ioaddr + RxDescQAddr);
writel            951 drivers/net/ethernet/adaptec/starfire.c 	writel(np->tx_ring_dma, ioaddr + TxRingPtr);
writel            953 drivers/net/ethernet/adaptec/starfire.c 	writel(np->tx_done_q_dma, ioaddr + TxCompletionAddr);
writel            954 drivers/net/ethernet/adaptec/starfire.c 	writel(np->rx_done_q_dma |
writel            981 drivers/net/ethernet/adaptec/starfire.c 	writel(MiiSoftReset | np->tx_mode, ioaddr + TxMode);
writel            983 drivers/net/ethernet/adaptec/starfire.c 	writel(np->tx_mode, ioaddr + TxMode);
writel            985 drivers/net/ethernet/adaptec/starfire.c 	writel(np->tx_threshold, ioaddr + TxThreshold);
writel            987 drivers/net/ethernet/adaptec/starfire.c 	writel(np->intr_timer_ctrl, ioaddr + IntrTimerCtrl);
writel           1001 drivers/net/ethernet/adaptec/starfire.c 	writel(0x0f00ff00, ioaddr + GPIOCtrl);
writel           1004 drivers/net/ethernet/adaptec/starfire.c 	writel(IntrRxDone | IntrRxEmpty | IntrDMAErr |
writel           1009 drivers/net/ethernet/adaptec/starfire.c 	writel(0x00800000 | readl(ioaddr + PCIDeviceConfig),
writel           1014 drivers/net/ethernet/adaptec/starfire.c 	writel(ETH_P_8021Q, ioaddr + VlanType);
writel           1048 drivers/net/ethernet/adaptec/starfire.c 		writel(be32_to_cpup(&fw_rx_data[i]), ioaddr + RxGfpMem + i * 4);
writel           1050 drivers/net/ethernet/adaptec/starfire.c 		writel(be32_to_cpup(&fw_tx_data[i]), ioaddr + TxGfpMem + i * 4);
writel           1053 drivers/net/ethernet/adaptec/starfire.c 		writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl);
writel           1056 drivers/net/ethernet/adaptec/starfire.c 		writel(TxEnable|RxEnable, ioaddr + GenCtrl);
writel           1277 drivers/net/ethernet/adaptec/starfire.c 	writel(entry * (sizeof(starfire_tx_desc) / 8), np->base + TxProducerIdx);
writel           1340 drivers/net/ethernet/adaptec/starfire.c 				writel(enable, ioaddr + IntrEnable);
writel           1351 drivers/net/ethernet/adaptec/starfire.c 					writel(enable, ioaddr + IntrEnable);
writel           1569 drivers/net/ethernet/adaptec/starfire.c 		writel(IntrRxDone | IntrRxEmpty, ioaddr + IntrClear);
writel           1580 drivers/net/ethernet/adaptec/starfire.c 	writel(intr_status, ioaddr + IntrEnable);
writel           1680 drivers/net/ethernet/adaptec/starfire.c 			writel(np->tx_mode | MiiSoftReset, ioaddr + TxMode);
writel           1682 drivers/net/ethernet/adaptec/starfire.c 			writel(np->tx_mode, ioaddr + TxMode);
writel           1690 drivers/net/ethernet/adaptec/starfire.c 			writel(new_intr_timer_ctrl, ioaddr + IntrTimerCtrl);
writel           1706 drivers/net/ethernet/adaptec/starfire.c 			writel(++np->tx_threshold, np->base + TxThreshold);
writel           1842 drivers/net/ethernet/adaptec/starfire.c 	writel(rx_mode, ioaddr + RxFilterMode);
writel           1953 drivers/net/ethernet/adaptec/starfire.c 	writel(0, ioaddr + IntrEnable);
writel           1956 drivers/net/ethernet/adaptec/starfire.c 	writel(0, ioaddr + GenCtrl);
writel            756 drivers/net/ethernet/agere/et131x.c 	writel(csr, &adapter->regs->rxdma.csr);
writel            774 drivers/net/ethernet/agere/et131x.c 	writel(ET_RXDMA_CSR_HALT | ET_RXDMA_CSR_FBR1_ENABLE,
writel            792 drivers/net/ethernet/agere/et131x.c 	writel(ET_TXDMA_SNGL_EPKT | (PARM_DMA_CACHE_DEF << ET_TXDMA_CACHE_SHIFT),
writel            816 drivers/net/ethernet/agere/et131x.c 	writel(ET_MAC_CFG1_SOFT_RESET | ET_MAC_CFG1_SIM_RESET  |
writel            824 drivers/net/ethernet/agere/et131x.c 	writel(ipg, &macregs->ipg);
writel            828 drivers/net/ethernet/agere/et131x.c 	writel(0x00A1F037, &macregs->hfdp);
writel            831 drivers/net/ethernet/agere/et131x.c 	writel(0, &macregs->if_ctrl);
writel            833 drivers/net/ethernet/agere/et131x.c 	writel(ET_MAC_MIIMGMT_CLK_RST, &macregs->mii_mgmt_cfg);
writel            848 drivers/net/ethernet/agere/et131x.c 	writel(station1, &macregs->station_addr_1);
writel            849 drivers/net/ethernet/agere/et131x.c 	writel(station2, &macregs->station_addr_2);
writel            858 drivers/net/ethernet/agere/et131x.c 	writel(adapter->registry_jumbo_packet + 4, &macregs->max_fm_len);
writel            861 drivers/net/ethernet/agere/et131x.c 	writel(0, &macregs->cfg1);
writel            895 drivers/net/ethernet/agere/et131x.c 	writel(cfg1, &mac->cfg1);
writel            915 drivers/net/ethernet/agere/et131x.c 	writel(ifctrl, &mac->if_ctrl);
writel            916 drivers/net/ethernet/agere/et131x.c 	writel(cfg2, &mac->cfg2);
writel            931 drivers/net/ethernet/agere/et131x.c 	writel(ctl, &adapter->regs->txmac.ctl);
writel            989 drivers/net/ethernet/agere/et131x.c 		writel(hash1, &rxmac->multi_hash1);
writel            990 drivers/net/ethernet/agere/et131x.c 		writel(hash2, &rxmac->multi_hash2);
writel            991 drivers/net/ethernet/agere/et131x.c 		writel(hash3, &rxmac->multi_hash3);
writel            992 drivers/net/ethernet/agere/et131x.c 		writel(hash4, &rxmac->multi_hash4);
writel           1030 drivers/net/ethernet/agere/et131x.c 		writel(uni_pf1, &rxmac->uni_pf_addr1);
writel           1031 drivers/net/ethernet/agere/et131x.c 		writel(uni_pf2, &rxmac->uni_pf_addr2);
writel           1032 drivers/net/ethernet/agere/et131x.c 		writel(uni_pf3, &rxmac->uni_pf_addr3);
writel           1046 drivers/net/ethernet/agere/et131x.c 	writel(0x8, &rxmac->ctrl);
writel           1049 drivers/net/ethernet/agere/et131x.c 	writel(0, &rxmac->crc0);
writel           1050 drivers/net/ethernet/agere/et131x.c 	writel(0, &rxmac->crc12);
writel           1051 drivers/net/ethernet/agere/et131x.c 	writel(0, &rxmac->crc34);
writel           1058 drivers/net/ethernet/agere/et131x.c 		writel(0, wolw);
writel           1065 drivers/net/ethernet/agere/et131x.c 	writel(sa_lo, &rxmac->sa_lo);
writel           1069 drivers/net/ethernet/agere/et131x.c 	writel(sa_hi, &rxmac->sa_hi);
writel           1072 drivers/net/ethernet/agere/et131x.c 	writel(0, &rxmac->pf_ctrl);
writel           1079 drivers/net/ethernet/agere/et131x.c 		writel(0, &rxmac->uni_pf_addr1);
writel           1080 drivers/net/ethernet/agere/et131x.c 		writel(0, &rxmac->uni_pf_addr2);
writel           1081 drivers/net/ethernet/agere/et131x.c 		writel(0, &rxmac->uni_pf_addr3);
writel           1105 drivers/net/ethernet/agere/et131x.c 		writel(0x41, &rxmac->mcif_ctrl_max_seg);
writel           1107 drivers/net/ethernet/agere/et131x.c 		writel(0, &rxmac->mcif_ctrl_max_seg);
writel           1109 drivers/net/ethernet/agere/et131x.c 	writel(0, &rxmac->mcif_water_mark);
writel           1110 drivers/net/ethernet/agere/et131x.c 	writel(0, &rxmac->mif_ctrl);
writel           1111 drivers/net/ethernet/agere/et131x.c 	writel(0, &rxmac->space_avail);
writel           1127 drivers/net/ethernet/agere/et131x.c 		writel(0x30038, &rxmac->mif_ctrl);
writel           1129 drivers/net/ethernet/agere/et131x.c 		writel(0x30030, &rxmac->mif_ctrl);
writel           1137 drivers/net/ethernet/agere/et131x.c 	writel(pf_ctrl, &rxmac->pf_ctrl);
writel           1138 drivers/net/ethernet/agere/et131x.c 	writel(ET_RX_CTRL_RXMAC_ENABLE | ET_RX_CTRL_WOL_DISABLE, &rxmac->ctrl);
writel           1150 drivers/net/ethernet/agere/et131x.c 		writel(0, &txmac->cf_param);
writel           1152 drivers/net/ethernet/agere/et131x.c 		writel(0x40, &txmac->cf_param);
writel           1163 drivers/net/ethernet/agere/et131x.c 		writel(0, reg);
writel           1169 drivers/net/ethernet/agere/et131x.c 	writel(0xFFFFBE32, &macstat->carry_reg1_mask);
writel           1170 drivers/net/ethernet/agere/et131x.c 	writel(0xFFFE7E8B, &macstat->carry_reg2_mask);
writel           1190 drivers/net/ethernet/agere/et131x.c 	writel(0, &mac->mii_mgmt_cmd);
writel           1193 drivers/net/ethernet/agere/et131x.c 	writel(ET_MAC_MII_ADDR(addr, reg), &mac->mii_mgmt_addr);
writel           1195 drivers/net/ethernet/agere/et131x.c 	writel(0x1, &mac->mii_mgmt_cmd);
writel           1221 drivers/net/ethernet/agere/et131x.c 	writel(0, &mac->mii_mgmt_cmd);
writel           1226 drivers/net/ethernet/agere/et131x.c 	writel(mii_addr, &mac->mii_mgmt_addr);
writel           1227 drivers/net/ethernet/agere/et131x.c 	writel(mii_cmd, &mac->mii_mgmt_cmd);
writel           1259 drivers/net/ethernet/agere/et131x.c 	writel(0, &mac->mii_mgmt_cmd);
writel           1262 drivers/net/ethernet/agere/et131x.c 	writel(ET_MAC_MII_ADDR(addr, reg), &mac->mii_mgmt_addr);
writel           1265 drivers/net/ethernet/agere/et131x.c 	writel(value, &mac->mii_mgmt_ctrl);
writel           1289 drivers/net/ethernet/agere/et131x.c 	writel(0, &mac->mii_mgmt_cmd);
writel           1294 drivers/net/ethernet/agere/et131x.c 	writel(mii_addr, &mac->mii_mgmt_addr);
writel           1295 drivers/net/ethernet/agere/et131x.c 	writel(mii_cmd, &mac->mii_mgmt_cmd);
writel           1385 drivers/net/ethernet/agere/et131x.c 	writel(carry_reg1, &adapter->regs->macstat.carry_reg1);
writel           1386 drivers/net/ethernet/agere/et131x.c 	writel(carry_reg2, &adapter->regs->macstat.carry_reg2);
writel           1503 drivers/net/ethernet/agere/et131x.c 	writel(0, &regs->rxq_start_addr);
writel           1504 drivers/net/ethernet/agere/et131x.c 	writel(INTERNAL_MEM_SIZE - 1, &regs->txq_end_addr);
writel           1512 drivers/net/ethernet/agere/et131x.c 		writel(PARM_RX_MEM_END_DEF, &regs->rxq_end_addr);
writel           1513 drivers/net/ethernet/agere/et131x.c 		writel(PARM_RX_MEM_END_DEF + 1, &regs->txq_start_addr);
writel           1516 drivers/net/ethernet/agere/et131x.c 		writel(INTERNAL_MEM_RX_OFFSET, &regs->rxq_end_addr);
writel           1517 drivers/net/ethernet/agere/et131x.c 		writel(INTERNAL_MEM_RX_OFFSET + 1, &regs->txq_start_addr);
writel           1524 drivers/net/ethernet/agere/et131x.c 		writel(0x01b3, &regs->rxq_end_addr);
writel           1525 drivers/net/ethernet/agere/et131x.c 		writel(0x01b4, &regs->txq_start_addr);
writel           1529 drivers/net/ethernet/agere/et131x.c 	writel(0, &regs->loopback);
writel           1531 drivers/net/ethernet/agere/et131x.c 	writel(0, &regs->msi_config);
writel           1536 drivers/net/ethernet/agere/et131x.c 	writel(0, &regs->watchdog_timer);
writel           1553 drivers/net/ethernet/agere/et131x.c 	writel(upper_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_hi);
writel           1554 drivers/net/ethernet/agere/et131x.c 	writel(lower_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_lo);
writel           1559 drivers/net/ethernet/agere/et131x.c 	writel(upper_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_hi);
writel           1560 drivers/net/ethernet/agere/et131x.c 	writel(lower_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_lo);
writel           1561 drivers/net/ethernet/agere/et131x.c 	writel(rx_local->psr_entries - 1, &rx_dma->psr_num_des);
writel           1562 drivers/net/ethernet/agere/et131x.c 	writel(0, &rx_dma->psr_full_offset);
writel           1565 drivers/net/ethernet/agere/et131x.c 	writel((psr_num_des * LO_MARK_PERCENT_FOR_PSR) / 100,
writel           1605 drivers/net/ethernet/agere/et131x.c 		writel(upper_32_bits(fbr->ring_physaddr), base_hi);
writel           1606 drivers/net/ethernet/agere/et131x.c 		writel(lower_32_bits(fbr->ring_physaddr), base_lo);
writel           1607 drivers/net/ethernet/agere/et131x.c 		writel(fbr->num_entries - 1, num_des);
writel           1608 drivers/net/ethernet/agere/et131x.c 		writel(ET_DMA10_WRAP, full_offset);
writel           1614 drivers/net/ethernet/agere/et131x.c 		writel(((fbr->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
writel           1623 drivers/net/ethernet/agere/et131x.c 	writel(PARM_RX_NUM_BUFS_DEF, &rx_dma->num_pkt_done);
writel           1630 drivers/net/ethernet/agere/et131x.c 	writel(PARM_RX_TIME_INT_DEF, &rx_dma->max_pkt_time);
writel           1646 drivers/net/ethernet/agere/et131x.c 	writel(upper_32_bits(tx_ring->tx_desc_ring_pa), &txdma->pr_base_hi);
writel           1647 drivers/net/ethernet/agere/et131x.c 	writel(lower_32_bits(tx_ring->tx_desc_ring_pa), &txdma->pr_base_lo);
writel           1650 drivers/net/ethernet/agere/et131x.c 	writel(NUM_DESC_PER_RING_TX - 1, &txdma->pr_num_des);
writel           1653 drivers/net/ethernet/agere/et131x.c 	writel(upper_32_bits(tx_ring->tx_status_pa), &txdma->dma_wb_base_hi);
writel           1654 drivers/net/ethernet/agere/et131x.c 	writel(lower_32_bits(tx_ring->tx_status_pa), &txdma->dma_wb_base_lo);
writel           1658 drivers/net/ethernet/agere/et131x.c 	writel(0, &txdma->service_request);
writel           1670 drivers/net/ethernet/agere/et131x.c 	writel(ET_MMC_ENABLE, &adapter->regs->mmc.mmc_ctrl);
writel           1693 drivers/net/ethernet/agere/et131x.c 	writel(reg, &adapter->regs->mac.cfg1);
writel           1696 drivers/net/ethernet/agere/et131x.c 	writel(reg, &adapter->regs->global.sw_reset);
writel           1700 drivers/net/ethernet/agere/et131x.c 	writel(reg, &adapter->regs->mac.cfg1);
writel           1701 drivers/net/ethernet/agere/et131x.c 	writel(0, &adapter->regs->mac.cfg1);
writel           1713 drivers/net/ethernet/agere/et131x.c 	writel(mask, &adapter->regs->global.int_mask);
writel           1718 drivers/net/ethernet/agere/et131x.c 	writel(INT_MASK_DISABLE, &adapter->regs->global.int_mask);
writel           1724 drivers/net/ethernet/agere/et131x.c 	writel(ET_TXDMA_CSR_HALT | ET_TXDMA_SNGL_EPKT,
writel           1798 drivers/net/ethernet/agere/et131x.c 	writel(pmcsr, &adapter->regs->global.pm_csr);
writel           1802 drivers/net/ethernet/agere/et131x.c 	writel(pmcsr, &adapter->regs->global.pm_csr);
writel           1814 drivers/net/ethernet/agere/et131x.c 	writel(pmcsr, &adapter->regs->global.pm_csr);
writel           2121 drivers/net/ethernet/agere/et131x.c 		writel(0, &adapter->regs->rxdma.max_pkt_time);
writel           2122 drivers/net/ethernet/agere/et131x.c 		writel(1, &adapter->regs->rxdma.num_pkt_done);
writel           2162 drivers/net/ethernet/agere/et131x.c 		writel(free_buff_ring, offset);
writel           2235 drivers/net/ethernet/agere/et131x.c 	writel(rx_local->local_psr_full, &adapter->regs->rxdma.psr_full_offset);
writel           2340 drivers/net/ethernet/agere/et131x.c 		writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO,
writel           2576 drivers/net/ethernet/agere/et131x.c 	writel(tx_ring->send_idx, &adapter->regs->txdma.service_request);
writel           2582 drivers/net/ethernet/agere/et131x.c 		writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO,
writel           3406 drivers/net/ethernet/agere/et131x.c 			writel(0, &adapter->regs->global.watchdog_timer);
writel           3454 drivers/net/ethernet/agere/et131x.c 				writel(3, &iomem->txmac.bp_ctrl);
writel           3713 drivers/net/ethernet/agere/et131x.c 		writel(pf_ctrl, &adapter->regs->rxmac.pf_ctrl);
writel           3714 drivers/net/ethernet/agere/et131x.c 		writel(ctrl, &adapter->regs->rxmac.ctrl);
writel           3971 drivers/net/ethernet/agere/et131x.c 	writel(ET_PMCSR_INIT,  &adapter->regs->global.pm_csr);
writel            103 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);
writel            116 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
writel            194 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(0, db->membase + EMAC_CTL_REG);
writel            196 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG);
writel            263 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val | EMAC_TX_MODE_ABORTED_FRAME_EN,
writel            269 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val | EMAC_MAC_CTL0_RX_FLOW_CTL_EN |
writel            278 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
writel            281 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG);
writel            284 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel((EMAC_MAC_IPGR_IPG1 << 8) | EMAC_MAC_IPGR_IPG2,
writel            288 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel((EMAC_MAC_CLRT_COLLISION_WINDOW << 8) | EMAC_MAC_CLRT_RM,
writel            292 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(EMAC_MAX_FRAME_LEN,
writel            311 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val | EMAC_RX_CTL_PASS_LEN_OOR_EN |
writel            327 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);
writel            334 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);
writel            340 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);
writel            343 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(0x0, db->membase + EMAC_RX_FBC_REG);
writel            346 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(0, db->membase + EMAC_INT_CTL_REG);
writel            348 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
writel            356 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(ndev->dev_addr[0] << 16 | ndev->dev_addr[1] << 8 | ndev->
writel            358 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(ndev->dev_addr[3] << 16 | ndev->dev_addr[4] << 8 | ndev->
writel            376 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(dev->dev_addr[0] << 16 | dev->dev_addr[1] << 8 | dev->
writel            378 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(dev->dev_addr[3] << 16 | dev->dev_addr[4] << 8 | dev->
writel            398 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val | EMAC_CTL_RESET | EMAC_CTL_TX_EN | EMAC_CTL_RX_EN,
writel            404 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);
writel            449 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(channel, db->membase + EMAC_TX_INS_REG);
writel            459 drivers/net/ethernet/allwinner/sun4i-emac.c 		writel(skb->len, db->membase + EMAC_TX_PL0_REG);
writel            461 drivers/net/ethernet/allwinner/sun4i-emac.c 		writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,
writel            468 drivers/net/ethernet/allwinner/sun4i-emac.c 		writel(skb->len, db->membase + EMAC_TX_PL1_REG);
writel            470 drivers/net/ethernet/allwinner/sun4i-emac.c 		writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,
writel            545 drivers/net/ethernet/allwinner/sun4i-emac.c 			writel(reg_val, db->membase + EMAC_RX_CTL_REG);
writel            552 drivers/net/ethernet/allwinner/sun4i-emac.c 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
writel            566 drivers/net/ethernet/allwinner/sun4i-emac.c 			writel(reg_val & ~EMAC_CTL_RX_EN,
writel            571 drivers/net/ethernet/allwinner/sun4i-emac.c 			writel(reg_val | (1 << 3),
writel            580 drivers/net/ethernet/allwinner/sun4i-emac.c 			writel(reg_val | EMAC_CTL_RX_EN,
writel            584 drivers/net/ethernet/allwinner/sun4i-emac.c 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
writel            667 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(0, db->membase + EMAC_INT_CTL_REG);
writel            673 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(int_status, db->membase + EMAC_INT_STA_REG);
writel            696 drivers/net/ethernet/allwinner/sun4i-emac.c 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);
writel            752 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(0, db->membase + EMAC_INT_CTL_REG);
writel            756 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
writel            761 drivers/net/ethernet/allwinner/sun4i-emac.c 	writel(reg_val, db->membase + EMAC_CTL_REG);
writel            615 drivers/net/ethernet/alteon/acenic.c 	writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
writel            617 drivers/net/ethernet/alteon/acenic.c 		writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
writel            622 drivers/net/ethernet/alteon/acenic.c 	writel(1, &regs->Mb0Lo);
writel            854 drivers/net/ethernet/alteon/acenic.c 	writel(*(u32 *)(cmd), &regs->CmdRng[idx]);
writel            857 drivers/net/ethernet/alteon/acenic.c 	writel(idx, &regs->CmdPrd);
writel            884 drivers/net/ethernet/alteon/acenic.c 	writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl);
writel            896 drivers/net/ethernet/alteon/acenic.c 	writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
writel            899 drivers/net/ethernet/alteon/acenic.c 	writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
writel            907 drivers/net/ethernet/alteon/acenic.c 	writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
writel            909 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->Mb0Lo);
writel            920 drivers/net/ethernet/alteon/acenic.c 		writel(0, &regs->LocalCtrl);
writel            929 drivers/net/ethernet/alteon/acenic.c 		writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
writel            936 drivers/net/ethernet/alteon/acenic.c 		writel(SRAM_BANK_512K, &regs->LocalCtrl);
writel            937 drivers/net/ethernet/alteon/acenic.c 		writel(SYNC_SRAM_TIMING, &regs->MiscCfg);
writel            956 drivers/net/ethernet/alteon/acenic.c 	writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
writel            959 drivers/net/ethernet/alteon/acenic.c 	writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
writel            989 drivers/net/ethernet/alteon/acenic.c 	writel(mac1, &regs->MacAddrHi);
writel            990 drivers/net/ethernet/alteon/acenic.c 	writel(mac2, &regs->MacAddrLo);
writel           1108 drivers/net/ethernet/alteon/acenic.c 	writel(tmp, &regs->PciState);
writel           1187 drivers/net/ethernet/alteon/acenic.c 	writel(tmp_ptr >> 32, &regs->InfoPtrHi);
writel           1188 drivers/net/ethernet/alteon/acenic.c 	writel(tmp_ptr & 0xffffffff, &regs->InfoPtrLo);
writel           1198 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->EvtCsm);
writel           1205 drivers/net/ethernet/alteon/acenic.c 		writel(0, &regs->CmdRng[i]);
writel           1207 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->CmdPrd);
writel           1208 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->CmdCsm);
writel           1284 drivers/net/ethernet/alteon/acenic.c 	writel(TX_RING_BASE, &regs->WinBase);
writel           1290 drivers/net/ethernet/alteon/acenic.c 			writel(0, (__force void __iomem *)ap->tx_ring  + i * 4);
writel           1319 drivers/net/ethernet/alteon/acenic.c 	writel(DMA_THRESH_16W, &regs->DmaReadCfg);
writel           1320 drivers/net/ethernet/alteon/acenic.c 	writel(DMA_THRESH_16W, &regs->DmaWriteCfg);
writel           1322 drivers/net/ethernet/alteon/acenic.c 	writel(DMA_THRESH_8W, &regs->DmaReadCfg);
writel           1323 drivers/net/ethernet/alteon/acenic.c 	writel(DMA_THRESH_8W, &regs->DmaWriteCfg);
writel           1326 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->MaskInt);
writel           1327 drivers/net/ethernet/alteon/acenic.c 	writel(1, &regs->IfIdx);
writel           1333 drivers/net/ethernet/alteon/acenic.c 	writel(1, &regs->AssistState);
writel           1336 drivers/net/ethernet/alteon/acenic.c 	writel(DEF_STAT, &regs->TuneStatTicks);
writel           1337 drivers/net/ethernet/alteon/acenic.c 	writel(DEF_TRACE, &regs->TuneTrace);
writel           1347 drivers/net/ethernet/alteon/acenic.c 			writel(tx_coal_tick[board_idx],
writel           1350 drivers/net/ethernet/alteon/acenic.c 			writel(max_tx_desc[board_idx], &regs->TuneMaxTxDesc);
writel           1353 drivers/net/ethernet/alteon/acenic.c 			writel(rx_coal_tick[board_idx],
writel           1356 drivers/net/ethernet/alteon/acenic.c 			writel(max_rx_desc[board_idx], &regs->TuneMaxRxDesc);
writel           1359 drivers/net/ethernet/alteon/acenic.c 			writel(trace[board_idx], &regs->TuneTrace);
writel           1362 drivers/net/ethernet/alteon/acenic.c 			writel(tx_ratio[board_idx], &regs->TxBufRat);
writel           1415 drivers/net/ethernet/alteon/acenic.c 	writel(tmp, &regs->TuneLink);
writel           1417 drivers/net/ethernet/alteon/acenic.c 		writel(tmp, &regs->TuneFastLink);
writel           1419 drivers/net/ethernet/alteon/acenic.c 	writel(ap->firmware_start, &regs->Pc);
writel           1421 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->Mb0Lo);
writel           1434 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->RxRetCsm);
writel           1442 drivers/net/ethernet/alteon/acenic.c 	writel(1, &regs->AssistState);  /* enable DMA */
writel           1447 drivers/net/ethernet/alteon/acenic.c 	writel(readl(&regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), &regs->CpuCtrl);
writel           1461 drivers/net/ethernet/alteon/acenic.c 		writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
writel           1474 drivers/net/ethernet/alteon/acenic.c 			writel(readl(&regs->CpuBCtrl) | CPU_HALT,
writel           1476 drivers/net/ethernet/alteon/acenic.c 		writel(0, &regs->Mb0Lo);
writel           1516 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_TX_COAL, &regs->TuneTxCoalTicks);
writel           1518 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_TX_MAX_DESC, &regs->TuneMaxTxDesc);
writel           1520 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_RX_COAL, &regs->TuneRxCoalTicks);
writel           1522 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_RX_MAX_DESC, &regs->TuneMaxRxDesc);
writel           1524 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_TX_RATIO, &regs->TxBufRat);
writel           1527 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_JUMBO_TX_COAL,
writel           1530 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_JUMBO_TX_MAX_DESC,
writel           1533 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_JUMBO_RX_COAL,
writel           1536 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_JUMBO_RX_MAX_DESC,
writel           1539 drivers/net/ethernet/alteon/acenic.c 				writel(DEF_JUMBO_TX_RATIO, &regs->TxBufRat);
writel           1677 drivers/net/ethernet/alteon/acenic.c 		writel(idx, &regs->RxStdPrd);
writel           1732 drivers/net/ethernet/alteon/acenic.c 	writel(idx, &regs->RxMiniPrd);
writel           1794 drivers/net/ethernet/alteon/acenic.c 		writel(idx, &regs->RxJumboPrd);
writel           1897 drivers/net/ethernet/alteon/acenic.c  				writel(0, &((ap->regs)->RxJumboPrd));
writel           2025 drivers/net/ethernet/alteon/acenic.c 		writel(idx, &ap->regs->RxRetCsm);
writel           2126 drivers/net/ethernet/alteon/acenic.c 	writel(0, &regs->Mb0Lo);
writel           2162 drivers/net/ethernet/alteon/acenic.c 		writel(evtcsm, &regs->EvtCsm);
writel           2239 drivers/net/ethernet/alteon/acenic.c 	writel(dev->mtu + ETH_HLEN + 4, &regs->IfMtu);
writel           2334 drivers/net/ethernet/alteon/acenic.c 				writel(0, &tx->addr.addrhi);
writel           2335 drivers/net/ethernet/alteon/acenic.c 				writel(0, &tx->addr.addrlo);
writel           2336 drivers/net/ethernet/alteon/acenic.c 				writel(0, &tx->flagsize);
writel           2394 drivers/net/ethernet/alteon/acenic.c 		writel(addr >> 32, &io->addr.addrhi);
writel           2395 drivers/net/ethernet/alteon/acenic.c 		writel(addr & 0xffffffff, &io->addr.addrlo);
writel           2396 drivers/net/ethernet/alteon/acenic.c 		writel(flagsize, &io->flagsize);
writel           2397 drivers/net/ethernet/alteon/acenic.c 		writel(vlan_tag, &io->vlanres);
writel           2549 drivers/net/ethernet/alteon/acenic.c 	writel(new_mtu + ETH_HLEN + 4, &regs->IfMtu);
writel           2683 drivers/net/ethernet/alteon/acenic.c 		writel(link, &regs->TuneLink);
writel           2685 drivers/net/ethernet/alteon/acenic.c 			writel(link, &regs->TuneFastLink);
writel           2730 drivers/net/ethernet/alteon/acenic.c 	writel(da[0] << 8 | da[1], &regs->MacAddrHi);
writel           2731 drivers/net/ethernet/alteon/acenic.c 	writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
writel           2825 drivers/net/ethernet/alteon/acenic.c 		writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
writel           2828 drivers/net/ethernet/alteon/acenic.c 			writel(be32_to_cpup(src), tdest);
writel           2851 drivers/net/ethernet/alteon/acenic.c 		writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
writel           2854 drivers/net/ethernet/alteon/acenic.c 			writel(0, tdest + i*4);
writel           2957 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           2962 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           2967 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           2972 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           2987 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           2997 drivers/net/ethernet/alteon/acenic.c 		writel(local, &regs->LocalCtrl);
writel           3003 drivers/net/ethernet/alteon/acenic.c 		writel(local, &regs->LocalCtrl);
writel           3008 drivers/net/ethernet/alteon/acenic.c 		writel(local, &regs->LocalCtrl);
writel           3022 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3027 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3035 drivers/net/ethernet/alteon/acenic.c 	writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
writel           3050 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3055 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3060 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3065 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3070 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3134 drivers/net/ethernet/alteon/acenic.c 		writel(local, &regs->LocalCtrl);
writel           3139 drivers/net/ethernet/alteon/acenic.c 		writel(local, &regs->LocalCtrl);
writel           3150 drivers/net/ethernet/alteon/acenic.c 		writel(local, &regs->LocalCtrl);
writel           3156 drivers/net/ethernet/alteon/acenic.c 			writel(local, &regs->LocalCtrl);
writel           3164 drivers/net/ethernet/alteon/acenic.c 	writel(local, &regs->LocalCtrl);
writel           3168 drivers/net/ethernet/alteon/acenic.c 	writel(readl(&regs->LocalCtrl) | EEPROM_CLK_OUT, &regs->LocalCtrl);
writel           3171 drivers/net/ethernet/alteon/acenic.c 	writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
writel            727 drivers/net/ethernet/alteon/acenic.h 	writel(value, &regs->TxPrd);
writel            734 drivers/net/ethernet/alteon/acenic.h 	writel(value, &regs->TxPrd);
writel            746 drivers/net/ethernet/alteon/acenic.h 		writel(1, &regs->MaskInt);
writel            748 drivers/net/ethernet/alteon/acenic.h 		writel(readl(&regs->HostCtrl) | MASK_INTS, &regs->HostCtrl);
writel            760 drivers/net/ethernet/alteon/acenic.h 		writel(0, &regs->MaskInt);
writel            762 drivers/net/ethernet/alteon/acenic.h 		writel(readl(&regs->HostCtrl) & ~MASK_INTS, &regs->HostCtrl);
writel            515 drivers/net/ethernet/altera/altera_tse.h 	writel(val, paddr);
writel            173 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, dev->reg_bar + ENA_REGS_AENQ_BASE_LO_OFF);
writel            174 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, dev->reg_bar + ENA_REGS_AENQ_BASE_HI_OFF);
writel            181 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(aenq_caps, dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF);
writel            280 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(admin_queue->sq.tail, admin_queue->sq.db_addr);
writel            829 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(mmio_read_reg, ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF);
writel           1516 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(depth, ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);
writel           1668 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(mask_value, ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF);
writel           1714 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF);
writel           1715 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF);
writel           1731 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF);
writel           1732 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF);
writel           1782 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, ena_dev->reg_bar + ENA_REGS_AQ_BASE_LO_OFF);
writel           1783 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, ena_dev->reg_bar + ENA_REGS_AQ_BASE_HI_OFF);
writel           1788 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_low, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_LO_OFF);
writel           1789 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(addr_high, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_HI_OFF);
writel           1803 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(aq_caps, ena_dev->reg_bar + ENA_REGS_AQ_CAPS_OFF);
writel           1804 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(acq_caps, ena_dev->reg_bar + ENA_REGS_ACQ_CAPS_OFF);
writel           2101 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF);
writel           2114 drivers/net/ethernet/amazon/ena/ena_com.c 	writel(0, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF);
writel             95 drivers/net/ethernet/amazon/ena/ena_eth_com.h 	writel(intr_reg->intr_control, io_cq->unmask_reg);
writel            182 drivers/net/ethernet/amazon/ena/ena_eth_com.h 	writel(tail, io_sq->db_addr);
writel            206 drivers/net/ethernet/amazon/ena/ena_eth_com.h 			writel(head, io_cq->cq_head_db_reg);
writel            225 drivers/net/ethernet/amazon/ena/ena_eth_com.h 	writel(numa_cfg.numa_cfg, io_cq->numa_node_cfg_reg);
writel            110 drivers/net/ethernet/amd/amd8111e.c 	writel( PHY_RD_CMD | ((phy_id & 0x1f) << 21) |
writel            139 drivers/net/ethernet/amd/amd8111e.c 	writel( PHY_WR_CMD | ((phy_id & 0x1f) << 21) |
writel            379 drivers/net/ethernet/amd/amd8111e.c 			writel(VAL0|STINTEN, mmio+INTEN0);
writel            380 drivers/net/ethernet/amd/amd8111e.c 			writel((u32)DLY_INT_A_R0|( event_count<< 16 )|timeout,
writel            393 drivers/net/ethernet/amd/amd8111e.c 			writel(VAL0|STINTEN,mmio+INTEN0);
writel            394 drivers/net/ethernet/amd/amd8111e.c 			writel((u32)DLY_INT_B_T0|( event_count<< 16 )|timeout,
writel            399 drivers/net/ethernet/amd/amd8111e.c 			writel(0,mmio+STVAL);
writel            400 drivers/net/ethernet/amd/amd8111e.c 			writel(STINTEN, mmio+INTEN0);
writel            401 drivers/net/ethernet/amd/amd8111e.c 			writel(0, mmio +DLY_INT_B);
writel            402 drivers/net/ethernet/amd/amd8111e.c 			writel(0, mmio+DLY_INT_A);
writel            406 drivers/net/ethernet/amd/amd8111e.c 			writel((u32)SOFT_TIMER_FREQ, mmio+STVAL); /*  0.5 sec */
writel            407 drivers/net/ethernet/amd/amd8111e.c 			writel(VAL0|STINTEN, mmio+INTEN0);
writel            425 drivers/net/ethernet/amd/amd8111e.c 	writel(RUN, mmio + CMD0);
writel            431 drivers/net/ethernet/amd/amd8111e.c 	writel((u32) VAL1|EN_PMGR, mmio + CMD3 );
writel            432 drivers/net/ethernet/amd/amd8111e.c 	writel((u32)XPHYANE|XPHYRST , mmio + CTRL2);
writel            439 drivers/net/ethernet/amd/amd8111e.c 	writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 );
writel            442 drivers/net/ethernet/amd/amd8111e.c 	writel( APINT5EN | APINT4EN | APINT3EN | APINT2EN | APINT1EN |
writel            446 drivers/net/ethernet/amd/amd8111e.c 	writel(VAL3 | LCINTEN | VAL1 | TINTEN0 | VAL0 | RINTEN0, mmio + INTEN0);
writel            449 drivers/net/ethernet/amd/amd8111e.c 	writel((u32)lp->tx_ring_dma_addr,mmio + XMT_RING_BASE_ADDR0);
writel            450 drivers/net/ethernet/amd/amd8111e.c 	writel((u32)lp->rx_ring_dma_addr,mmio+ RCV_RING_BASE_ADDR0);
writel            460 drivers/net/ethernet/amd/amd8111e.c 		writel((u32)VAL2|JUMBO, mmio + CMD3);
writel            462 drivers/net/ethernet/amd/amd8111e.c 		writel( REX_UFLO, mmio + CMD2);
writel            464 drivers/net/ethernet/amd/amd8111e.c 		writel( VAL0 | APAD_XMT|REX_RTRY , mmio + CMD2);
writel            466 drivers/net/ethernet/amd/amd8111e.c 		writel( VAL0 | APAD_XMT | REX_RTRY|REX_UFLO, mmio + CMD2);
writel            467 drivers/net/ethernet/amd/amd8111e.c 		writel((u32)JUMBO, mmio + CMD3);
writel            471 drivers/net/ethernet/amd/amd8111e.c 	writel((u32) VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3);
writel            473 drivers/net/ethernet/amd/amd8111e.c 	writel( VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2 );
writel            486 drivers/net/ethernet/amd/amd8111e.c 	writel(VAL2 | RDMD0, mmio + CMD0);
writel            487 drivers/net/ethernet/amd/amd8111e.c 	writel(VAL0 | INTREN | RUN, mmio + CMD0);
writel            503 drivers/net/ethernet/amd/amd8111e.c 	writel(RUN, mmio + CMD0);
writel            509 drivers/net/ethernet/amd/amd8111e.c 	writel(0, mmio + RCV_RING_BASE_ADDR0);
writel            512 drivers/net/ethernet/amd/amd8111e.c 	writel(0, mmio + XMT_RING_BASE_ADDR0);
writel            513 drivers/net/ethernet/amd/amd8111e.c 	writel(0, mmio + XMT_RING_BASE_ADDR1);
writel            514 drivers/net/ethernet/amd/amd8111e.c 	writel(0, mmio + XMT_RING_BASE_ADDR2);
writel            515 drivers/net/ethernet/amd/amd8111e.c 	writel(0, mmio + XMT_RING_BASE_ADDR3);
writel            518 drivers/net/ethernet/amd/amd8111e.c 	writel(CMD0_CLEAR,mmio + CMD0);
writel            521 drivers/net/ethernet/amd/amd8111e.c 	writel(CMD2_CLEAR, mmio +CMD2);
writel            524 drivers/net/ethernet/amd/amd8111e.c 	writel(CMD7_CLEAR , mmio + CMD7);
writel            527 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio + DLY_INT_A);
writel            528 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio + DLY_INT_B);
writel            531 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio + FLOW_CONTROL);
writel            535 drivers/net/ethernet/amd/amd8111e.c 	writel(reg_val, mmio + INT0);
writel            538 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio + STVAL);
writel            541 drivers/net/ethernet/amd/amd8111e.c 	writel( INTEN0_CLEAR, mmio + INTEN0);
writel            544 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0 , mmio + LADRF);
writel            547 drivers/net/ethernet/amd/amd8111e.c 	writel( 0x80010,mmio + SRAM_SIZE);
writel            550 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio +  RCV_RING_LEN0);
writel            553 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio +  XMT_RING_LEN0);
writel            554 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio +  XMT_RING_LEN1);
writel            555 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio +  XMT_RING_LEN2);
writel            556 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio +  XMT_RING_LEN3);
writel            559 drivers/net/ethernet/amd/amd8111e.c 	writel(0x0, mmio + XMT_RING_LIMIT);
writel            571 drivers/net/ethernet/amd/amd8111e.c 		writel( VAL2|JUMBO, mmio + CMD3);
writel            573 drivers/net/ethernet/amd/amd8111e.c 	writel(VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3 );
writel            576 drivers/net/ethernet/amd/amd8111e.c 	writel(CTRL1_DEFAULT, mmio + CTRL1);
writel            591 drivers/net/ethernet/amd/amd8111e.c 	writel(INTREN, lp->mmio + CMD0);
writel            595 drivers/net/ethernet/amd/amd8111e.c 	writel(intr0, lp->mmio + INT0);
writel            605 drivers/net/ethernet/amd/amd8111e.c 	writel(RUN, lp->mmio + CMD0);
writel            779 drivers/net/ethernet/amd/amd8111e.c 		writel(VAL0|RINTEN0, mmio + INTEN0);
writel            780 drivers/net/ethernet/amd/amd8111e.c 		writel(VAL2 | RDMD0, mmio + CMD0);
writel           1095 drivers/net/ethernet/amd/amd8111e.c 	writel(INTREN, mmio + CMD0);
writel           1109 drivers/net/ethernet/amd/amd8111e.c 	writel(intr0, mmio + INT0);
writel           1115 drivers/net/ethernet/amd/amd8111e.c 			writel(RINTEN0, mmio + INTEN0);
writel           1121 drivers/net/ethernet/amd/amd8111e.c 			writel(RINTEN0, mmio + INTEN0);
writel           1138 drivers/net/ethernet/amd/amd8111e.c 	writel( VAL0 | INTREN,mmio + CMD0);
writel           1286 drivers/net/ethernet/amd/amd8111e.c 	writel( VAL1 | TDMD0, lp->mmio + CMD0);
writel           1287 drivers/net/ethernet/amd/amd8111e.c 	writel( VAL2 | RDMD0,lp->mmio + CMD0);
writel           1327 drivers/net/ethernet/amd/amd8111e.c 		writel( VAL2 | PROM, lp->mmio + CMD2);
writel           1331 drivers/net/ethernet/amd/amd8111e.c 		writel( PROM, lp->mmio + CMD2);
writel           1346 drivers/net/ethernet/amd/amd8111e.c 		writel(PROM, lp->mmio + CMD2);
writel           1535 drivers/net/ethernet/amd/amd8111e.c 	writel(RUN, lp->mmio + CMD0);
writel           1548 drivers/net/ethernet/amd/amd8111e.c 	writel( VAL1|MPPLBA, lp->mmio + CMD3);
writel           1549 drivers/net/ethernet/amd/amd8111e.c 	writel( VAL0|MPEN_SW, lp->mmio + CMD7);
writel           1560 drivers/net/ethernet/amd/amd8111e.c 	writel(VAL0|LCMODE_SW,lp->mmio + CMD7);
writel            783 drivers/net/ethernet/amd/amd8111e.h 		writel(*(u32*)(&_UlData), _memMap);	\
writel            784 drivers/net/ethernet/amd/amd8111e.h 		writel(*(u32*)((u8*)(&_UlData)+4), _memMap+4)
writel            255 drivers/net/ethernet/amd/au1000_eth.c 		writel(MAC_EN_CLOCK_ENABLE, aup->enable);
writel            258 drivers/net/ethernet/amd/au1000_eth.c 		writel((MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
writel            291 drivers/net/ethernet/amd/au1000_eth.c 	writel(mii_control, mii_control_reg);
writel            324 drivers/net/ethernet/amd/au1000_eth.c 	writel(value, mii_data_reg);
writel            325 drivers/net/ethernet/amd/au1000_eth.c 	writel(mii_control, mii_control_reg);
writel            375 drivers/net/ethernet/amd/au1000_eth.c 	writel(reg, &aup->mac->control);
writel            389 drivers/net/ethernet/amd/au1000_eth.c 	writel(reg, &aup->mac->control);
writel            440 drivers/net/ethernet/amd/au1000_eth.c 		writel(reg, &aup->mac->control);
writel            593 drivers/net/ethernet/amd/au1000_eth.c 	writel(MAC_EN_CLOCK_ENABLE, aup->enable);
writel            596 drivers/net/ethernet/amd/au1000_eth.c 	writel(0, aup->enable);
writel            709 drivers/net/ethernet/amd/au1000_eth.c 	writel(0, &aup->mac->control);
writel            714 drivers/net/ethernet/amd/au1000_eth.c 	writel(dev->dev_addr[5]<<8 | dev->dev_addr[4],
writel            716 drivers/net/ethernet/amd/au1000_eth.c 	writel(dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
writel            739 drivers/net/ethernet/amd/au1000_eth.c 	writel(control, &aup->mac->control);
writel            740 drivers/net/ethernet/amd/au1000_eth.c 	writel(0x8100, &aup->mac->vlan1_tag); /* activate vlan support */
writel           1048 drivers/net/ethernet/amd/au1000_eth.c 		writel(mc_filter[1], &aup->mac->multi_hash_high);
writel           1049 drivers/net/ethernet/amd/au1000_eth.c 		writel(mc_filter[0], &aup->mac->multi_hash_low);
writel           1053 drivers/net/ethernet/amd/au1000_eth.c 	writel(reg, &aup->mac->control);
writel           1190 drivers/net/ethernet/amd/au1000_eth.c 	writel(0, aup->enable);
writel            745 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c 		writel(val, base + RSS_CTRL0 + offset);
writel             50 drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c 	writel(value, hw->mmio + reg);
writel            533 drivers/net/ethernet/atheros/alx/hw.h 	writel(val, hw->hw_addr + reg);
writel            547 drivers/net/ethernet/atheros/atl1c/atl1c.h 		writel((value), ((a)->hw_addr + reg)))
writel            580 drivers/net/ethernet/atheros/atl1c/atl1c.h 		writel((value), (((a)->hw_addr + reg) + ((offset) << 2))))
writel            458 drivers/net/ethernet/atheros/atl1e/atl1e.h 		writel((value), ((a)->hw_addr + reg)))
writel            479 drivers/net/ethernet/atheros/atl1e/atl1e.h 		writel((value), (((a)->hw_addr + reg) + ((offset) << 2))))
writel             43 drivers/net/ethernet/broadcom/bgmac-platform.c 	writel(value, bgmac->plat.base + offset);
writel             53 drivers/net/ethernet/broadcom/bgmac-platform.c 	writel(value, bgmac->plat.idm_base + offset);
writel            127 drivers/net/ethernet/broadcom/bgmac-platform.c 	writel(NICPM_PADRING_CFG_INIT_VAL,
writel            146 drivers/net/ethernet/broadcom/bgmac-platform.c 	writel(val, bgmac->plat.nicpm_base + NICPM_IOMUX_CTRL);
writel           5705 drivers/net/ethernet/broadcom/bnx2.c 		writel(0, bp->regview + offset);
writel           5716 drivers/net/ethernet/broadcom/bnx2.c 		writel(0xffffffff, bp->regview + offset);
writel           5727 drivers/net/ethernet/broadcom/bnx2.c 		writel(save_val, bp->regview + offset);
writel           5731 drivers/net/ethernet/broadcom/bnx2.c 		writel(save_val, bp->regview + offset);
writel           7011 drivers/net/ethernet/broadcom/bnx2.h 	writel(val, bp->regview + offset)
writel            175 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h #define REG_WR(bp, offset, val)		writel((u32)val, REG_ADDR(bp, offset))
writel            164 drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c 	writel(U64_LO(msg_mapping),
writel            166 drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c 	writel(U64_HI(msg_mapping),
writel            274 drivers/net/ethernet/broadcom/bnxt/bnxt.c 		writel(DB_CP_IRQ_DIS_FLAGS, db)
writel            277 drivers/net/ethernet/broadcom/bnxt/bnxt.c 	writel(DB_CP_FLAGS | RING_CMP(idx), (db)->doorbell)
writel            283 drivers/net/ethernet/broadcom/bnxt/bnxt.c 	writel(DB_CP_REARM_FLAGS | RING_CMP(idx), (db)->doorbell)
writel           4256 drivers/net/ethernet/broadcom/bnxt/bnxt.c 		writel(0, bp->bar0 + bar_offset + i);
writel           4259 drivers/net/ethernet/broadcom/bnxt/bnxt.c 	writel(1, bp->bar0 + doorbell_offset);
writel           7084 drivers/net/ethernet/broadcom/bnxt/bnxt.c 	writel(reg_base, bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT +
writel           9073 drivers/net/ethernet/broadcom/bnxt/bnxt.c 		writel(BNXT_CAG_REG_BASE,
writel           10606 drivers/net/ethernet/broadcom/bnxt/bnxt.c 		writel(reg_off & BNXT_GRC_BASE_MASK,
writel           10611 drivers/net/ethernet/broadcom/bnxt/bnxt.c 		writel(val, bp->bar0 + reg_off);
writel           10614 drivers/net/ethernet/broadcom/bnxt/bnxt.c 		writel(val, bp->bar1 + reg_off);
writel           1862 drivers/net/ethernet/broadcom/bnxt/bnxt.h 	writel((val64) & 0xffffffff, db);	\
writel           1863 drivers/net/ethernet/broadcom/bnxt/bnxt.h 	writel((val64) >> 32, (db) + 4);	\
writel           1894 drivers/net/ethernet/broadcom/bnxt/bnxt.h 		writel(db_val, db->doorbell);
writel           1896 drivers/net/ethernet/broadcom/bnxt/bnxt.h 			writel(db_val, db->doorbell);
writel            353 drivers/net/ethernet/broadcom/cnic_if.h #define CNIC_WR(dev, off, val)		writel(val, dev->regview + off)
writel            476 drivers/net/ethernet/broadcom/tg3.c 	writel(val, tp->regs + off);
writel            486 drivers/net/ethernet/broadcom/tg3.c 	writel(val, tp->aperegs + off);
writel            506 drivers/net/ethernet/broadcom/tg3.c 	writel(val, tp->regs + off);
writel            600 drivers/net/ethernet/broadcom/tg3.c 	writel(val, mbox);
writel            602 drivers/net/ethernet/broadcom/tg3.c 		writel(val, mbox);
writel            615 drivers/net/ethernet/broadcom/tg3.c 	writel(val, tp->regs + off + GRCMBOX_BASE);
writel           16859 drivers/net/ethernet/broadcom/tg3.c 			writel(0x00000000, sram_base);
writel           16860 drivers/net/ethernet/broadcom/tg3.c 			writel(0x00000000, sram_base + 4);
writel           16861 drivers/net/ethernet/broadcom/tg3.c 			writel(0xffffffff, sram_base + 4);
writel           1120 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(1, sem_reg);
writel           1132 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           1135 drivers/net/ethernet/brocade/bna/bfa_ioc.c 		writel(0, ioc->ioc_regs.smem_page_start + loff);
writel           1156 drivers/net/ethernet/brocade/bna/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_init_sem_reg);
writel           1163 drivers/net/ethernet/brocade/bna/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_init_sem_reg);
writel           1175 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(1, ioc->ioc_regs.ioc_sem_reg);
writel           1178 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(1, ioc->ioc_regs.ioc_init_sem_reg);
writel           1207 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(1, ioc->ioc_regs.ioc_sem_reg);
writel           1232 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1250 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1264 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1278 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1291 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           1508 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(cmd.i, (pci_bar + FLI_CMD_REG));
writel           1518 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(addr.i, (pci_bar + FLI_ADDR_REG));
writel           1688 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(0, (bar + FLASH_SEM_LOCK_REG));
writel           1825 drivers/net/ethernet/brocade/bna/bfa_ioc.c 		writel(1, ioc->ioc_regs.lpu_mbox_cmd);
writel           1905 drivers/net/ethernet/brocade/bna/bfa_ioc.c 		writel(cpu_to_le32(msgp[i]),
writel           1909 drivers/net/ethernet/brocade/bna/bfa_ioc.c 		writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
writel           1914 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(1, ioc->ioc_regs.hfn_mbox_cmd);
writel           2022 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           2046 drivers/net/ethernet/brocade/bna/bfa_ioc.c 		writel(swab32(fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)]),
writel           2057 drivers/net/ethernet/brocade/bna/bfa_ioc.c 			writel(pgnum,
writel           2062 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(bfa_ioc_smem_pgnum(ioc, 0),
writel           2074 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(asicmode, ((ioc->ioc_regs.smem_page_start)
writel           2076 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(boot_type, ((ioc->ioc_regs.smem_page_start)
writel           2078 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(boot_env, ((ioc->ioc_regs.smem_page_start)
writel           2206 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           2220 drivers/net/ethernet/brocade/bna/bfa_ioc.c 			writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           2224 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
writel           2231 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(1, ioc->ioc_regs.ioc_init_sem_reg);
writel           2430 drivers/net/ethernet/brocade/bna/bfa_ioc.c 	writel(1, ioc->ioc_regs.lpu_mbox_cmd);
writel            131 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.ioc_usage_reg);
writel            133 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(0, ioc->ioc_regs.ioc_fail_sync);
writel            157 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
writel            182 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
writel            191 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__FW_INIT_HALT_P, ioc->ioc_regs.ll_halt);
writel            192 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__FW_INIT_HALT_P, ioc->ioc_regs.alt_ll_halt);
writel            419 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, rb + FNC_PERS_REG);
writel            429 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.lpu_read_stat);
writel            452 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(r32 & __MSIX_VT_OFST_,
writel            457 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__MSIX_VT_NUMVT_(HOSTFN_MSIX_DEFAULT - 1) |
writel            460 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(HOSTFN_MSIX_DEFAULT * bfa_ioc_pcifn(ioc),
writel            469 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0, ioc->ioc_regs.ioc_usage_reg);
writel            496 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(0, ioc->ioc_regs.ioc_fail_sync);
writel            497 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.ioc_usage_reg);
writel            498 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate);
writel            499 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(BFI_IOC_UNINIT, ioc->ioc_regs.alt_ioc_fwstate);
writel            512 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel((r32 | sync_pos), ioc->ioc_regs.ioc_fail_sync);
writel            522 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel((r32 & ~sync_msk), ioc->ioc_regs.ioc_fail_sync);
writel            530 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32 | bfa_ioc_ct_sync_pos(ioc), ioc->ioc_regs.ioc_fail_sync);
writel            556 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(bfa_ioc_ct_clear_sync_ackd(r32),
writel            558 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(BFI_IOC_FAIL, ioc->ioc_regs.ioc_fwstate);
writel            559 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(BFI_IOC_FAIL, ioc->ioc_regs.alt_ioc_fwstate);
writel            569 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel((r32 | sync_ackd), ioc->ioc_regs.ioc_fail_sync);
writel            578 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(fwstate, ioc->ioc_regs.ioc_fwstate);
writel            591 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(fwstate, ioc->ioc_regs.alt_ioc_fwstate);
writel            616 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(0, (rb + OP_MODE));
writel            617 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(__APP_EMS_CMLCKSEL |
writel            622 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(__GLOBAL_FCOE_MODE, (rb + OP_MODE));
writel            623 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(__APP_EMS_REFCKBUFEN1,
writel            626 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG));
writel            627 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG));
writel            628 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel            629 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel            630 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel            631 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel            632 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel            633 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel            634 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(pll_sclk |
writel            637 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(pll_fclk |
writel            640 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(pll_sclk |
writel            643 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(pll_fclk |
writel            648 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel            649 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel            650 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(pll_sclk |
writel            653 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(pll_fclk |
writel            658 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P0));
writel            659 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P1));
writel            663 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, (rb + PSS_CTL_REG));
writel            666 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(0, (rb + PMM_1T_RESET_REG_P0));
writel            667 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(0, (rb + PMM_1T_RESET_REG_P1));
writel            670 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__EDRAM_BISTR_START, (rb + MBIST_CTL_REG));
writel            673 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0, (rb + MBIST_CTL_REG));
writel            689 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_SCLK_CTL_REG));
writel            697 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_SCLK_CTL_REG));
writel            703 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32 | __ETH_CLK_ENABLE_PORT0,
writel            707 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32 | __ETH_CLK_ENABLE_PORT1,
writel            716 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32 | 0x1061731b, rb + CT2_APP_PLL_SCLK_CTL_REG);
writel            741 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, rb + CT2_APP_PLL_LCLK_CTL_REG);
writel            747 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, (rb + CT2_CHIP_MISC_PRG));
writel            753 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, rb + CT2_APP_PLL_LCLK_CTL_REG);
writel            761 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_LCLK_CTL_REG));
writel            776 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32, rb + PSS_CTL_REG);
writel            779 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__EDRAM_BISTR_START, rb + CT2_MBIST_CTL_REG);
writel            781 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(0, rb + CT2_MBIST_CTL_REG);
writel            796 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32 & ~__APP_PLL_SCLK_LOGIC_SOFT_RESET,
writel            803 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(r32 & ~__APP_PLL_LCLK_LOGIC_SOFT_RESET,
writel            807 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__CSI_MAC_RESET | __CSI_MAC_AHB_RESET,
writel            809 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__CSI_MAC_RESET | __CSI_MAC_AHB_RESET,
writel            835 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(__HALT_NFC_CONTROLLER, rb + CT2_NFC_CSR_CLR_REG);
writel            859 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(__RESET_AND_START_SCLK_LCLK_PLLS,
writel            880 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(__HALT_NFC_CONTROLLER, (rb + CT2_NFC_CSR_SET_REG));
writel            894 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(r32 & ~__APP_PLL_SCLK_LOGIC_SOFT_RESET,
writel            897 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(r32 & ~__APP_PLL_LCLK_LOGIC_SOFT_RESET,
writel            904 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(r32 & ~1, rb + PSS_GPIO_OUT_REG);
writel            906 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 		writel(r32 | 1, rb + PSS_GPIO_OE_REG);
writel            913 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(1, rb + CT2_LPU0_HOSTFN_MBOX0_MSK);
writel            914 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(1, rb + CT2_LPU1_HOSTFN_MBOX0_MSK);
writel            921 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 			writel(1, rb + CT2_LPU0_HOSTFN_CMD_STAT);
writel            926 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 			writel(1, rb + CT2_LPU1_HOSTFN_CMD_STAT);
writel            933 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, rb + CT2_BFA_IOC0_STATE_REG);
writel            934 drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, rb + CT2_BFA_IOC1_STATE_REG);
writel            159 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	writel(init_halt, (_bna)->ioceth.ioc.ioc_regs.ll_halt);	\
writel            166 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	writel(0xffffffff, (_bna)->regs.fn_int_mask);		\
writel            170 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	writel((new_mask), (bna)->regs.fn_int_mask)
writel            175 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	writel((mask | (bna)->bits.mbox_mask_bits |			\
writel            184 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	writel((mask & ~((bna)->bits.mbox_mask_bits |			\
writel            193 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 		writel(((_status) & ~(_bna)->bits.mbox_status_bits),	\
writel            225 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	(writel(BNA_DOORBELL_IB_INT_ACK(0, (_events)), \
writel            230 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	(writel(((_i_dbell)->doorbell_ack | (_events)), \
writel            252 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	writel(BNA_DOORBELL_IB_INT_DISABLE,				\
writel            262 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	(writel(BNA_DOORBELL_Q_PRD_IDX((_tcb)->producer_index), \
writel            266 drivers/net/ethernet/brocade/bna/bna_hw_defs.h 	(writel(BNA_DOORBELL_Q_PRD_IDX((_rcb)->producer_index), \
writel            398 drivers/net/ethernet/brocade/bna/bnad_debugfs.c 	writel(val, reg_addr);
writel            509 drivers/net/ethernet/calxeda/xgmac.c 	writel(reg | XGMAC_OMR_FTF, ioaddr + XGMAC_OMR);
writel            592 drivers/net/ethernet/calxeda/xgmac.c 	writel(value, ioaddr + XGMAC_CONTROL);
writel            596 drivers/net/ethernet/calxeda/xgmac.c 	writel(value, ioaddr + XGMAC_DMA_CONTROL);
writel            603 drivers/net/ethernet/calxeda/xgmac.c 	writel(value, ioaddr + XGMAC_DMA_CONTROL);
writel            607 drivers/net/ethernet/calxeda/xgmac.c 	writel(value, ioaddr + XGMAC_CONTROL);
writel            617 drivers/net/ethernet/calxeda/xgmac.c 		writel(data, ioaddr + XGMAC_ADDR_HIGH(num));
writel            619 drivers/net/ethernet/calxeda/xgmac.c 		writel(data, ioaddr + XGMAC_ADDR_LOW(num));
writel            621 drivers/net/ethernet/calxeda/xgmac.c 		writel(0, ioaddr + XGMAC_ADDR_HIGH(num));
writel            622 drivers/net/ethernet/calxeda/xgmac.c 		writel(0, ioaddr + XGMAC_ADDR_LOW(num));
writel            661 drivers/net/ethernet/calxeda/xgmac.c 		writel(flow, priv->base + XGMAC_FLOW_CTRL);
writel            665 drivers/net/ethernet/calxeda/xgmac.c 		writel(reg, priv->base + XGMAC_OMR);
writel            667 drivers/net/ethernet/calxeda/xgmac.c 		writel(0, priv->base + XGMAC_FLOW_CTRL);
writel            671 drivers/net/ethernet/calxeda/xgmac.c 		writel(reg, priv->base + XGMAC_OMR);
writel            773 drivers/net/ethernet/calxeda/xgmac.c 	writel(priv->dma_tx_phy, priv->base + XGMAC_DMA_TX_BASE_ADDR);
writel            774 drivers/net/ethernet/calxeda/xgmac.c 	writel(priv->dma_rx_phy, priv->base + XGMAC_DMA_RX_BASE_ADDR);
writel            912 drivers/net/ethernet/calxeda/xgmac.c 	writel(0, priv->base + XGMAC_DMA_INTR_ENA);
writel            917 drivers/net/ethernet/calxeda/xgmac.c 	writel(reg & ~DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL);
writel            926 drivers/net/ethernet/calxeda/xgmac.c 	writel(priv->dma_tx_phy, priv->base + XGMAC_DMA_TX_BASE_ADDR);
writel            927 drivers/net/ethernet/calxeda/xgmac.c 	writel(reg | DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL);
writel            929 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_STATUS_TU | DMA_STATUS_TPS | DMA_STATUS_NIS | DMA_STATUS_AIS,
writel            938 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_STATUS);
writel            939 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_INTR_ENA);
writel            954 drivers/net/ethernet/calxeda/xgmac.c 	writel(value, ioaddr + XGMAC_DMA_BUS_MODE);
writel            965 drivers/net/ethernet/calxeda/xgmac.c 	writel(value, ioaddr + XGMAC_DMA_BUS_MODE);
writel            967 drivers/net/ethernet/calxeda/xgmac.c 	writel(0, ioaddr + XGMAC_DMA_INTR_ENA);
writel            970 drivers/net/ethernet/calxeda/xgmac.c 	writel(XGMAC_INT_STAT_PMTIM, ioaddr + XGMAC_INT_STAT);
writel            973 drivers/net/ethernet/calxeda/xgmac.c 	writel(0x0077000E, ioaddr + XGMAC_DMA_AXI_BUS);
writel            979 drivers/net/ethernet/calxeda/xgmac.c 	writel(ctrl, ioaddr + XGMAC_CONTROL);
writel            981 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_CONTROL_OSF, ioaddr + XGMAC_DMA_CONTROL);
writel            984 drivers/net/ethernet/calxeda/xgmac.c 	writel(XGMAC_OMR_TSF | XGMAC_OMR_RFD | XGMAC_OMR_RFA |
writel            989 drivers/net/ethernet/calxeda/xgmac.c 	writel(1, ioaddr + XGMAC_MMC_CTRL);
writel           1036 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS);
writel           1037 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);
writel           1055 drivers/net/ethernet/calxeda/xgmac.c 	writel(0, priv->base + XGMAC_DMA_INTR_ENA);
writel           1134 drivers/net/ethernet/calxeda/xgmac.c 	writel(1, priv->base + XGMAC_DMA_TX_POLL);
writel           1335 drivers/net/ethernet/calxeda/xgmac.c 		writel(hash_filter[i], ioaddr + XGMAC_HASH(i));
writel           1337 drivers/net/ethernet/calxeda/xgmac.c 	writel(value, ioaddr + XGMAC_FRAME_FILTER);
writel           1448 drivers/net/ethernet/calxeda/xgmac.c 	writel(XGMAC_MMC_CTRL_CNT_FRZ, base + XGMAC_MMC_CTRL);
writel           1467 drivers/net/ethernet/calxeda/xgmac.c 	writel(0, base + XGMAC_MMC_CTRL);
writel           1502 drivers/net/ethernet/calxeda/xgmac.c 	writel(ctrl, ioaddr + XGMAC_CONTROL);
writel           1733 drivers/net/ethernet/calxeda/xgmac.c 	writel(1, priv->base + XGMAC_ADDR_HIGH(31));
writel           1739 drivers/net/ethernet/calxeda/xgmac.c 	writel(0, priv->base + XGMAC_DMA_INTR_ENA);
writel           1853 drivers/net/ethernet/calxeda/xgmac.c 	writel(pmt, ioaddr + XGMAC_PMT);
writel           1867 drivers/net/ethernet/calxeda/xgmac.c 	writel(0, priv->base + XGMAC_DMA_INTR_ENA);
writel           1873 drivers/net/ethernet/calxeda/xgmac.c 		writel(value, priv->base + XGMAC_DMA_CONTROL);
writel           1895 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS);
writel           1896 drivers/net/ethernet/calxeda/xgmac.c 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);
writel            553 drivers/net/ethernet/cavium/liquidio/lio_core.c 	writel(oct->droq[q_no]->max_count, oct->droq[q_no]->pkts_credit_reg);
writel           1215 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c 			writel(oct->droq[i]->max_count,
writel           4247 drivers/net/ethernet/cavium/liquidio/lio_main.c 		writel(octeon_dev->droq[j]->max_count,
writel           2399 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c 		writel(oct->droq[j]->max_count, oct->droq[j]->pkts_credit_reg);
writel           1342 drivers/net/ethernet/cavium/liquidio/octeon_device.c 	writel(addrhi, oct->reg_list.pci_win_rd_addr_hi);
writel           1347 drivers/net/ethernet/cavium/liquidio/octeon_device.c 	writel(addr & 0xffffffff, oct->reg_list.pci_win_rd_addr_lo);
writel           1369 drivers/net/ethernet/cavium/liquidio/octeon_device.c 	writel(val >> 32, oct->reg_list.pci_win_wr_data_hi);
writel           1373 drivers/net/ethernet/cavium/liquidio/octeon_device.c 	writel(val & 0xffffffff, oct->reg_list.pci_win_wr_data_lo);
writel           1442 drivers/net/ethernet/cavium/liquidio/octeon_device.c 		writel(droq->pkt_count - pkts_pend, droq->pkts_sent_reg);
writel           1448 drivers/net/ethernet/cavium/liquidio/octeon_device.c 		writel(iq->pkts_processed, iq->inst_cnt_reg);
writel            753 drivers/net/ethernet/cavium/liquidio/octeon_device.h 		writel(value, (oct_dev)->mmio[0].hw_addr + (reg_off))
writel            515 drivers/net/ethernet/cavium/liquidio/octeon_droq.c 		writel(desc_refilled, droq->pkts_credit_reg);
writel            712 drivers/net/ethernet/cavium/liquidio/octeon_droq.c 				writel(desc_refilled, droq->pkts_credit_reg);
writel            279 drivers/net/ethernet/cavium/liquidio/request_manager.c 		writel(iq->fill_cnt, iq->doorbell_reg);
writel            930 drivers/net/ethernet/chelsio/cxgb/cxgb2.c 	writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE);
writel            931 drivers/net/ethernet/chelsio/cxgb/cxgb2.c 	writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
writel            947 drivers/net/ethernet/chelsio/cxgb/cxgb2.c 	writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
writel             65 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(V_WRITE_DATA(wr_data) |
writel             71 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0, adapter->regs + A_ESPI_GOSTAT);
writel             92 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(F_ESPI_RX_CORE_RST, adapter->regs + A_ESPI_RX_RESET);
writel            111 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(F_ESPI_RX_CORE_RST | F_ESPI_RX_LNK_RST,
writel            129 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(enable, espi->adapter->regs + A_ESPI_INTR_ENABLE);
writel            130 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(pl_intr | F_PL_INTR_ESPI, espi->adapter->regs + A_PL_ENABLE);
writel            136 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0xffffffff, espi->adapter->regs + A_ESPI_INTR_STATUS);
writel            137 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(F_PL_INTR_ESPI, espi->adapter->regs + A_PL_CAUSE);
writel            144 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0, espi->adapter->regs + A_ESPI_INTR_ENABLE);
writel            145 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(pl_intr & ~F_PL_INTR_ESPI, espi->adapter->regs + A_PL_ENABLE);
writel            178 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(status, espi->adapter->regs + A_ESPI_INTR_STATUS);
writel            191 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN0);
writel            192 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN1);
writel            193 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN2);
writel            194 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN3);
writel            195 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x100, adapter->regs + A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK);
writel            196 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(wmark, adapter->regs + A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK);
writel            197 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(3, adapter->regs + A_ESPI_CALENDAR_LENGTH);
writel            198 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x08000008, adapter->regs + A_ESPI_TRAIN);
writel            199 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(V_RX_NPORTS(1) | V_TX_NPORTS(1), adapter->regs + A_PORT_CONFIG);
writel            204 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN0);
writel            205 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1f401f4, adapter->regs + A_ESPI_SCH_TOKEN1);
writel            206 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1f4, adapter->regs + A_ESPI_SCH_TOKEN2);
writel            207 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0xa00, adapter->regs + A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK);
writel            208 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x1ff, adapter->regs + A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK);
writel            209 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(1, adapter->regs + A_ESPI_CALENDAR_LENGTH);
writel            210 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(V_RX_NPORTS(4) | V_TX_NPORTS(4), adapter->regs + A_PORT_CONFIG);
writel            212 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0x08000008, adapter->regs + A_ESPI_TRAIN);
writel            220 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(1, adapter->regs + A_ESPI_CALENDAR_LENGTH);
writel            223 drivers/net/ethernet/chelsio/cxgb/espi.c 			writel(0xf00, adapter->regs + A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK);
writel            224 drivers/net/ethernet/chelsio/cxgb/espi.c 			writel(0x3c0, adapter->regs + A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK);
writel            226 drivers/net/ethernet/chelsio/cxgb/espi.c 			writel(0x7ff, adapter->regs + A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK);
writel            227 drivers/net/ethernet/chelsio/cxgb/espi.c 			writel(0x1ff, adapter->regs + A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK);
writel            230 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(0x1fff, adapter->regs + A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK);
writel            231 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(0x7ff, adapter->regs + A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK);
writel            233 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(V_RX_NPORTS(nports) | V_TX_NPORTS(nports), adapter->regs + A_PORT_CONFIG);
writel            243 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(0, adapter->regs + A_ESPI_TRAIN);
writel            246 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(V_OUT_OF_SYNC_COUNT(4) |
writel            249 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(nports == 4 ? 0x200040 : 0x1000080,
writel            252 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(0x800100, adapter->regs + A_ESPI_MAXBURST1_MAXBURST2);
writel            264 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(status_enable_extra | F_RXSTATUSENABLE,
writel            278 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL);
writel            309 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL);
writel            330 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(((espi->misc_ctrl & ~MON_MASK) | sel),
writel            333 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL);
writel            359 drivers/net/ethernet/chelsio/cxgb/espi.c 		writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL);
writel            363 drivers/net/ethernet/chelsio/cxgb/espi.c 			writel(espi->misc_ctrl | V_MONITORED_PORT_NUM(i),
writel            369 drivers/net/ethernet/chelsio/cxgb/espi.c 	writel(espi->misc_ctrl, adapter->regs + A_ESPI_MISC_CONTROL);
writel            156 drivers/net/ethernet/chelsio/cxgb/pm3393.c 	writel(pl_intr, cmac->adapter->regs + A_PL_ENABLE);
writel            238 drivers/net/ethernet/chelsio/cxgb/pm3393.c 	writel(pl_intr, cmac->adapter->regs + A_PL_CAUSE);
writel            484 drivers/net/ethernet/chelsio/cxgb/sge.c 			writel(F_CMDQ0_ENABLE, sge->adapter->regs + A_SG_DOORBELL);
writel            498 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(val, adapter->regs + A_SG_DOORBELL);
writel            722 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel((u32)addr, adapter->regs + base_reg_lo);
writel            723 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(addr >> 32, adapter->regs + base_reg_hi);
writel            724 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(size, adapter->regs + size_reg);
writel            739 drivers/net/ethernet/chelsio/cxgb/sge.c 		writel(sge->sge_control, adapter->regs + A_SG_CONTROL);
writel            752 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(0, ap->regs + A_SG_CONTROL);
writel            765 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(SGE_RX_SM_BUF_SIZE + 1, ap->regs + A_SG_FLTHRESHOLD);
writel            769 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel((u32)sge->respQ.size - 1, ap->regs + A_SG_RSPQUEUECREDIT);
writel            888 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(irqholdoff_reg, adapter->regs + A_SG_INTRTIMER);
writel            889 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(irq_reg, adapter->regs + A_SG_INT_ENABLE);
writel            907 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(val & ~SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_ENABLE);
writel            908 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(0, sge->adapter->regs + A_SG_INT_ENABLE);
writel            921 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(en, sge->adapter->regs + A_SG_INT_ENABLE);
writel            922 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(val | SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_ENABLE);
writel            930 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_CAUSE);
writel            931 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(0xffffffff, sge->adapter->regs + A_SG_INT_CAUSE);
writel            967 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(cause, adapter->regs + A_SG_INT_CAUSE);
writel           1338 drivers/net/ethernet/chelsio/cxgb/sge.c 			writel(F_CMDQ0_ENABLE, adapter->regs + A_SG_DOORBELL);
writel           1448 drivers/net/ethernet/chelsio/cxgb/sge.c 			writel(F_CMDQ0_ENABLE, adapter->regs + A_SG_DOORBELL);
writel           1529 drivers/net/ethernet/chelsio/cxgb/sge.c 			writel(q->credits, adapter->regs + A_SG_RSPQUEUECREDIT);
writel           1584 drivers/net/ethernet/chelsio/cxgb/sge.c 			writel(q->credits, adapter->regs + A_SG_RSPQUEUECREDIT);
writel           1608 drivers/net/ethernet/chelsio/cxgb/sge.c 		writel(adapter->sge->respQ.cidx,
writel           1621 drivers/net/ethernet/chelsio/cxgb/sge.c 		writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
writel           1628 drivers/net/ethernet/chelsio/cxgb/sge.c 				writel(sge->respQ.cidx, adapter->regs + A_SG_SLEEPING);
writel           1738 drivers/net/ethernet/chelsio/cxgb/sge.c 			writel(F_CMDQ0_ENABLE, adapter->regs + A_SG_DOORBELL);
writel           1897 drivers/net/ethernet/chelsio/cxgb/sge.c 			writel(F_CMDQ0_ENABLE, sge->adapter->regs + A_SG_DOORBELL);
writel           1911 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(sge->fixed_intrtimer, sge->adapter->regs + A_SG_INTRTIMER);
writel           1945 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(0, sge->adapter->regs + A_SG_CONTROL);
writel           1967 drivers/net/ethernet/chelsio/cxgb/sge.c 	writel(sge->sge_control, sge->adapter->regs + A_SG_CONTROL);
writel             85 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(addr, adapter->regs + A_TPI_ADDR);
writel             86 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(value, adapter->regs + A_TPI_WR_DATA);
writel             87 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(F_TPIWR, adapter->regs + A_TPI_CSR);
writel            114 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(addr, adapter->regs + A_TPI_ADDR);
writel            115 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(0, adapter->regs + A_TPI_CSR);
writel            142 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(V_TPIPAR(value), adapter->regs + A_TPI_PAR);
writel            206 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(cause, adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE);
writel            232 drivers/net/ethernet/chelsio/cxgb/subr.c 		writel(tp_cause, adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE);
writel            239 drivers/net/ethernet/chelsio/cxgb/subr.c 		writel(cause, adapter->regs + A_PL_CAUSE);
writel            784 drivers/net/ethernet/chelsio/cxgb/subr.c 		writel(pl_intr, adapter->regs + A_PL_ENABLE);
writel            806 drivers/net/ethernet/chelsio/cxgb/subr.c 		writel(0, adapter->regs + A_PL_ENABLE);
writel            834 drivers/net/ethernet/chelsio/cxgb/subr.c 		writel(pl_intr | F_PL_INTR_EXT | F_PL_INTR_PCIX,
writel            864 drivers/net/ethernet/chelsio/cxgb/subr.c 	writel(cause, adapter->regs + A_PL_CAUSE);
writel            970 drivers/net/ethernet/chelsio/cxgb/subr.c 		writel(val | F_READY | F_MC4_SLOW, adapter->regs + A_MC4_CFG);
writel            971 drivers/net/ethernet/chelsio/cxgb/subr.c 		writel(F_M_BUS_ENABLE | F_TCAM_RESET,
writel             32 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(val, ap->regs + A_TP_IN_CONFIG);
writel             33 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(F_TP_OUT_CSPI_CPL |
writel             37 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(V_IP_TTL(64) |
writel             47 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(F_ENABLE_TX_DROP | F_ENABLE_TX_ERROR |
writel             78 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(0xffffffff,
writel             80 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(tp_intr | FPGA_PCIX_INTERRUPT_TP,
writel             86 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(0, tp->adapter->regs + A_TP_INT_ENABLE);
writel             87 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(tp_intr | F_PL_INTR_TP,
writel             99 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(0, tp->adapter->regs + FPGA_TP_ADDR_INTERRUPT_ENABLE);
writel            100 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(tp_intr & ~FPGA_PCIX_INTERRUPT_TP,
writel            105 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(0, tp->adapter->regs + A_TP_INT_ENABLE);
writel            106 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(tp_intr & ~F_PL_INTR_TP,
writel            115 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(0xffffffff,
writel            117 drivers/net/ethernet/chelsio/cxgb/tp.c 		writel(FPGA_PCIX_INTERRUPT_TP, tp->adapter->regs + A_PL_CAUSE);
writel            121 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(0xffffffff, tp->adapter->regs + A_TP_INT_CAUSE);
writel            122 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(F_PL_INTR_TP, tp->adapter->regs + A_PL_CAUSE);
writel            136 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(cause, tp->adapter->regs + A_TP_INT_CAUSE);
writel            148 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(val, tp->adapter->regs + A_TP_GLOBAL_CONFIG);
writel            170 drivers/net/ethernet/chelsio/cxgb/tp.c 	writel(F_TP_RESET, adapter->regs +  A_TP_RESET);
writel            281 drivers/net/ethernet/chelsio/cxgb3/adapter.h 	writel(val, adapter->regs + reg_addr);
writel           1304 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h 	writel(val, adap->regs + reg_addr);
writel           1315 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h 	writel(val, addr);
writel           1316 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h 	writel(val >> 32, addr + 4);
writel           1312 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c 	writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
writel           2205 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c 			writel(PIDX_T5_V(pidx_inc) | QID_V(bar2_qid),
writel            558 drivers/net/ethernet/chelsio/cxgb4/sge.c 			writel(val | QID_V(q->bar2_qid),
writel           1010 drivers/net/ethernet/chelsio/cxgb4/sge.c 			writel(val | QID_V(q->bar2_qid),
writel           3275 drivers/net/ethernet/chelsio/cxgb4/sge.c 		writel(val | INGRESSQID_V(q->bar2_qid),
writel           3330 drivers/net/ethernet/chelsio/cxgb4/sge.c 		writel(val | INGRESSQID_V(q->bar2_qid),
writel            444 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h 	writel(val, adapter->regs + reg_addr);
writel            455 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h 	writel(val, addr);
writel            456 drivers/net/ethernet/chelsio/cxgb4vf/adapter.h 	writel(val >> 32, addr + 4);
writel            553 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 			writel(val | QID_V(fl->bar2_qid),
writel           1024 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 			writel(val | QID_V(tq->bar2_qid),
writel           1914 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 		writel(val | INGRESSQID_V(rspq->bar2_qid),
writel           2016 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 		writel(val | INGRESSQID_V(intrq->bar2_qid),
writel             39 drivers/net/ethernet/cisco/enic/vnic_dev.h 	writel(val & 0xffffffff, reg);
writel             40 drivers/net/ethernet/cisco/enic/vnic_dev.h 	writel(val >> 32, reg + 0x4UL);
writel            235 drivers/net/ethernet/cortina/gemini.c 	writel(reg, port->gmac_base + GMAC_CONFIG0);
writel            250 drivers/net/ethernet/cortina/gemini.c 	writel(reg, port->gmac_base + GMAC_CONFIG0);
writel            265 drivers/net/ethernet/cortina/gemini.c 	writel(val, port->gmac_base + GMAC_CONFIG0);
writel            286 drivers/net/ethernet/cortina/gemini.c 	writel(val, port->gmac_base + GMAC_CONFIG0);
writel            357 drivers/net/ethernet/cortina/gemini.c 	writel(status.bits32, port->gmac_base + GMAC_STATUS);
writel            401 drivers/net/ethernet/cortina/gemini.c 	writel(status.bits32, port->gmac_base + GMAC_STATUS);
writel            518 drivers/net/ethernet/cortina/gemini.c 	writel(config0.bits32, port->gmac_base + GMAC_CONFIG0);
writel            519 drivers/net/ethernet/cortina/gemini.c 	writel(config1.bits32, port->gmac_base + GMAC_CONFIG1);
writel            520 drivers/net/ethernet/cortina/gemini.c 	writel(config2.bits32, port->gmac_base + GMAC_CONFIG2);
writel            521 drivers/net/ethernet/cortina/gemini.c 	writel(config3.bits32, port->gmac_base + GMAC_CONFIG3);
writel            524 drivers/net/ethernet/cortina/gemini.c 	writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);
writel            526 drivers/net/ethernet/cortina/gemini.c 	writel(hw_weigh.bits32,
writel            528 drivers/net/ethernet/cortina/gemini.c 	writel(sw_weigh.bits32,
writel            585 drivers/net/ethernet/cortina/gemini.c 	writel(port->txq_dma_base | port->txq_order,
writel            697 drivers/net/ethernet/cortina/gemini.c 	writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
writel            725 drivers/net/ethernet/cortina/gemini.c 	writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0);
writel            726 drivers/net/ethernet/cortina/gemini.c 	writel(0, port->rxq_rwptr);
writel            780 drivers/net/ethernet/cortina/gemini.c 	writel(0, dma_reg);
writel            968 drivers/net/ethernet/cortina/gemini.c 	writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
writel            971 drivers/net/ethernet/cortina/gemini.c 	writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG);
writel            972 drivers/net/ethernet/cortina/gemini.c 	writel(geth->freeq_dma_base | geth->freeq_order,
writel           1012 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
writel           1087 drivers/net/ethernet/cortina/gemini.c 	writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
writel           1104 drivers/net/ethernet/cortina/gemini.c 	writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
writel           1122 drivers/net/ethernet/cortina/gemini.c 		writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
writel           1126 drivers/net/ethernet/cortina/gemini.c 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
writel           1321 drivers/net/ethernet/cortina/gemini.c 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
writel           1326 drivers/net/ethernet/cortina/gemini.c 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
writel           1331 drivers/net/ethernet/cortina/gemini.c 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
writel           1350 drivers/net/ethernet/cortina/gemini.c 	writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
writel           1417 drivers/net/ethernet/cortina/gemini.c 	writel(DEFAULT_Q0_INT_BIT << netdev->dev_id,
writel           1631 drivers/net/ethernet/cortina/gemini.c 	writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8),
writel           1721 drivers/net/ethernet/cortina/gemini.c 		writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8),
writel           1752 drivers/net/ethernet/cortina/gemini.c 	writel(dma_ctrl.bits32, dma_ctrl_reg);
writel           1763 drivers/net/ethernet/cortina/gemini.c 	writel(dma_ctrl.bits32, dma_ctrl_reg);
writel           1884 drivers/net/ethernet/cortina/gemini.c 	writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0);
writel           1885 drivers/net/ethernet/cortina/gemini.c 	writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1);
writel           1886 drivers/net/ethernet/cortina/gemini.c 	writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR);
writel           1897 drivers/net/ethernet/cortina/gemini.c 	writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0);
writel           1898 drivers/net/ethernet/cortina/gemini.c 	writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1);
writel           1899 drivers/net/ethernet/cortina/gemini.c 	writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2);
writel           2014 drivers/net/ethernet/cortina/gemini.c 	writel(reg, port->gmac_base + GMAC_CONFIG0);
writel           2257 drivers/net/ethernet/cortina/gemini.c 	writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
writel           2260 drivers/net/ethernet/cortina/gemini.c 	writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
writel           2286 drivers/net/ethernet/cortina/gemini.c 		writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
writel           2313 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
writel           2314 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
writel           2315 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
writel           2316 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
writel           2317 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
writel           2329 drivers/net/ethernet/cortina/gemini.c 	writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG);
writel           2330 drivers/net/ethernet/cortina/gemini.c 	writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG);
writel           2331 drivers/net/ethernet/cortina/gemini.c 	writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG);
writel           2332 drivers/net/ethernet/cortina/gemini.c 	writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG);
writel           2333 drivers/net/ethernet/cortina/gemini.c 	writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG);
writel           2336 drivers/net/ethernet/cortina/gemini.c 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
writel           2337 drivers/net/ethernet/cortina/gemini.c 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
writel           2338 drivers/net/ethernet/cortina/gemini.c 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
writel           2339 drivers/net/ethernet/cortina/gemini.c 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
writel           2340 drivers/net/ethernet/cortina/gemini.c 	writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
writel           2343 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
writel           2344 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG);
writel           2345 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG);
writel           2346 drivers/net/ethernet/cortina/gemini.c 	writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG);
writel           1764 drivers/net/ethernet/dec/tulip/de2104x.c 	writel(EE_ENB & ~EE_CS, ee_addr);
writel           1765 drivers/net/ethernet/dec/tulip/de2104x.c 	writel(EE_ENB, ee_addr);
writel           1770 drivers/net/ethernet/dec/tulip/de2104x.c 		writel(EE_ENB | dataval, ee_addr);
writel           1772 drivers/net/ethernet/dec/tulip/de2104x.c 		writel(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
writel           1776 drivers/net/ethernet/dec/tulip/de2104x.c 	writel(EE_ENB, ee_addr);
writel           1780 drivers/net/ethernet/dec/tulip/de2104x.c 		writel(EE_ENB | EE_SHIFT_CLK, ee_addr);
writel           1783 drivers/net/ethernet/dec/tulip/de2104x.c 		writel(EE_ENB, ee_addr);
writel           1788 drivers/net/ethernet/dec/tulip/de2104x.c 	writel(EE_ENB & ~EE_CS, ee_addr);
writel             16 drivers/net/ethernet/dnet.h 	writel((value), (port)->regs + DNET_##reg)
writel            593 drivers/net/ethernet/freescale/fec_main.c 	writel(0, txq->bd.reg_desc_active);
writel            788 drivers/net/ethernet/freescale/fec_main.c 		writel(0, txq->bd.reg_desc_active);
writel            894 drivers/net/ethernet/freescale/fec_main.c 		writel(0, fep->rx_queue[i]->bd.reg_desc_active);
writel            906 drivers/net/ethernet/freescale/fec_main.c 		writel(rxq->bd.dma, fep->hwp + FEC_R_DES_START(i));
writel            907 drivers/net/ethernet/freescale/fec_main.c 		writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_R_BUFF_SIZE(i));
writel            911 drivers/net/ethernet/freescale/fec_main.c 			writel(RCMR_MATCHEN | RCMR_CMP(i),
writel            917 drivers/net/ethernet/freescale/fec_main.c 		writel(txq->bd.dma, fep->hwp + FEC_X_DES_START(i));
writel            921 drivers/net/ethernet/freescale/fec_main.c 			writel(DMA_CLASS_EN | IDLE_SLOPE(i),
writel            963 drivers/net/ethernet/freescale/fec_main.c 		writel(0, fep->hwp + FEC_ECNTRL);
writel            965 drivers/net/ethernet/freescale/fec_main.c 		writel(1, fep->hwp + FEC_ECNTRL);
writel            974 drivers/net/ethernet/freescale/fec_main.c 	writel((__force u32)cpu_to_be32(temp_mac[0]),
writel            976 drivers/net/ethernet/freescale/fec_main.c 	writel((__force u32)cpu_to_be32(temp_mac[1]),
writel            980 drivers/net/ethernet/freescale/fec_main.c 	writel(0xffffffff, fep->hwp + FEC_IEVENT);
writel            992 drivers/net/ethernet/freescale/fec_main.c 		writel(0x04, fep->hwp + FEC_X_CNTRL);
writel            996 drivers/net/ethernet/freescale/fec_main.c 		writel(0x0, fep->hwp + FEC_X_CNTRL);
writel           1000 drivers/net/ethernet/freescale/fec_main.c 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
writel           1012 drivers/net/ethernet/freescale/fec_main.c 		writel(val, fep->hwp + FEC_RACC);
writel           1013 drivers/net/ethernet/freescale/fec_main.c 		writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL);
writel           1050 drivers/net/ethernet/freescale/fec_main.c 			writel(0, fep->hwp + FEC_MIIGSK_ENR);
writel           1063 drivers/net/ethernet/freescale/fec_main.c 			writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
writel           1066 drivers/net/ethernet/freescale/fec_main.c 			writel(2, fep->hwp + FEC_MIIGSK_ENR);
writel           1079 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
writel           1080 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
writel           1081 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
writel           1082 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
writel           1085 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
writel           1091 drivers/net/ethernet/freescale/fec_main.c 	writel(rcntl, fep->hwp + FEC_R_CNTRL);
writel           1096 drivers/net/ethernet/freescale/fec_main.c 	writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
writel           1097 drivers/net/ethernet/freescale/fec_main.c 	writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
writel           1104 drivers/net/ethernet/freescale/fec_main.c 		writel(1 << 8, fep->hwp + FEC_X_WMRK);
writel           1112 drivers/net/ethernet/freescale/fec_main.c 	writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT);
writel           1116 drivers/net/ethernet/freescale/fec_main.c 	writel(ecntl, fep->hwp + FEC_ECNTRL);
writel           1124 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
writel           1126 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
writel           1160 drivers/net/ethernet/freescale/fec_main.c 		writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
writel           1172 drivers/net/ethernet/freescale/fec_main.c 			writel(0, fep->hwp + FEC_ECNTRL);
writel           1174 drivers/net/ethernet/freescale/fec_main.c 			writel(1, fep->hwp + FEC_ECNTRL);
writel           1177 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
writel           1179 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_DEFAULT_IMASK | FEC_ENET_WAKEUP, fep->hwp + FEC_IMASK);
writel           1182 drivers/net/ethernet/freescale/fec_main.c 		writel(val, fep->hwp + FEC_ECNTRL);
writel           1185 drivers/net/ethernet/freescale/fec_main.c 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
writel           1190 drivers/net/ethernet/freescale/fec_main.c 		writel(2, fep->hwp + FEC_ECNTRL);
writel           1191 drivers/net/ethernet/freescale/fec_main.c 		writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
writel           1344 drivers/net/ethernet/freescale/fec_main.c 		writel(0, txq->bd.reg_desc_active);
writel           1447 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_ENET_RXF, fep->hwp + FEC_IEVENT);
writel           1596 drivers/net/ethernet/freescale/fec_main.c 		writel(0, rxq->bd.reg_desc_active);
writel           1655 drivers/net/ethernet/freescale/fec_main.c 	writel(int_events, fep->hwp + FEC_IEVENT);
writel           1663 drivers/net/ethernet/freescale/fec_main.c 			writel(FEC_NAPI_IMASK, fep->hwp + FEC_IMASK);
writel           1687 drivers/net/ethernet/freescale/fec_main.c 		writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
writel           1840 drivers/net/ethernet/freescale/fec_main.c 		writel(frame_start | FEC_MMFR_OP_ADDR_WRITE |
writel           1864 drivers/net/ethernet/freescale/fec_main.c 	writel(frame_start | frame_op |
writel           1908 drivers/net/ethernet/freescale/fec_main.c 		writel(frame_start | FEC_MMFR_OP_ADDR_WRITE |
writel           1928 drivers/net/ethernet/freescale/fec_main.c 	writel(frame_start | FEC_MMFR_OP_WRITE |
writel           2133 drivers/net/ethernet/freescale/fec_main.c 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
writel           2481 drivers/net/ethernet/freescale/fec_main.c 	writel(FEC_MIB_CTRLSTAT_DISABLE, fep->hwp + FEC_MIB_CTRLSTAT);
writel           2484 drivers/net/ethernet/freescale/fec_main.c 		writel(0, fep->hwp + fec_stats[i].offset);
writel           2487 drivers/net/ethernet/freescale/fec_main.c 	writel(0, fep->hwp + FEC_MIB_CTRLSTAT);
writel           2538 drivers/net/ethernet/freescale/fec_main.c 	writel(tx_itr, fep->hwp + FEC_TXIC0);
writel           2539 drivers/net/ethernet/freescale/fec_main.c 	writel(rx_itr, fep->hwp + FEC_RXIC0);
writel           2541 drivers/net/ethernet/freescale/fec_main.c 		writel(tx_itr, fep->hwp + FEC_TXIC1);
writel           2542 drivers/net/ethernet/freescale/fec_main.c 		writel(rx_itr, fep->hwp + FEC_RXIC1);
writel           2543 drivers/net/ethernet/freescale/fec_main.c 		writel(tx_itr, fep->hwp + FEC_TXIC2);
writel           2544 drivers/net/ethernet/freescale/fec_main.c 		writel(rx_itr, fep->hwp + FEC_RXIC2);
writel           3072 drivers/net/ethernet/freescale/fec_main.c 		writel(tmp, fep->hwp + FEC_R_CNTRL);
writel           3078 drivers/net/ethernet/freescale/fec_main.c 	writel(tmp, fep->hwp + FEC_R_CNTRL);
writel           3084 drivers/net/ethernet/freescale/fec_main.c 		writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
writel           3085 drivers/net/ethernet/freescale/fec_main.c 		writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
writel           3106 drivers/net/ethernet/freescale/fec_main.c 	writel(hash_high, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
writel           3107 drivers/net/ethernet/freescale/fec_main.c 	writel(hash_low, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
writel           3131 drivers/net/ethernet/freescale/fec_main.c 	writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
writel           3134 drivers/net/ethernet/freescale/fec_main.c 	writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
writel           3311 drivers/net/ethernet/freescale/fec_main.c 	writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK);
writel           3824 drivers/net/ethernet/freescale/fec_main.c 			writel(val, fep->hwp + FEC_ECNTRL);
writel            122 drivers/net/ethernet/freescale/fec_ptp.c 		writel(FEC_T_TF_MASK, fep->hwp + FEC_TCSR(fep->pps_channel));
writel            131 drivers/net/ethernet/freescale/fec_ptp.c 			writel(val, fep->hwp + FEC_TCSR(fep->pps_channel));
writel            146 drivers/net/ethernet/freescale/fec_ptp.c 		writel(tempval, fep->hwp + FEC_ATIME_CTRL);
writel            178 drivers/net/ethernet/freescale/fec_ptp.c 		writel(val, fep->hwp + FEC_TCCR(fep->pps_channel));
writel            186 drivers/net/ethernet/freescale/fec_ptp.c 		writel(val, fep->hwp + FEC_ATIME_CTRL);
writel            194 drivers/net/ethernet/freescale/fec_ptp.c 		writel(val, fep->hwp + FEC_TCSR(fep->pps_channel));
writel            199 drivers/net/ethernet/freescale/fec_ptp.c 		writel(fep->next_counter, fep->hwp + FEC_TCCR(fep->pps_channel));
writel            202 drivers/net/ethernet/freescale/fec_ptp.c 		writel(0, fep->hwp + FEC_TCSR(fep->pps_channel));
writel            229 drivers/net/ethernet/freescale/fec_ptp.c 	writel(tempval, fep->hwp + FEC_ATIME_CTRL);
writel            257 drivers/net/ethernet/freescale/fec_ptp.c 	writel(inc << FEC_T_INC_OFFSET, fep->hwp + FEC_ATIME_INC);
writel            260 drivers/net/ethernet/freescale/fec_ptp.c 	writel(FEC_COUNTER_PERIOD, fep->hwp + FEC_ATIME_EVT_PERIOD);
writel            262 drivers/net/ethernet/freescale/fec_ptp.c 	writel(FEC_T_CTRL_ENABLE | FEC_T_CTRL_PERIOD_RST,
writel            339 drivers/net/ethernet/freescale/fec_ptp.c 	writel(tmp, fep->hwp + FEC_ATIME_INC);
writel            341 drivers/net/ethernet/freescale/fec_ptp.c 	writel(corr_period, fep->hwp + FEC_ATIME_CORR);
writel            426 drivers/net/ethernet/freescale/fec_ptp.c 	writel(counter, fep->hwp + FEC_ATIME);
writel            546 drivers/net/ethernet/freescale/fec_ptp.c 		writel(fep->next_counter, fep->hwp + FEC_TCCR(channel));
writel            548 drivers/net/ethernet/freescale/fec_ptp.c 			writel(val, fep->hwp + FEC_TCSR(channel));
writel            413 drivers/net/ethernet/hisilicon/hip04_eth.c 	writel(val, priv->base + PPE_CFG_CPU_ADD_ADDR);
writel            131 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val | irqs, priv->glb_base + GLB_IRQ_ENA);
writel            139 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val & (~irqs), priv->glb_base + GLB_IRQ_ENA);
writel            204 drivers/net/ethernet/hisilicon/hisi_femac.c 		writel(status, priv->port_base + MAC_PORTSET);
writel            239 drivers/net/ethernet/hisilicon/hisi_femac.c 		writel(addr, priv->port_base + IQ_ADDR);
writel            260 drivers/net/ethernet/hisilicon/hisi_femac.c 		writel(IRQ_INT_RX_RDY, priv->glb_base + GLB_IRQ_RAW);
writel            316 drivers/net/ethernet/hisilicon/hisi_femac.c 		writel(ints & DEF_INT_MASK,
writel            338 drivers/net/ethernet/hisilicon/hisi_femac.c 		writel(ints & DEF_INT_MASK,
writel            435 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(reg, priv->glb_base + GLB_HOSTMAC_H16);
writel            438 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(reg, priv->glb_base + GLB_HOSTMAC_L32);
writel            449 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_SOFT_RESET);
writel            454 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_SOFT_RESET);
writel            476 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(IRQ_ENA_PORT0_MASK, priv->glb_base + GLB_IRQ_RAW);
writel            538 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(addr, priv->port_base + EQ_ADDR);
writel            539 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(skb->len + ETH_FCS_LEN, priv->port_base + EQFRM_LEN);
writel            576 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_MAC_H16(reg_n));
writel            590 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + low);
writel            596 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + high);
writel            609 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_FWCTRL);
writel            636 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_MACTCTRL);
writel            662 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_MACTCTRL);
writel            752 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->port_base + MAC_PORTSEL);
writel            755 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(IRQ_ENA_PORT0_MASK, priv->glb_base + GLB_IRQ_RAW);
writel            761 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_FWCTRL);
writel            765 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->glb_base + GLB_MACTCTRL);
writel            770 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->port_base + MAC_SET);
writel            774 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->port_base + RX_COALESCE_SET);
writel            777 drivers/net/ethernet/hisilicon/hisi_femac.c 	writel(val, priv->port_base + QLEN_SET);
writel           1019 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h 	writel(value, base + reg);
writel            172 drivers/net/ethernet/hisilicon/hns3/hns3_enet.c 	writel(mask_en, tqp_vector->mask_addr);
writel            209 drivers/net/ethernet/hisilicon/hns3/hns3_enet.c 	writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
writel            217 drivers/net/ethernet/hisilicon/hns3/hns3_enet.c 	writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
writel            225 drivers/net/ethernet/hisilicon/hns3/hns3_enet.c 	writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
writel            586 drivers/net/ethernet/hisilicon/hns3/hns3_enet.h 	writel(value, reg_addr + reg);
writel           1069 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h 	writel(value, base + reg);
writel           2962 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c 	writel(enable ? 1 : 0, vector->addr);
writel            258 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h 	writel(value, base + reg);
writel           1948 drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c 	writel(en ? 1 : 0, vector->addr);
writel            337 drivers/net/ethernet/huawei/hinic/hinic_hw_cmdq.c 	writel(db_info, CMDQ_DB_ADDR(cmdq->db_base, prod_idx));
writel            175 drivers/net/ethernet/huawei/hinic/hinic_hw_if.c 	writel(mask_bits, hwif->intr_regs_base + offset);
writel            244 drivers/net/ethernet/huawei/hinic/hinic_hw_if.h 	writel(cpu_to_be32(val), hwif->cfg_regs_bar + reg);
writel            644 drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c 	writel(sq_prepare_db(sq, prod_idx, cos), SQ_DB_ADDR(sq, prod_idx));
writel             54 drivers/net/ethernet/i825xx/sni_82596.c 	writel(0, lp->ca);
writel             70 drivers/net/ethernet/i825xx/sni_82596.c 		writel(v, lp->mpu_port);
writel             73 drivers/net/ethernet/i825xx/sni_82596.c 		writel(v, lp->mpu_port);
writel            665 drivers/net/ethernet/intel/e1000/e1000_ethtool.c 		writel(write & test[i], address);
writel            685 drivers/net/ethernet/intel/e1000/e1000_ethtool.c 	writel(write & mask, address);
writel           2838 drivers/net/ethernet/intel/e1000/e1000_hw.c 			writel(mdic, E1000_MDIO_CMD);
writel           2978 drivers/net/ethernet/intel/e1000/e1000_hw.c 			writel(mdic, E1000_MDIO_CMD);
writel           2002 drivers/net/ethernet/intel/e1000/e1000_main.c 	writel(0, hw->hw_addr + tx_ring->tdh);
writel           2003 drivers/net/ethernet/intel/e1000/e1000_main.c 	writel(0, hw->hw_addr + tx_ring->tdt);
writel           2125 drivers/net/ethernet/intel/e1000/e1000_main.c 	writel(0, hw->hw_addr + rx_ring->rdh);
writel           2126 drivers/net/ethernet/intel/e1000/e1000_main.c 	writel(0, hw->hw_addr + rx_ring->rdt);
writel           3271 drivers/net/ethernet/intel/e1000/e1000_main.c 			writel(tx_ring->next_to_use, hw->hw_addr + tx_ring->tdt);
writel           4542 drivers/net/ethernet/intel/e1000/e1000_main.c 		writel(i, adapter->hw.hw_addr + rx_ring->rdt);
writel           4657 drivers/net/ethernet/intel/e1000/e1000_main.c 		writel(i, hw->hw_addr + rx_ring->rdt);
writel             33 drivers/net/ethernet/intel/e1000/e1000_osdep.h 	(writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543)	\
writel             37 drivers/net/ethernet/intel/e1000/e1000_osdep.h     writel((value), ((a)->hw_addr + \
writel             72 drivers/net/ethernet/intel/e1000/e1000_osdep.h     writel((value), ((a)->flash_address + reg)))
writel            158 drivers/net/ethernet/intel/e1000e/ich8lan.c 	writel(val, hw->flash_address + reg);
writel            137 drivers/net/ethernet/intel/e1000e/netdev.c 	writel(val, hw->hw_addr + reg);
writel            612 drivers/net/ethernet/intel/e1000e/netdev.c 	writel(i, rx_ring->tail);
writel            629 drivers/net/ethernet/intel/e1000e/netdev.c 	writel(i, tx_ring->tail);
writel            697 drivers/net/ethernet/intel/e1000e/netdev.c 				writel(i, rx_ring->tail);
writel            797 drivers/net/ethernet/intel/e1000e/netdev.c 				writel(i << 1, rx_ring->tail);
writel            889 drivers/net/ethernet/intel/e1000e/netdev.c 			writel(i, rx_ring->tail);
writel           1950 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(itr, rx_ring->itr_register);
writel           1990 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(1000000000 / (rx_ring->itr_val * 256),
writel           1993 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(1, rx_ring->itr_register);
writel           2000 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(1000000000 / (tx_ring->itr_val * 256),
writel           2003 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(1, tx_ring->itr_register);
writel           2011 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(1000000000 / (rx_ring->itr_val * 256),
writel           2014 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(1, hw->hw_addr + E1000_EITR_82574(vector));
writel           2617 drivers/net/ethernet/intel/e1000e/netdev.c 			writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
writel           2929 drivers/net/ethernet/intel/e1000e/netdev.c 	writel(0, tx_ring->head);
writel           2933 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(0, tx_ring->tail);
writel           3253 drivers/net/ethernet/intel/e1000e/netdev.c 	writel(0, rx_ring->head);
writel           3257 drivers/net/ethernet/intel/e1000e/netdev.c 		writel(0, rx_ring->tail);
writel           5925 drivers/net/ethernet/intel/e1000e/netdev.c 				writel(tx_ring->next_to_use, tx_ring->tail);
writel             22 drivers/net/ethernet/intel/fm10k/fm10k_common.h 		writel((val), &hw_addr[(reg)]); \
writel             30 drivers/net/ethernet/intel/fm10k/fm10k_common.h 		writel((val), &sw_addr[(reg)]); \
writel            167 drivers/net/ethernet/intel/fm10k/fm10k_main.c 		writel(i, rx_ring->tail);
writel           1041 drivers/net/ethernet/intel/fm10k/fm10k_main.c 		writel(i, tx_ring->tail);
writel           1428 drivers/net/ethernet/intel/fm10k/fm10k_main.c 	writel(itr, q_vector->itr);
writel            724 drivers/net/ethernet/intel/fm10k/fm10k_pci.c 			writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
writel           1741 drivers/net/ethernet/intel/fm10k/fm10k_pci.c 		writel(FM10K_ITR_MASK_SET, q_vector->itr);
writel           1802 drivers/net/ethernet/intel/fm10k/fm10k_pci.c 		writel(FM10K_ITR_ENABLE, q_vector->itr);
writel           1825 drivers/net/ethernet/intel/fm10k/fm10k_pci.c 		writel(FM10K_ITR_MASK_SET, q_vector->itr);
writel           3345 drivers/net/ethernet/intel/i40e/i40e_main.c 	writel(0, ring->tail);
writel             26 drivers/net/ethernet/intel/i40e/i40e_osdep.h #define wr32(a, reg, value)	writel((value), ((a)->hw_addr + (reg)))
writel            156 drivers/net/ethernet/intel/i40e/i40e_txrx.c 	writel(tx_ring->next_to_use, tx_ring->tail);
writel           1496 drivers/net/ethernet/intel/i40e/i40e_txrx.c 	writel(val, rx_ring->tail);
writel           3474 drivers/net/ethernet/intel/i40e/i40e_txrx.c 		writel(i, tx_ring->tail);
writel             22 drivers/net/ethernet/intel/iavf/iavf_osdep.h #define wr32(a, reg, value)	writel((value), ((a)->hw_addr + (reg)))
writel            788 drivers/net/ethernet/intel/iavf/iavf_txrx.c 	writel(val, rx_ring->tail);
writel           2379 drivers/net/ethernet/intel/iavf/iavf_txrx.c 		writel(i, tx_ring->tail);
writel            101 drivers/net/ethernet/intel/ice/ice_lib.c 	writel(0, ring->tail);
writel             13 drivers/net/ethernet/intel/ice/ice_osdep.h #define wr32(a, reg, value)	writel((value), ((a)->hw_addr + (reg)))
writel            401 drivers/net/ethernet/intel/ice/ice_txrx.c 		writel(val, rx_ring->tail);
writel           1713 drivers/net/ethernet/intel/ice/ice_txrx.c 		writel(i, tx_ring->tail);
writel            360 drivers/net/ethernet/intel/igb/e1000_regs.h 		writel((val), &hw_addr[(reg)]); \
writel           1326 drivers/net/ethernet/intel/igb/igb_ethtool.c 				writel(test->write,
writel           4145 drivers/net/ethernet/intel/igb/igb_main.c 	writel(0, ring->tail);
writel           4497 drivers/net/ethernet/intel/igb/igb_main.c 	writel(0, ring->tail);
writel           6023 drivers/net/ethernet/intel/igb/igb_main.c 		writel(i, tx_ring->tail);
writel           6576 drivers/net/ethernet/intel/igb/igb_main.c 	writel(itr_val, q_vector->itr_register);
writel           8505 drivers/net/ethernet/intel/igb/igb_main.c 		writel(i, rx_ring->tail);
writel            360 drivers/net/ethernet/intel/igbvf/ethtool.c 	writel(adapter->current_itr,
writel            231 drivers/net/ethernet/intel/igbvf/netdev.c 		writel(i, adapter->hw.hw_addr + rx_ring->tail);
writel            518 drivers/net/ethernet/intel/igbvf/netdev.c 	writel(0, adapter->hw.hw_addr + tx_ring->head);
writel            519 drivers/net/ethernet/intel/igbvf/netdev.c 	writel(0, adapter->hw.hw_addr + tx_ring->tail);
writel            601 drivers/net/ethernet/intel/igbvf/netdev.c 	writel(0, adapter->hw.hw_addr + rx_ring->head);
writel            602 drivers/net/ethernet/intel/igbvf/netdev.c 	writel(0, adapter->hw.hw_addr + rx_ring->tail);
writel            874 drivers/net/ethernet/intel/igbvf/netdev.c 		writel(tx_ring->itr_val,
writel            905 drivers/net/ethernet/intel/igbvf/netdev.c 		writel(adapter->rx_ring->itr_val,
writel            983 drivers/net/ethernet/intel/igbvf/netdev.c 	writel(tx_ring->itr_val, hw->hw_addr + tx_ring->itr_register);
writel            986 drivers/net/ethernet/intel/igbvf/netdev.c 	writel(rx_ring->itr_val, hw->hw_addr + rx_ring->itr_register);
writel           2281 drivers/net/ethernet/intel/igbvf/netdev.c 	writel(i, adapter->hw.hw_addr + tx_ring->tail);
writel             77 drivers/net/ethernet/intel/igbvf/regs.h #define ew32(reg, val)	writel((val), hw->hw_addr +  E1000_##reg)
writel             81 drivers/net/ethernet/intel/igbvf/regs.h 	writel((val), hw->hw_addr +  E1000_##reg + (offset << 2))
writel            542 drivers/net/ethernet/intel/igc/igc_main.c 	writel(0, ring->tail);
writel            621 drivers/net/ethernet/intel/igc/igc_main.c 	writel(0, ring->tail);
writel           1059 drivers/net/ethernet/intel/igc/igc_main.c 		writel(i, tx_ring->tail);
writel           1553 drivers/net/ethernet/intel/igc/igc_main.c 		writel(i, rx_ring->tail);
writel           3850 drivers/net/ethernet/intel/igc/igc_main.c 	writel(itr_val, q_vector->itr_register);
writel            227 drivers/net/ethernet/intel/igc/igc_regs.h 		writel((val), &hw_addr[(reg)]); \
writel             24 drivers/net/ethernet/intel/ixgb/ixgb_osdep.h 	writel((value), ((a)->hw_addr + IXGB_##reg)))
writel             30 drivers/net/ethernet/intel/ixgb/ixgb_osdep.h 	writel((value), ((a)->hw_addr + IXGB_##reg + ((offset) << 2))))
writel            150 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h 	writel(value, reg_addr + reg);
writel            158 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h 	writel((u32)val, addr);
writel            159 drivers/net/ethernet/intel/ixgbe/ixgbe_common.h 	writel((u32)(val >> 32), addr + 4);
writel           1640 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 		writel(i, rx_ring->tail);
writel           2416 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 		writel(ring->next_to_use, ring->tail);
writel           8323 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 		writel(i, tx_ring->tail);
writel           10326 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 	writel(ring->next_to_use, ring->tail);
writel            375 drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c 		writel(i, rx_ring->tail);
writel            539 drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c 		writel(ring->next_to_use, ring->tail);
writel            296 drivers/net/ethernet/intel/ixgbevf/ixgbevf.h 	writel(value, ring->tail);
writel            166 drivers/net/ethernet/intel/ixgbevf/vf.h 	writel(value, reg_addr + reg);
writel           1210 drivers/net/ethernet/jme.h 	writel(val, jme->regs + reg);
writel           1220 drivers/net/ethernet/jme.h 	writel(val, jme->regs + reg);
writel            147 drivers/net/ethernet/korina.c 	writel(0, &ch->dmandptr);
writel            148 drivers/net/ethernet/korina.c 	writel(dma_addr, &ch->dmadptr);
writel            155 drivers/net/ethernet/korina.c 		writel(0x10, &ch->dmac);
writel            160 drivers/net/ethernet/korina.c 		writel(0, &ch->dmas);
writel            163 drivers/net/ethernet/korina.c 	writel(0, &ch->dmadptr);
writel            164 drivers/net/ethernet/korina.c 	writel(0, &ch->dmandptr);
writel            169 drivers/net/ethernet/korina.c 	writel(dma_addr, &ch->dmandptr);
writel            247 drivers/net/ethernet/korina.c 			writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
writel            263 drivers/net/ethernet/korina.c 			writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
writel            302 drivers/net/ethernet/korina.c 	writel(0, &lp->eth_regs->miimcfg);
writel            303 drivers/net/ethernet/korina.c 	writel(0, &lp->eth_regs->miimcmd);
writel            304 drivers/net/ethernet/korina.c 	writel(mii_id | reg, &lp->eth_regs->miimaddr);
writel            305 drivers/net/ethernet/korina.c 	writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
writel            317 drivers/net/ethernet/korina.c 	writel(0, &lp->eth_regs->miimcfg);
writel            318 drivers/net/ethernet/korina.c 	writel(1, &lp->eth_regs->miimcmd);
writel            319 drivers/net/ethernet/korina.c 	writel(mii_id | reg, &lp->eth_regs->miimaddr);
writel            320 drivers/net/ethernet/korina.c 	writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
writel            321 drivers/net/ethernet/korina.c 	writel(val, &lp->eth_regs->miimwtd);
writel            335 drivers/net/ethernet/korina.c 		writel(dmasm | (DMA_STAT_DONE |
writel            442 drivers/net/ethernet/korina.c 		writel(~DMA_STAT_DONE, &lp->rx_dma_regs->dmas);
writel            448 drivers/net/ethernet/korina.c 		writel(~(DMA_STAT_HALT | DMA_STAT_ERR),
writel            473 drivers/net/ethernet/korina.c 		writel(readl(&lp->rx_dma_regs->dmasm) &
writel            512 drivers/net/ethernet/korina.c 		writel((u32)(hash_table[1] << 16 | hash_table[0]),
writel            514 drivers/net/ethernet/korina.c 		writel((u32)(hash_table[3] << 16 | hash_table[2]),
writel            519 drivers/net/ethernet/korina.c 	writel(recognise, &lp->eth_regs->etharc);
writel            597 drivers/net/ethernet/korina.c 	writel(~dmas, &lp->tx_dma_regs->dmas);
writel            599 drivers/net/ethernet/korina.c 	writel(readl(&lp->tx_dma_regs->dmasm) &
writel            618 drivers/net/ethernet/korina.c 		writel(dmasm | (DMA_STAT_FINI | DMA_STAT_ERR),
writel            625 drivers/net/ethernet/korina.c 			writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
writel            649 drivers/net/ethernet/korina.c 		writel(readl(&lp->eth_regs->ethmac2) | ETH_MAC2_FD,
writel            652 drivers/net/ethernet/korina.c 		writel(readl(&lp->eth_regs->ethmac2) & ~ETH_MAC2_FD,
writel            817 drivers/net/ethernet/korina.c 	writel(0, &lp->eth_regs->ethintfc);
writel            822 drivers/net/ethernet/korina.c 	writel(ETH_INT_FC_EN, &lp->eth_regs->ethintfc);
writel            831 drivers/net/ethernet/korina.c 	writel(0, &lp->rx_dma_regs->dmas);
writel            835 drivers/net/ethernet/korina.c 	writel(readl(&lp->tx_dma_regs->dmasm) &
writel            838 drivers/net/ethernet/korina.c 	writel(readl(&lp->rx_dma_regs->dmasm) &
writel            843 drivers/net/ethernet/korina.c 	writel(ETH_ARC_AB, &lp->eth_regs->etharc);
writel            846 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal0);
writel            847 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah0);
writel            849 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal1);
writel            850 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah1);
writel            852 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal2);
writel            853 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah2);
writel            855 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal3);
writel            856 drivers/net/ethernet/korina.c 	writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah3);
writel            860 drivers/net/ethernet/korina.c 	writel(ETH_MAC2_PE | ETH_MAC2_CEN | ETH_MAC2_FD,
writel            864 drivers/net/ethernet/korina.c 	writel(0x15, &lp->eth_regs->ethipgt);
writel            866 drivers/net/ethernet/korina.c 	writel(0x12, &lp->eth_regs->ethipgr);
writel            870 drivers/net/ethernet/korina.c 	writel(((idt_cpu_freq) / MII_CLOCK + 1) & ~1,
writel            874 drivers/net/ethernet/korina.c 	writel(48, &lp->eth_regs->ethfifott);
writel            876 drivers/net/ethernet/korina.c 	writel(ETH_MAC1_RE, &lp->eth_regs->ethmac1);
writel            899 drivers/net/ethernet/korina.c 	writel(readl(&lp->tx_dma_regs->dmasm) |
writel            902 drivers/net/ethernet/korina.c 	writel(readl(&lp->rx_dma_regs->dmasm) |
writel            990 drivers/net/ethernet/korina.c 	writel(tmp, &lp->tx_dma_regs->dmasm);
writel            995 drivers/net/ethernet/korina.c 	writel(tmp, &lp->rx_dma_regs->dmasm);
writel            430 drivers/net/ethernet/marvell/mv643xx_eth.c 	writel(data, mp->shared->base + offset);
writel            435 drivers/net/ethernet/marvell/mv643xx_eth.c 	writel(data, mp->base + offset);
writel           2628 drivers/net/ethernet/marvell/mv643xx_eth.c 		writel(0, base + WINDOW_BASE(i));
writel           2629 drivers/net/ethernet/marvell/mv643xx_eth.c 		writel(0, base + WINDOW_SIZE(i));
writel           2631 drivers/net/ethernet/marvell/mv643xx_eth.c 			writel(0, base + WINDOW_REMAP_HIGH(i));
writel           2640 drivers/net/ethernet/marvell/mv643xx_eth.c 		writel((cs->base & 0xffff0000) |
writel           2643 drivers/net/ethernet/marvell/mv643xx_eth.c 		writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
writel           2649 drivers/net/ethernet/marvell/mv643xx_eth.c 	writel(win_enable, base + WINDOW_BAR_ENABLE);
writel           2660 drivers/net/ethernet/marvell/mv643xx_eth.c 	writel(0x02000000, msp->base + 0x0400 + SDMA_CONFIG);
writel           2671 drivers/net/ethernet/marvell/mv643xx_eth.c 	writel(1, msp->base + 0x0400 + TX_BW_MTU_MOVED);
writel           2675 drivers/net/ethernet/marvell/mv643xx_eth.c 		writel(7, msp->base + 0x0400 + TX_BW_RATE);
writel            154 drivers/net/ethernet/marvell/mvmdio.c 	writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
writel            185 drivers/net/ethernet/marvell/mvmdio.c 	writel(((mii_id << MVMDIO_SMI_PHY_ADDR_SHIFT) |
writel            219 drivers/net/ethernet/marvell/mvmdio.c 	writel(regnum & GENMASK(15, 0), dev->regs + MVMDIO_XSMI_ADDR_REG);
writel            220 drivers/net/ethernet/marvell/mvmdio.c 	writel((mii_id << MVMDIO_XSMI_PHYADDR_SHIFT) |
writel            252 drivers/net/ethernet/marvell/mvmdio.c 	writel(regnum & GENMASK(15, 0), dev->regs + MVMDIO_XSMI_ADDR_REG);
writel            253 drivers/net/ethernet/marvell/mvmdio.c 	writel((mii_id << MVMDIO_XSMI_PHYADDR_SHIFT) |
writel            267 drivers/net/ethernet/marvell/mvmdio.c 		writel(~MVMDIO_ERR_INT_SMI_DONE,
writel            364 drivers/net/ethernet/marvell/mvmdio.c 		writel(MVMDIO_ERR_INT_SMI_DONE,
writel            384 drivers/net/ethernet/marvell/mvmdio.c 		writel(0, dev->regs + MVMDIO_ERR_INT_MASK);
writel            404 drivers/net/ethernet/marvell/mvmdio.c 		writel(0, dev->regs + MVMDIO_ERR_INT_MASK);
writel            659 drivers/net/ethernet/marvell/mvneta.c 	writel(data, pp->base + offset);
writel             32 drivers/net/ethernet/marvell/mvneta_bm.c 	writel(data, priv->reg_base + offset);
writel             77 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(data, priv->swth_base[0] + offset);
writel            134 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(data, priv->swth_base[thread] + offset);
writel           1169 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, xpcs + MVPP22_XPCS_CFG0);
writel           1173 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, mpcs + MVPP22_MPCS_CTRL);
writel           1178 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, mpcs + MVPP22_MPCS_CLK_RESET);
writel           1243 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_GMAC_INT_SUM_MASK);
writel           1253 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_XLG_EXT_INT_MASK);
writel           1265 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_XLG_EXT_INT_MASK);
writel           1273 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_GMAC_INT_SUM_MASK);
writel           1287 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_GMAC_INT_MASK);
writel           1293 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_XLG_INT_MASK);
writel           1333 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_XLG_CTRL0_REG);
writel           1338 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP2_GMAC_CTRL_0_REG);
writel           1350 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_XLG_CTRL0_REG);
writel           1355 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, port->base + MVPP2_GMAC_CTRL_0_REG);
writel           1365 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, port->base + MVPP2_GMAC_CTRL_1_REG);
writel           1387 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, port->base + MVPP2_GMAC_CTRL_1_REG);
writel           1609 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
writel           1614 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP22_XLG_CTRL0_REG);
writel           1633 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, mpcs + MVPP22_MPCS_CLK_RESET);
writel           1636 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val & ~MVPP22_XPCS_CFG0_RESET_DIS, xpcs + MVPP22_XPCS_CFG0);
writel           1657 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, mpcs + MVPP22_MPCS_CLK_RESET);
writel           1662 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val | MVPP22_XPCS_CFG0_RESET_DIS, xpcs + MVPP22_XPCS_CFG0);
writel           1678 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, port->base + MVPP2_GMAC_CTRL_0_REG);
writel           1690 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val, port->base + MVPP22_XLG_CTRL1_REG);
writel           1704 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, port->base + MVPP2_GMAC_PORT_FIFO_CFG_1_REG);
writel           3434 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(ctrl3, port->base + MVPP22_XLG_CTRL3_REG);
writel           4902 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val | MVPP2_GMAC_IN_BAND_RESTART_AN,
writel           4904 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	writel(val & ~MVPP2_GMAC_IN_BAND_RESTART_AN,
writel           4934 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(ctrl0, port->base + MVPP22_XLG_CTRL0_REG);
writel           4936 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(ctrl4, port->base + MVPP22_XLG_CTRL4_REG);
writel           5059 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(old_an, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
writel           5065 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(old_ctrl2, port->base + MVPP2_GMAC_CTRL_2_REG);
writel           5069 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(ctrl0, port->base + MVPP2_GMAC_CTRL_0_REG);
writel           5071 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(ctrl2, port->base + MVPP2_GMAC_CTRL_2_REG);
writel           5073 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(ctrl4, port->base + MVPP22_GMAC_CTRL_4_REG);
writel           5075 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(an, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
writel           5139 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			writel(val, port->base + MVPP22_XLG_CTRL0_REG);
writel           5144 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
writel           5167 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			writel(val, port->base + MVPP22_XLG_CTRL0_REG);
writel           5172 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 			writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
writel           5637 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, priv->lms_base + MVPP2_PHY_AN_CFG0_REG);
writel           5641 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(val, priv->iface_base + MVPP22_SMI_MISC_CFG_REG);
writel           5668 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(MVPP2_EXT_GLOBAL_CTRL_DEFAULT,
writel           2499 drivers/net/ethernet/marvell/skge.h 	writel(val, hw->regs + reg);
writel           2338 drivers/net/ethernet/marvell/sky2.h 	writel(val, hw->regs + reg);
writel             56 drivers/net/ethernet/mellanox/mlx4/crdump.c 		writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) & ~CR_ENABLE_BIT,
writel             60 drivers/net/ethernet/mellanox/mlx4/crdump.c 	writel(swab32(1), cr_space + dev->caps.health_buffer_addrs +
writel             68 drivers/net/ethernet/mellanox/mlx4/crdump.c 	writel(0, cr_space + dev->caps.health_buffer_addrs +
writel             73 drivers/net/ethernet/mellanox/mlx4/crdump.c 		writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) | CR_ENABLE_BIT,
writel            855 drivers/net/ethernet/mellanox/mlx4/eq.c 	writel(priv->eq_table.clr_mask, priv->eq_table.clr_int);
writel           3200 drivers/net/ethernet/mellanox/mlx4/main.c 	writel(0, owner);
writel            119 drivers/net/ethernet/mellanox/mlx4/reset.c 	writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET);
writel           1493 drivers/net/ethernet/micrel/ksz884x.c 	writel(interrupt, hw->io + KS884X_INTERRUPTS_STATUS);
writel           1499 drivers/net/ethernet/micrel/ksz884x.c 	writel(0, hw->io + KS884X_INTERRUPTS_ENABLE);
writel           1506 drivers/net/ethernet/micrel/ksz884x.c 	writel(interrupt, hw->io + KS884X_INTERRUPTS_ENABLE);
writel           1526 drivers/net/ethernet/micrel/ksz884x.c 	writel(hw->intr_set, hw->io + KS884X_INTERRUPTS_ENABLE);
writel           1552 drivers/net/ethernet/micrel/ksz884x.c 	writel(hw->intr_set, hw->io + KS884X_INTERRUPTS_ENABLE);
writel           1703 drivers/net/ethernet/micrel/ksz884x.c 	writel(data_hi, hw->io + KS884X_ACC_DATA_4_OFFSET);
writel           1704 drivers/net/ethernet/micrel/ksz884x.c 	writel(data_lo, hw->io + KS884X_ACC_DATA_0_OFFSET);
writel           2246 drivers/net/ethernet/micrel/ksz884x.c 	writel(0, hw->io + addr);
writel           3221 drivers/net/ethernet/micrel/ksz884x.c 			writel(hw->rx_cfg, hw->io + KS_DMA_RX_CTRL);
writel           3223 drivers/net/ethernet/micrel/ksz884x.c 			writel(hw->tx_cfg, hw->io + KS_DMA_TX_CTRL);
writel           3266 drivers/net/ethernet/micrel/ksz884x.c 			writel(hw->tx_cfg, hw->io + KS_DMA_TX_CTRL);
writel           3571 drivers/net/ethernet/micrel/ksz884x.c 	writel(0, hw->io + KS8841_WOL_FRAME_BYTE0_OFFSET + i);
writel           3572 drivers/net/ethernet/micrel/ksz884x.c 	writel(0, hw->io + KS8841_WOL_FRAME_BYTE2_OFFSET + i);
writel           3601 drivers/net/ethernet/micrel/ksz884x.c 	writel(crc, hw->io + KS8841_WOL_FRAME_CRC_OFFSET + i);
writel           3861 drivers/net/ethernet/micrel/ksz884x.c 	writel(tx_addr, hw->io + KS_DMA_TX_ADDR);
writel           3862 drivers/net/ethernet/micrel/ksz884x.c 	writel(rx_addr, hw->io + KS_DMA_RX_ADDR);
writel           3874 drivers/net/ethernet/micrel/ksz884x.c 	writel(DMA_START, hw->io + KS_DMA_RX_START);
writel           3885 drivers/net/ethernet/micrel/ksz884x.c 	writel(hw->rx_cfg, hw->io + KS_DMA_RX_CTRL);
writel           3890 drivers/net/ethernet/micrel/ksz884x.c 	writel(DMA_START, hw->io + KS_DMA_RX_START);
writel           3909 drivers/net/ethernet/micrel/ksz884x.c 	writel((hw->rx_cfg & ~DMA_RX_ENABLE), hw->io + KS_DMA_RX_CTRL);
writel           3920 drivers/net/ethernet/micrel/ksz884x.c 	writel(hw->tx_cfg, hw->io + KS_DMA_TX_CTRL);
writel           3931 drivers/net/ethernet/micrel/ksz884x.c 	writel((hw->tx_cfg & ~DMA_TX_ENABLE), hw->io + KS_DMA_TX_CTRL);
writel           4018 drivers/net/ethernet/micrel/ksz884x.c 	writel(0, hw->io + KS_DMA_TX_START);
writel           4092 drivers/net/ethernet/micrel/ksz884x.c 	writel(mac_addr_lo, hw->io + index + KS_ADD_ADDR_0_LO);
writel           4093 drivers/net/ethernet/micrel/ksz884x.c 	writel(mac_addr_hi, hw->io + index + KS_ADD_ADDR_0_HI);
writel           4102 drivers/net/ethernet/micrel/ksz884x.c 			writel(0, hw->io + ADD_ADDR_INCR * i +
writel           4137 drivers/net/ethernet/micrel/ksz884x.c 			writel(0, hw->io + ADD_ADDR_INCR * i +
writel           6594 drivers/net/ethernet/micrel/ksz884x.c 		writel(hw->rx_cfg, hw->io + KS_DMA_RX_CTRL);
writel             47 drivers/net/ethernet/moxa/moxart_ether.c 	writel(value, priv->base + reg);
writel            101 drivers/net/ethernet/moxa/moxart_ether.c 	writel(SW_RST, priv->base + REG_MAC_CTRL);
writel            105 drivers/net/ethernet/moxa/moxart_ether.c 	writel(0, priv->base + REG_INTERRUPT_MASK);
writel            114 drivers/net/ethernet/moxa/moxart_ether.c 	writel(0x00001010, priv->base + REG_INT_TIMER_CTRL);
writel            115 drivers/net/ethernet/moxa/moxart_ether.c 	writel(0x00000001, priv->base + REG_APOLL_TIMER_CTRL);
writel            116 drivers/net/ethernet/moxa/moxart_ether.c 	writel(0x00000390, priv->base + REG_DMA_BLEN_CTRL);
writel            119 drivers/net/ethernet/moxa/moxart_ether.c 	writel(priv->reg_imr, priv->base + REG_INTERRUPT_MASK);
writel            122 drivers/net/ethernet/moxa/moxart_ether.c 	writel(priv->reg_maccr, priv->base + REG_MAC_CTRL);
writel            167 drivers/net/ethernet/moxa/moxart_ether.c 	writel(priv->tx_base, priv->base + REG_TXR_BASE_ADDRESS);
writel            168 drivers/net/ethernet/moxa/moxart_ether.c 	writel(priv->rx_base, priv->base + REG_RXR_BASE_ADDRESS);
writel            202 drivers/net/ethernet/moxa/moxart_ether.c 	writel(0, priv->base + REG_INTERRUPT_MASK);
writel            205 drivers/net/ethernet/moxa/moxart_ether.c 	writel(0, priv->base + REG_MAC_CTRL);
writel            278 drivers/net/ethernet/moxa/moxart_ether.c 	writel(priv->reg_imr, priv->base + REG_INTERRUPT_MASK);
writel            326 drivers/net/ethernet/moxa/moxart_ether.c 			writel(priv->reg_imr, priv->base + REG_INTERRUPT_MASK);
writel            392 drivers/net/ethernet/moxa/moxart_ether.c 	writel(0xffffffff, priv->base + REG_TX_POLL_DEMAND);
writel            414 drivers/net/ethernet/moxa/moxart_ether.c 			writel(readl(priv->base + REG_MCAST_HASH_TABLE1) |
writel            418 drivers/net/ethernet/moxa/moxart_ether.c 			writel(readl(priv->base + REG_MCAST_HASH_TABLE0) |
writel            444 drivers/net/ethernet/moxa/moxart_ether.c 	writel(priv->reg_maccr, priv->base + REG_MAC_CTRL);
writel             58 drivers/net/ethernet/mscc/ocelot_io.c 	writel(val, port->regs + reg);
writel           1896 drivers/net/ethernet/myricom/myri10ge/myri10ge.c 	writel(swab32(pattern), mgp->sram + pattern_off);
writel            712 drivers/net/ethernet/natsemi/natsemi.c 	writel(1, ns_ioaddr(dev) + IntrEnable);
writel            718 drivers/net/ethernet/natsemi/natsemi.c 	writel(0, ns_ioaddr(dev) + IntrEnable);
writel           1013 drivers/net/ethernet/natsemi/natsemi.c 	writel(EE_Write0, ee_addr);
writel           1018 drivers/net/ethernet/natsemi/natsemi.c 		writel(dataval, ee_addr);
writel           1020 drivers/net/ethernet/natsemi/natsemi.c 		writel(dataval | EE_ShiftClk, ee_addr);
writel           1023 drivers/net/ethernet/natsemi/natsemi.c 	writel(EE_ChipSelect, ee_addr);
writel           1027 drivers/net/ethernet/natsemi/natsemi.c 		writel(EE_ChipSelect | EE_ShiftClk, ee_addr);
writel           1030 drivers/net/ethernet/natsemi/natsemi.c 		writel(EE_ChipSelect, ee_addr);
writel           1035 drivers/net/ethernet/natsemi/natsemi.c 	writel(EE_Write0, ee_addr);
writel           1036 drivers/net/ethernet/natsemi/natsemi.c 	writel(0, ee_addr);
writel           1056 drivers/net/ethernet/natsemi/natsemi.c 	writel(MII_ShiftClk, ioaddr + EECtrl);
writel           1058 drivers/net/ethernet/natsemi/natsemi.c 	writel(0, ioaddr + EECtrl);
writel           1071 drivers/net/ethernet/natsemi/natsemi.c 		writel(mdio_val, ioaddr + EECtrl);
writel           1073 drivers/net/ethernet/natsemi/natsemi.c 		writel(mdio_val | MII_ShiftClk, ioaddr + EECtrl);
writel           1076 drivers/net/ethernet/natsemi/natsemi.c 	writel(0, ioaddr + EECtrl);
writel           1275 drivers/net/ethernet/natsemi/natsemi.c 	writel(cfg | (CfgExtPhy | CfgPhyDis), ioaddr + ChipConfig);
writel           1310 drivers/net/ethernet/natsemi/natsemi.c 	writel(cfg, ioaddr + ChipConfig);
writel           1316 drivers/net/ethernet/natsemi/natsemi.c 	writel(bmcr | BMCR_RESET, ioaddr+BasicControl+(MII_BMCR<<2));
writel           1414 drivers/net/ethernet/natsemi/natsemi.c 		writel(i*2, ioaddr + RxFilterAddr);
writel           1419 drivers/net/ethernet/natsemi/natsemi.c 		writel(0xa+(i*2), ioaddr + RxFilterAddr);
writel           1424 drivers/net/ethernet/natsemi/natsemi.c 	writel(ChipReset, ioaddr + ChipCmd);
writel           1445 drivers/net/ethernet/natsemi/natsemi.c 	writel(cfg, ioaddr + ChipConfig);
writel           1448 drivers/net/ethernet/natsemi/natsemi.c 	writel(wcsr, ioaddr + WOLCmd);
writel           1453 drivers/net/ethernet/natsemi/natsemi.c 		writel(i*2, ioaddr + RxFilterAddr);
writel           1457 drivers/net/ethernet/natsemi/natsemi.c 		writel(0xa+(i*2), ioaddr + RxFilterAddr);
writel           1461 drivers/net/ethernet/natsemi/natsemi.c 	writel(rfcr, ioaddr + RxFilterAddr);
writel           1472 drivers/net/ethernet/natsemi/natsemi.c 	writel(RxReset, ioaddr + ChipCmd);
writel           1495 drivers/net/ethernet/natsemi/natsemi.c 	writel(EepromReload, ioaddr + PCIBusCfg);
writel           1516 drivers/net/ethernet/natsemi/natsemi.c 	writel(RxOff | TxOff, ioaddr + ChipCmd);
writel           1561 drivers/net/ethernet/natsemi/natsemi.c 		writel(i*2, ioaddr + RxFilterAddr);
writel           1564 drivers/net/ethernet/natsemi/natsemi.c 	writel(np->cur_rx_mode, ioaddr + RxFilterAddr);
writel           1706 drivers/net/ethernet/natsemi/natsemi.c 		writel(np->tx_config, ioaddr + TxConfig);
writel           1707 drivers/net/ethernet/natsemi/natsemi.c 		writel(np->rx_config, ioaddr + RxConfig);
writel           1721 drivers/net/ethernet/natsemi/natsemi.c 	writel(np->ring_dma, ioaddr + RxRingPtr);
writel           1722 drivers/net/ethernet/natsemi/natsemi.c 	writel(np->ring_dma + RX_RING_SIZE * sizeof(struct netdev_desc),
writel           1741 drivers/net/ethernet/natsemi/natsemi.c 	writel(np->tx_config, ioaddr + TxConfig);
writel           1751 drivers/net/ethernet/natsemi/natsemi.c 	writel(np->rx_config, ioaddr + RxConfig);
writel           1760 drivers/net/ethernet/natsemi/natsemi.c 	writel(np->SavedClkRun & ~PMEEnable, ioaddr + ClkRun);
writel           1770 drivers/net/ethernet/natsemi/natsemi.c 	writel(DEFAULT_INTR, ioaddr + IntrMask);
writel           1773 drivers/net/ethernet/natsemi/natsemi.c 	writel(RxOn | TxOn, ioaddr + ChipCmd);
writel           1774 drivers/net/ethernet/natsemi/natsemi.c 	writel(StatsClear, ioaddr + StatsCtrl); /* Clear Stats */
writel           1849 drivers/net/ethernet/natsemi/natsemi.c 			writel(RxOn, ioaddr + ChipCmd);
writel           2129 drivers/net/ethernet/natsemi/natsemi.c 		writel(TxOn, ioaddr + ChipCmd);
writel           2328 drivers/net/ethernet/natsemi/natsemi.c 				writel(np->ring_dma, ioaddr + RxRingPtr);
writel           2395 drivers/net/ethernet/natsemi/natsemi.c 		writel(RxOn, ioaddr + ChipCmd);
writel           2434 drivers/net/ethernet/natsemi/natsemi.c 		writel(np->tx_config, ioaddr + TxConfig);
writel           2522 drivers/net/ethernet/natsemi/natsemi.c 			writel(HASH_TABLE + i, ioaddr + RxFilterAddr);
writel           2523 drivers/net/ethernet/natsemi/natsemi.c 			writel((mc_filter[i + 1] << 8) + mc_filter[i],
writel           2527 drivers/net/ethernet/natsemi/natsemi.c 	writel(rx_mode, ioaddr + RxFilterAddr);
writel           2550 drivers/net/ethernet/natsemi/natsemi.c 		writel(np->ring_dma, ioaddr + RxRingPtr);
writel           2552 drivers/net/ethernet/natsemi/natsemi.c 		writel(RxOn | TxOn, ioaddr + ChipCmd);
writel           2731 drivers/net/ethernet/natsemi/natsemi.c 	writel(data, ioaddr + WOLCmd);
writel           2786 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr, ioaddr + RxFilterAddr);
writel           2789 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr | 0xa, ioaddr + RxFilterAddr);
writel           2792 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr | 0xc, ioaddr + RxFilterAddr);
writel           2795 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr | 0xe, ioaddr + RxFilterAddr);
writel           2799 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr | RxFilterEnable, ioaddr + RxFilterAddr);
writel           2819 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr | 0xa, ioaddr + RxFilterAddr);
writel           2822 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr | 0xc, ioaddr + RxFilterAddr);
writel           2825 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr | 0xe, ioaddr + RxFilterAddr);
writel           2828 drivers/net/ethernet/natsemi/natsemi.c 	writel(addr, ioaddr + RxFilterAddr);
writel           3034 drivers/net/ethernet/natsemi/natsemi.c 		writel(j*2, ioaddr + RxFilterAddr);
writel           3037 drivers/net/ethernet/natsemi/natsemi.c 	writel(rfcr, ioaddr + RxFilterAddr);
writel           3141 drivers/net/ethernet/natsemi/natsemi.c 	writel(0, ioaddr + RxRingPtr);
writel           3147 drivers/net/ethernet/natsemi/natsemi.c 	writel(np->SavedClkRun | PMEEnable | PMEStatus, ioaddr + ClkRun);
writel           3150 drivers/net/ethernet/natsemi/natsemi.c 	writel(RxOn, ioaddr + ChipCmd);
writel           3156 drivers/net/ethernet/natsemi/natsemi.c 		writel(WOLPkt | LinkChange, ioaddr + IntrMask);
writel           3206 drivers/net/ethernet/natsemi/natsemi.c 	writel(StatsFreeze, ioaddr + StatsCtrl);
writel           3231 drivers/net/ethernet/natsemi/natsemi.c 			writel(np->SavedClkRun, ioaddr + ClkRun);
writel           3319 drivers/net/ethernet/natsemi/natsemi.c 				writel(np->SavedClkRun, ioaddr + ClkRun);
writel            455 drivers/net/ethernet/natsemi/ns83820.c #define __kick_rx(dev)	writel(CR_RXE, dev->base + CR)
writel            463 drivers/net/ethernet/natsemi/ns83820.c 		writel(dev->rx_info.phy_descs +
writel            620 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + TXCFG)
writel            623 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + RXCFG) | RXCFG_RX_FD,
writel            626 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + GPIOR) | GPIOR_GP1_OUT,
writel            637 drivers/net/ethernet/natsemi/ns83820.c 			writel((readl(dev->base + TXCFG)
writel            640 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + RXCFG) & ~RXCFG_RX_FD,
writel            643 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + GPIOR) & ~GPIOR_GP1_OUT,
writel            663 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + TXCFG)
writel            666 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + RXCFG) | RXCFG_RX_FD,
writel            669 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + TXCFG)
writel            672 drivers/net/ethernet/natsemi/ns83820.c 			writel(readl(dev->base + RXCFG) & ~(RXCFG_RX_FD),
writel            678 drivers/net/ethernet/natsemi/ns83820.c 			writel(new_cfg, dev->base + CFG);
writel            721 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + RXDP_HI);
writel            722 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->rx_info.phy_descs, dev->base + RXDP);
writel            730 drivers/net/ethernet/natsemi/ns83820.c 		writel(0x0001, dev->base + CCSR);
writel            731 drivers/net/ethernet/natsemi/ns83820.c 		writel(0, dev->base + RFCR);
writel            732 drivers/net/ethernet/natsemi/ns83820.c 		writel(0x7fc00000, dev->base + RFCR);
writel            733 drivers/net/ethernet/natsemi/ns83820.c 		writel(0xffc00000, dev->base + RFCR);
writel            752 drivers/net/ethernet/natsemi/ns83820.c 		writel(dev->IMR_cache, dev->base + IMR);
writel            753 drivers/net/ethernet/natsemi/ns83820.c 		writel(1, dev->base + IER);
writel            773 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->IMR_cache, dev->base + IMR);
writel            784 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + RXDP_HI);
writel            785 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + RXDP);
writel            931 drivers/net/ethernet/natsemi/ns83820.c 	writel(ihr, dev->base + IHR);
writel            935 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->IMR_cache, dev->base + IMR);
writel            948 drivers/net/ethernet/natsemi/ns83820.c 	writel(CR_TXE, dev->base + CR);
writel           1304 drivers/net/ethernet/natsemi/ns83820.c 				writel(readl(dev->base + TXCFG)
writel           1307 drivers/net/ethernet/natsemi/ns83820.c 				writel(readl(dev->base + RXCFG) | RXCFG_RX_FD,
writel           1310 drivers/net/ethernet/natsemi/ns83820.c 				writel(readl(dev->base + GPIOR) | GPIOR_GP1_OUT,
writel           1328 drivers/net/ethernet/natsemi/ns83820.c 			writel(TBICR_MR_AN_ENABLE | TBICR_MR_RESTART_AN,
writel           1330 drivers/net/ethernet/natsemi/ns83820.c 			writel(TBICR_MR_AN_ENABLE, dev->base + TBICR);
writel           1337 drivers/net/ethernet/natsemi/ns83820.c 			writel(0x00000000, dev->base + TBICR);
writel           1376 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + IMR);
writel           1377 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + IER);
writel           1427 drivers/net/ethernet/natsemi/ns83820.c 		writel(dev->IMR_cache, dev->base + IMR);
writel           1449 drivers/net/ethernet/natsemi/ns83820.c 		writel(CR_RXE, dev->base + CR);
writel           1484 drivers/net/ethernet/natsemi/ns83820.c 			writel(dev->IMR_cache, dev->base + IMR);
writel           1498 drivers/net/ethernet/natsemi/ns83820.c 		writel(dev->IMR_cache, dev->base + IMR);
writel           1512 drivers/net/ethernet/natsemi/ns83820.c 		writel(dev->ihr, dev->base + IHR);
writel           1519 drivers/net/ethernet/natsemi/ns83820.c 	writel(which, dev->base + CR);
writel           1621 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + PQCR);
writel           1638 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + TXDP_HI);
writel           1639 drivers/net/ethernet/natsemi/ns83820.c 	writel(desc, dev->base + TXDP);
writel           1662 drivers/net/ethernet/natsemi/ns83820.c 		writel(i*2, dev->base + RFCR);
writel           1691 drivers/net/ethernet/natsemi/ns83820.c 	writel(val & ~RFCR_RFEN, rfcr);
writel           1692 drivers/net/ethernet/natsemi/ns83820.c 	writel(val, rfcr);
writel           1708 drivers/net/ethernet/natsemi/ns83820.c 	writel(enable, dev->base + PTSCR);
writel           1740 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->MEAR_cache, dev->base + MEAR);
writel           1751 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->MEAR_cache, dev->base + MEAR);
writel           1759 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->MEAR_cache, dev->base + MEAR);
writel           1773 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->MEAR_cache, dev->base + MEAR);
writel           1782 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->MEAR_cache, dev->base + MEAR);
writel           1991 drivers/net/ethernet/natsemi/ns83820.c 	writel(PTSCR_RBIST_RST, dev->base + PTSCR);
writel           2035 drivers/net/ethernet/natsemi/ns83820.c 		writel(readl(dev->base + GPIOR) | 0x3e8, dev->base + GPIOR);
writel           2038 drivers/net/ethernet/natsemi/ns83820.c 		writel(readl(dev->base + TANAR)
writel           2043 drivers/net/ethernet/natsemi/ns83820.c 		writel(TBICR_MR_AN_ENABLE | TBICR_MR_RESTART_AN,
writel           2045 drivers/net/ethernet/natsemi/ns83820.c 		writel(TBICR_MR_AN_ENABLE, dev->base + TBICR);
writel           2051 drivers/net/ethernet/natsemi/ns83820.c 	writel(dev->CFG_cache, dev->base + CFG);
writel           2056 drivers/net/ethernet/natsemi/ns83820.c 		writel(dev->CFG_cache | CFG_PHY_RST, dev->base + CFG);
writel           2058 drivers/net/ethernet/natsemi/ns83820.c 		writel(dev->CFG_cache, dev->base + CFG);
writel           2065 drivers/net/ethernet/natsemi/ns83820.c 		writel(readl(dev->base+0x20c) | 0xfe00, dev->base + 0x20c);
writel           2075 drivers/net/ethernet/natsemi/ns83820.c 	writel(TXCFG_CSI | TXCFG_HBI | TXCFG_ATP | TXCFG_MXDMA512
writel           2080 drivers/net/ethernet/natsemi/ns83820.c 	writel(0x000, dev->base + IHR);
writel           2081 drivers/net/ethernet/natsemi/ns83820.c 	writel(0x100, dev->base + IHR);
writel           2082 drivers/net/ethernet/natsemi/ns83820.c 	writel(0x000, dev->base + IHR);
writel           2090 drivers/net/ethernet/natsemi/ns83820.c 	writel(RXCFG_AEP | RXCFG_ARP | RXCFG_AIRL | RXCFG_RX_FD
writel           2096 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + PQCR);
writel           2116 drivers/net/ethernet/natsemi/ns83820.c 	writel(VRCR_INIT_VALUE, dev->base + VRCR);
writel           2127 drivers/net/ethernet/natsemi/ns83820.c 	writel(VTCR_INIT_VALUE, dev->base + VTCR);
writel           2131 drivers/net/ethernet/natsemi/ns83820.c 	writel((PCR_PS_MCAST | PCR_PS_DA | PCR_PSEN | PCR_FFLO_4K |
writel           2136 drivers/net/ethernet/natsemi/ns83820.c 	writel(0, dev->base + WCSR);
writel           1240 drivers/net/ethernet/neterion/s2io.c 	writel((u32)val64, add);
writel           1242 drivers/net/ethernet/neterion/s2io.c 	writel((u32) (val64 >> 32), (add + 4));
writel           1733 drivers/net/ethernet/neterion/s2io.c 	writel((u32) (val64), add);
writel           1735 drivers/net/ethernet/neterion/s2io.c 	writel((u32) (val64 >> 32), (add + 4));
writel           1746 drivers/net/ethernet/neterion/s2io.c 		writel((u32) (val64), add);
writel           1748 drivers/net/ethernet/neterion/s2io.c 		writel((u32) (val64 >> 32), (add + 4));
writel           4931 drivers/net/ethernet/neterion/s2io.c 		writel((u32)val64, add);
writel           4933 drivers/net/ethernet/neterion/s2io.c 		writel((u32) (val64 >> 32), (add + 4));
writel           4953 drivers/net/ethernet/neterion/s2io.c 		writel((u32)val64, add);
writel           4955 drivers/net/ethernet/neterion/s2io.c 		writel((u32) (val64 >> 32), (add + 4));
writel            985 drivers/net/ethernet/neterion/s2io.h 		writel((u32) (val), addr);
writel            987 drivers/net/ethernet/neterion/s2io.h 		writel((u32) (val >> 32), (addr + 4));
writel            990 drivers/net/ethernet/neterion/s2io.h 		writel((u32) (val >> 32), (addr + 4));
writel            992 drivers/net/ethernet/neterion/s2io.h 		writel((u32) (val), addr);
writel           2016 drivers/net/ethernet/neterion/vxge/vxge-config.h 	writel(val, addr + 4);
writel           2021 drivers/net/ethernet/neterion/vxge/vxge-config.h 	writel(val, addr);
writel            731 drivers/net/ethernet/netronome/nfp/nfp_net.h 	writel(val, nn->dp.ctrl_bar + off);
writel            795 drivers/net/ethernet/netronome/nfp/nfp_net.h 		writel(NFP_QCP_MAX_ADD, q + off);
writel            799 drivers/net/ethernet/netronome/nfp/nfp_net.h 	writel(val, q + off);
writel            876 drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c 	writel(new_rss_cfg, nn->dp.ctrl_bar + NFP_NET_CFG_RSS_CTRL);
writel             81 drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c 	writel(get_unaligned_be32(mac), app->pf->vfcfg_tbl2 + vf_offset);
writel            280 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c 		writel(newcfg, nfp->iomem.csr + xbar);
writel           1118 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c 		writel(*(src++), priv->data + i);
writel           1175 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c 		writel(csr[0], nfp->iomem.csr +
writel           1178 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c 		writel(csr[1], nfp->iomem.csr +
writel           1181 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c 		writel(csr[2], nfp->iomem.csr +
writel            210 drivers/net/ethernet/ni/nixge.c 	writel(val, priv->dma_regs + offset);
writel            216 drivers/net/ethernet/ni/nixge.c 	writel(lower_32_bits(addr), priv->dma_regs + offset);
writel            218 drivers/net/ethernet/ni/nixge.c 	writel(upper_32_bits(addr), priv->dma_regs + offset + 4);
writel            229 drivers/net/ethernet/ni/nixge.c 	writel(val, priv->ctrl_regs + offset);
writel           1003 drivers/net/ethernet/nvidia/forcedeth.c 			writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr);
writel           1005 drivers/net/ethernet/nvidia/forcedeth.c 			writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
writel           1008 drivers/net/ethernet/nvidia/forcedeth.c 			writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr);
writel           1009 drivers/net/ethernet/nvidia/forcedeth.c 			writel(dma_high(np->ring_addr), base + NvRegRxRingPhysAddrHigh);
writel           1012 drivers/net/ethernet/nvidia/forcedeth.c 			writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
writel           1013 drivers/net/ethernet/nvidia/forcedeth.c 			writel(dma_high(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddrHigh);
writel           1066 drivers/net/ethernet/nvidia/forcedeth.c 		writel(powerstate, base + NvRegPowerState2);
writel           1107 drivers/net/ethernet/nvidia/forcedeth.c 	writel(mask, base + NvRegIrqMask);
writel           1116 drivers/net/ethernet/nvidia/forcedeth.c 		writel(mask, base + NvRegIrqMask);
writel           1119 drivers/net/ethernet/nvidia/forcedeth.c 			writel(0, base + NvRegMSIIrqMask);
writel           1120 drivers/net/ethernet/nvidia/forcedeth.c 		writel(0, base + NvRegIrqMask);
writel           1149 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MIISTAT_MASK_RW, base + NvRegMIIStatus);
writel           1153 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl);
writel           1159 drivers/net/ethernet/nvidia/forcedeth.c 		writel(value, base + NvRegMIIData);
writel           1162 drivers/net/ethernet/nvidia/forcedeth.c 	writel(reg, base + NvRegMIIControl);
writel           1235 drivers/net/ethernet/nvidia/forcedeth.c 	writel(powerstate, base + NvRegPowerState2);
writel           1239 drivers/net/ethernet/nvidia/forcedeth.c 	writel(powerstate, base + NvRegPowerState2);
writel           1541 drivers/net/ethernet/nvidia/forcedeth.c 		writel(rx_ctrl, base + NvRegReceiverControl);
writel           1544 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->linkspeed, base + NvRegLinkSpeed);
writel           1549 drivers/net/ethernet/nvidia/forcedeth.c 	writel(rx_ctrl, base + NvRegReceiverControl);
writel           1563 drivers/net/ethernet/nvidia/forcedeth.c 	writel(rx_ctrl, base + NvRegReceiverControl);
writel           1571 drivers/net/ethernet/nvidia/forcedeth.c 		writel(0, base + NvRegLinkSpeed);
writel           1583 drivers/net/ethernet/nvidia/forcedeth.c 	writel(tx_ctrl, base + NvRegTransmitterControl);
writel           1597 drivers/net/ethernet/nvidia/forcedeth.c 	writel(tx_ctrl, base + NvRegTransmitterControl);
writel           1605 drivers/net/ethernet/nvidia/forcedeth.c 		writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV,
writel           1626 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
writel           1629 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
writel           1639 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
writel           1647 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);
writel           1650 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegMacReset);
writel           1655 drivers/net/ethernet/nvidia/forcedeth.c 	writel(temp1, base + NvRegMacAddrA);
writel           1656 drivers/net/ethernet/nvidia/forcedeth.c 	writel(temp2, base + NvRegMacAddrB);
writel           1657 drivers/net/ethernet/nvidia/forcedeth.c 	writel(temp3, base + NvRegTransmitPoll);
writel           1659 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
writel           2116 drivers/net/ethernet/nvidia/forcedeth.c 	writel(reg, base + NvRegSlotTime);
writel           2193 drivers/net/ethernet/nvidia/forcedeth.c 	writel(temp, base + NvRegBackOffControl);
writel           2202 drivers/net/ethernet/nvidia/forcedeth.c 		writel(temp, base + NvRegBackOffControl);
writel           2360 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           2545 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           2563 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           3099 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
writel           3101 drivers/net/ethernet/nvidia/forcedeth.c 		writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
writel           3104 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           3127 drivers/net/ethernet/nvidia/forcedeth.c 	writel(mac[0], base + NvRegMacAddrA);
writel           3128 drivers/net/ethernet/nvidia/forcedeth.c 	writel(mac[1], base + NvRegMacAddrB);
writel           3223 drivers/net/ethernet/nvidia/forcedeth.c 	writel(addr[0], base + NvRegMulticastAddrA);
writel           3224 drivers/net/ethernet/nvidia/forcedeth.c 	writel(addr[1], base + NvRegMulticastAddrB);
writel           3225 drivers/net/ethernet/nvidia/forcedeth.c 	writel(mask[0], base + NvRegMulticastMaskA);
writel           3226 drivers/net/ethernet/nvidia/forcedeth.c 	writel(mask[1], base + NvRegMulticastMaskB);
writel           3227 drivers/net/ethernet/nvidia/forcedeth.c 	writel(pff, base + NvRegPacketFilterFlags);
writel           3242 drivers/net/ethernet/nvidia/forcedeth.c 			writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags);
writel           3245 drivers/net/ethernet/nvidia/forcedeth.c 			writel(pff, base + NvRegPacketFilterFlags);
writel           3257 drivers/net/ethernet/nvidia/forcedeth.c 				writel(readl(base + NvRegTxPauseFrameLimit)|NVREG_TX_PAUSEFRAMELIMIT_ENABLE, base + NvRegTxPauseFrameLimit);
writel           3259 drivers/net/ethernet/nvidia/forcedeth.c 			writel(pause_enable,  base + NvRegTxPauseFrame);
writel           3260 drivers/net/ethernet/nvidia/forcedeth.c 			writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1);
writel           3263 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_TX_PAUSEFRAME_DISABLE,  base + NvRegTxPauseFrame);
writel           3264 drivers/net/ethernet/nvidia/forcedeth.c 			writel(regmisc, base + NvRegMisc1);
writel           3291 drivers/net/ethernet/nvidia/forcedeth.c 		writel(phyreg, base + NvRegSlotTime);
writel           3303 drivers/net/ethernet/nvidia/forcedeth.c 	writel(phyreg, base + NvRegPhyInterface);
writel           3314 drivers/net/ethernet/nvidia/forcedeth.c 	writel(txreg, base + NvRegTxDeferral);
writel           3325 drivers/net/ethernet/nvidia/forcedeth.c 	writel(txreg, base + NvRegTxWatermark);
writel           3327 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MISC1_FORCE | (np->duplex ? 0 : NVREG_MISC1_HD),
writel           3330 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->linkspeed, base + NvRegLinkSpeed);
writel           3473 drivers/net/ethernet/nvidia/forcedeth.c 		writel(phyreg, base + NvRegSlotTime);
writel           3484 drivers/net/ethernet/nvidia/forcedeth.c 	writel(phyreg, base + NvRegPhyInterface);
writel           3506 drivers/net/ethernet/nvidia/forcedeth.c 	writel(txreg, base + NvRegTxDeferral);
writel           3516 drivers/net/ethernet/nvidia/forcedeth.c 	writel(txreg, base + NvRegTxWatermark);
writel           3518 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MISC1_FORCE | (np->duplex ? 0 : NVREG_MISC1_HD),
writel           3521 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->linkspeed, base + NvRegLinkSpeed);
writel           3592 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MIISTAT_LINKCHANGE, base + NvRegMIIStatus);
writel           3607 drivers/net/ethernet/nvidia/forcedeth.c 		writel(0, base + NvRegMSIIrqMask);
writel           3608 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
writel           3648 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->events, base + NvRegIrqStatus);
writel           3651 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->events, base + NvRegMSIXIrqStatus);
writel           3662 drivers/net/ethernet/nvidia/forcedeth.c 		writel(0, base + NvRegIrqMask);
writel           3681 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->events, base + NvRegIrqStatus);
writel           3684 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->events, base + NvRegMSIXIrqStatus);
writel           3695 drivers/net/ethernet/nvidia/forcedeth.c 		writel(0, base + NvRegIrqMask);
writel           3713 drivers/net/ethernet/nvidia/forcedeth.c 		writel(events, base + NvRegMSIXIrqStatus);
writel           3725 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask);
writel           3809 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->irqmask, base + NvRegIrqMask);
writel           3825 drivers/net/ethernet/nvidia/forcedeth.c 		writel(events, base + NvRegMSIXIrqStatus);
writel           3842 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
writel           3870 drivers/net/ethernet/nvidia/forcedeth.c 		writel(events, base + NvRegMSIXIrqStatus);
writel           3894 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
writel           3908 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
writel           3935 drivers/net/ethernet/nvidia/forcedeth.c 		writel(events & NVREG_IRQ_TIMER, base + NvRegIrqStatus);
writel           3938 drivers/net/ethernet/nvidia/forcedeth.c 		writel(events & NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus);
writel           3967 drivers/net/ethernet/nvidia/forcedeth.c 	writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
writel           3974 drivers/net/ethernet/nvidia/forcedeth.c 	writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
writel           4041 drivers/net/ethernet/nvidia/forcedeth.c 				writel(0, base + NvRegMSIXMap0);
writel           4042 drivers/net/ethernet/nvidia/forcedeth.c 				writel(0, base + NvRegMSIXMap1);
writel           4060 drivers/net/ethernet/nvidia/forcedeth.c 				writel(0, base + NvRegMSIXMap0);
writel           4061 drivers/net/ethernet/nvidia/forcedeth.c 				writel(0, base + NvRegMSIXMap1);
writel           4081 drivers/net/ethernet/nvidia/forcedeth.c 			writel(0, base + NvRegMSIMap0);
writel           4082 drivers/net/ethernet/nvidia/forcedeth.c 			writel(0, base + NvRegMSIMap1);
writel           4084 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
writel           4181 drivers/net/ethernet/nvidia/forcedeth.c 			writel(np->rx_buf_sz, base + NvRegOffloadConfig);
writel           4183 drivers/net/ethernet/nvidia/forcedeth.c 			writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
writel           4186 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           4190 drivers/net/ethernet/nvidia/forcedeth.c 				writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
writel           4192 drivers/net/ethernet/nvidia/forcedeth.c 				writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
writel           4202 drivers/net/ethernet/nvidia/forcedeth.c 	writel(mask, base + NvRegIrqMask);
writel           4290 drivers/net/ethernet/nvidia/forcedeth.c 		writel(flags, base + NvRegWakeUpFlags);
writel           4734 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
writel           4736 drivers/net/ethernet/nvidia/forcedeth.c 		writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
writel           4739 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           4915 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           4942 drivers/net/ethernet/nvidia/forcedeth.c 			writel(np->txrxctl_bits, base + NvRegTxRxControl);
writel           5018 drivers/net/ethernet/nvidia/forcedeth.c 		writel(orig_read, base + nv_registers_test[i].reg);
writel           5027 drivers/net/ethernet/nvidia/forcedeth.c 		writel(orig_read, base + nv_registers_test[i].reg);
writel           5059 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
writel           5060 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
writel           5076 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
writel           5078 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
writel           5087 drivers/net/ethernet/nvidia/forcedeth.c 		writel(save_poll_interval, base + NvRegPollingInterval);
writel           5088 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
writel           5124 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MISC1_FORCE, base + NvRegMisc1);
writel           5125 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags);
writel           5128 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
writel           5130 drivers/net/ethernet/nvidia/forcedeth.c 	writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
writel           5164 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           5215 drivers/net/ethernet/nvidia/forcedeth.c 		writel(misc1_flags, base + NvRegMisc1);
writel           5216 drivers/net/ethernet/nvidia/forcedeth.c 		writel(filter_flags, base + NvRegPacketFilterFlags);
writel           5246 drivers/net/ethernet/nvidia/forcedeth.c 				writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
writel           5248 drivers/net/ethernet/nvidia/forcedeth.c 				writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
writel           5287 drivers/net/ethernet/nvidia/forcedeth.c 			writel(np->rx_buf_sz, base + NvRegOffloadConfig);
writel           5289 drivers/net/ethernet/nvidia/forcedeth.c 			writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
writel           5292 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
writel           5357 drivers/net/ethernet/nvidia/forcedeth.c 		writel(tx_ctrl, base + NvRegTransmitterControl);
writel           5382 drivers/net/ethernet/nvidia/forcedeth.c 			writel(tx_ctrl, base + NvRegTransmitterControl);
writel           5397 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MGMTUNITGETVERSION, base + NvRegMgmtUnitGetVersion);
writel           5398 drivers/net/ethernet/nvidia/forcedeth.c 	writel(data_ready ^ NVREG_XMITCTL_DATA_START, base + NvRegTransmitterControl);
writel           5433 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
writel           5434 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegMulticastAddrB);
writel           5435 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA);
writel           5436 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB);
writel           5437 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegPacketFilterFlags);
writel           5439 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegTransmitterControl);
writel           5440 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegReceiverControl);
writel           5442 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegAdapterControl);
writel           5445 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_TX_PAUSEFRAME_DISABLE,  base + NvRegTxPauseFrame);
writel           5451 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegLinkSpeed);
writel           5452 drivers/net/ethernet/nvidia/forcedeth.c 	writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
writel           5454 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegUnknownSetupReg6);
writel           5460 drivers/net/ethernet/nvidia/forcedeth.c 	writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
writel           5463 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->linkspeed, base + NvRegLinkSpeed);
writel           5465 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark);
writel           5467 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark);
writel           5468 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->txrxctl_bits, base + NvRegTxRxControl);
writel           5469 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->vlanctl_bits, base + NvRegVlanControl);
writel           5471 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl);
writel           5478 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegMIIMask);
writel           5479 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
writel           5480 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
writel           5482 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
writel           5483 drivers/net/ethernet/nvidia/forcedeth.c 	writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
writel           5484 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
writel           5485 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
writel           5487 drivers/net/ethernet/nvidia/forcedeth.c 	writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
writel           5492 drivers/net/ethernet/nvidia/forcedeth.c 		writel(low|NVREG_SLOTTIME_DEFAULT, base + NvRegSlotTime);
writel           5496 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_SLOTTIME_LEGBF_ENABLED|NVREG_SLOTTIME_10_100_FULL|low, base + NvRegSlotTime);
writel           5498 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_SLOTTIME_10_100_FULL, base + NvRegSlotTime);
writel           5502 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral);
writel           5503 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral);
writel           5506 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
writel           5508 drivers/net/ethernet/nvidia/forcedeth.c 			writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
writel           5510 drivers/net/ethernet/nvidia/forcedeth.c 		writel(poll_interval & 0xFFFF, base + NvRegPollingInterval);
writel           5511 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
writel           5512 drivers/net/ethernet/nvidia/forcedeth.c 	writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
writel           5514 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed);
writel           5515 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MII_LINKCHANGE, base + NvRegMIIMask);
writel           5517 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags);
writel           5521 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState);
writel           5525 drivers/net/ethernet/nvidia/forcedeth.c 	writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState);
writel           5529 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
writel           5530 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
writel           5540 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
writel           5541 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegMulticastAddrB);
writel           5542 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA);
writel           5543 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB);
writel           5544 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
writel           5549 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
writel           5621 drivers/net/ethernet/nvidia/forcedeth.c 		writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
writel           5887 drivers/net/ethernet/nvidia/forcedeth.c 		writel(txreg|NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
writel           5910 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegWakeUpFlags);
writel           5922 drivers/net/ethernet/nvidia/forcedeth.c 		writel(powerstate, base + NvRegPowerState2);
writel           5978 drivers/net/ethernet/nvidia/forcedeth.c 	writel(0, base + NvRegMIIMask);
writel           5983 drivers/net/ethernet/nvidia/forcedeth.c 		writel(phystate, base + NvRegAdapterControl);
writel           5985 drivers/net/ethernet/nvidia/forcedeth.c 	writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
writel           6103 drivers/net/ethernet/nvidia/forcedeth.c 		writel(phystate|NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl);
writel           6151 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->orig_mac[0], base + NvRegMacAddrA);
writel           6152 drivers/net/ethernet/nvidia/forcedeth.c 	writel(np->orig_mac[1], base + NvRegMacAddrB);
writel           6153 drivers/net/ethernet/nvidia/forcedeth.c 	writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV,
writel           6212 drivers/net/ethernet/nvidia/forcedeth.c 		writel(np->saved_config_space[i], base+i*sizeof(u32));
writel            426 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_SA2(pldat->net_base));
writel            428 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_SA1(pldat->net_base));
writel            430 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_SA0(pldat->net_base));
writel            458 drivers/net/ethernet/nxp/lpc_eth.c 		writel(tmp, LPC_ENET_MAC2(pldat->net_base));
writel            461 drivers/net/ethernet/nxp/lpc_eth.c 		writel(tmp, LPC_ENET_COMMAND(pldat->net_base));
writel            462 drivers/net/ethernet/nxp/lpc_eth.c 		writel(LPC_IPGT_LOAD(0x15), LPC_ENET_IPGT(pldat->net_base));
writel            466 drivers/net/ethernet/nxp/lpc_eth.c 		writel(tmp, LPC_ENET_MAC2(pldat->net_base));
writel            469 drivers/net/ethernet/nxp/lpc_eth.c 		writel(tmp, LPC_ENET_COMMAND(pldat->net_base));
writel            470 drivers/net/ethernet/nxp/lpc_eth.c 		writel(LPC_IPGT_LOAD(0x12), LPC_ENET_IPGT(pldat->net_base));
writel            474 drivers/net/ethernet/nxp/lpc_eth.c 		writel(LPC_SUPP_SPEED, LPC_ENET_SUPP(pldat->net_base));
writel            476 drivers/net/ethernet/nxp/lpc_eth.c 		writel(0, LPC_ENET_SUPP(pldat->net_base));
writel            482 drivers/net/ethernet/nxp/lpc_eth.c 	writel((LPC_MAC1_RESET_TX | LPC_MAC1_RESET_MCS_TX | LPC_MAC1_RESET_RX |
writel            485 drivers/net/ethernet/nxp/lpc_eth.c 	writel((LPC_COMMAND_REG_RESET | LPC_COMMAND_TXRESET |
writel            492 drivers/net/ethernet/nxp/lpc_eth.c 	writel(LPC_MCFG_RESET_MII_MGMT, LPC_ENET_MCFG(pldat->net_base));
writel            495 drivers/net/ethernet/nxp/lpc_eth.c 	writel(LPC_MCFG_CLOCK_SELECT(LPC_MCFG_CLOCK_HOST_DIV_28),
writel            513 drivers/net/ethernet/nxp/lpc_eth.c 	writel((LPC_MACINT_RXDONEINTEN | LPC_MACINT_TXDONEINTEN),
writel            519 drivers/net/ethernet/nxp/lpc_eth.c 	writel(0, LPC_ENET_INTENABLE(regbase));
writel            582 drivers/net/ethernet/nxp/lpc_eth.c 	writel((ENET_TX_DESC - 1),
writel            584 drivers/net/ethernet/nxp/lpc_eth.c 	writel(__va_to_pa(pldat->tx_desc_v, pldat),
writel            586 drivers/net/ethernet/nxp/lpc_eth.c 	writel(__va_to_pa(pldat->tx_stat_v, pldat),
writel            588 drivers/net/ethernet/nxp/lpc_eth.c 	writel((ENET_RX_DESC - 1),
writel            590 drivers/net/ethernet/nxp/lpc_eth.c 	writel(__va_to_pa(pldat->rx_desc_v, pldat),
writel            592 drivers/net/ethernet/nxp/lpc_eth.c 	writel(__va_to_pa(pldat->rx_stat_v, pldat),
writel            603 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_COMMAND(pldat->net_base));
writel            606 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_MAC1(pldat->net_base));
writel            609 drivers/net/ethernet/nxp/lpc_eth.c 	writel(LPC_MAC1_PASS_ALL_RX_FRAMES, LPC_ENET_MAC1(pldat->net_base));
writel            610 drivers/net/ethernet/nxp/lpc_eth.c 	writel((LPC_MAC2_PAD_CRC_ENABLE | LPC_MAC2_CRC_ENABLE),
writel            612 drivers/net/ethernet/nxp/lpc_eth.c 	writel(ENET_MAXF_SIZE, LPC_ENET_MAXF(pldat->net_base));
writel            615 drivers/net/ethernet/nxp/lpc_eth.c 	writel((LPC_CLRT_LOAD_RETRY_MAX(0xF) |
writel            618 drivers/net/ethernet/nxp/lpc_eth.c 	writel(LPC_IPGR_LOAD_PART2(0x12), LPC_ENET_IPGR(pldat->net_base));
writel            621 drivers/net/ethernet/nxp/lpc_eth.c 		writel(LPC_COMMAND_PASSRUNTFRAME,
writel            624 drivers/net/ethernet/nxp/lpc_eth.c 		writel((LPC_COMMAND_PASSRUNTFRAME | LPC_COMMAND_RMII),
writel            626 drivers/net/ethernet/nxp/lpc_eth.c 		writel(LPC_SUPP_RESET_RMII, LPC_ENET_SUPP(pldat->net_base));
writel            635 drivers/net/ethernet/nxp/lpc_eth.c 	writel((LPC_RXFLTRW_ACCEPTUBROADCAST | LPC_RXFLTRW_ACCEPTPERFECT),
writel            644 drivers/net/ethernet/nxp/lpc_eth.c 	writel(0xFFFF, LPC_ENET_INTCLEAR(pldat->net_base));
writel            651 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_COMMAND(pldat->net_base));
writel            654 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_MAC1(pldat->net_base));
writel            661 drivers/net/ethernet/nxp/lpc_eth.c 	writel(0, LPC_ENET_MAC1(pldat->net_base));
writel            662 drivers/net/ethernet/nxp/lpc_eth.c 	writel(0, LPC_ENET_MAC2(pldat->net_base));
writel            674 drivers/net/ethernet/nxp/lpc_eth.c 	writel(((phy_id << 8) | phyreg), LPC_ENET_MADR(pldat->net_base));
writel            675 drivers/net/ethernet/nxp/lpc_eth.c 	writel(LPC_MCMD_READ, LPC_ENET_MCMD(pldat->net_base));
writel            685 drivers/net/ethernet/nxp/lpc_eth.c 	writel(0, LPC_ENET_MCMD(pldat->net_base));
writel            696 drivers/net/ethernet/nxp/lpc_eth.c 	writel(((phy_id << 8) | phyreg), LPC_ENET_MADR(pldat->net_base));
writel            697 drivers/net/ethernet/nxp/lpc_eth.c 	writel(phydata, LPC_ENET_MWTD(pldat->net_base));
writel            796 drivers/net/ethernet/nxp/lpc_eth.c 		writel(LPC_COMMAND_PASSRUNTFRAME,
writel            799 drivers/net/ethernet/nxp/lpc_eth.c 		writel((LPC_COMMAND_PASSRUNTFRAME | LPC_COMMAND_RMII),
writel            801 drivers/net/ethernet/nxp/lpc_eth.c 		writel(LPC_SUPP_RESET_RMII, LPC_ENET_SUPP(pldat->net_base));
writel            948 drivers/net/ethernet/nxp/lpc_eth.c 		writel(rxconsidx,
writel            987 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp, LPC_ENET_INTCLEAR(pldat->net_base));
writel           1015 drivers/net/ethernet/nxp/lpc_eth.c 	writel(0, LPC_ENET_MAC1(pldat->net_base));
writel           1016 drivers/net/ethernet/nxp/lpc_eth.c 	writel(0, LPC_ENET_MAC2(pldat->net_base));
writel           1065 drivers/net/ethernet/nxp/lpc_eth.c 	writel(txidx, LPC_ENET_TXPRODUCEINDEX(pldat->net_base));
writel           1121 drivers/net/ethernet/nxp/lpc_eth.c 	writel(tmp32, LPC_ENET_RXFILTER_CTRL(pldat->net_base));
writel           1138 drivers/net/ethernet/nxp/lpc_eth.c 	writel(hashlo, LPC_ENET_HASHFILTERL(pldat->net_base));
writel           1139 drivers/net/ethernet/nxp/lpc_eth.c 	writel(hashhi, LPC_ENET_HASHFILTERH(pldat->net_base));
writel            866 drivers/net/ethernet/packetengines/hamachi.c 	writel(hmp->rx_ring_dma, ioaddr + RxPtr);
writel            867 drivers/net/ethernet/packetengines/hamachi.c 	writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
writel            868 drivers/net/ethernet/packetengines/hamachi.c 	writel(hmp->tx_ring_dma, ioaddr + TxPtr);
writel            869 drivers/net/ethernet/packetengines/hamachi.c 	writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
writel            871 drivers/net/ethernet/packetengines/hamachi.c 	writel(hmp->rx_ring_dma, ioaddr + RxPtr);
writel            872 drivers/net/ethernet/packetengines/hamachi.c 	writel(hmp->tx_ring_dma, ioaddr + TxPtr);
writel            931 drivers/net/ethernet/packetengines/hamachi.c 	writel(0x0030FFFF, ioaddr + FlowCtrl);
writel            955 drivers/net/ethernet/packetengines/hamachi.c 	writel(tx_int_var, ioaddr + TxIntrCtrl);
writel            956 drivers/net/ethernet/packetengines/hamachi.c 	writel(rx_int_var, ioaddr + RxIntrCtrl);
writel            963 drivers/net/ethernet/packetengines/hamachi.c 	writel(0x80878787, ioaddr + InterruptEnable);
writel           1663 drivers/net/ethernet/packetengines/hamachi.c 	writel(0x0000, ioaddr + InterruptEnable);
writel           1666 drivers/net/ethernet/packetengines/hamachi.c 	writel(2, ioaddr + RxCmd);
writel           1782 drivers/net/ethernet/packetengines/hamachi.c 			writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8);
writel           1783 drivers/net/ethernet/packetengines/hamachi.c 			writel(0x20000 | (*(u16 *)&ha->addr[4]),
writel           1789 drivers/net/ethernet/packetengines/hamachi.c 			writel(0, ioaddr + 0x104 + i*8);
writel           1877 drivers/net/ethernet/packetengines/hamachi.c 		writel(d[0], np->base + TxIntrCtrl);
writel           1878 drivers/net/ethernet/packetengines/hamachi.c 		writel(d[1], np->base + RxIntrCtrl);
writel           1206 drivers/net/ethernet/qlogic/netxen/netxen_nic.h 	writel((addr & 0xFFFF0000), (void __iomem *) (bar0 +            \
writel           1214 drivers/net/ethernet/qlogic/netxen/netxen_nic.h 	writel((addr & 0xFFFF0000), (void __iomem *) (bar0 +            \
writel           1217 drivers/net/ethernet/qlogic/netxen/netxen_nic.h 	writel(data, (void __iomem *) (bar0 + NX_FW_DUMP_REG2 + LSW(addr)));\
writel           1283 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define NX_PCI_WRITE_32(DATA, ADDR)	writel(DATA, (ADDR))
writel           1059 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(window, offset);
writel           1129 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(window, addr);
writel           1179 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 		writel(data, addr);
writel           1229 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 		writel(data, addr);
writel           1238 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 		writel(data, addr);
writel           1285 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(data, addr);
writel           1304 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(data, addr);
writel           1356 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(window, adapter->ahw.ocm_win_crb);
writel           1485 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(off_lo, (mem_crb + MIU_TEST_AGT_ADDR_LO));
writel           1486 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(off_hi, (mem_crb + addr_hi));
writel           1487 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(data & 0xffffffff, (mem_crb + data_lo));
writel           1488 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((data >> 32) & 0xffffffff, (mem_crb + data_hi));
writel           1489 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((TA_CTL_ENABLE | TA_CTL_WRITE), (mem_crb + TEST_AGT_CTRL));
writel           1490 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((TA_CTL_START | TA_CTL_ENABLE | TA_CTL_WRITE),
writel           1563 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(off_lo, (mem_crb + MIU_TEST_AGT_ADDR_LO));
writel           1564 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(off_hi, (mem_crb + addr_hi));
writel           1565 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(TA_CTL_ENABLE, (mem_crb + TEST_AGT_CTRL));
writel           1566 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((TA_CTL_START|TA_CTL_ENABLE), (mem_crb + TEST_AGT_CTRL));
writel           1630 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(off8, (mem_crb + MIU_TEST_AGT_ADDR_LO));
writel           1631 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(0, (mem_crb + MIU_TEST_AGT_ADDR_HI));
writel           1633 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(data & 0xffffffff,
writel           1635 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((data >> 32) & 0xffffffff,
writel           1638 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((TA_CTL_ENABLE | TA_CTL_WRITE), (mem_crb + TEST_AGT_CTRL));
writel           1639 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((TA_CTL_START | TA_CTL_ENABLE | TA_CTL_WRITE),
writel           1700 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(off8, (mem_crb + MIU_TEST_AGT_ADDR_LO));
writel           1701 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(0, (mem_crb + MIU_TEST_AGT_ADDR_HI));
writel           1702 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(TA_CTL_ENABLE, (mem_crb + TEST_AGT_CTRL));
writel           1703 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel((TA_CTL_START | TA_CTL_ENABLE), (mem_crb + TEST_AGT_CTRL));
writel           2129 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c 	writel(adapter->ahw.pci_func, (void __iomem *)(adapter->ahw.pci_base0 +
writel           2316 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c 		writel((our_int & 0xffffffff), adapter->crb_int_state_reg);
writel           2322 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c 	writel(0xffffffff, adapter->tgt_status_reg);
writel           2338 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c 	writel(0xffffffff, adapter->tgt_status_reg);
writel            961 drivers/net/ethernet/qlogic/qed/qed.h #define REG_WR(cdev, offset, val)       writel((u32)val, REG_ADDR(cdev, offset))
writel            965 drivers/net/ethernet/qlogic/qed/qed.h 	writel((u32)val, (void __iomem *)((u8 __iomem *)\
writel           1545 drivers/net/ethernet/qlogic/qede/qede_ethtool.c 	writel(txq->tx_db.raw, txq->doorbell_addr);
writel            321 drivers/net/ethernet/qlogic/qede/qede_fp.c 	writel(txq->tx_db.raw, txq->doorbell_addr);
writel            113 drivers/net/ethernet/qlogic/qla3xxx.c 		writel((sem_mask | sem_bits),
writel            127 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(sem_mask, &port_regs->CommonRegs.semaphoreReg);
writel            137 drivers/net/ethernet/qlogic/qla3xxx.c 	writel((sem_mask | sem_bits), &port_regs->CommonRegs.semaphoreReg);
writel            170 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(((ISP_CONTROL_NP_MASK << 16) | page),
writel            221 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(value, reg);
writel            229 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(value, reg);
writel            236 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(value, reg);
writel            246 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(value, reg);
writel            258 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(value, reg);
writel            270 drivers/net/ethernet/qlogic/qla3xxx.c 	writel(value, reg);
writel           1912 drivers/net/ethernet/qlogic/qla3xxx.c 		writel(qdev->lrg_buf_q_producer_index,
writel           2195 drivers/net/ethernet/qlogic/qla3xxx.c 		writel(qdev->rsp_consumer_index,
writel           2179 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 		writel(0x0, tx_ring->crb_intr_mask);
writel           2188 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 		writel(1, tx_ring->crb_intr_mask);
writel           2195 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 	writel(0, tx_ring->crb_intr_mask);
writel           2202 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 	writel(1, tx_ring->crb_intr_mask);
writel           2210 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 	writel(0, sds_ring->crb_intr_mask);
writel           2218 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 	writel(1, sds_ring->crb_intr_mask);
writel           2237 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 		writel(0x1, sds_ring->crb_intr_mask);
writel           2239 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 		writel(0, sds_ring->crb_intr_mask);
writel           2281 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 		writel(0, sds_ring->crb_intr_mask);
writel           2283 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 		writel(0x1, sds_ring->crb_intr_mask);
writel           2286 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 		writel(0xfbff, adapter->tgt_mask_reg);
writel            292 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 	writel(addr, base);
writel            419 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 	writel(0, adapter->tgt_mask_reg);
writel            425 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 		writel(1, adapter->tgt_mask_reg);
writel            439 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 	writel(0, adapter->ahw->pci_base0 + mask);
writel            447 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 	writel(1, adapter->ahw->pci_base0 + mask);
writel           2367 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 	writel(0, adapter->ahw->pci_base0 + mask);
writel           3964 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 		writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
writel           3966 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 			writel(cmd->req.arg[i], QLCNIC_MBX_HOST(ahw, i));
writel           3973 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 		writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
writel           3981 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 		writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 1));
writel           3984 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 			writel(*(cmd->hdr++), QLCNIC_MBX_HOST(ahw, i));
writel           3986 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 			writel(*(cmd->pay++), QLCNIC_MBX_HOST(ahw, i));
writel             46 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(((u32) (val)), (addr));
writel             47 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(((u32) (val >> 32)), (addr + 4));
writel            290 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(dest, val);
writel            303 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(dest, val);
writel            306 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(data, val);
writel           1166 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(window, addr);
writel           1187 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 		writel(data, addr);
writel           1197 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 			writel(data, addr);
writel           1257 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(window, adapter->ahw->ocm_win_crb);
writel           1270 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c 	writel(0, adapter->ahw->ocm_win_crb);
writel             44 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h 	writel(value, ((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
writel             52 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h 	writel(value, (((ahw)->pci_base0) + ((ahw)->ext_reg_tbl[addr])))
writel            880 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c 		writel((producer - 1) & (rds_ring->num_desc - 1),
writel           1431 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c 		writel(consumer, sds_ring->crb_sts_consumer);
writel           1473 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c 		writel((producer-1) & (rds_ring->num_desc-1),
writel           1570 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c 	writel(consumer, sds_ring->crb_sts_consumer);
writel           1945 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c 		writel(consumer, sds_ring->crb_sts_consumer);
writel           2231 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c 	writel(consumer, sds_ring->crb_sts_consumer);
writel            121 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c 	writel(tx_ring->producer, tx_ring->crb_cmd_producer);
writel           3126 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c 	writel(0xffffffff, adapter->tgt_status_reg);
writel           3142 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c 		writel(0xffffffff, adapter->tgt_status_reg);
writel           3174 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c 	writel(0xffffffff, adapter->tgt_status_reg);
writel            265 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(mta, adpt->base + EMAC_HASH_TAB_REG0 + (reg << 2));
writel            270 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(0, adpt->base + EMAC_HASH_TAB_REG0);
writel            271 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(0, adpt->base + EMAC_HASH_TAB_REG1);
writel            298 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(mac, adpt->base + EMAC_MAC_CTRL);
writel            305 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(upper_32_bits(adpt->tx_q.tpd.dma_addr),
writel            308 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(lower_32_bits(adpt->tx_q.tpd.dma_addr),
writel            311 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(adpt->tx_q.tpd.count & TPD_RING_SIZE_BMSK,
writel            315 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(upper_32_bits(adpt->rx_q.rfd.dma_addr),
writel            318 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(lower_32_bits(adpt->rx_q.rfd.dma_addr),
writel            320 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(lower_32_bits(adpt->rx_q.rrd.dma_addr),
writel            323 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(adpt->rx_q.rfd.count & RFD_RING_SIZE_BMSK,
writel            325 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(adpt->rx_q.rrd.count & RRD_RING_SIZE_BMSK,
writel            328 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(adpt->rxbuf_size & RX_BUFFER_SIZE_BMSK,
writel            331 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(0, adpt->base + EMAC_DESC_CTRL_11);
writel            336 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(1, adpt->base + EMAC_INTER_SRAM_PART9);
writel            344 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel((EMAC_MAX_TX_OFFLOAD_THRESH >> 3) &
writel            354 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(val, adpt->base + EMAC_TXQ_CTRL_0);
writel            368 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(val, adpt->base + EMAC_RXQ_CTRL_0);
writel            376 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(val, adpt->base + EMAC_RXQ_CTRL_1);
writel            382 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(val, adpt->base + EMAC_RXQ_CTRL_2);
writel            387 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(val, adpt->base + EMAC_RXQ_CTRL_3);
writel            419 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(dma_ctrl, adpt->base + EMAC_DMA_CTRL);
writel            434 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(sta, adpt->base + EMAC_MAC_STA_ADDR0);
writel            438 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(sta, adpt->base + EMAC_MAC_STA_ADDR1);
writel            455 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(netdev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN,
writel            465 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(val, adpt->base + EMAC_AXI_MAST_CTRL);
writel            466 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(0, adpt->base + EMAC_CLK_GATE_CTRL);
writel            467 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(RX_UNCPL_INT_EN, adpt->base + EMAC_MISC_CTRL);
writel            951 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel((u32)~DIS_INT, adpt->base + EMAC_INT_STATUS);
writel            952 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(adpt->irq.mask, adpt->base + EMAC_INT_MASK);
writel            976 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(DIS_INT, adpt->base + EMAC_INT_STATUS);
writel            977 drivers/net/ethernet/qualcomm/emac/emac-mac.c 	writel(0, adpt->base + EMAC_INT_MASK);
writel             57 drivers/net/ethernet/qualcomm/emac/emac-phy.c 	writel(reg, adpt->base + EMAC_MDIO_CTRL);
writel             81 drivers/net/ethernet/qualcomm/emac/emac-phy.c 	writel(reg, adpt->base + EMAC_MDIO_CTRL);
writel            145 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c 		writel(itr->val, base + itr->offset);
writel            221 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c 	writel(SERDES_START, phy->base + EMAC_SGMII_PHY_SERDES_START);
writel            234 drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c 	writel(0, phy->base + EMAC_SGMII_PHY_INTERRUPT_MASK);
writel            122 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c 		writel(itr->val, base + itr->offset);
writel            190 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c 	writel(0, phy_regs + EMAC_SGMII_PHY_RESET_CTRL);
writel            191 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c 	writel(1, laned + SGMII_LN_RSM_START);
writel            207 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c 	writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN0);
writel            208 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c 	writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN2);
writel            209 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c 	writel(0, phy_regs + SGMII_PHY_LN_CDR_CTRL1);
writel            212 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c 	writel(0, phy_regs + EMAC_SGMII_PHY_INTERRUPT_MASK);
writel            112 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c 		writel(itr->val, base + itr->offset);
writel            177 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c 	writel(0, phy_regs + EMAC_SGMII_PHY_RESET_CTRL);
writel            178 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c 	writel(1, laned + SGMII_LN_RSM_START);
writel            194 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c 	writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN0);
writel            195 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c 	writel(0, phy_regs + SGMII_PHY_LN_BIST_GEN2);
writel            196 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c 	writel(0, phy_regs + SGMII_PHY_LN_CDR_CTRL1);
writel            199 drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c 	writel(0, phy_regs + EMAC_SGMII_PHY_INTERRUPT_MASK);
writel            100 drivers/net/ethernet/qualcomm/emac/emac-sgmii.c 	writel(val, phy->base + EMAC_SGMII_PHY_AUTONEG_CFG2);
writel            186 drivers/net/ethernet/qualcomm/emac/emac-sgmii.c 	writel(((val & ~PHY_RESET) | PHY_RESET), phy->base +
writel            191 drivers/net/ethernet/qualcomm/emac/emac-sgmii.c 	writel((val & ~PHY_RESET), phy->base + EMAC_EMAC_WRAPPER_CSR2);
writel            222 drivers/net/ethernet/qualcomm/emac/emac-sgmii.c 		writel(0, sgmii->base + EMAC_SGMII_PHY_INTERRUPT_MASK);
writel            241 drivers/net/ethernet/qualcomm/emac/emac-sgmii.c 	writel(0, sgmii->base + EMAC_SGMII_PHY_INTERRUPT_MASK);
writel            257 drivers/net/ethernet/qualcomm/emac/emac-sgmii.c 		writel(SGMII_ISR_MASK,
writel            261 drivers/net/ethernet/qualcomm/emac/emac-sgmii.c 		writel(0, sgmii->base + EMAC_SGMII_PHY_INTERRUPT_MASK);
writel             77 drivers/net/ethernet/qualcomm/emac/emac.c 	writel(((data & ~mask) | val), addr);
writel            111 drivers/net/ethernet/qualcomm/emac/emac.c 		writel(irq->mask, adpt->base + EMAC_INT_MASK);
writel            134 drivers/net/ethernet/qualcomm/emac/emac.c 	writel(0, adpt->base + EMAC_INT_MASK);
writel            168 drivers/net/ethernet/qualcomm/emac/emac.c 	writel(irq->mask, adpt->base + EMAC_INT_MASK);
writel            360 drivers/net/ethernet/realtek/8139cp.c #define cpw32(reg,val)	writel((val), cp->regs + (reg))
writel            370 drivers/net/ethernet/realtek/8139cp.c 	writel((val), cp->regs + (reg));	\
writel             81 drivers/net/ethernet/realtek/r8169_main.c #define RTL_W32(tp, reg, val32)	writel((val32), tp->mmio_addr + (reg))
writel            114 drivers/net/ethernet/rocker/rocker_main.c 	writel((val), (rocker)->hw_addr + (ROCKER_ ## reg))
writel             31 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(regval, ioaddr + SXGBE_CORE_TX_CONFIG_REG);
writel             40 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(regval, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
writel             96 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(high_word, ioaddr + SXGBE_CORE_ADD_HIGHOFFSET(reg_n));
writel             97 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(low_word, ioaddr + SXGBE_CORE_ADD_LOWOFFSET(reg_n));
writel            126 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(tx_config, ioaddr + SXGBE_CORE_TX_CONFIG_REG);
writel            138 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(rx_config, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
writel            162 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG);
writel            172 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG);
writel            182 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG);
writel            196 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(ctrl, ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
writel            205 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(ctrl, ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
writel            220 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(ctrl, ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
writel            235 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(value, ioaddr + SXGBE_CORE_LPI_TIMER_CTRL);
writel            244 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(ctrl, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
writel            253 drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c 	writel(ctrl, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
writel             38 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(reg_val,	ioaddr + SXGBE_DMA_SYSBUS_MODE_REG);
writel             54 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(reg_val, ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num));
writel             58 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(reg_val, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num));
writel             62 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(reg_val, ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cha_num));
writel             66 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(upper_32_bits(dma_tx),
writel             68 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(lower_32_bits(dma_tx),
writel             71 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(upper_32_bits(dma_rx),
writel             73 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(lower_32_bits(dma_rx),
writel             81 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(lower_32_bits(dma_addr),
writel             85 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(lower_32_bits(dma_addr),
writel             88 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(t_rsize - 1, ioaddr + SXGBE_DMA_CHA_TXDESC_RINGLEN_REG(cha_num));
writel             89 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(r_rsize - 1, ioaddr + SXGBE_DMA_CHA_RXDESC_RINGLEN_REG(cha_num));
writel             92 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(SXGBE_DMA_ENA_INT,
writel            102 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(tx_config, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num));
writel            108 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(SXGBE_DMA_ENA_INT,
writel            115 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(0, ioaddr + SXGBE_DMA_CHA_INT_ENABLE_REG(dma_cnum));
writel            126 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(tx_ctl_reg,
writel            137 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(tx_ctl_reg, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum));
writel            146 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(tx_ctl_reg, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum));
writel            157 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(tx_ctl_reg, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cnum));
writel            169 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(rx_ctl_reg,
writel            182 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(rx_ctl_reg, ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cnum));
writel            253 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(clear_val, ioaddr + SXGBE_DMA_CHA_STATUS_REG(channel_no));
writel            319 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(clear_val, ioaddr + SXGBE_DMA_CHA_STATUS_REG(channel_no));
writel            330 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 		writel(riwt,
writel            341 drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c 	writel(ctrl, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(chan_num));
writel            416 drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c 	writel(reg_val, priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
writel           1715 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 	writel(SXGBE_MMC_CTRL_CNT_FRZ, ioaddr + SXGBE_MMC_CTL_REG);
writel           1754 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 	writel(0, ioaddr + SXGBE_MMC_CTL_REG);
writel           1821 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 	writel(data | SXGBE_HI_REG_AE, ioaddr + SXGBE_ADDR_HIGH(reg_n));
writel           1823 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 	writel(data, ioaddr + SXGBE_ADDR_LOW(reg_n));
writel           1855 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 		writel(0xffffffff, ioaddr + SXGBE_HASH_HIGH);
writel           1856 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 		writel(0xffffffff, ioaddr + SXGBE_HASH_LOW);
writel           1875 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 		writel(mc_filter[0], ioaddr + SXGBE_HASH_LOW);
writel           1876 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 		writel(mc_filter[1], ioaddr + SXGBE_HASH_HIGH);
writel           1895 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 	writel(value, ioaddr + SXGBE_FRAME_FILTER);
writel           2031 drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c 	writel(SXGBE_DMA_SOFT_RESET, addr + SXGBE_DMA_MODE_REG);
writel             49 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c 	writel(reg, sp->ioaddr + sp->hw->mii.data);
writel             60 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c 	writel(reg, sp->ioaddr + sp->hw->mii.addr);
writel             70 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c 	writel(1 << phyaddr, sp->ioaddr + SXGBE_MDIO_CLAUSE22_PORT_REG);
writel             74 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c 	writel(reg, sp->ioaddr + sp->hw->mii.addr);
writel             40 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG);
writel             50 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG);
writel             56 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(RX_QUEUE_DYNAMIC, ioaddr + SXGBE_MTL_RXQ_DMAMAP0_REG);
writel             57 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(RX_QUEUE_DYNAMIC, ioaddr + SXGBE_MTL_RXQ_DMAMAP1_REG);
writel             58 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(RX_QUEUE_DYNAMIC, ioaddr + SXGBE_MTL_RXQ_DMAMAP2_REG);
writel             70 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
writel             82 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel             91 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
writel            100 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
writel            112 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            121 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            133 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            143 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            153 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            163 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            173 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            205 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
writel            227 drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c 	writel(reg_val, ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
writel            203 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(mcr_pack(500, 65), mcr);
writel            206 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(mcr_pack(0, 500), mcr);
writel            216 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(mcr_pack(6, 13), mcr);
writel            218 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(mcr_pack(0, 100), mcr);
writel            227 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(mcr_pack(6, 110), mcr);
writel            229 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(mcr_pack(80, 30), mcr);
writel            366 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(1 << 21, &ip->all_regs->gpcr_s);
writel            406 drivers/net/ethernet/sgi/ioc3-eth.c 	writel((dev->dev_addr[5] <<  8) |
writel            409 drivers/net/ethernet/sgi/ioc3-eth.c 	writel((dev->dev_addr[3] << 24) |
writel            440 drivers/net/ethernet/sgi/ioc3-eth.c 	writel((phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG,
writel            455 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(data, &regs->midr_w);
writel            456 drivers/net/ethernet/sgi/ioc3-eth.c 	writel((phy << MICR_PHYADDR_SHIFT) | reg, &regs->micr);
writel            615 drivers/net/ethernet/sgi/ioc3-eth.c 	writel((n_entry << 3) | ERPIR_ARM, &ip->regs->erpir);
writel            714 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(eisr, &regs->eisr);
writel            735 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(ETCSR_FD, &regs->etcsr);
writel            738 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(ETCSR_HD, &regs->etcsr);
writel            741 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ip->emcr, &regs->emcr);
writel            892 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(readl(&regs->emcr) | (EMCR_BUFSIZ | EMCR_RAMPAR), &regs->emcr);
writel            895 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(pattern, ssram0);
writel            896 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(~pattern & IOC3_SSRAM_DM, ssram1);
writel            902 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(readl(&regs->emcr) & ~EMCR_BUFSIZ, &regs->emcr);
writel            915 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(EMCR_RST, &regs->emcr);		/* Reset		*/
writel            918 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &regs->emcr);
writel            922 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ERBAR_VAL, &regs->erbar);
writel            924 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(15, &regs->ercsr);		/* RX low watermark  */
writel            925 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &regs->ertr);			/* Interrupt immediately */
writel            927 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ip->ehar_h, &regs->ehar_h);
writel            928 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ip->ehar_l, &regs->ehar_l);
writel            929 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(42, &regs->ersr);		/* XXX should be random */
writel            939 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ring >> 32, &regs->erbr_h);
writel            940 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ring & 0xffffffff, &regs->erbr_l);
writel            941 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ip->rx_ci << 3, &regs->ercir);
writel            942 drivers/net/ethernet/sgi/ioc3-eth.c 	writel((ip->rx_pi << 3) | ERPIR_ARM, &regs->erpir);
writel            949 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ring >> 32, &regs->etbr_h);
writel            950 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ring & 0xffffffff, &regs->etbr_l);
writel            951 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ip->tx_pi << 7, &regs->etpir);
writel            952 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ip->tx_ci << 7, &regs->etcir);
writel            957 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(ip->emcr, &regs->emcr);
writel            958 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO |
writel            968 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &regs->emcr);			/* Shutup */
writel            969 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &regs->eier);			/* Disable interrupts */
writel           1125 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL, &ioc3->gpcr_s);
writel           1127 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &ioc3->gppr[6]);
writel           1129 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &ioc3->gppr[7]);
writel           1131 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(readl(&ioc3->port_a.sscr) & ~SSCR_DMA_EN, &ioc3->port_a.sscr);
writel           1133 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(readl(&ioc3->port_b.sscr) & ~SSCR_DMA_EN, &ioc3->port_b.sscr);
writel           1147 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(sio_iec, &ioc3->sio_iec);
writel           1148 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &ioc3->port_a.sscr);
writel           1149 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(0, &ioc3->port_b.sscr);
writel           1476 drivers/net/ethernet/sgi/ioc3-eth.c 	writel(produce << 7, &ip->regs->etpir);		/* Fire ... */
writel           1634 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(ip->emcr, &regs->emcr);
writel           1638 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(ip->emcr, &regs->emcr);		/* Clear promiscuous. */
writel           1656 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(ip->ehar_h, &regs->ehar_h);
writel           1657 drivers/net/ethernet/sgi/ioc3-eth.c 		writel(ip->ehar_l, &regs->ehar_l);
writel             76 drivers/net/ethernet/sis/sis190.c #define SIS_W32(reg, val)	writel ((val), ioaddr + (reg))
writel            131 drivers/net/ethernet/smsc/smc911x.h 		writel(value, ioaddr);
writel            192 drivers/net/ethernet/smsc/smc911x.h #define SMC_outl(v, lp, r)	 writel(v, (lp)->base + (r))
writel             89 drivers/net/ethernet/smsc/smc91x.h #define SMC_outl(v, a, r)	writel(v, (a) + (r))
writel            105 drivers/net/ethernet/smsc/smc91x.h 		writel(v, ioaddr + (reg & ~2));
writel            148 drivers/net/ethernet/smsc/smc91x.h #define SMC_outl(v, a, r)       writel(v, (a) + (r))
writel            193 drivers/net/ethernet/smsc/smsc911x.c 		writel(val, pdata->ioaddr + reg);
writel            210 drivers/net/ethernet/smsc/smsc911x.c 		writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
writel            332 drivers/net/ethernet/socionext/netsec.c 	writel(val, priv->ioaddr + reg_addr);
writel            323 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + addr);
writel            351 drivers/net/ethernet/socionext/sni_ave.c 	writel(0, priv->base + AVE_GIMR);
writel            360 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_GIMR);
writel            367 drivers/net/ethernet/socionext/sni_ave.c 	writel(readl(priv->base + AVE_GIMR) | bitflag, priv->base + AVE_GIMR);
writel            368 drivers/net/ethernet/socionext/sni_ave.c 	writel(bitflag, priv->base + AVE_GISR);
writel            377 drivers/net/ethernet/socionext/sni_ave.c 	writel(mac_addr[0] | mac_addr[1] << 8 |
writel            379 drivers/net/ethernet/socionext/sni_ave.c 	writel(mac_addr[4] | mac_addr[5] << 8, priv->base + reg2);
writel            501 drivers/net/ethernet/socionext/sni_ave.c 	writel((phyid << 8) | regnum, priv->base + AVE_MDIOAR);
writel            505 drivers/net/ethernet/socionext/sni_ave.c 	writel((mdioctl | AVE_MDIOCTR_RREQ) & ~AVE_MDIOCTR_WREQ,
writel            530 drivers/net/ethernet/socionext/sni_ave.c 	writel((phyid << 8) | regnum, priv->base + AVE_MDIOAR);
writel            533 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_MDIOWDR);
writel            537 drivers/net/ethernet/socionext/sni_ave.c 	writel((mdioctl | AVE_MDIOCTR_WREQ) & ~AVE_MDIOCTR_RREQ,
writel            639 drivers/net/ethernet/socionext/sni_ave.c 		writel(AVE_DESCC_TD | AVE_DESCC_RD0, priv->base + AVE_DESCC);
writel            643 drivers/net/ethernet/socionext/sni_ave.c 		writel(0, priv->base + AVE_DESCC);
writel            655 drivers/net/ethernet/socionext/sni_ave.c 		writel(val, priv->base + AVE_DESCC);
writel            668 drivers/net/ethernet/socionext/sni_ave.c 		writel(val, priv->base + AVE_DESCC);
writel            863 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_CFGR);
writel            868 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_RSTCTRL);
writel            871 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_GRR_GRST | AVE_GRR_PHYRST, priv->base + AVE_GRR);
writel            875 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_GRR_GRST, priv->base + AVE_GRR);
writel            879 drivers/net/ethernet/socionext/sni_ave.c 	writel(0, priv->base + AVE_GRR);
writel            885 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_RSTCTRL);
writel            897 drivers/net/ethernet/socionext/sni_ave.c 	writel(rxcr_org & (~AVE_RXCR_RXEN), priv->base + AVE_RXCR);
writel            906 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_GRR_RXFFR, priv->base + AVE_GRR);
writel            910 drivers/net/ethernet/socionext/sni_ave.c 	writel(0, priv->base + AVE_GRR);
writel            914 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_GI_RXOVF, priv->base + AVE_GISR);
writel            920 drivers/net/ethernet/socionext/sni_ave.c 	writel(rxcr_org, priv->base + AVE_RXCR);
writel            936 drivers/net/ethernet/socionext/sni_ave.c 		writel(AVE_GI_PHY, priv->base + AVE_GISR);
writel            940 drivers/net/ethernet/socionext/sni_ave.c 		writel(AVE_GI_RXERR, priv->base + AVE_GISR);
writel            958 drivers/net/ethernet/socionext/sni_ave.c 		writel(AVE_GI_RXDROP, priv->base + AVE_GISR);
writel            990 drivers/net/ethernet/socionext/sni_ave.c 	writel(val | BIT(entry), priv->base + AVE_PFEN);
writel           1004 drivers/net/ethernet/socionext/sni_ave.c 	writel(val & ~BIT(entry), priv->base + AVE_PFEN);
writel           1028 drivers/net/ethernet/socionext/sni_ave.c 	writel(GENMASK(31, set_size) & AVE_PFMBYTE_MASK0,
writel           1030 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_PFMBYTE_MASK1, priv->base + AVE_PFMBYTE(entry) + 4);
writel           1033 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_PFMBIT_MASK, priv->base + AVE_PFMBIT(entry));
writel           1036 drivers/net/ethernet/socionext/sni_ave.c 	writel(0, priv->base + AVE_PFSEL(entry));
writel           1055 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_PFMBYTE_MASK0, priv->base + AVE_PFMBYTE(entry));
writel           1056 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_PFMBYTE_MASK1, priv->base + AVE_PFMBYTE(entry) + 4);
writel           1059 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_PFMBIT_MASK, priv->base + AVE_PFMBIT(entry));
writel           1062 drivers/net/ethernet/socionext/sni_ave.c 	writel(rxring, priv->base + AVE_PFSEL(entry));
writel           1104 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_TXCR);
writel           1113 drivers/net/ethernet/socionext/sni_ave.c 		writel(val, priv->base + AVE_LINKSEL);
writel           1147 drivers/net/ethernet/socionext/sni_ave.c 		writel(rxcr & ~AVE_RXCR_RXEN, priv->base + AVE_RXCR);
writel           1149 drivers/net/ethernet/socionext/sni_ave.c 		writel(txcr, priv->base + AVE_TXCR);
writel           1150 drivers/net/ethernet/socionext/sni_ave.c 		writel(rxcr, priv->base + AVE_RXCR);
writel           1297 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_TXDC_ADDR_START |
writel           1308 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_RXDC0_ADDR_START |
writel           1321 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_RXCR);
writel           1325 drivers/net/ethernet/socionext/sni_ave.c 	writel(AVE_TXCR_FLOCTR, priv->base + AVE_TXCR);
writel           1330 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_IIRQC);
writel           1477 drivers/net/ethernet/socionext/sni_ave.c 	writel(val, priv->base + AVE_RXCR);
writel             34 drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c 	writel(val, (void *)(gmac->ctl_block + reg));
writel            214 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c 		writel(value, eqos->regs + SDMEMCOMPPADCTRL);
writel            220 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c 		writel(value, eqos->regs + AUTO_CAL_CONFIG);
writel            243 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c 		writel(value, eqos->regs + SDMEMCOMPPADCTRL);
writel            247 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c 		writel(value, eqos->regs + AUTO_CAL_CONFIG);
writel            264 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c 	writel(value, eqos->regs + GMAC_1US_TIC_COUNTER);
writel             41 drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c 	writel(val, dwmac->reg);
writel             81 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c 	writel(data, dwmac->regs + reg);
writel            103 drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c 	writel(value, ethqos->rgmii_base + offset);
writel             93 drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c 		writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG);
writel            270 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0, ioaddr + EMAC_RX_CTL1);
writel            271 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0, ioaddr + EMAC_TX_CTL1);
writel            272 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0, ioaddr + EMAC_RX_FRM_FLT);
writel            273 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0, ioaddr + EMAC_RX_DESC_LIST);
writel            274 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0, ioaddr + EMAC_TX_DESC_LIST);
writel            275 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0, ioaddr + EMAC_INT_EN);
writel            276 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0x1FFFFFF, ioaddr + EMAC_INT_STA);
writel            286 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN);
writel            287 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0x1FFFFFF, ioaddr + EMAC_INT_STA);
writel            295 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(lower_32_bits(dma_rx_phy), ioaddr + EMAC_RX_DESC_LIST);
writel            303 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(lower_32_bits(dma_tx_phy), ioaddr + EMAC_TX_DESC_LIST);
writel            340 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN);
writel            345 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(0, ioaddr + EMAC_INT_EN);
writel            355 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_TX_CTL1);
writel            365 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_TX_CTL1);
writel            374 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_TX_CTL1);
writel            384 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_RX_CTL1);
writel            393 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_RX_CTL1);
writel            451 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_INT_STA);
writel            476 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_RX_CTL1);
writel            505 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_TX_CTL1);
writel            557 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_BASIC_CTL1);
writel            573 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(t, ioaddr + EMAC_TX_CTL0);
writel            574 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(r, ioaddr + EMAC_RX_CTL0);
writel            589 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 		writel(0, ioaddr + EMAC_MACADDR_HI(reg_n));
writel            598 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 		writel(v, ioaddr + EMAC_MACADDR_HI(reg_n));
writel            620 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_RX_CTL0);
writel            663 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_RX_FRM_FLT);
writel            678 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_RX_CTL0);
writel            685 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v, ioaddr + EMAC_TX_FLOW_CTL);
writel            694 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(v | 0x01, priv->ioaddr + EMAC_BASIC_CTL1);
writel           1017 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 	writel(value, ioaddr + EMAC_BASIC_CTL0);
writel             64 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + GMAC_CONTROL);
writel             72 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + GMAC_INT_MASK);
writel             76 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(0x0, ioaddr + GMAC_VLAN_TAG);
writel             90 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + GMAC_CONTROL);
writel            131 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 		writel(mcfilterbits[0], ioaddr + GMAC_HASH_LOW);
writel            132 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 		writel(mcfilterbits[1], ioaddr + GMAC_HASH_HIGH);
writel            147 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 		writel(mcfilterbits[regs],
writel            213 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 			writel(0, ioaddr + GMAC_ADDR_HIGH(reg));
writel            214 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 			writel(0, ioaddr + GMAC_ADDR_LOW(reg));
writel            223 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + GMAC_FRAME_FILTER);
writel            252 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(flow, ioaddr + GMAC_FLOW_CTRL);
writel            269 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(pmt, ioaddr + GMAC_PMT);
writel            366 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + LPI_CTRL_STATUS);
writel            376 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + LPI_CTRL_STATUS);
writel            391 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + LPI_CTRL_STATUS);
writel            406 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + LPI_TIMER_CTRL);
writel            509 drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 	writel(value, ioaddr + GMAC_CONTROL);
writel             70 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(value, ioaddr + DMA_AXI_BUS_MODE);
writel            107 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(value, ioaddr + DMA_BUS_MODE);
writel            110 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
writel            118 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(lower_32_bits(dma_rx_phy), ioaddr + DMA_RCV_BASE_ADDR);
writel            126 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(lower_32_bits(dma_tx_phy), ioaddr + DMA_TX_BASE_ADDR);
writel            175 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(csr6, ioaddr + DMA_CONTROL);
writel            208 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(csr6, ioaddr + DMA_CONTROL);
writel            260 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 	writel(riwt, ioaddr + DMA_RX_WATCHDOG);
writel             38 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 	writel(value, ioaddr + MAC_CONTROL);
writel             41 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 	writel(ETH_P_8021Q, ioaddr + MAC_VLAN1);
writel            100 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 		writel(0xffffffff, ioaddr + MAC_HASH_HIGH);
writel            101 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 		writel(0xffffffff, ioaddr + MAC_HASH_LOW);
writel            128 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 		writel(mc_filter[0], ioaddr + MAC_HASH_LOW);
writel            129 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 		writel(mc_filter[1], ioaddr + MAC_HASH_HIGH);
writel            132 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 	writel(value, ioaddr + MAC_CONTROL);
writel            144 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 	writel(flow, ioaddr + MAC_FLOW_CTRL);
writel            162 drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 	writel(value, ioaddr + MAC_CONTROL);
writel             25 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c 	writel(DMA_BUS_MODE_DEFAULT | (dma_cfg->pbl << DMA_BUS_MODE_PBL_SHIFT),
writel             29 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
writel             37 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c 	writel(lower_32_bits(dma_rx_phy), ioaddr + DMA_RCV_BASE_ADDR);
writel             45 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c 	writel(lower_32_bits(dma_tx_phy), ioaddr + DMA_TX_BASE_ADDR);
writel             65 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c 	writel(csr6, ioaddr + DMA_CONTROL);
writel             48 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_CONFIG);
writel             56 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_INT_EN);
writel             71 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_RXQ_CTRL0);
writel             90 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + base_register);
writel            110 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + base_register);
writel            143 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_RXQ_CTRL1);
writel            164 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + MTL_OPERATION_MODE);
writel            191 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + MTL_OPERATION_MODE);
writel            202 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + MTL_TXQX_WEIGHT_BASE_ADDR(queue));
writel            224 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 		writel(value, ioaddr + MTL_RXQ_DMA_MAP0);
writel            226 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 		writel(value, ioaddr + MTL_RXQ_DMA_MAP1);
writel            246 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + MTL_ETSX_CTRL_BASE_ADDR(queue));
writel            252 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + MTL_SEND_SLP_CREDX_BASE_ADDR(queue));
writel            261 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + MTL_HIGH_CREDX_BASE_ADDR(queue));
writel            267 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + MTL_LOW_CREDX_BASE_ADDR(queue));
writel            289 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_CONFIG);
writel            315 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 		writel(config, ioaddr + GMAC_CONFIG);
writel            317 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(pmt, ioaddr + GMAC_PMT);
writel            354 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
writel            364 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
writel            379 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
writel            394 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC4_LPI_TIMER_CTRL);
writel            446 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 		writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i));
writel            466 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 			writel(0, ioaddr + GMAC_ADDR_HIGH(reg));
writel            467 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 			writel(0, ioaddr + GMAC_ADDR_LOW(reg));
writel            472 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_PACKET_FILTER);
writel            488 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(flow, ioaddr + GMAC_RX_FLOW_CTRL);
writel            503 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 			writel(flow, ioaddr + GMAC_QX_TX_FLOW_CTRL(queue));
writel            507 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 			writel(0, ioaddr + GMAC_QX_TX_FLOW_CTRL(queue));
writel            575 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 			writel(status | MTL_RX_OVERFLOW_INT,
writel            732 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_CONFIG);
writel            740 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(hash, ioaddr + GMAC_VLAN_HASH_TABLE);
writel            750 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 		writel(value, ioaddr + GMAC_VLAN_TAG);
writel            759 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 		writel(value, ioaddr + GMAC_VLAN_TAG);
writel            770 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_CONFIG);
writel            783 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_VLAN_INCL);
writel            792 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(addr, ioaddr + GMAC_ARP_ADDR);
writel            799 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 	writel(value, ioaddr + GMAC_CONFIG);
writel             68 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(value, ioaddr + DMA_SYS_BUS_MODE);
writel             80 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(value, ioaddr + DMA_CHAN_RX_CONTROL(chan));
writel             82 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(lower_32_bits(dma_rx_phy), ioaddr + DMA_CHAN_RX_BASE_ADDR(chan));
writel             98 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan));
writel            100 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(lower_32_bits(dma_tx_phy), ioaddr + DMA_CHAN_TX_BASE_ADDR(chan));
writel            112 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(value, ioaddr + DMA_CHAN_CONTROL(chan));
writel            115 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(DMA_CHAN_INTR_DEFAULT_MASK,
writel            135 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(value, ioaddr + DMA_SYS_BUS_MODE);
writel            190 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 		writel(riwt, ioaddr + DMA_CHAN_RX_WATCHDOG(chan));
writel            267 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(mtl_rx_op, ioaddr + MTL_CHAN_RX_OP_MODE(channel));
writel            271 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(mtl_rx_int | MTL_RX_OVERFLOW_INT_EN,
writel            324 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(mtl_tx_op, ioaddr +  MTL_CHAN_TX_OP_MODE(channel));
writel            401 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 		writel(value | DMA_CONTROL_TSE,
writel            406 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 		writel(value & ~DMA_CONTROL_TSE,
writel            421 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(mtl_tx_op, ioaddr +  MTL_CHAN_TX_OP_MODE(channel));
writel            431 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 	writel(value, ioaddr + DMA_CHAN_RX_CONTROL(chan));
writel             21 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + DMA_BUS_MODE);
writel             37 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(tail_ptr, ioaddr + DMA_CHAN_RX_END_ADDR(chan));
writel             42 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(tail_ptr, ioaddr + DMA_CHAN_TX_END_ADDR(chan));
writel             50 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan));
writel             54 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + GMAC_CONFIG);
writel             62 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan));
writel             66 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + GMAC_CONFIG);
writel             75 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + DMA_CHAN_RX_CONTROL(chan));
writel             79 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + GMAC_CONFIG);
writel             87 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + DMA_CHAN_RX_CONTROL(chan));
writel             92 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(len, ioaddr + DMA_CHAN_TX_RING_LEN(chan));
writel             97 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(len, ioaddr + DMA_CHAN_RX_RING_LEN(chan));
writel            102 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(DMA_CHAN_INTR_DEFAULT_MASK, ioaddr +
writel            108 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(DMA_CHAN_INTR_DEFAULT_MASK_4_10,
writel            114 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(0, ioaddr + DMA_CHAN_INTR_ENA(chan));
writel            159 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(intr_status & intr_en, ioaddr + DMA_CHAN_STATUS(chan));
writel            174 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(data | GMAC_HI_REG_AE, ioaddr + high);
writel            176 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(data, ioaddr + low);
writel            189 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c 	writel(value, ioaddr + GMAC_CONFIG);
writel             84 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + MAC_DPP_FSM_INT_STATUS);
writel            132 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + MTL_ECC_INT_STATUS);
writel            180 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + DMA_ECC_INT_STATUS);
writel            200 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + MTL_ECC_CONTROL);
writel            208 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + MTL_ECC_INT_ENABLE);
writel            213 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + DMA_ECC_INT_ENABLE);
writel            223 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + MAC_FSM_CONTROL);
writel            228 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + MTL_DPP_CONTROL);
writel            238 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(value, ioaddr + MTL_DPP_CONTROL);
writel            312 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(val, ioaddr + MTL_OPERATION_MODE);
writel            327 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(val, ioaddr + MTL_OPERATION_MODE);
writel            348 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 		writel(val, ioaddr + MTL_RXP_IACC_DATA);
writel            352 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 		writel(val, ioaddr + MTL_RXP_IACC_CTRL_STATUS);
writel            356 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 		writel(val, ioaddr + MTL_RXP_IACC_CTRL_STATUS);
writel            360 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 		writel(val, ioaddr + MTL_RXP_IACC_CTRL_STATUS);
writel            423 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(val, ioaddr + GMAC_CONFIG);
writel            488 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(val, ioaddr + MTL_RXP_CONTROL_STATUS);
writel            495 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(old_val, ioaddr + GMAC_CONFIG);
writel            519 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 		writel(val, ioaddr + MAC_PPS_CONTROL);
writel            527 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(cfg->start.tv_sec, ioaddr + MAC_PPSx_TARGET_TIME_SEC(index));
writel            531 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(cfg->start.tv_nsec, ioaddr + MAC_PPSx_TARGET_TIME_NSEC(index));
writel            541 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(period - 1, ioaddr + MAC_PPSx_INTERVAL(index));
writel            547 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(period - 1, ioaddr + MAC_PPSx_WIDTH(index));
writel            550 drivers/net/ethernet/stmicro/stmmac/dwmac5.c 	writel(val, ioaddr + MAC_PPS_CONTROL);
writel             23 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(value, ioaddr + DMA_BUS_MODE);
writel             37 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(1, ioaddr + DMA_XMT_POLL_DEMAND);
writel             42 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
writel             47 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(0, ioaddr + DMA_INTR_ENA);
writel             54 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(value, ioaddr + DMA_CONTROL);
writel             61 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(value, ioaddr + DMA_CONTROL);
writel             68 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(value, ioaddr + DMA_CONTROL);
writel             75 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(value, ioaddr + DMA_CONTROL);
writel            214 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel((intr_status & 0x1ffff), ioaddr + DMA_STATUS);
writel            222 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
writel            237 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(data | GMAC_HI_REG_AE, ioaddr + high);
writel            239 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(data, ioaddr + low);
writel            253 drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c 	writel(value, ioaddr + MAC_CTRL_REG);
writel             44 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(tx, ioaddr + XGMAC_TX_CONFIG);
writel             45 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(rx, ioaddr + XGMAC_RX_CONFIG);
writel             46 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(XGMAC_INT_DEFAULT_EN, ioaddr + XGMAC_INT_EN);
writel             62 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(tx, ioaddr + XGMAC_TX_CONFIG);
writel             63 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(rx, ioaddr + XGMAC_RX_CONFIG);
writel             76 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_RX_CONFIG);
writel             92 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_RXQ_CTRL0);
writel            109 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + reg);
writel            126 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + reg);
writel            148 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_MTL_OPMODE);
writel            177 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_MTL_OPMODE);
writel            185 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(value, ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(i));
writel            194 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(weight, ioaddr + XGMAC_MTL_TCx_QUANTUM_WEIGHT(queue));
writel            211 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + reg);
writel            221 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(send_slope, ioaddr + XGMAC_MTL_TCx_SENDSLOPE(queue));
writel            222 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(idle_slope, ioaddr + XGMAC_MTL_TCx_QUANTUM_WEIGHT(queue));
writel            223 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(high_credit, ioaddr + XGMAC_MTL_TCx_HICREDIT(queue));
writel            224 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(low_credit, ioaddr + XGMAC_MTL_TCx_LOCREDIT(queue));
writel            229 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(queue));
writel            291 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(~0x0, ioaddr + XGMAC_MTL_QINT_STATUS(chan));
writel            305 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(XGMAC_RFE, ioaddr + XGMAC_RX_FLOW_CTRL);
writel            313 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 			writel(value, ioaddr + XGMAC_Qx_TX_FLOW_CTRL(i));
writel            330 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(cfg, ioaddr + XGMAC_RX_CONFIG);
writel            333 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(val, ioaddr + XGMAC_PMT);
writel            343 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value | XGMAC_AE, ioaddr + XGMAC_ADDRx_HIGH(reg_n));
writel            346 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_ADDRx_LOW(reg_n));
writel            380 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_LPI_CTRL);
writel            390 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_LPI_CTRL);
writel            403 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_LPI_CTRL);
writel            412 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_LPI_TIMER_CTRL);
writel            435 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(mcfilterbits[regs], ioaddr + XGMAC_HASH_TABLE(regs));
writel            460 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 			writel(~0x0, ioaddr + XGMAC_HASH_TABLE(i));
writel            488 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 			writel(0, ioaddr + XGMAC_ADDRx_HIGH(reg));
writel            489 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 			writel(0, ioaddr + XGMAC_ADDRx_LOW(reg));
writel            493 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_PACKET_FILTER);
writel            505 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_RX_CONFIG);
writel            513 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(val, ioaddr + XGMAC_RSS_DATA);
writel            517 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(ctrl, ioaddr + XGMAC_RSS_ADDR);
writel            533 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(value, ioaddr + XGMAC_RSS_CTRL);
writel            554 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_RSS_CTRL);
writel            563 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(hash, ioaddr + XGMAC_VLAN_HASH_TABLE);
writel            570 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(value, ioaddr + XGMAC_PACKET_FILTER);
writel            579 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(value, ioaddr + XGMAC_VLAN_TAG);
writel            585 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(value, ioaddr + XGMAC_PACKET_FILTER);
writel            594 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(value, ioaddr + XGMAC_VLAN_TAG);
writel            671 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_MAC_DPP_FSM_INT_STATUS);
writel            719 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_MTL_ECC_INT_STATUS);
writel            767 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_DMA_ECC_INT_STATUS);
writel            781 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(0x0, ioaddr + XGMAC_MTL_ECC_CONTROL);
writel            789 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_MTL_ECC_INT_ENABLE);
writel            795 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_DMA_ECC_INT_ENABLE);
writel            805 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_MAC_FSM_CONTROL);
writel            881 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(val, ioaddr + XGMAC_MTL_OPMODE);
writel            892 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(val, ioaddr + XGMAC_MTL_OPMODE);
writel            913 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(val, ioaddr + XGMAC_MTL_RXP_IACC_DATA);
writel            917 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(val, ioaddr + XGMAC_MTL_RXP_IACC_CTRL_ST);
writel            921 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(val, ioaddr + XGMAC_MTL_RXP_IACC_CTRL_ST);
writel            925 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(val, ioaddr + XGMAC_MTL_RXP_IACC_CTRL_ST);
writel            989 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(val, ioaddr + XGMAC_RX_CONFIG);
writel           1054 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(val, ioaddr + XGMAC_MTL_RXP_CONTROL_STATUS);
writel           1061 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(old_val, ioaddr + XGMAC_RX_CONFIG);
writel           1098 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 		writel(val, ioaddr + XGMAC_PPS_CONTROL);
writel           1106 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(cfg->start.tv_sec, ioaddr + XGMAC_PPSx_TARGET_TIME_SEC(index));
writel           1110 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(cfg->start.tv_nsec, ioaddr + XGMAC_PPSx_TARGET_TIME_NSEC(index));
writel           1120 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(period - 1, ioaddr + XGMAC_PPSx_INTERVAL(index));
writel           1126 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(period - 1, ioaddr + XGMAC_PPSx_WIDTH(index));
writel           1129 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(val, ioaddr + XGMAC_PPS_CONTROL);
writel           1140 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_TX_CONFIG);
writel           1153 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_VLAN_INCL);
writel           1180 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_L3L4_ADDR_CTRL);
writel           1201 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(data, ioaddr + XGMAC_L3L4_DATA);
writel           1205 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_L3L4_ADDR_CTRL);
writel           1220 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_PACKET_FILTER);
writel           1283 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_PACKET_FILTER);
writel           1337 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(addr, ioaddr + XGMAC_ARP_ADDR);
writel           1344 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c 	writel(value, ioaddr + XGMAC_RX_CONFIG);
writel             16 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value | XGMAC_SWR, ioaddr + XGMAC_DMA_MODE);
writel             30 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value | XGMAC_EAME, ioaddr + XGMAC_DMA_SYSBUS_MODE);
writel             41 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_CONTROL(chan));
writel             42 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(XGMAC_DMA_INT_DEFAULT_EN, ioaddr + XGMAC_DMA_CH_INT_EN(chan));
writel             55 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
writel             57 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(upper_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_HADDR(chan));
writel             58 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(lower_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_LADDR(chan));
writel             72 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
writel             74 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(upper_32_bits(phy), ioaddr + XGMAC_DMA_CH_TxDESC_HADDR(chan));
writel             75 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(lower_32_bits(phy), ioaddr + XGMAC_DMA_CH_TxDESC_LADDR(chan));
writel            126 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE);
writel            127 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(XGMAC_TDPS, ioaddr + XGMAC_TX_EDMA_CTRL);
writel            128 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(XGMAC_RDPS, ioaddr + XGMAC_RX_EDMA_CTRL);
writel            205 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 		writel(flow, ioaddr + XGMAC_MTL_RXQ_FLOW_CONTROL(channel));
writel            208 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_MTL_RXQ_OPMODE(channel));
writel            212 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value | XGMAC_RXOIE, ioaddr + XGMAC_MTL_QINTEN(channel));
writel            255 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr +  XGMAC_MTL_TXQ_OPMODE(channel));
writel            260 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(XGMAC_DMA_INT_DEFAULT_EN, ioaddr + XGMAC_DMA_CH_INT_EN(chan));
writel            265 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(0, ioaddr + XGMAC_DMA_CH_INT_EN(chan));
writel            274 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
writel            278 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_TX_CONFIG);
writel            287 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
writel            291 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_TX_CONFIG);
writel            300 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
writel            304 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_RX_CONFIG);
writel            313 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
writel            354 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(intr_en & intr_status, ioaddr + XGMAC_DMA_CH_STATUS(chan));
writel            435 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 		writel(riwt & XGMAC_RWT, ioaddr + XGMAC_DMA_CH_Rx_WATCHDOG(i));
writel            440 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(len, ioaddr + XGMAC_DMA_CH_RxDESC_RING_LEN(chan));
writel            445 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(len, ioaddr + XGMAC_DMA_CH_TxDESC_RING_LEN(chan));
writel            450 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(ptr, ioaddr + XGMAC_DMA_CH_RxDESC_TAIL_LPTR(chan));
writel            455 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(ptr, ioaddr + XGMAC_DMA_CH_TxDESC_TAIL_LPTR(chan));
writel            467 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
writel            478 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 		writel(0, ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(channel));
writel            481 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 		writel(flow & (~XGMAC_RFE), ioaddr + XGMAC_RX_FLOW_CTRL);
writel            484 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr +  XGMAC_MTL_TXQ_OPMODE(channel));
writel            494 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
writel            503 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_RX_CONFIG);
writel            510 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c 	writel(value, ioaddr + XGMAC_DMA_CH_CONTROL(chan));
writel            187 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(value, mmcaddr + MMC_CNTRL);
writel            196 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(MMC_DEFAULT_MASK, mmcaddr + MMC_RX_INTR_MASK);
writel            197 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(MMC_DEFAULT_MASK, mmcaddr + MMC_TX_INTR_MASK);
writel            198 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(MMC_DEFAULT_MASK, mmcaddr + MMC_RX_IPC_INTR_MASK);
writel            332 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(value, mmcaddr + MMC_CNTRL);
writel            337 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(0x0, mmcaddr + MMC_RX_INTR_MASK);
writel            338 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(0x0, mmcaddr + MMC_TX_INTR_MASK);
writel            339 drivers/net/ethernet/stmicro/stmmac/mmc_core.c 	writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_IPC_INTR_MASK);
writel             19 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(data, ioaddr + PTP_TCR);
writel             52 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(reg_value, ioaddr + PTP_SSIR);
writel             63 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(sec, ioaddr + PTP_STSUR);
writel             64 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(nsec, ioaddr + PTP_STNSUR);
writel             68 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(value, ioaddr + PTP_TCR);
writel             88 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(addend, ioaddr + PTP_TAR);
writel             92 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(value, ioaddr + PTP_TCR);
writel            128 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(sec, ioaddr + PTP_STSUR);
writel            130 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(value, ioaddr + PTP_STNSUR);
writel            135 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 	writel(value, ioaddr + PTP_TCR);
writel            934 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 	writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
writel             63 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(tmp, priv->ioaddr + XGMAC_MDIO_C22P);
writel             96 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(addr, priv->ioaddr + mii_address);
writel             97 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(value, priv->ioaddr + mii_data);
writel            137 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(addr, priv->ioaddr + mii_address);
writel            138 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(value, priv->ioaddr + mii_data);
writel            188 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(data, priv->ioaddr + mii_data);
writel            189 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(value, priv->ioaddr + mii_address);
writel            248 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(data, priv->ioaddr + mii_data);
writel            249 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 	writel(value, priv->ioaddr + mii_address);
writel            302 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 		writel(0, priv->ioaddr + mii_address);
writel             91 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h 	writel(value, ioaddr + GMAC_AN_CTRL(reg));
writel            123 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h 	writel(value, ioaddr + GMAC_AN_CTRL(reg));
writel            286 drivers/net/ethernet/sun/cassini.c 		writel(0xFFFFFFFF, cp->regs + REG_INTR_MASK);
writel            303 drivers/net/ethernet/sun/cassini.c 			writel(INTRN_MASK_CLEAR_ALL | INTRN_MASK_RX_EN,
writel            308 drivers/net/ethernet/sun/cassini.c 			writel(INTRN_MASK_CLEAR_ALL, cp->regs +
writel            326 drivers/net/ethernet/sun/cassini.c 		writel(INTR_TX_DONE, cp->regs + REG_INTR_MASK);
writel            342 drivers/net/ethernet/sun/cassini.c 			writel(INTRN_MASK_RX_EN, cp->regs +
writel            378 drivers/net/ethernet/sun/cassini.c 	writel(BIM_LOCAL_DEV_PAD | BIM_LOCAL_DEV_PROM | BIM_LOCAL_DEV_EXT,
writel            401 drivers/net/ethernet/sun/cassini.c 	writel(cmd, cp->regs + REG_MIF_FRAME);
writel            423 drivers/net/ethernet/sun/cassini.c 	writel(cmd, cp->regs + REG_MIF_FRAME);
writel            676 drivers/net/ethernet/sun/cassini.c 	writel((enable) ? ~(BMSR_LSTATUS | BMSR_ANEGCOMPLETE) : 0xFFFF,
writel            678 drivers/net/ethernet/sun/cassini.c 	writel(cfg, cp->regs + REG_MIF_CFG);
writel            758 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_PCS_MII_CTRL);
writel            869 drivers/net/ethernet/sun/cassini.c 		writel(PCS_DATAPATH_MODE_MII,
writel            905 drivers/net/ethernet/sun/cassini.c 			writel((cp->phy_type & CAS_PHY_MII_MDIO0) ?
writel            947 drivers/net/ethernet/sun/cassini.c 		writel(PCS_DATAPATH_MODE_SERDES,
writel            952 drivers/net/ethernet/sun/cassini.c 			writel(0, cp->regs + REG_SATURN_PCFG);
writel            957 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_PCS_MII_CTRL);
writel            973 drivers/net/ethernet/sun/cassini.c 		writel(0x0, cp->regs + REG_PCS_CFG);
writel            980 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_PCS_MII_ADVERT);
writel            983 drivers/net/ethernet/sun/cassini.c 		writel(PCS_CFG_EN, cp->regs + REG_PCS_CFG);
writel            986 drivers/net/ethernet/sun/cassini.c 		writel(PCS_SERDES_CTRL_SYNCD_EN,
writel           1166 drivers/net/ethernet/sun/cassini.c 		writel(i, cp->regs + REG_HP_INSTR_RAM_ADDR);
writel           1170 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_HI);
writel           1179 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_MID);
writel           1185 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_LOW);
writel           1204 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_RX_CFG);
writel           1208 drivers/net/ethernet/sun/cassini.c 	writel((desc_dma + val) >> 32, cp->regs + REG_RX_DB_HI);
writel           1209 drivers/net/ethernet/sun/cassini.c 	writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_DB_LOW);
writel           1210 drivers/net/ethernet/sun/cassini.c 	writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK);
writel           1218 drivers/net/ethernet/sun/cassini.c 		writel((desc_dma + val) >> 32, cp->regs + REG_PLUS_RX_DB1_HI);
writel           1219 drivers/net/ethernet/sun/cassini.c 		writel((desc_dma + val) & 0xffffffff, cp->regs +
writel           1221 drivers/net/ethernet/sun/cassini.c 		writel(RX_DESC_RINGN_SIZE(1) - 4, cp->regs +
writel           1228 drivers/net/ethernet/sun/cassini.c 	writel((desc_dma + val) >> 32, cp->regs + REG_RX_CB_HI);
writel           1229 drivers/net/ethernet/sun/cassini.c 	writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_CB_LOW);
writel           1236 drivers/net/ethernet/sun/cassini.c 			writel((desc_dma + val) >> 32, cp->regs +
writel           1238 drivers/net/ethernet/sun/cassini.c 			writel((desc_dma + val) & 0xffffffff, cp->regs +
writel           1248 drivers/net/ethernet/sun/cassini.c 	writel(INTR_RX_DONE | INTR_RX_BUF_UNAVAIL, cp->regs + REG_ALIAS_CLEAR);
writel           1255 drivers/net/ethernet/sun/cassini.c 			writel(INTR_RX_DONE_ALT | INTR_RX_BUF_UNAVAIL_1,
writel           1259 drivers/net/ethernet/sun/cassini.c 			writel(INTR_RX_DONE_ALT,
writel           1268 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_RX_PAUSE_THRESH);
writel           1272 drivers/net/ethernet/sun/cassini.c 		writel(i, cp->regs + REG_RX_TABLE_ADDR);
writel           1273 drivers/net/ethernet/sun/cassini.c 		writel(0x0, cp->regs + REG_RX_TABLE_DATA_LOW);
writel           1274 drivers/net/ethernet/sun/cassini.c 		writel(0x0, cp->regs + REG_RX_TABLE_DATA_MID);
writel           1275 drivers/net/ethernet/sun/cassini.c 		writel(0x0, cp->regs + REG_RX_TABLE_DATA_HI);
writel           1279 drivers/net/ethernet/sun/cassini.c 	writel(0x0, cp->regs + REG_RX_CTRL_FIFO_ADDR);
writel           1280 drivers/net/ethernet/sun/cassini.c 	writel(0x0, cp->regs + REG_RX_IPP_FIFO_ADDR);
writel           1286 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_RX_BLANK);
writel           1288 drivers/net/ethernet/sun/cassini.c 	writel(0x0, cp->regs + REG_RX_BLANK);
writel           1298 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_RX_AE_THRESH);
writel           1301 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_PLUS_RX_AE1_THRESH);
writel           1307 drivers/net/ethernet/sun/cassini.c 	writel(0x0, cp->regs + REG_RX_RED);
writel           1337 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_RX_PAGE_SIZE);
writel           1346 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_HP_CFG);
writel           1452 drivers/net/ethernet/sun/cassini.c 	writel(cp->mac_rx_cfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
writel           1464 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_RX_CFG);
writel           1478 drivers/net/ethernet/sun/cassini.c 	writel(SW_RESET_RX, cp->regs + REG_SW_RESET);
writel           1498 drivers/net/ethernet/sun/cassini.c 	writel(val | RX_CFG_DMA_EN, cp->regs + REG_RX_CFG);
writel           1499 drivers/net/ethernet/sun/cassini.c 	writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK);
writel           1501 drivers/net/ethernet/sun/cassini.c 	writel(val | MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
writel           2198 drivers/net/ethernet/sun/cassini.c 		writel(entry, cp->regs + REG_RX_KICK);
writel           2201 drivers/net/ethernet/sun/cassini.c 		writel(entry, cp->regs + REG_PLUS_RX_KICK1);
writel           2259 drivers/net/ethernet/sun/cassini.c 		writel(cluster, cp->regs + REG_RX_KICK);
writel           2262 drivers/net/ethernet/sun/cassini.c 		writel(cluster, cp->regs + REG_PLUS_RX_KICK1);
writel           2415 drivers/net/ethernet/sun/cassini.c 		writel(last, cp->regs + REG_RX_COMP_TAIL);
writel           2417 drivers/net/ethernet/sun/cassini.c 		writel(last, cp->regs + REG_PLUS_RX_COMPN_TAIL(ring));
writel           2849 drivers/net/ethernet/sun/cassini.c 	writel(entry, cp->regs + REG_TX_KICKN(ring));
writel           2884 drivers/net/ethernet/sun/cassini.c 	writel((desc_dma + off) >> 32, cp->regs + REG_TX_COMPWB_DB_HI);
writel           2885 drivers/net/ethernet/sun/cassini.c 	writel((desc_dma + off) & 0xffffffff, cp->regs + REG_TX_COMPWB_DB_LOW);
writel           2902 drivers/net/ethernet/sun/cassini.c 		writel((desc_dma + off) >> 32, cp->regs + REG_TX_DBN_HI(i));
writel           2903 drivers/net/ethernet/sun/cassini.c 		writel((desc_dma + off) & 0xffffffff, cp->regs +
writel           2909 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_TX_CFG);
writel           2915 drivers/net/ethernet/sun/cassini.c 	writel(0x800, cp->regs + REG_TX_MAXBURST_0);
writel           2916 drivers/net/ethernet/sun/cassini.c 	writel(0x1600, cp->regs + REG_TX_MAXBURST_1);
writel           2917 drivers/net/ethernet/sun/cassini.c 	writel(0x2400, cp->regs + REG_TX_MAXBURST_2);
writel           2918 drivers/net/ethernet/sun/cassini.c 	writel(0x4800, cp->regs + REG_TX_MAXBURST_3);
writel           2920 drivers/net/ethernet/sun/cassini.c 	writel(0x800, cp->regs + REG_TX_MAXBURST_0);
writel           2921 drivers/net/ethernet/sun/cassini.c 	writel(0x800, cp->regs + REG_TX_MAXBURST_1);
writel           2922 drivers/net/ethernet/sun/cassini.c 	writel(0x800, cp->regs + REG_TX_MAXBURST_2);
writel           2923 drivers/net/ethernet/sun/cassini.c 	writel(0x800, cp->regs + REG_TX_MAXBURST_3);
writel           2947 drivers/net/ethernet/sun/cassini.c 			writel((ha->addr[4] << 8) | ha->addr[5],
writel           2949 drivers/net/ethernet/sun/cassini.c 			writel((ha->addr[2] << 8) | ha->addr[3],
writel           2951 drivers/net/ethernet/sun/cassini.c 			writel((ha->addr[0] << 8) | ha->addr[1],
writel           2965 drivers/net/ethernet/sun/cassini.c 		writel(hash_table[i], cp->regs + REG_MAC_HASH_TABLEN(i));
writel           2979 drivers/net/ethernet/sun/cassini.c 			writel(0xFFFF, cp->regs + REG_MAC_HASH_TABLEN(i));
writel           2993 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_COLL_NORMAL);
writel           2994 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_COLL_FIRST);
writel           2995 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_COLL_EXCESS);
writel           2996 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_COLL_LATE);
writel           2997 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_TIMER_DEFER);
writel           2998 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_ATTEMPTS_PEAK);
writel           2999 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_RECV_FRAME);
writel           3000 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_LEN_ERR);
writel           3001 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_ALIGN_ERR);
writel           3002 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_FCS_ERR);
writel           3003 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_RX_CODE_ERR);
writel           3012 drivers/net/ethernet/sun/cassini.c 	writel(0x1, cp->regs + REG_MAC_TX_RESET);
writel           3013 drivers/net/ethernet/sun/cassini.c 	writel(0x1, cp->regs + REG_MAC_RX_RESET);
writel           3048 drivers/net/ethernet/sun/cassini.c 	writel(CAWR_RR_DIS, cp->regs + REG_CAWR);
writel           3055 drivers/net/ethernet/sun/cassini.c 		writel(INF_BURST_EN, cp->regs + REG_INF_BURST);
writel           3058 drivers/net/ethernet/sun/cassini.c 	writel(0x1BF0, cp->regs + REG_MAC_SEND_PAUSE);
writel           3060 drivers/net/ethernet/sun/cassini.c 	writel(0x00, cp->regs + REG_MAC_IPG0);
writel           3061 drivers/net/ethernet/sun/cassini.c 	writel(0x08, cp->regs + REG_MAC_IPG1);
writel           3062 drivers/net/ethernet/sun/cassini.c 	writel(0x04, cp->regs + REG_MAC_IPG2);
writel           3065 drivers/net/ethernet/sun/cassini.c 	writel(0x40, cp->regs + REG_MAC_SLOT_TIME);
writel           3068 drivers/net/ethernet/sun/cassini.c 	writel(ETH_ZLEN + 4, cp->regs + REG_MAC_FRAMESIZE_MIN);
writel           3074 drivers/net/ethernet/sun/cassini.c 	writel(CAS_BASE(MAC_FRAMESIZE_MAX_BURST, 0x2000) |
writel           3084 drivers/net/ethernet/sun/cassini.c 		writel(0x41, cp->regs + REG_MAC_PA_SIZE);
writel           3086 drivers/net/ethernet/sun/cassini.c 		writel(0x07, cp->regs + REG_MAC_PA_SIZE);
writel           3087 drivers/net/ethernet/sun/cassini.c 	writel(0x04, cp->regs + REG_MAC_JAM_SIZE);
writel           3088 drivers/net/ethernet/sun/cassini.c 	writel(0x10, cp->regs + REG_MAC_ATTEMPT_LIMIT);
writel           3089 drivers/net/ethernet/sun/cassini.c 	writel(0x8808, cp->regs + REG_MAC_CTRL_TYPE);
writel           3091 drivers/net/ethernet/sun/cassini.c 	writel((e[5] | (e[4] << 8)) & 0x3ff, cp->regs + REG_MAC_RANDOM_SEED);
writel           3093 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_ADDR_FILTER0);
writel           3094 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_ADDR_FILTER1);
writel           3095 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_ADDR_FILTER2);
writel           3096 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_ADDR_FILTER2_1_MASK);
writel           3097 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_MAC_ADDR_FILTER0_MASK);
writel           3101 drivers/net/ethernet/sun/cassini.c 		writel(0x0, cp->regs + REG_MAC_ADDRN(i));
writel           3103 drivers/net/ethernet/sun/cassini.c 	writel((e[4] << 8) | e[5], cp->regs + REG_MAC_ADDRN(0));
writel           3104 drivers/net/ethernet/sun/cassini.c 	writel((e[2] << 8) | e[3], cp->regs + REG_MAC_ADDRN(1));
writel           3105 drivers/net/ethernet/sun/cassini.c 	writel((e[0] << 8) | e[1], cp->regs + REG_MAC_ADDRN(2));
writel           3107 drivers/net/ethernet/sun/cassini.c 	writel(0x0001, cp->regs + REG_MAC_ADDRN(42));
writel           3108 drivers/net/ethernet/sun/cassini.c 	writel(0xc200, cp->regs + REG_MAC_ADDRN(43));
writel           3109 drivers/net/ethernet/sun/cassini.c 	writel(0x0180, cp->regs + REG_MAC_ADDRN(44));
writel           3121 drivers/net/ethernet/sun/cassini.c 	writel(MAC_TX_FRAME_XMIT, cp->regs + REG_MAC_TX_MASK);
writel           3122 drivers/net/ethernet/sun/cassini.c 	writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK);
writel           3127 drivers/net/ethernet/sun/cassini.c 	writel(0xffffffff, cp->regs + REG_MAC_CTRL_MASK);
writel           3194 drivers/net/ethernet/sun/cassini.c 	writel(BIM_LOCAL_DEV_PROM | BIM_LOCAL_DEV_PAD,
writel           3356 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_BIM_LOCAL_DEV_EN);
writel           3439 drivers/net/ethernet/sun/cassini.c 	writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE);
writel           3477 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_TX_CFG);
writel           3479 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_RX_CFG);
writel           3483 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_MAC_TX_CFG);
writel           3485 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_MAC_RX_CFG);
writel           3516 drivers/net/ethernet/sun/cassini.c 	writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK);
writel           3517 drivers/net/ethernet/sun/cassini.c 	writel(0, cp->regs + REG_RX_COMP_TAIL);
writel           3521 drivers/net/ethernet/sun/cassini.c 			writel(RX_DESC_RINGN_SIZE(1) - 4,
writel           3525 drivers/net/ethernet/sun/cassini.c 			writel(0, cp->regs + REG_PLUS_RX_COMPN_TAIL(i));
writel           3627 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_MAC_XIF_CFG);
writel           3648 drivers/net/ethernet/sun/cassini.c 		writel(val | MAC_TX_CFG_CARRIER_EXTEND,
writel           3653 drivers/net/ethernet/sun/cassini.c 		writel(val | MAC_RX_CFG_CARRIER_EXTEND,
writel           3656 drivers/net/ethernet/sun/cassini.c 		writel(0x200, cp->regs + REG_MAC_SLOT_TIME);
writel           3663 drivers/net/ethernet/sun/cassini.c 		writel(val, cp->regs + REG_MAC_TX_CFG);
writel           3678 drivers/net/ethernet/sun/cassini.c 		writel(val & ~MAC_RX_CFG_CARRIER_EXTEND,
writel           3680 drivers/net/ethernet/sun/cassini.c 		writel(0x40, cp->regs + REG_MAC_SLOT_TIME);
writel           3704 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_MAC_CTRL_CFG);
writel           3734 drivers/net/ethernet/sun/cassini.c 	writel(BIM_LOCAL_DEV_SOFT_0, cp->regs + REG_BIM_LOCAL_DEV_EN);
writel           3752 drivers/net/ethernet/sun/cassini.c 		writel((SW_RESET_TX | SW_RESET_RX | SW_RESET_BLOCK_PCS_SLINK),
writel           3755 drivers/net/ethernet/sun/cassini.c 		writel(SW_RESET_TX | SW_RESET_RX, cp->regs + REG_SW_RESET);
writel           3772 drivers/net/ethernet/sun/cassini.c 	writel(BIM_CFG_DPAR_INTR_ENABLE | BIM_CFG_RMA_INTR_ENABLE |
writel           3779 drivers/net/ethernet/sun/cassini.c 	writel(0xFFFFFFFFU & ~(PCI_ERR_BADACK | PCI_ERR_DTRTO |
writel           3787 drivers/net/ethernet/sun/cassini.c 	writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE);
writel           3802 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_TX_CFG);
writel           3806 drivers/net/ethernet/sun/cassini.c 	writel(val, cp->regs + REG_RX_CFG);
writel           4488 drivers/net/ethernet/sun/cassini.c 	writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
writel           4498 drivers/net/ethernet/sun/cassini.c 	writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
writel           4508 drivers/net/ethernet/sun/cassini.c 	writel(rxcfg, cp->regs + REG_MAC_RX_CFG);
writel             58 drivers/net/ethernet/sun/niu.c 	writel(val & 0xffffffff, reg);
writel             59 drivers/net/ethernet/sun/niu.c 	writel(val >> 32, reg + 0x4UL);
writel            127 drivers/net/ethernet/sun/sungem.c 	writel(cmd, gp->regs + MIF_FRAME);
writel            165 drivers/net/ethernet/sun/sungem.c 	writel(cmd, gp->regs + MIF_FRAME);
writel            190 drivers/net/ethernet/sun/sungem.c 	writel(GREG_STAT_TXDONE, gp->regs + GREG_IMASK);
writel            196 drivers/net/ethernet/sun/sungem.c 	writel(GREG_STAT_NAPI | GREG_STAT_TXDONE, gp->regs + GREG_IMASK);
writel            367 drivers/net/ethernet/sun/sungem.c 	writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST);
writel            378 drivers/net/ethernet/sun/sungem.c 	writel(gp->mac_rx_cfg & ~MAC_RXCFG_ENAB,
writel            391 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + RXDMA_CFG);
writel            405 drivers/net/ethernet/sun/sungem.c 	writel(gp->swrst_base | GREG_SWRST_RXRST,
writel            433 drivers/net/ethernet/sun/sungem.c 	writel(desc_dma >> 32, gp->regs + RXDMA_DBHI);
writel            434 drivers/net/ethernet/sun/sungem.c 	writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW);
writel            435 drivers/net/ethernet/sun/sungem.c 	writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK);
writel            438 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + RXDMA_CFG);
writel            440 drivers/net/ethernet/sun/sungem.c 		writel(((5 & RXDMA_BLANK_IPKTS) |
writel            444 drivers/net/ethernet/sun/sungem.c 		writel(((5 & RXDMA_BLANK_IPKTS) |
writel            449 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + RXDMA_PTHRESH);
writel            451 drivers/net/ethernet/sun/sungem.c 	writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG);
writel            452 drivers/net/ethernet/sun/sungem.c 	writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK);
writel            454 drivers/net/ethernet/sun/sungem.c 	writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
writel            739 drivers/net/ethernet/sun/sungem.c 		writel(kick, gp->regs + RXDMA_KICK);
writel           1113 drivers/net/ethernet/sun/sungem.c 	writel(gp->tx_new, gp->regs + TXDMA_KICK);
writel           1126 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + PCS_MIICTRL);
writel           1147 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + PCS_CFG);
writel           1155 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + PCS_MIIADV);
writel           1163 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + PCS_MIICTRL);
writel           1167 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + PCS_CFG);
writel           1178 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + PCS_SCTRL);
writel           1189 drivers/net/ethernet/sun/sungem.c 	writel(0xffffffff, gp->regs + GREG_IMASK);
writel           1192 drivers/net/ethernet/sun/sungem.c 	writel(gp->swrst_base | GREG_SWRST_TXRST | GREG_SWRST_RXRST,
writel           1217 drivers/net/ethernet/sun/sungem.c 	writel(val | TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG);
writel           1219 drivers/net/ethernet/sun/sungem.c 	writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG);
writel           1221 drivers/net/ethernet/sun/sungem.c 	writel(val | MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG);
writel           1223 drivers/net/ethernet/sun/sungem.c 	writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
writel           1230 drivers/net/ethernet/sun/sungem.c 	writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK);
writel           1241 drivers/net/ethernet/sun/sungem.c 	writel(val & ~TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG);
writel           1243 drivers/net/ethernet/sun/sungem.c 	writel(val & ~RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG);
writel           1245 drivers/net/ethernet/sun/sungem.c 	writel(val & ~MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG);
writel           1247 drivers/net/ethernet/sun/sungem.c 	writel(val & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
writel           1387 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + MAC_TXCFG);
writel           1401 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + MAC_XIFCFG);
writel           1408 drivers/net/ethernet/sun/sungem.c 		writel(val | MAC_TXCFG_TCE, gp->regs + MAC_TXCFG);
writel           1411 drivers/net/ethernet/sun/sungem.c 		writel(val | MAC_RXCFG_RCE, gp->regs + MAC_RXCFG);
writel           1414 drivers/net/ethernet/sun/sungem.c 		writel(val & ~MAC_TXCFG_TCE, gp->regs + MAC_TXCFG);
writel           1417 drivers/net/ethernet/sun/sungem.c 		writel(val & ~MAC_RXCFG_RCE, gp->regs + MAC_RXCFG);
writel           1429 drivers/net/ethernet/sun/sungem.c 		writel(512, gp->regs + MAC_STIME);
writel           1431 drivers/net/ethernet/sun/sungem.c 		writel(64, gp->regs + MAC_STIME);
writel           1437 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + MAC_MCCFG);
writel           1681 drivers/net/ethernet/sun/sungem.c 	writel(mifcfg, gp->regs + MIF_CFG);
writel           1721 drivers/net/ethernet/sun/sungem.c 		writel(val, gp->regs + PCS_DMODE);
writel           1757 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + TXDMA_CFG);
writel           1759 drivers/net/ethernet/sun/sungem.c 	writel(desc_dma >> 32, gp->regs + TXDMA_DBHI);
writel           1760 drivers/net/ethernet/sun/sungem.c 	writel(desc_dma & 0xffffffff, gp->regs + TXDMA_DBLOW);
writel           1763 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + TXDMA_KICK);
writel           1767 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + RXDMA_CFG);
writel           1769 drivers/net/ethernet/sun/sungem.c 	writel(desc_dma >> 32, gp->regs + RXDMA_DBHI);
writel           1770 drivers/net/ethernet/sun/sungem.c 	writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW);
writel           1772 drivers/net/ethernet/sun/sungem.c 	writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK);
writel           1776 drivers/net/ethernet/sun/sungem.c 	writel(val, gp->regs + RXDMA_PTHRESH);
writel           1779 drivers/net/ethernet/sun/sungem.c 		writel(((5 & RXDMA_BLANK_IPKTS) |
writel           1783 drivers/net/ethernet/sun/sungem.c 		writel(((5 & RXDMA_BLANK_IPKTS) |
writel           1796 drivers/net/ethernet/sun/sungem.c 			writel(0xffff, gp->regs + MAC_HASH0 + (i << 2));
writel           1813 drivers/net/ethernet/sun/sungem.c 			writel(hash_table[i], gp->regs + MAC_HASH0 + (i << 2));
writel           1824 drivers/net/ethernet/sun/sungem.c 	writel(0x1bf0, gp->regs + MAC_SNDPAUSE);
writel           1826 drivers/net/ethernet/sun/sungem.c 	writel(0x00, gp->regs + MAC_IPG0);
writel           1827 drivers/net/ethernet/sun/sungem.c 	writel(0x08, gp->regs + MAC_IPG1);
writel           1828 drivers/net/ethernet/sun/sungem.c 	writel(0x04, gp->regs + MAC_IPG2);
writel           1829 drivers/net/ethernet/sun/sungem.c 	writel(0x40, gp->regs + MAC_STIME);
writel           1830 drivers/net/ethernet/sun/sungem.c 	writel(0x40, gp->regs + MAC_MINFSZ);
writel           1833 drivers/net/ethernet/sun/sungem.c 	writel(0x20000000 | (gp->rx_buf_sz + 4), gp->regs + MAC_MAXFSZ);
writel           1835 drivers/net/ethernet/sun/sungem.c 	writel(0x07, gp->regs + MAC_PASIZE);
writel           1836 drivers/net/ethernet/sun/sungem.c 	writel(0x04, gp->regs + MAC_JAMSIZE);
writel           1837 drivers/net/ethernet/sun/sungem.c 	writel(0x10, gp->regs + MAC_ATTLIM);
writel           1838 drivers/net/ethernet/sun/sungem.c 	writel(0x8808, gp->regs + MAC_MCTYPE);
writel           1840 drivers/net/ethernet/sun/sungem.c 	writel((e[5] | (e[4] << 8)) & 0x3ff, gp->regs + MAC_RANDSEED);
writel           1842 drivers/net/ethernet/sun/sungem.c 	writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0);
writel           1843 drivers/net/ethernet/sun/sungem.c 	writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1);
writel           1844 drivers/net/ethernet/sun/sungem.c 	writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2);
writel           1846 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_ADDR3);
writel           1847 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_ADDR4);
writel           1848 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_ADDR5);
writel           1850 drivers/net/ethernet/sun/sungem.c 	writel(0x0001, gp->regs + MAC_ADDR6);
writel           1851 drivers/net/ethernet/sun/sungem.c 	writel(0xc200, gp->regs + MAC_ADDR7);
writel           1852 drivers/net/ethernet/sun/sungem.c 	writel(0x0180, gp->regs + MAC_ADDR8);
writel           1854 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_AFILT0);
writel           1855 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_AFILT1);
writel           1856 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_AFILT2);
writel           1857 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_AF21MSK);
writel           1858 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_AF0MSK);
writel           1864 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_NCOLL);
writel           1865 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_FASUCC);
writel           1866 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_ECOLL);
writel           1867 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_LCOLL);
writel           1868 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_DTIMER);
writel           1869 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_PATMPS);
writel           1870 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_RFCTR);
writel           1871 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_LERR);
writel           1872 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_AERR);
writel           1873 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_FCSERR);
writel           1874 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_RXCVERR);
writel           1879 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_TXCFG);
writel           1880 drivers/net/ethernet/sun/sungem.c 	writel(gp->mac_rx_cfg, gp->regs + MAC_RXCFG);
writel           1881 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_MCCFG);
writel           1882 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_XIFCFG);
writel           1888 drivers/net/ethernet/sun/sungem.c 	writel(MAC_TXSTAT_XMIT, gp->regs + MAC_TXMASK);
writel           1889 drivers/net/ethernet/sun/sungem.c 	writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK);
writel           1894 drivers/net/ethernet/sun/sungem.c 	writel(0xffffffff, gp->regs + MAC_MCMASK);
writel           1899 drivers/net/ethernet/sun/sungem.c 		writel(0, gp->regs + WOL_WAKECSR);
writel           1934 drivers/net/ethernet/sun/sungem.c        	writel(cfg, gp->regs + GREG_CFG);
writel           1942 drivers/net/ethernet/sun/sungem.c 		writel(cfg, gp->regs + GREG_CFG);
writel           1964 drivers/net/ethernet/sun/sungem.c 		writel(mif_cfg, gp->regs + MIF_CFG);
writel           1965 drivers/net/ethernet/sun/sungem.c 		writel(PCS_DMODE_MGM, gp->regs + PCS_DMODE);
writel           1966 drivers/net/ethernet/sun/sungem.c 		writel(MAC_XIFCFG_OE, gp->regs + MAC_XIFCFG);
writel           2001 drivers/net/ethernet/sun/sungem.c 		writel(mif_cfg, gp->regs + MIF_CFG);
writel           2005 drivers/net/ethernet/sun/sungem.c 		writel(mif_cfg, gp->regs + MIF_CFG);
writel           2096 drivers/net/ethernet/sun/sungem.c 	writel(mifcfg, gp->regs + MIF_CFG);
writel           2103 drivers/net/ethernet/sun/sungem.c 		writel(MAC_RXCFG_HFE | MAC_RXCFG_SFCS | MAC_RXCFG_ENAB,
writel           2105 drivers/net/ethernet/sun/sungem.c 		writel((e[4] << 8) | e[5], gp->regs + WOL_MATCH0);
writel           2106 drivers/net/ethernet/sun/sungem.c 		writel((e[2] << 8) | e[3], gp->regs + WOL_MATCH1);
writel           2107 drivers/net/ethernet/sun/sungem.c 		writel((e[0] << 8) | e[1], gp->regs + WOL_MATCH2);
writel           2109 drivers/net/ethernet/sun/sungem.c 		writel(WOL_MCOUNT_N | WOL_MCOUNT_M, gp->regs + WOL_MCOUNT);
writel           2113 drivers/net/ethernet/sun/sungem.c 		writel(csr, gp->regs + WOL_WAKECSR);
writel           2115 drivers/net/ethernet/sun/sungem.c 		writel(0, gp->regs + MAC_RXCFG);
writel           2124 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_TXCFG);
writel           2125 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_XIFCFG);
writel           2126 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + TXDMA_CFG);
writel           2127 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + RXDMA_CFG);
writel           2131 drivers/net/ethernet/sun/sungem.c 		writel(MAC_TXRST_CMD, gp->regs + MAC_TXRST);
writel           2132 drivers/net/ethernet/sun/sungem.c 		writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST);
writel           2140 drivers/net/ethernet/sun/sungem.c 		writel(mifcfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
writel           2141 drivers/net/ethernet/sun/sungem.c 		writel(0, gp->regs + MIF_BBCLK);
writel           2142 drivers/net/ethernet/sun/sungem.c 		writel(0, gp->regs + MIF_BBDATA);
writel           2143 drivers/net/ethernet/sun/sungem.c 		writel(0, gp->regs + MIF_BBOENAB);
writel           2144 drivers/net/ethernet/sun/sungem.c 		writel(MAC_XIFCFG_GMII | MAC_XIFCFG_LBCK, gp->regs + MAC_XIFCFG);
writel           2411 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_FCSERR);
writel           2414 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_AERR);
writel           2417 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_LERR);
writel           2422 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_ECOLL);
writel           2423 drivers/net/ethernet/sun/sungem.c 	writel(0, gp->regs + MAC_LCOLL);
writel           2447 drivers/net/ethernet/sun/sungem.c 	writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0);
writel           2448 drivers/net/ethernet/sun/sungem.c 	writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1);
writel           2449 drivers/net/ethernet/sun/sungem.c 	writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2);
writel           2474 drivers/net/ethernet/sun/sungem.c 	writel(rxcfg & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
writel           2484 drivers/net/ethernet/sun/sungem.c 	writel(rxcfg, gp->regs + MAC_RXCFG);
writel            218 drivers/net/ethernet/sun/sunhme.c 	writel(val, reg);
writel            292 drivers/net/ethernet/sun/sunhme.c 	writel((__val), (__reg))
writel             43 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RCR);
writel             55 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RCR);
writel             68 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(mac_addr_hi, pdata->mac_regs + MAC_MACA0HR);
writel             69 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(mac_addr_lo, pdata->mac_regs + MAC_MACA0LR);
writel            104 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(mac_addr_hi, pdata->mac_regs + *mac_reg);
writel            106 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(mac_addr_lo, pdata->mac_regs + *mac_reg);
writel            130 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_VLANTR);
writel            142 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_VLANTR);
writel            155 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_PFR);
writel            175 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_VLANTR);
writel            188 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_PFR);
writel            238 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_VLANHTR);
writel            260 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_PFR);
writel            290 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_PFR);
writel            358 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(hash_table[i], pdata->mac_regs + hash_reg);
writel            388 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, pdata->mac_regs + MAC_PFR);
writel            402 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RCR);
writel            423 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_VLANIR);
writel            512 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR));
writel            521 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
writel            528 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_TCR);
writel            550 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_TCR);
writel            557 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
writel            569 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR));
writel            616 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR));
writel            623 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RQC0R);
writel            635 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RCR);
writel            654 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RCR);
writel            661 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(0, pdata->mac_regs + MAC_RQC0R);
writel            672 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR));
writel            689 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(lower_32_bits(desc_data->dma_desc_addr),
writel           1072 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(ring->dma_desc_count - 1, XLGMAC_DMA_REG(channel, DMA_CH_TDRLR));
writel           1076 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(upper_32_bits(desc_data->dma_desc_addr),
writel           1078 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(lower_32_bits(desc_data->dma_desc_addr),
writel           1156 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(ring->dma_desc_count - 1, XLGMAC_DMA_REG(channel, DMA_CH_RDRLR));
writel           1160 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(upper_32_bits(desc_data->dma_desc_addr),
writel           1162 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(lower_32_bits(desc_data->dma_desc_addr),
writel           1168 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(lower_32_bits(desc_data->dma_desc_addr),
writel           1199 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
writel           1212 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, pdata->mac_regs + reg);
writel           1231 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
writel           1248 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, pdata->mac_regs + reg);
writel           1263 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RFCR);
writel           1275 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RFCR);
writel           1315 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RIWT));
writel           1336 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
writel           1349 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
writel           1373 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR));
writel           1392 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 			writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR));
writel           1411 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_CR));
writel           1418 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RCR);
writel           1467 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
writel           1482 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MTL_OMR);
writel           1489 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_TC_ETSCR));
writel           1494 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_TC_QWR));
writel           1501 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MTL_OMR);
writel           1528 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 			writel(regval, XLGMAC_MTL_REG(pdata, queue,
writel           1542 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 			writel(regval, XLGMAC_MTL_REG(pdata, queue,
writel           1577 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, pdata->mac_regs + reg);
writel           1589 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + reg);
writel           1595 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + reg);
writel           1601 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + reg);
writel           1644 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
writel           1666 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
writel           1687 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQFCR));
writel           1701 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
writel           1717 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
writel           1733 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
writel           1754 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR));
writel           1772 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_CR));
writel           1803 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR));
writel           1834 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR));
writel           2133 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MMC_CR);
writel           2262 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MMC_CR);
writel           2276 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MMC_CR);
writel           2295 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(val, pdata->mac_regs + MAC_RSSDR);
writel           2306 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RSSAR);
writel           2403 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(pdata->rss_options, pdata->mac_regs + MAC_RSSCR);
writel           2409 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RSSCR);
writel           2424 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_RSSCR);
writel           2456 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR));
writel           2507 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_IER));
writel           2520 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(mtl_q_isr, XLGMAC_MTL_REG(pdata, i, MTL_Q_ISR));
writel           2523 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(0, XLGMAC_MTL_REG(pdata, i, MTL_Q_IER));
writel           2536 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(mac_ier, pdata->mac_regs + MAC_IER);
writel           2542 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MMC_RIER);
writel           2546 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MMC_TIER);
writel           2561 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_TCR);
writel           2578 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_TCR);
writel           2595 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_TCR);
writel           2612 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + MAC_TCR);
writel           2874 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(dma_ch_ier, XLGMAC_DMA_REG(channel, DMA_CH_IER));
writel           2938 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(dma_ch_ier, XLGMAC_DMA_REG(channel, DMA_CH_IER));
writel           2952 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 		writel(regval, XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
writel           2984 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + DMA_SBMR);
writel           3050 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c 	writel(regval, pdata->mac_regs + DMA_MR);
writel            324 drivers/net/ethernet/synopsys/dwc-xlgmac-net.c 		writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR));
writel            983 drivers/net/ethernet/synopsys/dwc-xlgmac-net.c 	writel(lower_32_bits(desc_data->dma_desc_addr),
writel            456 drivers/net/ethernet/tehuti/tehuti.c 	writel((val | CLKPLL_SFTRST) + 0x8, regs + regCLKPLL);
writel            459 drivers/net/ethernet/tehuti/tehuti.c 	writel(val & ~CLKPLL_SFTRST, regs + regCLKPLL);
writel             98 drivers/net/ethernet/tehuti/tehuti.h #define WRITE_REG(pp, reg, val)   writel(val, pp->pBdxRegs + reg)
writel            144 drivers/net/ethernet/ti/cpmac.c #define cpmac_write(base, reg, val)	(writel(val, (void __iomem *)(base) + \
writel             97 drivers/net/ethernet/ti/cpsw-phy-sel.c 	writel(reg, priv->gmii_sel);
writel            150 drivers/net/ethernet/ti/cpsw-phy-sel.c 	writel(reg, priv->gmii_sel);
writel            877 drivers/net/ethernet/ti/cpsw.c 	writel(0, &cpsw->wr_regs->tx_en);
writel            893 drivers/net/ethernet/ti/cpsw.c 	writel(0, &cpsw->wr_regs->rx_en);
writel            931 drivers/net/ethernet/ti/cpsw.c 		writel(0xff, &cpsw->wr_regs->tx_en);
writel            945 drivers/net/ethernet/ti/cpsw.c 		writel(0xff, &cpsw->wr_regs->tx_en);
writel            981 drivers/net/ethernet/ti/cpsw.c 		writel(0xff, &cpsw->wr_regs->rx_en);
writel            995 drivers/net/ethernet/ti/cpsw.c 		writel(0xff, &cpsw->wr_regs->rx_en);
writel           1300 drivers/net/ethernet/ti/cpsw.c 	writel(vlan, &cpsw->host_port_regs->port_vlan);
writel           1330 drivers/net/ethernet/ti/cpsw.c 	writel(control_reg, &cpsw->regs->control);
writel           1333 drivers/net/ethernet/ti/cpsw.c 	writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl);
writel           1707 drivers/net/ethernet/ti/cpsw.c 		writel(0x7, &cpsw->regs->flow_control);
writel            411 drivers/net/ethernet/ti/cpsw_ale.c 	writel(reg_mcast, ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx));
writel            415 drivers/net/ethernet/ti/cpsw_ale.c 	writel(unreg_mcast, ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx));
writel            204 drivers/net/ethernet/ti/cpsw_ethtool.c 	writel(num_interrupts, &cpsw->wr_regs->rx_imax);
writel            205 drivers/net/ethernet/ti/cpsw_ethtool.c 	writel(num_interrupts, &cpsw->wr_regs->tx_imax);
writel            212 drivers/net/ethernet/ti/cpsw_ethtool.c 	writel(int_ctrl, &cpsw->wr_regs->int_control);
writel            213 drivers/net/ethernet/ti/cpsw_sl.c 	writel(val, sl->sl_base + sl->regs[reg]);
writel            176 drivers/net/ethernet/ti/davinci_cpdma.c #define dma_reg_write(ctlr, ofs, v)	writel(v, (ctlr)->dmaregs + (ofs))
writel            177 drivers/net/ethernet/ti/davinci_cpdma.c #define chan_write(chan, fld, v)	writel(v, (chan)->fld)
writel            178 drivers/net/ethernet/ti/davinci_cpdma.c #define desc_write(desc, fld, v)	writel((u32)(v), &(desc)->fld)
writel            561 drivers/net/ethernet/ti/davinci_cpdma.c 		writel(0, ctlr->params.txhdp + 4 * i);
writel            562 drivers/net/ethernet/ti/davinci_cpdma.c 		writel(0, ctlr->params.rxhdp + 4 * i);
writel            563 drivers/net/ethernet/ti/davinci_cpdma.c 		writel(0, ctlr->params.txcp + 4 * i);
writel            564 drivers/net/ethernet/ti/davinci_cpdma.c 		writel(0, ctlr->params.rxcp + 4 * i);
writel            128 drivers/net/ethernet/ti/davinci_mdio.c 	writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
writel            251 drivers/net/ethernet/ti/davinci_mdio.c 		writel(reg, &data->regs->user[0].access);
writel            295 drivers/net/ethernet/ti/davinci_mdio.c 		writel(reg, &data->regs->user[0].access);
writel            462 drivers/net/ethernet/ti/davinci_mdio.c 	writel(ctrl, &data->regs->control);
writel           1883 drivers/net/ethernet/ti/netcp_ethss.c 	writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
writel           2064 drivers/net/ethernet/ti/netcp_ethss.c 	writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi));
writel           2065 drivers/net/ethernet/ti/netcp_ethss.c 	writel(mac_lo(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_lo));
writel           2094 drivers/net/ethernet/ti/netcp_ethss.c 		writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
writel           2107 drivers/net/ethernet/ti/netcp_ethss.c 		writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
writel           2206 drivers/net/ethernet/ti/netcp_ethss.c 	writel(SOFT_RESET, GBE_REG_ADDR(slave, emac_regs, soft_reset));
writel           2234 drivers/net/ethernet/ti/netcp_ethss.c 		writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control));
writel           2242 drivers/net/ethernet/ti/netcp_ethss.c 	writel(max_rx_len, rx_maxlen_reg);
writel           2243 drivers/net/ethernet/ti/netcp_ethss.c 	writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));
writel           2308 drivers/net/ethernet/ti/netcp_ethss.c 		writel(HOST_TX_PRI_MAP_DEFAULT,
writel           2368 drivers/net/ethernet/ti/netcp_ethss.c 		writel(HOST_TX_PRI_MAP_DEFAULT,
writel           2372 drivers/net/ethernet/ti/netcp_ethss.c 	writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs,
writel           2627 drivers/net/ethernet/ti/netcp_ethss.c 		writel(0, GBE_REG_ADDR(slave, port_regs, ts_ctl));
writel           2644 drivers/net/ethernet/ti/netcp_ethss.c 	writel(ts_en,  GBE_REG_ADDR(slave, port_regs, ts_ctl));
writel           2645 drivers/net/ethernet/ti/netcp_ethss.c 	writel(seq_id, GBE_REG_ADDR(slave, port_regs, ts_seq_ltype));
writel           2646 drivers/net/ethernet/ti/netcp_ethss.c 	writel(ctl,    GBE_REG_ADDR(slave, port_regs, ts_ctl_ltype2));
writel           2930 drivers/net/ethernet/ti/netcp_ethss.c 	writel(0, GBE_REG_ADDR(gbe_dev, switch_regs, ptype));
writel           2938 drivers/net/ethernet/ti/netcp_ethss.c 	writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, control));
writel           2941 drivers/net/ethernet/ti/netcp_ethss.c 	writel(gbe_dev->stats_en_mask, GBE_REG_ADDR(gbe_dev, switch_regs,
writel             33 drivers/net/ethernet/ti/netcp_sgmii.c 	writel(val, base + reg);
writel             43 drivers/net/ethernet/ti/netcp_sgmii.c 	writel((readl(base + reg) | val), base + reg);
writel             22 drivers/net/ethernet/ti/netcp_xgbepcsr.c 	writel(((readl(addr) & (~(mask))) | \
writel            185 drivers/net/ethernet/ti/netcp_xgbepcsr.c 	writel(0xe0e9e038, serdes_regs + 0x1fe0 + (4 * lane));
writel            195 drivers/net/ethernet/ti/netcp_xgbepcsr.c 	writel(0x88000000, serdes_regs + 0x1ff4);
writel            201 drivers/net/ethernet/ti/netcp_xgbepcsr.c 	writel(0xee000000, serdes_regs + 0x1ff4);
writel            232 drivers/net/ethernet/ti/netcp_xgbepcsr.c 	writel(0x03, sw_regs + XGBE_CTRL_OFFSET);
writel            568 drivers/net/ethernet/via/via-velocity.c 	writel(vptr->rx.pool_dma, &regs->RDBaseLo);
writel           1045 drivers/net/ethernet/via/via-velocity.c 			writel(CR0_FDXRFCEN, &regs->CR0Set);
writel           1047 drivers/net/ethernet/via/via-velocity.c 			writel(CR0_FDXRFCEN, &regs->CR0Clr);
writel           1050 drivers/net/ethernet/via/via-velocity.c 			writel(CR0_FDXTFCEN, &regs->CR0Set);
writel           1052 drivers/net/ethernet/via/via-velocity.c 			writel(CR0_FDXTFCEN, &regs->CR0Clr);
writel           1056 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXTFCEN, &regs->CR0Set);
writel           1057 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXRFCEN, &regs->CR0Clr);
writel           1061 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXRFCEN, &regs->CR0Set);
writel           1062 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXTFCEN, &regs->CR0Clr);
writel           1066 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXTFCEN, &regs->CR0Set);
writel           1067 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXRFCEN, &regs->CR0Set);
writel           1071 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXRFCEN, &regs->CR0Clr);
writel           1072 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FDXTFCEN, &regs->CR0Clr);
writel           1093 drivers/net/ethernet/via/via-velocity.c 	writel(CR0_SFRST, &regs->CR0Set);
writel           1102 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_FORSRST, &regs->CR0Set);
writel           1127 drivers/net/ethernet/via/via-velocity.c 		writel(0xffffffff, &regs->MARCAM[0]);
writel           1128 drivers/net/ethernet/via/via-velocity.c 		writel(0xffffffff, &regs->MARCAM[4]);
writel           1132 drivers/net/ethernet/via/via-velocity.c 		writel(0xffffffff, &regs->MARCAM[0]);
writel           1133 drivers/net/ethernet/via/via-velocity.c 		writel(0xffffffff, &regs->MARCAM[4]);
writel           1342 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_STOP, &regs->CR0Clr);
writel           1343 drivers/net/ethernet/via/via-velocity.c 		writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
writel           1392 drivers/net/ethernet/via/via-velocity.c 		writel(vptr->rx.pool_dma, &regs->RDBaseLo);
writel           1400 drivers/net/ethernet/via/via-velocity.c 			writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
writel           1406 drivers/net/ethernet/via/via-velocity.c 		writel(CR0_STOP, &regs->CR0Clr);
writel           1407 drivers/net/ethernet/via/via-velocity.c 		writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
writel           2256 drivers/net/ethernet/via/via-velocity.c 	writel(CR0_STOP, &regs->CR0Set);
writel           3038 drivers/net/ethernet/via/via-velocity.c 			writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
writel           3170 drivers/net/ethernet/via/via-velocity.c 		writel(*((u32 *) (context->mac_reg + i)), ptr + i);
writel           3181 drivers/net/ethernet/via/via-velocity.c 		writel(*((u32 *) (context->mac_reg + i)), ptr + i);
writel           3184 drivers/net/ethernet/via/via-velocity.c 		writel(*((u32 *) (context->mac_reg + i)), ptr + i);
writel             37 drivers/net/ethernet/via/via-velocity.h #define DWORD_REG_BITS_ON(x,p)      do { writel(readl((p))|(x),(p));} while (0)
writel             45 drivers/net/ethernet/via/via-velocity.h #define DWORD_REG_BITS_OFF(x,p)     do { writel(readl((p)) & (~(x)),(p));} while (0)
writel             49 drivers/net/ethernet/via/via-velocity.h #define DWORD_REG_BITS_SET(x,m,p)   do { writel( (readl((p)) & (~(m)))|(x),(p));}  while (0)
writel           1149 drivers/net/ethernet/via/via-velocity.h #define mac_write_isr(regs, x)  	writel((x),&((regs)->ISR))
writel           1150 drivers/net/ethernet/via/via-velocity.h #define mac_clear_isr(regs) 		writel(0xffffffffL,&((regs)->ISR))
writel           1152 drivers/net/ethernet/via/via-velocity.h #define mac_write_int_mask(mask, regs) 	writel((mask),&((regs)->IMR));
writel           1153 drivers/net/ethernet/via/via-velocity.h #define mac_disable_int(regs)       	writel(CR0_GINTMSK1,&((regs)->CR0Clr))
writel           1154 drivers/net/ethernet/via/via-velocity.h #define mac_enable_int(regs)    	writel(CR0_GINTMSK1,&((regs)->CR0Set))
writel           1561 drivers/net/ethernet/via/via-velocity.h 	writel((CR0_XONEN | CR0_XHITH1 | CR0_XLTH1 | CR0_XLTH0), &regs->CR0Set);
writel           1562 drivers/net/ethernet/via/via-velocity.h 	writel((CR0_FDXTFCEN | CR0_FDXRFCEN | CR0_HDXFCEN | CR0_XHITH0), &regs->CR0Clr);
writel            365 drivers/net/fddi/defxx.c 	writel(data, bp->base.mem + offset);
writel            122 drivers/net/fjes/fjes_regs.h 	writel((val), &base[(reg)]); \
writel            185 drivers/net/hippi/rrunner.c 	writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
writel            227 drivers/net/hippi/rrunner.c 		writel(HALT_NIC, &rr->regs->HostCtrl);
writel            268 drivers/net/hippi/rrunner.c 	writel(*(u32*)(cmd), &regs->CmdRing[idx]);
writel            296 drivers/net/hippi/rrunner.c 	writel(0x01000000, &regs->TX_state);
writel            297 drivers/net/hippi/rrunner.c 	writel(0xff800000, &regs->RX_state);
writel            298 drivers/net/hippi/rrunner.c 	writel(0, &regs->AssistState);
writel            299 drivers/net/hippi/rrunner.c 	writel(CLEAR_INTA, &regs->LocalCtrl);
writel            300 drivers/net/hippi/rrunner.c 	writel(0x01, &regs->BrkPt);
writel            301 drivers/net/hippi/rrunner.c 	writel(0, &regs->Timer);
writel            302 drivers/net/hippi/rrunner.c 	writel(0, &regs->TimerRef);
writel            303 drivers/net/hippi/rrunner.c 	writel(RESET_DMA, &regs->DmaReadState);
writel            304 drivers/net/hippi/rrunner.c 	writel(RESET_DMA, &regs->DmaWriteState);
writel            305 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaWriteHostHi);
writel            306 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaWriteHostLo);
writel            307 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaReadHostHi);
writel            308 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaReadHostLo);
writel            309 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaReadLen);
writel            310 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaWriteLen);
writel            311 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaWriteLcl);
writel            312 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaWriteIPchecksum);
writel            313 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaReadLcl);
writel            314 drivers/net/hippi/rrunner.c 	writel(0, &regs->DmaReadIPchecksum);
writel            315 drivers/net/hippi/rrunner.c 	writel(0, &regs->PciState);
writel            317 drivers/net/hippi/rrunner.c 	writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
writel            319 drivers/net/hippi/rrunner.c 	writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
writel            321 drivers/net/hippi/rrunner.c 	writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
writel            328 drivers/net/hippi/rrunner.c 	writel(0xdf000, &regs->RxBase);
writel            329 drivers/net/hippi/rrunner.c 	writel(0xdf000, &regs->RxPrd);
writel            330 drivers/net/hippi/rrunner.c 	writel(0xdf000, &regs->RxCon);
writel            331 drivers/net/hippi/rrunner.c 	writel(0xce000, &regs->TxBase);
writel            332 drivers/net/hippi/rrunner.c 	writel(0xce000, &regs->TxPrd);
writel            333 drivers/net/hippi/rrunner.c 	writel(0xce000, &regs->TxCon);
writel            334 drivers/net/hippi/rrunner.c 	writel(0, &regs->RxIndPro);
writel            335 drivers/net/hippi/rrunner.c 	writel(0, &regs->RxIndCon);
writel            336 drivers/net/hippi/rrunner.c 	writel(0, &regs->RxIndRef);
writel            337 drivers/net/hippi/rrunner.c 	writel(0, &regs->TxIndPro);
writel            338 drivers/net/hippi/rrunner.c 	writel(0, &regs->TxIndCon);
writel            339 drivers/net/hippi/rrunner.c 	writel(0, &regs->TxIndRef);
writel            340 drivers/net/hippi/rrunner.c 	writel(0xcc000, &regs->pad10[0]);
writel            341 drivers/net/hippi/rrunner.c 	writel(0, &regs->DrCmndPro);
writel            342 drivers/net/hippi/rrunner.c 	writel(0, &regs->DrCmndCon);
writel            343 drivers/net/hippi/rrunner.c 	writel(0, &regs->DwCmndPro);
writel            344 drivers/net/hippi/rrunner.c 	writel(0, &regs->DwCmndCon);
writel            345 drivers/net/hippi/rrunner.c 	writel(0, &regs->DwCmndRef);
writel            346 drivers/net/hippi/rrunner.c 	writel(0, &regs->DrDataPro);
writel            347 drivers/net/hippi/rrunner.c 	writel(0, &regs->DrDataCon);
writel            348 drivers/net/hippi/rrunner.c 	writel(0, &regs->DrDataRef);
writel            349 drivers/net/hippi/rrunner.c 	writel(0, &regs->DwDataPro);
writel            350 drivers/net/hippi/rrunner.c 	writel(0, &regs->DwDataCon);
writel            351 drivers/net/hippi/rrunner.c 	writel(0, &regs->DwDataRef);
writel            354 drivers/net/hippi/rrunner.c 	writel(0xffffffff, &regs->MbEvent);
writel            355 drivers/net/hippi/rrunner.c 	writel(0, &regs->Event);
writel            357 drivers/net/hippi/rrunner.c 	writel(0, &regs->TxPi);
writel            358 drivers/net/hippi/rrunner.c 	writel(0, &regs->IpRxPi);
writel            360 drivers/net/hippi/rrunner.c 	writel(0, &regs->EvtCon);
writel            361 drivers/net/hippi/rrunner.c 	writel(0, &regs->EvtPrd);
writel            366 drivers/net/hippi/rrunner.c 		writel(0, &regs->CmdRing[i]);
writel            371 drivers/net/hippi/rrunner.c 	writel(RBURST_64|WBURST_64, &regs->PciState);
writel            382 drivers/net/hippi/rrunner.c 	writel(start_pc + 0x800, &regs->Pc);
writel            386 drivers/net/hippi/rrunner.c 	writel(start_pc, &regs->Pc);
writel            405 drivers/net/hippi/rrunner.c 	writel(0, &regs->ExtIo);
writel            407 drivers/net/hippi/rrunner.c 	writel(0, &regs->LocalCtrl);
writel            409 drivers/net/hippi/rrunner.c 	writel(host | HALT_NIC, &regs->HostCtrl);
writel            413 drivers/net/hippi/rrunner.c 		writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
writel            419 drivers/net/hippi/rrunner.c 	writel(host, &regs->HostCtrl);
writel            420 drivers/net/hippi/rrunner.c 	writel(misc, &regs->LocalCtrl);
writel            421 drivers/net/hippi/rrunner.c 	writel(io, &regs->ExtIo);
writel            457 drivers/net/hippi/rrunner.c 	writel(0, &regs->ExtIo);
writel            459 drivers/net/hippi/rrunner.c 	writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
writel            463 drivers/net/hippi/rrunner.c 		writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
writel            471 drivers/net/hippi/rrunner.c 			writel(data, &regs->WinData);
writel            492 drivers/net/hippi/rrunner.c 	writel(misc, &regs->LocalCtrl);
writel            493 drivers/net/hippi/rrunner.c 	writel(io, &regs->ExtIo);
writel            567 drivers/net/hippi/rrunner.c 	writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
writel            593 drivers/net/hippi/rrunner.c 		writel(0, &regs->CmdRing[i]);
writel            620 drivers/net/hippi/rrunner.c 	writel(0x5000, &regs->ConRetry);
writel            621 drivers/net/hippi/rrunner.c 	writel(0x100, &regs->ConRetryTmr);
writel            622 drivers/net/hippi/rrunner.c 	writel(0x500000, &regs->ConTmout);
writel            623 drivers/net/hippi/rrunner.c  	writel(0x60, &regs->IntrTmr);
writel            624 drivers/net/hippi/rrunner.c 	writel(0x500000, &regs->TxDataMvTimeout);
writel            625 drivers/net/hippi/rrunner.c 	writel(0x200000, &regs->RxDataMvTimeout);
writel            626 drivers/net/hippi/rrunner.c  	writel(0x80, &regs->WriteDmaThresh);
writel            627 drivers/net/hippi/rrunner.c  	writel(0x80, &regs->ReadDmaThresh);
writel            633 drivers/net/hippi/rrunner.c 	writel(hostctrl, &regs->HostCtrl);
writel            738 drivers/net/hippi/rrunner.c 			writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
writel            758 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            765 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            789 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            801 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            808 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            815 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            822 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            876 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            883 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel            890 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel           1007 drivers/net/hippi/rrunner.c 			writel(index, &regs->IpRxPi);
writel           1095 drivers/net/hippi/rrunner.c 	writel(eidx, &regs->EvtCon);
writel           1163 drivers/net/hippi/rrunner.c 			writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
writel           1210 drivers/net/hippi/rrunner.c 	writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
writel           1236 drivers/net/hippi/rrunner.c 	writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
writel           1343 drivers/net/hippi/rrunner.c 		writel(tmp, &regs->HostCtrl);
writel           1351 drivers/net/hippi/rrunner.c 	writel(0, &regs->TxPi);
writel           1352 drivers/net/hippi/rrunner.c 	writel(0, &regs->IpRxPi);
writel           1354 drivers/net/hippi/rrunner.c 	writel(0, &regs->EvtCon);
writel           1355 drivers/net/hippi/rrunner.c 	writel(0, &regs->EvtPrd);
writel           1358 drivers/net/hippi/rrunner.c 		writel(0, &regs->CmdRing[i]);
writel           1439 drivers/net/hippi/rrunner.c 	writel(txctrl->pi, &regs->TxPi);
writel           1481 drivers/net/hippi/rrunner.c 	writel(0, &regs->LocalCtrl);
writel           1483 drivers/net/hippi/rrunner.c 	writel(0, &regs->EvtPrd);
writel           1484 drivers/net/hippi/rrunner.c 	writel(0, &regs->RxPrd);
writel           1485 drivers/net/hippi/rrunner.c 	writel(0, &regs->TxPrd);
writel           1493 drivers/net/hippi/rrunner.c 	writel(0, &regs->ExtIo);
writel           1497 drivers/net/hippi/rrunner.c 		writel(i * 4, &regs->WinBase);
writel           1499 drivers/net/hippi/rrunner.c 		writel(0, &regs->WinData);
writel           1502 drivers/net/hippi/rrunner.c 	writel(io, &regs->ExtIo);
writel           1548 drivers/net/hippi/rrunner.c 			writel(sptr, &regs->WinBase);
writel           1550 drivers/net/hippi/rrunner.c 			writel(tmp, &regs->WinData);
writel           1558 drivers/net/hippi/rrunner.c 	writel(localctrl, &regs->LocalCtrl);
writel            517 drivers/net/hippi/rrunner.h 	writel(baddr & 0xffffffff, &regs->RxRingHi);
writel            518 drivers/net/hippi/rrunner.h 	writel(baddr >> 32, &regs->RxRingLo);
writel            520 drivers/net/hippi/rrunner.h 	writel(baddr >> 32, &regs->RxRingHi);
writel            521 drivers/net/hippi/rrunner.h 	writel(baddr & 0xffffffff, &regs->RxRingLo);
writel            523 drivers/net/hippi/rrunner.h 	writel(0, &regs->RxRingHi);
writel            524 drivers/net/hippi/rrunner.h 	writel(baddr, &regs->RxRingLo);
writel            534 drivers/net/hippi/rrunner.h 	writel(baddr & 0xffffffff, &regs->InfoPtrHi);
writel            535 drivers/net/hippi/rrunner.h 	writel(baddr >> 32, &regs->InfoPtrLo);
writel            537 drivers/net/hippi/rrunner.h 	writel(baddr >> 32, &regs->InfoPtrHi);
writel            538 drivers/net/hippi/rrunner.h 	writel(baddr & 0xffffffff, &regs->InfoPtrLo);
writel            540 drivers/net/hippi/rrunner.h 	writel(0, &regs->InfoPtrHi);
writel            541 drivers/net/hippi/rrunner.h 	writel(baddr, &regs->InfoPtrLo);
writel             63 drivers/net/phy/mdio-bcm-iproc.c 	writel(val, base + MII_CTRL_OFFSET);
writel             83 drivers/net/phy/mdio-bcm-iproc.c 	writel(cmd, priv->base + MII_DATA_OFFSET);
writel            113 drivers/net/phy/mdio-bcm-iproc.c 	writel(cmd, priv->base + MII_DATA_OFFSET);
writel             45 drivers/net/phy/mdio-hisi-femac.c 	writel((mii_id << BIT_PHY_ADDR_OFFSET) | regnum,
writel             65 drivers/net/phy/mdio-hisi-femac.c 	writel(MDIO_WRITE | (value << BIT_WR_DATA_OFFSET) |
writel             45 drivers/net/phy/mdio-moxart.c 	writel(ctrl, data->base + REG_PHY_CTRL);
writel             76 drivers/net/phy/mdio-moxart.c 	writel(value, data->base + REG_PHY_WRITE_DATA);
writel             77 drivers/net/phy/mdio-moxart.c 	writel(ctrl, data->base + REG_PHY_CTRL);
writel             64 drivers/net/phy/mdio-mscc-miim.c 	writel(MSCC_MIIM_CMD_VLD | (mii_id << MSCC_MIIM_CMD_PHYAD_SHIFT) |
writel             93 drivers/net/phy/mdio-mscc-miim.c 	writel(MSCC_MIIM_CMD_VLD | (mii_id << MSCC_MIIM_CMD_PHYAD_SHIFT) |
writel            108 drivers/net/phy/mdio-mscc-miim.c 		writel(0, miim->phy_regs + MSCC_PHY_REG_PHY_CFG);
writel            109 drivers/net/phy/mdio-mscc-miim.c 		writel(0x1ff, miim->phy_regs + MSCC_PHY_REG_PHY_CFG);
writel             64 drivers/net/phy/mdio-mux-bcm-iproc.c 	writel(val, md->base + MDIO_SCAN_CTRL_OFFSET);
writel             74 drivers/net/phy/mdio-mux-bcm-iproc.c 		writel(val, md->base + MDIO_RATE_ADJ_EXT_OFFSET);
writel             75 drivers/net/phy/mdio-mux-bcm-iproc.c 		writel(val, md->base + MDIO_RATE_ADJ_INT_OFFSET);
writel            113 drivers/net/phy/mdio-mux-bcm-iproc.c 	writel(0, base + MDIO_CTRL_OFFSET);
writel            124 drivers/net/phy/mdio-mux-bcm-iproc.c 	writel(param, base + MDIO_PARAM_OFFSET);
writel            126 drivers/net/phy/mdio-mux-bcm-iproc.c 	writel(reg, base + MDIO_ADDR_OFFSET);
writel            128 drivers/net/phy/mdio-mux-bcm-iproc.c 	writel(op, base + MDIO_CTRL_OFFSET);
writel            180 drivers/net/phy/mdio-mux-bcm-iproc.c 	writel(param, md->base + MDIO_PARAM_OFFSET);
writel             90 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(val, pll->base + ETH_PLL_CTL0);
writel             94 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(val, pll->base + ETH_PLL_CTL0);
writel            113 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(val, pll->base + ETH_PLL_CTL0);
writel            131 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0x29c0040a, pll->base + ETH_PLL_CTL0);
writel            132 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0x927e0000, pll->base + ETH_PLL_CTL1);
writel            133 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0xac5f49e5, pll->base + ETH_PLL_CTL2);
writel            134 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0x00000000, pll->base + ETH_PLL_CTL3);
writel            135 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0x00000000, pll->base + ETH_PLL_CTL4);
writel            136 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0x20200000, pll->base + ETH_PLL_CTL5);
writel            137 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0x0000c002, pll->base + ETH_PLL_CTL6);
writel            138 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(0x00000023, pll->base + ETH_PLL_CTL7);
writel            163 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(EPHY_G12A_ID, priv->regs + ETH_PHY_CNTL0);
writel            164 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(FIELD_PREP(PHY_CNTL1_ST_MODE, 3) |
writel            171 drivers/net/phy/mdio-mux-meson-g12a.c 	writel(PHY_CNTL2_USE_INTERNAL |
writel             43 drivers/net/phy/mdio-sun4i.c 	writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG);
writel             45 drivers/net/phy/mdio-sun4i.c 	writel(0x1, data->membase + EMAC_MAC_MCMD_REG);
writel             56 drivers/net/phy/mdio-sun4i.c 	writel(0x0, data->membase + EMAC_MAC_MCMD_REG);
writel             70 drivers/net/phy/mdio-sun4i.c 	writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG);
writel             72 drivers/net/phy/mdio-sun4i.c 	writel(0x1, data->membase + EMAC_MAC_MCMD_REG);
writel             83 drivers/net/phy/mdio-sun4i.c 	writel(0x0, data->membase + EMAC_MAC_MCMD_REG);
writel             85 drivers/net/phy/mdio-sun4i.c 	writel(value, data->membase + EMAC_MAC_MWTD_REG);
writel            395 drivers/net/vmxnet3/vmxnet3_int.h 	writel((val), (adapter)->hw_addr0 + (reg))
writel            400 drivers/net/vmxnet3/vmxnet3_int.h 	writel((val), (adapter)->hw_addr1 + (reg))
writel            500 drivers/net/wan/farsync.c #define FST_WRL(C,E,L)  writel ((L), (C)->mem + WIN_OFFSET(E))
writel            171 drivers/net/wan/hd64570.c 			writel(buff_off, &desc->bp);
writel            687 drivers/net/wan/hd64570.c 		writel(i ^ 0x12345678, rambase + i % size);
writel             53 drivers/net/wan/hd64572.c #define sca_outl(value, reg, card)   writel(value, card->scabase + (reg))
writel            144 drivers/net/wan/hd64572.c 			writel(chain_off, &desc->cp);
writel            145 drivers/net/wan/hd64572.c 			writel(buff_off, &desc->bp);
writel            611 drivers/net/wan/hd64572.c 		writel(i ^ 0x12345678, rambase + i);
writel            157 drivers/net/wan/pc300too.c 			writel(card->init_ctrl_value |
writel            160 drivers/net/wan/pc300too.c 			writel(card->init_ctrl_value &
writel            377 drivers/net/wan/pc300too.c 	writel(card->init_ctrl_value | 0x40000000, p);
writel            381 drivers/net/wan/pc300too.c 	writel(card->init_ctrl_value, p);
writel            386 drivers/net/wan/pc300too.c 	writel(card->init_ctrl_value | 0x20000000, p);
writel            390 drivers/net/wan/pc300too.c 	writel(card->init_ctrl_value, p);
writel            402 drivers/net/wan/pc300too.c 	writel(card->init_ctrl_value, &card->plxbase->init_ctrl);
writel            336 drivers/net/wan/pci200syn.c 	writel(readl(p) | 0x40000000, p);
writel            340 drivers/net/wan/pci200syn.c 	writel(readl(p) & ~0x40000000, p);
writel            253 drivers/net/wan/wanxl.c 		writel(stat, card->plx + PLX_DOORBELL_FROM_CARD);
writel            298 drivers/net/wan/wanxl.c 	writel(1 << (DOORBELL_TO_CARD_TX_0 + port->node),
writel            409 drivers/net/wan/wanxl.c 	writel(1 << (DOORBELL_TO_CARD_OPEN_0 + port->node), dbr);
writel            421 drivers/net/wan/wanxl.c 	writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node), dbr);
writel            435 drivers/net/wan/wanxl.c 	writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node),
writel            482 drivers/net/wan/wanxl.c 	writel(cmd, card->plx + PLX_MAILBOX_1);
writel            499 drivers/net/wan/wanxl.c 	writel(0x80, card->plx + PLX_MAILBOX_0);
writel            500 drivers/net/wan/wanxl.c 	writel(old_value | PLX_CTL_RESET, card->plx + PLX_CONTROL);
writel            503 drivers/net/wan/wanxl.c 	writel(old_value, card->plx + PLX_CONTROL);
writel            715 drivers/net/wan/wanxl.c 		writel(ntohl(*(__be32*)(firmware + i)), mem + PDM_OFFSET + i);
writel            718 drivers/net/wan/wanxl.c 		writel(card->status_address +
writel            721 drivers/net/wan/wanxl.c 	writel(card->status_address, mem + PDM_OFFSET + 20);
writel            722 drivers/net/wan/wanxl.c 	writel(PDM_OFFSET, mem);
writel            725 drivers/net/wan/wanxl.c 	writel(0, card->plx + PLX_MAILBOX_5);
writel             36 drivers/net/wireless/ath/wcn36xx/dxe.c 	writel(data, wcn->ccu_base + addr);
writel             45 drivers/net/wireless/ath/wcn36xx/dxe.c 	writel(data, wcn->dxe_base + addr);
writel            398 drivers/net/wireless/ath/wil6210/fw_inc.c 		writel(y, dst);
writel            411 drivers/net/wireless/ath/wil6210/fw_inc.c 	writel(a, gwa_addr);
writel            412 drivers/net/wireless/ath/wil6210/fw_inc.c 	writel(gw_cmd, gwa_cmd);
writel            415 drivers/net/wireless/ath/wil6210/fw_inc.c 	writel(WIL_FW_GW_CTL_RUN, gwa_ctl); /* activate gw */
writel            482 drivers/net/wireless/ath/wil6210/fw_inc.c 		writel(v, gwa_val);
writel            556 drivers/net/wireless/ath/wil6210/fw_inc.c 			writel(v[k], gwa_val[k]);
writel             73 drivers/net/wireless/ath/wil6210/interrupt.c 	writel(x, addr);
writel            852 drivers/net/wireless/ath/wil6210/interrupt.c 	writel(x, addr);
writel           1141 drivers/net/wireless/ath/wil6210/wil6210.h 	writel(val, wil->csr + HOSTADDR(reg));
writel            357 drivers/net/wireless/intel/ipw2x00/ipw2200.c 	writel(val, ipw->hw_base + ofs);
writel           1993 drivers/net/wireless/intel/iwlegacy/common.h 	writel(val, il->hw_base + ofs);
writel           1895 drivers/net/wireless/intel/iwlwifi/pcie/trans.c 	writel(val, IWL_TRANS_GET_PCIE_TRANS(trans)->hw_base + ofs);
writel             65 drivers/net/wireless/intersil/prism54/isl_38xx.h 	writel(val, base + offset);
writel             59 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel             65 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel             71 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel            157 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel            164 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel            427 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel            432 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel            438 drivers/net/wireless/intersil/prism54/islpci_dev.c 	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
writel           4655 drivers/net/wireless/marvell/mwl8k.c 		writel(~MWL8K_A2H_INT_TX_DONE,
writel           4673 drivers/net/wireless/marvell/mwl8k.c 		writel(~MWL8K_A2H_INT_RX_READY,
writel             39 drivers/net/wireless/mediatek/mt76/dma.c 	writel(q->desc_dma, &q->regs->desc_base);
writel             40 drivers/net/wireless/mediatek/mt76/dma.c 	writel(0, &q->regs->cpu_idx);
writel             41 drivers/net/wireless/mediatek/mt76/dma.c 	writel(0, &q->regs->dma_idx);
writel             42 drivers/net/wireless/mediatek/mt76/dma.c 	writel(q->ndesc, &q->regs->ring_size);
writel            131 drivers/net/wireless/mediatek/mt76/dma.c 	writel(q->desc_dma, &q->regs->desc_base);
writel            132 drivers/net/wireless/mediatek/mt76/dma.c 	writel(q->ndesc, &q->regs->ring_size);
writel            135 drivers/net/wireless/mediatek/mt76/dma.c 	writel(q->head, &q->regs->cpu_idx);
writel            253 drivers/net/wireless/mediatek/mt76/dma.c 	writel(q->head, &q->regs->cpu_idx);
writel             22 drivers/net/wireless/mediatek/mt76/mmio.c 	writel(val, dev->mmio.regs + offset);
writel             84 drivers/net/wireless/quantenna/qtnfmac/pcie/pcie_priv.h 	writel(val, basereg);
writel            113 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(ps->pcie_irq_mask, PCIE_HDP_INT_EN(ps->pcie_reg_base));
writel            122 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(0x0, PCIE_HDP_INT_EN(ps->pcie_reg_base));
writel            132 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(ps->pcie_irq_mask, PCIE_HDP_INT_EN(ps->pcie_reg_base));
writel            142 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(ps->pcie_irq_mask, PCIE_HDP_INT_EN(ps->pcie_reg_base));
writel            152 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(ps->pcie_irq_mask, PCIE_HDP_INT_EN(ps->pcie_reg_base));
writel            162 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(ps->pcie_irq_mask, PCIE_HDP_INT_EN(ps->pcie_reg_base));
writel            270 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(QTN_HOST_HI32(paddr),
writel            273 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(QTN_HOST_LO32(paddr),
writel            275 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(priv->rx_bd_num | (sizeof(struct qtnf_pearl_rx_bd)) << 16,
writel            317 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(QTN_HOST_HI32(paddr),
writel            320 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(QTN_HOST_LO32(paddr),
writel            323 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(index, PCIE_HDP_TX_HOST_Q_WR_PTR(ps->pcie_reg_base));
writel            389 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(val, PCIE_HHBM_CONFIG(ps->pcie_reg_base));
writel            395 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(val, PCIE_HHBM_CONFIG(ps->pcie_reg_base));
writel            396 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(ps->base.rx_bd_num, PCIE_HHBM_Q_LIMIT_REG(ps->pcie_reg_base));
writel            583 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(QTN_HOST_HI32(txbd_paddr),
writel            586 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(QTN_HOST_LO32(txbd_paddr),
writel           1082 drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c 	writel(ps->base.msi_enabled, &ps->bda->bda_rc_msi_enabled);
writel            122 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_RST_EP_IRQ),
writel            153 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_CTRL_IRQ),
writel            397 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 		writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_TX_DONE_IRQ),
writel            443 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(0x0, ts->txqueue_wake);
writel            449 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_TX_STOP_IRQ),
writel            466 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 		writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_TX_STOP_IRQ),
writel            530 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(QTN_HOST_LO32(skb_paddr), &bda->request[i].addr);
writel            531 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(len | QTN_PCIE_TX_VALID_PKT, &bda->request[i].info);
writel            537 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_TX_DONE_IRQ),
writel            677 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 			writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_RX_DONE_IRQ),
writel            804 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(0x0, &bda->bda_dma_offset);
writel            814 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(QTN_PCI_ENDIAN_DETECT_DATA, &bda->bda_pci_endian);
writel            819 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(QTN_PCI_ENDIAN_VALID_STATUS, &bda->bda_pci_pre_status);
writel            839 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(0, &bda->bda_pci_pre_status);
writel            840 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(0, &bda->bda_pci_post_status);
writel            841 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(0, &bda->bda_pci_endian);
writel            870 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(flags, &bda->bda_flags);
writel           1183 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel((u32 __force)PCI_D3hot, ts->ep_pmstate);
writel           1185 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_PM_EP_IRQ),
writel           1204 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel((u32 __force)PCI_D0, ts->ep_pmstate);
writel           1206 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c 	writel(TOPAZ_IPC_IRQ_WORD(TOPAZ_RC_PM_EP_IRQ),
writel             40 drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c 	writel(QTNF_SHM_IPC_ACK, &shm_reg_hdr->flags);
writel            146 drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c 	writel(QTNF_SHM_IPC_NEW_DATA, &shm_reg_hdr->flags);
writel             38 drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h 	writel(value, rt2x00dev->csr.base + offset);
writel            297 drivers/net/wireless/realtek/rtlwifi/pci.h 	writel(val, (u8 __iomem *)rtlpriv->io.pci_mem_start + addr);
writel             83 drivers/net/wireless/realtek/rtw88/pci.c 	writel(val, rtwpci->mmap + addr);
writel            186 drivers/ntb/hw/amd/ntb_hw_amd.c 		writel(limit, peer_mmio + limit_reg);
writel            189 drivers/ntb/hw/amd/ntb_hw_amd.c 			writel(base_addr, mmio + limit_reg);
writel            190 drivers/ntb/hw/amd/ntb_hw_amd.c 			writel(0, peer_mmio + xlat_reg);
writel            260 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET);
writel            268 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);
writel            281 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET);
writel            289 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);
writel            430 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(val, mmio + AMD_SPAD_OFFSET + offset);
writel            459 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(val, mmio + AMD_SPAD_OFFSET + offset);
writel            495 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(reg, mmio + AMD_SMUACK_OFFSET);
writel            693 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(ndev->db_mask, mmio + AMD_DBMASK_OFFSET);
writel            891 drivers/ntb/hw/amd/ntb_hw_amd.c 		writel(reg, mmio + AMD_SIDEINFO_OFFSET);
writel            903 drivers/ntb/hw/amd/ntb_hw_amd.c 		writel(reg, mmio + AMD_SIDEINFO_OFFSET);
writel            941 drivers/ntb/hw/amd/ntb_hw_amd.c 	writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET);
writel             87 drivers/ntb/hw/amd/ntb_hw_amd.h 	writel(val, mmio);
writel             88 drivers/ntb/hw/amd/ntb_hw_amd.h 	writel(val >> 32, mmio + sizeof(u32));
writel            466 drivers/nvme/host/pci.c 		writel(nvmeq->sq_tail, nvmeq->q_db);
writel            937 drivers/nvme/host/pci.c 		writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
writel           1695 drivers/nvme/host/pci.c 		writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS);
writel           1709 drivers/nvme/host/pci.c 	writel(aqa, dev->bar + NVME_REG_AQA);
writel           2684 drivers/nvme/host/pci.c 	writel(val, to_nvme_dev(ctrl)->bar + off);
writel             90 drivers/nvmem/bcm-ocotp.c 	writel(command & OTPC_CMD_MASK, base + OTPC_COMMAND_OFFSET);
writel             95 drivers/nvmem/bcm-ocotp.c 	writel(addr & OTPC_ADDR_MASK, base + OTPC_CPUADDR_REG_OFFSET);
writel            100 drivers/nvmem/bcm-ocotp.c 	writel(1 << OTPC_CMD_START_START, base + OTPC_CMD_START_OFFSET);
writel            105 drivers/nvmem/bcm-ocotp.c 	writel(0, base + OTPC_CMD_START_OFFSET);
writel            110 drivers/nvmem/bcm-ocotp.c 	writel(value, base + OTPC_CPU_WRITE_REG_OFFSET);
writel            213 drivers/nvmem/bcm-ocotp.c 			writel(*buf, priv->base + priv->map->data_w_offset[i]);
writel            280 drivers/nvmem/bcm-ocotp.c 	writel(readl(priv->base + OTPC_MODE_REG_OFFSET) |
writel            116 drivers/nvmem/imx-ocotp.c 	writel(IMX_OCOTP_BM_CTRL_ERROR, base + IMX_OCOTP_ADDR_CTRL_CLR);
writel            219 drivers/nvmem/imx-ocotp.c 	writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING);
writel            240 drivers/nvmem/imx-ocotp.c 	writel(timing, priv->base + IMX_OCOTP_ADDR_TIMING);
writel            313 drivers/nvmem/imx-ocotp.c 	writel(ctrl, priv->base + IMX_OCOTP_ADDR_CTRL);
writel            341 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA1);
writel            342 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA2);
writel            343 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA3);
writel            344 drivers/nvmem/imx-ocotp.c 			writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA0);
writel            347 drivers/nvmem/imx-ocotp.c 			writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA1);
writel            348 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA2);
writel            349 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA3);
writel            350 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA0);
writel            353 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA1);
writel            354 drivers/nvmem/imx-ocotp.c 			writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA2);
writel            355 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA3);
writel            356 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA0);
writel            359 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA1);
writel            360 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA2);
writel            361 drivers/nvmem/imx-ocotp.c 			writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA3);
writel            362 drivers/nvmem/imx-ocotp.c 			writel(0, priv->base + IMX_OCOTP_ADDR_DATA0);
writel            367 drivers/nvmem/imx-ocotp.c 		writel(*buf, priv->base + IMX_OCOTP_ADDR_DATA0);
writel            397 drivers/nvmem/imx-ocotp.c 	writel(IMX_OCOTP_BM_CTRL_REL_SHADOWS,
writel             57 drivers/nvmem/lpc18xx_eeprom.c 	writel(val, eeprom->reg_base + reg);
writel            113 drivers/nvmem/lpc18xx_eeprom.c 		writel(*(u32 *)val, eeprom->mem_base + offset);
writel             60 drivers/nvmem/meson-mx-efuse.c 	writel(data, efuse->base + reg);
writel             39 drivers/nvmem/mtk-efuse.c 		writel(*val++, priv->base + reg + (i++ * 4));
writel             69 drivers/nvmem/mxs-ocotp.c 	writel(BM_OCOTP_CTRL_ERROR, otp->base + STMP_OFFSET_REG_CLR);
writel             76 drivers/nvmem/mxs-ocotp.c 	writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_SET);
writel             99 drivers/nvmem/mxs-ocotp.c 	writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_CLR);
writel             68 drivers/nvmem/rockchip-efuse.c 	writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
writel             71 drivers/nvmem/rockchip-efuse.c 		writel(readl(efuse->base + REG_EFUSE_CTRL) &
writel             74 drivers/nvmem/rockchip-efuse.c 		writel(readl(efuse->base + REG_EFUSE_CTRL) |
writel             78 drivers/nvmem/rockchip-efuse.c 		writel(readl(efuse->base + REG_EFUSE_CTRL) |
writel             82 drivers/nvmem/rockchip-efuse.c 		writel(readl(efuse->base + REG_EFUSE_CTRL) &
writel             88 drivers/nvmem/rockchip-efuse.c 	writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
writel            125 drivers/nvmem/rockchip-efuse.c 		writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
writel            135 drivers/nvmem/rockchip-efuse.c 		writel(RK3328_INT_FINISH, efuse->base + RK3328_INT_STATUS);
writel            177 drivers/nvmem/rockchip-efuse.c 	writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
writel            181 drivers/nvmem/rockchip-efuse.c 		writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
writel            186 drivers/nvmem/rockchip-efuse.c 		writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
writel            195 drivers/nvmem/rockchip-efuse.c 	writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
writel             61 drivers/nvmem/sunxi_sid.c 	writel(reg_val, sid->base + SUN8I_SID_PRCTL);
writel             71 drivers/nvmem/sunxi_sid.c 	writel(0, sid->base + SUN8I_SID_PRCTL);
writel            105 drivers/nvmem/vf610-ocotp.c 		writel(OCOTP_CTRL_ERR, base + OCOTP_CTRL_CLR);
writel            158 drivers/nvmem/vf610-ocotp.c 			writel(ocotp->timing, base + OCOTP_TIMING);
writel            167 drivers/nvmem/vf610-ocotp.c 			writel(reg, base + OCOTP_CTRL_REG);
writel            169 drivers/nvmem/vf610-ocotp.c 			writel(OCOTP_READ_CTRL_READ_FUSE,
writel            178 drivers/nvmem/vf610-ocotp.c 				writel(OCOTP_CTRL_ERR, base + OCOTP_CTRL_CLR);
writel            241 drivers/parisc/dino.c 		writel(val, base_addr + DINO_CONFIG_DATA);
writel            175 drivers/parisc/iosapic.c 	writel(reg, iosapic + IOSAPIC_REG_SELECT);
writel            181 drivers/parisc/iosapic.c 	writel(reg, iosapic + IOSAPIC_REG_SELECT);
writel            182 drivers/parisc/iosapic.c 	writel(val, iosapic + IOSAPIC_REG_WINDOW);
writel            141 drivers/parisc/lba_pci.c #define WRITE_REG32(value, addr) writel(value, addr)
writel            130 drivers/parisc/sba_iommu.c #define WRITE_REG32(val, addr)	writel((val), (addr))
writel            113 drivers/pci/access.c 		writel(val, addr);
writel            150 drivers/pci/access.c 		writel(val, addr);
writel            170 drivers/pci/access.c 	writel(tmp, addr);
writel            114 drivers/pci/controller/dwc/pci-dra7xx.c 	writel(value, pcie->base + offset);
writel            166 drivers/pci/controller/dwc/pci-exynos.c 	writel(val, base + reg);
writel            560 drivers/pci/controller/dwc/pci-imx6.c 			writel(PCIE_PHY_CMN_REG4_DCC_FB_EN,
writel            563 drivers/pci/controller/dwc/pci-imx6.c 			writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL
writel            567 drivers/pci/controller/dwc/pci-imx6.c 			writel(PCIE_PHY_CMN_REG26_ATT_MODE,
writel            147 drivers/pci/controller/dwc/pci-keystone.c 	writel(val, ks_pcie->va_app_base + offset);
writel            193 drivers/pci/controller/dwc/pci-meson.c 	writel(MESON_PCIE_PHY_POWERUP, mp->mem_res.phy_base);
writel            270 drivers/pci/controller/dwc/pci-meson.c 	writel(val, mp->mem_res.elbi_base + reg);
writel            285 drivers/pci/controller/dwc/pci-meson.c 	writel(val, mp->mem_res.cfg_base + reg);
writel            401 drivers/pci/controller/dwc/pcie-designware-ep.c 	writel(msg_data | (interrupt_num - 1), ep->msi_mem + aligned_offset);
writel            460 drivers/pci/controller/dwc/pcie-designware-ep.c 	writel(msg_data, ep->msi_mem);
writel            125 drivers/pci/controller/dwc/pcie-designware.c 		writel(val, addr);
writel             74 drivers/pci/controller/dwc/pcie-histb.c 	writel(val, histb_pcie->ctrl + reg);
writel             99 drivers/pci/controller/dwc/pcie-kirin.c 	writel(val, kirin_pcie->apb_base + reg);
writel            111 drivers/pci/controller/dwc/pcie-kirin.c 	writel(val, kirin_pcie->phy_base + reg);
writel            208 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL);
writel            320 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
writel            325 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
writel            356 drivers/pci/controller/dwc/pcie-qcom.c 	writel(CFG_REMOTE_RD_REQ_BRIDGE_SIZE_2K,
writel            358 drivers/pci/controller/dwc/pcie-qcom.c 	writel(CFG_BRIDGE_SB_INIT,
writel            461 drivers/pci/controller/dwc/pcie-qcom.c 	writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
writel            467 drivers/pci/controller/dwc/pcie-qcom.c 		writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT);
writel            492 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_LTSSM);
writel            589 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
writel            592 drivers/pci/controller/dwc/pcie-qcom.c 	writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
writel            597 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL);
writel            601 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
writel            605 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
writel            870 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
writel            873 drivers/pci/controller/dwc/pcie-qcom.c 	writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
writel            878 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL);
writel            882 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
writel            886 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
writel           1024 drivers/pci/controller/dwc/pcie-qcom.c 	writel(SLV_ADDR_SPACE_SZ,
writel           1029 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
writel           1031 drivers/pci/controller/dwc/pcie-qcom.c 	writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
writel           1033 drivers/pci/controller/dwc/pcie-qcom.c 	writel(MST_WAKEUP_EN | SLV_WAKEUP_EN | MSTR_ACLK_CGC_DIS
writel           1037 drivers/pci/controller/dwc/pcie-qcom.c 	writel(0, pcie->parf + PCIE20_PARF_Q2A_FLUSH);
writel           1039 drivers/pci/controller/dwc/pcie-qcom.c 	writel(CMD_BME_VAL, pci->dbi_base + PCIE20_COMMAND_STATUS);
writel           1040 drivers/pci/controller/dwc/pcie-qcom.c 	writel(DBI_RO_WR_EN, pci->dbi_base + PCIE20_MISC_CONTROL_1_REG);
writel           1041 drivers/pci/controller/dwc/pcie-qcom.c 	writel(PCIE_CAP_LINK1_VAL, pci->dbi_base + PCIE20_CAP_LINK_1);
writel           1045 drivers/pci/controller/dwc/pcie-qcom.c 	writel(val, pci->dbi_base + PCIE20_CAP_LINK_CAPABILITIES);
writel           1047 drivers/pci/controller/dwc/pcie-qcom.c 	writel(PCIE_CAP_CPL_TIMEOUT_DISABLE, pci->dbi_base +
writel            124 drivers/pci/controller/dwc/pcie-spear13xx.c 	writel(DEVICE_TYPE_RC | (1 << MISCTRL_EN_ID)
writel            147 drivers/pci/controller/dwc/pcie-spear13xx.c 	writel(status, &app_reg->int_clr);
writel            161 drivers/pci/controller/dwc/pcie-spear13xx.c 		writel(readl(&app_reg->int_mask) |
writel             81 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_APP_READY_CTRL);
writel             91 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_APP_PM0);
writel             99 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_PINCTRL0);
writel            108 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_PINCTRL0);
writel            160 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(PCL_RCV_INT_ALL_ENABLE, priv->base + PCL_RCV_INT);
writel            161 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(PCL_RCV_INTX_ALL_ENABLE, priv->base + PCL_RCV_INTX);
writel            166 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(0, priv->base + PCL_RCV_INT);
writel            167 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(0, priv->base + PCL_RCV_INTX);
writel            180 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_RCV_INTX);
writel            193 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_RCV_INTX);
writel            206 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_RCV_INTX);
writel            251 drivers/pci/controller/dwc/pcie-uniphier.c 	writel(val, priv->base + PCL_RCV_INT);
writel            208 drivers/pci/controller/pci-aardvark.c 	writel(val, pcie->base + reg);
writel            193 drivers/pci/controller/pci-ftpci100.c 	writel(PCI_CONF_BUS(bus_number) |
writel            228 drivers/pci/controller/pci-ftpci100.c 	writel(PCI_CONF_BUS(bus_number) |
writel            237 drivers/pci/controller/pci-ftpci100.c 		writel(value, p->base + PCI_DATA);
writel            501 drivers/pci/controller/pci-ftpci100.c 				writel(val, p->base + PCI_IOSIZE);
writel            529 drivers/pci/controller/pci-ftpci100.c 	writel(val, p->base + PCI_CTRL);
writel            696 drivers/pci/controller/pci-hyperv.c 		writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
writel            733 drivers/pci/controller/pci-hyperv.c 	writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
writel            767 drivers/pci/controller/pci-hyperv.c 		writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
writel            779 drivers/pci/controller/pci-hyperv.c 			writel(val, addr);
writel            112 drivers/pci/controller/pci-mvebu.c 	writel(val, port->base + reg);
writel            269 drivers/pci/controller/pci-mvebu.c 		writel(val, conf_data);
writel            415 drivers/pci/controller/pci-tegra.c 	writel(value, pcie->afi + offset);
writel            426 drivers/pci/controller/pci-tegra.c 	writel(value, pcie->pads + offset);
writel            577 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_VEND_CTL1);
writel            583 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_VEND_XP);
writel            591 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_VEND_XP_BIST);
writel            604 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_PRIV_MISC);
writel            615 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_2_R1);
writel            621 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_4_R1);
writel            626 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_5_R1);
writel            631 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_6_R1);
writel            636 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_2_R2);
writel            642 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_4_R2);
writel            647 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_5_R2);
writel            652 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_ECTL_6_R2);
writel            669 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_VEND_CTL0);
writel            677 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_RX_HDR_LIMIT);
writel            681 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_PRIV_XP_DL);
writel            686 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_VEND_XP);
writel            693 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_VEND_XP);
writel            705 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_LINK_CONTROL_STATUS_2);
writel            730 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_VEND_CTL2);
writel           2359 drivers/pci/controller/pci-tegra.c 	writel(value, port->base + RP_PRIV_MISC);
writel           2413 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_LINK_CONTROL_STATUS_2);
writel           2436 drivers/pci/controller/pci-tegra.c 		writel(value, port->base + RP_LINK_CONTROL_STATUS);
writel             64 drivers/pci/controller/pci-thunder-ecam.c 		writel(0xffffffff, addr + 0);
writel             66 drivers/pci/controller/pci-thunder-ecam.c 		writel(barl_orig, addr + 0);
writel            370 drivers/pci/controller/pci-v3-semi.c 	writel(v3_addr_to_lb_base(v3->non_pre_mem) |
writel            378 drivers/pci/controller/pci-v3-semi.c 	writel(v3_addr_to_lb_base(v3->config_mem) |
writel            391 drivers/pci/controller/pci-v3-semi.c 	writel(v3_addr_to_lb_base(v3->pre_mem) |
writel            402 drivers/pci/controller/pci-v3-semi.c 	writel(v3_addr_to_lb_base(v3->non_pre_mem) |
writel            507 drivers/pci/controller/pci-v3-semi.c 		writel(0x6200, v3->base + V3_LB_IO_BASE);
writel            548 drivers/pci/controller/pci-v3-semi.c 		writel(v3_addr_to_lb_base2(v3->io_mem) |
writel            573 drivers/pci/controller/pci-v3-semi.c 			writel(v3_addr_to_lb_base(v3->pre_mem) |
writel            593 drivers/pci/controller/pci-v3-semi.c 			writel(v3_addr_to_lb_base(v3->non_pre_mem) |
writel            717 drivers/pci/controller/pci-v3-semi.c 			writel(pci_base, v3->base + V3_PCI_BASE0);
writel            718 drivers/pci/controller/pci-v3-semi.c 			writel(pci_map, v3->base + V3_PCI_MAP0);
writel            720 drivers/pci/controller/pci-v3-semi.c 			writel(pci_base, v3->base + V3_PCI_BASE1);
writel            721 drivers/pci/controller/pci-v3-semi.c 			writel(pci_map, v3->base + V3_PCI_MAP1);
writel            871 drivers/pci/controller/pci-v3-semi.c 	writel(0x00000000, v3->base + V3_PCI_IO_BASE);
writel             95 drivers/pci/controller/pci-versatile.c 			writel(res->start >> 28, PCI_IMAP(mem));
writel             96 drivers/pci/controller/pci-versatile.c 			writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
writel            170 drivers/pci/controller/pci-versatile.c 	writel(myslot, PCI_SELFID);
writel            175 drivers/pci/controller/pci-versatile.c 	writel(val, local_pci_cfg_base + PCI_COMMAND);
writel            180 drivers/pci/controller/pci-versatile.c 	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
writel            181 drivers/pci/controller/pci-versatile.c 	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
writel            182 drivers/pci/controller/pci-versatile.c 	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
writel            195 drivers/pci/controller/pci-versatile.c 	writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
writel             82 drivers/pci/controller/pci-xgene.c 	writel(val, port->csr_base + reg);
writel            516 drivers/pci/controller/pci-xgene.c 		writel(bar_low, bar_addr);
writel            517 drivers/pci/controller/pci-xgene.c 		writel(upper_32_bits(cpu_addr), bar_addr + 0x4);
writel            417 drivers/pci/controller/pcie-altera.c 		writel(value, addr);
writel            294 drivers/pci/controller/pcie-cadence-ep.c 	writel(0, ep->irq_cpu_addr + offset);
writel            358 drivers/pci/controller/pcie-cadence-ep.c 	writel(data, ep->irq_cpu_addr + (pci_addr & pci_addr_mask));
writel            254 drivers/pci/controller/pcie-cadence.h 	writel(value, pcie->reg_base + reg);
writel            291 drivers/pci/controller/pcie-cadence.h 	writel(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg);
writel            435 drivers/pci/controller/pcie-iproc.c 	writel(val, pcie->base + offset);
writel            695 drivers/pci/controller/pcie-iproc.c 		writel(val, addr);
writel            702 drivers/pci/controller/pcie-iproc.c 	writel(tmp, addr);
writel            886 drivers/pci/controller/pcie-iproc.c 	writel(lower_32_bits(axi_addr) | (size_idx << OARR_SIZE_CFG_SHIFT) |
writel            888 drivers/pci/controller/pcie-iproc.c 	writel(upper_32_bits(axi_addr), pcie->base + oarr_offset + 4);
writel            891 drivers/pci/controller/pcie-iproc.c 	writel(lower_32_bits(pci_addr), pcie->base + omap_offset);
writel            892 drivers/pci/controller/pcie-iproc.c 	writel(upper_32_bits(pci_addr), pcie->base + omap_offset + 4);
writel           1092 drivers/pci/controller/pcie-iproc.c 	writel(lower_32_bits(pci_addr) | BIT(size_idx),
writel           1094 drivers/pci/controller/pcie-iproc.c 	writel(upper_32_bits(pci_addr), pcie->base + iarr_offset + 4);
writel           1108 drivers/pci/controller/pcie-iproc.c 		writel(val, pcie->base + imap_offset);
writel           1109 drivers/pci/controller/pcie-iproc.c 		writel(upper_32_bits(axi_addr),
writel            287 drivers/pci/controller/pcie-mediatek.c 	writel(CFG_HEADER_DW0(CFG_WRRD_TYPE_0, CFG_RD_FMT),
writel            289 drivers/pci/controller/pcie-mediatek.c 	writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1);
writel            290 drivers/pci/controller/pcie-mediatek.c 	writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_SLOT(devfn), bus),
writel            296 drivers/pci/controller/pcie-mediatek.c 	writel(tmp, port->base + PCIE_APP_TLP_REQ);
writel            317 drivers/pci/controller/pcie-mediatek.c 	writel(CFG_HEADER_DW0(CFG_WRRD_TYPE_0, CFG_WR_FMT),
writel            319 drivers/pci/controller/pcie-mediatek.c 	writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1);
writel            320 drivers/pci/controller/pcie-mediatek.c 	writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_SLOT(devfn), bus),
writel            325 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_CFG_WDATA);
writel            330 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_APP_TLP_REQ);
writel            425 drivers/pci/controller/pcie-mediatek.c 	writel(1 << hwirq, port->base + PCIE_IMSI_STATUS);
writel            529 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_IMSI_ADDR);
writel            533 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_INT_MASK);
writel            615 drivers/pci/controller/pcie-mediatek.c 			writel(1 << bit, port->base + PCIE_INT_STATUS);
writel            633 drivers/pci/controller/pcie-mediatek.c 			writel(MSI_STATUS, port->base + PCIE_INT_STATUS);
writel            674 drivers/pci/controller/pcie-mediatek.c 		writel(val, pcie->base + PCIE_SYS_CFG_V2);
writel            678 drivers/pci/controller/pcie-mediatek.c 	writel(0, port->base + PCIE_RST_CTRL);
writel            685 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
writel            691 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_RST_CTRL);
writel            715 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_INT_MASK);
writel            723 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_AHB_TRANS_BASE0_L);
writel            726 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_AHB_TRANS_BASE0_H);
writel            730 drivers/pci/controller/pcie-mediatek.c 	writel(val, port->base + PCIE_AXI_WINDOW0);
writel            740 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_CONF_ADDR(where, PCI_FUNC(devfn), PCI_SLOT(devfn),
writel            763 drivers/pci/controller/pcie-mediatek.c 	writel(val, pcie->base + PCIE_SYS_CFG);
writel            768 drivers/pci/controller/pcie-mediatek.c 	writel(val, pcie->base + PCIE_SYS_CFG);
writel            780 drivers/pci/controller/pcie-mediatek.c 	writel(val, pcie->base + PCIE_INT_ENABLE);
writel            783 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_BAR_MAP_MAX | PCIE_BAR_ENABLE,
writel            787 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_CLASS_CODE | PCIE_REVISION_ID, port->base + PCIE_CLASS);
writel            790 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_CONF_ADDR(PCIE_FC_CREDIT, func, slot, 0),
writel            795 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_CONF_ADDR(PCIE_FC_CREDIT, func, slot, 0),
writel            797 drivers/pci/controller/pcie-mediatek.c 	writel(val, pcie->base + PCIE_CFG_DATA);
writel            800 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_CONF_ADDR(PCIE_FTS_NUM, func, slot, 0),
writel            805 drivers/pci/controller/pcie-mediatek.c 	writel(PCIE_CONF_ADDR(PCIE_FTS_NUM, func, slot, 0),
writel            807 drivers/pci/controller/pcie-mediatek.c 	writel(val, pcie->base + PCIE_CFG_DATA);
writel            176 drivers/pci/controller/pcie-mobiveil.c 	writel(val, pcie->csr_axi_slave_base + PAB_CTRL);
writel            223 drivers/pci/controller/pcie-mobiveil.c 		writel(val, addr);
writel            163 drivers/pci/controller/pcie-rcar.c 	writel(val, pcie->base + reg);
writel            389 drivers/pci/controller/pcie-rockchip-ep.c 	writel(0, ep->irq_cpu_addr + offset);
writel            141 drivers/pci/controller/pcie-rockchip-host.c 		writel(val, addr);
writel            154 drivers/pci/controller/pcie-rockchip-host.c 	writel(tmp, addr);
writel            212 drivers/pci/controller/pcie-rockchip-host.c 		writel(val, rockchip->reg_base + busdev);
writel            866 drivers/pci/controller/pcie-rockchip-host.c 	writel(0x0, rockchip->msg_region + PCIE_RC_SEND_PME_OFF);
writel            326 drivers/pci/controller/pcie-rockchip.h 	writel(val, rockchip->apb_base + reg);
writel            182 drivers/pci/controller/pcie-xilinx-nwl.c 	writel(val, pcie->breg_base + off);
writel            722 drivers/pci/controller/pcie-xilinx-nwl.c 	writel(ecam_val, (pcie->ecam_base + PCI_PRIMARY_BUS));
writel            127 drivers/pci/controller/pcie-xilinx.c 	writel(val, port->reg_base + reg);
writel            518 drivers/pci/controller/vmd.c 		writel(value, addr);
writel            486 drivers/pci/hotplug/cpqphp.h 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
writel            496 drivers/pci/hotplug/cpqphp.h 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
writel            517 drivers/pci/hotplug/cpqphp.h 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
writel            526 drivers/pci/hotplug/cpqphp.h 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
writel            537 drivers/pci/hotplug/cpqphp.h 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
writel           1137 drivers/pci/hotplug/cpqphp_core.c 	writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
writel           1157 drivers/pci/hotplug/cpqphp_core.c 	writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
writel           1161 drivers/pci/hotplug/cpqphp_core.c 	writel(0x0L, ctrl->hpc_reg + INT_MASK);
writel           1266 drivers/pci/hotplug/cpqphp_core.c 			writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
writel            917 drivers/pci/hotplug/cpqphp_ctrl.c 		writel(Diff, ctrl->hpc_reg + INT_INPUT_CLEAR);
writel            924 drivers/pci/hotplug/cpqphp_ctrl.c 			writel(0xFFFFFFFF, ctrl->hpc_reg + INT_INPUT_CLEAR);
writel           1164 drivers/pci/hotplug/cpqphp_ctrl.c 	writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
writel           1206 drivers/pci/hotplug/cpqphp_ctrl.c 	writel(0, ctrl->hpc_reg + INT_MASK);
writel           1224 drivers/pci/hotplug/cpqphp_ctrl.c 	writel(leds, ctrl->hpc_reg + LED_CONTROL);
writel           2118 drivers/pci/hotplug/cpqphp_ctrl.c 		writel(*work_LED, ctrl->hpc_reg + LED_CONTROL);
writel           2160 drivers/pci/hotplug/cpqphp_ctrl.c 		writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
writel           2164 drivers/pci/hotplug/cpqphp_ctrl.c 		writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
writel           2169 drivers/pci/hotplug/cpqphp_ctrl.c 		writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
writel           2179 drivers/pci/hotplug/cpqphp_ctrl.c 			writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
writel           2189 drivers/pci/hotplug/cpqphp_ctrl.c 			writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
writel           2191 drivers/pci/hotplug/cpqphp_ctrl.c 			writel(work_LED, ctrl->hpc_reg + LED_CONTROL);
writel           2195 drivers/pci/hotplug/cpqphp_ctrl.c 		writel(save_LED, ctrl->hpc_reg + LED_CONTROL);
writel            156 drivers/pci/hotplug/ibmphp_hpc.c 	writel(wpg_data, wpg_addr);
writel            163 drivers/pci/hotplug/ibmphp_hpc.c 	writel(wpg_data, wpg_addr);
writel            171 drivers/pci/hotplug/ibmphp_hpc.c 	writel(wpg_data, wpg_addr);
writel            267 drivers/pci/hotplug/ibmphp_hpc.c 	writel(wpg_data, wpg_addr);
writel            274 drivers/pci/hotplug/ibmphp_hpc.c 	writel(wpg_data, wpg_addr);
writel            282 drivers/pci/hotplug/ibmphp_hpc.c 	writel(wpg_data, wpg_addr);
writel            199 drivers/pci/hotplug/shpchp_hpc.c 	writel(val, ctrl->creg + reg);
writel            225 drivers/pci/msi.c 	writel(mask_bits, desc_addr + PCI_MSIX_ENTRY_VECTOR_CTRL);
writel            323 drivers/pci/msi.c 		writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
writel            324 drivers/pci/msi.c 		writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
writel            325 drivers/pci/msi.c 		writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
writel           1590 drivers/pci/quirks.c 	writel(val & 0xFFFFFFF7, asus_rcba_base + 0x3418);
writel           3360 drivers/pci/quirks.c 		writel(0, regs + I915_DEIER_REG);
writel           3904 drivers/pci/quirks.c 		writel(cfg, bar + NVME_REG_CC);
writel           4892 drivers/pci/quirks.c 			writel(updcr, rcba_mem + INTEL_UPDCR_REG);
writel             89 drivers/pcmcia/vrc4173_cardu.c 	writel(val, socket->base + CARDBUS_SOCKET_REGS_BASE + offset);
writel             94 drivers/pcmcia/yenta_socket.c 	writel(val, socket->base + reg);
writel            674 drivers/perf/arm-cci.c 	writel(val, cci_pmu->ctrl_base + CCI_PMCR);
writel            691 drivers/perf/arm-cci.c 	writel(val, cci_pmu->ctrl_base + CCI_PMCR);
writel            858 drivers/perf/arm-ccn.c 		writel(0x1, ccn->dt.base + CCN_DT_PMSR_REQ);
writel            861 drivers/perf/arm-ccn.c 		writel(0x1, ccn->dt.base + CCN_DT_PMSR_CLR);
writel            917 drivers/perf/arm-ccn.c 	writel(val, xp->base + CCN_XP_DT_CONFIG);
writel            977 drivers/perf/arm-ccn.c 	writel(val, source->base + CCN_XP_DT_INTERFACE_SEL);
writel            980 drivers/perf/arm-ccn.c 	writel(cmp_l & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_L(wp));
writel            981 drivers/perf/arm-ccn.c 	writel((cmp_l >> 32) & 0x7fffffff,
writel            983 drivers/perf/arm-ccn.c 	writel(cmp_h & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_H(wp));
writel            984 drivers/perf/arm-ccn.c 	writel((cmp_h >> 32) & 0x0fffffff,
writel            988 drivers/perf/arm-ccn.c 	writel(mask_l & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_L(wp));
writel            989 drivers/perf/arm-ccn.c 	writel((mask_l >> 32) & 0x7fffffff,
writel            991 drivers/perf/arm-ccn.c 	writel(mask_h & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_H(wp));
writel            992 drivers/perf/arm-ccn.c 	writel((mask_h >> 32) & 0x0fffffff,
writel           1014 drivers/perf/arm-ccn.c 	writel(val, source->base + CCN_XP_PMU_EVENT_SEL);
writel           1051 drivers/perf/arm-ccn.c 	writel(val, source->base + CCN_HNF_PMU_EVENT_SEL);
writel           1077 drivers/perf/arm-ccn.c 	writel(val, ccn->dt.base + CCN_DT_ACTIVE_DSM + offset);
writel           1150 drivers/perf/arm-ccn.c 	writel(val, ccn->dt.base + CCN_DT_PMCR);
writel           1159 drivers/perf/arm-ccn.c 	writel(val, ccn->dt.base + CCN_DT_PMCR);
writel           1170 drivers/perf/arm-ccn.c 	writel(pmovsr, dt->base + CCN_DT_PMOVSR_CLR);
writel           1234 drivers/perf/arm-ccn.c 	writel(CCN_DT_PMOVSR_CLR__MASK, ccn->dt.base + CCN_DT_PMOVSR_CLR);
writel           1235 drivers/perf/arm-ccn.c 	writel(CCN_DT_CTL__DT_EN, ccn->dt.base + CCN_DT_CTL);
writel           1236 drivers/perf/arm-ccn.c 	writel(CCN_DT_PMCR__OVFL_INTR_EN | CCN_DT_PMCR__PMU_EN,
writel           1238 drivers/perf/arm-ccn.c 	writel(0x1, ccn->dt.base + CCN_DT_PMSR_CLR);
writel           1240 drivers/perf/arm-ccn.c 		writel(0, ccn->xp[i].base + CCN_XP_DT_CONFIG);
writel           1241 drivers/perf/arm-ccn.c 		writel((CCN_XP_DT_CONTROL__WP_ARM_SEL__ALWAYS <<
writel           1322 drivers/perf/arm-ccn.c 		writel(0, ccn->xp[i].base + CCN_XP_DT_CONTROL);
writel           1323 drivers/perf/arm-ccn.c 	writel(0, ccn->dt.base + CCN_DT_PMCR);
writel           1336 drivers/perf/arm-ccn.c 		writel(0, ccn->xp[i].base + CCN_XP_DT_CONTROL);
writel           1337 drivers/perf/arm-ccn.c 	writel(0, ccn->dt.base + CCN_DT_PMCR);
writel           1428 drivers/perf/arm-ccn.c 	writel(CCN_MN_ERRINT_STATUS__ALL_ERRORS__DISABLE,
writel           1460 drivers/perf/arm-ccn.c 		writel(CCN_MN_ERRINT_STATUS__INTREQ__DESSERT,
writel           1491 drivers/perf/arm-ccn.c 	writel(CCN_MN_ERRINT_STATUS__PMU_EVENTS__DISABLE,
writel           1496 drivers/perf/arm-ccn.c 		writel(CCN_MN_ERRINT_STATUS__PMU_EVENTS__ENABLE,
writel            136 drivers/perf/arm_smmuv3_pmu.c 	writel(SMMU_PMCG_IRQ_CTRL_IRQEN,
writel            138 drivers/perf/arm_smmuv3_pmu.c 	writel(SMMU_PMCG_CR_ENABLE, smmu_pmu->reg_base + SMMU_PMCG_CR);
writel            145 drivers/perf/arm_smmuv3_pmu.c 	writel(0, smmu_pmu->reg_base + SMMU_PMCG_CR);
writel            146 drivers/perf/arm_smmuv3_pmu.c 	writel(0, smmu_pmu->reg_base + SMMU_PMCG_IRQ_CTRL);
writel            155 drivers/perf/arm_smmuv3_pmu.c 		writel(value, smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 4));
writel            194 drivers/perf/arm_smmuv3_pmu.c 	writel(val, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx));
writel            199 drivers/perf/arm_smmuv3_pmu.c 	writel(val, smmu_pmu->reg_base + SMMU_PMCG_SMR(idx));
writel            335 drivers/perf/fsl_imx8_ddr_perf.c 		writel(0, pmu->base + reg);
writel            338 drivers/perf/fsl_imx8_ddr_perf.c 		writel(val, pmu->base + reg);
writel            342 drivers/perf/fsl_imx8_ddr_perf.c 		writel(val, pmu->base + reg);
writel            379 drivers/perf/fsl_imx8_ddr_perf.c 			writel(cfg1, pmu->base + COUNTER_DPCR1);
writel             88 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	writel((u32)val,
writel            108 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	writel(val, ddrc_pmu->base + DDRC_PERF_CTRL);
writel            118 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	writel(val, ddrc_pmu->base + DDRC_PERF_CTRL);
writel            129 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	writel(val, ddrc_pmu->base + DDRC_EVENT_CTRL);
writel            140 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	writel(val, ddrc_pmu->base + DDRC_EVENT_CTRL);
writel            167 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	writel(val, ddrc_pmu->base + DDRC_INT_MASK);
writel            178 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	writel(val, ddrc_pmu->base + DDRC_INT_MASK);
writel            199 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 		writel((1 << idx), ddrc_pmu->base + DDRC_INT_CLEAR);
writel             98 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + reg);
writel            111 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_PERF_CTRL);
writel            124 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_PERF_CTRL);
writel            135 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_EVENT_CTRL);
writel            146 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_EVENT_CTRL);
writel            157 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_INT_MASK);
writel            168 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	writel(val, hha_pmu->base + HHA_INT_MASK);
writel            189 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 		writel((1 << idx), hha_pmu->base + HHA_INT_CLEAR);
writel             97 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	writel(val, l3c_pmu->base + reg);
writel            110 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	writel(val, l3c_pmu->base + L3C_PERF_CTRL);
writel            123 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	writel(val, l3c_pmu->base + L3C_PERF_CTRL);
writel            134 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	writel(val, l3c_pmu->base + L3C_EVENT_CTRL);
writel            145 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	writel(val, l3c_pmu->base + L3C_EVENT_CTRL);
writel            156 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	writel(val, l3c_pmu->base + L3C_INT_MASK);
writel            167 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	writel(val, l3c_pmu->base + L3C_INT_MASK);
writel            188 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 		writel((1 << idx), l3c_pmu->base + L3C_INT_CLEAR);
writel            360 drivers/perf/qcom_l3_pmu.c 	writel(BC_SATROLL_CR_RESET, l3pmu->regs + L3_M_BC_SATROLL_CR);
writel            385 drivers/perf/qcom_l3_pmu.c 	writel(BC_ENABLE, l3pmu->regs + L3_M_BC_CR);
writel            223 drivers/perf/thunderx2_pmu.c 	writel(val, (void __iomem *)addr);
writel            715 drivers/perf/xgene_pmu.c 	writel(PCPPMU_INTENMASK, xgene_pmu->pcppmu_csr + PCPPMU_INTMASK_REG);
writel            720 drivers/perf/xgene_pmu.c 	writel(PCPPMU_V3_INTENMASK, xgene_pmu->pcppmu_csr + PCPPMU_INTMASK_REG);
writel            725 drivers/perf/xgene_pmu.c 	writel(PCPPMU_INTCLRMASK, xgene_pmu->pcppmu_csr + PCPPMU_INTMASK_REG);
writel            730 drivers/perf/xgene_pmu.c 	writel(PCPPMU_V3_INTCLRMASK,
writel            762 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx));
writel            781 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMEVTYPER0 + (4 * idx));
writel            787 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMAMR0);
writel            796 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMAMR1);
writel            809 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMCNTENSET);
writel            819 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMCNTENCLR);
writel            829 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMINTENSET);
writel            839 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMINTENCLR);
writel            848 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMCR);
writel            857 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMCR);
writel            866 drivers/perf/xgene_pmu.c 	writel(val, pmu_dev->inf->csr + PMU_PMCR);
writel           1211 drivers/perf/xgene_pmu.c 		writel(0x0, csr + PMU_PMOVSR);
writel           1213 drivers/perf/xgene_pmu.c 		writel(pmovsr, csr + PMU_PMOVSR);
writel           1215 drivers/perf/xgene_pmu.c 		writel(pmovsr, csr + PMU_PMOVSCLR);
writel            167 drivers/phy/allwinner/phy-sun4i-usb.c 	writel(iscr, data->base + REG_ISCR);
writel            203 drivers/phy/allwinner/phy-sun4i-usb.c 		writel(0, phyctl);
writel            214 drivers/phy/allwinner/phy-sun4i-usb.c 		writel(temp, phyctl);
writel            263 drivers/phy/allwinner/phy-sun4i-usb.c 	writel(reg_value, phy->pmu);
writel            296 drivers/phy/allwinner/phy-sun4i-usb.c 			writel(val, data->base + data->cfg->phyctl_offset);
writel            301 drivers/phy/allwinner/phy-sun4i-usb.c 			writel(val & ~2, phy->pmu + REG_PMU_UNK1);
writel            345 drivers/phy/allwinner/phy-sun4i-usb.c 			writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
writel            540 drivers/phy/allwinner/phy-sun4i-usb.c 	writel(regval, data->base + REG_PHY_OTGCTL);
writel             63 drivers/phy/allwinner/phy-sun9i-usb.c 	writel(reg_value, phy->pmu);
writel            130 drivers/phy/amlogic/phy-meson8b-usb2.c 	writel(data, phy_priv->regs + reg);
writel             85 drivers/phy/broadcom/phy-bcm-cygnus-pcie.c 		writel(val, core->base + PCIE_CFG_OFFSET);
writel             94 drivers/phy/broadcom/phy-bcm-cygnus-pcie.c 		writel(val, core->base + PCIE_CFG_OFFSET);
writel             47 drivers/phy/broadcom/phy-bcm-kona-usb2.c 	writel(val, phy->regs + OTGCTL);
writel             59 drivers/phy/broadcom/phy-bcm-kona-usb2.c 	writel(val, phy->regs + P1CTL);
writel             60 drivers/phy/broadcom/phy-bcm-kona-usb2.c 	writel(val & ~P1CTL_SOFT_RESET, phy->regs + P1CTL);
writel             63 drivers/phy/broadcom/phy-bcm-kona-usb2.c 	writel(val | P1CTL_SOFT_RESET, phy->regs + P1CTL);
writel             61 drivers/phy/broadcom/phy-bcm-ns-usb2.c 	writel(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
writel             66 drivers/phy/broadcom/phy-bcm-ns-usb2.c 	writel(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
writel             69 drivers/phy/broadcom/phy-bcm-ns-usb2.c 	writel(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
writel            102 drivers/phy/broadcom/phy-bcm-ns-usb3.c 	writel(0, usb3->dmp + BCMA_RESET_CTL);
writel            152 drivers/phy/broadcom/phy-bcm-ns-usb3.c 	writel(0, usb3->dmp + BCMA_RESET_CTL);
writel            163 drivers/phy/broadcom/phy-bcm-ns-usb3.c 	writel(BCMA_RESET_CTL_RESET, usb3->dmp + BCMA_RESET_CTL);
writel            302 drivers/phy/broadcom/phy-bcm-ns-usb3.c 	writel(tmp, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA);
writel            341 drivers/phy/broadcom/phy-bcm-ns-usb3.c 	writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
writel            118 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 	writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
writel            131 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 	writel(val, driver->crmu_usb2_ctrl);
writel            135 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 	writel(val, driver->crmu_usb2_ctrl);
writel            140 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 	writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
writel            154 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(DRD_DEV_VAL, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
writel            158 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->idmdrd_rst_ctrl);
writel            162 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->crmu_usb2_ctrl);
writel            167 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->crmu_usb2_ctrl);
writel            175 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(DRD_HOST_VAL, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
writel            179 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->crmu_usb2_ctrl);
writel            189 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->idmdrd_rst_ctrl);
writel            194 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->usb2h_strap_reg);
writel            211 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
writel            214 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
writel            218 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
writel            223 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
writel            226 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
writel            230 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->usb2h_strap_reg);
writel            234 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 		writel(val, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
writel            398 drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c 	writel(val, driver->crmu_usb2_ctrl);
writel            128 drivers/phy/broadcom/phy-bcm-sr-usb.c 	writel(readl(addr) & ~clear, addr);
writel            133 drivers/phy/broadcom/phy-bcm-sr-usb.c 	writel(readl(addr) | set, addr);
writel            166 drivers/phy/broadcom/phy-bcm-sr-usb.c 	writel(rd_data, regs + offset[PHY_CTRL]);
writel            193 drivers/phy/broadcom/phy-bcm-sr-usb.c 	writel(HSPLL_NDIV_INT_VAL, regs + offset[PLL_NDIV_INT]);
writel            194 drivers/phy/broadcom/phy-bcm-sr-usb.c 	writel(HSPLL_NDIV_FRAC_VAL, regs + offset[PLL_NDIV_FRAC]);
writel            199 drivers/phy/broadcom/phy-bcm-sr-usb.c 	writel(rd_data, regs + offset[PLL_CTRL]);
writel            217 drivers/phy/broadcom/phy-bcm-sr-usb.c 	writel(rd_data, regs + offset[PHY_CTRL]);
writel            207 drivers/phy/broadcom/phy-brcm-sata.c 	writel(bank, pcb_base + SATA_PCB_BANK_OFFSET);
writel            210 drivers/phy/broadcom/phy-brcm-sata.c 	writel(tmp, pcb_base + SATA_PCB_REG_OFFSET(ofs));
writel            215 drivers/phy/broadcom/phy-brcm-sata.c 	writel(bank, pcb_base + SATA_PCB_BANK_OFFSET);
writel            331 drivers/phy/broadcom/phy-brcm-sata.c 	writel(PHY_CTRL_1_RESET, ctrl_base + PHY_CTRL_1);
writel            333 drivers/phy/broadcom/phy-brcm-sata.c 	writel(0x0, ctrl_base + PHY_CTRL_1);
writel            411 drivers/phy/broadcom/phy-brcm-usb-init.c 	writel(val, addr);
writel            184 drivers/phy/cadence/cdns-dphy.c 	writel(DPHY_CMN_IPDIV_FROM_REG | DPHY_CMN_OPDIV_FROM_REG |
writel            188 drivers/phy/cadence/cdns-dphy.c 	writel(DPHY_CMN_FBDIV_FROM_REG |
writel            191 drivers/phy/cadence/cdns-dphy.c 	writel(DPHY_CMN_PWM_HIGH(6) | DPHY_CMN_PWM_LOW(0x101) |
writel            198 drivers/phy/cadence/cdns-dphy.c 	writel(DPHY_PSM_CFG_FROM_REG | DPHY_PSM_CLK_DIV(div),
writel            290 drivers/phy/cadence/cdns-dphy.c 	writel(DPHY_CMN_SSM_EN | DPHY_CMN_TX_MODE_EN,
writel            138 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0003, cdns_phy->base + PHY_AUX_CTRL); /* enable AUX */
writel            187 drivers/phy/cadence/phy-cadence-dp.c 	writel(((0xF & ~lane_bits) << 4) | (0xF & lane_bits),
writel            191 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0001, cdns_phy->base + PHY_PMA_XCVR_PLLCLK_EN);
writel            232 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0019, cdns_phy->sd_base + CMN_SSM_BIAS_TMR);
writel            233 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0032, cdns_phy->sd_base + CMN_PLLSM0_PLLPRE_TMR);
writel            234 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x00D1, cdns_phy->sd_base + CMN_PLLSM0_PLLLOCK_TMR);
writel            235 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0032, cdns_phy->sd_base + CMN_PLLSM1_PLLPRE_TMR);
writel            236 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x00D1, cdns_phy->sd_base + CMN_PLLSM1_PLLLOCK_TMR);
writel            237 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x007D, cdns_phy->sd_base + CMN_BGCAL_INIT_TMR);
writel            238 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x007D, cdns_phy->sd_base + CMN_BGCAL_ITER_TMR);
writel            239 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0019, cdns_phy->sd_base + CMN_IBCAL_INIT_TMR);
writel            240 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x001E, cdns_phy->sd_base + CMN_TXPUCAL_INIT_TMR);
writel            241 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0006, cdns_phy->sd_base + CMN_TXPUCAL_ITER_TMR);
writel            242 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x001E, cdns_phy->sd_base + CMN_TXPDCAL_INIT_TMR);
writel            243 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0006, cdns_phy->sd_base + CMN_TXPDCAL_ITER_TMR);
writel            244 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x02EE, cdns_phy->sd_base + CMN_RXCAL_INIT_TMR);
writel            245 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0006, cdns_phy->sd_base + CMN_RXCAL_ITER_TMR);
writel            246 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0002, cdns_phy->sd_base + CMN_SD_CAL_INIT_TMR);
writel            247 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0002, cdns_phy->sd_base + CMN_SD_CAL_ITER_TMR);
writel            248 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x000E, cdns_phy->sd_base + CMN_SD_CAL_REFTIM_START);
writel            249 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x012B, cdns_phy->sd_base + CMN_SD_CAL_PLLCNT_START);
writel            251 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0409, cdns_phy->sd_base + CMN_PDIAG_PLL0_CP_PADJ_M0);
writel            252 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x1001, cdns_phy->sd_base + CMN_PDIAG_PLL0_CP_IADJ_M0);
writel            253 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0F08, cdns_phy->sd_base + CMN_PDIAG_PLL0_FILT_PADJ_M0);
writel            254 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0004, cdns_phy->sd_base + CMN_PLL0_DSM_DIAG_M0);
writel            255 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x00FA, cdns_phy->sd_base + CMN_PLL0_VCOCAL_INIT_TMR);
writel            256 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0004, cdns_phy->sd_base + CMN_PLL0_VCOCAL_ITER_TMR);
writel            257 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x00FA, cdns_phy->sd_base + CMN_PLL1_VCOCAL_INIT_TMR);
writel            258 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0004, cdns_phy->sd_base + CMN_PLL1_VCOCAL_ITER_TMR);
writel            259 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0318, cdns_phy->sd_base + CMN_PLL0_VCOCAL_REFTIM_START);
writel            269 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x01B0, cdns_phy->sd_base + CMN_PLL0_INTDIV_M0);
writel            270 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0000, cdns_phy->sd_base + CMN_PLL0_FRACDIVL_M0);
writel            271 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0002, cdns_phy->sd_base + CMN_PLL0_FRACDIVH_M0);
writel            272 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0120, cdns_phy->sd_base + CMN_PLL0_HIGH_THR_M0);
writel            277 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0184, cdns_phy->sd_base + CMN_PLL0_INTDIV_M0);
writel            278 drivers/phy/cadence/phy-cadence-dp.c 		writel(0xCCCD, cdns_phy->sd_base + CMN_PLL0_FRACDIVL_M0);
writel            279 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0002, cdns_phy->sd_base + CMN_PLL0_FRACDIVH_M0);
writel            280 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0104, cdns_phy->sd_base + CMN_PLL0_HIGH_THR_M0);
writel            285 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0159, cdns_phy->sd_base + CMN_PLL0_INTDIV_M0);
writel            286 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x999A, cdns_phy->sd_base + CMN_PLL0_FRACDIVL_M0);
writel            287 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0002, cdns_phy->sd_base + CMN_PLL0_FRACDIVH_M0);
writel            288 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x00E7, cdns_phy->sd_base + CMN_PLL0_HIGH_THR_M0);
writel            292 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0144, cdns_phy->sd_base + CMN_PLL0_INTDIV_M0);
writel            293 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0000, cdns_phy->sd_base + CMN_PLL0_FRACDIVL_M0);
writel            294 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x0002, cdns_phy->sd_base + CMN_PLL0_FRACDIVH_M0);
writel            295 drivers/phy/cadence/phy-cadence-dp.c 		writel(0x00D8, cdns_phy->sd_base + CMN_PLL0_HIGH_THR_M0);
writel            299 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0002, cdns_phy->sd_base + CMN_PDIAG_PLL0_CTRL_M0);
writel            300 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0318, cdns_phy->sd_base + CMN_PLL0_VCOCAL_PLLCNT_START);
writel            310 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0000, cdns_phy->sd_base + PHY_PLL_CFG);
writel            338 drivers/phy/cadence/phy-cadence-dp.c 	writel(clk_sel_val, cdns_phy->sd_base + CMN_PDIAG_PLL0_CLK_SEL_M0);
writel            342 drivers/phy/cadence/phy-cadence-dp.c 		writel(hsclk_div_val,
writel            353 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x00FB, cdns_phy->sd_base + (TX_PSC_A0 | lane_bits));
writel            354 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x04AA, cdns_phy->sd_base + (TX_PSC_A2 | lane_bits));
writel            355 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x04AA, cdns_phy->sd_base + (TX_PSC_A3 | lane_bits));
writel            356 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0000, cdns_phy->sd_base + (RX_PSC_A0 | lane_bits));
writel            357 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0000, cdns_phy->sd_base + (RX_PSC_A2 | lane_bits));
writel            358 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0000, cdns_phy->sd_base + (RX_PSC_A3 | lane_bits));
writel            360 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0001, cdns_phy->sd_base + (XCVR_DIAG_PLLDRC_CTRL | lane_bits));
writel            361 drivers/phy/cadence/phy-cadence-dp.c 	writel(0x0000, cdns_phy->sd_base + (XCVR_DIAG_HSCLK_SEL | lane_bits));
writel            403 drivers/phy/cadence/phy-cadence-dp.c 	writel(write_val1, cdns_phy->base + PHY_PMA_XCVR_POWER_STATE_REQ);
writel            412 drivers/phy/cadence/phy-cadence-dp.c 	writel(0, cdns_phy->base + PHY_PMA_XCVR_POWER_STATE_REQ);
writel            415 drivers/phy/cadence/phy-cadence-dp.c 	writel(write_val2, cdns_phy->base + PHY_PMA_XCVR_POWER_STATE_REQ);
writel            424 drivers/phy/cadence/phy-cadence-dp.c 	writel(0, cdns_phy->base + PHY_PMA_XCVR_POWER_STATE_REQ);
writel            437 drivers/phy/cadence/phy-cadence-dp.c 	writel(((val << start_bit) | (read_val & ~(((1 << num_bits) - 1) <<
writel            120 drivers/phy/cadence/phy-cadence-sierra.c 			writel(vals[j].val, phy->base +
writel            270 drivers/phy/cadence/phy-cadence-sierra.c 		writel(2, sp->base + SIERRA_PHY_PLL_CFG);
writel             40 drivers/phy/freescale/phy-fsl-imx8mq-usb.c 	writel(value, imx_phy->base + PHY_CTRL1);
writel             44 drivers/phy/freescale/phy-fsl-imx8mq-usb.c 	writel(value, imx_phy->base + PHY_CTRL0);
writel             48 drivers/phy/freescale/phy-fsl-imx8mq-usb.c 	writel(value, imx_phy->base + PHY_CTRL2);
writel             52 drivers/phy/freescale/phy-fsl-imx8mq-usb.c 	writel(value, imx_phy->base + PHY_CTRL1);
writel             53 drivers/phy/hisilicon/phy-hisi-inno-usb2.c 	writel(val, reg);
writel             56 drivers/phy/hisilicon/phy-hisi-inno-usb2.c 	writel(val, reg);
writel             59 drivers/phy/hisilicon/phy-hisi-inno-usb2.c 	writel(val, reg);
writel             64 drivers/phy/hisilicon/phy-histb-combphy.c 	writel(val, reg);
writel             68 drivers/phy/hisilicon/phy-histb-combphy.c 	writel(val, reg);
writel             70 drivers/phy/hisilicon/phy-histb-combphy.c 	writel(val, reg);
writel            118 drivers/phy/hisilicon/phy-histb-combphy.c 	writel(val, priv->mmio + COMBPHY_CFG_REG);
writel            129 drivers/phy/hisilicon/phy-histb-combphy.c 	writel(val, priv->mmio + COMBPHY_CFG_REG);
writel            150 drivers/phy/hisilicon/phy-histb-combphy.c 	writel(val, priv->mmio + COMBPHY_CFG_REG);
writel             45 drivers/phy/marvell/phy-armada375-usb2.c 	writel(reg, cluster_phy->reg);
writel             63 drivers/phy/marvell/phy-armada38x-comphy.c 	writel(val | value, lane->base + offset);
writel             71 drivers/phy/marvell/phy-berlin-sata.c 	writel(phy_base + reg, ctrl_reg + PORT_VSR_ADDR);
writel             77 drivers/phy/marvell/phy-berlin-sata.c 	writel(regval, ctrl_reg + PORT_VSR_DATA);
writel             92 drivers/phy/marvell/phy-berlin-sata.c 	writel(CONTROL_REGISTER, priv->base + HOST_VSA_ADDR);
writel             95 drivers/phy/marvell/phy-berlin-sata.c 	writel(regval, priv->base + HOST_VSA_DATA);
writel             98 drivers/phy/marvell/phy-berlin-sata.c 	writel(MBUS_SIZE_CONTROL, priv->base + HOST_VSA_ADDR);
writel            101 drivers/phy/marvell/phy-berlin-sata.c 	writel(regval, priv->base + HOST_VSA_DATA);
writel            124 drivers/phy/marvell/phy-berlin-sata.c 	writel(regval, ctrl_reg + PORT_SCR_CTL);
writel            144 drivers/phy/marvell/phy-berlin-sata.c 	writel(CONTROL_REGISTER, priv->base + HOST_VSA_ADDR);
writel            147 drivers/phy/marvell/phy-berlin-sata.c 	writel(regval, priv->base + HOST_VSA_DATA);
writel            120 drivers/phy/marvell/phy-berlin-usb.c 	writel(priv->pll_divider,
writel            122 drivers/phy/marvell/phy-berlin-usb.c 	writel(CLK_STABLE | PLL_CTRL_REG | PHASE_OFF_TOL_250 | KVC0_REG_CTRL |
writel            124 drivers/phy/marvell/phy-berlin-usb.c 	writel(V2I_VCO_RATIO(0x5) | R_ROTATE_0 | ANA_TEST_DC_CTRL(0x5),
writel            126 drivers/phy/marvell/phy-berlin-usb.c 	writel(PHASE_FREEZE_DLY_4_CL | ACK_LENGTH_16_CL | SQ_LENGTH_12 |
writel            130 drivers/phy/marvell/phy-berlin-usb.c 	writel(TX_VDD12_13 | TX_OUT_AMP(0x3), priv->base + USB_PHY_TX_CTRL1);
writel            131 drivers/phy/marvell/phy-berlin-usb.c 	writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4),
writel            134 drivers/phy/marvell/phy-berlin-usb.c 	writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4) |
writel            137 drivers/phy/marvell/phy-berlin-usb.c 	writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4),
writel            139 drivers/phy/marvell/phy-berlin-usb.c 	writel(TX_CHAN_CTRL_REG(0xf) | DRV_SLEWRATE(0x3) | IMP_CAL_FS_HS_DLY_3 |
writel            102 drivers/phy/marvell/phy-mvebu-a3700-utmi.c 	writel(reg, utmi->regs + USB2_PHY_PLL_CTRL_REG0);
writel            113 drivers/phy/marvell/phy-mvebu-a3700-utmi.c 		writel(reg, utmi->regs + USB2_PHY_OTG_CTRL);
writel            119 drivers/phy/marvell/phy-mvebu-a3700-utmi.c 		writel(reg, utmi->regs + USB2_PHY_CHRGR_DETECT);
writel            173 drivers/phy/marvell/phy-mvebu-a3700-utmi.c 	writel(reg, utmi->regs + USB2_PHY_CTRL(usb32));
writel            179 drivers/phy/marvell/phy-mvebu-a3700-utmi.c 		writel(reg, utmi->regs + USB2_PHY_OTG_CTRL);
writel            372 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
writel            401 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
writel            407 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
writel            422 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
writel            430 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id));
writel            435 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id));
writel            450 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
writel            465 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
writel            476 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
writel            495 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
writel            499 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id));
writel            509 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
writel            528 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
writel            532 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id));
writel            536 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id));
writel            540 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_DFE_RES(lane->id));
writel            545 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
writel            553 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S1(lane->id));
writel            557 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_COEF(lane->id));
writel            562 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S4(lane->id));
writel            581 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
writel            585 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id));
writel            590 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SPEED_DIV(lane->id));
writel            594 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id));
writel            599 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_DFE_RES(lane->id));
writel            606 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
writel            611 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S2(lane->id));
writel            616 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_TX_SLEW_RATE(lane->id));
writel            623 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_IMP_CAL(lane->id));
writel            627 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S5(lane->id));
writel            639 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S1(lane->id));
writel            643 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_COEF(lane->id));
writel            648 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S4(lane->id));
writel            652 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_GEN1_S3(lane->id));
writel            658 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_TRAINING5(lane->id));
writel            663 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_TRAINING0(lane->id));
writel            668 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_TX_PRESET(lane->id));
writel            672 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id));
writel            677 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id));
writel            682 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_FRAME_DETECT0(lane->id));
writel            686 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_DME(lane->id));
writel            690 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_VDD_CAL0(lane->id));
writel            696 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_SP_CALIB(lane->id));
writel            698 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_SP_CALIB(lane->id));
writel            704 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id));
writel            748 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
writel            866 drivers/phy/marvell/phy-mvebu-cp110-comphy.c 	writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
writel             39 drivers/phy/marvell/phy-mvebu-sata.c 	writel(reg , priv->base + SATA_PHY_MODE_2);
writel             44 drivers/phy/marvell/phy-mvebu-sata.c 	writel(reg, priv->base + SATA_IF_CTRL);
writel             62 drivers/phy/marvell/phy-mvebu-sata.c 	writel(reg, priv->base + SATA_PHY_MODE_2);
writel             67 drivers/phy/marvell/phy-mvebu-sata.c 	writel(reg, priv->base + SATA_IF_CTRL);
writel             67 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(0x1 << PHY_28NM_HSIC_PLL_SELLPFR_SHIFT |
writel             73 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) |
writel             99 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(reg, base + PHY_28NM_HSIC_CTRL);
writel            132 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(readl(base + PHY_28NM_HSIC_CTRL) & ~PHY_28NM_HSIC_S2H_HSIC_EN,
writel            144 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) &
writel            166 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(reg | (0x1 << PHY_28NM_PLL_SELLPFR_SHIFT
writel            174 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(reg | PHY_28NM_PLL_PU_PLL | PHY_28NM_PLL_PU_BY_REG,
writel            179 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(reg | PHY_28NM_TX_PU_BY_REG | 0x3 << PHY_28NM_TX_AMP_SHIFT |
writel            185 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(reg | 0xa << PHY_28NM_RX_SQ_THRESH_SHIFT,
writel            193 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(reg | (0x1 << PHY_28NM_DIG_SYNC_NUM_SHIFT |
writel            199 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(reg & ~PHY_28NM_OTG_CONTROL_BY_PIN, base + PHY_28NM_OTG_REG);
writel            243 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(readl(base + PHY_28NM_CTRL_REG3) |
writel            256 drivers/phy/marvell/phy-pxa-28nm-usb2.c 	writel(readl(base + PHY_28NM_CTRL_REG3) |
writel            335 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR5);
writel            341 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, fmreg + U3P_U2FREQ_FMMONR1);
writel            350 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, fmreg + U3P_U2FREQ_FMCR0);
writel            355 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, fmreg + U3P_U2FREQ_FMCR0);
writel            366 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, fmreg + U3P_U2FREQ_FMCR0);
writel            371 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, fmreg + U3P_U2FREQ_FMMONR1);
writel            390 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR5);
writel            395 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR5);
writel            407 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->spllc + U3P_SPLLC_XTALCTL3);
writel            413 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG0);
writel            418 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG9);
writel            423 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG6);
writel            428 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_CDR1);
writel            433 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_LFPS1);
writel            438 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET1);
writel            443 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET2);
writel            460 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_U2PHYDTM0);
writel            464 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_U2PHYDTM1);
writel            468 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR0);
writel            473 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR5);
writel            478 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_U2PHYACR4);
writel            485 drivers/phy/mediatek/phy-mtk-tphy.c 			writel(tmp, com + U3P_USBPHYACR2);
writel            489 drivers/phy/mediatek/phy-mtk-tphy.c 			writel(tmp, com + U3D_U2PHYDCR0);
writel            493 drivers/phy/mediatek/phy-mtk-tphy.c 			writel(tmp, com + U3D_U2PHYDCR0);
writel            497 drivers/phy/mediatek/phy-mtk-tphy.c 			writel(tmp, com + U3P_U2PHYDTM0);
writel            505 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR6);
writel            520 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_U2PHYDTM0);
writel            525 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR6);
writel            530 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_U2PHYDTM1);
writel            535 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3D_U2PHYDCR0);
writel            539 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_U2PHYDTM0);
writel            554 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_U2PHYDTM0);
writel            559 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_USBPHYACR6);
writel            564 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, com + U3P_U2PHYDTM1);
writel            569 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_U2PHYDTM0);
writel            573 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3D_U2PHYDCR0);
writel            590 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3D_U2PHYDCR0);
writel            594 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_U2PHYDTM0);
writel            620 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u2_banks->com + U3P_U2PHYDTM1);
writel            635 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG0);
writel            641 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG1);
writel            646 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG0);
writel            652 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG20);
writel            657 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG25);
writel            663 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG5);
writel            668 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG4);
writel            673 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG6);
writel            678 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phya + U3P_U3_PHYA_DA_REG7);
writel            684 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET1);
writel            689 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET2);
writel            704 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, bank->chip + U3P_U3_CHIP_GPIO_CTLD);
writel            708 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, bank->chip + U3P_U3_CHIP_GPIO_CTLE);
writel            720 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, bank->chip + U3P_U3_CHIP_GPIO_CTLD);
writel            724 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, bank->chip + U3P_U3_CHIP_GPIO_CTLE);
writel            738 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + ANA_RG_CTRL_SIGNAL6);
writel            743 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL4);
writel            748 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL5);
writel            753 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + ANA_RG_CTRL_SIGNAL4);
writel            758 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + PHYD_CTRL_SIGNAL_MODE4);
writel            763 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + PHYD_DESIGN_OPTION2);
writel            770 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + PHYD_DESIGN_OPTION9);
writel            775 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + ANA_RG_CTRL_SIGNAL1);
writel            780 drivers/phy/mediatek/phy-mtk-tphy.c 	writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL1);
writel            868 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_U2PHYBC12C);
writel            875 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_USBPHYACR5);
writel            882 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_USBPHYACR1);
writel            889 drivers/phy/mediatek/phy-mtk-tphy.c 		writel(tmp, com + U3P_USBPHYACR1);
writel             48 drivers/phy/mediatek/phy-mtk-ufs.c 	writel(val, phy->mmio + reg);
writel            131 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_USBPHYACR5);
writel            137 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_U2FREQ_FMMONR1);
writel            143 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_U2FREQ_FMCR0);
writel            148 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_U2FREQ_FMCR0);
writel            159 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_U2FREQ_FMCR0);
writel            164 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_U2FREQ_FMMONR1);
writel            183 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_USBPHYACR5);
writel            188 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_USBPHYACR5);
writel            200 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_USBPHYACR6);
writel            204 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_USBPHYACR0);
writel            216 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_USBPHYACR6);
writel            221 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_U2PHYDTM1);
writel            235 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_USBPHYACR6);
writel            240 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, pbase + XSP_U2PHYDTM1);
writel            266 drivers/phy/mediatek/phy-mtk-xsphy.c 	writel(tmp, inst->port_base + XSP_U2PHYDTM1);
writel            315 drivers/phy/mediatek/phy-mtk-xsphy.c 		writel(tmp, pbase + XSP_USBPHYACR1);
writel            322 drivers/phy/mediatek/phy-mtk-xsphy.c 		writel(tmp, pbase + XSP_USBPHYACR5);
writel            329 drivers/phy/mediatek/phy-mtk-xsphy.c 		writel(tmp, pbase + XSP_USBPHYACR1);
writel            336 drivers/phy/mediatek/phy-mtk-xsphy.c 		writel(tmp, pbase + XSP_USBPHYACR1);
writel            350 drivers/phy/mediatek/phy-mtk-xsphy.c 		writel(tmp, xsphy->glb_base + SSPXTP_PHYA_GLB_00);
writel            357 drivers/phy/mediatek/phy-mtk-xsphy.c 		writel(tmp, pbase + SSPXTP_PHYA_LN_04);
writel            364 drivers/phy/mediatek/phy-mtk-xsphy.c 		writel(tmp, pbase + SSPXTP_PHYA_LN_14);
writel            559 drivers/phy/phy-xgene.c 	writel(data, csr_base + indirect_data_reg);
writel            561 drivers/phy/phy-xgene.c 	writel(cmd, csr_base + indirect_cmd_reg);
writel            581 drivers/phy/phy-xgene.c 	writel(cmd, csr_base + indirect_cmd_reg);
writel           1142 drivers/phy/phy-xgene.c 	writel(0xdf, csr_serdes + SATA_ENET_SDS_RST_CTL);
writel           1261 drivers/phy/phy-xgene.c 	writel(0x0, sds_base + SATA_ENET_SDS_RST_CTL);
writel           1264 drivers/phy/phy-xgene.c 	writel(0x20, sds_base + SATA_ENET_SDS_RST_CTL);
writel           1267 drivers/phy/phy-xgene.c 	writel(0xde, sds_base + SATA_ENET_SDS_RST_CTL);
writel           1274 drivers/phy/phy-xgene.c 	writel(val, sds_base + SATA_ENET_SDS_CTL1);
writel           1279 drivers/phy/phy-xgene.c 	writel(val, sds_base + SATA_ENET_SDS_CTL0);
writel           1298 drivers/phy/phy-xgene.c 	writel(val, sds_base + SATA_ENET_SDS_PCS_CTL0);
writel             77 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
writel             84 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
writel             89 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL3);
writel             96 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE2_PHY_RESET_CTRL);
writel            102 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PCS_SWING_CTRL1);
writel            107 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PCS_SWING_CTRL2);
writel            113 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PCS_DEEMPH1);
writel            118 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PCS_DEEMPH2);
writel            123 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PCS_DEEMPH3);
writel            129 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_CONFIGBITS);
writel            135 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PHY_CTRL3);
writel            140 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE20_PARF_PCS_CTRL);
writel            145 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE2_PHY_RESET_CTRL);
writel            179 drivers/phy/qualcomm/phy-qcom-pcie2.c 	writel(val, qphy->base + PCIE2_PHY_RESET_CTRL);
writel           1010 drivers/phy/qualcomm/phy-qcom-qmp.c 	writel(reg, base + offset);
writel           1022 drivers/phy/qualcomm/phy-qcom-qmp.c 	writel(reg, base + offset);
writel           1292 drivers/phy/qualcomm/phy-qcom-qmp.c 			writel(t->val, base + regs[t->offset]);
writel           1294 drivers/phy/qualcomm/phy-qcom-qmp.c 			writel(t->val, base + t->offset);
writel            345 drivers/phy/qualcomm/phy-qcom-qusb2.c 	writel(reg, base + offset);
writel            357 drivers/phy/qualcomm/phy-qcom-qusb2.c 	writel(reg, base + offset);
writel            369 drivers/phy/qualcomm/phy-qcom-qusb2.c 	writel(reg, base + offset);
writel            384 drivers/phy/qualcomm/phy-qcom-qusb2.c 			writel(tbl[i].val, base + regs[tbl[i].offset]);
writel            386 drivers/phy/qualcomm/phy-qcom-qusb2.c 			writel(tbl[i].val, base + tbl[i].offset);
writel            513 drivers/phy/qualcomm/phy-qcom-qusb2.c 	writel(intr_mask, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]);
writel            574 drivers/phy/qualcomm/phy-qcom-qusb2.c 	writel(0x0, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]);
writel            704 drivers/phy/qualcomm/phy-qcom-qusb2.c 		writel(val, qphy->base + QUSB2PHY_PLL_TEST);
writel             63 drivers/phy/ralink/phy-ralink-usb.c 	writel(val, phy->base + reg);
writel            100 drivers/phy/renesas/phy-rcar-gen2.c 	writel(ugctrl2, drv->base + USBHS_UGCTRL2);
writel            135 drivers/phy/renesas/phy-rcar-gen2.c 	writel(value, base + USBHS_UGCTRL);
writel            146 drivers/phy/renesas/phy-rcar-gen2.c 			writel(value, base + USBHS_UGCTRL);
writel            178 drivers/phy/renesas/phy-rcar-gen2.c 	writel(value, base + USBHS_UGCTRL);
writel            186 drivers/phy/renesas/phy-rcar-gen2.c 	writel(value, base + USBHS_UGCTRL);
writel            206 drivers/phy/renesas/phy-rcar-gen2.c 	writel(value, base + USBHS_UGCTRL);
writel            240 drivers/phy/renesas/phy-rcar-gen2.c 	writel(value, base + USBHS_UGCTRL);
writel             41 drivers/phy/renesas/phy-rcar-gen3-pcie.c 	writel(value, base + reg);
writel            154 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_COMMCTRL);
writel            168 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_LINECTRL1);
writel            181 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_ADPCTRL);
writel            193 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_OBINTEN);
writel            222 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
writel            229 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
writel            376 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_LINECTRL1);
writel            380 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
writel            382 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
writel            386 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(0xffffffff, usb2_base + USB2_OBINTSTA);
writel            387 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
writel            402 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_INT_ENABLE);
writel            403 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
writel            404 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
writel            434 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_INT_ENABLE);
writel            459 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_USBCTR);
writel            461 drivers/phy/renesas/phy-rcar-gen3-usb2.c 	writel(val, usb2_base + USB2_USBCTR);
writel            515 drivers/phy/renesas/phy-rcar-gen3-usb2.c 		writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
writel            465 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x830, tcphy->base + PMA_CMN_CTRL1);
writel            471 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(0x90, tcphy->base + XCVR_DIAG_LANE_FCM_EN_MGN(i));
writel            472 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(0x960, tcphy->base + TX_RCVDET_EN_TMR(i));
writel            473 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(0x30, tcphy->base + TX_RCVDET_ST_TMR(i));
writel            479 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(rdata, tcphy->base + CMN_DIAG_HSCLK_SEL);
writel            488 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(usb3_pll_cfg[i].value,
writel            497 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(DP_PLL_CLOCK_ENABLE | DP_PLL_ENABLE | DP_PLL_DATA_RATE_RBR,
writel            502 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(dp_pll_cfg[i].value, tcphy->base + dp_pll_cfg[i].addr);
writel            507 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x7799, tcphy->base + TX_PSC_A0(lane));
writel            508 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x7798, tcphy->base + TX_PSC_A1(lane));
writel            509 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x5098, tcphy->base + TX_PSC_A2(lane));
writel            510 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x5098, tcphy->base + TX_PSC_A3(lane));
writel            511 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_000(lane));
writel            512 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0xbf, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane));
writel            517 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0xa6fd, tcphy->base + RX_PSC_A0(lane));
writel            518 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0xa6fd, tcphy->base + RX_PSC_A1(lane));
writel            519 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0xa410, tcphy->base + RX_PSC_A2(lane));
writel            520 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x2410, tcphy->base + RX_PSC_A3(lane));
writel            521 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x23ff, tcphy->base + RX_PSC_CAL(lane));
writel            522 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x13, tcphy->base + RX_SIGDET_HL_FILT_TMR(lane));
writel            523 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x03e7, tcphy->base + RX_REE_CTRL_DATA_MASK(lane));
writel            524 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x1004, tcphy->base + RX_DIAG_SIGDET_TUNE(lane));
writel            525 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x2010, tcphy->base + RX_PSC_RDY(lane));
writel            526 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0xfb, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane));
writel            533 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0xbefc, tcphy->base + XCVR_PSM_RCTRL(lane));
writel            534 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x6799, tcphy->base + TX_PSC_A0(lane));
writel            535 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x6798, tcphy->base + TX_PSC_A1(lane));
writel            536 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x98, tcphy->base + TX_PSC_A2(lane));
writel            537 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x98, tcphy->base + TX_PSC_A3(lane));
writel            539 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_000(lane));
writel            540 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_001(lane));
writel            541 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_010(lane));
writel            542 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_011(lane));
writel            543 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_100(lane));
writel            544 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_101(lane));
writel            545 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_110(lane));
writel            546 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_111(lane));
writel            547 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_10(lane));
writel            548 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_01(lane));
writel            549 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_00(lane));
writel            550 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_TXCC_CPOST_MULT_11(lane));
writel            552 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x128, tcphy->base + TX_TXCC_CAL_SCLR_MULT(lane));
writel            553 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x400, tcphy->base + TX_DIAG_TX_DRV(lane));
writel            557 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(rdata, tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));
writel            585 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            614 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            620 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(val, tcphy->base + TX_DIG_CTRL_REG_2);
writel            629 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            633 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + PHY_DP_TX_CTL);
writel            637 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_2, tcphy->base + TX_ANA_CTRL_REG_2);
writel            640 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_2, tcphy->base + TX_ANA_CTRL_REG_2);
writel            642 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_ANA_CTRL_REG_3);
writel            645 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            648 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            650 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_ANA_CTRL_REG_5);
writel            656 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0x1001, tcphy->base + TX_ANA_CTRL_REG_4);
writel            660 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            663 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            670 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_2, tcphy->base + TX_ANA_CTRL_REG_2);
writel            673 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_2, tcphy->base + TX_ANA_CTRL_REG_2);
writel            690 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            693 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
writel            700 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TX_ANA_CTRL_REG_4);
writel            703 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TXDA_COEFF_CALC_CTRL);
writel            706 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(0, tcphy->base + TXDA_CYA_AUXDA_CYA);
writel            719 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(val, tcphy->base + TX_DIG_CTRL_REG_2);
writel            752 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(PIN_ASSIGN_C_E, tcphy->base + PMA_LANE_CFG);
writel            768 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(PIN_ASSIGN_D_F, tcphy->base + PMA_LANE_CFG);
writel            771 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(DP_MODE_ENTER_A2, tcphy->base + DP_MODE_CTL);
writel            993 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(DP_MODE_ENTER_A0, tcphy->base + DP_MODE_CTL);
writel            999 drivers/phy/rockchip/phy-rockchip-typec.c 		writel(DP_MODE_ENTER_A2, tcphy->base + DP_MODE_CTL);
writel           1025 drivers/phy/rockchip/phy-rockchip-typec.c 	writel(DP_MODE_ENTER_A2, tcphy->base + DP_MODE_CTL);
writel             75 drivers/phy/samsung/phy-exynos-pcie.c 	writel(val, base + offset);
writel            167 drivers/phy/samsung/phy-exynos4210-usb2.c 		writel(on, drv->reg_phy + EXYNOS_4210_UPHY1CON);
writel            185 drivers/phy/samsung/phy-exynos4210-usb2.c 		writel(clk, drv->reg_phy + EXYNOS_4210_UPHYCLK);
writel            189 drivers/phy/samsung/phy-exynos4210-usb2.c 		writel(pwr, drv->reg_phy + EXYNOS_4210_UPHYPWR);
writel            193 drivers/phy/samsung/phy-exynos4210-usb2.c 		writel(rst, drv->reg_phy + EXYNOS_4210_UPHYRST);
writel            196 drivers/phy/samsung/phy-exynos4210-usb2.c 		writel(rst, drv->reg_phy + EXYNOS_4210_UPHYRST);
writel            203 drivers/phy/samsung/phy-exynos4210-usb2.c 		writel(pwr, drv->reg_phy + EXYNOS_4210_UPHYPWR);
writel            205 drivers/phy/samsung/phy-exynos4x12-usb2.c 	writel(clk, drv->reg_phy + EXYNOS_4x12_UPHYCLK);
writel            242 drivers/phy/samsung/phy-exynos4x12-usb2.c 		writel(pwr, drv->reg_phy + EXYNOS_4x12_UPHYPWR);
writel            246 drivers/phy/samsung/phy-exynos4x12-usb2.c 		writel(rst, drv->reg_phy + EXYNOS_4x12_UPHYRST);
writel            249 drivers/phy/samsung/phy-exynos4x12-usb2.c 		writel(rst, drv->reg_phy + EXYNOS_4x12_UPHYRST);
writel            256 drivers/phy/samsung/phy-exynos4x12-usb2.c 		writel(pwr, drv->reg_phy + EXYNOS_4x12_UPHYPWR);
writel            350 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
writel            354 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
writel            365 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
writel            371 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
writel            374 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(PHYUTMI_OTGDISABLE, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
writel            378 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
writel            393 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(0x0, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
writel            394 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(0x0, phy_drd->reg_phy + EXYNOS5_DRD_PHYRESUME);
writel            402 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
writel            407 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
writel            412 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMICLKSEL);
writel            431 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
writel            436 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
writel            457 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
writel            464 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
writel            470 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
writel            562 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
writel            580 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
writel            605 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(PHYREG0_CR_DATA_IN(addr),
writel            613 drivers/phy/samsung/phy-exynos5-usbdrd.c 	writel(PHYREG0_CR_DATA_IN(data),
writel             99 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
writel            105 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
writel            109 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
writel            113 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
writel            117 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
writel            122 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
writel            126 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_CTRL0);
writel            130 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_MODE0);
writel            139 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
writel            143 drivers/phy/samsung/phy-exynos5250-sata.c 	writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
writel            230 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(otg, drv->reg_phy + EXYNOS_5250_USBOTGSYS);
writel            236 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(otg, drv->reg_phy + EXYNOS_5250_USBOTGSYS);
writel            259 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
writel            263 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
writel            282 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(otg, drv->reg_phy + EXYNOS_5250_USBOTGSYS);
writel            292 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL1);
writel            293 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL2);
writel            296 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL1);
writel            297 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL2);
writel            308 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(ehci, drv->reg_phy + EXYNOS_5250_HOSTEHCICTRL);
writel            314 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(ohci, drv->reg_phy + EXYNOS_5250_HOSTOHCICTRL);
writel            338 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(otg, drv->reg_phy + EXYNOS_5250_USBOTGSYS);
writel            347 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
writel            357 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL1);
writel            358 drivers/phy/samsung/phy-exynos5250-usb2.c 		writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL2);
writel            130 drivers/phy/samsung/phy-s5pv210-usb2.c 		writel(drv->ref_reg_val, drv->reg_phy + S5PV210_UPHYCLK);
writel            134 drivers/phy/samsung/phy-s5pv210-usb2.c 		writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
writel            138 drivers/phy/samsung/phy-s5pv210-usb2.c 		writel(rst, drv->reg_phy + S5PV210_UPHYRST);
writel            141 drivers/phy/samsung/phy-s5pv210-usb2.c 		writel(rst, drv->reg_phy + S5PV210_UPHYRST);
writel            145 drivers/phy/samsung/phy-s5pv210-usb2.c 		writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
writel             61 drivers/phy/socionext/phy-uniphier-pcie.c 	writel(data, priv->base + PCL_PHY_TEST_I);
writel             99 drivers/phy/socionext/phy-uniphier-pcie.c 	writel(val, priv->base + PCL_PHY_RESET);
writel            108 drivers/phy/socionext/phy-uniphier-pcie.c 	writel(val, priv->base + PCL_PHY_RESET);
writel            183 drivers/phy/socionext/phy-uniphier-usb3hs.c 	writel(val, priv->base + HSPHY_CFG1);
writel            187 drivers/phy/socionext/phy-uniphier-usb3hs.c 	writel(val, priv->base + HSPHY_CFG1);
writel            193 drivers/phy/socionext/phy-uniphier-usb3hs.c 	writel(val, priv->base + HSPHY_CFG1);
writel            197 drivers/phy/socionext/phy-uniphier-usb3hs.c 	writel(val, priv->base + HSPHY_CFG1);
writel            273 drivers/phy/socionext/phy-uniphier-usb3hs.c 	writel(config0, priv->base + HSPHY_CFG0);
writel            274 drivers/phy/socionext/phy-uniphier-usb3hs.c 	writel(config1, priv->base + HSPHY_CFG1);
writel             71 drivers/phy/socionext/phy-uniphier-usb3ss.c 	writel(data, priv->base + SSPHY_TESTI);
writel            423 drivers/phy/tegra/xusb.h 	writel(value, padctl->regs + offset);
writel             49 drivers/phy/ti/phy-omap-control.c 	writel(val, control_phy->pcie_pcs);
writel            133 drivers/phy/ti/phy-omap-control.c 	writel(val, control_phy->power);
writel            151 drivers/phy/ti/phy-omap-control.c 	writel(val, ctrl_phy->otghs_control);
writel            170 drivers/phy/ti/phy-omap-control.c 	writel(val, ctrl_phy->otghs_control);
writel            188 drivers/phy/ti/phy-omap-control.c 	writel(val, ctrl_phy->otghs_control);
writel            243 drivers/pinctrl/bcm/pinctrl-bcm2835.c 	writel(val, pc->base + reg);
writel            823 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c 	writel(val, pinctrl->base0 + grp->mux.offset);
writel            864 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c 	writel(val, pinctrl->base1 + mux->offset);
writel            891 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c 	writel(val, pinctrl->base1 + mux->offset);
writel            151 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c 	writel(val, chip->base + offset);
writel            185 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c 			writel(BIT(bit), chip->base + (i * GPIO_BANK_SIZE) +
writel            206 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c 	writel(val, chip->base + offset);
writel            492 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c 		writel(val_1, base + IPROC_GPIO_PULL_UP_OFFSET);
writel            493 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c 		writel(val_2, base + IPROC_GPIO_PULL_DN_OFFSET);
writel            574 drivers/pinctrl/bcm/pinctrl-iproc-gpio.c 		writel(val, base + offset);
writel            630 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + grp->mux.offset));
writel            676 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
writel            722 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
writel            764 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
writel            813 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
writel            121 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 	writel(val, base_address + reg);
writel            163 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 			writel(BIT(bit), chip->base + NSP_GPIO_EVENT);
writel            411 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 		writel(val, chip->io_ctrl + offset);
writel            696 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 		writel(val, (chip->base + NSP_CHIP_A_INT_MASK));
writel            450 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 	writel(val, base_address);
writel            494 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 		writel(val, pinctrl->base0);
writel            516 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 		writel(val, pinctrl->base0);
writel            185 drivers/pinctrl/freescale/pinctrl-imx.c 		writel(reg, ipctl->base + pin_reg->mux_reg);
writel            189 drivers/pinctrl/freescale/pinctrl-imx.c 		writel(pin_mmio->mux_mode, ipctl->base + pin_reg->mux_reg);
writel            220 drivers/pinctrl/freescale/pinctrl-imx.c 		writel(val, ipctl->base + pin_mmio->input_reg);
writel            227 drivers/pinctrl/freescale/pinctrl-imx.c 			writel(pin_mmio->input_val, ipctl->input_sel_base +
writel            230 drivers/pinctrl/freescale/pinctrl-imx.c 			writel(pin_mmio->input_val, ipctl->base +
writel            405 drivers/pinctrl/freescale/pinctrl-imx.c 			writel(reg, ipctl->base + pin_reg->conf_reg);
writel            409 drivers/pinctrl/freescale/pinctrl-imx.c 			writel(configs[i], ipctl->base + pin_reg->conf_reg);
writel            109 drivers/pinctrl/freescale/pinctrl-imx1-core.c 	writel(new_val, reg);
writel            129 drivers/pinctrl/freescale/pinctrl-imx1-core.c 	writel(new_val, reg);
writel            279 drivers/pinctrl/freescale/pinctrl-imx7ulp.c 	writel(reg, ipctl->base + pin_reg->mux_reg);
writel            197 drivers/pinctrl/freescale/pinctrl-mxs.c 	writel(tmp, reg);
writel            291 drivers/pinctrl/freescale/pinctrl-mxs.c 					writel(1 << shift, reg + SET);
writel            293 drivers/pinctrl/freescale/pinctrl-mxs.c 					writel(1 << shift, reg + CLR);
writel            302 drivers/pinctrl/freescale/pinctrl-mxs.c 					writel(1 << shift, reg + SET);
writel            304 drivers/pinctrl/freescale/pinctrl-mxs.c 					writel(1 << shift, reg + CLR);
writel            311 drivers/pinctrl/freescale/pinctrl-vf610.c 	writel(reg, ipctl->base + pin_reg->mux_reg);
writel            679 drivers/pinctrl/intel/pinctrl-baytrail.c 		writel(value, padcfg0);
writel            709 drivers/pinctrl/intel/pinctrl-baytrail.c 		writel(value, padcfg0);
writel            762 drivers/pinctrl/intel/pinctrl-baytrail.c 	writel(value, reg);
writel            791 drivers/pinctrl/intel/pinctrl-baytrail.c 		writel(value, reg);
writel            840 drivers/pinctrl/intel/pinctrl-baytrail.c 	writel(value, val_reg);
writel           1020 drivers/pinctrl/intel/pinctrl-baytrail.c 				writel(val, val_reg);
writel           1042 drivers/pinctrl/intel/pinctrl-baytrail.c 				writel(val, val_reg);
writel           1091 drivers/pinctrl/intel/pinctrl-baytrail.c 				writel(debounce, db_reg);
writel           1102 drivers/pinctrl/intel/pinctrl-baytrail.c 		writel(conf, conf_reg);
writel           1149 drivers/pinctrl/intel/pinctrl-baytrail.c 		writel(old_val | BYT_LEVEL, reg);
writel           1151 drivers/pinctrl/intel/pinctrl-baytrail.c 		writel(old_val & ~BYT_LEVEL, reg);
writel           1316 drivers/pinctrl/intel/pinctrl-baytrail.c 	writel(BIT(offset % 32), reg);
writel           1362 drivers/pinctrl/intel/pinctrl-baytrail.c 	writel(value, reg);
writel           1393 drivers/pinctrl/intel/pinctrl-baytrail.c 	writel(value, reg);
writel           1506 drivers/pinctrl/intel/pinctrl-baytrail.c 		writel(0xffffffff, reg);
writel           1717 drivers/pinctrl/intel/pinctrl-baytrail.c 			writel(value, reg);
writel           1730 drivers/pinctrl/intel/pinctrl-baytrail.c 				writel(v, reg);
writel            680 drivers/pinctrl/intel/pinctrl-cherryview.c 	writel(value, reg);
writel            439 drivers/pinctrl/intel/pinctrl-intel.c 		writel(value, padcfg0);
writel            459 drivers/pinctrl/intel/pinctrl-intel.c 	writel(value, padcfg0);
writel            476 drivers/pinctrl/intel/pinctrl-intel.c 	writel(value, padcfg0);
writel            709 drivers/pinctrl/intel/pinctrl-intel.c 		writel(value, padcfg1);
writel            754 drivers/pinctrl/intel/pinctrl-intel.c 	writel(value0, padcfg0);
writel            755 drivers/pinctrl/intel/pinctrl-intel.c 	writel(value2, padcfg2);
writel            923 drivers/pinctrl/intel/pinctrl-intel.c 	writel(padcfg0, reg);
writel            991 drivers/pinctrl/intel/pinctrl-intel.c 		writel(BIT(gpp_offset), community->regs + is_offset);
writel           1020 drivers/pinctrl/intel/pinctrl-intel.c 		writel(BIT(gpp_offset), is);
writel           1027 drivers/pinctrl/intel/pinctrl-intel.c 		writel(value, reg);
writel           1087 drivers/pinctrl/intel/pinctrl-intel.c 	writel(value, reg);
writel           1579 drivers/pinctrl/intel/pinctrl-intel.c 			writel(0, base + community->ie_offset + gpp * 4);
writel           1580 drivers/pinctrl/intel/pinctrl-intel.c 			writel(0xffff, base + community->is_offset + gpp * 4);
writel           1605 drivers/pinctrl/intel/pinctrl-intel.c 	writel(updated, hostown);
writel           1632 drivers/pinctrl/intel/pinctrl-intel.c 			writel(pads[i].padcfg0, padcfg);
writel           1640 drivers/pinctrl/intel/pinctrl-intel.c 			writel(pads[i].padcfg1, padcfg);
writel           1649 drivers/pinctrl/intel/pinctrl-intel.c 				writel(pads[i].padcfg2, padcfg);
writel           1664 drivers/pinctrl/intel/pinctrl-intel.c 			writel(communities[i].intmask[gpp], base + gpp * 4);
writel            504 drivers/pinctrl/intel/pinctrl-merrifield.c 	writel(value, bufcfg);
writel            100 drivers/pinctrl/mediatek/mtk-eint.c 		writel(mask, reg + reg_offset);
writel            118 drivers/pinctrl/mediatek/mtk-eint.c 	writel(mask, reg);
writel            130 drivers/pinctrl/mediatek/mtk-eint.c 	writel(mask, reg);
writel            153 drivers/pinctrl/mediatek/mtk-eint.c 	writel(mask, reg);
writel            177 drivers/pinctrl/mediatek/mtk-eint.c 		writel(mask, reg);
writel            180 drivers/pinctrl/mediatek/mtk-eint.c 		writel(mask, reg);
writel            185 drivers/pinctrl/mediatek/mtk-eint.c 		writel(mask, reg);
writel            188 drivers/pinctrl/mediatek/mtk-eint.c 		writel(mask, reg);
writel            284 drivers/pinctrl/mediatek/mtk-eint.c 		writel(0xffffffff, reg);
writel            303 drivers/pinctrl/mediatek/mtk-eint.c 		writel(rst, eint->base + ctrl_offset);
writel            346 drivers/pinctrl/mediatek/mtk-eint.c 				writel(BIT(offset), reg - eint->regs->stat +
writel            364 drivers/pinctrl/mediatek/mtk-eint.c 					writel(BIT(offset), reg -
writel            426 drivers/pinctrl/mediatek/mtk-eint.c 	writel(clr_bit, eint->base + clr_offset);
writel            431 drivers/pinctrl/mediatek/mtk-eint.c 	writel(rst | bit, eint->base + set_offset);
writel            522 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(d->mask, info->base + reg);
writel            536 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(val & ~d->mask, info->base + reg);
writel            550 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(val | d->mask, info->base + reg);
writel            568 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(val, info->base + reg);
writel            608 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(val, info->base + reg);
writel            638 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 		writel(p, info->base + IRQ_POL + 4 * reg_idx);
writel            682 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 					writel(1 << hwirq,
writel           1094 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(info->pm.irq_en_l, info->base + IRQ_EN);
writel           1095 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(info->pm.irq_en_h, info->base + IRQ_EN + sizeof(u32));
writel           1096 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(info->pm.irq_pol_l, info->base + IRQ_POL);
writel           1097 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c 	writel(info->pm.irq_pol_h, info->base + IRQ_POL + sizeof(u32));
writel            563 drivers/pinctrl/mvebu/pinctrl-armada-xp.c 		writel(mpp_saved_regs[i], soc->control_data[0].base + i * 4);
writel             90 drivers/pinctrl/mvebu/pinctrl-dove.c 		writel(pmu & ~BIT(pid), data->base + PMU_MPP_GENERAL_CTRL);
writel             94 drivers/pinctrl/mvebu/pinctrl-dove.c 	writel(pmu | BIT(pid), data->base + PMU_MPP_GENERAL_CTRL);
writel             98 drivers/pinctrl/mvebu/pinctrl-dove.c 	writel(func, pmu_base + PMU_SIGNAL_SELECT_0 + off);
writel            164 drivers/pinctrl/mvebu/pinctrl-dove.c 	writel(mpp4, mpp4_base);
writel            207 drivers/pinctrl/mvebu/pinctrl-dove.c 	writel(pmu, data->base + PMU_MPP_GENERAL_CTRL);
writel            251 drivers/pinctrl/mvebu/pinctrl-dove.c 	writel(mpp4, mpp4_base);
writel             77 drivers/pinctrl/mvebu/pinctrl-mvebu.c 	writel(reg | (config << shift), data->base + off);
writel             54 drivers/pinctrl/mvebu/pinctrl-orion.c 		writel(reg | (config << shift), mpp_base + off);
writel             58 drivers/pinctrl/mvebu/pinctrl-orion.c 		writel(reg | (config << shift), high_mpp_base);
writel            300 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
writel            301 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
writel            314 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
writel            330 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
writel            334 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS);
writel            337 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC);
writel            361 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC);
writel            368 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS);
writel            370 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC);
writel            376 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRS);
writel            391 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
writel            392 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
writel            402 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
writel            403 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
writel            443 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(val, reg);
writel            558 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(temp, chip->addr + NMK_GPIO_SLPC);
writel            572 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
writel            618 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
writel            654 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(*rimscval, nmk_chip->addr + rimscreg);
writel            661 drivers/pinctrl/nomadik/pinctrl-nomadik.c 		writel(*fimscval, nmk_chip->addr + fimscreg);
writel            866 drivers/pinctrl/nomadik/pinctrl-nomadik.c 	writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC);
writel             61 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + offset * 4);
writel             81 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + offset * 4);
writel            112 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + offset * 4);
writel            175 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + offset * 4);
writel            352 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
writel            367 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
writel            381 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
writel            395 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
writel            409 drivers/pinctrl/pinctrl-amd.c 	writel(reg, gpio_dev->base + WAKE_INT_MASTER_REG);
writel            504 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg_irq_en, gpio_dev->base + (d->hwirq)*4);
writel            507 drivers/pinctrl/pinctrl-amd.c 	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
writel            588 drivers/pinctrl/pinctrl-amd.c 			writel(regval, regs + i);
writel            598 drivers/pinctrl/pinctrl-amd.c 	writel(regval, gpio_dev->base + WAKE_INT_MASTER_REG);
writel            730 drivers/pinctrl/pinctrl-amd.c 		writel(pin_reg, gpio_dev->base + pin*4);
writel            829 drivers/pinctrl/pinctrl-amd.c 		writel(gpio_dev->saved_regs[i], gpio_dev->base + pin*4);
writel            687 drivers/pinctrl/pinctrl-artpec6.c 		writel(regval, pmx->base + reg);
writel            827 drivers/pinctrl/pinctrl-artpec6.c 			writel(regval, reg);
writel            840 drivers/pinctrl/pinctrl-artpec6.c 			writel(regval, reg);
writel            853 drivers/pinctrl/pinctrl-artpec6.c 			writel(regval, reg);
writel            867 drivers/pinctrl/pinctrl-artpec6.c 			writel(regval, reg);
writel            228 drivers/pinctrl/pinctrl-coh901.c 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));
writel            230 drivers/pinctrl/pinctrl-coh901.c 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));
writel            245 drivers/pinctrl/pinctrl-coh901.c 	writel(val, U300_PIN_REG(offset, pcr));
writel            272 drivers/pinctrl/pinctrl-coh901.c 		writel(val, U300_PIN_REG(offset, pcr));
writel            351 drivers/pinctrl/pinctrl-coh901.c 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
writel            355 drivers/pinctrl/pinctrl-coh901.c 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
writel            363 drivers/pinctrl/pinctrl-coh901.c 		writel(val, U300_PIN_REG(offset, pcr));
writel            371 drivers/pinctrl/pinctrl-coh901.c 		writel(val, U300_PIN_REG(offset, pcr));
writel            379 drivers/pinctrl/pinctrl-coh901.c 		writel(val, U300_PIN_REG(offset, pcr));
writel            409 drivers/pinctrl/pinctrl-coh901.c 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
writel            414 drivers/pinctrl/pinctrl-coh901.c 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
writel            444 drivers/pinctrl/pinctrl-coh901.c 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
writel            450 drivers/pinctrl/pinctrl-coh901.c 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
writel            470 drivers/pinctrl/pinctrl-coh901.c 	writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
writel            484 drivers/pinctrl/pinctrl-coh901.c 	writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
writel            512 drivers/pinctrl/pinctrl-coh901.c 	writel(val, U300_PIN_REG(pinoffset, iev));
writel            671 drivers/pinctrl/pinctrl-coh901.c 	writel(U300_GPIO_CR_BLOCK_CLKRQ_ENABLE,
writel            710 drivers/pinctrl/pinctrl-coh901.c 		writel(0x0, gpio->base + portno * gpio->stride + ifr);
writel            745 drivers/pinctrl/pinctrl-coh901.c 	writel(0x00000000U, gpio->base + U300_GPIO_CR);
writel            133 drivers/pinctrl/pinctrl-da850-pupd.c 	writel(sel, data->base + DA850_PUPD_SEL);
writel            134 drivers/pinctrl/pinctrl-da850-pupd.c 	writel(ena, data->base + DA850_PUPD_ENA);
writel           1002 drivers/pinctrl/pinctrl-lpc18xx.c 	writel(reg_val, scu->base + reg_offset);
writel           1117 drivers/pinctrl/pinctrl-lpc18xx.c 	writel(reg, scu->base + pin_cap->offset);
writel           1178 drivers/pinctrl/pinctrl-lpc18xx.c 		writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset);
writel           1187 drivers/pinctrl/pinctrl-lpc18xx.c 		writel(reg, scu->base + offset);
writel           1193 drivers/pinctrl/pinctrl-lpc18xx.c 		writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset);
writel           1197 drivers/pinctrl/pinctrl-lpc18xx.c 		writel(reg, scu->base + LPC18XX_SCU_REG_ENAIO2);
writel           1212 drivers/pinctrl/pinctrl-lpc18xx.c 	writel(reg | func, scu->base + pin->offset);
writel            987 drivers/pinctrl/pinctrl-oxnas.c 	writel(mask, bank->reg_base + IRQ_PENDING);
writel            998 drivers/pinctrl/pinctrl-oxnas.c 		writel(readl(bank->reg_base + RE_IRQ_ENABLE) & ~mask,
writel           1002 drivers/pinctrl/pinctrl-oxnas.c 		writel(readl(bank->reg_base + FE_IRQ_ENABLE) & ~mask,
writel           1014 drivers/pinctrl/pinctrl-oxnas.c 		writel(readl(bank->reg_base + RE_IRQ_ENABLE) | mask,
writel           1018 drivers/pinctrl/pinctrl-oxnas.c 		writel(readl(bank->reg_base + FE_IRQ_ENABLE) | mask,
writel           1784 drivers/pinctrl/pinctrl-pic32.c 			writel(functions->muxval, pctl->reg_base + functions->muxreg);
writel           1808 drivers/pinctrl/pinctrl-pic32.c 	writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG));
writel           1819 drivers/pinctrl/pinctrl-pic32.c 	writel(mask, bank->reg_base + PIC32_SET(TRIS_REG));
writel           1838 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_SET(PORT_REG));
writel           1840 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_CLR(PORT_REG));
writel           1850 drivers/pinctrl/pinctrl-pic32.c 	writel(mask, bank->reg_base + PIC32_CLR(TRIS_REG));
writel           1940 drivers/pinctrl/pinctrl-pic32.c 			writel(mask, bank->reg_base +PIC32_SET(CNPU_REG));
writel           1944 drivers/pinctrl/pinctrl-pic32.c 			writel(mask, bank->reg_base + PIC32_SET(CNPD_REG));
writel           1948 drivers/pinctrl/pinctrl-pic32.c 			writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG));
writel           1952 drivers/pinctrl/pinctrl-pic32.c 			writel(mask, bank->reg_base + PIC32_SET(ANSEL_REG));
writel           1956 drivers/pinctrl/pinctrl-pic32.c 			writel(mask, bank->reg_base + PIC32_SET(ODCU_REG));
writel           2000 drivers/pinctrl/pinctrl-pic32.c 	writel(0, bank->reg_base + CNF_REG);
writel           2007 drivers/pinctrl/pinctrl-pic32.c 	writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_CLR(CNCON_REG));
writel           2014 drivers/pinctrl/pinctrl-pic32.c 	writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_SET(CNCON_REG));
writel           2035 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_SET(CNEN_REG));
writel           2037 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_CLR(CNNE_REG));
writel           2039 drivers/pinctrl/pinctrl-pic32.c 		writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG));
writel           2043 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_CLR(CNEN_REG));
writel           2045 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_SET(CNNE_REG));
writel           2047 drivers/pinctrl/pinctrl-pic32.c 		writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG));
writel           2051 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_SET(CNEN_REG));
writel           2053 drivers/pinctrl/pinctrl-pic32.c 		writel(mask, bank->reg_base + PIC32_SET(CNNE_REG));
writel           2055 drivers/pinctrl/pinctrl-pic32.c 		writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG));
writel            838 drivers/pinctrl/pinctrl-pistachio.c 	writel(val, pctl->base + reg);
writel            854 drivers/pinctrl/pinctrl-pistachio.c 	writel(val, bank->base + reg);
writel           2704 drivers/pinctrl/pinctrl-rockchip.c 	writel(data, reg);
writel           2765 drivers/pinctrl/pinctrl-rockchip.c 	writel(data, reg);
writel           2879 drivers/pinctrl/pinctrl-rockchip.c 				writel(polarity,
writel            185 drivers/pinctrl/pinctrl-rzn1.c 		writel(val, &ipctl->lev1->status_protect);
writel            191 drivers/pinctrl/pinctrl-rzn1.c 		writel(val, &ipctl->lev2->status_protect);
writel            204 drivers/pinctrl/pinctrl-rzn1.c 	writel(func, &ipctl->lev2->l2_mdio[mdio]);
writel            275 drivers/pinctrl/pinctrl-rzn1.c 		writel(l1, &ipctl->lev1->conf[pin]);
writel            276 drivers/pinctrl/pinctrl-rzn1.c 		writel(l2, &ipctl->lev2->conf[pin]);
writel            612 drivers/pinctrl/pinctrl-rzn1.c 		writel(l1, &ipctl->lev1->conf[pin]);
writel            267 drivers/pinctrl/pinctrl-single.c 	writel(val, reg);
writel            669 drivers/pinctrl/pinctrl-st.c 		writel(BIT(offset), bank->base + REG_PIO_SET_POUT);
writel            671 drivers/pinctrl/pinctrl-st.c 		writel(BIT(offset), bank->base + REG_PIO_CLR_POUT);
writel            698 drivers/pinctrl/pinctrl-st.c 			writel(BIT(offset), bank->base + REG_PIO_SET_PC(i));
writel            700 drivers/pinctrl/pinctrl-st.c 			writel(BIT(offset), bank->base + REG_PIO_CLR_PC(i));
writel           1282 drivers/pinctrl/pinctrl-st.c 	writel(BIT(d->hwirq), bank->base + REG_PIO_CLR_PMASK);
writel           1290 drivers/pinctrl/pinctrl-st.c 	writel(BIT(d->hwirq), bank->base + REG_PIO_SET_PMASK);
writel           1350 drivers/pinctrl/pinctrl-st.c 	writel(val, bank->base + REG_PIO_PCOMP);
writel           1407 drivers/pinctrl/pinctrl-st.c 				writel(BIT(n),
writel             78 drivers/pinctrl/qcom/pinctrl-msm.c 	writel(val, pctrl->regs[g->tile] + g->name##_reg); \
writel           1077 drivers/pinctrl/qcom/pinctrl-msm.c 	writel(0, pctrl->regs[0] + PS_HOLD_OFFSET);
writel             63 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(mask, bank->eint_base + reg_mask);
writel             75 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(1 << irqd->hwirq, bank->eint_base + reg_pend);
writel            102 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(mask, bank->eint_base + reg_mask);
writel            145 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(con, bank->eint_base + reg_con);
writel            175 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(con, bank->pctl_base + reg_con);
writel            198 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(con, bank->pctl_base + reg_con);
writel            657 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(save->eint_con, regs + EXYNOS_GPIO_ECON_OFFSET
writel            659 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(save->eint_fltcon0, regs + EXYNOS_GPIO_EFLTCON_OFFSET
writel            661 drivers/pinctrl/samsung/pinctrl-exynos.c 	writel(save->eint_fltcon1, regs + EXYNOS_GPIO_EFLTCON_OFFSET
writel            158 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(val, reg);
writel            188 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(val, reg);
writel            260 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(bitval, d->virt_base + EINTPEND_REG);
writel            271 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(mask, d->virt_base + EINTMASK_REG);
writel            282 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(mask, d->virt_base + EINTMASK_REG);
writel            320 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(1UL << index, d->virt_base + EINTPEND_REG);
writel            332 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(mask, d->virt_base + EINTMASK_REG);
writel            344 drivers/pinctrl/samsung/pinctrl-s3c24xx.c 	writel(mask, d->virt_base + EINTMASK_REG);
writel            294 drivers/pinctrl/samsung/pinctrl-s3c64xx.c 	writel(val, reg);
writel            316 drivers/pinctrl/samsung/pinctrl-s3c64xx.c 	writel(val, reg);
writel            336 drivers/pinctrl/samsung/pinctrl-s3c64xx.c 	writel(1 << index, reg);
writel            364 drivers/pinctrl/samsung/pinctrl-s3c64xx.c 	writel(val, reg);
writel            522 drivers/pinctrl/samsung/pinctrl-s3c64xx.c 	writel(val, d->virt_base + EINT0MASK_REG);
writel            541 drivers/pinctrl/samsung/pinctrl-s3c64xx.c 	writel(1 << ddata->eints[irqd->hwirq],
writel            576 drivers/pinctrl/samsung/pinctrl-s3c64xx.c 	writel(val, reg);
writel            408 drivers/pinctrl/samsung/pinctrl-samsung.c 	writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
writel            464 drivers/pinctrl/samsung/pinctrl-samsung.c 		writel(data, reg_base + cfg_reg);
writel            555 drivers/pinctrl/samsung/pinctrl-samsung.c 	writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
writel            617 drivers/pinctrl/samsung/pinctrl-samsung.c 	writel(data, reg);
writel           1225 drivers/pinctrl/samsung/pinctrl-samsung.c 			writel(bank->pm_save[PINCFG_TYPE_NUM],
writel           1234 drivers/pinctrl/samsung/pinctrl-samsung.c 				writel(bank->pm_save[type], reg + offs[type]);
writel           4972 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DI_MASK << mux->dinput_bit,
writel           4974 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DI_DISABLE << mux->dinput_bit,
writel           4978 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DIV_MASK << mux->dinput_val_bit,
writel           4980 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DIV_DISABLE << mux->dinput_val_bit,
writel           4990 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DI_MASK << mux->dinput_bit,
writel           4992 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DI_ENABLE << mux->dinput_bit,
writel           4995 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DIV_MASK << mux->dinput_val_bit,
writel           4997 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(DIV_ENABLE << mux->dinput_val_bit,
writel           5009 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(ANA_CLEAR_MASK << conf->ad_ctrl_bit,
writel           5015 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(regv | (ad_sel << conf->ad_ctrl_bit),
writel           5079 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(FUNC_CLEAR_MASK << conf->mux_bit,
writel           5085 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(regv | (func << conf->mux_bit),
writel           5114 drivers/pinctrl/sirf/pinctrl-atlas7.c 			writel(1, pmx->sys2pci_base + SYS2PCI_SDIO9SEL);
writel           5116 drivers/pinctrl/sirf/pinctrl-atlas7.c 			writel(0, pmx->sys2pci_base + SYS2PCI_SDIO9SEL);
writel           5179 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(pull_info->mask << conf->pupd_bit, CLR_REG(pull_sel_reg));
writel           5180 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(regv << conf->pupd_bit, pull_sel_reg);
writel           5203 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(ds_info->imval << conf->drvstr_bit, CLR_REG(ds_sel_reg));
writel           5204 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(sel << conf->drvstr_bit, ds_sel_reg);
writel           5568 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(~0, pmx->regs[BANK_DS] +
writel           5570 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(pmx->status_ds[idx], pmx->regs[BANK_DS] +
writel           5572 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(~0, pmx->regs[BANK_DS] +
writel           5574 drivers/pinctrl/sirf/pinctrl-atlas7.c 		writel(pmx->status_dsv[idx], pmx->regs[BANK_DS] +
writel           5651 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(val, ctrl_reg);
writel           5669 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(val, ctrl_reg);
writel           5703 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(val, ctrl_reg);
writel           5763 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(val, ctrl_reg);
writel           5843 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(val, ctrl_reg);
writel           5924 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(out_ctrl, ctrl_reg);
writel           5982 drivers/pinctrl/sirf/pinctrl-atlas7.c 	writel(ctrl, ctrl_reg);
writel           6129 drivers/pinctrl/sirf/pinctrl-atlas7.c 			writel(bank->sleep_data[pin], ctrl_reg);
writel            163 drivers/pinctrl/sirf/pinctrl-sirf.c 		writel(muxval, spmx->gpio_virtbase +
writel            174 drivers/pinctrl/sirf/pinctrl-sirf.c 		writel(func_en_val, spmx->rsc_virtbase + mux->ctrlreg);
writel            225 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(muxval, spmx->gpio_virtbase +
writel            368 drivers/pinctrl/sirf/pinctrl-sirf.c 			writel(spmx->gpio_regs[i][j], spmx->gpio_virtbase +
writel            371 drivers/pinctrl/sirf/pinctrl-sirf.c 		writel(spmx->ints_regs[i], spmx->gpio_virtbase +
writel            373 drivers/pinctrl/sirf/pinctrl-sirf.c 		writel(spmx->paden_regs[i], spmx->gpio_virtbase +
writel            376 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(spmx->dspen_regs, spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
writel            379 drivers/pinctrl/sirf/pinctrl-sirf.c 		writel(spmx->rsc_regs[i], spmx->rsc_virtbase + 4 * i);
writel            435 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(val, sgpio->chip.regs + offset);
writel            454 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(val, sgpio->chip.regs + offset);
writel            484 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(val, sgpio->chip.regs + offset);
writel            535 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(val, sgpio->chip.regs + offset);
writel            607 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(val, sgpio->chip.regs + ctrl_offset);
writel            686 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(out_ctrl, sgpio->chip.regs + offset);
writel            742 drivers/pinctrl/sirf/pinctrl-sirf.c 	writel(ctrl, sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));
writel            759 drivers/pinctrl/sirf/pinctrl-sirf.c 			writel(val, sgpio->chip.regs + offset);
writel            776 drivers/pinctrl/sirf/pinctrl-sirf.c 			writel(val, sgpio->chip.regs + offset);
writel            423 drivers/pinctrl/sprd/pinctrl-sprd.c 		writel(reg, (void __iomem *)pin->reg);
writel            692 drivers/pinctrl/sprd/pinctrl-sprd.c 			writel(reg, (void __iomem *)pin->reg);
writel            697 drivers/pinctrl/sprd/pinctrl-sprd.c 			writel(reg, (void __iomem *)pin->reg);
writel            588 drivers/pinctrl/sunxi/pinctrl-sunxi.c 		writel(reg | val << shift, pctl->membase + offset);
writel            654 drivers/pinctrl/sunxi/pinctrl-sunxi.c 		writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin));
writel            662 drivers/pinctrl/sunxi/pinctrl-sunxi.c 		writel(reg | val << bank, pctl->membase + PIO_POW_MOD_SEL_REG);
writel            711 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	writel((val & ~mask) | config << sunxi_mux_offset(pin),
writel            879 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	writel(regval, pctl->membase + reg);
writel           1004 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	writel(regval | (mode << index), pctl->membase + reg);
writel           1018 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	writel(1 << status_idx, pctl->membase + status_reg);
writel           1033 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	writel(val & ~(1 << idx), pctl->membase + reg);
writel           1050 drivers/pinctrl/sunxi/pinctrl-sunxi.c 	writel(val | (1 << idx), pctl->membase + reg);
writel           1371 drivers/pinctrl/sunxi/pinctrl-sunxi.c 		writel(src | div << 4,
writel           1550 drivers/pinctrl/sunxi/pinctrl-sunxi.c 		writel(0, pctl->membase +
writel           1552 drivers/pinctrl/sunxi/pinctrl-sunxi.c 		writel(0xffffffff,
writel             96 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c 	writel(value, padctl->regs + offset);
writel            111 drivers/pinctrl/zte/pinctrl-zx.c 			writel(val, zpctl->aux_base + aoffset);
writel            120 drivers/pinctrl/zte/pinctrl-zx.c 			writel(val, zpctl->base + offset);
writel            129 drivers/pinctrl/zte/pinctrl-zx.c 			writel(val, zpctl->aux_base + aoffset);
writel            140 drivers/pinctrl/zte/pinctrl-zx.c 		writel(val, zpctl->base + offset);
writel            254 drivers/pinctrl/zte/pinctrl-zx.c 	writel(val, zpctl->aux_base + data->coffset);
writel            227 drivers/platform/goldfish/goldfish_pipe.c 	writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);
writel            816 drivers/platform/goldfish/goldfish_pipe.c 	writel(upper_32_bits(paddr), porth);
writel            817 drivers/platform/goldfish/goldfish_pipe.c 	writel(lower_32_bits(paddr), portl);
writel            873 drivers/platform/goldfish/goldfish_pipe.c 	writel(MAX_SIGNALLED_PIPES,
writel            929 drivers/platform/goldfish/goldfish_pipe.c 	writel(PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION);
writel            235 drivers/platform/x86/intel_ips.c #define thm_writel(off, val) writel((val), ips->regmap + (off))
writel            381 drivers/platform/x86/intel_pmc_core.c 	writel(val, pmcdev->regbase + reg_offset);
writel            174 drivers/platform/x86/intel_pmc_ipc.c 	writel(cmd, ipcdev.ipc_base + IPC_CMD);
writel            184 drivers/platform/x86/intel_pmc_ipc.c 	writel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset);
writel            293 drivers/platform/x86/intel_pmc_ipc.c 	writel(data, ipcdev.gcr_mem_base + offset);
writel            328 drivers/platform/x86/intel_pmc_ipc.c 	writel(new_val, ipcdev.gcr_mem_base + offset);
writel            456 drivers/platform/x86/intel_pmc_ipc.c 	writel(dptr, ipcdev.ipc_base + IPC_DPTR);
writel            457 drivers/platform/x86/intel_pmc_ipc.c 	writel(sptr, ipcdev.ipc_base + IPC_SPTR);
writel            501 drivers/platform/x86/intel_pmc_ipc.c 		writel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS);
writel             59 drivers/platform/x86/intel_punit_ipc.c 	writel(cmd, ipcdev->base[type][BASE_IFACE]);
writel             74 drivers/platform/x86/intel_punit_ipc.c 	writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
writel             79 drivers/platform/x86/intel_punit_ipc.c 	writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
writel            123 drivers/platform/x86/intel_scu_ipc.c 	writel(cmd | IPC_IOC, scu->ipc_base);
writel            134 drivers/platform/x86/intel_scu_ipc.c 	writel(data, scu->ipc_base + 0x80 + offset);
writel            524 drivers/platform/x86/intel_scu_ipc.c 	writel(dptr, scu->ipc_base + IPC_DPTR);
writel            525 drivers/platform/x86/intel_scu_ipc.c 	writel(sptr, scu->ipc_base + IPC_SPTR);
writel            579 drivers/platform/x86/intel_scu_ipc.c 		writel(addr, scu->i2c_base + IPC_I2C_CNTRL_ADDR);
writel            584 drivers/platform/x86/intel_scu_ipc.c 		writel(*data, scu->i2c_base + I2C_DATA_ADDR);
writel            586 drivers/platform/x86/intel_scu_ipc.c 		writel(addr, scu->i2c_base + IPC_I2C_CNTRL_ADDR);
writel            611 drivers/platform/x86/intel_scu_ipc.c 	writel(status | IPC_STATUS_IRQ, scu->ipc_base + IPC_STATUS);
writel             62 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c 		writel(io_reg->value, punit_dev->punit_mmio+io_reg->reg);
writel            154 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c 		writel(punit_dev->range_0[i], punit_dev->punit_mmio +
writel            157 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c 		writel(punit_dev->range_1[i], punit_dev->punit_mmio +
writel            210 drivers/platform/x86/pmc_atom.c 	writel(val, pmc->regmap + reg_offset);
writel            422 drivers/platform/x86/samsung-laptop.c 		writel(in->d0, samsung->sabi_iface + SABI_IFACE_DATA);
writel            423 drivers/platform/x86/samsung-laptop.c 		writel(in->d1, samsung->sabi_iface + SABI_IFACE_DATA + 4);
writel            149 drivers/power/reset/at91-poweroff.c 	writel(wakeup_mode | mode, at91_shdwc.shdwc_base + AT91_SHDW_MR);
writel            134 drivers/power/reset/at91-reset.c 	writel(cpu_to_le32(AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST),
writel            143 drivers/power/reset/at91-reset.c 	writel(cpu_to_le32(AT91_RSTC_KEY | AT91_RSTC_PROCRST),
writel            236 drivers/power/reset/at91-sama5d2_shdwc.c 	writel(mode, shdw->shdwc_base + AT91_SHDW_MR);
writel            239 drivers/power/reset/at91-sama5d2_shdwc.c 	writel(input, shdw->shdwc_base + AT91_SHDW_WUIR);
writel            372 drivers/power/reset/at91-sama5d2_shdwc.c 	writel(0, shdw->shdwc_base + AT91_SHDW_MR);
writel            373 drivers/power/reset/at91-sama5d2_shdwc.c 	writel(0, shdw->shdwc_base + AT91_SHDW_WUIR);
writel             36 drivers/power/reset/brcm-kona-reset.c 	writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
writel             39 drivers/power/reset/brcm-kona-reset.c 	writel(0, kona_reset_base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
writel             44 drivers/power/reset/gemini-poweroff.c 	writel(val, gpw->base + GEMINI_PWC_CTRLREG);
writel             84 drivers/power/reset/gemini-poweroff.c 	writel(val, gpw->base + GEMINI_PWC_CTRLREG);
writel             88 drivers/power/reset/gemini-poweroff.c 	writel(val, gpw->base + GEMINI_PWC_CTRLREG);
writel            131 drivers/power/reset/gemini-poweroff.c 	writel(val, gpw->base + GEMINI_PWC_CTRLREG);
writel            136 drivers/power/reset/gemini-poweroff.c 	writel(val, gpw->base + GEMINI_PWC_CTRLREG);
writel            146 drivers/power/reset/gemini-poweroff.c 	writel(val, gpw->base + GEMINI_PWC_CTRLREG);
writel             20 drivers/power/reset/msm-poweroff.c 	writel(0, msm_ps_hold);
writel             52 drivers/power/reset/ocelot-reset.c 	writel(SOFT_CHIP_RST, ctx->base);
writel             61 drivers/power/reset/qnap-poweroff.c 	writel(0x83, UART1_REG(LCR));
writel             62 drivers/power/reset/qnap-poweroff.c 	writel(divisor & 0xff, UART1_REG(DLL));
writel             63 drivers/power/reset/qnap-poweroff.c 	writel((divisor >> 8) & 0xff, UART1_REG(DLM));
writel             64 drivers/power/reset/qnap-poweroff.c 	writel(0x03, UART1_REG(LCR));
writel             65 drivers/power/reset/qnap-poweroff.c 	writel(0x00, UART1_REG(IER));
writel             66 drivers/power/reset/qnap-poweroff.c 	writel(0x00, UART1_REG(FCR));
writel             67 drivers/power/reset/qnap-poweroff.c 	writel(0x00, UART1_REG(MCR));
writel             70 drivers/power/reset/qnap-poweroff.c 	writel(cfg->cmd, UART1_REG(TX));
writel             30 drivers/power/reset/rmobile-reset.c 	writel(RESCNT2_PRES, sysc_base2 + RESCNT2);
writel             38 drivers/power/reset/xgene-reboot.c 	writel(ctx->mask, ctx->csr);
writel             33 drivers/power/supply/goldfish_battery.c 	(writel(x, data->reg_base + addr))
writel             75 drivers/ptp/ptp_dte.c 	writel(0, (regs + DTE_NCO_LOW_TIME_REG));
writel             76 drivers/ptp/ptp_dte.c 	writel(sum2, (regs + DTE_NCO_TIME_REG));
writel             77 drivers/ptp/ptp_dte.c 	writel(sum3, (regs + DTE_NCO_OVERFLOW_REG));
writel            164 drivers/ptp/ptp_dte.c 	writel(nco_incr, ptp_dte->regs + DTE_NCO_INC_REG);
writel            203 drivers/ptp/ptp_dte.c 	writel(0, ptp_dte->regs + DTE_NCO_INC_REG);
writel            212 drivers/ptp/ptp_dte.c 	writel(DTE_NCO_INC_DEFAULT, ptp_dte->regs + DTE_NCO_INC_REG);
writel            280 drivers/ptp/ptp_dte.c 		writel(0, ptp_dte->regs + (i * sizeof(u32)));
writel            297 drivers/ptp/ptp_dte.c 	writel(0, ptp_dte->regs + DTE_NCO_INC_REG);
writel            309 drivers/ptp/ptp_dte.c 			writel(ptp_dte->reg_val[i],
writel            312 drivers/ptp/ptp_dte.c 			writel(((ptp_dte->reg_val[i] &
writel            487 drivers/pwm/pwm-atmel-tcb.c 		writel(chan->cmr, base + ATMEL_TC_REG(i, CMR));
writel            488 drivers/pwm/pwm-atmel-tcb.c 		writel(chan->ra, base + ATMEL_TC_REG(i, RA));
writel            489 drivers/pwm/pwm-atmel-tcb.c 		writel(chan->rb, base + ATMEL_TC_REG(i, RB));
writel            490 drivers/pwm/pwm-atmel-tcb.c 		writel(chan->rc, base + ATMEL_TC_REG(i, RC));
writel            492 drivers/pwm/pwm-atmel-tcb.c 			writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
writel             63 drivers/pwm/pwm-bcm-iproc.c 	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
writel             75 drivers/pwm/pwm-bcm-iproc.c 	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
writel            165 drivers/pwm/pwm-bcm-iproc.c 	writel(value, ip->base + IPROC_PWM_PRESCALE_OFFSET);
writel            168 drivers/pwm/pwm-bcm-iproc.c 	writel(period, ip->base + IPROC_PWM_PERIOD_OFFSET(pwm->hwpwm));
writel            169 drivers/pwm/pwm-bcm-iproc.c 	writel(duty, ip->base + IPROC_PWM_DUTY_CYCLE_OFFSET(pwm->hwpwm));
writel            179 drivers/pwm/pwm-bcm-iproc.c 	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
writel            240 drivers/pwm/pwm-bcm-iproc.c 	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
writel             89 drivers/pwm/pwm-bcm-kona.c 	writel(value, kp->base + PWM_CONTROL_OFFSET);
writel            105 drivers/pwm/pwm-bcm-kona.c 	writel(value, kp->base + PWM_CONTROL_OFFSET);
writel            164 drivers/pwm/pwm-bcm-kona.c 		writel(value, kp->base + PRESCALE_OFFSET);
writel            166 drivers/pwm/pwm-bcm-kona.c 		writel(pc, kp->base + PERIOD_COUNT_OFFSET(chan));
writel            168 drivers/pwm/pwm-bcm-kona.c 		writel(dc, kp->base + DUTY_CYCLE_HIGH_OFFSET(chan));
writel            199 drivers/pwm/pwm-bcm-kona.c 	writel(value, kp->base + PWM_CONTROL_OFFSET);
writel            238 drivers/pwm/pwm-bcm-kona.c 	writel(0, kp->base + DUTY_CYCLE_HIGH_OFFSET(chan));
writel            239 drivers/pwm/pwm-bcm-kona.c 	writel(0, kp->base + PERIOD_COUNT_OFFSET(chan));
writel            244 drivers/pwm/pwm-bcm-kona.c 	writel(value, kp->base + PRESCALE_OFFSET);
writel            302 drivers/pwm/pwm-bcm-kona.c 	writel(value, kp->base + PWM_CONTROL_OFFSET);
writel             46 drivers/pwm/pwm-bcm2835.c 	writel(value, pc->base + PWM_CONTROL);
writel             58 drivers/pwm/pwm-bcm2835.c 	writel(value, pc->base + PWM_CONTROL);
writel             80 drivers/pwm/pwm-bcm2835.c 	writel(DIV_ROUND_CLOSEST(duty_ns, scaler),
writel             82 drivers/pwm/pwm-bcm2835.c 	writel(period, pc->base + PERIOD(pwm->hwpwm));
writel             94 drivers/pwm/pwm-bcm2835.c 	writel(value, pc->base + PWM_CONTROL);
writel            106 drivers/pwm/pwm-bcm2835.c 	writel(value, pc->base + PWM_CONTROL);
writel            122 drivers/pwm/pwm-bcm2835.c 	writel(value, pc->base + PWM_CONTROL);
writel             38 drivers/pwm/pwm-clps711x.c 	writel(tmp, priv->pmpcon);
writel             80 drivers/pwm/pwm-hibvt.c 	writel(value, address);
writel             83 drivers/pwm/pwm-img.c 	writel(val, chip->base + reg);
writel            203 drivers/pwm/pwm-imx-tpm.c 		writel(val, tpm->base + PWM_IMX_TPM_SC);
writel            213 drivers/pwm/pwm-imx-tpm.c 		writel(p->mod, tpm->base + PWM_IMX_TPM_MOD);
writel            233 drivers/pwm/pwm-imx-tpm.c 		writel(p->val, tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm));
writel            272 drivers/pwm/pwm-imx-tpm.c 	writel(val, tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
writel            284 drivers/pwm/pwm-imx-tpm.c 		writel(val, tpm->base + PWM_IMX_TPM_SC);
writel             89 drivers/pwm/pwm-imx1.c 	writel(max - p, imx->mmio_base + MX1_PWMS);
writel            106 drivers/pwm/pwm-imx1.c 	writel(value, imx->mmio_base + MX1_PWMC);
writel            118 drivers/pwm/pwm-imx1.c 	writel(value, imx->mmio_base + MX1_PWMC);
writel            178 drivers/pwm/pwm-imx27.c 	writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);
writel            261 drivers/pwm/pwm-imx27.c 		writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
writel            262 drivers/pwm/pwm-imx27.c 		writel(period_cycles, imx->mmio_base + MX3_PWMPR);
writel            273 drivers/pwm/pwm-imx27.c 		writel(cr, imx->mmio_base + MX3_PWMCR);
writel            275 drivers/pwm/pwm-imx27.c 		writel(0, imx->mmio_base + MX3_PWMCR);
writel            115 drivers/pwm/pwm-lpc18xx-sct.c 	writel(val, lpc18xx_pwm->base + reg);
writel             57 drivers/pwm/pwm-lpc32xx.c 	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
writel             74 drivers/pwm/pwm-lpc32xx.c 	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
writel             86 drivers/pwm/pwm-lpc32xx.c 	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
writel            132 drivers/pwm/pwm-lpc32xx.c 	writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
writel             48 drivers/pwm/pwm-lpss.c 	writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
writel            269 drivers/pwm/pwm-lpss.c 		writel(lpwm->saved_ctrl[i], lpwm->regs + i * PWM_SIZE + PWM);
writel            117 drivers/pwm/pwm-mediatek.c 	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);
writel            183 drivers/pwm/pwm-mediatek.c 	writel(value, pc->regs);
writel            195 drivers/pwm/pwm-mediatek.c 	writel(value, pc->regs);
writel            240 drivers/pwm/pwm-meson.c 	writel(value, meson->base + REG_MISC_AB);
writel            244 drivers/pwm/pwm-meson.c 	writel(value, meson->base + channel_data->reg_offset);
writel            248 drivers/pwm/pwm-meson.c 	writel(value, meson->base + REG_MISC_AB);
writel            262 drivers/pwm/pwm-meson.c 	writel(value, meson->base + REG_MISC_AB);
writel             66 drivers/pwm/pwm-mtk-disp.c 	writel(value, address);
writel             80 drivers/pwm/pwm-mxs.c 	writel(duty_cycles << 16,
writel             82 drivers/pwm/pwm-mxs.c 	writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH |
writel            104 drivers/pwm/pwm-mxs.c 	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);
writel            113 drivers/pwm/pwm-mxs.c 	writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR);
writel             70 drivers/pwm/pwm-puv3.c 	writel(prescale, puv3->base + OST_PWM_PWCR);
writel             71 drivers/pwm/pwm-puv3.c 	writel(pv - dc, puv3->base + OST_PWM_DCCR);
writel             72 drivers/pwm/pwm-puv3.c 	writel(pv, puv3->base + OST_PWM_PCR);
writel             96 drivers/pwm/pwm-pxa.c 	writel(prescale, pc->mmio_base + offset + PWMCR);
writel             97 drivers/pwm/pwm-pxa.c 	writel(dc, pc->mmio_base + offset + PWMDCR);
writel             98 drivers/pwm/pwm-pxa.c 	writel(pv, pc->mmio_base + offset + PWMPCR);
writel             51 drivers/pwm/pwm-rcar.c 	writel(data, rp->base + offset);
writel            133 drivers/pwm/pwm-rockchip.c 	writel(period, pc->base + pc->data->regs.period);
writel            134 drivers/pwm/pwm-rockchip.c 	writel(duty, pc->base + pc->data->regs.duty);
writel            152 drivers/pwm/pwm-rockchip.c 	writel(ctrl, pc->base + pc->data->regs.ctrl);
writel            135 drivers/pwm/pwm-samsung.c 	writel(reg, pwm->base + REG_TCFG1);
writel            253 drivers/pwm/pwm-samsung.c 	writel(tcon, our_chip->base + REG_TCON);
writel            257 drivers/pwm/pwm-samsung.c 	writel(tcon, our_chip->base + REG_TCON);
writel            277 drivers/pwm/pwm-samsung.c 	writel(tcon, our_chip->base + REG_TCON);
writel            295 drivers/pwm/pwm-samsung.c 	writel(tcon, chip->base + REG_TCON);
writel            298 drivers/pwm/pwm-samsung.c 	writel(tcon, chip->base + REG_TCON);
writel            364 drivers/pwm/pwm-samsung.c 	writel(tcnt, our_chip->base + REG_TCNTB(pwm->hwpwm));
writel            365 drivers/pwm/pwm-samsung.c 	writel(tcmp, our_chip->base + REG_TCMPB(pwm->hwpwm));
writel            409 drivers/pwm/pwm-samsung.c 	writel(tcon, chip->base + REG_TCON);
writel            100 drivers/pwm/pwm-sifive.c 	writel(val, ddata->regs + PWM_SIFIVE_PWMCFG);
writel            197 drivers/pwm/pwm-sifive.c 	writel(frac, ddata->regs + PWM_SIFIVE_PWMCMP0 +
writel            102 drivers/pwm/pwm-sun4i.c 	writel(val, chip->base + offset);
writel             63 drivers/pwm/pwm-tegra.c 	writel(val, chip->regs + (num << 4));
writel             87 drivers/pwm/pwm-tiecap.c 		writel(duty_cycles, pc->mmio_base + CAP2);
writel             88 drivers/pwm/pwm-tiecap.c 		writel(period_cycles, pc->mmio_base + CAP1);
writel             95 drivers/pwm/pwm-tiecap.c 		writel(duty_cycles, pc->mmio_base + CAP4);
writel             96 drivers/pwm/pwm-tiecap.c 		writel(period_cycles, pc->mmio_base + CAP3);
writel            271 drivers/pwm/pwm-tiecap.c 	writel(pc->ctx.cap3, pc->mmio_base + CAP3);
writel            272 drivers/pwm/pwm-tiecap.c 	writel(pc->ctx.cap4, pc->mmio_base + CAP4);
writel            108 drivers/pwm/pwm-vt8500.c 	writel(prescale, vt8500->base + REG_SCALAR(pwm->hwpwm));
writel            111 drivers/pwm/pwm-vt8500.c 	writel(pv, vt8500->base + REG_PERIOD(pwm->hwpwm));
writel            114 drivers/pwm/pwm-vt8500.c 	writel(dc, vt8500->base + REG_DUTY(pwm->hwpwm));
writel            119 drivers/pwm/pwm-vt8500.c 	writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
writel            140 drivers/pwm/pwm-vt8500.c 	writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
writel            153 drivers/pwm/pwm-vt8500.c 	writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
writel            173 drivers/pwm/pwm-vt8500.c 	writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
writel             50 drivers/pwm/pwm-zx.c 	writel(value, zpc->base + (hwpwm + 1) * 0x10 + offset);
writel            136 drivers/regulator/ti-abb-regulator.c 	writel(val, reg);
writel            158 drivers/regulator/ti-abb-regulator.c 	writel(abb->txdone_mask, abb->int_base);
writel            236 drivers/regulator/ti-abb-regulator.c 	writel(val, abb->ldo_base);
writel            114 drivers/remoteproc/da8xx_remoteproc.c 		writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
writel            148 drivers/remoteproc/da8xx_remoteproc.c 	writel(rproc->bootaddr, drproc->bootreg);
writel            189 drivers/remoteproc/da8xx_remoteproc.c 	writel(SYSCFG_CHIPSIG2, drproc->chipsig);
writel            108 drivers/remoteproc/qcom_q6v5_adsp.c 	writel(val, adsp->qdsp6ss_base + RET_CFG_REG);
writel            197 drivers/remoteproc/qcom_q6v5_adsp.c 	writel(1, adsp->qdsp6ss_base + QDSP6SS_XO_CBCR);
writel            200 drivers/remoteproc/qcom_q6v5_adsp.c 	writel(1, adsp->qdsp6ss_base + QDSP6SS_SLEEP_CBCR);
writel            203 drivers/remoteproc/qcom_q6v5_adsp.c 	writel(1, adsp->qdsp6ss_base + QDSP6SS_CORE_CBCR);
writel            206 drivers/remoteproc/qcom_q6v5_adsp.c 	writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG);
writel            209 drivers/remoteproc/qcom_q6v5_adsp.c 	writel(0x1, adsp->qdsp6ss_base + CORE_START_REG);
writel            212 drivers/remoteproc/qcom_q6v5_adsp.c 	writel(0x1, adsp->qdsp6ss_base + BOOT_CMD_REG);
writel            410 drivers/remoteproc/qcom_q6v5_mss.c 		writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET);
writel            412 drivers/remoteproc/qcom_q6v5_mss.c 		writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET);
writel            476 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_SLEEP);
writel            487 drivers/remoteproc/qcom_q6v5_mss.c 		writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START);
writel            489 drivers/remoteproc/qcom_q6v5_mss.c 		writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD);
writel            503 drivers/remoteproc/qcom_q6v5_mss.c 		writel(QDSP6SS_ACC_OVERRIDE_VAL,
writel            509 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
writel            514 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_XO_CBCR);
writel            528 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            534 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            539 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            543 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            549 drivers/remoteproc/qcom_q6v5_mss.c 			writel(val, qproc->reg_base +
writel            562 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            567 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
writel            572 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            582 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            584 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            586 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            588 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            592 drivers/remoteproc/qcom_q6v5_mss.c 	writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            597 drivers/remoteproc/qcom_q6v5_mss.c 	writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
writel            602 drivers/remoteproc/qcom_q6v5_mss.c 	writel(val, qproc->reg_base + QDSP6SS_GFMUX_CTL_REG);
writel            607 drivers/remoteproc/qcom_q6v5_mss.c 	writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
writel            692 drivers/remoteproc/qcom_q6v5_mss.c 	writel(phys, qproc->rmb_base + RMB_PMI_META_DATA_REG);
writel            693 drivers/remoteproc/qcom_q6v5_mss.c 	writel(RMB_CMD_META_DATA_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG);
writel            797 drivers/remoteproc/qcom_q6v5_mss.c 	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
writel            875 drivers/remoteproc/qcom_q6v5_mss.c 		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
writel            959 drivers/remoteproc/qcom_q6v5_mss.c 	writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
writel           1053 drivers/remoteproc/qcom_q6v5_mss.c 	writel(boot_addr, qproc->rmb_base + RMB_PMI_CODE_START_REG);
writel           1054 drivers/remoteproc/qcom_q6v5_mss.c 	writel(RMB_CMD_LOAD_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG);
writel           1055 drivers/remoteproc/qcom_q6v5_mss.c 	writel(size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
writel            105 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_RESET_REG);
writel            110 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_XO_CBCR);
writel            124 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            129 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            134 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            138 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            144 drivers/remoteproc/qcom_q6v5_wcss.c 		writel(val, wcss->reg_base + Q6SS_MEM_PWR_CTL);
writel            156 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            160 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            165 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_RESET_REG);
writel            170 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_GFMUX_CTL_REG);
writel            175 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_RESET_REG);
writel            215 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(rproc->bootaddr >> 4, wcss->reg_base + Q6SS_RST_EVB);
writel            281 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->rmb_base + SSCAON_CONFIG);
writel            286 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->rmb_base + SSCAON_CONFIG);
writel            290 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->rmb_base + SSCAON_CONFIG);
writel            308 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->rmb_base + SSCAON_CONFIG);
writel            328 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_GFMUX_CTL_REG);
writel            333 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            337 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            341 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            345 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            351 drivers/remoteproc/qcom_q6v5_wcss.c 		writel(val, wcss->reg_base + Q6SS_MEM_PWR_CTL);
writel            358 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            362 drivers/remoteproc/qcom_q6v5_wcss.c 	writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG);
writel            161 drivers/remoteproc/qcom_wcnss.c 	writel(val, wcnss->spare_out);
writel            169 drivers/remoteproc/qcom_wcnss.c 	writel(0, wcnss->pmu_cfg);
writel            172 drivers/remoteproc/qcom_wcnss.c 	writel(val, wcnss->pmu_cfg);
writel            180 drivers/remoteproc/qcom_wcnss.c 	writel(val, wcnss->pmu_cfg);
writel            184 drivers/remoteproc/qcom_wcnss.c 	writel(val, wcnss->pmu_cfg);
writel            192 drivers/remoteproc/qcom_wcnss.c 	writel(val, wcnss->pmu_cfg);
writel            196 drivers/remoteproc/qcom_wcnss.c 	writel(val, wcnss->pmu_cfg);
writel            205 drivers/remoteproc/qcom_wcnss.c 	writel(val, wcnss->pmu_cfg);
writel            121 drivers/remoteproc/st_slim_rproc.c 	writel(val, slim_rproc->slimcore + SLIM_CLK_GATE_OFST);
writel            124 drivers/remoteproc/st_slim_rproc.c 	writel(SLIM_STBUS_SYNC_DIS, slim_rproc->peri + SLIM_STBUS_SYNC_OFST);
writel            127 drivers/remoteproc/st_slim_rproc.c 	writel(!SLIM_CLK_GATE_DIS,
writel            131 drivers/remoteproc/st_slim_rproc.c 	writel(~0U, slim_rproc->peri + SLIM_INT_CLR_OFST);
writel            132 drivers/remoteproc/st_slim_rproc.c 	writel(~0U, slim_rproc->peri + SLIM_CMD_CLR_OFST);
writel            135 drivers/remoteproc/st_slim_rproc.c 	writel(~0U, slim_rproc->peri + SLIM_INT_MASK_OFST);
writel            136 drivers/remoteproc/st_slim_rproc.c 	writel(~0U, slim_rproc->peri + SLIM_CMD_MASK_OFST);
writel            139 drivers/remoteproc/st_slim_rproc.c 	writel(SLIM_EN_RUN, slim_rproc->slimcore + SLIM_EN_OFST);
writel            160 drivers/remoteproc/st_slim_rproc.c 	writel(0UL, slim_rproc->peri + SLIM_INT_MASK_OFST);
writel            161 drivers/remoteproc/st_slim_rproc.c 	writel(0UL, slim_rproc->peri + SLIM_CMD_MASK_OFST);
writel            164 drivers/remoteproc/st_slim_rproc.c 	writel(SLIM_CLK_GATE_DIS, slim_rproc->slimcore + SLIM_CLK_GATE_OFST);
writel            166 drivers/remoteproc/st_slim_rproc.c 	writel(!SLIM_EN_RUN, slim_rproc->slimcore + SLIM_EN_OFST);
writel             39 drivers/reset/reset-ath79.c 	writel(val, ath79_reset->base);
writel             34 drivers/reset/reset-axs10x.c 	writel(BIT(id), rst->regs_rst);
writel             54 drivers/reset/reset-hsdk.c 	writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL);
writel             65 drivers/reset/reset-hsdk.c 	writel(reg, rst->regs_rst + CGU_IP_SW_RESET);
writel             50 drivers/reset/reset-lpc18xx.c 	writel(BIT(LPC18XX_RGU_CORE_RST), rc->base + LPC18XX_RGU_CTRL0);
writel             82 drivers/reset/reset-lpc18xx.c 		writel(stat | rst_bit, rc->base + ctrl_offset);
writel             84 drivers/reset/reset-lpc18xx.c 		writel(stat & ~rst_bit, rc->base + ctrl_offset);
writel             48 drivers/reset/reset-meson-audio-arb.c 	writel(val, arb->regs);
writel             96 drivers/reset/reset-meson-audio-arb.c 	writel(0, arb->regs);
writel            145 drivers/reset/reset-meson-audio-arb.c 	writel(BIT(ARB_GENERAL_BIT), arb->regs);
writel             37 drivers/reset/reset-meson.c 	writel(BIT(offset), reg_addr);
writel             57 drivers/reset/reset-meson.c 		writel(reg & ~BIT(offset), reg_addr);
writel             59 drivers/reset/reset-meson.c 		writel(reg | BIT(offset), reg_addr);
writel             56 drivers/reset/reset-qcom-aoss.c 	writel(1, data->base + map->reg);
writel             68 drivers/reset/reset-qcom-aoss.c 	writel(0, data->base + map->reg);
writel             48 drivers/reset/reset-simple.c 	writel(reg, data->membase + (bank * reg_width));
writel             40 drivers/reset/reset-stm32mp1.c 	writel(BIT(offset), addr);
writel            107 drivers/rpmsg/qcom_glink_rpm.c 	writel(tail, pipe->tail);
writel            179 drivers/rpmsg/qcom_glink_rpm.c 	writel(head, pipe->head);
writel            297 drivers/rpmsg/qcom_glink_rpm.c 	writel(0, tx_pipe->head);
writel            298 drivers/rpmsg/qcom_glink_rpm.c 	writel(0, rx_pipe->tail);
writel            106 drivers/rtc/rtc-armada38x.c 	writel(0, rtc->regs + RTC_STATUS);
writel            107 drivers/rtc/rtc-armada38x.c 	writel(0, rtc->regs + RTC_STATUS);
writel            108 drivers/rtc/rtc-armada38x.c 	writel(val, rtc->regs + offset);
writel            122 drivers/rtc/rtc-armada38x.c 	writel(reg, rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
writel            134 drivers/rtc/rtc-armada38x.c 	writel(reg, rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL0);
writel            139 drivers/rtc/rtc-armada38x.c 	writel(reg, rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL1);
writel            193 drivers/rtc/rtc-armada38x.c 	writel(val & ~SOC_RTC_ALARM1, rtc->regs_soc + SOC_RTC_INTERRUPT);
writel            200 drivers/rtc/rtc-armada38x.c 	writel(val | SOC_RTC_ALARM1_MASK, rtc->regs_soc + SOC_RTC_INTERRUPT);
writel            205 drivers/rtc/rtc-armada38x.c 	writel(RTC_8K_ALARM2, rtc->regs_soc + RTC_8K_ISR);
writel            210 drivers/rtc/rtc-armada38x.c 	writel(RTC_8K_ALARM2, rtc->regs_soc + RTC_8K_IMR);
writel             69 drivers/rtc/rtc-aspeed.c 	writel(ctrl | RTC_UNLOCK, rtc->base + RTC_CTRL);
writel             71 drivers/rtc/rtc-aspeed.c 	writel(reg1, rtc->base + RTC_TIME);
writel             72 drivers/rtc/rtc-aspeed.c 	writel(reg2, rtc->base + RTC_YEAR);
writel             75 drivers/rtc/rtc-aspeed.c 	writel(ctrl | RTC_ENABLE, rtc->base + RTC_CTRL);
writel             84 drivers/rtc/rtc-at91sam9.c 	writel((val), (rtc)->rtt + AT91_RTT_ ## field)
writel             91 drivers/rtc/rtc-cadence.c 	writel(reg, crtc->regs + CDNS_RTC_CTLR);
writel            171 drivers/rtc/rtc-cadence.c 		writel(timr, crtc->regs + CDNS_RTC_TIMR);
writel            172 drivers/rtc/rtc-cadence.c 		writel(calr, crtc->regs + CDNS_RTC_CALR);
writel            190 drivers/rtc/rtc-cadence.c 		writel((CDNS_RTC_AEI_SEC | CDNS_RTC_AEI_MIN | CDNS_RTC_AEI_HOUR
writel            193 drivers/rtc/rtc-cadence.c 		writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IENR);
writel            195 drivers/rtc/rtc-cadence.c 		writel(0, crtc->regs + CDNS_RTC_AENR);
writel            196 drivers/rtc/rtc-cadence.c 		writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IDISR);
writel            232 drivers/rtc/rtc-cadence.c 		writel(timar, crtc->regs + CDNS_RTC_TIMAR);
writel            233 drivers/rtc/rtc-cadence.c 		writel(calar, crtc->regs + CDNS_RTC_CALAR);
writel            338 drivers/rtc/rtc-cadence.c 	writel(0, crtc->regs + CDNS_RTC_HMR);
writel            339 drivers/rtc/rtc-cadence.c 	writel(CDNS_RTC_KRTCR_KRTC, crtc->regs + CDNS_RTC_KRTCR);
writel             60 drivers/rtc/rtc-coh901331.c 	writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
writel             68 drivers/rtc/rtc-coh901331.c 	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
writel             98 drivers/rtc/rtc-coh901331.c 	writel(rtc_tm_to_time64(tm), rtap->virtbase + COH901331_SET_TIME);
writel            123 drivers/rtc/rtc-coh901331.c 	writel(time, rtap->virtbase + COH901331_ALARM);
writel            124 drivers/rtc/rtc-coh901331.c 	writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK);
writel            136 drivers/rtc/rtc-coh901331.c 		writel(1, rtap->virtbase + COH901331_IRQ_MASK);
writel            138 drivers/rtc/rtc-coh901331.c 		writel(0, rtap->virtbase + COH901331_IRQ_MASK);
writel            234 drivers/rtc/rtc-coh901331.c 		writel(0, rtap->virtbase + COH901331_IRQ_MASK);
writel            254 drivers/rtc/rtc-coh901331.c 		writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK);
writel            268 drivers/rtc/rtc-coh901331.c 	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
writel            115 drivers/rtc/rtc-davinci.c 	writel(val, davinci_rtc->base + addr);
writel             68 drivers/rtc/rtc-ep93xx.c 	writel(secs + 1, ep93xx_rtc->mmio_base + EP93XX_RTC_LOAD);
writel             99 drivers/rtc/rtc-ftrtc010.c 	writel(offset, rtc->rtc_base + FTRTC010_RTC_RECORD);
writel            100 drivers/rtc/rtc-ftrtc010.c 	writel(0x01, rtc->rtc_base + FTRTC010_RTC_CR);
writel             74 drivers/rtc/rtc-goldfish.c 		writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
writel             75 drivers/rtc/rtc-goldfish.c 		writel(rtc_alarm64, base + TIMER_ALARM_LOW);
writel             84 drivers/rtc/rtc-goldfish.c 			writel(1, base + TIMER_CLEAR_ALARM);
writel            100 drivers/rtc/rtc-goldfish.c 		writel(1, base + TIMER_IRQ_ENABLED);
writel            102 drivers/rtc/rtc-goldfish.c 		writel(0, base + TIMER_IRQ_ENABLED);
writel            112 drivers/rtc/rtc-goldfish.c 	writel(1, base + TIMER_CLEAR_INTERRUPT);
writel            151 drivers/rtc/rtc-goldfish.c 	writel((now64 >> 32), base + TIMER_TIME_HIGH);
writel            152 drivers/rtc/rtc-goldfish.c 	writel(now64, base + TIMER_TIME_LOW);
writel            174 drivers/rtc/rtc-imxdi.c 	writel(val, imxdi->ioaddr + reg);
writel            446 drivers/rtc/rtc-imxdi.c 	writel(readl(imxdi->ioaddr + DIER) | intr,
writel            459 drivers/rtc/rtc-imxdi.c 	writel(readl(imxdi->ioaddr + DIER) & ~intr,
writel            478 drivers/rtc/rtc-imxdi.c 	writel(DSR_WEF, imxdi->ioaddr + DSR);
writel            510 drivers/rtc/rtc-imxdi.c 	writel(val, imxdi->ioaddr + reg);
writel            792 drivers/rtc/rtc-imxdi.c 	writel(0, imxdi->ioaddr + DIER);
writel            836 drivers/rtc/rtc-imxdi.c 	writel(0, imxdi->ioaddr + DIER);
writel             95 drivers/rtc/rtc-jz4740.c 	writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR);
writel            114 drivers/rtc/rtc-jz4740.c 		writel(val, rtc->base + reg);
writel             60 drivers/rtc/rtc-lpc24xx.c #define rtc_writel(dev, reg, val)	writel((val), (dev)->rtc_base + (reg))
writel            112 drivers/rtc/rtc-ls1x.c 	writel(v, SYS_TOYWRITE0);
writel            124 drivers/rtc/rtc-ls1x.c 	writel(t, SYS_TOYWRITE1);
writel            164 drivers/rtc/rtc-ls1x.c 		writel(32767, SYS_TOYTRIM);
writel             56 drivers/rtc/rtc-mv.c 	writel(rtc_reg, ioaddr + RTC_TIME_REG_OFFS);
writel             61 drivers/rtc/rtc-mv.c 	writel(rtc_reg, ioaddr + RTC_DATE_REG_OFFS);
writel            146 drivers/rtc/rtc-mv.c 	writel(rtc_reg, ioaddr + RTC_ALARM_TIME_REG_OFFS);
writel            162 drivers/rtc/rtc-mv.c 	writel(rtc_reg, ioaddr + RTC_ALARM_DATE_REG_OFFS);
writel            163 drivers/rtc/rtc-mv.c 	writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);
writel            164 drivers/rtc/rtc-mv.c 	writel(alm->enabled ? 1 : 0,
writel            179 drivers/rtc/rtc-mv.c 		writel(1, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
writel            181 drivers/rtc/rtc-mv.c 		writel(0, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
writel            195 drivers/rtc/rtc-mv.c 	writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);
writel            264 drivers/rtc/rtc-mv.c 		writel(0, pdata->ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
writel            100 drivers/rtc/rtc-mxc_v2.c 	writel(lp_cr, ioaddr + SRTC_LPCR);
writel            103 drivers/rtc/rtc-mxc_v2.c 	writel(lp_status, ioaddr + SRTC_LPSR);
writel            174 drivers/rtc/rtc-mxc_v2.c 	writel(time, pdata->ioaddr + SRTC_LPSCMR);
writel            217 drivers/rtc/rtc-mxc_v2.c 	writel(lp_cr, pdata->ioaddr + SRTC_LPCR);
writel            248 drivers/rtc/rtc-mxc_v2.c 	writel((u32)time, pdata->ioaddr + SRTC_LPSAR);
writel            251 drivers/rtc/rtc-mxc_v2.c 	writel(SRTC_LPSR_ALP, pdata->ioaddr + SRTC_LPSR);
writel            315 drivers/rtc/rtc-mxc_v2.c 	writel(SRTC_LPPDR_INIT, ioaddr + SRTC_LPPDR);
writel            318 drivers/rtc/rtc-mxc_v2.c 	writel(0xFFFFFFFF, ioaddr + SRTC_LPSR);
writel            321 drivers/rtc/rtc-mxc_v2.c 	writel((SRTC_LPCR_IE | SRTC_LPCR_NSA), ioaddr + SRTC_LPCR);
writel            330 drivers/rtc/rtc-mxc_v2.c 	writel((SRTC_LPCR_IE | SRTC_LPCR_NVE | SRTC_LPCR_NSA |
writel            172 drivers/rtc/rtc-omap.c 	writel(val, rtc->base + reg);
writel            105 drivers/rtc/rtc-pic32.c 	writel(PIC32_RTCALRM_ALRMEN,
writel            123 drivers/rtc/rtc-pic32.c 	writel(PIC32_RTCALRM_AMASK, base + PIC32_CLR(PIC32_RTCALRM));
writel            124 drivers/rtc/rtc-pic32.c 	writel(freq << 8, base + PIC32_SET(PIC32_RTCALRM));
writel            125 drivers/rtc/rtc-pic32.c 	writel(PIC32_RTCALRM_CHIME, base + PIC32_SET(PIC32_RTCALRM));
writel            231 drivers/rtc/rtc-pic32.c 	writel(0x00, base + PIC32_ALRMTIME);
writel            232 drivers/rtc/rtc-pic32.c 	writel(0x00, base + PIC32_ALRMDATE);
writel            274 drivers/rtc/rtc-pic32.c 		writel(PIC32_RTCCON_ON, base + PIC32_CLR(PIC32_RTCCON));
writel            278 drivers/rtc/rtc-pic32.c 		writel(PIC32_RTCCON_RTCWREN, base + PIC32_SET(PIC32_RTCCON));
writel            279 drivers/rtc/rtc-pic32.c 		writel(3 << 9, base + PIC32_CLR(PIC32_RTCCON));
writel            282 drivers/rtc/rtc-pic32.c 			writel(PIC32_RTCCON_ON, base + PIC32_SET(PIC32_RTCCON));
writel             31 drivers/rtc/rtc-pl030.c 	writel(0, rtc->base + RTC_EOI);
writel             56 drivers/rtc/rtc-pl030.c 		writel(time, rtc->base + RTC_MR);
writel             85 drivers/rtc/rtc-pl030.c 		writel(time + 1, rtc->base + RTC_LR);
writel            155 drivers/rtc/rtc-pl030.c 	writel(0, rtc->base + RTC_CR);
writel             98 drivers/rtc/rtc-pl031.c 	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
writel            103 drivers/rtc/rtc-pl031.c 		writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
writel            105 drivers/rtc/rtc-pl031.c 		writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
writel            185 drivers/rtc/rtc-pl031.c 		writel(bcd_year, ldata->base + RTC_YLR);
writel            186 drivers/rtc/rtc-pl031.c 		writel(time, ldata->base + RTC_LR);
writel            219 drivers/rtc/rtc-pl031.c 			writel(bcd_year, ldata->base + RTC_YMR);
writel            220 drivers/rtc/rtc-pl031.c 			writel(time, ldata->base + RTC_MR);
writel            237 drivers/rtc/rtc-pl031.c 		writel(RTC_BIT_AI, ldata->base + RTC_ICR);
writel            265 drivers/rtc/rtc-pl031.c 		writel(time, ldata->base + RTC_LR);
writel            293 drivers/rtc/rtc-pl031.c 			writel(time, ldata->base + RTC_MR);
writel            354 drivers/rtc/rtc-pl031.c 	writel(data, ldata->base + RTC_CR);
writel            367 drivers/rtc/rtc-pl031.c 				writel(0x2000, ldata->base + RTC_YLR);
writel            368 drivers/rtc/rtc-pl031.c 				writel(time, ldata->base + RTC_LR);
writel             38 drivers/rtc/rtc-puv3.c 	writel(readl(RTC_RTSR) | RTC_RTSR_AL, RTC_RTSR);
writel             47 drivers/rtc/rtc-puv3.c 	writel(readl(RTC_RTSR) | RTC_RTSR_HZ, RTC_RTSR);
writel             64 drivers/rtc/rtc-puv3.c 	writel(tmp, RTC_RTSR);
writel             79 drivers/rtc/rtc-puv3.c 	writel(tmp, RTC_RTSR);
writel            102 drivers/rtc/rtc-puv3.c 	writel(rtc_count, RTC_RCNR);
writel            128 drivers/rtc/rtc-puv3.c 	writel(rtcalarm_count, RTC_RTAR);
writel            158 drivers/rtc/rtc-puv3.c 		writel(readl(RTC_RTSR) & ~RTC_RTSR_HZE, RTC_RTSR);
writel            163 drivers/rtc/rtc-puv3.c 			writel(readl(RTC_RTSR) | RTC_RTSR_HZE, RTC_RTSR);
writel            270 drivers/rtc/rtc-puv3.c 	writel(ticnt_save, RTC_RTAR);
writel             65 drivers/rtc/rtc-rtd119x.c 	writel(val, data->base + RTD_RTCCR);
writel            652 drivers/rtc/rtc-s3c.c 	writel(tmp, info->base + S3C2410_TICNT);
writel            666 drivers/rtc/rtc-s3c.c 	writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
writel            668 drivers/rtc/rtc-s3c.c 	writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
writel            670 drivers/rtc/rtc-s3c.c 	writel(tmp, info->base + S3C2410_TICNT);
writel            684 drivers/rtc/rtc-s3c.c 	writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
writel            686 drivers/rtc/rtc-s3c.c 	writel(tmp, info->base + S3C2410_TICNT);
writel            694 drivers/rtc/rtc-s3c.c 	writel(val, info->base + S3C2410_TICNT);
writel            747 drivers/rtc/rtc-s3c.c 	writel(info->ticnt_save, info->base + S3C2410_TICNT);
writel             96 drivers/rtc/rtc-spear.c 	writel(val, config->ioaddr + STATUS_REG);
writel            108 drivers/rtc/rtc-spear.c 		writel(val, config->ioaddr + CTRL_REG);
writel            119 drivers/rtc/rtc-spear.c 		writel(val, config->ioaddr + CTRL_REG);
writel            243 drivers/rtc/rtc-spear.c 	writel(time, config->ioaddr + TIME_REG);
writel            244 drivers/rtc/rtc-spear.c 	writel(date, config->ioaddr + DATE_REG);
writel            302 drivers/rtc/rtc-spear.c 	writel(time, config->ioaddr + ALARM_TIME_REG);
writel            303 drivers/rtc/rtc-spear.c 	writel(date, config->ioaddr + ALARM_DATE_REG);
writel             83 drivers/rtc/rtc-stmp3xxx.c 		writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);
writel             84 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
writel             86 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
writel             89 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
writel             91 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
writel            163 drivers/rtc/rtc-stmp3xxx.c 	writel(rtc_tm_to_time64(rtc_tm), rtc_data->io + STMP3XXX_RTC_SECONDS);
writel            174 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_CTRL_ALARM_IRQ,
writel            188 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
writel            192 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
writel            195 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
writel            199 drivers/rtc/rtc-stmp3xxx.c 		writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
writel            217 drivers/rtc/rtc-stmp3xxx.c 	writel(rtc_tm_to_time64(&alm->time), rtc_data->io + STMP3XXX_RTC_ALARM);
writel            240 drivers/rtc/rtc-stmp3xxx.c 	writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
writel            342 drivers/rtc/rtc-stmp3xxx.c 	writel(pers0_set, rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +
writel            345 drivers/rtc/rtc-stmp3xxx.c 	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
writel            350 drivers/rtc/rtc-stmp3xxx.c 	writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
writel            388 drivers/rtc/rtc-stmp3xxx.c 	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
writel            201 drivers/rtc/rtc-sun6i.c 	writel(val, rtc->base + SUN6I_LOSC_CTRL);
writel            251 drivers/rtc/rtc-sun6i.c 		writel(reg, rtc->base + SUN6I_LOSC_CTRL);
writel            258 drivers/rtc/rtc-sun6i.c 	writel(reg, rtc->base + SUN6I_LOSC_CTRL);
writel            422 drivers/rtc/rtc-sun6i.c 		writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
writel            445 drivers/rtc/rtc-sun6i.c 		writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
writel            450 drivers/rtc/rtc-sun6i.c 	writel(alrm_val, chip->base + SUN6I_ALRM_EN);
writel            451 drivers/rtc/rtc-sun6i.c 	writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
writel            452 drivers/rtc/rtc-sun6i.c 	writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
writel            539 drivers/rtc/rtc-sun6i.c 	writel(0, chip->base + SUN6I_ALRM_COUNTER);
writel            542 drivers/rtc/rtc-sun6i.c 	writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
writel            603 drivers/rtc/rtc-sun6i.c 	writel(time, chip->base + SUN6I_RTC_HMS);
writel            617 drivers/rtc/rtc-sun6i.c 	writel(date, chip->base + SUN6I_RTC_YMD);
writel            702 drivers/rtc/rtc-sun6i.c 	writel(0, chip->base + SUN6I_ALRM_COUNTER);
writel            705 drivers/rtc/rtc-sun6i.c 	writel(0, chip->base + SUN6I_ALRM_EN);
writel            708 drivers/rtc/rtc-sun6i.c 	writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
writel            711 drivers/rtc/rtc-sun6i.c 	writel(0, chip->base + SUN6I_ALRM1_EN);
writel            714 drivers/rtc/rtc-sun6i.c 	writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
writel            717 drivers/rtc/rtc-sun6i.c 	writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
writel            721 drivers/rtc/rtc-sun6i.c 	writel(SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND,
writel            725 drivers/rtc/rtc-sun6i.c 	writel(0, chip->base + SUN6I_ALARM_CONFIG);
writel            155 drivers/rtc/rtc-sunxi.c 		writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
writel            177 drivers/rtc/rtc-sunxi.c 		writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
writel            181 drivers/rtc/rtc-sunxi.c 	writel(alrm_val, chip->base + SUNXI_ALRM_EN);
writel            182 drivers/rtc/rtc-sunxi.c 	writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
writel            293 drivers/rtc/rtc-sunxi.c 	writel(0, chip->base + SUNXI_ALRM_DHMS);
writel            300 drivers/rtc/rtc-sunxi.c 	writel(alrm, chip->base + SUNXI_ALRM_DHMS);
writel            302 drivers/rtc/rtc-sunxi.c 	writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
writel            303 drivers/rtc/rtc-sunxi.c 	writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
writel            363 drivers/rtc/rtc-sunxi.c 	writel(0, chip->base + SUNXI_RTC_HMS);
writel            364 drivers/rtc/rtc-sunxi.c 	writel(0, chip->base + SUNXI_RTC_YMD);
writel            366 drivers/rtc/rtc-sunxi.c 	writel(time, chip->base + SUNXI_RTC_HMS);
writel            380 drivers/rtc/rtc-sunxi.c 	writel(date, chip->base + SUNXI_RTC_YMD);
writel            461 drivers/rtc/rtc-sunxi.c 	writel(0, chip->base + SUNXI_ALRM_DHMS);
writel            464 drivers/rtc/rtc-sunxi.c 	writel(0, chip->base + SUNXI_ALRM_EN);
writel            467 drivers/rtc/rtc-sunxi.c 	writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
writel            470 drivers/rtc/rtc-sunxi.c 	writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
writel            140 drivers/rtc/rtc-tegra.c 		writel(sec, info->base + TEGRA_RTC_REG_SECONDS);
writel            186 drivers/rtc/rtc-tegra.c 	writel(status, info->base + TEGRA_RTC_REG_INTR_MASK);
writel            204 drivers/rtc/rtc-tegra.c 	writel(sec, info->base + TEGRA_RTC_REG_SECONDS_ALARM0);
writel            244 drivers/rtc/rtc-tegra.c 		writel(0, info->base + TEGRA_RTC_REG_INTR_MASK);
writel            245 drivers/rtc/rtc-tegra.c 		writel(status, info->base + TEGRA_RTC_REG_INTR_STATUS);
writel            320 drivers/rtc/rtc-tegra.c 	writel(0, info->base + TEGRA_RTC_REG_SECONDS_ALARM0);
writel            321 drivers/rtc/rtc-tegra.c 	writel(0xffffffff, info->base + TEGRA_RTC_REG_INTR_STATUS);
writel            322 drivers/rtc/rtc-tegra.c 	writel(0, info->base + TEGRA_RTC_REG_INTR_MASK);
writel            364 drivers/rtc/rtc-tegra.c 	writel(0xffffffff, info->base + TEGRA_RTC_REG_INTR_STATUS);
writel            365 drivers/rtc/rtc-tegra.c 	writel(TEGRA_RTC_INTR_STATUS_SEC_ALARM0,
writel             86 drivers/rtc/rtc-v3020.c 	writel(bit << chip->leftshift, chip->ioaddress);
writel             89 drivers/rtc/rtc-vt8500.c 	writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS);
writel            131 drivers/rtc/rtc-vt8500.c 	writel((bin2bcd(tm->tm_year % 100) << DATE_YEAR_S)
writel            136 drivers/rtc/rtc-vt8500.c 	writel((bin2bcd(tm->tm_wday) << TIME_DOW_S)
writel            168 drivers/rtc/rtc-vt8500.c 	writel((alrm->enabled ? ALARM_ENABLE_MASK : 0)
writel            188 drivers/rtc/rtc-vt8500.c 	writel(tmp, vt8500_rtc->regbase + VT8500_RTC_AS);
writel            224 drivers/rtc/rtc-vt8500.c 	writel(VT8500_RTC_CR_ENABLE,
writel            255 drivers/rtc/rtc-vt8500.c 	writel(0, vt8500_rtc->regbase + VT8500_RTC_IS);
writel             60 drivers/rtc/rtc-xgene.c 	writel((u32)rtc_tm_to_time64(tm), pdata->csr_base + RTC_CLR);
writel             90 drivers/rtc/rtc-xgene.c 	writel(ccr, pdata->csr_base + RTC_CCR);
writel            106 drivers/rtc/rtc-xgene.c 	writel((u32)rtc_tm_to_time64(&alrm->time), pdata->csr_base + RTC_CMR);
writel            179 drivers/rtc/rtc-xgene.c 	writel(RTC_CCR_EN, pdata->csr_base + RTC_CCR);
writel             67 drivers/rtc/rtc-zynqmp.c 	writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
writel             69 drivers/rtc/rtc-zynqmp.c 	writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR);
writel             79 drivers/rtc/rtc-zynqmp.c 	writel(RTC_INT_SEC, xrtcdev->reg_base + RTC_INT_STS);
writel            128 drivers/rtc/rtc-zynqmp.c 		writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_EN);
writel            130 drivers/rtc/rtc-zynqmp.c 		writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_DIS);
writel            142 drivers/rtc/rtc-zynqmp.c 	writel((u32)alarm_time, (xrtcdev->reg_base + RTC_ALRM));
writel            156 drivers/rtc/rtc-zynqmp.c 	writel(rtc_ctrl, xrtcdev->reg_base + RTC_CTRL);
writel            165 drivers/rtc/rtc-zynqmp.c 	writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
writel            187 drivers/rtc/rtc-zynqmp.c 	writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS);
writel            910 drivers/scsi/3w-9xxx.c 		writel(TW_CONTROL_CLEAR_PARITY_ERROR, TW_CONTROL_REG_ADDR(tw_dev));
writel            915 drivers/scsi/3w-9xxx.c 		writel(TW_CONTROL_CLEAR_PCI_ABORT, TW_CONTROL_REG_ADDR(tw_dev));
writel            924 drivers/scsi/3w-9xxx.c 		writel(TW_CONTROL_CLEAR_QUEUE_ERROR, TW_CONTROL_REG_ADDR(tw_dev));
writel           1525 drivers/scsi/3w-9xxx.c 		writel((u32)command_que_value, TW_COMMAND_QUEUE_REG_ADDR_LARGE(tw_dev));
writel           1557 drivers/scsi/3w-9xxx.c 			writel((u32)((u64)command_que_value >> 32), TW_COMMAND_QUEUE_REG_ADDR_LARGE(tw_dev) + 0x4);
writel           1561 drivers/scsi/3w-9xxx.c 				writel((u32)command_que_value, TW_COMMAND_QUEUE_REG_ADDR(tw_dev));
writel           1562 drivers/scsi/3w-9xxx.c 				writel((u32)((u64)command_que_value >> 32), TW_COMMAND_QUEUE_REG_ADDR(tw_dev) + 0x4);
writel           1564 drivers/scsi/3w-9xxx.c 				writel(TW_COMMAND_OFFSET + command_que_value, TW_COMMAND_QUEUE_REG_ADDR(tw_dev));
writel            447 drivers/scsi/3w-9xxx.h #define TW_CLEAR_ALL_INTERRUPTS(x) (writel(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
writel            448 drivers/scsi/3w-9xxx.h #define TW_CLEAR_ATTENTION_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
writel            449 drivers/scsi/3w-9xxx.h #define TW_CLEAR_HOST_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_HOST_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
writel            450 drivers/scsi/3w-9xxx.h #define TW_DISABLE_INTERRUPTS(x) (writel(TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x)))
writel            451 drivers/scsi/3w-9xxx.h #define TW_ENABLE_AND_CLEAR_INTERRUPTS(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT | TW_CONTROL_UNMASK_RESPONSE_INTERRUPT | TW_CONTROL_ENABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x)))
writel            452 drivers/scsi/3w-9xxx.h #define TW_MASK_COMMAND_INTERRUPT(x) (writel(TW_CONTROL_MASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
writel            453 drivers/scsi/3w-9xxx.h #define TW_UNMASK_COMMAND_INTERRUPT(x) (writel(TW_CONTROL_UNMASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
writel            454 drivers/scsi/3w-9xxx.h #define TW_SOFT_RESET(x) (writel(TW_CONTROL_ISSUE_SOFT_RESET | \
writel            277 drivers/scsi/3w-sas.c 	writel((u32)((u64)command_que_value >> 32), TWL_HIBQPH_REG_ADDR(tw_dev));
writel            279 drivers/scsi/3w-sas.c 	writel((u32)(command_que_value | TWL_PULL_MODE), TWL_HIBQPL_REG_ADDR(tw_dev));
writel           1181 drivers/scsi/3w-sas.c 					writel((u32)((u64)tw_dev->sense_buffer_phys[i] >> 32), TWL_HOBQPH_REG_ADDR(tw_dev));
writel           1182 drivers/scsi/3w-sas.c 					writel((u32)tw_dev->sense_buffer_phys[i], TWL_HOBQPL_REG_ADDR(tw_dev));
writel           1304 drivers/scsi/3w-sas.c 			writel((u32)((u64)tw_dev->sense_buffer_phys[i] >> 32), TWL_HOBQPH_REG_ADDR(tw_dev));
writel           1305 drivers/scsi/3w-sas.c 			writel((u32)tw_dev->sense_buffer_phys[i], TWL_HOBQPL_REG_ADDR(tw_dev));
writel            185 drivers/scsi/3w-sas.h #define TWL_MASK_INTERRUPTS(x) (writel(~0, TWL_HIMASK_REG_ADDR(tw_dev)))
writel            186 drivers/scsi/3w-sas.h #define TWL_UNMASK_INTERRUPTS(x) (writel(~TWL_HISTATUS_VALID_INTERRUPT, TWL_HIMASK_REG_ADDR(tw_dev)))
writel            187 drivers/scsi/3w-sas.h #define TWL_CLEAR_DB_INTERRUPT(x) (writel(~0, TWL_HOBDBC_REG_ADDR(tw_dev)))
writel            188 drivers/scsi/3w-sas.h #define TWL_SOFT_RESET(x) (writel(TWL_ISSUE_SOFT_RESET, TWL_HIBDB_REG_ADDR(tw_dev)))
writel           1083 drivers/scsi/aacraid/aacraid.h #define sa_writel(AEP, CSR, value)	writel(value, &((AEP)->regs.sa->CSR))
writel           1145 drivers/scsi/aacraid/aacraid.h #define rx_writel(AEP, CSR, value)	writel(value, &((AEP)->regs.rx->CSR))
writel           1163 drivers/scsi/aacraid/aacraid.h #define rkt_writel(AEP, CSR, value)	writel(value, &((AEP)->regs.rkt->CSR))
writel           1212 drivers/scsi/aacraid/aacraid.h #define src_writel(AEP, CSR, value)	writel(value, \
writel            162 drivers/scsi/aacraid/rx.c 	writel(command, &dev->IndexRegs->Mailbox[0]);
writel            166 drivers/scsi/aacraid/rx.c 	writel(p1, &dev->IndexRegs->Mailbox[1]);
writel            167 drivers/scsi/aacraid/rx.c 	writel(p2, &dev->IndexRegs->Mailbox[2]);
writel            168 drivers/scsi/aacraid/rx.c 	writel(p3, &dev->IndexRegs->Mailbox[3]);
writel            169 drivers/scsi/aacraid/rx.c 	writel(p4, &dev->IndexRegs->Mailbox[4]);
writel            435 drivers/scsi/aacraid/rx.c 	writel((u32)(addr & 0xffffffff), device);
writel            437 drivers/scsi/aacraid/rx.c 	writel((u32)(addr >> 32), device);
writel            439 drivers/scsi/aacraid/rx.c 	writel(le16_to_cpu(fib->hw_fib_va->header.Size), device);
writel            129 drivers/scsi/aacraid/src.c 			writel(events, &dev->IndexRegs->Mailbox[0]);
writel            211 drivers/scsi/aacraid/src.c 	writel(command, &dev->IndexRegs->Mailbox[0]);
writel            215 drivers/scsi/aacraid/src.c 	writel(p1, &dev->IndexRegs->Mailbox[1]);
writel            216 drivers/scsi/aacraid/src.c 	writel(p2, &dev->IndexRegs->Mailbox[2]);
writel            217 drivers/scsi/aacraid/src.c 	writel(p3, &dev->IndexRegs->Mailbox[3]);
writel            218 drivers/scsi/aacraid/src.c 	writel(p4, &dev->IndexRegs->Mailbox[4]);
writel            764 drivers/scsi/aacraid/src.c 	writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET));
writel            880 drivers/scsi/advansys.c #define ADV_MEM_WRITEDW(addr, dword) writel(dword, addr)
writel             46 drivers/scsi/aic94xx/aic94xx_reg.c 		writel(val, asd_ha->io_handle[0].addr + offs);
writel            279 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
writel            308 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
writel            309 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);	/* synchronize doorbell to 0 */
writel            389 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
writel            407 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
writel            409 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
writel            427 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
writel            445 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
writel            463 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0, &phbcmu->host_int_status); /*clear interrupt*/
writel            476 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
writel            492 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
writel            508 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
writel            509 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
writel            527 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
writel            544 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
writel            546 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(pACB->out_doorbell, &reg->iobound_doorbell);
writel           1126 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0, &acb->pmuE->host_int_status);
writel           1127 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
writel           1154 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
writel           1168 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
writel           1180 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
writel           1181 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
writel           1195 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
writel           1208 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
writel           1210 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(pACB->out_doorbell, &reg->iobound_doorbell);
writel           1294 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
writel           1301 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0, reg->iop2drv_doorbell_mask);
writel           1308 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
writel           1314 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
writel           1320 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
writel           1425 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
writel           1442 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
writel           1512 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(doneq_index,
writel           1685 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(mask, &reg->outbound_intmask);
writel           1696 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(mask, reg->iop2drv_doorbell_mask);
writel           1703 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(intmask_org & mask, &reg->host_int_mask);
writel           1711 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(intmask_org | mask, reg->pcief0_int_enable);
writel           1718 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(intmask_org & mask, &reg->host_int_mask);
writel           1790 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
writel           1793 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(cdb_phyaddr, &reg->inbound_queueport);
writel           1812 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
writel           1821 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(upper_32_bits(ccb->cdb_phyaddr), &phbcmu->inbound_queueport_high);
writel           1822 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
writel           1844 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(postq_index, pmu->inboundlist_write_pointer);
writel           1854 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0, &pmu->inbound_queueport_high);
writel           1855 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ccb_post_stamp, &pmu->inbound_queueport_low);
writel           1865 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
writel           1877 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
writel           1890 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
writel           1891 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
writel           1905 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
writel           1916 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
writel           1918 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(pACB->out_doorbell, &reg->iobound_doorbell);
writel           1960 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
writel           1966 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
writel           1972 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
writel           1977 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
writel           1984 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(acb->out_doorbell, &reg->iobound_doorbell);
writel           1999 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
writel           2009 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
writel           2018 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
writel           2023 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
writel           2030 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(acb->out_doorbell, &reg->iobound_doorbell);
writel           2219 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(data, iop_data);
writel           2225 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(data, iop_data);
writel           2227 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(allxfer_len, &pwbuffer->data_len);
writel           2258 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(allxfer_len, &pwbuffer->data_len);
writel           2282 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_doorbell, &reg->outbound_doorbell);
writel           2304 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_doorbell, &reg->outbound_doorbell_clear);
writel           2325 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_doorbell, pmu->outbound_doorbell);
writel           2346 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0, &reg->host_int_status); /* clear interrupt */
writel           2438 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
writel           2481 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(doneq_index, pmu->outboundlist_read_pointer);
writel           2485 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
writel           2514 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(doneq_index, &pmu->reply_post_consumer_index);
writel           2530 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
writel           2539 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
writel           2556 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
writel           2565 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
writel           2575 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(0, &reg->host_int_status);
writel           2589 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_intstatus, &reg->outbound_intstatus);
writel           2613 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(~outbound_doorbell, reg->iop2drv_doorbell);
writel           2614 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
writel           3171 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
writel           3185 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
writel           3190 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
writel           3207 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
writel           3211 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
writel           3212 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
writel           3229 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
writel           3234 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
writel           3252 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
writel           3257 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
writel           3260 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(pACB->out_doorbell, &reg->iobound_doorbell);
writel           3319 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
writel           3380 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
writel           3640 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(doneq_index, &reg->reply_post_consumer_index);
writel           3707 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
writel           3708 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
writel           3709 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
writel           3716 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[0], rwbuffer++);
writel           3717 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[1], rwbuffer++);
writel           3718 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
writel           3723 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
writel           3724 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
writel           3725 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
writel           3726 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
writel           3733 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[0], rwbuffer++);
writel           3734 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[1], rwbuffer++);
writel           3735 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
writel           3740 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
writel           3741 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
writel           3742 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
writel           3744 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(pacb->out_doorbell, &reg->iobound_doorbell);
writel           3793 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_SIGNATURE_SET_CONFIG, \
writel           3795 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
writel           3796 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
writel           3814 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
writel           3822 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
writel           3824 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr_hi32, rwbuffer++);
writel           3826 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr, rwbuffer++);
writel           3828 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr + 1056, rwbuffer++);
writel           3830 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(1056, rwbuffer);
writel           3832 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
writel           3838 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
writel           3851 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
writel           3852 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
writel           3853 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
writel           3854 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
writel           3868 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
writel           3869 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr_hi32, rwbuffer++);
writel           3870 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr, rwbuffer++);
writel           3871 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
writel           3873 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0x100, rwbuffer);
writel           3874 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
writel           3884 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
writel           3885 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
writel           3886 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
writel           3887 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
writel           3888 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
writel           3892 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr, &reg->msgcode_rwbuffer[5]);
writel           3893 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[6]);
writel           3894 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);
writel           3895 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
writel           3897 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(acb->out_doorbell, &reg->iobound_doorbell);
writel           3931 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
writel           3989 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
writel           3994 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
writel           3999 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
writel           4000 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
writel           4005 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
writel           4010 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
writel           4012 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(acb->out_doorbell, &reg->iobound_doorbell);
writel           4027 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
writel           4038 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
writel           4049 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
writel           4050 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
writel           4063 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
writel           4075 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
writel           4077 drivers/scsi/arcmsr/arcmsr_hba.c 	writel(pACB->out_doorbell, &pmu->iobound_doorbell);
writel           4114 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_doorbell, &reg->outbound_doorbell);
writel           4115 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
writel           4122 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
writel           4123 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
writel           4129 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
writel           4130 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
writel           4141 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_doorbell, &reg->outbound_doorbell_clear);
writel           4142 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
writel           4148 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(outbound_doorbell,
writel           4150 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
writel           4162 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(outbound_doorbell, reg->outbound_doorbell);
writel           4163 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
writel           4170 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(outbound_doorbell,
writel           4172 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
writel           4184 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0, &reg->host_int_status); /*clear interrupt*/
writel           4186 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(acb->out_doorbell, &reg->iobound_doorbell);
writel           4192 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(0, &reg->host_int_status); /*clear interrupt*/
writel           4194 drivers/scsi/arcmsr/arcmsr_hba.c 				writel(acb->out_doorbell, &reg->iobound_doorbell);
writel           4211 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
writel           4239 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
writel           4243 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0xF, &pmuC->write_sequence);
writel           4244 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0x4, &pmuC->write_sequence);
writel           4245 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0xB, &pmuC->write_sequence);
writel           4246 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0x2, &pmuC->write_sequence);
writel           4247 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0x7, &pmuC->write_sequence);
writel           4248 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0xD, &pmuC->write_sequence);
writel           4250 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
writel           4255 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0x4, &pmuE->write_sequence_3xxx);
writel           4256 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0xB, &pmuE->write_sequence_3xxx);
writel           4257 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0x2, &pmuE->write_sequence_3xxx);
writel           4258 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0x7, &pmuE->write_sequence_3xxx);
writel           4259 drivers/scsi/arcmsr/arcmsr_hba.c 			writel(0xD, &pmuE->write_sequence_3xxx);
writel           4263 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
writel           4265 drivers/scsi/arcmsr/arcmsr_hba.c 		writel(0x20, pmuD->reset_request);
writel            307 drivers/scsi/arm/eesox.c 			writel(*(u16 *)buf << 16, reg_dmadata);
writel            321 drivers/scsi/arm/eesox.c 			writel(l1 << 16, reg_dmadata);
writel            322 drivers/scsi/arm/eesox.c 			writel(l1, reg_dmadata);
writel            323 drivers/scsi/arm/eesox.c 			writel(l2 << 16, reg_dmadata);
writel            324 drivers/scsi/arm/eesox.c 			writel(l2, reg_dmadata);
writel            335 drivers/scsi/arm/eesox.c 			writel(l1 << 16, reg_dmadata);
writel            336 drivers/scsi/arm/eesox.c 			writel(l1, reg_dmadata);
writel            342 drivers/scsi/arm/eesox.c 			writel(*(u16 *)buf << 16, reg_dmadata);
writel             55 drivers/scsi/bfa/bfa.h 		writel((__bfa)->iocfc.req_cq_pi[__reqq],		\
writel            811 drivers/scsi/bfa/bfa_core.c 		writel(qintr, bfa->iocfc.bfa_regs.intr_status);
writel            863 drivers/scsi/bfa/bfa_core.c 	writel(umsk, bfa->iocfc.bfa_regs.intr_status);
writel            864 drivers/scsi/bfa/bfa_core.c 	writel(~umsk, bfa->iocfc.bfa_regs.intr_mask);
writel            879 drivers/scsi/bfa/bfa_core.c 	writel(-1L, bfa->iocfc.bfa_regs.intr_mask);
writel            939 drivers/scsi/bfa/bfa_core.c 			writel(curr_value, bfa->ioc.ioc_regs.ll_halt);
writel            950 drivers/scsi/bfa/bfa_core.c 			writel(curr_value,
writel            954 drivers/scsi/bfa/bfa_core.c 		writel(intr, bfa->iocfc.bfa_regs.intr_status);
writel             34 drivers/scsi/bfa/bfa_hw_cb.c 	writel(__HFN_INT_CPE_Q0 << CPE_Q_NUM(bfa_ioc_pcifn(&bfa->ioc), reqq),
writel             48 drivers/scsi/bfa/bfa_hw_cb.c 	writel(__HFN_INT_RME_Q0 << RME_Q_NUM(bfa_ioc_pcifn(&bfa->ioc), rspq),
writel             55 drivers/scsi/bfa/bfa_hw_cb.c 	writel(ci, bfa->iocfc.bfa_regs.rme_q_ci[rspq]);
writel             65 drivers/scsi/bfa/bfa_hw_cb.c 	writel(ci, bfa->iocfc.bfa_regs.rme_q_ci[rspq]);
writel             57 drivers/scsi/bfa/bfa_hw_ct.c 	writel(r32, bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq]);
writel             72 drivers/scsi/bfa/bfa_hw_ct.c 	writel(r32, bfa->iocfc.bfa_regs.rme_q_ctrl[rspq]);
writel             75 drivers/scsi/bfa/bfa_hw_ct.c 	writel(ci, bfa->iocfc.bfa_regs.rme_q_ci[rspq]);
writel             87 drivers/scsi/bfa/bfa_hw_ct.c 	writel(ci, bfa->iocfc.bfa_regs.rme_q_ci[rspq]);
writel            719 drivers/scsi/bfa/bfa_ioc.c 		writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
writel            726 drivers/scsi/bfa/bfa_ioc.c 		writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
writel            735 drivers/scsi/bfa/bfa_ioc.c 	writel(pgnum, iocpf->ioc->ioc_regs.host_page_num_fn);
writel            755 drivers/scsi/bfa/bfa_ioc.c 	writel(1, iocpf->ioc->ioc_regs.ioc_init_sem_reg);
writel            779 drivers/scsi/bfa/bfa_ioc.c 				writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            783 drivers/scsi/bfa/bfa_ioc.c 			writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            881 drivers/scsi/bfa/bfa_ioc.c 			writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            925 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            933 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            967 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            976 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            984 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_sem_reg);
writel           1083 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_sem_reg);
writel           1154 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.ioc_sem_reg);
writel           1243 drivers/scsi/bfa/bfa_ioc.c 			writel(1, ioc->ioc_regs.ioc_sem_reg);
writel           1249 drivers/scsi/bfa/bfa_ioc.c 				writel(1, ioc->ioc_regs.ioc_sem_reg);
writel           1387 drivers/scsi/bfa/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1406 drivers/scsi/bfa/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1420 drivers/scsi/bfa/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1434 drivers/scsi/bfa/bfa_ioc.c 	writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
writel           1450 drivers/scsi/bfa/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           1675 drivers/scsi/bfa/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           1691 drivers/scsi/bfa/bfa_ioc.c 		writel(1, ioc->ioc_regs.lpu_mbox_cmd);
writel           1783 drivers/scsi/bfa/bfa_ioc.c 		writel(cpu_to_le32(msgp[i]),
writel           1787 drivers/scsi/bfa/bfa_ioc.c 		writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
writel           1792 drivers/scsi/bfa/bfa_ioc.c 	writel(1, ioc->ioc_regs.hfn_mbox_cmd);
writel           1897 drivers/scsi/bfa/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           1934 drivers/scsi/bfa/bfa_ioc.c 			writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           1938 drivers/scsi/bfa/bfa_ioc.c 	writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
writel           2066 drivers/scsi/bfa/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           2081 drivers/scsi/bfa/bfa_ioc.c 			writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           2084 drivers/scsi/bfa/bfa_ioc.c 	writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
writel           2090 drivers/scsi/bfa/bfa_ioc.c 	writel(1, ioc->ioc_regs.ioc_init_sem_reg);
writel           2123 drivers/scsi/bfa/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           2137 drivers/scsi/bfa/bfa_ioc.c 			writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           2140 drivers/scsi/bfa/bfa_ioc.c 	writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
writel           2147 drivers/scsi/bfa/bfa_ioc.c 	writel(1, ioc->ioc_regs.ioc_init_sem_reg);
writel           2207 drivers/scsi/bfa/bfa_ioc.c 	writel(1, ioc->ioc_regs.ioc_init_sem_reg);
writel           2314 drivers/scsi/bfa/bfa_ioc.c 	writel(1, ioc->ioc_regs.lpu_mbox_cmd);
writel           4771 drivers/scsi/bfa/bfa_ioc.c 	writel(pgnum, ioc->ioc_regs.host_page_num_fn);
writel           6748 drivers/scsi/bfa/bfa_ioc.c 	writel(cmd.i, (pci_bar + FLI_CMD_REG));
writel           6758 drivers/scsi/bfa/bfa_ioc.c 	writel(addr.i, (pci_bar + FLI_ADDR_REG));
writel           6989 drivers/scsi/bfa/bfa_ioc.c 	writel(0, (bar + FLASH_SEM_LOCK_REG));
writel            224 drivers/scsi/bfa/bfa_ioc.h 			writel(swab32((_val)), ((_raddr) + (_off)))
writel            114 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(~0U, ioc->ioc_regs.err_set);
writel            227 drivers/scsi/bfa/bfa_ioc_cb.c 		writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate);
writel            228 drivers/scsi/bfa/bfa_ioc_cb.c 		writel(BFI_IOC_UNINIT, ioc->ioc_regs.alt_ioc_fwstate);
writel            248 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            260 drivers/scsi/bfa/bfa_ioc_cb.c 	writel((r32 | join_pos), ioc->ioc_regs.ioc_fwstate);
writel            269 drivers/scsi/bfa/bfa_ioc_cb.c 	writel((r32 & ~join_pos), ioc->ioc_regs.ioc_fwstate);
writel            278 drivers/scsi/bfa/bfa_ioc_cb.c 	writel((fwstate | (r32 & BFA_IOC_CB_JOIN_MASK)),
writel            295 drivers/scsi/bfa/bfa_ioc_cb.c 	writel((fwstate | (r32 & BFA_IOC_CB_JOIN_MASK)),
writel            371 drivers/scsi/bfa/bfa_ioc_cb.c 	writel((BFI_IOC_UNINIT | join_bits), (rb + BFA_IOC0_STATE_REG));
writel            374 drivers/scsi/bfa/bfa_ioc_cb.c 	writel((BFI_IOC_UNINIT | join_bits), (rb + BFA_IOC1_STATE_REG));
writel            375 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel            376 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel            377 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel            378 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel            379 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel            380 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel            381 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(__APP_PLL_SCLK_LOGIC_SOFT_RESET, rb + APP_PLL_SCLK_CTL_REG);
writel            382 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(__APP_PLL_SCLK_BYPASS | __APP_PLL_SCLK_LOGIC_SOFT_RESET,
writel            384 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(__APP_PLL_LCLK_LOGIC_SOFT_RESET, rb + APP_PLL_LCLK_CTL_REG);
writel            385 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(__APP_PLL_LCLK_BYPASS | __APP_PLL_LCLK_LOGIC_SOFT_RESET,
writel            388 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(__APP_PLL_SCLK_LOGIC_SOFT_RESET, rb + APP_PLL_SCLK_CTL_REG);
writel            389 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(__APP_PLL_LCLK_LOGIC_SOFT_RESET, rb + APP_PLL_LCLK_CTL_REG);
writel            390 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(pll_sclk | __APP_PLL_SCLK_LOGIC_SOFT_RESET,
writel            392 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(pll_fclk | __APP_PLL_LCLK_LOGIC_SOFT_RESET,
writel            395 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel            396 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel            397 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(pll_sclk, (rb + APP_PLL_SCLK_CTL_REG));
writel            398 drivers/scsi/bfa/bfa_ioc_cb.c 	writel(pll_fclk, (rb + APP_PLL_LCLK_CTL_REG));
writel             66 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.ioc_usage_reg);
writel             68 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
writel             69 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(0, ioc->ioc_regs.ioc_fail_sync);
writel             88 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
writel             97 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
writel             99 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
writel            117 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
writel            121 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
writel            131 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(__FW_INIT_HALT_P, ioc->ioc_regs.ll_halt);
writel            132 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(__FW_INIT_HALT_P, ioc->ioc_regs.alt_ll_halt);
writel            137 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(~0U, ioc->ioc_regs.err_set);
writel            364 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, rb + FNC_PERS_REG);
writel            374 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.lpu_read_stat);
writel            389 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0, ioc->ioc_regs.ioc_usage_reg);
writel            391 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(1, ioc->ioc_regs.ioc_usage_sem_reg);
writel            393 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0, ioc->ioc_regs.ioc_fail_sync);
writel            400 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(1, ioc->ioc_regs.ioc_sem_reg);
writel            417 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(0, ioc->ioc_regs.ioc_fail_sync);
writel            418 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(1, ioc->ioc_regs.ioc_usage_reg);
writel            419 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate);
writel            420 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(BFI_IOC_UNINIT, ioc->ioc_regs.alt_ioc_fwstate);
writel            436 drivers/scsi/bfa/bfa_ioc_ct.c 	writel((r32 | sync_pos), ioc->ioc_regs.ioc_fail_sync);
writel            446 drivers/scsi/bfa/bfa_ioc_ct.c 	writel((r32 & ~sync_msk), ioc->ioc_regs.ioc_fail_sync);
writel            454 drivers/scsi/bfa/bfa_ioc_ct.c 	writel((r32 | bfa_ioc_ct_sync_pos(ioc)),
writel            481 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(bfa_ioc_ct_clear_sync_ackd(r32),
writel            483 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(BFI_IOC_FAIL, ioc->ioc_regs.ioc_fwstate);
writel            484 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(BFI_IOC_FAIL, ioc->ioc_regs.alt_ioc_fwstate);
writel            494 drivers/scsi/bfa/bfa_ioc_ct.c 		writel((r32 | sync_ackd), ioc->ioc_regs.ioc_fail_sync);
writel            569 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(r32 & __MSIX_VT_OFST_,
writel            574 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(__MSIX_VT_NUMVT_(HOSTFN_MSIX_DEFAULT - 1) |
writel            577 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(HOSTFN_MSIX_DEFAULT * bfa_ioc_pcifn(ioc),
writel            597 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(0, (rb + OP_MODE));
writel            598 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(__APP_EMS_CMLCKSEL | __APP_EMS_REFCKBUFEN2 |
writel            601 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(__GLOBAL_FCOE_MODE, (rb + OP_MODE));
writel            602 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(__APP_EMS_REFCKBUFEN1, (rb + ETH_MAC_SER_REG));
writel            604 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG));
writel            605 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG));
writel            606 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel            607 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel            608 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel            609 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel            610 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
writel            611 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
writel            612 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(pll_sclk | __APP_PLL_SCLK_LOGIC_SOFT_RESET,
writel            614 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(pll_fclk | __APP_PLL_LCLK_LOGIC_SOFT_RESET,
writel            616 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(pll_sclk | __APP_PLL_SCLK_LOGIC_SOFT_RESET |
writel            618 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(pll_fclk | __APP_PLL_LCLK_LOGIC_SOFT_RESET |
writel            622 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
writel            623 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
writel            624 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(pll_sclk | __APP_PLL_SCLK_ENABLE, rb + APP_PLL_SCLK_CTL_REG);
writel            625 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(pll_fclk | __APP_PLL_LCLK_ENABLE, rb + APP_PLL_LCLK_CTL_REG);
writel            628 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P0));
writel            629 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P1));
writel            633 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + PSS_CTL_REG));
writel            636 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(0, (rb + PMM_1T_RESET_REG_P0));
writel            637 drivers/scsi/bfa/bfa_ioc_ct.c 		writel(0, (rb + PMM_1T_RESET_REG_P1));
writel            640 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(__EDRAM_BISTR_START, (rb + MBIST_CTL_REG));
writel            643 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0, (rb + MBIST_CTL_REG));
writel            659 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_SCLK_CTL_REG));
writel            667 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_SCLK_CTL_REG));
writel            673 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32 | __ETH_CLK_ENABLE_PORT0, (rb + CT2_CHIP_MISC_PRG));
writel            676 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32 | __ETH_CLK_ENABLE_PORT1, (rb + CT2_PCIE_MISC_REG));
writel            684 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32 | 0x1061731b, (rb + CT2_APP_PLL_SCLK_CTL_REG));
writel            704 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_LCLK_CTL_REG));
writel            710 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + CT2_CHIP_MISC_PRG));
writel            716 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_LCLK_CTL_REG));
writel            724 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + CT2_APP_PLL_LCLK_CTL_REG));
writel            739 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + PSS_CTL_REG));
writel            742 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(__EDRAM_BISTR_START, (rb + CT2_MBIST_CTL_REG));
writel            744 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(0, (rb + CT2_MBIST_CTL_REG));
writel            751 drivers/scsi/bfa/bfa_ioc_ct.c 	writel((__CSI_MAC_RESET | __CSI_MAC_AHB_RESET),
writel            753 drivers/scsi/bfa/bfa_ioc_ct.c 	writel((__CSI_MAC_RESET | __CSI_MAC_AHB_RESET),
writel            763 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32 & ~1, (rb + PSS_GPIO_OUT_REG));
writel            765 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32 | 1, (rb + PSS_GPIO_OE_REG));
writel            791 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(__HALT_NFC_CONTROLLER, rb + CT2_NFC_CSR_SET_REG);
writel            806 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(__HALT_NFC_CONTROLLER, rb + CT2_NFC_CSR_CLR_REG);
writel            828 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32 & ~__APP_PLL_SCLK_LOGIC_SOFT_RESET,
writel            832 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32 & ~__APP_PLL_LCLK_LOGIC_SOFT_RESET,
writel            844 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(r32, (rb + PSS_CTL_REG));
writel            846 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(__RESET_AND_START_SCLK_LCLK_PLLS, rb + CT2_CSI_FW_CTL_SET_REG);
writel            933 drivers/scsi/bfa/bfa_ioc_ct.c 	writel((r32 & 0xfbffffff), (rb + CT2_CHIP_MISC_PRG));
writel            940 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(1, (rb + CT2_LPU0_HOSTFN_MBOX0_MSK));
writel            941 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(1, (rb + CT2_LPU1_HOSTFN_MBOX0_MSK));
writel            948 drivers/scsi/bfa/bfa_ioc_ct.c 			writel(1, (rb + CT2_LPU0_HOSTFN_CMD_STAT));
writel            953 drivers/scsi/bfa/bfa_ioc_ct.c 			writel(1, (rb + CT2_LPU1_HOSTFN_CMD_STAT));
writel            960 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, (rb + CT2_BFA_IOC0_STATE_REG));
writel            961 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(BFI_IOC_UNINIT, (rb + CT2_BFA_IOC1_STATE_REG));
writel            970 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(fwstate, ioc->ioc_regs.ioc_fwstate);
writel            983 drivers/scsi/bfa/bfa_ioc_ct.c 	writel(fwstate, ioc->ioc_regs.alt_ioc_fwstate);
writel            347 drivers/scsi/bfa/bfad_debugfs.c 	writel(val, reg_addr);
writel            986 drivers/scsi/bnx2fc/bnx2fc_hwi.c 	writel(cpu_to_le32(msg), tgt->ctx_base);
writel           1401 drivers/scsi/bnx2fc/bnx2fc_hwi.c 	writel(cpu_to_le32(msg), tgt->ctx_base);
writel            131 drivers/scsi/bnx2i/bnx2i.h 		writel(val, __hba->regview + offset)
writel            220 drivers/scsi/bnx2i/bnx2i_hwi.c 	writel(cpu_to_le32(msg), conn->ep->qp.ctx_base);
writel             61 drivers/scsi/csiostor/csio_defs.h 	writel(val, addr);
writel             62 drivers/scsi/csiostor/csio_defs.h 	writel(val >> 32, addr + 4);
writel            570 drivers/scsi/csiostor/csio_hw.h #define	csio_wr_reg32(_h, _v, _r)	writel((_v), \
writel           1257 drivers/scsi/dpt_i2o.c 	writel(m, pHba->post_port);
writel           1347 drivers/scsi/dpt_i2o.c 	writel(m, pHba->post_port);
writel           2131 drivers/scsi/dpt_i2o.c 				writel(m,pHba->reply_port);
writel           2137 drivers/scsi/dpt_i2o.c 			writel(old_context, reply+12);
writel           2179 drivers/scsi/dpt_i2o.c 		writel(m, pHba->reply_port);
writel           2764 drivers/scsi/dpt_i2o.c 	writel( THREE_WORD_MSG_SIZE | SGL_OFFSET_0,&msg[0]);
writel           2765 drivers/scsi/dpt_i2o.c 	writel( I2O_CMD_UTIL_NOP << 24 | HOST_TID << 12 | 0,&msg[1]);
writel           2766 drivers/scsi/dpt_i2o.c 	writel( 0,&msg[2]);
writel           2769 drivers/scsi/dpt_i2o.c 	writel(m, pHba->post_port);
writel           2808 drivers/scsi/dpt_i2o.c 	writel(EIGHT_WORD_MSG_SIZE| SGL_OFFSET_6, &msg[0]);
writel           2809 drivers/scsi/dpt_i2o.c 	writel(I2O_CMD_OUTBOUND_INIT<<24 | HOST_TID<<12 | ADAPTER_TID, &msg[1]);
writel           2810 drivers/scsi/dpt_i2o.c 	writel(0, &msg[2]);
writel           2811 drivers/scsi/dpt_i2o.c 	writel(0x0106, &msg[3]);	/* Transaction context */
writel           2812 drivers/scsi/dpt_i2o.c 	writel(4096, &msg[4]);		/* Host page frame size */
writel           2813 drivers/scsi/dpt_i2o.c 	writel((REPLY_FRAME_SIZE)<<16|0x80, &msg[5]);	/* Outbound msg frame size and Initcode */
writel           2814 drivers/scsi/dpt_i2o.c 	writel(0xD0000004, &msg[6]);		/* Simple SG LE, EOB */
writel           2815 drivers/scsi/dpt_i2o.c 	writel((u32)addr, &msg[7]);
writel           2817 drivers/scsi/dpt_i2o.c 	writel(m, pHba->post_port);
writel           2863 drivers/scsi/dpt_i2o.c 		writel(pHba->reply_pool_pa + (i * REPLY_FRAME_SIZE * 4),
writel           2921 drivers/scsi/dpt_i2o.c 	writel(NINE_WORD_MSG_SIZE|SGL_OFFSET_0, &msg[0]);
writel           2922 drivers/scsi/dpt_i2o.c 	writel(I2O_CMD_STATUS_GET<<24|HOST_TID<<12|ADAPTER_TID, &msg[1]);
writel           2923 drivers/scsi/dpt_i2o.c 	writel(1, &msg[2]);
writel           2924 drivers/scsi/dpt_i2o.c 	writel(0, &msg[3]);
writel           2925 drivers/scsi/dpt_i2o.c 	writel(0, &msg[4]);
writel           2926 drivers/scsi/dpt_i2o.c 	writel(0, &msg[5]);
writel           2927 drivers/scsi/dpt_i2o.c 	writel( dma_low(pHba->status_block_pa), &msg[6]);
writel           2928 drivers/scsi/dpt_i2o.c 	writel( dma_high(pHba->status_block_pa), &msg[7]);
writel           2929 drivers/scsi/dpt_i2o.c 	writel(sizeof(i2o_status_block), &msg[8]); // 88 bytes
writel           2932 drivers/scsi/dpt_i2o.c 	writel(m, pHba->post_port);
writel            145 drivers/scsi/esas2r/esas2r.h 	writel(data, (void __iomem *)(a->regs + (reg) + MW_REG_OFFSET_HWREG))
writel             78 drivers/scsi/fnic/vnic_dev.h 	writel(val & 0xffffffff, reg);
writel             79 drivers/scsi/fnic/vnic_dev.h 	writel(val >> 32, reg + 0x4UL);
writel            538 drivers/scsi/gdth.c         writel(DPMEM_MAGIC, &dp6_ptr->u);
writel            562 drivers/scsi/gdth.c                 writel(DPMEM_MAGIC, &dp6_ptr->u);
writel            588 drivers/scsi/gdth.c         writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
writel            614 drivers/scsi/gdth.c         writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
writel            615 drivers/scsi/gdth.c         writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
writel            616 drivers/scsi/gdth.c         writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
writel            617 drivers/scsi/gdth.c         writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
writel            647 drivers/scsi/gdth.c         writel(DPMEM_MAGIC, &dp6c_ptr->u);
writel            671 drivers/scsi/gdth.c                 writel(DPMEM_MAGIC, &dp6c_ptr->u);
writel            698 drivers/scsi/gdth.c         writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
writel            725 drivers/scsi/gdth.c         writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
writel            726 drivers/scsi/gdth.c         writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
writel            727 drivers/scsi/gdth.c         writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
writel            728 drivers/scsi/gdth.c         writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
writel            769 drivers/scsi/gdth.c         writel(DPMEM_MAGIC, &dp6m_ptr->u);
writel            793 drivers/scsi/gdth.c                 writel(DPMEM_MAGIC, &dp6m_ptr->u);
writel            815 drivers/scsi/gdth.c         writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
writel            840 drivers/scsi/gdth.c         writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
writel            841 drivers/scsi/gdth.c         writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
writel            842 drivers/scsi/gdth.c         writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
writel            843 drivers/scsi/gdth.c         writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
writel            424 drivers/scsi/hisi_sas/hisi_sas_v1_hw.c 	writel(val, regs);
writel            432 drivers/scsi/hisi_sas/hisi_sas_v1_hw.c 	writel(val, regs);
writel            747 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c 	writel(val, regs);
writel            755 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c 	writel(val, regs);
writel            526 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c 	writel(val, regs);
writel            534 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c 	writel(val, regs);
writel           1150 drivers/scsi/hpsa.c 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
writel           1154 drivers/scsi/hpsa.c 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
writel           1158 drivers/scsi/hpsa.c 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
writel           7098 drivers/scsi/hpsa.c 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
writel           7143 drivers/scsi/hpsa.c 		writel(use_doorbell, vaddr + SA5_DOORBELL);
writel           7713 drivers/scsi/hpsa.c 	writel(driver_support, &(h->cfgtable->driver_support));
writel           7727 drivers/scsi/hpsa.c 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
writel           7788 drivers/scsi/hpsa.c 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
writel           7789 drivers/scsi/hpsa.c 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
writel           7790 drivers/scsi/hpsa.c 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
writel           7950 drivers/scsi/hpsa.c 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
writel           8241 drivers/scsi/hpsa.c 		writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
writel           8377 drivers/scsi/hpsa.c 		writel(h->events, &(h->cfgtable->clear_event_notify));
writel           8379 drivers/scsi/hpsa.c 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
writel           8385 drivers/scsi/hpsa.c 		writel(h->events, &(h->cfgtable->clear_event_notify));
writel           8386 drivers/scsi/hpsa.c 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
writel           9178 drivers/scsi/hpsa.c 		writel(bft[i], &h->transtable->BlockFetch[i]);
writel           9181 drivers/scsi/hpsa.c 	writel(h->max_commands, &h->transtable->RepQSize);
writel           9182 drivers/scsi/hpsa.c 	writel(h->nreply_queues, &h->transtable->RepQCount);
writel           9183 drivers/scsi/hpsa.c 	writel(0, &h->transtable->RepQCtrAddrLow32);
writel           9184 drivers/scsi/hpsa.c 	writel(0, &h->transtable->RepQCtrAddrHigh32);
writel           9187 drivers/scsi/hpsa.c 		writel(0, &h->transtable->RepQAddr[i].upper);
writel           9188 drivers/scsi/hpsa.c 		writel(h->reply_queue[i].busaddr,
writel           9192 drivers/scsi/hpsa.c 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
writel           9193 drivers/scsi/hpsa.c 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
writel           9199 drivers/scsi/hpsa.c 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
writel           9200 drivers/scsi/hpsa.c 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
writel           9204 drivers/scsi/hpsa.c 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
writel           9227 drivers/scsi/hpsa.c 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
writel           9283 drivers/scsi/hpsa.c 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
writel           9285 drivers/scsi/hpsa.c 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
writel            422 drivers/scsi/hpsa.h 	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
writel            429 drivers/scsi/hpsa.h 	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
writel            435 drivers/scsi/hpsa.h 	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
writel            447 drivers/scsi/hpsa.h 		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
writel            451 drivers/scsi/hpsa.h 		writel(SA5_INTR_OFF,
writel            464 drivers/scsi/hpsa.h 		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
writel            468 drivers/scsi/hpsa.h 		writel(SA5B_INTR_OFF,
writel            478 drivers/scsi/hpsa.h 		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
writel            482 drivers/scsi/hpsa.h 		writel(SA5_PERF_INTR_OFF,
writel            499 drivers/scsi/hpsa.h 		writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);
writel            608 drivers/scsi/hpsa.h 		writel((q << 24) | rq->current_entry, h->vaddr +
writel             59 drivers/scsi/hptiop.c 		writel(req, &hba->u.itl.iop->outbound_queue);
writel            105 drivers/scsi/hptiop.c 					writel(1, &p->context);
writel            121 drivers/scsi/hptiop.c 		writel(1, plx + 0x11C60);
writel            129 drivers/scsi/hptiop.c 		writel(IOPMU_OUTBOUND_INT_MSG0, &iop->outbound_intstatus);
writel            155 drivers/scsi/hptiop.c 		writel(outbound_tail, &mu->outbound_tail);
writel            170 drivers/scsi/hptiop.c 	writel(head, &hba->u.mv.mu->inbound_head);
writel            171 drivers/scsi/hptiop.c 	writel(MVIOP_MU_INBOUND_INT_POSTQUEUE,
writel            209 drivers/scsi/hptiop.c 	writel(~status, &hba->u.mv.regs->outbound_doorbell);
writel            259 drivers/scsi/hptiop.c 		writel(0, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
writel            263 drivers/scsi/hptiop.c 		writel(status, &(hba->u.mvfrey.mu->f0_doorbell));
writel            274 drivers/scsi/hptiop.c 		writel(status, &(hba->u.mvfrey.mu->isr_cause));
writel            293 drivers/scsi/hptiop.c 		writel(0x1010, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
writel            304 drivers/scsi/hptiop.c 	writel(readl(&req->flags) | IOP_REQUEST_FLAG_SYNC_REQUEST, &req->flags);
writel            305 drivers/scsi/hptiop.c 	writel(0, &req->context);
writel            306 drivers/scsi/hptiop.c 	writel((unsigned long)req - (unsigned long)hba->u.itl.iop,
writel            362 drivers/scsi/hptiop.c 	writel(msg, &hba->u.itl.iop->inbound_msgaddr0);
writel            368 drivers/scsi/hptiop.c 	writel(msg, &hba->u.mv.mu->inbound_msg);
writel            369 drivers/scsi/hptiop.c 	writel(MVIOP_MU_INBOUND_INT_MSG, &hba->u.mv.regs->inbound_doorbell);
writel            375 drivers/scsi/hptiop.c 	writel(msg, &(hba->u.mvfrey.mu->f0_to_cpu_msg_a));
writel            413 drivers/scsi/hptiop.c 	writel(0, &req->header.flags);
writel            414 drivers/scsi/hptiop.c 	writel(IOP_REQUEST_TYPE_GET_CONFIG, &req->header.type);
writel            415 drivers/scsi/hptiop.c 	writel(sizeof(struct hpt_iop_request_get_config), &req->header.size);
writel            416 drivers/scsi/hptiop.c 	writel(IOP_RESULT_PENDING, &req->header.result);
writel            424 drivers/scsi/hptiop.c 	writel(req32, &hba->u.itl.iop->outbound_queue);
writel            490 drivers/scsi/hptiop.c 	writel(0, &req->header.flags);
writel            491 drivers/scsi/hptiop.c 	writel(IOP_REQUEST_TYPE_SET_CONFIG, &req->header.type);
writel            492 drivers/scsi/hptiop.c 	writel(sizeof(struct hpt_iop_request_set_config), &req->header.size);
writel            493 drivers/scsi/hptiop.c 	writel(IOP_RESULT_PENDING, &req->header.result);
writel            500 drivers/scsi/hptiop.c 	writel(req32, &hba->u.itl.iop->outbound_queue);
writel            551 drivers/scsi/hptiop.c 	writel(~(IOPMU_OUTBOUND_INT_POSTQUEUE | IOPMU_OUTBOUND_INT_MSG0),
writel            557 drivers/scsi/hptiop.c 	writel(MVIOP_MU_OUTBOUND_INT_POSTQUEUE | MVIOP_MU_OUTBOUND_INT_MSG,
writel            563 drivers/scsi/hptiop.c 	writel(CPU_TO_F0_DRBL_MSG_BIT, &(hba->u.mvfrey.mu->f0_doorbell_enable));
writel            564 drivers/scsi/hptiop.c 	writel(0x1, &(hba->u.mvfrey.mu->isr_enable));
writel            565 drivers/scsi/hptiop.c 	writel(0x1010, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
writel            831 drivers/scsi/hptiop.c 	writel(tag, &hba->u.itl.iop->outbound_queue);
writel            894 drivers/scsi/hptiop.c 		writel(_req->req_shifted_phy | size_bits,
writel            897 drivers/scsi/hptiop.c 		writel(_req->req_shifted_phy | IOPMU_QUEUE_ADDR_HOST_BIT,
writel            951 drivers/scsi/hptiop.c 	writel(hba->u.mvfrey.inlist_wptr,
writel            976 drivers/scsi/hptiop.c 	writel(cpu_to_le32(hba->u.mvfrey.inlist_phy & 0xffffffff),
writel            978 drivers/scsi/hptiop.c 	writel(cpu_to_le32((hba->u.mvfrey.inlist_phy >> 16) >> 16),
writel            981 drivers/scsi/hptiop.c 	writel(cpu_to_le32(hba->u.mvfrey.outlist_phy & 0xffffffff),
writel            983 drivers/scsi/hptiop.c 	writel(cpu_to_le32((hba->u.mvfrey.outlist_phy >> 16) >> 16),
writel            986 drivers/scsi/hptiop.c 	writel(cpu_to_le32(hba->u.mvfrey.outlist_cptr_phy & 0xffffffff),
writel            988 drivers/scsi/hptiop.c 	writel(cpu_to_le32((hba->u.mvfrey.outlist_cptr_phy >> 16) >> 16),
writel           1528 drivers/scsi/hptiop.c 	writel(int_mask |
writel           1536 drivers/scsi/hptiop.c 	writel(0, &hba->u.mv.regs->outbound_intmask);
writel           1542 drivers/scsi/hptiop.c 	writel(0, &(hba->u.mvfrey.mu->f0_doorbell_enable));
writel           1544 drivers/scsi/hptiop.c 	writel(0, &(hba->u.mvfrey.mu->isr_enable));
writel           1546 drivers/scsi/hptiop.c 	writel(0, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
writel            754 drivers/scsi/ipr.c 		writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
writel            758 drivers/scsi/ipr.c 		writel(~0, ioa_cfg->regs.clr_interrupt_reg);
writel            759 drivers/scsi/ipr.c 	writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
writel            962 drivers/scsi/ipr.c 		writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
writel           2855 drivers/scsi/ipr.c 		writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
writel           2885 drivers/scsi/ipr.c 	writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
writel           2897 drivers/scsi/ipr.c 	writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
writel           2901 drivers/scsi/ipr.c 	writel(start_addr, ioa_cfg->ioa_mailbox);
writel           2904 drivers/scsi/ipr.c 	writel(IPR_UPROCI_RESET_ALERT,
writel           2923 drivers/scsi/ipr.c 			writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
writel           2929 drivers/scsi/ipr.c 	writel(IPR_UPROCI_RESET_ALERT,
writel           2932 drivers/scsi/ipr.c 	writel(IPR_UPROCI_IO_DEBUG_ALERT,
writel           2936 drivers/scsi/ipr.c 	writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
writel           5646 drivers/scsi/ipr.c 				writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
writel           5660 drivers/scsi/ipr.c 		writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
writel           5671 drivers/scsi/ipr.c 			writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
writel           5828 drivers/scsi/ipr.c 				writel(IPR_PCII_HRRQ_UPDATED,
writel           8382 drivers/scsi/ipr.c 		writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
writel           8436 drivers/scsi/ipr.c 		writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
writel           8443 drivers/scsi/ipr.c 		writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
writel           8450 drivers/scsi/ipr.c 	writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
writel           8457 drivers/scsi/ipr.c 		writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
writel           8673 drivers/scsi/ipr.c 		writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
writel           8742 drivers/scsi/ipr.c 		writel(IPR_UPROCI_SIS64_START_BIST,
writel           8947 drivers/scsi/ipr.c 		writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
writel           10107 drivers/scsi/ipr.c 	writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
writel           10118 drivers/scsi/ipr.c 	writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
writel           1987 drivers/scsi/ipr.h         writel(((u32) (val >> 32)), addr);
writel           1988 drivers/scsi/ipr.h         writel(((u32) (val)), (addr + 4));
writel           2249 drivers/scsi/ips.c 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           2256 drivers/scsi/ips.c 			writel(1, ha->mem_ptr + IPS_REG_FLAP);
writel           2264 drivers/scsi/ips.c 			writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
writel           2271 drivers/scsi/ips.c 			writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
writel           2277 drivers/scsi/ips.c 			writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
writel           4681 drivers/scsi/ips.c 	writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
writel           4858 drivers/scsi/ips.c 	writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
writel           4865 drivers/scsi/ips.c 		writel(0, ha->mem_ptr + IPS_REG_NDAE);
writel           4921 drivers/scsi/ips.c 		writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
writel           4941 drivers/scsi/ips.c 	writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
writel           4973 drivers/scsi/ips.c 	writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
writel           4978 drivers/scsi/ips.c 	writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
writel           5106 drivers/scsi/ips.c 		writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
writel           5177 drivers/scsi/ips.c 	writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
writel           5178 drivers/scsi/ips.c 	writel(phys_status_start + IPS_STATUS_Q_SIZE,
writel           5180 drivers/scsi/ips.c 	writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
writel           5181 drivers/scsi/ips.c 	writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
writel           5236 drivers/scsi/ips.c 	writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
writel           5363 drivers/scsi/ips.c 	writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
writel           5364 drivers/scsi/ips.c 	writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
writel           5428 drivers/scsi/ips.c 	writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
writel           6135 drivers/scsi/ips.c 	writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6162 drivers/scsi/ips.c 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6188 drivers/scsi/ips.c 				writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6341 drivers/scsi/ips.c 		writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
writel           6357 drivers/scsi/ips.c 				writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6372 drivers/scsi/ips.c 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6386 drivers/scsi/ips.c 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6399 drivers/scsi/ips.c 	writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6477 drivers/scsi/ips.c 	writel(0, ha->mem_ptr + IPS_REG_FLAP);
writel           6484 drivers/scsi/ips.c 	writel(1, ha->mem_ptr + IPS_REG_FLAP);
writel           6493 drivers/scsi/ips.c 		writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
writel            202 drivers/scsi/isci/host.c 	writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);
writel            212 drivers/scsi/isci/host.c 		writel(0xFF000000, &ihost->smu_registers->interrupt_mask);
writel            213 drivers/scsi/isci/host.c 		writel(0, &ihost->smu_registers->interrupt_mask);
writel            251 drivers/scsi/isci/host.c 	writel(0xff, &ihost->smu_registers->interrupt_mask);
writel            252 drivers/scsi/isci/host.c 	writel(0, &ihost->smu_registers->interrupt_mask);
writel            569 drivers/scsi/isci/host.c 		writel(ihost->completion_queue_get,
writel            592 drivers/scsi/isci/host.c 		writel(SMU_ISR_QUEUE_SUSPEND, &ihost->smu_registers->interrupt_status);
writel            605 drivers/scsi/isci/host.c 	writel(0, &ihost->smu_registers->interrupt_mask);
writel            614 drivers/scsi/isci/host.c 		writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);
writel            707 drivers/scsi/isci/host.c 	writel(0, &ihost->smu_registers->interrupt_mask);
writel            713 drivers/scsi/isci/host.c 	writel(0xffffffff, &ihost->smu_registers->interrupt_mask);
writel            726 drivers/scsi/isci/host.c 	writel(port_task_scheduler_value,
writel            746 drivers/scsi/isci/host.c 	writel(task_assignment,
writel            764 drivers/scsi/isci/host.c 	writel(completion_queue_control_value,
writel            776 drivers/scsi/isci/host.c 	writel(completion_queue_get_value,
writel            785 drivers/scsi/isci/host.c 	writel(completion_queue_put_value,
writel            808 drivers/scsi/isci/host.c 	writel(frame_queue_control_value,
writel            817 drivers/scsi/isci/host.c 	writel(frame_queue_get_value,
writel            821 drivers/scsi/isci/host.c 	writel(frame_queue_put_value,
writel           1074 drivers/scsi/isci/host.c 	writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);
writel           1076 drivers/scsi/isci/host.c 	writel(0xFF000000, &ihost->smu_registers->interrupt_mask);
writel           1077 drivers/scsi/isci/host.c 	writel(0, &ihost->smu_registers->interrupt_mask);
writel           1135 drivers/scsi/isci/host.c 	writel(SMU_ICC_GEN_VAL(NUMBER, active) |
writel           1247 drivers/scsi/isci/host.c 		writel(SGPIO_HW_CONTROL, &ihost->scu_registers->peg0.sgpio.output_data_select[i]);
writel           1267 drivers/scsi/isci/host.c 	writel(0, &ihost->scu_registers->peg0.sgpio.interface_control);
writel           1432 drivers/scsi/isci/host.c 	writel(SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
writel           1455 drivers/scsi/isci/host.c 	writel(val, &ihost->smu_registers->clock_gating_control);
writel           1548 drivers/scsi/isci/host.c 	writel(0xFFFFFFFF, &ihost->smu_registers->soft_reset_control);
writel           1554 drivers/scsi/isci/host.c 	writel(0x00000000, &ihost->smu_registers->completion_queue_get);
writel           1557 drivers/scsi/isci/host.c 	writel(0, &ihost->scu_registers->sdma.unsolicited_frame_get_pointer);
writel           1560 drivers/scsi/isci/host.c 	writel(~SMU_INTERRUPT_STATUS_RESERVED_MASK, &ihost->smu_registers->interrupt_status);
writel           1933 drivers/scsi/isci/host.c 	writel(0x0081000f, &afe->afe_dfx_master_control0);
writel           1940 drivers/scsi/isci/host.c 		writel(0x0007FFFF, &afe->afe_pmsn_master_control2);
writel           1946 drivers/scsi/isci/host.c 		writel(0x00005A00, &afe->afe_bias_control);
writel           1948 drivers/scsi/isci/host.c 		writel(0x00005F00, &afe->afe_bias_control);
writel           1950 drivers/scsi/isci/host.c 		writel(0x00005500, &afe->afe_bias_control);
writel           1956 drivers/scsi/isci/host.c 		writel(0x80040908, &afe->afe_pll_control0);
writel           1958 drivers/scsi/isci/host.c 		writel(0x80040A08, &afe->afe_pll_control0);
writel           1960 drivers/scsi/isci/host.c 		writel(0x80000B08, &afe->afe_pll_control0);
writel           1962 drivers/scsi/isci/host.c 		writel(0x00000B08, &afe->afe_pll_control0);
writel           1964 drivers/scsi/isci/host.c 		writel(0x80000B08, &afe->afe_pll_control0);
writel           1979 drivers/scsi/isci/host.c 		writel(0x7bcc96ad, &afe->afe_pmsn_master_control0);
writel           1995 drivers/scsi/isci/host.c 			writel(0x00004512, &xcvr->afe_xcvr_control0);
writel           1998 drivers/scsi/isci/host.c 			writel(0x0050100F, &xcvr->afe_xcvr_control1);
writel           2002 drivers/scsi/isci/host.c 			writel(0x00030000, &xcvr->afe_tx_ssc_control);
writel           2006 drivers/scsi/isci/host.c 			writel(0x00010202, &xcvr->afe_tx_ssc_control);
writel           2012 drivers/scsi/isci/host.c 			writel(0x00014500, &xcvr->afe_xcvr_control0);
writel           2016 drivers/scsi/isci/host.c 			writel(0x00010202, &xcvr->afe_tx_ssc_control);
writel           2022 drivers/scsi/isci/host.c 			writel(0x0001C500, &xcvr->afe_xcvr_control0);
writel           2030 drivers/scsi/isci/host.c 			writel(0x000003F0, &xcvr->afe_channel_control);
writel           2032 drivers/scsi/isci/host.c 			writel(0x000003D7, &xcvr->afe_channel_control);
writel           2035 drivers/scsi/isci/host.c 			writel(0x000003D4, &xcvr->afe_channel_control);
writel           2037 drivers/scsi/isci/host.c 			writel(0x000001E7, &xcvr->afe_channel_control);
writel           2040 drivers/scsi/isci/host.c 			writel(0x000001E4, &xcvr->afe_channel_control);
writel           2042 drivers/scsi/isci/host.c 			writel(cable_length_long ? 0x000002F7 : 0x000001F7,
writel           2046 drivers/scsi/isci/host.c 			writel(cable_length_long ? 0x000002F4 : 0x000001F4,
writel           2053 drivers/scsi/isci/host.c 			writel(0x00040000, &xcvr->afe_tx_control);
writel           2062 drivers/scsi/isci/host.c 			writel(0x00004100, &xcvr->afe_xcvr_control0);
writel           2064 drivers/scsi/isci/host.c 			writel(0x00014100, &xcvr->afe_xcvr_control0);
writel           2066 drivers/scsi/isci/host.c 			writel(0x0001C100, &xcvr->afe_xcvr_control0);
writel           2071 drivers/scsi/isci/host.c 			writel(0x3F11103F, &xcvr->afe_rx_ssc_control0);
writel           2073 drivers/scsi/isci/host.c 			writel(0x3F11103F, &xcvr->afe_rx_ssc_control0);
writel           2076 drivers/scsi/isci/host.c 			writel(0x00040000, &xcvr->afe_tx_control);
writel           2078 drivers/scsi/isci/host.c 			writel(0x01400C0F, &xcvr->afe_rx_ssc_control1);
writel           2081 drivers/scsi/isci/host.c 			writel(0x3F6F103F, &xcvr->afe_rx_ssc_control0);
writel           2085 drivers/scsi/isci/host.c 			writel(0x00040000, &xcvr->afe_tx_control);
writel           2087 drivers/scsi/isci/host.c 			writel(cable_length_long ? 0x01500C0C :
writel           2092 drivers/scsi/isci/host.c 			writel(0x000003E0, &xcvr->afe_dfx_rx_control1);
writel           2095 drivers/scsi/isci/host.c 			writel(cable_length_long ? 0x33091C1F :
writel           2101 drivers/scsi/isci/host.c 			writel(0x00040000, &xcvr->afe_tx_control);
writel           2106 drivers/scsi/isci/host.c 		writel(oem_phy->afe_tx_amp_control0, &xcvr->afe_tx_amp_control0);
writel           2109 drivers/scsi/isci/host.c 		writel(oem_phy->afe_tx_amp_control1, &xcvr->afe_tx_amp_control1);
writel           2112 drivers/scsi/isci/host.c 		writel(oem_phy->afe_tx_amp_control2, &xcvr->afe_tx_amp_control2);
writel           2115 drivers/scsi/isci/host.c 		writel(oem_phy->afe_tx_amp_control3, &xcvr->afe_tx_amp_control3);
writel           2120 drivers/scsi/isci/host.c 	writel(0x00010f00, &afe->afe_dfx_master_control0);
writel           2165 drivers/scsi/isci/host.c 	writel(0, &ihost->smu_registers->soft_reset_control);
writel           2201 drivers/scsi/isci/host.c 		writel(i, &ptsg->protocol_engine[i]);
writel           2207 drivers/scsi/isci/host.c 	writel(val, &ihost->scu_registers->sdma.pdma_configuration);
writel           2211 drivers/scsi/isci/host.c 	writel(val, &ihost->scu_registers->sdma.cdma_configuration);
writel           2305 drivers/scsi/isci/host.c 	writel(lower_32_bits(ihost->cq_dma), &ihost->smu_registers->completion_queue_lower);
writel           2306 drivers/scsi/isci/host.c 	writel(upper_32_bits(ihost->cq_dma), &ihost->smu_registers->completion_queue_upper);
writel           2308 drivers/scsi/isci/host.c 	writel(lower_32_bits(ihost->rnc_dma), &ihost->smu_registers->remote_node_context_lower);
writel           2309 drivers/scsi/isci/host.c 	writel(upper_32_bits(ihost->rnc_dma), &ihost->smu_registers->remote_node_context_upper);
writel           2311 drivers/scsi/isci/host.c 	writel(lower_32_bits(ihost->tc_dma), &ihost->smu_registers->host_task_table_lower);
writel           2312 drivers/scsi/isci/host.c 	writel(upper_32_bits(ihost->tc_dma), &ihost->smu_registers->host_task_table_upper);
writel           2320 drivers/scsi/isci/host.c 	writel(lower_32_bits(ihost->uf_control.headers.physical_address),
writel           2322 drivers/scsi/isci/host.c 	writel(upper_32_bits(ihost->uf_control.headers.physical_address),
writel           2325 drivers/scsi/isci/host.c 	writel(lower_32_bits(ihost->uf_control.address_table.physical_address),
writel           2327 drivers/scsi/isci/host.c 	writel(upper_32_bits(ihost->uf_control.address_table.physical_address),
writel           2373 drivers/scsi/isci/host.c 	writel(1, &ihost->scu_registers->peg0.sgpio.interface_control);
writel           2375 drivers/scsi/isci/host.c 		writel(SGPIO_HW_CONTROL, &ihost->scu_registers->peg0.sgpio.output_data_select[i]);
writel           2376 drivers/scsi/isci/host.c 	writel(0, &ihost->scu_registers->peg0.sgpio.vendor_specific_code);
writel           2457 drivers/scsi/isci/host.c 	writel(request, &ihost->smu_registers->post_context_port);
writel           2547 drivers/scsi/isci/host.c 		writel(ihost->uf_control.get,
writel           2783 drivers/scsi/isci/host.c 		writel(val, &ihost->scu_registers->peg0.sgpio.output_data_select[d]);
writel            101 drivers/scsi/isci/phy.c 	writel(SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX,
writel            110 drivers/scsi/isci/phy.c 	writel(tl_control, &iphy->transport_layer_registers->control);
writel            138 drivers/scsi/isci/phy.c 	writel(SCU_SAS_TIID_GEN_BIT(SMP_INITIATOR) |
writel            146 drivers/scsi/isci/phy.c 	writel(0xFEDCBA98, &llr->sas_device_name_high);
writel            147 drivers/scsi/isci/phy.c 	writel(phy_idx, &llr->sas_device_name_low);
writel            150 drivers/scsi/isci/phy.c 	writel(phy_oem->sas_address.high, &llr->source_sas_address_high);
writel            151 drivers/scsi/isci/phy.c 	writel(phy_oem->sas_address.low, &llr->source_sas_address_low);
writel            154 drivers/scsi/isci/phy.c 	writel(0, &llr->identify_frame_phy_id);
writel            155 drivers/scsi/isci/phy.c 	writel(SCU_SAS_TIPID_GEN_VALUE(ID, phy_idx), &llr->identify_frame_phy_id);
writel            162 drivers/scsi/isci/phy.c 	writel(phy_configuration, &llr->phy_configuration);
writel            205 drivers/scsi/isci/phy.c 			writel(reg, &xcvr->afe_xcvr_control0);
writel            209 drivers/scsi/isci/phy.c 			writel(reg, &xcvr->afe_tx_ssc_control);
writel            217 drivers/scsi/isci/phy.c 			writel(reg, &xcvr->afe_tx_ssc_control);
writel            221 drivers/scsi/isci/phy.c 			writel(reg, &llr->stp_control);
writel            241 drivers/scsi/isci/phy.c 	writel(phy_cap.all, &llr->phy_capabilities);
writel            246 drivers/scsi/isci/phy.c 	writel(SCU_ENSPINUP_GEN_VAL(COUNT,
writel            259 drivers/scsi/isci/phy.c 	writel(clksm_value, &llr->clock_skew_management);
writel            262 drivers/scsi/isci/phy.c 		writel(0x04210400, &llr->afe_lookup_table_control);
writel            263 drivers/scsi/isci/phy.c 		writel(0x020A7C05, &llr->sas_primitive_timeout);
writel            265 drivers/scsi/isci/phy.c 		writel(0x02108421, &llr->afe_lookup_table_control);
writel            282 drivers/scsi/isci/phy.c 	writel(llctl, &llr->link_layer_control);
writel            294 drivers/scsi/isci/phy.c 	writel(sp_timeouts, &llr->sas_phy_timeouts);
writel            303 drivers/scsi/isci/phy.c 		writel(SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME,
writel            310 drivers/scsi/isci/phy.c 	writel(0, &llr->link_layer_hang_detection_timeout);
writel            413 drivers/scsi/isci/phy.c 	writel(device_id, &iphy->transport_layer_registers->stp_rni);
writel            421 drivers/scsi/isci/phy.c 	writel(tl_control, &iphy->transport_layer_registers->control);
writel            431 drivers/scsi/isci/phy.c 	writel(scu_sas_pcfg_value,
writel            444 drivers/scsi/isci/phy.c 	writel(scu_sas_pcfg_value,
writel            531 drivers/scsi/isci/phy.c 		writel(enable_spinup, &iphy->link_layer_registers->notify_enable_spinup_control);
writel            547 drivers/scsi/isci/phy.c 		writel(scu_sas_pcfg_value,
writel            553 drivers/scsi/isci/phy.c 		writel(scu_sas_pcfg_value,
writel            578 drivers/scsi/isci/phy.c 	writel(phy_control,
writel            681 drivers/scsi/isci/phy.c 	writel(val, &iphy->link_layer_registers->transmit_comsas_signal);
writel           1192 drivers/scsi/isci/phy.c 	writel(scu_sas_pcfg_value,
writel           1198 drivers/scsi/isci/phy.c 	writel(enable_spinup_value, &iphy->link_layer_registers->notify_enable_spinup_control);
writel           1211 drivers/scsi/isci/phy.c 	writel(val, &ll->phy_configuration);
writel           1218 drivers/scsi/isci/phy.c 	writel(val, &ll->phy_configuration);
writel           1245 drivers/scsi/isci/phy.c 	writel(phy_configuration_value,
writel           1251 drivers/scsi/isci/phy.c 	writel(phy_configuration_value,
writel            155 drivers/scsi/isci/port.c 		writel(val, &iphy->link_layer_registers->link_layer_control);
writel            655 drivers/scsi/isci/port.c 		writel(iphy->phy_index,
writel            764 drivers/scsi/isci/port.c 			writel(iphy->phy_index,
writel            830 drivers/scsi/isci/port.c 	writel(sas_address.high,
writel            832 drivers/scsi/isci/port.c 	writel(sas_address.low,
writel            836 drivers/scsi/isci/port.c 	writel(0, &iport->viit_registers->reserved);
writel            839 drivers/scsi/isci/port.c 	writel(SCU_VIIT_ENTRY_ID_VIIT |
writel            871 drivers/scsi/isci/port.c 	writel(pts_control_value, &iport->port_task_scheduler_registers->control);
writel            937 drivers/scsi/isci/port.c 	writel(pts_control_value, &iport->port_task_scheduler_registers->control);
writel            973 drivers/scsi/isci/port.c 			writel(iport->physical_port_index,
writel           1445 drivers/scsi/isci/port.c 	writel(pts_control_value, &iport->port_task_scheduler_registers->control);
writel           1455 drivers/scsi/isci/port.c 	writel(pts_control_value, &iport->port_task_scheduler_registers->control);
writel           1566 drivers/scsi/isci/port.c 				writel(timeout,
writel           1286 drivers/scsi/lpfc/lpfc.h 	writel(HA_ERATT, phba->HAregaddr);
writel           1327 drivers/scsi/lpfc/lpfc.h 	writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
writel           1569 drivers/scsi/lpfc/lpfc_attr.c 	writel(reg_val, phba->sli4_hba.conf_regs_memmap_p +
writel           2199 drivers/scsi/lpfc/lpfc_attr.c 			writel(creg_val, phba->HCregaddr);
writel           2220 drivers/scsi/lpfc/lpfc_attr.c 		writel(creg_val, phba->HCregaddr);
writel           6173 drivers/scsi/lpfc/lpfc_attr.c 		writel(*((uint32_t *)(buf + buf_off + LPFC_REG_WRITE_KEY_SIZE)),
writel            513 drivers/scsi/lpfc/lpfc_bsg.c 		writel(creg_val, phba->HCregaddr);
writel            751 drivers/scsi/lpfc/lpfc_bsg.c 		writel(creg_val, phba->HCregaddr);
writel           1593 drivers/scsi/lpfc/lpfc_bsg.c 		writel(creg_val, phba->HCregaddr);
writel             52 drivers/scsi/lpfc/lpfc_compat.h 		writel( *src32, dest32);
writel           3634 drivers/scsi/lpfc/lpfc_debugfs.c 			writel(value, mem_mapped_bar + offset);
writel           3640 drivers/scsi/lpfc/lpfc_debugfs.c 			writel(u32val, mem_mapped_bar + offset);
writel           3646 drivers/scsi/lpfc/lpfc_debugfs.c 			writel(u32val, mem_mapped_bar + offset);
writel           4556 drivers/scsi/lpfc/lpfc_debugfs.c 		writel(reg_val, drb_reg);
writel           4780 drivers/scsi/lpfc/lpfc_debugfs.c 		writel(reg_val, ctl_reg);
writel           3551 drivers/scsi/lpfc/lpfc_els.c 		writel(control, phba->HCregaddr);
writel            729 drivers/scsi/lpfc/lpfc_hbadisc.c 				writel(control, phba->HCregaddr);
writel           1106 drivers/scsi/lpfc/lpfc_hbadisc.c 	writel(control, phba->HCregaddr);
writel           1130 drivers/scsi/lpfc/lpfc_hbadisc.c 	writel(control, phba->HCregaddr);
writel           3362 drivers/scsi/lpfc/lpfc_hbadisc.c 		writel(control, phba->HCregaddr);
writel            592 drivers/scsi/lpfc/lpfc_init.c 	writel(status, phba->HCregaddr);
writel            762 drivers/scsi/lpfc/lpfc_init.c 			writel(0, phba->HCregaddr);
writel            765 drivers/scsi/lpfc/lpfc_init.c 			writel(0xffffffff, phba->HAregaddr);
writel            845 drivers/scsi/lpfc/lpfc_init.c 		writel(0, phba->HCregaddr);
writel           2074 drivers/scsi/lpfc/lpfc_init.c 	writel(HA_LATT, phba->HAregaddr);
writel           2093 drivers/scsi/lpfc/lpfc_init.c 	writel(control, phba->HCregaddr);
writel           2097 drivers/scsi/lpfc/lpfc_init.c 	writel(HA_LATT, phba->HAregaddr);
writel           4560 drivers/scsi/lpfc/lpfc_init.c 	writel(0, phba->HCregaddr);
writel           4563 drivers/scsi/lpfc/lpfc_init.c 	writel(0xffffffff, phba->HAregaddr);
writel           10057 drivers/scsi/lpfc/lpfc_init.c 			writel(reg_data.word0, phba->sli4_hba.u.if_type2.
writel            216 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->db_regaddr);
writel            287 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
writel            366 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
writel            381 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
writel            416 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
writel            449 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
writel            608 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
writel            638 drivers/scsi/lpfc/lpfc_sli.c 	writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
writel            702 drivers/scsi/lpfc/lpfc_sli.c 		writel(doorbell.word0, hq->db_regaddr);
writel           1818 drivers/scsi/lpfc/lpfc_sli.c 	writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
writel           1846 drivers/scsi/lpfc/lpfc_sli.c 	writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
writel           1871 drivers/scsi/lpfc/lpfc_sli.c 		writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
writel           2053 drivers/scsi/lpfc/lpfc_sli.c 		writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
writel           3497 drivers/scsi/lpfc/lpfc_sli.c 		writel(pring->sli.sli3.rspidx,
writel           3507 drivers/scsi/lpfc/lpfc_sli.c 		writel(status, phba->CAregaddr);
writel           3812 drivers/scsi/lpfc/lpfc_sli.c 		writel(pring->sli.sli3.rspidx,
writel           3835 drivers/scsi/lpfc/lpfc_sli.c 		writel(status, phba->CAregaddr);
writel           4228 drivers/scsi/lpfc/lpfc_sli.c 	writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
writel           4236 drivers/scsi/lpfc/lpfc_sli.c 		writel(HA_ERATT, phba->HAregaddr);
writel           4244 drivers/scsi/lpfc/lpfc_sli.c 	writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
writel           4246 drivers/scsi/lpfc/lpfc_sli.c 	writel(mbox, mbox_buf);
writel           4290 drivers/scsi/lpfc/lpfc_sli.c 		writel(HA_ERATT, phba->HAregaddr);
writel           4296 drivers/scsi/lpfc/lpfc_sli.c 	writel(hc_copy, phba->HCregaddr);
writel           4340 drivers/scsi/lpfc/lpfc_sli.c 	writel(status, phba->HCregaddr);
writel           4382 drivers/scsi/lpfc/lpfc_sli.c 		writel(HA_ERATT, phba->HAregaddr);
writel           4443 drivers/scsi/lpfc/lpfc_sli.c 	writel(HC_INITFF, phba->HCregaddr);
writel           4446 drivers/scsi/lpfc/lpfc_sli.c 	writel(0, phba->HCregaddr);
writel           4573 drivers/scsi/lpfc/lpfc_sli.c 	writel(*(uint32_t *) mb, to_slim);
writel           4582 drivers/scsi/lpfc/lpfc_sli.c 	writel(*(uint32_t *) mb, to_slim);
writel           4761 drivers/scsi/lpfc/lpfc_sli.c 	writel(0, phba->HCregaddr);
writel           4765 drivers/scsi/lpfc/lpfc_sli.c 	writel(0xffffffff, phba->HAregaddr);
writel           6200 drivers/scsi/lpfc/lpfc_sli.c 	writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
writel           8256 drivers/scsi/lpfc/lpfc_sli.c 		writel(ldata, to_slim);
writel           8271 drivers/scsi/lpfc/lpfc_sli.c 		writel(CA_MBATT, phba->CAregaddr);
writel           8280 drivers/scsi/lpfc/lpfc_sli.c 		writel(CA_MBATT, phba->CAregaddr);
writel           8382 drivers/scsi/lpfc/lpfc_sli.c 		writel(HA_MBATT, phba->HAregaddr);
writel           8590 drivers/scsi/lpfc/lpfc_sli.c 	writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
writel           8598 drivers/scsi/lpfc/lpfc_sli.c 	writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
writel           11867 drivers/scsi/lpfc/lpfc_sli.c 		writel(creg_val, phba->HCregaddr);
writel           11934 drivers/scsi/lpfc/lpfc_sli.c 		writel(creg_val, phba->HCregaddr);
writel           12108 drivers/scsi/lpfc/lpfc_sli.c 			writel(0, phba->HCregaddr);
writel           12402 drivers/scsi/lpfc/lpfc_sli.c 		writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
writel           12405 drivers/scsi/lpfc/lpfc_sli.c 		writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
writel           12407 drivers/scsi/lpfc/lpfc_sli.c 		writel(hc_copy, phba->HCregaddr);
writel           12427 drivers/scsi/lpfc/lpfc_sli.c 				writel(control, phba->HCregaddr);
writel           12463 drivers/scsi/lpfc/lpfc_sli.c 					writel(control, phba->HCregaddr);
writel           12491 drivers/scsi/lpfc/lpfc_sli.c 				writel(0, phba->HCregaddr);
writel           12674 drivers/scsi/lpfc/lpfc_sli.c 		writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
writel           12777 drivers/scsi/lpfc/lpfc_sli.c 	writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
writel           12780 drivers/scsi/lpfc/lpfc_sli.c 	writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
writel           12781 drivers/scsi/lpfc/lpfc_sli.c 	writel(hc_copy, phba->HCregaddr);
writel            114 drivers/scsi/mac53c94.c 	writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
writel            140 drivers/scsi/mac53c94.c 	writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
writel            220 drivers/scsi/mac53c94.c 		writel(RUN << 16, &dma->control);	/* stop dma */
writel            276 drivers/scsi/mac53c94.c 			writel(virt_to_phys(state->dma_cmds), &dma->cmdptr);
writel            277 drivers/scsi/mac53c94.c 			writel((RUN << 16) | RUN, &dma->control);
writel            315 drivers/scsi/mac53c94.c 		writel(RUN << 16, &dma->control);	/* stop dma */
writel             77 drivers/scsi/megaraid.c #define WRINDOOR(adapter,value)	 writel(value, (adapter)->mmio_base + 0x20)
writel             78 drivers/scsi/megaraid.c #define WROUTDOOR(adapter,value) writel(value, (adapter)->mmio_base + 0x2C)
writel            229 drivers/scsi/megaraid/megaraid_mbox.h #define WRINDOOR(rdev, value)	writel(value, (rdev)->baseaddr + 0x20)
writel            230 drivers/scsi/megaraid/megaraid_mbox.h #define WROUTDOOR(rdev, value)	writel(value, (rdev)->baseaddr + 0x2C)
writel            445 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(0, &(regs)->outbound_intr_mask);
writel            462 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(mask, &regs->outbound_intr_mask);
writel            502 drivers/scsi/megaraid/megaraid_sas_base.c 		writel(status, &regs->outbound_intr_status);
writel            525 drivers/scsi/megaraid/megaraid_sas_base.c 	writel((frame_phys_addr >> 3)|(frame_count),
writel            541 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(MFI_ADP_RESET, &regs->inbound_doorbell);
writel            622 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
writel            624 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(~0x80000000, &(regs)->outbound_intr_mask);
writel            641 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(mask, &regs->outbound_intr_mask);
writel            681 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(status, &regs->outbound_doorbell_clear);
writel            704 drivers/scsi/megaraid/megaraid_sas_base.c 	writel((frame_phys_addr | (frame_count<<1))|1,
writel            749 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
writel            751 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
writel            768 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(mask, &regs->outbound_intr_mask);
writel            816 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(status, &regs->outbound_intr_status);
writel            841 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(upper_32_bits(frame_phys_addr),
writel            843 drivers/scsi/megaraid/megaraid_sas_base.c 	writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
writel            894 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
writel            897 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
writel            914 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(mask, &regs->outbound_intr_mask);
writel            957 drivers/scsi/megaraid/megaraid_sas_base.c 		writel(status, &regs->outbound_doorbell_clear);
writel            979 drivers/scsi/megaraid/megaraid_sas_base.c 	writel((frame_phys_addr | (frame_count<<1))|1,
writel           1002 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(0, seq_offset);
writel           1003 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(4, seq_offset);
writel           1004 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(0xb, seq_offset);
writel           1005 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(2, seq_offset);
writel           1006 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(7, seq_offset);
writel           1007 drivers/scsi/megaraid/megaraid_sas_base.c 	writel(0xd, seq_offset);
writel           1026 drivers/scsi/megaraid/megaraid_sas_base.c 	writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
writel           2161 drivers/scsi/megaraid/megaraid_sas_base.c 			writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
writel           2168 drivers/scsi/megaraid/megaraid_sas_base.c 		writel(MFI_STOP_ADP,
writel           4025 drivers/scsi/megaraid/megaraid_sas_base.c 				writel(
writel           4029 drivers/scsi/megaraid/megaraid_sas_base.c 				writel(
writel           4042 drivers/scsi/megaraid/megaraid_sas_base.c 				writel(MFI_INIT_HOTPLUG,
writel           4045 drivers/scsi/megaraid/megaraid_sas_base.c 				writel(MFI_INIT_HOTPLUG,
writel           4061 drivers/scsi/megaraid/megaraid_sas_base.c 				writel(MFI_RESET_FLAGS,
writel           4077 drivers/scsi/megaraid/megaraid_sas_base.c 				writel(MFI_RESET_FLAGS,
writel            187 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(~0, &regs->outbound_intr_status);
writel            190 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(~MFI_FUSION_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
writel            209 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(mask, &regs->outbound_intr_mask);
writel            228 drivers/scsi/megaraid/megaraid_sas_fusion.c 		writel(status, &regs->outbound_intr_status);
writel            283 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(le32_to_cpu(req_desc->u.low),
writel            285 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(le32_to_cpu(req_desc->u.high),
writel            304 drivers/scsi/megaraid/megaraid_sas_fusion.c 		writel(le32_to_cpu(req_desc->u.low),
writel           3649 drivers/scsi/megaraid/megaraid_sas_fusion.c 				writel(((MSIxIndex & 0x7) << 24) |
writel           3653 drivers/scsi/megaraid/megaraid_sas_fusion.c 				writel((MSIxIndex << 24) |
writel           3671 drivers/scsi/megaraid/megaraid_sas_fusion.c 			writel(((MSIxIndex & 0x7) << 24) |
writel           3675 drivers/scsi/megaraid/megaraid_sas_fusion.c 			writel((MSIxIndex << 24) |
writel           3989 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &instance->reg_set->fusion_seq_offset);
writel           3990 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(MPI2_WRSEQ_1ST_KEY_VALUE, &instance->reg_set->fusion_seq_offset);
writel           3991 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(MPI2_WRSEQ_2ND_KEY_VALUE, &instance->reg_set->fusion_seq_offset);
writel           3992 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(MPI2_WRSEQ_3RD_KEY_VALUE, &instance->reg_set->fusion_seq_offset);
writel           3993 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(MPI2_WRSEQ_4TH_KEY_VALUE, &instance->reg_set->fusion_seq_offset);
writel           3994 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(MPI2_WRSEQ_5TH_KEY_VALUE, &instance->reg_set->fusion_seq_offset);
writel           3995 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(MPI2_WRSEQ_6TH_KEY_VALUE, &instance->reg_set->fusion_seq_offset);
writel           4015 drivers/scsi/megaraid/megaraid_sas_fusion.c 	writel(host_diag | HOST_DIAG_RESET_ADAPTER,
writel           4077 drivers/scsi/megaraid/megaraid_sas_fusion.c 		writel(MFI_ADP_TRIGGER_SNAP_DUMP,
writel           4826 drivers/scsi/megaraid/megaraid_sas_fusion.c 		writel(status_reg | MFI_STATE_FORCE_OCR,
writel           5084 drivers/scsi/megaraid/megaraid_sas_fusion.c 			writel(status_reg,
writel           5124 drivers/scsi/megaraid/megaraid_sas_fusion.c 		writel(status_reg, &instance->reg_set->outbound_scratch_pad_0);
writel           5137 drivers/scsi/megaraid/megaraid_sas_fusion.c 		writel(status_reg, &instance->reg_set->outbound_scratch_pad_0);
writel            232 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(reply, reply_free_iomem);
writel            250 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel((u32)src_virt_mem[i],
writel            268 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel((u32)src_virt_mem[i],
writel            774 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(0xC0FFEE00, &ioc->chip->Doorbell);
writel           1381 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(him_register, &ioc->chip->HostInterruptMask);
writel           1398 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(him_register, &ioc->chip->HostInterruptMask);
writel           1511 drivers/scsi/mpt3sas/mpt3sas_base.c 				writel(ioc->reply_free_host_index,
writel           1532 drivers/scsi/mpt3sas/mpt3sas_base.c 				writel(reply_q->reply_post_host_index |
writel           1537 drivers/scsi/mpt3sas/mpt3sas_base.c 				writel(reply_q->reply_post_host_index |
writel           1565 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(reply_q->reply_post_host_index,
writel           1587 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(reply_q->reply_post_host_index | ((msix_index  & 7) <<
writel           1591 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(reply_q->reply_post_host_index | (msix_index <<
writel           3918 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
writel           3940 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
writel           3963 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
writel           3984 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
writel           5610 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
writel           5691 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(0, &ioc->chip->HostInterruptStatus);
writel           5694 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
writel           5703 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(0, &ioc->chip->HostInterruptStatus);
writel           5713 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
writel           5734 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(0, &ioc->chip->HostInterruptStatus);
writel           5742 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(0, &ioc->chip->HostInterruptStatus);
writel           5756 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(0, &ioc->chip->HostInterruptStatus);
writel           5765 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(0, &ioc->chip->HostInterruptStatus);
writel           6570 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6571 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6572 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6573 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6574 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6575 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6576 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6594 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
writel           6620 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(host_diagnostic, &ioc->chip->HostDiagnostic);
writel           6623 drivers/scsi/mpt3sas/mpt3sas_base.c 		writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
writel           6628 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
writel           6633 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
writel           6846 drivers/scsi/mpt3sas/mpt3sas_base.c 	writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
writel           6851 drivers/scsi/mpt3sas/mpt3sas_base.c 			writel((reply_q->msix_index & 7)<<
writel           6855 drivers/scsi/mpt3sas/mpt3sas_base.c 			writel(reply_q->msix_index <<
writel            336 drivers/scsi/mvsas/mv_64xx.c 		writel(0x0E008000, regs + 0x000);
writel            337 drivers/scsi/mvsas/mv_64xx.c 		writel(0x59000008, regs + 0x004);
writel            338 drivers/scsi/mvsas/mv_64xx.c 		writel(0x20, regs + 0x008);
writel            339 drivers/scsi/mvsas/mv_64xx.c 		writel(0x20, regs + 0x00c);
writel            340 drivers/scsi/mvsas/mv_64xx.c 		writel(0x20, regs + 0x010);
writel            341 drivers/scsi/mvsas/mv_64xx.c 		writel(0x20, regs + 0x014);
writel            342 drivers/scsi/mvsas/mv_64xx.c 		writel(0x20, regs + 0x018);
writel            343 drivers/scsi/mvsas/mv_64xx.c 		writel(0x20, regs + 0x01c);
writel            477 drivers/scsi/mvsas/mv_94xx.c 		writel(0x0E008000, regs + 0x000);
writel            478 drivers/scsi/mvsas/mv_94xx.c 		writel(0x59000008, regs + 0x004);
writel            479 drivers/scsi/mvsas/mv_94xx.c 		writel(0x20, regs + 0x008);
writel            480 drivers/scsi/mvsas/mv_94xx.c 		writel(0x20, regs + 0x00c);
writel            481 drivers/scsi/mvsas/mv_94xx.c 		writel(0x20, regs + 0x010);
writel            482 drivers/scsi/mvsas/mv_94xx.c 		writel(0x20, regs + 0x014);
writel            483 drivers/scsi/mvsas/mv_94xx.c 		writel(0x20, regs + 0x018);
writel            484 drivers/scsi/mvsas/mv_94xx.c 		writel(0x20, regs + 0x01c);
writel            600 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x0C);
writel            601 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x10);
writel            602 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x14);
writel            603 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x18);
writel            616 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x0C);
writel            617 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x10);
writel            618 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x14);
writel            619 drivers/scsi/mvsas/mv_94xx.c 	writel(tmp, regs + 0x18);
writel             15 drivers/scsi/mvsas/mv_chips.h #define mw32(reg, val)	writel((val), regs + reg)
writel             73 drivers/scsi/mvsas/mv_chips.h 		writel(val, regs + port * 8);
writel             75 drivers/scsi/mvsas/mv_chips.h 		writel(val, regs2 + (port - 4) * 8);
writel           2655 drivers/scsi/myrb.c 	writel(mbox->words[0], base + DAC960_LA_CMDOP_OFFSET);
writel           2656 drivers/scsi/myrb.c 	writel(mbox->words[1], base + DAC960_LA_MBOX4_OFFSET);
writel           2657 drivers/scsi/myrb.c 	writel(mbox->words[2], base + DAC960_LA_MBOX8_OFFSET);
writel           2826 drivers/scsi/myrb.c 	writel(DAC960_PG_IDB_HWMBOX_NEW_CMD, base + DAC960_PG_IDB_OFFSET);
writel           2831 drivers/scsi/myrb.c 	writel(DAC960_PG_IDB_HWMBOX_ACK_STS, base + DAC960_PG_IDB_OFFSET);
writel           2836 drivers/scsi/myrb.c 	writel(DAC960_PG_IDB_GEN_IRQ, base + DAC960_PG_IDB_OFFSET);
writel           2841 drivers/scsi/myrb.c 	writel(DAC960_PG_IDB_CTRL_RESET, base + DAC960_PG_IDB_OFFSET);
writel           2846 drivers/scsi/myrb.c 	writel(DAC960_PG_IDB_MMBOX_NEW_CMD, base + DAC960_PG_IDB_OFFSET);
writel           2865 drivers/scsi/myrb.c 	writel(DAC960_PG_ODB_HWMBOX_ACK_IRQ, base + DAC960_PG_ODB_OFFSET);
writel           2870 drivers/scsi/myrb.c 	writel(DAC960_PG_ODB_MMBOX_ACK_IRQ, base + DAC960_PG_ODB_OFFSET);
writel           2875 drivers/scsi/myrb.c 	writel(DAC960_PG_ODB_HWMBOX_ACK_IRQ | DAC960_PG_ODB_MMBOX_ACK_IRQ,
writel           2898 drivers/scsi/myrb.c 	writel(imask, base + DAC960_PG_IRQMASK_OFFSET);
writel           2905 drivers/scsi/myrb.c 	writel(imask, base + DAC960_PG_IRQMASK_OFFSET);
writel           2931 drivers/scsi/myrb.c 	writel(mbox->words[0], base + DAC960_PG_CMDOP_OFFSET);
writel           2932 drivers/scsi/myrb.c 	writel(mbox->words[1], base + DAC960_PG_MBOX4_OFFSET);
writel           2933 drivers/scsi/myrb.c 	writel(mbox->words[2], base + DAC960_PG_MBOX8_OFFSET);
writel           3168 drivers/scsi/myrb.c 	writel(mbox->words[0], base + DAC960_PD_CMDOP_OFFSET);
writel           3169 drivers/scsi/myrb.c 	writel(mbox->words[1], base + DAC960_PD_MBOX4_OFFSET);
writel           3170 drivers/scsi/myrb.c 	writel(mbox->words[2], base + DAC960_PD_MBOX8_OFFSET);
writel           2406 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_IDB_READ_OFFSET);
writel           2413 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_IDB_CLEAR_OFFSET);
writel           2420 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_IDB_READ_OFFSET);
writel           2427 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_IDB_READ_OFFSET);
writel           2434 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_IDB_READ_OFFSET);
writel           2457 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_ODB_CLEAR_OFFSET);
writel           2464 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_ODB_CLEAR_OFFSET);
writel           2472 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_ODB_CLEAR_OFFSET);
writel           2495 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_IRQMASK_CLEAR_OFFSET);
writel           2502 drivers/scsi/myrs.c 	writel(val, base + DAC960_GEM_IRQMASK_READ_OFFSET);
writel           2555 drivers/scsi/myrs.c 	writel(0x03000000, base + DAC960_GEM_ERRSTS_CLEAR_OFFSET);
writel           1035 drivers/scsi/myrs.h 	writel(u.wl[0], write_address);
writel           1036 drivers/scsi/myrs.h 	writel(u.wl[1], write_address + 4);
writel            285 drivers/scsi/ncr53c8xx.h #define	writel_b2l	writel
writel            289 drivers/scsi/ncr53c8xx.h #define	writel_raw	writel
writel            304 drivers/scsi/ncr53c8xx.h #define	writel_raw	writel
writel            103 drivers/scsi/nsp32_io.h 	writel(cpu_to_le32(val), ptr);
writel            257 drivers/scsi/pcmcia/nsp_io.h 		writel(*tmp, ptr);
writel             63 drivers/scsi/pm8001/pm8001_chips.h 	writel(val, pm8001_ha->io_mem[bar].memvirtaddr + addr);
writel             71 drivers/scsi/pm8001/pm8001_chips.h 	writel(val, addr + offset);
writel            799 drivers/scsi/qedf/qedf_io.c 	writel(*(u32 *)&dbell, fcport->p_doorbell);
writel            976 drivers/scsi/qedi/qedi_fw.c 	writel(*(u32 *)&dbell, qedi_conn->ep->p_doorbell);
writel            136 drivers/scsi/qla2xxx/qla_def.h #define WRT_REG_DWORD(addr, data)	writel(data, addr)
writel            368 drivers/scsi/qla2xxx/qla_nx.c 	writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase);
writel            493 drivers/scsi/qla2xxx/qla_nx.c 	writel(data, (void __iomem *)off);
writel            818 drivers/scsi/qla2xxx/qla_nx.c 		writel(*(u32 *)data, addr);
writel             43 drivers/scsi/qla2xxx/qla_nx2.c 	writel(val, (void __iomem *)((ha)->nx_pcibase + addr));
writel             23 drivers/scsi/qla4xxx/ql4_83xx.c 	writel(val, (void __iomem *)(ha->nx_pcibase + addr));
writel           1277 drivers/scsi/qla4xxx/ql4_83xx.c 		writel(mb_int, &ha->qla4_83xx_reg->mbox_int);
writel           1278 drivers/scsi/qla4xxx/ql4_83xx.c 		writel(1, &ha->qla4_83xx_reg->leg_int_mask);
writel           1302 drivers/scsi/qla4xxx/ql4_83xx.c 		writel(mb_int, &ha->qla4_83xx_reg->mbox_int);
writel           1303 drivers/scsi/qla4xxx/ql4_83xx.c 		writel(0, &ha->qla4_83xx_reg->leg_int_mask);
writel           1323 drivers/scsi/qla4xxx/ql4_83xx.c 		writel(mbx_cmd[i], &ha->qla4_83xx_reg->mailbox_in[i]);
writel           1325 drivers/scsi/qla4xxx/ql4_83xx.c 	writel(mbx_cmd[0], &ha->qla4_83xx_reg->mailbox_in[0]);
writel           1330 drivers/scsi/qla4xxx/ql4_83xx.c 	writel(HINT_MBX_INT_PENDING, &ha->qla4_83xx_reg->host_intr);
writel            125 drivers/scsi/qla4xxx/ql4_dbg.c 		writel(HOST_MEM_CFG_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
writel            130 drivers/scsi/qla4xxx/ql4_dbg.c 		writel(PORT_CTRL_STAT_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
writel            104 drivers/scsi/qla4xxx/ql4_init.c 		writel(0,
writel            106 drivers/scsi/qla4xxx/ql4_init.c 		writel(0,
writel            108 drivers/scsi/qla4xxx/ql4_init.c 		writel(0,
writel            111 drivers/scsi/qla4xxx/ql4_init.c 		writel(0,
writel            113 drivers/scsi/qla4xxx/ql4_init.c 		writel(0,
writel            115 drivers/scsi/qla4xxx/ql4_init.c 		writel(0,
writel            129 drivers/scsi/qla4xxx/ql4_init.c 		writel(0, &ha->reg->req_q_in);
writel            130 drivers/scsi/qla4xxx/ql4_init.c 		writel(0, &ha->reg->rsp_q_out);
writel            642 drivers/scsi/qla4xxx/ql4_init.c 	writel((0xFFFF << 16) | extHwConfig.Asuint32_t, isp_ext_hw_conf(ha));
writel            703 drivers/scsi/qla4xxx/ql4_init.c 	writel(jiffies, &ha->reg->mailbox[7]);
writel            705 drivers/scsi/qla4xxx/ql4_init.c 		writel(set_rmask(NVR_WRITE_ENABLE),
writel            708 drivers/scsi/qla4xxx/ql4_init.c         writel(2, &ha->reg->mailbox[6]);
writel            711 drivers/scsi/qla4xxx/ql4_init.c 	writel(set_rmask(CSR_BOOT_ENABLE), &ha->reg->ctrl_status);
writel            745 drivers/scsi/qla4xxx/ql4_init.c 		writel(set_rmask(CSR_SCSI_PROCESSOR_INTR),
writel            828 drivers/scsi/qla4xxx/ql4_init.c 			writel(set_rmask(CSR_SCSI_PROCESSOR_INTR),
writel            831 drivers/scsi/qla4xxx/ql4_init.c 			writel(set_rmask(CSR_SCSI_COMPLETION_INTR),
writel             42 drivers/scsi/qla4xxx/ql4_inline.h 		writel(set_rmask(IMR_SCSI_INTR_ENABLE),
writel             46 drivers/scsi/qla4xxx/ql4_inline.h 		writel(set_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status);
writel             56 drivers/scsi/qla4xxx/ql4_inline.h 		writel(clr_rmask(IMR_SCSI_INTR_ENABLE),
writel             60 drivers/scsi/qla4xxx/ql4_inline.h 		writel(clr_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status);
writel            197 drivers/scsi/qla4xxx/ql4_iocb.c 	writel(ha->request_in, &ha->qla4_83xx_reg->req_q_in);
writel            203 drivers/scsi/qla4xxx/ql4_iocb.c 	writel(ha->response_out, &ha->qla4_83xx_reg->rsp_q_out);
writel            234 drivers/scsi/qla4xxx/ql4_iocb.c 	writel(ha->response_out, &ha->qla4_82xx_reg->rsp_q_out);
writel            247 drivers/scsi/qla4xxx/ql4_iocb.c 	writel(ha->request_in, &ha->reg->req_q_in);
writel            261 drivers/scsi/qla4xxx/ql4_iocb.c 	writel(ha->response_out, &ha->reg->rsp_q_out);
writel           1035 drivers/scsi/qla4xxx/ql4_isr.c 		writel(0, &ha->qla4_83xx_reg->risc_intr);
writel           1041 drivers/scsi/qla4xxx/ql4_isr.c 	writel(0, &ha->qla4_83xx_reg->mb_int_mask);
writel           1065 drivers/scsi/qla4xxx/ql4_isr.c 	writel(0, &ha->qla4_82xx_reg->host_int);
writel           1089 drivers/scsi/qla4xxx/ql4_isr.c 		writel(set_rmask(CSR_SCSI_PROCESSOR_INTR),
writel           1109 drivers/scsi/qla4xxx/ql4_isr.c 		writel(0, &ha->qla4_82xx_reg->host_int);
writel           1174 drivers/scsi/qla4xxx/ql4_isr.c 				writel(set_rmask(CSR_SOFT_RESET),
writel           1179 drivers/scsi/qla4xxx/ql4_isr.c 			writel(set_rmask(CSR_FATAL_ERROR),
writel           1192 drivers/scsi/qla4xxx/ql4_isr.c 			writel(set_rmask(CSR_SCSI_RESET_INTR),
writel           1314 drivers/scsi/qla4xxx/ql4_isr.c 	writel(0, &ha->qla4_83xx_reg->leg_int_trig);
writel           1367 drivers/scsi/qla4xxx/ql4_isr.c 		writel(ival, &ha->qla4_83xx_reg->mb_int_mask);
writel           1373 drivers/scsi/qla4xxx/ql4_isr.c 	writel(0, &ha->qla4_83xx_reg->risc_intr);
writel           1376 drivers/scsi/qla4xxx/ql4_isr.c 	writel(ival, &ha->qla4_83xx_reg->mb_int_mask);
writel           1445 drivers/scsi/qla4xxx/ql4_isr.c 		writel(0, &ha->qla4_83xx_reg->iocb_int_mask);
writel           1450 drivers/scsi/qla4xxx/ql4_isr.c 			writel(0, &ha->qla4_82xx_reg->host_int);
writel             22 drivers/scsi/qla4xxx/ql4_mbx.c 		writel(mbx_cmd[i], &ha->reg->mailbox[i]);
writel             25 drivers/scsi/qla4xxx/ql4_mbx.c 	writel(mbx_cmd[0], &ha->reg->mailbox[0]);
writel             27 drivers/scsi/qla4xxx/ql4_mbx.c 	writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
writel             15 drivers/scsi/qla4xxx/ql4_nvram.c 	writel(cmd, isp_nvram(ha));
writel            213 drivers/scsi/qla4xxx/ql4_nvram.c 		writel((sem_mask | sem_bits), isp_semaphore(ha));
writel            232 drivers/scsi/qla4xxx/ql4_nvram.c 	writel(sem_mask, isp_semaphore(ha));
writel            246 drivers/scsi/qla4xxx/ql4_nvram.c 	writel((sem_mask | sem_bits), isp_semaphore(ha));
writel            365 drivers/scsi/qla4xxx/ql4_nx.c 	writel(ha->crb_win,
writel            395 drivers/scsi/qla4xxx/ql4_nx.c 	writel(data, (void __iomem *)off);
writel            434 drivers/scsi/qla4xxx/ql4_nx.c 	writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase));
writel            460 drivers/scsi/qla4xxx/ql4_nx.c 	writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase));
writel            473 drivers/scsi/qla4xxx/ql4_nx.c 		writel(data, (void __iomem *)(off_value + CRB_INDIRECT_2M +
writel            839 drivers/scsi/qla4xxx/ql4_nx.c 		writel(*(u32 *)data, addr);
writel           3617 drivers/scsi/qla4xxx/ql4_nx.c 		writel(0, &ha->qla4_83xx_reg->risc_intr);
writel           3620 drivers/scsi/qla4xxx/ql4_nx.c 		writel(0, &ha->qla4_82xx_reg->host_int);
writel           3930 drivers/scsi/qla4xxx/ql4_nx.c 		writel(mbx_cmd[i], &ha->qla4_82xx_reg->mailbox_in[i]);
writel           3933 drivers/scsi/qla4xxx/ql4_nx.c 	writel(mbx_cmd[0], &ha->qla4_82xx_reg->mailbox_in[0]);
writel           3935 drivers/scsi/qla4xxx/ql4_nx.c 	writel(HINT_MBX_INT_PENDING, &ha->qla4_82xx_reg->hint);
writel           4654 drivers/scsi/qla4xxx/ql4_os.c 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);
writel           4657 drivers/scsi/qla4xxx/ql4_os.c 	writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status);
writel           4699 drivers/scsi/qla4xxx/ql4_os.c 		writel(set_rmask(CSR_NET_RESET_INTR), &ha->reg->ctrl_status);
writel           4726 drivers/scsi/qla4xxx/ql4_os.c 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);
writel           4740 drivers/scsi/qla4xxx/ql4_os.c 		writel(set_rmask(CSR_FORCE_SOFT_RESET), &ha->reg->ctrl_status);
writel           5453 drivers/scsi/qla4xxx/ql4_os.c 		writel(set_rmask(CSR_SCSI_PROCESSOR_INTR),
writel           5457 drivers/scsi/qla4xxx/ql4_os.c 		writel(0, &ha->qla4_82xx_reg->host_int);
writel           5460 drivers/scsi/qla4xxx/ql4_os.c 		writel(0, &ha->qla4_83xx_reg->risc_intr);
writel           2985 drivers/scsi/smartpqi/smartpqi_init.c 		writel(oq_ci, queue_group->oq_ci);
writel           3045 drivers/scsi/smartpqi/smartpqi_init.c 	writel(iq_pi, queue_group->iq_pi[RAID_PATH]);
writel           3335 drivers/scsi/smartpqi/smartpqi_init.c 		writel(oq_ci, event_queue->oq_ci);
writel           3360 drivers/scsi/smartpqi/smartpqi_init.c 	writel(intx_mask, register_addr);
writel           3785 drivers/scsi/smartpqi/smartpqi_init.c 	writel(reg, &pqi_registers->admin_iq_num_elements);
writel           3786 drivers/scsi/smartpqi/smartpqi_init.c 	writel(PQI_CREATE_ADMIN_QUEUE_PAIR,
writel           3836 drivers/scsi/smartpqi/smartpqi_init.c 	writel(iq_pi, admin_queues->iq_pi);
writel           3873 drivers/scsi/smartpqi/smartpqi_init.c 	writel(oq_ci, admin_queues->oq_ci);
writel           3952 drivers/scsi/smartpqi/smartpqi_init.c 		writel(iq_pi, queue_group->iq_pi[path]);
writel           6616 drivers/scsi/smartpqi/smartpqi_init.c 	writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset);
writel           7248 drivers/scsi/smartpqi/smartpqi_init.c 	writel(0, admin_queues->oq_pi);
writel           7255 drivers/scsi/smartpqi/smartpqi_init.c 		writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]);
writel           7256 drivers/scsi/smartpqi/smartpqi_init.c 		writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]);
writel           7257 drivers/scsi/smartpqi/smartpqi_init.c 		writel(0, ctrl_info->queue_groups[i].oq_pi);
writel           7261 drivers/scsi/smartpqi/smartpqi_init.c 	writel(0, event_queue->oq_pi);
writel            169 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(cmd, &registers->sis_mailbox[0]);
writel            176 drivers/scsi/smartpqi/smartpqi_sis.c 		writel(params->mailbox[i], &registers->sis_mailbox[i]);
writel            179 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(SIS_CLEAR_CTRL_TO_HOST_DOORBELL,
writel            183 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(~0, &registers->sis_interrupt_mask);
writel            192 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(SIS_CMD_READY, &registers->sis_host_to_ctrl_doorbell);
writel            372 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(bit, &ctrl_info->registers->sis_host_to_ctrl_doorbell);
writel            393 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(SIS_TRIGGER_SHUTDOWN,
writel            409 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(value, &ctrl_info->registers->sis_driver_scratch);
writel            419 drivers/scsi/smartpqi/smartpqi_sis.c 	writel(SIS_SOFT_RESET,
writel             36 drivers/scsi/snic/vnic_dev.h 	writel(lower_32_bits(val), reg);
writel             37 drivers/scsi/snic/vnic_dev.h 	writel(upper_32_bits(val), reg + 0x4UL);
writel            525 drivers/scsi/stex.c 	writel(hba->req_head, hba->mmio_base + IMR0);
writel            526 drivers/scsi/stex.c 	writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
writel            555 drivers/scsi/stex.c 		writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI);
writel            556 drivers/scsi/stex.c 		writel(addr, hba->mmio_base + YH2I_REQ);
writel            558 drivers/scsi/stex.c 		writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI);
writel            560 drivers/scsi/stex.c 		writel(addr, hba->mmio_base + YH2I_REQ);
writel            878 drivers/scsi/stex.c 	writel(hba->status_head, base + IMR1);
writel            895 drivers/scsi/stex.c 		writel(data, base + ODBL);
writel            996 drivers/scsi/stex.c 			writel(data, base + YI2H_INT_C);
writel           1008 drivers/scsi/stex.c 				writel(data, base + PSCRATCH1);
writel           1009 drivers/scsi/stex.c 				writel((1 << 22), base + YH2I_INT);
writel           1033 drivers/scsi/stex.c 		writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
writel           1074 drivers/scsi/stex.c 	writel(status_phys, base + IMR0);
writel           1076 drivers/scsi/stex.c 	writel((status_phys >> 16) >> 16, base + IMR1);
writel           1079 drivers/scsi/stex.c 	writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
writel           1081 drivers/scsi/stex.c 	writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
writel           1097 drivers/scsi/stex.c 	writel(0, base + IMR0);
writel           1099 drivers/scsi/stex.c 	writel(0, base + OMR0);
writel           1101 drivers/scsi/stex.c 	writel(0, base + IMR1);
writel           1103 drivers/scsi/stex.c 	writel(0, base + OMR1);
writel           1165 drivers/scsi/stex.c 		writel(data, base + YINT_EN);
writel           1166 drivers/scsi/stex.c 		writel((hba->dma_handle >> 16) >> 16, base + YH2I_REQ_HI);
writel           1168 drivers/scsi/stex.c 		writel(hba->dma_handle, base + YH2I_REQ);
writel           1174 drivers/scsi/stex.c 		writel(data, base + YINT_EN);
writel           1177 drivers/scsi/stex.c 			writel((1 << 6), base + YH2I_INT);
writel           1180 drivers/scsi/stex.c 		writel((hba->dma_handle >> 16) >> 16, base + YH2I_REQ_HI);
writel           1181 drivers/scsi/stex.c 		writel(hba->dma_handle, base + YH2I_REQ);
writel           1271 drivers/scsi/stex.c 		writel(data, base + YI2H_INT_C);
writel           1278 drivers/scsi/stex.c 			writel(data, base + PSCRATCH1);
writel           1279 drivers/scsi/stex.c 			writel((1 << 22), base + YH2I_INT);
writel           1287 drivers/scsi/stex.c 		writel(data, base + ODBL);
writel           1353 drivers/scsi/stex.c 	writel(MU_INBOUND_DOORBELL_RESET, base + IDBL);
writel           1379 drivers/scsi/stex.c 	writel(SS_H2I_INT_RESET, hba->mmio_base + YH2I_INT);
writel           1386 drivers/scsi/stex.c 	writel(SS_H2I_INT_RESET, hba->mmio_base + YH2I_INT);
writel             46 drivers/scsi/sun3x_esp.c 	writel((VAL), esp->dma_regs + (REG))
writel            105 drivers/scsi/sym53c8xx_2/sym_glue.h #define	writel_b2l	writel
writel            112 drivers/scsi/sym53c8xx_2/sym_glue.h #define	writel_raw	writel
writel            107 drivers/scsi/ufs/ufs-hisi.h 	writel((val), (host)->ufs_sys_ctrl + (reg))
writel            781 drivers/scsi/ufs/ufshcd.h 	writel((val), (hba)->mmio_base + (reg))
writel            212 drivers/scsi/vmw_pvscsi.c 	writel(val, adapter->mmioBase + offset);
writel            255 drivers/slimbus/qcom-ctrl.c 	writel(MGR_INT_RX_MSG_RCVD, ctrl->base +
writel            603 drivers/slimbus/qcom-ctrl.c 	writel(1, ctrl->base + CFG_PORT(COMP_CFG, ver));
writel            604 drivers/slimbus/qcom-ctrl.c 	writel((EE_MGR_RSC_GRP | EE_NGD_2 | EE_NGD_1),
writel            607 drivers/slimbus/qcom-ctrl.c 	writel((MGR_INT_TX_NACKED_2 |
writel            610 drivers/slimbus/qcom-ctrl.c 	writel(1, ctrl->base + MGR_CFG);
writel            612 drivers/slimbus/qcom-ctrl.c 	writel((1 << INTR_WAKE) | (0xA << REF_CLK_GEAR) |
writel            615 drivers/slimbus/qcom-ctrl.c 	writel(MGR_CFG_ENABLE, ctrl->base + MGR_CFG);
writel            616 drivers/slimbus/qcom-ctrl.c 	writel(1, ctrl->base + INTF_CFG);
writel            617 drivers/slimbus/qcom-ctrl.c 	writel(1, ctrl->base + CFG_PORT(COMP_CFG, ver));
writel            761 drivers/slimbus/qcom-ngd-ctrl.c 	writel(stat, base + NGD_INT_CLR);
writel             32 drivers/soc/actions/owl-sps-helper.c 	writel(val, base + OWL_SPS_PG_CTL);
writel            110 drivers/soc/bcm/bcm2835-power.c #define PM_WRITE(reg, val) writel(PM_PASSWORD | (val), power->base + (reg))
writel            130 drivers/soc/bcm/bcm2835-power.c #define ASB_WRITE(reg, val) writel(PM_PASSWORD | (val), power->asb + (reg))
writel             51 drivers/soc/bcm/brcmstb/biuctrl.c 	writel(val, cpubiuctrl_base + offset);
writel            274 drivers/soc/dove/pmu.c 	writel(0, pmu->pmc_base + PMC_IRQ_MASK);
writel            275 drivers/soc/dove/pmu.c 	writel(0, pmu->pmc_base + PMC_IRQ_CAUSE);
writel           1007 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(val, wrp->base + wrp->master->regs[reg]);
writel           1482 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(0x7f, wrp->bridge_base + PWRAP_MT8135_BRIDGE_IORD_ARB_EN);
writel           1483 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS3_EN);
writel           1484 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WACS4_EN);
writel           1485 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_UNIT);
writel           1486 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(0xffff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_WDT_SRC_EN);
writel           1487 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(0x1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_TIMER_EN);
writel           1488 drivers/soc/mediatek/mtk-pmic-wrap.c 	writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
writel           1634 drivers/soc/mediatek/mtk-pmic-wrap.c 		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
writel           1635 drivers/soc/mediatek/mtk-pmic-wrap.c 		writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
writel            211 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            213 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            222 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            225 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            228 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            231 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            293 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            302 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            305 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            308 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            311 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            314 drivers/soc/mediatek/mtk-scpsys.c 	writel(val, ctl_addr);
writel            146 drivers/soc/qcom/qcom_aoss.c 	writel(val, qmp->msgram + QMP_DESC_UCORE_LINK_STATE_ACK);
writel            149 drivers/soc/qcom/qcom_aoss.c 	writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
writel            159 drivers/soc/qcom/qcom_aoss.c 	writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
writel            170 drivers/soc/qcom/qcom_aoss.c 	writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_UCORE_CH_STATE_ACK);
writel            183 drivers/soc/qcom/qcom_aoss.c 	writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
writel            186 drivers/soc/qcom/qcom_aoss.c 	writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
writel            194 drivers/soc/qcom/qcom_aoss.c 	writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
writel            195 drivers/soc/qcom/qcom_aoss.c 	writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
writel            241 drivers/soc/qcom/qcom_aoss.c 	writel(len, qmp->msgram + qmp->offset);
writel            251 drivers/soc/qcom/qcom_aoss.c 		writel(0, qmp->msgram + qmp->offset);
writel             85 drivers/soc/qcom/rpmh-rsc.c 	writel(data, drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id);
writel            328 drivers/soc/qcom/smp2p.c 	writel(val, entry->value);
writel            164 drivers/soc/qcom/smsm.c 	writel(val, smsm->local_state);
writel            247 drivers/soc/qcom/smsm.c 		writel(val, entry->subscription + smsm->local_host);
writel            274 drivers/soc/qcom/smsm.c 		writel(val, entry->subscription + smsm->local_host);
writel            569 drivers/soc/qcom/smsm.c 		writel(0, entry->subscription + smsm->local_host);
writel             43 drivers/soc/renesas/r9a06g032-smp.c 	writel(__pa_symbol(secondary_startup), cpu_bootaddr);
writel            254 drivers/soc/sunxi/sunxi_sram.c 	writel(val | ((device << sram_data->offset) & mask),
writel             44 drivers/soc/tegra/flowctrl.c 	writel(value, tegra_flowctrl_base + offset);
writel            204 drivers/soc/tegra/fuse/fuse-tegra.c 	writel(reg, base + 0x48);
writel            212 drivers/soc/tegra/fuse/fuse-tegra.c 	writel(reg, base + 0x14);
writel            399 drivers/soc/tegra/pmc.c 		writel(value, pmc->base + offset);
writel            417 drivers/soc/tegra/pmc.c 		writel(value, pmc->scratch + offset);
writel           1963 drivers/soc/tegra/pmc.c 	writel(0x1, pmc->wake + WAKE_AOWAKE_STATUS_W(data->hwirq));
writel           1973 drivers/soc/tegra/pmc.c 	writel(value, pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(offset));
writel           1976 drivers/soc/tegra/pmc.c 	writel(!!on, pmc->wake + WAKE_AOWAKE_MASK_W(data->hwirq));
writel           2011 drivers/soc/tegra/pmc.c 	writel(value, pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq));
writel           2682 drivers/soc/tegra/pmc.c 	writel(value, wake + WAKE_AOWAKE_CTRL);
writel           2827 drivers/soc/tegra/pmc.c 	writel(value, pmc->base + pmc->soc->regs->scratch0);
writel           2837 drivers/soc/tegra/pmc.c 	writel(saved, pmc->base + pmc->soc->regs->scratch0);
writel             71 drivers/soc/ti/wkup_m3_ipc.c 	writel(AM33XX_M3_TXEV_ACK,
writel             77 drivers/soc/ti/wkup_m3_ipc.c 	writel(AM33XX_M3_TXEV_ENABLE,
writel             88 drivers/soc/ti/wkup_m3_ipc.c 	writel(val, m3_ipc->ipc_mem_base +
writel            201 drivers/soundwire/cadence_master.c 	writel(value, cdns->registers + offset);
writel            219 drivers/soundwire/cadence_master.c 	writel(value, cdns->registers + offset);
writel            123 drivers/soundwire/intel.c 	writel(value, base + offset);
writel            141 drivers/soundwire/intel.c 	writel(value, base + offset);
writel            159 drivers/soundwire/intel.c 	writel(value, base + offset);
writel             67 drivers/spi/spi-altera.c 		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
writel             68 drivers/spi/spi-altera.c 		writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
writel             70 drivers/spi/spi-altera.c 		writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
writel             72 drivers/spi/spi-altera.c 		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
writel             92 drivers/spi/spi-altera.c 	writel(txd, hw->base + ALTERA_SPI_TXDATA);
writel            129 drivers/spi/spi-altera.c 		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
writel            161 drivers/spi/spi-altera.c 		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
writel            198 drivers/spi/spi-altera.c 	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
writel            199 drivers/spi/spi-altera.c 	writel(0, hw->base + ALTERA_SPI_STATUS);	/* clear status reg */
writel            124 drivers/spi/spi-armada-3700.c 	writel(data, a3700_spi->base + offset);
writel            201 drivers/spi/spi-bcm2835.c 	writel(val, bs->regs + reg);
writel            154 drivers/spi/spi-bcm2835aux.c 	writel(val, bs->regs + reg);
writel             63 drivers/spi/spi-clps711x.c 	writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
writel             82 drivers/spi/spi-clps711x.c 		writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
writel             71 drivers/spi/spi-dw-mmio.c 		writel(sw_mode, dwsmscc->spi_mst + MSCC_SPI_MST_SW_MODE);
writel             98 drivers/spi/spi-dw-mmio.c 	writel(0, dwsmscc->spi_mst + MSCC_SPI_MST_SW_MODE);
writel            169 drivers/spi/spi-ep93xx.c 	writel(div_cpsr, espi->mmio + SSPCPSR);
writel            170 drivers/spi/spi-ep93xx.c 	writel(cr0, espi->mmio + SSPCR0);
writel            190 drivers/spi/spi-ep93xx.c 	writel(val, espi->mmio + SSPDR);
writel            445 drivers/spi/spi-ep93xx.c 		writel(0, espi->mmio + SSPICR);
writel            471 drivers/spi/spi-ep93xx.c 	writel(val, espi->mmio + SSPCR1);
writel            509 drivers/spi/spi-ep93xx.c 	writel(val, espi->mmio + SSPCR1);
writel            555 drivers/spi/spi-ep93xx.c 	writel(val, espi->mmio + SSPCR1);
writel            567 drivers/spi/spi-ep93xx.c 	writel(val, espi->mmio + SSPCR1);
writel            723 drivers/spi/spi-ep93xx.c 	writel(0, espi->mmio + SSPCR1);
writel            159 drivers/spi/spi-fsl-lpspi.c 	writel(val, fsl_lpspi->base + IMX7ULP_TDR);			\
writel            172 drivers/spi/spi-fsl-lpspi.c 	writel(enable, fsl_lpspi->base + IMX7ULP_IER);
writel            262 drivers/spi/spi-fsl-lpspi.c 			writel(temp, fsl_lpspi->base + IMX7ULP_TCR);
writel            299 drivers/spi/spi-fsl-lpspi.c 	writel(temp, fsl_lpspi->base + IMX7ULP_TCR);
writel            314 drivers/spi/spi-fsl-lpspi.c 	writel(temp, fsl_lpspi->base + IMX7ULP_FCR);
writel            345 drivers/spi/spi-fsl-lpspi.c 	writel(scldiv | (scldiv << 8) | ((scldiv >> 1) << 16),
writel            420 drivers/spi/spi-fsl-lpspi.c 	writel(temp, fsl_lpspi->base + IMX7ULP_CFGR1);
writel            424 drivers/spi/spi-fsl-lpspi.c 	writel(temp, fsl_lpspi->base + IMX7ULP_CR);
writel            429 drivers/spi/spi-fsl-lpspi.c 	writel(temp, fsl_lpspi->base + IMX7ULP_DER);
writel            527 drivers/spi/spi-fsl-lpspi.c 	writel(temp, fsl_lpspi->base + IMX7ULP_SR);
writel            531 drivers/spi/spi-fsl-lpspi.c 	writel(temp, fsl_lpspi->base + IMX7ULP_CR);
writel            775 drivers/spi/spi-fsl-lpspi.c 		writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR);
writel            781 drivers/spi/spi-fsl-lpspi.c 		writel(SR_FCF, fsl_lpspi->base + IMX7ULP_SR);
writel            133 drivers/spi/spi-geni-qcom.c 	writel(0, se->base + SE_GENI_TX_WATERMARK_REG);
writel            195 drivers/spi/spi-geni-qcom.c 	writel(word_len, se->base + SE_SPI_WORD_LEN);
writel            241 drivers/spi/spi-geni-qcom.c 	writel(loopback_cfg, se->base + SE_SPI_LOOPBACK);
writel            242 drivers/spi/spi-geni-qcom.c 	writel(demux_sel, se->base + SE_SPI_DEMUX_SEL);
writel            243 drivers/spi/spi-geni-qcom.c 	writel(cpha, se->base + SE_SPI_CPHA);
writel            244 drivers/spi/spi-geni-qcom.c 	writel(cpol, se->base + SE_SPI_CPOL);
writel            245 drivers/spi/spi-geni-qcom.c 	writel(demux_output_inv, se->base + SE_SPI_DEMUX_OUTPUT_INV);
writel            246 drivers/spi/spi-geni-qcom.c 	writel(clk_sel, se->base + SE_GENI_CLK_SEL);
writel            247 drivers/spi/spi-geni-qcom.c 	writel(m_clk_cfg, se->base + GENI_SER_M_CLK_CFG);
writel            338 drivers/spi/spi-geni-qcom.c 		writel(clk_sel, se->base + SE_GENI_CLK_SEL);
writel            339 drivers/spi/spi-geni-qcom.c 		writel(m_clk_cfg, se->base + GENI_SER_M_CLK_CFG);
writel            362 drivers/spi/spi-geni-qcom.c 		writel(len, se->base + SE_SPI_TX_TRANS_LEN);
writel            366 drivers/spi/spi-geni-qcom.c 		writel(len, se->base + SE_SPI_RX_TRANS_LEN);
writel            369 drivers/spi/spi-geni-qcom.c 	writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG);
writel            379 drivers/spi/spi-geni-qcom.c 		writel(mas->tx_wm, se->base + SE_GENI_TX_WATERMARK_REG);
writel            436 drivers/spi/spi-geni-qcom.c 		writel(0, se->base + SE_GENI_TX_WATERMARK_REG);
writel            513 drivers/spi/spi-geni-qcom.c 			writel(0, se->base + SE_GENI_TX_WATERMARK_REG);
writel            527 drivers/spi/spi-geni-qcom.c 	writel(m_irq, se->base + SE_GENI_M_IRQ_CLEAR);
writel            116 drivers/spi/spi-img-spfi.c 	writel(val, spfi->regs + reg);
writel            164 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MXC_CSPITXDATA);			\
writel            353 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MXC_CSPITXDATA);
writel            381 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MXC_CSPITXDATA);
writel            421 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MXC_CSPITXDATA);
writel            476 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MX51_ECSPI_INT);
writel            485 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
writel            494 drivers/spi/spi-imx.c 	writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
writel            524 drivers/spi/spi-imx.c 	writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
writel            531 drivers/spi/spi-imx.c 	writel(testreg, spi_imx->base + MX51_ECSPI_TESTREG);
writel            561 drivers/spi/spi-imx.c 	writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG);
writel            591 drivers/spi/spi-imx.c 	writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
writel            619 drivers/spi/spi-imx.c 	writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
writel            678 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MXC_CSPIINT);
writel            687 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MXC_CSPICTRL);
writel            728 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MXC_CSPICTRL);
writel            735 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MX31_CSPI_TESTREG);
writel            742 drivers/spi/spi-imx.c 		writel(MX31_DMAREG_RH_DEN | MX31_DMAREG_TH_DEN,
writel            783 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MXC_CSPIINT);
writel            792 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MXC_CSPICTRL);
writel            824 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MXC_CSPICTRL);
writel            836 drivers/spi/spi-imx.c 	writel(1, spi_imx->base + MXC_RESET);
writel            859 drivers/spi/spi-imx.c 	writel(val, spi_imx->base + MXC_CSPIINT);
writel            868 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MXC_CSPICTRL);
writel            895 drivers/spi/spi-imx.c 	writel(reg, spi_imx->base + MXC_CSPICTRL);
writel            907 drivers/spi/spi-imx.c 	writel(1, spi_imx->base + MXC_RESET);
writel           1072 drivers/spi/spi-imx.c 	writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
writel           1789 drivers/spi/spi-imx.c 	writel(0, spi_imx->base + MXC_CSPICTRL);
writel             65 drivers/spi/spi-jcore.c 	writel(hw->cs_reg | hw->speed_reg, ctrl_reg);
writel            122 drivers/spi/spi-jcore.c 		writel(tx ? *tx++ : 0, data_reg);
writel            123 drivers/spi/spi-jcore.c 		writel(xmit, ctrl_reg);
writel            273 drivers/spi/spi-meson-spicc.c 			writel(0, spicc->base + SPICC_INTREG);
writel            296 drivers/spi/spi-meson-spicc.c 	writel(ctrl, spicc->base + SPICC_INTREG);
writel            458 drivers/spi/spi-meson-spicc.c 	writel(0, spicc->base + SPICC_INTREG);
writel            596 drivers/spi/spi-meson-spicc.c 	writel(0, spicc->base + SPICC_CONREG);
writel            185 drivers/spi/spi-mt65xx.c 	writel(reg_val, mdata->base + SPI_CMD_REG);
writel            189 drivers/spi/spi-mt65xx.c 	writel(reg_val, mdata->base + SPI_CMD_REG);
writel            252 drivers/spi/spi-mt65xx.c 	writel(reg_val, mdata->base + SPI_CMD_REG);
writel            256 drivers/spi/spi-mt65xx.c 		writel(mdata->pad_sel[spi->chip_select],
writel            270 drivers/spi/spi-mt65xx.c 		writel(reg_val, mdata->base + SPI_CMD_REG);
writel            273 drivers/spi/spi-mt65xx.c 		writel(reg_val, mdata->base + SPI_CMD_REG);
writel            299 drivers/spi/spi-mt65xx.c 		writel(reg_val, mdata->base + SPI_CFG2_REG);
writel            304 drivers/spi/spi-mt65xx.c 		writel(reg_val, mdata->base + SPI_CFG0_REG);
writel            311 drivers/spi/spi-mt65xx.c 		writel(reg_val, mdata->base + SPI_CFG0_REG);
writel            317 drivers/spi/spi-mt65xx.c 	writel(reg_val, mdata->base + SPI_CFG1_REG);
writel            332 drivers/spi/spi-mt65xx.c 	writel(reg_val, mdata->base + SPI_CFG1_REG);
writel            345 drivers/spi/spi-mt65xx.c 	writel(cmd, mdata->base + SPI_CMD_REG);
writel            394 drivers/spi/spi-mt65xx.c 		writel((u32)(xfer->tx_dma & MTK_SPI_32BITS_MASK),
writel            398 drivers/spi/spi-mt65xx.c 			writel((u32)(xfer->tx_dma >> 32),
writel            404 drivers/spi/spi-mt65xx.c 		writel((u32)(xfer->rx_dma & MTK_SPI_32BITS_MASK),
writel            408 drivers/spi/spi-mt65xx.c 			writel((u32)(xfer->rx_dma >> 32),
writel            435 drivers/spi/spi-mt65xx.c 		writel(reg_val, mdata->base + SPI_TX_DATA_REG);
writel            464 drivers/spi/spi-mt65xx.c 	writel(cmd, mdata->base + SPI_CMD_REG);
writel            570 drivers/spi/spi-mt65xx.c 			writel(reg_val, mdata->base + SPI_TX_DATA_REG);
writel            603 drivers/spi/spi-mt65xx.c 		writel(cmd, mdata->base + SPI_CMD_REG);
writel            205 drivers/spi/spi-mxic.c 	writel(IDLY_CODE_VAL(0, idly_code) |
writel            210 drivers/spi/spi-mxic.c 	writel(IDLY_CODE_VAL(4, idly_code) |
writel            273 drivers/spi/spi-mxic.c 	writel(0, mxic->regs + DATA_STROB);
writel            274 drivers/spi/spi-mxic.c 	writel(INT_STS_ALL, mxic->regs + INT_STS_EN);
writel            275 drivers/spi/spi-mxic.c 	writel(0, mxic->regs + HC_EN);
writel            276 drivers/spi/spi-mxic.c 	writel(0, mxic->regs + LRD_CFG);
writel            277 drivers/spi/spi-mxic.c 	writel(0, mxic->regs + LRD_CTRL);
writel            278 drivers/spi/spi-mxic.c 	writel(HC_CFG_NIO(1) | HC_CFG_TYPE(0, HC_CFG_TYPE_SPI_NAND) |
writel            305 drivers/spi/spi-mxic.c 		writel(data, mxic->regs + TXD(nbytes % 4));
writel            369 drivers/spi/spi-mxic.c 	writel(HC_CFG_NIO(nio) |
writel            374 drivers/spi/spi-mxic.c 	writel(HC_EN_BIT, mxic->regs + HC_EN);
writel            391 drivers/spi/spi-mxic.c 	writel(ss_ctrl, mxic->regs + SS_CTRL(mem->spi->chip_select));
writel            393 drivers/spi/spi-mxic.c 	writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
writel            419 drivers/spi/spi-mxic.c 	writel(readl(mxic->regs + HC_CFG) & ~HC_CFG_MAN_CS_ASSERT,
writel            421 drivers/spi/spi-mxic.c 	writel(0, mxic->regs + HC_EN);
writel            436 drivers/spi/spi-mxic.c 		writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_EN,
writel            438 drivers/spi/spi-mxic.c 		writel(HC_EN_BIT, mxic->regs + HC_EN);
writel            439 drivers/spi/spi-mxic.c 		writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
writel            442 drivers/spi/spi-mxic.c 		writel(readl(mxic->regs + HC_CFG) & ~HC_CFG_MAN_CS_ASSERT,
writel            444 drivers/spi/spi-mxic.c 		writel(0, mxic->regs + HC_EN);
writel            480 drivers/spi/spi-mxic.c 	writel(OP_CMD_BYTES(1) | OP_CMD_BUSW(busw) |
writel             90 drivers/spi/spi-mxs.c 	writel(BM_SSP_CTRL0_LOCK_CS,
writel             93 drivers/spi/spi-mxs.c 	writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
writel             99 drivers/spi/spi-mxs.c 	writel(0x0, ssp->base + HW_SSP_CMD0);
writel            100 drivers/spi/spi-mxs.c 	writel(0x0, ssp->base + HW_SSP_CMD1);
writel            305 drivers/spi/spi-mxs.c 	writel(BM_SSP_CTRL0_IGNORE_CRC,
writel            310 drivers/spi/spi-mxs.c 			writel(BM_SSP_CTRL0_IGNORE_CRC,
writel            314 drivers/spi/spi-mxs.c 			writel(BM_SSP_CTRL0_XFER_COUNT,
writel            316 drivers/spi/spi-mxs.c 			writel(1,
writel            319 drivers/spi/spi-mxs.c 			writel(1, ssp->base + HW_SSP_XFER_SIZE);
writel            323 drivers/spi/spi-mxs.c 			writel(BM_SSP_CTRL0_READ,
writel            326 drivers/spi/spi-mxs.c 			writel(BM_SSP_CTRL0_READ,
writel            329 drivers/spi/spi-mxs.c 		writel(BM_SSP_CTRL0_RUN,
writel            336 drivers/spi/spi-mxs.c 			writel(*buf, ssp->base + HW_SSP_DATA(ssp));
writel            338 drivers/spi/spi-mxs.c 		writel(BM_SSP_CTRL0_DATA_XFER,
writel            371 drivers/spi/spi-mxs.c 	writel(BM_SSP_CTRL0_WAIT_FOR_CMD | BM_SSP_CTRL0_WAIT_FOR_IRQ,
writel            373 drivers/spi/spi-mxs.c 	writel(mxs_spi_cs_to_reg(m->spi->chip_select),
writel            398 drivers/spi/spi-mxs.c 			writel(BM_SSP_CTRL1_DMA_ENABLE,
writel            411 drivers/spi/spi-mxs.c 			writel(BM_SSP_CTRL1_DMA_ENABLE,
writel             89 drivers/spi/spi-oc-tiny.c 	writel(baud, hw->base + TINY_SPI_BAUD);
writel             90 drivers/spi/spi-oc-tiny.c 	writel(hw->mode, hw->base + TINY_SPI_CONTROL);
writel            119 drivers/spi/spi-orion.c 	writel(val, reg_addr);
writel            130 drivers/spi/spi-orion.c 	writel(val, reg_addr);
writel            225 drivers/spi/spi-orion.c 	writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
writel            249 drivers/spi/spi-orion.c 	writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
writel            284 drivers/spi/spi-orion.c 	writel(reg, spi_reg(orion_spi, ORION_SPI_TIMING_PARAMS_REG));
writel            375 drivers/spi/spi-orion.c 	writel(0x0, int_reg);
writel            378 drivers/spi/spi-orion.c 		writel(*(*tx_buf)++, tx_reg);
writel            380 drivers/spi/spi-orion.c 		writel(0, tx_reg);
writel            406 drivers/spi/spi-orion.c 	writel(0x0, int_reg);
writel            409 drivers/spi/spi-orion.c 		writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg);
writel            411 drivers/spi/spi-orion.c 		writel(0, tx_reg);
writel            520 drivers/spi/spi-orion.c 	writel(0, spi_reg(orion_spi, SPI_DIRECT_WRITE_CONFIG_REG));
writel            157 drivers/spi/spi-pic32-sqi.c 	writel(readl(reg) | set, reg);
writel            162 drivers/spi/spi-pic32-sqi.c 	writel(readl(reg) & ~clr, reg);
writel            177 drivers/spi/spi-pic32-sqi.c 	writel(val, sqi->regs + PESQI_CLK_CTRL_REG);
writel            188 drivers/spi/spi-pic32-sqi.c 	writel(mask, sqi->regs + PESQI_INT_ENABLE_REG);
writel            190 drivers/spi/spi-pic32-sqi.c 	writel(mask, sqi->regs + PESQI_INT_SIGEN_REG);
writel            195 drivers/spi/spi-pic32-sqi.c 	writel(0, sqi->regs + PESQI_INT_ENABLE_REG);
writel            196 drivers/spi/spi-pic32-sqi.c 	writel(0, sqi->regs + PESQI_INT_SIGEN_REG);
writel            235 drivers/spi/spi-pic32-sqi.c 	writel(enable, sqi->regs + PESQI_INT_ENABLE_REG);
writel            378 drivers/spi/spi-pic32-sqi.c 			writel(val, sqi->regs + PESQI_CONF_REG);
writel            403 drivers/spi/spi-pic32-sqi.c 	writel(rdesc->bd_dma, sqi->regs + PESQI_BD_BASE_ADDR_REG);
writel            410 drivers/spi/spi-pic32-sqi.c 	writel(val, sqi->regs + PESQI_BD_CTRL_REG);
writel            425 drivers/spi/spi-pic32-sqi.c 	writel(0, sqi->regs + PESQI_BD_CTRL_REG);
writel            519 drivers/spi/spi-pic32-sqi.c 	writel(PESQI_SOFT_RESET, sqi->regs + PESQI_CONF_REG);
writel            536 drivers/spi/spi-pic32-sqi.c 	writel(val, sqi->regs + PESQI_CMD_THRES_REG);
writel            542 drivers/spi/spi-pic32-sqi.c 	writel(val, sqi->regs + PESQI_INT_THRES_REG);
writel            550 drivers/spi/spi-pic32-sqi.c 	writel(val, sqi->regs + PESQI_CONF_REG);
writel            560 drivers/spi/spi-pic32-sqi.c 	writel(val, sqi->regs + PESQI_CONF_REG);
writel            563 drivers/spi/spi-pic32-sqi.c 	writel(0, sqi->regs + PESQI_BD_POLL_CTRL_REG);
writel            125 drivers/spi/spi-pic32.c 	writel(CTRL_ON | CTRL_SIDL, &pic32s->regs->ctrl_set);
writel            130 drivers/spi/spi-pic32.c 	writel(CTRL_ON | CTRL_SIDL, &pic32s->regs->ctrl_clr);
writel            143 drivers/spi/spi-pic32.c 	writel(div & BAUD_MASK, &pic32s->regs->baud);
writel            242 drivers/spi/spi-pic32.c 		writel(STAT_RX_OV, &pic32s->regs->status_clr);
writel            243 drivers/spi/spi-pic32.c 		writel(STAT_TX_UR, &pic32s->regs->status_clr);
writel            425 drivers/spi/spi-pic32.c 	writel(v, &pic32s->regs->ctrl);
writel            478 drivers/spi/spi-pic32.c 		writel(val, &pic32s->regs->ctrl);
writel            692 drivers/spi/spi-pic32.c 	writel(ctrl, &pic32s->regs->ctrl);
writel            696 drivers/spi/spi-pic32.c 	writel(ctrl, &pic32s->regs->ctrl2_set);
writel            563 drivers/spi/spi-pl022.c 		writel(chip->cr0, SSP_CR0(pl022->virtbase));
writel            651 drivers/spi/spi-pl022.c 		writel(DEFAULT_SSP_REG_CR0_ST_PL023, SSP_CR0(pl022->virtbase));
writel            654 drivers/spi/spi-pl022.c 		writel(DEFAULT_SSP_REG_CR0_ST, SSP_CR0(pl022->virtbase));
writel            726 drivers/spi/spi-pl022.c 			writel(*(u32 *) (pl022->tx), SSP_DR(pl022->virtbase));
writel            304 drivers/spi/spi-pxa2xx.c 	writel(value, drv_data->lpss_base + offset);
writel            179 drivers/spi/spi-qcom-qspi.c 	writel(pio_xfer_cfg, ctrl->base + PIO_XFER_CFG);
writel            189 drivers/spi/spi-qcom-qspi.c 	writel(pio_xfer_ctrl, ctrl->base + PIO_XFER_CTRL);
writel            199 drivers/spi/spi-qcom-qspi.c 	writel(QSPI_ALL_IRQS, ctrl->base + MSTR_INT_STATUS);
writel            206 drivers/spi/spi-qcom-qspi.c 	writel(ints, ctrl->base + MSTR_INT_EN);
writel            219 drivers/spi/spi-qcom-qspi.c 	writel(0, ctrl->base + MSTR_INT_EN);
writel            291 drivers/spi/spi-qcom-qspi.c 	writel(mstr_cfg, ctrl->base + MSTR_CONFIG);
writel            360 drivers/spi/spi-qcom-qspi.c 			writel(*byte_buf++,
writel            394 drivers/spi/spi-qcom-qspi.c 	writel(int_status, ctrl->base + MSTR_INT_STATUS);
writel            415 drivers/spi/spi-qcom-qspi.c 		writel(0, ctrl->base + MSTR_INT_EN);
writel            197 drivers/spi/spi-s3c64xx.c 	writel(0, regs + S3C64XX_SPI_PACKET_CNT);
writel            201 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_CH_CFG);
writel            206 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_CH_CFG);
writel            232 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_CH_CFG);
writel            236 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_MODE_CFG);
writel            314 drivers/spi/spi-s3c64xx.c 			writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
writel            320 drivers/spi/spi-s3c64xx.c 			writel(ssel, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
writel            324 drivers/spi/spi-s3c64xx.c 			writel(S3C64XX_SPI_SLAVE_SIG_INACT,
writel            371 drivers/spi/spi-s3c64xx.c 		writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
writel            410 drivers/spi/spi-s3c64xx.c 			writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
writel            417 drivers/spi/spi-s3c64xx.c 	writel(modecfg, regs + S3C64XX_SPI_MODE_CFG);
writel            418 drivers/spi/spi-s3c64xx.c 	writel(chcfg, regs + S3C64XX_SPI_CH_CFG);
writel            560 drivers/spi/spi-s3c64xx.c 		writel(val, regs + S3C64XX_SPI_CLK_CFG);
writel            575 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_CH_CFG);
writel            597 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_MODE_CFG);
writel            608 drivers/spi/spi-s3c64xx.c 		writel(val, regs + S3C64XX_SPI_CLK_CFG);
writel            613 drivers/spi/spi-s3c64xx.c 		writel(val, regs + S3C64XX_SPI_CLK_CFG);
writel            627 drivers/spi/spi-s3c64xx.c 	writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK);
writel            920 drivers/spi/spi-s3c64xx.c 	writel(clr, sdd->regs + S3C64XX_SPI_PENDING_CLR);
writel            921 drivers/spi/spi-s3c64xx.c 	writel(0, sdd->regs + S3C64XX_SPI_PENDING_CLR);
writel            935 drivers/spi/spi-s3c64xx.c 		writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
writel            937 drivers/spi/spi-s3c64xx.c 		writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
writel            940 drivers/spi/spi-s3c64xx.c 	writel(0, regs + S3C64XX_SPI_INT_EN);
writel            943 drivers/spi/spi-s3c64xx.c 		writel(sci->src_clk_nr << S3C64XX_SPI_CLKSEL_SRCSHFT,
writel            945 drivers/spi/spi-s3c64xx.c 	writel(0, regs + S3C64XX_SPI_MODE_CFG);
writel            946 drivers/spi/spi-s3c64xx.c 	writel(0, regs + S3C64XX_SPI_PACKET_CNT);
writel            953 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_PENDING_CLR);
writel            954 drivers/spi/spi-s3c64xx.c 	writel(0, regs + S3C64XX_SPI_PENDING_CLR);
writel            956 drivers/spi/spi-s3c64xx.c 	writel(0, regs + S3C64XX_SPI_SWAP_CFG);
writel            962 drivers/spi/spi-s3c64xx.c 	writel(val, regs + S3C64XX_SPI_MODE_CFG);
writel           1193 drivers/spi/spi-s3c64xx.c 	writel(S3C64XX_SPI_INT_RX_OVERRUN_EN | S3C64XX_SPI_INT_RX_UNDERRUN_EN |
writel           1242 drivers/spi/spi-s3c64xx.c 	writel(0, sdd->regs + S3C64XX_SPI_INT_EN);
writel            306 drivers/spi/spi-sirf.c 	writel(readl(sspi->base + sspi->regs->usp_mode1) &
writel            308 drivers/spi/spi-sirf.c 	writel(readl(sspi->base + sspi->regs->usp_mode1) |
writel            336 drivers/spi/spi-sirf.c 	writel(data, sspi->base + sspi->regs->txfifo_data);
writel            365 drivers/spi/spi-sirf.c 	writel(data, sspi->base + sspi->regs->txfifo_data);
writel            395 drivers/spi/spi-sirf.c 	writel(data, sspi->base + sspi->regs->txfifo_data);
writel            408 drivers/spi/spi-sirf.c 		writel(0x0, sspi->base + sspi->regs->int_en);
writel            409 drivers/spi/spi-sirf.c 		writel(readl(sspi->base + sspi->regs->int_st),
writel            421 drivers/spi/spi-sirf.c 			writel(0x0, sspi->base + sspi->regs->int_en);
writel            424 drivers/spi/spi-sirf.c 			writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);
writel            427 drivers/spi/spi-sirf.c 		writel(readl(sspi->base + sspi->regs->int_st),
writel            440 drivers/spi/spi-sirf.c 		writel(0x0, sspi->base + sspi->regs->int_en);
writel            443 drivers/spi/spi-sirf.c 		writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);
writel            446 drivers/spi/spi-sirf.c 	writel(readl(sspi->base + sspi->regs->int_st),
writel            467 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);
writel            468 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op);
writel            476 drivers/spi/spi-sirf.c 	writel(cmd, sspi->base + sspi->regs->spi_cmd);
writel            477 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FRM_END_INT_EN,
writel            479 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_CMD_TX_EN,
writel            496 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op);
writel            497 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);
writel            500 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_FIFO_START,
writel            502 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_FIFO_START,
writel            504 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->int_en);
writel            507 drivers/spi/spi-sirf.c 		writel(0x0, sspi->base + sspi->regs->rxfifo_op);
writel            508 drivers/spi/spi-sirf.c 		writel(0x0, sspi->base + sspi->regs->txfifo_op);
writel            509 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->int_en);
writel            512 drivers/spi/spi-sirf.c 		writel(0x0, sspi->base + sspi->regs->rxfifo_op);
writel            513 drivers/spi/spi-sirf.c 		writel(0x0, sspi->base + sspi->regs->txfifo_op);
writel            514 drivers/spi/spi-sirf.c 		writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);
writel            517 drivers/spi/spi-sirf.c 	writel(readl(sspi->base + sspi->regs->int_st),
writel            522 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |
writel            526 drivers/spi/spi-sirf.c 			writel(sspi->left_tx_word - 1,
writel            528 drivers/spi/spi-sirf.c 			writel(sspi->left_tx_word - 1,
writel            534 drivers/spi/spi-sirf.c 			writel(sspi->left_tx_word * sspi->word_width,
writel            536 drivers/spi/spi-sirf.c 			writel(sspi->left_tx_word * sspi->word_width,
writel            542 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->spi_ctrl),
writel            544 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->tx_dma_io_len);
writel            545 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->rx_dma_io_len);
writel            569 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN,
writel            573 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_FIFO_START,
writel            575 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_FIFO_START,
writel            592 drivers/spi/spi-sirf.c 			writel(0, sspi->base + sspi->regs->tx_rx_en);
writel            598 drivers/spi/spi-sirf.c 	writel(0, sspi->base + sspi->regs->rxfifo_op);
writel            599 drivers/spi/spi-sirf.c 	writel(0, sspi->base + sspi->regs->txfifo_op);
writel            601 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->tx_rx_en);
writel            604 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->tx_rx_en);
writel            616 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_FIFO_RESET,
writel            618 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_FIFO_RESET,
writel            622 drivers/spi/spi-sirf.c 			writel(0x0, sspi->base + sspi->regs->rxfifo_op);
writel            623 drivers/spi/spi-sirf.c 			writel(0x0, sspi->base + sspi->regs->txfifo_op);
writel            624 drivers/spi/spi-sirf.c 			writel(0, sspi->base + sspi->regs->int_en);
writel            625 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->int_st),
writel            627 drivers/spi/spi-sirf.c 			writel(min((sspi->left_tx_word * sspi->word_width),
writel            630 drivers/spi/spi-sirf.c 			writel(min((sspi->left_rx_word * sspi->word_width),
writel            635 drivers/spi/spi-sirf.c 			writel(0x0, sspi->base + sspi->regs->rxfifo_op);
writel            636 drivers/spi/spi-sirf.c 			writel(0x0, sspi->base + sspi->regs->txfifo_op);
writel            637 drivers/spi/spi-sirf.c 			writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);
writel            638 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->int_st),
writel            640 drivers/spi/spi-sirf.c 			writel(min((sspi->left_tx_word * sspi->word_width),
writel            643 drivers/spi/spi-sirf.c 			writel(min((sspi->left_rx_word * sspi->word_width),
writel            648 drivers/spi/spi-sirf.c 			writel(SIRFSOC_SPI_FIFO_START,
writel            650 drivers/spi/spi-sirf.c 			writel(SIRFSOC_SPI_FIFO_START,
writel            652 drivers/spi/spi-sirf.c 			writel(0, sspi->base + sspi->regs->int_en);
writel            653 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->int_st),
writel            655 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |
writel            660 drivers/spi/spi-sirf.c 			writel(min(sspi->left_tx_word, data_units) - 1,
writel            662 drivers/spi/spi-sirf.c 			writel(min(sspi->left_rx_word, data_units) - 1,
writel            670 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN |
writel            675 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN,
writel            679 drivers/spi/spi-sirf.c 			writel(SIRFSOC_SPI_FIFO_START,
writel            681 drivers/spi/spi-sirf.c 			writel(SIRFSOC_SPI_FIFO_START,
writel            689 drivers/spi/spi-sirf.c 				writel(0, sspi->base + sspi->regs->tx_rx_en);
writel            698 drivers/spi/spi-sirf.c 			writel(0, sspi->base + sspi->regs->tx_rx_en);
writel            699 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->rxfifo_op);
writel            700 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->txfifo_op);
writel            753 drivers/spi/spi-sirf.c 			writel(regval, sspi->base + sspi->regs->spi_ctrl);
writel            773 drivers/spi/spi-sirf.c 			writel(regval,
writel            834 drivers/spi/spi-sirf.c 	writel((SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size - 2) <<
writel            841 drivers/spi/spi-sirf.c 	writel((SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, 2) <<
writel            855 drivers/spi/spi-sirf.c 		writel(regval, sspi->base + sspi->regs->spi_ctrl);
writel            862 drivers/spi/spi-sirf.c 		writel(usp_mode1, sspi->base + sspi->regs->usp_mode1);
writel            919 drivers/spi/spi-sirf.c 	writel(txfifo_ctrl, sspi->base + sspi->regs->txfifo_ctrl);
writel            920 drivers/spi/spi-sirf.c 	writel(rxfifo_ctrl, sspi->base + sspi->regs->rxfifo_ctrl);
writel            944 drivers/spi/spi-sirf.c 		writel(tx_frm_ctl | (((usp_mode2 >> 10) &
writel            948 drivers/spi/spi-sirf.c 		writel(rx_frm_ctl | (((usp_mode2 >> 12) &
writel            952 drivers/spi/spi-sirf.c 		writel(readl(sspi->base + sspi->regs->usp_mode2) |
writel            962 drivers/spi/spi-sirf.c 		writel(regval, sspi->base + sspi->regs->spi_ctrl);
writel            968 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |
writel            974 drivers/spi/spi-sirf.c 			writel(readl(sspi->base + sspi->regs->spi_ctrl) &
writel            981 drivers/spi/spi-sirf.c 		writel(0, sspi->base + sspi->regs->tx_dma_io_ctrl);
writel            982 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_RX_DMA_FLUSH,
writel            986 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_IO_MODE_SEL,
writel            988 drivers/spi/spi-sirf.c 		writel(SIRFSOC_SPI_IO_MODE_SEL,
writel           1211 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);
writel           1212 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op);
writel           1213 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op);
writel           1214 drivers/spi/spi-sirf.c 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->rxfifo_op);
writel             88 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
writel             98 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_CFG_REG);
writel            140 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_CFG_REG);
writel            152 drivers/spi/spi-slave-mt27xx.c 	writel(SPIS_SOFT_RST, mdata->base + SPIS_SOFT_RST_REG);
writel            159 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_CFG_REG);
writel            170 drivers/spi/spi-slave-mt27xx.c 		writel(reg_val, mdata->base + SPIS_TX_DATA_REG);
writel            176 drivers/spi/spi-slave-mt27xx.c 		writel(SPIS_SOFT_RST, mdata->base + SPIS_SOFT_RST_REG);
writel            190 drivers/spi/spi-slave-mt27xx.c 	writel(SPIS_SOFT_RST, mdata->base + SPIS_SOFT_RST_REG);
writel            215 drivers/spi/spi-slave-mt27xx.c 	writel(xfer->tx_dma, mdata->base + SPIS_TX_SRC_REG);
writel            216 drivers/spi/spi-slave-mt27xx.c 	writel(xfer->rx_dma, mdata->base + SPIS_RX_DST_REG);
writel            218 drivers/spi/spi-slave-mt27xx.c 	writel(SPIS_DMA_ADDR_EN, mdata->base + SPIS_SOFT_RST_REG);
writel            226 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_CFG_REG);
writel            231 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
writel            239 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
writel            260 drivers/spi/spi-slave-mt27xx.c 	writel(SPIS_SOFT_RST, mdata->base + SPIS_SOFT_RST_REG);
writel            288 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_IRQ_EN_REG);
writel            292 drivers/spi/spi-slave-mt27xx.c 	writel(reg_val, mdata->base + SPIS_IRQ_MASK_REG);
writel            318 drivers/spi/spi-slave-mt27xx.c 	writel(int_status, mdata->base + SPIS_IRQ_CLR_REG);
writel            326 drivers/spi/spi-slave-mt27xx.c 		writel(SPIS_SOFT_RST, mdata->base + SPIS_SOFT_RST_REG);
writel             97 drivers/spi/spi-sun4i.c 	writel(value, sspi->base_addr + reg);
writel            109 drivers/spi/spi-sun6i.c 	writel(value, sspi->base_addr + reg);
writel            321 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_PCC(cs));
writel            327 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG);
writel            342 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
writel            366 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
writel            371 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG);
writel            437 drivers/spi/spi-synquacer.c 		writel(val, sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG);
writel            440 drivers/spi/spi-synquacer.c 	writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_TXC);
writel            441 drivers/spi/spi-synquacer.c 	writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_RXC);
writel            446 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
writel            450 drivers/spi/spi-synquacer.c 		writel(val, sspi->regs + SYNQUACER_HSSPI_REG_TXE);
writel            453 drivers/spi/spi-synquacer.c 		writel(0, sspi->regs + SYNQUACER_HSSPI_REG_TXE);
writel            461 drivers/spi/spi-synquacer.c 		writel(val, sspi->regs + SYNQUACER_HSSPI_REG_RXE);
writel            464 drivers/spi/spi-synquacer.c 		writel(0, sspi->regs + SYNQUACER_HSSPI_REG_RXE);
writel            469 drivers/spi/spi-synquacer.c 		writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
writel            493 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
writel            524 drivers/spi/spi-synquacer.c 	writel(0, sspi->regs + SYNQUACER_HSSPI_REG_MCTRL);
writel            529 drivers/spi/spi-synquacer.c 	writel(0, sspi->regs + SYNQUACER_HSSPI_REG_TXE);
writel            530 drivers/spi/spi-synquacer.c 	writel(0, sspi->regs + SYNQUACER_HSSPI_REG_RXE);
writel            531 drivers/spi/spi-synquacer.c 	writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_TXC);
writel            532 drivers/spi/spi-synquacer.c 	writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_RXC);
writel            533 drivers/spi/spi-synquacer.c 	writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_FAULTC);
writel            538 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMCFG);
writel            551 drivers/spi/spi-synquacer.c 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_MCTRL);
writel            570 drivers/spi/spi-synquacer.c 			writel(0, sspi->regs + SYNQUACER_HSSPI_REG_RXE);
writel            587 drivers/spi/spi-synquacer.c 			writel(0, sspi->regs + SYNQUACER_HSSPI_REG_TXE);
writel            236 drivers/spi/spi-tegra114.c 	writel(val, tspi->base + reg);
writel            148 drivers/spi/spi-tegra20-sflash.c 	writel(val, tsd->base + reg);
writel            219 drivers/spi/spi-tegra20-slink.c 	writel(val, tspi->base + reg);
writel            139 drivers/spi/spi-ti-qspi.c 	writel(val, qspi->base + reg);
writel            270 drivers/spi/spi-ti-qspi.c 				writel(data, qspi->base +
writel            273 drivers/spi/spi-ti-qspi.c 				writel(data, qspi->base +
writel            276 drivers/spi/spi-ti-qspi.c 				writel(data, qspi->base +
writel            279 drivers/spi/spi-ti-qspi.c 				writel(data, qspi->base +
writel            298 drivers/spi/spi-ti-qspi.c 			writel(*((u32 *)txbuf), qspi->base + QSPI_SPI_DATA_REG);
writel            103 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_IE);
writel            113 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_IE);
writel            159 drivers/spi/spi-uniphier.c 	writel(val1, priv->base + SSI_CKS);
writel            160 drivers/spi/spi-uniphier.c 	writel(val2, priv->base + SSI_FPS);
writel            165 drivers/spi/spi-uniphier.c 	writel(val1, priv->base + SSI_TXWDS);
writel            166 drivers/spi/spi-uniphier.c 	writel(val1, priv->base + SSI_RXWDS);
writel            178 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_TXWDS);
writel            183 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_RXWDS);
writel            202 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_CKS);
writel            236 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_FC);
writel            263 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_TXDR);
writel            302 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_FC);
writel            334 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_FPS);
writel            421 drivers/spi/spi-uniphier.c 	writel(SSI_CTL_EN, priv->base + SSI_CTL);
writel            430 drivers/spi/spi-uniphier.c 	writel(0, priv->base + SSI_CTL);
writel            442 drivers/spi/spi-uniphier.c 	writel(val, priv->base + SSI_IC);
writel            114 drivers/spi/spi-xlp.c 	writel(val, priv->base + regoff + cs * SPI_CS_OFFSET);
writel            120 drivers/spi/spi-xlp.c 	writel(val, priv->base + regoff);
writel            195 drivers/ssb/driver_pcicore.c 	writel(val, mmio);
writel            110 drivers/ssb/host_soc.c 	writel(value, bus->mmio + offset);
writel            583 drivers/staging/android/vsoc.c 			writel(reg_num, vsoc_dev.regs + DOORBELL);
writel            591 drivers/staging/android/vsoc.c 		writel(reg_num, vsoc_dev.regs + DOORBELL);
writel            187 drivers/staging/comedi/drivers/8255_pci.c 	writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
writel            359 drivers/staging/comedi/drivers/addi_apci_3xxx.c 		writel(status, dev->mmio + 16);
writel            392 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(0x10000, dev->mmio + 12);
writel            399 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(delay_mode, dev->mmio + 4);
writel            404 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(val, dev->mmio + 0);
writel            407 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(delay_mode | 0x100, dev->mmio + 4);
writel            408 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(chan, dev->mmio + 0);
writel            411 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(delay_mode, dev->mmio + 4);
writel            414 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(1, dev->mmio + 48);
writel            446 drivers/staging/comedi/drivers/addi_apci_3xxx.c 		writel(0x80000, dev->mmio + 8);
writel            579 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(devpriv->ai_time_base, dev->mmio + 36);
writel            582 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(devpriv->ai_timer, dev->mmio + 32);
writel            585 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(0x180000, dev->mmio + 8);
writel            623 drivers/staging/comedi/drivers/addi_apci_3xxx.c 		writel(range, dev->mmio + 96);
writel            626 drivers/staging/comedi/drivers/addi_apci_3xxx.c 		writel((val << 8) | chan, dev->mmio + 100);
writel            734 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(0, dev->mmio + 8);
writel            738 drivers/staging/comedi/drivers/addi_apci_3xxx.c 	writel(val, dev->mmio + 16);
writel            139 drivers/staging/comedi/drivers/amplc_dio200_common.c 		writel(val, dev->mmio + offset);
writel            331 drivers/staging/comedi/drivers/amplc_dio200_pci.c 	writel(0x80, brbase + 0x50);
writel           1236 drivers/staging/comedi/drivers/cb_pcidas64.c 	writel(devpriv->plx_intcsr_bits,
writel           1297 drivers/staging/comedi/drivers/cb_pcidas64.c 	writel(bits, devpriv->plx9080_iobase + PLX_REG_BIGEND);
writel           1333 drivers/staging/comedi/drivers/cb_pcidas64.c 	writel(bits, plx_iobase + PLX_REG_DMAMODE1);
writel           1335 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(bits, plx_iobase + PLX_REG_DMAMODE0);
writel           1342 drivers/staging/comedi/drivers/cb_pcidas64.c 	writel(devpriv->plx_intcsr_bits,
writel           1620 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           1624 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           1639 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           1643 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           2544 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(0, devpriv->plx9080_iobase + PLX_REG_DMASIZ1);
writel           2545 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(0, devpriv->plx9080_iobase + PLX_REG_DMAPADR1);
writel           2546 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(0, devpriv->plx9080_iobase + PLX_REG_DMALADR1);
writel           2547 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(descriptor_bits,
writel           2550 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(0, devpriv->plx9080_iobase + PLX_REG_DMASIZ0);
writel           2551 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(0, devpriv->plx9080_iobase + PLX_REG_DMAPADR0);
writel           2552 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(0, devpriv->plx9080_iobase + PLX_REG_DMALADR0);
writel           2553 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(descriptor_bits,
writel           3069 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(plx_bits, devpriv->plx9080_iobase + PLX_REG_L2PDBELL);
writel           3721 drivers/staging/comedi/drivers/cb_pcidas64.c 	writel(devpriv->plx_control_bits, plx_control_addr);
writel           3725 drivers/staging/comedi/drivers/cb_pcidas64.c 	writel(devpriv->plx_control_bits, plx_control_addr);
writel           3735 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           3739 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           3742 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           3750 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           3753 drivers/staging/comedi/drivers/cb_pcidas64.c 		writel(devpriv->plx_control_bits, plx_control_addr);
writel           3762 drivers/staging/comedi/drivers/cb_pcidas64.c 	writel(devpriv->plx_control_bits, plx_control_addr);
writel            174 drivers/staging/comedi/drivers/comedi_8254.c 			writel(val, i8254->mmio + reg_offset);
writel            336 drivers/staging/comedi/drivers/daqboard2000.c 	writel(1000000, dev->mmio + DB2K_REG_ACQ_PACER_CLOCK_DIV_LOW);
writel            425 drivers/staging/comedi/drivers/daqboard2000.c 	writel(cntrl, devpriv->plx + PLX_REG_CNTRL);
writel            428 drivers/staging/comedi/drivers/daqboard2000.c 	writel(cntrl, devpriv->plx + PLX_REG_CNTRL);
writel            439 drivers/staging/comedi/drivers/daqboard2000.c 	writel(cntrl, devpriv->plx + PLX_REG_CNTRL);
writel            442 drivers/staging/comedi/drivers/daqboard2000.c 	writel(cntrl, devpriv->plx + PLX_REG_CNTRL);
writel            445 drivers/staging/comedi/drivers/daqboard2000.c 	writel(cntrl, devpriv->plx + PLX_REG_CNTRL);
writel            456 drivers/staging/comedi/drivers/daqboard2000.c 	writel(cntrl, devpriv->plx + PLX_REG_CNTRL);
writel            459 drivers/staging/comedi/drivers/daqboard2000.c 	writel(cntrl, devpriv->plx + PLX_REG_CNTRL);
writel            201 drivers/staging/comedi/drivers/gsc_hpdi.c 		writel(hpdi_intr_status, dev->mmio + INTERRUPT_STATUS_REG);
writel            230 drivers/staging/comedi/drivers/gsc_hpdi.c 		writel(plx_bits, devpriv->plx9080_mmio + PLX_REG_L2PDBELL);
writel            267 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(0, dev->mmio + BOARD_CONTROL_REG);
writel            268 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(0, dev->mmio + INTERRUPT_CONTROL_REG);
writel            287 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(RX_FIFO_RESET_BIT, dev->mmio + BOARD_CONTROL_REG);
writel            299 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(0, devpriv->plx9080_mmio + PLX_REG_DMASIZ0);
writel            300 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(0, devpriv->plx9080_mmio + PLX_REG_DMAPADR0);
writel            301 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(0, devpriv->plx9080_mmio + PLX_REG_DMALADR0);
writel            306 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(bits, devpriv->plx9080_mmio + PLX_REG_DMADPR0);
writel            320 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT, dev->mmio + BOARD_STATUS_REG);
writel            323 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(RX_FULL_INTR, dev->mmio + INTERRUPT_CONTROL_REG);
writel            325 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(RX_ENABLE_BIT, dev->mmio + BOARD_CONTROL_REG);
writel            511 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(BOARD_RESET_BIT, dev->mmio + BOARD_CONTROL_REG);
writel            514 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(ALMOST_EMPTY_BITS(32) | ALMOST_FULL_BITS(32),
writel            516 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(ALMOST_EMPTY_BITS(32) | ALMOST_FULL_BITS(32),
writel            524 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(0, dev->mmio + INTERRUPT_CONTROL_REG);
writel            531 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(plx_intcsr_bits, devpriv->plx9080_mmio + PLX_REG_INTCSR);
writel            547 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(bits, devpriv->plx9080_mmio + PLX_REG_BIGEND);
writel            549 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(0, devpriv->plx9080_mmio + PLX_REG_INTCSR);
writel            577 drivers/staging/comedi/drivers/gsc_hpdi.c 	writel(bits, plx_iobase + PLX_REG_DMAMODE0);
writel            683 drivers/staging/comedi/drivers/gsc_hpdi.c 			writel(0, devpriv->plx9080_mmio + PLX_REG_INTCSR);
writel            731 drivers/staging/comedi/drivers/jr3_pci.c 		writel(0, &block[i].reset);
writel             14 drivers/staging/comedi/drivers/jr3_pci.h 	writel(val, p);
writel             24 drivers/staging/comedi/drivers/jr3_pci.h 	writel(val, p);
writel            349 drivers/staging/comedi/drivers/me_daq.c 	writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR);
writel            392 drivers/staging/comedi/drivers/me_daq.c 		writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR);
writel            401 drivers/staging/comedi/drivers/me_daq.c 	writel(PLX9052_INTCSR_LI1ENAB |
writel            371 drivers/staging/comedi/drivers/mite.c 		writel(CHOR_CLRDONE,
writel            395 drivers/staging/comedi/drivers/mite.c 		writel(CHOR_CLRLC, mite->mmio + MITE_CHOR(mite_chan->channel));
writel            431 drivers/staging/comedi/drivers/mite.c 	writel(CHOR_DMARESET | CHOR_FRESET,
writel            452 drivers/staging/comedi/drivers/mite.c 	writel(CHOR_START, mite->mmio + MITE_CHOR(mite_chan->channel));
writel            466 drivers/staging/comedi/drivers/mite.c 	writel(CHOR_ABORT, mite->mmio + MITE_CHOR(mite_chan->channel));
writel            509 drivers/staging/comedi/drivers/mite.c 	writel(chcr, mite->mmio + MITE_CHCR(mite_chan->channel));
writel            527 drivers/staging/comedi/drivers/mite.c 	writel(mcr, mite->mmio + MITE_MCR(mite_chan->channel));
writel            546 drivers/staging/comedi/drivers/mite.c 	writel(dcr, mite->mmio + MITE_DCR(mite_chan->channel));
writel            549 drivers/staging/comedi/drivers/mite.c 	writel(0, mite->mmio + MITE_DAR(mite_chan->channel));
writel            553 drivers/staging/comedi/drivers/mite.c 	writel(lkcr, mite->mmio + MITE_LKCR(mite_chan->channel));
writel            556 drivers/staging/comedi/drivers/mite.c 	writel(mite_chan->ring->dma_addr,
writel            626 drivers/staging/comedi/drivers/mite.c 		writel(CHCR_CLR_DMA_IE | CHCR_CLR_LINKP_IE |
writel            805 drivers/staging/comedi/drivers/mite.c 		writel(0, mite->mmio + MITE_IODWBSR);
writel            808 drivers/staging/comedi/drivers/mite.c 		writel(daq_phys_addr | WENAB |
writel            811 drivers/staging/comedi/drivers/mite.c 		writel(0, mite->mmio + MITE_IODWCR_1);
writel            813 drivers/staging/comedi/drivers/mite.c 		writel(daq_phys_addr | WENAB, mite->mmio + MITE_IODWBSR);
writel            828 drivers/staging/comedi/drivers/mite.c 	writel(unknown_dma_burst_bits, mite->mmio + MITE_UNKNOWN_DMA_BURST_REG);
writel            854 drivers/staging/comedi/drivers/mite.c 		writel(CHOR_DMARESET, mite->mmio + MITE_CHOR(i));
writel            856 drivers/staging/comedi/drivers/mite.c 		writel(CHCR_CLR_DMA_IE | CHCR_CLR_LINKP_IE | CHCR_CLR_SAR_IE |
writel            286 drivers/staging/comedi/drivers/ni_65xx.c 	writel(0x00000000, dev->mmio + NI_65XX_FILTER_REG);
writel            377 drivers/staging/comedi/drivers/ni_65xx.c 			writel(interval, dev->mmio + NI_65XX_FILTER_REG);
writel            621 drivers/staging/comedi/drivers/ni_65xx.c 	writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
writel            280 drivers/staging/comedi/drivers/ni_660x.c 		writel(bits, dev->mmio + addr);
writel             94 drivers/staging/comedi/drivers/ni_670x.c 		writel(((chan & 15) << 1) | ((chan & 16) >> 4),
writel             97 drivers/staging/comedi/drivers/ni_670x.c 		writel(val, dev->mmio + AO_VALUE_OFFSET);
writel            110 drivers/staging/comedi/drivers/ni_670x.c 		writel(s->state, dev->mmio + DIO_PORT0_DATA_OFFSET);
writel            128 drivers/staging/comedi/drivers/ni_670x.c 	writel(s->io_bits, dev->mmio + DIO_PORT0_DIR_OFFSET);
writel            149 drivers/staging/comedi/drivers/ni_670x.c 	writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
writel            232 drivers/staging/comedi/drivers/ni_670x.c 	writel(0x10, dev->mmio + MISC_CONTROL_OFFSET);
writel            234 drivers/staging/comedi/drivers/ni_670x.c 	writel(0x00, dev->mmio + AO_CONTROL_OFFSET);
writel             60 drivers/staging/comedi/drivers/ni_labpc_pci.c 	writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
writel            225 drivers/staging/comedi/drivers/ni_mio_common.c 		writel(data, dev->mmio + reg);
writel            487 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(s->io_bits, dev->mmio + PORT_PIN_DIRECTIONS(0));
writel            498 drivers/staging/comedi/drivers/ni_pcidio.c 		writel(s->state, dev->mmio + PORT_IO(0));
writel            624 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0x0000, dev->mmio + PORT_PIN_DIRECTIONS(0));
writel            649 drivers/staging/comedi/drivers/ni_pcidio.c 		writel(ni_pcidio_ns_to_timer(&cmd->scan_begin_arg,
writel            676 drivers/staging/comedi/drivers/ni_pcidio.c 		writel(1, dev->mmio + START_DELAY);
writel            687 drivers/staging/comedi/drivers/ni_pcidio.c 		writel(cmd->stop_arg,
writel            835 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + FPGA_Control1_Register);
writel            836 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + FPGA_Control2_Register);
writel            837 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + FPGA_SCALS_Counter_Register);
writel            838 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + FPGA_SCAMS_Counter_Register);
writel            839 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + FPGA_SCBLS_Counter_Register);
writel            840 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + FPGA_SCBMS_Counter_Register);
writel            872 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + PORT_IO(0));
writel            873 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + PORT_PIN_DIRECTIONS(0));
writel            874 drivers/staging/comedi/drivers/ni_pcidio.c 	writel(0, dev->mmio + PORT_PIN_MASK(0));
writel           1228 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(0x0, mite->mmio + MITE_IODWBSR);
writel           1229 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(((0x80 | window_size) | daq_phys_addr),
writel           1231 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(0x1 | old_iodwcr1_bits, mite->mmio + MITE_IODWCR_1);
writel           1232 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(0xf, mite->mmio + 0x30);
writel           1237 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(old_iodwbsr1_bits, mite->mmio + MITE_IODWBSR_1);
writel           1238 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(old_iodwbsr_bits, mite->mmio + MITE_IODWBSR);
writel           1239 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(old_iodwcr1_bits, mite->mmio + MITE_IODWCR_1);
writel           1240 drivers/staging/comedi/drivers/ni_pcimio.c 	writel(0x0, mite->mmio + 0x30);
writel            465 drivers/staging/comedi/drivers/rtd520.c 		writel(0, dev->mmio + LAS0_CGT_CLEAR);
writel            466 drivers/staging/comedi/drivers/rtd520.c 		writel(1, dev->mmio + LAS0_CGT_ENABLE);
writel            468 drivers/staging/comedi/drivers/rtd520.c 			writel(rtd_convert_chan_gain(dev, list[ii], ii),
writel            472 drivers/staging/comedi/drivers/rtd520.c 		writel(0, dev->mmio + LAS0_CGT_ENABLE);
writel            473 drivers/staging/comedi/drivers/rtd520.c 		writel(rtd_convert_chan_gain(dev, list[0], 0),
writel            489 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR);
writel            492 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_CONVERSION);
writel            509 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR);
writel            542 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR);
writel            548 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_CONVERSION);
writel            838 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_PACER_STOP);
writel            839 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_PACER);	/* stop pacer */
writel            840 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_CONVERSION);
writel            842 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR);
writel            843 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_OVERRUN);
writel            852 drivers/staging/comedi/drivers/rtd520.c 		writel(0, dev->mmio + LAS0_PACER_START);
writel            854 drivers/staging/comedi/drivers/rtd520.c 		writel(1, dev->mmio + LAS0_BURST_START);
writel            856 drivers/staging/comedi/drivers/rtd520.c 		writel(2, dev->mmio + LAS0_ADC_CONVERSION);
writel            859 drivers/staging/comedi/drivers/rtd520.c 		writel(0, dev->mmio + LAS0_PACER_START);
writel            861 drivers/staging/comedi/drivers/rtd520.c 		writel(1, dev->mmio + LAS0_ADC_CONVERSION);
writel            863 drivers/staging/comedi/drivers/rtd520.c 	writel((devpriv->fifosz / 2 - 1) & 0xffff, dev->mmio + LAS0_ACNT);
writel            898 drivers/staging/comedi/drivers/rtd520.c 			writel((devpriv->xfer_count - 1) & 0xffff,
writel            906 drivers/staging/comedi/drivers/rtd520.c 	writel(1, dev->mmio + LAS0_PACER_SELECT);
writel            908 drivers/staging/comedi/drivers/rtd520.c 	writel(1, dev->mmio + LAS0_ACNT_STOP_ENABLE);
writel            933 drivers/staging/comedi/drivers/rtd520.c 		writel(timer & 0xffffff, dev->mmio + LAS0_PCLK);
writel            939 drivers/staging/comedi/drivers/rtd520.c 		writel(1, dev->mmio + LAS0_PACER_START);
writel            951 drivers/staging/comedi/drivers/rtd520.c 			writel(timer & 0x3ff, dev->mmio + LAS0_BCLK);
writel            958 drivers/staging/comedi/drivers/rtd520.c 		writel(2, dev->mmio + LAS0_BURST_START);
writel            985 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_PACER_STOP);
writel            986 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_PACER);	/* stop pacer */
writel            987 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_CONVERSION);
writel            990 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR);
writel           1167 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_BOARD_RESET);
writel           1169 drivers/staging/comedi/drivers/rtd520.c 	writel(0, devpriv->lcfg + PLX_REG_INTCSR);
writel           1183 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_OVERRUN);
writel           1184 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_CGT_CLEAR);
writel           1185 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_ADC_FIFO_CLEAR);
writel           1186 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_DAC_RESET(0));
writel           1187 drivers/staging/comedi/drivers/rtd520.c 	writel(0, dev->mmio + LAS0_DAC_RESET(1));
writel           1310 drivers/staging/comedi/drivers/rtd520.c 		writel(PLX_INTCSR_PIEN | PLX_INTCSR_PLIEN,
writel            111 drivers/staging/comedi/drivers/s626.c 	writel(val, dev->mmio + reg);
writel            117 drivers/staging/comedi/drivers/s626.c 	writel(cmd << 16, dev->mmio + reg);
writel            182 drivers/staging/comedi/drivers/s626.c 	writel(S626_DEBI_CMD_RDWORD | addr, dev->mmio + S626_P_DEBICMD);
writel            197 drivers/staging/comedi/drivers/s626.c 	writel(S626_DEBI_CMD_WRWORD | addr, dev->mmio + S626_P_DEBICMD);
writel            198 drivers/staging/comedi/drivers/s626.c 	writel(wdata, dev->mmio + S626_P_DEBIAD);
writel            215 drivers/staging/comedi/drivers/s626.c 	writel(S626_DEBI_CMD_RDWORD | addr, dev->mmio + S626_P_DEBICMD);
writel            218 drivers/staging/comedi/drivers/s626.c 	writel(S626_DEBI_CMD_WRWORD | addr, dev->mmio + S626_P_DEBICMD);
writel            222 drivers/staging/comedi/drivers/s626.c 	writel(val & 0xffff, dev->mmio + S626_P_DEBIAD);
writel            247 drivers/staging/comedi/drivers/s626.c 	writel(val, dev->mmio + S626_P_I2CCTRL);
writel            397 drivers/staging/comedi/drivers/s626.c 	writel(S626_ISR_AFOU, dev->mmio + S626_P_ISR);
writel            421 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_RSD3 | S626_SIB_A2,
writel            446 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_2 | S626_RSD2 | S626_SIB_A2 | S626_EOS,
writel            494 drivers/staging/comedi/drivers/s626.c 	writel(S626_RSD3 | S626_SIB_A2 | S626_EOS,
writel            552 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_1 | ws_image,
writel            555 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_0 | ws_image,
writel            558 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_3 | S626_WS3,
writel            561 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_2 | S626_WS3 | S626_EOS,
writel            606 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_1 | S626_WS3,
writel            609 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_0 | S626_WS3,
writel            612 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_3 | S626_WS1,
writel            615 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_XFIFO_2 | S626_WS1 | S626_EOS,
writel           1248 drivers/staging/comedi/drivers/s626.c 	writel(0, dev->mmio + S626_P_IER);
writel           1251 drivers/staging/comedi/drivers/s626.c 	writel(irqtype, dev->mmio + S626_P_ISR);
writel           1266 drivers/staging/comedi/drivers/s626.c 	writel(irqstatus, dev->mmio + S626_P_IER);
writel           1293 drivers/staging/comedi/drivers/s626.c 	writel((u32)devpriv->rps_buf.physical_base,
writel           1520 drivers/staging/comedi/drivers/s626.c 		writel(gpio_image & ~S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1522 drivers/staging/comedi/drivers/s626.c 		writel(gpio_image & ~S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1523 drivers/staging/comedi/drivers/s626.c 		writel(gpio_image & ~S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1525 drivers/staging/comedi/drivers/s626.c 		writel(gpio_image | S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1562 drivers/staging/comedi/drivers/s626.c 	writel(gpio_image & ~S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1564 drivers/staging/comedi/drivers/s626.c 	writel(gpio_image & ~S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1565 drivers/staging/comedi/drivers/s626.c 	writel(gpio_image & ~S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1567 drivers/staging/comedi/drivers/s626.c 	writel(gpio_image | S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           1705 drivers/staging/comedi/drivers/s626.c 	writel(0, dev->mmio + S626_P_IER);
writel           1708 drivers/staging/comedi/drivers/s626.c 	writel(S626_IRQ_RPS1 | S626_IRQ_GPIO3, dev->mmio + S626_P_ISR);
writel           1786 drivers/staging/comedi/drivers/s626.c 	writel(S626_IRQ_GPIO3 | S626_IRQ_RPS1, dev->mmio + S626_P_IER);
writel           1914 drivers/staging/comedi/drivers/s626.c 	writel(0, dev->mmio + S626_P_IER);
writel           2187 drivers/staging/comedi/drivers/s626.c 	writel(S626_DEBI_CFG_SLAVE16 |
writel           2192 drivers/staging/comedi/drivers/s626.c 	writel(S626_DEBI_PAGE_DISABLE, dev->mmio + S626_P_DEBIPAGE);
writel           2195 drivers/staging/comedi/drivers/s626.c 	writel(S626_GPIO_BASE | S626_GPIO1_HI, dev->mmio + S626_P_GPIO);
writel           2204 drivers/staging/comedi/drivers/s626.c 	writel(S626_I2C_CLKSEL | S626_I2C_ABORT,
writel           2216 drivers/staging/comedi/drivers/s626.c 		writel(S626_I2C_CLKSEL, dev->mmio + S626_P_I2CSTAT);
writel           2230 drivers/staging/comedi/drivers/s626.c 	writel(S626_ACON2_INIT, dev->mmio + S626_P_ACON2);
writel           2238 drivers/staging/comedi/drivers/s626.c 	writel(S626_RSD1 | S626_SIB_A1, dev->mmio + S626_P_TSL1);
writel           2239 drivers/staging/comedi/drivers/s626.c 	writel(S626_RSD1 | S626_SIB_A1 | S626_EOS,
writel           2243 drivers/staging/comedi/drivers/s626.c 	writel(S626_ACON1_ADCSTART, dev->mmio + S626_P_ACON1);
writel           2250 drivers/staging/comedi/drivers/s626.c 	writel((u32)devpriv->rps_buf.physical_base,
writel           2253 drivers/staging/comedi/drivers/s626.c 	writel(0, dev->mmio + S626_P_RPSPAGE1);
writel           2255 drivers/staging/comedi/drivers/s626.c 	writel(0, dev->mmio + S626_P_RPS1_TOUT);
writel           2311 drivers/staging/comedi/drivers/s626.c 	writel(0, dev->mmio + S626_P_PCI_BT_A);
writel           2321 drivers/staging/comedi/drivers/s626.c 	writel((u32)phys_buf, dev->mmio + S626_P_BASEA2_OUT);
writel           2322 drivers/staging/comedi/drivers/s626.c 	writel((u32)(phys_buf + sizeof(u32)),
writel           2338 drivers/staging/comedi/drivers/s626.c 	writel(8, dev->mmio + S626_P_PAGEA2_OUT);
writel           2353 drivers/staging/comedi/drivers/s626.c 	writel(S626_XSD2 | S626_RSD3 | S626_SIB_A2 | S626_EOS,
writel           2366 drivers/staging/comedi/drivers/s626.c 	writel(S626_LF_A2, dev->mmio + S626_VECTPORT(1));
writel           2369 drivers/staging/comedi/drivers/s626.c 	writel(S626_ACON1_DACSTART, dev->mmio + S626_P_ACON1);
writel           2438 drivers/staging/comedi/drivers/s626.c 	writel(0, dev->mmio + S626_P_IER);
writel           2441 drivers/staging/comedi/drivers/s626.c 	writel(S626_MC1_SOFT_RESET, dev->mmio + S626_P_MC1);
writel           2552 drivers/staging/comedi/drivers/s626.c 			writel(0, dev->mmio + S626_P_IER);
writel           2554 drivers/staging/comedi/drivers/s626.c 			writel(S626_IRQ_GPIO3 | S626_IRQ_RPS1,
writel           2561 drivers/staging/comedi/drivers/s626.c 			writel(S626_MC1_SHUTDOWN, dev->mmio + S626_P_MC1);
writel           2562 drivers/staging/comedi/drivers/s626.c 			writel(S626_ACON1_BASE, dev->mmio + S626_P_ACON1);
writel            111 drivers/staging/goldfish/goldfish_audio.c 	writel(x, data->reg_base + addr);
writel             88 drivers/staging/isdn/avm/b1dma.c 	writel(value, card->mbase + off);
writel            137 drivers/staging/isdn/avm/c4.c #define c4outmeml(addr, value)	writel(value, addr)
writel            289 drivers/staging/kpc2000/kpc2000/core.c 	writel(KPC_DMA_CARD_IRQ_ENABLE |
writel            466 drivers/staging/kpc2000/kpc2000/core.c 	writel(KPC_DMA_CARD_IRQ_ENABLE | KPC_DMA_CARD_USER_INTERRUPT_MODE,
writel            155 drivers/staging/kpc2000/kpc_dma/kpc_dma_driver.h 	writel(value, eng->eng_regs + 1);
writel            177 drivers/staging/kpc2000/kpc_dma/kpc_dma_driver.h 	writel(desc->MyDMAAddr, eng->eng_regs + 2);
writel            183 drivers/staging/kpc2000/kpc_dma/kpc_dma_driver.h 	writel(desc->MyDMAAddr, eng->eng_regs + 3);
writel            189 drivers/staging/kpc2000/kpc_dma/kpc_dma_driver.h 	writel(0, eng->eng_regs + 4);
writel            335 drivers/staging/media/hantro/hantro.h 	writel(val, vpu->enc_base + reg);
writel            356 drivers/staging/media/hantro/hantro.h 	writel(val, vpu->dec_base + reg);
writel            124 drivers/staging/media/imx/imx6-mipi-csi2.c 		writel(0x1, csi2->base + CSI2_PHY_SHUTDOWNZ);
writel            125 drivers/staging/media/imx/imx6-mipi-csi2.c 		writel(0x1, csi2->base + CSI2_DPHY_RSTZ);
writel            126 drivers/staging/media/imx/imx6-mipi-csi2.c 		writel(0x1, csi2->base + CSI2_RESETN);
writel            128 drivers/staging/media/imx/imx6-mipi-csi2.c 		writel(0x0, csi2->base + CSI2_PHY_SHUTDOWNZ);
writel            129 drivers/staging/media/imx/imx6-mipi-csi2.c 		writel(0x0, csi2->base + CSI2_DPHY_RSTZ);
writel            130 drivers/staging/media/imx/imx6-mipi-csi2.c 		writel(0x0, csi2->base + CSI2_RESETN);
writel            138 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(lanes - 1, csi2->base + CSI2_N_LANES);
writel            145 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(PHY_TESTCLR, csi2->base + CSI2_PHY_TST_CTRL0);
writel            146 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(0x0, csi2->base + CSI2_PHY_TST_CTRL1);
writel            147 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(0x0, csi2->base + CSI2_PHY_TST_CTRL0);
writel            150 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(PHY_TESTCLK, csi2->base + CSI2_PHY_TST_CTRL0);
writel            153 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(PHY_TESTEN | test_code, csi2->base + CSI2_PHY_TST_CTRL1);
writel            154 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(0x0, csi2->base + CSI2_PHY_TST_CTRL0);
writel            157 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(test_data, csi2->base + CSI2_PHY_TST_CTRL1);
writel            158 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(PHY_TESTCLK, csi2->base + CSI2_PHY_TST_CTRL0);
writel            161 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(0x0, csi2->base + CSI2_PHY_TST_CTRL0);
writel            293 drivers/staging/media/imx/imx6-mipi-csi2.c 	writel(reg, csi2->base + CSI2IPU_GASKET);
writel            206 drivers/staging/media/imx/imx7-media-csi.c 	writel(value, csi->regbase + offset);
writel            288 drivers/staging/media/imx/imx7-mipi-csis.c #define mipi_csis_write(__csis, __r, __v) writel(__v, (__csis)->regs + (__r))
writel            196 drivers/staging/media/ipu3/ipu3-css.c 			writel(*buf++, addr);
writel            221 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_GP_BUSY);
writel            231 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_RESET,
writel            246 drivers/staging/media/ipu3/ipu3-css.c 		writel(IMGU_PM_CTRL_RACE_TO_HALT | IMGU_PM_CTRL_START,
writel            255 drivers/staging/media/ipu3/ipu3-css.c 		writel(IMGU_PM_CTRL_RACE_TO_HALT, base + IMGU_REG_PM_CTRL);
writel            259 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_GP_BUSY) | 1, base + IMGU_REG_GP_BUSY);
writel            264 drivers/staging/media/ipu3/ipu3-css.c 	writel(val, base + IMGU_REG_PM_CTRL);
writel            265 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_GP_BUSY);
writel            272 drivers/staging/media/ipu3/ipu3-css.c 	writel(val, base + IMGU_REG_SYSTEM_REQ);
writel            273 drivers/staging/media/ipu3/ipu3-css.c 	writel(1, base + IMGU_REG_GP_BUSY);
writel            274 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_HALT,
writel            282 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_START,
writel            288 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_UNHALT,
writel            294 drivers/staging/media/ipu3/ipu3-css.c 	writel(val, base + IMGU_REG_PM_CTRL);
writel            317 drivers/staging/media/ipu3/ipu3-css.c 	writel(1, base + IMGU_REG_GP_HALT);
writel            323 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_GP_BUSY);
writel            338 drivers/staging/media/ipu3/ipu3-css.c 	writel(val, base + IMGU_REG_SP_CTRL(0));
writel            339 drivers/staging/media/ipu3/ipu3-css.c 	writel(val | IMGU_CTRL_IRQ_CLEAR, base + IMGU_REG_SP_CTRL(0));
writel            342 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_REG_INT_CSS_IRQ, base + IMGU_REG_INT_ENABLE);
writel            344 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_REG_INT_CSS_IRQ, base + IMGU_REG_INT_STATUS);
writel            347 drivers/staging/media/ipu3/ipu3-css.c 	writel(~0, base + IMGU_REG_IRQCTRL_EDGE_NOT_PULSE(IMGU_IRQCTRL_MAIN));
writel            348 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_IRQCTRL_MASK(IMGU_IRQCTRL_MAIN));
writel            349 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_IRQCTRL_IRQ_MASK,
writel            351 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_IRQCTRL_IRQ_MASK,
writel            353 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_IRQCTRL_IRQ_MASK,
writel            355 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_IRQCTRL_IRQ_MASK,
writel            362 drivers/staging/media/ipu3/ipu3-css.c 		writel(~0, base + IMGU_REG_IRQCTRL_EDGE_NOT_PULSE(i));
writel            363 drivers/staging/media/ipu3/ipu3-css.c 		writel(0, base + IMGU_REG_IRQCTRL_MASK(i));
writel            364 drivers/staging/media/ipu3/ipu3-css.c 		writel(IMGU_IRQCTRL_IRQ_MASK, base + IMGU_REG_IRQCTRL_EDGE(i));
writel            365 drivers/staging/media/ipu3/ipu3-css.c 		writel(IMGU_IRQCTRL_IRQ_MASK,
writel            367 drivers/staging/media/ipu3/ipu3-css.c 		writel(IMGU_IRQCTRL_IRQ_MASK, base + IMGU_REG_IRQCTRL_CLEAR(i));
writel            368 drivers/staging/media/ipu3/ipu3-css.c 		writel(IMGU_IRQCTRL_IRQ_MASK, base + IMGU_REG_IRQCTRL_MASK(i));
writel            434 drivers/staging/media/ipu3/ipu3-css.c 		writel(css->binary[css->fw_sp[i]].daddr,
writel            436 drivers/staging/media/ipu3/ipu3-css.c 		writel(readl(base + IMGU_REG_SP_CTRL(bi->type)) |
writel            440 drivers/staging/media/ipu3/ipu3-css.c 	writel(css->binary[css->fw_bl].daddr, base + IMGU_REG_ISP_ICACHE_ADDR);
writel            441 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_ISP_CTRL) | IMGU_CTRL_ICACHE_INV,
writel            472 drivers/staging/media/ipu3/ipu3-css.c 		writel(val0 | (val1 << 16),
writel            474 drivers/staging/media/ipu3/ipu3-css.c 		writel(val2 | (val3 << 16),
writel            499 drivers/staging/media/ipu3/ipu3-css.c 	writel(bi->info.sp.sp_entry, base + IMGU_REG_SP_START_ADDR(sp));
writel            501 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_SP_CTRL(sp))
writel            533 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_TLB_INVALIDATE, base + IMGU_REG_TLB_INVALIDATE);
writel            537 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_BL_SWSTATE_BUSY,
writel            539 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_NUM_SP,
writel            559 drivers/staging/media/ipu3/ipu3-css.c 	writel(bl->info.bl.bl_entry, base + IMGU_REG_ISP_START_ADDR);
writel            561 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_ISP_CTRL)
writel            577 drivers/staging/media/ipu3/ipu3-css.c 	writel(css->xmem_sp_group_ptrs.daddr,
writel            580 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_SP_SWSTATE_TERMINATED,
writel            582 drivers/staging/media/ipu3/ipu3-css.c 	writel(1, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb);
writel            587 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.isp_started);
writel            588 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) +
writel            590 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sleep_mode);
writel            591 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb);
writel            592 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(0)
writel            598 drivers/staging/media/ipu3/ipu3-css.c 		writel(event_mask, base + IMGU_REG_SP_DMEM_BASE(0)
writel            601 drivers/staging/media/ipu3/ipu3-css.c 	writel(1, base + IMGU_REG_SP_DMEM_BASE(0) +
writel            608 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_SP_SWSTATE_TERMINATED,
writel            614 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(1)
writel            626 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_SP_COMM_COMMAND_TERMINATE,
writel            648 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_GP_BUSY);
writel            656 drivers/staging/media/ipu3/ipu3-css.c 	writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_RESET,
writel           1143 drivers/staging/media/ipu3/ipu3-css.c 		writel(data, &q->host2sp_bufq[thread][queue][end]);
writel           1146 drivers/staging/media/ipu3/ipu3-css.c 		writel(data, &q->host2sp_evtq[end]);
writel           2363 drivers/staging/media/ipu3/ipu3-css.c 	writel(imgu_status, base + IMGU_REG_INT_STATUS);
writel           2382 drivers/staging/media/ipu3/ipu3-css.c 			writel(irq_status[i], base + IMGU_REG_IRQCTRL_CLEAR(i));
writel             80 drivers/staging/media/ipu3/ipu3-mmu.c 	writel(TLB_INVALIDATE, mmu->base + REG_TLB_INVALIDATE);
writel            106 drivers/staging/media/ipu3/ipu3-mmu.c 	writel(halt, mmu->base + REG_GP_HALT);
writel            475 drivers/staging/media/ipu3/ipu3-mmu.c 	writel(pteval, mmu->base + REG_L1_PHYS);
writel            531 drivers/staging/media/ipu3/ipu3-mmu.c 	writel(pteval, mmu->base + REG_L1_PHYS);
writel            182 drivers/staging/media/omap4iss/iss.h 	writel(value, iss->regs[res] + offset);
writel            161 drivers/staging/media/sunxi/cedrus/cedrus.h 	writel(val, dev->base + reg);
writel            940 drivers/staging/most/dim2/dim2.c 		writel(0x888, dev->io_base + 0x38);
writel            976 drivers/staging/most/dim2/dim2.c 		writel(0x03, dev->io_base + 0x600);
writel            978 drivers/staging/most/dim2/dim2.c 		writel(0x888, dev->io_base + 0x38);
writel            981 drivers/staging/most/dim2/dim2.c 		writel(0x04, dev->io_base + 0x600);
writel            986 drivers/staging/most/dim2/dim2.c 	writel(0x03, dev->io_base + 0x500);
writel            987 drivers/staging/most/dim2/dim2.c 	writel(0x0002FF02, dev->io_base + 0x508);
writel            999 drivers/staging/most/dim2/dim2.c 	writel(0x0, dev->io_base + 0x600);
writel           1021 drivers/staging/most/dim2/dim2.c 	writel(0x04, dev->io_base + 0x600);
writel           1023 drivers/staging/most/dim2/dim2.c 	writel(enable_512fs, dev->io_base + 0x604);
writel           1026 drivers/staging/most/dim2/dim2.c 	writel(0x03, dev->io_base + 0x500);
writel           1027 drivers/staging/most/dim2/dim2.c 	writel(0x0002FF02, dev->io_base + 0x508);
writel           1039 drivers/staging/most/dim2/dim2.c 	writel(0x0, dev->io_base + 0x600);
writel            147 drivers/staging/most/dim2/hal.c 	writel(val, &g.dim2->MADR);
writel            153 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->MCTL);   /* clear transfer complete */
writel            163 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->MCTL);   /* clear transfer complete */
writel            164 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->MDAT0);
writel            181 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->MCTL);   /* clear transfer complete */
writel            184 drivers/staging/most/dim2/hal.c 		writel(value[0], &g.dim2->MDAT0);
writel            186 drivers/staging/most/dim2/hal.c 		writel(value[1], &g.dim2->MDAT1);
writel            188 drivers/staging/most/dim2/hal.c 		writel(value[2], &g.dim2->MDAT2);
writel            190 drivers/staging/most/dim2/hal.c 		writel(value[3], &g.dim2->MDAT3);
writel            192 drivers/staging/most/dim2/hal.c 	writel(mask[0], &g.dim2->MDWE0);
writel            193 drivers/staging/most/dim2/hal.c 	writel(mask[1], &g.dim2->MDWE1);
writel            194 drivers/staging/most/dim2/hal.c 	writel(mask[2], &g.dim2->MDWE2);
writel            195 drivers/staging/most/dim2/hal.c 	writel(mask[3], &g.dim2->MDWE3);
writel            360 drivers/staging/most/dim2/hal.c 	writel(readl(&g.dim2->ACMR0) | bit_mask(ch_addr), &g.dim2->ACMR0);
writel            366 drivers/staging/most/dim2/hal.c 	writel(readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr), &g.dim2->ACMR0);
writel            375 drivers/staging/most/dim2/hal.c 	writel(bit_mask(ch_addr), &g.dim2->ACSR0);
writel            519 drivers/staging/most/dim2/hal.c 	writel(false << MLBC0_MLBEN_BIT, &g.dim2->MLBC0);
writel            524 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->MIEN);
writel            527 drivers/staging/most/dim2/hal.c 	writel(0xFFFFFFFF, &g.dim2->ACSR0);
writel            528 drivers/staging/most/dim2/hal.c 	writel(0xFFFFFFFF, &g.dim2->ACSR1);
writel            531 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->ACMR0);
writel            532 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->ACMR1);
writel            540 drivers/staging/most/dim2/hal.c 	writel(enable_6pin << MLBC0_MLBPEN_BIT |
writel            547 drivers/staging/most/dim2/hal.c 	writel(0xFFFFFFFF, &g.dim2->HCMR0);
writel            548 drivers/staging/most/dim2/hal.c 	writel(0xFFFFFFFF, &g.dim2->HCMR1);
writel            551 drivers/staging/most/dim2/hal.c 	writel(bit_mask(HCTL_EN_BIT), &g.dim2->HCTL);
writel            554 drivers/staging/most/dim2/hal.c 	writel(ACTL_DMA_MODE_VAL_DMA_MODE_1 << ACTL_DMA_MODE_BIT |
writel            566 drivers/staging/most/dim2/hal.c 	writel(c1 & nda_mask, &g.dim2->MLBC1);
writel            591 drivers/staging/most/dim2/hal.c 	writel(bit_mask(ch_addr), &g.dim2->ACSR0);
writel            777 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->MS0);
writel            778 drivers/staging/most/dim2/hal.c 	writel(0, &g.dim2->MS1);
writel            825 drivers/staging/most/dim2/hal.c 		writel(bit_mask(20), &g.dim2->MIEN);
writel            892 drivers/staging/most/dim2/hal.c 		writel(0, &g.dim2->MIEN);
writel            191 drivers/staging/mt7621-dma/mtk-hsdma.c 	writel(val, hsdma->base + reg);
writel            154 drivers/staging/mt7621-pci/pci-mt7621.c 	writel(val, pcie->base + reg);
writel            165 drivers/staging/mt7621-pci/pci-mt7621.c 	writel(val, port->base + reg);
writel            182 drivers/staging/mt7621-pci/pci-mt7621.c 	writel(address, pcie->base + RALINK_PCI_CONFIG_ADDR);
writel            601 drivers/staging/nvec/nvec.c 			writel(0, nvec->base + I2C_SL_RCVD);
writel            693 drivers/staging/nvec/nvec.c 		writel(to_send, nvec->base + I2C_SL_RCVD);
writel            733 drivers/staging/nvec/nvec.c 	writel(val, nvec->base + I2C_CNFG);
writel            737 drivers/staging/nvec/nvec.c 	writel(I2C_SL_NEWSL, nvec->base + I2C_SL_CNFG);
writel            738 drivers/staging/nvec/nvec.c 	writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT);
writel            740 drivers/staging/nvec/nvec.c 	writel(nvec->i2c_addr >> 1, nvec->base + I2C_SL_ADDR1);
writel            741 drivers/staging/nvec/nvec.c 	writel(0, nvec->base + I2C_SL_ADDR2);
writel            750 drivers/staging/nvec/nvec.c 	writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG);
writel           2168 drivers/staging/qlge/qlge.h 	writel(val, qdev->reg_base + reg);
writel           2183 drivers/staging/qlge/qlge.h 	writel(val, addr);
writel            164 drivers/staging/ralink-gdma/ralink-gdma.c 	writel(val, dma_dev->base + reg);
writel            120 drivers/staging/rtl8192e/rtl8192e/rtl_core.c 	writel(y, (u8 __iomem *)dev->mem_start + x);
writel             23 drivers/staging/sm750fb/ddk750_chip.h 	writel(data, addr + mmio750);
writel             23 drivers/staging/sm750fb/sm750_accel.c 	writel(regValue, accel->dprBase + offset);
writel             33 drivers/staging/sm750fb/sm750_accel.c 	writel(data, accel->dpPortBase);
writel             23 drivers/staging/sm750fb/sm750_cursor.c writel((data), cursor->mmio + (addr))
writel            216 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c 		writel(0, g_regs + BELL2); /* trigger vc interrupt */
writel            259 drivers/thermal/broadcom/bcm2835_thermal.c 		writel(val, data->regs + BCM2835_TS_TSENSCTL);
writel            261 drivers/thermal/broadcom/bcm2835_thermal.c 		writel(val, data->regs + BCM2835_TS_TSENSCTL);
writel             37 drivers/thermal/broadcom/ns-thermal.c 		writel(val, ns_thermal->pvtmon + PVTMON_CONTROL0);
writel             81 drivers/thermal/broadcom/sr-thermal.c 		writel(0, sr_thermal->regs + SR_TMON_TEMP_BASE(i));
writel             61 drivers/thermal/dove_thermal.c 	writel(reg, priv->control);
writel             65 drivers/thermal/dove_thermal.c 	writel((reg | PMU_TDC0_SW_RST_MASK), priv->control);
writel             66 drivers/thermal/dove_thermal.c 	writel(reg, priv->control);
writel             71 drivers/thermal/dove_thermal.c 	writel(reg, priv->sensor);
writel            172 drivers/thermal/hisi_thermal.c 	writel(DIV_ROUND_UP(value, HI6220_TEMP_STEP) & 0x1F,
writel            178 drivers/thermal/hisi_thermal.c 	writel(value, addr + HI6220_TEMP0_INT_CLR);
writel            183 drivers/thermal/hisi_thermal.c 	writel(value, addr + HI6220_TEMP0_INT_EN);
writel            188 drivers/thermal/hisi_thermal.c 	writel(hi6220_thermal_temp_to_step(temp) | 0x0FFFFFF00,
writel            194 drivers/thermal/hisi_thermal.c 	writel(hi6220_thermal_temp_to_step(temp), addr + HI6220_TEMP0_RST_TH);
writel            199 drivers/thermal/hisi_thermal.c 	writel(value, addr + HI6220_TEMP0_RST_MSK);
writel            204 drivers/thermal/hisi_thermal.c 	writel(value, addr + HI6220_TEMP0_EN);
writel            224 drivers/thermal/hisi_thermal.c 	writel(DIV_ROUND_UP(value, HI3660_TEMP_STEP) & 0x7F,
writel            231 drivers/thermal/hisi_thermal.c 	writel(value, addr + HI3660_INT_CLR(id));
writel            237 drivers/thermal/hisi_thermal.c 	writel(value, addr + HI3660_INT_EN(id));
writel            243 drivers/thermal/hisi_thermal.c 	writel(value, addr + HI3660_TH(id));
writel            263 drivers/thermal/hisi_thermal.c 	writel((readl(addr + HI6220_TEMP0_CFG) & ~HI6220_TEMP0_CFG_SS_MSK) |
writel            279 drivers/thermal/hisi_thermal.c 	writel((readl(addr + HI6220_TEMP0_CFG) & ~HI6220_TEMP0_CFG_HDAK_MSK) |
writel            561 drivers/thermal/mtk_thermal.c 		writel(val, mt->thermal_base + PTPCORESEL);
writel            658 drivers/thermal/mtk_thermal.c 	writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1);
writel            664 drivers/thermal/mtk_thermal.c 	writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
writel            669 drivers/thermal/mtk_thermal.c 	writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
writel            673 drivers/thermal/mtk_thermal.c 	writel(0x0, controller_base + TEMP_MSRCTL0);
writel            676 drivers/thermal/mtk_thermal.c 	writel(0xffffffff, controller_base + TEMP_AHBTO);
writel            679 drivers/thermal/mtk_thermal.c 	writel(0x0, controller_base + TEMP_MONIDET0);
writel            680 drivers/thermal/mtk_thermal.c 	writel(0x0, controller_base + TEMP_MONIDET1);
writel            695 drivers/thermal/mtk_thermal.c 	writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX);
writel            698 drivers/thermal/mtk_thermal.c 	writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
writel            702 drivers/thermal/mtk_thermal.c 	writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
writel            706 drivers/thermal/mtk_thermal.c 	writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN);
writel            709 drivers/thermal/mtk_thermal.c 	writel(auxadc_phys_base + AUXADC_CON1_SET_V,
writel            713 drivers/thermal/mtk_thermal.c 	writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
writel            717 drivers/thermal/mtk_thermal.c 	writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
writel            721 drivers/thermal/mtk_thermal.c 	writel(0x0, controller_base + TEMP_RDCTRL);
writel            724 drivers/thermal/mtk_thermal.c 	writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
writel            728 drivers/thermal/mtk_thermal.c 	writel(0x0, controller_base + TEMP_ADCVOLTAGESHIFT);
writel            731 drivers/thermal/mtk_thermal.c 	writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
writel            735 drivers/thermal/mtk_thermal.c 		writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
writel            739 drivers/thermal/mtk_thermal.c 	writel((1 << conf->bank_data[num].num_sensors) - 1,
writel            742 drivers/thermal/mtk_thermal.c 	writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE |
writel            398 drivers/thermal/samsung/exynos_tmu.c 	writel(th, data->base + EXYNOS_THD_TEMP_RISE);
writel            403 drivers/thermal/samsung/exynos_tmu.c 		writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
writel            416 drivers/thermal/samsung/exynos_tmu.c 	writel(th, data->base + EXYNOS_THD_TEMP_FALL);
writel            430 drivers/thermal/samsung/exynos_tmu.c 			writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON1);
writel            434 drivers/thermal/samsung/exynos_tmu.c 		writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON2);
writel            463 drivers/thermal/samsung/exynos_tmu.c 	writel(th, data->base + reg_off);
writel            483 drivers/thermal/samsung/exynos_tmu.c 	writel(th, data->base + reg_off);
writel            501 drivers/thermal/samsung/exynos_tmu.c 	writel(trim_info, data->base + EXYNOS_TMU_REG_TRIMINFO);
writel            531 drivers/thermal/samsung/exynos_tmu.c 	writel(th, data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
writel            546 drivers/thermal/samsung/exynos_tmu.c 	writel(th, data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
writel            584 drivers/thermal/samsung/exynos_tmu.c 	writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
writel            585 drivers/thermal/samsung/exynos_tmu.c 	writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
writel            614 drivers/thermal/samsung/exynos_tmu.c 	writel(pd_det_en, data->base + EXYNOS5433_TMU_PD_DET_EN);
writel            615 drivers/thermal/samsung/exynos_tmu.c 	writel(interrupt_en, data->base + EXYNOS5433_TMU_REG_INTEN);
writel            616 drivers/thermal/samsung/exynos_tmu.c 	writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
writel            646 drivers/thermal/samsung/exynos_tmu.c 	writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN);
writel            647 drivers/thermal/samsung/exynos_tmu.c 	writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
writel            725 drivers/thermal/samsung/exynos_tmu.c 	writel(val, data->base + emul_con);
writel            819 drivers/thermal/samsung/exynos_tmu.c 	writel(val_irq, data->base + tmu_intclear);
writel             35 drivers/thermal/tango_thermal.c 	writel(CMD_READ | thresh_idx << 8, base + TEMPSI_CMD);
writel             37 drivers/thermal/tango_thermal.c 	writel(CMD_READ | thresh_idx << 8, base + TEMPSI_CMD);
writel             70 drivers/thermal/tango_thermal.c 	writel(0, priv->base + TEMPSI_CFG);
writel             71 drivers/thermal/tango_thermal.c 	writel(CMD_ON, priv->base + TEMPSI_CMD);
writel            370 drivers/thermal/tegra/soctherm.c 	writel(value, (ts->ccroc_regs + reg));
writel            392 drivers/thermal/tegra/soctherm.c 	writel(val, base + SENSOR_CONFIG0);
writel            398 drivers/thermal/tegra/soctherm.c 	writel(val, base + SENSOR_CONFIG1);
writel            400 drivers/thermal/tegra/soctherm.c 	writel(tegra->calib[i], base + SENSOR_CONFIG2);
writel            490 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THERMCTL_THERMTRIP_CTL);
writel            549 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + reg_off);
writel            674 drivers/thermal/tegra/soctherm.c 	writel(r, zn->ts->regs + THERMCTL_INTR_ENABLE);
writel            686 drivers/thermal/tegra/soctherm.c 	writel(r, zn->ts->regs + THERMCTL_INTR_DISABLE);
writel            699 drivers/thermal/tegra/soctherm.c 	writel(r, zone->ts->regs + zone->sg->thermctl_lvl0_offset);
writel            708 drivers/thermal/tegra/soctherm.c 	writel(r, zone->ts->regs + zone->sg->thermctl_lvl0_offset);
writel            846 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THERMCTL_INTR_DISABLE);
writel            891 drivers/thermal/tegra/soctherm.c 		writel(ex, ts->regs + THERMCTL_INTR_STATUS);
writel            926 drivers/thermal/tegra/soctherm.c 		writel(st, ts->regs + THERMCTL_INTR_STATUS);
writel            968 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + OC_INTR_ENABLE);
writel           1045 drivers/thermal/tegra/soctherm.c 		writel(st, ts->regs + OC_INTR_STATUS);
writel           1079 drivers/thermal/tegra/soctherm.c 		writel(st, ts->regs + OC_INTR_STATUS);
writel           1109 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + OC_INTR_DISABLE);
writel           1835 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
writel           1839 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
writel           1867 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
writel           1872 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
writel           1894 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_GPU));
writel           1910 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + ALARM_CFG(throt));
writel           1911 drivers/thermal/tegra/soctherm.c 	writel(oc->throt_period, ts->regs + ALARM_THROTTLE_PERIOD(throt));
writel           1912 drivers/thermal/tegra/soctherm.c 	writel(oc->alarm_cnt_thresh, ts->regs + ALARM_CNT_THRESHOLD(throt));
writel           1913 drivers/thermal/tegra/soctherm.c 	writel(oc->alarm_filter, ts->regs + ALARM_FILTER(throt));
writel           1947 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_PRIORITY_CTRL(throt));
writel           1950 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_DELAY_CTRL(throt));
writel           1958 drivers/thermal/tegra/soctherm.c 	writel(r, ts->regs + THROT_PRIORITY_LOCK);
writel           1986 drivers/thermal/tegra/soctherm.c 		writel(v, ts->regs + THROT_GLOBAL_CFG);
writel           1990 drivers/thermal/tegra/soctherm.c 		writel(v, ts->clk_regs + CAR_SUPER_CCLKG_DIVIDER);
writel           1996 drivers/thermal/tegra/soctherm.c 	writel(v, ts->regs + THERMCTL_STATS_CTL);
writel           2074 drivers/thermal/tegra/soctherm.c 	writel(pdiv, tegra->regs + SENSOR_PDIV);
writel           2075 drivers/thermal/tegra/soctherm.c 	writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF);
writel             59 drivers/thermal/ti-soc-thermal/ti-bandgap.c 	writel(val, bgp->base + reg);
writel             64 drivers/tty/goldfish.c 	writel(count, base + GOLDFISH_TTY_REG_DATA_LEN);
writel             67 drivers/tty/goldfish.c 		writel(GOLDFISH_TTY_CMD_WRITE_BUFFER,
writel             70 drivers/tty/goldfish.c 		writel(GOLDFISH_TTY_CMD_READ_BUFFER,
writel            162 drivers/tty/goldfish.c 	writel(GOLDFISH_TTY_CMD_INT_ENABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
writel            170 drivers/tty/goldfish.c 	writel(GOLDFISH_TTY_CMD_INT_DISABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
writel            379 drivers/tty/goldfish.c 	writel(GOLDFISH_TTY_CMD_INT_DISABLE, base + GOLDFISH_TTY_REG_CMD);
writel            469 drivers/tty/nozomi.c 		writel(__cpu_to_le32(*buf), ptr);
writel            482 drivers/tty/nozomi.c 			writel(__cpu_to_le32(*buf), ptr);
writel             98 drivers/tty/serial/8250/8250_dw.c 			writel(value, offset);
writel            191 drivers/tty/serial/8250/8250_dw.c 	writel(value, p->membase + (offset << p->regshift));
writel             47 drivers/tty/serial/8250/8250_dwlib.c 		writel(reg, p->membase + offset);
writel             73 drivers/tty/serial/8250/8250_early.c 		writel(value, port->membase + offset);
writel             38 drivers/tty/serial/8250/8250_em.c 		writel(value, p->membase + ((offset + 1) << 2));
writel             45 drivers/tty/serial/8250/8250_em.c 		writel(value, p->membase + (offset << 2));
writel             52 drivers/tty/serial/8250/8250_ingenic.c 	writel(value, port->membase + (offset << 2));
writel             98 drivers/tty/serial/8250/8250_lpc18xx.c 	writel(value, p->membase + offset);
writel             99 drivers/tty/serial/8250/8250_lpss.c 	writel(reg, p->membase + BYT_PRV_CLK);
writel            101 drivers/tty/serial/8250/8250_lpss.c 	writel(reg, p->membase + BYT_PRV_CLK);
writel            154 drivers/tty/serial/8250/8250_lpss.c 	writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
writel            228 drivers/tty/serial/8250/8250_mid.c 	writel(ps, p->membase + INTEL_MID_UART_PS);		/* set PS */
writel            229 drivers/tty/serial/8250/8250_mid.c 	writel(mul, p->membase + INTEL_MID_UART_MUL);		/* set MUL */
writel            230 drivers/tty/serial/8250/8250_mid.c 	writel(div, p->membase + INTEL_MID_UART_DIV);
writel            531 drivers/tty/serial/8250/8250_mtk.c 	writel(0x0, uart.port.membase +
writel            283 drivers/tty/serial/8250/8250_pci.c 	writel(irq_config, p + 0x4c);
writel            306 drivers/tty/serial/8250/8250_pci.c 		writel(0, p + 0x4c);
writel            334 drivers/tty/serial/8250/8250_pci.c 	writel(readl(p + NI8420_INT_ENABLE_REG) & ~(NI8420_INT_ENABLE_BIT),
writel            363 drivers/tty/serial/8250/8250_pci.c 	writel(MITE_LCIMR2_CLR_CPU_IE, p + MITE_LCIMR2);
writel            693 drivers/tty/serial/8250/8250_pci.c 	writel(readl(p + NI8420_INT_ENABLE_REG) | NI8420_INT_ENABLE_BIT,
writel            731 drivers/tty/serial/8250/8250_pci.c 	writel(device_window, p + MITE_IOWBSR1);
writel            734 drivers/tty/serial/8250/8250_pci.c 	writel((readl(p + MITE_IOWCR1) & MITE_IOWCR1_RAMSEL_MASK),
writel            738 drivers/tty/serial/8250/8250_pci.c 	writel(MITE_LCIMR1_IO_IE_0, p + MITE_LCIMR1);
writel            741 drivers/tty/serial/8250/8250_pci.c 	writel(MITE_LCIMR2_SET_CPU_IE, p + MITE_LCIMR2);
writel            426 drivers/tty/serial/8250/8250_port.c 	writel(value, p->membase + offset);
writel            123 drivers/tty/serial/8250/8250_uniphier.c 		writel(value, p->membase + offset);
writel            138 drivers/tty/serial/8250/8250_uniphier.c 		writel(tmp, p->membase + offset);
writel            155 drivers/tty/serial/8250/8250_uniphier.c 	writel(value, up->port.membase + UNIPHIER_UART_DLR);
writel             83 drivers/tty/serial/altera_jtaguart.c 	writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
writel             92 drivers/tty/serial/altera_jtaguart.c 	writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
writel            101 drivers/tty/serial/altera_jtaguart.c 	writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
writel            147 drivers/tty/serial/altera_jtaguart.c 		writel(port->x_char, port->membase + ALTERA_JTAGUART_DATA_REG);
writel            163 drivers/tty/serial/altera_jtaguart.c 				writel(xmit->buf[xmit->tail],
writel            175 drivers/tty/serial/altera_jtaguart.c 		writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
writel            206 drivers/tty/serial/altera_jtaguart.c 	writel(0, port->membase + ALTERA_JTAGUART_CONTROL_REG);
writel            228 drivers/tty/serial/altera_jtaguart.c 	writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
writel            245 drivers/tty/serial/altera_jtaguart.c 	writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG);
writel            319 drivers/tty/serial/altera_jtaguart.c 	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);
writel            334 drivers/tty/serial/altera_jtaguart.c 	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);
writel             91 drivers/tty/serial/altera_uart.c 	writel(dat, port->membase + (reg << port->regshift));
writel             71 drivers/tty/serial/amba-pl010.c 	writel(cr, uap->port.membase + UART010_CR);
writel             82 drivers/tty/serial/amba-pl010.c 	writel(cr, uap->port.membase + UART010_CR);
writel             93 drivers/tty/serial/amba-pl010.c 	writel(cr, uap->port.membase + UART010_CR);
writel            103 drivers/tty/serial/amba-pl010.c 	writel(cr, uap->port.membase + UART010_CR);
writel            114 drivers/tty/serial/amba-pl010.c 	writel(cr, uap->port.membase + UART010_CR);
writel            134 drivers/tty/serial/amba-pl010.c 			writel(0, uap->port.membase + UART01x_ECR);
writel            177 drivers/tty/serial/amba-pl010.c 		writel(uap->port.x_char, uap->port.membase + UART01x_DR);
writel            189 drivers/tty/serial/amba-pl010.c 		writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
writel            207 drivers/tty/serial/amba-pl010.c 	writel(0, uap->port.membase + UART010_ICR);
writel            309 drivers/tty/serial/amba-pl010.c 	writel(lcr_h, uap->port.membase + UART010_LCRH);
writel            343 drivers/tty/serial/amba-pl010.c 	writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
writel            367 drivers/tty/serial/amba-pl010.c 	writel(0, uap->port.membase + UART010_CR);
writel            370 drivers/tty/serial/amba-pl010.c 	writel(readb(uap->port.membase + UART010_LCRH) &
writel            461 drivers/tty/serial/amba-pl010.c 	writel(0, uap->port.membase + UART010_CR);
writel            465 drivers/tty/serial/amba-pl010.c 	writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
writel            466 drivers/tty/serial/amba-pl010.c 	writel(quot & 0xff, uap->port.membase + UART010_LCRL);
writel            473 drivers/tty/serial/amba-pl010.c 	writel(lcr_h, uap->port.membase + UART010_LCRH);
writel            474 drivers/tty/serial/amba-pl010.c 	writel(old_cr, uap->port.membase + UART010_CR);
writel            578 drivers/tty/serial/amba-pl010.c 	writel(ch, uap->port.membase + UART01x_DR);
writel            593 drivers/tty/serial/amba-pl010.c 	writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
writel            605 drivers/tty/serial/amba-pl010.c 	writel(old_cr, uap->port.membase + UART010_CR);
writel           2418 drivers/tty/serial/amba-pl011.c 	writel(c, port->membase + UART01x_DR);
writel           2435 drivers/tty/serial/amba-pl011.c 		writel(c, port->membase + UART01x_DR);
writel             61 drivers/tty/serial/ar933x_uart.c 	writel(value, up->port.membase + offset);
writel            221 drivers/tty/serial/clps711x.c 	writel(ubrlcr, port->membase + UBRLCR_OFFSET);
writel            240 drivers/tty/serial/clps711x.c 	writel(readl(port->membase + UBRLCR_OFFSET) & ~UBRLCR_BREAK,
writel            313 drivers/tty/serial/clps711x.c 	writel(ubrlcr | (quot - 1), port->membase + UBRLCR_OFFSET);
writel            154 drivers/tty/serial/fsl_linflexuart.c 	writel(ier, port->membase + LINIER);
writel            162 drivers/tty/serial/fsl_linflexuart.c 	writel(ier & ~LINFLEXD_LINIER_DRIE, port->membase + LINIER);
writel            184 drivers/tty/serial/fsl_linflexuart.c 		writel(status | LINFLEXD_UARTSR_DTFTFF,
writel            201 drivers/tty/serial/fsl_linflexuart.c 	writel(ier | LINFLEXD_LINIER_DTIE, port->membase + LINIER);
writel            221 drivers/tty/serial/fsl_linflexuart.c 		writel(status | LINFLEXD_UARTSR_DTFTFF,
writel            275 drivers/tty/serial/fsl_linflexuart.c 		writel(status | LINFLEXD_UARTSR_RMB | LINFLEXD_UARTSR_DRFRFE,
writel            342 drivers/tty/serial/fsl_linflexuart.c 	writel(ier, sport->membase + LINIER);
writel            346 drivers/tty/serial/fsl_linflexuart.c 	writel(cr, sport->membase + UARTCR);
writel            353 drivers/tty/serial/fsl_linflexuart.c 	writel(cr1, sport->membase + LINCR1);
writel            370 drivers/tty/serial/fsl_linflexuart.c 	writel(LINFLEXD_UARTCR_UART, sport->membase + UARTCR);
writel            375 drivers/tty/serial/fsl_linflexuart.c 	writel(cr, sport->membase + UARTCR);
writel            379 drivers/tty/serial/fsl_linflexuart.c 	writel(cr1, sport->membase + LINCR1);
writel            385 drivers/tty/serial/fsl_linflexuart.c 	writel(ier, sport->membase + LINIER);
writel            415 drivers/tty/serial/fsl_linflexuart.c 	writel(ier, port->membase + LINIER);
writel            436 drivers/tty/serial/fsl_linflexuart.c 	writel(cr1, port->membase + LINCR1);
writel            525 drivers/tty/serial/fsl_linflexuart.c 	writel(cr, port->membase + UARTCR);
writel            529 drivers/tty/serial/fsl_linflexuart.c 	writel(cr1, port->membase + LINCR1);
writel            595 drivers/tty/serial/fsl_linflexuart.c 		writel((readl(port->membase + UARTSR) |
writel            653 drivers/tty/serial/fsl_linflexuart.c 	writel(cr, sport->membase + UARTCR);
writel            657 drivers/tty/serial/fsl_linflexuart.c 	writel(ier, sport->membase + LINIER);
writel            336 drivers/tty/serial/fsl_lpuart.c 		writel(val, port->membase + off);
writel            296 drivers/tty/serial/icom.c 	writel(temp, stop_proc[port].global_control_reg);
writel            327 drivers/tty/serial/icom.c 	writel(temp, start_proc[port].global_control_reg);
writel            442 drivers/tty/serial/icom.c 	writel(temp_pci, &icom_port->dram->mac_load_addr);
writel            562 drivers/tty/serial/icom.c 	writel(temp & ~int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
writel            597 drivers/tty/serial/icom.c 	writel(temp | int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
writel            884 drivers/tty/serial/icom.c 		writel(adapter_interrupts, int_reg);
writel            911 drivers/tty/serial/icom.c 	writel(adapter_interrupts, int_reg);
writel           1241 drivers/tty/serial/icom.c 	writel(ICOM_PORT->statStg_pci + offset,
writel           1246 drivers/tty/serial/icom.c 	writel(ICOM_PORT->xmitRestart_pci,
writel            305 drivers/tty/serial/imx.c 	writel(val, sport->port.membase + offset);
writel            129 drivers/tty/serial/lpc32xx_hs.c 	writel((u32)ch, LPC32XX_HSUART_FIFO(port->membase));
writel            266 drivers/tty/serial/lpc32xx_hs.c 			writel(LPC32XX_HSU_FE_INT,
writel            289 drivers/tty/serial/lpc32xx_hs.c 		writel((u32)port->x_char, LPC32XX_HSUART_FIFO(port->membase));
writel            301 drivers/tty/serial/lpc32xx_hs.c 		writel((u32) xmit->buf[xmit->tail],
writel            316 drivers/tty/serial/lpc32xx_hs.c 		writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            333 drivers/tty/serial/lpc32xx_hs.c 		writel(LPC32XX_HSU_BRK_INT, LPC32XX_HSUART_IIR(port->membase));
writel            340 drivers/tty/serial/lpc32xx_hs.c 		writel(LPC32XX_HSU_FE_INT, LPC32XX_HSUART_IIR(port->membase));
writel            344 drivers/tty/serial/lpc32xx_hs.c 		writel(LPC32XX_HSU_RX_OE_INT,
writel            357 drivers/tty/serial/lpc32xx_hs.c 		writel(LPC32XX_HSU_TX_INT, LPC32XX_HSUART_IIR(port->membase));
writel            398 drivers/tty/serial/lpc32xx_hs.c 	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            409 drivers/tty/serial/lpc32xx_hs.c 	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            419 drivers/tty/serial/lpc32xx_hs.c 	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            421 drivers/tty/serial/lpc32xx_hs.c 	writel((LPC32XX_HSU_BRK_INT | LPC32XX_HSU_RX_OE_INT |
writel            438 drivers/tty/serial/lpc32xx_hs.c 	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            453 drivers/tty/serial/lpc32xx_hs.c 	writel((LPC32XX_HSU_TX_INT | LPC32XX_HSU_FE_INT |
writel            457 drivers/tty/serial/lpc32xx_hs.c 	writel(0xFF, LPC32XX_HSUART_RATE(port->membase));
writel            465 drivers/tty/serial/lpc32xx_hs.c 	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            474 drivers/tty/serial/lpc32xx_hs.c 		writel((tmp | LPC32XX_HSU_RX_INT_EN | LPC32XX_HSU_ERR_INT_EN),
writel            490 drivers/tty/serial/lpc32xx_hs.c 	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            527 drivers/tty/serial/lpc32xx_hs.c 	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
writel            529 drivers/tty/serial/lpc32xx_hs.c 	writel(quot, LPC32XX_HSUART_RATE(port->membase));
writel            590 drivers/tty/serial/lpc32xx_hs.c 	writel((LPC32XX_HSU_TX_INT | LPC32XX_HSU_FE_INT |
writel            594 drivers/tty/serial/lpc32xx_hs.c 	writel(0xFF, LPC32XX_HSUART_RATE(port->membase));
writel            598 drivers/tty/serial/lpc32xx_hs.c 	writel(LPC32XX_HSU_TX_TL8B | LPC32XX_HSU_RX_TL32B |
writel            108 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            117 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            132 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            150 drivers/tty/serial/meson_uart.c 			writel(port->x_char, port->membase + AML_UART_WFIFO);
writel            160 drivers/tty/serial/meson_uart.c 		writel(ch, port->membase + AML_UART_WFIFO);
writel            168 drivers/tty/serial/meson_uart.c 		writel(val, port->membase + AML_UART_CONTROL);
writel            196 drivers/tty/serial/meson_uart.c 			writel(mode, port->membase + AML_UART_CONTROL);
writel            200 drivers/tty/serial/meson_uart.c 			writel(mode, port->membase + AML_UART_CONTROL);
writel            265 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            268 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            278 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            280 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            283 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            286 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            289 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_MISC);
writel            311 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_REG5);
writel            366 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            454 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            464 drivers/tty/serial/meson_uart.c 	writel(ch, port->membase + AML_UART_WFIFO);
writel            486 drivers/tty/serial/meson_uart.c 	writel(tmp, port->membase + AML_UART_CONTROL);
writel            489 drivers/tty/serial/meson_uart.c 	writel(val, port->membase + AML_UART_CONTROL);
writel            189 drivers/tty/serial/mvebu-uart.c 	writel(ctl, port->membase + UART_INTR(port));
writel            198 drivers/tty/serial/mvebu-uart.c 		writel(xmit->buf[xmit->tail], port->membase + UART_TSH(port));
writel            205 drivers/tty/serial/mvebu-uart.c 	writel(ctl, port->membase + UART_INTR(port));
writel            214 drivers/tty/serial/mvebu-uart.c 	writel(ctl, port->membase + UART_CTRL(port));
writel            218 drivers/tty/serial/mvebu-uart.c 	writel(ctl, port->membase + UART_INTR(port));
writel            232 drivers/tty/serial/mvebu-uart.c 	writel(ctl, port->membase + UART_CTRL(port));
writel            305 drivers/tty/serial/mvebu-uart.c 		writel(port->x_char, port->membase + UART_TSH(port));
writel            317 drivers/tty/serial/mvebu-uart.c 		writel(xmit->buf[xmit->tail], port->membase + UART_TSH(port));
writel            380 drivers/tty/serial/mvebu-uart.c 	writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
writel            387 drivers/tty/serial/mvebu-uart.c 	writel(ret, port->membase + UART_STAT);
writel            389 drivers/tty/serial/mvebu-uart.c 	writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
writel            393 drivers/tty/serial/mvebu-uart.c 	writel(ctl, port->membase + UART_INTR(port));
writel            436 drivers/tty/serial/mvebu-uart.c 	writel(0, port->membase + UART_INTR(port));
writel            471 drivers/tty/serial/mvebu-uart.c 	writel(brdv, port->membase + UART_BRDV);
writel            475 drivers/tty/serial/mvebu-uart.c 	writel(osamp, port->membase + UART_OSAMP);
writel            570 drivers/tty/serial/mvebu-uart.c 	writel(c, port->membase + UART_TSH(port));
writel            609 drivers/tty/serial/mvebu-uart.c 	writel(c, port->membase + UART_STD_TSH);
writel            654 drivers/tty/serial/mvebu-uart.c 	writel(ch, port->membase + UART_TSH(port));
writel            673 drivers/tty/serial/mvebu-uart.c 	writel(0, port->membase + UART_CTRL(port));
writel            674 drivers/tty/serial/mvebu-uart.c 	writel(0, port->membase + UART_INTR(port));
writel            681 drivers/tty/serial/mvebu-uart.c 		writel(ier, port->membase + UART_CTRL(port));
writel            685 drivers/tty/serial/mvebu-uart.c 		writel(ctl, port->membase + UART_INTR(port));
writel            775 drivers/tty/serial/mvebu-uart.c 	writel(mvuart->pm_regs.rbr, port->membase + UART_RBR(port));
writel            776 drivers/tty/serial/mvebu-uart.c 	writel(mvuart->pm_regs.tsh, port->membase + UART_TSH(port));
writel            777 drivers/tty/serial/mvebu-uart.c 	writel(mvuart->pm_regs.ctrl, port->membase + UART_CTRL(port));
writel            778 drivers/tty/serial/mvebu-uart.c 	writel(mvuart->pm_regs.intr, port->membase + UART_INTR(port));
writel            779 drivers/tty/serial/mvebu-uart.c 	writel(mvuart->pm_regs.stat, port->membase + UART_STAT);
writel            780 drivers/tty/serial/mvebu-uart.c 	writel(mvuart->pm_regs.brdv, port->membase + UART_BRDV);
writel            781 drivers/tty/serial/mvebu-uart.c 	writel(mvuart->pm_regs.osamp, port->membase + UART_OSAMP);
writel            911 drivers/tty/serial/mvebu-uart.c 	writel(CTRL_SOFT_RST, port->membase + UART_CTRL(port));
writel            913 drivers/tty/serial/mvebu-uart.c 	writel(0, port->membase + UART_CTRL(port));
writel             82 drivers/tty/serial/owl-uart.c 	writel(val, port->membase + off);
writel             64 drivers/tty/serial/pxa.c 	writel(value, up->port.membase + offset);
writel            244 drivers/tty/serial/qcom_geni_serial.c 	writel(uart_manual_rfr, uport->membase + SE_UART_MANUAL_RFR);
writel            305 drivers/tty/serial/qcom_geni_serial.c 	writel(xmit_size, uport->membase + SE_UART_TX_TRANS_LEN);
writel            307 drivers/tty/serial/qcom_geni_serial.c 	writel(m_cmd, uport->membase + SE_GENI_M_CMD0);
writel            318 drivers/tty/serial/qcom_geni_serial.c 		writel(M_GENI_CMD_ABORT, uport->membase +
writel            324 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_clear, uport->membase + SE_GENI_M_IRQ_CLEAR);
writel            331 drivers/tty/serial/qcom_geni_serial.c 	writel(S_GENI_CMD_ABORT, uport->membase + SE_GENI_S_CMD_CTRL_REG);
writel            334 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_clear, uport->membase + SE_GENI_S_IRQ_CLEAR);
writel            335 drivers/tty/serial/qcom_geni_serial.c 	writel(FORCE_DEFAULT, uport->membase + GENI_FORCE_DEFAULT_REG);
writel            345 drivers/tty/serial/qcom_geni_serial.c 	writel(status, uport->membase + SE_GENI_M_IRQ_CLEAR);
writel            348 drivers/tty/serial/qcom_geni_serial.c 	writel(status, uport->membase + SE_GENI_S_IRQ_CLEAR);
writel            361 drivers/tty/serial/qcom_geni_serial.c 	writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG);
writel            365 drivers/tty/serial/qcom_geni_serial.c 	writel(c, uport->membase + SE_GENI_TX_FIFOn);
writel            366 drivers/tty/serial/qcom_geni_serial.c 	writel(M_TX_FIFO_WATERMARK_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);
writel            374 drivers/tty/serial/qcom_geni_serial.c 	writel(ch, uport->membase + SE_GENI_TX_FIFOn);
writel            393 drivers/tty/serial/qcom_geni_serial.c 	writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG);
writel            411 drivers/tty/serial/qcom_geni_serial.c 		writel(M_TX_FIFO_WATERMARK_EN, uport->membase +
writel            450 drivers/tty/serial/qcom_geni_serial.c 			writel(M_CMD_ABORT_EN, uport->membase +
writel            453 drivers/tty/serial/qcom_geni_serial.c 		writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);
writel            463 drivers/tty/serial/qcom_geni_serial.c 			writel(irq_en | M_TX_FIFO_WATERMARK_EN,
writel            563 drivers/tty/serial/qcom_geni_serial.c 	writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG);
writel            564 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_en, uport->membase +	SE_GENI_M_IRQ_EN);
writel            575 drivers/tty/serial/qcom_geni_serial.c 	writel(0, uport->membase + SE_GENI_TX_WATERMARK_REG);
writel            576 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);
writel            588 drivers/tty/serial/qcom_geni_serial.c 		writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);
writel            590 drivers/tty/serial/qcom_geni_serial.c 	writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);
writel            607 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN);
writel            611 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);
writel            623 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN);
writel            627 drivers/tty/serial/qcom_geni_serial.c 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);
writel            645 drivers/tty/serial/qcom_geni_serial.c 	writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR);
writel            719 drivers/tty/serial/qcom_geni_serial.c 			writel(irq_en | M_TX_FIFO_WATERMARK_EN,
writel            752 drivers/tty/serial/qcom_geni_serial.c 	writel(M_TX_FIFO_WATERMARK_EN,
writel            759 drivers/tty/serial/qcom_geni_serial.c 			writel(irq_en & ~M_TX_FIFO_WATERMARK_EN,
writel            787 drivers/tty/serial/qcom_geni_serial.c 	writel(m_irq_status, uport->membase + SE_GENI_M_IRQ_CLEAR);
writel            788 drivers/tty/serial/qcom_geni_serial.c 	writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR);
writel            874 drivers/tty/serial/qcom_geni_serial.c 	writel(rxstale, uport->membase + SE_UART_RX_STALE_CNT);
writel           1045 drivers/tty/serial/qcom_geni_serial.c 		writel(port->loopback,
writel           1047 drivers/tty/serial/qcom_geni_serial.c 	writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG);
writel           1048 drivers/tty/serial/qcom_geni_serial.c 	writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG);
writel           1049 drivers/tty/serial/qcom_geni_serial.c 	writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG);
writel           1050 drivers/tty/serial/qcom_geni_serial.c 	writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG);
writel           1051 drivers/tty/serial/qcom_geni_serial.c 	writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN);
writel           1052 drivers/tty/serial/qcom_geni_serial.c 	writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN);
writel           1053 drivers/tty/serial/qcom_geni_serial.c 	writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN);
writel           1054 drivers/tty/serial/qcom_geni_serial.c 	writel(ser_clk_cfg, uport->membase + GENI_SER_M_CLK_CFG);
writel           1055 drivers/tty/serial/qcom_geni_serial.c 	writel(ser_clk_cfg, uport->membase + GENI_SER_S_CLK_CFG);
writel           1146 drivers/tty/serial/qcom_geni_serial.c 	writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG);
writel           1147 drivers/tty/serial/qcom_geni_serial.c 	writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG);
writel           1148 drivers/tty/serial/qcom_geni_serial.c 	writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG);
writel           1149 drivers/tty/serial/qcom_geni_serial.c 	writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG);
writel           1150 drivers/tty/serial/qcom_geni_serial.c 	writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN);
writel           1151 drivers/tty/serial/qcom_geni_serial.c 	writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN);
writel           1152 drivers/tty/serial/qcom_geni_serial.c 	writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN);
writel            128 drivers/tty/serial/rda-uart.c 	writel(val, port->membase + off);
writel            240 drivers/tty/serial/rp2.c 	writel(tmp, up->base + reg);
writel            265 drivers/tty/serial/rp2.c 	writel(irq_mask, up->asic_base + RP2_CH_IRQ_MASK);
writel            473 drivers/tty/serial/rp2.c 	writel(status, up->base + RP2_CHAN_STAT);
writel            606 drivers/tty/serial/rp2.c 	writel(0, base + RP2_CLK_PRESCALER);
writel            614 drivers/tty/serial/rp2.c 	writel(ALL_PORTS_MASK, base + RP2_CH_IRQ_MASK);
writel            615 drivers/tty/serial/rp2.c 	writel(RP2_ASIC_IRQ_EN_m, base + RP2_ASIC_IRQ);
writel            620 drivers/tty/serial/rp2.c 	writel(4, card->bar0 + RP2_FPGA_CTL0);
writel            621 drivers/tty/serial/rp2.c 	writel(0, card->bar0 + RP2_FPGA_CTL1);
writel            627 drivers/tty/serial/rp2.c 	writel(RP2_IRQ_MASK_EN_m, card->bar0 + RP2_IRQ_MASK);
writel            634 drivers/tty/serial/rp2.c 	writel(RP2_UART_CTL_RESET_CH_m, up->base + RP2_UART_CTL);
writel            638 drivers/tty/serial/rp2.c 	writel(0, up->base + RP2_TXRX_CTL);
writel            639 drivers/tty/serial/rp2.c 	writel(0, up->base + RP2_UART_CTL);
writel            160 drivers/tty/serial/serial-tegra.c 	writel(val, tup->uport.membase + (reg << tup->uport.regshift));
writel            170 drivers/tty/serial/st-asc.c 	writel(value, port->membase + offset);
writel            568 drivers/tty/serial/uartlite.c 		writel(c & 0xff, port->membase + 4);
writel            118 drivers/tty/serial/vt8500_serial.c 	writel(val, port->membase + off);
writel            313 drivers/tty/serial/xilinx_uartps.c 		writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_IDR);
writel            324 drivers/tty/serial/xilinx_uartps.c 			writel(
writel            365 drivers/tty/serial/xilinx_uartps.c 	writel(isrstatus, port->membase + CDNS_UART_ISR);
writel            471 drivers/tty/serial/xilinx_uartps.c 	writel(mreg, port->membase + CDNS_UART_MR);
writel            472 drivers/tty/serial/xilinx_uartps.c 	writel(cd, port->membase + CDNS_UART_BAUDGEN);
writel            473 drivers/tty/serial/xilinx_uartps.c 	writel(bdiv, port->membase + CDNS_UART_BAUDDIV);
writel            522 drivers/tty/serial/xilinx_uartps.c 		writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel            549 drivers/tty/serial/xilinx_uartps.c 		writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel            560 drivers/tty/serial/xilinx_uartps.c 		writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
writel            564 drivers/tty/serial/xilinx_uartps.c 		writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel            593 drivers/tty/serial/xilinx_uartps.c 	writel(status, port->membase + CDNS_UART_CR);
writel            600 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_ISR);
writel            602 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_IER);
writel            616 drivers/tty/serial/xilinx_uartps.c 	writel(regval, port->membase + CDNS_UART_CR);
writel            628 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_RX_IRQS, port->membase + CDNS_UART_IDR);
writel            633 drivers/tty/serial/xilinx_uartps.c 	writel(regval, port->membase + CDNS_UART_CR);
writel            667 drivers/tty/serial/xilinx_uartps.c 		writel(CDNS_UART_CR_STARTBRK | status,
writel            671 drivers/tty/serial/xilinx_uartps.c 			writel(CDNS_UART_CR_STOPBRK | status,
writel            709 drivers/tty/serial/xilinx_uartps.c 	writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel            730 drivers/tty/serial/xilinx_uartps.c 	writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel            743 drivers/tty/serial/xilinx_uartps.c 	writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel            745 drivers/tty/serial/xilinx_uartps.c 	writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
writel            806 drivers/tty/serial/xilinx_uartps.c 	writel(cval, port->membase + CDNS_UART_MR);
writel            830 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS,
writel            836 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST,
writel            850 drivers/tty/serial/xilinx_uartps.c 	writel(status, port->membase + CDNS_UART_CR);
writel            855 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_MR_CHMODE_NORM | CDNS_UART_MR_STOPMODE_1_BIT
writel            863 drivers/tty/serial/xilinx_uartps.c 	writel(rx_trigger_level, port->membase + CDNS_UART_RXWM);
writel            869 drivers/tty/serial/xilinx_uartps.c 	writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
writel            872 drivers/tty/serial/xilinx_uartps.c 	writel(readl(port->membase + CDNS_UART_ISR),
writel            886 drivers/tty/serial/xilinx_uartps.c 		writel(CDNS_UART_RX_IRQS | CDNS_UART_IXR_BRK,
writel            889 drivers/tty/serial/xilinx_uartps.c 		writel(CDNS_UART_RX_IRQS, port->membase + CDNS_UART_IER);
writel            907 drivers/tty/serial/xilinx_uartps.c 	writel(status, port->membase + CDNS_UART_IDR);
writel            908 drivers/tty/serial/xilinx_uartps.c 	writel(0xffffffff, port->membase + CDNS_UART_ISR);
writel            911 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS,
writel           1041 drivers/tty/serial/xilinx_uartps.c 	writel(val, port->membase + CDNS_UART_MODEMCR);
writel           1042 drivers/tty/serial/xilinx_uartps.c 	writel(mode_reg, port->membase + CDNS_UART_MR);
writel           1075 drivers/tty/serial/xilinx_uartps.c 	writel(c, port->membase + CDNS_UART_FIFO);
writel           1134 drivers/tty/serial/xilinx_uartps.c 	writel(ch, port->membase + CDNS_UART_FIFO);
writel           1154 drivers/tty/serial/xilinx_uartps.c 	writel(CDNS_UART_CR_TX_EN|CDNS_UART_CR_TXRST|CDNS_UART_CR_RXRST,
writel           1171 drivers/tty/serial/xilinx_uartps.c 		writel(mr,   port->membase + CDNS_UART_MR);
writel           1172 drivers/tty/serial/xilinx_uartps.c 		writel(cd,   port->membase + CDNS_UART_BAUDGEN);
writel           1173 drivers/tty/serial/xilinx_uartps.c 		writel(bdiv, port->membase + CDNS_UART_BAUDDIV);
writel           1212 drivers/tty/serial/xilinx_uartps.c 	writel(imr, port->membase + CDNS_UART_IDR);
writel           1221 drivers/tty/serial/xilinx_uartps.c 	writel(ctrl, port->membase + CDNS_UART_CR);
writel           1230 drivers/tty/serial/xilinx_uartps.c 	writel(imr, port->membase + CDNS_UART_IER);
writel           1299 drivers/tty/serial/xilinx_uartps.c 		writel(1, port->membase + CDNS_UART_RXWM);
writel           1301 drivers/tty/serial/xilinx_uartps.c 		writel(CDNS_UART_IXR_TOUT, port->membase + CDNS_UART_IDR);
writel           1337 drivers/tty/serial/xilinx_uartps.c 		writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel           1343 drivers/tty/serial/xilinx_uartps.c 		writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
writel           1348 drivers/tty/serial/xilinx_uartps.c 		writel(ctrl_reg, port->membase + CDNS_UART_CR);
writel           1356 drivers/tty/serial/xilinx_uartps.c 		writel(rx_trigger_level, port->membase + CDNS_UART_RXWM);
writel           1358 drivers/tty/serial/xilinx_uartps.c 		writel(CDNS_UART_IXR_TOUT, port->membase + CDNS_UART_IER);
writel           3858 drivers/tty/synclink_gt.c 	writel(value, (void __iomem *)reg_addr);
writel             45 drivers/usb/cdns3/drd.c 			writel(reg, &cdns->otg_v1_regs->override);
writel             49 drivers/usb/cdns3/drd.c 			writel(reg, &cdns->otg_v0_regs->ctrl1);
writel            114 drivers/usb/cdns3/drd.c 	writel(0, &cdns->otg_regs->ien);
writel            123 drivers/usb/cdns3/drd.c 	writel(OTGIEN_ID_CHANGE_INT | OTGIEN_VBUSVALID_RISE_INT |
writel            141 drivers/usb/cdns3/drd.c 		writel(OTGCMD_HOST_BUS_REQ | reg, &cdns->otg_regs->cmd);
writel            152 drivers/usb/cdns3/drd.c 		writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
writel            178 drivers/usb/cdns3/drd.c 		writel(OTGCMD_DEV_BUS_REQ | reg, &cdns->otg_regs->cmd);
writel            195 drivers/usb/cdns3/drd.c 		writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
writel            219 drivers/usb/cdns3/drd.c 	writel(~0, &cdns->otg_regs->ivect);
writel            303 drivers/usb/cdns3/drd.c 	writel(~0, &cdns->otg_regs->ivect);
writel            331 drivers/usb/cdns3/drd.c 		writel(1, &cdns->otg_v0_regs->simulate);
writel            339 drivers/usb/cdns3/drd.c 		writel(1, &cdns->otg_v1_regs->simulate);
writel             59 drivers/usb/cdns3/ep0.c 	writel(EP_STS_TRBERR, &regs->ep_sts);
writel             60 drivers/usb/cdns3/ep0.c 	writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma), &regs->ep_traddr);
writel             65 drivers/usb/cdns3/ep0.c 	writel(EP_CMD_DRDY, &regs->ep_cmd);
writel             71 drivers/usb/cdns3/ep0.c 		writel(EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
writel            117 drivers/usb/cdns3/ep0.c 		writel(EP_CMD_SSTALL, &priv_dev->regs->ep_cmd);
writel            123 drivers/usb/cdns3/ep0.c 	writel((send_erdy ? EP_CMD_ERDY : 0) | EP_CMD_REQ_CMPL,
writel            218 drivers/usb/cdns3/ep0.c 	writel(reg | USB_CMD_FADDR(addr) | USB_CMD_SET_ADDR,
writel            637 drivers/usb/cdns3/ep0.c 	writel(ep_sts_reg, &priv_dev->regs->ep_sts);
writel            848 drivers/usb/cdns3/ep0.c 	writel(EP_CFG_ENABLE | EP_CFG_MAXPKTSIZE(max_packet_size),
writel            851 drivers/usb/cdns3/ep0.c 	writel(EP_STS_EN_SETUPEN | EP_STS_EN_DESCMISEN | EP_STS_EN_TRBERREN,
writel            857 drivers/usb/cdns3/ep0.c 	writel(EP_CFG_ENABLE | EP_CFG_MAXPKTSIZE(max_packet_size),
writel            860 drivers/usb/cdns3/ep0.c 	writel(EP_STS_EN_SETUPEN | EP_STS_EN_TRBERREN, &regs->ep_sts_en);
writel             82 drivers/usb/cdns3/gadget.c 	writel(mask, ptr);
writel            150 drivers/usb/cdns3/gadget.c 	writel(ep, &priv_dev->regs->ep_sel);
writel            233 drivers/usb/cdns3/gadget.c 	writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
writel            249 drivers/usb/cdns3/gadget.c 	writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
writel            324 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
writel            326 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
writel            490 drivers/usb/cdns3/gadget.c 		writel(reg, &priv_dev->regs->ep_sts_en);
writel            994 drivers/usb/cdns3/gadget.c 		writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
writel           1004 drivers/usb/cdns3/gadget.c 		writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
writel           1005 drivers/usb/cdns3/gadget.c 		writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
writel           1025 drivers/usb/cdns3/gadget.c 	writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
writel           1026 drivers/usb/cdns3/gadget.c 	writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd);
writel           1199 drivers/usb/cdns3/gadget.c 		writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
writel           1224 drivers/usb/cdns3/gadget.c 	writel(ep_sts_reg, &priv_dev->regs->ep_sts);
writel           1246 drivers/usb/cdns3/gadget.c 				writel(ep_cfg, &priv_dev->regs->ep_cfg);
writel           1394 drivers/usb/cdns3/gadget.c 		writel(reg, &priv_dev->regs->usb_ien);
writel           1401 drivers/usb/cdns3/gadget.c 		writel(0, &priv_dev->regs->ep_ien);
writel           1429 drivers/usb/cdns3/gadget.c 		writel(reg, &priv_dev->regs->usb_ists);
writel           1430 drivers/usb/cdns3/gadget.c 		writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
writel           1461 drivers/usb/cdns3/gadget.c 	writel(~0, &priv_dev->regs->ep_ien);
writel           1521 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_DMULT, &regs->usb_conf);
writel           1524 drivers/usb/cdns3/gadget.c 		writel(USB_CONF2_EN_TDL_TRB, &regs->usb_conf2);
writel           1636 drivers/usb/cdns3/gadget.c 	writel(ep_cfg, &priv_dev->regs->ep_cfg);
writel           1824 drivers/usb/cdns3/gadget.c 	writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
writel           1843 drivers/usb/cdns3/gadget.c 	writel(reg, &priv_dev->regs->ep_sts_en);
writel           1914 drivers/usb/cdns3/gadget.c 	writel(ep_cfg, &priv_dev->regs->ep_cfg);
writel           1923 drivers/usb/cdns3/gadget.c 	writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
writel           2170 drivers/usb/cdns3/gadget.c 	writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
writel           2259 drivers/usb/cdns3/gadget.c 	writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
writel           2293 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
writel           2295 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
writel           2308 drivers/usb/cdns3/gadget.c 	writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, &regs->ep_ien);
writel           2320 drivers/usb/cdns3/gadget.c 		writel(reg, &regs->dbg_link1);
writel           2331 drivers/usb/cdns3/gadget.c 	writel(reg, &regs->dma_axi_ctrl);
writel           2334 drivers/usb/cdns3/gadget.c 	writel(USB_IEN_INIT, &regs->usb_ien);
writel           2335 drivers/usb/cdns3/gadget.c 	writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
writel           2362 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
writel           2363 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
writel           2366 drivers/usb/cdns3/gadget.c 		writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
writel           2411 drivers/usb/cdns3/gadget.c 		writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
writel           2419 drivers/usb/cdns3/gadget.c 	writel(0, &priv_dev->regs->usb_ien);
writel           2420 drivers/usb/cdns3/gadget.c 	writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
writel           2742 drivers/usb/cdns3/gadget.c 	writel(0, &priv_dev->regs->usb_ien);
writel             62 drivers/usb/chipidea/ci_hdrc_msm.c 	writel(val, addr);
writel             70 drivers/usb/chipidea/ci_hdrc_msm.c 	writel(val, addr);
writel            148 drivers/usb/chipidea/usbmisc_imx.c 		writel(val, usbmisc->base);
writel            164 drivers/usb/chipidea/usbmisc_imx.c 		writel(val, usbmisc->base);
writel            195 drivers/usb/chipidea/usbmisc_imx.c 	writel(val, reg);
writel            227 drivers/usb/chipidea/usbmisc_imx.c 	writel(val, usbmisc->base);
writel            247 drivers/usb/chipidea/usbmisc_imx.c 	writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
writel            256 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            263 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            274 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            279 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            286 drivers/usb/chipidea/usbmisc_imx.c 				writel(val, reg);
writel            293 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            304 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            309 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            317 drivers/usb/chipidea/usbmisc_imx.c 				writel(val, reg);
writel            323 drivers/usb/chipidea/usbmisc_imx.c 			writel(val, reg);
writel            355 drivers/usb/chipidea/usbmisc_imx.c 	writel(val, usbmisc->base + data->index * 4);
writel            390 drivers/usb/chipidea/usbmisc_imx.c 	writel(reg, usbmisc->base + data->index * 4);
writel            394 drivers/usb/chipidea/usbmisc_imx.c 	writel(reg | MX6_BM_NON_BURST_SETTING,
writel            400 drivers/usb/chipidea/usbmisc_imx.c 		writel(reg | MX6_BM_UTMI_ON_CLOCK,
writel            405 drivers/usb/chipidea/usbmisc_imx.c 		writel(reg, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET
writel            453 drivers/usb/chipidea/usbmisc_imx.c 		writel(val | MX6_BM_HSIC_DEV_CONN,
writel            482 drivers/usb/chipidea/usbmisc_imx.c 	writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
writel            503 drivers/usb/chipidea/usbmisc_imx.c 		writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
writel            509 drivers/usb/chipidea/usbmisc_imx.c 		writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
writel            518 drivers/usb/chipidea/usbmisc_imx.c 		writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
writel            538 drivers/usb/chipidea/usbmisc_imx.c 		writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
writel            556 drivers/usb/chipidea/usbmisc_imx.c 		writel(val | wakeup_setting, usbmisc->base);
writel            560 drivers/usb/chipidea/usbmisc_imx.c 		writel(val & ~wakeup_setting, usbmisc->base);
writel            595 drivers/usb/chipidea/usbmisc_imx.c 	writel(reg, usbmisc->base);
writel            599 drivers/usb/chipidea/usbmisc_imx.c 	writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID,
writel           1218 drivers/usb/dwc2/core.h 		writel(swab32(value), hsotg->regs + offset);
writel           1220 drivers/usb/dwc2/core.h 		writel(value, hsotg->regs + offset);
writel           4346 drivers/usb/dwc2/hcd.c 			writel(pcgctl, hsotg->regs + PCGCTL);
writel           4425 drivers/usb/dwc2/hcd.c 		writel(pcgctl, hsotg->regs + PCGCTL);
writel             46 drivers/usb/dwc3/dwc3-keystone.c 	writel(value, base + offset);
writel            148 drivers/usb/dwc3/dwc3-omap.c 	writel(value, base + offset);
writel            101 drivers/usb/dwc3/dwc3-pci.c 	writel(value, reg + GP_RWREG1);
writel             87 drivers/usb/dwc3/dwc3-qcom.c 	writel(reg, base + offset);
writel             99 drivers/usb/dwc3/dwc3-qcom.c 	writel(reg, base + offset);
writel             47 drivers/usb/dwc3/io.h 	writel(value, base + offset - DWC3_GLOBALS_REGS_START);
writel            181 drivers/usb/early/ehci-dbgp.c 	writel(ctrl | DBGP_DONE, &ehci_debug->control);
writel            206 drivers/usb/early/ehci-dbgp.c 	writel(ctrl | DBGP_GO, &ehci_debug->control);
writel            252 drivers/usb/early/ehci-dbgp.c 	writel(lo, &ehci_debug->data03);
writel            253 drivers/usb/early/ehci-dbgp.c 	writel(hi, &ehci_debug->data47);
writel            291 drivers/usb/early/ehci-dbgp.c 	writel(addr, &ehci_debug->address);
writel            292 drivers/usb/early/ehci-dbgp.c 	writel(pids, &ehci_debug->pids);
writel            317 drivers/usb/early/ehci-dbgp.c 	writel(addr, &ehci_debug->address);
writel            318 drivers/usb/early/ehci-dbgp.c 	writel(pids, &ehci_debug->pids);
writel            358 drivers/usb/early/ehci-dbgp.c 	writel(addr, &ehci_debug->address);
writel            359 drivers/usb/early/ehci-dbgp.c 	writel(pids, &ehci_debug->pids);
writel            440 drivers/usb/early/ehci-dbgp.c 	writel(ctrl, &ehci_debug->control);
writel            448 drivers/usb/early/ehci-dbgp.c 	writel(cmd, &ehci_regs->command);
writel            451 drivers/usb/early/ehci-dbgp.c 	writel(FLAG_CF, &ehci_regs->configured_flag);
writel            478 drivers/usb/early/ehci-dbgp.c 	writel(cmd, &ehci_regs->command);
writel            522 drivers/usb/early/ehci-dbgp.c 			writel(cmd, &ehci_regs->command);
writel            525 drivers/usb/early/ehci-dbgp.c 			writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
writel            541 drivers/usb/early/ehci-dbgp.c 	writel(ctrl, &ehci_debug->control);
writel            545 drivers/usb/early/ehci-dbgp.c 		writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
writel            553 drivers/usb/early/ehci-dbgp.c 	writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
writel            624 drivers/usb/early/ehci-dbgp.c 	writel(portsc, &ehci_regs->port_status[port - 1]);
writel            637 drivers/usb/early/ehci-dbgp.c 		writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
writel            810 drivers/usb/early/ehci-dbgp.c 		writel(ctrl, &ehci_debug->control);
writel            935 drivers/usb/early/ehci-dbgp.c 			writel(cmd, &ehci_regs->command);
writel            961 drivers/usb/early/ehci-dbgp.c 		writel(cmd, &ehci_regs->command);
writel            995 drivers/usb/early/ehci-dbgp.c 		writel(ctrl, &ehci_debug->control);
writel            159 drivers/usb/early/xhci-dbc.c 		writel(val | XHCI_HC_OS_OWNED, xdbc.xhci_base + offset);
writel            164 drivers/usb/early/xhci-dbc.c 			writel(val & ~XHCI_HC_BIOS_OWNED, xdbc.xhci_base + offset);
writel            172 drivers/usb/early/xhci-dbc.c 	writel(val, xdbc.xhci_base + offset + XHCI_LEGACY_CONTROL_OFFSET);
writel            256 drivers/usb/early/xhci-dbc.c 	writel(1, &xdbc.xdbc_reg->ersts);
writel            338 drivers/usb/early/xhci-dbc.c 	writel(dev_info, &xdbc.xdbc_reg->devinfo1);
writel            341 drivers/usb/early/xhci-dbc.c 	writel(dev_info, &xdbc.xdbc_reg->devinfo2);
writel            362 drivers/usb/early/xhci-dbc.c 			writel(val | PORT_RESET, portsc);
writel            414 drivers/usb/early/xhci-dbc.c 	writel(DOOR_BELL_TARGET(target), &xdbc.xdbc_reg->doorbell);
writel            423 drivers/usb/early/xhci-dbc.c 	writel(ctrl | CTRL_DBC_ENABLE | CTRL_PORT_ENABLE, &xdbc.xdbc_reg->control);
writel            529 drivers/usb/early/xhci-dbc.c 	writel(0, &xdbc.xdbc_reg->control);
writel            557 drivers/usb/early/xhci-dbc.c 	writel(0, &xdbc.xdbc_reg->control);
writel            590 drivers/usb/early/xhci-dbc.c 		writel(0, &xdbc.xdbc_reg->control);
writel            711 drivers/usb/early/xhci-dbc.c 	writel(port_reg, &xdbc.xdbc_reg->portsc);
writel            778 drivers/usb/early/xhci-dbc.c 		writel(reg, &xdbc.xdbc_reg->control);
writel            948 drivers/usb/early/xhci-dbc.c 	writel(0, &xdbc.xdbc_reg->control);
writel            998 drivers/usb/early/xhci-dbc.c 	writel(0, &xdbc.xdbc_reg->control);
writel             71 drivers/usb/gadget/udc/amd5536udc_pci.c 	writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg);
writel            114 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(istat, vhub->regs + AST_VHUB_ISR);
writel            125 drivers/usb/gadget/udc/aspeed-vhub/core.c 		writel(ep_acks, vhub->regs + AST_VHUB_EP_ACK_ISR);
writel            213 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(ctrl, vhub->regs + AST_VHUB_CTRL);
writel            219 drivers/usb/gadget/udc/aspeed-vhub/core.c 		writel(ctrl, vhub->regs + AST_VHUB_CTRL);
writel            225 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_SW_RESET_ALL, vhub->regs + AST_VHUB_SW_RESET);
writel            227 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_SW_RESET);
writel            230 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_EP_ACK_IER);
writel            231 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_EP_NACK_IER);
writel            232 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_EP_IRQ_ALL, vhub->regs + AST_VHUB_EP_ACK_ISR);
writel            233 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_EP_IRQ_ALL, vhub->regs + AST_VHUB_EP_NACK_ISR);
writel            236 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_EP0_CTRL);
writel            237 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_EP1_CTRL_RESET_TOGGLE |
writel            240 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_EP1_STS_CHG);
writel            243 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(vhub->ep0.buf_dma, vhub->regs + AST_VHUB_EP0_DATA);
writel            246 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_CONF);
writel            253 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(ctrl, vhub->regs + AST_VHUB_CTRL);
writel            256 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_IRQ_HUB_EP0_IN_ACK_STALL |
writel            282 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_IER);
writel            283 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_IRQ_ACK_ALL, vhub->regs + AST_VHUB_ISR);
writel            286 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_CTRL_PHY_CLK |
writel            347 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(0, vhub->regs + AST_VHUB_IER);
writel            348 drivers/usb/gadget/udc/aspeed-vhub/core.c 	writel(VHUB_IRQ_ACK_ALL, vhub->regs + AST_VHUB_ISR);
writel             41 drivers/usb/gadget/udc/aspeed-vhub/dev.c 	writel(istat, d->regs + AST_VHUB_DEV_ISR);
writel             68 drivers/usb/gadget/udc/aspeed-vhub/dev.c 	writel(reg, d->regs + AST_VHUB_DEV_EN_CTRL);
writel             74 drivers/usb/gadget/udc/aspeed-vhub/dev.c 	writel(reg, d->vhub->regs + AST_VHUB_IER);
writel             77 drivers/usb/gadget/udc/aspeed-vhub/dev.c 	writel(d->ep0.buf_dma, d->regs + AST_VHUB_DEV_EP0_DATA);
writel            106 drivers/usb/gadget/udc/aspeed-vhub/dev.c 	writel(reg, d->vhub->regs + AST_VHUB_IER);
writel            109 drivers/usb/gadget/udc/aspeed-vhub/dev.c 	writel(0, d->regs + AST_VHUB_DEV_EN_CTRL);
writel            209 drivers/usb/gadget/udc/aspeed-vhub/dev.c 	writel(reg, d->regs + AST_VHUB_DEV_EN_CTRL);
writel            169 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 	writel(VHUB_EP0_CTRL_STALL, ep->ep0.ctlstat);
writel            176 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 	writel(VHUB_EP0_TX_BUFF_RDY, ep->ep0.ctlstat);
writel            199 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 		writel(VHUB_EP0_RX_BUFF_RDY, ep->ep0.ctlstat);
writel            228 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 	writel(reg, ep->ep0.ctlstat);
writel            229 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 	writel(reg | VHUB_EP0_TX_BUFF_RDY, ep->ep0.ctlstat);
writel            238 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 	writel(VHUB_EP0_RX_BUFF_RDY, ep->ep0.ctlstat);
writel            266 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 		writel(VHUB_EP0_TX_BUFF_RDY, ep->ep0.ctlstat);
writel            352 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 		writel(VHUB_EP0_CTRL_STALL, ep->ep0.ctlstat);
writel            425 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 		writel(VHUB_EP0_TX_BUFF_RDY, ep->ep0.ctlstat);
writel            461 drivers/usb/gadget/udc/aspeed-vhub/ep0.c 		writel(VHUB_EP0_CTRL_STALL, ep->ep0.ctlstat);
writel             73 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->buf_dma, ep->epn.regs + AST_VHUB_EP_DESC_BASE);
writel             77 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(req->req.dma + act, ep->epn.regs + AST_VHUB_EP_DESC_BASE);
writel             82 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(VHUB_EP_DMA_SET_TX_SIZE(chunk),
writel             84 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(VHUB_EP_DMA_SET_TX_SIZE(chunk) | VHUB_EP_DMA_SINGLE_KICK,
writel            239 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(VHUB_EP_DMA_SET_CPU_WPTR(ep->epn.d_next),
writel            423 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(0, ep->epn.regs + AST_VHUB_EP_DMA_CTLSTAT);
writel            455 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(reg, ep->epn.regs + AST_VHUB_EP_DESC_STATUS);
writel            458 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->epn.dma_conf,
writel            462 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->epn.dma_conf,
writel            507 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(reg, ep->epn.regs + AST_VHUB_EP_CONFIG);
writel            510 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(VHUB_EP_TOGGLE_SET_EPNUM(ep->epn.g_idx),
writel            573 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(0, ep->epn.regs + AST_VHUB_EP_CONFIG);
writel            579 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(ep_ier, vhub->regs + AST_VHUB_EP_ACK_IER);
writel            580 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(imask, vhub->regs + AST_VHUB_EP_ACK_ISR);
writel            695 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(0, ep->epn.regs + AST_VHUB_EP_CONFIG);
writel            696 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(VHUB_EP_DMA_CTRL_RESET,
writel            700 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(ep_conf, ep->epn.regs + AST_VHUB_EP_CONFIG);
writel            704 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(0, ep->epn.regs + AST_VHUB_EP_DESC_STATUS);
writel            707 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->epn.descs_dma,
writel            716 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->epn.dma_conf | VHUB_EP_DMA_CTRL_RESET,
writel            720 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->epn.dma_conf,
writel            727 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->epn.dma_conf | VHUB_EP_DMA_CTRL_RESET,
writel            729 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(ep->epn.dma_conf,
writel            731 drivers/usb/gadget/udc/aspeed-vhub/epn.c 		writel(0, ep->epn.regs + AST_VHUB_EP_DESC_STATUS);
writel            735 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(VHUB_EP_TOGGLE_SET_EPNUM(ep->epn.g_idx),
writel            740 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(imask, vhub->regs + AST_VHUB_EP_ACK_ISR);
writel            743 drivers/usb/gadget/udc/aspeed-vhub/epn.c 	writel(ep_ier, vhub->regs + AST_VHUB_EP_ACK_IER);
writel            260 drivers/usb/gadget/udc/aspeed-vhub/hub.c 	writel(reg, ep->vhub->regs + AST_VHUB_EP1_CTRL);
writel            360 drivers/usb/gadget/udc/aspeed-vhub/hub.c 		writel(wValue, vhub->regs + AST_VHUB_CONF);
writel            423 drivers/usb/gadget/udc/aspeed-vhub/hub.c 	writel(reg, vhub->regs + AST_VHUB_EP1_STS_CHG);
writel            470 drivers/usb/gadget/udc/aspeed-vhub/hub.c 	writel(reg, vhub->regs + AST_VHUB_CTRL);
writel            829 drivers/usb/gadget/udc/aspeed-vhub/hub.c 	writel(0, vhub->regs + AST_VHUB_CONF);
writel            830 drivers/usb/gadget/udc/aspeed-vhub/hub.c 	writel(0, vhub->regs + AST_VHUB_EP0_CTRL);
writel            831 drivers/usb/gadget/udc/aspeed-vhub/hub.c 	writel(VHUB_EP1_CTRL_RESET_TOGGLE |
writel            834 drivers/usb/gadget/udc/aspeed-vhub/hub.c 	writel(0, vhub->regs + AST_VHUB_EP1_STS_CHG);
writel            465 drivers/usb/gadget/udc/bdc/bdc.h 	writel(value, base + offset);
writel             99 drivers/usb/gadget/udc/fsl_mxc_udc.c 		writel(v | USBPHYCTRL_EVDO,
writel            144 drivers/usb/gadget/udc/fsl_udc_core.c #define fsl_writel(val32, addr) writel(val32, addr)
writel             86 drivers/usb/gadget/udc/goku_udc.c 	writel(COMMAND_EP(epnum) | command, &regs->Command);
writel            168 drivers/usb/gadget/udc/goku_udc.c 		writel(tmp, &regs->EPxSingle);
writel            172 drivers/usb/gadget/udc/goku_udc.c 		writel(tmp, &regs->EPxBCS);
writel            174 drivers/usb/gadget/udc/goku_udc.c 	writel(mode, ep->reg_mode);
writel            204 drivers/usb/gadget/udc/goku_udc.c 		writel(dev->int_enable, &regs->int_enable);
writel            212 drivers/usb/gadget/udc/goku_udc.c 			writel(tmp, &r->EPxSingle);
writel            216 drivers/usb/gadget/udc/goku_udc.c 			writel(tmp, &r->EPxBCS);
writel            230 drivers/usb/gadget/udc/goku_udc.c 			writel(master, &regs->dma_master);
writel            341 drivers/usb/gadget/udc/goku_udc.c 		writel(*buf++, fifo);
writel            368 drivers/usb/gadget/udc/goku_udc.c 		writel(~INT_EPxDATASET(ep->num), &dev->regs->int_status);
writel            374 drivers/usb/gadget/udc/goku_udc.c 		writel(~(1<<ep->num), &dev->regs->EOP);
writel            424 drivers/usb/gadget/udc/goku_udc.c 			writel(~INT_EPxDATASET(ep->num), &regs->int_status);
writel            476 drivers/usb/gadget/udc/goku_udc.c 					writel(ep->dev->configured
writel            481 drivers/usb/gadget/udc/goku_udc.c 				writel(~(1<<0), &regs->EOP);
writel            504 drivers/usb/gadget/udc/goku_udc.c 	writel(dev->int_enable, &regs->int_enable);
writel            513 drivers/usb/gadget/udc/goku_udc.c 	writel(dev->int_enable, &regs->int_enable);
writel            548 drivers/usb/gadget/udc/goku_udc.c 		writel(end, &regs->in_dma_end);
writel            549 drivers/usb/gadget/udc/goku_udc.c 		writel(start, &regs->in_dma_start);
writel            573 drivers/usb/gadget/udc/goku_udc.c 		writel(end, &regs->out_dma_end);
writel            574 drivers/usb/gadget/udc/goku_udc.c 		writel(start, &regs->out_dma_start);
writel            582 drivers/usb/gadget/udc/goku_udc.c 	writel(master, &regs->dma_master);
writel            583 drivers/usb/gadget/udc/goku_udc.c 	writel(ep->dev->int_enable, &regs->int_enable);
writel            601 drivers/usb/gadget/udc/goku_udc.c 		writel(dev->int_enable, &regs->int_enable);
writel            662 drivers/usb/gadget/udc/goku_udc.c 		writel(curr, &regs->in_dma_end);
writel            663 drivers/usb/gadget/udc/goku_udc.c 		writel(curr, &regs->in_dma_start);
writel            667 drivers/usb/gadget/udc/goku_udc.c 		writel(master, &regs->dma_master);
writel            677 drivers/usb/gadget/udc/goku_udc.c 		writel(curr, &regs->out_dma_end);
writel            678 drivers/usb/gadget/udc/goku_udc.c 		writel(curr, &regs->out_dma_start);
writel            682 drivers/usb/gadget/udc/goku_udc.c 		writel(master, &regs->dma_master);
writel           1294 drivers/usb/gadget/udc/goku_udc.c 	writel(0, &regs->power_detect);
writel           1295 drivers/usb/gadget/udc/goku_udc.c 	writel(0, &regs->int_enable);
writel           1303 drivers/usb/gadget/udc/goku_udc.c 	writel(PW_RESETB, &regs->power_detect);
writel           1319 drivers/usb/gadget/udc/goku_udc.c 	writel(   G_REQMODE_SET_INTF | G_REQMODE_GET_INTF
writel           1330 drivers/usb/gadget/udc/goku_udc.c 		writel(0, &regs->descriptors[i]);
writel           1331 drivers/usb/gadget/udc/goku_udc.c 	writel(0, &regs->UsbReady);
writel           1334 drivers/usb/gadget/udc/goku_udc.c 	writel(PW_RESETB | PW_PULLUP, &regs->power_detect);
writel           1336 drivers/usb/gadget/udc/goku_udc.c 	writel(dev->int_enable, &dev->regs->int_enable);
writel           1350 drivers/usb/gadget/udc/goku_udc.c 		writel(dev->int_enable, &dev->regs->int_enable);
writel           1430 drivers/usb/gadget/udc/goku_udc.c 	writel(0, &regs->SetupRecv);
writel           1438 drivers/usb/gadget/udc/goku_udc.c 		writel(ICONTROL_STATUSNAK, &dev->regs->IntControl);
writel           1471 drivers/usb/gadget/udc/goku_udc.c 				writel(~(1<<0), &regs->EOP);
writel           1527 drivers/usb/gadget/udc/goku_udc.c 		writel(~irqbit, &regs->int_status); \
writel           1559 drivers/usb/gadget/udc/goku_udc.c 			writel(~stat, &regs->int_status);
writel           1569 drivers/usb/gadget/udc/goku_udc.c 				writel(dev->int_enable, &dev->regs->int_enable);
writel           1634 drivers/usb/gadget/udc/goku_udc.c 			writel(~(1<<0), &regs->EOP);
writel            715 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel(USBD_CCEMPTY, USBD_DEVINTCLR(udc->udp_baseaddr));
writel            718 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel(cmd, USBD_CMDCODE(udc->udp_baseaddr));
writel            747 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel((USBD_CDFULL | USBD_CCEMPTY),
writel            772 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(udc->enabled_devints, USBD_DEVINTEN(udc->udp_baseaddr));
writel            779 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(udc->enabled_devints, USBD_DEVINTEN(udc->udp_baseaddr));
writel            785 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(mask, USBD_DEVINTCLR(udc->udp_baseaddr));
writel            797 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(udc->enabled_hwepints, USBD_EPINTEN(udc->udp_baseaddr));
writel            804 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(udc->enabled_hwepints, USBD_EPINTEN(udc->udp_baseaddr));
writel            810 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel((1 << hwep), USBD_EPINTCLR(udc->udp_baseaddr));
writel            816 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel((1 << hwep), USBD_EPDMAEN(udc->udp_baseaddr));
writel            822 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel((1 << hwep), USBD_EPDMADIS(udc->udp_baseaddr));
writel            838 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(USBD_EP_RLZED, USBD_DEVINTCLR(udc->udp_baseaddr));
writel            839 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(hwep, USBD_EPIND(udc->udp_baseaddr));
writel            841 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(udc->realized_eps, USBD_REEP(udc->udp_baseaddr));
writel            842 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(maxpacket, USBD_EPMAXPSIZE(udc->udp_baseaddr));
writel            851 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(USBD_EP_RLZED, USBD_DEVINTCLR(udc->udp_baseaddr));
writel            858 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(udc->realized_eps, USBD_REEP(udc->udp_baseaddr));
writel           1052 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel((1 << i), USBD_EOTINTCLR(udc->udp_baseaddr));
writel           1053 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel((1 << i), USBD_NDDRTINTCLR(udc->udp_baseaddr));
writel           1054 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel((1 << i), USBD_SYSERRTINTCLR(udc->udp_baseaddr));
writel           1055 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel((1 << i), USBD_DMARCLR(udc->udp_baseaddr));
writel           1059 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(0, USBD_DMAINTEN(udc->udp_baseaddr));
writel           1061 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(0, USBD_UDCAH(udc->udp_baseaddr));
writel           1076 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(USBD_EP_FAST, USBD_DEVINTPRI(udc->udp_baseaddr));
writel           1077 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(0xFFFF, USBD_EPINTPRI(udc->udp_baseaddr));
writel           1080 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(0x3FF, USBD_DEVINTCLR(udc->udp_baseaddr));
writel           1083 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(udc->udca_p_base, USBD_UDCAH(udc->udp_baseaddr));
writel           1106 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel((USBD_SYS_ERR_INT | USBD_EOT_INT),
writel           1222 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(hwrep, USBD_CTRL(udc->udp_baseaddr));
writel           1239 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(((hwep & 0x1E) << 1), USBD_CTRL(udc->udp_baseaddr));
writel           1262 drivers/usb/gadget/udc/lpc32xx_udc.c 			writel(*p32++, USBD_TXDATA(udc->udp_baseaddr));
writel           1271 drivers/usb/gadget/udc/lpc32xx_udc.c 			writel(tmp, USBD_TXDATA(udc->udp_baseaddr));
writel           1287 drivers/usb/gadget/udc/lpc32xx_udc.c 			writel(tmp, USBD_TXDATA(udc->udp_baseaddr));
writel           1299 drivers/usb/gadget/udc/lpc32xx_udc.c 			writel(tmp, USBD_TXDATA(udc->udp_baseaddr));
writel           1309 drivers/usb/gadget/udc/lpc32xx_udc.c 			writel(tmp, USBD_TXDATA(udc->udp_baseaddr));
writel           1327 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(hwwep, USBD_CTRL(udc->udp_baseaddr));
writel           1329 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(bytes, USBD_TXPLEN(udc->udp_baseaddr));
writel           1333 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel(0, USBD_TXDATA(udc->udp_baseaddr));
writel           1337 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(((hwep & 0x1E) << 1), USBD_CTRL(udc->udp_baseaddr));
writel           1590 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_EOTINTCLR(udc->udp_baseaddr));
writel           1591 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_NDDRTINTCLR(udc->udp_baseaddr));
writel           1592 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_SYSERRTINTCLR(udc->udp_baseaddr));
writel           1593 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_DMARCLR(udc->udp_baseaddr));
writel           1702 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_EOTINTCLR(udc->udp_baseaddr));
writel           1703 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_NDDRTINTCLR(udc->udp_baseaddr));
writel           1704 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_SYSERRTINTCLR(udc->udp_baseaddr));
writel           1705 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(1 << ep->hwep_num, USBD_DMARCLR(udc->udp_baseaddr));
writel           2013 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel((1 << ep->hwep_num), USBD_EOTINTCLR(udc->udp_baseaddr));
writel           2014 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel((1 << ep->hwep_num), USBD_NDDRTINTCLR(udc->udp_baseaddr));
writel           2019 drivers/usb/gadget/udc/lpc32xx_udc.c 		writel((1 << ep->hwep_num),
writel           2746 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(devstat, USBD_DEVINTCLR(udc->udp_baseaddr));
writel           2782 drivers/usb/gadget/udc/lpc32xx_udc.c 	writel(USBD_EP_FAST, USBD_DEVINTCLR(udc->udp_baseaddr));
writel            103 drivers/usb/gadget/udc/mv_udc_core.c 		writel(epctrlx, &udc->op_regs->epctrlx[0]);
writel            115 drivers/usb/gadget/udc/mv_udc_core.c 	writel(epctrlx, &udc->op_regs->epctrlx[0]);
writel            283 drivers/usb/gadget/udc/mv_udc_core.c 			writel(usbcmd, &udc->op_regs->usbcmd);
writel            312 drivers/usb/gadget/udc/mv_udc_core.c 		writel(usbcmd, &udc->op_regs->usbcmd);
writel            329 drivers/usb/gadget/udc/mv_udc_core.c 	writel(bit_pos, &udc->op_regs->epprime);
writel            527 drivers/usb/gadget/udc/mv_udc_core.c 	writel(epctrlx, &udc->op_regs->epctrlx[ep->ep_num]);
writel            537 drivers/usb/gadget/udc/mv_udc_core.c 		writel(epctrlx, &udc->op_regs->epctrlx[ep->ep_num]);
writel            544 drivers/usb/gadget/udc/mv_udc_core.c 		writel(epctrlx, &udc->op_regs->epctrlx[ep->ep_num]);
writel            583 drivers/usb/gadget/udc/mv_udc_core.c 	writel(epctrlx, &udc->op_regs->epctrlx[ep->ep_num]);
writel            657 drivers/usb/gadget/udc/mv_udc_core.c 		writel(bit_pos, &udc->op_regs->epflush);
writel            768 drivers/usb/gadget/udc/mv_udc_core.c 	writel(bit_pos, &ep->udc->op_regs->epprime);
writel            794 drivers/usb/gadget/udc/mv_udc_core.c 	writel(epctrlx, &udc->op_regs->epctrlx[ep->ep_num]);
writel            833 drivers/usb/gadget/udc/mv_udc_core.c 		writel(readl(&req->tail->dtd_next),
writel            847 drivers/usb/gadget/udc/mv_udc_core.c 	writel(epctrlx, &udc->op_regs->epctrlx[ep->ep_num]);
writel            874 drivers/usb/gadget/udc/mv_udc_core.c 	writel(epctrlx, &udc->op_regs->epctrlx[ep_num]);
writel            976 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->usbintr);
writel            983 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->usbcmd);
writel            994 drivers/usb/gadget/udc/mv_udc_core.c 	writel(usbintr, &udc->op_regs->usbintr);
writel            999 drivers/usb/gadget/udc/mv_udc_core.c 	writel(USBCMD_RUN_STOP, &udc->op_regs->usbcmd);
writel           1010 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->usbcmd);
writel           1013 drivers/usb/gadget/udc/mv_udc_core.c 	writel(USBCMD_CTRL_RESET, &udc->op_regs->usbcmd);
writel           1034 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->usbmode);
writel           1036 drivers/usb/gadget/udc/mv_udc_core.c 	writel(0x0, &udc->op_regs->epsetupstat);
writel           1039 drivers/usb/gadget/udc/mv_udc_core.c 	writel(udc->ep_dqh_dma & USB_EP_LIST_ADDRESS_MASK,
writel           1051 drivers/usb/gadget/udc/mv_udc_core.c 	writel(portsc, &udc->op_regs->portsc[0]);
writel           1055 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->epctrlx[0]);
writel           1142 drivers/usb/gadget/udc/mv_udc_core.c 	writel(portsc, &udc->op_regs->portsc[0]);
writel           1419 drivers/usb/gadget/udc/mv_udc_core.c 	writel(portsc, &udc->op_regs->portsc[0]);
writel           1729 drivers/usb/gadget/udc/mv_udc_core.c 		writel(new_addr << USB_DEVICE_ADDRESS_BIT_SHIFT,
writel           1766 drivers/usb/gadget/udc/mv_udc_core.c 	writel((1 << ep_num), &udc->op_regs->epsetupstat);
writel           1772 drivers/usb/gadget/udc/mv_udc_core.c 		writel(temp | USBCMD_SETUP_TRIPWIRE_SET, &udc->op_regs->usbcmd);
writel           1780 drivers/usb/gadget/udc/mv_udc_core.c 	writel(temp & ~USBCMD_SETUP_TRIPWIRE_SET, &udc->op_regs->usbcmd);
writel           1820 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->epcomplete);
writel           1868 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->deviceaddr);
writel           1872 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->epsetupstat);
writel           1876 drivers/usb/gadget/udc/mv_udc_core.c 	writel(tmp, &udc->op_regs->epcomplete);
writel           1892 drivers/usb/gadget/udc/mv_udc_core.c 	writel((u32)~0, &udc->op_regs->epflush);
writel           2019 drivers/usb/gadget/udc/mv_udc_core.c 	writel(status, &udc->op_regs->usbsts);
writel           2191 drivers/usb/gadget/udc/mv_udc_core.c 	writel(0xFFFFFFFF, &udc->op_regs->usbsts);
writel           2405 drivers/usb/gadget/udc/mv_udc_core.c 	writel(mode, &udc->op_regs->usbmode);
writel            647 drivers/usb/gadget/udc/net2272.c 		writel((1 << LOCAL_BUS_WIDTH) |
writel            658 drivers/usb/gadget/udc/net2272.c 		writel(0x100000, dev->rdk1.plx9054_base_addr + DMALADR0);
writel            659 drivers/usb/gadget/udc/net2272.c 		writel(buf, dev->rdk1.plx9054_base_addr + DMAPADR0);
writel            660 drivers/usb/gadget/udc/net2272.c 		writel(len, dev->rdk1.plx9054_base_addr + DMASIZ0);
writel            661 drivers/usb/gadget/udc/net2272.c 		writel((dir << DIRECTION_OF_TRANSFER) |
writel            664 drivers/usb/gadget/udc/net2272.c 		writel((1 << LOCAL_DMA_CHANNEL_0_INTERRUPT_ENABLE) |
writel           2059 drivers/usb/gadget/udc/net2272.c 		writel(intcsr & ~(1 << PCI_INTERRUPT_ENABLE),
writel           2064 drivers/usb/gadget/udc/net2272.c 		writel(intcsr | (1 << PCI_INTERRUPT_ENABLE),
writel           2341 drivers/usb/gadget/udc/net2272.c 	writel((tmp & ~(3 << MEMORY_SPACE_LOCAL_BUS_WIDTH)) | W16_BIT,
writel           2345 drivers/usb/gadget/udc/net2272.c 	writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) |
writel           2418 drivers/usb/gadget/udc/net2272.c 	writel((1 << CHIP_RESET), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK);
writel           2420 drivers/usb/gadget/udc/net2272.c 	writel((1 << BUS_WIDTH), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK);
writel           2425 drivers/usb/gadget/udc/net2272.c 	writel((1 << NET2272_PCI_IRQ), dev->rdk2.fpga_base_addr + RDK2_IRQENB);
writel           2487 drivers/usb/gadget/udc/net2272.c 	writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) &
writel            175 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &ep->dev->regs->pciirqenb0);
writel            242 drivers/usb/gadget/udc/net2280.c 	writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
writel            263 drivers/usb/gadget/udc/net2280.c 			writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
writel            306 drivers/usb/gadget/udc/net2280.c 		writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
writel            311 drivers/usb/gadget/udc/net2280.c 		writel(BIT(CLEAR_NAK_OUT_PACKETS) |
writel            317 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &ep->cfg->ep_cfg);
writel            327 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &ep->regs->ep_irqenb);
writel            331 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->regs->pciirqenb1);
writel            339 drivers/usb/gadget/udc/net2280.c 			writel(tmp, &ep->regs->ep_irqenb);
writel            392 drivers/usb/gadget/udc/net2280.c 		writel(0, &ep->dma->dmactl);
writel            393 drivers/usb/gadget/udc/net2280.c 		writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
writel            400 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &regs->pciirqenb0);
writel            404 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &regs->pciirqenb1);
writel            406 drivers/usb/gadget/udc/net2280.c 	writel(0, &ep->regs->ep_irqenb);
writel            428 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &ep->regs->ep_rsp);
writel            437 drivers/usb/gadget/udc/net2280.c 	writel(tmp | BIT(TIMEOUT) |
writel            468 drivers/usb/gadget/udc/net2280.c 		writel(0, &ep->dma->dmactl);
writel            469 drivers/usb/gadget/udc/net2280.c 		writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
writel            480 drivers/usb/gadget/udc/net2280.c 			writel(0x5a, &ep->dma->dmastat);
writel            485 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &regs->pciirqenb0);
writel            490 drivers/usb/gadget/udc/net2280.c 			writel(tmp, &regs->pciirqenb1);
writel            493 drivers/usb/gadget/udc/net2280.c 	writel(0, &ep->regs->ep_irqenb);
writel            495 drivers/usb/gadget/udc/net2280.c 	writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
writel            508 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &ep->cfg->ep_cfg);
writel            643 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &regs->ep_data);
writel            656 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &regs->ep_data);
writel            680 drivers/usb/gadget/udc/net2280.c 		writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
writel            683 drivers/usb/gadget/udc/net2280.c 	writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
writel            686 drivers/usb/gadget/udc/net2280.c 	writel(BIT(FIFO_FLUSH), statp);
writel            788 drivers/usb/gadget/udc/net2280.c 		writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
writel            844 drivers/usb/gadget/udc/net2280.c 	writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
writel            856 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &dma->dmacount);
writel            857 drivers/usb/gadget/udc/net2280.c 	writel(readl(&dma->dmastat), &dma->dmastat);
writel            859 drivers/usb/gadget/udc/net2280.c 	writel(td_dma, &dma->dmadesc);
writel            862 drivers/usb/gadget/udc/net2280.c 	writel(dmactl, &dma->dmactl);
writel            867 drivers/usb/gadget/udc/net2280.c 	writel(BIT(DMA_START), &dma->dmastat);
writel            879 drivers/usb/gadget/udc/net2280.c 	writel(0, &ep->dma->dmactl);
writel            884 drivers/usb/gadget/udc/net2280.c 		writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
writel            889 drivers/usb/gadget/udc/net2280.c 			writel(readl(&dma->dmastat), &dma->dmastat);
writel            892 drivers/usb/gadget/udc/net2280.c 			writel(req->req.dma, &dma->dmaaddr);
writel            897 drivers/usb/gadget/udc/net2280.c 			writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
writel            902 drivers/usb/gadget/udc/net2280.c 			writel(BIT(DMA_ENABLE), &dma->dmactl);
writel            903 drivers/usb/gadget/udc/net2280.c 			writel(BIT(DMA_START), &dma->dmastat);
writel           1088 drivers/usb/gadget/udc/net2280.c 					writel(BIT(CLEAR_NAK_OUT_PACKETS),
writel           1216 drivers/usb/gadget/udc/net2280.c 		writel(BIT(DMA_ABORT), &ep->dma->dmastat);
writel           1312 drivers/usb/gadget/udc/net2280.c 				writel(dmactl, &ep->dma->dmactl);
writel           1445 drivers/usb/gadget/udc/net2280.c 	writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
writel           1495 drivers/usb/gadget/udc/net2280.c 		writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
writel           1521 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &dev->usb->usbctl);
writel           1542 drivers/usb/gadget/udc/net2280.c 		writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
writel           1544 drivers/usb/gadget/udc/net2280.c 		writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
writel           1914 drivers/usb/gadget/udc/net2280.c 	writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
writel           1954 drivers/usb/gadget/udc/net2280.c 		writel(i, &ep->cfg->ep_cfg);
writel           1959 drivers/usb/gadget/udc/net2280.c 		writel(0, &dev->dep[i].dep_cfg);
writel           1964 drivers/usb/gadget/udc/net2280.c 		writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
writel           1973 drivers/usb/gadget/udc/net2280.c 		writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
writel           1976 drivers/usb/gadget/udc/net2280.c 		writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
writel           2005 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->ep[i].cfg->ep_cfg);
writel           2009 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &dev->dep[1].dep_cfg);
writel           2010 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &dev->dep[3].dep_cfg);
writel           2011 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &dev->dep[4].dep_cfg);
writel           2012 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &dev->dep[5].dep_cfg);
writel           2019 drivers/usb/gadget/udc/net2280.c 		writel(((tmp_reg & ~0x1f) | ep_sel),
writel           2026 drivers/usb/gadget/udc/net2280.c 			writel(tmp, &dev->plregs->pl_ep_ctrl);
writel           2036 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->plregs->pl_ep_cfg_4);
writel           2040 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->plregs->pl_ep_ctrl);
writel           2071 drivers/usb/gadget/udc/net2280.c 	writel(0, &dev->usb->stdrsp);
writel           2072 drivers/usb/gadget/udc/net2280.c 	writel(0, &dev->regs->pciirqenb0);
writel           2073 drivers/usb/gadget/udc/net2280.c 	writel(0, &dev->regs->pciirqenb1);
writel           2082 drivers/usb/gadget/udc/net2280.c 	writel(~0, &dev->regs->irqstat0),
writel           2083 drivers/usb/gadget/udc/net2280.c 	writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
writel           2091 drivers/usb/gadget/udc/net2280.c 	writel(tmp, &dev->regs->devinit);
writel           2108 drivers/usb/gadget/udc/net2280.c 		writel(0, &dev->usb->stdrsp);
writel           2109 drivers/usb/gadget/udc/net2280.c 		writel(0, &dev->regs->pciirqenb0);
writel           2110 drivers/usb/gadget/udc/net2280.c 		writel(0, &dev->regs->pciirqenb1);
writel           2122 drivers/usb/gadget/udc/net2280.c 			writel(BIT(DMA_ABORT), &dma->dmastat);
writel           2123 drivers/usb/gadget/udc/net2280.c 			writel(0, &dma->dmactl);
writel           2127 drivers/usb/gadget/udc/net2280.c 	writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
writel           2137 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->regs->devinit);
writel           2189 drivers/usb/gadget/udc/net2280.c 		writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
writel           2221 drivers/usb/gadget/udc/net2280.c 				writel(ne[i], &ep->cfg->ep_cfg);
writel           2243 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->usb_ext->usbctl2);
writel           2250 drivers/usb/gadget/udc/net2280.c 	writel(val, &dev->llregs->ll_lfps_5);
writel           2255 drivers/usb/gadget/udc/net2280.c 	writel(val, &dev->llregs->ll_lfps_6);
writel           2265 drivers/usb/gadget/udc/net2280.c 	writel(val, &dev->llregs->ll_tsn_counters_2);
writel           2270 drivers/usb/gadget/udc/net2280.c 	writel(val, &dev->llregs->ll_tsn_counters_3);
writel           2279 drivers/usb/gadget/udc/net2280.c 	writel((val & 0xffff0000) | LFPS_TIMERS_2_WORKAROUND_VALUE,
writel           2292 drivers/usb/gadget/udc/net2280.c 	writel(val, &dev->llregs->ll_tsn_chicken_bit);
writel           2297 drivers/usb/gadget/udc/net2280.c 	writel(0x0D, &dev->dep[0].dep_cfg);
writel           2298 drivers/usb/gadget/udc/net2280.c 	writel(0x0D, &dev->dep[1].dep_cfg);
writel           2299 drivers/usb/gadget/udc/net2280.c 	writel(0x0E, &dev->dep[2].dep_cfg);
writel           2300 drivers/usb/gadget/udc/net2280.c 	writel(0x0E, &dev->dep[3].dep_cfg);
writel           2301 drivers/usb/gadget/udc/net2280.c 	writel(0x0F, &dev->dep[4].dep_cfg);
writel           2302 drivers/usb/gadget/udc/net2280.c 	writel(0x0C, &dev->dep[5].dep_cfg);
writel           2314 drivers/usb/gadget/udc/net2280.c 	writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
writel           2325 drivers/usb/gadget/udc/net2280.c 	writel(BIT(SET_TEST_MODE) |
writel           2331 drivers/usb/gadget/udc/net2280.c 	writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
writel           2339 drivers/usb/gadget/udc/net2280.c 	writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
writel           2342 drivers/usb/gadget/udc/net2280.c 	writel(BIT(PCI_INTERRUPT_ENABLE) |
writel           2359 drivers/usb/gadget/udc/net2280.c 		writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
writel           2369 drivers/usb/gadget/udc/net2280.c 	writel(BIT(SET_ISOCHRONOUS_DELAY) |
writel           2377 drivers/usb/gadget/udc/net2280.c 	writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
writel           2383 drivers/usb/gadget/udc/net2280.c 	writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
writel           2386 drivers/usb/gadget/udc/net2280.c 	writel(BIT(PCI_INTERRUPT_ENABLE) |
writel           2533 drivers/usb/gadget/udc/net2280.c 		writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
writel           2536 drivers/usb/gadget/udc/net2280.c 		writel(t, &ep->regs->ep_stat);
writel           2663 drivers/usb/gadget/udc/net2280.c 			writel(BIT(DMA_ABORT), &ep->dma->dmastat);
writel           2854 drivers/usb/gadget/udc/net2280.c 	writel(val, &dev->plregs->pl_ep_ctrl);
writel           2856 drivers/usb/gadget/udc/net2280.c 	writel(val, &dev->plregs->pl_ep_ctrl);
writel           2886 drivers/usb/gadget/udc/net2280.c 			writel(0, &dev->epregs[0].ep_irqenb);
writel           2888 drivers/usb/gadget/udc/net2280.c 			writel((__force u32) status, &dev->epregs[0].ep_data);
writel           2898 drivers/usb/gadget/udc/net2280.c 			writel(0, &dev->epregs[0].ep_irqenb);
writel           2900 drivers/usb/gadget/udc/net2280.c 			writel((__force u32) status, &dev->epregs[0].ep_data);
writel           2916 drivers/usb/gadget/udc/net2280.c 					writel(readl(&dev->usb_ext->usbctl2) &
writel           2924 drivers/usb/gadget/udc/net2280.c 					writel(readl(&dev->usb_ext->usbctl2) &
writel           2932 drivers/usb/gadget/udc/net2280.c 					writel(readl(&dev->usb_ext->usbctl2) &
writel           2944 drivers/usb/gadget/udc/net2280.c 				writel(readl(&dev->usb->usbctl) &
writel           2982 drivers/usb/gadget/udc/net2280.c 					writel(readl(&dev->usb_ext->usbctl2) |
writel           2990 drivers/usb/gadget/udc/net2280.c 					writel(readl(&dev->usb_ext->usbctl2) |
writel           2998 drivers/usb/gadget/udc/net2280.c 					writel(readl(&dev->usb_ext->usbctl2) |
writel           3010 drivers/usb/gadget/udc/net2280.c 				writel(readl(&dev->usb->usbctl) |
writel           3149 drivers/usb/gadget/udc/net2280.c 			writel(tmp | BIT(TIMEOUT) |
writel           3179 drivers/usb/gadget/udc/net2280.c 		writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
writel           3197 drivers/usb/gadget/udc/net2280.c 		writel(scratch, &dev->epregs[0].ep_irqenb);
writel           3227 drivers/usb/gadget/udc/net2280.c 			writel(0, &dev->epregs[0].ep_irqenb);
writel           3229 drivers/usb/gadget/udc/net2280.c 			writel((__force u32)status, &dev->epregs[0].ep_data);
writel           3377 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->regs->irqstat1);
writel           3421 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dev->regs->irqstat1);
writel           3439 drivers/usb/gadget/udc/net2280.c 		writel(stat, &dev->regs->irqstat1);
writel           3477 drivers/usb/gadget/udc/net2280.c 		writel(tmp, &dma->dmastat);
writel           3552 drivers/usb/gadget/udc/net2280.c 		writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
writel           3553 drivers/usb/gadget/udc/net2280.c 		writel(pciirqenb1, &dev->regs->pciirqenb1);
writel           3693 drivers/usb/gadget/udc/net2280.c 			writel(0, &dev->usb->usbctl);
writel           3700 drivers/usb/gadget/udc/net2280.c 		writel(0, &dev->usb->usbctl);
writel           3753 drivers/usb/gadget/udc/net2280.c 		writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
writel           3799 drivers/usb/gadget/udc/net2280.c 	writel(0, &dev->regs->pciirqenb0);
writel           3800 drivers/usb/gadget/udc/net2280.c 	writel(0, &dev->regs->pciirqenb1);
writel           3803 drivers/usb/gadget/udc/net2280.c 	writel(0, &dev->usb->usbctl);
writel             26 drivers/usb/gadget/udc/net2280.h 	writel(index, &regs->idxaddr);
writel             34 drivers/usb/gadget/udc/net2280.h 	writel(index, &regs->idxaddr);
writel             35 drivers/usb/gadget/udc/net2280.h 	writel(value, &regs->idxdata);
writel            117 drivers/usb/gadget/udc/net2280.h 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
writel            131 drivers/usb/gadget/udc/net2280.h 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), &ep->regs->ep_rsp);
writel            190 drivers/usb/gadget/udc/net2280.h 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
writel            200 drivers/usb/gadget/udc/net2280.h 	writel(BIT(CLEAR_ENDPOINT_HALT) |
writel            252 drivers/usb/gadget/udc/net2280.h 	writel(BIT(GPIO3_LED_SELECT) |
writel            281 drivers/usb/gadget/udc/net2280.h 	writel(val, &dev->regs->gpioctl);
writel            294 drivers/usb/gadget/udc/net2280.h 	writel(val, &dev->regs->gpioctl);
writel            300 drivers/usb/gadget/udc/net2280.h 	writel(readl(&dev->regs->gpioctl) & ~0x0f,
writel            338 drivers/usb/gadget/udc/net2280.h 		writel(tmp | (count << EP_FIFO_BYTE_COUNT), &ep->cfg->ep_cfg);
writel            345 drivers/usb/gadget/udc/net2280.h 	writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
writel            356 drivers/usb/gadget/udc/net2280.h 		writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
writel            309 drivers/usb/gadget/udc/pxa25x_udc.c 	writel(val, dev->regs + reg);
writel            181 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(ep_addr, hsudc->regs + S3C_IR);
writel            186 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(readl(ptr) | val, ptr);
writel            194 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_PWRCFG);
writel            198 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_URSTCON);
writel            203 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_URSTCON);
writel            208 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_PHYCTRL);
writel            215 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_PHYPWR);
writel            220 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_UCLKCON);
writel            228 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_PWRCFG);
writel            230 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(S3C2443_PHYPWR_FSUSPEND, S3C2443_PHYPWR);
writel            233 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(cfg, S3C2443_UCLKCON);
writel            317 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(S3C_EP0SR_RX_SUCCESS, hsudc->regs + S3C_EP0SR);
writel            344 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(length, hsep->dev->regs + S3C_BWCR);
writel            346 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(*buf++, fifo);
writel            409 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(S3C_ESR_RX_SUCCESS, hsudc->regs + offset);
writel            435 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(S3C_ESR_STALL, hsudc->regs + S3C_ESR);
writel            440 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(S3C_ESR_TX_SUCCESS, hsudc->regs + S3C_ESR);
writel            468 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(S3C_ESR_STALL, hsudc->regs + S3C_ESR);
writel            523 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(ecr, hsudc->regs + offset);
writel            701 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(ecr, hsudc->regs + S3C_EP0CR);
writel            703 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(S3C_EP0SR_STALL, hsudc->regs + S3C_EP0SR);
writel            713 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(S3C_EP0SR_TX_SUCCESS, hsudc->regs + S3C_EP0SR);
writel            776 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(ecr, hsudc->regs + S3C_ECR);
writel           1021 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(hsep->ep.maxpacket, hsudc->regs + S3C_MPR);
writel           1048 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(0xAA, hsudc->regs + S3C_EDR);
writel           1049 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(1, hsudc->regs + S3C_EIER);
writel           1050 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(0, hsudc->regs + S3C_TR);
writel           1051 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(S3C_SCR_DTZIEN_EN | S3C_SCR_RRD_EN | S3C_SCR_SUS_EN |
writel           1053 drivers/usb/gadget/udc/s3c-hsudc.c 	writel(0, hsudc->regs + S3C_EP0CR);
writel           1086 drivers/usb/gadget/udc/s3c-hsudc.c 			writel(S3C_SSR_VBUSON, hsudc->regs + S3C_SSR);
writel           1089 drivers/usb/gadget/udc/s3c-hsudc.c 			writel(S3C_SSR_ERR, hsudc->regs + S3C_SSR);
writel           1092 drivers/usb/gadget/udc/s3c-hsudc.c 			writel(S3C_SSR_SDE, hsudc->regs + S3C_SSR);
writel           1098 drivers/usb/gadget/udc/s3c-hsudc.c 			writel(S3C_SSR_SUSPEND, hsudc->regs + S3C_SSR);
writel           1105 drivers/usb/gadget/udc/s3c-hsudc.c 			writel(S3C_SSR_RESUME, hsudc->regs + S3C_SSR);
writel           1112 drivers/usb/gadget/udc/s3c-hsudc.c 			writel(S3C_SSR_RESET, hsudc->regs + S3C_SSR);
writel           1124 drivers/usb/gadget/udc/s3c-hsudc.c 		writel(S3C_EIR_EP0, hsudc->regs + S3C_EIR);
writel           1135 drivers/usb/gadget/udc/s3c-hsudc.c 			writel(1 << ep_idx, hsudc->regs + S3C_EIR);
writel            236 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->irqmsk);
writel            239 drivers/usb/gadget/udc/snps_udc_core.c 	writel(UDC_EPINT_MSK_DISABLE_ALL, &dev->regs->ep_irqmsk);
writel            257 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ep_irqmsk);
writel            278 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->irqmsk);
writel            356 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[ep->num].regs->ctl);
writel            363 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[ep->num].regs->bufout_maxpkt);
writel            379 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &dev->ep[ep->num].regs->bufin_framenum);
writel            387 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &ep->regs->ctl);
writel            398 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &dev->csr->ne[ep->num - UDC_CSR_EP_OUT_IX_OFS]);
writel            427 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->csr->ne[udc_csr_epix]);
writel            432 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ep_irqmsk);
writel            441 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &ep->regs->ctl);
writel            466 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &ep->regs->ctl);
writel            472 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &regs->ep_irqmsk);
writel            478 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &ep->regs->ctl);
writel            482 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &ep->regs->sts);
writel            487 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &ep->regs->ctl);
writel            491 drivers/usb/gadget/udc/snps_udc_core.c 	writel(0, &ep->regs->desptr);
writel            673 drivers/usb/gadget/udc/snps_udc_core.c 		writel(*(buf + i), ep->txfifo);
writel            682 drivers/usb/gadget/udc/snps_udc_core.c 	writel(0, &ep->regs->confirm);
writel            954 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &ep->regs->ctl);
writel           1049 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ctl);
writel           1112 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp, &dev->regs->ctl);
writel           1120 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
writel           1151 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp, &dev->regs->ctl);
writel           1166 drivers/usb/gadget/udc/snps_udc_core.c 			writel(req->td_phys, &ep->regs->desptr);
writel           1172 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp, &ep->regs->ctl);
writel           1181 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp, &dev->regs->ep_irqmsk);
writel           1187 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp, &dev->regs->ep_irqmsk);
writel           1283 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp & AMD_UNMASK_BIT(UDC_DEVCTL_RDE),
writel           1295 drivers/usb/gadget/udc/snps_udc_core.c 					writel(ep->bna_dummy_req->td_phys,
writel           1298 drivers/usb/gadget/udc/snps_udc_core.c 				writel(tmp, &udc->regs->ctl);
writel           1341 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &ep->regs->ctl);
writel           1363 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &ep->regs->ctl);
writel           1407 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ctl);
writel           1409 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ctl);
writel           1481 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ctl);
writel           1490 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->cfg);
writel           1521 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->cfg);
writel           1585 drivers/usb/gadget/udc/snps_udc_core.c 				writel(reg, &dev->ep[tmp].regs->ctl);
writel           1698 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &dev->regs->cfg);
writel           1715 drivers/usb/gadget/udc/snps_udc_core.c 	writel(UDC_EPINT_MSK_DISABLE_ALL, &dev->regs->ep_irqsts);
writel           1717 drivers/usb/gadget/udc/snps_udc_core.c 	writel(UDC_DEV_MSK_DISABLE, &dev->regs->irqsts);
writel           1724 drivers/usb/gadget/udc/snps_udc_core.c 		writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg);
writel           1746 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &udc->regs->ctl);
writel           1803 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &ep->regs->ctl);
writel           1854 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
writel           1868 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->bufin_framenum);
writel           1878 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->bufout_maxpkt);
writel           1888 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt);
writel           1898 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->csr->ne[0]);
writel           1904 drivers/usb/gadget/udc/snps_udc_core.c 		writel(dev->ep[UDC_EP0OUT_IX].td_stp_dma,
writel           1906 drivers/usb/gadget/udc/snps_udc_core.c 		writel(dev->ep[UDC_EP0OUT_IX].td_phys,
writel           1925 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &dev->regs->ctl);
writel           1931 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
writel           1938 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl);
writel           1977 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ctl);
writel           2018 drivers/usb/gadget/udc/snps_udc_core.c 	writel(tmp, &dev->regs->ctl);
writel           2037 drivers/usb/gadget/udc/snps_udc_core.c 			writel(reg, &dev->ep[tmp].regs->ctl);
writel           2048 drivers/usb/gadget/udc/snps_udc_core.c 		writel(reg, &dev->ep[UDC_EP0OUT_IX].regs->ctl);
writel           2103 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp | AMD_BIT(UDC_EPSTS_BNA), &ep->regs->sts);
writel           2117 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp | AMD_BIT(UDC_EPSTS_HE), &ep->regs->sts);
writel           2234 drivers/usb/gadget/udc/snps_udc_core.c 					writel(req->td_phys,
writel           2247 drivers/usb/gadget/udc/snps_udc_core.c 					writel(ep->bna_dummy_req->td_phys,
writel           2291 drivers/usb/gadget/udc/snps_udc_core.c 	writel(UDC_EPSTS_OUT_CLEAR, &ep->regs->sts);
writel           2319 drivers/usb/gadget/udc/snps_udc_core.c 			writel(epsts, &ep->regs->sts);
writel           2331 drivers/usb/gadget/udc/snps_udc_core.c 		writel(epsts | AMD_BIT(UDC_EPSTS_HE), &ep->regs->sts);
writel           2365 drivers/usb/gadget/udc/snps_udc_core.c 					writel(tmp, &dev->regs->ep_irqmsk);
writel           2416 drivers/usb/gadget/udc/snps_udc_core.c 					writel(req->td_phys, &ep->regs->desptr);
writel           2428 drivers/usb/gadget/udc/snps_udc_core.c 					writel(tmp, &ep->regs->ctl);
writel           2437 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp,
writel           2442 drivers/usb/gadget/udc/snps_udc_core.c 	writel(epsts, &ep->regs->sts);
writel           2465 drivers/usb/gadget/udc/snps_udc_core.c 	writel(AMD_BIT(UDC_EPINT_OUT_EP0), &dev->regs->ep_irqsts);
writel           2471 drivers/usb/gadget/udc/snps_udc_core.c 		writel(AMD_BIT(UDC_EPSTS_BNA),
writel           2492 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
writel           2498 drivers/usb/gadget/udc/snps_udc_core.c 			writel(UDC_EPSTS_OUT_CLEAR,
writel           2527 drivers/usb/gadget/udc/snps_udc_core.c 				writel(ep->bna_dummy_req->td_phys,
writel           2578 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
writel           2585 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
writel           2594 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl);
writel           2601 drivers/usb/gadget/udc/snps_udc_core.c 			writel(UDC_EPSTS_OUT_CLEAR,
writel           2608 drivers/usb/gadget/udc/snps_udc_core.c 		writel(UDC_EPSTS_OUT_CLEAR, &dev->ep[UDC_EP0OUT_IX].regs->sts);
writel           2630 drivers/usb/gadget/udc/snps_udc_core.c 				writel(dev->ep[UDC_EP0OUT_IX].td_phys,
writel           2677 drivers/usb/gadget/udc/snps_udc_core.c 	writel(AMD_BIT(UDC_EPINT_IN_EP0), &dev->regs->ep_irqsts);
writel           2686 drivers/usb/gadget/udc/snps_udc_core.c 		writel(AMD_BIT(UDC_EPSTS_TDC),
writel           2695 drivers/usb/gadget/udc/snps_udc_core.c 			writel(AMD_BIT(UDC_EPSTS_IN),
writel           2703 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &ep->regs->ctl);
writel           2712 drivers/usb/gadget/udc/snps_udc_core.c 					writel(req->td_phys, &ep->regs->desptr);
writel           2724 drivers/usb/gadget/udc/snps_udc_core.c 					writel(tmp,
writel           2756 drivers/usb/gadget/udc/snps_udc_core.c 			writel(AMD_BIT(UDC_EPSTS_IN),
writel           2813 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &dev->csr->ne[udc_csr_epix]);
writel           2819 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &ep->regs->ctl);
writel           2872 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &dev->csr->ne[udc_csr_epix]);
writel           2878 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &ep->regs->ctl);
writel           2928 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp | AMD_BIT(UDC_DEVCFG_DMARST), &dev->regs->cfg);
writel           2929 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &dev->regs->cfg);
writel           2940 drivers/usb/gadget/udc/snps_udc_core.c 		writel(tmp, &dev->regs->irqmsk);
writel           2984 drivers/usb/gadget/udc/snps_udc_core.c 			writel(tmp, &dev->regs->irqmsk);
writel           3024 drivers/usb/gadget/udc/snps_udc_core.c 			writel(ep_irq, &dev->regs->ep_irqsts);
writel           3040 drivers/usb/gadget/udc/snps_udc_core.c 		writel(reg, &dev->regs->irqsts);
writel           3205 drivers/usb/gadget/udc/snps_udc_core.c 	writel(reg, &dev->regs->ctl);
writel             43 drivers/usb/gadget/udc/snps_udc_plat.c 	writel(reg, &udc->regs->ctl);
writel             47 drivers/usb/gadget/udc/snps_udc_plat.c 	writel(reg, &udc->regs->ctl);
writel            230 drivers/usb/host/ehci-exynos.c 	writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
writel            309 drivers/usb/host/ehci-exynos.c 	writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
writel            141 drivers/usb/host/ehci-fsl.c 		writel(PORT_PTS_UTMI, hcd->regs + FSL_SOC_USB_PORTSC1);
writel            666 drivers/usb/host/ehci-fsl.c 		writel(PORT_RESET |
writel            670 drivers/usb/host/ehci-fsl.c 		writel(PORT_RESET, &ehci->regs->port_status[port]);
writel             59 drivers/usb/host/ehci-st.c 	writel(threshold, hcd->regs + AHB2STBUS_INSREG01);
writel            768 drivers/usb/host/ehci.h 		writel(val, regs);
writel            773 drivers/usb/host/ehci.h 		writel(val, regs);
writel            661 drivers/usb/host/fotg210.h 	writel(val, regs);
writel             78 drivers/usb/host/imx21-hcd.c 	writel(readl(reg) | mask, reg);
writel             85 drivers/usb/host/imx21-hcd.c 	writel(readl(reg) & ~mask, reg);
writel             93 drivers/usb/host/imx21-hcd.c 		writel(mask, reg);
writel            101 drivers/usb/host/imx21-hcd.c 		writel(mask, reg);
writel            106 drivers/usb/host/imx21-hcd.c 	writel(value, imx21->regs + USB_ETD_DWORD(etd_num, dword));
writel            169 drivers/usb/host/imx21-hcd.c 	writel(etd_mask, imx21->regs + USBH_ETDENCLR);
writel            171 drivers/usb/host/imx21-hcd.c 	writel(etd_mask, imx21->regs + USB_ETDDMACHANLCLR);
writel            244 drivers/usb/host/imx21-hcd.c 			writel(word, dmem);
writel            251 drivers/usb/host/imx21-hcd.c 		writel(word, dmem);
writel            310 drivers/usb/host/imx21-hcd.c 		writel(etd->dma_handle, imx21->regs + USB_ETDSMSA(etd_num));
writel            336 drivers/usb/host/imx21-hcd.c 	writel(etd_mask, imx21->regs + USBH_ETDENSET);
writel           1411 drivers/usb/host/imx21-hcd.c 	writel(ints, imx21->regs + USBH_SYSISR);
writel           1646 drivers/usb/host/imx21-hcd.c 		writel(status_write, imx21->regs + USBH_PORTSTAT(wIndex - 1));
writel           1663 drivers/usb/host/imx21-hcd.c 	writel(USBOTG_RST_RSTCTRL | USBOTG_RST_RSTRH |
writel           1708 drivers/usb/host/imx21-hcd.c 	writel((USBOTG_CLK_CTRL_HST | USBOTG_CLK_CTRL_MAIN),
writel           1710 drivers/usb/host/imx21-hcd.c 	writel(hw_mode, imx21->regs + USBOTG_HWMODE);
writel           1711 drivers/usb/host/imx21-hcd.c 	writel(usb_control, imx21->regs + USBCTRL);
writel           1712 drivers/usb/host/imx21-hcd.c 	writel(USB_MISCCONTROL_SKPRTRY  | USB_MISCCONTROL_ARBMODE,
writel           1721 drivers/usb/host/imx21-hcd.c 	writel(USBH_HOST_CTRL_HCUSBSTE_OPERATIONAL | USBH_HOST_CTRL_CTLBLKSR_1,
writel           1726 drivers/usb/host/imx21-hcd.c 		writel(USBH_PORTSTAT_PRTPWRST | USBH_PORTSTAT_PRTENABST,
writel           1730 drivers/usb/host/imx21-hcd.c 		writel(USBH_PORTSTAT_PRTPWRST | USBH_PORTSTAT_PRTENABST,
writel           1734 drivers/usb/host/imx21-hcd.c 		writel(USBH_PORTSTAT_PRTPWRST | USBH_PORTSTAT_PRTENABST,
writel           1758 drivers/usb/host/imx21-hcd.c 	writel(0, imx21->regs + USBH_SYSIEN);
writel            615 drivers/usb/host/isp1362.h 	writel(val, isp1362_hcd->data_reg);
writel            112 drivers/usb/host/ohci-at91.c 	writel(0, &regs->control);
writel            126 drivers/usb/host/ohci-at91.c 	writel(0, &regs->control);
writel            184 drivers/usb/host/ohci-omap.c 	writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
writel            251 drivers/usb/host/ohci-omap.c 		writel(OHCI_CTRL_RWC, &ohci->regs->control);
writel            579 drivers/usb/host/ohci.h 		writel (val, regs);
writel            581 drivers/usb/host/ohci.h 		writel (val, regs);
writel            686 drivers/usb/host/oxu210hp-hcd.c 	writel(val, base + reg);
writel            771 drivers/usb/host/oxu210hp-hcd.c 	writel(0, &oxu->regs->intr_enable);
writel            778 drivers/usb/host/oxu210hp-hcd.c 	writel(temp, &oxu->regs->command);
writel            792 drivers/usb/host/oxu210hp-hcd.c 	writel(tmp, reg_ptr);
writel            803 drivers/usb/host/oxu210hp-hcd.c 	writel(command, &oxu->regs->command);
writel            838 drivers/usb/host/oxu210hp-hcd.c 	writel(temp, &oxu->regs->command);
writel           1932 drivers/usb/host/oxu210hp-hcd.c 			writel(cmd, &oxu->regs->command);
writel           2142 drivers/usb/host/oxu210hp-hcd.c 			writel(cmd & ~CMD_ASE, &oxu->regs->command);
writel           2171 drivers/usb/host/oxu210hp-hcd.c 	writel(cmd, &oxu->regs->command);
writel           2313 drivers/usb/host/oxu210hp-hcd.c 	writel(cmd, &oxu->regs->command);
writel           2339 drivers/usb/host/oxu210hp-hcd.c 	writel(cmd, &oxu->regs->command);
writel           2775 drivers/usb/host/oxu210hp-hcd.c 		writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
writel           2877 drivers/usb/host/oxu210hp-hcd.c 	writel(status, &oxu->regs->status);
writel           2937 drivers/usb/host/oxu210hp-hcd.c 			writel(0, &oxu->regs->configured_flag);
writel           2989 drivers/usb/host/oxu210hp-hcd.c 			writel(STS_IAA, &oxu->regs->status);
writel           3125 drivers/usb/host/oxu210hp-hcd.c 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
writel           3126 drivers/usb/host/oxu210hp-hcd.c 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
writel           3141 drivers/usb/host/oxu210hp-hcd.c 		writel(0, &oxu->regs->segment);
writel           3146 drivers/usb/host/oxu210hp-hcd.c 	writel(oxu->command, &oxu->regs->command);
writel           3156 drivers/usb/host/oxu210hp-hcd.c 	writel(FLAG_CF, &oxu->regs->configured_flag);
writel           3165 drivers/usb/host/oxu210hp-hcd.c 	writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
writel           3185 drivers/usb/host/oxu210hp-hcd.c 	writel(0, &oxu->regs->intr_enable);
writel           3189 drivers/usb/host/oxu210hp-hcd.c 	writel(0, &oxu->regs->configured_flag);
writel           3213 drivers/usb/host/oxu210hp-hcd.c 	writel(0, &oxu->regs->configured_flag);
writel           3606 drivers/usb/host/oxu210hp-hcd.c 			writel(temp & ~PORT_PE, status_reg);
writel           3609 drivers/usb/host/oxu210hp-hcd.c 			writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
writel           3619 drivers/usb/host/oxu210hp-hcd.c 				writel(temp | PORT_RESUME, status_reg);
writel           3629 drivers/usb/host/oxu210hp-hcd.c 				writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
writel           3633 drivers/usb/host/oxu210hp-hcd.c 			writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
writel           3636 drivers/usb/host/oxu210hp-hcd.c 			writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
writel           3690 drivers/usb/host/oxu210hp-hcd.c 				writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
writel           3712 drivers/usb/host/oxu210hp-hcd.c 			writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
writel           3735 drivers/usb/host/oxu210hp-hcd.c 			writel(temp, status_reg);
writel           3796 drivers/usb/host/oxu210hp-hcd.c 			writel(temp | PORT_SUSPEND, status_reg);
writel           3800 drivers/usb/host/oxu210hp-hcd.c 				writel(temp | PORT_POWER, status_reg);
writel           3819 drivers/usb/host/oxu210hp-hcd.c 			writel(temp, status_reg);
writel           3834 drivers/usb/host/oxu210hp-hcd.c 			writel(temp, status_reg);
writel           3905 drivers/usb/host/oxu210hp-hcd.c 			writel(t2, reg);
writel           3918 drivers/usb/host/oxu210hp-hcd.c 	writel(mask, &oxu->regs->intr_enable);
writel           3949 drivers/usb/host/oxu210hp-hcd.c 	writel(0, &oxu->regs->intr_enable);
writel           3952 drivers/usb/host/oxu210hp-hcd.c 	writel(0, &oxu->regs->segment);
writel           3953 drivers/usb/host/oxu210hp-hcd.c 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
writel           3954 drivers/usb/host/oxu210hp-hcd.c 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
writel           3957 drivers/usb/host/oxu210hp-hcd.c 	writel(oxu->command, &oxu->regs->command);
writel           3973 drivers/usb/host/oxu210hp-hcd.c 		writel(temp, &oxu->regs->port_status[i]);
writel           3981 drivers/usb/host/oxu210hp-hcd.c 			writel(temp, &oxu->regs->port_status[i]);
writel           3995 drivers/usb/host/oxu210hp-hcd.c 		writel(oxu->command, &oxu->regs->command);
writel           4002 drivers/usb/host/oxu210hp-hcd.c 	writel(INTR_MASK, &oxu->regs->intr_enable);
writel            778 drivers/usb/host/pci-quirks.c 		writel(OHCI_INTR_OC, base + OHCI_INTRENABLE);
writel            779 drivers/usb/host/pci-quirks.c 		writel(OHCI_OCR, base + OHCI_CMDSTATUS);
writel            793 drivers/usb/host/pci-quirks.c 	writel((u32) ~0, base + OHCI_INTRDISABLE);
writel            796 drivers/usb/host/pci-quirks.c 	writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
writel            803 drivers/usb/host/pci-quirks.c 	writel(OHCI_HCR, base + OHCI_CMDSTATUS);
writel            813 drivers/usb/host/pci-quirks.c 		writel(fminterval, base + OHCI_FMINTERVAL);
writel            923 drivers/usb/host/pci-quirks.c 		writel(0, op_reg_base + EHCI_CONFIGFLAG);
writel            975 drivers/usb/host/pci-quirks.c 		writel(val, op_reg_base + EHCI_USBCMD);
writel            979 drivers/usb/host/pci-quirks.c 			writel(0x3f, op_reg_base + EHCI_USBSTS);
writel            988 drivers/usb/host/pci-quirks.c 	writel(0, op_reg_base + EHCI_USBINTR);
writel            989 drivers/usb/host/pci-quirks.c 	writel(0x3f, op_reg_base + EHCI_USBSTS);
writel           1178 drivers/usb/host/pci-quirks.c 		writel(val, base + ext_cap_offset);
writel           1183 drivers/usb/host/pci-quirks.c 		writel(val | XHCI_HC_OS_OWNED, base + ext_cap_offset);
writel           1194 drivers/usb/host/pci-quirks.c 			writel(val & ~XHCI_HC_BIOS_OWNED, base + ext_cap_offset);
writel           1204 drivers/usb/host/pci-quirks.c 	writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
writel           1228 drivers/usb/host/pci-quirks.c 	writel(val, op_reg_base + XHCI_CMD_OFFSET);
writel            610 drivers/usb/host/uhci-hcd.h 		writel(val, uhci->regs + uhci_aspeed_reg(reg));
writel            616 drivers/usb/host/uhci-hcd.h 		writel(val, uhci->regs + reg);
writel            638 drivers/usb/host/uhci-hcd.h 		writel(val, uhci->regs + uhci_aspeed_reg(reg));
writel            666 drivers/usb/host/uhci-hcd.h 		writel(val, uhci->regs + uhci_aspeed_reg(reg));
writel            127 drivers/usb/host/xhci-dbgcap.c 	writel(dev_info, &dbc->regs->devinfo1);
writel            130 drivers/usb/host/xhci-dbgcap.c 	writel(dev_info, &dbc->regs->devinfo2);
writel            283 drivers/usb/host/xhci-dbgcap.c 	writel(DBC_DOOR_BELL_TARGET(dep->direction), &dbc->regs->doorbell);
writel            413 drivers/usb/host/xhci-dbgcap.c 	writel(dbc->erst.erst_size, &dbc->regs->ersts);
writel            483 drivers/usb/host/xhci-dbgcap.c 	writel(0, &dbc->regs->control);
writel            495 drivers/usb/host/xhci-dbgcap.c 	writel(ctrl | DBC_CTRL_DBC_ENABLE | DBC_CTRL_PORT_ENABLE,
writel            515 drivers/usb/host/xhci-dbgcap.c 	writel(0, &dbc->regs->control);
writel            587 drivers/usb/host/xhci-dbgcap.c 	writel(portsc & ~DBC_PORTSC_RESET_CHANGE, &dbc->regs->portsc);
writel            676 drivers/usb/host/xhci-dbgcap.c 			writel(portsc, &dbc->regs->portsc);
writel            696 drivers/usb/host/xhci-dbgcap.c 			writel(portsc, &dbc->regs->portsc);
writel            725 drivers/usb/host/xhci-dbgcap.c 			writel(ctrl, &dbc->regs->control);
writel            382 drivers/usb/host/xhci-debugfs.c 		writel(portsc, port->addr);
writel             60 drivers/usb/host/xhci-histb.c 		writel(regval, histb->ctrl + REG_GUSB2PHYCFG0);
writel             75 drivers/usb/host/xhci-histb.c 		writel(regval, histb->ctrl + REG_GUSB3PIPECTL0);
writel             78 drivers/usb/host/xhci-histb.c 	writel(0x23100000, histb->ctrl + GTXTHRCFG);
writel             79 drivers/usb/host/xhci-histb.c 	writel(0x23100000, histb->ctrl + GRXTHRCFG);
writel            497 drivers/usb/host/xhci-hub.c 	writel(port_status | PORT_PE, addr);
writel            547 drivers/usb/host/xhci-hub.c 	writel(port_status | status, addr);
writel            586 drivers/usb/host/xhci-hub.c 		writel(temp | PORT_POWER, port->addr);
writel            590 drivers/usb/host/xhci-hub.c 		writel(temp & ~PORT_POWER, port->addr);
writel            612 drivers/usb/host/xhci-hub.c 	writel(temp, port->addr + PORTPMSC);
writel            688 drivers/usb/host/xhci-hub.c 	writel(temp, port->addr);
writel            718 drivers/usb/host/xhci-hub.c 	writel(temp, port->addr);
writel            731 drivers/usb/host/xhci-hub.c 		writel(temp, port->addr);
writel           1251 drivers/usb/host/xhci-hub.c 				writel(temp | PORT_PE, ports[wIndex]->addr);
writel           1384 drivers/usb/host/xhci-hub.c 			writel(temp, ports[wIndex]->addr);
writel           1399 drivers/usb/host/xhci-hub.c 			writel(temp, ports[wIndex]->addr);
writel           1408 drivers/usb/host/xhci-hub.c 			writel(temp, ports[wIndex]->addr + PORTPMSC);
writel           1416 drivers/usb/host/xhci-hub.c 			writel(temp, ports[wIndex]->addr + PORTPMSC);
writel           1702 drivers/usb/host/xhci-hub.c 		writel(portsc_buf[port_index], ports[port_index]->addr);
writel           1732 drivers/usb/host/xhci-hub.c 	writel(portsc, port->addr);
writel           1768 drivers/usb/host/xhci-hub.c 	writel(temp, &xhci->op_regs->command);
writel           1807 drivers/usb/host/xhci-hub.c 		writel(portsc, ports[port_index]->addr);
writel           1846 drivers/usb/host/xhci-hub.c 	writel(temp, &xhci->op_regs->command);
writel           2417 drivers/usb/host/xhci-mem.c 	writel(val, &xhci->op_regs->config_reg);
writel           2525 drivers/usb/host/xhci-mem.c 	writel(val, &xhci->ir_set->erst_size);
writel           2570 drivers/usb/host/xhci-mem.c 	writel(temp, &xhci->op_regs->dev_notification);
writel             90 drivers/usb/host/xhci-mtk.c 	writel(value, &ippc->ip_pw_ctr1);
writel            102 drivers/usb/host/xhci-mtk.c 		writel(value, &ippc->u3_ctrl_p[i]);
writel            110 drivers/usb/host/xhci-mtk.c 		writel(value, &ippc->u2_ctrl_p[i]);
writel            150 drivers/usb/host/xhci-mtk.c 		writel(value, &ippc->u3_ctrl_p[i]);
writel            157 drivers/usb/host/xhci-mtk.c 		writel(value, &ippc->u2_ctrl_p[i]);
writel            163 drivers/usb/host/xhci-mtk.c 	writel(value, &ippc->ip_pw_ctr1);
writel            186 drivers/usb/host/xhci-mtk.c 	writel(value, &ippc->ip_pw_ctr0);
writel            190 drivers/usb/host/xhci-mtk.c 	writel(value, &ippc->ip_pw_ctr0);
writel            198 drivers/usb/host/xhci-mtk.c 	writel(value, &ippc->ip_pw_ctr2);
writel             29 drivers/usb/host/xhci-mvebu.c 		writel(0, base + USB3_WIN_CTRL(win));
writel             30 drivers/usb/host/xhci-mvebu.c 		writel(0, base + USB3_WIN_BASE(win));
writel             37 drivers/usb/host/xhci-mvebu.c 		writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
writel             41 drivers/usb/host/xhci-mvebu.c 		writel((cs->base & 0xffff0000), base + USB3_WIN_BASE(win));
writel            430 drivers/usb/host/xhci-pci.c 		writel(val, reg);
writel            438 drivers/usb/host/xhci-pci.c 		writel(val, reg);
writel            442 drivers/usb/host/xhci-pci.c 		writel(val, reg);
writel            459 drivers/usb/host/xhci-pci.c 	writel(val | BIT(28), reg);
writel             90 drivers/usb/host/xhci-rcar.c 	writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
writel             92 drivers/usb/host/xhci-rcar.c 	writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
writel             93 drivers/usb/host/xhci-rcar.c 	writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
writel             94 drivers/usb/host/xhci-rcar.c 	writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
writel             96 drivers/usb/host/xhci-rcar.c 	writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
writel             97 drivers/usb/host/xhci-rcar.c 	writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
writel            118 drivers/usb/host/xhci-rcar.c 		writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
writel            156 drivers/usb/host/xhci-rcar.c 	writel(temp, regs + RCAR_USB3_DL_CTRL);
writel            164 drivers/usb/host/xhci-rcar.c 		writel(data, regs + RCAR_USB3_FW_DATA0);
writel            167 drivers/usb/host/xhci-rcar.c 		writel(temp, regs + RCAR_USB3_DL_CTRL);
writel            183 drivers/usb/host/xhci-rcar.c 	writel(temp, regs + RCAR_USB3_DL_CTRL);
writel            283 drivers/usb/host/xhci-ring.c 	writel(DB_VALUE_HOST, &xhci->dba->doorbell[0]);
writel            404 drivers/usb/host/xhci-ring.c 	writel(DB_VALUE(ep_index, stream_id), db_addr);
writel           1573 drivers/usb/host/xhci-ring.c 		writel(0x6F, hcd->regs + 0x1048);
writel           1576 drivers/usb/host/xhci-ring.c 		writel(0x7F, hcd->regs + 0x1048);
writel           2854 drivers/usb/host/xhci-ring.c 	writel(status, &xhci->op_regs->status);
writel           2860 drivers/usb/host/xhci-ring.c 		writel(irq_pending, &xhci->ir_set->irq_pending);
writel            225 drivers/usb/host/xhci-tegra.c 	writel(value, tegra->fpci_base + offset);
writel            236 drivers/usb/host/xhci-tegra.c 	writel(value, tegra->ipfs_base + offset);
writel            100 drivers/usb/host/xhci.c 	writel(cmd, &xhci->op_regs->command);
writel            140 drivers/usb/host/xhci.c 	writel(temp, &xhci->op_regs->command);
writel            187 drivers/usb/host/xhci.c 	writel(command, &xhci->op_regs->command);
writel            254 drivers/usb/host/xhci.c 	writel(val, &xhci->op_regs->command);
writel            259 drivers/usb/host/xhci.c 	writel(val, &xhci->op_regs->status);
writel            665 drivers/usb/host/xhci.c 	writel(temp, &xhci->ir_set->irq_control);
writel            672 drivers/usb/host/xhci.c 	writel(temp, &xhci->op_regs->command);
writel            678 drivers/usb/host/xhci.c 	writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
writel            751 drivers/usb/host/xhci.c 	writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
writel            753 drivers/usb/host/xhci.c 	writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
writel            811 drivers/usb/host/xhci.c 	writel(xhci->s3.command, &xhci->op_regs->command);
writel            812 drivers/usb/host/xhci.c 	writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
writel            814 drivers/usb/host/xhci.c 	writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
writel            815 drivers/usb/host/xhci.c 	writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
writel            818 drivers/usb/host/xhci.c 	writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
writel            819 drivers/usb/host/xhci.c 	writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
writel            904 drivers/usb/host/xhci.c 			writel(t2, ports[port_index]->addr);
writel            920 drivers/usb/host/xhci.c 			writel(t2, ports[port_index]->addr);
writel           1010 drivers/usb/host/xhci.c 	writel(command, &xhci->op_regs->command);
writel           1029 drivers/usb/host/xhci.c 	writel(command, &xhci->op_regs->command);
writel           1128 drivers/usb/host/xhci.c 		writel(command, &xhci->op_regs->command);
writel           1168 drivers/usb/host/xhci.c 		writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
writel           1170 drivers/usb/host/xhci.c 		writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
writel           1207 drivers/usb/host/xhci.c 	writel(command, &xhci->op_regs->command);
writel           4449 drivers/usb/host/xhci.c 			writel(hlpm_val, hlpm_addr);
writel           4458 drivers/usb/host/xhci.c 		writel(pm_val, pm_addr);
writel           4461 drivers/usb/host/xhci.c 		writel(pm_val, pm_addr);
writel           4466 drivers/usb/host/xhci.c 		writel(pm_val, pm_addr);
writel             62 drivers/usb/isp1760/isp1760-core.h 	writel(val, base + reg);
writel             78 drivers/usb/isp1760/isp1760-if.c 		writel(0xface, iobase + HC_SCRATCH_REG);
writel            115 drivers/usb/isp1760/isp1760-if.c 	writel(reg_data, iobase + PLX_INT_CSR_REG);
writel            398 drivers/usb/mtu3/mtu3.h 	writel(data, base + offset);
writel            411 drivers/usb/mtu3/mtu3.h 	writel((tmp | (bits)), addr);
writel            419 drivers/usb/mtu3/mtu3.h 	writel((tmp & ~(bits)), addr);
writel             59 drivers/usb/phy/phy-am335x-control.c 	writel(val, usb_ctrl->wkup);
writel             98 drivers/usb/phy/phy-am335x-control.c 	writel(val, usb_ctrl->phy_reg + reg);
writel            101 drivers/usb/phy/phy-fsl-usb.c #define fsl_writel(val, addr)	writel(val, addr)
writel             41 drivers/usb/phy/phy-keystone.c 	writel(value, base + offset);
writel            144 drivers/usb/phy/phy-mv-usb.c 	writel(tmp, &mvotg->op_regs->usbcmd);
writel            147 drivers/usb/phy/phy-mv-usb.c 	writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
writel            160 drivers/usb/phy/phy-mv-usb.c 	writel(0x0, &mvotg->op_regs->usbintr);
writel            162 drivers/usb/phy/phy-mv-usb.c 	writel(tmp, &mvotg->op_regs->usbsts);
writel            190 drivers/usb/phy/phy-mv-usb.c 	writel(otgsc, &mvotg->op_regs->otgsc);
writel            485 drivers/usb/phy/phy-mv-usb.c 	writel(otgsc, &mvotg->op_regs->otgsc);
writel            864 drivers/usb/phy/phy-mv-usb.c 		writel(otgsc, &mvotg->op_regs->otgsc);
writel            243 drivers/usb/phy/phy-mxs-usb.c 		writel(phytx, base + HW_USBPHY_TX);
writel            254 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_REG_ENABLE, base + HW_USBPHY_PLL_SIC_SET);
writel            255 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_BYPASS, base + HW_USBPHY_PLL_SIC_CLR);
writel            256 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_POWER, base + HW_USBPHY_PLL_SIC_SET);
writel            263 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_EN_USB_CLKS, base +
writel            266 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_EN_USB_CLKS, base +
writel            268 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_POWER, base + HW_USBPHY_PLL_SIC_CLR);
writel            269 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_BYPASS, base + HW_USBPHY_PLL_SIC_SET);
writel            270 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_PLL_REG_ENABLE, base + HW_USBPHY_PLL_SIC_CLR);
writel            292 drivers/usb/phy/phy-mxs-usb.c 	writel(0, base + HW_USBPHY_PWD);
writel            299 drivers/usb/phy/phy-mxs-usb.c 	writel(BM_USBPHY_CTRL_ENAUTOSET_USBCLKS |
writel            309 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
writel            447 drivers/usb/phy/phy-mxs-usb.c 	writel(value, phy->io_priv + HW_USBPHY_CTRL_CLR);
writel            448 drivers/usb/phy/phy-mxs-usb.c 	writel(0xffffffff, phy->io_priv + HW_USBPHY_PWD);
writel            450 drivers/usb/phy/phy-mxs-usb.c 	writel(BM_USBPHY_CTRL_CLKGATE,
writel            505 drivers/usb/phy/phy-mxs-usb.c 			writel(0xffbfffff, x->io_priv + HW_USBPHY_PWD);
writel            507 drivers/usb/phy/phy-mxs-usb.c 			writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
writel            509 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_CTRL_CLKGATE,
writel            517 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_CTRL_CLKGATE,
writel            519 drivers/usb/phy/phy-mxs-usb.c 		writel(0, x->io_priv + HW_USBPHY_PWD);
writel            549 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
writel            564 drivers/usb/phy/phy-mxs-usb.c 		writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
writel             47 drivers/usb/phy/phy-omap-otg.c 	writel(l, otg_dev->base + OMAP_OTG_CTRL);
writel            206 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + TEGRA_USB_HOSTPC1_DEVLC);
writel            211 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + TEGRA_USB_PORTSC1);
writel            226 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + TEGRA_USB_HOSTPC1_DEVLC);
writel            233 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + TEGRA_USB_PORTSC1);
writel            341 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + UTMIP_BIAS_CFG0);
writel            366 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + UTMIP_BIAS_CFG0);
writel            400 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            406 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            432 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            438 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            456 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + USB_SUSP_CTRL);
writel            461 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB1_LEGACY_CTRL);
writel            466 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_TX_CFG0);
writel            472 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_HSRX_CFG0);
writel            477 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_HSRX_CFG1);
writel            482 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_DEBOUNCE_CFG0);
writel            486 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_MISC_CFG0);
writel            494 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + UTMIP_MISC_CFG1);
writel            501 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + UTMIP_PLL_CFG1);
writel            507 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            511 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + UTMIP_BAT_CHRG_CFG0);
writel            515 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + UTMIP_BAT_CHRG_CFG0);
writel            538 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_XCVR_CFG0);
writel            544 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_XCVR_CFG1);
writel            549 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_BIAS_CFG1);
writel            556 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_SPARE_CFG0);
writel            561 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            566 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + USB_SUSP_CTRL);
writel            572 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB1_LEGACY_CTRL);
writel            576 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            588 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_USBMODE);
writel            608 drivers/usb/phy/phy-tegra-usb.c 		writel(val, base + USB_SUSP_CTRL);
writel            613 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + USB_SUSP_CTRL);
writel            617 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_BAT_CHRG_CFG0);
writel            622 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_XCVR_CFG0);
writel            627 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_XCVR_CFG1);
writel            639 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_TX_CFG0);
writel            649 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_TX_CFG0);
writel            664 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_MISC_CFG0);
writel            669 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_MISC_CFG0);
writel            680 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + UTMIP_MISC_CFG0);
writel            709 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + USB_SUSP_CTRL);
writel            713 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + ULPI_TIMING_CTRL_0);
writel            717 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + USB_SUSP_CTRL);
writel            720 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + ULPI_TIMING_CTRL_1);
writel            725 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + ULPI_TIMING_CTRL_1);
writel            731 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + ULPI_TIMING_CTRL_1);
writel            748 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + USB_SUSP_CTRL);
writel            753 drivers/usb/phy/phy-tegra-usb.c 	writel(val, base + USB_SUSP_CTRL);
writel             40 drivers/usb/phy/phy-ulpi-viewport.c 	writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view);
writel             45 drivers/usb/phy/phy-ulpi-viewport.c 	writel(ULPI_VIEW_RUN | ULPI_VIEW_READ | ULPI_VIEW_ADDR(reg), view);
writel             58 drivers/usb/phy/phy-ulpi-viewport.c 	writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view);
writel             63 drivers/usb/phy/phy-ulpi-viewport.c 	writel(ULPI_VIEW_RUN | ULPI_VIEW_WRITE | ULPI_VIEW_DATA_WRITE(val) |
writel            104 drivers/usb/roles/intel-xhci-usb-role-switch.c 	writel(val, data->base + DUAL_ROLE_CFG0);
writel             42 drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c 	writel(value, ioaddr + XGMAC_DMA_CONTROL);
writel             46 drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c 	writel(value, ioaddr + XGMAC_CONTROL);
writel             61 drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c 	writel(0, reg->ioaddr + XGMAC_DMA_INTR_ENA);
writel             30 drivers/video/backlight/ep93xx_bl.c 	writel((brightness << 8) | EP93XX_MAX_COUNT, ep93xxbl->mmio);
writel             59 drivers/video/fbdev/amba-clcd.c 	writel(ustart, fb->regs + CLCD_UBAS);
writel             60 drivers/video/fbdev/amba-clcd.c 	writel(lstart, fb->regs + CLCD_LBAS);
writel             78 drivers/video/fbdev/amba-clcd.c 		writel(val, fb->regs + fb->off_cntl);
writel             84 drivers/video/fbdev/amba-clcd.c 		writel(val, fb->regs + fb->off_cntl);
writel            110 drivers/video/fbdev/amba-clcd.c 	writel(cntl, fb->regs + fb->off_cntl);
writel            118 drivers/video/fbdev/amba-clcd.c 	writel(cntl, fb->regs + fb->off_cntl);
writel            309 drivers/video/fbdev/amba-clcd.c 	writel(regs.tim0, fb->regs + CLCD_TIM0);
writel            310 drivers/video/fbdev/amba-clcd.c 	writel(regs.tim1, fb->regs + CLCD_TIM1);
writel            311 drivers/video/fbdev/amba-clcd.c 	writel(regs.tim2, fb->regs + CLCD_TIM2);
writel            312 drivers/video/fbdev/amba-clcd.c 	writel(regs.tim3, fb->regs + CLCD_TIM3);
writel            382 drivers/video/fbdev/amba-clcd.c 		writel(val | newval, fb->regs + hw_reg);
writel            531 drivers/video/fbdev/amba-clcd.c 	writel(0, fb->regs + fb->off_ienb);
writel            540 drivers/video/fbdev/aty/aty128fb.c 	writel (val, par->regbase + regindex);
writel            248 drivers/video/fbdev/aty/atyfb.h 	writel(val, par->ati_regbase + regindex);
writel            261 drivers/video/fbdev/aty/atyfb.h 	writel(val, par->ati_regbase + regindex);
writel            381 drivers/video/fbdev/aty/radeonfb.h #define OUTREG(addr,val)	writel(val, (rinfo->mmio_base)+addr)
writel            142 drivers/video/fbdev/carminefb.c 	writel(val, par->display_reg + offset);
writel            154 drivers/video/fbdev/carminefb.c 	writel(val, hw->v_regs + offset);
writel             62 drivers/video/fbdev/clps711x-fb.c 	writel((readl(cfb->base + regno) & ~mask) | level, cfb->base + regno);
writel            143 drivers/video/fbdev/clps711x-fb.c 	writel(lcdcon, cfb->base + CLPS711X_LCDCON);
writel             56 drivers/video/fbdev/cobalt_lcdfb.c 	writel((u32)control << 24, info->screen_base);
writel             66 drivers/video/fbdev/cobalt_lcdfb.c 	writel((u32)data << 24, info->screen_base + LCD_DATA_REG_OFFSET);
writel            110 drivers/video/fbdev/cyber2000fb.c #define cyber2000fb_writel(val, reg, cfb)	writel(val, (cfb)->regs + (reg))
writel            161 drivers/video/fbdev/fb-puv3.c 	writel(((u32 *)(info->pseudo_palette))[fg_color], UGE_FCOLOR);
writel            162 drivers/video/fbdev/fb-puv3.c 	writel(0, UGE_BCOLOR);
writel            163 drivers/video/fbdev/fb-puv3.c 	writel(src_pitch, UGE_PITCH);
writel            164 drivers/video/fbdev/fb-puv3.c 	writel(src_offset, UGE_SRCSTART);
writel            165 drivers/video/fbdev/fb-puv3.c 	writel(dst_offset, UGE_DSTSTART);
writel            166 drivers/video/fbdev/fb-puv3.c 	writel(awidth, UGE_WIDHEIGHT);
writel            167 drivers/video/fbdev/fb-puv3.c 	writel(top, UGE_CLIP0);
writel            168 drivers/video/fbdev/fb-puv3.c 	writel(bottom, UGE_CLIP1);
writel            169 drivers/video/fbdev/fb-puv3.c 	writel(alpha_r, UGE_ROPALPHA);
writel            170 drivers/video/fbdev/fb-puv3.c 	writel(src_x0, UGE_SRCXY);
writel            171 drivers/video/fbdev/fb-puv3.c 	writel(dst_x0, UGE_DSTXY);
writel            172 drivers/video/fbdev/fb-puv3.c 	writel(command, UGE_COMMAND);
writel            268 drivers/video/fbdev/fb-puv3.c 	writel(src_pitch, UGE_PITCH);
writel            269 drivers/video/fbdev/fb-puv3.c 	writel(src_offset, UGE_SRCSTART);
writel            270 drivers/video/fbdev/fb-puv3.c 	writel(dst_offset, UGE_DSTSTART);
writel            271 drivers/video/fbdev/fb-puv3.c 	writel(awidth, UGE_WIDHEIGHT);
writel            272 drivers/video/fbdev/fb-puv3.c 	writel(top, UGE_CLIP0);
writel            273 drivers/video/fbdev/fb-puv3.c 	writel(bottom, UGE_CLIP1);
writel            274 drivers/video/fbdev/fb-puv3.c 	writel(bg_color, UGE_BCOLOR);
writel            275 drivers/video/fbdev/fb-puv3.c 	writel(fg_color, UGE_FCOLOR);
writel            276 drivers/video/fbdev/fb-puv3.c 	writel(alpha_r, UGE_ROPALPHA);
writel            277 drivers/video/fbdev/fb-puv3.c 	writel(src_x0, UGE_SRCXY);
writel            278 drivers/video/fbdev/fb-puv3.c 	writel(dst_x0, UGE_DSTXY);
writel            279 drivers/video/fbdev/fb-puv3.c 	writel(command, UGE_COMMAND);
writel            532 drivers/video/fbdev/fb-puv3.c 	writel(info->fix.smem_start, UDE_FSA);
writel            533 drivers/video/fbdev/fb-puv3.c 	writel(info->var.yres, UDE_LS);
writel            534 drivers/video/fbdev/fb-puv3.c 	writel(get_line_length(info->var.xres,
writel            537 drivers/video/fbdev/fb-puv3.c 	writel((hTotal << 16) | (info->var.xres), UDE_HAT);
writel            538 drivers/video/fbdev/fb-puv3.c 	writel(((hTotal - 1) << 16) | (info->var.xres - 1), UDE_HBT);
writel            539 drivers/video/fbdev/fb-puv3.c 	writel(((hSyncEnd - 1) << 16) | (hSyncStart - 1), UDE_HST);
writel            540 drivers/video/fbdev/fb-puv3.c 	writel((vTotal << 16) | (info->var.yres), UDE_VAT);
writel            541 drivers/video/fbdev/fb-puv3.c 	writel(((vTotal - 1) << 16) | (info->var.yres - 1), UDE_VBT);
writel            542 drivers/video/fbdev/fb-puv3.c 	writel(((vSyncEnd - 1) << 16) | (vSyncStart - 1), UDE_VST);
writel            543 drivers/video/fbdev/fb-puv3.c 	writel(UDE_CFG_GDEN_ENABLE | UDE_CFG_TIMEUP_ENABLE
writel            750 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[0], UDE_FSA);
writel            751 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[1], UDE_LS);
writel            752 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[2], UDE_PS);
writel            753 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[3], UDE_HAT);
writel            754 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[4], UDE_HBT);
writel            755 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[5], UDE_HST);
writel            756 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[6], UDE_VAT);
writel            757 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[7], UDE_VBT);
writel            758 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[8], UDE_VST);
writel            759 drivers/video/fbdev/fb-puv3.c 		writel(unifb_regs[9], UDE_CFG);
writel             86 drivers/video/fbdev/geode/display_gx1.c 	writel(DC_UNLOCK_CODE, par->dc_regs + DC_UNLOCK);
writel             93 drivers/video/fbdev/geode/display_gx1.c 	writel(tcfg, par->dc_regs + DC_TIMING_CFG);
writel            100 drivers/video/fbdev/geode/display_gx1.c 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
writel            104 drivers/video/fbdev/geode/display_gx1.c 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
writel            110 drivers/video/fbdev/geode/display_gx1.c 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
writel            131 drivers/video/fbdev/geode/display_gx1.c 	writel(0, par->dc_regs + DC_FB_ST_OFFSET);
writel            134 drivers/video/fbdev/geode/display_gx1.c 	writel(info->fix.line_length >> 2, par->dc_regs + DC_LINE_DELTA);
writel            135 drivers/video/fbdev/geode/display_gx1.c 	writel(((info->var.xres * info->var.bits_per_pixel/8) >> 3) + 2,
writel            162 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_H_TIMING_1);
writel            164 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_H_TIMING_2);
writel            166 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_H_TIMING_3);
writel            167 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_FP_H_TIMING);
writel            169 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_V_TIMING_1);
writel            171 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_V_TIMING_2);
writel            173 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_V_TIMING_3);
writel            175 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_FP_V_TIMING);
writel            178 drivers/video/fbdev/geode/display_gx1.c 	writel(ocfg, par->dc_regs + DC_OUTPUT_CFG);
writel            179 drivers/video/fbdev/geode/display_gx1.c 	writel(tcfg, par->dc_regs + DC_TIMING_CFG);
writel            181 drivers/video/fbdev/geode/display_gx1.c 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
writel            186 drivers/video/fbdev/geode/display_gx1.c 	writel(0, par->dc_regs + DC_UNLOCK);
writel            203 drivers/video/fbdev/geode/display_gx1.c 	writel(regno, par->dc_regs + DC_PAL_ADDRESS);
writel            204 drivers/video/fbdev/geode/display_gx1.c 	writel(val, par->dc_regs + DC_PAL_DATA);
writel            305 drivers/video/fbdev/geode/gxfb.h 	writel(val, par->gp_regs + 4*reg);
writel            315 drivers/video/fbdev/geode/gxfb.h 	writel(val, par->dc_regs + 4*reg);
writel            325 drivers/video/fbdev/geode/gxfb.h 	writel(val, par->vid_regs + 8*reg);
writel            335 drivers/video/fbdev/geode/gxfb.h 	writel(val, par->vid_regs + 8*reg + VP_FP_START);
writel            388 drivers/video/fbdev/geode/lxfb.h 	writel(val, par->gp_regs + 4*reg);
writel            398 drivers/video/fbdev/geode/lxfb.h 	writel(val, par->dc_regs + 4*reg);
writel            408 drivers/video/fbdev/geode/lxfb.h 	writel(val, par->vp_regs + 8*reg);
writel            418 drivers/video/fbdev/geode/lxfb.h 	writel(val, par->vp_regs + 8*reg + VP_FP_START);
writel             88 drivers/video/fbdev/geode/video_cs5530.c 	writel(value, par->vid_regs + CS5530_DOT_CLK_CONFIG);
writel             89 drivers/video/fbdev/geode/video_cs5530.c 	writel(value | 0x80000100, par->vid_regs + CS5530_DOT_CLK_CONFIG); /* set reset and bypass */
writel             91 drivers/video/fbdev/geode/video_cs5530.c 	writel(value & 0x7FFFFFFF, par->vid_regs + CS5530_DOT_CLK_CONFIG); /* clear reset */
writel             92 drivers/video/fbdev/geode/video_cs5530.c 	writel(value & 0x7FFFFEFF, par->vid_regs + CS5530_DOT_CLK_CONFIG); /* clear bypass */
writel            130 drivers/video/fbdev/geode/video_cs5530.c 	writel(dcfg, par->vid_regs + CS5530_DISPLAY_CONFIG);
writel            180 drivers/video/fbdev/geode/video_cs5530.c 	writel(dcfg, par->vid_regs + CS5530_DISPLAY_CONFIG);
writel            123 drivers/video/fbdev/goldfishfb.c 		writel(fb->rotation, fb->reg_base + FB_SET_ROTATION);
writel            138 drivers/video/fbdev/goldfishfb.c 	writel(fb->fb.fix.smem_start + fb->fb.var.xres * 2 * var->yoffset,
writel            154 drivers/video/fbdev/goldfishfb.c 		writel(1, fb->reg_base + FB_SET_BLANK);
writel            157 drivers/video/fbdev/goldfishfb.c 		writel(0, fb->reg_base + FB_SET_BLANK);
writel            262 drivers/video/fbdev/goldfishfb.c 	writel(FB_INT_BASE_UPDATE_DONE, fb->reg_base + FB_INT_ENABLE);
writel            142 drivers/video/fbdev/gxt4500.c #define writereg(par, reg, val)	writel((val), (par)->regs + (reg))
writel            827 drivers/video/fbdev/i740fb.c 	writel(itemp, par->regs + FWATER_BLC);
writel            296 drivers/video/fbdev/i810/i810.h #define i810_writel(where, mmio, val) writel(val, mmio + where)
writel            418 drivers/video/fbdev/imsttfb.c 	writel(val, base + regindex);
writel            270 drivers/video/fbdev/imxfb.c 		writel(val, fbi->regs + 0x800 + (regno << 2));
writel            494 drivers/video/fbdev/imxfb.c 	writel(fbi->map_dma, fbi->regs + LCDC_SSA);
writel            497 drivers/video/fbdev/imxfb.c 	writel(0x00000000, fbi->regs + LCDC_POS);
writel            500 drivers/video/fbdev/imxfb.c 	writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
writel            507 drivers/video/fbdev/imxfb.c 	writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
writel            529 drivers/video/fbdev/imxfb.c 	writel(0, fbi->regs + LCDC_RMCR);
writel            546 drivers/video/fbdev/imxfb.c 	writel(0, fbi->regs + LCDC_RMCR);
writel            625 drivers/video/fbdev/imxfb.c 	writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
writel            628 drivers/video/fbdev/imxfb.c 	writel(HCR_H_WIDTH(var->hsync_len - 1) |
writel            633 drivers/video/fbdev/imxfb.c 	writel(VCR_V_WIDTH(var->vsync_len) |
writel            638 drivers/video/fbdev/imxfb.c 	writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
writel            641 drivers/video/fbdev/imxfb.c 	writel(fbi->pcr, fbi->regs + LCDC_PCR);
writel            643 drivers/video/fbdev/imxfb.c 		writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
writel            644 drivers/video/fbdev/imxfb.c 	writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
writel            648 drivers/video/fbdev/imxfb.c 		writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
writel            651 drivers/video/fbdev/imxfb.c 		writel(fbi->lauscr, fbi->regs + LCDC_LAUSCR);
writel            787 drivers/video/fbdev/imxfb.c 		writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
writel            530 drivers/video/fbdev/intelfb/intelfbhw.h #define OUTREG(addr, val)     writel((val),(u32 __iomem *)(dinfo->mmio_base + \
writel            535 drivers/video/fbdev/intelfb/intelfbhw.h 	writel((n), (u32 __iomem *)(dinfo->ring.virtual + dinfo->ring_tail));\
writel             24 drivers/video/fbdev/kyro/STG4000Reg.h #define STG_WRITE_REG(reg,data) (writel(data,&pSTGReg->reg))
writel            145 drivers/video/fbdev/matrox/matroxfb_base.h 	writel(value, va.vaddr + offs);
writel            109 drivers/video/fbdev/mb862xx/mb862xxfb.h #define gdc_write	writel
writel            857 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c 		writel(1, par->fb_base + MB862XX_MMIO_BASE + GC_RSW);
writel             38 drivers/video/fbdev/mbx/mbxfb.c #define write_reg(val, reg) do { writel((val), (reg)); } while(0)
writel             44 drivers/video/fbdev/mbx/mbxfb.c #define write_reg_dly(val, reg) do { writel((val), reg); udelay(1000); } while(0)
writel            653 drivers/video/fbdev/mbx/mbxfb.c 			writel(tmp, virt_base_2700 + reg.addr);
writel            815 drivers/video/fbdev/mbx/mbxfb.c 	writel(shctrl, SHCTRL);
writel            818 drivers/video/fbdev/mbx/mbxfb.c 	writel(svctrl, SVCTRL);
writel            820 drivers/video/fbdev/mbx/mbxfb.c 	writel(SPOCTRL_H_SC_BP | SPOCTRL_V_SC_BP | SPOCTRL_VORDER_4TAP
writel            170 drivers/video/fbdev/mmp/hw/mmp_ctrl.c 	writel(tmp, ctrl_regs(path) + dma_ctrl(0, path->id));
writel             58 drivers/video/fbdev/mmp/hw/mmp_spi.c 	writel(tmp, reg_base + LCD_SPU_SPI_CTRL);
writel             91 drivers/video/fbdev/mmp/hw/mmp_spi.c 	writel(tmp, reg_base + LCD_SPU_SPI_CTRL);
writel            147 drivers/video/fbdev/neofb.c 	writel(val, par->neo2200 + par->cursorOff + regindex);
writel            543 drivers/video/fbdev/neofb.c 	writel(bltMod << 16, &neo2200->bltStat);
writel            544 drivers/video/fbdev/neofb.c 	writel((pitch << 16) | pitch, &neo2200->pitch);
writel           1372 drivers/video/fbdev/neofb.c 	writel(NEO_BC3_FIFO_EN |
writel           1380 drivers/video/fbdev/neofb.c 		writel(rect->color, &par->neo2200->fgColor);
writel           1384 drivers/video/fbdev/neofb.c 		writel(((u32 *) (info->pseudo_palette))[rect->color],
writel           1389 drivers/video/fbdev/neofb.c 	writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
writel           1391 drivers/video/fbdev/neofb.c 	writel((rect->height << 16) | (rect->width & 0xffff),
writel           1420 drivers/video/fbdev/neofb.c 	writel(bltCntl, &par->neo2200->bltCntl);
writel           1422 drivers/video/fbdev/neofb.c 	writel(src, &par->neo2200->srcStart);
writel           1423 drivers/video/fbdev/neofb.c 	writel(dst, &par->neo2200->dstStart);
writel           1424 drivers/video/fbdev/neofb.c 	writel((area->height << 16) | (area->width & 0xffff),
writel           1465 drivers/video/fbdev/neofb.c 		writel(image->fg_color, &par->neo2200->fgColor);
writel           1466 drivers/video/fbdev/neofb.c 		writel(image->bg_color, &par->neo2200->bgColor);
writel           1470 drivers/video/fbdev/neofb.c 		writel(((u32 *) (info->pseudo_palette))[image->fg_color],
writel           1472 drivers/video/fbdev/neofb.c 		writel(((u32 *) (info->pseudo_palette))[image->bg_color],
writel           1477 drivers/video/fbdev/neofb.c 	writel(NEO_BC0_SYS_TO_VID |
writel           1482 drivers/video/fbdev/neofb.c 	writel(0, &par->neo2200->srcStart);
writel           1484 drivers/video/fbdev/neofb.c 	writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
writel           1486 drivers/video/fbdev/neofb.c 	writel((image->height << 16) | (image->width & 0xffff),
writel            170 drivers/video/fbdev/offb.c 		writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
writel            172 drivers/video/fbdev/offb.c 		writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
writel            174 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
writel            176 drivers/video/fbdev/offb.c 		writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
writel            237 drivers/video/fbdev/offb.c 				writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
writel            239 drivers/video/fbdev/offb.c 				writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
writel            240 drivers/video/fbdev/offb.c 				writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
writel            242 drivers/video/fbdev/offb.c 				writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
writel            256 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
writel            257 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
writel            258 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
writel            259 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
writel            260 drivers/video/fbdev/offb.c 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
writel            261 drivers/video/fbdev/offb.c 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
writel            262 drivers/video/fbdev/offb.c 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
writel            263 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
writel            264 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
writel            265 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
writel            266 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
writel            267 drivers/video/fbdev/offb.c 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
writel            268 drivers/video/fbdev/offb.c 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
writel            269 drivers/video/fbdev/offb.c 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
writel            270 drivers/video/fbdev/offb.c 		writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
writel            271 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
writel            272 drivers/video/fbdev/offb.c 		writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
writel            273 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
writel            274 drivers/video/fbdev/offb.c 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
writel            275 drivers/video/fbdev/offb.c 		writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
writel             87 drivers/video/fbdev/omap/sossi.c 	writel(value, sossi.base + reg);
writel           1277 drivers/video/fbdev/pm3fb.c 			writel(0x0000000, (screen_mem + (i * 1048576)));
writel             71 drivers/video/fbdev/pmagb-b-fb.c 	writel(v, par->sfb + reg / 4);
writel             91 drivers/video/fbdev/pmagb-b-fb.c 	writel(v, par->mmio + PMAGB_B_GP0);
writel            291 drivers/video/fbdev/pxa168fb.c 	writel(x, fbi->reg_base + LCD_CFG_SCLK_DIV);
writel            326 drivers/video/fbdev/pxa168fb.c 	writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL0);
writel            348 drivers/video/fbdev/pxa168fb.c 	writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL1);
writel            361 drivers/video/fbdev/pxa168fb.c 	writel(addr, fbi->reg_base + LCD_CFG_GRA_START_ADDR0);
writel            386 drivers/video/fbdev/pxa168fb.c 	writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL);
writel            399 drivers/video/fbdev/pxa168fb.c 	writel((y << 16) | x, fbi->reg_base + LCD_SPUT_V_H_TOTAL);
writel            423 drivers/video/fbdev/pxa168fb.c 	writel(x & ~1, fbi->reg_base + LCD_SPU_DUMB_CTRL);
writel            428 drivers/video/fbdev/pxa168fb.c 	writel((var->yres << 16) | var->xres,
writel            448 drivers/video/fbdev/pxa168fb.c 	writel(x, fbi->reg_base + LCD_CFG_GRA_PITCH);
writel            449 drivers/video/fbdev/pxa168fb.c 	writel((var->yres << 16) | var->xres,
writel            451 drivers/video/fbdev/pxa168fb.c 	writel((var->yres << 16) | var->xres,
writel            460 drivers/video/fbdev/pxa168fb.c 	writel((var->left_margin << 16) | var->right_margin,
writel            462 drivers/video/fbdev/pxa168fb.c 	writel((var->upper_margin << 16) | var->lower_margin,
writel            469 drivers/video/fbdev/pxa168fb.c 	writel(x | 1, fbi->reg_base + LCD_SPU_DUMB_CTRL);
writel            508 drivers/video/fbdev/pxa168fb.c 		writel(val, fbi->reg_base + LCD_SPU_SRAM_WRDAT);
writel            509 drivers/video/fbdev/pxa168fb.c 		writel(0x8300 | regno, fbi->reg_base + LCD_SPU_SRAM_CTRL);
writel            540 drivers/video/fbdev/pxa168fb.c 		writel(isr & (~GRA_FRAME_IRQ0_ENA_MASK),
writel            719 drivers/video/fbdev/pxa168fb.c 	writel(0, fbi->reg_base + LCD_SPU_BLANKCOLOR);
writel            720 drivers/video/fbdev/pxa168fb.c 	writel(mi->io_pin_allocation_mode, fbi->reg_base + SPU_IOPAD_CONTROL);
writel            721 drivers/video/fbdev/pxa168fb.c 	writel(0, fbi->reg_base + LCD_CFG_GRA_START_ADDR1);
writel            722 drivers/video/fbdev/pxa168fb.c 	writel(0, fbi->reg_base + LCD_SPU_GRA_OVSA_HPXL_VLN);
writel            723 drivers/video/fbdev/pxa168fb.c 	writel(0, fbi->reg_base + LCD_SPU_SRAM_PARA0);
writel            724 drivers/video/fbdev/pxa168fb.c 	writel(CFG_CSB_256x32(0x1)|CFG_CSB_256x24(0x1)|CFG_CSB_256x8(0x1),
writel            749 drivers/video/fbdev/pxa168fb.c 	writel(GRA_FRAME_IRQ0_ENA(0x1), fbi->reg_base + SPU_IRQ_ENA);
writel            791 drivers/video/fbdev/pxa168fb.c 	writel(data, fbi->reg_base + LCD_SPU_DMA_CTRL0);
writel            797 drivers/video/fbdev/pxa168fb.c 	writel(GRA_FRAME_IRQ0_ENA(0x0), fbi->reg_base + SPU_IRQ_ENA);
writel            515 drivers/video/fbdev/riva/fbdev.c 			writel(tmp, &par->riva.CURSOR[k++]);
writel            398 drivers/video/fbdev/s3c-fb.c 		writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
writel            413 drivers/video/fbdev/s3c-fb.c 		writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
writel            429 drivers/video/fbdev/s3c-fb.c 			writel(PRTCON_PROTECT, sfb->regs + PRTCON);
writel            432 drivers/video/fbdev/s3c-fb.c 			writel(reg | SHADOWCON_WINx_PROTECT(win->index),
writel            437 drivers/video/fbdev/s3c-fb.c 			writel(0, sfb->regs + PRTCON);
writel            440 drivers/video/fbdev/s3c-fb.c 			writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
writel            471 drivers/video/fbdev/s3c-fb.c 	writel(vidcon0, sfb->regs + VIDCON0);
writel            530 drivers/video/fbdev/s3c-fb.c 	writel(0, regs + WINCON(win_no));
writel            540 drivers/video/fbdev/s3c-fb.c 	writel(info->fix.smem_start, buf + sfb->variant.buf_start);
writel            543 drivers/video/fbdev/s3c-fb.c 	writel(data, buf + sfb->variant.buf_end);
writel            550 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + sfb->variant.buf_size + (win_no * 4));
writel            556 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + VIDOSD_A(win_no, sfb->variant));
writel            565 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + VIDOSD_B(win_no, sfb->variant));
writel            580 drivers/video/fbdev/s3c-fb.c 		writel(data, sfb->regs + SHADOWCON);
writel            657 drivers/video/fbdev/s3c-fb.c 		writel(keycon0_data, keycon + WKEYCON0);
writel            658 drivers/video/fbdev/s3c-fb.c 		writel(keycon1_data, keycon + WKEYCON1);
writel            661 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + sfb->variant.wincon + (win_no * 4));
writel            662 drivers/video/fbdev/s3c-fb.c 	writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
writel            672 drivers/video/fbdev/s3c-fb.c 		writel(data, sfb->regs + BLENDCON);
writel            712 drivers/video/fbdev/s3c-fb.c 	writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
writel            717 drivers/video/fbdev/s3c-fb.c 		writel(value, palreg + (reg * 4));
writel            719 drivers/video/fbdev/s3c-fb.c 	writel(palcon, sfb->regs + WPALCON);
writel            817 drivers/video/fbdev/s3c-fb.c 		writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
writel            824 drivers/video/fbdev/s3c-fb.c 		writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
writel            838 drivers/video/fbdev/s3c-fb.c 	writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
writel            903 drivers/video/fbdev/s3c-fb.c 	writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
writel            904 drivers/video/fbdev/s3c-fb.c 	writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
writel            933 drivers/video/fbdev/s3c-fb.c 		writel(irq_ctrl_reg, regs + VIDINTCON0);
writel            953 drivers/video/fbdev/s3c-fb.c 		writel(irq_ctrl_reg, regs + VIDINTCON0);
writel            970 drivers/video/fbdev/s3c-fb.c 		writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
writel           1150 drivers/video/fbdev/s3c-fb.c 			writel(data, sfb->regs + SHADOWCON);
writel           1310 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + VIDCON0);
writel           1315 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + sfb->variant.vidtcon);
writel           1320 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + sfb->variant.vidtcon + 4);
writel           1326 drivers/video/fbdev/s3c-fb.c 	writel(data, regs + sfb->variant.vidtcon + 8);
writel           1341 drivers/video/fbdev/s3c-fb.c 	writel(0, regs + sfb->variant.wincon + (win * 4));
writel           1342 drivers/video/fbdev/s3c-fb.c 	writel(0, regs + VIDOSD_A(win, sfb->variant));
writel           1343 drivers/video/fbdev/s3c-fb.c 	writel(0, regs + VIDOSD_B(win, sfb->variant));
writel           1344 drivers/video/fbdev/s3c-fb.c 	writel(0, regs + VIDOSD_C(win, sfb->variant));
writel           1351 drivers/video/fbdev/s3c-fb.c 		writel(reg, sfb->regs + SHADOWCON);
writel           1444 drivers/video/fbdev/s3c-fb.c 	writel(pd->vidcon1, sfb->regs + VIDCON1);
writel           1451 drivers/video/fbdev/s3c-fb.c 		writel(reg, sfb->regs + VIDCON1);
writel           1464 drivers/video/fbdev/s3c-fb.c 		writel(0xffffff, regs + WKEYCON0);
writel           1465 drivers/video/fbdev/s3c-fb.c 		writel(0xffffff, regs + WKEYCON1);
writel           1580 drivers/video/fbdev/s3c-fb.c 	writel(pd->vidcon1, sfb->regs + VIDCON1);
writel           1587 drivers/video/fbdev/s3c-fb.c 		writel(reg, sfb->regs + VIDCON1);
writel           1602 drivers/video/fbdev/s3c-fb.c 		writel(0xffffff, regs + WKEYCON0);
writel           1603 drivers/video/fbdev/s3c-fb.c 		writel(0xffffff, regs + WKEYCON1);
writel           1650 drivers/video/fbdev/s3c-fb.c 	writel(pd->vidcon1, sfb->regs + VIDCON1);
writel             88 drivers/video/fbdev/s3c2410fb.c 	writel(saddr1, regs + S3C2410_LCDSADDR1);
writel             89 drivers/video/fbdev/s3c2410fb.c 	writel(saddr2, regs + S3C2410_LCDSADDR2);
writel             90 drivers/video/fbdev/s3c2410fb.c 	writel(saddr3, regs + S3C2410_LCDSADDR3);
writel            409 drivers/video/fbdev/s3c2410fb.c 	writel(fbi->regs.lcdcon1 & ~S3C2410_LCDCON1_ENVID,
writel            411 drivers/video/fbdev/s3c2410fb.c 	writel(fbi->regs.lcdcon2, regs + S3C2410_LCDCON2);
writel            412 drivers/video/fbdev/s3c2410fb.c 	writel(fbi->regs.lcdcon3, regs + S3C2410_LCDCON3);
writel            413 drivers/video/fbdev/s3c2410fb.c 	writel(fbi->regs.lcdcon4, regs + S3C2410_LCDCON4);
writel            414 drivers/video/fbdev/s3c2410fb.c 	writel(fbi->regs.lcdcon5, regs + S3C2410_LCDCON5);
writel            420 drivers/video/fbdev/s3c2410fb.c 	writel(fbi->regs.lcdcon1, regs + S3C2410_LCDCON1);
writel            471 drivers/video/fbdev/s3c2410fb.c 		writel(irqen, irq_base + S3C24XX_LCDINTMSK);
writel            520 drivers/video/fbdev/s3c2410fb.c 			writel(val, regs + S3C2410_TFTPAL(regno));
writel            548 drivers/video/fbdev/s3c2410fb.c 	writel(fbi->regs.lcdcon1, fbi->io + S3C2410_LCDCON1);
writel            582 drivers/video/fbdev/s3c2410fb.c 		writel(0x0, tpal_reg);
writel            585 drivers/video/fbdev/s3c2410fb.c 		writel(S3C2410_TPAL_EN, tpal_reg);
writel            680 drivers/video/fbdev/s3c2410fb.c 	writel(tmp | set, reg);
writel            717 drivers/video/fbdev/s3c2410fb.c 	writel(mach_info->lpcsel, lpcsel);
writel            722 drivers/video/fbdev/s3c2410fb.c 	writel(0x00, tpal);
writel            739 drivers/video/fbdev/s3c2410fb.c 		writel(ent, regs + S3C2410_TFTPAL(i));
writel            763 drivers/video/fbdev/s3c2410fb.c 		writel(S3C2410_LCDINT_FRSYNC, irq_base + S3C24XX_LCDINTPND);
writel            764 drivers/video/fbdev/s3c2410fb.c 		writel(S3C2410_LCDINT_FRSYNC, irq_base + S3C24XX_LCDSRCPND);
writel            900 drivers/video/fbdev/s3c2410fb.c 	writel(lcdcon1 & ~S3C2410_LCDCON1_ENVID, info->io + S3C2410_LCDCON1);
writel             55 drivers/video/fbdev/savage/savagefb-i2c.c 	writel(r, chan->ioaddr + chan->reg);
writel             69 drivers/video/fbdev/savage/savagefb-i2c.c 	writel(r, chan->ioaddr + chan->reg);
writel            127 drivers/video/fbdev/savage/savagefb.h #define BCI_SEND(dw)                 writel(dw, par->bci_base + par->bci_ptr++)
writel            281 drivers/video/fbdev/savage/savagefb.h 	writel(val, par->mmio.vbase + addr);
writel            398 drivers/video/fbdev/sis/sis.h #define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))
writel           2898 drivers/video/fbdev/sis/sis_main.c 				writel(0x16800000 + 0x8240, ivideo->video_vbase + tempq);
writel           2899 drivers/video/fbdev/sis/sis_main.c 				writel(templ | (1 << 10), ivideo->video_vbase + tempq + 4);
writel           2900 drivers/video/fbdev/sis/sis_main.c 				writel(0x168F0000, ivideo->video_vbase + tempq + 8);
writel           2901 drivers/video/fbdev/sis/sis_main.c 				writel(0x168F0000, ivideo->video_vbase + tempq + 12);
writel           4219 drivers/video/fbdev/sis/sis_main.c 	writel(0x01234567L, FBAddress);
writel           4220 drivers/video/fbdev/sis/sis_main.c 	writel(0x456789ABL, (FBAddress + 4));
writel           4221 drivers/video/fbdev/sis/sis_main.c 	writel(0x89ABCDEFL, (FBAddress + 8));
writel           4222 drivers/video/fbdev/sis/sis_main.c 	writel(0xCDEF0123L, (FBAddress + 12));
writel           4606 drivers/video/fbdev/sis/sis_main.c 	writel(0, ivideo->video_vbase);
writel           4611 drivers/video/fbdev/sis/sis_main.c 			writel(pos, ivideo->video_vbase + pos);
writel           1262 drivers/video/fbdev/sm712fb.c 	writel(0x0, sfb->vp_regs + 0x0C);
writel           1263 drivers/video/fbdev/sm712fb.c 	writel(0x0, sfb->vp_regs + 0x40);
writel           1269 drivers/video/fbdev/sm712fb.c 		writel(0x0, sfb->vp_regs + 0x0);
writel           1272 drivers/video/fbdev/sm712fb.c 		writel(0x00020000, sfb->vp_regs + 0x0);
writel           1275 drivers/video/fbdev/sm712fb.c 		writel(0x00040000, sfb->vp_regs + 0x0);
writel           1278 drivers/video/fbdev/sm712fb.c 		writel(0x00030000, sfb->vp_regs + 0x0);
writel           1281 drivers/video/fbdev/sm712fb.c 	writel((u32)(((m_nscreenstride + 2) << 16) | m_nscreenstride),
writel            192 drivers/video/fbdev/sstfb.c 	writel(val, vbase + reg);
writel            837 drivers/video/fbdev/sstfb.c 	writel(0xdeadbeef, fbbase_virt);
writel            838 drivers/video/fbdev/sstfb.c 	writel(0xdeadbeef, fbbase_virt+0x100000);
writel            839 drivers/video/fbdev/sstfb.c 	writel(0xdeadbeef, fbbase_virt+0x200000);
writel            844 drivers/video/fbdev/sstfb.c 	writel(0xabcdef01, fbbase_virt);
writel            105 drivers/video/fbdev/sunxvr500.c 	writel(index, ramdac + RAMDAC_INDEX);
writel            106 drivers/video/fbdev/sunxvr500.c 	writel(val, ramdac + RAMDAC_DATA);
writel            250 drivers/video/fbdev/tdfxfb.c 	writel(val, par->regbase_virt + reg);
writel             34 drivers/video/fbdev/via/accel.c 	writel(gemode, engine + VIA_REG_GEMODE);
writel             91 drivers/video/fbdev/via/accel.c 		writel(tmp, engine + 0x08);
writel            100 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x0C);
writel            108 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x10);
writel            111 drivers/video/fbdev/via/accel.c 		writel(fg_color, engine + 0x18);
writel            114 drivers/video/fbdev/via/accel.c 		writel(bg_color, engine + 0x1C);
writel            124 drivers/video/fbdev/via/accel.c 		writel(tmp, engine + 0x30);
writel            133 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x34);
writel            145 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x38);
writel            158 drivers/video/fbdev/via/accel.c 	writel(ge_cmd, engine);
writel            167 drivers/video/fbdev/via/accel.c 		writel(src_mem[i], engine + VIA_MMIO_BLTBASE);
writel            226 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x08);
writel            234 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x0C);
writel            242 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x10);
writel            250 drivers/video/fbdev/via/accel.c 	writel(tmp, engine + 0x14);
writel            260 drivers/video/fbdev/via/accel.c 		writel(tmp, engine + 0x18);
writel            269 drivers/video/fbdev/via/accel.c 		writel(tmp, engine + 0x1C);
writel            273 drivers/video/fbdev/via/accel.c 		writel(fg_color, engine + 0x58);
writel            275 drivers/video/fbdev/via/accel.c 		writel(fg_color, engine + 0x4C);
writel            276 drivers/video/fbdev/via/accel.c 		writel(bg_color, engine + 0x50);
writel            290 drivers/video/fbdev/via/accel.c 	writel(ge_cmd, engine);
writel            299 drivers/video/fbdev/via/accel.c 		writel(src_mem[i], engine + VIA_MMIO_BLTBASE);
writel            384 drivers/video/fbdev/via/accel.c 		writel(0x0, engine + i);
writel            393 drivers/video/fbdev/via/accel.c 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);
writel            394 drivers/video/fbdev/via/accel.c 		writel(0x680A0000, engine + VIA_REG_CR_TRANSPACE);
writel            395 drivers/video/fbdev/via/accel.c 		writel(0x02000000, engine + VIA_REG_CR_TRANSPACE);
writel            399 drivers/video/fbdev/via/accel.c 		writel(0x00100000, engine + VIA_REG_TRANSET);
writel            400 drivers/video/fbdev/via/accel.c 		writel(0x00000000, engine + VIA_REG_TRANSPACE);
writel            401 drivers/video/fbdev/via/accel.c 		writel(0x00333004, engine + VIA_REG_TRANSPACE);
writel            402 drivers/video/fbdev/via/accel.c 		writel(0x60000000, engine + VIA_REG_TRANSPACE);
writel            403 drivers/video/fbdev/via/accel.c 		writel(0x61000000, engine + VIA_REG_TRANSPACE);
writel            404 drivers/video/fbdev/via/accel.c 		writel(0x62000000, engine + VIA_REG_TRANSPACE);
writel            405 drivers/video/fbdev/via/accel.c 		writel(0x63000000, engine + VIA_REG_TRANSPACE);
writel            406 drivers/video/fbdev/via/accel.c 		writel(0x64000000, engine + VIA_REG_TRANSPACE);
writel            407 drivers/video/fbdev/via/accel.c 		writel(0x7D000000, engine + VIA_REG_TRANSPACE);
writel            409 drivers/video/fbdev/via/accel.c 		writel(0xFE020000, engine + VIA_REG_TRANSET);
writel            410 drivers/video/fbdev/via/accel.c 		writel(0x00000000, engine + VIA_REG_TRANSPACE);
writel            435 drivers/video/fbdev/via/accel.c 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);
writel            436 drivers/video/fbdev/via/accel.c 		writel(vq_high, engine + VIA_REG_CR_TRANSPACE);
writel            437 drivers/video/fbdev/via/accel.c 		writel(vq_start_low, engine + VIA_REG_CR_TRANSPACE);
writel            438 drivers/video/fbdev/via/accel.c 		writel(vq_end_low, engine + VIA_REG_CR_TRANSPACE);
writel            439 drivers/video/fbdev/via/accel.c 		writel(vq_len, engine + VIA_REG_CR_TRANSPACE);
writel            440 drivers/video/fbdev/via/accel.c 		writel(0x74301001, engine + VIA_REG_CR_TRANSPACE);
writel            441 drivers/video/fbdev/via/accel.c 		writel(0x00000000, engine + VIA_REG_CR_TRANSPACE);
writel            444 drivers/video/fbdev/via/accel.c 		writel(0x00FE0000, engine + VIA_REG_TRANSET);
writel            445 drivers/video/fbdev/via/accel.c 		writel(0x080003FE, engine + VIA_REG_TRANSPACE);
writel            446 drivers/video/fbdev/via/accel.c 		writel(0x0A00027C, engine + VIA_REG_TRANSPACE);
writel            447 drivers/video/fbdev/via/accel.c 		writel(0x0B000260, engine + VIA_REG_TRANSPACE);
writel            448 drivers/video/fbdev/via/accel.c 		writel(0x0C000274, engine + VIA_REG_TRANSPACE);
writel            449 drivers/video/fbdev/via/accel.c 		writel(0x0D000264, engine + VIA_REG_TRANSPACE);
writel            450 drivers/video/fbdev/via/accel.c 		writel(0x0E000000, engine + VIA_REG_TRANSPACE);
writel            451 drivers/video/fbdev/via/accel.c 		writel(0x0F000020, engine + VIA_REG_TRANSPACE);
writel            452 drivers/video/fbdev/via/accel.c 		writel(0x1000027E, engine + VIA_REG_TRANSPACE);
writel            453 drivers/video/fbdev/via/accel.c 		writel(0x110002FE, engine + VIA_REG_TRANSPACE);
writel            454 drivers/video/fbdev/via/accel.c 		writel(0x200F0060, engine + VIA_REG_TRANSPACE);
writel            456 drivers/video/fbdev/via/accel.c 		writel(0x00000006, engine + VIA_REG_TRANSPACE);
writel            457 drivers/video/fbdev/via/accel.c 		writel(0x40008C0F, engine + VIA_REG_TRANSPACE);
writel            458 drivers/video/fbdev/via/accel.c 		writel(0x44000000, engine + VIA_REG_TRANSPACE);
writel            459 drivers/video/fbdev/via/accel.c 		writel(0x45080C04, engine + VIA_REG_TRANSPACE);
writel            460 drivers/video/fbdev/via/accel.c 		writel(0x46800408, engine + VIA_REG_TRANSPACE);
writel            462 drivers/video/fbdev/via/accel.c 		writel(vq_high, engine + VIA_REG_TRANSPACE);
writel            463 drivers/video/fbdev/via/accel.c 		writel(vq_start_low, engine + VIA_REG_TRANSPACE);
writel            464 drivers/video/fbdev/via/accel.c 		writel(vq_end_low, engine + VIA_REG_TRANSPACE);
writel            465 drivers/video/fbdev/via/accel.c 		writel(vq_len, engine + VIA_REG_TRANSPACE);
writel            470 drivers/video/fbdev/via/accel.c 	writel(viapar->shared->cursor_vram_addr, engine + VIA_REG_CURSOR_MODE);
writel            471 drivers/video/fbdev/via/accel.c 	writel(0x0, engine + VIA_REG_CURSOR_POS);
writel            472 drivers/video/fbdev/via/accel.c 	writel(0x0, engine + VIA_REG_CURSOR_ORG);
writel            473 drivers/video/fbdev/via/accel.c 	writel(0x0, engine + VIA_REG_CURSOR_BG);
writel            474 drivers/video/fbdev/via/accel.c 	writel(0x0, engine + VIA_REG_CURSOR_FG);
writel            500 drivers/video/fbdev/via/accel.c 	writel(temp, viapar->shared->vdev->engine_mmio + VIA_REG_CURSOR_MODE);
writel            778 drivers/video/fbdev/via/viafbdev.c 		writel(temp, engine + VIA_REG_CURSOR_ORG);
writel            786 drivers/video/fbdev/via/viafbdev.c 		writel(temp, engine + VIA_REG_CURSOR_POS);
writel            806 drivers/video/fbdev/via/viafbdev.c 		writel(temp, engine + VIA_REG_CURSOR_MODE);
writel            835 drivers/video/fbdev/via/viafbdev.c 		writel(bg_color, engine + VIA_REG_CURSOR_BG);
writel            836 drivers/video/fbdev/via/viafbdev.c 		writel(fg_color, engine + VIA_REG_CURSOR_FG);
writel            113 drivers/video/fbdev/vt8500lcdfb.c 	writel(0, fbi->regbase);
writel            116 drivers/video/fbdev/vt8500lcdfb.c 	writel((((info->var.hsync_len - 1) & 0x3f) << 26)
writel            120 drivers/video/fbdev/vt8500lcdfb.c 	writel((((info->var.vsync_len - 1) & 0x3f) << 26)
writel            124 drivers/video/fbdev/vt8500lcdfb.c 	writel((((info->var.yres - 1) & 0x400) << 2)
writel            126 drivers/video/fbdev/vt8500lcdfb.c 	writel(0x80000000, fbi->regbase + 0x20);
writel            127 drivers/video/fbdev/vt8500lcdfb.c 	writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase);
writel            186 drivers/video/fbdev/vt8500lcdfb.c 		writel(0xffffffff ^ (1 << 3), fbi->regbase + 0x3c);
writel            190 drivers/video/fbdev/vt8500lcdfb.c 		writel(0xffffffff, fbi->regbase + 0x3c);
writel            208 drivers/video/fbdev/vt8500lcdfb.c 	writel((1 << 31)
writel            262 drivers/video/fbdev/vt8500lcdfb.c 	writel(0xffffffff, fbi->regbase + 0x38);
writel            408 drivers/video/fbdev/vt8500lcdfb.c 	writel(fbi->fb.fix.smem_start >> 22, fbi->regbase + 0x1c);
writel            409 drivers/video/fbdev/vt8500lcdfb.c 	writel((fbi->palette_phys & 0xfffffe00) | 1, fbi->regbase + 0x18);
writel            423 drivers/video/fbdev/vt8500lcdfb.c 	writel(readl(fbi->regbase) | 1, fbi->regbase);
writel            450 drivers/video/fbdev/vt8500lcdfb.c 	writel(0, fbi->regbase);
writel            129 drivers/video/fbdev/w100fb.c 		writel(param, remapped_regs + regs);
writel            302 drivers/video/fbdev/w100fb.c 	writel(W100_FB_BASE, remapped_regs + mmDST_OFFSET);
writel            303 drivers/video/fbdev/w100fb.c 	writel(par->xres, remapped_regs + mmDST_PITCH);
writel            304 drivers/video/fbdev/w100fb.c 	writel(W100_FB_BASE, remapped_regs + mmSRC_OFFSET);
writel            305 drivers/video/fbdev/w100fb.c 	writel(par->xres, remapped_regs + mmSRC_PITCH);
writel            308 drivers/video/fbdev/w100fb.c 	writel(0, remapped_regs + mmSC_TOP_LEFT);
writel            309 drivers/video/fbdev/w100fb.c 	writel((par->yres << 16) | par->xres, remapped_regs + mmSC_BOTTOM_RIGHT);
writel            310 drivers/video/fbdev/w100fb.c 	writel(0x1fff1fff, remapped_regs + mmSRC_SC_BOTTOM_RIGHT);
writel            320 drivers/video/fbdev/w100fb.c 	writel(dp_cntl.val, remapped_regs + mmDP_CNTL);
writel            337 drivers/video/fbdev/w100fb.c 	writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL);
writel            346 drivers/video/fbdev/w100fb.c 	writel(dp_datatype.val, remapped_regs + mmDP_DATATYPE);
writel            352 drivers/video/fbdev/w100fb.c 	writel(dp_mix.val, remapped_regs + mmDP_MIX);
writel            372 drivers/video/fbdev/w100fb.c 	writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL);
writel            373 drivers/video/fbdev/w100fb.c 	writel(rect->color, remapped_regs + mmDP_BRUSH_FRGD_CLR);
writel            376 drivers/video/fbdev/w100fb.c 	writel((rect->dy << 16) | (rect->dx & 0xffff), remapped_regs + mmDST_Y_X);
writel            377 drivers/video/fbdev/w100fb.c 	writel((rect->width << 16) | (rect->height & 0xffff),
writel            400 drivers/video/fbdev/w100fb.c 	writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL);
writel            403 drivers/video/fbdev/w100fb.c 	writel((sy << 16) | (sx & 0xffff), remapped_regs + mmSRC_Y_X);
writel            404 drivers/video/fbdev/w100fb.c 	writel((dy << 16) | (dx & 0xffff), remapped_regs + mmDST_Y_X);
writel            405 drivers/video/fbdev/w100fb.c 	writel((w << 16) | (h & 0xffff), remapped_regs + mmDST_WIDTH_HEIGHT);
writel            827 drivers/video/fbdev/w100fb.c 	writel((u32) (disp_db_buf_wr_cntl.val), remapped_regs + mmDISP_DB_BUF_CNTL);
writel            838 drivers/video/fbdev/w100fb.c 	writel((u32) (disp_db_buf_wr_cntl.val), remapped_regs + mmDISP_DB_BUF_CNTL);
writel            856 drivers/video/fbdev/w100fb.c 		writel(value, remapped_regs + mmGPIO_DATA);
writel            858 drivers/video/fbdev/w100fb.c 		writel(value, remapped_regs + mmGPIO_DATA2);
writel            884 drivers/video/fbdev/w100fb.c 	writel(0x31, remapped_regs + mmSCRATCH_UMSK);
writel            887 drivers/video/fbdev/w100fb.c 	writel(0x30, remapped_regs + mmSCRATCH_UMSK);
writel            891 drivers/video/fbdev/w100fb.c 	writel((u32)(cif_io.val), remapped_regs + mmCIF_IO);
writel            897 drivers/video/fbdev/w100fb.c 	writel((u32) (cif_write_dbg.val), remapped_regs + mmCIF_WRITE_DBG);
writel            901 drivers/video/fbdev/w100fb.c 	writel((u32) (cif_read_dbg.val), remapped_regs + mmCIF_READ_DBG);
writel            909 drivers/video/fbdev/w100fb.c 	writel((u32) (cif_cntl.val), remapped_regs + mmCIF_CNTL);
writel            931 drivers/video/fbdev/w100fb.c 	writel((u32) (cfgreg_base.val), remapped_regs + mmCFGREG_BASE);
writel            935 drivers/video/fbdev/w100fb.c 	writel((u32) (wrap_start_dir.val), remapped_regs + mmWRAP_START_DIR);
writel            939 drivers/video/fbdev/w100fb.c 	writel((u32) (wrap_top_dir.val), remapped_regs + mmWRAP_TOP_DIR);
writel            941 drivers/video/fbdev/w100fb.c 	writel((u32) 0x2440, remapped_regs + mmRBBM_CNTL);
writel            947 drivers/video/fbdev/w100fb.c 	writel(temp32, remapped_regs + mmDISP_DEBUG2);
writel            951 drivers/video/fbdev/w100fb.c 		writel(gpio->init_data1, remapped_regs + mmGPIO_DATA);
writel            952 drivers/video/fbdev/w100fb.c 		writel(gpio->init_data2, remapped_regs + mmGPIO_DATA2);
writel            953 drivers/video/fbdev/w100fb.c 		writel(gpio->gpio_dir1,  remapped_regs + mmGPIO_CNTL1);
writel            954 drivers/video/fbdev/w100fb.c 		writel(gpio->gpio_oe1,   remapped_regs + mmGPIO_CNTL2);
writel            955 drivers/video/fbdev/w100fb.c 		writel(gpio->gpio_dir2,  remapped_regs + mmGPIO_CNTL3);
writel            956 drivers/video/fbdev/w100fb.c 		writel(gpio->gpio_oe2,   remapped_regs + mmGPIO_CNTL4);
writel           1041 drivers/video/fbdev/w100fb.c 	writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL);
writel           1044 drivers/video/fbdev/w100fb.c 	writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL);
writel           1048 drivers/video/fbdev/w100fb.c 	writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL);
writel           1056 drivers/video/fbdev/w100fb.c 	writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL);
writel           1083 drivers/video/fbdev/w100fb.c 		writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL);
writel           1089 drivers/video/fbdev/w100fb.c 			writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL);
writel           1129 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL);
writel           1135 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL);
writel           1139 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL);
writel           1157 drivers/video/fbdev/w100fb.c 		writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL);
writel           1162 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL);
writel           1168 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pll_ref_fb_div.val), remapped_regs + mmPLL_REF_FB_DIV);
writel           1171 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL);
writel           1179 drivers/video/fbdev/w100fb.c 		writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL);
writel           1208 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.clk_pin_cntl.val), remapped_regs + mmCLK_PIN_CNTL);
writel           1228 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL);
writel           1233 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pclk_cntl.val), remapped_regs + mmPCLK_CNTL);
writel           1240 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pll_ref_fb_div.val), remapped_regs + mmPLL_REF_FB_DIV);
writel           1260 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL);
writel           1271 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL);
writel           1290 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL);
writel           1309 drivers/video/fbdev/w100fb.c 	writel(active_h_disp.val, remapped_regs + mmACTIVE_H_DISP);
writel           1314 drivers/video/fbdev/w100fb.c 	writel(active_v_disp.val, remapped_regs + mmACTIVE_V_DISP);
writel           1319 drivers/video/fbdev/w100fb.c 	writel(graphic_h_disp.val, remapped_regs + mmGRAPHIC_H_DISP);
writel           1324 drivers/video/fbdev/w100fb.c 	writel(graphic_v_disp.val, remapped_regs + mmGRAPHIC_V_DISP);
writel           1329 drivers/video/fbdev/w100fb.c 	writel(crtc_total.val, remapped_regs + mmCRTC_TOTAL);
writel           1331 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_ss, remapped_regs + mmCRTC_SS);
writel           1332 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_ls, remapped_regs + mmCRTC_LS);
writel           1333 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_gs, remapped_regs + mmCRTC_GS);
writel           1334 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_vpos_gs, remapped_regs + mmCRTC_VPOS_GS);
writel           1335 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_rev, remapped_regs + mmCRTC_REV);
writel           1336 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_dclk, remapped_regs + mmCRTC_DCLK);
writel           1337 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_gclk, remapped_regs + mmCRTC_GCLK);
writel           1338 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_goe, remapped_regs + mmCRTC_GOE);
writel           1339 drivers/video/fbdev/w100fb.c 	writel(mode->crtc_ps1_active, remapped_regs + mmCRTC_PS1_ACTIVE);
writel           1341 drivers/video/fbdev/w100fb.c 	writel(regs->lcd_format, remapped_regs + mmLCD_FORMAT);
writel           1342 drivers/video/fbdev/w100fb.c 	writel(regs->lcdd_cntl1, remapped_regs + mmLCDD_CNTL1);
writel           1343 drivers/video/fbdev/w100fb.c 	writel(regs->lcdd_cntl2, remapped_regs + mmLCDD_CNTL2);
writel           1344 drivers/video/fbdev/w100fb.c 	writel(regs->genlcd_cntl1, remapped_regs + mmGENLCD_CNTL1);
writel           1345 drivers/video/fbdev/w100fb.c 	writel(regs->genlcd_cntl2, remapped_regs + mmGENLCD_CNTL2);
writel           1346 drivers/video/fbdev/w100fb.c 	writel(regs->genlcd_cntl3, remapped_regs + mmGENLCD_CNTL3);
writel           1348 drivers/video/fbdev/w100fb.c 	writel(0x00000000, remapped_regs + mmCRTC_FRAME);
writel           1349 drivers/video/fbdev/w100fb.c 	writel(0x00000000, remapped_regs + mmCRTC_FRAME_VPOS);
writel           1350 drivers/video/fbdev/w100fb.c 	writel(0x00000000, remapped_regs + mmCRTC_DEFAULT_COUNT);
writel           1351 drivers/video/fbdev/w100fb.c 	writel(0x0000FF00, remapped_regs + mmLCD_BACKGROUND_COLOR);
writel           1356 drivers/video/fbdev/w100fb.c 	writel(temp32, remapped_regs + mmDISP_DEBUG2);
writel           1373 drivers/video/fbdev/w100fb.c 		writel((u32) (intmem_location.val), remapped_regs + mmMC_FB_LOCATION);
writel           1379 drivers/video/fbdev/w100fb.c 		writel((u32) (extmem_location.val), remapped_regs + mmMC_EXT_MEM_LOCATION);
writel           1384 drivers/video/fbdev/w100fb.c 		writel((u32) (intmem_location.val), remapped_regs + mmMC_FB_LOCATION);
writel           1389 drivers/video/fbdev/w100fb.c 		writel((u32) (extmem_location.val), remapped_regs + mmMC_EXT_MEM_LOCATION);
writel           1391 drivers/video/fbdev/w100fb.c 		writel(0x00007800, remapped_regs + mmMC_BIST_CTRL);
writel           1392 drivers/video/fbdev/w100fb.c 		writel(mem->ext_cntl, remapped_regs + mmMEM_EXT_CNTL);
writel           1393 drivers/video/fbdev/w100fb.c 		writel(0x00200021, remapped_regs + mmMEM_SDRAM_MODE_REG);
writel           1395 drivers/video/fbdev/w100fb.c 		writel(0x80200021, remapped_regs + mmMEM_SDRAM_MODE_REG);
writel           1397 drivers/video/fbdev/w100fb.c 		writel(mem->sdram_mode_reg, remapped_regs + mmMEM_SDRAM_MODE_REG);
writel           1399 drivers/video/fbdev/w100fb.c 		writel(mem->ext_timing_cntl, remapped_regs + mmMEM_EXT_TIMING_CNTL);
writel           1400 drivers/video/fbdev/w100fb.c 		writel(mem->io_cntl, remapped_regs + mmMEM_IO_CNTL);
writel           1402 drivers/video/fbdev/w100fb.c 			writel(bm_mem->ext_mem_bw, remapped_regs + mmBM_EXT_MEM_BANDWIDTH);
writel           1403 drivers/video/fbdev/w100fb.c 			writel(bm_mem->offset, remapped_regs + mmBM_OFFSET);
writel           1404 drivers/video/fbdev/w100fb.c 			writel(bm_mem->ext_timing_ctl, remapped_regs + mmBM_MEM_EXT_TIMING_CNTL);
writel           1405 drivers/video/fbdev/w100fb.c 			writel(bm_mem->ext_cntl, remapped_regs + mmBM_MEM_EXT_CNTL);
writel           1406 drivers/video/fbdev/w100fb.c 			writel(bm_mem->mode_reg, remapped_regs + mmBM_MEM_MODE_REG);
writel           1407 drivers/video/fbdev/w100fb.c 			writel(bm_mem->io_cntl, remapped_regs + mmBM_MEM_IO_CNTL);
writel           1408 drivers/video/fbdev/w100fb.c 			writel(bm_mem->config, remapped_regs + mmBM_CONFIG);
writel           1493 drivers/video/fbdev/w100fb.c 	writel((u32) (w100_pwr_state.pclk_cntl.val), remapped_regs + mmPCLK_CNTL);
writel           1495 drivers/video/fbdev/w100fb.c 	writel(graphic_ctrl.val, remapped_regs + mmGRAPHIC_CTRL);
writel           1496 drivers/video/fbdev/w100fb.c 	writel(W100_FB_BASE + ((offset * BITS_PER_PIXEL/8)&~0x03UL), remapped_regs + mmGRAPHIC_OFFSET);
writel           1497 drivers/video/fbdev/w100fb.c 	writel((par->xres*BITS_PER_PIXEL/8), remapped_regs + mmGRAPHIC_PITCH);
writel           1529 drivers/video/fbdev/w100fb.c 	writel(0x7FFF8000, remapped_regs + mmMC_EXT_MEM_LOCATION);
writel           1530 drivers/video/fbdev/w100fb.c 	writel(0x00FF0000, remapped_regs + mmMC_PERF_MON_CNTL);
writel           1535 drivers/video/fbdev/w100fb.c 	writel(val, remapped_regs + mmMEM_EXT_TIMING_CNTL);
writel           1540 drivers/video/fbdev/w100fb.c 	writel(val, remapped_regs + mmMEM_EXT_CNTL);
writel           1548 drivers/video/fbdev/w100fb.c 		writel(val, remapped_regs + mmMEM_EXT_CNTL);
writel           1553 drivers/video/fbdev/w100fb.c 		writel(val, remapped_regs + mmMEM_EXT_CNTL);
writel           1555 drivers/video/fbdev/w100fb.c 		writel(0x00000000, remapped_regs + mmSCLK_CNTL);
writel           1556 drivers/video/fbdev/w100fb.c 		writel(0x000000BF, remapped_regs + mmCLK_PIN_CNTL);
writel           1557 drivers/video/fbdev/w100fb.c 		writel(0x00000015, remapped_regs + mmPWRMGT_CNTL);
writel           1563 drivers/video/fbdev/w100fb.c 		writel(val, remapped_regs + mmPLL_CNTL);
writel           1565 drivers/video/fbdev/w100fb.c 		writel(0x00000000, remapped_regs + mmLCDD_CNTL1);
writel           1566 drivers/video/fbdev/w100fb.c 		writel(0x00000000, remapped_regs + mmLCDD_CNTL2);
writel           1567 drivers/video/fbdev/w100fb.c 		writel(0x00000000, remapped_regs + mmGENLCD_CNTL1);
writel           1568 drivers/video/fbdev/w100fb.c 		writel(0x00000000, remapped_regs + mmGENLCD_CNTL2);
writel           1569 drivers/video/fbdev/w100fb.c 		writel(0x00000000, remapped_regs + mmGENLCD_CNTL3);
writel           1574 drivers/video/fbdev/w100fb.c 		writel(val, remapped_regs + mmMEM_EXT_CNTL);
writel           1576 drivers/video/fbdev/w100fb.c 		writel(0x0000001d, remapped_regs + mmPWRMGT_CNTL);
writel           1588 drivers/video/fbdev/w100fb.c 	writel((tmp >> 16) & 0x3ff, remapped_regs + mmDISP_INT_CNTL);
writel           1594 drivers/video/fbdev/w100fb.c 	writel(tmp, remapped_regs + mmGEN_INT_CNTL);
writel           1597 drivers/video/fbdev/w100fb.c 	writel(0x00000002, remapped_regs + mmGEN_INT_STATUS);
writel           1600 drivers/video/fbdev/w100fb.c 	writel((tmp | 0x00000002), remapped_regs + mmGEN_INT_CNTL);
writel           1603 drivers/video/fbdev/w100fb.c 	writel(0x00000002, remapped_regs + mmGEN_INT_STATUS);
writel           1613 drivers/video/fbdev/w100fb.c 	writel(tmp, remapped_regs + mmGEN_INT_CNTL);
writel           1616 drivers/video/fbdev/w100fb.c 	writel(0x00000002, remapped_regs + mmGEN_INT_STATUS);
writel             51 drivers/video/fbdev/wm8505fb.c 		writel(0, fbi->regbase + i);
writel             54 drivers/video/fbdev/wm8505fb.c 	writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR);
writel             55 drivers/video/fbdev/wm8505fb.c 	writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1);
writel             62 drivers/video/fbdev/wm8505fb.c 	writel(0x31c,		       fbi->regbase + WMT_GOVR_COLORSPACE);
writel             63 drivers/video/fbdev/wm8505fb.c 	writel(1,		       fbi->regbase + WMT_GOVR_COLORSPACE1);
writel             66 drivers/video/fbdev/wm8505fb.c 	writel(info->var.xres,	       fbi->regbase + WMT_GOVR_XRES);
writel             67 drivers/video/fbdev/wm8505fb.c 	writel(info->var.xres_virtual, fbi->regbase + WMT_GOVR_XRES_VIRTUAL);
writel             70 drivers/video/fbdev/wm8505fb.c 	writel(0xf,		       fbi->regbase + WMT_GOVR_FHI);
writel             71 drivers/video/fbdev/wm8505fb.c 	writel(4,		       fbi->regbase + WMT_GOVR_DVO_SET);
writel             72 drivers/video/fbdev/wm8505fb.c 	writel(1,		       fbi->regbase + WMT_GOVR_MIF_ENABLE);
writel             73 drivers/video/fbdev/wm8505fb.c 	writel(1,		       fbi->regbase + WMT_GOVR_REG_UPDATE);
writel             92 drivers/video/fbdev/wm8505fb.c 	writel(0, fbi->regbase + WMT_GOVR_TG);
writel             94 drivers/video/fbdev/wm8505fb.c 	writel(h_start, fbi->regbase + WMT_GOVR_TIMING_H_START);
writel             95 drivers/video/fbdev/wm8505fb.c 	writel(h_end,   fbi->regbase + WMT_GOVR_TIMING_H_END);
writel             96 drivers/video/fbdev/wm8505fb.c 	writel(h_all,   fbi->regbase + WMT_GOVR_TIMING_H_ALL);
writel             97 drivers/video/fbdev/wm8505fb.c 	writel(h_sync,  fbi->regbase + WMT_GOVR_TIMING_H_SYNC);
writel             99 drivers/video/fbdev/wm8505fb.c 	writel(v_start, fbi->regbase + WMT_GOVR_TIMING_V_START);
writel            100 drivers/video/fbdev/wm8505fb.c 	writel(v_end,   fbi->regbase + WMT_GOVR_TIMING_V_END);
writel            101 drivers/video/fbdev/wm8505fb.c 	writel(v_all,   fbi->regbase + WMT_GOVR_TIMING_V_ALL);
writel            102 drivers/video/fbdev/wm8505fb.c 	writel(v_sync,  fbi->regbase + WMT_GOVR_TIMING_V_SYNC);
writel            104 drivers/video/fbdev/wm8505fb.c 	writel(1, fbi->regbase + WMT_GOVR_TG);
writel            145 drivers/video/fbdev/wm8505fb.c 	writel(fbi->contrast<<16 | fbi->contrast<<8 | fbi->contrast,
writel            228 drivers/video/fbdev/wm8505fb.c 	writel(var->xoffset, fbi->regbase + WMT_GOVR_XPAN);
writel            229 drivers/video/fbdev/wm8505fb.c 	writel(var->yoffset, fbi->regbase + WMT_GOVR_YPAN);
writel            242 drivers/video/fbdev/wm8505fb.c 		writel(0,  fbi->regbase + WMT_GOVR_TIMING_V_SYNC);
writel            383 drivers/video/fbdev/wm8505fb.c 	writel(0, fbi->regbase);
writel             59 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.bits_per_pixel == 32 ? 3 :
writel             61 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.bits_per_pixel == 15 ? 1 : 0, regbase + GE_HIGHCOLOR_OFF);
writel             62 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF);
writel             63 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF);
writel             64 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF);
writel             65 drivers/video/fbdev/wmt_ge_rops.c 	writel(rect->dx, regbase + GE_DESTAREAX_OFF);
writel             66 drivers/video/fbdev/wmt_ge_rops.c 	writel(rect->dy, regbase + GE_DESTAREAY_OFF);
writel             67 drivers/video/fbdev/wmt_ge_rops.c 	writel(rect->width - 1, regbase + GE_DESTAREAW_OFF);
writel             68 drivers/video/fbdev/wmt_ge_rops.c 	writel(rect->height - 1, regbase + GE_DESTAREAH_OFF);
writel             70 drivers/video/fbdev/wmt_ge_rops.c 	writel(pat, regbase + GE_PAT0C_OFF);
writel             71 drivers/video/fbdev/wmt_ge_rops.c 	writel(1, regbase + GE_COMMAND_OFF);
writel             72 drivers/video/fbdev/wmt_ge_rops.c 	writel(rect->rop == ROP_XOR ? 0x5a : 0xf0, regbase + GE_ROPCODE_OFF);
writel             73 drivers/video/fbdev/wmt_ge_rops.c 	writel(1, regbase + GE_FIRE_OFF);
writel             85 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.bits_per_pixel > 16 ? 3 :
writel             88 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->fix.smem_start, regbase + GE_SRCBASE_OFF);
writel             89 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.xres_virtual - 1, regbase + GE_SRCDISPW_OFF);
writel             90 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.yres_virtual - 1, regbase + GE_SRCDISPH_OFF);
writel             91 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->sx, regbase + GE_SRCAREAX_OFF);
writel             92 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->sy, regbase + GE_SRCAREAY_OFF);
writel             93 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->width - 1, regbase + GE_SRCAREAW_OFF);
writel             94 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->height - 1, regbase + GE_SRCAREAH_OFF);
writel             96 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF);
writel             97 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF);
writel             98 drivers/video/fbdev/wmt_ge_rops.c 	writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF);
writel             99 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->dx, regbase + GE_DESTAREAX_OFF);
writel            100 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->dy, regbase + GE_DESTAREAY_OFF);
writel            101 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->width - 1, regbase + GE_DESTAREAW_OFF);
writel            102 drivers/video/fbdev/wmt_ge_rops.c 	writel(area->height - 1, regbase + GE_DESTAREAH_OFF);
writel            104 drivers/video/fbdev/wmt_ge_rops.c 	writel(0xcc, regbase + GE_ROPCODE_OFF);
writel            105 drivers/video/fbdev/wmt_ge_rops.c 	writel(1, regbase + GE_COMMAND_OFF);
writel            106 drivers/video/fbdev/wmt_ge_rops.c 	writel(1, regbase + GE_FIRE_OFF);
writel            141 drivers/video/fbdev/wmt_ge_rops.c 	writel(1, regbase + GE_ENABLE_OFF);
writel            112 drivers/virtio/virtio_mmio.c 	writel(1, vm_dev->base + VIRTIO_MMIO_DEVICE_FEATURES_SEL);
writel            116 drivers/virtio/virtio_mmio.c 	writel(0, vm_dev->base + VIRTIO_MMIO_DEVICE_FEATURES_SEL);
writel            136 drivers/virtio/virtio_mmio.c 	writel(1, vm_dev->base + VIRTIO_MMIO_DRIVER_FEATURES_SEL);
writel            137 drivers/virtio/virtio_mmio.c 	writel((u32)(vdev->features >> 32),
writel            140 drivers/virtio/virtio_mmio.c 	writel(0, vm_dev->base + VIRTIO_MMIO_DRIVER_FEATURES_SEL);
writel            141 drivers/virtio/virtio_mmio.c 	writel((u32)vdev->features,
writel            219 drivers/virtio/virtio_mmio.c 		writel(le32_to_cpu(l), base + offset);
writel            223 drivers/virtio/virtio_mmio.c 		writel(le32_to_cpu(l), base + offset);
writel            225 drivers/virtio/virtio_mmio.c 		writel(le32_to_cpu(l), base + offset + sizeof l);
writel            256 drivers/virtio/virtio_mmio.c 	writel(status, vm_dev->base + VIRTIO_MMIO_STATUS);
writel            264 drivers/virtio/virtio_mmio.c 	writel(0, vm_dev->base + VIRTIO_MMIO_STATUS);
writel            278 drivers/virtio/virtio_mmio.c 	writel(vq->index, vm_dev->base + VIRTIO_MMIO_QUEUE_NOTIFY);
writel            293 drivers/virtio/virtio_mmio.c 	writel(status, vm_dev->base + VIRTIO_MMIO_INTERRUPT_ACK);
writel            324 drivers/virtio/virtio_mmio.c 	writel(index, vm_dev->base + VIRTIO_MMIO_QUEUE_SEL);
writel            326 drivers/virtio/virtio_mmio.c 		writel(0, vm_dev->base + VIRTIO_MMIO_QUEUE_PFN);
writel            328 drivers/virtio/virtio_mmio.c 		writel(0, vm_dev->base + VIRTIO_MMIO_QUEUE_READY);
writel            363 drivers/virtio/virtio_mmio.c 	writel(index, vm_dev->base + VIRTIO_MMIO_QUEUE_SEL);
writel            394 drivers/virtio/virtio_mmio.c 	writel(virtqueue_get_vring_size(vq), vm_dev->base + VIRTIO_MMIO_QUEUE_NUM);
writel            411 drivers/virtio/virtio_mmio.c 		writel(PAGE_SIZE, vm_dev->base + VIRTIO_MMIO_QUEUE_ALIGN);
writel            412 drivers/virtio/virtio_mmio.c 		writel(q_pfn, vm_dev->base + VIRTIO_MMIO_QUEUE_PFN);
writel            417 drivers/virtio/virtio_mmio.c 		writel((u32)addr, vm_dev->base + VIRTIO_MMIO_QUEUE_DESC_LOW);
writel            418 drivers/virtio/virtio_mmio.c 		writel((u32)(addr >> 32),
writel            422 drivers/virtio/virtio_mmio.c 		writel((u32)addr, vm_dev->base + VIRTIO_MMIO_QUEUE_AVAIL_LOW);
writel            423 drivers/virtio/virtio_mmio.c 		writel((u32)(addr >> 32),
writel            427 drivers/virtio/virtio_mmio.c 		writel((u32)addr, vm_dev->base + VIRTIO_MMIO_QUEUE_USED_LOW);
writel            428 drivers/virtio/virtio_mmio.c 		writel((u32)(addr >> 32),
writel            431 drivers/virtio/virtio_mmio.c 		writel(1, vm_dev->base + VIRTIO_MMIO_QUEUE_READY);
writel            447 drivers/virtio/virtio_mmio.c 		writel(0, vm_dev->base + VIRTIO_MMIO_QUEUE_PFN);
writel            449 drivers/virtio/virtio_mmio.c 		writel(0, vm_dev->base + VIRTIO_MMIO_QUEUE_READY);
writel            587 drivers/virtio/virtio_mmio.c 		writel(PAGE_SIZE, vm_dev->base + VIRTIO_MMIO_GUEST_PAGE_SIZE);
writel            111 drivers/vlynq/vlynq.c 	writel(readl(&dev->local->control) | VLYNQ_CTRL_RESET,
writel            118 drivers/vlynq/vlynq.c 	writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET,
writel            135 drivers/vlynq/vlynq.c 	writel(val, &dev->remote->int_device[virq >> 2]);
writel            148 drivers/vlynq/vlynq.c 	writel(val, &dev->remote->int_device[virq >> 2]);
writel            178 drivers/vlynq/vlynq.c 	writel(val, &dev->remote->int_device[virq >> 2]);
writel            189 drivers/vlynq/vlynq.c 	writel(status, &dev->local->status);
writel            199 drivers/vlynq/vlynq.c 	writel(status, &dev->remote->status);
writel            209 drivers/vlynq/vlynq.c 	writel(status, &dev->local->int_status);
writel            258 drivers/vlynq/vlynq.c 	writel(readl(&dev->local->status), &dev->local->status);
writel            259 drivers/vlynq/vlynq.c 	writel(readl(&dev->remote->status), &dev->remote->status);
writel            266 drivers/vlynq/vlynq.c 	writel(VLYNQ_INT_OFFSET, &dev->local->int_ptr);
writel            267 drivers/vlynq/vlynq.c 	writel(val, &dev->local->control);
writel            272 drivers/vlynq/vlynq.c 	writel(VLYNQ_INT_OFFSET, &dev->remote->int_ptr);
writel            273 drivers/vlynq/vlynq.c 	writel(val, &dev->remote->int_ptr);
writel            274 drivers/vlynq/vlynq.c 	writel(val, &dev->remote->control);
writel            290 drivers/vlynq/vlynq.c 			writel(0, &dev->remote->int_device[virq >> 2]);
writel            389 drivers/vlynq/vlynq.c 		writel((readl(&dev->remote->control) &
writel            394 drivers/vlynq/vlynq.c 		writel((readl(&dev->local->control)
writel            431 drivers/vlynq/vlynq.c 		writel((readl(&dev->local->control) &
writel            463 drivers/vlynq/vlynq.c 	writel((readl(&dev->remote->control) &
writel            467 drivers/vlynq/vlynq.c 	writel((readl(&dev->local->control) &
writel            518 drivers/vlynq/vlynq.c 		writel(VLYNQ_CTRL_CLOCK_INT |
writel            521 drivers/vlynq/vlynq.c 		writel(0, &dev->remote->control);
writel            538 drivers/vlynq/vlynq.c 		writel(0, &dev->local->control);
writel            539 drivers/vlynq/vlynq.c 		writel(VLYNQ_CTRL_CLOCK_INT |
writel            593 drivers/vlynq/vlynq.c 	writel(tx_offset, &dev->local->tx_offset);
writel            595 drivers/vlynq/vlynq.c 		writel(mapping[i].offset, &dev->local->rx_mapping[i].offset);
writel            596 drivers/vlynq/vlynq.c 		writel(mapping[i].size, &dev->local->rx_mapping[i].size);
writel            610 drivers/vlynq/vlynq.c 	writel(tx_offset, &dev->remote->tx_offset);
writel            612 drivers/vlynq/vlynq.c 		writel(mapping[i].offset, &dev->remote->rx_mapping[i].offset);
writel            613 drivers/vlynq/vlynq.c 		writel(mapping[i].size, &dev->remote->rx_mapping[i].size);
writel            108 drivers/w1/masters/omap_hdq.c 	writel(ie & mask, hdq_data->hdq_base + offset);
writel             49 drivers/w1/masters/sgi_w1.c 	writel(MCR_PACK(520, 65), dev->mcr);
writel             66 drivers/w1/masters/sgi_w1.c 		writel(MCR_PACK(6, 13), dev->mcr);
writel             68 drivers/w1/masters/sgi_w1.c 		writel(MCR_PACK(80, 30), dev->mcr);
writel             46 drivers/watchdog/ar7_wdt.c #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))
writel            101 drivers/watchdog/armada_37xx_wdt.c 	writel(val & 0xffffffff, dev->reg + CNTR_COUNT_LOW(id));
writel            102 drivers/watchdog/armada_37xx_wdt.c 	writel(val >> 32, dev->reg + CNTR_COUNT_HIGH(id));
writel            111 drivers/watchdog/armada_37xx_wdt.c 	writel(reg, dev->reg + CNTR_CTRL(id));
writel            120 drivers/watchdog/armada_37xx_wdt.c 	writel(reg, dev->reg + CNTR_CTRL(id));
writel            142 drivers/watchdog/armada_37xx_wdt.c 	writel(reg, dev->reg + CNTR_CTRL(id));
writel            108 drivers/watchdog/aspeed_wdt.c 	writel(0, wdt->base + WDT_CTRL);
writel            109 drivers/watchdog/aspeed_wdt.c 	writel(count, wdt->base + WDT_RELOAD_VALUE);
writel            110 drivers/watchdog/aspeed_wdt.c 	writel(WDT_RESTART_MAGIC, wdt->base + WDT_RESTART);
writel            111 drivers/watchdog/aspeed_wdt.c 	writel(wdt->ctrl, wdt->base + WDT_CTRL);
writel            128 drivers/watchdog/aspeed_wdt.c 	writel(wdt->ctrl, wdt->base + WDT_CTRL);
writel            137 drivers/watchdog/aspeed_wdt.c 	writel(WDT_RESTART_MAGIC, wdt->base + WDT_RESTART);
writel            152 drivers/watchdog/aspeed_wdt.c 	writel(actual * WDT_RATE_1MHZ, wdt->base + WDT_RELOAD_VALUE);
writel            153 drivers/watchdog/aspeed_wdt.c 	writel(WDT_RESTART_MAGIC, wdt->base + WDT_RESTART);
writel            193 drivers/watchdog/aspeed_wdt.c 		writel(WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION,
writel            333 drivers/watchdog/aspeed_wdt.c 		writel(reg, wdt->base + WDT_RESET_WIDTH);
writel            341 drivers/watchdog/aspeed_wdt.c 		writel(reg, wdt->base + WDT_RESET_WIDTH);
writel            367 drivers/watchdog/aspeed_wdt.c 		writel(duration - 1, wdt->base + WDT_RESET_WIDTH);
writel             63 drivers/watchdog/atlas7_wdt.c 	writel(match, wdt->base + ATLAS7_WDT_CNT_MATCH);
writel             74 drivers/watchdog/atlas7_wdt.c 	writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) | ATLAS7_WDT_CNT_EN,
writel             76 drivers/watchdog/atlas7_wdt.c 	writel(1, wdt->base + ATLAS7_WDT_EN);
writel             85 drivers/watchdog/atlas7_wdt.c 	writel(0, wdt->base + ATLAS7_WDT_EN);
writel             86 drivers/watchdog/atlas7_wdt.c 	writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) & ~ATLAS7_WDT_CNT_EN,
writel            159 drivers/watchdog/atlas7_wdt.c 	writel(0, wdt->base + ATLAS7_WDT_CNT_CTRL);
writel             44 drivers/watchdog/bcm7038_wdt.c 	writel(timeout, wdt->base + WDT_TIMEOUT_REG);
writel             51 drivers/watchdog/bcm7038_wdt.c 	writel(WDT_START_1, wdt->base + WDT_CMD_REG);
writel             52 drivers/watchdog/bcm7038_wdt.c 	writel(WDT_START_2, wdt->base + WDT_CMD_REG);
writel             69 drivers/watchdog/bcm7038_wdt.c 	writel(WDT_STOP_1, wdt->base + WDT_CMD_REG);
writel             70 drivers/watchdog/bcm7038_wdt.c 	writel(WDT_STOP_2, wdt->base + WDT_CMD_REG);
writel             87 drivers/watchdog/dw_wdt.c 	writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt->regs +
writel            114 drivers/watchdog/dw_wdt.c 	writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
writel            130 drivers/watchdog/dw_wdt.c 	writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
writel            163 drivers/watchdog/dw_wdt.c 	writel(0, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
writel            165 drivers/watchdog/dw_wdt.c 		writel(WDOG_COUNTER_RESTART_KICK_VALUE,
writel            221 drivers/watchdog/dw_wdt.c 	writel(dw_wdt->timeout, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
writel            222 drivers/watchdog/dw_wdt.c 	writel(dw_wdt->control, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
writel             52 drivers/watchdog/ep93xx_wdt.c 	writel(0xaaaa, priv->mmio + EP93XX_WATCHDOG);
writel             61 drivers/watchdog/ep93xx_wdt.c 	writel(0xaa55, priv->mmio + EP93XX_WATCHDOG);
writel             70 drivers/watchdog/ep93xx_wdt.c 	writel(0x5555, priv->mmio + EP93XX_WATCHDOG);
writel             55 drivers/watchdog/ftwdt010_wdt.c 	writel(wdd->timeout * WDT_CLOCK, gwdt->base + FTWDT010_WDLOAD);
writel             56 drivers/watchdog/ftwdt010_wdt.c 	writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
writel             59 drivers/watchdog/ftwdt010_wdt.c 	writel(enable, gwdt->base + FTWDT010_WDCR);
writel             63 drivers/watchdog/ftwdt010_wdt.c 	writel(enable, gwdt->base + FTWDT010_WDCR);
writel             72 drivers/watchdog/ftwdt010_wdt.c 	writel(0, gwdt->base + FTWDT010_WDCR);
writel             81 drivers/watchdog/ftwdt010_wdt.c 	writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
writel            155 drivers/watchdog/ftwdt010_wdt.c 		writel(reg, gwdt->base + FTWDT010_WDCR);
writel            185 drivers/watchdog/ftwdt010_wdt.c 	writel(reg, gwdt->base + FTWDT010_WDCR);
writel            198 drivers/watchdog/ftwdt010_wdt.c 		writel(reg, gwdt->base + FTWDT010_WDCR);
writel            170 drivers/watchdog/i6300esb.c 	writel(val, ESB_TIMER1_REG(edev));
writel            174 drivers/watchdog/i6300esb.c 	writel(val, ESB_TIMER2_REG(edev));
writel            209 drivers/watchdog/iTCO_wdt.c 	writel(val32, p->gcs_pmc);
writel             93 drivers/watchdog/imgpdc_wdt.c 	writel(PDC_WDT_TICKLE1_MAGIC, wdt->base + PDC_WDT_TICKLE1);
writel             94 drivers/watchdog/imgpdc_wdt.c 	writel(PDC_WDT_TICKLE2_MAGIC, wdt->base + PDC_WDT_TICKLE2);
writel            106 drivers/watchdog/imgpdc_wdt.c 	writel(val, wdt->base + PDC_WDT_CONFIG);
writel            121 drivers/watchdog/imgpdc_wdt.c 	writel(val, wdt->base + PDC_WDT_CONFIG);
writel            146 drivers/watchdog/imgpdc_wdt.c 	writel(val, wdt->base + PDC_WDT_CONFIG);
writel            157 drivers/watchdog/imgpdc_wdt.c 	writel(0x1, wdt->base + PDC_WDT_SOFT_RESET);
writel             54 drivers/watchdog/imx7ulp_wdt.c 	writel(UNLOCK, base + WDOG_CNT);
writel             56 drivers/watchdog/imx7ulp_wdt.c 		writel(val | WDOG_CS_EN, base + WDOG_CS);
writel             58 drivers/watchdog/imx7ulp_wdt.c 		writel(val & ~WDOG_CS_EN, base + WDOG_CS);
writel             72 drivers/watchdog/imx7ulp_wdt.c 	writel(REFRESH, wdt->base + WDOG_CNT);
writel            101 drivers/watchdog/imx7ulp_wdt.c 	writel(UNLOCK, wdt->base + WDOG_CNT);
writel            102 drivers/watchdog/imx7ulp_wdt.c 	writel(val, wdt->base + WDOG_TOVAL);
writel            148 drivers/watchdog/imx7ulp_wdt.c 	writel(timeout, base + WDOG_TOVAL);
writel            151 drivers/watchdog/imx7ulp_wdt.c 	writel(val, base + WDOG_CS);
writel             31 drivers/watchdog/loongson1_wdt.c 	writel(0x1, drvdata->base + WDT_SET);
writel             46 drivers/watchdog/loongson1_wdt.c 	writel(counts, drvdata->base + WDT_TIMER);
writel             55 drivers/watchdog/loongson1_wdt.c 	writel(0x1, drvdata->base + WDT_EN);
writel             64 drivers/watchdog/loongson1_wdt.c 	writel(0x0, drvdata->base + WDT_EN);
writel             71 drivers/watchdog/lpc18xx_wdt.c 	writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
writel             72 drivers/watchdog/lpc18xx_wdt.c 	writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
writel            109 drivers/watchdog/lpc18xx_wdt.c 	writel(val, lpc18xx_wdt->base + LPC18XX_WDT_TC);
writel            143 drivers/watchdog/lpc18xx_wdt.c 	writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD);
writel            170 drivers/watchdog/lpc18xx_wdt.c 	writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD);
writel            172 drivers/watchdog/lpc18xx_wdt.c 	writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
writel            173 drivers/watchdog/lpc18xx_wdt.c 	writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
writel            175 drivers/watchdog/lpc18xx_wdt.c 	writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
writel            176 drivers/watchdog/lpc18xx_wdt.c 	writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
writel             42 drivers/watchdog/meson_gxbb_wdt.c 	writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN,
writel             52 drivers/watchdog/meson_gxbb_wdt.c 	writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN,
writel             62 drivers/watchdog/meson_gxbb_wdt.c 	writel(0, data->reg_base + GXBB_WDT_RSET_REG);
writel             80 drivers/watchdog/meson_gxbb_wdt.c 	writel(tcnt, data->reg_base + GXBB_WDT_TCNT_REG);
writel            181 drivers/watchdog/meson_gxbb_wdt.c 	writel(((clk_get_rate(data->clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |
writel             70 drivers/watchdog/meson_wdt.c 		writel(tc_reboot, meson_wdt->wdt_base + MESON_WDT_TC);
writel             81 drivers/watchdog/meson_wdt.c 	writel(0, meson_wdt->wdt_base + MESON_WDT_RESET);
writel             95 drivers/watchdog/meson_wdt.c 	writel(reg, meson_wdt->wdt_base + MESON_WDT_TC);
writel            116 drivers/watchdog/meson_wdt.c 	writel(reg, meson_wdt->wdt_base + MESON_WDT_TC);
writel            131 drivers/watchdog/meson_wdt.c 	writel(reg, meson_wdt->wdt_base + MESON_WDT_TC);
writel             40 drivers/watchdog/moxart_wdt.c 	writel(1, moxart_wdt->base + REG_COUNT);
writel             41 drivers/watchdog/moxart_wdt.c 	writel(0x5ab9, moxart_wdt->base + REG_MODE);
writel             42 drivers/watchdog/moxart_wdt.c 	writel(0x03, moxart_wdt->base + REG_ENABLE);
writel             51 drivers/watchdog/moxart_wdt.c 	writel(0, moxart_wdt->base + REG_ENABLE);
writel             60 drivers/watchdog/moxart_wdt.c 	writel(moxart_wdt->clock_frequency * wdt_dev->timeout,
writel             62 drivers/watchdog/moxart_wdt.c 	writel(0x5ab9, moxart_wdt->base + REG_MODE);
writel             63 drivers/watchdog/moxart_wdt.c 	writel(0x03, moxart_wdt->base + REG_ENABLE);
writel             67 drivers/watchdog/mtk_wdt.c 		writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
writel             81 drivers/watchdog/mv64x60_wdt.c 		writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
writel             84 drivers/watchdog/mv64x60_wdt.c 		writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
writel             59 drivers/watchdog/npcm_wdt.c 	writel(val | NPCM_WTR, wdt->reg);
writel             92 drivers/watchdog/npcm_wdt.c 	writel(val, wdt->reg);
writel            101 drivers/watchdog/npcm_wdt.c 	writel(0, wdt->reg);
writel            151 drivers/watchdog/npcm_wdt.c 	writel(NPCM_WTR | NPCM_WTRE | NPCM_WTE, wdt->reg);
writel            189 drivers/watchdog/orion_wdt.c 	writel(dev->clk_rate * wdt_dev->timeout,
writel            192 drivers/watchdog/orion_wdt.c 		writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout),
writel            204 drivers/watchdog/orion_wdt.c 	writel(dev->clk_rate * wdt_dev->timeout,
writel            207 drivers/watchdog/orion_wdt.c 		writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout),
writel            222 drivers/watchdog/orion_wdt.c 	writel(reg, dev->rstout);
writel            234 drivers/watchdog/orion_wdt.c 	writel(dev->clk_rate * wdt_dev->timeout,
writel            247 drivers/watchdog/orion_wdt.c 	writel(reg, dev->rstout);
writel            256 drivers/watchdog/orion_wdt.c 	writel(dev->clk_rate * wdt_dev->timeout,
writel            301 drivers/watchdog/orion_wdt.c 	writel(reg, dev->rstout);
writel            320 drivers/watchdog/orion_wdt.c 	writel(reg, dev->rstout);
writel             50 drivers/watchdog/pic32-dmt.c 	writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG));
writel             55 drivers/watchdog/pic32-dmt.c 	writel(DMT_ON, PIC32_CLR(dmt->regs + DMTCON_REG));
writel             81 drivers/watchdog/pic32-dmt.c 	writel(DMT_STEP1_KEY << 8, dmt->regs + DMTPRECLR_REG);
writel             91 drivers/watchdog/pic32-dmt.c 	writel(DMT_STEP2_KEY, dmt->regs + DMTCLR_REG);
writel            119 drivers/watchdog/pic32-dmt.c 	writel(RESETCON_DMT_TIMEOUT, PIC32_CLR(rst_base));
writel             68 drivers/watchdog/pic32-wdt.c 	writel(RESETCON_WDT_TIMEOUT, PIC32_CLR(wdt->rst_base));
writel            111 drivers/watchdog/pic32-wdt.c 	writel(WDTCON_ON, PIC32_SET(wdt->regs + WDTCON_REG));
writel            121 drivers/watchdog/pic32-wdt.c 	writel(WDTCON_ON, PIC32_CLR(wdt->regs + WDTCON_REG));
writel             88 drivers/watchdog/pnx4008_wdt.c 	writel(RESET_COUNT, WDTIM_CTRL(wdt_base));
writel             93 drivers/watchdog/pnx4008_wdt.c 	writel(M_RES2 | STOP_COUNT0 | RESET_COUNT0, WDTIM_MCTRL(wdt_base));
writel             95 drivers/watchdog/pnx4008_wdt.c 	writel(MATCH_OUTPUT_HIGH, WDTIM_EMR(wdt_base));
writel             97 drivers/watchdog/pnx4008_wdt.c 	writel(MATCH_INT, WDTIM_INT(wdt_base));
writel             99 drivers/watchdog/pnx4008_wdt.c 	writel(0xFFFF, WDTIM_PULSE(wdt_base));
writel            100 drivers/watchdog/pnx4008_wdt.c 	writel(wdd->timeout * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base));
writel            102 drivers/watchdog/pnx4008_wdt.c 	writel(COUNT_ENAB | DEBUG_EN, WDTIM_CTRL(wdt_base));
writel            112 drivers/watchdog/pnx4008_wdt.c 	writel(0, WDTIM_CTRL(wdt_base));	/*stop counter */
writel            145 drivers/watchdog/pnx4008_wdt.c 		writel(EXT_MATCH0, WDTIM_EMR(wdt_base));
writel            147 drivers/watchdog/pnx4008_wdt.c 		writel(M_RES1, WDTIM_MCTRL(wdt_base));
writel            150 drivers/watchdog/pnx4008_wdt.c 		writel(13000, WDTIM_PULSE(wdt_base));
writel            151 drivers/watchdog/pnx4008_wdt.c 		writel(M_RES2 | RESFRC1 | RESFRC2, WDTIM_MCTRL(wdt_base));
writel             85 drivers/watchdog/qcom-wdt.c 	writel(0, wdt_addr(wdt, WDT_EN));
writel             86 drivers/watchdog/qcom-wdt.c 	writel(1, wdt_addr(wdt, WDT_RST));
writel             87 drivers/watchdog/qcom-wdt.c 	writel(bark * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME));
writel             88 drivers/watchdog/qcom-wdt.c 	writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME));
writel             89 drivers/watchdog/qcom-wdt.c 	writel(qcom_get_enable(wdd), wdt_addr(wdt, WDT_EN));
writel             97 drivers/watchdog/qcom-wdt.c 	writel(0, wdt_addr(wdt, WDT_EN));
writel            105 drivers/watchdog/qcom-wdt.c 	writel(1, wdt_addr(wdt, WDT_RST));
writel            135 drivers/watchdog/qcom-wdt.c 	writel(0, wdt_addr(wdt, WDT_EN));
writel            136 drivers/watchdog/qcom-wdt.c 	writel(1, wdt_addr(wdt, WDT_RST));
writel            137 drivers/watchdog/qcom-wdt.c 	writel(timeout, wdt_addr(wdt, WDT_BARK_TIME));
writel            138 drivers/watchdog/qcom-wdt.c 	writel(timeout, wdt_addr(wdt, WDT_BITE_TIME));
writel            139 drivers/watchdog/qcom-wdt.c 	writel(QCOM_WDT_ENABLE, wdt_addr(wdt, WDT_EN));
writel             69 drivers/watchdog/rc32434_wdt.c 	writel((readl(&addr) | or) & ~nand, &addr)
writel             81 drivers/watchdog/rc32434_wdt.c 	writel(SEC2WTCOMP(timeout), &wdt_reg->wtcompare);
writel             94 drivers/watchdog/rc32434_wdt.c 	writel(0, &wdt_reg->wtcount);
writel            133 drivers/watchdog/rc32434_wdt.c 	writel(0, &wdt_reg->wtcount);
writel             41 drivers/watchdog/rtd119x_wdt.c 	writel(val, data->base + RTD119X_TCWCR);
writel             54 drivers/watchdog/rtd119x_wdt.c 	writel(val, data->base + RTD119X_TCWCR);
writel             72 drivers/watchdog/rtd119x_wdt.c 	writel(val * clk_get_rate(data->clk), data->base + RTD119X_TCWOV);
writel            237 drivers/watchdog/s3c2410_wdt.c 	writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
writel            249 drivers/watchdog/s3c2410_wdt.c 	writel(wtcon, wdt->reg_base + S3C2410_WTCON);
writel            286 drivers/watchdog/s3c2410_wdt.c 	writel(wdt->count, wdt->reg_base + S3C2410_WTDAT);
writel            287 drivers/watchdog/s3c2410_wdt.c 	writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
writel            288 drivers/watchdog/s3c2410_wdt.c 	writel(wtcon, wdt->reg_base + S3C2410_WTCON);
writel            342 drivers/watchdog/s3c2410_wdt.c 	writel(count, wdt->reg_base + S3C2410_WTDAT);
writel            343 drivers/watchdog/s3c2410_wdt.c 	writel(wtcon, wdt->reg_base + S3C2410_WTCON);
writel            357 drivers/watchdog/s3c2410_wdt.c 	writel(0, wdt_base + S3C2410_WTCON);
writel            360 drivers/watchdog/s3c2410_wdt.c 	writel(0x80, wdt_base + S3C2410_WTCNT);
writel            361 drivers/watchdog/s3c2410_wdt.c 	writel(0x80, wdt_base + S3C2410_WTDAT);
writel            364 drivers/watchdog/s3c2410_wdt.c 	writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV16 |
writel            408 drivers/watchdog/s3c2410_wdt.c 		writel(0x1, wdt->reg_base + S3C2410_WTCLRINT);
writel            707 drivers/watchdog/s3c2410_wdt.c 	writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTDAT);
writel            708 drivers/watchdog/s3c2410_wdt.c 	writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */
writel            709 drivers/watchdog/s3c2410_wdt.c 	writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON);
writel            126 drivers/watchdog/sbsa_gwdt.c 		writel(gwdt->clk * timeout,
writel            134 drivers/watchdog/sbsa_gwdt.c 		writel(gwdt->clk / 2 * timeout,
writel            170 drivers/watchdog/sbsa_gwdt.c 	writel(0, gwdt->refresh_base + SBSA_GWDT_WRR);
writel            180 drivers/watchdog/sbsa_gwdt.c 	writel(SBSA_GWDT_WCS_EN, gwdt->control_base + SBSA_GWDT_WCS);
writel            190 drivers/watchdog/sbsa_gwdt.c 	writel(0, gwdt->control_base + SBSA_GWDT_WCS);
writel            278 drivers/watchdog/sbsa_gwdt.c 			writel(0, rf_base + SBSA_GWDT_WRR);
writel             71 drivers/watchdog/sirfsoc_wdt.c 	writel(1, wdt_base + SIRFSOC_TIMER_LATCH);
writel             78 drivers/watchdog/sirfsoc_wdt.c 	writel(counter, wdt_base +
writel             93 drivers/watchdog/sirfsoc_wdt.c 	writel(readl(wdt_base + SIRFSOC_TIMER_INT_EN)
writel             96 drivers/watchdog/sirfsoc_wdt.c 	writel(1, wdt_base + SIRFSOC_TIMER_WATCHDOG_EN);
writel            105 drivers/watchdog/sirfsoc_wdt.c 	writel(0, wdt_base + SIRFSOC_TIMER_WATCHDOG_EN);
writel            106 drivers/watchdog/sirfsoc_wdt.c 	writel(readl(wdt_base + SIRFSOC_TIMER_INT_EN)
writel             99 drivers/watchdog/sp5100_tco.c 	writel(val, SP5100_WDT_CONTROL(tco->tcobase));
writel            111 drivers/watchdog/sp5100_tco.c 	writel(val, SP5100_WDT_CONTROL(tco->tcobase));
writel            123 drivers/watchdog/sp5100_tco.c 	writel(val, SP5100_WDT_CONTROL(tco->tcobase));
writel            134 drivers/watchdog/sp5100_tco.c 	writel(t, SP5100_WDT_COUNT(tco->tcobase));
writel            340 drivers/watchdog/sp5100_tco.c 	writel(val, SP5100_WDT_CONTROL(tco->tcobase));
writel             94 drivers/watchdog/sunxi_wdt.c 	writel(val, wdt_base + regs->wdt_cfg);
writel            100 drivers/watchdog/sunxi_wdt.c 	writel(val, wdt_base + regs->wdt_mode);
writel            106 drivers/watchdog/sunxi_wdt.c 	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
writel            112 drivers/watchdog/sunxi_wdt.c 		writel(val, wdt_base + regs->wdt_mode);
writel            123 drivers/watchdog/sunxi_wdt.c 	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
writel            144 drivers/watchdog/sunxi_wdt.c 	writel(reg, wdt_base + regs->wdt_mode);
writel            157 drivers/watchdog/sunxi_wdt.c 	writel(0, wdt_base + regs->wdt_mode);
writel            179 drivers/watchdog/sunxi_wdt.c 	writel(reg, wdt_base + regs->wdt_cfg);
writel            184 drivers/watchdog/sunxi_wdt.c 	writel(reg, wdt_base + regs->wdt_mode);
writel             61 drivers/watchdog/tangox_wdt.c 	writel(ticks, dev->base + WD_COUNTER);
writel             70 drivers/watchdog/tangox_wdt.c 	writel(0, dev->base + WD_COUNTER);
writel             98 drivers/watchdog/tangox_wdt.c 	writel(1, dev->base + WD_COUNTER);
writel            163 drivers/watchdog/tangox_wdt.c 		writel(0, dev->base + WD_COUNTER);
writel            165 drivers/watchdog/tangox_wdt.c 	writel(WD_CONFIG_XTAL_IN, dev->base + WD_CONFIG);
writel             91 drivers/watchdog/tegra_wdt.c 	writel(val, wdt->tmr_regs + TIMER_PTV);
writel            103 drivers/watchdog/tegra_wdt.c 	writel(val, wdt->wdt_regs + WDT_CFG);
writel            105 drivers/watchdog/tegra_wdt.c 	writel(WDT_CMD_START_COUNTER, wdt->wdt_regs + WDT_CMD);
writel            114 drivers/watchdog/tegra_wdt.c 	writel(WDT_UNLOCK_PATTERN, wdt->wdt_regs + WDT_UNLOCK);
writel            115 drivers/watchdog/tegra_wdt.c 	writel(WDT_CMD_DISABLE_COUNTER, wdt->wdt_regs + WDT_CMD);
writel            116 drivers/watchdog/tegra_wdt.c 	writel(0, wdt->tmr_regs + TIMER_PTV);
writel            125 drivers/watchdog/tegra_wdt.c 	writel(WDT_CMD_START_COUNTER, wdt->wdt_regs + WDT_CMD);
writel             79 drivers/watchdog/via_wdt.c 	writel(ctl | VIA_WDT_TRIGGER, wdt_mem);
writel            112 drivers/watchdog/via_wdt.c 	writel(wdd->timeout, wdt_mem + VIA_WDT_COUNT);
writel            113 drivers/watchdog/via_wdt.c 	writel(ctl | VIA_WDT_RUNNING | VIA_WDT_TRIGGER, wdt_mem);
writel            123 drivers/watchdog/via_wdt.c 	writel(ctl & ~VIA_WDT_RUNNING, wdt_mem);
writel            130 drivers/watchdog/via_wdt.c 	writel(new_timeout, wdt_mem + VIA_WDT_COUNT);
writel             36 include/asm-generic/ide_iops.h 		writel(*(u32 *)addr, port);
writel            220 include/asm-generic/io.h #ifndef writel
writel            221 include/asm-generic/io.h #define writel writel
writel            738 include/asm-generic/io.h 	writel(value, addr);
writel            790 include/asm-generic/io.h 	writel(swab32(value), addr);
writel             26 include/drm/drm_os_linux.h #define DRM_WRITE32(map, offset, val)	writel(val, ((void __iomem *)(map)->handle) + (offset))
writel             56 include/linux/amba/sp810.h 	writel(0x2, base + SCCTRL);
writel             59 include/linux/amba/sp810.h 	writel(0, base + SCSYSSTAT);
writel             99 include/linux/cyclades.h #define cy_writel(port,val)     do { writel((val), (port)); mb(); } while (0)
writel             16 include/linux/goldfish.h 	writel(lower_32_bits(addr), portl);
writel             18 include/linux/goldfish.h 	writel(upper_32_bits(addr), porth);
writel             26 include/linux/goldfish.h 	writel(lower_32_bits(addr), portl);
writel             28 include/linux/goldfish.h 	writel(upper_32_bits(addr), porth);
writel            124 include/linux/intel-iommu.h #define dmar_writel(a, v) writel(v, a)
writel             21 include/linux/io-64-nonatomic-hi-lo.h 	writel(val >> 32, addr + 4);
writel             22 include/linux/io-64-nonatomic-hi-lo.h 	writel(val, addr);
writel             21 include/linux/io-64-nonatomic-lo-hi.h 	writel(val, addr);
writel             22 include/linux/io-64-nonatomic-lo-hi.h 	writel(val >> 32, addr + 4);
writel           1166 include/linux/irq.h 		writel(val, gc->reg_base + reg_offset);
writel            461 include/linux/qed/qed_if.h #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \
writel             48 include/linux/reset/bcm63xx_pmb.h 	writel(cmd, master + PMB_CTRL);
writel             82 include/linux/reset/bcm63xx_pmb.h 	writel(val, master + PMB_WR_DATA);
writel            169 include/linux/sm501.h #define smc501_writel(val, addr)	writel(val, addr)
writel             22 include/media/drv-intf/saa7146.h #define saa7146_write(sxy,adr,dat)    writel((dat),(sxy->mem+(adr)))
writel             50 include/sound/aess.h 	writel(v, base + AESS_AUTO_GATING_ENABLE_OFFSET);
writel            448 include/sound/hdaudio.h #define snd_hdac_reg_writel(bus, addr, val)	writel(val, addr)
writel            136 include/sound/hdaudio_ext.h 	writel(((readl(addr + reg) & ~(mask)) | (val)), \
writel            230 include/video/tgafb.h 	writel(v, par->tga_regs_base +r);
writel            185 lib/iomap.c    #define mmio_write32be(val,port) writel(swab32(val),port)
writel            203 lib/iomap.c    	IO_COND(addr, outl(val,port), writel(val, addr));
writel             30 lib/stmp_device.c 	writel(mask, addr + STMP_OFFSET_REG_CLR);
writel             49 lib/stmp_device.c 	writel(STMP_MODULE_CLKGATE, reset_addr + STMP_OFFSET_REG_CLR);
writel             52 lib/stmp_device.c 	writel(STMP_MODULE_SFTRST, reset_addr + STMP_OFFSET_REG_SET);
writel             51 sound/arm/aaci.c 		writel(maincr, aaci->base + AACI_MAINCR);
writel             84 sound/arm/aaci.c 	writel(val << 4, aaci->base + AACI_SL2TX);
writel             85 sound/arm/aaci.c 	writel(reg << 12, aaci->base + AACI_SL1TX);
writel            123 sound/arm/aaci.c 	writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
writel            200 sound/arm/aaci.c 		writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
writel            205 sound/arm/aaci.c 		writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
writel            215 sound/arm/aaci.c 			writel(0, aacirun->base + AACI_IE);
writel            265 sound/arm/aaci.c 		writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
writel            275 sound/arm/aaci.c 			writel(0, aacirun->base + AACI_IE);
writel            576 sound/arm/aaci.c 	writel(ie, aacirun->base + AACI_IE);
writel            579 sound/arm/aaci.c 	writel(aacirun->cr, aacirun->base + AACI_TXCR);
writel            591 sound/arm/aaci.c 	writel(ie, aacirun->base + AACI_IE);
writel            592 sound/arm/aaci.c 	writel(aacirun->cr, aacirun->base + AACI_TXCR);
writel            654 sound/arm/aaci.c 	writel(ie, aacirun->base+AACI_IE);
writel            658 sound/arm/aaci.c 	writel(aacirun->cr, aacirun->base + AACI_RXCR);
writel            673 sound/arm/aaci.c 	writel(aacirun->cr, aacirun->base + AACI_RXCR);
writel            677 sound/arm/aaci.c 	writel(ie, aacirun->base + AACI_IE);
writel            841 sound/arm/aaci.c 	writel(0, aaci->base + AACI_RESET);
writel            843 sound/arm/aaci.c 	writel(RESET_NRST, aaci->base + AACI_RESET);
writel            957 sound/arm/aaci.c 	writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
writel            960 sound/arm/aaci.c 		writel(0, aacirun->fifo);
writel            962 sound/arm/aaci.c 	writel(0, aacirun->base + AACI_TXCR);
writel            969 sound/arm/aaci.c 	writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
writel            972 sound/arm/aaci.c 	writel(aaci->maincr, aaci->base + AACI_MAINCR);
writel           1023 sound/arm/aaci.c 		writel(0, base + AACI_IE);
writel           1024 sound/arm/aaci.c 		writel(0, base + AACI_TXCR);
writel           1025 sound/arm/aaci.c 		writel(0, base + AACI_RXCR);
writel           1028 sound/arm/aaci.c 	writel(0x1fff, aaci->base + AACI_INTCLR);
writel           1029 sound/arm/aaci.c 	writel(aaci->maincr, aaci->base + AACI_MAINCR);
writel           1076 sound/arm/aaci.c 		writel(0, aaci->base + AACI_MAINCR);
writel            272 sound/atmel/ac97c.c 	writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
writel            273 sound/atmel/ac97c.c 	writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
writel            274 sound/atmel/ac97c.c 	writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_TNPR);
writel            275 sound/atmel/ac97c.c 	writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
writel            354 sound/atmel/ac97c.c 	writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
writel            355 sound/atmel/ac97c.c 	writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
writel            356 sound/atmel/ac97c.c 	writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_RNPR);
writel            357 sound/atmel/ac97c.c 	writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
writel            389 sound/atmel/ac97c.c 	writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
writel            421 sound/atmel/ac97c.c 	writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
writel            513 sound/atmel/ac97c.c 			writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_TNPR);
writel            514 sound/atmel/ac97c.c 			writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
writel            531 sound/atmel/ac97c.c 			writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_RNPR);
writel            532 sound/atmel/ac97c.c 			writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
writel            179 sound/hda/ext/hdac_ext_stream.c 	writel(val, stream->pplc_addr + AZX_REG_PPLCCTL);
writel            210 sound/hda/ext/hdac_ext_stream.c 	writel(val, stream->pplc_addr + AZX_REG_PPLCCTL);
writel            442 sound/hda/ext/hdac_ext_stream.c 	writel(value, stream->spib_addr);
writel            525 sound/hda/ext/hdac_ext_stream.c 	writel(value, stream->dpibr_addr);
writel            245 sound/hda/hdac_bus.c 	writel(v, aligned_addr);
writel            359 sound/isa/msnd/msnd_pinnacle.c 	writel(0x00010000, chip->SMA + SMA_dwCurrPlayPitch);
writel            360 sound/isa/msnd/msnd_pinnacle.c 	writel(0x00000001, chip->SMA + SMA_dwCurrPlayRate);
writel            118 sound/pci/ad1889.c 	writel(val, chip->iobase + reg);
writel            309 sound/pci/atiixp.c 	writel(data, addr);
writel            317 sound/pci/atiixp.c 	writel(value, chip->remap_addr + ATI_REG_##reg)
writel            368 sound/pci/atiixp.c 	writel(0, chip->remap_addr + dma->ops->llp_offset);
writel            390 sound/pci/atiixp.c 	writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
writel            406 sound/pci/atiixp.c 		writel(0, chip->remap_addr + dma->ops->llp_offset);
writel            724 sound/pci/atiixp.c 			writel(dma->saved_curptr, chip->remap_addr +
writel           1500 sound/pci/atiixp.c 				writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
writel            277 sound/pci/atiixp_modem.c 	writel(data, addr);
writel            285 sound/pci/atiixp_modem.c 	writel(value, chip->remap_addr + ATI_REG_##reg)
writel            335 sound/pci/atiixp_modem.c 	writel(0, chip->remap_addr + dma->ops->llp_offset);
writel            357 sound/pci/atiixp_modem.c 	writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
writel            374 sound/pci/atiixp_modem.c 		writel(0, chip->remap_addr + dma->ops->llp_offset);
writel             27 sound/pci/au88x0/au88x0.h #define	hwwrite(x,y,z) writel((z),(x)+(y))
writel             28 sound/pci/aw2/aw2-saa7146.c #define WRITEREG(value, addr) writel((value), chip->base_addr + (addr))
writel            210 sound/pci/bt87x.c 	writel(value, chip->mmio + reg);
writel            502 sound/pci/cs4281.c         writel(val, chip->ba0 + offset);
writel           1875 sound/pci/cs4281.c 	writel((unsigned int)cmd, port);
writel           1878 sound/pci/cs4281.c 	writel((unsigned int)val, port + 4);
writel            320 sound/pci/cs46xx/cs46xx_lib.c 		writel(*src++, dst);
writel            483 sound/pci/cs46xx/cs46xx_lib.c 		writel(0, dst);
writel             55 sound/pci/cs46xx/cs46xx_lib.h 	writel(val, chip->region.idx[bank+1].remap_addr + offset);
writel             67 sound/pci/cs46xx/cs46xx_lib.h 	writel(val, chip->region.name.ba0.remap_addr + offset);
writel            877 sound/pci/cs46xx/dsp_spos.c 		writel(task_data[i],spdst);
writel            891 sound/pci/cs46xx/dsp_spos.c 		writel(scb_data[i],spdst);
writel            155 sound/pci/cs46xx/dsp_spos_scb_lib.c 		writel(0, dst);
writel           1867 sound/pci/ctxfi/cthw20k1.c 	writel(CTLX, (mem_base + UAA_CORE_CHANGE));
writel           1868 sound/pci/ctxfi/cthw20k1.c 	writel(CTL_, (mem_base + UAA_CORE_CHANGE));
writel           1869 sound/pci/ctxfi/cthw20k1.c 	writel(CTLF, (mem_base + UAA_CORE_CHANGE));
writel           1870 sound/pci/ctxfi/cthw20k1.c 	writel(CTLi, (mem_base + UAA_CORE_CHANGE));
writel           2216 sound/pci/ctxfi/cthw20k2.c 	writel(data, hw->mem_base + reg);
writel            466 sound/pci/echoaudio/echoaudio.h 	writel(value, &chip->dsp_registers[index]);
writel            531 sound/pci/hda/hda_intel.c 	writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
writel            574 sound/pci/hda/hda_intel.c 	writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
writel             87 sound/pci/hda/hda_tegra.c 	writel(v, hda->regs + HDA_IPFS_CONFIG);
writel             94 sound/pci/hda/hda_tegra.c 	writel(v, hda->regs + HDA_CFG_CMD);
writel             96 sound/pci/hda/hda_tegra.c 	writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
writel             97 sound/pci/hda/hda_tegra.c 	writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
writel             98 sound/pci/hda/hda_tegra.c 	writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
writel            102 sound/pci/hda/hda_tegra.c 	writel(v, hda->regs + HDA_IPFS_INTR_MASK);
writel           3260 sound/pci/hda/patch_ca0132.c 	writel(0x0000007e, spec->mem_base + 0x210);
writel           3262 sound/pci/hda/patch_ca0132.c 	writel(0x0000005a, spec->mem_base + 0x210);
writel           3266 sound/pci/hda/patch_ca0132.c 	writel(0x00800005, spec->mem_base + 0x20c);
writel           3267 sound/pci/hda/patch_ca0132.c 	writel(group, spec->mem_base + 0x804);
writel           3269 sound/pci/hda/patch_ca0132.c 	writel(0x00800005, spec->mem_base + 0x20c);
writel           3274 sound/pci/hda/patch_ca0132.c 	writel(write_val, spec->mem_base + 0x204);
writel           3284 sound/pci/hda/patch_ca0132.c 	writel(0x00800004, spec->mem_base + 0x20c);
writel           3285 sound/pci/hda/patch_ca0132.c 	writel(0x00000000, spec->mem_base + 0x210);
writel           3299 sound/pci/hda/patch_ca0132.c 	writel(0x0000007e, spec->mem_base + 0x210);
writel           3301 sound/pci/hda/patch_ca0132.c 	writel(0x0000005a, spec->mem_base + 0x210);
writel           3305 sound/pci/hda/patch_ca0132.c 	writel(0x00800003, spec->mem_base + 0x20c);
writel           3306 sound/pci/hda/patch_ca0132.c 	writel(group, spec->mem_base + 0x804);
writel           3308 sound/pci/hda/patch_ca0132.c 	writel(0x00800005, spec->mem_base + 0x20c);
writel           3313 sound/pci/hda/patch_ca0132.c 	writel(write_val, spec->mem_base + 0x204);
writel           3319 sound/pci/hda/patch_ca0132.c 	writel(0x00800004, spec->mem_base + 0x20c);
writel           3320 sound/pci/hda/patch_ca0132.c 	writel(0x00000000, spec->mem_base + 0x210);
writel           8051 sound/pci/hda/patch_ca0132.c 	writel(0x00820680, spec->mem_base + 0x01C);
writel           8052 sound/pci/hda/patch_ca0132.c 	writel(0x00820680, spec->mem_base + 0x01C);
writel           8109 sound/pci/hda/patch_ca0132.c 		writel(0x00000001, spec->mem_base + 0x400);
writel           8111 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x400);
writel           8114 sound/pci/hda/patch_ca0132.c 		writel(0x00000001, spec->mem_base + 0x408);
writel           8116 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x408);
writel           8119 sound/pci/hda/patch_ca0132.c 		writel(0x00000001, spec->mem_base + 0x40c);
writel           8121 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x40C);
writel           8124 sound/pci/hda/patch_ca0132.c 		writel(0x00880640, spec->mem_base + 0x01C);
writel           8126 sound/pci/hda/patch_ca0132.c 		writel(0x00880680, spec->mem_base + 0x01C);
writel           8129 sound/pci/hda/patch_ca0132.c 		writel(0x00000080, spec->mem_base + 0xC0C);
writel           8131 sound/pci/hda/patch_ca0132.c 		writel(0x00000083, spec->mem_base + 0xC0C);
writel           8133 sound/pci/hda/patch_ca0132.c 	writel(0x00000030, spec->mem_base + 0xC00);
writel           8134 sound/pci/hda/patch_ca0132.c 	writel(0x00000000, spec->mem_base + 0xC04);
writel           8137 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0xC0C);
writel           8139 sound/pci/hda/patch_ca0132.c 		writel(0x00000003, spec->mem_base + 0xC0C);
writel           8141 sound/pci/hda/patch_ca0132.c 	writel(0x00000003, spec->mem_base + 0xC0C);
writel           8142 sound/pci/hda/patch_ca0132.c 	writel(0x00000003, spec->mem_base + 0xC0C);
writel           8143 sound/pci/hda/patch_ca0132.c 	writel(0x00000003, spec->mem_base + 0xC0C);
writel           8146 sound/pci/hda/patch_ca0132.c 		writel(0x00000001, spec->mem_base + 0xC08);
writel           8148 sound/pci/hda/patch_ca0132.c 		writel(0x000000C1, spec->mem_base + 0xC08);
writel           8150 sound/pci/hda/patch_ca0132.c 	writel(0x000000F1, spec->mem_base + 0xC08);
writel           8151 sound/pci/hda/patch_ca0132.c 	writel(0x00000001, spec->mem_base + 0xC08);
writel           8152 sound/pci/hda/patch_ca0132.c 	writel(0x000000C7, spec->mem_base + 0xC08);
writel           8153 sound/pci/hda/patch_ca0132.c 	writel(0x000000C1, spec->mem_base + 0xC08);
writel           8154 sound/pci/hda/patch_ca0132.c 	writel(0x00000080, spec->mem_base + 0xC04);
writel           8157 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x42c);
writel           8158 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x46c);
writel           8159 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x4ac);
writel           8160 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x4ec);
writel           8161 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x43c);
writel           8162 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x47c);
writel           8163 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x4bc);
writel           8164 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x4fc);
writel           8165 sound/pci/hda/patch_ca0132.c 		writel(0x00000600, spec->mem_base + 0x100);
writel           8166 sound/pci/hda/patch_ca0132.c 		writel(0x00000014, spec->mem_base + 0x410);
writel           8167 sound/pci/hda/patch_ca0132.c 		writel(0x0000060f, spec->mem_base + 0x100);
writel           8168 sound/pci/hda/patch_ca0132.c 		writel(0x0000070f, spec->mem_base + 0x100);
writel           8169 sound/pci/hda/patch_ca0132.c 		writel(0x00000aff, spec->mem_base + 0x830);
writel           8170 sound/pci/hda/patch_ca0132.c 		writel(0x00000000, spec->mem_base + 0x86c);
writel           8171 sound/pci/hda/patch_ca0132.c 		writel(0x0000006b, spec->mem_base + 0x800);
writel           8172 sound/pci/hda/patch_ca0132.c 		writel(0x00000001, spec->mem_base + 0x86c);
writel           8173 sound/pci/hda/patch_ca0132.c 		writel(0x0000006b, spec->mem_base + 0x800);
writel           8174 sound/pci/hda/patch_ca0132.c 		writel(0x00000057, spec->mem_base + 0x804);
writel           8175 sound/pci/hda/patch_ca0132.c 		writel(0x00800000, spec->mem_base + 0x20c);
writel            525 sound/pci/korg1212/korg1212.c 		writel(mailBox3Val, korg1212->mailbox3Ptr);
writel            526 sound/pci/korg1212/korg1212.c                 writel(mailBox2Val, korg1212->mailbox2Ptr);
writel            527 sound/pci/korg1212/korg1212.c                 writel(mailBox1Val, korg1212->mailbox1Ptr);
writel            528 sound/pci/korg1212/korg1212.c                 writel(mailBox0Val, korg1212->mailbox0Ptr);
writel            529 sound/pci/korg1212/korg1212.c                 writel(doorbellVal, korg1212->outDoorbellPtr);  // interrupt the card
writel            757 sound/pci/korg1212/korg1212.c 	writel(PCI_INT_ENABLE_BIT            |
writel            873 sound/pci/korg1212/korg1212.c 	writel(0, korg1212->statusRegPtr);
writel            913 sound/pci/korg1212/korg1212.c         writel(0, korg1212->mailbox3Ptr);
writel           1111 sound/pci/korg1212/korg1212.c 	writel(doorbellValue, korg1212->inDoorbellPtr);
writel            384 sound/pci/lola/lola.h 	writel((val), (chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
writel            394 sound/pci/lola/lola.h 	writel((val), (chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
writel            229 sound/pci/lola/lola_mixer.c 	writel(val, &chip->mixer.array->src_gain_enable);
writel            250 sound/pci/lola/lola_mixer.c 	writel(mask, &chip->mixer.array->src_gain_enable);
writel            284 sound/pci/lola/lola_mixer.c 	writel(val, &chip->mixer.array->dest_mix_gain_enable[dest]);
writel            305 sound/pci/lola/lola_mixer.c 	writel(mask, &chip->mixer.array->dest_mix_gain_enable[id]);
writel            159 sound/pci/mixart/mixart_core.c 	writel(0, MIXART_MEM(mgr, tailptr)); /* set address to zero on this fifo position */
writel            411 sound/pci/mixart/mixart_core.c 	writel(it_reg, MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
writel            567 sound/pci/mixart/mixart_core.c 	writel( 0, MIXART_MEM( mgr, MSG_HOST_RSC_PROTECTION ) );
writel            568 sound/pci/mixart/mixart_core.c 	writel( 0, MIXART_MEM( mgr, MSG_AGENT_RSC_PROTECTION ) );
writel            298 sound/pci/nm256/nm256.c 	writel(val, chip->cport + offset);
writel            408 sound/pci/rme32.c         writel(rme32->wcreg | RME32_WCR_PD,
writel            410 sound/pci/rme32.c         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            548 sound/pci/rme32.c                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            579 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            611 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            653 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            705 sound/pci/rme32.c 		writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            734 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            757 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            785 sound/pci/rme32.c 		writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel            789 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            800 sound/pci/rme32.c 		writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
writel            805 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            807 sound/pci/rme32.c 		writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel            824 sound/pci/rme32.c 		writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
writel            863 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            945 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel           1039 sound/pci/rme32.c 		writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel           1043 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel           1059 sound/pci/rme32.c 		writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel           1433 sound/pci/rme32.c 	writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel           1439 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel           1595 sound/pci/rme32.c 	writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel           1806 sound/pci/rme32.c 	writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel            510 sound/pci/rme96.c 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            513 sound/pci/rme96.c 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            519 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            522 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            540 sound/pci/rme96.c 	writel(rme96->wcreg | RME96_WCR_PD,
writel            542 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            566 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            601 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            746 sound/pci/rme96.c 		writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            789 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            816 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            817 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            867 sound/pci/rme96.c 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            886 sound/pci/rme96.c 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            888 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            937 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            954 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel            974 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           1026 sound/pci/rme96.c 		writel(rme96->wcreg |= rme96->wcreg_spdif_stream, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           1099 sound/pci/rme96.c 		writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
writel           1101 sound/pci/rme96.c 		writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
writel           1105 sound/pci/rme96.c 			writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
writel           1110 sound/pci/rme96.c 			writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
writel           1120 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           1142 sound/pci/rme96.c 		writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
writel           1147 sound/pci/rme96.c 		writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
writel           1193 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           1262 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           1361 sound/pci/rme96.c 	writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
writel           1375 sound/pci/rme96.c 	writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
writel           1573 sound/pci/rme96.c 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel           1688 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           1689 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel           1692 sound/pci/rme96.c 	writel(rme96->areg | RME96_AR_PD2,
writel           1694 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);	
writel           1699 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel           1702 sound/pci/rme96.c 	writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
writel           1703 sound/pci/rme96.c 	writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
writel           1888 sound/pci/rme96.c 	writel(val, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           2187 sound/pci/rme96.c 	writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel           2389 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel           2399 sound/pci/rme96.c 	writel(0, rme96->iobase + RME96_IO_SET_PLAY_POS
writel           2401 sound/pci/rme96.c 	writel(0, rme96->iobase + RME96_IO_SET_REC_POS
writel           2411 sound/pci/rme96.c 	writel(rme96->areg | RME96_AR_PD2,
writel           2413 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel           2418 sound/pci/rme96.c 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel            648 sound/pci/rme9652/hdsp.c 	writel(val, hdsp->iobase + reg);
writel           1134 sound/pci/rme9652/hdspm.c 	writel(val, hdspm->iobase + reg);
writel            311 sound/pci/rme9652/rme9652.c 	writel(val, rme9652->iobase + reg);
writel            559 sound/pci/sis7019.c 	writel(format, ctrl_base + SIS_PLAY_DMA_FORMAT_CSO);
writel            560 sound/pci/sis7019.c 	writel(dma_addr, ctrl_base + SIS_PLAY_DMA_BASE);
writel            561 sound/pci/sis7019.c 	writel(control, ctrl_base + SIS_PLAY_DMA_CONTROL);
writel            562 sound/pci/sis7019.c 	writel(sso_eso, ctrl_base + SIS_PLAY_DMA_SSO_ESO);
writel            565 sound/pci/sis7019.c 		writel(0, wave_base + reg);
writel            567 sound/pci/sis7019.c 	writel(SIS_WAVE_GENERAL_WAVE_VOLUME, wave_base + SIS_WAVE_GENERAL);
writel            568 sound/pci/sis7019.c 	writel(delta << 16, wave_base + SIS_WAVE_GENERAL_ARTICULATION);
writel            569 sound/pci/sis7019.c 	writel(SIS_WAVE_CHANNEL_CONTROL_FIRST_SAMPLE |
writel            802 sound/pci/sis7019.c 	writel(format, play_base + SIS_PLAY_DMA_FORMAT_CSO);
writel            803 sound/pci/sis7019.c 	writel(sis->silence_dma_addr, play_base + SIS_PLAY_DMA_BASE);
writel            804 sound/pci/sis7019.c 	writel(control, play_base + SIS_PLAY_DMA_CONTROL);
writel            805 sound/pci/sis7019.c 	writel(sso_eso, play_base + SIS_PLAY_DMA_SSO_ESO);
writel            808 sound/pci/sis7019.c 		writel(0, wave_base + reg);
writel            810 sound/pci/sis7019.c 	writel(SIS_WAVE_GENERAL_WAVE_VOLUME, wave_base + SIS_WAVE_GENERAL);
writel            811 sound/pci/sis7019.c 	writel(delta << 16, wave_base + SIS_WAVE_GENERAL_ARTICULATION);
writel            812 sound/pci/sis7019.c 	writel(SIS_WAVE_CHANNEL_CONTROL_FIRST_SAMPLE |
writel            853 sound/pci/sis7019.c 	writel(format, rec_base + SIS_CAPTURE_DMA_FORMAT_CSO);
writel            854 sound/pci/sis7019.c 	writel(dma_addr, rec_base + SIS_CAPTURE_DMA_BASE);
writel            855 sound/pci/sis7019.c 	writel(control, rec_base + SIS_CAPTURE_DMA_CONTROL);
writel           1171 sound/pci/sis7019.c 		writel(i, SIS_MIXER_START_ADDR(ioaddr, i));
writel           1172 sound/pci/sis7019.c 		writel(SIS_MIXER_RIGHT_NO_ATTEN | SIS_MIXER_LEFT_NO_ATTEN |
writel             61 sound/pci/ymfpci/ymfpci_main.c 	writel(val, chip->reg_area_virt + offset);
writel             97 sound/sh/aica.c 		writel(what, toi + SPU_MEMORY_BASE);
writel            118 sound/sh/aica.c 		writel(val, to);
writel            136 sound/sh/aica.c 	writel(regval, ARM_RESET_REGISTER);
writel            144 sound/sh/aica.c 		writel(regval, SPU_REGISTER_BASE + (i * 0x80));
writel            157 sound/sh/aica.c 	writel(regval, ARM_RESET_REGISTER);
writel            183 sound/sh/aica.c 	writel(AICA_CMD_KICK | AICA_CMD_START, (u32 *) AICA_CONTROL_POINT);
writel            193 sound/sh/aica.c 	writel(AICA_CMD_KICK | AICA_CMD_STOP, (u32 *) AICA_CONTROL_POINT);
writel            125 sound/soc/amd/acp-pcm-dma.c 	writel(val, acp_mmio + (reg * 4));
writel             57 sound/soc/amd/raven/acp3x.h 	writel(val, base_addr - ACP3x_PHY_BASE_ADDRESS);
writel            249 sound/soc/bcm/cygnus-pcm.c 	writel(start, audio_io + p_rbuf->baseaddr);
writel            250 sound/soc/bcm/cygnus-pcm.c 	writel(end, audio_io + p_rbuf->endaddr);
writel            251 sound/soc/bcm/cygnus-pcm.c 	writel(fmark_val, audio_io + p_rbuf->fmark);
writel            252 sound/soc/bcm/cygnus-pcm.c 	writel(initial_rd, audio_io + p_rbuf->rdaddr);
writel            253 sound/soc/bcm/cygnus-pcm.c 	writel(initial_wr, audio_io + p_rbuf->wraddr);
writel            332 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR0_STATUS_CLR_OFFSET);
writel            333 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR1_STATUS_CLR_OFFSET);
writel            334 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR3_STATUS_CLR_OFFSET);
writel            336 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR0_MASK_CLR_OFFSET);
writel            337 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR1_MASK_CLR_OFFSET);
writel            338 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR3_MASK_CLR_OFFSET);
writel            340 sound/soc/bcm/cygnus-pcm.c 		writel(ANY_PLAYBACK_IRQ,
writel            343 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR2_STATUS_CLR_OFFSET);
writel            344 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR4_STATUS_CLR_OFFSET);
writel            345 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR2_MASK_CLR_OFFSET);
writel            346 sound/soc/bcm/cygnus-pcm.c 		writel(clear_mask, aio->cygaud->audio + ESR4_MASK_CLR_OFFSET);
writel            348 sound/soc/bcm/cygnus-pcm.c 		writel(ANY_CAPTURE_IRQ,
writel            369 sound/soc/bcm/cygnus-pcm.c 		writel(set_mask, aio->cygaud->audio + ESR0_MASK_SET_OFFSET);
writel            370 sound/soc/bcm/cygnus-pcm.c 		writel(set_mask, aio->cygaud->audio + ESR1_MASK_SET_OFFSET);
writel            371 sound/soc/bcm/cygnus-pcm.c 		writel(set_mask, aio->cygaud->audio + ESR3_MASK_SET_OFFSET);
writel            373 sound/soc/bcm/cygnus-pcm.c 		writel(set_mask, aio->cygaud->audio + ESR2_MASK_SET_OFFSET);
writel            374 sound/soc/bcm/cygnus-pcm.c 		writel(set_mask, aio->cygaud->audio + ESR4_MASK_SET_OFFSET);
writel            420 sound/soc/bcm/cygnus-pcm.c 		writel(regval, aio->cygaud->audio + p_rbuf->wraddr);
writel            424 sound/soc/bcm/cygnus-pcm.c 		writel(regval, aio->cygaud->audio + p_rbuf->rdaddr);
writel            485 sound/soc/bcm/cygnus-pcm.c 	writel(esr_status0, audio_io + ESR0_STATUS_CLR_OFFSET);
writel            486 sound/soc/bcm/cygnus-pcm.c 	writel(esr_status1, audio_io + ESR1_STATUS_CLR_OFFSET);
writel            487 sound/soc/bcm/cygnus-pcm.c 	writel(esr_status3, audio_io + ESR3_STATUS_CLR_OFFSET);
writel            489 sound/soc/bcm/cygnus-pcm.c 	writel(esr_status3, audio_io + BF_REARM_FREE_MARK_OFFSET);
writel            539 sound/soc/bcm/cygnus-pcm.c 	writel(esr_status2, audio_io + ESR2_STATUS_CLR_OFFSET);
writel            540 sound/soc/bcm/cygnus-pcm.c 	writel(esr_status4, audio_io + ESR4_STATUS_CLR_OFFSET);
writel            542 sound/soc/bcm/cygnus-pcm.c 	writel(esr_status4, audio_io + BF_REARM_FULL_MARK_OFFSET);
writel            566 sound/soc/bcm/cygnus-pcm.c 		writel(ANY_PLAYBACK_IRQ & r5_status,
writel            573 sound/soc/bcm/cygnus-pcm.c 		writel(ANY_CAPTURE_IRQ & r5_status,
writel            265 sound/soc/bcm/cygnus-ssp.c 		writel(aio->portnum,
writel            272 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.i2s_stream_cfg);
writel            279 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            286 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->i2s_in +
writel            297 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_destch_cfg);
writel            302 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
writel            305 sound/soc/bcm/cygnus-ssp.c 		writel(aio->portnum, aio->cygaud->audio + BF_SRC_GRP3_OFFSET);
writel            309 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + SPDIF_CTRL_OFFSET);
writel            316 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + SPDIF_STREAM_CFG_OFFSET);
writel            322 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            327 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
writel            343 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->audio + aio->regs.bf_destch_cfg);
writel            345 sound/soc/bcm/cygnus-ssp.c 	writel(0x1, aio->cygaud->audio + aio->regs.bf_destch_ctrl);
writel            350 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->audio + aio->regs.i2s_cfg);
writel            354 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->i2s_in + aio->regs.i2s_cap_stream_cfg);
writel            365 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->i2s_in + aio->regs.i2s_cap_stream_cfg);
writel            374 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.i2s_cfg);
writel            377 sound/soc/bcm/cygnus-ssp.c 	writel(0x0, aio->cygaud->audio + aio->regs.bf_destch_ctrl);
writel            381 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->audio + aio->regs.bf_destch_cfg);
writel            393 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.i2s_stream_cfg);
writel            395 sound/soc/bcm/cygnus-ssp.c 		writel(1, aio->cygaud->audio + aio->regs.bf_sourcech_ctrl);
writel            400 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.i2s_cfg);
writel            404 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            411 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + SPDIF_FORMAT_CFG_OFFSET);
writel            413 sound/soc/bcm/cygnus-ssp.c 		writel(1, aio->cygaud->audio + aio->regs.bf_sourcech_ctrl);
writel            417 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            442 sound/soc/bcm/cygnus-ssp.c 			writel(value, aio->cygaud->audio + aio->regs.i2s_cfg);
writel            448 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + BF_SRC_GRP_SYNC_DIS_OFFSET);
writel            450 sound/soc/bcm/cygnus-ssp.c 		writel(0, aio->cygaud->audio + aio->regs.bf_sourcech_ctrl);
writel            454 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            459 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + BF_SRC_GRP_SYNC_DIS_OFFSET);
writel            463 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.i2s_stream_cfg);
writel            468 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->i2s_in + IOP_SW_INIT_LOGIC);
writel            470 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->i2s_in + IOP_SW_INIT_LOGIC);
writel            475 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + SPDIF_FORMAT_CFG_OFFSET);
writel            476 sound/soc/bcm/cygnus-ssp.c 		writel(0, aio->cygaud->audio + aio->regs.bf_sourcech_ctrl);
writel            480 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            597 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.i2s_cfg);
writel            612 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
writel            659 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            678 sound/soc/bcm/cygnus-ssp.c 		writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
writel            687 sound/soc/bcm/cygnus-ssp.c 			writel(value, aio->cygaud->audio +
writel            695 sound/soc/bcm/cygnus-ssp.c 			writel(value, aio->cygaud->audio +
writel            738 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
writel            898 sound/soc/bcm/cygnus-ssp.c 	writel(ssp_outcfg, aio->cygaud->audio + aio->regs.i2s_cfg);
writel            906 sound/soc/bcm/cygnus-ssp.c 	writel(ssp_incfg, aio->cygaud->i2s_in + aio->regs.i2s_cap_cfg);
writel            927 sound/soc/bcm/cygnus-ssp.c 	writel(val, aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
writel           1041 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->i2s_in + aio->regs.i2s_cap_cfg);
writel           1049 sound/soc/bcm/cygnus-ssp.c 	writel(value, aio->cygaud->audio + aio->regs.i2s_cfg);
writel           1307 sound/soc/bcm/cygnus-ssp.c 	writel(CYGNUS_SSP_TRISTATE_MASK,
writel            490 sound/soc/codecs/jz4725b.c 	writel(tmp, icdc->base + ICDC_RGADW_OFFSET);
writel            510 sound/soc/codecs/jz4725b.c 	writel(ICDC_RGADW_RGWR | (reg << ICDC_RGADW_RGADDR_OFFSET) | val,
writel             31 sound/soc/dwc/dwc-i2s.c 	writel(val, io_base + reg);
writel            208 sound/soc/fsl/imx-audmux.c 	writel(pcr, audmux_base + port_mapping[port]);
writel            231 sound/soc/fsl/imx-audmux.c 	writel(ptcr, audmux_base + IMX_AUDMUX_V2_PTCR(port));
writel            232 sound/soc/fsl/imx-audmux.c 	writel(pdcr, audmux_base + IMX_AUDMUX_V2_PDCR(port));
writel            374 sound/soc/fsl/imx-audmux.c 		writel(regcache[i], audmux_base + i * 4);
writel             63 sound/soc/fsl/imx-ssi.c 	writel(sccr, ssi->base + SSI_STCCR);
writel             68 sound/soc/fsl/imx-ssi.c 	writel(sccr, ssi->base + SSI_SRCCR);
writel             70 sound/soc/fsl/imx-ssi.c 	writel(~tx_mask, ssi->base + SSI_STMSK);
writel             71 sound/soc/fsl/imx-ssi.c 	writel(~rx_mask, ssi->base + SSI_SRMSK);
writel            145 sound/soc/fsl/imx-ssi.c 	writel(strcr, ssi->base + SSI_STCR);
writel            146 sound/soc/fsl/imx-ssi.c 	writel(strcr, ssi->base + SSI_SRCR);
writel            147 sound/soc/fsl/imx-ssi.c 	writel(scr, ssi->base + SSI_SCR);
writel            175 sound/soc/fsl/imx-ssi.c 	writel(scr, ssi->base + SSI_SCR);
writel            222 sound/soc/fsl/imx-ssi.c 	writel(stccr, ssi->base + SSI_STCCR);
writel            223 sound/soc/fsl/imx-ssi.c 	writel(srccr, ssi->base + SSI_SRCCR);
writel            263 sound/soc/fsl/imx-ssi.c 	writel(sccr, ssi->base + reg);
writel            323 sound/soc/fsl/imx-ssi.c 		writel(scr, ssi->base + SSI_SCR);
writel            325 sound/soc/fsl/imx-ssi.c 	writel(sier, ssi->base + SSI_SIER);
writel            348 sound/soc/fsl/imx-ssi.c 	writel(val, ssi->base + SSI_SFCSR);
writel            402 sound/soc/fsl/imx-ssi.c 	writel(0x0, base + SSI_SCR);
writel            403 sound/soc/fsl/imx-ssi.c 	writel(0x0, base + SSI_STCR);
writel            404 sound/soc/fsl/imx-ssi.c 	writel(0x0, base + SSI_SRCR);
writel            406 sound/soc/fsl/imx-ssi.c 	writel(SSI_SCR_SYN | SSI_SCR_NET, base + SSI_SCR);
writel            408 sound/soc/fsl/imx-ssi.c 	writel(SSI_SFCSR_RFWM0(8) |
writel            413 sound/soc/fsl/imx-ssi.c 	writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_STCCR);
writel            414 sound/soc/fsl/imx-ssi.c 	writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_SRCCR);
writel            416 sound/soc/fsl/imx-ssi.c 	writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN, base + SSI_SCR);
writel            417 sound/soc/fsl/imx-ssi.c 	writel(SSI_SOR_WAIT(3), base + SSI_SOR);
writel            419 sound/soc/fsl/imx-ssi.c 	writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN |
writel            423 sound/soc/fsl/imx-ssi.c 	writel(SSI_SACNT_DEFAULT, base + SSI_SACNT);
writel            424 sound/soc/fsl/imx-ssi.c 	writel(0xff, base + SSI_SACCDIS);
writel            425 sound/soc/fsl/imx-ssi.c 	writel(0x300, base + SSI_SACCEN);
writel            444 sound/soc/fsl/imx-ssi.c 	writel(lreg, base + SSI_SACADD);
writel            447 sound/soc/fsl/imx-ssi.c 	writel(lval , base + SSI_SACDAT);
writel            449 sound/soc/fsl/imx-ssi.c 	writel(SSI_SACNT_DEFAULT | SSI_SACNT_WR, base + SSI_SACNT);
writel            463 sound/soc/fsl/imx-ssi.c 	writel(lreg, base + SSI_SACADD);
writel            464 sound/soc/fsl/imx-ssi.c 	writel(SSI_SACNT_DEFAULT | SSI_SACNT_RD, base + SSI_SACNT);
writel            556 sound/soc/fsl/imx-ssi.c 	writel(0x0, ssi->base + SSI_SIER);
writel             83 sound/soc/hisilicon/hi6210-i2s.c 	writel(val, i2s->base + reg);
writel             90 sound/soc/img/img-i2s-in.c 	writel(val, i2s->base + reg);
writel            101 sound/soc/img/img-i2s-in.c 	writel(val, i2s->channel_base + (chan * IMG_I2S_IN_CH_STRIDE) + reg);
writel            101 sound/soc/img/img-i2s-out.c 	writel(val, i2s->base + reg);
writel            112 sound/soc/img/img-i2s-out.c 	writel(val, i2s->channel_base + (chan * IMG_I2S_OUT_CH_STRIDE) + reg);
writel             70 sound/soc/img/img-parallel-out.c 	writel(val, prl->base + reg);
writel            116 sound/soc/img/img-spdif-in.c 	writel(val, spdif->base + reg);
writel             86 sound/soc/img/img-spdif-out.c 	writel(val, spdif->base + reg);
writel             33 sound/soc/intel/atom/sst/sst_pvt.c 	writel(value, addr + offset);
writel             25 sound/soc/intel/common/sst-dsp.c 	writel(value, addr + offset);
writel             56 sound/soc/intel/common/sst-dsp.c 		writel(src[i], dest + i);
writel            254 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            261 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL0);
writel            266 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            275 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val, sst->addr.pci_cfg + SST_PMCS);
writel            281 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            310 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            315 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL0);
writel            320 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg, sst->addr.pci_cfg + SST_PMCS);
writel            354 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            361 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            369 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(reg & ~fw_dump_bit, sst->addr.pci_cfg + SST_VDRTCTL0);
writel            548 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            552 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val & ~bit, sst->addr.pci_cfg + SST_VDRTCTL0);
writel            560 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            584 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            591 sound/soc/intel/haswell/sst-haswell-dsp.c 		writel(val | bit, sst->addr.pci_cfg + SST_VDRTCTL0);
writel            599 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);
writel            677 sound/soc/intel/haswell/sst-haswell-dsp.c 	writel(0xffffffff & ~fw_dump_bit, sst->addr.pci_cfg + SST_VDRTCTL0);
writel            137 sound/soc/intel/skylake/skl.c 		writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
writel            119 sound/soc/jz4740/jz4740-i2s.c 	writel(value, i2s->base + reg);
writel             53 sound/soc/kirkwood/kirkwood-dma.c 		writel(cause, priv->io + KIRKWOOD_ERR_CAUSE);
writel             65 sound/soc/kirkwood/kirkwood-dma.c 	writel(status, priv->io + KIRKWOOD_INT_CAUSE);
writel             84 sound/soc/kirkwood/kirkwood-dma.c 	writel(0, base + KIRKWOOD_AUDIO_WIN_CTRL_REG(win));
writel             85 sound/soc/kirkwood/kirkwood-dma.c 	writel(0, base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
writel             91 sound/soc/kirkwood/kirkwood-dma.c 			writel(cs->base & 0xffff0000,
writel             93 sound/soc/kirkwood/kirkwood-dma.c 			writel(((cs->size - 1) & 0xffff0000) |
writel            141 sound/soc/kirkwood/kirkwood-dma.c 		writel((unsigned int)-1, priv->io + KIRKWOOD_ERR_MASK);
writel            176 sound/soc/kirkwood/kirkwood-dma.c 		writel(0, priv->io + KIRKWOOD_ERR_MASK);
writel            212 sound/soc/kirkwood/kirkwood-dma.c 		writel(count, priv->io + KIRKWOOD_PLAY_BYTE_INT_COUNT);
writel            213 sound/soc/kirkwood/kirkwood-dma.c 		writel(runtime->dma_addr, priv->io + KIRKWOOD_PLAY_BUF_ADDR);
writel            214 sound/soc/kirkwood/kirkwood-dma.c 		writel(size, priv->io + KIRKWOOD_PLAY_BUF_SIZE);
writel            216 sound/soc/kirkwood/kirkwood-dma.c 		writel(count, priv->io + KIRKWOOD_REC_BYTE_INT_COUNT);
writel            217 sound/soc/kirkwood/kirkwood-dma.c 		writel(runtime->dma_addr, priv->io + KIRKWOOD_REC_BUF_ADDR);
writel            218 sound/soc/kirkwood/kirkwood-dma.c 		writel(size, priv->io + KIRKWOOD_REC_BUF_SIZE);
writel             62 sound/soc/kirkwood/kirkwood-i2s.c 	writel(value, priv->io+KIRKWOOD_I2S_PLAYCTL);
writel             67 sound/soc/kirkwood/kirkwood-i2s.c 	writel(value, priv->io+KIRKWOOD_I2S_RECCTL);
writel             89 sound/soc/kirkwood/kirkwood-i2s.c 	writel(value, io + KIRKWOOD_DCO_CTL);
writel            121 sound/soc/kirkwood/kirkwood-i2s.c 	writel(clks_ctrl, priv->io + KIRKWOOD_CLOCKS_CTRL);
writel            214 sound/soc/kirkwood/kirkwood-i2s.c 	writel(i2s_value, priv->io+i2s_reg);
writel            266 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_PLAYCTL);
writel            272 sound/soc/kirkwood/kirkwood-i2s.c 			writel(value, priv->io + KIRKWOOD_INT_MASK);
writel            276 sound/soc/kirkwood/kirkwood-i2s.c 		writel(ctl, priv->io + KIRKWOOD_PLAYCTL);
writel            283 sound/soc/kirkwood/kirkwood-i2s.c 		writel(ctl, priv->io + KIRKWOOD_PLAYCTL);
writel            287 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_INT_MASK);
writel            291 sound/soc/kirkwood/kirkwood-i2s.c 		writel(ctl, priv->io + KIRKWOOD_PLAYCTL);
writel            298 sound/soc/kirkwood/kirkwood-i2s.c 		writel(ctl, priv->io + KIRKWOOD_PLAYCTL);
writel            306 sound/soc/kirkwood/kirkwood-i2s.c 		writel(ctl, priv->io + KIRKWOOD_PLAYCTL);
writel            334 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_RECCTL);
writel            339 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_INT_MASK);
writel            342 sound/soc/kirkwood/kirkwood-i2s.c 		writel(ctl, priv->io + KIRKWOOD_RECCTL);
writel            349 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_RECCTL);
writel            353 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_INT_MASK);
writel            358 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_RECCTL);
writel            365 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_RECCTL);
writel            372 sound/soc/kirkwood/kirkwood-i2s.c 		writel(value, priv->io + KIRKWOOD_RECCTL);
writel            400 sound/soc/kirkwood/kirkwood-i2s.c 	writel(0xffffffff, priv->io + KIRKWOOD_INT_CAUSE);
writel            401 sound/soc/kirkwood/kirkwood-i2s.c 	writel(0, priv->io + KIRKWOOD_INT_MASK);
writel            406 sound/soc/kirkwood/kirkwood-i2s.c 	writel(reg_data, priv->io + 0x1200);
writel            413 sound/soc/kirkwood/kirkwood-i2s.c 	writel(reg_data, priv->io + 0x1200);
writel            418 sound/soc/kirkwood/kirkwood-i2s.c 	writel(value, priv->io + KIRKWOOD_PLAYCTL);
writel            422 sound/soc/kirkwood/kirkwood-i2s.c 	writel(value, priv->io + KIRKWOOD_RECCTL);
writel             45 sound/soc/qcom/apq8016_sbc.c 		writel(readl(pdata->spkr_iomux) | SPKR_CTL_PRI_WS_SLAVE_SEL_11,
writel             51 sound/soc/qcom/apq8016_sbc.c 		writel(readl(pdata->mic_iomux) | MIC_CTRL_QUA_WS_SLAVE_SEL_10 |
writel             56 sound/soc/qcom/apq8016_sbc.c 		writel(readl(pdata->mic_iomux) | MIC_CTRL_TER_WS_SLAVE_SEL |
writel            299 sound/soc/samsung/i2s.c 	writel(mod, priv->addr + I2SMOD);
writel            373 sound/soc/samsung/i2s.c 	writel(mod, priv->addr + I2SMOD);
writel            425 sound/soc/samsung/i2s.c 			writel(con, addr + I2SCON);
writel            437 sound/soc/samsung/i2s.c 	writel(mod, addr + I2SMOD);
writel            438 sound/soc/samsung/i2s.c 	writel(con, addr + I2SCON);
writel            468 sound/soc/samsung/i2s.c 	writel(mod, addr + I2SMOD);
writel            469 sound/soc/samsung/i2s.c 	writel(con, addr + I2SCON);
writel            487 sound/soc/samsung/i2s.c 	writel(readl(fic) | flush, fic);
writel            494 sound/soc/samsung/i2s.c 	writel(readl(fic) & ~flush, fic);
writel            612 sound/soc/samsung/i2s.c 	writel(mod, priv->addr + I2SMOD);
writel            711 sound/soc/samsung/i2s.c 	writel(mod, priv->addr + I2SMOD);
writel            801 sound/soc/samsung/i2s.c 	writel(mod, priv->addr + I2SMOD);
writel            836 sound/soc/samsung/i2s.c 		writel(CON_RSTCLR, i2s->priv->addr + I2SCON);
writel            920 sound/soc/samsung/i2s.c 		writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR);
writel           1058 sound/soc/samsung/i2s.c 			writel(CON_RSTCLR, priv->addr + I2SCON);
writel           1097 sound/soc/samsung/i2s.c 			writel(0, priv->addr + I2SCON);
writel           1238 sound/soc/samsung/i2s.c 	writel(priv->suspend_i2scon, priv->addr + I2SCON);
writel           1239 sound/soc/samsung/i2s.c 	writel(priv->suspend_i2smod, priv->addr + I2SMOD);
writel           1240 sound/soc/samsung/i2s.c 	writel(priv->suspend_i2spsr, priv->addr + I2SPSR);
writel           1298 sound/soc/samsung/i2s.c 		writel(val | PSR_PSREN, priv->addr + I2SPSR);
writel             76 sound/soc/samsung/idma.c 	writel(val, idma.regs + I2SLVL0ADDR);
writel             80 sound/soc/samsung/idma.c 	writel(val, idma.regs + I2SSTR0);
writel             90 sound/soc/samsung/idma.c 	writel(val, idma.regs + I2SSIZE);
writel             94 sound/soc/samsung/idma.c 	writel(val, idma.regs + I2SAHB);
writel            127 sound/soc/samsung/idma.c 	writel(val, idma.regs + I2SAHB);
writel            150 sound/soc/samsung/idma.c 	writel(ahb, idma.regs + I2SAHB);
writel            151 sound/soc/samsung/idma.c 	writel(mod, idma.regs + I2SMOD);
writel            265 sound/soc/samsung/idma.c 		writel(iisahb, idma.regs + I2SAHB);
writel            272 sound/soc/samsung/idma.c 		writel(addr, idma.regs + I2SLVL0ADDR);
writel            176 sound/soc/samsung/pcm.c 	writel(clkctl, regs + S3C_PCM_CLKCTL);
writel            177 sound/soc/samsung/pcm.c 	writel(ctl, regs + S3C_PCM_CTL);
writel            207 sound/soc/samsung/pcm.c 	writel(clkctl, regs + S3C_PCM_CLKCTL);
writel            208 sound/soc/samsung/pcm.c 	writel(ctl, regs + S3C_PCM_CTL);
writel            302 sound/soc/samsung/pcm.c 	writel(clkctl, regs + S3C_PCM_CLKCTL);
writel            376 sound/soc/samsung/pcm.c 	writel(ctl, regs + S3C_PCM_CTL);
writel            425 sound/soc/samsung/pcm.c 	writel(clkctl, regs + S3C_PCM_CLKCTL);
writel            107 sound/soc/samsung/s3c-i2s-v2.c 		writel(con, regs + S3C2412_IISCON);
writel            108 sound/soc/samsung/s3c-i2s-v2.c 		writel(mod, regs + S3C2412_IISMOD);
writel            136 sound/soc/samsung/s3c-i2s-v2.c 		writel(mod, regs + S3C2412_IISMOD);
writel            137 sound/soc/samsung/s3c-i2s-v2.c 		writel(con, regs + S3C2412_IISCON);
writel            179 sound/soc/samsung/s3c-i2s-v2.c 		writel(mod, regs + S3C2412_IISMOD);
writel            180 sound/soc/samsung/s3c-i2s-v2.c 		writel(con, regs + S3C2412_IISCON);
writel            204 sound/soc/samsung/s3c-i2s-v2.c 		writel(con, regs + S3C2412_IISCON);
writel            205 sound/soc/samsung/s3c-i2s-v2.c 		writel(mod, regs + S3C2412_IISMOD);
writel            289 sound/soc/samsung/s3c-i2s-v2.c 	writel(iismod, i2s->regs + S3C2412_IISMOD);
writel            328 sound/soc/samsung/s3c-i2s-v2.c 	writel(iismod, i2s->regs + S3C2412_IISMOD);
writel            373 sound/soc/samsung/s3c-i2s-v2.c 	writel(iismod, i2s->regs + S3C2412_IISMOD);
writel            394 sound/soc/samsung/s3c-i2s-v2.c 		writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH,
writel            398 sound/soc/samsung/s3c-i2s-v2.c 		writel(0x0, i2s->regs + S3C2412_IISFIC);
writel            476 sound/soc/samsung/s3c-i2s-v2.c 		writel(reg | div, i2s->regs + S3C2412_IISMOD);
writel            505 sound/soc/samsung/s3c-i2s-v2.c 		writel(reg | div, i2s->regs + S3C2412_IISMOD);
writel            511 sound/soc/samsung/s3c-i2s-v2.c 			writel((div << 8) | S3C2412_IISPSR_PSREN,
writel            514 sound/soc/samsung/s3c-i2s-v2.c 			writel(0x0, i2s->regs + S3C2412_IISPSR);
writel            642 sound/soc/samsung/s3c-i2s-v2.c 	writel(iismod, i2s->regs + S3C2412_IISMOD);
writel            695 sound/soc/samsung/s3c-i2s-v2.c 		writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON);
writel            696 sound/soc/samsung/s3c-i2s-v2.c 		writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD);
writel            697 sound/soc/samsung/s3c-i2s-v2.c 		writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR);
writel            699 sound/soc/samsung/s3c-i2s-v2.c 		writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH,
writel            703 sound/soc/samsung/s3c-i2s-v2.c 		writel(0x0, i2s->regs + S3C2412_IISFIC);
writel            114 sound/soc/samsung/s3c2412-i2s.c 	writel(iismod, i2s->regs + S3C2412_IISMOD);
writel             66 sound/soc/samsung/s3c24xx-i2s.c 		writel(iismod,  s3c24xx_i2s.regs + S3C2410_IISMOD);
writel             67 sound/soc/samsung/s3c24xx-i2s.c 		writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel             68 sound/soc/samsung/s3c24xx-i2s.c 		writel(iiscon,  s3c24xx_i2s.regs + S3C2410_IISCON);
writel             83 sound/soc/samsung/s3c24xx-i2s.c 		writel(iiscon,  s3c24xx_i2s.regs + S3C2410_IISCON);
writel             84 sound/soc/samsung/s3c24xx-i2s.c 		writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel             85 sound/soc/samsung/s3c24xx-i2s.c 		writel(iismod,  s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            109 sound/soc/samsung/s3c24xx-i2s.c 		writel(iismod,  s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            110 sound/soc/samsung/s3c24xx-i2s.c 		writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel            111 sound/soc/samsung/s3c24xx-i2s.c 		writel(iiscon,  s3c24xx_i2s.regs + S3C2410_IISCON);
writel            126 sound/soc/samsung/s3c24xx-i2s.c 		writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel            127 sound/soc/samsung/s3c24xx-i2s.c 		writel(iiscon,  s3c24xx_i2s.regs + S3C2410_IISCON);
writel            128 sound/soc/samsung/s3c24xx-i2s.c 		writel(iismod,  s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            197 sound/soc/samsung/s3c24xx-i2s.c 	writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            229 sound/soc/samsung/s3c24xx-i2s.c 	writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            293 sound/soc/samsung/s3c24xx-i2s.c 	writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            308 sound/soc/samsung/s3c24xx-i2s.c 		writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            312 sound/soc/samsung/s3c24xx-i2s.c 		writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            315 sound/soc/samsung/s3c24xx-i2s.c 		writel(div, s3c24xx_i2s.regs + S3C2410_IISPSR);
writel            317 sound/soc/samsung/s3c24xx-i2s.c 		writel(reg | S3C2410_IISCON_PSCEN, s3c24xx_i2s.regs + S3C2410_IISCON);
writel            355 sound/soc/samsung/s3c24xx-i2s.c 	writel(S3C2410_IISCON_IISEN, s3c24xx_i2s.regs + S3C2410_IISCON);
writel            384 sound/soc/samsung/s3c24xx-i2s.c 	writel(s3c24xx_i2s.iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
writel            385 sound/soc/samsung/s3c24xx-i2s.c 	writel(s3c24xx_i2s.iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel            386 sound/soc/samsung/s3c24xx-i2s.c 	writel(s3c24xx_i2s.iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel            387 sound/soc/samsung/s3c24xx-i2s.c 	writel(s3c24xx_i2s.iispsr, s3c24xx_i2s.regs + S3C2410_IISPSR);
writel            108 sound/soc/samsung/spdif.c 		writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON);
writel            110 sound/soc/samsung/spdif.c 		writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
writel            128 sound/soc/samsung/spdif.c 	writel(clkcon, spdif->regs + CLKCON);
writel            261 sound/soc/samsung/spdif.c 	writel(con, regs + CON);
writel            262 sound/soc/samsung/spdif.c 	writel(cstas, regs + CSTAS);
writel            263 sound/soc/samsung/spdif.c 	writel(clkcon, regs + CLKCON);
writel            286 sound/soc/samsung/spdif.c 	writel(con | CON_SW_RESET, regs + CON);
writel            289 sound/soc/samsung/spdif.c 	writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
writel            304 sound/soc/samsung/spdif.c 	writel(con | CON_SW_RESET, spdif->regs + CON);
writel            316 sound/soc/samsung/spdif.c 	writel(spdif->saved_clkcon, spdif->regs	+ CLKCON);
writel            317 sound/soc/samsung/spdif.c 	writel(spdif->saved_con, spdif->regs + CON);
writel            318 sound/soc/samsung/spdif.c 	writel(spdif->saved_cstas, spdif->regs + CSTAS);
writel            253 sound/soc/sof/intel/hda-ctrl.c 		writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
writel             26 sound/soc/sof/utils.c 	writel(value, addr);
writel             52 sound/soc/spear/spdif_in.c 	writel(ctrl, host->io_base + SPDIF_IN_CTRL);
writel             53 sound/soc/spear/spdif_in.c 	writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK);
writel             74 sound/soc/spear/spdif_in.c 	writel(0x0, host->io_base + SPDIF_IN_IRQ_MASK);
writel             91 sound/soc/spear/spdif_in.c 	writel(ctrl, host->io_base + SPDIF_IN_CTRL);
writel            130 sound/soc/spear/spdif_in.c 		writel(ctrl, host->io_base + SPDIF_IN_CTRL);
writel            131 sound/soc/spear/spdif_in.c 		writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK);
writel            139 sound/soc/spear/spdif_in.c 		writel(ctrl, host->io_base + SPDIF_IN_CTRL);
writel            140 sound/soc/spear/spdif_in.c 		writel(0x0, host->io_base + SPDIF_IN_IRQ_MASK);
writel            196 sound/soc/spear/spdif_in.c 	writel(0, host->io_base + SPDIF_IN_IRQ);
writel             46 sound/soc/spear/spdif_out.c 	writel(SPDIF_OUT_RESET, host->io_base + SPDIF_OUT_SOFT_RST);
writel             48 sound/soc/spear/spdif_out.c 	writel(readl(host->io_base + SPDIF_OUT_SOFT_RST) & ~SPDIF_OUT_RESET,
writel             51 sound/soc/spear/spdif_out.c 	writel(SPDIF_OUT_FDMA_TRIG_16 | SPDIF_OUT_MEMFMT_16_16 |
writel             56 sound/soc/spear/spdif_out.c 	writel(0x7F, host->io_base + SPDIF_OUT_INT_STA_CLR);
writel             57 sound/soc/spear/spdif_out.c 	writel(0x7F, host->io_base + SPDIF_OUT_INT_EN_CLR);
writel            102 sound/soc/spear/spdif_out.c 	writel(ctrl, host->io_base + SPDIF_OUT_CTRL);
writel            172 sound/soc/spear/spdif_out.c 			writel(ctrl, host->io_base + SPDIF_OUT_CTRL);
writel            181 sound/soc/spear/spdif_out.c 		writel(ctrl, host->io_base + SPDIF_OUT_CTRL);
writel            209 sound/soc/spear/spdif_out.c 	writel(val, host->io_base + SPDIF_OUT_CTRL);
writel             35 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(readl(base) | ADDA_PR_RESET, base);
writel             38 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(readl(base) & ~ADDA_PR_WRITE, base);
writel             44 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(tmp, base);
writel             58 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(readl(base) | ADDA_PR_RESET, base);
writel             64 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(tmp, base);
writel             70 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(tmp, base);
writel             73 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(readl(base) | ADDA_PR_WRITE, base);
writel             76 sound/soc/sunxi/sun8i-adda-pr-regmap.c 	writel(readl(base) & ~ADDA_PR_WRITE, base);
writel             58 sound/soc/ti/davinci-vcif.c 	writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
writel             76 sound/soc/ti/davinci-vcif.c 	writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
writel             92 sound/soc/ti/davinci-vcif.c 	writel(DAVINCI_VC_CTRL_MASK, davinci_vc->base + DAVINCI_VC_CTRL);
writel             94 sound/soc/ti/davinci-vcif.c 	writel(DAVINCI_VC_INT_MASK, davinci_vc->base + DAVINCI_VC_INTCLR);
writel             96 sound/soc/ti/davinci-vcif.c 	writel(DAVINCI_VC_INT_MASK, davinci_vc->base + DAVINCI_VC_INTEN);
writel            126 sound/soc/ti/davinci-vcif.c 	writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
writel            141 sound/soc/ux500/ux500_msp_i2s.c 	writel(temp_reg, msp->registers + MSP_TCF);
writel            169 sound/soc/ux500/ux500_msp_i2s.c 	writel(temp_reg, msp->registers + MSP_RCF);
writel            208 sound/soc/ux500/ux500_msp_i2s.c 	writel(temp_reg, msp->registers + MSP_GCR);
writel            211 sound/soc/ux500/ux500_msp_i2s.c 	writel(temp_reg, msp->registers + MSP_GCR);
writel            226 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR & ~SRG_ENABLE, msp->registers + MSP_GCR);
writel            258 sound/soc/ux500/ux500_msp_i2s.c 	writel(temp_reg, msp->registers + MSP_SRG);
writel            265 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | SRG_ENABLE, msp->registers + MSP_GCR);
writel            295 sound/soc/ux500/ux500_msp_i2s.c 			writel(reg_val_MCR | (mcfg->tx_multichannel_enable ?
writel            298 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->tx_channel_0_enable,
writel            300 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->tx_channel_1_enable,
writel            302 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->tx_channel_2_enable,
writel            304 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->tx_channel_3_enable,
writel            316 sound/soc/ux500/ux500_msp_i2s.c 			writel(reg_val_MCR | (mcfg->rx_multichannel_enable ?
writel            319 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->rx_channel_0_enable,
writel            321 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->rx_channel_1_enable,
writel            323 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->rx_channel_2_enable,
writel            325 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->rx_channel_3_enable,
writel            335 sound/soc/ux500/ux500_msp_i2s.c 			writel(reg_val_MCR |
writel            339 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->comparison_mask,
writel            341 sound/soc/ux500/ux500_msp_i2s.c 			writel(mcfg->comparison_value,
writel            385 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_DMACR, msp->registers + MSP_DMACR);
writel            387 sound/soc/ux500/ux500_msp_i2s.c 	writel(config->iodelay, msp->registers + MSP_IODLY);
writel            391 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | FRAME_GEN_ENABLE, msp->registers + MSP_GCR);
writel            402 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | RX_ENABLE, msp->registers + MSP_GCR);
writel            410 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR, msp->registers + MSP_GCR);
writel            419 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR | TX_ENABLE, msp->registers + MSP_GCR);
writel            420 sound/soc/ux500/ux500_msp_i2s.c 	writel(MSP_ITCR_ITEN | MSP_ITCR_TESTFIFO, msp->registers + MSP_ITCR);
writel            427 sound/soc/ux500/ux500_msp_i2s.c 	writel(0x0, msp->registers + MSP_ITCR);
writel            428 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR, msp->registers + MSP_GCR);
writel            482 sound/soc/ux500/ux500_msp_i2s.c 	writel(new_reg, msp->registers + MSP_GCR);
writel            506 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR & ~RX_ENABLE, msp->registers + MSP_GCR);
writel            508 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_DMACR & ~RX_DMA_ENABLE, msp->registers + MSP_DMACR);
writel            510 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_IMSC &
writel            522 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_GCR & ~TX_ENABLE, msp->registers + MSP_GCR);
writel            524 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_DMACR & ~TX_DMA_ENABLE, msp->registers + MSP_DMACR);
writel            526 sound/soc/ux500/ux500_msp_i2s.c 	writel(reg_val_IMSC &
writel            544 sound/soc/ux500/ux500_msp_i2s.c 		writel(reg_val_GCR | LOOPBACK_MASK,
writel            551 sound/soc/ux500/ux500_msp_i2s.c 		writel((readl(msp->registers + MSP_GCR) &
writel            558 sound/soc/ux500/ux500_msp_i2s.c 		writel((readl(msp->registers + MSP_GCR) &
writel            591 sound/soc/ux500/ux500_msp_i2s.c 		writel(reg_val_GCR | enable_bit, msp->registers + MSP_GCR);
writel            619 sound/soc/ux500/ux500_msp_i2s.c 		writel((readl(msp->registers + MSP_GCR) &
writel            623 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_GCR);
writel            624 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_TCF);
writel            625 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_RCF);
writel            626 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_DMACR);
writel            627 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_SRG);
writel            628 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_MCR);
writel            629 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_RCM);
writel            630 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_RCV);
writel            631 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_TCE0);
writel            632 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_TCE1);
writel            633 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_TCE2);
writel            634 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_TCE3);
writel            635 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_RCE0);
writel            636 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_RCE1);
writel            637 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_RCE2);
writel            638 sound/soc/ux500/ux500_msp_i2s.c 		writel(0, msp->registers + MSP_RCE3);
writel            251 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(val, mmio_base + XLNX_AUD_CTRL);
writel            275 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(val, mmio_base + XLNX_AUD_CTRL);
writel            288 sound/soc/xilinx/xlnx_formatter_pcm.c 		writel(val & AUD_STS_IOC_IRQ_MASK, reg);
writel            307 sound/soc/xilinx/xlnx_formatter_pcm.c 		writel(val & AUD_STS_IOC_IRQ_MASK, reg);
writel            385 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(val, stream_data->mmio + XLNX_AUD_CTRL);
writel            466 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(low, stream_data->mmio + XLNX_AUD_BUFF_ADDR_LSB);
writel            467 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(high, stream_data->mmio + XLNX_AUD_BUFF_ADDR_MSB);
writel            492 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(val, stream_data->mmio + XLNX_AUD_CTRL);
writel            496 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(val, stream_data->mmio + XLNX_AUD_PERIOD_CONFIG);
writel            498 sound/soc/xilinx/xlnx_formatter_pcm.c 	writel(bytes_per_ch, stream_data->mmio + XLNX_BYTES_PER_CH);
writel            521 sound/soc/xilinx/xlnx_formatter_pcm.c 		writel(val, stream_data->mmio + XLNX_AUD_CTRL);
writel            528 sound/soc/xilinx/xlnx_formatter_pcm.c 		writel(val, stream_data->mmio + XLNX_AUD_CTRL);
writel             33 sound/soc/xilinx/xlnx_i2s.c 	writel(div, base + I2S_I2STIM_OFFSET);
writel             49 sound/soc/xilinx/xlnx_i2s.c 		writel(chan_id, base + reg_off);
writel             65 sound/soc/xilinx/xlnx_i2s.c 		writel(1, base + I2S_CORE_CTRL_OFFSET);
writel             70 sound/soc/xilinx/xlnx_i2s.c 		writel(0, base + I2S_CORE_CTRL_OFFSET);
writel             62 sound/soc/xilinx/xlnx_spdif.c 		writel(val & XSPDIF_CH_STS_MASK,
writel             66 sound/soc/xilinx/xlnx_spdif.c 		writel(val & ~XSPDIF_CH_STS_MASK,
writel             85 sound/soc/xilinx/xlnx_spdif.c 	writel(val, ctx->base + XSPDIF_CONTROL_REG);
writel             88 sound/soc/xilinx/xlnx_spdif.c 		writel(XSPDIF_CH_STS_MASK,
writel             90 sound/soc/xilinx/xlnx_spdif.c 		writel(XSPDIF_GLOBAL_IRQ_ENABLE,
writel            102 sound/soc/xilinx/xlnx_spdif.c 	writel(XSPDIF_SOFT_RESET_VALUE, ctx->base + XSPDIF_SOFT_RESET_REG);
writel            144 sound/soc/xilinx/xlnx_spdif.c 	writel(val, ctx->base + XSPDIF_CONTROL_REG);
writel            181 sound/soc/xilinx/xlnx_spdif.c 		writel(val, ctx->base + XSPDIF_CONTROL_REG);
writel            189 sound/soc/xilinx/xlnx_spdif.c 		writel(val, ctx->base + XSPDIF_CONTROL_REG);
writel            310 sound/soc/xilinx/xlnx_spdif.c 	writel(XSPDIF_SOFT_RESET_VALUE, ctx->base + XSPDIF_SOFT_RESET_REG);