write_sysreg 108 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, a32); \ write_sysreg 118 arch/arm/include/asm/arch_gicv3.h write_sysreg(lower_32_bits(val), a32lo);\ write_sysreg 119 arch/arm/include/asm/arch_gicv3.h write_sysreg(upper_32_bits(val), a32hi);\ write_sysreg 181 arch/arm/include/asm/arch_gicv3.h write_sysreg(irq, ICC_EOIR1); write_sysreg 187 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, ICC_DIR); write_sysreg 202 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, ICC_CTLR); write_sysreg 213 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, ICC_IGRPEN1); write_sysreg 219 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, ICC_SGI1R); write_sysreg 229 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, ICC_SRE); write_sysreg 235 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, ICC_BPR1); write_sysreg 245 arch/arm/include/asm/arch_gicv3.h write_sysreg(val, ICC_PMR); write_sysreg 86 arch/arm/include/asm/kvm_hyp.h #define write_sysreg_el0(v, r) write_sysreg(v, r##_EL0) write_sysreg 280 arch/arm/include/asm/kvm_mmu.h write_sysreg(addr, ICIMVAU); write_sysreg 295 arch/arm/include/asm/kvm_mmu.h write_sysreg(0, BPIALLIS); write_sysreg 47 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c0_MPIDR], VMPIDR); write_sysreg 48 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c0_CSSELR], CSSELR); write_sysreg 49 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c1_SCTLR], SCTLR); write_sysreg 50 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c1_CPACR], CPACR); write_sysreg 51 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(*cp15_64(ctxt, c2_TTBR0), TTBR0); write_sysreg 52 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(*cp15_64(ctxt, c2_TTBR1), TTBR1); write_sysreg 53 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c2_TTBCR], TTBCR); write_sysreg 54 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c3_DACR], DACR); write_sysreg 55 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c5_DFSR], DFSR); write_sysreg 56 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c5_IFSR], IFSR); write_sysreg 57 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c5_ADFSR], ADFSR); write_sysreg 58 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c5_AIFSR], AIFSR); write_sysreg 59 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c6_DFAR], DFAR); write_sysreg 60 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c6_IFAR], IFAR); write_sysreg 61 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(*cp15_64(ctxt, c7_PAR), PAR); write_sysreg 62 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c10_PRRR], PRRR); write_sysreg 63 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c10_NMRR], NMRR); write_sysreg 64 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c10_AMAIR0], AMAIR0); write_sysreg 65 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c10_AMAIR1], AMAIR1); write_sysreg 66 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c12_VBAR], VBAR); write_sysreg 67 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c13_CID], CID); write_sysreg 68 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c13_TID_URW], TID_URW); write_sysreg 69 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c13_TID_URO], TID_URO); write_sysreg 70 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c13_TID_PRIV], TID_PRIV); write_sysreg 71 arch/arm/kvm/hyp/cp15-sr.c write_sysreg(ctxt->cp15[c14_CNTKCTL], CNTKCTL); write_sysreg 21 arch/arm/kvm/hyp/s2-setup.c write_sysreg(val, VTCR); write_sysreg 32 arch/arm/kvm/hyp/switch.c write_sysreg(val | FPEXC_EN, VFP_FPEXC); write_sysreg 36 arch/arm/kvm/hyp/switch.c write_sysreg(vcpu->arch.hcr, HCR); write_sysreg 38 arch/arm/kvm/hyp/switch.c write_sysreg(HSTR_T(15), HSTR); write_sysreg 39 arch/arm/kvm/hyp/switch.c write_sysreg(HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11), HCPTR); write_sysreg 43 arch/arm/kvm/hyp/switch.c write_sysreg(val, HDCR); write_sysreg 59 arch/arm/kvm/hyp/switch.c write_sysreg(0, HCR); write_sysreg 60 arch/arm/kvm/hyp/switch.c write_sysreg(0, HSTR); write_sysreg 62 arch/arm/kvm/hyp/switch.c write_sysreg(val & ~(HDCR_TPM | HDCR_TPMCR), HDCR); write_sysreg 63 arch/arm/kvm/hyp/switch.c write_sysreg(0, HCPTR); write_sysreg 69 arch/arm/kvm/hyp/switch.c write_sysreg(kvm_get_vttbr(kvm), VTTBR); write_sysreg 70 arch/arm/kvm/hyp/switch.c write_sysreg(vcpu->arch.midr, VPIDR); write_sysreg 75 arch/arm/kvm/hyp/switch.c write_sysreg(0, VTTBR); write_sysreg 76 arch/arm/kvm/hyp/switch.c write_sysreg(read_sysreg(MIDR), VPIDR); write_sysreg 127 arch/arm/kvm/hyp/switch.c write_sysreg(far, ATS1CPR); write_sysreg 131 arch/arm/kvm/hyp/switch.c write_sysreg(par, PAR); write_sysreg 155 arch/arm/kvm/hyp/switch.c write_sysreg(vcpu, HTPIDR); write_sysreg 199 arch/arm/kvm/hyp/switch.c write_sysreg(fpexc, VFP_FPEXC); write_sysreg 33 arch/arm/kvm/hyp/tlb.c write_sysreg(kvm_get_vttbr(kvm), VTTBR); write_sysreg 36 arch/arm/kvm/hyp/tlb.c write_sysreg(0, TLBIALLIS); write_sysreg 40 arch/arm/kvm/hyp/tlb.c write_sysreg(0, VTTBR); write_sysreg 53 arch/arm/kvm/hyp/tlb.c write_sysreg(kvm_get_vttbr(kvm), VTTBR); write_sysreg 56 arch/arm/kvm/hyp/tlb.c write_sysreg(0, TLBIALL); write_sysreg 60 arch/arm/kvm/hyp/tlb.c write_sysreg(0, VTTBR); write_sysreg 65 arch/arm/kvm/hyp/tlb.c write_sysreg(0, TLBIALLNSNHIS); write_sysreg 66 arch/arm/kvm/hyp/tlb.c write_sysreg(0, ICIALLUIS); write_sysreg 49 arch/arm/mm/pmsa-v7.c write_sysreg(v, RNGNR); write_sysreg 57 arch/arm/mm/pmsa-v7.c write_sysreg(v, DRACR); write_sysreg 63 arch/arm/mm/pmsa-v7.c write_sysreg(v, DRSR); write_sysreg 69 arch/arm/mm/pmsa-v7.c write_sysreg(v, DRBAR); write_sysreg 81 arch/arm/mm/pmsa-v7.c write_sysreg(v, IRACR); write_sysreg 87 arch/arm/mm/pmsa-v7.c write_sysreg(v, IRSR); write_sysreg 93 arch/arm/mm/pmsa-v7.c write_sysreg(v, IRBAR); write_sysreg 37 arch/arm/mm/pmsa-v8.c write_sysreg(v, PRSEL); write_sysreg 42 arch/arm/mm/pmsa-v8.c write_sysreg(v, PRBAR); write_sysreg 47 arch/arm/mm/pmsa-v8.c write_sysreg(v, PRLAR); write_sysreg 22 arch/arm/mm/proc-v7-bugs.c write_sysreg(0, BPIALL); write_sysreg 27 arch/arm/mm/proc-v7-bugs.c write_sysreg(0, ICIALLU); write_sysreg 109 arch/arm64/include/asm/arch_timer.h write_sysreg(val, cntp_ctl_el0); write_sysreg 112 arch/arm64/include/asm/arch_timer.h write_sysreg(val, cntp_tval_el0); write_sysreg 118 arch/arm64/include/asm/arch_timer.h write_sysreg(val, cntv_ctl_el0); write_sysreg 121 arch/arm64/include/asm/arch_timer.h write_sysreg(val, cntv_tval_el0); write_sysreg 163 arch/arm64/include/asm/arch_timer.h write_sysreg(cntkctl, cntkctl_el1); write_sysreg 115 arch/arm64/include/asm/daifflags.h write_sysreg(flags, daif); write_sysreg 37 arch/arm64/include/asm/dcc.h write_sysreg((unsigned char)c, dbgdtrtx_el0); write_sysreg 55 arch/arm64/include/asm/efi.h #define arch_efi_restore_flags(state_flags) write_sysreg(state_flags, daif) write_sysreg 45 arch/arm64/include/asm/hardirq.h write_sysreg(nmi_ctx->hcr | HCR_TGE, hcr_el2); \ write_sysreg 56 arch/arm64/include/asm/hardirq.h write_sysreg(nmi_ctx->hcr, hcr_el2); \ write_sysreg 104 arch/arm64/include/asm/hw_breakpoint.h write_sysreg(VAL, dbg##REG##N##_el1);\ write_sysreg 90 arch/arm64/include/asm/kvm_hyp.h write_sysreg(kvm->arch.vtcr, vtcr_el2); write_sysreg 91 arch/arm64/include/asm/kvm_hyp.h write_sysreg(kvm_get_vttbr(kvm), vttbr_el2); write_sysreg 34 arch/arm64/include/asm/mmu_context.h write_sysreg(task_pid_nr(next), contextidr_el1); write_sysreg 45 arch/arm64/include/asm/mmu_context.h write_sysreg(ttbr, ttbr0_el1); write_sysreg 94 arch/arm64/include/asm/mmu_context.h write_sysreg(tcr, tcr_el1); write_sysreg 840 arch/arm64/include/asm/sysreg.h write_sysreg(__scs_new, sysreg); \ write_sysreg 116 arch/arm64/include/asm/uaccess.h write_sysreg(ttbr - RESERVED_TTBR0_SIZE, ttbr0_el1); write_sysreg 119 arch/arm64/include/asm/uaccess.h write_sysreg(ttbr, ttbr1_el1); write_sysreg 140 arch/arm64/include/asm/uaccess.h write_sysreg(ttbr1, ttbr1_el1); write_sysreg 144 arch/arm64/include/asm/uaccess.h write_sysreg(ttbr0, ttbr0_el1); write_sysreg 1090 arch/arm64/kernel/cpufeature.c write_sysreg(tcr, tcr_el1); write_sysreg 1167 arch/arm64/kernel/cpufeature.c write_sysreg(read_sysreg(tpidr_el1), tpidr_el2); write_sysreg 41 arch/arm64/kernel/debug-monitors.c write_sysreg(mdscr, mdscr_el1); write_sysreg 127 arch/arm64/kernel/debug-monitors.c write_sysreg(0, osdlr_el1); write_sysreg 128 arch/arm64/kernel/debug-monitors.c write_sysreg(0, oslar_el1); write_sysreg 810 arch/arm64/kernel/fpsimd.c write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); write_sysreg 272 arch/arm64/kernel/hibernate.c write_sysreg(phys_to_ttbr(virt_to_phys(pgdp)), ttbr0_el1); write_sysreg 381 arch/arm64/kernel/perf_event.c write_sysreg(val, pmcr_el0); write_sysreg 403 arch/arm64/kernel/perf_event.c write_sysreg(counter, pmselr_el0); write_sysreg 445 arch/arm64/kernel/perf_event.c write_sysreg(value, pmxevcntr_el0); write_sysreg 479 arch/arm64/kernel/perf_event.c write_sysreg(value, pmccntr_el0); write_sysreg 488 arch/arm64/kernel/perf_event.c write_sysreg(val, pmxevtyper_el0); write_sysreg 515 arch/arm64/kernel/perf_event.c write_sysreg(BIT(counter), pmcntenset_el0); write_sysreg 541 arch/arm64/kernel/perf_event.c write_sysreg(BIT(counter), pmcntenclr_el0); write_sysreg 568 arch/arm64/kernel/perf_event.c write_sysreg(BIT(counter), pmintenset_el1); write_sysreg 580 arch/arm64/kernel/perf_event.c write_sysreg(BIT(counter), pmintenclr_el1); write_sysreg 583 arch/arm64/kernel/perf_event.c write_sysreg(BIT(counter), pmovsclr_el0); write_sysreg 603 arch/arm64/kernel/perf_event.c write_sysreg(value, pmovsclr_el0); write_sysreg 83 arch/arm64/kernel/process.c write_sysreg(daif_bits | PSR_I_BIT, daif); write_sysreg 95 arch/arm64/kernel/process.c write_sysreg(daif_bits, daif); write_sysreg 299 arch/arm64/kernel/process.c write_sysreg(0, tpidr_el0); write_sysreg 310 arch/arm64/kernel/process.c write_sysreg(0, tpidrro_el0); write_sysreg 436 arch/arm64/kernel/process.c write_sysreg(next->thread.uw.tp_value, tpidrro_el0); write_sysreg 438 arch/arm64/kernel/process.c write_sysreg(0, tpidrro_el0); write_sysreg 440 arch/arm64/kernel/process.c write_sysreg(*task_user_tls(next), tpidr_el0); write_sysreg 99 arch/arm64/kernel/sys_compat.c write_sysreg(regs->regs[0], tpidrro_el0); write_sysreg 80 arch/arm64/kernel/syscall.c write_sysreg(val, mdscr_el1); write_sysreg 86 arch/arm64/kernel/syscall.c write_sysreg(reg, mdscr_el1); write_sysreg 202 arch/arm64/kvm/debug.c write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); write_sysreg 16 arch/arm64/kvm/hyp/debug-sr.c #define write_debug(v,r,n) write_sysreg(v, r##n##_el1) write_sysreg 168 arch/arm64/kvm/hyp/debug-sr.c write_sysreg(ctxt->sys_regs[MDCCINT_EL1], mdccint_el1); write_sysreg 67 arch/arm64/kvm/hyp/switch.c write_sysreg(1 << 30, fpexc32_el2); write_sysreg 75 arch/arm64/kvm/hyp/switch.c write_sysreg(1 << 15, hstr_el2); write_sysreg 83 arch/arm64/kvm/hyp/switch.c write_sysreg(0, pmselr_el0); write_sysreg 84 arch/arm64/kvm/hyp/switch.c write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0); write_sysreg 85 arch/arm64/kvm/hyp/switch.c write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); write_sysreg 90 arch/arm64/kvm/hyp/switch.c write_sysreg(0, hstr_el2); write_sysreg 91 arch/arm64/kvm/hyp/switch.c write_sysreg(0, pmuserenr_el0); write_sysreg 109 arch/arm64/kvm/hyp/switch.c write_sysreg(val, cpacr_el1); write_sysreg 111 arch/arm64/kvm/hyp/switch.c write_sysreg(kvm_get_hyp_vector(), vbar_el1); write_sysreg 128 arch/arm64/kvm/hyp/switch.c write_sysreg(val, cptr_el2); write_sysreg 138 arch/arm64/kvm/hyp/switch.c write_sysreg(hcr, hcr_el2); write_sysreg 152 arch/arm64/kvm/hyp/switch.c write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2); write_sysreg 161 arch/arm64/kvm/hyp/switch.c write_sysreg(CPACR_EL1_DEFAULT, cpacr_el1); write_sysreg 162 arch/arm64/kvm/hyp/switch.c write_sysreg(vectors, vbar_el1); write_sysreg 175 arch/arm64/kvm/hyp/switch.c write_sysreg(mdcr_el2, mdcr_el2); write_sysreg 176 arch/arm64/kvm/hyp/switch.c write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2); write_sysreg 177 arch/arm64/kvm/hyp/switch.c write_sysreg(CPTR_EL2_DEFAULT, cptr_el2); write_sysreg 212 arch/arm64/kvm/hyp/switch.c write_sysreg(mdcr_el2, mdcr_el2); write_sysreg 224 arch/arm64/kvm/hyp/switch.c write_sysreg(0, vttbr_el2); write_sysreg 264 arch/arm64/kvm/hyp/switch.c write_sysreg(par, par_el1); write_sysreg 350 arch/arm64/kvm/hyp/switch.c write_sysreg(reg, cpacr_el1); write_sysreg 352 arch/arm64/kvm/hyp/switch.c write_sysreg(read_sysreg(cptr_el2) & ~(u64)CPTR_EL2_TFP, write_sysreg 388 arch/arm64/kvm/hyp/switch.c write_sysreg(vcpu->arch.ctxt.sys_regs[FPEXC32_EL2], write_sysreg 570 arch/arm64/kvm/hyp/switch.c write_sysreg(pmu->events_host, pmcntenclr_el0); write_sysreg 573 arch/arm64/kvm/hyp/switch.c write_sysreg(pmu->events_guest, pmcntenset_el0); write_sysreg 590 arch/arm64/kvm/hyp/switch.c write_sysreg(pmu->events_guest, pmcntenclr_el0); write_sysreg 593 arch/arm64/kvm/hyp/switch.c write_sysreg(pmu->events_host, pmcntenset_el0); write_sysreg 101 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1); write_sysreg 107 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->gp_regs.regs.sp, sp_el0); write_sysreg 112 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0); write_sysreg 113 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0); write_sysreg 118 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2); write_sysreg 119 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1); write_sysreg 121 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1); write_sysreg 135 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1); write_sysreg 136 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1); write_sysreg 138 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(ctxt->gp_regs.sp_el1, sp_el1); write_sysreg 223 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt); write_sysreg 224 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(spsr[KVM_SPSR_UND], spsr_und); write_sysreg 225 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq); write_sysreg 226 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq); write_sysreg 228 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(sysreg[DACR32_EL2], dacr32_el2); write_sysreg 229 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(sysreg[IFSR32_EL2], ifsr32_el2); write_sysreg 232 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2); write_sysreg 59 arch/arm64/kvm/hyp/tlb.c write_sysreg(val, hcr_el2); write_sysreg 86 arch/arm64/kvm/hyp/tlb.c write_sysreg(0, vttbr_el2); write_sysreg 87 arch/arm64/kvm/hyp/tlb.c write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2); write_sysreg 102 arch/arm64/kvm/hyp/tlb.c write_sysreg(0, vttbr_el2); write_sysreg 62 arch/arm64/kvm/pmu.c write_sysreg(val, pmevtyper##idx##_el0); \ write_sysreg 124 arch/arm64/kvm/pmu.c write_sysreg(val, pmccfiltr_el0); write_sysreg 183 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_abt); write_sysreg 186 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_und); write_sysreg 189 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_irq); write_sysreg 192 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_fiq); write_sysreg 168 arch/arm64/kvm/sys_regs.c write_sysreg(csselr, csselr_el1); write_sysreg 396 drivers/clocksource/arm_arch_timer.c write_sysreg(cval, cntp_cval_el0); write_sysreg 399 drivers/clocksource/arm_arch_timer.c write_sysreg(cval, cntv_cval_el0); write_sysreg 1103 virt/kvm/arm/arch_timer.c write_sysreg(val, cnthctl_el2); write_sysreg 16 virt/kvm/arm/hyp/timer-sr.c write_sysreg(cntvoff, cntvoff_el2); write_sysreg 30 virt/kvm/arm/hyp/timer-sr.c write_sysreg(val, cnthctl_el2); write_sysreg 48 virt/kvm/arm/hyp/timer-sr.c write_sysreg(val, cnthctl_el2);