write_gicreg 901 drivers/irqchip/irq-gic-v3.c write_gicreg(DEFAULT_PMR_VALUE, ICC_PMR_EL1); write_gicreg 933 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP0R3_EL1); write_gicreg 934 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP0R2_EL1); write_gicreg 937 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP0R1_EL1); write_gicreg 941 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP0R0_EL1); write_gicreg 950 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP1R3_EL1); write_gicreg 951 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP1R2_EL1); write_gicreg 954 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP1R1_EL1); write_gicreg 958 drivers/irqchip/irq-gic-v3.c write_gicreg(0, ICC_AP1R0_EL1); write_gicreg 63 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR0_EL2); write_gicreg 66 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR1_EL2); write_gicreg 69 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR2_EL2); write_gicreg 72 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR3_EL2); write_gicreg 75 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR4_EL2); write_gicreg 78 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR5_EL2); write_gicreg 81 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR6_EL2); write_gicreg 84 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR7_EL2); write_gicreg 87 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR8_EL2); write_gicreg 90 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR9_EL2); write_gicreg 93 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR10_EL2); write_gicreg 96 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR11_EL2); write_gicreg 99 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR12_EL2); write_gicreg 102 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR13_EL2); write_gicreg 105 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR14_EL2); write_gicreg 108 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_LR15_EL2); write_gicreg 117 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP0R0_EL2); write_gicreg 120 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP0R1_EL2); write_gicreg 123 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP0R2_EL2); write_gicreg 126 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP0R3_EL2); write_gicreg 135 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP1R0_EL2); write_gicreg 138 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP1R1_EL2); write_gicreg 141 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP1R2_EL2); write_gicreg 144 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val, ICH_AP1R3_EL2); write_gicreg 220 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(cpu_if->vgic_hcr & ~ICH_HCR_EN, ICH_HCR_EL2); write_gicreg 240 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2); write_gicreg 275 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(0, ICC_SRE_EL1); write_gicreg 277 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(cpu_if->vgic_vmcr, ICH_VMCR_EL2); write_gicreg 296 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(read_gicreg(ICC_SRE_EL2) & ~ICC_SRE_EL2_ENABLE, write_gicreg 306 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2); write_gicreg 319 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(val | ICC_SRE_EL2_ENABLE, ICC_SRE_EL2); write_gicreg 324 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(1, ICC_SRE_EL1); write_gicreg 333 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(0, ICH_HCR_EL2); write_gicreg 431 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(vmcr, ICH_VMCR_EL2); write_gicreg 698 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(hcr, ICH_HCR_EL2); write_gicreg 951 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(vmcr, ICH_VMCR_EL2); write_gicreg 998 virt/kvm/arm/hyp/vgic-v3-sr.c write_gicreg(vmcr, ICH_VMCR_EL2);