write_enable 394 drivers/crypto/ccree/cc_hw_queue_defs.h u32 size, bool write_enable) write_enable 398 drivers/crypto/ccree/cc_hw_queue_defs.h FIELD_PREP(WORD3_DOUT_LAST_IND, write_enable); write_enable 53 drivers/input/serio/ps2-gpio.c bool write_enable; write_enable 178 drivers/input/serio/ps2-gpio.c if (!drvdata->write_enable) write_enable 185 drivers/input/serio/ps2-gpio.c if (!drvdata->write_enable) { write_enable 339 drivers/input/serio/ps2-gpio.c drvdata->write_enable = device_property_read_bool(dev, write_enable 393 drivers/input/serio/ps2-gpio.c serio->write = drvdata->write_enable ? ps2_gpio_write : NULL; write_enable 642 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 696 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1211 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1266 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1294 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1328 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1670 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1720 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1921 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 1965 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 2596 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 2642 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 2705 drivers/mtd/spi-nor/spi-nor.c write_enable(nor); write_enable 3102 drivers/pci/quirks.c u8 write_enable; write_enable 3118 drivers/pci/quirks.c pci_read_config_byte(dev, 0x8E, &write_enable); write_enable 3123 drivers/pci/quirks.c pci_write_config_byte(dev, 0x8E, write_enable); write_enable 3134 drivers/pci/quirks.c u8 write_enable; write_enable 3173 drivers/pci/quirks.c pci_read_config_byte(dev, 0xCA, &write_enable); write_enable 3176 drivers/pci/quirks.c pci_write_config_byte(dev, 0xCA, write_enable); write_enable 346 drivers/phy/rockchip/phy-rockchip-typec.c u32 write_enable; write_enable 563 drivers/phy/rockchip/phy-rockchip-typec.c u32 mask = 1 << reg->write_enable;