write_config      228 arch/powerpc/include/asm/eeh.h 	int (*write_config)(struct pci_dn *pdn, int where, int size, u32 val);
write_config      758 arch/powerpc/kernel/eeh.c 		eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
write_config      769 arch/powerpc/kernel/eeh.c 			eeh_ops->write_config(pdn,
write_config      778 arch/powerpc/kernel/eeh.c 	eeh_ops->write_config(pdn, PCI_COMMAND, 2, cmd);
write_config      788 arch/powerpc/kernel/eeh.c 		eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
write_config      797 arch/powerpc/kernel/eeh.c 		eeh_ops->write_config(pdn, edev->aer_cap + PCI_ERR_CAP,
write_config      731 arch/powerpc/kernel/eeh_pe.c 			eeh_ops->write_config(pdn, cap + PCI_EXP_SLTCTL, 2, val);
write_config      739 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, cap + PCI_EXP_LNKCTL, 2, val);
write_config      780 arch/powerpc/kernel/eeh_pe.c 		eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
write_config      782 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, 14*4, 4, edev->config_space[14]);
write_config      785 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
write_config      787 arch/powerpc/kernel/eeh_pe.c         eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
write_config      790 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
write_config      793 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1] |
write_config      807 arch/powerpc/kernel/eeh_pe.c 		eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
write_config      809 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, 12*4, 4, edev->config_space[12]);
write_config      811 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
write_config      813 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
write_config      817 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
write_config      832 arch/powerpc/kernel/eeh_pe.c 	eeh_ops->write_config(pdn, PCI_COMMAND, 4, cmd);
write_config      865 arch/powerpc/platforms/powernv/eeh-powernv.c 			eeh_ops->write_config(pdn, aer + PCI_ERR_UNCOR_MASK,
write_config      871 arch/powerpc/platforms/powernv/eeh-powernv.c 		eeh_ops->write_config(pdn, PCI_BRIDGE_CONTROL, 2, ctrl);
write_config      878 arch/powerpc/platforms/powernv/eeh-powernv.c 		eeh_ops->write_config(pdn, PCI_BRIDGE_CONTROL, 2, ctrl);
write_config      887 arch/powerpc/platforms/powernv/eeh-powernv.c 			eeh_ops->write_config(pdn, aer + PCI_ERR_UNCOR_MASK,
write_config      994 arch/powerpc/platforms/powernv/eeh-powernv.c 		eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
write_config     1002 arch/powerpc/platforms/powernv/eeh-powernv.c 		eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
write_config     1034 arch/powerpc/platforms/powernv/eeh-powernv.c 		eeh_ops->write_config(pdn, edev->af_cap + PCI_AF_CTRL,
write_config     1039 arch/powerpc/platforms/powernv/eeh-powernv.c 		eeh_ops->write_config(pdn, edev->af_cap + PCI_AF_CTRL, 1, 0);
write_config     1689 arch/powerpc/platforms/powernv/eeh-powernv.c 	.write_config           = pnv_eeh_write_config,
write_config      788 arch/powerpc/platforms/pseries/eeh_pseries.c 	.write_config		= pseries_eeh_write_config,
write_config      545 drivers/staging/mt7621-pci/pci-mt7621.c 		write_config(pcie, slot, PCI_COMMAND, val);
write_config      550 drivers/staging/mt7621-pci/pci-mt7621.c 		write_config(pcie, slot, PCIE_FTS_NUM, val);