DAR 222 arch/sh/drivers/dma/dma-sh.c __raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR)); DAR 140 drivers/dma/dw/core.c channel_readl(dwc, DAR), DAR 169 drivers/dma/dw/core.c channel_writel(dwc, DAR, lli_read(desc, dar)); DAR 41 drivers/dma/dw/regs.h DW_REG(DAR); /* Destination Address Register */ DAR 95 drivers/dma/idma64.c channel_writeq(idma64c, DAR, 0); DAR 724 drivers/dma/pl330.c dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); DAR 1388 drivers/dma/pl330.c off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); DAR 218 drivers/dma/sh/shdmac.c sh_dmae_writel(sh_chan, hw->dar, DAR); DAR 461 drivers/dma/sh/shdmac.c u32 dar_buf = sh_dmae_readl(sh_chan, DAR); DAR 291 drivers/dma/txx9dmac.c channel64_readq(dc, DAR), DAR 303 drivers/dma/txx9dmac.c channel32_readl(dc, DAR), DAR 317 drivers/dma/txx9dmac.c channel_writeq(dc, DAR, 0); DAR 321 drivers/dma/txx9dmac.c channel_writel(dc, DAR, 0); DAR 474 drivers/dma/txx9dmac.c (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); DAR 479 drivers/dma/txx9dmac.c (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, DAR 487 drivers/dma/txx9dmac.c d->CHAR, d->SAR, d->DAR, d->CNTR); DAR 492 drivers/dma/txx9dmac.c d->CHAR, d->SAR, d->DAR, d->CNTR, DAR 756 drivers/dma/txx9dmac.c desc->hwdesc.DAR = dest + offset; DAR 762 drivers/dma/txx9dmac.c desc->hwdesc32.DAR = dest + offset; DAR 843 drivers/dma/txx9dmac.c desc->hwdesc.DAR = ds->tx_reg; DAR 846 drivers/dma/txx9dmac.c desc->hwdesc.DAR = mem; DAR 852 drivers/dma/txx9dmac.c desc->hwdesc32.DAR = ds->tx_reg; DAR 855 drivers/dma/txx9dmac.c desc->hwdesc32.DAR = mem; DAR 73 drivers/dma/txx9dmac.h u64 DAR; /* Destination Address Register */ DAR 83 drivers/dma/txx9dmac.h u32 DAR; DAR 207 drivers/dma/txx9dmac.h u64 DAR; DAR 213 drivers/dma/txx9dmac.h u32 DAR;