wait_for 133 drivers/gpu/drm/gma500/cdv_intel_display.c ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); wait_for 145 drivers/gpu/drm/gma500/cdv_intel_display.c ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); wait_for 168 drivers/gpu/drm/gma500/cdv_intel_display.c ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); wait_for 181 drivers/gpu/drm/gma500/cdv_intel_display.c ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); wait_for 431 drivers/gpu/drm/gma500/cdv_intel_dp.c if (wait_for(((REG_READ(PP_STATUS) & idle_on_mask) == idle_on_mask), 1000)) { wait_for 465 drivers/gpu/drm/gma500/cdv_intel_dp.c if (wait_for((REG_READ(PP_STATUS) & idle_off_mask) == 0, 1000)) { wait_for 279 drivers/gpu/drm/gma500/intel_gmbus.c if (wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) & wait_for 308 drivers/gpu/drm/gma500/intel_gmbus.c if (wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) & wait_for 325 drivers/gpu/drm/gma500/intel_gmbus.c if (i + 1 < num && wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50)) wait_for 562 drivers/gpu/drm/i915/display/intel_cdclk.c if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & wait_for 580 drivers/gpu/drm/i915/display/intel_cdclk.c if (wait_for((vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL) & wait_for 644 drivers/gpu/drm/i915/display/intel_cdclk.c if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & wait_for 1597 drivers/gpu/drm/i915/display/intel_cdclk.c if (wait_for((I915_READ(BXT_DE_PLL_ENABLE) & BXT_DE_PLL_LOCK) == 0, 1)) wait_for 1615 drivers/gpu/drm/i915/display/intel_cdclk.c if (wait_for((I915_READ(BXT_DE_PLL_ENABLE) & BXT_DE_PLL_LOCK) != 0, 1)) wait_for 1054 drivers/gpu/drm/i915/display/intel_display.c if (wait_for(pipe_scanline_is_moving(dev_priv, pipe) == state, 100)) wait_for 5321 drivers/gpu/drm/i915/display/intel_display.c if (wait_for(I915_READ(dslreg) != temp, 5)) { wait_for 5322 drivers/gpu/drm/i915/display/intel_display.c if (wait_for(I915_READ(dslreg) != temp, 5)) wait_for 365 drivers/gpu/drm/i915/display/intel_display_power.c wait_for((disabled = !(I915_READ(regs->driver) & wait_for 1081 drivers/gpu/drm/i915/display/intel_display_power.c if (wait_for(COND, 100)) wait_for 1660 drivers/gpu/drm/i915/display/intel_display_power.c if (wait_for(COND, 100)) wait_for 4344 drivers/gpu/drm/i915/display/intel_display_power.c if (wait_for((hsw_read_dcomp(dev_priv) & wait_for 345 drivers/gpu/drm/i915/display/intel_gmbus.c ret = wait_for((gmbus2 = I915_READ_FW(GMBUS2)) & status, 50); wait_for 664 drivers/gpu/drm/i915/display/intel_hdcp.c if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) & wait_for 695 drivers/gpu/drm/i915/display/intel_hdcp.c if (!wait_for(I915_READ(PORT_HDCP_STATUS(port)) & wait_for 1508 drivers/gpu/drm/i915/display/intel_hdmi.c if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) & wait_for 131 drivers/gpu/drm/i915/display/intel_lspcon.c wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400); wait_for 337 drivers/gpu/drm/i915/display/intel_opregion.c if (wait_for(C, dslp)) { wait_for 225 drivers/gpu/drm/i915/display/intel_tc.c if (enable && wait_for(!icl_tc_phy_status_complete(dig_port), 10)) wait_for 168 drivers/gpu/drm/i915/display/vlv_dsi_pll.c if (wait_for(vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL) & wait_for 296 drivers/gpu/drm/i915/gt/selftest_hangcheck.c wait_for(i915_seqno_passed(hws_seqno(h, rq), wait_for 365 drivers/gpu/drm/i915/gt/selftest_hangcheck.c return wait_for(intel_engine_is_idle(engine), IGT_IDLE_TIMEOUT) == 0; wait_for 1290 drivers/gpu/drm/i915/gt/selftest_hangcheck.c if (wait_for(!list_empty(&rq->fence.cb_list), 10)) { wait_for 412 drivers/gpu/drm/i915/gt/selftest_lrc.c if (wait_for(READ_ONCE(*map), 10)) { wait_for 387 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c err = wait_for(done, 10); wait_for 433 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c err = wait_for(done, 10); wait_for 104 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c ret = wait_for(guc_ready(uncore, &status), 100); wait_for 69 drivers/gpu/drm/i915/gt/uc/selftest_guc.c err = wait_for(READ_ONCE(desc->head) == READ_ONCE(desc->tail), 10); wait_for 3611 drivers/gpu/drm/i915/i915_debugfs.c wait_for(intel_engines_are_idle(&i915->gt), wait_for 2430 drivers/gpu/drm/i915/i915_drv.c ret = wait_for(((reg_value = wait_for 344 drivers/gpu/drm/i915/intel_pm.c if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & wait_for 6157 drivers/gpu/drm/i915/intel_pm.c if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & wait_for 1916 drivers/gpu/drm/i915/intel_uncore.c ret = wait_for(done, slow_timeout_ms); wait_for 200 drivers/gpu/drm/i915/selftests/igt_spinner.c wait_for(i915_seqno_passed(hws_seqno(spin, rq), wait_for 241 drivers/gpu/drm/i915/selftests/intel_uncore.c if (wait_for(readl(reg) == 0, 100)) { wait_for 52 drivers/gpu/drm/v3d/v3d_gem.c if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS) & wait_for 68 drivers/gpu/drm/v3d/v3d_gem.c if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) & wait_for 197 drivers/gpu/drm/v3d/v3d_gem.c if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & wait_for 207 drivers/gpu/drm/v3d/v3d_gem.c if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & wait_for 40 drivers/gpu/drm/v3d/v3d_mmu.c ret = wait_for(!(V3D_READ(V3D_MMU_CTL) & wait_for 52 drivers/gpu/drm/v3d/v3d_mmu.c ret = wait_for(!(V3D_READ(V3D_MMU_CTL) & wait_for 59 drivers/gpu/drm/v3d/v3d_mmu.c ret = wait_for(!(V3D_READ(V3D_MMUC_CONTROL) & wait_for 467 drivers/gpu/drm/vc4/vc4_crtc.c ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1); wait_for 702 drivers/gpu/drm/vc4/vc4_dsi.c ret = wait_for((DSI_PORT_READ(STAT) & stat_ulps) == stat_ulps, 200); wait_for 721 drivers/gpu/drm/vc4/vc4_dsi.c ret = wait_for((DSI_PORT_READ(STAT) & stat_stop) == stat_stop, 200); wait_for 325 drivers/gpu/drm/vc4/vc4_hdmi.c return wait_for(!(HDMI_READ(VC4_HDMI_RAM_PACKET_STATUS) & wait_for 371 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for((HDMI_READ(VC4_HDMI_RAM_PACKET_STATUS) & wait_for 628 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) & wait_for 640 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for(!(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) & wait_for 673 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for(HDMI_READ(VC4_HDMI_FIFO_CTL) & wait_for 234 drivers/mmc/host/sh_mmcif.c enum sh_mmcif_wait_for wait_for; wait_for 584 drivers/mmc/host/sh_mmcif.c host->state, host->wait_for); wait_for 588 drivers/mmc/host/sh_mmcif.c host->state, host->wait_for); wait_for 592 drivers/mmc/host/sh_mmcif.c host->state, host->wait_for); wait_for 624 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_READ; wait_for 648 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_READ_END; wait_for 664 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_MREAD; wait_for 704 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_WRITE; wait_for 728 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_WRITE_END; wait_for 744 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_MWRITE; wait_for 938 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_CMD; wait_for 961 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_STOP; wait_for 1181 drivers/mmc/host/sh_mmcif.c wait_work = host->wait_for; wait_for 1191 drivers/mmc/host/sh_mmcif.c host->state, host->wait_for); wait_for 1252 drivers/mmc/host/sh_mmcif.c if (host->wait_for != MMCIF_WAIT_FOR_STOP) { wait_for 1268 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_REQUEST; wait_for 1333 drivers/mmc/host/sh_mmcif.c host->wait_for, mrq->cmd->opcode); wait_for 1342 drivers/mmc/host/sh_mmcif.c switch (host->wait_for) { wait_for 1362 drivers/mmc/host/sh_mmcif.c host->wait_for = MMCIF_WAIT_FOR_REQUEST; wait_for 680 drivers/scsi/scsi_lib.c unsigned long wait_for = (cmd->allowed + 1) * req->timeout; wait_for 786 drivers/scsi/scsi_lib.c time_before(cmd->jiffies_at_alloc + wait_for, jiffies)) wait_for 1455 drivers/scsi/scsi_lib.c unsigned long wait_for = (cmd->allowed + 1) * rq->timeout; wait_for 1466 drivers/scsi/scsi_lib.c time_before(cmd->jiffies_at_alloc + wait_for, jiffies)) { wait_for 1469 drivers/scsi/scsi_lib.c wait_for/HZ);