wa_write_masked_or  165 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, reg, val, _MASKED_BIT_ENABLE(val));
wa_write_masked_or  171 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, reg, ~0, val);
wa_write_masked_or  177 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, reg, val, val);
wa_write_masked_or  181 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_ENABLE(mask))
wa_write_masked_or  184 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_DISABLE(mask))
wa_write_masked_or  187 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, (addr), (mask), _MASKED_FIELD((mask), (value)))
wa_write_masked_or  552 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal,
wa_write_masked_or  819 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, GEN8_MCR_SELECTOR, mcr_mask, mcr);
wa_write_masked_or  850 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal,
wa_write_masked_or 1284 drivers/gpu/drm/i915/gt/intel_workarounds.c 		wa_write_masked_or(wal,
wa_write_masked_or 1288 drivers/gpu/drm/i915/gt/intel_workarounds.c 		wa_write_masked_or(wal,
wa_write_masked_or 1320 drivers/gpu/drm/i915/gt/intel_workarounds.c 		wa_write_masked_or(wal,
wa_write_masked_or 1360 drivers/gpu/drm/i915/gt/intel_workarounds.c 			wa_write_masked_or(wal,