vlv_punit_read    476 drivers/gpu/drm/i915/display/intel_cdclk.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
vlv_punit_read    558 drivers/gpu/drm/i915/display/intel_cdclk.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
vlv_punit_read    562 drivers/gpu/drm/i915/display/intel_cdclk.c 	if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) &
vlv_punit_read    640 drivers/gpu/drm/i915/display/intel_cdclk.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
vlv_punit_read    644 drivers/gpu/drm/i915/display/intel_cdclk.c 	if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) &
vlv_punit_read   1071 drivers/gpu/drm/i915/display/intel_display_power.c 	((vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_STATUS) & mask) == state)
vlv_punit_read   1076 drivers/gpu/drm/i915/display/intel_display_power.c 	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL);
vlv_punit_read   1084 drivers/gpu/drm/i915/display/intel_display_power.c 			  vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL));
vlv_punit_read   1118 drivers/gpu/drm/i915/display/intel_display_power.c 	state = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_STATUS) & mask;
vlv_punit_read   1132 drivers/gpu/drm/i915/display/intel_display_power.c 	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL) & mask;
vlv_punit_read   1617 drivers/gpu/drm/i915/display/intel_display_power.c 	state = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe);
vlv_punit_read   1629 drivers/gpu/drm/i915/display/intel_display_power.c 	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSC_MASK(pipe);
vlv_punit_read   1650 drivers/gpu/drm/i915/display/intel_display_power.c 	((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe)) == state)
vlv_punit_read   1655 drivers/gpu/drm/i915/display/intel_display_power.c 	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
vlv_punit_read   1663 drivers/gpu/drm/i915/display/intel_display_power.c 			  vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM));
vlv_punit_read   4856 drivers/gpu/drm/i915/display/intel_display_power.c 	ret = (vlv_punit_read(dev_priv, reg0) & SSPM0_SSC_MASK) == SSPM0_SSC_PWR_GATE;
vlv_punit_read    804 drivers/gpu/drm/i915/i915_debugfs.c 		freq_sts = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
vlv_punit_read   1721 drivers/gpu/drm/i915/i915_debugfs.c 			act_freq = vlv_punit_read(dev_priv,
vlv_punit_read    271 drivers/gpu/drm/i915/i915_sysfs.c 		freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
vlv_punit_read    335 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);
vlv_punit_read    344 drivers/gpu/drm/i915/intel_pm.c 	if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) &
vlv_punit_read    357 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
vlv_punit_read   6140 drivers/gpu/drm/i915/intel_pm.c 		val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
vlv_punit_read   6153 drivers/gpu/drm/i915/intel_pm.c 		val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);
vlv_punit_read   6157 drivers/gpu/drm/i915/intel_pm.c 		if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) &
vlv_punit_read   6163 drivers/gpu/drm/i915/intel_pm.c 			val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);
vlv_punit_read   7564 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);
vlv_punit_read   7592 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_GPU_DUTYCYCLE_REG);
vlv_punit_read   7602 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);
vlv_punit_read   7612 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, FB_GFX_FMIN_AT_VMIN_FUSE);
vlv_punit_read   7659 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM) & 0xff;
vlv_punit_read   7789 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
vlv_punit_read   7975 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
vlv_punit_read   8061 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
vlv_punit_read    117 drivers/gpu/drm/i915/intel_sideband.h u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr);