via_write_reg_mask 1047 drivers/media/platform/via-camera.c via_write_reg_mask(VIASR, 0x78, 0, 0x80); via_write_reg_mask 1048 drivers/media/platform/via-camera.c via_write_reg_mask(VIASR, 0x1e, 0xc0, 0xc0); via_write_reg_mask 1213 drivers/media/platform/via-camera.c via_write_reg_mask(VIASR, 0x78, 0, 0x80); via_write_reg_mask 1214 drivers/media/platform/via-camera.c via_write_reg_mask(VIASR, 0x1e, 0xc0, 0xc0); via_write_reg_mask 403 drivers/video/fbdev/via/dvi.c via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); via_write_reg_mask 416 drivers/video/fbdev/via/dvi.c via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); via_write_reg_mask 438 drivers/video/fbdev/via/dvi.c via_write_reg_mask(VIACR, CR97, 0x03, 0x03); via_write_reg_mask 440 drivers/video/fbdev/via/dvi.c via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); via_write_reg_mask 448 drivers/video/fbdev/via/dvi.c via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); via_write_reg_mask 694 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIACR, index, value, mask); via_write_reg_mask 713 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIASR, 0x16, value, 0x40); via_write_reg_mask 785 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIACR, 0x36, value, 0x30); via_write_reg_mask 803 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIASR, 0x1E, value, 0xC0); via_write_reg_mask 821 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIASR, 0x1E, value, 0x30); via_write_reg_mask 839 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIASR, 0x2A, value, 0x03); via_write_reg_mask 857 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIASR, 0x2A, value, 0x0C); via_write_reg_mask 890 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIACR, 0x9B, polarity << 5, 0x60); via_write_reg_mask 892 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIACR, 0x99, polarity << 5, 0x60); via_write_reg_mask 894 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIACR, 0x97, polarity << 5, 0x60); via_write_reg_mask 1008 drivers/video/fbdev/via/hw.c via_write_reg_mask(RegTable[i].port, RegTable[i].index, via_write_reg_mask 1786 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIACR, 0x45, 0x00, 0x01); via_write_reg_mask 1789 drivers/video/fbdev/via/hw.c via_write_reg_mask(VIACR, 0xFD, 0, 0x80); /* VX900 hw scale on IGA2 */ via_write_reg_mask 19 drivers/video/fbdev/via/hw.h #define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m) via_write_reg_mask 562 drivers/video/fbdev/via/lcd.c via_write_reg_mask(VIACR, 0x79, 0x00, via_write_reg_mask 122 drivers/video/fbdev/via/via-gpio.c via_write_reg_mask(VIASR, gpio->vg_port_index, 0, via_write_reg_mask 162 drivers/video/fbdev/via/via-gpio.c via_write_reg_mask(VIASR, gpio->vg_port_index, 0x02, 0x02); via_write_reg_mask 167 drivers/video/fbdev/via/via-gpio.c via_write_reg_mask(VIASR, gpio->vg_port_index, 0, 0x02); via_write_reg_mask 44 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x02, 0x02); /* enable reset */ via_write_reg_mask 47 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x00, 0x02); /* disable reset */ via_write_reg_mask 52 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x02, 0x02); /* enable reset */ via_write_reg_mask 56 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x00, 0x02); /* disable reset */ via_write_reg_mask 61 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x04, 0x04); /* enable reset */ via_write_reg_mask 64 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x00, 0x04); /* disable reset */ via_write_reg_mask 69 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x04, 0x04); /* enable reset */ via_write_reg_mask 73 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x00, 0x04); /* disable reset */ via_write_reg_mask 78 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x01, 0x01); /* enable reset */ via_write_reg_mask 82 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x40, 0x00, 0x01); /* disable reset */ via_write_reg_mask 140 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x2D, value, 0x30); via_write_reg_mask 158 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x2D, value, 0x0C); via_write_reg_mask 176 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x2D, value, 0x03); via_write_reg_mask 194 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x1B, value, 0x30); via_write_reg_mask 212 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIASR, 0x1B, value, 0xC0); via_write_reg_mask 249 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIACR, 0x6C, data, 0xF0); via_write_reg_mask 255 drivers/video/fbdev/via/via_clock.c via_write_reg_mask(VIACR, 0x6C, data, 0x0F); via_write_reg_mask 57 drivers/video/fbdev/via/via_i2c.c via_write_reg_mask(adap_data->io_port, adap_data->ioport_index, via_write_reg_mask 73 drivers/video/fbdev/via/via_i2c.c via_write_reg_mask(adap_data->io_port, adap_data->ioport_index, via_write_reg_mask 36 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x11, 0x00, 0x80); via_write_reg_mask 41 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x03, raw.hor_blank_end & 0x1F, 0x1F); via_write_reg_mask 43 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x05, (raw.hor_sync_end & 0x1F) via_write_reg_mask 46 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01) via_write_reg_mask 53 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x09, raw.ver_blank_start >> (9 - 5) & 0x20, via_write_reg_mask 56 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x11, raw.ver_sync_end & 0x0F, 0x0F); via_write_reg_mask 60 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x33, (raw.hor_sync_start >> (8 - 4) & 0x10) via_write_reg_mask 62 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x35, (raw.ver_total >> 10 & 0x01) via_write_reg_mask 66 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x36, raw.hor_total >> (8 - 3) & 0x08, 0x08); via_write_reg_mask 69 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x11, 0x80, 0x80); via_write_reg_mask 72 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x17, 0x00, 0x80); via_write_reg_mask 73 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x17, 0x80, 0x80); via_write_reg_mask 100 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x55, (raw.hor_total >> 8 & 0x0F) via_write_reg_mask 127 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x48, (addr >> 24) & 0x1F, 0x1F); via_write_reg_mask 134 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x62, (addr >> 2) & 0xFE, 0xFE); via_write_reg_mask 137 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0xA3, (addr >> 26) & 0x07, 0x07); via_write_reg_mask 148 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x35, (pitch >> (8 - 5)) & 0xE0, 0xE0); via_write_reg_mask 156 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x67, (pitch >> 8) & 0x03, 0x03); via_write_reg_mask 157 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x71, (pitch >> (10 - 7)) & 0x80, 0x80); via_write_reg_mask 187 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIASR, 0x15, value, 0x1C); via_write_reg_mask 214 drivers/video/fbdev/via/via_modesetting.c via_write_reg_mask(VIACR, 0x67, value, 0xC0);