via_write 464 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); via_write 465 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_hi); via_write 466 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_lo); via_write 546 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); via_write 547 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, command); via_write 548 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, start_addr_lo); via_write 549 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, end_addr_lo); via_write 551 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_hi); via_write 552 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_lo); via_write 554 drivers/gpu/drm/via/via_dma.c via_write(dev_priv, VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); via_write 214 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_MAR0 + engine*0x10, 0); via_write 215 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_DAR0 + engine*0x10, 0); via_write 216 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD | via_write 218 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); via_write 219 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_BCR0 + engine*0x10, 0); via_write 220 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); via_write 222 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); via_write 291 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA); via_write 299 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD); via_write 349 drivers/gpu/drm/via/via_dmablit.c via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD); via_write 148 drivers/gpu/drm/via/via_irq.c via_write(dev_priv, VIA_REG_INTERRUPT, status); via_write 164 drivers/gpu/drm/via/via_irq.c via_write(dev_priv, VIA_REG_INTERRUPT, status | via_write 180 drivers/gpu/drm/via/via_irq.c via_write(dev_priv, VIA_REG_INTERRUPT, status | VIA_IRQ_VBLANK_ENABLE); via_write 194 drivers/gpu/drm/via/via_irq.c via_write(dev_priv, VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBLANK_ENABLE); via_write 298 drivers/gpu/drm/via/via_irq.c via_write(dev_priv, VIA_REG_INTERRUPT, status & via_write 316 drivers/gpu/drm/via/via_irq.c via_write(dev_priv, VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL via_write 340 drivers/gpu/drm/via/via_irq.c via_write(dev_priv, VIA_REG_INTERRUPT, status & via_write 728 drivers/gpu/drm/via/via_verifier.c via_write(dev_priv, HC_REG_TRANS_SET + HC_REG_BASE, *buf++); via_write 735 drivers/gpu/drm/via/via_verifier.c via_write(dev_priv, HC_REG_TRANS_SPACE + HC_REG_BASE + via_write 756 drivers/gpu/drm/via/via_verifier.c via_write(dev_priv, HC_REG_TRANS_SPACE + HC_REG_BASE + via_write 846 drivers/gpu/drm/via/via_verifier.c via_write(dev_priv, (cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); via_write 897 drivers/gpu/drm/via/via_verifier.c via_write(dev_priv, addr, *buf++); via_write 953 drivers/gpu/drm/via/via_verifier.c via_write(dev_priv, addr, *buf++);