vgpu_cfg_space     71 drivers/gpu/drm/i915/gvt/cfg_space.c 	u8 *cfg_base = vgpu_cfg_space(vgpu);
vgpu_cfg_space    115 drivers/gpu/drm/i915/gvt/cfg_space.c 	memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes);
vgpu_cfg_space    130 drivers/gpu/drm/i915/gvt/cfg_space.c 	val = vgpu_cfg_space(vgpu)[PCI_BASE_ADDRESS_2];
vgpu_cfg_space    132 drivers/gpu/drm/i915/gvt/cfg_space.c 		val = *(u64 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_2);
vgpu_cfg_space    134 drivers/gpu/drm/i915/gvt/cfg_space.c 		val = *(u32 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_2);
vgpu_cfg_space    158 drivers/gpu/drm/i915/gvt/cfg_space.c 	val = vgpu_cfg_space(vgpu)[PCI_BASE_ADDRESS_0];
vgpu_cfg_space    160 drivers/gpu/drm/i915/gvt/cfg_space.c 		start = *(u64 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_0);
vgpu_cfg_space    162 drivers/gpu/drm/i915/gvt/cfg_space.c 		start = *(u32 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_0);
vgpu_cfg_space    178 drivers/gpu/drm/i915/gvt/cfg_space.c 	u8 old = vgpu_cfg_space(vgpu)[offset];
vgpu_cfg_space    209 drivers/gpu/drm/i915/gvt/cfg_space.c 	u32 *pval = (u32 *)(vgpu_cfg_space(vgpu) + offset);
vgpu_cfg_space    228 drivers/gpu/drm/i915/gvt/cfg_space.c 		vgpu_cfg_space(vgpu)[PCI_COMMAND] & PCI_COMMAND_MEMORY;
vgpu_cfg_space    365 drivers/gpu/drm/i915/gvt/cfg_space.c 	memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space,
vgpu_cfg_space    369 drivers/gpu/drm/i915/gvt/cfg_space.c 		vgpu_cfg_space(vgpu)[PCI_CLASS_DEVICE] =
vgpu_cfg_space    371 drivers/gpu/drm/i915/gvt/cfg_space.c 		vgpu_cfg_space(vgpu)[PCI_CLASS_PROG] =
vgpu_cfg_space    376 drivers/gpu/drm/i915/gvt/cfg_space.c 	gmch_ctl = (u16 *)(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_GMCH_CONTROL);
vgpu_cfg_space    382 drivers/gpu/drm/i915/gvt/cfg_space.c 	vgpu_cfg_space(vgpu)[PCI_COMMAND] &= ~(PCI_COMMAND_IO
vgpu_cfg_space    388 drivers/gpu/drm/i915/gvt/cfg_space.c 	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_1, 0, 4);
vgpu_cfg_space    389 drivers/gpu/drm/i915/gvt/cfg_space.c 	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_3, 0, 4);
vgpu_cfg_space    390 drivers/gpu/drm/i915/gvt/cfg_space.c 	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_4, 0, 8);
vgpu_cfg_space    391 drivers/gpu/drm/i915/gvt/cfg_space.c 	memset(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_OPREGION, 0, 4);
vgpu_cfg_space    398 drivers/gpu/drm/i915/gvt/cfg_space.c 	memset(vgpu_cfg_space(vgpu) + PCI_ROM_ADDRESS, 0, 4);
vgpu_cfg_space    409 drivers/gpu/drm/i915/gvt/cfg_space.c 	u8 cmd = vgpu_cfg_space(vgpu)[PCI_COMMAND];
vgpu_cfg_space    410 drivers/gpu/drm/i915/gvt/cfg_space.c 	bool primary = vgpu_cfg_space(vgpu)[PCI_CLASS_DEVICE] !=
vgpu_cfg_space    465 drivers/gpu/drm/i915/gvt/gvt.h 	pval = (u32 *)(vgpu_cfg_space(vgpu) + offset);
vgpu_cfg_space    123 drivers/gpu/drm/i915/gvt/mpt.h 	control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));
vgpu_cfg_space    124 drivers/gpu/drm/i915/gvt/mpt.h 	addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset));
vgpu_cfg_space    125 drivers/gpu/drm/i915/gvt/mpt.h 	data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset));
vgpu_cfg_space    514 drivers/gpu/drm/i915/gvt/opregion.c 	if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI]