vcpu_set_reg       29 arch/arm/kvm/handle_exit.c 		vcpu_set_reg(vcpu, 0, ~0UL);
vcpu_set_reg       46 arch/arm/kvm/handle_exit.c 	vcpu_set_reg(vcpu, 0, ~0UL);
vcpu_set_reg       79 arch/arm/kvm/reset.c 		vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0);
vcpu_set_reg       46 arch/arm64/kvm/handle_exit.c 		vcpu_set_reg(vcpu, 0, ~0UL);
vcpu_set_reg       63 arch/arm64/kvm/handle_exit.c 	vcpu_set_reg(vcpu, 0, ~0UL);
vcpu_set_reg       81 arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c 		vcpu_set_reg(vcpu, rd, data);
vcpu_set_reg      325 arch/arm64/kvm/reset.c 		vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0);
vcpu_set_reg     2159 arch/arm64/kvm/sys_regs.c 			vcpu_set_reg(vcpu, Rt, lower_32_bits(params.regval));
vcpu_set_reg     2160 arch/arm64/kvm/sys_regs.c 			vcpu_set_reg(vcpu, Rt2, upper_32_bits(params.regval));
vcpu_set_reg     2198 arch/arm64/kvm/sys_regs.c 			vcpu_set_reg(vcpu, Rt, params.regval);
vcpu_set_reg     2309 arch/arm64/kvm/sys_regs.c 		vcpu_set_reg(vcpu, Rt, params.regval);
vcpu_set_reg      672 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK);
vcpu_set_reg      676 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, ICC_IAR1_EL1_SPURIOUS);
vcpu_set_reg      764 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK));
vcpu_set_reg      769 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG1_MASK));
vcpu_set_reg      798 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr0(vmcr));
vcpu_set_reg      803 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr));
vcpu_set_reg      852 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, val);
vcpu_set_reg      930 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK);
vcpu_set_reg      938 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, vmcr);
vcpu_set_reg      958 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, val);
vcpu_set_reg      980 virt/kvm/arm/hyp/vgic-v3-sr.c 	vcpu_set_reg(vcpu, rt, val);
vcpu_set_reg      114 virt/kvm/arm/mmio.c 		vcpu_set_reg(vcpu, vcpu->arch.mmio_decode.rt, data);
vcpu_set_reg       52 virt/kvm/arm/psci.c 	vcpu_set_reg(vcpu, 0, a0);
vcpu_set_reg       53 virt/kvm/arm/psci.c 	vcpu_set_reg(vcpu, 1, a1);
vcpu_set_reg       54 virt/kvm/arm/psci.c 	vcpu_set_reg(vcpu, 2, a2);
vcpu_set_reg       55 virt/kvm/arm/psci.c 	vcpu_set_reg(vcpu, 3, a3);