vc4_crtc 68 drivers/gpu/drm/vc4/vc4_crtc.c #define CRTC_WRITE(offset, val) writel(val, vc4_crtc->regs + (offset)) vc4_crtc 69 drivers/gpu/drm/vc4/vc4_crtc.c #define CRTC_READ(offset) readl(vc4_crtc->regs + (offset)) vc4_crtc 94 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 110 drivers/gpu/drm/vc4/vc4_crtc.c val = HVS_READ(SCALER_DISPSTATX(vc4_crtc->channel)); vc4_crtc 131 drivers/gpu/drm/vc4/vc4_crtc.c fifo_lines = vc4_crtc->cob_size / mode->crtc_hdisplay; vc4_crtc 179 drivers/gpu/drm/vc4/vc4_crtc.c *stime = vc4_crtc->t_vblank; vc4_crtc 181 drivers/gpu/drm/vc4/vc4_crtc.c *etime = vc4_crtc->t_vblank; vc4_crtc 215 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 224 drivers/gpu/drm/vc4/vc4_crtc.c (vc4_crtc->channel * 3 * crtc->gamma_size)); vc4_crtc 227 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_r[i]); vc4_crtc 229 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_g[i]); vc4_crtc 231 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_b[i]); vc4_crtc 237 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 243 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->lut_r[i] = drm_color_lut_extract(lut[i].red, 8); vc4_crtc 244 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->lut_g[i] = drm_color_lut_extract(lut[i].green, 8); vc4_crtc 245 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->lut_b[i] = drm_color_lut_extract(lut[i].blue, 8); vc4_crtc 297 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 386 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 393 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev); vc4_crtc 394 drivers/gpu/drm/vc4/vc4_crtc.c dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs before:\n", vc4_crtc 396 drivers/gpu/drm/vc4/vc4_crtc.c drm_print_regset32(&p, &vc4_crtc->regset); vc4_crtc 399 drivers/gpu/drm/vc4/vc4_crtc.c if (vc4_crtc->channel == 2) { vc4_crtc 426 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel), vc4_crtc 437 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev); vc4_crtc 438 drivers/gpu/drm/vc4/vc4_crtc.c dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs after:\n", vc4_crtc 440 drivers/gpu/drm/vc4/vc4_crtc.c drm_print_regset32(&p, &vc4_crtc->regset); vc4_crtc 457 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 458 drivers/gpu/drm/vc4/vc4_crtc.c u32 chan = vc4_crtc->channel; vc4_crtc 518 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 531 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->event = crtc->state->event; vc4_crtc 535 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), vc4_crtc 540 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), vc4_crtc 550 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 567 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_DISPCTRLX(vc4_crtc->channel), vc4_crtc 687 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 729 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel), vc4_crtc 730 drivers/gpu/drm/vc4/vc4_crtc.c HVS_READ(SCALER_DISPBKGNDX(vc4_crtc->channel)) | vc4_crtc 744 drivers/gpu/drm/vc4/vc4_crtc.c u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(vc4_crtc->channel)); vc4_crtc 756 drivers/gpu/drm/vc4/vc4_crtc.c HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel), dispbkgndx); vc4_crtc 767 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 776 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 781 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_handle_page_flip(struct vc4_crtc *vc4_crtc) vc4_crtc 783 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc *crtc = &vc4_crtc->base; vc4_crtc 787 drivers/gpu/drm/vc4/vc4_crtc.c u32 chan = vc4_crtc->channel; vc4_crtc 791 drivers/gpu/drm/vc4/vc4_crtc.c if (vc4_crtc->event && vc4_crtc 794 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_send_vblank_event(crtc, vc4_crtc->event); vc4_crtc 795 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->event = NULL; vc4_crtc 804 drivers/gpu/drm/vc4/vc4_crtc.c vc4_hvs_unmask_underrun(dev, vc4_crtc->channel); vc4_crtc 809 drivers/gpu/drm/vc4/vc4_crtc.c void vc4_crtc_handle_vblank(struct vc4_crtc *crtc) vc4_crtc 818 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = data; vc4_crtc 824 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_handle_vblank(vc4_crtc); vc4_crtc 1081 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); vc4_crtc 1082 drivers/gpu/drm/vc4/vc4_crtc.c const struct vc4_crtc_data *crtc_data = vc4_crtc->data; vc4_crtc 1109 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_get_cob_allocation(struct vc4_crtc *vc4_crtc) vc4_crtc 1111 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *drm = vc4_crtc->base.dev; vc4_crtc 1113 drivers/gpu/drm/vc4/vc4_crtc.c u32 dispbase = HVS_READ(SCALER_DISPBASEX(vc4_crtc->channel)); vc4_crtc 1121 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->cob_size = top - base + 4; vc4_crtc 1128 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc; vc4_crtc 1134 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL); vc4_crtc 1135 drivers/gpu/drm/vc4/vc4_crtc.c if (!vc4_crtc) vc4_crtc 1137 drivers/gpu/drm/vc4/vc4_crtc.c crtc = &vc4_crtc->base; vc4_crtc 1142 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->data = match->data; vc4_crtc 1143 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->pdev = pdev; vc4_crtc 1145 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->regs = vc4_ioremap_regs(pdev, 0); vc4_crtc 1146 drivers/gpu/drm/vc4/vc4_crtc.c if (IS_ERR(vc4_crtc->regs)) vc4_crtc 1147 drivers/gpu/drm/vc4/vc4_crtc.c return PTR_ERR(vc4_crtc->regs); vc4_crtc 1149 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->regset.base = vc4_crtc->regs; vc4_crtc 1150 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->regset.regs = crtc_regs; vc4_crtc 1151 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->regset.nregs = ARRAY_SIZE(crtc_regs); vc4_crtc 1169 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->channel = vc4_crtc->data->hvs_channel; vc4_crtc 1170 drivers/gpu/drm/vc4/vc4_crtc.c drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r)); vc4_crtc 1207 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_get_cob_allocation(vc4_crtc); vc4_crtc 1212 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_irq_handler, 0, "vc4 crtc", vc4_crtc); vc4_crtc 1219 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->lut_r[i] = i; vc4_crtc 1220 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->lut_g[i] = i; vc4_crtc 1221 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->lut_b[i] = i; vc4_crtc 1224 drivers/gpu/drm/vc4/vc4_crtc.c platform_set_drvdata(pdev, vc4_crtc); vc4_crtc 1226 drivers/gpu/drm/vc4/vc4_crtc.c vc4_debugfs_add_regset32(drm, vc4_crtc->data->debugfs_name, vc4_crtc 1227 drivers/gpu/drm/vc4/vc4_crtc.c &vc4_crtc->regset); vc4_crtc 1245 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = dev_get_drvdata(dev); vc4_crtc 1247 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_destroy(&vc4_crtc->base); vc4_crtc 472 drivers/gpu/drm/vc4/vc4_drv.h static inline struct vc4_crtc * vc4_crtc 475 drivers/gpu/drm/vc4/vc4_drv.h return (struct vc4_crtc *)crtc; vc4_crtc 750 drivers/gpu/drm/vc4/vc4_drv.h void vc4_crtc_handle_vblank(struct vc4_crtc *crtc); vc4_crtc 152 drivers/gpu/drm/vc4/vc4_kms.c struct vc4_crtc *vc4_crtc; vc4_crtc 159 drivers/gpu/drm/vc4/vc4_kms.c vc4_crtc = to_vc4_crtc(state->crtcs[i].ptr); vc4_crtc 160 drivers/gpu/drm/vc4/vc4_kms.c vc4_hvs_mask_underrun(dev, vc4_crtc->channel);