v2 39 arch/arc/include/asm/setup.h #define IS_AVAIL3(v, v2, s) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2)) v2 3153 arch/arm/mach-omap2/omap_hwmod.c const char *name, s8 v1, u8 v2) v2 3158 arch/arm/mach-omap2/omap_hwmod.c if (v1 != v2) v2 3159 arch/arm/mach-omap2/omap_hwmod.c dev_warn(dev, "%s %d != %d\n", name, v1, v2); v2 118 arch/arm/mach-pxa/viper.c u8 v1, v2; v2 126 arch/arm/mach-pxa/viper.c v2 = VIPER_VERSION; v2 128 arch/arm/mach-pxa/viper.c v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; v2 19 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v2 26 arch/arm64/lib/xor-neon.c v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); v2 32 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 4, v2); v2 47 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v2 54 arch/arm64/lib/xor-neon.c v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); v2 60 arch/arm64/lib/xor-neon.c v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); v2 66 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 4, v2); v2 83 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v2 90 arch/arm64/lib/xor-neon.c v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); v2 96 arch/arm64/lib/xor-neon.c v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); v2 102 arch/arm64/lib/xor-neon.c v2 = veorq_u64(v2, vld1q_u64(dp4 + 4)); v2 108 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 4, v2); v2 128 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v2 135 arch/arm64/lib/xor-neon.c v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); v2 141 arch/arm64/lib/xor-neon.c v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); v2 147 arch/arm64/lib/xor-neon.c v2 = veorq_u64(v2, vld1q_u64(dp4 + 4)); v2 153 arch/arm64/lib/xor-neon.c v2 = veorq_u64(v2, vld1q_u64(dp5 + 4)); v2 159 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 4, v2); v2 783 arch/ia64/include/asm/pal.h u64 v2; v2 893 arch/ia64/include/asm/pal.h features_control->pal_bus_features_val = iprv.v2; v2 918 arch/ia64/include/asm/pal.h conf->pcci_reserved = iprv.v2; v2 938 arch/ia64/include/asm/pal.h prot->pcp_info[4].pcpi_data = iprv.v2 & 0xffffffff; v2 939 arch/ia64/include/asm/pal.h prot->pcp_info[5].pcpi_data = iprv.v2 >> 32; v2 1102 arch/ia64/include/asm/pal.h *(u64 *)itc_ratio = iprv.v2; v2 1120 arch/ia64/include/asm/pal.h *la = iprv.v2; v2 1421 arch/ia64/include/asm/pal.h *features_control = iprv.v2; v2 1461 arch/ia64/include/asm/pal.h ptce->stride[0] = iprv.v2 >> 32; v2 1462 arch/ia64/include/asm/pal.h ptce->stride[1] = iprv.v2 & 0xffffffff; v2 1792 arch/ia64/include/asm/pal.h mapping->ppli2.ppli2_data = iprv.v2; v2 1819 arch/ia64/include/asm/pal.h info->ppli2.ppli2_data = iprv.v2; v2 113 arch/ia64/include/asm/sal.h unsigned long v2; v2 57 arch/ia64/include/asm/sn/sn_sal.h *len = rv.v2; v2 990 arch/ia64/kernel/setup.c if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80)) v2 120 arch/mips/boot/elf2ecoff.c static int phcmp(const void *v1, const void *v2) v2 123 arch/mips/boot/elf2ecoff.c const Elf32_Phdr *h2 = v2; v2 43 arch/mips/kernel/cpu-bugs64.c void mult_sh_align_mod(long *v1, long *v2, long *w, v2 114 arch/mips/kernel/cpu-bugs64.c *v2 = lv2; v2 120 arch/mips/kernel/cpu-bugs64.c long v1[8], v2[8], w[8]; v2 134 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0); v2 135 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1); v2 136 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2); v2 137 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3); v2 138 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4); v2 139 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5); v2 140 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6); v2 141 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[7], &v2[7], &w[7], 32, 7); v2 157 arch/mips/kernel/cpu-bugs64.c if (v2[i] != w[i]) v2 19 arch/openrisc/include/asm/syscalls.h unsigned long *v2); v2 70 arch/powerpc/boot/ps3.c u64 v2; v2 91 arch/powerpc/boot/ps3.c &v2); v2 1003 arch/powerpc/lib/sstep.c long v1, long v2, int crfld) v2 1009 arch/powerpc/lib/sstep.c if (v1 < v2) v2 1011 arch/powerpc/lib/sstep.c else if (v1 > v2) v2 1022 arch/powerpc/lib/sstep.c unsigned long v2, int crfld) v2 1028 arch/powerpc/lib/sstep.c if (v1 < v2) v2 1030 arch/powerpc/lib/sstep.c else if (v1 > v2) v2 1040 arch/powerpc/lib/sstep.c unsigned long v1, unsigned long v2) v2 1048 arch/powerpc/lib/sstep.c if ((v1 & mask) == (v2 & mask)) v2 1087 arch/powerpc/lib/sstep.c unsigned long v1, unsigned long v2) v2 1096 arch/powerpc/lib/sstep.c if (v2 & PPC_BIT(idx)) v2 1122 arch/powerpc/lib/sstep.c static nokprobe_inline int trap_compare(long v1, long v2) v2 1126 arch/powerpc/lib/sstep.c if (v1 < v2) v2 1128 arch/powerpc/lib/sstep.c else if (v1 > v2) v2 1132 arch/powerpc/lib/sstep.c if ((unsigned long)v1 < (unsigned long)v2) v2 1134 arch/powerpc/lib/sstep.c else if ((unsigned long)v1 > (unsigned long)v2) v2 56 arch/powerpc/lib/xor_vmx.c DEFINE(v2); v2 61 arch/powerpc/lib/xor_vmx.c LOAD(v2); v2 62 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v2 66 arch/powerpc/lib/xor_vmx.c v2 += 4; v2 74 arch/powerpc/lib/xor_vmx.c DEFINE(v2); v2 80 arch/powerpc/lib/xor_vmx.c LOAD(v2); v2 82 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v2 87 arch/powerpc/lib/xor_vmx.c v2 += 4; v2 97 arch/powerpc/lib/xor_vmx.c DEFINE(v2); v2 104 arch/powerpc/lib/xor_vmx.c LOAD(v2); v2 107 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v2 113 arch/powerpc/lib/xor_vmx.c v2 += 4; v2 124 arch/powerpc/lib/xor_vmx.c DEFINE(v2); v2 132 arch/powerpc/lib/xor_vmx.c LOAD(v2); v2 136 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v2 143 arch/powerpc/lib/xor_vmx.c v2 += 4; v2 545 arch/powerpc/perf/hv-24x7.c static int ev_uniq_ord(const void *v1, size_t s1, unsigned d1, const void *v2, v2 548 arch/powerpc/perf/hv-24x7.c int r = memord(v1, s1, v2, s2); v2 119 arch/powerpc/platforms/ps3/gelic_udbg.c u64 v2; v2 138 arch/powerpc/platforms/ps3/gelic_udbg.c &mac, &v2); v2 154 arch/powerpc/platforms/ps3/gelic_udbg.c &vlan_id, &v2); v2 54 arch/powerpc/platforms/ps3/repository.c u64 v1, u64 v2, const char *func, int line) v2 62 arch/powerpc/platforms/ps3/repository.c pr_devel("%s:%d: v2: %016llx\n", func, line, v2); v2 114 arch/powerpc/platforms/ps3/repository.c u64 v2; v2 123 arch/powerpc/platforms/ps3/repository.c &v2); v2 132 arch/powerpc/platforms/ps3/repository.c dump_node(lpar_id, n1, n2, n3, n4, v1, v2); v2 137 arch/powerpc/platforms/ps3/repository.c *_v2 = v2; v2 142 arch/powerpc/platforms/ps3/repository.c if (v2 && !_v2) v2 144 arch/powerpc/platforms/ps3/repository.c __func__, __LINE__, v2); v2 236 arch/powerpc/platforms/ps3/repository.c u64 v2 = 0; v2 243 arch/powerpc/platforms/ps3/repository.c &v1, &v2); v2 245 arch/powerpc/platforms/ps3/repository.c *interrupt_id = v2; v2 873 arch/powerpc/platforms/ps3/repository.c u64 v2 = 0; v2 880 arch/powerpc/platforms/ps3/repository.c &v1, &v2); v2 882 arch/powerpc/platforms/ps3/repository.c *resource_id = v2; v2 1049 arch/powerpc/platforms/ps3/repository.c static int create_node(u64 n1, u64 n2, u64 n3, u64 n4, u64 v1, u64 v2) v2 1053 arch/powerpc/platforms/ps3/repository.c dump_node(0, n1, n2, n3, n4, v1, v2); v2 1055 arch/powerpc/platforms/ps3/repository.c result = lv1_create_repository_node(n1, n2, n3, n4, v1, v2); v2 1083 arch/powerpc/platforms/ps3/repository.c static int write_node(u64 n1, u64 n2, u64 n3, u64 n4, u64 v1, u64 v2) v2 1087 arch/powerpc/platforms/ps3/repository.c result = create_node(n1, n2, n3, n4, v1, v2); v2 1092 arch/powerpc/platforms/ps3/repository.c result = lv1_write_repository_node(n1, n2, n3, n4, v1, v2); v2 97 arch/s390/include/asm/vx-insn.h .ifc \vxr,%v2 v2 200 arch/s390/include/asm/vx-insn.h .macro RXB rxb v1 v2=0 v3=0 v4=0 v2 224 arch/s390/include/asm/vx-insn.h .macro MRXB m v1 v2=0 v3=0 v4=0 v2 239 arch/s390/include/asm/vx-insn.h .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0 v2 283 arch/s390/include/asm/vx-insn.h .macro VLR v1, v2 v2 285 arch/s390/include/asm/vx-insn.h VX_NUM v2, \v2 v2 286 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 288 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x56, v1, v2 v2 388 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 391 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 393 arch/s390/include/asm/vx-insn.h MRXBOPC (v4&15), 0x8C, v1, v2, v3, v4 v2 399 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 400 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 402 arch/s390/include/asm/vx-insn.h MRXBOPC \m3, 0xD4, v1, v2 v2 420 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 422 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 424 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x68, v1, v2, v3 v2 430 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 432 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 434 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x6D, v1, v2, v3 v2 440 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 442 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 444 arch/s390/include/asm/vx-insn.h MRXBOPC \m4, 0xB4, v1, v2, v3 v2 462 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 465 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 467 arch/s390/include/asm/vx-insn.h MRXBOPC (v4&15), 0xBC, v1, v2, v3, v4 v2 485 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 487 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 489 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x7D, v1, v2, v3 v2 515 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 517 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 519 arch/s390/include/asm/vx-insn.h MRXBOPC \m4, 0xF3, v1, v2, v3 v2 540 arch/s390/include/asm/vx-insn.h VX_NUM v2, \vr2 v2 542 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v2 544 arch/s390/include/asm/vx-insn.h MRXBOPC \m4, 0x7A, v1, v2, v3 v2 113 arch/um/drivers/cow_user.c struct cow_header_v2 v2; v2 324 arch/um/drivers/cow_user.c if (n < sizeof(header->v2)) { v2 329 arch/um/drivers/cow_user.c *mtime_out = be32toh(header->v2.mtime); v2 330 arch/um/drivers/cow_user.c *size_out = be64toh(header->v2.size); v2 331 arch/um/drivers/cow_user.c *sectorsize_out = be32toh(header->v2.sectorsize); v2 332 arch/um/drivers/cow_user.c *bitmap_offset_out = sizeof(header->v2); v2 334 arch/um/drivers/cow_user.c file = header->v2.backing_file; v2 194 crypto/adiantum.c static inline void le128_add(le128 *r, const le128 *v1, const le128 *v2) v2 197 crypto/adiantum.c u64 y = le64_to_cpu(v2->b); v2 200 crypto/adiantum.c r->a = cpu_to_le64(le64_to_cpu(v1->a) + le64_to_cpu(v2->a) + v2 205 crypto/adiantum.c static inline void le128_sub(le128 *r, const le128 *v1, const le128 *v2) v2 208 crypto/adiantum.c u64 y = le64_to_cpu(v2->b); v2 211 crypto/adiantum.c r->a = cpu_to_le64(le64_to_cpu(v1->a) - le64_to_cpu(v2->a) - v2 84 drivers/char/mwave/mwavedd.h #define PRINTK_3(f,s,v1,v2) \ v2 86 drivers/char/mwave/mwavedd.h printk(s,v1,v2); \ v2 89 drivers/char/mwave/mwavedd.h #define PRINTK_4(f,s,v1,v2,v3) \ v2 91 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3); \ v2 94 drivers/char/mwave/mwavedd.h #define PRINTK_5(f,s,v1,v2,v3,v4) \ v2 96 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4); \ v2 99 drivers/char/mwave/mwavedd.h #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ v2 101 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4,v5); \ v2 104 drivers/char/mwave/mwavedd.h #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ v2 106 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4,v5,v6); \ v2 109 drivers/char/mwave/mwavedd.h #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ v2 111 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4,v5,v6,v7); \ v2 117 drivers/char/mwave/mwavedd.h #define PRINTK_3(f,s,v1,v2) v2 118 drivers/char/mwave/mwavedd.h #define PRINTK_4(f,s,v1,v2,v3) v2 119 drivers/char/mwave/mwavedd.h #define PRINTK_5(f,s,v1,v2,v3,v4) v2 120 drivers/char/mwave/mwavedd.h #define PRINTK_6(f,s,v1,v2,v3,v4,v5) v2 121 drivers/char/mwave/mwavedd.h #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) v2 122 drivers/char/mwave/mwavedd.h #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) v2 637 drivers/char/sonypi.c u8 v1, v2; v2 642 drivers/char/sonypi.c v2 = inb_p(sonypi_device.ioport1); v2 643 drivers/char/sonypi.c return v2; v2 676 drivers/char/sonypi.c u8 v1, v2; v2 681 drivers/char/sonypi.c v2 = sonypi_call2(0x8f, fn); v2 682 drivers/char/sonypi.c if (v1 == v2 && v1 != 0xff) v2 826 drivers/char/sonypi.c u8 v1, v2, event = 0; v2 830 drivers/char/sonypi.c v2 = inb_p(sonypi_device.ioport1 + sonypi_device.evtype_offset); v2 835 drivers/char/sonypi.c if ((v2 & sonypi_eventtypes[i].data) != v2 851 drivers/char/sonypi.c v1, v2); v2 860 drivers/char/sonypi.c "sonypi: event port1=0x%02x,port2=0x%02x\n", v1, v2); v2 42 drivers/clocksource/acpi_pm.c u32 v1 = 0, v2 = 0, v3 = 0; v2 52 drivers/clocksource/acpi_pm.c v2 = read_pmtmr(); v2 54 drivers/clocksource/acpi_pm.c } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) v2 55 drivers/clocksource/acpi_pm.c || (v3 > v1 && v3 < v2))); v2 57 drivers/clocksource/acpi_pm.c return v2; v2 39 drivers/clocksource/h8300_timer16.c unsigned short v1, v2, v3; v2 48 drivers/clocksource/h8300_timer16.c v2 = ioread16be(p->mapbase + TCNT); v2 51 drivers/clocksource/h8300_timer16.c } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) v2 52 drivers/clocksource/h8300_timer16.c || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); v2 55 drivers/clocksource/h8300_timer16.c return v2; v2 57 drivers/clocksource/h8300_timer16.c return v2 + 0x10000; v2 44 drivers/clocksource/h8300_tpu.c unsigned long v1, v2, v3; v2 53 drivers/clocksource/h8300_tpu.c v2 = read_tcnt32(p); v2 56 drivers/clocksource/h8300_tpu.c } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) v2 57 drivers/clocksource/h8300_tpu.c || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); v2 59 drivers/clocksource/h8300_tpu.c *val = v2; v2 277 drivers/clocksource/sh_cmt.c u32 v1, v2, v3; v2 286 drivers/clocksource/sh_cmt.c v2 = sh_cmt_read_cmcnt(ch); v2 289 drivers/clocksource/sh_cmt.c } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) v2 290 drivers/clocksource/sh_cmt.c || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); v2 293 drivers/clocksource/sh_cmt.c return v2; v2 677 drivers/dma/fsl-edma-common.c edma->regs.serq = edma->membase + ((edma->drvdata->version == v2) ? v2 679 drivers/dma/fsl-edma-common.c edma->regs.cerq = edma->membase + ((edma->drvdata->version == v2) ? v2 681 drivers/dma/fsl-edma-common.c edma->regs.seei = edma->membase + ((edma->drvdata->version == v2) ? v2 683 drivers/dma/fsl-edma-common.c edma->regs.ceei = edma->membase + ((edma->drvdata->version == v2) ? v2 685 drivers/dma/fsl-edma-common.c edma->regs.cint = edma->membase + ((edma->drvdata->version == v2) ? v2 687 drivers/dma/fsl-edma-common.c edma->regs.cerr = edma->membase + ((edma->drvdata->version == v2) ? v2 689 drivers/dma/fsl-edma-common.c edma->regs.ssrt = edma->membase + ((edma->drvdata->version == v2) ? v2 691 drivers/dma/fsl-edma-common.c edma->regs.cdne = edma->membase + ((edma->drvdata->version == v2) ? v2 693 drivers/dma/fsl-edma-common.c edma->regs.intl = edma->membase + ((edma->drvdata->version == v2) ? v2 695 drivers/dma/fsl-edma-common.c edma->regs.errl = edma->membase + ((edma->drvdata->version == v2) ? v2 698 drivers/dma/fsl-edma-common.c if (edma->drvdata->version == v2) { v2 168 drivers/dma/mcf-edma.c .version = v2, v2 39 drivers/firmware/google/memconsole-x86-legacy.c } __packed v2; v2 70 drivers/firmware/google/memconsole-x86-legacy.c hdr->v2.buffer_addr, hdr->v2.start, v2 71 drivers/firmware/google/memconsole-x86-legacy.c hdr->v2.end, hdr->v2.num_bytes); v2 73 drivers/firmware/google/memconsole-x86-legacy.c memconsole_baseaddr = phys_to_virt(hdr->v2.buffer_addr + hdr->v2.start); v2 74 drivers/firmware/google/memconsole-x86-legacy.c memconsole_length = hdr->v2.end - hdr->v2.start; v2 876 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _ATOM_ASIC_SS_ASSIGNMENT_V2 v2; v2 933 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if ((ss_assign->v2.ucClockIndication == id) && v2 934 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) { v2 936 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c le16_to_cpu(ss_assign->v2.usSpreadSpectrumPercentage); v2 937 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ss->type = ss_assign->v2.ucSpreadSpectrumMode; v2 938 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ss->rate = le16_to_cpu(ss_assign->v2.usSpreadRateIn10Hz); v2 988 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2 v2; v2 1185 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _SET_VOLTAGE_PARAMETERS_V2 v2; v2 1203 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v2.ucVoltageType = SET_VOLTAGE_GET_MAX_VOLTAGE; v2 1204 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v2.ucVoltageMode = 0; v2 1205 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v2.usVoltageLevel = 0; v2 1209 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c *voltage = le16_to_cpu(args.v2.usVoltageLevel); v2 1388 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _ATOM_VOLTAGE_OBJECT_INFO_V2 v2; v2 1394 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _ATOM_VOLTAGE_OBJECT_V2 v2; v2 237 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c ENABLE_SPREAD_SPECTRUM_ON_PPLL_V2 v2; v2 461 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c PIXEL_CLOCK_PARAMETERS_V2 v2; v2 618 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.usPixelClock = cpu_to_le16(clock / 10); v2 619 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.usRefDiv = cpu_to_le16(ref_div); v2 620 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.usFbDiv = cpu_to_le16(fb_div); v2 621 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.ucFracFbDiv = frac_fb_div; v2 622 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.ucPostDiv = post_div; v2 623 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.ucPpll = pll_id; v2 624 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.ucCRTC = crtc_id; v2 625 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.ucRefDivSrc = 1; v2 54 drivers/gpu/drm/amd/amdgpu/atombios_dp.c PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2; v2 78 drivers/gpu/drm/amd/amdgpu/atombios_dp.c args.v2.lpAuxRequest = cpu_to_le16((u16)(0 + 4)); v2 79 drivers/gpu/drm/amd/amdgpu/atombios_dp.c args.v2.lpDataOut = cpu_to_le16((u16)(16 + 4)); v2 80 drivers/gpu/drm/amd/amdgpu/atombios_dp.c args.v2.ucDataOutLen = 0; v2 81 drivers/gpu/drm/amd/amdgpu/atombios_dp.c args.v2.ucChannelID = chan->rec.i2c_id; v2 82 drivers/gpu/drm/amd/amdgpu/atombios_dp.c args.v2.ucDelay = delay / 10; v2 83 drivers/gpu/drm/amd/amdgpu/atombios_dp.c args.v2.ucHPD_ID = chan->rec.hpd; v2 87 drivers/gpu/drm/amd/amdgpu/atombios_dp.c *ack = args.v2.ucReplyStatus; v2 90 drivers/gpu/drm/amd/amdgpu/atombios_dp.c if (args.v2.ucReplyStatus == 1) { v2 96 drivers/gpu/drm/amd/amdgpu/atombios_dp.c if (args.v2.ucReplyStatus == 2) { v2 103 drivers/gpu/drm/amd/amdgpu/atombios_dp.c if (args.v2.ucReplyStatus == 3) { v2 565 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c DIG_ENCODER_CONTROL_PARAMETERS_V2 v2; v2 753 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2; v2 895 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucAction = action; v2 897 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.usInitInfo = cpu_to_le16(connector_object_id); v2 899 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.asMode.ucLaneSel = lane_num; v2 900 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.asMode.ucLaneSet = lane_set; v2 903 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.usPixelClock = cpu_to_le16(dp_clock / 10); v2 905 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10); v2 907 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); v2 910 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.ucEncoderSel = dig_encoder; v2 912 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.ucLinkSel = 1; v2 916 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.ucTransmitterSel = 0; v2 919 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.ucTransmitterSel = 1; v2 922 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.ucTransmitterSel = 2; v2 927 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.fCoherentMode = 1; v2 928 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.fDPConnector = 1; v2 931 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.fCoherentMode = 1; v2 933 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.acConfig.fDualLinkConnector = 1; v2 1461 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c SELECT_CRTC_SOURCE_PARAMETERS_V2 v2; v2 1526 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucCRTC = amdgpu_crtc->crtc_id; v2 1531 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS; v2 1533 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_CRT; v2 1535 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); v2 1537 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS; v2 1539 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); v2 1550 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; v2 1553 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; v2 1556 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID; v2 1559 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID; v2 1562 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID; v2 1565 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID; v2 1568 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG7_ENCODER_ID; v2 1573 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; v2 1577 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1579 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1581 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID; v2 1585 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1587 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1589 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID; v2 1599 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS; v2 1601 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_CRT; v2 1603 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); v2 1605 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS; v2 1607 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v2.ucEncodeMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); v2 2640 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 2744 drivers/gpu/drm/amd/amdgpu/kv_dpm.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 2754 drivers/gpu/drm/amd/amdgpu/kv_dpm.c idx = (u8 *)&power_state->v2.clockInfoIndex[0]; v2 2755 drivers/gpu/drm/amd/amdgpu/kv_dpm.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 2772 drivers/gpu/drm/amd/amdgpu/kv_dpm.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 7210 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 7256 drivers/gpu/drm/amd/amdgpu/si_dpm.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 7269 drivers/gpu/drm/amd/amdgpu/si_dpm.c idx = (u8 *)&power_state->v2.clockInfoIndex[0]; v2 7270 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 7284 drivers/gpu/drm/amd/amdgpu/si_dpm.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 96 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c float dcn_bw_max3(float v1, float v2, float v3) v2 98 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c return v3 > dcn_bw_max2(v1, v2) ? v3 : dcn_bw_max2(v1, v2); v2 101 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5) v2 103 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v5); v2 159 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t v2 = 0; v2 180 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c v2 = get_reg_field_value( v2 185 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c if (h1 == h2 && v1 == v2) v2 1384 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c #define AUX_REG_UPDATE_2(reg, f1, v1, f2, v2) \ v2 1387 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c FN(reg, f2), v2) v2 55 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h struct bw_fixed v2, v2 58 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h return bw_min2(bw_min2(v1, v2), v3); v2 62 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h struct bw_fixed v2, v2 65 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h return bw_max2(bw_max2(v1, v2), v3); v2 37 drivers/gpu/drm/amd/display/dc/inc/dcn_calc_math.h float dcn_bw_max3(float v1, float v2, float v3); v2 38 drivers/gpu/drm/amd/display/dc/inc/dcn_calc_math.h float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5); v2 67 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ v2 70 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2) v2 72 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ v2 75 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2,\ v2 78 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ v2 81 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2,\ v2 85 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v2 89 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2,\ v2 94 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v2 98 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2,\ v2 104 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v2 108 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2,\ v2 115 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v2 119 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2,\ v2 127 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_9(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \ v2 131 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 140 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_10(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \ v2 144 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 160 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_2(reg_name, f1, v1, f2, v2) \ v2 163 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f2), v2) v2 165 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \ v2 168 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f2), v2, \ v2 171 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \ v2 174 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f2), v2, \ v2 178 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \ v2 181 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f2), v2, \ v2 186 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_6(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \ v2 189 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f2), v2, \ v2 195 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ v2 198 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f2), v2, \ v2 205 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_8(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \ v2 208 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f2), v2, \ v2 234 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_2(reg, f1, v1, f2, v2) \ v2 237 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2) v2 239 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ v2 242 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 245 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ v2 248 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 252 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_5(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \ v2 255 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 260 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_6(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \ v2 263 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 269 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_7(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ v2 272 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 279 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_8(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \ v2 282 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 290 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_9(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9) \ v2 293 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 302 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10)\ v2 305 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 315 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_14(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\ v2 319 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 333 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_19(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\ v2 337 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 356 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_20(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\ v2 360 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2, \ v2 382 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_SEQ_2(reg, f1, v1, f2, v2) \ v2 384 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h REG_SET(reg, val, f2, v2); } v2 386 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_SEQ_3(reg, f1, v1, f2, v2, f3, v3) \ v2 388 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h val = REG_SET(reg, val, f2, v2); \ v2 452 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define IX_REG_SET_2(index_reg_name, data_reg_name, index, init_value, f1, v1, f2, v2) \ v2 455 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2) v2 469 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define IX_REG_UPDATE_2(index_reg_name, data_reg_name, index, f1, v1, f2, v2) \ v2 472 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f2), v2) v2 43 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct _ATOM_VOLTAGE_OBJECT_INFO_V2 v2; v2 319 drivers/gpu/drm/amd/powerplay/smu_v11_0.c const struct smc_firmware_header_v2_0 *v2; v2 321 drivers/gpu/drm/amd/powerplay/smu_v11_0.c v2 = (const struct smc_firmware_header_v2_0 *) adev->pm.fw->data; v2 323 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ppt_offset_bytes = le32_to_cpu(v2->ppt_offset_bytes); v2 324 drivers/gpu/drm/amd/powerplay/smu_v11_0.c *size = le32_to_cpu(v2->ppt_size_bytes); v2 325 drivers/gpu/drm/amd/powerplay/smu_v11_0.c *table = (uint8_t *)v2 + ppt_offset_bytes; v2 64 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c clear_bit(v2_context->id, context->global->v2.pta_alloc); v2 196 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c lower_32_bits(context->global->v2.pta_dma)); v2 198 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c upper_32_bits(context->global->v2.pta_dma)); v2 211 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c context->global->v2.pta_cpu[v2_context->id] = v2_context->mtlb_dma | v2 272 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c v2_context->id = find_first_zero_bit(global->v2.pta_alloc, v2 275 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c set_bit(v2_context->id, global->v2.pta_alloc); v2 290 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c global->v2.pta_cpu[v2_context->id] = v2_context->mtlb_dma; v2 302 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c clear_bit(v2_context->id, global->v2.pta_alloc); v2 468 drivers/gpu/drm/etnaviv/etnaviv_mmu.c global->v2.pta_cpu = dma_alloc_wc(dev, ETNAVIV_PTA_SIZE, v2 469 drivers/gpu/drm/etnaviv/etnaviv_mmu.c &global->v2.pta_dma, GFP_KERNEL); v2 470 drivers/gpu/drm/etnaviv/etnaviv_mmu.c if (!global->v2.pta_cpu) v2 504 drivers/gpu/drm/etnaviv/etnaviv_mmu.c if (global->v2.pta_cpu) v2 506 drivers/gpu/drm/etnaviv/etnaviv_mmu.c global->v2.pta_cpu, global->v2.pta_dma); v2 66 drivers/gpu/drm/etnaviv/etnaviv_mmu.h } v2; v2 473 drivers/gpu/drm/exynos/exynos_drm_fimc.c u32 cfg, h1, h2, v1, v2; v2 479 drivers/gpu/drm/exynos/exynos_drm_fimc.c v2 = buf->buf.height - buf->rect.h - buf->rect.y; v2 485 drivers/gpu/drm/exynos/exynos_drm_fimc.c v2); v2 500 drivers/gpu/drm/exynos/exynos_drm_fimc.c EXYNOS_CIWDOFST2_WINVEROFST2(v2)); v2 440 drivers/gpu/drm/radeon/atombios_crtc.c ENABLE_SPREAD_SPECTRUM_ON_PPLL_V2 v2; v2 501 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); v2 502 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; v2 505 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P1PLL; v2 508 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P2PLL; v2 511 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_DCPLL; v2 516 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); v2 517 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.usSpreadSpectrumStep = cpu_to_le16(ss->step); v2 518 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucEnable = enable; v2 765 drivers/gpu/drm/radeon/atombios_crtc.c PIXEL_CLOCK_PARAMETERS_V2 v2; v2 865 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.usPixelClock = cpu_to_le16(clock / 10); v2 866 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.usRefDiv = cpu_to_le16(ref_div); v2 867 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.usFbDiv = cpu_to_le16(fb_div); v2 868 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucFracFbDiv = frac_fb_div; v2 869 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucPostDiv = post_div; v2 870 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucPpll = pll_id; v2 871 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucCRTC = crtc_id; v2 872 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.ucRefDivSrc = 1; v2 82 drivers/gpu/drm/radeon/atombios_dp.c PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2; v2 113 drivers/gpu/drm/radeon/atombios_dp.c args.v2.ucHPD_ID = chan->rec.hpd; v2 561 drivers/gpu/drm/radeon/atombios_encoders.c LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2 v2; v2 629 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucMisc = 0; v2 630 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucAction = action; v2 633 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; v2 636 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; v2 637 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); v2 638 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucTruncate = 0; v2 639 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucSpatial = 0; v2 640 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucTemporal = 0; v2 641 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucFRC = 0; v2 644 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; v2 646 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN; v2 648 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucSpatial |= PANEL_ENCODER_SPATIAL_DITHER_DEPTH; v2 651 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN; v2 653 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH; v2 655 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; v2 659 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; v2 661 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; v2 840 drivers/gpu/drm/radeon/atombios_encoders.c DIG_ENCODER_CONTROL_PARAMETERS_V2 v2; v2 1009 drivers/gpu/drm/radeon/atombios_encoders.c DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2; v2 1150 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucAction = action; v2 1152 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.usInitInfo = cpu_to_le16(connector_object_id); v2 1154 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.asMode.ucLaneSel = lane_num; v2 1155 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.asMode.ucLaneSet = lane_set; v2 1158 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.usPixelClock = cpu_to_le16(dp_clock / 10); v2 1160 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); v2 1162 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); v2 1165 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.ucEncoderSel = dig_encoder; v2 1167 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.ucLinkSel = 1; v2 1171 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.ucTransmitterSel = 0; v2 1174 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.ucTransmitterSel = 1; v2 1177 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.ucTransmitterSel = 2; v2 1182 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.fCoherentMode = 1; v2 1183 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.fDPConnector = 1; v2 1186 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.fCoherentMode = 1; v2 1188 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.acConfig.fDualLinkConnector = 1; v2 1860 drivers/gpu/drm/radeon/atombios_encoders.c SELECT_CRTC_SOURCE_PARAMETERS_V2 v2; v2 1932 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucCRTC = radeon_crtc->crtc_id; v2 1937 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS; v2 1939 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_CRT; v2 1941 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder); v2 1943 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS; v2 1945 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder); v2 1956 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; v2 1959 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; v2 1962 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID; v2 1965 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID; v2 1968 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID; v2 1971 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID; v2 1974 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG7_ENCODER_ID; v2 1979 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; v2 1983 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1985 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1987 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID; v2 1991 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1993 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; v2 1995 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID; v2 2030 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucCRTC = radeon_crtc->crtc_id; v2 2031 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncodeMode = ATOM_ENCODER_MODE_DP_MST; v2 2035 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; v2 2038 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; v2 2041 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID; v2 2044 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID; v2 2047 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID; v2 2050 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID; v2 2053 drivers/gpu/drm/radeon/atombios_encoders.c args.v2.ucEncoderID = ASIC_INT_DIG7_ENCODER_ID; v2 5448 drivers/gpu/drm/radeon/ci_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 5584 drivers/gpu/drm/radeon/ci_dpm.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 5599 drivers/gpu/drm/radeon/ci_dpm.c idx = (u8 *)&power_state->v2.clockInfoIndex[0]; v2 5600 drivers/gpu/drm/radeon/ci_dpm.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 5614 drivers/gpu/drm/radeon/ci_dpm.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 2572 drivers/gpu/drm/radeon/kv_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 2674 drivers/gpu/drm/radeon/kv_dpm.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 2686 drivers/gpu/drm/radeon/kv_dpm.c idx = (u8 *)&power_state->v2.clockInfoIndex[0]; v2 2687 drivers/gpu/drm/radeon/kv_dpm.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 2704 drivers/gpu/drm/radeon/kv_dpm.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 3891 drivers/gpu/drm/radeon/ni_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 1514 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_ASIC_SS_ASSIGNMENT_V2 v2; v2 1571 drivers/gpu/drm/radeon/radeon_atombios.c if ((ss_assign->v2.ucClockIndication == id) && v2 1572 drivers/gpu/drm/radeon/radeon_atombios.c (clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) { v2 1574 drivers/gpu/drm/radeon/radeon_atombios.c le16_to_cpu(ss_assign->v2.usSpreadSpectrumPercentage); v2 1575 drivers/gpu/drm/radeon/radeon_atombios.c ss->type = ss_assign->v2.ucSpreadSpectrumMode; v2 1576 drivers/gpu/drm/radeon/radeon_atombios.c ss->rate = le16_to_cpu(ss_assign->v2.usSpreadRateIn10Hz); v2 2050 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_PPLIB_STATE_V2 v2; v2 2708 drivers/gpu/drm/radeon/radeon_atombios.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 2712 drivers/gpu/drm/radeon/radeon_atombios.c kcalloc(power_state->v2.ucNumDPMLevels ? v2 2713 drivers/gpu/drm/radeon/radeon_atombios.c power_state->v2.ucNumDPMLevels : 1, v2 2718 drivers/gpu/drm/radeon/radeon_atombios.c if (power_state->v2.ucNumDPMLevels) { v2 2719 drivers/gpu/drm/radeon/radeon_atombios.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 2720 drivers/gpu/drm/radeon/radeon_atombios.c clock_array_index = power_state->v2.clockInfoIndex[j]; v2 2742 drivers/gpu/drm/radeon/radeon_atombios.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 2829 drivers/gpu/drm/radeon/radeon_atombios.c struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V2 v2; v2 2870 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucAction = clock_type; v2 2871 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */ v2 2875 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_div = args.v2.ucPostDiv; v2 2876 drivers/gpu/drm/radeon/radeon_atombios.c dividers->fb_div = le16_to_cpu(args.v2.usFbDiv); v2 2877 drivers/gpu/drm/radeon/radeon_atombios.c dividers->ref_div = args.v2.ucAction; v2 2879 drivers/gpu/drm/radeon/radeon_atombios.c dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? v2 2881 drivers/gpu/drm/radeon/radeon_atombios.c dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0; v2 3103 drivers/gpu/drm/radeon/radeon_atombios.c struct _SET_VOLTAGE_PARAMETERS_V2 v2; v2 3127 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageType = voltage_type; v2 3128 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE; v2 3129 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.usVoltageLevel = cpu_to_le16(voltage_level); v2 3158 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageType = SET_VOLTAGE_GET_MAX_VOLTAGE; v2 3159 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageMode = 0; v2 3160 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.usVoltageLevel = 0; v2 3164 drivers/gpu/drm/radeon/radeon_atombios.c *voltage = le16_to_cpu(args.v2.usVoltageLevel); v2 3356 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageType = voltage_type; v2 3357 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_GET_GPIOMASK; v2 3358 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.usVoltageLevel = cpu_to_le16(voltage_level); v2 3362 drivers/gpu/drm/radeon/radeon_atombios.c *gpio_mask = le32_to_cpu(*(u32 *)&args.v2); v2 3364 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageType = voltage_type; v2 3365 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_GET_GPIOVAL; v2 3366 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.usVoltageLevel = cpu_to_le16(voltage_level); v2 3370 drivers/gpu/drm/radeon/radeon_atombios.c *gpio_value = le32_to_cpu(*(u32 *)&args.v2); v2 3382 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_VOLTAGE_OBJECT_INFO_V2 v2; v2 3388 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_VOLTAGE_OBJECT_V2 v2; v2 3409 drivers/gpu/drm/radeon/radeon_atombios.c static ATOM_VOLTAGE_OBJECT_V2 *atom_lookup_voltage_object_v2(ATOM_VOLTAGE_OBJECT_INFO_V2 *v2, v2 3412 drivers/gpu/drm/radeon/radeon_atombios.c u32 size = le16_to_cpu(v2->sHeader.usStructureSize); v2 3414 drivers/gpu/drm/radeon/radeon_atombios.c u8 *start = (u8*)v2; v2 3471 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v2(&voltage_info->v2, voltage_type); v2 3473 drivers/gpu/drm/radeon/radeon_atombios.c (voltage_object->v2.asControl.ucVoltageControlId == VOLTAGE_CONTROLLED_BY_GPIO)) v2 3582 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v2(&voltage_info->v2, voltage_type); v2 3585 drivers/gpu/drm/radeon/radeon_atombios.c &voltage_object->v2.asFormula; v2 3633 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v2(&voltage_info->v2, voltage_type); v2 3636 drivers/gpu/drm/radeon/radeon_atombios.c &voltage_object->v2.asFormula; v2 3747 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v2(&voltage_info->v2, voltage_type); v2 3750 drivers/gpu/drm/radeon/radeon_atombios.c &voltage_object->v2.asFormula; v2 716 drivers/gpu/drm/radeon/rs780_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 1791 drivers/gpu/drm/radeon/rv6xx_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 2140 drivers/gpu/drm/radeon/rv770_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 6703 drivers/gpu/drm/radeon/si_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 6849 drivers/gpu/drm/radeon/si_dpm.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 6864 drivers/gpu/drm/radeon/si_dpm.c idx = (u8 *)&power_state->v2.clockInfoIndex[0]; v2 6865 drivers/gpu/drm/radeon/si_dpm.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 6879 drivers/gpu/drm/radeon/si_dpm.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 1389 drivers/gpu/drm/radeon/sumo_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 1493 drivers/gpu/drm/radeon/sumo_dpm.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 1505 drivers/gpu/drm/radeon/sumo_dpm.c idx = (u8 *)&power_state->v2.clockInfoIndex[0]; v2 1506 drivers/gpu/drm/radeon/sumo_dpm.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 1522 drivers/gpu/drm/radeon/sumo_dpm.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 1678 drivers/gpu/drm/radeon/trinity_dpm.c struct _ATOM_PPLIB_STATE_V2 v2; v2 1771 drivers/gpu/drm/radeon/trinity_dpm.c non_clock_array_index = power_state->v2.nonClockInfoIndex; v2 1783 drivers/gpu/drm/radeon/trinity_dpm.c idx = (u8 *)&power_state->v2.clockInfoIndex[0]; v2 1784 drivers/gpu/drm/radeon/trinity_dpm.c for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { v2 1801 drivers/gpu/drm/radeon/trinity_dpm.c power_state_offset += 2 + power_state->v2.ucNumDPMLevels; v2 52 drivers/hwmon/max1111.c uint8_t v1, v2; v2 70 drivers/hwmon/max1111.c v2 = data->rx_buf[1]; v2 74 drivers/hwmon/max1111.c if ((v1 & 0xc0) || (v2 & 0x3f)) v2 77 drivers/hwmon/max1111.c return (v1 << 2) | (v2 >> 6); v2 288 drivers/hwmon/nct7802.c unsigned int v1, v2; v2 296 drivers/hwmon/nct7802.c ret = regmap_read(data->regmap, REG_VOLTAGE_LOW, &v2); v2 299 drivers/hwmon/nct7802.c ret = ((v1 << 2) | (v2 >> 6)) * nct7802_vmul[nr]; v2 308 drivers/hwmon/nct7802.c &v2); v2 311 drivers/hwmon/nct7802.c ret = (v1 | ((v2 << shift) & 0x300)) * nct7802_vmul[nr]; v2 920 drivers/hwmon/pmbus/pmbus_core.c long v1, v2; v2 928 drivers/hwmon/pmbus/pmbus_core.c v2 = pmbus_reg2data(data, s2); v2 929 drivers/hwmon/pmbus/pmbus_core.c ret = !!(regval && v1 >= v2); v2 37 drivers/iio/adc/palmas_gpadc.c int v2; /* expected higher volt reading */ v2 51 drivers/iio/adc/palmas_gpadc.c .v2 = _v2, \ v2 300 drivers/iio/adc/palmas_gpadc.c int v2 = adc->adc_info[adc_chan].v2; v2 320 drivers/iio/adc/palmas_gpadc.c gain = ((v2 - v1) * 1000) / (x2 - x1); v2 647 drivers/infiniband/sw/siw/siw_cm.c struct mpa_v2_data *v2 = (struct mpa_v2_data *)cep->mpa.pdata; v2 654 drivers/infiniband/sw/siw/siw_cm.c cep->ord = ntohs(v2->ird) & MPA_IRD_ORD_MASK; v2 656 drivers/infiniband/sw/siw/siw_cm.c cep->ird = ntohs(v2->ord) & MPA_IRD_ORD_MASK; v2 671 drivers/infiniband/sw/siw/siw_cm.c if (v2->ird & MPA_V2_PEER_TO_PEER) { v2 674 drivers/infiniband/sw/siw/siw_cm.c if (v2->ord & MPA_V2_RDMA_WRITE_RTR) v2 676 drivers/infiniband/sw/siw/siw_cm.c else if (v2->ord & MPA_V2_RDMA_READ_RTR) v2 771 drivers/infiniband/sw/siw/siw_cm.c struct mpa_v2_data *v2; v2 789 drivers/infiniband/sw/siw/siw_cm.c v2 = (struct mpa_v2_data *)cep->mpa.pdata; v2 790 drivers/infiniband/sw/siw/siw_cm.c rep_ird = ntohs(v2->ird) & MPA_IRD_ORD_MASK; v2 791 drivers/infiniband/sw/siw/siw_cm.c rep_ord = ntohs(v2->ord) & MPA_IRD_ORD_MASK; v2 834 drivers/infiniband/sw/siw/siw_cm.c if ((mpa_p2p_mode & v2->ord) == 0) { v2 842 drivers/infiniband/sw/siw/siw_cm.c v2->ord & (MPA_V2_RDMA_WRITE_RTR | v2 853 drivers/infiniband/sw/siw/siw_cm.c mpa_p2p_mode = v2->ord & (MPA_V2_RDMA_WRITE_RTR | v2 295 drivers/input/mouse/sentelic.c int v0, v1, v2; v2 305 drivers/input/mouse/sentelic.c if (fsp_reg_read(psmouse, FSP_REG_SN2, &v2)) v2 307 drivers/input/mouse/sentelic.c *sn = (v0 << 16) | (v1 << 8) | v2; v2 386 drivers/input/mouse/sentelic.c int val, v2; v2 391 drivers/input/mouse/sentelic.c if (fsp_reg_read(psmouse, FSP_REG_SYSCTL5, &v2)) v2 398 drivers/input/mouse/sentelic.c v2 |= FSP_BIT_EN_MSID6; v2 401 drivers/input/mouse/sentelic.c v2 &= ~(FSP_BIT_EN_MSID6 | FSP_BIT_EN_MSID7 | FSP_BIT_EN_MSID8); v2 408 drivers/input/mouse/sentelic.c if (fsp_reg_write(psmouse, FSP_REG_SYSCTL5, v2)) v2 1438 drivers/media/pci/saa7134/saa7134-video.c int v2 = saa_readb(SAA7134_STATUS_VIDEO2); v2 1442 drivers/media/pci/saa7134/saa7134-video.c if (0 != (v2 & 0x40)) v2 1444 drivers/media/pci/saa7134/saa7134-video.c if (0 != (v2 & 0x0e)) v2 564 drivers/media/pci/tw5864/tw5864-video.c u8 v2 = indir_0x00d; v2 580 drivers/media/pci/tw5864/tw5864-video.c if (v2 & (1 << 2)) v2 676 drivers/media/pci/tw68/tw68-video.c int v2 = tw_readb(TW68_MVSN); v2 686 drivers/media/pci/tw68/tw68-video.c if (0 != (v2 & (1 << 2))) v2 800 drivers/media/usb/gspca/xirlink_cit.c static void cit_model2_Packet1(struct gspca_dev *gspca_dev, u16 v1, u16 v2) v2 807 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, v2, 0x0127); v2 821 drivers/media/usb/gspca/xirlink_cit.c static void cit_model3_Packet1(struct gspca_dev *gspca_dev, u16 v1, u16 v2) v2 826 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, v2, 0x0127); v2 830 drivers/media/usb/gspca/xirlink_cit.c static void cit_model4_Packet1(struct gspca_dev *gspca_dev, u16 v1, u16 v2) v2 835 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, v2, 0x0127); v2 194 drivers/message/fusion/mptscsih.c dma_addr_t v2; v2 246 drivers/message/fusion/mptscsih.c v2 = sg_dma_address(sg); v2 247 drivers/message/fusion/mptscsih.c ioc->add_sge(psge, sgflags | thisxfer, v2); v2 268 drivers/message/fusion/mptscsih.c v2 = sg_dma_address(sg); v2 269 drivers/message/fusion/mptscsih.c ioc->add_sge(psge, sgflags | thisxfer, v2); v2 185 drivers/mfd/tps65010.c u8 value, v2; v2 250 drivers/mfd/tps65010.c v2 = i2c_smbus_read_byte_data(tps->client, TPS_LED1_PER); v2 253 drivers/mfd/tps65010.c ? ((v2 & 0x80) ? "on" : "off") v2 254 drivers/mfd/tps65010.c : ((v2 & 0x80) ? "blink" : "(nPG)"), v2 255 drivers/mfd/tps65010.c value, v2, v2 256 drivers/mfd/tps65010.c (value & 0x7f) * 10, (v2 & 0x7f) * 100); v2 259 drivers/mfd/tps65010.c v2 = i2c_smbus_read_byte_data(tps->client, TPS_LED2_PER); v2 262 drivers/mfd/tps65010.c ? ((v2 & 0x80) ? "on" : "off") v2 263 drivers/mfd/tps65010.c : ((v2 & 0x80) ? "blink" : "off"), v2 264 drivers/mfd/tps65010.c value, v2, v2 265 drivers/mfd/tps65010.c (value & 0x7f) * 10, (v2 & 0x7f) * 100); v2 268 drivers/mfd/tps65010.c v2 = i2c_smbus_read_byte_data(tps->client, TPS_MASK3); v2 269 drivers/mfd/tps65010.c seq_printf(s, "defgpio %02x mask3 %02x\n", value, v2); v2 278 drivers/mfd/tps65010.c (v2 & (1 << i)) ? "no-irq" : "irq", v2 279 drivers/mfd/tps65010.c (v2 & (1 << (4 + i))) ? "rising" : "falling"); v2 724 drivers/net/can/peak_canfd/peak_pciefd_main.c u32 v2; v2 771 drivers/net/can/peak_canfd/peak_pciefd_main.c v2 = pciefd_sys_readreg(pciefd, PCIEFD_REG_SYS_VER2); v2 773 drivers/net/can/peak_canfd/peak_pciefd_main.c hw_ver_major = (v2 & 0x0000f000) >> 12; v2 774 drivers/net/can/peak_canfd/peak_pciefd_main.c hw_ver_minor = (v2 & 0x00000f00) >> 8; v2 775 drivers/net/can/peak_canfd/peak_pciefd_main.c hw_ver_sub = (v2 & 0x000000f0) >> 4; v2 300 drivers/net/can/spi/mcp251x.c static void mcp251x_read_2regs(struct spi_device *spi, u8 reg, u8 *v1, u8 *v2) v2 310 drivers/net/can/spi/mcp251x.c *v2 = priv->spi_rx_buf[3]; v2 269 drivers/net/ethernet/chelsio/cxgb3/aq100x.c unsigned int v, v2, gpio, wait; v2 344 drivers/net/ethernet/chelsio/cxgb3/aq100x.c v = v2 = 0; v2 346 drivers/net/ethernet/chelsio/cxgb3/aq100x.c t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_TX_CFG, &v2); v2 347 drivers/net/ethernet/chelsio/cxgb3/aq100x.c if (v != 0x1b || v2 != 0x1b) v2 350 drivers/net/ethernet/chelsio/cxgb3/aq100x.c phy_addr, v, v2); v2 100 drivers/net/ethernet/chelsio/cxgb3/mc5.c static inline void dbgi_wr_data3(struct adapter *adapter, u32 v1, u32 v2, v2 104 drivers/net/ethernet/chelsio/cxgb3/mc5.c t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_DATA1, v2); v2 1744 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v1, v2, lp_count, hp_count; v2 1747 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2_A); v2 1753 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c hp_count = HP_COUNT_T5_G(v2); v2 2007 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v1, v2, lp_count, hp_count; v2 2011 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2_A); v2 2017 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c hp_count = HP_COUNT_T5_G(v2); v2 2730 drivers/net/ethernet/emulex/benet/be_cmds.c int v2[4]; v2 2733 drivers/net/ethernet/emulex/benet/be_cmds.c if (sscanf(ver, "%d.%d.%d.%d", &v2[0], &v2[1], &v2[2], &v2[3]) != 4) v2 2737 drivers/net/ethernet/emulex/benet/be_cmds.c if (v1[i] < v2[i]) v2 2739 drivers/net/ethernet/emulex/benet/be_cmds.c else if (v1[i] > v2[i]) v2 110 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h #define mlxsw_pci_cqe_item_helpers(name, v0, v1, v2) \ v2 120 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h return mlxsw_pci_cqe##v2##_##name##_get(cqe); \ v2 135 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h mlxsw_pci_cqe##v2##_##name##_set(cqe, val); \ v2 74 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.c struct nfp_nffw_info_v2 v2; v2 145 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.c *arr = &fwinf->info.v2.fwinfo[0]; v2 4061 drivers/net/ethernet/sun/niu.c u64 v0, u64 v1, u64 v2) v2 4068 drivers/net/ethernet/sun/niu.c lp->v2 = v2; v2 4106 drivers/net/ethernet/sun/niu.c if (v2) { v2 4107 drivers/net/ethernet/sun/niu.c if (v2 & 0x01ef) { v2 4112 drivers/net/ethernet/sun/niu.c if (v2 & 0x0210) { v2 4183 drivers/net/ethernet/sun/niu.c u64 v0, u64 v1, u64 v2) v2 4188 drivers/net/ethernet/sun/niu.c lp->v2 = v2; v2 4200 drivers/net/ethernet/sun/niu.c u64 v0, v1, v2; v2 4210 drivers/net/ethernet/sun/niu.c v2 = nr64(LDSV2(ldg)); v2 4216 drivers/net/ethernet/sun/niu.c (unsigned long long) v2); v2 4218 drivers/net/ethernet/sun/niu.c if (unlikely(!v0 && !v1 && !v2)) { v2 4223 drivers/net/ethernet/sun/niu.c if (unlikely((v0 & ((u64)1 << LDN_MIF)) || v1 || v2)) { v2 4224 drivers/net/ethernet/sun/niu.c int err = niu_slowpath_interrupt(np, lp, v0, v1, v2); v2 4229 drivers/net/ethernet/sun/niu.c niu_schedule_napi(np, lp, v0, v1, v2); v2 3174 drivers/net/ethernet/sun/niu.h u64 v0, v1, v2; v2 75 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v2; v2 81 drivers/net/ethernet/toshiba/ps3_gelic_net.c &card->ether_port_status, &v2); v2 107 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v2 111 drivers/net/ethernet/toshiba/ps3_gelic_net.c GELIC_LV1_PHY_ETHERNET_0, mode, 0, &v1, &v2); v2 1302 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v2 1317 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v2 1328 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v2 1341 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v2 1352 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v2 1462 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v2 1472 drivers/net/ethernet/toshiba/ps3_gelic_net.c 0, 0, 0, &v1, &v2); v2 1568 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v2 1590 drivers/net/ethernet/toshiba/ps3_gelic_net.c 0, 0, &v1, &v2); v2 1606 drivers/net/ethernet/toshiba/ps3_gelic_net.c 0, 0, &v1, &v2); v2 210 drivers/net/wireless/ath/ath6kl/wmi.c struct wmi_tx_meta_v2 *v2; v2 225 drivers/net/wireless/ath/ath6kl/wmi.c v2 = (struct wmi_tx_meta_v2 *) skb->data; v2 226 drivers/net/wireless/ath/ath6kl/wmi.c memcpy(v2, (struct wmi_tx_meta_v2 *) tx_meta_info, v2 32 drivers/net/wireless/ath/ath9k/rng.c u32 v1, v2, rng_last = sc->rng_last; v2 43 drivers/net/wireless/ath/ath9k/rng.c v2 = REG_READ(ah, AR_PHY_TST_ADC) & 0xffff; v2 46 drivers/net/wireless/ath/ath9k/rng.c if (v1 && v2 && rng_last != v1 && v1 != v2 && v1 != 0xffff && v2 47 drivers/net/wireless/ath/ath9k/rng.c v2 != 0xffff) v2 48 drivers/net/wireless/ath/ath9k/rng.c buf[j++] = (v1 << 16) | v2; v2 50 drivers/net/wireless/ath/ath9k/rng.c rng_last = v2; v2 1556 drivers/net/wireless/ath/wil6210/txrx.c struct wil_ring *v, *v2; v2 1595 drivers/net/wireless/ath/wil6210/txrx.c v2 = &wil->ring_tx[i]; v2 1597 drivers/net/wireless/ath/wil6210/txrx.c if (!v2->va || txdata2->mid != vif->mid) v2 1613 drivers/net/wireless/ath/wil6210/txrx.c wil_tx_ring(wil, vif, v2, skb2); v2 204 drivers/net/wireless/atmel/atmel_cs.c #define PCMCIA_DEVICE_PROD_ID12_INFO(v1, v2, vh1, vh2, info) { \ v2 207 drivers/net/wireless/atmel/atmel_cs.c .prod_id = { (v1), (v2), NULL, NULL }, \ v2 417 drivers/net/wireless/broadcom/b43legacy/main.c u16 v2; v2 425 drivers/net/wireless/broadcom/b43legacy/main.c v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); v2 432 drivers/net/wireless/broadcom/b43legacy/main.c } while (v3 != test3 || v2 != test2 || v1 != test1); v2 436 drivers/net/wireless/broadcom/b43legacy/main.c tmp = v2; v2 482 drivers/net/wireless/broadcom/b43legacy/main.c u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32; v2 487 drivers/net/wireless/broadcom/b43legacy/main.c b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2); v2 1758 drivers/net/wireless/broadcom/b43legacy/phy.c s8 v2; v2 1786 drivers/net/wireless/broadcom/b43legacy/phy.c v2 = (s8)(tmp & 0x00FF); v2 1790 drivers/net/wireless/broadcom/b43legacy/phy.c if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) { v2 1797 drivers/net/wireless/broadcom/b43legacy/phy.c v2 = (s8)(tmp & 0x00FF); v2 1799 drivers/net/wireless/broadcom/b43legacy/phy.c if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) v2 1803 drivers/net/wireless/broadcom/b43legacy/phy.c v2 = (v2 + 0x20) & 0x3F; v2 1809 drivers/net/wireless/broadcom/b43legacy/phy.c average = (v0 + v1 + v2 + v3 + 2) / 4; v2 3753 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c u32 v1, v2; v2 3763 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v2 = MCTL_WAKE; v2 3765 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v2 |= MCTL_HPS; v2 3767 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2); v2 21255 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; v2 21266 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c 1, 0x08, 16, &v2); v2 21277 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c 1, 0x18, 16, &v2); v2 664 drivers/net/wireless/intel/iwlwifi/fw/api/scan.h } v2; /* SCAN_CHANNEL_CFG_S_VER2 */ v2 92 drivers/net/wireless/intel/iwlwifi/fw/file.h } v2; v2 515 drivers/net/wireless/intel/iwlwifi/iwl-drv.c build = le32_to_cpu(ucode->u.v2.build); v2 517 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v2.inst_size)); v2 519 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v2.data_size)); v2 521 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v2.init_size)); v2 523 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v2.init_data_size)); v2 524 drivers/net/wireless/intel/iwlwifi/iwl-drv.c src = ucode->u.v2.data; v2 92 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c struct iwl_proto_offload_cmd_v2 v2; v2 179 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c BUILD_BUG_ON(sizeof(cmd.v2.target_ipv6_addr[0]) != v2 188 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c memcpy(cmd.v2.target_ipv6_addr[i], v2 190 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c sizeof(cmd.v2.target_ipv6_addr[i])); v2 196 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c memcpy(cmd.v2.ndp_mac_addr, vif->addr, ETH_ALEN); v2 232 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c common = &cmd.v2.common; v2 233 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c size = sizeof(cmd.v2); v2 1429 drivers/net/wireless/intel/iwlwifi/mvm/scan.c channel_cfg[i].v2.band = v2 1432 drivers/net/wireless/intel/iwlwifi/mvm/scan.c channel_cfg[i].v2.iter_count = 1; v2 1433 drivers/net/wireless/intel/iwlwifi/mvm/scan.c channel_cfg[i].v2.iter_interval = 0; v2 242 drivers/net/wireless/intersil/p54/fwio.c eeprom_hdr->v2.offset = cpu_to_le32(offset); v2 243 drivers/net/wireless/intersil/p54/fwio.c eeprom_hdr->v2.len = cpu_to_le16(len); v2 244 drivers/net/wireless/intersil/p54/fwio.c eeprom_hdr->v2.magic2 = 0xf; v2 245 drivers/net/wireless/intersil/p54/fwio.c memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4); v2 372 drivers/net/wireless/intersil/p54/fwio.c setup->v2.rx_addr = cpu_to_le32(priv->rx_end); v2 373 drivers/net/wireless/intersil/p54/fwio.c setup->v2.max_rx = cpu_to_le16(priv->rx_mtu); v2 374 drivers/net/wireless/intersil/p54/fwio.c setup->v2.rxhw = cpu_to_le16(priv->rxhw); v2 375 drivers/net/wireless/intersil/p54/fwio.c setup->v2.timer = cpu_to_le16(priv->wakeup_timer); v2 376 drivers/net/wireless/intersil/p54/fwio.c setup->v2.truncate = cpu_to_le16(48896); v2 377 drivers/net/wireless/intersil/p54/fwio.c setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); v2 378 drivers/net/wireless/intersil/p54/fwio.c setup->v2.sbss_offset = 0; v2 379 drivers/net/wireless/intersil/p54/fwio.c setup->v2.mcast_window = 0; v2 380 drivers/net/wireless/intersil/p54/fwio.c setup->v2.rx_rssi_threshold = 0; v2 381 drivers/net/wireless/intersil/p54/fwio.c setup->v2.rx_ed_threshold = 0; v2 382 drivers/net/wireless/intersil/p54/fwio.c setup->v2.ref_clock = cpu_to_le32(644245094); v2 383 drivers/net/wireless/intersil/p54/fwio.c setup->v2.lpf_bandwidth = cpu_to_le16(65535); v2 384 drivers/net/wireless/intersil/p54/fwio.c setup->v2.osc_start_delay = cpu_to_le16(65535); v2 149 drivers/net/wireless/intersil/p54/lmac.h } __packed v2; v2 318 drivers/net/wireless/intersil/p54/lmac.h } __packed v2; v2 503 drivers/net/wireless/intersil/p54/txrx.c memcpy(priv->eeprom, eeprom->v2.data, v2 504 drivers/net/wireless/intersil/p54/txrx.c le16_to_cpu(eeprom->v2.len)); v2 51 drivers/net/wireless/mediatek/mt76/mt76x02_phy.c mt76x02_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4) v2 56 drivers/net/wireless/mediatek/mt76/mt76x02_phy.c val |= (v2 & (BIT(6) - 1)) << 8; v2 396 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c #define READ_NEXT_PAIR(v1, v2, i) \ v2 399 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = array_table[i+1]; \ v2 406 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v2; v2 411 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = array_table[i+1]; v2 413 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_bb_reg(hw, v1, v2); v2 421 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 422 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 423 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDEF && v2 424 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDCD && i < arraylen - 2) v2 425 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 430 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 431 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 432 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDEF && v2 433 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDCD && i < arraylen - 2) { v2 434 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_bb_reg(hw, v1, v2); v2 435 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 438 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && i < arraylen - 2) v2 439 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 450 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v2; v2 455 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = array_table[i+1]; v2 468 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 469 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 470 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDEF && v2 471 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDCD && i < arraylen - 2) v2 472 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 477 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 478 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 479 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDEF && v2 480 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDCD && i < arraylen - 2) { v2 485 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 488 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && i < arraylen - 2) v2 489 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 652 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v1 = 0, v2 = 0, v3 = 0; v2 660 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = phy_reg_page[i+1]; v2 691 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = phy_reg_page[i+1]; v2 693 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 697 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = phy_reg_page[i+1]; v2 710 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c #define READ_NEXT_RF_PAIR(v1, v2, i) \ v2 714 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = radioa_array_table[i+1]; \ v2 722 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v1, v2; v2 727 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 = radioa_array_table[i+1]; v2 729 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_rf_radio_a(hw, v1, v2); v2 737 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 738 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 739 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDEF && v2 740 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDCD && v2 742 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 748 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 749 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 750 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDEF && v2 751 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v2 != 0xCDCD && v2 753 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_rf_radio_a(hw, v1, v2); v2 754 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 757 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c while (v2 != 0xDEAD && v2 759 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 675 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c #define READ_NEXT_PAIR(v1, v2, i) \ v2 679 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 = array[i+1]; \ v2 689 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 v1 = 0, v2 = 0; v2 697 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 = array[i+1]; v2 699 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_config_bb_reg(hw, v1, v2); v2 707 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 708 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 709 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 710 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && i < len - 2) { v2 711 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 718 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 719 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 720 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 721 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && i < len - 2) { v2 723 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2); v2 724 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 727 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && i < len - 2) v2 728 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 738 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 = array[i+1]; v2 751 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 752 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 753 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 754 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && v2 756 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 763 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v2 764 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 765 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 766 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && v2 773 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1 , v2 , i); v2 776 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 778 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1 , v2 , i); v2 873 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; v2 881 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 = phy_regarray_table_pg[i+1]; v2 888 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_store_tx_power_by_rate(hw, v1, v2, v3, v2 900 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c #define READ_NEXT_RF_PAIR(v1, v2, i) \ v2 904 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 = array[i+1]; \ v2 914 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 v1 = 0, v2 = 0; v2 925 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 = array[i+1]; v2 927 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_config_rf_radio_a(hw, v1, v2); v2 936 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 937 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 938 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 939 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && i < len - 2) { v2 940 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 947 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 948 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 949 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 950 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && i < len - 2) { v2 953 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2); v2 954 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 957 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && i < len - 2) v2 958 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 972 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 = array[i+1]; v2 974 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_config_rf_radio_b(hw, v1, v2); v2 983 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 984 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 985 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 986 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && i < len - 2) { v2 987 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 994 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 995 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && v2 996 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDEF && v2 997 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2 != 0xCDCD && i < len - 2) { v2 1000 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v2); v2 1001 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 1004 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c while (v2 != 0xDEAD && i < len - 2) v2 1005 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v2 552 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c u32 v2 = array_table[i + 1]; v2 567 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c hw, v1, v2)) { v2 581 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c set_reg(hw, v1, v2); v2 714 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; v2 722 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c v2 = phy_regarray_table_pg[i+1]; v2 734 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c v1, v2, v3, v4, v5, v6); v2 18 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c #define READ_NEXT_PAIR(array_table, v1, v2, i) \ v2 22 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v2 = array_table[i+1]; \ v2 1864 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c u32 v2 = array_table[i + 1]; v2 1879 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c hw, v1, v2)) { v2 1893 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c set_reg(hw, v1, v2); v2 2009 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c u32 v1, v2, v3, v4, v5, v6; v2 2026 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v2 = array[i+1]; v2 2053 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c _rtl8821ae_store_tx_power_by_rate(hw, v1, v2, v3, v2 2061 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v2 = array[i+1]; v2 2063 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c while (v2 != 0xDEAD) { v2 2066 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v2 = array[i+1]; v2 149 drivers/net/wireless/realtek/rtw88/rtw8822c.c static void swap_u32(u32 *v1, u32 *v2) v2 154 drivers/net/wireless/realtek/rtw88/rtw8822c.c *v1 = *v2; v2 155 drivers/net/wireless/realtek/rtw88/rtw8822c.c *v2 = tmp; v2 158 drivers/net/wireless/realtek/rtw88/rtw8822c.c static void __rtw8822c_dac_iq_sort(struct rtw_dev *rtwdev, u32 *v1, u32 *v2) v2 160 drivers/net/wireless/realtek/rtw88/rtw8822c.c if (*v1 >= 0x200 && *v2 >= 0x200) { v2 161 drivers/net/wireless/realtek/rtw88/rtw8822c.c if (*v1 > *v2) v2 162 drivers/net/wireless/realtek/rtw88/rtw8822c.c swap_u32(v1, v2); v2 163 drivers/net/wireless/realtek/rtw88/rtw8822c.c } else if (*v1 < 0x200 && *v2 < 0x200) { v2 164 drivers/net/wireless/realtek/rtw88/rtw8822c.c if (*v1 > *v2) v2 165 drivers/net/wireless/realtek/rtw88/rtw8822c.c swap_u32(v1, v2); v2 166 drivers/net/wireless/realtek/rtw88/rtw8822c.c } else if (*v1 < 0x200 && *v2 >= 0x200) { v2 167 drivers/net/wireless/realtek/rtw88/rtw8822c.c swap_u32(v1, v2); v2 1366 drivers/pci/controller/pci-hyperv.c struct pci_create_interrupt2 v2; v2 1406 drivers/pci/controller/pci-hyperv.c size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2, v2 1225 drivers/pcmcia/cistpl.c static int parse_vers_2(tuple_t *tuple, cistpl_vers_2_t *v2) v2 1235 drivers/pcmcia/cistpl.c v2->vers = p[0]; v2 1236 drivers/pcmcia/cistpl.c v2->comply = p[1]; v2 1237 drivers/pcmcia/cistpl.c v2->dindex = get_unaligned_le16(p + 2); v2 1238 drivers/pcmcia/cistpl.c v2->vspec8 = p[6]; v2 1239 drivers/pcmcia/cistpl.c v2->vspec9 = p[7]; v2 1240 drivers/pcmcia/cistpl.c v2->nhdr = p[8]; v2 1242 drivers/pcmcia/cistpl.c return parse_strings(p, q, 2, v2->str, &v2->vendor, NULL); v2 373 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c int v, v2; v2 380 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &v2); v2 384 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (v == MTK_ENABLE || v2 == MTK_ENABLE) v2 3610 drivers/platform/x86/sony-laptop.c u8 v1, v2; v2 3616 drivers/platform/x86/sony-laptop.c v2 = inb_p(spic_dev.cur_ioport->io1.minimum); v2 3617 drivers/platform/x86/sony-laptop.c dprintk("sony_pic_call1(0x%.2x): 0x%.4x\n", dev, (v2 << 8) | v1); v2 3618 drivers/platform/x86/sony-laptop.c return v2; v2 252 drivers/staging/comedi/drivers/jr3_pci.c val = get_s16(&spriv->sensor->filter[filter].v2); v2 542 drivers/staging/comedi/drivers/jr3_pci.c r[7].l.range[0].min = -get_s16(&fs->v2) * 100; v2 543 drivers/staging/comedi/drivers/jr3_pci.c r[7].l.range[0].max = get_s16(&fs->v2) * 100; v2 65 drivers/staging/comedi/drivers/jr3_pci.h s32 v2; v2 153 drivers/staging/rtl8188eu/hal/bb_cfg.c u32 v2 = array[i + 1]; v2 156 drivers/staging/rtl8188eu/hal/bb_cfg.c phy_set_bb_reg(adapt, v1, bMaskDWord, v2); v2 388 drivers/staging/rtl8188eu/hal/bb_cfg.c u32 v2 = array[i + 1]; v2 391 drivers/staging/rtl8188eu/hal/bb_cfg.c rtl_bb_delay(adapt, v1, v2); v2 568 drivers/staging/rtl8188eu/hal/bb_cfg.c u32 v2 = array[i + 1]; v2 572 drivers/staging/rtl8188eu/hal/bb_cfg.c rtl_addr_delay(adapt, v1, v2, v3); v2 143 drivers/staging/rtl8188eu/hal/rf_cfg.c #define READ_NEXT_PAIR(v1, v2, i) \ v2 146 drivers/staging/rtl8188eu/hal/rf_cfg.c v2 = array[i+1]; \ v2 193 drivers/staging/rtl8188eu/hal/rf_cfg.c u32 v2 = array[i+1]; v2 196 drivers/staging/rtl8188eu/hal/rf_cfg.c rtl8188e_config_rf_reg(adapt, v1, v2); v2 200 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v2 201 drivers/staging/rtl8188eu/hal/rf_cfg.c while (v2 != 0xDEAD && v2 != 0xCDEF && v2 202 drivers/staging/rtl8188eu/hal/rf_cfg.c v2 != 0xCDCD && i < array_len - 2) v2 203 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v2 206 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v2 207 drivers/staging/rtl8188eu/hal/rf_cfg.c while (v2 != 0xDEAD && v2 != 0xCDEF && v2 208 drivers/staging/rtl8188eu/hal/rf_cfg.c v2 != 0xCDCD && i < array_len - 2) { v2 209 drivers/staging/rtl8188eu/hal/rf_cfg.c rtl8188e_config_rf_reg(adapt, v1, v2); v2 210 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v2 213 drivers/staging/rtl8188eu/hal/rf_cfg.c while (v2 != 0xDEAD && i < array_len - 2) v2 214 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v2 275 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u32 v2 = Array[i+1]; v2 279 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); v2 288 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 289 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v2 291 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 292 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 294 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 295 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c if (!CheckNegative(pDM_Odm, v1, v2)) v2 299 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 307 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 313 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); v2 314 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 320 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 544 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u32 v2 = Array[i+1]; v2 548 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); v2 557 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 558 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v2 560 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 561 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 563 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 564 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c if (!CheckNegative(pDM_Odm, v1, v2)) v2 568 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 576 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 581 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); v2 582 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 588 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v2 626 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u32 v2 = Array[i+1]; v2 632 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_PHY_REG_PG_8723B(pDM_Odm, v1, v2, v3, v4, v5, v6); v2 246 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c u32 v2 = Array[i+1]; v2 250 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); v2 259 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 260 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v2 262 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 263 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 265 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 266 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c if (!CheckNegative(pDM_Odm, v1, v2)) v2 270 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 276 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 281 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); v2 282 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 288 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v2 277 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c u32 v2 = Array[i+1]; v2 281 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); v2 290 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 291 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v2 293 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 294 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 296 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 297 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c if (!CheckNegative(pDM_Odm, v1, v2)) v2 301 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 309 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 315 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); v2 316 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 322 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v2 1704 drivers/staging/rtl8723bs/hal/hal_com.c u32 v1 = 0, v2 = 0, target = 0; v2 1717 drivers/staging/rtl8723bs/hal/hal_com.c v2 = Array[i+1]; v2 1719 drivers/staging/rtl8723bs/hal/hal_com.c DBG_871X("Offset RF Gain. got v1 = 0x%x , v2 = 0x%x\n", v1, v2); v2 1720 drivers/staging/rtl8723bs/hal/hal_com.c target = v2; v2 90 drivers/staging/rtl8723bs/hal/odm_types.h #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) v2 64 drivers/vfio/vfio_iommu_spapr_tce.c bool v2; v2 331 drivers/vfio/vfio_iommu_spapr_tce.c container->v2 = arg == VFIO_SPAPR_TCE_v2_IOMMU; v2 471 drivers/vfio/vfio_iommu_spapr_tce.c if (container->v2) { v2 837 drivers/vfio/vfio_iommu_spapr_tce.c container->v2) { v2 905 drivers/vfio/vfio_iommu_spapr_tce.c if (container->v2) v2 969 drivers/vfio/vfio_iommu_spapr_tce.c if (!container->v2) v2 999 drivers/vfio/vfio_iommu_spapr_tce.c if (!container->v2) v2 1026 drivers/vfio/vfio_iommu_spapr_tce.c if (container->v2) v2 1036 drivers/vfio/vfio_iommu_spapr_tce.c if (container->v2) v2 1060 drivers/vfio/vfio_iommu_spapr_tce.c if (!container->v2) v2 1101 drivers/vfio/vfio_iommu_spapr_tce.c if (!container->v2) v2 1294 drivers/vfio/vfio_iommu_spapr_tce.c if (container->v2) { v2 1300 drivers/vfio/vfio_iommu_spapr_tce.c if (!container->v2) { v2 71 drivers/vfio/vfio_iommu_type1.c bool v2; v2 556 drivers/vfio/vfio_iommu_type1.c if (!iommu->v2) v2 639 drivers/vfio/vfio_iommu_type1.c if (!iommu->v2) v2 924 drivers/vfio/vfio_iommu_type1.c if (iommu->v2) { v2 938 drivers/vfio/vfio_iommu_type1.c if (!iommu->v2 && unmap->iova > dma->iova) v2 2072 drivers/vfio/vfio_iommu_type1.c iommu->v2 = true; v2 1274 drivers/vhost/vhost.c bool v2 = vhost_backend_has_feature(vq, VHOST_BACKEND_F_IOTLB_MSG_V2); v2 1276 drivers/vhost/vhost.c node = vhost_new_msg(vq, v2 ? VHOST_IOTLB_MSG_V2 : VHOST_IOTLB_MSG); v2 1280 drivers/vhost/vhost.c if (v2) { v2 148 drivers/video/console/vgacon.c unsigned int v1, v2; v2 157 drivers/video/console/vgacon.c v2 = reg + 1 + ((val << 8) & 0xff00); v2 159 drivers/video/console/vgacon.c outw(v2, vga_video_port_reg); v2 304 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_CKEY_V2(v2) ((v2)<<24) v2 131 drivers/video/fbdev/pxa168fb.h #define CFG_CKEY_V2(v2) ((v2) << 24) v2 4351 drivers/video/fbdev/sis/sis_main.c u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; v2 4371 drivers/video/fbdev/sis/sis_main.c v1 = 0x44; v2 = 0x42; v2 4374 drivers/video/fbdev/sis/sis_main.c v1 = 0x68; v2 = 0x43; /* Assume 125Mhz MCLK */ v2 4380 drivers/video/fbdev/sis/sis_main.c v2 = bios[rindex++]; v2 4389 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x29, v2); v2 4402 drivers/video/fbdev/sis/sis_main.c v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a; v2 4407 drivers/video/fbdev/sis/sis_main.c v2 = bios[memtype + 8]; v2 4418 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x16, v2); v2 4437 drivers/video/fbdev/sis/sis_main.c v1 = 0xf6; v2 = 0x0d; v3 = 0x00; v2 4440 drivers/video/fbdev/sis/sis_main.c v2 = bios[0xe9]; v2 4444 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x24, v2); v2 4451 drivers/video/fbdev/sis/sis_main.c v1 = 0x40; v2 = 0x11; v2 4454 drivers/video/fbdev/sis/sis_main.c v2 = bios[0xeb]; v2 4459 drivers/video/fbdev/sis/sis_main.c v2 &= ~0x01; v2 4483 drivers/video/fbdev/sis/sis_main.c v2 &= ~0x10; v2 4485 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x32, v2); v2 4518 drivers/video/fbdev/sis/sis_main.c v2 = bios[0xe7]; v2 4523 drivers/video/fbdev/sis/sis_main.c v2 = 0x92; v2 4526 drivers/video/fbdev/sis/sis_main.c v2 = 0xb2; v2 4530 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x22, v2); v2 4885 drivers/video/fbdev/sis/sis_main.c u8 v1, v2, v3; v2 4911 drivers/video/fbdev/sis/sis_main.c v1 = cs90[index]; v2 = cs90[index + 1]; v3 = cs90[index + 2]; v2 4914 drivers/video/fbdev/sis/sis_main.c v2 = ivideo->bios_abase[0x90 + index + 1]; v2 4918 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x29, v2); v2 4924 drivers/video/fbdev/sis/sis_main.c v1 = csb8[index]; v2 = csb8[index + 1]; v3 = csb8[index + 2]; v2 4927 drivers/video/fbdev/sis/sis_main.c v2 = ivideo->bios_abase[0xb8 + index + 1]; v2 4931 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x2f, v2); v2 5034 drivers/video/fbdev/sis/sis_main.c u8 v2; v2 5043 drivers/video/fbdev/sis/sis_main.c v1 = cs168[regb]; v2 = cs160[regb]; v3 = cs158[regb]; v2 5046 drivers/video/fbdev/sis/sis_main.c v2 = bios[regb + 0x160]; v2 5055 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x85, v2); v2 5110 drivers/video/fbdev/sis/sis_main.c u8 v1, v2, v3, v4, v5, reg, ramtype; v2 5211 drivers/video/fbdev/sis/sis_main.c v1 = 0x18; v2 = 0x00; v2 5214 drivers/video/fbdev/sis/sis_main.c v2 = bios[0x75]; v2 5218 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x1f, v2); v2 5290 drivers/video/fbdev/sis/sis_main.c v2 = (reg & 0x30) >> 3; v2 5291 drivers/video/fbdev/sis/sis_main.c if(!(v2 & 0x04)) v2 ^= 0x02; v2 5293 drivers/video/fbdev/sis/sis_main.c if(reg & 0x80) v2 |= 0x80; v2 5294 drivers/video/fbdev/sis/sis_main.c v2 |= 0x01; v2 5298 drivers/video/fbdev/sis/sis_main.c if(((v2 & 0x06) == 2) || ((v2 & 0x06) == 4)) v2 5299 drivers/video/fbdev/sis/sis_main.c v2 &= 0xf9; v2 5300 drivers/video/fbdev/sis/sis_main.c v2 |= 0x08; v2 5320 drivers/video/fbdev/sis/sis_main.c if((v2 & 0x06) == 4) v2 5321 drivers/video/fbdev/sis/sis_main.c v2 ^= 0x06; v2 5322 drivers/video/fbdev/sis/sis_main.c v2 |= 0x08; v2 5325 drivers/video/fbdev/sis/sis_main.c SiS_SetRegANDOR(SISCR, 0x5f, 0xf0, v2); v2 5331 drivers/video/fbdev/sis/sis_main.c v2 = SiS_GetReg(SISSR, 0x3a); v2 5333 drivers/video/fbdev/sis/sis_main.c if( (!(v1 & 0x02)) && (v2 & 0x30) && (regd < 0xcf) ) v2 5348 drivers/video/fbdev/sis/sis_main.c v2 = SiS_GetReg(SISCR, 0x5f); v2 5349 drivers/video/fbdev/sis/sis_main.c if((!(reg & 0x02)) && (v2 & 0x0e)) v2 5503 drivers/video/fbdev/sis/sis_main.c v1 = 0xb5; v2 = 0x20; v3 = 0xf0; v4 = 0x13; v2 5506 drivers/video/fbdev/sis/sis_main.c v2 = bios[0xf8 + regb]; v2 5513 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x41, v2); v2 5570 drivers/video/fbdev/sis/sis_main.c v1 = cs158[regb]; v2 = cs160[regb]; v3 = cs168[regb]; v2 5573 drivers/video/fbdev/sis/sis_main.c v2 = bios[regb + 0x160]; v2 5577 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x85, v2); v2 5626 drivers/video/fbdev/sis/sis_main.c v1 = 0x31; v2 = 0x03; v3 = 0x83; v4 = 0x03; v5 = 0x83; v2 5630 drivers/video/fbdev/sis/sis_main.c v2 = bios[index]; v2 5637 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x16, v2); v2 5669 drivers/video/fbdev/sis/sis_main.c v1 = cs160[regb]; v2 = cs158[regb]; v2 5672 drivers/video/fbdev/sis/sis_main.c v2 = bios[regb + 0x158]; v2 5675 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x82, v2); v2 5745 drivers/video/fbdev/sis/sis_main.c v1 = 0x00; v2 = 0x00; v2 5748 drivers/video/fbdev/sis/sis_main.c v2 = bios[0x63]; v2 5752 drivers/video/fbdev/sis/sis_main.c if((v1 & 0x40) && (v2 & regd) && ivideo->haveXGIROM) { v2 309 drivers/video/fbdev/tridentfb.c int v2 = v1 | (tmp << 29); v2 311 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21C0, v2); v2 312 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21C4, v2); v2 313 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21B8, v2); v2 314 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21BC, v2); v2 85 drivers/xen/grant-table.c union grant_entry_v2 *v2; v2 256 drivers/xen/grant-table.c gnttab_shared.v2[ref].hdr.domid = domid; v2 257 drivers/xen/grant-table.c gnttab_shared.v2[ref].full_page.frame = frame; v2 259 drivers/xen/grant-table.c gnttab_shared.v2[ref].hdr.flags = GTF_permit_access | flags; v2 322 drivers/xen/grant-table.c gnttab_shared.v2[ref].hdr.flags = 0; v2 509 drivers/xen/grant-table.c pflags = &gnttab_shared.v2[ref].hdr.flags; v2 528 drivers/xen/grant-table.c frame = gnttab_shared.v2[ref].full_page.frame; v2 93 fs/adfs/super.c unsigned int v0, v1, v2, v3; v2 96 fs/adfs/super.c v0 = v1 = v2 = v3 = 0; v2 102 fs/adfs/super.c v2 += map[i + 2] + (v1 >> 8); v2 104 fs/adfs/super.c v3 += map[i + 3] + (v2 >> 8); v2 105 fs/adfs/super.c v2 &= 0xff; v2 109 fs/adfs/super.c v2 += map[2] + (v1 >> 8); v2 110 fs/adfs/super.c v3 += map[3] + (v2 >> 8); v2 112 fs/adfs/super.c return v0 ^ v1 ^ v2 ^ v3; v2 3952 fs/btrfs/volumes.c #define CHECK_APPEND_2ARG(a, v1, v2) \ v2 3954 fs/btrfs/volumes.c ret = snprintf(bp, size_bp, (a), (v1), (v2)); \ v2 3335 fs/ceph/mds_client.c struct ceph_mds_cap_reconnect v2; v2 3355 fs/ceph/mds_client.c rec.v2.cap_id = cpu_to_le64(cap->cap_id); v2 3356 fs/ceph/mds_client.c rec.v2.wanted = cpu_to_le32(__ceph_caps_wanted(ci)); v2 3357 fs/ceph/mds_client.c rec.v2.issued = cpu_to_le32(cap->issued); v2 3358 fs/ceph/mds_client.c rec.v2.snaprealm = cpu_to_le64(ci->i_snap_realm->ino); v2 3359 fs/ceph/mds_client.c rec.v2.pathbase = 0; v2 3360 fs/ceph/mds_client.c rec.v2.flock_len = (__force __le32) v2 3390 fs/ceph/mds_client.c if (rec.v2.flock_len) { v2 3430 fs/ceph/mds_client.c rec.v2.flock_len = cpu_to_le32(struct_len); v2 3432 fs/ceph/mds_client.c struct_len += sizeof(u32) + sizeof(rec.v2); v2 3457 fs/ceph/mds_client.c ceph_pagelist_append(pagelist, &rec, sizeof(rec.v2)); v2 58 fs/crypto/fscrypt_private.h struct fscrypt_context_v2 v2; v2 72 fs/crypto/fscrypt_private.h BUILD_BUG_ON(sizeof(ctx->v2) != 40); v2 73 fs/crypto/fscrypt_private.h return sizeof(ctx->v2); v2 82 fs/crypto/fscrypt_private.h struct fscrypt_policy_v2 v2; v2 95 fs/crypto/fscrypt_private.h return sizeof(policy->v2); v2 108 fs/crypto/fscrypt_private.h return policy->v2.contents_encryption_mode; v2 121 fs/crypto/fscrypt_private.h return policy->v2.filenames_encryption_mode; v2 134 fs/crypto/fscrypt_private.h return policy->v2.flags; v2 254 fs/crypto/keysetup.c if (ci->ci_policy.v2.flags & FSCRYPT_POLICY_FLAG_DIRECT_KEY) { v2 312 fs/crypto/keysetup.c ci->ci_policy.v2.master_key_identifier, v2 474 fs/crypto/keysetup.c memcpy(crypt_info->ci_nonce, ctx.v2.nonce, v2 68 fs/crypto/policy.c const struct fscrypt_policy_v2 *policy = &policy_u->v2; v2 130 fs/crypto/policy.c const struct fscrypt_policy_v2 *policy = &policy_u->v2; v2 131 fs/crypto/policy.c struct fscrypt_context_v2 *ctx = &ctx_u->v2; v2 186 fs/crypto/policy.c const struct fscrypt_context_v2 *ctx = &ctx_u->v2; v2 187 fs/crypto/policy.c struct fscrypt_policy_v2 *policy = &policy_u->v2; v2 259 fs/crypto/policy.c policy->v2.master_key_identifier); v2 204 fs/nfs/direct.c const struct nfs_writeverf *v2) v2 206 fs/nfs/direct.c return nfs_write_verifier_cmp(&v1->verifier, &v2->verifier); v2 540 fs/nfs/internal.h const struct nfs_write_verifier *v2) v2 542 fs/nfs/internal.h return memcmp(v1->data, v2->data, sizeof(v1->data)); v2 487 fs/nfs/nfs4client.c static bool nfs4_same_verifier(nfs4_verifier *v1, nfs4_verifier *v2) v2 489 fs/nfs/nfs4client.c return memcmp(v1->data, v2->data, sizeof(v1->data)) == 0; v2 2127 fs/nfsd/nfs4state.c same_verf(nfs4_verifier *v1, nfs4_verifier *v2) v2 2129 fs/nfsd/nfs4state.c return 0 == memcmp(v1->data, v2->data, sizeof(v1->data)); v2 1262 fs/reiserfs/reiserfs.h static inline __u16 offset_v2_k_type(const struct offset_v2 *v2) v2 1264 fs/reiserfs/reiserfs.h __u8 type = le64_to_cpu(v2->v) >> 60; v2 1268 fs/reiserfs/reiserfs.h static inline void set_offset_v2_k_type(struct offset_v2 *v2, int type) v2 1270 fs/reiserfs/reiserfs.h v2->v = v2 1271 fs/reiserfs/reiserfs.h (v2->v & cpu_to_le64(~0ULL >> 4)) | cpu_to_le64((__u64) type << 60); v2 1274 fs/reiserfs/reiserfs.h static inline loff_t offset_v2_k_offset(const struct offset_v2 *v2) v2 1276 fs/reiserfs/reiserfs.h return le64_to_cpu(v2->v) & (~0ULL >> 4); v2 1279 fs/reiserfs/reiserfs.h static inline void set_offset_v2_k_offset(struct offset_v2 *v2, loff_t offset) v2 1282 fs/reiserfs/reiserfs.h v2->v = (v2->v & cpu_to_le64(15ULL << 60)) | cpu_to_le64(offset); v2 115 include/linux/fixp-arith.h s32 v1, v2, dx, dy; v2 129 include/linux/fixp-arith.h v2 = fixp_sin32(degrees + 1); v2 132 include/linux/fixp-arith.h dy = v2 - v1; v2 150 include/linux/xxhash.h uint32_t v2; v2 163 include/linux/xxhash.h uint64_t v2; v2 29 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID2(v2, vh2) { \ v2 31 include/pcmcia/device_id.h .prod_id = { NULL, (v2), NULL, NULL }, \ v2 39 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ v2 42 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v2 57 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ v2 61 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v2 64 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID124(v1, v2, v4, vh1, vh2, vh4) { \ v2 68 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, (v4) }, \ v2 78 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \ v2 83 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), (v4) }, \ v2 122 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_PROD_ID2(mfc, v2, vh2) { \ v2 125 include/pcmcia/device_id.h .prod_id = { NULL, (v2), NULL, NULL }, \ v2 129 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_PROD_ID12(mfc, v1, v2, vh1, vh2) { \ v2 133 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v2 145 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_PROD_ID123(mfc, v1, v2, v3, vh1, vh2, vh3) { \ v2 150 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v2 171 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_PROD_ID2(mfc, v2, vh2) { \ v2 174 include/pcmcia/device_id.h .prod_id = { NULL, (v2), NULL, NULL }, \ v2 178 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_PROD_ID12(mfc, v1, v2, vh1, vh2) { \ v2 182 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v2 194 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_PROD_ID123(mfc, v1, v2, v3, vh1, vh2, vh3) { \ v2 199 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v2 213 include/pcmcia/device_id.h #define PCMCIA_DEVICE_CIS_PROD_ID12(v1, v2, vh1, vh2, _cisfile) { \ v2 217 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v2 221 include/pcmcia/device_id.h #define PCMCIA_DEVICE_CIS_PROD_ID123(v1, v2, v3, vh1, vh2, vh3, _cisfile) { \ v2 226 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v2 231 include/pcmcia/device_id.h #define PCMCIA_DEVICE_CIS_PROD_ID2(v2, vh2, _cisfile) { \ v2 234 include/pcmcia/device_id.h .prod_id = { NULL, (v2), NULL, NULL }, \ v2 238 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_CIS_PROD_ID12(mfc, v1, v2, vh1, vh2, _cisfile) { \ v2 243 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v2 258 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_CIS_PROD_ID12(mfc, v1, v2, vh1, vh2, _cisfile) { \ v2 263 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v2 80 include/uapi/linux/fscrypt.h struct fscrypt_policy_v2 v2; v2 50 kernel/kcmp.c static int kcmp_ptr(void *v1, void *v2, enum kcmp_type type) v2 55 kernel/kcmp.c t2 = kptr_obfuscate((long)v2, type); v2 151 lib/atomic64_test.c long long v2 = 0xfaceabadf00df001LL; v2 204 lib/atomic64_test.c CMPXCHG_FAMILY_TEST(64, v0, v1, v2); v2 24 lib/siphash.c v2 += v3; v3 = rol64(v3, 16); v3 ^= v2; \ v2 26 lib/siphash.c v2 += v1; v1 = rol64(v1, 17); v1 ^= v2; v2 = rol64(v2, 32); \ v2 32 lib/siphash.c u64 v2 = 0x6c7967656e657261ULL; \ v2 36 lib/siphash.c v2 ^= key->key[0]; \ v2 45 lib/siphash.c v2 ^= 0xff; \ v2 50 lib/siphash.c return (v0 ^ v1) ^ (v2 ^ v3); v2 247 lib/siphash.c v2 ^= 0xff; \ v2 251 lib/siphash.c return (v0 ^ v1) ^ (v2 ^ v3); v2 395 lib/siphash.c v2 += v3; v3 = rol32(v3, 8); v3 ^= v2; \ v2 397 lib/siphash.c v2 += v1; v1 = rol32(v1, 13); v1 ^= v2; v2 = rol32(v2, 16); \ v2 403 lib/siphash.c u32 v2 = 0x6c796765U; \ v2 407 lib/siphash.c v2 ^= key->key[0]; \ v2 415 lib/siphash.c v2 ^= 0xff; \ v2 111 lib/xxhash.c uint32_t v2 = seed + PRIME32_2; v2 118 lib/xxhash.c v2 = xxh32_round(v2, get_unaligned_le32(p)); v2 126 lib/xxhash.c h32 = xxh_rotl32(v1, 1) + xxh_rotl32(v2, 7) + v2 181 lib/xxhash.c uint64_t v2 = seed + PRIME64_2; v2 188 lib/xxhash.c v2 = xxh64_round(v2, get_unaligned_le64(p)); v2 196 lib/xxhash.c h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + v2 199 lib/xxhash.c h64 = xxh64_merge_round(h64, v2); v2 249 lib/xxhash.c state.v2 = seed + PRIME32_2; v2 263 lib/xxhash.c state.v2 = seed + PRIME64_2; v2 295 lib/xxhash.c state->v2 = xxh32_round(state->v2, get_unaligned_le32(p32)); v2 309 lib/xxhash.c uint32_t v2 = state->v2; v2 316 lib/xxhash.c v2 = xxh32_round(v2, get_unaligned_le32(p)); v2 325 lib/xxhash.c state->v2 = v2; v2 347 lib/xxhash.c h32 = xxh_rotl32(state->v1, 1) + xxh_rotl32(state->v2, 7) + v2 401 lib/xxhash.c state->v2 = xxh64_round(state->v2, get_unaligned_le64(p64)); v2 414 lib/xxhash.c uint64_t v2 = state->v2; v2 421 lib/xxhash.c v2 = xxh64_round(v2, get_unaligned_le64(p)); v2 430 lib/xxhash.c state->v2 = v2; v2 453 lib/xxhash.c const uint64_t v2 = state->v2; v2 457 lib/xxhash.c h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + v2 460 lib/xxhash.c h64 = xxh64_merge_round(h64, v2); v2 255 net/qrtr/qrtr.c const struct qrtr_hdr_v2 *v2; v2 289 net/qrtr/qrtr.c v2 = data; v2 290 net/qrtr/qrtr.c hdrlen = sizeof(*v2) + v2->optlen; v2 292 net/qrtr/qrtr.c cb->type = v2->type; v2 293 net/qrtr/qrtr.c cb->confirm_rx = !!(v2->flags & QRTR_FLAGS_CONFIRM_RX); v2 294 net/qrtr/qrtr.c cb->src_node = le16_to_cpu(v2->src_node_id); v2 295 net/qrtr/qrtr.c cb->src_port = le16_to_cpu(v2->src_port_id); v2 296 net/qrtr/qrtr.c cb->dst_node = le16_to_cpu(v2->dst_node_id); v2 297 net/qrtr/qrtr.c cb->dst_port = le16_to_cpu(v2->dst_port_id); v2 304 net/qrtr/qrtr.c size = le32_to_cpu(v2->size); v2 80 tools/include/uapi/linux/fscrypt.h struct fscrypt_policy_v2 v2; v2 5842 tools/lib/bpf/libbpf.c __u32 v1, v2; v2 5849 tools/lib/bpf/libbpf.c v2 = bpf_prog_info_read_offset_u32(&info_linear->info, v2 5851 tools/lib/bpf/libbpf.c if (v1 != v2) v2 5855 tools/lib/bpf/libbpf.c v2 = bpf_prog_info_read_offset_u32(&info_linear->info, v2 5857 tools/lib/bpf/libbpf.c if (v1 != v2) v2 37 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c u32 v1=0,v2=0,v3=0; v2 45 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c v2 = inl(pm_tmr_ioport); v2 47 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c } while ((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) v2 48 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c || (v3 > v1 && v3 < v2)); v2 51 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c return (v2 & 0xFFFFFF); v2 163 tools/testing/selftests/bpf/progs/test_xdp_noinline.c __u64 v2; v2 584 tools/testing/selftests/bpf/progs/test_xdp_noinline.c if ((cur_time - conn_rate_stats->v2) >> 32 > 0xffFFFF) { v2 586 tools/testing/selftests/bpf/progs/test_xdp_noinline.c conn_rate_stats->v2 = cur_time; v2 768 tools/testing/selftests/bpf/progs/test_xdp_noinline.c lru_stats->v2 += 1; v2 772 tools/testing/selftests/bpf/progs/test_xdp_noinline.c data_stats->v2 += 1; v2 790 tools/testing/selftests/bpf/progs/test_xdp_noinline.c data_stats->v2 += pkt_bytes; v2 93 tools/testing/selftests/net/psock_tpacket.c } *v2; v2 251 tools/testing/selftests/net/psock_tpacket.c test_payload((uint8_t *) ppd.raw + ppd.v2->tp_h.tp_mac, v2 252 tools/testing/selftests/net/psock_tpacket.c ppd.v2->tp_h.tp_snaplen); v2 253 tools/testing/selftests/net/psock_tpacket.c total_bytes += ppd.v2->tp_h.tp_snaplen; v2 437 tools/testing/selftests/net/psock_tpacket.c ppd.v2->tp_h.tp_snaplen = packet_len; v2 438 tools/testing/selftests/net/psock_tpacket.c ppd.v2->tp_h.tp_len = packet_len; v2 443 tools/testing/selftests/net/psock_tpacket.c total_bytes += ppd.v2->tp_h.tp_snaplen; v2 345 tools/testing/selftests/rseq/rseq-arm.h intptr_t *v2, intptr_t newv2, v2 387 tools/testing/selftests/rseq/rseq-arm.h [v2] "m" (*v2), v2 420 tools/testing/selftests/rseq/rseq-arm.h intptr_t *v2, intptr_t newv2, v2 463 tools/testing/selftests/rseq/rseq-arm.h [v2] "m" (*v2), v2 496 tools/testing/selftests/rseq/rseq-arm.h intptr_t *v2, intptr_t expect2, v2 543 tools/testing/selftests/rseq/rseq-arm.h [v2] "m" (*v2), v2 363 tools/testing/selftests/rseq/rseq-arm64.h intptr_t *v2, intptr_t newv2, v2 384 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_STORE(newv2, v2) v2 396 tools/testing/selftests/rseq/rseq-arm64.h [v2] "Qo" (*v2), v2 422 tools/testing/selftests/rseq/rseq-arm64.h intptr_t *v2, intptr_t newv2, v2 443 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_STORE(newv2, v2) v2 455 tools/testing/selftests/rseq/rseq-arm64.h [v2] "Qo" (*v2), v2 481 tools/testing/selftests/rseq/rseq-arm64.h intptr_t *v2, intptr_t expect2, v2 499 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v2, expect2, %l[cmpfail]) v2 504 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v2, expect2, %l[error3]) v2 515 tools/testing/selftests/rseq/rseq-arm64.h [v2] "Qo" (*v2), v2 348 tools/testing/selftests/rseq/rseq-mips.h intptr_t *v2, intptr_t newv2, v2 388 tools/testing/selftests/rseq/rseq-mips.h [v2] "m" (*v2), v2 421 tools/testing/selftests/rseq/rseq-mips.h intptr_t *v2, intptr_t newv2, v2 462 tools/testing/selftests/rseq/rseq-mips.h [v2] "m" (*v2), v2 495 tools/testing/selftests/rseq/rseq-mips.h intptr_t *v2, intptr_t expect2, v2 538 tools/testing/selftests/rseq/rseq-mips.h [v2] "m" (*v2), v2 387 tools/testing/selftests/rseq/rseq-ppc.h intptr_t *v2, intptr_t newv2, v2 414 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_STORE(newv2, v2) v2 425 tools/testing/selftests/rseq/rseq-ppc.h [v2] "m" (*v2), v2 455 tools/testing/selftests/rseq/rseq-ppc.h intptr_t *v2, intptr_t newv2, v2 482 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_STORE(newv2, v2) v2 495 tools/testing/selftests/rseq/rseq-ppc.h [v2] "m" (*v2), v2 525 tools/testing/selftests/rseq/rseq-ppc.h intptr_t *v2, intptr_t expect2, v2 547 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v2, expect2, %l[cmpfail]) v2 555 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v2, expect2, %l[error3]) v2 566 tools/testing/selftests/rseq/rseq-ppc.h [v2] "m" (*v2), v2 316 tools/testing/selftests/rseq/rseq-s390.h intptr_t *v2, intptr_t newv2, v2 353 tools/testing/selftests/rseq/rseq-s390.h [v2] "m" (*v2), v2 384 tools/testing/selftests/rseq/rseq-s390.h intptr_t *v2, intptr_t newv2, v2 387 tools/testing/selftests/rseq/rseq-s390.h return rseq_cmpeqv_trystorev_storev(v, expect, v2, newv2, newv, cpu); v2 392 tools/testing/selftests/rseq/rseq-s390.h intptr_t *v2, intptr_t expect2, v2 432 tools/testing/selftests/rseq/rseq-s390.h [v2] "m" (*v2), v2 29 tools/testing/selftests/rseq/rseq-skip.h intptr_t *v2, intptr_t newv2, v2 37 tools/testing/selftests/rseq/rseq-skip.h intptr_t *v2, intptr_t newv2, v2 45 tools/testing/selftests/rseq/rseq-skip.h intptr_t *v2, intptr_t expect2, v2 284 tools/testing/selftests/rseq/rseq-x86.h intptr_t *v2, intptr_t newv2, v2 320 tools/testing/selftests/rseq/rseq-x86.h [v2] "m" (*v2), v2 350 tools/testing/selftests/rseq/rseq-x86.h intptr_t *v2, intptr_t newv2, v2 353 tools/testing/selftests/rseq/rseq-x86.h return rseq_cmpeqv_trystorev_storev(v, expect, v2, newv2, newv, cpu); v2 358 tools/testing/selftests/rseq/rseq-x86.h intptr_t *v2, intptr_t expect2, v2 397 tools/testing/selftests/rseq/rseq-x86.h [v2] "m" (*v2), v2 805 tools/testing/selftests/rseq/rseq-x86.h intptr_t *v2, intptr_t newv2, v2 842 tools/testing/selftests/rseq/rseq-x86.h [v2] "m" (*v2), v2 871 tools/testing/selftests/rseq/rseq-x86.h intptr_t *v2, intptr_t newv2, v2 910 tools/testing/selftests/rseq/rseq-x86.h [v2] "m" (*v2), v2 940 tools/testing/selftests/rseq/rseq-x86.h intptr_t *v2, intptr_t expect2, v2 980 tools/testing/selftests/rseq/rseq-x86.h [v2] "m" (*v2),