v1 3153 arch/arm/mach-omap2/omap_hwmod.c const char *name, s8 v1, u8 v2) v1 3155 arch/arm/mach-omap2/omap_hwmod.c if (v1 < 0) v1 3158 arch/arm/mach-omap2/omap_hwmod.c if (v1 != v2) v1 3159 arch/arm/mach-omap2/omap_hwmod.c dev_warn(dev, "%s %d != %d\n", name, v1, v2); v1 118 arch/arm/mach-pxa/viper.c u8 v1, v2; v1 124 arch/arm/mach-pxa/viper.c v1 = VIPER_VERSION; v1 128 arch/arm/mach-pxa/viper.c v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; v1 131 arch/arm/mach-pxa/viper.c return v1; v1 19 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v1 25 arch/arm64/lib/xor-neon.c v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); v1 31 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 2, v1); v1 47 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v1 53 arch/arm64/lib/xor-neon.c v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); v1 59 arch/arm64/lib/xor-neon.c v1 = veorq_u64(v1, vld1q_u64(dp3 + 2)); v1 65 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 2, v1); v1 83 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v1 89 arch/arm64/lib/xor-neon.c v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); v1 95 arch/arm64/lib/xor-neon.c v1 = veorq_u64(v1, vld1q_u64(dp3 + 2)); v1 101 arch/arm64/lib/xor-neon.c v1 = veorq_u64(v1, vld1q_u64(dp4 + 2)); v1 107 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 2, v1); v1 128 arch/arm64/lib/xor-neon.c register uint64x2_t v0, v1, v2, v3; v1 134 arch/arm64/lib/xor-neon.c v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); v1 140 arch/arm64/lib/xor-neon.c v1 = veorq_u64(v1, vld1q_u64(dp3 + 2)); v1 146 arch/arm64/lib/xor-neon.c v1 = veorq_u64(v1, vld1q_u64(dp4 + 2)); v1 152 arch/arm64/lib/xor-neon.c v1 = veorq_u64(v1, vld1q_u64(dp5 + 2)); v1 158 arch/arm64/lib/xor-neon.c vst1q_u64(dp1 + 2, v1); v1 782 arch/ia64/include/asm/pal.h u64 v1; v1 891 arch/ia64/include/asm/pal.h features_status->pal_bus_features_val = iprv.v1; v1 917 arch/ia64/include/asm/pal.h conf->pcci_info_2.pcci2_data = iprv.v1; v1 936 arch/ia64/include/asm/pal.h prot->pcp_info[2].pcpi_data = iprv.v1 & 0xffffffff; v1 937 arch/ia64/include/asm/pal.h prot->pcp_info[3].pcpi_data = iprv.v1 >> 32; v1 955 arch/ia64/include/asm/pal.h *progress = iprv.v1; v1 1001 arch/ia64/include/asm/pal.h *unique_caches = iprv.v1; v1 1026 arch/ia64/include/asm/pal.h *buffer_align = iprv.v1; v1 1050 arch/ia64/include/asm/pal.h *data_regs = iprv.v1; v1 1100 arch/ia64/include/asm/pal.h *(u64 *)bus_ratio = iprv.v1; v1 1118 arch/ia64/include/asm/pal.h *num_impacted = iprv.v1; v1 1241 arch/ia64/include/asm/pal.h *error_info = iprv.v1; v1 1258 arch/ia64/include/asm/pal.h *resources= iprv.v1; v1 1272 arch/ia64/include/asm/pal.h *resources= iprv.v1; v1 1360 arch/ia64/include/asm/pal.h *alignment = iprv.v1; v1 1420 arch/ia64/include/asm/pal.h *features_status = iprv.v1; v1 1459 arch/ia64/include/asm/pal.h ptce->count[0] = iprv.v1 >> 32; v1 1460 arch/ia64/include/asm/pal.h ptce->count[1] = iprv.v1 & 0xffffffff; v1 1476 arch/ia64/include/asm/pal.h *reg_info_2 = iprv.v1; v1 1500 arch/ia64/include/asm/pal.h hints->ph_data = iprv.v1; v1 1567 arch/ia64/include/asm/pal.h pal_cur_version->pal_version_val = iprv.v1; v1 1604 arch/ia64/include/asm/pal.h *tc_pages = iprv.v1; v1 1618 arch/ia64/include/asm/pal.h *vw_pages = iprv.v1; v1 1660 arch/ia64/include/asm/pal.h vm_info_2->pvi2_val = iprv.v1; v1 1683 arch/ia64/include/asm/pal.h *vmm_id = iprv.v1; v1 1791 arch/ia64/include/asm/pal.h mapping->ppli1.ppli1_data = iprv.v1; v1 1818 arch/ia64/include/asm/pal.h info->ppli1.ppli1_data = iprv.v1; v1 112 arch/ia64/include/asm/sal.h unsigned long v1; v1 818 arch/ia64/include/asm/sal.h *scratch_buf_size_needed = isrv.v1; v1 56 arch/ia64/include/asm/sn/sn_sal.h *addr = rv.v1; v1 47 arch/ia64/kernel/patch.c u64 m0, m1, v0, v1, b0, b1, *b = (u64 *) (insn_addr & -16); v1 55 arch/ia64/kernel/patch.c v1 = val << (shift - 64); v1 58 arch/ia64/kernel/patch.c v0 = val << shift; v1 = val >> (64 - shift); v1 61 arch/ia64/kernel/patch.c b[1] = (b1 & ~m1) | (v1 & m1); v1 396 arch/ia64/kernel/sal.c *drift_info = isrv.v1; v1 992 arch/ia64/kernel/setup.c (iprv.v1 | 0x80), FEATURE_SET, 0); v1 120 arch/mips/boot/elf2ecoff.c static int phcmp(const void *v1, const void *v2) v1 122 arch/mips/boot/elf2ecoff.c const Elf32_Phdr *h1 = v1; v1 1592 arch/mips/cavium-octeon/octeon-irq.c u32 v0, v1; v1 1599 arch/mips/cavium-octeon/octeon-irq.c r = of_property_read_u32_index(gpio_node, "interrupts", 1, &v1); v1 1604 arch/mips/cavium-octeon/octeon-irq.c base_hwirq = (v0 << 6) | v1; v1 42 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h dli v1, ~(7 << 7) v1 43 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h and v0, v0, v1 v1 46 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h mfc0 v1, CP0_PRID_REG v1 47 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h and t1, v1, 0xfff8 v1 50 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h and t1, v1, 0xfff8 v1 53 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h and t1, v1, 0xfff8 v1 56 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h and t1, v1, 0xff00 v1 59 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h and t1, v1, 0x00ff v1 60 arch/mips/include/asm/stackframe.h mflhxu v1 v1 61 arch/mips/include/asm/stackframe.h LONG_S v1, PT_LO(sp) v1 62 arch/mips/include/asm/stackframe.h mflhxu v1 v1 63 arch/mips/include/asm/stackframe.h LONG_S v1, PT_HI(sp) v1 64 arch/mips/include/asm/stackframe.h mflhxu v1 v1 65 arch/mips/include/asm/stackframe.h LONG_S v1, PT_ACX(sp) v1 67 arch/mips/include/asm/stackframe.h mfhi v1 v1 77 arch/mips/include/asm/stackframe.h LONG_S v1, PT_HI(sp) v1 78 arch/mips/include/asm/stackframe.h mflo v1 v1 85 arch/mips/include/asm/stackframe.h LONG_S v1, PT_LO(sp) v1 247 arch/mips/include/asm/stackframe.h cfi_st v1, PT_R3, \docfi v1 254 arch/mips/include/asm/stackframe.h mfc0 v1, CP0_STATUS v1 256 arch/mips/include/asm/stackframe.h LONG_S v1, PT_STATUS(sp) v1 258 arch/mips/include/asm/stackframe.h mfc0 v1, CP0_CAUSE v1 260 arch/mips/include/asm/stackframe.h LONG_S v1, PT_CAUSE(sp) v1 359 arch/mips/include/asm/stackframe.h li v1, ST0_CU1 | ST0_IM v1 363 arch/mips/include/asm/stackframe.h and a0, v1 v1 365 arch/mips/include/asm/stackframe.h nor v1, $0, v1 v1 366 arch/mips/include/asm/stackframe.h and v0, v1 v1 400 arch/mips/include/asm/stackframe.h li v1, ST0_CU1 | ST0_FR | ST0_IM v1 401 arch/mips/include/asm/stackframe.h and a0, v1 v1 403 arch/mips/include/asm/stackframe.h nor v1, $0, v1 v1 404 arch/mips/include/asm/stackframe.h and v0, v1 v1 407 arch/mips/include/asm/stackframe.h LONG_L v1, PT_EPC(sp) v1 408 arch/mips/include/asm/stackframe.h MTC0 v1, CP0_EPC v1 43 arch/mips/kernel/cpu-bugs64.c void mult_sh_align_mod(long *v1, long *v2, long *w, v1 113 arch/mips/kernel/cpu-bugs64.c *v1 = lv1; v1 120 arch/mips/kernel/cpu-bugs64.c long v1[8], v2[8], w[8]; v1 134 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0); v1 135 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1); v1 136 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2); v1 137 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3); v1 138 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4); v1 139 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5); v1 140 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6); v1 141 arch/mips/kernel/cpu-bugs64.c mult_sh_align_mod(&v1[7], &v2[7], &w[7], 32, 7); v1 145 arch/mips/kernel/cpu-bugs64.c if (v1[i] != w[i]) v1 59 arch/mips/kernel/ftrace.c unsigned int v1; v1 62 arch/mips/kernel/ftrace.c v1 = 3; v1 64 arch/mips/kernel/ftrace.c UASM_i_LA(&buf, v1, MCOUNT_ADDR); v1 18 arch/openrisc/include/asm/syscalls.h asmlinkage long sys_or1k_atomic(unsigned long type, unsigned long *v1, v1 1003 arch/powerpc/lib/sstep.c long v1, long v2, int crfld) v1 1009 arch/powerpc/lib/sstep.c if (v1 < v2) v1 1011 arch/powerpc/lib/sstep.c else if (v1 > v2) v1 1021 arch/powerpc/lib/sstep.c unsigned long v1, v1 1028 arch/powerpc/lib/sstep.c if (v1 < v2) v1 1030 arch/powerpc/lib/sstep.c else if (v1 > v2) v1 1040 arch/powerpc/lib/sstep.c unsigned long v1, unsigned long v2) v1 1048 arch/powerpc/lib/sstep.c if ((v1 & mask) == (v2 & mask)) v1 1060 arch/powerpc/lib/sstep.c unsigned long v1, int size) v1 1062 arch/powerpc/lib/sstep.c unsigned long long out = v1; v1 1087 arch/powerpc/lib/sstep.c unsigned long v1, unsigned long v2) v1 1094 arch/powerpc/lib/sstep.c idx = (v1 >> (i * 8)) & 0xff; v1 1122 arch/powerpc/lib/sstep.c static nokprobe_inline int trap_compare(long v1, long v2) v1 1126 arch/powerpc/lib/sstep.c if (v1 < v2) v1 1128 arch/powerpc/lib/sstep.c else if (v1 > v2) v1 1132 arch/powerpc/lib/sstep.c if ((unsigned long)v1 < (unsigned long)v2) v1 1134 arch/powerpc/lib/sstep.c else if ((unsigned long)v1 > (unsigned long)v2) v1 55 arch/powerpc/lib/xor_vmx.c DEFINE(v1); v1 60 arch/powerpc/lib/xor_vmx.c LOAD(v1); v1 62 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v1 63 arch/powerpc/lib/xor_vmx.c STORE(v1); v1 65 arch/powerpc/lib/xor_vmx.c v1 += 4; v1 73 arch/powerpc/lib/xor_vmx.c DEFINE(v1); v1 79 arch/powerpc/lib/xor_vmx.c LOAD(v1); v1 82 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v1 83 arch/powerpc/lib/xor_vmx.c XOR(v1, v3); v1 84 arch/powerpc/lib/xor_vmx.c STORE(v1); v1 86 arch/powerpc/lib/xor_vmx.c v1 += 4; v1 96 arch/powerpc/lib/xor_vmx.c DEFINE(v1); v1 103 arch/powerpc/lib/xor_vmx.c LOAD(v1); v1 107 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v1 109 arch/powerpc/lib/xor_vmx.c XOR(v1, v3); v1 110 arch/powerpc/lib/xor_vmx.c STORE(v1); v1 112 arch/powerpc/lib/xor_vmx.c v1 += 4; v1 123 arch/powerpc/lib/xor_vmx.c DEFINE(v1); v1 131 arch/powerpc/lib/xor_vmx.c LOAD(v1); v1 136 arch/powerpc/lib/xor_vmx.c XOR(v1, v2); v1 138 arch/powerpc/lib/xor_vmx.c XOR(v1, v5); v1 139 arch/powerpc/lib/xor_vmx.c XOR(v1, v3); v1 140 arch/powerpc/lib/xor_vmx.c STORE(v1); v1 142 arch/powerpc/lib/xor_vmx.c v1 += 4; v1 545 arch/powerpc/perf/hv-24x7.c static int ev_uniq_ord(const void *v1, size_t s1, unsigned d1, const void *v2, v1 548 arch/powerpc/perf/hv-24x7.c int r = memord(v1, s1, v2, s2); v1 54 arch/powerpc/platforms/ps3/repository.c u64 v1, u64 v2, const char *func, int line) v1 61 arch/powerpc/platforms/ps3/repository.c pr_devel("%s:%d: v1: %016llx\n", func, line, v1); v1 113 arch/powerpc/platforms/ps3/repository.c u64 v1; v1 122 arch/powerpc/platforms/ps3/repository.c result = lv1_read_repository_node(lpar_id, n1, n2, n3, n4, &v1, v1 132 arch/powerpc/platforms/ps3/repository.c dump_node(lpar_id, n1, n2, n3, n4, v1, v2); v1 135 arch/powerpc/platforms/ps3/repository.c *_v1 = v1; v1 139 arch/powerpc/platforms/ps3/repository.c if (v1 && !_v1) v1 141 arch/powerpc/platforms/ps3/repository.c __func__, __LINE__, v1); v1 169 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 175 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 176 arch/powerpc/platforms/ps3/repository.c *bus_type = v1; v1 184 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 190 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 191 arch/powerpc/platforms/ps3/repository.c *num_dev = v1; v1 218 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 225 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 226 arch/powerpc/platforms/ps3/repository.c *dev_type = v1; v1 235 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 243 arch/powerpc/platforms/ps3/repository.c &v1, &v2); v1 244 arch/powerpc/platforms/ps3/repository.c *intr_type = v1; v1 254 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 261 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 262 arch/powerpc/platforms/ps3/repository.c *reg_type = v1; v1 594 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 600 arch/powerpc/platforms/ps3/repository.c 0, &v1, NULL); v1 601 arch/powerpc/platforms/ps3/repository.c *num_regions = v1; v1 610 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 617 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 618 arch/powerpc/platforms/ps3/repository.c *region_id = v1; v1 767 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 774 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 775 arch/powerpc/platforms/ps3/repository.c *region_count = v1; v1 831 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 837 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 838 arch/powerpc/platforms/ps3/repository.c *num_spu_reserved = v1; v1 850 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 856 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 857 arch/powerpc/platforms/ps3/repository.c *num_resource_id = v1; v1 872 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 880 arch/powerpc/platforms/ps3/repository.c &v1, &v2); v1 881 arch/powerpc/platforms/ps3/repository.c *resource_type = v1; v1 899 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 906 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 907 arch/powerpc/platforms/ps3/repository.c *size = v1; v1 914 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 921 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 922 arch/powerpc/platforms/ps3/repository.c *port = v1; v1 929 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 936 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 937 arch/powerpc/platforms/ps3/repository.c *port = v1; v1 964 arch/powerpc/platforms/ps3/repository.c u64 v1 = 0; v1 971 arch/powerpc/platforms/ps3/repository.c &v1, NULL); v1 972 arch/powerpc/platforms/ps3/repository.c *num_be = v1; v1 1049 arch/powerpc/platforms/ps3/repository.c static int create_node(u64 n1, u64 n2, u64 n3, u64 n4, u64 v1, u64 v2) v1 1053 arch/powerpc/platforms/ps3/repository.c dump_node(0, n1, n2, n3, n4, v1, v2); v1 1055 arch/powerpc/platforms/ps3/repository.c result = lv1_create_repository_node(n1, n2, n3, n4, v1, v2); v1 1083 arch/powerpc/platforms/ps3/repository.c static int write_node(u64 n1, u64 n2, u64 n3, u64 n4, u64 v1, u64 v2) v1 1087 arch/powerpc/platforms/ps3/repository.c result = create_node(n1, n2, n3, n4, v1, v2); v1 1092 arch/powerpc/platforms/ps3/repository.c result = lv1_write_repository_node(n1, n2, n3, n4, v1, v2); v1 1106 arch/powerpc/platforms/ps3/repository.c u64 v1 = (u64)region_count; v1 1113 arch/powerpc/platforms/ps3/repository.c v1, 0); v1 94 arch/s390/include/asm/vx-insn.h .ifc \vxr,%v1 v1 200 arch/s390/include/asm/vx-insn.h .macro RXB rxb v1 v2=0 v3=0 v4=0 v1 224 arch/s390/include/asm/vx-insn.h .macro MRXB m v1 v2=0 v3=0 v4=0 v1 239 arch/s390/include/asm/vx-insn.h .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0 v1 248 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr v1 249 arch/s390/include/asm/vx-insn.h .word (0xE700 | ((v1&15) << 4)) v1 251 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x44, v1 v1 262 arch/s390/include/asm/vx-insn.h VX_NUM v1, \v v1 265 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | r3 v1 267 arch/s390/include/asm/vx-insn.h MRXBOPC \m, 0x22, v1 v1 283 arch/s390/include/asm/vx-insn.h .macro VLR v1, v2 v1 284 arch/s390/include/asm/vx-insn.h VX_NUM v1, \v1 v1 286 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 288 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x56, v1, v2 v1 293 arch/s390/include/asm/vx-insn.h VX_NUM v1, \v v1 296 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | x2 v1 298 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x06, v1 v1 303 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 306 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | x2 v1 308 arch/s390/include/asm/vx-insn.h MRXBOPC \m3, \opc, v1 v1 325 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 326 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) v1 328 arch/s390/include/asm/vx-insn.h MRXBOPC \m3, \opc, v1 v1 367 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vfrom v1 370 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v3&15) v1 372 arch/s390/include/asm/vx-insn.h MRXBOPC \hint, 0x36, v1, v3 v1 377 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vfrom v1 380 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v3&15) v1 382 arch/s390/include/asm/vx-insn.h MRXBOPC \hint, 0x3E, v1, v3 v1 387 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 391 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 393 arch/s390/include/asm/vx-insn.h MRXBOPC (v4&15), 0x8C, v1, v2, v3, v4 v1 398 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 400 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 402 arch/s390/include/asm/vx-insn.h MRXBOPC \m3, 0xD4, v1, v2 v1 419 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 422 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 424 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x68, v1, v2, v3 v1 429 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 432 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 434 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x6D, v1, v2, v3 v1 439 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 442 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 444 arch/s390/include/asm/vx-insn.h MRXBOPC \m4, 0xB4, v1, v2, v3 v1 461 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 465 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 467 arch/s390/include/asm/vx-insn.h MRXBOPC (v4&15), 0xBC, v1, v2, v3, v4 v1 484 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 487 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 489 arch/s390/include/asm/vx-insn.h MRXBOPC 0, 0x7D, v1, v2, v3 v1 494 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 495 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) v1 497 arch/s390/include/asm/vx-insn.h MRXBOPC \m3, 0x45, v1 v1 514 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 517 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 519 arch/s390/include/asm/vx-insn.h MRXBOPC \m4, 0xF3, v1, v2, v3 v1 539 arch/s390/include/asm/vx-insn.h VX_NUM v1, \vr1 v1 542 arch/s390/include/asm/vx-insn.h .word 0xE700 | ((v1&15) << 4) | (v2&15) v1 544 arch/s390/include/asm/vx-insn.h MRXBOPC \m4, 0x7A, v1, v2, v3 v1 112 arch/um/drivers/cow_user.c struct cow_header_v1 v1; v1 295 arch/um/drivers/cow_user.c if (n < offsetof(typeof(header->v1), backing_file)) { v1 300 arch/um/drivers/cow_user.c magic = header->v1.magic; v1 302 arch/um/drivers/cow_user.c version = header->v1.version; v1 304 arch/um/drivers/cow_user.c version = be32toh(header->v1.version); v1 311 arch/um/drivers/cow_user.c if (n < sizeof(header->v1)) { v1 316 arch/um/drivers/cow_user.c *mtime_out = header->v1.mtime; v1 317 arch/um/drivers/cow_user.c *size_out = header->v1.size; v1 318 arch/um/drivers/cow_user.c *sectorsize_out = header->v1.sectorsize; v1 319 arch/um/drivers/cow_user.c *bitmap_offset_out = sizeof(header->v1); v1 321 arch/um/drivers/cow_user.c file = header->v1.backing_file; v1 94 arch/x86/platform/uv/bios_uv.c u64 v0, v1; v1 98 arch/x86/platform/uv/bios_uv.c (u64)(&v0), (u64)(&v1), 0, 0); v1 112 arch/x86/platform/uv/bios_uv.c *ssn = v1; v1 194 crypto/adiantum.c static inline void le128_add(le128 *r, const le128 *v1, const le128 *v2) v1 196 crypto/adiantum.c u64 x = le64_to_cpu(v1->b); v1 200 crypto/adiantum.c r->a = cpu_to_le64(le64_to_cpu(v1->a) + le64_to_cpu(v2->a) + v1 205 crypto/adiantum.c static inline void le128_sub(le128 *r, const le128 *v1, const le128 *v2) v1 207 crypto/adiantum.c u64 x = le64_to_cpu(v1->b); v1 211 crypto/adiantum.c r->a = cpu_to_le64(le64_to_cpu(v1->a) - le64_to_cpu(v2->a) - v1 79 drivers/char/mwave/mwavedd.h #define PRINTK_2(f,s,v1) \ v1 81 drivers/char/mwave/mwavedd.h printk(s,v1); \ v1 84 drivers/char/mwave/mwavedd.h #define PRINTK_3(f,s,v1,v2) \ v1 86 drivers/char/mwave/mwavedd.h printk(s,v1,v2); \ v1 89 drivers/char/mwave/mwavedd.h #define PRINTK_4(f,s,v1,v2,v3) \ v1 91 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3); \ v1 94 drivers/char/mwave/mwavedd.h #define PRINTK_5(f,s,v1,v2,v3,v4) \ v1 96 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4); \ v1 99 drivers/char/mwave/mwavedd.h #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ v1 101 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4,v5); \ v1 104 drivers/char/mwave/mwavedd.h #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ v1 106 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4,v5,v6); \ v1 109 drivers/char/mwave/mwavedd.h #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ v1 111 drivers/char/mwave/mwavedd.h printk(s,v1,v2,v3,v4,v5,v6,v7); \ v1 116 drivers/char/mwave/mwavedd.h #define PRINTK_2(f,s,v1) v1 117 drivers/char/mwave/mwavedd.h #define PRINTK_3(f,s,v1,v2) v1 118 drivers/char/mwave/mwavedd.h #define PRINTK_4(f,s,v1,v2,v3) v1 119 drivers/char/mwave/mwavedd.h #define PRINTK_5(f,s,v1,v2,v3,v4) v1 120 drivers/char/mwave/mwavedd.h #define PRINTK_6(f,s,v1,v2,v3,v4,v5) v1 121 drivers/char/mwave/mwavedd.h #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) v1 122 drivers/char/mwave/mwavedd.h #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) v1 637 drivers/char/sonypi.c u8 v1, v2; v1 641 drivers/char/sonypi.c v1 = inb_p(sonypi_device.ioport2); v1 648 drivers/char/sonypi.c u8 v1; v1 654 drivers/char/sonypi.c v1 = inb_p(sonypi_device.ioport1); v1 655 drivers/char/sonypi.c return v1; v1 660 drivers/char/sonypi.c u8 v1; v1 668 drivers/char/sonypi.c v1 = inb_p(sonypi_device.ioport1); v1 669 drivers/char/sonypi.c return v1; v1 676 drivers/char/sonypi.c u8 v1, v2; v1 680 drivers/char/sonypi.c v1 = sonypi_call2(0x8f, fn); v1 682 drivers/char/sonypi.c if (v1 == v2 && v1 != 0xff) v1 683 drivers/char/sonypi.c return v1; v1 826 drivers/char/sonypi.c u8 v1, v2, event = 0; v1 829 drivers/char/sonypi.c v1 = inb_p(sonypi_device.ioport1); v1 841 drivers/char/sonypi.c if (v1 == sonypi_eventtypes[i].events[j].data) { v1 851 drivers/char/sonypi.c v1, v2); v1 860 drivers/char/sonypi.c "sonypi: event port1=0x%02x,port2=0x%02x\n", v1, v2); v1 42 drivers/clocksource/acpi_pm.c u32 v1 = 0, v2 = 0, v3 = 0; v1 51 drivers/clocksource/acpi_pm.c v1 = read_pmtmr(); v1 54 drivers/clocksource/acpi_pm.c } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) v1 55 drivers/clocksource/acpi_pm.c || (v3 > v1 && v3 < v2))); v1 39 drivers/clocksource/h8300_timer16.c unsigned short v1, v2, v3; v1 47 drivers/clocksource/h8300_timer16.c v1 = ioread16be(p->mapbase + TCNT); v1 51 drivers/clocksource/h8300_timer16.c } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) v1 52 drivers/clocksource/h8300_timer16.c || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); v1 44 drivers/clocksource/h8300_tpu.c unsigned long v1, v2, v3; v1 52 drivers/clocksource/h8300_tpu.c v1 = read_tcnt32(p); v1 56 drivers/clocksource/h8300_tpu.c } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) v1 57 drivers/clocksource/h8300_tpu.c || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); v1 277 drivers/clocksource/sh_cmt.c u32 v1, v2, v3; v1 285 drivers/clocksource/sh_cmt.c v1 = sh_cmt_read_cmcnt(ch); v1 289 drivers/clocksource/sh_cmt.c } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) v1 290 drivers/clocksource/sh_cmt.c || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); v1 50 drivers/dma/fsl-edma-common.c if (fsl_chan->edma->drvdata->version == v1) { v1 67 drivers/dma/fsl-edma-common.c if (fsl_chan->edma->drvdata->version == v1) { v1 231 drivers/dma/fsl-edma.c .version = v1, v1 32 drivers/firmware/google/memconsole-x86-legacy.c } __packed v1; v1 57 drivers/firmware/google/memconsole-x86-legacy.c hdr->v1.buffer_addr, hdr->v1.start, v1 58 drivers/firmware/google/memconsole-x86-legacy.c hdr->v1.end, hdr->v1.num_chars); v1 60 drivers/firmware/google/memconsole-x86-legacy.c memconsole_baseaddr = phys_to_virt(hdr->v1.buffer_addr); v1 61 drivers/firmware/google/memconsole-x86-legacy.c memconsole_length = hdr->v1.num_chars; v1 875 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _ATOM_ASIC_SS_ASSIGNMENT v1; v1 915 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if ((ss_assign->v1.ucClockIndication == id) && v1 916 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) { v1 918 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c le16_to_cpu(ss_assign->v1.usSpreadSpectrumPercentage); v1 919 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ss->type = ss_assign->v1.ucSpreadSpectrumMode; v1 920 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ss->rate = le16_to_cpu(ss_assign->v1.usSpreadRateInKhz); v1 987 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS v1; v1 1184 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _SET_VOLTAGE_PARAMETERS v1; v1 1387 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _ATOM_VOLTAGE_OBJECT_INFO v1; v1 1393 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct _ATOM_VOLTAGE_OBJECT v1; v1 236 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION v1; v1 301 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c ADJUST_DISPLAY_PLL_PS_ALLOCATION v1; v1 391 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); v1 392 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucTransmitterID = amdgpu_encoder->encoder_id; v1 393 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucEncodeMode = encoder_mode; v1 395 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucConfig |= v1 400 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10; v1 460 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c PIXEL_CLOCK_PARAMETERS v1; v1 608 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); v1 609 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.usRefDiv = cpu_to_le16(ref_div); v1 610 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.usFbDiv = cpu_to_le16(fb_div); v1 611 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucFracFbDiv = frac_fb_div; v1 612 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucPostDiv = post_div; v1 613 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucPpll = pll_id; v1 614 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucCRTC = crtc_id; v1 615 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.ucRefDivSrc = 1; v1 53 drivers/gpu/drm/amd/amdgpu/atombios_dp.c PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION v1; v1 109 drivers/gpu/drm/amd/amdgpu/atombios_dp.c recv_bytes = args.v1.ucDataOutLen; v1 564 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c DIG_ENCODER_CONTROL_PS_ALLOCATION v1; v1 610 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucAction = action; v1 611 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); v1 615 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucEncoderMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); v1 617 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode)) v1 618 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucLaneNum = dp_lane_count; v1 620 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucLaneNum = 8; v1 622 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucLaneNum = 4; v1 624 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000)) v1 625 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; v1 628 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1; v1 632 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2; v1 635 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; v1 639 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB; v1 641 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA; v1 660 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ; v1 681 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ; v1 683 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ; v1 685 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ; v1 687 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ; v1 752 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c DIG_TRANSMITTER_CONTROL_PS_ALLOCATION v1; v1 838 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucAction = action; v1 840 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.usInitInfo = cpu_to_le16(connector_object_id); v1 842 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.asMode.ucLaneSel = lane_num; v1 843 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.asMode.ucLaneSet = lane_set; v1 846 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16(dp_clock / 10); v1 848 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10); v1 850 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); v1 853 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; v1 856 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; v1 858 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; v1 865 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; v1 867 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; v1 869 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; v1 871 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; v1 874 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; v1 876 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; v1 881 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; v1 883 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA; v1 886 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; v1 889 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; v1 891 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; v1 1198 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucAction = action; v1 1218 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION v1; v1 1269 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.sDigEncoder.ucAction = action; v1 1270 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.sDigEncoder.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); v1 1271 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.sDigEncoder.ucEncoderMode = v1 1274 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (ENCODER_MODE_IS_DP(args.v1.sDigEncoder.ucEncoderMode)) { v1 1276 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.sDigEncoder.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; v1 1277 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.sDigEncoder.ucLaneNum = dp_lane_count; v1 1279 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.sDigEncoder.ucLaneNum = 8; v1 1281 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.sDigEncoder.ucLaneNum = 4; v1 1460 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c SELECT_CRTC_SOURCE_PS_ALLOCATION v1; v1 1487 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucCRTC = amdgpu_crtc->crtc_id; v1 1491 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_DFP1_INDEX; v1 1496 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_LCD1_INDEX; v1 1498 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_DFP3_INDEX; v1 1503 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_DFP2_INDEX; v1 1508 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX; v1 1510 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CV_INDEX; v1 1512 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CRT1_INDEX; v1 1517 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX; v1 1519 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CV_INDEX; v1 1521 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CRT2_INDEX; v1 2639 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct _ATOM_PPLIB_STATE v1; v1 7209 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct _ATOM_PPLIB_STATE v1; v1 96 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c float dcn_bw_max3(float v1, float v2, float v3) v1 98 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c return v3 > dcn_bw_max2(v1, v2) ? v3 : dcn_bw_max2(v1, v2); v1 101 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5) v1 103 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v5); v1 158 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t v1 = 0; v1 168 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c v1 = get_reg_field_value( v1 185 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c if (h1 == h2 && v1 == v2) v1 1384 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c #define AUX_REG_UPDATE_2(reg, f1, v1, f2, v2) \ v1 1386 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c FN(reg, f1), v1,\ v1 54 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h static inline struct bw_fixed bw_min3(struct bw_fixed v1, v1 58 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h return bw_min2(bw_min2(v1, v2), v3); v1 61 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h static inline struct bw_fixed bw_max3(struct bw_fixed v1, v1 65 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h return bw_max2(bw_max2(v1, v2), v3); v1 37 drivers/gpu/drm/amd/display/dc/inc/dcn_calc_math.h float dcn_bw_max3(float v1, float v2, float v3); v1 38 drivers/gpu/drm/amd/display/dc/inc/dcn_calc_math.h float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5); v1 67 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ v1 69 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 72 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ v1 74 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 78 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ v1 80 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 85 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v1 88 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 94 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v1 97 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 104 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v1 107 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 115 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ v1 118 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 127 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_9(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \ v1 130 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 140 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_SET_10(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \ v1 143 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 160 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_2(reg_name, f1, v1, f2, v2) \ v1 162 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f1), v1, \ v1 165 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \ v1 167 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f1), v1, \ v1 171 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \ v1 173 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f1), v1, \ v1 178 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \ v1 180 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f1), v1, \ v1 186 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_6(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \ v1 188 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f1), v1, \ v1 195 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ v1 197 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f1), v1, \ v1 205 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_GET_8(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \ v1 207 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg_name, f1), v1, \ v1 234 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_2(reg, f1, v1, f2, v2) \ v1 236 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 239 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ v1 241 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 245 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ v1 247 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 252 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_5(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \ v1 254 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 260 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_6(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \ v1 262 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 269 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_7(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ v1 271 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 279 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_8(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \ v1 281 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 290 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_9(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9) \ v1 292 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 302 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10)\ v1 304 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 315 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_14(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\ v1 318 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 333 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_19(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\ v1 336 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 356 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_20(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\ v1 359 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 382 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_SEQ_2(reg, f1, v1, f2, v2) \ v1 383 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h { uint32_t val = REG_UPDATE(reg, f1, v1); \ v1 386 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define REG_UPDATE_SEQ_3(reg, f1, v1, f2, v2, f3, v3) \ v1 387 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h { uint32_t val = REG_UPDATE(reg, f1, v1); \ v1 452 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define IX_REG_SET_2(index_reg_name, data_reg_name, index, init_value, f1, v1, f2, v2) \ v1 454 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 469 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h #define IX_REG_UPDATE_2(index_reg_name, data_reg_name, index, f1, v1, f2, v2) \ v1 471 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h FN(reg, f1), v1,\ v1 42 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct _ATOM_VOLTAGE_OBJECT_INFO v1; v1 42 drivers/gpu/drm/etnaviv/etnaviv_iommu.c context->global->v1.shared_context = NULL; v1 135 drivers/gpu/drm/etnaviv/etnaviv_iommu.c if (global->v1.shared_context) { v1 136 drivers/gpu/drm/etnaviv/etnaviv_iommu.c context = global->v1.shared_context; v1 162 drivers/gpu/drm/etnaviv/etnaviv_iommu.c context->global->v1.shared_context = context; v1 59 drivers/gpu/drm/etnaviv/etnaviv_mmu.h } v1; v1 473 drivers/gpu/drm/exynos/exynos_drm_fimc.c u32 cfg, h1, h2, v1, v2; v1 478 drivers/gpu/drm/exynos/exynos_drm_fimc.c v1 = buf->rect.y; v1 484 drivers/gpu/drm/exynos/exynos_drm_fimc.c DRM_DEV_DEBUG_KMS(ctx->dev, "h1[%d]h2[%d]v1[%d]v2[%d]\n", h1, h2, v1, v1 495 drivers/gpu/drm/exynos/exynos_drm_fimc.c EXYNOS_CIWDOFST_WINVEROFST(v1)); v1 409 drivers/gpu/drm/i915/intel_csr.c const struct intel_dmc_header_v1 *v1 = v1 415 drivers/gpu/drm/i915/intel_csr.c mmioaddr = v1->mmioaddr; v1 416 drivers/gpu/drm/i915/intel_csr.c mmiodata = v1->mmiodata; v1 417 drivers/gpu/drm/i915/intel_csr.c mmio_count = v1->mmio_count; v1 420 drivers/gpu/drm/i915/intel_csr.c dmc_header_size = sizeof(*v1); v1 58 drivers/gpu/drm/msm/edp/edp.h void msm_edp_phy_vm_pe_cfg(struct edp_phy *phy, u32 v0, u32 v1); v1 62 drivers/gpu/drm/msm/edp/edp_phy.c void msm_edp_phy_vm_pe_cfg(struct edp_phy *phy, u32 v0, u32 v1) v1 65 drivers/gpu/drm/msm/edp/edp_phy.c edp_write(phy->base + REG_EDP_PHY_GLB_VM_CFG1, v1); v1 111 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c struct nv_device_info_v1 v1; v1 116 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c if (!(ret = nvif_unpack(ret, &data, &size, args->v1, 1, 1, true))) { v1 118 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c args->v1.version, args->v1.count); v1 119 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c if (args->v1.count * sizeof(args->v1.data[0]) == size) { v1 120 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c for (i = 0; i < args->v1.count; i++) v1 121 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c nvkm_udevice_info_v1(device, &args->v1.data[i]); v1 41 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c struct nv50_disp_mthd_v1 v1; v1 60 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c if (!(ret = nvif_unpack(ret, &data, &size, args->v1, 1, 1, true))) { v1 63 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c args->v1.version, args->v1.method, v1 64 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c args->v1.hasht, args->v1.hashm); v1 65 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c mthd = args->v1.method; v1 66 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c type = args->v1.hasht; v1 67 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c mask = args->v1.hashm; v1 212 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c u8 v1 = next->bios.ramcfg_11_03_30; v1 216 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c ram_wr32(fuc, 0x1373ec, tmp | (v1 << 16)); v1 225 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c ram_mask(fuc, 0x10f800, 0x00000030, (v0 ^ v1) << 4); v1 439 drivers/gpu/drm/radeon/atombios_crtc.c ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION v1; v1 520 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); v1 521 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; v1 522 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucSpreadSpectrumStep = ss->step; v1 523 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucSpreadSpectrumDelay = ss->delay; v1 524 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucSpreadSpectrumRange = ss->range; v1 525 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucPpll = pll_id; v1 526 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucEnable = enable; v1 554 drivers/gpu/drm/radeon/atombios_crtc.c ADJUST_DISPLAY_PLL_PS_ALLOCATION v1; v1 695 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); v1 696 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucTransmitterID = radeon_encoder->encoder_id; v1 697 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucEncodeMode = encoder_mode; v1 699 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucConfig |= v1 704 drivers/gpu/drm/radeon/atombios_crtc.c adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10; v1 764 drivers/gpu/drm/radeon/atombios_crtc.c PIXEL_CLOCK_PARAMETERS v1; v1 855 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); v1 856 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.usRefDiv = cpu_to_le16(ref_div); v1 857 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.usFbDiv = cpu_to_le16(fb_div); v1 858 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucFracFbDiv = frac_fb_div; v1 859 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucPostDiv = post_div; v1 860 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucPpll = pll_id; v1 861 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucCRTC = crtc_id; v1 862 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.ucRefDivSrc = 1; v1 81 drivers/gpu/drm/radeon/atombios_dp.c PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION v1; v1 107 drivers/gpu/drm/radeon/atombios_dp.c args.v1.lpAuxRequest = cpu_to_le16((u16)(0 + 4)); v1 108 drivers/gpu/drm/radeon/atombios_dp.c args.v1.lpDataOut = cpu_to_le16((u16)(16 + 4)); v1 109 drivers/gpu/drm/radeon/atombios_dp.c args.v1.ucDataOutLen = 0; v1 110 drivers/gpu/drm/radeon/atombios_dp.c args.v1.ucChannelID = chan->rec.i2c_id; v1 111 drivers/gpu/drm/radeon/atombios_dp.c args.v1.ucDelay = delay / 10; v1 117 drivers/gpu/drm/radeon/atombios_dp.c *ack = args.v1.ucReplyStatus; v1 120 drivers/gpu/drm/radeon/atombios_dp.c if (args.v1.ucReplyStatus == 1) { v1 127 drivers/gpu/drm/radeon/atombios_dp.c if (args.v1.ucReplyStatus == 2) { v1 134 drivers/gpu/drm/radeon/atombios_dp.c if (args.v1.ucReplyStatus == 3) { v1 140 drivers/gpu/drm/radeon/atombios_dp.c recv_bytes = args.v1.ucDataOutLen; v1 560 drivers/gpu/drm/radeon/atombios_encoders.c LVDS_ENCODER_CONTROL_PS_ALLOCATION v1; v1 608 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucMisc = 0; v1 609 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucAction = action; v1 611 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; v1 612 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); v1 615 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; v1 617 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB; v1 620 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; v1 622 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; v1 624 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB; v1 839 drivers/gpu/drm/radeon/atombios_encoders.c DIG_ENCODER_CONTROL_PS_ALLOCATION v1; v1 892 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucAction = action; v1 893 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); v1 897 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); v1 899 drivers/gpu/drm/radeon/atombios_encoders.c if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode)) v1 900 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucLaneNum = dp_lane_count; v1 902 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucLaneNum = 8; v1 904 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucLaneNum = 4; v1 908 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1; v1 912 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2; v1 915 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; v1 919 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB; v1 921 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA; v1 923 drivers/gpu/drm/radeon/atombios_encoders.c if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000)) v1 924 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; v1 944 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ; v1 968 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ; v1 970 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ; v1 972 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ; v1 974 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ; v1 1008 drivers/gpu/drm/radeon/atombios_encoders.c DIG_TRANSMITTER_CONTROL_PS_ALLOCATION v1; v1 1093 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucAction = action; v1 1095 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.usInitInfo = cpu_to_le16(connector_object_id); v1 1097 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.asMode.ucLaneSel = lane_num; v1 1098 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.asMode.ucLaneSet = lane_set; v1 1101 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16(dp_clock / 10); v1 1103 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); v1 1105 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); v1 1108 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; v1 1111 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; v1 1113 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; v1 1120 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; v1 1122 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; v1 1124 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; v1 1126 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; v1 1129 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; v1 1131 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; v1 1136 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; v1 1138 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA; v1 1141 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; v1 1144 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; v1 1146 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; v1 1413 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucAction = action; v1 1433 drivers/gpu/drm/radeon/atombios_encoders.c EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION v1; v1 1484 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.sDigEncoder.ucAction = action; v1 1485 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.sDigEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); v1 1486 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.sDigEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder); v1 1488 drivers/gpu/drm/radeon/atombios_encoders.c if (ENCODER_MODE_IS_DP(args.v1.sDigEncoder.ucEncoderMode)) { v1 1490 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.sDigEncoder.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; v1 1491 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.sDigEncoder.ucLaneNum = dp_lane_count; v1 1493 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.sDigEncoder.ucLaneNum = 8; v1 1495 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.sDigEncoder.ucLaneNum = 4; v1 1859 drivers/gpu/drm/radeon/atombios_encoders.c SELECT_CRTC_SOURCE_PS_ALLOCATION v1; v1 1886 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucCRTC = radeon_crtc->crtc_id; v1 1889 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucCRTC = radeon_crtc->crtc_id; v1 1891 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucCRTC = radeon_crtc->crtc_id << 2; v1 1897 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_DFP1_INDEX; v1 1902 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_LCD1_INDEX; v1 1904 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_DFP3_INDEX; v1 1909 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_DFP2_INDEX; v1 1914 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX; v1 1916 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CV_INDEX; v1 1918 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CRT1_INDEX; v1 1923 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX; v1 1925 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CV_INDEX; v1 1927 drivers/gpu/drm/radeon/atombios_encoders.c args.v1.ucDevice = ATOM_DEVICE_CRT2_INDEX; v1 5447 drivers/gpu/drm/radeon/ci_dpm.c struct _ATOM_PPLIB_STATE v1; v1 2571 drivers/gpu/drm/radeon/kv_dpm.c struct _ATOM_PPLIB_STATE v1; v1 3890 drivers/gpu/drm/radeon/ni_dpm.c struct _ATOM_PPLIB_STATE v1; v1 4017 drivers/gpu/drm/radeon/ni_dpm.c (power_state->v1.ucNonClockStateIndex * v1 4030 drivers/gpu/drm/radeon/ni_dpm.c idx = (u8 *)&power_state->v1.ucClockStateIndices[0]; v1 1513 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_ASIC_SS_ASSIGNMENT v1; v1 1553 drivers/gpu/drm/radeon/radeon_atombios.c if ((ss_assign->v1.ucClockIndication == id) && v1 1554 drivers/gpu/drm/radeon/radeon_atombios.c (clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) { v1 1556 drivers/gpu/drm/radeon/radeon_atombios.c le16_to_cpu(ss_assign->v1.usSpreadSpectrumPercentage); v1 1557 drivers/gpu/drm/radeon/radeon_atombios.c ss->type = ss_assign->v1.ucSpreadSpectrumMode; v1 1558 drivers/gpu/drm/radeon/radeon_atombios.c ss->rate = le16_to_cpu(ss_assign->v1.usSpreadRateInKhz); v1 2049 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_PPLIB_STATE v1; v1 2611 drivers/gpu/drm/radeon/radeon_atombios.c (power_state->v1.ucNonClockStateIndex * v1 2625 drivers/gpu/drm/radeon/radeon_atombios.c (power_state->v1.ucClockStateIndices[j] * v1 2828 drivers/gpu/drm/radeon/radeon_atombios.c struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS v1; v1 2856 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ucAction = clock_type; v1 2857 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */ v1 2861 drivers/gpu/drm/radeon/radeon_atombios.c dividers->post_div = args.v1.ucPostDiv; v1 2862 drivers/gpu/drm/radeon/radeon_atombios.c dividers->fb_div = args.v1.ucFbDiv; v1 3102 drivers/gpu/drm/radeon/radeon_atombios.c struct _SET_VOLTAGE_PARAMETERS v1; v1 3122 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ucVoltageType = voltage_type; v1 3123 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE; v1 3124 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ucVoltageIndex = volt_index; v1 3381 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_VOLTAGE_OBJECT_INFO v1; v1 3387 drivers/gpu/drm/radeon/radeon_atombios.c struct _ATOM_VOLTAGE_OBJECT v1; v1 3392 drivers/gpu/drm/radeon/radeon_atombios.c static ATOM_VOLTAGE_OBJECT *atom_lookup_voltage_object_v1(ATOM_VOLTAGE_OBJECT_INFO *v1, v1 3395 drivers/gpu/drm/radeon/radeon_atombios.c u32 size = le16_to_cpu(v1->sHeader.usStructureSize); v1 3397 drivers/gpu/drm/radeon/radeon_atombios.c u8 *start = (u8 *)v1; v1 3464 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v1(&voltage_info->v1, voltage_type); v1 3466 drivers/gpu/drm/radeon/radeon_atombios.c (voltage_object->v1.asControl.ucVoltageControlId == VOLTAGE_CONTROLLED_BY_GPIO)) v1 3563 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v1(&voltage_info->v1, voltage_type); v1 3566 drivers/gpu/drm/radeon/radeon_atombios.c &voltage_object->v1.asFormula; v1 3622 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v1(&voltage_info->v1, voltage_type); v1 3625 drivers/gpu/drm/radeon/radeon_atombios.c &voltage_object->v1.asFormula; v1 3672 drivers/gpu/drm/radeon/radeon_atombios.c atom_lookup_voltage_object_v1(&voltage_info->v1, voltage_type); v1 3675 drivers/gpu/drm/radeon/radeon_atombios.c &voltage_object->v1.asFormula; v1 715 drivers/gpu/drm/radeon/rs780_dpm.c struct _ATOM_PPLIB_STATE v1; v1 823 drivers/gpu/drm/radeon/rs780_dpm.c (power_state->v1.ucNonClockStateIndex * v1 829 drivers/gpu/drm/radeon/rs780_dpm.c (power_state->v1.ucClockStateIndices[0] * v1 1790 drivers/gpu/drm/radeon/rv6xx_dpm.c struct _ATOM_PPLIB_STATE v1; v1 1904 drivers/gpu/drm/radeon/rv6xx_dpm.c (power_state->v1.ucNonClockStateIndex * v1 1916 drivers/gpu/drm/radeon/rv6xx_dpm.c idx = (u8 *)&power_state->v1.ucClockStateIndices[0]; v1 2139 drivers/gpu/drm/radeon/rv770_dpm.c struct _ATOM_PPLIB_STATE v1; v1 2298 drivers/gpu/drm/radeon/rv770_dpm.c (power_state->v1.ucNonClockStateIndex * v1 2311 drivers/gpu/drm/radeon/rv770_dpm.c idx = (u8 *)&power_state->v1.ucClockStateIndices[0]; v1 6702 drivers/gpu/drm/radeon/si_dpm.c struct _ATOM_PPLIB_STATE v1; v1 1388 drivers/gpu/drm/radeon/sumo_dpm.c struct _ATOM_PPLIB_STATE v1; v1 1677 drivers/gpu/drm/radeon/trinity_dpm.c struct _ATOM_PPLIB_STATE v1; v1 52 drivers/hwmon/max1111.c uint8_t v1, v2; v1 69 drivers/hwmon/max1111.c v1 = data->rx_buf[0]; v1 74 drivers/hwmon/max1111.c if ((v1 & 0xc0) || (v2 & 0x3f)) v1 77 drivers/hwmon/max1111.c return (v1 << 2) | (v2 >> 6); v1 288 drivers/hwmon/nct7802.c unsigned int v1, v2; v1 293 drivers/hwmon/nct7802.c ret = regmap_read(data->regmap, REG_VOLTAGE[nr], &v1); v1 299 drivers/hwmon/nct7802.c ret = ((v1 << 2) | (v2 >> 6)) * nct7802_vmul[nr]; v1 304 drivers/hwmon/nct7802.c REG_VOLTAGE_LIMIT_LSB[index - 1][nr], &v1); v1 311 drivers/hwmon/nct7802.c ret = (v1 | ((v2 << shift) & 0x300)) * nct7802_vmul[nr]; v1 920 drivers/hwmon/pmbus/pmbus_core.c long v1, v2; v1 927 drivers/hwmon/pmbus/pmbus_core.c v1 = pmbus_reg2data(data, s1); v1 929 drivers/hwmon/pmbus/pmbus_core.c ret = !!(regval && v1 >= v2); v1 36 drivers/iio/adc/palmas_gpadc.c int v1; /* expected lower volt reading */ v1 50 drivers/iio/adc/palmas_gpadc.c .v1 = _v1, \ v1 299 drivers/iio/adc/palmas_gpadc.c int v1 = adc->adc_info[adc_chan].v1; v1 320 drivers/iio/adc/palmas_gpadc.c gain = ((v2 - v1) * 1000) / (x2 - x1); v1 1020 drivers/infiniband/hw/hfi1/tid_rdma.c void *v0, *v1, *vm1; v1 1028 drivers/infiniband/hw/hfi1/tid_rdma.c v1 = i + 1 < npages ? v1 1030 drivers/infiniband/hw/hfi1/tid_rdma.c trace_hfi1_tid_flow_page(flow->req->qp, flow, i, 1, 1, v1); v1 1032 drivers/infiniband/hw/hfi1/tid_rdma.c if (v1 != (v0 + PAGE_SIZE)) { v1 1038 drivers/infiniband/hw/hfi1/tid_rdma.c if (v1) { v1 1057 drivers/infiniband/hw/hfi1/tid_rdma.c vm1 = v1; v1 417 drivers/infiniband/hw/hfi1/trace_tid.h char mtu8k, char v1, void *vaddr), v1 418 drivers/infiniband/hw/hfi1/trace_tid.h TP_ARGS(qp, flow, index, mtu8k, v1, vaddr), v1 423 drivers/infiniband/hw/hfi1/trace_tid.h __field(char, v1) v1 432 drivers/infiniband/hw/hfi1/trace_tid.h __entry->v1 = v1; v1 443 drivers/infiniband/hw/hfi1/trace_tid.h __entry->mtu8k ? (__entry->v1 ? "v1" : "v0") : "vaddr", v1 451 drivers/infiniband/hw/hfi1/trace_tid.h char mtu8k, char v1, void *vaddr), v1 452 drivers/infiniband/hw/hfi1/trace_tid.h TP_ARGS(qp, flow, index, mtu8k, v1, vaddr) v1 295 drivers/input/mouse/sentelic.c int v0, v1, v2; v1 303 drivers/input/mouse/sentelic.c if (fsp_reg_read(psmouse, FSP_REG_SN1, &v1)) v1 307 drivers/input/mouse/sentelic.c *sn = (v0 << 16) | (v1 << 8) | v2; v1 388 drivers/isdn/hardware/mISDN/w6692.c u8 exval, v1, cir; v1 408 drivers/isdn/hardware/mISDN/w6692.c v1 = ReadW6692(card, W_MOSR); v1 410 drivers/isdn/hardware/mISDN/w6692.c card->name, v1); v1 416 drivers/isdn/hardware/mISDN/w6692.c v1 = cir & W_CIR_COD_MASK; v1 418 drivers/isdn/hardware/mISDN/w6692.c dch->state, v1); v1 419 drivers/isdn/hardware/mISDN/w6692.c card->state = v1; v1 421 drivers/isdn/hardware/mISDN/w6692.c switch (v1) { v1 434 drivers/isdn/hardware/mISDN/w6692.c v1 = ReadW6692(card, W_SQR); v1 435 drivers/isdn/hardware/mISDN/w6692.c pr_debug("%s: SCC SQR %02X\n", card->name, v1); v1 1437 drivers/media/pci/saa7134/saa7134-video.c int v1 = saa_readb(SAA7134_STATUS_VIDEO1); v1 1440 drivers/media/pci/saa7134/saa7134-video.c if (0 != (v1 & 0x40)) v1 563 drivers/media/pci/tw5864/tw5864-video.c u8 v1 = indir_0x000; v1 572 drivers/media/pci/tw5864/tw5864-video.c if (v1 & (1 << 7)) v1 574 drivers/media/pci/tw5864/tw5864-video.c if (!(v1 & (1 << 6))) v1 576 drivers/media/pci/tw5864/tw5864-video.c if (v1 & (1 << 2)) v1 578 drivers/media/pci/tw5864/tw5864-video.c if (v1 & (1 << 1)) v1 675 drivers/media/pci/tw68/tw68-video.c int v1 = tw_readb(TW68_STATUS1); v1 678 drivers/media/pci/tw68/tw68-video.c if (0 != (v1 & (1 << 7))) v1 680 drivers/media/pci/tw68/tw68-video.c if (0 != (v1 & (1 << 6))) v1 682 drivers/media/pci/tw68/tw68-video.c if (0 != (v1 & (1 << 2))) v1 684 drivers/media/pci/tw68/tw68-video.c if (0 != (v1 & 1 << 1)) v1 362 drivers/media/usb/gspca/w996Xcf.c v1 = u1 + hw_bufsize / 4; v1 381 drivers/media/usb/gspca/w996Xcf.c reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */ v1 382 drivers/media/usb/gspca/w996Xcf.c reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */ v1 800 drivers/media/usb/gspca/xirlink_cit.c static void cit_model2_Packet1(struct gspca_dev *gspca_dev, u16 v1, u16 v2) v1 804 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, v1, 0x012f); v1 821 drivers/media/usb/gspca/xirlink_cit.c static void cit_model3_Packet1(struct gspca_dev *gspca_dev, u16 v1, u16 v2) v1 824 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, v1, 0x012f); v1 830 drivers/media/usb/gspca/xirlink_cit.c static void cit_model4_Packet1(struct gspca_dev *gspca_dev, u16 v1, u16 v2) v1 833 drivers/media/usb/gspca/xirlink_cit.c cit_write_reg(gspca_dev, v1, 0x012f); v1 300 drivers/net/can/spi/mcp251x.c static void mcp251x_read_2regs(struct spi_device *spi, u8 reg, u8 *v1, u8 *v2) v1 309 drivers/net/can/spi/mcp251x.c *v1 = priv->spi_rx_buf[2]; v1 100 drivers/net/ethernet/chelsio/cxgb3/mc5.c static inline void dbgi_wr_data3(struct adapter *adapter, u32 v1, u32 v2, v1 103 drivers/net/ethernet/chelsio/cxgb3/mc5.c t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_DATA0, v1); v1 1744 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v1, v2, lp_count, hp_count; v1 1746 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v1 = t4_read_reg(adap, SGE_DBFIFO_STATUS_A); v1 1749 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c lp_count = LP_COUNT_G(v1); v1 1750 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c hp_count = HP_COUNT_G(v1); v1 1752 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c lp_count = LP_COUNT_T5_G(v1); v1 2007 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v1, v2, lp_count, hp_count; v1 2010 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v1 = t4_read_reg(adap, SGE_DBFIFO_STATUS_A); v1 2013 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c lp_count = LP_COUNT_G(v1); v1 2014 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c hp_count = HP_COUNT_G(v1); v1 2016 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c lp_count = LP_COUNT_T5_G(v1); v1 2729 drivers/net/ethernet/emulex/benet/be_cmds.c int v1[4] = {3, 102, 148, 0}; /* Min ver that supports NCSI FW */ v1 2737 drivers/net/ethernet/emulex/benet/be_cmds.c if (v1[i] < v2[i]) v1 2739 drivers/net/ethernet/emulex/benet/be_cmds.c else if (v1[i] > v2[i]) v1 496 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c #define SERVICE_RING_IRQ_IDX(v1) \ v1 497 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c ((v1) ? HNS_SERVICE_RING_IRQ_IDX : HNSV2_SERVICE_RING_IRQ_IDX) v1 1507 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.first = IBMVNIC_CRQ_CMD; v1 1508 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.type = IBMVNIC_TX_DESC; v1 1509 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.n_crq_elem = 1; v1 1510 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.n_sge = 1; v1 1511 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags1 = IBMVNIC_TX_COMP_NEEDED; v1 1514 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.correlator = v1 1517 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.correlator = cpu_to_be32(index); v1 1518 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.dma_reg = cpu_to_be16(tx_pool->long_term_buff.map_id); v1 1519 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.sge_len = cpu_to_be32(skb->len); v1 1520 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.ioba = cpu_to_be64(data_dma_addr); v1 1523 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags2 |= IBMVNIC_TX_VLAN_INSERT; v1 1524 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.vlan_id = cpu_to_be16(skb->vlan_tci); v1 1528 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_IPV4; v1 1531 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_IPV6; v1 1536 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_TCP; v1 1538 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_UDP; v1 1541 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags1 |= IBMVNIC_TX_CHKSUM_OFFLOAD; v1 1545 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.flags1 |= IBMVNIC_TX_LSO; v1 1546 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.mss = cpu_to_be16(skb_shinfo(skb)->gso_size); v1 1552 drivers/net/ethernet/ibm/ibmvnic.c tx_crq.v1.n_crq_elem = num_entries; v1 856 drivers/net/ethernet/ibm/ibmvnic.h struct ibmvnic_tx_desc v1; v1 110 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h #define mlxsw_pci_cqe_item_helpers(name, v0, v1, v2) \ v1 118 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h return mlxsw_pci_cqe##v1##_##name##_get(cqe); \ v1 132 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h mlxsw_pci_cqe##v1##_##name##_set(cqe, val); \ v1 73 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.c struct nfp_nffw_info_v1 v1; v1 142 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.c *arr = &fwinf->info.v1.fwinfo[0]; v1 4061 drivers/net/ethernet/sun/niu.c u64 v0, u64 v1, u64 v2) v1 4067 drivers/net/ethernet/sun/niu.c lp->v1 = v1; v1 4070 drivers/net/ethernet/sun/niu.c if (v1 & 0x00000000ffffffffULL) { v1 4071 drivers/net/ethernet/sun/niu.c u32 rx_vec = (v1 & 0xffffffff); v1 4088 drivers/net/ethernet/sun/niu.c if (v1 & 0x7fffffff00000000ULL) { v1 4089 drivers/net/ethernet/sun/niu.c u32 tx_vec = (v1 >> 32) & 0x7fffffff; v1 4101 drivers/net/ethernet/sun/niu.c if ((v0 | v1) & 0x8000000000000000ULL) { v1 4183 drivers/net/ethernet/sun/niu.c u64 v0, u64 v1, u64 v2) v1 4187 drivers/net/ethernet/sun/niu.c lp->v1 = v1; v1 4200 drivers/net/ethernet/sun/niu.c u64 v0, v1, v2; v1 4209 drivers/net/ethernet/sun/niu.c v1 = nr64(LDSV1(ldg)); v1 4215 drivers/net/ethernet/sun/niu.c (unsigned long long) v1, v1 4218 drivers/net/ethernet/sun/niu.c if (unlikely(!v0 && !v1 && !v2)) { v1 4223 drivers/net/ethernet/sun/niu.c if (unlikely((v0 & ((u64)1 << LDN_MIF)) || v1 || v2)) { v1 4224 drivers/net/ethernet/sun/niu.c int err = niu_slowpath_interrupt(np, lp, v0, v1, v2); v1 4229 drivers/net/ethernet/sun/niu.c niu_schedule_napi(np, lp, v0, v1, v2); v1 3174 drivers/net/ethernet/sun/niu.h u64 v0, v1, v2; v1 107 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v1 111 drivers/net/ethernet/toshiba/ps3_gelic_net.c GELIC_LV1_PHY_ETHERNET_0, mode, 0, &v1, &v2); v1 1302 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v1 1317 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v1 1328 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v1 1341 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v1 1352 drivers/net/ethernet/toshiba/ps3_gelic_net.c &v1, &v2); v1 1462 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v1 1472 drivers/net/ethernet/toshiba/ps3_gelic_net.c 0, 0, 0, &v1, &v2); v1 1473 drivers/net/ethernet/toshiba/ps3_gelic_net.c v1 <<= 16; v1 1474 drivers/net/ethernet/toshiba/ps3_gelic_net.c if (status || !is_valid_ether_addr((u8 *)&v1)) { v1 1480 drivers/net/ethernet/toshiba/ps3_gelic_net.c memcpy(netdev->dev_addr, &v1, ETH_ALEN); v1 1568 drivers/net/ethernet/toshiba/ps3_gelic_net.c u64 v1, v2; v1 1590 drivers/net/ethernet/toshiba/ps3_gelic_net.c 0, 0, &v1, &v2); v1 1591 drivers/net/ethernet/toshiba/ps3_gelic_net.c if (status || !v1) { v1 1600 drivers/net/ethernet/toshiba/ps3_gelic_net.c card->vlan[i].tx = (u16)v1; v1 1606 drivers/net/ethernet/toshiba/ps3_gelic_net.c 0, 0, &v1, &v2); v1 1607 drivers/net/ethernet/toshiba/ps3_gelic_net.c if (status || !v1) { v1 1616 drivers/net/ethernet/toshiba/ps3_gelic_net.c card->vlan[i].rx = (u16)v1; v1 48 drivers/net/gtp.c } v1; v1 130 drivers/net/gtp.c pdp->u.v1.i_tei == tid) v1 437 drivers/net/gtp.c gtp1->tid = htonl(pctx->u.v1.o_tei); v1 926 drivers/net/gtp.c pctx->u.v1.i_tei = nla_get_u32(info->attrs[GTPA_I_TEI]); v1 927 drivers/net/gtp.c pctx->u.v1.o_tei = nla_get_u32(info->attrs[GTPA_O_TEI]); v1 978 drivers/net/gtp.c pctx->u.v1.i_tei, pctx->u.v1.o_tei, pctx); v1 1004 drivers/net/gtp.c hash_tid = gtp1u_hashfn(pctx->u.v1.i_tei) % gtp->hash_size; v1 1019 drivers/net/gtp.c pctx->u.v1.i_tei, pctx->u.v1.o_tei, v1 1163 drivers/net/gtp.c pctx->u.v1.i_tei, pctx->u.v1.o_tei, pctx); v1 1196 drivers/net/gtp.c if (nla_put_u32(skb, GTPA_I_TEI, pctx->u.v1.i_tei) || v1 1197 drivers/net/gtp.c nla_put_u32(skb, GTPA_O_TEI, pctx->u.v1.o_tei)) v1 419 drivers/net/ieee802154/mac802154_hwsim.c u32 v0, v1; v1 432 drivers/net/ieee802154/mac802154_hwsim.c v1 = nla_get_u32(edge_attrs[MAC802154_HWSIM_EDGE_ATTR_ENDPOINT_ID]); v1 434 drivers/net/ieee802154/mac802154_hwsim.c if (v0 == v1) v1 444 drivers/net/ieee802154/mac802154_hwsim.c phy_v1 = hwsim_get_radio_by_id(v1); v1 452 drivers/net/ieee802154/mac802154_hwsim.c if (e->endpoint->idx == v1) { v1 481 drivers/net/ieee802154/mac802154_hwsim.c u32 v0, v1; v1 494 drivers/net/ieee802154/mac802154_hwsim.c v1 = nla_get_u32(edge_attrs[MAC802154_HWSIM_EDGE_ATTR_ENDPOINT_ID]); v1 505 drivers/net/ieee802154/mac802154_hwsim.c if (e->endpoint->idx == v1) { v1 528 drivers/net/ieee802154/mac802154_hwsim.c u32 v0, v1; v1 543 drivers/net/ieee802154/mac802154_hwsim.c v1 = nla_get_u32(edge_attrs[MAC802154_HWSIM_EDGE_ATTR_ENDPOINT_ID]); v1 561 drivers/net/ieee802154/mac802154_hwsim.c if (e->endpoint->idx == v1) { v1 2242 drivers/net/wireless/ath/ath10k/wmi.c ev_hdr = &ev_v2->hdr.v1; v1 3381 drivers/net/wireless/ath/ath10k/wmi.h struct wmi_mgmt_rx_hdr_v1 v1; v1 209 drivers/net/wireless/ath/ath6kl/wmi.c struct wmi_tx_meta_v1 *v1; v1 218 drivers/net/wireless/ath/ath6kl/wmi.c v1 = (struct wmi_tx_meta_v1 *) skb->data; v1 219 drivers/net/wireless/ath/ath6kl/wmi.c v1->pkt_id = 0; v1 220 drivers/net/wireless/ath/ath6kl/wmi.c v1->rate_plcy_id = 0; v1 32 drivers/net/wireless/ath/ath9k/rng.c u32 v1, v2, rng_last = sc->rng_last; v1 42 drivers/net/wireless/ath/ath9k/rng.c v1 = REG_READ(ah, AR_PHY_TST_ADC) & 0xffff; v1 46 drivers/net/wireless/ath/ath9k/rng.c if (v1 && v2 && rng_last != v1 && v1 != v2 && v1 != 0xffff && v1 48 drivers/net/wireless/ath/ath9k/rng.c buf[j++] = (v1 << 16) | v2; v1 1131 drivers/net/wireless/ath/wcn36xx/smd.c struct wcn36xx_hal_config_sta_params_v1 *v1) v1 1134 drivers/net/wireless/ath/wcn36xx/smd.c memcpy(&v1->bssid, orig->bssid, ETH_ALEN); v1 1135 drivers/net/wireless/ath/wcn36xx/smd.c memcpy(&v1->mac, orig->mac, ETH_ALEN); v1 1136 drivers/net/wireless/ath/wcn36xx/smd.c v1->aid = orig->aid; v1 1137 drivers/net/wireless/ath/wcn36xx/smd.c v1->type = orig->type; v1 1138 drivers/net/wireless/ath/wcn36xx/smd.c v1->short_preamble_supported = orig->short_preamble_supported; v1 1139 drivers/net/wireless/ath/wcn36xx/smd.c v1->listen_interval = orig->listen_interval; v1 1140 drivers/net/wireless/ath/wcn36xx/smd.c v1->wmm_enabled = orig->wmm_enabled; v1 1141 drivers/net/wireless/ath/wcn36xx/smd.c v1->ht_capable = orig->ht_capable; v1 1142 drivers/net/wireless/ath/wcn36xx/smd.c v1->tx_channel_width_set = orig->tx_channel_width_set; v1 1143 drivers/net/wireless/ath/wcn36xx/smd.c v1->rifs_mode = orig->rifs_mode; v1 1144 drivers/net/wireless/ath/wcn36xx/smd.c v1->lsig_txop_protection = orig->lsig_txop_protection; v1 1145 drivers/net/wireless/ath/wcn36xx/smd.c v1->max_ampdu_size = orig->max_ampdu_size; v1 1146 drivers/net/wireless/ath/wcn36xx/smd.c v1->max_ampdu_density = orig->max_ampdu_density; v1 1147 drivers/net/wireless/ath/wcn36xx/smd.c v1->sgi_40mhz = orig->sgi_40mhz; v1 1148 drivers/net/wireless/ath/wcn36xx/smd.c v1->sgi_20Mhz = orig->sgi_20Mhz; v1 1149 drivers/net/wireless/ath/wcn36xx/smd.c v1->rmf = orig->rmf; v1 1150 drivers/net/wireless/ath/wcn36xx/smd.c v1->encrypt_type = orig->encrypt_type; v1 1151 drivers/net/wireless/ath/wcn36xx/smd.c v1->action = orig->action; v1 1152 drivers/net/wireless/ath/wcn36xx/smd.c v1->uapsd = orig->uapsd; v1 1153 drivers/net/wireless/ath/wcn36xx/smd.c v1->max_sp_len = orig->max_sp_len; v1 1154 drivers/net/wireless/ath/wcn36xx/smd.c v1->green_field_capable = orig->green_field_capable; v1 1155 drivers/net/wireless/ath/wcn36xx/smd.c v1->mimo_ps = orig->mimo_ps; v1 1156 drivers/net/wireless/ath/wcn36xx/smd.c v1->delayed_ba_support = orig->delayed_ba_support; v1 1157 drivers/net/wireless/ath/wcn36xx/smd.c v1->max_ampdu_duration = orig->max_ampdu_duration; v1 1158 drivers/net/wireless/ath/wcn36xx/smd.c v1->dsss_cck_mode_40mhz = orig->dsss_cck_mode_40mhz; v1 1159 drivers/net/wireless/ath/wcn36xx/smd.c memcpy(&v1->supported_rates, &orig->supported_rates, v1 1161 drivers/net/wireless/ath/wcn36xx/smd.c v1->sta_index = orig->sta_index; v1 1162 drivers/net/wireless/ath/wcn36xx/smd.c v1->bssid_index = orig->bssid_index; v1 1163 drivers/net/wireless/ath/wcn36xx/smd.c v1->p2p = orig->p2p; v1 204 drivers/net/wireless/atmel/atmel_cs.c #define PCMCIA_DEVICE_PROD_ID12_INFO(v1, v2, vh1, vh2, info) { \ v1 207 drivers/net/wireless/atmel/atmel_cs.c .prod_id = { (v1), (v2), NULL, NULL }, \ v1 1334 drivers/net/wireless/broadcom/b43/main.c u32 v0, v1; v1 1342 drivers/net/wireless/broadcom/b43/main.c v1 = b43_read32(dev, B43_MMIO_XMITSTAT_1); v1 1345 drivers/net/wireless/broadcom/b43/main.c stat.seq = (v1 & 0x0000FFFF); v1 1346 drivers/net/wireless/broadcom/b43/main.c stat.phy_stat = ((v1 & 0x00FF0000) >> 16); v1 416 drivers/net/wireless/broadcom/b43legacy/main.c u16 v1; v1 426 drivers/net/wireless/broadcom/b43legacy/main.c v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); v1 432 drivers/net/wireless/broadcom/b43legacy/main.c } while (v3 != test3 || v2 != test2 || v1 != test1); v1 439 drivers/net/wireless/broadcom/b43legacy/main.c tmp = v1; v1 481 drivers/net/wireless/broadcom/b43legacy/main.c u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16; v1 488 drivers/net/wireless/broadcom/b43legacy/main.c b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1); v1 707 drivers/net/wireless/broadcom/b43legacy/main.c u32 v1; v1 715 drivers/net/wireless/broadcom/b43legacy/main.c v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); v1 718 drivers/net/wireless/broadcom/b43legacy/main.c stat.seq = (v1 & 0x0000FFFF); v1 719 drivers/net/wireless/broadcom/b43legacy/main.c stat.phy_stat = ((v1 & 0x00FF0000) >> 16); v1 1757 drivers/net/wireless/broadcom/b43legacy/phy.c s8 v1; v1 1784 drivers/net/wireless/broadcom/b43legacy/phy.c v1 = (s8)((tmp & 0xFF00) >> 8); v1 1790 drivers/net/wireless/broadcom/b43legacy/phy.c if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) { v1 1794 drivers/net/wireless/broadcom/b43legacy/phy.c v1 = (s8)((tmp & 0xFF00) >> 8); v1 1799 drivers/net/wireless/broadcom/b43legacy/phy.c if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) v1 1802 drivers/net/wireless/broadcom/b43legacy/phy.c v1 = (v1 + 0x20) & 0x3F; v1 1809 drivers/net/wireless/broadcom/b43legacy/phy.c average = (v0 + v1 + v2 + v3 + 2) / 4; v1 3753 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c u32 v1, v2; v1 3762 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol)); v1 3769 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0)); v1 21255 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; v1 21264 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c 1, 0x03, 16, &v1); v1 21275 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c 1, 0x13, 16, &v1); v1 1795 drivers/net/wireless/intel/iwlegacy/3945-mac.c return le32_to_cpu(ucode->v1.item); \ v1 1807 drivers/net/wireless/intel/iwlegacy/3945-mac.c return (u8 *) ucode->v1.data; v1 4726 drivers/net/wireless/intel/iwlegacy/4965-mac.c pieces->inst_size = le32_to_cpu(ucode->v1.inst_size); v1 4727 drivers/net/wireless/intel/iwlegacy/4965-mac.c pieces->data_size = le32_to_cpu(ucode->v1.data_size); v1 4728 drivers/net/wireless/intel/iwlegacy/4965-mac.c pieces->init_size = le32_to_cpu(ucode->v1.init_size); v1 4729 drivers/net/wireless/intel/iwlegacy/4965-mac.c pieces->init_data_size = le32_to_cpu(ucode->v1.init_data_size); v1 4730 drivers/net/wireless/intel/iwlegacy/4965-mac.c pieces->boot_size = le32_to_cpu(ucode->v1.boot_size); v1 4731 drivers/net/wireless/intel/iwlegacy/4965-mac.c src = ucode->v1.data; v1 744 drivers/net/wireless/intel/iwlegacy/common.h } v1; v1 684 drivers/net/wireless/intel/iwlwifi/fw/api/rx.h struct iwl_rx_mpdu_desc_v1 v1; v1 689 drivers/net/wireless/intel/iwlwifi/fw/api/rx.h #define IWL_RX_DESC_SIZE_V1 offsetofend(struct iwl_rx_mpdu_desc, v1) v1 658 drivers/net/wireless/intel/iwlwifi/fw/api/scan.h } v1; /* SCAN_CHANNEL_CFG_S_VER1 */ v1 769 drivers/net/wireless/intel/iwlwifi/fw/api/scan.h } v1; /* SCAN_REQUEST_CMD_UMAC_API_S_VER_1 */ v1 83 drivers/net/wireless/intel/iwlwifi/fw/file.h } v1; v1 536 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v1.inst_size)); v1 538 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v1.data_size)); v1 540 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v1.init_size)); v1 542 drivers/net/wireless/intel/iwlwifi/iwl-drv.c le32_to_cpu(ucode->u.v1.init_data_size)); v1 543 drivers/net/wireless/intel/iwlwifi/iwl-drv.c src = ucode->u.v1.data; v1 91 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c struct iwl_proto_offload_cmd_v1 v1; v1 200 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c BUILD_BUG_ON(sizeof(cmd.v1.target_ipv6_addr[0]) != v1 209 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c memcpy(cmd.v1.target_ipv6_addr[i], v1 211 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c sizeof(cmd.v1.target_ipv6_addr[i])); v1 218 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c memcpy(cmd.v1.ndp_mac_addr, vif->addr, ETH_ALEN); v1 235 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c common = &cmd.v1.common; v1 236 drivers/net/wireless/intel/iwlwifi/mvm/offloading.c size = sizeof(cmd.v1); v1 1584 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c rate_n_flags = le32_to_cpu(desc->v1.rate_n_flags); v1 1585 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c channel = desc->v1.channel; v1 1586 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c gp2_on_air_rise = le32_to_cpu(desc->v1.gp2_on_air_rise); v1 1587 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c energy_a = desc->v1.energy_a; v1 1588 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c energy_b = desc->v1.energy_b; v1 1591 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c phy_data.d0 = desc->v1.phy_data0; v1 1592 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c phy_data.d1 = desc->v1.phy_data1; v1 1593 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c phy_data.d2 = desc->v1.phy_data2; v1 1594 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c phy_data.d3 = desc->v1.phy_data3; v1 1676 drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c tsf_on_air_rise = le64_to_cpu(desc->v1.tsf_on_air_rise); v1 159 drivers/net/wireless/intel/iwlwifi/mvm/scan.c return (void *)&cmd->v1.data; v1 176 drivers/net/wireless/intel/iwlwifi/mvm/scan.c return &cmd->v1.channel; v1 1379 drivers/net/wireless/intel/iwlwifi/mvm/scan.c cmd->v1.extended_dwell = params->measurement_dwell ? v1 1381 drivers/net/wireless/intel/iwlwifi/mvm/scan.c cmd->v1.active_dwell = active_dwell; v1 1382 drivers/net/wireless/intel/iwlwifi/mvm/scan.c cmd->v1.passive_dwell = passive_dwell; v1 1383 drivers/net/wireless/intel/iwlwifi/mvm/scan.c cmd->v1.fragmented_dwell = IWL_SCAN_DWELL_FRAGMENTED; v1 1402 drivers/net/wireless/intel/iwlwifi/mvm/scan.c cmd->v1.scan_priority = v1 1404 drivers/net/wireless/intel/iwlwifi/mvm/scan.c cmd->v1.max_out_time = v1 1406 drivers/net/wireless/intel/iwlwifi/mvm/scan.c cmd->v1.suspend_time = v1 1427 drivers/net/wireless/intel/iwlwifi/mvm/scan.c channel_cfg[i].v1.channel_num = channels[i]->hw_value; v1 1435 drivers/net/wireless/intel/iwlwifi/mvm/scan.c channel_cfg[i].v1.iter_count = 1; v1 1436 drivers/net/wireless/intel/iwlwifi/mvm/scan.c channel_cfg[i].v1.iter_interval = 0; v1 239 drivers/net/wireless/intersil/p54/fwio.c eeprom_hdr->v1.offset = cpu_to_le16(offset); v1 240 drivers/net/wireless/intersil/p54/fwio.c eeprom_hdr->v1.len = cpu_to_le16(len); v1 364 drivers/net/wireless/intersil/p54/fwio.c setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); v1 365 drivers/net/wireless/intersil/p54/fwio.c memset(setup->v1.rts_rates, 0, 8); v1 366 drivers/net/wireless/intersil/p54/fwio.c setup->v1.rx_addr = cpu_to_le32(priv->rx_end); v1 367 drivers/net/wireless/intersil/p54/fwio.c setup->v1.max_rx = cpu_to_le16(priv->rx_mtu); v1 368 drivers/net/wireless/intersil/p54/fwio.c setup->v1.rxhw = cpu_to_le16(priv->rxhw); v1 369 drivers/net/wireless/intersil/p54/fwio.c setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer); v1 370 drivers/net/wireless/intersil/p54/fwio.c setup->v1.unalloc0 = cpu_to_le16(0); v1 141 drivers/net/wireless/intersil/p54/lmac.h } __packed v1; v1 303 drivers/net/wireless/intersil/p54/lmac.h } __packed v1; v1 506 drivers/net/wireless/intersil/p54/txrx.c memcpy(priv->eeprom, eeprom->v1.data, v1 507 drivers/net/wireless/intersil/p54/txrx.c le16_to_cpu(eeprom->v1.len)); v1 51 drivers/net/wireless/mediatek/mt76/mt76x02_phy.c mt76x02_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4) v1 55 drivers/net/wireless/mediatek/mt76/mt76x02_phy.c val |= (v1 & (BIT(6) - 1)) << 0; v1 396 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c #define READ_NEXT_PAIR(v1, v2, i) \ v1 398 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c i += 2; v1 = array_table[i]; \ v1 405 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v1; v1 410 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v1 = array_table[i]; v1 412 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c if (v1 < 0xcdcdcdcd) { v1 413 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_bb_reg(hw, v1, v2); v1 421 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 425 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 430 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 434 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_bb_reg(hw, v1, v2); v1 435 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 439 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 449 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v1; v1 454 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v1 = array_table[i]; v1 456 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c if (v1 < 0xCDCDCDCD) { v1 468 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 472 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 477 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 485 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 489 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 652 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v1 = 0, v2 = 0, v3 = 0; v1 659 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v1 = phy_reg_page[i]; v1 663 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c if (v1 < 0xcdcdcdcd) { v1 690 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v1 = phy_reg_page[i]; v1 696 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v1 = phy_reg_page[i]; v1 710 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c #define READ_NEXT_RF_PAIR(v1, v2, i) \ v1 713 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v1 = radioa_array_table[i]; \ v1 722 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c u32 v1, v2; v1 726 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c v1 = radioa_array_table[i]; v1 728 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c if (v1 < 0xcdcdcdcd) { v1 729 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_rf_radio_a(hw, v1, v2); v1 737 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 742 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 748 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 753 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c _rtl8188e_config_rf_radio_a(hw, v1, v2); v1 754 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 759 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 675 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c #define READ_NEXT_PAIR(v1, v2, i) \ v1 678 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1 = array[i]; \ v1 689 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 v1 = 0, v2 = 0; v1 696 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1 = array[i]; v1 698 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c if (v1 < 0xcdcdcdcd) { v1 699 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_config_bb_reg(hw, v1, v2); v1 707 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 711 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 718 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 722 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_config_bb_reg(hw, v1, v1 724 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 728 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 737 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1 = array[i]; v1 739 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c if (v1 < 0xCDCDCDCD) { v1 751 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 756 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 763 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1, v2, i); v1 773 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1 , v2 , i); v1 778 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_PAIR(v1 , v2 , i); v1 873 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; v1 880 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1 = phy_regarray_table_pg[i]; v1 887 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c if (v1 < 0xcdcdcdcd) { v1 888 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_store_tx_power_by_rate(hw, v1, v2, v3, v1 900 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c #define READ_NEXT_RF_PAIR(v1, v2, i) \ v1 903 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1 = array[i]; \ v1 914 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c u32 v1 = 0, v2 = 0; v1 924 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1 = array[i]; v1 926 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c if (v1 < 0xcdcdcdcd) { v1 927 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_config_rf_radio_a(hw, v1, v2); v1 936 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 940 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 947 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 952 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1, v1 954 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 958 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 971 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1 = array[i]; v1 973 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c if (v1 < 0xcdcdcdcd) { v1 974 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c _rtl92ee_config_rf_radio_b(hw, v1, v2); v1 983 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 987 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 994 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 999 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c v1, v1 1001 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 1005 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c READ_NEXT_RF_PAIR(v1, v2, i); v1 551 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c u32 v1 = array_table[i]; v1 554 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ v1 555 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c if (v1 & BIT(31)) {/* positive condition*/ v1 556 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); v1 567 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c hw, v1, v2)) { v1 576 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c } else if (v1 & BIT(30)) { /*negative condition*/ v1 581 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c set_reg(hw, v1, v2); v1 714 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; v1 721 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c v1 = phy_regarray_table_pg[i]; v1 728 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c if (v1 < 0xcdcdcdcd) { v1 734 drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c v1, v2, v3, v4, v5, v6); v1 18 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c #define READ_NEXT_PAIR(array_table, v1, v2, i) \ v1 21 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v1 = array_table[i]; \ v1 1863 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c u32 v1 = array_table[i]; v1 1866 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ v1 1867 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c if (v1 & BIT(31)) {/* positive condition*/ v1 1868 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); v1 1879 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c hw, v1, v2)) { v1 1888 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c } else if (v1 & BIT(30)) { /*negative condition*/ v1 1893 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c set_reg(hw, v1, v2); v1 2009 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c u32 v1, v2, v3, v4, v5, v6; v1 2025 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v1 = array[i]; v1 2032 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c if (v1 < 0xCDCDCDCD) { v1 2053 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c _rtl8821ae_store_tx_power_by_rate(hw, v1, v2, v3, v1 2058 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c if (!_rtl8821ae_check_condition(hw, v1)) { v1 2060 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v1 = array[i]; v1 2065 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c v1 = array[i]; v1 149 drivers/net/wireless/realtek/rtw88/rtw8822c.c static void swap_u32(u32 *v1, u32 *v2) v1 153 drivers/net/wireless/realtek/rtw88/rtw8822c.c tmp = *v1; v1 154 drivers/net/wireless/realtek/rtw88/rtw8822c.c *v1 = *v2; v1 158 drivers/net/wireless/realtek/rtw88/rtw8822c.c static void __rtw8822c_dac_iq_sort(struct rtw_dev *rtwdev, u32 *v1, u32 *v2) v1 160 drivers/net/wireless/realtek/rtw88/rtw8822c.c if (*v1 >= 0x200 && *v2 >= 0x200) { v1 161 drivers/net/wireless/realtek/rtw88/rtw8822c.c if (*v1 > *v2) v1 162 drivers/net/wireless/realtek/rtw88/rtw8822c.c swap_u32(v1, v2); v1 163 drivers/net/wireless/realtek/rtw88/rtw8822c.c } else if (*v1 < 0x200 && *v2 < 0x200) { v1 164 drivers/net/wireless/realtek/rtw88/rtw8822c.c if (*v1 > *v2) v1 165 drivers/net/wireless/realtek/rtw88/rtw8822c.c swap_u32(v1, v2); v1 166 drivers/net/wireless/realtek/rtw88/rtw8822c.c } else if (*v1 < 0x200 && *v2 >= 0x200) { v1 167 drivers/net/wireless/realtek/rtw88/rtw8822c.c swap_u32(v1, v2); v1 1365 drivers/pci/controller/pci-hyperv.c struct pci_create_interrupt v1; v1 1399 drivers/pci/controller/pci-hyperv.c size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1, v1 3610 drivers/platform/x86/sony-laptop.c u8 v1, v2; v1 3615 drivers/platform/x86/sony-laptop.c v1 = inb_p(spic_dev.cur_ioport->io1.minimum + 4); v1 3617 drivers/platform/x86/sony-laptop.c dprintk("sony_pic_call1(0x%.2x): 0x%.4x\n", dev, (v2 << 8) | v1); v1 3623 drivers/platform/x86/sony-laptop.c u8 v1; v1 3631 drivers/platform/x86/sony-laptop.c v1 = inb_p(spic_dev.cur_ioport->io1.minimum); v1 3632 drivers/platform/x86/sony-laptop.c dprintk("sony_pic_call2(0x%.2x - 0x%.2x): 0x%.4x\n", dev, fn, v1); v1 3633 drivers/platform/x86/sony-laptop.c return v1; v1 3638 drivers/platform/x86/sony-laptop.c u8 v1; v1 3646 drivers/platform/x86/sony-laptop.c v1 = inb_p(spic_dev.cur_ioport->io1.minimum); v1 3648 drivers/platform/x86/sony-laptop.c dev, fn, v, v1); v1 3649 drivers/platform/x86/sony-laptop.c return v1; v1 249 drivers/staging/comedi/drivers/jr3_pci.c val = get_s16(&spriv->sensor->filter[filter].v1); v1 540 drivers/staging/comedi/drivers/jr3_pci.c r[6].l.range[0].min = -get_s16(&fs->v1) * 100; v1 541 drivers/staging/comedi/drivers/jr3_pci.c r[6].l.range[0].max = get_s16(&fs->v1) * 100; v1 64 drivers/staging/comedi/drivers/jr3_pci.h s32 v1; v1 152 drivers/staging/rtl8188eu/hal/bb_cfg.c u32 v1 = array[i]; v1 155 drivers/staging/rtl8188eu/hal/bb_cfg.c if (v1 < 0xCDCDCDCD) { v1 156 drivers/staging/rtl8188eu/hal/bb_cfg.c phy_set_bb_reg(adapt, v1, bMaskDWord, v2); v1 387 drivers/staging/rtl8188eu/hal/bb_cfg.c u32 v1 = array[i]; v1 390 drivers/staging/rtl8188eu/hal/bb_cfg.c if (v1 < 0xCDCDCDCD) v1 391 drivers/staging/rtl8188eu/hal/bb_cfg.c rtl_bb_delay(adapt, v1, v2); v1 567 drivers/staging/rtl8188eu/hal/bb_cfg.c u32 v1 = array[i]; v1 571 drivers/staging/rtl8188eu/hal/bb_cfg.c if (v1 < 0xCDCDCDCD) v1 572 drivers/staging/rtl8188eu/hal/bb_cfg.c rtl_addr_delay(adapt, v1, v2, v3); v1 143 drivers/staging/rtl8188eu/hal/rf_cfg.c #define READ_NEXT_PAIR(v1, v2, i) \ v1 145 drivers/staging/rtl8188eu/hal/rf_cfg.c i += 2; v1 = array[i]; \ v1 192 drivers/staging/rtl8188eu/hal/rf_cfg.c u32 v1 = array[i]; v1 195 drivers/staging/rtl8188eu/hal/rf_cfg.c if (v1 < 0xCDCDCDCD) { v1 196 drivers/staging/rtl8188eu/hal/rf_cfg.c rtl8188e_config_rf_reg(adapt, v1, v2); v1 200 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v1 203 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v1 206 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v1 209 drivers/staging/rtl8188eu/hal/rf_cfg.c rtl8188e_config_rf_reg(adapt, v1, v2); v1 210 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v1 214 drivers/staging/rtl8188eu/hal/rf_cfg.c READ_NEXT_PAIR(v1, v2, i); v1 274 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u32 v1 = Array[i]; v1 278 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c if (v1 < 0x40000000) { v1 279 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); v1 284 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u8 cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 288 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 289 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v1 291 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 292 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 294 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 295 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c if (!CheckNegative(pDM_Odm, v1, v2)) v1 299 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 306 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c while (v1 < 0x40000000 && i < ArrayLen-2) v1 307 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 312 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c while (v1 < 0x40000000 && i < ArrayLen-2) { v1 313 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); v1 314 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 318 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 320 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 321 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 543 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u32 v1 = Array[i]; v1 547 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c if (v1 < 0x40000000) { v1 548 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); v1 553 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u8 cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 557 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 558 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v1 560 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 561 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 563 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 564 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c if (!CheckNegative(pDM_Odm, v1, v2)) v1 568 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 575 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c while (v1 < 0x40000000 && i < ArrayLen-2) v1 576 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 580 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c while (v1 < 0x40000000 && i < ArrayLen-2) { v1 581 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); v1 582 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 586 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 588 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c READ_NEXT_PAIR(v1, v2, i); v1 589 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 625 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c u32 v1 = Array[i]; v1 632 drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c odm_ConfigBB_PHY_REG_PG_8723B(pDM_Odm, v1, v2, v3, v4, v5, v6); v1 245 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c u32 v1 = Array[i]; v1 249 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c if (v1 < 0x40000000) { v1 250 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); v1 255 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c u8 cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 259 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 260 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v1 262 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 263 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 265 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 266 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c if (!CheckNegative(pDM_Odm, v1, v2)) v1 270 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 275 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c while (v1 < 0x40000000 && i < ArrayLen-2) v1 276 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 280 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c while (v1 < 0x40000000 && i < ArrayLen-2) { v1 281 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); v1 282 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 286 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 288 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c READ_NEXT_PAIR(v1, v2, i); v1 289 drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 276 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c u32 v1 = Array[i]; v1 280 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c if (v1 < 0x40000000) { v1 281 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); v1 286 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c u8 cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 290 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 291 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c } else if (!CheckPositive(pDM_Odm, v1, v2)) { v1 293 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 294 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 296 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 297 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c if (!CheckNegative(pDM_Odm, v1, v2)) v1 301 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 308 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c while (v1 < 0x40000000 && i < ArrayLen-2) v1 309 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 314 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c while (v1 < 0x40000000 && i < ArrayLen-2) { v1 315 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); v1 316 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 320 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 322 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c READ_NEXT_PAIR(v1, v2, i); v1 323 drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c cCond = (u8)((v1 & (BIT29|BIT28)) >> 28); v1 1704 drivers/staging/rtl8723bs/hal/hal_com.c u32 v1 = 0, v2 = 0, target = 0; v1 1716 drivers/staging/rtl8723bs/hal/hal_com.c v1 = Array[i]; v1 1718 drivers/staging/rtl8723bs/hal/hal_com.c if (v1 == padapter->eeprompriv.EEPROMRFGainVal) { v1 1719 drivers/staging/rtl8723bs/hal/hal_com.c DBG_871X("Offset RF Gain. got v1 = 0x%x , v2 = 0x%x\n", v1, v2); v1 90 drivers/staging/rtl8723bs/hal/odm_types.h #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) v1 148 drivers/video/console/vgacon.c unsigned int v1, v2; v1 156 drivers/video/console/vgacon.c v1 = reg + (val & 0xff00); v1 158 drivers/video/console/vgacon.c outw(v1, vga_video_port_reg); v1 106 drivers/video/fbdev/atafb_iplan2p2.c u32 pval[4], v, v1, mask; v1 134 drivers/video/fbdev/atafb_iplan2p2.c v1 = v & mask; v1 135 drivers/video/fbdev/atafb_iplan2p2.c *dst32++ = pval[0] | (v1 >> 8); v1 136 drivers/video/fbdev/atafb_iplan2p2.c pval[0] = (v ^ v1) << 8; v1 148 drivers/video/fbdev/atafb_iplan2p2.c u32 pval[4], v, v1, mask; v1 176 drivers/video/fbdev/atafb_iplan2p2.c v1 = v & mask; v1 177 drivers/video/fbdev/atafb_iplan2p2.c *--dst32 = pval[0] | (v1 << 8); v1 178 drivers/video/fbdev/atafb_iplan2p2.c pval[0] = (v ^ v1) >> 8; v1 106 drivers/video/fbdev/atafb_iplan2p4.c u32 pval[4], v, v1, mask; v1 136 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v1 137 drivers/video/fbdev/atafb_iplan2p4.c *dst32++ = pval[0] | (v1 >> 8); v1 138 drivers/video/fbdev/atafb_iplan2p4.c pval[0] = (v ^ v1) << 8; v1 140 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v1 141 drivers/video/fbdev/atafb_iplan2p4.c *dst32++ = pval[1] | (v1 >> 8); v1 142 drivers/video/fbdev/atafb_iplan2p4.c pval[1] = (v ^ v1) << 8; v1 155 drivers/video/fbdev/atafb_iplan2p4.c u32 pval[4], v, v1, mask; v1 185 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v1 186 drivers/video/fbdev/atafb_iplan2p4.c *--dst32 = pval[0] | (v1 << 8); v1 187 drivers/video/fbdev/atafb_iplan2p4.c pval[0] = (v ^ v1) >> 8; v1 189 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v1 190 drivers/video/fbdev/atafb_iplan2p4.c *--dst32 = pval[1] | (v1 << 8); v1 191 drivers/video/fbdev/atafb_iplan2p4.c pval[1] = (v ^ v1) >> 8; v1 113 drivers/video/fbdev/atafb_iplan2p8.c u32 pval[4], v, v1, mask; v1 147 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 148 drivers/video/fbdev/atafb_iplan2p8.c *dst32++ = pval[0] | (v1 >> 8); v1 149 drivers/video/fbdev/atafb_iplan2p8.c pval[0] = (v ^ v1) << 8; v1 151 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 152 drivers/video/fbdev/atafb_iplan2p8.c *dst32++ = pval[1] | (v1 >> 8); v1 153 drivers/video/fbdev/atafb_iplan2p8.c pval[1] = (v ^ v1) << 8; v1 155 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 156 drivers/video/fbdev/atafb_iplan2p8.c *dst32++ = pval[2] | (v1 >> 8); v1 157 drivers/video/fbdev/atafb_iplan2p8.c pval[2] = (v ^ v1) << 8; v1 159 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 160 drivers/video/fbdev/atafb_iplan2p8.c *dst32++ = pval[3] | (v1 >> 8); v1 161 drivers/video/fbdev/atafb_iplan2p8.c pval[3] = (v ^ v1) << 8; v1 176 drivers/video/fbdev/atafb_iplan2p8.c u32 pval[4], v, v1, mask; v1 210 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 211 drivers/video/fbdev/atafb_iplan2p8.c *--dst32 = pval[0] | (v1 << 8); v1 212 drivers/video/fbdev/atafb_iplan2p8.c pval[0] = (v ^ v1) >> 8; v1 214 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 215 drivers/video/fbdev/atafb_iplan2p8.c *--dst32 = pval[1] | (v1 << 8); v1 216 drivers/video/fbdev/atafb_iplan2p8.c pval[1] = (v ^ v1) >> 8; v1 218 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 219 drivers/video/fbdev/atafb_iplan2p8.c *--dst32 = pval[2] | (v1 << 8); v1 220 drivers/video/fbdev/atafb_iplan2p8.c pval[2] = (v ^ v1) >> 8; v1 222 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v1 223 drivers/video/fbdev/atafb_iplan2p8.c *--dst32 = pval[3] | (v1 << 8); v1 224 drivers/video/fbdev/atafb_iplan2p8.c pval[3] = (v ^ v1) >> 8; v1 306 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_CKEY_V1(v1) ((v1)<<16) v1 911 drivers/video/fbdev/ps3fb.c u64 v1; v1 915 drivers/video/fbdev/ps3fb.c status = lv1_gpu_context_intr(ps3fb.context_handle, &v1); v1 922 drivers/video/fbdev/ps3fb.c if (v1 & (1 << GPU_INTR_STATUS_VSYNC_1)) { v1 133 drivers/video/fbdev/pxa168fb.h #define CFG_CKEY_V1(v1) ((v1) << 16) v1 4351 drivers/video/fbdev/sis/sis_main.c u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; v1 4371 drivers/video/fbdev/sis/sis_main.c v1 = 0x44; v2 = 0x42; v1 4374 drivers/video/fbdev/sis/sis_main.c v1 = 0x68; v2 = 0x43; /* Assume 125Mhz MCLK */ v1 4379 drivers/video/fbdev/sis/sis_main.c v1 = bios[rindex++]; v1 4388 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x28, v1); v1 4395 drivers/video/fbdev/sis/sis_main.c v1 = 0x10; v1 4397 drivers/video/fbdev/sis/sis_main.c v1 = bios[0xa4]; v1 4398 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x07, v1); /* DAC speed */ v1 4402 drivers/video/fbdev/sis/sis_main.c v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a; v1 4406 drivers/video/fbdev/sis/sis_main.c v1 = bios[memtype]; v1 4417 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x15, v1); /* Ram type (assuming 0, BIOS 0xa5 step 8) */ v1 4432 drivers/video/fbdev/sis/sis_main.c v1 = 0x04; /* DAC pedestal (BIOS 0xe5) */ v1 4434 drivers/video/fbdev/sis/sis_main.c v1 |= 0x01; v1 4435 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x1f, v1); v1 4437 drivers/video/fbdev/sis/sis_main.c v1 = 0xf6; v2 = 0x0d; v3 = 0x00; v1 4439 drivers/video/fbdev/sis/sis_main.c v1 = bios[0xe8]; v1 4443 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x23, v1); v1 4451 drivers/video/fbdev/sis/sis_main.c v1 = 0x40; v2 = 0x11; v1 4453 drivers/video/fbdev/sis/sis_main.c v1 = bios[0xec]; v1 4456 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISPART1, 0x02, v1); v1 4517 drivers/video/fbdev/sis/sis_main.c v1 = bios[0xe6]; v1 4522 drivers/video/fbdev/sis/sis_main.c v1 = 0x04; /* PCI */ v1 4525 drivers/video/fbdev/sis/sis_main.c v1 = 0x14; /* AGP */ v1 4529 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x21, v1); v1 4885 drivers/video/fbdev/sis/sis_main.c u8 v1, v2, v3; v1 4911 drivers/video/fbdev/sis/sis_main.c v1 = cs90[index]; v2 = cs90[index + 1]; v3 = cs90[index + 2]; v1 4913 drivers/video/fbdev/sis/sis_main.c v1 = ivideo->bios_abase[0x90 + index]; v1 4917 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x28, v1); v1 4924 drivers/video/fbdev/sis/sis_main.c v1 = csb8[index]; v2 = csb8[index + 1]; v3 = csb8[index + 2]; v1 4926 drivers/video/fbdev/sis/sis_main.c v1 = ivideo->bios_abase[0xb8 + index]; v1 4930 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x2e, v1); v1 4942 drivers/video/fbdev/sis/sis_main.c u8 v1; v1 4968 drivers/video/fbdev/sis/sis_main.c v1 = 0x31; v1 4970 drivers/video/fbdev/sis/sis_main.c v1 = bios[0xf0]; v1 4972 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x18, v1); v1 5033 drivers/video/fbdev/sis/sis_main.c u8 v1; v1 5043 drivers/video/fbdev/sis/sis_main.c v1 = cs168[regb]; v2 = cs160[regb]; v3 = cs158[regb]; v1 5045 drivers/video/fbdev/sis/sis_main.c v1 = bios[regb + 0x168]; v1 5049 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x86, v1); v1 5070 drivers/video/fbdev/sis/sis_main.c u8 v1; v1 5072 drivers/video/fbdev/sis/sis_main.c ramtype = 0x00; v1 = 0x10; v1 5075 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x1d2]; v1 5085 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x97, v1); v1 5110 drivers/video/fbdev/sis/sis_main.c u8 v1, v2, v3, v4, v5, reg, ramtype; v1 5211 drivers/video/fbdev/sis/sis_main.c v1 = 0x18; v2 = 0x00; v1 5213 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x74]; v1 5216 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x07, v1); v1 5285 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x77]; v1 5301 drivers/video/fbdev/sis/sis_main.c v1 &= 0xfe; v1 5312 drivers/video/fbdev/sis/sis_main.c v1 &= 0xfe; v1 5315 drivers/video/fbdev/sis/sis_main.c v1 &= 0xfe; v1 5327 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x22, v1); v1 5330 drivers/video/fbdev/sis/sis_main.c v1 = SiS_GetReg(SISSR, 0x3b); v1 5333 drivers/video/fbdev/sis/sis_main.c if( (!(v1 & 0x02)) && (v2 & 0x30) && (regd < 0xcf) ) v1 5346 drivers/video/fbdev/sis/sis_main.c v1 = 0x30; v1 5350 drivers/video/fbdev/sis/sis_main.c v1 |= 0x08; v1 5351 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x27, v1); v1 5357 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x4f7]; v1 5361 drivers/video/fbdev/sis/sis_main.c v1 &= 0xfc; v1 5364 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x48, v1); v1 5377 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x501]; v1 5379 drivers/video/fbdev/sis/sis_main.c v1 = 0xf0; v1 5382 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x77, v1); v1 5403 drivers/video/fbdev/sis/sis_main.c v1 = 0xff; v1 5405 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x140 + regb]; v1 5407 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x6d, v1); v1 5503 drivers/video/fbdev/sis/sis_main.c v1 = 0xb5; v2 = 0x20; v3 = 0xf0; v4 = 0x13; v1 5505 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x118 + regb]; v1 5510 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x45, v1 & 0x0f); v1 5511 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x99, (v1 >> 4) & 0x07); v1 5512 drivers/video/fbdev/sis/sis_main.c SiS_SetRegOR(SISCR, 0x40, v1 & 0x80); v1 5570 drivers/video/fbdev/sis/sis_main.c v1 = cs158[regb]; v2 = cs160[regb]; v3 = cs168[regb]; v1 5572 drivers/video/fbdev/sis/sis_main.c v1 = bios[regb + 0x158]; v1 5576 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x82, v1); v1 5626 drivers/video/fbdev/sis/sis_main.c v1 = 0x31; v2 = 0x03; v3 = 0x83; v4 = 0x03; v5 = 0x83; v1 5628 drivers/video/fbdev/sis/sis_main.c v1 = bios[0xf0]; v1 5635 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x18, v1); v1 5642 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x18, v1); v1 5669 drivers/video/fbdev/sis/sis_main.c v1 = cs160[regb]; v2 = cs158[regb]; v1 5671 drivers/video/fbdev/sis/sis_main.c v1 = bios[regb + 0x160]; v1 5674 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISCR, 0x85, v1); v1 5705 drivers/video/fbdev/sis/sis_main.c v1 = 0x31; v1 5707 drivers/video/fbdev/sis/sis_main.c v1 = bios[0xf0]; v1 5709 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x18, v1); v1 5725 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x18, v1); v1 5738 drivers/video/fbdev/sis/sis_main.c v1 = 0x03; v1 5740 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x110 + regb]; v1 5742 drivers/video/fbdev/sis/sis_main.c SiS_SetReg(SISSR, 0x1b, v1); v1 5745 drivers/video/fbdev/sis/sis_main.c v1 = 0x00; v2 = 0x00; v1 5747 drivers/video/fbdev/sis/sis_main.c v1 = bios[0x62]; v1 5752 drivers/video/fbdev/sis/sis_main.c if((v1 & 0x40) && (v2 & regd) && ivideo->haveXGIROM) { v1 5829 drivers/video/fbdev/sis/sis_main.c v1 = SiS_GetReg(SISCR, 0xcc); v1 5830 drivers/video/fbdev/sis/sis_main.c if((reg & 0x10) && (!(v1 & 0x04))) { v1 307 drivers/video/fbdev/tridentfb.c int v1 = (pitch >> 3) << 20; v1 309 drivers/video/fbdev/tridentfb.c int v2 = v1 | (tmp << 29); v1 315 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21D0, v1); v1 316 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21D4, v1); v1 317 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21C8, v1); v1 318 drivers/video/fbdev/tridentfb.c writemmr(par, 0x21CC, v1); v1 382 drivers/video/fbdev/tridentfb.c int v1 = pitch << (bpp == 24 ? 20 : (18 + x)); v1 404 drivers/video/fbdev/tridentfb.c writemmr(par, 0x2154, v1); v1 405 drivers/video/fbdev/tridentfb.c writemmr(par, 0x2150, v1); v1 84 drivers/xen/grant-table.c struct grant_entry_v1 *v1; v1 247 drivers/xen/grant-table.c gnttab_shared.v1[ref].domid = domid; v1 248 drivers/xen/grant-table.c gnttab_shared.v1[ref].frame = frame; v1 250 drivers/xen/grant-table.c gnttab_shared.v1[ref].flags = flags; v1 290 drivers/xen/grant-table.c return gnttab_shared.v1[ref].flags & (GTF_reading|GTF_writing); v1 309 drivers/xen/grant-table.c pflags = &gnttab_shared.v1[ref].flags; v1 478 drivers/xen/grant-table.c pflags = &gnttab_shared.v1[ref].flags; v1 497 drivers/xen/grant-table.c frame = gnttab_shared.v1[ref].frame; v1 93 fs/adfs/super.c unsigned int v0, v1, v2, v3; v1 96 fs/adfs/super.c v0 = v1 = v2 = v3 = 0; v1 100 fs/adfs/super.c v1 += map[i + 1] + (v0 >> 8); v1 102 fs/adfs/super.c v2 += map[i + 2] + (v1 >> 8); v1 103 fs/adfs/super.c v1 &= 0xff; v1 108 fs/adfs/super.c v1 += map[1] + (v0 >> 8); v1 109 fs/adfs/super.c v2 += map[2] + (v1 >> 8); v1 112 fs/adfs/super.c return v0 ^ v1 ^ v2 ^ v3; v1 3943 fs/btrfs/volumes.c #define CHECK_APPEND_1ARG(a, v1) \ v1 3945 fs/btrfs/volumes.c ret = snprintf(bp, size_bp, (a), (v1)); \ v1 3952 fs/btrfs/volumes.c #define CHECK_APPEND_2ARG(a, v1, v2) \ v1 3954 fs/btrfs/volumes.c ret = snprintf(bp, size_bp, (a), (v1), (v2)); \ v1 4031 fs/btrfs/volumes.c #define CHECK_APPEND_1ARG(a, v1) \ v1 4033 fs/btrfs/volumes.c ret = snprintf(bp, size_bp, (a), (v1)); \ v1 3336 fs/ceph/mds_client.c struct ceph_mds_cap_reconnect_v1 v1; v1 3363 fs/ceph/mds_client.c rec.v1.cap_id = cpu_to_le64(cap->cap_id); v1 3364 fs/ceph/mds_client.c rec.v1.wanted = cpu_to_le32(__ceph_caps_wanted(ci)); v1 3365 fs/ceph/mds_client.c rec.v1.issued = cpu_to_le32(cap->issued); v1 3366 fs/ceph/mds_client.c rec.v1.size = cpu_to_le64(inode->i_size); v1 3367 fs/ceph/mds_client.c ceph_encode_timespec64(&rec.v1.mtime, &inode->i_mtime); v1 3368 fs/ceph/mds_client.c ceph_encode_timespec64(&rec.v1.atime, &inode->i_atime); v1 3369 fs/ceph/mds_client.c rec.v1.snaprealm = cpu_to_le64(ci->i_snap_realm->ino); v1 3370 fs/ceph/mds_client.c rec.v1.pathbase = 0; v1 3479 fs/ceph/mds_client.c rec.v1.pathbase = cpu_to_le64(pathbase); v1 3484 fs/ceph/mds_client.c pathlen + sizeof(rec.v1)); v1 3491 fs/ceph/mds_client.c ceph_pagelist_append(pagelist, &rec, sizeof(rec.v1)); v1 3572 fs/cifs/smb2pdu.c struct smbd_buffer_descriptor_v1 *v1; v1 3590 fs/cifs/smb2pdu.c v1 = (struct smbd_buffer_descriptor_v1 *) &req->Buffer[0]; v1 3591 fs/cifs/smb2pdu.c v1->offset = cpu_to_le64(rdata->mr->mr->iova); v1 3592 fs/cifs/smb2pdu.c v1->token = cpu_to_le32(rdata->mr->mr->rkey); v1 3593 fs/cifs/smb2pdu.c v1->length = cpu_to_le32(rdata->mr->mr->length); v1 3595 fs/cifs/smb2pdu.c *total_len += sizeof(*v1) - 1; v1 3981 fs/cifs/smb2pdu.c struct smbd_buffer_descriptor_v1 *v1; v1 4009 fs/cifs/smb2pdu.c v1 = (struct smbd_buffer_descriptor_v1 *) &req->Buffer[0]; v1 4010 fs/cifs/smb2pdu.c v1->offset = cpu_to_le64(wdata->mr->mr->iova); v1 4011 fs/cifs/smb2pdu.c v1->token = cpu_to_le32(wdata->mr->mr->rkey); v1 4012 fs/cifs/smb2pdu.c v1->length = cpu_to_le32(wdata->mr->mr->length); v1 57 fs/crypto/fscrypt_private.h struct fscrypt_context_v1 v1; v1 69 fs/crypto/fscrypt_private.h BUILD_BUG_ON(sizeof(ctx->v1) != 28); v1 70 fs/crypto/fscrypt_private.h return sizeof(ctx->v1); v1 81 fs/crypto/fscrypt_private.h struct fscrypt_policy_v1 v1; v1 93 fs/crypto/fscrypt_private.h return sizeof(policy->v1); v1 106 fs/crypto/fscrypt_private.h return policy->v1.contents_encryption_mode; v1 119 fs/crypto/fscrypt_private.h return policy->v1.filenames_encryption_mode; v1 132 fs/crypto/fscrypt_private.h return policy->v1.flags; v1 306 fs/crypto/keysetup.c ci->ci_policy.v1.master_key_descriptor, v1 448 fs/crypto/keysetup.c ctx.v1.contents_encryption_mode = FSCRYPT_MODE_AES_256_XTS; v1 449 fs/crypto/keysetup.c ctx.v1.filenames_encryption_mode = FSCRYPT_MODE_AES_256_CTS; v1 450 fs/crypto/keysetup.c memset(ctx.v1.master_key_descriptor, 0x42, v1 452 fs/crypto/keysetup.c res = sizeof(ctx.v1); v1 470 fs/crypto/keysetup.c memcpy(crypt_info->ci_nonce, ctx.v1.nonce, v1 192 fs/crypto/keysetup_v1.c memcpy(&hash_key, ci->ci_policy.v1.master_key_descriptor, v1 197 fs/crypto/keysetup_v1.c if (memcmp(ci->ci_policy.v1.master_key_descriptor, v1 241 fs/crypto/keysetup_v1.c memcpy(dk->dk_descriptor, ci->ci_policy.v1.master_key_descriptor, v1 266 fs/crypto/keysetup_v1.c if (ci->ci_policy.v1.contents_encryption_mode != v1 267 fs/crypto/keysetup_v1.c ci->ci_policy.v1.filenames_encryption_mode) { v1 313 fs/crypto/keysetup_v1.c if (ci->ci_policy.v1.flags & FSCRYPT_POLICY_FLAG_DIRECT_KEY) v1 326 fs/crypto/keysetup_v1.c ci->ci_policy.v1.master_key_descriptor, v1 330 fs/crypto/keysetup_v1.c ci->ci_policy.v1.master_key_descriptor, v1 47 fs/crypto/policy.c const struct fscrypt_policy_v1 *policy = &policy_u->v1; v1 114 fs/crypto/policy.c const struct fscrypt_policy_v1 *policy = &policy_u->v1; v1 115 fs/crypto/policy.c struct fscrypt_context_v1 *ctx = &ctx_u->v1; v1 171 fs/crypto/policy.c const struct fscrypt_context_v1 *ctx = &ctx_u->v1; v1 172 fs/crypto/policy.c struct fscrypt_policy_v1 *policy = &policy_u->v1; v1 351 fs/crypto/policy.c if (copy_to_user(arg, &policy, sizeof(policy.v1))) v1 345 fs/fuse/file.c u32 v1 = v >> 32; v1 350 fs/fuse/file.c v0 += ((v1 << 4 ^ v1 >> 5) + v1) ^ (sum + k[sum & 3]); v1 352 fs/fuse/file.c v1 += ((v0 << 4 ^ v0 >> 5) + v0) ^ (sum + k[sum>>11 & 3]); v1 355 fs/fuse/file.c return (u64) v0 + ((u64) v1 << 32); v1 203 fs/nfs/direct.c static int nfs_direct_cmp_verf(const struct nfs_writeverf *v1, v1 206 fs/nfs/direct.c return nfs_write_verifier_cmp(&v1->verifier, &v2->verifier); v1 539 fs/nfs/internal.h nfs_write_verifier_cmp(const struct nfs_write_verifier *v1, v1 542 fs/nfs/internal.h return memcmp(v1->data, v2->data, sizeof(v1->data)); v1 487 fs/nfs/nfs4client.c static bool nfs4_same_verifier(nfs4_verifier *v1, nfs4_verifier *v2) v1 489 fs/nfs/nfs4client.c return memcmp(v1->data, v2->data, sizeof(v1->data)) == 0; v1 2127 fs/nfsd/nfs4state.c same_verf(nfs4_verifier *v1, nfs4_verifier *v2) v1 2129 fs/nfsd/nfs4state.c return 0 == memcmp(v1->data, v2->data, sizeof(v1->data)); v1 876 fs/ntfs/layout.h } __attribute__ ((__packed__)) v1; v1 115 include/linux/fixp-arith.h s32 v1, v2, dx, dy; v1 127 include/linux/fixp-arith.h v1 = __fixp_sin32(degrees); v1 132 include/linux/fixp-arith.h dy = v2 - v1; v1 136 include/linux/fixp-arith.h return v1 + div_s64(tmp, dx); v1 149 include/linux/xxhash.h uint32_t v1; v1 162 include/linux/xxhash.h uint64_t v1; v1 24 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID1(v1, vh1) { \ v1 26 include/pcmcia/device_id.h .prod_id = { (v1), NULL, NULL, NULL }, \ v1 39 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ v1 42 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v1 45 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \ v1 48 include/pcmcia/device_id.h .prod_id = { (v1), NULL, (v3), NULL }, \ v1 51 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID14(v1, v4, vh1, vh4) { \ v1 54 include/pcmcia/device_id.h .prod_id = { (v1), NULL, NULL, (v4) }, \ v1 57 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ v1 61 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v1 64 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID124(v1, v2, v4, vh1, vh2, vh4) { \ v1 68 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, (v4) }, \ v1 71 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID134(v1, v3, v4, vh1, vh3, vh4) { \ v1 75 include/pcmcia/device_id.h .prod_id = { (v1), NULL, (v3), (v4) }, \ v1 78 include/pcmcia/device_id.h #define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \ v1 83 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), (v4) }, \ v1 86 include/pcmcia/device_id.h #define PCMCIA_DEVICE_MANF_CARD_PROD_ID1(manf, card, v1, vh1) { \ v1 92 include/pcmcia/device_id.h .prod_id = { (v1), NULL, NULL, NULL }, \ v1 115 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_PROD_ID1(mfc, v1, vh1) { \ v1 118 include/pcmcia/device_id.h .prod_id = { (v1), NULL, NULL, NULL }, \ v1 129 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_PROD_ID12(mfc, v1, v2, vh1, vh2) { \ v1 133 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v1 137 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_PROD_ID13(mfc, v1, v3, vh1, vh3) { \ v1 141 include/pcmcia/device_id.h .prod_id = { (v1), NULL, (v3), NULL }, \ v1 145 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_PROD_ID123(mfc, v1, v2, v3, vh1, vh2, vh3) { \ v1 150 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v1 164 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_PROD_ID1(mfc, v1, vh1) { \ v1 167 include/pcmcia/device_id.h .prod_id = { (v1), NULL, NULL, NULL }, \ v1 178 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_PROD_ID12(mfc, v1, v2, vh1, vh2) { \ v1 182 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v1 186 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_PROD_ID13(mfc, v1, v3, vh1, vh3) { \ v1 190 include/pcmcia/device_id.h .prod_id = { (v1), NULL, (v3), NULL }, \ v1 194 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_PROD_ID123(mfc, v1, v2, v3, vh1, vh2, vh3) { \ v1 199 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v1 213 include/pcmcia/device_id.h #define PCMCIA_DEVICE_CIS_PROD_ID12(v1, v2, vh1, vh2, _cisfile) { \ v1 217 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v1 221 include/pcmcia/device_id.h #define PCMCIA_DEVICE_CIS_PROD_ID123(v1, v2, v3, vh1, vh2, vh3, _cisfile) { \ v1 226 include/pcmcia/device_id.h .prod_id = { (v1), (v2), (v3), NULL },\ v1 238 include/pcmcia/device_id.h #define PCMCIA_PFC_DEVICE_CIS_PROD_ID12(mfc, v1, v2, vh1, vh2, _cisfile) { \ v1 243 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v1 258 include/pcmcia/device_id.h #define PCMCIA_MFC_DEVICE_CIS_PROD_ID12(mfc, v1, v2, vh1, vh2, _cisfile) { \ v1 263 include/pcmcia/device_id.h .prod_id = { (v1), (v2), NULL, NULL }, \ v1 79 include/uapi/linux/fscrypt.h struct fscrypt_policy_v1 v1; v1 28 include/uapi/linux/netfilter/xt_string.h } v1; v1 118 kernel/jump_label.c int v, v1; v1 135 kernel/jump_label.c for (v = atomic_read(&key->enabled); v > 0; v = v1) { v1 136 kernel/jump_label.c v1 = atomic_cmpxchg(&key->enabled, v, v + 1); v1 137 kernel/jump_label.c if (likely(v1 == v)) v1 50 kernel/kcmp.c static int kcmp_ptr(void *v1, void *v2, enum kcmp_type type) v1 54 kernel/kcmp.c t1 = kptr_obfuscate((long)v1, type); v1 107 lib/atomic64_test.c int v1 = 0xdeadbeef; v1 118 lib/atomic64_test.c TEST(, or, |=, v1); v1 119 lib/atomic64_test.c TEST(, and, &=, v1); v1 120 lib/atomic64_test.c TEST(, xor, ^=, v1); v1 121 lib/atomic64_test.c TEST(, andnot, &= ~, v1); v1 133 lib/atomic64_test.c FETCH_FAMILY_TEST(, fetch_or, |=, v1); v1 134 lib/atomic64_test.c FETCH_FAMILY_TEST(, fetch_and, &=, v1); v1 135 lib/atomic64_test.c FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1); v1 136 lib/atomic64_test.c FETCH_FAMILY_TEST(, fetch_xor, ^=, v1); v1 141 lib/atomic64_test.c XCHG_FAMILY_TEST(, v0, v1); v1 142 lib/atomic64_test.c CMPXCHG_FAMILY_TEST(, v0, v1, onestwos); v1 150 lib/atomic64_test.c long long v1 = 0xdeadbeefdeafcafeLL; v1 161 lib/atomic64_test.c atomic64_set(&v, v1); v1 162 lib/atomic64_test.c r = v1; v1 170 lib/atomic64_test.c TEST(64, or, |=, v1); v1 171 lib/atomic64_test.c TEST(64, and, &=, v1); v1 172 lib/atomic64_test.c TEST(64, xor, ^=, v1); v1 173 lib/atomic64_test.c TEST(64, andnot, &= ~, v1); v1 185 lib/atomic64_test.c FETCH_FAMILY_TEST(64, fetch_or, |=, v1); v1 186 lib/atomic64_test.c FETCH_FAMILY_TEST(64, fetch_and, &=, v1); v1 187 lib/atomic64_test.c FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1); v1 188 lib/atomic64_test.c FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1); v1 203 lib/atomic64_test.c XCHG_FAMILY_TEST(64, v0, v1); v1 204 lib/atomic64_test.c CMPXCHG_FAMILY_TEST(64, v0, v1, v2); v1 211 lib/atomic64_test.c BUG_ON(!atomic64_add_unless(&v, one, v1)); v1 23 lib/siphash.c v0 += v1; v1 = rol64(v1, 13); v1 ^= v0; v0 = rol64(v0, 32); \ v1 26 lib/siphash.c v2 += v1; v1 = rol64(v1, 17); v1 ^= v2; v2 = rol64(v2, 32); \ v1 31 lib/siphash.c u64 v1 = 0x646f72616e646f6dULL; \ v1 37 lib/siphash.c v1 ^= key->key[1]; \ v1 50 lib/siphash.c return (v0 ^ v1) ^ (v2 ^ v3); v1 251 lib/siphash.c return (v0 ^ v1) ^ (v2 ^ v3); v1 394 lib/siphash.c v0 += v1; v1 = rol32(v1, 5); v1 ^= v0; v0 = rol32(v0, 16); \ v1 397 lib/siphash.c v2 += v1; v1 = rol32(v1, 13); v1 ^= v2; v2 = rol32(v2, 16); \ v1 402 lib/siphash.c u32 v1 = 0; \ v1 408 lib/siphash.c v1 ^= key->key[1]; \ v1 419 lib/siphash.c return v1 ^ v3; v1 110 lib/xxhash.c uint32_t v1 = seed + PRIME32_1 + PRIME32_2; v1 116 lib/xxhash.c v1 = xxh32_round(v1, get_unaligned_le32(p)); v1 126 lib/xxhash.c h32 = xxh_rotl32(v1, 1) + xxh_rotl32(v2, 7) + v1 180 lib/xxhash.c uint64_t v1 = seed + PRIME64_1 + PRIME64_2; v1 186 lib/xxhash.c v1 = xxh64_round(v1, get_unaligned_le64(p)); v1 196 lib/xxhash.c h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + v1 198 lib/xxhash.c h64 = xxh64_merge_round(h64, v1); v1 248 lib/xxhash.c state.v1 = seed + PRIME32_1 + PRIME32_2; v1 262 lib/xxhash.c state.v1 = seed + PRIME64_1 + PRIME64_2; v1 293 lib/xxhash.c state->v1 = xxh32_round(state->v1, get_unaligned_le32(p32)); v1 308 lib/xxhash.c uint32_t v1 = state->v1; v1 314 lib/xxhash.c v1 = xxh32_round(v1, get_unaligned_le32(p)); v1 324 lib/xxhash.c state->v1 = v1; v1 347 lib/xxhash.c h32 = xxh_rotl32(state->v1, 1) + xxh_rotl32(state->v2, 7) + v1 399 lib/xxhash.c state->v1 = xxh64_round(state->v1, get_unaligned_le64(p64)); v1 413 lib/xxhash.c uint64_t v1 = state->v1; v1 419 lib/xxhash.c v1 = xxh64_round(v1, get_unaligned_le64(p)); v1 429 lib/xxhash.c state->v1 = v1; v1 452 lib/xxhash.c const uint64_t v1 = state->v1; v1 457 lib/xxhash.c h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + v1 459 lib/xxhash.c h64 = xxh64_merge_round(h64, v1); v1 29 net/netfilter/xt_string.c invert = conf->u.v1.flags & XT_STRING_FLAG_INVERT; v1 51 net/netfilter/xt_string.c if (conf->u.v1.flags & v1 54 net/netfilter/xt_string.c if (conf->u.v1.flags & XT_STRING_FLAG_IGNORECASE) v1 254 net/qrtr/qrtr.c const struct qrtr_hdr_v1 *v1; v1 276 net/qrtr/qrtr.c v1 = data; v1 277 net/qrtr/qrtr.c hdrlen = sizeof(*v1); v1 279 net/qrtr/qrtr.c cb->type = le32_to_cpu(v1->type); v1 280 net/qrtr/qrtr.c cb->src_node = le32_to_cpu(v1->src_node_id); v1 281 net/qrtr/qrtr.c cb->src_port = le32_to_cpu(v1->src_port_id); v1 282 net/qrtr/qrtr.c cb->confirm_rx = !!v1->confirm_rx; v1 283 net/qrtr/qrtr.c cb->dst_node = le32_to_cpu(v1->dst_node_id); v1 284 net/qrtr/qrtr.c cb->dst_port = le32_to_cpu(v1->dst_port_id); v1 286 net/qrtr/qrtr.c size = le32_to_cpu(v1->size); v1 694 net/rxrpc/key.c const struct rxrpc_key_data_v1 *v1; v1 730 net/rxrpc/key.c if (prep->datalen < sizeof(*v1)) v1 733 net/rxrpc/key.c v1 = prep->data; v1 734 net/rxrpc/key.c if (prep->datalen != sizeof(*v1) + v1->ticket_length) v1 737 net/rxrpc/key.c _debug("SCIX: %u", v1->security_index); v1 738 net/rxrpc/key.c _debug("TLEN: %u", v1->ticket_length); v1 739 net/rxrpc/key.c _debug("EXPY: %x", v1->expiry); v1 740 net/rxrpc/key.c _debug("KVNO: %u", v1->kvno); v1 742 net/rxrpc/key.c v1->session_key[0], v1->session_key[1], v1 743 net/rxrpc/key.c v1->session_key[2], v1->session_key[3], v1 744 net/rxrpc/key.c v1->session_key[4], v1->session_key[5], v1 745 net/rxrpc/key.c v1->session_key[6], v1->session_key[7]); v1 746 net/rxrpc/key.c if (v1->ticket_length >= 8) v1 748 net/rxrpc/key.c v1->ticket[0], v1->ticket[1], v1 749 net/rxrpc/key.c v1->ticket[2], v1->ticket[3], v1 750 net/rxrpc/key.c v1->ticket[4], v1->ticket[5], v1 751 net/rxrpc/key.c v1->ticket[6], v1->ticket[7]); v1 754 net/rxrpc/key.c if (v1->security_index != RXRPC_SECURITY_RXKAD) v1 757 net/rxrpc/key.c plen = sizeof(*token->kad) + v1->ticket_length; v1 769 net/rxrpc/key.c token->kad->ticket_len = v1->ticket_length; v1 770 net/rxrpc/key.c token->kad->expiry = v1->expiry; v1 771 net/rxrpc/key.c token->kad->kvno = v1->kvno; v1 772 net/rxrpc/key.c memcpy(&token->kad->session_key, &v1->session_key, 8); v1 773 net/rxrpc/key.c memcpy(&token->kad->ticket, v1->ticket, v1->ticket_length); v1 971 net/rxrpc/key.c struct rxrpc_key_data_v1 v1; v1 987 net/rxrpc/key.c data.v1.security_index = RXRPC_SECURITY_RXKAD; v1 988 net/rxrpc/key.c data.v1.ticket_length = 0; v1 989 net/rxrpc/key.c data.v1.expiry = rxrpc_time64_to_u32(expiry); v1 990 net/rxrpc/key.c data.v1.kvno = 0; v1 992 net/rxrpc/key.c memcpy(&data.v1.session_key, session_key, sizeof(data.v1.session_key)); v1 124 sound/isa/gus/gus_volume.c short *vi1, *vi2, pcents, v1; v1 128 sound/isa/gus/gus_volume.c v1 = *(vi1 + 1); v1 138 sound/isa/gus/gus_volume.c depth = (((int) (*(vi2 + 1) - *vi1) * (pcents - *vi1) / (*vi2 - *vi1)) + v1) * fc_register >> 14; v1 79 tools/include/uapi/linux/fscrypt.h struct fscrypt_policy_v1 v1; v1 5842 tools/lib/bpf/libbpf.c __u32 v1, v2; v1 5848 tools/lib/bpf/libbpf.c v1 = bpf_prog_info_read_offset_u32(&info, desc->count_offset); v1 5851 tools/lib/bpf/libbpf.c if (v1 != v2) v1 5854 tools/lib/bpf/libbpf.c v1 = bpf_prog_info_read_offset_u32(&info, desc->size_offset); v1 5857 tools/lib/bpf/libbpf.c if (v1 != v2) v1 37 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c u32 v1=0,v2=0,v3=0; v1 44 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c v1 = inl(pm_tmr_ioport); v1 47 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c } while ((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) v1 48 tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c || (v3 > v1 && v3 < v2)); v1 164 tools/testing/selftests/bpf/progs/test_xdp_noinline.c __u64 v1; v1 585 tools/testing/selftests/bpf/progs/test_xdp_noinline.c conn_rate_stats->v1 = 1; v1 588 tools/testing/selftests/bpf/progs/test_xdp_noinline.c conn_rate_stats->v1 += 1; v1 589 tools/testing/selftests/bpf/progs/test_xdp_noinline.c if (conn_rate_stats->v1 >= 1) v1 751 tools/testing/selftests/bpf/progs/test_xdp_noinline.c data_stats->v1 += 1; v1 766 tools/testing/selftests/bpf/progs/test_xdp_noinline.c lru_stats->v1 += 1; v1 789 tools/testing/selftests/bpf/progs/test_xdp_noinline.c data_stats->v1 += 1; v1 89 tools/testing/selftests/net/psock_tpacket.c } *v1; v1 245 tools/testing/selftests/net/psock_tpacket.c test_payload((uint8_t *) ppd.raw + ppd.v1->tp_h.tp_mac, v1 246 tools/testing/selftests/net/psock_tpacket.c ppd.v1->tp_h.tp_snaplen); v1 247 tools/testing/selftests/net/psock_tpacket.c total_bytes += ppd.v1->tp_h.tp_snaplen; v1 427 tools/testing/selftests/net/psock_tpacket.c ppd.v1->tp_h.tp_snaplen = packet_len; v1 428 tools/testing/selftests/net/psock_tpacket.c ppd.v1->tp_h.tp_len = packet_len; v1 433 tools/testing/selftests/net/psock_tpacket.c total_bytes += ppd.v1->tp_h.tp_snaplen;