v 30 arch/alpha/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 31 arch/alpha/include/asm/atomic.h #define atomic64_read(v) READ_ONCE((v)->counter) v 33 arch/alpha/include/asm/atomic.h #define atomic_set(v,i) WRITE_ONCE((v)->counter, (i)) v 34 arch/alpha/include/asm/atomic.h #define atomic64_set(v,i) WRITE_ONCE((v)->counter, (i)) v 43 arch/alpha/include/asm/atomic.h static __inline__ void atomic_##op(int i, atomic_t * v) \ v 54 arch/alpha/include/asm/atomic.h :"=&r" (temp), "=m" (v->counter) \ v 55 arch/alpha/include/asm/atomic.h :"Ir" (i), "m" (v->counter)); \ v 59 arch/alpha/include/asm/atomic.h static inline int atomic_##op##_return_relaxed(int i, atomic_t *v) \ v 71 arch/alpha/include/asm/atomic.h :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ v 72 arch/alpha/include/asm/atomic.h :"Ir" (i), "m" (v->counter) : "memory"); \ v 78 arch/alpha/include/asm/atomic.h static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v) \ v 89 arch/alpha/include/asm/atomic.h :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ v 90 arch/alpha/include/asm/atomic.h :"Ir" (i), "m" (v->counter) : "memory"); \ v 96 arch/alpha/include/asm/atomic.h static __inline__ void atomic64_##op(s64 i, atomic64_t * v) \ v 107 arch/alpha/include/asm/atomic.h :"=&r" (temp), "=m" (v->counter) \ v 108 arch/alpha/include/asm/atomic.h :"Ir" (i), "m" (v->counter)); \ v 112 arch/alpha/include/asm/atomic.h static __inline__ s64 atomic64_##op##_return_relaxed(s64 i, atomic64_t * v) \ v 124 arch/alpha/include/asm/atomic.h :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ v 125 arch/alpha/include/asm/atomic.h :"Ir" (i), "m" (v->counter) : "memory"); \ v 131 arch/alpha/include/asm/atomic.h static __inline__ s64 atomic64_fetch_##op##_relaxed(s64 i, atomic64_t * v) \ v 142 arch/alpha/include/asm/atomic.h :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ v 143 arch/alpha/include/asm/atomic.h :"Ir" (i), "m" (v->counter) : "memory"); \ v 202 arch/alpha/include/asm/atomic.h #define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) v 203 arch/alpha/include/asm/atomic.h #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) v 205 arch/alpha/include/asm/atomic.h #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) v 206 arch/alpha/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 217 arch/alpha/include/asm/atomic.h static __inline__ int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 233 arch/alpha/include/asm/atomic.h : [mem] "m"(*v), [a] "rI"(a), [u] "rI"((long)u) v 249 arch/alpha/include/asm/atomic.h static __inline__ s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 265 arch/alpha/include/asm/atomic.h : [mem] "m"(*v), [a] "rI"(a), [u] "rI"(u) v 279 arch/alpha/include/asm/atomic.h static inline s64 atomic64_dec_if_positive(atomic64_t *v) v 294 arch/alpha/include/asm/atomic.h : [mem] "m"(*v) v 493 arch/alpha/include/asm/io.h #define iowrite16be(v,p) iowrite16(cpu_to_be16(v), (p)) v 494 arch/alpha/include/asm/io.h #define iowrite32be(v,p) iowrite32(cpu_to_be32(v), (p)) v 71 arch/alpha/include/asm/string.h static inline void *memset16(uint16_t *p, uint16_t v, size_t n) v 73 arch/alpha/include/asm/string.h if (__builtin_constant_p(v)) v 74 arch/alpha/include/asm/string.h return __constant_c_memset(p, 0x0001000100010001UL * v, n * 2); v 75 arch/alpha/include/asm/string.h return __memset16(p, v, n * 2); v 48 arch/alpha/include/asm/vga.h #define vga_writeb(v,a) writeb(v, (u8 __iomem *)(a)) v 900 arch/alpha/kernel/osf_sys.c unsigned v, w, status; v 902 arch/alpha/kernel/osf_sys.c if (get_user(v, p) || get_user(w, p + 1)) v 904 arch/alpha/kernel/osf_sys.c switch (v) { v 1415 arch/alpha/kernel/setup.c c_next(struct seq_file *f, void *v, loff_t *pos) v 1421 arch/alpha/kernel/setup.c c_stop(struct seq_file *f, void *v) v 63 arch/alpha/kernel/srm_env.c static int srm_env_proc_show(struct seq_file *m, void *v) v 68 arch/alpha/kernel/sys_cabriolet.c cabriolet_device_interrupt(unsigned long v) v 84 arch/alpha/kernel/sys_cabriolet.c isa_device_interrupt(v); v 92 arch/alpha/kernel/sys_cabriolet.c common_init_irq(void (*srm_dev_int)(unsigned long v)) v 141 arch/alpha/kernel/sys_cabriolet.c pc164_srm_device_interrupt(unsigned long v) v 144 arch/alpha/kernel/sys_cabriolet.c srm_device_interrupt(v); v 149 arch/alpha/kernel/sys_cabriolet.c pc164_device_interrupt(unsigned long v) v 152 arch/alpha/kernel/sys_cabriolet.c cabriolet_device_interrupt(v); v 14 arch/alpha/math-emu/sfp-util.h #define umul_ppmm(wh, wl, u, v) \ v 19 arch/alpha/math-emu/sfp-util.h "r" ((UDItype)(v))) v 150 arch/alpha/oprofile/op_model_ev67.c unsigned long v; v 187 arch/alpha/oprofile/op_model_ev67.c i_stat.v = wrperfmon(8, 0); v 21 arch/arc/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 25 arch/arc/include/asm/atomic.h #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 28 arch/arc/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 38 arch/arc/include/asm/atomic.h : [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \ v 44 arch/arc/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 60 arch/arc/include/asm/atomic.h : [ctr] "r" (&v->counter), \ v 70 arch/arc/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 87 arch/arc/include/asm/atomic.h : [ctr] "r" (&v->counter), \ v 101 arch/arc/include/asm/atomic.h #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 105 arch/arc/include/asm/atomic.h static inline void atomic_set(atomic_t *v, int i) v 119 arch/arc/include/asm/atomic.h WRITE_ONCE(v->counter, i); v 123 arch/arc/include/asm/atomic.h #define atomic_set_release(v, i) atomic_set((v), (i)) v 133 arch/arc/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 138 arch/arc/include/asm/atomic.h v->counter c_op i; \ v 143 arch/arc/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 152 arch/arc/include/asm/atomic.h temp = v->counter; \ v 154 arch/arc/include/asm/atomic.h v->counter = temp; \ v 161 arch/arc/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 170 arch/arc/include/asm/atomic.h orig = v->counter; \ v 171 arch/arc/include/asm/atomic.h v->counter c_op i; \ v 202 arch/arc/include/asm/atomic.h static inline int atomic_read(const atomic_t *v) v 209 arch/arc/include/asm/atomic.h : "r"(&v->counter) v 214 arch/arc/include/asm/atomic.h static inline void atomic_set(atomic_t *v, int i) v 219 arch/arc/include/asm/atomic.h : "r"(i), "r"(&v->counter) v 224 arch/arc/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 231 arch/arc/include/asm/atomic.h : "r"(i), "r"(&v->counter), "i"(asm_op) \ v 236 arch/arc/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 249 arch/arc/include/asm/atomic.h : "r"(&v->counter), "i"(asm_op) \ v 260 arch/arc/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 273 arch/arc/include/asm/atomic.h : "r"(&v->counter), "i"(asm_op) \ v 287 arch/arc/include/asm/atomic.h #define atomic_sub(i, v) atomic_add(-(i), (v)) v 288 arch/arc/include/asm/atomic.h #define atomic_sub_return(i, v) atomic_add_return(-(i), (v)) v 289 arch/arc/include/asm/atomic.h #define atomic_fetch_sub(i, v) atomic_fetch_add(-(i), (v)) v 329 arch/arc/include/asm/atomic.h static inline s64 atomic64_read(const atomic64_t *v) v 336 arch/arc/include/asm/atomic.h : "r"(&v->counter)); v 341 arch/arc/include/asm/atomic.h static inline void atomic64_set(atomic64_t *v, s64 a) v 357 arch/arc/include/asm/atomic.h : "r"(a), "r"(&v->counter) v 362 arch/arc/include/asm/atomic.h static inline void atomic64_##op(s64 a, atomic64_t *v) \ v 374 arch/arc/include/asm/atomic.h : "r"(&v->counter), "ir"(a) \ v 379 arch/arc/include/asm/atomic.h static inline s64 atomic64_##op##_return(s64 a, atomic64_t *v) \ v 393 arch/arc/include/asm/atomic.h : "r"(&v->counter), "ir"(a) \ v 402 arch/arc/include/asm/atomic.h static inline s64 atomic64_fetch_##op(s64 a, atomic64_t *v) \ v 416 arch/arc/include/asm/atomic.h : "r"(&v->counter), "ir"(a) \ v 495 arch/arc/include/asm/atomic.h static inline s64 atomic64_dec_if_positive(atomic64_t *v) v 510 arch/arc/include/asm/atomic.h : "r"(&v->counter) v 528 arch/arc/include/asm/atomic.h static inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 545 arch/arc/include/asm/atomic.h : "r"(&v->counter), "r"(a), "r"(u) v 104 arch/arc/include/asm/cmpxchg.h #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) v 222 arch/arc/include/asm/cmpxchg.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 47 arch/arc/include/asm/io.h #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force u16)cpu_to_be16(v), p); }) v 48 arch/arc/include/asm/io.h #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force u32)cpu_to_be32(v), p); }) v 211 arch/arc/include/asm/io.h #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) v 212 arch/arc/include/asm/io.h #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) v 213 arch/arc/include/asm/io.h #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) v 233 arch/arc/include/asm/io.h #define writeb_relaxed(v,c) __raw_writeb(v,c) v 234 arch/arc/include/asm/io.h #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c) v 235 arch/arc/include/asm/io.h #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c) v 41 arch/arc/include/asm/perf_event.h unsigned int m:8, c:8, r:5, i:1, s:2, v:8; v 43 arch/arc/include/asm/perf_event.h unsigned int v:8, s:2, i:1, r:5, c:8, m:8; v 49 arch/arc/include/asm/perf_event.h unsigned int c:16, r:8, v:8; v 51 arch/arc/include/asm/perf_event.h unsigned int v:8, r:8, c:16; v 34 arch/arc/include/asm/setup.h #define IS_AVAIL1(v, s) ((v) ? s : "") v 35 arch/arc/include/asm/setup.h #define IS_DISABLED_RUN(v) ((v) ? "" : "(disabled) ") v 36 arch/arc/include/asm/setup.h #define IS_USED_RUN(v) ((v) ? "" : "(not used) ") v 38 arch/arc/include/asm/setup.h #define IS_AVAIL2(v, s, cfg) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_USED_CFG(cfg)) v 39 arch/arc/include/asm/setup.h #define IS_AVAIL3(v, v2, s) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2)) v 578 arch/arc/kernel/perf_event.c if (!pct_bcr.v) { v 587 arch/arc/kernel/perf_event.c if (WARN(!cc_bcr.v, "Counters exist but No countable conditions?")) v 616 arch/arc/kernel/setup.c static int show_cpuinfo(struct seq_file *m, void *v) v 619 arch/arc/kernel/setup.c int cpu_id = ptr_to_cpu(v); v 673 arch/arc/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 679 arch/arc/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 128 arch/arc/kernel/smp.c #define __boot_write(f, v) f = v v 133 arch/arc/kernel/smp.c #define __boot_write(f, v) arc_write_uncached_32(&f, v) v 44 arch/arc/kernel/unaligned.c unsigned int err = 0, v, a = addr; \ v 45 arch/arc/kernel/unaligned.c __get8_unaligned_check(v, a, err); \ v 46 arch/arc/kernel/unaligned.c val = v << ((BE) ? 8 : 0); \ v 47 arch/arc/kernel/unaligned.c __get8_unaligned_check(v, a, err); \ v 48 arch/arc/kernel/unaligned.c val |= v << ((BE) ? 0 : 8); \ v 55 arch/arc/kernel/unaligned.c unsigned int err = 0, v, a = addr; \ v 56 arch/arc/kernel/unaligned.c __get8_unaligned_check(v, a, err); \ v 57 arch/arc/kernel/unaligned.c val = v << ((BE) ? 24 : 0); \ v 58 arch/arc/kernel/unaligned.c __get8_unaligned_check(v, a, err); \ v 59 arch/arc/kernel/unaligned.c val |= v << ((BE) ? 16 : 8); \ v 60 arch/arc/kernel/unaligned.c __get8_unaligned_check(v, a, err); \ v 61 arch/arc/kernel/unaligned.c val |= v << ((BE) ? 8 : 16); \ v 62 arch/arc/kernel/unaligned.c __get8_unaligned_check(v, a, err); \ v 63 arch/arc/kernel/unaligned.c val |= v << ((BE) ? 0 : 24); \ v 70 arch/arc/kernel/unaligned.c unsigned int err = 0, v = val, a = addr;\ v 88 arch/arc/kernel/unaligned.c : "=r" (err), "=&r" (v), "=&r" (a) \ v 89 arch/arc/kernel/unaligned.c : "0" (err), "1" (v), "2" (a)); \ v 97 arch/arc/kernel/unaligned.c unsigned int err = 0, v = val, a = addr;\ v 121 arch/arc/kernel/unaligned.c : "=r" (err), "=&r" (v), "=&r" (a) \ v 122 arch/arc/kernel/unaligned.c : "0" (err), "1" (v), "2" (a)); \ v 247 arch/arc/kernel/unwind.c unsigned long v; v 249 arch/arc/kernel/unwind.c v = e1->start; v 251 arch/arc/kernel/unwind.c e2->start = v; v 252 arch/arc/kernel/unwind.c v = e1->fde; v 254 arch/arc/kernel/unwind.c e2->fde = v; v 629 arch/arc/mm/cache.c #define __ic_line_inv_vaddr(p, v, s) __ic_line_inv_vaddr_local(p, v, s) v 179 arch/arm/common/it8152.c u32 v; v 185 arch/arm/common/it8152.c v = (__raw_readl(IT8152_PCI_CFG_DATA) >> (8 * (shift))); v 187 arch/arm/common/it8152.c *value = v; v 197 arch/arm/common/it8152.c u32 v, vtemp, mask = 0; v 215 arch/arm/common/it8152.c v = (value << (8 * shift)); v 217 arch/arm/common/it8152.c __raw_writel((v | vtemp), IT8152_PCI_CFG_DATA); v 175 arch/arm/include/asm/arch_gicv3.h #define write_gicreg(v, r) write_##r(v) v 283 arch/arm/include/asm/arch_gicv3.h #define gic_write_irouter(v, c) __gic_writeq_nonatomic(v, c) v 294 arch/arm/include/asm/arch_gicv3.h #define gits_write_baser(v, c) __gic_writeq_nonatomic(v, c) v 301 arch/arm/include/asm/arch_gicv3.h #define gicr_write_propbaser(v, c) __gic_writeq_nonatomic(v, c) v 303 arch/arm/include/asm/arch_gicv3.h #define gicr_write_pendbaser(v, c) __gic_writeq_nonatomic(v, c) v 309 arch/arm/include/asm/arch_gicv3.h #define gic_write_lpir(v, c) writel_relaxed(lower_32_bits(v), c) v 320 arch/arm/include/asm/arch_gicv3.h #define gits_write_cbaser(v, c) __gic_writeq_nonatomic(v, c) v 325 arch/arm/include/asm/arch_gicv3.h #define gits_write_cwriter(v, c) __gic_writeq_nonatomic(v, c) v 330 arch/arm/include/asm/arch_gicv3.h #define gits_write_vpropbaser(v, c) __gic_writeq_nonatomic(v, c) v 27 arch/arm/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 28 arch/arm/include/asm/atomic.h #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) v 39 arch/arm/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 44 arch/arm/include/asm/atomic.h prefetchw(&v->counter); \ v 51 arch/arm/include/asm/atomic.h : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \ v 52 arch/arm/include/asm/atomic.h : "r" (&v->counter), "Ir" (i) \ v 57 arch/arm/include/asm/atomic.h static inline int atomic_##op##_return_relaxed(int i, atomic_t *v) \ v 62 arch/arm/include/asm/atomic.h prefetchw(&v->counter); \ v 70 arch/arm/include/asm/atomic.h : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \ v 71 arch/arm/include/asm/atomic.h : "r" (&v->counter), "Ir" (i) \ v 78 arch/arm/include/asm/atomic.h static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v) \ v 83 arch/arm/include/asm/atomic.h prefetchw(&v->counter); \ v 91 arch/arm/include/asm/atomic.h : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Qo" (v->counter) \ v 92 arch/arm/include/asm/atomic.h : "r" (&v->counter), "Ir" (i) \ v 130 arch/arm/include/asm/atomic.h static inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 136 arch/arm/include/asm/atomic.h prefetchw(&v->counter); v 147 arch/arm/include/asm/atomic.h : "=&r" (oldval), "=&r" (newval), "=&r" (tmp), "+Qo" (v->counter) v 148 arch/arm/include/asm/atomic.h : "r" (&v->counter), "r" (u), "r" (a) v 165 arch/arm/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 170 arch/arm/include/asm/atomic.h v->counter c_op i; \ v 175 arch/arm/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 181 arch/arm/include/asm/atomic.h v->counter c_op i; \ v 182 arch/arm/include/asm/atomic.h val = v->counter; \ v 189 arch/arm/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 195 arch/arm/include/asm/atomic.h val = v->counter; \ v 196 arch/arm/include/asm/atomic.h v->counter c_op i; \ v 202 arch/arm/include/asm/atomic.h static inline int atomic_cmpxchg(atomic_t *v, int old, int new) v 208 arch/arm/include/asm/atomic.h ret = v->counter; v 210 arch/arm/include/asm/atomic.h v->counter = new; v 245 arch/arm/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 255 arch/arm/include/asm/atomic.h static inline s64 atomic64_read(const atomic64_t *v) v 262 arch/arm/include/asm/atomic.h : "r" (&v->counter), "Qo" (v->counter) v 268 arch/arm/include/asm/atomic.h static inline void atomic64_set(atomic64_t *v, s64 i) v 272 arch/arm/include/asm/atomic.h : "=Qo" (v->counter) v 273 arch/arm/include/asm/atomic.h : "r" (&v->counter), "r" (i) v 277 arch/arm/include/asm/atomic.h static inline s64 atomic64_read(const atomic64_t *v) v 284 arch/arm/include/asm/atomic.h : "r" (&v->counter), "Qo" (v->counter) v 290 arch/arm/include/asm/atomic.h static inline void atomic64_set(atomic64_t *v, s64 i) v 294 arch/arm/include/asm/atomic.h prefetchw(&v->counter); v 300 arch/arm/include/asm/atomic.h : "=&r" (tmp), "=Qo" (v->counter) v 301 arch/arm/include/asm/atomic.h : "r" (&v->counter), "r" (i) v 307 arch/arm/include/asm/atomic.h static inline void atomic64_##op(s64 i, atomic64_t *v) \ v 312 arch/arm/include/asm/atomic.h prefetchw(&v->counter); \ v 320 arch/arm/include/asm/atomic.h : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \ v 321 arch/arm/include/asm/atomic.h : "r" (&v->counter), "r" (i) \ v 327 arch/arm/include/asm/atomic.h atomic64_##op##_return_relaxed(s64 i, atomic64_t *v) \ v 332 arch/arm/include/asm/atomic.h prefetchw(&v->counter); \ v 341 arch/arm/include/asm/atomic.h : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \ v 342 arch/arm/include/asm/atomic.h : "r" (&v->counter), "r" (i) \ v 350 arch/arm/include/asm/atomic.h atomic64_fetch_##op##_relaxed(s64 i, atomic64_t *v) \ v 355 arch/arm/include/asm/atomic.h prefetchw(&v->counter); \ v 364 arch/arm/include/asm/atomic.h : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Qo" (v->counter) \ v 365 arch/arm/include/asm/atomic.h : "r" (&v->counter), "r" (i) \ v 449 arch/arm/include/asm/atomic.h static inline s64 atomic64_dec_if_positive(atomic64_t *v) v 455 arch/arm/include/asm/atomic.h prefetchw(&v->counter); v 467 arch/arm/include/asm/atomic.h : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) v 468 arch/arm/include/asm/atomic.h : "r" (&v->counter) v 477 arch/arm/include/asm/atomic.h static inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 483 arch/arm/include/asm/atomic.h prefetchw(&v->counter); v 496 arch/arm/include/asm/atomic.h : "=&r" (oldval), "=&r" (newval), "=&r" (tmp), "+Qo" (v->counter) v 497 arch/arm/include/asm/atomic.h : "r" (&v->counter), "r" (u), "r" (a) v 65 arch/arm/include/asm/cp15.h #define __write_sysreg(v, r, w, c, t) asm volatile(w " " c : : "r" ((t)(v))) v 66 arch/arm/include/asm/cp15.h #define write_sysreg(v, ...) __write_sysreg(v, __VA_ARGS__) v 60 arch/arm/include/asm/io.h #define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))) v 252 arch/arm/include/asm/io.h #define outb(v,p) ({ __iowmb(); __raw_writeb(v,__io(p)); }) v 253 arch/arm/include/asm/io.h #define outw(v,p) ({ __iowmb(); __raw_writew((__force __u16) \ v 254 arch/arm/include/asm/io.h cpu_to_le16(v),__io(p)); }) v 255 arch/arm/include/asm/io.h #define outl(v,p) ({ __iowmb(); __raw_writel((__force __u32) \ v 256 arch/arm/include/asm/io.h cpu_to_le32(v),__io(p)); }) v 297 arch/arm/include/asm/io.h #define writeb_relaxed(v,c) __raw_writeb(v,c) v 298 arch/arm/include/asm/io.h #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c) v 299 arch/arm/include/asm/io.h #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c) v 305 arch/arm/include/asm/io.h #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) v 306 arch/arm/include/asm/io.h #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) v 307 arch/arm/include/asm/io.h #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) v 343 arch/arm/include/asm/io.h #define memset_io(c,v,l) _memset_io(c,(v),(l)) v 425 arch/arm/include/asm/io.h #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) v 426 arch/arm/include/asm/io.h #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) v 51 arch/arm/include/asm/kvm_emulate.h static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v) v 53 arch/arm/include/asm/kvm_emulate.h *__vcpu_spsr(vcpu) = v; v 224 arch/arm/include/asm/kvm_host.h #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r] v 20 arch/arm/include/asm/kvm_hyp.h #define write_special(v, r) \ v 21 arch/arm/include/asm/kvm_hyp.h asm volatile("msr " __stringify(r) ", %0" : : "r" (v)) v 86 arch/arm/include/asm/kvm_hyp.h #define write_sysreg_el0(v, r) write_sysreg(v, r##_EL0) v 29 arch/arm/include/asm/string.h extern void *__memset32(uint32_t *, uint32_t v, __kernel_size_t); v 30 arch/arm/include/asm/string.h static inline void *memset32(uint32_t *p, uint32_t v, __kernel_size_t n) v 32 arch/arm/include/asm/string.h return __memset32(p, v, n * 4); v 37 arch/arm/include/asm/string.h static inline void *memset64(uint64_t *p, uint64_t v, __kernel_size_t n) v 39 arch/arm/include/asm/string.h return __memset64(p, v, n * 8, v >> 32); v 264 arch/arm/kernel/dma.c static int proc_dma_show(struct seq_file *m, void *v) v 1027 arch/arm/kernel/hw_breakpoint.c void *v) v 1239 arch/arm/kernel/setup.c static int c_show(struct seq_file *m, void *v) v 1310 arch/arm/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 1316 arch/arm/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 82 arch/arm/kernel/swp_emulate.c static int proc_status_show(struct seq_file *m, void *v) v 20 arch/arm/kernel/thumbee.c unsigned long v; v 21 arch/arm/kernel/thumbee.c asm("mrc p14, 6, %0, c1, c0, 0\n" : "=r" (v)); v 22 arch/arm/kernel/thumbee.c return v; v 25 arch/arm/kernel/thumbee.c static inline void teehbr_write(unsigned long v) v 27 arch/arm/kernel/thumbee.c asm("mcr p14, 6, %0, c1, c0, 0\n" : : "r" (v)); v 801 arch/arm/kvm/coproc.c static void get_##name(struct kvm_vcpu *v, \ v 216 arch/arm/mach-cns3xxx/pcie.c u32 v; v 220 arch/arm/mach-cns3xxx/pcie.c v = readl_relaxed(base); v 222 arch/arm/mach-cns3xxx/pcie.c v &= ~(mask << shift); v 223 arch/arm/mach-cns3xxx/pcie.c v |= (val & mask) << shift; v 225 arch/arm/mach-cns3xxx/pcie.c writel_relaxed(v, base); v 208 arch/arm/mach-davinci/devices.c unsigned v; v 210 arch/arm/mach-davinci/devices.c v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); v 211 arch/arm/mach-davinci/devices.c __raw_writel(v & ~0xfc0, v 419 arch/arm/mach-davinci/dm644x.c u32 v = DM644X_VPSS_VENCLKEN; v 423 arch/arm/mach-davinci/dm644x.c v |= DM644X_VPSS_DACCLKEN; v 424 arch/arm/mach-davinci/dm644x.c writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); v 428 arch/arm/mach-davinci/dm644x.c v |= DM644X_VPSS_DACCLKEN; v 429 arch/arm/mach-davinci/dm644x.c writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); v 435 arch/arm/mach-davinci/dm644x.c v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE; v 436 arch/arm/mach-davinci/dm644x.c writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); v 39 arch/arm/mach-ebsa110/include/mach/io.h #define outb(v,p) __outb16(v,p) v 42 arch/arm/mach-ebsa110/include/mach/io.h #define outb(v,p) __outb8(v,p) v 46 arch/arm/mach-ebsa110/include/mach/io.h #define outw(v,p) __outw(v,p) v 49 arch/arm/mach-ebsa110/include/mach/io.h #define outl(v,p) __outl(v,p) v 58 arch/arm/mach-ebsa110/include/mach/io.h #define writeb(v,b) __writeb(v,b) v 59 arch/arm/mach-ebsa110/include/mach/io.h #define writew(v,b) __writew(v,b) v 60 arch/arm/mach-ebsa110/include/mach/io.h #define writel(v,b) __writel(v,b) v 17 arch/arm/mach-ebsa110/include/mach/uncompress.h unsigned char v, *base = SERIAL_BASE; v 20 arch/arm/mach-ebsa110/include/mach/uncompress.h v = base[UART_LSR << 2]; v 22 arch/arm/mach-ebsa110/include/mach/uncompress.h } while (!(v & UART_LSR_THRE)); v 29 arch/arm/mach-ebsa110/include/mach/uncompress.h unsigned char v, *base = SERIAL_BASE; v 32 arch/arm/mach-ebsa110/include/mach/uncompress.h v = base[UART_LSR << 2]; v 34 arch/arm/mach-ebsa110/include/mach/uncompress.h } while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) != v 251 arch/arm/mach-ep93xx/clock.c u32 v; v 253 arch/arm/mach-ep93xx/clock.c v = __raw_readl(clk->enable_reg); v 254 arch/arm/mach-ep93xx/clock.c v |= clk->enable_mask; v 256 arch/arm/mach-ep93xx/clock.c ep93xx_syscon_swlocked_write(v, clk->enable_reg); v 258 arch/arm/mach-ep93xx/clock.c __raw_writel(v, clk->enable_reg); v 282 arch/arm/mach-ep93xx/clock.c u32 v; v 284 arch/arm/mach-ep93xx/clock.c v = __raw_readl(clk->enable_reg); v 285 arch/arm/mach-ep93xx/clock.c v &= ~clk->enable_mask; v 287 arch/arm/mach-ep93xx/clock.c ep93xx_syscon_swlocked_write(v, clk->enable_reg); v 289 arch/arm/mach-ep93xx/clock.c __raw_writel(v, clk->enable_reg); v 128 arch/arm/mach-ep93xx/core.c unsigned int v; v 130 arch/arm/mach-ep93xx/core.c v = __raw_readl(EP93XX_SYSCON_SYSCFG); v 131 arch/arm/mach-ep93xx/core.c v &= EP93XX_SYSCON_SYSCFG_REV_MASK; v 132 arch/arm/mach-ep93xx/core.c v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT; v 133 arch/arm/mach-ep93xx/core.c return v; v 64 arch/arm/mach-ep93xx/include/mach/uncompress.h unsigned int v; v 67 arch/arm/mach-ep93xx/include/mach/uncompress.h v = __raw_readl(PHYS_ETH_SELF_CTL); v 68 arch/arm/mach-ep93xx/include/mach/uncompress.h __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL); v 33 arch/arm/mach-ep93xx/micro9.c u32 v; v 36 arch/arm/mach-ep93xx/micro9.c v = __raw_readl(EP93XX_SYSCON_SYSCFG); v 37 arch/arm/mach-ep93xx/micro9.c if (v & EP93XX_SYSCON_SYSCFG_LCSN7) v 37 arch/arm/mach-exynos/platsmp.c unsigned int v; v 46 arch/arm/mach-exynos/platsmp.c : "=&r" (v) v 64 arch/arm/mach-footbridge/dc21285.c u32 v = 0xffffffff; v 70 arch/arm/mach-footbridge/dc21285.c : "=r" (v) : "r" (addr), "r" (where) : "cc"); v 74 arch/arm/mach-footbridge/dc21285.c : "=r" (v) : "r" (addr), "r" (where) : "cc"); v 78 arch/arm/mach-footbridge/dc21285.c : "=r" (v) : "r" (addr), "r" (where) : "cc"); v 82 arch/arm/mach-footbridge/dc21285.c *value = v; v 84 arch/arm/mach-footbridge/dc21285.c v = *CSR_PCICMD; v 85 arch/arm/mach-footbridge/dc21285.c if (v & PCICMD_ABORT) { v 86 arch/arm/mach-footbridge/dc21285.c *CSR_PCICMD = v & (0xffff|PCICMD_ABORT); v 98 arch/arm/mach-footbridge/dc21285.c u32 v; v 119 arch/arm/mach-footbridge/dc21285.c v = *CSR_PCICMD; v 120 arch/arm/mach-footbridge/dc21285.c if (v & PCICMD_ABORT) { v 121 arch/arm/mach-footbridge/dc21285.c *CSR_PCICMD = v & (0xffff|PCICMD_ABORT); v 405 arch/arm/mach-footbridge/netwinder-hw.c #define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0) v 253 arch/arm/mach-hisi/hotplug.c unsigned int v; v 267 arch/arm/mach-hisi/hotplug.c : "=&r" (v) v 32 arch/arm/mach-imx/ehci-imx27.c unsigned int v; v 34 arch/arm/mach-imx/ehci-imx27.c v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); v 38 arch/arm/mach-imx/ehci-imx27.c v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT); v 39 arch/arm/mach-imx/ehci-imx27.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT; v 42 arch/arm/mach-imx/ehci-imx27.c v |= MX27_OTG_PM_BIT; v 45 arch/arm/mach-imx/ehci-imx27.c v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT); v 46 arch/arm/mach-imx/ehci-imx27.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT; v 49 arch/arm/mach-imx/ehci-imx27.c v |= MX27_H1_PM_BIT; v 52 arch/arm/mach-imx/ehci-imx27.c v |= MX27_H1_DT_BIT; v 56 arch/arm/mach-imx/ehci-imx27.c v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT); v 57 arch/arm/mach-imx/ehci-imx27.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT; v 60 arch/arm/mach-imx/ehci-imx27.c v |= MX27_H2_PM_BIT; v 63 arch/arm/mach-imx/ehci-imx27.c v |= MX27_H2_DT_BIT; v 70 arch/arm/mach-imx/ehci-imx27.c writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); v 32 arch/arm/mach-imx/ehci-imx31.c unsigned int v; v 34 arch/arm/mach-imx/ehci-imx31.c v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); v 38 arch/arm/mach-imx/ehci-imx31.c v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT); v 39 arch/arm/mach-imx/ehci-imx31.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT; v 42 arch/arm/mach-imx/ehci-imx31.c v |= MX31_OTG_PM_BIT; v 46 arch/arm/mach-imx/ehci-imx31.c v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT); v 47 arch/arm/mach-imx/ehci-imx31.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT; v 50 arch/arm/mach-imx/ehci-imx31.c v |= MX31_H1_PM_BIT; v 53 arch/arm/mach-imx/ehci-imx31.c v |= MX31_H1_DT_BIT; v 57 arch/arm/mach-imx/ehci-imx31.c v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT); v 58 arch/arm/mach-imx/ehci-imx31.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT; v 61 arch/arm/mach-imx/ehci-imx31.c v |= MX31_H2_PM_BIT; v 64 arch/arm/mach-imx/ehci-imx31.c v |= MX31_H2_DT_BIT; v 71 arch/arm/mach-imx/ehci-imx31.c writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); v 34 arch/arm/mach-imx/ehci-imx35.c unsigned int v; v 36 arch/arm/mach-imx/ehci-imx35.c v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); v 40 arch/arm/mach-imx/ehci-imx35.c v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT | MX35_OTG_PP_BIT | v 42 arch/arm/mach-imx/ehci-imx35.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT; v 45 arch/arm/mach-imx/ehci-imx35.c v |= MX35_OTG_PM_BIT; v 48 arch/arm/mach-imx/ehci-imx35.c v |= MX35_OTG_PP_BIT; v 51 arch/arm/mach-imx/ehci-imx35.c v |= MX35_OTG_OCPOL_BIT; v 55 arch/arm/mach-imx/ehci-imx35.c v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_PP_BIT | v 58 arch/arm/mach-imx/ehci-imx35.c v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT; v 61 arch/arm/mach-imx/ehci-imx35.c v |= MX35_H1_PM_BIT; v 64 arch/arm/mach-imx/ehci-imx35.c v |= MX35_H1_PP_BIT; v 67 arch/arm/mach-imx/ehci-imx35.c v |= MX35_H1_OCPOL_BIT; v 70 arch/arm/mach-imx/ehci-imx35.c v |= MX35_H1_TLL_BIT; v 73 arch/arm/mach-imx/ehci-imx35.c v |= MX35_H1_USBTE_BIT; v 76 arch/arm/mach-imx/ehci-imx35.c v |= MX35_H1_IPPUE_DOWN_BIT; v 79 arch/arm/mach-imx/ehci-imx35.c v |= MX35_H1_IPPUE_UP_BIT; v 86 arch/arm/mach-imx/ehci-imx35.c writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); v 16 arch/arm/mach-imx/hotplug.c unsigned int v; v 30 arch/arm/mach-imx/hotplug.c : "=&r" (v) v 54 arch/arm/mach-ixp4xx/include/mach/io.h #define writeb(v, p) __indirect_writeb(v, p) v 55 arch/arm/mach-ixp4xx/include/mach/io.h #define writew(v, p) __indirect_writew(v, p) v 56 arch/arm/mach-ixp4xx/include/mach/io.h #define writel(v, p) __indirect_writel(v, p) v 58 arch/arm/mach-ixp4xx/include/mach/io.h #define writeb_relaxed(v, p) __indirect_writeb(v, p) v 59 arch/arm/mach-ixp4xx/include/mach/io.h #define writew_relaxed(v, p) __indirect_writew(v, p) v 60 arch/arm/mach-ixp4xx/include/mach/io.h #define writel_relaxed(v, p) __indirect_writel(v, p) v 62 arch/arm/mach-ixp4xx/include/mach/io.h #define writesb(p, v, l) __indirect_writesb(p, v, l) v 63 arch/arm/mach-ixp4xx/include/mach/io.h #define writesw(p, v, l) __indirect_writesw(p, v, l) v 64 arch/arm/mach-ixp4xx/include/mach/io.h #define writesl(p, v, l) __indirect_writesl(p, v, l) v 74 arch/arm/mach-ixp4xx/include/mach/io.h #define readsb(p, v, l) __indirect_readsb(p, v, l) v 75 arch/arm/mach-ixp4xx/include/mach/io.h #define readsw(p, v, l) __indirect_readsw(p, v, l) v 76 arch/arm/mach-ixp4xx/include/mach/io.h #define readsl(p, v, l) __indirect_readsl(p, v, l) v 225 arch/arm/mach-ixp4xx/include/mach/io.h #define memset_io(c,v,l) _memset_io((c),(v),(l)) v 233 arch/arm/mach-ixp4xx/include/mach/io.h #define __io(v) __typesafe_io(v) v 374 arch/arm/mach-ixp4xx/include/mach/io.h #define ioread8_rep(p, v, c) ioread8_rep(p, v, c) v 402 arch/arm/mach-ixp4xx/include/mach/io.h #define ioread16_rep(p, v, c) ioread16_rep(p, v, c) v 432 arch/arm/mach-ixp4xx/include/mach/io.h #define ioread32_rep(p, v, c) ioread32_rep(p, v, c) v 447 arch/arm/mach-ixp4xx/include/mach/io.h #define iowrite8(v, p) iowrite8(v, p) v 461 arch/arm/mach-ixp4xx/include/mach/io.h #define iowrite8_rep(p, v, c) iowrite8_rep(p, v, c) v 476 arch/arm/mach-ixp4xx/include/mach/io.h #define iowrite16(v, p) iowrite16(v, p) v 490 arch/arm/mach-ixp4xx/include/mach/io.h #define iowrite16_rep(p, v, c) iowrite16_rep(p, v, c) v 505 arch/arm/mach-ixp4xx/include/mach/io.h #define iowrite32(v, p) iowrite32(v, p) v 519 arch/arm/mach-ixp4xx/include/mach/io.h #define iowrite32_rep(p, v, c) iowrite32_rep(p, v, c) v 13 arch/arm/mach-lpc32xx/lpc32xx.h #define _SBF(f, v) ((v) << (f)) v 50 arch/arm/mach-omap1/include/mach/hardware.h extern void omap_writeb(u8 v, u32 pa); v 51 arch/arm/mach-omap1/include/mach/hardware.h extern void omap_writew(u16 v, u32 pa); v 52 arch/arm/mach-omap1/include/mach/hardware.h extern void omap_writel(u32 v, u32 pa); v 163 arch/arm/mach-omap1/io.c void omap_writeb(u8 v, u32 pa) v 165 arch/arm/mach-omap1/io.c __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); v 169 arch/arm/mach-omap1/io.c void omap_writew(u16 v, u32 pa) v 171 arch/arm/mach-omap1/io.c __raw_writew(v, OMAP1_IO_ADDRESS(pa)); v 175 arch/arm/mach-omap1/io.c void omap_writel(u32 v, u32 pa) v 177 arch/arm/mach-omap1/io.c __raw_writel(v, OMAP1_IO_ADDRESS(pa)); v 416 arch/arm/mach-omap1/pm.c static int omap_pm_debug_show(struct seq_file *m, void *v) v 54 arch/arm/mach-omap2/clkt2xxx_dpllcore.c u32 v; v 60 arch/arm/mach-omap2/clkt2xxx_dpllcore.c v = omap2xxx_cm_get_core_clk_src(); v 62 arch/arm/mach-omap2/clkt2xxx_dpllcore.c if (v == CORE_CLK_SRC_32K) v 65 arch/arm/mach-omap2/clkt2xxx_dpllcore.c core_clk *= v; v 453 arch/arm/mach-omap2/clockdomain.c static int cpu_notifier(struct notifier_block *nb, unsigned long cmd, void *v) v 45 arch/arm/mach-omap2/cm2xxx.c u32 v; v 47 arch/arm/mach-omap2/cm2xxx.c v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); v 48 arch/arm/mach-omap2/cm2xxx.c v &= ~mask; v 49 arch/arm/mach-omap2/cm2xxx.c v |= c << __ffs(mask); v 50 arch/arm/mach-omap2/cm2xxx.c omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); v 55 arch/arm/mach-omap2/cm2xxx.c u32 v; v 57 arch/arm/mach-omap2/cm2xxx.c v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); v 58 arch/arm/mach-omap2/cm2xxx.c v &= mask; v 59 arch/arm/mach-omap2/cm2xxx.c v >>= __ffs(mask); v 61 arch/arm/mach-omap2/cm2xxx.c return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; v 80 arch/arm/mach-omap2/cm2xxx.c u32 v; v 82 arch/arm/mach-omap2/cm2xxx.c v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); v 83 arch/arm/mach-omap2/cm2xxx.c v &= ~OMAP24XX_AUTO_DPLL_MASK; v 84 arch/arm/mach-omap2/cm2xxx.c v |= m << OMAP24XX_AUTO_DPLL_SHIFT; v 85 arch/arm/mach-omap2/cm2xxx.c omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); v 104 arch/arm/mach-omap2/cm2xxx.c u32 v; v 106 arch/arm/mach-omap2/cm2xxx.c v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); v 107 arch/arm/mach-omap2/cm2xxx.c v &= ~mask; v 108 arch/arm/mach-omap2/cm2xxx.c v |= m << __ffs(mask); v 109 arch/arm/mach-omap2/cm2xxx.c omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); v 139 arch/arm/mach-omap2/cm2xxx.c u32 v, m; v 143 arch/arm/mach-omap2/cm2xxx.c v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); v 144 arch/arm/mach-omap2/cm2xxx.c if (v & m) v 147 arch/arm/mach-omap2/cm2xxx.c v |= m; v 148 arch/arm/mach-omap2/cm2xxx.c omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); v 162 arch/arm/mach-omap2/cm2xxx.c u32 v; v 164 arch/arm/mach-omap2/cm2xxx.c v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); v 165 arch/arm/mach-omap2/cm2xxx.c v &= ~(EN_APLL_LOCKED << enable_bit); v 166 arch/arm/mach-omap2/cm2xxx.c omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); v 354 arch/arm/mach-omap2/cm2xxx.c u32 v; v 356 arch/arm/mach-omap2/cm2xxx.c v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); v 357 arch/arm/mach-omap2/cm2xxx.c v &= OMAP24XX_CORE_CLK_SRC_MASK; v 359 arch/arm/mach-omap2/cm2xxx.c return v; v 64 arch/arm/mach-omap2/cm2xxx_3xxx.h u32 v; v 66 arch/arm/mach-omap2/cm2xxx_3xxx.h v = omap2_cm_read_mod_reg(module, idx); v 67 arch/arm/mach-omap2/cm2xxx_3xxx.h v &= ~mask; v 68 arch/arm/mach-omap2/cm2xxx_3xxx.h v |= bits; v 69 arch/arm/mach-omap2/cm2xxx_3xxx.h omap2_cm_write_mod_reg(v, module, idx); v 71 arch/arm/mach-omap2/cm2xxx_3xxx.h return v; v 77 arch/arm/mach-omap2/cm2xxx_3xxx.h u32 v; v 79 arch/arm/mach-omap2/cm2xxx_3xxx.h v = omap2_cm_read_mod_reg(domain, idx); v 80 arch/arm/mach-omap2/cm2xxx_3xxx.h v &= mask; v 81 arch/arm/mach-omap2/cm2xxx_3xxx.h v >>= __ffs(mask); v 83 arch/arm/mach-omap2/cm2xxx_3xxx.h return v; v 65 arch/arm/mach-omap2/cm33xx.c u32 v; v 67 arch/arm/mach-omap2/cm33xx.c v = am33xx_cm_read_reg(inst, idx); v 68 arch/arm/mach-omap2/cm33xx.c v &= ~mask; v 69 arch/arm/mach-omap2/cm33xx.c v |= bits; v 70 arch/arm/mach-omap2/cm33xx.c am33xx_cm_write_reg(v, inst, idx); v 72 arch/arm/mach-omap2/cm33xx.c return v; v 77 arch/arm/mach-omap2/cm33xx.c u32 v; v 79 arch/arm/mach-omap2/cm33xx.c v = am33xx_cm_read_reg(inst, idx); v 80 arch/arm/mach-omap2/cm33xx.c v &= mask; v 81 arch/arm/mach-omap2/cm33xx.c v >>= __ffs(mask); v 83 arch/arm/mach-omap2/cm33xx.c return v; v 96 arch/arm/mach-omap2/cm33xx.c u32 v = am33xx_cm_read_reg(inst, clkctrl_offs); v 97 arch/arm/mach-omap2/cm33xx.c v &= AM33XX_IDLEST_MASK; v 98 arch/arm/mach-omap2/cm33xx.c v >>= AM33XX_IDLEST_SHIFT; v 99 arch/arm/mach-omap2/cm33xx.c return v; v 112 arch/arm/mach-omap2/cm33xx.c u32 v; v 114 arch/arm/mach-omap2/cm33xx.c v = _clkctrl_idlest(inst, clkctrl_offs); v 116 arch/arm/mach-omap2/cm33xx.c return (v == CLKCTRL_IDLEST_FUNCTIONAL || v 117 arch/arm/mach-omap2/cm33xx.c v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; v 131 arch/arm/mach-omap2/cm33xx.c u32 v; v 133 arch/arm/mach-omap2/cm33xx.c v = am33xx_cm_read_reg(inst, cdoffs); v 134 arch/arm/mach-omap2/cm33xx.c v &= ~AM33XX_CLKTRCTRL_MASK; v 135 arch/arm/mach-omap2/cm33xx.c v |= c << AM33XX_CLKTRCTRL_SHIFT; v 136 arch/arm/mach-omap2/cm33xx.c am33xx_cm_write_reg(v, inst, cdoffs); v 151 arch/arm/mach-omap2/cm33xx.c u32 v; v 153 arch/arm/mach-omap2/cm33xx.c v = am33xx_cm_read_reg(inst, cdoffs); v 154 arch/arm/mach-omap2/cm33xx.c v &= AM33XX_CLKTRCTRL_MASK; v 155 arch/arm/mach-omap2/cm33xx.c v >>= AM33XX_CLKTRCTRL_SHIFT; v 157 arch/arm/mach-omap2/cm33xx.c return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false; v 276 arch/arm/mach-omap2/cm33xx.c u32 v; v 278 arch/arm/mach-omap2/cm33xx.c v = am33xx_cm_read_reg(inst, clkctrl_offs); v 279 arch/arm/mach-omap2/cm33xx.c v &= ~AM33XX_MODULEMODE_MASK; v 280 arch/arm/mach-omap2/cm33xx.c v |= mode << AM33XX_MODULEMODE_SHIFT; v 281 arch/arm/mach-omap2/cm33xx.c am33xx_cm_write_reg(v, inst, clkctrl_offs); v 294 arch/arm/mach-omap2/cm33xx.c u32 v; v 296 arch/arm/mach-omap2/cm33xx.c v = am33xx_cm_read_reg(inst, clkctrl_offs); v 297 arch/arm/mach-omap2/cm33xx.c v &= ~AM33XX_MODULEMODE_MASK; v 298 arch/arm/mach-omap2/cm33xx.c am33xx_cm_write_reg(v, inst, clkctrl_offs); v 34 arch/arm/mach-omap2/cm3xxx.c u32 v; v 36 arch/arm/mach-omap2/cm3xxx.c v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); v 37 arch/arm/mach-omap2/cm3xxx.c v &= ~mask; v 38 arch/arm/mach-omap2/cm3xxx.c v |= c << __ffs(mask); v 39 arch/arm/mach-omap2/cm3xxx.c omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); v 44 arch/arm/mach-omap2/cm3xxx.c u32 v; v 46 arch/arm/mach-omap2/cm3xxx.c v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); v 47 arch/arm/mach-omap2/cm3xxx.c v &= mask; v 48 arch/arm/mach-omap2/cm3xxx.c v >>= __ffs(mask); v 50 arch/arm/mach-omap2/cm3xxx.c return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; v 87 arch/arm/mach-omap2/cminst44xx.c u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); v 88 arch/arm/mach-omap2/cminst44xx.c v &= OMAP4430_IDLEST_MASK; v 89 arch/arm/mach-omap2/cminst44xx.c v >>= OMAP4430_IDLEST_SHIFT; v 90 arch/arm/mach-omap2/cminst44xx.c return v; v 104 arch/arm/mach-omap2/cminst44xx.c u32 v; v 106 arch/arm/mach-omap2/cminst44xx.c v = _clkctrl_idlest(part, inst, clkctrl_offs); v 108 arch/arm/mach-omap2/cminst44xx.c return (v == CLKCTRL_IDLEST_FUNCTIONAL || v 109 arch/arm/mach-omap2/cminst44xx.c v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; v 134 arch/arm/mach-omap2/cminst44xx.c u32 v; v 136 arch/arm/mach-omap2/cminst44xx.c v = omap4_cminst_read_inst_reg(part, inst, idx); v 137 arch/arm/mach-omap2/cminst44xx.c v &= ~mask; v 138 arch/arm/mach-omap2/cminst44xx.c v |= bits; v 139 arch/arm/mach-omap2/cminst44xx.c omap4_cminst_write_inst_reg(v, part, inst, idx); v 141 arch/arm/mach-omap2/cminst44xx.c return v; v 157 arch/arm/mach-omap2/cminst44xx.c u32 v; v 159 arch/arm/mach-omap2/cminst44xx.c v = omap4_cminst_read_inst_reg(part, inst, idx); v 160 arch/arm/mach-omap2/cminst44xx.c v &= mask; v 161 arch/arm/mach-omap2/cminst44xx.c v >>= __ffs(mask); v 163 arch/arm/mach-omap2/cminst44xx.c return v; v 182 arch/arm/mach-omap2/cminst44xx.c u32 v; v 184 arch/arm/mach-omap2/cminst44xx.c v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL); v 185 arch/arm/mach-omap2/cminst44xx.c v &= ~OMAP4430_CLKTRCTRL_MASK; v 186 arch/arm/mach-omap2/cminst44xx.c v |= c << OMAP4430_CLKTRCTRL_SHIFT; v 187 arch/arm/mach-omap2/cminst44xx.c omap4_cminst_write_inst_reg(v, part, inst, cdoffs + OMAP4_CM_CLKSTCTRL); v 201 arch/arm/mach-omap2/cminst44xx.c u32 v; v 203 arch/arm/mach-omap2/cminst44xx.c v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL); v 204 arch/arm/mach-omap2/cminst44xx.c v &= OMAP4430_CLKTRCTRL_MASK; v 205 arch/arm/mach-omap2/cminst44xx.c v >>= OMAP4430_CLKTRCTRL_SHIFT; v 207 arch/arm/mach-omap2/cminst44xx.c return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false; v 321 arch/arm/mach-omap2/cminst44xx.c u32 v; v 323 arch/arm/mach-omap2/cminst44xx.c v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); v 324 arch/arm/mach-omap2/cminst44xx.c v &= ~OMAP4430_MODULEMODE_MASK; v 325 arch/arm/mach-omap2/cminst44xx.c v |= mode << OMAP4430_MODULEMODE_SHIFT; v 326 arch/arm/mach-omap2/cminst44xx.c omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); v 339 arch/arm/mach-omap2/cminst44xx.c u32 v; v 341 arch/arm/mach-omap2/cminst44xx.c v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); v 342 arch/arm/mach-omap2/cminst44xx.c v &= ~OMAP4430_MODULEMODE_MASK; v 343 arch/arm/mach-omap2/cminst44xx.c omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); v 710 arch/arm/mach-omap2/control.c static int cpu_notifier(struct notifier_block *nb, unsigned long cmd, void *v) v 279 arch/arm/mach-omap2/display.c u32 v, irq_mask = 0; v 299 arch/arm/mach-omap2/display.c v = omap_hwmod_read(oh, DISPC_CONTROL); v 300 arch/arm/mach-omap2/display.c lcd_en = v & LCD_EN_MASK; v 301 arch/arm/mach-omap2/display.c digit_en = v & DIGIT_EN_MASK; v 305 arch/arm/mach-omap2/display.c v = omap_hwmod_read(oh, DISPC_CONTROL2); v 306 arch/arm/mach-omap2/display.c lcd2_en = v & LCD_EN_MASK; v 311 arch/arm/mach-omap2/display.c v = omap_hwmod_read(oh, DISPC_CONTROL3); v 312 arch/arm/mach-omap2/display.c lcd3_en = v & LCD_EN_MASK; v 346 arch/arm/mach-omap2/display.c v = omap_hwmod_read(oh, DISPC_CONTROL); v 347 arch/arm/mach-omap2/display.c v &= ~(LCD_EN_MASK | DIGIT_EN_MASK); v 348 arch/arm/mach-omap2/display.c omap_hwmod_write(v, oh, DISPC_CONTROL); v 352 arch/arm/mach-omap2/display.c v = omap_hwmod_read(oh, DISPC_CONTROL2); v 353 arch/arm/mach-omap2/display.c v &= ~LCD_EN_MASK; v 354 arch/arm/mach-omap2/display.c omap_hwmod_write(v, oh, DISPC_CONTROL2); v 359 arch/arm/mach-omap2/display.c v = omap_hwmod_read(oh, DISPC_CONTROL3); v 360 arch/arm/mach-omap2/display.c v &= ~LCD_EN_MASK; v 361 arch/arm/mach-omap2/display.c omap_hwmod_write(v, oh, DISPC_CONTROL3); v 39 arch/arm/mach-omap2/hdq1w.c u32 v; v 46 arch/arm/mach-omap2/hdq1w.c v = omap_hwmod_read(oh, HDQ_CTRL_STATUS_OFFSET); v 47 arch/arm/mach-omap2/hdq1w.c v |= 1 << HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT; v 48 arch/arm/mach-omap2/hdq1w.c omap_hwmod_write(v, oh, HDQ_CTRL_STATUS_OFFSET); v 38 arch/arm/mach-omap2/i2c.c u32 v; v 48 arch/arm/mach-omap2/i2c.c v = omap_hwmod_read(oh, i2c_con); v 49 arch/arm/mach-omap2/i2c.c v &= ~I2C_EN; v 50 arch/arm/mach-omap2/i2c.c omap_hwmod_write(v, oh, i2c_con); v 56 arch/arm/mach-omap2/i2c.c v = omap_hwmod_read(oh, i2c_con); v 57 arch/arm/mach-omap2/i2c.c v |= I2C_EN; v 58 arch/arm/mach-omap2/i2c.c omap_hwmod_write(v, oh, i2c_con); v 383 arch/arm/mach-omap2/io.c int v = -EINVAL; v 395 arch/arm/mach-omap2/io.c v = clk_set_rate(dpll3_m2_ck, rate); v 396 arch/arm/mach-omap2/io.c if (v) v 397 arch/arm/mach-omap2/io.c pr_err("dpll3_m2_clk rate change failed: %d\n", v); v 401 arch/arm/mach-omap2/io.c return v; v 47 arch/arm/mach-omap2/msdi.c u16 v = 0; v 54 arch/arm/mach-omap2/msdi.c v |= MSDI_CON_POW_MASK; v 55 arch/arm/mach-omap2/msdi.c v |= MSDI_TARGET_RESET_CLKD << MSDI_CON_CLKD_SHIFT; v 56 arch/arm/mach-omap2/msdi.c omap_hwmod_write(v, oh, MSDI_CON_OFFSET); v 71 arch/arm/mach-omap2/msdi.c v &= ~MSDI_CON_CLKD_MASK; v 72 arch/arm/mach-omap2/msdi.c omap_hwmod_write(v, oh, MSDI_CON_OFFSET); v 432 arch/arm/mach-omap2/omap-wakeupgen.c static int irq_notifier(struct notifier_block *self, unsigned long cmd, void *v) v 295 arch/arm/mach-omap2/omap_hwmod.c static void _write_sysconfig(u32 v, struct omap_hwmod *oh) v 305 arch/arm/mach-omap2/omap_hwmod.c oh->_sysc_cache = v; v 316 arch/arm/mach-omap2/omap_hwmod.c omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); v 333 arch/arm/mach-omap2/omap_hwmod.c u32 *v) v 350 arch/arm/mach-omap2/omap_hwmod.c *v &= ~mstandby_mask; v 351 arch/arm/mach-omap2/omap_hwmod.c *v |= __ffs(standbymode) << mstandby_shift; v 366 arch/arm/mach-omap2/omap_hwmod.c static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) v 383 arch/arm/mach-omap2/omap_hwmod.c *v &= ~sidle_mask; v 384 arch/arm/mach-omap2/omap_hwmod.c *v |= __ffs(idlemode) << sidle_shift; v 400 arch/arm/mach-omap2/omap_hwmod.c static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) v 417 arch/arm/mach-omap2/omap_hwmod.c *v &= ~clkact_mask; v 418 arch/arm/mach-omap2/omap_hwmod.c *v |= clockact << clkact_shift; v 431 arch/arm/mach-omap2/omap_hwmod.c static int _set_softreset(struct omap_hwmod *oh, u32 *v) v 446 arch/arm/mach-omap2/omap_hwmod.c *v |= softrst_mask; v 459 arch/arm/mach-omap2/omap_hwmod.c static int _clear_softreset(struct omap_hwmod *oh, u32 *v) v 476 arch/arm/mach-omap2/omap_hwmod.c *v &= ~softrst_mask; v 527 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 547 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 550 arch/arm/mach-omap2/omap_hwmod.c v |= dmadisable_mask; v 551 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 570 arch/arm/mach-omap2/omap_hwmod.c u32 *v) v 587 arch/arm/mach-omap2/omap_hwmod.c *v &= ~autoidle_mask; v 588 arch/arm/mach-omap2/omap_hwmod.c *v |= autoidle << autoidle_shift; v 600 arch/arm/mach-omap2/omap_hwmod.c static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) v 614 arch/arm/mach-omap2/omap_hwmod.c *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; v 617 arch/arm/mach-omap2/omap_hwmod.c _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); v 619 arch/arm/mach-omap2/omap_hwmod.c _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); v 633 arch/arm/mach-omap2/omap_hwmod.c static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) v 647 arch/arm/mach-omap2/omap_hwmod.c *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); v 650 arch/arm/mach-omap2/omap_hwmod.c _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); v 652 arch/arm/mach-omap2/omap_hwmod.c _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); v 1205 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 1224 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 1234 arch/arm/mach-omap2/omap_hwmod.c _enable_wakeup(oh, &v); v 1250 arch/arm/mach-omap2/omap_hwmod.c _set_slave_idlemode(oh, idlemode, &v); v 1260 arch/arm/mach-omap2/omap_hwmod.c _enable_wakeup(oh, &v); v 1266 arch/arm/mach-omap2/omap_hwmod.c _set_master_standbymode(oh, idlemode, &v); v 1276 arch/arm/mach-omap2/omap_hwmod.c _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v); v 1278 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 1287 arch/arm/mach-omap2/omap_hwmod.c _set_module_autoidle(oh, idlemode, &v); v 1288 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 1304 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 1309 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 1317 arch/arm/mach-omap2/omap_hwmod.c _enable_wakeup(oh, &v); v 1323 arch/arm/mach-omap2/omap_hwmod.c _set_slave_idlemode(oh, idlemode, &v); v 1332 arch/arm/mach-omap2/omap_hwmod.c _enable_wakeup(oh, &v); v 1338 arch/arm/mach-omap2/omap_hwmod.c _set_master_standbymode(oh, idlemode, &v); v 1342 arch/arm/mach-omap2/omap_hwmod.c if (oh->_sysc_cache != v) v 1343 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 1355 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 1361 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 1365 arch/arm/mach-omap2/omap_hwmod.c _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); v 1368 arch/arm/mach-omap2/omap_hwmod.c _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); v 1371 arch/arm/mach-omap2/omap_hwmod.c _set_module_autoidle(oh, 1, &v); v 1373 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 1681 arch/arm/mach-omap2/omap_hwmod.c int v; v 1699 arch/arm/mach-omap2/omap_hwmod.c v = _omap4_wait_target_disable(oh); v 1700 arch/arm/mach-omap2/omap_hwmod.c if (v) v 1725 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 1746 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 1747 arch/arm/mach-omap2/omap_hwmod.c ret = _set_softreset(oh, &v); v 1751 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 1766 arch/arm/mach-omap2/omap_hwmod.c ret = _clear_softreset(oh, &v); v 1770 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 2978 arch/arm/mach-omap2/omap_hwmod.c void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) v 2981 arch/arm/mach-omap2/omap_hwmod.c writew_relaxed(v, oh->_mpu_rt_va + reg_offs); v 2983 arch/arm/mach-omap2/omap_hwmod.c writel_relaxed(v, oh->_mpu_rt_va + reg_offs); v 2997 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 3003 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 3004 arch/arm/mach-omap2/omap_hwmod.c ret = _set_softreset(oh, &v); v 3007 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 3009 arch/arm/mach-omap2/omap_hwmod.c ret = _clear_softreset(oh, &v); v 3012 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 3886 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 3892 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 3893 arch/arm/mach-omap2/omap_hwmod.c _enable_wakeup(oh, &v); v 3894 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 3918 arch/arm/mach-omap2/omap_hwmod.c u32 v; v 3924 arch/arm/mach-omap2/omap_hwmod.c v = oh->_sysc_cache; v 3925 arch/arm/mach-omap2/omap_hwmod.c _disable_wakeup(oh, &v); v 3926 arch/arm/mach-omap2/omap_hwmod.c _write_sysconfig(v, oh); v 637 arch/arm/mach-omap2/omap_hwmod.h void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); v 202 arch/arm/mach-omap2/pdata-quirks.c u32 v; v 204 arch/arm/mach-omap2/pdata-quirks.c v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); v 205 arch/arm/mach-omap2/pdata-quirks.c v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR | v 207 arch/arm/mach-omap2/pdata-quirks.c omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); v 213 arch/arm/mach-omap2/pdata-quirks.c u32 v; v 215 arch/arm/mach-omap2/pdata-quirks.c v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); v 216 arch/arm/mach-omap2/pdata-quirks.c v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR); v 217 arch/arm/mach-omap2/pdata-quirks.c omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); v 228 arch/arm/mach-omap2/pdata-quirks.c u32 v; v 230 arch/arm/mach-omap2/pdata-quirks.c v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); v 231 arch/arm/mach-omap2/pdata-quirks.c v &= ~AM35XX_CPGMACSS_SW_RST; v 232 arch/arm/mach-omap2/pdata-quirks.c omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET); v 337 arch/arm/mach-omap2/powerdomain.c static int cpu_notifier(struct notifier_block *nb, unsigned long cmd, void *v) v 40 arch/arm/mach-omap2/prcm_mpu44xx.c u32 v; v 42 arch/arm/mach-omap2/prcm_mpu44xx.c v = omap4_prcm_mpu_read_inst_reg(inst, reg); v 43 arch/arm/mach-omap2/prcm_mpu44xx.c v &= ~mask; v 44 arch/arm/mach-omap2/prcm_mpu44xx.c v |= bits; v 45 arch/arm/mach-omap2/prcm_mpu44xx.c omap4_prcm_mpu_write_inst_reg(v, inst, reg); v 47 arch/arm/mach-omap2/prcm_mpu44xx.c return v; v 58 arch/arm/mach-omap2/prm2xxx.c u32 v; v 60 arch/arm/mach-omap2/prm2xxx.c v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); v 64 arch/arm/mach-omap2/prm2xxx.c if (v & (1 << p->reg_shift)) v 159 arch/arm/mach-omap2/prm2xxx_3xxx.c u32 v; v 161 arch/arm/mach-omap2/prm2xxx_3xxx.c v = pwrst << __ffs(OMAP_LOGICRETSTATE_MASK); v 162 arch/arm/mach-omap2/prm2xxx_3xxx.c omap2_prm_rmw_mod_reg_bits(OMAP_LOGICRETSTATE_MASK, v, pwrdm->prcm_offs, v 67 arch/arm/mach-omap2/prm2xxx_3xxx.h u32 v; v 69 arch/arm/mach-omap2/prm2xxx_3xxx.h v = omap2_prm_read_mod_reg(module, idx); v 70 arch/arm/mach-omap2/prm2xxx_3xxx.h v &= ~mask; v 71 arch/arm/mach-omap2/prm2xxx_3xxx.h v |= bits; v 72 arch/arm/mach-omap2/prm2xxx_3xxx.h omap2_prm_write_mod_reg(v, module, idx); v 74 arch/arm/mach-omap2/prm2xxx_3xxx.h return v; v 80 arch/arm/mach-omap2/prm2xxx_3xxx.h u32 v; v 82 arch/arm/mach-omap2/prm2xxx_3xxx.h v = omap2_prm_read_mod_reg(domain, idx); v 83 arch/arm/mach-omap2/prm2xxx_3xxx.h v &= mask; v 84 arch/arm/mach-omap2/prm2xxx_3xxx.h v >>= __ffs(mask); v 86 arch/arm/mach-omap2/prm2xxx_3xxx.h return v; v 45 arch/arm/mach-omap2/prm33xx.c u32 v; v 47 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(inst, idx); v 48 arch/arm/mach-omap2/prm33xx.c v &= ~mask; v 49 arch/arm/mach-omap2/prm33xx.c v |= bits; v 50 arch/arm/mach-omap2/prm33xx.c am33xx_prm_write_reg(v, inst, idx); v 52 arch/arm/mach-omap2/prm33xx.c return v; v 70 arch/arm/mach-omap2/prm33xx.c u32 v; v 72 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(inst, rstctrl_offs); v 73 arch/arm/mach-omap2/prm33xx.c v &= 1 << shift; v 74 arch/arm/mach-omap2/prm33xx.c v >>= shift; v 76 arch/arm/mach-omap2/prm33xx.c return v; v 159 arch/arm/mach-omap2/prm33xx.c u32 v; v 161 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); v 162 arch/arm/mach-omap2/prm33xx.c v &= OMAP_POWERSTATE_MASK; v 163 arch/arm/mach-omap2/prm33xx.c v >>= OMAP_POWERSTATE_SHIFT; v 165 arch/arm/mach-omap2/prm33xx.c return v; v 170 arch/arm/mach-omap2/prm33xx.c u32 v; v 172 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); v 173 arch/arm/mach-omap2/prm33xx.c v &= OMAP_POWERSTATEST_MASK; v 174 arch/arm/mach-omap2/prm33xx.c v >>= OMAP_POWERSTATEST_SHIFT; v 176 arch/arm/mach-omap2/prm33xx.c return v; v 211 arch/arm/mach-omap2/prm33xx.c u32 v; v 213 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); v 214 arch/arm/mach-omap2/prm33xx.c v &= AM33XX_LOGICSTATEST_MASK; v 215 arch/arm/mach-omap2/prm33xx.c v >>= AM33XX_LOGICSTATEST_SHIFT; v 217 arch/arm/mach-omap2/prm33xx.c return v; v 222 arch/arm/mach-omap2/prm33xx.c u32 v, m; v 228 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); v 229 arch/arm/mach-omap2/prm33xx.c v &= m; v 230 arch/arm/mach-omap2/prm33xx.c v >>= __ffs(m); v 232 arch/arm/mach-omap2/prm33xx.c return v; v 267 arch/arm/mach-omap2/prm33xx.c u32 m, v; v 273 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); v 274 arch/arm/mach-omap2/prm33xx.c v &= m; v 275 arch/arm/mach-omap2/prm33xx.c v >>= __ffs(m); v 277 arch/arm/mach-omap2/prm33xx.c return v; v 282 arch/arm/mach-omap2/prm33xx.c u32 m, v; v 288 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); v 289 arch/arm/mach-omap2/prm33xx.c v &= m; v 290 arch/arm/mach-omap2/prm33xx.c v >>= __ffs(m); v 292 arch/arm/mach-omap2/prm33xx.c return v; v 450 arch/arm/mach-omap2/prm3xxx.c u32 v; v 452 arch/arm/mach-omap2/prm3xxx.c v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); v 456 arch/arm/mach-omap2/prm3xxx.c if (v & (1 << p->reg_shift)) v 110 arch/arm/mach-omap2/prm44xx.c u32 v; v 112 arch/arm/mach-omap2/prm44xx.c v = omap4_prm_read_inst_reg(inst, reg); v 113 arch/arm/mach-omap2/prm44xx.c v &= ~mask; v 114 arch/arm/mach-omap2/prm44xx.c v |= bits; v 115 arch/arm/mach-omap2/prm44xx.c omap4_prm_write_inst_reg(v, inst, reg); v 117 arch/arm/mach-omap2/prm44xx.c return v; v 374 arch/arm/mach-omap2/prm44xx.c u32 v; v 381 arch/arm/mach-omap2/prm44xx.c v = omap4_prm_read_inst_reg(inst, v 386 arch/arm/mach-omap2/prm44xx.c if (v & (1 << p->reg_shift)) v 438 arch/arm/mach-omap2/prm44xx.c u32 v; v 440 arch/arm/mach-omap2/prm44xx.c v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, v 442 arch/arm/mach-omap2/prm44xx.c v &= OMAP_POWERSTATE_MASK; v 443 arch/arm/mach-omap2/prm44xx.c v >>= OMAP_POWERSTATE_SHIFT; v 445 arch/arm/mach-omap2/prm44xx.c return v; v 450 arch/arm/mach-omap2/prm44xx.c u32 v; v 452 arch/arm/mach-omap2/prm44xx.c v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, v 454 arch/arm/mach-omap2/prm44xx.c v &= OMAP_POWERSTATEST_MASK; v 455 arch/arm/mach-omap2/prm44xx.c v >>= OMAP_POWERSTATEST_SHIFT; v 457 arch/arm/mach-omap2/prm44xx.c return v; v 462 arch/arm/mach-omap2/prm44xx.c u32 v; v 464 arch/arm/mach-omap2/prm44xx.c v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, v 466 arch/arm/mach-omap2/prm44xx.c v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; v 467 arch/arm/mach-omap2/prm44xx.c v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; v 469 arch/arm/mach-omap2/prm44xx.c return v; v 492 arch/arm/mach-omap2/prm44xx.c u32 v; v 494 arch/arm/mach-omap2/prm44xx.c v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); v 495 arch/arm/mach-omap2/prm44xx.c omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, v 532 arch/arm/mach-omap2/prm44xx.c u32 v; v 534 arch/arm/mach-omap2/prm44xx.c v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, v 536 arch/arm/mach-omap2/prm44xx.c v &= OMAP4430_LOGICSTATEST_MASK; v 537 arch/arm/mach-omap2/prm44xx.c v >>= OMAP4430_LOGICSTATEST_SHIFT; v 539 arch/arm/mach-omap2/prm44xx.c return v; v 544 arch/arm/mach-omap2/prm44xx.c u32 v; v 546 arch/arm/mach-omap2/prm44xx.c v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, v 548 arch/arm/mach-omap2/prm44xx.c v &= OMAP4430_LOGICRETSTATE_MASK; v 549 arch/arm/mach-omap2/prm44xx.c v >>= OMAP4430_LOGICRETSTATE_SHIFT; v 551 arch/arm/mach-omap2/prm44xx.c return v; v 584 arch/arm/mach-omap2/prm44xx.c u32 m, v; v 588 arch/arm/mach-omap2/prm44xx.c v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, v 590 arch/arm/mach-omap2/prm44xx.c v &= m; v 591 arch/arm/mach-omap2/prm44xx.c v >>= __ffs(m); v 593 arch/arm/mach-omap2/prm44xx.c return v; v 598 arch/arm/mach-omap2/prm44xx.c u32 m, v; v 602 arch/arm/mach-omap2/prm44xx.c v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, v 604 arch/arm/mach-omap2/prm44xx.c v &= m; v 605 arch/arm/mach-omap2/prm44xx.c v >>= __ffs(m); v 607 arch/arm/mach-omap2/prm44xx.c return v; v 770 arch/arm/mach-omap2/prm44xx.c static int cpu_notifier(struct notifier_block *nb, unsigned long cmd, void *v) v 79 arch/arm/mach-omap2/prminst44xx.c u32 v; v 81 arch/arm/mach-omap2/prminst44xx.c v = omap4_prminst_read_inst_reg(part, inst, idx); v 82 arch/arm/mach-omap2/prminst44xx.c v &= ~mask; v 83 arch/arm/mach-omap2/prminst44xx.c v |= bits; v 84 arch/arm/mach-omap2/prminst44xx.c omap4_prminst_write_inst_reg(v, part, inst, idx); v 86 arch/arm/mach-omap2/prminst44xx.c return v; v 102 arch/arm/mach-omap2/prminst44xx.c u32 v; v 104 arch/arm/mach-omap2/prminst44xx.c v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); v 105 arch/arm/mach-omap2/prminst44xx.c v &= 1 << shift; v 106 arch/arm/mach-omap2/prminst44xx.c v >>= shift; v 108 arch/arm/mach-omap2/prminst44xx.c return v; v 180 arch/arm/mach-omap2/prminst44xx.c u32 v; v 186 arch/arm/mach-omap2/prminst44xx.c v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, inst, v 188 arch/arm/mach-omap2/prminst44xx.c v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; v 189 arch/arm/mach-omap2/prminst44xx.c omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, v 193 arch/arm/mach-omap2/prminst44xx.c v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, v 49 arch/arm/mach-omap2/sr_device.c u32 v; v 59 arch/arm/mach-omap2/sr_device.c v = omap_ctrl_readb(offset) | v 63 arch/arm/mach-omap2/sr_device.c v = omap_ctrl_readl(volt_data[i].sr_efuse_offs); v 74 arch/arm/mach-omap2/sr_device.c if (v == 0) v 77 arch/arm/mach-omap2/sr_device.c nvalue_table[j].nvalue = v; v 333 arch/arm/mach-omap2/voltage.c struct voltagedomain **v; v 336 arch/arm/mach-omap2/voltage.c for (v = voltdms; *v; v++) v 337 arch/arm/mach-omap2/voltage.c _voltdm_register(*v); v 121 arch/arm/mach-pxa/lubbock.c unsigned long m = mask, v = set; v 122 arch/arm/mach-pxa/lubbock.c lubbock_misc_wr_gc->set_multiple(lubbock_misc_wr_gc, &m, &v); v 168 arch/arm/mach-pxa/viper.c const char *v; v 171 arch/arm/mach-pxa/viper.c v = "1.0"; divisor = 0xfff; v 173 arch/arm/mach-pxa/viper.c v = "1.1"; divisor = 0xde5; v 175 arch/arm/mach-pxa/viper.c v = "1.3"; divisor = 0x325; v 179 arch/arm/mach-pxa/viper.c v, (int)khz / 1000, (int)khz % 1000); v 92 arch/arm/mach-rpc/ecard.c static inline unsigned short ecard_getu16(unsigned char *v) v 94 arch/arm/mach-rpc/ecard.c return v[0] | v[1] << 8; v 97 arch/arm/mach-rpc/ecard.c static inline signed long ecard_gets24(unsigned char *v) v 99 arch/arm/mach-rpc/ecard.c return v[0] | v[1] << 8 | v[2] << 16 | ((v[2] & 0x80) ? 0xff000000 : 0); v 650 arch/arm/mach-rpc/ecard.c static int ecard_devices_proc_show(struct seq_file *m, void *v) v 48 arch/arm/mach-rpc/include/mach/acornfb.h u_int rr, v, p; v 53 arch/arm/mach-rpc/include/mach/acornfb.h v = (rr + pixclk / 2) / pixclk; v 55 arch/arm/mach-rpc/include/mach/acornfb.h if (v > 32 || v < 2) v 58 arch/arm/mach-rpc/include/mach/acornfb.h p = (rr + v / 2) / v; v 67 arch/arm/mach-rpc/include/mach/acornfb.h best_v = v - 1; v 56 arch/arm/mach-rpc/include/mach/uncompress.h #define palette_write(v) *(unsigned long *)(IO_START+0x00400000) = 0x00000000|((v) & 0x00ffffff) v 116 arch/arm/mach-s3c24xx/include/mach/io.h unsigned long v = value; \ v 121 arch/arm/mach-s3c24xx/include/mach/io.h : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ v 125 arch/arm/mach-s3c24xx/include/mach/io.h : : "r" (v), \ v 131 arch/arm/mach-s3c24xx/include/mach/io.h : : "r" (v), \ v 136 arch/arm/mach-s3c24xx/include/mach/io.h : : "r" (v), "r" ((port))); \ v 169 arch/arm/mach-s3c24xx/include/mach/io.h unsigned long v = value; \ v 173 arch/arm/mach-s3c24xx/include/mach/io.h : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ v 177 arch/arm/mach-s3c24xx/include/mach/io.h : : "r" (v), "r" ((port))); \ v 199 arch/arm/mach-s3c24xx/include/mach/io.h #define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) v 200 arch/arm/mach-s3c24xx/include/mach/io.h #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) v 201 arch/arm/mach-s3c24xx/include/mach/io.h #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) v 102 arch/arm/mach-s3c24xx/iotiming-s3c2410.c unsigned long *v, int shift) v 128 arch/arm/mach-s3c24xx/iotiming-s3c2410.c *v |= val << shift; v 132 arch/arm/mach-s3c24xx/iotiming-s3c2410.c int calc_tacp(unsigned int cyc, unsigned long hclk, unsigned long *v) v 150 arch/arm/mach-s3c24xx/iotiming-s3c2410.c unsigned long hclk_tns, unsigned long *v) v 200 arch/arm/mach-s3c24xx/iotiming-s3c2410.c *v |= val << 8; v 82 arch/arm/mach-sa1100/assabet.c unsigned long m = mask, v = val; v 84 arch/arm/mach-sa1100/assabet.c assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v); v 28 arch/arm/mach-sa1100/include/mach/neponset.h #define neponset_ncr_set(v) neponset_ncr_frob(0, v) v 29 arch/arm/mach-sa1100/include/mach/neponset.h #define neponset_ncr_clear(v) neponset_ncr_frob(v, 0) v 126 arch/arm/mach-sa1100/neponset.c unsigned long m = mask, v = val; v 129 arch/arm/mach-sa1100/neponset.c n->gpio[0]->set_multiple(n->gpio[0], &m, &v); v 90 arch/arm/mach-shmobile/platsmp-apmu.c unsigned int v; v 96 arch/arm/mach-shmobile/platsmp-apmu.c : "=&r" (v) v 109 arch/arm/mach-shmobile/platsmp-apmu.c : "=&r" (v) v 158 arch/arm/mach-shmobile/platsmp-apmu.c unsigned int v; v 166 arch/arm/mach-shmobile/platsmp-apmu.c : "=&r" (v) v 20 arch/arm/mach-spear/hotplug.c unsigned int v; v 34 arch/arm/mach-spear/hotplug.c : "=&r" (v) v 41 arch/arm/mach-spear/hotplug.c unsigned int v; v 49 arch/arm/mach-spear/hotplug.c : "=&r" (v) v 46 arch/arm/mach-tegra/irq.c unsigned long cmd, void *v) v 127 arch/arm/mach-zx/platsmp.c unsigned int v; v 141 arch/arm/mach-zx/platsmp.c : "=&r" (v) v 130 arch/arm/mm/alignment.c static int alignment_proc_show(struct seq_file *m, void *v) v 216 arch/arm/mm/alignment.c unsigned int err = 0, v, a = addr; \ v 217 arch/arm/mm/alignment.c __get8_unaligned_check(ins,v,a,err); \ v 218 arch/arm/mm/alignment.c val = v << ((BE) ? 8 : 0); \ v 219 arch/arm/mm/alignment.c __get8_unaligned_check(ins,v,a,err); \ v 220 arch/arm/mm/alignment.c val |= v << ((BE) ? 0 : 8); \ v 233 arch/arm/mm/alignment.c unsigned int err = 0, v, a = addr; \ v 234 arch/arm/mm/alignment.c __get8_unaligned_check(ins,v,a,err); \ v 235 arch/arm/mm/alignment.c val = v << ((BE) ? 24 : 0); \ v 236 arch/arm/mm/alignment.c __get8_unaligned_check(ins,v,a,err); \ v 237 arch/arm/mm/alignment.c val |= v << ((BE) ? 16 : 8); \ v 238 arch/arm/mm/alignment.c __get8_unaligned_check(ins,v,a,err); \ v 239 arch/arm/mm/alignment.c val |= v << ((BE) ? 8 : 16); \ v 240 arch/arm/mm/alignment.c __get8_unaligned_check(ins,v,a,err); \ v 241 arch/arm/mm/alignment.c val |= v << ((BE) ? 0 : 24); \ v 254 arch/arm/mm/alignment.c unsigned int err = 0, v = val, a = addr; \ v 272 arch/arm/mm/alignment.c : "=r" (err), "=&r" (v), "=&r" (a) \ v 273 arch/arm/mm/alignment.c : "0" (err), "1" (v), "2" (a)); \ v 286 arch/arm/mm/alignment.c unsigned int err = 0, v = val, a = addr; \ v 314 arch/arm/mm/alignment.c : "=r" (err), "=&r" (v), "=&r" (a) \ v 315 arch/arm/mm/alignment.c : "0" (err), "1" (v), "2" (a)); \ v 233 arch/arm/mm/fault-armv.c unsigned long v = 1; v 247 arch/arm/mm/fault-armv.c v = check_writebuffer(p1, p2); v 260 arch/arm/mm/fault-armv.c if (v) { v 659 arch/arm/mm/mmu.c pteval_t v = pgprot_val(protection_map[i]); v 660 arch/arm/mm/mmu.c protection_map[i] = __pgprot(v | user_pgprot); v 47 arch/arm/mm/pmsa-v7.c static inline void rgnr_write(u32 v) v 49 arch/arm/mm/pmsa-v7.c write_sysreg(v, RNGNR); v 55 arch/arm/mm/pmsa-v7.c static inline void dracr_write(u32 v) v 57 arch/arm/mm/pmsa-v7.c write_sysreg(v, DRACR); v 61 arch/arm/mm/pmsa-v7.c static inline void drsr_write(u32 v) v 63 arch/arm/mm/pmsa-v7.c write_sysreg(v, DRSR); v 67 arch/arm/mm/pmsa-v7.c static inline void drbar_write(u32 v) v 69 arch/arm/mm/pmsa-v7.c write_sysreg(v, DRBAR); v 79 arch/arm/mm/pmsa-v7.c static inline void iracr_write(u32 v) v 81 arch/arm/mm/pmsa-v7.c write_sysreg(v, IRACR); v 85 arch/arm/mm/pmsa-v7.c static inline void irsr_write(u32 v) v 87 arch/arm/mm/pmsa-v7.c write_sysreg(v, IRSR); v 91 arch/arm/mm/pmsa-v7.c static inline void irbar_write(u32 v) v 93 arch/arm/mm/pmsa-v7.c write_sysreg(v, IRBAR); v 103 arch/arm/mm/pmsa-v7.c static inline void rgnr_write(u32 v) v 105 arch/arm/mm/pmsa-v7.c writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv7_RNR); v 111 arch/arm/mm/pmsa-v7.c static inline void dracr_write(u32 v) v 115 arch/arm/mm/pmsa-v7.c writel_relaxed((v << 16) | rsr, BASEADDR_V7M_SCB + PMSAv7_RASR); v 119 arch/arm/mm/pmsa-v7.c static inline void drsr_write(u32 v) v 123 arch/arm/mm/pmsa-v7.c writel_relaxed(v | racr, BASEADDR_V7M_SCB + PMSAv7_RASR); v 127 arch/arm/mm/pmsa-v7.c static inline void drbar_write(u32 v) v 129 arch/arm/mm/pmsa-v7.c writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv7_RBAR); v 139 arch/arm/mm/pmsa-v7.c static inline void iracr_write(u32 v) {} v 140 arch/arm/mm/pmsa-v7.c static inline void irsr_write(u32 v) {} v 141 arch/arm/mm/pmsa-v7.c static inline void irbar_write(u32 v) {} v 35 arch/arm/mm/pmsa-v8.c static inline void prsel_write(u32 v) v 37 arch/arm/mm/pmsa-v8.c write_sysreg(v, PRSEL); v 40 arch/arm/mm/pmsa-v8.c static inline void prbar_write(u32 v) v 42 arch/arm/mm/pmsa-v8.c write_sysreg(v, PRBAR); v 45 arch/arm/mm/pmsa-v8.c static inline void prlar_write(u32 v) v 47 arch/arm/mm/pmsa-v8.c write_sysreg(v, PRLAR); v 61 arch/arm/mm/pmsa-v8.c static inline void prsel_write(u32 v) v 63 arch/arm/mm/pmsa-v8.c writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RNR); v 66 arch/arm/mm/pmsa-v8.c static inline void prbar_write(u32 v) v 68 arch/arm/mm/pmsa-v8.c writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RBAR); v 71 arch/arm/mm/pmsa-v8.c static inline void prlar_write(u32 v) v 73 arch/arm/mm/pmsa-v8.c writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RLAR); v 7 arch/arm/mm/ptdump_debugfs.c static int ptdump_show(struct seq_file *m, void *v) v 244 arch/arm/net/bpf_jit_32.c #define imm12val(v, s) (rol32(v, (s)) | (s) << 7) v 247 arch/arm/net/bpf_jit_32.c u32 v = (x); \ v 248 arch/arm/net/bpf_jit_32.c if (!(v & ~0x000000ff)) \ v 249 arch/arm/net/bpf_jit_32.c r = imm12val(v, 0); \ v 250 arch/arm/net/bpf_jit_32.c else if (!(v & ~0xc000003f)) \ v 251 arch/arm/net/bpf_jit_32.c r = imm12val(v, 2); \ v 252 arch/arm/net/bpf_jit_32.c else if (!(v & ~0xf000000f)) \ v 253 arch/arm/net/bpf_jit_32.c r = imm12val(v, 4); \ v 254 arch/arm/net/bpf_jit_32.c else if (!(v & ~0xfc000003)) \ v 255 arch/arm/net/bpf_jit_32.c r = imm12val(v, 6); \ v 256 arch/arm/net/bpf_jit_32.c else if (!(v & ~0xff000000)) \ v 257 arch/arm/net/bpf_jit_32.c r = imm12val(v, 8); \ v 258 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x3fc00000)) \ v 259 arch/arm/net/bpf_jit_32.c r = imm12val(v, 10); \ v 260 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x0ff00000)) \ v 261 arch/arm/net/bpf_jit_32.c r = imm12val(v, 12); \ v 262 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x03fc0000)) \ v 263 arch/arm/net/bpf_jit_32.c r = imm12val(v, 14); \ v 264 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x00ff0000)) \ v 265 arch/arm/net/bpf_jit_32.c r = imm12val(v, 16); \ v 266 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x003fc000)) \ v 267 arch/arm/net/bpf_jit_32.c r = imm12val(v, 18); \ v 268 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x000ff000)) \ v 269 arch/arm/net/bpf_jit_32.c r = imm12val(v, 20); \ v 270 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x0003fc00)) \ v 271 arch/arm/net/bpf_jit_32.c r = imm12val(v, 22); \ v 272 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x0000ff00)) \ v 273 arch/arm/net/bpf_jit_32.c r = imm12val(v, 24); \ v 274 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x00003fc0)) \ v 275 arch/arm/net/bpf_jit_32.c r = imm12val(v, 26); \ v 276 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x00000ff0)) \ v 277 arch/arm/net/bpf_jit_32.c r = imm12val(v, 28); \ v 278 arch/arm/net/bpf_jit_32.c else if (!(v & ~0x000003fc)) \ v 279 arch/arm/net/bpf_jit_32.c r = imm12val(v, 30); \ v 48 arch/arm/nwfpe/fpmodule.c static int nwfpe_notify(struct notifier_block *self, unsigned long cmd, void *v) v 50 arch/arm/nwfpe/fpmodule.c struct thread_info *thread = v; v 387 arch/arm/plat-orion/gpio.c u32 v; v 389 arch/arm/plat-orion/gpio.c v = readl(GPIO_IN_POL(ochip)) ^ readl(GPIO_DATA_IN(ochip)); v 395 arch/arm/plat-orion/gpio.c if (v & (1 << pin)) v 181 arch/arm/plat-samsung/adc.c unsigned v, unsigned u, unsigned *left) v 183 arch/arm/plat-samsung/adc.c client->result = v; v 22 arch/arm/plat-versatile/hotplug.c unsigned int v; v 36 arch/arm/plat-versatile/hotplug.c : "=&r" (v) v 43 arch/arm/plat-versatile/hotplug.c unsigned int v; v 52 arch/arm/plat-versatile/hotplug.c : "=&r" (v) v 33 arch/arm/vfp/vfp.h u32 v; v 39 arch/arm/vfp/vfp.h : "=r" (v) : "r" (val) : "cc"); v 41 arch/arm/vfp/vfp.h return v; v 177 arch/arm/vfp/vfp.h #define vfp_single_packed_sign(v) ((v) & 0x80000000) v 178 arch/arm/vfp/vfp.h #define vfp_single_packed_negate(v) ((v) ^ 0x80000000) v 179 arch/arm/vfp/vfp.h #define vfp_single_packed_abs(v) ((v) & ~0x80000000) v 180 arch/arm/vfp/vfp.h #define vfp_single_packed_exponent(v) (((v) >> VFP_SINGLE_MANTISSA_BITS) & ((1 << VFP_SINGLE_EXPONENT_BITS) - 1)) v 181 arch/arm/vfp/vfp.h #define vfp_single_packed_mantissa(v) ((v) & ((1 << VFP_SINGLE_MANTISSA_BITS) - 1)) v 286 arch/arm/vfp/vfp.h #define vfp_double_packed_sign(v) ((v) & (1ULL << 63)) v 287 arch/arm/vfp/vfp.h #define vfp_double_packed_negate(v) ((v) ^ (1ULL << 63)) v 288 arch/arm/vfp/vfp.h #define vfp_double_packed_abs(v) ((v) & ~(1ULL << 63)) v 289 arch/arm/vfp/vfp.h #define vfp_double_packed_exponent(v) (((v) >> VFP_DOUBLE_MANTISSA_BITS) & ((1 << VFP_DOUBLE_EXPONENT_BITS) - 1)) v 290 arch/arm/vfp/vfp.h #define vfp_double_packed_mantissa(v) ((v) & ((1ULL << VFP_DOUBLE_MANTISSA_BITS) - 1)) v 159 arch/arm/vfp/vfpmodule.c static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) v 161 arch/arm/vfp/vfpmodule.c struct thread_info *thread = v; v 485 arch/arm/vfp/vfpmodule.c void *v) v 310 arch/arm/vfp/vfpsingle.c u64 v = (u64)a << 31; v 311 arch/arm/vfp/vfpsingle.c do_div(v, z); v 312 arch/arm/vfp/vfpsingle.c return v + (z >> 1); v 899 arch/arm/vfp/vfpsingle.c s32 v; v 901 arch/arm/vfp/vfpsingle.c v = vfp_get_float(sn); v 902 arch/arm/vfp/vfpsingle.c pr_debug("VFP: s%u = %08x\n", sn, v); v 903 arch/arm/vfp/vfpsingle.c vfp_single_unpack(&vsn, v); v 915 arch/arm/vfp/vfpsingle.c v = vfp_get_float(sd); v 916 arch/arm/vfp/vfpsingle.c pr_debug("VFP: s%u = %08x\n", sd, v); v 917 arch/arm/vfp/vfpsingle.c vfp_single_unpack(&vsn, v); v 20 arch/arm64/include/asm/arch_gicv3.h #define write_gicreg(v, r) write_sysreg_s(v, SYS_ ## r) v 123 arch/arm64/include/asm/arch_gicv3.h #define gic_write_irouter(v, c) writeq_relaxed(v, c) v 125 arch/arm64/include/asm/arch_gicv3.h #define gic_write_lpir(v, c) writeq_relaxed(v, c) v 130 arch/arm64/include/asm/arch_gicv3.h #define gits_write_baser(v, c) writeq_relaxed(v, c) v 133 arch/arm64/include/asm/arch_gicv3.h #define gits_write_cbaser(v, c) writeq_relaxed(v, c) v 135 arch/arm64/include/asm/arch_gicv3.h #define gits_write_cwriter(v, c) writeq_relaxed(v, c) v 138 arch/arm64/include/asm/arch_gicv3.h #define gicr_write_propbaser(v, c) writeq_relaxed(v, c) v 140 arch/arm64/include/asm/arch_gicv3.h #define gicr_write_pendbaser(v, c) writeq_relaxed(v, c) v 143 arch/arm64/include/asm/arch_gicv3.h #define gits_write_vpropbaser(v, c) writeq_relaxed(v, c) v 145 arch/arm64/include/asm/arch_gicv3.h #define gits_write_vpendbaser(v, c) writeq_relaxed(v, c) v 20 arch/arm64/include/asm/atomic.h static inline void arch_##op(int i, atomic_t *v) \ v 22 arch/arm64/include/asm/atomic.h __lse_ll_sc_body(op, i, v); \ v 35 arch/arm64/include/asm/atomic.h static inline int arch_##op##name(int i, atomic_t *v) \ v 37 arch/arm64/include/asm/atomic.h return __lse_ll_sc_body(op##name, i, v); \ v 59 arch/arm64/include/asm/atomic.h static inline void arch_##op(long i, atomic64_t *v) \ v 61 arch/arm64/include/asm/atomic.h __lse_ll_sc_body(op, i, v); \ v 74 arch/arm64/include/asm/atomic.h static inline long arch_##op##name(long i, atomic64_t *v) \ v 76 arch/arm64/include/asm/atomic.h return __lse_ll_sc_body(op##name, i, v); \ v 97 arch/arm64/include/asm/atomic.h static inline long arch_atomic64_dec_if_positive(atomic64_t *v) v 99 arch/arm64/include/asm/atomic.h return __lse_ll_sc_body(atomic64_dec_if_positive, v); v 104 arch/arm64/include/asm/atomic.h #define arch_atomic_read(v) READ_ONCE((v)->counter) v 105 arch/arm64/include/asm/atomic.h #define arch_atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 147 arch/arm64/include/asm/atomic.h #define arch_atomic_xchg_relaxed(v, new) \ v 148 arch/arm64/include/asm/atomic.h arch_xchg_relaxed(&((v)->counter), (new)) v 149 arch/arm64/include/asm/atomic.h #define arch_atomic_xchg_acquire(v, new) \ v 150 arch/arm64/include/asm/atomic.h arch_xchg_acquire(&((v)->counter), (new)) v 151 arch/arm64/include/asm/atomic.h #define arch_atomic_xchg_release(v, new) \ v 152 arch/arm64/include/asm/atomic.h arch_xchg_release(&((v)->counter), (new)) v 153 arch/arm64/include/asm/atomic.h #define arch_atomic_xchg(v, new) \ v 154 arch/arm64/include/asm/atomic.h arch_xchg(&((v)->counter), (new)) v 156 arch/arm64/include/asm/atomic.h #define arch_atomic_cmpxchg_relaxed(v, old, new) \ v 157 arch/arm64/include/asm/atomic.h arch_cmpxchg_relaxed(&((v)->counter), (old), (new)) v 158 arch/arm64/include/asm/atomic.h #define arch_atomic_cmpxchg_acquire(v, old, new) \ v 159 arch/arm64/include/asm/atomic.h arch_cmpxchg_acquire(&((v)->counter), (old), (new)) v 160 arch/arm64/include/asm/atomic.h #define arch_atomic_cmpxchg_release(v, old, new) \ v 161 arch/arm64/include/asm/atomic.h arch_cmpxchg_release(&((v)->counter), (old), (new)) v 162 arch/arm64/include/asm/atomic.h #define arch_atomic_cmpxchg(v, old, new) \ v 163 arch/arm64/include/asm/atomic.h arch_cmpxchg(&((v)->counter), (old), (new)) v 40 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc_atomic_##op(int i, atomic_t *v) \ v 52 arch/arm64/include/asm/atomic_ll_sc.h : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \ v 58 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc_atomic_##op##_return##name(int i, atomic_t *v) \ v 71 arch/arm64/include/asm/atomic_ll_sc.h : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \ v 80 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc_atomic_fetch_##op##name(int i, atomic_t *v) \ v 93 arch/arm64/include/asm/atomic_ll_sc.h : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Q" (v->counter) \ v 139 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc_atomic64_##op(s64 i, atomic64_t *v) \ v 151 arch/arm64/include/asm/atomic_ll_sc.h : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \ v 157 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc_atomic64_##op##_return##name(s64 i, atomic64_t *v) \ v 170 arch/arm64/include/asm/atomic_ll_sc.h : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \ v 179 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc_atomic64_fetch_##op##name(s64 i, atomic64_t *v) \ v 192 arch/arm64/include/asm/atomic_ll_sc.h : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Q" (v->counter) \ v 237 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc_atomic64_dec_if_positive(atomic64_t *v) v 252 arch/arm64/include/asm/atomic_ll_sc.h : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) v 287 arch/arm64/include/asm/atomic_ll_sc.h [v] "+Q" (*(u##sz *)ptr) \ v 14 arch/arm64/include/asm/atomic_lse.h static inline void __lse_atomic_##op(int i, atomic_t *v) \ v 19 arch/arm64/include/asm/atomic_lse.h : [i] "+r" (i), [v] "+Q" (v->counter) \ v 20 arch/arm64/include/asm/atomic_lse.h : "r" (v)); \ v 31 arch/arm64/include/asm/atomic_lse.h static inline int __lse_atomic_fetch_##op##name(int i, atomic_t *v) \ v 36 arch/arm64/include/asm/atomic_lse.h : [i] "+r" (i), [v] "+Q" (v->counter) \ v 37 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 58 arch/arm64/include/asm/atomic_lse.h static inline int __lse_atomic_add_return##name(int i, atomic_t *v) \ v 66 arch/arm64/include/asm/atomic_lse.h : [i] "+r" (i), [v] "+Q" (v->counter), [tmp] "=&r" (tmp) \ v 67 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 80 arch/arm64/include/asm/atomic_lse.h static inline void __lse_atomic_and(int i, atomic_t *v) v 86 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) v 87 arch/arm64/include/asm/atomic_lse.h : "r" (v)); v 91 arch/arm64/include/asm/atomic_lse.h static inline int __lse_atomic_fetch_and##name(int i, atomic_t *v) \ v 97 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) \ v 98 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 111 arch/arm64/include/asm/atomic_lse.h static inline void __lse_atomic_sub(int i, atomic_t *v) v 117 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) v 118 arch/arm64/include/asm/atomic_lse.h : "r" (v)); v 122 arch/arm64/include/asm/atomic_lse.h static inline int __lse_atomic_sub_return##name(int i, atomic_t *v) \ v 131 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter), [tmp] "=&r" (tmp) \ v 132 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 146 arch/arm64/include/asm/atomic_lse.h static inline int __lse_atomic_fetch_sub##name(int i, atomic_t *v) \ v 152 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) \ v 153 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 167 arch/arm64/include/asm/atomic_lse.h static inline void __lse_atomic64_##op(s64 i, atomic64_t *v) \ v 172 arch/arm64/include/asm/atomic_lse.h : [i] "+r" (i), [v] "+Q" (v->counter) \ v 173 arch/arm64/include/asm/atomic_lse.h : "r" (v)); \ v 184 arch/arm64/include/asm/atomic_lse.h static inline long __lse_atomic64_fetch_##op##name(s64 i, atomic64_t *v)\ v 189 arch/arm64/include/asm/atomic_lse.h : [i] "+r" (i), [v] "+Q" (v->counter) \ v 190 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 211 arch/arm64/include/asm/atomic_lse.h static inline long __lse_atomic64_add_return##name(s64 i, atomic64_t *v)\ v 219 arch/arm64/include/asm/atomic_lse.h : [i] "+r" (i), [v] "+Q" (v->counter), [tmp] "=&r" (tmp) \ v 220 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 233 arch/arm64/include/asm/atomic_lse.h static inline void __lse_atomic64_and(s64 i, atomic64_t *v) v 239 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) v 240 arch/arm64/include/asm/atomic_lse.h : "r" (v)); v 244 arch/arm64/include/asm/atomic_lse.h static inline long __lse_atomic64_fetch_and##name(s64 i, atomic64_t *v) \ v 250 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) \ v 251 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 264 arch/arm64/include/asm/atomic_lse.h static inline void __lse_atomic64_sub(s64 i, atomic64_t *v) v 270 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) v 271 arch/arm64/include/asm/atomic_lse.h : "r" (v)); v 275 arch/arm64/include/asm/atomic_lse.h static inline long __lse_atomic64_sub_return##name(s64 i, atomic64_t *v) \ v 284 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter), [tmp] "=&r" (tmp) \ v 285 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 299 arch/arm64/include/asm/atomic_lse.h static inline long __lse_atomic64_fetch_sub##name(s64 i, atomic64_t *v) \ v 305 arch/arm64/include/asm/atomic_lse.h : [i] "+&r" (i), [v] "+Q" (v->counter) \ v 306 arch/arm64/include/asm/atomic_lse.h : "r" (v) \ v 319 arch/arm64/include/asm/atomic_lse.h static inline s64 __lse_atomic64_dec_if_positive(atomic64_t *v) v 333 arch/arm64/include/asm/atomic_lse.h : [ret] "+&r" (v), [v] "+Q" (v->counter), [tmp] "=&r" (tmp) v 337 arch/arm64/include/asm/atomic_lse.h return (long)v; v 356 arch/arm64/include/asm/atomic_lse.h : [ret] "+r" (x0), [v] "+Q" (*(unsigned long *)ptr), \ v 406 arch/arm64/include/asm/atomic_lse.h [v] "+Q" (*(unsigned long *)ptr) \ v 64 arch/arm64/include/asm/barrier.h #define __smp_store_release(p, v) \ v 68 arch/arm64/include/asm/barrier.h { .__val = (__force typeof(*p)) (v) }; \ v 246 arch/arm64/include/asm/cmpxchg.h : [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr) \ v 152 arch/arm64/include/asm/cputype.h #define MIDR_REV_RANGE(m, v, r_min, r_max) MIDR_RANGE(m, v, r_min, v, r_max) v 153 arch/arm64/include/asm/cputype.h #define MIDR_REV(m, v, r) MIDR_RANGE(m, v, r, v, r) v 94 arch/arm64/include/asm/io.h #define __iormb(v) \ v 107 arch/arm64/include/asm/io.h : "=r" (tmp) : "r" ((unsigned long)(v)) \ v 111 arch/arm64/include/asm/io.h #define __io_par(v) __iormb(v) v 124 arch/arm64/include/asm/io.h #define writeb_relaxed(v,c) ((void)__raw_writeb((v),(c))) v 125 arch/arm64/include/asm/io.h #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) v 126 arch/arm64/include/asm/io.h #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) v 127 arch/arm64/include/asm/io.h #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) v 139 arch/arm64/include/asm/io.h #define writeb(v,c) ({ __iowmb(); writeb_relaxed((v),(c)); }) v 140 arch/arm64/include/asm/io.h #define writew(v,c) ({ __iowmb(); writew_relaxed((v),(c)); }) v 141 arch/arm64/include/asm/io.h #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) v 142 arch/arm64/include/asm/io.h #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); }) v 158 arch/arm64/include/asm/io.h #define memset_io(c,v,l) __memset_io((c),(v),(l)) v 191 arch/arm64/include/asm/io.h #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) v 192 arch/arm64/include/asm/io.h #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) v 193 arch/arm64/include/asm/io.h #define iowrite64be(v,p) ({ __iowmb(); __raw_writeq((__force __u64)cpu_to_be64(v), p); }) v 27 arch/arm64/include/asm/kvm_emulate.h void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v); v 128 arch/arm64/include/asm/kvm_emulate.h static inline void vcpu_write_elr_el1(const struct kvm_vcpu *vcpu, unsigned long v) v 131 arch/arm64/include/asm/kvm_emulate.h write_sysreg_el1(v, SYS_ELR); v 133 arch/arm64/include/asm/kvm_emulate.h *__vcpu_elr_el1(vcpu) = v; v 188 arch/arm64/include/asm/kvm_emulate.h static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v) v 191 arch/arm64/include/asm/kvm_emulate.h vcpu_write_spsr32(vcpu, v); v 196 arch/arm64/include/asm/kvm_emulate.h write_sysreg_el1(v, SYS_SPSR); v 198 arch/arm64/include/asm/kvm_emulate.h vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1] = v; v 378 arch/arm64/include/asm/kvm_host.h #define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs) v 386 arch/arm64/include/asm/kvm_host.h #define __vcpu_sys_reg(v,r) ((v)->arch.ctxt.sys_regs[(r)]) v 397 arch/arm64/include/asm/kvm_host.h #define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r) ^ CPx_BIAS]) v 398 arch/arm64/include/asm/kvm_host.h #define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r) ^ CPx_BIAS]) v 28 arch/arm64/include/asm/kvm_hyp.h #define write_sysreg_elx(v,r,nvh,vh) \ v 30 arch/arm64/include/asm/kvm_hyp.h u64 __val = (u64)(v); \ v 44 arch/arm64/include/asm/kvm_hyp.h #define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02) v 46 arch/arm64/include/asm/kvm_hyp.h #define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12) v 48 arch/arm64/include/asm/kvm_hyp.h #define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1) v 95 arch/arm64/include/asm/kvm_mmu.h static inline unsigned long __kern_hyp_va(unsigned long v) v 103 arch/arm64/include/asm/kvm_mmu.h : "+r" (v)); v 104 arch/arm64/include/asm/kvm_mmu.h return v; v 107 arch/arm64/include/asm/kvm_mmu.h #define kern_hyp_va(v) ((typeof(v))(__kern_hyp_va((unsigned long)(v)))) v 46 arch/arm64/include/asm/pointer_auth.h #define __ptrauth_key_install(k, v) \ v 48 arch/arm64/include/asm/pointer_auth.h struct ptrauth_key __pki_v = (v); \ v 787 arch/arm64/include/asm/sysreg.h #define __mrs_s(v, r) \ v 789 arch/arm64/include/asm/sysreg.h " mrs_s " v ", " __stringify(r) "\n" \ v 792 arch/arm64/include/asm/sysreg.h #define __msr_s(r, v) \ v 794 arch/arm64/include/asm/sysreg.h " msr_s " __stringify(r) ", " v "\n" \ v 811 arch/arm64/include/asm/sysreg.h #define write_sysreg(v, r) do { \ v 812 arch/arm64/include/asm/sysreg.h u64 __val = (u64)(v); \ v 827 arch/arm64/include/asm/sysreg.h #define write_sysreg_s(v, r) do { \ v 828 arch/arm64/include/asm/sysreg.h u64 __val = (u64)(v); \ v 63 arch/arm64/kernel/cpufeature.c static int dump_cpu_hwcaps(struct notifier_block *self, unsigned long v, void *p) v 127 arch/arm64/kernel/cpuinfo.c static int c_show(struct seq_file *m, void *v) v 190 arch/arm64/kernel/cpuinfo.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 196 arch/arm64/kernel/cpuinfo.c static void c_stop(struct seq_file *m, void *v) v 1375 arch/arm64/kernel/fpsimd.c unsigned long cmd, void *v) v 396 arch/arm64/kernel/setup.c static int dump_kernel_offset(struct notifier_block *self, unsigned long v, v 16 arch/arm64/kvm/hyp/debug-sr.c #define write_debug(v,r,n) write_sysreg(v, r##n##_el1) v 169 arch/arm64/kvm/regmap.c void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v) v 174 arch/arm64/kvm/regmap.c vcpu_gp_regs(vcpu)->spsr[spsr_idx] = v; v 180 arch/arm64/kvm/regmap.c write_sysreg_el1(v, SYS_SPSR); v 183 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_abt); v 186 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_und); v 189 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_irq); v 192 arch/arm64/kvm/regmap.c write_sysreg(v, spsr_fiq); v 2393 arch/arm64/kvm/sys_regs.c static void get_##reg(struct kvm_vcpu *v, \ v 2404 arch/arm64/kvm/sys_regs.c static void get_ctr_el0(struct kvm_vcpu *v, const struct sys_reg_desc *r) v 598 arch/arm64/mm/init.c static int dump_mem_limit(struct notifier_block *self, unsigned long v, void *p) v 7 arch/arm64/mm/ptdump_debugfs.c static int ptdump_show(struct seq_file *m, void *v) v 56 arch/c6x/include/asm/cache.h #define CACHE_REGION_START(v) \ v 57 arch/c6x/include/asm/cache.h (((u32) (v)) & ~(CACHEABILITY_ALIGN - 1)) v 58 arch/c6x/include/asm/cache.h #define CACHE_REGION_END(v) \ v 59 arch/c6x/include/asm/cache.h (((u32) (v) + (CACHEABILITY_ALIGN - 1)) & ~(CACHEABILITY_ALIGN - 1)) v 16 arch/c6x/include/asm/special_insns.h #define set_creg(reg, v) \ v 17 arch/c6x/include/asm/special_insns.h do { unsigned int __x = (unsigned int)(v); \ v 81 arch/c6x/include/asm/unaligned.h #define put_unaligned_le32(v, p) put_unaligned32(__swab32(v), (p)) v 82 arch/c6x/include/asm/unaligned.h #define put_unaligned_le64(v, p) put_unaligned64(__swab64(v), (p)) v 83 arch/c6x/include/asm/unaligned.h #define put_unaligned_be32(v, p) put_unaligned32((v), (p)) v 84 arch/c6x/include/asm/unaligned.h #define put_unaligned_be64(v, p) put_unaligned64((v), (p)) v 94 arch/c6x/include/asm/unaligned.h #define put_unaligned_le32(v, p) put_unaligned32((v), (p)) v 95 arch/c6x/include/asm/unaligned.h #define put_unaligned_le64(v, p) put_unaligned64((v), (p)) v 96 arch/c6x/include/asm/unaligned.h #define put_unaligned_be32(v, p) put_unaligned32(__swab32(v), (p)) v 97 arch/c6x/include/asm/unaligned.h #define put_unaligned_be64(v, p) put_unaligned64(__swab64(v), (p)) v 51 arch/c6x/kernel/module.c Elf32_Addr v; v 68 arch/c6x/kernel/module.c v = sym->st_value + rel[i].r_addend; v 72 arch/c6x/kernel/module.c pr_debug("RELA ABS32: [%p] = 0x%x\n", location, v); v 73 arch/c6x/kernel/module.c *location = v; v 76 arch/c6x/kernel/module.c pr_debug("RELA ABS16: [%p] = 0x%x\n", location, v); v 77 arch/c6x/kernel/module.c *(u16 *)location = v; v 80 arch/c6x/kernel/module.c pr_debug("RELA ABS8: [%p] = 0x%x\n", location, v); v 81 arch/c6x/kernel/module.c *(u8 *)location = v; v 86 arch/c6x/kernel/module.c opcode |= ((v & 0xffff) << 7); v 88 arch/c6x/kernel/module.c location, v, opcode); v 94 arch/c6x/kernel/module.c opcode |= ((v >> 9) & 0x7fff80); v 96 arch/c6x/kernel/module.c location, v, opcode); v 100 arch/c6x/kernel/module.c if (fixup_pcr(location, v, 21, 7)) v 104 arch/c6x/kernel/module.c if (fixup_pcr(location, v, 12, 16)) v 108 arch/c6x/kernel/module.c if (fixup_pcr(location, v, 10, 13)) v 409 arch/c6x/kernel/setup.c static int show_cpuinfo(struct seq_file *m, void *v) v 411 arch/c6x/kernel/setup.c int n = ptr_to_cpu(v); v 447 arch/c6x/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 452 arch/c6x/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 207 arch/c6x/platforms/pll.c u32 v, plldiv = 0; v 239 arch/c6x/platforms/pll.c v = pll_read(pll, clk->div); v 240 arch/c6x/platforms/pll.c if (v & PLLDIV_EN) v 241 arch/c6x/platforms/pll.c plldiv = (v & PLLDIV_RATIO_MASK) + 1; v 404 arch/c6x/platforms/pll.c static int c6x_ck_show(struct seq_file *m, void *v) v 13 arch/csky/include/asm/atomic.h static inline int __atomic_add_unless(atomic_t *v, int a, int u) v 29 arch/csky/include/asm/atomic.h : "r" (a), "r"(&v->counter), "r"(u) v 39 arch/csky/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 49 arch/csky/include/asm/atomic.h : "r" (i), "r"(&v->counter) \ v 54 arch/csky/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 66 arch/csky/include/asm/atomic.h : "r" (i), "r"(&v->counter) \ v 74 arch/csky/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 86 arch/csky/include/asm/atomic.h : "r" (i), "r"(&v->counter) \ v 98 arch/csky/include/asm/atomic.h static inline int __atomic_add_unless(atomic_t *v, int a, int u) v 113 arch/csky/include/asm/atomic.h : "r" (a), "r"(&v->counter), "r"(u) v 122 arch/csky/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 133 arch/csky/include/asm/atomic.h : "r" (i), "r"(&v->counter) \ v 140 arch/csky/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 152 arch/csky/include/asm/atomic.h : "r" (i), "r"(&v->counter) \ v 161 arch/csky/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 173 arch/csky/include/asm/atomic.h : "r" (i), "r"(&v->counter) \ v 27 arch/csky/include/asm/io.h #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); }) v 28 arch/csky/include/asm/io.h #define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); }) v 29 arch/csky/include/asm/io.h #define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); }) v 31 arch/csky/include/asm/io.h #define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); mb(); }) v 32 arch/csky/include/asm/io.h #define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); mb(); }) v 33 arch/csky/include/asm/io.h #define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); mb(); }) v 46 arch/csky/kernel/cpu-probe.c static int c_show(struct seq_file *m, void *v) v 66 arch/csky/kernel/cpu-probe.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 72 arch/csky/kernel/cpu-probe.c static void c_stop(struct seq_file *m, void *v) {} v 17 arch/h8300/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 18 arch/h8300/include/asm/atomic.h #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 21 arch/h8300/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 27 arch/h8300/include/asm/atomic.h ret = v->counter c_op i; \ v 33 arch/h8300/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 39 arch/h8300/include/asm/atomic.h ret = v->counter; \ v 40 arch/h8300/include/asm/atomic.h v->counter c_op i; \ v 46 arch/h8300/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 51 arch/h8300/include/asm/atomic.h v->counter c_op i; \ v 72 arch/h8300/include/asm/atomic.h static inline int atomic_cmpxchg(atomic_t *v, int old, int new) v 78 arch/h8300/include/asm/atomic.h ret = v->counter; v 80 arch/h8300/include/asm/atomic.h v->counter = new; v 85 arch/h8300/include/asm/atomic.h static inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 91 arch/h8300/include/asm/atomic.h ret = v->counter; v 93 arch/h8300/include/asm/atomic.h v->counter += a; v 64 arch/h8300/include/asm/cmpxchg.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 29 arch/h8300/kernel/module.c uint32_t v = sym->st_value + rela[i].r_addend; v 34 arch/h8300/kernel/module.c *loc = (*loc & 0xff000000) | ((*loc & 0xffffff) + v); v 38 arch/h8300/kernel/module.c *loc += v; v 42 arch/h8300/kernel/module.c *loc += v; v 45 arch/h8300/kernel/module.c v -= (unsigned long)loc + 2; v 46 arch/h8300/kernel/module.c if ((Elf32_Sword)v > 0x7fff || v 47 arch/h8300/kernel/module.c (Elf32_Sword)v < -(Elf32_Sword)0x8000) v 50 arch/h8300/kernel/module.c *(unsigned short *)loc = v; v 53 arch/h8300/kernel/module.c v -= (unsigned long)loc + 1; v 54 arch/h8300/kernel/module.c if ((Elf32_Sword)v > 0x7f || v 55 arch/h8300/kernel/module.c (Elf32_Sword)v < -(Elf32_Sword)0x80) v 58 arch/h8300/kernel/module.c *(unsigned char *)loc = v; v 128 arch/h8300/kernel/setup.c static int show_cpuinfo(struct seq_file *m, void *v) v 153 arch/h8300/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 159 arch/h8300/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 8 arch/h8300/lib/muldi3.c #define umul_ppmm(w1, w0, u, v) \ v 14 arch/h8300/lib/muldi3.c __vl = __ll_lowpart(v); \ v 15 arch/h8300/lib/muldi3.c __vh = __ll_highpart(v); \ v 28 arch/h8300/lib/muldi3.c #define __umulsidi3(u, v) ( \ v 31 arch/h8300/lib/muldi3.c umul_ppmm(__w.s.high, __w.s.low, u, v); \ v 35 arch/h8300/lib/muldi3.c DWtype __muldi3(DWtype u, DWtype v) v 38 arch/h8300/lib/muldi3.c const DWunion vv = {.ll = v}; v 19 arch/hexagon/include/asm/atomic.h static inline void atomic_set(atomic_t *v, int new) v 26 arch/hexagon/include/asm/atomic.h : "r" (&v->counter), "r" (new) v 31 arch/hexagon/include/asm/atomic.h #define atomic_set_release(v, i) atomic_set((v), (i)) v 39 arch/hexagon/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 46 arch/hexagon/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), (new))) v 66 arch/hexagon/include/asm/atomic.h static inline int atomic_cmpxchg(atomic_t *v, int old, int new) v 78 arch/hexagon/include/asm/atomic.h : "r" (&v->counter), "r" (old), "r" (new) v 86 arch/hexagon/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 96 arch/hexagon/include/asm/atomic.h : "r" (&v->counter), "r" (i) \ v 102 arch/hexagon/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 112 arch/hexagon/include/asm/atomic.h : "r" (&v->counter), "r" (i) \ v 119 arch/hexagon/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 129 arch/hexagon/include/asm/atomic.h : "r" (&v->counter), "r" (i) \ v 162 arch/hexagon/include/asm/atomic.h static inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 180 arch/hexagon/include/asm/atomic.h : "r" (v), "r" (a), "r" (u) v 45 arch/hexagon/include/asm/cmpxchg.h #define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), \ v 100 arch/hexagon/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 106 arch/hexagon/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 114 arch/hexagon/kernel/setup.c static int show_cpuinfo(struct seq_file *m, void *v) v 116 arch/hexagon/kernel/setup.c int cpu = (unsigned long) v - 1; v 1855 arch/ia64/hp/common/sba_iommu.c ioc_next(struct seq_file *s, void *v, loff_t *pos) v 1857 arch/ia64/hp/common/sba_iommu.c struct ioc *ioc = v; v 1864 arch/ia64/hp/common/sba_iommu.c ioc_stop(struct seq_file *s, void *v) v 1869 arch/ia64/hp/common/sba_iommu.c ioc_show(struct seq_file *s, void *v) v 1871 arch/ia64/hp/common/sba_iommu.c struct ioc *ioc = v; v 25 arch/ia64/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 26 arch/ia64/include/asm/atomic.h #define atomic64_read(v) READ_ONCE((v)->counter) v 28 arch/ia64/include/asm/atomic.h #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) v 29 arch/ia64/include/asm/atomic.h #define atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i)) v 33 arch/ia64/include/asm/atomic.h ia64_atomic_##op (int i, atomic_t *v) \ v 39 arch/ia64/include/asm/atomic.h CMPXCHG_BUGCHECK(v); \ v 40 arch/ia64/include/asm/atomic.h old = atomic_read(v); \ v 42 arch/ia64/include/asm/atomic.h } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \ v 48 arch/ia64/include/asm/atomic.h ia64_atomic_fetch_##op (int i, atomic_t *v) \ v 54 arch/ia64/include/asm/atomic.h CMPXCHG_BUGCHECK(v); \ v 55 arch/ia64/include/asm/atomic.h old = atomic_read(v); \ v 57 arch/ia64/include/asm/atomic.h } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \ v 78 arch/ia64/include/asm/atomic.h #define atomic_add_return(i,v) \ v 82 arch/ia64/include/asm/atomic.h ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \ v 83 arch/ia64/include/asm/atomic.h : ia64_atomic_add(__ia64_aar_i, v); \ v 86 arch/ia64/include/asm/atomic.h #define atomic_sub_return(i,v) \ v 90 arch/ia64/include/asm/atomic.h ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \ v 91 arch/ia64/include/asm/atomic.h : ia64_atomic_sub(__ia64_asr_i, v); \ v 94 arch/ia64/include/asm/atomic.h #define atomic_fetch_add(i,v) \ v 98 arch/ia64/include/asm/atomic.h ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \ v 99 arch/ia64/include/asm/atomic.h : ia64_atomic_fetch_add(__ia64_aar_i, v); \ v 102 arch/ia64/include/asm/atomic.h #define atomic_fetch_sub(i,v) \ v 106 arch/ia64/include/asm/atomic.h ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \ v 107 arch/ia64/include/asm/atomic.h : ia64_atomic_fetch_sub(__ia64_asr_i, v); \ v 114 arch/ia64/include/asm/atomic.h #define atomic_and(i,v) (void)ia64_atomic_fetch_and(i,v) v 115 arch/ia64/include/asm/atomic.h #define atomic_or(i,v) (void)ia64_atomic_fetch_or(i,v) v 116 arch/ia64/include/asm/atomic.h #define atomic_xor(i,v) (void)ia64_atomic_fetch_xor(i,v) v 118 arch/ia64/include/asm/atomic.h #define atomic_fetch_and(i,v) ia64_atomic_fetch_and(i,v) v 119 arch/ia64/include/asm/atomic.h #define atomic_fetch_or(i,v) ia64_atomic_fetch_or(i,v) v 120 arch/ia64/include/asm/atomic.h #define atomic_fetch_xor(i,v) ia64_atomic_fetch_xor(i,v) v 128 arch/ia64/include/asm/atomic.h ia64_atomic64_##op (s64 i, atomic64_t *v) \ v 134 arch/ia64/include/asm/atomic.h CMPXCHG_BUGCHECK(v); \ v 135 arch/ia64/include/asm/atomic.h old = atomic64_read(v); \ v 137 arch/ia64/include/asm/atomic.h } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \ v 143 arch/ia64/include/asm/atomic.h ia64_atomic64_fetch_##op (s64 i, atomic64_t *v) \ v 149 arch/ia64/include/asm/atomic.h CMPXCHG_BUGCHECK(v); \ v 150 arch/ia64/include/asm/atomic.h old = atomic64_read(v); \ v 152 arch/ia64/include/asm/atomic.h } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \ v 163 arch/ia64/include/asm/atomic.h #define atomic64_add_return(i,v) \ v 167 arch/ia64/include/asm/atomic.h ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \ v 168 arch/ia64/include/asm/atomic.h : ia64_atomic64_add(__ia64_aar_i, v); \ v 171 arch/ia64/include/asm/atomic.h #define atomic64_sub_return(i,v) \ v 175 arch/ia64/include/asm/atomic.h ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \ v 176 arch/ia64/include/asm/atomic.h : ia64_atomic64_sub(__ia64_asr_i, v); \ v 179 arch/ia64/include/asm/atomic.h #define atomic64_fetch_add(i,v) \ v 183 arch/ia64/include/asm/atomic.h ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \ v 184 arch/ia64/include/asm/atomic.h : ia64_atomic64_fetch_add(__ia64_aar_i, v); \ v 187 arch/ia64/include/asm/atomic.h #define atomic64_fetch_sub(i,v) \ v 191 arch/ia64/include/asm/atomic.h ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \ v 192 arch/ia64/include/asm/atomic.h : ia64_atomic64_fetch_sub(__ia64_asr_i, v); \ v 199 arch/ia64/include/asm/atomic.h #define atomic64_and(i,v) (void)ia64_atomic64_fetch_and(i,v) v 200 arch/ia64/include/asm/atomic.h #define atomic64_or(i,v) (void)ia64_atomic64_fetch_or(i,v) v 201 arch/ia64/include/asm/atomic.h #define atomic64_xor(i,v) (void)ia64_atomic64_fetch_xor(i,v) v 203 arch/ia64/include/asm/atomic.h #define atomic64_fetch_and(i,v) ia64_atomic64_fetch_and(i,v) v 204 arch/ia64/include/asm/atomic.h #define atomic64_fetch_or(i,v) ia64_atomic64_fetch_or(i,v) v 205 arch/ia64/include/asm/atomic.h #define atomic64_fetch_xor(i,v) ia64_atomic64_fetch_xor(i,v) v 211 arch/ia64/include/asm/atomic.h #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) v 212 arch/ia64/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 214 arch/ia64/include/asm/atomic.h #define atomic64_cmpxchg(v, old, new) \ v 215 arch/ia64/include/asm/atomic.h (cmpxchg(&((v)->counter), old, new)) v 216 arch/ia64/include/asm/atomic.h #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) v 218 arch/ia64/include/asm/atomic.h #define atomic_add(i,v) (void)atomic_add_return((i), (v)) v 219 arch/ia64/include/asm/atomic.h #define atomic_sub(i,v) (void)atomic_sub_return((i), (v)) v 221 arch/ia64/include/asm/atomic.h #define atomic64_add(i,v) (void)atomic64_add_return((i), (v)) v 222 arch/ia64/include/asm/atomic.h #define atomic64_sub(i,v) (void)atomic64_sub_return((i), (v)) v 56 arch/ia64/include/asm/barrier.h #define __smp_store_release(p, v) \ v 60 arch/ia64/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 10 arch/ia64/include/asm/msidef.h #define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT) v 240 arch/ia64/include/asm/pgtable.h #define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE)) v 199 arch/ia64/include/asm/unwind.h unw_set_gr (struct unw_frame_info *i, int n, unsigned long v, char nat) v 201 arch/ia64/include/asm/unwind.h return unw_access_gr(i, n, &v, &nat, 1); v 205 arch/ia64/include/asm/unwind.h unw_set_br (struct unw_frame_info *i, int n, unsigned long v) v 207 arch/ia64/include/asm/unwind.h return unw_access_br(i, n, &v, 1); v 211 arch/ia64/include/asm/unwind.h unw_set_fr (struct unw_frame_info *i, int n, struct ia64_fpreg v) v 213 arch/ia64/include/asm/unwind.h return unw_access_fr(i, n, &v, 1); v 217 arch/ia64/include/asm/unwind.h unw_set_ar (struct unw_frame_info *i, int n, unsigned long v) v 219 arch/ia64/include/asm/unwind.h return unw_access_ar(i, n, &v, 1); v 223 arch/ia64/include/asm/unwind.h unw_set_pr (struct unw_frame_info *i, unsigned long v) v 225 arch/ia64/include/asm/unwind.h return unw_access_pr(i, &v, 1); v 228 arch/ia64/include/asm/unwind.h #define unw_get_gr(i,n,v,nat) unw_access_gr(i,n,v,nat,0) v 229 arch/ia64/include/asm/unwind.h #define unw_get_br(i,n,v) unw_access_br(i,n,v,0) v 230 arch/ia64/include/asm/unwind.h #define unw_get_fr(i,n,v) unw_access_fr(i,n,v,0) v 231 arch/ia64/include/asm/unwind.h #define unw_get_ar(i,n,v) unw_access_ar(i,n,v,0) v 232 arch/ia64/include/asm/unwind.h #define unw_get_pr(i,v) unw_access_pr(i,v,0) v 154 arch/ia64/include/asm/uv/uv_hub.h static inline unsigned long uv_gpa(void *v) v 156 arch/ia64/include/asm/uv/uv_hub.h return __pa(v) | uv_hub_info->gnode_upper; v 160 arch/ia64/include/asm/uv/uv_hub.h static inline void *uv_vgpa(void *v) v 162 arch/ia64/include/asm/uv/uv_hub.h return (void *)uv_gpa(v); v 40 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 176 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 268 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 306 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 344 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 382 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 406 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 422 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 438 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 466 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 490 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 507 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 524 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 547 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 573 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 592 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 622 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 660 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 698 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 724 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 743 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 765 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 789 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 813 arch/ia64/include/asm/uv/uv_mmrs.h unsigned long v; v 138 arch/ia64/include/uapi/asm/cmpxchg.h # define CMPXCHG_BUGCHECK(v) \ v 144 arch/ia64/include/uapi/asm/cmpxchg.h printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v));\ v 150 arch/ia64/include/uapi/asm/cmpxchg.h # define CMPXCHG_BUGCHECK(v) v 32 arch/ia64/include/uapi/asm/intel_intrin.h #define ia64_mux1(x,v) _m_to_int64(_m64_mux1(_m_from_int64(x), (v))) v 42 arch/ia64/include/uapi/asm/intrinsics.h #define IA64_FETCHADD(tmp,v,n,sz,sem) \ v 46 arch/ia64/include/uapi/asm/intrinsics.h tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \ v 50 arch/ia64/include/uapi/asm/intrinsics.h tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \ v 58 arch/ia64/include/uapi/asm/intrinsics.h #define ia64_fetchadd(i,v,sem) \ v 61 arch/ia64/include/uapi/asm/intrinsics.h volatile __typeof__(*(v)) *_v = (v); \ v 64 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \ v 66 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \ v 68 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \ v 70 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \ v 72 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \ v 74 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \ v 76 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \ v 78 arch/ia64/include/uapi/asm/intrinsics.h IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \ v 81 arch/ia64/include/uapi/asm/intrinsics.h (__typeof__(*(v))) (_tmp); /* return old value */ \ v 84 arch/ia64/include/uapi/asm/intrinsics.h #define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */ v 522 arch/ia64/kernel/palinfo.c const char *const *vf, *const *v; v 525 arch/ia64/kernel/palinfo.c vf = v = proc_features[set]; v 533 arch/ia64/kernel/palinfo.c v = vf + i; v 534 arch/ia64/kernel/palinfo.c if ( v && *v ) { v 535 arch/ia64/kernel/palinfo.c seq_printf(m, "%-40s : %s %s\n", *v, v 603 arch/ia64/kernel/palinfo.c const char *const *v = bus_features; v 616 arch/ia64/kernel/palinfo.c for(i=0; i < 64; i++, v++, avail >>=1, status >>=1, control >>=1) { v 617 arch/ia64/kernel/palinfo.c if ( ! *v ) v 619 arch/ia64/kernel/palinfo.c seq_printf(m, "%-48s : %s%s %s\n", *v, v 907 arch/ia64/kernel/palinfo.c static int proc_palinfo_show(struct seq_file *m, void *v) v 141 arch/ia64/kernel/perfmon.c #define PFM_CPUINFO_CLEAR(v) pfm_get_cpu_var(pfm_syst_info) &= ~(v) v 142 arch/ia64/kernel/perfmon.c #define PFM_CPUINFO_SET(v) pfm_get_cpu_var(pfm_syst_info) |= (v) v 352 arch/ia64/kernel/perfmon.c #define SET_LAST_CPU(ctx, v) (ctx)->ctx_last_cpu = (v) v 355 arch/ia64/kernel/perfmon.c #define SET_LAST_CPU(ctx, v) do {} while(0) v 370 arch/ia64/kernel/perfmon.c #define PFM_SET_WORK_PENDING(t, v) do { (t)->thread.pfm_needs_checking = v; } while(0); v 579 arch/ia64/kernel/perfmon.c #define pfm_get_cpu_var(v) __ia64_per_cpu_var(v) v 3060 arch/ia64/kernel/perfmon.c unsigned long v = value; v 3062 arch/ia64/kernel/perfmon.c ret = (*wr_func)(task, ctx, cnum, &v, regs); v 3065 arch/ia64/kernel/perfmon.c value = v; v 3304 arch/ia64/kernel/perfmon.c unsigned long v = val; v 3305 arch/ia64/kernel/perfmon.c ret = (*rd_func)(ctx->ctx_task, ctx, cnum, &v, regs); v 3307 arch/ia64/kernel/perfmon.c val = v; v 5529 arch/ia64/kernel/perfmon.c pfm_proc_next(struct seq_file *m, void *v, loff_t *pos) v 5536 arch/ia64/kernel/perfmon.c pfm_proc_stop(struct seq_file *m, void *v) v 5587 arch/ia64/kernel/perfmon.c pfm_proc_show(struct seq_file *m, void *v) v 5593 arch/ia64/kernel/perfmon.c if (v == PFM_PROC_SHOW_HEADER) { v 5600 arch/ia64/kernel/perfmon.c cpu = (long)v - 1; v 584 arch/ia64/kernel/salinfo.c static int proc_salinfo_show(struct seq_file *m, void *v) v 586 arch/ia64/kernel/salinfo.c unsigned long data = (unsigned long)v; v 655 arch/ia64/kernel/setup.c show_cpuinfo (struct seq_file *m, void *v) v 673 arch/ia64/kernel/setup.c struct cpuinfo_ia64 *c = v; v 751 arch/ia64/kernel/setup.c c_next (struct seq_file *m, void *v, loff_t *pos) v 758 arch/ia64/kernel/setup.c c_stop (struct seq_file *m, void *v) v 45 arch/ia64/uv/kernel/setup.c alias.v = uv_read_local_mmr(redir_addrs[i].alias); v 48 arch/ia64/uv/kernel/setup.c redirect.v = uv_read_local_mmr(redir_addrs[i].redirect); v 93 arch/ia64/uv/kernel/setup.c node_id.v = uv_read_local_mmr(UVH_NODE_ID); v 94 arch/ia64/uv/kernel/setup.c m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG); v 71 arch/m68k/amiga/pcmcia.c unsigned char v; v 75 arch/m68k/amiga/pcmcia.c v = GAYLE_CFG_0V; v 78 arch/m68k/amiga/pcmcia.c v = GAYLE_CFG_5V; v 81 arch/m68k/amiga/pcmcia.c v = GAYLE_CFG_12V; v 84 arch/m68k/amiga/pcmcia.c v = GAYLE_CFG_0V; v 87 arch/m68k/amiga/pcmcia.c cfg_byte = (cfg_byte & 0xfc) | v; v 97 arch/m68k/atari/time.c #define COPY(v) val->v=(mste_rtc.v & 0xf) v 111 arch/m68k/atari/time.c #define COPY(v) mste_rtc.v=val->v v 241 arch/m68k/bvme6000/config.c u32 v = 800000, ov; v 249 arch/m68k/bvme6000/config.c ov = v; v 254 arch/m68k/bvme6000/config.c v = (msb << 8) | rtc->t1lsb; /* Read timer1 */ v 257 arch/m68k/bvme6000/config.c abs(ov-v) > 80 || v 258 arch/m68k/bvme6000/config.c v > RTC_TIMER_COUNT - (RTC_TIMER_COUNT / 100)); v 260 arch/m68k/bvme6000/config.c v = RTC_TIMER_COUNT - v; v 262 arch/m68k/bvme6000/config.c v += RTC_TIMER_CYCLES / 2; v 267 arch/m68k/bvme6000/config.c v += clk_offset + clk_total; v 271 arch/m68k/bvme6000/config.c return v; v 128 arch/m68k/coldfire/intc-2.c u8 v; v 133 arch/m68k/coldfire/intc-2.c v = __raw_readb(MCFEPORT_EPDDR); v 134 arch/m68k/coldfire/intc-2.c __raw_writeb(v & ~(0x1 << irq), MCFEPORT_EPDDR); v 137 arch/m68k/coldfire/intc-2.c v = __raw_readb(MCFEPORT_EPIER); v 138 arch/m68k/coldfire/intc-2.c __raw_writeb(v | (0x1 << irq), MCFEPORT_EPIER); v 86 arch/m68k/coldfire/intc-5272.c u32 v; v 88 arch/m68k/coldfire/intc-5272.c v = 0x8 << intc_irqmap[irq].index; v 89 arch/m68k/coldfire/intc-5272.c writel(v, intc_irqmap[irq].icr); v 98 arch/m68k/coldfire/intc-5272.c u32 v; v 100 arch/m68k/coldfire/intc-5272.c v = 0xd << intc_irqmap[irq].index; v 101 arch/m68k/coldfire/intc-5272.c writel(v, intc_irqmap[irq].icr); v 113 arch/m68k/coldfire/intc-5272.c u32 v; v 114 arch/m68k/coldfire/intc-5272.c v = readl(intc_irqmap[irq].icr); v 115 arch/m68k/coldfire/intc-5272.c v &= (0x7 << intc_irqmap[irq].index); v 116 arch/m68k/coldfire/intc-5272.c v |= (0x8 << intc_irqmap[irq].index); v 117 arch/m68k/coldfire/intc-5272.c writel(v, intc_irqmap[irq].icr); v 129 arch/m68k/coldfire/intc-5272.c u32 v; v 130 arch/m68k/coldfire/intc-5272.c v = readl(MCFSIM_PITR); v 132 arch/m68k/coldfire/intc-5272.c v &= ~(0x1 << (32 - irq)); v 134 arch/m68k/coldfire/intc-5272.c v |= (0x1 << (32 - irq)); v 135 arch/m68k/coldfire/intc-5272.c writel(v, MCFSIM_PITR); v 104 arch/m68k/coldfire/intc-simr.c u8 v; v 108 arch/m68k/coldfire/intc-simr.c v = __raw_readb(MCFEPORT_EPDDR); v 109 arch/m68k/coldfire/intc-simr.c __raw_writeb(v & ~(0x1 << ebit), MCFEPORT_EPDDR); v 113 arch/m68k/coldfire/intc-simr.c v = __raw_readb(MCFEPORT_EPIER); v 114 arch/m68k/coldfire/intc-simr.c __raw_writeb(v | (0x1 << ebit), MCFEPORT_EPIER); v 175 arch/m68k/coldfire/m520x.c u8 v; v 178 arch/m68k/coldfire/m520x.c v = readb(MCF_GPIO_PAR_FEC); v 179 arch/m68k/coldfire/m520x.c writeb(v | 0xf0, MCF_GPIO_PAR_FEC); v 181 arch/m68k/coldfire/m520x.c v = readb(MCF_GPIO_PAR_FECI2C); v 182 arch/m68k/coldfire/m520x.c writeb(v | 0x0f, MCF_GPIO_PAR_FECI2C); v 64 arch/m68k/coldfire/m5272.c u32 v; v 67 arch/m68k/coldfire/m5272.c v = readl(MCFSIM_PBCNT); v 68 arch/m68k/coldfire/m5272.c v = (v & ~0x000000ff) | 0x00000055; v 69 arch/m68k/coldfire/m5272.c writel(v, MCFSIM_PBCNT); v 71 arch/m68k/coldfire/m5272.c v = readl(MCFSIM_PDCNT); v 72 arch/m68k/coldfire/m5272.c v = (v & ~0x000003fc) | 0x000002a8; v 73 arch/m68k/coldfire/m5272.c writel(v, MCFSIM_PDCNT); v 123 arch/m68k/coldfire/m527x.c u8 v; v 127 arch/m68k/coldfire/m527x.c v = readb(MCFGPIO_PAR_FECI2C); v 128 arch/m68k/coldfire/m527x.c writeb(v | 0xf0, MCFGPIO_PAR_FECI2C); v 134 arch/m68k/coldfire/m527x.c v = readb(MCFGPIO_PAR_FEC0HL); v 135 arch/m68k/coldfire/m527x.c writeb(v | 0xc0, MCFGPIO_PAR_FEC0HL); v 140 arch/m68k/coldfire/m527x.c v = readb(MCFGPIO_PAR_FEC1HL); v 141 arch/m68k/coldfire/m527x.c writeb(v | 0xc0, MCFGPIO_PAR_FEC1HL); v 198 arch/m68k/coldfire/m53xx.c u8 v; v 201 arch/m68k/coldfire/m53xx.c v = readb(MCFGPIO_PAR_FECI2C); v 202 arch/m68k/coldfire/m53xx.c v |= MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC | v 204 arch/m68k/coldfire/m53xx.c writeb(v, MCFGPIO_PAR_FECI2C); v 206 arch/m68k/coldfire/m53xx.c v = readb(MCFGPIO_PAR_FEC); v 207 arch/m68k/coldfire/m53xx.c v = MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC | MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC; v 208 arch/m68k/coldfire/m53xx.c writeb(v, MCFGPIO_PAR_FEC); v 64 arch/m68k/include/asm/amigayle.h #define gayle_outb(v,a) writeb( v, GAYLE_IO+(a)+(((a)&1)*GAYLE_ODD) ) v 67 arch/m68k/include/asm/amigayle.h #define gayle_outw(v,a) writew( v, GAYLE_IO+(a) ) v 38 arch/m68k/include/asm/atariints.h #define IRQ_VECTOR_TO_SOURCE(v) ((v) - ((v) < 0x20 ? 0x18 : (0x40-8))) v 21 arch/m68k/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 22 arch/m68k/include/asm/atomic.h #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 35 arch/m68k/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 37 arch/m68k/include/asm/atomic.h __asm__ __volatile__(#asm_op "l %1,%0" : "+m" (*v) : ASM_DI (i));\ v 43 arch/m68k/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 52 arch/m68k/include/asm/atomic.h : "+m" (*v), "=&d" (t), "=&d" (tmp) \ v 53 arch/m68k/include/asm/atomic.h : "g" (i), "2" (atomic_read(v))); \ v 58 arch/m68k/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 67 arch/m68k/include/asm/atomic.h : "+m" (*v), "=&d" (t), "=&d" (tmp) \ v 68 arch/m68k/include/asm/atomic.h : "g" (i), "2" (atomic_read(v))); \ v 75 arch/m68k/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t * v) \ v 81 arch/m68k/include/asm/atomic.h t = (v->counter c_op i); \ v 88 arch/m68k/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t * v) \ v 94 arch/m68k/include/asm/atomic.h t = v->counter; \ v 95 arch/m68k/include/asm/atomic.h v->counter c_op i; \ v 125 arch/m68k/include/asm/atomic.h static inline void atomic_inc(atomic_t *v) v 127 arch/m68k/include/asm/atomic.h __asm__ __volatile__("addql #1,%0" : "+m" (*v)); v 131 arch/m68k/include/asm/atomic.h static inline void atomic_dec(atomic_t *v) v 133 arch/m68k/include/asm/atomic.h __asm__ __volatile__("subql #1,%0" : "+m" (*v)); v 137 arch/m68k/include/asm/atomic.h static inline int atomic_dec_and_test(atomic_t *v) v 140 arch/m68k/include/asm/atomic.h __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v)); v 145 arch/m68k/include/asm/atomic.h static inline int atomic_dec_and_test_lt(atomic_t *v) v 150 arch/m68k/include/asm/atomic.h : "=d" (c), "=m" (*v) v 151 arch/m68k/include/asm/atomic.h : "m" (*v)); v 155 arch/m68k/include/asm/atomic.h static inline int atomic_inc_and_test(atomic_t *v) v 158 arch/m68k/include/asm/atomic.h __asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v)); v 165 arch/m68k/include/asm/atomic.h #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) v 166 arch/m68k/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 170 arch/m68k/include/asm/atomic.h static inline int atomic_cmpxchg(atomic_t *v, int old, int new) v 176 arch/m68k/include/asm/atomic.h prev = atomic_read(v); v 178 arch/m68k/include/asm/atomic.h atomic_set(v, new); v 183 arch/m68k/include/asm/atomic.h static inline int atomic_xchg(atomic_t *v, int new) v 189 arch/m68k/include/asm/atomic.h prev = atomic_read(v); v 190 arch/m68k/include/asm/atomic.h atomic_set(v, new); v 197 arch/m68k/include/asm/atomic.h static inline int atomic_sub_and_test(int i, atomic_t *v) v 201 arch/m68k/include/asm/atomic.h : "=d" (c), "+m" (*v) v 207 arch/m68k/include/asm/atomic.h static inline int atomic_add_negative(int i, atomic_t *v) v 211 arch/m68k/include/asm/atomic.h : "=d" (c), "+m" (*v) v 266 arch/m68k/include/asm/io_mm.h #define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;}) v 267 arch/m68k/include/asm/io_mm.h #define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();}) v 268 arch/m68k/include/asm/io_mm.h #define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;}) v 269 arch/m68k/include/asm/io_mm.h #define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();}) v 270 arch/m68k/include/asm/io_mm.h #define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;}) v 271 arch/m68k/include/asm/io_mm.h #define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();}) v 296 arch/m68k/include/asm/io_mm.h #define isa_rom_outb_p(v, p) ({ isa_rom_outb((v), (p)); isa_delay(); }) v 297 arch/m68k/include/asm/io_mm.h #define isa_rom_outw_p(v, p) ({ isa_rom_outw((v), (p)); isa_delay(); }) v 102 arch/m68k/include/asm/mcfmmu.h static inline void mmu_write(u32 a, u32 v) v 104 arch/m68k/include/asm/mcfmmu.h *((volatile u32 *) a) = v; v 159 arch/m68k/include/uapi/asm/bootinfo.h #define BI_VERSION_MAJOR(v) (((v) >> 16) & 0xffff) v 160 arch/m68k/include/uapi/asm/bootinfo.h #define BI_VERSION_MINOR(v) ((v) & 0xffff) v 398 arch/m68k/kernel/setup_mm.c static int show_cpuinfo(struct seq_file *m, void *v) v 484 arch/m68k/kernel/setup_mm.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 489 arch/m68k/kernel/setup_mm.c static void c_stop(struct seq_file *m, void *v) v 500 arch/m68k/kernel/setup_mm.c static int hardware_proc_show(struct seq_file *m, void *v) v 175 arch/m68k/kernel/setup_no.c static int show_cpuinfo(struct seq_file *m, void *v) v 206 arch/m68k/kernel/setup_no.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 212 arch/m68k/kernel/setup_no.c static void c_stop(struct seq_file *m, void *v) v 28 arch/m68k/lib/muldi3.c #define umul_ppmm(w1, w0, u, v) \ v 35 arch/m68k/lib/muldi3.c __vl = __ll_lowpart (v); \ v 36 arch/m68k/lib/muldi3.c __vh = __ll_highpart (v); \ v 54 arch/m68k/lib/muldi3.c #define umul_ppmm(w1, w0, u, v) \ v 59 arch/m68k/lib/muldi3.c "dmi" ((USItype)(v))) v 63 arch/m68k/lib/muldi3.c #define __umulsidi3(u, v) \ v 65 arch/m68k/lib/muldi3.c umul_ppmm (__w.s.high, __w.s.low, u, v); \ v 82 arch/m68k/lib/muldi3.c __muldi3 (DItype u, DItype v) v 88 arch/m68k/lib/muldi3.c vv.ll = v; v 13 arch/microblaze/include/asm/atomic.h static inline int atomic_dec_if_positive(atomic_t *v) v 19 arch/microblaze/include/asm/atomic.h res = v->counter - 1; v 21 arch/microblaze/include/asm/atomic.h v->counter = res; v 49 arch/microblaze/include/asm/io.h #define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a)) v 50 arch/microblaze/include/asm/io.h #define out_be16(a, v) __raw_writew((v), (a)) v 55 arch/microblaze/include/asm/io.h #define writel_be(v, a) out_be32((__force unsigned *)a, v) v 59 arch/microblaze/include/asm/io.h #define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a)) v 60 arch/microblaze/include/asm/io.h #define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a)) v 66 arch/microblaze/include/asm/io.h #define out_8(a, v) __raw_writeb((v), (a)) v 25 arch/microblaze/include/asm/mmu.h unsigned long v:1; /* Entry is valid */ v 28 arch/microblaze/kernel/cpu/mb.c static int show_cpuinfo(struct seq_file *m, void *v) v 143 arch/microblaze/kernel/cpu/mb.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 149 arch/microblaze/kernel/cpu/mb.c static void c_stop(struct seq_file *m, void *v) v 30 arch/microblaze/lib/libgcc.h extern long long __muldi3(long long u, long long v); v 14 arch/microblaze/lib/muldi3.c #define umul_ppmm(w1, w0, u, v) \ v 21 arch/microblaze/lib/muldi3.c __vl = __ll_lowpart(v); \ v 22 arch/microblaze/lib/muldi3.c __vh = __ll_highpart(v); \ v 40 arch/microblaze/lib/muldi3.c #define __umulsidi3(u, v) ({ \ v 42 arch/microblaze/lib/muldi3.c umul_ppmm(__w.s.high, __w.s.low, u, v); \ v 47 arch/microblaze/lib/muldi3.c long long __muldi3(long long u, long long v) v 50 arch/microblaze/lib/muldi3.c const DWunion vv = {.ll = v}; v 50 arch/microblaze/mm/pgtable.c unsigned long v, i; v 98 arch/microblaze/mm/pgtable.c v = (unsigned long) area->addr; v 100 arch/microblaze/mm/pgtable.c v = (ioremap_bot -= size); v 110 arch/microblaze/mm/pgtable.c err = map_page(v + i, p + i, flags); v 113 arch/microblaze/mm/pgtable.c vfree((void *)v); v 117 arch/microblaze/mm/pgtable.c return (void __iomem *) (v + ((unsigned long)addr & ~PAGE_MASK)); v 161 arch/microblaze/mm/pgtable.c unsigned long v, p, s, f; v 163 arch/microblaze/mm/pgtable.c v = CONFIG_KERNEL_START; v 168 arch/microblaze/mm/pgtable.c if ((char *) v < _stext || (char *) v >= _etext) v 174 arch/microblaze/mm/pgtable.c map_page(v, p, f); v 175 arch/microblaze/mm/pgtable.c v += PAGE_SIZE; v 268 arch/mips/alchemy/common/clock.c unsigned long v = (alchemy_rdsys(AU1000_SYS_POWERCTRL) & 3) + 2; v 272 arch/mips/alchemy/common/clock.c pn, 0, 1, v); v 297 arch/mips/alchemy/common/clock.c unsigned long v; v 304 arch/mips/alchemy/common/clock.c v = __raw_readl(addr + AU1550_MEM_SDCONFIGB); v 305 arch/mips/alchemy/common/clock.c div = (v & (1 << 15)) ? 1 : 2; v 308 arch/mips/alchemy/common/clock.c v = __raw_readl(addr + AU1550_MEM_SDCONFIGB); v 309 arch/mips/alchemy/common/clock.c div = (v & (1 << 31)) ? 1 : 2; v 338 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsmem(AU1000_MEM_STCFG0); v 343 arch/mips/alchemy/common/clock.c v = 4 + ((v >> 11) & 1); v 346 arch/mips/alchemy/common/clock.c v = ((v >> 13) & 7) + 1; v 349 arch/mips/alchemy/common/clock.c pn, 0, 1, v); v 487 arch/mips/alchemy/common/clock.c unsigned long v, flags; v 490 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 491 arch/mips/alchemy/common/clock.c v |= (1 << 1) << c->shift; v 492 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 501 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 1); v 503 arch/mips/alchemy/common/clock.c return v & 1; v 509 arch/mips/alchemy/common/clock.c unsigned long v, flags; v 512 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 513 arch/mips/alchemy/common/clock.c v &= ~((1 << 1) << c->shift); v 514 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 521 arch/mips/alchemy/common/clock.c unsigned long v, flags; v 524 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 526 arch/mips/alchemy/common/clock.c v |= (1 << c->shift); v 528 arch/mips/alchemy/common/clock.c v &= ~(1 << c->shift); v 529 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 546 arch/mips/alchemy/common/clock.c unsigned long div, v, flags, ret; v 553 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 554 arch/mips/alchemy/common/clock.c v &= ~(0xff << sh); v 555 arch/mips/alchemy/common/clock.c v |= div << sh; v 556 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 566 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 2); v 568 arch/mips/alchemy/common/clock.c v = ((v & 0xff) + 1) * 2; v 569 arch/mips/alchemy/common/clock.c return parent_rate / v; v 592 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsys(c->reg); v 594 arch/mips/alchemy/common/clock.c v &= ~(3 << c->shift); v 595 arch/mips/alchemy/common/clock.c v |= (c->parent & 3) << c->shift; v 596 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 623 arch/mips/alchemy/common/clock.c unsigned long v, flags; v 626 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 627 arch/mips/alchemy/common/clock.c v &= ~(3 << c->shift); /* set input mux to "disabled" state */ v 628 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 650 arch/mips/alchemy/common/clock.c unsigned long flags, v; v 653 arch/mips/alchemy/common/clock.c v = c->parent - 1; v 655 arch/mips/alchemy/common/clock.c return v; v 668 arch/mips/alchemy/common/clock.c unsigned long div, v, flags, ret; v 673 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg) & (1 << 30); /* test "scale" bit */ v 674 arch/mips/alchemy/common/clock.c ret = alchemy_calc_div(rate, parent_rate, v ? 1 : 2, v 675 arch/mips/alchemy/common/clock.c v ? 256 : 512, &div); v 678 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 679 arch/mips/alchemy/common/clock.c v &= ~(0xff << sh); v 680 arch/mips/alchemy/common/clock.c v |= (div & 0xff) << sh; v 681 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 692 arch/mips/alchemy/common/clock.c unsigned long v, t; v 694 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 695 arch/mips/alchemy/common/clock.c t = parent_rate / (((v >> sh) & 0xff) + 1); v 696 arch/mips/alchemy/common/clock.c if ((v & (1 << 30)) == 0) /* test scale bit */ v 748 arch/mips/alchemy/common/clock.c unsigned long v; v 789 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(a->reg); v 790 arch/mips/alchemy/common/clock.c a->parent = (v >> a->shift) & 3; v 815 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsys(c->reg); v 817 arch/mips/alchemy/common/clock.c return (((v >> c->shift) >> 2) & 7) != 0; v 822 arch/mips/alchemy/common/clock.c unsigned long v = alchemy_rdsys(c->reg); v 824 arch/mips/alchemy/common/clock.c v &= ~((7 << 2) << c->shift); v 825 arch/mips/alchemy/common/clock.c v |= ((c->parent & 7) << 2) << c->shift; v 826 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 846 arch/mips/alchemy/common/clock.c unsigned long v, flags; v 849 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 850 arch/mips/alchemy/common/clock.c v &= ~((3 << 2) << c->shift); /* mux to "disabled" state */ v 851 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 881 arch/mips/alchemy/common/clock.c unsigned long v = (alchemy_rdsys(c->reg) >> c->shift) & 3; v 883 arch/mips/alchemy/common/clock.c return parent_rate / c->dt[v]; v 890 arch/mips/alchemy/common/clock.c unsigned long d, v, flags; v 910 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(c->reg); v 911 arch/mips/alchemy/common/clock.c v &= ~(3 << c->shift); v 912 arch/mips/alchemy/common/clock.c v |= (i & 3) << c->shift; v 913 arch/mips/alchemy/common/clock.c alchemy_wrsys(v, c->reg); v 954 arch/mips/alchemy/common/clock.c unsigned long v; v 1008 arch/mips/alchemy/common/clock.c v = alchemy_rdsys(a->reg); v 1009 arch/mips/alchemy/common/clock.c a->parent = ((v >> a->shift) >> 2) & 7; v 124 arch/mips/alchemy/common/gpiolib.c static void alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v) v 126 arch/mips/alchemy/common/gpiolib.c au1300_gpio_set_value(off + AU1300_GPIO_BASE, v); v 135 arch/mips/alchemy/common/gpiolib.c int v) v 137 arch/mips/alchemy/common/gpiolib.c return au1300_gpio_direction_output(off + AU1300_GPIO_BASE, v); v 103 arch/mips/alchemy/devboards/bcsr.c unsigned short v = 1 << (d->irq - bcsr_csc_base); v 104 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); v 110 arch/mips/alchemy/devboards/bcsr.c unsigned short v = 1 << (d->irq - bcsr_csc_base); v 111 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); v 112 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */ v 118 arch/mips/alchemy/devboards/bcsr.c unsigned short v = 1 << (d->irq - bcsr_csc_base); v 119 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET); v 36 arch/mips/alchemy/devboards/db1550.c unsigned long v; v 41 arch/mips/alchemy/devboards/db1550.c v = alchemy_rdsys(AU1000_SYS_PINFUNC); v 42 arch/mips/alchemy/devboards/db1550.c alchemy_wrsys(v | 1 | SYS_PF_PSC1_S1, AU1000_SYS_PINFUNC); v 43 arch/mips/bcm63xx/gpio.c u32 *v; v 52 arch/mips/bcm63xx/gpio.c v = &gpio_out_low; v 56 arch/mips/bcm63xx/gpio.c v = &gpio_out_high; v 61 arch/mips/bcm63xx/gpio.c *v |= mask; v 63 arch/mips/bcm63xx/gpio.c *v &= ~mask; v 64 arch/mips/bcm63xx/gpio.c bcm_gpio_writel(*v, reg); v 551 arch/mips/boot/tools/relocs.c static int write_reloc_as_bin(uint32_t v, FILE *f) v 555 arch/mips/boot/tools/relocs.c v = cpu_to_elf32(v); v 557 arch/mips/boot/tools/relocs.c memcpy(buf, &v, sizeof(uint32_t)); v 561 arch/mips/boot/tools/relocs.c static int write_reloc_as_text(uint32_t v, FILE *f) v 565 arch/mips/boot/tools/relocs.c res = fprintf(f, "\t.long 0x%08"PRIx32"\n", v); v 143 arch/mips/cavium-octeon/executive/cvmx-boot-vector.c uint64_t v = _cvmx_bootvector_data[i]; v 146 arch/mips/cavium-octeon/executive/cvmx-boot-vector.c v &= 0xffffffff00000000ull; /* KScratch not availble. */ v 148 arch/mips/cavium-octeon/executive/cvmx-boot-vector.c cvmx_write_csr(CVMX_MIO_BOOT_LOC_DAT, v); v 31 arch/mips/cavium-octeon/oct_ilm.c static int show_latency(struct seq_file *m, void *v) v 1583 arch/mips/cavium-octeon/octeon-irq.c u32 v; v 1585 arch/mips/cavium-octeon/octeon-irq.c r = of_property_read_u32_index(gpio_node, "interrupts", 0, &v); v 1590 arch/mips/cavium-octeon/octeon-irq.c base_hwirq = v; v 44 arch/mips/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 53 arch/mips/include/asm/atomic.h #define atomic_set(v, i) WRITE_ONCE((v)->counter, (i)) v 56 arch/mips/include/asm/atomic.h static __inline__ void atomic_##op(int i, atomic_t * v) \ v 70 arch/mips/include/asm/atomic.h : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \ v 76 arch/mips/include/asm/atomic.h v->counter c_op i; \ v 82 arch/mips/include/asm/atomic.h static __inline__ int atomic_##op##_return_relaxed(int i, atomic_t * v) \ v 100 arch/mips/include/asm/atomic.h "+" GCC_OFF_SMALL_ASM() (v->counter) \ v 106 arch/mips/include/asm/atomic.h result = v->counter; \ v 108 arch/mips/include/asm/atomic.h v->counter = result; \ v 116 arch/mips/include/asm/atomic.h static __inline__ int atomic_fetch_##op##_relaxed(int i, atomic_t * v) \ v 134 arch/mips/include/asm/atomic.h "+" GCC_OFF_SMALL_ASM() (v->counter) \ v 140 arch/mips/include/asm/atomic.h result = v->counter; \ v 141 arch/mips/include/asm/atomic.h v->counter c_op i; \ v 187 arch/mips/include/asm/atomic.h static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) v 212 arch/mips/include/asm/atomic.h "+" GCC_OFF_SMALL_ASM() (v->counter) v 218 arch/mips/include/asm/atomic.h result = v->counter; v 221 arch/mips/include/asm/atomic.h v->counter = result; v 230 arch/mips/include/asm/atomic.h #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) v 231 arch/mips/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), (new))) v 237 arch/mips/include/asm/atomic.h #define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v) v 248 arch/mips/include/asm/atomic.h #define atomic64_read(v) READ_ONCE((v)->counter) v 255 arch/mips/include/asm/atomic.h #define atomic64_set(v, i) WRITE_ONCE((v)->counter, (i)) v 258 arch/mips/include/asm/atomic.h static __inline__ void atomic64_##op(s64 i, atomic64_t * v) \ v 272 arch/mips/include/asm/atomic.h : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \ v 278 arch/mips/include/asm/atomic.h v->counter c_op i; \ v 284 arch/mips/include/asm/atomic.h static __inline__ s64 atomic64_##op##_return_relaxed(s64 i, atomic64_t * v) \ v 302 arch/mips/include/asm/atomic.h "+" GCC_OFF_SMALL_ASM() (v->counter) \ v 308 arch/mips/include/asm/atomic.h result = v->counter; \ v 310 arch/mips/include/asm/atomic.h v->counter = result; \ v 318 arch/mips/include/asm/atomic.h static __inline__ s64 atomic64_fetch_##op##_relaxed(s64 i, atomic64_t * v) \ v 336 arch/mips/include/asm/atomic.h "+" GCC_OFF_SMALL_ASM() (v->counter) \ v 342 arch/mips/include/asm/atomic.h result = v->counter; \ v 343 arch/mips/include/asm/atomic.h v->counter c_op i; \ v 390 arch/mips/include/asm/atomic.h static __inline__ s64 atomic64_sub_if_positive(s64 i, atomic64_t * v) v 411 arch/mips/include/asm/atomic.h "+" GCC_OFF_SMALL_ASM() (v->counter) v 417 arch/mips/include/asm/atomic.h result = v->counter; v 420 arch/mips/include/asm/atomic.h v->counter = result; v 429 arch/mips/include/asm/atomic.h #define atomic64_cmpxchg(v, o, n) \ v 430 arch/mips/include/asm/atomic.h ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) v 431 arch/mips/include/asm/atomic.h #define atomic64_xchg(v, new) (xchg(&((v)->counter), (new))) v 437 arch/mips/include/asm/atomic.h #define atomic64_dec_if_positive(v) atomic64_sub_if_positive(1, v) v 60 arch/mips/include/asm/cop2.h extern int cu2_notifier_call_chain(unsigned long val, void *v); v 125 arch/mips/include/asm/cpu-info.h extern int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v); v 20 arch/mips/include/asm/dec/ioasic.h static inline void ioasic_write(unsigned int reg, u32 v) v 22 arch/mips/include/asm/dec/ioasic.h ioasic_base[reg / 4] = v; v 645 arch/mips/include/asm/io.h #define csr_out32(v, a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v)) v 814 arch/mips/include/asm/kvm_host.h const struct kvm_one_reg *reg, s64 *v); v 816 arch/mips/include/asm/kvm_host.h const struct kvm_one_reg *reg, s64 v); v 91 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_DSCTYPE(v) (((v)) & 0xf) v 92 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_BMID(v) (((v) >> 0x04) & 0xf) v 93 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_CPUTYPE(v) (((v) >> 0x08) & 0xf) v 94 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_BUSSPEED(v) (((v) >> 0x0c) & 0xf) v 95 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_CPUCLK(v) (((v) >> 0x10) & 0xf) v 96 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_SDRAMBANKSZ(v) (((v) >> 0x14) & 0xf) v 97 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_SDRAMBANKS(v) (((v) >> 0x18) & 0xf) v 98 arch/mips/include/asm/lasat/lasat.h #define LASAT_W0_L2CACHE(v) (((v) >> 0x1c) & 0xf) v 100 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_EDHAC(v) (((v)) & 0xf) v 101 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_HIFN(v) (((v) >> 0x04) & 0x1) v 102 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_ISDN(v) (((v) >> 0x05) & 0x1) v 103 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_IDE(v) (((v) >> 0x06) & 0x1) v 104 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_HDLC(v) (((v) >> 0x07) & 0x1) v 105 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_USVERSION(v) (((v) >> 0x08) & 0x1) v 106 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_4MACS(v) (((v) >> 0x09) & 0x1) v 107 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_EXTSERIAL(v) (((v) >> 0x0a) & 0x1) v 108 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_FLASHSIZE(v) (((v) >> 0x0c) & 0xf) v 109 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_PCISLOTS(v) (((v) >> 0x10) & 0xf) v 110 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_PCI1OPT(v) (((v) >> 0x14) & 0xf) v 111 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_PCI2OPT(v) (((v) >> 0x18) & 0xf) v 112 arch/mips/include/asm/lasat/lasat.h #define LASAT_W1_PCI3OPT(v) (((v) >> 0x1c) & 0xf) v 608 arch/mips/include/asm/mach-au1x00/au1000.h static inline void alchemy_wrsys(unsigned long v, int regofs) v 612 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(v, b + regofs); v 624 arch/mips/include/asm/mach-au1x00/au1000.h static inline void alchemy_wrsmem(unsigned long v, int regofs) v 628 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(v, b + regofs); v 218 arch/mips/include/asm/mach-au1x00/gpio-au1000.h static inline void alchemy_gpio1_set_value(int gpio, int v) v 221 arch/mips/include/asm/mach-au1x00/gpio-au1000.h unsigned long r = v ? AU1000_SYS_OUTPUTSET : AU1000_SYS_OUTPUTCLR; v 238 arch/mips/include/asm/mach-au1x00/gpio-au1000.h static inline int alchemy_gpio1_direction_output(int gpio, int v) v 243 arch/mips/include/asm/mach-au1x00/gpio-au1000.h alchemy_gpio1_set_value(gpio, v); v 298 arch/mips/include/asm/mach-au1x00/gpio-au1000.h static inline void alchemy_gpio2_set_value(int gpio, int v) v 302 arch/mips/include/asm/mach-au1x00/gpio-au1000.h mask = ((v) ? 0x00010001 : 0x00010000) << (gpio - ALCHEMY_GPIO2_BASE); v 323 arch/mips/include/asm/mach-au1x00/gpio-au1000.h static inline int alchemy_gpio2_direction_output(int gpio, int v) v 326 arch/mips/include/asm/mach-au1x00/gpio-au1000.h alchemy_gpio2_set_value(gpio, v); v 474 arch/mips/include/asm/mach-au1x00/gpio-au1000.h static inline int alchemy_gpio_direction_output(int gpio, int v) v 477 arch/mips/include/asm/mach-au1x00/gpio-au1000.h alchemy_gpio2_direction_output(gpio, v) : v 478 arch/mips/include/asm/mach-au1x00/gpio-au1000.h alchemy_gpio1_direction_output(gpio, v); v 488 arch/mips/include/asm/mach-au1x00/gpio-au1000.h static inline void alchemy_gpio_set_value(int gpio, int v) v 491 arch/mips/include/asm/mach-au1x00/gpio-au1000.h alchemy_gpio2_set_value(gpio, v); v 493 arch/mips/include/asm/mach-au1x00/gpio-au1000.h alchemy_gpio1_set_value(gpio, v); v 55 arch/mips/include/asm/mach-au1x00/gpio-au1300.h static inline int au1300_gpio_set_value(unsigned int gpio, int v) v 64 arch/mips/include/asm/mach-au1x00/gpio-au1300.h __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL v 71 arch/mips/include/asm/mach-au1x00/gpio-au1300.h static inline int au1300_gpio_direction_output(unsigned int gpio, int v) v 74 arch/mips/include/asm/mach-au1x00/gpio-au1300.h return au1300_gpio_set_value(gpio, v); v 110 arch/mips/include/asm/mach-au1x00/gpio-au1300.h unsigned long v; v 119 arch/mips/include/asm/mach-au1x00/gpio-au1300.h v = __raw_readl(roff + AU1300_GPIC_RSTVAL); v 120 arch/mips/include/asm/mach-au1x00/gpio-au1300.h return (v >> gpio) & 1; v 160 arch/mips/include/asm/mach-au1x00/gpio-au1300.h static inline int gpio_direction_output(unsigned int gpio, int v) v 162 arch/mips/include/asm/mach-au1x00/gpio-au1300.h return au1300_gpio_direction_output(gpio, v); v 170 arch/mips/include/asm/mach-au1x00/gpio-au1300.h static inline void gpio_set_value(unsigned int gpio, int v) v 172 arch/mips/include/asm/mach-au1x00/gpio-au1300.h au1300_gpio_set_value(gpio, v); v 58 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v)) v 59 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v)) v 60 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v)) v 61 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_writeq(v, a) (*(volatile u64 *) BCM_REGS_VA((a)) = (v)) v 69 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_rset_writeb(s, v, o) bcm_writeb((v), \ v 71 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_rset_writew(s, v, o) bcm_writew((v), \ v 73 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_rset_writel(s, v, o) bcm_writel((v), \ v 80 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_perf_writel(v, o) bcm_rset_writel(RSET_PERF, (v), (o)) v 82 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_timer_writel(v, o) bcm_rset_writel(RSET_TIMER, (v), (o)) v 84 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_wdt_writel(v, o) bcm_rset_writel(RSET_WDT, (v), (o)) v 86 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_gpio_writel(v, o) bcm_rset_writel(RSET_GPIO, (v), (o)) v 88 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_uart0_writel(v, o) bcm_rset_writel(RSET_UART0, (v), (o)) v 90 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_mpi_writel(v, o) bcm_rset_writel(RSET_MPI, (v), (o)) v 92 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_pcmcia_writel(v, o) bcm_rset_writel(RSET_PCMCIA, (v), (o)) v 94 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_pcie_writel(v, o) bcm_rset_writel(RSET_PCIE, (v), (o)) v 96 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_sdram_writel(v, o) bcm_rset_writel(RSET_SDRAM, (v), (o)) v 98 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_memc_writel(v, o) bcm_rset_writel(RSET_MEMC, (v), (o)) v 100 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_ddr_writel(v, o) bcm_rset_writel(RSET_DDR, (v), (o)) v 102 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h #define bcm_misc_writel(v, o) bcm_rset_writel(RSET_MISC, (v), (o)) v 331 arch/mips/include/asm/mipsmtregs.h #define mttgpr(rd,v) \ v 341 arch/mips/include/asm/mipsmtregs.h : : "r" (v)); \ v 344 arch/mips/include/asm/mipsmtregs.h #define mttc0(rd, sel, v) \ v 355 arch/mips/include/asm/mipsmtregs.h : "r" (v)); \ v 359 arch/mips/include/asm/mipsmtregs.h #define mttr(rd, u, sel, v) \ v 363 arch/mips/include/asm/mipsmtregs.h : : "r" (v)); \ v 179 arch/mips/include/asm/netlogic/xlp-hal/bridge.h #define nlm_write_bridge_reg(b, r, v) nlm_write_reg(b, r, v) v 201 arch/mips/include/asm/netlogic/xlp-hal/iomap.h #define nlm_write_pci_reg(b, r, v) nlm_write_reg(b, r, v) v 100 arch/mips/include/asm/netlogic/xlp-hal/pcibus.h #define nlm_write_pcie_reg(b, r, v) nlm_write_reg(b, r, v) v 218 arch/mips/include/asm/netlogic/xlp-hal/pic.h #define nlm_write_pic_reg(b, r, v) nlm_write_reg64(b, r, v) v 195 arch/mips/include/asm/netlogic/xlp-hal/sys.h #define nlm_write_sys_reg(b, r, v) nlm_write_reg(b, r, v) v 95 arch/mips/include/asm/netlogic/xlp-hal/uart.h #define nlm_write_uart_reg(b, r, v) nlm_write_reg(b, r, v) v 161 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc0(s, v) __write_32bit_c2_register($16, s, v) v 162 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc1(s, v) __write_32bit_c2_register($17, s, v) v 163 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc2(s, v) __write_32bit_c2_register($18, s, v) v 164 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc3(s, v) __write_32bit_c2_register($19, s, v) v 165 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc4(s, v) __write_32bit_c2_register($20, s, v) v 166 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc5(s, v) __write_32bit_c2_register($21, s, v) v 167 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc6(s, v) __write_32bit_c2_register($22, s, v) v 168 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc7(s, v) __write_32bit_c2_register($23, s, v) v 169 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc8(s, v) __write_32bit_c2_register($24, s, v) v 170 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc9(s, v) __write_32bit_c2_register($25, s, v) v 171 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc10(s, v) __write_32bit_c2_register($26, s, v) v 172 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc11(s, v) __write_32bit_c2_register($27, s, v) v 173 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc12(s, v) __write_32bit_c2_register($28, s, v) v 174 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc13(s, v) __write_32bit_c2_register($29, s, v) v 175 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc14(s, v) __write_32bit_c2_register($30, s, v) v 176 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_cc15(s, v) __write_32bit_c2_register($31, s, v) v 179 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_status0(v) __write_32bit_c2_register($2, 0, v) v 181 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_status1(v) __write_32bit_c2_register($2, 1, v) v 184 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_config(v) __write_32bit_c2_register($3, 0, v) v 186 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_bucksize(b, v) __write_32bit_c2_register($4, b, v) v 193 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_tx_msg0(v) __write_64bit_c2_register($0, 0, v) v 194 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_tx_msg1(v) __write_64bit_c2_register($0, 1, v) v 195 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_tx_msg2(v) __write_64bit_c2_register($0, 2, v) v 196 arch/mips/include/asm/netlogic/xlr/fmn.h #define nlm_write_c2_tx_msg3(v) __write_64bit_c2_register($0, 3, v) v 49 arch/mips/include/asm/netlogic/xlr/msidef.h #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \ v 3507 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t v:1; v 3531 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t v:1; v 3555 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t v:2; v 3561 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t v:2; v 90 arch/mips/include/asm/octeon/cvmx.h #define CAST64(v) ((long long)(long)(v)) v 91 arch/mips/include/asm/octeon/cvmx.h #define CASTPTR(type, v) ((type *)(long)(v)) v 222 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n)) v 223 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n)) v 229 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n)) v 230 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n)) v 232 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n)) v 233 arch/mips/include/asm/sibyte/sb1250_defs.h #define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n)) v 45 arch/mips/include/asm/vga.h static inline void scr_memsetw(u16 *s, u16 v, unsigned int count) v 47 arch/mips/include/asm/vga.h memset16(s, cpu_to_le16(v), count / 2); v 120 arch/mips/include/asm/vpe.h void release_vpe(struct vpe *v); v 125 arch/mips/include/asm/vpe.h int vpe_run(struct vpe *v); v 186 arch/mips/kernel/cpu-bugs64.c long v, tmp; v 213 arch/mips/kernel/cpu-bugs64.c : "=r" (v), "=&r" (tmp) v 231 arch/mips/kernel/cpu-bugs64.c : "=r" (v), "=&r" (tmp) v 249 arch/mips/kernel/cpu-bugs64.c long v, w, tmp; v 283 arch/mips/kernel/cpu-bugs64.c : "=&r" (v), "=&r" (w), "=&r" (tmp) v 286 arch/mips/kernel/cpu-bugs64.c daddiu_bug = v != w; v 301 arch/mips/kernel/cpu-bugs64.c : "=&r" (v), "=&r" (w), "=&r" (tmp) v 304 arch/mips/kernel/cpu-bugs64.c if (v == w) { v 45 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 51 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 53 arch/mips/kernel/module.c *location = base + v; v 59 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 61 arch/mips/kernel/module.c if (v % 4) { v 67 arch/mips/kernel/module.c if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { v 74 arch/mips/kernel/module.c ((base + (v >> 2)) & 0x03ffffff); v 80 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 86 arch/mips/kernel/module.c ((((long long) v + 0x8000LL) >> 16) & 0xffff); v 100 arch/mips/kernel/module.c n->value = v; v 119 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 126 arch/mips/kernel/module.c *location = (*location & 0xffff0000) | (v & 0xffff); v 142 arch/mips/kernel/module.c if (v != l->value) v 153 arch/mips/kernel/module.c val += v; v 175 arch/mips/kernel/module.c val = v + vallo; v 191 arch/mips/kernel/module.c Elf_Addr v, unsigned int bits) v 197 arch/mips/kernel/module.c if (v % 4) { v 207 arch/mips/kernel/module.c offset += ((long)v - (long)location) >> 2; v 222 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 224 arch/mips/kernel/module.c return apply_r_mips_pc(me, location, base, v, 16); v 228 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 230 arch/mips/kernel/module.c return apply_r_mips_pc(me, location, base, v, 21); v 234 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 236 arch/mips/kernel/module.c return apply_r_mips_pc(me, location, base, v, 26); v 240 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 245 arch/mips/kernel/module.c *(Elf_Addr *)location = v; v 251 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 257 arch/mips/kernel/module.c ((((long long)v + 0x80008000LL) >> 32) & 0xffff); v 263 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela) v 269 arch/mips/kernel/module.c ((((long long)v + 0x800080008000LL) >> 48) & 0xffff); v 290 arch/mips/kernel/module.c u32 base, Elf_Addr v, bool rela); v 319 arch/mips/kernel/module.c Elf_Addr v; v 360 arch/mips/kernel/module.c v = sym->st_value + r.rela->r_addend; v 364 arch/mips/kernel/module.c v = sym->st_value; v 369 arch/mips/kernel/module.c err = handler(me, location, base, v, rela); v 68 arch/mips/kernel/pm.c void *v) v 31 arch/mips/kernel/proc.c int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v) v 33 arch/mips/kernel/proc.c return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v); v 36 arch/mips/kernel/proc.c static int show_cpuinfo(struct seq_file *m, void *v) v 39 arch/mips/kernel/proc.c unsigned long n = (unsigned long) v - 1; v 174 arch/mips/kernel/proc.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 180 arch/mips/kernel/proc.c static void c_stop(struct seq_file *m, void *v) v 424 arch/mips/kernel/relocate.c unsigned long v, void *p) v 49 arch/mips/kernel/segment.c static int show_segments(struct seq_file *m, void *v) v 50 arch/mips/kernel/smp-cps.c int cl, c, v; v 73 arch/mips/kernel/smp-cps.c for (v = 0; v < min_t(int, core_vpes, NR_CPUS - nvpes); v++) { v 74 arch/mips/kernel/smp-cps.c cpu_set_cluster(&cpu_data[nvpes + v], cl); v 75 arch/mips/kernel/smp-cps.c cpu_set_core(&cpu_data[nvpes + v], c); v 76 arch/mips/kernel/smp-cps.c cpu_set_vpe_id(&cpu_data[nvpes + v], v); v 87 arch/mips/kernel/smp-cps.c for (v = 0; v < min_t(unsigned, nvpes, NR_CPUS); v++) { v 88 arch/mips/kernel/smp-cps.c set_cpu_possible(v, cpu_cluster(&cpu_data[v]) == 0); v 89 arch/mips/kernel/smp-cps.c set_cpu_present(v, cpu_cluster(&cpu_data[v]) == 0); v 90 arch/mips/kernel/smp-cps.c __cpu_number_map[v] = v; v 91 arch/mips/kernel/smp-cps.c __cpu_logical_map[v] = v; v 172 arch/mips/kernel/spram.c unsigned int v; v 179 arch/mips/kernel/spram.c v = vp[0]; v 180 arch/mips/kernel/spram.c if (v != TDAT) v 182 arch/mips/kernel/spram.c vp, TDAT, v); v 183 arch/mips/kernel/spram.c v = vp[1]; v 184 arch/mips/kernel/spram.c if (v != ~TDAT) v 186 arch/mips/kernel/spram.c vp+1, ~TDAT, v); v 1211 arch/mips/kernel/traps.c int cu2_notifier_call_chain(unsigned long val, void *v) v 1213 arch/mips/kernel/traps.c return raw_notifier_call_chain(&cu2_chain, val, v); v 2451 arch/mips/kernel/traps.c void *v) v 92 arch/mips/kernel/vpe-cmp.c struct vpe *v = NULL; v 138 arch/mips/kernel/vpe-cmp.c v = alloc_vpe(aprp_cpu_index()); v 139 arch/mips/kernel/vpe-cmp.c if (v == NULL) { v 146 arch/mips/kernel/vpe-cmp.c v->ntcs = 1; v 149 arch/mips/kernel/vpe-cmp.c list_add(&t->tc, &v->tc); v 152 arch/mips/kernel/vpe-cmp.c t->pvpe = v; /* set the parent vpe */ v 170 arch/mips/kernel/vpe-cmp.c struct vpe *v, *n; v 177 arch/mips/kernel/vpe-cmp.c list_for_each_entry_safe(v, n, &vpecontrol.vpe_list, list) v 178 arch/mips/kernel/vpe-cmp.c if (v->state != VPE_STATE_UNUSED) v 179 arch/mips/kernel/vpe-cmp.c release_vpe(v); v 26 arch/mips/kernel/vpe-mt.c int vpe_run(struct vpe *v) v 46 arch/mips/kernel/vpe-mt.c if (list_empty(&v->tc)) { v 52 arch/mips/kernel/vpe-mt.c v->minor); v 57 arch/mips/kernel/vpe-mt.c t = list_first_entry(&v->tc, struct tc, tc); v 81 arch/mips/kernel/vpe-mt.c write_tc_c0_tcrestart((unsigned long)v->__start); v 99 arch/mips/kernel/vpe-mt.c mttgpr(6, v->ntcs); v 141 arch/mips/kernel/vpe-mt.c list_for_each_entry(notifier, &v->notify, list) v 181 arch/mips/kernel/vpe-mt.c struct vpe *v; v 185 arch/mips/kernel/vpe-mt.c v = get_vpe(i); v 186 arch/mips/kernel/vpe-mt.c if (v != NULL) { v 187 arch/mips/kernel/vpe-mt.c v->state = VPE_STATE_INUSE; v 188 arch/mips/kernel/vpe-mt.c return v; v 198 arch/mips/kernel/vpe-mt.c struct vpe *v = vpe; v 200 arch/mips/kernel/vpe-mt.c v->__start = start; v 201 arch/mips/kernel/vpe-mt.c return vpe_run(v); v 208 arch/mips/kernel/vpe-mt.c struct vpe *v = vpe; v 214 arch/mips/kernel/vpe-mt.c t = list_entry(v->tc.next, struct tc, tc); v 229 arch/mips/kernel/vpe-mt.c struct vpe *v = vpe; v 233 arch/mips/kernel/vpe-mt.c t = list_entry(v->tc.next, struct tc, tc); v 252 arch/mips/kernel/vpe-mt.c v->state = VPE_STATE_UNUSED; v 332 arch/mips/kernel/vpe-mt.c struct vpe *v = NULL; v 413 arch/mips/kernel/vpe-mt.c v = alloc_vpe(tc); v 414 arch/mips/kernel/vpe-mt.c if (v == NULL) { v 419 arch/mips/kernel/vpe-mt.c v->ntcs = hw_tcs - aprp_cpu_index(); v 422 arch/mips/kernel/vpe-mt.c list_add(&t->tc, &v->tc); v 449 arch/mips/kernel/vpe-mt.c t->pvpe = v; /* set the parent vpe */ v 510 arch/mips/kernel/vpe-mt.c struct vpe *v, *n; v 517 arch/mips/kernel/vpe-mt.c list_for_each_entry_safe(v, n, &vpecontrol.vpe_list, list) { v 518 arch/mips/kernel/vpe-mt.c if (v->state != VPE_STATE_UNUSED) v 519 arch/mips/kernel/vpe-mt.c release_vpe(v); v 55 arch/mips/kernel/vpe.c struct vpe *res, *v; v 62 arch/mips/kernel/vpe.c list_for_each_entry(v, &vpecontrol.vpe_list, list) { v 63 arch/mips/kernel/vpe.c if (v->minor == VPE_MODULE_MINOR) { v 64 arch/mips/kernel/vpe.c res = v; v 94 arch/mips/kernel/vpe.c struct vpe *v; v 96 arch/mips/kernel/vpe.c v = kzalloc(sizeof(struct vpe), GFP_KERNEL); v 97 arch/mips/kernel/vpe.c if (v == NULL) v 100 arch/mips/kernel/vpe.c INIT_LIST_HEAD(&v->tc); v 102 arch/mips/kernel/vpe.c list_add_tail(&v->list, &vpecontrol.vpe_list); v 105 arch/mips/kernel/vpe.c INIT_LIST_HEAD(&v->notify); v 106 arch/mips/kernel/vpe.c v->minor = VPE_MODULE_MINOR; v 109 arch/mips/kernel/vpe.c return v; v 133 arch/mips/kernel/vpe.c void release_vpe(struct vpe *v) v 135 arch/mips/kernel/vpe.c list_del(&v->list); v 136 arch/mips/kernel/vpe.c if (v->load_addr) v 137 arch/mips/kernel/vpe.c release_progmem(v->load_addr); v 138 arch/mips/kernel/vpe.c kfree(v); v 229 arch/mips/kernel/vpe.c Elf32_Addr v) v 235 arch/mips/kernel/vpe.c Elf32_Addr v) v 240 arch/mips/kernel/vpe.c rel = (int)v - gp_addr; v 244 arch/mips/kernel/vpe.c rel = (int)(short)((int)v + gp_offs + v 260 arch/mips/kernel/vpe.c Elf32_Addr v) v 263 arch/mips/kernel/vpe.c rel = (((unsigned int)v - (unsigned int)location)); v 279 arch/mips/kernel/vpe.c Elf32_Addr v) v 281 arch/mips/kernel/vpe.c *location += v; v 287 arch/mips/kernel/vpe.c Elf32_Addr v) v 289 arch/mips/kernel/vpe.c if (v % 4) { v 307 arch/mips/kernel/vpe.c ((*location + (v >> 2)) & 0x03ffffff); v 312 arch/mips/kernel/vpe.c Elf32_Addr v) v 326 arch/mips/kernel/vpe.c n->value = v; v 334 arch/mips/kernel/vpe.c Elf32_Addr v) v 352 arch/mips/kernel/vpe.c if (v != l->value) { v 365 arch/mips/kernel/vpe.c val += v; v 387 arch/mips/kernel/vpe.c val = v + vallo; v 405 arch/mips/kernel/vpe.c Elf32_Addr v) = { v 435 arch/mips/kernel/vpe.c Elf32_Addr v; v 454 arch/mips/kernel/vpe.c v = sym->st_value; v 456 arch/mips/kernel/vpe.c res = reloc_handlers[ELF32_R_TYPE(r_info)](me, location, v); v 550 arch/mips/kernel/vpe.c static int find_vpe_symbols(struct vpe *v, Elf_Shdr *sechdrs, v 559 arch/mips/kernel/vpe.c v->__start = sym[i].st_value; v 562 arch/mips/kernel/vpe.c v->shared_ptr = (void *)sym[i].st_value; v 565 arch/mips/kernel/vpe.c if ((v->__start == 0) || (v->shared_ptr == NULL)) v 576 arch/mips/kernel/vpe.c static int vpe_elfload(struct vpe *v) v 588 arch/mips/kernel/vpe.c hdr = (Elf_Ehdr *) v->pbuffer; v 589 arch/mips/kernel/vpe.c len = v->plen; v 644 arch/mips/kernel/vpe.c v->load_addr = alloc_progmem(mod.core_layout.size); v 645 arch/mips/kernel/vpe.c if (!v->load_addr) v 648 arch/mips/kernel/vpe.c pr_info("VPE loader: loading to %p\n", v->load_addr); v 657 arch/mips/kernel/vpe.c dest = v->load_addr + sechdrs[i].sh_entsize; v 731 arch/mips/kernel/vpe.c flush_icache_range((unsigned long)v->load_addr, v 732 arch/mips/kernel/vpe.c (unsigned long)v->load_addr + v->len); v 734 arch/mips/kernel/vpe.c if ((find_vpe_symbols(v, sechdrs, symindex, strtab, &mod)) < 0) { v 735 arch/mips/kernel/vpe.c if (v->__start == 0) { v 740 arch/mips/kernel/vpe.c if (v->shared_ptr == NULL) v 769 arch/mips/kernel/vpe.c struct vpe *v; v 779 arch/mips/kernel/vpe.c v = get_vpe(aprp_cpu_index()); v 780 arch/mips/kernel/vpe.c if (v == NULL) { v 786 arch/mips/kernel/vpe.c state = xchg(&v->state, VPE_STATE_INUSE); v 790 arch/mips/kernel/vpe.c list_for_each_entry(notifier, &v->notify, list) v 793 arch/mips/kernel/vpe.c release_progmem(v->load_addr); v 798 arch/mips/kernel/vpe.c v->pbuffer = vmalloc(P_SIZE); v 799 arch/mips/kernel/vpe.c if (!v->pbuffer) { v 803 arch/mips/kernel/vpe.c v->plen = P_SIZE; v 804 arch/mips/kernel/vpe.c v->load_addr = NULL; v 805 arch/mips/kernel/vpe.c v->len = 0; v 807 arch/mips/kernel/vpe.c v->cwd[0] = 0; v 808 arch/mips/kernel/vpe.c ret = getcwd(v->cwd, VPE_PATH_MAX); v 812 arch/mips/kernel/vpe.c v->shared_ptr = NULL; v 813 arch/mips/kernel/vpe.c v->__start = 0; v 821 arch/mips/kernel/vpe.c struct vpe *v; v 825 arch/mips/kernel/vpe.c v = get_vpe(aprp_cpu_index()); v 826 arch/mips/kernel/vpe.c if (v == NULL) v 829 arch/mips/kernel/vpe.c hdr = (Elf_Ehdr *) v->pbuffer; v 831 arch/mips/kernel/vpe.c if (vpe_elfload(v) >= 0) { v 832 arch/mips/kernel/vpe.c vpe_run(v); v 848 arch/mips/kernel/vpe.c v->shared_ptr = NULL; v 850 arch/mips/kernel/vpe.c vfree(v->pbuffer); v 851 arch/mips/kernel/vpe.c v->plen = 0; v 864 arch/mips/kernel/vpe.c struct vpe *v; v 869 arch/mips/kernel/vpe.c v = get_vpe(aprp_cpu_index()); v 871 arch/mips/kernel/vpe.c if (v == NULL) v 874 arch/mips/kernel/vpe.c if ((count + v->len) > v->plen) { v 879 arch/mips/kernel/vpe.c count -= copy_from_user(v->pbuffer + v->len, buffer, count); v 883 arch/mips/kernel/vpe.c v->len += count; v 897 arch/mips/kernel/vpe.c struct vpe *v = get_vpe(index); v 899 arch/mips/kernel/vpe.c if (v == NULL) v 902 arch/mips/kernel/vpe.c return v->shared_ptr; v 908 arch/mips/kernel/vpe.c struct vpe *v = get_vpe(index); v 910 arch/mips/kernel/vpe.c if (v == NULL) v 913 arch/mips/kernel/vpe.c list_add(¬ify->list, &v->notify); v 920 arch/mips/kernel/vpe.c struct vpe *v = get_vpe(index); v 922 arch/mips/kernel/vpe.c if (v == NULL) v 925 arch/mips/kernel/vpe.c return v->cwd; v 650 arch/mips/kvm/mips.c s64 v; v 657 arch/mips/kvm/mips.c v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0]; v 661 arch/mips/kvm/mips.c v = (long)vcpu->arch.hi; v 664 arch/mips/kvm/mips.c v = (long)vcpu->arch.lo; v 668 arch/mips/kvm/mips.c v = (long)vcpu->arch.pc; v 678 arch/mips/kvm/mips.c v = get_fpr32(&fpu->fpr[idx], 0); v 680 arch/mips/kvm/mips.c v = get_fpr32(&fpu->fpr[idx & ~1], idx & 1); v 689 arch/mips/kvm/mips.c v = get_fpr64(&fpu->fpr[idx], 0); v 694 arch/mips/kvm/mips.c v = boot_cpu_data.fpu_id; v 699 arch/mips/kvm/mips.c v = fpu->fcr31; v 723 arch/mips/kvm/mips.c v = boot_cpu_data.msa_id; v 728 arch/mips/kvm/mips.c v = fpu->msacsr; v 733 arch/mips/kvm/mips.c ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v); v 741 arch/mips/kvm/mips.c return put_user(v, uaddr64); v 744 arch/mips/kvm/mips.c u32 v32 = (u32)v; v 761 arch/mips/kvm/mips.c s64 v; v 768 arch/mips/kvm/mips.c if (get_user(v, uaddr64) != 0) v 776 arch/mips/kvm/mips.c v = (s64)v32; v 791 arch/mips/kvm/mips.c vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v; v 795 arch/mips/kvm/mips.c vcpu->arch.hi = v; v 798 arch/mips/kvm/mips.c vcpu->arch.lo = v; v 802 arch/mips/kvm/mips.c vcpu->arch.pc = v; v 812 arch/mips/kvm/mips.c set_fpr32(&fpu->fpr[idx], 0, v); v 814 arch/mips/kvm/mips.c set_fpr32(&fpu->fpr[idx & ~1], idx & 1, v); v 823 arch/mips/kvm/mips.c set_fpr64(&fpu->fpr[idx], 0, v); v 833 arch/mips/kvm/mips.c fpu->fcr31 = v; v 859 arch/mips/kvm/mips.c fpu->msacsr = v; v 864 arch/mips/kvm/mips.c return kvm_mips_callbacks->set_one_reg(vcpu, reg, v); v 767 arch/mips/kvm/trap_emul.c s64 *v) v 773 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_index(cop0); v 776 arch/mips/kvm/trap_emul.c *v = kvm_read_c0_guest_entrylo0(cop0); v 779 arch/mips/kvm/trap_emul.c *v = kvm_read_c0_guest_entrylo1(cop0); v 782 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_context(cop0); v 785 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_userlocal(cop0); v 788 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_pagemask(cop0); v 791 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_wired(cop0); v 794 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_hwrena(cop0); v 797 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_badvaddr(cop0); v 800 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_entryhi(cop0); v 803 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_compare(cop0); v 806 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_status(cop0); v 809 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_intctl(cop0); v 812 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_cause(cop0); v 815 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_epc(cop0); v 818 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_prid(cop0); v 821 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_ebase(cop0); v 824 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_config(cop0); v 827 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_config1(cop0); v 830 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_config2(cop0); v 833 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_config3(cop0); v 836 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_config4(cop0); v 839 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_config5(cop0); v 842 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_config7(cop0); v 845 arch/mips/kvm/trap_emul.c *v = kvm_mips_read_count(vcpu); v 848 arch/mips/kvm/trap_emul.c *v = vcpu->arch.count_ctl; v 851 arch/mips/kvm/trap_emul.c *v = ktime_to_ns(vcpu->arch.count_resume); v 854 arch/mips/kvm/trap_emul.c *v = vcpu->arch.count_hz; v 857 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_errorepc(cop0); v 860 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_kscratch1(cop0); v 863 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_kscratch2(cop0); v 866 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_kscratch3(cop0); v 869 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_kscratch4(cop0); v 872 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_kscratch5(cop0); v 875 arch/mips/kvm/trap_emul.c *v = (long)kvm_read_c0_guest_kscratch6(cop0); v 885 arch/mips/kvm/trap_emul.c s64 v) v 893 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_index(cop0, v); v 896 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_entrylo0(cop0, v); v 899 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_entrylo1(cop0, v); v 902 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_context(cop0, v); v 905 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_userlocal(cop0, v); v 908 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_pagemask(cop0, v); v 911 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_wired(cop0, v); v 914 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_hwrena(cop0, v); v 917 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_badvaddr(cop0, v); v 920 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_entryhi(cop0, v); v 923 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_status(cop0, v); v 929 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_epc(cop0, v); v 932 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_prid(cop0, v); v 940 arch/mips/kvm/trap_emul.c v); v 943 arch/mips/kvm/trap_emul.c kvm_mips_write_count(vcpu, v); v 946 arch/mips/kvm/trap_emul.c kvm_mips_write_compare(vcpu, v, false); v 954 arch/mips/kvm/trap_emul.c if ((kvm_read_c0_guest_cause(cop0) ^ v) & CAUSEF_DC) { v 955 arch/mips/kvm/trap_emul.c if (v & CAUSEF_DC) { v 959 arch/mips/kvm/trap_emul.c v); v 963 arch/mips/kvm/trap_emul.c v); v 967 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_cause(cop0, v); v 975 arch/mips/kvm/trap_emul.c change = (cur ^ v) & kvm_mips_config1_wrmask(vcpu); v 977 arch/mips/kvm/trap_emul.c v = cur ^ change; v 978 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_config1(cop0, v); v 986 arch/mips/kvm/trap_emul.c change = (cur ^ v) & kvm_mips_config3_wrmask(vcpu); v 988 arch/mips/kvm/trap_emul.c v = cur ^ change; v 989 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_config3(cop0, v); v 994 arch/mips/kvm/trap_emul.c change = (cur ^ v) & kvm_mips_config4_wrmask(vcpu); v 996 arch/mips/kvm/trap_emul.c v = cur ^ change; v 997 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_config4(cop0, v); v 1002 arch/mips/kvm/trap_emul.c change = (cur ^ v) & kvm_mips_config5_wrmask(vcpu); v 1004 arch/mips/kvm/trap_emul.c v = cur ^ change; v 1005 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_config5(cop0, v); v 1012 arch/mips/kvm/trap_emul.c ret = kvm_mips_set_count_ctl(vcpu, v); v 1015 arch/mips/kvm/trap_emul.c ret = kvm_mips_set_count_resume(vcpu, v); v 1018 arch/mips/kvm/trap_emul.c ret = kvm_mips_set_count_hz(vcpu, v); v 1021 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_errorepc(cop0, v); v 1024 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_kscratch1(cop0, v); v 1027 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_kscratch2(cop0, v); v 1030 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_kscratch3(cop0, v); v 1033 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_kscratch4(cop0, v); v 1036 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_kscratch5(cop0, v); v 1039 arch/mips/kvm/trap_emul.c kvm_write_c0_guest_kscratch6(cop0, v); v 54 arch/mips/kvm/vz.c static inline void kvm_vz_write_gc0_ebase(long v) v 63 arch/mips/kvm/vz.c write_gc0_ebase_64(v | MIPS_EBASE_WG); v 64 arch/mips/kvm/vz.c write_gc0_ebase_64(v); v 66 arch/mips/kvm/vz.c write_gc0_ebase(v | MIPS_EBASE_WG); v 67 arch/mips/kvm/vz.c write_gc0_ebase(v); v 1790 arch/mips/kvm/vz.c static inline s64 entrylo_kvm_to_user(unsigned long v) v 1792 arch/mips/kvm/vz.c s64 mask, ret = v; v 1801 arch/mips/kvm/vz.c ret |= ((s64)v & mask) << 32; v 1806 arch/mips/kvm/vz.c static inline unsigned long entrylo_user_to_kvm(s64 v) v 1808 arch/mips/kvm/vz.c unsigned long mask, ret = v; v 1817 arch/mips/kvm/vz.c ret |= (v >> 32) & mask; v 1824 arch/mips/kvm/vz.c s64 *v) v 1831 arch/mips/kvm/vz.c *v = (long)read_gc0_index(); v 1834 arch/mips/kvm/vz.c *v = entrylo_kvm_to_user(read_gc0_entrylo0()); v 1837 arch/mips/kvm/vz.c *v = entrylo_kvm_to_user(read_gc0_entrylo1()); v 1840 arch/mips/kvm/vz.c *v = (long)read_gc0_context(); v 1845 arch/mips/kvm/vz.c *v = read_gc0_contextconfig(); v 1850 arch/mips/kvm/vz.c *v = read_gc0_userlocal(); v 1856 arch/mips/kvm/vz.c *v = read_gc0_xcontextconfig(); v 1860 arch/mips/kvm/vz.c *v = (long)read_gc0_pagemask(); v 1863 arch/mips/kvm/vz.c *v = (long)read_gc0_pagegrain(); v 1868 arch/mips/kvm/vz.c *v = read_gc0_segctl0(); v 1873 arch/mips/kvm/vz.c *v = read_gc0_segctl1(); v 1878 arch/mips/kvm/vz.c *v = read_gc0_segctl2(); v 1883 arch/mips/kvm/vz.c *v = read_gc0_pwbase(); v 1888 arch/mips/kvm/vz.c *v = read_gc0_pwfield(); v 1893 arch/mips/kvm/vz.c *v = read_gc0_pwsize(); v 1896 arch/mips/kvm/vz.c *v = (long)read_gc0_wired(); v 1901 arch/mips/kvm/vz.c *v = read_gc0_pwctl(); v 1904 arch/mips/kvm/vz.c *v = (long)read_gc0_hwrena(); v 1907 arch/mips/kvm/vz.c *v = (long)read_gc0_badvaddr(); v 1912 arch/mips/kvm/vz.c *v = read_gc0_badinstr(); v 1917 arch/mips/kvm/vz.c *v = read_gc0_badinstrp(); v 1920 arch/mips/kvm/vz.c *v = kvm_mips_read_count(vcpu); v 1923 arch/mips/kvm/vz.c *v = (long)read_gc0_entryhi(); v 1926 arch/mips/kvm/vz.c *v = (long)read_gc0_compare(); v 1929 arch/mips/kvm/vz.c *v = (long)read_gc0_status(); v 1932 arch/mips/kvm/vz.c *v = read_gc0_intctl(); v 1935 arch/mips/kvm/vz.c *v = (long)read_gc0_cause(); v 1938 arch/mips/kvm/vz.c *v = (long)read_gc0_epc(); v 1944 arch/mips/kvm/vz.c *v = read_gc0_prid(); v 1947 arch/mips/kvm/vz.c *v = (long)kvm_read_c0_guest_prid(cop0); v 1952 arch/mips/kvm/vz.c *v = kvm_vz_read_gc0_ebase(); v 1955 arch/mips/kvm/vz.c *v = read_gc0_config(); v 1960 arch/mips/kvm/vz.c *v = read_gc0_config1(); v 1965 arch/mips/kvm/vz.c *v = read_gc0_config2(); v 1970 arch/mips/kvm/vz.c *v = read_gc0_config3(); v 1975 arch/mips/kvm/vz.c *v = read_gc0_config4(); v 1980 arch/mips/kvm/vz.c *v = read_gc0_config5(); v 1988 arch/mips/kvm/vz.c *v = vcpu->arch.maar[idx]; v 1993 arch/mips/kvm/vz.c *v = kvm_read_sw_gc0_maari(vcpu->arch.cop0); v 1997 arch/mips/kvm/vz.c *v = read_gc0_xcontext(); v 2001 arch/mips/kvm/vz.c *v = (long)read_gc0_errorepc(); v 2009 arch/mips/kvm/vz.c *v = (long)read_gc0_kscratch1(); v 2012 arch/mips/kvm/vz.c *v = (long)read_gc0_kscratch2(); v 2015 arch/mips/kvm/vz.c *v = (long)read_gc0_kscratch3(); v 2018 arch/mips/kvm/vz.c *v = (long)read_gc0_kscratch4(); v 2021 arch/mips/kvm/vz.c *v = (long)read_gc0_kscratch5(); v 2024 arch/mips/kvm/vz.c *v = (long)read_gc0_kscratch6(); v 2029 arch/mips/kvm/vz.c *v = vcpu->arch.count_ctl; v 2032 arch/mips/kvm/vz.c *v = ktime_to_ns(vcpu->arch.count_resume); v 2035 arch/mips/kvm/vz.c *v = vcpu->arch.count_hz; v 2045 arch/mips/kvm/vz.c s64 v) v 2054 arch/mips/kvm/vz.c write_gc0_index(v); v 2057 arch/mips/kvm/vz.c write_gc0_entrylo0(entrylo_user_to_kvm(v)); v 2060 arch/mips/kvm/vz.c write_gc0_entrylo1(entrylo_user_to_kvm(v)); v 2063 arch/mips/kvm/vz.c write_gc0_context(v); v 2068 arch/mips/kvm/vz.c write_gc0_contextconfig(v); v 2073 arch/mips/kvm/vz.c write_gc0_userlocal(v); v 2079 arch/mips/kvm/vz.c write_gc0_xcontextconfig(v); v 2083 arch/mips/kvm/vz.c write_gc0_pagemask(v); v 2086 arch/mips/kvm/vz.c write_gc0_pagegrain(v); v 2091 arch/mips/kvm/vz.c write_gc0_segctl0(v); v 2096 arch/mips/kvm/vz.c write_gc0_segctl1(v); v 2101 arch/mips/kvm/vz.c write_gc0_segctl2(v); v 2106 arch/mips/kvm/vz.c write_gc0_pwbase(v); v 2111 arch/mips/kvm/vz.c write_gc0_pwfield(v); v 2116 arch/mips/kvm/vz.c write_gc0_pwsize(v); v 2119 arch/mips/kvm/vz.c change_gc0_wired(MIPSR6_WIRED_WIRED, v); v 2124 arch/mips/kvm/vz.c write_gc0_pwctl(v); v 2127 arch/mips/kvm/vz.c write_gc0_hwrena(v); v 2130 arch/mips/kvm/vz.c write_gc0_badvaddr(v); v 2135 arch/mips/kvm/vz.c write_gc0_badinstr(v); v 2140 arch/mips/kvm/vz.c write_gc0_badinstrp(v); v 2143 arch/mips/kvm/vz.c kvm_mips_write_count(vcpu, v); v 2146 arch/mips/kvm/vz.c write_gc0_entryhi(v); v 2149 arch/mips/kvm/vz.c kvm_mips_write_compare(vcpu, v, false); v 2152 arch/mips/kvm/vz.c write_gc0_status(v); v 2155 arch/mips/kvm/vz.c write_gc0_intctl(v); v 2163 arch/mips/kvm/vz.c if ((read_gc0_cause() ^ v) & CAUSEF_DC) { v 2164 arch/mips/kvm/vz.c if (v & CAUSEF_DC) { v 2167 arch/mips/kvm/vz.c change_gc0_cause((u32)~CAUSEF_DC, v); v 2170 arch/mips/kvm/vz.c change_gc0_cause((u32)~CAUSEF_DC, v); v 2174 arch/mips/kvm/vz.c write_gc0_cause(v); v 2178 arch/mips/kvm/vz.c write_gc0_epc(v); v 2186 arch/mips/kvm/vz.c kvm_write_c0_guest_prid(cop0, v); v 2191 arch/mips/kvm/vz.c kvm_vz_write_gc0_ebase(v); v 2195 arch/mips/kvm/vz.c change = (cur ^ v) & kvm_vz_config_user_wrmask(vcpu); v 2197 arch/mips/kvm/vz.c v = cur ^ change; v 2198 arch/mips/kvm/vz.c write_gc0_config(v); v 2205 arch/mips/kvm/vz.c change = (cur ^ v) & kvm_vz_config1_user_wrmask(vcpu); v 2207 arch/mips/kvm/vz.c v = cur ^ change; v 2208 arch/mips/kvm/vz.c write_gc0_config1(v); v 2215 arch/mips/kvm/vz.c change = (cur ^ v) & kvm_vz_config2_user_wrmask(vcpu); v 2217 arch/mips/kvm/vz.c v = cur ^ change; v 2218 arch/mips/kvm/vz.c write_gc0_config2(v); v 2225 arch/mips/kvm/vz.c change = (cur ^ v) & kvm_vz_config3_user_wrmask(vcpu); v 2227 arch/mips/kvm/vz.c v = cur ^ change; v 2228 arch/mips/kvm/vz.c write_gc0_config3(v); v 2235 arch/mips/kvm/vz.c change = (cur ^ v) & kvm_vz_config4_user_wrmask(vcpu); v 2237 arch/mips/kvm/vz.c v = cur ^ change; v 2238 arch/mips/kvm/vz.c write_gc0_config4(v); v 2245 arch/mips/kvm/vz.c change = (cur ^ v) & kvm_vz_config5_user_wrmask(vcpu); v 2247 arch/mips/kvm/vz.c v = cur ^ change; v 2248 arch/mips/kvm/vz.c write_gc0_config5(v); v 2257 arch/mips/kvm/vz.c vcpu->arch.maar[idx] = mips_process_maar(dmtc_op, v); v 2262 arch/mips/kvm/vz.c kvm_write_maari(vcpu, v); v 2266 arch/mips/kvm/vz.c write_gc0_xcontext(v); v 2270 arch/mips/kvm/vz.c write_gc0_errorepc(v); v 2278 arch/mips/kvm/vz.c write_gc0_kscratch1(v); v 2281 arch/mips/kvm/vz.c write_gc0_kscratch2(v); v 2284 arch/mips/kvm/vz.c write_gc0_kscratch3(v); v 2287 arch/mips/kvm/vz.c write_gc0_kscratch4(v); v 2290 arch/mips/kvm/vz.c write_gc0_kscratch5(v); v 2293 arch/mips/kvm/vz.c write_gc0_kscratch6(v); v 2298 arch/mips/kvm/vz.c ret = kvm_mips_set_count_ctl(vcpu, v); v 2301 arch/mips/kvm/vz.c ret = kvm_mips_set_count_resume(vcpu, v); v 2304 arch/mips/kvm/vz.c ret = kvm_mips_set_count_hz(vcpu, v); v 44 arch/mips/lasat/picvue_proc.c static int pvc_line_proc_show(struct seq_file *m, void *v) v 137 arch/mips/lasat/picvue_proc.c static int pvc_scroll_proc_show(struct seq_file *m, void *v) v 236 arch/mips/math-emu/dsemul.c s32 v; v 239 arch/mips/math-emu/dsemul.c v = regs->cp0_epc & ~3; v 240 arch/mips/math-emu/dsemul.c v += insn.mm_a_format.simmediate << 2; v 241 arch/mips/math-emu/dsemul.c regs->regs[rs] = (long)v; v 37 arch/mips/math-emu/ieee754dp.h #define XDPSRS(v,rs) \ v 38 arch/mips/math-emu/ieee754dp.h ((rs > (DP_FBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0)) v 43 arch/mips/math-emu/ieee754dp.h #define XDPSRS1(v) \ v 44 arch/mips/math-emu/ieee754dp.h (((v) >> 1) | ((v) & 1)) v 53 arch/mips/math-emu/ieee754int.h #define EXPLODESP(v, vc, vs, ve, vm) \ v 55 arch/mips/math-emu/ieee754int.h vs = SPSIGN(v); \ v 56 arch/mips/math-emu/ieee754int.h ve = SPBEXP(v); \ v 57 arch/mips/math-emu/ieee754int.h vm = SPMANT(v); \ v 91 arch/mips/math-emu/ieee754int.h #define EXPLODEDP(v, vc, vs, ve, vm) \ v 93 arch/mips/math-emu/ieee754int.h vm = DPMANT(v); \ v 94 arch/mips/math-emu/ieee754int.h vs = DPSIGN(v); \ v 95 arch/mips/math-emu/ieee754int.h ve = DPBEXP(v); \ v 119 arch/mips/math-emu/ieee754int.h #define FLUSHDP(v, vc, vs, ve, vm) \ v 126 arch/mips/math-emu/ieee754int.h v = ieee754dp_zero(vs); \ v 130 arch/mips/math-emu/ieee754int.h #define FLUSHSP(v, vc, vs, ve, vm) \ v 137 arch/mips/math-emu/ieee754int.h v = ieee754sp_zero(vs); \ v 37 arch/mips/math-emu/ieee754sp.h #define XSPSRS64(v, rs) \ v 38 arch/mips/math-emu/ieee754sp.h (((rs) >= 64) ? ((v) != 0) : ((v) >> (rs)) | ((v) << (64-(rs)) != 0)) v 41 arch/mips/math-emu/ieee754sp.h #define XSPSRS(v, rs) \ v 42 arch/mips/math-emu/ieee754sp.h ((rs > (SP_FBITS+3))?1:((v) >> (rs)) | ((v) << (32-(rs)) != 0)) v 1946 arch/mips/mm/c-r4k.c void *v) v 561 arch/mips/mm/tlb-r4k.c void *v) v 76 arch/mips/mti-malta/malta-amon.c int vpe_run(struct vpe *v) v 80 arch/mips/mti-malta/malta-amon.c if (amon_cpu_start(aprp_cpu_index(), v->__start, 0, 0, 0) < 0) v 83 arch/mips/mti-malta/malta-amon.c list_for_each_entry(n, &v->notify, list) v 144 arch/mips/netlogic/xlp/ahci-init-xlp2.c #define nlm_write_sata_reg(b, r, v) nlm_write_reg(b, r, v) v 88 arch/mips/netlogic/xlp/ahci-init.c #define nlm_write_sata_reg(b, r, v) nlm_write_reg(b, r, v) v 85 arch/mips/netlogic/xlp/usb-init-xlp2.c #define nlm_write_usb_reg(b, r, v) nlm_write_reg(b, r, v) v 64 arch/mips/netlogic/xlp/usb-init.c #define nlm_write_usb_reg(b, r, v) nlm_write_reg(b, r, v) v 64 arch/mips/pci/ops-pmcmsp.c static int show_msp_pci_counts(struct seq_file *m, void *v) v 99 arch/mips/pci/ops-pmcmsp.c static int gen_pci_cfg_wr_show(struct seq_file *m, void *v) v 28 arch/mips/pic32/pic32mzda/config.c u32 v; v 30 arch/mips/pic32/pic32mzda/config.c v = readl(pic32_conf_base + offset); v 31 arch/mips/pic32/pic32mzda/config.c v >>= rshift; v 32 arch/mips/pic32/pic32mzda/config.c v &= mask; v 34 arch/mips/pic32/pic32mzda/config.c return v; v 39 arch/mips/pic32/pic32mzda/config.c u32 v; v 43 arch/mips/pic32/pic32mzda/config.c v = readl(pic32_conf_base + offset); v 44 arch/mips/pic32/pic32mzda/config.c v &= ~mask; v 45 arch/mips/pic32/pic32mzda/config.c v |= (set & mask); v 46 arch/mips/pic32/pic32mzda/config.c writel(v, pic32_conf_base + offset); v 100 arch/mips/sibyte/common/bus_watcher.c static int bw_proc_show(struct seq_file *m, void *v) v 132 arch/mips/txx9/rbtx4927/irq.c unsigned char v; v 134 arch/mips/txx9/rbtx4927/irq.c v = readb(rbtx4927_imask_addr); v 135 arch/mips/txx9/rbtx4927/irq.c v |= (1 << (d->irq - RBTX4927_IRQ_IOC)); v 136 arch/mips/txx9/rbtx4927/irq.c writeb(v, rbtx4927_imask_addr); v 141 arch/mips/txx9/rbtx4927/irq.c unsigned char v; v 143 arch/mips/txx9/rbtx4927/irq.c v = readb(rbtx4927_imask_addr); v 144 arch/mips/txx9/rbtx4927/irq.c v &= ~(1 << (d->irq - RBTX4927_IRQ_IOC)); v 145 arch/mips/txx9/rbtx4927/irq.c writeb(v, rbtx4927_imask_addr); v 85 arch/mips/txx9/rbtx4938/irq.c unsigned char v; v 87 arch/mips/txx9/rbtx4938/irq.c v = readb(rbtx4938_imask_addr); v 88 arch/mips/txx9/rbtx4938/irq.c v |= (1 << (d->irq - RBTX4938_IRQ_IOC)); v 89 arch/mips/txx9/rbtx4938/irq.c writeb(v, rbtx4938_imask_addr); v 95 arch/mips/txx9/rbtx4938/irq.c unsigned char v; v 97 arch/mips/txx9/rbtx4938/irq.c v = readb(rbtx4938_imask_addr); v 98 arch/mips/txx9/rbtx4938/irq.c v &= ~(1 << (d->irq - RBTX4938_IRQ_IOC)); v 99 arch/mips/txx9/rbtx4938/irq.c writeb(v, rbtx4938_imask_addr); v 67 arch/nds32/include/asm/io.h #define writeb_relaxed(v,c) ((void)__raw_writeb((v),(c))) v 68 arch/nds32/include/asm/io.h #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) v 69 arch/nds32/include/asm/io.h #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) v 79 arch/nds32/include/asm/io.h #define writeb(v,c) ({ __iowmb(); writeb_relaxed((v),(c)); }) v 80 arch/nds32/include/asm/io.h #define writew(v,c) ({ __iowmb(); writew_relaxed((v),(c)); }) v 81 arch/nds32/include/asm/io.h #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) v 88 arch/nds32/include/asm/sfp-machine.h #define umul_ppmm(w1, w0, u, v) \ v 95 arch/nds32/include/asm/sfp-machine.h __vl = __ll_lowpart(v); \ v 96 arch/nds32/include/asm/sfp-machine.h __vh = __ll_highpart(v); \ v 126 arch/nds32/kernel/module.c Elf32_Addr v; v 148 arch/nds32/kernel/module.c v = sym->st_value + rel->r_addend; v 173 arch/nds32/kernel/module.c do_reloc32(v, loc, 0xffffffff, 0, 0, 0, 0); v 177 arch/nds32/kernel/module.c do_reloc32(v, loc, 0xfffff000, 12, 0xfff00000, 0, v 182 arch/nds32/kernel/module.c do_reloc32(v, loc, 0x00000fff, 3, 0xfffff000, 0, v 187 arch/nds32/kernel/module.c do_reloc32(v, loc, 0x00000fff, 2, 0xfffff000, 0, v 192 arch/nds32/kernel/module.c do_reloc32(v, loc, 0x00000fff, 1, 0xfffff000, 0, v 198 arch/nds32/kernel/module.c do_reloc32(v, loc, 0x00000fff, 0, 0xfffff000, 0, v 204 arch/nds32/kernel/module.c ((v - (Elf32_Addr) loc), 0x000000ff, module, rel, v 207 arch/nds32/kernel/module.c do_reloc16(v - (Elf32_Addr) loc, loc, 0x000001ff, 1, v 213 arch/nds32/kernel/module.c ((v - (Elf32_Addr) loc), 0x00003fff, module, rel, v 216 arch/nds32/kernel/module.c do_reloc32(v - (Elf32_Addr) loc, loc, 0x00007fff, 1, v 222 arch/nds32/kernel/module.c ((v - (Elf32_Addr) loc), 0x0000ffff, module, rel, v 225 arch/nds32/kernel/module.c do_reloc32(v - (Elf32_Addr) loc, loc, 0x0001ffff, 1, v 231 arch/nds32/kernel/module.c ((v - (Elf32_Addr) loc), 0x00ffffff, module, rel, v 234 arch/nds32/kernel/module.c do_reloc32(v - (Elf32_Addr) loc, loc, 0x01ffffff, 1, v 239 arch/nds32/kernel/module.c ((v - (Elf32_Addr) loc), 0x000000ff, module, rel, v 242 arch/nds32/kernel/module.c do_reloc32(v - (Elf32_Addr) loc, loc, 0x000001ff, 1, v 329 arch/nds32/kernel/setup.c static int c_show(struct seq_file *m, void *v) v 367 arch/nds32/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t * pos) v 373 arch/nds32/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 52 arch/nds32/mm/alignment.c unsigned int err = 0, v, a = addr; \ v 53 arch/nds32/mm/alignment.c __get8_data(v,a,err); \ v 54 arch/nds32/mm/alignment.c *val_ptr = v << 0; \ v 55 arch/nds32/mm/alignment.c __get8_data(v,a,err); \ v 56 arch/nds32/mm/alignment.c *val_ptr |= v << 8; \ v 64 arch/nds32/mm/alignment.c unsigned int err = 0, v, a = addr; \ v 65 arch/nds32/mm/alignment.c __get8_data(v,a,err); \ v 66 arch/nds32/mm/alignment.c *val_ptr = v << 0; \ v 67 arch/nds32/mm/alignment.c __get8_data(v,a,err); \ v 68 arch/nds32/mm/alignment.c *val_ptr |= v << 8; \ v 69 arch/nds32/mm/alignment.c __get8_data(v,a,err); \ v 70 arch/nds32/mm/alignment.c *val_ptr |= v << 16; \ v 71 arch/nds32/mm/alignment.c __get8_data(v,a,err); \ v 72 arch/nds32/mm/alignment.c *val_ptr |= v << 24; \ v 55 arch/nds32/mm/init.c unsigned long v, p, e; v 67 arch/nds32/mm/init.c v = (u32) __va(p); v 68 arch/nds32/mm/init.c pge = pgd_offset_k(v); v 72 arch/nds32/mm/init.c pue = pud_offset(pge, v); v 73 arch/nds32/mm/init.c pme = pmd_offset(pue, v); v 89 arch/nds32/mm/init.c v += PAGE_SIZE, p += PAGE_SIZE, j++, pte++) { v 33 arch/nios2/include/asm/registers.h #define WRCTL(r, v) __builtin_wrctl(r, v) v 119 arch/nios2/kernel/cpuinfo.c static int show_cpuinfo(struct seq_file *m, void *v) v 178 arch/nios2/kernel/cpuinfo.c static void *cpuinfo_next(struct seq_file *m, void *v, loff_t *pos) v 184 arch/nios2/kernel/cpuinfo.c static void cpuinfo_stop(struct seq_file *m, void *v) v 65 arch/nios2/kernel/module.c uint32_t v = sym->st_value + rela[i].r_addend; v 75 arch/nios2/kernel/module.c *loc += v; v 78 arch/nios2/kernel/module.c v -= (uint32_t)loc + 4; v 79 arch/nios2/kernel/module.c if ((int32_t)v > 0x7fff || v 80 arch/nios2/kernel/module.c (int32_t)v < -(int32_t)0x8000) { v 86 arch/nios2/kernel/module.c *loc = ((((word >> 22) << 16) | (v & 0xffff)) << 6) | v 90 arch/nios2/kernel/module.c if (v & 3) { v 95 arch/nios2/kernel/module.c if ((v >> 28) != ((uint32_t)loc >> 28)) { v 100 arch/nios2/kernel/module.c *loc = (*loc & 0x3f) | ((v >> 2) << 6); v 105 arch/nios2/kernel/module.c ((v >> 16) & 0xffff)) << 6) | (word & 0x3f); v 109 arch/nios2/kernel/module.c *loc = ((((word >> 22) << 16) | (v & 0xffff)) << 6) | v 117 arch/nios2/kernel/module.c word2 = ((v >> 16) + ((v >> 15) & 1)) & 0xffff; v 16 arch/openrisc/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 27 arch/openrisc/include/asm/atomic.h : "r"(&v->counter), "r"(i) \ v 33 arch/openrisc/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 44 arch/openrisc/include/asm/atomic.h : "r"(&v->counter), "r"(i) \ v 52 arch/openrisc/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 63 arch/openrisc/include/asm/atomic.h : "r"(&v->counter), "r"(i) \ v 103 arch/openrisc/include/asm/atomic.h static inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 117 arch/openrisc/include/asm/atomic.h : "r"(&v->counter), "r"(a), "r"(u) v 321 arch/openrisc/kernel/setup.c static int show_cpuinfo(struct seq_file *m, void *v) v 326 arch/openrisc/kernel/setup.c struct cpuinfo_or1k *cpuinfo = v; v 391 arch/openrisc/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 397 arch/openrisc/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 71 arch/openrisc/mm/init.c unsigned long v, p, e; v 82 arch/openrisc/mm/init.c v = PAGE_OFFSET; v 88 arch/openrisc/mm/init.c v = (u32) __va(p); v 89 arch/openrisc/mm/init.c pge = pgd_offset_k(v); v 93 arch/openrisc/mm/init.c pue = pud_offset(pge, v); v 94 arch/openrisc/mm/init.c pme = pmd_offset(pue, v); v 111 arch/openrisc/mm/init.c v += PAGE_SIZE, p += PAGE_SIZE, j++, pte++) { v 112 arch/openrisc/mm/init.c if (v >= (u32) _e_kernel_ro || v 113 arch/openrisc/mm/init.c v < (u32) _s_kernel_ro) v 40 arch/openrisc/mm/ioremap.c unsigned long v; v 60 arch/openrisc/mm/ioremap.c v = (unsigned long)area->addr; v 64 arch/openrisc/mm/ioremap.c v = fix_to_virt(FIX_IOREMAP_BEGIN + fixmaps_used); v 68 arch/openrisc/mm/ioremap.c if (ioremap_page_range(v, v + size, p, v 77 arch/openrisc/mm/ioremap.c return (void __iomem *)(offset + (char *)v); v 59 arch/parisc/include/asm/atomic.h static __inline__ void atomic_set(atomic_t *v, int i) v 62 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); v 64 arch/parisc/include/asm/atomic.h v->counter = i; v 66 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); v 69 arch/parisc/include/asm/atomic.h #define atomic_set_release(v, i) atomic_set((v), (i)) v 71 arch/parisc/include/asm/atomic.h static __inline__ int atomic_read(const atomic_t *v) v 73 arch/parisc/include/asm/atomic.h return READ_ONCE((v)->counter); v 77 arch/parisc/include/asm/atomic.h #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) v 78 arch/parisc/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 81 arch/parisc/include/asm/atomic.h static __inline__ void atomic_##op(int i, atomic_t *v) \ v 85 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); \ v 86 arch/parisc/include/asm/atomic.h v->counter c_op i; \ v 87 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); \ v 91 arch/parisc/include/asm/atomic.h static __inline__ int atomic_##op##_return(int i, atomic_t *v) \ v 96 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); \ v 97 arch/parisc/include/asm/atomic.h ret = (v->counter c_op i); \ v 98 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); \ v 104 arch/parisc/include/asm/atomic.h static __inline__ int atomic_fetch_##op(int i, atomic_t *v) \ v 109 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); \ v 110 arch/parisc/include/asm/atomic.h ret = v->counter; \ v 111 arch/parisc/include/asm/atomic.h v->counter c_op i; \ v 112 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); \ v 146 arch/parisc/include/asm/atomic.h static __inline__ void atomic64_##op(s64 i, atomic64_t *v) \ v 150 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); \ v 151 arch/parisc/include/asm/atomic.h v->counter c_op i; \ v 152 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); \ v 156 arch/parisc/include/asm/atomic.h static __inline__ s64 atomic64_##op##_return(s64 i, atomic64_t *v) \ v 161 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); \ v 162 arch/parisc/include/asm/atomic.h ret = (v->counter c_op i); \ v 163 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); \ v 169 arch/parisc/include/asm/atomic.h static __inline__ s64 atomic64_fetch_##op(s64 i, atomic64_t *v) \ v 174 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); \ v 175 arch/parisc/include/asm/atomic.h ret = v->counter; \ v 176 arch/parisc/include/asm/atomic.h v->counter c_op i; \ v 177 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); \ v 205 arch/parisc/include/asm/atomic.h atomic64_set(atomic64_t *v, s64 i) v 208 arch/parisc/include/asm/atomic.h _atomic_spin_lock_irqsave(v, flags); v 210 arch/parisc/include/asm/atomic.h v->counter = i; v 212 arch/parisc/include/asm/atomic.h _atomic_spin_unlock_irqrestore(v, flags); v 216 arch/parisc/include/asm/atomic.h atomic64_read(const atomic64_t *v) v 218 arch/parisc/include/asm/atomic.h return READ_ONCE((v)->counter); v 222 arch/parisc/include/asm/atomic.h #define atomic64_cmpxchg(v, o, n) \ v 223 arch/parisc/include/asm/atomic.h ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) v 224 arch/parisc/include/asm/atomic.h #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) v 52 arch/parisc/include/asm/pdc_chassis.h #define PDC_CHASSIS_DISP_DATA(v) ((unsigned long)(v) << 17) v 81 arch/parisc/include/asm/psw.h unsigned int v:1; v 194 arch/parisc/kernel/irq.c int show_interrupts(struct seq_file *p, void *v) v 196 arch/parisc/kernel/irq.c int i = *(loff_t *) v, j; v 119 arch/parisc/kernel/module.c #define fsel(v,a) ((v)+(a)) v 121 arch/parisc/kernel/module.c #define lsel(v,a) (((v)+(a))>>11) v 123 arch/parisc/kernel/module.c #define rsel(v,a) (((v)+(a))&0x7ff) v 125 arch/parisc/kernel/module.c #define lrsel(v,a) (((v)+rnd(a))>>11) v 127 arch/parisc/kernel/module.c #define rrsel(v,a) ((((v)+rnd(a))&0x7ff)+((a)-rnd(a))) v 334 arch/parisc/kernel/pci-dma.c static int proc_pcxl_dma_show(struct seq_file *m, void *v) v 237 arch/parisc/kernel/pdc_chassis.c static int pdc_chassis_warn_show(struct seq_file *m, void *v) v 373 arch/parisc/kernel/processor.c show_cpuinfo (struct seq_file *m, void *v) v 165 arch/parisc/kernel/setup.c extern int show_cpuinfo (struct seq_file *m, void *v); v 179 arch/parisc/kernel/setup.c c_next (struct seq_file *m, void *v, loff_t *pos) v 186 arch/parisc/kernel/setup.c c_stop (struct seq_file *m, void *v) v 392 arch/powerpc/boot/4xx.c static inline u32 __fix_zero(u32 v, u32 def) v 394 arch/powerpc/boot/4xx.c return v ? v : def; v 68 arch/powerpc/boot/addnote.c #define PUT_16BE(off, v)(buf[off] = ((v) >> 8) & 0xff, \ v 69 arch/powerpc/boot/addnote.c buf[(off) + 1] = (v) & 0xff) v 70 arch/powerpc/boot/addnote.c #define PUT_32BE(off, v)(PUT_16BE((off), (v) >> 16L), PUT_16BE((off) + 2, (v))) v 71 arch/powerpc/boot/addnote.c #define PUT_64BE(off, v)((PUT_32BE((off), (v) >> 32L), \ v 72 arch/powerpc/boot/addnote.c PUT_32BE((off) + 4, (v)))) v 78 arch/powerpc/boot/addnote.c #define PUT_16LE(off, v) (buf[off] = (v) & 0xff, \ v 79 arch/powerpc/boot/addnote.c buf[(off) + 1] = ((v) >> 8) & 0xff) v 80 arch/powerpc/boot/addnote.c #define PUT_32LE(off, v) (PUT_16LE((off), (v)), PUT_16LE((off) + 2, (v) >> 16L)) v 81 arch/powerpc/boot/addnote.c #define PUT_64LE(off, v) (PUT_32LE((off), (v)), PUT_32LE((off) + 4, (v) >> 32L)) v 86 arch/powerpc/boot/addnote.c #define PUT_16(off, v) (e_data == ELFDATA2MSB ? PUT_16BE(off, v) : \ v 87 arch/powerpc/boot/addnote.c PUT_16LE(off, v)) v 88 arch/powerpc/boot/addnote.c #define PUT_32(off, v) (e_data == ELFDATA2MSB ? PUT_32BE(off, v) : \ v 89 arch/powerpc/boot/addnote.c PUT_32LE(off, v)) v 90 arch/powerpc/boot/addnote.c #define PUT_64(off, v) (e_data == ELFDATA2MSB ? PUT_64BE(off, v) : \ v 91 arch/powerpc/boot/addnote.c PUT_64LE(off, v)) v 51 arch/powerpc/boot/decompress.c static long flush(void *v, unsigned long buffer_size) v 56 arch/powerpc/boot/decompress.c char *in = v; v 20 arch/powerpc/boot/hack-coff.c #define put_16be(x, v) (((unsigned char *)(x))[0] = (v) >> 8, \ v 21 arch/powerpc/boot/hack-coff.c ((unsigned char *)(x))[1] = (v) & 0xff) v 199 arch/powerpc/boot/main.c int v; v 203 arch/powerpc/boot/main.c n = getprop(chosen, "linux,cmdline-timeout", &v, sizeof(v)); v 204 arch/powerpc/boot/main.c if (n == sizeof(v)) v 205 arch/powerpc/boot/main.c getline_timeout = v; v 21 arch/powerpc/boot/reg.h #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) v 108 arch/powerpc/boot/ugecon.c u32 v; v 114 arch/powerpc/boot/ugecon.c if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v)) v 117 arch/powerpc/boot/ugecon.c return (void *)v; v 9 arch/powerpc/include/asm/archrandom.h static inline int arch_get_random_long(unsigned long *v) v 14 arch/powerpc/include/asm/archrandom.h static inline int arch_get_random_int(unsigned int *v) v 19 arch/powerpc/include/asm/archrandom.h static inline int arch_get_random_seed_long(unsigned long *v) v 22 arch/powerpc/include/asm/archrandom.h return ppc_md.get_random_seed(v); v 26 arch/powerpc/include/asm/archrandom.h static inline int arch_get_random_seed_int(unsigned int *v) v 33 arch/powerpc/include/asm/archrandom.h *v = val; v 51 arch/powerpc/include/asm/archrandom.h int powernv_get_random_long(unsigned long *v); v 52 arch/powerpc/include/asm/archrandom.h int powernv_get_random_real_mode(unsigned long *v); v 55 arch/powerpc/include/asm/archrandom.h static inline int powernv_get_random_real_mode(unsigned long *v) { return 0; } v 28 arch/powerpc/include/asm/atomic.h static __inline__ int atomic_read(const atomic_t *v) v 32 arch/powerpc/include/asm/atomic.h __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); v 37 arch/powerpc/include/asm/atomic.h static __inline__ void atomic_set(atomic_t *v, int i) v 39 arch/powerpc/include/asm/atomic.h __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); v 43 arch/powerpc/include/asm/atomic.h static __inline__ void atomic_##op(int a, atomic_t *v) \ v 53 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) \ v 54 arch/powerpc/include/asm/atomic.h : "r" (a), "r" (&v->counter) \ v 59 arch/powerpc/include/asm/atomic.h static inline int atomic_##op##_return_relaxed(int a, atomic_t *v) \ v 69 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) \ v 70 arch/powerpc/include/asm/atomic.h : "r" (a), "r" (&v->counter) \ v 77 arch/powerpc/include/asm/atomic.h static inline int atomic_fetch_##op##_relaxed(int a, atomic_t *v) \ v 87 arch/powerpc/include/asm/atomic.h : "=&r" (res), "=&r" (t), "+m" (v->counter) \ v 88 arch/powerpc/include/asm/atomic.h : "r" (a), "r" (&v->counter) \ v 126 arch/powerpc/include/asm/atomic.h static __inline__ void atomic_inc(atomic_t *v) v 136 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 137 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 142 arch/powerpc/include/asm/atomic.h static __inline__ int atomic_inc_return_relaxed(atomic_t *v) v 152 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 153 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 159 arch/powerpc/include/asm/atomic.h static __inline__ void atomic_dec(atomic_t *v) v 169 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 170 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 175 arch/powerpc/include/asm/atomic.h static __inline__ int atomic_dec_return_relaxed(atomic_t *v) v 185 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 186 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 195 arch/powerpc/include/asm/atomic.h #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) v 196 arch/powerpc/include/asm/atomic.h #define atomic_cmpxchg_relaxed(v, o, n) \ v 197 arch/powerpc/include/asm/atomic.h cmpxchg_relaxed(&((v)->counter), (o), (n)) v 198 arch/powerpc/include/asm/atomic.h #define atomic_cmpxchg_acquire(v, o, n) \ v 199 arch/powerpc/include/asm/atomic.h cmpxchg_acquire(&((v)->counter), (o), (n)) v 201 arch/powerpc/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 202 arch/powerpc/include/asm/atomic.h #define atomic_xchg_relaxed(v, new) xchg_relaxed(&((v)->counter), (new)) v 213 arch/powerpc/include/asm/atomic.h static __inline__ int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 230 arch/powerpc/include/asm/atomic.h : "r" (&v->counter), "r" (a), "r" (u) v 244 arch/powerpc/include/asm/atomic.h static __inline__ int atomic_inc_not_zero(atomic_t *v) v 261 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 266 arch/powerpc/include/asm/atomic.h #define atomic_inc_not_zero(v) atomic_inc_not_zero((v)) v 273 arch/powerpc/include/asm/atomic.h static __inline__ int atomic_dec_if_positive(atomic_t *v) v 289 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 300 arch/powerpc/include/asm/atomic.h static __inline__ s64 atomic64_read(const atomic64_t *v) v 304 arch/powerpc/include/asm/atomic.h __asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); v 309 arch/powerpc/include/asm/atomic.h static __inline__ void atomic64_set(atomic64_t *v, s64 i) v 311 arch/powerpc/include/asm/atomic.h __asm__ __volatile__("std%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); v 315 arch/powerpc/include/asm/atomic.h static __inline__ void atomic64_##op(s64 a, atomic64_t *v) \ v 324 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) \ v 325 arch/powerpc/include/asm/atomic.h : "r" (a), "r" (&v->counter) \ v 331 arch/powerpc/include/asm/atomic.h atomic64_##op##_return_relaxed(s64 a, atomic64_t *v) \ v 340 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) \ v 341 arch/powerpc/include/asm/atomic.h : "r" (a), "r" (&v->counter) \ v 349 arch/powerpc/include/asm/atomic.h atomic64_fetch_##op##_relaxed(s64 a, atomic64_t *v) \ v 358 arch/powerpc/include/asm/atomic.h : "=&r" (res), "=&r" (t), "+m" (v->counter) \ v 359 arch/powerpc/include/asm/atomic.h : "r" (a), "r" (&v->counter) \ v 397 arch/powerpc/include/asm/atomic.h static __inline__ void atomic64_inc(atomic64_t *v) v 406 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 407 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 412 arch/powerpc/include/asm/atomic.h static __inline__ s64 atomic64_inc_return_relaxed(atomic64_t *v) v 421 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 422 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 428 arch/powerpc/include/asm/atomic.h static __inline__ void atomic64_dec(atomic64_t *v) v 437 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 438 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 443 arch/powerpc/include/asm/atomic.h static __inline__ s64 atomic64_dec_return_relaxed(atomic64_t *v) v 452 arch/powerpc/include/asm/atomic.h : "=&r" (t), "+m" (v->counter) v 453 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 466 arch/powerpc/include/asm/atomic.h static __inline__ s64 atomic64_dec_if_positive(atomic64_t *v) v 480 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 487 arch/powerpc/include/asm/atomic.h #define atomic64_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) v 488 arch/powerpc/include/asm/atomic.h #define atomic64_cmpxchg_relaxed(v, o, n) \ v 489 arch/powerpc/include/asm/atomic.h cmpxchg_relaxed(&((v)->counter), (o), (n)) v 490 arch/powerpc/include/asm/atomic.h #define atomic64_cmpxchg_acquire(v, o, n) \ v 491 arch/powerpc/include/asm/atomic.h cmpxchg_acquire(&((v)->counter), (o), (n)) v 493 arch/powerpc/include/asm/atomic.h #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) v 494 arch/powerpc/include/asm/atomic.h #define atomic64_xchg_relaxed(v, new) xchg_relaxed(&((v)->counter), (new)) v 505 arch/powerpc/include/asm/atomic.h static __inline__ s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 521 arch/powerpc/include/asm/atomic.h : "r" (&v->counter), "r" (a), "r" (u) v 535 arch/powerpc/include/asm/atomic.h static __inline__ int atomic64_inc_not_zero(atomic64_t *v) v 551 arch/powerpc/include/asm/atomic.h : "r" (&v->counter) v 556 arch/powerpc/include/asm/atomic.h #define atomic64_inc_not_zero(v) atomic64_inc_not_zero((v)) v 66 arch/powerpc/include/asm/barrier.h #define __smp_store_release(p, v) \ v 70 arch/powerpc/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 75 arch/powerpc/include/asm/book3s/32/mmu-hash.h unsigned long v:1; /* Entry is valid */ v 176 arch/powerpc/include/asm/book3s/64/mmu-hash.h __be64 v; v 328 arch/powerpc/include/asm/book3s/64/mmu-hash.h unsigned long v; v 337 arch/powerpc/include/asm/book3s/64/mmu-hash.h v = (vpn >> (23 - VPN_SHIFT)) & ~(mmu_psize_defs[psize].avpnm); v 338 arch/powerpc/include/asm/book3s/64/mmu-hash.h v <<= HPTE_V_AVPN_SHIFT; v 339 arch/powerpc/include/asm/book3s/64/mmu-hash.h v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT; v 340 arch/powerpc/include/asm/book3s/64/mmu-hash.h return v; v 348 arch/powerpc/include/asm/book3s/64/mmu-hash.h static inline unsigned long hpte_old_to_new_v(unsigned long v) v 351 arch/powerpc/include/asm/book3s/64/mmu-hash.h return v & HPTE_V_COMMON_BITS; v 354 arch/powerpc/include/asm/book3s/64/mmu-hash.h static inline unsigned long hpte_old_to_new_r(unsigned long v, unsigned long r) v 358 arch/powerpc/include/asm/book3s/64/mmu-hash.h (((v) >> HPTE_V_SSIZE_SHIFT) << HPTE_R_3_0_SSIZE_SHIFT); v 361 arch/powerpc/include/asm/book3s/64/mmu-hash.h static inline unsigned long hpte_new_to_old_v(unsigned long v, unsigned long r) v 364 arch/powerpc/include/asm/book3s/64/mmu-hash.h return (v & HPTE_V_COMMON_BITS) | v 379 arch/powerpc/include/asm/book3s/64/mmu-hash.h hpte_v = be64_to_cpu(hptep->v); v 392 arch/powerpc/include/asm/book3s/64/mmu-hash.h unsigned long v; v 393 arch/powerpc/include/asm/book3s/64/mmu-hash.h v = hpte_encode_avpn(vpn, base_psize, ssize); v 395 arch/powerpc/include/asm/book3s/64/mmu-hash.h v |= HPTE_V_LARGE; v 396 arch/powerpc/include/asm/book3s/64/mmu-hash.h return v; v 26 arch/powerpc/include/asm/btext.h extern void btext_drawhex(unsigned long v); v 64 arch/powerpc/include/asm/dcr-native.h #define mtdcr(rn, v) \ v 68 arch/powerpc/include/asm/dcr-native.h : : "r" (v)); \ v 70 arch/powerpc/include/asm/dcr-native.h mtdcrx(rn, v); \ v 72 arch/powerpc/include/asm/dcr-native.h __mtdcr(rn, v); \ v 314 arch/powerpc/include/asm/io.h static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) v 316 arch/powerpc/include/asm/io.h *(volatile unsigned char __force *)PCI_FIX_ADDR(addr) = v; v 318 arch/powerpc/include/asm/io.h static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) v 320 arch/powerpc/include/asm/io.h *(volatile unsigned short __force *)PCI_FIX_ADDR(addr) = v; v 322 arch/powerpc/include/asm/io.h static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) v 324 arch/powerpc/include/asm/io.h *(volatile unsigned int __force *)PCI_FIX_ADDR(addr) = v; v 332 arch/powerpc/include/asm/io.h static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) v 334 arch/powerpc/include/asm/io.h *(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v; v 337 arch/powerpc/include/asm/io.h static inline void __raw_writeq_be(unsigned long v, volatile void __iomem *addr) v 339 arch/powerpc/include/asm/io.h __raw_writeq((__force unsigned long)cpu_to_be64(v), addr); v 636 arch/powerpc/include/asm/io.h #define writeb_relaxed(v, addr) writeb(v, addr) v 637 arch/powerpc/include/asm/io.h #define writew_relaxed(v, addr) writew(v, addr) v 638 arch/powerpc/include/asm/io.h #define writel_relaxed(v, addr) writel(v, addr) v 639 arch/powerpc/include/asm/io.h #define writeq_relaxed(v, addr) writeq(v, addr) v 264 arch/powerpc/include/asm/kvm_book3s_64.h static inline unsigned long kvmppc_actual_pgsz(unsigned long v, unsigned long r) v 266 arch/powerpc/include/asm/kvm_book3s_64.h int shift = kvmppc_hpte_actual_page_shift(v, r); v 300 arch/powerpc/include/asm/kvm_book3s_64.h static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r, v 306 arch/powerpc/include/asm/kvm_book3s_64.h b_pgshift = a_pgshift = kvmppc_hpte_page_shifts(v, r); v 322 arch/powerpc/include/asm/kvm_book3s_64.h rb = (v & ~0x7fUL) << 16; /* AVA field */ v 329 arch/powerpc/include/asm/kvm_book3s_64.h if (v & HPTE_V_SECONDARY) v 337 arch/powerpc/include/asm/kvm_book3s_64.h if (!(v & HPTE_V_1TB_SEG)) v 338 arch/powerpc/include/asm/kvm_book3s_64.h va_low ^= v >> (SID_SHIFT - 16); v 340 arch/powerpc/include/asm/kvm_book3s_64.h va_low ^= v >> (SID_SHIFT_1T - 16); v 371 arch/powerpc/include/asm/kvm_book3s_64.h rb |= (v >> HPTE_V_SSIZE_SHIFT) << 8; /* B field */ v 15 arch/powerpc/include/asm/local.h long v; v 22 arch/powerpc/include/asm/local.h return READ_ONCE(l->v); v 27 arch/powerpc/include/asm/local.h WRITE_ONCE(l->v, i); v 36 arch/powerpc/include/asm/local.h l->v c_op i; \ v 47 arch/powerpc/include/asm/local.h t = (l->v c_op a); \ v 85 arch/powerpc/include/asm/local.h t = l->v; v 87 arch/powerpc/include/asm/local.h l->v = n; v 99 arch/powerpc/include/asm/local.h t = l->v; v 100 arch/powerpc/include/asm/local.h l->v = n; v 121 arch/powerpc/include/asm/local.h if (l->v != u) { v 122 arch/powerpc/include/asm/local.h l->v += a; v 137 arch/powerpc/include/asm/local.h #define __local_inc(l) ((l)->v++) v 138 arch/powerpc/include/asm/local.h #define __local_dec(l) ((l)->v++) v 139 arch/powerpc/include/asm/local.h #define __local_add(i,l) ((l)->v+=(i)) v 140 arch/powerpc/include/asm/local.h #define __local_sub(i,l) ((l)->v-=(i)) v 219 arch/powerpc/include/asm/machdep.h int (*get_random_seed)(unsigned long *v); v 371 arch/powerpc/include/asm/pmac_feature.h #define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v))) v 372 arch/powerpc/include/asm/pmac_feature.h #define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v))) v 373 arch/powerpc/include/asm/pmac_feature.h #define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v))) v 375 arch/powerpc/include/asm/pmac_feature.h #define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v))) v 391 arch/powerpc/include/asm/pmac_feature.h #define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) v 392 arch/powerpc/include/asm/pmac_feature.h #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) v 393 arch/powerpc/include/asm/pmac_feature.h #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) v 26 arch/powerpc/include/asm/pmac_pfunc.h u32 v; v 417 arch/powerpc/include/asm/ppc-opcode.h #define PPC_LO(v) ((v) & 0xffff) v 418 arch/powerpc/include/asm/ppc-opcode.h #define PPC_HI(v) (((v) >> 16) & 0xffff) v 419 arch/powerpc/include/asm/ppc-opcode.h #define PPC_HA(v) PPC_HI((v) + 0x8000) v 26 arch/powerpc/include/asm/ps3.h void ps3_get_firmware_version(union ps3_firmware_version *v); v 1345 arch/powerpc/include/asm/reg.h #define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \ v 1346 arch/powerpc/include/asm/reg.h : : "r" (v) : "memory") v 1347 arch/powerpc/include/asm/reg.h #define mtmsr(v) __mtmsrd((v), 0) v 1350 arch/powerpc/include/asm/reg.h #define mtmsr(v) asm volatile("mtmsr %0" : \ v 1351 arch/powerpc/include/asm/reg.h : "r" ((unsigned long)(v)) \ v 1366 arch/powerpc/include/asm/reg.h #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : \ v 1367 arch/powerpc/include/asm/reg.h : "r" ((unsigned long)(v)) \ v 1427 arch/powerpc/include/asm/reg.h #define mttbl(v) asm volatile("mttbl %0":: "r"(v)) v 1428 arch/powerpc/include/asm/reg.h #define mttbu(v) asm volatile("mttbu %0":: "r"(v)) v 1431 arch/powerpc/include/asm/reg.h #define mfsrin(v) ({unsigned int rval; \ v 1432 arch/powerpc/include/asm/reg.h asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \ v 758 arch/powerpc/include/asm/reg_booke.h #define mttmr(rn, v) asm volatile(MTTMR(rn, %0) : \ v 759 arch/powerpc/include/asm/reg_booke.h : "r" ((unsigned long)(v)) \ v 17 arch/powerpc/include/asm/reg_fsl_emb.h #define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v)) v 122 arch/powerpc/include/asm/sstep.h __vector128 v; v 59 arch/powerpc/include/asm/string.h extern void *__memset16(uint16_t *, uint16_t v, __kernel_size_t); v 60 arch/powerpc/include/asm/string.h extern void *__memset32(uint32_t *, uint32_t v, __kernel_size_t); v 61 arch/powerpc/include/asm/string.h extern void *__memset64(uint64_t *, uint64_t v, __kernel_size_t); v 63 arch/powerpc/include/asm/string.h static inline void *memset16(uint16_t *p, uint16_t v, __kernel_size_t n) v 65 arch/powerpc/include/asm/string.h return __memset16(p, v, n * 2); v 68 arch/powerpc/include/asm/string.h static inline void *memset32(uint32_t *p, uint32_t v, __kernel_size_t n) v 70 arch/powerpc/include/asm/string.h return __memset32(p, v, n * 4); v 73 arch/powerpc/include/asm/string.h static inline void *memset64(uint64_t *p, uint64_t v, __kernel_size_t n) v 75 arch/powerpc/include/asm/string.h return __memset64(p, v, n * 8); v 33 arch/powerpc/include/asm/vas.h #define GET_FIELD(m, v) (((v) & (m)) >> MASK_LSH(m)) v 35 arch/powerpc/include/asm/vas.h #define SET_FIELD(m, v, val) \ v 36 arch/powerpc/include/asm/vas.h (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_LSH(m)) & (m))) v 38 arch/powerpc/include/asm/vga.h static inline void scr_memsetw(u16 *s, u16 v, unsigned int n) v 40 arch/powerpc/include/asm/vga.h memset16(s, cpu_to_le16(v), n / 2); v 114 arch/powerpc/kernel/align.c u8 v[8]; v 175 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[0], p++); v 176 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[1], p++); v 177 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[2], p++); v 178 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[3], p++); v 181 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[4], p++); v 182 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[5], p++); v 185 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[6], p++); v 186 arch/powerpc/kernel/align.c ret |= __get_user_inatomic(temp.v[7], p++); v 260 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[0], p++); v 261 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[1], p++); v 262 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[2], p++); v 263 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[3], p++); v 266 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[4], p++); v 267 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[5], p++); v 270 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[6], p++); v 271 arch/powerpc/kernel/align.c ret |= __put_user_inatomic(data.v[7], p++); v 562 arch/powerpc/kernel/btext.c void btext_drawhex(unsigned long v) v 567 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v >> 56)); v 568 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v >> 56)); v 569 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v >> 48)); v 570 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v >> 48)); v 571 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v >> 40)); v 572 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v >> 40)); v 573 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v >> 32)); v 574 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v >> 32)); v 576 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v >> 24)); v 577 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v >> 24)); v 578 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v >> 16)); v 579 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v >> 16)); v 580 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v >> 8)); v 581 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v >> 8)); v 582 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_hi(v)); v 583 arch/powerpc/kernel/btext.c btext_drawchar(hex_asc_lo(v)); v 1769 arch/powerpc/kernel/eeh.c static int proc_eeh_show(struct seq_file *m, void *v) v 271 arch/powerpc/kernel/eeh_cache.c static int eeh_addr_cache_show(struct seq_file *s, void *v) v 120 arch/powerpc/kernel/io.c #define IO_CHECK_ALIGN(v,a) ((((unsigned long)(v)) & ((a) - 1)) == 0) v 477 arch/powerpc/kernel/prom_init.c unsigned long v; v 512 arch/powerpc/kernel/prom_init.c v = va_arg(args, unsigned int); v 515 arch/powerpc/kernel/prom_init.c v = va_arg(args, unsigned long); v 519 arch/powerpc/kernel/prom_init.c v = va_arg(args, unsigned long long); v 522 arch/powerpc/kernel/prom_init.c prom_print_hex(v); v 528 arch/powerpc/kernel/prom_init.c v = va_arg(args, unsigned int); v 531 arch/powerpc/kernel/prom_init.c v = va_arg(args, unsigned long); v 535 arch/powerpc/kernel/prom_init.c v = va_arg(args, unsigned long long); v 538 arch/powerpc/kernel/prom_init.c prom_print_dec(v); v 138 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_sensors_show(struct seq_file *m, void *v); v 139 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_clock_show(struct seq_file *m, void *v); v 142 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_progress_show(struct seq_file *m, void *v); v 145 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_poweron_show(struct seq_file *m, void *v); v 151 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_tone_freq_show(struct seq_file *m, void *v); v 154 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_tone_volume_show(struct seq_file *m, void *v); v 155 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_rmo_buf_show(struct seq_file *m, void *v); v 304 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_poweron_show(struct seq_file *m, void *v) v 338 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_progress_show(struct seq_file *m, void *v) v 367 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_clock_show(struct seq_file *m, void *v) v 389 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_sensors_show(struct seq_file *m, void *v) v 724 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_tone_freq_show(struct seq_file *m, void *v) v 752 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_tone_volume_show(struct seq_file *m, void *v) v 761 arch/powerpc/kernel/rtas-proc.c static int ppc_rtas_rmo_buf_show(struct seq_file *m, void *v) v 226 arch/powerpc/kernel/setup-common.c static int show_cpuinfo(struct seq_file *m, void *v) v 228 arch/powerpc/kernel/setup-common.c unsigned long cpu_id = (unsigned long)v - 1; v 355 arch/powerpc/kernel/setup-common.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 361 arch/powerpc/kernel/setup-common.c static void c_stop(struct seq_file *m, void *v) v 346 arch/powerpc/kvm/book3s_32_mmu.c struct kvm_vcpu *v; v 349 arch/powerpc/kvm/book3s_32_mmu.c kvm_for_each_vcpu(i, v, vcpu->kvm) v 350 arch/powerpc/kvm/book3s_32_mmu.c kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000); v 213 arch/powerpc/kvm/book3s_64_mmu.c u64 v, r; v 302 arch/powerpc/kvm/book3s_64_mmu.c v = be64_to_cpu(pteg[i]); v 549 arch/powerpc/kvm/book3s_64_mmu.c struct kvm_vcpu *v; v 573 arch/powerpc/kvm/book3s_64_mmu.c kvm_for_each_vcpu(i, v, vcpu->kvm) v 574 arch/powerpc/kvm/book3s_64_mmu.c kvmppc_mmu_pte_vflush(v, va >> 12, mask); v 331 arch/powerpc/kvm/book3s_64_mmu_hv.c static unsigned long kvmppc_mmu_get_real_addr(unsigned long v, unsigned long r, v 336 arch/powerpc/kvm/book3s_64_mmu_hv.c ra_mask = kvmppc_actual_pgsz(v, r) - 1; v 347 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long v, orig_v, gr; v 375 arch/powerpc/kvm/book3s_64_mmu_hv.c v = orig_v = be64_to_cpu(hptep[0]) & ~HPTE_V_HVLOCK; v 377 arch/powerpc/kvm/book3s_64_mmu_hv.c v = hpte_new_to_old_v(v, be64_to_cpu(hptep[1])); v 384 arch/powerpc/kvm/book3s_64_mmu_hv.c gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff); v 406 arch/powerpc/kvm/book3s_64_mmu_hv.c gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr); v 1053 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long v, r; v 1106 arch/powerpc/kvm/book3s_64_mmu_hv.c v = be64_to_cpu(hptep[0]); v 1114 arch/powerpc/kvm/book3s_64_mmu_hv.c n = kvmppc_actual_pgsz(v, r); v 1120 arch/powerpc/kvm/book3s_64_mmu_hv.c v &= ~HPTE_V_ABSENT; v 1121 arch/powerpc/kvm/book3s_64_mmu_hv.c v |= HPTE_V_VALID; v 1122 arch/powerpc/kvm/book3s_64_mmu_hv.c __unlock_hpte(hptep, v); v 1670 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long v, r, hr; v 1690 arch/powerpc/kvm/book3s_64_mmu_hv.c v = r = 0; v 1696 arch/powerpc/kvm/book3s_64_mmu_hv.c v = be64_to_cpu(hptp[0]); v 1699 arch/powerpc/kvm/book3s_64_mmu_hv.c v = hpte_new_to_old_v(v, hr); v 1704 arch/powerpc/kvm/book3s_64_mmu_hv.c valid = !!(v & HPTE_V_VALID); v 1715 arch/powerpc/kvm/book3s_64_mmu_hv.c if (v & HPTE_V_ABSENT) { v 1716 arch/powerpc/kvm/book3s_64_mmu_hv.c v &= ~HPTE_V_ABSENT; v 1717 arch/powerpc/kvm/book3s_64_mmu_hv.c v |= HPTE_V_VALID; v 1720 arch/powerpc/kvm/book3s_64_mmu_hv.c if ((flags & KVM_GET_HTAB_BOLTED_ONLY) && !(v & HPTE_V_BOLTED)) v 1734 arch/powerpc/kvm/book3s_64_mmu_hv.c hpte[0] = cpu_to_be64(v); v 1845 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long v, r; v 1902 arch/powerpc/kvm/book3s_64_mmu_hv.c v = be64_to_cpu(hpte_v); v 1905 arch/powerpc/kvm/book3s_64_mmu_hv.c if (!(v & HPTE_V_VALID)) v 1907 arch/powerpc/kvm/book3s_64_mmu_hv.c pshift = kvmppc_hpte_base_page_shift(v, r); v 1916 arch/powerpc/kvm/book3s_64_mmu_hv.c ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, i, v, r, v 1920 arch/powerpc/kvm/book3s_64_mmu_hv.c "r=%lx\n", ret, i, v, r); v 1923 arch/powerpc/kvm/book3s_64_mmu_hv.c if (!mmu_ready && is_vrma_hpte(v)) { v 2059 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long v, hr, gr; v 2100 arch/powerpc/kvm/book3s_64_mmu_hv.c v = be64_to_cpu(hptp[0]) & ~HPTE_V_HVLOCK; v 2103 arch/powerpc/kvm/book3s_64_mmu_hv.c unlock_hpte(hptp, v); v 2106 arch/powerpc/kvm/book3s_64_mmu_hv.c if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) v 2111 arch/powerpc/kvm/book3s_64_mmu_hv.c i, v, hr, gr); v 458 arch/powerpc/kvm/book3s_hv.c static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, v 465 arch/powerpc/kvm/book3s_hv.c if (v->next_gpa != addr || v->len != len) { v 466 arch/powerpc/kvm/book3s_hv.c v->next_gpa = addr; v 467 arch/powerpc/kvm/book3s_hv.c v->len = addr ? len : 0; v 468 arch/powerpc/kvm/book3s_hv.c v->update_pending = 1; v 1164 arch/powerpc/kvm/book3s_hv.c struct kvm_vcpu *v; v 1171 arch/powerpc/kvm/book3s_hv.c v = kvmppc_find_vcpu(vcpu->kvm, cpu); v 1172 arch/powerpc/kvm/book3s_hv.c if (!v) v 1179 arch/powerpc/kvm/book3s_hv.c pcpu = READ_ONCE(v->cpu); v 1182 arch/powerpc/kvm/book3s_hv.c if (kvmppc_doorbell_pending(v)) v 3910 arch/powerpc/kvm/book3s_hv.c struct kvm_vcpu *v; v 3974 arch/powerpc/kvm/book3s_hv.c for_each_runnable_thread(i, v, vc) { v 3975 arch/powerpc/kvm/book3s_hv.c kvmppc_core_prepare_to_enter(v); v 3976 arch/powerpc/kvm/book3s_hv.c if (signal_pending(v->arch.run_task)) { v 3977 arch/powerpc/kvm/book3s_hv.c kvmppc_remove_runnable(vc, v); v 3978 arch/powerpc/kvm/book3s_hv.c v->stat.signal_exits++; v 3979 arch/powerpc/kvm/book3s_hv.c v->arch.kvm_run->exit_reason = KVM_EXIT_INTR; v 3980 arch/powerpc/kvm/book3s_hv.c v->arch.ret = -EINTR; v 3981 arch/powerpc/kvm/book3s_hv.c wake_up(&v->arch.cpu_run); v 3987 arch/powerpc/kvm/book3s_hv.c for_each_runnable_thread(i, v, vc) { v 3988 arch/powerpc/kvm/book3s_hv.c if (!kvmppc_vcpu_woken(v)) v 3989 arch/powerpc/kvm/book3s_hv.c n_ceded += v->arch.ceded; v 3991 arch/powerpc/kvm/book3s_hv.c v->arch.ceded = 0; v 4027 arch/powerpc/kvm/book3s_hv.c v = next_runnable_thread(vc, &i); v 4028 arch/powerpc/kvm/book3s_hv.c wake_up(&v->arch.cpu_run); v 429 arch/powerpc/kvm/book3s_hv_rm_mmu.c static inline int is_mmio_hpte(unsigned long v, unsigned long r) v 431 arch/powerpc/kvm/book3s_hv_rm_mmu.c return ((v & HPTE_V_ABSENT) && v 503 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long v, r, rb; v 528 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = pte & ~HPTE_V_HVLOCK; v 529 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (v & HPTE_V_VALID) { v 531 arch/powerpc/kvm/book3s_hv_rm_mmu.c rb = compute_tlbie_rb(v, pte_r, pte_index); v 542 arch/powerpc/kvm/book3s_hv_rm_mmu.c remove_revmap_chain(kvm, pte_index, rev, v, v 549 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (is_mmio_hpte(v, pte_r)) v 552 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (v & HPTE_V_ABSENT) v 553 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = (v & ~HPTE_V_ABSENT) | HPTE_V_VALID; v 554 arch/powerpc/kvm/book3s_hv_rm_mmu.c hpret[0] = v; v 692 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long v, r, rb, mask, bits; v 703 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = pte_v = be64_to_cpu(hpte[0]); v 705 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = hpte_new_to_old_v(v, be64_to_cpu(hpte[1])); v 706 arch/powerpc/kvm/book3s_hv_rm_mmu.c if ((v & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 || v 707 arch/powerpc/kvm/book3s_hv_rm_mmu.c ((flags & H_AVPN) && (v & ~0x7fUL) != avpn)) { v 728 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (v & HPTE_V_VALID) { v 739 arch/powerpc/kvm/book3s_hv_rm_mmu.c rb = compute_tlbie_rb(v, r, pte_index); v 750 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (is_mmio_hpte(v, pte_r)) v 761 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long v, r; v 776 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; v 779 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = hpte_new_to_old_v(v, r); v 782 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (v & HPTE_V_ABSENT) { v 783 arch/powerpc/kvm/book3s_hv_rm_mmu.c v &= ~HPTE_V_ABSENT; v 784 arch/powerpc/kvm/book3s_hv_rm_mmu.c v |= HPTE_V_VALID; v 786 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (v & HPTE_V_VALID) { v 790 arch/powerpc/kvm/book3s_hv_rm_mmu.c vcpu->arch.regs.gpr[4 + i * 2] = v; v 801 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long v, r, gr; v 815 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = be64_to_cpu(hpte[0]); v 817 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) v 825 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (v & HPTE_V_VALID) { v 829 arch/powerpc/kvm/book3s_hv_rm_mmu.c rmap = revmap_for_hpte(kvm, v, gr, NULL, NULL); v 840 arch/powerpc/kvm/book3s_hv_rm_mmu.c unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); v 849 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long v, r, gr; v 862 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = be64_to_cpu(hpte[0]); v 864 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) v 872 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (v & HPTE_V_VALID) { v 881 arch/powerpc/kvm/book3s_hv_rm_mmu.c kvmppc_set_dirty_from_hpte(kvm, v, gr); v 887 arch/powerpc/kvm/book3s_hv_rm_mmu.c unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); v 1125 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long v, r, orig_v; v 1159 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; v 1161 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = hpte_new_to_old_v(v, be64_to_cpu(hpte[i+1])); v 1164 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (!(v & valid) || (v & mask) != val) v 1170 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = orig_v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; v 1173 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = hpte_new_to_old_v(v, r); v 1180 arch/powerpc/kvm/book3s_hv_rm_mmu.c if ((v & valid) && (v & mask) == val && v 1181 arch/powerpc/kvm/book3s_hv_rm_mmu.c kvmppc_hpte_base_page_shift(v, r) == pshift) v 1213 arch/powerpc/kvm/book3s_hv_rm_mmu.c unsigned long v, r, gr, orig_v; v 1230 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = cache_entry->hpte_v; v 1241 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = orig_v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; v 1244 arch/powerpc/kvm/book3s_hv_rm_mmu.c v = hpte_new_to_old_v(v, r); v 1254 arch/powerpc/kvm/book3s_hv_rm_mmu.c if ((status & DSISR_NOHPTE) && (v & HPTE_V_VALID)) v 1287 arch/powerpc/kvm/book3s_hv_rm_mmu.c vcpu->arch.pgfault_hpte[0] = v; v 1306 arch/powerpc/kvm/book3s_hv_rm_mmu.c cache_entry->hpte_v = v; v 91 arch/powerpc/kvm/book3s_pr_papr.c unsigned long v = 0, pteg, rb; v 110 arch/powerpc/kvm/book3s_pr_papr.c if (copy_to_user((void __user *)pteg, &v, sizeof(v))) v 157 arch/powerpc/kvm/book3s_pr_papr.c unsigned long v = 0; v 195 arch/powerpc/kvm/book3s_pr_papr.c if (copy_to_user((void __user *)pteg, &v, sizeof(v))) { v 219 arch/powerpc/kvm/book3s_pr_papr.c unsigned long rb, pteg, r, v; v 236 arch/powerpc/kvm/book3s_pr_papr.c v = pte[0]; v 246 arch/powerpc/kvm/book3s_pr_papr.c rb = compute_tlbie_rb(v, r, pte_index); v 48 arch/powerpc/kvm/powerpc.c int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) v 50 arch/powerpc/kvm/powerpc.c return !!(v->arch.pending_exceptions) || kvm_request_pending(v); v 562 arch/powerpc/lib/sstep.c __vector128 v; v 577 arch/powerpc/lib/sstep.c put_vr(rn, &u.v); v 579 arch/powerpc/lib/sstep.c current->thread.vr_state.vr[rn] = u.v; v 589 arch/powerpc/lib/sstep.c __vector128 v; v 600 arch/powerpc/lib/sstep.c get_vr(rn, &u.v); v 602 arch/powerpc/lib/sstep.c u.v = current->thread.vr_state.vr[rn]; v 698 arch/powerpc/lib/sstep.c unsigned long v = *(unsigned long *)(mem + 8); v 699 arch/powerpc/lib/sstep.c reg->d[IS_BE] = !rev ? v : byterev_8(v); v 842 arch/powerpc/lib/sstep.c current->thread.vr_state.vr[reg - 32] = buf.v; v 873 arch/powerpc/lib/sstep.c buf.v = current->thread.vr_state.vr[reg - 32]; v 1108 arch/powerpc/lib/sstep.c unsigned long v, int size) v 1110 arch/powerpc/lib/sstep.c unsigned long long res = v ^ (v >> 8); v 318 arch/powerpc/mm/book3s64/hash_native.c unsigned long *word = (unsigned long *)&hptep->v; v 332 arch/powerpc/mm/book3s64/hash_native.c unsigned long *word = (unsigned long *)&hptep->v; v 352 arch/powerpc/mm/book3s64/hash_native.c if (! (be64_to_cpu(hptep->v) & HPTE_V_VALID)) { v 355 arch/powerpc/mm/book3s64/hash_native.c if (! (be64_to_cpu(hptep->v) & HPTE_V_VALID)) v 386 arch/powerpc/mm/book3s64/hash_native.c hptep->v = cpu_to_be64(hpte_v); v 407 arch/powerpc/mm/book3s64/hash_native.c hpte_v = be64_to_cpu(hptep->v); v 412 arch/powerpc/mm/book3s64/hash_native.c hpte_v = be64_to_cpu(hptep->v); v 427 arch/powerpc/mm/book3s64/hash_native.c hptep->v = 0; v 566 arch/powerpc/mm/book3s64/hash_native.c VM_WARN_ON(!(be64_to_cpu(hptep->v) & HPTE_V_BOLTED)); v 569 arch/powerpc/mm/book3s64/hash_native.c hptep->v = 0; v 599 arch/powerpc/mm/book3s64/hash_native.c hptep->v = 0; v 664 arch/powerpc/mm/book3s64/hash_native.c hptep->v = 0; v 691 arch/powerpc/mm/book3s64/hash_native.c unsigned long hpte_v = be64_to_cpu(hpte->v); v 782 arch/powerpc/mm/book3s64/hash_native.c hpte_v = be64_to_cpu(hptep->v); v 790 arch/powerpc/mm/book3s64/hash_native.c hptep->v = 0; v 846 arch/powerpc/mm/book3s64/hash_native.c hptep->v = 0; v 192 arch/powerpc/mm/book3s64/slb.c unsigned long e, v; v 202 arch/powerpc/mm/book3s64/slb.c asm volatile("slbmfev %0,%1" : "=r" (v) : "r" (i)); v 204 arch/powerpc/mm/book3s64/slb.c slb_ptr->vsid = v; v 212 arch/powerpc/mm/book3s64/slb.c unsigned long e, v; v 223 arch/powerpc/mm/book3s64/slb.c v = slb_ptr->vsid; v 226 arch/powerpc/mm/book3s64/slb.c if (!e && !v) v 229 arch/powerpc/mm/book3s64/slb.c pr_err("%02d %016lx %016lx\n", i, e, v); v 235 arch/powerpc/mm/book3s64/slb.c llp = v & SLB_VSID_LLP; v 236 arch/powerpc/mm/book3s64/slb.c if (v & SLB_VSID_B_1T) { v 239 arch/powerpc/mm/book3s64/slb.c (v & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T, llp); v 243 arch/powerpc/mm/book3s64/slb.c (v & ~SLB_VSID_B) >> SLB_VSID_SHIFT, llp); v 20 arch/powerpc/mm/ioremap_32.c unsigned long v; v 61 arch/powerpc/mm/ioremap_32.c v = p_block_mapped(p); v 62 arch/powerpc/mm/ioremap_32.c if (v) v 63 arch/powerpc/mm/ioremap_32.c return (void __iomem *)v + offset; v 242 arch/powerpc/mm/mem.c unsigned long v = __fix_to_virt(__end_of_fixed_addresses - 1); v 245 arch/powerpc/mm/mem.c for (; v < end; v += PAGE_SIZE) v 246 arch/powerpc/mm/mem.c map_kernel_page(v, 0, __pgprot(0)); /* XXX gross */ v 93 arch/powerpc/mm/nohash/40x.c unsigned long v, s, mapped; v 96 arch/powerpc/mm/nohash/40x.c v = KERNELBASE; v 107 arch/powerpc/mm/nohash/40x.c pmdp = pmd_offset(pud_offset(pgd_offset_k(v), v), v); v 113 arch/powerpc/mm/nohash/40x.c v += LARGE_PAGE_SIZE_16M; v 122 arch/powerpc/mm/nohash/40x.c pmdp = pmd_offset(pud_offset(pgd_offset_k(v), v), v); v 125 arch/powerpc/mm/nohash/40x.c v += LARGE_PAGE_SIZE_4M; v 85 arch/powerpc/mm/nohash/8xx.c unsigned long v = VIRT_IMMR_BASE; v 89 arch/powerpc/mm/nohash/8xx.c map_kernel_page(v + offset, p + offset, PAGE_KERNEL_NCG); v 1580 arch/powerpc/mm/numa.c static int topology_read(struct seq_file *file, void *v) v 89 arch/powerpc/mm/pgtable_32.c unsigned long v, s; v 94 arch/powerpc/mm/pgtable_32.c v = PAGE_OFFSET + s; v 97 arch/powerpc/mm/pgtable_32.c ktext = ((char *)v >= _stext && (char *)v < etext) || v 98 arch/powerpc/mm/pgtable_32.c ((char *)v >= _sinittext && (char *)v < _einittext); v 99 arch/powerpc/mm/pgtable_32.c map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL); v 102 arch/powerpc/mm/pgtable_32.c hash_preload(&init_mm, v); v 104 arch/powerpc/mm/pgtable_32.c v += PAGE_SIZE; v 59 arch/powerpc/mm/ptdump/bats.c static int bats_show_601(struct seq_file *m, void *v) v 119 arch/powerpc/mm/ptdump/bats.c static int bats_show_603(struct seq_file *m, void *v) v 184 arch/powerpc/mm/ptdump/hashpagetable.c static void dump_hpte_info(struct pg_state *st, unsigned long ea, u64 v, u64 r, v 194 arch/powerpc/mm/ptdump/hashpagetable.c seq_printf(st->seq, "AVPN:%llx\t", HPTE_V_AVPN_VAL(v)); v 195 arch/powerpc/mm/ptdump/hashpagetable.c dump_flag_info(st, v_flag_array, v, ARRAY_SIZE(v_flag_array)); v 207 arch/powerpc/mm/ptdump/hashpagetable.c static int native_find(unsigned long ea, int psize, bool primary, u64 *v, u64 v 227 arch/powerpc/mm/ptdump/hashpagetable.c hpte_v = be64_to_cpu(hptep->v); v 231 arch/powerpc/mm/ptdump/hashpagetable.c *v = be64_to_cpu(hptep->v); v 240 arch/powerpc/mm/ptdump/hashpagetable.c static int pseries_find(unsigned long ea, int psize, bool primary, u64 *v, u64 *r) v 265 arch/powerpc/mm/ptdump/hashpagetable.c if (HPTE_V_COMPARE(ptes[j].v, want_v) && v 266 arch/powerpc/mm/ptdump/hashpagetable.c (ptes[j].v & HPTE_V_VALID)) { v 268 arch/powerpc/mm/ptdump/hashpagetable.c *v = ptes[j].v; v 314 arch/powerpc/mm/ptdump/hashpagetable.c static int base_hpte_find(unsigned long ea, int psize, bool primary, u64 *v, v 318 arch/powerpc/mm/ptdump/hashpagetable.c return pseries_find(ea, psize, primary, v, r); v 320 arch/powerpc/mm/ptdump/hashpagetable.c return native_find(ea, psize, primary, v, r); v 326 arch/powerpc/mm/ptdump/hashpagetable.c u64 v = 0, r = 0; v 334 arch/powerpc/mm/ptdump/hashpagetable.c slot = base_hpte_find(ea, psize, true, &v, &r); v 338 arch/powerpc/mm/ptdump/hashpagetable.c slot = base_hpte_find(ea, psize, false, &v, &r); v 352 arch/powerpc/mm/ptdump/hashpagetable.c if ((v & HPTE_V_LARGE) == HPTE_V_LARGE) { v 368 arch/powerpc/mm/ptdump/hashpagetable.c dump_hpte_info(st, ea, v, r, rpn, base_psize, actual_psize, lp_bits); v 499 arch/powerpc/mm/ptdump/hashpagetable.c static int ptdump_show(struct seq_file *m, void *v) v 352 arch/powerpc/mm/ptdump/ptdump.c static int ptdump_show(struct seq_file *m, void *v) v 29 arch/powerpc/mm/ptdump/segment_regs.c static int sr_show(struct seq_file *m, void *v) v 36 arch/powerpc/perf/hv-24x7.c #define DOMAIN(n, v, x, c) \ v 50 arch/powerpc/perf/hv-24x7.c #define DOMAIN(n, v, x, c) \ v 8 arch/powerpc/perf/hv-24x7.h #define DOMAIN(n, v, x, c) HV_PERF_DOMAIN_##n = v, v 42 arch/powerpc/perf/isa207-common.h #define EVENT_COMBINE(v) (((v) >> EVENT_COMBINE_SHIFT) & EVENT_COMBINE_MASK) v 73 arch/powerpc/perf/isa207-common.h #define p9_EVENT_COMBINE(v) (((v) >> p9_EVENT_COMBINE_SHIFT) & p9_EVENT_COMBINE_MASK) v 76 arch/powerpc/perf/isa207-common.h #define p9_SDAR_MODE(v) (((v) >> p9_SDAR_MODE_SHIFT) & p9_SDAR_MODE_MASK) v 114 arch/powerpc/perf/isa207-common.h #define CNST_FAB_MATCH_VAL(v) (((v) & EVENT_THR_CTL_MASK) << 56) v 118 arch/powerpc/perf/isa207-common.h #define CNST_THRESH_VAL(v) (((v) & EVENT_THRESH_MASK) << 32) v 121 arch/powerpc/perf/isa207-common.h #define CNST_EBB_VAL(v) (((v) & EVENT_EBB_MASK) << 24) v 124 arch/powerpc/perf/isa207-common.h #define CNST_IFM_VAL(v) (((v) & EVENT_IFM_MASK) << 25) v 127 arch/powerpc/perf/isa207-common.h #define CNST_L1_QUAL_VAL(v) (((v) & 3) << 22) v 130 arch/powerpc/perf/isa207-common.h #define CNST_SAMPLE_VAL(v) (((v) & EVENT_SAMPLE_MASK) << 16) v 133 arch/powerpc/perf/isa207-common.h #define CNST_CACHE_GROUP_VAL(v) (((v) & 0xffull) << 55) v 186 arch/powerpc/perf/isa207-common.h #define MMCRA_THR_CTR_MANT(v) (((v) >> MMCRA_THR_CTR_MANT_SHIFT) &\ v 191 arch/powerpc/perf/isa207-common.h #define MMCRA_THR_CTR_EXP(v) (((v) >> MMCRA_THR_CTR_EXP_SHIFT) &\ v 285 arch/powerpc/platforms/52xx/mpc52xx_gpt.c mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v) v 291 arch/powerpc/platforms/52xx/mpc52xx_gpt.c dev_dbg(gpt->dev, "%s: gpio:%d v:%d\n", __func__, gpio, v); v 292 arch/powerpc/platforms/52xx/mpc52xx_gpt.c r = v ? MPC52xx_GPT_MODE_GPIO_OUT_HIGH : MPC52xx_GPT_MODE_GPIO_OUT_LOW; v 60 arch/powerpc/platforms/cell/spufs/coredump.c static int match_context(const void *v, struct file *file, unsigned fd) v 125 arch/powerpc/platforms/cell/spufs/spu_restore.c fpcr = regs_spill[offset].v; v 77 arch/powerpc/platforms/cell/spufs/spu_save.c regs_spill[offset].v = spu_mffpscr(); v 24 arch/powerpc/platforms/cell/spufs/spu_utils.h vector unsigned int v; v 386 arch/powerpc/platforms/pasemi/setup.c unsigned long e, v; v 392 arch/powerpc/platforms/pasemi/setup.c asm volatile("slbmfev %0,%1" : "=r" (v) : "r" (i)); v 393 arch/powerpc/platforms/pasemi/setup.c pr_err("%02d %016lx %016lx\n", i, e, v); v 48 arch/powerpc/platforms/powermac/bootx_init.c unsigned long v; v 78 arch/powerpc/platforms/powermac/bootx_init.c v = va_arg(args, unsigned long); v 79 arch/powerpc/platforms/powermac/bootx_init.c btext_drawhex(v); v 51 arch/powerpc/platforms/powermac/pfunc_base.c if (args && args->count && !args->u[0].v) v 229 arch/powerpc/platforms/powermac/pfunc_base.c val = args->u[0].v << shift; v 249 arch/powerpc/platforms/powermac/pfunc_base.c val = args->u[0].v << shift; v 101 arch/powerpc/platforms/powermac/smp.c #define PSURGE_QUAD_OUT(r, v) (out_8(quad_base + ((r) << 4) + 4, (v))) v 103 arch/powerpc/platforms/powermac/smp.c #define PSURGE_QUAD_BIS(r, v) (PSURGE_QUAD_OUT((r), PSURGE_QUAD_IN(r) | (v))) v 104 arch/powerpc/platforms/powermac/smp.c #define PSURGE_QUAD_BIC(r, v) (PSURGE_QUAD_OUT((r), PSURGE_QUAD_IN(r) & ~(v))) v 638 arch/powerpc/platforms/powermac/smp.c args.u[0].v = !freeze; v 58 arch/powerpc/platforms/powernv/opal-xscom.c __be64 v; v 61 arch/powerpc/platforms/powernv/opal-xscom.c rc = opal_xscom_read(chip, reg, (__be64 *)__pa(&v)); v 66 arch/powerpc/platforms/powernv/opal-xscom.c *value = be64_to_cpu(v); v 57 arch/powerpc/platforms/powernv/rng.c int powernv_get_random_real_mode(unsigned long *v) v 63 arch/powerpc/platforms/powernv/rng.c *v = rng_whiten(rng, __raw_rm_readq(rng->regs_real)); v 68 arch/powerpc/platforms/powernv/rng.c int powernv_get_random_darn(unsigned long *v) v 78 arch/powerpc/platforms/powernv/rng.c *v = val; v 103 arch/powerpc/platforms/powernv/rng.c int powernv_get_random_long(unsigned long *v) v 109 arch/powerpc/platforms/powernv/rng.c *v = rng_whiten(rng, in_be64(rng->regs)); v 40 arch/powerpc/platforms/ps3/setup.c void ps3_get_firmware_version(union ps3_firmware_version *v) v 42 arch/powerpc/platforms/ps3/setup.c *v = ps3_firmware_version; v 553 arch/powerpc/platforms/pseries/lpar.c static int vcpudispatch_stats_display(struct seq_file *p, void *v) v 618 arch/powerpc/platforms/pseries/lpar.c static int vcpudispatch_stats_freq_display(struct seq_file *p, void *v) v 444 arch/powerpc/platforms/pseries/lparcfg.c static int pseries_lparcfg_data(struct seq_file *m, void *v) v 664 arch/powerpc/platforms/pseries/lparcfg.c static int lparcfg_data(struct seq_file *m, void *v) v 693 arch/powerpc/platforms/pseries/lparcfg.c return pseries_lparcfg_data(m, v); v 15 arch/powerpc/platforms/pseries/rng.c static int pseries_get_random_long(unsigned long *v) v 20 arch/powerpc/platforms/pseries/rng.c *v = retbuf[0]; v 48 arch/powerpc/sysdev/dart.h #define DART_OUT(r,v) (out_be32(DART_REG(r), (v))) v 298 arch/powerpc/sysdev/mpic.c #define mpic_write(b,r,v) _mpic_write(mpic->reg_type,&(b),(r),(v)) v 300 arch/powerpc/sysdev/mpic.c #define mpic_ipi_write(i,v) _mpic_ipi_write(mpic,(i),(v)) v 302 arch/powerpc/sysdev/mpic.c #define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v)) v 304 arch/powerpc/sysdev/mpic.c #define mpic_cpu_write(i,v) _mpic_cpu_write(mpic,(i),(v)) v 306 arch/powerpc/sysdev/mpic.c #define mpic_irq_write(s,r,v) _mpic_irq_write(mpic,(s),(r),(v)) v 200 arch/powerpc/xmon/xmon.c #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0]) v 202 arch/powerpc/xmon/xmon.c #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) v 1311 arch/powerpc/xmon/xmon.c unsigned char v; v 1319 arch/powerpc/xmon/xmon.c if (mread(adrs+i, &v, 1) == 0) { v 1323 arch/powerpc/xmon/xmon.c fcs = FCS(fcs, v); v 3053 arch/powerpc/xmon/xmon.c unsigned char v; v 3064 arch/powerpc/xmon/xmon.c ok = mread(a, &v, 1); v 3315 arch/powerpc/xmon/xmon.c unsigned long v; v 3390 arch/powerpc/xmon/xmon.c v = 0; v 3392 arch/powerpc/xmon/xmon.c v = (v << 4) + d; v 3397 arch/powerpc/xmon/xmon.c *vp = v; v 30 arch/riscv/include/asm/atomic.h static __always_inline int atomic_read(const atomic_t *v) v 32 arch/riscv/include/asm/atomic.h return READ_ONCE(v->counter); v 34 arch/riscv/include/asm/atomic.h static __always_inline void atomic_set(atomic_t *v, int i) v 36 arch/riscv/include/asm/atomic.h WRITE_ONCE(v->counter, i); v 41 arch/riscv/include/asm/atomic.h static __always_inline s64 atomic64_read(const atomic64_t *v) v 43 arch/riscv/include/asm/atomic.h return READ_ONCE(v->counter); v 45 arch/riscv/include/asm/atomic.h static __always_inline void atomic64_set(atomic64_t *v, s64 i) v 47 arch/riscv/include/asm/atomic.h WRITE_ONCE(v->counter, i); v 58 arch/riscv/include/asm/atomic.h void atomic##prefix##_##op(c_type i, atomic##prefix##_t *v) \ v 62 arch/riscv/include/asm/atomic.h : "+A" (v->counter) \ v 93 arch/riscv/include/asm/atomic.h atomic##prefix##_t *v) \ v 98 arch/riscv/include/asm/atomic.h : "+A" (v->counter), "=r" (ret) \ v 104 arch/riscv/include/asm/atomic.h c_type atomic##prefix##_fetch_##op(c_type i, atomic##prefix##_t *v) \ v 109 arch/riscv/include/asm/atomic.h : "+A" (v->counter), "=r" (ret) \ v 118 arch/riscv/include/asm/atomic.h atomic##prefix##_t *v) \ v 120 arch/riscv/include/asm/atomic.h return atomic##prefix##_fetch_##op##_relaxed(i, v) c_op I; \ v 123 arch/riscv/include/asm/atomic.h c_type atomic##prefix##_##op##_return(c_type i, atomic##prefix##_t *v) \ v 125 arch/riscv/include/asm/atomic.h return atomic##prefix##_fetch_##op(i, v) c_op I; \ v 202 arch/riscv/include/asm/atomic.h static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 214 arch/riscv/include/asm/atomic.h : [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter) v 222 arch/riscv/include/asm/atomic.h static __always_inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 235 arch/riscv/include/asm/atomic.h : [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter) v 249 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_xchg_relaxed(atomic##prefix##_t *v, c_t n) \ v 251 arch/riscv/include/asm/atomic.h return __xchg_relaxed(&(v->counter), n, size); \ v 254 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_xchg_acquire(atomic##prefix##_t *v, c_t n) \ v 256 arch/riscv/include/asm/atomic.h return __xchg_acquire(&(v->counter), n, size); \ v 259 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_xchg_release(atomic##prefix##_t *v, c_t n) \ v 261 arch/riscv/include/asm/atomic.h return __xchg_release(&(v->counter), n, size); \ v 264 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_xchg(atomic##prefix##_t *v, c_t n) \ v 266 arch/riscv/include/asm/atomic.h return __xchg(&(v->counter), n, size); \ v 269 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_cmpxchg_relaxed(atomic##prefix##_t *v, \ v 272 arch/riscv/include/asm/atomic.h return __cmpxchg_relaxed(&(v->counter), o, n, size); \ v 275 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_cmpxchg_acquire(atomic##prefix##_t *v, \ v 278 arch/riscv/include/asm/atomic.h return __cmpxchg_acquire(&(v->counter), o, n, size); \ v 281 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_cmpxchg_release(atomic##prefix##_t *v, \ v 284 arch/riscv/include/asm/atomic.h return __cmpxchg_release(&(v->counter), o, n, size); \ v 287 arch/riscv/include/asm/atomic.h c_t atomic##prefix##_cmpxchg(atomic##prefix##_t *v, c_t o, c_t n) \ v 289 arch/riscv/include/asm/atomic.h return __cmpxchg(&(v->counter), o, n, size); \ v 315 arch/riscv/include/asm/atomic.h static __always_inline int atomic_sub_if_positive(atomic_t *v, int offset) v 327 arch/riscv/include/asm/atomic.h : [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter) v 333 arch/riscv/include/asm/atomic.h #define atomic_dec_if_positive(v) atomic_sub_if_positive(v, 1) v 336 arch/riscv/include/asm/atomic.h static __always_inline s64 atomic64_sub_if_positive(atomic64_t *v, s64 offset) v 349 arch/riscv/include/asm/atomic.h : [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter) v 355 arch/riscv/include/asm/atomic.h #define atomic64_dec_if_positive(v) atomic64_sub_if_positive(v, 1) v 30 arch/riscv/include/asm/barrier.h #define __smp_store_release(p, v) \ v 34 arch/riscv/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 106 arch/riscv/include/asm/futex.h : [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp) v 105 arch/riscv/include/asm/io.h #define writeb_cpu(v,c) ((void)__raw_writeb((v),(c))) v 106 arch/riscv/include/asm/io.h #define writew_cpu(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) v 107 arch/riscv/include/asm/io.h #define writel_cpu(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) v 111 arch/riscv/include/asm/io.h #define writeq_cpu(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) v 132 arch/riscv/include/asm/io.h #define writeb_relaxed(v,c) ({ __io_rbw(); writeb_cpu((v),(c)); __io_raw(); }) v 133 arch/riscv/include/asm/io.h #define writew_relaxed(v,c) ({ __io_rbw(); writew_cpu((v),(c)); __io_raw(); }) v 134 arch/riscv/include/asm/io.h #define writel_relaxed(v,c) ({ __io_rbw(); writel_cpu((v),(c)); __io_raw(); }) v 138 arch/riscv/include/asm/io.h #define writeq_relaxed(v,c) ({ __io_rbw(); writeq_cpu((v),(c)); __io_raw(); }) v 148 arch/riscv/include/asm/io.h #define __io_ar(v) __asm__ __volatile__ ("fence i,r" : : : "memory"); v 156 arch/riscv/include/asm/io.h #define writeb(v,c) ({ __io_bw(); writeb_cpu((v),(c)); __io_aw(); }) v 157 arch/riscv/include/asm/io.h #define writew(v,c) ({ __io_bw(); writew_cpu((v),(c)); __io_aw(); }) v 158 arch/riscv/include/asm/io.h #define writel(v,c) ({ __io_bw(); writel_cpu((v),(c)); __io_aw(); }) v 162 arch/riscv/include/asm/io.h #define writeq(v,c) ({ __io_bw(); writeq_cpu((v),(c)); __io_aw(); }) v 189 arch/riscv/include/asm/io.h #define __io_par(v) __asm__ __volatile__ ("fence i,ior" : : : "memory"); v 197 arch/riscv/include/asm/io.h #define outb(v,c) ({ __io_pbw(); writeb_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); }) v 198 arch/riscv/include/asm/io.h #define outw(v,c) ({ __io_pbw(); writew_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); }) v 199 arch/riscv/include/asm/io.h #define outl(v,c) ({ __io_pbw(); writel_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); }) v 203 arch/riscv/include/asm/io.h #define outq(v,c) ({ __io_pbw(); writeq_cpu((v),(void*)(c)); __io_paw(); }) v 118 arch/riscv/kernel/cpu.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 124 arch/riscv/kernel/cpu.c static void c_stop(struct seq_file *m, void *v) v 128 arch/riscv/kernel/cpu.c static int c_show(struct seq_file *m, void *v) v 130 arch/riscv/kernel/cpu.c unsigned long cpu_id = (unsigned long)v - 1; v 16 arch/riscv/kernel/module.c static int apply_r_riscv_32_rela(struct module *me, u32 *location, Elf_Addr v) v 18 arch/riscv/kernel/module.c if (v != (u32)v) { v 20 arch/riscv/kernel/module.c me->name, (long long)v); v 23 arch/riscv/kernel/module.c *location = v; v 27 arch/riscv/kernel/module.c static int apply_r_riscv_64_rela(struct module *me, u32 *location, Elf_Addr v) v 29 arch/riscv/kernel/module.c *(u64 *)location = v; v 34 arch/riscv/kernel/module.c Elf_Addr v) v 36 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 47 arch/riscv/kernel/module.c Elf_Addr v) v 49 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 60 arch/riscv/kernel/module.c Elf_Addr v) v 62 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 75 arch/riscv/kernel/module.c Elf_Addr v) v 77 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 93 arch/riscv/kernel/module.c Elf_Addr v) v 95 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 101 arch/riscv/kernel/module.c me->name, (long long)v, location); v 111 arch/riscv/kernel/module.c Elf_Addr v) v 117 arch/riscv/kernel/module.c *location = (*location & 0xfffff) | ((v & 0xfff) << 20); v 122 arch/riscv/kernel/module.c Elf_Addr v) v 128 arch/riscv/kernel/module.c u32 imm11_5 = (v & 0xfe0) << (31 - 11); v 129 arch/riscv/kernel/module.c u32 imm4_0 = (v & 0x1f) << (11 - 4); v 136 arch/riscv/kernel/module.c Elf_Addr v) v 143 arch/riscv/kernel/module.c me->name, (long long)v, location); v 147 arch/riscv/kernel/module.c hi20 = ((s32)v + 0x800) & 0xfffff000; v 153 arch/riscv/kernel/module.c Elf_Addr v) v 156 arch/riscv/kernel/module.c s32 hi20 = ((s32)v + 0x800) & 0xfffff000; v 157 arch/riscv/kernel/module.c s32 lo12 = ((s32)v - hi20); v 163 arch/riscv/kernel/module.c Elf_Addr v) v 166 arch/riscv/kernel/module.c s32 hi20 = ((s32)v + 0x800) & 0xfffff000; v 167 arch/riscv/kernel/module.c s32 lo12 = ((s32)v - hi20); v 175 arch/riscv/kernel/module.c Elf_Addr v) v 177 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 182 arch/riscv/kernel/module.c offset = module_emit_got_entry(me, v); v 187 arch/riscv/kernel/module.c me->name, (long long)v, location); v 197 arch/riscv/kernel/module.c Elf_Addr v) v 199 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 206 arch/riscv/kernel/module.c offset = module_emit_plt_entry(me, v); v 211 arch/riscv/kernel/module.c me->name, (long long)v, location); v 224 arch/riscv/kernel/module.c Elf_Addr v) v 226 arch/riscv/kernel/module.c ptrdiff_t offset = (void *)v - (void *)location; v 233 arch/riscv/kernel/module.c me->name, (long long)v, location); v 245 arch/riscv/kernel/module.c Elf_Addr v) v 251 arch/riscv/kernel/module.c Elf_Addr v) v 260 arch/riscv/kernel/module.c Elf_Addr v) v 262 arch/riscv/kernel/module.c *(u32 *)location += (u32)v; v 267 arch/riscv/kernel/module.c Elf_Addr v) v 269 arch/riscv/kernel/module.c *(u32 *)location -= (u32)v; v 274 arch/riscv/kernel/module.c Elf_Addr v) = { v 301 arch/riscv/kernel/module.c int (*handler)(struct module *me, u32 *location, Elf_Addr v); v 305 arch/riscv/kernel/module.c Elf_Addr v; v 340 arch/riscv/kernel/module.c v = sym->st_value + rel[i].r_addend; v 373 arch/riscv/kernel/module.c v = lo12; v 386 arch/riscv/kernel/module.c res = handler(me, location, v); v 36 arch/s390/include/asm/archrandom.h static inline bool arch_get_random_long(unsigned long *v) v 41 arch/s390/include/asm/archrandom.h static inline bool arch_get_random_int(unsigned int *v) v 46 arch/s390/include/asm/archrandom.h static inline bool arch_get_random_seed_long(unsigned long *v) v 49 arch/s390/include/asm/archrandom.h return s390_arch_random_generate((u8 *)v, sizeof(*v)); v 54 arch/s390/include/asm/archrandom.h static inline bool arch_get_random_seed_int(unsigned int *v) v 57 arch/s390/include/asm/archrandom.h return s390_arch_random_generate((u8 *)v, sizeof(*v)); v 20 arch/s390/include/asm/atomic.h static inline int atomic_read(const atomic_t *v) v 26 arch/s390/include/asm/atomic.h : "=d" (c) : "Q" (v->counter)); v 30 arch/s390/include/asm/atomic.h static inline void atomic_set(atomic_t *v, int i) v 34 arch/s390/include/asm/atomic.h : "=Q" (v->counter) : "d" (i)); v 37 arch/s390/include/asm/atomic.h static inline int atomic_add_return(int i, atomic_t *v) v 39 arch/s390/include/asm/atomic.h return __atomic_add_barrier(i, &v->counter) + i; v 42 arch/s390/include/asm/atomic.h static inline int atomic_fetch_add(int i, atomic_t *v) v 44 arch/s390/include/asm/atomic.h return __atomic_add_barrier(i, &v->counter); v 47 arch/s390/include/asm/atomic.h static inline void atomic_add(int i, atomic_t *v) v 51 arch/s390/include/asm/atomic.h __atomic_add_const(i, &v->counter); v 55 arch/s390/include/asm/atomic.h __atomic_add(i, &v->counter); v 63 arch/s390/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 65 arch/s390/include/asm/atomic.h __atomic_##op(i, &v->counter); \ v 67 arch/s390/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 69 arch/s390/include/asm/atomic.h return __atomic_##op##_barrier(i, &v->counter); \ v 78 arch/s390/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 80 arch/s390/include/asm/atomic.h static inline int atomic_cmpxchg(atomic_t *v, int old, int new) v 82 arch/s390/include/asm/atomic.h return __atomic_cmpxchg(&v->counter, old, new); v 87 arch/s390/include/asm/atomic.h static inline s64 atomic64_read(const atomic64_t *v) v 93 arch/s390/include/asm/atomic.h : "=d" (c) : "Q" (v->counter)); v 97 arch/s390/include/asm/atomic.h static inline void atomic64_set(atomic64_t *v, s64 i) v 101 arch/s390/include/asm/atomic.h : "=Q" (v->counter) : "d" (i)); v 104 arch/s390/include/asm/atomic.h static inline s64 atomic64_add_return(s64 i, atomic64_t *v) v 106 arch/s390/include/asm/atomic.h return __atomic64_add_barrier(i, (long *)&v->counter) + i; v 109 arch/s390/include/asm/atomic.h static inline s64 atomic64_fetch_add(s64 i, atomic64_t *v) v 111 arch/s390/include/asm/atomic.h return __atomic64_add_barrier(i, (long *)&v->counter); v 114 arch/s390/include/asm/atomic.h static inline void atomic64_add(s64 i, atomic64_t *v) v 118 arch/s390/include/asm/atomic.h __atomic64_add_const(i, (long *)&v->counter); v 122 arch/s390/include/asm/atomic.h __atomic64_add(i, (long *)&v->counter); v 125 arch/s390/include/asm/atomic.h #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) v 127 arch/s390/include/asm/atomic.h static inline s64 atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new) v 129 arch/s390/include/asm/atomic.h return __atomic64_cmpxchg((long *)&v->counter, old, new); v 133 arch/s390/include/asm/atomic.h static inline void atomic64_##op(s64 i, atomic64_t *v) \ v 135 arch/s390/include/asm/atomic.h __atomic64_##op(i, (long *)&v->counter); \ v 137 arch/s390/include/asm/atomic.h static inline long atomic64_fetch_##op(s64 i, atomic64_t *v) \ v 139 arch/s390/include/asm/atomic.h return __atomic64_##op##_barrier(i, (long *)&v->counter); \ v 34 arch/s390/include/asm/barrier.h #define __smp_store_release(p, v) \ v 38 arch/s390/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 17 arch/s390/include/asm/compat.h #define __SC_DELOUSE(t,v) ({ \ v 19 arch/s390/include/asm/compat.h (__force t)(__TYPE_IS_PTR(t) ? ((v) & 0x7fffffff) : (v)); \ v 305 arch/s390/include/asm/cpu_mf.h static inline unsigned long *trailer_entry_ptr(unsigned long v) v 309 arch/s390/include/asm/cpu_mf.h ret = (void *) v; v 86 arch/s390/include/asm/string.h void *__memset16(uint16_t *s, uint16_t v, size_t count); v 87 arch/s390/include/asm/string.h void *__memset32(uint32_t *s, uint32_t v, size_t count); v 88 arch/s390/include/asm/string.h void *__memset64(uint64_t *s, uint64_t v, size_t count); v 90 arch/s390/include/asm/string.h static inline void *memset16(uint16_t *s, uint16_t v, size_t count) v 92 arch/s390/include/asm/string.h return __memset16(s, v, count * sizeof(v)); v 95 arch/s390/include/asm/string.h static inline void *memset32(uint32_t *s, uint32_t v, size_t count) v 97 arch/s390/include/asm/string.h return __memset32(s, v, count * sizeof(v)); v 100 arch/s390/include/asm/string.h static inline void *memset64(uint64_t *s, uint64_t v, size_t count) v 102 arch/s390/include/asm/string.h return __memset64(s, v, count * sizeof(v)); v 261 arch/s390/include/asm/vx-insn.h .macro VLVG v, gr, disp, m v 269 arch/s390/include/asm/vx-insn.h .macro VLVGB v, gr, index, base v 272 arch/s390/include/asm/vx-insn.h .macro VLVGH v, gr, index v 275 arch/s390/include/asm/vx-insn.h .macro VLVGF v, gr, index v 278 arch/s390/include/asm/vx-insn.h .macro VLVGG v, gr, index v 292 arch/s390/include/asm/vx-insn.h .macro VL v, disp, index="%r0", base v 15 arch/s390/include/uapi/asm/runtime_instr.h __u32 v : 1; v 56 arch/s390/kernel/diag.c static int show_diag_stat(struct seq_file *m, void *v) v 59 arch/s390/kernel/diag.c unsigned long n = (unsigned long) v - 1; v 90 arch/s390/kernel/diag.c static void *show_diag_stat_next(struct seq_file *m, void *v, loff_t *pos) v 96 arch/s390/kernel/diag.c static void show_diag_stat_stop(struct seq_file *m, void *v) v 152 arch/s390/kernel/irq.c int show_interrupts(struct seq_file *p, void *v) v 154 arch/s390/kernel/irq.c int index = *(loff_t *) v; v 115 arch/s390/kernel/processor.c static void show_cpu_summary(struct seq_file *m, void *v) v 165 arch/s390/kernel/processor.c static int show_cpuinfo(struct seq_file *m, void *v) v 167 arch/s390/kernel/processor.c unsigned long n = (unsigned long) v - 1; v 171 arch/s390/kernel/processor.c show_cpu_summary(m, v); v 194 arch/s390/kernel/processor.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 200 arch/s390/kernel/processor.c static void c_stop(struct seq_file *m, void *v) v 61 arch/s390/kernel/runtime_instr.c cb->v = 1; v 277 arch/s390/kernel/sysinfo.c static int sysinfo_show(struct seq_file *m, void *v) v 267 arch/s390/kvm/kvm-s390.c void *v) v 272 arch/s390/kvm/kvm-s390.c unsigned long long *delta = v; v 3903 arch/s390/kvm/kvm-s390.c riccb->v && v 155 arch/s390/kvm/sigp.c struct kvm_vcpu *v; v 158 arch/s390/kvm/sigp.c kvm_for_each_vcpu(i, v, vcpu->kvm) { v 159 arch/s390/kvm/sigp.c if (v == vcpu) v 161 arch/s390/kvm/sigp.c if (!is_vcpu_stopped(v)) v 259 arch/s390/mm/dump_pagetables.c static int ptdump_show(struct seq_file *m, void *v) v 155 arch/s390/mm/pgalloc.c static inline unsigned int atomic_xor_bits(atomic_t *v, unsigned int bits) v 160 arch/s390/mm/pgalloc.c old = atomic_read(v); v 162 arch/s390/mm/pgalloc.c } while (atomic_cmpxchg(v, old, new) != old); v 81 arch/s390/pci/pci_debug.c static int pci_perf_show(struct seq_file *m, void *v) v 56 arch/sh/boards/mach-hp6xx/setup.c u16 v; v 60 arch/sh/boards/mach-hp6xx/setup.c v = inw(HD64461_GPADR); v 61 arch/sh/boards/mach-hp6xx/setup.c v &= ~HD64461_GPADR_SPEAKER; v 62 arch/sh/boards/mach-hp6xx/setup.c outw(v, HD64461_GPADR); v 74 arch/sh/boards/mach-hp6xx/setup.c u16 v; v 78 arch/sh/boards/mach-hp6xx/setup.c v = inw(HD64461_GPADR); v 79 arch/sh/boards/mach-hp6xx/setup.c v |= HD64461_GPADR_SPEAKER; v 80 arch/sh/boards/mach-hp6xx/setup.c outw(v, HD64461_GPADR); v 127 arch/sh/boards/mach-hp6xx/setup.c u16 v; v 129 arch/sh/boards/mach-hp6xx/setup.c v = inw(HD64461_STBCR); v 130 arch/sh/boards/mach-hp6xx/setup.c v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | v 136 arch/sh/boards/mach-hp6xx/setup.c v |= HD64461_STBCR_SPC1ST; v 138 arch/sh/boards/mach-hp6xx/setup.c outw(v, HD64461_STBCR); v 139 arch/sh/boards/mach-hp6xx/setup.c v = inw(HD64461_GPADR); v 140 arch/sh/boards/mach-hp6xx/setup.c v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0; v 141 arch/sh/boards/mach-hp6xx/setup.c outw(v, HD64461_GPADR); v 160 arch/sh/boards/mach-hp6xx/setup.c v = __raw_readw(SCPCR); v 161 arch/sh/boards/mach-hp6xx/setup.c v &= ~SCPCR_TS_MASK; v 162 arch/sh/boards/mach-hp6xx/setup.c v |= SCPCR_TS_ENABLE; v 163 arch/sh/boards/mach-hp6xx/setup.c __raw_writew(v, SCPCR); v 67 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c int i, unsigned long v) v 70 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */ v 72 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */ v 309 arch/sh/drivers/dma/dma-api.c static int dma_proc_show(struct seq_file *m, void *v) v 311 arch/sh/drivers/dma/dma-api.c struct dma_info *info = v; v 32 arch/sh/drivers/pci/fixups-se7751.c #define PCIC_WRITE(x,v) writel((v), PCI_REG(x)) v 6 arch/sh/include/asm/atomic-grb.h static inline void atomic_##op(int i, atomic_t *v) \ v 20 arch/sh/include/asm/atomic-grb.h "+r" (v) \ v 26 arch/sh/include/asm/atomic-grb.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 40 arch/sh/include/asm/atomic-grb.h "+r" (v) \ v 48 arch/sh/include/asm/atomic-grb.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 62 arch/sh/include/asm/atomic-grb.h : "=&r" (tmp), "=&r" (res), "+r" (v) \ v 14 arch/sh/include/asm/atomic-irq.h static inline void atomic_##op(int i, atomic_t *v) \ v 19 arch/sh/include/asm/atomic-irq.h v->counter c_op i; \ v 24 arch/sh/include/asm/atomic-irq.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 29 arch/sh/include/asm/atomic-irq.h temp = v->counter; \ v 31 arch/sh/include/asm/atomic-irq.h v->counter = temp; \ v 38 arch/sh/include/asm/atomic-irq.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 43 arch/sh/include/asm/atomic-irq.h temp = v->counter; \ v 44 arch/sh/include/asm/atomic-irq.h v->counter c_op i; \ v 20 arch/sh/include/asm/atomic-llsc.h static inline void atomic_##op(int i, atomic_t *v) \ v 30 arch/sh/include/asm/atomic-llsc.h : "r" (i), "r" (&v->counter) \ v 35 arch/sh/include/asm/atomic-llsc.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 46 arch/sh/include/asm/atomic-llsc.h : "r" (i), "r" (&v->counter) \ v 53 arch/sh/include/asm/atomic-llsc.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 65 arch/sh/include/asm/atomic-llsc.h : "r" (i), "r" (&v->counter) \ v 24 arch/sh/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 25 arch/sh/include/asm/atomic.h #define atomic_set(v,i) WRITE_ONCE((v)->counter, (i)) v 35 arch/sh/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 36 arch/sh/include/asm/atomic.h #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) v 30 arch/sh/include/asm/io.h #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) v 31 arch/sh/include/asm/io.h #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) v 32 arch/sh/include/asm/io.h #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v)) v 33 arch/sh/include/asm/io.h #define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v)) v 45 arch/sh/include/asm/io.h #define writeb_relaxed(v,c) ((void)__raw_writeb((__force u8)ioswabb(v),c)) v 46 arch/sh/include/asm/io.h #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)ioswabw(v),c)) v 47 arch/sh/include/asm/io.h #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c)) v 48 arch/sh/include/asm/io.h #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)ioswabq(v),c)) v 55 arch/sh/include/asm/io.h #define writeb(v,a) ({ wmb(); writeb_relaxed((v),(a)); }) v 56 arch/sh/include/asm/io.h #define writew(v,a) ({ wmb(); writew_relaxed((v),(a)); }) v 57 arch/sh/include/asm/io.h #define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); }) v 58 arch/sh/include/asm/io.h #define writeq(v,a) ({ wmb(); writeq_relaxed((v),(a)); }) v 78 arch/sh/include/asm/io.h static inline void write##bwlq##_uncached(type v, unsigned long addr) \ v 81 arch/sh/include/asm/io.h __raw_write##bwlq(v, addr); \ v 20 arch/sh/include/cpu-sh3/cpu/dac.h unsigned char v; v 21 arch/sh/include/cpu-sh3/cpu/dac.h v = __raw_readb(DACR); v 22 arch/sh/include/cpu-sh3/cpu/dac.h if(channel) v |= DACR_DAOE1; v 23 arch/sh/include/cpu-sh3/cpu/dac.h else v |= DACR_DAOE0; v 24 arch/sh/include/cpu-sh3/cpu/dac.h __raw_writeb(v,DACR); v 29 arch/sh/include/cpu-sh3/cpu/dac.h unsigned char v; v 30 arch/sh/include/cpu-sh3/cpu/dac.h v = __raw_readb(DACR); v 31 arch/sh/include/cpu-sh3/cpu/dac.h if(channel) v &= ~DACR_DAOE1; v 32 arch/sh/include/cpu-sh3/cpu/dac.h else v &= ~DACR_DAOE0; v 33 arch/sh/include/cpu-sh3/cpu/dac.h __raw_writeb(v,DACR); v 52 arch/sh/include/uapi/asm/swab.h } v, w; v 53 arch/sh/include/uapi/asm/swab.h v.u = val; v 54 arch/sh/include/uapi/asm/swab.h w.s.b = __arch_swab32(v.s.a); v 55 arch/sh/include/uapi/asm/swab.h w.s.a = __arch_swab32(v.s.b); v 80 arch/sh/kernel/cpu/proc.c static int show_cpuinfo(struct seq_file *m, void *v) v 82 arch/sh/kernel/cpu/proc.c struct sh_cpuinfo *c = v; v 138 arch/sh/kernel/cpu/proc.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 143 arch/sh/kernel/cpu/proc.c static void c_stop(struct seq_file *m, void *v) v 22 arch/sh/math-emu/sfp-util.h #define umul_ppmm(w1, w0, u, v) \ v 25 arch/sh/math-emu/sfp-util.h : "r" ((u32)(u)), "r" ((u32)(v)) \ v 120 arch/sh/mm/alignment.c static int alignment_proc_show(struct seq_file *m, void *v) v 20 arch/sh/mm/cache-sh2.c unsigned long v; v 26 arch/sh/mm/cache-sh2.c for (v = begin; v < end; v+=L1_CACHE_BYTES) { v 27 arch/sh/mm/cache-sh2.c unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0); v 31 arch/sh/mm/cache-sh2.c if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { v 41 arch/sh/mm/cache-sh2.c unsigned long v; v 48 arch/sh/mm/cache-sh2.c for (v = begin; v < end; v+=L1_CACHE_BYTES) v 49 arch/sh/mm/cache-sh2.c __raw_writel((v & CACHE_PHYSADDR_MASK), v 50 arch/sh/mm/cache-sh2.c CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); v 72 arch/sh/mm/cache-sh2.c unsigned long v; v 79 arch/sh/mm/cache-sh2.c for (v = begin; v < end; v+=L1_CACHE_BYTES) v 80 arch/sh/mm/cache-sh2.c __raw_writel((v & CACHE_PHYSADDR_MASK), v 81 arch/sh/mm/cache-sh2.c CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); v 26 arch/sh/mm/cache-sh2a.c static void sh2a_flush_oc_line(unsigned long v, int way) v 28 arch/sh/mm/cache-sh2a.c unsigned long addr = (v & 0x000007f0) | (way << 11); v 32 arch/sh/mm/cache-sh2a.c if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { v 39 arch/sh/mm/cache-sh2a.c static void sh2a_invalidate_line(unsigned long cache_addr, unsigned long v) v 42 arch/sh/mm/cache-sh2a.c unsigned long addr = (v & 0x000007f0) | SH_CACHE_ASSOC; v 52 arch/sh/mm/cache-sh2a.c unsigned long v; v 70 arch/sh/mm/cache-sh2a.c for (v = begin; v < end; v += L1_CACHE_BYTES) { v 71 arch/sh/mm/cache-sh2a.c unsigned long data = __raw_readl(v); v 73 arch/sh/mm/cache-sh2a.c __raw_writel(data & ~SH_CACHE_UPDATED, v); v 78 arch/sh/mm/cache-sh2a.c for (v = begin; v < end; v += L1_CACHE_BYTES) v 79 arch/sh/mm/cache-sh2a.c sh2a_flush_oc_line(v, way); v 93 arch/sh/mm/cache-sh2a.c unsigned long v; v 104 arch/sh/mm/cache-sh2a.c for (v = begin; v < end; v+=L1_CACHE_BYTES) { v 109 arch/sh/mm/cache-sh2a.c sh2a_flush_oc_line(v, way); v 111 arch/sh/mm/cache-sh2a.c sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v); v 123 arch/sh/mm/cache-sh2a.c unsigned long v; v 139 arch/sh/mm/cache-sh2a.c for (v = begin; v < end; v += L1_CACHE_BYTES) v 140 arch/sh/mm/cache-sh2a.c sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v); v 154 arch/sh/mm/cache-sh2a.c unsigned long v; v 173 arch/sh/mm/cache-sh2a.c for (v = start; v < end; v += L1_CACHE_BYTES) v 174 arch/sh/mm/cache-sh2a.c sh2a_invalidate_line(CACHE_IC_ADDRESS_ARRAY, v); v 36 arch/sh/mm/cache-sh3.c unsigned long v, j; v 44 arch/sh/mm/cache-sh3.c for (v = begin; v < end; v+=L1_CACHE_BYTES) { v 49 arch/sh/mm/cache-sh3.c p = __pa(v); v 50 arch/sh/mm/cache-sh3.c addr = addrstart | (v & current_cpu_data.dcache.entry_mask); v 75 arch/sh/mm/cache-sh3.c unsigned long v; v 82 arch/sh/mm/cache-sh3.c for (v = begin; v < end; v+=L1_CACHE_BYTES) { v 85 arch/sh/mm/cache-sh3.c data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */ v 87 arch/sh/mm/cache-sh3.c (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC; v 44 arch/sh/mm/cache-sh4.c unsigned long flags, v; v 67 arch/sh/mm/cache-sh4.c for (v = start; v < end; v += L1_CACHE_BYTES) { v 71 arch/sh/mm/cache-sh4.c __ocbwb(v); v 73 arch/sh/mm/cache-sh4.c icacheaddr = CACHE_IC_ADDRESS_ARRAY | (v & v 49 arch/sh/mm/cache-sh7705.c int v = SH_CACHE_UPDATED | SH_CACHE_VALID; v 53 arch/sh/mm/cache-sh7705.c if ((data & v) == v) v 54 arch/sh/mm/cache-sh7705.c __raw_writel(data & ~v, addr); v 16 arch/sh/mm/flush-sh4.c reg_size_t aligned_start, v, cnt, end; v 19 arch/sh/mm/flush-sh4.c v = aligned_start & ~(L1_CACHE_BYTES-1); v 22 arch/sh/mm/flush-sh4.c cnt = (end - v) / L1_CACHE_BYTES; v 25 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 26 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 27 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 28 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 29 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 30 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 31 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 32 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 37 arch/sh/mm/flush-sh4.c __ocbwb(v); v += L1_CACHE_BYTES; v 50 arch/sh/mm/flush-sh4.c reg_size_t aligned_start, v, cnt, end; v 53 arch/sh/mm/flush-sh4.c v = aligned_start & ~(L1_CACHE_BYTES-1); v 56 arch/sh/mm/flush-sh4.c cnt = (end - v) / L1_CACHE_BYTES; v 59 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 60 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 61 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 62 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 63 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 64 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 65 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 66 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 70 arch/sh/mm/flush-sh4.c __ocbp(v); v += L1_CACHE_BYTES; v 80 arch/sh/mm/flush-sh4.c reg_size_t aligned_start, v, cnt, end; v 83 arch/sh/mm/flush-sh4.c v = aligned_start & ~(L1_CACHE_BYTES-1); v 86 arch/sh/mm/flush-sh4.c cnt = (end - v) / L1_CACHE_BYTES; v 89 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 90 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 91 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 92 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 93 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 94 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 95 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 96 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 101 arch/sh/mm/flush-sh4.c __ocbi(v); v += L1_CACHE_BYTES; v 35 arch/sparc/include/asm/atomic_32.h #define atomic_set_release(v, i) atomic_set((v), (i)) v 37 arch/sparc/include/asm/atomic_32.h #define atomic_read(v) READ_ONCE((v)->counter) v 39 arch/sparc/include/asm/atomic_32.h #define atomic_add(i, v) ((void)atomic_add_return( (int)(i), (v))) v 40 arch/sparc/include/asm/atomic_32.h #define atomic_sub(i, v) ((void)atomic_add_return(-(int)(i), (v))) v 42 arch/sparc/include/asm/atomic_32.h #define atomic_and(i, v) ((void)atomic_fetch_and((i), (v))) v 43 arch/sparc/include/asm/atomic_32.h #define atomic_or(i, v) ((void)atomic_fetch_or((i), (v))) v 44 arch/sparc/include/asm/atomic_32.h #define atomic_xor(i, v) ((void)atomic_fetch_xor((i), (v))) v 46 arch/sparc/include/asm/atomic_32.h #define atomic_sub_return(i, v) (atomic_add_return(-(int)(i), (v))) v 47 arch/sparc/include/asm/atomic_32.h #define atomic_fetch_sub(i, v) (atomic_fetch_add (-(int)(i), (v))) v 18 arch/sparc/include/asm/atomic_64.h #define atomic_read(v) READ_ONCE((v)->counter) v 19 arch/sparc/include/asm/atomic_64.h #define atomic64_read(v) READ_ONCE((v)->counter) v 21 arch/sparc/include/asm/atomic_64.h #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 22 arch/sparc/include/asm/atomic_64.h #define atomic64_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 53 arch/sparc/include/asm/atomic_64.h #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) v 55 arch/sparc/include/asm/atomic_64.h static inline int atomic_xchg(atomic_t *v, int new) v 57 arch/sparc/include/asm/atomic_64.h return xchg(&v->counter, new); v 60 arch/sparc/include/asm/atomic_64.h #define atomic64_cmpxchg(v, o, n) \ v 61 arch/sparc/include/asm/atomic_64.h ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) v 62 arch/sparc/include/asm/atomic_64.h #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) v 64 arch/sparc/include/asm/atomic_64.h s64 atomic64_dec_if_positive(atomic64_t *v); v 41 arch/sparc/include/asm/barrier_64.h #define __smp_store_release(p, v) \ v 45 arch/sparc/include/asm/barrier_64.h WRITE_ONCE(*p, v); \ v 82 arch/sparc/include/asm/leon.h #define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v))) v 84 arch/sparc/include/asm/leon.h #define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v)) v 117 arch/sparc/include/asm/pcic.h #define PCI_COUNTER_IRQ_SYS(v) (((v) >> 4) & 0xf) v 118 arch/sparc/include/asm/pcic.h #define PCI_COUNTER_IRQ_CPU(v) ((v) & 0xf) v 140 arch/sparc/include/asm/pgtable_32.h unsigned long v = pgd_val(pgd) & SRMMU_PTD_PMASK; v 141 arch/sparc/include/asm/pgtable_32.h return (unsigned long)__nocache_va(v << 4); v 37 arch/sparc/include/asm/vga.h static inline void scr_memsetw(u16 *p, u16 v, unsigned int n) v 41 arch/sparc/include/asm/vga.h memset16(p, cpu_to_le16(v), n / 2); v 422 arch/sparc/kernel/cpu.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 428 arch/sparc/kernel/cpu.c static void c_stop(struct seq_file *m, void *v) v 381 arch/sparc/kernel/ioport.c static int sparc_io_proc_show(struct seq_file *m, void *v) v 564 arch/sparc/kernel/ldc.c struct ldc_version *v = &ver_arr[i]; v 565 arch/sparc/kernel/ldc.c if (v->major <= major) { v 566 arch/sparc/kernel/ldc.c ret = v; v 2390 arch/sparc/kernel/ldc.c const u64 *v; v 2403 arch/sparc/kernel/ldc.c v = mdesc_get_property(hp, mp, "domaining-enabled", NULL); v 2404 arch/sparc/kernel/ldc.c if (!v) v 2416 arch/sparc/kernel/ldc.c if (!*v) { v 53 arch/sparc/kernel/led.c static int led_proc_show(struct seq_file *m, void *v) v 49 arch/sparc/kernel/leon_pci_grpci1.c #define REGSTORE(a, v) (__raw_writel(cpu_to_be32(v), &(a))) v 157 arch/sparc/kernel/leon_pci_grpci1.c u32 v; v 162 arch/sparc/kernel/leon_pci_grpci1.c ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); v 163 arch/sparc/kernel/leon_pci_grpci1.c *val = 0xffff & (v >> (8 * (where & 0x3))); v 170 arch/sparc/kernel/leon_pci_grpci1.c u32 v; v 173 arch/sparc/kernel/leon_pci_grpci1.c ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); v 174 arch/sparc/kernel/leon_pci_grpci1.c *val = 0xff & (v >> (8 * (where & 3))); v 210 arch/sparc/kernel/leon_pci_grpci1.c u32 v; v 214 arch/sparc/kernel/leon_pci_grpci1.c ret = grpci1_cfg_r32(priv, bus, devfn, where&~3, &v); v 217 arch/sparc/kernel/leon_pci_grpci1.c v = (v & ~(0xffff << (8 * (where & 0x3)))) | v 219 arch/sparc/kernel/leon_pci_grpci1.c return grpci1_cfg_w32(priv, bus, devfn, where & ~0x3, v); v 226 arch/sparc/kernel/leon_pci_grpci1.c u32 v; v 228 arch/sparc/kernel/leon_pci_grpci1.c ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); v 231 arch/sparc/kernel/leon_pci_grpci1.c v = (v & ~(0xff << (8 * (where & 0x3)))) | v 233 arch/sparc/kernel/leon_pci_grpci1.c return grpci1_cfg_w32(priv, bus, devfn, where & ~0x3, v); v 93 arch/sparc/kernel/leon_pci_grpci2.c #define REGSTORE(a, v) (__raw_writel(cpu_to_be32(v), &(a))) v 283 arch/sparc/kernel/leon_pci_grpci2.c u32 v; v 288 arch/sparc/kernel/leon_pci_grpci2.c ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); v 289 arch/sparc/kernel/leon_pci_grpci2.c *val = 0xffff & (v >> (8 * (where & 0x3))); v 296 arch/sparc/kernel/leon_pci_grpci2.c u32 v; v 299 arch/sparc/kernel/leon_pci_grpci2.c ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); v 300 arch/sparc/kernel/leon_pci_grpci2.c *val = 0xff & (v >> (8 * (where & 3))); v 347 arch/sparc/kernel/leon_pci_grpci2.c u32 v; v 351 arch/sparc/kernel/leon_pci_grpci2.c ret = grpci2_cfg_r32(priv, bus, devfn, where&~3, &v); v 354 arch/sparc/kernel/leon_pci_grpci2.c v = (v & ~(0xffff << (8 * (where & 0x3)))) | v 356 arch/sparc/kernel/leon_pci_grpci2.c return grpci2_cfg_w32(priv, bus, devfn, where & ~0x3, v); v 363 arch/sparc/kernel/leon_pci_grpci2.c u32 v; v 365 arch/sparc/kernel/leon_pci_grpci2.c ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); v 368 arch/sparc/kernel/leon_pci_grpci2.c v = (v & ~(0xff << (8 * (where & 0x3)))) | v 370 arch/sparc/kernel/leon_pci_grpci2.c return grpci2_cfg_w32(priv, bus, devfn, where & ~0x3, v); v 763 arch/sparc/kernel/mdesc.c const u64 *v; v 775 arch/sparc/kernel/mdesc.c v = mdesc_get_property(hp, pn, "hostid", NULL); v 776 arch/sparc/kernel/mdesc.c if (v) v 777 arch/sparc/kernel/mdesc.c printk("PLATFORM: hostid [%08llx]\n", *v); v 778 arch/sparc/kernel/mdesc.c v = mdesc_get_property(hp, pn, "serial#", NULL); v 779 arch/sparc/kernel/mdesc.c if (v) v 780 arch/sparc/kernel/mdesc.c printk("PLATFORM: serial# [%08llx]\n", *v); v 781 arch/sparc/kernel/mdesc.c v = mdesc_get_property(hp, pn, "stick-frequency", NULL); v 782 arch/sparc/kernel/mdesc.c printk("PLATFORM: stick-frequency [%08llx]\n", *v); v 783 arch/sparc/kernel/mdesc.c v = mdesc_get_property(hp, pn, "mac-address", NULL); v 784 arch/sparc/kernel/mdesc.c if (v) v 785 arch/sparc/kernel/mdesc.c printk("PLATFORM: mac-address [%llx]\n", *v); v 786 arch/sparc/kernel/mdesc.c v = mdesc_get_property(hp, pn, "watchdog-resolution", NULL); v 787 arch/sparc/kernel/mdesc.c if (v) v 788 arch/sparc/kernel/mdesc.c printk("PLATFORM: watchdog-resolution [%llu ms]\n", *v); v 789 arch/sparc/kernel/mdesc.c v = mdesc_get_property(hp, pn, "watchdog-max-timeout", NULL); v 790 arch/sparc/kernel/mdesc.c if (v) v 791 arch/sparc/kernel/mdesc.c printk("PLATFORM: watchdog-max-timeout [%llu ms]\n", *v); v 792 arch/sparc/kernel/mdesc.c v = mdesc_get_property(hp, pn, "max-cpus", NULL); v 793 arch/sparc/kernel/mdesc.c if (v) { v 794 arch/sparc/kernel/mdesc.c max_cpus = *v; v 802 arch/sparc/kernel/mdesc.c if (v) { v 803 arch/sparc/kernel/mdesc.c max_cpu = *v; v 96 arch/sparc/kernel/module.c Elf_Addr v; v 111 arch/sparc/kernel/module.c v = sym->st_value + rel[i].r_addend; v 115 arch/sparc/kernel/module.c v -= (Elf_Addr) location; v 116 arch/sparc/kernel/module.c *loc32 = v; v 120 arch/sparc/kernel/module.c location[0] = v >> 56; v 121 arch/sparc/kernel/module.c location[1] = v >> 48; v 122 arch/sparc/kernel/module.c location[2] = v >> 40; v 123 arch/sparc/kernel/module.c location[3] = v >> 32; v 124 arch/sparc/kernel/module.c location[4] = v >> 24; v 125 arch/sparc/kernel/module.c location[5] = v >> 16; v 126 arch/sparc/kernel/module.c location[6] = v >> 8; v 127 arch/sparc/kernel/module.c location[7] = v >> 0; v 131 arch/sparc/kernel/module.c v -= (Elf_Addr) location; v 133 arch/sparc/kernel/module.c ((v >> 2) & 0x7ffff); v 138 arch/sparc/kernel/module.c (((v & 0x3ff) + v 146 arch/sparc/kernel/module.c location[0] = v >> 24; v 147 arch/sparc/kernel/module.c location[1] = v >> 16; v 148 arch/sparc/kernel/module.c location[2] = v >> 8; v 149 arch/sparc/kernel/module.c location[3] = v >> 0; v 153 arch/sparc/kernel/module.c v -= (Elf_Addr) location; v 155 arch/sparc/kernel/module.c ((v >> 2) & 0x3fffffff); v 159 arch/sparc/kernel/module.c v -= (Elf_Addr) location; v 161 arch/sparc/kernel/module.c ((v >> 2) & 0x3fffff); v 165 arch/sparc/kernel/module.c *loc32 = (*loc32 & ~0x3ff) | (v & 0x3ff); v 170 arch/sparc/kernel/module.c ((v >> 10) & 0x3fffff); v 216 arch/sparc/kernel/pcic.c unsigned int v; v 221 arch/sparc/kernel/pcic.c pcic_read_config_dword(bus->number, devfn, where&~3, &v); v 222 arch/sparc/kernel/pcic.c *val = 0xff & (v >> (8*(where & 3))); v 226 arch/sparc/kernel/pcic.c pcic_read_config_dword(bus->number, devfn, where&~3, &v); v 227 arch/sparc/kernel/pcic.c *val = 0xffff & (v >> (8*(where & 3))); v 255 arch/sparc/kernel/pcic.c unsigned int v; v 260 arch/sparc/kernel/pcic.c pcic_read_config_dword(bus->number, devfn, where&~3, &v); v 261 arch/sparc/kernel/pcic.c v = (v & ~(0xff << (8*(where&3)))) | v 263 arch/sparc/kernel/pcic.c return pcic_write_config_dword(bus->number, devfn, where&~3, v); v 266 arch/sparc/kernel/pcic.c pcic_read_config_dword(bus->number, devfn, where&~3, &v); v 267 arch/sparc/kernel/pcic.c v = (v & ~(0xffff << (8*(where&3)))) | v 269 arch/sparc/kernel/pcic.c return pcic_write_config_dword(bus->number, devfn, where&~3, v); v 706 arch/sparc/kernel/pcic.c unsigned long v; v 723 arch/sparc/kernel/pcic.c v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ); v 724 arch/sparc/kernel/pcic.c timer_irq = PCI_COUNTER_IRQ_SYS(v); v 246 arch/sparc/kernel/viohs.c struct vio_version *v = &vio->ver_table[i]; v 247 arch/sparc/kernel/viohs.c if (v->major <= major) { v 248 arch/sparc/kernel/viohs.c ret = v; v 32 arch/sparc/lib/atomic32.c int atomic_fetch_##op(int i, atomic_t *v) \ v 36 arch/sparc/lib/atomic32.c spin_lock_irqsave(ATOMIC_HASH(v), flags); \ v 38 arch/sparc/lib/atomic32.c ret = v->counter; \ v 39 arch/sparc/lib/atomic32.c v->counter c_op i; \ v 41 arch/sparc/lib/atomic32.c spin_unlock_irqrestore(ATOMIC_HASH(v), flags); \ v 47 arch/sparc/lib/atomic32.c int atomic_##op##_return(int i, atomic_t *v) \ v 51 arch/sparc/lib/atomic32.c spin_lock_irqsave(ATOMIC_HASH(v), flags); \ v 53 arch/sparc/lib/atomic32.c ret = (v->counter c_op i); \ v 55 arch/sparc/lib/atomic32.c spin_unlock_irqrestore(ATOMIC_HASH(v), flags); \ v 70 arch/sparc/lib/atomic32.c int atomic_xchg(atomic_t *v, int new) v 75 arch/sparc/lib/atomic32.c spin_lock_irqsave(ATOMIC_HASH(v), flags); v 76 arch/sparc/lib/atomic32.c ret = v->counter; v 77 arch/sparc/lib/atomic32.c v->counter = new; v 78 arch/sparc/lib/atomic32.c spin_unlock_irqrestore(ATOMIC_HASH(v), flags); v 83 arch/sparc/lib/atomic32.c int atomic_cmpxchg(atomic_t *v, int old, int new) v 88 arch/sparc/lib/atomic32.c spin_lock_irqsave(ATOMIC_HASH(v), flags); v 89 arch/sparc/lib/atomic32.c ret = v->counter; v 91 arch/sparc/lib/atomic32.c v->counter = new; v 93 arch/sparc/lib/atomic32.c spin_unlock_irqrestore(ATOMIC_HASH(v), flags); v 98 arch/sparc/lib/atomic32.c int atomic_fetch_add_unless(atomic_t *v, int a, int u) v 103 arch/sparc/lib/atomic32.c spin_lock_irqsave(ATOMIC_HASH(v), flags); v 104 arch/sparc/lib/atomic32.c ret = v->counter; v 106 arch/sparc/lib/atomic32.c v->counter += a; v 107 arch/sparc/lib/atomic32.c spin_unlock_irqrestore(ATOMIC_HASH(v), flags); v 113 arch/sparc/lib/atomic32.c void atomic_set(atomic_t *v, int i) v 117 arch/sparc/lib/atomic32.c spin_lock_irqsave(ATOMIC_HASH(v), flags); v 118 arch/sparc/lib/atomic32.c v->counter = i; v 119 arch/sparc/lib/atomic32.c spin_unlock_irqrestore(ATOMIC_HASH(v), flags); v 28 arch/sparc/math-emu/sfp-util_32.h #define umul_ppmm(w1, w0, u, v) \ v 72 arch/sparc/math-emu/sfp-util_32.h "r" ((USItype)(v)) \ v 43 arch/sparc/math-emu/sfp-util_64.h #define umul_ppmm(wh, wl, u, v) \ v 72 arch/sparc/math-emu/sfp-util_64.h "r" ((UDItype)(v)) \ v 54 arch/sparc/mm/tsb.c unsigned long v; v 59 arch/sparc/mm/tsb.c for (v = start; v < end; v += PAGE_SIZE) { v 60 arch/sparc/mm/tsb.c unsigned long hash = tsb_hash(v, PAGE_SHIFT, v 64 arch/sparc/mm/tsb.c if (tag_compare(ent->tag, v)) v 69 arch/sparc/mm/tsb.c static void __flush_tsb_one_entry(unsigned long tsb, unsigned long v, v 75 arch/sparc/mm/tsb.c v &= ~0x1UL; v 76 arch/sparc/mm/tsb.c hash = tsb_hash(v, hash_shift, nentries); v 78 arch/sparc/mm/tsb.c tag = (v >> 22UL); v 93 arch/sparc/mm/tsb.c static void __flush_huge_tsb_one_entry(unsigned long tsb, unsigned long v, v 103 arch/sparc/mm/tsb.c __flush_tsb_one_entry(tsb, v + (i << hash_shift), hash_shift, v 128 arch/sparc/vdso/vclock_gettime.c u64 v; v 132 arch/sparc/vdso/vclock_gettime.c v = (cycles - vvar->clock.cycle_last) & vvar->clock.mask; v 133 arch/sparc/vdso/vclock_gettime.c return v * vvar->clock.mult; v 138 arch/sparc/vdso/vclock_gettime.c u64 v; v 142 arch/sparc/vdso/vclock_gettime.c v = (cycles - vvar->clock.cycle_last) & vvar->clock.mask; v 143 arch/sparc/vdso/vclock_gettime.c return v * vvar->clock.mult; v 204 arch/um/drivers/ubd_kern.c static int fake_ide_media_proc_show(struct seq_file *m, void *v) v 112 arch/um/include/asm/page.h #define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v))) v 21 arch/um/kernel/exitcode.c static int exitcode_proc_show(struct seq_file *m, void *v) v 131 arch/um/kernel/mem.c unsigned long v, vaddr = FIXADDR_USER_START; v 137 arch/um/kernel/mem.c v = (unsigned long) memblock_alloc_low(size, PAGE_SIZE); v 138 arch/um/kernel/mem.c if (!v) v 142 arch/um/kernel/mem.c memcpy((void *) v , (void *) FIXADDR_USER_START, size); v 143 arch/um/kernel/mem.c p = __pa(v); v 326 arch/um/kernel/process.c static int sysemu_proc_show(struct seq_file *m, void *v) v 62 arch/um/kernel/um_arch.c static int show_cpuinfo(struct seq_file *m, void *v) v 83 arch/um/kernel/um_arch.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 89 arch/um/kernel/um_arch.c static void c_stop(struct seq_file *m, void *v) v 231 arch/um/os-Linux/skas/process.c unsigned long v = STUB_CODE + v 238 arch/um/os-Linux/skas/process.c sa.sa_sigaction = (void *) v; v 17 arch/unicore32/include/mach/regs-ac97.h #define AC97_CODEC_REG(v) FIELD((v), 7, 16) v 18 arch/unicore32/include/mach/regs-ac97.h #define AC97_CODEC_VAL(v) FIELD((v), 16, 0) v 59 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_SIZE_BYTE(v) (FIELD((v), 12, 14) | \ v 61 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_SIZE_HWORD(v) (FIELD((v) >> 1, 12, 14) | \ v 63 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_SIZE_WORD(v) (FIELD((v) >> 2, 12, 14) | \ v 48 arch/unicore32/include/mach/regs-i2c.h #define I2C_DATACMD_DAT(v) FIELD((v), 8, 0) v 119 arch/unicore32/include/mach/regs-pm.h #define PM_DIVCFG_VGACLK(v) FIELD((v), 4, 20) v 77 arch/unicore32/include/mach/regs-sdc.h #define SDC_CCR_PDIV(v) FIELD((v), 8, 8) v 116 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_CMDINDEX(v) FIELD((v), 6, 5) v 121 arch/unicore32/include/mach/regs-sdc.h #define SDC_BLOCKSIZE_BSMASK(v) FIELD((v), 11, 0) v 125 arch/unicore32/include/mach/regs-sdc.h #define SDC_BLOCKCOUNT_BCMASK(v) FIELD((v), 12, 0) v 35 arch/unicore32/kernel/puv3-core.c unsigned long long v = cnt32_to_63(readl(OST_OSCR)); v 41 arch/unicore32/kernel/puv3-core.c v = ((v & 0x7fffffffffffffffULL) * 2235) >> 5; v 43 arch/unicore32/kernel/puv3-core.c return v; v 306 arch/unicore32/kernel/setup.c static int c_show(struct seq_file *m, void *v) v 339 arch/unicore32/kernel/setup.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 345 arch/unicore32/kernel/setup.c static void c_stop(struct seq_file *m, void *v) v 101 arch/unicore32/mm/alignment.c unsigned int err = 0, v, a = addr; \ v 103 arch/unicore32/mm/alignment.c get8_unaligned_check(v, a, err); \ v 104 arch/unicore32/mm/alignment.c val |= v << 8; \ v 111 arch/unicore32/mm/alignment.c unsigned int err = 0, v = val, a = addr; \ v 127 arch/unicore32/mm/alignment.c : "=r" (err), "=&r" (v), "=&r" (a) \ v 128 arch/unicore32/mm/alignment.c : "0" (err), "1" (v), "2" (a)); \ v 135 arch/unicore32/mm/alignment.c unsigned int err = 0, v = val, a = addr; \ v 157 arch/unicore32/mm/alignment.c : "=r" (err), "=&r" (v), "=&r" (a) \ v 158 arch/unicore32/mm/alignment.c : "0" (err), "1" (v), "2" (a)); \ v 165 arch/unicore32/mm/alignment.c unsigned int err = 0, v, a = addr; \ v 167 arch/unicore32/mm/alignment.c get8_unaligned_check(v, a, err); \ v 168 arch/unicore32/mm/alignment.c val |= v << 8; \ v 169 arch/unicore32/mm/alignment.c get8_unaligned_check(v, a, err); \ v 170 arch/unicore32/mm/alignment.c val |= v << 16; \ v 171 arch/unicore32/mm/alignment.c get8_unaligned_check(v, a, err); \ v 172 arch/unicore32/mm/alignment.c val |= v << 24; \ v 182 arch/unicore32/mm/alignment.c unsigned int err = 0, v, a = addr; \ v 184 arch/unicore32/mm/alignment.c get8t_unaligned_check(v, a, err); \ v 185 arch/unicore32/mm/alignment.c val |= v << 8; \ v 186 arch/unicore32/mm/alignment.c get8t_unaligned_check(v, a, err); \ v 187 arch/unicore32/mm/alignment.c val |= v << 16; \ v 188 arch/unicore32/mm/alignment.c get8t_unaligned_check(v, a, err); \ v 189 arch/unicore32/mm/alignment.c val |= v << 24; \ v 27 arch/x86/boot/bitops.h bool v; v 30 arch/x86/boot/bitops.h asm("btl %2,%1" CC_SET(c) : CC_OUT(c) (v) : "m" (*p), "Ir" (nr)); v 31 arch/x86/boot/bitops.h return v; v 39 arch/x86/boot/boot.h static inline void outb(u8 v, u16 port) v 41 arch/x86/boot/boot.h asm volatile("outb %0,%1" : : "a" (v), "dN" (port)); v 45 arch/x86/boot/boot.h u8 v; v 46 arch/x86/boot/boot.h asm volatile("inb %1,%0" : "=a" (v) : "dN" (port)); v 47 arch/x86/boot/boot.h return v; v 50 arch/x86/boot/boot.h static inline void outw(u16 v, u16 port) v 52 arch/x86/boot/boot.h asm volatile("outw %0,%1" : : "a" (v), "dN" (port)); v 56 arch/x86/boot/boot.h u16 v; v 57 arch/x86/boot/boot.h asm volatile("inw %1,%0" : "=a" (v) : "dN" (port)); v 58 arch/x86/boot/boot.h return v; v 61 arch/x86/boot/boot.h static inline void outl(u32 v, u16 port) v 63 arch/x86/boot/boot.h asm volatile("outl %0,%1" : : "a" (v), "dN" (port)); v 67 arch/x86/boot/boot.h u32 v; v 68 arch/x86/boot/boot.h asm volatile("inl %1,%0" : "=a" (v) : "dN" (port)); v 69 arch/x86/boot/boot.h return v; v 113 arch/x86/boot/boot.h u8 v; v 114 arch/x86/boot/boot.h asm volatile("movb %%fs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr)); v 115 arch/x86/boot/boot.h return v; v 119 arch/x86/boot/boot.h u16 v; v 120 arch/x86/boot/boot.h asm volatile("movw %%fs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr)); v 121 arch/x86/boot/boot.h return v; v 125 arch/x86/boot/boot.h u32 v; v 126 arch/x86/boot/boot.h asm volatile("movl %%fs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr)); v 127 arch/x86/boot/boot.h return v; v 130 arch/x86/boot/boot.h static inline void wrfs8(u8 v, addr_t addr) v 132 arch/x86/boot/boot.h asm volatile("movb %1,%%fs:%0" : "+m" (*(u8 *)addr) : "qi" (v)); v 134 arch/x86/boot/boot.h static inline void wrfs16(u16 v, addr_t addr) v 136 arch/x86/boot/boot.h asm volatile("movw %1,%%fs:%0" : "+m" (*(u16 *)addr) : "ri" (v)); v 138 arch/x86/boot/boot.h static inline void wrfs32(u32 v, addr_t addr) v 140 arch/x86/boot/boot.h asm volatile("movl %1,%%fs:%0" : "+m" (*(u32 *)addr) : "ri" (v)); v 145 arch/x86/boot/boot.h u8 v; v 146 arch/x86/boot/boot.h asm volatile("movb %%gs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr)); v 147 arch/x86/boot/boot.h return v; v 151 arch/x86/boot/boot.h u16 v; v 152 arch/x86/boot/boot.h asm volatile("movw %%gs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr)); v 153 arch/x86/boot/boot.h return v; v 157 arch/x86/boot/boot.h u32 v; v 158 arch/x86/boot/boot.h asm volatile("movl %%gs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr)); v 159 arch/x86/boot/boot.h return v; v 162 arch/x86/boot/boot.h static inline void wrgs8(u8 v, addr_t addr) v 164 arch/x86/boot/boot.h asm volatile("movb %1,%%gs:%0" : "+m" (*(u8 *)addr) : "qi" (v)); v 166 arch/x86/boot/boot.h static inline void wrgs16(u16 v, addr_t addr) v 168 arch/x86/boot/boot.h asm volatile("movw %1,%%gs:%0" : "+m" (*(u16 *)addr) : "ri" (v)); v 170 arch/x86/boot/boot.h static inline void wrgs32(u32 v, addr_t addr) v 172 arch/x86/boot/boot.h asm volatile("movl %1,%%gs:%0" : "+m" (*(u32 *)addr) : "ri" (v)); v 103 arch/x86/boot/video.c unsigned int v; v 127 arch/x86/boot/video.c v = 0; v 129 arch/x86/boot/video.c v <<= 4; v 131 arch/x86/boot/video.c v += (key > '9') ? key-'a'+10 : key-'0'; v 134 arch/x86/boot/video.c return v; v 103 arch/x86/boot/video.h static inline void out_idx(u8 v, u16 port, u8 index) v 105 arch/x86/boot/video.h outw(index+(v << 8), port); v 109 arch/x86/boot/video.h static inline u8 tst_idx(u8 v, u16 port, u8 index) v 111 arch/x86/boot/video.h out_idx(port, index, v); v 760 arch/x86/events/intel/lbr.c u64 mask = 0, v; v 767 arch/x86/events/intel/lbr.c v = x86_pmu.lbr_sel_map[i]; v 768 arch/x86/events/intel/lbr.c if (v == LBR_NOT_SUPP) v 771 arch/x86/events/intel/lbr.c if (v != LBR_IGN) v 772 arch/x86/events/intel/lbr.c mask |= v; v 751 arch/x86/events/intel/p4.c unsigned int v, emask; v 754 arch/x86/events/intel/p4.c v = p4_config_unpack_event(event->attr.config); v 755 arch/x86/events/intel/p4.c if (v >= ARRAY_SIZE(p4_event_bind_map)) v 759 arch/x86/events/intel/p4.c if (!p4_event_match_cpu_model(v)) v 778 arch/x86/events/intel/p4.c if (p4_ht_active() && p4_event_bind_map[v].shared) { v 785 arch/x86/events/intel/p4.c if (emask & ~p4_event_bind_map[v].escr_emask) v 794 arch/x86/events/intel/p4.c v = p4_config_unpack_metric(event->attr.config); v 795 arch/x86/events/intel/p4.c if (v >= ARRAY_SIZE(p4_pebs_bind_map)) v 857 arch/x86/events/intel/p4.c u64 v; v 860 arch/x86/events/intel/p4.c rdmsrl(hwc->config_base, v); v 861 arch/x86/events/intel/p4.c if (v & P4_CCCR_OVF) { v 862 arch/x86/events/intel/p4.c wrmsrl(hwc->config_base, v & ~P4_CCCR_OVF); v 873 arch/x86/events/intel/p4.c rdmsrl(hwc->event_base, v); v 874 arch/x86/events/intel/p4.c if (!(v & ARCH_P4_UNFLAGGED_BIT)) v 107 arch/x86/events/intel/rapl.c #define RAPL_EVENT_ATTR_STR(_name, v, str) \ v 108 arch/x86/events/intel/rapl.c static struct perf_pmu_events_attr event_attr_##v = { \ v 161 arch/x86/events/intel/rapl.c static inline u64 rapl_scale(u64 v, int cfg) v 165 arch/x86/events/intel/rapl.c return v; v 173 arch/x86/events/intel/rapl.c return v << (32 - rapl_hw_unit[cfg - 1]); v 751 arch/x86/events/perf_event.h #define EVENT_ATTR_STR(_name, v, str) \ v 752 arch/x86/events/perf_event.h static struct perf_pmu_events_attr event_attr_##v = { \ v 758 arch/x86/events/perf_event.h #define EVENT_ATTR_STR_HT(_name, v, noht, ht) \ v 759 arch/x86/events/perf_event.h static struct perf_pmu_events_ht_attr event_attr_##v = { \ v 42 arch/x86/ia32/ia32_signal.c #define loadsegment_gs(v) load_gs_index(v) v 43 arch/x86/ia32/ia32_signal.c #define loadsegment_fs(v) loadsegment(fs, v) v 44 arch/x86/ia32/ia32_signal.c #define loadsegment_ds(v) loadsegment(ds, v) v 45 arch/x86/ia32/ia32_signal.c #define loadsegment_es(v) loadsegment(es, v) v 47 arch/x86/ia32/ia32_signal.c #define get_user_seg(seg) ({ unsigned int v; savesegment(seg, v); v; }) v 48 arch/x86/ia32/ia32_signal.c #define set_user_seg(seg, v) loadsegment_##seg(v) v 36 arch/x86/include/asm/apic.h #define apic_printk(v, s, a...) do { \ v 37 arch/x86/include/asm/apic.h if ((v) <= apic_verbosity) \ v 103 arch/x86/include/asm/apic.h static inline void native_apic_mem_write(u32 reg, u32 v) v 108 arch/x86/include/asm/apic.h ASM_OUTPUT2("=r" (v), "=m" (*addr)), v 109 arch/x86/include/asm/apic.h ASM_OUTPUT2("0" (v), "m" (*addr))); v 210 arch/x86/include/asm/apic.h static inline void native_apic_msr_write(u32 reg, u32 v) v 216 arch/x86/include/asm/apic.h wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); v 219 arch/x86/include/asm/apic.h static inline void native_apic_msr_eoi_write(u32 reg, u32 v) v 292 arch/x86/include/asm/apic.h void (*eoi_write)(u32 reg, u32 v); v 293 arch/x86/include/asm/apic.h void (*native_eoi_write)(u32 reg, u32 v); v 294 arch/x86/include/asm/apic.h void (*write)(u32 reg, u32 v); v 431 arch/x86/include/asm/apic.h extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); v 442 arch/x86/include/asm/apic.h static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} v 30 arch/x86/include/asm/archrandom.h static inline bool rdrand_long(unsigned long *v) v 37 arch/x86/include/asm/archrandom.h : CC_OUT(c) (ok), "=a" (*v)); v 44 arch/x86/include/asm/archrandom.h static inline bool rdrand_int(unsigned int *v) v 51 arch/x86/include/asm/archrandom.h : CC_OUT(c) (ok), "=a" (*v)); v 58 arch/x86/include/asm/archrandom.h static inline bool rdseed_long(unsigned long *v) v 63 arch/x86/include/asm/archrandom.h : CC_OUT(c) (ok), "=a" (*v)); v 67 arch/x86/include/asm/archrandom.h static inline bool rdseed_int(unsigned int *v) v 72 arch/x86/include/asm/archrandom.h : CC_OUT(c) (ok), "=a" (*v)); v 87 arch/x86/include/asm/archrandom.h static inline bool arch_get_random_long(unsigned long *v) v 89 arch/x86/include/asm/archrandom.h return arch_has_random() ? rdrand_long(v) : false; v 92 arch/x86/include/asm/archrandom.h static inline bool arch_get_random_int(unsigned int *v) v 94 arch/x86/include/asm/archrandom.h return arch_has_random() ? rdrand_int(v) : false; v 97 arch/x86/include/asm/archrandom.h static inline bool arch_get_random_seed_long(unsigned long *v) v 99 arch/x86/include/asm/archrandom.h return arch_has_random_seed() ? rdseed_long(v) : false; v 102 arch/x86/include/asm/archrandom.h static inline bool arch_get_random_seed_int(unsigned int *v) v 104 arch/x86/include/asm/archrandom.h return arch_has_random_seed() ? rdseed_int(v) : false; v 25 arch/x86/include/asm/atomic.h static __always_inline int arch_atomic_read(const atomic_t *v) v 31 arch/x86/include/asm/atomic.h return READ_ONCE((v)->counter); v 41 arch/x86/include/asm/atomic.h static __always_inline void arch_atomic_set(atomic_t *v, int i) v 43 arch/x86/include/asm/atomic.h WRITE_ONCE(v->counter, i); v 53 arch/x86/include/asm/atomic.h static __always_inline void arch_atomic_add(int i, atomic_t *v) v 56 arch/x86/include/asm/atomic.h : "+m" (v->counter) v 67 arch/x86/include/asm/atomic.h static __always_inline void arch_atomic_sub(int i, atomic_t *v) v 70 arch/x86/include/asm/atomic.h : "+m" (v->counter) v 83 arch/x86/include/asm/atomic.h static __always_inline bool arch_atomic_sub_and_test(int i, atomic_t *v) v 85 arch/x86/include/asm/atomic.h return GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, e, "er", i); v 95 arch/x86/include/asm/atomic.h static __always_inline void arch_atomic_inc(atomic_t *v) v 98 arch/x86/include/asm/atomic.h : "+m" (v->counter) :: "memory"); v 108 arch/x86/include/asm/atomic.h static __always_inline void arch_atomic_dec(atomic_t *v) v 111 arch/x86/include/asm/atomic.h : "+m" (v->counter) :: "memory"); v 123 arch/x86/include/asm/atomic.h static __always_inline bool arch_atomic_dec_and_test(atomic_t *v) v 125 arch/x86/include/asm/atomic.h return GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, e); v 137 arch/x86/include/asm/atomic.h static __always_inline bool arch_atomic_inc_and_test(atomic_t *v) v 139 arch/x86/include/asm/atomic.h return GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v->counter, e); v 152 arch/x86/include/asm/atomic.h static __always_inline bool arch_atomic_add_negative(int i, atomic_t *v) v 154 arch/x86/include/asm/atomic.h return GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, s, "er", i); v 165 arch/x86/include/asm/atomic.h static __always_inline int arch_atomic_add_return(int i, atomic_t *v) v 167 arch/x86/include/asm/atomic.h return i + xadd(&v->counter, i); v 177 arch/x86/include/asm/atomic.h static __always_inline int arch_atomic_sub_return(int i, atomic_t *v) v 179 arch/x86/include/asm/atomic.h return arch_atomic_add_return(-i, v); v 182 arch/x86/include/asm/atomic.h static __always_inline int arch_atomic_fetch_add(int i, atomic_t *v) v 184 arch/x86/include/asm/atomic.h return xadd(&v->counter, i); v 187 arch/x86/include/asm/atomic.h static __always_inline int arch_atomic_fetch_sub(int i, atomic_t *v) v 189 arch/x86/include/asm/atomic.h return xadd(&v->counter, -i); v 192 arch/x86/include/asm/atomic.h static __always_inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new) v 194 arch/x86/include/asm/atomic.h return arch_cmpxchg(&v->counter, old, new); v 198 arch/x86/include/asm/atomic.h static __always_inline bool arch_atomic_try_cmpxchg(atomic_t *v, int *old, int new) v 200 arch/x86/include/asm/atomic.h return try_cmpxchg(&v->counter, old, new); v 203 arch/x86/include/asm/atomic.h static inline int arch_atomic_xchg(atomic_t *v, int new) v 205 arch/x86/include/asm/atomic.h return arch_xchg(&v->counter, new); v 208 arch/x86/include/asm/atomic.h static inline void arch_atomic_and(int i, atomic_t *v) v 211 arch/x86/include/asm/atomic.h : "+m" (v->counter) v 216 arch/x86/include/asm/atomic.h static inline int arch_atomic_fetch_and(int i, atomic_t *v) v 218 arch/x86/include/asm/atomic.h int val = arch_atomic_read(v); v 220 arch/x86/include/asm/atomic.h do { } while (!arch_atomic_try_cmpxchg(v, &val, val & i)); v 225 arch/x86/include/asm/atomic.h static inline void arch_atomic_or(int i, atomic_t *v) v 228 arch/x86/include/asm/atomic.h : "+m" (v->counter) v 233 arch/x86/include/asm/atomic.h static inline int arch_atomic_fetch_or(int i, atomic_t *v) v 235 arch/x86/include/asm/atomic.h int val = arch_atomic_read(v); v 237 arch/x86/include/asm/atomic.h do { } while (!arch_atomic_try_cmpxchg(v, &val, val | i)); v 242 arch/x86/include/asm/atomic.h static inline void arch_atomic_xor(int i, atomic_t *v) v 245 arch/x86/include/asm/atomic.h : "+m" (v->counter) v 250 arch/x86/include/asm/atomic.h static inline int arch_atomic_fetch_xor(int i, atomic_t *v) v 252 arch/x86/include/asm/atomic.h int val = arch_atomic_read(v); v 254 arch/x86/include/asm/atomic.h do { } while (!arch_atomic_try_cmpxchg(v, &val, val ^ i)); v 74 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n) v 76 arch/x86/include/asm/atomic64_32.h return arch_cmpxchg64(&v->counter, o, n); v 87 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_xchg(atomic64_t *v, s64 n) v 93 arch/x86/include/asm/atomic64_32.h "S" (v), "b" (low), "c" (high) v 105 arch/x86/include/asm/atomic64_32.h static inline void arch_atomic64_set(atomic64_t *v, s64 i) v 110 arch/x86/include/asm/atomic64_32.h "S" (v), "b" (low), "c" (high) v 120 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_read(const atomic64_t *v) v 123 arch/x86/include/asm/atomic64_32.h alternative_atomic64(read, "=&A" (r), "c" (v) : "memory"); v 134 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v) v 137 arch/x86/include/asm/atomic64_32.h ASM_OUTPUT2("+A" (i), "+c" (v)), v 145 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v) v 148 arch/x86/include/asm/atomic64_32.h ASM_OUTPUT2("+A" (i), "+c" (v)), v 153 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_inc_return(atomic64_t *v) v 157 arch/x86/include/asm/atomic64_32.h "S" (v) : "memory", "ecx"); v 162 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_dec_return(atomic64_t *v) v 166 arch/x86/include/asm/atomic64_32.h "S" (v) : "memory", "ecx"); v 178 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_add(s64 i, atomic64_t *v) v 181 arch/x86/include/asm/atomic64_32.h ASM_OUTPUT2("+A" (i), "+c" (v)), v 193 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_sub(s64 i, atomic64_t *v) v 196 arch/x86/include/asm/atomic64_32.h ASM_OUTPUT2("+A" (i), "+c" (v)), v 207 arch/x86/include/asm/atomic64_32.h static inline void arch_atomic64_inc(atomic64_t *v) v 210 arch/x86/include/asm/atomic64_32.h "S" (v) : "memory", "eax", "ecx", "edx"); v 220 arch/x86/include/asm/atomic64_32.h static inline void arch_atomic64_dec(atomic64_t *v) v 223 arch/x86/include/asm/atomic64_32.h "S" (v) : "memory", "eax", "ecx", "edx"); v 236 arch/x86/include/asm/atomic64_32.h static inline int arch_atomic64_add_unless(atomic64_t *v, s64 a, s64 u) v 242 arch/x86/include/asm/atomic64_32.h "S" (v) : "memory"); v 246 arch/x86/include/asm/atomic64_32.h static inline int arch_atomic64_inc_not_zero(atomic64_t *v) v 250 arch/x86/include/asm/atomic64_32.h "S" (v) : "ecx", "edx", "memory"); v 255 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_dec_if_positive(atomic64_t *v) v 259 arch/x86/include/asm/atomic64_32.h "S" (v) : "ecx", "memory"); v 267 arch/x86/include/asm/atomic64_32.h static inline void arch_atomic64_and(s64 i, atomic64_t *v) v 271 arch/x86/include/asm/atomic64_32.h while ((old = arch_atomic64_cmpxchg(v, c, c & i)) != c) v 275 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v) v 279 arch/x86/include/asm/atomic64_32.h while ((old = arch_atomic64_cmpxchg(v, c, c & i)) != c) v 285 arch/x86/include/asm/atomic64_32.h static inline void arch_atomic64_or(s64 i, atomic64_t *v) v 289 arch/x86/include/asm/atomic64_32.h while ((old = arch_atomic64_cmpxchg(v, c, c | i)) != c) v 293 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v) v 297 arch/x86/include/asm/atomic64_32.h while ((old = arch_atomic64_cmpxchg(v, c, c | i)) != c) v 303 arch/x86/include/asm/atomic64_32.h static inline void arch_atomic64_xor(s64 i, atomic64_t *v) v 307 arch/x86/include/asm/atomic64_32.h while ((old = arch_atomic64_cmpxchg(v, c, c ^ i)) != c) v 311 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v) v 315 arch/x86/include/asm/atomic64_32.h while ((old = arch_atomic64_cmpxchg(v, c, c ^ i)) != c) v 321 arch/x86/include/asm/atomic64_32.h static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v) v 325 arch/x86/include/asm/atomic64_32.h while ((old = arch_atomic64_cmpxchg(v, c, c + i)) != c) v 331 arch/x86/include/asm/atomic64_32.h #define arch_atomic64_fetch_sub(i, v) arch_atomic64_fetch_add(-(i), (v)) v 20 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_read(const atomic64_t *v) v 22 arch/x86/include/asm/atomic64_64.h return READ_ONCE((v)->counter); v 32 arch/x86/include/asm/atomic64_64.h static inline void arch_atomic64_set(atomic64_t *v, s64 i) v 34 arch/x86/include/asm/atomic64_64.h WRITE_ONCE(v->counter, i); v 44 arch/x86/include/asm/atomic64_64.h static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v) v 47 arch/x86/include/asm/atomic64_64.h : "=m" (v->counter) v 48 arch/x86/include/asm/atomic64_64.h : "er" (i), "m" (v->counter) : "memory"); v 58 arch/x86/include/asm/atomic64_64.h static inline void arch_atomic64_sub(s64 i, atomic64_t *v) v 61 arch/x86/include/asm/atomic64_64.h : "=m" (v->counter) v 62 arch/x86/include/asm/atomic64_64.h : "er" (i), "m" (v->counter) : "memory"); v 74 arch/x86/include/asm/atomic64_64.h static inline bool arch_atomic64_sub_and_test(s64 i, atomic64_t *v) v 76 arch/x86/include/asm/atomic64_64.h return GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, e, "er", i); v 86 arch/x86/include/asm/atomic64_64.h static __always_inline void arch_atomic64_inc(atomic64_t *v) v 89 arch/x86/include/asm/atomic64_64.h : "=m" (v->counter) v 90 arch/x86/include/asm/atomic64_64.h : "m" (v->counter) : "memory"); v 100 arch/x86/include/asm/atomic64_64.h static __always_inline void arch_atomic64_dec(atomic64_t *v) v 103 arch/x86/include/asm/atomic64_64.h : "=m" (v->counter) v 104 arch/x86/include/asm/atomic64_64.h : "m" (v->counter) : "memory"); v 116 arch/x86/include/asm/atomic64_64.h static inline bool arch_atomic64_dec_and_test(atomic64_t *v) v 118 arch/x86/include/asm/atomic64_64.h return GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, e); v 130 arch/x86/include/asm/atomic64_64.h static inline bool arch_atomic64_inc_and_test(atomic64_t *v) v 132 arch/x86/include/asm/atomic64_64.h return GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, e); v 145 arch/x86/include/asm/atomic64_64.h static inline bool arch_atomic64_add_negative(s64 i, atomic64_t *v) v 147 arch/x86/include/asm/atomic64_64.h return GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, s, "er", i); v 158 arch/x86/include/asm/atomic64_64.h static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v) v 160 arch/x86/include/asm/atomic64_64.h return i + xadd(&v->counter, i); v 163 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v) v 165 arch/x86/include/asm/atomic64_64.h return arch_atomic64_add_return(-i, v); v 168 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v) v 170 arch/x86/include/asm/atomic64_64.h return xadd(&v->counter, i); v 173 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_fetch_sub(s64 i, atomic64_t *v) v 175 arch/x86/include/asm/atomic64_64.h return xadd(&v->counter, -i); v 178 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new) v 180 arch/x86/include/asm/atomic64_64.h return arch_cmpxchg(&v->counter, old, new); v 184 arch/x86/include/asm/atomic64_64.h static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new) v 186 arch/x86/include/asm/atomic64_64.h return try_cmpxchg(&v->counter, old, new); v 189 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_xchg(atomic64_t *v, s64 new) v 191 arch/x86/include/asm/atomic64_64.h return arch_xchg(&v->counter, new); v 194 arch/x86/include/asm/atomic64_64.h static inline void arch_atomic64_and(s64 i, atomic64_t *v) v 197 arch/x86/include/asm/atomic64_64.h : "+m" (v->counter) v 202 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v) v 204 arch/x86/include/asm/atomic64_64.h s64 val = arch_atomic64_read(v); v 207 arch/x86/include/asm/atomic64_64.h } while (!arch_atomic64_try_cmpxchg(v, &val, val & i)); v 211 arch/x86/include/asm/atomic64_64.h static inline void arch_atomic64_or(s64 i, atomic64_t *v) v 214 arch/x86/include/asm/atomic64_64.h : "+m" (v->counter) v 219 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v) v 221 arch/x86/include/asm/atomic64_64.h s64 val = arch_atomic64_read(v); v 224 arch/x86/include/asm/atomic64_64.h } while (!arch_atomic64_try_cmpxchg(v, &val, val | i)); v 228 arch/x86/include/asm/atomic64_64.h static inline void arch_atomic64_xor(s64 i, atomic64_t *v) v 231 arch/x86/include/asm/atomic64_64.h : "+m" (v->counter) v 236 arch/x86/include/asm/atomic64_64.h static inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v) v 238 arch/x86/include/asm/atomic64_64.h s64 val = arch_atomic64_read(v); v 241 arch/x86/include/asm/atomic64_64.h } while (!arch_atomic64_try_cmpxchg(v, &val, val ^ i)); v 66 arch/x86/include/asm/barrier.h #define __smp_store_release(p, v) \ v 70 arch/x86/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 78 arch/x86/include/asm/cmpxchg.h #define arch_xchg(ptr, v) __xchg_op((ptr), (v), xchg, "") v 208 arch/x86/include/asm/elf.h unsigned v; \ v 232 arch/x86/include/asm/elf.h asm("movl %%ds,%0" : "=r" (v)); (pr_reg)[23] = v; \ v 233 arch/x86/include/asm/elf.h asm("movl %%es,%0" : "=r" (v)); (pr_reg)[24] = v; \ v 234 arch/x86/include/asm/elf.h asm("movl %%fs,%0" : "=r" (v)); (pr_reg)[25] = v; \ v 235 arch/x86/include/asm/elf.h asm("movl %%gs,%0" : "=r" (v)); (pr_reg)[26] = v; \ v 74 arch/x86/include/asm/intel_scu_ipc.h static inline int intel_scu_notifier_post(unsigned long v, void *p) v 76 arch/x86/include/asm/intel_scu_ipc.h return blocking_notifier_call_chain(&intel_scu_notifier, v, p); v 86 arch/x86/include/asm/io.h #define writeb_relaxed(v, a) __writeb(v, a) v 87 arch/x86/include/asm/io.h #define writew_relaxed(v, a) __writew(v, a) v 88 arch/x86/include/asm/io.h #define writel_relaxed(v, a) __writel(v, a) v 101 arch/x86/include/asm/io.h #define writeq_relaxed(v, a) __writeq(v, a) v 243 arch/x86/include/asm/iosf_mbi.h int iosf_mbi_call_pmic_bus_access_notifier_chain(unsigned long val, void *v) v 1560 arch/x86/include/asm/kvm_host.h int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); v 1563 arch/x86/include/asm/kvm_host.h int kvm_cpu_get_interrupt(struct kvm_vcpu *v); v 15 arch/x86/include/asm/msidef.h #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \ v 40 arch/x86/include/asm/perf_event_p4.h #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) v 41 arch/x86/include/asm/perf_event_p4.h #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) v 42 arch/x86/include/asm/perf_event_p4.h #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) v 62 arch/x86/include/asm/perf_event_p4.h #define P4_CCCR_THRESHOLD(v) ((v) << P4_CCCR_THRESHOLD_SHIFT) v 63 arch/x86/include/asm/perf_event_p4.h #define P4_CCCR_ESEL(v) ((v) << P4_CCCR_ESCR_SELECT_SHIFT) v 81 arch/x86/include/asm/perf_event_p4.h #define p4_config_pack_escr(v) (((u64)(v)) << 32) v 82 arch/x86/include/asm/perf_event_p4.h #define p4_config_pack_cccr(v) (((u64)(v)) & 0xffffffffULL) v 83 arch/x86/include/asm/perf_event_p4.h #define p4_config_unpack_escr(v) (((u64)(v)) >> 32) v 84 arch/x86/include/asm/perf_event_p4.h #define p4_config_unpack_cccr(v) (((u64)(v)) & 0xffffffffULL) v 86 arch/x86/include/asm/perf_event_p4.h #define p4_config_unpack_emask(v) \ v 88 arch/x86/include/asm/perf_event_p4.h u32 t = p4_config_unpack_escr((v)); \ v 94 arch/x86/include/asm/perf_event_p4.h #define p4_config_unpack_event(v) \ v 96 arch/x86/include/asm/perf_event_p4.h u32 t = p4_config_unpack_escr((v)); \ v 800 arch/x86/include/asm/perf_event_p4.h #define p4_config_unpack_metric(v) (((u64)(v)) & P4_PEBS_CONFIG_METRIC_MASK) v 801 arch/x86/include/asm/perf_event_p4.h #define p4_config_unpack_pebs(v) (((u64)(v)) & P4_PEBS_CONFIG_MASK) v 803 arch/x86/include/asm/perf_event_p4.h #define p4_config_pebs_has(v, mask) (p4_config_unpack_pebs(v) & (mask)) v 302 arch/x86/include/asm/pgtable.h pteval_t v = native_pte_val(pte); v 304 arch/x86/include/asm/pgtable.h return native_make_pte(v | set); v 309 arch/x86/include/asm/pgtable.h pteval_t v = native_pte_val(pte); v 311 arch/x86/include/asm/pgtable.h return native_make_pte(v & ~clear); v 381 arch/x86/include/asm/pgtable.h pmdval_t v = native_pmd_val(pmd); v 383 arch/x86/include/asm/pgtable.h return native_make_pmd(v | set); v 388 arch/x86/include/asm/pgtable.h pmdval_t v = native_pmd_val(pmd); v 390 arch/x86/include/asm/pgtable.h return native_make_pmd(v & ~clear); v 435 arch/x86/include/asm/pgtable.h pudval_t v = native_pud_val(pud); v 437 arch/x86/include/asm/pgtable.h return native_make_pud(v | set); v 442 arch/x86/include/asm/pgtable.h pudval_t v = native_pud_val(pud); v 444 arch/x86/include/asm/pgtable.h return native_make_pud(v & ~clear); v 248 arch/x86/include/asm/pgtable_64.h #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK) v 375 arch/x86/include/asm/segment.h # define get_user_gs(regs) (u16)({ unsigned long v; savesegment(gs, v); v; }) v 376 arch/x86/include/asm/segment.h # define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v)) v 378 arch/x86/include/asm/segment.h # define lazy_save_gs(v) savesegment(gs, (v)) v 379 arch/x86/include/asm/segment.h # define lazy_load_gs(v) loadsegment(gs, (v)) v 382 arch/x86/include/asm/segment.h # define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0) v 384 arch/x86/include/asm/segment.h # define lazy_save_gs(v) do { } while (0) v 385 arch/x86/include/asm/segment.h # define lazy_load_gs(v) do { } while (0) v 232 arch/x86/include/asm/string_32.h static inline void *memset16(uint16_t *s, uint16_t v, size_t n) v 238 arch/x86/include/asm/string_32.h : "a" (v), "1" (s), "0" (n) v 244 arch/x86/include/asm/string_32.h static inline void *memset32(uint32_t *s, uint32_t v, size_t n) v 250 arch/x86/include/asm/string_32.h : "a" (v), "1" (s), "0" (n) v 22 arch/x86/include/asm/string_64.h static inline void *memset16(uint16_t *s, uint16_t v, size_t n) v 28 arch/x86/include/asm/string_64.h : "a" (v), "1" (s), "0" (n) v 34 arch/x86/include/asm/string_64.h static inline void *memset32(uint32_t *s, uint32_t v, size_t n) v 40 arch/x86/include/asm/string_64.h : "a" (v), "1" (s), "0" (n) v 46 arch/x86/include/asm/string_64.h static inline void *memset64(uint64_t *s, uint64_t v, size_t n) v 52 arch/x86/include/asm/string_64.h : "a" (v), "1" (s), "0" (n) v 818 arch/x86/include/asm/uv/uv_bau.h static inline int atomic_read_short(const struct atomic_short *v) v 820 arch/x86/include/asm/uv/uv_bau.h return v->counter; v 830 arch/x86/include/asm/uv/uv_bau.h static inline int atom_asr(short i, struct atomic_short *v) v 834 arch/x86/include/asm/uv/uv_bau.h : "+r" (i), "+m" (v->counter) v 849 arch/x86/include/asm/uv/uv_bau.h static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u) v 852 arch/x86/include/asm/uv/uv_bau.h if (atomic_read(v) >= u) { v 856 arch/x86/include/asm/uv/uv_bau.h atomic_inc(v); v 326 arch/x86/include/asm/uv/uv_hub.h unsigned long v; v 490 arch/x86/include/asm/uv/uv_hub.h static inline unsigned long uv_gpa_nasid(void *v) v 492 arch/x86/include/asm/uv/uv_hub.h return uv_soc_phys_ram_to_nasid(__pa(v)); v 517 arch/x86/include/asm/uv/uv_hub.h static inline unsigned long uv_gpa(void *v) v 519 arch/x86/include/asm/uv/uv_hub.h return uv_soc_phys_ram_to_gpa(__pa(v)); v 132 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 173 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 621 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 743 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 774 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 813 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 958 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1127 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1220 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1285 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1332 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1462 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1631 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1724 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1767 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1788 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1809 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1844 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1889 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1940 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 1985 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 2120 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 2506 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 2687 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 2724 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 2758 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 2935 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3026 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3089 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3197 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3305 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3389 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3455 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3521 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3595 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3697 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3803 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3878 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3940 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 3997 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4050 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4112 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4170 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4201 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4244 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4540 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4713 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4738 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4756 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4774 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4790 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4806 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 4821 arch/x86/include/asm/uv/uv_mmrs.h unsigned long v; v 306 arch/x86/include/asm/xen/page.h #define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v)))) v 307 arch/x86/include/asm/xen/page.h #define virt_to_pfn(v) (PFN_DOWN(__pa(v))) v 308 arch/x86/include/asm/xen/page.h #define virt_to_mfn(v) (pfn_to_mfn(virt_to_pfn(v))) v 312 arch/x86/include/asm/xen/page.h #define virt_to_gfn(v) (pfn_to_gfn(virt_to_pfn(v))) v 340 arch/x86/include/asm/xen/page.h #define pmd_val_ma(v) ((v).pmd) v 342 arch/x86/include/asm/xen/page.h #define pud_val_ma(v) ((v).p4d.pgd.pgd) v 344 arch/x86/include/asm/xen/page.h #define pud_val_ma(v) ((v).pud) v 24 arch/x86/include/uapi/asm/swab.h } v; v 25 arch/x86/include/uapi/asm/swab.h v.u = val; v 27 arch/x86/include/uapi/asm/swab.h : "=r" (v.s.a), "=r" (v.s.b) v 28 arch/x86/include/uapi/asm/swab.h : "0" (v.s.a), "1" (v.s.b)); v 29 arch/x86/include/uapi/asm/swab.h return v.u; v 482 arch/x86/kernel/apic/apic.c unsigned int v; v 488 arch/x86/kernel/apic/apic.c v = apic_read(APIC_LVTT); v 489 arch/x86/kernel/apic/apic.c v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); v 490 arch/x86/kernel/apic/apic.c apic_write(APIC_LVTT, v); v 1170 arch/x86/kernel/apic/apic.c u32 v; v 1182 arch/x86/kernel/apic/apic.c v = ERROR_APIC_VECTOR; /* any non-zero vector will do */ v 1183 arch/x86/kernel/apic/apic.c apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); v 1189 arch/x86/kernel/apic/apic.c v = apic_read(APIC_LVTT); v 1190 arch/x86/kernel/apic/apic.c apic_write(APIC_LVTT, v | APIC_LVT_MASKED); v 1191 arch/x86/kernel/apic/apic.c v = apic_read(APIC_LVT0); v 1192 arch/x86/kernel/apic/apic.c apic_write(APIC_LVT0, v | APIC_LVT_MASKED); v 1193 arch/x86/kernel/apic/apic.c v = apic_read(APIC_LVT1); v 1194 arch/x86/kernel/apic/apic.c apic_write(APIC_LVT1, v | APIC_LVT_MASKED); v 1196 arch/x86/kernel/apic/apic.c v = apic_read(APIC_LVTPC); v 1197 arch/x86/kernel/apic/apic.c apic_write(APIC_LVTPC, v | APIC_LVT_MASKED); v 1203 arch/x86/kernel/apic/apic.c v = apic_read(APIC_LVTTHMR); v 1204 arch/x86/kernel/apic/apic.c apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); v 1209 arch/x86/kernel/apic/apic.c v = apic_read(APIC_LVTCMCI); v 1210 arch/x86/kernel/apic/apic.c if (!(v & APIC_LVT_MASKED)) v 1211 arch/x86/kernel/apic/apic.c apic_write(APIC_LVTCMCI, v | APIC_LVT_MASKED); v 2168 arch/x86/kernel/apic/apic.c u32 v; v 2189 arch/x86/kernel/apic/apic.c v = apic_read(APIC_ISR + ((vector & ~0x1f) >> 1)); v 2190 arch/x86/kernel/apic/apic.c if (v & (1 << (vector & 0x1f))) { v 2218 arch/x86/kernel/apic/apic.c u32 v, i = 0; v 2226 arch/x86/kernel/apic/apic.c v = apic_read(APIC_ESR); v 2231 arch/x86/kernel/apic/apic.c smp_processor_id(), v); v 2233 arch/x86/kernel/apic/apic.c v &= 0xff; v 2234 arch/x86/kernel/apic/apic.c while (v) { v 2235 arch/x86/kernel/apic/apic.c if (v & 0x1) v 2238 arch/x86/kernel/apic/apic.c v >>= 1; v 2527 arch/x86/kernel/apic/apic.c void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) v 77 arch/x86/kernel/apic/apic_noop.c static void noop_apic_write(u32 reg, u32 v) v 1788 arch/x86/kernel/apic/io_apic.c unsigned long v; v 1828 arch/x86/kernel/apic/io_apic.c v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1)); v 1843 arch/x86/kernel/apic/io_apic.c if (!(v & (1 << (i & 0x1f)))) { v 1998 arch/x86/kernel/apic/io_apic.c unsigned long v; v 2000 arch/x86/kernel/apic/io_apic.c v = apic_read(APIC_LVT0); v 2001 arch/x86/kernel/apic/io_apic.c apic_write(APIC_LVT0, v | APIC_LVT_MASKED); v 2006 arch/x86/kernel/apic/io_apic.c unsigned long v; v 2008 arch/x86/kernel/apic/io_apic.c v = apic_read(APIC_LVT0); v 2009 arch/x86/kernel/apic/io_apic.c apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); v 1068 arch/x86/kernel/apic/vector.c unsigned int i, v, ver, maxlvt; v 1073 arch/x86/kernel/apic/vector.c v = apic_read(APIC_ID); v 1074 arch/x86/kernel/apic/vector.c pr_info("... APIC ID: %08x (%01x)\n", v, read_apic_id()); v 1075 arch/x86/kernel/apic/vector.c v = apic_read(APIC_LVR); v 1076 arch/x86/kernel/apic/vector.c pr_info("... APIC VERSION: %08x\n", v); v 1077 arch/x86/kernel/apic/vector.c ver = GET_APIC_VERSION(v); v 1080 arch/x86/kernel/apic/vector.c v = apic_read(APIC_TASKPRI); v 1081 arch/x86/kernel/apic/vector.c pr_debug("... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); v 1086 arch/x86/kernel/apic/vector.c v = apic_read(APIC_ARBPRI); v 1088 arch/x86/kernel/apic/vector.c v, v & APIC_ARBPRI_MASK); v 1090 arch/x86/kernel/apic/vector.c v = apic_read(APIC_PROCPRI); v 1091 arch/x86/kernel/apic/vector.c pr_debug("... APIC PROCPRI: %08x\n", v); v 1099 arch/x86/kernel/apic/vector.c v = apic_read(APIC_RRR); v 1100 arch/x86/kernel/apic/vector.c pr_debug("... APIC RRR: %08x\n", v); v 1103 arch/x86/kernel/apic/vector.c v = apic_read(APIC_LDR); v 1104 arch/x86/kernel/apic/vector.c pr_debug("... APIC LDR: %08x\n", v); v 1106 arch/x86/kernel/apic/vector.c v = apic_read(APIC_DFR); v 1107 arch/x86/kernel/apic/vector.c pr_debug("... APIC DFR: %08x\n", v); v 1109 arch/x86/kernel/apic/vector.c v = apic_read(APIC_SPIV); v 1110 arch/x86/kernel/apic/vector.c pr_debug("... APIC SPIV: %08x\n", v); v 1125 arch/x86/kernel/apic/vector.c v = apic_read(APIC_ESR); v 1126 arch/x86/kernel/apic/vector.c pr_debug("... APIC ESR: %08x\n", v); v 1133 arch/x86/kernel/apic/vector.c v = apic_read(APIC_LVTT); v 1134 arch/x86/kernel/apic/vector.c pr_debug("... APIC LVTT: %08x\n", v); v 1138 arch/x86/kernel/apic/vector.c v = apic_read(APIC_LVTPC); v 1139 arch/x86/kernel/apic/vector.c pr_debug("... APIC LVTPC: %08x\n", v); v 1141 arch/x86/kernel/apic/vector.c v = apic_read(APIC_LVT0); v 1142 arch/x86/kernel/apic/vector.c pr_debug("... APIC LVT0: %08x\n", v); v 1143 arch/x86/kernel/apic/vector.c v = apic_read(APIC_LVT1); v 1144 arch/x86/kernel/apic/vector.c pr_debug("... APIC LVT1: %08x\n", v); v 1148 arch/x86/kernel/apic/vector.c v = apic_read(APIC_LVTERR); v 1149 arch/x86/kernel/apic/vector.c pr_debug("... APIC LVTERR: %08x\n", v); v 1152 arch/x86/kernel/apic/vector.c v = apic_read(APIC_TMICT); v 1153 arch/x86/kernel/apic/vector.c pr_debug("... APIC TMICT: %08x\n", v); v 1154 arch/x86/kernel/apic/vector.c v = apic_read(APIC_TMCCT); v 1155 arch/x86/kernel/apic/vector.c pr_debug("... APIC TMCCT: %08x\n", v); v 1156 arch/x86/kernel/apic/vector.c v = apic_read(APIC_TDCR); v 1157 arch/x86/kernel/apic/vector.c pr_debug("... APIC TDCR: %08x\n", v); v 1160 arch/x86/kernel/apic/vector.c v = apic_read(APIC_EFEAT); v 1161 arch/x86/kernel/apic/vector.c maxlvt = (v >> 16) & 0xff; v 1162 arch/x86/kernel/apic/vector.c pr_debug("... APIC EFEAT: %08x\n", v); v 1163 arch/x86/kernel/apic/vector.c v = apic_read(APIC_ECTRL); v 1164 arch/x86/kernel/apic/vector.c pr_debug("... APIC ECTRL: %08x\n", v); v 1166 arch/x86/kernel/apic/vector.c v = apic_read(APIC_EILVTn(i)); v 1167 arch/x86/kernel/apic/vector.c pr_debug("... APIC EILVT%d: %08x\n", i, v); v 1191 arch/x86/kernel/apic/vector.c unsigned int v; v 1201 arch/x86/kernel/apic/vector.c v = inb(0xa1) << 8 | inb(0x21); v 1202 arch/x86/kernel/apic/vector.c pr_debug("... PIC IMR: %04x\n", v); v 1204 arch/x86/kernel/apic/vector.c v = inb(0xa0) << 8 | inb(0x20); v 1205 arch/x86/kernel/apic/vector.c pr_debug("... PIC IRR: %04x\n", v); v 1209 arch/x86/kernel/apic/vector.c v = inb(0xa0) << 8 | inb(0x20); v 1215 arch/x86/kernel/apic/vector.c pr_debug("... PIC ISR: %04x\n", v); v 1217 arch/x86/kernel/apic/vector.c v = inb(0x4d1) << 8 | inb(0x4d0); v 1218 arch/x86/kernel/apic/vector.c pr_debug("... PIC ELCR: %04x\n", v); v 109 arch/x86/kernel/apic/x2apic_uv_x.c node_id.v = uv_early_read_mmr(UVH_NODE_ID); v 110 arch/x86/kernel/apic/x2apic_uv_x.c m_n_config.v = uv_early_read_mmr(UVH_RH_GAM_CONFIG_MMR); v 228 arch/x86/kernel/apic/x2apic_uv_x.c uvh_apicid.v = uv_early_read_mmr(UVH_APICID); v 246 arch/x86/kernel/apic/x2apic_uv_x.c apicid_mask.v = uv_early_read_mmr(UV1H_LB_TARGET_PHYSICAL_APIC_ID_MASK); v 721 arch/x86/kernel/apic/x2apic_uv_x.c alias.v = uv_read_local_mmr(m_overlay); v 724 arch/x86/kernel/apic/x2apic_uv_x.c redirect.v = uv_read_local_mmr(m_redirect); v 758 arch/x86/kernel/apic/x2apic_uv_x.c gru.v = c; v 761 arch/x86/kernel/apic/x2apic_uv_x.c gru_dist_base = gru.v & 0x000007fff0000000UL; v 794 arch/x86/kernel/apic/x2apic_uv_x.c gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR); v 802 arch/x86/kernel/apic/x2apic_uv_x.c map_gru_distributed(gru.v); v 806 arch/x86/kernel/apic/x2apic_uv_x.c base = (gru.v & mask) >> shift; v 817 arch/x86/kernel/apic/x2apic_uv_x.c mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR); v 934 arch/x86/kernel/apic/x2apic_uv_x.c mmioh.v = uv_read_local_mmr(mmr); v 942 arch/x86/kernel/apic/x2apic_uv_x.c mmioh.v = uv_read_local_mmr(mmr); v 1112 arch/x86/kernel/apic/x2apic_uv_x.c m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR); v 1120 arch/x86/kernel/apic/x2apic_uv_x.c m_gr_config.v = uv_read_local_mmr(UV3H_GR0_GAM_GR_CONFIG); v 1156 arch/x86/kernel/apic/x2apic_uv_x.c node_id.v = uv_read_local_mmr(UVH_NODE_ID); v 1635 arch/x86/kernel/apm_32.c static int proc_apm_show(struct seq_file *m, void *v) v 23 arch/x86/kernel/bootflag.c static int __init parity(u8 v) v 29 arch/x86/kernel/bootflag.c x ^= (v & 1); v 30 arch/x86/kernel/bootflag.c v >>= 1; v 36 arch/x86/kernel/bootflag.c static void __init sbf_write(u8 v) v 41 arch/x86/kernel/bootflag.c v &= ~SBF_PARITY; v 42 arch/x86/kernel/bootflag.c if (!parity(v)) v 43 arch/x86/kernel/bootflag.c v |= SBF_PARITY; v 46 arch/x86/kernel/bootflag.c sbf_port, v); v 49 arch/x86/kernel/bootflag.c CMOS_WRITE(v, sbf_port); v 57 arch/x86/kernel/bootflag.c u8 v; v 63 arch/x86/kernel/bootflag.c v = CMOS_READ(sbf_port); v 66 arch/x86/kernel/bootflag.c return v; v 69 arch/x86/kernel/bootflag.c static int __init sbf_value_valid(u8 v) v 71 arch/x86/kernel/bootflag.c if (v & SBF_RESERVED) /* Reserved bits */ v 73 arch/x86/kernel/bootflag.c if (!parity(v)) v 81 arch/x86/kernel/bootflag.c u8 v; v 86 arch/x86/kernel/bootflag.c v = sbf_read(); v 87 arch/x86/kernel/bootflag.c if (!sbf_value_valid(v)) { v 89 arch/x86/kernel/bootflag.c "CMOS RAM was invalid\n", v); v 92 arch/x86/kernel/bootflag.c v &= ~SBF_RESERVED; v 93 arch/x86/kernel/bootflag.c v &= ~SBF_BOOTING; v 94 arch/x86/kernel/bootflag.c v &= ~SBF_DIAG; v 96 arch/x86/kernel/bootflag.c v |= SBF_PNPOS; v 98 arch/x86/kernel/bootflag.c sbf_write(v); v 625 arch/x86/kernel/cpu/common.c unsigned int *v; v 631 arch/x86/kernel/cpu/common.c v = (unsigned int *)c->x86_model_id; v 632 arch/x86/kernel/cpu/common.c cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); v 633 arch/x86/kernel/cpu/common.c cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); v 634 arch/x86/kernel/cpu/common.c cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); v 775 arch/x86/kernel/cpu/common.c char *v = c->x86_vendor_id; v 782 arch/x86/kernel/cpu/common.c if (!strcmp(v, cpu_devs[i]->c_ident[0]) || v 784 arch/x86/kernel/cpu/common.c !strcmp(v, cpu_devs[i]->c_ident[1]))) { v 793 arch/x86/kernel/cpu/common.c "CPU: Your system may be unstable.\n", v); v 394 arch/x86/kernel/cpu/mce/core.c u64 v; v 404 arch/x86/kernel/cpu/mce/core.c if (rdmsrl_safe(msr, &v)) { v 411 arch/x86/kernel/cpu/mce/core.c v = 0; v 414 arch/x86/kernel/cpu/mce/core.c return v; v 417 arch/x86/kernel/cpu/mce/core.c static void mce_wrmsrl(u32 msr, u64 v) v 423 arch/x86/kernel/cpu/mce/core.c *(u64 *)((char *)this_cpu_ptr(&injectm) + offset) = v; v 426 arch/x86/kernel/cpu/mce/core.c wrmsrl(msr, v); v 57 arch/x86/kernel/cpu/proc.c static int show_cpuinfo(struct seq_file *m, void *v) v 59 arch/x86/kernel/cpu/proc.c struct cpuinfo_x86 *c = v; v 152 arch/x86/kernel/cpu/proc.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 158 arch/x86/kernel/cpu/proc.c static void c_stop(struct seq_file *m, void *v) v 461 arch/x86/kernel/cpu/resctrl/ctrlmondata.c struct seq_file *s, void *v) v 264 arch/x86/kernel/cpu/resctrl/internal.h struct seq_file *sf, void *v); v 562 arch/x86/kernel/cpu/resctrl/internal.h struct seq_file *s, void *v); v 262 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *s, void *v) v 713 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *s, void *v) v 729 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 744 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 753 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 762 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 771 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 794 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 872 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 881 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 891 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 903 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 912 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 921 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *seq, void *v) v 953 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *s, void *v) v 1285 arch/x86/kernel/cpu/resctrl/rdtgroup.c struct seq_file *s, void *v) v 809 arch/x86/kernel/setup.c dump_kernel_offset(struct notifier_block *self, unsigned long v, void *p) v 34 arch/x86/kvm/irq.c static int pending_userspace_extint(struct kvm_vcpu *v) v 36 arch/x86/kvm/irq.c return v->arch.pending_external_vector != -1; v 43 arch/x86/kvm/irq.c static int kvm_cpu_has_extint(struct kvm_vcpu *v) v 45 arch/x86/kvm/irq.c u8 accept = kvm_apic_accept_pic_intr(v); v 48 arch/x86/kvm/irq.c if (irqchip_split(v->kvm)) v 49 arch/x86/kvm/irq.c return pending_userspace_extint(v); v 51 arch/x86/kvm/irq.c return v->kvm->arch.vpic->output; v 62 arch/x86/kvm/irq.c int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v) v 75 arch/x86/kvm/irq.c if (!lapic_in_kernel(v)) v 76 arch/x86/kvm/irq.c return v->arch.interrupt.injected; v 78 arch/x86/kvm/irq.c if (kvm_cpu_has_extint(v)) v 81 arch/x86/kvm/irq.c if (!is_guest_mode(v) && kvm_vcpu_apicv_active(v)) v 84 arch/x86/kvm/irq.c return kvm_apic_has_interrupt(v) != -1; /* LAPIC */ v 91 arch/x86/kvm/irq.c int kvm_cpu_has_interrupt(struct kvm_vcpu *v) v 104 arch/x86/kvm/irq.c if (!lapic_in_kernel(v)) v 105 arch/x86/kvm/irq.c return v->arch.interrupt.injected; v 107 arch/x86/kvm/irq.c if (kvm_cpu_has_extint(v)) v 110 arch/x86/kvm/irq.c return kvm_apic_has_interrupt(v) != -1; /* LAPIC */ v 118 arch/x86/kvm/irq.c static int kvm_cpu_get_extint(struct kvm_vcpu *v) v 120 arch/x86/kvm/irq.c if (kvm_cpu_has_extint(v)) { v 121 arch/x86/kvm/irq.c if (irqchip_split(v->kvm)) { v 122 arch/x86/kvm/irq.c int vector = v->arch.pending_external_vector; v 124 arch/x86/kvm/irq.c v->arch.pending_external_vector = -1; v 127 arch/x86/kvm/irq.c return kvm_pic_read_irq(v->kvm); /* PIC */ v 135 arch/x86/kvm/irq.c int kvm_cpu_get_interrupt(struct kvm_vcpu *v) v 139 arch/x86/kvm/irq.c if (!lapic_in_kernel(v)) v 140 arch/x86/kvm/irq.c return v->arch.interrupt.nr; v 142 arch/x86/kvm/irq.c vector = kvm_cpu_get_extint(v); v 147 arch/x86/kvm/irq.c return kvm_get_apic_interrupt(v); /* APIC */ v 329 arch/x86/kvm/lapic.c u32 v = APIC_VERSION; v 344 arch/x86/kvm/lapic.c v |= APIC_LVR_DIRECTED_EOI; v 345 arch/x86/kvm/lapic.c kvm_lapic_set_reg(apic, APIC_LVR, v); v 129 arch/x86/kvm/lapic.h #define VEC_POS(v) ((v) & (32 - 1)) v 130 arch/x86/kvm/lapic.h #define REG_POS(v) (((v) >> 5) << 4) v 654 arch/x86/kvm/vmx/vmx.c struct loaded_vmcs *v; v 656 arch/x86/kvm/vmx/vmx.c list_for_each_entry(v, &per_cpu(loaded_vmcss_on_cpu, cpu), v 658 arch/x86/kvm/vmx/vmx.c vmcs_clear(v->vmcs); v 1001 arch/x86/kvm/vmx/vmx.c unsigned long v; v 1016 arch/x86/kvm/vmx/vmx.c v = get_desc_base(&table[selector >> 3]); v 1017 arch/x86/kvm/vmx/vmx.c return v; v 2261 arch/x86/kvm/vmx/vmx.c struct loaded_vmcs *v, *n; v 2263 arch/x86/kvm/vmx/vmx.c list_for_each_entry_safe(v, n, &per_cpu(loaded_vmcss_on_cpu, cpu), v 2265 arch/x86/kvm/vmx/vmx.c __loaded_vmcs_clear(v); v 1755 arch/x86/kvm/x86.c u64 v = (u64)khz * (1000000 + ppm); v 1756 arch/x86/kvm/x86.c do_div(v, 1000000); v 1757 arch/x86/kvm/x86.c return v; v 2083 arch/x86/kvm/x86.c long v; v 2094 arch/x86/kvm/x86.c v = (tsc_pg_val - gtod->clock.cycle_last) & v 2104 arch/x86/kvm/x86.c v = (*tsc_timestamp - gtod->clock.cycle_last) & v 2112 arch/x86/kvm/x86.c *tsc_timestamp = v = 0; v 2114 arch/x86/kvm/x86.c return v * gtod->clock.mult; v 2312 arch/x86/kvm/x86.c static void kvm_setup_pvclock_page(struct kvm_vcpu *v) v 2314 arch/x86/kvm/x86.c struct kvm_vcpu_arch *vcpu = &v->arch; v 2317 arch/x86/kvm/x86.c if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time, v 2341 arch/x86/kvm/x86.c kvm_write_guest_cached(v->kvm, &vcpu->pv_time, v 2355 arch/x86/kvm/x86.c trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock); v 2357 arch/x86/kvm/x86.c kvm_write_guest_cached(v->kvm, &vcpu->pv_time, v 2364 arch/x86/kvm/x86.c kvm_write_guest_cached(v->kvm, &vcpu->pv_time, v 2369 arch/x86/kvm/x86.c static int kvm_guest_time_update(struct kvm_vcpu *v) v 2372 arch/x86/kvm/x86.c struct kvm_vcpu_arch *vcpu = &v->arch; v 2373 arch/x86/kvm/x86.c struct kvm_arch *ka = &v->kvm->arch; v 2399 arch/x86/kvm/x86.c kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); v 2407 arch/x86/kvm/x86.c tsc_timestamp = kvm_read_l1_tsc(v, host_tsc); v 2420 arch/x86/kvm/x86.c u64 tsc = compute_guest_tsc(v, kernel_ns); v 2422 arch/x86/kvm/x86.c adjust_tsc_offset_guest(v, tsc - tsc_timestamp); v 2432 arch/x86/kvm/x86.c tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz); v 2442 arch/x86/kvm/x86.c vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset; v 2453 arch/x86/kvm/x86.c kvm_setup_pvclock_page(v); v 2454 arch/x86/kvm/x86.c if (v == kvm_get_vcpu(v->kvm, 0)) v 2455 arch/x86/kvm/x86.c kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock); v 2490 arch/x86/kvm/x86.c static void kvm_gen_kvmclock_update(struct kvm_vcpu *v) v 2492 arch/x86/kvm/x86.c struct kvm *kvm = v->kvm; v 2494 arch/x86/kvm/x86.c kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); v 5288 arch/x86/kvm/x86.c const void *v) v 5296 arch/x86/kvm/x86.c !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v)) v 5297 arch/x86/kvm/x86.c && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v)) v 5302 arch/x86/kvm/x86.c v += n; v 5308 arch/x86/kvm/x86.c static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v) v 5317 arch/x86/kvm/x86.c addr, n, v)) v 5318 arch/x86/kvm/x86.c && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v)) v 5320 arch/x86/kvm/x86.c trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v); v 5324 arch/x86/kvm/x86.c v += n; v 24 arch/x86/lib/kaslr.c #define debug_putstr(v) early_printk("%s", v) v 207 arch/x86/math-emu/fpu_emu.h asmlinkage unsigned FPU_shrxs(void *v, unsigned x); v 8 arch/x86/mm/debug_pagetables.c static int ptdump_show(struct seq_file *m, void *v) v 16 arch/x86/mm/debug_pagetables.c static int ptdump_curknl_show(struct seq_file *m, void *v) v 29 arch/x86/mm/debug_pagetables.c static int ptdump_curusr_show(struct seq_file *m, void *v) v 43 arch/x86/mm/debug_pagetables.c static int ptdump_efi_show(struct seq_file *m, void *v) v 130 arch/x86/mm/kmmio.c pmdval_t v = pmd_val(*pmd); v 132 arch/x86/mm/kmmio.c *old = v; v 143 arch/x86/mm/kmmio.c pteval_t v = pte_val(*pte); v 145 arch/x86/mm/kmmio.c *old = v; v 1133 arch/x86/mm/pat.c static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1139 arch/x86/mm/pat.c static void memtype_seq_stop(struct seq_file *seq, void *v) v 1143 arch/x86/mm/pat.c static int memtype_seq_show(struct seq_file *seq, void *v) v 1145 arch/x86/mm/pat.c struct memtype *print_entry = (struct memtype *)v; v 375 arch/x86/oprofile/nmi_int.c unsigned int v; v 384 arch/x86/oprofile/nmi_int.c v = apic_read(APIC_LVTERR); v 385 arch/x86/oprofile/nmi_int.c apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); v 387 arch/x86/oprofile/nmi_int.c apic_write(APIC_LVTERR, v); v 13 arch/x86/pci/early.c u32 v; v 15 arch/x86/pci/early.c v = inl(0xcfc); v 16 arch/x86/pci/early.c return v; v 21 arch/x86/pci/early.c u8 v; v 23 arch/x86/pci/early.c v = inb(0xcfc + (offset&3)); v 24 arch/x86/pci/early.c return v; v 29 arch/x86/pci/early.c u16 v; v 31 arch/x86/pci/early.c v = inw(0xcfc + (offset&2)); v 32 arch/x86/pci/early.c return v; v 109 arch/x86/pci/fixup.c u8 v; v 128 arch/x86/pci/fixup.c pci_read_config_byte(d, where, &v); v 129 arch/x86/pci/fixup.c if (v & ~mask) { v 131 arch/x86/pci/fixup.c d->device, d->revision, where, v, mask, v & mask); v 132 arch/x86/pci/fixup.c v &= mask; v 133 arch/x86/pci/fixup.c pci_write_config_byte(d, where, v); v 167 arch/x86/pci/xen.c int *v; v 172 arch/x86/pci/xen.c v = kcalloc(max(1, nvec), sizeof(int), GFP_KERNEL); v 173 arch/x86/pci/xen.c if (!v) v 177 arch/x86/pci/xen.c ret = xen_pci_frontend_enable_msix(dev, v, nvec); v 179 arch/x86/pci/xen.c ret = xen_pci_frontend_enable_msi(dev, v); v 184 arch/x86/pci/xen.c irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], v 196 arch/x86/pci/xen.c kfree(v); v 205 arch/x86/pci/xen.c kfree(v); v 862 arch/x86/platform/uv/tlb_uv.c atomic_t *v; v 864 arch/x86/platform/uv/tlb_uv.c v = &hmaster->active_descriptor_count; v 865 arch/x86/platform/uv/tlb_uv.c if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) { v 869 arch/x86/platform/uv/tlb_uv.c } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)); v 987 arch/x86/tools/relocs.c static int write32(uint32_t v, FILE *f) v 991 arch/x86/tools/relocs.c put_unaligned_le32(v, buf); v 995 arch/x86/tools/relocs.c static int write32_as_text(uint32_t v, FILE *f) v 997 arch/x86/tools/relocs.c return fprintf(f, "\t.long 0x%08"PRIx32"\n", v) > 0 ? 0 : -1; v 348 arch/x86/xen/enlighten_pv.c static void set_aliased_prot(void *v, pgprot_t prot) v 357 arch/x86/xen/enlighten_pv.c ptep = lookup_address((unsigned long)v, &level); v 387 arch/x86/xen/enlighten_pv.c probe_kernel_read(&dummy, v, 1); v 389 arch/x86/xen/enlighten_pv.c if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) v 395 arch/x86/xen/enlighten_pv.c if (av != v) v 709 arch/x86/xen/mmu_pv.c static void xen_pte_unlock(void *v) v 711 arch/x86/xen/mmu_pv.c spinlock_t *ptl = v; v 1389 arch/x86/xen/mmu_pv.c static void set_current_cr3(void *v) v 1391 arch/x86/xen/mmu_pv.c this_cpu_write(xen_current_cr3, (unsigned long)v); v 1841 arch/x86/xen/mmu_pv.c static void __init convert_pfn_mfn(void *v) v 1843 arch/x86/xen/mmu_pv.c pte_t *pte = v; v 775 arch/x86/xen/p2m.c static int p2m_dump_show(struct seq_file *m, void *v) v 462 arch/x86/xen/smp_pv.c static void stop_self(void *v) v 392 arch/x86/xen/time.c t.addr.v = NULL; v 410 arch/x86/xen/time.c t.addr.v = &xen_clock->pvti; v 442 arch/x86/xen/time.c t.addr.v = &ti->pvti; v 457 arch/x86/xen/time.c t.addr.v = NULL; v 65 arch/xtensa/include/asm/asm-uaccess.h s32i \av, \at, THREAD_CURRENT_DS v 48 arch/xtensa/include/asm/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 57 arch/xtensa/include/asm/atomic.h #define atomic_set(v,i) WRITE_ONCE((v)->counter, (i)) v 61 arch/xtensa/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 73 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 79 arch/xtensa/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 92 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 100 arch/xtensa/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 112 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 121 arch/xtensa/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t * v) \ v 133 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 139 arch/xtensa/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t * v) \ v 152 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 160 arch/xtensa/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t * v) \ v 172 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 182 arch/xtensa/include/asm/atomic.h static inline void atomic_##op(int i, atomic_t * v) \ v 194 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 200 arch/xtensa/include/asm/atomic.h static inline int atomic_##op##_return(int i, atomic_t * v) \ v 212 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 220 arch/xtensa/include/asm/atomic.h static inline int atomic_fetch_##op(int i, atomic_t * v) \ v 232 arch/xtensa/include/asm/atomic.h : "a" (i), "a" (v) \ v 258 arch/xtensa/include/asm/atomic.h #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) v 259 arch/xtensa/include/asm/atomic.h #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) v 228 arch/xtensa/include/asm/processor.h unsigned int v = (unsigned int)(x); \ v 229 arch/xtensa/include/asm/processor.h __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \ v 234 arch/xtensa/include/asm/processor.h unsigned int v; \ v 235 arch/xtensa/include/asm/processor.h __asm__ __volatile__ ("rsr %0, "__stringify(sr) : "=a"(v)); \ v 236 arch/xtensa/include/asm/processor.h v; \ v 91 arch/xtensa/kernel/hw_breakpoint.c static void xtensa_wsr(unsigned long v, u8 sr) v 104 arch/xtensa/kernel/hw_breakpoint.c xtensa_set_sr(v, SREG_IBREAKA + 0); v 109 arch/xtensa/kernel/hw_breakpoint.c xtensa_set_sr(v, SREG_IBREAKA + 1); v 115 arch/xtensa/kernel/hw_breakpoint.c xtensa_set_sr(v, SREG_DBREAKA + 0); v 118 arch/xtensa/kernel/hw_breakpoint.c xtensa_set_sr(v, SREG_DBREAKC + 0); v 123 arch/xtensa/kernel/hw_breakpoint.c xtensa_set_sr(v, SREG_DBREAKA + 1); v 127 arch/xtensa/kernel/hw_breakpoint.c xtensa_set_sr(v, SREG_DBREAKC + 1); v 131 arch/xtensa/kernel/perf_event.c static inline void xtensa_pmu_write_counter(int idx, uint32_t v) v 133 arch/xtensa/kernel/perf_event.c set_er(v, XTENSA_PMU_PM(idx)); v 368 arch/xtensa/kernel/perf_event.c uint32_t v = get_er(XTENSA_PMU_PMSTAT(i)); v 373 arch/xtensa/kernel/perf_event.c if (!(v & XTENSA_PMU_PMSTAT_OVFL)) v 376 arch/xtensa/kernel/perf_event.c set_er(v, XTENSA_PMU_PMSTAT(i)); v 25 arch/xtensa/kernel/s32c1i_selftest.c static inline int probed_compare_swap(int *v, int cmp, int set) v 35 arch/xtensa/kernel/s32c1i_selftest.c : "a" (cmp), "a" (v), "a" (&rcw_probe_pc), "0" (set) v 717 arch/xtensa/kernel/setup.c c_next(struct seq_file *f, void *v, loff_t *pos) v 723 arch/xtensa/kernel/setup.c c_stop(struct seq_file *f, void *v) v 211 arch/xtensa/kernel/traps.c #define IS_POW2(v) (((v) & ((v) - 1)) == 0) v 90 arch/xtensa/kernel/xtensa_ksyms.c unsigned long __sync_fetch_and_and_4(unsigned long *p, unsigned long v) v 96 arch/xtensa/kernel/xtensa_ksyms.c unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v) v 150 arch/xtensa/platforms/iss/console.c static int rs_proc_show(struct seq_file *m, void *v) v 934 block/bfq-cgroup.c static int bfq_io_show_weight_legacy(struct seq_file *sf, void *v) v 958 block/bfq-cgroup.c static int bfq_io_show_weight(struct seq_file *sf, void *v) v 1036 block/bfq-cgroup.c u64 v; v 1042 block/bfq-cgroup.c if (sscanf(ctx.body, "%llu", &v) == 1) { v 1045 block/bfq-cgroup.c if (!v) v 1048 block/bfq-cgroup.c v = 0; v 1057 block/bfq-cgroup.c if (!v || (v >= BFQ_MIN_WEIGHT && v <= BFQ_MAX_WEIGHT)) { v 1058 block/bfq-cgroup.c bfq_group_set_weight(bfqg, bfqg->entity.weight, v); v 1072 block/bfq-cgroup.c u64 v; v 1077 block/bfq-cgroup.c v = simple_strtoull(buf, &endp, 0); v 1078 block/bfq-cgroup.c if (*endp == '\0' || sscanf(buf, "default %llu", &v) == 1) { v 1079 block/bfq-cgroup.c ret = bfq_io_set_weight_legacy(of_css(of), NULL, v); v 1087 block/bfq-cgroup.c static int bfqg_print_stat(struct seq_file *sf, void *v) v 1094 block/bfq-cgroup.c static int bfqg_print_rwstat(struct seq_file *sf, void *v) v 1135 block/bfq-cgroup.c static int bfqg_print_stat_recursive(struct seq_file *sf, void *v) v 1143 block/bfq-cgroup.c static int bfqg_print_rwstat_recursive(struct seq_file *sf, void *v) v 1159 block/bfq-cgroup.c static int bfqg_print_stat_sectors(struct seq_file *sf, void *v) v 1178 block/bfq-cgroup.c static int bfqg_print_stat_sectors_recursive(struct seq_file *sf, void *v) v 1191 block/bfq-cgroup.c u64 v = 0; v 1194 block/bfq-cgroup.c v = bfq_stat_read(&bfqg->stats.avg_queue_size_sum); v 1195 block/bfq-cgroup.c v = div64_u64(v, samples); v 1197 block/bfq-cgroup.c __blkg_prfill_u64(sf, pd, v); v 1202 block/bfq-cgroup.c static int bfqg_print_avg_queue_size(struct seq_file *sf, void *v) v 551 block/blk-cgroup.c u64 __blkg_prfill_u64(struct seq_file *sf, struct blkg_policy_data *pd, u64 v) v 558 block/blk-cgroup.c seq_printf(sf, "%s %llu\n", dname, (unsigned long long)v); v 559 block/blk-cgroup.c return v; v 582 block/blk-cgroup.c u64 v; v 592 block/blk-cgroup.c v = rwstat->cnt[BLKG_RWSTAT_READ] + v 595 block/blk-cgroup.c seq_printf(sf, "%s Total %llu\n", dname, v); v 596 block/blk-cgroup.c return v; v 635 block/blk-cgroup.c int blkg_print_stat_bytes(struct seq_file *sf, void *v) v 652 block/blk-cgroup.c int blkg_print_stat_ios(struct seq_file *sf, void *v) v 676 block/blk-cgroup.c int blkg_print_stat_bytes_recursive(struct seq_file *sf, void *v) v 691 block/blk-cgroup.c int blkg_print_stat_ios_recursive(struct seq_file *sf, void *v) v 921 block/blk-cgroup.c static int blkcg_print_stat(struct seq_file *sf, void *v) v 784 block/blk-iocost.c u64 v; v 793 block/blk-iocost.c v = DIV64_U64_ROUND_UP(VTIME_PER_SEC, seqiops); v 794 block/blk-iocost.c if (v > *page) v 795 block/blk-iocost.c *seqio = v - *page; v 799 block/blk-iocost.c v = DIV64_U64_ROUND_UP(VTIME_PER_SEC, randiops); v 800 block/blk-iocost.c if (v > *page) v 801 block/blk-iocost.c *randio = v - *page; v 2084 block/blk-iocost.c static int ioc_weight_show(struct seq_file *sf, void *v) v 2102 block/blk-iocost.c u32 v; v 2108 block/blk-iocost.c if (!sscanf(buf, "default %u", &v) && !sscanf(buf, "%u", &v)) v 2111 block/blk-iocost.c if (v < CGROUP_WEIGHT_MIN || v > CGROUP_WEIGHT_MAX) v 2115 block/blk-iocost.c iocc->dfl_weight = v; v 2137 block/blk-iocost.c v = 0; v 2139 block/blk-iocost.c if (!sscanf(ctx.body, "%u", &v)) v 2141 block/blk-iocost.c if (v < CGROUP_WEIGHT_MIN || v > CGROUP_WEIGHT_MAX) v 2146 block/blk-iocost.c iocg->cfg_weight = v; v 2182 block/blk-iocost.c static int ioc_qos_show(struct seq_file *sf, void *v) v 2239 block/blk-iocost.c s64 v; v 2246 block/blk-iocost.c match_u64(&args[0], &v); v 2247 block/blk-iocost.c enable = v; v 2267 block/blk-iocost.c if (cgroup_parse_float(buf, 2, &v)) v 2269 block/blk-iocost.c if (v < 0 || v > 10000) v 2271 block/blk-iocost.c qos[tok] = v * 100; v 2275 block/blk-iocost.c if (match_u64(&args[0], &v)) v 2277 block/blk-iocost.c qos[tok] = v; v 2284 block/blk-iocost.c if (cgroup_parse_float(buf, 2, &v)) v 2286 block/blk-iocost.c if (v < 0) v 2288 block/blk-iocost.c qos[tok] = clamp_t(s64, v * 100, v 2348 block/blk-iocost.c static int ioc_cost_model_show(struct seq_file *sf, void *v) v 2404 block/blk-iocost.c u64 v; v 2429 block/blk-iocost.c if (match_u64(&args[0], &v)) v 2431 block/blk-iocost.c u[tok] = v; v 816 block/blk-iolatency.c u64 v; v 820 block/blk-iolatency.c else if (sscanf(val, "%llu", &v) == 1) v 821 block/blk-iolatency.c lat_val = v * NSEC_PER_USEC; v 880 block/blk-iolatency.c static int iolatency_print_limit(struct seq_file *sf, void *v) v 53 block/blk-mq-debugfs.c static void *queue_requeue_list_next(struct seq_file *m, void *v, loff_t *pos) v 57 block/blk-mq-debugfs.c return seq_list_next(v, &q->requeue_list, pos); v 60 block/blk-mq-debugfs.c static void queue_requeue_list_stop(struct seq_file *m, void *v) v 351 block/blk-mq-debugfs.c int blk_mq_debugfs_rq_show(struct seq_file *m, void *v) v 353 block/blk-mq-debugfs.c return __blk_mq_debugfs_rq_show(m, list_entry_rq(v)); v 366 block/blk-mq-debugfs.c static void *hctx_dispatch_next(struct seq_file *m, void *v, loff_t *pos) v 370 block/blk-mq-debugfs.c return seq_list_next(v, &hctx->dispatch, pos); v 373 block/blk-mq-debugfs.c static void hctx_dispatch_stop(struct seq_file *m, void *v) v 635 block/blk-mq-debugfs.c static void *ctx_##name##_rq_list_next(struct seq_file *m, void *v, \ v 640 block/blk-mq-debugfs.c return seq_list_next(v, &ctx->rq_lists[type], pos); \ v 643 block/blk-mq-debugfs.c static void ctx_##name##_rq_list_stop(struct seq_file *m, void *v) \ v 713 block/blk-mq-debugfs.c static int blk_mq_debugfs_show(struct seq_file *m, void *v) v 19 block/blk-mq-debugfs.h int blk_mq_debugfs_rq_show(struct seq_file *m, void *v); v 9 block/blk-rq-qos.c static bool atomic_inc_below(atomic_t *v, unsigned int below) v 11 block/blk-rq-qos.c unsigned int cur = atomic_read(v); v 18 block/blk-rq-qos.c old = atomic_cmpxchg(v, cur, cur + 1); v 36 block/blk-sysfs.c unsigned long v; v 38 block/blk-sysfs.c err = kstrtoul(page, 10, &v); v 39 block/blk-sysfs.c if (err || v > UINT_MAX) v 42 block/blk-sysfs.c *var = v; v 50 block/blk-sysfs.c s64 v; v 52 block/blk-sysfs.c err = kstrtos64(page, 10, &v); v 56 block/blk-sysfs.c *var = v; v 1334 block/blk-throttle.c u64 v = *(u64 *)((void *)tg + off); v 1336 block/blk-throttle.c if (v == U64_MAX) v 1338 block/blk-throttle.c return __blkg_prfill_u64(sf, pd, v); v 1345 block/blk-throttle.c unsigned int v = *(unsigned int *)((void *)tg + off); v 1347 block/blk-throttle.c if (v == UINT_MAX) v 1349 block/blk-throttle.c return __blkg_prfill_u64(sf, pd, v); v 1352 block/blk-throttle.c static int tg_print_conf_u64(struct seq_file *sf, void *v) v 1359 block/blk-throttle.c static int tg_print_conf_uint(struct seq_file *sf, void *v) v 1429 block/blk-throttle.c u64 v; v 1436 block/blk-throttle.c if (sscanf(ctx.body, "%llu", &v) != 1) v 1438 block/blk-throttle.c if (!v) v 1439 block/blk-throttle.c v = U64_MAX; v 1444 block/blk-throttle.c *(u64 *)((void *)tg + of_cft(of)->private) = v; v 1446 block/blk-throttle.c *(unsigned int *)((void *)tg + of_cft(of)->private) = v; v 1578 block/blk-throttle.c static int tg_print_limit(struct seq_file *sf, void *v) v 1591 block/blk-throttle.c u64 v[4]; v 1603 block/blk-throttle.c v[0] = tg->bps_conf[READ][index]; v 1604 block/blk-throttle.c v[1] = tg->bps_conf[WRITE][index]; v 1605 block/blk-throttle.c v[2] = tg->iops_conf[READ][index]; v 1606 block/blk-throttle.c v[3] = tg->iops_conf[WRITE][index]; v 1634 block/blk-throttle.c v[0] = val; v 1636 block/blk-throttle.c v[1] = val; v 1638 block/blk-throttle.c v[2] = min_t(u64, val, UINT_MAX); v 1640 block/blk-throttle.c v[3] = min_t(u64, val, UINT_MAX); v 1649 block/blk-throttle.c tg->bps_conf[READ][index] = v[0]; v 1650 block/blk-throttle.c tg->bps_conf[WRITE][index] = v[1]; v 1651 block/blk-throttle.c tg->iops_conf[READ][index] = v[2]; v 1652 block/blk-throttle.c tg->iops_conf[WRITE][index] = v[3]; v 1655 block/blk-throttle.c tg->bps[READ][index] = v[0]; v 1656 block/blk-throttle.c tg->bps[WRITE][index] = v[1]; v 1657 block/blk-throttle.c tg->iops[READ][index] = v[2]; v 1658 block/blk-throttle.c tg->iops[WRITE][index] = v[3]; v 2464 block/blk-throttle.c unsigned long v; v 2469 block/blk-throttle.c if (kstrtoul(page, 10, &v)) v 2471 block/blk-throttle.c t = msecs_to_jiffies(v); v 92 block/compat_ioctl.c unsigned long v; v 93 block/compat_ioctl.c if (get_user(v, p) || put_user(v, uvp)) v 1017 block/genhd.c static void *disk_seqf_next(struct seq_file *seqf, void *v, loff_t *pos) v 1029 block/genhd.c static void disk_seqf_stop(struct seq_file *seqf, void *v) v 1051 block/genhd.c static int show_partition(struct seq_file *seqf, void *v) v 1053 block/genhd.c struct gendisk *sgp = v; v 1365 block/genhd.c static int diskstats_show(struct seq_file *seqf, void *v) v 1367 block/genhd.c struct gendisk *gp = v; v 916 block/kyber-iosched.c static void *kyber_##name##_rqs_next(struct seq_file *m, void *v, \ v 922 block/kyber-iosched.c return seq_list_next(v, &khd->rqs[domain], pos); \ v 925 block/kyber-iosched.c static void kyber_##name##_rqs_stop(struct seq_file *m, void *v) \ v 668 block/mq-deadline.c static void *deadline_##name##_fifo_next(struct seq_file *m, void *v, \ v 674 block/mq-deadline.c return seq_list_next(v, &dd->fifo_list[ddir], pos); \ v 677 block/mq-deadline.c static void deadline_##name##_fifo_stop(struct seq_file *m, void *v) \ v 736 block/mq-deadline.c static void *deadline_dispatch_next(struct seq_file *m, void *v, loff_t *pos) v 741 block/mq-deadline.c return seq_list_next(v, &dd->dispatch, pos); v 744 block/mq-deadline.c static void deadline_dispatch_stop(struct seq_file *m, void *v) v 671 block/partition-generic.c p->v = page; v 676 block/partition-generic.c p->v = NULL; v 545 block/partitions/ldm.c struct vblk *v = list_entry (item, struct vblk, list); v 546 block/partitions/ldm.c if (uuid_equal(&v->vblk.disk.disk_id, &ldb->ph.disk_id)) v 547 block/partitions/ldm.c return v; v 1202 block/partitions/ldm.c struct vblk *v = list_entry (item, struct vblk, list); v 1203 block/partitions/ldm.c if ((v->vblk.part.disk_id == vb->vblk.part.disk_id) && v 1204 block/partitions/ldm.c (v->vblk.part.start > vb->vblk.part.start)) { v 1205 block/partitions/ldm.c list_add_tail (&vb->list, &v->list); v 1355 block/partitions/ldm.c int size, perbuf, skip, finish, s, v, recs; v 1375 block/partitions/ldm.c for (v = 0; v < perbuf; v++, data+=size) { /* For each vblk */ v 221 block/partitions/msdos.c struct solaris_x86_vtoc *v; v 225 block/partitions/msdos.c v = read_part_sector(state, offset + 1, §); v 226 block/partitions/msdos.c if (!v) v 228 block/partitions/msdos.c if (le32_to_cpu(v->v_sanity) != SOLARIS_X86_VTOC_SANE) { v 238 block/partitions/msdos.c if (le32_to_cpu(v->v_version) != 1) { v 242 block/partitions/msdos.c le32_to_cpu(v->v_version)); v 248 block/partitions/msdos.c max_nparts = le16_to_cpu(v->v_nparts) > 8 ? SOLARIS_X86_NUMSLICE : 8; v 250 block/partitions/msdos.c struct solaris_x86_slice *s = &v->v_slice[i]; v 26 crypto/aegis128-neon-inner.c uint8x16_t v[5]; v 44 crypto/aegis128-neon-inner.c vst1q_u8(state, st.v[0]); v 45 crypto/aegis128-neon-inner.c vst1q_u8(state + 16, st.v[1]); v 46 crypto/aegis128-neon-inner.c vst1q_u8(state + 32, st.v[2]); v 47 crypto/aegis128-neon-inner.c vst1q_u8(state + 48, st.v[3]); v 48 crypto/aegis128-neon-inner.c vst1q_u8(state + 64, st.v[4]); v 66 crypto/aegis128-neon-inner.c uint8x16_t v; v 73 crypto/aegis128-neon-inner.c v = vqtbl4q_u8(vld1q_u8_x4(crypto_aes_sbox), w); v 74 crypto/aegis128-neon-inner.c v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0x40), w - 0x40); v 75 crypto/aegis128-neon-inner.c v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0x80), w - 0x80); v 76 crypto/aegis128-neon-inner.c v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0xc0), w - 0xc0); v 78 crypto/aegis128-neon-inner.c asm("tbl %0.16b, {v16.16b-v19.16b}, %1.16b" : "=w"(v) : "w"(w)); v 80 crypto/aegis128-neon-inner.c asm("tbx %0.16b, {v20.16b-v23.16b}, %1.16b" : "+w"(v) : "w"(w)); v 82 crypto/aegis128-neon-inner.c asm("tbx %0.16b, {v24.16b-v27.16b}, %1.16b" : "+w"(v) : "w"(w)); v 84 crypto/aegis128-neon-inner.c asm("tbx %0.16b, {v28.16b-v31.16b}, %1.16b" : "+w"(v) : "w"(w)); v 88 crypto/aegis128-neon-inner.c w = (v << 1) ^ (uint8x16_t)(((int8x16_t)v >> 7) & 0x1b); v 89 crypto/aegis128-neon-inner.c w ^= (uint8x16_t)vrev32q_u16((uint16x8_t)v); v 90 crypto/aegis128-neon-inner.c w ^= vqtbl1q_u8(v ^ w, vld1q_u8(ror32by8)); v 110 crypto/aegis128-neon-inner.c m ^= aegis_aes_round(st.v[4]); v 111 crypto/aegis128-neon-inner.c st.v[4] ^= aegis_aes_round(st.v[3]); v 112 crypto/aegis128-neon-inner.c st.v[3] ^= aegis_aes_round(st.v[2]); v 113 crypto/aegis128-neon-inner.c st.v[2] ^= aegis_aes_round(st.v[1]); v 114 crypto/aegis128-neon-inner.c st.v[1] ^= aegis_aes_round(st.v[0]); v 115 crypto/aegis128-neon-inner.c st.v[0] ^= m; v 155 crypto/aegis128-neon-inner.c uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4]; v 167 crypto/aegis128-neon-inner.c uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4]; v 189 crypto/aegis128-neon-inner.c msg = vld1q_u8(src) ^ st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4]; v 199 crypto/aegis128-neon-inner.c uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4]; v 562 crypto/anubis.c u32 v = ctx->E[R - r][i]; v 564 crypto/anubis.c T0[T4[(v >> 24) ] & 0xff] ^ v 565 crypto/anubis.c T1[T4[(v >> 16) & 0xff] & 0xff] ^ v 566 crypto/anubis.c T2[T4[(v >> 8) & 0xff] & 0xff] ^ v 567 crypto/anubis.c T3[T4[(v ) & 0xff] & 0xff]; v 247 crypto/api.c int crypto_probing_notify(unsigned long val, void *v) v 251 crypto/api.c ok = blocking_notifier_call_chain(&crypto_chain, val, v); v 254 crypto/api.c ok = blocking_notifier_call_chain(&crypto_chain, val, v); v 482 crypto/asymmetric_keys/x509_cert_parser.c const unsigned char *v = value; v 490 crypto/asymmetric_keys/x509_cert_parser.c if (v[0] != ASN1_OTS || v[1] != vlen - 2) v 492 crypto/asymmetric_keys/x509_cert_parser.c v += 2; v 496 crypto/asymmetric_keys/x509_cert_parser.c ctx->cert->raw_skid = v; v 497 crypto/asymmetric_keys/x509_cert_parser.c kid = asymmetric_key_generate_id(v, vlen, "", 0); v 507 crypto/asymmetric_keys/x509_cert_parser.c ctx->raw_akid = v; v 604 crypto/ecc.c u64 *v[2] = { tmp, product }; v 626 crypto/ecc.c u64 diff = v[i][j] - mod_m[j] - borrow; v 628 crypto/ecc.c if (diff != v[i][j]) v 629 crypto/ecc.c borrow = (diff > v[i][j]); v 630 crypto/ecc.c v[1 - i][j] = diff; v 637 crypto/ecc.c vli_set(result, v[i], ndigits); v 862 crypto/ecc.c u64 u[ECC_MAX_DIGITS], v[ECC_MAX_DIGITS]; v 875 crypto/ecc.c vli_clear(v, ndigits); v 892 crypto/ecc.c if (!EVEN(v)) v 893 crypto/ecc.c carry = vli_add(v, v, mod, ndigits); v 895 crypto/ecc.c vli_rshift1(v, ndigits); v 897 crypto/ecc.c v[ndigits - 1] |= 0x8000000000000000ull; v 902 crypto/ecc.c if (vli_cmp(u, v, ndigits) < 0) v 905 crypto/ecc.c vli_sub(u, u, v, ndigits); v 916 crypto/ecc.c if (vli_cmp(v, u, ndigits) < 0) v 917 crypto/ecc.c vli_add(v, v, mod, ndigits); v 919 crypto/ecc.c vli_sub(v, v, u, ndigits); v 920 crypto/ecc.c if (!EVEN(v)) v 921 crypto/ecc.c carry = vli_add(v, v, mod, ndigits); v 923 crypto/ecc.c vli_rshift1(v, ndigits); v 925 crypto/ecc.c v[ndigits - 1] |= 0x8000000000000000ull; v 81 crypto/ecrdsa.c u64 *v = e; /* e^{-1} \mod q */ v 129 crypto/ecrdsa.c vli_mod_inv(v, e, ctx->curve->n, ndigits); v 132 crypto/ecrdsa.c vli_mod_mult_slow(z1, s, v, ctx->curve->n, ndigits); v 134 crypto/ecrdsa.c vli_mod_mult_slow(z2, _r, v, ctx->curve->n, ndigits); v 81 crypto/internal.h int crypto_probing_notify(unsigned long val, void *v); v 125 crypto/internal.h static inline void crypto_notify(unsigned long val, void *v) v 127 crypto/internal.h blocking_notifier_call_chain(&crypto_chain, val, v); v 27 crypto/poly1305_generic.c static inline u32 sr(u64 v, u_char n) v 29 crypto/poly1305_generic.c return v >> n; v 32 crypto/poly1305_generic.c static inline u32 and(u32 v, u32 mask) v 34 crypto/poly1305_generic.c return v & mask; v 232 crypto/skcipher.c void *v; v 258 crypto/skcipher.c v = kzalloc(n, skcipher_walk_gfp(walk)); v 259 crypto/skcipher.c if (!v) v 263 crypto/skcipher.c p = v; v 268 crypto/skcipher.c walk->buffer = v; v 269 crypto/skcipher.c buffer = v; v 3206 crypto/testmgr.c memcpy(seed, template[i].v, template[i].vlen); v 119 crypto/testmgr.h const char *v; v 19541 crypto/testmgr.h .v = "\x80\x00\x00\x00\x00\x00\x00\x00" v 19555 crypto/testmgr.h .v = "\xc0\x00\x00\x00\x00\x00\x00\x00" v 19569 crypto/testmgr.h .v = "\xe0\x00\x00\x00\x00\x00\x00\x00" v 19583 crypto/testmgr.h .v = "\xf0\x00\x00\x00\x00\x00\x00\x00" v 19597 crypto/testmgr.h .v = "\xf8\x00\x00\x00\x00\x00\x00\x00" v 19611 crypto/testmgr.h .v = "\x57\x2c\x8e\x76\x87\x26\x47\x97" v 188 drivers/acpi/apei/einj.c struct vendor_error_type_extension *v; v 193 drivers/acpi/apei/einj.c v = acpi_os_map_iomem(paddr + offset, sizeof(*v)); v 194 drivers/acpi/apei/einj.c if (!v) v 196 drivers/acpi/apei/einj.c sbdf = v->pcie_sbdf; v 200 drivers/acpi/apei/einj.c v->vendor_id, v->device_id, v->rev_id); v 201 drivers/acpi/apei/einj.c acpi_os_unmap_iomem(v, sizeof(*v)); v 566 drivers/acpi/apei/einj.c static int available_error_type_show(struct seq_file *m, void *v) v 37 drivers/acpi/sysfs.c #define ACPI_DEBUG_INIT(v) { .name = #v, .value = v } v 106 drivers/acpi/x86/apple.c unsigned int v = k + 1; v 118 drivers/acpi/x86/apple.c newprops[v].type = val->type; v 120 drivers/acpi/x86/apple.c newprops[v].integer.value = val->integer.value; v 122 drivers/acpi/x86/apple.c newprops[v].buffer.length = val->buffer.length; v 123 drivers/acpi/x86/apple.c newprops[v].buffer.pointer = free_space; v 3222 drivers/ata/libata-core.c #define ENOUGH(v, unit) (((v)-1)/(unit)+1) v 3223 drivers/ata/libata-core.c #define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0) v 364 drivers/ata/pata_atp867x.c u8 v; v 369 drivers/ata/pata_atp867x.c pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v); v 370 drivers/ata/pata_atp867x.c if (v < 0x80) { v 371 drivers/ata/pata_atp867x.c v = 0x80; v 372 drivers/ata/pata_atp867x.c pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v); v 374 drivers/ata/pata_atp867x.c " to %d\n", pci_name(pdev), v); v 390 drivers/ata/pata_atp867x.c v = ioread8(ATP867X_IOBASE(ap) + 0x28); v 391 drivers/ata/pata_atp867x.c v &= 0xcf; /* Enable INTA#: bit4=0 means enable */ v 392 drivers/ata/pata_atp867x.c v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */ v 393 drivers/ata/pata_atp867x.c iowrite8(v, ATP867X_IOBASE(ap) + 0x28); v 398 drivers/ata/pata_atp867x.c v = ioread8(ATP867X_SYS_INFO(ap)); v 399 drivers/ata/pata_atp867x.c v &= ATP867X_IO_SYS_MASK_RESERVED; v 401 drivers/ata/pata_atp867x.c v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5; v 402 drivers/ata/pata_atp867x.c iowrite8(v, ATP867X_SYS_INFO(ap)); v 708 drivers/ata/pata_ep93xx.c u32 v = qc->dma_dir == DMA_TO_DEVICE ? IDEUDMAOP_RWOP : 0; v 734 drivers/ata/pata_ep93xx.c writel(v, base + IDEUDMAOP); v 736 drivers/ata/pata_ep93xx.c writel(v | IDEUDMAOP_UEN, base + IDEUDMAOP); v 193 drivers/ata/pata_it821x.c u8 v; v 223 drivers/ata/pata_it821x.c pci_read_config_byte(pdev, 0x50, &v); v 224 drivers/ata/pata_it821x.c v &= ~(1 << (1 + ap->port_no)); v 225 drivers/ata/pata_it821x.c v |= sel << (1 + ap->port_no); v 226 drivers/ata/pata_it821x.c pci_write_config_byte(pdev, 0x50, v); v 75 drivers/ata/pata_mpc52xx.c #define CALC_CLKCYC(c,v) ((((v)+(c)-1)/(c))) v 50 drivers/ata/sata_dwc_460ex.c #define sata_dwc_writel(a, v) writel_relaxed(v, a) v 126 drivers/ata/sata_dwc_460ex.c #define SATA_DWC_SCR0_SPD_GET(v) (((v) >> 4) & 0x0000000F) v 127 drivers/ata/sata_dwc_460ex.c #define SATA_DWC_DMACR_TX_CLEAR(v) (((v) & ~SATA_DWC_DMACR_TXCHEN) |\ v 129 drivers/ata/sata_dwc_460ex.c #define SATA_DWC_DMACR_RX_CLEAR(v) (((v) & ~SATA_DWC_DMACR_RXCHEN) |\ v 206 drivers/ata/sata_via.c u32 v = 0; v 214 drivers/ata/sata_via.c v |= raw & 0x03; v 218 drivers/ata/sata_via.c v |= 0x02 << 4; v 220 drivers/ata/sata_via.c v |= 0x01 << 4; v 223 drivers/ata/sata_via.c v |= ipm_tbl[(raw >> 2) & 0x3]; v 229 drivers/ata/sata_via.c pci_read_config_dword(pdev, 0xB0 + slot * 4, &v); v 236 drivers/ata/sata_via.c v |= ((raw & 0x02) << 1) | (raw & 0x01); v 239 drivers/ata/sata_via.c v |= ((raw >> 2) & 0x03) << 8; v 246 drivers/ata/sata_via.c *val = v; v 254 drivers/ata/sata_via.c u32 v = 0; v 265 drivers/ata/sata_via.c v |= ((val & 0x4) >> 1) | (val & 0x1); v 268 drivers/ata/sata_via.c v |= ((val >> 8) & 0x3) << 2; v 270 drivers/ata/sata_via.c pci_write_config_byte(pdev, 0xA4 + slot, v); v 161 drivers/atm/eni.c #define eni_out(v,r) writel((v),eni_dev->reg+(r)*4) v 1061 drivers/atm/iphase.h #define INPH_IA_VCC(v) ((struct ia_vcc *) (v)->dev_data) v 947 drivers/atm/lanai.c u32 v; v 992 drivers/atm/lanai.c v = eeprom_be4(lanai, EEPROM_SERIAL_REV); v 993 drivers/atm/lanai.c if ((lanai->serialno ^ v) != 0xFFFFFFFF) { v 996 drivers/atm/lanai.c (unsigned int) lanai->serialno, (unsigned int) v); v 1002 drivers/atm/lanai.c v = eeprom_be4(lanai, EEPROM_MAGIC_REV); v 1003 drivers/atm/lanai.c if ((lanai->magicno ^ v) != 0xFFFFFFFF) { v 1006 drivers/atm/lanai.c lanai->magicno, v); v 52 drivers/atm/suni.c #define ADD_LIMITED(s,v) \ v 53 drivers/atm/suni.c atomic_add((v),&stats->s); \ v 164 drivers/atm/uPD98402.c #define ADD_LIMITED(s,v) \ v 165 drivers/atm/uPD98402.c { atomic_add(GET(v),&PRIV(dev)->sonet_stats.s); \ v 129 drivers/atm/zatm.c #define zout(v,r) outl(v,zatm_dev->base+uPD98401_##r*4) v 1434 drivers/auxdisplay/panel.c __u64 m, v; v 1439 drivers/auxdisplay/panel.c v = 0ULL; v 1467 drivers/auxdisplay/panel.c v |= 1ULL << bit; v 1471 drivers/auxdisplay/panel.c *value = v; v 159 drivers/base/memory.c int memory_notify(unsigned long val, void *v) v 161 drivers/base/memory.c return blocking_notifier_call_chain(&memory_chain, val, v); v 164 drivers/base/memory.c int memory_isolate_notify(unsigned long val, void *v) v 166 drivers/base/memory.c return atomic_notifier_call_chain(&memory_isolate_chain, val, v); v 1064 drivers/base/power/wakeup.c void *v, loff_t *pos) v 1066 drivers/base/power/wakeup.c struct wakeup_source *ws = v; v 1079 drivers/base/power/wakeup.c static void wakeup_sources_stats_seq_stop(struct seq_file *m, void *v) v 1091 drivers/base/power/wakeup.c static int wakeup_sources_stats_seq_show(struct seq_file *m, void *v) v 1093 drivers/base/power/wakeup.c struct wakeup_source *ws = v; v 2597 drivers/base/regmap/regmap.c unsigned int v; v 2652 drivers/base/regmap/regmap.c &v); v 2656 drivers/base/regmap/regmap.c map->format.format_val(val + (i * val_bytes), v, 0); v 36 drivers/bcma/driver_pci.c u32 v; v 39 drivers/bcma/driver_pci.c v = BCMA_CORE_PCI_MDIODATA_START; v 40 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_WRITE; v 41 drivers/bcma/driver_pci.c v |= (BCMA_CORE_PCI_MDIODATA_DEV_ADDR << v 43 drivers/bcma/driver_pci.c v |= (BCMA_CORE_PCI_MDIODATA_BLK_ADDR << v 45 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_TA; v 46 drivers/bcma/driver_pci.c v |= (phy << 4); v 47 drivers/bcma/driver_pci.c pcicore_write32(pc, BCMA_CORE_PCI_MDIO_DATA, v); v 51 drivers/bcma/driver_pci.c v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); v 52 drivers/bcma/driver_pci.c if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) v 62 drivers/bcma/driver_pci.c u32 v; v 66 drivers/bcma/driver_pci.c v = BCMA_CORE_PCI_MDIOCTL_PREAM_EN; v 67 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIOCTL_DIVISOR_VAL; v 68 drivers/bcma/driver_pci.c pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, v); v 73 drivers/bcma/driver_pci.c v = (BCMA_CORE_PCI_MDIODATA_DEV_ADDR << v 75 drivers/bcma/driver_pci.c v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF); v 77 drivers/bcma/driver_pci.c v = (device << BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF_OLD); v 78 drivers/bcma/driver_pci.c v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD); v 81 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_START; v 82 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_READ; v 83 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_TA; v 85 drivers/bcma/driver_pci.c pcicore_write32(pc, BCMA_CORE_PCI_MDIO_DATA, v); v 89 drivers/bcma/driver_pci.c v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); v 90 drivers/bcma/driver_pci.c if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) { v 105 drivers/bcma/driver_pci.c u32 v; v 109 drivers/bcma/driver_pci.c v = BCMA_CORE_PCI_MDIOCTL_PREAM_EN; v 110 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIOCTL_DIVISOR_VAL; v 111 drivers/bcma/driver_pci.c pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, v); v 116 drivers/bcma/driver_pci.c v = (BCMA_CORE_PCI_MDIODATA_DEV_ADDR << v 118 drivers/bcma/driver_pci.c v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF); v 120 drivers/bcma/driver_pci.c v = (device << BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF_OLD); v 121 drivers/bcma/driver_pci.c v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD); v 124 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_START; v 125 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_WRITE; v 126 drivers/bcma/driver_pci.c v |= BCMA_CORE_PCI_MDIODATA_TA; v 127 drivers/bcma/driver_pci.c v |= data; v 128 drivers/bcma/driver_pci.c pcicore_write32(pc, BCMA_CORE_PCI_MDIO_DATA, v); v 132 drivers/bcma/driver_pci.c v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); v 133 drivers/bcma/driver_pci.c if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) v 206 drivers/bcma/sprom.c u16 v; v 209 drivers/bcma/sprom.c v = in[SPOFF(offset)]; v 210 drivers/bcma/sprom.c gain = (v & mask) >> shift; v 223 drivers/bcma/sprom.c u16 v, o; v 233 drivers/bcma/sprom.c v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i]; v 234 drivers/bcma/sprom.c *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v); v 1629 drivers/block/drbd/drbd_int.h int drbd_seq_show(struct seq_file *seq, void *v); v 26 drivers/block/drbd/drbd_proc.c static void seq_printf_with_thousands_grouping(struct seq_file *seq, long v) v 29 drivers/block/drbd/drbd_proc.c if (unlikely(v >= 1000000)) { v 31 drivers/block/drbd/drbd_proc.c seq_printf(seq, "%ld,", v / 1000000); v 32 drivers/block/drbd/drbd_proc.c v %= 1000000; v 33 drivers/block/drbd/drbd_proc.c seq_printf(seq, "%03ld,%03ld", v/1000, v % 1000); v 34 drivers/block/drbd/drbd_proc.c } else if (likely(v >= 1000)) v 35 drivers/block/drbd/drbd_proc.c seq_printf(seq, "%ld,%03ld", v/1000, v % 1000); v 37 drivers/block/drbd/drbd_proc.c seq_printf(seq, "%ld", v); v 215 drivers/block/drbd/drbd_proc.c int drbd_seq_show(struct seq_file *seq, void *v) v 138 drivers/block/drbd/drbd_vli.h #define LEVEL(t,b,v) \ v 140 drivers/block/drbd/drbd_vli.h if ((in & ((1 << b) -1)) == v) { \ v 164 drivers/block/drbd/drbd_vli.h #define LEVEL(t,b,v) do { \ v 168 drivers/block/drbd/drbd_vli.h *out = ((in - adj) << b) | v; \ v 3679 drivers/block/floppy.c struct floppy_struct v; v 3689 drivers/block/floppy.c memset(&v, 0, sizeof(struct floppy_struct)); v 3690 drivers/block/floppy.c if (copy_from_user(&v, arg, offsetof(struct floppy_struct, name))) v 3697 drivers/block/floppy.c &v, drive, type, bdev); v 3705 drivers/block/floppy.c struct compat_floppy_struct v; v 3709 drivers/block/floppy.c memset(&v, 0, sizeof(v)); v 3716 drivers/block/floppy.c memcpy(&v, p, offsetof(struct floppy_struct, name)); v 3718 drivers/block/floppy.c if (copy_to_user(arg, &v, sizeof(struct compat_floppy_struct))) v 3726 drivers/block/floppy.c struct compat_floppy_drive_params v; v 3730 drivers/block/floppy.c if (copy_from_user(&v, arg, sizeof(struct compat_floppy_drive_params))) v 3732 drivers/block/floppy.c if (!valid_floppy_drive_params(v.autodetect, v.native_format)) v 3735 drivers/block/floppy.c UDP->cmos = v.cmos; v 3736 drivers/block/floppy.c UDP->max_dtr = v.max_dtr; v 3737 drivers/block/floppy.c UDP->hlt = v.hlt; v 3738 drivers/block/floppy.c UDP->hut = v.hut; v 3739 drivers/block/floppy.c UDP->srt = v.srt; v 3740 drivers/block/floppy.c UDP->spinup = v.spinup; v 3741 drivers/block/floppy.c UDP->spindown = v.spindown; v 3742 drivers/block/floppy.c UDP->spindown_offset = v.spindown_offset; v 3743 drivers/block/floppy.c UDP->select_delay = v.select_delay; v 3744 drivers/block/floppy.c UDP->rps = v.rps; v 3745 drivers/block/floppy.c UDP->tracks = v.tracks; v 3746 drivers/block/floppy.c UDP->timeout = v.timeout; v 3747 drivers/block/floppy.c UDP->interleave_sect = v.interleave_sect; v 3748 drivers/block/floppy.c UDP->max_errors = v.max_errors; v 3749 drivers/block/floppy.c UDP->flags = v.flags; v 3750 drivers/block/floppy.c UDP->read_track = v.read_track; v 3751 drivers/block/floppy.c memcpy(UDP->autodetect, v.autodetect, sizeof(v.autodetect)); v 3752 drivers/block/floppy.c UDP->checkfreq = v.checkfreq; v 3753 drivers/block/floppy.c UDP->native_format = v.native_format; v 3761 drivers/block/floppy.c struct compat_floppy_drive_params v; v 3763 drivers/block/floppy.c memset(&v, 0, sizeof(struct compat_floppy_drive_params)); v 3765 drivers/block/floppy.c v.cmos = UDP->cmos; v 3766 drivers/block/floppy.c v.max_dtr = UDP->max_dtr; v 3767 drivers/block/floppy.c v.hlt = UDP->hlt; v 3768 drivers/block/floppy.c v.hut = UDP->hut; v 3769 drivers/block/floppy.c v.srt = UDP->srt; v 3770 drivers/block/floppy.c v.spinup = UDP->spinup; v 3771 drivers/block/floppy.c v.spindown = UDP->spindown; v 3772 drivers/block/floppy.c v.spindown_offset = UDP->spindown_offset; v 3773 drivers/block/floppy.c v.select_delay = UDP->select_delay; v 3774 drivers/block/floppy.c v.rps = UDP->rps; v 3775 drivers/block/floppy.c v.tracks = UDP->tracks; v 3776 drivers/block/floppy.c v.timeout = UDP->timeout; v 3777 drivers/block/floppy.c v.interleave_sect = UDP->interleave_sect; v 3778 drivers/block/floppy.c v.max_errors = UDP->max_errors; v 3779 drivers/block/floppy.c v.flags = UDP->flags; v 3780 drivers/block/floppy.c v.read_track = UDP->read_track; v 3781 drivers/block/floppy.c memcpy(v.autodetect, UDP->autodetect, sizeof(v.autodetect)); v 3782 drivers/block/floppy.c v.checkfreq = UDP->checkfreq; v 3783 drivers/block/floppy.c v.native_format = UDP->native_format; v 3786 drivers/block/floppy.c if (copy_to_user(arg, &v, sizeof(struct compat_floppy_drive_params))) v 3794 drivers/block/floppy.c struct compat_floppy_drive_struct v; v 3796 drivers/block/floppy.c memset(&v, 0, sizeof(struct compat_floppy_drive_struct)); v 3806 drivers/block/floppy.c v.spinup_date = UDRS->spinup_date; v 3807 drivers/block/floppy.c v.select_date = UDRS->select_date; v 3808 drivers/block/floppy.c v.first_read_date = UDRS->first_read_date; v 3809 drivers/block/floppy.c v.probed_format = UDRS->probed_format; v 3810 drivers/block/floppy.c v.track = UDRS->track; v 3811 drivers/block/floppy.c v.maxblock = UDRS->maxblock; v 3812 drivers/block/floppy.c v.maxtrack = UDRS->maxtrack; v 3813 drivers/block/floppy.c v.generation = UDRS->generation; v 3814 drivers/block/floppy.c v.keep_data = UDRS->keep_data; v 3815 drivers/block/floppy.c v.fd_ref = UDRS->fd_ref; v 3816 drivers/block/floppy.c v.fd_device = UDRS->fd_device; v 3817 drivers/block/floppy.c v.last_checked = UDRS->last_checked; v 3818 drivers/block/floppy.c v.dmabuf = (uintptr_t)UDRS->dmabuf; v 3819 drivers/block/floppy.c v.bufblocks = UDRS->bufblocks; v 3822 drivers/block/floppy.c if (copy_to_user(arg, &v, sizeof(struct compat_floppy_drive_struct))) v 3834 drivers/block/floppy.c struct floppy_fdc_state v; v 3837 drivers/block/floppy.c v = *UFDCS; v 3841 drivers/block/floppy.c v32.spec1 = v.spec1; v 3842 drivers/block/floppy.c v32.spec2 = v.spec2; v 3843 drivers/block/floppy.c v32.dtr = v.dtr; v 3844 drivers/block/floppy.c v32.version = v.version; v 3845 drivers/block/floppy.c v32.dor = v.dor; v 3846 drivers/block/floppy.c v32.address = v.address; v 3847 drivers/block/floppy.c v32.rawcmd = v.rawcmd; v 3848 drivers/block/floppy.c v32.reset = v.reset; v 3849 drivers/block/floppy.c v32.need_configure = v.need_configure; v 3850 drivers/block/floppy.c v32.perp_mode = v.perp_mode; v 3851 drivers/block/floppy.c v32.has_fifo = v.has_fifo; v 3852 drivers/block/floppy.c v32.driver_version = v.driver_version; v 3853 drivers/block/floppy.c memcpy(v32.track, v.track, 4); v 3863 drivers/block/floppy.c struct floppy_write_errors v; v 3867 drivers/block/floppy.c v = *UDRWE; v 3869 drivers/block/floppy.c v32.write_errors = v.write_errors; v 3870 drivers/block/floppy.c v32.first_error_sector = v.first_error_sector; v 3871 drivers/block/floppy.c v32.first_error_generation = v.first_error_generation; v 3872 drivers/block/floppy.c v32.last_error_sector = v.last_error_sector; v 3873 drivers/block/floppy.c v32.last_error_generation = v.last_error_generation; v 3874 drivers/block/floppy.c v32.badness = v.badness; v 105 drivers/block/paride/bpck.c #define WR(r,v) bpck_write_regr(pi,2,r,v) v 350 drivers/block/paride/bpck.c { int i, j, k, p, v, f, om, od; v 372 drivers/block/paride/bpck.c v = 0; v 378 drivers/block/paride/bpck.c v = 2*v + (f == 0x84); v 380 drivers/block/paride/bpck.c buf[2*i+1-j] = v; v 200 drivers/block/paride/epat.c #define WR(r,v) epat_write_regr(pi,2,r,v) v 205 drivers/block/paride/epat.c #define WRi(r,v) epat_write_regr(pi,0,r,v) v 104 drivers/block/paride/epia.c #define WR(r,v) epia_write_regr(pi,0,r,v) v 28 drivers/block/paride/on20.c #define vl(v) w2(4);w0(v);w2(5);w2(7);w2(5);w2(4); v 619 drivers/block/paride/pf.c int v, k; v 621 drivers/block/paride/pf.c v = 0; v 623 drivers/block/paride/pf.c v = v * 256 + (buf[k + offs] & 0xff); v 624 drivers/block/paride/pf.c return v; v 520 drivers/block/paride/pt.c int v, k; v 522 drivers/block/paride/pt.c v = 0; v 524 drivers/block/paride/pt.c v = v * 256 + (buf[k + offs] & 0xff); v 525 drivers/block/paride/pt.c return v; v 212 drivers/block/pktcdvd.c int v; v 230 drivers/block/pktcdvd.c v = pd->bio_queue_size; v 232 drivers/block/pktcdvd.c n = sprintf(data, "%d\n", v); v 236 drivers/block/pktcdvd.c v = pd->write_congestion_off; v 238 drivers/block/pktcdvd.c n = sprintf(data, "%d\n", v); v 242 drivers/block/pktcdvd.c v = pd->write_congestion_on; v 244 drivers/block/pktcdvd.c n = sprintf(data, "%d\n", v); v 518 drivers/block/ps3vram.c static int ps3vram_proc_show(struct seq_file *m, void *v) v 60 drivers/block/rbd.c static int atomic_inc_return_safe(atomic_t *v) v 64 drivers/block/rbd.c counter = (unsigned int)atomic_fetch_add_unless(v, 1, 0); v 68 drivers/block/rbd.c atomic_dec(v); v 74 drivers/block/rbd.c static int atomic_dec_return_safe(atomic_t *v) v 78 drivers/block/rbd.c counter = atomic_dec_return(v); v 82 drivers/block/rbd.c atomic_inc(v); v 62 drivers/block/swim.c #define swim_write(base, reg, v) out_8(&(base)->write_##reg, (v)) v 86 drivers/block/swim.c #define iwm_write(base, reg, v) out_8(&(base)->reg, (v)) v 802 drivers/block/virtio_blk.c u32 v, blk_size, max_size, sg_elems, opt_io_size; v 914 drivers/block/virtio_blk.c struct virtio_blk_config, size_max, &v); v 916 drivers/block/virtio_blk.c max_size = min(max_size, v); v 959 drivers/block/virtio_blk.c discard_sector_alignment, &v); v 960 drivers/block/virtio_blk.c q->limits.discard_alignment = v ? v << SECTOR_SHIFT : 0; v 963 drivers/block/virtio_blk.c max_discard_sectors, &v); v 964 drivers/block/virtio_blk.c blk_queue_max_discard_sectors(q, v ? v : UINT_MAX); v 967 drivers/block/virtio_blk.c &v); v 969 drivers/block/virtio_blk.c min_not_zero(v, v 977 drivers/block/virtio_blk.c max_write_zeroes_sectors, &v); v 978 drivers/block/virtio_blk.c blk_queue_max_write_zeroes_sectors(q, v ? v : UINT_MAX); v 265 drivers/bus/brcmstb_gisb.c static int dump_gisb_error(struct notifier_block *self, unsigned long v, v 276 drivers/bus/brcmstb_gisb.c static int dump_gisb_error(struct notifier_block *self, unsigned long v, v 122 drivers/bus/mvebu-mbus.c struct seq_file *seq, void *v); v 412 drivers/bus/mvebu-mbus.c struct seq_file *seq, void *v) v 442 drivers/bus/mvebu-mbus.c struct seq_file *seq, void *v) v 467 drivers/bus/mvebu-mbus.c static int mvebu_sdram_debug_show(struct seq_file *seq, void *v) v 470 drivers/bus/mvebu-mbus.c return mbus->soc->show_cpu_target(mbus, seq, v); v 485 drivers/bus/mvebu-mbus.c static int mvebu_devs_debug_show(struct seq_file *seq, void *v) v 319 drivers/bus/omap_l3_smx.h #define __raw_writell(v, a) (__chk_io_ptr(a), \ v 320 drivers/bus/omap_l3_smx.h *(volatile u64 __force *)(a) = (v)) v 73 drivers/bus/sunxi-rsb.c #define RSB_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8) v 75 drivers/bus/sunxi-rsb.c #define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV) v 79 drivers/bus/sunxi-rsb.c #define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf) v 109 drivers/bus/sunxi-rsb.c #define RSB_DAR_RTA(v) (((v) & 0xff) << 16) v 110 drivers/bus/sunxi-rsb.c #define RSB_DAR_DA(v) ((v) & 0xffff) v 436 drivers/char/apm-emulation.c static int proc_apm_show(struct seq_file *m, void *v) v 334 drivers/char/ds1620.c static int ds1620_proc_therm_show(struct seq_file *m, void *v) v 277 drivers/char/efirtc.c static int efi_rtc_proc_show(struct seq_file *m, void *v) v 132 drivers/char/hpet.c static inline void writeq(unsigned long long v, void __iomem *addr) v 134 drivers/char/hpet.c writel(v & 0xffffffff, addr); v 135 drivers/char/hpet.c writel(v >> 32, addr + 4); v 200 drivers/char/hpet.c unsigned long v; v 213 drivers/char/hpet.c v = readl(&timer->hpet_config); v 214 drivers/char/hpet.c if (!(v & Tn_INT_TYPE_CNF_MASK)) { v 215 drivers/char/hpet.c v |= Tn_INT_TYPE_CNF_MASK; v 216 drivers/char/hpet.c writel(v, &timer->hpet_config); v 220 drivers/char/hpet.c v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> v 228 drivers/char/hpet.c v &= ~0xf3df; v 230 drivers/char/hpet.c v &= ~0xffff; v 232 drivers/char/hpet.c for_each_set_bit(irq, &v, HPET_MAX_IRQ) { v 248 drivers/char/hpet.c v = readl(&timer->hpet_config); v 249 drivers/char/hpet.c v |= irq << Tn_INT_ROUTE_CNF_SHIFT; v 250 drivers/char/hpet.c writel(v, &timer->hpet_config); v 344 drivers/char/hpet.c unsigned long v; v 355 drivers/char/hpet.c v = devp->hd_irqdata; v 358 drivers/char/hpet.c if (v != 0) v 436 drivers/char/hpet.c unsigned long v; v 438 drivers/char/hpet.c v = readq(&timer->hpet_config); v 439 drivers/char/hpet.c v ^= Tn_TYPE_CNF_MASK; v 440 drivers/char/hpet.c writeq(v, &timer->hpet_config); v 459 drivers/char/hpet.c unsigned long g, v, t, m; v 520 drivers/char/hpet.c v = readq(&timer->hpet_config); v 525 drivers/char/hpet.c g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; v 529 drivers/char/hpet.c v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; v 530 drivers/char/hpet.c writeq(v, &timer->hpet_config); v 580 drivers/char/hpet.c unsigned long v; v 603 drivers/char/hpet.c v = readq(&timer->hpet_config); v 604 drivers/char/hpet.c v &= ~Tn_INT_ENB_CNF_MASK; v 605 drivers/char/hpet.c writeq(v, &timer->hpet_config); v 625 drivers/char/hpet.c v = readq(&timer->hpet_config); v 626 drivers/char/hpet.c if ((v & Tn_PER_INT_CAP_MASK) == 0) { v 633 drivers/char/hpet.c v = readq(&timer->hpet_config); v 634 drivers/char/hpet.c if ((v & Tn_PER_INT_CAP_MASK) == 0) { v 640 drivers/char/hpet.c v = readq(&timer->hpet_config); v 641 drivers/char/hpet.c v ^= Tn_TYPE_CNF_MASK; v 642 drivers/char/hpet.c writeq(v, &timer->hpet_config); v 74 drivers/char/hw_random/pic32-rng.c u32 v; v 95 drivers/char/hw_random/pic32-rng.c v = TRNGEN | TRNGMOD; v 96 drivers/char/hw_random/pic32-rng.c writel(v, priv->base + RNGCON); v 59 drivers/char/ipmi/ipmi_si_hotmod.c static int parse_str(const struct hotmod_vals *v, unsigned int *val, char *name, v 72 drivers/char/ipmi/ipmi_si_hotmod.c for (i = 0; v[i].name; i++) { v 73 drivers/char/ipmi/ipmi_si_hotmod.c if (strcmp(*curr, v[i].name) == 0) { v 74 drivers/char/ipmi/ipmi_si_hotmod.c *val = v[i].val; v 73 drivers/char/misc.c static void *misc_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 75 drivers/char/misc.c return seq_list_next(v, &misc_list, pos); v 78 drivers/char/misc.c static void misc_seq_stop(struct seq_file *seq, void *v) v 83 drivers/char/misc.c static int misc_seq_show(struct seq_file *seq, void *v) v 85 drivers/char/misc.c const struct miscdevice *p = list_entry(v, struct miscdevice, list); v 2604 drivers/char/pcmcia/synclink_cs.c static int mgslpc_proc_show(struct seq_file *m, void *v) v 1054 drivers/char/random.c unsigned long v, flags; v 1061 drivers/char/random.c if (arch_get_random_long(&v)) v 1062 drivers/char/random.c crng->state[14] ^= v; v 1515 drivers/char/random.c unsigned long v; v 1516 drivers/char/random.c if (!arch_get_random_long(&v)) v 1518 drivers/char/random.c hash.l[i] = v; v 1905 drivers/char/random.c unsigned long v; v 1908 drivers/char/random.c if (!arch_get_random_long(&v)) v 1911 drivers/char/random.c memcpy(p, &v, chunk); v 170 drivers/char/rtc.c static int rtc_proc_show(struct seq_file *seq, void *v); v 1102 drivers/char/rtc.c static int rtc_proc_show(struct seq_file *seq, void *v) v 555 drivers/char/sonypi.c u32 v; v 557 drivers/char/sonypi.c pci_read_config_dword(sonypi_device.dev, SONYPI_G10A, &v); v 558 drivers/char/sonypi.c v = (v & 0xFFFF0000) | ((u32) sonypi_device.ioport1); v 559 drivers/char/sonypi.c pci_write_config_dword(sonypi_device.dev, SONYPI_G10A, v); v 561 drivers/char/sonypi.c pci_read_config_dword(sonypi_device.dev, SONYPI_G10A, &v); v 562 drivers/char/sonypi.c v = (v & 0xFFF0FFFF) | v 564 drivers/char/sonypi.c pci_write_config_dword(sonypi_device.dev, SONYPI_G10A, v); v 566 drivers/char/sonypi.c v = inl(SONYPI_IRQ_PORT); v 567 drivers/char/sonypi.c v &= ~(((u32) 0x3) << SONYPI_IRQ_SHIFT); v 568 drivers/char/sonypi.c v |= (((u32) sonypi_device.bits) << SONYPI_IRQ_SHIFT); v 569 drivers/char/sonypi.c outl(v, SONYPI_IRQ_PORT); v 571 drivers/char/sonypi.c pci_read_config_dword(sonypi_device.dev, SONYPI_G10A, &v); v 572 drivers/char/sonypi.c v = (v & 0xFF1FFFFF) | 0x00C00000; v 573 drivers/char/sonypi.c pci_write_config_dword(sonypi_device.dev, SONYPI_G10A, v); v 607 drivers/char/sonypi.c u32 v; v 609 drivers/char/sonypi.c pci_read_config_dword(sonypi_device.dev, SONYPI_G10A, &v); v 610 drivers/char/sonypi.c v = v & 0xFF3FFFFF; v 611 drivers/char/sonypi.c pci_write_config_dword(sonypi_device.dev, SONYPI_G10A, v); v 613 drivers/char/sonypi.c v = inl(SONYPI_IRQ_PORT); v 614 drivers/char/sonypi.c v |= (0x3 << SONYPI_IRQ_SHIFT); v 615 drivers/char/sonypi.c outl(v, SONYPI_IRQ_PORT); v 658 drivers/char/sonypi.c static u8 sonypi_call3(u8 dev, u8 fn, u8 v) v 667 drivers/char/sonypi.c outb(v, sonypi_device.ioport1); v 690 drivers/char/sonypi.c static void sonypi_set(u8 fn, u8 v) v 692 drivers/char/sonypi.c wait_on_command(0, sonypi_call3(0x90, fn, v), ITERATIONS_SHORT); v 698 drivers/char/sonypi.c u8 v; v 700 drivers/char/sonypi.c v = sonypi_call2(0x8f, SONYPI_CAMERA_STATUS); v 701 drivers/char/sonypi.c return (v != 0xff && (v & SONYPI_CAMERA_STATUS_READY)); v 295 drivers/char/toshiba.c static int proc_toshiba_show(struct seq_file *m, void *v) v 108 drivers/char/tpm/eventlog/tpm1.c static void *tpm1_bios_measurements_next(struct seq_file *m, void *v, v 111 drivers/char/tpm/eventlog/tpm1.c struct tcpa_event *event = v; v 121 drivers/char/tpm/eventlog/tpm1.c v += sizeof(struct tcpa_event) + converted_event_size; v 124 drivers/char/tpm/eventlog/tpm1.c if ((v + sizeof(struct tcpa_event)) > limit) v 127 drivers/char/tpm/eventlog/tpm1.c event = v; v 133 drivers/char/tpm/eventlog/tpm1.c ((v + sizeof(struct tcpa_event) + converted_event_size) > limit)) v 136 drivers/char/tpm/eventlog/tpm1.c return v; v 139 drivers/char/tpm/eventlog/tpm1.c static void tpm1_bios_measurements_stop(struct seq_file *m, void *v) v 222 drivers/char/tpm/eventlog/tpm1.c static int tpm1_binary_bios_measurements_show(struct seq_file *m, void *v) v 224 drivers/char/tpm/eventlog/tpm1.c struct tcpa_event *event = v; v 241 drivers/char/tpm/eventlog/tpm1.c temp_ptr = (char *) v; v 251 drivers/char/tpm/eventlog/tpm1.c static int tpm1_ascii_bios_measurements_show(struct seq_file *m, void *v) v 255 drivers/char/tpm/eventlog/tpm1.c struct tcpa_event *event = v; v 257 drivers/char/tpm/eventlog/tpm1.c (unsigned char *)(v + sizeof(struct tcpa_event)); v 86 drivers/char/tpm/eventlog/tpm2.c static void *tpm2_bios_measurements_next(struct seq_file *m, void *v, v 100 drivers/char/tpm/eventlog/tpm2.c if (v == SEQ_START_TOKEN) { v 105 drivers/char/tpm/eventlog/tpm2.c event = v; v 115 drivers/char/tpm/eventlog/tpm2.c v = marker; v 116 drivers/char/tpm/eventlog/tpm2.c event = v; v 119 drivers/char/tpm/eventlog/tpm2.c if (((v + event_size) >= limit) || (event_size == 0)) v 122 drivers/char/tpm/eventlog/tpm2.c return v; v 125 drivers/char/tpm/eventlog/tpm2.c static void tpm2_bios_measurements_stop(struct seq_file *m, void *v) v 129 drivers/char/tpm/eventlog/tpm2.c static int tpm2_binary_bios_measurements_show(struct seq_file *m, void *v) v 134 drivers/char/tpm/eventlog/tpm2.c struct tcg_pcr_event2_head *event = v; v 138 drivers/char/tpm/eventlog/tpm2.c if (v == SEQ_START_TOKEN) { v 526 drivers/clk/clk-cdce706.c unsigned m, n, v; v 534 drivers/clk/clk-cdce706.c ret = cdce706_reg_read(cdce, CDCE706_PLL_HI(i), &v); v 537 drivers/clk/clk-cdce706.c cdce->pll[i].div = m | ((v & CDCE706_PLL_HI_M_MASK) << 8); v 538 drivers/clk/clk-cdce706.c cdce->pll[i].mul = n | ((v & CDCE706_PLL_HI_N_MASK) << v 170 drivers/clk/microchip/clk-core.c u32 v, div; v 174 drivers/clk/microchip/clk-core.c err = readl_poll_timeout(pb->ctrl_reg, v, v & PB_DIV_READY, v 185 drivers/clk/microchip/clk-core.c v = readl(pb->ctrl_reg); v 186 drivers/clk/microchip/clk-core.c v &= ~PB_DIV_MASK; v 187 drivers/clk/microchip/clk-core.c v |= (div - 1); v 191 drivers/clk/microchip/clk-core.c writel(v, pb->ctrl_reg); v 196 drivers/clk/microchip/clk-core.c err = readl_poll_timeout(pb->ctrl_reg, v, v & PB_DIV_READY, v 278 drivers/clk/microchip/clk-core.c u32 v, i; v 280 drivers/clk/microchip/clk-core.c v = (readl(refo->ctrl_reg) >> REFO_SEL_SHIFT) & REFO_SEL_MASK; v 283 drivers/clk/microchip/clk-core.c return v; v 286 drivers/clk/microchip/clk-core.c if (refo->parent_map[i] == v) v 360 drivers/clk/microchip/clk-core.c u32 v, rodiv, rotrim; v 363 drivers/clk/microchip/clk-core.c v = readl(refo->ctrl_reg); v 364 drivers/clk/microchip/clk-core.c rodiv = (v >> REFO_DIV_SHIFT) & REFO_DIV_MASK; v 367 drivers/clk/microchip/clk-core.c v = readl(refo->ctrl_reg + REFO_TRIM_REG); v 368 drivers/clk/microchip/clk-core.c rotrim = (v >> REFO_TRIM_SHIFT) & REFO_TRIM_MASK; v 443 drivers/clk/microchip/clk-core.c u32 v; v 450 drivers/clk/microchip/clk-core.c err = readl_poll_timeout(refo->ctrl_reg, v, !(v & REFO_ACTIVE), v 462 drivers/clk/microchip/clk-core.c v = readl(refo->ctrl_reg); v 463 drivers/clk/microchip/clk-core.c v &= ~(REFO_SEL_MASK << REFO_SEL_SHIFT); v 464 drivers/clk/microchip/clk-core.c v |= index << REFO_SEL_SHIFT; v 466 drivers/clk/microchip/clk-core.c writel(v, refo->ctrl_reg); v 480 drivers/clk/microchip/clk-core.c u32 trim, rodiv, v; v 490 drivers/clk/microchip/clk-core.c err = readl_poll_timeout(refo->ctrl_reg, v, v 491 drivers/clk/microchip/clk-core.c !(v & (REFO_ACTIVE | REFO_DIVSW_EN)), v 499 drivers/clk/microchip/clk-core.c v = readl(refo->ctrl_reg); v 507 drivers/clk/microchip/clk-core.c v &= ~(REFO_SEL_MASK << REFO_SEL_SHIFT); v 508 drivers/clk/microchip/clk-core.c v |= index << REFO_SEL_SHIFT; v 511 drivers/clk/microchip/clk-core.c v &= ~(REFO_DIV_MASK << REFO_DIV_SHIFT); v 512 drivers/clk/microchip/clk-core.c v |= rodiv << REFO_DIV_SHIFT; v 513 drivers/clk/microchip/clk-core.c writel(v, refo->ctrl_reg); v 516 drivers/clk/microchip/clk-core.c v = readl(refo->ctrl_reg + REFO_TRIM_REG); v 517 drivers/clk/microchip/clk-core.c v &= ~(REFO_TRIM_MASK << REFO_TRIM_SHIFT); v 518 drivers/clk/microchip/clk-core.c v |= trim << REFO_TRIM_SHIFT; v 519 drivers/clk/microchip/clk-core.c writel(v, refo->ctrl_reg + REFO_TRIM_REG); v 525 drivers/clk/microchip/clk-core.c err = readl_poll_timeout_atomic(refo->ctrl_reg, v, !(v & REFO_DIVSW_EN), v 647 drivers/clk/microchip/clk-core.c u32 mult, odiv, div, v; v 650 drivers/clk/microchip/clk-core.c v = readl(pll->ctrl_reg); v 651 drivers/clk/microchip/clk-core.c odiv = ((v >> PLL_ODIV_SHIFT) & PLL_ODIV_MASK); v 652 drivers/clk/microchip/clk-core.c mult = ((v >> PLL_MULT_SHIFT) & PLL_MULT_MASK) + 1; v 679 drivers/clk/microchip/clk-core.c u32 mult, odiv, v; v 700 drivers/clk/microchip/clk-core.c v = readl(pll->ctrl_reg); v 701 drivers/clk/microchip/clk-core.c v &= ~(PLL_MULT_MASK << PLL_MULT_SHIFT); v 702 drivers/clk/microchip/clk-core.c v &= ~(PLL_ODIV_MASK << PLL_ODIV_SHIFT); v 703 drivers/clk/microchip/clk-core.c v |= (mult << PLL_MULT_SHIFT) | (odiv << PLL_ODIV_SHIFT); v 708 drivers/clk/microchip/clk-core.c writel(v, pll->ctrl_reg); v 716 drivers/clk/microchip/clk-core.c err = readl_poll_timeout_atomic(pll->status_reg, v, v 717 drivers/clk/microchip/clk-core.c v & pll->lock_mask, 1, 100); v 792 drivers/clk/microchip/clk-core.c u32 v, div; v 800 drivers/clk/microchip/clk-core.c v = readl(sclk->slew_reg); v 801 drivers/clk/microchip/clk-core.c v &= ~(SLEW_SYSDIV << SLEW_SYSDIV_SHIFT); v 802 drivers/clk/microchip/clk-core.c v |= (div - 1) << SLEW_SYSDIV_SHIFT; v 806 drivers/clk/microchip/clk-core.c writel(v, sclk->slew_reg); v 809 drivers/clk/microchip/clk-core.c err = readl_poll_timeout_atomic(sclk->slew_reg, v, v 810 drivers/clk/microchip/clk-core.c !(v & SLEW_BUSY), 1, LOCK_TIMEOUT_US); v 820 drivers/clk/microchip/clk-core.c u32 i, v; v 822 drivers/clk/microchip/clk-core.c v = (readl(sclk->mux_reg) >> OSC_CUR_SHIFT) & OSC_CUR_MASK; v 825 drivers/clk/microchip/clk-core.c return v; v 828 drivers/clk/microchip/clk-core.c if (sclk->parent_map[i] == v) v 837 drivers/clk/microchip/clk-core.c u32 nosc, cosc, v; v 846 drivers/clk/microchip/clk-core.c v = readl(sclk->mux_reg); v 847 drivers/clk/microchip/clk-core.c v &= ~(OSC_NEW_MASK << OSC_NEW_SHIFT); v 848 drivers/clk/microchip/clk-core.c v |= nosc << OSC_NEW_SHIFT; v 852 drivers/clk/microchip/clk-core.c writel(v, sclk->mux_reg); v 862 drivers/clk/microchip/clk-core.c err = readl_poll_timeout_atomic(sclk->slew_reg, v, v 863 drivers/clk/microchip/clk-core.c !(v & OSC_SWEN), 1, LOCK_TIMEOUT_US); v 887 drivers/clk/microchip/clk-core.c u32 v; v 895 drivers/clk/microchip/clk-core.c v = readl(sclk->slew_reg); v 896 drivers/clk/microchip/clk-core.c v &= ~(SLEW_DIV << SLEW_DIV_SHIFT); v 897 drivers/clk/microchip/clk-core.c v |= sclk->slew_div << SLEW_DIV_SHIFT; v 898 drivers/clk/microchip/clk-core.c v |= SLEW_DOWNEN | SLEW_UPEN; v 899 drivers/clk/microchip/clk-core.c writel(v, sclk->slew_reg); v 962 drivers/clk/microchip/clk-core.c u32 v; v 969 drivers/clk/microchip/clk-core.c return readl_poll_timeout_atomic(sosc->status_reg, v, v 970 drivers/clk/microchip/clk-core.c v & sosc->status_mask, 1, 100); v 39 drivers/clk/mvebu/dove-divider.c u32 v; v 41 drivers/clk/mvebu/dove-divider.c v = readl_relaxed(base + DIV_CTRL1) | DIV_CTRL1_N_RESET_MASK; v 42 drivers/clk/mvebu/dove-divider.c writel_relaxed(v, base + DIV_CTRL1); v 44 drivers/clk/mvebu/dove-divider.c v = (readl_relaxed(base + DIV_CTRL0) & ~(mask | load)) | val; v 45 drivers/clk/mvebu/dove-divider.c writel_relaxed(v, base + DIV_CTRL0); v 46 drivers/clk/mvebu/dove-divider.c writel_relaxed(v | load, base + DIV_CTRL0); v 48 drivers/clk/mvebu/dove-divider.c writel_relaxed(v, base + DIV_CTRL0); v 443 drivers/clk/qcom/clk-alpha-pll.c const struct pll_vco *v = pll->vco_table; v 444 drivers/clk/qcom/clk-alpha-pll.c const struct pll_vco *end = v + pll->num_vco; v 446 drivers/clk/qcom/clk-alpha-pll.c for (; v < end; v++) v 447 drivers/clk/qcom/clk-alpha-pll.c if (rate >= v->min_freq && rate <= v->max_freq) v 448 drivers/clk/qcom/clk-alpha-pll.c return v; v 213 drivers/clk/sifive/fu540-prci.c static void __prci_writel(u32 v, u32 offs, struct __prci_data *pd) v 215 drivers/clk/sifive/fu540-prci.c writel_relaxed(v, pd->va + offs); v 236 drivers/clk/sifive/fu540-prci.c u32 v; v 238 drivers/clk/sifive/fu540-prci.c v = r & PRCI_COREPLLCFG0_DIVR_MASK; v 239 drivers/clk/sifive/fu540-prci.c v >>= PRCI_COREPLLCFG0_DIVR_SHIFT; v 240 drivers/clk/sifive/fu540-prci.c c->divr = v; v 242 drivers/clk/sifive/fu540-prci.c v = r & PRCI_COREPLLCFG0_DIVF_MASK; v 243 drivers/clk/sifive/fu540-prci.c v >>= PRCI_COREPLLCFG0_DIVF_SHIFT; v 244 drivers/clk/sifive/fu540-prci.c c->divf = v; v 246 drivers/clk/sifive/fu540-prci.c v = r & PRCI_COREPLLCFG0_DIVQ_MASK; v 247 drivers/clk/sifive/fu540-prci.c v >>= PRCI_COREPLLCFG0_DIVQ_SHIFT; v 248 drivers/clk/sifive/fu540-prci.c c->divq = v; v 250 drivers/clk/sifive/fu540-prci.c v = r & PRCI_COREPLLCFG0_RANGE_MASK; v 251 drivers/clk/sifive/fu540-prci.c v >>= PRCI_COREPLLCFG0_RANGE_SHIFT; v 252 drivers/clk/sifive/fu540-prci.c c->range = v; v 448 drivers/clk/sifive/fu540-prci.c u32 v; v 451 drivers/clk/sifive/fu540-prci.c v = __prci_readl(pd, PRCI_CLKMUXSTATUSREG_OFFSET); v 452 drivers/clk/sifive/fu540-prci.c v &= PRCI_CLKMUXSTATUSREG_TLCLKSEL_STATUS_MASK; v 453 drivers/clk/sifive/fu540-prci.c div = v ? 1 : 2; v 1256 drivers/clk/tegra/clk-dfll.c u32 v, s; v 1262 drivers/clk/tegra/clk-dfll.c v = dfll_readl(td, DFLL_MONITOR_DATA); v 1263 drivers/clk/tegra/clk-dfll.c v = (v & DFLL_MONITOR_DATA_VAL_MASK) >> DFLL_MONITOR_DATA_VAL_SHIFT; v 1264 drivers/clk/tegra/clk-dfll.c pre_scaler_rate = dfll_calc_monitored_rate(v, td->ref_rate); v 1642 drivers/clk/tegra/clk-dfll.c unsigned long rate, v, v_opp; v 1646 drivers/clk/tegra/clk-dfll.c v = td->soc->cvb->min_millivolts * 1000; v 1647 drivers/clk/tegra/clk-dfll.c lut = find_vdd_map_entry_exact(td, v); v 1667 drivers/clk/tegra/clk-dfll.c v += max(1UL, (v_max - v) / (MAX_DFLL_VOLTAGES - j)); v 1668 drivers/clk/tegra/clk-dfll.c if (v >= v_opp) v 1671 drivers/clk/tegra/clk-dfll.c selector = find_vdd_map_entry_min(td, v); v 1678 drivers/clk/tegra/clk-dfll.c v = (j == MAX_DFLL_VOLTAGES - 1) ? v_max : v_opp; v 1679 drivers/clk/tegra/clk-dfll.c selector = find_vdd_map_entry_exact(td, v); v 1685 drivers/clk/tegra/clk-dfll.c if (v >= v_max) v 1296 drivers/clk/tegra/clk-tegra114.c u32 v; v 1298 drivers/clk/tegra/clk-tegra114.c v = readl_relaxed(clk_base + RST_DFLL_DVCO); v 1299 drivers/clk/tegra/clk-tegra114.c v |= (1 << DVFS_DFLL_RESET_SHIFT); v 1300 drivers/clk/tegra/clk-tegra114.c writel_relaxed(v, clk_base + RST_DFLL_DVCO); v 1313 drivers/clk/tegra/clk-tegra114.c u32 v; v 1315 drivers/clk/tegra/clk-tegra114.c v = readl_relaxed(clk_base + RST_DFLL_DVCO); v 1316 drivers/clk/tegra/clk-tegra114.c v &= ~(1 << DVFS_DFLL_RESET_SHIFT); v 1317 drivers/clk/tegra/clk-tegra114.c writel_relaxed(v, clk_base + RST_DFLL_DVCO); v 1345 drivers/clk/tegra/clk-tegra124.c u32 v; v 1347 drivers/clk/tegra/clk-tegra124.c v = readl_relaxed(clk_base + RST_DFLL_DVCO); v 1348 drivers/clk/tegra/clk-tegra124.c v |= (1 << DVFS_DFLL_RESET_SHIFT); v 1349 drivers/clk/tegra/clk-tegra124.c writel_relaxed(v, clk_base + RST_DFLL_DVCO); v 1361 drivers/clk/tegra/clk-tegra124.c u32 v; v 1363 drivers/clk/tegra/clk-tegra124.c v = readl_relaxed(clk_base + RST_DFLL_DVCO); v 1364 drivers/clk/tegra/clk-tegra124.c v &= ~(1 << DVFS_DFLL_RESET_SHIFT); v 1365 drivers/clk/tegra/clk-tegra124.c writel_relaxed(v, clk_base + RST_DFLL_DVCO); v 3410 drivers/clk/tegra/clk-tegra210.c u32 v; v 3412 drivers/clk/tegra/clk-tegra210.c v = readl_relaxed(clk_base + RST_DFLL_DVCO); v 3413 drivers/clk/tegra/clk-tegra210.c v |= (1 << DVFS_DFLL_RESET_SHIFT); v 3414 drivers/clk/tegra/clk-tegra210.c writel_relaxed(v, clk_base + RST_DFLL_DVCO); v 3426 drivers/clk/tegra/clk-tegra210.c u32 v; v 3428 drivers/clk/tegra/clk-tegra210.c v = readl_relaxed(clk_base + RST_DFLL_DVCO); v 3429 drivers/clk/tegra/clk-tegra210.c v &= ~(1 << DVFS_DFLL_RESET_SHIFT); v 3430 drivers/clk/tegra/clk-tegra210.c writel_relaxed(v, clk_base + RST_DFLL_DVCO); v 364 drivers/clk/ti/adpll.c u32 v; v 367 drivers/clk/ti/adpll.c v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); v 368 drivers/clk/ti/adpll.c v |= BIT(ADPLL_CLKCTRL_IDLE); v 369 drivers/clk/ti/adpll.c writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET); v 376 drivers/clk/ti/adpll.c u32 v; v 379 drivers/clk/ti/adpll.c v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); v 380 drivers/clk/ti/adpll.c v &= ~BIT(ADPLL_CLKCTRL_IDLE); v 381 drivers/clk/ti/adpll.c writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET); v 387 drivers/clk/ti/adpll.c u32 v; v 389 drivers/clk/ti/adpll.c v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET); v 391 drivers/clk/ti/adpll.c return v & BIT(ADPLL_STATUS_BYPASS); v 401 drivers/clk/ti/adpll.c u32 v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET); v 403 drivers/clk/ti/adpll.c return (v & ADPLL_STATUS_PREPARED_MASK) == ADPLL_STATUS_PREPARED_MASK; v 456 drivers/clk/ti/adpll.c u32 frac_m, divider, v; v 475 drivers/clk/ti/adpll.c v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); v 476 drivers/clk/ti/adpll.c if (v & BIT(ADPLL_CLKCTRL_REGM4XEN_ADPLL_S)) v 794 drivers/clk/ti/adpll.c u32 v; v 796 drivers/clk/ti/adpll.c v = readl_relaxed(reg); v 797 drivers/clk/ti/adpll.c if (v == ADPLL_PLLSS_MMR_LOCK_ENABLED) v 47 drivers/clk/ti/apll.c u32 v; v 58 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->idlest_reg); v 60 drivers/clk/ti/apll.c if ((v & ad->idlest_mask) == state) v 63 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->control_reg); v 64 drivers/clk/ti/apll.c v &= ~ad->enable_mask; v 65 drivers/clk/ti/apll.c v |= APLL_FORCE_LOCK << __ffs(ad->enable_mask); v 66 drivers/clk/ti/apll.c ti_clk_ll_ops->clk_writel(v, &ad->control_reg); v 71 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->idlest_reg); v 72 drivers/clk/ti/apll.c if ((v & ad->idlest_mask) == state) v 96 drivers/clk/ti/apll.c u32 v; v 102 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->control_reg); v 103 drivers/clk/ti/apll.c v &= ~ad->enable_mask; v 104 drivers/clk/ti/apll.c v |= APLL_AUTO_IDLE << __ffs(ad->enable_mask); v 105 drivers/clk/ti/apll.c ti_clk_ll_ops->clk_writel(v, &ad->control_reg); v 112 drivers/clk/ti/apll.c u32 v; v 116 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->control_reg); v 117 drivers/clk/ti/apll.c v &= ad->enable_mask; v 119 drivers/clk/ti/apll.c v >>= __ffs(ad->enable_mask); v 121 drivers/clk/ti/apll.c return v == APLL_AUTO_IDLE ? 0 : 1; v 245 drivers/clk/ti/apll.c u32 v; v 247 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->control_reg); v 248 drivers/clk/ti/apll.c v &= ad->enable_mask; v 250 drivers/clk/ti/apll.c v >>= __ffs(ad->enable_mask); v 252 drivers/clk/ti/apll.c return v == OMAP2_EN_APLL_LOCKED ? 1 : 0; v 270 drivers/clk/ti/apll.c u32 v; v 273 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->control_reg); v 274 drivers/clk/ti/apll.c v &= ~ad->enable_mask; v 275 drivers/clk/ti/apll.c v |= OMAP2_EN_APLL_LOCKED << __ffs(ad->enable_mask); v 276 drivers/clk/ti/apll.c ti_clk_ll_ops->clk_writel(v, &ad->control_reg); v 279 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->idlest_reg); v 280 drivers/clk/ti/apll.c if (v & ad->idlest_mask) v 301 drivers/clk/ti/apll.c u32 v; v 303 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->control_reg); v 304 drivers/clk/ti/apll.c v &= ~ad->enable_mask; v 305 drivers/clk/ti/apll.c v |= OMAP2_EN_APLL_STOPPED << __ffs(ad->enable_mask); v 306 drivers/clk/ti/apll.c ti_clk_ll_ops->clk_writel(v, &ad->control_reg); v 319 drivers/clk/ti/apll.c u32 v; v 321 drivers/clk/ti/apll.c v = ti_clk_ll_ops->clk_readl(&ad->autoidle_reg); v 322 drivers/clk/ti/apll.c v &= ~ad->autoidle_mask; v 323 drivers/clk/ti/apll.c v |= val << __ffs(ad->autoidle_mask); v 324 drivers/clk/ti/apll.c ti_clk_ll_ops->clk_writel(v, &ad->control_reg); v 62 drivers/clk/ti/clk.c u32 v; v 64 drivers/clk/ti/clk.c v = readl_relaxed(ptr); v 65 drivers/clk/ti/clk.c v &= ~mask; v 66 drivers/clk/ti/clk.c v |= val; v 67 drivers/clk/ti/clk.c writel_relaxed(v, ptr); v 205 drivers/clk/ti/clkt_dflt.c u32 v; v 228 drivers/clk/ti/clkt_dflt.c v = ti_clk_ll_ops->clk_readl(&clk->enable_reg); v 230 drivers/clk/ti/clkt_dflt.c v &= ~(1 << clk->enable_bit); v 232 drivers/clk/ti/clkt_dflt.c v |= (1 << clk->enable_bit); v 233 drivers/clk/ti/clkt_dflt.c ti_clk_ll_ops->clk_writel(v, &clk->enable_reg); v 234 drivers/clk/ti/clkt_dflt.c v = ti_clk_ll_ops->clk_readl(&clk->enable_reg); /* OCP barrier */ v 254 drivers/clk/ti/clkt_dflt.c u32 v; v 258 drivers/clk/ti/clkt_dflt.c v = ti_clk_ll_ops->clk_readl(&clk->enable_reg); v 260 drivers/clk/ti/clkt_dflt.c v |= (1 << clk->enable_bit); v 262 drivers/clk/ti/clkt_dflt.c v &= ~(1 << clk->enable_bit); v 263 drivers/clk/ti/clkt_dflt.c ti_clk_ll_ops->clk_writel(v, &clk->enable_reg); v 282 drivers/clk/ti/clkt_dflt.c u32 v; v 284 drivers/clk/ti/clkt_dflt.c v = ti_clk_ll_ops->clk_readl(&clk->enable_reg); v 287 drivers/clk/ti/clkt_dflt.c v ^= BIT(clk->enable_bit); v 289 drivers/clk/ti/clkt_dflt.c v &= BIT(clk->enable_bit); v 291 drivers/clk/ti/clkt_dflt.c return v ? 1 : 0; v 181 drivers/clk/ti/clkt_dpll.c static int _omap2_dpll_is_in_bypass(u32 v) v 195 drivers/clk/ti/clkt_dpll.c if (v == val) v 206 drivers/clk/ti/clkt_dpll.c u32 v; v 213 drivers/clk/ti/clkt_dpll.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 214 drivers/clk/ti/clkt_dpll.c v &= dd->enable_mask; v 215 drivers/clk/ti/clkt_dpll.c v >>= __ffs(dd->enable_mask); v 218 drivers/clk/ti/clkt_dpll.c if (_omap2_dpll_is_in_bypass(v)) v 241 drivers/clk/ti/clkt_dpll.c u32 dpll_mult, dpll_div, v; v 249 drivers/clk/ti/clkt_dpll.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 250 drivers/clk/ti/clkt_dpll.c v &= dd->enable_mask; v 251 drivers/clk/ti/clkt_dpll.c v >>= __ffs(dd->enable_mask); v 253 drivers/clk/ti/clkt_dpll.c if (_omap2_dpll_is_in_bypass(v)) v 256 drivers/clk/ti/clkt_dpll.c v = ti_clk_ll_ops->clk_readl(&dd->mult_div1_reg); v 257 drivers/clk/ti/clkt_dpll.c dpll_mult = v & dd->mult_mask; v 259 drivers/clk/ti/clkt_dpll.c dpll_div = v & dd->div1_mask; v 30 drivers/clk/ti/clkt_iclk.c u32 v; v 36 drivers/clk/ti/clkt_iclk.c v = ti_clk_ll_ops->clk_readl(&r); v 37 drivers/clk/ti/clkt_iclk.c v |= (1 << clk->enable_bit); v 38 drivers/clk/ti/clkt_iclk.c ti_clk_ll_ops->clk_writel(v, &r); v 44 drivers/clk/ti/clkt_iclk.c u32 v; v 51 drivers/clk/ti/clkt_iclk.c v = ti_clk_ll_ops->clk_readl(&r); v 52 drivers/clk/ti/clkt_iclk.c v &= ~(1 << clk->enable_bit); v 53 drivers/clk/ti/clkt_iclk.c ti_clk_ll_ops->clk_writel(v, &r); v 50 drivers/clk/ti/dpll3xxx.c u32 v; v 54 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 55 drivers/clk/ti/dpll3xxx.c v &= ~dd->enable_mask; v 56 drivers/clk/ti/dpll3xxx.c v |= clken_bits << __ffs(dd->enable_mask); v 57 drivers/clk/ti/dpll3xxx.c ti_clk_ll_ops->clk_writel(v, &dd->control_reg); v 306 drivers/clk/ti/dpll3xxx.c u32 v; v 317 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 318 drivers/clk/ti/dpll3xxx.c v &= ~dd->freqsel_mask; v 319 drivers/clk/ti/dpll3xxx.c v |= freqsel << __ffs(dd->freqsel_mask); v 320 drivers/clk/ti/dpll3xxx.c ti_clk_ll_ops->clk_writel(v, &dd->control_reg); v 324 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->mult_div1_reg); v 329 drivers/clk/ti/dpll3xxx.c v |= dd->dcc_mask; /* Enable DCC */ v 331 drivers/clk/ti/dpll3xxx.c v &= ~dd->dcc_mask; /* Disable DCC */ v 334 drivers/clk/ti/dpll3xxx.c v &= ~(dd->mult_mask | dd->div1_mask); v 335 drivers/clk/ti/dpll3xxx.c v |= dd->last_rounded_m << __ffs(dd->mult_mask); v 336 drivers/clk/ti/dpll3xxx.c v |= (dd->last_rounded_n - 1) << __ffs(dd->div1_mask); v 341 drivers/clk/ti/dpll3xxx.c v &= ~(dd->dco_mask); v 342 drivers/clk/ti/dpll3xxx.c v |= dco << __ffs(dd->dco_mask); v 347 drivers/clk/ti/dpll3xxx.c v &= ~(dd->sddiv_mask); v 348 drivers/clk/ti/dpll3xxx.c v |= sd_div << __ffs(dd->sddiv_mask); v 370 drivers/clk/ti/dpll3xxx.c ti_clk_ll_ops->clk_writel(v, &dd->mult_div1_reg); v 374 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 378 drivers/clk/ti/dpll3xxx.c v |= dd->m4xen_mask; v 380 drivers/clk/ti/dpll3xxx.c v &= ~dd->m4xen_mask; v 385 drivers/clk/ti/dpll3xxx.c v |= dd->lpmode_mask; v 387 drivers/clk/ti/dpll3xxx.c v &= ~dd->lpmode_mask; v 390 drivers/clk/ti/dpll3xxx.c ti_clk_ll_ops->clk_writel(v, &dd->control_reg); v 645 drivers/clk/ti/dpll3xxx.c u32 v; v 655 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->autoidle_reg); v 656 drivers/clk/ti/dpll3xxx.c v &= dd->autoidle_mask; v 657 drivers/clk/ti/dpll3xxx.c v >>= __ffs(dd->autoidle_mask); v 659 drivers/clk/ti/dpll3xxx.c return v; v 674 drivers/clk/ti/dpll3xxx.c u32 v; v 689 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->autoidle_reg); v 690 drivers/clk/ti/dpll3xxx.c v &= ~dd->autoidle_mask; v 691 drivers/clk/ti/dpll3xxx.c v |= DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask); v 692 drivers/clk/ti/dpll3xxx.c ti_clk_ll_ops->clk_writel(v, &dd->autoidle_reg); v 704 drivers/clk/ti/dpll3xxx.c u32 v; v 714 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->autoidle_reg); v 715 drivers/clk/ti/dpll3xxx.c v &= ~dd->autoidle_mask; v 716 drivers/clk/ti/dpll3xxx.c v |= DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask); v 717 drivers/clk/ti/dpll3xxx.c ti_clk_ll_ops->clk_writel(v, &dd->autoidle_reg); v 758 drivers/clk/ti/dpll3xxx.c u32 v; v 773 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg) & dd->enable_mask; v 774 drivers/clk/ti/dpll3xxx.c v >>= __ffs(dd->enable_mask); v 775 drivers/clk/ti/dpll3xxx.c if ((v != OMAP3XXX_EN_DPLL_LOCKED) || (dd->flags & DPLL_J_TYPE)) v 793 drivers/clk/ti/dpll3xxx.c u32 v; v 797 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 798 drivers/clk/ti/dpll3xxx.c clk->context = (v & dd->enable_mask) >> __ffs(dd->enable_mask); v 801 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->mult_div1_reg); v 802 drivers/clk/ti/dpll3xxx.c dd->last_rounded_m = (v & dd->mult_mask) >> v 804 drivers/clk/ti/dpll3xxx.c dd->last_rounded_n = ((v & dd->div1_mask) >> v 822 drivers/clk/ti/dpll3xxx.c u32 v; v 830 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->mult_div1_reg); v 831 drivers/clk/ti/dpll3xxx.c v &= ~(dd->mult_mask | dd->div1_mask); v 832 drivers/clk/ti/dpll3xxx.c v |= dd->last_rounded_m << __ffs(dd->mult_mask); v 833 drivers/clk/ti/dpll3xxx.c v |= (dd->last_rounded_n - 1) << __ffs(dd->div1_mask); v 834 drivers/clk/ti/dpll3xxx.c ti_clk_ll_ops->clk_writel(v, &dd->mult_div1_reg); v 854 drivers/clk/ti/dpll3xxx.c u32 v; v 858 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 859 drivers/clk/ti/dpll3xxx.c clk->context = (v & dd->enable_mask) >> __ffs(dd->enable_mask); v 862 drivers/clk/ti/dpll3xxx.c v = ti_clk_ll_ops->clk_readl(&dd->mult_div1_reg); v 863 drivers/clk/ti/dpll3xxx.c dd->last_rounded_m = (v & dd->mult_mask) >> v 865 drivers/clk/ti/dpll3xxx.c dd->last_rounded_n = ((v & dd->div1_mask) >> v 39 drivers/clk/ti/dpll44xx.c u32 v; v 49 drivers/clk/ti/dpll44xx.c v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); v 51 drivers/clk/ti/dpll44xx.c v &= ~mask; v 52 drivers/clk/ti/dpll44xx.c ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); v 57 drivers/clk/ti/dpll44xx.c u32 v; v 67 drivers/clk/ti/dpll44xx.c v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); v 69 drivers/clk/ti/dpll44xx.c v |= mask; v 70 drivers/clk/ti/dpll44xx.c ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); v 116 drivers/clk/ti/dpll44xx.c u32 v; v 128 drivers/clk/ti/dpll44xx.c v = ti_clk_ll_ops->clk_readl(&dd->control_reg); v 129 drivers/clk/ti/dpll44xx.c if (v & OMAP4430_DPLL_REGM4XEN_MASK) v 88 drivers/clk/ti/fapll.c u32 v = readl_relaxed(fd->base); v 91 drivers/clk/ti/fapll.c return !(v & FAPLL_MAIN_BP); v 93 drivers/clk/ti/fapll.c return !!(v & FAPLL_MAIN_BP); v 98 drivers/clk/ti/fapll.c u32 v = readl_relaxed(fd->base); v 101 drivers/clk/ti/fapll.c v &= ~FAPLL_MAIN_BP; v 103 drivers/clk/ti/fapll.c v |= FAPLL_MAIN_BP; v 104 drivers/clk/ti/fapll.c writel_relaxed(v, fd->base); v 109 drivers/clk/ti/fapll.c u32 v = readl_relaxed(fd->base); v 112 drivers/clk/ti/fapll.c v |= FAPLL_MAIN_BP; v 114 drivers/clk/ti/fapll.c v &= ~FAPLL_MAIN_BP; v 115 drivers/clk/ti/fapll.c writel_relaxed(v, fd->base); v 121 drivers/clk/ti/fapll.c u32 v; v 123 drivers/clk/ti/fapll.c while ((v = readl_relaxed(fd->base))) { v 124 drivers/clk/ti/fapll.c if (v & FAPLL_MAIN_LOCK) v 141 drivers/clk/ti/fapll.c u32 v = readl_relaxed(fd->base); v 143 drivers/clk/ti/fapll.c v |= FAPLL_MAIN_PLLEN; v 144 drivers/clk/ti/fapll.c writel_relaxed(v, fd->base); v 153 drivers/clk/ti/fapll.c u32 v = readl_relaxed(fd->base); v 155 drivers/clk/ti/fapll.c v &= ~FAPLL_MAIN_PLLEN; v 156 drivers/clk/ti/fapll.c writel_relaxed(v, fd->base); v 162 drivers/clk/ti/fapll.c u32 v = readl_relaxed(fd->base); v 164 drivers/clk/ti/fapll.c return v & FAPLL_MAIN_PLLEN; v 171 drivers/clk/ti/fapll.c u32 fapll_n, fapll_p, v; v 180 drivers/clk/ti/fapll.c v = readl_relaxed(fd->base); v 181 drivers/clk/ti/fapll.c fapll_p = (v >> 8) & 0xff; v 184 drivers/clk/ti/fapll.c fapll_n = v >> 16; v 248 drivers/clk/ti/fapll.c u32 pre_div_p, mult_n, v; v 260 drivers/clk/ti/fapll.c v = readl_relaxed(fd->base); v 261 drivers/clk/ti/fapll.c v &= ~FAPLL_MAIN_CLEAR_MASK; v 262 drivers/clk/ti/fapll.c v |= pre_div_p << FAPLL_MAIN_DIV_P_SHIFT; v 263 drivers/clk/ti/fapll.c v |= mult_n << FAPLL_MAIN_MULT_N_SHIFT; v 264 drivers/clk/ti/fapll.c writel_relaxed(v, fd->base); v 285 drivers/clk/ti/fapll.c u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET); v 287 drivers/clk/ti/fapll.c v &= ~(1 << synth->index); v 288 drivers/clk/ti/fapll.c writel_relaxed(v, synth->fd->base + FAPLL_PWD_OFFSET); v 296 drivers/clk/ti/fapll.c u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET); v 298 drivers/clk/ti/fapll.c v |= 1 << synth->index; v 299 drivers/clk/ti/fapll.c writel_relaxed(v, synth->fd->base + FAPLL_PWD_OFFSET); v 305 drivers/clk/ti/fapll.c u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET); v 307 drivers/clk/ti/fapll.c return !(v & (1 << synth->index)); v 340 drivers/clk/ti/fapll.c u32 v, synth_int_div, synth_frac_div, synth_div_freq; v 342 drivers/clk/ti/fapll.c v = readl_relaxed(synth->freq); v 343 drivers/clk/ti/fapll.c synth_int_div = (v >> 24) & 0xf; v 344 drivers/clk/ti/fapll.c synth_frac_div = v & 0xffffff; v 375 drivers/clk/ti/fapll.c u32 post_div_m, synth_int_div = 0, synth_frac_div = 0, v; v 399 drivers/clk/ti/fapll.c v = readl_relaxed(synth->freq); v 400 drivers/clk/ti/fapll.c v &= ~0x1fffffff; v 401 drivers/clk/ti/fapll.c v |= (synth_int_div & SYNTH_MAX_INT_DIV) << 24; v 402 drivers/clk/ti/fapll.c v |= (synth_frac_div & 0xffffff); v 403 drivers/clk/ti/fapll.c v |= SYNTH_LDFREQ; v 404 drivers/clk/ti/fapll.c writel_relaxed(v, synth->freq); v 449 drivers/clk/ti/fapll.c u32 post_div_m = 0, v; v 473 drivers/clk/ti/fapll.c v = readl_relaxed(synth->div); v 474 drivers/clk/ti/fapll.c v &= ~SYNTH_MAX_DIV_M; v 475 drivers/clk/ti/fapll.c v |= post_div_m; v 476 drivers/clk/ti/fapll.c v |= SYNTH_LDMDIV1; v 477 drivers/clk/ti/fapll.c writel_relaxed(v, synth->div); v 610 drivers/clk/ti/fapll.c u32 v; v 629 drivers/clk/ti/fapll.c v = readl_relaxed(freq); v 630 drivers/clk/ti/fapll.c if (!v) v 92 drivers/clk/versatile/clk-icst.c vco->v = val & INTEGRATOR_AP_CM_BITS; v 107 drivers/clk/versatile/clk-icst.c vco->v = val & INTEGRATOR_AP_SYS_BITS; v 124 drivers/clk/versatile/clk-icst.c vco->v = divxy ? 17 : 14; v 139 drivers/clk/versatile/clk-icst.c vco->v = val & 0xFF; v 146 drivers/clk/versatile/clk-icst.c vco->v = (val >> 12) & 0xFF; v 152 drivers/clk/versatile/clk-icst.c vco->v = val & 0x1ff; v 173 drivers/clk/versatile/clk-icst.c val = vco.v & 0xFF; v 174 drivers/clk/versatile/clk-icst.c if (vco.v & 0x100) v 183 drivers/clk/versatile/clk-icst.c val = vco.v & 0xFF; v 184 drivers/clk/versatile/clk-icst.c if (vco.v & 0x100) v 193 drivers/clk/versatile/clk-icst.c val = (vco.v & 0xFF) | vco.s << 8; v 194 drivers/clk/versatile/clk-icst.c if (vco.v & 0x100) v 201 drivers/clk/versatile/clk-icst.c val = ((vco.v & 0xFF) << 12) | (vco.s << 20); v 202 drivers/clk/versatile/clk-icst.c if (vco.v & 0x100) v 210 drivers/clk/versatile/clk-icst.c val = vco.v | (vco.r << 9) | (vco.s << 16); v 29 drivers/clk/versatile/icst.c u64 dividend = p->ref * 2 * (u64)(vco.v + 8); v 49 drivers/clk/versatile/icst.c struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; v 91 drivers/clk/versatile/icst.c vco.v = vd - 8; v 25 drivers/clk/versatile/icst.h unsigned short v; v 230 drivers/connector/connector.c static int __maybe_unused cn_proc_show(struct seq_file *m, void *v) v 307 drivers/cpufreq/e_powersaver.c u32 v; v 310 drivers/cpufreq/e_powersaver.c v = (set_max_voltage - 700) / 16; v 312 drivers/cpufreq/e_powersaver.c if (v >= min_voltage && v <= max_voltage) { v 313 drivers/cpufreq/e_powersaver.c pr_info("Setting %dmV as maximum\n", v * 16 + 700); v 314 drivers/cpufreq/e_powersaver.c max_voltage = v; v 265 drivers/cpufreq/s3c2416-cpufreq.c int count, v, i, found; v 284 drivers/cpufreq/s3c2416-cpufreq.c v = regulator_list_voltage(s3c_freq->vddarm, i); v 285 drivers/cpufreq/s3c2416-cpufreq.c if (v >= dvfs->vddarm_min) v 109 drivers/cpufreq/s3c64xx-cpufreq.c int count, v, i, found; v 126 drivers/cpufreq/s3c64xx-cpufreq.c v = regulator_list_voltage(vddarm, i); v 127 drivers/cpufreq/s3c64xx-cpufreq.c if (v >= dvfs->vddarm_min && v <= dvfs->vddarm_max) v 739 drivers/cpuidle/cpuidle.c unsigned long l, void *v) v 8 drivers/crypto/cavium/nitrox/nitrox_debugfs.c static int firmware_show(struct seq_file *s, void *v) v 19 drivers/crypto/cavium/nitrox/nitrox_debugfs.c static int device_show(struct seq_file *s, void *v) v 36 drivers/crypto/cavium/nitrox/nitrox_debugfs.c static int stats_show(struct seq_file *s, void *v) v 40 drivers/crypto/ccp/sp-pci.c int v, ret; v 42 drivers/crypto/ccp/sp-pci.c for (v = 0; v < ARRAY_SIZE(sp_pci->msix_entry); v++) v 43 drivers/crypto/ccp/sp-pci.c sp_pci->msix_entry[v].entry = v; v 45 drivers/crypto/ccp/sp-pci.c ret = pci_enable_msix_range(pdev, sp_pci->msix_entry, 1, v); v 712 drivers/crypto/hifn_795x.c u32 v; v 716 drivers/crypto/hifn_795x.c v = a & 0x80080125; v 717 drivers/crypto/hifn_795x.c v ^= v >> 16; v 718 drivers/crypto/hifn_795x.c v ^= v >> 8; v 719 drivers/crypto/hifn_795x.c v ^= v >> 4; v 720 drivers/crypto/hifn_795x.c v ^= v >> 2; v 721 drivers/crypto/hifn_795x.c v ^= v >> 1; v 723 drivers/crypto/hifn_795x.c a = (v & 1) ^ (a << 1); v 65 drivers/crypto/qat/qat_common/adf_cfg.c static int qat_dev_cfg_show(struct seq_file *sfile, void *v) v 69 drivers/crypto/qat/qat_common/adf_cfg.c list_entry(v, struct adf_cfg_section, list); v 80 drivers/crypto/qat/qat_common/adf_cfg.c static void *qat_dev_cfg_next(struct seq_file *sfile, void *v, loff_t *pos) v 84 drivers/crypto/qat/qat_common/adf_cfg.c return seq_list_next(v, &dev_cfg->sec_list, pos); v 87 drivers/crypto/qat/qat_common/adf_cfg.c static void qat_dev_cfg_stop(struct seq_file *sfile, void *v) v 73 drivers/crypto/qat/qat_common/adf_transport_debug.c static void *adf_ring_next(struct seq_file *sfile, void *v, loff_t *pos) v 85 drivers/crypto/qat/qat_common/adf_transport_debug.c static int adf_ring_show(struct seq_file *sfile, void *v) v 91 drivers/crypto/qat/qat_common/adf_transport_debug.c if (v == SEQ_START_TOKEN) { v 115 drivers/crypto/qat/qat_common/adf_transport_debug.c v, ADF_MSG_SIZE_TO_BYTES(ring->msg_size), false); v 119 drivers/crypto/qat/qat_common/adf_transport_debug.c static void adf_ring_stop(struct seq_file *sfile, void *v) v 191 drivers/crypto/qat/qat_common/adf_transport_debug.c static void *adf_bank_next(struct seq_file *sfile, void *v, loff_t *pos) v 199 drivers/crypto/qat/qat_common/adf_transport_debug.c static int adf_bank_show(struct seq_file *sfile, void *v) v 203 drivers/crypto/qat/qat_common/adf_transport_debug.c if (v == SEQ_START_TOKEN) { v 207 drivers/crypto/qat/qat_common/adf_transport_debug.c int ring_id = *((int *)v) - 1; v 230 drivers/crypto/qat/qat_common/adf_transport_debug.c static void adf_bank_stop(struct seq_file *sfile, void *v) v 15 drivers/crypto/rockchip/rk3288_crypto.h #define _SBF(v, f) ((v) << (f)) v 36 drivers/crypto/s5p-sss.c #define _SBF(s, v) ((v) << (s)) v 27 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c u32 v; v 52 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c v = *(u32 *)(areq->iv + i * 4); v 53 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c writel(v, ss->base + SS_IV0 + i * 4); v 106 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c v = readl(ss->base + SS_IV0 + i * 4); v 107 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c *(u32 *)(areq->iv + i * 4) = v; v 159 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c u32 v; v 214 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c v = *(u32 *)(areq->iv + i * 4); v 215 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c writel(v, ss->base + SS_IV0 + i * 4); v 332 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c v = readl(ss->base + SS_IV0 + i * 4); v 333 drivers/crypto/sunxi-ss/sun4i-ss-cipher.c *(u32 *)(areq->iv + i * 4) = v; v 228 drivers/crypto/sunxi-ss/sun4i-ss-core.c u32 v; v 335 drivers/crypto/sunxi-ss/sun4i-ss-core.c v = readl(ss->base + SS_CTL); v 336 drivers/crypto/sunxi-ss/sun4i-ss-core.c v >>= 16; v 337 drivers/crypto/sunxi-ss/sun4i-ss-core.c v &= 0x07; v 338 drivers/crypto/sunxi-ss/sun4i-ss-core.c dev_info(&pdev->dev, "Die ID %d\n", v); v 178 drivers/crypto/sunxi-ss/sun4i-ss-hash.c u32 spaces, rx_cnt = SS_RX_DEFAULT, bf[32] = {0}, v, ivmode = 0; v 350 drivers/crypto/sunxi-ss/sun4i-ss-hash.c v = readl(ss->base + SS_CTL); v 352 drivers/crypto/sunxi-ss/sun4i-ss-hash.c } while (i < SS_TIMEOUT && (v & SS_DATA_END)); v 356 drivers/crypto/sunxi-ss/sun4i-ss-hash.c i, SS_TIMEOUT, v, areq->nbytes); v 447 drivers/crypto/sunxi-ss/sun4i-ss-hash.c v = readl(ss->base + SS_CTL); v 449 drivers/crypto/sunxi-ss/sun4i-ss-hash.c } while (i < SS_TIMEOUT && (v & SS_DATA_END)); v 453 drivers/crypto/sunxi-ss/sun4i-ss-hash.c i, SS_TIMEOUT, v, areq->nbytes); v 470 drivers/crypto/sunxi-ss/sun4i-ss-hash.c v = cpu_to_be32(readl(ss->base + SS_MD0 + i * 4)); v 471 drivers/crypto/sunxi-ss/sun4i-ss-hash.c memcpy(areq->result + i * 4, &v, 4); v 475 drivers/crypto/sunxi-ss/sun4i-ss-hash.c v = cpu_to_le32(readl(ss->base + SS_MD0 + i * 4)); v 476 drivers/crypto/sunxi-ss/sun4i-ss-hash.c memcpy(areq->result + i * 4, &v, 4); v 21 drivers/crypto/sunxi-ss/sun4i-ss-prng.c u32 v; v 48 drivers/crypto/sunxi-ss/sun4i-ss-prng.c v = readl(ss->base + SS_KEY0 + i * 4); v 49 drivers/crypto/sunxi-ss/sun4i-ss-prng.c ss->seed[i] = v; v 138 drivers/dma/altera-msgdma.c #define MSGDMA_CSR_WR_FILL_LEVEL_GET(v) (((v) & 0xffff0000) >> 16) v 139 drivers/dma/altera-msgdma.c #define MSGDMA_CSR_RD_FILL_LEVEL_GET(v) ((v) & 0x0000ffff) v 140 drivers/dma/altera-msgdma.c #define MSGDMA_CSR_RESP_FILL_LEVEL_GET(v) ((v) & 0x0000ffff) v 142 drivers/dma/altera-msgdma.c #define MSGDMA_CSR_SEQ_NUM_GET(v) (((v) & 0xffff0000) >> 16) v 386 drivers/dma/dw/regs.h #define lli_set(d, reg, v) ((d)->lli.reg |= cpu_to_le32(v)) v 387 drivers/dma/dw/regs.h #define lli_clear(d, reg, v) ((d)->lli.reg &= ~cpu_to_le32(v)) v 389 drivers/dma/dw/regs.h #define lli_write(d, reg, v) ((d)->lli.reg = cpu_to_le32(v)) v 197 drivers/dma/fsldma.h #define fsl_iowrite32(v, p) out_le32(p, v) v 198 drivers/dma/fsldma.h #define fsl_iowrite32be(v, p) out_be32(p, v) v 203 drivers/dma/fsldma.h #define fsl_iowrite64(v, p) out_le64(p, v) v 204 drivers/dma/fsldma.h #define fsl_iowrite64be(v, p) out_be64(p, v) v 239 drivers/dma/fsldma.h #define fsl_iowrite32(v, p) iowrite32(v, p) v 240 drivers/dma/fsldma.h #define fsl_iowrite32be(v, p) iowrite32be(v, p) v 243 drivers/dma/fsldma.h #define fsl_iowrite64(v, p) iowrite64(v, p) v 244 drivers/dma/fsldma.h #define fsl_iowrite64be(v, p) iowrite64be(v, p) v 258 drivers/dma/fsldma.h be##width##_to_cpu((__force __be##width)(v##width)d) : \ v 259 drivers/dma/fsldma.h le##width##_to_cpu((__force __le##width)(v##width)d)) v 262 drivers/dma/fsldma.h (__force v##width)cpu_to_be##width(c) : \ v 263 drivers/dma/fsldma.h (__force v##width)cpu_to_le##width(c)) v 55 drivers/dma/ipu/ipu_idmac.c #define idmac_write_icreg(ipu, v, reg) __idmac_write_icreg(ipu, v, reg - IC_CONF) v 22 drivers/dma/lpc18xx-dmamux.c #define LPC18XX_DMAMUX_VAL(v, n) ((v) << (n * 2)) v 30 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_ID_SETUP(v) ((v) | BIT(31)) v 32 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_ID_BUF_SETUP(v) (((v) << 9) | BIT(21)) v 42 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_NE_INT_MODE_SET(m, v) \ v 43 drivers/dma/xgene-dma.c ((m) = ((m) & ~BIT(31 - (v))) | BIT(31 - (v))) v 44 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_NE_INT_MODE_RESET(m, v) \ v 45 drivers/dma/xgene-dma.c ((m) &= (~BIT(31 - (v)))) v 52 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_DST_ID(v) ((1 << 10) | (v)) v 54 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_CMD_BASE_OFFSET(v) ((v) << 6) v 57 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_ADDRL_SET(m, v) \ v 58 drivers/dma/xgene-dma.c (((u32 *)(m))[2] |= (((v) >> 8) << 5)) v 59 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_ADDRH_SET(m, v) \ v 60 drivers/dma/xgene-dma.c (((u32 *)(m))[3] |= ((v) >> 35)) v 63 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_SIZE_SET(m, v) \ v 64 drivers/dma/xgene-dma.c (((u32 *)(m))[3] |= ((v) << 23)) v 73 drivers/dma/xgene-dma.c #define XGENE_DMA_RING_TYPE_SET(m, v) \ v 74 drivers/dma/xgene-dma.c (((u32 *)(m))[4] |= ((v) << 19)) v 78 drivers/dma/xgene-dma.c #define XGENE_DMA_DEV_ID_RD(v) ((v) & 0x00000FFF) v 79 drivers/dma/xgene-dma.c #define XGENE_DMA_BUS_ID_RD(v) (((v) >> 12) & 3) v 80 drivers/dma/xgene-dma.c #define XGENE_DMA_REV_NO_RD(v) (((v) >> 14) & 3) v 82 drivers/dma/xgene-dma.c #define XGENE_DMA_CH_SETUP(v) \ v 83 drivers/dma/xgene-dma.c ((v) = ((v) & ~0x000FFFFF) | 0x000AAFFF) v 84 drivers/dma/xgene-dma.c #define XGENE_DMA_ENABLE(v) ((v) |= BIT(31)) v 85 drivers/dma/xgene-dma.c #define XGENE_DMA_DISABLE(v) ((v) &= ~BIT(31)) v 87 drivers/dma/xgene-dma.c #define XGENE_DMA_RAID6_MULTI_CTRL(v) ((v) << 24) v 294 drivers/edac/i7300_edac.c #define NRECMEMA_BANK(v) (((v) >> 12) & 7) v 295 drivers/edac/i7300_edac.c #define NRECMEMA_RANK(v) (((v) >> 8) & 15) v 298 drivers/edac/i7300_edac.c #define NRECMEMB_IS_WR(v) ((v) & (1 << 31)) v 299 drivers/edac/i7300_edac.c #define NRECMEMB_CAS(v) (((v) >> 16) & 0x1fff) v 300 drivers/edac/i7300_edac.c #define NRECMEMB_RAS(v) ((v) & 0xffff) v 307 drivers/edac/i7300_edac.c #define RECMEMA_BANK(v) (((v) >> 12) & 7) v 308 drivers/edac/i7300_edac.c #define RECMEMA_RANK(v) (((v) >> 8) & 15) v 311 drivers/edac/i7300_edac.c #define RECMEMB_IS_WR(v) ((v) & (1 << 31)) v 312 drivers/edac/i7300_edac.c #define RECMEMB_CAS(v) (((v) >> 16) & 0x1fff) v 313 drivers/edac/i7300_edac.c #define RECMEMB_RAS(v) ((v) & 0xffff) v 16 drivers/edac/mce_amd.c void amd_report_gart_errors(bool v) v 18 drivers/edac/mce_amd.c report_gart_errors = v; v 123 drivers/edac/pnd2_edac.c #define GET_BITFIELD(v, lo, hi) (((v) & GENMASK_ULL(hi, lo)) >> (lo)) v 51 drivers/edac/sb_edac.c #define GET_BITFIELD(v, lo, hi) \ v 52 drivers/edac/sb_edac.c (((v) & GENMASK_ULL(hi, lo)) >> (lo)) v 26 drivers/edac/skx_common.h #define GET_BITFIELD(v, lo, hi) \ v 27 drivers/edac/skx_common.h (((v) & GENMASK_ULL((hi), (lo))) >> (lo)) v 65 drivers/firewire/core-card.c #define BIB_CRC(v) ((v) << 0) v 66 drivers/firewire/core-card.c #define BIB_CRC_LENGTH(v) ((v) << 16) v 67 drivers/firewire/core-card.c #define BIB_INFO_LENGTH(v) ((v) << 24) v 69 drivers/firewire/core-card.c #define BIB_LINK_SPEED(v) ((v) << 0) v 70 drivers/firewire/core-card.c #define BIB_GENERATION(v) ((v) << 4) v 71 drivers/firewire/core-card.c #define BIB_MAX_ROM(v) ((v) << 8) v 72 drivers/firewire/core-card.c #define BIB_MAX_RECEIVE(v) ((v) << 12) v 73 drivers/firewire/core-card.c #define BIB_CYC_CLK_ACC(v) ((v) << 16) v 157 drivers/firewire/core-cdev.c struct { void *data; size_t size; } v[2]; v 276 drivers/firewire/core-cdev.c event->v[0].data = data0; v 277 drivers/firewire/core-cdev.c event->v[0].size = size0; v 278 drivers/firewire/core-cdev.c event->v[1].data = data1; v 279 drivers/firewire/core-cdev.c event->v[1].size = size1; v 314 drivers/firewire/core-cdev.c for (i = 0; i < ARRAY_SIZE(event->v) && total < count; i++) { v 315 drivers/firewire/core-cdev.c size = min(event->v[i].size, count - total); v 316 drivers/firewire/core-cdev.c if (copy_to_user(buffer + total, event->v[i].data, size)) { v 1040 drivers/firewire/core-cdev.c #define GET_PAYLOAD_LENGTH(v) ((v) & 0xffff) v 1041 drivers/firewire/core-cdev.c #define GET_INTERRUPT(v) (((v) >> 16) & 0x01) v 1042 drivers/firewire/core-cdev.c #define GET_SKIP(v) (((v) >> 17) & 0x01) v 1043 drivers/firewire/core-cdev.c #define GET_TAG(v) (((v) >> 18) & 0x03) v 1044 drivers/firewire/core-cdev.c #define GET_SY(v) (((v) >> 20) & 0x0f) v 1045 drivers/firewire/core-cdev.c #define GET_HEADER_LENGTH(v) (((v) >> 24) & 0xff) v 1154 drivers/firewire/net.c unsigned v; v 1157 drivers/firewire/net.c for (v = 0; v < num_packets / FWNET_ISO_PAGE_COUNT; v++) v 1158 drivers/firewire/net.c *ptrptr++ = (void *) ((char *)ptr + v * max_receive); v 156 drivers/firewire/ohci.c #define IT_HEADER_SY(v) ((v) << 0) v 157 drivers/firewire/ohci.c #define IT_HEADER_TCODE(v) ((v) << 4) v 158 drivers/firewire/ohci.c #define IT_HEADER_CHANNEL(v) ((v) << 8) v 159 drivers/firewire/ohci.c #define IT_HEADER_TAG(v) ((v) << 14) v 160 drivers/firewire/ohci.c #define IT_HEADER_SPEED(v) ((v) << 16) v 161 drivers/firewire/ohci.c #define IT_HEADER_DATA_LENGTH(v) ((v) << 16) v 792 drivers/firewire/ohci.c #define cond_le32_to_cpu(v) \ v 793 drivers/firewire/ohci.c (ohci->quirks & QUIRK_BE_HEADERS ? (__force __u32)(v) : le32_to_cpu(v)) v 795 drivers/firewire/ohci.c #define cond_le32_to_cpu(v) le32_to_cpu(v) v 235 drivers/firewire/sbp2.c #define STATUS_GET_ORB_HIGH(v) ((v).status & 0xffff) v 236 drivers/firewire/sbp2.c #define STATUS_GET_SBP_STATUS(v) (((v).status >> 16) & 0xff) v 237 drivers/firewire/sbp2.c #define STATUS_GET_LEN(v) (((v).status >> 24) & 0x07) v 238 drivers/firewire/sbp2.c #define STATUS_GET_DEAD(v) (((v).status >> 27) & 0x01) v 239 drivers/firewire/sbp2.c #define STATUS_GET_RESPONSE(v) (((v).status >> 28) & 0x03) v 240 drivers/firewire/sbp2.c #define STATUS_GET_SOURCE(v) (((v).status >> 30) & 0x03) v 241 drivers/firewire/sbp2.c #define STATUS_GET_ORB_LOW(v) ((v).orb_low) v 242 drivers/firewire/sbp2.c #define STATUS_GET_DATA(v) ((v).data) v 265 drivers/firewire/sbp2.c #define MANAGEMENT_ORB_LUN(v) ((v)) v 266 drivers/firewire/sbp2.c #define MANAGEMENT_ORB_FUNCTION(v) ((v) << 16) v 267 drivers/firewire/sbp2.c #define MANAGEMENT_ORB_RECONNECT(v) ((v) << 20) v 268 drivers/firewire/sbp2.c #define MANAGEMENT_ORB_EXCLUSIVE(v) ((v) ? 1 << 28 : 0) v 269 drivers/firewire/sbp2.c #define MANAGEMENT_ORB_REQUEST_FORMAT(v) ((v) << 29) v 272 drivers/firewire/sbp2.c #define MANAGEMENT_ORB_RESPONSE_LENGTH(v) ((v)) v 273 drivers/firewire/sbp2.c #define MANAGEMENT_ORB_PASSWORD_LENGTH(v) ((v) << 16) v 295 drivers/firewire/sbp2.c #define COMMAND_ORB_DATA_SIZE(v) ((v)) v 296 drivers/firewire/sbp2.c #define COMMAND_ORB_PAGE_SIZE(v) ((v) << 16) v 298 drivers/firewire/sbp2.c #define COMMAND_ORB_MAX_PAYLOAD(v) ((v) << 20) v 299 drivers/firewire/sbp2.c #define COMMAND_ORB_SPEED(v) ((v) << 24) v 301 drivers/firewire/sbp2.c #define COMMAND_ORB_REQUEST_FORMAT(v) ((v) << 29) v 380 drivers/firmware/dmi_scan.c static void __init count_mem_devices(const struct dmi_header *dm, void *v) v 387 drivers/firmware/dmi_scan.c static void __init save_mem_devices(const struct dmi_header *dm, void *v) v 48 drivers/firmware/tegra/bpmp-debugfs.c static int seqbuf_read_u32(struct seqbuf *seqbuf, uint32_t *v) v 52 drivers/firmware/tegra/bpmp-debugfs.c err = seqbuf_read(seqbuf, v, 4); v 53 drivers/firmware/tegra/bpmp-debugfs.c *v = le32_to_cpu(*v); v 55 drivers/fpga/dfl-afu-error.c u64 v; v 75 drivers/fpga/dfl-afu-error.c v = readq(base_hdr + PORT_HDR_STS); v 76 drivers/fpga/dfl-afu-error.c if (FIELD_GET(PORT_STS_PWR_STATE, v) == PORT_STS_PWR_STATE_AP6) { v 90 drivers/fpga/dfl-afu-error.c v = readq(base_err + PORT_ERROR); v 92 drivers/fpga/dfl-afu-error.c if (v == err) { v 93 drivers/fpga/dfl-afu-error.c writeq(v, base_err + PORT_ERROR); v 95 drivers/fpga/dfl-afu-error.c v = readq(base_err + PORT_FIRST_ERROR); v 96 drivers/fpga/dfl-afu-error.c writeq(v, base_err + PORT_FIRST_ERROR); v 39 drivers/fpga/dfl-afu-main.c u64 v; v 49 drivers/fpga/dfl-afu-main.c v = readq(base + PORT_HDR_CTRL); v 50 drivers/fpga/dfl-afu-main.c v &= ~PORT_CTRL_SFTRST; v 51 drivers/fpga/dfl-afu-main.c writeq(v, base + PORT_HDR_CTRL); v 69 drivers/fpga/dfl-afu-main.c u64 v; v 77 drivers/fpga/dfl-afu-main.c v = readq(base + PORT_HDR_CTRL); v 78 drivers/fpga/dfl-afu-main.c v |= PORT_CTRL_SFTRST; v 79 drivers/fpga/dfl-afu-main.c writeq(v, base + PORT_HDR_CTRL); v 86 drivers/fpga/dfl-afu-main.c if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST, v 153 drivers/fpga/dfl-afu-main.c u64 v; v 158 drivers/fpga/dfl-afu-main.c v = readq(base + PORT_HDR_CTRL); v 161 drivers/fpga/dfl-afu-main.c return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_CTRL_LATENCY, v)); v 171 drivers/fpga/dfl-afu-main.c u64 v; v 179 drivers/fpga/dfl-afu-main.c v = readq(base + PORT_HDR_CTRL); v 180 drivers/fpga/dfl-afu-main.c v &= ~PORT_CTRL_LATENCY; v 181 drivers/fpga/dfl-afu-main.c v |= FIELD_PREP(PORT_CTRL_LATENCY, ltr ? 1 : 0); v 182 drivers/fpga/dfl-afu-main.c writeq(v, base + PORT_HDR_CTRL); v 194 drivers/fpga/dfl-afu-main.c u64 v; v 199 drivers/fpga/dfl-afu-main.c v = readq(base + PORT_HDR_STS); v 202 drivers/fpga/dfl-afu-main.c return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP1_EVT, v)); v 232 drivers/fpga/dfl-afu-main.c u64 v; v 237 drivers/fpga/dfl-afu-main.c v = readq(base + PORT_HDR_STS); v 240 drivers/fpga/dfl-afu-main.c return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP2_EVT, v)); v 269 drivers/fpga/dfl-afu-main.c u64 v; v 274 drivers/fpga/dfl-afu-main.c v = readq(base + PORT_HDR_STS); v 277 drivers/fpga/dfl-afu-main.c return sprintf(buf, "0x%x\n", (u8)FIELD_GET(PORT_STS_PWR_STATE, v)); v 64 drivers/fpga/dfl-fme-error.c u64 v, val; v 74 drivers/fpga/dfl-fme-error.c v = readq(base + PCIE0_ERROR); v 75 drivers/fpga/dfl-fme-error.c if (val == v) v 76 drivers/fpga/dfl-fme-error.c writeq(v, base + PCIE0_ERROR); v 109 drivers/fpga/dfl-fme-error.c u64 v, val; v 119 drivers/fpga/dfl-fme-error.c v = readq(base + PCIE1_ERROR); v 120 drivers/fpga/dfl-fme-error.c if (val == v) v 121 drivers/fpga/dfl-fme-error.c writeq(v, base + PCIE1_ERROR); v 160 drivers/fpga/dfl-fme-error.c u64 v; v 165 drivers/fpga/dfl-fme-error.c v = readq(base + RAS_ERROR_INJECT); v 169 drivers/fpga/dfl-fme-error.c (unsigned long long)FIELD_GET(INJECT_ERROR_MASK, v)); v 179 drivers/fpga/dfl-fme-error.c u64 v; v 190 drivers/fpga/dfl-fme-error.c v = readq(base + RAS_ERROR_INJECT); v 191 drivers/fpga/dfl-fme-error.c v &= ~INJECT_ERROR_MASK; v 192 drivers/fpga/dfl-fme-error.c v |= FIELD_PREP(INJECT_ERROR_MASK, inject_error); v 193 drivers/fpga/dfl-fme-error.c writeq(v, base + RAS_ERROR_INJECT); v 222 drivers/fpga/dfl-fme-error.c u64 v, val; v 233 drivers/fpga/dfl-fme-error.c v = readq(base + FME_ERROR); v 234 drivers/fpga/dfl-fme-error.c if (val == v) v 235 drivers/fpga/dfl-fme-error.c writeq(v, base + FME_ERROR); v 29 drivers/fpga/dfl-fme-main.c u64 v; v 33 drivers/fpga/dfl-fme-main.c v = readq(base + FME_HDR_CAP); v 36 drivers/fpga/dfl-fme-main.c (unsigned int)FIELD_GET(FME_CAP_NUM_PORTS, v)); v 48 drivers/fpga/dfl-fme-main.c u64 v; v 52 drivers/fpga/dfl-fme-main.c v = readq(base + FME_HDR_BITSTREAM_ID); v 54 drivers/fpga/dfl-fme-main.c return scnprintf(buf, PAGE_SIZE, "0x%llx\n", (unsigned long long)v); v 66 drivers/fpga/dfl-fme-main.c u64 v; v 70 drivers/fpga/dfl-fme-main.c v = readq(base + FME_HDR_BITSTREAM_MD); v 72 drivers/fpga/dfl-fme-main.c return scnprintf(buf, PAGE_SIZE, "0x%llx\n", (unsigned long long)v); v 80 drivers/fpga/dfl-fme-main.c u64 v; v 84 drivers/fpga/dfl-fme-main.c v = readq(base + FME_HDR_CAP); v 87 drivers/fpga/dfl-fme-main.c (unsigned int)FIELD_GET(FME_CAP_CACHE_SIZE, v)); v 95 drivers/fpga/dfl-fme-main.c u64 v; v 99 drivers/fpga/dfl-fme-main.c v = readq(base + FME_HDR_CAP); v 102 drivers/fpga/dfl-fme-main.c (unsigned int)FIELD_GET(FME_CAP_FABRIC_VERID, v)); v 110 drivers/fpga/dfl-fme-main.c u64 v; v 114 drivers/fpga/dfl-fme-main.c v = readq(base + FME_HDR_CAP); v 117 drivers/fpga/dfl-fme-main.c (unsigned int)FIELD_GET(FME_CAP_SOCKET_ID, v)); v 79 drivers/fpga/dfl-fme-pr.c u64 v; v 94 drivers/fpga/dfl-fme-pr.c v = readq(fme_hdr + FME_HDR_CAP); v 95 drivers/fpga/dfl-fme-pr.c if (port_pr.port_id >= FIELD_GET(FME_CAP_NUM_PORTS, v)) { v 93 drivers/fpga/dfl-pci.c u64 v; v 122 drivers/fpga/dfl-pci.c v = readq(base + FME_HDR_CAP); v 123 drivers/fpga/dfl-pci.c port_num = FIELD_GET(FME_CAP_NUM_PORTS, v); v 128 drivers/fpga/dfl-pci.c v = readq(base + FME_HDR_PORT_OFST(i)); v 131 drivers/fpga/dfl-pci.c if (!(v & FME_PORT_OFST_IMP)) v 138 drivers/fpga/dfl-pci.c bar = FIELD_GET(FME_PORT_OFST_BAR_ID, v); v 139 drivers/fpga/dfl-pci.c offset = FIELD_GET(FME_PORT_OFST_DFH_OFST, v); v 618 drivers/fpga/dfl.c u64 v = readq(start + DFH); v 619 drivers/fpga/dfl.c u32 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v); v 626 drivers/fpga/dfl.c u64 v = readq(start + DFH); v 627 drivers/fpga/dfl.c u16 id = FIELD_GET(DFH_ID, v); v 628 drivers/fpga/dfl.c u8 type = FIELD_GET(DFH_TYPE, v); v 682 drivers/fpga/dfl.c u64 v = readq(binfo->ioaddr + PORT_HDR_CAP); v 683 drivers/fpga/dfl.c u32 size = FIELD_GET(PORT_CAP_MMIO_SIZE, v) << 10; v 715 drivers/fpga/dfl.c u64 v; v 718 drivers/fpga/dfl.c v = readq(dfl->ioaddr + ofst + DFH); v 719 drivers/fpga/dfl.c id = FIELD_GET(DFH_ID, v); v 734 drivers/fpga/dfl.c v = readq(dfl->ioaddr + ofst + NEXT_AFU); v 736 drivers/fpga/dfl.c offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v); v 768 drivers/fpga/dfl.c u64 v; v 771 drivers/fpga/dfl.c v = readq(dfl->ioaddr + ofst + DFH); v 772 drivers/fpga/dfl.c type = FIELD_GET(DFH_TYPE, v); v 796 drivers/fpga/dfl.c u64 v; v 809 drivers/fpga/dfl.c v = readq(start + DFH); v 810 drivers/fpga/dfl.c ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v); v 813 drivers/fpga/dfl.c if ((v & DFH_EOL) || !ofst) v 1155 drivers/fpga/dfl.c u64 v; v 1159 drivers/fpga/dfl.c v = readq(base + FME_HDR_PORT_OFST(port_id)); v 1161 drivers/fpga/dfl.c v &= ~FME_PORT_OFST_ACC_CTRL; v 1162 drivers/fpga/dfl.c v |= FIELD_PREP(FME_PORT_OFST_ACC_CTRL, v 1165 drivers/fpga/dfl.c writeq(v, base + FME_HDR_PORT_OFST(port_id)); v 348 drivers/fpga/dfl.h u64 v = readq(base + DFH); v 350 drivers/fpga/dfl.h return (FIELD_GET(DFH_TYPE, v) == DFH_TYPE_FIU) && v 351 drivers/fpga/dfl.h (FIELD_GET(DFH_ID, v) == DFH_ID_FIU_FME); v 356 drivers/fpga/dfl.h u64 v = readq(base + DFH); v 358 drivers/fpga/dfl.h return (FIELD_GET(DFH_TYPE, v) == DFH_TYPE_FIU) && v 359 drivers/fpga/dfl.h (FIELD_GET(DFH_ID, v) == DFH_ID_FIU_PORT); v 455 drivers/fsi/fsi-master-ast-cf.c uint8_t v; v 458 drivers/fsi/fsi-master-ast-cf.c v = ioread8(master->sram + TRACEBUF + i); v 459 drivers/fsi/fsi-master-ast-cf.c p += sprintf(p, "%02x ", v); v 460 drivers/fsi/fsi-master-ast-cf.c if (((i % 16) == 15) || v == TR_END) v 462 drivers/fsi/fsi-master-ast-cf.c if (v == TR_END) v 1234 drivers/gpio/gpio-omap.c unsigned long cmd, void *v) v 5009 drivers/gpio/gpiolib.c static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) v 5012 drivers/gpio/gpiolib.c struct gpio_device *gdev = v; v 5028 drivers/gpio/gpiolib.c static void gpiolib_seq_stop(struct seq_file *s, void *v) v 5032 drivers/gpio/gpiolib.c static int gpiolib_seq_show(struct seq_file *s, void *v) v 5034 drivers/gpio/gpiolib.c struct gpio_device *gdev = v; v 1038 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, v 1044 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v); v 1059 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_NO_KIQ(reg, v) amdgpu_mm_wreg(adev, (reg), (v), AMDGPU_REGS_NO_KIQ) v 1062 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG8(reg, v) amdgpu_mm_wreg8(adev, (reg), (v)) v 1067 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32(reg, v) amdgpu_mm_wreg(adev, (reg), (v), 0) v 1068 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_IDX(reg, v) amdgpu_mm_wreg(adev, (reg), (v), AMDGPU_REGS_IDX) v 1069 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) v 1070 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) v 1072 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_PCIE(reg, v) adev->pcie_wreg(adev, (reg), (v)) v 1074 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_PCIE_PORT(reg, v) adev->pciep_wreg(adev, (reg), (v)) v 1076 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG64_PCIE(reg, v) adev->pcie_wreg64(adev, (reg), (v)) v 1078 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_SMC(reg, v) adev->smc_wreg(adev, (reg), (v)) v 1080 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v)) v 1082 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_DIDT(reg, v) adev->didt_wreg(adev, (reg), (v)) v 1084 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_GC_CAC(reg, v) adev->gc_cac_wreg(adev, (reg), (v)) v 1086 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_SE_CAC(reg, v) adev->se_cac_wreg(adev, (reg), (v)) v 1088 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_AUDIO_ENDPT(block, reg, v) adev->audio_endpt_wreg(adev, (block), (reg), (v)) v 1107 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_IO(reg, v) amdgpu_io_wreg(adev, (reg), (v)) v 1139 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d)) v 1146 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v))) v 1365 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == v 240 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, v 243 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c trace_amdgpu_mm_wreg(adev->pdev->device, reg, v); v 246 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->last_mm_index = v; v 250 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return amdgpu_virt_kiq_wreg(adev, reg, v); v 253 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel(v, ((void __iomem *)adev->rmmio) + (reg * 4)); v 259 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel(v, ((void __iomem *)adev->rmmio) + (mmMM_DATA * 4)); v 295 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 298 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->last_mm_index = v; v 302 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iowrite32(v, adev->rio_mem + (reg * 4)); v 305 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iowrite32(v, adev->rio_mem + (mmMM_DATA * 4)); v 342 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v) v 345 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel(v, adev->doorbell.ptr + index); v 380 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v) v 383 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v); v 416 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_invalid_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) v 419 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c reg, v); v 450 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_invalid_wreg64(struct amdgpu_device *adev, uint32_t reg, uint64_t v) v 453 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c reg, v); v 490 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c uint32_t reg, uint32_t v) v 493 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c reg, block, v); v 284 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v); v 286 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v); v 289 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h #define WDOORBELL32(index, v) amdgpu_mm_wdoorbell(adev, (index), (v)) v 291 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h #define WDOORBELL64(index, v) amdgpu_mm_wdoorbell64(adev, (index), (v)) v 242 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_table->entries[i].v = le16_to_cpu(entry->usVoltage); v 518 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v = v 572 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = v 599 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v = v 657 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v = v 125 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u16 v; v 164 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u16 v; v 175 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u16 v; v 242 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h #define amdgpu_ring_emit_gds_switch(r, v, db, ds, wb, ws, ab, as) (r)->funcs->emit_gds_switch((r), (v), (db), (ds), (wb), (ws), (ab), (as)) v 247 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) v 248 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h #define amdgpu_ring_emit_reg_wait(r, d, v, m) (r)->funcs->emit_reg_wait((r), (d), (v), (m)) v 249 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h #define amdgpu_ring_emit_reg_write_reg_wait(r, d0, d1, v, m) (r)->funcs->emit_reg_write_reg_wait((r), (d0), (d1), (v), (m)) v 289 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v) v 293 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h ring->ring[ring->wptr++ & ring->buf_mask] = v; v 27 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h #define WREG64_UMC(reg, v) \ v 29 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h WREG32((reg), lower_32_bits(v)); \ v 30 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h WREG32((reg) + 1, upper_32_bits(v)); \ v 94 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) v 106 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c amdgpu_ring_emit_wreg(ring, reg, v); v 295 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); v 210 drivers/gpu/drm/amd/amdgpu/atombios_dp.c u8 v = 0; v 223 drivers/gpu/drm/amd/amdgpu/atombios_dp.c if (this_v > v) v 224 drivers/gpu/drm/amd/amdgpu/atombios_dp.c v = this_v; v 229 drivers/gpu/drm/amd/amdgpu/atombios_dp.c if (v >= DP_VOLTAGE_MAX) v 230 drivers/gpu/drm/amd/amdgpu/atombios_dp.c v |= DP_TRAIN_MAX_SWING_REACHED; v 236 drivers/gpu/drm/amd/amdgpu/atombios_dp.c voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT], v 240 drivers/gpu/drm/amd/amdgpu/atombios_dp.c train_set[lane] = v | p; v 89 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 96 drivers/gpu/drm/amd/amdgpu/cik.c WREG32(mmPCIE_DATA, v); v 113 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 119 drivers/gpu/drm/amd/amdgpu/cik.c WREG32(mmSMC_IND_DATA_0, (v)); v 135 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 141 drivers/gpu/drm/amd/amdgpu/cik.c WREG32(mmUVD_CTX_DATA, (v)); v 157 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 163 drivers/gpu/drm/amd/amdgpu/cik.c WREG32(mmDIDT_IND_DATA, (v)); v 223 drivers/gpu/drm/amd/amdgpu/cikd.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 189 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c u32 block_offset, u32 reg, u32 v) v 195 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); v 207 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c u32 block_offset, u32 reg, u32 v) v 213 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); v 140 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c u32 block_offset, u32 reg, u32 v) v 147 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); v 137 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c u32 block_offset, u32 reg, u32 v) v 143 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); v 81 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return vddc_sclk_table->entries[vid_2bit].v; v 83 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return vddc_sclk_table->entries[vddc_sclk_table->count - 1].v; v 103 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (vddc_sclk_table->entries[i].v == vid_7bit) v 125 drivers/gpu/drm/amd/amdgpu/kv_dpm.c u32 v = RREG32(mmDOUT_SCRATCH3); v 128 drivers/gpu/drm/amd/amdgpu/kv_dpm.c v |= 0x4; v 130 drivers/gpu/drm/amd/amdgpu/kv_dpm.c v &= 0xFFFFFFFB; v 132 drivers/gpu/drm/amd/amdgpu/kv_dpm.c WREG32(mmDOUT_SCRATCH3, v); v 916 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (pi->high_voltage_t < table->entries[i].v)) v 921 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->uvd_level[i].MinVddNb = cpu_to_be16(table->entries[i].v); v 987 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->high_voltage_t < table->entries[i].v) v 991 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->vce_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); v 1050 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->high_voltage_t < table->entries[i].v) v 1054 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->samu_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); v 1116 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->acp_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); v 2065 drivers/gpu/drm/amd/amdgpu/kv_dpm.c uvd_table->entries[i].v = v 2067 drivers/gpu/drm/amd/amdgpu/kv_dpm.c uvd_table->entries[i].v); v 2072 drivers/gpu/drm/amd/amdgpu/kv_dpm.c vce_table->entries[i].v = v 2074 drivers/gpu/drm/amd/amdgpu/kv_dpm.c vce_table->entries[i].v); v 2079 drivers/gpu/drm/amd/amdgpu/kv_dpm.c samu_table->entries[i].v = v 2081 drivers/gpu/drm/amd/amdgpu/kv_dpm.c samu_table->entries[i].v); v 2086 drivers/gpu/drm/amd/amdgpu/kv_dpm.c acp_table->entries[i].v = v 2088 drivers/gpu/drm/amd/amdgpu/kv_dpm.c acp_table->entries[i].v); v 2180 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (kv_convert_8bit_index_to_voltage(adev, table->entries[i].v) <= v 2428 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, table->entries[i].v))) v 2434 drivers/gpu/drm/amd/amdgpu/kv_dpm.c table->entries[i].v); v 77 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 87 drivers/gpu/drm/amd/amdgpu/nv.c WREG32(data, v); v 107 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 116 drivers/gpu/drm/amd/amdgpu/nv.c WREG32(data, (v)); v 46 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 917 drivers/gpu/drm/amd/amdgpu/si.c static void si_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 924 drivers/gpu/drm/amd/amdgpu/si.c WREG32(AMDGPU_PCIE_DATA, v); v 942 drivers/gpu/drm/amd/amdgpu/si.c static void si_pciep_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 949 drivers/gpu/drm/amd/amdgpu/si.c WREG32(PCIE_PORT_DATA, (v)); v 966 drivers/gpu/drm/amd/amdgpu/si.c static void si_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 972 drivers/gpu/drm/amd/amdgpu/si.c WREG32(SMC_IND_DATA_0, (v)); v 1794 drivers/gpu/drm/amd/amdgpu/si.c static inline void si_pif_phy0_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 1800 drivers/gpu/drm/amd/amdgpu/si.c WREG32(EVERGREEN_PIF_PHY0_DATA, (v)); v 1816 drivers/gpu/drm/amd/amdgpu/si.c static inline void si_pif_phy1_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 1822 drivers/gpu/drm/amd/amdgpu/si.c WREG32(EVERGREEN_PIF_PHY1_DATA, (v)); v 2032 drivers/gpu/drm/amd/amdgpu/si.c u16 v; v 2035 drivers/gpu/drm/amd/amdgpu/si.c v = ffs(readrq) - 8; v 2036 drivers/gpu/drm/amd/amdgpu/si.c if ((v == 0) || (v == 6) || (v == 7)) v 1864 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 v, s32 t, u32 ileakage, u32 *leakage) v 1871 drivers/gpu/drm/amd/amdgpu/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); v 1892 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 v, v 1897 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_calculate_leakage_for_v_and_t_formula(coeff, v, t, i_leakage, leakage); v 1901 drivers/gpu/drm/amd/amdgpu/si_dpm.c const u32 fixed_kt, u16 v, v 1907 drivers/gpu/drm/amd/amdgpu/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); v 1921 drivers/gpu/drm/amd/amdgpu/si_dpm.c u16 v, v 1925 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_calculate_leakage_for_v_formula(coeff, fixed_kt, v, i_leakage, leakage); v 3052 drivers/gpu/drm/amd/amdgpu/si_dpm.c *voltage = table->entries[i].v; v 3060 drivers/gpu/drm/amd/amdgpu/si_dpm.c *voltage = table->entries[table->count - 1].v; v 3277 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (*voltage < table->entries[i].v) v 3278 drivers/gpu/drm/amd/amdgpu/si_dpm.c *voltage = (u16)((table->entries[i].v < max_voltage) ? v 3279 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->entries[i].v : max_voltage); v 4413 drivers/gpu/drm/amd/amdgpu/si_dpm.c voltage_table->entries[i].value = voltage_dependency_table->entries[i].v; v 4625 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { v 4640 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { v 5626 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) v 6332 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->entries[i].v, v 6335 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->entries[i].v = leakage_voltage; v 6346 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->entries[j].v = (table->entries[j].v <= table->entries[j + 1].v) ? v 6347 drivers/gpu/drm/amd/amdgpu/si_dpm.c table->entries[j].v : table->entries[j + 1].v; v 7360 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; v 7362 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; v 7364 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; v 7366 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; v 1656 drivers/gpu/drm/amd/amdgpu/sid.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 112 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 122 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32(data, v); v 148 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_pcie_wreg64(struct amdgpu_device *adev, u32 reg, u64 v) v 159 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32(data, (u32)(v & 0xffffffffULL)); v 165 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32(data, (u32)(v >> 32)); v 185 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 194 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32(data, (v)); v 213 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 222 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32(data, (v)); v 238 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_gc_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 244 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA, (v)); v 260 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_se_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 266 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmSE_CAC_IND_DATA, (v)); v 48 drivers/gpu/drm/amd/amdgpu/soc15d.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 80 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c u32 v; v 90 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c v = RREG32(mmVCE_RB_RPTR); v 92 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c v = RREG32(mmVCE_RB_RPTR2); v 94 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c v = RREG32(mmVCE_RB_RPTR3); v 99 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return v; v 112 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c u32 v; v 122 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c v = RREG32(mmVCE_RB_WPTR); v 124 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c v = RREG32(mmVCE_RB_WPTR2); v 126 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c v = RREG32(mmVCE_RB_WPTR3); v 131 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return v; v 480 drivers/gpu/drm/amd/amdgpu/vega10_ih.c uint32_t v = 0; v 494 drivers/gpu/drm/amd/amdgpu/vega10_ih.c v = RREG32_NO_KIQ(reg_rptr); v 495 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if ((v < ih->ring_size) && (v != ih->rptr)) v 98 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 105 drivers/gpu/drm/amd/amdgpu/vi.c WREG32_NO_KIQ(mmPCIE_DATA, v); v 122 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 128 drivers/gpu/drm/amd/amdgpu/vi.c WREG32_NO_KIQ(mmSMC_IND_DATA_11, (v)); v 148 drivers/gpu/drm/amd/amdgpu/vi.c static void cz_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 154 drivers/gpu/drm/amd/amdgpu/vi.c WREG32(mmMP0PUB_IND_DATA, (v)); v 170 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 176 drivers/gpu/drm/amd/amdgpu/vi.c WREG32(mmUVD_CTX_DATA, (v)); v 192 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 198 drivers/gpu/drm/amd/amdgpu/vi.c WREG32(mmDIDT_IND_DATA, (v)); v 214 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_gc_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) v 220 drivers/gpu/drm/amd/amdgpu/vi.c WREG32(mmGC_CAC_IND_DATA, (v)); v 105 drivers/gpu/drm/amd/amdgpu/vid.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 40 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c void scaler_settings_calculation(struct dcn_bw_internal_vars *v) v 43 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 44 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->allow_different_hratio_vratio == dcn_bw_yes) { v 45 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 46 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; v 47 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; v 50 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; v 51 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; v 55 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 56 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k] / v->scaler_recout_height[k]); v 59 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] =dcn_bw_max2(v->viewport_height[k] / v->scaler_rec_out_width[k], v->viewport_width[k] / v->scaler_recout_height[k]); v 61 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio[k] = v->h_ratio[k]; v 63 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->interlace_output[k] == 1.0) { v 64 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio[k] = 2.0 * v->v_ratio[k]; v 66 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->underscan_output[k] == 1.0) { v 67 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] = v->h_ratio[k] * v->under_scan_factor; v 68 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio[k] = v->v_ratio[k] * v->under_scan_factor; v 73 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 74 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { v 75 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_hta_ps =dcn_bw_min2(v->max_hscl_taps, 2.0 *dcn_bw_ceil2(v->h_ratio[k], 1.0)); v 77 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->h_ratio[k] < 1.0) { v 78 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_hta_ps = 4.0; v 81 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_hta_ps = 1.0; v 83 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->ta_pscalculation == dcn_bw_override) { v 84 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->htaps[k] = v->override_hta_ps[k]; v 87 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->htaps[k] = v->acceptable_quality_hta_ps; v 89 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio[k] > 1.0) { v 90 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_vta_ps =dcn_bw_min2(v->max_vscl_taps, 2.0 *dcn_bw_ceil2(v->v_ratio[k], 1.0)); v 92 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->v_ratio[k] < 1.0) { v 93 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_vta_ps = 4.0; v 96 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_vta_ps = 1.0; v 98 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->ta_pscalculation == dcn_bw_override) { v 99 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->vtaps[k] = v->override_vta_ps[k]; v 102 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->vtaps[k] = v->acceptable_quality_vta_ps; v 104 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32 || v->source_pixel_format[k] == dcn_bw_rgb_sub_16) { v 105 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->vta_pschroma[k] = 0.0; v 106 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->hta_pschroma[k] = 0.0; v 109 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->ta_pscalculation == dcn_bw_override) { v 110 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->vta_pschroma[k] = v->override_vta_pschroma[k]; v 111 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->hta_pschroma[k] = v->override_hta_pschroma[k]; v 114 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->vta_pschroma[k] = v->acceptable_quality_vta_ps; v 115 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->hta_pschroma[k] = v->acceptable_quality_hta_ps; v 121 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v) v 130 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->scale_ratio_support = dcn_bw_yes; v 131 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 132 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > v->max_hscl_ratio || v->v_ratio[k] > v->max_vscl_ratio || v->h_ratio[k] > v->htaps[k] || v->v_ratio[k] > v->vtaps[k] || (v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16 && (v->h_ratio[k] / 2.0 > v->hta_pschroma[k] || v->v_ratio[k] / 2.0 > v->vta_pschroma[k]))) { v 133 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->scale_ratio_support = dcn_bw_no; v 138 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->source_format_pixel_and_scan_support = dcn_bw_yes; v 139 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 140 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_surface_mode[k] == dcn_bw_sw_linear && v->source_scan[k] != dcn_bw_hor) || ((v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_var_d || v->source_surface_mode[k] == dcn_bw_sw_var_d_x) && v->source_pixel_format[k] != dcn_bw_rgb_sub_64)) { v 141 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->source_format_pixel_and_scan_support = dcn_bw_no; v 146 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 147 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 148 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_ysingle_dpp[k] = v->viewport_width[k]; v 151 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_ysingle_dpp[k] = v->viewport_height[k]; v 153 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) { v 154 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_dety[k] = 8.0; v 155 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_detc[k] = 0.0; v 157 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_32) { v 158 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_dety[k] = 4.0; v 159 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_detc[k] = 0.0; v 161 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_16) { v 162 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_dety[k] = 2.0; v 163 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_detc[k] = 0.0; v 165 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) { v 166 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_dety[k] = 1.0; v 167 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_detc[k] = 2.0; v 170 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_dety[k] = 4.0f / 3.0f; v 171 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_in_detc[k] = 8.0f / 3.0f; v 174 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_read_bandwidth_consumed_gbyte_per_second = 0.0; v 175 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 176 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read_bandwidth[k] = v->swath_width_ysingle_dpp[k] * (dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) * v->v_ratio[k] +dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 2.0 * v->v_ratio[k] / 2) / (v->htotal[k] / v->pixel_clock[k]); v 177 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 178 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read_bandwidth[k] = v->read_bandwidth[k] * (1 + 1 / 256); v 180 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes && v->source_scan[k] != dcn_bw_hor && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x)) { v 181 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read_bandwidth[k] = v->read_bandwidth[k] * (1 + 1 / 64); v 183 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->pte_enable == dcn_bw_yes && v->source_scan[k] == dcn_bw_hor && (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32) && (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x)) { v 184 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read_bandwidth[k] = v->read_bandwidth[k] * (1 + 1 / 256); v 186 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->pte_enable == dcn_bw_yes) { v 187 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read_bandwidth[k] = v->read_bandwidth[k] * (1 + 1 / 512); v 189 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_read_bandwidth_consumed_gbyte_per_second = v->total_read_bandwidth_consumed_gbyte_per_second + v->read_bandwidth[k] / 1000.0; v 191 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_write_bandwidth_consumed_gbyte_per_second = 0.0; v 192 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 193 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_writeback && v->output_format[k] == dcn_bw_444) { v 194 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0; v 196 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->output[k] == dcn_bw_writeback) { v 197 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 1.5; v 200 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->write_bandwidth[k] = 0.0; v 202 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_write_bandwidth_consumed_gbyte_per_second = v->total_write_bandwidth_consumed_gbyte_per_second + v->write_bandwidth[k] / 1000.0; v 204 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_bandwidth_consumed_gbyte_per_second = v->total_read_bandwidth_consumed_gbyte_per_second + v->total_write_bandwidth_consumed_gbyte_per_second; v 205 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcc_enabled_in_any_plane = dcn_bw_no; v 206 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 207 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 208 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcc_enabled_in_any_plane = dcn_bw_yes; v 212 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_todcn_per_state =dcn_bw_min2(v->return_bus_width * v->dcfclk_per_state[i], v->fabric_and_dram_bandwidth_per_state[i] * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0); v 213 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] = v->return_bw_todcn_per_state; v 214 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) { v 215 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency))); v 217 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); v 218 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->critical_point > 1.0 && v->critical_point < 4.0) { v 219 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); v 221 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_todcn_per_state =dcn_bw_min2(v->return_bus_width * v->dcfclk_per_state[i], v->fabric_and_dram_bandwidth_per_state[i] * 1000.0); v 222 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) { v 223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency))); v 225 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); v 226 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->critical_point > 1.0 && v->critical_point < 4.0) { v 227 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); v 231 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->total_read_bandwidth_consumed_gbyte_per_second * 1000.0 <= v->return_bw_per_state[i]) && (v->total_bandwidth_consumed_gbyte_per_second * 1000.0 <= v->fabric_and_dram_bandwidth_per_state[i] * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0)) { v 232 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->bandwidth_support[i] = dcn_bw_yes; v 235 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->bandwidth_support[i] = dcn_bw_no; v 240 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->writeback_latency_support = dcn_bw_yes; v 241 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 242 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_writeback && v->output_format[k] == dcn_bw_444 && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0 > (v->writeback_luma_buffer_size + v->writeback_chroma_buffer_size) * 1024.0 / v->write_back_latency) { v 243 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->writeback_latency_support = dcn_bw_no; v 245 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->output[k] == dcn_bw_writeback && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) >dcn_bw_min2(v->writeback_luma_buffer_size, 2.0 * v->writeback_chroma_buffer_size) * 1024.0 / v->write_back_latency) { v 246 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->writeback_latency_support = dcn_bw_no; v 252 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_round_trip_and_out_of_order_latency_per_state[i] = (v->round_trip_ping_latency_cycles + 32.0) / v->dcfclk_per_state[i] + v->urgent_out_of_order_return_per_channel * v->number_of_channels / v->return_bw_per_state[i]; v 253 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / v->return_bw_per_state[i] > v->urgent_round_trip_and_out_of_order_latency_per_state[i]) { v 254 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rob_support[i] = dcn_bw_yes; v 257 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rob_support[i] = dcn_bw_no; v 262 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 263 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_dp && v->dsc_capability == dcn_bw_yes) { v 264 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output_format[k] == dcn_bw_420) { v 265 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_output_bw = v->pixel_clock[k] / 2.0; v 268 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_output_bw = v->pixel_clock[k]; v 271 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->output_format[k] == dcn_bw_420) { v 272 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_output_bw = v->pixel_clock[k] * 3.0 / 2.0; v 275 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_output_bw = v->pixel_clock[k] * 3.0; v 277 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_hdmi) { v 278 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_phyclk[k] = v->required_output_bw; v 279 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c switch (v->output_deep_color[k]) { v 281 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_phyclk[k] = v->required_phyclk[k] * 5.0 / 4; v 284 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_phyclk[k] = v->required_phyclk[k] * 3.0 / 2; v 289 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_phyclk[k] = v->required_phyclk[k] / 3.0; v 291 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->output[k] == dcn_bw_dp) { v 292 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_phyclk[k] = v->required_output_bw / 4.0; v 295 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_phyclk[k] = 0.0; v 299 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dio_support[i] = dcn_bw_yes; v 300 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 301 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->required_phyclk[k] > v->phyclk_per_state[i] || (v->output[k] == dcn_bw_hdmi && v->required_phyclk[k] > 600.0)) { v 302 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dio_support[i] = dcn_bw_no; v 308 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_writeback = 0.0; v 309 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 310 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_writeback) { v 311 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_writeback = v->total_number_of_active_writeback + 1.0; v 314 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->total_number_of_active_writeback <= v->max_num_writeback) { v 315 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_available_writeback_support = dcn_bw_yes; v 318 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_available_writeback_support = dcn_bw_no; v 322 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 323 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { v 324 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_factor[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] /dcn_bw_ceil2(v->htaps[k] / 6.0, 1.0)); v 327 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_factor[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput); v 329 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_in_detc[k] == 0.0) { v 330 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_factor_chroma[k] = 0.0; v 331 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], 1.0); v 334 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] / 2.0 > 1.0) { v 335 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_factor_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] / 2.0 /dcn_bw_ceil2(v->hta_pschroma[k] / 6.0, 1.0)); v 338 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_factor_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput); v 340 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max5(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], v->vta_pschroma[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k] / 2.0), v->h_ratio[k] * v->v_ratio[k] / 4.0 / v->pscl_factor_chroma[k], 1.0); v 343 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 344 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32 || v->source_pixel_format[k] == dcn_bw_rgb_sub_16)) { v 345 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 346 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_y[k] = 1.0; v 348 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) { v 349 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_y[k] = 4.0; v 352 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_y[k] = 8.0; v 354 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_width_y[k] = 256.0 /dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / v->read256_block_height_y[k]; v 355 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_c[k] = 0.0; v 356 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_width_c[k] = 0.0; v 359 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 360 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_y[k] = 1.0; v 361 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_c[k] = 1.0; v 363 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) { v 364 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_y[k] = 16.0; v 365 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_c[k] = 8.0; v 368 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_y[k] = 8.0; v 369 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_height_c[k] = 8.0; v 371 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_width_y[k] = 256.0 /dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / v->read256_block_height_y[k]; v 372 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_block_width_c[k] = 256.0 /dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / v->read256_block_height_c[k]; v 374 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 375 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_swath_height_y[k] = v->read256_block_height_y[k]; v 376 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_swath_height_c[k] = v->read256_block_height_c[k]; v 379 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_swath_height_y[k] = v->read256_block_width_y[k]; v 380 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_swath_height_c[k] = v->read256_block_width_c[k]; v 382 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32 || v->source_pixel_format[k] == dcn_bw_rgb_sub_16)) { v 383 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) { v 384 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_y[k] = v->max_swath_height_y[k]; v 387 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_y[k] = v->max_swath_height_y[k] / 2.0; v 389 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_c[k] = v->max_swath_height_c[k]; v 392 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 393 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_y[k] = v->max_swath_height_y[k]; v 394 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_c[k] = v->max_swath_height_c[k]; v 396 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 && v->source_scan[k] == dcn_bw_hor) { v 397 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_y[k] = v->max_swath_height_y[k] / 2.0; v 398 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) { v 399 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_c[k] = v->max_swath_height_c[k]; v 402 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_c[k] = v->max_swath_height_c[k] / 2.0; v 405 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10 && v->source_scan[k] == dcn_bw_hor) { v 406 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_c[k] = v->max_swath_height_c[k] / 2.0; v 407 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) { v 408 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_y[k] = v->max_swath_height_y[k]; v 411 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_y[k] = v->max_swath_height_y[k] / 2.0; v 415 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_y[k] = v->max_swath_height_y[k]; v 416 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_swath_height_c[k] = v->max_swath_height_c[k]; v 419 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 420 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_swath_width = 8192.0; v 423 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_swath_width = 5120.0; v 425 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->number_of_dpp_required_for_det_size =dcn_bw_ceil2(v->swath_width_ysingle_dpp[k] /dcn_bw_min2(v->maximum_swath_width, v->det_buffer_size_in_kbyte * 1024.0 / 2.0 / (v->byte_per_pixel_in_dety[k] * v->min_swath_height_y[k] + v->byte_per_pixel_in_detc[k] / 2.0 * v->min_swath_height_c[k])), 1.0); v 426 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_in_detc[k] == 0.0) { v 427 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->number_of_dpp_required_for_lb_size =dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0); v 430 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->number_of_dpp_required_for_lb_size =dcn_bw_max2(dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0),dcn_bw_ceil2((v->vta_pschroma[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k] / 2.0, 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0)); v 432 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->number_of_dpp_required_for_det_and_lb_size[k] =dcn_bw_max2(v->number_of_dpp_required_for_det_size, v->number_of_dpp_required_for_lb_size); v 436 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_dpp[i][j] = 0.0; v 437 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk[i][j] = 0.0; v 438 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_support[i][j] = dcn_bw_yes; v 439 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 440 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_single_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] * (j + 1)) * (1.0 + v->downspreading / 100.0); v 441 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->odm_capability == dcn_bw_yes) { v 442 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_dual_dpp =dcn_bw_max2(v->pixel_clock[k] / 2.0, v->min_dppclk_using_single_dpp[k] / 2.0 * (j + 1)) * (1.0 + v->downspreading / 100.0); v 445 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_dual_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] / 2.0 * (j + 1)) * (1.0 + v->downspreading / 100.0); v 448 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_single_dpp = v->min_dispclk_using_single_dpp * (1.0 + v->dispclk_ramping_margin / 100.0); v 449 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_dual_dpp = v->min_dispclk_using_dual_dpp * (1.0 + v->dispclk_ramping_margin / 100.0); v 451 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_dispclk_using_single_dpp <=dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i]) && v->number_of_dpp_required_for_det_and_lb_size[k] <= 1.0) { v 452 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->no_of_dpp[i][j][k] = 1.0; v 453 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_single_dpp); v 455 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->min_dispclk_using_dual_dpp <=dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { v 456 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->no_of_dpp[i][j][k] = 2.0; v 457 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_dual_dpp); v 460 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->no_of_dpp[i][j][k] = 2.0; v 461 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_dual_dpp); v 462 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_support[i][j] = dcn_bw_no; v 464 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_dpp[i][j] = v->total_number_of_active_dpp[i][j] + v->no_of_dpp[i][j][k]; v 466 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->total_number_of_active_dpp[i][j] > v->max_num_dpp) { v 467 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_dpp[i][j] = 0.0; v 468 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk[i][j] = 0.0; v 469 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_support[i][j] = dcn_bw_yes; v 470 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 471 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_single_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] * (j + 1)) * (1.0 + v->downspreading / 100.0); v 472 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_dual_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] / 2.0 * (j + 1)) * (1.0 + v->downspreading / 100.0); v 474 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_single_dpp = v->min_dispclk_using_single_dpp * (1.0 + v->dispclk_ramping_margin / 100.0); v 475 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dispclk_using_dual_dpp = v->min_dispclk_using_dual_dpp * (1.0 + v->dispclk_ramping_margin / 100.0); v 477 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->number_of_dpp_required_for_det_and_lb_size[k] <= 1.0) { v 478 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->no_of_dpp[i][j][k] = 1.0; v 479 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_single_dpp); v 480 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_dispclk_using_single_dpp >dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { v 481 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_support[i][j] = dcn_bw_no; v 485 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->no_of_dpp[i][j][k] = 2.0; v 486 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_dual_dpp); v 487 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_dispclk_using_dual_dpp >dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { v 488 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_support[i][j] = dcn_bw_no; v 491 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_dpp[i][j] = v->total_number_of_active_dpp[i][j] + v->no_of_dpp[i][j][k]; v 498 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->viewport_size_support = dcn_bw_yes; v 499 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 500 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->number_of_dpp_required_for_det_and_lb_size[k] > 2.0) { v 501 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->viewport_size_support = dcn_bw_no; v 508 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->total_number_of_active_dpp[i][j] <= v->max_num_dpp) { v 509 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_available_pipes_support[i][j] = dcn_bw_yes; v 512 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_available_pipes_support[i][j] = dcn_bw_no; v 518 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 521 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_yper_state[i][j][k] = v->swath_width_ysingle_dpp[k] / v->no_of_dpp[i][j][k]; v 522 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_granularity_y = 256.0 /dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / v->max_swath_height_y[k]; v 523 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_y = (dcn_bw_ceil2(v->swath_width_yper_state[i][j][k] - 1.0, v->swath_width_granularity_y) + v->swath_width_granularity_y) * v->byte_per_pixel_in_dety[k] * v->max_swath_height_y[k]; v 524 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10) { v 525 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_y =dcn_bw_ceil2(v->rounded_up_max_swath_size_bytes_y, 256.0) + 256; v 527 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->max_swath_height_c[k] > 0.0) { v 528 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_granularity_c = 256.0 /dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / v->max_swath_height_c[k]; v 530 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_c = (dcn_bw_ceil2(v->swath_width_yper_state[i][j][k] / 2.0 - 1.0, v->swath_width_granularity_c) + v->swath_width_granularity_c) * v->byte_per_pixel_in_detc[k] * v->max_swath_height_c[k]; v 531 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10) { v 532 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_c =dcn_bw_ceil2(v->rounded_up_max_swath_size_bytes_c, 256.0) + 256; v 534 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->rounded_up_max_swath_size_bytes_y + v->rounded_up_max_swath_size_bytes_c <= v->det_buffer_size_in_kbyte * 1024.0 / 2.0) { v 535 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_yper_state[i][j][k] = v->max_swath_height_y[k]; v 536 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_cper_state[i][j][k] = v->max_swath_height_c[k]; v 539 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_yper_state[i][j][k] = v->min_swath_height_y[k]; v 540 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_cper_state[i][j][k] = v->min_swath_height_c[k]; v 542 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_in_detc[k] == 0.0) { v 543 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_det_luma = v->det_buffer_size_in_kbyte * 1024.0 / v->byte_per_pixel_in_dety[k] / v->swath_width_yper_state[i][j][k]; v 544 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_det_chroma = 0.0; v 546 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->swath_height_yper_state[i][j][k] <= v->swath_height_cper_state[i][j][k]) { v 547 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_det_luma = v->det_buffer_size_in_kbyte * 1024.0 / 2.0 / v->byte_per_pixel_in_dety[k] / v->swath_width_yper_state[i][j][k]; v 548 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_det_chroma = v->det_buffer_size_in_kbyte * 1024.0 / 2.0 / v->byte_per_pixel_in_detc[k] / (v->swath_width_yper_state[i][j][k] / 2.0); v 551 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_det_luma = v->det_buffer_size_in_kbyte * 1024.0 * 2.0 / 3.0 / v->byte_per_pixel_in_dety[k] / v->swath_width_yper_state[i][j][k]; v 552 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_det_chroma = v->det_buffer_size_in_kbyte * 1024.0 / 3.0 / v->byte_per_pixel_in_dety[k] / (v->swath_width_yper_state[i][j][k] / 2.0); v 554 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_lb_latency_hiding_source_lines_luma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0); v 555 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_lb_latency_hiding_source_lines_chroma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0)), 1.0)) - (v->vta_pschroma[k] - 1.0); v 556 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_detlb_lines_luma =dcn_bw_floor2(v->lines_in_det_luma +dcn_bw_min2(v->lines_in_det_luma * v->required_dispclk[i][j] * v->byte_per_pixel_in_dety[k] * v->pscl_factor[k] / v->return_bw_per_state[i], v->effective_lb_latency_hiding_source_lines_luma), v->swath_height_yper_state[i][j][k]); v 557 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_detlb_lines_chroma =dcn_bw_floor2(v->lines_in_det_chroma +dcn_bw_min2(v->lines_in_det_chroma * v->required_dispclk[i][j] * v->byte_per_pixel_in_detc[k] * v->pscl_factor_chroma[k] / v->return_bw_per_state[i], v->effective_lb_latency_hiding_source_lines_chroma), v->swath_height_cper_state[i][j][k]); v 558 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_in_detc[k] == 0.0) { v 559 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support_us_per_state[i][j][k] = v->effective_detlb_lines_luma * (v->htotal[k] / v->pixel_clock[k]) / v->v_ratio[k] - v->effective_detlb_lines_luma * v->swath_width_yper_state[i][j][k] *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / (v->return_bw_per_state[i] / v->no_of_dpp[i][j][k]); v 562 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support_us_per_state[i][j][k] =dcn_bw_min2(v->effective_detlb_lines_luma * (v->htotal[k] / v->pixel_clock[k]) / v->v_ratio[k] - v->effective_detlb_lines_luma * v->swath_width_yper_state[i][j][k] *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / (v->return_bw_per_state[i] / v->no_of_dpp[i][j][k]), v->effective_detlb_lines_chroma * (v->htotal[k] / v->pixel_clock[k]) / (v->v_ratio[k] / 2.0) - v->effective_detlb_lines_chroma * v->swath_width_yper_state[i][j][k] / 2.0 *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / (v->return_bw_per_state[i] / v->no_of_dpp[i][j][k])); v 569 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support[i][j] = dcn_bw_yes; v 570 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 571 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->urgent_latency_support_us_per_state[i][j][k] < v->urgent_latency / 1.0) { v 572 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support[i][j] = dcn_bw_no; v 581 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_dcc_active_dpp[i][j] = 0.0; v 582 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 583 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 584 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_dcc_active_dpp[i][j] = v->total_number_of_dcc_active_dpp[i][j] + v->no_of_dpp[i][j][k]; v 591 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep = 8.0; v 592 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 593 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, v->pixel_clock[k] / 16.0); v 594 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_in_detc[k] == 0.0) { v 595 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio[k] <= 1.0) { v 596 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 64.0 * v->h_ratio[k] * v->pixel_clock[k] / v->no_of_dpp[i][j][k]); v 599 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 64.0 * v->pscl_factor[k] * v->required_dispclk[i][j] / (1 + j)); v 603 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio[k] <= 1.0) { v 604 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 32.0 * v->h_ratio[k] * v->pixel_clock[k] / v->no_of_dpp[i][j][k]); v 607 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 32.0 * v->pscl_factor[k] * v->required_dispclk[i][j] / (1 + j)); v 609 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio[k] / 2.0 <= 1.0) { v 610 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 32.0 * v->h_ratio[k] / 2.0 * v->pixel_clock[k] / v->no_of_dpp[i][j][k]); v 613 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 32.0 * v->pscl_factor_chroma[k] * v->required_dispclk[i][j] / (1 + j)); v 617 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 618 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 619 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_req_height_y = 8.0 * v->read256_block_height_y[k]; v 620 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_req_width_y = 64.0 * 256.0 /dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / v->meta_req_height_y; v 621 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surface_width_y =dcn_bw_ceil2(v->viewport_width[k] / v->no_of_dpp[i][j][k] - 1.0, v->meta_req_width_y) + v->meta_req_width_y; v 622 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surface_height_y =dcn_bw_ceil2(v->viewport_height[k] - 1.0, v->meta_req_height_y) + v->meta_req_height_y; v 623 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 624 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame_y = (dcn_bw_ceil2((v->meta_surface_width_y * v->meta_surface_height_y *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 256.0 - 4096.0) / 8.0 / 4096.0, 1.0) + 1) * 64.0; v 627 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame_y = 0.0; v 629 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 630 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes_y = v->meta_surface_width_y * v->meta_req_height_y *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 256.0; v 633 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes_y = v->meta_surface_height_y * v->meta_req_width_y *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 256.0; v 637 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame_y = 0.0; v 638 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes_y = 0.0; v 640 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 641 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 642 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_y = 256.0; v 643 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_y = 1.0; v 645 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) { v 646 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_y = 4096.0; v 647 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_y = 4.0 * v->read256_block_height_y[k]; v 649 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) { v 650 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_y = 64.0 * 1024; v 651 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_y = 16.0 * v->read256_block_height_y[k]; v 654 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_y = 256.0 * 1024; v 655 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_y = 32.0 * v->read256_block_height_y[k]; v 657 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->macro_tile_block_size_bytes_y <= 65536.0) { v 658 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_pte_req_height_y = v->macro_tile_block_height_y; v 661 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_pte_req_height_y = 16.0 * v->read256_block_height_y[k]; v 663 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_pte_req_width_y = 4096.0 /dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / v->data_pte_req_height_y * 8; v 664 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 665 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_y = 64.0 * (dcn_bw_ceil2((v->viewport_width[k] / v->no_of_dpp[i][j][k] *dcn_bw_min2(128.0, dcn_bw_pow(2.0,dcn_bw_floor2(dcn_bw_log(v->pte_buffer_size_in_requests * v->data_pte_req_width_y / (v->viewport_width[k] / v->no_of_dpp[i][j][k]), 2.0), 1.0))) - 1.0) / v->data_pte_req_width_y, 1.0) + 1); v 667 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_scan[k] == dcn_bw_hor) { v 668 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_y = 64.0 * (dcn_bw_ceil2((v->viewport_width[k] / v->no_of_dpp[i][j][k] - 1.0) / v->data_pte_req_width_y, 1.0) + 1); v 671 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_y = 64.0 * (dcn_bw_ceil2((v->viewport_height[k] - 1.0) / v->data_pte_req_height_y, 1.0) + 1); v 675 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_y = 0.0; v 677 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16)) { v 678 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 679 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_req_height_c = 8.0 * v->read256_block_height_c[k]; v 680 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_req_width_c = 64.0 * 256.0 /dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / v->meta_req_height_c; v 681 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surface_width_c =dcn_bw_ceil2(v->viewport_width[k] / v->no_of_dpp[i][j][k] / 2.0 - 1.0, v->meta_req_width_c) + v->meta_req_width_c; v 682 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surface_height_c =dcn_bw_ceil2(v->viewport_height[k] / 2.0 - 1.0, v->meta_req_height_c) + v->meta_req_height_c; v 683 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 684 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame_c = (dcn_bw_ceil2((v->meta_surface_width_c * v->meta_surface_height_c *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 256.0 - 4096.0) / 8.0 / 4096.0, 1.0) + 1) * 64.0; v 687 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame_c = 0.0; v 689 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 690 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes_c = v->meta_surface_width_c * v->meta_req_height_c *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 256.0; v 693 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes_c = v->meta_surface_height_c * v->meta_req_width_c *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 256.0; v 697 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame_c = 0.0; v 698 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes_c = 0.0; v 700 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 701 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 702 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_c = 256.0; v 703 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_c = 1.0; v 705 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) { v 706 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_c = 4096.0; v 707 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_c = 4.0 * v->read256_block_height_c[k]; v 709 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) { v 710 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_c = 64.0 * 1024; v 711 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_c = 16.0 * v->read256_block_height_c[k]; v 714 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_size_bytes_c = 256.0 * 1024; v 715 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_height_c = 32.0 * v->read256_block_height_c[k]; v 717 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_block_width_c = v->macro_tile_block_size_bytes_c /dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / v->macro_tile_block_height_c; v 718 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->macro_tile_block_size_bytes_c <= 65536.0) { v 719 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_pte_req_height_c = v->macro_tile_block_height_c; v 722 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_pte_req_height_c = 16.0 * v->read256_block_height_c[k]; v 724 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_pte_req_width_c = 4096.0 /dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / v->data_pte_req_height_c * 8; v 725 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 726 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_c = 64.0 * (dcn_bw_ceil2((v->viewport_width[k] / v->no_of_dpp[i][j][k] / 2.0 * dcn_bw_min2(128.0, dcn_bw_pow(2.0,dcn_bw_floor2(dcn_bw_log(v->pte_buffer_size_in_requests * v->data_pte_req_width_c / (v->viewport_width[k] / v->no_of_dpp[i][j][k] / 2.0), 2.0), 1.0))) - 1.0) / v->data_pte_req_width_c, 1.0) + 1); v 728 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_scan[k] == dcn_bw_hor) { v 729 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_c = 64.0 * (dcn_bw_ceil2((v->viewport_width[k] / v->no_of_dpp[i][j][k] / 2.0 - 1.0) / v->data_pte_req_width_c, 1.0) + 1); v 732 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_c = 64.0 * (dcn_bw_ceil2((v->viewport_height[k] / 2.0 - 1.0) / v->data_pte_req_height_c, 1.0) + 1); v 736 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_c = 0.0; v 740 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row_c = 0.0; v 741 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame_c = 0.0; v 742 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes_c = 0.0; v 744 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpte_bytes_per_row[k] = v->dpte_bytes_per_row_y + v->dpte_bytes_per_row_c; v 745 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_per_frame[k] = v->meta_pte_bytes_per_frame_y + v->meta_pte_bytes_per_frame_c; v 746 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes[k] = v->meta_row_bytes_y + v->meta_row_bytes_c; v 747 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_init_y = (v->v_ratio[k] + v->vtaps[k] + 1.0 + v->interlace_output[k] * 0.5 * v->v_ratio[k]) / 2.0; v 748 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefill_y[k] =dcn_bw_floor2(v->v_init_y, 1.0); v 749 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_num_sw_y[k] =dcn_bw_ceil2((v->prefill_y[k] - 1.0) / v->swath_height_yper_state[i][j][k], 1.0) + 1; v 750 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->prefill_y[k] > 1.0) { v 751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_sw_y =dcn_bw_mod((v->prefill_y[k] - 2.0), v->swath_height_yper_state[i][j][k]); v 754 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_sw_y =dcn_bw_mod((v->prefill_y[k] + v->swath_height_yper_state[i][j][k] - 2.0), v->swath_height_yper_state[i][j][k]); v 756 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_sw_y =dcn_bw_max2(1.0, v->max_partial_sw_y); v 757 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_lines_y[k] = v->max_num_sw_y[k] * v->swath_height_yper_state[i][j][k] + v->max_partial_sw_y; v 758 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16)) { v 759 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_init_c = (v->v_ratio[k] / 2.0 + v->vtaps[k] + 1.0 + v->interlace_output[k] * 0.5 * v->v_ratio[k] / 2.0) / 2.0; v 760 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefill_c[k] =dcn_bw_floor2(v->v_init_c, 1.0); v 761 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_num_sw_c[k] =dcn_bw_ceil2((v->prefill_c[k] - 1.0) / v->swath_height_cper_state[i][j][k], 1.0) + 1; v 762 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->prefill_c[k] > 1.0) { v 763 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_sw_c =dcn_bw_mod((v->prefill_c[k] - 2.0), v->swath_height_cper_state[i][j][k]); v 766 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_sw_c =dcn_bw_mod((v->prefill_c[k] + v->swath_height_cper_state[i][j][k] - 2.0), v->swath_height_cper_state[i][j][k]); v 768 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_sw_c =dcn_bw_max2(1.0, v->max_partial_sw_c); v 769 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_lines_c[k] = v->max_num_sw_c[k] * v->swath_height_cper_state[i][j][k] + v->max_partial_sw_c; v 772 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_lines_c[k] = 0.0; v 774 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dst_x_after_scaler = 90.0 * v->pixel_clock[k] / (v->required_dispclk[i][j] / (j + 1)) + 42.0 * v->pixel_clock[k] / v->required_dispclk[i][j]; v 775 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->no_of_dpp[i][j][k] > 1.0) { v 776 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dst_x_after_scaler = v->dst_x_after_scaler + v->scaler_rec_out_width[k] / 2.0; v 778 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output_format[k] == dcn_bw_420) { v 779 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dst_y_after_scaler = 1.0; v 782 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dst_y_after_scaler = 0.0; v 784 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_calc = 24.0 / v->projected_dcfclk_deep_sleep; v 785 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_update_offset[k][j] = dcn_bw_ceil2(v->htotal[k] / 4.0, 1.0); v 786 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_repeater_delay = v->max_inter_dcn_tile_repeaters * (2.0 / (v->required_dispclk[i][j] / (j + 1)) + 3.0 / v->required_dispclk[i][j]); v 787 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_update_width[k][j] = (14.0 / v->projected_dcfclk_deep_sleep + 12.0 / (v->required_dispclk[i][j] / (j + 1)) + v->total_repeater_delay) * v->pixel_clock[k]; v 788 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ready_offset[k][j] = dcn_bw_max2(150.0 / (v->required_dispclk[i][j] / (j + 1)), v->total_repeater_delay + 20.0 / v->projected_dcfclk_deep_sleep + 10.0 / (v->required_dispclk[i][j] / (j + 1))) * v->pixel_clock[k]; v 789 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_setup = (v->v_update_offset[k][j] + v->v_update_width[k][j] + v->v_ready_offset[k][j]) / v->pixel_clock[k]; v 790 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->extra_latency = v->urgent_round_trip_and_out_of_order_latency_per_state[i] + (v->total_number_of_active_dpp[i][j] * v->pixel_chunk_size_in_kbyte + v->total_number_of_dcc_active_dpp[i][j] * v->meta_chunk_size) * 1024.0 / v->return_bw_per_state[i]; v 791 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 792 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->extra_latency = v->extra_latency + v->total_number_of_active_dpp[i][j] * v->pte_chunk_size * 1024.0 / v->return_bw_per_state[i]; v 794 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one == dcn_bw_yes) { v 795 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_vstartup = v->vtotal[k] - v->vactive[k] - 1.0; v 798 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_vstartup = v->v_sync_plus_back_porch[k] - 1.0; v 802 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->line_times_for_prefetch[k] = v->maximum_vstartup - v->urgent_latency / (v->htotal[k] / v->pixel_clock[k]) - (v->time_calc + v->time_setup) / (v->htotal[k] / v->pixel_clock[k]) - (v->dst_y_after_scaler + v->dst_x_after_scaler / v->htotal[k]); v 803 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->line_times_for_prefetch[k] =dcn_bw_floor2(4.0 * (v->line_times_for_prefetch[k] + 0.125), 1.0) / 4; v 804 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_bw[k] = (v->meta_pte_bytes_per_frame[k] + 2.0 * v->meta_row_bytes[k] + 2.0 * v->dpte_bytes_per_row[k] + v->prefetch_lines_y[k] * v->swath_width_yper_state[i][j][k] *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) + v->prefetch_lines_c[k] * v->swath_width_yper_state[i][j][k] / 2.0 *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0)) / (v->line_times_for_prefetch[k] * v->htotal[k] / v->pixel_clock[k]); v 806 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) { v 807 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_pte_without_immediate_flip = dcn_bw_max3( v 808 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame[k] / v->prefetch_bandwidth[k], v 809 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->extra_latency, v 810 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->htotal[k] / v->pixel_clock[k] / 4.0); v 812 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_pte_without_immediate_flip = v->htotal[k] / v->pixel_clock[k] / 4.0; v 815 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) { v 816 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_and_dpte_row_without_immediate_flip = dcn_bw_max3(( v 817 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / v->prefetch_bandwidth[k], v 818 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_without_immediate_flip, v 819 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->extra_latency); v 821 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_and_dpte_row_without_immediate_flip = dcn_bw_max2( v 822 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_without_immediate_flip, v 823 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->extra_latency - v->time_for_meta_pte_with_immediate_flip); v 826 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_for_meta_pte_without_immediate_flip[k] =dcn_bw_floor2(4.0 * (v->time_for_meta_pte_without_immediate_flip / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4; v 827 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_for_meta_and_dpte_row_without_immediate_flip[k] =dcn_bw_floor2(4.0 * (v->time_for_meta_and_dpte_row_without_immediate_flip / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4; v 828 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_vstartup = v->maximum_vstartup - 1; v 830 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->lines_for_meta_pte_without_immediate_flip[k] < 8.0 && v->lines_for_meta_and_dpte_row_without_immediate_flip[k] < 16.0) v 835 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->bw_available_for_immediate_flip = v->return_bw_per_state[i]; v 836 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 837 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->bw_available_for_immediate_flip = v->bw_available_for_immediate_flip -dcn_bw_max2(v->read_bandwidth[k], v->prefetch_bw[k]); v 839 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 840 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_immediate_flip_bytes[k] = 0.0; v 841 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) { v 842 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_immediate_flip_bytes[k] = v->total_immediate_flip_bytes[k] + v->meta_pte_bytes_per_frame[k] + v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]; v 845 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 846 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) { v 847 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_pte_with_immediate_flip =dcn_bw_max5(v->meta_pte_bytes_per_frame[k] / v->prefetch_bw[k], v->meta_pte_bytes_per_frame[k] * v->total_immediate_flip_bytes[k] / (v->bw_available_for_immediate_flip * (v->meta_pte_bytes_per_frame[k] + v->meta_row_bytes[k] + v->dpte_bytes_per_row[k])), v->extra_latency, v->urgent_latency, v->htotal[k] / v->pixel_clock[k] / 4.0); v 850 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_pte_with_immediate_flip = v->htotal[k] / v->pixel_clock[k] / 4.0; v 852 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) { v 853 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_and_dpte_row_with_immediate_flip =dcn_bw_max5((v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / v->prefetch_bw[k], (v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) * v->total_immediate_flip_bytes[k] / (v->bw_available_for_immediate_flip * (v->meta_pte_bytes_per_frame[k] + v->meta_row_bytes[k] + v->dpte_bytes_per_row[k])), v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_with_immediate_flip, v->extra_latency, 2.0 * v->urgent_latency); v 856 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_meta_and_dpte_row_with_immediate_flip =dcn_bw_max2(v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_with_immediate_flip, v->extra_latency - v->time_for_meta_pte_with_immediate_flip); v 858 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_for_meta_pte_with_immediate_flip[k] =dcn_bw_floor2(4.0 * (v->time_for_meta_pte_with_immediate_flip / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4; v 859 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_for_meta_and_dpte_row_with_immediate_flip[k] =dcn_bw_floor2(4.0 * (v->time_for_meta_and_dpte_row_with_immediate_flip / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4; v 860 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->line_times_to_request_prefetch_pixel_data_with_immediate_flip = v->line_times_for_prefetch[k] - v->lines_for_meta_pte_with_immediate_flip[k] - v->lines_for_meta_and_dpte_row_with_immediate_flip[k]; v 861 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->line_times_to_request_prefetch_pixel_data_without_immediate_flip = v->line_times_for_prefetch[k] - v->lines_for_meta_pte_without_immediate_flip[k] - v->lines_for_meta_and_dpte_row_without_immediate_flip[k]; v 862 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_to_request_prefetch_pixel_data_with_immediate_flip > 0.0) { v 863 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywith_immediate_flip[i][j][k] = v->prefetch_lines_y[k] / v->line_times_to_request_prefetch_pixel_data_with_immediate_flip; v 864 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->swath_height_yper_state[i][j][k] > 4.0)) { v 865 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_to_request_prefetch_pixel_data_with_immediate_flip - (v->prefill_y[k] - 3.0) / 2.0 > 0.0) { v 866 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywith_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_ywith_immediate_flip[i][j][k], (v->max_num_sw_y[k] * v->swath_height_yper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_with_immediate_flip - (v->prefill_y[k] - 3.0) / 2.0)); v 869 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywith_immediate_flip[i][j][k] = 999999.0; v 872 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwith_immediate_flip[i][j][k] = v->prefetch_lines_c[k] / v->line_times_to_request_prefetch_pixel_data_with_immediate_flip; v 873 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->swath_height_cper_state[i][j][k] > 4.0)) { v 874 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_to_request_prefetch_pixel_data_with_immediate_flip - (v->prefill_c[k] - 3.0) / 2.0 > 0.0) { v 875 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwith_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_cwith_immediate_flip[i][j][k], (v->max_num_sw_c[k] * v->swath_height_cper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_with_immediate_flip - (v->prefill_c[k] - 3.0) / 2.0)); v 878 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwith_immediate_flip[i][j][k] = 999999.0; v 881 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_prefetch_pixel_data_bw_with_immediate_flip[i][j][k] = v->no_of_dpp[i][j][k] * (v->prefetch_lines_y[k] / v->line_times_to_request_prefetch_pixel_data_with_immediate_flip *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) + v->prefetch_lines_c[k] / v->line_times_to_request_prefetch_pixel_data_with_immediate_flip *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 2.0) * v->swath_width_yper_state[i][j][k] / (v->htotal[k] / v->pixel_clock[k]); v 884 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywith_immediate_flip[i][j][k] = 999999.0; v 885 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwith_immediate_flip[i][j][k] = 999999.0; v 886 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_prefetch_pixel_data_bw_with_immediate_flip[i][j][k] = 999999.0; v 888 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_to_request_prefetch_pixel_data_without_immediate_flip > 0.0) { v 889 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywithout_immediate_flip[i][j][k] = v->prefetch_lines_y[k] / v->line_times_to_request_prefetch_pixel_data_without_immediate_flip; v 890 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->swath_height_yper_state[i][j][k] > 4.0)) { v 891 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_to_request_prefetch_pixel_data_without_immediate_flip - (v->prefill_y[k] - 3.0) / 2.0 > 0.0) { v 892 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywithout_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_ywithout_immediate_flip[i][j][k], (v->max_num_sw_y[k] * v->swath_height_yper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_without_immediate_flip - (v->prefill_y[k] - 3.0) / 2.0)); v 895 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywithout_immediate_flip[i][j][k] = 999999.0; v 898 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwithout_immediate_flip[i][j][k] = v->prefetch_lines_c[k] / v->line_times_to_request_prefetch_pixel_data_without_immediate_flip; v 899 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->swath_height_cper_state[i][j][k] > 4.0)) { v 900 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_to_request_prefetch_pixel_data_without_immediate_flip - (v->prefill_c[k] - 3.0) / 2.0 > 0.0) { v 901 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwithout_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_cwithout_immediate_flip[i][j][k], (v->max_num_sw_c[k] * v->swath_height_cper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_without_immediate_flip - (v->prefill_c[k] - 3.0) / 2.0)); v 904 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwithout_immediate_flip[i][j][k] = 999999.0; v 907 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_prefetch_pixel_data_bw_without_immediate_flip[i][j][k] = v->no_of_dpp[i][j][k] * (v->prefetch_lines_y[k] / v->line_times_to_request_prefetch_pixel_data_without_immediate_flip *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) + v->prefetch_lines_c[k] / v->line_times_to_request_prefetch_pixel_data_without_immediate_flip *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 2.0) * v->swath_width_yper_state[i][j][k] / (v->htotal[k] / v->pixel_clock[k]); v 910 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_ywithout_immediate_flip[i][j][k] = 999999.0; v 911 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_pre_cwithout_immediate_flip[i][j][k] = 999999.0; v 912 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_prefetch_pixel_data_bw_without_immediate_flip[i][j][k] = 999999.0; v 915 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_read_bandwidth_with_prefetch_with_immediate_flip = 0.0; v 916 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 917 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) { v 918 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_read_bandwidth_with_prefetch_with_immediate_flip = v->maximum_read_bandwidth_with_prefetch_with_immediate_flip +dcn_bw_max2(v->read_bandwidth[k], v->required_prefetch_pixel_data_bw_with_immediate_flip[i][j][k]) +dcn_bw_max2(v->meta_pte_bytes_per_frame[k] / (v->lines_for_meta_pte_with_immediate_flip[k] * v->htotal[k] / v->pixel_clock[k]), (v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / (v->lines_for_meta_and_dpte_row_with_immediate_flip[k] * v->htotal[k] / v->pixel_clock[k])); v 921 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_read_bandwidth_with_prefetch_with_immediate_flip = v->maximum_read_bandwidth_with_prefetch_with_immediate_flip +dcn_bw_max2(v->read_bandwidth[k], v->required_prefetch_pixel_data_bw_without_immediate_flip[i][j][k]); v 924 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_read_bandwidth_with_prefetch_without_immediate_flip = 0.0; v 925 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 926 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_read_bandwidth_with_prefetch_without_immediate_flip = v->maximum_read_bandwidth_with_prefetch_without_immediate_flip +dcn_bw_max2(v->read_bandwidth[k], v->required_prefetch_pixel_data_bw_without_immediate_flip[i][j][k]); v 928 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_supported_with_immediate_flip[i][j] = dcn_bw_yes; v 929 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->maximum_read_bandwidth_with_prefetch_with_immediate_flip > v->return_bw_per_state[i]) { v 930 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_supported_with_immediate_flip[i][j] = dcn_bw_no; v 932 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 933 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_for_prefetch[k] < 2.0 || v->lines_for_meta_pte_with_immediate_flip[k] >= 8.0 || v->lines_for_meta_and_dpte_row_with_immediate_flip[k] >= 16.0) { v 934 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_supported_with_immediate_flip[i][j] = dcn_bw_no; v 937 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_supported_without_immediate_flip[i][j] = dcn_bw_yes; v 938 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->maximum_read_bandwidth_with_prefetch_without_immediate_flip > v->return_bw_per_state[i]) { v 939 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_supported_without_immediate_flip[i][j] = dcn_bw_no; v 941 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 942 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->line_times_for_prefetch[k] < 2.0 || v->lines_for_meta_pte_without_immediate_flip[k] >= 8.0 || v->lines_for_meta_and_dpte_row_without_immediate_flip[k] >= 16.0) { v 943 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_supported_without_immediate_flip[i][j] = dcn_bw_no; v 950 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_in_prefetch_supported_with_immediate_flip[i][j] = dcn_bw_yes; v 951 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 952 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10) && (v->v_ratio_pre_ywith_immediate_flip[i][j][k] > 4.0 || v->v_ratio_pre_cwith_immediate_flip[i][j][k] > 4.0)) || ((v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 || v->source_pixel_format[k] == dcn_bw_yuv420_sub_10) && (v->v_ratio_pre_ywithout_immediate_flip[i][j][k] > 4.0 || v->v_ratio_pre_cwithout_immediate_flip[i][j][k] > 4.0)))) { v 953 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_in_prefetch_supported_with_immediate_flip[i][j] = dcn_bw_no; v 956 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_in_prefetch_supported_without_immediate_flip[i][j] = dcn_bw_yes; v 957 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 958 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->v_ratio_pre_ywithout_immediate_flip[i][j][k] > 4.0 || v->v_ratio_pre_cwithout_immediate_flip[i][j][k] > 4.0)) { v 959 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_in_prefetch_supported_without_immediate_flip[i][j] = dcn_bw_no; v 968 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->scale_ratio_support == dcn_bw_yes && v->source_format_pixel_and_scan_support == dcn_bw_yes && v->viewport_size_support == dcn_bw_yes && v->bandwidth_support[i] == dcn_bw_yes && v->dio_support[i] == dcn_bw_yes && v->urgent_latency_support[i][j] == dcn_bw_yes && v->rob_support[i] == dcn_bw_yes && v->dispclk_dppclk_support[i][j] == dcn_bw_yes && v->total_available_pipes_support[i][j] == dcn_bw_yes && v->total_available_writeback_support == dcn_bw_yes && v->writeback_latency_support == dcn_bw_yes) { v 969 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->prefetch_supported_with_immediate_flip[i][j] == dcn_bw_yes && v->v_ratio_in_prefetch_supported_with_immediate_flip[i][j] == dcn_bw_yes) { v 970 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->mode_support_with_immediate_flip[i][j] = dcn_bw_yes; v 973 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->mode_support_with_immediate_flip[i][j] = dcn_bw_no; v 975 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->prefetch_supported_without_immediate_flip[i][j] == dcn_bw_yes && v->v_ratio_in_prefetch_supported_without_immediate_flip[i][j] == dcn_bw_yes) { v 976 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->mode_support_without_immediate_flip[i][j] = dcn_bw_yes; v 979 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->mode_support_without_immediate_flip[i][j] = dcn_bw_no; v 983 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->mode_support_with_immediate_flip[i][j] = dcn_bw_no; v 984 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->mode_support_without_immediate_flip[i][j] = dcn_bw_no; v 989 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((i == number_of_states_plus_one || v->mode_support_with_immediate_flip[i][1] == dcn_bw_yes || v->mode_support_with_immediate_flip[i][0] == dcn_bw_yes) && i >= v->voltage_override_level) { v 990 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->voltage_level_with_immediate_flip = i; v 994 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((i == number_of_states_plus_one || v->mode_support_without_immediate_flip[i][1] == dcn_bw_yes || v->mode_support_without_immediate_flip[i][0] == dcn_bw_yes) && i >= v->voltage_override_level) { v 995 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->voltage_level_without_immediate_flip = i; v 998 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->voltage_level_with_immediate_flip == number_of_states_plus_one) { v 999 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->immediate_flip_supported = dcn_bw_no; v 1000 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->voltage_level = v->voltage_level_without_immediate_flip; v 1003 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->immediate_flip_supported = dcn_bw_yes; v 1004 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->voltage_level = v->voltage_level_with_immediate_flip; v 1006 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcfclk = v->dcfclk_per_state[v->voltage_level]; v 1007 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level]; v 1009 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_dispclk_per_ratio[j] = v->required_dispclk[v->voltage_level][j]; v 1010 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1011 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_per_plane_per_ratio[j][k] = v->no_of_dpp[v->voltage_level][j][k]; v 1013 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_support_per_ratio[j] = v->dispclk_dppclk_support[v->voltage_level][j]; v 1015 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_phyclk = v->phyclk_per_state[v->voltage_level]; v 1017 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c void display_pipe_configuration(struct dcn_bw_internal_vars *v) v 1024 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_dpp_per_ratio[j] = 0.0; v 1025 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1026 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_number_of_active_dpp_per_ratio[j] = v->total_number_of_active_dpp_per_ratio[j] + v->dpp_per_plane_per_ratio[j][k]; v 1029 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->dispclk_dppclk_support_per_ratio[0] == dcn_bw_yes && v->dispclk_dppclk_support_per_ratio[1] == dcn_bw_no) || (v->dispclk_dppclk_support_per_ratio[0] == v->dispclk_dppclk_support_per_ratio[1] && (v->total_number_of_active_dpp_per_ratio[0] < v->total_number_of_active_dpp_per_ratio[1] || (((v->total_number_of_active_dpp_per_ratio[0] == v->total_number_of_active_dpp_per_ratio[1]) && v->required_dispclk_per_ratio[0] <= 0.5 * v->required_dispclk_per_ratio[1]))))) { v 1030 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_ratio = 1; v 1031 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->final_error_message = v->error_message[0]; v 1034 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_dppclk_ratio = 2; v 1035 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->final_error_message = v->error_message[1]; v 1037 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1038 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_per_plane[k] = v->dpp_per_plane_per_ratio[v->dispclk_dppclk_ratio - 1][k]; v 1040 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1041 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) { v 1042 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_dety = 8.0; v 1043 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_detc = 0.0; v 1045 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_32) { v 1046 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_dety = 4.0; v 1047 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_detc = 0.0; v 1049 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_16) { v 1050 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_dety = 2.0; v 1051 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_detc = 0.0; v 1053 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) { v 1054 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_dety = 1.0; v 1055 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_detc = 2.0; v 1058 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_dety = 4.0f / 3.0f; v 1059 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pix_detc = 8.0f / 3.0f; v 1061 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32 || v->source_pixel_format[k] == dcn_bw_rgb_sub_16)) { v 1062 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1063 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_y = 1.0; v 1065 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) { v 1066 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_y = 4.0; v 1069 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_y = 8.0; v 1071 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_width_y = 256.0 /dcn_bw_ceil2(v->byte_per_pix_dety, 1.0) / v->read256_bytes_block_height_y; v 1072 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_c = 0.0; v 1073 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_width_c = 0.0; v 1076 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1077 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_y = 1.0; v 1078 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_c = 1.0; v 1080 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) { v 1081 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_y = 16.0; v 1082 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_c = 8.0; v 1085 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_y = 8.0; v 1086 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_height_c = 8.0; v 1088 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_width_y = 256.0 /dcn_bw_ceil2(v->byte_per_pix_dety, 1.0) / v->read256_bytes_block_height_y; v 1089 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read256_bytes_block_width_c = 256.0 /dcn_bw_ceil2(v->byte_per_pix_detc, 2.0) / v->read256_bytes_block_height_c; v 1091 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 1092 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_swath_height_y = v->read256_bytes_block_height_y; v 1093 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_swath_height_c = v->read256_bytes_block_height_c; v 1096 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_swath_height_y = v->read256_bytes_block_width_y; v 1097 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->maximum_swath_height_c = v->read256_bytes_block_width_c; v 1099 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32 || v->source_pixel_format[k] == dcn_bw_rgb_sub_16)) { v 1100 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) { v 1101 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_y = v->maximum_swath_height_y; v 1104 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_y = v->maximum_swath_height_y / 2.0; v 1106 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_c = v->maximum_swath_height_c; v 1109 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1110 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_y = v->maximum_swath_height_y; v 1111 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_c = v->maximum_swath_height_c; v 1113 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 && v->source_scan[k] == dcn_bw_hor) { v 1114 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_y = v->maximum_swath_height_y / 2.0; v 1115 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) { v 1116 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_c = v->maximum_swath_height_c; v 1119 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_c = v->maximum_swath_height_c / 2.0; v 1122 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10 && v->source_scan[k] == dcn_bw_hor) { v 1123 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_c = v->maximum_swath_height_c / 2.0; v 1124 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) { v 1125 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_y = v->maximum_swath_height_y; v 1128 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_y = v->maximum_swath_height_y / 2.0; v 1132 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_y = v->maximum_swath_height_y; v 1133 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->minimum_swath_height_c = v->maximum_swath_height_c; v 1136 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 1137 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width = v->viewport_width[k] / v->dpp_per_plane[k]; v 1140 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width = v->viewport_height[k] / v->dpp_per_plane[k]; v 1142 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_granularity_y = 256.0 /dcn_bw_ceil2(v->byte_per_pix_dety, 1.0) / v->maximum_swath_height_y; v 1143 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_y = (dcn_bw_ceil2(v->swath_width - 1.0, v->swath_width_granularity_y) + v->swath_width_granularity_y) * v->byte_per_pix_dety * v->maximum_swath_height_y; v 1144 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10) { v 1145 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_y =dcn_bw_ceil2(v->rounded_up_max_swath_size_bytes_y, 256.0) + 256; v 1147 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->maximum_swath_height_c > 0.0) { v 1148 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_granularity_c = 256.0 /dcn_bw_ceil2(v->byte_per_pix_detc, 2.0) / v->maximum_swath_height_c; v 1150 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_c = (dcn_bw_ceil2(v->swath_width / 2.0 - 1.0, v->swath_width_granularity_c) + v->swath_width_granularity_c) * v->byte_per_pix_detc * v->maximum_swath_height_c; v 1151 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10) { v 1152 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->rounded_up_max_swath_size_bytes_c =dcn_bw_ceil2(v->rounded_up_max_swath_size_bytes_c, 256.0) + 256; v 1154 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->rounded_up_max_swath_size_bytes_y + v->rounded_up_max_swath_size_bytes_c <= v->det_buffer_size_in_kbyte * 1024.0 / 2.0) { v 1155 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_y[k] = v->maximum_swath_height_y; v 1156 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_c[k] = v->maximum_swath_height_c; v 1159 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_y[k] = v->minimum_swath_height_y; v 1160 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_height_c[k] = v->minimum_swath_height_c; v 1162 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->swath_height_c[k] == 0.0) { v 1163 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->det_buffer_size_y[k] = v->det_buffer_size_in_kbyte * 1024.0; v 1164 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->det_buffer_size_c[k] = 0.0; v 1166 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->swath_height_y[k] <= v->swath_height_c[k]) { v 1167 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->det_buffer_size_y[k] = v->det_buffer_size_in_kbyte * 1024.0 / 2.0; v 1168 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->det_buffer_size_c[k] = v->det_buffer_size_in_kbyte * 1024.0 / 2.0; v 1171 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->det_buffer_size_y[k] = v->det_buffer_size_in_kbyte * 1024.0 * 2.0 / 3.0; v 1172 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->det_buffer_size_c[k] = v->det_buffer_size_in_kbyte * 1024.0 / 3.0; v 1176 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c void dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation(struct dcn_bw_internal_vars *v) v 1181 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_with_ramping = 0.0; v 1182 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_without_ramping = 0.0; v 1183 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1184 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { v 1185 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_throughput[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] /dcn_bw_ceil2(v->htaps[k] / 6.0, 1.0)); v 1188 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_throughput[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput); v 1190 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk_using_single_dpp_luma = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_throughput[k], 1.0); v 1191 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) { v 1192 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_throughput_chroma[k] = 0.0; v 1193 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk_using_single_dpp = v->dppclk_using_single_dpp_luma; v 1196 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { v 1197 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_throughput_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] / 2.0 /dcn_bw_ceil2(v->hta_pschroma[k] / 6.0, 1.0)); v 1200 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_throughput_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput); v 1202 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk_using_single_dpp_chroma = v->pixel_clock[k] *dcn_bw_max3(v->vta_pschroma[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k] / 2.0), v->h_ratio[k] * v->v_ratio[k] / 4.0 / v->pscl_throughput_chroma[k], 1.0); v 1203 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk_using_single_dpp =dcn_bw_max2(v->dppclk_using_single_dpp_luma, v->dppclk_using_single_dpp_chroma); v 1205 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->odm_capable == dcn_bw_yes) { v 1206 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_with_ramping =dcn_bw_max2(v->dispclk_with_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k] / v->dpp_per_plane[k]) * (1.0 + v->downspreading / 100.0) * (1.0 + v->dispclk_ramping_margin / 100.0)); v 1207 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_without_ramping =dcn_bw_max2(v->dispclk_without_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k] / v->dpp_per_plane[k]) * (1.0 + v->downspreading / 100.0)); v 1210 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_with_ramping =dcn_bw_max2(v->dispclk_with_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k]) * (1.0 + v->downspreading / 100.0) * (1.0 + v->dispclk_ramping_margin / 100.0)); v 1211 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk_without_ramping =dcn_bw_max2(v->dispclk_without_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k]) * (1.0 + v->downspreading / 100.0)); v 1214 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dispclk_without_ramping > v->max_dispclk[number_of_states]) { v 1215 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk = v->dispclk_without_ramping; v 1217 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->dispclk_with_ramping > v->max_dispclk[number_of_states]) { v 1218 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk = v->max_dispclk[number_of_states]; v 1221 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk = v->dispclk_with_ramping; v 1223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk = v->dispclk / v->dispclk_dppclk_ratio; v 1226 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwidth * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0); v 1227 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcc_enabled_any_plane = dcn_bw_no; v 1228 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1229 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 1230 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcc_enabled_any_plane = dcn_bw_yes; v 1233 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw = v->return_bandwidth_to_dcn; v 1234 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_bus_width / 4.0) { v 1235 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency))); v 1237 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); v 1238 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_any_plane == dcn_bw_yes && v->critical_compression > 1.0 && v->critical_compression < 4.0) { v 1239 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); v 1241 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwidth * 1000.0); v 1242 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_bus_width / 4.0) { v 1243 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency))); v 1245 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); v 1246 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enabled_any_plane == dcn_bw_yes && v->critical_compression > 1.0 && v->critical_compression < 4.0) { v 1247 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); v 1249 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1250 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 1251 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_y[k] = v->viewport_width[k] / v->dpp_per_plane[k]; v 1254 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->swath_width_y[k] = v->viewport_height[k] / v->dpp_per_plane[k]; v 1257 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1258 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) { v 1259 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_dety[k] = 8.0; v 1260 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_detc[k] = 0.0; v 1262 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_32) { v 1263 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_dety[k] = 4.0; v 1264 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_detc[k] = 0.0; v 1266 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_16) { v 1267 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_dety[k] = 2.0; v 1268 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_detc[k] = 0.0; v 1270 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) { v 1271 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_dety[k] = 1.0; v 1272 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_detc[k] = 2.0; v 1275 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_dety[k] = 4.0f / 3.0f; v 1276 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->byte_per_pixel_detc[k] = 8.0f / 3.0f; v 1279 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_data_read_bandwidth = 0.0; v 1280 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1281 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read_bandwidth_plane_luma[k] = v->swath_width_y[k] * v->dpp_per_plane[k] *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / (v->htotal[k] / v->pixel_clock[k]) * v->v_ratio[k]; v 1282 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->read_bandwidth_plane_chroma[k] = v->swath_width_y[k] / 2.0 * v->dpp_per_plane[k] *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / (v->htotal[k] / v->pixel_clock[k]) * v->v_ratio[k] / 2.0; v 1283 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_data_read_bandwidth = v->total_data_read_bandwidth + v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k]; v 1285 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_active_dpp = 0.0; v 1286 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_dcc_active_dpp = 0.0; v 1287 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1288 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_active_dpp = v->total_active_dpp + v->dpp_per_plane[k]; v 1289 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 1290 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_dcc_active_dpp = v->total_dcc_active_dpp + v->dpp_per_plane[k]; v 1293 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_round_trip_and_out_of_order_latency = (v->round_trip_ping_latency_cycles + 32.0) / v->dcfclk + v->urgent_out_of_order_return_per_channel * v->number_of_channels / v->return_bw; v 1294 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->last_pixel_of_line_extra_watermark = 0.0; v 1295 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1296 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio[k] <= 1.0) { v 1297 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_luma[k] = v->swath_width_y[k] * v->dpp_per_plane[k] / v->h_ratio[k] / v->pixel_clock[k]; v 1300 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_luma[k] = v->swath_width_y[k] / v->pscl_throughput[k] / v->dppclk; v 1302 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_fabric_line_delivery_time_luma = v->swath_width_y[k] * v->swath_height_y[k] *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / (v->return_bw * v->read_bandwidth_plane_luma[k] / v->dpp_per_plane[k] / v->total_data_read_bandwidth); v 1303 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->last_pixel_of_line_extra_watermark =dcn_bw_max2(v->last_pixel_of_line_extra_watermark, v->data_fabric_line_delivery_time_luma - v->display_pipe_line_delivery_time_luma[k]); v 1304 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_detc[k] == 0.0) { v 1305 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma[k] = 0.0; v 1308 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio[k] / 2.0 <= 1.0) { v 1309 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma[k] = v->swath_width_y[k] / 2.0 * v->dpp_per_plane[k] / (v->h_ratio[k] / 2.0) / v->pixel_clock[k]; v 1312 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma[k] = v->swath_width_y[k] / 2.0 / v->pscl_throughput_chroma[k] / v->dppclk; v 1314 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->data_fabric_line_delivery_time_chroma = v->swath_width_y[k] / 2.0 * v->swath_height_c[k] *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / (v->return_bw * v->read_bandwidth_plane_chroma[k] / v->dpp_per_plane[k] / v->total_data_read_bandwidth); v 1315 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->last_pixel_of_line_extra_watermark =dcn_bw_max2(v->last_pixel_of_line_extra_watermark, v->data_fabric_line_delivery_time_chroma - v->display_pipe_line_delivery_time_chroma[k]); v 1318 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_extra_latency = v->urgent_round_trip_and_out_of_order_latency + (v->total_active_dpp * v->pixel_chunk_size_in_kbyte + v->total_dcc_active_dpp * v->meta_chunk_size) * 1024.0 / v->return_bw; v 1319 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 1320 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_extra_latency = v->urgent_extra_latency + v->total_active_dpp * v->pte_chunk_size * 1024.0 / v->return_bw; v 1322 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_watermark = v->urgent_latency + v->last_pixel_of_line_extra_watermark + v->urgent_extra_latency; v 1323 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->ptemeta_urgent_watermark = v->urgent_watermark + 2.0 * v->urgent_latency; v 1326 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dram_clock_change_watermark = v->dram_clock_change_latency + v->urgent_watermark; v 1327 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_active_writeback = 0.0; v 1328 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1329 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_writeback) { v 1330 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_active_writeback = v->total_active_writeback + 1.0; v 1333 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->total_active_writeback <= 1.0) { v 1334 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->writeback_dram_clock_change_watermark = v->dram_clock_change_latency + v->write_back_latency; v 1337 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->writeback_dram_clock_change_watermark = v->dram_clock_change_latency + v->write_back_latency + v->writeback_chunk_size * 1024.0 / 32.0 / v->socclk; v 1341 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1342 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_dety[k] = v->det_buffer_size_y[k] / v->byte_per_pixel_dety[k] / v->swath_width_y[k]; v 1343 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_dety_rounded_down_to_swath[k] =dcn_bw_floor2(v->lines_in_dety[k], v->swath_height_y[k]); v 1344 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->full_det_buffering_time_y[k] = v->lines_in_dety_rounded_down_to_swath[k] * (v->htotal[k] / v->pixel_clock[k]) / v->v_ratio[k]; v 1345 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_detc[k] > 0.0) { v 1346 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_detc[k] = v->det_buffer_size_c[k] / v->byte_per_pixel_detc[k] / (v->swath_width_y[k] / 2.0); v 1347 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_detc_rounded_down_to_swath[k] =dcn_bw_floor2(v->lines_in_detc[k], v->swath_height_c[k]); v 1348 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->full_det_buffering_time_c[k] = v->lines_in_detc_rounded_down_to_swath[k] * (v->htotal[k] / v->pixel_clock[k]) / (v->v_ratio[k] / 2.0); v 1351 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_detc[k] = 0.0; v 1352 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_in_detc_rounded_down_to_swath[k] = 0.0; v 1353 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->full_det_buffering_time_c[k] = 999999.0; v 1356 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_full_det_buffering_time = 999999.0; v 1357 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1358 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->full_det_buffering_time_y[k] < v->min_full_det_buffering_time) { v 1359 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_full_det_buffering_time = v->full_det_buffering_time_y[k]; v 1360 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->frame_time_for_min_full_det_buffering_time = v->vtotal[k] * v->htotal[k] / v->pixel_clock[k]; v 1362 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->full_det_buffering_time_c[k] < v->min_full_det_buffering_time) { v 1363 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_full_det_buffering_time = v->full_det_buffering_time_c[k]; v 1364 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->frame_time_for_min_full_det_buffering_time = v->vtotal[k] * v->htotal[k] / v->pixel_clock[k]; v 1367 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->average_read_bandwidth_gbyte_per_second = 0.0; v 1368 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1369 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 1370 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->average_read_bandwidth_gbyte_per_second = v->average_read_bandwidth_gbyte_per_second + v->read_bandwidth_plane_luma[k] / v->dcc_rate[k] / 1000.0 + v->read_bandwidth_plane_chroma[k] / v->dcc_rate[k] / 1000.0; v 1373 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->average_read_bandwidth_gbyte_per_second = v->average_read_bandwidth_gbyte_per_second + v->read_bandwidth_plane_luma[k] / 1000.0 + v->read_bandwidth_plane_chroma[k] / 1000.0; v 1375 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 1376 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->average_read_bandwidth_gbyte_per_second = v->average_read_bandwidth_gbyte_per_second + v->read_bandwidth_plane_luma[k] / 1000.0 / 256.0 + v->read_bandwidth_plane_chroma[k] / 1000.0 / 256.0; v 1378 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 1379 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->average_read_bandwidth_gbyte_per_second = v->average_read_bandwidth_gbyte_per_second + v->read_bandwidth_plane_luma[k] / 1000.0 / 512.0 + v->read_bandwidth_plane_chroma[k] / 1000.0 / 512.0; v 1382 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->part_of_burst_that_fits_in_rob =dcn_bw_min2(v->min_full_det_buffering_time * v->total_data_read_bandwidth, v->rob_buffer_size_in_kbyte * 1024.0 * v->total_data_read_bandwidth / (v->average_read_bandwidth_gbyte_per_second * 1000.0)); v 1383 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->stutter_burst_time = v->part_of_burst_that_fits_in_rob * (v->average_read_bandwidth_gbyte_per_second * 1000.0) / v->total_data_read_bandwidth / v->return_bw + (v->min_full_det_buffering_time * v->total_data_read_bandwidth - v->part_of_burst_that_fits_in_rob) / (v->dcfclk * 64.0); v 1384 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->total_active_writeback == 0.0) { v 1385 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->stutter_efficiency_not_including_vblank = (1.0 - (v->sr_exit_time + v->stutter_burst_time) / v->min_full_det_buffering_time) * 100.0; v 1388 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->stutter_efficiency_not_including_vblank = 0.0; v 1390 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->smallest_vblank = 999999.0; v 1391 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1392 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->synchronized_vblank == dcn_bw_yes || v->number_of_active_planes == 1) { v 1393 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_blank_time = (v->vtotal[k] - v->vactive[k]) * v->htotal[k] / v->pixel_clock[k]; v 1396 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_blank_time = 0.0; v 1398 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->smallest_vblank =dcn_bw_min2(v->smallest_vblank, v->v_blank_time); v 1400 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->stutter_efficiency = (v->stutter_efficiency_not_including_vblank / 100.0 * (v->frame_time_for_min_full_det_buffering_time - v->smallest_vblank) + v->smallest_vblank) / v->frame_time_for_min_full_det_buffering_time * 100.0; v 1403 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1404 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_detc[k] > 0.0) { v 1405 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcfclk_deep_sleep_per_plane[k] =dcn_bw_max2(1.1 * v->swath_width_y[k] *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / 32.0 / v->display_pipe_line_delivery_time_luma[k], 1.1 * v->swath_width_y[k] / 2.0 *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / 32.0 / v->display_pipe_line_delivery_time_chroma[k]); v 1408 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcfclk_deep_sleep_per_plane[k] = 1.1 * v->swath_width_y[k] *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / 64.0 / v->display_pipe_line_delivery_time_luma[k]; v 1410 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcfclk_deep_sleep_per_plane[k] =dcn_bw_max2(v->dcfclk_deep_sleep_per_plane[k], v->pixel_clock[k] / 16.0); v 1412 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcf_clk_deep_sleep = 8.0; v 1413 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1414 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dcf_clk_deep_sleep =dcn_bw_max2(v->dcf_clk_deep_sleep, v->dcfclk_deep_sleep_per_plane[k]); v 1418 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->stutter_exit_watermark = v->sr_exit_time + v->last_pixel_of_line_extra_watermark + v->urgent_extra_latency + 10.0 / v->dcf_clk_deep_sleep; v 1419 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->stutter_enter_plus_exit_watermark = v->sr_enter_plus_exit_time + v->last_pixel_of_line_extra_watermark + v->urgent_extra_latency; v 1422 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1423 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_det_plus_lb_lines_luma =dcn_bw_floor2(v->lines_in_dety[k] +dcn_bw_min2(v->lines_in_dety[k] * v->dppclk * v->byte_per_pixel_dety[k] * v->pscl_throughput[k] / (v->return_bw / v->dpp_per_plane[k]), v->effective_lb_latency_hiding_source_lines_luma), v->swath_height_y[k]); v 1424 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support_us_luma = v->effective_det_plus_lb_lines_luma * (v->htotal[k] / v->pixel_clock[k]) / v->v_ratio[k] - v->effective_det_plus_lb_lines_luma * v->swath_width_y[k] * v->byte_per_pixel_dety[k] / (v->return_bw / v->dpp_per_plane[k]); v 1425 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_detc[k] > 0.0) { v 1426 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_det_plus_lb_lines_chroma =dcn_bw_floor2(v->lines_in_detc[k] +dcn_bw_min2(v->lines_in_detc[k] * v->dppclk * v->byte_per_pixel_detc[k] * v->pscl_throughput_chroma[k] / (v->return_bw / v->dpp_per_plane[k]), v->effective_lb_latency_hiding_source_lines_chroma), v->swath_height_c[k]); v 1427 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support_us_chroma = v->effective_det_plus_lb_lines_chroma * (v->htotal[k] / v->pixel_clock[k]) / (v->v_ratio[k] / 2.0) - v->effective_det_plus_lb_lines_chroma * (v->swath_width_y[k] / 2.0) * v->byte_per_pixel_detc[k] / (v->return_bw / v->dpp_per_plane[k]); v 1428 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support_us[k] =dcn_bw_min2(v->urgent_latency_support_us_luma, v->urgent_latency_support_us_chroma); v 1431 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_latency_support_us[k] = v->urgent_latency_support_us_luma; v 1434 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_urgent_latency_support_us = 999999.0; v 1435 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1436 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_urgent_latency_support_us =dcn_bw_min2(v->min_urgent_latency_support_us, v->urgent_latency_support_us[k]); v 1440 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->non_urgent_latency_tolerance = v->min_urgent_latency_support_us - v->urgent_watermark; v 1443 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1444 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32 || v->source_pixel_format[k] == dcn_bw_rgb_sub_16)) { v 1445 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1446 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_y = 1.0; v 1448 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) { v 1449 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_y = 4.0; v 1452 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_y = 8.0; v 1454 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_c = 0.0; v 1457 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1458 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_y = 1.0; v 1459 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_c = 1.0; v 1461 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) { v 1462 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_y = 16.0; v 1463 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_c = 8.0; v 1466 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_y = 8.0; v 1467 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->block_height256_bytes_c = 8.0; v 1470 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 1471 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_request_width_y = 64.0 * 256.0 /dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / (8.0 * v->block_height256_bytes_y); v 1472 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surf_width_y =dcn_bw_ceil2(v->swath_width_y[k] - 1.0, v->meta_request_width_y) + v->meta_request_width_y; v 1473 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surf_height_y =dcn_bw_ceil2(v->viewport_height[k] - 1.0, 8.0 * v->block_height256_bytes_y) + 8.0 * v->block_height256_bytes_y; v 1474 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 1475 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame_y = (dcn_bw_ceil2((v->meta_surf_width_y * v->meta_surf_height_y *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / 256.0 - 4096.0) / 8.0 / 4096.0, 1.0) + 1) * 64.0; v 1478 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame_y = 0.0; v 1480 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 1481 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte_y = v->meta_surf_width_y * 8.0 * v->block_height256_bytes_y *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / 256.0; v 1484 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte_y = v->meta_surf_height_y * v->meta_request_width_y *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / 256.0; v 1488 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame_y = 0.0; v 1489 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte_y = 0.0; v 1491 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 1492 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1493 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_byte_y = 256.0; v 1494 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_y = 1.0; v 1496 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) { v 1497 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_byte_y = 4096.0; v 1498 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_y = 4.0 * v->block_height256_bytes_y; v 1500 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) { v 1501 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_byte_y = 64.0 * 1024; v 1502 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_y = 16.0 * v->block_height256_bytes_y; v 1505 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_byte_y = 256.0 * 1024; v 1506 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_y = 32.0 * v->block_height256_bytes_y; v 1508 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->macro_tile_size_byte_y <= 65536.0) { v 1509 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_req_height_y = v->macro_tile_height_y; v 1512 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_req_height_y = 16.0 * v->block_height256_bytes_y; v 1514 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_req_width_y = 4096.0 /dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / v->pixel_pte_req_height_y * 8; v 1515 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1516 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_y = 64.0 * (dcn_bw_ceil2((v->swath_width_y[k] *dcn_bw_min2(128.0, dcn_bw_pow(2.0,dcn_bw_floor2(dcn_bw_log(v->pte_buffer_size_in_requests * v->pixel_pte_req_width_y / v->swath_width_y[k], 2.0), 1.0))) - 1.0) / v->pixel_pte_req_width_y, 1.0) + 1); v 1518 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_scan[k] == dcn_bw_hor) { v 1519 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_y = 64.0 * (dcn_bw_ceil2((v->swath_width_y[k] - 1.0) / v->pixel_pte_req_width_y, 1.0) + 1); v 1522 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_y = 64.0 * (dcn_bw_ceil2((v->viewport_height[k] - 1.0) / v->pixel_pte_req_height_y, 1.0) + 1); v 1526 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_y = 0.0; v 1528 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16)) { v 1529 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dcc_enable[k] == dcn_bw_yes) { v 1530 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_request_width_c = 64.0 * 256.0 /dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / (8.0 * v->block_height256_bytes_c); v 1531 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surf_width_c =dcn_bw_ceil2(v->swath_width_y[k] / 2.0 - 1.0, v->meta_request_width_c) + v->meta_request_width_c; v 1532 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_surf_height_c =dcn_bw_ceil2(v->viewport_height[k] / 2.0 - 1.0, 8.0 * v->block_height256_bytes_c) + 8.0 * v->block_height256_bytes_c; v 1533 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 1534 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame_c = (dcn_bw_ceil2((v->meta_surf_width_c * v->meta_surf_height_c *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / 256.0 - 4096.0) / 8.0 / 4096.0, 1.0) + 1) * 64.0; v 1537 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame_c = 0.0; v 1539 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_scan[k] == dcn_bw_hor) { v 1540 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte_c = v->meta_surf_width_c * 8.0 * v->block_height256_bytes_c *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / 256.0; v 1543 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte_c = v->meta_surf_height_c * v->meta_request_width_c *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / 256.0; v 1547 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame_c = 0.0; v 1548 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte_c = 0.0; v 1550 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes) { v 1551 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1552 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_bytes_c = 256.0; v 1553 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_c = 1.0; v 1555 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) { v 1556 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_bytes_c = 4096.0; v 1557 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_c = 4.0 * v->block_height256_bytes_c; v 1559 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) { v 1560 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_bytes_c = 64.0 * 1024; v 1561 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_c = 16.0 * v->block_height256_bytes_c; v 1564 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_size_bytes_c = 256.0 * 1024; v 1565 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->macro_tile_height_c = 32.0 * v->block_height256_bytes_c; v 1567 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->macro_tile_size_bytes_c <= 65536.0) { v 1568 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_req_height_c = v->macro_tile_height_c; v 1571 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_req_height_c = 16.0 * v->block_height256_bytes_c; v 1573 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_req_width_c = 4096.0 /dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / v->pixel_pte_req_height_c * 8; v 1574 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->source_surface_mode[k] == dcn_bw_sw_linear) { v 1575 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_c = 64.0 * (dcn_bw_ceil2((v->swath_width_y[k] / 2.0 * dcn_bw_min2(128.0, dcn_bw_pow(2.0,dcn_bw_floor2(dcn_bw_log(v->pte_buffer_size_in_requests * v->pixel_pte_req_width_c / (v->swath_width_y[k] / 2.0), 2.0), 1.0))) - 1.0) / v->pixel_pte_req_width_c, 1.0) + 1); v 1577 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->source_scan[k] == dcn_bw_hor) { v 1578 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_c = 64.0 * (dcn_bw_ceil2((v->swath_width_y[k] / 2.0 - 1.0) / v->pixel_pte_req_width_c, 1.0) + 1); v 1581 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_c = 64.0 * (dcn_bw_ceil2((v->viewport_height[k] / 2.0 - 1.0) / v->pixel_pte_req_height_c, 1.0) + 1); v 1585 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_c = 0.0; v 1589 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row_c = 0.0; v 1590 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame_c = 0.0; v 1591 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte_c = 0.0; v 1593 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pixel_pte_bytes_per_row[k] = v->pixel_pte_bytes_per_row_y + v->pixel_pte_bytes_per_row_c; v 1594 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_pte_bytes_frame[k] = v->meta_pte_bytes_frame_y + v->meta_pte_bytes_frame_c; v 1595 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->meta_row_byte[k] = v->meta_row_byte_y + v->meta_row_byte_c; v 1596 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_init_pre_fill_y[k] =dcn_bw_floor2((v->v_ratio[k] + v->vtaps[k] + 1.0 + v->interlace_output[k] * 0.5 * v->v_ratio[k]) / 2.0, 1.0); v 1597 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_num_swath_y[k] =dcn_bw_ceil2((v->v_init_pre_fill_y[k] - 1.0) / v->swath_height_y[k], 1.0) + 1; v 1598 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_init_pre_fill_y[k] > 1.0) { v 1599 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_swath_y =dcn_bw_mod((v->v_init_pre_fill_y[k] - 2.0), v->swath_height_y[k]); v 1602 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_swath_y =dcn_bw_mod((v->v_init_pre_fill_y[k] + v->swath_height_y[k] - 2.0), v->swath_height_y[k]); v 1604 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_swath_y =dcn_bw_max2(1.0, v->max_partial_swath_y); v 1605 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_source_lines_y[k] = v->max_num_swath_y[k] * v->swath_height_y[k] + v->max_partial_swath_y; v 1606 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16)) { v 1607 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_init_pre_fill_c[k] =dcn_bw_floor2((v->v_ratio[k] / 2.0 + v->vtaps[k] + 1.0 + v->interlace_output[k] * 0.5 * v->v_ratio[k] / 2.0) / 2.0, 1.0); v 1608 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_num_swath_c[k] =dcn_bw_ceil2((v->v_init_pre_fill_c[k] - 1.0) / v->swath_height_c[k], 1.0) + 1; v 1609 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_init_pre_fill_c[k] > 1.0) { v 1610 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_swath_c =dcn_bw_mod((v->v_init_pre_fill_c[k] - 2.0), v->swath_height_c[k]); v 1613 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_swath_c =dcn_bw_mod((v->v_init_pre_fill_c[k] + v->swath_height_c[k] - 2.0), v->swath_height_c[k]); v 1615 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_swath_c =dcn_bw_max2(1.0, v->max_partial_swath_c); v 1618 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_num_swath_c[k] = 0.0; v 1619 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_partial_swath_c = 0.0; v 1621 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_source_lines_c[k] = v->max_num_swath_c[k] * v->swath_height_c[k] + v->max_partial_swath_c; v 1623 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->t_calc = 24.0 / v->dcf_clk_deep_sleep; v 1624 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1625 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one == dcn_bw_yes) { v 1626 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_vstartup_lines[k] = v->vtotal[k] - v->vactive[k] - 1.0; v 1629 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_vstartup_lines[k] = v->v_sync_plus_back_porch[k] - 1.0; v 1632 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->next_prefetch_mode = 0.0; v 1634 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_startup_lines = 13.0; v 1636 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->planes_with_room_to_increase_vstartup_prefetch_bw_less_than_active_bw = dcn_bw_yes; v 1637 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->planes_with_room_to_increase_vstartup_vratio_prefetch_more_than4 = dcn_bw_no; v 1638 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->planes_with_room_to_increase_vstartup_destination_line_times_for_prefetch_less_than2 = dcn_bw_no; v 1639 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_more_than4 = dcn_bw_no; v 1640 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->destination_line_times_for_prefetch_less_than2 = dcn_bw_no; v 1641 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_mode = v->next_prefetch_mode; v 1642 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1643 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dstx_after_scaler = 90.0 * v->pixel_clock[k] / v->dppclk + 42.0 * v->pixel_clock[k] / v->dispclk; v 1644 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dpp_per_plane[k] > 1.0) { v 1645 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dstx_after_scaler = v->dstx_after_scaler + v->scaler_rec_out_width[k] / 2.0; v 1647 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output_format[k] == dcn_bw_420) { v 1648 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dsty_after_scaler = 1.0; v 1651 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dsty_after_scaler = 0.0; v 1653 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_update_offset_pix[k] = dcn_bw_ceil2(v->htotal[k] / 4.0, 1.0); v 1654 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_repeater_delay_time = v->max_inter_dcn_tile_repeaters * (2.0 / v->dppclk + 3.0 / v->dispclk); v 1655 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_update_width_pix[k] = (14.0 / v->dcf_clk_deep_sleep + 12.0 / v->dppclk + v->total_repeater_delay_time) * v->pixel_clock[k]; v 1656 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ready_offset_pix[k] = dcn_bw_max2(150.0 / v->dppclk, v->total_repeater_delay_time + 20.0 / v->dcf_clk_deep_sleep + 10.0 / v->dppclk) * v->pixel_clock[k]; v 1657 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->t_setup = (v->v_update_offset_pix[k] + v->v_update_width_pix[k] + v->v_ready_offset_pix[k]) / v->pixel_clock[k]; v 1658 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_startup[k] =dcn_bw_min2(v->v_startup_lines, v->max_vstartup_lines[k]); v 1659 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->prefetch_mode == 0.0) { v 1660 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->t_wait =dcn_bw_max3(v->dram_clock_change_latency + v->urgent_latency, v->sr_enter_plus_exit_time, v->urgent_latency); v 1662 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->prefetch_mode == 1.0) { v 1663 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->t_wait =dcn_bw_max2(v->sr_enter_plus_exit_time, v->urgent_latency); v 1666 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->t_wait = v->urgent_latency; v 1668 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->destination_lines_for_prefetch[k] =dcn_bw_floor2(4.0 * (v->v_startup[k] - v->t_wait / (v->htotal[k] / v->pixel_clock[k]) - (v->t_calc + v->t_setup) / (v->htotal[k] / v->pixel_clock[k]) - (v->dsty_after_scaler + v->dstx_after_scaler / v->htotal[k]) + 0.125), 1.0) / 4; v 1669 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->destination_lines_for_prefetch[k] > 0.0) { v 1670 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_bandwidth[k] = (v->meta_pte_bytes_frame[k] + 2.0 * v->meta_row_byte[k] + 2.0 * v->pixel_pte_bytes_per_row[k] + v->prefetch_source_lines_y[k] * v->swath_width_y[k] *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) + v->prefetch_source_lines_c[k] * v->swath_width_y[k] / 2.0 *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0)) / (v->destination_lines_for_prefetch[k] * v->htotal[k] / v->pixel_clock[k]); v 1673 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_bandwidth[k] = 999999.0; v 1676 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->bandwidth_available_for_immediate_flip = v->return_bw; v 1677 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1678 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->bandwidth_available_for_immediate_flip = v->bandwidth_available_for_immediate_flip -dcn_bw_max2(v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k], v->prefetch_bandwidth[k]); v 1680 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->tot_immediate_flip_bytes = 0.0; v 1681 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1682 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) { v 1683 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->tot_immediate_flip_bytes = v->tot_immediate_flip_bytes + v->meta_pte_bytes_frame[k] + v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k]; v 1686 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_rd_bandwidth = 0.0; v 1687 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1688 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) { v 1689 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) { v 1690 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_fetching_meta_pte =dcn_bw_max5(v->meta_pte_bytes_frame[k] / v->prefetch_bandwidth[k], v->meta_pte_bytes_frame[k] * v->tot_immediate_flip_bytes / (v->bandwidth_available_for_immediate_flip * (v->meta_pte_bytes_frame[k] + v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k])), v->urgent_extra_latency, v->urgent_latency, v->htotal[k] / v->pixel_clock[k] / 4.0); v 1693 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_fetching_meta_pte =dcn_bw_max3(v->meta_pte_bytes_frame[k] / v->prefetch_bandwidth[k], v->urgent_extra_latency, v->htotal[k] / v->pixel_clock[k] / 4.0); v 1697 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_fetching_meta_pte = v->htotal[k] / v->pixel_clock[k] / 4.0; v 1699 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->destination_lines_to_request_vm_inv_blank[k] =dcn_bw_floor2(4.0 * (v->time_for_fetching_meta_pte / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4; v 1700 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes)) { v 1701 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) { v 1702 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_fetching_row_in_vblank =dcn_bw_max5((v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k]) / v->prefetch_bandwidth[k], (v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k]) * v->tot_immediate_flip_bytes / (v->bandwidth_available_for_immediate_flip * (v->meta_pte_bytes_frame[k] + v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k])), v->urgent_extra_latency, 2.0 * v->urgent_latency, v->htotal[k] / v->pixel_clock[k] - v->time_for_fetching_meta_pte); v 1705 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_fetching_row_in_vblank =dcn_bw_max3((v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k]) / v->prefetch_bandwidth[k], v->urgent_extra_latency, v->htotal[k] / v->pixel_clock[k] - v->time_for_fetching_meta_pte); v 1709 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->time_for_fetching_row_in_vblank =dcn_bw_max2(v->urgent_extra_latency - v->time_for_fetching_meta_pte, v->htotal[k] / v->pixel_clock[k] - v->time_for_fetching_meta_pte); v 1711 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->destination_lines_to_request_row_in_vblank[k] =dcn_bw_floor2(4.0 * (v->time_for_fetching_row_in_vblank / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4; v 1712 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lines_to_request_prefetch_pixel_data = v->destination_lines_for_prefetch[k] - v->destination_lines_to_request_vm_inv_blank[k] - v->destination_lines_to_request_row_in_vblank[k]; v 1713 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->lines_to_request_prefetch_pixel_data > 0.0) { v 1714 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_y[k] = v->prefetch_source_lines_y[k] / v->lines_to_request_prefetch_pixel_data; v 1715 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->swath_height_y[k] > 4.0)) { v 1716 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->lines_to_request_prefetch_pixel_data > (v->v_init_pre_fill_y[k] - 3.0) / 2.0) { v 1717 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_y[k] =dcn_bw_max2(v->v_ratio_prefetch_y[k], v->max_num_swath_y[k] * v->swath_height_y[k] / (v->lines_to_request_prefetch_pixel_data - (v->v_init_pre_fill_y[k] - 3.0) / 2.0)); v 1720 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_y[k] = 999999.0; v 1725 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_y[k] = 999999.0; v 1727 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_y[k] =dcn_bw_max2(v->v_ratio_prefetch_y[k], 1.0); v 1728 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->lines_to_request_prefetch_pixel_data > 0.0) { v 1729 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_c[k] = v->prefetch_source_lines_c[k] / v->lines_to_request_prefetch_pixel_data; v 1730 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->swath_height_c[k] > 4.0)) { v 1731 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->lines_to_request_prefetch_pixel_data > (v->v_init_pre_fill_c[k] - 3.0) / 2.0) { v 1732 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_c[k] =dcn_bw_max2(v->v_ratio_prefetch_c[k], v->max_num_swath_c[k] * v->swath_height_c[k] / (v->lines_to_request_prefetch_pixel_data - (v->v_init_pre_fill_c[k] - 3.0) / 2.0)); v 1735 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_c[k] = 999999.0; v 1740 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_c[k] = 999999.0; v 1742 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_c[k] =dcn_bw_max2(v->v_ratio_prefetch_c[k], 1.0); v 1743 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->lines_to_request_prefetch_pixel_data > 0.0) { v 1744 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_prefetch_pix_data_bw = v->dpp_per_plane[k] * (v->prefetch_source_lines_y[k] / v->lines_to_request_prefetch_pixel_data *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) + v->prefetch_source_lines_c[k] / v->lines_to_request_prefetch_pixel_data *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / 2.0) * v->swath_width_y[k] / (v->htotal[k] / v->pixel_clock[k]); v 1747 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->required_prefetch_pix_data_bw = 999999.0; v 1749 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_rd_bandwidth = v->max_rd_bandwidth +dcn_bw_max2(v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k], v->required_prefetch_pix_data_bw); v 1750 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) { v 1751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_rd_bandwidth = v->max_rd_bandwidth +dcn_bw_max2(v->meta_pte_bytes_frame[k] / (v->destination_lines_to_request_vm_inv_blank[k] * v->htotal[k] / v->pixel_clock[k]), (v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k]) / (v->destination_lines_to_request_row_in_vblank[k] * v->htotal[k] / v->pixel_clock[k])); v 1753 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio_prefetch_y[k] > 4.0 || v->v_ratio_prefetch_c[k] > 4.0) { v 1754 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio_prefetch_more_than4 = dcn_bw_yes; v 1756 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->destination_lines_for_prefetch[k] < 2.0) { v 1757 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->destination_line_times_for_prefetch_less_than2 = dcn_bw_yes; v 1759 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->max_vstartup_lines[k] > v->v_startup_lines) { v 1760 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->required_prefetch_pix_data_bw > (v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k])) { v 1761 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->planes_with_room_to_increase_vstartup_prefetch_bw_less_than_active_bw = dcn_bw_no; v 1763 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio_prefetch_y[k] > 4.0 || v->v_ratio_prefetch_c[k] > 4.0) { v 1764 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->planes_with_room_to_increase_vstartup_vratio_prefetch_more_than4 = dcn_bw_yes; v 1766 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->destination_lines_for_prefetch[k] < 2.0) { v 1767 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->planes_with_room_to_increase_vstartup_destination_line_times_for_prefetch_less_than2 = dcn_bw_yes; v 1771 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->max_rd_bandwidth <= v->return_bw && v->v_ratio_prefetch_more_than4 == dcn_bw_no && v->destination_line_times_for_prefetch_less_than2 == dcn_bw_no) { v 1772 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_mode_supported = dcn_bw_yes; v 1775 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->prefetch_mode_supported = dcn_bw_no; v 1777 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_startup_lines = v->v_startup_lines + 1.0; v 1778 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c } while (!(v->prefetch_mode_supported == dcn_bw_yes || (v->planes_with_room_to_increase_vstartup_prefetch_bw_less_than_active_bw == dcn_bw_yes && v->planes_with_room_to_increase_vstartup_vratio_prefetch_more_than4 == dcn_bw_no && v->planes_with_room_to_increase_vstartup_destination_line_times_for_prefetch_less_than2 == dcn_bw_no))); v 1779 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->next_prefetch_mode = v->next_prefetch_mode + 1.0; v 1780 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c } while (!(v->prefetch_mode_supported == dcn_bw_yes || v->prefetch_mode == 2.0)); v 1781 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1782 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio_prefetch_y[k] <= 1.0) { v 1783 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_luma_prefetch[k] = v->swath_width_y[k] * v->dpp_per_plane[k] / v->h_ratio[k] / v->pixel_clock[k]; v 1786 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_luma_prefetch[k] = v->swath_width_y[k] / v->pscl_throughput[k] / v->dppclk; v 1788 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_detc[k] == 0.0) { v 1789 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma_prefetch[k] = 0.0; v 1792 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->v_ratio_prefetch_c[k] <= 1.0) { v 1793 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma_prefetch[k] = v->swath_width_y[k] * v->dpp_per_plane[k] / v->h_ratio[k] / v->pixel_clock[k]; v 1796 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma_prefetch[k] = v->swath_width_y[k] / v->pscl_throughput[k] / v->dppclk; v 1802 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1803 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->prefetch_mode == 0.0) { v 1804 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->allow_dram_clock_change_during_vblank[k] = dcn_bw_yes; v 1805 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->allow_dram_self_refresh_during_vblank[k] = dcn_bw_yes; v 1806 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_ttuv_blank[k] = v->t_calc +dcn_bw_max3(v->dram_clock_change_watermark, v->stutter_enter_plus_exit_watermark, v->urgent_watermark); v 1808 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->prefetch_mode == 1.0) { v 1809 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->allow_dram_clock_change_during_vblank[k] = dcn_bw_no; v 1810 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->allow_dram_self_refresh_during_vblank[k] = dcn_bw_yes; v 1811 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_ttuv_blank[k] = v->t_calc +dcn_bw_max2(v->stutter_enter_plus_exit_watermark, v->urgent_watermark); v 1814 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->allow_dram_clock_change_during_vblank[k] = dcn_bw_no; v 1815 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->allow_dram_self_refresh_during_vblank[k] = dcn_bw_no; v 1816 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_ttuv_blank[k] = v->t_calc + v->urgent_watermark; v 1821 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dp_ps = 0.0; v 1822 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1823 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dp_ps = v->active_dp_ps + v->dpp_per_plane[k]; v 1825 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1826 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lb_latency_hiding_source_lines_y =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_y[k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0); v 1827 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lb_latency_hiding_source_lines_c =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_y[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0)), 1.0)) - (v->vta_pschroma[k] - 1.0); v 1828 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_lb_latency_hiding_y = v->lb_latency_hiding_source_lines_y / v->v_ratio[k] * (v->htotal[k] / v->pixel_clock[k]); v 1829 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_lb_latency_hiding_c = v->lb_latency_hiding_source_lines_c / (v->v_ratio[k] / 2.0) * (v->htotal[k] / v->pixel_clock[k]); v 1830 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->swath_width_y[k] > 2.0 * v->dpp_output_buffer_pixels) { v 1831 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_output_buffer_lines_y = v->dpp_output_buffer_pixels / v->swath_width_y[k]; v 1833 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->swath_width_y[k] > v->dpp_output_buffer_pixels) { v 1834 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_output_buffer_lines_y = 0.5; v 1837 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_output_buffer_lines_y = 1.0; v 1839 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->swath_width_y[k] / 2.0 > 2.0 * v->dpp_output_buffer_pixels) { v 1840 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_output_buffer_lines_c = v->dpp_output_buffer_pixels / (v->swath_width_y[k] / 2.0); v 1842 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->swath_width_y[k] / 2.0 > v->dpp_output_buffer_pixels) { v 1843 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_output_buffer_lines_c = 0.5; v 1846 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dpp_output_buffer_lines_c = 1.0; v 1848 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppopp_buffering_y = (v->htotal[k] / v->pixel_clock[k]) * (v->dpp_output_buffer_lines_y + v->opp_output_buffer_lines); v 1849 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_det_buffering_time_y = v->full_det_buffering_time_y[k] + (v->lines_in_dety[k] - v->lines_in_dety_rounded_down_to_swath[k]) / v->swath_height_y[k] * (v->htotal[k] / v->pixel_clock[k]); v 1850 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dram_clock_change_latency_margin_y = v->dppopp_buffering_y + v->effective_lb_latency_hiding_y + v->max_det_buffering_time_y - v->dram_clock_change_watermark; v 1851 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->active_dp_ps > 1.0) { v 1852 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dram_clock_change_latency_margin_y = v->active_dram_clock_change_latency_margin_y - (1.0 - 1.0 / (v->active_dp_ps - 1.0)) * v->swath_height_y[k] * (v->htotal[k] / v->pixel_clock[k]); v 1854 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->byte_per_pixel_detc[k] > 0.0) { v 1855 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppopp_buffering_c = (v->htotal[k] / v->pixel_clock[k]) * (v->dpp_output_buffer_lines_c + v->opp_output_buffer_lines); v 1856 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_det_buffering_time_c = v->full_det_buffering_time_c[k] + (v->lines_in_detc[k] - v->lines_in_detc_rounded_down_to_swath[k]) / v->swath_height_c[k] * (v->htotal[k] / v->pixel_clock[k]); v 1857 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dram_clock_change_latency_margin_c = v->dppopp_buffering_c + v->effective_lb_latency_hiding_c + v->max_det_buffering_time_c - v->dram_clock_change_watermark; v 1858 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->active_dp_ps > 1.0) { v 1859 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dram_clock_change_latency_margin_c = v->active_dram_clock_change_latency_margin_c - (1.0 - 1.0 / (v->active_dp_ps - 1.0)) * v->swath_height_c[k] * (v->htotal[k] / v->pixel_clock[k]); v 1861 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dram_clock_change_latency_margin[k] =dcn_bw_min2(v->active_dram_clock_change_latency_margin_y, v->active_dram_clock_change_latency_margin_c); v 1864 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dram_clock_change_latency_margin[k] = v->active_dram_clock_change_latency_margin_y; v 1866 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output_format[k] == dcn_bw_444) { v 1867 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->writeback_dram_clock_change_latency_margin = (v->writeback_luma_buffer_size + v->writeback_chroma_buffer_size) * 1024.0 / (v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0) - v->writeback_dram_clock_change_watermark; v 1870 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->writeback_dram_clock_change_latency_margin =dcn_bw_min2(v->writeback_luma_buffer_size, 2.0 * v->writeback_chroma_buffer_size) * 1024.0 / (v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k])) - v->writeback_dram_clock_change_watermark; v 1872 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_writeback) { v 1873 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->active_dram_clock_change_latency_margin[k] =dcn_bw_min2(v->active_dram_clock_change_latency_margin[k], v->writeback_dram_clock_change_latency_margin); v 1876 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1877 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->allow_dram_clock_change_during_vblank[k] == dcn_bw_yes) { v 1878 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_blank_dram_clock_change_latency_margin[k] = (v->vtotal[k] - v->scaler_recout_height[k]) * (v->htotal[k] / v->pixel_clock[k]) -dcn_bw_max2(v->dram_clock_change_watermark, v->writeback_dram_clock_change_watermark); v 1881 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_blank_dram_clock_change_latency_margin[k] = 0.0; v 1884 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_active_dram_clock_change_margin = 999999.0; v 1885 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_blank_of_min_active_dram_clock_change_margin = 999999.0; v 1886 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->second_min_active_dram_clock_change_margin = 999999.0; v 1887 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1888 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->active_dram_clock_change_latency_margin[k] < v->min_active_dram_clock_change_margin) { v 1889 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->second_min_active_dram_clock_change_margin = v->min_active_dram_clock_change_margin; v 1890 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_active_dram_clock_change_margin = v->active_dram_clock_change_latency_margin[k]; v 1891 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_blank_of_min_active_dram_clock_change_margin = v->v_blank_dram_clock_change_latency_margin[k]; v 1893 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->active_dram_clock_change_latency_margin[k] < v->second_min_active_dram_clock_change_margin) { v 1894 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->second_min_active_dram_clock_change_margin = v->active_dram_clock_change_latency_margin[k]; v 1897 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_vblank_dram_clock_change_margin = 999999.0; v 1898 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1899 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_vblank_dram_clock_change_margin > v->v_blank_dram_clock_change_latency_margin[k]) { v 1900 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_vblank_dram_clock_change_margin = v->v_blank_dram_clock_change_latency_margin[k]; v 1903 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->synchronized_vblank == dcn_bw_yes || v->number_of_active_planes == 1) { v 1904 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dram_clock_change_margin =dcn_bw_max2(v->min_active_dram_clock_change_margin, v->min_vblank_dram_clock_change_margin); v 1906 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->v_blank_of_min_active_dram_clock_change_margin > v->min_active_dram_clock_change_margin) { v 1907 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dram_clock_change_margin =dcn_bw_min2(v->second_min_active_dram_clock_change_margin, v->v_blank_of_min_active_dram_clock_change_margin); v 1910 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dram_clock_change_margin = v->min_active_dram_clock_change_margin; v 1912 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_active_dram_clock_change_margin > 0.0) { v 1913 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dram_clock_change_support = dcn_bw_supported_in_v_active; v 1915 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->dram_clock_change_margin > 0.0) { v 1916 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dram_clock_change_support = dcn_bw_supported_in_v_blank; v 1919 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dram_clock_change_support = dcn_bw_not_supported; v 1923 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->wr_bandwidth = 0.0; v 1924 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1925 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->output[k] == dcn_bw_writeback && v->output_format[k] == dcn_bw_444) { v 1926 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->wr_bandwidth = v->wr_bandwidth + v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0; v 1928 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->output[k] == dcn_bw_writeback) { v 1929 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->wr_bandwidth = v->wr_bandwidth + v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 1.5; v 1932 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->max_used_bw = v->max_rd_bandwidth + v->wr_bandwidth; v 32 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.h void scaler_settings_calculation(struct dcn_bw_internal_vars *v); v 33 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.h void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v); v 34 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.h void display_pipe_configuration(struct dcn_bw_internal_vars *v); v 36 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.h struct dcn_bw_internal_vars *v); v 390 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input->scale_ratio_depth.vinit = pipe->plane_res.scl_data.inits.v.value/4294967296.0; v 443 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c const struct dcn_bw_internal_vars *v, v 464 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c total_active_bw += v->read_bandwidth[i]; v 465 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c total_prefetch_bw += v->prefetch_bandwidth[i]; v 466 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c total_flip_bytes += v->total_immediate_flip_bytes[i]; v 468 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.total_flip_bw = v->return_bw - dcn_bw_max2(total_active_bw, total_prefetch_bw); v 472 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.t_mclk_wm_us = v->dram_clock_change_watermark; v 473 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.t_sr_wm_us = v->stutter_enter_plus_exit_watermark; v 474 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.t_urg_wm_us = v->urgent_watermark; v 475 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.t_extra_us = v->urgent_extra_latency; v 476 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.deepsleep_dcfclk_mhz = v->dcf_clk_deep_sleep; v 480 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.clks_cfg.dcfclk_mhz = v->dcfclk; v 481 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.clks_cfg.dispclk_mhz = v->dispclk; v 482 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.clks_cfg.dppclk_mhz = v->dppclk; v 484 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.clks_cfg.socclk_mhz = v->socclk; v 485 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.clks_cfg.voltage = v->voltage_level; v 487 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.dout.output_format = (v->output_format[in_idx] == dcn_bw_420) ? dm_420 : dm_444; v 488 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.dout.output_type = (v->output[in_idx] == dcn_bw_hdmi) ? dm_hdmi : dm_dp; v 492 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dlg_sys_param.t_srx_delay_us = dc->dcn_ip->dcfclk_cstate_latency / v->dcf_clk_deep_sleep; v 505 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pte_enable == dcn_bw_yes, v 544 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c struct dcn_bw_internal_vars *v) v 547 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level < 2) { v 548 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[1] = v->fabric_and_dram_bandwidth_vnom0p8; v 549 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[0] = v->fabric_and_dram_bandwidth_vnom0p8; v 550 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_vnom0p8; v 551 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation(v); v 554 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_exit_watermark * 1000; v 556 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_enter_plus_exit_watermark * 1000; v 558 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dram_clock_change_watermark * 1000; v 559 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000; v 560 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = v->urgent_watermark * 1000; v 562 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[1] = v->dcfclkv_nom0p8; v 563 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[0] = v->dcfclkv_nom0p8; v 564 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk = v->dcfclkv_nom0p8; v 565 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation(v); v 568 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_exit_watermark * 1000; v 570 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_enter_plus_exit_watermark * 1000; v 572 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dram_clock_change_watermark * 1000; v 573 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.c.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000; v 574 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = v->urgent_watermark * 1000; v 577 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level < 3) { v 578 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[2] = v->fabric_and_dram_bandwidth_vmax0p9; v 579 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[1] = v->fabric_and_dram_bandwidth_vmax0p9; v 580 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[0] = v->fabric_and_dram_bandwidth_vmax0p9; v 581 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_vmax0p9; v 582 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[2] = v->dcfclkv_max0p9; v 583 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[1] = v->dcfclkv_max0p9; v 584 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[0] = v->dcfclkv_max0p9; v 585 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk = v->dcfclkv_max0p9; v 586 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation(v); v 589 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_exit_watermark * 1000; v 591 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_enter_plus_exit_watermark * 1000; v 593 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dram_clock_change_watermark * 1000; v 594 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.d.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000; v 595 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.d.urgent_ns = v->urgent_watermark * 1000; v 598 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[2] = v->fabric_and_dram_bandwidth_vnom0p8; v 599 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[1] = v->fabric_and_dram_bandwidth_vmid0p72; v 600 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[0] = v->fabric_and_dram_bandwidth_vmin0p65; v 601 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level]; v 602 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[2] = v->dcfclkv_nom0p8; v 603 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[1] = v->dcfclkv_mid0p72; v 604 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[0] = v->dcfclkv_min0p65; v 605 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk = v->dcfclk_per_state[v->voltage_level]; v 606 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation(v); v 609 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_exit_watermark * 1000; v 611 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_enter_plus_exit_watermark * 1000; v 613 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dram_clock_change_watermark * 1000; v 614 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.a.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000; v 615 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = v->urgent_watermark * 1000; v 616 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level >= 2) { v 620 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level >= 3) v 670 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c static void hack_disable_optional_pipe_split(struct dcn_bw_internal_vars *v) v 676 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[0] = v->max_dppclk_vmin0p65; v 679 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c static void hack_force_pipe_split(struct dcn_bw_internal_vars *v, v 688 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (pixel_rate_mhz < v->max_dppclk[0]) v 689 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[0] = pixel_rate_mhz; v 692 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c static void hack_bounding_box(struct dcn_bw_internal_vars *v, v 697 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hack_disable_optional_pipe_split(v); v 701 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hack_disable_optional_pipe_split(v); v 705 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hack_force_pipe_split(v, context->streams[0]->timing.pix_clk_100hz); v 731 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c struct dcn_bw_internal_vars *v = &context->dcn_bw_vars; v 744 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c memset(v, 0, sizeof(*v)); v 747 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->sr_exit_time = dc->dcn_soc->sr_exit_time; v 748 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->sr_enter_plus_exit_time = dc->dcn_soc->sr_enter_plus_exit_time; v 749 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->urgent_latency = dc->dcn_soc->urgent_latency; v 750 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->write_back_latency = dc->dcn_soc->write_back_latency; v 751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->percent_of_ideal_drambw_received_after_urg_latency = v 754 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclkv_min0p65 = dc->dcn_soc->dcfclkv_min0p65; v 755 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclkv_mid0p72 = dc->dcn_soc->dcfclkv_mid0p72; v 756 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclkv_nom0p8 = dc->dcn_soc->dcfclkv_nom0p8; v 757 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclkv_max0p9 = dc->dcn_soc->dcfclkv_max0p9; v 759 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk_vmin0p65 = dc->dcn_soc->max_dispclk_vmin0p65; v 760 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk_vmid0p72 = dc->dcn_soc->max_dispclk_vmid0p72; v 761 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk_vnom0p8 = dc->dcn_soc->max_dispclk_vnom0p8; v 762 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk_vmax0p9 = dc->dcn_soc->max_dispclk_vmax0p9; v 764 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk_vmin0p65 = dc->dcn_soc->max_dppclk_vmin0p65; v 765 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk_vmid0p72 = dc->dcn_soc->max_dppclk_vmid0p72; v 766 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk_vnom0p8 = dc->dcn_soc->max_dppclk_vnom0p8; v 767 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk_vmax0p9 = dc->dcn_soc->max_dppclk_vmax0p9; v 769 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->socclk = dc->dcn_soc->socclk; v 771 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_vmin0p65 = dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65; v 772 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_vmid0p72 = dc->dcn_soc->fabric_and_dram_bandwidth_vmid0p72; v 773 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_vnom0p8 = dc->dcn_soc->fabric_and_dram_bandwidth_vnom0p8; v 774 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_vmax0p9 = dc->dcn_soc->fabric_and_dram_bandwidth_vmax0p9; v 776 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclkv_min0p65 = dc->dcn_soc->phyclkv_min0p65; v 777 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclkv_mid0p72 = dc->dcn_soc->phyclkv_mid0p72; v 778 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclkv_nom0p8 = dc->dcn_soc->phyclkv_nom0p8; v 779 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclkv_max0p9 = dc->dcn_soc->phyclkv_max0p9; v 781 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->downspreading = dc->dcn_soc->downspreading; v 782 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->round_trip_ping_latency_cycles = dc->dcn_soc->round_trip_ping_latency_cycles; v 783 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->urgent_out_of_order_return_per_channel = dc->dcn_soc->urgent_out_of_order_return_per_channel; v 784 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->number_of_channels = dc->dcn_soc->number_of_channels; v 785 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->vmm_page_size = dc->dcn_soc->vmm_page_size; v 786 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dram_clock_change_latency = dc->dcn_soc->dram_clock_change_latency; v 787 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->return_bus_width = dc->dcn_soc->return_bus_width; v 789 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->rob_buffer_size_in_kbyte = dc->dcn_ip->rob_buffer_size_in_kbyte; v 790 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->det_buffer_size_in_kbyte = dc->dcn_ip->det_buffer_size_in_kbyte; v 791 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dpp_output_buffer_pixels = dc->dcn_ip->dpp_output_buffer_pixels; v 792 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->opp_output_buffer_lines = dc->dcn_ip->opp_output_buffer_lines; v 793 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pixel_chunk_size_in_kbyte = dc->dcn_ip->pixel_chunk_size_in_kbyte; v 794 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pte_enable = dc->dcn_ip->pte_enable; v 795 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pte_chunk_size = dc->dcn_ip->pte_chunk_size; v 796 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->meta_chunk_size = dc->dcn_ip->meta_chunk_size; v 797 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->writeback_chunk_size = dc->dcn_ip->writeback_chunk_size; v 798 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->odm_capability = dc->dcn_ip->odm_capability; v 799 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dsc_capability = dc->dcn_ip->dsc_capability; v 800 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->line_buffer_size = dc->dcn_ip->line_buffer_size; v 801 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->is_line_buffer_bpp_fixed = dc->dcn_ip->is_line_buffer_bpp_fixed; v 802 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->line_buffer_fixed_bpp = dc->dcn_ip->line_buffer_fixed_bpp; v 803 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_line_buffer_lines = dc->dcn_ip->max_line_buffer_lines; v 804 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->writeback_luma_buffer_size = dc->dcn_ip->writeback_luma_buffer_size; v 805 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->writeback_chroma_buffer_size = dc->dcn_ip->writeback_chroma_buffer_size; v 806 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_num_dpp = dc->dcn_ip->max_num_dpp; v 807 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_num_writeback = dc->dcn_ip->max_num_writeback; v 808 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dchub_topscl_throughput = dc->dcn_ip->max_dchub_topscl_throughput; v 809 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_pscl_tolb_throughput = dc->dcn_ip->max_pscl_tolb_throughput; v 810 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_lb_tovscl_throughput = dc->dcn_ip->max_lb_tovscl_throughput; v 811 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_vscl_tohscl_throughput = dc->dcn_ip->max_vscl_tohscl_throughput; v 812 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_hscl_ratio = dc->dcn_ip->max_hscl_ratio; v 813 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_vscl_ratio = dc->dcn_ip->max_vscl_ratio; v 814 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_hscl_taps = dc->dcn_ip->max_hscl_taps; v 815 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_vscl_taps = dc->dcn_ip->max_vscl_taps; v 816 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->under_scan_factor = dc->dcn_ip->under_scan_factor; v 817 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pte_buffer_size_in_requests = dc->dcn_ip->pte_buffer_size_in_requests; v 818 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dispclk_ramping_margin = dc->dcn_ip->dispclk_ramping_margin; v 819 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_inter_dcn_tile_repeaters = dc->dcn_ip->max_inter_dcn_tile_repeaters; v 820 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one = v 822 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->bug_forcing_luma_and_chroma_request_to_same_size_fixed = v 825 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->voltage[5] = dcn_bw_no_support; v 826 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->voltage[4] = dcn_bw_v_max0p9; v 827 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->voltage[3] = dcn_bw_v_max0p9; v 828 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->voltage[2] = dcn_bw_v_nom0p8; v 829 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->voltage[1] = dcn_bw_v_mid0p72; v 830 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->voltage[0] = dcn_bw_v_min0p65; v 831 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[5] = v->fabric_and_dram_bandwidth_vmax0p9; v 832 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[4] = v->fabric_and_dram_bandwidth_vmax0p9; v 833 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[3] = v->fabric_and_dram_bandwidth_vmax0p9; v 834 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[2] = v->fabric_and_dram_bandwidth_vnom0p8; v 835 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[1] = v->fabric_and_dram_bandwidth_vmid0p72; v 836 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->fabric_and_dram_bandwidth_per_state[0] = v->fabric_and_dram_bandwidth_vmin0p65; v 837 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[5] = v->dcfclkv_max0p9; v 838 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[4] = v->dcfclkv_max0p9; v 839 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[3] = v->dcfclkv_max0p9; v 840 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[2] = v->dcfclkv_nom0p8; v 841 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[1] = v->dcfclkv_mid0p72; v 842 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcfclk_per_state[0] = v->dcfclkv_min0p65; v 843 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[5] = v->max_dispclk_vmax0p9; v 844 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[4] = v->max_dispclk_vmax0p9; v 845 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[3] = v->max_dispclk_vmax0p9; v 846 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[2] = v->max_dispclk_vnom0p8; v 847 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[1] = v->max_dispclk_vmid0p72; v 848 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[0] = v->max_dispclk_vmin0p65; v 849 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[5] = v->max_dppclk_vmax0p9; v 850 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[4] = v->max_dppclk_vmax0p9; v 851 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[3] = v->max_dppclk_vmax0p9; v 852 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[2] = v->max_dppclk_vnom0p8; v 853 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[1] = v->max_dppclk_vmid0p72; v 854 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[0] = v->max_dppclk_vmin0p65; v 855 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclk_per_state[5] = v->phyclkv_max0p9; v 856 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclk_per_state[4] = v->phyclkv_max0p9; v 857 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclk_per_state[3] = v->phyclkv_max0p9; v 858 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclk_per_state[2] = v->phyclkv_nom0p8; v 859 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclk_per_state[1] = v->phyclkv_mid0p72; v 860 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->phyclk_per_state[0] = v->phyclkv_min0p65; v 861 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->synchronized_vblank = dcn_bw_no; v 862 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->ta_pscalculation = dcn_bw_override; v 863 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->allow_different_hratio_vratio = dcn_bw_yes; v 874 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->underscan_output[input_idx] = false; /* taken care of in recout already*/ v 875 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->interlace_output[input_idx] = false; v 877 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->htotal[input_idx] = pipe->stream->timing.h_total; v 878 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->vtotal[input_idx] = pipe->stream->timing.v_total; v 879 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->vactive[input_idx] = pipe->stream->timing.v_addressable + v 881 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->v_sync_plus_back_porch[input_idx] = pipe->stream->timing.v_total v 882 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c - v->vactive[input_idx] v 884 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_100hz/10000.0; v 886 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pixel_clock[input_idx] *= 2; v 888 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_enable[input_idx] = dcn_bw_yes; v 889 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_pixel_format[input_idx] = dcn_bw_rgb_sub_32; v 890 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_surface_mode[input_idx] = dcn_bw_sw_4_kb_s; v 891 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->lb_bit_per_pixel[input_idx] = 30; v 892 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = pipe->stream->timing.h_addressable; v 893 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = pipe->stream->timing.v_addressable; v 901 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->viewport_width[input_idx] > 1920) v 902 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = 1920; v 903 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->viewport_height[input_idx] > 1080) v 904 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = 1080; v 905 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_rec_out_width[input_idx] = v->viewport_width[input_idx]; v 906 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_recout_height[input_idx] = v->viewport_height[input_idx]; v 907 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_ps[input_idx] = 1; v 908 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_ps[input_idx] = 1; v 909 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_pschroma[input_idx] = 1; v 910 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_pschroma[input_idx] = 1; v 911 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_scan[input_idx] = dcn_bw_hor; v 914 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = pipe->plane_res.scl_data.viewport.height; v 915 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = pipe->plane_res.scl_data.viewport.width; v 916 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_rec_out_width[input_idx] = pipe->plane_res.scl_data.recout.width; v 917 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_recout_height[input_idx] = pipe->plane_res.scl_data.recout.height; v 926 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = viewport_end v 929 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_width[input_idx] = viewport_b_end v 938 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = viewport_end v 941 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->viewport_height[input_idx] = viewport_b_end v 944 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->scaler_rec_out_width[input_idx] = pipe->plane_res.scl_data.recout.width v 950 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_rec_out_width[input_idx] == v->viewport_width[input_idx]); v 952 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_recout_height[input_idx] == v->viewport_height[input_idx]); v 955 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_recout_height[input_idx] == v->viewport_width[input_idx]); v 957 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c || v->scaler_rec_out_width[input_idx] == v->viewport_height[input_idx]); v 965 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no; v 975 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_enable[input_idx] = dc->res_pool->hubbub->funcs->dcc_support_pixel_format( v 979 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_pixel_format[input_idx] = tl_pixel_format_to_bw_defs( v 981 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_surface_mode[input_idx] = tl_sw_mode_to_bw_defs( v 983 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->lb_bit_per_pixel[input_idx] = tl_lb_bpp_to_int(pipe->plane_res.scl_data.lb_params.depth); v 984 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_ps[input_idx] = pipe->plane_res.scl_data.taps.h_taps; v 985 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_ps[input_idx] = pipe->plane_res.scl_data.taps.v_taps; v 986 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_pschroma[input_idx] = pipe->plane_res.scl_data.taps.h_taps_c; v 987 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_pschroma[input_idx] = pipe->plane_res.scl_data.taps.v_taps_c; v 993 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->override_hta_pschroma[input_idx] == 1) v 994 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_hta_pschroma[input_idx] = 2; v 995 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->override_vta_pschroma[input_idx] == 1) v 996 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->override_vta_pschroma[input_idx] = 2; v 997 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->source_scan[input_idx] = (pipe->plane_state->rotation % 2) ? dcn_bw_vert : dcn_bw_hor; v 999 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->is_line_buffer_bpp_fixed == dcn_bw_yes) v 1000 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->lb_bit_per_pixel[input_idx] = v->line_buffer_fixed_bpp; v 1001 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dcc_rate[input_idx] = 1; /*TODO: Worst case? does this change?*/ v 1002 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_format[input_idx] = pipe->stream->timing.pixel_encoding == v 1004 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output[input_idx] = pipe->stream->signal == v 1006 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_8bpc; v 1007 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->output[input_idx] == dcn_bw_hdmi) { v 1010 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_10bpc; v 1013 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_12bpc; v 1016 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->output_deep_color[input_idx] = dcn_bw_encoder_16bpc; v 1025 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->number_of_active_planes = input_idx; v 1027 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c scaler_settings_calculation(v); v 1029 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hack_bounding_box(v, &dc->debug, context); v 1031 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c mode_support_and_system_configuration(v); v 1034 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level != 0 v 1037 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dppclk[0] = v->max_dppclk_vmin0p65; v 1038 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c mode_support_and_system_configuration(v); v 1041 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level == 0 && v 1046 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->sr_enter_plus_exit_time = v 1049 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->sr_exit_time = dc->debug.sr_exit_time_dpm0_ns / 1000.0f; v 1050 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = v->sr_enter_plus_exit_time; v 1051 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.dml.soc.sr_exit_time_us = v->sr_exit_time; v 1052 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c mode_support_and_system_configuration(v); v 1055 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c display_pipe_configuration(v); v 1057 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1058 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->source_scan[k] == dcn_bw_hor) v 1059 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->swath_width_y[k] = v->viewport_width[k] / v->dpp_per_plane[k]; v 1061 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->swath_width_y[k] = v->viewport_height[k] / v->dpp_per_plane[k]; v 1063 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1064 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->source_pixel_format[k] == dcn_bw_rgb_sub_64) { v 1065 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_dety[k] = 8.0; v 1066 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_detc[k] = 0.0; v 1067 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c } else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_32) { v 1068 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_dety[k] = 4.0; v 1069 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_detc[k] = 0.0; v 1070 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c } else if (v->source_pixel_format[k] == dcn_bw_rgb_sub_16) { v 1071 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_dety[k] = 2.0; v 1072 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_detc[k] = 0.0; v 1073 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c } else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) { v 1074 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_dety[k] = 1.0; v 1075 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_detc[k] = 2.0; v 1077 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_dety[k] = 4.0f / 3.0f; v 1078 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->byte_per_pixel_detc[k] = 8.0f / 3.0f; v 1082 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->total_data_read_bandwidth = 0.0; v 1083 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c for (k = 0; k <= v->number_of_active_planes - 1; k++) { v 1084 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->read_bandwidth_plane_luma[k] = v->swath_width_y[k] * v->dpp_per_plane[k] * v 1085 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / (v->htotal[k] / v->pixel_clock[k]) * v->v_ratio[k]; v 1086 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->read_bandwidth_plane_chroma[k] = v->swath_width_y[k] / 2.0 * v->dpp_per_plane[k] * v 1087 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / (v->htotal[k] / v->pixel_clock[k]) * v->v_ratio[k] / 2.0; v 1088 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->total_data_read_bandwidth = v->total_data_read_bandwidth + v 1089 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k]; v 1094 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level != number_of_states_plus_one && !fast_validate) { v 1095 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c float bw_consumed = v->total_bandwidth_consumed_gbyte_per_second; v 1097 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (bw_consumed < v->fabric_and_dram_bandwidth_vmin0p65) v 1098 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_consumed = v->fabric_and_dram_bandwidth_vmin0p65; v 1099 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c else if (bw_consumed < v->fabric_and_dram_bandwidth_vmid0p72) v 1100 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_consumed = v->fabric_and_dram_bandwidth_vmid0p72; v 1101 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c else if (bw_consumed < v->fabric_and_dram_bandwidth_vnom0p8) v 1102 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_consumed = v->fabric_and_dram_bandwidth_vnom0p8; v 1104 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_consumed = v->fabric_and_dram_bandwidth_vmax0p9; v 1106 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (bw_consumed < v->fabric_and_dram_bandwidth) v 1108 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_consumed = v->fabric_and_dram_bandwidth; v 1110 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c display_pipe_configuration(v); v 1115 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation(v); v 1118 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_exit_watermark * 1000; v 1120 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->stutter_enter_plus_exit_watermark * 1000; v 1122 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dram_clock_change_watermark * 1000; v 1123 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.a.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000; v 1124 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = v->urgent_watermark * 1000; v 1130 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c (ddr4_dram_factor_single_Channel * v->number_of_channels)); v 1131 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (bw_consumed == v->fabric_and_dram_bandwidth_vmin0p65) v 1134 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (int)(v->dcf_clk_deep_sleep * 1000); v 1135 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); v 1137 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.clk.dispclk_khz = (int)(v->dispclk * 1000); v 1148 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->dispclk_dppclk_ratio; v 1149 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.clk.phyclk_khz = v->phyclk_per_state[v->voltage_level]; v 1150 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c switch (v->voltage_level) { v 1181 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; v 1182 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; v 1183 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx]; v 1184 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx]; v 1211 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->dpp_per_plane[input_idx] == 2 || v 1222 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; v 1223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; v 1224 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx]; v 1225 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c hsplit_pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx]; v 1238 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dcn_bw_calc_rq_dlg_ttu(dc, v, hsplit_pipe, input_idx); v 1254 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dcn_bw_calc_rq_dlg_ttu(dc, v, pipe, input_idx); v 1259 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c } else if (v->voltage_level == number_of_states_plus_one) { v 1265 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (v->voltage_level == 0) { v 1275 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_limit = dc->dcn_soc->percent_disp_bw_limit * v->fabric_and_dram_bandwidth_vmax0p9; v 1276 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_limit_pass = (v->total_data_read_bandwidth / 1000.0) < bw_limit; v 1283 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c if (bw_limit_pass && v->voltage_level <= get_highest_allowed_voltage_level(dc->ctx->asic_id.hw_internal_rev)) v 902 drivers/gpu/drm/amd/display/dc/core/dc_resource.c data->inits.v = dc_fixpt_truncate(dc_fixpt_div_int( v 918 drivers/gpu/drm/amd/display/dc/core/dc_resource.c orthogonal_rotation ? &data->inits.v : &data->inits.h, v 936 drivers/gpu/drm/amd/display/dc/core/dc_resource.c orthogonal_rotation ? &data->inits.h : &data->inits.v, v 950 drivers/gpu/drm/amd/display/dc/core/dc_resource.c data->inits.v_bot = dc_fixpt_add(data->inits.v, data->ratios.vert); v 612 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_frac = dc_fixpt_u0d19(data->inits.v) << 5; v 613 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c init_int = dc_fixpt_floor(data->inits.v); v 164 drivers/gpu/drm/amd/display/dc/inc/hw/transform.h struct fixed31_32 v; v 1131 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[entry_id].v == virtual_voltage_id) { v 397 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c dep_table->entries[i].v = v 1128 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c uvd_table->entries[i].v = (unsigned long)le16_to_cpu(table->entries[i].usVoltage); v 1160 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c vce_table->entries[i].v = (unsigned long)le16_to_cpu(table->entries[i].usVoltage); v 1190 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c samu_table->entries[i].v = (unsigned long)le16_to_cpu(table->entries[i].usVoltage); v 1218 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c acp_table->entries[i].v = (unsigned long)le16_to_cpu(table->entries[i].usVoltage); v 150 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[0].v = 0; v 152 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[1].v = 1; v 154 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[2].v = 2; v 156 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[3].v = 3; v 158 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[4].v = 4; v 160 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[5].v = 5; v 162 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[6].v = 6; v 164 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c table_clk_vlt->entries[7].v = 7; v 236 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c voltage_dependency_table->entries[i].v; v 719 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; v 731 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->dpm_table.vddci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; v 745 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->dpm_table.mvdd_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; v 2270 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &tab->entries[i].v, v 2284 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &tab->entries[i].v, v 2298 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &tab->entries[i].v, v 2313 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &tab->entries[i].v, v 2341 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &tab->entries[i].v, v 2355 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &tab->entries[i].v, v 2476 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->min_vddc_in_pptable = (uint16_t)allowed_sclk_vddc_table->entries[0].v; v 2477 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->max_vddc_in_pptable = (uint16_t)allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; v 2484 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; v 2487 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->min_vddci_in_pptable = (uint16_t)allowed_mclk_vddci_table->entries[0].v; v 2488 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->max_vddci_in_pptable = (uint16_t)allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v; v 2492 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.vddci = hwmgr->dyn_state.vddci_dependency_on_mclk->entries[hwmgr->dyn_state.vddci_dependency_on_mclk->count - 1].v; v 3391 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (dep_mclk_table->entries[0].v != v 265 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (uint16_t)dep_table->entries[dep_table->count-1].v); v 287 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[0].v = 0; v 289 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[1].v = 1; v 291 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[2].v = 2; v 293 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[3].v = 3; v 295 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[4].v = 4; v 297 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[5].v = 5; v 299 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[6].v = 6; v 301 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c table_clk_vlt->entries[7].v = 7; v 478 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < vddc_table->count) ? (uint8_t)vddc_table->entries[i].v : 0; v 491 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < vdd_gfx_table->count) ? (uint8_t)vdd_gfx_table->entries[i].v : 0; v 495 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < acp_table->count) ? (uint8_t)acp_table->entries[i].v : 0; v 509 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0; v 521 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0; v 534 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < vce_table->count) ? (uint8_t)vce_table->entries[i].v : 0; v 1351 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c smu8_ps->levels[index].vddcIndex = (uint8_t)table->entries[clock_info_index].v; v 1485 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (limits->vddc >= table->entries[i].v) { v 508 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table_clk_vlt->entries[0].v = 0; v 510 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table_clk_vlt->entries[1].v = 720; v 512 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table_clk_vlt->entries[2].v = 810; v 514 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table_clk_vlt->entries[3].v = 900; v 550 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c req_vddc = table->entries[i].v; v 99 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 105 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 111 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 116 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 121 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 138 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 148 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 159 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 391 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t v; v 286 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c *vol = allowed_clock_voltage_table->entries[i].v; v 291 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c *vol = allowed_clock_voltage_table->entries[i - 1].v; v 781 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { v 797 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { v 965 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) v 969 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c state->VddcOffset = (uint16_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage); v 972 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) v 976 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage) v 1533 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uvd_table->entries[count].v * VOLTAGE_SCALE; v 1572 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c vce_table->entries[count].v * VOLTAGE_SCALE; v 1603 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->AcpLevel[count].MinVoltage = acp_table->entries[count].v; v 2879 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (uvd_table->entries[i].v <= max_vddc) v 2910 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (vce_table->entries[i].v <= max_vddc) v 519 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c *vol = allowed_clock_voltage_table->entries[i].v; v 525 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c *vol = allowed_clock_voltage_table->entries[i - 1].v; v 555 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { v 575 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { v 734 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) v 738 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c state->VddcOffset = (uint16_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage); v 741 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) v 745 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage) v 19 drivers/gpu/drm/arm/display/include/malidp_io.h malidp_write32(u32 __iomem *base, u32 offset, u32 v) v 21 drivers/gpu/drm/arm/display/include/malidp_io.h writel(v, (base + (offset >> 2))); v 25 drivers/gpu/drm/arm/display/include/malidp_io.h malidp_write64(u32 __iomem *base, u32 offset, u64 v) v 27 drivers/gpu/drm/arm/display/include/malidp_io.h writel(lower_32_bits(v), (base + (offset >> 2))); v 28 drivers/gpu/drm/arm/display/include/malidp_io.h writel(upper_32_bits(v), (base + (offset >> 2) + 1)); v 32 drivers/gpu/drm/arm/display/include/malidp_io.h malidp_write32_mask(u32 __iomem *base, u32 offset, u32 m, u32 v) v 37 drivers/gpu/drm/arm/display/include/malidp_io.h malidp_write32(base, offset, v | tmp); v 41 drivers/gpu/drm/arm/display/include/malidp_utils.h static inline bool in_range(struct malidp_range *rg, u32 v) v 43 drivers/gpu/drm/arm/display/include/malidp_utils.h return (v >= rg->start) && (v <= rg->end); v 271 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v[15], i; v 275 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, LAYER_INFO, 1, &v[14]); v 276 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c if (v[14] & 0x1) { v 284 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c rgb2rgb = !!(v[14] & L_INFO_CM); v 288 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sLAYER_INFO:\t\t0x%X\n", prefix, v[14]); v 290 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD0, 1, v); v 291 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sCONTROL:\t\t0x%X\n", prefix, v[0]); v 293 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD4, 1, v); v 294 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LR_RICH_CONTROL:\t0x%X\n", v[0]); v 296 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD8, 4, v); v 297 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sFORMAT:\t\t0x%X\n", prefix, v[0]); v 298 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sIT_COEFFTAB:\t\t0x%X\n", prefix, v[1]); v 299 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sIN_SIZE:\t\t0x%X\n", prefix, v[2]); v 300 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sPALPHA:\t\t0x%X\n", prefix, v[3]); v 302 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x100, 3, v); v 303 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sP0_PTR_LOW:\t\t0x%X\n", prefix, v[0]); v 304 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sP0_PTR_HIGH:\t\t0x%X\n", prefix, v[1]); v 305 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sP0_STRIDE:\t\t0x%X\n", prefix, v[2]); v 307 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x110, 2, v); v 308 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sP1_PTR_LOW:\t\t0x%X\n", prefix, v[0]); v 309 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sP1_PTR_HIGH:\t\t0x%X\n", prefix, v[1]); v 311 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x118, 1, v); v 312 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LR_P1_STRIDE:\t\t0x%X\n", v[0]); v 314 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x120, 2, v); v 315 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LR_P2_PTR_LOW:\t\t0x%X\n", v[0]); v 316 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LR_P2_PTR_HIGH:\t\t0x%X\n", v[1]); v 318 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x130, 12, v); v 320 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LR_YUV_RGB_COEFF%u:\t0x%X\n", i, v[i]); v 324 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, LAYER_RGB_RGB_COEFF0, 12, v); v 326 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LS_RGB_RGB_COEFF%u:\t0x%X\n", i, v[i]); v 329 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x160, 3, v); v 330 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sAD_CONTROL:\t\t0x%X\n", prefix, v[0]); v 331 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sAD_H_CROP:\t\t0x%X\n", prefix, v[1]); v 332 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "%sAD_V_CROP:\t\t0x%X\n", prefix, v[2]); v 399 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v[12], i; v 403 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x80, 1, v); v 404 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_INPUT_ID0:\t\t0x%X\n", v[0]); v 406 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD0, 3, v); v 407 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_CONTROL:\t\t0x%X\n", v[0]); v 408 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_PROG_LINE:\t\t0x%X\n", v[1]); v 409 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_FORMAT:\t\t0x%X\n", v[2]); v 411 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xE0, 1, v); v 412 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_IN_SIZE:\t\t0x%X\n", v[0]); v 415 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x100 + i * 0x10, 3, v); v 416 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_P%u_PTR_LOW:\t\t0x%X\n", i, v[0]); v 417 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_P%u_PTR_HIGH:\t\t0x%X\n", i, v[1]); v 418 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_P%u_STRIDE:\t\t0x%X\n", i, v[2]); v 421 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x130, 12, v); v 423 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "LW_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]); v 537 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v[8], i; v 541 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x80, 5, v); v 543 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_INPUT_ID%u:\t\t0x%X\n", i, v[i]); v 545 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xA0, 5, v); v 546 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); v 547 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_IRQ_CLEAR:\t\t0x%X\n", v[1]); v 548 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_IRQ_MASK:\t\t0x%X\n", v[2]); v 549 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_IRQ_STATUS:\t\t0x%X\n", v[3]); v 550 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_STATUS:\t\t0x%X\n", v[4]); v 552 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD0, 2, v); v 553 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_CONTROL:\t\t0x%X\n", v[0]); v 554 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_SIZE:\t\t0x%X\n", v[1]); v 556 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xDC, 1, v); v 557 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_BG_COLOR:\t\t0x%X\n", v[0]); v 559 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c for (i = 0, v[4] = 0xE0; i < 5; i++, v[4] += 0x10) { v 560 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, v[4], 3, v); v 561 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_INPUT%u_SIZE:\t\t0x%X\n", i, v[0]); v 562 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_INPUT%u_OFFSET:\t0x%X\n", i, v[1]); v 563 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_INPUT%u_CONTROL:\t0x%X\n", i, v[2]); v 566 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x130, 2, v); v 567 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_USER_LOW:\t\t0x%X\n", v[0]); v 568 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "CU_USER_HIGH:\t\t0x%X\n", v[1]); v 706 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v[9]; v 710 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x80, 1, v); v 711 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_INPUT_ID0:\t\t0x%X\n", v[0]); v 713 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD0, 1, v); v 714 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_CONTROL:\t\t0x%X\n", v[0]); v 716 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xDC, 9, v); v 717 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_COEFFTAB:\t\t0x%X\n", v[0]); v 718 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_IN_SIZE:\t\t0x%X\n", v[1]); v 719 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_OUT_SIZE:\t\t0x%X\n", v[2]); v 720 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_H_CROP:\t\t0x%X\n", v[3]); v 721 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_V_CROP:\t\t0x%X\n", v[4]); v 722 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_H_INIT_PH:\t\t0x%X\n", v[5]); v 723 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_H_DELTA_PH:\t\t0x%X\n", v[6]); v 724 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_V_INIT_PH:\t\t0x%X\n", v[7]); v 725 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SC_V_DELTA_PH:\t\t0x%X\n", v[8]); v 823 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v[3]; v 827 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, BLK_INPUT_ID0, 1, v); v 828 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SP_INPUT_ID0:\t\t0x%X\n", v[0]); v 830 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, BLK_CONTROL, 3, v); v 831 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SP_CONTROL:\t\t0x%X\n", v[0]); v 832 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SP_SIZE:\t\t0x%X\n", v[1]); v 833 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "SP_OVERLAP_SIZE:\t0x%X\n", v[2]); v 889 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v; v 893 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, MG_INPUT_ID0, 1, &v); v 894 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "MG_INPUT_ID0:\t\t0x%X\n", v); v 896 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, MG_INPUT_ID1, 1, &v); v 897 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "MG_INPUT_ID1:\t\t0x%X\n", v); v 899 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, BLK_CONTROL, 1, &v); v 900 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "MG_CONTROL:\t\t0x%X\n", v); v 902 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, MG_SIZE, 1, &v); v 903 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "MG_SIZE:\t\t0x%X\n", v); v 958 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v[12], i; v 962 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x80, 2, v); v 963 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_INPUT_ID0:\t\t0x%X\n", v[0]); v 964 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_INPUT_ID1:\t\t0x%X\n", v[1]); v 966 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xC0, 1, v); v 967 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_INFO:\t\t0x%X\n", v[0]); v 969 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD0, 3, v); v 970 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_CONTROL:\t\t0x%X\n", v[0]); v 971 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_SIZE:\t\t0x%X\n", v[1]); v 972 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_DEPTH:\t\t0x%X\n", v[2]); v 974 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x130, 12, v); v 976 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_RGB_RGB_COEFF%u:\t0x%X\n", i, v[i]); v 978 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x170, 12, v); v 980 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "IPS_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]); v 1076 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c u32 v[8], i; v 1080 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xC0, 1, v); v 1081 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_INFO:\t\t0x%X\n", v[0]); v 1083 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0xD0, 8, v); v 1084 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_CONTROL:\t\t0x%X\n", v[0]); v 1085 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_PROG_LINE:\t\t0x%X\n", v[1]); v 1086 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_PREFETCH_LINE:\t0x%X\n", v[2]); v 1087 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_BG_COLOR:\t\t0x%X\n", v[3]); v 1088 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_ACTIVESIZE:\t\t0x%X\n", v[4]); v 1089 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_HINTERVALS:\t\t0x%X\n", v[5]); v 1090 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_VINTERVALS:\t\t0x%X\n", v[6]); v 1091 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_SYNC:\t\t0x%X\n", v[7]); v 1093 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x100, 3, v); v 1094 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_DRIFT_TO:\t\t0x%X\n", v[0]); v 1095 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_FRAME_TO:\t\t0x%X\n", v[1]); v 1096 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_TE_TO:\t\t0x%X\n", v[2]); v 1098 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x110, 3, v); v 1100 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_T%u_INTERVAL:\t\t0x%X\n", i, v[i]); v 1102 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c get_values_from_reg(c->reg, 0x120, 5, v); v 1104 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_CRC%u_LOW:\t\t0x%X\n", i, v[i << 1]); v 1105 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_CRC%u_HIGH:\t\t0x%X\n", i, v[(i << 1) + 1]); v 1107 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c seq_printf(sf, "BS_USER:\t\t0x%X\n", v[4]); v 47 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define HV_SIZE(h, v) (((h) & 0x1FFF) + (((v) & 0x1FFF) << 16)) v 48 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define HV_OFFSET(h, v) (((h) & 0xFFF) + (((v) & 0xFFF) << 16)) v 49 drivers/gpu/drm/arm/display/komeda/d71/d71_regs.h #define HV_CROP(h, v) (((h) & 0xFFF) + (((v) & 0xFFF) << 16)) v 444 drivers/gpu/drm/arm/malidp_hw.c u8 v = (u8)se_config->vcoeff - 1; v 447 drivers/gpu/drm/arm/malidp_hw.c v >= ARRAY_SIZE(dp500_se_scaling_coeffs))) v 450 drivers/gpu/drm/arm/malidp_hw.c if ((h == v) && (se_config->hcoeff != old_config->hcoeff || v 455 drivers/gpu/drm/arm/malidp_hw.c 0, v); v 460 drivers/gpu/drm/arm/malidp_hw.c 0, v); v 21 drivers/gpu/drm/armada/armada_510.c struct armada510_variant_data *v; v 25 drivers/gpu/drm/armada/armada_510.c v = devm_kzalloc(dev, sizeof(*v), GFP_KERNEL); v 26 drivers/gpu/drm/armada/armada_510.c if (!v) v 29 drivers/gpu/drm/armada/armada_510.c dcrtc->variant_data = v; v 52 drivers/gpu/drm/armada/armada_510.c v->clks[idx] = clk; v 60 drivers/gpu/drm/armada/armada_510.c v->clks[1] = clk; v 103 drivers/gpu/drm/armada/armada_510.c struct armada510_variant_data *v = dcrtc->variant_data; v 109 drivers/gpu/drm/armada/armada_510.c v->clks, ARRAY_SIZE(v->clks), v 124 drivers/gpu/drm/armada/armada_510.c v->sel_clk = res.clk; v 144 drivers/gpu/drm/armada/armada_510.c struct armada510_variant_data *v = dcrtc->variant_data; v 146 drivers/gpu/drm/armada/armada_510.c if (!dcrtc->clk && v->sel_clk) { v 147 drivers/gpu/drm/armada/armada_510.c if (!WARN_ON(clk_prepare_enable(v->sel_clk))) v 148 drivers/gpu/drm/armada/armada_510.c dcrtc->clk = v->sel_clk; v 264 drivers/gpu/drm/armada/armada_crtc.c writel_relaxed(dcrtc->v[i].spu_v_porch, base + LCD_SPU_V_PORCH); v 265 drivers/gpu/drm/armada/armada_crtc.c writel_relaxed(dcrtc->v[i].spu_v_h_total, v 270 drivers/gpu/drm/armada/armada_crtc.c val |= dcrtc->v[i].spu_adv_reg; v 308 drivers/gpu/drm/armada/armada_crtc.c u32 v, stat = readl_relaxed(dcrtc->base + LCD_SPU_IRQ_ISR); v 320 drivers/gpu/drm/armada/armada_crtc.c v = stat & dcrtc->irq_ena; v 322 drivers/gpu/drm/armada/armada_crtc.c if (v & (VSYNC_IRQ|GRA_FRAME_IRQ|DUMB_FRAMEDONE)) { v 359 drivers/gpu/drm/armada/armada_crtc.c dcrtc->v[1].spu_v_h_total = adj->crtc_vtotal << 16 | v 361 drivers/gpu/drm/armada/armada_crtc.c dcrtc->v[1].spu_v_porch = tm << 16 | bm; v 363 drivers/gpu/drm/armada/armada_crtc.c dcrtc->v[1].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN; v 368 drivers/gpu/drm/armada/armada_crtc.c dcrtc->v[0].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN; v 369 drivers/gpu/drm/armada/armada_crtc.c dcrtc->v[0].spu_v_h_total = dcrtc->v[1].spu_v_h_total + v 371 drivers/gpu/drm/armada/armada_crtc.c dcrtc->v[0].spu_v_porch = dcrtc->v[1].spu_v_porch + 1; v 373 drivers/gpu/drm/armada/armada_crtc.c dcrtc->v[0] = dcrtc->v[1]; v 380 drivers/gpu/drm/armada/armada_crtc.c armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_porch, LCD_SPU_V_PORCH); v 381 drivers/gpu/drm/armada/armada_crtc.c armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_h_total, v 385 drivers/gpu/drm/armada/armada_crtc.c armada_reg_queue_mod(regs, i, dcrtc->v[0].spu_adv_reg, v 47 drivers/gpu/drm/armada/armada_crtc.h } v[2]; v 38 drivers/gpu/drm/armada/armada_debugfs.c u32 v = readl_relaxed(dcrtc->base + i); v 39 drivers/gpu/drm/armada/armada_debugfs.c seq_printf(m, "0x%04x: 0x%08x\n", i, v); v 58 drivers/gpu/drm/armada/armada_debugfs.c u32 v; v 77 drivers/gpu/drm/armada/armada_debugfs.c v = readl(dcrtc->base + reg); v 78 drivers/gpu/drm/armada/armada_debugfs.c v &= ~mask; v 79 drivers/gpu/drm/armada/armada_debugfs.c v |= val & mask; v 80 drivers/gpu/drm/armada/armada_debugfs.c writel(v, dcrtc->base + reg); v 24 drivers/gpu/drm/armada/armada_drm.h uint32_t ov, v; v 26 drivers/gpu/drm/armada/armada_drm.h ov = v = readl_relaxed(ptr); v 27 drivers/gpu/drm/armada/armada_drm.h v = (v & ~mask) | val; v 28 drivers/gpu/drm/armada/armada_drm.h if (ov != v) v 29 drivers/gpu/drm/armada/armada_drm.h writel_relaxed(v, ptr); v 353 drivers/gpu/drm/armada/armada_overlay.c #define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8) v 297 drivers/gpu/drm/ast/ast_drv.h void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); v 129 drivers/gpu/drm/ast/ast_post.c void ast_moutdwm(struct ast_private *ast, u32 r, u32 v) v 137 drivers/gpu/drm/ast/ast_post.c ast_write32(ast, 0x10000 + (r & 0x0000ffff), v); v 48 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_MSF(v) FLD_VAL(v, 0, 0) /* Magic square in RGB666 */ v 49 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_VTGEN(v) FLD_VAL(v, 4, 4) /* Use chip clock for timing */ v 50 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_EVTMODE(v) FLD_VAL(v, 5, 5) /* Event mode */ v 51 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_RGB888(v) FLD_VAL(v, 8, 8) /* RGB888 mode */ v 52 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_VSDELAY(v) FLD_VAL(v, 31, 20) /* VSYNC delay */ v 57 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM1_HBP(v) FLD_VAL(v, 24, 16) v 58 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM1_HSYNC(v) FLD_VAL(v, 8, 0) v 60 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM2_HFP(v) FLD_VAL(v, 24, 16) v 61 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM2_HACT(v) FLD_VAL(v, 10, 0) v 63 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM1_VBP(v) FLD_VAL(v, 23, 16) v 64 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM1_VSYNC(v) FLD_VAL(v, 7, 0) v 66 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM2_VFP(v) FLD_VAL(v, 23, 16) v 67 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM2_VACT(v) FLD_VAL(v, 10, 0) v 115 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_RST(v) FLD_VAL(v, 22, 22) /* PHY reset */ v 116 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_IS(v) FLD_VAL(v, 15, 14) v 117 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_ND(v) FLD_VAL(v, 4, 0) /* Frequency range select */ v 118 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_PRBS_ON(v) FLD_VAL(v, 20, 16) /* Clock/Data Flag pins */ v 220 drivers/gpu/drm/bridge/tc358764.c u32 v = 0; v 222 drivers/gpu/drm/bridge/tc358764.c tc358764_read(ctx, SYS_ID, &v); v 225 drivers/gpu/drm/bridge/tc358764.c dev_info(ctx->dev, "ID: %#x\n", v); v 37 drivers/gpu/drm/cirrus/cirrus_drv.h #define WREG8(reg, v) iowrite8(v, ((void __iomem *)cdev->rmmio) + (reg)) v 39 drivers/gpu/drm/cirrus/cirrus_drv.h #define WREG32(reg, v) iowrite32(v, ((void __iomem *)cdev->rmmio) + (reg)) v 44 drivers/gpu/drm/cirrus/cirrus_drv.h #define WREG_SEQ(reg, v) \ v 47 drivers/gpu/drm/cirrus/cirrus_drv.h WREG8(SEQ_DATA, v); \ v 53 drivers/gpu/drm/cirrus/cirrus_drv.h #define WREG_CRT(reg, v) \ v 56 drivers/gpu/drm/cirrus/cirrus_drv.h WREG8(CRT_DATA, v); \ v 62 drivers/gpu/drm/cirrus/cirrus_drv.h #define WREG_GFX(reg, v) \ v 65 drivers/gpu/drm/cirrus/cirrus_drv.h WREG8(GFX_DATA, v); \ v 75 drivers/gpu/drm/cirrus/cirrus_drv.h #define WREG_HDR(v) \ v 81 drivers/gpu/drm/cirrus/cirrus_drv.h WREG8(VGA_DAC_MASK, v); \ v 1350 drivers/gpu/drm/drm_bufs.c struct drm_buf_desc v = {.count = from->buf_count, v 1355 drivers/gpu/drm/drm_bufs.c if (copy_to_user(to, &v, offsetof(struct drm_buf_desc, flags))) v 1483 drivers/gpu/drm/drm_bufs.c void __user **v, v 1535 drivers/gpu/drm/drm_bufs.c *v = (void __user *)virtual; v 4297 drivers/gpu/drm/drm_edid.c int a, v; v 4305 drivers/gpu/drm/drm_edid.c v = connector->video_latency[i]; v 4310 drivers/gpu/drm/drm_edid.c if (a == 255 || v == 255) v 4319 drivers/gpu/drm/drm_edid.c if (v) v 4320 drivers/gpu/drm/drm_edid.c v = min(2 * (v - 1), 500); v 4322 drivers/gpu/drm/drm_edid.c return max(v - a, 0); v 96 drivers/gpu/drm/drm_ioc32.c struct drm_version v; v 102 drivers/gpu/drm/drm_ioc32.c v = (struct drm_version) { v 110 drivers/gpu/drm/drm_ioc32.c err = drm_ioctl_kernel(file, drm_version, &v, v 115 drivers/gpu/drm/drm_ioc32.c v32.version_major = v.version_major; v 116 drivers/gpu/drm/drm_ioc32.c v32.version_minor = v.version_minor; v 117 drivers/gpu/drm/drm_ioc32.c v32.version_patchlevel = v.version_patchlevel; v 118 drivers/gpu/drm/drm_ioc32.c v32.name_len = v.name_len; v 119 drivers/gpu/drm/drm_ioc32.c v32.date_len = v.date_len; v 120 drivers/gpu/drm/drm_ioc32.c v32.desc_len = v.desc_len; v 377 drivers/gpu/drm/drm_ioc32.c drm_buf_desc32_t v = {.count = from->buf_count, v 382 drivers/gpu/drm/drm_ioc32.c if (copy_to_user(to + count, &v, offsetof(drm_buf_desc32_t, flags))) v 435 drivers/gpu/drm/drm_ioc32.c drm_buf_pub32_t v; v 437 drivers/gpu/drm/drm_ioc32.c v.idx = buf->idx; v 438 drivers/gpu/drm/drm_ioc32.c v.total = buf->total; v 439 drivers/gpu/drm/drm_ioc32.c v.used = 0; v 440 drivers/gpu/drm/drm_ioc32.c v.address = virtual + buf->offset; v 441 drivers/gpu/drm/drm_ioc32.c if (copy_to_user(to, &v, sizeof(v))) v 450 drivers/gpu/drm/drm_ioc32.c void __user *v; v 452 drivers/gpu/drm/drm_ioc32.c &v, map_one_buf32, v 454 drivers/gpu/drm/drm_ioc32.c request->virtual = ptr_to_compat(v); v 62 drivers/gpu/drm/drm_legacy.h int drm_legacy_resctx(struct drm_device *d, void *v, struct drm_file *f); v 63 drivers/gpu/drm/drm_legacy.h int drm_legacy_addctx(struct drm_device *d, void *v, struct drm_file *f); v 64 drivers/gpu/drm/drm_legacy.h int drm_legacy_getctx(struct drm_device *d, void *v, struct drm_file *f); v 65 drivers/gpu/drm/drm_legacy.h int drm_legacy_switchctx(struct drm_device *d, void *v, struct drm_file *f); v 66 drivers/gpu/drm/drm_legacy.h int drm_legacy_newctx(struct drm_device *d, void *v, struct drm_file *f); v 67 drivers/gpu/drm/drm_legacy.h int drm_legacy_rmctx(struct drm_device *d, void *v, struct drm_file *f); v 69 drivers/gpu/drm/drm_legacy.h int drm_legacy_setsareactx(struct drm_device *d, void *v, struct drm_file *f); v 70 drivers/gpu/drm/drm_legacy.h int drm_legacy_getsareactx(struct drm_device *d, void *v, struct drm_file *f); v 102 drivers/gpu/drm/drm_legacy.h int drm_legacy_addmap_ioctl(struct drm_device *d, void *v, struct drm_file *f); v 103 drivers/gpu/drm/drm_legacy.h int drm_legacy_rmmap_ioctl(struct drm_device *d, void *v, struct drm_file *f); v 105 drivers/gpu/drm/drm_legacy.h int drm_legacy_addbufs(struct drm_device *d, void *v, struct drm_file *f); v 106 drivers/gpu/drm/drm_legacy.h int drm_legacy_infobufs(struct drm_device *d, void *v, struct drm_file *f); v 107 drivers/gpu/drm/drm_legacy.h int drm_legacy_markbufs(struct drm_device *d, void *v, struct drm_file *f); v 108 drivers/gpu/drm/drm_legacy.h int drm_legacy_freebufs(struct drm_device *d, void *v, struct drm_file *f); v 109 drivers/gpu/drm/drm_legacy.h int drm_legacy_mapbufs(struct drm_device *d, void *v, struct drm_file *f); v 110 drivers/gpu/drm/drm_legacy.h int drm_legacy_dma_ioctl(struct drm_device *d, void *v, struct drm_file *f); v 153 drivers/gpu/drm/drm_legacy.h int drm_legacy_lock(struct drm_device *d, void *v, struct drm_file *f); v 154 drivers/gpu/drm/drm_legacy.h int drm_legacy_unlock(struct drm_device *d, void *v, struct drm_file *f); v 940 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 v = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); v 943 drivers/gpu/drm/exynos/exynos_drm_dsi.c v |= DSIM_CMD_LPDT_LP; v 945 drivers/gpu/drm/exynos/exynos_drm_dsi.c v &= ~DSIM_CMD_LPDT_LP; v 947 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_ESCMODE_REG, v); v 952 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 v = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); v 953 drivers/gpu/drm/exynos/exynos_drm_dsi.c v |= DSIM_FORCE_BTA; v 954 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_ESCMODE_REG, v); v 1231 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(BUFFER, .h = { 16, 8192, 8 }, .v = { 16, 8192, 2 }) }, v 1232 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(AREA, .h = { 16, 4224, 2 }, .v = { 16, 0, 2 }) }, v 1233 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(ROTATED, .h = { 128, 1920 }, .v = { 128, 0 }) }, v 1235 drivers/gpu/drm/exynos/exynos_drm_fimc.c .v = { (1 << 16) / 64, (1 << 16) * 64 }) }, v 1239 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(BUFFER, .h = { 16, 8192, 8 }, .v = { 16, 8192, 2 }) }, v 1240 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(AREA, .h = { 16, 1920, 2 }, .v = { 16, 0, 2 }) }, v 1241 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(ROTATED, .h = { 128, 1366 }, .v = { 128, 0 }) }, v 1243 drivers/gpu/drm/exynos/exynos_drm_fimc.c .v = { (1 << 16) / 64, (1 << 16) * 64 }) }, v 1247 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(BUFFER, .h = { 128, 1920, 128 }, .v = { 32, 1920, 32 }) }, v 1248 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(AREA, .h = { 128, 1920, 2 }, .v = { 128, 0, 2 }) }, v 1250 drivers/gpu/drm/exynos/exynos_drm_fimc.c .v = { (1 << 16) / 64, (1 << 16) * 64 }) }, v 1254 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(BUFFER, .h = { 128, 1920, 128 }, .v = { 32, 1920, 32 }) }, v 1255 drivers/gpu/drm/exynos/exynos_drm_fimc.c { IPP_SIZE_LIMIT(AREA, .h = { 128, 1366, 2 }, .v = { 128, 0, 2 }) }, v 1257 drivers/gpu/drm/exynos/exynos_drm_fimc.c .v = { (1 << 16) / 64, (1 << 16) * 64 }) }, v 1362 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) }, v 1363 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) }, v 1364 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2048 }, .v = { 16, 2048 }) }, v 1366 drivers/gpu/drm/exynos/exynos_drm_gsc.c .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, v 1370 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 4800, 8 }, .v = { 16, 3344, 8 }) }, v 1371 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 2 }, .v = { 8, 3344, 2 }) }, v 1372 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(ROTATED, .h = { 16, 2016 }, .v = { 8, 2016 }) }, v 1374 drivers/gpu/drm/exynos/exynos_drm_gsc.c .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, v 1378 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 8191, 16 }, .v = { 16, 8191, 2 }) }, v 1379 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 1 }, .v = { 8, 3344, 1 }) }, v 1380 drivers/gpu/drm/exynos/exynos_drm_gsc.c { IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2047 }, .v = { 8, 8191 }) }, v 1382 drivers/gpu/drm/exynos/exynos_drm_gsc.c .v = { (1 << 16) / 16, (1 << 16) * 8 }) }, v 407 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct drm_exynos_ipp_limit_val v; v 447 drivers/gpu/drm/exynos/exynos_drm_ipp.c __limit_set_val(&res->v.min, l->v.min); v 448 drivers/gpu/drm/exynos/exynos_drm_ipp.c __limit_set_val(&res->v.max, l->v.max); v 449 drivers/gpu/drm/exynos/exynos_drm_ipp.c __limit_set_val(&res->v.align, l->v.align); v 480 drivers/gpu/drm/exynos/exynos_drm_ipp.c struct drm_exynos_ipp_limit_val *lh = &l.h, *lv = &l.v; v 488 drivers/gpu/drm/exynos/exynos_drm_ipp.c !__size_limit_check(buf->buf.height, &l.v)) v 493 drivers/gpu/drm/exynos/exynos_drm_ipp.c lh = &l.v; v 535 drivers/gpu/drm/exynos/exynos_drm_ipp.c lh = (!swap) ? &limits->h : &limits->v; v 536 drivers/gpu/drm/exynos/exynos_drm_ipp.c lv = (!swap) ? &limits->v : &limits->h; v 360 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_16K }, .v = { 8, SZ_16K }) }, v 361 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) }, v 365 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_16K }, .v = { 8, SZ_16K }) }, v 366 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) }, v 370 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) }, v 371 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(AREA, .h.align = 4, .v.align = 4) }, v 375 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) }, v 376 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) }, v 380 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_64K }, .v = { 32, SZ_64K }) }, v 381 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) }, v 385 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_64K }, .v = { 32, SZ_64K }) }, v 386 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) }, v 390 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(BUFFER, .h = { 32, SZ_32K }, .v = { 32, SZ_32K }) }, v 391 drivers/gpu/drm/exynos/exynos_drm_rotator.c { IPP_SIZE_LIMIT(AREA, .h.align = 8, .v.align = 8) }, v 597 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) }, v 598 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 2) }, v 600 drivers/gpu/drm/exynos/exynos_drm_scaler.c .v = { 65536 * 1 / 4, 65536 * 16 }) }, v 604 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) }, v 605 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SIZE_LIMIT(AREA, .h.align = 2, .v.align = 1) }, v 607 drivers/gpu/drm/exynos/exynos_drm_scaler.c .v = { 65536 * 1 / 4, 65536 * 16 }) }, v 611 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) }, v 613 drivers/gpu/drm/exynos/exynos_drm_scaler.c .v = { 65536 * 1 / 4, 65536 * 16 }) }, v 617 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K })}, v 618 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SIZE_LIMIT(AREA, .h.align = 16, .v.align = 16) }, v 619 drivers/gpu/drm/exynos/exynos_drm_scaler.c { IPP_SCALE_LIMIT(.h = {1, 1}, .v = {1, 1})}, v 1415 drivers/gpu/drm/exynos/exynos_hdmi.c u8 v = enable ? HDMI_PHY_ENABLE_MODE_SET : HDMI_PHY_DISABLE_MODE_SET; v 1418 drivers/gpu/drm/exynos/exynos_hdmi.c writel(v, hdata->regs_hdmiphy + HDMIPHY5433_MODE_SET_DONE); v 206 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) v 208 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) v 232 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) v 234 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) v 238 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_Y_POS_SET_YH_POS(v) SCALER_SET(v, 31, 16) v 240 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_Y_POS_SET_YV_POS(v) SCALER_SET(v, 15, 0) v 244 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_WH_SET_WIDTH(v) SCALER_SET(v, 29, 16) v 246 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_WH_SET_HEIGHT(v) SCALER_SET(v, 13, 0) v 250 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_C_POS_SET_CH_POS(v) SCALER_SET(v, 31, 16) v 252 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_C_POS_SET_CV_POS(v) SCALER_SET(v, 15, 0) v 256 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) v 258 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) v 262 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) v 264 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) v 268 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_WH_SET_WIDTH(v) SCALER_SET(v, 29, 16) v 270 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_WH_SET_HEIGHT(v) SCALER_SET(v, 13, 0) v 274 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_POS_SET_H_POS(v) SCALER_SET(v, 29, 16) v 276 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_POS_SET_V_POS(v) SCALER_SET(v, 13, 0) v 280 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_H_RATIO_SET(v) SCALER_SET(v, 18, 0) v 284 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_V_RATIO_SET(v) SCALER_SET(v, 18, 0) v 290 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_ROT_CFG_SET_ROTMODE(v) SCALER_SET(v, 1, 0) v 299 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_COEF_SET(v, i) \ v 300 drivers/gpu/drm/exynos/regs-scaler.h (((v) & 0x1ff) << SCALER_COEF_SHIFT(i)) v 304 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_CSC_COEF_SET(v) SCALER_SET(v, 11, 0) v 308 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DITH_CFG_SET_R_TYPE(v) SCALER_SET(v, 8, 6) v 310 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DITH_CFG_SET_G_TYPE(v) SCALER_SET(v, 5, 3) v 312 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DITH_CFG_SET_B_TYPE(v) SCALER_SET(v, 2, 0) v 316 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_TIMEOUT_CTRL_SET_TIMER_VALUE(v) SCALER_SET(v, 31, 16) v 318 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_TIMEOUT_CTRL_SET_TIMER_DIV(v) SCALER_SET(v, 7, 4) v 327 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_COLOR_SET_SEL(v) SCALER_SET(v, 30, 29) v 330 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_COLOR_SET_OP_SEL(v) SCALER_SET(v, 27, 24) v 332 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_COLOR_SET_COLOR0(v) SCALER_SET(v, 23, 16) v 334 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_COLOR_SET_COLOR1(v) SCALER_SET(v, 15, 8) v 336 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_COLOR_SET_COLOR2(v) SCALER_SET(v, 7, 0) v 341 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_ALPHA_SET_SEL(v) SCALER_SET(v, 30, 29) v 344 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_ALPHA_SET_OP_SEL(v) SCALER_SET(v, 27, 24) v 346 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_SRC_BLEND_ALPHA_SET_ALPHA(v) SCALER_SET(v, 7, 0) v 351 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_COLOR_SET_SEL(v) SCALER_SET(v, 30, 29) v 354 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_COLOR_SET_OP_SEL(v) SCALER_SET(v, 27, 24) v 356 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_COLOR_SET_COLOR0(v) SCALER_SET(v, 23, 16) v 358 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_COLOR_SET_COLOR1(v) SCALER_SET(v, 15, 8) v 360 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_COLOR_SET_COLOR2(v) SCALER_SET(v, 7, 0) v 365 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_ALPHA_SET_SEL(v) SCALER_SET(v, 30, 29) v 368 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_ALPHA_SET_OP_SEL(v) SCALER_SET(v, 27, 24) v 370 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_DST_BLEND_ALPHA_SET_ALPHA(v) SCALER_SET(v, 7, 0) v 374 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_FILL_COLOR_SET_ALPHA(v) SCALER_SET(v, 31, 24) v 376 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_FILL_COLOR_SET_FILL_COLOR0(v) SCALER_SET(v, 23, 16) v 378 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_FILL_COLOR_SET_FILL_COLOR1(v) SCALER_SET(v, 15, 8) v 380 drivers/gpu/drm/exynos/regs-scaler.h #define SCALER_FILL_COLOR_SET_FILL_COLOR2(v) SCALER_SET(v, 7, 0) v 48 drivers/gpu/drm/gma500/backlight.c void gma_backlight_set(struct drm_device *dev, int v) v 52 drivers/gpu/drm/gma500/backlight.c dev_priv->backlight_level = v; v 54 drivers/gpu/drm/gma500/backlight.c dev_priv->backlight_device->props.brightness = v; v 549 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t v = 0; v 554 drivers/gpu/drm/gma500/cdv_intel_dp.c v |= ((uint32_t) src[i]) << ((3-i) * 8); v 555 drivers/gpu/drm/gma500/cdv_intel_dp.c return v; v 1309 drivers/gpu/drm/gma500/cdv_intel_dp.c uint8_t v = 0; v 1317 drivers/gpu/drm/gma500/cdv_intel_dp.c if (this_v > v) v 1318 drivers/gpu/drm/gma500/cdv_intel_dp.c v = this_v; v 1323 drivers/gpu/drm/gma500/cdv_intel_dp.c if (v >= CDV_DP_VOLTAGE_MAX) v 1324 drivers/gpu/drm/gma500/cdv_intel_dp.c v = CDV_DP_VOLTAGE_MAX | DP_TRAIN_MAX_SWING_REACHED; v 1330 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->train_set[lane] = v | p; v 45 drivers/gpu/drm/gma500/framebuffer.c uint32_t v; v 58 drivers/gpu/drm/gma500/framebuffer.c v = (red << info->var.red.offset) | v 66 drivers/gpu/drm/gma500/framebuffer.c ((uint32_t *) info->pseudo_palette)[regno] = v; v 70 drivers/gpu/drm/gma500/framebuffer.c ((uint32_t *) info->pseudo_palette)[regno] = v; v 169 drivers/gpu/drm/gma500/mmu.c uint32_t *v; v 195 drivers/gpu/drm/gma500/mmu.c v = kmap(pd->dummy_pt); v 197 drivers/gpu/drm/gma500/mmu.c v[i] = pd->invalid_pte; v 201 drivers/gpu/drm/gma500/mmu.c v = kmap(pd->p); v 203 drivers/gpu/drm/gma500/mmu.c v[i] = pd->invalid_pde; v 271 drivers/gpu/drm/gma500/mmu.c void *v; v 290 drivers/gpu/drm/gma500/mmu.c v = kmap_atomic(pt->p); v 291 drivers/gpu/drm/gma500/mmu.c clf = (uint8_t *) v; v 292 drivers/gpu/drm/gma500/mmu.c ptes = (uint32_t *) v; v 306 drivers/gpu/drm/gma500/mmu.c kunmap_atomic(v); v 321 drivers/gpu/drm/gma500/mmu.c uint32_t *v; v 341 drivers/gpu/drm/gma500/mmu.c v = kmap_atomic(pd->p); v 343 drivers/gpu/drm/gma500/mmu.c v[index] = (page_to_pfn(pt->p) << 12) | pd->pd_mask; v 345 drivers/gpu/drm/gma500/mmu.c kunmap_atomic((void *) v); v 348 drivers/gpu/drm/gma500/mmu.c psb_mmu_clflush(pd->driver, (void *)&v[index]); v 352 drivers/gpu/drm/gma500/mmu.c pt->v = kmap_atomic(pt->p); v 369 drivers/gpu/drm/gma500/mmu.c pt->v = kmap_atomic(pt->p); v 376 drivers/gpu/drm/gma500/mmu.c uint32_t *v; v 378 drivers/gpu/drm/gma500/mmu.c kunmap_atomic(pt->v); v 380 drivers/gpu/drm/gma500/mmu.c v = kmap_atomic(pd->p); v 381 drivers/gpu/drm/gma500/mmu.c v[pt->index] = pd->invalid_pde; v 385 drivers/gpu/drm/gma500/mmu.c psb_mmu_clflush(pd->driver, (void *)&v[pt->index]); v 388 drivers/gpu/drm/gma500/mmu.c kunmap_atomic(v); v 399 drivers/gpu/drm/gma500/mmu.c pt->v[psb_mmu_pt_index(addr)] = pte; v 405 drivers/gpu/drm/gma500/mmu.c pt->v[psb_mmu_pt_index(addr)] = pt->pd->invalid_pte; v 536 drivers/gpu/drm/gma500/mmu.c psb_clflush(&pt->v[psb_mmu_pt_index(addr)]); v 774 drivers/gpu/drm/gma500/mmu.c uint32_t *v; v 777 drivers/gpu/drm/gma500/mmu.c v = kmap_atomic(pd->p); v 778 drivers/gpu/drm/gma500/mmu.c tmp = v[psb_mmu_pd_index(virtual)]; v 779 drivers/gpu/drm/gma500/mmu.c kunmap_atomic(v); v 791 drivers/gpu/drm/gma500/mmu.c tmp = pt->v[psb_mmu_pt_index(virtual)]; v 40 drivers/gpu/drm/gma500/mmu.h uint32_t *v; v 90 drivers/gpu/drm/gma500/oaktrail_lvds.c uint64_t v = DRM_MODE_SCALE_FULLSCREEN; v 126 drivers/gpu/drm/gma500/oaktrail_lvds.c &v); v 128 drivers/gpu/drm/gma500/oaktrail_lvds.c if (v == DRM_MODE_SCALE_NO_SCALE) v 130 drivers/gpu/drm/gma500/oaktrail_lvds.c else if (v == DRM_MODE_SCALE_ASPECT) { v 717 drivers/gpu/drm/gma500/psb_drv.h void gma_backlight_set(struct drm_device *dev, int v); v 735 drivers/gpu/drm/i915/display/intel_color.c u32 v = (i << 16) / (lut_size - 1); v 737 drivers/gpu/drm/i915/display/intel_color.c I915_WRITE(PRE_CSC_GAMC_DATA(pipe), v); v 680 drivers/gpu/drm/i915/display/intel_display_power.c u32 v; v 690 drivers/gpu/drm/i915/display/intel_display_power.c v = I915_READ(DC_STATE_EN); v 692 drivers/gpu/drm/i915/display/intel_display_power.c if (v != state) { v 702 drivers/gpu/drm/i915/display/intel_display_power.c if (v != state) v 704 drivers/gpu/drm/i915/display/intel_display_power.c state, v); v 664 drivers/gpu/drm/i915/display/intel_dp.c u32 v = 0; v 669 drivers/gpu/drm/i915/display/intel_dp.c v |= ((u32)src[i]) << ((3 - i) * 8); v 670 drivers/gpu/drm/i915/display/intel_dp.c return v; v 41 drivers/gpu/drm/i915/display/intel_dp_link_training.c u8 v = 0; v 51 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (this_v > v) v 52 drivers/gpu/drm/i915/display/intel_dp_link_training.c v = this_v; v 58 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (v >= voltage_max) v 59 drivers/gpu/drm/i915/display/intel_dp_link_training.c v = voltage_max | DP_TRAIN_MAX_SWING_REACHED; v 61 drivers/gpu/drm/i915/display/intel_dp_link_training.c preemph_max = intel_dp_pre_emphasis_max(intel_dp, v); v 66 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->train_set[lane] = v | p; v 16 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 v) v 35 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c *cpu = v; v 48 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 *v) v 67 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c *v = *cpu; v 77 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 v) v 98 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c iowrite32(v, &map[offset / sizeof(*map)]); v 106 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 *v) v 127 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c *v = ioread32(&map[offset / sizeof(*map)]); v 135 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 v) v 150 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c map[offset / sizeof(*map)] = v; v 158 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 *v) v 173 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c *v = map[offset / sizeof(*map)]; v 181 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 v) v 216 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c *cs++ = v; v 221 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c *cs++ = v; v 225 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c *cs++ = v; v 265 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c int (*set)(struct drm_i915_gem_object *, unsigned long offset, u32 v); v 266 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c int (*get)(struct drm_i915_gem_object *, unsigned long offset, u32 *v); v 29 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c static u64 tiled_offset(const struct tile *tile, u64 v) v 34 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c return v; v 36 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c y = div64_u64_rem(v, tile->stride, &x); v 37 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height; v 40 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += y * tile->width; v 41 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += div64_u64_rem(x, tile->width, &x) << tile->size; v 42 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += x; v 47 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += y * ytile_span; v 48 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += div64_u64_rem(x, ytile_span, &x) * ytile_height; v 49 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += x; v 54 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += y * ytile_span; v 55 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += div64_u64_rem(x, ytile_span, &x) * ytile_height; v 56 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v += x; v 61 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v ^= swizzle_bit(9, v); v 64 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v); v 67 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v ^= swizzle_bit(9, v) ^ swizzle_bit(11, v); v 70 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v) ^ swizzle_bit(11, v); v 74 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c return v; v 468 drivers/gpu/drm/i915/gt/selftest_workarounds.c int err = 0, i, v; v 516 drivers/gpu/drm/i915/gt/selftest_workarounds.c for (v = 0; v < ARRAY_SIZE(values); v++) { v 520 drivers/gpu/drm/i915/gt/selftest_workarounds.c *cs++ = values[v]; v 529 drivers/gpu/drm/i915/gt/selftest_workarounds.c for (v = 0; v < ARRAY_SIZE(values); v++) { v 533 drivers/gpu/drm/i915/gt/selftest_workarounds.c *cs++ = ~values[v]; v 607 drivers/gpu/drm/i915/gt/selftest_workarounds.c for (v = 0; v < ARRAY_SIZE(values); v++) { v 611 drivers/gpu/drm/i915/gt/selftest_workarounds.c expect = reg_write(expect, values[v], rsvd); v 617 drivers/gpu/drm/i915/gt/selftest_workarounds.c for (v = 0; v < ARRAY_SIZE(values); v++) { v 621 drivers/gpu/drm/i915/gt/selftest_workarounds.c expect = reg_write(expect, ~values[v], rsvd); v 640 drivers/gpu/drm/i915/gt/selftest_workarounds.c for (v = 0; v < ARRAY_SIZE(values); v++) { v 641 drivers/gpu/drm/i915/gt/selftest_workarounds.c u32 w = values[v]; v 651 drivers/gpu/drm/i915/gt/selftest_workarounds.c for (v = 0; v < ARRAY_SIZE(values); v++) { v 652 drivers/gpu/drm/i915/gt/selftest_workarounds.c u32 w = ~values[v]; v 1224 drivers/gpu/drm/i915/gvt/cmd_parser.c u32 v; v 1230 drivers/gpu/drm/i915/gvt/cmd_parser.c v = (dword0 & GENMASK(21, 19)) >> 19; v 1231 drivers/gpu/drm/i915/gvt/cmd_parser.c if (WARN_ON(v >= ARRAY_SIZE(gen8_plane_code))) v 1234 drivers/gpu/drm/i915/gvt/cmd_parser.c info->pipe = gen8_plane_code[v].pipe; v 1235 drivers/gpu/drm/i915/gvt/cmd_parser.c info->plane = gen8_plane_code[v].plane; v 1236 drivers/gpu/drm/i915/gvt/cmd_parser.c info->event = gen8_plane_code[v].event; v 40 drivers/gpu/drm/i915/gvt/edid.c #define gmbus1_total_byte_count(v) (((v) >> \ v 42 drivers/gpu/drm/i915/gvt/edid.c #define gmbus1_slave_addr(v) (((v) & 0xff) >> 1) v 43 drivers/gpu/drm/i915/gvt/edid.c #define gmbus1_slave_index(v) (((v) >> 8) & 0xff) v 44 drivers/gpu/drm/i915/gvt/edid.c #define gmbus1_bus_cycle(v) (((v) >> 25) & 0x7) v 147 drivers/gpu/drm/i915/gvt/gtt.c #define gtt_init_entry(e, t, p, v) do { \ v 150 drivers/gpu/drm/i915/gvt/gtt.c memcpy(&(e)->val64, &v, sizeof(v)); \ v 924 drivers/gpu/drm/i915/gvt/gtt.c int v = atomic_read(&spt->refcount); v 926 drivers/gpu/drm/i915/gvt/gtt.c trace_spt_refcount(spt->vgpu->id, "inc", spt, v, (v + 1)); v 932 drivers/gpu/drm/i915/gvt/gtt.c int v = atomic_read(&spt->refcount); v 934 drivers/gpu/drm/i915/gvt/gtt.c trace_spt_refcount(spt->vgpu->id, "dec", spt, v, (v - 1)); v 1394 drivers/gpu/drm/i915/gvt/handlers.c u32 v = 0; v 1397 drivers/gpu/drm/i915/gvt/handlers.c v |= (1 << 0); v 1400 drivers/gpu/drm/i915/gvt/handlers.c v |= (1 << 8); v 1403 drivers/gpu/drm/i915/gvt/handlers.c v |= (1 << 16); v 1406 drivers/gpu/drm/i915/gvt/handlers.c v |= (1 << 24); v 1408 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 1500 drivers/gpu/drm/i915/gvt/handlers.c u32 v = *(u32 *)p_data; v 1503 drivers/gpu/drm/i915/gvt/handlers.c v &= (1 << 31) | (1 << 29); v 1505 drivers/gpu/drm/i915/gvt/handlers.c v &= (1 << 31) | (1 << 29) | (1 << 9) | v 1507 drivers/gpu/drm/i915/gvt/handlers.c v |= (v >> 1); v 1509 drivers/gpu/drm/i915/gvt/handlers.c return intel_vgpu_default_mmio_write(vgpu, offset, &v, bytes); v 1515 drivers/gpu/drm/i915/gvt/handlers.c u32 v = *(u32 *)p_data; v 1518 drivers/gpu/drm/i915/gvt/handlers.c v &= (1 << 31) | (1 << 30); v 1519 drivers/gpu/drm/i915/gvt/handlers.c v & (1 << 31) ? (v |= (1 << 30)) : (v &= ~(1 << 30)); v 1521 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 1529 drivers/gpu/drm/i915/gvt/handlers.c u32 v = *(u32 *)p_data; v 1531 drivers/gpu/drm/i915/gvt/handlers.c if (v & BXT_DE_PLL_PLL_ENABLE) v 1532 drivers/gpu/drm/i915/gvt/handlers.c v |= BXT_DE_PLL_LOCK; v 1534 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 1542 drivers/gpu/drm/i915/gvt/handlers.c u32 v = *(u32 *)p_data; v 1544 drivers/gpu/drm/i915/gvt/handlers.c if (v & PORT_PLL_ENABLE) v 1545 drivers/gpu/drm/i915/gvt/handlers.c v |= PORT_PLL_LOCK; v 1547 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 1555 drivers/gpu/drm/i915/gvt/handlers.c u32 v = *(u32 *)p_data; v 1556 drivers/gpu/drm/i915/gvt/handlers.c u32 data = v & COMMON_RESET_DIS ? BXT_PHY_LANE_ENABLED : 0; v 1568 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 1576 drivers/gpu/drm/i915/gvt/handlers.c u32 v = vgpu_vreg(vgpu, offset); v 1578 drivers/gpu/drm/i915/gvt/handlers.c v &= ~UNIQUE_TRANGE_EN_METHOD; v 1580 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 1588 drivers/gpu/drm/i915/gvt/handlers.c u32 v = *(u32 *)p_data; v 1591 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset - 0x600) = v; v 1592 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset - 0x800) = v; v 1594 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset - 0x400) = v; v 1595 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset - 0x600) = v; v 1598 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 1606 drivers/gpu/drm/i915/gvt/handlers.c u32 v = *(u32 *)p_data; v 1608 drivers/gpu/drm/i915/gvt/handlers.c if (v & BIT(0)) { v 1615 drivers/gpu/drm/i915/gvt/handlers.c if (v & BIT(1)) { v 1623 drivers/gpu/drm/i915/gvt/handlers.c vgpu_vreg(vgpu, offset) = v; v 136 drivers/gpu/drm/i915/gvt/opregion.c static void virt_vbt_generation(struct vbt *v) v 140 drivers/gpu/drm/i915/gvt/opregion.c memset(v, 0, sizeof(struct vbt)); v 142 drivers/gpu/drm/i915/gvt/opregion.c v->header.signature[0] = '$'; v 143 drivers/gpu/drm/i915/gvt/opregion.c v->header.signature[1] = 'V'; v 144 drivers/gpu/drm/i915/gvt/opregion.c v->header.signature[2] = 'B'; v 145 drivers/gpu/drm/i915/gvt/opregion.c v->header.signature[3] = 'T'; v 148 drivers/gpu/drm/i915/gvt/opregion.c v->header.version = 155; v 149 drivers/gpu/drm/i915/gvt/opregion.c v->header.header_size = sizeof(v->header); v 150 drivers/gpu/drm/i915/gvt/opregion.c v->header.vbt_size = sizeof(struct vbt) - sizeof(v->header); v 151 drivers/gpu/drm/i915/gvt/opregion.c v->header.bdb_offset = offsetof(struct vbt, bdb_header); v 153 drivers/gpu/drm/i915/gvt/opregion.c strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK"); v 154 drivers/gpu/drm/i915/gvt/opregion.c v->bdb_header.version = 186; /* child_dev_size = 33 */ v 155 drivers/gpu/drm/i915/gvt/opregion.c v->bdb_header.header_size = sizeof(v->bdb_header); v 157 drivers/gpu/drm/i915/gvt/opregion.c v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header) v 161 drivers/gpu/drm/i915/gvt/opregion.c v->general_features_header.id = BDB_GENERAL_FEATURES; v 162 drivers/gpu/drm/i915/gvt/opregion.c v->general_features_header.size = sizeof(struct bdb_general_features); v 163 drivers/gpu/drm/i915/gvt/opregion.c v->general_features.int_crt_support = 0; v 164 drivers/gpu/drm/i915/gvt/opregion.c v->general_features.int_tv_support = 0; v 168 drivers/gpu/drm/i915/gvt/opregion.c v->general_definitions.child_dev_size = v 170 drivers/gpu/drm/i915/gvt/opregion.c v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS; v 172 drivers/gpu/drm/i915/gvt/opregion.c v->general_definitions_header.size = v 174 drivers/gpu/drm/i915/gvt/opregion.c num_child * v->general_definitions.child_dev_size; v 177 drivers/gpu/drm/i915/gvt/opregion.c v->child0.handle = DEVICE_TYPE_EFP1; v 178 drivers/gpu/drm/i915/gvt/opregion.c v->child0.device_type = DEVICE_TYPE_DP; v 179 drivers/gpu/drm/i915/gvt/opregion.c v->child0.dvo_port = DVO_PORT_DPA; v 180 drivers/gpu/drm/i915/gvt/opregion.c v->child0.aux_channel = DP_AUX_A; v 181 drivers/gpu/drm/i915/gvt/opregion.c v->child0.dp_compat = true; v 182 drivers/gpu/drm/i915/gvt/opregion.c v->child0.integrated_encoder = true; v 185 drivers/gpu/drm/i915/gvt/opregion.c v->child1.handle = DEVICE_TYPE_EFP2; v 186 drivers/gpu/drm/i915/gvt/opregion.c v->child1.device_type = DEVICE_TYPE_DP; v 187 drivers/gpu/drm/i915/gvt/opregion.c v->child1.dvo_port = DVO_PORT_DPB; v 188 drivers/gpu/drm/i915/gvt/opregion.c v->child1.aux_channel = DP_AUX_B; v 189 drivers/gpu/drm/i915/gvt/opregion.c v->child1.dp_compat = true; v 190 drivers/gpu/drm/i915/gvt/opregion.c v->child1.integrated_encoder = true; v 193 drivers/gpu/drm/i915/gvt/opregion.c v->child2.handle = DEVICE_TYPE_EFP3; v 194 drivers/gpu/drm/i915/gvt/opregion.c v->child2.device_type = DEVICE_TYPE_DP; v 195 drivers/gpu/drm/i915/gvt/opregion.c v->child2.dvo_port = DVO_PORT_DPC; v 196 drivers/gpu/drm/i915/gvt/opregion.c v->child2.aux_channel = DP_AUX_C; v 197 drivers/gpu/drm/i915/gvt/opregion.c v->child2.dp_compat = true; v 198 drivers/gpu/drm/i915/gvt/opregion.c v->child2.integrated_encoder = true; v 201 drivers/gpu/drm/i915/gvt/opregion.c v->child3.handle = DEVICE_TYPE_EFP4; v 202 drivers/gpu/drm/i915/gvt/opregion.c v->child3.device_type = DEVICE_TYPE_DP; v 203 drivers/gpu/drm/i915/gvt/opregion.c v->child3.dvo_port = DVO_PORT_DPD; v 204 drivers/gpu/drm/i915/gvt/opregion.c v->child3.aux_channel = DP_AUX_D; v 205 drivers/gpu/drm/i915/gvt/opregion.c v->child3.dp_compat = true; v 206 drivers/gpu/drm/i915/gvt/opregion.c v->child3.integrated_encoder = true; v 209 drivers/gpu/drm/i915/gvt/opregion.c v->driver_features_header.id = BDB_DRIVER_FEATURES; v 210 drivers/gpu/drm/i915/gvt/opregion.c v->driver_features_header.size = sizeof(struct bdb_driver_features); v 211 drivers/gpu/drm/i915/gvt/opregion.c v->driver_features.lvds_config = BDB_DRIVER_FEATURE_NO_LVDS; v 225 drivers/gpu/drm/i915/gvt/opregion.c struct vbt v; v 253 drivers/gpu/drm/i915/gvt/opregion.c virt_vbt_generation(&v); v 254 drivers/gpu/drm/i915/gvt/opregion.c memcpy(buf + INTEL_GVT_OPREGION_VBT_OFFSET, &v, sizeof(struct vbt)); v 172 drivers/gpu/drm/i915/gvt/trace.h TP_PROTO(int id, const char *tag, void *spt, int type, u64 v, v 175 drivers/gpu/drm/i915/gvt/trace.h TP_ARGS(id, tag, spt, type, v, index), v 184 drivers/gpu/drm/i915/gvt/trace.h id, tag, spt, type, v, index); v 209 drivers/gpu/drm/i915/gvt/trace.h TP_PROTO(int id, int page_id, void *gpt, int type, u64 v, v 212 drivers/gpu/drm/i915/gvt/trace.h TP_ARGS(id, page_id, gpt, type, v, index), v 221 drivers/gpu/drm/i915/gvt/trace.h id, page_id, gpt, type, v, index); v 611 drivers/gpu/drm/i915/i915_gem_gtt.c #define fill_px(px, v) fill_page_dma(px_base(px), (v), PAGE_SIZE / sizeof(u64)) v 612 drivers/gpu/drm/i915/i915_gem_gtt.c #define fill32_px(px, v) do { \ v 613 drivers/gpu/drm/i915/i915_gem_gtt.c u64 v__ = lower_32_bits(v); \ v 403 drivers/gpu/drm/i915/i915_utils.h static inline const char *yesno(bool v) v 405 drivers/gpu/drm/i915/i915_utils.h return v ? "yes" : "no"; v 408 drivers/gpu/drm/i915/i915_utils.h static inline const char *onoff(bool v) v 410 drivers/gpu/drm/i915/i915_utils.h return v ? "on" : "off"; v 413 drivers/gpu/drm/i915/i915_utils.h static inline const char *enableddisabled(bool v) v 415 drivers/gpu/drm/i915/i915_utils.h return v ? "enabled" : "disabled"; v 71 drivers/gpu/drm/lima/lima_gp.c u32 v; v 76 drivers/gpu/drm/lima/lima_gp.c err = readl_poll_timeout(ip->iomem + LIMA_GP_INT_RAWSTAT, v, v 77 drivers/gpu/drm/lima/lima_gp.c v & LIMA_GP_IRQ_RESET_COMPLETED, v 18 drivers/gpu/drm/lima/lima_l2_cache.c u32 v; v 20 drivers/gpu/drm/lima/lima_l2_cache.c err = readl_poll_timeout(ip->iomem + LIMA_L2_CACHE_STATUS, v, v 21 drivers/gpu/drm/lima/lima_l2_cache.c !(v & LIMA_L2_CACHE_STATUS_COMMAND_BUSY), v 67 drivers/gpu/drm/lima/lima_mmu.c u32 v; v 80 drivers/gpu/drm/lima/lima_mmu.c LIMA_MMU_DTE_ADDR, v, v == 0); v 94 drivers/gpu/drm/lima/lima_mmu.c LIMA_MMU_STATUS, v, v 95 drivers/gpu/drm/lima/lima_mmu.c v & LIMA_MMU_STATUS_PAGING_ENABLED); v 106 drivers/gpu/drm/lima/lima_mmu.c u32 v; v 109 drivers/gpu/drm/lima/lima_mmu.c LIMA_MMU_STATUS, v, v 110 drivers/gpu/drm/lima/lima_mmu.c v & LIMA_MMU_STATUS_STALL_ACTIVE); v 119 drivers/gpu/drm/lima/lima_mmu.c LIMA_MMU_STATUS, v, v 120 drivers/gpu/drm/lima/lima_mmu.c !(v & LIMA_MMU_STATUS_STALL_ACTIVE)); v 127 drivers/gpu/drm/lima/lima_mmu.c u32 v; v 135 drivers/gpu/drm/lima/lima_mmu.c LIMA_MMU_DTE_ADDR, v, v == 0); v 139 drivers/gpu/drm/lima/lima_mmu.c LIMA_MMU_STATUS, v, v 140 drivers/gpu/drm/lima/lima_mmu.c v & LIMA_MMU_STATUS_PAGING_ENABLED); v 18 drivers/gpu/drm/lima/lima_pmu.c u32 v; v 21 drivers/gpu/drm/lima/lima_pmu.c v, v & LIMA_PMU_INT_CMD_MASK, v 39 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg)) v 41 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg)) v 46 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG_ATTR(reg, v) \ v 50 drivers/gpu/drm/mgag200/mgag200_drv.h WREG8(ATTR_DATA, v); \ v 53 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG_SEQ(reg, v) \ v 56 drivers/gpu/drm/mgag200/mgag200_drv.h WREG8(MGAREG_SEQ_DATA, v); \ v 59 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG_CRT(reg, v) \ v 62 drivers/gpu/drm/mgag200/mgag200_drv.h WREG8(MGAREG_CRTC_DATA, v); \ v 66 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG_ECRT(reg, v) \ v 69 drivers/gpu/drm/mgag200/mgag200_drv.h WREG8(MGAREG_CRTCEXT_DATA, v); \ v 75 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG_GFX(reg, v) \ v 78 drivers/gpu/drm/mgag200/mgag200_drv.h WREG8(GFX_DATA, v); \ v 84 drivers/gpu/drm/mgag200/mgag200_drv.h #define WREG_DAC(reg, v) \ v 87 drivers/gpu/drm/mgag200/mgag200_drv.h WREG8(DAC_DATA, v); \ v 307 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v) v 1206 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v) v 120 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static int dpu_debugfs_danger_stats_show(struct seq_file *s, void *v) v 126 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static int dpu_debugfs_safe_stats_show(struct seq_file *s, void *v) v 16 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c s32 v; v 18 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c v = (tmax - tmin) * percent; v 19 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c v = S_DIV_ROUND_UP(v, 100) + tmin; v 20 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c if (even && (v & 0x1)) v 21 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c return max_t(s32, min_result, v - 1); v 23 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c return max_t(s32, min_result, v); v 48 drivers/gpu/drm/nouveau/dispnv50/atom.h } v; v 264 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.active = mode->crtc_vtotal; v 265 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.synce = mode->crtc_vsync_end - mode->crtc_vsync_start - 1; v 266 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.blanke = mode->crtc_vblank_end - mode->crtc_vsync_start - 1; v 267 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.blanks = m->v.blanke + mode->crtc_vdisplay; v 270 drivers/gpu/drm/nouveau/dispnv50/head.c blankus = (m->v.active - mode->crtc_vdisplay - 2) * m->h.active; v 273 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.blankus = blankus; v 276 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.blank2e = m->v.active + m->v.blanke; v 277 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.blank2s = m->v.blank2e + mode->crtc_vdisplay; v 278 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.active = (m->v.active * 2) + 1; v 281 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.blank2e = 0; v 282 drivers/gpu/drm/nouveau/dispnv50/head.c m->v.blank2s = 1; v 297 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, m->v.active << 16 | m->h.active ); v 298 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, m->v.synce << 16 | m->h.synce ); v 299 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, m->v.blanke << 16 | m->h.blanke ); v 300 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, m->v.blanks << 16 | m->h.blanks ); v 301 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, m->v.blank2e << 16 | m->v.blank2s); v 302 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, asyh->mode.v.blankus); v 249 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, m->v.active << 16 | m->h.active ); v 250 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, m->v.synce << 16 | m->h.synce ); v 251 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, m->v.blanke << 16 | m->h.blanke ); v 252 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, m->v.blanks << 16 | m->h.blanks ); v 253 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, m->v.blank2e << 16 | m->v.blank2s); v 169 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, (m->v.active << 16) | m->h.active ); v 170 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, (m->v.synce << 16) | m->h.synce ); v 171 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, (m->v.blanke << 16) | m->h.blanke ); v 172 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, (m->v.blanks << 16) | m->h.blanks ); v 173 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, (m->v.blank2e << 16) | m->v.blank2s); v 175 drivers/gpu/drm/nouveau/dispnv50/headc57d.c evo_data(push, (m->v.active << 16) | m->h.active ); v 176 drivers/gpu/drm/nouveau/dispnv50/headc57d.c evo_data(push, (m->v.synce << 16) | m->h.synce ); v 177 drivers/gpu/drm/nouveau/dispnv50/headc57d.c evo_data(push, (m->v.blanke << 16) | m->h.blanke ); v 178 drivers/gpu/drm/nouveau/dispnv50/headc57d.c evo_data(push, (m->v.blanks << 16) | m->h.blanks ); v 179 drivers/gpu/drm/nouveau/dispnv50/headc57d.c evo_data(push, (m->v.blank2e << 16) | m->v.blank2s); v 262 drivers/gpu/drm/nouveau/include/nvkm/core/device.h #define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a)) v 263 drivers/gpu/drm/nouveau/include/nvkm/core/device.h #define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a)) v 264 drivers/gpu/drm/nouveau/include/nvkm/core/device.h #define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a)) v 265 drivers/gpu/drm/nouveau/include/nvkm/core/device.h #define nvkm_mask(d,a,m,v) ({ \ v 268 drivers/gpu/drm/nouveau/include/nvkm/core/device.h nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v)); \ v 63 drivers/gpu/drm/nouveau/include/nvkm/core/memory.h #define nvkm_memory_boot(p,v) (p)->func->boot((p),(v)) v 18 drivers/gpu/drm/nouveau/include/nvkm/core/os.h #define iowrite64_native(v,p) do { \ v 20 drivers/gpu/drm/nouveau/include/nvkm/core/os.h u64 _v = (v); \ v 518 drivers/gpu/drm/nouveau/nouveau_chan.c } v; v 521 drivers/gpu/drm/nouveau/nouveau_chan.c .m.count = sizeof(args.v) / sizeof(args.v.channels), v 522 drivers/gpu/drm/nouveau/nouveau_chan.c .v.channels.mthd = NV_DEVICE_FIFO_CHANNELS, v 528 drivers/gpu/drm/nouveau/nouveau_chan.c if (ret || args.v.channels.mthd == NV_DEVICE_INFO_INVALID) v 531 drivers/gpu/drm/nouveau/nouveau_chan.c drm->chan.nr = args.v.channels.data; v 33 drivers/gpu/drm/nouveau/nvif/fifo.c } v; v 43 drivers/gpu/drm/nouveau/nvif/fifo.c a->m.count = sizeof(a->v) / sizeof(a->v.runlists); v 44 drivers/gpu/drm/nouveau/nvif/fifo.c a->v.runlists.mthd = NV_DEVICE_FIFO_RUNLISTS; v 45 drivers/gpu/drm/nouveau/nvif/fifo.c for (i = 0; i < ARRAY_SIZE(a->v.runlist); i++) v 46 drivers/gpu/drm/nouveau/nvif/fifo.c a->v.runlist[i].mthd = NV_DEVICE_FIFO_RUNLIST_ENGINES(i); v 52 drivers/gpu/drm/nouveau/nvif/fifo.c device->runlists = fls64(a->v.runlists.data); v 61 drivers/gpu/drm/nouveau/nvif/fifo.c if (a->v.runlists.data & BIT_ULL(i)) v 62 drivers/gpu/drm/nouveau/nvif/fifo.c device->runlist[i].engines = a->v.runlist[i].data; v 78 drivers/gpu/drm/nouveau/nvif/fifo.c } v; v 81 drivers/gpu/drm/nouveau/nvif/fifo.c .m.count = sizeof(a.v) / sizeof(a.v.engine), v 82 drivers/gpu/drm/nouveau/nvif/fifo.c .v.engine.mthd = engine, v 93 drivers/gpu/drm/nouveau/nvif/fifo.c if (device->runlist[i].engines & a.v.engine.data) v 195 drivers/gpu/drm/nouveau/nvkm/core/ioctl.c } v; v 204 drivers/gpu/drm/nouveau/nvkm/core/ioctl.c ret = nvkm_object_rd08(object, args->v0.addr, &v.b08); v 205 drivers/gpu/drm/nouveau/nvkm/core/ioctl.c args->v0.data = v.b08; v 208 drivers/gpu/drm/nouveau/nvkm/core/ioctl.c ret = nvkm_object_rd16(object, args->v0.addr, &v.b16); v 209 drivers/gpu/drm/nouveau/nvkm/core/ioctl.c args->v0.data = v.b16; v 212 drivers/gpu/drm/nouveau/nvkm/core/ioctl.c ret = nvkm_object_rd32(object, args->v0.addr, &v.b32); v 213 drivers/gpu/drm/nouveau/nvkm/core/ioctl.c args->v0.data = v.b32; v 82 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h void (*audio_sym)(struct nvkm_ior *, int head, u16 h, u32 v); v 335 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c u64 h, v; v 344 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c v = head->asy.vblanks - head->asy.vblanke - 25; v 345 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c v = v * linkKBps; v 346 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c do_div(v, khz); v 347 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c v = v - ((36 / ior->dp.nr) + 3) - 1; v 349 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c ior->func->dp.audio_sym(ior, head->id, h, v); v 49 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c g94_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) v 54 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); v 37 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c gf119_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) v 42 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_mask(device, 0x616624 + hoff, 0x00ffffff, v); v 35 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) v 40 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c nvkm_mask(device, 0x61656c + hoff, 0x00ffffff, v); v 505 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c long v; v 508 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c if (!kstrtol(mode, 0, &v)) { v 509 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c ret = nvkm_clk_ustate_update(clk, v); v 54 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c int i, v; v 106 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c v = nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_RAM_AMOUNT; v 108 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_32MB && v 114 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_16MB && v 277 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_PRINT(l,v,p,f,a...) do { \ v 278 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h struct nvkm_vmm *_vmm = (v); \ v 284 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_DEBUG(v,f,a...) VMM_PRINT(NV_DBG_DEBUG, (v), info, f, ##a) v 285 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_TRACE(v,f,a...) VMM_PRINT(NV_DBG_TRACE, (v), info, f, ##a) v 286 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_SPAM(v,f,a...) VMM_PRINT(NV_DBG_SPAM , (v), dbg, f, ##a) v 326 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_XO(m,v,o,d,c,b,fn,f,a...) do { \ v 328 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h VMM_SPAM((v), " %010llx "f, (m)->addr + _pteo, _data, ##a); \ v 332 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_WO032(m,v,o,d) VMM_XO((m),(v),(o),(d), 1, 32, WO, "%08x") v 333 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_FO032(m,v,o,d,c) \ v 334 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h VMM_XO((m),(v),(o),(d),(c), 32, FO, "%08x %08x", (c)) v 336 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_WO064(m,v,o,d) VMM_XO((m),(v),(o),(d), 1, 64, WO, "%016llx") v 337 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_FO064(m,v,o,d,c) \ v 338 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h VMM_XO((m),(v),(o),(d),(c), 64, FO, "%016llx %08x", (c)) v 340 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_XO128(m,v,o,lo,hi,c,f,a...) do { \ v 343 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h VMM_SPAM((v), " %010llx %016llx%016llx"f, _addr, (hi), (lo), ##a); \ v 351 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_WO128(m,v,o,lo,hi) VMM_XO128((m),(v),(o),(lo),(hi), 1, "") v 352 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h #define VMM_FO128(m,v,o,lo,hi,c) do { \ v 354 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h VMM_XO128((m),(v),(o),(lo),(hi),(c), " %08x", (c)); \ v 850 drivers/gpu/drm/omapdrm/dss/dispc.c u32 v; v 851 drivers/gpu/drm/omapdrm/dss/dispc.c v = FLD_VAL(v_coef[i].hc0_vc00, 7, 0) v 854 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firv_reg(dispc, plane, i, v); v 856 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_ovl_write_firv2_reg(dispc, plane, i, v); v 1403 drivers/gpu/drm/omapdrm/dss/dispc.c u32 v; v 1405 drivers/gpu/drm/omapdrm/dss/dispc.c v = dispc_read_reg(dispc, DISPC_GLOBAL_BUFFER); v 1407 drivers/gpu/drm/omapdrm/dss/dispc.c v = FLD_MOD(v, 4, 2, 0); /* GFX BUF top to WB */ v 1408 drivers/gpu/drm/omapdrm/dss/dispc.c v = FLD_MOD(v, 4, 5, 3); /* GFX BUF bottom to WB */ v 1409 drivers/gpu/drm/omapdrm/dss/dispc.c v = FLD_MOD(v, 0, 26, 24); /* WB BUF top to GFX */ v 1410 drivers/gpu/drm/omapdrm/dss/dispc.c v = FLD_MOD(v, 0, 29, 27); /* WB BUF bottom to GFX */ v 1412 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_GLOBAL_BUFFER, v); v 3809 drivers/gpu/drm/omapdrm/dss/dispc.c u32 v = table[i]; v 3812 drivers/gpu/drm/omapdrm/dss/dispc.c v |= i << 24; v 3814 drivers/gpu/drm/omapdrm/dss/dispc.c v |= 1 << 31; v 3816 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, gdesc->reg, v); v 2153 drivers/gpu/drm/omapdrm/dss/dsi.c u8 v; v 2162 drivers/gpu/drm/omapdrm/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); v 2163 drivers/gpu/drm/omapdrm/dss/dsi.c r |= v << (8 * i); v 2185 drivers/gpu/drm/omapdrm/dss/dsi.c u8 v; v 2194 drivers/gpu/drm/omapdrm/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); v 2195 drivers/gpu/drm/omapdrm/dss/dsi.c r |= v << (8 * i); v 285 drivers/gpu/drm/omapdrm/dss/hdmi.h u32 t = 0, v; v 286 drivers/gpu/drm/omapdrm/dss/hdmi.h while (val != (v = REG_GET(base_addr, idx, b2, b1))) { v 288 drivers/gpu/drm/omapdrm/dss/hdmi.h return v; v 291 drivers/gpu/drm/omapdrm/dss/hdmi.h return v; v 259 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c u32 v; v 267 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c v = hdmi_read_reg(core->base, HDMI_CEC_CA_7_0); v 268 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c v |= 1 << log_addr; v 269 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c hdmi_write_reg(core->base, HDMI_CEC_CA_7_0, v); v 271 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c v = hdmi_read_reg(core->base, HDMI_CEC_CA_15_8); v 272 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c v |= 1 << (log_addr - 8); v 273 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c hdmi_write_reg(core->base, HDMI_CEC_CA_15_8, v); v 73 drivers/gpu/drm/omapdrm/dss/hdmi5.c u32 v; v 88 drivers/gpu/drm/omapdrm/dss/hdmi5.c v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL); v 89 drivers/gpu/drm/omapdrm/dss/hdmi5.c v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ v 90 drivers/gpu/drm/omapdrm/dss/hdmi5.c v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ v 91 drivers/gpu/drm/omapdrm/dss/hdmi5.c hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); v 49 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c unsigned int v; v 64 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(ss_scl_high * sfr, 1000000); v 66 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 68 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v & 0xff, 7, 0); v 71 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(ss_scl_low * sfr, 1000000); v 73 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 75 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v & 0xff, 7, 0); v 78 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(fs_scl_high * sfr, 1000000); v 80 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 82 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v & 0xff, 7, 0); v 85 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(fs_scl_low * sfr, 1000000); v 87 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 89 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v & 0xff, 7, 0); v 92 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(sda_hold * sfr, 1000000); v 93 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c REG_FLD_MOD(base, HDMI_CORE_I2CM_SDA_HOLD_ADDR, v & 0xff, 7, 0); v 118 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c u32 v; v 122 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c v = hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS_RAW); v 123 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c if (v & HDMI_IRQ_VIDEO_FRAME_DONE) v 365 drivers/gpu/drm/omapdrm/dss/pll.c u32 v = readl_relaxed(pll->base + PLL_STATUS); v 366 drivers/gpu/drm/omapdrm/dss/pll.c v &= hsdiv_ack_mask; v 367 drivers/gpu/drm/omapdrm/dss/pll.c if (v == hsdiv_ack_mask) v 161 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c u32 v; v 165 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c v = dmm_read_wa(dmm, reg); v 168 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c return v; v 260 drivers/gpu/drm/radeon/atombios_dp.c u8 v = 0; v 273 drivers/gpu/drm/radeon/atombios_dp.c if (this_v > v) v 274 drivers/gpu/drm/radeon/atombios_dp.c v = this_v; v 279 drivers/gpu/drm/radeon/atombios_dp.c if (v >= DP_VOLTAGE_MAX) v 280 drivers/gpu/drm/radeon/atombios_dp.c v |= DP_TRAIN_MAX_SWING_REACHED; v 286 drivers/gpu/drm/radeon/atombios_dp.c voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT], v 290 drivers/gpu/drm/radeon/atombios_dp.c train_set[lane] = v | p; v 1202 drivers/gpu/drm/radeon/btc_dpm.c if (*voltage < table->entries[i].v) v 1203 drivers/gpu/drm/radeon/btc_dpm.c *voltage = (u16)((table->entries[i].v < max_voltage) ? v 1204 drivers/gpu/drm/radeon/btc_dpm.c table->entries[i].v : max_voltage); v 2595 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; v 2597 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 800; v 2599 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 800; v 2601 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 800; v 2127 drivers/gpu/drm/radeon/ci_dpm.c voltage_table->entries[i].value = voltage_dependency_table->entries[i].v; v 2343 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { v 2360 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { v 2442 drivers/gpu/drm/radeon/ci_dpm.c *voltage = allowed_clock_voltage_table->entries[i].v; v 2447 drivers/gpu/drm/radeon/ci_dpm.c *voltage = allowed_clock_voltage_table->entries[i-1].v; v 2664 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE; v 2705 drivers/gpu/drm/radeon/ci_dpm.c (u16)rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE; v 2738 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].v; v 2770 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE; v 3137 drivers/gpu/drm/radeon/ci_dpm.c if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v) v 3141 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage; v 3143 drivers/gpu/drm/radeon/ci_dpm.c if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v) v 3147 drivers/gpu/drm/radeon/ci_dpm.c ((rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage) * v 3507 drivers/gpu/drm/radeon/ci_dpm.c allowed_sclk_vddc_table->entries[i].v; v 3518 drivers/gpu/drm/radeon/ci_dpm.c allowed_mclk_table->entries[i].v; v 3528 drivers/gpu/drm/radeon/ci_dpm.c allowed_mclk_table->entries[i].v; v 3799 drivers/gpu/drm/radeon/ci_dpm.c requested_voltage = disp_voltage_table->entries[i].v; v 3803 drivers/gpu/drm/radeon/ci_dpm.c if (requested_voltage <= vddc_table->entries[i].v) { v 3804 drivers/gpu/drm/radeon/ci_dpm.c requested_voltage = vddc_table->entries[i].v; v 3946 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { v 3994 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { v 4027 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { v 4058 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { v 4940 drivers/gpu/drm/radeon/ci_dpm.c pi->min_vddc_in_pp_table = allowed_sclk_vddc_table->entries[0].v; v 4942 drivers/gpu/drm/radeon/ci_dpm.c allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; v 4944 drivers/gpu/drm/radeon/ci_dpm.c pi->min_vddci_in_pp_table = allowed_mclk_vddci_table->entries[0].v; v 4946 drivers/gpu/drm/radeon/ci_dpm.c allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v; v 4953 drivers/gpu/drm/radeon/ci_dpm.c allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; v 4955 drivers/gpu/drm/radeon/ci_dpm.c allowed_mclk_vddci_table->entries[allowed_mclk_vddci_table->count - 1].v; v 4995 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].v); v 5006 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddci_leakage(rdev, &table->entries[i].v); v 5017 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].v); v 5028 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].v); v 5798 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; v 5800 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; v 5802 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; v 5804 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; v 200 drivers/gpu/drm/radeon/cik.c void cik_didt_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 206 drivers/gpu/drm/radeon/cik.c WREG32(CIK_DIDT_IND_DATA, (v)); v 263 drivers/gpu/drm/radeon/cik.c void cik_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 270 drivers/gpu/drm/radeon/cik.c WREG32(PCIE_DATA, v); v 1761 drivers/gpu/drm/radeon/cik.c void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v) v 1764 drivers/gpu/drm/radeon/cik.c writel(v, rdev->doorbell.ptr + index); v 1689 drivers/gpu/drm/radeon/cikd.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 47 drivers/gpu/drm/radeon/dce6_afmt.c u32 block_offset, u32 reg, u32 v) v 57 drivers/gpu/drm/radeon/dce6_afmt.c WREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset, v); v 61 drivers/gpu/drm/radeon/evergreen.c void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 67 drivers/gpu/drm/radeon/evergreen.c WREG32(EVERGREEN_CG_IND_DATA, (v)); v 83 drivers/gpu/drm/radeon/evergreen.c void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 89 drivers/gpu/drm/radeon/evergreen.c WREG32(EVERGREEN_PIF_PHY0_DATA, (v)); v 105 drivers/gpu/drm/radeon/evergreen.c void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 111 drivers/gpu/drm/radeon/evergreen.c WREG32(EVERGREEN_PIF_PHY1_DATA, (v)); v 1284 drivers/gpu/drm/radeon/evergreen.c u16 v; v 1287 drivers/gpu/drm/radeon/evergreen.c v = ffs(readrq) - 8; v 1291 drivers/gpu/drm/radeon/evergreen.c if ((v == 0) || (v == 6) || (v == 7)) v 1541 drivers/gpu/drm/radeon/evergreend.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 563 drivers/gpu/drm/radeon/kv_dpm.c return vddc_sclk_table->entries[vid_2bit].v; v 565 drivers/gpu/drm/radeon/kv_dpm.c return vddc_sclk_table->entries[vddc_sclk_table->count - 1].v; v 585 drivers/gpu/drm/radeon/kv_dpm.c if (vddc_sclk_table->entries[i].v == vid_7bit) v 834 drivers/gpu/drm/radeon/kv_dpm.c (pi->high_voltage_t < table->entries[i].v)) v 839 drivers/gpu/drm/radeon/kv_dpm.c pi->uvd_level[i].MinVddNb = cpu_to_be16(table->entries[i].v); v 905 drivers/gpu/drm/radeon/kv_dpm.c pi->high_voltage_t < table->entries[i].v) v 909 drivers/gpu/drm/radeon/kv_dpm.c pi->vce_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); v 968 drivers/gpu/drm/radeon/kv_dpm.c pi->high_voltage_t < table->entries[i].v) v 972 drivers/gpu/drm/radeon/kv_dpm.c pi->samu_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); v 1034 drivers/gpu/drm/radeon/kv_dpm.c pi->acp_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); v 1999 drivers/gpu/drm/radeon/kv_dpm.c uvd_table->entries[i].v = v 2001 drivers/gpu/drm/radeon/kv_dpm.c uvd_table->entries[i].v); v 2006 drivers/gpu/drm/radeon/kv_dpm.c vce_table->entries[i].v = v 2008 drivers/gpu/drm/radeon/kv_dpm.c vce_table->entries[i].v); v 2013 drivers/gpu/drm/radeon/kv_dpm.c samu_table->entries[i].v = v 2015 drivers/gpu/drm/radeon/kv_dpm.c samu_table->entries[i].v); v 2020 drivers/gpu/drm/radeon/kv_dpm.c acp_table->entries[i].v = v 2022 drivers/gpu/drm/radeon/kv_dpm.c acp_table->entries[i].v); v 2115 drivers/gpu/drm/radeon/kv_dpm.c (kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v) <= v 2363 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v))) v 2369 drivers/gpu/drm/radeon/kv_dpm.c table->entries[i].v); v 57 drivers/gpu/drm/radeon/ni.c void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 63 drivers/gpu/drm/radeon/ni.c WREG32(TN_SMC_IND_DATA_0, (v)); v 743 drivers/gpu/drm/radeon/ni_dpm.c u16 v, s32 t, v 750 drivers/gpu/drm/radeon/ni_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); v 765 drivers/gpu/drm/radeon/ni_dpm.c u16 v, v 770 drivers/gpu/drm/radeon/ni_dpm.c ni_calculate_leakage_for_v_and_t_formula(coeff, v, t, i_leakage, leakage); v 999 drivers/gpu/drm/radeon/ni_dpm.c if (0xff01 == table->entries[i].v) { v 1002 drivers/gpu/drm/radeon/ni_dpm.c table->entries[i].v = pi->max_vddc; v 4090 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; v 4092 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; v 4094 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; v 4096 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; v 1155 drivers/gpu/drm/radeon/nid.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 2894 drivers/gpu/drm/radeon/r100.c void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 2901 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_CLOCK_CNTL_DATA, v); v 4126 drivers/gpu/drm/radeon/r100.c void r100_mm_wreg_slow(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 4132 drivers/gpu/drm/radeon/r100.c writel(v, ((void __iomem *)rdev->rmmio) + RADEON_MM_DATA); v 4146 drivers/gpu/drm/radeon/r100.c void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 4149 drivers/gpu/drm/radeon/r100.c iowrite32(v, rdev->rio_mem + reg); v 4152 drivers/gpu/drm/radeon/r100.c iowrite32(v, rdev->rio_mem + RADEON_MM_DATA); v 62 drivers/gpu/drm/radeon/r100d.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 73 drivers/gpu/drm/radeon/r300.c void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 79 drivers/gpu/drm/radeon/r300.c WREG32(RADEON_PCIE_DATA, (v)); v 63 drivers/gpu/drm/radeon/r300d.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 177 drivers/gpu/drm/radeon/r420.c void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 184 drivers/gpu/drm/radeon/r420.c WREG32(R_0001FC_MC_IND_DATA, v); v 132 drivers/gpu/drm/radeon/r600.c void r600_rcu_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 138 drivers/gpu/drm/radeon/r600.c WREG32(R600_RCU_DATA, (v)); v 154 drivers/gpu/drm/radeon/r600.c void r600_uvd_ctx_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 160 drivers/gpu/drm/radeon/r600.c WREG32(R600_UVD_CTX_DATA, (v)); v 1291 drivers/gpu/drm/radeon/r600.c void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 1298 drivers/gpu/drm/radeon/r600.c WREG32(R_0028FC_MC_DATA, v); v 2409 drivers/gpu/drm/radeon/r600.c void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) v 2416 drivers/gpu/drm/radeon/r600.c WREG32(PCIE_PORT_DATA, (v)); v 836 drivers/gpu/drm/radeon/r600_dpm.c radeon_table->entries[i].v = le16_to_cpu(entry->usVoltage); v 1111 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v = v 1164 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = v 1191 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v = v 1249 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v = v 34 drivers/gpu/drm/radeon/r600d.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 1387 drivers/gpu/drm/radeon/radeon.h u16 v; v 1426 drivers/gpu/drm/radeon/radeon.h u16 v; v 1437 drivers/gpu/drm/radeon/radeon.h u16 v; v 2465 drivers/gpu/drm/radeon/radeon.h void r100_mm_wreg_slow(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 2475 drivers/gpu/drm/radeon/radeon.h static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v, v 2479 drivers/gpu/drm/radeon/radeon.h writel(v, ((void __iomem *)rdev->rmmio) + reg); v 2481 drivers/gpu/drm/radeon/radeon.h r100_mm_wreg_slow(rdev, reg, v); v 2485 drivers/gpu/drm/radeon/radeon.h void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2488 drivers/gpu/drm/radeon/radeon.h void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v); v 2509 drivers/gpu/drm/radeon/radeon.h #define WREG8(reg, v) writeb(v, (rdev->rmmio) + (reg)) v 2511 drivers/gpu/drm/radeon/radeon.h #define WREG16(reg, v) writew(v, (rdev->rmmio) + (reg)) v 2516 drivers/gpu/drm/radeon/radeon.h #define WREG32(reg, v) r100_mm_wreg(rdev, (reg), (v), false) v 2517 drivers/gpu/drm/radeon/radeon.h #define WREG32_IDX(reg, v) r100_mm_wreg(rdev, (reg), (v), true) v 2518 drivers/gpu/drm/radeon/radeon.h #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) v 2519 drivers/gpu/drm/radeon/radeon.h #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) v 2521 drivers/gpu/drm/radeon/radeon.h #define WREG32_PLL(reg, v) rdev->pll_wreg(rdev, (reg), (v)) v 2523 drivers/gpu/drm/radeon/radeon.h #define WREG32_MC(reg, v) rdev->mc_wreg(rdev, (reg), (v)) v 2525 drivers/gpu/drm/radeon/radeon.h #define WREG32_PCIE(reg, v) rv370_pcie_wreg(rdev, (reg), (v)) v 2527 drivers/gpu/drm/radeon/radeon.h #define WREG32_PCIE_PORT(reg, v) rdev->pciep_wreg(rdev, (reg), (v)) v 2529 drivers/gpu/drm/radeon/radeon.h #define WREG32_SMC(reg, v) tn_smc_wreg(rdev, (reg), (v)) v 2531 drivers/gpu/drm/radeon/radeon.h #define WREG32_RCU(reg, v) r600_rcu_wreg(rdev, (reg), (v)) v 2533 drivers/gpu/drm/radeon/radeon.h #define WREG32_CG(reg, v) eg_cg_wreg(rdev, (reg), (v)) v 2535 drivers/gpu/drm/radeon/radeon.h #define WREG32_PIF_PHY0(reg, v) eg_pif_phy0_wreg(rdev, (reg), (v)) v 2537 drivers/gpu/drm/radeon/radeon.h #define WREG32_PIF_PHY1(reg, v) eg_pif_phy1_wreg(rdev, (reg), (v)) v 2539 drivers/gpu/drm/radeon/radeon.h #define WREG32_UVD_CTX(reg, v) r600_uvd_ctx_wreg(rdev, (reg), (v)) v 2541 drivers/gpu/drm/radeon/radeon.h #define WREG32_DIDT(reg, v) cik_didt_wreg(rdev, (reg), (v)) v 2567 drivers/gpu/drm/radeon/radeon.h #define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v)) v 2570 drivers/gpu/drm/radeon/radeon.h #define WDOORBELL32(index, v) cik_mm_wdoorbell(rdev, (index), (v)) v 2581 drivers/gpu/drm/radeon/radeon.h void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 2583 drivers/gpu/drm/radeon/radeon.h void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2585 drivers/gpu/drm/radeon/radeon.h void r600_rcu_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2587 drivers/gpu/drm/radeon/radeon.h void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2589 drivers/gpu/drm/radeon/radeon.h void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2591 drivers/gpu/drm/radeon/radeon.h void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2593 drivers/gpu/drm/radeon/radeon.h void r600_uvd_ctx_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2595 drivers/gpu/drm/radeon/radeon.h void cik_didt_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 2685 drivers/gpu/drm/radeon/radeon.h static inline void radeon_ring_write(struct radeon_ring *ring, uint32_t v) v 2690 drivers/gpu/drm/radeon/radeon.h ring->ring[ring->wptr++] = v; v 2747 drivers/gpu/drm/radeon/radeon.h #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) v 2769 drivers/gpu/drm/radeon/radeon.h #define radeon_get_allowed_info_register(rdev, r, v) (rdev)->asic->get_allowed_info_register((rdev), (r), (v)) v 71 drivers/gpu/drm/radeon/radeon_asic.c static void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 74 drivers/gpu/drm/radeon/radeon_asic.c reg, v); v 83 drivers/gpu/drm/radeon/radeon_asic.h void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 201 drivers/gpu/drm/radeon/radeon_asic.h extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v); v 217 drivers/gpu/drm/radeon/radeon_asic.h void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 242 drivers/gpu/drm/radeon/radeon_asic.h void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 267 drivers/gpu/drm/radeon/radeon_asic.h void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 286 drivers/gpu/drm/radeon/radeon_asic.h void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 319 drivers/gpu/drm/radeon/radeon_asic.h void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 366 drivers/gpu/drm/radeon/radeon_asic.h extern void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 786 drivers/gpu/drm/radeon/radeon_asic.h void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); v 3320 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == v 40 drivers/gpu/drm/radeon/radeon_audio.c u32 offset, u32 reg, u32 v); v 123 drivers/gpu/drm/radeon/radeon_audio.c u32 reg, u32 v) v 125 drivers/gpu/drm/radeon/radeon_audio.c WREG32(reg, v); v 353 drivers/gpu/drm/radeon/radeon_audio.c u32 reg, u32 v) v 356 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); v 32 drivers/gpu/drm/radeon/radeon_audio.h #define WREG32_ENDPOINT(block, reg, v) \ v 33 drivers/gpu/drm/radeon/radeon_audio.h radeon_audio_endpoint_wreg(rdev, (block), (reg), (v)) v 39 drivers/gpu/drm/radeon/radeon_audio.h u32 offset, u32 reg, u32 v); v 76 drivers/gpu/drm/radeon/radeon_audio.h u32 offset, u32 reg, u32 v); v 298 drivers/gpu/drm/radeon/rs400.c void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 304 drivers/gpu/drm/radeon/rs400.c WREG32(RS480_NB_MC_DATA, (v)); v 937 drivers/gpu/drm/radeon/rs600.c void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 944 drivers/gpu/drm/radeon/rs600.c WREG32(R_000074_MC_IND_DATA, v); v 664 drivers/gpu/drm/radeon/rs690.c void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 671 drivers/gpu/drm/radeon/rs690.c WREG32(R_00007C_MC_DATA, v); v 226 drivers/gpu/drm/radeon/rv515.c void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) v 232 drivers/gpu/drm/radeon/rv515.c WREG32(MC_IND_DATA, (v)); v 203 drivers/gpu/drm/radeon/rv515d.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 1773 drivers/gpu/drm/radeon/si_dpm.c u16 v, s32 t, u32 ileakage, u32 *leakage) v 1780 drivers/gpu/drm/radeon/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); v 1801 drivers/gpu/drm/radeon/si_dpm.c u16 v, v 1806 drivers/gpu/drm/radeon/si_dpm.c si_calculate_leakage_for_v_and_t_formula(coeff, v, t, i_leakage, leakage); v 1810 drivers/gpu/drm/radeon/si_dpm.c const u32 fixed_kt, u16 v, v 1816 drivers/gpu/drm/radeon/si_dpm.c vddc = div64_s64(drm_int2fixp(v), 1000); v 1830 drivers/gpu/drm/radeon/si_dpm.c u16 v, v 1834 drivers/gpu/drm/radeon/si_dpm.c si_calculate_leakage_for_v_formula(coeff, fixed_kt, v, i_leakage, leakage); v 2953 drivers/gpu/drm/radeon/si_dpm.c *voltage = table->entries[i].v; v 2961 drivers/gpu/drm/radeon/si_dpm.c *voltage = table->entries[table->count - 1].v; v 3951 drivers/gpu/drm/radeon/si_dpm.c voltage_table->entries[i].value = voltage_dependency_table->entries[i].v; v 4163 drivers/gpu/drm/radeon/si_dpm.c (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { v 4178 drivers/gpu/drm/radeon/si_dpm.c (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { v 5164 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) v 5880 drivers/gpu/drm/radeon/si_dpm.c table->entries[i].v, v 5883 drivers/gpu/drm/radeon/si_dpm.c table->entries[i].v = leakage_voltage; v 5894 drivers/gpu/drm/radeon/si_dpm.c table->entries[j].v = (table->entries[j].v <= table->entries[j + 1].v) ? v 5895 drivers/gpu/drm/radeon/si_dpm.c table->entries[j].v : table->entries[j + 1].v; v 6970 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; v 6972 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; v 6974 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; v 6976 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; v 1593 drivers/gpu/drm/radeon/sid.h #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) v 877 drivers/gpu/drm/radeon/sumo_dpm.c u32 v = RREG32(DOUT_SCRATCH3); v 880 drivers/gpu/drm/radeon/sumo_dpm.c v |= 0x4; v 882 drivers/gpu/drm/radeon/sumo_dpm.c v &= 0xFFFFFFFB; v 884 drivers/gpu/drm/radeon/sumo_dpm.c WREG32(DOUT_SCRATCH3, v); v 1522 drivers/gpu/drm/radeon/trinity_dpm.c *voltage = table->entries[i].v; v 1530 drivers/gpu/drm/radeon/trinity_dpm.c *voltage = table->entries[table->count - 1].v; v 32 drivers/gpu/drm/radeon/trinity_smc.c u32 v = 0; v 40 drivers/gpu/drm/radeon/trinity_smc.c v = RREG32(SMC_RESP_0); v 42 drivers/gpu/drm/radeon/trinity_smc.c if (v != 1) { v 43 drivers/gpu/drm/radeon/trinity_smc.c if (v == 0xFF) { v 46 drivers/gpu/drm/radeon/trinity_smc.c } else if (v == 0xFE) { v 42 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_WIN_SET(vop, win, name, v) \ v 43 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name) v 44 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_SCL_SET(vop, win, name, v) \ v 45 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name) v 46 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_SCL_SET_EXT(vop, win, name, v) \ v 48 drivers/gpu/drm/rockchip/rockchip_drm_vop.c win->base, ~0, v, #name) v 50 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ v 53 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \ v 56 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ v 59 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \ v 62 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_INTR_SET_MASK(vop, name, mask, v) \ v 63 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name) v 65 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_REG_SET(vop, group, name, v) \ v 66 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name) v 68 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define VOP_INTR_SET_TYPE(vop, name, type, v) \ v 73 drivers/gpu/drm/rockchip/rockchip_drm_vop.c reg |= (v) << i; \ v 171 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) v 173 drivers/gpu/drm/rockchip/rockchip_drm_vop.c writel(v, vop->regs + offset); v 174 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop->regsbak[offset >> 2] = v; v 189 drivers/gpu/drm/rockchip/rockchip_drm_vop.c uint32_t _offset, uint32_t _mask, uint32_t v, v 204 drivers/gpu/drm/rockchip/rockchip_drm_vop.c v = ((v << shift) & 0xffff) | (mask << (shift + 16)); v 208 drivers/gpu/drm/rockchip/rockchip_drm_vop.c v = (cached_val & ~(mask << shift)) | ((v & mask) << shift); v 209 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop->regsbak[offset >> 2] = v; v 213 drivers/gpu/drm/rockchip/rockchip_drm_vop.c writel_relaxed(v, vop->regs + offset); v 215 drivers/gpu/drm/rockchip/rockchip_drm_vop.c writel(v, vop->regs + offset); v 120 drivers/gpu/drm/tegra/dc.c static inline u32 compute_dda_inc(unsigned int in, unsigned int out, bool v, v 128 drivers/gpu/drm/tegra/dc.c if (v) v 21 drivers/gpu/drm/tegra/falcon.h #define FALCON_IRQMSET_EXT(v) (((v) & 0xff) << 8) v 28 drivers/gpu/drm/tegra/falcon.h #define FALCON_IRQDEST_EXT(v) (((v) & 0xff) << 8) v 26 drivers/gpu/drm/tegra/vic.h #define TRANSCFG_ATT(i, v) (((v) & 0x3) << (i * 4)) v 38 drivers/gpu/host1x/dev.c void host1x_hypervisor_writel(struct host1x *host1x, u32 v, u32 r) v 40 drivers/gpu/host1x/dev.c writel(v, host1x->hv_regs + r); v 48 drivers/gpu/host1x/dev.c void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r) v 52 drivers/gpu/host1x/dev.c writel(v, sync_regs + r); v 62 drivers/gpu/host1x/dev.c void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r) v 64 drivers/gpu/host1x/dev.c writel(v, ch->regs + r); v 145 drivers/gpu/host1x/dev.h void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v); v 147 drivers/gpu/host1x/dev.h void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); v 149 drivers/gpu/host1x/dev.h void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v); v 57 drivers/gpu/host1x/hw/host1x01_hardware.h u32 v = host1x_uclass_indoff_indbe_f(0xf) v 61 drivers/gpu/host1x/hw/host1x01_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 62 drivers/gpu/host1x/hw/host1x01_hardware.h return v; v 68 drivers/gpu/host1x/hw/host1x01_hardware.h u32 v = host1x_uclass_indoff_indmodid_f(mod_id) v 72 drivers/gpu/host1x/hw/host1x01_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 73 drivers/gpu/host1x/hw/host1x01_hardware.h return v; v 57 drivers/gpu/host1x/hw/host1x02_hardware.h u32 v = host1x_uclass_indoff_indbe_f(0xf) v 61 drivers/gpu/host1x/hw/host1x02_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 62 drivers/gpu/host1x/hw/host1x02_hardware.h return v; v 68 drivers/gpu/host1x/hw/host1x02_hardware.h u32 v = host1x_uclass_indoff_indmodid_f(mod_id) v 72 drivers/gpu/host1x/hw/host1x02_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 73 drivers/gpu/host1x/hw/host1x02_hardware.h return v; v 57 drivers/gpu/host1x/hw/host1x04_hardware.h u32 v = host1x_uclass_indoff_indbe_f(0xf) v 61 drivers/gpu/host1x/hw/host1x04_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 62 drivers/gpu/host1x/hw/host1x04_hardware.h return v; v 68 drivers/gpu/host1x/hw/host1x04_hardware.h u32 v = host1x_uclass_indoff_indmodid_f(mod_id) v 72 drivers/gpu/host1x/hw/host1x04_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 73 drivers/gpu/host1x/hw/host1x04_hardware.h return v; v 57 drivers/gpu/host1x/hw/host1x05_hardware.h u32 v = host1x_uclass_indoff_indbe_f(0xf) v 61 drivers/gpu/host1x/hw/host1x05_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 62 drivers/gpu/host1x/hw/host1x05_hardware.h return v; v 68 drivers/gpu/host1x/hw/host1x05_hardware.h u32 v = host1x_uclass_indoff_indmodid_f(mod_id) v 72 drivers/gpu/host1x/hw/host1x05_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 73 drivers/gpu/host1x/hw/host1x05_hardware.h return v; v 58 drivers/gpu/host1x/hw/host1x06_hardware.h u32 v = host1x_uclass_indoff_indbe_f(0xf) v 62 drivers/gpu/host1x/hw/host1x06_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 63 drivers/gpu/host1x/hw/host1x06_hardware.h return v; v 69 drivers/gpu/host1x/hw/host1x06_hardware.h u32 v = host1x_uclass_indoff_indmodid_f(mod_id) v 73 drivers/gpu/host1x/hw/host1x06_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 74 drivers/gpu/host1x/hw/host1x06_hardware.h return v; v 58 drivers/gpu/host1x/hw/host1x07_hardware.h u32 v = host1x_uclass_indoff_indbe_f(0xf) v 62 drivers/gpu/host1x/hw/host1x07_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 63 drivers/gpu/host1x/hw/host1x07_hardware.h return v; v 69 drivers/gpu/host1x/hw/host1x07_hardware.h u32 v = host1x_uclass_indoff_indmodid_f(mod_id) v 73 drivers/gpu/host1x/hw/host1x07_hardware.h v |= host1x_uclass_indoff_autoinc_f(1); v 74 drivers/gpu/host1x/hw/host1x07_hardware.h return v; v 122 drivers/gpu/host1x/hw/hw_host1x01_sync.h static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) v 124 drivers/gpu/host1x/hw/hw_host1x01_sync.h return (v >> 8) & 0xf; v 126 drivers/gpu/host1x/hw/hw_host1x01_sync.h #define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ v 127 drivers/gpu/host1x/hw/hw_host1x01_sync.h host1x_sync_mlock_owner_chid_v(v) v 170 drivers/gpu/host1x/hw/hw_host1x01_sync.h static inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) v 172 drivers/gpu/host1x/hw/hw_host1x01_sync.h return (v & 0x1ff) << 0; v 174 drivers/gpu/host1x/hw/hw_host1x01_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ v 175 drivers/gpu/host1x/hw/hw_host1x01_sync.h host1x_sync_cfpeek_ctrl_addr_f(v) v 176 drivers/gpu/host1x/hw/hw_host1x01_sync.h static inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) v 178 drivers/gpu/host1x/hw/hw_host1x01_sync.h return (v & 0x7) << 16; v 180 drivers/gpu/host1x/hw/hw_host1x01_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ v 181 drivers/gpu/host1x/hw/hw_host1x01_sync.h host1x_sync_cfpeek_ctrl_channr_f(v) v 182 drivers/gpu/host1x/hw/hw_host1x01_sync.h static inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) v 184 drivers/gpu/host1x/hw/hw_host1x01_sync.h return (v & 0x1) << 31; v 186 drivers/gpu/host1x/hw/hw_host1x01_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ v 187 drivers/gpu/host1x/hw/hw_host1x01_sync.h host1x_sync_cfpeek_ctrl_ena_f(v) v 48 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) v 50 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 8; v 52 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ v 53 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_incr_syncpt_cond_f(v) v 54 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) v 56 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 0; v 58 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ v 59 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_incr_syncpt_indx_f(v) v 66 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) v 68 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 24; v 70 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ v 71 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_wait_syncpt_indx_f(v) v 72 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) v 74 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xffffff) << 0; v 76 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ v 77 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_wait_syncpt_thresh_f(v) v 84 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) v 86 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 24; v 88 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ v 89 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_wait_syncpt_base_indx_f(v) v 90 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_base_indx_f(u32 v) v 92 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 16; v 94 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_BASE_INDX_F(v) \ v 95 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_wait_syncpt_base_base_indx_f(v) v 96 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_offset_f(u32 v) v 98 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xffff) << 0; v 100 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_OFFSET_F(v) \ v 101 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_wait_syncpt_base_offset_f(v) v 108 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_load_syncpt_base_base_indx_f(u32 v) v 110 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 24; v 112 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(v) \ v 113 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_load_syncpt_base_base_indx_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_load_syncpt_base_value_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xffffff) << 0; v 118 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_load_syncpt_base_value_f(v) v 120 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_base_indx_f(u32 v) v 122 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 24; v 124 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_BASE_INDX_F(v) \ v 125 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_incr_syncpt_base_base_indx_f(v) v 126 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_offset_f(u32 v) v 128 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xffffff) << 0; v 130 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_OFFSET_F(v) \ v 131 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_incr_syncpt_base_offset_f(v) v 138 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_indoff_indbe_f(u32 v) v 140 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xf) << 28; v 142 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INDOFF_INDBE_F(v) \ v 143 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_indoff_indbe_f(v) v 144 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_indoff_autoinc_f(u32 v) v 146 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0x1) << 27; v 148 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INDOFF_AUTOINC_F(v) \ v 149 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_indoff_autoinc_f(v) v 150 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_indoff_indmodid_f(u32 v) v 152 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xff) << 18; v 154 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INDOFF_INDMODID_F(v) \ v 155 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_indoff_indmodid_f(v) v 156 drivers/gpu/host1x/hw/hw_host1x01_uclass.h static inline u32 host1x_uclass_indoff_indroffset_f(u32 v) v 158 drivers/gpu/host1x/hw/hw_host1x01_uclass.h return (v & 0xffff) << 2; v 160 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 161 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_indoff_indroffset_f(v) v 166 drivers/gpu/host1x/hw/hw_host1x01_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 167 drivers/gpu/host1x/hw/hw_host1x01_uclass.h host1x_uclass_indoff_indroffset_f(v) v 122 drivers/gpu/host1x/hw/hw_host1x02_sync.h static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) v 124 drivers/gpu/host1x/hw/hw_host1x02_sync.h return (v >> 8) & 0xf; v 126 drivers/gpu/host1x/hw/hw_host1x02_sync.h #define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ v 127 drivers/gpu/host1x/hw/hw_host1x02_sync.h host1x_sync_mlock_owner_chid_v(v) v 170 drivers/gpu/host1x/hw/hw_host1x02_sync.h static inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) v 172 drivers/gpu/host1x/hw/hw_host1x02_sync.h return (v & 0x3ff) << 0; v 174 drivers/gpu/host1x/hw/hw_host1x02_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ v 175 drivers/gpu/host1x/hw/hw_host1x02_sync.h host1x_sync_cfpeek_ctrl_addr_f(v) v 176 drivers/gpu/host1x/hw/hw_host1x02_sync.h static inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) v 178 drivers/gpu/host1x/hw/hw_host1x02_sync.h return (v & 0xf) << 16; v 180 drivers/gpu/host1x/hw/hw_host1x02_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ v 181 drivers/gpu/host1x/hw/hw_host1x02_sync.h host1x_sync_cfpeek_ctrl_channr_f(v) v 182 drivers/gpu/host1x/hw/hw_host1x02_sync.h static inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) v 184 drivers/gpu/host1x/hw/hw_host1x02_sync.h return (v & 0x1) << 31; v 186 drivers/gpu/host1x/hw/hw_host1x02_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ v 187 drivers/gpu/host1x/hw/hw_host1x02_sync.h host1x_sync_cfpeek_ctrl_ena_f(v) v 48 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) v 50 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 8; v 52 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ v 53 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_incr_syncpt_cond_f(v) v 54 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) v 56 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 0; v 58 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ v 59 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_incr_syncpt_indx_f(v) v 66 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) v 68 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 24; v 70 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ v 71 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_wait_syncpt_indx_f(v) v 72 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) v 74 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xffffff) << 0; v 76 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ v 77 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_wait_syncpt_thresh_f(v) v 84 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) v 86 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 24; v 88 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ v 89 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_wait_syncpt_base_indx_f(v) v 90 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_base_indx_f(u32 v) v 92 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 16; v 94 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_BASE_INDX_F(v) \ v 95 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_wait_syncpt_base_base_indx_f(v) v 96 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_offset_f(u32 v) v 98 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xffff) << 0; v 100 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_OFFSET_F(v) \ v 101 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_wait_syncpt_base_offset_f(v) v 108 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_load_syncpt_base_base_indx_f(u32 v) v 110 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 24; v 112 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(v) \ v 113 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_load_syncpt_base_base_indx_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_load_syncpt_base_value_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xffffff) << 0; v 118 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_load_syncpt_base_value_f(v) v 120 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_base_indx_f(u32 v) v 122 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 24; v 124 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_BASE_INDX_F(v) \ v 125 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_incr_syncpt_base_base_indx_f(v) v 126 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_offset_f(u32 v) v 128 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xffffff) << 0; v 130 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_OFFSET_F(v) \ v 131 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_incr_syncpt_base_offset_f(v) v 138 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_indoff_indbe_f(u32 v) v 140 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xf) << 28; v 142 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INDOFF_INDBE_F(v) \ v 143 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_indoff_indbe_f(v) v 144 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_indoff_autoinc_f(u32 v) v 146 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0x1) << 27; v 148 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INDOFF_AUTOINC_F(v) \ v 149 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_indoff_autoinc_f(v) v 150 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_indoff_indmodid_f(u32 v) v 152 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xff) << 18; v 154 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INDOFF_INDMODID_F(v) \ v 155 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_indoff_indmodid_f(v) v 156 drivers/gpu/host1x/hw/hw_host1x02_uclass.h static inline u32 host1x_uclass_indoff_indroffset_f(u32 v) v 158 drivers/gpu/host1x/hw/hw_host1x02_uclass.h return (v & 0xffff) << 2; v 160 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 161 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_indoff_indroffset_f(v) v 166 drivers/gpu/host1x/hw/hw_host1x02_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 167 drivers/gpu/host1x/hw/hw_host1x02_uclass.h host1x_uclass_indoff_indroffset_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x04_channel.h static inline u32 host1x_channel_channelctrl_kernel_filter_gbuffer_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x04_channel.h return (v & 0x1) << 2; v 118 drivers/gpu/host1x/hw/hw_host1x04_channel.h #define HOST1X_CHANNEL_CHANNELCTRL_KERNEL_FILTER_GBUFFER(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x04_channel.h host1x_channel_channelctrl_kernel_filter_gbuffer_f(v) v 122 drivers/gpu/host1x/hw/hw_host1x04_sync.h static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) v 124 drivers/gpu/host1x/hw/hw_host1x04_sync.h return (v >> 8) & 0xf; v 126 drivers/gpu/host1x/hw/hw_host1x04_sync.h #define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ v 127 drivers/gpu/host1x/hw/hw_host1x04_sync.h host1x_sync_mlock_owner_chid_v(v) v 170 drivers/gpu/host1x/hw/hw_host1x04_sync.h static inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) v 172 drivers/gpu/host1x/hw/hw_host1x04_sync.h return (v & 0x3ff) << 0; v 174 drivers/gpu/host1x/hw/hw_host1x04_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ v 175 drivers/gpu/host1x/hw/hw_host1x04_sync.h host1x_sync_cfpeek_ctrl_addr_f(v) v 176 drivers/gpu/host1x/hw/hw_host1x04_sync.h static inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) v 178 drivers/gpu/host1x/hw/hw_host1x04_sync.h return (v & 0xf) << 16; v 180 drivers/gpu/host1x/hw/hw_host1x04_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ v 181 drivers/gpu/host1x/hw/hw_host1x04_sync.h host1x_sync_cfpeek_ctrl_channr_f(v) v 182 drivers/gpu/host1x/hw/hw_host1x04_sync.h static inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) v 184 drivers/gpu/host1x/hw/hw_host1x04_sync.h return (v & 0x1) << 31; v 186 drivers/gpu/host1x/hw/hw_host1x04_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ v 187 drivers/gpu/host1x/hw/hw_host1x04_sync.h host1x_sync_cfpeek_ctrl_ena_f(v) v 48 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) v 50 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 8; v 52 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ v 53 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_incr_syncpt_cond_f(v) v 54 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) v 56 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 0; v 58 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ v 59 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_incr_syncpt_indx_f(v) v 66 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) v 68 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 24; v 70 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ v 71 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_wait_syncpt_indx_f(v) v 72 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) v 74 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xffffff) << 0; v 76 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ v 77 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_wait_syncpt_thresh_f(v) v 84 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) v 86 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 24; v 88 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ v 89 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_wait_syncpt_base_indx_f(v) v 90 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_base_indx_f(u32 v) v 92 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 16; v 94 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_BASE_INDX_F(v) \ v 95 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_wait_syncpt_base_base_indx_f(v) v 96 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_offset_f(u32 v) v 98 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xffff) << 0; v 100 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_OFFSET_F(v) \ v 101 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_wait_syncpt_base_offset_f(v) v 108 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_load_syncpt_base_base_indx_f(u32 v) v 110 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 24; v 112 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(v) \ v 113 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_load_syncpt_base_base_indx_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_load_syncpt_base_value_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xffffff) << 0; v 118 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_load_syncpt_base_value_f(v) v 120 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_base_indx_f(u32 v) v 122 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 24; v 124 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_BASE_INDX_F(v) \ v 125 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_incr_syncpt_base_base_indx_f(v) v 126 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_offset_f(u32 v) v 128 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xffffff) << 0; v 130 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_OFFSET_F(v) \ v 131 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_incr_syncpt_base_offset_f(v) v 138 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_indoff_indbe_f(u32 v) v 140 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xf) << 28; v 142 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INDOFF_INDBE_F(v) \ v 143 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_indoff_indbe_f(v) v 144 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_indoff_autoinc_f(u32 v) v 146 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0x1) << 27; v 148 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INDOFF_AUTOINC_F(v) \ v 149 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_indoff_autoinc_f(v) v 150 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_indoff_indmodid_f(u32 v) v 152 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xff) << 18; v 154 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INDOFF_INDMODID_F(v) \ v 155 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_indoff_indmodid_f(v) v 156 drivers/gpu/host1x/hw/hw_host1x04_uclass.h static inline u32 host1x_uclass_indoff_indroffset_f(u32 v) v 158 drivers/gpu/host1x/hw/hw_host1x04_uclass.h return (v & 0xffff) << 2; v 160 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 161 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_indoff_indroffset_f(v) v 166 drivers/gpu/host1x/hw/hw_host1x04_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 167 drivers/gpu/host1x/hw/hw_host1x04_uclass.h host1x_uclass_indoff_indroffset_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x05_channel.h static inline u32 host1x_channel_channelctrl_kernel_filter_gbuffer_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x05_channel.h return (v & 0x1) << 2; v 118 drivers/gpu/host1x/hw/hw_host1x05_channel.h #define HOST1X_CHANNEL_CHANNELCTRL_KERNEL_FILTER_GBUFFER(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x05_channel.h host1x_channel_channelctrl_kernel_filter_gbuffer_f(v) v 126 drivers/gpu/host1x/hw/hw_host1x05_sync.h #define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ v 127 drivers/gpu/host1x/hw/hw_host1x05_sync.h host1x_sync_mlock_owner_chid_v(v) v 170 drivers/gpu/host1x/hw/hw_host1x05_sync.h static inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) v 172 drivers/gpu/host1x/hw/hw_host1x05_sync.h return (v & 0x3ff) << 0; v 174 drivers/gpu/host1x/hw/hw_host1x05_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ v 175 drivers/gpu/host1x/hw/hw_host1x05_sync.h host1x_sync_cfpeek_ctrl_addr_f(v) v 176 drivers/gpu/host1x/hw/hw_host1x05_sync.h static inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) v 178 drivers/gpu/host1x/hw/hw_host1x05_sync.h return (v & 0xf) << 16; v 180 drivers/gpu/host1x/hw/hw_host1x05_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ v 181 drivers/gpu/host1x/hw/hw_host1x05_sync.h host1x_sync_cfpeek_ctrl_channr_f(v) v 182 drivers/gpu/host1x/hw/hw_host1x05_sync.h static inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) v 184 drivers/gpu/host1x/hw/hw_host1x05_sync.h return (v & 0x1) << 31; v 186 drivers/gpu/host1x/hw/hw_host1x05_sync.h #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ v 187 drivers/gpu/host1x/hw/hw_host1x05_sync.h host1x_sync_cfpeek_ctrl_ena_f(v) v 48 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) v 50 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 8; v 52 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ v 53 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_incr_syncpt_cond_f(v) v 54 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) v 56 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 0; v 58 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ v 59 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_incr_syncpt_indx_f(v) v 66 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) v 68 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 24; v 70 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ v 71 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_wait_syncpt_indx_f(v) v 72 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) v 74 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xffffff) << 0; v 76 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ v 77 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_wait_syncpt_thresh_f(v) v 84 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) v 86 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 24; v 88 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ v 89 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_wait_syncpt_base_indx_f(v) v 90 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_base_indx_f(u32 v) v 92 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 16; v 94 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_BASE_INDX_F(v) \ v 95 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_wait_syncpt_base_base_indx_f(v) v 96 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_offset_f(u32 v) v 98 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xffff) << 0; v 100 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_OFFSET_F(v) \ v 101 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_wait_syncpt_base_offset_f(v) v 108 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_load_syncpt_base_base_indx_f(u32 v) v 110 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 24; v 112 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(v) \ v 113 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_load_syncpt_base_base_indx_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_load_syncpt_base_value_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xffffff) << 0; v 118 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_load_syncpt_base_value_f(v) v 120 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_base_indx_f(u32 v) v 122 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 24; v 124 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_BASE_INDX_F(v) \ v 125 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_incr_syncpt_base_base_indx_f(v) v 126 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_offset_f(u32 v) v 128 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xffffff) << 0; v 130 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_OFFSET_F(v) \ v 131 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_incr_syncpt_base_offset_f(v) v 138 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_indoff_indbe_f(u32 v) v 140 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xf) << 28; v 142 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INDOFF_INDBE_F(v) \ v 143 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_indoff_indbe_f(v) v 144 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_indoff_autoinc_f(u32 v) v 146 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0x1) << 27; v 148 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INDOFF_AUTOINC_F(v) \ v 149 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_indoff_autoinc_f(v) v 150 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_indoff_indmodid_f(u32 v) v 152 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xff) << 18; v 154 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INDOFF_INDMODID_F(v) \ v 155 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_indoff_indmodid_f(v) v 156 drivers/gpu/host1x/hw/hw_host1x05_uclass.h static inline u32 host1x_uclass_indoff_indroffset_f(u32 v) v 158 drivers/gpu/host1x/hw/hw_host1x05_uclass.h return (v & 0xffff) << 2; v 160 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 161 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_indoff_indroffset_f(v) v 166 drivers/gpu/host1x/hw/hw_host1x05_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 167 drivers/gpu/host1x/hw/hw_host1x05_uclass.h host1x_uclass_indoff_indroffset_f(v) v 48 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) v 50 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 10; v 52 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ v 53 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_incr_syncpt_cond_f(v) v 54 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) v 56 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 0; v 58 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ v 59 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_incr_syncpt_indx_f(v) v 66 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) v 68 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 24; v 70 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ v 71 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_wait_syncpt_indx_f(v) v 72 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) v 74 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xffffff) << 0; v 76 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ v 77 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_wait_syncpt_thresh_f(v) v 84 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) v 86 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 24; v 88 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ v 89 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_wait_syncpt_base_indx_f(v) v 90 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_base_indx_f(u32 v) v 92 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 16; v 94 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_BASE_INDX_F(v) \ v 95 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_wait_syncpt_base_base_indx_f(v) v 96 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_offset_f(u32 v) v 98 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xffff) << 0; v 100 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_OFFSET_F(v) \ v 101 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_wait_syncpt_base_offset_f(v) v 108 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_load_syncpt_base_base_indx_f(u32 v) v 110 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 24; v 112 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(v) \ v 113 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_load_syncpt_base_base_indx_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_load_syncpt_base_value_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xffffff) << 0; v 118 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_load_syncpt_base_value_f(v) v 120 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_base_indx_f(u32 v) v 122 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 24; v 124 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_BASE_INDX_F(v) \ v 125 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_incr_syncpt_base_base_indx_f(v) v 126 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_offset_f(u32 v) v 128 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xffffff) << 0; v 130 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_OFFSET_F(v) \ v 131 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_incr_syncpt_base_offset_f(v) v 138 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_indoff_indbe_f(u32 v) v 140 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xf) << 28; v 142 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INDOFF_INDBE_F(v) \ v 143 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_indoff_indbe_f(v) v 144 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_indoff_autoinc_f(u32 v) v 146 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0x1) << 27; v 148 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INDOFF_AUTOINC_F(v) \ v 149 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_indoff_autoinc_f(v) v 150 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_indoff_indmodid_f(u32 v) v 152 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xff) << 18; v 154 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INDOFF_INDMODID_F(v) \ v 155 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_indoff_indmodid_f(v) v 156 drivers/gpu/host1x/hw/hw_host1x06_uclass.h static inline u32 host1x_uclass_indoff_indroffset_f(u32 v) v 158 drivers/gpu/host1x/hw/hw_host1x06_uclass.h return (v & 0xffff) << 2; v 160 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 161 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_indoff_indroffset_f(v) v 166 drivers/gpu/host1x/hw/hw_host1x06_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 167 drivers/gpu/host1x/hw/hw_host1x06_uclass.h host1x_uclass_indoff_indroffset_f(v) v 35 drivers/gpu/host1x/hw/hw_host1x06_vm.h #define HOST1X_SYNC_SYNCPT_CH_APP_CH(v) (((v) & 0x3f) << 8) v 48 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) v 50 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 10; v 52 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ v 53 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_incr_syncpt_cond_f(v) v 54 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) v 56 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 0; v 58 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ v 59 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_incr_syncpt_indx_f(v) v 66 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) v 68 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 24; v 70 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_INDX_F(v) \ v 71 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_wait_syncpt_indx_f(v) v 72 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_wait_syncpt_thresh_f(u32 v) v 74 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xffffff) << 0; v 76 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_THRESH_F(v) \ v 77 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_wait_syncpt_thresh_f(v) v 84 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_indx_f(u32 v) v 86 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 24; v 88 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_INDX_F(v) \ v 89 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_wait_syncpt_base_indx_f(v) v 90 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_base_indx_f(u32 v) v 92 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 16; v 94 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_BASE_INDX_F(v) \ v 95 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_wait_syncpt_base_base_indx_f(v) v 96 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_wait_syncpt_base_offset_f(u32 v) v 98 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xffff) << 0; v 100 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_WAIT_SYNCPT_BASE_OFFSET_F(v) \ v 101 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_wait_syncpt_base_offset_f(v) v 108 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_load_syncpt_base_base_indx_f(u32 v) v 110 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 24; v 112 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_BASE_INDX_F(v) \ v 113 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_load_syncpt_base_base_indx_f(v) v 114 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_load_syncpt_base_value_f(u32 v) v 116 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xffffff) << 0; v 118 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_LOAD_SYNCPT_BASE_VALUE_F(v) \ v 119 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_load_syncpt_base_value_f(v) v 120 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_base_indx_f(u32 v) v 122 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 24; v 124 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_BASE_INDX_F(v) \ v 125 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_incr_syncpt_base_base_indx_f(v) v 126 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_incr_syncpt_base_offset_f(u32 v) v 128 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xffffff) << 0; v 130 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INCR_SYNCPT_BASE_OFFSET_F(v) \ v 131 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_incr_syncpt_base_offset_f(v) v 138 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_indoff_indbe_f(u32 v) v 140 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xf) << 28; v 142 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INDOFF_INDBE_F(v) \ v 143 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_indoff_indbe_f(v) v 144 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_indoff_autoinc_f(u32 v) v 146 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0x1) << 27; v 148 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INDOFF_AUTOINC_F(v) \ v 149 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_indoff_autoinc_f(v) v 150 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_indoff_indmodid_f(u32 v) v 152 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xff) << 18; v 154 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INDOFF_INDMODID_F(v) \ v 155 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_indoff_indmodid_f(v) v 156 drivers/gpu/host1x/hw/hw_host1x07_uclass.h static inline u32 host1x_uclass_indoff_indroffset_f(u32 v) v 158 drivers/gpu/host1x/hw/hw_host1x07_uclass.h return (v & 0xffff) << 2; v 160 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 161 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_indoff_indroffset_f(v) v 166 drivers/gpu/host1x/hw/hw_host1x07_uclass.h #define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ v 167 drivers/gpu/host1x/hw/hw_host1x07_uclass.h host1x_uclass_indoff_indroffset_f(v) v 34 drivers/gpu/host1x/hw/hw_host1x07_vm.h #define HOST1X_SYNC_SYNCPT_CH_APP_CH(v) (((v) & 0x3f) << 8) v 100 drivers/gpu/ipu-v3/ipu-cpmem.c static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v) v 115 drivers/gpu/ipu-v3/ipu-cpmem.c val |= v << ofs; v 121 drivers/gpu/ipu-v3/ipu-cpmem.c val |= v >> (ofs ? (32 - ofs) : 0); v 30 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_CTRL_HANDSHAKE_LINE_NUM(v) ((v & 0x3) << 9) v 42 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_TPR_CTRL_TILE_FORMAT(v) ((v & 0xff) << 0) v 51 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_PREF_ENG_CTRL_RD_NUM_BYTES(v) ((v & 0x7) << 1) v 52 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_PREF_ENG_CTRL_INPUT_ACTIVE_BPP(v) ((v & 0x3) << 4) v 53 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_PREF_ENG_CTRL_INPUT_PIXEL_FORMAT(v) ((v & 0x7) << 8) v 60 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_PREFETCH_ENG_INPUT_SIZE_WIDTH(v) ((v & 0xffff) << 0) v 61 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_PREFETCH_ENG_INPUT_SIZE_HEIGHT(v) ((v & 0xffff) << 16) v 64 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_PREFETCH_ENG_PITCH_Y(v) ((v & 0xffff) << 0) v 65 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_PREFETCH_ENG_PITCH_UV(v) ((v & 0xffff) << 16) v 69 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_STORE_ENG_CTRL_WR_NUM_BYTES(v) ((v & 0x7) << 1) v 70 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_STORE_ENG_CTRL_OUTPUT_ACTIVE_BPP(v) ((v & 0x3) << 4) v 81 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_STORE_ENG_SIZE_INPUT_WIDTH(v) ((v & 0xffff) << 0) v 82 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_STORE_ENG_SIZE_INPUT_HEIGHT(v) ((v & 0xffff) << 16) v 85 drivers/gpu/ipu-v3/ipu-pre.c #define IPU_PRE_STORE_ENG_PITCH_OUT_PITCH(v) ((v & 0xffff) << 0) v 25 drivers/gpu/ipu-v3/ipu-prg.c #define IPU_PRG_CTL_SOFT_ARID(i, v) ((v & 0x3) << (8 + 2 * i)) v 646 drivers/gpu/vga/vga_switcheroo.c static int vga_switcheroo_show(struct seq_file *m, void *v) v 1012 drivers/hid/hid-core.c __s32 v = *multiplier->value; v 1031 drivers/hid/hid-core.c m = ((v - lmin)/(lmax - lmin) * (pmax - pmin) + pmin); v 2550 drivers/hid/hid-logitech-hidpp.c int v; v 2567 drivers/hid/hid-logitech-hidpp.c v = hid_snto32(hid_field_extract(hdev, data+3, 0, 12), 12); v 2568 drivers/hid/hid-logitech-hidpp.c input_report_rel(hidpp->input, REL_X, v); v 2570 drivers/hid/hid-logitech-hidpp.c v = hid_snto32(hid_field_extract(hdev, data+3, 12, 12), 12); v 2571 drivers/hid/hid-logitech-hidpp.c input_report_rel(hidpp->input, REL_Y, v); v 2573 drivers/hid/hid-logitech-hidpp.c v = hid_snto32(data[6], 8); v 2574 drivers/hid/hid-logitech-hidpp.c if (v != 0) v 2576 drivers/hid/hid-logitech-hidpp.c &hidpp->vertical_wheel_counter, v); v 221 drivers/hid/hid-multitouch.c #define MT_USB_DEVICE(v, p) HID_DEVICE(BUS_USB, HID_GROUP_MULTITOUCH, v, p) v 222 drivers/hid/hid-multitouch.c #define MT_BT_DEVICE(v, p) HID_DEVICE(BUS_BLUETOOTH, HID_GROUP_MULTITOUCH, v, p) v 844 drivers/hid/hid-uclogic-rdesc.c s32 v; v 853 drivers/hid/hid-uclogic-rdesc.c v = param_list[p[sizeof(head)]]; v 854 drivers/hid/hid-uclogic-rdesc.c put_unaligned(cpu_to_le32(v), (s32 *)p); v 627 drivers/hv/hv_balloon.c void *v) v 629 drivers/hv/hv_balloon.c struct memory_notify *mem = (struct memory_notify *)v; v 1660 drivers/hwmon/adt7475.c unsigned int v; v 1668 drivers/hwmon/adt7475.c v = (data->pwm[CONTROL][index] >> 5) & 7; v 1670 drivers/hwmon/adt7475.c if (v == 3) v 1672 drivers/hwmon/adt7475.c else if (v == 7) v 1674 drivers/hwmon/adt7475.c else if (v == 4) { v 1694 drivers/hwmon/adt7475.c switch (v) { v 363 drivers/hwmon/fschmd.c long v; v 366 drivers/hwmon/fschmd.c err = kstrtol(buf, 10, &v); v 370 drivers/hwmon/fschmd.c v = clamp_val(v / 1000, -128, 127) + 128; v 374 drivers/hwmon/fschmd.c FSCHMD_REG_TEMP_LIMIT[data->kind][index], v); v 375 drivers/hwmon/fschmd.c data->temp_max[index] = v; v 437 drivers/hwmon/fschmd.c unsigned long v; v 440 drivers/hwmon/fschmd.c err = kstrtoul(buf, 10, &v); v 444 drivers/hwmon/fschmd.c switch (v) { v 446 drivers/hwmon/fschmd.c v = 1; v 449 drivers/hwmon/fschmd.c v = 2; v 452 drivers/hwmon/fschmd.c v = 3; v 457 drivers/hwmon/fschmd.c v); v 468 drivers/hwmon/fschmd.c reg |= v; v 526 drivers/hwmon/fschmd.c unsigned long v; v 529 drivers/hwmon/fschmd.c err = kstrtoul(buf, 10, &v); v 534 drivers/hwmon/fschmd.c if (v || data->kind == fscsyl) { v 535 drivers/hwmon/fschmd.c v = clamp_val(v, 128, 255); v 536 drivers/hwmon/fschmd.c v = (v - 128) * 2 + 1; v 542 drivers/hwmon/fschmd.c FSCHMD_REG_FAN_MIN[data->kind][index], v); v 543 drivers/hwmon/fschmd.c data->fan_min[index] = v; v 571 drivers/hwmon/fschmd.c unsigned long v; v 574 drivers/hwmon/fschmd.c err = kstrtoul(buf, 10, &v); v 582 drivers/hwmon/fschmd.c if (v) v 251 drivers/hwmon/gl520sm.c long v; v 254 drivers/hwmon/gl520sm.c err = kstrtol(buf, 10, &v); v 261 drivers/hwmon/gl520sm.c r = VDD_TO_REG(v); v 263 drivers/hwmon/gl520sm.c r = IN_TO_REG(v); v 285 drivers/hwmon/gl520sm.c long v; v 288 drivers/hwmon/gl520sm.c err = kstrtol(buf, 10, &v); v 293 drivers/hwmon/gl520sm.c r = VDD_TO_REG(v); v 295 drivers/hwmon/gl520sm.c r = IN_TO_REG(v); v 382 drivers/hwmon/gl520sm.c unsigned long v; v 385 drivers/hwmon/gl520sm.c err = kstrtoul(buf, 10, &v); v 390 drivers/hwmon/gl520sm.c r = FAN_TO_REG(v, data->fan_div[n]); v 422 drivers/hwmon/gl520sm.c unsigned long v; v 425 drivers/hwmon/gl520sm.c err = kstrtoul(buf, 10, &v); v 429 drivers/hwmon/gl520sm.c switch (v) { v 444 drivers/hwmon/gl520sm.c "fan_div value %ld not supported. Choose one of 1, 2, 4 or 8!\n", v); v 471 drivers/hwmon/gl520sm.c unsigned long v; v 474 drivers/hwmon/gl520sm.c err = kstrtoul(buf, 10, &v); v 478 drivers/hwmon/gl520sm.c r = (v ? 1 : 0); v 535 drivers/hwmon/gl520sm.c long v; v 538 drivers/hwmon/gl520sm.c err = kstrtol(buf, 10, &v); v 543 drivers/hwmon/gl520sm.c data->temp_max[n] = TEMP_TO_REG(v); v 556 drivers/hwmon/gl520sm.c long v; v 559 drivers/hwmon/gl520sm.c err = kstrtol(buf, 10, &v); v 564 drivers/hwmon/gl520sm.c data->temp_max_hyst[n] = TEMP_TO_REG(v); v 606 drivers/hwmon/gl520sm.c unsigned long v; v 609 drivers/hwmon/gl520sm.c err = kstrtoul(buf, 10, &v); v 613 drivers/hwmon/gl520sm.c r = (v ? 0 : 1); v 96 drivers/hwmon/sch56xx-common.c static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v) v 125 drivers/hwmon/sch56xx-common.c outb(v, addr + 4); v 34 drivers/hwmon/xgene-hwmon.c #define MSG_TYPE(v) (((v) & 0xF0000000) >> 28) v 35 drivers/hwmon/xgene-hwmon.c #define MSG_TYPE_SET(v) (((v) << 28) & 0xF0000000) v 36 drivers/hwmon/xgene-hwmon.c #define MSG_SUBTYPE(v) (((v) & 0x0F000000) >> 24) v 37 drivers/hwmon/xgene-hwmon.c #define MSG_SUBTYPE_SET(v) (((v) << 24) & 0x0F000000) v 54 drivers/hwmon/xgene-hwmon.c #define TPC_CMD(v) (((v) & 0x00FF0000) >> 16) v 55 drivers/hwmon/xgene-hwmon.c #define TPC_CMD_SET(v) (((v) << 16) & 0x00FF0000) v 377 drivers/hwtracing/coresight/coresight-cpu-debug.c unsigned long v, void *p) v 44 drivers/i2c/busses/i2c-au1550.c static inline void WR(struct i2c_au1550_data *a, int r, unsigned long v) v 46 drivers/i2c/busses/i2c-au1550.c __raw_writel(v, a->psc_base + r); v 242 drivers/i2c/busses/i2c-ibm_iic.c u8 mask, v, sda; v 269 drivers/i2c/busses/i2c-ibm_iic.c v = i2c_8bit_addr_from_msg(p); v 273 drivers/i2c/busses/i2c-ibm_iic.c sda = (v & mask) ? DIRCNTL_SDAC : 0; v 116 drivers/i2c/busses/i2c-ibm_iic.h #define DIRCTNL_FREE(v) (((v) & 0x0f) == 0x0f) v 44 drivers/i2c/busses/i2c-mxs.c #define MXS_I2C_CTRL0_XFER_COUNT(v) ((v) & 0x0000FFFF) v 392 drivers/i2c/busses/i2c-stm32f7.c struct stm32f7_i2c_timings *v, *_v, *s; v 465 drivers/i2c/busses/i2c-stm32f7.c v = kmalloc(sizeof(*v), GFP_KERNEL); v 466 drivers/i2c/busses/i2c-stm32f7.c if (!v) { v 471 drivers/i2c/busses/i2c-stm32f7.c v->presc = p; v 472 drivers/i2c/busses/i2c-stm32f7.c v->scldel = l; v 473 drivers/i2c/busses/i2c-stm32f7.c v->sdadel = a; v 476 drivers/i2c/busses/i2c-stm32f7.c list_add_tail(&v->node, v 508 drivers/i2c/busses/i2c-stm32f7.c list_for_each_entry(v, &solutions, node) { v 509 drivers/i2c/busses/i2c-stm32f7.c u32 prescaler = (v->presc + 1) * i2cclk; v 535 drivers/i2c/busses/i2c-stm32f7.c v->scll = l; v 536 drivers/i2c/busses/i2c-stm32f7.c v->sclh = h; v 537 drivers/i2c/busses/i2c-stm32f7.c s = v; v 564 drivers/i2c/busses/i2c-stm32f7.c list_for_each_entry_safe(v, _v, &solutions, node) { v 565 drivers/i2c/busses/i2c-stm32f7.c list_del(&v->node); v 566 drivers/i2c/busses/i2c-stm32f7.c kfree(v); v 54 drivers/i2c/busses/i2c-sun6i-p2wi.c #define P2WI_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8) v 56 drivers/i2c/busses/i2c-sun6i-p2wi.c #define P2WI_CCR_CLK_DIV(v) ((v) & P2WI_CCR_MAX_CLK_DIV) v 59 drivers/i2c/busses/i2c-sun6i-p2wi.c #define P2WI_INTS_TRANS_ERR_ID(v) (((v) >> 8) & 0xff) v 66 drivers/i2c/busses/i2c-sun6i-p2wi.c #define P2WI_DLEN_DATA_LENGTH(v) ((v - 1) & 0x7) v 78 drivers/i2c/busses/i2c-sun6i-p2wi.c #define P2WI_PMCR_PMU_INIT_DATA(v) (((v) & 0xff) << 16) v 79 drivers/i2c/busses/i2c-sun6i-p2wi.c #define P2WI_PMCR_PMU_MODE_REG(v) (((v) & 0xff) << 8) v 80 drivers/i2c/busses/i2c-sun6i-p2wi.c #define P2WI_PMCR_PMU_DEV_ADDR(v) ((v) & 0xff) v 81 drivers/i2c/busses/i2c-xgene-slimpro.c #define SLIMPRO_MSG_TYPE(v) (((v) & 0xF0000000) >> 28) v 1432 drivers/ide/ide-cd.c static int idecd_capacity_proc_show(struct seq_file *m, void *v) v 44 drivers/ide/ide-disk_proc.c static int idedisk_cache_proc_show(struct seq_file *m, void *v) v 55 drivers/ide/ide-disk_proc.c static int idedisk_capacity_proc_show(struct seq_file *m, void *v) v 86 drivers/ide/ide-disk_proc.c static int idedisk_sv_proc_show(struct seq_file *m, void *v) v 91 drivers/ide/ide-disk_proc.c static int idedisk_st_proc_show(struct seq_file *m, void *v) v 9 drivers/ide/ide-floppy_proc.c static int idefloppy_capacity_proc_show(struct seq_file *m, void *v) v 35 drivers/ide/ide-proc.c static int ide_imodel_proc_show(struct seq_file *m, void *v) v 60 drivers/ide/ide-proc.c static int ide_mate_proc_show(struct seq_file *m, void *v) v 71 drivers/ide/ide-proc.c static int ide_channel_proc_show(struct seq_file *m, void *v) v 79 drivers/ide/ide-proc.c static int ide_identify_proc_show(struct seq_file *m, void *v) v 230 drivers/ide/ide-proc.c static int ide_settings_proc_show(struct seq_file *m, void *v) v 393 drivers/ide/ide-proc.c int ide_capacity_proc_show(struct seq_file *m, void *v) v 400 drivers/ide/ide-proc.c int ide_geometry_proc_show(struct seq_file *m, void *v) v 412 drivers/ide/ide-proc.c static int ide_dmodel_proc_show(struct seq_file *seq, void *v) v 421 drivers/ide/ide-proc.c static int ide_driver_proc_show(struct seq_file *m, void *v) v 436 drivers/ide/ide-proc.c static int ide_media_proc_show(struct seq_file *m, void *v) v 1839 drivers/ide/ide-tape.c static int idetape_name_proc_show(struct seq_file *m, void *v) v 93 drivers/ide/ide-timings.c #define ENOUGH(v, unit) (((v) - 1) / (unit) + 1) v 94 drivers/ide/ide-timings.c #define EZ(v, unit) ((v) ? ENOUGH((v) * 1000, unit) : 0) v 175 drivers/ide/it821x.c u8 unit = drive->dn & 1, v; v 207 drivers/ide/it821x.c pci_read_config_byte(dev, 0x50, &v); v 208 drivers/ide/it821x.c v &= ~(1 << (1 + hwif->channel)); v 209 drivers/ide/it821x.c v |= sel << (1 + hwif->channel); v 210 drivers/ide/it821x.c pci_write_config_byte(dev, 0x50, v); v 298 drivers/ide/via82cxxx.c u8 t, v; v 320 drivers/ide/via82cxxx.c pci_read_config_byte(dev, VIA_IDE_ENABLE, &v); v 337 drivers/ide/via82cxxx.c switch (v & 3) { v 295 drivers/iio/accel/mma9551_core.c __be16 v; v 298 drivers/iio/accel/mma9551_core.c reg, NULL, 0, (u8 *)&v, 2); v 299 drivers/iio/accel/mma9551_core.c *val = be16_to_cpu(v); v 325 drivers/iio/accel/mma9551_core.c __be16 v = cpu_to_be16(val); v 328 drivers/iio/accel/mma9551_core.c (u8 *)&v, 2, NULL, 0); v 353 drivers/iio/accel/mma9551_core.c __be16 v; v 356 drivers/iio/accel/mma9551_core.c reg, NULL, 0, (u8 *)&v, 2); v 357 drivers/iio/accel/mma9551_core.c *val = be16_to_cpu(v); v 43 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_MR_TRGSEL(v) ((v) << 1) v 65 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_MR_PRESCAL(v) ((v) << AT91_SAMA5D2_MR_PRESCAL_OFFSET) v 70 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_MR_STARTUP(v) ((v) << 16) v 75 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_MR_TRACKTIM(v) ((v) << 24) v 78 drivers/iio/adc/at91-sama5d2_adc.c #define AT91_SAMA5D2_MR_TRANSFER(v) ((v) << 28) v 48 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v) v 50 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v) v 52 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v) v 54 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v) v 56 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v) v 58 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v) v 60 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v) v 62 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v) v 64 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v) v 66 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v) v 68 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR1_DFSDMEN(v) FIELD_PREP(DFSDM_CHCFGR1_DFSDMEN_MASK, v) v 72 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR2_DTRBS(v) FIELD_PREP(DFSDM_CHCFGR2_DTRBS_MASK, v) v 74 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CHCFGR2_OFFSET(v) FIELD_PREP(DFSDM_CHCFGR2_OFFSET_MASK, v) v 78 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWSCDR_SCDT(v) FIELD_PREP(DFSDM_AWSCDR_SCDT_MASK, v) v 80 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWSCDR_BKSCD(v) FIELD_PREP(DFSDM_AWSCDR_BKSCD_MASK, v) v 82 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWSCDR_AWFOSR(v) FIELD_PREP(DFSDM_AWSCDR_AWFOSR_MASK, v) v 84 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWSCDR_AWFORD(v) FIELD_PREP(DFSDM_AWSCDR_AWFORD_MASK, v) v 111 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_DFEN(v) FIELD_PREP(DFSDM_CR1_DFEN_MASK, v) v 113 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_JSWSTART(v) FIELD_PREP(DFSDM_CR1_JSWSTART_MASK, v) v 115 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_JSYNC(v) FIELD_PREP(DFSDM_CR1_JSYNC_MASK, v) v 117 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_JSCAN(v) FIELD_PREP(DFSDM_CR1_JSCAN_MASK, v) v 119 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_JDMAEN(v) FIELD_PREP(DFSDM_CR1_JDMAEN_MASK, v) v 121 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_JEXTSEL(v) FIELD_PREP(DFSDM_CR1_JEXTSEL_MASK, v) v 123 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_JEXTEN(v) FIELD_PREP(DFSDM_CR1_JEXTEN_MASK, v) v 125 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_RSWSTART(v) FIELD_PREP(DFSDM_CR1_RSWSTART_MASK, v) v 127 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_RCONT(v) FIELD_PREP(DFSDM_CR1_RCONT_MASK, v) v 129 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_RSYNC(v) FIELD_PREP(DFSDM_CR1_RSYNC_MASK, v) v 131 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_RDMAEN(v) FIELD_PREP(DFSDM_CR1_RDMAEN_MASK, v) v 133 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_RCH(v) FIELD_PREP(DFSDM_CR1_RCH_MASK, v) v 135 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_FAST(v) FIELD_PREP(DFSDM_CR1_FAST_MASK, v) v 137 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR1_AWFSEL(v) FIELD_PREP(DFSDM_CR1_AWFSEL_MASK, v) v 141 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_IE(v) FIELD_PREP(DFSDM_CR2_IE_MASK, v) v 143 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_JEOCIE(v) FIELD_PREP(DFSDM_CR2_JEOCIE_MASK, v) v 145 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_REOCIE(v) FIELD_PREP(DFSDM_CR2_REOCIE_MASK, v) v 147 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_JOVRIE(v) FIELD_PREP(DFSDM_CR2_JOVRIE_MASK, v) v 149 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_ROVRIE(v) FIELD_PREP(DFSDM_CR2_ROVRIE_MASK, v) v 151 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_AWDIE(v) FIELD_PREP(DFSDM_CR2_AWDIE_MASK, v) v 153 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_SCDIE(v) FIELD_PREP(DFSDM_CR2_SCDIE_MASK, v) v 155 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_CKABIE(v) FIELD_PREP(DFSDM_CR2_CKABIE_MASK, v) v 157 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_EXCH(v) FIELD_PREP(DFSDM_CR2_EXCH_MASK, v) v 159 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_CR2_AWDCH(v) FIELD_PREP(DFSDM_CR2_AWDCH_MASK, v) v 163 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_JEOCF(v) FIELD_PREP(DFSDM_ISR_JEOCF_MASK, v) v 165 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_REOCF(v) FIELD_PREP(DFSDM_ISR_REOCF_MASK, v) v 167 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_JOVRF(v) FIELD_PREP(DFSDM_ISR_JOVRF_MASK, v) v 169 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_ROVRF(v) FIELD_PREP(DFSDM_ISR_ROVRF_MASK, v) v 171 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_AWDF(v) FIELD_PREP(DFSDM_ISR_AWDF_MASK, v) v 173 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_JCIP(v) FIELD_PREP(DFSDM_ISR_JCIP_MASK, v) v 175 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_RCIP(v) FIELD_PREP(DFSDM_ISR_RCIP, v) v 177 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_CKABF(v) FIELD_PREP(DFSDM_ISR_CKABF_MASK, v) v 179 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ISR_SCDF(v) FIELD_PREP(DFSDM_ISR_SCDF_MASK, v) v 183 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ICR_CLRJOVRF(v) FIELD_PREP(DFSDM_ICR_CLRJOVRF_MASK, v) v 185 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ICR_CLRROVRF(v) FIELD_PREP(DFSDM_ICR_CLRROVRF_MASK, v) v 187 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ICR_CLRCKABF(v) FIELD_PREP(DFSDM_ICR_CLRCKABF_MASK, v) v 189 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ICR_CLRCKABF_CH(v, y) \ v 190 drivers/iio/adc/stm32-dfsdm.h (((v) << (16 + (y))) & DFSDM_ICR_CLRCKABF_CH_MASK(y)) v 192 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ICR_CLRSCDF(v) FIELD_PREP(DFSDM_ICR_CLRSCDF_MASK, v) v 194 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_ICR_CLRSCDF_CH(v, y) \ v 195 drivers/iio/adc/stm32-dfsdm.h (((v) << (24 + (y))) & DFSDM_ICR_CLRSCDF_MASK(y)) v 199 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_FCR_IOSR(v) FIELD_PREP(DFSDM_FCR_IOSR_MASK, v) v 201 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_FCR_FOSR(v) FIELD_PREP(DFSDM_FCR_FOSR_MASK, v) v 203 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_FCR_FORD(v) FIELD_PREP(DFSDM_FCR_FORD_MASK, v) v 212 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWLTR_BKAWL(v) FIELD_PREP(DFSDM_AWLTR_BKAWL_MASK, v) v 214 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWLTR_AWLT(v) FIELD_PREP(DFSDM_AWLTR_AWLT_MASK, v) v 218 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWHTR_BKAWH(v) FIELD_PREP(DFSDM_AWHTR_BKAWH_MASK, v) v 220 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWHTR_AWHT(v) FIELD_PREP(DFSDM_AWHTR_AWHT_MASK, v) v 224 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWSR_AWLTF(v) FIELD_PREP(DFSDM_AWSR_AWLTF_MASK, v) v 226 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWSR_AWHTF(v) FIELD_PREP(DFSDM_AWSR_AWHTF_MASK, v) v 230 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWCFR_AWLTF(v) FIELD_PREP(DFSDM_AWCFR_AWLTF_MASK, v) v 232 drivers/iio/adc/stm32-dfsdm.h #define DFSDM_AWCFR_AWHTF(v) FIELD_PREP(DFSDM_AWCFR_AWHTF_MASK, v) v 1830 drivers/infiniband/core/nldev.c u64 v; v 1887 drivers/infiniband/core/nldev.c v = stats->value[i] + v 1889 drivers/infiniband/core/nldev.c if (fill_stat_hwcounter_entry(msg, stats->names[i], v)) { v 817 drivers/infiniband/core/sysfs.c u64 v = rdma_counter_get_hwstat_value(dev, port_num, index); v 819 drivers/infiniband/core/sysfs.c return sprintf(buf, "%llu\n", stats->value[index] + v); v 154 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h (!!((hdr)->v & CREQ_BASE_V) == \ v 805 drivers/infiniband/hw/bnxt_re/roce_hsi.h __le32 v; v 824 drivers/infiniband/hw/bnxt_re/roce_hsi.h __le32 v; v 851 drivers/infiniband/hw/bnxt_re/roce_hsi.h __le32 v; v 1969 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 1986 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2018 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2069 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2089 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2109 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2143 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2242 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2262 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2286 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2321 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2341 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2367 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2387 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2407 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2428 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2448 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2469 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2489 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2509 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2529 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2581 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2601 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2621 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2641 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2661 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2681 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2701 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2721 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2779 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2799 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2822 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2846 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2866 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2915 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 2995 drivers/infiniband/hw/bnxt_re/roce_hsi.h u8 v; v 3835 drivers/infiniband/hw/cxgb4/cm.c u32 v; v 3840 drivers/infiniband/hw/cxgb4/cm.c v = (t >> shift) & mask; v 3841 drivers/infiniband/hw/cxgb4/cm.c return v; v 122 drivers/infiniband/hw/cxgb4/device.c static int wr_log_show(struct seq_file *seq, void *v) v 469 drivers/infiniband/hw/cxgb4/device.c static int stats_show(struct seq_file *seq, void *v) v 107 drivers/infiniband/hw/hfi1/debugfs.c static void *_opcode_stats_seq_next(struct seq_file *s, void *v, loff_t *pos) v 117 drivers/infiniband/hw/hfi1/debugfs.c static void _opcode_stats_seq_stop(struct seq_file *s, void *v) v 132 drivers/infiniband/hw/hfi1/debugfs.c static int _opcode_stats_seq_show(struct seq_file *s, void *v) v 134 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 161 drivers/infiniband/hw/hfi1/debugfs.c static void *_tx_opcode_stats_seq_next(struct seq_file *s, void *v, loff_t *pos) v 163 drivers/infiniband/hw/hfi1/debugfs.c return _opcode_stats_seq_next(s, v, pos); v 166 drivers/infiniband/hw/hfi1/debugfs.c static void _tx_opcode_stats_seq_stop(struct seq_file *s, void *v) v 170 drivers/infiniband/hw/hfi1/debugfs.c static int _tx_opcode_stats_seq_show(struct seq_file *s, void *v) v 172 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 204 drivers/infiniband/hw/hfi1/debugfs.c static void *_ctx_stats_seq_next(struct seq_file *s, void *v, loff_t *pos) v 209 drivers/infiniband/hw/hfi1/debugfs.c if (v == SEQ_START_TOKEN) v 218 drivers/infiniband/hw/hfi1/debugfs.c static void _ctx_stats_seq_stop(struct seq_file *s, void *v) v 223 drivers/infiniband/hw/hfi1/debugfs.c static int _ctx_stats_seq_show(struct seq_file *s, void *v) v 232 drivers/infiniband/hw/hfi1/debugfs.c if (v == SEQ_START_TOKEN) { v 237 drivers/infiniband/hw/hfi1/debugfs.c spos = v; v 334 drivers/infiniband/hw/hfi1/debugfs.c static void *_sdes_seq_next(struct seq_file *s, void *v, loff_t *pos) v 345 drivers/infiniband/hw/hfi1/debugfs.c static void _sdes_seq_stop(struct seq_file *s, void *v) v 349 drivers/infiniband/hw/hfi1/debugfs.c static int _sdes_seq_show(struct seq_file *s, void *v) v 353 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 376 drivers/infiniband/hw/hfi1/debugfs.c static void *_rcds_seq_next(struct seq_file *s, void *v, loff_t *pos) v 387 drivers/infiniband/hw/hfi1/debugfs.c static void _rcds_seq_stop(struct seq_file *s, void *v) v 391 drivers/infiniband/hw/hfi1/debugfs.c static int _rcds_seq_show(struct seq_file *s, void *v) v 396 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 422 drivers/infiniband/hw/hfi1/debugfs.c static void *_pios_seq_next(struct seq_file *s, void *v, loff_t *pos) v 433 drivers/infiniband/hw/hfi1/debugfs.c static void _pios_seq_stop(struct seq_file *s, void *v) v 437 drivers/infiniband/hw/hfi1/debugfs.c static int _pios_seq_show(struct seq_file *s, void *v) v 442 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 1208 drivers/infiniband/hw/hfi1/debugfs.c static void *_sdma_cpu_list_seq_next(struct seq_file *s, void *v, loff_t *pos) v 1217 drivers/infiniband/hw/hfi1/debugfs.c static void _sdma_cpu_list_seq_stop(struct seq_file *s, void *v) v 1222 drivers/infiniband/hw/hfi1/debugfs.c static int _sdma_cpu_list_seq_show(struct seq_file *s, void *v) v 1226 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 1332 drivers/infiniband/hw/hfi1/debugfs.c void *v, v 1341 drivers/infiniband/hw/hfi1/debugfs.c static void _driver_stats_names_seq_stop(struct seq_file *s, void *v) v 1345 drivers/infiniband/hw/hfi1/debugfs.c static int _driver_stats_names_seq_show(struct seq_file *s, void *v) v 1347 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 1364 drivers/infiniband/hw/hfi1/debugfs.c static void *_driver_stats_seq_next(struct seq_file *s, void *v, loff_t *pos) v 1372 drivers/infiniband/hw/hfi1/debugfs.c static void _driver_stats_seq_stop(struct seq_file *s, void *v) v 1390 drivers/infiniband/hw/hfi1/debugfs.c static int _driver_stats_seq_show(struct seq_file *s, void *v) v 1392 drivers/infiniband/hw/hfi1/debugfs.c loff_t *spos = v; v 71 drivers/infiniband/hw/hfi1/fault.c static void *_fault_stats_seq_next(struct seq_file *s, void *v, loff_t *pos) v 81 drivers/infiniband/hw/hfi1/fault.c static void _fault_stats_seq_stop(struct seq_file *s, void *v) v 85 drivers/infiniband/hw/hfi1/fault.c static int _fault_stats_seq_show(struct seq_file *s, void *v) v 87 drivers/infiniband/hw/hfi1/fault.c loff_t *spos = v; v 931 drivers/infiniband/hw/hfi1/qp.c static void hfi1_qp_iter_cb(struct rvt_qp *qp, u64 v) v 938 drivers/infiniband/hw/hfi1/qp.c u8 sl = (u8)v; v 163 drivers/infiniband/hw/mthca/mthca_reset.c u32 v; v 167 drivers/infiniband/hw/mthca/mthca_reset.c if (pci_read_config_dword(bridge ? bridge : mdev->pdev, 0, &v)) { v 174 drivers/infiniband/hw/mthca/mthca_reset.c if (v != 0xffffffff) v 78 drivers/infiniband/hw/qib/qib_debugfs.c static void *_opcode_stats_seq_next(struct seq_file *s, void *v, loff_t *pos) v 89 drivers/infiniband/hw/qib/qib_debugfs.c static void _opcode_stats_seq_stop(struct seq_file *s, void *v) v 94 drivers/infiniband/hw/qib/qib_debugfs.c static int _opcode_stats_seq_show(struct seq_file *s, void *v) v 96 drivers/infiniband/hw/qib/qib_debugfs.c loff_t *spos = v; v 131 drivers/infiniband/hw/qib/qib_debugfs.c static void *_ctx_stats_seq_next(struct seq_file *s, void *v, loff_t *pos) v 136 drivers/infiniband/hw/qib/qib_debugfs.c if (v == SEQ_START_TOKEN) v 145 drivers/infiniband/hw/qib/qib_debugfs.c static void _ctx_stats_seq_stop(struct seq_file *s, void *v) v 150 drivers/infiniband/hw/qib/qib_debugfs.c static int _ctx_stats_seq_show(struct seq_file *s, void *v) v 158 drivers/infiniband/hw/qib/qib_debugfs.c if (v == SEQ_START_TOKEN) { v 163 drivers/infiniband/hw/qib/qib_debugfs.c spos = v; v 2257 drivers/infiniband/hw/qib/qib_iba6120.c u32 v; v 2264 drivers/infiniband/hw/qib/qib_iba6120.c v = qib_read_kreg32(dd, kr_scratch); v 2265 drivers/infiniband/hw/qib/qib_iba6120.c qib_write_kreg(dd, kr_scratch, v); v 2266 drivers/infiniband/hw/qib/qib_iba6120.c v = qib_read_kreg32(dd, kr_scratch); v 2267 drivers/infiniband/hw/qib/qib_iba6120.c qib_write_kreg(dd, kr_scratch, v); v 2882 drivers/infiniband/hw/qib/qib_iba7220.c u32 v; v 2889 drivers/infiniband/hw/qib/qib_iba7220.c v = qib_read_kreg32(dd, kr_scratch); v 2890 drivers/infiniband/hw/qib/qib_iba7220.c qib_write_kreg(dd, kr_scratch, v); v 2891 drivers/infiniband/hw/qib/qib_iba7220.c v = qib_read_kreg32(dd, kr_scratch); v 2892 drivers/infiniband/hw/qib/qib_iba7220.c qib_write_kreg(dd, kr_scratch, v); v 4707 drivers/infiniband/hw/qib/qib_iba7322.c u32 v; v 4714 drivers/infiniband/hw/qib/qib_iba7322.c v = qib_read_kreg32(dd, kr_scratch); v 4715 drivers/infiniband/hw/qib/qib_iba7322.c qib_write_kreg(dd, kr_scratch, v); v 4716 drivers/infiniband/hw/qib/qib_iba7322.c v = qib_read_kreg32(dd, kr_scratch); v 4717 drivers/infiniband/hw/qib/qib_iba7322.c qib_write_kreg(dd, kr_scratch, v); v 7626 drivers/infiniband/hw/qib/qib_iba7322.c const struct vendor_txdds_ent *v = vendor_txdds + idx; v 7628 drivers/infiniband/hw/qib/qib_iba7322.c if (!memcmp(v->oui, qd->oui, QSFP_VOUI_LEN) && v 7629 drivers/infiniband/hw/qib/qib_iba7322.c (!v->partnum || v 7630 drivers/infiniband/hw/qib/qib_iba7322.c !memcmp(v->partnum, qd->partnum, QSFP_PN_LEN))) { v 7631 drivers/infiniband/hw/qib/qib_iba7322.c *sdr_dds = &v->sdr; v 7632 drivers/infiniband/hw/qib/qib_iba7322.c *ddr_dds = &v->ddr; v 7633 drivers/infiniband/hw/qib/qib_iba7322.c *qdr_dds = &v->qdr; v 561 drivers/infiniband/hw/qib/qib_mad.c u32 v; v 563 drivers/infiniband/hw/qib/qib_mad.c v = dd->f_get_ib_cfg(ppd, QIB_IB_CFG_LINKLATENCY); v 564 drivers/infiniband/hw/qib/qib_mad.c pip->link_roundtrip_latency[0] = v >> 16; v 565 drivers/infiniband/hw/qib/qib_mad.c pip->link_roundtrip_latency[1] = v >> 8; v 566 drivers/infiniband/hw/qib/qib_mad.c pip->link_roundtrip_latency[2] = v; v 445 drivers/infiniband/hw/qib/qib_verbs.c u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE); v 452 drivers/infiniband/hw/qib/qib_verbs.c data |= set_upper_bits(v, extra * v 465 drivers/infiniband/hw/qib/qib_verbs.c data |= clear_upper_bytes(v, len, extra); v 480 drivers/infiniband/hw/qib/qib_verbs.c u32 v = *addr; v 482 drivers/infiniband/hw/qib/qib_verbs.c data |= set_upper_bits(v, shift); v 484 drivers/infiniband/hw/qib/qib_verbs.c data = get_upper_bits(v, ushift); v 493 drivers/infiniband/hw/qib/qib_verbs.c u32 v = *addr; v 496 drivers/infiniband/hw/qib/qib_verbs.c data |= set_upper_bits(v, shift); v 508 drivers/infiniband/hw/qib/qib_verbs.c data |= clear_upper_bytes(v, l, extra); v 539 drivers/infiniband/hw/qib/qib_verbs.c u32 v = ((u32 *) ss->sge.vaddr)[w]; v 542 drivers/infiniband/hw/qib/qib_verbs.c data = clear_upper_bytes(v, extra, 0); v 451 drivers/infiniband/sw/rdmavt/mr.c static void rvt_dereg_clean_qp_cb(struct rvt_qp *qp, u64 v) v 453 drivers/infiniband/sw/rdmavt/mr.c struct rvt_mregion *mr = (struct rvt_mregion *)v; v 464 drivers/infiniband/sw/rdmavt/qp.c static void rvt_free_qp_cb(struct rvt_qp *qp, u64 v) v 466 drivers/infiniband/sw/rdmavt/qp.c unsigned int *qp_inuse = (unsigned int *)v; v 2712 drivers/infiniband/sw/rdmavt/qp.c u64 v, v 2713 drivers/infiniband/sw/rdmavt/qp.c void (*cb)(struct rvt_qp *qp, u64 v)) v 2724 drivers/infiniband/sw/rdmavt/qp.c i->v = v; v 2811 drivers/infiniband/sw/rdmavt/qp.c u64 v, v 2812 drivers/infiniband/sw/rdmavt/qp.c void (*cb)(struct rvt_qp *qp, u64 v)) v 2818 drivers/infiniband/sw/rdmavt/qp.c .v = v, v 2828 drivers/infiniband/sw/rdmavt/qp.c i.cb(i.qp, i.v); v 63 drivers/infiniband/sw/rdmavt/trace_mr.h TP_PROTO(struct rvt_mregion *mr, u16 m, u16 n, void *v, size_t len), v 64 drivers/infiniband/sw/rdmavt/trace_mr.h TP_ARGS(mr, m, n, v, len), v 80 drivers/infiniband/sw/rdmavt/trace_mr.h __entry->vaddr = v; v 81 drivers/infiniband/sw/rdmavt/trace_mr.h __entry->page = virt_to_page(v); v 109 drivers/infiniband/sw/rdmavt/trace_mr.h TP_PROTO(struct rvt_mregion *mr, u16 m, u16 n, void *v, size_t len), v 110 drivers/infiniband/sw/rdmavt/trace_mr.h TP_ARGS(mr, m, n, v, len)); v 114 drivers/infiniband/sw/rdmavt/trace_mr.h TP_PROTO(struct rvt_mregion *mr, u16 m, u16 n, void *v, size_t len), v 115 drivers/infiniband/sw/rdmavt/trace_mr.h TP_ARGS(mr, m, n, v, len)); v 119 drivers/infiniband/sw/rdmavt/trace_mr.h TP_PROTO(struct rvt_mregion *mr, u16 m, u16 n, void *v, size_t len), v 120 drivers/infiniband/sw/rdmavt/trace_mr.h TP_ARGS(mr, m, n, v, len)); v 249 drivers/input/evdev.c const struct input_value *v; v 264 drivers/input/evdev.c for (v = vals; v != vals + count; v++) { v 265 drivers/input/evdev.c if (__evdev_is_filtered(client, v->type, v->code)) v 268 drivers/input/evdev.c if (v->type == EV_SYN && v->code == SYN_REPORT) { v 276 drivers/input/evdev.c event.type = v->type; v 277 drivers/input/evdev.c event.code = v->code; v 278 drivers/input/evdev.c event.value = v->value; v 1038 drivers/input/evdev.c unsigned int i, t, u, v; v 1067 drivers/input/evdev.c if (get_user(v, ip + 1)) v 1071 drivers/input/evdev.c input_inject_event(&evdev->handle, EV_REP, REP_PERIOD, v); v 51 drivers/input/gameport/ns558.c unsigned char c, u, v; v 69 drivers/input/gameport/ns558.c if (~(u = v = inb(io)) & 3) { v 78 drivers/input/gameport/ns558.c for (i = 0; i < 1000; i++) v &= inb(io); v 80 drivers/input/gameport/ns558.c if (u == v) { v 98 drivers/input/input.c struct input_value *v; v 101 drivers/input/input.c for (v = vals; v != vals + count; v++) { v 102 drivers/input/input.c if (handler->filter(handle, v->type, v->code, v->value)) v 104 drivers/input/input.c if (end != v) v 105 drivers/input/input.c *end = *v; v 117 drivers/input/input.c for (v = vals; v != vals + count; v++) v 118 drivers/input/input.c handler->event(handle, v->type, v->code, v->value); v 132 drivers/input/input.c struct input_value *v; v 155 drivers/input/input.c for (v = vals; v != vals + count; v++) { v 156 drivers/input/input.c if (v->type == EV_KEY && v->value != 2) { v 157 drivers/input/input.c if (v->value) v 158 drivers/input/input.c input_start_autorepeat(dev, v->code); v 382 drivers/input/input.c struct input_value *v; v 385 drivers/input/input.c v = &dev->vals[dev->num_vals++]; v 386 drivers/input/input.c v->type = EV_ABS; v 387 drivers/input/input.c v->code = ABS_MT_SLOT; v 388 drivers/input/input.c v->value = dev->mt->slot; v 391 drivers/input/input.c v = &dev->vals[dev->num_vals++]; v 392 drivers/input/input.c v->type = type; v 393 drivers/input/input.c v->code = code; v 394 drivers/input/input.c v->value = value; v 1124 drivers/input/input.c static void *input_devices_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1126 drivers/input/input.c return seq_list_next(v, &input_dev_list, pos); v 1129 drivers/input/input.c static void input_seq_stop(struct seq_file *seq, void *v) v 1163 drivers/input/input.c static int input_devices_seq_show(struct seq_file *seq, void *v) v 1165 drivers/input/input.c struct input_dev *dev = container_of(v, struct input_dev, node); v 1249 drivers/input/input.c static void *input_handlers_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1254 drivers/input/input.c return seq_list_next(v, &input_handler_list, pos); v 1257 drivers/input/input.c static int input_handlers_seq_show(struct seq_file *seq, void *v) v 1259 drivers/input/input.c struct input_handler *handler = container_of(v, struct input_handler, node); v 58 drivers/input/joystick/a3d.c unsigned char u, v; v 68 drivers/input/joystick/a3d.c v = gameport_read(gameport); v 72 drivers/input/joystick/a3d.c u = v; v = gameport_read(gameport); v 73 drivers/input/joystick/a3d.c if (~v & u & 0x10) { v 74 drivers/input/joystick/a3d.c data[i++] = v >> 5; v 126 drivers/input/joystick/adi.c unsigned char u, v, w, x, z; v 139 drivers/input/joystick/adi.c v = z = gameport_read(gameport); v 142 drivers/input/joystick/adi.c u = v; v 143 drivers/input/joystick/adi.c w = u ^ (v = x = gameport_read(gameport)); v 448 drivers/input/joystick/analog.c int i, j, t, v, w, x, y, z; v 483 drivers/input/joystick/analog.c v = (x >> 3); v 491 drivers/input/joystick/analog.c v = x - (x >> 2); v 495 drivers/input/joystick/analog.c input_set_abs_params(input_dev, t, v, (x << 1) - v, port->fuzz, w); v 600 drivers/input/joystick/analog.c int i, t, u, v; v 622 drivers/input/joystick/analog.c u = v = 0; v 632 drivers/input/joystick/analog.c while ((gameport_read(port->gameport) & port->mask) && (v < t)) v 633 drivers/input/joystick/analog.c v++; v 635 drivers/input/joystick/analog.c if (v < (u >> 1)) { /* FIXME - more than one port */ v 43 drivers/input/joystick/cobra.c unsigned char u, v, w; v 61 drivers/input/joystick/cobra.c v = gameport_read(gameport); v 62 drivers/input/joystick/cobra.c for (i = 0, w = u ^ v; i < 2 && w; i++, w >>= 2) v 67 drivers/input/joystick/cobra.c u = v; v 80 drivers/input/joystick/gf2k.c unsigned char u, v; v 93 drivers/input/joystick/gf2k.c v = gameport_read(gameport); v 96 drivers/input/joystick/gf2k.c t--; u = v; v 97 drivers/input/joystick/gf2k.c v = gameport_read(gameport); v 98 drivers/input/joystick/gf2k.c if (v & ~u & 0x10) { v 99 drivers/input/joystick/gf2k.c data[i++] = v >> 5; v 71 drivers/input/joystick/grip.c unsigned char u, v; v 83 drivers/input/joystick/grip.c v = gameport_read(gameport) >> shift; v 87 drivers/input/joystick/grip.c u = v; v = (gameport_read(gameport) >> shift) & 3; v 88 drivers/input/joystick/grip.c if (~v & u & 1) { v 89 drivers/input/joystick/grip.c data[0] |= (v >> 1) << i++; v 111 drivers/input/joystick/grip.c unsigned char u, v, w; v 124 drivers/input/joystick/grip.c v = w = (gameport_read(gameport) >> shift) & 3; v 130 drivers/input/joystick/grip.c if (u ^ v) { v 132 drivers/input/joystick/grip.c if ((u ^ v) & 1) { v 138 drivers/input/joystick/grip.c if ((((u ^ v) & (v ^ w)) >> 1) & ~(u | v | w) & 1) { v 151 drivers/input/joystick/grip.c w = v; v 152 drivers/input/joystick/grip.c v = u; v 71 drivers/input/joystick/guillemot.c unsigned char u, v; v 84 drivers/input/joystick/guillemot.c v = gameport_read(gameport); v 88 drivers/input/joystick/guillemot.c u = v; v = gameport_read(gameport); v 89 drivers/input/joystick/guillemot.c if (v & ~u & 0x10) { v 90 drivers/input/joystick/guillemot.c data[i >> 3] |= ((v >> 5) & 1) << (i & 7); v 78 drivers/input/joystick/interact.c unsigned char u, v; v 89 drivers/input/joystick/interact.c v = gameport_read(gameport); v 93 drivers/input/joystick/interact.c u = v; v = gameport_read(gameport); v 94 drivers/input/joystick/interact.c if (v & ~u & 0x40) { v 95 drivers/input/joystick/interact.c data[0] = (data[0] << 1) | ((v >> 4) & 1); v 96 drivers/input/joystick/interact.c data[1] = (data[1] << 1) | ((v >> 5) & 1); v 97 drivers/input/joystick/interact.c data[2] = (data[2] << 1) | ((v >> 7) & 1); v 123 drivers/input/joystick/sidewinder.c unsigned char pending, u, v; v 137 drivers/input/joystick/sidewinder.c v = gameport_read(gameport); v 141 drivers/input/joystick/sidewinder.c u = v; v 142 drivers/input/joystick/sidewinder.c v = gameport_read(gameport); v 143 drivers/input/joystick/sidewinder.c } while (!(~v & u & 0x10) && (bitout > 0)); /* Wait for first falling edge on clock */ v 154 drivers/input/joystick/sidewinder.c u = v; v 155 drivers/input/joystick/sidewinder.c v = gameport_read(gameport); v 157 drivers/input/joystick/sidewinder.c if ((~u & v & 0x10) && (bitout > 0)) { /* Rising edge on clock - data bit */ v 159 drivers/input/joystick/sidewinder.c buf[i] = v >> 5; /* Store it */ v 164 drivers/input/joystick/sidewinder.c if (kick && (~v & u & 0x01)) { /* Falling edge on axis 0 */ v 132 drivers/input/joystick/tmdc.c unsigned char u, v, w, x; v 152 drivers/input/joystick/tmdc.c for (k = 0, v = w, u = x; k < 2; k++, v >>= 2, u >>= 2) { v 153 drivers/input/joystick/tmdc.c if (~v & u & 2) { v 157 drivers/input/joystick/tmdc.c if (~v & 1) t[k] = 0; v 161 drivers/input/joystick/tmdc.c if (v & 1) t[k] = 0; v 164 drivers/input/joystick/tmdc.c data[k][i[k]] |= (~v & 1) << (j[k]++ - 1); /* Data bit */ v 48 drivers/input/keyboard/hilkbd.c #define hil_writeb(v,p) gsc_writeb((v),(p)) v 57 drivers/input/keyboard/hilkbd.c #define hil_writeb(v, p) writeb((v), (volatile void __iomem *)(p)) v 89 drivers/input/keyboard/lm8323.c #define PWM_SET(v) (0x4000 | ((v) & 0xff)) v 91 drivers/input/keyboard/pxa27x_keypad.c #define keypad_writel(off, v) __raw_writel((v), keypad->mmio_base + (off)) v 431 drivers/input/misc/hp_sdc_rtc.c static int hp_sdc_rtc_proc_show(struct seq_file *m, void *v) v 62 drivers/input/misc/mma8450.c static int mma8450_write(struct mma8450 *m, unsigned off, u8 v) v 67 drivers/input/misc/mma8450.c error = i2c_smbus_write_byte_data(c, off, v); v 76 drivers/input/mouse/pxa930_trkball.c static int write_tbcr(struct pxa930_trkball *trkball, int v) v 80 drivers/input/mouse/pxa930_trkball.c __raw_writel(v, trkball->mmio_base + TBCR); v 83 drivers/input/mouse/pxa930_trkball.c if (__raw_readl(trkball->mmio_base + TBCR) == v) v 89 drivers/input/mouse/pxa930_trkball.c pr_err("%s: timed out writing TBCR(%x)!\n", __func__, v); v 131 drivers/input/mouse/sentelic.c unsigned char v; v 139 drivers/input/mouse/sentelic.c if ((v = fsp_test_invert_cmd(reg_addr)) != reg_addr) { v 143 drivers/input/mouse/sentelic.c if ((v = fsp_test_swap_cmd(reg_addr)) != reg_addr) { v 152 drivers/input/mouse/sentelic.c ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2); v 157 drivers/input/mouse/sentelic.c if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { v 160 drivers/input/mouse/sentelic.c } else if ((v = fsp_test_swap_cmd(reg_val)) != reg_val) { v 169 drivers/input/mouse/sentelic.c ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2); v 183 drivers/input/mouse/sentelic.c int v, nv; v 185 drivers/input/mouse/sentelic.c if (fsp_reg_read(psmouse, FSP_REG_SYSCTL1, &v) == -1) v 189 drivers/input/mouse/sentelic.c nv = v | FSP_BIT_EN_REG_CLK; v 191 drivers/input/mouse/sentelic.c nv = v & ~FSP_BIT_EN_REG_CLK; v 194 drivers/input/mouse/sentelic.c if (nv != v) v 242 drivers/input/mouse/sentelic.c unsigned char v; v 256 drivers/input/mouse/sentelic.c if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { v 258 drivers/input/mouse/sentelic.c } else if ((v = fsp_test_swap_cmd(reg_val)) != reg_val) { v 266 drivers/input/mouse/sentelic.c ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2); v 334 drivers/input/mouse/sentelic.c int v, nv; v 337 drivers/input/mouse/sentelic.c if (fsp_reg_read(psmouse, FSP_REG_OPC_QDOWN, &v) == -1) { v 343 drivers/input/mouse/sentelic.c nv = v | FSP_BIT_EN_OPC_TAG; v 345 drivers/input/mouse/sentelic.c nv = v & ~FSP_BIT_EN_OPC_TAG; v 348 drivers/input/mouse/sentelic.c if (nv != v) { v 80 drivers/input/serio/hp_sdc.c # define sdc_writeb(v,p) gsc_writeb((v),(p)) v 84 drivers/input/serio/hp_sdc.c # define sdc_writeb(v,p) out_8((p),(v)) v 444 drivers/input/touchscreen/ad7877.c ssize_t v = ad7877_read_adc(ts->spi, \ v 446 drivers/input/touchscreen/ad7877.c if (v < 0) \ v 447 drivers/input/touchscreen/ad7877.c return v; \ v 448 drivers/input/touchscreen/ad7877.c return sprintf(buf, "%u\n", (unsigned) v); \ v 428 drivers/input/touchscreen/ads7846.c ssize_t v = ads7846_read12_ser(&ts->spi->dev, \ v 430 drivers/input/touchscreen/ads7846.c if (v < 0) \ v 431 drivers/input/touchscreen/ads7846.c return v; \ v 432 drivers/input/touchscreen/ads7846.c return sprintf(buf, "%u\n", adjust(ts, v)); \ v 442 drivers/input/touchscreen/ads7846.c static inline unsigned null_adjust(struct ads7846 *ts, ssize_t v) v 444 drivers/input/touchscreen/ads7846.c return v; v 455 drivers/input/touchscreen/ads7846.c static inline unsigned vaux_adjust(struct ads7846 *ts, ssize_t v) v 457 drivers/input/touchscreen/ads7846.c unsigned retval = v; v 466 drivers/input/touchscreen/ads7846.c static inline unsigned vbatt_adjust(struct ads7846 *ts, ssize_t v) v 468 drivers/input/touchscreen/ads7846.c unsigned retval = vaux_adjust(ts, v); v 56 drivers/input/touchscreen/da9052_tsi.c u8 v; v 80 drivers/input/touchscreen/da9052_tsi.c v = (u8) ret; v 82 drivers/input/touchscreen/da9052_tsi.c x = ((x << 2) & 0x3fc) | (v & 0x3); v 83 drivers/input/touchscreen/da9052_tsi.c y = ((y << 2) & 0x3fc) | ((v & 0xc) >> 2); v 84 drivers/input/touchscreen/da9052_tsi.c z = ((z << 2) & 0x3fc) | ((v & 0x30) >> 4); v 42 drivers/input/touchscreen/eeti_ts.c #define REPORT_RES_BITS(v) (((v) >> 1) + EETI_TS_BITDEPTH) v 214 drivers/input/touchscreen/melfas_mip4.c static void mip4_parse_fw_version(const u8 *buf, struct mip4_fw_version *v) v 216 drivers/input/touchscreen/melfas_mip4.c v->boot = get_unaligned_le16(buf + 0); v 217 drivers/input/touchscreen/melfas_mip4.c v->core = get_unaligned_le16(buf + 2); v 218 drivers/input/touchscreen/melfas_mip4.c v->app = get_unaligned_le16(buf + 4); v 219 drivers/input/touchscreen/melfas_mip4.c v->param = get_unaligned_le16(buf + 6); v 383 drivers/iommu/arm-smmu.h #define arm_smmu_gr0_write(s, o, v) \ v 384 drivers/iommu/arm-smmu.h arm_smmu_writel((s), ARM_SMMU_GR0, (o), (v)) v 388 drivers/iommu/arm-smmu.h #define arm_smmu_gr1_write(s, o, v) \ v 389 drivers/iommu/arm-smmu.h arm_smmu_writel((s), ARM_SMMU_GR1, (o), (v)) v 393 drivers/iommu/arm-smmu.h #define arm_smmu_cb_write(s, n, o, v) \ v 394 drivers/iommu/arm-smmu.h arm_smmu_writel((s), ARM_SMMU_CB((s), (n)), (o), (v)) v 397 drivers/iommu/arm-smmu.h #define arm_smmu_cb_writeq(s, n, o, v) \ v 398 drivers/iommu/arm-smmu.h arm_smmu_writeq((s), ARM_SMMU_CB((s), (n)), (o), (v)) v 18 drivers/iommu/fsl_pamu.h #define set_bf(v, m, x) (v = ((v) & ~(m)) | (((x) << m##_SHIFT) & (m))) v 19 drivers/iommu/fsl_pamu.h #define get_bf(v, m) (((v) & (m)) >> m##_SHIFT) v 4650 drivers/iommu/intel-iommu.c unsigned long val, void *v) v 4652 drivers/iommu/intel-iommu.c struct memory_notify *mhp = v; v 20 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_GLOBAL_REG_N(b, n, r, v) SET_GLOBAL_REG(b, ((r) + (n << 2)), (v)) v 28 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_GLOBAL_FIELD(b, r, F, v) \ v 29 drivers/iommu/msm_iommu_hw-8xxx.h SET_FIELD(((b) + (r)), F##_MASK, F##_SHIFT, (v)) v 30 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CONTEXT_FIELD(b, c, r, F, v) \ v 31 drivers/iommu/msm_iommu_hw-8xxx.h SET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT, (v)) v 35 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FIELD(addr, mask, shift, v) \ v 38 drivers/iommu/msm_iommu_hw-8xxx.h writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\ v 84 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_M2VCBR_N(b, N, v) SET_GLOBAL_REG_N(M2VCBR_N, N, (b), (v)) v 85 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CBACR_N(b, N, v) SET_GLOBAL_REG_N(CBACR_N, N, (b), (v)) v 86 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBRSW(b, v) SET_GLOBAL_REG(TLBRSW, (b), (v)) v 87 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR0(b, v) SET_GLOBAL_REG(TLBTR0, (b), (v)) v 88 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR1(b, v) SET_GLOBAL_REG(TLBTR1, (b), (v)) v 89 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR2(b, v) SET_GLOBAL_REG(TLBTR2, (b), (v)) v 90 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TESTBUSCR(b, v) SET_GLOBAL_REG(TESTBUSCR, (b), (v)) v 91 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_GLOBAL_TLBIALL(b, v) SET_GLOBAL_REG(GLOBAL_TLBIALL, (b), (v)) v 92 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIVMID(b, v) SET_GLOBAL_REG(TLBIVMID, (b), (v)) v 93 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CR(b, v) SET_GLOBAL_REG(CR, (b), (v)) v 94 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_EAR(b, v) SET_GLOBAL_REG(EAR, (b), (v)) v 95 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESR(b, v) SET_GLOBAL_REG(ESR, (b), (v)) v 96 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESRRESTORE(b, v) SET_GLOBAL_REG(ESRRESTORE, (b), (v)) v 97 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR0(b, v) SET_GLOBAL_REG(ESYNR0, (b), (v)) v 98 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1(b, v) SET_GLOBAL_REG(ESYNR1, (b), (v)) v 99 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RPU_ACR(b, v) SET_GLOBAL_REG(RPU_ACR, (b), (v)) v 121 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SCTLR(b, c, v) SET_CTX_REG(SCTLR, (b), (c), (v)) v 122 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ACTLR(b, c, v) SET_CTX_REG(ACTLR, (b), (c), (v)) v 123 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CONTEXTIDR(b, c, v) SET_CTX_REG(CONTEXTIDR, (b), (c), (v)) v 124 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR0(b, c, v) SET_CTX_REG(TTBR0, (b), (c), (v)) v 125 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR1(b, c, v) SET_CTX_REG(TTBR1, (b), (c), (v)) v 126 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBCR(b, c, v) SET_CTX_REG(TTBCR, (b), (c), (v)) v 127 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PAR(b, c, v) SET_CTX_REG(PAR, (b), (c), (v)) v 128 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FSR(b, c, v) SET_CTX_REG(FSR, (b), (c), (v)) v 129 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FSRRESTORE(b, c, v) SET_CTX_REG(FSRRESTORE, (b), (c), (v)) v 130 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAR(b, c, v) SET_CTX_REG(FAR, (b), (c), (v)) v 131 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FSYNR0(b, c, v) SET_CTX_REG(FSYNR0, (b), (c), (v)) v 132 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FSYNR1(b, c, v) SET_CTX_REG(FSYNR1, (b), (c), (v)) v 133 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PRRR(b, c, v) SET_CTX_REG(PRRR, (b), (c), (v)) v 134 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NMRR(b, c, v) SET_CTX_REG(NMRR, (b), (c), (v)) v 135 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBLKCR(b, c, v) SET_CTX_REG(TLBLCKR, (b), (c), (v)) v 136 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_V2PSR(b, c, v) SET_CTX_REG(V2PSR, (b), (c), (v)) v 137 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBFLPTER(b, c, v) SET_CTX_REG(TLBFLPTER, (b), (c), (v)) v 138 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBSLPTER(b, c, v) SET_CTX_REG(TLBSLPTER, (b), (c), (v)) v 139 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BFBCR(b, c, v) SET_CTX_REG(BFBCR, (b), (c), (v)) v 140 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CTX_TLBIALL(b, c, v) SET_CTX_REG(CTX_TLBIALL, (b), (c), (v)) v 141 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIASID(b, c, v) SET_CTX_REG(TLBIASID, (b), (c), (v)) v 142 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIVA(b, c, v) SET_CTX_REG(TLBIVA, (b), (c), (v)) v 143 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIVAA(b, c, v) SET_CTX_REG(TLBIVAA, (b), (c), (v)) v 144 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_V2PPR(b, c, v) SET_CTX_REG(V2PPR, (b), (c), (v)) v 145 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_V2PPW(b, c, v) SET_CTX_REG(V2PPW, (b), (c), (v)) v 146 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_V2PUR(b, c, v) SET_CTX_REG(V2PUR, (b), (c), (v)) v 147 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_V2PUW(b, c, v) SET_CTX_REG(V2PUW, (b), (c), (v)) v 148 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RESUME(b, c, v) SET_CTX_REG(RESUME, (b), (c), (v)) v 183 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RWVMID(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(CBACR_N), RWVMID, v) v 184 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RWE(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(CBACR_N), RWE, v) v 185 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RWGE(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(CBACR_N), RWGE, v) v 186 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CBVMID(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(CBACR_N), CBVMID, v) v 187 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_IRPTNDX(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(CBACR_N), IRPTNDX, v) v 191 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_VMID(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), VMID, v) v 192 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CBNDX(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), CBNDX, v) v 193 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BYPASSD(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), BYPASSD, v) v 194 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BPRCOSH(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), BPRCOSH, v) v 195 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BPRCISH(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), BPRCISH, v) v 196 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BPRCNSH(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), BPRCNSH, v) v 197 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BPSHCFG(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), BPSHCFG, v) v 198 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NSCFG(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), NSCFG, v) v 199 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BPMTCFG(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), BPMTCFG, v) v 200 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BPMEMTYPE(b, n, v) \ v 201 drivers/iommu/msm_iommu_hw-8xxx.h SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), BPMEMTYPE, v) v 205 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RPUE(b, v) SET_GLOBAL_FIELD(b, CR, RPUE, v) v 206 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RPUERE(b, v) SET_GLOBAL_FIELD(b, CR, RPUERE, v) v 207 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RPUEIE(b, v) SET_GLOBAL_FIELD(b, CR, RPUEIE, v) v 208 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_DCDEE(b, v) SET_GLOBAL_FIELD(b, CR, DCDEE, v) v 209 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, CR, CLIENTPD, v) v 210 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_STALLD(b, v) SET_GLOBAL_FIELD(b, CR, STALLD, v) v 211 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBLKCRWE(b, v) SET_GLOBAL_FIELD(b, CR, TLBLKCRWE, v) v 212 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CR_TLBIALLCFG(b, v) SET_GLOBAL_FIELD(b, CR, CR_TLBIALLCFG, v) v 213 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIVMIDCFG(b, v) SET_GLOBAL_FIELD(b, CR, TLBIVMIDCFG, v) v 214 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CR_HUME(b, v) SET_GLOBAL_FIELD(b, CR, CR_HUME, v) v 218 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CFG(b, v) SET_GLOBAL_FIELD(b, ESR, CFG, v) v 219 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BYPASS(b, v) SET_GLOBAL_FIELD(b, ESR, BYPASS, v) v 220 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESR_MULTI(b, v) SET_GLOBAL_FIELD(b, ESR, ESR_MULTI, v) v 224 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR0_AMID(b, v) SET_GLOBAL_FIELD(b, ESYNR0, ESYNR0_AMID, v) v 225 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR0_APID(b, v) SET_GLOBAL_FIELD(b, ESYNR0, ESYNR0_APID, v) v 226 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR0_ABID(b, v) SET_GLOBAL_FIELD(b, ESYNR0, ESYNR0_ABID, v) v 227 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR0_AVMID(b, v) SET_GLOBAL_FIELD(b, ESYNR0, ESYNR0_AVMID, v) v 228 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR0_ATID(b, v) SET_GLOBAL_FIELD(b, ESYNR0, ESYNR0_ATID, v) v 232 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_AMEMTYPE(b, v) \ v 233 drivers/iommu/msm_iommu_hw-8xxx.h SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_AMEMTYPE, v) v 234 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_ASHARED(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_ASHARED, v) v 235 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_AINNERSHARED(b, v) \ v 236 drivers/iommu/msm_iommu_hw-8xxx.h SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_AINNERSHARED, v) v 237 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_APRIV(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_APRIV, v) v 238 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_APROTNS(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_APROTNS, v) v 239 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_AINST(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_AINST, v) v 240 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_AWRITE(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_AWRITE, v) v 241 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_ABURST(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_ABURST, v) v 242 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_ALEN(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_ALEN, v) v 243 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_ASIZE(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_ASIZE, v) v 244 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_ALOCK(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_ALOCK, v) v 245 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_AOOO(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_AOOO, v) v 246 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_AFULL(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_AFULL, v) v 247 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_AC(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_AC, v) v 248 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ESYNR1_DCD(b, v) SET_GLOBAL_FIELD(b, ESYNR1, ESYNR1_DCD, v) v 252 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TBE(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, TBE, v) v 253 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SPDMBE(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, SPDMBE, v) v 254 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_WGSEL(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, WGSEL, v) v 255 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TBLSEL(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, TBLSEL, v) v 256 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TBHSEL(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, TBHSEL, v) v 257 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SPDM0SEL(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, SPDM0SEL, v) v 258 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SPDM1SEL(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, SPDM1SEL, v) v 259 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SPDM2SEL(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, SPDM2SEL, v) v 260 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SPDM3SEL(b, v) SET_GLOBAL_FIELD(b, TESTBUSCR, SPDM3SEL, v) v 264 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIVMID_VMID(b, v) SET_GLOBAL_FIELD(b, TLBIVMID, TLBIVMID_VMID, v) v 268 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBRSW_INDEX(b, v) SET_GLOBAL_FIELD(b, TLBRSW, TLBRSW_INDEX, v) v 269 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBBFBS(b, v) SET_GLOBAL_FIELD(b, TLBRSW, TLBBFBS, v) v 273 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PR(b, v) SET_GLOBAL_FIELD(b, TLBTR0, PR, v) v 274 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PW(b, v) SET_GLOBAL_FIELD(b, TLBTR0, PW, v) v 275 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_UR(b, v) SET_GLOBAL_FIELD(b, TLBTR0, UR, v) v 276 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_UW(b, v) SET_GLOBAL_FIELD(b, TLBTR0, UW, v) v 277 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_XN(b, v) SET_GLOBAL_FIELD(b, TLBTR0, XN, v) v 278 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NSDESC(b, v) SET_GLOBAL_FIELD(b, TLBTR0, NSDESC, v) v 279 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ISH(b, v) SET_GLOBAL_FIELD(b, TLBTR0, ISH, v) v 280 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SH(b, v) SET_GLOBAL_FIELD(b, TLBTR0, SH, v) v 281 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MT(b, v) SET_GLOBAL_FIELD(b, TLBTR0, MT, v) v 282 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_DPSIZR(b, v) SET_GLOBAL_FIELD(b, TLBTR0, DPSIZR, v) v 283 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_DPSIZC(b, v) SET_GLOBAL_FIELD(b, TLBTR0, DPSIZC, v) v 287 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR1_VMID(b, v) SET_GLOBAL_FIELD(b, TLBTR1, TLBTR1_VMID, v) v 288 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR1_PA(b, v) SET_GLOBAL_FIELD(b, TLBTR1, TLBTR1_PA, v) v 292 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR2_ASID(b, v) SET_GLOBAL_FIELD(b, TLBTR2, TLBTR2_ASID, v) v 293 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR2_V(b, v) SET_GLOBAL_FIELD(b, TLBTR2, TLBTR2_V, v) v 294 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR2_NSTID(b, v) SET_GLOBAL_FIELD(b, TLBTR2, TLBTR2_NSTID, v) v 295 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR2_NV(b, v) SET_GLOBAL_FIELD(b, TLBTR2, TLBTR2_NV, v) v 296 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBTR2_VA(b, v) SET_GLOBAL_FIELD(b, TLBTR2, TLBTR2_VA, v) v 427 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CFERE(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, CFERE, v) v 428 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CFEIE(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, CFEIE, v) v 429 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PTSHCFG(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, PTSHCFG, v) v 430 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RCOSH(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, RCOSH, v) v 431 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RCISH(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, RCISH, v) v 432 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_RCNSH(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, RCNSH, v) v 433 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PRIVCFG(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, PRIVCFG, v) v 434 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_DNA(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, DNA, v) v 435 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_DNLV2PA(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, DNLV2PA, v) v 436 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBMCFG(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, TLBMCFG, v) v 437 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CFCFG(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, CFCFG, v) v 438 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TIPCF(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, TIPCF, v) v 439 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_V2PCFG(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, V2PCFG, v) v 440 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_HUME(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, HUME, v) v 441 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PTMTCFG(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, PTMTCFG, v) v 442 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PTMEMTYPE(b, c, v) SET_CONTEXT_FIELD(b, c, ACTLR, PTMEMTYPE, v) v 446 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BFBDFE(b, c, v) SET_CONTEXT_FIELD(b, c, BFBCR, BFBDFE, v) v 447 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BFBSFE(b, c, v) SET_CONTEXT_FIELD(b, c, BFBCR, BFBSFE, v) v 448 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SFVS(b, c, v) SET_CONTEXT_FIELD(b, c, BFBCR, SFVS, v) v 449 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FLVIC(b, c, v) SET_CONTEXT_FIELD(b, c, BFBCR, FLVIC, v) v 450 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SLVIC(b, c, v) SET_CONTEXT_FIELD(b, c, BFBCR, SLVIC, v) v 454 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CONTEXTIDR_ASID(b, c, v) \ v 455 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, CONTEXTIDR, CONTEXTIDR_ASID, v) v 456 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_CONTEXTIDR_PROCID(b, c, v) \ v 457 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, CONTEXTIDR, PROCID, v) v 461 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, TF, v) v 462 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AFF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, AFF, v) v 463 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_APF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, APF, v) v 464 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBMF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, TLBMF, v) v 465 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_HTWDEEF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, HTWDEEF, v) v 466 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_HTWSEEF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, HTWSEEF, v) v 467 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MHF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, MHF, v) v 468 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SL(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, SL, v) v 469 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SS(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, SS, v) v 470 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MULTI(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, MULTI, v) v 474 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AMID(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR0, AMID, v) v 475 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_APID(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR0, APID, v) v 476 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ABID(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR0, ABID, v) v 477 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ATID(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR0, ATID, v) v 481 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AMEMTYPE(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, AMEMTYPE, v) v 482 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ASHARED(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, ASHARED, v) v 483 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AINNERSHARED(b, c, v) \ v 484 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, FSYNR1, AINNERSHARED, v) v 485 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_APRIV(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, APRIV, v) v 486 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_APROTNS(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, APROTNS, v) v 487 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AINST(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, AINST, v) v 488 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AWRITE(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, AWRITE, v) v 489 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ABURST(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, ABURST, v) v 490 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ALEN(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, ALEN, v) v 491 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FSYNR1_ASIZE(b, c, v) \ v 492 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, FSYNR1, FSYNR1_ASIZE, v) v 493 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ALOCK(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, ALOCK, v) v 494 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AFULL(b, c, v) SET_CONTEXT_FIELD(b, c, FSYNR1, AFULL, v) v 498 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC0(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC0, v) v 499 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC1(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC1, v) v 500 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC2(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC2, v) v 501 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC3(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC3, v) v 502 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC4(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC4, v) v 503 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC5(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC5, v) v 504 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC6(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC6, v) v 505 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_ICPC7(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, ICPC7, v) v 506 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC0(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC0, v) v 507 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC1(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC1, v) v 508 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC2(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC2, v) v 509 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC3(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC3, v) v 510 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC4(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC4, v) v 511 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC5(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC5, v) v 512 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC6(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC6, v) v 513 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_OCPC7(b, c, v) SET_CONTEXT_FIELD(b, c, NMRR, OCPC7, v) v 517 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT, v) v 519 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_TF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_TF, v) v 520 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_AFF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_AFF, v) v 521 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_APF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_APF, v) v 522 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_TLBMF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_TLBMF, v) v 523 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_HTWDEEF(b, c, v) \ v 524 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, PAR, FAULT_HTWDEEF, v) v 525 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_HTWSEEF(b, c, v) \ v 526 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, PAR, FAULT_HTWSEEF, v) v 527 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_MHF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_MHF, v) v 528 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_SL(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_SL, v) v 529 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FAULT_SS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_SS, v) v 531 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOFAULT_SS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_SS, v) v 532 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOFAULT_MT(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_MT, v) v 533 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOFAULT_SH(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_SH, v) v 534 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOFAULT_NS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_NS, v) v 535 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOFAULT_NOS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_NOS, v) v 536 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NPFAULT_PA(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NPFAULT_PA, v) v 540 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC0(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC0, v) v 541 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC1(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC1, v) v 542 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC2(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC2, v) v 543 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC3(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC3, v) v 544 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC4(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC4, v) v 545 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC5(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC5, v) v 546 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC6(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC6, v) v 547 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_MTC7(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, MTC7, v) v 548 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SHDSH0(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, SHDSH0, v) v 549 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SHDSH1(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, SHDSH1, v) v 550 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SHNMSH0(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, SHNMSH0, v) v 551 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_SHNMSH1(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, SHNMSH1, v) v 552 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS0(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS0, v) v 553 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS1(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS1, v) v 554 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS2(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS2, v) v 555 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS3(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS3, v) v 556 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS4(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS4, v) v 557 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS5(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS5, v) v 558 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS6(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS6, v) v 559 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_NOS7(b, c, v) SET_CONTEXT_FIELD(b, c, PRRR, NOS7, v) v 563 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TNR(b, c, v) SET_CONTEXT_FIELD(b, c, RESUME, TNR, v) v 567 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_M(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, M, v) v 568 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TRE(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, TRE, v) v 569 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AFE(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, AFE, v) v 570 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_HAF(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, HAF, v) v 571 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_BE(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, BE, v) v 572 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_AFFD(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, AFFD, v) v 576 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_LKE(b, c, v) SET_CONTEXT_FIELD(b, c, TLBLKCR, LKE, v) v 577 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBLKCR_TLBIALLCFG(b, c, v) \ v 578 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, TLBLKCR, TLBLCKR_TLBIALLCFG, v) v 579 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIASIDCFG(b, c, v) \ v 580 drivers/iommu/msm_iommu_hw-8xxx.h SET_CONTEXT_FIELD(b, c, TLBLKCR, TLBIASIDCFG, v) v 581 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TLBIVAACFG(b, c, v) SET_CONTEXT_FIELD(b, c, TLBLKCR, TLBIVAACFG, v) v 582 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_FLOOR(b, c, v) SET_CONTEXT_FIELD(b, c, TLBLKCR, FLOOR, v) v 583 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_VICTIM(b, c, v) SET_CONTEXT_FIELD(b, c, TLBLKCR, VICTIM, v) v 587 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_N(b, c, v) SET_CONTEXT_FIELD(b, c, TTBCR, N, v) v 588 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PD0(b, c, v) SET_CONTEXT_FIELD(b, c, TTBCR, PD0, v) v 589 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_PD1(b, c, v) SET_CONTEXT_FIELD(b, c, TTBCR, PD1, v) v 593 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR0_IRGNH(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR0, TTBR0_IRGNH, v) v 594 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR0_SH(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR0, TTBR0_SH, v) v 595 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR0_ORGN(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR0, TTBR0_ORGN, v) v 596 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR0_NOS(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR0, TTBR0_NOS, v) v 597 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR0_IRGNL(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR0, TTBR0_IRGNL, v) v 598 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR0_PA(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR0, TTBR0_PA, v) v 602 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR1_IRGNH(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR1, TTBR1_IRGNH, v) v 603 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR1_SH(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR1, TTBR1_SH, v) v 604 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR1_ORGN(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR1, TTBR1_ORGN, v) v 605 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR1_NOS(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR1, TTBR1_NOS, v) v 606 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR1_IRGNL(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR1, TTBR1_IRGNL, v) v 607 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TTBR1_PA(b, c, v) SET_CONTEXT_FIELD(b, c, TTBR1, TTBR1_PA, v) v 611 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_HIT(b, c, v) SET_CONTEXT_FIELD(b, c, V2PSR, HIT, v) v 612 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_INDEX(b, c, v) SET_CONTEXT_FIELD(b, c, V2PSR, INDEX, v) v 1179 drivers/irqchip/irq-gic-v3.c unsigned long cmd, void *v) v 734 drivers/irqchip/irq-gic.c static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v) v 674 drivers/irqchip/irq-mips-gic.c unsigned int cpu_vec, i, gicconfig, v[2], num_ipis; v 779 drivers/irqchip/irq-mips-gic.c !of_property_read_u32_array(node, "mti,reserved-ipi-vectors", v, 2)) { v 780 drivers/irqchip/irq-mips-gic.c bitmap_set(ipi_resrv, v[0], v[1]); v 67 drivers/irqchip/irq-vf610-mscm-ir.c unsigned long cmd, void *v) v 184 drivers/irqchip/irq-vic.c struct vic_device *v = d->host_data; v 187 drivers/irqchip/irq-vic.c if (!(v->valid_sources & (1 << hwirq))) v 190 drivers/irqchip/irq-vic.c irq_set_chip_data(irq, v->base); v 270 drivers/irqchip/irq-vic.c struct vic_device *v; v 278 drivers/irqchip/irq-vic.c v = &vic_devices[vic_id]; v 279 drivers/irqchip/irq-vic.c v->base = base; v 280 drivers/irqchip/irq-vic.c v->valid_sources = valid_sources; v 281 drivers/irqchip/irq-vic.c v->resume_sources = resume_sources; v 287 drivers/irqchip/irq-vic.c vic_handle_irq_cascaded, v); v 290 drivers/irqchip/irq-vic.c v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, v 291 drivers/irqchip/irq-vic.c &vic_irqdomain_ops, v); v 295 drivers/irqchip/irq-vic.c irq_create_mapping(v->domain, i); v 298 drivers/irqchip/irq-vic.c v->irq = irq; v 300 drivers/irqchip/irq-vic.c v->irq = irq_find_mapping(v->domain, 0); v 329 drivers/irqchip/irq-vic.c struct vic_device *v = vic_devices; v 333 drivers/irqchip/irq-vic.c for (id = 0; id < vic_id; id++, v++) { v 334 drivers/irqchip/irq-vic.c if (v->irq == base_irq) v 335 drivers/irqchip/irq-vic.c return v; v 343 drivers/irqchip/irq-vic.c struct vic_device *v = vic_from_irq(d->irq); v 347 drivers/irqchip/irq-vic.c if (!v) v 350 drivers/irqchip/irq-vic.c if (!(bit & v->resume_sources)) v 354 drivers/irqchip/irq-vic.c v->resume_irqs |= bit; v 356 drivers/irqchip/irq-vic.c v->resume_irqs &= ~bit; v 496 drivers/irqchip/irq-vic.c struct vic_device *v; v 498 drivers/irqchip/irq-vic.c v = &vic_devices[vic_id]; v 501 drivers/irqchip/irq-vic.c return v->irq; v 1326 drivers/isdn/capi/capi.c static int __maybe_unused capi20_proc_show(struct seq_file *m, void *v) v 1349 drivers/isdn/capi/capi.c static int __maybe_unused capi20ncci_proc_show(struct seq_file *m, void *v) v 255 drivers/isdn/capi/kcapi.c notify_handler(struct notifier_block *nb, unsigned long val, void *v) v 257 drivers/isdn/capi/kcapi.c u32 contr = (long)v; v 49 drivers/isdn/capi/kcapi_proc.c static void *controller_next(struct seq_file *seq, void *v, loff_t *pos) v 58 drivers/isdn/capi/kcapi_proc.c static void controller_stop(struct seq_file *seq, void *v) v 64 drivers/isdn/capi/kcapi_proc.c static int controller_show(struct seq_file *seq, void *v) v 66 drivers/isdn/capi/kcapi_proc.c struct capi_ctr *ctr = *(struct capi_ctr **) v; v 80 drivers/isdn/capi/kcapi_proc.c static int contrstats_show(struct seq_file *seq, void *v) v 82 drivers/isdn/capi/kcapi_proc.c struct capi_ctr *ctr = *(struct capi_ctr **) v; v 129 drivers/isdn/capi/kcapi_proc.c applications_next(struct seq_file *seq, void *v, loff_t *pos) v 138 drivers/isdn/capi/kcapi_proc.c static void applications_stop(struct seq_file *seq, void *v) v 145 drivers/isdn/capi/kcapi_proc.c applications_show(struct seq_file *seq, void *v) v 147 drivers/isdn/capi/kcapi_proc.c struct capi20_appl *ap = *(struct capi20_appl **) v; v 162 drivers/isdn/capi/kcapi_proc.c applstats_show(struct seq_file *seq, void *v) v 164 drivers/isdn/capi/kcapi_proc.c struct capi20_appl *ap = *(struct capi20_appl **) v; v 202 drivers/isdn/capi/kcapi_proc.c static void *capi_driver_next(struct seq_file *seq, void *v, loff_t *pos) v 204 drivers/isdn/capi/kcapi_proc.c return seq_list_next(v, &capi_drivers, pos); v 207 drivers/isdn/capi/kcapi_proc.c static void capi_driver_stop(struct seq_file *seq, void *v) v 213 drivers/isdn/capi/kcapi_proc.c static int capi_driver_show(struct seq_file *seq, void *v) v 215 drivers/isdn/capi/kcapi_proc.c struct capi_driver *drv = list_entry(v, struct capi_driver, list); v 27 drivers/isdn/hardware/mISDN/mISDNipac.c #define WriteISAC(is, o, v) (is->write_reg(is->dch.hw, o + is->off, v)) v 29 drivers/isdn/hardware/mISDN/mISDNipac.c #define WriteHSCX(h, o, v) (h->ip->write_reg(h->ip->hw, h->off + o, v)) v 31 drivers/isdn/hardware/mISDN/mISDNipac.c #define WriteIPAC(ip, o, v) (ip->write_reg(ip->hw, o, v)) v 491 drivers/isdn/hardware/mISDN/netjet.c u32 m, v; v 511 drivers/isdn/hardware/mISDN/netjet.c v = card->send.start[bc->idx]; v 512 drivers/isdn/hardware/mISDN/netjet.c v &= m; v 513 drivers/isdn/hardware/mISDN/netjet.c v |= (bc->bch.nr & 1) ? (u32)(p[i]) : ((u32)(p[i])) << 8; v 514 drivers/isdn/hardware/mISDN/netjet.c card->send.start[bc->idx++] = v; v 528 drivers/isdn/hardware/mISDN/netjet.c u32 m, v, n = 0; v 574 drivers/isdn/hardware/mISDN/netjet.c v = card->send.start[bc->idx]; v 575 drivers/isdn/hardware/mISDN/netjet.c v &= m; v 576 drivers/isdn/hardware/mISDN/netjet.c v |= n; v 577 drivers/isdn/hardware/mISDN/netjet.c card->send.start[bc->idx++] = v; v 583 drivers/isdn/hardware/mISDN/netjet.c v = card->send.start[bc->idx]; v 584 drivers/isdn/hardware/mISDN/netjet.c v &= m; v 586 drivers/isdn/hardware/mISDN/netjet.c v |= (bc->bch.nr & 1) ? n : n << 8; v 587 drivers/isdn/hardware/mISDN/netjet.c card->send.start[bc->idx++] = v; v 332 drivers/leds/led-class-flash.c u32 v, offset; v 334 drivers/leds/led-class-flash.c v = s->val + s->step / 2; v 335 drivers/leds/led-class-flash.c v = clamp(v, s->min, s->max); v 336 drivers/leds/led-class-flash.c offset = v - s->min; v 151 drivers/leds/leds-max77693.c int ret, v = 0, i; v 155 drivers/leds/leds-max77693.c v |= FLASH_EN_ON << TORCH_EN_SHIFT(i); v 158 drivers/leds/leds-max77693.c v |= FLASH_EN_ON << FLASH_EN_SHIFT(i); v 160 drivers/leds/leds-max77693.c v |= FLASH_EN_FLASH << FLASH_EN_SHIFT(i); v 166 drivers/leds/leds-max77693.c v |= FLASH_EN_TORCH << TORCH_EN_SHIFT(i); v 177 drivers/leds/leds-max77693.c return regmap_write(rmap, MAX77693_LED_REG_FLASH_EN, v); v 323 drivers/leds/leds-max77693.c u8 v; v 326 drivers/leds/leds-max77693.c v = max77693_flash_timeout_to_reg(microsec) | FLASH_TMR_LEVEL; v 328 drivers/leds/leds-max77693.c ret = regmap_write(rmap, MAX77693_LED_REG_FLASH_TIMER, v); v 341 drivers/leds/leds-max77693.c unsigned int v; v 344 drivers/leds/leds-max77693.c ret = regmap_read(rmap, MAX77693_LED_REG_FLASH_STATUS, &v); v 348 drivers/leds/leds-max77693.c *state = v & FLASH_STATUS_FLASH_ON; v 357 drivers/leds/leds-max77693.c unsigned int v; v 376 drivers/leds/leds-max77693.c ret = regmap_read(rmap, MAX77693_LED_REG_FLASH_INT, &v); v 380 drivers/leds/leds-max77693.c if (v & fault_open_mask) v 382 drivers/leds/leds-max77693.c if (v & fault_short_mask) v 384 drivers/leds/leds-max77693.c if (v & FLASH_INT_OVER_CURRENT) v 396 drivers/leds/leds-max77693.c u8 v; v 422 drivers/leds/leds-max77693.c v = TORCH_TMR_NO_TIMER | MAX77693_LED_TRIG_TYPE_LEVEL; v 423 drivers/leds/leds-max77693.c ret = regmap_write(rmap, MAX77693_LED_REG_ITORCHTIMER, v); v 428 drivers/leds/leds-max77693.c v = max77693_led_vsys_to_reg(led_cfg->low_vsys) | v 431 drivers/leds/leds-max77693.c v = 0; v 433 drivers/leds/leds-max77693.c ret = regmap_write(rmap, MAX77693_LED_REG_MAX_FLASH1, v); v 441 drivers/leds/leds-max77693.c v = FLASH_BOOST_FIXED; v 443 drivers/leds/leds-max77693.c v = led_cfg->boost_mode | led_cfg->boost_mode << 1; v 446 drivers/leds/leds-max77693.c v |= FLASH_BOOST_LEDNUM_2; v 448 drivers/leds/leds-max77693.c ret = regmap_write(rmap, MAX77693_LED_REG_VOUT_CNTL, v); v 452 drivers/leds/leds-max77693.c v = max77693_led_vout_to_reg(led_cfg->boost_vout); v 453 drivers/leds/leds-max77693.c ret = regmap_write(rmap, MAX77693_LED_REG_VOUT_FLASH1, v); v 698 drivers/leds/leds-max77693.c static void clamp_align(u32 *v, u32 min, u32 max, u32 step) v 700 drivers/leds/leds-max77693.c *v = clamp_val(*v, min, max); v 702 drivers/leds/leds-max77693.c *v = (*v - min) / step * step + min; v 136 drivers/leds/leds-sc27xx-bltc.c u32 v, offset, t = *delta_t; v 138 drivers/leds/leds-sc27xx-bltc.c v = t + SC27XX_LEDS_STEP / 2; v 139 drivers/leds/leds-sc27xx-bltc.c v = clamp_t(u32, v, SC27XX_DELTA_T_MIN, SC27XX_DELTA_T_MAX); v 140 drivers/leds/leds-sc27xx-bltc.c offset = v - SC27XX_DELTA_T_MIN; v 36 drivers/macintosh/mediabay.c #define MB_OUT32(bay,r,v) (out_le32(MB_FCR32(bay,r), (v))) v 37 drivers/macintosh/mediabay.c #define MB_BIS(bay,r,v) (MB_OUT32((bay), (r), MB_IN32((bay), r) | (v))) v 38 drivers/macintosh/mediabay.c #define MB_BIC(bay,r,v) (MB_OUT32((bay), (r), MB_IN32((bay), r) & ~(v))) v 40 drivers/macintosh/mediabay.c #define MB_OUT8(bay,r,v) (out_8(MB_FCR8(bay,r), (v))) v 211 drivers/macintosh/via-pmu.c static int pmu_info_proc_show(struct seq_file *m, void *v); v 212 drivers/macintosh/via-pmu.c static int pmu_irqstats_proc_show(struct seq_file *m, void *v); v 213 drivers/macintosh/via-pmu.c static int pmu_battery_proc_show(struct seq_file *m, void *v); v 864 drivers/macintosh/via-pmu.c static int pmu_info_proc_show(struct seq_file *m, void *v) v 875 drivers/macintosh/via-pmu.c static int pmu_irqstats_proc_show(struct seq_file *m, void *v) v 901 drivers/macintosh/via-pmu.c static int pmu_battery_proc_show(struct seq_file *m, void *v) v 915 drivers/macintosh/via-pmu.c static int pmu_options_proc_show(struct seq_file *m, void *v) v 160 drivers/macintosh/windfarm_smu_controls.c const s32 *v; v 231 drivers/macintosh/windfarm_smu_controls.c v = of_get_property(node, "min-value", NULL); v 232 drivers/macintosh/windfarm_smu_controls.c if (v == NULL) v 234 drivers/macintosh/windfarm_smu_controls.c fct->min = *v; v 235 drivers/macintosh/windfarm_smu_controls.c v = of_get_property(node, "max-value", NULL); v 236 drivers/macintosh/windfarm_smu_controls.c if (v == NULL) v 238 drivers/macintosh/windfarm_smu_controls.c fct->max = *v; v 200 drivers/macintosh/windfarm_smu_sensors.c const u32 *v; v 255 drivers/macintosh/windfarm_smu_sensors.c v = of_get_property(node, "reg", NULL); v 256 drivers/macintosh/windfarm_smu_sensors.c if (v == NULL) v 258 drivers/macintosh/windfarm_smu_sensors.c ads->reg = *v; v 44 drivers/md/bcache/closure.c void closure_sub(struct closure *cl, int v) v 46 drivers/md/bcache/closure.c closure_put_after_sub(cl, atomic_sub_return(v, &cl->remaining)); v 169 drivers/md/bcache/closure.h void closure_sub(struct closure *cl, int v); v 33 drivers/md/bcache/debug.c struct btree *v = b->c->verify_data; v 47 drivers/md/bcache/debug.c bkey_copy(&v->key, &b->key); v 48 drivers/md/bcache/debug.c v->written = 0; v 49 drivers/md/bcache/debug.c v->level = b->level; v 50 drivers/md/bcache/debug.c v->keys.ops = b->keys.ops; v 55 drivers/md/bcache/debug.c bio->bi_iter.bi_size = KEY_SIZE(&v->key) << 9; v 62 drivers/md/bcache/debug.c memcpy(ondisk, sorted, KEY_SIZE(&v->key) << 9); v 64 drivers/md/bcache/debug.c bch_btree_node_read_done(v); v 65 drivers/md/bcache/debug.c sorted = v->keys.set->data; v 81 drivers/md/bcache/debug.c bch_dump_bset(&v->keys, sorted, 0); v 284 drivers/md/bcache/sysfs.c ssize_t v; v 308 drivers/md/bcache/sysfs.c long int v = atomic_long_read(&dc->writeback_rate.rate); v 310 drivers/md/bcache/sysfs.c ret = strtoul_safe_clamp(buf, v, 1, INT_MAX); v 313 drivers/md/bcache/sysfs.c atomic_long_set(&dc->writeback_rate.rate, v); v 336 drivers/md/bcache/sysfs.c int v = strtoul_or_return(buf); v 338 drivers/md/bcache/sysfs.c dc->io_disable = v ? 1 : 0; v 351 drivers/md/bcache/sysfs.c v = bch_cached_dev_run(dc); v 352 drivers/md/bcache/sysfs.c if (v) v 353 drivers/md/bcache/sysfs.c return v; v 357 drivers/md/bcache/sysfs.c v = __sysfs_match_string(bch_cache_modes, -1, buf); v 358 drivers/md/bcache/sysfs.c if (v < 0) v 359 drivers/md/bcache/sysfs.c return v; v 361 drivers/md/bcache/sysfs.c if ((unsigned int) v != BDEV_CACHE_MODE(&dc->sb)) { v 362 drivers/md/bcache/sysfs.c SET_BDEV_CACHE_MODE(&dc->sb, v); v 368 drivers/md/bcache/sysfs.c v = __sysfs_match_string(bch_reada_cache_policies, -1, buf); v 369 drivers/md/bcache/sysfs.c if (v < 0) v 370 drivers/md/bcache/sysfs.c return v; v 372 drivers/md/bcache/sysfs.c if ((unsigned int) v != dc->cache_readahead_policy) v 373 drivers/md/bcache/sysfs.c dc->cache_readahead_policy = v; v 377 drivers/md/bcache/sysfs.c v = __sysfs_match_string(bch_stop_on_failure_modes, -1, buf); v 378 drivers/md/bcache/sysfs.c if (v < 0) v 379 drivers/md/bcache/sysfs.c return v; v 381 drivers/md/bcache/sysfs.c dc->stop_when_cache_set_failed = v; v 416 drivers/md/bcache/sysfs.c v = -ENOENT; v 418 drivers/md/bcache/sysfs.c v = bch_cached_dev_attach(dc, c, set_uuid); v 419 drivers/md/bcache/sysfs.c if (!v) v 422 drivers/md/bcache/sysfs.c if (v == -ENOENT) v 424 drivers/md/bcache/sysfs.c return v; v 556 drivers/md/bcache/sysfs.c uint64_t v; v 558 drivers/md/bcache/sysfs.c strtoi_h_or_return(buf, v); v 560 drivers/md/bcache/sysfs.c u->sectors = v >> 9; v 786 drivers/md/bcache/sysfs.c ssize_t v; v 809 drivers/md/bcache/sysfs.c uint64_t v; v 811 drivers/md/bcache/sysfs.c strtoi_h_or_return(buf, v); v 813 drivers/md/bcache/sysfs.c r = bch_flash_dev_create(c, v); v 845 drivers/md/bcache/sysfs.c v = __sysfs_match_string(error_actions, -1, buf); v 846 drivers/md/bcache/sysfs.c if (v < 0) v 847 drivers/md/bcache/sysfs.c return v; v 849 drivers/md/bcache/sysfs.c c->on_error = v; v 856 drivers/md/bcache/sysfs.c unsigned long v = 0; v 859 drivers/md/bcache/sysfs.c ret = strtoul_safe_clamp(buf, v, 0, UINT_MAX); v 861 drivers/md/bcache/sysfs.c c->error_decay = v / 88; v 868 drivers/md/bcache/sysfs.c v = strtoul_or_return(buf); v 869 drivers/md/bcache/sysfs.c if (v) { v 1099 drivers/md/bcache/sysfs.c ssize_t v; v 1106 drivers/md/bcache/sysfs.c bool v = strtoul_or_return(buf); v 1109 drivers/md/bcache/sysfs.c ca->discard = v; v 1111 drivers/md/bcache/sysfs.c if (v != CACHE_DISCARD(&ca->sb)) { v 1112 drivers/md/bcache/sysfs.c SET_CACHE_DISCARD(&ca->sb, v); v 1118 drivers/md/bcache/sysfs.c v = __sysfs_match_string(cache_replacement_policies, -1, buf); v 1119 drivers/md/bcache/sysfs.c if (v < 0) v 1120 drivers/md/bcache/sysfs.c return v; v 1122 drivers/md/bcache/sysfs.c if ((unsigned int) v != CACHE_REPLACEMENT(&ca->sb)) { v 1124 drivers/md/bcache/sysfs.c SET_CACHE_REPLACEMENT(&ca->sb, v); v 85 drivers/md/bcache/sysfs.h unsigned long v = strtoul_or_return(buf); \ v 87 drivers/md/bcache/sysfs.h var = v ? 1 : 0; \ v 95 drivers/md/bcache/sysfs.h unsigned long v = 0; \ v 97 drivers/md/bcache/sysfs.h ret = strtoul_safe_clamp(buf, v, min, max); \ v 99 drivers/md/bcache/sysfs.h var = v; \ v 115 drivers/md/bcache/sysfs.h #define strtoi_h_or_return(cp, v) \ v 117 drivers/md/bcache/sysfs.h int _r = strtoi_h(cp, &v); \ v 92 drivers/md/bcache/util.c ssize_t bch_hprint(char *buf, int64_t v) v 99 drivers/md/bcache/util.c if (v < 0) v 100 drivers/md/bcache/util.c q = -v; v 102 drivers/md/bcache/util.c q = v; v 115 drivers/md/bcache/util.c if (v < 0) v 25 drivers/md/bcache/util.h #define atomic_dec_bug(v) BUG_ON(atomic_dec_return(v) < 0) v 26 drivers/md/bcache/util.h #define atomic_inc_bug(v, i) BUG_ON(atomic_inc_return(v) <= i) v 31 drivers/md/bcache/util.h #define atomic_dec_bug(v) atomic_dec(v) v 32 drivers/md/bcache/util.h #define atomic_inc_bug(v, i) atomic_inc(v) v 362 drivers/md/bcache/util.h ssize_t bch_hprint(char *buf, int64_t v); v 171 drivers/md/dm-cache-metadata.c static void sb_prepare_for_write(struct dm_block_validator *v, v 196 drivers/md/dm-cache-metadata.c static int sb_check(struct dm_block_validator *v, v 166 drivers/md/dm-clone-metadata.c static void sb_prepare_for_write(struct dm_block_validator *v, v 180 drivers/md/dm-clone-metadata.c static int sb_check(struct dm_block_validator *v, struct dm_block *b, v 191 drivers/md/dm-era-target.c static void sb_prepare_for_write(struct dm_block_validator *v, v 215 drivers/md/dm-era-target.c static int sb_check(struct dm_block_validator *v, v 310 drivers/md/dm-raid.c static bool __within_range(long v, long min, long max) v 312 drivers/md/dm-raid.c return v >= min && v <= max; v 930 drivers/md/dm-table.c struct verify_rq_based_data *v = data; v 933 drivers/md/dm-table.c v->mq_count++; v 935 drivers/md/dm-table.c v->sq_count++; v 944 drivers/md/dm-table.c struct verify_rq_based_data v = {.sq_count = 0, .mq_count = 0}; v 1048 drivers/md/dm-table.c !tgt->type->iterate_devices(tgt, device_is_rq_based, &v)) { v 1052 drivers/md/dm-table.c if (v.sq_count > 0) { v 248 drivers/md/dm-thin-metadata.c static void sb_prepare_for_write(struct dm_block_validator *v, v 260 drivers/md/dm-thin-metadata.c static int sb_check(struct dm_block_validator *v, v 308 drivers/md/dm-thin-metadata.c static void unpack_block_time(uint64_t v, dm_block_t *b, uint32_t *t) v 310 drivers/md/dm-thin-metadata.c *b = v >> 24; v 311 drivers/md/dm-thin-metadata.c *t = v & ((1 << 24) - 1); v 16 drivers/md/dm-verity-fec.c bool verity_fec_is_enabled(struct dm_verity *v) v 18 drivers/md/dm-verity-fec.c return v->fec && v->fec->dev; v 27 drivers/md/dm-verity-fec.c return (struct dm_verity_fec_io *) verity_io_digest_end(io->v, io); v 33 drivers/md/dm-verity-fec.c static inline u64 fec_interleave(struct dm_verity *v, u64 offset) v 37 drivers/md/dm-verity-fec.c mod = do_div(offset, v->fec->rsn); v 38 drivers/md/dm-verity-fec.c return offset + mod * (v->fec->rounds << v->data_dev_block_bits); v 44 drivers/md/dm-verity-fec.c static int fec_decode_rs8(struct dm_verity *v, struct dm_verity_fec_io *fio, v 50 drivers/md/dm-verity-fec.c for (i = 0; i < v->fec->roots; i++) v 53 drivers/md/dm-verity-fec.c return decode_rs8(fio->rs, data, par, v->fec->rsn, NULL, neras, v 61 drivers/md/dm-verity-fec.c static u8 *fec_read_parity(struct dm_verity *v, u64 rsb, int index, v 67 drivers/md/dm-verity-fec.c position = (index + rsb) * v->fec->roots; v 68 drivers/md/dm-verity-fec.c block = position >> v->data_dev_block_bits; v 69 drivers/md/dm-verity-fec.c *offset = (unsigned)(position - (block << v->data_dev_block_bits)); v 71 drivers/md/dm-verity-fec.c res = dm_bufio_read(v->fec->bufio, v->fec->start + block, buf); v 74 drivers/md/dm-verity-fec.c v->data_dev->name, (unsigned long long)rsb, v 75 drivers/md/dm-verity-fec.c (unsigned long long)(v->fec->start + block), v 104 drivers/md/dm-verity-fec.c static inline u8 *fec_buffer_rs_block(struct dm_verity *v, v 108 drivers/md/dm-verity-fec.c return &fio->bufs[i][j * v->fec->rsn]; v 124 drivers/md/dm-verity-fec.c static int fec_decode_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio, v 133 drivers/md/dm-verity-fec.c par = fec_read_parity(v, rsb, block_offset, &offset, &buf); v 142 drivers/md/dm-verity-fec.c block = fec_buffer_rs_block(v, fio, n, i); v 143 drivers/md/dm-verity-fec.c res = fec_decode_rs8(v, fio, block, &par[offset], neras); v 153 drivers/md/dm-verity-fec.c if (block_offset >= 1 << v->data_dev_block_bits) v 157 drivers/md/dm-verity-fec.c offset += v->fec->roots; v 158 drivers/md/dm-verity-fec.c if (offset >= 1 << v->data_dev_block_bits) { v 161 drivers/md/dm-verity-fec.c par = fec_read_parity(v, rsb, block_offset, &offset, &buf); v 173 drivers/md/dm-verity-fec.c v->data_dev->name, (unsigned long long)rsb, r); v 176 drivers/md/dm-verity-fec.c v->data_dev->name, (unsigned long long)rsb, r); v 184 drivers/md/dm-verity-fec.c static int fec_is_erasure(struct dm_verity *v, struct dm_verity_io *io, v 187 drivers/md/dm-verity-fec.c if (unlikely(verity_hash(v, verity_io_hash_req(v, io), v 188 drivers/md/dm-verity-fec.c data, 1 << v->data_dev_block_bits, v 189 drivers/md/dm-verity-fec.c verity_io_real_digest(v, io)))) v 192 drivers/md/dm-verity-fec.c return memcmp(verity_io_real_digest(v, io), want_digest, v 193 drivers/md/dm-verity-fec.c v->digest_size) != 0; v 200 drivers/md/dm-verity-fec.c static int fec_read_bufs(struct dm_verity *v, struct dm_verity_io *io, v 217 drivers/md/dm-verity-fec.c if (WARN_ON(v->digest_size > sizeof(want_digest))) v 224 drivers/md/dm-verity-fec.c for (i = 0; i < v->fec->rsn; i++) { v 225 drivers/md/dm-verity-fec.c ileaved = fec_interleave(v, rsb * v->fec->rsn + i); v 234 drivers/md/dm-verity-fec.c block = ileaved >> v->data_dev_block_bits; v 235 drivers/md/dm-verity-fec.c bufio = v->fec->data_bufio; v 237 drivers/md/dm-verity-fec.c if (block >= v->data_blocks) { v 238 drivers/md/dm-verity-fec.c block -= v->data_blocks; v 244 drivers/md/dm-verity-fec.c if (unlikely(block >= v->fec->hash_blocks)) v 247 drivers/md/dm-verity-fec.c block += v->hash_start; v 248 drivers/md/dm-verity-fec.c bufio = v->bufio; v 254 drivers/md/dm-verity-fec.c v->data_dev->name, v 259 drivers/md/dm-verity-fec.c if (neras && *neras <= v->fec->roots) v 266 drivers/md/dm-verity-fec.c if (bufio == v->fec->data_bufio && v 267 drivers/md/dm-verity-fec.c verity_hash_for_block(v, io, block, want_digest, v 277 drivers/md/dm-verity-fec.c if (neras && *neras <= v->fec->roots && v 278 drivers/md/dm-verity-fec.c fec_is_erasure(v, io, want_digest, bbuf)) v 289 drivers/md/dm-verity-fec.c if (k >= 1 << v->data_dev_block_bits) v 292 drivers/md/dm-verity-fec.c rs_block = fec_buffer_rs_block(v, fio, n, j); v 306 drivers/md/dm-verity-fec.c static int fec_alloc_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio) v 311 drivers/md/dm-verity-fec.c fio->rs = mempool_alloc(&v->fec->rs_pool, GFP_NOIO); v 317 drivers/md/dm-verity-fec.c fio->bufs[n] = mempool_alloc(&v->fec->prealloc_pool, GFP_NOWAIT); v 329 drivers/md/dm-verity-fec.c fio->bufs[n] = mempool_alloc(&v->fec->extra_pool, GFP_NOWAIT); v 337 drivers/md/dm-verity-fec.c fio->output = mempool_alloc(&v->fec->output_pool, GFP_NOIO); v 346 drivers/md/dm-verity-fec.c static void fec_init_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio) v 351 drivers/md/dm-verity-fec.c memset(fio->bufs[n], 0, v->fec->rsn << DM_VERITY_FEC_BUF_RS_BITS); v 361 drivers/md/dm-verity-fec.c static int fec_decode_rsb(struct dm_verity *v, struct dm_verity_io *io, v 368 drivers/md/dm-verity-fec.c r = fec_alloc_bufs(v, fio); v 372 drivers/md/dm-verity-fec.c for (pos = 0; pos < 1 << v->data_dev_block_bits; ) { v 373 drivers/md/dm-verity-fec.c fec_init_bufs(v, fio); v 375 drivers/md/dm-verity-fec.c r = fec_read_bufs(v, io, rsb, offset, pos, v 380 drivers/md/dm-verity-fec.c r = fec_decode_bufs(v, fio, rsb, r, pos, neras); v 388 drivers/md/dm-verity-fec.c r = verity_hash(v, verity_io_hash_req(v, io), fio->output, v 389 drivers/md/dm-verity-fec.c 1 << v->data_dev_block_bits, v 390 drivers/md/dm-verity-fec.c verity_io_real_digest(v, io)); v 394 drivers/md/dm-verity-fec.c if (memcmp(verity_io_real_digest(v, io), verity_io_want_digest(v, io), v 395 drivers/md/dm-verity-fec.c v->digest_size)) { v 397 drivers/md/dm-verity-fec.c v->data_dev->name, (unsigned long long)rsb, neras); v 404 drivers/md/dm-verity-fec.c static int fec_bv_copy(struct dm_verity *v, struct dm_verity_io *io, u8 *data, v 419 drivers/md/dm-verity-fec.c int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io, v 427 drivers/md/dm-verity-fec.c if (!verity_fec_is_enabled(v)) v 431 drivers/md/dm-verity-fec.c DMWARN_LIMIT("%s: FEC: recursion too deep", v->data_dev->name); v 438 drivers/md/dm-verity-fec.c block = block - v->hash_start + v->data_blocks; v 450 drivers/md/dm-verity-fec.c offset = block << v->data_dev_block_bits; v 451 drivers/md/dm-verity-fec.c res = div64_u64(offset, v->fec->rounds << v->data_dev_block_bits); v 457 drivers/md/dm-verity-fec.c rsb = offset - res * (v->fec->rounds << v->data_dev_block_bits); v 464 drivers/md/dm-verity-fec.c r = fec_decode_rsb(v, io, fio, rsb, offset, false); v 466 drivers/md/dm-verity-fec.c r = fec_decode_rsb(v, io, fio, rsb, offset, true); v 472 drivers/md/dm-verity-fec.c memcpy(dest, fio->output, 1 << v->data_dev_block_bits); v 475 drivers/md/dm-verity-fec.c r = verity_for_bv_block(v, io, iter, fec_bv_copy); v 489 drivers/md/dm-verity-fec.c struct dm_verity_fec *f = io->v->fec; v 492 drivers/md/dm-verity-fec.c if (!verity_fec_is_enabled(io->v)) v 513 drivers/md/dm-verity-fec.c if (!verity_fec_is_enabled(io->v)) v 526 drivers/md/dm-verity-fec.c unsigned verity_fec_status_table(struct dm_verity *v, unsigned sz, v 529 drivers/md/dm-verity-fec.c if (!verity_fec_is_enabled(v)) v 536 drivers/md/dm-verity-fec.c v->fec->dev->name, v 537 drivers/md/dm-verity-fec.c (unsigned long long)v->fec->blocks, v 538 drivers/md/dm-verity-fec.c (unsigned long long)v->fec->start, v 539 drivers/md/dm-verity-fec.c v->fec->roots); v 544 drivers/md/dm-verity-fec.c void verity_fec_dtr(struct dm_verity *v) v 546 drivers/md/dm-verity-fec.c struct dm_verity_fec *f = v->fec; v 548 drivers/md/dm-verity-fec.c if (!verity_fec_is_enabled(v)) v 563 drivers/md/dm-verity-fec.c dm_put_device(v->ti, f->dev); v 566 drivers/md/dm-verity-fec.c v->fec = NULL; v 571 drivers/md/dm-verity-fec.c struct dm_verity *v = (struct dm_verity *)pool_data; v 573 drivers/md/dm-verity-fec.c return init_rs_gfp(8, 0x11d, 0, 1, v->fec->roots, gfp_mask); v 592 drivers/md/dm-verity-fec.c int verity_fec_parse_opt_args(struct dm_arg_set *as, struct dm_verity *v, v 596 drivers/md/dm-verity-fec.c struct dm_target *ti = v->ti; v 611 drivers/md/dm-verity-fec.c r = dm_get_device(ti, arg_value, FMODE_READ, &v->fec->dev); v 619 drivers/md/dm-verity-fec.c ((sector_t)(num_ll << (v->data_dev_block_bits - SECTOR_SHIFT)) v 620 drivers/md/dm-verity-fec.c >> (v->data_dev_block_bits - SECTOR_SHIFT) != num_ll)) { v 624 drivers/md/dm-verity-fec.c v->fec->blocks = num_ll; v 628 drivers/md/dm-verity-fec.c ((sector_t)(num_ll << (v->data_dev_block_bits - SECTOR_SHIFT)) >> v 629 drivers/md/dm-verity-fec.c (v->data_dev_block_bits - SECTOR_SHIFT) != num_ll)) { v 633 drivers/md/dm-verity-fec.c v->fec->start = num_ll; v 642 drivers/md/dm-verity-fec.c v->fec->roots = num_c; v 655 drivers/md/dm-verity-fec.c int verity_fec_ctr_alloc(struct dm_verity *v) v 661 drivers/md/dm-verity-fec.c v->ti->error = "Cannot allocate FEC structure"; v 664 drivers/md/dm-verity-fec.c v->fec = f; v 673 drivers/md/dm-verity-fec.c int verity_fec_ctr(struct dm_verity *v) v 675 drivers/md/dm-verity-fec.c struct dm_verity_fec *f = v->fec; v 676 drivers/md/dm-verity-fec.c struct dm_target *ti = v->ti; v 680 drivers/md/dm-verity-fec.c if (!verity_fec_is_enabled(v)) { v 681 drivers/md/dm-verity-fec.c verity_fec_dtr(v); v 700 drivers/md/dm-verity-fec.c hash_blocks = v->hash_blocks - v->hash_start; v 706 drivers/md/dm-verity-fec.c if (v->data_dev_block_bits != v->hash_dev_block_bits) { v 730 drivers/md/dm-verity-fec.c if (f->blocks < v->data_blocks + hash_blocks || !f->rounds) { v 739 drivers/md/dm-verity-fec.c f->hash_blocks = f->blocks - v->data_blocks; v 740 drivers/md/dm-verity-fec.c if (dm_bufio_get_device_size(v->bufio) < f->hash_blocks) { v 747 drivers/md/dm-verity-fec.c 1 << v->data_dev_block_bits, v 755 drivers/md/dm-verity-fec.c ((f->start + f->rounds * f->roots) >> v->data_dev_block_bits)) { v 760 drivers/md/dm-verity-fec.c f->data_bufio = dm_bufio_client_create(v->data_dev->bdev, v 761 drivers/md/dm-verity-fec.c 1 << v->data_dev_block_bits, v 768 drivers/md/dm-verity-fec.c if (dm_bufio_get_device_size(f->data_bufio) < v->data_blocks) { v 775 drivers/md/dm-verity-fec.c fec_rs_free, (void *) v); v 806 drivers/md/dm-verity-fec.c 1 << v->data_dev_block_bits); v 68 drivers/md/dm-verity-fec.h extern bool verity_fec_is_enabled(struct dm_verity *v); v 70 drivers/md/dm-verity-fec.h extern int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io, v 74 drivers/md/dm-verity-fec.h extern unsigned verity_fec_status_table(struct dm_verity *v, unsigned sz, v 82 drivers/md/dm-verity-fec.h struct dm_verity *v, unsigned *argc, v 85 drivers/md/dm-verity-fec.h extern void verity_fec_dtr(struct dm_verity *v); v 87 drivers/md/dm-verity-fec.h extern int verity_fec_ctr_alloc(struct dm_verity *v); v 88 drivers/md/dm-verity-fec.h extern int verity_fec_ctr(struct dm_verity *v); v 94 drivers/md/dm-verity-fec.h static inline bool verity_fec_is_enabled(struct dm_verity *v) v 99 drivers/md/dm-verity-fec.h static inline int verity_fec_decode(struct dm_verity *v, v 108 drivers/md/dm-verity-fec.h static inline unsigned verity_fec_status_table(struct dm_verity *v, v 129 drivers/md/dm-verity-fec.h struct dm_verity *v, v 136 drivers/md/dm-verity-fec.h static inline void verity_fec_dtr(struct dm_verity *v) v 140 drivers/md/dm-verity-fec.h static inline int verity_fec_ctr_alloc(struct dm_verity *v) v 145 drivers/md/dm-verity-fec.h static inline int verity_fec_ctr(struct dm_verity *v) v 45 drivers/md/dm-verity-target.c struct dm_verity *v; v 79 drivers/md/dm-verity-target.c static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) v 81 drivers/md/dm-verity-target.c return v->data_start + dm_target_offset(v->ti, bi_sector); v 90 drivers/md/dm-verity-target.c static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, v 93 drivers/md/dm-verity-target.c return block >> (level * v->hash_per_block_bits); v 96 drivers/md/dm-verity-target.c static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, v 127 drivers/md/dm-verity-target.c static int verity_hash_init(struct dm_verity *v, struct ahash_request *req, v 132 drivers/md/dm-verity-target.c ahash_request_set_tfm(req, v->tfm); v 145 drivers/md/dm-verity-target.c if (likely(v->salt_size && (v->version >= 1))) v 146 drivers/md/dm-verity-target.c r = verity_hash_update(v, req, v->salt, v->salt_size, wait); v 151 drivers/md/dm-verity-target.c static int verity_hash_final(struct dm_verity *v, struct ahash_request *req, v 156 drivers/md/dm-verity-target.c if (unlikely(v->salt_size && (!v->version))) { v 157 drivers/md/dm-verity-target.c r = verity_hash_update(v, req, v->salt, v->salt_size, wait); v 171 drivers/md/dm-verity-target.c int verity_hash(struct dm_verity *v, struct ahash_request *req, v 177 drivers/md/dm-verity-target.c r = verity_hash_init(v, req, &wait); v 181 drivers/md/dm-verity-target.c r = verity_hash_update(v, req, data, len, &wait); v 185 drivers/md/dm-verity-target.c r = verity_hash_final(v, req, digest, &wait); v 191 drivers/md/dm-verity-target.c static void verity_hash_at_level(struct dm_verity *v, sector_t block, int level, v 194 drivers/md/dm-verity-target.c sector_t position = verity_position_at_level(v, block, level); v 197 drivers/md/dm-verity-target.c *hash_block = v->hash_level_block[level] + (position >> v->hash_per_block_bits); v 202 drivers/md/dm-verity-target.c idx = position & ((1 << v->hash_per_block_bits) - 1); v 203 drivers/md/dm-verity-target.c if (!v->version) v 204 drivers/md/dm-verity-target.c *offset = idx * v->digest_size; v 206 drivers/md/dm-verity-target.c *offset = idx << (v->hash_dev_block_bits - v->hash_per_block_bits); v 212 drivers/md/dm-verity-target.c static int verity_handle_err(struct dm_verity *v, enum verity_block_type type, v 218 drivers/md/dm-verity-target.c struct mapped_device *md = dm_table_get_md(v->ti->table); v 221 drivers/md/dm-verity-target.c v->hash_failed = 1; v 223 drivers/md/dm-verity-target.c if (v->corrupted_errs >= DM_VERITY_MAX_CORRUPTED_ERRS) v 226 drivers/md/dm-verity-target.c v->corrupted_errs++; v 239 drivers/md/dm-verity-target.c DMERR_LIMIT("%s: %s block %llu is corrupted", v->data_dev->name, v 242 drivers/md/dm-verity-target.c if (v->corrupted_errs == DM_VERITY_MAX_CORRUPTED_ERRS) v 243 drivers/md/dm-verity-target.c DMERR("%s: reached maximum errors", v->data_dev->name); v 251 drivers/md/dm-verity-target.c if (v->mode == DM_VERITY_MODE_LOGGING) v 254 drivers/md/dm-verity-target.c if (v->mode == DM_VERITY_MODE_RESTART) v 271 drivers/md/dm-verity-target.c static int verity_verify_level(struct dm_verity *v, struct dm_verity_io *io, v 282 drivers/md/dm-verity-target.c verity_hash_at_level(v, block, level, &hash_block, &offset); v 284 drivers/md/dm-verity-target.c data = dm_bufio_read(v->bufio, hash_block, &buf); v 296 drivers/md/dm-verity-target.c r = verity_hash(v, verity_io_hash_req(v, io), v 297 drivers/md/dm-verity-target.c data, 1 << v->hash_dev_block_bits, v 298 drivers/md/dm-verity-target.c verity_io_real_digest(v, io)); v 302 drivers/md/dm-verity-target.c if (likely(memcmp(verity_io_real_digest(v, io), want_digest, v 303 drivers/md/dm-verity-target.c v->digest_size) == 0)) v 305 drivers/md/dm-verity-target.c else if (verity_fec_decode(v, io, v 309 drivers/md/dm-verity-target.c else if (verity_handle_err(v, v 318 drivers/md/dm-verity-target.c memcpy(want_digest, data, v->digest_size); v 330 drivers/md/dm-verity-target.c int verity_hash_for_block(struct dm_verity *v, struct dm_verity_io *io, v 335 drivers/md/dm-verity-target.c if (likely(v->levels)) { v 343 drivers/md/dm-verity-target.c r = verity_verify_level(v, io, block, 0, true, digest); v 348 drivers/md/dm-verity-target.c memcpy(digest, v->root_digest, v->digest_size); v 350 drivers/md/dm-verity-target.c for (i = v->levels - 1; i >= 0; i--) { v 351 drivers/md/dm-verity-target.c r = verity_verify_level(v, io, block, i, false, digest); v 356 drivers/md/dm-verity-target.c if (!r && v->zero_digest) v 357 drivers/md/dm-verity-target.c *is_zero = !memcmp(v->zero_digest, digest, v->digest_size); v 367 drivers/md/dm-verity-target.c static int verity_for_io_block(struct dm_verity *v, struct dm_verity_io *io, v 370 drivers/md/dm-verity-target.c unsigned int todo = 1 << v->data_dev_block_bits; v 371 drivers/md/dm-verity-target.c struct bio *bio = dm_bio_from_per_bio_data(io, v->ti->per_io_data_size); v 373 drivers/md/dm-verity-target.c struct ahash_request *req = verity_io_hash_req(v, io); v 411 drivers/md/dm-verity-target.c int verity_for_bv_block(struct dm_verity *v, struct dm_verity_io *io, v 413 drivers/md/dm-verity-target.c int (*process)(struct dm_verity *v, v 417 drivers/md/dm-verity-target.c unsigned todo = 1 << v->data_dev_block_bits; v 418 drivers/md/dm-verity-target.c struct bio *bio = dm_bio_from_per_bio_data(io, v->ti->per_io_data_size); v 432 drivers/md/dm-verity-target.c r = process(v, io, page + bv.bv_offset, len); v 445 drivers/md/dm-verity-target.c static int verity_bv_zero(struct dm_verity *v, struct dm_verity_io *io, v 455 drivers/md/dm-verity-target.c static inline void verity_bv_skip_block(struct dm_verity *v, v 459 drivers/md/dm-verity-target.c struct bio *bio = dm_bio_from_per_bio_data(io, v->ti->per_io_data_size); v 461 drivers/md/dm-verity-target.c bio_advance_iter(bio, iter, 1 << v->data_dev_block_bits); v 470 drivers/md/dm-verity-target.c struct dm_verity *v = io->v; v 478 drivers/md/dm-verity-target.c struct ahash_request *req = verity_io_hash_req(v, io); v 480 drivers/md/dm-verity-target.c if (v->validated_blocks && v 481 drivers/md/dm-verity-target.c likely(test_bit(cur_block, v->validated_blocks))) { v 482 drivers/md/dm-verity-target.c verity_bv_skip_block(v, io, &io->iter); v 486 drivers/md/dm-verity-target.c r = verity_hash_for_block(v, io, cur_block, v 487 drivers/md/dm-verity-target.c verity_io_want_digest(v, io), v 497 drivers/md/dm-verity-target.c r = verity_for_bv_block(v, io, &io->iter, v 505 drivers/md/dm-verity-target.c r = verity_hash_init(v, req, &wait); v 510 drivers/md/dm-verity-target.c r = verity_for_io_block(v, io, &io->iter, &wait); v 514 drivers/md/dm-verity-target.c r = verity_hash_final(v, req, verity_io_real_digest(v, io), v 519 drivers/md/dm-verity-target.c if (likely(memcmp(verity_io_real_digest(v, io), v 520 drivers/md/dm-verity-target.c verity_io_want_digest(v, io), v->digest_size) == 0)) { v 521 drivers/md/dm-verity-target.c if (v->validated_blocks) v 522 drivers/md/dm-verity-target.c set_bit(cur_block, v->validated_blocks); v 525 drivers/md/dm-verity-target.c else if (verity_fec_decode(v, io, DM_VERITY_BLOCK_TYPE_DATA, v 528 drivers/md/dm-verity-target.c else if (verity_handle_err(v, DM_VERITY_BLOCK_TYPE_DATA, v 541 drivers/md/dm-verity-target.c struct dm_verity *v = io->v; v 542 drivers/md/dm-verity-target.c struct bio *bio = dm_bio_from_per_bio_data(io, v->ti->per_io_data_size); v 563 drivers/md/dm-verity-target.c if (bio->bi_status && !verity_fec_is_enabled(io->v)) { v 569 drivers/md/dm-verity-target.c queue_work(io->v->verify_wq, &io->work); v 581 drivers/md/dm-verity-target.c struct dm_verity *v = pw->v; v 584 drivers/md/dm-verity-target.c for (i = v->levels - 2; i >= 0; i--) { v 587 drivers/md/dm-verity-target.c verity_hash_at_level(v, pw->block, i, &hash_block_start, NULL); v 588 drivers/md/dm-verity-target.c verity_hash_at_level(v, pw->block + pw->n_blocks - 1, i, &hash_block_end, NULL); v 592 drivers/md/dm-verity-target.c cluster >>= v->data_dev_block_bits; v 601 drivers/md/dm-verity-target.c if (unlikely(hash_block_end >= v->hash_blocks)) v 602 drivers/md/dm-verity-target.c hash_block_end = v->hash_blocks - 1; v 605 drivers/md/dm-verity-target.c dm_bufio_prefetch(v->bufio, hash_block_start, v 612 drivers/md/dm-verity-target.c static void verity_submit_prefetch(struct dm_verity *v, struct dm_verity_io *io) v 623 drivers/md/dm-verity-target.c pw->v = v; v 626 drivers/md/dm-verity-target.c queue_work(v->verify_wq, &pw->work); v 635 drivers/md/dm-verity-target.c struct dm_verity *v = ti->private; v 638 drivers/md/dm-verity-target.c bio_set_dev(bio, v->data_dev->bdev); v 639 drivers/md/dm-verity-target.c bio->bi_iter.bi_sector = verity_map_sector(v, bio->bi_iter.bi_sector); v 642 drivers/md/dm-verity-target.c ((1 << (v->data_dev_block_bits - SECTOR_SHIFT)) - 1)) { v 648 drivers/md/dm-verity-target.c (v->data_dev_block_bits - SECTOR_SHIFT) > v->data_blocks) { v 657 drivers/md/dm-verity-target.c io->v = v; v 659 drivers/md/dm-verity-target.c io->block = bio->bi_iter.bi_sector >> (v->data_dev_block_bits - SECTOR_SHIFT); v 660 drivers/md/dm-verity-target.c io->n_blocks = bio->bi_iter.bi_size >> v->data_dev_block_bits; v 668 drivers/md/dm-verity-target.c verity_submit_prefetch(v, io); v 681 drivers/md/dm-verity-target.c struct dm_verity *v = ti->private; v 688 drivers/md/dm-verity-target.c DMEMIT("%c", v->hash_failed ? 'C' : 'V'); v 692 drivers/md/dm-verity-target.c v->version, v 693 drivers/md/dm-verity-target.c v->data_dev->name, v 694 drivers/md/dm-verity-target.c v->hash_dev->name, v 695 drivers/md/dm-verity-target.c 1 << v->data_dev_block_bits, v 696 drivers/md/dm-verity-target.c 1 << v->hash_dev_block_bits, v 697 drivers/md/dm-verity-target.c (unsigned long long)v->data_blocks, v 698 drivers/md/dm-verity-target.c (unsigned long long)v->hash_start, v 699 drivers/md/dm-verity-target.c v->alg_name v 701 drivers/md/dm-verity-target.c for (x = 0; x < v->digest_size; x++) v 702 drivers/md/dm-verity-target.c DMEMIT("%02x", v->root_digest[x]); v 704 drivers/md/dm-verity-target.c if (!v->salt_size) v 707 drivers/md/dm-verity-target.c for (x = 0; x < v->salt_size; x++) v 708 drivers/md/dm-verity-target.c DMEMIT("%02x", v->salt[x]); v 709 drivers/md/dm-verity-target.c if (v->mode != DM_VERITY_MODE_EIO) v 711 drivers/md/dm-verity-target.c if (verity_fec_is_enabled(v)) v 713 drivers/md/dm-verity-target.c if (v->zero_digest) v 715 drivers/md/dm-verity-target.c if (v->validated_blocks) v 717 drivers/md/dm-verity-target.c if (v->signature_key_desc) v 722 drivers/md/dm-verity-target.c if (v->mode != DM_VERITY_MODE_EIO) { v 724 drivers/md/dm-verity-target.c switch (v->mode) { v 735 drivers/md/dm-verity-target.c if (v->zero_digest) v 737 drivers/md/dm-verity-target.c if (v->validated_blocks) v 739 drivers/md/dm-verity-target.c sz = verity_fec_status_table(v, sz, result, maxlen); v 740 drivers/md/dm-verity-target.c if (v->signature_key_desc) v 742 drivers/md/dm-verity-target.c " %s", v->signature_key_desc); v 749 drivers/md/dm-verity-target.c struct dm_verity *v = ti->private; v 751 drivers/md/dm-verity-target.c *bdev = v->data_dev->bdev; v 753 drivers/md/dm-verity-target.c if (v->data_start || v 754 drivers/md/dm-verity-target.c ti->len != i_size_read(v->data_dev->bdev->bd_inode) >> SECTOR_SHIFT) v 762 drivers/md/dm-verity-target.c struct dm_verity *v = ti->private; v 764 drivers/md/dm-verity-target.c return fn(ti, v->data_dev, v->data_start, ti->len, data); v 769 drivers/md/dm-verity-target.c struct dm_verity *v = ti->private; v 771 drivers/md/dm-verity-target.c if (limits->logical_block_size < 1 << v->data_dev_block_bits) v 772 drivers/md/dm-verity-target.c limits->logical_block_size = 1 << v->data_dev_block_bits; v 774 drivers/md/dm-verity-target.c if (limits->physical_block_size < 1 << v->data_dev_block_bits) v 775 drivers/md/dm-verity-target.c limits->physical_block_size = 1 << v->data_dev_block_bits; v 782 drivers/md/dm-verity-target.c struct dm_verity *v = ti->private; v 784 drivers/md/dm-verity-target.c if (v->verify_wq) v 785 drivers/md/dm-verity-target.c destroy_workqueue(v->verify_wq); v 787 drivers/md/dm-verity-target.c if (v->bufio) v 788 drivers/md/dm-verity-target.c dm_bufio_client_destroy(v->bufio); v 790 drivers/md/dm-verity-target.c kvfree(v->validated_blocks); v 791 drivers/md/dm-verity-target.c kfree(v->salt); v 792 drivers/md/dm-verity-target.c kfree(v->root_digest); v 793 drivers/md/dm-verity-target.c kfree(v->zero_digest); v 795 drivers/md/dm-verity-target.c if (v->tfm) v 796 drivers/md/dm-verity-target.c crypto_free_ahash(v->tfm); v 798 drivers/md/dm-verity-target.c kfree(v->alg_name); v 800 drivers/md/dm-verity-target.c if (v->hash_dev) v 801 drivers/md/dm-verity-target.c dm_put_device(ti, v->hash_dev); v 803 drivers/md/dm-verity-target.c if (v->data_dev) v 804 drivers/md/dm-verity-target.c dm_put_device(ti, v->data_dev); v 806 drivers/md/dm-verity-target.c verity_fec_dtr(v); v 808 drivers/md/dm-verity-target.c kfree(v->signature_key_desc); v 810 drivers/md/dm-verity-target.c kfree(v); v 813 drivers/md/dm-verity-target.c static int verity_alloc_most_once(struct dm_verity *v) v 815 drivers/md/dm-verity-target.c struct dm_target *ti = v->ti; v 818 drivers/md/dm-verity-target.c if (v->data_blocks > INT_MAX) { v 823 drivers/md/dm-verity-target.c v->validated_blocks = kvcalloc(BITS_TO_LONGS(v->data_blocks), v 826 drivers/md/dm-verity-target.c if (!v->validated_blocks) { v 834 drivers/md/dm-verity-target.c static int verity_alloc_zero_digest(struct dm_verity *v) v 840 drivers/md/dm-verity-target.c v->zero_digest = kmalloc(v->digest_size, GFP_KERNEL); v 842 drivers/md/dm-verity-target.c if (!v->zero_digest) v 845 drivers/md/dm-verity-target.c req = kmalloc(v->ahash_reqsize, GFP_KERNEL); v 850 drivers/md/dm-verity-target.c zero_data = kzalloc(1 << v->data_dev_block_bits, GFP_KERNEL); v 855 drivers/md/dm-verity-target.c r = verity_hash(v, req, zero_data, 1 << v->data_dev_block_bits, v 856 drivers/md/dm-verity-target.c v->zero_digest); v 865 drivers/md/dm-verity-target.c static int verity_parse_opt_args(struct dm_arg_set *as, struct dm_verity *v, v 870 drivers/md/dm-verity-target.c struct dm_target *ti = v->ti; v 889 drivers/md/dm-verity-target.c v->mode = DM_VERITY_MODE_LOGGING; v 893 drivers/md/dm-verity-target.c v->mode = DM_VERITY_MODE_RESTART; v 897 drivers/md/dm-verity-target.c r = verity_alloc_zero_digest(v); v 905 drivers/md/dm-verity-target.c r = verity_alloc_most_once(v); v 911 drivers/md/dm-verity-target.c r = verity_fec_parse_opt_args(as, v, &argc, arg_name); v 916 drivers/md/dm-verity-target.c r = verity_verify_sig_parse_opt_args(as, v, v 948 drivers/md/dm-verity-target.c struct dm_verity *v; v 959 drivers/md/dm-verity-target.c v = kzalloc(sizeof(struct dm_verity), GFP_KERNEL); v 960 drivers/md/dm-verity-target.c if (!v) { v 964 drivers/md/dm-verity-target.c ti->private = v; v 965 drivers/md/dm-verity-target.c v->ti = ti; v 967 drivers/md/dm-verity-target.c r = verity_fec_ctr_alloc(v); v 989 drivers/md/dm-verity-target.c v->version = num; v 991 drivers/md/dm-verity-target.c r = dm_get_device(ti, argv[1], FMODE_READ, &v->data_dev); v 997 drivers/md/dm-verity-target.c r = dm_get_device(ti, argv[2], FMODE_READ, &v->hash_dev); v 1005 drivers/md/dm-verity-target.c num < bdev_logical_block_size(v->data_dev->bdev) || v 1011 drivers/md/dm-verity-target.c v->data_dev_block_bits = __ffs(num); v 1015 drivers/md/dm-verity-target.c num < bdev_logical_block_size(v->hash_dev->bdev) || v 1021 drivers/md/dm-verity-target.c v->hash_dev_block_bits = __ffs(num); v 1024 drivers/md/dm-verity-target.c (sector_t)(num_ll << (v->data_dev_block_bits - SECTOR_SHIFT)) v 1025 drivers/md/dm-verity-target.c >> (v->data_dev_block_bits - SECTOR_SHIFT) != num_ll) { v 1030 drivers/md/dm-verity-target.c v->data_blocks = num_ll; v 1032 drivers/md/dm-verity-target.c if (ti->len > (v->data_blocks << (v->data_dev_block_bits - SECTOR_SHIFT))) { v 1039 drivers/md/dm-verity-target.c (sector_t)(num_ll << (v->hash_dev_block_bits - SECTOR_SHIFT)) v 1040 drivers/md/dm-verity-target.c >> (v->hash_dev_block_bits - SECTOR_SHIFT) != num_ll) { v 1045 drivers/md/dm-verity-target.c v->hash_start = num_ll; v 1047 drivers/md/dm-verity-target.c v->alg_name = kstrdup(argv[7], GFP_KERNEL); v 1048 drivers/md/dm-verity-target.c if (!v->alg_name) { v 1054 drivers/md/dm-verity-target.c v->tfm = crypto_alloc_ahash(v->alg_name, 0, 0); v 1055 drivers/md/dm-verity-target.c if (IS_ERR(v->tfm)) { v 1057 drivers/md/dm-verity-target.c r = PTR_ERR(v->tfm); v 1058 drivers/md/dm-verity-target.c v->tfm = NULL; v 1067 drivers/md/dm-verity-target.c DMINFO("%s using implementation \"%s\"", v->alg_name, v 1068 drivers/md/dm-verity-target.c crypto_hash_alg_common(v->tfm)->base.cra_driver_name); v 1070 drivers/md/dm-verity-target.c v->digest_size = crypto_ahash_digestsize(v->tfm); v 1071 drivers/md/dm-verity-target.c if ((1 << v->hash_dev_block_bits) < v->digest_size * 2) { v 1076 drivers/md/dm-verity-target.c v->ahash_reqsize = sizeof(struct ahash_request) + v 1077 drivers/md/dm-verity-target.c crypto_ahash_reqsize(v->tfm); v 1079 drivers/md/dm-verity-target.c v->root_digest = kmalloc(v->digest_size, GFP_KERNEL); v 1080 drivers/md/dm-verity-target.c if (!v->root_digest) { v 1085 drivers/md/dm-verity-target.c if (strlen(argv[8]) != v->digest_size * 2 || v 1086 drivers/md/dm-verity-target.c hex2bin(v->root_digest, argv[8], v->digest_size)) { v 1094 drivers/md/dm-verity-target.c v->salt_size = strlen(argv[9]) / 2; v 1095 drivers/md/dm-verity-target.c v->salt = kmalloc(v->salt_size, GFP_KERNEL); v 1096 drivers/md/dm-verity-target.c if (!v->salt) { v 1101 drivers/md/dm-verity-target.c if (strlen(argv[9]) != v->salt_size * 2 || v 1102 drivers/md/dm-verity-target.c hex2bin(v->salt, argv[9], v->salt_size)) { v 1117 drivers/md/dm-verity-target.c r = verity_parse_opt_args(&as, v, &verify_args); v 1131 drivers/md/dm-verity-target.c v->hash_per_block_bits = v 1132 drivers/md/dm-verity-target.c __fls((1 << v->hash_dev_block_bits) / v->digest_size); v 1134 drivers/md/dm-verity-target.c v->levels = 0; v 1135 drivers/md/dm-verity-target.c if (v->data_blocks) v 1136 drivers/md/dm-verity-target.c while (v->hash_per_block_bits * v->levels < 64 && v 1137 drivers/md/dm-verity-target.c (unsigned long long)(v->data_blocks - 1) >> v 1138 drivers/md/dm-verity-target.c (v->hash_per_block_bits * v->levels)) v 1139 drivers/md/dm-verity-target.c v->levels++; v 1141 drivers/md/dm-verity-target.c if (v->levels > DM_VERITY_MAX_LEVELS) { v 1147 drivers/md/dm-verity-target.c hash_position = v->hash_start; v 1148 drivers/md/dm-verity-target.c for (i = v->levels - 1; i >= 0; i--) { v 1150 drivers/md/dm-verity-target.c v->hash_level_block[i] = hash_position; v 1151 drivers/md/dm-verity-target.c s = (v->data_blocks + ((sector_t)1 << ((i + 1) * v->hash_per_block_bits)) - 1) v 1152 drivers/md/dm-verity-target.c >> ((i + 1) * v->hash_per_block_bits); v 1160 drivers/md/dm-verity-target.c v->hash_blocks = hash_position; v 1162 drivers/md/dm-verity-target.c v->bufio = dm_bufio_client_create(v->hash_dev->bdev, v 1163 drivers/md/dm-verity-target.c 1 << v->hash_dev_block_bits, 1, sizeof(struct buffer_aux), v 1165 drivers/md/dm-verity-target.c if (IS_ERR(v->bufio)) { v 1167 drivers/md/dm-verity-target.c r = PTR_ERR(v->bufio); v 1168 drivers/md/dm-verity-target.c v->bufio = NULL; v 1172 drivers/md/dm-verity-target.c if (dm_bufio_get_device_size(v->bufio) < v->hash_blocks) { v 1179 drivers/md/dm-verity-target.c v->verify_wq = alloc_workqueue("kverityd", WQ_CPU_INTENSIVE | WQ_MEM_RECLAIM | WQ_UNBOUND, num_online_cpus()); v 1180 drivers/md/dm-verity-target.c if (!v->verify_wq) { v 1187 drivers/md/dm-verity-target.c v->ahash_reqsize + v->digest_size * 2; v 1189 drivers/md/dm-verity-target.c r = verity_fec_ctr(v); v 68 drivers/md/dm-verity-verify-sig.c struct dm_verity *v, v 73 drivers/md/dm-verity-verify-sig.c struct dm_target *ti = v->ti; v 89 drivers/md/dm-verity-verify-sig.c v->signature_key_desc = kstrdup(sig_key, GFP_KERNEL); v 90 drivers/md/dm-verity-verify-sig.c if (!v->signature_key_desc) v 27 drivers/md/dm-verity-verify-sig.h int verity_verify_sig_parse_opt_args(struct dm_arg_set *as, struct dm_verity *v, v 48 drivers/md/dm-verity-verify-sig.h int verity_verify_sig_parse_opt_args(struct dm_arg_set *as, struct dm_verity *v, v 71 drivers/md/dm-verity.h struct dm_verity *v; v 95 drivers/md/dm-verity.h static inline struct ahash_request *verity_io_hash_req(struct dm_verity *v, v 101 drivers/md/dm-verity.h static inline u8 *verity_io_real_digest(struct dm_verity *v, v 104 drivers/md/dm-verity.h return (u8 *)(io + 1) + v->ahash_reqsize; v 107 drivers/md/dm-verity.h static inline u8 *verity_io_want_digest(struct dm_verity *v, v 110 drivers/md/dm-verity.h return (u8 *)(io + 1) + v->ahash_reqsize + v->digest_size; v 113 drivers/md/dm-verity.h static inline u8 *verity_io_digest_end(struct dm_verity *v, v 116 drivers/md/dm-verity.h return verity_io_want_digest(v, io) + v->digest_size; v 119 drivers/md/dm-verity.h extern int verity_for_bv_block(struct dm_verity *v, struct dm_verity_io *io, v 121 drivers/md/dm-verity.h int (*process)(struct dm_verity *v, v 125 drivers/md/dm-verity.h extern int verity_hash(struct dm_verity *v, struct ahash_request *req, v 128 drivers/md/dm-verity.h extern int verity_hash_for_block(struct dm_verity *v, struct dm_verity_io *io, v 7965 drivers/md/md.c static void *md_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 7968 drivers/md/md.c struct mddev *next_mddev, *mddev = v; v 7971 drivers/md/md.c if (v == (void*)2) v 7975 drivers/md/md.c if (v == (void*)1) v 7987 drivers/md/md.c if (v != (void*)1) v 7993 drivers/md/md.c static void md_seq_stop(struct seq_file *seq, void *v) v 7995 drivers/md/md.c struct mddev *mddev = v; v 7997 drivers/md/md.c if (mddev && v != (void*)1 && v != (void*)2) v 8001 drivers/md/md.c static int md_seq_show(struct seq_file *seq, void *v) v 8003 drivers/md/md.c struct mddev *mddev = v; v 8007 drivers/md/md.c if (v == (void*)1) { v 8019 drivers/md/md.c if (v == (void*)2) { v 40 drivers/md/persistent-data/dm-array.c static void array_block_prepare_for_write(struct dm_block_validator *v, v 52 drivers/md/persistent-data/dm-array.c static int array_block_check(struct dm_block_validator *v, v 431 drivers/md/persistent-data/dm-block-manager.c struct dm_block_validator *v) v 435 drivers/md/persistent-data/dm-block-manager.c if (!v) v 437 drivers/md/persistent-data/dm-block-manager.c r = v->check(v, (struct dm_block *) buf, dm_bufio_get_block_size(bm->bufio)); v 439 drivers/md/persistent-data/dm-block-manager.c DMERR_LIMIT("%s validator check failed for block %llu", v->name, v 443 drivers/md/persistent-data/dm-block-manager.c aux->validator = v; v 445 drivers/md/persistent-data/dm-block-manager.c if (unlikely(aux->validator != v)) { v 447 drivers/md/persistent-data/dm-block-manager.c aux->validator->name, v ? v->name : "NULL", v 456 drivers/md/persistent-data/dm-block-manager.c struct dm_block_validator *v, v 477 drivers/md/persistent-data/dm-block-manager.c r = dm_bm_validate_buffer(bm, to_buffer(*result), aux, v); v 489 drivers/md/persistent-data/dm-block-manager.c dm_block_t b, struct dm_block_validator *v, v 513 drivers/md/persistent-data/dm-block-manager.c r = dm_bm_validate_buffer(bm, to_buffer(*result), aux, v); v 525 drivers/md/persistent-data/dm-block-manager.c dm_block_t b, struct dm_block_validator *v, v 547 drivers/md/persistent-data/dm-block-manager.c r = dm_bm_validate_buffer(bm, to_buffer(*result), aux, v); v 558 drivers/md/persistent-data/dm-block-manager.c dm_block_t b, struct dm_block_validator *v, v 582 drivers/md/persistent-data/dm-block-manager.c aux->validator = v; v 52 drivers/md/persistent-data/dm-block-manager.h void (*prepare_for_write)(struct dm_block_validator *v, struct dm_block *b, size_t block_size); v 57 drivers/md/persistent-data/dm-block-manager.h int (*check)(struct dm_block_validator *v, struct dm_block *b, size_t block_size); v 74 drivers/md/persistent-data/dm-block-manager.h struct dm_block_validator *v, v 78 drivers/md/persistent-data/dm-block-manager.h struct dm_block_validator *v, v 86 drivers/md/persistent-data/dm-block-manager.h struct dm_block_validator *v, v 94 drivers/md/persistent-data/dm-block-manager.h struct dm_block_validator *v, v 18 drivers/md/persistent-data/dm-btree-spine.c static int node_check(struct dm_block_validator *v, v 22 drivers/md/persistent-data/dm-btree-spine.c static void node_prepare_for_write(struct dm_block_validator *v, v 34 drivers/md/persistent-data/dm-btree-spine.c BUG_ON(node_check(v, b, 4096)); v 37 drivers/md/persistent-data/dm-btree-spine.c static int node_check(struct dm_block_validator *v, v 346 drivers/md/persistent-data/dm-btree.c uint64_t *result_key, void *v, size_t value_size) v 369 drivers/md/persistent-data/dm-btree.c memcpy(v, value_ptr(ro_node(s), i), value_size); v 22 drivers/md/persistent-data/dm-space-map-common.c static void index_prepare_for_write(struct dm_block_validator *v, v 34 drivers/md/persistent-data/dm-space-map-common.c static int index_check(struct dm_block_validator *v, v 72 drivers/md/persistent-data/dm-space-map-common.c static void dm_bitmap_prepare_for_write(struct dm_block_validator *v, v 84 drivers/md/persistent-data/dm-space-map-common.c static int dm_bitmap_check(struct dm_block_validator *v, v 235 drivers/md/persistent-data/dm-transaction-manager.c struct dm_block_validator *v, v 248 drivers/md/persistent-data/dm-transaction-manager.c r = dm_bm_write_lock_zero(tm->bm, new_block, v, result); v 264 drivers/md/persistent-data/dm-transaction-manager.c struct dm_block_validator *v, v 279 drivers/md/persistent-data/dm-transaction-manager.c r = dm_bm_read_lock(tm->bm, orig, v, &orig_block); v 290 drivers/md/persistent-data/dm-transaction-manager.c r = dm_bm_write_lock_zero(tm->bm, new, v, result); v 304 drivers/md/persistent-data/dm-transaction-manager.c struct dm_block_validator *v, struct dm_block **result, v 317 drivers/md/persistent-data/dm-transaction-manager.c return dm_bm_write_lock(tm->bm, orig, v, result); v 319 drivers/md/persistent-data/dm-transaction-manager.c r = __shadow_block(tm, orig, v, result); v 329 drivers/md/persistent-data/dm-transaction-manager.c struct dm_block_validator *v, v 333 drivers/md/persistent-data/dm-transaction-manager.c int r = dm_bm_read_try_lock(tm->real->bm, b, v, blk); v 341 drivers/md/persistent-data/dm-transaction-manager.c return dm_bm_read_lock(tm->bm, b, v, blk); v 66 drivers/md/persistent-data/dm-transaction-manager.h struct dm_block_validator *v, v 86 drivers/md/persistent-data/dm-transaction-manager.h struct dm_block_validator *v, v 94 drivers/md/persistent-data/dm-transaction-manager.h struct dm_block_validator *v, v 111 drivers/media/cec/cec-pin.c static void cec_pin_update(struct cec_pin *pin, bool v, bool force) v 113 drivers/media/cec/cec-pin.c if (!force && v == pin->adap->cec_pin_is_high) v 116 drivers/media/cec/cec-pin.c pin->adap->cec_pin_is_high = v; v 118 drivers/media/cec/cec-pin.c u8 ev = v; v 138 drivers/media/cec/cec-pin.c bool v = pin->ops->read(pin->adap); v 140 drivers/media/cec/cec-pin.c cec_pin_update(pin, v, false); v 141 drivers/media/cec/cec-pin.c return v; v 372 drivers/media/cec/cec-pin.c bool v; v 504 drivers/media/cec/cec-pin.c v = val & (1 << (7 - (pin->tx_bit % 10))); v 506 drivers/media/cec/cec-pin.c pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW : v 515 drivers/media/cec/cec-pin.c v = !pin->tx_post_eom && tx_byte_idx == tot_len - 1; v 519 drivers/media/cec/cec-pin.c v = true; v 521 drivers/media/cec/cec-pin.c } else if (v && tx_no_eom(pin)) { v 523 drivers/media/cec/cec-pin.c v = false; v 525 drivers/media/cec/cec-pin.c pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW : v 540 drivers/media/cec/cec-pin.c v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW; v 542 drivers/media/cec/cec-pin.c if (v && (pin->tx_bit < 4 || is_ack_bit)) { v 546 drivers/media/cec/cec-pin.c pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_SHORT : v 550 drivers/media/cec/cec-pin.c pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_LONG : v 553 drivers/media/cec/cec-pin.c pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH : v 566 drivers/media/cec/cec-pin.c v = cec_pin_read(pin); v 576 drivers/media/cec/cec-pin.c if (!v && !is_ack_bit && !pin->tx_generated_poll) { v 603 drivers/media/cec/cec-pin.c ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v; v 655 drivers/media/cec/cec-pin.c bool v; v 664 drivers/media/cec/cec-pin.c v = cec_pin_read(pin); v 665 drivers/media/cec/cec-pin.c if (!v) v 688 drivers/media/cec/cec-pin.c v = cec_pin_read(pin); v 694 drivers/media/cec/cec-pin.c if (v && delta > CEC_TIM_START_BIT_TOTAL_LONG) { v 699 drivers/media/cec/cec-pin.c if (v) v 723 drivers/media/cec/cec-pin.c v = cec_pin_read(pin); v 729 drivers/media/cec/cec-pin.c v << (7 - (pin->rx_bit % 10)); v 732 drivers/media/cec/cec-pin.c pin->rx_eom = v; v 746 drivers/media/cec/cec-pin.c v = cec_pin_read(pin); v 752 drivers/media/cec/cec-pin.c if (v && delta > CEC_TIM_DATA_BIT_TOTAL_LONG) { v 757 drivers/media/cec/cec-pin.c if (v) v 816 drivers/media/cec/cec-pin.c v = cec_pin_read(pin); v 817 drivers/media/cec/cec-pin.c if (v && pin->rx_eom) { v 1073 drivers/media/cec/cec-pin.c u8 v = pin->work_pin_events[idx]; v 1076 drivers/media/cec/cec-pin.c v & CEC_PIN_EVENT_FL_IS_HIGH, v 1077 drivers/media/cec/cec-pin.c v & CEC_PIN_EVENT_FL_DROPPED, v 46 drivers/media/common/b2c2/flexcop-fe-tuner.c flexcop_ibi_value v; v 49 drivers/media/common/b2c2/flexcop-fe-tuner.c v = fc->read_ibi_reg(fc, misc_204); v 52 drivers/media/common/b2c2/flexcop-fe-tuner.c v.misc_204.ACPI1_sig = 1; v 55 drivers/media/common/b2c2/flexcop-fe-tuner.c v.misc_204.ACPI1_sig = 0; v 56 drivers/media/common/b2c2/flexcop-fe-tuner.c v.misc_204.LNB_L_H_sig = 0; v 59 drivers/media/common/b2c2/flexcop-fe-tuner.c v.misc_204.ACPI1_sig = 0; v 60 drivers/media/common/b2c2/flexcop-fe-tuner.c v.misc_204.LNB_L_H_sig = 1; v 66 drivers/media/common/b2c2/flexcop-fe-tuner.c return fc->write_ibi_reg(fc, misc_204, v); v 86 drivers/media/common/b2c2/flexcop-fe-tuner.c flexcop_ibi_value v; v 88 drivers/media/common/b2c2/flexcop-fe-tuner.c v.raw = 0; v 103 drivers/media/common/b2c2/flexcop-fe-tuner.c v.lnb_switch_freq_200.LNB_CTLPrescaler_sig = 1; /* divide by 2 */ v 104 drivers/media/common/b2c2/flexcop-fe-tuner.c v.lnb_switch_freq_200.LNB_CTLHighCount_sig = ax; v 105 drivers/media/common/b2c2/flexcop-fe-tuner.c v.lnb_switch_freq_200.LNB_CTLLowCount_sig = ax == 0 ? 0x1ff : ax; v 106 drivers/media/common/b2c2/flexcop-fe-tuner.c return fc->write_ibi_reg(fc,lnb_switch_freq_200,v); v 227 drivers/media/common/b2c2/flexcop-hw-filter.c flexcop_ibi_value v; v 239 drivers/media/common/b2c2/flexcop-hw-filter.c v = fc->read_ibi_reg(fc, pid_filter_308); v 240 drivers/media/common/b2c2/flexcop-hw-filter.c v.pid_filter_308.EMM_filter_4 = 1; v 241 drivers/media/common/b2c2/flexcop-hw-filter.c v.pid_filter_308.EMM_filter_6 = 0; v 242 drivers/media/common/b2c2/flexcop-hw-filter.c fc->write_ibi_reg(fc, pid_filter_308, v); v 11 drivers/media/common/b2c2/flexcop-misc.c flexcop_ibi_value v = fc->read_ibi_reg(fc,misc_204); v 13 drivers/media/common/b2c2/flexcop-misc.c switch (v.misc_204.Rev_N_sig_revision_hi) { v 28 drivers/media/common/b2c2/flexcop-misc.c v.misc_204.Rev_N_sig_revision_hi); v 32 drivers/media/common/b2c2/flexcop-misc.c if ((fc->has_32_hw_pid_filter = v.misc_204.Rev_N_sig_caps)) v 77 drivers/media/common/b2c2/flexcop-misc.c flexcop_ibi_value v; v 80 drivers/media/common/b2c2/flexcop-misc.c v = fc->read_ibi_reg(fc, reg+4*i); v 81 drivers/media/common/b2c2/flexcop-misc.c deb_rdump("0x%03x: %08x, ", reg+4*i, v.raw); v 163 drivers/media/common/b2c2/flexcop-reg.h flexcop_ibi_value v = fc->read_ibi_reg(fc,reg); \ v 164 drivers/media/common/b2c2/flexcop-reg.h v.reg.attr = val; \ v 165 drivers/media/common/b2c2/flexcop-reg.h fc->write_ibi_reg(fc,reg,v); \ v 34 drivers/media/common/b2c2/flexcop-sram.c flexcop_ibi_value v; v 35 drivers/media/common/b2c2/flexcop-sram.c v = fc->read_ibi_reg(fc, sram_dest_reg_714); v 44 drivers/media/common/b2c2/flexcop-sram.c v.sram_dest_reg_714.NET_Dest = target; v 46 drivers/media/common/b2c2/flexcop-sram.c v.sram_dest_reg_714.CAI_Dest = target; v 48 drivers/media/common/b2c2/flexcop-sram.c v.sram_dest_reg_714.CAO_Dest = target; v 50 drivers/media/common/b2c2/flexcop-sram.c v.sram_dest_reg_714.MEDIA_Dest = target; v 52 drivers/media/common/b2c2/flexcop-sram.c fc->write_ibi_reg(fc,sram_dest_reg_714,v); v 67 drivers/media/common/b2c2/flexcop-sram.c flexcop_ibi_value v = fc->read_ibi_reg(fc,sram_dest_reg_714); v 68 drivers/media/common/b2c2/flexcop-sram.c v.sram_dest_reg_714.ctrl_usb_wan = usb_wan; v 69 drivers/media/common/b2c2/flexcop-sram.c v.sram_dest_reg_714.ctrl_sramdma = sramdma; v 70 drivers/media/common/b2c2/flexcop-sram.c v.sram_dest_reg_714.ctrl_maximumfill = maximumfill; v 71 drivers/media/common/b2c2/flexcop-sram.c fc->write_ibi_reg(fc,sram_dest_reg_714,v); v 1165 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_srgb_to_rgb(double v) v 1167 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c if (v < -0.04045) v 1168 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return pow((-v + 0.055) / 1.055, 2.4); v 1169 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return (v <= 0.04045) ? v / 12.92 : pow((v + 0.055) / 1.055, 2.4); v 1172 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_rgb_to_srgb(double v) v 1174 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c if (v <= -0.0031308) v 1175 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return -1.055 * pow(-v, 1.0 / 2.4) + 0.055; v 1176 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c if (v <= 0.0031308) v 1177 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return v * 12.92; v 1178 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return 1.055 * pow(v, 1.0 / 2.4) - 0.055; v 1181 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_rgb_to_smpte240m(double v) v 1183 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return (v <= 0.0228) ? v * 4.0 : 1.1115 * pow(v, 0.45) - 0.1115; v 1186 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_rgb_to_rec709(double v) v 1188 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c if (v <= -0.018) v 1189 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return -1.099 * pow(-v, 0.45) + 0.099; v 1190 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return (v < 0.018) ? v * 4.5 : 1.099 * pow(v, 0.45) - 0.099; v 1193 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_rec709_to_rgb(double v) v 1195 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return (v < 0.081) ? v / 4.5 : pow((v + 0.099) / 1.099, 1.0 / 0.45); v 1198 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_rgb_to_oprgb(double v) v 1200 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return pow(v, 1.0 / 2.19921875); v 1203 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_rgb_to_dcip3(double v) v 1205 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return pow(v, 1.0 / 2.6); v 1208 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_rgb_to_smpte2084(double v) v 1221 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c v /= 100.0; v 1222 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c v = pow(v, m1); v 1223 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return pow((c1 + c2 * v) / (1 + c3 * v), m2); v 1226 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c static double transfer_srgb_to_rec709(double v) v 1228 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return transfer_rgb_to_rec709(transfer_srgb_to_rgb(v)); v 537 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c static inline int rec709_to_linear(int v) v 539 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c v = clamp(v, 0, 0xff0); v 540 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return tpg_rec709_to_linear[v]; v 543 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c static inline int linear_to_rec709(int v) v 545 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c v = clamp(v, 0, 0xff0); v 546 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return tpg_linear_to_rec709[v]; v 550 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c int *h, int *s, int *v) v 563 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c *v = max_rgb; v 625 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c #define COEFF(v, r) ((int)(0.5 + (v) * (r) * 256.0)) v 740 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c #define COEFF(v, r) ((int)(0.5 + (v) * ((255.0 * 255.0 * 16.0) / (r)))) v 960 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c int h, s, v; v 962 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c color_to_hsv(tpg, r, g, b, &h, &s, &v); v 965 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->colors[k][2] = v; v 126 drivers/media/dvb-frontends/bcm3510.c static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v) v 128 drivers/media/dvb-frontends/bcm3510.c return bcm3510_writebytes(state,reg,&v.raw,1); v 131 drivers/media/dvb-frontends/bcm3510.c static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v) v 133 drivers/media/dvb-frontends/bcm3510.c return bcm3510_readbytes(state,reg,&v->raw,1); v 139 drivers/media/dvb-frontends/bcm3510.c bcm3510_register_value v; v 142 drivers/media/dvb-frontends/bcm3510.c v.HABADR_a6.HABADR = 0; v 143 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_writeB(st,0xa6,v)) < 0) v 147 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_readB(st,0xa7,&v)) < 0) v 149 drivers/media/dvb-frontends/bcm3510.c buf[i] = v.HABDATA_a7; v 156 drivers/media/dvb-frontends/bcm3510.c bcm3510_register_value v,hab; v 162 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_readB(st,0xa8,&v)) < 0) v 164 drivers/media/dvb-frontends/bcm3510.c if (v.HABSTAT_a8.HABR) { v 166 drivers/media/dvb-frontends/bcm3510.c v.HABSTAT_a8.HABR = 0; v 167 drivers/media/dvb-frontends/bcm3510.c bcm3510_writeB(st,0xa8,v); v 185 drivers/media/dvb-frontends/bcm3510.c v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1; v 186 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_writeB(st,0xa8,v)) < 0) v 194 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_readB(st,0xa8,&v)) < 0) v 197 drivers/media/dvb-frontends/bcm3510.c if (!v.HABSTAT_a8.HABR) v 683 drivers/media/dvb-frontends/bcm3510.c bcm3510_register_value v; v 685 drivers/media/dvb-frontends/bcm3510.c bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1; v 686 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_writeB(st,0xa0,v)) < 0) v 692 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_readB(st,0xa2,&v)) < 0) v 695 drivers/media/dvb-frontends/bcm3510.c if (v.APSTAT1_a2.RESET) v 704 drivers/media/dvb-frontends/bcm3510.c bcm3510_register_value v; v 708 drivers/media/dvb-frontends/bcm3510.c v.raw = 0; v 709 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_writeB(st,0xa0,v)) < 0) v 715 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_readB(st,0xa2,&v)) < 0) v 719 drivers/media/dvb-frontends/bcm3510.c if (!v.APSTAT1_a2.RESET) v 729 drivers/media/dvb-frontends/bcm3510.c bcm3510_register_value v; v 732 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_readB(st,0xa2,&v)) < 0) v 734 drivers/media/dvb-frontends/bcm3510.c if (v.APSTAT1_a2.RUN) { v 745 drivers/media/dvb-frontends/bcm3510.c v.TSTCTL_2e.CTL = 0; v 746 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_writeB(st,0x2e,v)) < 0) v 800 drivers/media/dvb-frontends/bcm3510.c bcm3510_register_value v; v 818 drivers/media/dvb-frontends/bcm3510.c if ((ret = bcm3510_readB(state,0xe0,&v)) < 0) v 821 drivers/media/dvb-frontends/bcm3510.c deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER); v 823 drivers/media/dvb-frontends/bcm3510.c if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */ v 824 drivers/media/dvb-frontends/bcm3510.c (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */ v 827 drivers/media/dvb-frontends/bcm3510.c info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER); v 330 drivers/media/dvb-frontends/dib0090.c u16 v; v 333 drivers/media/dvb-frontends/dib0090.c v = dib0090_read_reg(state, 0x1a); v 338 drivers/media/dvb-frontends/dib0090.c dprintk("Tuner identification (Version = 0x%04x)\n", v); v 341 drivers/media/dvb-frontends/dib0090.c v &= ~KROSUS_PLL_LOCKED; v 343 drivers/media/dvb-frontends/dib0090.c identity->version = v & 0xff; v 344 drivers/media/dvb-frontends/dib0090.c identity->product = (v >> 8) & 0xf; v 424 drivers/media/dvb-frontends/dib0090.c u16 v = dib0090_fw_read_reg(state, 0x1a); v 428 drivers/media/dvb-frontends/dib0090.c dprintk("FE: Tuner identification (Version = 0x%04x)\n", v); v 431 drivers/media/dvb-frontends/dib0090.c v &= ~KROSUS_PLL_LOCKED; v 433 drivers/media/dvb-frontends/dib0090.c identity->version = v & 0xff; v 434 drivers/media/dvb-frontends/dib0090.c identity->product = (v >> 8) & 0xf; v 512 drivers/media/dvb-frontends/dib0090.c u16 PllCfg, i, v; v 555 drivers/media/dvb-frontends/dib0090.c v = !!(dib0090_read_reg(state, 0x1a) & 0x800); v 556 drivers/media/dvb-frontends/dib0090.c if (v) v 580 drivers/media/dvb-frontends/dib0090.c u16 v; v 592 drivers/media/dvb-frontends/dib0090.c v = (0 << 15) | ((!cfg->analog_output) << 14) | (1 << 9) | (0 << 8) | (cfg->clkouttobamse << 4) | (0 << 2) | (0); v 594 drivers/media/dvb-frontends/dib0090.c v |= cfg->clkoutdrive << 5; v 596 drivers/media/dvb-frontends/dib0090.c v |= 7 << 5; v 598 drivers/media/dvb-frontends/dib0090.c v |= 2 << 10; v 599 drivers/media/dvb-frontends/dib0090.c dib0090_fw_write_reg(state, 0x23, v); v 626 drivers/media/dvb-frontends/dib0090.c v = !!(dib0090_fw_read_reg(state, 0x1a) & 0x800); v 627 drivers/media/dvb-frontends/dib0090.c if (v) v 919 drivers/media/dvb-frontends/dib0090.c u16 i, v, gain_reg[4] = { 0 }, gain; v 973 drivers/media/dvb-frontends/dib0090.c v = 0; /* force the gain to write for the current amp to be null */ v 975 drivers/media/dvb-frontends/dib0090.c v = g[2]; /* force this amp to be full gain */ v 977 drivers/media/dvb-frontends/dib0090.c v = ((ref - (g[1] - g[0])) * g[2]) / g[0]; v 980 drivers/media/dvb-frontends/dib0090.c gain_reg[0] = v; v 982 drivers/media/dvb-frontends/dib0090.c gain_reg[0] |= v << 7; v 984 drivers/media/dvb-frontends/dib0090.c gain_reg[1] = v; v 986 drivers/media/dvb-frontends/dib0090.c gain_reg[1] |= v << 7; v 988 drivers/media/dvb-frontends/dib0090.c gain_reg[2] = v | state->rf_lt_def; v 990 drivers/media/dvb-frontends/dib0090.c gain_reg[3] = v << 3; v 992 drivers/media/dvb-frontends/dib0090.c gain_reg[3] |= v << 8; v 1012 drivers/media/dvb-frontends/dib0090.c v = gain_reg[i]; v 1013 drivers/media/dvb-frontends/dib0090.c if (force || state->gain_reg[i] != v) { v 1014 drivers/media/dvb-frontends/dib0090.c state->gain_reg[i] = v; v 1015 drivers/media/dvb-frontends/dib0090.c dib0090_write_reg(state, gain_reg_addr[i], v); v 19 drivers/media/dvb-frontends/dib3000mb_priv.h #define wr_foreach(a,v) { int i; \ v 20 drivers/media/dvb-frontends/dib3000mb_priv.h if (sizeof(a) != sizeof(v)) \ v 21 drivers/media/dvb-frontends/dib3000mb_priv.h pr_err("sizeof: %zu %zu is different", sizeof(a), sizeof(v));\ v 23 drivers/media/dvb-frontends/dib3000mb_priv.h wr(a[i],v[i]); \ v 24 drivers/media/dvb-frontends/dib7000m.h #define DIB7000M_GPIO_PWM_POS0(v) ((v & 0xf) << 12) v 25 drivers/media/dvb-frontends/dib7000m.h #define DIB7000M_GPIO_PWM_POS1(v) ((v & 0xf) << 8 ) v 26 drivers/media/dvb-frontends/dib7000m.h #define DIB7000M_GPIO_PWM_POS2(v) ((v & 0xf) << 4 ) v 27 drivers/media/dvb-frontends/dib7000m.h #define DIB7000M_GPIO_PWM_POS3(v) (v & 0xf) v 441 drivers/media/dvb-frontends/dib7000p.c static int dib7000p_set_agc1_min(struct dvb_frontend *fe, u16 v) v 444 drivers/media/dvb-frontends/dib7000p.c return dib7000p_write_word(state, 108, v); v 21 drivers/media/dvb-frontends/dib7000p.h #define DIB7000P_GPIO_PWM_POS0(v) ((v & 0xf) << 12) v 22 drivers/media/dvb-frontends/dib7000p.h #define DIB7000P_GPIO_PWM_POS1(v) ((v & 0xf) << 8 ) v 23 drivers/media/dvb-frontends/dib7000p.h #define DIB7000P_GPIO_PWM_POS2(v) ((v & 0xf) << 4 ) v 24 drivers/media/dvb-frontends/dib7000p.h #define DIB7000P_GPIO_PWM_POS3(v) (v & 0xf) v 52 drivers/media/dvb-frontends/dib7000p.h int (*set_agc1_min)(struct dvb_frontend *fe, u16 v); v 21 drivers/media/dvb-frontends/dib8000.h #define DIB8000_GPIO_PWM_POS0(v) ((v & 0xf) << 12) v 22 drivers/media/dvb-frontends/dib8000.h #define DIB8000_GPIO_PWM_POS1(v) ((v & 0xf) << 8 ) v 23 drivers/media/dvb-frontends/dib8000.h #define DIB8000_GPIO_PWM_POS2(v) ((v & 0xf) << 4 ) v 24 drivers/media/dvb-frontends/dib8000.h #define DIB8000_GPIO_PWM_POS3(v) (v & 0xf) v 148 drivers/media/dvb-frontends/dibx000_common.h #define BANDWIDTH_TO_KHZ(v) ((v) / 1000) v 149 drivers/media/dvb-frontends/dibx000_common.h #define BANDWIDTH_TO_HZ(v) ((v) * 1000) v 42 drivers/media/dvb-frontends/itd1000.c static int itd1000_write_regs(struct itd1000_state *state, u8 reg, u8 v[], u8 len) v 57 drivers/media/dvb-frontends/itd1000.c memcpy(&buf[1], v, len); v 86 drivers/media/dvb-frontends/itd1000.c static inline int itd1000_write_reg(struct itd1000_state *state, u8 r, u8 v) v 88 drivers/media/dvb-frontends/itd1000.c u8 tmp = v; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */ v 756 drivers/media/dvb-frontends/lgs8gxx.c u16 v; v 763 drivers/media/dvb-frontends/lgs8gxx.c v = agc_lvl[0]; v 764 drivers/media/dvb-frontends/lgs8gxx.c v <<= 8; v 765 drivers/media/dvb-frontends/lgs8gxx.c v |= agc_lvl[1]; v 767 drivers/media/dvb-frontends/lgs8gxx.c dprintk("agc_lvl: 0x%04X\n", v); v 769 drivers/media/dvb-frontends/lgs8gxx.c if (v < 0x100) v 771 drivers/media/dvb-frontends/lgs8gxx.c else if (v < 0x190) v 773 drivers/media/dvb-frontends/lgs8gxx.c else if (v < 0x2A8) v 775 drivers/media/dvb-frontends/lgs8gxx.c else if (v < 0x381) v 777 drivers/media/dvb-frontends/lgs8gxx.c else if (v < 0x400) v 779 drivers/media/dvb-frontends/lgs8gxx.c else if (v == 0x400) v 835 drivers/media/dvb-frontends/lgs8gxx.c s16 v = 0; v 840 drivers/media/dvb-frontends/lgs8gxx.c v |= t; v 841 drivers/media/dvb-frontends/lgs8gxx.c v <<= 8; v 843 drivers/media/dvb-frontends/lgs8gxx.c v |= t; v 845 drivers/media/dvb-frontends/lgs8gxx.c *signal = v; v 968 drivers/media/dvb-frontends/lgs8gxx.c u8 v = 0x80 | priv->config->tuner_address; v 969 drivers/media/dvb-frontends/lgs8gxx.c return lgs8gxx_write_reg(priv, 0x01, v); v 730 drivers/media/dvb-frontends/mb86a16.c int v, int R, v 740 drivers/media/dvb-frontends/mb86a16.c crnt_swp_freq = fOSC_start * 1000 + v * swp_ofs; v 758 drivers/media/dvb-frontends/mb86a16.c static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V, int vmax, int vmin, v 763 drivers/media/dvb-frontends/mb86a16.c if ((i % 2 == 1) && (v <= vmax)) { v 765 drivers/media/dvb-frontends/mb86a16.c if ((v - 1 == vmin) && v 766 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) >= 0) && v 767 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) >= 0) && v 768 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) > *(V + 30 + v)) && v 769 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) > SIGMIN)) { v 772 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v - 1); v 773 drivers/media/dvb-frontends/mb86a16.c } else if ((v == vmax) && v 774 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) >= 0) && v 775 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) >= 0) && v 776 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > *(V + 30 + v - 1)) && v 777 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > SIGMIN)) { v 780 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v); v 781 drivers/media/dvb-frontends/mb86a16.c } else if ((*(V + 30 + v) > 0) && v 782 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) > 0) && v 783 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 2) > 0) && v 784 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 3) > 0) && v 785 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) > *(V + 30 + v)) && v 786 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 2) > *(V + 30 + v - 3)) && v 787 drivers/media/dvb-frontends/mb86a16.c ((*(V + 30 + v - 1) > SIGMIN) || v 788 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 2) > SIGMIN))) { v 790 drivers/media/dvb-frontends/mb86a16.c if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) { v 792 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v - 1); v 795 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v - 2); v 797 drivers/media/dvb-frontends/mb86a16.c } else if ((v == vmax) && v 798 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) >= 0) && v 799 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) >= 0) && v 800 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 2) >= 0) && v 801 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > *(V + 30 + v - 2)) && v 802 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) > *(V + 30 + v - 2)) && v 803 drivers/media/dvb-frontends/mb86a16.c ((*(V + 30 + v) > SIGMIN) || v 804 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v - 1) > SIGMIN))) { v 806 drivers/media/dvb-frontends/mb86a16.c if (*(V + 30 + v) >= *(V + 30 + v - 1)) { v 808 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v); v 811 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v - 1); v 816 drivers/media/dvb-frontends/mb86a16.c } else if ((i % 2 == 0) && (v >= vmin)) { v 818 drivers/media/dvb-frontends/mb86a16.c if ((*(V + 30 + v) > 0) && v 819 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > 0) && v 820 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) > 0) && v 821 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > *(V + 30 + v)) && v 822 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > *(V + 30 + v + 2)) && v 823 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > SIGMIN)) { v 826 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v + 1); v 827 drivers/media/dvb-frontends/mb86a16.c } else if ((v + 1 == vmax) && v 828 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) >= 0) && v 829 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) >= 0) && v 830 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > *(V + 30 + v)) && v 831 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > SIGMIN)) { v 834 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v); v 835 drivers/media/dvb-frontends/mb86a16.c } else if ((v == vmin) && v 836 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > 0) && v 837 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > 0) && v 838 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) > 0) && v 839 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > *(V + 30 + v + 1)) && v 840 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > *(V + 30 + v + 2)) && v 841 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > SIGMIN)) { v 844 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v); v 845 drivers/media/dvb-frontends/mb86a16.c } else if ((*(V + 30 + v) >= 0) && v 846 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) >= 0) && v 847 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) >= 0) && v 848 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 3) >= 0) && v 849 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > *(V + 30 + v)) && v 850 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) > *(V + 30 + v + 3)) && v 851 drivers/media/dvb-frontends/mb86a16.c ((*(V + 30 + v + 1) > SIGMIN) || v 852 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) > SIGMIN))) { v 854 drivers/media/dvb-frontends/mb86a16.c if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) { v 856 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v + 1); v 859 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v + 2); v 861 drivers/media/dvb-frontends/mb86a16.c } else if ((*(V + 30 + v) >= 0) && v 862 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) >= 0) && v 863 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) >= 0) && v 864 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 3) >= 0) && v 865 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > *(V + 30 + v + 2)) && v 866 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > *(V + 30 + v + 2)) && v 867 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) > *(V + 30 + v + 3)) && v 868 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > *(V + 30 + v + 3)) && v 869 drivers/media/dvb-frontends/mb86a16.c ((*(V + 30 + v) > SIGMIN) || v 870 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > SIGMIN))) { v 872 drivers/media/dvb-frontends/mb86a16.c if (*(V + 30 + v) >= *(V + 30 + v + 1)) { v 874 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v); v 877 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v + 1); v 879 drivers/media/dvb-frontends/mb86a16.c } else if ((v + 2 == vmin) && v 880 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v) >= 0) && v 881 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) >= 0) && v 882 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) >= 0) && v 883 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 1) > *(V + 30 + v)) && v 884 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) > *(V + 30 + v)) && v 885 drivers/media/dvb-frontends/mb86a16.c ((*(V + 30 + v + 1) > SIGMIN) || v 886 drivers/media/dvb-frontends/mb86a16.c (*(V + 30 + v + 2) > SIGMIN))) { v 888 drivers/media/dvb-frontends/mb86a16.c if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) { v 890 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v + 1); v 893 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v + 2); v 895 drivers/media/dvb-frontends/mb86a16.c } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) { v 897 drivers/media/dvb-frontends/mb86a16.c *SIG1 = *(V + 30 + v); v 1025 drivers/media/dvb-frontends/mb86a16.c int v, vmax, vmin; v 1157 drivers/media/dvb-frontends/mb86a16.c v = 0; v 1161 drivers/media/dvb-frontends/mb86a16.c v, R, swp_ofs, &fOSC, v 1184 drivers/media/dvb-frontends/mb86a16.c V[30 + v] = SIG1 ; v 1185 drivers/media/dvb-frontends/mb86a16.c swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin, v 1225 drivers/media/dvb-frontends/mb86a16.c if (v > vmax) v 1227 drivers/media/dvb-frontends/mb86a16.c if (v < vmin) v 1237 drivers/media/dvb-frontends/mb86a16.c v = (i + 1) / 2; v 1239 drivers/media/dvb-frontends/mb86a16.c v = -i / 2; v 395 drivers/media/dvb-frontends/mn88443x.c u32 m, v; v 433 drivers/media/dvb-frontends/mn88443x.c v = ADCSET1_T_REFSEL_1_5V; v 434 drivers/media/dvb-frontends/mn88443x.c regmap_update_bits(r_t, ADCSET1_T, m, v); v 437 drivers/media/dvb-frontends/mn88443x.c v = AGCSET2_T_IFPOLINV_INC | AGCSET2_T_RFPOLINV_INC; v 438 drivers/media/dvb-frontends/mn88443x.c regmap_update_bits(r_t, AGCSET2_T, v, v); v 452 drivers/media/dvb-frontends/mn88443x.c u32 m, v; v 455 drivers/media/dvb-frontends/mn88443x.c v = MDSET_T_MDAUTO_AUTO | MDSET_T_FFTS_MODE3 | MDSET_T_GI_1_8; v 456 drivers/media/dvb-frontends/mn88443x.c regmap_update_bits(r_t, MDSET_T, m, v); v 422 drivers/media/dvb-frontends/mt312.c const enum fe_sec_voltage v) v 428 drivers/media/dvb-frontends/mt312.c if (v > SEC_VOLTAGE_OFF) v 431 drivers/media/dvb-frontends/mt312.c val = volt_tab[v]; v 41 drivers/media/dvb-frontends/mxl5xx.c #define BYTE0(v) ((v >> 0) & 0xff) v 42 drivers/media/dvb-frontends/mxl5xx.c #define BYTE1(v) ((v >> 8) & 0xff) v 43 drivers/media/dvb-frontends/mxl5xx.c #define BYTE2(v) ((v >> 16) & 0xff) v 44 drivers/media/dvb-frontends/mxl5xx.c #define BYTE3(v) ((v >> 24) & 0xff) v 951 drivers/media/dvb-frontends/rtl2832_sdr.c struct v4l2_tuner *v) v 957 drivers/media/dvb-frontends/rtl2832_sdr.c dev_dbg(&pdev->dev, "index=%d type=%d\n", v->index, v->type); v 959 drivers/media/dvb-frontends/rtl2832_sdr.c if (v->index == 0) { v 960 drivers/media/dvb-frontends/rtl2832_sdr.c strscpy(v->name, "ADC: Realtek RTL2832", sizeof(v->name)); v 961 drivers/media/dvb-frontends/rtl2832_sdr.c v->type = V4L2_TUNER_ADC; v 962 drivers/media/dvb-frontends/rtl2832_sdr.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 963 drivers/media/dvb-frontends/rtl2832_sdr.c v->rangelow = 300000; v 964 drivers/media/dvb-frontends/rtl2832_sdr.c v->rangehigh = 3200000; v 966 drivers/media/dvb-frontends/rtl2832_sdr.c } else if (v->index == 1 && v 968 drivers/media/dvb-frontends/rtl2832_sdr.c ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, g_tuner, v); v 969 drivers/media/dvb-frontends/rtl2832_sdr.c } else if (v->index == 1) { v 970 drivers/media/dvb-frontends/rtl2832_sdr.c strscpy(v->name, "RF: <unknown>", sizeof(v->name)); v 971 drivers/media/dvb-frontends/rtl2832_sdr.c v->type = V4L2_TUNER_RF; v 972 drivers/media/dvb-frontends/rtl2832_sdr.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 973 drivers/media/dvb-frontends/rtl2832_sdr.c v->rangelow = 50000000; v 974 drivers/media/dvb-frontends/rtl2832_sdr.c v->rangehigh = 2000000000; v 983 drivers/media/dvb-frontends/rtl2832_sdr.c const struct v4l2_tuner *v) v 991 drivers/media/dvb-frontends/rtl2832_sdr.c if (v->index == 0) { v 993 drivers/media/dvb-frontends/rtl2832_sdr.c } else if (v->index == 1 && v 995 drivers/media/dvb-frontends/rtl2832_sdr.c ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, s_tuner, v); v 996 drivers/media/dvb-frontends/rtl2832_sdr.c } else if (v->index == 1) { v 1295 drivers/media/dvb-frontends/rtl2832_sdr.c static void rtl2832_sdr_video_release(struct v4l2_device *v) v 1298 drivers/media/dvb-frontends/rtl2832_sdr.c container_of(v, struct rtl2832_sdr_dev, v4l2_dev); v 798 drivers/media/dvb-frontends/s5h1409.c static int s5h1409_qam256_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) v 804 drivers/media/dvb-frontends/s5h1409.c if (v < qam256_snr_tab[i].val) { v 813 drivers/media/dvb-frontends/s5h1409.c static int s5h1409_qam64_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) v 819 drivers/media/dvb-frontends/s5h1409.c if (v < qam64_snr_tab[i].val) { v 828 drivers/media/dvb-frontends/s5h1409.c static int s5h1409_vsb_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) v 834 drivers/media/dvb-frontends/s5h1409.c if (v > vsb_snr_tab[i].val) { v 712 drivers/media/dvb-frontends/s5h1411.c static int s5h1411_qam256_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) v 718 drivers/media/dvb-frontends/s5h1411.c if (v < qam256_snr_tab[i].val) { v 727 drivers/media/dvb-frontends/s5h1411.c static int s5h1411_qam64_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) v 733 drivers/media/dvb-frontends/s5h1411.c if (v < qam64_snr_tab[i].val) { v 742 drivers/media/dvb-frontends/s5h1411.c static int s5h1411_vsb_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) v 748 drivers/media/dvb-frontends/s5h1411.c if (v > vsb_snr_tab[i].val) { v 467 drivers/media/dvb-frontends/s5h1420.c u8 v; v 479 drivers/media/dvb-frontends/s5h1420.c v = s5h1420_readreg(state, Loop01); v 480 drivers/media/dvb-frontends/s5h1420.c s5h1420_writereg(state, Loop01, v & 0x7f); v 484 drivers/media/dvb-frontends/s5h1420.c s5h1420_writereg(state, Loop01, v | 0x80); v 496 drivers/media/dvb-frontends/s5h1420.c u8 v; v 506 drivers/media/dvb-frontends/s5h1420.c v = s5h1420_readreg(state, Loop01); v 507 drivers/media/dvb-frontends/s5h1420.c s5h1420_writereg(state, Loop01, v & 0xbf); v 511 drivers/media/dvb-frontends/s5h1420.c s5h1420_writereg(state, Loop01, v | 0x40); v 212 drivers/media/dvb-frontends/tc90522.c u8 v; v 217 drivers/media/dvb-frontends/tc90522.c v = (val[2] & 0x70) >> 4; v 218 drivers/media/dvb-frontends/tc90522.c c->modulation = (v == 7) ? PSK_8 : QPSK; v 219 drivers/media/dvb-frontends/tc90522.c c->fec_inner = fec_conv_sat[v]; v 225 drivers/media/dvb-frontends/tc90522.c v = (val[2] & 0x07); v 226 drivers/media/dvb-frontends/tc90522.c c->layer[1].fec = fec_conv_sat[v]; v 227 drivers/media/dvb-frontends/tc90522.c if (v == 0) /* no low layer */ v 236 drivers/media/dvb-frontends/tc90522.c layers = (v > 0) ? 2 : 1; v 354 drivers/media/dvb-frontends/tc90522.c u8 v; v 360 drivers/media/dvb-frontends/tc90522.c v = (val[2] & 0x78) >> 3; v 361 drivers/media/dvb-frontends/tc90522.c if (v == 0x0f) v 365 drivers/media/dvb-frontends/tc90522.c c->layer[0].segment_count = v; v 368 drivers/media/dvb-frontends/tc90522.c v = (val[1] & 0x03) << 1 | (val[2] & 0x80) >> 7; v 369 drivers/media/dvb-frontends/tc90522.c c->layer[0].interleaving = v; v 373 drivers/media/dvb-frontends/tc90522.c v = (val[3] & 0x03) << 2 | (val[4] & 0xc0) >> 6; v 374 drivers/media/dvb-frontends/tc90522.c if (v == 0x0f) v 378 drivers/media/dvb-frontends/tc90522.c c->layer[1].segment_count = v; v 385 drivers/media/dvb-frontends/tc90522.c v = (val[5] & 0x1e) >> 1; v 386 drivers/media/dvb-frontends/tc90522.c if (v == 0x0f) v 390 drivers/media/dvb-frontends/tc90522.c c->layer[2].segment_count = v; v 100 drivers/media/dvb-frontends/tda10023.c u8 r,m,v; v 104 drivers/media/dvb-frontends/tda10023.c v=*tab++; v 112 drivers/media/dvb-frontends/tda10023.c tda10023_writebit(state,r,m,v); v 841 drivers/media/dvb-frontends/tda10048.c u8 v; v 847 drivers/media/dvb-frontends/tda10048.c v = tda10048_readreg(state, TDA10048_NP_OUT); v 848 drivers/media/dvb-frontends/tda10048.c if (v > 0) v 849 drivers/media/dvb-frontends/tda10048.c *signal_strength -= (v << 8) | v; v 987 drivers/media/dvb-frontends/tda10048.c u8 v; v 992 drivers/media/dvb-frontends/tda10048.c v = tda10048_readreg(state, TDA10048_NP_OUT); v 994 drivers/media/dvb-frontends/tda10048.c if (v <= snr_tab[i].val) { v 1360 drivers/media/firewire/firedtv-avc.c #define get_opcr_online(v) get_opcr((v), 0x1, 31) v 1361 drivers/media/firewire/firedtv-avc.c #define get_opcr_p2p_connections(v) get_opcr((v), 0x3f, 24) v 1362 drivers/media/firewire/firedtv-avc.c #define get_opcr_channel(v) get_opcr((v), 0x3f, 16) v 1364 drivers/media/firewire/firedtv-avc.c #define set_opcr_p2p_connections(p, v) set_opcr((p), (v), 0x3f, 24) v 1365 drivers/media/firewire/firedtv-avc.c #define set_opcr_channel(p, v) set_opcr((p), (v), 0x3f, 16) v 1366 drivers/media/firewire/firedtv-avc.c #define set_opcr_data_rate(p, v) set_opcr((p), (v), 0x3, 14) v 1367 drivers/media/firewire/firedtv-avc.c #define set_opcr_overhead_id(p, v) set_opcr((p), (v), 0xf, 10) v 396 drivers/media/i2c/adv748x/adv748x.h #define io_write(s, r, v) adv748x_write(s, ADV748X_PAGE_IO, r, v) v 397 drivers/media/i2c/adv748x/adv748x.h #define io_clrset(s, r, m, v) io_write(s, r, (io_read(s, r) & ~(m)) | (v)) v 401 drivers/media/i2c/adv748x/adv748x.h #define hdmi_write(s, r, v) adv748x_write(s, ADV748X_PAGE_HDMI, r, v) v 404 drivers/media/i2c/adv748x/adv748x.h #define repeater_write(s, r, v) adv748x_write(s, ADV748X_PAGE_REPEATER, r, v) v 407 drivers/media/i2c/adv748x/adv748x.h #define sdp_write(s, r, v) adv748x_write(s, ADV748X_PAGE_SDP, r, v) v 408 drivers/media/i2c/adv748x/adv748x.h #define sdp_clrset(s, r, m, v) sdp_write(s, r, (sdp_read(s, r) & ~(m)) | (v)) v 411 drivers/media/i2c/adv748x/adv748x.h #define cp_write(s, r, v) adv748x_write(s, ADV748X_PAGE_CP, r, v) v 412 drivers/media/i2c/adv748x/adv748x.h #define cp_clrset(s, r, m, v) cp_write(s, r, (cp_read(s, r) & ~(m)) | (v)) v 415 drivers/media/i2c/adv748x/adv748x.h #define tx_write(t, r, v) adv748x_write(t->state, t->page, r, v) v 3135 drivers/media/i2c/adv7604.c u32 v; v 3149 drivers/media/i2c/adv7604.c if (!of_property_read_u32(np, "default-input", &v)) v 3150 drivers/media/i2c/adv7604.c state->pdata.default_input = v; v 102 drivers/media/i2c/cs5345.c u8 v = cs5345_read(sd, 0x09) & 7; v 106 drivers/media/i2c/cs5345.c v4l2_info(sd, "Input: %d%s\n", v, v 96 drivers/media/i2c/cs53l32a.c u8 v = cs53l32a_read(sd, 0x01); v 98 drivers/media/i2c/cs53l32a.c v4l2_info(sd, "Input: %d\n", (v >> 4) & 3); v 155 drivers/media/i2c/cs53l32a.c u8 v = cs53l32a_read(sd, i); v 157 drivers/media/i2c/cs53l32a.c v4l2_dbg(1, debug, sd, "Read Reg %d %02x\n", i, v); v 186 drivers/media/i2c/cs53l32a.c u8 v = cs53l32a_read(sd, i); v 188 drivers/media/i2c/cs53l32a.c v4l2_dbg(1, debug, sd, "Read Reg %d %02x\n", i, v); v 2363 drivers/media/i2c/cx25840/cx25840-core.c u8 v; v 2372 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x115) | 0x80; v 2373 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x115, v); v 2374 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x116) | 0x03; v 2375 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x116, v); v 2377 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x115) & ~(0x80); v 2378 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x115, v); v 2379 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x116) & ~(0x03); v 2380 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x116, v); v 2389 drivers/media/i2c/cx25840/cx25840-core.c u8 v; v 2405 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x115) | 0x0c; v 2406 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x115, v); v 2407 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x116) | 0x04; v 2408 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x116, v); v 2410 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x115) & ~(0x0c); v 2411 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x115, v); v 2412 drivers/media/i2c/cx25840/cx25840-core.c v = cx25840_read(client, 0x116) & ~(0x04); v 2413 drivers/media/i2c/cx25840/cx25840-core.c cx25840_write(client, 0x116, v); v 380 drivers/media/i2c/cx25840/cx25840-ir.c u32 v; v 384 drivers/media/i2c/cx25840/cx25840-ir.c v = CNTRL_WIN_3_4; v 387 drivers/media/i2c/cx25840/cx25840-ir.c v = CNTRL_WIN_3_3; v 392 drivers/media/i2c/cx25840/cx25840-ir.c v |= CNTRL_WIN_4_3; v 395 drivers/media/i2c/cx25840/cx25840-ir.c v |= CNTRL_WIN_3_3; v 398 drivers/media/i2c/cx25840/cx25840-ir.c cx25840_and_or4(c, CX25840_IR_CNTRL_REG, ~CNTRL_WIN, v); v 517 drivers/media/i2c/cx25840/cx25840-ir.c u32 events, v; v 588 drivers/media/i2c/cx25840/cx25840-ir.c for (i = 0, v = FIFO_RX_NDV; v 589 drivers/media/i2c/cx25840/cx25840-ir.c (v & FIFO_RX_NDV) && !kror; i = 0) { v 591 drivers/media/i2c/cx25840/cx25840-ir.c (v & FIFO_RX_NDV) && j < FIFO_RX_DEPTH; j++) { v 592 drivers/media/i2c/cx25840/cx25840-ir.c v = cx25840_read4(c, CX25840_IR_FIFO_REG); v 593 drivers/media/i2c/cx25840/cx25840-ir.c rx_data[i].hw_fifo_data = v & ~FIFO_RX_NDV; v 609 drivers/media/i2c/cx25840/cx25840-ir.c v = 0; v 619 drivers/media/i2c/cx25840/cx25840-ir.c v |= CNTRL_RFE; v 628 drivers/media/i2c/cx25840/cx25840-ir.c v |= CNTRL_RXE; v 631 drivers/media/i2c/cx25840/cx25840-ir.c if (v) { v 633 drivers/media/i2c/cx25840/cx25840-ir.c cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl & ~v); v 656 drivers/media/i2c/cx25840/cx25840-ir.c unsigned u, v, w; v 690 drivers/media/i2c/cx25840/cx25840-ir.c v = (unsigned) pulse_width_count_to_ns( v 692 drivers/media/i2c/cx25840/cx25840-ir.c if (v > IR_MAX_DURATION) v 693 drivers/media/i2c/cx25840/cx25840-ir.c v = IR_MAX_DURATION; v 696 drivers/media/i2c/cx25840/cx25840-ir.c { .pulse = u, .duration = v, .timeout = w }; v 699 drivers/media/i2c/cx25840/cx25840-ir.c v, u ? "mark" : "space", w ? "(timed out)" : ""); v 95 drivers/media/i2c/cx25840/cx25840-vbi.c u8 v = cx25840_read(client, v 98 drivers/media/i2c/cx25840/cx25840-vbi.c svbi->service_lines[0][i] = lcr2vbi[v >> 4]; v 99 drivers/media/i2c/cx25840/cx25840-vbi.c svbi->service_lines[1][i] = lcr2vbi[v & 0xf]; v 105 drivers/media/i2c/cx25840/cx25840-vbi.c u8 v = cx25840_read(client, v 108 drivers/media/i2c/cx25840/cx25840-vbi.c svbi->service_lines[0][i] = lcr2vbi[v >> 4]; v 109 drivers/media/i2c/cx25840/cx25840-vbi.c svbi->service_lines[1][i] = lcr2vbi[v & 0xf]; v 218 drivers/media/i2c/ov2680.c #define ov2680_write_reg(s, r, v) \ v 219 drivers/media/i2c/ov2680.c __ov2680_write_reg(s, r, OV2680_REG_VALUE_8BIT, v) v 221 drivers/media/i2c/ov2680.c #define ov2680_write_reg16(s, r, v) \ v 222 drivers/media/i2c/ov2680.c __ov2680_write_reg(s, r, OV2680_REG_VALUE_16BIT, v) v 224 drivers/media/i2c/ov2680.c #define ov2680_write_reg24(s, r, v) \ v 225 drivers/media/i2c/ov2680.c __ov2680_write_reg(s, r, OV2680_REG_VALUE_24BIT, v) v 260 drivers/media/i2c/ov2680.c #define ov2680_read_reg(s, r, v) \ v 261 drivers/media/i2c/ov2680.c __ov2680_read_reg(s, r, OV2680_REG_VALUE_8BIT, v) v 263 drivers/media/i2c/ov2680.c #define ov2680_read_reg16(s, r, v) \ v 264 drivers/media/i2c/ov2680.c __ov2680_read_reg(s, r, OV2680_REG_VALUE_16BIT, v) v 266 drivers/media/i2c/ov2680.c #define ov2680_read_reg24(s, r, v) \ v 267 drivers/media/i2c/ov2680.c __ov2680_read_reg(s, r, OV2680_REG_VALUE_24BIT, v) v 626 drivers/media/i2c/ov7670.c unsigned char v; v 632 drivers/media/i2c/ov7670.c ret = ov7670_read(sd, REG_MIDH, &v); v 635 drivers/media/i2c/ov7670.c if (v != 0x7f) /* OV manuf. id. */ v 637 drivers/media/i2c/ov7670.c ret = ov7670_read(sd, REG_MIDL, &v); v 640 drivers/media/i2c/ov7670.c if (v != 0xa2) v 645 drivers/media/i2c/ov7670.c ret = ov7670_read(sd, REG_PID, &v); v 648 drivers/media/i2c/ov7670.c if (v != 0x76) /* PID + VER = 0x76 / 0x73 */ v 650 drivers/media/i2c/ov7670.c ret = ov7670_read(sd, REG_VER, &v); v 653 drivers/media/i2c/ov7670.c if (v != 0x73) /* PID + VER = 0x76 / 0x73 */ v 923 drivers/media/i2c/ov7670.c unsigned char v; v 931 drivers/media/i2c/ov7670.c ret += ov7670_read(sd, REG_HREF, &v); v 932 drivers/media/i2c/ov7670.c v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7); v 934 drivers/media/i2c/ov7670.c ret += ov7670_write(sd, REG_HREF, v); v 940 drivers/media/i2c/ov7670.c ret += ov7670_read(sd, REG_VREF, &v); v 941 drivers/media/i2c/ov7670.c v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3); v 943 drivers/media/i2c/ov7670.c ret += ov7670_write(sd, REG_VREF, v); v 1396 drivers/media/i2c/ov7670.c static unsigned char ov7670_abs_to_sm(unsigned char v) v 1398 drivers/media/i2c/ov7670.c if (v > 127) v 1399 drivers/media/i2c/ov7670.c return v & 0x7f; v 1400 drivers/media/i2c/ov7670.c return (128 - v) | 0x80; v 1405 drivers/media/i2c/ov7670.c unsigned char com8 = 0, v; v 1411 drivers/media/i2c/ov7670.c v = ov7670_abs_to_sm(value); v 1412 drivers/media/i2c/ov7670.c ret = ov7670_write(sd, REG_BRIGHT, v); v 1423 drivers/media/i2c/ov7670.c unsigned char v = 0; v 1426 drivers/media/i2c/ov7670.c ret = ov7670_read(sd, REG_MVFP, &v); v 1428 drivers/media/i2c/ov7670.c v |= MVFP_MIRROR; v 1430 drivers/media/i2c/ov7670.c v &= ~MVFP_MIRROR; v 1432 drivers/media/i2c/ov7670.c ret += ov7670_write(sd, REG_MVFP, v); v 1438 drivers/media/i2c/ov7670.c unsigned char v = 0; v 1441 drivers/media/i2c/ov7670.c ret = ov7670_read(sd, REG_MVFP, &v); v 1443 drivers/media/i2c/ov7670.c v |= MVFP_FLIP; v 1445 drivers/media/i2c/ov7670.c v &= ~MVFP_FLIP; v 1447 drivers/media/i2c/ov7670.c ret += ov7670_write(sd, REG_MVFP, v); v 713 drivers/media/i2c/s5k5baf.c static void s5k5baf_hw_set_anti_flicker(struct s5k5baf *state, int v) v 715 drivers/media/i2c/s5k5baf.c if (v == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) { v 720 drivers/media/i2c/s5k5baf.c s5k5baf_write_seq(state, REG_SF_FLICKER_QUANT, v, 1); v 848 drivers/media/i2c/s5k5baf.c static void s5k5baf_rescale(struct v4l2_rect *r, const struct v4l2_rect *v, v 852 drivers/media/i2c/s5k5baf.c r->left = v->left * n->width / d->width; v 853 drivers/media/i2c/s5k5baf.c r->top = v->top * n->height / d->height; v 854 drivers/media/i2c/s5k5baf.c r->width = v->width * n->width / d->width; v 855 drivers/media/i2c/s5k5baf.c r->height = v->height * n->height / d->height; v 1441 drivers/media/i2c/s5k5baf.c struct v4l2_rect *v) v 1446 drivers/media/i2c/s5k5baf.c *rects[first] = *v; v 1452 drivers/media/i2c/s5k5baf.c *v = *rects[first]; v 1147 drivers/media/i2c/saa7115.c u8 v = saa711x_read(sd, i - 2 + R_41_LCR_BASE); v 1149 drivers/media/i2c/saa7115.c sliced->service_lines[0][i] = lcr2vbi[v >> 4]; v 1150 drivers/media/i2c/saa7115.c sliced->service_lines[1][i] = lcr2vbi[v & 0xf]; v 976 drivers/media/i2c/smiapp/smiapp-core.c u32 i, s, p, np, v; v 1015 drivers/media/i2c/smiapp/smiapp-core.c &v); v 1019 drivers/media/i2c/smiapp/smiapp-core.c *nvm++ = v; v 962 drivers/media/i2c/tc358743.c unsigned int v; v 964 drivers/media/i2c/tc358743.c v = i2c_rd32(sd, CECRCTR); v 965 drivers/media/i2c/tc358743.c msg.len = v & 0x1f; v 967 drivers/media/i2c/tc358743.c v = i2c_rd32(sd, CECRBUF1 + i * 4); v 968 drivers/media/i2c/tc358743.c msg.msg[i] = v & 0xff; v 2278 drivers/media/i2c/tda1997x.c u32 v; v 2345 drivers/media/i2c/tda1997x.c if (!of_property_read_u32(np, "nxp,audout-layout", &v)) { v 2346 drivers/media/i2c/tda1997x.c switch (v) { v 2355 drivers/media/i2c/tda1997x.c pdata->audout_layout = v; v 2357 drivers/media/i2c/tda1997x.c if (!of_property_read_u32(np, "nxp,audout-width", &v)) { v 2358 drivers/media/i2c/tda1997x.c switch (v) { v 2367 drivers/media/i2c/tda1997x.c pdata->audout_width = v; v 2369 drivers/media/i2c/tda1997x.c if (!of_property_read_u32(np, "nxp,audout-mclk-fs", &v)) { v 2370 drivers/media/i2c/tda1997x.c switch (v) { v 2383 drivers/media/i2c/tda1997x.c pdata->audout_mclk_fs = v; v 118 drivers/media/pci/b2c2/flexcop-dma.c flexcop_ibi_value v = fc->read_ibi_reg(fc, r); v 121 drivers/media/pci/b2c2/flexcop-dma.c v.dma_0xc.remap_enable = onoff; v 122 drivers/media/pci/b2c2/flexcop-dma.c fc->write_ibi_reg(fc, r, v); v 130 drivers/media/pci/b2c2/flexcop-dma.c flexcop_ibi_value v = fc->read_ibi_reg(fc, ctrl_208); v 133 drivers/media/pci/b2c2/flexcop-dma.c v.ctrl_208.DMA1_IRQ_Enable_sig = onoff; v 136 drivers/media/pci/b2c2/flexcop-dma.c v.ctrl_208.DMA2_IRQ_Enable_sig = onoff; v 138 drivers/media/pci/b2c2/flexcop-dma.c fc->write_ibi_reg(fc, ctrl_208, v); v 147 drivers/media/pci/b2c2/flexcop-dma.c flexcop_ibi_value v = fc->read_ibi_reg(fc, ctrl_208); v 150 drivers/media/pci/b2c2/flexcop-dma.c v.ctrl_208.DMA1_Timer_Enable_sig = onoff; v 153 drivers/media/pci/b2c2/flexcop-dma.c v.ctrl_208.DMA2_Timer_Enable_sig = onoff; v 155 drivers/media/pci/b2c2/flexcop-dma.c fc->write_ibi_reg(fc, ctrl_208, v); v 165 drivers/media/pci/b2c2/flexcop-dma.c flexcop_ibi_value v = fc->read_ibi_reg(fc, r); v 170 drivers/media/pci/b2c2/flexcop-dma.c v.dma_0x4_write.dmatimer = cycles; v 171 drivers/media/pci/b2c2/flexcop-dma.c fc->write_ibi_reg(fc, r, v); v 80 drivers/media/pci/b2c2/flexcop-pci.c flexcop_ibi_value v; v 81 drivers/media/pci/b2c2/flexcop-pci.c v.raw = readl(fc_pci->io_mem + r); v 83 drivers/media/pci/b2c2/flexcop-pci.c if (lastrreg != r || lastrval != v.raw) { v 84 drivers/media/pci/b2c2/flexcop-pci.c lastrreg = r; lastrval = v.raw; v 85 drivers/media/pci/b2c2/flexcop-pci.c deb_reg("new rd: %3x: %08x\n", r, v.raw); v 88 drivers/media/pci/b2c2/flexcop-pci.c return v; v 92 drivers/media/pci/b2c2/flexcop-pci.c flexcop_ibi_register r, flexcop_ibi_value v) v 96 drivers/media/pci/b2c2/flexcop-pci.c if (lastwreg != r || lastwval != v.raw) { v 97 drivers/media/pci/b2c2/flexcop-pci.c lastwreg = r; lastwval = v.raw; v 98 drivers/media/pci/b2c2/flexcop-pci.c deb_reg("new wr: %3x: %08x\n", r, v.raw); v 101 drivers/media/pci/b2c2/flexcop-pci.c writel(v.raw, fc_pci->io_mem + r); v 151 drivers/media/pci/b2c2/flexcop-pci.c flexcop_ibi_value v; v 155 drivers/media/pci/b2c2/flexcop-pci.c v = fc->read_ibi_reg(fc, irq_20c); v 158 drivers/media/pci/b2c2/flexcop-pci.c if (v.irq_20c.Data_receiver_error) v 160 drivers/media/pci/b2c2/flexcop-pci.c if (v.irq_20c.Continuity_error_flag) v 162 drivers/media/pci/b2c2/flexcop-pci.c if (v.irq_20c.LLC_SNAP_FLAG_set) v 164 drivers/media/pci/b2c2/flexcop-pci.c if (v.irq_20c.Transport_Error) v 170 drivers/media/pci/b2c2/flexcop-pci.c if (v.irq_20c.DMA1_IRQ_Status == 1) { v 184 drivers/media/pci/b2c2/flexcop-pci.c } else if (v.irq_20c.DMA1_Timer_Status == 1) { v 191 drivers/media/pci/b2c2/flexcop-pci.c v.raw, (unsigned long long)cur_addr, cur_pos, v 224 drivers/media/pci/b2c2/flexcop-pci.c v.raw); v 26 drivers/media/pci/cx18/cx18-audio.c u32 u, v; v 46 drivers/media/pci/cx18/cx18-audio.c v = u & ~CX18_AI1_MUX_MASK; v 49 drivers/media/pci/cx18/cx18-audio.c v |= CX18_AI1_MUX_I2S1; v 52 drivers/media/pci/cx18/cx18-audio.c v |= CX18_AI1_MUX_I2S2; v 55 drivers/media/pci/cx18/cx18-audio.c v |= CX18_AI1_MUX_843_I2S; v 58 drivers/media/pci/cx18/cx18-audio.c if (v == u) { v 75 drivers/media/pci/cx18/cx18-audio.c cx18_write_reg_expect(cx, v | 0xb00, CX18_AUDIO_ENABLE, v 76 drivers/media/pci/cx18/cx18-audio.c v, CX18_AI1_MUX_MASK); v 292 drivers/media/pci/cx18/cx18-av-audio.c u8 v; v 295 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x803) & ~0x10; v 296 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 299 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x810) | 0x01; v 300 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x810, v, v, 0x0f); v 320 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x810) & ~0x01; v 321 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x810, v, v, 0x0f); v 326 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x803) | 0x10; v 327 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 378 drivers/media/pci/cx18/cx18-av-audio.c u8 v; v 385 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x803); v 388 drivers/media/pci/cx18/cx18-av-audio.c v &= ~0x10; v 389 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 393 drivers/media/pci/cx18/cx18-av-audio.c v |= 0x10; v 394 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 407 drivers/media/pci/cx18/cx18-av-audio.c u8 v; v 410 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x803) & ~0x10; v 411 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 414 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x810) | 0x1; v 415 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x810, v, v, 0x0f); v 419 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x810) & ~0x1; v 420 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x810, v, v, 0x0f); v 422 drivers/media/pci/cx18/cx18-av-audio.c v = cx18_av_read(cx, 0x803) | 0x10; v 423 drivers/media/pci/cx18/cx18-av-audio.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 118 drivers/media/pci/cx18/cx18-av-core.c u32 v; v 126 drivers/media/pci/cx18/cx18-av-core.c v = cx18_av_read4(cx, CXADEC_HOST_REG1); v 128 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v | 1, v, 0xfffe); v 130 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v & 0xfffe, v 131 drivers/media/pci/cx18/cx18-av-core.c v & 0xfffe, 0xffff); v 134 drivers/media/pci/cx18/cx18-av-core.c v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF; v 136 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v); v 138 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100); v 140 drivers/media/pci/cx18/cx18-av-core.c v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF; v 142 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v); v 144 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100); v 149 drivers/media/pci/cx18/cx18-av-core.c v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1; v 151 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3, v, v, 0x03009F0F); v 154 drivers/media/pci/cx18/cx18-av-core.c v & 0xFFFFFFFE, v & 0xFFFFFFFE, 0x03009F0F); v 520 drivers/media/pci/cx18/cx18-av-core.c u8 v; v 551 drivers/media/pci/cx18/cx18-av-core.c v = cx18_av_read(cx, 0x803); v 552 drivers/media/pci/cx18/cx18-av-core.c if (v & 0x10) { v 554 drivers/media/pci/cx18/cx18-av-core.c v &= ~0x10; v 555 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 556 drivers/media/pci/cx18/cx18-av-core.c v |= 0x10; v 557 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write_expect(cx, 0x803, v, v, 0x1f); v 799 drivers/media/pci/cx18/cx18-av-core.c u8 v; v 804 drivers/media/pci/cx18/cx18-av-core.c v = cx18_av_read(cx, 0x809); v 805 drivers/media/pci/cx18/cx18-av-core.c v &= ~0xf; v 818 drivers/media/pci/cx18/cx18-av-core.c v |= 0x4; v 824 drivers/media/pci/cx18/cx18-av-core.c v |= 0x7; v 830 drivers/media/pci/cx18/cx18-av-core.c v |= 0x1; v 835 drivers/media/pci/cx18/cx18-av-core.c cx18_av_write_expect(cx, 0x809, v, v, 0xff); v 68 drivers/media/pci/cx18/cx18-av-firmware.c u32 u, v; v 171 drivers/media/pci/cx18/cx18-av-firmware.c v = cx18_read_reg(cx, CX18_AUDIO_ENABLE); v 173 drivers/media/pci/cx18/cx18-av-firmware.c if (v & 0x800) v 174 drivers/media/pci/cx18/cx18-av-firmware.c cx18_write_reg_expect(cx, v & 0xFFFFFBFF, CX18_AUDIO_ENABLE, v 178 drivers/media/pci/cx18/cx18-av-firmware.c v = cx18_read_reg(cx, CX18_AUDIO_ENABLE); v 179 drivers/media/pci/cx18/cx18-av-firmware.c u = v & CX18_AI1_MUX_MASK; v 180 drivers/media/pci/cx18/cx18-av-firmware.c v &= ~CX18_AI1_MUX_MASK; v 183 drivers/media/pci/cx18/cx18-av-firmware.c v |= CX18_AI1_MUX_I2S1; v 184 drivers/media/pci/cx18/cx18-av-firmware.c cx18_write_reg_expect(cx, v | 0xb00, CX18_AUDIO_ENABLE, v 185 drivers/media/pci/cx18/cx18-av-firmware.c v, CX18_AI1_MUX_MASK); v 187 drivers/media/pci/cx18/cx18-av-firmware.c v = (v & ~CX18_AI1_MUX_MASK) | CX18_AI1_MUX_843_I2S; v 190 drivers/media/pci/cx18/cx18-av-firmware.c v |= CX18_AI1_MUX_843_I2S; v 191 drivers/media/pci/cx18/cx18-av-firmware.c cx18_write_reg_expect(cx, v | 0xb00, CX18_AUDIO_ENABLE, v 192 drivers/media/pci/cx18/cx18-av-firmware.c v, CX18_AI1_MUX_MASK); v 194 drivers/media/pci/cx18/cx18-av-firmware.c v = (v & ~CX18_AI1_MUX_MASK) | u; v 196 drivers/media/pci/cx18/cx18-av-firmware.c cx18_write_reg_expect(cx, v | 0xb00, CX18_AUDIO_ENABLE, v 197 drivers/media/pci/cx18/cx18-av-firmware.c v, CX18_AI1_MUX_MASK); v 200 drivers/media/pci/cx18/cx18-av-firmware.c v = cx18_av_read4(cx, CXADEC_STD_DET_CTL); v 201 drivers/media/pci/cx18/cx18-av-firmware.c v |= 0xFF; /* Auto by default */ v 202 drivers/media/pci/cx18/cx18-av-firmware.c v |= 0x400; /* Stereo by default */ v 203 drivers/media/pci/cx18/cx18-av-firmware.c v |= 0x14000000; v 204 drivers/media/pci/cx18/cx18-av-firmware.c cx18_av_write4_expect(cx, CXADEC_STD_DET_CTL, v, v, 0x3F00FFFF); v 141 drivers/media/pci/cx18/cx18-av-vbi.c u8 v = cx18_av_read(cx, 0x424 + i - 7); v 143 drivers/media/pci/cx18/cx18-av-vbi.c svbi->service_lines[0][i] = lcr2vbi[v >> 4]; v 144 drivers/media/pci/cx18/cx18-av-vbi.c svbi->service_lines[1][i] = lcr2vbi[v & 0xf]; v 150 drivers/media/pci/cx18/cx18-av-vbi.c u8 v = cx18_av_read(cx, 0x424 + i - 10); v 152 drivers/media/pci/cx18/cx18-av-vbi.c svbi->service_lines[0][i] = lcr2vbi[v >> 4]; v 153 drivers/media/pci/cx18/cx18-av-vbi.c svbi->service_lines[1][i] = lcr2vbi[v & 0xf]; v 240 drivers/media/pci/cx18/cx18-dvb.c u32 v; v 262 drivers/media/pci/cx18/cx18-dvb.c v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL); v 263 drivers/media/pci/cx18/cx18-dvb.c v |= 0x00400000; /* Serial Mode */ v 264 drivers/media/pci/cx18/cx18-dvb.c v |= 0x00002000; /* Data Length - Byte */ v 265 drivers/media/pci/cx18/cx18-dvb.c v |= 0x00010000; /* Error - Polarity */ v 266 drivers/media/pci/cx18/cx18-dvb.c v |= 0x00020000; /* Error - Passthru */ v 267 drivers/media/pci/cx18/cx18-dvb.c v |= 0x000c0000; /* Error - Ignore */ v 268 drivers/media/pci/cx18/cx18-dvb.c cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL); v 330 drivers/media/pci/cx23885/cx23885-core.c u32 v; v 334 drivers/media/pci/cx23885/cx23885-core.c v = mask & dev->pci_irqmask; v 335 drivers/media/pci/cx23885/cx23885-core.c if (v) v 336 drivers/media/pci/cx23885/cx23885-core.c cx_set(PCI_INT_MSK, v); v 374 drivers/media/pci/cx23885/cx23885-core.c u32 v; v 378 drivers/media/pci/cx23885/cx23885-core.c v = cx_read(PCI_INT_MSK); v 381 drivers/media/pci/cx23885/cx23885-core.c return v; v 393 drivers/media/pci/cx23885/cx23888-ir.c u32 v; v 397 drivers/media/pci/cx23885/cx23888-ir.c v = CNTRL_WIN_3_4; v 400 drivers/media/pci/cx23885/cx23888-ir.c v = CNTRL_WIN_3_3; v 405 drivers/media/pci/cx23885/cx23888-ir.c v |= CNTRL_WIN_4_3; v 408 drivers/media/pci/cx23885/cx23888-ir.c v |= CNTRL_WIN_3_3; v 411 drivers/media/pci/cx23885/cx23888-ir.c cx23888_ir_and_or4(dev, CX23888_IR_CNTRL_REG, ~CNTRL_WIN, v); v 533 drivers/media/pci/cx23885/cx23888-ir.c u32 events, v; v 588 drivers/media/pci/cx23885/cx23888-ir.c for (i = 0, v = FIFO_RX_NDV; v 589 drivers/media/pci/cx23885/cx23888-ir.c (v & FIFO_RX_NDV) && !kror; i = 0) { v 591 drivers/media/pci/cx23885/cx23888-ir.c (v & FIFO_RX_NDV) && j < FIFO_RX_DEPTH; j++) { v 592 drivers/media/pci/cx23885/cx23888-ir.c v = cx23888_ir_read4(dev, CX23888_IR_FIFO_REG); v 593 drivers/media/pci/cx23885/cx23888-ir.c rx_data[i].hw_fifo_data = v & ~FIFO_RX_NDV; v 609 drivers/media/pci/cx23885/cx23888-ir.c v = 0; v 619 drivers/media/pci/cx23885/cx23888-ir.c v |= CNTRL_RFE; v 628 drivers/media/pci/cx23885/cx23888-ir.c v |= CNTRL_RXE; v 631 drivers/media/pci/cx23885/cx23888-ir.c if (v) { v 633 drivers/media/pci/cx23885/cx23888-ir.c cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl & ~v); v 658 drivers/media/pci/cx23885/cx23888-ir.c unsigned u, v, w; v 685 drivers/media/pci/cx23885/cx23888-ir.c v = (unsigned) pulse_width_count_to_ns( v 687 drivers/media/pci/cx23885/cx23888-ir.c if (v > IR_MAX_DURATION) v 688 drivers/media/pci/cx23885/cx23888-ir.c v = IR_MAX_DURATION; v 691 drivers/media/pci/cx23885/cx23888-ir.c { .pulse = u, .duration = v, .timeout = w }; v 694 drivers/media/pci/cx23885/cx23888-ir.c v, u ? "mark" : "space", w ? "(timed out)" : ""); v 347 drivers/media/pci/cx25821/cx25821-i2c.c int v = 0; v 372 drivers/media/pci/cx25821/cx25821-i2c.c v = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; v 373 drivers/media/pci/cx25821/cx25821-i2c.c *value = v; v 375 drivers/media/pci/cx25821/cx25821-i2c.c return v; v 652 drivers/media/pci/cx88/cx88-alsa.c int v, b; v 656 drivers/media/pci/cx88/cx88-alsa.c v = left << 10; v 659 drivers/media/pci/cx88/cx88-alsa.c v = right << 10; v 662 drivers/media/pci/cx88/cx88-alsa.c wm8775_s_ctrl(core, V4L2_CID_AUDIO_VOLUME, v); v 672 drivers/media/pci/cx88/cx88-alsa.c int left, right, v, b; v 683 drivers/media/pci/cx88/cx88-alsa.c v = 0x3f - left; v 686 drivers/media/pci/cx88/cx88-alsa.c v = 0x3f - right; v 691 drivers/media/pci/cx88/cx88-alsa.c if (v != (old & 0x3f)) { v 692 drivers/media/pci/cx88/cx88-alsa.c cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, (old & ~0x3f) | v); v 2876 drivers/media/pci/ddbridge/ddbridge-core.c u8 v; v 2878 drivers/media/pci/ddbridge/ddbridge-core.c i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); v 2879 drivers/media/pci/ddbridge/ddbridge-core.c v = (v & ~0x10) | (val ? 0x10 : 0); v 2880 drivers/media/pci/ddbridge/ddbridge-core.c i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); v 60 drivers/media/pci/ddbridge/ddbridge-max.c u32 c, v = 0, tag = DDB_LINK_TAG(link); v 62 drivers/media/pci/ddbridge/ddbridge-max.c v = LNB_TONE & (dev->link[link].lnb.tone << (15 - lnb)); v 63 drivers/media/pci/ddbridge/ddbridge-max.c ddbwritel(dev, cmd | v, tag | LNB_CONTROL(lnb)); v 65 drivers/media/pci/ddbridge/ddbridge-max.c v = ddbreadl(dev, tag | LNB_CONTROL(lnb)); v 66 drivers/media/pci/ddbridge/ddbridge-max.c if ((v & LNB_BUSY) == 0) v 434 drivers/media/pci/meye/meye.c static inline void mchip_set(int reg, u32 v) v 437 drivers/media/pci/meye/meye.c writel(v, meye.mchip_mmregs + reg); v 448 drivers/media/pci/meye/meye.c static inline int mchip_delay(u32 reg, u32 v) v 451 drivers/media/pci/meye/meye.c while (--n && mchip_read(reg) != v) v 589 drivers/media/pci/meye/meye.c static void mchip_cont_read_frame(u32 v, u8 *buf, int size) v 593 drivers/media/pci/meye/meye.c pt_id = (v >> 17) & 0x3FF; v 599 drivers/media/pci/meye/meye.c static int mchip_comp_read_frame(u32 v, u8 *buf, int size) v 605 drivers/media/pci/meye/meye.c pt_start = (v >> 19) & 0xFF; v 606 drivers/media/pci/meye/meye.c pt_end = (v >> 11) & 0xFF; v 607 drivers/media/pci/meye/meye.c trailer = (v >> 1) & 0x3FF; v 667 drivers/media/pci/meye/meye.c u32 v; v 680 drivers/media/pci/meye/meye.c v = mchip_get_frame(); v 681 drivers/media/pci/meye/meye.c if (v & MCHIP_MM_FIR_RDY) { v 682 drivers/media/pci/meye/meye.c mchip_cont_read_frame(v, buf, bufsize); v 708 drivers/media/pci/meye/meye.c u32 v; v 725 drivers/media/pci/meye/meye.c v = mchip_get_frame(); v 726 drivers/media/pci/meye/meye.c if (v & MCHIP_MM_FIR_RDY) { v 727 drivers/media/pci/meye/meye.c len = mchip_comp_read_frame(v, buf, bufsize); v 774 drivers/media/pci/meye/meye.c u32 v; v 778 drivers/media/pci/meye/meye.c v = mchip_read(MCHIP_MM_INTA); v 785 drivers/media/pci/meye/meye.c v = mchip_get_frame(); v 786 drivers/media/pci/meye/meye.c if (!(v & MCHIP_MM_FIR_RDY)) v 795 drivers/media/pci/meye/meye.c mchip_cont_read_frame(v, meye.grab_fbuffer + gbufsize * reqnr, v 806 drivers/media/pci/meye/meye.c size = mchip_comp_read_frame(v, meye.grab_temp, gbufsize); v 129 drivers/media/pci/pt3/pt3_i2c.c u32 v; v 132 drivers/media/pci/pt3/pt3_i2c.c v = ioread32(pt3->regs[0] + REG_I2C_R); v 133 drivers/media/pci/pt3/pt3_i2c.c if (!(v & STAT_SEQ_RUNNING)) v 140 drivers/media/pci/pt3/pt3_i2c.c *result = v; v 235 drivers/media/pci/saa7164/saa7164-api.c struct tmComResEncVideoBitRate v; v 265 drivers/media/pci/saa7164/saa7164-api.c EU_VIDEO_BIT_RATE_CONTROL, sizeof(v), &v); v 293 drivers/media/pci/saa7164/saa7164-api.c v.ucVideoBitRateMode); v 295 drivers/media/pci/saa7164/saa7164-api.c v.dwVideoBitRate); v 297 drivers/media/pci/saa7164/saa7164-api.c v.dwVideoBitRatePeak); v 460 drivers/media/pci/saa7164/saa7164-api.c u8 v = mute; v 466 drivers/media/pci/saa7164/saa7164-api.c MUTE_CONTROL, sizeof(u8), &v); v 477 drivers/media/pci/saa7164/saa7164-api.c s16 v, min, max; v 494 drivers/media/pci/saa7164/saa7164-api.c (0x01 << 8) | VOLUME_CONTROL, sizeof(u16), &v); v 499 drivers/media/pci/saa7164/saa7164-api.c level, min, max, v); v 501 drivers/media/pci/saa7164/saa7164-api.c v = level; v 502 drivers/media/pci/saa7164/saa7164-api.c if (v < min) v 503 drivers/media/pci/saa7164/saa7164-api.c v = min; v 504 drivers/media/pci/saa7164/saa7164-api.c if (v > max) v 505 drivers/media/pci/saa7164/saa7164-api.c v = max; v 509 drivers/media/pci/saa7164/saa7164-api.c (0x01 << 8) | VOLUME_CONTROL, sizeof(s16), &v); v 515 drivers/media/pci/saa7164/saa7164-api.c (0x02 << 8) | VOLUME_CONTROL, sizeof(s16), &v); v 520 drivers/media/pci/saa7164/saa7164-api.c (0x01 << 8) | VOLUME_CONTROL, sizeof(u16), &v); v 525 drivers/media/pci/saa7164/saa7164-api.c level, min, max, v); v 1049 drivers/media/pci/saa7164/saa7164-core.c static int saa7164_proc_show(struct seq_file *m, void *v) v 61 drivers/media/pci/saa7164/saa7164-encoder.c struct list_head *c, *n, *p, *q, *l, *v; v 84 drivers/media/pci/saa7164/saa7164-encoder.c list_for_each_safe(l, v, &port->list_buf_free.list) { v 30 drivers/media/pci/saa7164/saa7164-vbi.c struct list_head *c, *n, *p, *q, *l, *v; v 53 drivers/media/pci/saa7164/saa7164-vbi.c list_for_each_safe(l, v, &port->list_buf_free.list) { v 193 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_PB_VSIZE(v) ((v)<<0) v 245 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_MOTION_Y_VALUE(v) ((v)<<16) v 246 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_MOTION_CB_VALUE(v) ((v)<<8) v 247 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VI_MOTION_CR_VALUE(v) ((v)<<0) v 296 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_VO_ZOOM_SY(v) (((v)/2)<<0) v 305 drivers/media/pci/solo6x10/solo6x10-regs.h #define SOLO_BG_V(v) ((v)<<0) v 696 drivers/media/pci/solo6x10/solo6x10-tw28.c u8 v = solo_i2c_readbyte(solo_dev, SOLO_I2C_TW, v 699 drivers/media/pci/solo6x10/solo6x10-tw28.c v &= 0xf0; v 700 drivers/media/pci/solo6x10/solo6x10-tw28.c v |= val; v 703 drivers/media/pci/solo6x10/solo6x10-tw28.c TW286x_SHARPNESS(chip_num), v); v 378 drivers/media/pci/solo6x10/solo6x10.h #define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags)) v 931 drivers/media/pci/ttpci/av7110_hw.c u16 y, u, v; v 936 drivers/media/pci/ttpci/av7110_hw.c v = 2048 + R * 8 -(y >> 5); /* Cb 0..4095 */ v 940 drivers/media/pci/ttpci/av7110_hw.c Cr = v / 16; v 729 drivers/media/platform/aspeed-video.c #define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags) v 46 drivers/media/platform/atmel/atmel-isc-regs.h #define ISC_PFE_CFG1_COLMIN(v) ((v)) v 48 drivers/media/platform/atmel/atmel-isc-regs.h #define ISC_PFE_CFG1_COLMAX(v) ((v) << 16) v 54 drivers/media/platform/atmel/atmel-isc-regs.h #define ISC_PFE_CFG2_ROWMIN(v) ((v)) v 56 drivers/media/platform/atmel/atmel-isc-regs.h #define ISC_PFE_CFG2_ROWMAX(v) ((v) << 16) v 34 drivers/media/platform/atmel/atmel-isc.h #define to_isc_clk(v) container_of(v, struct isc_clk, hw) v 869 drivers/media/platform/exynos4-is/fimc-core.c struct fimc_variant *v; v 877 drivers/media/platform/exynos4-is/fimc-core.c v = devm_kzalloc(dev, sizeof(*v) + sizeof(*lim), GFP_KERNEL); v 878 drivers/media/platform/exynos4-is/fimc-core.c if (!v) v 890 drivers/media/platform/exynos4-is/fimc-core.c lim = (struct fimc_pix_limit *)&v[1]; v 896 drivers/media/platform/exynos4-is/fimc-core.c v->pix_limit = lim; v 900 drivers/media/platform/exynos4-is/fimc-core.c v->min_inp_pixsize = ret ? FIMC_DEF_MIN_SIZE : args[0]; v 901 drivers/media/platform/exynos4-is/fimc-core.c v->min_out_pixsize = ret ? FIMC_DEF_MIN_SIZE : args[1]; v 904 drivers/media/platform/exynos4-is/fimc-core.c v->min_vsize_align = ret ? FIMC_DEF_HEIGHT_ALIGN : args[0]; v 905 drivers/media/platform/exynos4-is/fimc-core.c v->hor_offs_align = ret ? FIMC_DEF_HOR_OFFS_ALIGN : args[1]; v 908 drivers/media/platform/exynos4-is/fimc-core.c v->has_inp_rot = ret ? 1 : args[1] & 0x01; v 909 drivers/media/platform/exynos4-is/fimc-core.c v->has_out_rot = ret ? 1 : args[1] & 0x10; v 910 drivers/media/platform/exynos4-is/fimc-core.c v->has_mainscaler_ext = of_property_read_bool(node, v 913 drivers/media/platform/exynos4-is/fimc-core.c v->has_isp_wb = of_property_read_bool(node, "samsung,isp-wb"); v 914 drivers/media/platform/exynos4-is/fimc-core.c v->has_cam_if = of_property_read_bool(node, "samsung,cam-if"); v 918 drivers/media/platform/exynos4-is/fimc-core.c fimc->variant = v; v 315 drivers/media/platform/exynos4-is/fimc-is.h static inline void mcuctl_write(u32 v, struct fimc_is *is, unsigned int offset) v 317 drivers/media/platform/exynos4-is/fimc-is.h writel(v, is->regs + offset); v 325 drivers/media/platform/exynos4-is/fimc-is.h static inline void pmuisp_write(u32 v, struct fimc_is *is, unsigned int offset) v 327 drivers/media/platform/exynos4-is/fimc-is.h writel(v, is->pmu_regs + offset); v 36 drivers/media/platform/fsl-viu.c #define out_be32(v, a) iowrite32be(a, (void __iomem *)v) v 19 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_SFTRST(v) \ v 20 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_CTRL_SFTRST) v 22 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_CLKGATE(v) \ v 23 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_CTRL_CLKGATE) v 25 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_RSVD4(v) \ v 26 drivers/media/platform/imx-pxp.h (((v) << 29) & BM_PXP_CTRL_RSVD4) v 28 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_EN_REPEAT(v) \ v 29 drivers/media/platform/imx-pxp.h (((v) << 28) & BM_PXP_CTRL_EN_REPEAT) v 31 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ v 32 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1) v 34 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_ROTATE0(v) \ v 35 drivers/media/platform/imx-pxp.h (((v) << 26) & BM_PXP_CTRL_ENABLE_ROTATE0) v 37 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_LUT(v) \ v 38 drivers/media/platform/imx-pxp.h (((v) << 25) & BM_PXP_CTRL_ENABLE_LUT) v 40 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_CSC2(v) \ v 41 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_CTRL_ENABLE_CSC2) v 43 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_BLOCK_SIZE(v) \ v 44 drivers/media/platform/imx-pxp.h (((v) << 23) & BM_PXP_CTRL_BLOCK_SIZE) v 48 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_RSVD1(v) \ v 49 drivers/media/platform/imx-pxp.h (((v) << 22) & BM_PXP_CTRL_RSVD1) v 51 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_ALPHA_B(v) \ v 52 drivers/media/platform/imx-pxp.h (((v) << 21) & BM_PXP_CTRL_ENABLE_ALPHA_B) v 54 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_INPUT_FETCH_STORE(v) \ v 55 drivers/media/platform/imx-pxp.h (((v) << 20) & BM_PXP_CTRL_ENABLE_INPUT_FETCH_STORE) v 57 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_WFE_B(v) \ v 58 drivers/media/platform/imx-pxp.h (((v) << 19) & BM_PXP_CTRL_ENABLE_WFE_B) v 60 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_WFE_A(v) \ v 61 drivers/media/platform/imx-pxp.h (((v) << 18) & BM_PXP_CTRL_ENABLE_WFE_A) v 63 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_DITHER(v) \ v 64 drivers/media/platform/imx-pxp.h (((v) << 17) & BM_PXP_CTRL_ENABLE_DITHER) v 66 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_PS_AS_OUT(v) \ v 67 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CTRL_ENABLE_PS_AS_OUT) v 69 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_VFLIP1(v) \ v 70 drivers/media/platform/imx-pxp.h (((v) << 15) & BM_PXP_CTRL_VFLIP1) v 72 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_HFLIP1(v) \ v 73 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_CTRL_HFLIP1) v 76 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ROTATE1(v) \ v 77 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_CTRL_ROTATE1) v 83 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_VFLIP0(v) \ v 84 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CTRL_VFLIP0) v 86 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_HFLIP0(v) \ v 87 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_CTRL_HFLIP0) v 90 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ROTATE0(v) \ v 91 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_CTRL_ROTATE0) v 98 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_RSVD0(v) \ v 99 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_CTRL_RSVD0) v 101 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_HANDSHAKE_ABORT_SKIP(v) \ v 102 drivers/media/platform/imx-pxp.h (((v) << 5) & BM_PXP_CTRL_HANDSHAKE_ABORT_SKIP) v 104 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE_LCD0_HANDSHAKE(v) \ v 105 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_CTRL_ENABLE_LCD0_HANDSHAKE) v 107 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_LUT_DMA_IRQ_ENABLE(v) \ v 108 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_CTRL_LUT_DMA_IRQ_ENABLE) v 110 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_NEXT_IRQ_ENABLE(v) \ v 111 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_CTRL_NEXT_IRQ_ENABLE) v 113 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_IRQ_ENABLE(v) \ v 114 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_CTRL_IRQ_ENABLE) v 116 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL_ENABLE(v) \ v 117 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CTRL_ENABLE) v 126 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_BLOCKX(v) \ v 127 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_STAT_BLOCKX) v 130 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_BLOCKY(v) \ v 131 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_STAT_BLOCKY) v 134 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_AXI_ERROR_ID_1(v) \ v 135 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_STAT_AXI_ERROR_ID_1) v 137 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_RSVD2(v) \ v 138 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_STAT_RSVD2) v 140 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_AXI_READ_ERROR_1(v) \ v 141 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_STAT_AXI_READ_ERROR_1) v 143 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_AXI_WRITE_ERROR_1(v) \ v 144 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_STAT_AXI_WRITE_ERROR_1) v 146 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ(v) \ v 147 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ) v 150 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_AXI_ERROR_ID_0(v) \ v 151 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_STAT_AXI_ERROR_ID_0) v 153 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_NEXT_IRQ(v) \ v 154 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_STAT_NEXT_IRQ) v 156 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_AXI_READ_ERROR_0(v) \ v 157 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_STAT_AXI_READ_ERROR_0) v 159 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_AXI_WRITE_ERROR_0(v) \ v 160 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_STAT_AXI_WRITE_ERROR_0) v 162 drivers/media/platform/imx-pxp.h #define BF_PXP_STAT_IRQ0(v) \ v 163 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_STAT_IRQ0) v 172 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_CTRL_ALPHA(v) \ v 173 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_OUT_CTRL_ALPHA) v 175 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_CTRL_ALPHA_OUTPUT(v) \ v 176 drivers/media/platform/imx-pxp.h (((v) << 23) & BM_PXP_OUT_CTRL_ALPHA_OUTPUT) v 179 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_CTRL_RSVD1(v) \ v 180 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_OUT_CTRL_RSVD1) v 183 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_CTRL_INTERLACED_OUTPUT(v) \ v 184 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_OUT_CTRL_INTERLACED_OUTPUT) v 191 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_CTRL_RSVD0(v) \ v 192 drivers/media/platform/imx-pxp.h (((v) << 5) & BM_PXP_OUT_CTRL_RSVD0) v 195 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_CTRL_FORMAT(v) \ v 196 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_OUT_CTRL_FORMAT) v 219 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_BUF_ADDR(v) (v) v 225 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_BUF2_ADDR(v) (v) v 231 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PITCH_RSVD(v) \ v 232 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_OUT_PITCH_RSVD) v 235 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PITCH_PITCH(v) \ v 236 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_OUT_PITCH_PITCH) v 242 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_LRC_RSVD1(v) \ v 243 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_OUT_LRC_RSVD1) v 246 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_LRC_X(v) \ v 247 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_OUT_LRC_X) v 250 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_LRC_RSVD0(v) \ v 251 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_OUT_LRC_RSVD0) v 254 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_LRC_Y(v) \ v 255 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_OUT_LRC_Y) v 261 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_ULC_RSVD1(v) \ v 262 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_OUT_PS_ULC_RSVD1) v 265 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_ULC_X(v) \ v 266 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_OUT_PS_ULC_X) v 269 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_ULC_RSVD0(v) \ v 270 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_OUT_PS_ULC_RSVD0) v 273 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_ULC_Y(v) \ v 274 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_OUT_PS_ULC_Y) v 280 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_LRC_RSVD1(v) \ v 281 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_OUT_PS_LRC_RSVD1) v 284 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_LRC_X(v) \ v 285 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_OUT_PS_LRC_X) v 288 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_LRC_RSVD0(v) \ v 289 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_OUT_PS_LRC_RSVD0) v 292 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_PS_LRC_Y(v) \ v 293 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_OUT_PS_LRC_Y) v 299 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_ULC_RSVD1(v) \ v 300 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_OUT_AS_ULC_RSVD1) v 303 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_ULC_X(v) \ v 304 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_OUT_AS_ULC_X) v 307 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_ULC_RSVD0(v) \ v 308 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_OUT_AS_ULC_RSVD0) v 311 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_ULC_Y(v) \ v 312 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_OUT_AS_ULC_Y) v 318 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_LRC_RSVD1(v) \ v 319 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_OUT_AS_LRC_RSVD1) v 322 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_LRC_X(v) \ v 323 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_OUT_AS_LRC_X) v 326 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_LRC_RSVD0(v) \ v 327 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_OUT_AS_LRC_RSVD0) v 330 drivers/media/platform/imx-pxp.h #define BF_PXP_OUT_AS_LRC_Y(v) \ v 331 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_OUT_AS_LRC_Y) v 340 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CTRL_RSVD1(v) \ v 341 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_PS_CTRL_RSVD1) v 344 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CTRL_DECX(v) \ v 345 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_PS_CTRL_DECX) v 352 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CTRL_DECY(v) \ v 353 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_PS_CTRL_DECY) v 359 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CTRL_RSVD0(v) \ v 360 drivers/media/platform/imx-pxp.h (((v) << 7) & BM_PXP_PS_CTRL_RSVD0) v 362 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CTRL_WB_SWAP(v) \ v 363 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_PS_CTRL_WB_SWAP) v 366 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CTRL_FORMAT(v) \ v 367 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_CTRL_FORMAT) v 388 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_BUF_ADDR(v) (v) v 394 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_UBUF_ADDR(v) (v) v 400 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_VBUF_ADDR(v) (v) v 406 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_PITCH_RSVD(v) \ v 407 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_PS_PITCH_RSVD) v 410 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_PITCH_PITCH(v) \ v 411 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_PITCH_PITCH) v 417 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_BACKGROUND_0_RSVD(v) \ v 418 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_PS_BACKGROUND_0_RSVD) v 421 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_BACKGROUND_0_COLOR(v) \ v 422 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_BACKGROUND_0_COLOR) v 427 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_SCALE_RSVD2(v) \ v 428 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_PS_SCALE_RSVD2) v 431 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_SCALE_YSCALE(v) \ v 432 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_PS_SCALE_YSCALE) v 434 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_SCALE_RSVD1(v) \ v 435 drivers/media/platform/imx-pxp.h (((v) << 15) & BM_PXP_PS_SCALE_RSVD1) v 438 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_SCALE_XSCALE(v) \ v 439 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_SCALE_XSCALE) v 445 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_OFFSET_RSVD2(v) \ v 446 drivers/media/platform/imx-pxp.h (((v) << 28) & BM_PXP_PS_OFFSET_RSVD2) v 449 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_OFFSET_YOFFSET(v) \ v 450 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_PS_OFFSET_YOFFSET) v 453 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_OFFSET_RSVD1(v) \ v 454 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_PS_OFFSET_RSVD1) v 457 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_OFFSET_XOFFSET(v) \ v 458 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_OFFSET_XOFFSET) v 464 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYLOW_0_RSVD1(v) \ v 465 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_PS_CLRKEYLOW_0_RSVD1) v 468 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYLOW_0_PIXEL(v) \ v 469 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_CLRKEYLOW_0_PIXEL) v 475 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYHIGH_0_RSVD1(v) \ v 476 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_PS_CLRKEYHIGH_0_RSVD1) v 479 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYHIGH_0_PIXEL(v) \ v 480 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_CLRKEYHIGH_0_PIXEL) v 486 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_RSVD1(v) \ v 487 drivers/media/platform/imx-pxp.h (((v) << 22) & BM_PXP_AS_CTRL_RSVD1) v 489 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_ALPHA1_INVERT(v) \ v 490 drivers/media/platform/imx-pxp.h (((v) << 21) & BM_PXP_AS_CTRL_ALPHA1_INVERT) v 492 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_ALPHA0_INVERT(v) \ v 493 drivers/media/platform/imx-pxp.h (((v) << 20) & BM_PXP_AS_CTRL_ALPHA0_INVERT) v 496 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_ROP(v) \ v 497 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_AS_CTRL_ROP) v 512 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_ALPHA(v) \ v 513 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_AS_CTRL_ALPHA) v 516 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_FORMAT(v) \ v 517 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_AS_CTRL_FORMAT) v 527 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_ENABLE_COLORKEY(v) \ v 528 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_AS_CTRL_ENABLE_COLORKEY) v 531 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_ALPHA_CTRL(v) \ v 532 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_AS_CTRL_ALPHA_CTRL) v 538 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CTRL_RSVD0(v) \ v 539 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_AS_CTRL_RSVD0) v 545 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_BUF_ADDR(v) (v) v 551 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_PITCH_RSVD(v) \ v 552 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_AS_PITCH_RSVD) v 555 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_PITCH_PITCH(v) \ v 556 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_AS_PITCH_PITCH) v 562 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYLOW_0_RSVD1(v) \ v 563 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_AS_CLRKEYLOW_0_RSVD1) v 566 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYLOW_0_PIXEL(v) \ v 567 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_AS_CLRKEYLOW_0_PIXEL) v 573 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYHIGH_0_RSVD1(v) \ v 574 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_AS_CLRKEYHIGH_0_RSVD1) v 577 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYHIGH_0_PIXEL(v) \ v 578 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_AS_CLRKEYHIGH_0_PIXEL) v 583 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF0_YCBCR_MODE(v) \ v 584 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_CSC1_COEF0_YCBCR_MODE) v 586 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF0_BYPASS(v) \ v 587 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_CSC1_COEF0_BYPASS) v 589 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF0_RSVD1(v) \ v 590 drivers/media/platform/imx-pxp.h (((v) << 29) & BM_PXP_CSC1_COEF0_RSVD1) v 593 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF0_C0(v) \ v 594 drivers/media/platform/imx-pxp.h (((v) << 18) & BM_PXP_CSC1_COEF0_C0) v 597 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF0_UV_OFFSET(v) \ v 598 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_CSC1_COEF0_UV_OFFSET) v 601 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF0_Y_OFFSET(v) \ v 602 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC1_COEF0_Y_OFFSET) v 608 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF1_RSVD1(v) \ v 609 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CSC1_COEF1_RSVD1) v 612 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF1_C1(v) \ v 613 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC1_COEF1_C1) v 616 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF1_RSVD0(v) \ v 617 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CSC1_COEF1_RSVD0) v 620 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF1_C4(v) \ v 621 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC1_COEF1_C4) v 627 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF2_RSVD1(v) \ v 628 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CSC1_COEF2_RSVD1) v 631 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF2_C2(v) \ v 632 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC1_COEF2_C2) v 635 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF2_RSVD0(v) \ v 636 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CSC1_COEF2_RSVD0) v 639 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC1_COEF2_C3(v) \ v 640 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC1_COEF2_C3) v 646 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_CTRL_RSVD(v) \ v 647 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_CSC2_CTRL_RSVD) v 650 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_CTRL_CSC_MODE(v) \ v 651 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_CSC2_CTRL_CSC_MODE) v 657 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_CTRL_BYPASS(v) \ v 658 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC2_CTRL_BYPASS) v 664 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF0_RSVD1(v) \ v 665 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CSC2_COEF0_RSVD1) v 668 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF0_A2(v) \ v 669 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC2_COEF0_A2) v 672 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF0_RSVD0(v) \ v 673 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CSC2_COEF0_RSVD0) v 676 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF0_A1(v) \ v 677 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC2_COEF0_A1) v 683 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF1_RSVD1(v) \ v 684 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CSC2_COEF1_RSVD1) v 687 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF1_B1(v) \ v 688 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC2_COEF1_B1) v 691 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF1_RSVD0(v) \ v 692 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CSC2_COEF1_RSVD0) v 695 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF1_A3(v) \ v 696 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC2_COEF1_A3) v 702 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF2_RSVD1(v) \ v 703 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CSC2_COEF2_RSVD1) v 706 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF2_B3(v) \ v 707 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC2_COEF2_B3) v 710 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF2_RSVD0(v) \ v 711 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CSC2_COEF2_RSVD0) v 714 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF2_B2(v) \ v 715 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC2_COEF2_B2) v 721 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF3_RSVD1(v) \ v 722 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CSC2_COEF3_RSVD1) v 725 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF3_C2(v) \ v 726 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC2_COEF3_C2) v 729 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF3_RSVD0(v) \ v 730 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CSC2_COEF3_RSVD0) v 733 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF3_C1(v) \ v 734 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC2_COEF3_C1) v 740 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF4_RSVD1(v) \ v 741 drivers/media/platform/imx-pxp.h (((v) << 25) & BM_PXP_CSC2_COEF4_RSVD1) v 744 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF4_D1(v) \ v 745 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC2_COEF4_D1) v 748 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF4_RSVD0(v) \ v 749 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CSC2_COEF4_RSVD0) v 752 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF4_C3(v) \ v 753 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC2_COEF4_C3) v 759 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF5_RSVD1(v) \ v 760 drivers/media/platform/imx-pxp.h (((v) << 25) & BM_PXP_CSC2_COEF5_RSVD1) v 763 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF5_D3(v) \ v 764 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CSC2_COEF5_D3) v 767 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF5_RSVD0(v) \ v 768 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_CSC2_COEF5_RSVD0) v 771 drivers/media/platform/imx-pxp.h #define BF_PXP_CSC2_COEF5_D2(v) \ v 772 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CSC2_COEF5_D2) v 777 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_BYPASS(v) \ v 778 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_LUT_CTRL_BYPASS) v 781 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_RSVD3(v) \ v 782 drivers/media/platform/imx-pxp.h (((v) << 26) & BM_PXP_LUT_CTRL_RSVD3) v 785 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_LOOKUP_MODE(v) \ v 786 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_LUT_CTRL_LOOKUP_MODE) v 793 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_RSVD2(v) \ v 794 drivers/media/platform/imx-pxp.h (((v) << 18) & BM_PXP_LUT_CTRL_RSVD2) v 797 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_OUT_MODE(v) \ v 798 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_LUT_CTRL_OUT_MODE) v 805 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_RSVD1(v) \ v 806 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_LUT_CTRL_RSVD1) v 808 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_SEL_8KB(v) \ v 809 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_LUT_CTRL_SEL_8KB) v 811 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_LRU_UPD(v) \ v 812 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_LUT_CTRL_LRU_UPD) v 814 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_INVALID(v) \ v 815 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_LUT_CTRL_INVALID) v 818 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_RSVD0(v) \ v 819 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_LUT_CTRL_RSVD0) v 821 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_CTRL_DMA_START(v) \ v 822 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_LUT_CTRL_DMA_START) v 827 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_ADDR_RSVD2(v) \ v 828 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_LUT_ADDR_RSVD2) v 831 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_ADDR_NUM_BYTES(v) \ v 832 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_LUT_ADDR_NUM_BYTES) v 835 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_ADDR_RSVD1(v) \ v 836 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_LUT_ADDR_RSVD1) v 839 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_ADDR_ADDR(v) \ v 840 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_LUT_ADDR_ADDR) v 846 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_DATA_DATA(v) (v) v 852 drivers/media/platform/imx-pxp.h #define BF_PXP_LUT_EXTMEM_ADDR(v) (v) v 858 drivers/media/platform/imx-pxp.h #define BF_PXP_CFA_DATA(v) (v) v 864 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA(v) \ v 865 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA) v 868 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA(v) \ v 869 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA) v 872 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_RSVD0(v) \ v 873 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_ALPHA_A_CTRL_RSVD0) v 875 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S1_COLOR_MODE(v) \ v 876 drivers/media/platform/imx-pxp.h (((v) << 13) & BM_PXP_ALPHA_A_CTRL_S1_COLOR_MODE) v 880 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE(v) \ v 881 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_ALPHA_A_CTRL_S1_ALPHA_MODE) v 886 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE(v) \ v 887 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_ALPHA_A_CTRL_S1_GLOBAL_ALPHA_MODE) v 894 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE(v) \ v 895 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_ALPHA_A_CTRL_S1_S0_FACTOR_MODE) v 901 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_RSVD1(v) \ v 902 drivers/media/platform/imx-pxp.h (((v) << 7) & BM_PXP_ALPHA_A_CTRL_RSVD1) v 904 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S0_COLOR_MODE(v) \ v 905 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_ALPHA_A_CTRL_S0_COLOR_MODE) v 909 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE(v) \ v 910 drivers/media/platform/imx-pxp.h (((v) << 5) & BM_PXP_ALPHA_A_CTRL_S0_ALPHA_MODE) v 915 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE(v) \ v 916 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_ALPHA_A_CTRL_S0_GLOBAL_ALPHA_MODE) v 923 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE(v) \ v 924 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_ALPHA_A_CTRL_S0_S1_FACTOR_MODE) v 930 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE(v) \ v 931 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_ALPHA_A_CTRL_POTER_DUFF_ENABLE) v 939 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA(v) \ v 940 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA) v 943 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA(v) \ v 944 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA) v 947 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_RSVD0(v) \ v 948 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_ALPHA_B_CTRL_RSVD0) v 950 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S1_COLOR_MODE(v) \ v 951 drivers/media/platform/imx-pxp.h (((v) << 13) & BM_PXP_ALPHA_B_CTRL_S1_COLOR_MODE) v 955 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE(v) \ v 956 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_ALPHA_B_CTRL_S1_ALPHA_MODE) v 961 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE(v) \ v 962 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_ALPHA_B_CTRL_S1_GLOBAL_ALPHA_MODE) v 969 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE(v) \ v 970 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_ALPHA_B_CTRL_S1_S0_FACTOR_MODE) v 976 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_RSVD1(v) \ v 977 drivers/media/platform/imx-pxp.h (((v) << 7) & BM_PXP_ALPHA_B_CTRL_RSVD1) v 979 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S0_COLOR_MODE(v) \ v 980 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_ALPHA_B_CTRL_S0_COLOR_MODE) v 984 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE(v) \ v 985 drivers/media/platform/imx-pxp.h (((v) << 5) & BM_PXP_ALPHA_B_CTRL_S0_ALPHA_MODE) v 990 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE(v) \ v 991 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_ALPHA_B_CTRL_S0_GLOBAL_ALPHA_MODE) v 998 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE(v) \ v 999 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_ALPHA_B_CTRL_S0_S1_FACTOR_MODE) v 1005 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE(v) \ v 1006 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_ALPHA_B_CTRL_POTER_DUFF_ENABLE) v 1014 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_1_RSVD0(v) \ v 1015 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_ALPHA_B_CTRL_1_RSVD0) v 1018 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_1_ROP(v) \ v 1019 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_ALPHA_B_CTRL_1_ROP) v 1034 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_1_RSVD1(v) \ v 1035 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_ALPHA_B_CTRL_1_RSVD1) v 1037 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_1_OL_CLRKEY_ENABLE(v) \ v 1038 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_ALPHA_B_CTRL_1_OL_CLRKEY_ENABLE) v 1040 drivers/media/platform/imx-pxp.h #define BF_PXP_ALPHA_B_CTRL_1_ROP_ENABLE(v) \ v 1041 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_ALPHA_B_CTRL_1_ROP_ENABLE) v 1047 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_BACKGROUND_1_RSVD(v) \ v 1048 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_PS_BACKGROUND_1_RSVD) v 1051 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_BACKGROUND_1_COLOR(v) \ v 1052 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_BACKGROUND_1_COLOR) v 1058 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYLOW_1_RSVD1(v) \ v 1059 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_PS_CLRKEYLOW_1_RSVD1) v 1062 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYLOW_1_PIXEL(v) \ v 1063 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_CLRKEYLOW_1_PIXEL) v 1069 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYHIGH_1_RSVD1(v) \ v 1070 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_PS_CLRKEYHIGH_1_RSVD1) v 1073 drivers/media/platform/imx-pxp.h #define BF_PXP_PS_CLRKEYHIGH_1_PIXEL(v) \ v 1074 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_PS_CLRKEYHIGH_1_PIXEL) v 1080 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYLOW_1_RSVD1(v) \ v 1081 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_AS_CLRKEYLOW_1_RSVD1) v 1084 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYLOW_1_PIXEL(v) \ v 1085 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_AS_CLRKEYLOW_1_PIXEL) v 1091 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYHIGH_1_RSVD1(v) \ v 1092 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_AS_CLRKEYHIGH_1_RSVD1) v 1095 drivers/media/platform/imx-pxp.h #define BF_PXP_AS_CLRKEYHIGH_1_PIXEL(v) \ v 1096 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_AS_CLRKEYHIGH_1_PIXEL) v 1105 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_RSVD3(v) \ v 1106 drivers/media/platform/imx-pxp.h (((v) << 28) & BM_PXP_CTRL2_RSVD3) v 1108 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_ROTATE1(v) \ v 1109 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_CTRL2_ENABLE_ROTATE1) v 1111 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_ROTATE0(v) \ v 1112 drivers/media/platform/imx-pxp.h (((v) << 26) & BM_PXP_CTRL2_ENABLE_ROTATE0) v 1114 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_LUT(v) \ v 1115 drivers/media/platform/imx-pxp.h (((v) << 25) & BM_PXP_CTRL2_ENABLE_LUT) v 1117 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_CSC2(v) \ v 1118 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_CTRL2_ENABLE_CSC2) v 1120 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_BLOCK_SIZE(v) \ v 1121 drivers/media/platform/imx-pxp.h (((v) << 23) & BM_PXP_CTRL2_BLOCK_SIZE) v 1125 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_RSVD2(v) \ v 1126 drivers/media/platform/imx-pxp.h (((v) << 22) & BM_PXP_CTRL2_RSVD2) v 1128 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_ALPHA_B(v) \ v 1129 drivers/media/platform/imx-pxp.h (((v) << 21) & BM_PXP_CTRL2_ENABLE_ALPHA_B) v 1131 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE(v) \ v 1132 drivers/media/platform/imx-pxp.h (((v) << 20) & BM_PXP_CTRL2_ENABLE_INPUT_FETCH_STORE) v 1134 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_WFE_B(v) \ v 1135 drivers/media/platform/imx-pxp.h (((v) << 19) & BM_PXP_CTRL2_ENABLE_WFE_B) v 1137 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_WFE_A(v) \ v 1138 drivers/media/platform/imx-pxp.h (((v) << 18) & BM_PXP_CTRL2_ENABLE_WFE_A) v 1140 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE_DITHER(v) \ v 1141 drivers/media/platform/imx-pxp.h (((v) << 17) & BM_PXP_CTRL2_ENABLE_DITHER) v 1143 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_RSVD1(v) \ v 1144 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_CTRL2_RSVD1) v 1146 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_VFLIP1(v) \ v 1147 drivers/media/platform/imx-pxp.h (((v) << 15) & BM_PXP_CTRL2_VFLIP1) v 1149 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_HFLIP1(v) \ v 1150 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_CTRL2_HFLIP1) v 1153 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ROTATE1(v) \ v 1154 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_CTRL2_ROTATE1) v 1160 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_VFLIP0(v) \ v 1161 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_CTRL2_VFLIP0) v 1163 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_HFLIP0(v) \ v 1164 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_CTRL2_HFLIP0) v 1167 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ROTATE0(v) \ v 1168 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_CTRL2_ROTATE0) v 1175 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_RSVD0(v) \ v 1176 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_CTRL2_RSVD0) v 1178 drivers/media/platform/imx-pxp.h #define BF_PXP_CTRL2_ENABLE(v) \ v 1179 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_CTRL2_ENABLE) v 1185 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG0_CTRL(v) \ v 1186 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_POWER_REG0_CTRL) v 1189 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG0_ROT0_MEM_LP_STATE(v) \ v 1190 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_POWER_REG0_ROT0_MEM_LP_STATE) v 1197 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN(v) \ v 1198 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_POWER_REG0_LUT_LP_STATE_WAY1_BANKN) v 1205 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN(v) \ v 1206 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANKN) v 1213 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0(v) \ v 1214 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_POWER_REG0_LUT_LP_STATE_WAY0_BANK0) v 1224 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_RSVD0(v) \ v 1225 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_POWER_REG1_RSVD0) v 1228 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_ALU_B_MEM_LP_STATE(v) \ v 1229 drivers/media/platform/imx-pxp.h (((v) << 21) & BM_PXP_POWER_REG1_ALU_B_MEM_LP_STATE) v 1236 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_ALU_A_MEM_LP_STATE(v) \ v 1237 drivers/media/platform/imx-pxp.h (((v) << 18) & BM_PXP_POWER_REG1_ALU_A_MEM_LP_STATE) v 1244 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE(v) \ v 1245 drivers/media/platform/imx-pxp.h (((v) << 15) & BM_PXP_POWER_REG1_DITH2_LUT_MEM_LP_STATE) v 1252 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE(v) \ v 1253 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_POWER_REG1_DITH1_LUT_MEM_LP_STATE) v 1260 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE(v) \ v 1261 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_POWER_REG1_DITH0_ERR1_MEM_LP_STATE) v 1268 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE(v) \ v 1269 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_POWER_REG1_DITH0_ERR0_MEM_LP_STATE) v 1276 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE(v) \ v 1277 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_POWER_REG1_DITH0_LUT_MEM_LP_STATE) v 1284 drivers/media/platform/imx-pxp.h #define BF_PXP_POWER_REG1_ROT1_MEM_LP_STATE(v) \ v 1285 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_POWER_REG1_ROT1_MEM_LP_STATE) v 1298 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(v) \ v 1299 drivers/media/platform/imx-pxp.h (((v) << 30) & BM_PXP_DATA_PATH_CTRL0_MUX15_SEL) v 1306 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(v) \ v 1307 drivers/media/platform/imx-pxp.h (((v) << 28) & BM_PXP_DATA_PATH_CTRL0_MUX14_SEL) v 1314 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(v) \ v 1315 drivers/media/platform/imx-pxp.h (((v) << 26) & BM_PXP_DATA_PATH_CTRL0_MUX13_SEL) v 1322 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(v) \ v 1323 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_DATA_PATH_CTRL0_MUX12_SEL) v 1330 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(v) \ v 1331 drivers/media/platform/imx-pxp.h (((v) << 22) & BM_PXP_DATA_PATH_CTRL0_MUX11_SEL) v 1338 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(v) \ v 1339 drivers/media/platform/imx-pxp.h (((v) << 20) & BM_PXP_DATA_PATH_CTRL0_MUX10_SEL) v 1346 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(v) \ v 1347 drivers/media/platform/imx-pxp.h (((v) << 18) & BM_PXP_DATA_PATH_CTRL0_MUX9_SEL) v 1354 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(v) \ v 1355 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_DATA_PATH_CTRL0_MUX8_SEL) v 1362 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(v) \ v 1363 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_DATA_PATH_CTRL0_MUX7_SEL) v 1370 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(v) \ v 1371 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_DATA_PATH_CTRL0_MUX6_SEL) v 1378 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(v) \ v 1379 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_DATA_PATH_CTRL0_MUX5_SEL) v 1386 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(v) \ v 1387 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_DATA_PATH_CTRL0_MUX4_SEL) v 1394 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(v) \ v 1395 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_DATA_PATH_CTRL0_MUX3_SEL) v 1402 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(v) \ v 1403 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_DATA_PATH_CTRL0_MUX2_SEL) v 1410 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(v) \ v 1411 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_DATA_PATH_CTRL0_MUX1_SEL) v 1418 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(v) \ v 1419 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_DATA_PATH_CTRL0_MUX0_SEL) v 1432 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL1_RSVD0(v) \ v 1433 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_DATA_PATH_CTRL1_RSVD0) v 1436 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(v) \ v 1437 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_DATA_PATH_CTRL1_MUX17_SEL) v 1444 drivers/media/platform/imx-pxp.h #define BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(v) \ v 1445 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_DATA_PATH_CTRL1_MUX16_SEL) v 1457 drivers/media/platform/imx-pxp.h #define BF_PXP_INIT_MEM_CTRL_START(v) \ v 1458 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_INIT_MEM_CTRL_START) v 1461 drivers/media/platform/imx-pxp.h #define BF_PXP_INIT_MEM_CTRL_SELECT(v) \ v 1462 drivers/media/platform/imx-pxp.h (((v) << 27) & BM_PXP_INIT_MEM_CTRL_SELECT) v 1475 drivers/media/platform/imx-pxp.h #define BF_PXP_INIT_MEM_CTRL_RSVD0(v) \ v 1476 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_INIT_MEM_CTRL_RSVD0) v 1479 drivers/media/platform/imx-pxp.h #define BF_PXP_INIT_MEM_CTRL_ADDR(v) \ v 1480 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_INIT_MEM_CTRL_ADDR) v 1486 drivers/media/platform/imx-pxp.h #define BF_PXP_INIT_MEM_DATA_DATA(v) (v) v 1492 drivers/media/platform/imx-pxp.h #define BF_PXP_INIT_MEM_DATA_HIGH_DATA(v) (v) v 1500 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_COMPRESS_DONE_IRQ_EN(v) \ v 1501 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_IRQ_MASK_COMPRESS_DONE_IRQ_EN) v 1504 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_RSVD1(v) \ v 1505 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_IRQ_MASK_RSVD1) v 1507 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_WFE_B_STORE_IRQ_EN(v) \ v 1508 drivers/media/platform/imx-pxp.h (((v) << 15) & BM_PXP_IRQ_MASK_WFE_B_STORE_IRQ_EN) v 1510 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_WFE_A_STORE_IRQ_EN(v) \ v 1511 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_IRQ_MASK_WFE_A_STORE_IRQ_EN) v 1513 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_DITHER_STORE_IRQ_EN(v) \ v 1514 drivers/media/platform/imx-pxp.h (((v) << 13) & BM_PXP_IRQ_MASK_DITHER_STORE_IRQ_EN) v 1516 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_FIRST_STORE_IRQ_EN(v) \ v 1517 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_IRQ_MASK_FIRST_STORE_IRQ_EN) v 1519 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_WFE_B_CH1_STORE_IRQ_EN(v) \ v 1520 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_IRQ_MASK_WFE_B_CH1_STORE_IRQ_EN) v 1522 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_WFE_B_CH0_STORE_IRQ_EN(v) \ v 1523 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_IRQ_MASK_WFE_B_CH0_STORE_IRQ_EN) v 1525 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_WFE_A_CH1_STORE_IRQ_EN(v) \ v 1526 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_IRQ_MASK_WFE_A_CH1_STORE_IRQ_EN) v 1528 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_WFE_A_CH0_STORE_IRQ_EN(v) \ v 1529 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_IRQ_MASK_WFE_A_CH0_STORE_IRQ_EN) v 1531 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_DITHER_CH1_STORE_IRQ_EN(v) \ v 1532 drivers/media/platform/imx-pxp.h (((v) << 7) & BM_PXP_IRQ_MASK_DITHER_CH1_STORE_IRQ_EN) v 1534 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_DITHER_CH0_STORE_IRQ_EN(v) \ v 1535 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_IRQ_MASK_DITHER_CH0_STORE_IRQ_EN) v 1537 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_DITHER_CH1_PREFETCH_IRQ_EN(v) \ v 1538 drivers/media/platform/imx-pxp.h (((v) << 5) & BM_PXP_IRQ_MASK_DITHER_CH1_PREFETCH_IRQ_EN) v 1540 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_DITHER_CH0_PREFETCH_IRQ_EN(v) \ v 1541 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_IRQ_MASK_DITHER_CH0_PREFETCH_IRQ_EN) v 1543 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_FIRST_CH1_STORE_IRQ_EN(v) \ v 1544 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_IRQ_MASK_FIRST_CH1_STORE_IRQ_EN) v 1546 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_FIRST_CH0_STORE_IRQ_EN(v) \ v 1547 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_IRQ_MASK_FIRST_CH0_STORE_IRQ_EN) v 1549 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_FIRST_CH1_PREFETCH_IRQ_EN(v) \ v 1550 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_IRQ_MASK_FIRST_CH1_PREFETCH_IRQ_EN) v 1552 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_MASK_FIRST_CH0_PREFETCH_IRQ_EN(v) \ v 1553 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_IRQ_MASK_FIRST_CH0_PREFETCH_IRQ_EN) v 1561 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_COMPRESS_DONE_IRQ(v) \ v 1562 drivers/media/platform/imx-pxp.h (((v) << 31) & BM_PXP_IRQ_COMPRESS_DONE_IRQ) v 1565 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_RSVD1(v) \ v 1566 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_IRQ_RSVD1) v 1568 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_WFE_B_STORE_IRQ(v) \ v 1569 drivers/media/platform/imx-pxp.h (((v) << 15) & BM_PXP_IRQ_WFE_B_STORE_IRQ) v 1571 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_WFE_A_STORE_IRQ(v) \ v 1572 drivers/media/platform/imx-pxp.h (((v) << 14) & BM_PXP_IRQ_WFE_A_STORE_IRQ) v 1574 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_DITHER_STORE_IRQ(v) \ v 1575 drivers/media/platform/imx-pxp.h (((v) << 13) & BM_PXP_IRQ_DITHER_STORE_IRQ) v 1577 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_FIRST_STORE_IRQ(v) \ v 1578 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_IRQ_FIRST_STORE_IRQ) v 1580 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_WFE_B_CH1_STORE_IRQ(v) \ v 1581 drivers/media/platform/imx-pxp.h (((v) << 11) & BM_PXP_IRQ_WFE_B_CH1_STORE_IRQ) v 1583 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_WFE_B_CH0_STORE_IRQ(v) \ v 1584 drivers/media/platform/imx-pxp.h (((v) << 10) & BM_PXP_IRQ_WFE_B_CH0_STORE_IRQ) v 1586 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_WFE_A_CH1_STORE_IRQ(v) \ v 1587 drivers/media/platform/imx-pxp.h (((v) << 9) & BM_PXP_IRQ_WFE_A_CH1_STORE_IRQ) v 1589 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_WFE_A_CH0_STORE_IRQ(v) \ v 1590 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_IRQ_WFE_A_CH0_STORE_IRQ) v 1592 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_DITHER_CH1_STORE_IRQ(v) \ v 1593 drivers/media/platform/imx-pxp.h (((v) << 7) & BM_PXP_IRQ_DITHER_CH1_STORE_IRQ) v 1595 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_DITHER_CH0_STORE_IRQ(v) \ v 1596 drivers/media/platform/imx-pxp.h (((v) << 6) & BM_PXP_IRQ_DITHER_CH0_STORE_IRQ) v 1598 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ(v) \ v 1599 drivers/media/platform/imx-pxp.h (((v) << 5) & BM_PXP_IRQ_DITHER_CH1_PREFETCH_IRQ) v 1601 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ(v) \ v 1602 drivers/media/platform/imx-pxp.h (((v) << 4) & BM_PXP_IRQ_DITHER_CH0_PREFETCH_IRQ) v 1604 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_FIRST_CH1_STORE_IRQ(v) \ v 1605 drivers/media/platform/imx-pxp.h (((v) << 3) & BM_PXP_IRQ_FIRST_CH1_STORE_IRQ) v 1607 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_FIRST_CH0_STORE_IRQ(v) \ v 1608 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_IRQ_FIRST_CH0_STORE_IRQ) v 1610 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_FIRST_CH1_PREFETCH_IRQ(v) \ v 1611 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_IRQ_FIRST_CH1_PREFETCH_IRQ) v 1613 drivers/media/platform/imx-pxp.h #define BF_PXP_IRQ_FIRST_CH0_PREFETCH_IRQ(v) \ v 1614 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_IRQ_FIRST_CH0_PREFETCH_IRQ) v 1620 drivers/media/platform/imx-pxp.h #define BF_PXP_NEXT_POINTER(v) \ v 1621 drivers/media/platform/imx-pxp.h (((v) << 2) & BM_PXP_NEXT_POINTER) v 1623 drivers/media/platform/imx-pxp.h #define BF_PXP_NEXT_RSVD(v) \ v 1624 drivers/media/platform/imx-pxp.h (((v) << 1) & BM_PXP_NEXT_RSVD) v 1626 drivers/media/platform/imx-pxp.h #define BF_PXP_NEXT_ENABLED(v) \ v 1627 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_NEXT_ENABLED) v 1633 drivers/media/platform/imx-pxp.h #define BF_PXP_DEBUGCTRL_RSVD(v) \ v 1634 drivers/media/platform/imx-pxp.h (((v) << 12) & BM_PXP_DEBUGCTRL_RSVD) v 1637 drivers/media/platform/imx-pxp.h #define BF_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT(v) \ v 1638 drivers/media/platform/imx-pxp.h (((v) << 8) & BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT) v 1646 drivers/media/platform/imx-pxp.h #define BF_PXP_DEBUGCTRL_SELECT(v) \ v 1647 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_DEBUGCTRL_SELECT) v 1668 drivers/media/platform/imx-pxp.h #define BF_PXP_DEBUG_DATA(v) (v) v 1674 drivers/media/platform/imx-pxp.h #define BF_PXP_VERSION_MAJOR(v) \ v 1675 drivers/media/platform/imx-pxp.h (((v) << 24) & BM_PXP_VERSION_MAJOR) v 1678 drivers/media/platform/imx-pxp.h #define BF_PXP_VERSION_MINOR(v) \ v 1679 drivers/media/platform/imx-pxp.h (((v) << 16) & BM_PXP_VERSION_MINOR) v 1682 drivers/media/platform/imx-pxp.h #define BF_PXP_VERSION_STEP(v) \ v 1683 drivers/media/platform/imx-pxp.h (((v) << 0) & BM_PXP_VERSION_STEP) v 328 drivers/media/platform/marvell-ccic/mcam-core.c dma_addr_t y, u = 0, v = 0; v 335 drivers/media/platform/marvell-ccic/mcam-core.c v = u + pixel_count / 4; v 338 drivers/media/platform/marvell-ccic/mcam-core.c v = y + pixel_count; v 339 drivers/media/platform/marvell-ccic/mcam-core.c u = v + pixel_count / 4; v 348 drivers/media/platform/marvell-ccic/mcam-core.c mcam_reg_write(cam, REG_V0BAR + frame * 4, v); v 215 drivers/media/platform/marvell-ccic/mcam-core.h unsigned int v = mcam_reg_read(cam, reg); v 217 drivers/media/platform/marvell-ccic/mcam-core.h v = (v & ~mask) | (val & mask); v 218 drivers/media/platform/marvell-ccic/mcam-core.h mcam_reg_write(cam, reg, v); v 308 drivers/media/platform/omap3isp/isp.h u32 v = isp_reg_readl(isp, mmio_range, reg); v 310 drivers/media/platform/omap3isp/isp.h isp_reg_writel(isp, v & ~clr_bits, mmio_range, reg); v 324 drivers/media/platform/omap3isp/isp.h u32 v = isp_reg_readl(isp, mmio_range, reg); v 326 drivers/media/platform/omap3isp/isp.h isp_reg_writel(isp, v | set_bits, mmio_range, reg); v 343 drivers/media/platform/omap3isp/isp.h u32 v = isp_reg_readl(isp, mmio_range, reg); v 345 drivers/media/platform/omap3isp/isp.h isp_reg_writel(isp, (v & ~clr_bits) | set_bits, mmio_range, reg); v 32 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_RST_CMD(v) ((v) == CAMSS_8x16 ? 0x00c : 0x010) v 33 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_CID_LUT_VC_n(v, n) \ v 34 drivers/media/platform/qcom/camss/camss-csid.c (((v) == CAMSS_8x16 ? 0x010 : 0x014) + 0x4 * (n)) v 35 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_CID_n_CFG(v, n) \ v 36 drivers/media/platform/qcom/camss/camss-csid.c (((v) == CAMSS_8x16 ? 0x020 : 0x024) + 0x4 * (n)) v 46 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_IRQ_CLEAR_CMD(v) ((v) == CAMSS_8x16 ? 0x060 : 0x064) v 47 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_IRQ_MASK(v) ((v) == CAMSS_8x16 ? 0x064 : 0x068) v 48 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_IRQ_STATUS(v) ((v) == CAMSS_8x16 ? 0x068 : 0x06c) v 49 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_TG_CTRL(v) ((v) == CAMSS_8x16 ? 0x0a0 : 0x0a8) v 52 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_TG_VC_CFG(v) ((v) == CAMSS_8x16 ? 0x0a4 : 0x0ac) v 55 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_TG_DT_n_CGG_0(v, n) \ v 56 drivers/media/platform/qcom/camss/camss-csid.c (((v) == CAMSS_8x16 ? 0x0ac : 0x0b4) + 0xc * (n)) v 57 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_TG_DT_n_CGG_1(v, n) \ v 58 drivers/media/platform/qcom/camss/camss-csid.c (((v) == CAMSS_8x16 ? 0x0b0 : 0x0b8) + 0xc * (n)) v 59 drivers/media/platform/qcom/camss/camss-csid.c #define CAMSS_CSID_TG_DT_n_CGG_2(v, n) \ v 60 drivers/media/platform/qcom/camss/camss-csid.c (((v) == CAMSS_8x16 ? 0x0b4 : 0x0bc) + 0xc * (n)) v 36 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c #define writel(v, r) \ v 38 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c pr_err("MFCWRITE(%p): %08x\n", r, (unsigned int)v); \ v 39 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c __raw_writel(v, r); \ v 171 drivers/media/platform/tegra-cec/tegra_cec.c u32 v; v 175 drivers/media/platform/tegra-cec/tegra_cec.c v = cec_read(cec, TEGRA_CEC_RX_REGISTER); v 177 drivers/media/platform/tegra-cec/tegra_cec.c cec->rx_buf[cec->rx_buf_cnt++] = v & 0xff; v 178 drivers/media/platform/tegra-cec/tegra_cec.c if (v & TEGRA_CEC_RX_REGISTER_EOM) { v 388 drivers/media/platform/vim2m.c u8 y, y1, u, v; v 394 drivers/media/platform/vim2m.c v = ((14456 * (*r++) - 12105 * (*g++) - 2351 * (*b++) v 403 drivers/media/platform/vim2m.c *(*dst)++ = v; v 164 drivers/media/radio/dsbr100.c struct v4l2_capability *v) v 168 drivers/media/radio/dsbr100.c strscpy(v->driver, "dsbr100", sizeof(v->driver)); v 169 drivers/media/radio/dsbr100.c strscpy(v->card, "D-Link R-100 USB FM Radio", sizeof(v->card)); v 170 drivers/media/radio/dsbr100.c usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); v 175 drivers/media/radio/dsbr100.c struct v4l2_tuner *v) v 179 drivers/media/radio/dsbr100.c if (v->index > 0) v 183 drivers/media/radio/dsbr100.c strscpy(v->name, "FM", sizeof(v->name)); v 184 drivers/media/radio/dsbr100.c v->type = V4L2_TUNER_RADIO; v 185 drivers/media/radio/dsbr100.c v->rangelow = FREQ_MIN * FREQ_MUL; v 186 drivers/media/radio/dsbr100.c v->rangehigh = FREQ_MAX * FREQ_MUL; v 187 drivers/media/radio/dsbr100.c v->rxsubchans = radio->stereo ? V4L2_TUNER_SUB_STEREO : v 189 drivers/media/radio/dsbr100.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO; v 190 drivers/media/radio/dsbr100.c v->audmode = V4L2_TUNER_MODE_STEREO; v 191 drivers/media/radio/dsbr100.c v->signal = radio->stereo ? 0xffff : 0; /* We can't get the signal strength */ v 196 drivers/media/radio/dsbr100.c const struct v4l2_tuner *v) v 198 drivers/media/radio/dsbr100.c return v->index ? -EINVAL : 0; v 355 drivers/media/radio/radio-cadet.c struct v4l2_capability *v) v 357 drivers/media/radio/radio-cadet.c strscpy(v->driver, "ADS Cadet", sizeof(v->driver)); v 358 drivers/media/radio/radio-cadet.c strscpy(v->card, "ADS Cadet", sizeof(v->card)); v 359 drivers/media/radio/radio-cadet.c strscpy(v->bus_info, "ISA:radio-cadet", sizeof(v->bus_info)); v 364 drivers/media/radio/radio-cadet.c struct v4l2_tuner *v) v 368 drivers/media/radio/radio-cadet.c if (v->index) v 370 drivers/media/radio/radio-cadet.c v->type = V4L2_TUNER_RADIO; v 371 drivers/media/radio/radio-cadet.c strscpy(v->name, "Radio", sizeof(v->name)); v 372 drivers/media/radio/radio-cadet.c v->capability = bands[0].capability | bands[1].capability; v 373 drivers/media/radio/radio-cadet.c v->rangelow = bands[0].rangelow; /* 520 kHz (start of AM band) */ v 374 drivers/media/radio/radio-cadet.c v->rangehigh = bands[1].rangehigh; /* 108.0 MHz (end of FM band) */ v 376 drivers/media/radio/radio-cadet.c v->rxsubchans = cadet_getstereo(dev); v 382 drivers/media/radio/radio-cadet.c v->rxsubchans |= V4L2_TUNER_SUB_RDS; v 384 drivers/media/radio/radio-cadet.c v->rangelow = 8320; /* 520 kHz */ v 385 drivers/media/radio/radio-cadet.c v->rangehigh = 26400; /* 1650 kHz */ v 386 drivers/media/radio/radio-cadet.c v->rxsubchans = V4L2_TUNER_SUB_MONO; v 388 drivers/media/radio/radio-cadet.c v->audmode = V4L2_TUNER_MODE_STEREO; v 389 drivers/media/radio/radio-cadet.c v->signal = dev->sigstrength; /* We might need to modify scaling of this */ v 394 drivers/media/radio/radio-cadet.c const struct v4l2_tuner *v) v 396 drivers/media/radio/radio-cadet.c return v->index ? -EINVAL : 0; v 33 drivers/media/radio/radio-isa.c struct v4l2_capability *v) v 37 drivers/media/radio/radio-isa.c strscpy(v->driver, isa->drv->driver.driver.name, sizeof(v->driver)); v 38 drivers/media/radio/radio-isa.c strscpy(v->card, isa->drv->card, sizeof(v->card)); v 39 drivers/media/radio/radio-isa.c snprintf(v->bus_info, sizeof(v->bus_info), "ISA:%s", isa->v4l2_dev.name); v 44 drivers/media/radio/radio-isa.c struct v4l2_tuner *v) v 49 drivers/media/radio/radio-isa.c if (v->index > 0) v 52 drivers/media/radio/radio-isa.c strscpy(v->name, "FM", sizeof(v->name)); v 53 drivers/media/radio/radio-isa.c v->type = V4L2_TUNER_RADIO; v 54 drivers/media/radio/radio-isa.c v->rangelow = FREQ_LOW; v 55 drivers/media/radio/radio-isa.c v->rangehigh = FREQ_HIGH; v 56 drivers/media/radio/radio-isa.c v->capability = V4L2_TUNER_CAP_LOW; v 58 drivers/media/radio/radio-isa.c v->capability |= V4L2_TUNER_CAP_STEREO; v 61 drivers/media/radio/radio-isa.c v->rxsubchans = ops->g_rxsubchans(isa); v 63 drivers/media/radio/radio-isa.c v->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; v 64 drivers/media/radio/radio-isa.c v->audmode = isa->stereo ? V4L2_TUNER_MODE_STEREO : V4L2_TUNER_MODE_MONO; v 66 drivers/media/radio/radio-isa.c v->signal = ops->g_signal(isa); v 68 drivers/media/radio/radio-isa.c v->signal = (v->rxsubchans & V4L2_TUNER_SUB_STEREO) ? v 74 drivers/media/radio/radio-isa.c const struct v4l2_tuner *v) v 79 drivers/media/radio/radio-isa.c if (v->index) v 82 drivers/media/radio/radio-isa.c isa->stereo = (v->audmode == V4L2_TUNER_MODE_STEREO); v 164 drivers/media/radio/radio-keene.c struct v4l2_capability *v) v 168 drivers/media/radio/radio-keene.c strscpy(v->driver, "radio-keene", sizeof(v->driver)); v 169 drivers/media/radio/radio-keene.c strscpy(v->card, "Keene FM Transmitter", sizeof(v->card)); v 170 drivers/media/radio/radio-keene.c usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); v 175 drivers/media/radio/radio-keene.c struct v4l2_modulator *v) v 179 drivers/media/radio/radio-keene.c if (v->index > 0) v 182 drivers/media/radio/radio-keene.c strscpy(v->name, "FM", sizeof(v->name)); v 183 drivers/media/radio/radio-keene.c v->rangelow = FREQ_MIN * FREQ_MUL; v 184 drivers/media/radio/radio-keene.c v->rangehigh = FREQ_MAX * FREQ_MUL; v 185 drivers/media/radio/radio-keene.c v->txsubchans = radio->stereo ? V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO; v 186 drivers/media/radio/radio-keene.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO; v 191 drivers/media/radio/radio-keene.c const struct v4l2_modulator *v) v 195 drivers/media/radio/radio-keene.c if (v->index > 0) v 198 drivers/media/radio/radio-keene.c radio->stereo = (v->txsubchans == V4L2_TUNER_SUB_STEREO); v 187 drivers/media/radio/radio-ma901.c struct v4l2_capability *v) v 191 drivers/media/radio/radio-ma901.c strscpy(v->driver, "radio-ma901", sizeof(v->driver)); v 192 drivers/media/radio/radio-ma901.c strscpy(v->card, "Masterkit MA901 USB FM Radio", sizeof(v->card)); v 193 drivers/media/radio/radio-ma901.c usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); v 199 drivers/media/radio/radio-ma901.c struct v4l2_tuner *v) v 203 drivers/media/radio/radio-ma901.c if (v->index > 0) v 206 drivers/media/radio/radio-ma901.c v->signal = 0; v 214 drivers/media/radio/radio-ma901.c strscpy(v->name, "FM", sizeof(v->name)); v 215 drivers/media/radio/radio-ma901.c v->type = V4L2_TUNER_RADIO; v 216 drivers/media/radio/radio-ma901.c v->rangelow = FREQ_MIN * FREQ_MUL; v 217 drivers/media/radio/radio-ma901.c v->rangehigh = FREQ_MAX * FREQ_MUL; v 218 drivers/media/radio/radio-ma901.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO; v 220 drivers/media/radio/radio-ma901.c v->audmode = radio->stereo ? v 227 drivers/media/radio/radio-ma901.c const struct v4l2_tuner *v) v 231 drivers/media/radio/radio-ma901.c if (v->index > 0) v 235 drivers/media/radio/radio-ma901.c switch (v->audmode) { v 200 drivers/media/radio/radio-miropcm20.c struct v4l2_capability *v) v 204 drivers/media/radio/radio-miropcm20.c strscpy(v->driver, "Miro PCM20", sizeof(v->driver)); v 205 drivers/media/radio/radio-miropcm20.c strscpy(v->card, "Miro PCM20", sizeof(v->card)); v 206 drivers/media/radio/radio-miropcm20.c snprintf(v->bus_info, sizeof(v->bus_info), "ISA:%s", dev->v4l2_dev.name); v 225 drivers/media/radio/radio-miropcm20.c struct v4l2_tuner *v) v 231 drivers/media/radio/radio-miropcm20.c if (v->index) v 233 drivers/media/radio/radio-miropcm20.c strscpy(v->name, "FM", sizeof(v->name)); v 234 drivers/media/radio/radio-miropcm20.c v->type = V4L2_TUNER_RADIO; v 235 drivers/media/radio/radio-miropcm20.c v->rangelow = 87*16000; v 236 drivers/media/radio/radio-miropcm20.c v->rangehigh = 108*16000; v 238 drivers/media/radio/radio-miropcm20.c v->signal = (res & 0x80) ? 0 : 0xffff; v 242 drivers/media/radio/radio-miropcm20.c v->rxsubchans = (res & 0x40) ? V4L2_TUNER_SUB_MONO : v 244 drivers/media/radio/radio-miropcm20.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO | v 246 drivers/media/radio/radio-miropcm20.c v->audmode = dev->audmode; v 249 drivers/media/radio/radio-miropcm20.c v->rxsubchans |= V4L2_TUNER_SUB_RDS; v 254 drivers/media/radio/radio-miropcm20.c const struct v4l2_tuner *v) v 258 drivers/media/radio/radio-miropcm20.c if (v->index) v 260 drivers/media/radio/radio-miropcm20.c if (v->audmode > V4L2_TUNER_MODE_STEREO) v 263 drivers/media/radio/radio-miropcm20.c dev->audmode = v->audmode; v 256 drivers/media/radio/radio-mr800.c struct v4l2_capability *v) v 260 drivers/media/radio/radio-mr800.c strscpy(v->driver, "radio-mr800", sizeof(v->driver)); v 261 drivers/media/radio/radio-mr800.c strscpy(v->card, "AverMedia MR 800 USB FM Radio", sizeof(v->card)); v 262 drivers/media/radio/radio-mr800.c usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); v 268 drivers/media/radio/radio-mr800.c struct v4l2_tuner *v) v 274 drivers/media/radio/radio-mr800.c if (v->index > 0) v 277 drivers/media/radio/radio-mr800.c v->signal = 0; v 278 drivers/media/radio/radio-mr800.c retval = amradio_get_stat(radio, &is_stereo, &v->signal); v 282 drivers/media/radio/radio-mr800.c strscpy(v->name, "FM", sizeof(v->name)); v 283 drivers/media/radio/radio-mr800.c v->type = V4L2_TUNER_RADIO; v 284 drivers/media/radio/radio-mr800.c v->rangelow = FREQ_MIN * FREQ_MUL; v 285 drivers/media/radio/radio-mr800.c v->rangehigh = FREQ_MAX * FREQ_MUL; v 286 drivers/media/radio/radio-mr800.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO | v 288 drivers/media/radio/radio-mr800.c v->rxsubchans = is_stereo ? V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO; v 289 drivers/media/radio/radio-mr800.c v->audmode = radio->stereo ? v 296 drivers/media/radio/radio-mr800.c const struct v4l2_tuner *v) v 300 drivers/media/radio/radio-mr800.c if (v->index > 0) v 304 drivers/media/radio/radio-mr800.c switch (v->audmode) { v 180 drivers/media/radio/radio-raremono.c struct v4l2_capability *v) v 184 drivers/media/radio/radio-raremono.c strscpy(v->driver, "radio-raremono", sizeof(v->driver)); v 185 drivers/media/radio/radio-raremono.c strscpy(v->card, "Thanko's Raremono", sizeof(v->card)); v 186 drivers/media/radio/radio-raremono.c usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); v 205 drivers/media/radio/radio-raremono.c struct v4l2_tuner *v) v 210 drivers/media/radio/radio-raremono.c if (v->index > 0) v 213 drivers/media/radio/radio-raremono.c strscpy(v->name, "AM/FM/SW", sizeof(v->name)); v 214 drivers/media/radio/radio-raremono.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO | v 216 drivers/media/radio/radio-raremono.c v->rangelow = AM_FREQ_RANGE_LOW * 16; v 217 drivers/media/radio/radio-raremono.c v->rangehigh = FM_FREQ_RANGE_HIGH * 16; v 218 drivers/media/radio/radio-raremono.c v->rxsubchans = V4L2_TUNER_SUB_STEREO | V4L2_TUNER_SUB_MONO; v 219 drivers/media/radio/radio-raremono.c v->audmode = (radio->curfreq < FM_FREQ_RANGE_LOW) ? v 229 drivers/media/radio/radio-raremono.c v->signal = ((radio->buffer[1] & 0xf) << 8 | radio->buffer[2]) << 4; v 234 drivers/media/radio/radio-raremono.c const struct v4l2_tuner *v) v 236 drivers/media/radio/radio-raremono.c return v->index ? -EINVAL : 0; v 131 drivers/media/radio/radio-sf16fmi.c struct v4l2_capability *v) v 133 drivers/media/radio/radio-sf16fmi.c strscpy(v->driver, "radio-sf16fmi", sizeof(v->driver)); v 134 drivers/media/radio/radio-sf16fmi.c strscpy(v->card, "SF16-FMI/FMP/FMD radio", sizeof(v->card)); v 135 drivers/media/radio/radio-sf16fmi.c strscpy(v->bus_info, "ISA:radio-sf16fmi", sizeof(v->bus_info)); v 140 drivers/media/radio/radio-sf16fmi.c struct v4l2_tuner *v) v 144 drivers/media/radio/radio-sf16fmi.c if (v->index > 0) v 147 drivers/media/radio/radio-sf16fmi.c strscpy(v->name, "FM", sizeof(v->name)); v 148 drivers/media/radio/radio-sf16fmi.c v->type = V4L2_TUNER_RADIO; v 149 drivers/media/radio/radio-sf16fmi.c v->rangelow = RSF16_MINFREQ; v 150 drivers/media/radio/radio-sf16fmi.c v->rangehigh = RSF16_MAXFREQ; v 151 drivers/media/radio/radio-sf16fmi.c v->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; v 152 drivers/media/radio/radio-sf16fmi.c v->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LOW; v 153 drivers/media/radio/radio-sf16fmi.c v->audmode = V4L2_TUNER_MODE_STEREO; v 154 drivers/media/radio/radio-sf16fmi.c v->signal = fmi_getsigstr(fmi); v 159 drivers/media/radio/radio-sf16fmi.c const struct v4l2_tuner *v) v 161 drivers/media/radio/radio-sf16fmi.c return v->index ? -EINVAL : 0; v 276 drivers/media/radio/radio-tea5764.c struct v4l2_capability *v) v 281 drivers/media/radio/radio-tea5764.c strscpy(v->driver, dev->dev.driver->name, sizeof(v->driver)); v 282 drivers/media/radio/radio-tea5764.c strscpy(v->card, dev->name, sizeof(v->card)); v 283 drivers/media/radio/radio-tea5764.c snprintf(v->bus_info, sizeof(v->bus_info), v 289 drivers/media/radio/radio-tea5764.c struct v4l2_tuner *v) v 294 drivers/media/radio/radio-tea5764.c if (v->index > 0) v 297 drivers/media/radio/radio-tea5764.c strscpy(v->name, "FM", sizeof(v->name)); v 298 drivers/media/radio/radio-tea5764.c v->type = V4L2_TUNER_RADIO; v 300 drivers/media/radio/radio-tea5764.c v->rangelow = FREQ_MIN * FREQ_MUL; v 301 drivers/media/radio/radio-tea5764.c v->rangehigh = FREQ_MAX * FREQ_MUL; v 302 drivers/media/radio/radio-tea5764.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO; v 304 drivers/media/radio/radio-tea5764.c v->rxsubchans = V4L2_TUNER_SUB_STEREO; v 306 drivers/media/radio/radio-tea5764.c v->rxsubchans = V4L2_TUNER_SUB_MONO; v 307 drivers/media/radio/radio-tea5764.c v->audmode = tea5764_get_audout_mode(radio); v 308 drivers/media/radio/radio-tea5764.c v->signal = TEA5764_TUNCHK_LEVEL(r->tunchk) * 0xffff / 0xf; v 309 drivers/media/radio/radio-tea5764.c v->afc = TEA5764_TUNCHK_IFCNT(r->tunchk); v 315 drivers/media/radio/radio-tea5764.c const struct v4l2_tuner *v) v 319 drivers/media/radio/radio-tea5764.c if (v->index > 0) v 322 drivers/media/radio/radio-tea5764.c tea5764_set_audout_mode(radio, v->audmode); v 255 drivers/media/radio/radio-tea5777.c struct v4l2_capability *v) v 259 drivers/media/radio/radio-tea5777.c strscpy(v->driver, tea->v4l2_dev->name, sizeof(v->driver)); v 260 drivers/media/radio/radio-tea5777.c strscpy(v->card, tea->card, sizeof(v->card)); v 261 drivers/media/radio/radio-tea5777.c strlcat(v->card, " TEA5777", sizeof(v->card)); v 262 drivers/media/radio/radio-tea5777.c strscpy(v->bus_info, tea->bus_info, sizeof(v->bus_info)); v 280 drivers/media/radio/radio-tea5777.c struct v4l2_tuner *v) v 285 drivers/media/radio/radio-tea5777.c if (v->index > 0) v 292 drivers/media/radio/radio-tea5777.c memset(v, 0, sizeof(*v)); v 294 drivers/media/radio/radio-tea5777.c strscpy(v->name, "AM/FM", sizeof(v->name)); v 296 drivers/media/radio/radio-tea5777.c strscpy(v->name, "FM", sizeof(v->name)); v 297 drivers/media/radio/radio-tea5777.c v->type = V4L2_TUNER_RADIO; v 298 drivers/media/radio/radio-tea5777.c v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO | v 302 drivers/media/radio/radio-tea5777.c v->rangelow = tea->has_am ? bands[BAND_AM].rangelow : v 304 drivers/media/radio/radio-tea5777.c v->rangehigh = bands[BAND_FM].rangehigh; v 307 drivers/media/radio/radio-tea5777.c v->rxsubchans = V4L2_TUNER_SUB_STEREO; v 309 drivers/media/radio/radio-tea5777.c v->rxsubchans = V4L2_TUNER_SUB_MONO; v 310 drivers/media/radio/radio-tea5777.c v->audmode = tea->audmode; v 312 drivers/media/radio/radio-tea5777.c v->signal = (tea->read_reg & TEA5777_R_LEVEL_MASK) >> v 322 drivers/media/radio/radio-tea5777.c const struct v4l2_tuner *v) v 327 drivers/media/radio/radio-tea5777.c if (v->index) v 330 drivers/media/radio/radio-tea5777.c tea->audmode = v->audmode; v 32 drivers/media/radio/radio-timb.c struct v4l2_capability *v) v 34 drivers/media/radio/radio-timb.c strscpy(v->driver, DRIVER_NAME, sizeof(v->driver)); v 35 drivers/media/radio/radio-timb.c strscpy(v->card, "Timberdale Radio", sizeof(v->card)); v 36 drivers/media/radio/radio-timb.c snprintf(v->bus_info, sizeof(v->bus_info), "platform:"DRIVER_NAME); v 41 drivers/media/radio/radio-timb.c struct v4l2_tuner *v) v 44 drivers/media/radio/radio-timb.c return v4l2_subdev_call(tr->sd_tuner, tuner, g_tuner, v); v 48 drivers/media/radio/radio-timb.c const struct v4l2_tuner *v) v 51 drivers/media/radio/radio-timb.c return v4l2_subdev_call(tr->sd_tuner, tuner, s_tuner, v); v 140 drivers/media/radio/radio-trust.c int i, v; v 142 drivers/media/radio/radio-trust.c for (i = 0, v = 0; i < 100; i++) v 143 drivers/media/radio/radio-trust.c v |= inb(isa->io); v 144 drivers/media/radio/radio-trust.c return (v & 1) ? 0 : 0xffff; v 66 drivers/media/radio/si4713/radio-usb-si4713.c struct v4l2_capability *v) v 70 drivers/media/radio/si4713/radio-usb-si4713.c strscpy(v->driver, "radio-usb-si4713", sizeof(v->driver)); v 71 drivers/media/radio/si4713/radio-usb-si4713.c strscpy(v->card, "Si4713 FM Transmitter", sizeof(v->card)); v 72 drivers/media/radio/si4713/radio-usb-si4713.c usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); v 76 drivers/media/radio/si4713/si4713.c #define set_bits(p, v, b, m) (((p) & ~(m)) | ((v) << (b))) v 221 drivers/media/radio/tea575x.c struct v4l2_capability *v) v 225 drivers/media/radio/tea575x.c strscpy(v->driver, tea->v4l2_dev->name, sizeof(v->driver)); v 226 drivers/media/radio/tea575x.c strscpy(v->card, tea->card, sizeof(v->card)); v 227 drivers/media/radio/tea575x.c strlcat(v->card, tea->tea5759 ? " TEA5759" : " TEA5757", sizeof(v->card)); v 228 drivers/media/radio/tea575x.c strscpy(v->bus_info, tea->bus_info, sizeof(v->bus_info)); v 273 drivers/media/radio/tea575x.c int snd_tea575x_g_tuner(struct snd_tea575x *tea, struct v4l2_tuner *v) v 277 drivers/media/radio/tea575x.c if (v->index > 0) v 283 drivers/media/radio/tea575x.c memset(v, 0, sizeof(*v)); v 284 drivers/media/radio/tea575x.c strscpy(v->name, tea->has_am ? "FM/AM" : "FM", sizeof(v->name)); v 285 drivers/media/radio/tea575x.c v->type = V4L2_TUNER_RADIO; v 286 drivers/media/radio/tea575x.c v->capability = band_fm.capability; v 287 drivers/media/radio/tea575x.c v->rangelow = tea->has_am ? bands[BAND_AM].rangelow : band_fm.rangelow; v 288 drivers/media/radio/tea575x.c v->rangehigh = band_fm.rangehigh; v 289 drivers/media/radio/tea575x.c v->rxsubchans = tea->stereo ? V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO; v 290 drivers/media/radio/tea575x.c v->audmode = (tea->val & TEA575X_BIT_MONO) ? v 292 drivers/media/radio/tea575x.c v->signal = tea->tuned ? 0xffff : 0; v 298 drivers/media/radio/tea575x.c struct v4l2_tuner *v) v 302 drivers/media/radio/tea575x.c return snd_tea575x_g_tuner(tea, v); v 306 drivers/media/radio/tea575x.c const struct v4l2_tuner *v) v 311 drivers/media/radio/tea575x.c if (v->index) v 314 drivers/media/radio/tea575x.c if (v->audmode == V4L2_TUNER_MODE_MONO) v 68 drivers/media/radio/tef6862.c static int tef6862_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v) v 70 drivers/media/radio/tef6862.c if (v->index > 0) v 74 drivers/media/radio/tef6862.c strscpy(v->name, "FM", sizeof(v->name)); v 75 drivers/media/radio/tef6862.c v->type = V4L2_TUNER_RADIO; v 76 drivers/media/radio/tef6862.c v->rangelow = TEF6862_LO_FREQ; v 77 drivers/media/radio/tef6862.c v->rangehigh = TEF6862_HI_FREQ; v 78 drivers/media/radio/tef6862.c v->rxsubchans = V4L2_TUNER_SUB_MONO; v 79 drivers/media/radio/tef6862.c v->capability = V4L2_TUNER_CAP_LOW; v 80 drivers/media/radio/tef6862.c v->audmode = V4L2_TUNER_MODE_STEREO; v 81 drivers/media/radio/tef6862.c v->signal = tef6862_sigstr(v4l2_get_subdevdata(sd)); v 86 drivers/media/radio/tef6862.c static int tef6862_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v) v 88 drivers/media/radio/tef6862.c return v->index ? -EINVAL : 0; v 52 drivers/media/rc/mtk-cir.c #define MTK_IR_END(v, p) ((v) == MTK_MAX_SAMPLES && (p) == 0) v 57 drivers/media/rc/tango-ir.c u32 v, code; v 60 drivers/media/rc/tango-ir.c v = readl_relaxed(ir->rc5_base + IR_NEC_DATA); v 61 drivers/media/rc/tango-ir.c if (!v) { v 66 drivers/media/rc/tango-ir.c code = ir_nec_bytes_to_scancode(v, v >> 8, v >> 16, v >> 24, &proto); v 112 drivers/media/rc/ttusbir.c unsigned i, v, b; v 116 drivers/media/rc/ttusbir.c v = buf[i] & 0xfe; v 117 drivers/media/rc/ttusbir.c switch (v) { v 132 drivers/media/rc/ttusbir.c if (v & 2) { v 133 drivers/media/rc/ttusbir.c b = ffz(v | 1); v 136 drivers/media/rc/ttusbir.c b = ffs(v) - 1; v 295 drivers/media/tuners/e4000.c static int e4000_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v) v 300 drivers/media/tuners/e4000.c dev_dbg(&client->dev, "index=%d\n", v->index); v 302 drivers/media/tuners/e4000.c strscpy(v->name, "Elonics E4000", sizeof(v->name)); v 303 drivers/media/tuners/e4000.c v->type = V4L2_TUNER_RF; v 304 drivers/media/tuners/e4000.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 305 drivers/media/tuners/e4000.c v->rangelow = bands[0].rangelow; v 306 drivers/media/tuners/e4000.c v->rangehigh = bands[1].rangehigh; v 310 drivers/media/tuners/e4000.c static int e4000_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v) v 315 drivers/media/tuners/e4000.c dev_dbg(&client->dev, "index=%d\n", v->index); v 388 drivers/media/tuners/fc2580.c static int fc2580_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v) v 393 drivers/media/tuners/fc2580.c dev_dbg(&client->dev, "index=%d\n", v->index); v 395 drivers/media/tuners/fc2580.c strscpy(v->name, "FCI FC2580", sizeof(v->name)); v 396 drivers/media/tuners/fc2580.c v->type = V4L2_TUNER_RF; v 397 drivers/media/tuners/fc2580.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 398 drivers/media/tuners/fc2580.c v->rangelow = bands[0].rangelow; v 399 drivers/media/tuners/fc2580.c v->rangehigh = bands[0].rangehigh; v 403 drivers/media/tuners/fc2580.c static int fc2580_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v) v 408 drivers/media/tuners/fc2580.c dev_dbg(&client->dev, "index=%d\n", v->index); v 81 drivers/media/tuners/max2165.c u8 v; v 84 drivers/media/tuners/max2165.c ret = max2165_read_reg(priv, reg, &v); v 87 drivers/media/tuners/max2165.c v &= ~mask; v 88 drivers/media/tuners/max2165.c v |= data; v 89 drivers/media/tuners/max2165.c ret = max2165_write_reg(priv, reg, v); v 123 drivers/media/tuners/max2165.c u8 v; v 125 drivers/media/tuners/max2165.c v = (osc / 2); v 126 drivers/media/tuners/max2165.c if (v == 2) v 127 drivers/media/tuners/max2165.c v = 0x7; v 129 drivers/media/tuners/max2165.c v -= 8; v 131 drivers/media/tuners/max2165.c max2165_mask_write_reg(priv, REG_PLL_CFG, 0x07, v); v 292 drivers/media/tuners/msi001.c static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v) v 297 drivers/media/tuners/msi001.c dev_dbg(&spi->dev, "index=%d\n", v->index); v 299 drivers/media/tuners/msi001.c strscpy(v->name, "Mirics MSi001", sizeof(v->name)); v 300 drivers/media/tuners/msi001.c v->type = V4L2_TUNER_RF; v 301 drivers/media/tuners/msi001.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 302 drivers/media/tuners/msi001.c v->rangelow = 49000000; v 303 drivers/media/tuners/msi001.c v->rangehigh = 960000000; v 308 drivers/media/tuners/msi001.c static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v) v 313 drivers/media/tuners/msi001.c dev_dbg(&spi->dev, "index=%d\n", v->index); v 459 drivers/media/usb/airspy/airspy.c struct v4l2_device *v = usb_get_intfdata(intf); v 460 drivers/media/usb/airspy/airspy.c struct airspy *s = container_of(v, struct airspy, v4l2_dev); v 688 drivers/media/usb/airspy/airspy.c const struct v4l2_tuner *v) v 692 drivers/media/usb/airspy/airspy.c if (v->index == 0) v 694 drivers/media/usb/airspy/airspy.c else if (v->index == 1) v 702 drivers/media/usb/airspy/airspy.c static int airspy_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v) v 706 drivers/media/usb/airspy/airspy.c if (v->index == 0) { v 707 drivers/media/usb/airspy/airspy.c strscpy(v->name, "AirSpy ADC", sizeof(v->name)); v 708 drivers/media/usb/airspy/airspy.c v->type = V4L2_TUNER_ADC; v 709 drivers/media/usb/airspy/airspy.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 710 drivers/media/usb/airspy/airspy.c v->rangelow = bands[0].rangelow; v 711 drivers/media/usb/airspy/airspy.c v->rangehigh = bands[0].rangehigh; v 713 drivers/media/usb/airspy/airspy.c } else if (v->index == 1) { v 714 drivers/media/usb/airspy/airspy.c strscpy(v->name, "AirSpy RF", sizeof(v->name)); v 715 drivers/media/usb/airspy/airspy.c v->type = V4L2_TUNER_RF; v 716 drivers/media/usb/airspy/airspy.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 717 drivers/media/usb/airspy/airspy.c v->rangelow = bands_rf[0].rangelow; v 718 drivers/media/usb/airspy/airspy.c v->rangehigh = bands_rf[0].rangehigh; v 853 drivers/media/usb/airspy/airspy.c static void airspy_video_release(struct v4l2_device *v) v 855 drivers/media/usb/airspy/airspy.c struct airspy *s = container_of(v, struct airspy, v4l2_dev); v 54 drivers/media/usb/dvb-usb-v2/dvb_usb.h #define dvb_usb_dbg_usb_control_msg(udev, r, t, v, i, b, l) { \ v 61 drivers/media/usb/dvb-usb-v2/dvb_usb.h "%s %*ph\n", __func__, t, r, v & 0xff, v >> 8, \ v 71 drivers/media/usb/dvb-usb/dw2102.c int (*old_set_voltage)(struct dvb_frontend *f, enum fe_sec_voltage v); v 83 drivers/media/usb/dvb-usb/vp7045.c u8 obuf[2] = { 0 },v; v 86 drivers/media/usb/dvb-usb/vp7045.c vp7045_usb_op(d,TUNER_REG_READ,obuf,2,&v,1,30); v 88 drivers/media/usb/dvb-usb/vp7045.c return v; v 93 drivers/media/usb/dvb-usb/vp7045.c u8 v = onoff; v 94 drivers/media/usb/dvb-usb/vp7045.c return vp7045_usb_op(d,SET_TUNER_POWER,&v,1,NULL,0,150); v 123 drivers/media/usb/dvb-usb/vp7045.c u8 v, br[2]; v 125 drivers/media/usb/dvb-usb/vp7045.c v = offset + i; v 126 drivers/media/usb/dvb-usb/vp7045.c ret = vp7045_usb_op(d, GET_EE_VALUE, &v, 1, br, 2, 5); v 296 drivers/media/usb/em28xx/em28xx-video.c static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v) v 302 drivers/media/usb/em28xx/em28xx-video.c mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00); v 310 drivers/media/usb/em28xx/em28xx-video.c buf[0] = v; v 311 drivers/media/usb/em28xx/em28xx-video.c buf[1] = v >> 8; v 317 drivers/media/usb/em28xx/em28xx-video.c mode = (h || v) ? 0x30 : 0x00; v 1637 drivers/media/usb/gspca/nw80x.c static int swap_bits(int v) v 1644 drivers/media/usb/gspca/nw80x.c if (v & 1) v 1646 drivers/media/usb/gspca/nw80x.c v >>= 1; v 1654 drivers/media/usb/gspca/nw80x.c u8 v[2]; v 1663 drivers/media/usb/gspca/nw80x.c v[0] = val << 3; v 1664 drivers/media/usb/gspca/nw80x.c v[1] = val >> 5; v 1665 drivers/media/usb/gspca/nw80x.c reg_w(gspca_dev, 0x101d, v, 2); /* SIF reg0/1 (AGC) */ v 1673 drivers/media/usb/gspca/nw80x.c u8 v[2]; v 1677 drivers/media/usb/gspca/nw80x.c v[0] = ((9 - val) << 3) | 0x01; v 1678 drivers/media/usb/gspca/nw80x.c reg_w(gspca_dev, 0x1019, v, 1); v 1684 drivers/media/usb/gspca/nw80x.c v[0] = val; v 1685 drivers/media/usb/gspca/nw80x.c v[1] = val >> 8; v 1686 drivers/media/usb/gspca/nw80x.c reg_w(gspca_dev, 0x101b, v, 2); v 1981 drivers/media/usb/gspca/ov519.c static unsigned char ov7670_abs_to_sm(unsigned char v) v 1983 drivers/media/usb/gspca/ov519.c if (v > 127) v 1984 drivers/media/usb/gspca/ov519.c return v & 0x7f; v 1985 drivers/media/usb/gspca/ov519.c return (128 - v) | 0x80; v 3907 drivers/media/usb/gspca/ov519.c u8 v; v 3923 drivers/media/usb/gspca/ov519.c u8 v; v 3929 drivers/media/usb/gspca/ov519.c v = 80; v 3932 drivers/media/usb/gspca/ov519.c v = 0x81; v 3935 drivers/media/usb/gspca/ov519.c v = 0x81; v 3937 drivers/media/usb/gspca/ov519.c i2c_w(sd, 0x11, v); v 4035 drivers/media/usb/gspca/ov519.c v = i2c_r(sd, OV7670_R32_HREF); v 4036 drivers/media/usb/gspca/ov519.c v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07); v 4039 drivers/media/usb/gspca/ov519.c i2c_w(sd, OV7670_R32_HREF, v); v 4043 drivers/media/usb/gspca/ov519.c v = i2c_r(sd, OV7670_R03_VREF); v 4044 drivers/media/usb/gspca/ov519.c v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03); v 4047 drivers/media/usb/gspca/ov519.c i2c_w(sd, OV7670_R03_VREF, v); v 372 drivers/media/usb/gspca/pac7302.c int i, v; v 382 drivers/media/usb/gspca/pac7302.c v = max[i]; v 383 drivers/media/usb/gspca/pac7302.c v += (sd->brightness->val - (s32)sd->brightness->maximum) v 385 drivers/media/usb/gspca/pac7302.c v -= delta[i] * sd->contrast->val / (s32)sd->contrast->maximum; v 386 drivers/media/usb/gspca/pac7302.c if (v < 0) v 387 drivers/media/usb/gspca/pac7302.c v = 0; v 388 drivers/media/usb/gspca/pac7302.c else if (v > 0xff) v 389 drivers/media/usb/gspca/pac7302.c v = 0xff; v 390 drivers/media/usb/gspca/pac7302.c reg_w(gspca_dev, 0xa2 + i, v); v 398 drivers/media/usb/gspca/pac7302.c int i, v; v 408 drivers/media/usb/gspca/pac7302.c v = a[i] * sd->saturation->val / (s32)sd->saturation->maximum; v 409 drivers/media/usb/gspca/pac7302.c v += b[i]; v 410 drivers/media/usb/gspca/pac7302.c reg_w(gspca_dev, 0x0f + 2 * i, (v >> 8) & 0x07); v 411 drivers/media/usb/gspca/pac7302.c reg_w(gspca_dev, 0x0f + 2 * i + 1, v); v 1864 drivers/media/usb/gspca/sonixj.c int i, v, colors; v 1882 drivers/media/usb/gspca/sonixj.c v = uv[i] * colors / COLORS_DEF; v 1883 drivers/media/usb/gspca/sonixj.c reg8a[i * 2] = v; v 1884 drivers/media/usb/gspca/sonixj.c reg8a[i * 2 + 1] = (v >> 8) & 0x0f; v 1049 drivers/media/usb/gspca/topro.c int v; v 1055 drivers/media/usb/gspca/topro.c v = gspca_dev->usb_buf[0]; v 1057 drivers/media/usb/gspca/topro.c return v; v 1060 drivers/media/usb/gspca/topro.c v |= (gspca_dev->usb_buf[0] << 8); v 1064 drivers/media/usb/gspca/topro.c return v; v 3384 drivers/media/usb/gspca/vc032x.c u16 v; v 3389 drivers/media/usb/gspca/vc032x.c v = 613 + 12 * val; v 3390 drivers/media/usb/gspca/vc032x.c data = v >> 8; v 3392 drivers/media/usb/gspca/vc032x.c data = v; v 3394 drivers/media/usb/gspca/vc032x.c v = 1093 - 12 * val; v 3395 drivers/media/usb/gspca/vc032x.c data = v >> 8; v 3397 drivers/media/usb/gspca/vc032x.c data = v; v 3399 drivers/media/usb/gspca/vc032x.c v = 342 + 9 * val; v 3400 drivers/media/usb/gspca/vc032x.c data = v >> 8; v 3402 drivers/media/usb/gspca/vc032x.c data = v; v 3404 drivers/media/usb/gspca/vc032x.c v = 702 - 9 * val; v 3405 drivers/media/usb/gspca/vc032x.c data = v >> 8; v 3407 drivers/media/usb/gspca/vc032x.c data = v; v 190 drivers/media/usb/gspca/w996Xcf.c static void w9968cf_smbus_write_byte(struct sd *sd, u8 v) v 196 drivers/media/usb/gspca/w996Xcf.c sda = (v & 0x80) ? 2 : 0; v 197 drivers/media/usb/gspca/w996Xcf.c v <<= 1; v 207 drivers/media/usb/gspca/w996Xcf.c static void w9968cf_smbus_read_byte(struct sd *sd, u8 *v) v 213 drivers/media/usb/gspca/w996Xcf.c *v = 0; v 215 drivers/media/usb/gspca/w996Xcf.c *v <<= 1; v 218 drivers/media/usb/gspca/w996Xcf.c *v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0; v 707 drivers/media/usb/hackrf/hackrf.c struct v4l2_device *v = usb_get_intfdata(intf); v 708 drivers/media/usb/hackrf/hackrf.c struct hackrf_dev *dev = container_of(v, struct hackrf_dev, v4l2_dev); v 1004 drivers/media/usb/hackrf/hackrf.c const struct v4l2_tuner *v) v 1009 drivers/media/usb/hackrf/hackrf.c dev_dbg(dev->dev, "index=%d\n", v->index); v 1011 drivers/media/usb/hackrf/hackrf.c if (v->index == 0) v 1013 drivers/media/usb/hackrf/hackrf.c else if (v->index == 1) v 1021 drivers/media/usb/hackrf/hackrf.c static int hackrf_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v) v 1026 drivers/media/usb/hackrf/hackrf.c dev_dbg(dev->dev, "index=%d\n", v->index); v 1028 drivers/media/usb/hackrf/hackrf.c if (v->index == 0) { v 1029 drivers/media/usb/hackrf/hackrf.c strscpy(v->name, "HackRF ADC", sizeof(v->name)); v 1030 drivers/media/usb/hackrf/hackrf.c v->type = V4L2_TUNER_SDR; v 1031 drivers/media/usb/hackrf/hackrf.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 1032 drivers/media/usb/hackrf/hackrf.c v->rangelow = bands_adc_dac[0].rangelow; v 1033 drivers/media/usb/hackrf/hackrf.c v->rangehigh = bands_adc_dac[0].rangehigh; v 1035 drivers/media/usb/hackrf/hackrf.c } else if (v->index == 1) { v 1036 drivers/media/usb/hackrf/hackrf.c strscpy(v->name, "HackRF RF", sizeof(v->name)); v 1037 drivers/media/usb/hackrf/hackrf.c v->type = V4L2_TUNER_RF; v 1038 drivers/media/usb/hackrf/hackrf.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 1039 drivers/media/usb/hackrf/hackrf.c v->rangelow = bands_rx_tx[0].rangelow; v 1040 drivers/media/usb/hackrf/hackrf.c v->rangehigh = bands_rx_tx[0].rangehigh; v 1255 drivers/media/usb/hackrf/hackrf.c static void hackrf_video_release(struct v4l2_device *v) v 1257 drivers/media/usb/hackrf/hackrf.c struct hackrf_dev *dev = container_of(v, struct hackrf_dev, v4l2_dev); v 565 drivers/media/usb/msi2500/msi2500.c struct v4l2_device *v = usb_get_intfdata(intf); v 567 drivers/media/usb/msi2500/msi2500.c container_of(v, struct msi2500_dev, v4l2_dev); v 975 drivers/media/usb/msi2500/msi2500.c const struct v4l2_tuner *v) v 980 drivers/media/usb/msi2500/msi2500.c dev_dbg(dev->dev, "index=%d\n", v->index); v 982 drivers/media/usb/msi2500/msi2500.c if (v->index == 0) v 984 drivers/media/usb/msi2500/msi2500.c else if (v->index == 1) v 985 drivers/media/usb/msi2500/msi2500.c ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, s_tuner, v); v 992 drivers/media/usb/msi2500/msi2500.c static int msi2500_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v) v 997 drivers/media/usb/msi2500/msi2500.c dev_dbg(dev->dev, "index=%d\n", v->index); v 999 drivers/media/usb/msi2500/msi2500.c if (v->index == 0) { v 1000 drivers/media/usb/msi2500/msi2500.c strscpy(v->name, "Mirics MSi2500", sizeof(v->name)); v 1001 drivers/media/usb/msi2500/msi2500.c v->type = V4L2_TUNER_ADC; v 1002 drivers/media/usb/msi2500/msi2500.c v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; v 1003 drivers/media/usb/msi2500/msi2500.c v->rangelow = 1200000; v 1004 drivers/media/usb/msi2500/msi2500.c v->rangehigh = 15000000; v 1006 drivers/media/usb/msi2500/msi2500.c } else if (v->index == 1) { v 1007 drivers/media/usb/msi2500/msi2500.c ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, g_tuner, v); v 1133 drivers/media/usb/msi2500/msi2500.c static void msi2500_video_release(struct v4l2_device *v) v 1135 drivers/media/usb/msi2500/msi2500.c struct msi2500_dev *dev = container_of(v, struct msi2500_dev, v4l2_dev); v 314 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v); v 355 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_channelfreq_set(struct pvr2_ctrl *cptr,int m,int v) v 360 drivers/media/usb/pvrusb2/pvrusb2-hdw.c hdw->freqTable[slotId-1] = v; v 383 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_channelprog_set(struct pvr2_ctrl *cptr,int m,int v) v 386 drivers/media/usb/pvrusb2/pvrusb2-hdw.c if ((v >= 0) && (v <= FREQTABLE_SIZE)) { v 387 drivers/media/usb/pvrusb2/pvrusb2-hdw.c hdw->freqProgSlot = v; v 433 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_freq_set(struct pvr2_ctrl *cptr,int m,int v) v 435 drivers/media/usb/pvrusb2/pvrusb2-hdw.c pvr2_hdw_set_cur_freq(cptr->hdw,v); v 659 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_check_input(struct pvr2_ctrl *cptr,int v) v 661 drivers/media/usb/pvrusb2/pvrusb2-hdw.c if (v < 0 || v > PVR2_CVAL_INPUT_MAX) v 663 drivers/media/usb/pvrusb2/pvrusb2-hdw.c return ((1UL << v) & cptr->hdw->input_allowed_mask) != 0; v 666 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_set_input(struct pvr2_ctrl *cptr,int m,int v) v 668 drivers/media/usb/pvrusb2/pvrusb2-hdw.c return pvr2_hdw_set_input(cptr->hdw,v); v 754 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_cx2341x_set(struct pvr2_ctrl *cptr,int m,int v) v 765 drivers/media/usb/pvrusb2/pvrusb2-hdw.c c1.value = v; v 843 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_stdavail_set(struct pvr2_ctrl *cptr,int m,int v) v 848 drivers/media/usb/pvrusb2/pvrusb2-hdw.c ns = (ns & ~m) | (v & m); v 882 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_stdcur_set(struct pvr2_ctrl *cptr,int m,int v) v 887 drivers/media/usb/pvrusb2/pvrusb2-hdw.c ns = (ns & ~m) | (v & m); v 964 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int ctrl_set_##vname(struct pvr2_ctrl *cptr,int m,int v) \ v 965 drivers/media/usb/pvrusb2/pvrusb2-hdw.c {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \ v 3522 drivers/media/usb/pvrusb2/pvrusb2-hdw.c enum pvr2_v4l_type index,int v) v 3525 drivers/media/usb/pvrusb2/pvrusb2-hdw.c case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v;break; v 3526 drivers/media/usb/pvrusb2/pvrusb2-hdw.c case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v;break; v 3527 drivers/media/usb/pvrusb2/pvrusb2-hdw.c case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v;break; v 5063 drivers/media/usb/pvrusb2/pvrusb2-hdw.c static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v) v 5065 drivers/media/usb/pvrusb2/pvrusb2-hdw.c if (hdw->input_val != v) { v 5066 drivers/media/usb/pvrusb2/pvrusb2-hdw.c hdw->input_val = v; v 592 drivers/media/usb/pwc/pwc-if.c static void pwc_video_release(struct v4l2_device *v) v 594 drivers/media/usb/pwc/pwc-if.c struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev); v 1171 drivers/media/usb/pwc/pwc-if.c struct v4l2_device *v = usb_get_intfdata(intf); v 1172 drivers/media/usb/pwc/pwc-if.c struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev); v 465 drivers/media/usb/stkwebcam/stk-sensor.c unsigned char v; v 473 drivers/media/usb/stkwebcam/stk-sensor.c ret += stk_sensor_inb(dev, REG_HREF, &v); v 474 drivers/media/usb/stkwebcam/stk-sensor.c v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7); v 476 drivers/media/usb/stkwebcam/stk-sensor.c ret += stk_sensor_outb(dev, REG_HREF, v); v 482 drivers/media/usb/stkwebcam/stk-sensor.c ret += stk_sensor_inb(dev, REG_VREF, &v); v 483 drivers/media/usb/stkwebcam/stk-sensor.c v = (v & 0xc0) | ((vstop & 0x7) << 3) | (vstart & 0x7); v 485 drivers/media/usb/stkwebcam/stk-sensor.c ret += stk_sensor_outb(dev, REG_VREF, v); v 681 drivers/media/usb/usbvision/usbvision-core.c unsigned char *f, *u = NULL, *v = NULL; v 704 drivers/media/usb/usbvision/usbvision-core.c v = u + (image_size >> 1); v 706 drivers/media/usb/usbvision/usbvision-core.c v = frame->data + image_size + ((frame->curline * (frame->width)) >> 2); v 707 drivers/media/usb/usbvision/usbvision-core.c u = v + (image_size >> 2); v 786 drivers/media/usb/usbvision/usbvision-core.c *v++ = V[idx >> 1]; v 793 drivers/media/usb/usbvision/usbvision-core.c *v++ = V[idx >> 1]; v 864 drivers/media/usb/usbvision/usbvision-core.c unsigned char y[2], u, v; /* YUV components */ v 907 drivers/media/usb/usbvision/usbvision-core.c scratch_get_extra(usbvision, &v, &v_ptr, 1); v 910 drivers/media/usb/usbvision/usbvision-core.c v_ = v - 128; v 918 drivers/media/usb/usbvision/usbvision-core.c *f_even++ = v; v 1006 drivers/media/usb/usbvision/usbvision-core.c *f_odd++ = v; v 156 drivers/media/usb/usbvision/usbvision.h #define RESTRICT_TO_RANGE(v, mi, ma) \ v 157 drivers/media/usb/usbvision/usbvision.h { if (((int)v) < (mi)) (v) = (mi); else if ((v) > (ma)) (v) = (ma); } v 1356 drivers/media/usb/uvc/uvc_v4l2.c struct uvc_xu_control_query32 v; v 1358 drivers/media/usb/uvc/uvc_v4l2.c if (copy_from_user(&v, up, sizeof(v))) v 1362 drivers/media/usb/uvc/uvc_v4l2.c .unit = v.unit, v 1363 drivers/media/usb/uvc/uvc_v4l2.c .selector = v.selector, v 1364 drivers/media/usb/uvc/uvc_v4l2.c .query = v.query, v 1365 drivers/media/usb/uvc/uvc_v4l2.c .size = v.size, v 1366 drivers/media/usb/uvc/uvc_v4l2.c .data = v.size ? compat_ptr(v.data) : NULL v 142 drivers/media/v4l2-core/v4l2-fwnode.c u32 v; v 205 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "clock-lanes", &v)) { v 206 drivers/media/v4l2-core/v4l2-fwnode.c clock_lane = v; v 207 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("clock lane position %u\n", v); v 214 drivers/media/v4l2-core/v4l2-fwnode.c v); v 279 drivers/media/v4l2-core/v4l2-fwnode.c u32 v; v 284 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "hsync-active", &v)) { v 287 drivers/media/v4l2-core/v4l2-fwnode.c flags |= v ? V4L2_MBUS_HSYNC_ACTIVE_HIGH : v 289 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("hsync-active %s\n", v ? "high" : "low"); v 292 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "vsync-active", &v)) { v 295 drivers/media/v4l2-core/v4l2-fwnode.c flags |= v ? V4L2_MBUS_VSYNC_ACTIVE_HIGH : v 297 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("vsync-active %s\n", v ? "high" : "low"); v 300 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "field-even-active", &v)) { v 303 drivers/media/v4l2-core/v4l2-fwnode.c flags |= v ? V4L2_MBUS_FIELD_EVEN_HIGH : v 305 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("field-even-active %s\n", v ? "high" : "low"); v 308 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "pclk-sample", &v)) { v 311 drivers/media/v4l2-core/v4l2-fwnode.c flags |= v ? V4L2_MBUS_PCLK_SAMPLE_RISING : v 313 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("pclk-sample %s\n", v ? "high" : "low"); v 316 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "data-active", &v)) { v 319 drivers/media/v4l2-core/v4l2-fwnode.c flags |= v ? V4L2_MBUS_DATA_ACTIVE_HIGH : v 321 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("data-active %s\n", v ? "high" : "low"); v 333 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "bus-width", &v)) { v 334 drivers/media/v4l2-core/v4l2-fwnode.c bus->bus_width = v; v 335 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("bus-width %u\n", v); v 338 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "data-shift", &v)) { v 339 drivers/media/v4l2-core/v4l2-fwnode.c bus->data_shift = v; v 340 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("data-shift %u\n", v); v 343 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "sync-on-green-active", &v)) { v 346 drivers/media/v4l2-core/v4l2-fwnode.c flags |= v ? V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH : v 348 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("sync-on-green-active %s\n", v ? "high" : "low"); v 351 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "data-enable-active", &v)) { v 354 drivers/media/v4l2-core/v4l2-fwnode.c flags |= v ? V4L2_MBUS_DATA_ENABLE_HIGH : v 356 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("data-enable-active %s\n", v ? "high" : "low"); v 384 drivers/media/v4l2-core/v4l2-fwnode.c u32 v; v 386 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "clock-inv", &v)) { v 387 drivers/media/v4l2-core/v4l2-fwnode.c bus->clock_inv = v; v 388 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("clock-inv %u\n", v); v 391 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "strobe", &v)) { v 392 drivers/media/v4l2-core/v4l2-fwnode.c bus->strobe = v; v 393 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("strobe %u\n", v); v 396 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "data-lanes", &v)) { v 397 drivers/media/v4l2-core/v4l2-fwnode.c bus->data_lane = v; v 398 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("data-lanes %u\n", v); v 401 drivers/media/v4l2-core/v4l2-fwnode.c if (!fwnode_property_read_u32(fwnode, "clock-lanes", &v)) { v 402 drivers/media/v4l2-core/v4l2-fwnode.c bus->clock_lane = v; v 403 drivers/media/v4l2-core/v4l2-fwnode.c pr_debug("clock-lanes %u\n", v); v 200 drivers/message/fusion/mptbase.c static int mpt_summary_proc_show(struct seq_file *m, void *v); v 201 drivers/message/fusion/mptbase.c static int mpt_version_proc_show(struct seq_file *m, void *v); v 202 drivers/message/fusion/mptbase.c static int mpt_iocinfo_proc_show(struct seq_file *m, void *v); v 6640 drivers/message/fusion/mptbase.c static int mpt_summary_proc_show(struct seq_file *m, void *v) v 6655 drivers/message/fusion/mptbase.c static int mpt_version_proc_show(struct seq_file *m, void *v) v 6697 drivers/message/fusion/mptbase.c static int mpt_iocinfo_proc_show(struct seq_file *m, void *v) v 99 drivers/mfd/ab3100-otp.c static int ab3100_show_otp(struct seq_file *s, void *v) v 265 drivers/mfd/da903x.c uint8_t v[3]; v 269 drivers/mfd/da903x.c v[0] = (chip->events_mask & 0xff); v 270 drivers/mfd/da903x.c v[1] = (chip->events_mask >> 8) & 0xff; v 271 drivers/mfd/da903x.c v[2] = (chip->events_mask >> 16) & 0xff; v 273 drivers/mfd/da903x.c return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v); v 278 drivers/mfd/da903x.c uint8_t v[3]; v 282 drivers/mfd/da903x.c v[0] = (chip->events_mask & 0xff); v 283 drivers/mfd/da903x.c v[1] = (chip->events_mask >> 8) & 0xff; v 284 drivers/mfd/da903x.c v[2] = (chip->events_mask >> 16) & 0xff; v 286 drivers/mfd/da903x.c return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v); v 291 drivers/mfd/da903x.c uint8_t v[3] = {0, 0, 0}; v 294 drivers/mfd/da903x.c ret = __da903x_reads(chip->client, DA9030_EVENT_A, 3, v); v 298 drivers/mfd/da903x.c *events = (v[2] << 16) | (v[1] << 8) | v[0]; v 342 drivers/mfd/da903x.c uint8_t v[4]; v 346 drivers/mfd/da903x.c v[0] = (chip->events_mask & 0xff); v 347 drivers/mfd/da903x.c v[1] = (chip->events_mask >> 8) & 0xff; v 348 drivers/mfd/da903x.c v[2] = (chip->events_mask >> 16) & 0xff; v 349 drivers/mfd/da903x.c v[3] = (chip->events_mask >> 24) & 0xff; v 351 drivers/mfd/da903x.c return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v); v 356 drivers/mfd/da903x.c uint8_t v[4]; v 360 drivers/mfd/da903x.c v[0] = (chip->events_mask & 0xff); v 361 drivers/mfd/da903x.c v[1] = (chip->events_mask >> 8) & 0xff; v 362 drivers/mfd/da903x.c v[2] = (chip->events_mask >> 16) & 0xff; v 363 drivers/mfd/da903x.c v[3] = (chip->events_mask >> 24) & 0xff; v 365 drivers/mfd/da903x.c return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v); v 370 drivers/mfd/da903x.c uint8_t v[4] = {0, 0, 0, 0}; v 373 drivers/mfd/da903x.c ret = __da903x_reads(chip->client, DA9034_EVENT_A, 4, v); v 377 drivers/mfd/da903x.c *events = (v[3] << 24) | (v[2] << 16) | (v[1] << 8) | v[0]; v 383 drivers/mfd/da903x.c uint8_t v[2] = {0, 0}; v 386 drivers/mfd/da903x.c ret = __da903x_reads(chip->client, DA9034_STATUS_A, 2, v); v 390 drivers/mfd/da903x.c *status = (v[1] << 8) | v[0]; v 31 drivers/misc/c2port/c2port-duramar2150.c u8 v; v 35 drivers/misc/c2port/c2port-duramar2150.c v = inb(DIR_PORT); v 39 drivers/misc/c2port/c2port-duramar2150.c outb(v | (C2D | C2CK), DIR_PORT); v 43 drivers/misc/c2port/c2port-duramar2150.c outb(v & ~(C2D | C2CK), DIR_PORT); v 50 drivers/misc/c2port/c2port-duramar2150.c u8 v; v 54 drivers/misc/c2port/c2port-duramar2150.c v = inb(DIR_PORT); v 57 drivers/misc/c2port/c2port-duramar2150.c outb(v & ~C2D, DIR_PORT); v 59 drivers/misc/c2port/c2port-duramar2150.c outb(v | C2D, DIR_PORT); v 71 drivers/misc/c2port/c2port-duramar2150.c u8 v; v 75 drivers/misc/c2port/c2port-duramar2150.c v = inb(DATA_PORT); v 78 drivers/misc/c2port/c2port-duramar2150.c outb(v | C2D, DATA_PORT); v 80 drivers/misc/c2port/c2port-duramar2150.c outb(v & ~C2D, DATA_PORT); v 87 drivers/misc/c2port/c2port-duramar2150.c u8 v; v 91 drivers/misc/c2port/c2port-duramar2150.c v = inb(DATA_PORT); v 94 drivers/misc/c2port/c2port-duramar2150.c outb(v | C2CK, DATA_PORT); v 96 drivers/misc/c2port/c2port-duramar2150.c outb(v & ~C2CK, DATA_PORT); v 284 drivers/misc/cxl/trace.h TP_PROTO(struct cxl_context *ctx, unsigned int idx, u64 e, u64 v), v 286 drivers/misc/cxl/trace.h TP_ARGS(ctx, idx, e, v), v 294 drivers/misc/cxl/trace.h __field(u64, v) v 303 drivers/misc/cxl/trace.h __entry->v = v; v 312 drivers/misc/cxl/trace.h __entry->v v 1035 drivers/misc/habanalabs/habanalabs.h #define WREG32(reg, v) hdev->asic_funcs->wreg(hdev, (reg), (v)) v 31 drivers/misc/ibmasm/heartbeat.c static int panic_happened(struct notifier_block *n, unsigned long val, void *v) v 356 drivers/misc/isl29003.c int v = i2c_smbus_read_byte_data(client, i); v 358 drivers/misc/isl29003.c if (v < 0) v 361 drivers/misc/isl29003.c data->reg_cache[i] = v; v 139 drivers/misc/lis3lv02d/lis3lv02d.c int v; v 143 drivers/misc/lis3lv02d/lis3lv02d.c v = (int) ((hi << 8) | lo); v 145 drivers/misc/lis3lv02d/lis3lv02d.c return (s16) v >> lis3->shift_adj; v 52 drivers/misc/lis3lv02d/lis3lv02d_i2c.c static inline s32 lis3_i2c_read(struct lis3lv02d *lis3, int reg, u8 *v) v 55 drivers/misc/lis3lv02d/lis3lv02d_i2c.c *v = i2c_smbus_read_byte_data(c, reg); v 60 drivers/misc/lis3lv02d/lis3lv02d_i2c.c u8 *v) v 64 drivers/misc/lis3lv02d/lis3lv02d_i2c.c return i2c_smbus_read_i2c_block_data(c, reg, len, v); v 25 drivers/misc/lis3lv02d/lis3lv02d_spi.c static int lis3_spi_read(struct lis3lv02d *lis3, int reg, u8 *v) v 32 drivers/misc/lis3lv02d/lis3lv02d_spi.c *v = (u8) ret; v 534 drivers/misc/mei/hdcp/mei_hdcp.c memcpy(rep_send_ack->v, verify_repeater_out.v, v 345 drivers/misc/mei/hdcp/mei_hdcp.h u8 v[HDCP_2_2_V_PRIME_HALF_LEN]; v 37 drivers/misc/sgi-gru/gru_instructions.h #define gru_ordered_store_ulong(p, v) \ v 40 drivers/misc/sgi-gru/gru_instructions.h *((volatile unsigned long *)(p)) = v; /* force st.rel */ \ v 45 drivers/misc/sgi-gru/gru_instructions.h #define gru_ordered_store_ulong(p, v) \ v 48 drivers/misc/sgi-gru/gru_instructions.h *(unsigned long *)p = v; \ v 22 drivers/misc/sgi-gru/gruprocfs.c static void printstat_val(struct seq_file *s, atomic_long_t *v, char *id) v 24 drivers/misc/sgi-gru/gruprocfs.c unsigned long val = atomic_long_read(v); v 384 drivers/misc/sgi-gru/grutables.h #define TSID(a, v) (((a) - (v)->vm_start) / GRU_GSEG_PAGESIZE) v 3017 drivers/misc/vmw_vmci/vmci_queue_pair.c struct kvec v = {.iov_base = (void *)buf, .iov_len = buf_size}; v 3022 drivers/misc/vmw_vmci/vmci_queue_pair.c iov_iter_kvec(&from, WRITE, &v, 1, buf_size); v 3061 drivers/misc/vmw_vmci/vmci_queue_pair.c struct kvec v = {.iov_base = buf, .iov_len = buf_size}; v 3066 drivers/misc/vmw_vmci/vmci_queue_pair.c iov_iter_kvec(&to, READ, &v, 1, buf_size); v 3105 drivers/misc/vmw_vmci/vmci_queue_pair.c struct kvec v = {.iov_base = buf, .iov_len = buf_size}; v 3111 drivers/misc/vmw_vmci/vmci_queue_pair.c iov_iter_kvec(&to, READ, &v, 1, buf_size); v 962 drivers/mmc/core/sdio_uart.c static int sdio_uart_proc_show(struct seq_file *m, void *v) v 406 drivers/mmc/host/atmel-mci.c static int atmci_req_show(struct seq_file *s, void *v) v 494 drivers/mmc/host/atmel-mci.c static int atmci_regs_show(struct seq_file *s, void *v) v 325 drivers/mmc/host/dw_mmc-k3.c unsigned int v; v 345 drivers/mmc/host/dw_mmc-k3.c v = ror32(sample_flag, i); v 346 drivers/mmc/host/dw_mmc-k3.c len = ffs(~v) - 1; v 353 drivers/mmc/host/dw_mmc-k3.c interval = ffs(v >> len) - 1; v 142 drivers/mmc/host/dw_mmc-rockchip.c bool v, prev_v = 0, first_v; v 168 drivers/mmc/host/dw_mmc-rockchip.c v = !mmc_send_tuning(mmc, opcode, NULL); v 171 drivers/mmc/host/dw_mmc-rockchip.c first_v = v; v 173 drivers/mmc/host/dw_mmc-rockchip.c if ((!prev_v) && v) { v 177 drivers/mmc/host/dw_mmc-rockchip.c if (v) { v 196 drivers/mmc/host/dw_mmc-rockchip.c prev_v = v; v 206 drivers/mmc/host/dw_mmc-rockchip.c if ((range_count > 1) && first_v && v) { v 107 drivers/mmc/host/dw_mmc.c static int dw_mci_req_show(struct seq_file *s, void *v) v 148 drivers/mmc/host/dw_mmc.c static int dw_mci_regs_show(struct seq_file *s, void *v) v 336 drivers/mmc/host/dw_mmc.h #define _SBF(f, v) ((v) << (f)) v 435 drivers/mmc/host/dw_mmc.h #define SDMMC_SET_THLD(v, x) (((v) & 0xFFF) << 16 | (x)) v 121 drivers/mmc/host/pxamci.c unsigned int v; v 126 drivers/mmc/host/pxamci.c v = readl(host->base + MMC_STAT); v 127 drivers/mmc/host/pxamci.c if (!(v & STAT_CLK_EN)) v 132 drivers/mmc/host/pxamci.c if (v & STAT_CLK_EN) v 279 drivers/mmc/host/pxamci.c u32 v; v 290 drivers/mmc/host/pxamci.c v = readl(host->base + MMC_RES) & 0xffff; v 294 drivers/mmc/host/pxamci.c cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8; v 295 drivers/mmc/host/pxamci.c v = w2; v 1385 drivers/mmc/host/s3cmci.c static int s3cmci_state_show(struct seq_file *seq, void *v) v 1433 drivers/mmc/host/s3cmci.c static int s3cmci_regs_show(struct seq_file *seq, void *v) v 772 drivers/mmc/host/sdhci-acpi.c bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL); v 774 drivers/mmc/host/sdhci-acpi.c err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL); v 426 drivers/mmc/host/sdhci-esdhc-imx.c u32 v; v 427 drivers/mmc/host/sdhci-esdhc-imx.c v = readl(host->ioaddr + ESDHC_VENDOR_SPEC); v 428 drivers/mmc/host/sdhci-esdhc-imx.c v &= ~ESDHC_VENDOR_SPEC_SDIO_QUIRK; v 429 drivers/mmc/host/sdhci-esdhc-imx.c writel(v, host->ioaddr + ESDHC_VENDOR_SPEC); v 537 drivers/mmc/host/sdhci-esdhc-imx.c u32 v = readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS); v 540 drivers/mmc/host/sdhci-esdhc-imx.c v |= ESDHC_MIX_CTRL_SMPCLK_SEL; v 542 drivers/mmc/host/sdhci-esdhc-imx.c v &= ~ESDHC_MIX_CTRL_SMPCLK_SEL; v 548 drivers/mmc/host/sdhci-esdhc-imx.c v |= ESDHC_MIX_CTRL_EXE_TUNE; v 552 drivers/mmc/host/sdhci-esdhc-imx.c v &= ~ESDHC_MIX_CTRL_EXE_TUNE; v 555 drivers/mmc/host/sdhci-esdhc-imx.c writel(v, host->ioaddr + SDHCI_AUTO_CMD_STATUS); v 564 drivers/mmc/host/sdhci-esdhc-imx.c u32 v; v 565 drivers/mmc/host/sdhci-esdhc-imx.c v = readl(host->ioaddr + ESDHC_VENDOR_SPEC); v 566 drivers/mmc/host/sdhci-esdhc-imx.c v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK; v 567 drivers/mmc/host/sdhci-esdhc-imx.c writel(v, host->ioaddr + ESDHC_VENDOR_SPEC); v 988 drivers/mmc/host/sdhci-esdhc-imx.c u32 v; v 1005 drivers/mmc/host/sdhci-esdhc-imx.c v = ESDHC_STROBE_DLL_CTRL_ENABLE | v 1008 drivers/mmc/host/sdhci-esdhc-imx.c writel(v, host->ioaddr + ESDHC_STROBE_DLL_CTRL); v 1011 drivers/mmc/host/sdhci-esdhc-imx.c v = readl(host->ioaddr + ESDHC_STROBE_DLL_STATUS); v 1012 drivers/mmc/host/sdhci-esdhc-imx.c if (!(v & ESDHC_STROBE_DLL_STS_REF_LOCK)) v 1015 drivers/mmc/host/sdhci-esdhc-imx.c if (!(v & ESDHC_STROBE_DLL_STS_SLV_LOCK)) v 1069 drivers/mmc/host/sdhci-esdhc-imx.c u32 v; v 1070 drivers/mmc/host/sdhci-esdhc-imx.c v = boarddata->delay_line << v 1074 drivers/mmc/host/sdhci-esdhc-imx.c v <<= 1; v 1075 drivers/mmc/host/sdhci-esdhc-imx.c writel(v, host->ioaddr + ESDHC_DLL_CTRL); v 3596 drivers/mmc/host/sdhci.c u16 v; v 3621 drivers/mmc/host/sdhci.c v = ver ? *ver : sdhci_readw(host, SDHCI_HOST_VERSION); v 3622 drivers/mmc/host/sdhci.c host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; v 2655 drivers/mtd/chips/cfi_cmdset_0001.c void *v) v 3089 drivers/mtd/chips/cfi_cmdset_0002.c void *v) v 118 drivers/mtd/devices/pmc551.c #define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12)) v 119 drivers/mtd/devices/pmc551.c #define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8)) v 143 drivers/mtd/maps/nettel.c static int nettel_reboot_notifier(struct notifier_block *nb, unsigned long val, void *v) v 1919 drivers/mtd/mtdcore.c static int mtd_proc_show(struct seq_file *m, void *v) v 30 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_NBLOCKS(v) \ v 31 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (((v) << BP_BCH_FLASH0LAYOUT0_NBLOCKS) & BM_BCH_FLASH0LAYOUT0_NBLOCKS) v 35 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_META_SIZE(v) \ v 36 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (((v) << BP_BCH_FLASH0LAYOUT0_META_SIZE)\ v 43 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_ECC0(v, x) \ v 45 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0) \ v 47 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h : (((v) << BP_BCH_FLASH0LAYOUT0_ECC0) \ v 54 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_GF(v, x) \ v 55 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ((GPMI_IS_MX6(x) && ((v) == 14)) \ v 66 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x) \ v 68 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \ v 69 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h : ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \ v 77 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(v) \ v 78 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h (((v) << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE) \ v 85 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT1_ECCN(v, x) \ v 87 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN) \ v 89 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h : (((v) << BP_BCH_FLASH0LAYOUT1_ECCN) \ v 96 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT1_GF(v, x) \ v 97 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ((GPMI_IS_MX6(x) && ((v) == 14)) \ v 108 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h #define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x) \ v 110 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \ v 111 drivers/mtd/nand/raw/gpmi-nand/bch-regs.h : ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \ v 119 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c static int __gpmi_enable_clk(struct gpmi_nand_data *this, bool v) v 130 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c if (v) { v 18 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL0_COMMAND_MODE(v) \ v 19 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_CTRL0_COMMAND_MODE) & BM_GPMI_CTRL0_COMMAND_MODE) v 37 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL0_LOCK_CS(v, x) 0x0 v 43 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL0_CS(v, x) (((v) << BP_GPMI_CTRL0_CS) & \ v 50 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL0_ADDRESS(v) \ v 51 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_CTRL0_ADDRESS) & BM_GPMI_CTRL0_ADDRESS) v 62 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL0_XFER_COUNT(v) \ v 63 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_CTRL0_XFER_COUNT) & BM_GPMI_CTRL0_XFER_COUNT) v 74 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_ECCCTRL_ECC_CMD(v) \ v 75 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_ECCCTRL_ECC_CMD) & BM_GPMI_ECCCTRL_ECC_CMD) v 85 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_ECCCTRL_BUFFER_MASK(v) \ v 86 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_ECCCTRL_BUFFER_MASK) & BM_GPMI_ECCCTRL_BUFFER_MASK) v 103 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL1_WRN_DLY_SEL(v) \ v 104 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_CTRL1_WRN_DLY_SEL) & BM_GPMI_CTRL1_WRN_DLY_SEL) v 120 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_CTRL1_RDN_DELAY(v) \ v 121 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_CTRL1_RDN_DELAY) & BM_GPMI_CTRL1_RDN_DELAY) v 146 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_TIMING0_ADDRESS_SETUP(v) \ v 147 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_TIMING0_ADDRESS_SETUP) & BM_GPMI_TIMING0_ADDRESS_SETUP) v 151 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_TIMING0_DATA_HOLD(v) \ v 152 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_TIMING0_DATA_HOLD) & BM_GPMI_TIMING0_DATA_HOLD) v 156 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_TIMING0_DATA_SETUP(v) \ v 157 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_TIMING0_DATA_SETUP) & BM_GPMI_TIMING0_DATA_SETUP) v 162 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define BF_GPMI_TIMING1_BUSY_TIMEOUT(v) \ v 163 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << BP_GPMI_TIMING1_BUSY_TIMEOUT) & BM_GPMI_TIMING1_BUSY_TIMEOUT) v 172 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h #define MX28_BF_GPMI_STAT_READY_BUSY(v) \ v 173 drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h (((v) << MX28_BP_GPMI_STAT_READY_BUSY) & MX28_BM_GPMI_STAT_READY_BUSY) v 295 drivers/mtd/nand/raw/mpc5121_nfc.c u8 v; v 297 drivers/mtd/nand/raw/mpc5121_nfc.c v = in_8(prv->csreg); v 298 drivers/mtd/nand/raw/mpc5121_nfc.c v |= 0x0F; v 302 drivers/mtd/nand/raw/mpc5121_nfc.c v &= ~(1 << chip); v 306 drivers/mtd/nand/raw/mpc5121_nfc.c out_8(prv->csreg, v); v 158 drivers/mtd/nand/raw/mxic_nand.c #define IDLY_CODE_VAL(x, v) ((v) << (((x) % 4) * 8)) v 55 drivers/mtd/nand/raw/tango_nand.c #define ERR_COUNT_PKT_0(v) (((v) >> 0) & 0x3f) v 56 drivers/mtd/nand/raw/tango_nand.c #define ERR_COUNT_PKT_N(v) (((v) >> 8) & 0x3f) v 57 drivers/mtd/nand/raw/tango_nand.c #define DECODE_FAIL_PKT_0(v) (((v) & BIT(7)) == 0) v 58 drivers/mtd/nand/raw/tango_nand.c #define DECODE_FAIL_PKT_N(v) (((v) & BIT(15)) == 0) v 75 drivers/mtd/tests/nandbiterrs.c unsigned v = offset; v 77 drivers/mtd/tests/nandbiterrs.c v ^= 0x7f7edfd3; v 78 drivers/mtd/tests/nandbiterrs.c v = v ^ (v >> 3); v 79 drivers/mtd/tests/nandbiterrs.c v = v ^ (v >> 5); v 80 drivers/mtd/tests/nandbiterrs.c v = v ^ (v >> 13); v 81 drivers/mtd/tests/nandbiterrs.c c = v & 0xFF; v 175 drivers/mtd/tests/nandbiterrs.c #define CBIT(v, n) ((v) & (1 << (n))) v 176 drivers/mtd/tests/nandbiterrs.c #define BCLR(v, n) ((v) = (v) & ~(1 << (n))) v 404 drivers/mtd/ubi/debug.c static void *eraseblk_count_seq_next(struct seq_file *s, void *v, loff_t *pos) v 416 drivers/mtd/ubi/debug.c static void eraseblk_count_seq_stop(struct seq_file *s, void *v) v 18 drivers/net/bonding/bond_debugfs.c static int bond_debug_rlb_hash_show(struct seq_file *m, void *v) v 30 drivers/net/bonding/bond_procfs.c static void *bond_info_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 38 drivers/net/bonding/bond_procfs.c if (v == SEQ_START_TOKEN) v 44 drivers/net/bonding/bond_procfs.c if (slave == v) v 51 drivers/net/bonding/bond_procfs.c static void bond_info_seq_stop(struct seq_file *seq, void *v) v 244 drivers/net/bonding/bond_procfs.c static int bond_info_seq_show(struct seq_file *seq, void *v) v 246 drivers/net/bonding/bond_procfs.c if (v == SEQ_START_TOKEN) { v 250 drivers/net/bonding/bond_procfs.c bond_info_show_slave(seq, v); v 185 drivers/net/can/sja1000/peak_pcmcia.c static void pcan_write_canreg(const struct sja1000_priv *priv, int port, u8 v) v 192 drivers/net/can/sja1000/peak_pcmcia.c switch (v) { v 206 drivers/net/can/sja1000/peak_pcmcia.c iowrite8(v, priv->reg_base + port); v 220 drivers/net/can/sja1000/peak_pcmcia.c static void pcan_write_reg(struct pcan_pccard *card, int port, u8 v) v 224 drivers/net/can/sja1000/peak_pcmcia.c if (card->ccr == v) v 226 drivers/net/can/sja1000/peak_pcmcia.c card->ccr = v; v 229 drivers/net/can/sja1000/peak_pcmcia.c iowrite8(v, card->ioport_addr + PCC_COMN_OFF + port); v 263 drivers/net/can/sja1000/peak_pcmcia.c static int pcan_write_eeprom(struct pcan_pccard *card, u16 addr, u8 v) v 296 drivers/net/can/sja1000/peak_pcmcia.c pcan_write_reg(card, PCC_SPI_DOR, v); v 20 drivers/net/can/softing/softing_cs.c static int softingcs_reset(struct platform_device *pdev, int v); v 21 drivers/net/can/softing/softing_cs.c static int softingcs_enable_irq(struct platform_device *pdev, int v); v 165 drivers/net/can/softing/softing_cs.c static int softingcs_reset(struct platform_device *pdev, int v) v 169 drivers/net/can/softing/softing_cs.c dev_dbg(&pdev->dev, "pcmcia config [2] %02x\n", v ? 0 : 0x20); v 170 drivers/net/can/softing/softing_cs.c return pcmcia_write_config_byte(pcmcia, 2, v ? 0 : 0x20); v 173 drivers/net/can/softing/softing_cs.c static int softingcs_enable_irq(struct platform_device *pdev, int v) v 177 drivers/net/can/softing/softing_cs.c dev_dbg(&pdev->dev, "pcmcia config [0] %02x\n", v ? 0x60 : 0); v 178 drivers/net/can/softing/softing_cs.c return pcmcia_write_config_byte(pcmcia, 0, v ? 0x60 : 0); v 44 drivers/net/dsa/b53/b53_mdio.c u16 v; v 50 drivers/net/dsa/b53/b53_mdio.c v = (page << 8) | REG_MII_PAGE_ENABLE; v 52 drivers/net/dsa/b53/b53_mdio.c REG_MII_PAGE, v); v 59 drivers/net/dsa/b53/b53_mdio.c v = (reg << 8) | op; v 60 drivers/net/dsa/b53/b53_mdio.c ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR, REG_MII_ADDR, v); v 66 drivers/net/dsa/b53/b53_mdio.c v = mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR, v 68 drivers/net/dsa/b53/b53_mdio.c if (!(v & (REG_MII_ADDR_WRITE | REG_MII_ADDR_READ))) v 1188 drivers/net/ethernet/3com/3c509.c static void el3_set_msglevel(struct net_device *dev, u32 v) v 1190 drivers/net/ethernet/3com/3c509.c el3_debug = v; v 106 drivers/net/ethernet/3com/3c574_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 153 drivers/net/ethernet/3com/3c589_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 511 drivers/net/ethernet/3com/3c59x.c #define RAM_SIZE(v) BFEXT(v, 0, 3) v 512 drivers/net/ethernet/3com/3c59x.c #define RAM_WIDTH(v) BFEXT(v, 3, 1) v 513 drivers/net/ethernet/3com/3c59x.c #define RAM_SPEED(v) BFEXT(v, 4, 2) v 514 drivers/net/ethernet/3com/3c59x.c #define ROM_SIZE(v) BFEXT(v, 6, 2) v 515 drivers/net/ethernet/3com/3c59x.c #define RAM_SPLIT(v) BFEXT(v, 16, 2) v 516 drivers/net/ethernet/3com/3c59x.c #define XCVR(v) BFEXT(v, 20, 4) v 517 drivers/net/ethernet/3com/3c59x.c #define AUTOSELECT(v) BFEXT(v, 24, 1) v 587 drivers/net/ethernet/8390/ax88796.c static void ax_set_msglevel(struct net_device *dev, u32 v) v 591 drivers/net/ethernet/8390/ax88796.c ei_local->msg_enable = v; v 617 drivers/net/ethernet/8390/etherh.c static void etherh_set_msglevel(struct net_device *dev, u32 v) v 621 drivers/net/ethernet/8390/etherh.c ei_local->msg_enable = v; v 655 drivers/net/ethernet/8390/ne2k-pci.c static void ne2k_pci_set_msglevel(struct net_device *dev, u32 v) v 659 drivers/net/ethernet/8390/ne2k-pci.c ei_local->msg_enable = v; v 78 drivers/net/ethernet/8390/pcnet_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 82 drivers/net/ethernet/aeroflex/greth.c #define GRETH_REGSAVE(a, v) (__raw_writel(cpu_to_be32(v), &(a))) v 83 drivers/net/ethernet/aeroflex/greth.c #define GRETH_REGORIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) | (v)))) v 84 drivers/net/ethernet/aeroflex/greth.c #define GRETH_REGANDIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) & (v)))) v 796 drivers/net/ethernet/agere/et131x.c static inline void add_10bit(u32 *v, int n) v 798 drivers/net/ethernet/agere/et131x.c *v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP); v 801 drivers/net/ethernet/agere/et131x.c static inline void add_12bit(u32 *v, int n) v 803 drivers/net/ethernet/agere/et131x.c *v = INDEX12(*v + n) | (*v & ET_DMA12_WRAP); v 105 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_BUSY_GET(v) GET_BIT_VALUE(v, 0) v 106 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_DESC_BUF_EMPTY_GET(v) GET_BIT_VALUE(v, 1) v 107 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_DESC_BUF_FULL_GET(v) GET_BIT_VALUE(v, 2) v 108 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_RESP_BUF_EMPTY_GET(v) GET_BIT_VALUE(v, 3) v 109 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_RESP_BUF_FULL_GET(v) GET_BIT_VALUE(v, 4) v 110 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_STOPPED_GET(v) GET_BIT_VALUE(v, 5) v 111 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_RESETTING_GET(v) GET_BIT_VALUE(v, 6) v 112 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_STOPPED_ON_ERR_GET(v) GET_BIT_VALUE(v, 7) v 113 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_STOPPED_ON_EARLY_GET(v) GET_BIT_VALUE(v, 8) v 114 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_STAT_IRQ_GET(v) GET_BIT_VALUE(v, 9) v 127 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_WR_FILL_LEVEL_GET(v) (((v) & 0xffff0000) >> 16) v 128 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_RD_FILL_LEVEL_GET(v) ((v) & 0x0000ffff) v 129 drivers/net/ethernet/altera/altera_msgdmahw.h #define MSGDMA_CSR_RESP_FILL_LEVEL_GET(v) ((v) & 0x0000ffff) v 52 drivers/net/ethernet/altera/altera_tse.h #define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1) v 72 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_TX_ADDR_SEL(v) (((v) & 0x7) << 16) v 84 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_TX_ENA_GET(v) GET_BIT_VALUE(v, 0) v 85 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_RX_ENA_GET(v) GET_BIT_VALUE(v, 1) v 86 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_XON_GEN_GET(v) GET_BIT_VALUE(v, 2) v 87 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_ETH_SPEED_GET(v) GET_BIT_VALUE(v, 3) v 88 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_PROMIS_EN_GET(v) GET_BIT_VALUE(v, 4) v 89 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_PAD_EN_GET(v) GET_BIT_VALUE(v, 5) v 90 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_CRC_FWD_GET(v) GET_BIT_VALUE(v, 6) v 91 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_PAUSE_FWD_GET(v) GET_BIT_VALUE(v, 7) v 92 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_PAUSE_IGNORE_GET(v) GET_BIT_VALUE(v, 8) v 93 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_TX_ADDR_INS_GET(v) GET_BIT_VALUE(v, 9) v 94 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_HD_ENA_GET(v) GET_BIT_VALUE(v, 10) v 95 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_EXCESS_COL_GET(v) GET_BIT_VALUE(v, 11) v 96 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_LATE_COL_GET(v) GET_BIT_VALUE(v, 12) v 97 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_SW_RESET_GET(v) GET_BIT_VALUE(v, 13) v 98 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_MHASH_SEL_GET(v) GET_BIT_VALUE(v, 14) v 99 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_LOOP_ENA_GET(v) GET_BIT_VALUE(v, 15) v 100 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_TX_ADDR_SEL_GET(v) (((v) >> 16) & 0x7) v 101 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_MAGIC_ENA_GET(v) GET_BIT_VALUE(v, 19) v 102 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_SLEEP_GET(v) GET_BIT_VALUE(v, 20) v 103 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_WAKEUP_GET(v) GET_BIT_VALUE(v, 21) v 104 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_XOFF_GEN_GET(v) GET_BIT_VALUE(v, 22) v 105 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_CNTL_FRM_ENA_GET(v) GET_BIT_VALUE(v, 23) v 106 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_NO_LGTH_CHECK_GET(v) GET_BIT_VALUE(v, 24) v 107 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_ENA_10_GET(v) GET_BIT_VALUE(v, 25) v 108 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_RX_ERR_DISC_GET(v) GET_BIT_VALUE(v, 26) v 109 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_DISABLE_READ_TIMEOUT_GET(v) GET_BIT_VALUE(v, 27) v 110 drivers/net/ethernet/altera/altera_tse.h #define MAC_CMDCFG_CNT_RESET_GET(v) GET_BIT_VALUE(v, 31) v 58 drivers/net/ethernet/amd/am79c961a.c unsigned short v; v 62 drivers/net/ethernet/amd/am79c961a.c : "=r" (v) v 64 drivers/net/ethernet/amd/am79c961a.c return v; v 78 drivers/net/ethernet/amd/am79c961a.c u_short v; v 82 drivers/net/ethernet/amd/am79c961a.c : "=r" (v) v 84 drivers/net/ethernet/amd/am79c961a.c return v; v 471 drivers/net/ethernet/amd/ni65.c unsigned long v; v 472 drivers/net/ethernet/amd/ni65.c v = inw(PORT+L_DATAREG); v 473 drivers/net/ethernet/amd/ni65.c v <<= 16; v 475 drivers/net/ethernet/amd/ni65.c v |= inw(PORT+L_DATAREG); v 476 drivers/net/ethernet/amd/ni65.c printk("Version %#08lx, ",v); v 391 drivers/net/ethernet/amd/nmclan_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 230 drivers/net/ethernet/apple/macmace.c u8 v = bitrev8(addr[j<<4]); v 231 drivers/net/ethernet/apple/macmace.c checksum ^= v; v 232 drivers/net/ethernet/apple/macmace.c dev->dev_addr[j] = v; v 4282 drivers/net/ethernet/broadcom/bnx2.c __be32 v = cpu_to_be32(BNX2_RD(bp, BNX2_NVM_READ)); v 4283 drivers/net/ethernet/broadcom/bnx2.c memcpy(ret_val, &v, 4); v 14368 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c u32 v; v 14370 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c v = SHMEM2_RD(bp, v 14373 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c v & ~DRV_FLAGS_CAPABILITIES_LOADED_L2); v 4162 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c static inline bool __atomic_add_ifless(atomic_t *v, int a, int u) v 4166 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c c = atomic_read(v); v 4171 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c old = atomic_cmpxchg((v), c, c + a); v 4190 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c static inline bool __atomic_dec_ifmoe(atomic_t *v, int a, int u) v 4194 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c c = atomic_read(v); v 4199 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c old = atomic_cmpxchg((v), c, c - a); v 496 drivers/net/ethernet/broadcom/bnxt/bnxt.h __le32 v; v 626 drivers/net/ethernet/broadcom/bnxt/bnxt.h (!!((nqcmp)->v & cpu_to_le32(NQ_CN_V)) == !((raw_cons) & bp->cp_bit)) v 540 drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h __le16 v; v 564 drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h __le32 v; v 3326 drivers/net/ethernet/broadcom/tg3.c u32 v; v 3327 drivers/net/ethernet/broadcom/tg3.c int res = tg3_nvram_read(tp, offset, &v); v 3329 drivers/net/ethernet/broadcom/tg3.c *val = cpu_to_be32(v); v 15801 drivers/net/ethernet/broadcom/tg3.c __be32 v; v 15802 drivers/net/ethernet/broadcom/tg3.c if (tg3_nvram_read_be32(tp, offset + i, &v)) v 15805 drivers/net/ethernet/broadcom/tg3.c memcpy(tp->fw_ver + dst_off + i, &v, sizeof(v)); v 15928 drivers/net/ethernet/broadcom/tg3.c __be32 v; v 15929 drivers/net/ethernet/broadcom/tg3.c if (tg3_nvram_read_be32(tp, offset, &v)) v 15932 drivers/net/ethernet/broadcom/tg3.c offset += sizeof(v); v 15934 drivers/net/ethernet/broadcom/tg3.c if (vlen > TG3_VER_SIZE - sizeof(v)) { v 15935 drivers/net/ethernet/broadcom/tg3.c memcpy(&tp->fw_ver[vlen], &v, TG3_VER_SIZE - vlen); v 15939 drivers/net/ethernet/broadcom/tg3.c memcpy(&tp->fw_ver[vlen], &v, sizeof(v)); v 15940 drivers/net/ethernet/broadcom/tg3.c vlen += sizeof(v); v 29 drivers/net/ethernet/cavium/liquidio/octeon_main.h #define CVM_CAST64(v) ((long long)(v)) v 31 drivers/net/ethernet/cavium/liquidio/octeon_main.h #define CVM_CAST64(v) ((long long)(long)(v)) v 86 drivers/net/ethernet/chelsio/cxgb/sge.c #define V_CMD_LEN(v) (v) v 87 drivers/net/ethernet/chelsio/cxgb/sge.c #define G_CMD_LEN(v) ((v) & M_CMD_LEN) v 88 drivers/net/ethernet/chelsio/cxgb/sge.c #define V_CMD_GEN1(v) ((v) << 31) v 89 drivers/net/ethernet/chelsio/cxgb/sge.c #define V_CMD_GEN2(v) (v) v 92 drivers/net/ethernet/chelsio/cxgb/sge.c #define V_CMD_EOP(v) ((v) << 3) v 566 drivers/net/ethernet/chelsio/cxgb/subr.c u32 v; v 582 drivers/net/ethernet/chelsio/cxgb/subr.c pci_read_config_dword(adapter->pdev, A_PCICFG_VPD_DATA, &v); v 583 drivers/net/ethernet/chelsio/cxgb/subr.c *data = cpu_to_le32(v); v 533 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_1(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_15) v 534 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_2(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_14) v 535 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_3(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_13) v 536 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_4(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_12) v 537 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_5(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_11) v 538 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_6(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_10) v 539 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_7(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_9) v 540 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_8(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_8) v 541 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_9(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_7) v 542 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_10(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_6) v 543 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_11(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_5) v 544 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_12(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_4) v 545 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_13(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_3) v 546 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_14(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_2) v 547 drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h #define mSUNI1x10GEXP_CLR_MSBITS_15(v) ((v) & SUNI1x10GEXP_BITMSK_BITS_1) v 435 drivers/net/ethernet/chelsio/cxgb/vsc7326.c u32 v; v 438 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_read(mac->adapter, REG_ING_FFILT_UM_EN, &v); v 439 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 1 << 12; v 442 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v &= ~(1 << (port + 16)); v 444 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 1 << (port + 16); v 446 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_write(mac->adapter, REG_ING_FFILT_UM_EN, v); v 462 drivers/net/ethernet/chelsio/cxgb/vsc7326.c u32 v; v 472 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_read(mac->adapter, REG_MODE_CFG(port), &v); v 473 drivers/net/ethernet/chelsio/cxgb/vsc7326.c enable = v & 3; /* save tx/rx enables */ v 474 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v &= ~0xf; v 475 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 4; /* full duplex */ v 477 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 8; /* GigE */ v 478 drivers/net/ethernet/chelsio/cxgb/vsc7326.c enable |= v; v 479 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_write(mac->adapter, REG_MODE_CFG(port), v); v 482 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v = 0x82; v 484 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v = 0x84; v 486 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v = 0x86; v 487 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_write(mac->adapter, REG_DEV_SETUP(port), v | 1); /* reset */ v 488 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_write(mac->adapter, REG_DEV_SETUP(port), v); v 489 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_read(mac->adapter, REG_DBG(port), &v); v 490 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v &= ~0xff00; v 492 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 0x400; v 494 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 0x2000; v 496 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 0xff00; v 497 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_write(mac->adapter, REG_DBG(port), v); v 515 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_read(mac->adapter, REG_PAUSE_CFG(port), &v); v 516 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v &= 0xfff0ffff; v 517 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 0x20000; /* xon/xoff */ v 519 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 0x40000; v 521 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 0x80000; v 523 drivers/net/ethernet/chelsio/cxgb/vsc7326.c v |= 0x10000; v 524 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_write(mac->adapter, REG_PAUSE_CFG(port), v); v 573 drivers/net/ethernet/chelsio/cxgb/vsc7326.c u32 v, lo; v 575 drivers/net/ethernet/chelsio/cxgb/vsc7326.c vsc_read(mac->adapter, addr, &v); v 577 drivers/net/ethernet/chelsio/cxgb/vsc7326.c *stat = *stat - lo + v; v 579 drivers/net/ethernet/chelsio/cxgb/vsc7326.c if (v == 0) v 582 drivers/net/ethernet/chelsio/cxgb/vsc7326.c if (v < lo) v 253 drivers/net/ethernet/chelsio/cxgb3/ael1002.c int v; v 259 drivers/net/ethernet/chelsio/cxgb3/ael1002.c v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 3); v 260 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v < 0) v 261 drivers/net/ethernet/chelsio/cxgb3/ael1002.c return v; v 263 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v == 0x10) v 265 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v == 0x20) v 267 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v == 0x40) v 270 drivers/net/ethernet/chelsio/cxgb3/ael1002.c v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 6); v 271 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v < 0) v 272 drivers/net/ethernet/chelsio/cxgb3/ael1002.c return v; v 273 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v != 4) v 276 drivers/net/ethernet/chelsio/cxgb3/ael1002.c v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 10); v 277 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v < 0) v 278 drivers/net/ethernet/chelsio/cxgb3/ael1002.c return v; v 280 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v & 0x80) { v 281 drivers/net/ethernet/chelsio/cxgb3/ael1002.c v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 0x12); v 282 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v < 0) v 283 drivers/net/ethernet/chelsio/cxgb3/ael1002.c return v; v 284 drivers/net/ethernet/chelsio/cxgb3/ael1002.c return v > 10 ? phy_modtype_twinax_long : phy_modtype_twinax; v 363 drivers/net/ethernet/chelsio/cxgb3/ael1002.c int v; v 366 drivers/net/ethernet/chelsio/cxgb3/ael1002.c v = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, &stat); v 367 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v) v 368 drivers/net/ethernet/chelsio/cxgb3/ael1002.c return v; v 606 drivers/net/ethernet/chelsio/cxgb3/ael1002.c int v; v 609 drivers/net/ethernet/chelsio/cxgb3/ael1002.c v = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_STAT, &stat); v 610 drivers/net/ethernet/chelsio/cxgb3/ael1002.c if (v) v 611 drivers/net/ethernet/chelsio/cxgb3/ael1002.c return v; v 97 drivers/net/ethernet/chelsio/cxgb3/aq100x.c unsigned int v; v 99 drivers/net/ethernet/chelsio/cxgb3/aq100x.c t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &v); v 100 drivers/net/ethernet/chelsio/cxgb3/aq100x.c t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v); v 108 drivers/net/ethernet/chelsio/cxgb3/aq100x.c unsigned int cause, v; v 115 drivers/net/ethernet/chelsio/cxgb3/aq100x.c t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v); v 211 drivers/net/ethernet/chelsio/cxgb3/aq100x.c unsigned int v; v 214 drivers/net/ethernet/chelsio/cxgb3/aq100x.c err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AQ_LINK_STAT, &v); v 218 drivers/net/ethernet/chelsio/cxgb3/aq100x.c *link_ok = v & 1; v 223 drivers/net/ethernet/chelsio/cxgb3/aq100x.c err = t3_mdio_read(phy, MDIO_MMD_AN, AQ_ANEG_STAT, &v); v 228 drivers/net/ethernet/chelsio/cxgb3/aq100x.c switch (v & 0x6) { v 245 drivers/net/ethernet/chelsio/cxgb3/aq100x.c *duplex = v & 1 ? DUPLEX_FULL : DUPLEX_HALF; v 269 drivers/net/ethernet/chelsio/cxgb3/aq100x.c unsigned int v, v2, gpio, wait; v 292 drivers/net/ethernet/chelsio/cxgb3/aq100x.c err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); v 293 drivers/net/ethernet/chelsio/cxgb3/aq100x.c if (err || v == 0xffff) { v 298 drivers/net/ethernet/chelsio/cxgb3/aq100x.c phy_addr, err, v); v 302 drivers/net/ethernet/chelsio/cxgb3/aq100x.c v &= AQ_RESET; v 303 drivers/net/ethernet/chelsio/cxgb3/aq100x.c if (v) v 305 drivers/net/ethernet/chelsio/cxgb3/aq100x.c } while (v && --wait); v 306 drivers/net/ethernet/chelsio/cxgb3/aq100x.c if (v) { v 308 drivers/net/ethernet/chelsio/cxgb3/aq100x.c phy_addr, v); v 319 drivers/net/ethernet/chelsio/cxgb3/aq100x.c t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_FW_VERSION, &v); v 320 drivers/net/ethernet/chelsio/cxgb3/aq100x.c if (v != 101) v 322 drivers/net/ethernet/chelsio/cxgb3/aq100x.c phy_addr, v); v 328 drivers/net/ethernet/chelsio/cxgb3/aq100x.c err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); v 331 drivers/net/ethernet/chelsio/cxgb3/aq100x.c if (v & AQ_LOWPOWER) { v 344 drivers/net/ethernet/chelsio/cxgb3/aq100x.c v = v2 = 0; v 345 drivers/net/ethernet/chelsio/cxgb3/aq100x.c t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_RX_CFG, &v); v 347 drivers/net/ethernet/chelsio/cxgb3/aq100x.c if (v != 0x1b || v2 != 0x1b) v 350 drivers/net/ethernet/chelsio/cxgb3/aq100x.c phy_addr, v, v2); v 805 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c unsigned int v, addr, bpt, cpt; v 811 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c v = t3_read_reg(adap, A_TP_TM_PIO_DATA); v 813 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c v >>= 16; v 814 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c bpt = (v >> 8) & 0xff; v 815 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c cpt = v & 0xff; v 819 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c v = (adap->params.vpd.cclk * 1000) / cpt; v 820 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c len = sprintf(buf, "%u Kbps\n", (v * bpt) / 125); v 2725 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c unsigned int v, status, reset; v 2776 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c v = (t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS) >> S_FL0EMPTY) & v 2779 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c while (v) { v 2780 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c qs->fl[i].empty += (v & 1); v 2784 drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c v >>= 1; v 2868 drivers/net/ethernet/chelsio/cxgb3/sge.c unsigned int v, status = t3_read_reg(adapter, A_SG_INT_CAUSE) & v 2882 drivers/net/ethernet/chelsio/cxgb3/sge.c v = t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS); v 2886 drivers/net/ethernet/chelsio/cxgb3/sge.c "(0x%x)\n", (v >> S_RSPQ0DISABLED) & 0xff); v 106 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u32 v = t3_read_reg(adapter, addr) & ~mask; v 108 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c t3_write_reg(adapter, addr, v | val); v 617 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c u32 v; v 633 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c pci_read_config_dword(adapter->pdev, base + PCI_VPD_DATA, &v); v 634 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c *data = cpu_to_le32(v); v 3038 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c unsigned int v, tps, cpt, bpt, delta, mindelta = ~0; v 3048 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c v = bpt * tps; v 3049 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c delta = v >= kbps ? v - kbps : kbps - v; v 3063 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c v = t3_read_reg(adap, A_TP_TM_PIO_DATA); v 3065 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c v = (v & 0xffff) | (selected_cpt << 16) | (selected_bpt << 24); v 3067 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c v = (v & 0xffff0000) | selected_cpt | (selected_bpt << 8); v 3068 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c t3_write_reg(adap, A_TP_TM_PIO_DATA, v); v 3130 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c unsigned int v, i; v 3136 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c v = t3_read_reg(adapter, A_XGM_XAUI_IMP); v 3137 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c if (!(v & (F_XGM_CALFAULT | F_CALBUSY))) { v 3139 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c V_XAUIIMP(G_CALIMP(v) >> 2)); v 269 drivers/net/ethernet/chelsio/cxgb3/xgmac.c u32 v = t3_read_reg(mac->adapter, reg); v 270 drivers/net/ethernet/chelsio/cxgb3/xgmac.c t3_write_reg(mac->adapter, reg, v); v 280 drivers/net/ethernet/chelsio/cxgb3/xgmac.c u32 v = t3_read_reg(mac->adapter, reg); v 281 drivers/net/ethernet/chelsio/cxgb3/xgmac.c t3_write_reg(mac->adapter, reg, v); v 349 drivers/net/ethernet/chelsio/cxgb3/xgmac.c unsigned int thres, v, reg; v 367 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset); v 377 drivers/net/ethernet/chelsio/cxgb3/xgmac.c t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); v 384 drivers/net/ethernet/chelsio/cxgb3/xgmac.c t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); v 397 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset); v 398 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v &= ~V_RXFIFOPAUSELWM(M_RXFIFOPAUSELWM); v 399 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v |= V_RXFIFOPAUSELWM(lwm / 8); v 400 drivers/net/ethernet/chelsio/cxgb3/xgmac.c if (G_RXFIFOPAUSEHWM(v)) v 401 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v = (v & ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM)) | v 404 drivers/net/ethernet/chelsio/cxgb3/xgmac.c t3_write_reg(adap, A_XGM_RXFIFO_CFG + mac->offset, v); v 607 drivers/net/ethernet/chelsio/cxgb3/xgmac.c u32 v, lo; v 621 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v = RMON_READ(mac, A_XGM_RX_MAX_PKT_SIZE_ERR_CNT); v 623 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v &= 0x7fffffff; v 624 drivers/net/ethernet/chelsio/cxgb3/xgmac.c mac->stats.rx_too_long += v; v 652 drivers/net/ethernet/chelsio/cxgb3/xgmac.c v = t3_read_reg(mac->adapter, A_TP_MIB_RDATA); v 654 drivers/net/ethernet/chelsio/cxgb3/xgmac.c mac->stats.rx_cong_drops += (u64) (v - lo); v 252 drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c int clip_tbl_show(struct seq_file *seq, void *v) v 43 drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h int clip_tbl_show(struct seq_file *seq, void *v); v 70 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos) v 72 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c v = seq_tab_get_idx(seq->private, *pos + 1); v 74 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c return v; v 77 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void seq_tab_stop(struct seq_file *seq, void *v) v 81 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int seq_tab_show(struct seq_file *seq, void *v) v 85 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c return tb->show(seq, v, ((char *)v - tb->data) / tb->width); v 97 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c int (*show)(struct seq_file *seq, void *v, int i)) v 122 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cim_la_show(struct seq_file *seq, void *v, int idx) v 124 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) v 128 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 139 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx) v 141 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 144 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 157 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cim_la_show_t6(struct seq_file *seq, void *v, int idx) v 159 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 163 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 176 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx) v 178 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 181 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 236 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cim_pif_la_show(struct seq_file *seq, void *v, int idx) v 238 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 240 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 279 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cim_ma_la_show(struct seq_file *seq, void *v, int idx) v 281 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 283 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 325 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cim_qcfg_show(struct seq_file *seq, void *v) v 382 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cimq_show(struct seq_file *seq, void *v, int idx) v 384 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 453 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void field_desc_show(struct seq_file *seq, u64 v, v 462 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c ((unsigned long long)v >> p->start) & mask); v 512 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int tp_la_show(struct seq_file *seq, void *v, int idx) v 514 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u64 *p = v; v 520 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int tp_la_show2(struct seq_file *seq, void *v, int idx) v 522 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u64 *p = v; v 532 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int tp_la_show3(struct seq_file *seq, void *v, int idx) v 628 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u64 *p = v; v 694 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int ulprx_la_show(struct seq_file *seq, void *v, int idx) v 696 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c const u32 *p = v; v 698 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) v 741 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int pm_stats_show(struct seq_file *seq, void *v) v 820 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int tx_rate_show(struct seq_file *seq, void *v) v 852 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int cctrl_tbl_show(struct seq_file *seq, void *v) v 902 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int clk_show(struct seq_file *seq, void *v) v 992 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int devlog_show(struct seq_file *seq, void *v) v 994 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) v 999 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c int fidx = (uintptr_t)v - 2; v 1058 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos) v 1066 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void devlog_stop(struct seq_file *seq, void *v) v 1153 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int mboxlog_show(struct seq_file *seq, void *v) v 1160 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 1168 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c entry_idx = log->cursor + ((uintptr_t)v - 2); v 1204 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void *mboxlog_next(struct seq_file *seq, void *v, loff_t *pos) v 1210 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void mboxlog_stop(struct seq_file *seq, void *v) v 1241 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int mbox_show(struct seq_file *seq, void *v) v 1325 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int mps_trc_show(struct seq_file *seq, void *v) v 1671 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int mps_tcam_show(struct seq_file *seq, void *v) v 1675 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 1698 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c unsigned int idx = (uintptr_t)v - 2; v 1908 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos) v 1914 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void mps_tcam_stop(struct seq_file *seq, void *v) v 1947 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int sensors_show(struct seq_file *seq, void *v) v 1986 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int rss_show(struct seq_file *seq, void *v, int idx) v 1988 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c u16 *entry = v; v 2036 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int rss_config_show(struct seq_file *seq, void *v) v 2188 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int rss_key_show(struct seq_file *seq, void *v) v 2251 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int rss_pf_config_show(struct seq_file *seq, void *v, int idx) v 2255 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 2270 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c pfconf = v; v 2333 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int rss_vf_config_show(struct seq_file *seq, void *v, int idx) v 2335 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 2340 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c struct rss_vf_conf *vfconf = v; v 2393 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int dcb_info_show(struct seq_file *seq, void *v) v 2397 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c if (v == SEQ_START_TOKEN) { v 2400 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c int port = (uintptr_t)v - 2; v 2538 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void dcb_info_stop(struct seq_file *seq, void *v) v 2542 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void *dcb_info_next(struct seq_file *seq, void *v, loff_t *pos) v 2578 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int resources_show(struct seq_file *seq, void *v) v 2658 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int sge_qinfo_show(struct seq_file *seq, void *v) v 2666 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c int i, n, r = (uintptr_t)v - 1; v 2688 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define S3(fmt_spec, s, v) \ v 2692 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c seq_printf(seq, " %16" fmt_spec, v); \ v 2695 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define S(s, v) S3("s", s, v) v 2696 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v) v 2697 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define T(s, v) S3("u", s, tx[i].v) v 2698 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define TL(s, v) T3("lu", s, v) v 2699 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v) v 2700 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define R(s, v) S3("u", s, rx[i].v) v 2701 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define RL(s, v) R3("lu", s, v) v 3024 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void sge_queue_stop(struct seq_file *seq, void *v) v 3028 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos) v 3122 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int tid_info_show(struct seq_file *seq, void *v) v 3270 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int meminfo_show(struct seq_file *seq, void *v) v 3333 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int chcr_stats_show(struct seq_file *seq, void *v) v 3491 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c static int tp_stats_show(struct seq_file *seq, void *v) v 48 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.h int (*show)(struct seq_file *seq, void *v, int idx); v 62 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.h int (*show)(struct seq_file *seq, void *v, int i)); v 270 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c int v; v 272 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c v = t4_read_reg(adap, SGE_STAT_CFG_A); v 273 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c if (STATSOURCE_T5_G(v) == 7) { v 1113 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) v 1118 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); v 1122 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) v 1127 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); v 1337 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c unsigned int v = pi->rss_mode; v 1342 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) v 1345 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) v 1349 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) && v 1350 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) v 1353 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) v 1359 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) v 1363 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) v 1366 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) v 1370 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) && v 1371 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) v 1374 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) v 1380 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) v 675 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A)); v 677 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c if (v & PFSW_F) { v 679 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A), v); v 1158 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v, new_idx; v 1163 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v = FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) | v 1168 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c &v, &new_idx); v 3707 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v; v 3754 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v = t4_read_reg(adap, TP_PIO_DATA_A); v 3755 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c t4_write_reg(adap, TP_PIO_DATA_A, v & ~CSUM_HAS_PSEUDO_HDR_F); v 3763 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v = 0x84218421; v 3765 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c &v, 1, TP_TX_SCHED_HDR_A); v 3767 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c &v, 1, TP_TX_SCHED_FIFO_A); v 3769 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c &v, 1, TP_TX_SCHED_PCMD_A); v 4291 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c u32 v, port_vec; v 4458 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c v = v 4461 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, &v, &port_vec); v 682 drivers/net/ethernet/chelsio/cxgb4/l2t.c static void *l2t_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 684 drivers/net/ethernet/chelsio/cxgb4/l2t.c v = l2t_get_idx(seq, *pos); v 686 drivers/net/ethernet/chelsio/cxgb4/l2t.c return v; v 689 drivers/net/ethernet/chelsio/cxgb4/l2t.c static void l2t_seq_stop(struct seq_file *seq, void *v) v 707 drivers/net/ethernet/chelsio/cxgb4/l2t.c static int l2t_seq_show(struct seq_file *seq, void *v) v 709 drivers/net/ethernet/chelsio/cxgb4/l2t.c if (v == SEQ_START_TOKEN) v 715 drivers/net/ethernet/chelsio/cxgb4/l2t.c struct l2t_entry *e = v; v 95 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 v = t4_read_reg(adapter, addr) & ~mask; v 97 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_write_reg(adapter, addr, v | val); v 292 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 v; v 366 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = MBOWNER_G(t4_read_reg(adap, ctl_reg)); v 367 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) v 368 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = MBOWNER_G(t4_read_reg(adap, ctl_reg)); v 369 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v != MBOX_OWNER_DRV) { v 373 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ret = (v == MBOX_OWNER_FW) ? -EBUSY : -ETIMEDOUT; v 401 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, ctl_reg); v 402 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (MBOWNER_G(v) == MBOX_OWNER_DRV) { v 403 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (!(v & MBMSGVALID_F)) { v 2738 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int v = enable ? 0xc : 0; v 2739 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c int ret = pci_write_vpd(adapter->pdev, EEPROM_STAT_ADDR, 4, &v); v 2896 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c int v; v 2909 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_wr_mbox(adapter, adapter->mbox, &cmd, sizeof(cmd), &rpl); v 2910 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v != FW_SUCCESS) v 2911 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c return v; v 4483 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u64 v; v 4518 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = (u64)t4_read_reg(adapter, SGE_INT_CAUSE1_A) | v 4520 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v) { v 4522 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c (unsigned long long)v); v 4523 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_write_reg(adapter, SGE_INT_CAUSE1_A, v); v 4524 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_write_reg(adapter, SGE_INT_CAUSE2_A, v >> 32); v 4527 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v |= t4_handle_intr_status(adapter, SGE_INT_CAUSE3_A, sge_intr_info); v 4529 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v |= t4_handle_intr_status(adapter, SGE_INT_CAUSE3_A, v 4543 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v != 0) v 4852 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int addr, cnt_addr, v; v 4870 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adapter, addr) & MEM_INT_MASK; v 4871 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v & PERR_INT_CAUSE_F) v 4874 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v & ECC_CE_INT_CAUSE_F) { v 4885 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v & ECC_UE_INT_CAUSE_F) v 4889 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_write_reg(adapter, addr, v); v 4890 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v & (PERR_INT_CAUSE_F | ECC_UE_INT_CAUSE_F)) v 4899 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 v, status = t4_read_reg(adap, MA_INT_CAUSE_A); v 4912 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, MA_INT_WRAP_STATUS_A); v 4915 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c MEM_WRAP_CLIENT_NUM_G(v), v 4916 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c MEM_WRAP_ADDRESS_G(v) << 4); v 4960 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 v, int_cause_reg; v 4967 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, int_cause_reg); v 4969 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v &= TXFIFO_PRTY_ERR_F | RXFIFO_PRTY_ERR_F; v 4970 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (!v) v 4973 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v & TXFIFO_PRTY_ERR_F) v 4976 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v & RXFIFO_PRTY_ERR_F) v 4979 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_write_reg(adap, PORT_REG(port, XGMAC_PORT_INT_CAUSE_A), v); v 5183 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int v; v 5185 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = FW_RSS_IND_TBL_CMD_IQ0_V(*rsp); v 5188 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v |= FW_RSS_IND_TBL_CMD_IQ1_V(*rsp); v 5191 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v |= FW_RSS_IND_TBL_CMD_IQ2_V(*rsp); v 5195 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *qp++ = cpu_to_be32(v); v 5753 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 v; v 5759 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, TP_MTU_TABLE_A); v 5760 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c mtus[i] = MTUVALUE_G(v); v 5762 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c mtu_log[i] = MTUWIDTH_G(v); v 5906 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u64 v = bytes256 * adap->params.vpd.cclk; v 5908 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c return v * 62 + v / 2; v 5922 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 v; v 5924 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, TP_TX_TRATE_A); v 5925 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c nic_rate[0] = chan_rate(adap, TNLRATE0_G(v)); v 5926 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c nic_rate[1] = chan_rate(adap, TNLRATE1_G(v)); v 5928 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c nic_rate[2] = chan_rate(adap, TNLRATE2_G(v)); v 5929 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c nic_rate[3] = chan_rate(adap, TNLRATE3_G(v)); v 5932 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, TP_TX_ORATE_A); v 5933 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ofld_rate[0] = chan_rate(adap, OFDRATE0_G(v)); v 5934 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ofld_rate[1] = chan_rate(adap, OFDRATE1_G(v)); v 5936 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ofld_rate[2] = chan_rate(adap, OFDRATE2_G(v)); v 5937 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ofld_rate[3] = chan_rate(adap, OFDRATE3_G(v)); v 6857 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 v; v 6889 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = be32_to_cpu(c.err_to_clearinit); v 6890 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c master_mbox = FW_HELLO_CMD_MBMASTER_G(v); v 6892 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if (v & FW_HELLO_CMD_ERR_F) v 6894 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c else if (v & FW_HELLO_CMD_INIT_F) v 6911 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c if ((v & (FW_HELLO_CMD_ERR_F|FW_HELLO_CMD_INIT_F)) == 0 && v 9404 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c u32 param, val, v; v 9408 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, TP_TIMER_RESOLUTION_A); v 9409 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c adap->params.tp.tre = TIMERRESOLUTION_G(v); v 9410 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c adap->params.tp.dack_re = DELAYEDACKRESOLUTION_G(v); v 9464 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, TP_OUT_CONFIG_A); v 9465 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c adap->params.tp.rx_pkt_encap = (v & CRXPKTENC_F) ? 1 : 0; v 9494 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, LE_3_DB_HASH_MASK_GEN_IPV4_T6_A); v 9495 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c adap->params.tp.hash_filter_mask = v; v 9496 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, LE_4_DB_HASH_MASK_GEN_IPV4_T6_A); v 9497 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c adap->params.tp.hash_filter_mask |= ((u64)v << 32); v 9722 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int i, v; v 9729 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, CIM_QUEUE_CONFIG_CTRL_A); v 9731 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *base++ = CIMQBASE_G(v) * 256; v 9732 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *size++ = CIMQSIZE_G(v) * 256; v 9733 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *thres++ = QUEFULLTHRSH_G(v) * 8; /* 8-byte unit */ v 9738 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, CIM_QUEUE_CONFIG_CTRL_A); v 9740 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *base++ = CIMQBASE_G(v) * 256; v 9741 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *size++ = CIMQSIZE_G(v) * 256; v 9801 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int addr, v, nwords; v 9810 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, CIM_QUEUE_CONFIG_CTRL_A); v 9812 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c addr = CIMQBASE_G(v) * 64; /* muliple of 256 -> muliple of 4 */ v 9813 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c nwords = CIMQSIZE_G(v) * 64; /* same */ v 10241 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int i, v; v 10245 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = t4_read_reg(adap, TP_PACE_TABLE_A); v 10246 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c pace_vals[i] = dack_ticks_to_usec(adap, v); v 10263 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int v, addr, bpt, cpt; v 10267 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_tp_tm_pio_read(adap, &v, 1, addr, sleep_ok); v 10269 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v >>= 16; v 10270 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c bpt = (v >> 8) & 0xff; v 10271 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c cpt = v & 0xff; v 10275 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v = (adap->params.vpd.cclk * 1000) / cpt; /* ticks/s */ v 10276 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *kbps = (v * bpt) / 125; v 10281 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c t4_tp_tm_pio_read(adap, &v, 1, addr, sleep_ok); v 10283 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v >>= 16; v 10284 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c v &= 0xffff; v 10285 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c *ipg = (10000 * v) / core_ticks_per_usec(adap); v 1097 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c u32 v, pktcnt_idx; v 1101 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c v = FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) | v 1105 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c err = t4vf_set_params(adapter, 1, &v, &pktcnt_idx); v 1960 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static int mboxlog_show(struct seq_file *seq, void *v) v 1967 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c if (v == SEQ_START_TOKEN) { v 1975 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c entry_idx = log->cursor + ((uintptr_t)v - 2); v 2011 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void *mboxlog_next(struct seq_file *seq, void *v, loff_t *pos) v 2017 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void mboxlog_stop(struct seq_file *seq, void *v) v 2053 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static int sge_qinfo_show(struct seq_file *seq, void *v) v 2057 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c int qs, r = (uintptr_t)v - 1; v 2062 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define S3(fmt_spec, s, v) \ v 2066 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c seq_printf(seq, " %16" fmt_spec, v); \ v 2069 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define S(s, v) S3("s", s, v) v 2070 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define T(s, v) S3("u", s, txq[qs].v) v 2071 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define R(s, v) S3("u", s, rxq[qs].v) v 2163 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void sge_queue_stop(struct seq_file *seq, void *v) v 2167 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos) v 2206 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static int sge_qstats_show(struct seq_file *seq, void *v) v 2210 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c int qs, r = (uintptr_t)v - 1; v 2215 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define S3(fmt, s, v) \ v 2219 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c seq_printf(seq, " %8" fmt, v); \ v 2222 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define S(s, v) S3("s", s, v) v 2224 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define T3(fmt, s, v) S3(fmt, s, txq[qs].v) v 2225 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define T(s, v) T3("lu", s, v) v 2227 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define R3(fmt, s, v) S3(fmt, s, rxq[qs].v) v 2228 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define R(s, v) R3("lu", s, v) v 2309 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void sge_qstats_stop(struct seq_file *seq, void *v) v 2313 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void *sge_qstats_next(struct seq_file *seq, void *v, loff_t *pos) v 2350 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static int resources_show(struct seq_file *seq, void *v) v 2379 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static int interfaces_show(struct seq_file *seq, void *v) v 2381 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c if (v == SEQ_START_TOKEN) { v 2385 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c int pidx = (uintptr_t)v - 2; v 2409 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void *interfaces_next(struct seq_file *seq, void *v, loff_t *pos) v 2415 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c static void interfaces_stop(struct seq_file *seq, void *v) v 136 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c u32 v, mbox_data; v 209 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); v 210 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) v 211 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); v 212 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v != MBOX_OWNER_DRV) { v 216 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c ret = (v == MBOX_OWNER_FW) ? -EBUSY : -ETIMEDOUT; v 262 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4_read_reg(adapter, mbox_ctl); v 263 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (MBOWNER_G(v) == MBOX_OWNER_DRV) { v 268 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if ((v & MBMSGVALID_F) == 0) { v 284 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = be64_to_cpu(cmd_rpl[0]); v 303 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return -FW_CMD_RETVAL_G(v); v 852 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c int v; v 868 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_query_params(adapter, 7, params, vals); v 869 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 870 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 892 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_query_params(adapter, 1, params, vals); v 893 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v != FW_SUCCESS) { v 897 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 906 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_query_params(adapter, 2, params, vals); v 907 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 908 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 925 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_query_params(adapter, 2, params, vals); v 926 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v != FW_SUCCESS) { v 930 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 971 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c int v; v 975 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_query_params(adapter, 1, params, vals); v 976 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 977 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 994 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c int v; v 1000 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_query_params(adapter, 2, params, vals); v 1001 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 1002 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 1020 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c int v; v 1031 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); v 1032 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 1033 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 1095 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c int v; v 1107 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); v 1108 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 1109 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 1148 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c int v; v 1156 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); v 1157 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 1158 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 1341 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c int v; v 1355 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); v 1356 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c if (v) v 1357 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c return v; v 273 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h u32 v = val >> tformat->free_bits; v 275 drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h if (v) { v 251 drivers/net/ethernet/freescale/enetc/enetc.c struct enetc_int_vector *v = data; v 255 drivers/net/ethernet/freescale/enetc/enetc.c enetc_wr_reg(v->rbier, 0); v 257 drivers/net/ethernet/freescale/enetc/enetc.c for_each_set_bit(i, &v->tx_rings_map, v->count_tx_rings) v 258 drivers/net/ethernet/freescale/enetc/enetc.c enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), 0); v 260 drivers/net/ethernet/freescale/enetc/enetc.c napi_schedule_irqoff(&v->napi); v 272 drivers/net/ethernet/freescale/enetc/enetc.c *v = container_of(napi, struct enetc_int_vector, napi); v 277 drivers/net/ethernet/freescale/enetc/enetc.c for (i = 0; i < v->count_tx_rings; i++) v 278 drivers/net/ethernet/freescale/enetc/enetc.c if (!enetc_clean_tx_ring(&v->tx_ring[i], budget)) v 281 drivers/net/ethernet/freescale/enetc/enetc.c work_done = enetc_clean_rx_ring(&v->rx_ring, napi, budget); v 291 drivers/net/ethernet/freescale/enetc/enetc.c enetc_wr_reg(v->rbier, ENETC_RBIER_RXTIE); v 293 drivers/net/ethernet/freescale/enetc/enetc.c for_each_set_bit(i, &v->tx_rings_map, v->count_tx_rings) v 294 drivers/net/ethernet/freescale/enetc/enetc.c enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), v 1235 drivers/net/ethernet/freescale/enetc/enetc.c struct enetc_int_vector *v = priv->int_vector[i]; v 1239 drivers/net/ethernet/freescale/enetc/enetc.c snprintf(v->name, sizeof(v->name), "%s-rxtx%d", v 1241 drivers/net/ethernet/freescale/enetc/enetc.c err = request_irq(irq, enetc_msix, 0, v->name, v); v 1247 drivers/net/ethernet/freescale/enetc/enetc.c v->tbier_base = hw->reg + ENETC_BDR(TX, 0, ENETC_TBIER); v 1248 drivers/net/ethernet/freescale/enetc/enetc.c v->rbier = hw->reg + ENETC_BDR(RX, i, ENETC_RBIER); v 1252 drivers/net/ethernet/freescale/enetc/enetc.c for (j = 0; j < v->count_tx_rings; j++) { v 1253 drivers/net/ethernet/freescale/enetc/enetc.c int idx = v->tx_ring[j].index; v 1627 drivers/net/ethernet/freescale/enetc/enetc.c struct enetc_int_vector *v; v 1631 drivers/net/ethernet/freescale/enetc/enetc.c v = kzalloc(size, GFP_KERNEL); v 1632 drivers/net/ethernet/freescale/enetc/enetc.c if (!v) { v 1637 drivers/net/ethernet/freescale/enetc/enetc.c priv->int_vector[i] = v; v 1639 drivers/net/ethernet/freescale/enetc/enetc.c netif_napi_add(priv->ndev, &v->napi, enetc_poll, v 1641 drivers/net/ethernet/freescale/enetc/enetc.c v->count_tx_rings = v_tx_rings; v 1652 drivers/net/ethernet/freescale/enetc/enetc.c __set_bit(idx, &v->tx_rings_map); v 1653 drivers/net/ethernet/freescale/enetc/enetc.c bdr = &v->tx_ring[j]; v 1661 drivers/net/ethernet/freescale/enetc/enetc.c bdr = &v->rx_ring; v 1687 drivers/net/ethernet/freescale/enetc/enetc.c struct enetc_int_vector *v = priv->int_vector[i]; v 1689 drivers/net/ethernet/freescale/enetc/enetc.c netif_napi_del(&v->napi); v 327 drivers/net/ethernet/freescale/fec.h #define RCMR_CMP_CFG(v, n) (((v) & 0x7) << (n << 2)) v 254 drivers/net/ethernet/freescale/fec_main.c #define FEC_MMFR_PA(v) ((v & 0x1f) << 23) v 255 drivers/net/ethernet/freescale/fec_main.c #define FEC_MMFR_RA(v) ((v & 0x1f) << 18) v 257 drivers/net/ethernet/freescale/fec_main.c #define FEC_MMFR_DATA(v) (v & 0xffff) v 67 drivers/net/ethernet/fujitsu/fmvj18x_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 821 drivers/net/ethernet/hisilicon/hns/hns_enet.c int budget, void *v) v 858 drivers/net/ethernet/hisilicon/hns/hns_enet.c ((void (*)(struct hns_nic_ring_data *, struct sk_buff *))v)( v 949 drivers/net/ethernet/hisilicon/hns/hns_enet.c int budget, void *v) v 703 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h #define calc_x(x, k, v) ((x) = (~(k) & (v))) v 704 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h #define calc_y(y, k, v) \ v 707 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h const typeof(v) _v_ = (v); \ v 403 drivers/net/ethernet/i825xx/82596.c u32 v = (u32) (c) | (u32) (x); v 404 drivers/net/ethernet/i825xx/82596.c v = ((u32) (v) << 16) | ((u32) (v) >> 16); v 405 drivers/net/ethernet/i825xx/82596.c *(volatile u32 *) dev->base_addr = v; v 407 drivers/net/ethernet/i825xx/82596.c *(volatile u32 *) dev->base_addr = v; v 134 drivers/net/ethernet/i825xx/lasi_82596.c u32 v = (u32) (c) | (u32) (x); v 138 drivers/net/ethernet/i825xx/lasi_82596.c a = v >> 16; v 139 drivers/net/ethernet/i825xx/lasi_82596.c b = v & 0xffff; v 141 drivers/net/ethernet/i825xx/lasi_82596.c a = v & 0xffff; v 142 drivers/net/ethernet/i825xx/lasi_82596.c b = v >> 16; v 458 drivers/net/ethernet/i825xx/lib82596.c #define virt_to_dma(lp, v) ((lp)->dma_addr + (dma_addr_t)((unsigned long)(v)-(unsigned long)((lp)->dma))) v 62 drivers/net/ethernet/i825xx/sni_82596.c u32 v = (u32) (c) | (u32) (x); v 65 drivers/net/ethernet/i825xx/sni_82596.c writew(v & 0xffff, lp->mpu_port); v 68 drivers/net/ethernet/i825xx/sni_82596.c writew(v >> 16, lp->mpu_port); v 70 drivers/net/ethernet/i825xx/sni_82596.c writel(v, lp->mpu_port); v 73 drivers/net/ethernet/i825xx/sni_82596.c writel(v, lp->mpu_port); v 981 drivers/net/ethernet/ibm/ibmveth.c #define page_offset(v) ((unsigned long)(v) & ((1 << 12) - 1)) v 21 drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c void __always_unused *v, v 30 drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c void __always_unused *v) v 43 drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c static int fm10k_dbg_tx_desc_seq_show(struct seq_file *s, void *v) v 46 drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c int i = *(loff_t *)v; v 70 drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c static int fm10k_dbg_rx_desc_seq_show(struct seq_file *s, void *v) v 73 drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c int i = *(loff_t *)v; v 216 drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c int v, err; v 218 drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 219 drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c if (pf->vsi[v] && pf->vsi[v]->netdev) { v 220 drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c err = i40e_dcbnl_vsi_del_app(pf->vsi[v], app); v 222 drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c pf->vsi[v]->seid, err, app->selector, v 848 drivers/net/ethernet/intel/i40e/i40e_debugfs.c unsigned int v; v 850 drivers/net/ethernet/intel/i40e/i40e_debugfs.c cnt = sscanf(&cmd_buf[8], "%i %u", &vsi_seid, &v); v 864 drivers/net/ethernet/intel/i40e/i40e_debugfs.c vid = v; v 2589 drivers/net/ethernet/intel/i40e/i40e_main.c int v; v 2600 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 2601 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v] && v 2602 drivers/net/ethernet/intel/i40e/i40e_main.c (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) { v 2603 drivers/net/ethernet/intel/i40e/i40e_main.c int ret = i40e_sync_vsi_filters(pf->vsi[v]); v 4898 drivers/net/ethernet/intel/i40e/i40e_main.c int v; v 4900 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 4901 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v]) v 4902 drivers/net/ethernet/intel/i40e/i40e_main.c i40e_quiesce_vsi(pf->vsi[v]); v 4912 drivers/net/ethernet/intel/i40e/i40e_main.c int v; v 4914 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 4915 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v]) v 4916 drivers/net/ethernet/intel/i40e/i40e_main.c i40e_unquiesce_vsi(pf->vsi[v]); v 4978 drivers/net/ethernet/intel/i40e/i40e_main.c int v, ret = 0; v 4980 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { v 4981 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v]) { v 4982 drivers/net/ethernet/intel/i40e/i40e_main.c ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]); v 6358 drivers/net/ethernet/intel/i40e/i40e_main.c u8 v; v 6362 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < I40E_MAX_VEB; v++) { v 6363 drivers/net/ethernet/intel/i40e/i40e_main.c if (!pf->veb[v]) v 6365 drivers/net/ethernet/intel/i40e/i40e_main.c ret = i40e_veb_config_tc(pf->veb[v], tc_map); v 6369 drivers/net/ethernet/intel/i40e/i40e_main.c pf->veb[v]->seid); v 6375 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 6376 drivers/net/ethernet/intel/i40e/i40e_main.c if (!pf->vsi[v]) v 6382 drivers/net/ethernet/intel/i40e/i40e_main.c if (v == pf->lan_vsi) v 6387 drivers/net/ethernet/intel/i40e/i40e_main.c ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); v 6391 drivers/net/ethernet/intel/i40e/i40e_main.c pf->vsi[v]->seid); v 6395 drivers/net/ethernet/intel/i40e/i40e_main.c i40e_vsi_map_rings_to_vectors(pf->vsi[v]); v 6396 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v]->netdev) v 6397 drivers/net/ethernet/intel/i40e/i40e_main.c i40e_dcbnl_set_all(pf->vsi[v]); v 8471 drivers/net/ethernet/intel/i40e/i40e_main.c int v; v 8476 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 8477 drivers/net/ethernet/intel/i40e/i40e_main.c struct i40e_vsi *vsi = pf->vsi[v]; v 8482 drivers/net/ethernet/intel/i40e/i40e_main.c i40e_vsi_reinit_locked(pf->vsi[v]); v 8485 drivers/net/ethernet/intel/i40e/i40e_main.c int v; v 8489 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 8490 drivers/net/ethernet/intel/i40e/i40e_main.c struct i40e_vsi *vsi = pf->vsi[v]; v 9474 drivers/net/ethernet/intel/i40e/i40e_main.c int v, veb_idx; v 9478 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { v 9479 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v] && v 9480 drivers/net/ethernet/intel/i40e/i40e_main.c pf->vsi[v]->veb_idx == veb->idx && v 9481 drivers/net/ethernet/intel/i40e/i40e_main.c pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { v 9482 drivers/net/ethernet/intel/i40e/i40e_main.c ctl_vsi = pf->vsi[v]; v 9515 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 9516 drivers/net/ethernet/intel/i40e/i40e_main.c if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) v 9519 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v]->veb_idx == veb->idx) { v 9520 drivers/net/ethernet/intel/i40e/i40e_main.c struct i40e_vsi *vsi = pf->vsi[v]; v 9527 drivers/net/ethernet/intel/i40e/i40e_main.c v, ret); v 9799 drivers/net/ethernet/intel/i40e/i40e_main.c u32 v; v 9817 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < pf->num_alloc_vsi; v++) { v 9818 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->vsi[v]) v 9819 drivers/net/ethernet/intel/i40e/i40e_main.c pf->vsi[v]->seid = 0; v 9934 drivers/net/ethernet/intel/i40e/i40e_main.c int v; v 10074 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < I40E_MAX_VEB; v++) { v 10075 drivers/net/ethernet/intel/i40e/i40e_main.c if (!pf->veb[v]) v 10078 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->veb[v]->uplink_seid == pf->mac_seid || v 10079 drivers/net/ethernet/intel/i40e/i40e_main.c pf->veb[v]->uplink_seid == 0) { v 10080 drivers/net/ethernet/intel/i40e/i40e_main.c ret = i40e_reconstitute_veb(pf->veb[v]); v 10091 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->veb[v]->uplink_seid == pf->mac_seid) { v 10097 drivers/net/ethernet/intel/i40e/i40e_main.c } else if (pf->veb[v]->uplink_seid == 0) { v 14108 drivers/net/ethernet/intel/i40e/i40e_main.c int v; v 14111 drivers/net/ethernet/intel/i40e/i40e_main.c for (v = 0; v < I40E_MAX_VEB; v++) { v 14112 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->veb[v] && (pf->veb[v]->seid == seid)) { v 14113 drivers/net/ethernet/intel/i40e/i40e_main.c pf->lan_veb = v; v 14118 drivers/net/ethernet/intel/i40e/i40e_main.c v = i40e_veb_mem_alloc(pf); v 14119 drivers/net/ethernet/intel/i40e/i40e_main.c if (v < 0) v 14121 drivers/net/ethernet/intel/i40e/i40e_main.c pf->lan_veb = v; v 1409 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c int i, v; v 1421 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) v 1422 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c i40e_trigger_vf_reset(&pf->vf[v], flr); v 1430 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) { v 1436 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c while (v < pf->num_alloc_vfs) { v 1437 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c vf = &pf->vf[v]; v 1445 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c v++; v 1455 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c if (v < pf->num_alloc_vfs) v 1457 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c pf->vf[v].vf_id); v 1463 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) { v 1465 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c if (pf->vf[v].lan_vsi_idx == 0) v 1468 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]); v 1474 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) { v 1476 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c if (pf->vf[v].lan_vsi_idx == 0) v 1479 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]); v 1488 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) v 1489 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c i40e_cleanup_reset_vf(&pf->vf[v]); v 518 drivers/net/ethernet/intel/ice/ice_common.c u16 v, m, flgs; v 520 drivers/net/ethernet/intel/ice/ice_common.c v = le16_to_cpu(config->entry[i]); v 521 drivers/net/ethernet/intel/ice/ice_common.c m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; v 522 drivers/net/ethernet/intel/ice/ice_common.c flgs = (v & ICE_AQC_FW_LOG_EN_M) >> ICE_AQC_FW_LOG_EN_S; v 662 drivers/net/ethernet/intel/ice/ice_common.c u16 v, m; v 675 drivers/net/ethernet/intel/ice/ice_common.c v = le16_to_cpu(data->entry[i]); v 676 drivers/net/ethernet/intel/ice/ice_common.c m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; v 152 drivers/net/ethernet/intel/ice/ice_dcb_lib.c int v, ret; v 155 drivers/net/ethernet/intel/ice/ice_dcb_lib.c ice_for_each_vsi(pf, v) { v 156 drivers/net/ethernet/intel/ice/ice_dcb_lib.c if (!pf->vsi[v]) v 159 drivers/net/ethernet/intel/ice/ice_dcb_lib.c if (pf->vsi[v]->type == ICE_VSI_PF) v 164 drivers/net/ethernet/intel/ice/ice_dcb_lib.c ret = ice_vsi_cfg_tc(pf->vsi[v], tc_map); v 168 drivers/net/ethernet/intel/ice/ice_dcb_lib.c pf->vsi[v]->idx); v 172 drivers/net/ethernet/intel/ice/ice_dcb_lib.c ice_vsi_map_rings_to_vectors(pf->vsi[v]); v 77 drivers/net/ethernet/intel/ice/ice_main.c u32 v; v 79 drivers/net/ethernet/intel/ice/ice_main.c ice_for_each_vsi(pf, v) v 80 drivers/net/ethernet/intel/ice/ice_main.c if (pf->vsi[v] && pf->vsi[v]->type == ICE_VSI_PF) { v 81 drivers/net/ethernet/intel/ice/ice_main.c vsi = pf->vsi[v]; v 421 drivers/net/ethernet/intel/ice/ice_main.c int v; v 428 drivers/net/ethernet/intel/ice/ice_main.c ice_for_each_vsi(pf, v) v 429 drivers/net/ethernet/intel/ice/ice_main.c if (pf->vsi[v] && ice_vsi_fltr_changed(pf->vsi[v]) && v 430 drivers/net/ethernet/intel/ice/ice_main.c ice_vsi_sync_fltr(pf->vsi[v])) { v 475 drivers/net/ethernet/intel/ice/ice_main.c int v; v 477 drivers/net/ethernet/intel/ice/ice_main.c ice_for_each_vsi(pf, v) v 478 drivers/net/ethernet/intel/ice/ice_main.c if (pf->vsi[v]) v 479 drivers/net/ethernet/intel/ice/ice_main.c ice_dis_vsi(pf->vsi[v], locked); v 4138 drivers/net/ethernet/intel/ice/ice_main.c int v; v 4140 drivers/net/ethernet/intel/ice/ice_main.c ice_for_each_vsi(pf, v) v 4141 drivers/net/ethernet/intel/ice/ice_main.c if (pf->vsi[v]) v 4142 drivers/net/ethernet/intel/ice/ice_main.c if (ice_ena_vsi(pf->vsi[v], locked)) v 4589 drivers/net/ethernet/intel/ice/ice_main.c int rem, v, err = 0; v 4609 drivers/net/ethernet/intel/ice/ice_main.c ice_for_each_vsi(pf, v) { v 4610 drivers/net/ethernet/intel/ice/ice_main.c if (!pf->vsi[v]) v 4612 drivers/net/ethernet/intel/ice/ice_main.c err = ice_vsi_update_bridge_mode(pf->vsi[v], mode); v 187 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c int first, last, v; v 198 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c for (v = first; v <= last; v++) { v 205 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c wr32(hw, GLINT_VECT2FUNC(v), reg); v 638 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c int first, last, v; v 662 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c for (v = first; v <= last; v++) { v 667 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c wr32(hw, GLINT_VECT2FUNC(v), reg); v 1027 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c int v; v 1040 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) { v 1041 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c struct ice_vf *vf = &pf->vf[v]; v 1072 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c int v, i; v 1083 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) v 1084 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c ice_trigger_vf_reset(&pf->vf[v], is_vflr, true); v 1086 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) { v 1089 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c vf = &pf->vf[v]; v 1103 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) { v 1106 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c while (v < pf->num_alloc_vfs) { v 1109 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c vf = &pf->vf[v]; v 1120 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c v++; v 1127 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c if (v < pf->num_alloc_vfs) v 1131 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c for (v = 0; v < pf->num_alloc_vfs; v++) { v 1132 drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c vf = &pf->vf[v]; v 169 drivers/net/ethernet/intel/ixgbevf/vf.h #define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v) v 180 drivers/net/ethernet/intel/ixgbevf/vf.h #define IXGBE_WRITE_REG_ARRAY(h, r, o, v) ixgbe_write_reg_array(h, r, o, v) v 1819 drivers/net/ethernet/marvell/mv643xx_eth.c u32 v; v 1821 drivers/net/ethernet/marvell/mv643xx_eth.c v = 0; v 1823 drivers/net/ethernet/marvell/mv643xx_eth.c v |= 0x00000001; v 1825 drivers/net/ethernet/marvell/mv643xx_eth.c v |= 0x00000100; v 1827 drivers/net/ethernet/marvell/mv643xx_eth.c v |= 0x00010000; v 1829 drivers/net/ethernet/marvell/mv643xx_eth.c v |= 0x01000000; v 1832 drivers/net/ethernet/marvell/mv643xx_eth.c wrl(mp, off, v); v 51 drivers/net/ethernet/marvell/mvneta.c #define MVNETA_RXQ_NON_OCCUPIED(v) ((v) << 16) v 368 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_TXP_REFILL_PERIOD_MASK(v) ((v) << 20) v 374 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_TXQ_REFILL_PERIOD_MASK(v) ((v) << 20) v 438 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define MVPP2_GMAC_TX_FIFO_MIN_TH_MASK(v) (((v) << 6) & \ v 1104 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c struct mvpp2_queue_vector *v = port->qvecs + i; v 1106 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c if (v->type != MVPP2_QUEUE_VECTOR_SHARED) v 1109 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_thread_write(port->priv, v->sw_thread_id, v 4408 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c struct mvpp2_queue_vector *v = &port->qvecs[0]; v 4410 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->first_rxq = 0; v 4411 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->nrxqs = port->nrxqs; v 4412 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->type = MVPP2_QUEUE_VECTOR_SHARED; v 4413 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->sw_thread_id = 0; v 4414 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->sw_thread_mask = *cpumask_bits(cpu_online_mask); v 4415 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->port = port; v 4416 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->irq = irq_of_parse_and_map(port_node, 0); v 4417 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c if (v->irq <= 0) v 4419 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c netif_napi_add(port->dev, &v->napi, mvpp2_poll, v 4431 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c struct mvpp2_queue_vector *v; v 4446 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v = port->qvecs + i; v 4448 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->port = port; v 4449 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->type = MVPP2_QUEUE_VECTOR_PRIVATE; v 4450 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->sw_thread_id = i; v 4451 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->sw_thread_mask = BIT(i); v 4459 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->first_rxq = i; v 4460 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->nrxqs = 1; v 4463 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->first_rxq = 0; v 4464 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->nrxqs = port->nrxqs; v 4465 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->type = MVPP2_QUEUE_VECTOR_SHARED; v 4472 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->irq = of_irq_get_byname(port_node, irqname); v 4474 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c v->irq = fwnode_irq_get(port->fwnode, i); v 4475 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c if (v->irq <= 0) { v 4480 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c netif_napi_add(port->dev, &v->napi, mvpp2_poll, v 1109 drivers/net/ethernet/marvell/skge.c u16 v = 0; v 1110 drivers/net/ethernet/marvell/skge.c if (__xm_phy_read(hw, port, reg, &v)) v 1112 drivers/net/ethernet/marvell/skge.c return v; v 1933 drivers/net/ethernet/marvell/skge.c u16 v = 0; v 1934 drivers/net/ethernet/marvell/skge.c if (__gm_phy_read(hw, port, reg, &v)) v 1936 drivers/net/ethernet/marvell/skge.c return v; v 3688 drivers/net/ethernet/marvell/skge.c static int skge_debug_show(struct seq_file *seq, void *v) v 2519 drivers/net/ethernet/marvell/skge.h u32 v; v 2520 drivers/net/ethernet/marvell/skge.h v = skge_read16(hw, SK_XMAC_REG(port, reg)); v 2521 drivers/net/ethernet/marvell/skge.h v |= (u32)skge_read16(hw, SK_XMAC_REG(port, reg+2)) << 16; v 2522 drivers/net/ethernet/marvell/skge.h return v; v 2530 drivers/net/ethernet/marvell/skge.h static inline void xm_write32(const struct skge_hw *hw, int port, int r, u32 v) v 2532 drivers/net/ethernet/marvell/skge.h skge_write16(hw, SK_XMAC_REG(port,r), v & 0xffff); v 2533 drivers/net/ethernet/marvell/skge.h skge_write16(hw, SK_XMAC_REG(port,r+2), v >> 16); v 2536 drivers/net/ethernet/marvell/skge.h static inline void xm_write16(const struct skge_hw *hw, int port, int r, u16 v) v 2538 drivers/net/ethernet/marvell/skge.h skge_write16(hw, SK_XMAC_REG(port,r), v); v 2572 drivers/net/ethernet/marvell/skge.h static inline void gma_write16(const struct skge_hw *hw, int port, int r, u16 v) v 2574 drivers/net/ethernet/marvell/skge.h skge_write16(hw, SK_GMAC_REG(port,r), v); v 206 drivers/net/ethernet/marvell/sky2.c u16 v; v 207 drivers/net/ethernet/marvell/sky2.c __gm_phy_read(hw, port, reg, &v); v 208 drivers/net/ethernet/marvell/sky2.c return v; v 4513 drivers/net/ethernet/marvell/sky2.c static int sky2_debug_show(struct seq_file *seq, void *v) v 2401 drivers/net/ethernet/marvell/sky2.h static inline void gma_write16(const struct sky2_hw *hw, unsigned port, int r, u16 v) v 2403 drivers/net/ethernet/marvell/sky2.h sky2_write16(hw, SK_GMAC_REG(port,r), v); v 38 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c #define DECLARE_MASK_VAL(type, name) struct {type m; type v; } name v 42 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c .v = MLX5_GET(spec, val, fld)} v 46 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c .v = MLX5_GET_BE(type, spec, val, fld)} v 47 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c #define GET_MASKED_VAL(name) (name.m & name.v) v 51 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c name.v = MLX5_GET(type, val, fld), \ v 52 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c name.m & name.v) v 55 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c trace_seq_printf(p, __stringify(name) "=" format " ", name.v); \ v 60 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c (cast)&name.v);\ v 71 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c .v = MLX5_GET(fte_match_set_lyr_2_4, value, smac_47_16) << 16 | v 76 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c .v = MLX5_GET(fte_match_set_lyr_2_4, value, dmac_47_16) << 16 | v 85 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c if (ethertype.v == ETH_P_IP) { v 93 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c PRINT_MASKED_VALP(src_ipv4, typeof(&src_ipv4.v), p, v 95 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c PRINT_MASKED_VALP(dst_ipv4, typeof(&dst_ipv4.v), p, v 97 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c } else if (ethertype.v == ETH_P_IPV6) { v 115 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c memcpy(src_ipv6.v.in6_u.u6_addr8, v 118 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c sizeof(src_ipv6.v)); v 119 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c memcpy(dst_ipv6.v.in6_u.u6_addr8, v 122 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c sizeof(dst_ipv6.v)); v 126 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c &src_ipv6.v); v 129 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c &dst_ipv6.v); v 166 drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c .v = MLX5_GET(fte_match_set_misc, value, gre_key.nvgre.hi) << 8 | v 65 drivers/net/ethernet/mellanox/mlx5/core/en.h #define MLX5_SET_CFG(p, f, v) MLX5_SET(create_flow_group_in, p, f, v) v 123 drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c #define MLX5E_FTE_SET(header_p, fld, v) \ v 124 drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c MLX5_SET(fte_match_set_lyr_2_4, header_p, fld, v) v 275 drivers/net/ethernet/mellanox/mlx5/core/fs_core.h #define fs_get_obj(v, _node) {v = container_of((_node), typeof(*v), node); } v 126 drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c #define MLX5_SET_RA(p, f, v) MLX5_SET(roce_addr_layout, p, f, v) v 87 drivers/net/ethernet/mellanox/mlxsw/pci.c enum mlxsw_pci_cqe_v v; v 453 drivers/net/ethernet/mellanox/mlxsw/pci.c q->u.cq.v = mlxsw_pci->max_cqe_ver; v 456 drivers/net/ethernet/mellanox/mlxsw/pci.c if (q->u.cq.v == MLXSW_PCI_CQE_V2 && v 458 drivers/net/ethernet/mellanox/mlxsw/pci.c q->u.cq.v = MLXSW_PCI_CQE_V1; v 472 drivers/net/ethernet/mellanox/mlxsw/pci.c mlxsw_pci_cqe_owner_set(q->u.cq.v, elem, 1); v 475 drivers/net/ethernet/mellanox/mlxsw/pci.c if (q->u.cq.v == MLXSW_PCI_CQE_V1) v 478 drivers/net/ethernet/mellanox/mlxsw/pci.c else if (q->u.cq.v == MLXSW_PCI_CQE_V2) v 599 drivers/net/ethernet/mellanox/mlxsw/pci.c owner_bit = mlxsw_pci_cqe_owner_get(q->u.cq.v, elem); v 617 drivers/net/ethernet/mellanox/mlxsw/pci.c u8 sendq = mlxsw_pci_cqe_sr_get(q->u.cq.v, cqe); v 618 drivers/net/ethernet/mellanox/mlxsw/pci.c u8 dqn = mlxsw_pci_cqe_dqn_get(q->u.cq.v, cqe); v 636 drivers/net/ethernet/mellanox/mlxsw/pci.c wqe_counter, q->u.cq.v, ncqe); v 648 drivers/net/ethernet/mellanox/mlxsw/pci.c return q->u.cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_COUNT : v 654 drivers/net/ethernet/mellanox/mlxsw/pci.c return q->u.cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_SIZE : v 111 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h static inline u32 mlxsw_pci_cqe_##name##_get(enum mlxsw_pci_cqe_v v, char *cqe) \ v 113 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h switch (v) { \ v 123 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h static inline void mlxsw_pci_cqe_##name##_set(enum mlxsw_pci_cqe_v v, \ v 126 drivers/net/ethernet/mellanox/mlxsw/pci_hw.h switch (v) { \ v 1639 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, svfa, v, 0x00, 0, 1); v 2143 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, pacl, v, 0x00, 24, 1); v 2560 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, ptce2, v, 0x00, 31, 1); v 2818 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, ptce3, v, 0x00, 31, 1); v 6210 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1); v 7653 drivers/net/ethernet/mellanox/mlxsw/reg.h bool v, u16 erif) v 7655 drivers/net/ethernet/mellanox/mlxsw/reg.h mlxsw_reg_rigr2_erif_entry_v_set(payload, index, v); v 7803 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, rmft2, v, 0x00, 31, 1); v 7913 drivers/net/ethernet/mellanox/mlxsw/reg.h mlxsw_reg_rmft2_common_pack(char *payload, bool v, u16 offset, v 7919 drivers/net/ethernet/mellanox/mlxsw/reg.h mlxsw_reg_rmft2_v_set(payload, v); v 7931 drivers/net/ethernet/mellanox/mlxsw/reg.h mlxsw_reg_rmft2_ipv4_pack(char *payload, bool v, u16 offset, u16 virtual_router, v 7936 drivers/net/ethernet/mellanox/mlxsw/reg.h mlxsw_reg_rmft2_common_pack(payload, v, offset, virtual_router, v 7946 drivers/net/ethernet/mellanox/mlxsw/reg.h mlxsw_reg_rmft2_ipv6_pack(char *payload, bool v, u16 offset, u16 virtual_router, v 7952 drivers/net/ethernet/mellanox/mlxsw/reg.h mlxsw_reg_rmft2_common_pack(payload, v, offset, virtual_router, v 219 drivers/net/ethernet/mscc/ocelot_ace.c u32 i, v, m; v 222 drivers/net/ethernet/mscc/ocelot_ace.c v = data[offset / ENTRY_WIDTH]; v 225 drivers/net/ethernet/mscc/ocelot_ace.c v |= m; v 227 drivers/net/ethernet/mscc/ocelot_ace.c v &= ~m; v 228 drivers/net/ethernet/mscc/ocelot_ace.c data[offset / ENTRY_WIDTH] = v; v 234 drivers/net/ethernet/mscc/ocelot_ace.c u32 i, v, m, value = 0; v 237 drivers/net/ethernet/mscc/ocelot_ace.c v = data[offset / ENTRY_WIDTH]; v 239 drivers/net/ethernet/mscc/ocelot_ace.c if (v & m) v 434 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c int v, ret; v 437 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c ret = nfp_decode_basic(addr, &v, cpp_tgt, mode, addr40, isld1, isld0); v 442 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c if (dest_island != -1 && dest_island != v) v 456 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c int i, v; v 459 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c for (v = 0; v < v_max; v++) { v 460 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c if (dest_island != (isld[i] | v)) v 465 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c *addr |= ((u64)v << iid_lsb); v 950 drivers/net/ethernet/nvidia/forcedeth.c static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v) v 953 drivers/net/ethernet/nvidia/forcedeth.c & ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2); v 956 drivers/net/ethernet/nvidia/forcedeth.c static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v) v 37 drivers/net/ethernet/pensando/ionic/ionic_debugfs.c static int identity_show(struct seq_file *seq, void *v) v 75 drivers/net/ethernet/pensando/ionic/ionic_debugfs.c static int q_tail_show(struct seq_file *seq, void *v) v 85 drivers/net/ethernet/pensando/ionic/ionic_debugfs.c static int q_head_show(struct seq_file *seq, void *v) v 95 drivers/net/ethernet/pensando/ionic/ionic_debugfs.c static int cq_tail_show(struct seq_file *seq, void *v) v 219 drivers/net/ethernet/pensando/ionic/ionic_debugfs.c static int netdev_show(struct seq_file *seq, void *v) v 42 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define _major(v) (((v) >> 24) & 0xff) v 43 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define _minor(v) (((v) >> 16) & 0xff) v 44 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define _build(v) ((v) & 0xffff) v 51 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define NETXEN_DECODE_VERSION(v) \ v 52 drivers/net/ethernet/qlogic/netxen/netxen_nic.h NETXEN_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16)) v 295 drivers/net/ethernet/qlogic/netxen/netxen_nic.h #define netxen_set_tx_vlan_tci(cmd_desc, v) \ v 296 drivers/net/ethernet/qlogic/netxen/netxen_nic.h (cmd_desc)->vlan_TCI = cpu_to_le16(v); v 971 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c int i, v, addr; v 978 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c ret = netxen_rom_fast_read(adapter, addr, &v); v 982 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c *ptr32 = cpu_to_le32(v); v 988 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c ret = netxen_rom_fast_read(adapter, addr, &v); v 991 drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c local = cpu_to_le32(v); v 373 drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c int v; v 374 drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c ret = do_rom_fast_read(adapter, addridx, &v); v 377 drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c *(__le32 *)bytes = cpu_to_le32(v); v 47 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define _major(v) (((v) >> 24) & 0xff) v 48 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define _minor(v) (((v) >> 16) & 0xff) v 49 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define _build(v) ((v) & 0xffff) v 56 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define QLCNIC_DECODE_VERSION(v) \ v 57 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16)) v 28 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h #define QLC_83xx_FUNC_VAL(v, f) ((v) & (1 << (f * 4))) v 346 drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c int v; v 347 drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c ret = do_rom_fast_read(adapter, addridx, &v); v 350 drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c *(__le32 *)bytes = cpu_to_le32(v); v 31 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c #define qlcnic_set_tx_vlan_tci(cmd_desc, v) \ v 32 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c (cmd_desc)->vlan_TCI = cpu_to_le16(v); v 100 drivers/net/ethernet/seeq/ether3.c static inline void ether3_outb(int v, void __iomem *r) v 102 drivers/net/ethernet/seeq/ether3.c writeb(v, r); v 106 drivers/net/ethernet/seeq/ether3.c static inline void ether3_outw(int v, void __iomem *r) v 108 drivers/net/ethernet/seeq/ether3.c writew(v, r); v 57 drivers/net/ethernet/seeq/sgiseeq.c #define VIRT_TO_DMA(sp, v) ((sp)->srings_dma + \ v 58 drivers/net/ethernet/seeq/sgiseeq.c (dma_addr_t)((unsigned long)(v) - \ v 182 drivers/net/ethernet/smsc/smc911x.h #define SMC_outl(v, lp, r) \ v 184 drivers/net/ethernet/smsc/smc911x.h writew(v & 0xFFFF, (lp)->base + (r)); \ v 185 drivers/net/ethernet/smsc/smc911x.h writew(v >> 16, (lp)->base + (r) + 2); \ v 192 drivers/net/ethernet/smsc/smc911x.h #define SMC_outl(v, lp, r) writel(v, (lp)->base + (r)) v 782 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_MAC_CSR(lp,a,v) \ v 788 drivers/net/ethernet/smsc/smc911x.h v = SMC_GET_MAC_DATA((lp)); \ v 790 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_MAC_CSR(lp,a,v) \ v 793 drivers/net/ethernet/smsc/smc911x.h SMC_SET_MAC_DATA((lp), v); \ v 822 drivers/net/ethernet/smsc/smc911x.h #define SMC_GET_MII(lp,a,phy,v) \ v 833 drivers/net/ethernet/smsc/smc911x.h SMC_GET_MII_DATA((lp), v); \ v 835 drivers/net/ethernet/smsc/smc911x.h #define SMC_SET_MII(lp,a,phy,v) \ v 841 drivers/net/ethernet/smsc/smc911x.h SMC_SET_MII_DATA((lp), v); \ v 70 drivers/net/ethernet/smsc/smc91c92_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 262 drivers/net/ethernet/smsc/smc91c92_cs.c #define set_bits(v, p) outw(inw(p)|(v), (p)) v 263 drivers/net/ethernet/smsc/smc91c92_cs.c #define mask_bits(v, p) outw(inw(p)&(v), (p)) v 77 drivers/net/ethernet/smsc/smc91x.h #define SMC_outb(v, a, r) writeb(v, (a) + (r)) v 78 drivers/net/ethernet/smsc/smc91x.h #define SMC_outw(lp, v, a, r) \ v 80 drivers/net/ethernet/smsc/smc91x.h unsigned int __v = v, __smc_r = r; \ v 89 drivers/net/ethernet/smsc/smc91x.h #define SMC_outl(v, a, r) writel(v, (a) + (r)) v 103 drivers/net/ethernet/smsc/smc91x.h unsigned int v = val << 16; v 104 drivers/net/ethernet/smsc/smc91x.h v |= readl(ioaddr + (reg & ~2)) & 0xffff; v 105 drivers/net/ethernet/smsc/smc91x.h writel(v, ioaddr + (reg & ~2)); v 111 drivers/net/ethernet/smsc/smc91x.h #define __SMC_outw(lp, v, a, r) \ v 112 drivers/net/ethernet/smsc/smc91x.h _SMC_outw_align4((v), (a), (r), \ v 126 drivers/net/ethernet/smsc/smc91x.h #define SMC_outb(v, a, r) outb(v, (a) + (r) - 0xa0000000) v 127 drivers/net/ethernet/smsc/smc91x.h #define SMC_outw(lp, v, a, r) outw(v, (a) + (r) - 0xa0000000) v 128 drivers/net/ethernet/smsc/smc91x.h #define SMC_outl(v, a, r) outl(v, (a) + (r) - 0xa0000000) v 146 drivers/net/ethernet/smsc/smc91x.h #define SMC_outb(v, a, r) writeb(v, (a) + (r)) v 147 drivers/net/ethernet/smsc/smc91x.h #define SMC_outw(lp, v, a, r) writew(v, (a) + (r)) v 148 drivers/net/ethernet/smsc/smc91x.h #define SMC_outl(v, a, r) writel(v, (a) + (r)) v 179 drivers/net/ethernet/smsc/smc91x.h #define SMC_outw(lp, v, a, r) writew(_swapw(v), (a) + (r)) v 192 drivers/net/ethernet/smsc/smc91x.h #define SMC_outb(v, a, r) iowrite8(v, (a) + (r)) v 212 drivers/net/ethernet/smsc/smc91x.h #define SMC_outb(v, a, r) iowrite8(v, (a) + (r)) v 213 drivers/net/ethernet/smsc/smc91x.h #define SMC_outw(lp, v, a, r) iowrite16(v, (a) + (r)) v 214 drivers/net/ethernet/smsc/smc91x.h #define SMC_outl(v, a, r) iowrite32(v, (a) + (r)) v 350 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 352 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_TX_CTL1); v 353 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_DMA_START; v 354 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_DMA_EN; v 355 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_TX_CTL1); v 360 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 362 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_TX_CTL1); v 363 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_DMA_START; v 364 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_DMA_EN; v 365 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_TX_CTL1); v 370 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 372 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_TX_CTL1); v 373 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_TX_DMA_EN; v 374 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_TX_CTL1); v 379 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 381 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_RX_CTL1); v 382 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_DMA_START; v 383 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_DMA_EN; v 384 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_RX_CTL1); v 389 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 391 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_RX_CTL1); v 392 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_RX_DMA_EN; v 393 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_RX_CTL1); v 399 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 402 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_INT_STA); v 404 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_TX_INT) { v 409 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_TX_DMA_STOP_INT) v 412 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_TX_BUF_UA_INT) v 415 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_TX_TIMEOUT_INT) v 418 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_TX_UNDERFLOW_INT) { v 423 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_TX_EARLY_INT) v 426 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_RX_INT) { v 431 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_RX_BUF_UA_INT) v 434 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_RX_DMA_STOP_INT) v 437 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_RX_TIMEOUT_INT) v 440 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_RX_OVERFLOW_INT) { v 445 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_RX_EARLY_INT) v 448 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c if (v & EMAC_RGMII_STA_INT) v 451 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_INT_STA); v 459 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 461 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_RX_CTL1); v 463 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_MD; v 465 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_RX_MD; v 466 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_RX_TH_MASK; v 468 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_TH_32; v 470 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_TH_64; v 472 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_TH_96; v 474 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_TH_128; v 476 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_RX_CTL1); v 482 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 484 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_TX_CTL1); v 486 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_MD; v 492 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_NEXT_FRM; v 494 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_TX_MD; v 495 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_TX_TH_MASK; v 497 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_TH_64; v 499 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_TH_128; v 501 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_TH_192; v 503 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_TH_256; v 505 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_TX_CTL1); v 554 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 556 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = (8 << EMAC_BURSTLEN_SHIFT); /* burst len */ v 557 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_BASIC_CTL1); v 586 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 596 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_MACADDR_HI(reg_n)); v 597 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= MAC_ADDR_TYPE_DST; v 598 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_MACADDR_HI(reg_n)); v 616 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 618 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_RX_CTL0); v 619 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_DO_CRC; v 620 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_RX_CTL0); v 629 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 634 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = EMAC_FRM_FLT_CTL; v 637 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = EMAC_FRM_FLT_RXALL; v 639 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_FRM_FLT_MULTICAST; v 656 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = EMAC_FRM_FLT_RXALL; v 663 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_RX_FRM_FLT); v 671 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 673 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_RX_CTL0); v 675 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_RX_FLOW_CTL_EN; v 677 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_RX_FLOW_CTL_EN; v 678 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_RX_CTL0); v 680 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(ioaddr + EMAC_TX_FLOW_CTL); v 682 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v |= EMAC_TX_FLOW_CTL_EN; v 684 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v &= ~EMAC_TX_FLOW_CTL_EN; v 685 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v, ioaddr + EMAC_TX_FLOW_CTL); v 690 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c u32 v; v 693 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c v = readl(priv->ioaddr + EMAC_BASIC_CTL1); v 694 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c writel(v | 0x01, priv->ioaddr + EMAC_BASIC_CTL1); v 699 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c err = readl_poll_timeout(priv->ioaddr + EMAC_BASIC_CTL1, v, v 700 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c !(v & 0x01), 100, 100000); v 4063 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c static int stmmac_rings_status_show(struct seq_file *seq, void *v) v 4110 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c static int stmmac_dma_cap_show(struct seq_file *seq, void *v) v 163 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c u32 v; v 184 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c if (readl_poll_timeout(priv->ioaddr + mii_address, v, !(v & MII_BUSY), v 191 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c if (readl_poll_timeout(priv->ioaddr + mii_address, v, !(v & MII_BUSY), v 218 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c u32 v; v 243 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c if (readl_poll_timeout(priv->ioaddr + mii_address, v, !(v & MII_BUSY), v 252 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c return readl_poll_timeout(priv->ioaddr + mii_address, v, !(v & MII_BUSY), v 2587 drivers/net/ethernet/sun/niu.h #define MRVL88X2011_LED(n,v) ((v)<<((n)*4)) v 2588 drivers/net/ethernet/sun/niu.h #define MRVL88X2011_LED_STAT(n,v) ((v)>>((n)*4)) v 30 drivers/net/ethernet/ti/cpts.c #define cpts_write32(c, v, r) writel_relaxed(v, &c->reg->r) v 176 drivers/net/ethernet/ti/davinci_cpdma.c #define dma_reg_write(ctlr, ofs, v) writel(v, (ctlr)->dmaregs + (ofs)) v 177 drivers/net/ethernet/ti/davinci_cpdma.c #define chan_write(chan, fld, v) writel(v, (chan)->fld) v 178 drivers/net/ethernet/ti/davinci_cpdma.c #define desc_write(desc, fld, v) writel((u32)(v), &(desc)->fld) v 2203 drivers/net/ethernet/ti/netcp_ethss.c u32 i, v; v 2210 drivers/net/ethernet/ti/netcp_ethss.c v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset)); v 2211 drivers/net/ethernet/ti/netcp_ethss.c if ((v & SOFT_RESET_MASK) != SOFT_RESET) v 29 drivers/net/ethernet/ti/netcp_xgbepcsr.c #define VAL_SH(v, s) (v << s) v 390 drivers/net/ethernet/xilinx/ll_temac.h #define temac_iow(lp, o, v) ((lp)->temac_iow(lp, o, v)) v 235 drivers/net/ethernet/xircom/xirc2ps_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 2933 drivers/net/fddi/defxx.c unsigned long v; v 2935 drivers/net/fddi/defxx.c v = ALIGN(x, n); /* Where we want to be */ v 2937 drivers/net/fddi/defxx.c skb_reserve(skb, v - x); v 107 drivers/net/fddi/defza.c static inline void fza_skb_align(struct sk_buff *skb, unsigned int v) v 112 drivers/net/fddi/defza.c y = ALIGN(x, v); v 26 drivers/net/fjes/fjes_debugfs.c static int fjes_dbg_status_show(struct seq_file *m, void *v) v 372 drivers/net/hamradio/bpqether.c static void *bpq_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 375 drivers/net/hamradio/bpqether.c struct bpqdev *bpqdev = v; v 379 drivers/net/hamradio/bpqether.c if (v == SEQ_START_TOKEN) v 388 drivers/net/hamradio/bpqether.c static void bpq_seq_stop(struct seq_file *seq, void *v) v 395 drivers/net/hamradio/bpqether.c static int bpq_seq_show(struct seq_file *seq, void *v) v 397 drivers/net/hamradio/bpqether.c if (v == SEQ_START_TOKEN) v 401 drivers/net/hamradio/bpqether.c const struct bpqdev *bpqdev = v; v 1994 drivers/net/hamradio/scc.c static void *scc_net_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1997 drivers/net/hamradio/scc.c struct scc_channel *scc = v; v 2000 drivers/net/hamradio/scc.c for (k = (v == SEQ_START_TOKEN) ? 0 : (scc - SCC_Info)+1; v 2008 drivers/net/hamradio/scc.c static void scc_net_seq_stop(struct seq_file *seq, void *v) v 2012 drivers/net/hamradio/scc.c static int scc_net_seq_show(struct seq_file *seq, void *v) v 2014 drivers/net/hamradio/scc.c if (v == SEQ_START_TOKEN) { v 2021 drivers/net/hamradio/scc.c const struct scc_channel *scc = v; v 786 drivers/net/hamradio/yam.c static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 792 drivers/net/hamradio/yam.c static void yam_seq_stop(struct seq_file *seq, void *v) v 796 drivers/net/hamradio/yam.c static int yam_seq_show(struct seq_file *seq, void *v) v 798 drivers/net/hamradio/yam.c struct net_device *dev = v; v 216 drivers/net/phy/bcm7xxx.c int v, ret; v 218 drivers/net/phy/bcm7xxx.c v = phy_read(dev, location); v 219 drivers/net/phy/bcm7xxx.c if (v < 0) v 220 drivers/net/phy/bcm7xxx.c return v; v 222 drivers/net/phy/bcm7xxx.c v &= ~clr_mask; v 223 drivers/net/phy/bcm7xxx.c v |= set_mask; v 225 drivers/net/phy/bcm7xxx.c ret = phy_write(dev, location, v); v 229 drivers/net/phy/bcm7xxx.c return v; v 134 drivers/net/phy/mdio-mux.c int v; v 136 drivers/net/phy/mdio-mux.c r = of_property_read_u32(child_bus_node, "reg", &v); v 149 drivers/net/phy/mdio-mux.c cb->bus_number = v; v 162 drivers/net/phy/mdio-mux.c pb->parent_id, v); v 244 drivers/net/phy/sfp.c unsigned int i, state, v; v 250 drivers/net/phy/sfp.c v = gpiod_get_value_cansleep(sfp->gpio[i]); v 251 drivers/net/phy/sfp.c if (v) v 583 drivers/net/ppp/bsd_comp.c #define PUTBYTE(v) \ v 588 drivers/net/ppp/bsd_comp.c *wptr++ = (unsigned char) (v); \ v 1013 drivers/net/ppp/pppoe.c static int pppoe_seq_show(struct seq_file *seq, void *v) v 1018 drivers/net/ppp/pppoe.c if (v == SEQ_START_TOKEN) { v 1023 drivers/net/ppp/pppoe.c po = v; v 1060 drivers/net/ppp/pppoe.c static void *pppoe_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1066 drivers/net/ppp/pppoe.c if (v == SEQ_START_TOKEN) { v 1070 drivers/net/ppp/pppoe.c po = v; v 1088 drivers/net/ppp/pppoe.c static void pppoe_seq_stop(struct seq_file *seq, void *v) v 1009 drivers/net/slip/slip.c unsigned short v = 0; v 1025 drivers/net/slip/slip.c v = (v << 8) | s[i]; v 1029 drivers/net/slip/slip.c c = 0x30 + ((v >> bits) & 0x3F); v 1034 drivers/net/slip/slip.c c = 0x30 + ((v << (6 - bits)) & 0x3F); v 331 drivers/net/usb/asix_common.c __le16 v; v 332 drivers/net/usb/asix_common.c int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v, in_pm); v 338 drivers/net/usb/asix_common.c ret = le16_to_cpu(v); v 358 drivers/net/usb/asix_common.c __le16 v; v 360 drivers/net/usb/asix_common.c 0, 0, 2, &v, in_pm); v 368 drivers/net/usb/asix_common.c return le16_to_cpu(v); v 984 drivers/net/usb/pegasus.c static void pegasus_set_msglevel(struct net_device *dev, u32 v) v 987 drivers/net/usb/pegasus.c pegasus->msg_enable = v; v 222 drivers/net/usb/sr9800.c __le16 v; v 225 drivers/net/usb/sr9800.c ret = sr_read_cmd(dev, SR_CMD_READ_RX_CTL, 0, 0, 2, &v); v 232 drivers/net/usb/sr9800.c ret = le16_to_cpu(v); v 253 drivers/net/usb/sr9800.c __le16 v; v 256 drivers/net/usb/sr9800.c ret = sr_read_cmd(dev, SR_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v); v 263 drivers/net/usb/sr9800.c return le16_to_cpu(v); v 2607 drivers/net/virtio_net.c u16 v; v 2610 drivers/net/virtio_net.c struct virtio_net_config, status, &v) < 0) v 2613 drivers/net/virtio_net.c if (v & VIRTIO_NET_S_ANNOUNCE) { v 2619 drivers/net/virtio_net.c v &= VIRTIO_NET_S_LINK_UP; v 2621 drivers/net/virtio_net.c if (vi->status == v) v 2624 drivers/net/virtio_net.c vi->status = v; v 652 drivers/net/wan/lmc/lmc_media.c av->v = 1; v 656 drivers/net/wan/lmc/lmc_media.c write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); v 668 drivers/net/wan/lmc/lmc_media.c write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); v 835 drivers/net/wan/lmc/lmc_media.c static void write_av9110(lmc_softc_t *sc, u32 n, u32 m, u32 v, u32 x, u32 r) v 841 drivers/net/wan/lmc/lmc_media.c LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r); v 866 drivers/net/wan/lmc/lmc_media.c write_av9110_bit (sc, v >> i); v 153 drivers/net/wan/lmc/lmc_var.h u32 v; v 250 drivers/net/wireless/ath/ath10k/bmi.h __le32 v = __cpu_to_le32(val); \ v 254 drivers/net/wireless/ath/ath10k/bmi.h (u8 *)&v, sizeof(v)); \ v 3483 drivers/net/wireless/ath/ath10k/wmi.c u32 v, tim_len; v 3504 drivers/net/wireless/ath/ath10k/wmi.c v = __le32_to_cpu(t); v 3505 drivers/net/wireless/ath/ath10k/wmi.c arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; v 200 drivers/net/wireless/ath/ath5k/debug.c unsigned int v; v 203 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_BEACON); v 206 drivers/net/wireless/ath/ath5k/debug.c "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD, v 207 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S); v 215 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_TIMER0); v 217 drivers/net/wireless/ath/ath5k/debug.c "AR5K_TIMER0 (TBTT)", v, v); v 219 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_TIMER1); v 221 drivers/net/wireless/ath/ath5k/debug.c "AR5K_TIMER1 (DMA)", v, v >> 3); v 223 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_TIMER2); v 225 drivers/net/wireless/ath/ath5k/debug.c "AR5K_TIMER2 (SWBA)", v, v >> 3); v 227 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_TIMER3); v 229 drivers/net/wireless/ath/ath5k/debug.c "AR5K_TIMER3 (ATIM)", v, v); v 384 drivers/net/wireless/ath/ath5k/debug.c unsigned int v; v 402 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA); v 404 drivers/net/wireless/ath/ath5k/debug.c "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v); v 406 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_STA_ID1); v 409 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0); v 412 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_STA_ID1_DESC_ANTENNA) != 0); v 415 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_STA_ID1_RTS_DEF_ANTENNA) != 0); v 418 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0); v 420 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL); v 423 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0); v 425 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_PHY_RESTART); v 428 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S); v 430 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_PHY_FAST_ANT_DIV); v 433 drivers/net/wireless/ath/ath5k/debug.c (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0); v 435 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_0); v 437 drivers/net/wireless/ath/ath5k/debug.c "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v); v 438 drivers/net/wireless/ath/ath5k/debug.c v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_1); v 440 drivers/net/wireless/ath/ath5k/debug.c "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v); v 229 drivers/net/wireless/ath/ath6kl/bmi.h __le32 v; \ v 232 drivers/net/wireless/ath/ath6kl/bmi.h v = cpu_to_le32(val); \ v 233 drivers/net/wireless/ath/ath6kl/bmi.h ath6kl_bmi_write(ar, addr, (u8 *) &v, sizeof(v)); \ v 133 drivers/net/wireless/ath/ath6kl/target.h #define SM(f, v) (((v) << f##_S) & f) v 134 drivers/net/wireless/ath/ath6kl/target.h #define MS(f, v) (((v) & f) >> f##_S) v 99 drivers/net/wireless/ath/carl9170/cmd.c int carl9170_echo_test(struct ar9170 *ar, const u32 v) v 105 drivers/net/wireless/ath/carl9170/cmd.c 4, (u8 *)&v, v 110 drivers/net/wireless/ath/carl9170/cmd.c if (v != echores) { v 111 drivers/net/wireless/ath/carl9170/cmd.c wiphy_info(ar->hw->wiphy, "wrong echo %x != %x", v, echores); v 49 drivers/net/wireless/ath/carl9170/cmd.h int carl9170_echo_test(struct ar9170 *ar, u32 v); v 87 drivers/net/wireless/ath/carl9170/cmd.h #define carl9170_regwrite(r, v) do { \ v 89 drivers/net/wireless/ath/carl9170/cmd.h __ar->cmd_buf[2 * __nreg + 2] = cpu_to_le32(v); \ v 153 drivers/net/wireless/ath/carl9170/cmd.h #define carl9170_async_regwrite(r, v) do { \ v 157 drivers/net/wireless/ath/carl9170/cmd.h __cmd->wreg.regs[__nreg].val = cpu_to_le32(v); \ v 406 drivers/net/wireless/ath/carl9170/mac.c u32 v = 0; v 420 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_BCN_DTIM, v, v 426 drivers/net/wireless/ath/carl9170/mac.c v |= AR9170_MAC_BCN_IBSS_MODE; v 429 drivers/net/wireless/ath/carl9170/mac.c v |= AR9170_MAC_BCN_AP_MODE; v 438 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_BCN_DTIM, v, v 441 drivers/net/wireless/ath/carl9170/mac.c v |= AR9170_MAC_BCN_STA_PS | v 463 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_BCN_PERIOD, v, ar->global_beacon_int); v 469 drivers/net/wireless/ath/carl9170/mac.c carl9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v); v 90 drivers/net/wireless/ath/wil6210/debugfs.c u32 v; v 109 drivers/net/wireless/ath/wil6210/debugfs.c v = readl_relaxed(x); v 111 drivers/net/wireless/ath/wil6210/debugfs.c v = (ring_id % 2 ? (v >> 16) : (v & 0xffff)); v 112 drivers/net/wireless/ath/wil6210/debugfs.c seq_printf(s, " hwhead = %u\n", v); v 117 drivers/net/wireless/ath/wil6210/debugfs.c v = readl(x); v 118 drivers/net/wireless/ath/wil6210/debugfs.c seq_printf(s, "0x%08x = %d\n", v, v); v 209 drivers/net/wireless/ath/wil6210/debugfs.c u32 v; v 224 drivers/net/wireless/ath/wil6210/debugfs.c v = readl_relaxed(x); v 226 drivers/net/wireless/ath/wil6210/debugfs.c v = (sring_idx % 2 ? (v >> 16) : (v & 0xffff)); v 227 drivers/net/wireless/ath/wil6210/debugfs.c seq_printf(s, " hwhead = %u\n", v); v 232 drivers/net/wireless/ath/wil6210/debugfs.c v = readl_relaxed(x); v 233 drivers/net/wireless/ath/wil6210/debugfs.c seq_printf(s, "0x%08x = %d\n", v, v); v 315 drivers/net/wireless/ath/wil6210/fw_inc.c u32 v; v 336 drivers/net/wireless/ath/wil6210/fw_inc.c v = le32_to_cpu(d->value); v 338 drivers/net/wireless/ath/wil6210/fw_inc.c le32_to_cpu(d->addr), v, s); v 339 drivers/net/wireless/ath/wil6210/fw_inc.c wil_memset_toio_32(dst, v, s); v 387 drivers/net/wireless/ath/wil6210/fw_inc.c u32 v = le32_to_cpu(block[i].value); v 394 drivers/net/wireless/ath/wil6210/fw_inc.c y = (x & m) | (v & ~m); v 397 drivers/net/wireless/ath/wil6210/fw_inc.c le32_to_cpu(block[i].addr), y, x, v, m); v 477 drivers/net/wireless/ath/wil6210/fw_inc.c u32 v = le32_to_cpu(block[i].value); v 480 drivers/net/wireless/ath/wil6210/fw_inc.c i, a, v); v 482 drivers/net/wireless/ath/wil6210/fw_inc.c writel(v, gwa_val); v 546 drivers/net/wireless/ath/wil6210/fw_inc.c u32 v[ARRAY_SIZE(block->value)]; v 549 drivers/net/wireless/ath/wil6210/fw_inc.c v[k] = le32_to_cpu(block[i].value[k]); v 552 drivers/net/wireless/ath/wil6210/fw_inc.c wil_hex_dump_fw(" val ", DUMP_PREFIX_NONE, 16, 4, v, v 553 drivers/net/wireless/ath/wil6210/fw_inc.c sizeof(v), false); v 556 drivers/net/wireless/ath/wil6210/fw_inc.c writel(v[k], gwa_val[k]); v 622 drivers/net/wireless/ath/wil6210/txrx.c struct wil_ring *v = &wil->ring_rx; v 628 drivers/net/wireless/ath/wil6210/txrx.c for (; next_tail = wil_ring_next_tail(v), v 629 drivers/net/wireless/ath/wil6210/txrx.c (next_tail != v->swhead) && (count-- > 0); v 630 drivers/net/wireless/ath/wil6210/txrx.c v->swtail = next_tail) { v 631 drivers/net/wireless/ath/wil6210/txrx.c rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom); v 634 drivers/net/wireless/ath/wil6210/txrx.c rc, v->swtail); v 644 drivers/net/wireless/ath/wil6210/txrx.c wil_w(wil, v->hwtail, v->swtail); v 1041 drivers/net/wireless/ath/wil6210/txrx.c struct wil_ring *v = &wil->ring_rx; v 1044 drivers/net/wireless/ath/wil6210/txrx.c if (unlikely(!v->va)) { v 1049 drivers/net/wireless/ath/wil6210/txrx.c while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) { v 1064 drivers/net/wireless/ath/wil6210/txrx.c wil_rx_refill(wil, v->size); v 1451 drivers/net/wireless/ath/wil6210/txrx.c struct wil_ring *v = &wil->ring_tx[i]; v 1456 drivers/net/wireless/ath/wil6210/txrx.c if (v->va && txdata->enabled) { v 1457 drivers/net/wireless/ath/wil6210/txrx.c return v; v 1526 drivers/net/wireless/ath/wil6210/txrx.c struct wil_ring *v; v 1532 drivers/net/wireless/ath/wil6210/txrx.c v = &wil->ring_tx[i]; v 1534 drivers/net/wireless/ath/wil6210/txrx.c if (!v->va || !txdata->enabled) v 1540 drivers/net/wireless/ath/wil6210/txrx.c return v; v 1556 drivers/net/wireless/ath/wil6210/txrx.c struct wil_ring *v, *v2; v 1566 drivers/net/wireless/ath/wil6210/txrx.c v = &wil->ring_tx[i]; v 1568 drivers/net/wireless/ath/wil6210/txrx.c if (!v->va || !txdata->enabled || txdata->mid != vif->mid) v 1621 drivers/net/wireless/ath/wil6210/txrx.c return v; v 1081 drivers/net/wireless/ath/wil6210/wil6210.h #define vif_to_wil(v) (v->wil) v 1082 drivers/net/wireless/ath/wil6210/wil6210.h #define vif_to_ndev(v) (v->ndev) v 1083 drivers/net/wireless/ath/wil6210/wil6210.h #define vif_to_wdev(v) (&v->wdev) v 1403 drivers/net/wireless/atmel/atmel.c static int atmel_proc_show(struct seq_file *m, void *v) v 132 drivers/net/wireless/broadcom/b43/lo.c u16 reg, v, padmix; v 135 drivers/net/wireless/broadcom/b43/lo.c v = 0x30; v 146 drivers/net/wireless/broadcom/b43/lo.c v = 0x10; v 150 drivers/net/wireless/broadcom/b43/lo.c v = 0x30; v 155 drivers/net/wireless/broadcom/b43/lo.c *value = v; v 3464 drivers/net/wireless/broadcom/b43/main.c u32 v, backup0, backup4; v 3507 drivers/net/wireless/broadcom/b43/main.c v = b43_read32(dev, B43_MMIO_MACCTL); v 3508 drivers/net/wireless/broadcom/b43/main.c v |= B43_MACCTL_GMODE; v 3509 drivers/net/wireless/broadcom/b43/main.c if (v != (B43_MACCTL_GMODE | B43_MACCTL_IHR_ENABLED)) v 226 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c u32 v, bar0 = addr & SBSDIO_SBWINDOW_MASK; v 232 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c v = bar0 >> 8; v 234 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c for (i = 0 ; i < 3 && !err ; i++, v >>= 8) v 236 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c v & 0xff, &err); v 293 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h #define brcmf_sdiod_func0_wb(sdiodev, addr, v, ret) \ v 294 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h sdio_f0_writeb((sdiodev)->func1, (v), (addr), (ret)) v 300 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h #define brcmf_sdiod_writeb(sdiodev, addr, v, ret) \ v 301 drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h sdio_writeb((sdiodev)->func1, (v), (addr), (ret)) v 658 drivers/net/wireless/broadcom/brcm80211/brcmsmac/d11.h #define PHY_TYPE(v) ((v & PV_PT_MASK) >> PV_PT_SHIFT) v 750 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c static void brcms_b_core_ioctl(struct brcms_hardware *wlc_hw, u32 m, u32 v) v 755 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c bcma_awrite32(core, BCMA_IOCTL, ioctl | v); v 1604 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c u16 v; v 1609 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v = SYNTHPU_DLY_LPPHY_US; v 1611 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v = SYNTHPU_DLY_NPHY_US; v 1613 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v = SYNTHPU_DLY_BPHY_US; v 1615 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v); v 1947 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c bool v, clk, xtal; v 1976 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v = ((bcma_read32(wlc_hw->d11core, v 1986 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c return v; v 2933 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v, v 2944 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c bcma_wflush16(core, objoff, v); v 2960 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v) v 2962 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); v 2975 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c u16 v; v 2983 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v = p[i] | (p[i + 1] << 8); v 2984 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c brcms_b_write_objmem(wlc_hw, offset + i, v, sel); v 2998 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c u16 v; v 3006 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c v = brcms_b_read_objmem(wlc_hw, offset + i, sel); v 3007 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c p[i] = v & 0xFF; v 3008 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c p[i + 1] = (v >> 8) & 0xFF; v 641 drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v); v 1045 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h #define wlc_nphy_table_data_write(pi, w, v) \ v 1046 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h wlc_phy_table_data_write((pi), (w), (v)) v 99 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c void wlapi_bmac_write_shm(struct phy_shim_info *physhim, uint offset, u16 v) v 101 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c brcms_b_write_shm(physhim->wlc_hw, offset, v); v 143 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.h void wlapi_bmac_write_shm(struct phy_shim_info *physhim, uint offset, u16 v); v 259 drivers/net/wireless/broadcom/brcm80211/brcmsmac/types.h #define bcma_wflush16(c, o, v) \ v 260 drivers/net/wireless/broadcom/brcm80211/brcmsmac/types.h ({ bcma_write16(c, o, v); (void)bcma_read16(c, o); }) v 262 drivers/net/wireless/broadcom/brcm80211/brcmsmac/types.h #define bcma_wflush16(c, o, v) bcma_write16(c, o, v) v 3291 drivers/net/wireless/cisco/airo.c __le16 fc, v, *buffer, tmpbuf[4]; v 3349 drivers/net/wireless/cisco/airo.c bap_read(ai, &v, sizeof(v), BAP0); v 3350 drivers/net/wireless/cisco/airo.c gap = le16_to_cpu(v); v 4867 drivers/net/wireless/cisco/airo.c int v, i = 0, k = 0; /* i is index into line, v 4871 drivers/net/wireless/cisco/airo.c while((v = get_dec_u16(line, &i, 3))!=-1) { v 4872 drivers/net/wireless/cisco/airo.c ai->config.rates[k++] = (u8)v; v 4878 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4880 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, i+3); v 4881 drivers/net/wireless/cisco/airo.c if ( v != -1 ) { v 4882 drivers/net/wireless/cisco/airo.c ai->config.channelSet = cpu_to_le16(v); v 4886 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4888 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, i+3); v 4889 drivers/net/wireless/cisco/airo.c if ( v != -1 ) { v 4890 drivers/net/wireless/cisco/airo.c ai->config.txPower = cpu_to_le16(v); v 4908 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4911 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, 3); v 4912 drivers/net/wireless/cisco/airo.c v = (v<0) ? 0 : ((v>255) ? 255 : v); v 4913 drivers/net/wireless/cisco/airo.c ai->config.longRetryLimit = cpu_to_le16(v); v 4916 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4919 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, 3); v 4920 drivers/net/wireless/cisco/airo.c v = (v<0) ? 0 : ((v>255) ? 255 : v); v 4921 drivers/net/wireless/cisco/airo.c ai->config.shortRetryLimit = cpu_to_le16(v); v 4924 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4927 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, 4); v 4928 drivers/net/wireless/cisco/airo.c v = (v<0) ? 0 : ((v>AIRO_DEF_MTU) ? AIRO_DEF_MTU : v); v 4929 drivers/net/wireless/cisco/airo.c ai->config.rtsThres = cpu_to_le16(v); v 4932 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4935 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, 5); v 4936 drivers/net/wireless/cisco/airo.c v = (v<0) ? 0 : v; v 4937 drivers/net/wireless/cisco/airo.c ai->config.txLifetime = cpu_to_le16(v); v 4940 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4943 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, 5); v 4944 drivers/net/wireless/cisco/airo.c v = (v<0) ? 0 : v; v 4945 drivers/net/wireless/cisco/airo.c ai->config.rxLifetime = cpu_to_le16(v); v 4958 drivers/net/wireless/cisco/airo.c int v, i = 0; v 4961 drivers/net/wireless/cisco/airo.c v = get_dec_u16(line, &i, 4); v 4962 drivers/net/wireless/cisco/airo.c v = (v<256) ? 256 : ((v>AIRO_DEF_MTU) ? AIRO_DEF_MTU : v); v 4963 drivers/net/wireless/cisco/airo.c v = v & 0xfffe; /* Make sure its even */ v 4964 drivers/net/wireless/cisco/airo.c ai->config.fragThresh = cpu_to_le16(v); v 6762 drivers/net/wireless/cisco/airo.c __le16 v = cpu_to_le16(vwrq->value); v 6776 drivers/net/wireless/cisco/airo.c if (v == cap_rid.txPowerLevels[i]) { v 6778 drivers/net/wireless/cisco/airo.c local->config.txPower = v; v 6823 drivers/net/wireless/cisco/airo.c __le16 v = cpu_to_le16(vwrq->value); v 6825 drivers/net/wireless/cisco/airo.c local->config.longRetryLimit = v; v 6827 drivers/net/wireless/cisco/airo.c local->config.shortRetryLimit = v; v 6830 drivers/net/wireless/cisco/airo.c local->config.longRetryLimit = v; v 6831 drivers/net/wireless/cisco/airo.c local->config.shortRetryLimit = v; v 2194 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_HANDLER(v, f) { v, f, # v } v 2201 drivers/net/wireless/intel/ipw2x00/ipw2100.c #define IPW2100_HANDLER(v, f) { v, f } v 3431 drivers/net/wireless/intel/ipw2x00/ipw2100.c void *v; v 3442 drivers/net/wireless/intel/ipw2x00/ipw2100.c v = pci_zalloc_consistent(priv->pci_dev, v 3445 drivers/net/wireless/intel/ipw2x00/ipw2100.c if (!v) { v 3455 drivers/net/wireless/intel/ipw2x00/ipw2100.c (struct ipw2100_cmd_header *)v; v 4418 drivers/net/wireless/intel/ipw2x00/ipw2100.c void *v; v 4439 drivers/net/wireless/intel/ipw2x00/ipw2100.c v = pci_alloc_consistent(priv->pci_dev, v 4442 drivers/net/wireless/intel/ipw2x00/ipw2100.c if (!v) { v 4452 drivers/net/wireless/intel/ipw2x00/ipw2100.c (struct ipw2100_data_header *)v; v 2446 drivers/net/wireless/intel/ipw2x00/ipw2200.c __le32 v = cpu_to_le32(phy_off); v 2452 drivers/net/wireless/intel/ipw2x00/ipw2200.c return ipw_send_cmd_pdu(priv, IPW_CMD_CARD_DISABLE, sizeof(v), &v); v 213 drivers/net/wireless/intel/ipw2x00/libipw_module.c static int debug_level_proc_show(struct seq_file *m, void *v) v 1026 drivers/net/wireless/intel/iwlwifi/pcie/internal.h u32 v; v 1032 drivers/net/wireless/intel/iwlwifi/pcie/internal.h v = iwl_read32(trans, reg); v 1033 drivers/net/wireless/intel/iwlwifi/pcie/internal.h v &= ~mask; v 1034 drivers/net/wireless/intel/iwlwifi/pcie/internal.h v |= value; v 1035 drivers/net/wireless/intel/iwlwifi/pcie/internal.h iwl_write32(trans, reg, v); v 70 drivers/net/wireless/intersil/hostap/hostap_ap.c static int ap_debug_proc_show(struct seq_file *m, void *v) v 321 drivers/net/wireless/intersil/hostap/hostap_ap.c static int ap_control_proc_show(struct seq_file *m, void *v) v 327 drivers/net/wireless/intersil/hostap/hostap_ap.c if (v == SEQ_START_TOKEN) { v 348 drivers/net/wireless/intersil/hostap/hostap_ap.c entry = v; v 360 drivers/net/wireless/intersil/hostap/hostap_ap.c static void *ap_control_proc_next(struct seq_file *m, void *v, loff_t *_pos) v 363 drivers/net/wireless/intersil/hostap/hostap_ap.c return seq_list_next(v, &ap->mac_restrictions.mac_list, _pos); v 366 drivers/net/wireless/intersil/hostap/hostap_ap.c static void ap_control_proc_stop(struct seq_file *m, void *v) v 519 drivers/net/wireless/intersil/hostap/hostap_ap.c static int prism2_ap_proc_show(struct seq_file *m, void *v) v 521 drivers/net/wireless/intersil/hostap/hostap_ap.c struct sta_info *sta = v; v 524 drivers/net/wireless/intersil/hostap/hostap_ap.c if (v == SEQ_START_TOKEN) { v 562 drivers/net/wireless/intersil/hostap/hostap_ap.c static void *prism2_ap_proc_next(struct seq_file *m, void *v, loff_t *_pos) v 565 drivers/net/wireless/intersil/hostap/hostap_ap.c return seq_list_next(v, &ap->sta_list, _pos); v 568 drivers/net/wireless/intersil/hostap/hostap_ap.c static void prism2_ap_proc_stop(struct seq_file *m, void *v) v 993 drivers/net/wireless/intersil/hostap/hostap_ap.c static int prism2_sta_proc_show(struct seq_file *m, void *v) v 47 drivers/net/wireless/intersil/hostap/hostap_cs.c static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v) v 56 drivers/net/wireless/intersil/hostap/hostap_cs.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v); v 57 drivers/net/wireless/intersil/hostap/hostap_cs.c outb(v, dev->base_addr + a); v 66 drivers/net/wireless/intersil/hostap/hostap_cs.c u8 v; v 71 drivers/net/wireless/intersil/hostap/hostap_cs.c v = inb(dev->base_addr + a); v 72 drivers/net/wireless/intersil/hostap/hostap_cs.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v); v 74 drivers/net/wireless/intersil/hostap/hostap_cs.c return v; v 77 drivers/net/wireless/intersil/hostap/hostap_cs.c static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v) v 86 drivers/net/wireless/intersil/hostap/hostap_cs.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v); v 87 drivers/net/wireless/intersil/hostap/hostap_cs.c outw(v, dev->base_addr + a); v 96 drivers/net/wireless/intersil/hostap/hostap_cs.c u16 v; v 101 drivers/net/wireless/intersil/hostap/hostap_cs.c v = inw(dev->base_addr + a); v 102 drivers/net/wireless/intersil/hostap/hostap_cs.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v); v 104 drivers/net/wireless/intersil/hostap/hostap_cs.c return v; v 137 drivers/net/wireless/intersil/hostap/hostap_cs.c #define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v)) v 139 drivers/net/wireless/intersil/hostap/hostap_cs.c #define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v)) v 146 drivers/net/wireless/intersil/hostap/hostap_cs.c #define HFA384X_OUTB(v,a) outb((v), dev->base_addr + (a)) v 148 drivers/net/wireless/intersil/hostap/hostap_cs.c #define HFA384X_OUTW(v,a) outw((v), dev->base_addr + (a)) v 185 drivers/net/wireless/intersil/hostap/hostap_download.c static int prism2_download_aux_dump_proc_show(struct seq_file *m, void *v) v 189 drivers/net/wireless/intersil/hostap/hostap_download.c hfa384x_from_aux(ctx->local->dev, (unsigned long)v - 1, 0x80, ctx->page); v 203 drivers/net/wireless/intersil/hostap/hostap_download.c static void *prism2_download_aux_dump_proc_next(struct seq_file *m, void *v, loff_t *_pos) v 211 drivers/net/wireless/intersil/hostap/hostap_download.c static void prism2_download_aux_dump_proc_stop(struct seq_file *m, void *v) v 2895 drivers/net/wireless/intersil/hostap/hostap_hw.c static int prism2_registers_proc_show(struct seq_file *m, void *v) v 56 drivers/net/wireless/intersil/hostap/hostap_pci.c static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v) v 68 drivers/net/wireless/intersil/hostap/hostap_pci.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v); v 69 drivers/net/wireless/intersil/hostap/hostap_pci.c writeb(v, hw_priv->mem_start + a); v 79 drivers/net/wireless/intersil/hostap/hostap_pci.c u8 v; v 86 drivers/net/wireless/intersil/hostap/hostap_pci.c v = readb(hw_priv->mem_start + a); v 87 drivers/net/wireless/intersil/hostap/hostap_pci.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v); v 89 drivers/net/wireless/intersil/hostap/hostap_pci.c return v; v 92 drivers/net/wireless/intersil/hostap/hostap_pci.c static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v) v 104 drivers/net/wireless/intersil/hostap/hostap_pci.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v); v 105 drivers/net/wireless/intersil/hostap/hostap_pci.c writew(v, hw_priv->mem_start + a); v 115 drivers/net/wireless/intersil/hostap/hostap_pci.c u16 v; v 122 drivers/net/wireless/intersil/hostap/hostap_pci.c v = readw(hw_priv->mem_start + a); v 123 drivers/net/wireless/intersil/hostap/hostap_pci.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v); v 125 drivers/net/wireless/intersil/hostap/hostap_pci.c return v; v 128 drivers/net/wireless/intersil/hostap/hostap_pci.c #define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v)) v 130 drivers/net/wireless/intersil/hostap/hostap_pci.c #define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v)) v 132 drivers/net/wireless/intersil/hostap/hostap_pci.c #define HFA384X_OUTW_DATA(v,a) hfa384x_outw_debug(dev, (a), le16_to_cpu((v))) v 137 drivers/net/wireless/intersil/hostap/hostap_pci.c static inline void hfa384x_outb(struct net_device *dev, int a, u8 v) v 143 drivers/net/wireless/intersil/hostap/hostap_pci.c writeb(v, hw_priv->mem_start + a); v 155 drivers/net/wireless/intersil/hostap/hostap_pci.c static inline void hfa384x_outw(struct net_device *dev, int a, u16 v) v 161 drivers/net/wireless/intersil/hostap/hostap_pci.c writew(v, hw_priv->mem_start + a); v 173 drivers/net/wireless/intersil/hostap/hostap_pci.c #define HFA384X_OUTB(v,a) hfa384x_outb(dev, (a), (v)) v 175 drivers/net/wireless/intersil/hostap/hostap_pci.c #define HFA384X_OUTW(v,a) hfa384x_outw(dev, (a), (v)) v 177 drivers/net/wireless/intersil/hostap/hostap_pci.c #define HFA384X_OUTW_DATA(v,a) hfa384x_outw(dev, (a), le16_to_cpu((v))) v 109 drivers/net/wireless/intersil/hostap/hostap_plx.c static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v) v 119 drivers/net/wireless/intersil/hostap/hostap_plx.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v); v 120 drivers/net/wireless/intersil/hostap/hostap_plx.c outb(v, dev->base_addr + a); v 129 drivers/net/wireless/intersil/hostap/hostap_plx.c u8 v; v 135 drivers/net/wireless/intersil/hostap/hostap_plx.c v = inb(dev->base_addr + a); v 136 drivers/net/wireless/intersil/hostap/hostap_plx.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v); v 138 drivers/net/wireless/intersil/hostap/hostap_plx.c return v; v 141 drivers/net/wireless/intersil/hostap/hostap_plx.c static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v) v 151 drivers/net/wireless/intersil/hostap/hostap_plx.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v); v 152 drivers/net/wireless/intersil/hostap/hostap_plx.c outw(v, dev->base_addr + a); v 161 drivers/net/wireless/intersil/hostap/hostap_plx.c u16 v; v 167 drivers/net/wireless/intersil/hostap/hostap_plx.c v = inw(dev->base_addr + a); v 168 drivers/net/wireless/intersil/hostap/hostap_plx.c prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v); v 170 drivers/net/wireless/intersil/hostap/hostap_plx.c return v; v 205 drivers/net/wireless/intersil/hostap/hostap_plx.c #define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v)) v 207 drivers/net/wireless/intersil/hostap/hostap_plx.c #define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v)) v 214 drivers/net/wireless/intersil/hostap/hostap_plx.c #define HFA384X_OUTB(v,a) outb((v), dev->base_addr + (a)) v 216 drivers/net/wireless/intersil/hostap/hostap_plx.c #define HFA384X_OUTW(v,a) outw((v), dev->base_addr + (a)) v 15 drivers/net/wireless/intersil/hostap/hostap_proc.c static int prism2_debug_proc_show(struct seq_file *m, void *v) v 48 drivers/net/wireless/intersil/hostap/hostap_proc.c static int prism2_stats_proc_show(struct seq_file *m, void *v) v 86 drivers/net/wireless/intersil/hostap/hostap_proc.c static int prism2_wds_proc_show(struct seq_file *m, void *v) v 88 drivers/net/wireless/intersil/hostap/hostap_proc.c struct list_head *ptr = v; v 105 drivers/net/wireless/intersil/hostap/hostap_proc.c static void *prism2_wds_proc_next(struct seq_file *m, void *v, loff_t *_pos) v 108 drivers/net/wireless/intersil/hostap/hostap_proc.c return seq_list_next(v, &local->hostap_interfaces, _pos); v 111 drivers/net/wireless/intersil/hostap/hostap_proc.c static void prism2_wds_proc_stop(struct seq_file *m, void *v) v 124 drivers/net/wireless/intersil/hostap/hostap_proc.c static int prism2_bss_list_proc_show(struct seq_file *m, void *v) v 127 drivers/net/wireless/intersil/hostap/hostap_proc.c struct list_head *ptr = v; v 158 drivers/net/wireless/intersil/hostap/hostap_proc.c static void *prism2_bss_list_proc_next(struct seq_file *m, void *v, loff_t *_pos) v 161 drivers/net/wireless/intersil/hostap/hostap_proc.c return seq_list_next(v, &local->bss_list, _pos); v 164 drivers/net/wireless/intersil/hostap/hostap_proc.c static void prism2_bss_list_proc_stop(struct seq_file *m, void *v) v 178 drivers/net/wireless/intersil/hostap/hostap_proc.c static int prism2_crypt_proc_show(struct seq_file *m, void *v) v 270 drivers/net/wireless/intersil/hostap/hostap_proc.c static int prism2_scan_results_proc_show(struct seq_file *m, void *v) v 278 drivers/net/wireless/intersil/hostap/hostap_proc.c if (v == SEQ_START_TOKEN) { v 284 drivers/net/wireless/intersil/hostap/hostap_proc.c entry = (unsigned long)v - 2; v 331 drivers/net/wireless/intersil/hostap/hostap_proc.c static void *prism2_scan_results_proc_next(struct seq_file *m, void *v, loff_t *_pos) v 341 drivers/net/wireless/intersil/hostap/hostap_proc.c static void prism2_scan_results_proc_stop(struct seq_file *m, void *v) v 145 drivers/net/wireless/intersil/hostap/hostap_wlan.h #define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100 v 147 drivers/net/wireless/intersil/hostap/hostap_wlan.h #define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100 v 86 drivers/net/wireless/mediatek/mt76/mt7615/regs.h #define MT_WF_PHY_B0_PD_OFDM(v) ((v) << 20) v 91 drivers/net/wireless/mediatek/mt76/mt7615/regs.h #define MT_WF_PHY_B1_PD_OFDM(v) ((v) << 16) v 96 drivers/net/wireless/mediatek/mt76/mt7615/regs.h #define MT_WF_PHY_B0_PD_CCK(v) ((v) << 1) v 100 drivers/net/wireless/mediatek/mt76/mt7615/regs.h #define MT_WF_PHY_B1_PD_CCK(v) ((v) << 24) v 131 drivers/net/wireless/mediatek/mt7601u/trace.h __field(int, o) __field(u16, v) v 136 drivers/net/wireless/mediatek/mt7601u/trace.h __entry->v = val; v 138 drivers/net/wireless/mediatek/mt7601u/trace.h TP_printk(DEV_PR_FMT "%04x=%04x", DEV_PR_ARG, __entry->o, __entry->v) v 2547 drivers/net/wireless/ray_cs.c static int ray_cs_proc_show(struct seq_file *m, void *v) v 67 drivers/net/wireless/realtek/rtlwifi/debug.c int (*cb_read)(struct seq_file *m, void *v); v 75 drivers/net/wireless/realtek/rtlwifi/debug.c static int rtl_debug_get_common(struct seq_file *m, void *v) v 79 drivers/net/wireless/realtek/rtlwifi/debug.c return debugfs_priv->cb_read(m, v); v 94 drivers/net/wireless/realtek/rtlwifi/debug.c static int rtl_debug_get_mac_page(struct seq_file *m, void *v) v 135 drivers/net/wireless/realtek/rtlwifi/debug.c static int rtl_debug_get_bb_page(struct seq_file *m, void *v) v 177 drivers/net/wireless/realtek/rtlwifi/debug.c static int rtl_debug_get_reg_rf(struct seq_file *m, void *v) v 210 drivers/net/wireless/realtek/rtlwifi/debug.c static int rtl_debug_get_cam_register(struct seq_file *m, void *v) v 266 drivers/net/wireless/realtek/rtlwifi/debug.c static int rtl_debug_get_btcoex(struct seq_file *m, void *v) v 17 drivers/net/wireless/realtek/rtw88/debug.c int (*cb_read)(struct seq_file *m, void *v); v 39 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debugfs_single_show(struct seq_file *m, void *v) v 43 drivers/net/wireless/realtek/rtw88/debug.c return debugfs_priv->cb_read(m, v); v 99 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debugfs_get_read_reg(struct seq_file *m, void *v) v 124 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debugfs_get_rf_read(struct seq_file *m, void *v) v 190 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debugfs_get_dump_cam(struct seq_file *m, void *v) v 216 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debugfs_get_rsvd_page(struct seq_file *m, void *v) v 400 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debug_get_mac_page(struct seq_file *m, void *v) v 420 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debug_get_bb_page(struct seq_file *m, void *v) v 440 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debug_get_rf_dump(struct seq_file *m, void *v) v 501 drivers/net/wireless/realtek/rtw88/debug.c static int rtw_debugfs_get_tx_pwr_tbl(struct seq_file *m, void *v) v 433 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_SET_RXPSF_PKTLENTHR(x, v) \ v 434 drivers/net/wireless/realtek/rtw88/reg.h (BIT_CLEAR_RXPSF_PKTLENTHR(x) | BIT_RXPSF_PKTLENTHR(v)) v 455 drivers/net/wireless/realtek/rtw88/reg.h #define BIT_SET_RXPSF_ERRTHR(x, v) \ v 456 drivers/net/wireless/realtek/rtw88/reg.h (BIT_CLEAR_RXPSF_ERRTHR(x) | BIT_RXPSF_ERRTHR(v)) v 98 drivers/net/wireless/st/cw1200/debug.c static int cw1200_status_show(struct seq_file *seq, void *v) v 291 drivers/net/wireless/st/cw1200/debug.c static int cw1200_counters_show(struct seq_file *seq, void *v) v 1077 drivers/net/wireless/st/cw1200/sta.c u16 v; v 1083 drivers/net/wireless/st/cw1200/sta.c v = le16_to_cpu(*((__le16 *)(p + 2))); v 1084 drivers/net/wireless/st/cw1200/sta.c if (!v) /* non-zero means this is enabled */ v 1087 drivers/net/wireless/st/cw1200/sta.c v = le16_to_cpu(*((__le16 *)(p + 4))); v 1088 drivers/net/wireless/st/cw1200/sta.c priv->conf_listen_interval = (v >> 7) & 0x1F; v 433 drivers/net/wireless/zydas/zd1211rw/zd_chip.c u32 v; v 437 drivers/net/wireless/zydas/zd1211rw/zd_chip.c r = zd_ioread32_locked(chip, &v, v 441 drivers/net/wireless/zydas/zd1211rw/zd_chip.c v -= guard; v 443 drivers/net/wireless/zydas/zd1211rw/zd_chip.c values[i++] = v; v 444 drivers/net/wireless/zydas/zd1211rw/zd_chip.c values[i++] = v >> 8; v 445 drivers/net/wireless/zydas/zd1211rw/zd_chip.c values[i++] = v >> 16; v 446 drivers/net/wireless/zydas/zd1211rw/zd_chip.c values[i++] = v >> 24; v 450 drivers/net/wireless/zydas/zd1211rw/zd_chip.c values[i] = v >> (8*(i%3)); v 1309 drivers/net/wireless/zydas/zd1211rw/zd_chip.c u16 v[ARRAY_SIZE(a)]; v 1317 drivers/net/wireless/zydas/zd1211rw/zd_chip.c r = zd_ioread16v_locked(chip, v, (const zd_addr_t *)a, ARRAY_SIZE(a)); v 1326 drivers/net/wireless/zydas/zd1211rw/zd_chip.c ioreqs[1].value = v[1] & ~(LED1|LED2); v 1330 drivers/net/wireless/zydas/zd1211rw/zd_chip.c ioreqs[1].value = v[1] & ~other_led; v 1339 drivers/net/wireless/zydas/zd1211rw/zd_chip.c ioreqs[1].value = v[1] & ~other_led; v 1347 drivers/net/wireless/zydas/zd1211rw/zd_chip.c if (v[0] != ioreqs[0].value || v[1] != ioreqs[1].value) { v 26 drivers/net/xen-netback/xenbus.c static int xenvif_read_io_ring(struct seq_file *m, void *v) v 161 drivers/net/xen-netback/xenbus.c static int xenvif_ctrl_show(struct seq_file *m, void *v) v 286 drivers/nfc/trf7970a.c #define TRF7970A_REG_IO_CTRL_VRS(v) ((v) & 0x07) v 331 drivers/nfc/trf7970a.c #define TRF7970A_NFC_LOW_FIELD_LEVEL_RFDET(v) ((v) & 0x07) v 334 drivers/nfc/trf7970a.c #define TRF7970A_NFC_TARGET_LEVEL_RFDET(v) ((v) & 0x07) v 73 drivers/nubus/nubus.c unsigned long v = 0; v 77 drivers/nubus/nubus.c v <<= 8; v 80 drivers/nubus/nubus.c v |= *p++; v 84 drivers/nubus/nubus.c return v; v 37 drivers/nubus/proc.c nubus_devices_proc_show(struct seq_file *m, void *v) v 107 drivers/nubus/proc.c static int nubus_proc_rsrc_show(struct seq_file *m, void *v) v 998 drivers/nvmem/core.c u8 v, *p, *buf, *b, pbyte, pbits; v 1013 drivers/nvmem/core.c rc = nvmem_reg_read(nvmem, cell->offset, &v, 1); v 1016 drivers/nvmem/core.c *b++ |= GENMASK(bit_offset - 1, 0) & v; v 1033 drivers/nvmem/core.c cell->offset + cell->bytes - 1, &v, 1); v 1036 drivers/nvmem/core.c *p |= GENMASK(7, (nbits + bit_offset) % BITS_PER_BYTE) & v; v 186 drivers/parisc/dino.c u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3); v 195 drivers/parisc/dino.c __raw_writel(v, base_addr + DINO_PCI_ADDR); v 221 drivers/parisc/dino.c u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3); v 230 drivers/parisc/dino.c __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR); v 234 drivers/parisc/dino.c __raw_writel(v, base_addr + DINO_PCI_ADDR); v 266 drivers/parisc/dino.c u##size v; \ v 272 drivers/parisc/dino.c v = read##type(d->base_addr+DINO_IO_DATA+(addr&mask)); \ v 274 drivers/parisc/dino.c return v; \ v 151 drivers/parisc/led.c static int led_proc_show(struct seq_file *m, void *v) v 64 drivers/parport/parport_cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) v 86 drivers/parport/parport_pc.c #define ECR_WRITE(p, v) frob_econtrol((p), 0xff, (v)) v 114 drivers/parport/parport_pc.c unsigned char v) v 122 drivers/parport/parport_pc.c m, v, ectr, (ectr & ~m) ^ v); v 124 drivers/parport/parport_pc.c outb((ectr & ~m) ^ v, ECONTROL(pb)); v 2661 drivers/pci/controller/pci-tegra.c static void *tegra_pcie_ports_seq_next(struct seq_file *s, void *v, loff_t *pos) v 2665 drivers/pci/controller/pci-tegra.c return seq_list_next(v, &pcie->ports, pos); v 2668 drivers/pci/controller/pci-tegra.c static void tegra_pcie_ports_seq_stop(struct seq_file *s, void *v) v 2672 drivers/pci/controller/pci-tegra.c static int tegra_pcie_ports_seq_show(struct seq_file *s, void *v) v 2678 drivers/pci/controller/pci-tegra.c port = list_entry(v, struct tegra_pcie_port, list); v 16 drivers/pci/controller/pci-thunder-ecam.c static void set_val(u32 v, int where, int size, u32 *val) v 20 drivers/pci/controller/pci-thunder-ecam.c pr_debug("set_val %04x: %08x\n", (unsigned)(where & ~3), v); v 21 drivers/pci/controller/pci-thunder-ecam.c v >>= shift; v 23 drivers/pci/controller/pci-thunder-ecam.c v &= 0xff; v 25 drivers/pci/controller/pci-thunder-ecam.c v &= 0xffff; v 26 drivers/pci/controller/pci-thunder-ecam.c *val = v; v 33 drivers/pci/controller/pci-thunder-ecam.c u32 v; v 48 drivers/pci/controller/pci-thunder-ecam.c v = readl(addr); v 49 drivers/pci/controller/pci-thunder-ecam.c v &= ~0xf; v 50 drivers/pci/controller/pci-thunder-ecam.c v |= 2; /* EA entry-1. Base-L */ v 51 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 68 drivers/pci/controller/pci-thunder-ecam.c v = ~barl_rb & ~3; v 69 drivers/pci/controller/pci-thunder-ecam.c v |= 0xc; /* EA entry-2. Offset-L */ v 70 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 79 drivers/pci/controller/pci-thunder-ecam.c v = readl(addr); /* EA entry-3. Base-H */ v 80 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 93 drivers/pci/controller/pci-thunder-ecam.c u32 v; v 112 drivers/pci/controller/pci-thunder-ecam.c v = readl(addr); v 121 drivers/pci/controller/pci-thunder-ecam.c v |= node_bits; v 122 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 130 drivers/pci/controller/pci-thunder-ecam.c u32 v; v 143 drivers/pci/controller/pci-thunder-ecam.c v = readl(addr); v 146 drivers/pci/controller/pci-thunder-ecam.c cfg_type = (v >> 16) & 0x7f; v 204 drivers/pci/controller/pci-thunder-ecam.c v = readl(addr); v 205 drivers/pci/controller/pci-thunder-ecam.c has_msix = (v & 0xff00) != 0; v 208 drivers/pci/controller/pci-thunder-ecam.c v |= 0xbc00; /* next capability is EA at 0xbc */ v 209 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 218 drivers/pci/controller/pci-thunder-ecam.c v = readl(addr); v 219 drivers/pci/controller/pci-thunder-ecam.c if (v & 0xff00) v 220 drivers/pci/controller/pci-thunder-ecam.c pr_err("Bad MSIX cap header: %08x\n", v); v 221 drivers/pci/controller/pci-thunder-ecam.c v |= 0xbc00; /* next capability is EA at 0xbc */ v 222 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 227 drivers/pci/controller/pci-thunder-ecam.c v = 0x40014; /* EA last in chain, 4 entries */ v 229 drivers/pci/controller/pci-thunder-ecam.c v = 0x30014; /* EA last in chain, 3 entries */ v 231 drivers/pci/controller/pci-thunder-ecam.c v = 0x20014; /* EA last in chain, 2 entries */ v 233 drivers/pci/controller/pci-thunder-ecam.c v = 0x10014; /* EA last in chain, 1 entry */ v 234 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 275 drivers/pci/controller/pci-thunder-ecam.c v = readl(addr); v 276 drivers/pci/controller/pci-thunder-ecam.c if (v & 0xff00) v 277 drivers/pci/controller/pci-thunder-ecam.c pr_err("Bad PCIe cap header: %08x\n", v); v 278 drivers/pci/controller/pci-thunder-ecam.c v |= 0xbc00; /* next capability is EA at 0xbc */ v 279 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 284 drivers/pci/controller/pci-thunder-ecam.c v = 0x10014; /* EA last in chain, 1 entry */ v 286 drivers/pci/controller/pci-thunder-ecam.c v = 0x00014; /* EA last in chain, no entries */ v 287 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 292 drivers/pci/controller/pci-thunder-ecam.c v = 0x0101; /* subordinate:secondary = 1:1 */ v 294 drivers/pci/controller/pci-thunder-ecam.c v = 0x0202; /* subordinate:secondary = 2:2 */ v 296 drivers/pci/controller/pci-thunder-ecam.c v = 0x0303; /* subordinate:secondary = 3:3 */ v 298 drivers/pci/controller/pci-thunder-ecam.c v = 0x0404; /* subordinate:secondary = 4:4 */ v 299 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 304 drivers/pci/controller/pci-thunder-ecam.c v = 0x80ff0564; v 305 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 309 drivers/pci/controller/pci-thunder-ecam.c v = 0x00000002; /* Base-L 64-bit */ v 310 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 314 drivers/pci/controller/pci-thunder-ecam.c v = 0xfffffffe; /* MaxOffset-L 64-bit */ v 315 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 319 drivers/pci/controller/pci-thunder-ecam.c v = 0x00008430; /* NIC Base-H */ v 320 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 324 drivers/pci/controller/pci-thunder-ecam.c v = 0x0000000f; /* MaxOffset-H */ v 325 drivers/pci/controller/pci-thunder-ecam.c set_val(v, where, size, val); v 5587 drivers/pci/pci.c u32 stat, v, o; v 5593 drivers/pci/pci.c v = ffs(mmrbc) - 10; v 5602 drivers/pci/pci.c if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21) v 5609 drivers/pci/pci.c if (o != v) { v 5610 drivers/pci/pci.c if (v > o && (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_MMRBC)) v 5614 drivers/pci/pci.c cmd |= v << 2; v 5648 drivers/pci/pci.c u16 v; v 5665 drivers/pci/pci.c v = (ffs(rq) - 8) << 12; v 5668 drivers/pci/pci.c PCI_EXP_DEVCTL_READRQ, v); v 5698 drivers/pci/pci.c u16 v; v 5703 drivers/pci/pci.c v = ffs(mps) - 8; v 5704 drivers/pci/pci.c if (v > dev->pcie_mpss) v 5706 drivers/pci/pci.c v <<= 5; v 5709 drivers/pci/pci.c PCI_EXP_DEVCTL_PAYLOAD, v); v 6062 drivers/pci/pci.c u32 v; v 6066 drivers/pci/pci.c return pci_bus_read_dev_vendor_id(pdev->bus, pdev->devfn, &v, 0); v 1991 drivers/pci/probe.c u16 v; v 1993 drivers/pci/probe.c pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &v); v 1995 drivers/pci/probe.c return !!(v & PCI_EXP_DEVCTL_RELAX_EN); v 339 drivers/pci/proc.c static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos) v 341 drivers/pci/proc.c struct pci_dev *dev = v; v 348 drivers/pci/proc.c static void pci_seq_stop(struct seq_file *m, void *v) v 350 drivers/pci/proc.c if (v) { v 351 drivers/pci/proc.c struct pci_dev *dev = v; v 356 drivers/pci/proc.c static int show_device(struct seq_file *m, void *v) v 358 drivers/pci/proc.c const struct pci_dev *dev = v; v 43 drivers/pcmcia/cistpl.c #define SPEED_CVT(v) \ v 44 drivers/pcmcia/cistpl.c (mantissa[(((v)>>3)&15)-1] * exponent[(v)&7] / 10) v 46 drivers/pcmcia/cistpl.c #define POWER_CVT(v) \ v 47 drivers/pcmcia/cistpl.c (mantissa[((v)>>3)&15] * exponent[(v)&7] / 10) v 48 drivers/pcmcia/cistpl.c #define POWER_SCALE(v) (exponent[(v)&7]) v 44 drivers/pcmcia/cs.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0444) v 248 drivers/pcmcia/db1xxx_ss.c int v, p, ret; v 253 drivers/pcmcia/db1xxx_ss.c v = p = ret = 0; v 257 drivers/pcmcia/db1xxx_ss.c ++v; v 260 drivers/pcmcia/db1xxx_ss.c ++v; v 289 drivers/pcmcia/db1xxx_ss.c v = p = 0; v 295 drivers/pcmcia/db1xxx_ss.c cr_set |= ((v << 2) | p) << (sock->nr * 8); v 292 drivers/pcmcia/i82365.c #define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b)))) v 39 drivers/pcmcia/rsrc_nonstatic.c #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0444) v 146 drivers/pcmcia/sa1111_badge4.c int v[4]; v 148 drivers/pcmcia/sa1111_badge4.c s = get_options(s, ARRAY_SIZE(v), v); v 150 drivers/pcmcia/sa1111_badge4.c if (v[0] >= 1) badge4_pcmvcc = v[1]; v 151 drivers/pcmcia/sa1111_badge4.c if (v[0] >= 2) badge4_pcmvpp = v[2]; v 152 drivers/pcmcia/sa1111_badge4.c if (v[0] >= 3) badge4_cfvcc = v[3]; v 85 drivers/pcmcia/soc_common.c struct soc_pcmcia_regulator *r, int v) v 93 drivers/pcmcia/soc_common.c on = v != 0; v 98 drivers/pcmcia/soc_common.c ret = regulator_set_voltage(r->reg, v * 100000, v * 100000); v 105 drivers/pcmcia/soc_common.c v / 10, v % 10, vout / 10, vout % 10); v 165 drivers/pcmcia/soc_common.h struct soc_pcmcia_regulator *r, int v); v 701 drivers/perf/arm_pmu.c void *v) v 631 drivers/phy/allwinner/phy-sun4i-usb.c unsigned long val, void *v) v 635 drivers/phy/allwinner/phy-sun4i-usb.c struct power_supply *psy = v; v 24 drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c #define __set(v, a, b) (((v) << (b)) & GENMASK(a, b)) v 88 drivers/phy/qualcomm/phy-qcom-qmp.c #define QMP_PHY_INIT_CFG(o, v) \ v 91 drivers/phy/qualcomm/phy-qcom-qmp.c .val = v, \ v 94 drivers/phy/qualcomm/phy-qcom-qmp.c #define QMP_PHY_INIT_CFG_L(o, v) \ v 97 drivers/phy/qualcomm/phy-qcom-qmp.c .val = v, \ v 98 drivers/phy/qualcomm/phy-qcom-qusb2.c #define QUSB2_PHY_INIT_CFG(o, v) \ v 101 drivers/phy/qualcomm/phy-qcom-qusb2.c .val = v, \ v 104 drivers/phy/qualcomm/phy-qcom-qusb2.c #define QUSB2_PHY_INIT_CFG_L(o, v) \ v 107 drivers/phy/qualcomm/phy-qcom-qusb2.c .val = v, \ v 625 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c u32 v; v 665 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_poll(inno, 0xe8, v, v & RK3228_PRE_PLL_LOCK_STATUS, v 901 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c u32 v; v 929 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c for (v = 0; v < 4; v++) v 930 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xef + v, phy_cfg->regs[v]); v 940 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_poll(inno, 0xeb, v, v & RK3228_POST_PLL_LOCK_STATUS, v 1016 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c u32 v; v 1028 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c v = (cfg->postdiv / 2) - 1; v 1029 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c v &= RK3328_POST_PLL_POST_DIV_MASK; v 1030 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xad, v); v 1037 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c for (v = 0; v < 14; v++) v 1038 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xb5 + v, phy_cfg->regs[v]); v 1041 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c for (v = 0; v < 4; v++) v 1042 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xc8 + v, RK3328_ESD_DETECT_MASK, v 1047 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c v = clk_get_rate(inno->sysclk) / 100000; v 1048 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xc5, RK3328_TERM_RESISTOR_CALIB_SPEED_14_8(v) v 1050 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_write(inno, 0xc6, RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(v)); v 1065 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c for (v = 0; v < 3; v++) v 1066 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c inno_update_bits(inno, 0xc9 + v, v 1078 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c ret = inno_poll(inno, 0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS, v 42 drivers/phy/tegra/xusb-tegra124.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(x, v) (((v) & 0x7) << ((x) * 4)) v 49 drivers/phy/tegra/xusb-tegra210.c #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(x, v) (((v) & 0x7) << ((x) * 5)) v 1725 drivers/pinctrl/intel/pinctrl-baytrail.c u32 v; v 1727 drivers/pinctrl/intel/pinctrl-baytrail.c v = value & ~BYT_VAL_RESTORE_MASK; v 1728 drivers/pinctrl/intel/pinctrl-baytrail.c v |= vg->saved_context[i].val; v 1729 drivers/pinctrl/intel/pinctrl-baytrail.c if (v != value) { v 1730 drivers/pinctrl/intel/pinctrl-baytrail.c writel(v, reg); v 1732 drivers/pinctrl/intel/pinctrl-baytrail.c i, v); v 614 drivers/pinctrl/intel/pinctrl-intel.c u32 v; v 620 drivers/pinctrl/intel/pinctrl-intel.c v = readl(padcfg2); v 621 drivers/pinctrl/intel/pinctrl-intel.c if (!(v & PADCFG2_DEBEN)) v 624 drivers/pinctrl/intel/pinctrl-intel.c v = (v & PADCFG2_DEBOUNCE_MASK) >> PADCFG2_DEBOUNCE_SHIFT; v 625 drivers/pinctrl/intel/pinctrl-intel.c arg = BIT(v) * DEBOUNCE_PERIOD_NSEC / NSEC_PER_USEC; v 740 drivers/pinctrl/intel/pinctrl-intel.c unsigned long v; v 742 drivers/pinctrl/intel/pinctrl-intel.c v = order_base_2(debounce * NSEC_PER_USEC / DEBOUNCE_PERIOD_NSEC); v 743 drivers/pinctrl/intel/pinctrl-intel.c if (v < 3 || v > 15) { v 749 drivers/pinctrl/intel/pinctrl-intel.c value2 |= v << PADCFG2_DEBOUNCE_SHIFT; v 373 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c int v, v2; v 376 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &v); v 384 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (v == MTK_ENABLE || v2 == MTK_ENABLE) v 414 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c int reg, err, v; v 418 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_get_value(hw, desc, reg, &v); v 422 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (!v) v 447 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c int v, err; v 449 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); v 453 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (v == MTK_ENABLE) v 484 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c int err, v; v 486 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); v 490 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (v == MTK_DISABLE) v 493 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, &v); v 497 drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c if (pullup ^ (v == MTK_PULLUP)) v 1530 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c int v; v 1535 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c v = (pincfg[pin].flag & DRIVE_STRENGTH_MASK); v 1536 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c if (!nval || !v) v 1538 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c if (DSLO(v) == nval) { v 1543 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c } else if (DSHI(v) == nval) { v 765 drivers/platform/x86/sony-laptop.c u64 v = *value; v 766 drivers/platform/x86/sony-laptop.c object = __call_snc_method(handle, name, &v); v 3636 drivers/platform/x86/sony-laptop.c static u8 sony_pic_call3(u8 dev, u8 fn, u8 v) v 3645 drivers/platform/x86/sony-laptop.c outb(v, spic_dev.cur_ioport->io1.minimum); v 3648 drivers/platform/x86/sony-laptop.c dev, fn, v, v1); v 3773 drivers/platform/x86/sony-laptop.c u8 v; v 3775 drivers/platform/x86/sony-laptop.c v = sony_pic_call2(0x8f, SONYPI_CAMERA_STATUS); v 3776 drivers/platform/x86/sony-laptop.c return (v != 0xff && (v & SONYPI_CAMERA_STATUS_READY)); v 648 drivers/platform/x86/thinkpad_acpi.c int v; v 651 drivers/platform/x86/thinkpad_acpi.c if (!acpi_evalf(ecrd_handle, &v, NULL, "dd", i)) v 653 drivers/platform/x86/thinkpad_acpi.c *p = v; v 662 drivers/platform/x86/thinkpad_acpi.c static int acpi_ec_write(int i, u8 v) v 665 drivers/platform/x86/thinkpad_acpi.c if (!acpi_evalf(ecwr_handle, NULL, NULL, "vdd", i, v)) v 668 drivers/platform/x86/thinkpad_acpi.c if (ec_write(i, v) < 0) v 863 drivers/platform/x86/thinkpad_acpi.c static int dispatch_proc_show(struct seq_file *m, void *v) v 1353 drivers/platform/x86/toshiba_acpi.c static int lcd_proc_show(struct seq_file *m, void *v) v 1457 drivers/platform/x86/toshiba_acpi.c static int video_proc_show(struct seq_file *m, void *v) v 1576 drivers/platform/x86/toshiba_acpi.c static int fan_proc_show(struct seq_file *m, void *v) v 1629 drivers/platform/x86/toshiba_acpi.c static int keys_proc_show(struct seq_file *m, void *v) v 1674 drivers/platform/x86/toshiba_acpi.c static int __maybe_unused version_proc_show(struct seq_file *m, void *v) v 37 drivers/pnp/pnpbios/proc.c static int pnpconfig_proc_show(struct seq_file *m, void *v) v 50 drivers/pnp/pnpbios/proc.c static int escd_info_proc_show(struct seq_file *m, void *v) v 65 drivers/pnp/pnpbios/proc.c static int escd_proc_show(struct seq_file *m, void *v) v 106 drivers/pnp/pnpbios/proc.c static int pnp_legacyres_proc_show(struct seq_file *m, void *v) v 123 drivers/pnp/pnpbios/proc.c static int pnp_devices_proc_show(struct seq_file *m, void *v) v 153 drivers/pnp/pnpbios/proc.c static int pnpbios_proc_show(struct seq_file *m, void *v) v 108 drivers/power/supply/axp20x_usb_power.c unsigned int v; v 109 drivers/power/supply/axp20x_usb_power.c int ret = regmap_read(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, &v); v 114 drivers/power/supply/axp20x_usb_power.c switch (v & AXP20X_VBUS_CLIMIT_MASK) { v 137 drivers/power/supply/axp20x_usb_power.c unsigned int v; v 138 drivers/power/supply/axp20x_usb_power.c int ret = regmap_read(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, &v); v 143 drivers/power/supply/axp20x_usb_power.c switch (v & AXP20X_VBUS_CLIMIT_MASK) { v 164 drivers/power/supply/axp20x_usb_power.c unsigned int input, v; v 169 drivers/power/supply/axp20x_usb_power.c ret = regmap_read(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, &v); v 173 drivers/power/supply/axp20x_usb_power.c val->intval = AXP20X_VBUS_VHOLD_uV(v); v 243 drivers/power/supply/axp20x_usb_power.c AXP20X_USB_OTG_STATUS, &v); v 247 drivers/power/supply/axp20x_usb_power.c if (!(v & AXP20X_USB_STATUS_VBUS_VALID)) v 203 drivers/power/supply/bd70528-charger.c unsigned int v; v 205 drivers/power/supply/bd70528-charger.c ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_CURR_STAT, &v); v 212 drivers/power/supply/bd70528-charger.c switch (v & BD70528_MASK_CHG_STAT) { v 243 drivers/power/supply/bd70528-charger.c unsigned int v; v 245 drivers/power/supply/bd70528-charger.c ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_CURR_STAT, &v); v 252 drivers/power/supply/bd70528-charger.c switch (v & BD70528_MASK_CHG_STAT) { v 283 drivers/power/supply/bd70528-charger.c unsigned int v; v 285 drivers/power/supply/bd70528-charger.c ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_BAT_STAT, &v); v 292 drivers/power/supply/bd70528-charger.c if (!(v & BD70528_MASK_CHG_BAT_DETECT)) v 294 drivers/power/supply/bd70528-charger.c else if (v & BD70528_MASK_CHG_BAT_OVERVOLT) v 296 drivers/power/supply/bd70528-charger.c else if (v & BD70528_MASK_CHG_BAT_TIMER) v 307 drivers/power/supply/bd70528-charger.c unsigned int v; v 309 drivers/power/supply/bd70528-charger.c ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_IN_STAT, &v); v 316 drivers/power/supply/bd70528-charger.c *val = (v & BD70528_MASK_CHG_DCIN1_UVLO) ? 1 : 0; v 324 drivers/power/supply/bd70528-charger.c unsigned int v; v 326 drivers/power/supply/bd70528-charger.c ret = regmap_read(bdpsy->regmap, BD70528_REG_CHG_BAT_STAT, &v); v 333 drivers/power/supply/bd70528-charger.c *val = (v & BD70528_MASK_CHG_BAT_DETECT) ? 1 : 0; v 807 drivers/power/supply/bq2415x_charger.c unsigned long val, void *v) v 811 drivers/power/supply/bq2415x_charger.c struct power_supply *psy = v; v 229 drivers/power/supply/bq24190_charger.c static u8 bq24190_find_idx(const int tbl[], int tbl_size, int v) v 234 drivers/power/supply/bq24190_charger.c if (v < tbl[i]) v 262 drivers/power/supply/bq24190_charger.c u8 v; v 265 drivers/power/supply/bq24190_charger.c ret = bq24190_read(bdi, reg, &v); v 269 drivers/power/supply/bq24190_charger.c v &= mask; v 270 drivers/power/supply/bq24190_charger.c v >>= shift; v 271 drivers/power/supply/bq24190_charger.c *data = v; v 279 drivers/power/supply/bq24190_charger.c u8 v; v 282 drivers/power/supply/bq24190_charger.c ret = bq24190_read(bdi, reg, &v); v 286 drivers/power/supply/bq24190_charger.c v &= ~mask; v 287 drivers/power/supply/bq24190_charger.c v |= ((data << shift) & mask); v 289 drivers/power/supply/bq24190_charger.c return bq24190_write(bdi, reg, v); v 297 drivers/power/supply/bq24190_charger.c u8 v; v 300 drivers/power/supply/bq24190_charger.c ret = bq24190_read_mask(bdi, reg, mask, shift, &v); v 304 drivers/power/supply/bq24190_charger.c v = (v >= tbl_size) ? (tbl_size - 1) : v; v 305 drivers/power/supply/bq24190_charger.c *val = tbl[v]; v 444 drivers/power/supply/bq24190_charger.c u8 v; v 454 drivers/power/supply/bq24190_charger.c ret = bq24190_read_mask(bdi, info->reg, info->mask, info->shift, &v); v 458 drivers/power/supply/bq24190_charger.c count = scnprintf(buf, PAGE_SIZE, "%hhx\n", v); v 473 drivers/power/supply/bq24190_charger.c u8 v; v 479 drivers/power/supply/bq24190_charger.c ret = kstrtou8(buf, 0, &v); v 487 drivers/power/supply/bq24190_charger.c ret = bq24190_write_mask(bdi, info->reg, info->mask, info->shift, v); v 607 drivers/power/supply/bq24190_charger.c u8 v; v 609 drivers/power/supply/bq24190_charger.c ret = bq24190_read(bdi, BQ24190_REG_CTTC, &v); v 613 drivers/power/supply/bq24190_charger.c bdi->watchdog = ((v & BQ24190_REG_CTTC_WATCHDOG_MASK) >> v 624 drivers/power/supply/bq24190_charger.c v &= ~BQ24190_REG_CTTC_WATCHDOG_MASK; v 626 drivers/power/supply/bq24190_charger.c ret = bq24190_write(bdi, BQ24190_REG_CTTC, v); v 631 drivers/power/supply/bq24190_charger.c v = bdi->sys_min / 100 - 30; // manual section 9.5.1.2, table 9 v 635 drivers/power/supply/bq24190_charger.c v); v 641 drivers/power/supply/bq24190_charger.c v = bdi->iprechg / 128 - 1; // manual section 9.5.1.4, table 11 v 645 drivers/power/supply/bq24190_charger.c v); v 651 drivers/power/supply/bq24190_charger.c v = bdi->iterm / 128 - 1; // manual section 9.5.1.4, table 11 v 655 drivers/power/supply/bq24190_charger.c v); v 666 drivers/power/supply/bq24190_charger.c u8 v; v 694 drivers/power/supply/bq24190_charger.c &v); v 698 drivers/power/supply/bq24190_charger.c if (v == 0) v 712 drivers/power/supply/bq24190_charger.c u8 v; v 718 drivers/power/supply/bq24190_charger.c &v); v 723 drivers/power/supply/bq24190_charger.c if (!v) { v 729 drivers/power/supply/bq24190_charger.c &v); v 733 drivers/power/supply/bq24190_charger.c type = (v) ? POWER_SUPPLY_CHARGE_TYPE_TRICKLE : v 800 drivers/power/supply/bq24190_charger.c u8 v; v 804 drivers/power/supply/bq24190_charger.c v = bdi->f_reg; v 807 drivers/power/supply/bq24190_charger.c if (v & BQ24190_REG_F_NTC_FAULT_MASK) { v 808 drivers/power/supply/bq24190_charger.c switch (v >> BQ24190_REG_F_NTC_FAULT_SHIFT & 0x7) { v 822 drivers/power/supply/bq24190_charger.c } else if (v & BQ24190_REG_F_BAT_FAULT_MASK) { v 824 drivers/power/supply/bq24190_charger.c } else if (v & BQ24190_REG_F_CHRG_FAULT_MASK) { v 825 drivers/power/supply/bq24190_charger.c switch (v >> BQ24190_REG_F_CHRG_FAULT_SHIFT & 0x3) { v 845 drivers/power/supply/bq24190_charger.c } else if (v & BQ24190_REG_F_BOOST_FAULT_MASK) { v 921 drivers/power/supply/bq24190_charger.c u8 v; v 926 drivers/power/supply/bq24190_charger.c BQ24190_REG_PCTCC_IPRECHG_SHIFT, &v); v 930 drivers/power/supply/bq24190_charger.c val->intval = ++v * 128 * 1000; v 937 drivers/power/supply/bq24190_charger.c u8 v; v 942 drivers/power/supply/bq24190_charger.c BQ24190_REG_PCTCC_ITERM_SHIFT, &v); v 946 drivers/power/supply/bq24190_charger.c val->intval = ++v * 128 * 1000; v 953 drivers/power/supply/bq24190_charger.c u8 v; v 965 drivers/power/supply/bq24190_charger.c BQ24190_REG_CCC_FORCE_20PCT_SHIFT, &v); v 970 drivers/power/supply/bq24190_charger.c if (v) v 989 drivers/power/supply/bq24190_charger.c u8 v; v 994 drivers/power/supply/bq24190_charger.c BQ24190_REG_CCC_FORCE_20PCT_SHIFT, &v); v 999 drivers/power/supply/bq24190_charger.c if (v) v 1314 drivers/power/supply/bq24190_charger.c u8 v; v 1318 drivers/power/supply/bq24190_charger.c v = bdi->f_reg; v 1321 drivers/power/supply/bq24190_charger.c if (v & BQ24190_REG_F_BAT_FAULT_MASK) { v 1324 drivers/power/supply/bq24190_charger.c v &= BQ24190_REG_F_NTC_FAULT_MASK; v 1325 drivers/power/supply/bq24190_charger.c v >>= BQ24190_REG_F_NTC_FAULT_SHIFT; v 1327 drivers/power/supply/bq24190_charger.c switch (v) { v 1628 drivers/power/supply/bq24190_charger.c u8 v; v 1635 drivers/power/supply/bq24190_charger.c &v); v 1639 drivers/power/supply/bq24190_charger.c switch (v) { v 1645 drivers/power/supply/bq24190_charger.c dev_err(bdi->dev, "Error unknown model: 0x%02x\n", v); v 1664 drivers/power/supply/bq24190_charger.c int v; v 1666 drivers/power/supply/bq24190_charger.c if (device_property_read_u32(bdi->dev, s, &v) == 0) { v 1667 drivers/power/supply/bq24190_charger.c v /= 1000; v 1668 drivers/power/supply/bq24190_charger.c if (v >= BQ24190_REG_POC_SYS_MIN_MIN v 1669 drivers/power/supply/bq24190_charger.c && v <= BQ24190_REG_POC_SYS_MIN_MAX) v 1670 drivers/power/supply/bq24190_charger.c bdi->sys_min = v; v 1672 drivers/power/supply/bq24190_charger.c dev_warn(bdi->dev, "invalid value for %s: %u\n", s, v); v 1677 drivers/power/supply/bq24190_charger.c v = info.precharge_current_ua / 1000; v 1678 drivers/power/supply/bq24190_charger.c if (v >= BQ24190_REG_PCTCC_IPRECHG_MIN v 1679 drivers/power/supply/bq24190_charger.c && v <= BQ24190_REG_PCTCC_IPRECHG_MAX) v 1680 drivers/power/supply/bq24190_charger.c bdi->iprechg = v; v 1683 drivers/power/supply/bq24190_charger.c v); v 1685 drivers/power/supply/bq24190_charger.c v = info.charge_term_current_ua / 1000; v 1686 drivers/power/supply/bq24190_charger.c if (v >= BQ24190_REG_PCTCC_ITERM_MIN v 1687 drivers/power/supply/bq24190_charger.c && v <= BQ24190_REG_PCTCC_ITERM_MAX) v 1688 drivers/power/supply/bq24190_charger.c bdi->iterm = v; v 1691 drivers/power/supply/bq24190_charger.c v); v 461 drivers/power/supply/da9030_battery.c char v[5]; v 464 drivers/power/supply/da9030_battery.c v[0] = v[1] = charger->thresholds.vbat_low; v 465 drivers/power/supply/da9030_battery.c v[2] = charger->thresholds.tbat_high; v 466 drivers/power/supply/da9030_battery.c v[3] = charger->thresholds.tbat_restart; v 467 drivers/power/supply/da9030_battery.c v[4] = charger->thresholds.tbat_low; v 469 drivers/power/supply/da9030_battery.c ret = da903x_writes(charger->master, DA9030_VBATMON, 5, v); v 220 drivers/power/supply/da9052-battery.c u8 v[2] = {0, 0}; v 233 drivers/power/supply/da9052-battery.c ret = da9052_group_read(bat->da9052, DA9052_STATUS_A_REG, 2, v); v 237 drivers/power/supply/da9052-battery.c bat_status = v[0]; v 238 drivers/power/supply/da9052-battery.c chg_end = v[1]; v 294 drivers/power/supply/isp1704_charger.c unsigned long val, void *v) v 254 drivers/power/supply/rt9455_charger.c static unsigned int rt9455_find_idx(const int tbl[], int tbl_size, int v) v 265 drivers/power/supply/rt9455_charger.c if (v <= tbl[i]) v 275 drivers/power/supply/rt9455_charger.c unsigned int v; v 278 drivers/power/supply/rt9455_charger.c ret = regmap_field_read(info->regmap_fields[field], &v); v 282 drivers/power/supply/rt9455_charger.c v = (v >= tbl_size) ? (tbl_size - 1) : v; v 283 drivers/power/supply/rt9455_charger.c *val = tbl[v]; v 300 drivers/power/supply/rt9455_charger.c unsigned int v; v 314 drivers/power/supply/rt9455_charger.c ret = regmap_field_read(info->regmap_fields[F_RST], &v); v 320 drivers/power/supply/rt9455_charger.c if (!v) v 355 drivers/power/supply/rt9455_charger.c unsigned int v, pwr_rdy; v 374 drivers/power/supply/rt9455_charger.c ret = regmap_field_read(info->regmap_fields[F_STAT], &v); v 380 drivers/power/supply/rt9455_charger.c switch (v) { v 408 drivers/power/supply/rt9455_charger.c unsigned int v; v 413 drivers/power/supply/rt9455_charger.c ret = regmap_read(info->regmap, RT9455_REG_IRQ1, &v); v 419 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_TSDI)) { v 423 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_VINOVPI)) { v 427 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_BATAB)) { v 432 drivers/power/supply/rt9455_charger.c ret = regmap_read(info->regmap, RT9455_REG_IRQ2, &v); v 438 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_CHBATOVI)) { v 442 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_CH32MI)) { v 447 drivers/power/supply/rt9455_charger.c ret = regmap_read(info->regmap, RT9455_REG_IRQ3, &v); v 453 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_BSTBUSOVI)) { v 457 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_BSTOLI)) { v 461 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_BSTLOWVI)) { v 465 drivers/power/supply/rt9455_charger.c if (v & GET_MASK(F_BST32SI)) { v 470 drivers/power/supply/rt9455_charger.c ret = regmap_field_read(info->regmap_fields[F_STAT], &v); v 476 drivers/power/supply/rt9455_charger.c if (v == RT9455_FAULT) { v 487 drivers/power/supply/rt9455_charger.c unsigned int v; v 490 drivers/power/supply/rt9455_charger.c ret = regmap_field_read(info->regmap_fields[F_BATAB], &v); v 500 drivers/power/supply/rt9455_charger.c val->intval = !v; v 508 drivers/power/supply/rt9455_charger.c unsigned int v; v 511 drivers/power/supply/rt9455_charger.c ret = regmap_field_read(info->regmap_fields[F_PWR_RDY], &v); v 517 drivers/power/supply/rt9455_charger.c val->intval = (int)v; v 883 drivers/power/supply/smb347-charger.c unsigned int v; v 888 drivers/power/supply/smb347-charger.c ret = regmap_read(smb->regmap, STAT_B, &v); v 896 drivers/power/supply/smb347-charger.c if (v & 0x20) { v 897 drivers/power/supply/smb347-charger.c intval = hw_to_current(fcc_tbl, ARRAY_SIZE(fcc_tbl), v & 7); v 899 drivers/power/supply/smb347-charger.c v >>= 3; v 900 drivers/power/supply/smb347-charger.c intval = hw_to_current(pcc_tbl, ARRAY_SIZE(pcc_tbl), v & 7); v 913 drivers/power/supply/smb347-charger.c unsigned int v; v 918 drivers/power/supply/smb347-charger.c ret = regmap_read(smb->regmap, STAT_A, &v); v 922 drivers/power/supply/smb347-charger.c v &= STAT_A_FLOAT_VOLTAGE_MASK; v 923 drivers/power/supply/smb347-charger.c if (v > 0x3d) v 924 drivers/power/supply/smb347-charger.c v = 0x3d; v 926 drivers/power/supply/smb347-charger.c intval = 3500000 + v * 20000; v 401 drivers/power/supply/twl4030_charger.c int v, curr; v 408 drivers/power/supply/twl4030_charger.c v = 0; v 411 drivers/power/supply/twl4030_charger.c v = res * 6843; v 414 drivers/power/supply/twl4030_charger.c dev_dbg(bci->dev, "v=%d cur=%d limit=%d target=%d\n", v, curr, v 417 drivers/power/supply/twl4030_charger.c if (v < USB_MIN_VOLT) { v 1176 drivers/pwm/core.c static void *pwm_seq_next(struct seq_file *s, void *v, loff_t *pos) v 1180 drivers/pwm/core.c return seq_list_next(v, &pwm_chips, pos); v 1183 drivers/pwm/core.c static void pwm_seq_stop(struct seq_file *s, void *v) v 1188 drivers/pwm/core.c static int pwm_seq_show(struct seq_file *s, void *v) v 1190 drivers/pwm/core.c struct pwm_chip *chip = list_entry(v, struct pwm_chip, list); v 26 drivers/pwm/pwm-clps711x.c static void clps711x_pwm_update_val(struct clps711x_chip *priv, u32 n, u32 v) v 37 drivers/pwm/pwm-clps711x.c tmp |= v << shift; v 43 drivers/pwm/pwm-clps711x.c static unsigned int clps711x_get_duty(struct pwm_device *pwm, unsigned int v) v 46 drivers/pwm/pwm-clps711x.c return DIV_ROUND_CLOSEST(v * 0xf, pwm->args.period); v 248 drivers/pwm/pwm-omap-dmtimer.c u32 v; v 318 drivers/pwm/pwm-omap-dmtimer.c if (!of_property_read_u32(pdev->dev.of_node, "ti,prescaler", &v)) v 319 drivers/pwm/pwm-omap-dmtimer.c omap->pdata->set_prescaler(omap->dm_timer, v); v 322 drivers/pwm/pwm-omap-dmtimer.c if (!of_property_read_u32(pdev->dev.of_node, "ti,clock-source", &v)) v 323 drivers/pwm/pwm-omap-dmtimer.c omap->pdata->set_source(omap->dm_timer, v); v 438 drivers/ras/cec.c static int array_dump(struct seq_file *m, void *v) v 16 drivers/ras/debugfs.c static int trace_show(struct seq_file *m, void *v) v 217 drivers/regulator/max8998.c static inline void buck1_gpio_set(int gpio1, int gpio2, int v) v 219 drivers/regulator/max8998.c gpio_set_value(gpio1, v & 0x1); v 220 drivers/regulator/max8998.c gpio_set_value(gpio2, (v >> 1) & 0x1); v 223 drivers/regulator/max8998.c static inline void buck2_gpio_set(int gpio, int v) v 225 drivers/regulator/max8998.c gpio_set_value(gpio, v & 0x1); v 565 drivers/regulator/max8998.c unsigned int v; v 624 drivers/regulator/max8998.c for (v = 0; v < ARRAY_SIZE(pdata->buck1_voltage); ++v) { v 630 drivers/regulator/max8998.c < pdata->buck1_voltage[v]) v 633 drivers/regulator/max8998.c max8998->buck1_vol[v] = i; v 635 drivers/regulator/max8998.c MAX8998_REG_BUCK1_VOLTAGE1 + v, i); v 654 drivers/regulator/max8998.c for (v = 0; v < ARRAY_SIZE(pdata->buck2_voltage); ++v) { v 660 drivers/regulator/max8998.c < pdata->buck2_voltage[v]) v 663 drivers/regulator/max8998.c max8998->buck2_vol[v] = i; v 665 drivers/regulator/max8998.c MAX8998_REG_BUCK2_VOLTAGE1 + v, i); v 71 drivers/regulator/twl6030-regulator.c #define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\ v 196 drivers/remoteproc/remoteproc_debugfs.c struct fw_rsc_vdev *v; v 239 drivers/remoteproc/remoteproc_debugfs.c v = rsc; v 242 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " ID %d\n", v->id); v 243 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Notify ID %d\n", v->notifyid); v 244 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Device features 0x%x\n", v->dfeatures); v 245 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Guest features 0x%x\n", v->gfeatures); v 246 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Config length 0x%x\n", v->config_len); v 247 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Status 0x%x\n", v->status); v 248 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Number of vrings %d\n", v->num_of_vrings); v 250 drivers/remoteproc/remoteproc_debugfs.c v->reserved[0], v->reserved[1]); v 252 drivers/remoteproc/remoteproc_debugfs.c for (j = 0; j < v->num_of_vrings; j++) { v 254 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Device Address 0x%x\n", v->vring[j].da); v 255 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Alignment %d\n", v->vring[j].align); v 256 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Number of buffers %d\n", v->vring[j].num); v 257 drivers/remoteproc/remoteproc_debugfs.c seq_printf(seq, " Notify ID %d\n", v->vring[j].notifyid); v 259 drivers/remoteproc/remoteproc_debugfs.c v->vring[j].pa); v 59 drivers/rtc/rtc-da9052.c uint8_t v[2][5]; v 63 drivers/rtc/rtc-da9052.c ret = da9052_group_read(rtc->da9052, DA9052_ALARM_MI_REG, 5, &v[0][0]); v 71 drivers/rtc/rtc-da9052.c DA9052_ALARM_MI_REG, 5, &v[idx][0]); v 77 drivers/rtc/rtc-da9052.c if (memcmp(&v[0][0], &v[1][0], 5) == 0) { v 78 drivers/rtc/rtc-da9052.c rtc_tm->tm_year = (v[0][4] & DA9052_RTC_YEAR) + 100; v 79 drivers/rtc/rtc-da9052.c rtc_tm->tm_mon = (v[0][3] & DA9052_RTC_MONTH) - 1; v 80 drivers/rtc/rtc-da9052.c rtc_tm->tm_mday = v[0][2] & DA9052_RTC_DAY; v 81 drivers/rtc/rtc-da9052.c rtc_tm->tm_hour = v[0][1] & DA9052_RTC_HOUR; v 82 drivers/rtc/rtc-da9052.c rtc_tm->tm_min = v[0][0] & DA9052_RTC_MIN; v 104 drivers/rtc/rtc-da9052.c uint8_t v[3]; v 126 drivers/rtc/rtc-da9052.c v[0] = rtc_tm->tm_hour; v 127 drivers/rtc/rtc-da9052.c v[1] = rtc_tm->tm_mday; v 128 drivers/rtc/rtc-da9052.c v[2] = rtc_tm->tm_mon; v 130 drivers/rtc/rtc-da9052.c ret = da9052_group_write(da9052, DA9052_ALARM_H_REG, 3, v); v 159 drivers/rtc/rtc-da9052.c uint8_t v[2][6]; v 163 drivers/rtc/rtc-da9052.c ret = da9052_group_read(rtc->da9052, DA9052_COUNT_S_REG, 6, &v[0][0]); v 171 drivers/rtc/rtc-da9052.c DA9052_COUNT_S_REG, 6, &v[idx][0]); v 177 drivers/rtc/rtc-da9052.c if (memcmp(&v[0][0], &v[1][0], 6) == 0) { v 178 drivers/rtc/rtc-da9052.c rtc_tm->tm_year = (v[0][5] & DA9052_RTC_YEAR) + 100; v 179 drivers/rtc/rtc-da9052.c rtc_tm->tm_mon = (v[0][4] & DA9052_RTC_MONTH) - 1; v 180 drivers/rtc/rtc-da9052.c rtc_tm->tm_mday = v[0][3] & DA9052_RTC_DAY; v 181 drivers/rtc/rtc-da9052.c rtc_tm->tm_hour = v[0][2] & DA9052_RTC_HOUR; v 182 drivers/rtc/rtc-da9052.c rtc_tm->tm_min = v[0][1] & DA9052_RTC_MIN; v 183 drivers/rtc/rtc-da9052.c rtc_tm->tm_sec = v[0][0] & DA9052_RTC_SEC; v 201 drivers/rtc/rtc-da9052.c uint8_t v[6]; v 210 drivers/rtc/rtc-da9052.c v[0] = tm->tm_sec; v 211 drivers/rtc/rtc-da9052.c v[1] = tm->tm_min; v 212 drivers/rtc/rtc-da9052.c v[2] = tm->tm_hour; v 213 drivers/rtc/rtc-da9052.c v[3] = tm->tm_mday; v 214 drivers/rtc/rtc-da9052.c v[4] = tm->tm_mon + 1; v 215 drivers/rtc/rtc-da9052.c v[5] = tm->tm_year - 100; v 217 drivers/rtc/rtc-da9052.c ret = da9052_group_write(rtc->da9052, DA9052_COUNT_S_REG, 6, v); v 59 drivers/rtc/rtc-da9055.c uint8_t v[5]; v 61 drivers/rtc/rtc-da9055.c ret = da9055_group_read(da9055, DA9055_REG_ALARM_MI, 5, v); v 67 drivers/rtc/rtc-da9055.c rtc_tm->tm_year = (v[4] & DA9055_RTC_ALM_YEAR) + 100; v 68 drivers/rtc/rtc-da9055.c rtc_tm->tm_mon = (v[3] & DA9055_RTC_ALM_MONTH) - 1; v 69 drivers/rtc/rtc-da9055.c rtc_tm->tm_mday = v[2] & DA9055_RTC_ALM_DAY; v 70 drivers/rtc/rtc-da9055.c rtc_tm->tm_hour = v[1] & DA9055_RTC_ALM_HOUR; v 71 drivers/rtc/rtc-da9055.c rtc_tm->tm_min = v[0] & DA9055_RTC_ALM_MIN; v 80 drivers/rtc/rtc-da9055.c uint8_t v[2]; v 92 drivers/rtc/rtc-da9055.c v[0] = rtc_tm->tm_hour; v 93 drivers/rtc/rtc-da9055.c v[1] = rtc_tm->tm_mday; v 95 drivers/rtc/rtc-da9055.c ret = da9055_group_write(da9055, DA9055_REG_ALARM_H, 2, v); v 128 drivers/rtc/rtc-da9055.c uint8_t v[6]; v 142 drivers/rtc/rtc-da9055.c ret = da9055_group_read(rtc->da9055, DA9055_REG_COUNT_S, 6, v); v 149 drivers/rtc/rtc-da9055.c rtc_tm->tm_year = (v[5] & DA9055_RTC_YEAR) + 100; v 150 drivers/rtc/rtc-da9055.c rtc_tm->tm_mon = (v[4] & DA9055_RTC_MONTH) - 1; v 151 drivers/rtc/rtc-da9055.c rtc_tm->tm_mday = v[3] & DA9055_RTC_DAY; v 152 drivers/rtc/rtc-da9055.c rtc_tm->tm_hour = v[2] & DA9055_RTC_HOUR; v 153 drivers/rtc/rtc-da9055.c rtc_tm->tm_min = v[1] & DA9055_RTC_MIN; v 154 drivers/rtc/rtc-da9055.c rtc_tm->tm_sec = v[0] & DA9055_RTC_SEC; v 162 drivers/rtc/rtc-da9055.c uint8_t v[6]; v 166 drivers/rtc/rtc-da9055.c v[0] = tm->tm_sec; v 167 drivers/rtc/rtc-da9055.c v[1] = tm->tm_min; v 168 drivers/rtc/rtc-da9055.c v[2] = tm->tm_hour; v 169 drivers/rtc/rtc-da9055.c v[3] = tm->tm_mday; v 170 drivers/rtc/rtc-da9055.c v[4] = tm->tm_mon + 1; v 171 drivers/rtc/rtc-da9055.c v[5] = tm->tm_year - 100; v 173 drivers/rtc/rtc-da9055.c return da9055_group_write(rtc->da9055, DA9055_REG_COUNT_S, 6, v); v 327 drivers/rtc/rtc-isl12026.c u8 *v = val; v 355 drivers/rtc/rtc-isl12026.c memcpy(payload + 2, v + num_written, chunk_size); v 86 drivers/rtc/rtc-ls1x.c unsigned long v; v 89 drivers/rtc/rtc-ls1x.c v = readl(SYS_TOYREAD0); v 93 drivers/rtc/rtc-ls1x.c t = mktime64((t & LS1X_YEAR_MASK), ls1x_get_month(v), v 94 drivers/rtc/rtc-ls1x.c ls1x_get_day(v), ls1x_get_hour(v), v 95 drivers/rtc/rtc-ls1x.c ls1x_get_min(v), ls1x_get_sec(v)); v 103 drivers/rtc/rtc-ls1x.c unsigned long v, t, c; v 106 drivers/rtc/rtc-ls1x.c v = ((rtm->tm_mon + 1) << LS1X_MONTH_OFFSET) v 112 drivers/rtc/rtc-ls1x.c writel(v, SYS_TOYWRITE0); v 146 drivers/rtc/rtc-ls1x.c unsigned long v; v 148 drivers/rtc/rtc-ls1x.c v = readl(SYS_COUNTER_CNTRL); v 149 drivers/rtc/rtc-ls1x.c if (!(v & RTC_CNTR_OK)) { v 156 drivers/rtc/rtc-ls1x.c v = 0x100000; v 157 drivers/rtc/rtc-ls1x.c while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TTS) && --v) v 160 drivers/rtc/rtc-ls1x.c if (!v) { v 188 drivers/rtc/rtc-moxart.c unsigned char v; v 192 drivers/rtc/rtc-moxart.c v = moxart_rtc_read_register(dev, GPIO_RTC_SECONDS_R); v 193 drivers/rtc/rtc-moxart.c tm->tm_sec = (((v & 0x70) >> 4) * 10) + (v & 0x0F); v 195 drivers/rtc/rtc-moxart.c v = moxart_rtc_read_register(dev, GPIO_RTC_MINUTES_R); v 196 drivers/rtc/rtc-moxart.c tm->tm_min = (((v & 0x70) >> 4) * 10) + (v & 0x0F); v 198 drivers/rtc/rtc-moxart.c v = moxart_rtc_read_register(dev, GPIO_RTC_HOURS_R); v 199 drivers/rtc/rtc-moxart.c if (v & 0x80) { /* 12-hour mode */ v 200 drivers/rtc/rtc-moxart.c tm->tm_hour = (((v & 0x10) >> 4) * 10) + (v & 0x0F); v 201 drivers/rtc/rtc-moxart.c if (v & 0x20) { /* PM mode */ v 207 drivers/rtc/rtc-moxart.c tm->tm_hour = (((v & 0x30) >> 4) * 10) + (v & 0x0F); v 210 drivers/rtc/rtc-moxart.c v = moxart_rtc_read_register(dev, GPIO_RTC_DATE_R); v 211 drivers/rtc/rtc-moxart.c tm->tm_mday = (((v & 0x30) >> 4) * 10) + (v & 0x0F); v 213 drivers/rtc/rtc-moxart.c v = moxart_rtc_read_register(dev, GPIO_RTC_MONTH_R); v 214 drivers/rtc/rtc-moxart.c tm->tm_mon = (((v & 0x10) >> 4) * 10) + (v & 0x0F); v 217 drivers/rtc/rtc-moxart.c v = moxart_rtc_read_register(dev, GPIO_RTC_YEAR_R); v 218 drivers/rtc/rtc-moxart.c tm->tm_year = (((v & 0xF0) >> 4) * 10) + (v & 0x0F); v 223 drivers/rtc/rtc-moxart.c v = moxart_rtc_read_register(dev, GPIO_RTC_DAY_R); v 224 drivers/rtc/rtc-moxart.c tm->tm_wday = (v & 0x0f) - 1; v 44 drivers/rtc/rtc-pcf8583.c #define set_ctrl(x, v) get_ctrl(x) = v v 1065 drivers/s390/block/dasd.c static int dasd_stats_show(struct seq_file *m, void *v) v 1168 drivers/s390/block/dasd.c int dasd_stats_generic_show(struct seq_file *m, void *v) v 1192 drivers/s390/block/dasd.c static int dasd_hosts_show(struct seq_file *m, void *v) v 36 drivers/s390/block/dasd_proc.c dasd_devices_show(struct seq_file *m, void *v) v 42 drivers/s390/block/dasd_proc.c device = dasd_device_from_devindex((unsigned long) v - 1); v 117 drivers/s390/block/dasd_proc.c static void *dasd_devices_next(struct seq_file *m, void *v, loff_t *pos) v 123 drivers/s390/block/dasd_proc.c static void dasd_devices_stop(struct seq_file *m, void *v) v 197 drivers/s390/block/dasd_proc.c static int dasd_stats_proc_show(struct seq_file *m, void *v) v 1160 drivers/s390/char/raw3270.c struct raw3270_view *v; v 1183 drivers/s390/char/raw3270.c v = list_entry(rp->view_list.next, struct raw3270_view, list); v 1184 drivers/s390/char/raw3270.c if (v->fn->release) v 1185 drivers/s390/char/raw3270.c v->fn->release(v); v 1187 drivers/s390/char/raw3270.c raw3270_del_view(v); v 385 drivers/s390/char/sclp.h struct gds_vector *v; v 387 drivers/s390/char/sclp.h for (v = start; (void *) v < end; v = (void *) v + v->length) v 388 drivers/s390/char/sclp.h if (v->gds_id == id) v 389 drivers/s390/char/sclp.h return v; v 45 drivers/s390/char/sclp_ocf.c struct gds_vector *v; v 50 drivers/s390/char/sclp_ocf.c v = sclp_find_gds_vector(evbuf + 1, (void *) evbuf + evbuf->length, v 52 drivers/s390/char/sclp_ocf.c if (!v) v 55 drivers/s390/char/sclp_ocf.c v = sclp_find_gds_vector(v + 1, (void *) v + v->length, 0x9f22); v 56 drivers/s390/char/sclp_ocf.c if (!v) v 59 drivers/s390/char/sclp_ocf.c sv = sclp_find_gds_subvector(v + 1, (void *) v + v->length, 0x81); v 433 drivers/s390/char/sclp_tty.c static inline void sclp_eval_textcmd(struct gds_vector *v) v 438 drivers/s390/char/sclp_tty.c end = (void *) v + v->length; v 439 drivers/s390/char/sclp_tty.c for (sv = (struct gds_subvector *) (v + 1); v 446 drivers/s390/char/sclp_tty.c static inline void sclp_eval_cpmsu(struct gds_vector *v) v 450 drivers/s390/char/sclp_tty.c end = (void *) v + v->length; v 451 drivers/s390/char/sclp_tty.c for (v = v + 1; (void *) v < end; v = (void *) v + v->length) v 452 drivers/s390/char/sclp_tty.c if (v->gds_id == GDS_ID_TEXTCMD) v 453 drivers/s390/char/sclp_tty.c sclp_eval_textcmd(v); v 457 drivers/s390/char/sclp_tty.c static inline void sclp_eval_mdsmu(struct gds_vector *v) v 459 drivers/s390/char/sclp_tty.c v = sclp_find_gds_vector(v + 1, (void *) v + v->length, GDS_ID_CPMSU); v 460 drivers/s390/char/sclp_tty.c if (v) v 461 drivers/s390/char/sclp_tty.c sclp_eval_cpmsu(v); v 466 drivers/s390/char/sclp_tty.c struct gds_vector *v; v 468 drivers/s390/char/sclp_tty.c v = sclp_find_gds_vector(evbuf + 1, (void *) evbuf + evbuf->length, v 470 drivers/s390/char/sclp_tty.c if (v) v 471 drivers/s390/char/sclp_tty.c sclp_eval_mdsmu(v); v 39 drivers/s390/char/tape_proc.c static int tape_proc_show(struct seq_file *m, void *v) v 46 drivers/s390/char/tape_proc.c n = (unsigned long) v - 1; v 91 drivers/s390/char/tape_proc.c static void *tape_proc_next(struct seq_file *m, void *v, loff_t *pos) v 97 drivers/s390/char/tape_proc.c static void tape_proc_stop(struct seq_file *m, void *v) v 113 drivers/s390/cio/qdio_debug.c static int qstat_show(struct seq_file *m, void *v) v 221 drivers/s390/cio/qdio_debug.c static int qperf_show(struct seq_file *m, void *v) v 326 drivers/sbus/char/uctrl.c int i, v; v 340 drivers/sbus/char/uctrl.c v = driver->status.external_status; v 341 drivers/sbus/char/uctrl.c for (i = 0; v != 0; i++, v >>= 1) { v 342 drivers/sbus/char/uctrl.c if (v & 1) { v 3217 drivers/scsi/advansys.c ASC_DVC_VAR *v; v 3222 drivers/scsi/advansys.c v = &boardp->dvc_var.asc_dvc_var; v 3233 drivers/scsi/advansys.c v->err_code); v 3237 drivers/scsi/advansys.c " Total Command Pending: %d\n", v->cur_total_qng); v 3247 drivers/scsi/advansys.c (v->use_tagged_qng & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); v 3257 drivers/scsi/advansys.c seq_printf(m, " %X:%u", i, v->cur_dvc_qng[i]); v 3267 drivers/scsi/advansys.c seq_printf(m, " %X:%u", i, v->max_dvc_qng[i]); v 3292 drivers/scsi/advansys.c (v->sdtr_done & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); v 3301 drivers/scsi/advansys.c ((v->init_sdtr & ADV_TID_TO_TIDMASK(i)) == 0)) { v 3311 drivers/scsi/advansys.c (boardp->sdtr_data[i] >> 4) & (v->max_sdtr_index - v 3316 drivers/scsi/advansys.c v->sdtr_period_tbl[syn_period_ix], v 3317 drivers/scsi/advansys.c 250 / v->sdtr_period_tbl[syn_period_ix], v 3319 drivers/scsi/advansys.c v->sdtr_period_tbl[syn_period_ix])); v 3325 drivers/scsi/advansys.c if ((v->sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) { v 3347 drivers/scsi/advansys.c ADV_DVC_VAR *v; v 3359 drivers/scsi/advansys.c v = &boardp->dvc_var.adv_dvc_var; v 3361 drivers/scsi/advansys.c iop_base = v->iop_base; v 3362 drivers/scsi/advansys.c chip_scsi_id = v->chip_scsi_id; v 3370 drivers/scsi/advansys.c (unsigned long)v->iop_base, v 3372 drivers/scsi/advansys.c v->err_code); v 66 drivers/scsi/aha1542.h static inline void any2scsi(u8 *p, u32 v) v 68 drivers/scsi/aha1542.h p[0] = v >> 16; v 69 drivers/scsi/aha1542.h p[1] = v >> 8; v 70 drivers/scsi/aha1542.h p[2] = v; v 154 drivers/scsi/aic7xxx/aic7xxx_93cx6.c uint16_t v; v 187 drivers/scsi/aic7xxx/aic7xxx_93cx6.c v = 0; v 191 drivers/scsi/aic7xxx/aic7xxx_93cx6.c v <<= 1; v 193 drivers/scsi/aic7xxx/aic7xxx_93cx6.c v |= 1; v 198 drivers/scsi/aic7xxx/aic7xxx_93cx6.c buf[k - start_addr] = v; v 225 drivers/scsi/aic7xxx/aic7xxx_93cx6.c uint16_t v; v 264 drivers/scsi/aic7xxx/aic7xxx_93cx6.c v = buf[k - start_addr]; v 266 drivers/scsi/aic7xxx/aic7xxx_93cx6.c if ((v & (1 << i)) != 0) v 272 drivers/scsi/aic7xxx/aic7xxx_93cx6.c if ((v & (1 << i)) != 0) v 158 drivers/scsi/aic7xxx/aiclib.h #define GETID(v, s) (unsigned)(((v) >> (s)) & 0xFFFF ?: PCI_ANY_ID) v 147 drivers/scsi/aic94xx/aic94xx_hwi.c u32 v; v 150 drivers/scsi/aic94xx/aic94xx_hwi.c err = pci_read_config_dword(pcidev, PCI_CONF_MBAR_KEY, &v); v 156 drivers/scsi/aic94xx/aic94xx_hwi.c if (v) v 157 drivers/scsi/aic94xx/aic94xx_hwi.c err = pci_write_config_dword(pcidev, PCI_CONF_MBAR_KEY, v); v 610 drivers/scsi/aic94xx/aic94xx_hwi.c u32 v; v 616 drivers/scsi/aic94xx/aic94xx_hwi.c err = pci_read_config_dword(asd_ha->pcidev, PCIC_HSTPCIX_CNTRL, &v); v 623 drivers/scsi/aic94xx/aic94xx_hwi.c v | SC_TMR_DIS); v 1264 drivers/scsi/aic94xx/aic94xx_hwi.c u32 v = asd_read_reg_dword(asd_ha, LmCONTROL(phy_id)); v 1266 drivers/scsi/aic94xx/aic94xx_hwi.c v |= LEDPOL; v 1268 drivers/scsi/aic94xx/aic94xx_hwi.c v &= ~LEDPOL; v 1269 drivers/scsi/aic94xx/aic94xx_hwi.c asd_write_reg_dword(asd_ha, LmCONTROL(phy_id), v); v 1285 drivers/scsi/aic94xx/aic94xx_hwi.c u32 v; v 1287 drivers/scsi/aic94xx/aic94xx_hwi.c v = asd_read_reg_dword(asd_ha, GPIOOER); v 1289 drivers/scsi/aic94xx/aic94xx_hwi.c v |= (1 << phy_id); v 1291 drivers/scsi/aic94xx/aic94xx_hwi.c v &= ~(1 << phy_id); v 1292 drivers/scsi/aic94xx/aic94xx_hwi.c asd_write_reg_dword(asd_ha, GPIOOER, v); v 1294 drivers/scsi/aic94xx/aic94xx_hwi.c v = asd_read_reg_dword(asd_ha, GPIOCNFGR); v 1296 drivers/scsi/aic94xx/aic94xx_hwi.c v |= (1 << phy_id); v 1298 drivers/scsi/aic94xx/aic94xx_hwi.c v &= ~(1 << phy_id); v 1299 drivers/scsi/aic94xx/aic94xx_hwi.c asd_write_reg_dword(asd_ha, GPIOCNFGR, v); v 299 drivers/scsi/aic94xx/aic94xx_sds.c u32 v; v 305 drivers/scsi/aic94xx/aic94xx_sds.c err = pci_read_config_dword(pcidev, PCIC_INTRPT_STAT, &v); v 314 drivers/scsi/aic94xx/aic94xx_sds.c "is 0x%x\n", v); v 316 drivers/scsi/aic94xx/aic94xx_sds.c if (v) v 318 drivers/scsi/aic94xx/aic94xx_sds.c PCIC_INTRPT_STAT, v); v 595 drivers/scsi/aic94xx/aic94xx_sds.c u32 v; v 596 drivers/scsi/aic94xx/aic94xx_sds.c for (v = 0; v < ASD_FLASH_SIZE; v += FLASH_NEXT_ENTRY_OFFS) { v 597 drivers/scsi/aic94xx/aic94xx_sds.c asd_read_flash_seg(asd_ha, flash_dir, v, v 601 drivers/scsi/aic94xx/aic94xx_sds.c asd_ha->hw_prof.flash.dir_offs = v; v 602 drivers/scsi/aic94xx/aic94xx_sds.c asd_read_flash_seg(asd_ha, flash_dir, v, v 41 drivers/scsi/arm/cumana_1.c #define L(v) (((v)<<16)|((v) & 0x0000ffff)) v 42 drivers/scsi/arm/cumana_1.c #define H(v) (((v)>>16)|((v) & 0xffff0000)) v 58 drivers/scsi/arm/cumana_1.c unsigned long v; v 64 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 65 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 66 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 67 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 68 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 69 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 70 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 71 drivers/scsi/arm/cumana_1.c v=*laddr++; writew(L(v), dma); writew(H(v), dma); v 85 drivers/scsi/atari_scsi.c unsigned long v = val; \ v 86 drivers/scsi/atari_scsi.c tt_scsi_dma.elt##_lo = v & 0xff; \ v 87 drivers/scsi/atari_scsi.c v >>= 8; \ v 88 drivers/scsi/atari_scsi.c tt_scsi_dma.elt##_lmd = v & 0xff; \ v 89 drivers/scsi/atari_scsi.c v >>= 8; \ v 90 drivers/scsi/atari_scsi.c tt_scsi_dma.elt##_hmd = v & 0xff; \ v 91 drivers/scsi/atari_scsi.c v >>= 8; \ v 92 drivers/scsi/atari_scsi.c tt_scsi_dma.elt##_hi = v & 0xff; \ v 261 drivers/scsi/csiostor/csio_hw.c csio_hw_get_vpd_keyword_val(const struct t4_vpd_hdr *v, const char *kw) v 265 drivers/scsi/csiostor/csio_hw.c const uint8_t *buf = &v->id_tag; v 266 drivers/scsi/csiostor/csio_hw.c const uint8_t *vpdr_len = &v->vpdr_tag; v 307 drivers/scsi/csiostor/csio_hw.c const struct t4_vpd_hdr *v; v 341 drivers/scsi/csiostor/csio_hw.c v = (const struct t4_vpd_hdr *)vpd; v 344 drivers/scsi/csiostor/csio_hw.c var = csio_hw_get_vpd_keyword_val(v, name); \ v 365 drivers/scsi/csiostor/csio_hw.c memcpy(p->id, v->id_data, ID_LEN); v 3158 drivers/scsi/csiostor/csio_hw.c uint64_t v; v 3186 drivers/scsi/csiostor/csio_hw.c v = (uint64_t)csio_rd_reg32(hw, SGE_INT_CAUSE1_A) | v 3188 drivers/scsi/csiostor/csio_hw.c if (v) { v 3190 drivers/scsi/csiostor/csio_hw.c (unsigned long long)v); v 3191 drivers/scsi/csiostor/csio_hw.c csio_wr_reg32(hw, (uint32_t)(v & 0xFFFFFFFF), v 3193 drivers/scsi/csiostor/csio_hw.c csio_wr_reg32(hw, (uint32_t)(v >> 32), SGE_INT_CAUSE2_A); v 3196 drivers/scsi/csiostor/csio_hw.c v |= csio_handle_intr_status(hw, SGE_INT_CAUSE3_A, sge_intr_info); v 3199 drivers/scsi/csiostor/csio_hw.c v != 0) v 3475 drivers/scsi/csiostor/csio_hw.c unsigned int addr, cnt_addr, v; v 3485 drivers/scsi/csiostor/csio_hw.c v = csio_rd_reg32(hw, addr) & MEM_INT_MASK; v 3486 drivers/scsi/csiostor/csio_hw.c if (v & PERR_INT_CAUSE_F) v 3488 drivers/scsi/csiostor/csio_hw.c if (v & ECC_CE_INT_CAUSE_F) { v 3495 drivers/scsi/csiostor/csio_hw.c if (v & ECC_UE_INT_CAUSE_F) v 3498 drivers/scsi/csiostor/csio_hw.c csio_wr_reg32(hw, v, addr); v 3499 drivers/scsi/csiostor/csio_hw.c if (v & (PERR_INT_CAUSE_F | ECC_UE_INT_CAUSE_F)) v 3508 drivers/scsi/csiostor/csio_hw.c uint32_t v, status = csio_rd_reg32(hw, MA_INT_CAUSE_A); v 3514 drivers/scsi/csiostor/csio_hw.c v = csio_rd_reg32(hw, MA_INT_WRAP_STATUS_A); v 3517 drivers/scsi/csiostor/csio_hw.c MEM_WRAP_CLIENT_NUM_G(v), MEM_WRAP_ADDRESS_G(v) << 4); v 3561 drivers/scsi/csiostor/csio_hw.c uint32_t v = csio_rd_reg32(hw, T5_PORT_REG(port, MAC_PORT_INT_CAUSE_A)); v 3563 drivers/scsi/csiostor/csio_hw.c v &= TXFIFO_PRTY_ERR_F | RXFIFO_PRTY_ERR_F; v 3564 drivers/scsi/csiostor/csio_hw.c if (!v) v 3567 drivers/scsi/csiostor/csio_hw.c if (v & TXFIFO_PRTY_ERR_F) v 3569 drivers/scsi/csiostor/csio_hw.c if (v & RXFIFO_PRTY_ERR_F) v 3571 drivers/scsi/csiostor/csio_hw.c csio_wr_reg32(hw, v, T5_PORT_REG(port, MAC_PORT_INT_CAUSE_A)); v 426 drivers/scsi/fcoe/fcoe_sysfs.c unsigned long v; v 428 drivers/scsi/fcoe/fcoe_sysfs.c err = kstrtoul(buf, 10, &v); v 429 drivers/scsi/fcoe/fcoe_sysfs.c if (err || v > UINT_MAX) v 432 drivers/scsi/fcoe/fcoe_sysfs.c *var = v; v 632 drivers/scsi/imm.c unsigned char r, v; v 635 drivers/scsi/imm.c v = cmd->cmnd[0]; v 636 drivers/scsi/imm.c bulk = ((v == READ_6) || v 637 drivers/scsi/imm.c (v == READ_10) || (v == WRITE_6) || (v == WRITE_10)); v 217 drivers/scsi/ips.c #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v); v 221 drivers/scsi/ips.c #define DEBUG_VAR(i, s, v...) v 2054 drivers/scsi/megaraid.c proc_show_config(struct seq_file *m, void *v) v 2118 drivers/scsi/megaraid.c proc_show_stat(struct seq_file *m, void *v) v 2153 drivers/scsi/megaraid.c proc_show_mbox(struct seq_file *m, void *v) v 2180 drivers/scsi/megaraid.c proc_show_rebuild_rate(struct seq_file *m, void *v) v 2223 drivers/scsi/megaraid.c proc_show_battery(struct seq_file *m, void *v) v 2442 drivers/scsi/megaraid.c proc_show_pdrv_ch0(struct seq_file *m, void *v) v 2456 drivers/scsi/megaraid.c proc_show_pdrv_ch1(struct seq_file *m, void *v) v 2470 drivers/scsi/megaraid.c proc_show_pdrv_ch2(struct seq_file *m, void *v) v 2484 drivers/scsi/megaraid.c proc_show_pdrv_ch3(struct seq_file *m, void *v) v 2683 drivers/scsi/megaraid.c proc_show_rdrv_10(struct seq_file *m, void *v) v 2697 drivers/scsi/megaraid.c proc_show_rdrv_20(struct seq_file *m, void *v) v 2711 drivers/scsi/megaraid.c proc_show_rdrv_30(struct seq_file *m, void *v) v 2725 drivers/scsi/megaraid.c proc_show_rdrv_40(struct seq_file *m, void *v) v 642 drivers/scsi/mesh.c int v, tr; v 658 drivers/scsi/mesh.c v = (ms->clk_freq / 5000) * period; v 659 drivers/scsi/mesh.c if (v <= 250000) { v 661 drivers/scsi/mesh.c v = 0; v 666 drivers/scsi/mesh.c v = (v + 99999) / 100000 - 2; v 667 drivers/scsi/mesh.c if (v > 15) v 668 drivers/scsi/mesh.c v = 15; /* oops */ v 669 drivers/scsi/mesh.c tr = ((ms->clk_freq / (v + 2)) + 199999) / 200000; v 673 drivers/scsi/mesh.c tp->sync_params = SYNC_PARAMS(offset, v); v 85 drivers/scsi/mvme16x_scsi.c volatile unsigned long v; v 88 drivers/scsi/mvme16x_scsi.c v = in_be32(0xfff4202c); v 89 drivers/scsi/mvme16x_scsi.c v = (v & ~0xff) | 0x10 | 4; v 90 drivers/scsi/mvme16x_scsi.c out_be32(0xfff4202c, v); v 113 drivers/scsi/mvme16x_scsi.c volatile unsigned long v; v 115 drivers/scsi/mvme16x_scsi.c v = in_be32(0xfff4202c); v 116 drivers/scsi/mvme16x_scsi.c v &= ~0x10; v 117 drivers/scsi/mvme16x_scsi.c out_be32(0xfff4202c, v); v 168 drivers/scsi/mvsas/mv_94xx.c phy_cfg_tmp.v = mvs_read_port_vsr_data(mvi, phy_id); v 169 drivers/scsi/mvsas/mv_94xx.c phy_cfg.v = 0; v 200 drivers/scsi/mvsas/mv_94xx.c mvs_write_port_vsr_data(mvi, phy_id, phy_cfg.v); v 173 drivers/scsi/mvsas/mv_94xx.h u32 v; v 317 drivers/scsi/mvsas/mv_94xx.h mv_ffc64(u64 v) v 319 drivers/scsi/mvsas/mv_94xx.h u64 x = ~v; v 913 drivers/scsi/mvumi.c void *virmem, *v; v 935 drivers/scsi/mvumi.c v = res_mgnt->virt_addr; v 939 drivers/scsi/mvumi.c v += offset; v 940 drivers/scsi/mvumi.c mhba->ib_list = v; v 943 drivers/scsi/mvumi.c v += sizeof(struct mvumi_dyn_list_entry) * mhba->max_io; v 945 drivers/scsi/mvumi.c mhba->ib_frame = v; v 948 drivers/scsi/mvumi.c v += mhba->ib_max_size * mhba->max_io; v 954 drivers/scsi/mvumi.c v += offset; v 955 drivers/scsi/mvumi.c mhba->ib_shadow = v; v 958 drivers/scsi/mvumi.c v += sizeof(u32)*2; v 963 drivers/scsi/mvumi.c v += offset; v 964 drivers/scsi/mvumi.c mhba->ob_shadow = v; v 967 drivers/scsi/mvumi.c v += 8; v 971 drivers/scsi/mvumi.c v += offset; v 972 drivers/scsi/mvumi.c mhba->ob_shadow = v; v 975 drivers/scsi/mvumi.c v += 4; v 981 drivers/scsi/mvumi.c v += offset; v 983 drivers/scsi/mvumi.c mhba->ob_list = v; v 789 drivers/scsi/ncr53c8xx.c int c, h, t, u, v; v 797 drivers/scsi/ncr53c8xx.c v = simple_strtoul(p, &ep, 0); v 806 drivers/scsi/ncr53c8xx.c t = (target == v) ? v : NO_TARGET; v 811 drivers/scsi/ncr53c8xx.c u = (lun == v) ? v : NO_LUN; v 817 drivers/scsi/ncr53c8xx.c return v; v 442 drivers/scsi/ncr53c8xx.h #define OUTL_DSP(v) \ v 445 drivers/scsi/ncr53c8xx.h OUTL (nc_dsp, (v)); \ v 525 drivers/scsi/ppa.c unsigned char r, v; v 528 drivers/scsi/ppa.c v = cmd->cmnd[0]; v 529 drivers/scsi/ppa.c bulk = ((v == READ_6) || v 530 drivers/scsi/ppa.c (v == READ_10) || (v == WRITE_6) || (v == WRITE_10)); v 861 drivers/scsi/qla2xxx/qla_tmpl.c uint8_t v[] = { 0, 0, 0, 0, 0, 0 }; v 865 drivers/scsi/qla2xxx/qla_tmpl.c v+0, v+1, v+2, v+3, v+4, v+5) != 6); v 867 drivers/scsi/qla2xxx/qla_tmpl.c tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0]; v 868 drivers/scsi/qla2xxx/qla_tmpl.c tmp->driver_info[1] = v[5] << 8 | v[4]; v 179 drivers/scsi/qla4xxx/ql4_def.h #define SET_BITVAL(o, n, v) { \ v 181 drivers/scsi/qla4xxx/ql4_def.h n |= v; \ v 183 drivers/scsi/qla4xxx/ql4_def.h n &= ~v; \ v 623 drivers/scsi/scsi_devinfo.c static int devinfo_seq_show(struct seq_file *m, void *v) v 625 drivers/scsi/scsi_devinfo.c struct double_list *dl = v; v 662 drivers/scsi/scsi_devinfo.c static void *devinfo_seq_next(struct seq_file *m, void *v, loff_t *ppos) v 664 drivers/scsi/scsi_devinfo.c struct double_list *dl = v; v 685 drivers/scsi/scsi_devinfo.c static void devinfo_seq_stop(struct seq_file *m, void *v) v 687 drivers/scsi/scsi_devinfo.c kfree(v); v 74 drivers/scsi/scsi_proc.c static int proc_scsi_show(struct seq_file *m, void *v) v 396 drivers/scsi/scsi_proc.c static void *scsi_seq_next(struct seq_file *sfile, void *v, loff_t *pos) v 400 drivers/scsi/scsi_proc.c return next_scsi_device(v); v 403 drivers/scsi/scsi_proc.c static void scsi_seq_stop(struct seq_file *sfile, void *v) v 405 drivers/scsi/scsi_proc.c put_device(v); v 242 drivers/scsi/sd.c bool v; v 247 drivers/scsi/sd.c if (kstrtobool(buf, &v)) v 250 drivers/scsi/sd.c sdp->manage_start_stop = v; v 268 drivers/scsi/sd.c bool v; v 278 drivers/scsi/sd.c if (kstrtobool(buf, &v)) v 281 drivers/scsi/sd.c sdp->allow_restart = v; v 2298 drivers/scsi/sg.c static int sg_proc_seq_show_int(struct seq_file *s, void *v); v 2324 drivers/scsi/sg.c static int sg_proc_seq_show_version(struct seq_file *s, void *v); v 2325 drivers/scsi/sg.c static int sg_proc_seq_show_devhdr(struct seq_file *s, void *v); v 2326 drivers/scsi/sg.c static int sg_proc_seq_show_dev(struct seq_file *s, void *v); v 2328 drivers/scsi/sg.c static void * dev_seq_next(struct seq_file *s, void *v, loff_t *pos); v 2329 drivers/scsi/sg.c static void dev_seq_stop(struct seq_file *s, void *v); v 2337 drivers/scsi/sg.c static int sg_proc_seq_show_devstrs(struct seq_file *s, void *v); v 2345 drivers/scsi/sg.c static int sg_proc_seq_show_debug(struct seq_file *s, void *v); v 2373 drivers/scsi/sg.c static int sg_proc_seq_show_int(struct seq_file *s, void *v) v 2425 drivers/scsi/sg.c static int sg_proc_seq_show_version(struct seq_file *s, void *v) v 2432 drivers/scsi/sg.c static int sg_proc_seq_show_devhdr(struct seq_file *s, void *v) v 2458 drivers/scsi/sg.c static void * dev_seq_next(struct seq_file *s, void *v, loff_t *pos) v 2466 drivers/scsi/sg.c static void dev_seq_stop(struct seq_file *s, void *v) v 2471 drivers/scsi/sg.c static int sg_proc_seq_show_dev(struct seq_file *s, void *v) v 2473 drivers/scsi/sg.c struct sg_proc_deviter * it = (struct sg_proc_deviter *) v; v 2497 drivers/scsi/sg.c static int sg_proc_seq_show_devstrs(struct seq_file *s, void *v) v 2499 drivers/scsi/sg.c struct sg_proc_deviter * it = (struct sg_proc_deviter *) v; v 2580 drivers/scsi/sg.c static int sg_proc_seq_show_debug(struct seq_file *s, void *v) v 2582 drivers/scsi/sg.c struct sg_proc_deviter * it = (struct sg_proc_deviter *) v; v 61 drivers/scsi/snic/snic_ctl.c int v[4] = {0}; v 79 drivers/scsi/snic/snic_ctl.c v[i] = v[i] * 10 + (c - '0'); v 84 drivers/scsi/snic/snic_ctl.c if (v[i] > 0xff) v 87 drivers/scsi/snic/snic_ctl.c x |= (v[0] << 24) | v[1] << 16 | v[2] << 8 | v[3]; v 1010 drivers/scsi/sym53c8xx_2/sym_glue.c #define GET_INT_ARG(ptr, len, v) \ v 1011 drivers/scsi/sym53c8xx_2/sym_glue.c if (!(arg_len = get_int_arg(ptr, len, &(v)))) \ v 4361 drivers/scsi/sym53c8xx_2/sym_hipd.c #define sym_printk(lvl, tp, cp, fmt, v...) do { \ v 4363 drivers/scsi/sym53c8xx_2/sym_hipd.c scmd_printk(lvl, cp->cmd, fmt, ##v); \ v 4365 drivers/scsi/sym53c8xx_2/sym_hipd.c starget_printk(lvl, tp->starget, fmt, ##v); \ v 196 drivers/scsi/sym53c8xx_2/sym_hipd.h #define OUTB(np, r, v) OUTB_OFF(np, offsetof(struct sym_reg, r), (v)) v 197 drivers/scsi/sym53c8xx_2/sym_hipd.h #define OUTW(np, r, v) OUTW_OFF(np, offsetof(struct sym_reg, r), (v)) v 198 drivers/scsi/sym53c8xx_2/sym_hipd.h #define OUTL(np, r, v) OUTL_OFF(np, offsetof(struct sym_reg, r), (v)) v 212 drivers/scsi/sym53c8xx_2/sym_hipd.h #define OUTL_DSP(np, v) \ v 215 drivers/scsi/sym53c8xx_2/sym_hipd.h OUTL(np, nc_dsp, (v)); \ v 17 drivers/scsi/ufs/ufshcd-dwc.c const struct ufshcd_dme_attr_val *v, int n) v 23 drivers/scsi/ufs/ufshcd-dwc.c ret = ufshcd_dme_set_attr(hba, v[attr_node].attr_sel, v 24 drivers/scsi/ufs/ufshcd-dwc.c ATTR_SET_NOR, v[attr_node].mib_val, v[attr_node].peer); v 22 drivers/scsi/ufs/ufshcd-dwc.h const struct ufshcd_dme_attr_val *v, int n); v 262 drivers/scsi/ufs/ufshci.h #define UIC_GET_ATTR_ID(v) (((v) >> 16) & 0xFFFF) v 76 drivers/slimbus/qcom-ctrl.c #define CFG_PORT(r, v) ((v) ? CFG_PORT_V2(r) : CFG_PORT_V1(r)) v 327 drivers/soc/fsl/dpio/qbman-portal.c u8 *v = cmd; v 331 drivers/soc/fsl/dpio/qbman-portal.c *v = cmd_verb | p->mc.valid_bit; v 333 drivers/soc/fsl/dpio/qbman-portal.c *v = cmd_verb | p->mc.valid_bit; v 91 drivers/soc/fsl/qbman/bman_ccsr.c u32 v = bm_ccsr_in(REG_IP_REV_1); v 92 drivers/soc/fsl/qbman/bman_ccsr.c *id = (v >> 16); v 93 drivers/soc/fsl/qbman/bman_ccsr.c *major = (v >> 8) & 0xff; v 94 drivers/soc/fsl/qbman/bman_ccsr.c *minor = v & 0xff; v 2562 drivers/soc/fsl/qbman/qman.c static int _qm_mr_consume_and_match_verb(struct qm_portal *p, int v) v 2570 drivers/soc/fsl/qbman/qman.c if ((msg->verb & QM_MR_VERB_TYPE_MASK) == v) v 94 drivers/soc/fsl/qbman/qman_ccsr.c #define MCR_get_rslt(v) (u8)((v) >> 24) v 337 drivers/soc/fsl/qbman/qman_ccsr.c u32 v = qm_ccsr_in(REG_IP_REV_1); v 338 drivers/soc/fsl/qbman/qman_ccsr.c *id = (v >> 16); v 339 drivers/soc/fsl/qbman/qman_ccsr.c *major = (v >> 8) & 0xff; v 340 drivers/soc/fsl/qbman/qman_ccsr.c *minor = v & 0xff; v 246 drivers/soc/fsl/qbman/qman_priv.h #define QM_SDQCR_TOKEN_SET(v) (((v) & 0xff) << 16) v 247 drivers/soc/fsl/qbman/qman_priv.h #define QM_SDQCR_TOKEN_GET(v) (((v) >> 16) & 0xff) v 155 drivers/soc/ti/knav_dma.c u32 v = 0; v 160 drivers/soc/ti/knav_dma.c v |= DMA_TX_FILT_PSWORDS; v 162 drivers/soc/ti/knav_dma.c v |= DMA_TX_FILT_EINFO; v 163 drivers/soc/ti/knav_dma.c writel_relaxed(v, &chan->reg_chan->mode); v 171 drivers/soc/ti/knav_dma.c v = 0; v 174 drivers/soc/ti/knav_dma.c v |= CHAN_HAS_EPIB; v 176 drivers/soc/ti/knav_dma.c v |= CHAN_HAS_PSINFO; v 178 drivers/soc/ti/knav_dma.c v |= CHAN_ERR_RETRY; v 179 drivers/soc/ti/knav_dma.c v |= (cfg->u.rx.desc_type & DESC_TYPE_MASK) << DESC_TYPE_SHIFT; v 181 drivers/soc/ti/knav_dma.c v |= CHAN_PSINFO_AT_SOP; v 182 drivers/soc/ti/knav_dma.c v |= (cfg->u.rx.sop_offset & CHAN_SOP_OFF_MASK) v 184 drivers/soc/ti/knav_dma.c v |= cfg->u.rx.dst_q & CHAN_QNUM_MASK; v 186 drivers/soc/ti/knav_dma.c writel_relaxed(v, &chan->reg_rx_flow->control); v 190 drivers/soc/ti/knav_dma.c v = cfg->u.rx.fdq[0] << 16; v 191 drivers/soc/ti/knav_dma.c v |= cfg->u.rx.fdq[1] & CHAN_QNUM_MASK; v 192 drivers/soc/ti/knav_dma.c writel_relaxed(v, &chan->reg_rx_flow->fdq_sel[0]); v 194 drivers/soc/ti/knav_dma.c v = cfg->u.rx.fdq[2] << 16; v 195 drivers/soc/ti/knav_dma.c v |= cfg->u.rx.fdq[3] & CHAN_QNUM_MASK; v 196 drivers/soc/ti/knav_dma.c writel_relaxed(v, &chan->reg_rx_flow->fdq_sel[1]); v 277 drivers/soc/ti/knav_dma.c unsigned v; v 281 drivers/soc/ti/knav_dma.c v = dma->loopback ? DMA_LOOPBACK : 0; v 282 drivers/soc/ti/knav_dma.c writel_relaxed(v, &dma->reg_global->emulation_control); v 284 drivers/soc/ti/knav_dma.c v = readl_relaxed(&dma->reg_global->perf_control); v 285 drivers/soc/ti/knav_dma.c v |= ((dma->rx_timeout & DMA_RX_TIMEOUT_MASK) << DMA_RX_TIMEOUT_SHIFT); v 286 drivers/soc/ti/knav_dma.c writel_relaxed(v, &dma->reg_global->perf_control); v 288 drivers/soc/ti/knav_dma.c v = ((dma->tx_priority << DMA_TX_PRIO_SHIFT) | v 291 drivers/soc/ti/knav_dma.c writel_relaxed(v, &dma->reg_global->priority_control); v 306 drivers/soc/ti/knav_dma.c unsigned v; v 309 drivers/soc/ti/knav_dma.c v = ~DMA_ENABLE & REG_MASK; v 312 drivers/soc/ti/knav_dma.c writel_relaxed(v, &dma->reg_rx_chan[i].control); v 315 drivers/soc/ti/knav_dma.c writel_relaxed(v, &dma->reg_tx_chan[i].control); v 358 drivers/soc/ti/knav_dma.c static int dma_debug_show(struct seq_file *s, void *v) v 462 drivers/soc/ti/knav_qmss_queue.c static int knav_queue_debug_show(struct seq_file *s, void *v) v 90 drivers/spi/spi-cavium.c u64 v = readq(p->register_base + OCTEON_SPI_DAT0(p) + (8 * i)); v 91 drivers/spi/spi-cavium.c *rx_buf++ = (u8)v; v 118 drivers/spi/spi-cavium.c u64 v = readq(p->register_base + OCTEON_SPI_DAT0(p) + (8 * i)); v 119 drivers/spi/spi-cavium.c *rx_buf++ = (u8)v; v 181 drivers/spi/spi-davinci.c u32 v = ioread32(addr); v 183 drivers/spi/spi-davinci.c v |= bits; v 184 drivers/spi/spi-davinci.c iowrite32(v, addr); v 189 drivers/spi/spi-davinci.c u32 v = ioread32(addr); v 191 drivers/spi/spi-davinci.c v &= ~bits; v 192 drivers/spi/spi-davinci.c iowrite32(v, addr); v 157 drivers/spi/spi-mxic.c #define IDLY_CODE_VAL(x, v) ((v) << (((x) % 4) * 8)) v 192 drivers/spi/spi-pic32.c __type v; \ v 195 drivers/spi/spi-pic32.c v = read##__bwl(&pic32s->regs->buf); \ v 197 drivers/spi/spi-pic32.c *(__type *)(pic32s->rx) = v; \ v 204 drivers/spi/spi-pic32.c __type v; \ v 207 drivers/spi/spi-pic32.c v = (__type)~0U; \ v 209 drivers/spi/spi-pic32.c v = *(__type *)(pic32s->tx); \ v 210 drivers/spi/spi-pic32.c write##__bwl(v, &pic32s->regs->buf); \ v 392 drivers/spi/spi-pic32.c u32 buswidth, v; v 422 drivers/spi/spi-pic32.c v = readl(&pic32s->regs->ctrl); v 423 drivers/spi/spi-pic32.c v &= ~(CTRL_BPW_MASK << CTRL_BPW_SHIFT); v 424 drivers/spi/spi-pic32.c v |= buswidth << CTRL_BPW_SHIFT; v 425 drivers/spi/spi-pic32.c writel(v, &pic32s->regs->ctrl); v 106 drivers/spi/spi-s3c64xx.c #define S3C64XX_SPI_ST_TX_DONE(v, i) (((v) & \ v 108 drivers/spi/spi-s3c64xx.c #define TX_FIFO_LVL(v, i) (((v) >> 6) & FIFO_LVL_MASK(i)) v 109 drivers/spi/spi-s3c64xx.c #define RX_FIFO_LVL(v, i) (((v) >> (i)->port_conf->rx_lvl_offset) & \ v 54 drivers/spi/spi-xtensa-xtfpga.c u32 v, u8 bits, unsigned flags) v 58 drivers/spi/spi-xtensa-xtfpga.c xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0)); v 581 drivers/ssb/driver_pcicore.c u32 v; v 584 drivers/ssb/driver_pcicore.c v = (1 << 30); /* Start of Transaction */ v 585 drivers/ssb/driver_pcicore.c v |= (1 << 28); /* Write Transaction */ v 586 drivers/ssb/driver_pcicore.c v |= (1 << 17); /* Turnaround */ v 587 drivers/ssb/driver_pcicore.c v |= (0x1F << 18); v 588 drivers/ssb/driver_pcicore.c v |= (phy << 4); v 589 drivers/ssb/driver_pcicore.c pcicore_write32(pc, mdio_data, v); v 593 drivers/ssb/driver_pcicore.c v = pcicore_read32(pc, mdio_control); v 594 drivers/ssb/driver_pcicore.c if (v & 0x100 /* Trans complete */) v 606 drivers/ssb/driver_pcicore.c u32 v; v 609 drivers/ssb/driver_pcicore.c v = 0x80; /* Enable Preamble Sequence */ v 610 drivers/ssb/driver_pcicore.c v |= 0x2; /* MDIO Clock Divisor */ v 611 drivers/ssb/driver_pcicore.c pcicore_write32(pc, mdio_control, v); v 618 drivers/ssb/driver_pcicore.c v = (1 << 30); /* Start of Transaction */ v 619 drivers/ssb/driver_pcicore.c v |= (1 << 29); /* Read Transaction */ v 620 drivers/ssb/driver_pcicore.c v |= (1 << 17); /* Turnaround */ v 622 drivers/ssb/driver_pcicore.c v |= (u32)device << 22; v 623 drivers/ssb/driver_pcicore.c v |= (u32)address << 18; v 624 drivers/ssb/driver_pcicore.c pcicore_write32(pc, mdio_data, v); v 628 drivers/ssb/driver_pcicore.c v = pcicore_read32(pc, mdio_control); v 629 drivers/ssb/driver_pcicore.c if (v & 0x100 /* Trans complete */) { v 646 drivers/ssb/driver_pcicore.c u32 v; v 649 drivers/ssb/driver_pcicore.c v = 0x80; /* Enable Preamble Sequence */ v 650 drivers/ssb/driver_pcicore.c v |= 0x2; /* MDIO Clock Divisor */ v 651 drivers/ssb/driver_pcicore.c pcicore_write32(pc, mdio_control, v); v 658 drivers/ssb/driver_pcicore.c v = (1 << 30); /* Start of Transaction */ v 659 drivers/ssb/driver_pcicore.c v |= (1 << 28); /* Write Transaction */ v 660 drivers/ssb/driver_pcicore.c v |= (1 << 17); /* Turnaround */ v 662 drivers/ssb/driver_pcicore.c v |= (u32)device << 22; v 663 drivers/ssb/driver_pcicore.c v |= (u32)address << 18; v 664 drivers/ssb/driver_pcicore.c v |= data; v 665 drivers/ssb/driver_pcicore.c pcicore_write32(pc, mdio_data, v); v 669 drivers/ssb/driver_pcicore.c v = pcicore_read32(pc, mdio_control); v 670 drivers/ssb/driver_pcicore.c if (v & 0x100 /* Trans complete */) v 821 drivers/ssb/main.c static u32 clkfactor_f6_resolve(u32 v) v 824 drivers/ssb/main.c switch (v) { v 330 drivers/ssb/pci.c u16 v; v 333 drivers/ssb/pci.c v = in[SPOFF(offset)]; v 334 drivers/ssb/pci.c gain = (v & mask) >> shift; v 70 drivers/staging/comedi/drivers/comedi_8255.c unsigned int v; v 85 drivers/staging/comedi/drivers/comedi_8255.c v = spriv->io(dev, 0, I8255_DATA_A_REG, 0, regbase); v 86 drivers/staging/comedi/drivers/comedi_8255.c v |= (spriv->io(dev, 0, I8255_DATA_B_REG, 0, regbase) << 8); v 87 drivers/staging/comedi/drivers/comedi_8255.c v |= (spriv->io(dev, 0, I8255_DATA_C_REG, 0, regbase) << 16); v 89 drivers/staging/comedi/drivers/comedi_8255.c data[1] = v; v 248 drivers/staging/comedi/drivers/plx9080.h #define PLX_DMPBAM_TO_PAFL(v) ((((BIT(10) & (v)) >> 1) | \ v 249 drivers/staging/comedi/drivers/plx9080.h (GENMASK(8, 5) & (v))) >> 5) v 613 drivers/staging/comedi/drivers/s626.h #define S626_UNMAKE(v, w, p) (((v) >> (p)) & ((1 << (w)) - 1)) v 669 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_INDXSRC_B(v) \ v 670 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_INDXSRC_B, S626_CRABIT_INDXSRC_B) v 671 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_CNTSRC_B(v) \ v 672 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_CNTSRC_B, S626_CRABIT_CNTSRC_B) v 673 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_INDXPOL_A(v) \ v 674 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_INDXPOL_A, S626_CRABIT_INDXPOL_A) v 675 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_LOADSRC_A(v) \ v 676 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_LOADSRC_A, S626_CRABIT_LOADSRC_A) v 677 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_CLKMULT_A(v) \ v 678 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_CLKMULT_A, S626_CRABIT_CLKMULT_A) v 679 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_INTSRC_A(v) \ v 680 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_INTSRC_A, S626_CRABIT_INTSRC_A) v 681 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_CLKPOL_A(v) \ v 682 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_CLKPOL_A, S626_CRABIT_CLKPOL_A) v 683 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_INDXSRC_A(v) \ v 684 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_INDXSRC_A, S626_CRABIT_INDXSRC_A) v 685 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRA_CNTSRC_A(v) \ v 686 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRAWID_CNTSRC_A, S626_CRABIT_CNTSRC_A) v 771 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_CNTDIR_B(v) \ v 772 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_CNTDIR_B, S626_CRBBIT_CNTDIR_B) v 773 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_OVERDO_A(v) \ v 774 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_OVERDO_A, S626_CRBBIT_OVERDO_A) v 775 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_OVERDO_B(v) \ v 776 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_OVERDO_B, S626_CRBBIT_OVERDO_B) v 777 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_CLKENAB_A(v) \ v 778 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_CLKENAB_A, S626_CRBBIT_CLKENAB_A) v 779 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_INTSRC_B(v) \ v 780 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_INTSRC_B, S626_CRBBIT_INTSRC_B) v 781 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_LATCHSRC(v) \ v 782 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_LATCHSRC, S626_CRBBIT_LATCHSRC) v 783 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_LOADSRC_B(v) \ v 784 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_LOADSRC_B, S626_CRBBIT_LOADSRC_B) v 785 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_CLEAR_B(v) \ v 786 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_CLEAR_B, S626_CRBBIT_CLEAR_B) v 787 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_CLKMULT_B(v) \ v 788 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_CLKMULT_B, S626_CRBBIT_CLKMULT_B) v 789 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_CLKENAB_B(v) \ v 790 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_CLKENAB_B, S626_CRBBIT_CLKENAB_B) v 791 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_INDXPOL_B(v) \ v 792 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_INDXPOL_B, S626_CRBBIT_INDXPOL_B) v 793 drivers/staging/comedi/drivers/s626.h #define S626_GET_CRB_CLKPOL_B(v) \ v 794 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_CRBWID_CLKPOL_B, S626_CRBBIT_CLKPOL_B) v 850 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_INTSRC(v) \ v 851 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_INTSRC, S626_STDBIT_INTSRC) v 852 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_LATCHSRC(v) \ v 853 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_LATCHSRC, S626_STDBIT_LATCHSRC) v 854 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_LOADSRC(v) \ v 855 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_LOADSRC, S626_STDBIT_LOADSRC) v 856 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_INDXSRC(v) \ v 857 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_INDXSRC, S626_STDBIT_INDXSRC) v 858 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_INDXPOL(v) \ v 859 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_INDXPOL, S626_STDBIT_INDXPOL) v 860 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_ENCMODE(v) \ v 861 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_ENCMODE, S626_STDBIT_ENCMODE) v 862 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_CLKPOL(v) \ v 863 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_CLKPOL, S626_STDBIT_CLKPOL) v 864 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_CLKMULT(v) \ v 865 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_CLKMULT, S626_STDBIT_CLKMULT) v 866 drivers/staging/comedi/drivers/s626.h #define S626_GET_STD_CLKENAB(v) \ v 867 drivers/staging/comedi/drivers/s626.h S626_UNMAKE((v), S626_STDWID_CLKENAB, S626_STDBIT_CLKENAB) v 21 drivers/staging/comedi/proc.c static int comedi_read(struct seq_file *m, void *v) v 64 drivers/staging/exfat/exfat_core.c #define BITMAP_LOC(v) ((v) >> 3) v 65 drivers/staging/exfat/exfat_core.c #define BITMAP_SHIFT(v) ((v) & 0x07) v 439 drivers/staging/fieldbus/anybuss/host.c unsigned int v, i = 0; v 443 drivers/staging/fieldbus/anybuss/host.c regmap_read(regmap, REG_IND_AP, &v); v 444 drivers/staging/fieldbus/anybuss/host.c if (likely(ind_ap == v)) v 1449 drivers/staging/fwserial/fwserial.c static int fwtty_proc_show(struct seq_file *m, void *v) v 1465 drivers/staging/fwserial/fwserial.c static int fwtty_stats_show(struct seq_file *m, void *v) v 1485 drivers/staging/fwserial/fwserial.c static int fwtty_peers_show(struct seq_file *m, void *v) v 559 drivers/staging/isdn/avm/avmcard.h int b1_proc_show(struct seq_file *m, void *v); v 579 drivers/staging/isdn/avm/avmcard.h int b1dma_proc_show(struct seq_file *m, void *v); v 640 drivers/staging/isdn/avm/b1.c int b1_proc_show(struct seq_file *m, void *v) v 861 drivers/staging/isdn/avm/b1dma.c int b1dma_proc_show(struct seq_file *m, void *v) v 1068 drivers/staging/isdn/avm/c4.c static int c4_proc_show(struct seq_file *m, void *v) v 2346 drivers/staging/isdn/gigaset/capi.c static int gigaset_proc_show(struct seq_file *m, void *v) v 438 drivers/staging/isdn/hysdn/hycapi.c static int hycapi_proc_show(struct seq_file *m, void *v) v 1289 drivers/staging/ks7010/ks_hostif.c __le32 v = cpu_to_le32(val); v 1290 drivers/staging/ks7010/ks_hostif.c size_t size = sizeof(v); v 1292 drivers/staging/ks7010/ks_hostif.c hostif_mib_set_request(priv, attr, MIB_VALUE_TYPE_INT, &v, size); v 1299 drivers/staging/ks7010/ks_hostif.c __le32 v = cpu_to_le32(val); v 1300 drivers/staging/ks7010/ks_hostif.c size_t size = sizeof(v); v 1302 drivers/staging/ks7010/ks_hostif.c hostif_mib_set_request(priv, attr, MIB_VALUE_TYPE_BOOL, &v, size); v 371 drivers/staging/media/hantro/hantro.h u32 v; v 373 drivers/staging/media/hantro/hantro.h v = vdpu_read(vpu, reg->base); v 374 drivers/staging/media/hantro/hantro.h v &= ~(reg->mask << reg->shift); v 375 drivers/staging/media/hantro/hantro.h v |= ((val & reg->mask) << reg->shift); v 376 drivers/staging/media/hantro/hantro.h vdpu_write_relaxed(vpu, v, reg->base); v 23 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0) v 25 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) v 26 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) v 27 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) v 28 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) v 29 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) v 30 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) v 31 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) v 32 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) v 33 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) v 34 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(9) : 0) v 35 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_OUT_ENDIAN(v) ((v) ? BIT(8) : 0) v 36 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(6) : 0) v 37 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_SCMD_DIS(v) ((v) ? BIT(5) : 0) v 38 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_MAX_BURST(v) (((v) << 0) & GENMASK(4, 0)) v 40 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_MODE(v) (((v) << 28) & GENMASK(31, 28)) v 41 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_RLC_MODE_E(v) ((v) ? BIT(27) : 0) v 42 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_PIC_INTERLACE_E(v) ((v) ? BIT(23) : 0) v 43 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_PIC_FIELDMODE_E(v) ((v) ? BIT(22) : 0) v 44 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_PIC_B_E(v) ((v) ? BIT(21) : 0) v 45 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_PIC_INTER_E(v) ((v) ? BIT(20) : 0) v 46 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_PIC_TOPFIELD_E(v) ((v) ? BIT(19) : 0) v 47 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_FWD_INTERLACE_E(v) ((v) ? BIT(18) : 0) v 48 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_FILTERING_DIS(v) ((v) ? BIT(14) : 0) v 49 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_WRITE_MVS_E(v) ((v) ? BIT(12) : 0) v 50 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_DEC_AXI_WR_ID(v) (((v) << 0) & GENMASK(7, 0)) v 52 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_PIC_MB_WIDTH(v) (((v) << 23) & GENMASK(31, 23)) v 53 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_PIC_MB_HEIGHT_P(v) (((v) << 11) & GENMASK(18, 11)) v 54 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_ALT_SCAN_E(v) ((v) ? BIT(6) : 0) v 55 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_TOPFIELDFIRST_E(v) ((v) ? BIT(5) : 0) v 57 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_STRM_START_BIT(v) (((v) << 26) & GENMASK(31, 26)) v 58 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_QSCALE_TYPE(v) ((v) ? BIT(24) : 0) v 59 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_CON_MV_E(v) ((v) ? BIT(4) : 0) v 60 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_INTRA_DC_PREC(v) (((v) << 2) & GENMASK(3, 2)) v 61 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_INTRA_VLC_TAB(v) ((v) ? BIT(1) : 0) v 62 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_FRAME_PRED_DCT(v) ((v) ? BIT(0) : 0) v 64 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) v 65 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) v 67 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_ALT_SCAN_FLAG_E(v) ((v) ? BIT(19) : 0) v 68 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_FCODE_FWD_HOR(v) (((v) << 15) & GENMASK(18, 15)) v 69 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_FCODE_FWD_VER(v) (((v) << 11) & GENMASK(14, 11)) v 70 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_FCODE_BWD_HOR(v) (((v) << 7) & GENMASK(10, 7)) v 71 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_FCODE_BWD_VER(v) (((v) << 3) & GENMASK(6, 3)) v 72 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_MV_ACCURACY_FWD(v) ((v) ? BIT(2) : 0) v 73 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_MV_ACCURACY_BWD(v) ((v) ? BIT(1) : 0) v 75 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_STARTMB_X(v) (((v) << 23) & GENMASK(31, 23)) v 76 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_STARTMB_Y(v) (((v) << 15) & GENMASK(22, 15)) v 78 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c #define G1_REG_APF_THRESHOLD(v) (((v) << 0) & GENMASK(13, 0)) v 23 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) v 25 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) v 26 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) v 27 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) v 28 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) v 30 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) v 31 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) v 33 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) v 34 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) v 35 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) v 37 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_MODE(v) (((v) << 0) & GENMASK(3, 0)) v 39 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(5) : 0) v 40 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(4) : 0) v 41 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(3) : 0) v 42 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_INSWAP32_E(v) ((v) ? BIT(2) : 0) v 43 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_OUT_ENDIAN(v) ((v) ? BIT(1) : 0) v 44 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(0) : 0) v 46 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(22) : 0) v 47 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_MAX_BURST(v) (((v) << 16) & GENMASK(20, 16)) v 48 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_AXI_WR_ID(v) (((v) << 8) & GENMASK(15, 8)) v 49 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_AXI_RD_ID(v) (((v) << 0) & GENMASK(7, 0)) v 51 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_RLC_MODE_E(v) ((v) ? BIT(20) : 0) v 52 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_PIC_INTERLACE_E(v) ((v) ? BIT(17) : 0) v 53 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_PIC_FIELDMODE_E(v) ((v) ? BIT(16) : 0) v 54 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_PIC_B_E(v) ((v) ? BIT(15) : 0) v 55 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_PIC_INTER_E(v) ((v) ? BIT(14) : 0) v 56 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_PIC_TOPFIELD_E(v) ((v) ? BIT(13) : 0) v 57 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_FWD_INTERLACE_E(v) ((v) ? BIT(12) : 0) v 58 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_WRITE_MVS_E(v) ((v) ? BIT(10) : 0) v 59 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(5) : 0) v 60 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(4) : 0) v 62 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_PIC_MB_WIDTH(v) (((v) << 23) & GENMASK(31, 23)) v 63 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_PIC_MB_HEIGHT_P(v) (((v) << 11) & GENMASK(18, 11)) v 64 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_ALT_SCAN_E(v) ((v) ? BIT(6) : 0) v 65 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_TOPFIELDFIRST_E(v) ((v) ? BIT(5) : 0) v 67 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_STRM_START_BIT(v) (((v) << 26) & GENMASK(31, 26)) v 68 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_QSCALE_TYPE(v) ((v) ? BIT(24) : 0) v 69 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_CON_MV_E(v) ((v) ? BIT(4) : 0) v 70 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_INTRA_DC_PREC(v) (((v) << 2) & GENMASK(3, 2)) v 71 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_INTRA_VLC_TAB(v) ((v) ? BIT(1) : 0) v 72 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_FRAME_PRED_DCT(v) ((v) ? BIT(0) : 0) v 74 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_ALT_SCAN_FLAG_E(v) ((v) ? BIT(19) : 0) v 75 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_FCODE_FWD_HOR(v) (((v) << 15) & GENMASK(18, 15)) v 76 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_FCODE_FWD_VER(v) (((v) << 11) & GENMASK(14, 11)) v 77 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_FCODE_BWD_HOR(v) (((v) << 7) & GENMASK(10, 7)) v 78 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_FCODE_BWD_VER(v) (((v) << 3) & GENMASK(6, 3)) v 79 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_MV_ACCURACY_FWD(v) ((v) ? BIT(2) : 0) v 80 drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c #define VDPU_REG_MV_ACCURACY_BWD(v) ((v) ? BIT(1) : 0) v 58 drivers/staging/media/imx/imx-media-capture.c #define to_capture_priv(v) container_of(v, struct capture_priv, vdev) v 44 drivers/staging/media/imx/imx-media-csc-scaler.c #define vdev_to_priv(v) container_of(v, struct ipu_csc_scaler_priv, vdev) v 1871 drivers/staging/media/ipu3/include/intel-ipu3.h __u32 v:13; v 1388 drivers/staging/media/ipu3/ipu3-abi.h struct imgu_abi_frame_sp_plane v; v 1008 drivers/staging/media/ipu3/ipu3-css.c sp_stage->frames.out_vf.planes.yuv.v.offset = v 196 drivers/staging/media/omap4iss/iss.h u32 v = iss_reg_read(iss, res, offset); v 198 drivers/staging/media/omap4iss/iss.h iss_reg_write(iss, res, offset, v & ~clr); v 212 drivers/staging/media/omap4iss/iss.h u32 v = iss_reg_read(iss, res, offset); v 214 drivers/staging/media/omap4iss/iss.h iss_reg_write(iss, res, offset, v | set); v 231 drivers/staging/media/omap4iss/iss.h u32 v = iss_reg_read(iss, res, offset); v 233 drivers/staging/media/omap4iss/iss.h iss_reg_write(iss, res, offset, (v & ~clr) | set); v 13 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define SHIFT_AND_MASK_BITS(v, h, l) \ v 14 drivers/staging/media/sunxi/cedrus/cedrus_regs.h (((unsigned long)(v) << (l)) & GENMASK(h, l)) v 84 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ v 85 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(7) : 0) v 86 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ v 87 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(6) : 0) v 88 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ v 89 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(5) : 0) v 90 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ v 91 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(4) : 0) v 92 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_INTRA_VLC_FORMAT(v) \ v 93 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(3) : 0) v 94 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_ALTERNATE_SCAN(v) \ v 95 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(2) : 0) v 96 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_FULL_PEL_FORWARD_VECTOR(v) \ v 97 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(1) : 0) v 98 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_MP12HDR_FULL_PEL_BACKWARD_VECTOR(v) \ v 99 drivers/staging/media/sunxi/cedrus/cedrus_regs.h ((v) ? BIT(0) : 0) v 230 drivers/staging/media/sunxi/cedrus/cedrus_regs.h #define VE_DEC_MPEG_IQMINPUT_WEIGHT(i, v) \ v 231 drivers/staging/media/sunxi/cedrus/cedrus_regs.h (SHIFT_AND_MASK_BITS(i, 13, 8) | SHIFT_AND_MASK_BITS(v, 7, 0)) v 1346 drivers/staging/rtl8188eu/hal/usb_halinit.c u32 v = usb_read32(Adapter, REG_RCR); v 1348 drivers/staging/rtl8188eu/hal/usb_halinit.c v &= ~(RCR_CBSSID_BCN); v 1349 drivers/staging/rtl8188eu/hal/usb_halinit.c usb_write32(Adapter, REG_RCR, v); v 157 drivers/staging/rtl8192e/rtllib_crypt_tkip.c static inline u16 Mk16_le(u16 *v) v 159 drivers/staging/rtl8192e/rtllib_crypt_tkip.c return *v; v 199 drivers/staging/rtl8192e/rtllib_crypt_tkip.c static inline u16 _S_(u16 v) v 201 drivers/staging/rtl8192e/rtllib_crypt_tkip.c u16 t = Sbox[Hi8(v)]; v 202 drivers/staging/rtl8192e/rtllib_crypt_tkip.c return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8)); v 202 drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c static inline u16 _S_(u16 v) v 204 drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c u16 t = Sbox[Hi8(v)]; v 205 drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8)); v 243 drivers/staging/rtl8192u/ieee80211/ieee80211_module.c static int show_debug_level(struct seq_file *m, void *v) v 478 drivers/staging/rtl8192u/r8192U_core.c static int __maybe_unused proc_get_stats_ap(struct seq_file *m, void *v) v 497 drivers/staging/rtl8192u/r8192U_core.c static int __maybe_unused proc_get_registers(struct seq_file *m, void *v) v 538 drivers/staging/rtl8192u/r8192U_core.c static int __maybe_unused proc_get_stats_tx(struct seq_file *m, void *v) v 597 drivers/staging/rtl8192u/r8192U_core.c static int __maybe_unused proc_get_stats_rx(struct seq_file *m, void *v) v 5 drivers/staging/rtl8192u/r819xU_firmware.h #define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) \ v 6 drivers/staging/rtl8192u/r819xU_firmware.h (4 * ((v) / 4) - 8 - USB_HWDESC_HEADER_LEN) v 691 drivers/staging/rtl8723bs/hal/sdio_ops.c void SdioLocalCmd52Write1Byte(struct adapter *adapter, u32 addr, u8 v) v 696 drivers/staging/rtl8723bs/hal/sdio_ops.c sd_cmd52_write(intfhdl, addr, 1, &v); v 699 drivers/staging/rtl8723bs/hal/sdio_ops.c static void SdioLocalCmd52Write4Byte(struct adapter *adapter, u32 addr, u32 v) v 705 drivers/staging/rtl8723bs/hal/sdio_ops.c le_tmp = cpu_to_le32(v); v 18 drivers/staging/rtl8723bs/include/sdio_ops.h extern void SdioLocalCmd52Write1Byte(struct adapter *padapter, u32 addr, u8 v); v 25 drivers/staging/rtl8723bs/include/sdio_ops_linux.h void sd_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err); v 26 drivers/staging/rtl8723bs/include/sdio_ops_linux.h void sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err); v 35 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c u8 v = 0; v 45 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c return v; v 53 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c v = sdio_f0_readb(func, addr, err); v 58 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c return v; v 207 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c u8 v = 0; v 217 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c return v; v 225 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c v = sdio_readb(func, addr, err); v 230 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c return v; v 238 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c u32 v = 0; v 248 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c return v; v 256 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c v = sdio_readl(func, addr, err); v 263 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: (%d) addr = 0x%05x, val = 0x%x\n", __func__, *err, addr, v); v 268 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c v = sdio_readl(func, addr, err); v 275 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: (%d) addr = 0x%05x, val = 0x%x, try_cnt =%d\n", __func__, *err, addr, v, i); v 288 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: FAIL!(%d) addr = 0x%05x, val = 0x%x, try_cnt =%d\n", __func__, *err, addr, v, i); v 290 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: (%d) addr = 0x%05x, val = 0x%x, try_cnt =%d\n", __func__, *err, addr, v, i); v 293 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c return v; v 296 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c void sd_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err) v 318 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c sdio_writeb(func, v, addr, err); v 322 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: FAIL!(%d) addr = 0x%05x val = 0x%02x\n", __func__, *err, addr, v); v 325 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c void sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err) v 347 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c sdio_writel(func, v, addr, err); v 354 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: (%d) addr = 0x%05x val = 0x%08x\n", __func__, *err, addr, v); v 359 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c sdio_writel(func, v, addr, err); v 365 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: (%d) addr = 0x%05x, val = 0x%x, try_cnt =%d\n", __func__, *err, addr, v, i); v 378 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: FAIL!(%d) addr = 0x%05x val = 0x%08x, try_cnt =%d\n", __func__, *err, addr, v, i); v 380 drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c DBG_871X(KERN_ERR "%s: (%d) addr = 0x%05x val = 0x%08x, try_cnt =%d\n", __func__, *err, addr, v, i); v 659 drivers/staging/unisys/visorhba/visorhba_main.c static int info_debugfs_show(struct seq_file *seq, void *v) v 964 drivers/staging/unisys/visorhba/visorhba_main.c static int process_incoming_rsps(void *v) v 966 drivers/staging/unisys/visorhba/visorhba_main.c struct visorhba_devdata *devdata = v; v 409 drivers/staging/uwb/i1480/dfu/usb.c #define i1480_USB_DEV(v, p) \ v 414 drivers/staging/uwb/i1480/dfu/usb.c .idVendor = (v), \ v 97 drivers/staging/vc04_services/bcm2835-camera/controls.c u32 v; v 538 drivers/staging/vc04_services/bcm2835-camera/controls.c dev->colourfx.v = v 539 drivers/staging/vc04_services/bcm2835-camera/controls.c v4l2_to_mmal_effects_values[i].v; v 563 drivers/staging/vc04_services/bcm2835-camera/controls.c dev->colourfx.u, dev->colourfx.v, v 578 drivers/staging/vc04_services/bcm2835-camera/controls.c dev->colourfx.v = ctrl->val & 0xff; v 58 drivers/staging/vc04_services/bcm2835-camera/mmal-common.h u32 v; v 2285 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c vchiq_keepalive_thread_func(void *v) v 2287 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c struct vchiq_state *state = (struct vchiq_state *)v; v 1856 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c slot_handler_func(void *v) v 1858 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c struct vchiq_state *state = v; v 1940 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c recycle_func(void *v) v 1942 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c struct vchiq_state *state = v; v 1964 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c sync_func(void *v) v 1966 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c struct vchiq_state *state = v; v 158 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h #define DEBUG_VALUE(d, v) \ v 159 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h do { debug_ptr[DEBUG_ ## d] = (v); dsb(sy); } while (0) v 167 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h #define DEBUG_VALUE(d, v) v 514 drivers/staging/wlan-ng/hfa384x.h #define HFA384x_TXSTATUS_ISERROR(v) \ v 515 drivers/staging/wlan-ng/hfa384x.h (((u16)(v)) & \ v 520 drivers/staging/wlan-ng/hfa384x.h #define HFA384x_TX_SET(v, m, s) ((((u16)(v)) << ((u16)(s))) & ((u16)(m))) v 522 drivers/staging/wlan-ng/hfa384x.h #define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8) v 523 drivers/staging/wlan-ng/hfa384x.h #define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, \ v 525 drivers/staging/wlan-ng/hfa384x.h #define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2) v 526 drivers/staging/wlan-ng/hfa384x.h #define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1) v 19 drivers/target/sbp/sbp_target.h #define ORB_NOTIFY(v) (((v) >> 31) & 0x01) v 20 drivers/target/sbp/sbp_target.h #define ORB_REQUEST_FORMAT(v) (((v) >> 29) & 0x03) v 22 drivers/target/sbp/sbp_target.h #define MANAGEMENT_ORB_FUNCTION(v) (((v) >> 16) & 0x0f) v 34 drivers/target/sbp/sbp_target.h #define LOGIN_ORB_EXCLUSIVE(v) (((v) >> 28) & 0x01) v 35 drivers/target/sbp/sbp_target.h #define LOGIN_ORB_RESERVED(v) (((v) >> 24) & 0x0f) v 36 drivers/target/sbp/sbp_target.h #define LOGIN_ORB_RECONNECT(v) (((v) >> 20) & 0x0f) v 37 drivers/target/sbp/sbp_target.h #define LOGIN_ORB_LUN(v) (((v) >> 0) & 0xffff) v 38 drivers/target/sbp/sbp_target.h #define LOGIN_ORB_PASSWORD_LENGTH(v) (((v) >> 16) & 0xffff) v 39 drivers/target/sbp/sbp_target.h #define LOGIN_ORB_RESPONSE_LENGTH(v) (((v) >> 0) & 0xffff) v 41 drivers/target/sbp/sbp_target.h #define RECONNECT_ORB_LOGIN_ID(v) (((v) >> 0) & 0xffff) v 42 drivers/target/sbp/sbp_target.h #define LOGOUT_ORB_LOGIN_ID(v) (((v) >> 0) & 0xffff) v 44 drivers/target/sbp/sbp_target.h #define CMDBLK_ORB_DIRECTION(v) (((v) >> 27) & 0x01) v 45 drivers/target/sbp/sbp_target.h #define CMDBLK_ORB_SPEED(v) (((v) >> 24) & 0x07) v 46 drivers/target/sbp/sbp_target.h #define CMDBLK_ORB_MAX_PAYLOAD(v) (((v) >> 20) & 0x0f) v 47 drivers/target/sbp/sbp_target.h #define CMDBLK_ORB_PG_TBL_PRESENT(v) (((v) >> 19) & 0x01) v 48 drivers/target/sbp/sbp_target.h #define CMDBLK_ORB_PG_SIZE(v) (((v) >> 16) & 0x07) v 49 drivers/target/sbp/sbp_target.h #define CMDBLK_ORB_DATA_SIZE(v) (((v) >> 0) & 0xffff) v 51 drivers/target/sbp/sbp_target.h #define STATUS_BLOCK_SRC(v) (((v) & 0x03) << 30) v 52 drivers/target/sbp/sbp_target.h #define STATUS_BLOCK_RESP(v) (((v) & 0x03) << 28) v 53 drivers/target/sbp/sbp_target.h #define STATUS_BLOCK_DEAD(v) (((v) ? 1 : 0) << 27) v 54 drivers/target/sbp/sbp_target.h #define STATUS_BLOCK_LEN(v) (((v) & 0x07) << 24) v 55 drivers/target/sbp/sbp_target.h #define STATUS_BLOCK_SBP_STATUS(v) (((v) & 0xff) << 16) v 56 drivers/target/sbp/sbp_target.h #define STATUS_BLOCK_ORB_OFFSET_HIGH(v) (((v) & 0xffff) << 0) v 209 drivers/tee/optee/core.c struct tee_ioctl_version_data v = { v 217 drivers/tee/optee/core.c v.gen_caps |= TEE_GEN_CAP_REG_MEM; v 218 drivers/tee/optee/core.c *vers = v; v 960 drivers/tee/tee_core.c struct tee_ioctl_version_data v; v 961 drivers/tee/tee_core.c struct match_dev_data match_data = { vers ? vers : &v, data, match }; v 416 drivers/tee/tee_shm.c void *v = tee_shm_get_va(shm, pa - shm->paddr); v 418 drivers/tee/tee_shm.c if (IS_ERR(v)) v 419 drivers/tee/tee_shm.c return PTR_ERR(v); v 420 drivers/tee/tee_shm.c *va = v; v 37 drivers/thermal/intel/int340x_thermal/int3406_thermal.c #define ACPI_TO_RAW(v, d) (d->raw_bd->props.max_brightness * v / 100) v 38 drivers/thermal/intel/int340x_thermal/int3406_thermal.c #define RAW_TO_ACPI(v, d) (v * 100 / d->raw_bd->props.max_brightness) v 199 drivers/thermal/tegra/soctherm.c #define REG_SET_MASK(r, m, v) (((r) & ~(m)) | \ v 200 drivers/thermal/tegra/soctherm.c (((v) & (m >> (ffs(m) - 1))) << (ffs(m) - 1))) v 1371 drivers/thermal/tegra/soctherm.c s32 v; v 1379 drivers/thermal/tegra/soctherm.c v = sign_extend32(state, ts->soc->bptt - 1); v 1380 drivers/thermal/tegra/soctherm.c v *= ts->soc->thresh_grain; v 1381 drivers/thermal/tegra/soctherm.c seq_printf(s, " %d: Up/Dn(%d /", level, v); v 1385 drivers/thermal/tegra/soctherm.c v = sign_extend32(state, ts->soc->bptt - 1); v 1386 drivers/thermal/tegra/soctherm.c v *= ts->soc->thresh_grain; v 1387 drivers/thermal/tegra/soctherm.c seq_printf(s, "%d ) ", v); v 1964 drivers/thermal/tegra/soctherm.c u32 v; v 1978 drivers/thermal/tegra/soctherm.c v = REG_SET_MASK(0, THROT_GLOBAL_ENB_MASK, 1); v 1980 drivers/thermal/tegra/soctherm.c ccroc_writel(ts, v, CCROC_GLOBAL_CFG); v 1982 drivers/thermal/tegra/soctherm.c v = ccroc_readl(ts, CCROC_SUPER_CCLKG_DIVIDER); v 1983 drivers/thermal/tegra/soctherm.c v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1); v 1984 drivers/thermal/tegra/soctherm.c ccroc_writel(ts, v, CCROC_SUPER_CCLKG_DIVIDER); v 1986 drivers/thermal/tegra/soctherm.c writel(v, ts->regs + THROT_GLOBAL_CFG); v 1988 drivers/thermal/tegra/soctherm.c v = readl(ts->clk_regs + CAR_SUPER_CCLKG_DIVIDER); v 1989 drivers/thermal/tegra/soctherm.c v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1); v 1990 drivers/thermal/tegra/soctherm.c writel(v, ts->clk_regs + CAR_SUPER_CCLKG_DIVIDER); v 1994 drivers/thermal/tegra/soctherm.c v = STATS_CTL_CLR_DN | STATS_CTL_EN_DN | v 1996 drivers/thermal/tegra/soctherm.c writel(v, ts->regs + THERMCTL_STATS_CTL); v 1536 drivers/tty/amiserial.c static int rs_proc_show(struct seq_file *m, void *v) v 3925 drivers/tty/cyclades.c static int cyclades_proc_show(struct seq_file *m, void *v) v 190 drivers/tty/hvc/hvc_xen.c uint64_t v = 0; v 212 drivers/tty/hvc/hvc_xen.c r = hvm_get_parameter(HVM_PARAM_CONSOLE_EVTCHN, &v); v 213 drivers/tty/hvc/hvc_xen.c if (r < 0 || v == 0) v 215 drivers/tty/hvc/hvc_xen.c info->evtchn = v; v 216 drivers/tty/hvc/hvc_xen.c v = 0; v 217 drivers/tty/hvc/hvc_xen.c r = hvm_get_parameter(HVM_PARAM_CONSOLE_PFN, &v); v 218 drivers/tty/hvc/hvc_xen.c if (r < 0 || v == 0) v 220 drivers/tty/hvc/hvc_xen.c gfn = v; v 301 drivers/tty/hvc/hvc_xen.c uint64_t v = 0; v 304 drivers/tty/hvc/hvc_xen.c err = hvm_get_parameter(HVM_PARAM_CONSOLE_EVTCHN, &v); v 305 drivers/tty/hvc/hvc_xen.c if (!err && v) v 306 drivers/tty/hvc/hvc_xen.c info->evtchn = v; v 421 drivers/tty/serial/8250/8250_core.c void (*v)(int port, struct uart_port *up, u32 *capabilities)) v 423 drivers/tty/serial/8250/8250_core.c serial8250_isa_config = v; v 54 drivers/tty/serial/apbuart.h #define UART_PUT_CHAR(port, v) (__raw_writel(v, APBBASE_DATA_P(port))) v 56 drivers/tty/serial/apbuart.h #define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port))) v 58 drivers/tty/serial/apbuart.h #define UART_PUT_CTRL(port, v) (__raw_writel(v, APBBASE_CTRL_P(port))) v 60 drivers/tty/serial/apbuart.h #define UART_PUT_SCAL(port, v) (__raw_writel(v, APBBASE_SCALAR_P(port))) v 73 drivers/tty/serial/arc_uart.c #define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r)) v 76 drivers/tty/serial/arc_uart.c #define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v)) v 77 drivers/tty/serial/arc_uart.c #define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v)) v 44 drivers/tty/serial/mcf.c #define mcf_setppdtr(p, v) do { } while (0) v 70 drivers/tty/serial/mxs-auart.c #define AUART_CTRL0_RXTIMEOUT(v) (((v) & 0x7ff) << 16) v 71 drivers/tty/serial/mxs-auart.c #define AUART_CTRL0_XFER_COUNT(v) ((v) & 0xffff) v 73 drivers/tty/serial/mxs-auart.c #define AUART_CTRL1_XFER_COUNT(v) ((v) & 0xffff) v 90 drivers/tty/serial/mxs-auart.c #define AUART_LINECTRL_BAUD_DIVINT(v) (((v) & 0xffff) << 16) v 93 drivers/tty/serial/mxs-auart.c #define AUART_LINECTRL_BAUD_DIVFRAC(v) (((v) & 0x3f) << 8) v 96 drivers/tty/serial/mxs-auart.c #define AUART_LINECTRL_WLEN(v) (((v) & 0x3) << 5) v 57 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0) v 58 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1) v 59 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2) v 60 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3) v 61 drivers/tty/serial/sa1100.c #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0) v 62 drivers/tty/serial/sa1100.c #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1) v 63 drivers/tty/serial/sa1100.c #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR) v 239 drivers/tty/serial/sccnxp.c static void sccnxp_write(struct uart_port *port, u8 reg, u8 v) v 243 drivers/tty/serial/sccnxp.c writeb(v, port->membase + (reg << port->regshift)); v 253 drivers/tty/serial/sccnxp.c static void sccnxp_port_write(struct uart_port *port, u8 reg, u8 v) v 255 drivers/tty/serial/sccnxp.c sccnxp_write(port, (port->line << 3) + reg, v); v 1898 drivers/tty/serial/serial_core.c static int uart_proc_show(struct seq_file *m, void *v) v 1139 drivers/tty/serial/sh-sci.c int v; v 1142 drivers/tty/serial/sh-sci.c v = sci->hscif_tot >> HSSCR_TOT_SHIFT; v 1144 drivers/tty/serial/sh-sci.c v = sci->rx_fifo_timeout; v 1146 drivers/tty/serial/sh-sci.c return sprintf(buf, "%d\n", v); v 200 drivers/tty/serial/sifive.c static void __ssp_early_writel(u32 v, u16 offs, struct uart_port *port) v 202 drivers/tty/serial/sifive.c writel_relaxed(v, port->membase + offs); v 236 drivers/tty/serial/sifive.c static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp) v 238 drivers/tty/serial/sifive.c __ssp_early_writel(v, offs, &ssp->port); v 409 drivers/tty/serial/sifive.c u32 v; v 412 drivers/tty/serial/sifive.c v = __ssp_readl(ssp, SIFIVE_SERIAL_RXDATA_OFFS); v 417 drivers/tty/serial/sifive.c *is_empty = (v & SIFIVE_SERIAL_RXDATA_EMPTY_MASK) >> v 420 drivers/tty/serial/sifive.c ch = (v & SIFIVE_SERIAL_RXDATA_DATA_MASK) >> v 501 drivers/tty/serial/sifive.c u32 v; v 508 drivers/tty/serial/sifive.c v = __ssp_readl(ssp, SIFIVE_SERIAL_TXCTRL_OFFS); v 509 drivers/tty/serial/sifive.c v &= ~SIFIVE_SERIAL_TXCTRL_NSTOP_MASK; v 510 drivers/tty/serial/sifive.c v |= (nstop - 1) << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT; v 511 drivers/tty/serial/sifive.c __ssp_writel(v, SIFIVE_SERIAL_TXCTRL_OFFS, ssp); v 646 drivers/tty/serial/sifive.c u32 v, old_v; v 673 drivers/tty/serial/sifive.c v = __ssp_readl(ssp, SIFIVE_SERIAL_RXCTRL_OFFS); v 674 drivers/tty/serial/sifive.c old_v = v; v 676 drivers/tty/serial/sifive.c v &= SIFIVE_SERIAL_RXCTRL_RXEN_MASK; v 678 drivers/tty/serial/sifive.c v |= SIFIVE_SERIAL_RXCTRL_RXEN_MASK; v 679 drivers/tty/serial/sifive.c if (v != old_v) v 680 drivers/tty/serial/sifive.c __ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp); v 3522 drivers/tty/synclink.c static int mgsl_proc_show(struct seq_file *m, void *v) v 1296 drivers/tty/synclink_gt.c static int synclink_gt_proc_show(struct seq_file *m, void *v) v 1409 drivers/tty/synclinkmp.c static int synclinkmp_proc_show(struct seq_file *m, void *v) v 2490 drivers/tty/tty_io.c struct serial_struct v; v 2493 drivers/tty/tty_io.c if (copy_from_user(&v, ss, sizeof(struct serial_struct))) v 2496 drivers/tty/tty_io.c flags = v.flags & ASYNC_DEPRECATED; v 2503 drivers/tty/tty_io.c return tty->ops->set_serial(tty, &v); v 2508 drivers/tty/tty_io.c struct serial_struct v; v 2511 drivers/tty/tty_io.c memset(&v, 0, sizeof(struct serial_struct)); v 2514 drivers/tty/tty_io.c err = tty->ops->get_serial(tty, &v); v 2515 drivers/tty/tty_io.c if (!err && copy_to_user(ss, &v, sizeof(struct serial_struct))) v 2706 drivers/tty/tty_io.c struct serial_struct v; v 2712 drivers/tty/tty_io.c memcpy(&v, &v32, offsetof(struct serial_struct32, iomem_base)); v 2713 drivers/tty/tty_io.c v.iomem_base = compat_ptr(v32.iomem_base); v 2714 drivers/tty/tty_io.c v.iomem_reg_shift = v32.iomem_reg_shift; v 2715 drivers/tty/tty_io.c v.port_high = v32.port_high; v 2716 drivers/tty/tty_io.c v.iomap_base = 0; v 2718 drivers/tty/tty_io.c flags = v.flags & ASYNC_DEPRECATED; v 2725 drivers/tty/tty_io.c return tty->ops->set_serial(tty, &v); v 2732 drivers/tty/tty_io.c struct serial_struct v; v 2735 drivers/tty/tty_io.c memset(&v, 0, sizeof(v)); v 2740 drivers/tty/tty_io.c err = tty->ops->get_serial(tty, &v); v 2742 drivers/tty/tty_io.c memcpy(&v32, &v, offsetof(struct serial_struct32, iomem_base)); v 2743 drivers/tty/tty_io.c v32.iomem_base = (unsigned long)v.iomem_base >> 32 ? v 2744 drivers/tty/tty_io.c 0xfffffff : ptr_to_compat(v.iomem_base); v 2745 drivers/tty/tty_io.c v32.iomem_reg_shift = v.iomem_reg_shift; v 2746 drivers/tty/tty_io.c v32.port_high = v.port_high; v 218 drivers/tty/tty_ldisc.c static void *tty_ldiscs_seq_next(struct seq_file *m, void *v, loff_t *pos) v 224 drivers/tty/tty_ldisc.c static void tty_ldiscs_seq_stop(struct seq_file *m, void *v) v 228 drivers/tty/tty_ldisc.c static int tty_ldiscs_seq_show(struct seq_file *m, void *v) v 230 drivers/tty/tty_ldisc.c int i = *(loff_t *)v; v 1918 drivers/tty/vt/keyboard.c if (!i && v == K_NOSUCHMAP) { v 1933 drivers/tty/vt/keyboard.c if (KTYP(v) < NR_TYPES) { v 1934 drivers/tty/vt/keyboard.c if (KVAL(v) > max_vals[KTYP(v)]) v 1971 drivers/tty/vt/keyboard.c if (v == ov) v 1976 drivers/tty/vt/keyboard.c if (((ov == K_SAK) || (v == K_SAK)) && !capable(CAP_SYS_ADMIN)) { v 1980 drivers/tty/vt/keyboard.c key_map[i] = U(v); v 1981 drivers/tty/vt/keyboard.c if (!s && (KTYP(ov) == KT_SHIFT || KTYP(v) == KT_SHIFT)) v 181 drivers/tty/vt/selection.c struct tiocl_selection v; v 183 drivers/tty/vt/selection.c if (copy_from_user(&v, sel, sizeof(*sel))) v 186 drivers/tty/vt/selection.c return set_selection_kernel(&v, tty); v 189 drivers/tty/vt/selection.c static int __set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) v 200 drivers/tty/vt/selection.c v->xs = min_t(u16, v->xs - 1, vc->vc_cols - 1); v 201 drivers/tty/vt/selection.c v->ys = min_t(u16, v->ys - 1, vc->vc_rows - 1); v 202 drivers/tty/vt/selection.c v->xe = min_t(u16, v->xe - 1, vc->vc_cols - 1); v 203 drivers/tty/vt/selection.c v->ye = min_t(u16, v->ye - 1, vc->vc_rows - 1); v 204 drivers/tty/vt/selection.c ps = v->ys * vc->vc_size_row + (v->xs << 1); v 205 drivers/tty/vt/selection.c pe = v->ye * vc->vc_size_row + (v->xe << 1); v 207 drivers/tty/vt/selection.c if (v->sel_mode == TIOCL_SELCLEAR) { v 213 drivers/tty/vt/selection.c if (mouse_reporting() && (v->sel_mode & TIOCL_SELMOUSEREPORT)) { v 214 drivers/tty/vt/selection.c mouse_report(tty, v->sel_mode & TIOCL_SELBUTTONMASK, v->xs, v 215 drivers/tty/vt/selection.c v->ys); v 232 drivers/tty/vt/selection.c switch (v->sel_mode) v 348 drivers/tty/vt/selection.c int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) v 354 drivers/tty/vt/selection.c ret = __set_selection_kernel(v, tty); v 860 drivers/tty/vt/vt_ioctl.c struct vt_consize v; v 863 drivers/tty/vt/vt_ioctl.c if (copy_from_user(&v, up, sizeof(struct vt_consize))) v 866 drivers/tty/vt/vt_ioctl.c if (!v.v_vlin) v 867 drivers/tty/vt/vt_ioctl.c v.v_vlin = vc->vc_scan_lines; v 868 drivers/tty/vt/vt_ioctl.c if (v.v_clin) { v 869 drivers/tty/vt/vt_ioctl.c int rows = v.v_vlin/v.v_clin; v 870 drivers/tty/vt/vt_ioctl.c if (v.v_rows != rows) { v 871 drivers/tty/vt/vt_ioctl.c if (v.v_rows) /* Parameters don't add up */ v 873 drivers/tty/vt/vt_ioctl.c v.v_rows = rows; v 876 drivers/tty/vt/vt_ioctl.c if (v.v_vcol && v.v_ccol) { v 877 drivers/tty/vt/vt_ioctl.c int cols = v.v_vcol/v.v_ccol; v 878 drivers/tty/vt/vt_ioctl.c if (v.v_cols != cols) { v 879 drivers/tty/vt/vt_ioctl.c if (v.v_cols) v 881 drivers/tty/vt/vt_ioctl.c v.v_cols = cols; v 885 drivers/tty/vt/vt_ioctl.c if (v.v_clin > 32) v 896 drivers/tty/vt/vt_ioctl.c if (v.v_vlin) v 897 drivers/tty/vt/vt_ioctl.c vcp->vc_scan_lines = v.v_vlin; v 898 drivers/tty/vt/vt_ioctl.c if (v.v_clin) v 899 drivers/tty/vt/vt_ioctl.c vcp->vc_font.height = v.v_clin; v 901 drivers/tty/vt/vt_ioctl.c vc_resize(vcp, v.v_cols, v.v_rows); v 87 drivers/usb/chipidea/usbmisc_imx.c #define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8) v 97 drivers/usb/chipidea/usbmisc_imx.c #define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0) v 126 drivers/usb/dwc2/debugfs.c static int state_show(struct seq_file *seq, void *v) v 183 drivers/usb/dwc2/debugfs.c static int fifo_show(struct seq_file *seq, void *v) v 224 drivers/usb/dwc2/debugfs.c static int ep_show(struct seq_file *seq, void *v) v 666 drivers/usb/dwc2/debugfs.c static int params_show(struct seq_file *seq, void *v) v 722 drivers/usb/dwc2/debugfs.c static int hw_params_show(struct seq_file *seq, void *v) v 757 drivers/usb/dwc2/debugfs.c static int dr_mode_show(struct seq_file *seq, void *v) v 587 drivers/usb/gadget/function/rndis.c params->resp_avail(params->v); v 629 drivers/usb/gadget/function/rndis.c params->resp_avail(params->v); v 669 drivers/usb/gadget/function/rndis.c params->resp_avail(params->v); v 696 drivers/usb/gadget/function/rndis.c params->resp_avail(params->v); v 718 drivers/usb/gadget/function/rndis.c params->resp_avail(params->v); v 745 drivers/usb/gadget/function/rndis.c params->resp_avail(params->v); v 876 drivers/usb/gadget/function/rndis.c struct rndis_params *rndis_register(void (*resp_avail)(void *v), void *v) v 920 drivers/usb/gadget/function/rndis.c params->v = v; v 1087 drivers/usb/gadget/function/rndis.c static int rndis_proc_show(struct seq_file *m, void *v) v 174 drivers/usb/gadget/function/rndis.h void (*resp_avail)(void *v); v 175 drivers/usb/gadget/function/rndis.h void *v; v 181 drivers/usb/gadget/function/rndis.h struct rndis_params *rndis_register(void (*resp_avail)(void *v), void *v); v 87 drivers/usb/gadget/udc/fsl_mxc_udc.c unsigned int v; v 98 drivers/usb/gadget/udc/fsl_mxc_udc.c v = readl(phy_regs + USBPHYCTRL_OTGBASE_OFFSET); v 99 drivers/usb/gadget/udc/fsl_mxc_udc.c writel(v | USBPHYCTRL_EVDO, v 100 drivers/usb/gadget/udc/fsl_udc_core.c static void _fsl_writel_be(u32 v, unsigned __iomem *p) v 102 drivers/usb/gadget/udc/fsl_udc_core.c out_be32(p, v); v 105 drivers/usb/gadget/udc/fsl_udc_core.c static void _fsl_writel_le(u32 v, unsigned __iomem *p) v 107 drivers/usb/gadget/udc/fsl_udc_core.c out_le32(p, v); v 111 drivers/usb/gadget/udc/fsl_udc_core.c static void (*_fsl_writel)(u32 v, unsigned __iomem *p); v 114 drivers/usb/gadget/udc/fsl_udc_core.c #define fsl_writel(v, p) (*_fsl_writel)((v), (p)) v 2022 drivers/usb/gadget/udc/fsl_udc_core.c static int fsl_proc_read(struct seq_file *m, void *v) v 1132 drivers/usb/gadget/udc/goku_udc.c static int udc_proc_read(struct seq_file *m, void *v) v 53 drivers/usb/gadget/udc/gr_udc.c #define gr_write32(x, v) (iowrite32be((v), (x))) v 182 drivers/usb/gadget/udc/gr_udc.c static int gr_dfs_show(struct seq_file *seq, void *v) v 284 drivers/usb/gadget/udc/m66592-udc.h #define M66592_GET_DT_TYPE(v) (((v) & DT_TYPE) >> 8) v 358 drivers/usb/host/ehci-dbg.c __u32 v = hc32_to_cpu(ehci, token); v 360 drivers/usb/host/ehci-dbg.c if (v & QTD_STS_ACTIVE) v 362 drivers/usb/host/ehci-dbg.c if (v & QTD_STS_HALT) v 364 drivers/usb/host/ehci-dbg.c if (!IS_SHORT_READ(v)) v 37 drivers/usb/host/fhci-dbg.c static int fhci_dfs_regs_show(struct seq_file *s, void *v) v 60 drivers/usb/host/fhci-dbg.c static int fhci_dfs_irq_stat_show(struct seq_file *s, void *v) v 341 drivers/usb/host/fotg210-hcd.c __u32 v = hc32_to_cpu(fotg210, token); v 343 drivers/usb/host/fotg210-hcd.c if (v & QTD_STS_ACTIVE) v 345 drivers/usb/host/fotg210-hcd.c if (v & QTD_STS_HALT) v 347 drivers/usb/host/fotg210-hcd.c if (!IS_SHORT_READ(v)) v 186 drivers/usb/host/imx21-dbg.c static int debug_status_show(struct seq_file *s, void *v) v 250 drivers/usb/host/imx21-dbg.c static int debug_dmem_show(struct seq_file *s, void *v) v 272 drivers/usb/host/imx21-dbg.c static int debug_etd_show(struct seq_file *s, void *v) v 360 drivers/usb/host/imx21-dbg.c static int debug_statistics_show(struct seq_file *s, void *v) v 395 drivers/usb/host/imx21-dbg.c static int debug_isoc_show(struct seq_file *s, void *v) v 187 drivers/usb/host/isp116x.h #define PTD_COUNT(v) (((v) << 0) & PTD_COUNT_MSK) v 189 drivers/usb/host/isp116x.h #define PTD_TOGGLE(v) (((v) << 10) & PTD_TOGGLE_MSK) v 191 drivers/usb/host/isp116x.h #define PTD_ACTIVE(v) (((v) << 11) & PTD_ACTIVE_MSK) v 193 drivers/usb/host/isp116x.h #define PTD_CC(v) (((v) << 12) & PTD_CC_MSK) v 195 drivers/usb/host/isp116x.h #define PTD_MPS(v) (((v) << 0) & PTD_MPS_MSK) v 197 drivers/usb/host/isp116x.h #define PTD_SPD(v) (((v) << 10) & PTD_SPD_MSK) v 199 drivers/usb/host/isp116x.h #define PTD_LAST(v) (((v) << 11) & PTD_LAST_MSK) v 201 drivers/usb/host/isp116x.h #define PTD_EP(v) (((v) << 12) & PTD_EP_MSK) v 203 drivers/usb/host/isp116x.h #define PTD_LEN(v) (((v) << 0) & PTD_LEN_MSK) v 205 drivers/usb/host/isp116x.h #define PTD_DIR(v) (((v) << 10) & PTD_DIR_MSK) v 207 drivers/usb/host/isp116x.h #define PTD_B5_5(v) (((v) << 13) & PTD_B5_5_MSK) v 209 drivers/usb/host/isp116x.h #define PTD_FA(v) (((v) << 0) & PTD_FA_MSK) v 211 drivers/usb/host/isp116x.h #define PTD_FMT(v) (((v) << 7) & PTD_FMT_MSK) v 349 drivers/usb/host/isp1362.h #define PTD_COUNT(v) (((v) << 0) & PTD_COUNT_MSK) v 351 drivers/usb/host/isp1362.h #define PTD_TOGGLE(v) (((v) << 10) & PTD_TOGGLE_MSK) v 353 drivers/usb/host/isp1362.h #define PTD_ACTIVE(v) (((v) << 11) & PTD_ACTIVE_MSK) v 355 drivers/usb/host/isp1362.h #define PTD_CC(v) (((v) << 12) & PTD_CC_MSK) v 357 drivers/usb/host/isp1362.h #define PTD_MPS(v) (((v) << 0) & PTD_MPS_MSK) v 359 drivers/usb/host/isp1362.h #define PTD_SPD(v) (((v) << 10) & PTD_SPD_MSK) v 361 drivers/usb/host/isp1362.h #define PTD_LAST(v) (((v) << 11) & PTD_LAST_MSK) v 363 drivers/usb/host/isp1362.h #define PTD_EP(v) (((v) << 12) & PTD_EP_MSK) v 365 drivers/usb/host/isp1362.h #define PTD_LEN(v) (((v) << 0) & PTD_LEN_MSK) v 367 drivers/usb/host/isp1362.h #define PTD_DIR(v) (((v) << 10) & PTD_DIR_MSK) v 369 drivers/usb/host/isp1362.h #define PTD_FA(v) (((v) << 0) & PTD_FA_MSK) v 371 drivers/usb/host/isp1362.h #define PTD_SF_INT(v) (((v) << 8) & PTD_SF_INT_MSK) v 373 drivers/usb/host/isp1362.h #define PTD_SF_ISO(v) (((v) << 8) & PTD_SF_ISO_MSK) v 375 drivers/usb/host/isp1362.h #define PTD_PR(v) (((v) << 13) & PTD_PR_MSK) v 743 drivers/usb/host/isp1362.h #define isp1362_write_reg16(d, r, v) { \ v 746 drivers/usb/host/isp1362.h isp1362_write_data16(d, (u16)(v)); \ v 747 drivers/usb/host/isp1362.h RDBG("%s: Wrote %04x to %s[%02x]\n", __func__, (u16)(v), #r, \ v 751 drivers/usb/host/isp1362.h #define isp1362_write_reg32(d, r, v) { \ v 754 drivers/usb/host/isp1362.h isp1362_write_data32(d, (u32)(v)); \ v 755 drivers/usb/host/isp1362.h RDBG("%s: Wrote %08x to %s[%02x]\n", __func__, (u32)(v), #r, \ v 586 drivers/usb/host/ohci.h #define ohci_writel(o,v,r) _ohci_writel(o,v,r) v 69 drivers/usb/host/u132-hcd.c #define INT_MODULE_PARM(n, v) static int n = v;module_param(n, int, 0444) v 54 drivers/usb/misc/ftdi-elan.c #define INT_MODULE_PARM(n, v) static int n = v;module_param(n, int, 0444) v 45 drivers/usb/musb/tusb6010.h #define TUSB_PHY_OTG_CTRL_PHYREF_CLKSEL(v) (((v) & 3) << 7) v 69 drivers/usb/musb/tusb6010.h # define TUSB_DEV_OTG_TIMER_VAL(v) ((v) & 0x07ffffff) v 75 drivers/usb/musb/tusb6010.h #define TUSB_PRCM_CONF_SYS_CLKSEL(v) (((v) & 3) << 16) v 79 drivers/usb/musb/tusb6010.h #define TUSB_PRCM_MNGMT_SRP_FIX_TIMER(v) (((v) & 0xf) << 25) v 81 drivers/usb/musb/tusb6010.h #define TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(v) (((v) & 0xf) << 20) v 188 drivers/usb/musb/tusb6010.h #define TUSB_INT_CTRL_CONF_INT_RELCYC(v) (((v) & 0x7) << 18) v 191 drivers/usb/musb/tusb6010.h #define TUSB_GPIO_CONF_DMAREQ(v) (((v) & 0x3f) << 24) v 192 drivers/usb/musb/tusb6010.h #define TUSB_DMA_REQ_CONF_BURST_SIZE(v) (((v) & 3) << 26) v 193 drivers/usb/musb/tusb6010.h #define TUSB_DMA_REQ_CONF_DMA_REQ_EN(v) (((v) & 0x3f) << 20) v 194 drivers/usb/musb/tusb6010.h #define TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(v) (((v) & 0xf) << 16) v 197 drivers/usb/musb/tusb6010.h #define TUSB_EP0_CONFIG_XFR_SIZE(v) ((v) & 0x7f) v 199 drivers/usb/musb/tusb6010.h #define TUSB_EP_CONFIG_XFR_SIZE(v) ((v) & 0x7fffffff) v 205 drivers/usb/musb/tusb6010.h #define TUSB_DIDR1_HI_CHIP_REV(v) (((v) >> 17) & 0xf) v 83 drivers/usb/phy/phy-fsl-usb.c static void _fsl_writel_be(u32 v, unsigned __iomem *p) v 85 drivers/usb/phy/phy-fsl-usb.c out_be32(p, v); v 88 drivers/usb/phy/phy-fsl-usb.c static void _fsl_writel_le(u32 v, unsigned __iomem *p) v 90 drivers/usb/phy/phy-fsl-usb.c out_le32(p, v); v 94 drivers/usb/phy/phy-fsl-usb.c static void (*_fsl_writel)(u32 v, unsigned __iomem *p); v 97 drivers/usb/phy/phy-fsl-usb.c #define fsl_writel(v, p) (*_fsl_writel)((v), (p)) v 108 drivers/usb/serial/belkin_sa.c #define BSA_USB_CMD(c, v) usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0), \ v 110 drivers/usb/serial/belkin_sa.c (v), 0, NULL, 0, WDR_TIMEOUT) v 1698 drivers/usb/serial/ftdi_sio.c u8 v; v 1701 drivers/usb/serial/ftdi_sio.c if (kstrtou8(valbuf, 10, &v)) v 1704 drivers/usb/serial/ftdi_sio.c priv->latency = v; v 1720 drivers/usb/serial/ftdi_sio.c unsigned int v; v 1723 drivers/usb/serial/ftdi_sio.c if (kstrtouint(valbuf, 0, &v) || v >= 0x200) v 1726 drivers/usb/serial/ftdi_sio.c dev_dbg(&port->dev, "%s: setting event char = 0x%03x\n", __func__, v); v 1732 drivers/usb/serial/ftdi_sio.c v, priv->interface, v 2659 drivers/usb/serial/io_ti.c unsigned int v = simple_strtoul(valbuf, NULL, 0); v 2661 drivers/usb/serial/io_ti.c dev_dbg(dev, "%s: setting uart_mode = %d\n", __func__, v); v 2663 drivers/usb/serial/io_ti.c if (v < 256) v 2664 drivers/usb/serial/io_ti.c edge_port->bUartMode = v; v 2666 drivers/usb/serial/io_ti.c dev_err(dev, "%s - uart_mode %d is invalid\n", __func__, v); v 1117 drivers/usb/serial/iuu_phoenix.c unsigned long v; v 1119 drivers/usb/serial/iuu_phoenix.c if (kstrtoul(buf, 10, &v)) { v 1125 drivers/usb/serial/iuu_phoenix.c dev_dbg(dev, "%s: setting vcc_mode = %ld\n", __func__, v); v 1127 drivers/usb/serial/iuu_phoenix.c if ((v != 3) && (v != 5)) { v 1128 drivers/usb/serial/iuu_phoenix.c dev_err(dev, "%s - vcc_mode %ld is invalid\n", __func__, v); v 1130 drivers/usb/serial/iuu_phoenix.c iuu_vcc_set(port, v); v 1131 drivers/usb/serial/iuu_phoenix.c priv->vcc = v; v 31 drivers/usb/serial/qcserial.c #define DEVICE_G1K(v, p) \ v 32 drivers/usb/serial/qcserial.c USB_DEVICE(v, p), .driver_info = QCSERIAL_G1K v 33 drivers/usb/serial/qcserial.c #define DEVICE_SWI(v, p) \ v 34 drivers/usb/serial/qcserial.c USB_DEVICE(v, p), .driver_info = QCSERIAL_SWI v 35 drivers/usb/serial/qcserial.c #define DEVICE_HWI(v, p) \ v 36 drivers/usb/serial/qcserial.c USB_DEVICE(v, p), .driver_info = QCSERIAL_HWI v 462 drivers/usb/serial/usb-serial.c static int serial_proc_show(struct seq_file *m, void *v) v 191 drivers/usb/typec/tcpm/fusb302.c static int fusb302_debug_show(struct seq_file *s, void *v) v 556 drivers/usb/typec/tcpm/tcpm.c static int tcpm_debug_show(struct seq_file *s, void *v) v 2442 drivers/vhost/vhost.c bool v; v 2461 drivers/vhost/vhost.c v = vq->signalled_used_valid; v 2465 drivers/vhost/vhost.c if (unlikely(!v)) v 555 drivers/vhost/vringh.c __virtio16 v = 0; v 556 drivers/vhost/vringh.c int rc = get_user(v, (__force __virtio16 __user *)p); v 557 drivers/vhost/vringh.c *val = vringh16_to_cpu(vrh, v); v 563 drivers/vhost/vringh.c __virtio16 v = cpu_to_vringh16(vrh, val); v 564 drivers/vhost/vringh.c return put_user(v, (__force __virtio16 __user *)p); v 35 drivers/video/backlight/hp680_bl.c u16 v; v 48 drivers/video/backlight/hp680_bl.c v = inw(HD64461_GPBDR); v 49 drivers/video/backlight/hp680_bl.c v &= ~HD64461_GPBDR_LCDOFF; v 50 drivers/video/backlight/hp680_bl.c outw(v, HD64461_GPBDR); v 55 drivers/video/backlight/hp680_bl.c v = inw(HD64461_GPBDR); v 56 drivers/video/backlight/hp680_bl.c v |= HD64461_GPBDR_LCDOFF; v 57 drivers/video/backlight/hp680_bl.c outw(v, HD64461_GPBDR); v 104 drivers/video/backlight/pm8941-wled.c u8 v[2] = { val & 0xff, (val >> 8) & 0xf }; v 108 drivers/video/backlight/pm8941-wled.c v, 2); v 335 drivers/video/fbdev/68328fb.c u32 v; v 340 drivers/video/fbdev/68328fb.c v = (red << info->var.red.offset) | v 348 drivers/video/fbdev/68328fb.c ((u32 *) (info->pseudo_palette))[regno] = v; v 352 drivers/video/fbdev/68328fb.c ((u32 *) (info->pseudo_palette))[regno] = v; v 543 drivers/video/fbdev/amifb.c #define up2(v) (((v) + 1) & -2) v 544 drivers/video/fbdev/amifb.c #define down2(v) ((v) & -2) v 545 drivers/video/fbdev/amifb.c #define div2(v) ((v)>>1) v 546 drivers/video/fbdev/amifb.c #define mod2(v) ((v) & 1) v 548 drivers/video/fbdev/amifb.c #define up4(v) (((v) + 3) & -4) v 549 drivers/video/fbdev/amifb.c #define down4(v) ((v) & -4) v 550 drivers/video/fbdev/amifb.c #define mul4(v) ((v) << 2) v 551 drivers/video/fbdev/amifb.c #define div4(v) ((v)>>2) v 552 drivers/video/fbdev/amifb.c #define mod4(v) ((v) & 3) v 554 drivers/video/fbdev/amifb.c #define up8(v) (((v) + 7) & -8) v 555 drivers/video/fbdev/amifb.c #define down8(v) ((v) & -8) v 556 drivers/video/fbdev/amifb.c #define div8(v) ((v)>>3) v 557 drivers/video/fbdev/amifb.c #define mod8(v) ((v) & 7) v 559 drivers/video/fbdev/amifb.c #define up16(v) (((v) + 15) & -16) v 560 drivers/video/fbdev/amifb.c #define down16(v) ((v) & -16) v 561 drivers/video/fbdev/amifb.c #define div16(v) ((v)>>4) v 562 drivers/video/fbdev/amifb.c #define mod16(v) ((v) & 15) v 564 drivers/video/fbdev/amifb.c #define up32(v) (((v) + 31) & -32) v 565 drivers/video/fbdev/amifb.c #define down32(v) ((v) & -32) v 566 drivers/video/fbdev/amifb.c #define div32(v) ((v)>>5) v 567 drivers/video/fbdev/amifb.c #define mod32(v) ((v) & 31) v 569 drivers/video/fbdev/amifb.c #define up64(v) (((v) + 63) & -64) v 570 drivers/video/fbdev/amifb.c #define down64(v) ((v) & -64) v 571 drivers/video/fbdev/amifb.c #define div64(v) ((v)>>6) v 572 drivers/video/fbdev/amifb.c #define mod64(v) ((v) & 63) v 574 drivers/video/fbdev/amifb.c #define upx(x, v) (((v) + (x) - 1) & -(x)) v 575 drivers/video/fbdev/amifb.c #define downx(x, v) ((v) & -(x)) v 576 drivers/video/fbdev/amifb.c #define modx(x, v) ((v) & ((x) - 1)) v 106 drivers/video/fbdev/atafb_iplan2p2.c u32 pval[4], v, v1, mask; v 133 drivers/video/fbdev/atafb_iplan2p2.c v = *src32++; v 134 drivers/video/fbdev/atafb_iplan2p2.c v1 = v & mask; v 136 drivers/video/fbdev/atafb_iplan2p2.c pval[0] = (v ^ v1) << 8; v 148 drivers/video/fbdev/atafb_iplan2p2.c u32 pval[4], v, v1, mask; v 175 drivers/video/fbdev/atafb_iplan2p2.c v = *--src32; v 176 drivers/video/fbdev/atafb_iplan2p2.c v1 = v & mask; v 178 drivers/video/fbdev/atafb_iplan2p2.c pval[0] = (v ^ v1) >> 8; v 106 drivers/video/fbdev/atafb_iplan2p4.c u32 pval[4], v, v1, mask; v 135 drivers/video/fbdev/atafb_iplan2p4.c v = *src32++; v 136 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v 138 drivers/video/fbdev/atafb_iplan2p4.c pval[0] = (v ^ v1) << 8; v 139 drivers/video/fbdev/atafb_iplan2p4.c v = *src32++; v 140 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v 142 drivers/video/fbdev/atafb_iplan2p4.c pval[1] = (v ^ v1) << 8; v 155 drivers/video/fbdev/atafb_iplan2p4.c u32 pval[4], v, v1, mask; v 184 drivers/video/fbdev/atafb_iplan2p4.c v = *--src32; v 185 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v 187 drivers/video/fbdev/atafb_iplan2p4.c pval[0] = (v ^ v1) >> 8; v 188 drivers/video/fbdev/atafb_iplan2p4.c v = *--src32; v 189 drivers/video/fbdev/atafb_iplan2p4.c v1 = v & mask; v 191 drivers/video/fbdev/atafb_iplan2p4.c pval[1] = (v ^ v1) >> 8; v 113 drivers/video/fbdev/atafb_iplan2p8.c u32 pval[4], v, v1, mask; v 146 drivers/video/fbdev/atafb_iplan2p8.c v = *src32++; v 147 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 149 drivers/video/fbdev/atafb_iplan2p8.c pval[0] = (v ^ v1) << 8; v 150 drivers/video/fbdev/atafb_iplan2p8.c v = *src32++; v 151 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 153 drivers/video/fbdev/atafb_iplan2p8.c pval[1] = (v ^ v1) << 8; v 154 drivers/video/fbdev/atafb_iplan2p8.c v = *src32++; v 155 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 157 drivers/video/fbdev/atafb_iplan2p8.c pval[2] = (v ^ v1) << 8; v 158 drivers/video/fbdev/atafb_iplan2p8.c v = *src32++; v 159 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 161 drivers/video/fbdev/atafb_iplan2p8.c pval[3] = (v ^ v1) << 8; v 176 drivers/video/fbdev/atafb_iplan2p8.c u32 pval[4], v, v1, mask; v 209 drivers/video/fbdev/atafb_iplan2p8.c v = *--src32; v 210 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 212 drivers/video/fbdev/atafb_iplan2p8.c pval[0] = (v ^ v1) >> 8; v 213 drivers/video/fbdev/atafb_iplan2p8.c v = *--src32; v 214 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 216 drivers/video/fbdev/atafb_iplan2p8.c pval[1] = (v ^ v1) >> 8; v 217 drivers/video/fbdev/atafb_iplan2p8.c v = *--src32; v 218 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 220 drivers/video/fbdev/atafb_iplan2p8.c pval[2] = (v ^ v1) >> 8; v 221 drivers/video/fbdev/atafb_iplan2p8.c v = *--src32; v 222 drivers/video/fbdev/atafb_iplan2p8.c v1 = v & mask; v 224 drivers/video/fbdev/atafb_iplan2p8.c pval[3] = (v ^ v1) >> 8; v 377 drivers/video/fbdev/atafb_utils.h u32 *s, *d, v; v 382 drivers/video/fbdev/atafb_utils.h v = (*s++ & mask) | (*d & ~mask); v 383 drivers/video/fbdev/atafb_utils.h *d++ = v; v 385 drivers/video/fbdev/atafb_utils.h v = (*s++ & mask) | (*d & ~mask); v 386 drivers/video/fbdev/atafb_utils.h *d++ = v; v 389 drivers/video/fbdev/atafb_utils.h v = (*s++ & mask) | (*d & ~mask); v 390 drivers/video/fbdev/atafb_utils.h *d++ = v; v 391 drivers/video/fbdev/atafb_utils.h v = (*s++ & mask) | (*d & ~mask); v 392 drivers/video/fbdev/atafb_utils.h *d++ = v; v 503 drivers/video/fbdev/aty/aty128fb.c #define BIOS_IN8(v) (readb(bios + (v))) v 504 drivers/video/fbdev/aty/aty128fb.c #define BIOS_IN16(v) (readb(bios + (v)) | \ v 505 drivers/video/fbdev/aty/aty128fb.c (readb(bios + (v) + 1) << 8)) v 506 drivers/video/fbdev/aty/aty128fb.c #define BIOS_IN32(v) (readb(bios + (v)) | \ v 507 drivers/video/fbdev/aty/aty128fb.c (readb(bios + (v) + 1) << 8) | \ v 508 drivers/video/fbdev/aty/aty128fb.c (readb(bios + (v) + 2) << 16) | \ v 509 drivers/video/fbdev/aty/aty128fb.c (readb(bios + (v) + 3) << 24)) v 838 drivers/video/fbdev/aty/radeon_base.c struct fb_var_screeninfo v; v 842 drivers/video/fbdev/aty/radeon_base.c if (radeon_match_mode(rinfo, &v, var)) v 845 drivers/video/fbdev/aty/radeon_base.c switch (v.bits_per_pixel) { v 847 drivers/video/fbdev/aty/radeon_base.c v.bits_per_pixel = 8; v 850 drivers/video/fbdev/aty/radeon_base.c v.bits_per_pixel = 16; v 854 drivers/video/fbdev/aty/radeon_base.c v.bits_per_pixel = 24; v 859 drivers/video/fbdev/aty/radeon_base.c v.bits_per_pixel = 32; v 865 drivers/video/fbdev/aty/radeon_base.c switch (var_to_depth(&v)) { v 868 drivers/video/fbdev/aty/radeon_base.c v.red.offset = v.green.offset = v.blue.offset = 0; v 869 drivers/video/fbdev/aty/radeon_base.c v.red.length = v.green.length = v.blue.length = 8; v 870 drivers/video/fbdev/aty/radeon_base.c v.transp.offset = v.transp.length = 0; v 875 drivers/video/fbdev/aty/radeon_base.c v.red.offset = 10; v 876 drivers/video/fbdev/aty/radeon_base.c v.green.offset = 5; v 877 drivers/video/fbdev/aty/radeon_base.c v.blue.offset = 0; v 878 drivers/video/fbdev/aty/radeon_base.c v.red.length = v.green.length = v.blue.length = 5; v 879 drivers/video/fbdev/aty/radeon_base.c v.transp.offset = v.transp.length = 0; v 884 drivers/video/fbdev/aty/radeon_base.c v.red.offset = 11; v 885 drivers/video/fbdev/aty/radeon_base.c v.green.offset = 5; v 886 drivers/video/fbdev/aty/radeon_base.c v.blue.offset = 0; v 887 drivers/video/fbdev/aty/radeon_base.c v.red.length = 5; v 888 drivers/video/fbdev/aty/radeon_base.c v.green.length = 6; v 889 drivers/video/fbdev/aty/radeon_base.c v.blue.length = 5; v 890 drivers/video/fbdev/aty/radeon_base.c v.transp.offset = v.transp.length = 0; v 895 drivers/video/fbdev/aty/radeon_base.c v.red.offset = 16; v 896 drivers/video/fbdev/aty/radeon_base.c v.green.offset = 8; v 897 drivers/video/fbdev/aty/radeon_base.c v.blue.offset = 0; v 898 drivers/video/fbdev/aty/radeon_base.c v.red.length = v.blue.length = v.green.length = 8; v 899 drivers/video/fbdev/aty/radeon_base.c v.transp.offset = v.transp.length = 0; v 904 drivers/video/fbdev/aty/radeon_base.c v.red.offset = 16; v 905 drivers/video/fbdev/aty/radeon_base.c v.green.offset = 8; v 906 drivers/video/fbdev/aty/radeon_base.c v.blue.offset = 0; v 907 drivers/video/fbdev/aty/radeon_base.c v.red.length = v.blue.length = v.green.length = 8; v 908 drivers/video/fbdev/aty/radeon_base.c v.transp.offset = 24; v 909 drivers/video/fbdev/aty/radeon_base.c v.transp.length = 8; v 917 drivers/video/fbdev/aty/radeon_base.c if (v.yres_virtual < v.yres) v 918 drivers/video/fbdev/aty/radeon_base.c v.yres_virtual = v.yres; v 919 drivers/video/fbdev/aty/radeon_base.c if (v.xres_virtual < v.xres) v 920 drivers/video/fbdev/aty/radeon_base.c v.xres_virtual = v.xres; v 927 drivers/video/fbdev/aty/radeon_base.c v.xres_virtual = v.xres_virtual & ~7ul; v 929 drivers/video/fbdev/aty/radeon_base.c pitch = ((v.xres_virtual * ((v.bits_per_pixel + 1) / 8) + 0x3f) v 931 drivers/video/fbdev/aty/radeon_base.c v.xres_virtual = (pitch << 6) / ((v.bits_per_pixel + 1) / 8); v 934 drivers/video/fbdev/aty/radeon_base.c if (((v.xres_virtual * v.yres_virtual * nom) / den) > rinfo->mapped_vram) v 937 drivers/video/fbdev/aty/radeon_base.c if (v.xres_virtual < v.xres) v 938 drivers/video/fbdev/aty/radeon_base.c v.xres = v.xres_virtual; v 940 drivers/video/fbdev/aty/radeon_base.c if (v.xoffset > v.xres_virtual - v.xres) v 941 drivers/video/fbdev/aty/radeon_base.c v.xoffset = v.xres_virtual - v.xres - 1; v 943 drivers/video/fbdev/aty/radeon_base.c if (v.yoffset > v.yres_virtual - v.yres) v 944 drivers/video/fbdev/aty/radeon_base.c v.yoffset = v.yres_virtual - v.yres - 1; v 946 drivers/video/fbdev/aty/radeon_base.c v.red.msb_right = v.green.msb_right = v.blue.msb_right = v 947 drivers/video/fbdev/aty/radeon_base.c v.transp.offset = v.transp.length = v 948 drivers/video/fbdev/aty/radeon_base.c v.transp.msb_right = 0; v 950 drivers/video/fbdev/aty/radeon_base.c memcpy(var, &v, sizeof(v)); v 428 drivers/video/fbdev/aty/radeonfb.h #define BIOS_IN8(v) (readb(rinfo->bios_seg + (v))) v 429 drivers/video/fbdev/aty/radeonfb.h #define BIOS_IN16(v) (readb(rinfo->bios_seg + (v)) | \ v 430 drivers/video/fbdev/aty/radeonfb.h (readb(rinfo->bios_seg + (v) + 1) << 8)) v 431 drivers/video/fbdev/aty/radeonfb.h #define BIOS_IN32(v) (readb(rinfo->bios_seg + (v)) | \ v 432 drivers/video/fbdev/aty/radeonfb.h (readb(rinfo->bios_seg + (v) + 1) << 8) | \ v 433 drivers/video/fbdev/aty/radeonfb.h (readb(rinfo->bios_seg + (v) + 2) << 16) | \ v 434 drivers/video/fbdev/aty/radeonfb.h (readb(rinfo->bios_seg + (v) + 3) << 24)) v 1286 drivers/video/fbdev/cirrusfb.c u32 v; v 1293 drivers/video/fbdev/cirrusfb.c v = (red << info->var.red.offset) | v 1297 drivers/video/fbdev/cirrusfb.c cinfo->pseudo_palette[regno] = v; v 43 drivers/video/fbdev/core/fb_notify.c int fb_notifier_call_chain(unsigned long val, void *v) v 45 drivers/video/fbdev/core/fb_notify.c return blocking_notifier_call_chain(&fb_notifier_list, val, v); v 253 drivers/video/fbdev/core/fbcon.h #define FBCON_SWAP(i,r,v) ({ \ v 255 drivers/video/fbdev/core/fbcon.h typeof(v) _v = (v); \ v 710 drivers/video/fbdev/core/fbmem.c static void *fb_seq_next(struct seq_file *m, void *v, loff_t *pos) v 716 drivers/video/fbdev/core/fbmem.c static void fb_seq_stop(struct seq_file *m, void *v) v 721 drivers/video/fbdev/core/fbmem.c static int fb_seq_show(struct seq_file *m, void *v) v 723 drivers/video/fbdev/core/fbmem.c int i = *(loff_t *)v; v 107 drivers/video/fbdev/core/fbsysfs.c char v = 'p'; v 117 drivers/video/fbdev/core/fbsysfs.c v = 'i'; v 119 drivers/video/fbdev/core/fbsysfs.c v = 'd'; v 122 drivers/video/fbdev/core/fbsysfs.c m, mode->xres, mode->yres, v, mode->refresh); v 21 drivers/video/fbdev/core/modedb.c #define name_matches(v, s, l) \ v 22 drivers/video/fbdev/core/modedb.c ((v).name && !strncmp((s), (v).name, (l)) && strlen((v).name) == (l)) v 23 drivers/video/fbdev/core/modedb.c #define res_matches(v, x, y) \ v 24 drivers/video/fbdev/core/modedb.c ((v).xres == (x) && (v).yres == (y)) v 565 drivers/video/fbdev/cyber2000fb.c #define ENCODE_BIT(v, b1, m, b2) ((((v) >> (b1)) & (m)) << (b2)) v 658 drivers/video/fbdev/da8xx-fb.c u32 v; v 663 drivers/video/fbdev/da8xx-fb.c v = (red << info->var.red.offset) | v 667 drivers/video/fbdev/da8xx-fb.c ((u32 *) (info->pseudo_palette))[regno] = v; v 587 drivers/video/fbdev/fb-puv3.c u32 v; v 592 drivers/video/fbdev/fb-puv3.c v = (red << info->var.red.offset) | v 602 drivers/video/fbdev/fb-puv3.c ((u32 *) (info->pseudo_palette))[regno] = v; v 1216 drivers/video/fbdev/fsl-diu-fb.c u32 v; v 1223 drivers/video/fbdev/fsl-diu-fb.c v = (red << info->var.red.offset) | v 1228 drivers/video/fbdev/fsl-diu-fb.c pal[regno] = v; v 167 drivers/video/fbdev/geode/gx1fb_core.c u32 v; v 172 drivers/video/fbdev/geode/gx1fb_core.c v = chan_to_field(red, &info->var.red); v 173 drivers/video/fbdev/geode/gx1fb_core.c v |= chan_to_field(green, &info->var.green); v 174 drivers/video/fbdev/geode/gx1fb_core.c v |= chan_to_field(blue, &info->var.blue); v 176 drivers/video/fbdev/geode/gx1fb_core.c pal[regno] = v; v 190 drivers/video/fbdev/geode/gxfb_core.c u32 v; v 195 drivers/video/fbdev/geode/gxfb_core.c v = chan_to_field(red, &info->var.red); v 196 drivers/video/fbdev/geode/gxfb_core.c v |= chan_to_field(green, &info->var.green); v 197 drivers/video/fbdev/geode/gxfb_core.c v |= chan_to_field(blue, &info->var.blue); v 199 drivers/video/fbdev/geode/gxfb_core.c pal[regno] = v; v 298 drivers/video/fbdev/geode/lxfb_core.c u32 v; v 303 drivers/video/fbdev/geode/lxfb_core.c v = chan_to_field(red, &info->var.red); v 304 drivers/video/fbdev/geode/lxfb_core.c v |= chan_to_field(green, &info->var.green); v 305 drivers/video/fbdev/geode/lxfb_core.c v |= chan_to_field(blue, &info->var.blue); v 307 drivers/video/fbdev/geode/lxfb_core.c pal[regno] = v; v 219 drivers/video/fbdev/grvga.c u32 v; v 224 drivers/video/fbdev/grvga.c v = (red << info->var.red.offset) | v 229 drivers/video/fbdev/grvga.c ((u32 *) (info->pseudo_palette))[regno] = v; v 173 drivers/video/fbdev/hitfb.c unsigned short v; v 176 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_LDR1); v 177 drivers/video/fbdev/hitfb.c v &= ~HD64461_LDR1_DON; v 178 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_LDR1); v 180 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_LCDCCR); v 181 drivers/video/fbdev/hitfb.c v |= HD64461_LCDCCR_MOFF; v 182 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_LCDCCR); v 184 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_STBCR); v 185 drivers/video/fbdev/hitfb.c v |= HD64461_STBCR_SLCDST; v 186 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_STBCR); v 188 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_STBCR); v 189 drivers/video/fbdev/hitfb.c v &= ~HD64461_STBCR_SLCDST; v 190 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_STBCR); v 192 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_LCDCCR); v 193 drivers/video/fbdev/hitfb.c v &= ~(HD64461_LCDCCR_MOFF | HD64461_LCDCCR_STREQ); v 194 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_LCDCCR); v 197 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_LCDCCR); v 198 drivers/video/fbdev/hitfb.c } while(v&HD64461_LCDCCR_STBACK); v 200 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_LDR1); v 201 drivers/video/fbdev/hitfb.c v |= HD64461_LDR1_DON; v 202 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_LDR1); v 432 drivers/video/fbdev/hitfb.c u16 v; v 435 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_STBCR); v 436 drivers/video/fbdev/hitfb.c v |= HD64461_STBCR_SLCKE_IST; v 437 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_STBCR); v 444 drivers/video/fbdev/hitfb.c u16 v; v 446 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_STBCR); v 447 drivers/video/fbdev/hitfb.c v &= ~HD64461_STBCR_SLCKE_OST; v 449 drivers/video/fbdev/hitfb.c v = fb_readw(HD64461_STBCR); v 450 drivers/video/fbdev/hitfb.c v &= ~HD64461_STBCR_SLCKE_IST; v 451 drivers/video/fbdev/hitfb.c fb_writew(v, HD64461_STBCR); v 1200 drivers/video/fbdev/intelfb/intelfbdrv.c struct fb_var_screeninfo v; v 1221 drivers/video/fbdev/intelfb/intelfbdrv.c v = *var; v 1224 drivers/video/fbdev/intelfb/intelfbdrv.c if (pitches[i] >= v.xres_virtual) { v 1225 drivers/video/fbdev/intelfb/intelfbdrv.c v.xres_virtual = pitches[i]; v 1231 drivers/video/fbdev/intelfb/intelfbdrv.c if (v.bits_per_pixel <= 8) v 1232 drivers/video/fbdev/intelfb/intelfbdrv.c v.bits_per_pixel = 8; v 1233 drivers/video/fbdev/intelfb/intelfbdrv.c else if (v.bits_per_pixel <= 16) { v 1234 drivers/video/fbdev/intelfb/intelfbdrv.c if (v.bits_per_pixel == 16) v 1235 drivers/video/fbdev/intelfb/intelfbdrv.c v.green.length = 6; v 1236 drivers/video/fbdev/intelfb/intelfbdrv.c v.bits_per_pixel = 16; v 1237 drivers/video/fbdev/intelfb/intelfbdrv.c } else if (v.bits_per_pixel <= 32) v 1238 drivers/video/fbdev/intelfb/intelfbdrv.c v.bits_per_pixel = 32; v 1264 drivers/video/fbdev/intelfb/intelfbdrv.c switch (intelfb_var_to_depth(&v)) { v 1266 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.offset = v.green.offset = v.blue.offset = 0; v 1267 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.length = v.green.length = v.blue.length = 8; v 1268 drivers/video/fbdev/intelfb/intelfbdrv.c v.transp.offset = v.transp.length = 0; v 1271 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.offset = 10; v 1272 drivers/video/fbdev/intelfb/intelfbdrv.c v.green.offset = 5; v 1273 drivers/video/fbdev/intelfb/intelfbdrv.c v.blue.offset = 0; v 1274 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.length = v.green.length = v.blue.length = 5; v 1275 drivers/video/fbdev/intelfb/intelfbdrv.c v.transp.offset = v.transp.length = 0; v 1278 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.offset = 11; v 1279 drivers/video/fbdev/intelfb/intelfbdrv.c v.green.offset = 5; v 1280 drivers/video/fbdev/intelfb/intelfbdrv.c v.blue.offset = 0; v 1281 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.length = 5; v 1282 drivers/video/fbdev/intelfb/intelfbdrv.c v.green.length = 6; v 1283 drivers/video/fbdev/intelfb/intelfbdrv.c v.blue.length = 5; v 1284 drivers/video/fbdev/intelfb/intelfbdrv.c v.transp.offset = v.transp.length = 0; v 1287 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.offset = 16; v 1288 drivers/video/fbdev/intelfb/intelfbdrv.c v.green.offset = 8; v 1289 drivers/video/fbdev/intelfb/intelfbdrv.c v.blue.offset = 0; v 1290 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.length = v.green.length = v.blue.length = 8; v 1291 drivers/video/fbdev/intelfb/intelfbdrv.c v.transp.offset = v.transp.length = 0; v 1294 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.offset = 16; v 1295 drivers/video/fbdev/intelfb/intelfbdrv.c v.green.offset = 8; v 1296 drivers/video/fbdev/intelfb/intelfbdrv.c v.blue.offset = 0; v 1297 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.length = v.green.length = v.blue.length = 8; v 1298 drivers/video/fbdev/intelfb/intelfbdrv.c v.transp.offset = 24; v 1299 drivers/video/fbdev/intelfb/intelfbdrv.c v.transp.length = 8; v 1303 drivers/video/fbdev/intelfb/intelfbdrv.c if (v.xoffset > v.xres_virtual - v.xres) v 1304 drivers/video/fbdev/intelfb/intelfbdrv.c v.xoffset = v.xres_virtual - v.xres; v 1305 drivers/video/fbdev/intelfb/intelfbdrv.c if (v.yoffset > v.yres_virtual - v.yres) v 1306 drivers/video/fbdev/intelfb/intelfbdrv.c v.yoffset = v.yres_virtual - v.yres; v 1308 drivers/video/fbdev/intelfb/intelfbdrv.c v.red.msb_right = v.green.msb_right = v.blue.msb_right = v 1309 drivers/video/fbdev/intelfb/intelfbdrv.c v.transp.msb_right = 0; v 1311 drivers/video/fbdev/intelfb/intelfbdrv.c *var = v; v 43 drivers/video/fbdev/matrox/i2c-matroxfb.c int v; v 46 drivers/video/fbdev/matrox/i2c-matroxfb.c v = matroxfb_DAC_in(minfo, DAC_XGENIODATA); v 48 drivers/video/fbdev/matrox/i2c-matroxfb.c return v; v 53 drivers/video/fbdev/matrox/i2c-matroxfb.c int v; v 56 drivers/video/fbdev/matrox/i2c-matroxfb.c v = (matroxfb_DAC_in(minfo, DAC_XGENIOCTRL) & mask) | val; v 57 drivers/video/fbdev/matrox/i2c-matroxfb.c matroxfb_DAC_out(minfo, DAC_XGENIOCTRL, v); v 177 drivers/video/fbdev/metronomefb.c unsigned char v; v 277 drivers/video/fbdev/metronomefb.c v = mem[wfm_idx++]; v 278 drivers/video/fbdev/metronomefb.c if (v == wfm_hdr->swtb) { v 279 drivers/video/fbdev/metronomefb.c while (((v = mem[wfm_idx++]) != wfm_hdr->swtb) && v 281 drivers/video/fbdev/metronomefb.c metromem[mem_idx++] = v; v 286 drivers/video/fbdev/metronomefb.c if (v == wfm_hdr->endb) v 291 drivers/video/fbdev/metronomefb.c metromem[mem_idx++] = v; v 194 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define SPU_DMA_PITCH_V(v) ((v)<<16) v 308 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_CKEY_V(v) ((v)<<8) v 310 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_ALPHA_V(v) (v) v 139 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v) v 145 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c if (v) v 132 drivers/video/fbdev/omap2/omapfb/dss/core.c static int omap_dss_pm_notif(struct notifier_block *b, unsigned long v, void *d) v 134 drivers/video/fbdev/omap2/omapfb/dss/core.c DSSDBG("pm notif %lu\n", v); v 136 drivers/video/fbdev/omap2/omapfb/dss/core.c switch (v) { v 677 drivers/video/fbdev/omap2/omapfb/dss/dispc.c u32 v; v 678 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = FLD_VAL(v_coef[i].hc0_vc00, 7, 0) v 681 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firv_reg(plane, i, v); v 683 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_ovl_write_firv2_reg(plane, i, v); v 1176 drivers/video/fbdev/omap2/omapfb/dss/dispc.c u32 v; v 1178 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = dispc_read_reg(DISPC_GLOBAL_BUFFER); v 1180 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = FLD_MOD(v, 4, 2, 0); /* GFX BUF top to WB */ v 1181 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = FLD_MOD(v, 4, 5, 3); /* GFX BUF bottom to WB */ v 1182 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = FLD_MOD(v, 0, 26, 24); /* WB BUF top to GFX */ v 1183 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = FLD_MOD(v, 0, 29, 27); /* WB BUF bottom to GFX */ v 1185 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_GLOBAL_BUFFER, v); v 2202 drivers/video/fbdev/omap2/omapfb/dss/dsi.c u8 v; v 2211 drivers/video/fbdev/omap2/omapfb/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); v 2212 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r |= v << (8 * i); v 2235 drivers/video/fbdev/omap2/omapfb/dss/dsi.c u8 v; v 2244 drivers/video/fbdev/omap2/omapfb/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); v 2245 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r |= v << (8 * i); v 267 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h u32 t = 0, v; v 268 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h while (val != (v = REG_GET(base_addr, idx, b2, b1))) { v 270 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h return v; v 273 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h return v; v 73 drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c u32 v; v 88 drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); v 89 drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ v 90 drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ v 91 drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); v 50 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c unsigned v; v 65 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(ss_scl_high * sfr, 1000000); v 67 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 69 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v & 0xff, 7, 0); v 72 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(ss_scl_low * sfr, 1000000); v 74 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 76 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v & 0xff, 7, 0); v 79 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(fs_scl_high * sfr, 1000000); v 81 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 83 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v & 0xff, 7, 0); v 86 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(fs_scl_low * sfr, 1000000); v 88 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c (v >> 8) & 0xff, 7, 0); v 90 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v & 0xff, 7, 0); v 93 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c v = DIV_ROUND_UP_ULL(sda_hold * sfr, 1000000); v 94 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c REG_FLD_MOD(base, HDMI_CORE_I2CM_SDA_HOLD_ADDR, v & 0xff, 7, 0); v 119 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c u32 v; v 123 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c v = hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS_RAW); v 124 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c if (v & HDMI_IRQ_VIDEO_FRAME_DONE) v 229 drivers/video/fbdev/omap2/omapfb/dss/pll.c u32 v = readl_relaxed(pll->base + PLL_STATUS); v 230 drivers/video/fbdev/omap2/omapfb/dss/pll.c v &= hsdiv_ack_mask; v 231 drivers/video/fbdev/omap2/omapfb/dss/pll.c if (v == hsdiv_ack_mask) v 149 drivers/video/fbdev/pm2fb.c static inline void pm2_WR(struct pm2fb_par *p, s32 off, u32 v) v 151 drivers/video/fbdev/pm2fb.c fb_writel(v, p->v_regs + off); v 168 drivers/video/fbdev/pm2fb.c static inline void pm2_RDAC_WR(struct pm2fb_par *p, s32 idx, u32 v) v 172 drivers/video/fbdev/pm2fb.c pm2_WR(p, PM2R_RD_INDEXED_DATA, v); v 176 drivers/video/fbdev/pm2fb.c static inline void pm2v_RDAC_WR(struct pm2fb_par *p, s32 idx, u32 v) v 180 drivers/video/fbdev/pm2fb.c pm2_WR(p, PM2VR_RD_INDEXED_DATA, v); v 928 drivers/video/fbdev/pm2fb.c u32 v; v 933 drivers/video/fbdev/pm2fb.c v = (red << info->var.red.offset) | v 944 drivers/video/fbdev/pm2fb.c par->palette[regno] = v; v 99 drivers/video/fbdev/pm3fb.c static inline void PM3_WRITE_REG(struct pm3_par *par, s32 off, u32 v) v 101 drivers/video/fbdev/pm3fb.c fb_writel(v, par->v_regs + off); v 110 drivers/video/fbdev/pm3fb.c static inline void PM3_WRITE_DAC_REG(struct pm3_par *par, unsigned r, u8 v) v 116 drivers/video/fbdev/pm3fb.c PM3_WRITE_REG(par, PM3RD_IndexedData, v); v 182 drivers/video/fbdev/pm3fb.c static inline int pm3fb_shift_bpp(unsigned bpp, int v) v 186 drivers/video/fbdev/pm3fb.c return (v >> 4); v 188 drivers/video/fbdev/pm3fb.c return (v >> 3); v 190 drivers/video/fbdev/pm3fb.c return (v >> 2); v 1114 drivers/video/fbdev/pm3fb.c u32 v; v 1119 drivers/video/fbdev/pm3fb.c v = (red << info->var.red.offset) | v 1129 drivers/video/fbdev/pm3fb.c ((u32 *)(info->pseudo_palette))[regno] = v; v 80 drivers/video/fbdev/pmag-ba-fb.c static inline void dac_write(struct pmagbafb_par *par, unsigned int reg, u8 v) v 82 drivers/video/fbdev/pmag-ba-fb.c writeb(v, par->dac + reg / 4); v 69 drivers/video/fbdev/pmagb-b-fb.c static inline void sfb_write(struct pmagbbfb_par *par, unsigned int reg, u32 v) v 71 drivers/video/fbdev/pmagb-b-fb.c writel(v, par->sfb + reg / 4); v 79 drivers/video/fbdev/pmagb-b-fb.c static inline void dac_write(struct pmagbbfb_par *par, unsigned int reg, u8 v) v 81 drivers/video/fbdev/pmagb-b-fb.c writeb(v, par->dac + reg / 4); v 89 drivers/video/fbdev/pmagb-b-fb.c static inline void gp0_write(struct pmagbbfb_par *par, u32 v) v 91 drivers/video/fbdev/pmagb-b-fb.c writel(v, par->mmio + PMAGB_B_GP0); v 392 drivers/video/fbdev/pxa168fb.c struct fb_var_screeninfo *v = &info->var; v 396 drivers/video/fbdev/pxa168fb.c x = v->xres + v->right_margin + v->hsync_len + v->left_margin; v 397 drivers/video/fbdev/pxa168fb.c y = v->yres + v->lower_margin + v->vsync_len + v->upper_margin; v 21 drivers/video/fbdev/pxa168fb.h #define SPU_DMA_PITCH_V(v) ((v) << 16) v 135 drivers/video/fbdev/pxa168fb.h #define CFG_CKEY_V(v) ((v) << 8) v 137 drivers/video/fbdev/pxa168fb.h #define CFG_ALPHA_V(v) (v) v 309 drivers/video/fbdev/pxafb.c #define SET_PIXFMT(v, r, g, b, t) \ v 311 drivers/video/fbdev/pxafb.c (v)->transp.offset = (t) ? (r) + (g) + (b) : 0; \ v 312 drivers/video/fbdev/pxafb.c (v)->transp.length = (t) ? (t) : 0; \ v 313 drivers/video/fbdev/pxafb.c (v)->blue.length = (b); (v)->blue.offset = 0; \ v 314 drivers/video/fbdev/pxafb.c (v)->green.length = (g); (v)->green.offset = (b); \ v 315 drivers/video/fbdev/pxafb.c (v)->red.length = (r); (v)->red.offset = (b) + (g); \ v 535 drivers/video/fbdev/riva/riva_hw.c int done, g,v, p; v 542 drivers/video/fbdev/riva/riva_hw.c for (v=128; v >=32; v = v>> 1) v 546 drivers/video/fbdev/riva/riva_hw.c ainfo->vburst_size = v; v 45 drivers/video/fbdev/s3c-fb.c #define writel(v, r) do { \ v 46 drivers/video/fbdev/s3c-fb.c pr_debug("%s: %08x => %p\n", __func__, (unsigned int)v, r); \ v 47 drivers/video/fbdev/s3c-fb.c __raw_writel(v, r); \ v 499 drivers/video/fbdev/sis/sis_main.c if(monitor->vmin > sisfb_ddcsmodes[i].v) monitor->vmin = sisfb_ddcsmodes[i].v; v 500 drivers/video/fbdev/sis/sis_main.c if(monitor->vmax < sisfb_ddcsmodes[i].v) monitor->vmax = sisfb_ddcsmodes[i].v; v 518 drivers/video/fbdev/sis/sis_main.c (refresh == sisfb_ddcfmodes[j].v)) { v 521 drivers/video/fbdev/sis/sis_main.c if(monitor->vmin > sisfb_ddcsmodes[j].v) monitor->vmin = sisfb_ddcsmodes[j].v; v 522 drivers/video/fbdev/sis/sis_main.c if(monitor->vmax < sisfb_ddcsmodes[j].v) monitor->vmax = sisfb_ddcsmodes[j].v; v 454 drivers/video/fbdev/sis/sis_main.h u16 v; v 475 drivers/video/fbdev/sis/sis_main.h u16 v; v 397 drivers/video/fbdev/skeletonfb.c u32 v; v 402 drivers/video/fbdev/skeletonfb.c v = (red << info->var.red.offset) | v 407 drivers/video/fbdev/skeletonfb.c ((u32*)(info->pseudo_palette))[regno] = v; v 174 drivers/video/fbdev/tridentfb.c static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v) v 176 drivers/video/fbdev/tridentfb.c fb_writel(v, par->io_virt + r); v 591 drivers/video/fbdev/vermilion/vermilion.c struct fb_var_screeninfo v; v 593 drivers/video/fbdev/vermilion/vermilion.c v = *var; v 615 drivers/video/fbdev/vermilion/vermilion.c v.pixclock = KHZ2PICOS(nearest_clock); v 626 drivers/video/fbdev/vermilion/vermilion.c switch (v.bits_per_pixel) { v 628 drivers/video/fbdev/vermilion/vermilion.c v.bits_per_pixel = 16; v 631 drivers/video/fbdev/vermilion/vermilion.c v.bits_per_pixel = 32; v 645 drivers/video/fbdev/vermilion/vermilion.c switch (v.bits_per_pixel) { v 654 drivers/video/fbdev/vermilion/vermilion.c vmlfb_set_pref_pixel_format(&v); v 666 drivers/video/fbdev/vermilion/vermilion.c vmlfb_set_pref_pixel_format(&v); v 673 drivers/video/fbdev/vermilion/vermilion.c *var = v; v 953 drivers/video/fbdev/vermilion/vermilion.c u32 v; v 970 drivers/video/fbdev/vermilion/vermilion.c v = (red << info->var.red.offset) | v 977 drivers/video/fbdev/vermilion/vermilion.c ((u32 *) info->pseudo_palette)[regno] = v; v 981 drivers/video/fbdev/vermilion/vermilion.c ((u32 *) info->pseudo_palette)[regno] = v; v 328 drivers/video/fbdev/vfb.c u32 v; v 333 drivers/video/fbdev/vfb.c v = (red << info->var.red.offset) | v 341 drivers/video/fbdev/vfb.c ((u32 *) (info->pseudo_palette))[regno] = v; v 345 drivers/video/fbdev/vfb.c ((u32 *) (info->pseudo_palette))[regno] = v; v 57 drivers/video/fbdev/via/via-core.c static inline void viafb_mmio_write(int reg, u32 v) v 59 drivers/video/fbdev/via/via-core.c iowrite32(v, global_dev.engine_mmio + reg); v 1110 drivers/video/fbdev/via/viafbdev.c static int viafb_dvp0_proc_show(struct seq_file *m, void *v) v 1185 drivers/video/fbdev/via/viafbdev.c static int viafb_dvp1_proc_show(struct seq_file *m, void *v) v 1250 drivers/video/fbdev/via/viafbdev.c static int viafb_dfph_proc_show(struct seq_file *m, void *v) v 1285 drivers/video/fbdev/via/viafbdev.c static int viafb_dfpl_proc_show(struct seq_file *m, void *v) v 1320 drivers/video/fbdev/via/viafbdev.c static int viafb_vt1636_proc_show(struct seq_file *m, void *v) v 1458 drivers/video/fbdev/via/viafbdev.c static int __maybe_unused viafb_sup_odev_proc_show(struct seq_file *m, void *v) v 1494 drivers/video/fbdev/via/viafbdev.c static int viafb_iga1_odev_proc_show(struct seq_file *m, void *v) v 1534 drivers/video/fbdev/via/viafbdev.c static int viafb_iga2_odev_proc_show(struct seq_file *m, void *v) v 218 drivers/video/fbdev/xen-fbfront.c u32 v; v 230 drivers/video/fbdev/xen-fbfront.c v = (red << info->var.red.offset) | v 238 drivers/video/fbdev/xen-fbfront.c ((u32 *)info->pseudo_palette)[regno] = v; v 108 drivers/virtio/virtio_pci_common.c unsigned i, v; v 140 drivers/virtio/virtio_pci_common.c v = vp_dev->msix_used_vectors; v 141 drivers/virtio/virtio_pci_common.c snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names, v 143 drivers/virtio/virtio_pci_common.c err = request_irq(pci_irq_vector(vp_dev->pci_dev, v), v 144 drivers/virtio/virtio_pci_common.c vp_config_changed, 0, vp_dev->msix_names[v], v 150 drivers/virtio/virtio_pci_common.c v = vp_dev->config_vector(vp_dev, v); v 152 drivers/virtio/virtio_pci_common.c if (v == VIRTIO_MSI_NO_VECTOR) { v 159 drivers/virtio/virtio_pci_common.c v = vp_dev->msix_used_vectors; v 160 drivers/virtio/virtio_pci_common.c snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names, v 162 drivers/virtio/virtio_pci_common.c err = request_irq(pci_irq_vector(vp_dev->pci_dev, v), v 163 drivers/virtio/virtio_pci_common.c vp_vring_interrupt, 0, vp_dev->msix_names[v], v 234 drivers/virtio/virtio_pci_common.c int v = vp_dev->vqs[vq->index]->msix_vector; v 236 drivers/virtio/virtio_pci_common.c if (v != VIRTIO_MSI_NO_VECTOR) { v 237 drivers/virtio/virtio_pci_common.c int irq = pci_irq_vector(vp_dev->pci_dev, v); v 439 drivers/visorbus/visorbus_main.c static int bus_info_debugfs_show(struct seq_file *seq, void *v) v 46 drivers/watchdog/ar7_wdt.c #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x)) v 176 drivers/watchdog/octeon-wdt-main.c int v; v 179 drivers/watchdog/octeon-wdt-main.c v = (value >> ((digits - d - 1) * 4)) & 0xf; v 180 drivers/watchdog/octeon-wdt-main.c if (v >= 10) v 181 drivers/watchdog/octeon-wdt-main.c prom_putchar('a' + v - 10); v 183 drivers/watchdog/octeon-wdt-main.c prom_putchar('0' + v); v 50 drivers/watchdog/orion_wdt.c #define WDT_A370_RATIO_MASK(v) ((v) << 16) v 77 drivers/watchdog/pic32-dmt.c u32 v; v 85 drivers/watchdog/pic32-dmt.c v = readl(dmt->regs + DMTSTAT_REG) & DMTSTAT_WINOPN; v 86 drivers/watchdog/pic32-dmt.c if (v == DMTSTAT_WINOPN) v 110 drivers/watchdog/pic32-dmt.c u32 v; v 117 drivers/watchdog/pic32-dmt.c v = readl(rst_base); v 122 drivers/watchdog/pic32-dmt.c return v & RESETCON_DMT_TIMEOUT; v 52 drivers/watchdog/pic32-wdt.c u32 v = readl(wdt->regs + WDTCON_REG); v 54 drivers/watchdog/pic32-wdt.c return (v >> WDTCON_RMPS_SHIFT) & WDTCON_RMPS_MASK; v 59 drivers/watchdog/pic32-wdt.c u32 v = readl(wdt->regs + WDTCON_REG); v 61 drivers/watchdog/pic32-wdt.c return (v >> WDTCON_RMCS_SHIFT) & WDTCON_RMCS_MASK; v 66 drivers/watchdog/pic32-wdt.c u32 v = readl(wdt->rst_base); v 70 drivers/watchdog/pic32-wdt.c return v & RESETCON_WDT_TIMEOUT; v 383 drivers/xen/balloon.c static int xen_memory_notifier(struct notifier_block *nb, unsigned long val, void *v) v 273 drivers/xen/events/events_2l.c struct vcpu_info *v; v 281 drivers/xen/events/events_2l.c v = per_cpu(xen_vcpu, i); v 284 drivers/xen/events/events_2l.c : v->evtchn_upcall_mask; v 286 drivers/xen/events/events_2l.c pending, v->evtchn_upcall_pending, v 287 drivers/xen/events/events_2l.c (int)(sizeof(v->evtchn_pending_sel)*2), v 288 drivers/xen/events/events_2l.c v->evtchn_pending_sel); v 290 drivers/xen/events/events_2l.c v = per_cpu(xen_vcpu, cpu); v 335 drivers/xen/events/events_2l.c sync_test_bit(word_idx, BM(&v->evtchn_pending_sel)) v 164 drivers/xen/time.c area.addr.v = &per_cpu(xen_runstate, cpu); v 80 drivers/xen/xen-scsiback.c struct ids_tuple v; /* translate from */ v 628 drivers/xen/xen-scsiback.c struct ids_tuple *v) v 636 drivers/xen/xen-scsiback.c if ((entry->v.chn == v->chn) && v 637 drivers/xen/xen-scsiback.c (entry->v.tgt == v->tgt) && v 638 drivers/xen/xen-scsiback.c (entry->v.lun == v->lun)) { v 875 drivers/xen/xen-scsiback.c struct vscsibk_info *info, struct ids_tuple *v) v 881 drivers/xen/xen-scsiback.c if ((entry->v.chn == v->chn) && v 882 drivers/xen/xen-scsiback.c (entry->v.tgt == v->tgt) && v 883 drivers/xen/xen-scsiback.c (entry->v.lun == v->lun)) v 893 drivers/xen/xen-scsiback.c char *phy, struct ids_tuple *v) v 956 drivers/xen/xen-scsiback.c if (scsiback_chk_translation_entry(info, v)) { v 964 drivers/xen/xen-scsiback.c new->v = *v; v 993 drivers/xen/xen-scsiback.c struct ids_tuple *v) v 1001 drivers/xen/xen-scsiback.c entry = scsiback_chk_translation_entry(info, v); v 750 drivers/xen/xenbus/xenbus_probe.c uint64_t v = 0; v 752 drivers/xen/xenbus/xenbus_probe.c err = hvm_get_parameter(HVM_PARAM_STORE_EVTCHN, &v); v 753 drivers/xen/xenbus/xenbus_probe.c if (!err && v) v 754 drivers/xen/xenbus/xenbus_probe.c xen_store_evtchn = v; v 771 drivers/xen/xenbus/xenbus_probe.c uint64_t v = 0; v 803 drivers/xen/xenbus/xenbus_probe.c err = hvm_get_parameter(HVM_PARAM_STORE_EVTCHN, &v); v 806 drivers/xen/xenbus/xenbus_probe.c xen_store_evtchn = (int)v; v 807 drivers/xen/xenbus/xenbus_probe.c err = hvm_get_parameter(HVM_PARAM_STORE_PFN, &v); v 810 drivers/xen/xenbus/xenbus_probe.c xen_store_gfn = (unsigned long)v; v 70 drivers/zorro/proc.c static void * zorro_seq_next(struct seq_file *m, void *v, loff_t *pos) v 76 drivers/zorro/proc.c static void zorro_seq_stop(struct seq_file *m, void *v) v 80 drivers/zorro/proc.c static int zorro_seq_show(struct seq_file *m, void *v) v 82 drivers/zorro/proc.c unsigned int slot = *(loff_t *)v; v 46 fs/adfs/dir_f.c #define ror13(v) ((v >> 13) | (v << 19)) v 119 fs/adfs/dir_f.c __le32 v = *ptr.ptr32++; v 120 fs/adfs/dir_f.c dircheck = le32_to_cpu(v) ^ ror13(dircheck); v 85 fs/adfs/map.c u32 v = le32_to_cpu(_map[mapptr >> 5]) >> (mapptr & 31); v 86 fs/adfs/map.c while (v == 0) { v 90 fs/adfs/map.c v = le32_to_cpu(_map[mapptr >> 5]); v 93 fs/adfs/map.c mapptr += 1 + ffz(~v); v 163 fs/adfs/map.c u32 v = le32_to_cpu(_map[mapptr >> 5]) >> (mapptr & 31); v 164 fs/adfs/map.c while (v == 0) { v 168 fs/adfs/map.c v = le32_to_cpu(_map[mapptr >> 5]); v 171 fs/adfs/map.c mapptr += 1 + ffz(~v); v 34 fs/afs/proc.c static int afs_proc_cells_show(struct seq_file *m, void *v) v 39 fs/afs/proc.c if (v == SEQ_START_TOKEN) { v 45 fs/afs/proc.c cell = list_entry(v, struct afs_cell, proc_link); v 64 fs/afs/proc.c static void *afs_proc_cells_next(struct seq_file *m, void *v, loff_t *pos) v 66 fs/afs/proc.c return seq_hlist_next_rcu(v, &afs_seq2net(m)->proc_cells, pos); v 69 fs/afs/proc.c static void afs_proc_cells_stop(struct seq_file *m, void *v) v 150 fs/afs/proc.c static int afs_proc_rootcell_show(struct seq_file *m, void *v) v 209 fs/afs/proc.c static int afs_proc_cell_volumes_show(struct seq_file *m, void *v) v 212 fs/afs/proc.c struct afs_volume *vol = list_entry(v, struct afs_volume, proc_link); v 215 fs/afs/proc.c if (v == &cell->proc_volumes) { v 236 fs/afs/proc.c static void *afs_proc_cell_volumes_next(struct seq_file *m, void *v, v 241 fs/afs/proc.c return seq_list_next(v, &cell->proc_volumes, _pos); v 244 fs/afs/proc.c static void afs_proc_cell_volumes_stop(struct seq_file *m, void *v) v 284 fs/afs/proc.c static int afs_proc_cell_vlservers_show(struct seq_file *m, void *v) v 293 fs/afs/proc.c if (v == SEQ_START_TOKEN) { v 300 fs/afs/proc.c entry = v; v 341 fs/afs/proc.c static void *afs_proc_cell_vlservers_next(struct seq_file *m, void *v, v 357 fs/afs/proc.c static void afs_proc_cell_vlservers_stop(struct seq_file *m, void *v) v 373 fs/afs/proc.c static int afs_proc_servers_show(struct seq_file *m, void *v) v 379 fs/afs/proc.c if (v == SEQ_START_TOKEN) { v 384 fs/afs/proc.c server = list_entry(v, struct afs_server, proc_link); v 405 fs/afs/proc.c static void *afs_proc_servers_next(struct seq_file *m, void *v, loff_t *_pos) v 407 fs/afs/proc.c return seq_hlist_next_rcu(v, &afs_seq2net(m)->fs_proc, _pos); v 410 fs/afs/proc.c static void afs_proc_servers_stop(struct seq_file *m, void *v) v 427 fs/afs/proc.c static int afs_proc_sysname_show(struct seq_file *m, void *v) v 431 fs/afs/proc.c unsigned int i = (unsigned long)v - 1; v 452 fs/afs/proc.c static void *afs_proc_sysname_next(struct seq_file *m, void *v, loff_t *pos) v 463 fs/afs/proc.c static void afs_proc_sysname_stop(struct seq_file *m, void *v) v 571 fs/afs/proc.c static int afs_proc_stats_show(struct seq_file *m, void *v) v 1309 fs/btrfs/ctree.h #define le8_to_cpu(v) (v) v 1310 fs/btrfs/ctree.h #define cpu_to_le8(v) (v) v 20 fs/cachefiles/proc.c static int cachefiles_histogram_show(struct seq_file *m, void *v) v 25 fs/cachefiles/proc.c switch ((unsigned long) v) { v 33 fs/cachefiles/proc.c index = (unsigned long) v - 3; v 62 fs/cachefiles/proc.c static void *cachefiles_histogram_next(struct seq_file *m, void *v, loff_t *pos) v 72 fs/cachefiles/proc.c static void cachefiles_histogram_stop(struct seq_file *m, void *v) v 95 fs/ceph/dir.c int v = ceph_frag_compare(fpos_frag(l), fpos_frag(r)); v 96 fs/ceph/dir.c if (v) v 97 fs/ceph/dir.c return v; v 179 fs/ceph/inode.c static u32 __ceph_choose_frag(struct ceph_inode_info *ci, u32 v, v 191 fs/ceph/inode.c WARN_ON(!ceph_frag_contains_value(t, v)); v 205 fs/ceph/inode.c dout("choose_frag(%x) %x splits by %d (%d ways)\n", v, t, v 209 fs/ceph/inode.c if (ceph_frag_contains_value(n, v)) { v 216 fs/ceph/inode.c dout("choose_frag(%x) = %x\n", v, t); v 221 fs/ceph/inode.c u32 ceph_choose_frag(struct ceph_inode_info *ci, u32 v, v 226 fs/ceph/inode.c ret = __ceph_choose_frag(ci, v, pfrag, found); v 18 fs/ceph/locks.c u64 v = lock_secret ^ (u64)(unsigned long)addr; v 24 fs/ceph/locks.c v |= (1ULL << 63); v 25 fs/ceph/locks.c return v; v 617 fs/ceph/super.h extern u32 ceph_choose_frag(struct ceph_inode_info *ci, u32 v, v 143 fs/cifs/cifs_debug.c static int cifs_debug_files_proc_show(struct seq_file *m, void *v) v 195 fs/cifs/cifs_debug.c static int cifs_debug_data_proc_show(struct seq_file *m, void *v) v 495 fs/cifs/cifs_debug.c static int cifs_stats_proc_show(struct seq_file *m, void *v) v 601 fs/cifs/cifs_debug.c static int name##_proc_show(struct seq_file *m, void *v) \ v 714 fs/cifs/cifs_debug.c static int cifsFYI_proc_show(struct seq_file *m, void *v) v 753 fs/cifs/cifs_debug.c static int cifs_linux_ext_proc_show(struct seq_file *m, void *v) v 784 fs/cifs/cifs_debug.c static int cifs_lookup_cache_proc_show(struct seq_file *m, void *v) v 815 fs/cifs/cifs_debug.c static int traceSMB_proc_show(struct seq_file *m, void *v) v 846 fs/cifs/cifs_debug.c static int cifs_security_flags_proc_show(struct seq_file *m, void *v) v 28 fs/cifs/dfs_cache.c #define IS_INTERLINK_SET(v) ((v) & (DFSREF_REFERRAL_SERVER | \ v 159 fs/cifs/dfs_cache.c static int dfscache_proc_show(struct seq_file *m, void *v) v 297 fs/dax.c unsigned long v = xa_to_value(entry); v 298 fs/dax.c return xas_store(xas, xa_mk_value(v | DAX_LOCKED)); v 107 fs/dlm/dir.c __be16 v; v 113 fs/dlm/dir.c memcpy(&v, b, sizeof(__be16)); v 114 fs/dlm/dir.c namelen = be16_to_cpu(v); v 172 fs/erofs/internal.h int v = atomic_read(&grp->refcount); v 175 fs/erofs/internal.h DBG_BUGON(v == EROFS_LOCKED_MAGIC); v 176 fs/erofs/internal.h return v; v 19 fs/erofs/tagptr.h uintptr_t v; \ v 49 fs/erofs/tagptr.h ((typeof(type)){ .v = (uintptr_t)(val) }) v 55 fs/erofs/tagptr.h #define tagptr_cast_ptr(tptr) ((void *)(tptr).v) v 66 fs/erofs/tagptr.h ((void *)((tptr).v & ~__tagptr_mask(tptr))) v 69 fs/erofs/tagptr.h ((tptr).v & __tagptr_mask(tptr)) v 76 fs/erofs/tagptr.h (tptr1).v == (tptr2).v; }) v 85 fs/erofs/tagptr.h tagptr_init(o, cmpxchg(&ptptr->v, o.v, n.v)); }) v 98 fs/erofs/tagptr.h ptptr->v |= tags; \ v 106 fs/erofs/tagptr.h ptptr->v &= ~tags; \ v 122 fs/erofs/zdata.h unsigned long *v; v 130 fs/erofs/zdata.h u.v = &page_private(page); v 139 fs/erofs/zdata.h unsigned long v; v 143 fs/erofs/zdata.h set_page_private(page, u.v); v 151 fs/erofs/zdata.h unsigned long *p, o, v, id; v 164 fs/erofs/zdata.h v = (index << Z_EROFS_ONLINEPAGE_INDEX_SHIFT) | v 166 fs/erofs/zdata.h if (cmpxchg(p, o, v) != o) v 173 fs/erofs/zdata.h unsigned int v; v 176 fs/erofs/zdata.h u.v = &page_private(page); v 178 fs/erofs/zdata.h v = atomic_dec_return(u.o); v 179 fs/erofs/zdata.h if (!(v & Z_EROFS_ONLINEPAGE_COUNT_MASK)) { v 188 fs/erofs/zmap.c const unsigned int v = get_unaligned_le32(in + pos / 8) >> (pos & 7); v 189 fs/erofs/zmap.c const unsigned int lo = v & lomask; v 191 fs/erofs/zmap.c *type = (v >> lobits) & 3; v 120 fs/ext2/inode.c static inline void add_chain(Indirect *p, struct buffer_head *bh, __le32 *v) v 122 fs/ext2/inode.c p->key = *(p->p = v); v 3377 fs/ext4/ext4.h #define ext4_ioend_wq(v) (&ext4__ioend_wq[((unsigned long)(v)) %\ v 1565 fs/ext4/extents_status.c int ext4_seq_es_shrinker_info_show(struct seq_file *seq, void *v) v 1572 fs/ext4/extents_status.c if (v != SEQ_START_TOKEN) v 239 fs/ext4/extents_status.h extern int ext4_seq_es_shrinker_info_show(struct seq_file *seq, void *v); v 37 fs/ext4/indirect.c static inline void add_chain(Indirect *p, struct buffer_head *bh, __le32 *v) v 39 fs/ext4/indirect.c p->key = *(p->p = v); v 2270 fs/ext4/mballoc.c static void *ext4_mb_seq_groups_next(struct seq_file *seq, void *v, loff_t *pos) v 2282 fs/ext4/mballoc.c static int ext4_mb_seq_groups_show(struct seq_file *seq, void *v) v 2285 fs/ext4/mballoc.c ext4_group_t group = (ext4_group_t) ((unsigned long) v); v 2333 fs/ext4/mballoc.c static void ext4_mb_seq_groups_stop(struct seq_file *seq, void *v) v 3839 fs/ext4/super.c unsigned v, max = (sbi->s_inode_size - v 3842 fs/ext4/super.c v = le16_to_cpu(es->s_want_extra_isize); v 3843 fs/ext4/super.c if (v > max) { v 3845 fs/ext4/super.c "bad s_want_extra_isize: %d", v); v 3848 fs/ext4/super.c if (sbi->s_want_extra_isize < v) v 3849 fs/ext4/super.c sbi->s_want_extra_isize = v; v 3851 fs/ext4/super.c v = le16_to_cpu(es->s_min_extra_isize); v 3852 fs/ext4/super.c if (v > max) { v 3854 fs/ext4/super.c "bad s_min_extra_isize: %d", v); v 3857 fs/ext4/super.c if (sbi->s_want_extra_isize < v) v 3858 fs/ext4/super.c sbi->s_want_extra_isize = v; v 279 fs/f2fs/debug.c static int stat_show(struct seq_file *s, void *v) v 70 fs/f2fs/node.h #define nat_set_version(nat, v) ((nat)->ni.version = (v)) v 795 fs/file.c unsigned long v = __fdget(fd); v 796 fs/file.c struct file *file = (struct file *)(v & ~3); v 800 fs/file.c v |= FDPUT_POS_UNLOCK; v 804 fs/file.c return v; v 229 fs/filesystems.c static int filesystems_proc_show(struct seq_file *m, void *v) v 23 fs/fscache/histogram.c static int fscache_histogram_show(struct seq_file *m, void *v) v 28 fs/fscache/histogram.c switch ((unsigned long) v) { v 36 fs/fscache/histogram.c index = (unsigned long) v - 3; v 68 fs/fscache/histogram.c static void *fscache_histogram_next(struct seq_file *m, void *v, loff_t *pos) v 78 fs/fscache/histogram.c static void fscache_histogram_stop(struct seq_file *m, void *v) v 293 fs/fscache/internal.h int fscache_stats_show(struct seq_file *m, void *v); v 142 fs/fscache/object-list.c static void *fscache_objlist_next(struct seq_file *m, void *v, loff_t *_pos) v 151 fs/fscache/object-list.c static void fscache_objlist_stop(struct seq_file *m, void *v) v 160 fs/fscache/object-list.c static int fscache_objlist_show(struct seq_file *m, void *v) v 163 fs/fscache/object-list.c struct fscache_object *obj = v; v 169 fs/fscache/object-list.c if ((unsigned long) v == 1) { v 188 fs/fscache/object-list.c if ((unsigned long) v == 2) { v 137 fs/fscache/stats.c int fscache_stats_show(struct seq_file *m, void *v) v 343 fs/fuse/file.c u64 v = (unsigned long) id; v 344 fs/fuse/file.c u32 v0 = v; v 345 fs/fuse/file.c u32 v1 = v >> 32; v 75 fs/hfs/bnode.c __be16 v = cpu_to_be16(data); v 77 fs/hfs/bnode.c hfs_bnode_write(node, &v, off, 2); v 93 fs/hfs/hfs.h __be16 v; v 100 fs/hfsplus/bnode.c __be16 v = cpu_to_be16(data); v 102 fs/hfsplus/bnode.c hfs_bnode_write(node, &v, off, 2); v 223 fs/hfsplus/hfsplus_raw.h __be16 v; v 312 fs/hfsplus/unicode.c int l, v, t; v 319 fs/hfsplus/unicode.c v = Hangul_VBase + (index % Hangul_NCount) / Hangul_TCount; v 323 fs/hfsplus/unicode.c result[1] = v; v 982 fs/jbd2/journal.c static void *jbd2_seq_info_next(struct seq_file *seq, void *v, loff_t *pos) v 988 fs/jbd2/journal.c static int jbd2_seq_info_show(struct seq_file *seq, void *v) v 992 fs/jbd2/journal.c if (v != SEQ_START_TOKEN) v 1025 fs/jbd2/journal.c static void jbd2_seq_info_stop(struct seq_file *seq, void *v) v 861 fs/jffs2/wbuf.c uint8_t *v = invecs[invec].iov_base; v 863 fs/jffs2/wbuf.c wbuf_retlen = jffs2_fill_wbuf(c, v, vlen); v 873 fs/jffs2/wbuf.c v += wbuf_retlen; v 877 fs/jffs2/wbuf.c &wbuf_retlen, v); v 885 fs/jffs2/wbuf.c v += wbuf_retlen; v 888 fs/jffs2/wbuf.c wbuf_retlen = jffs2_fill_wbuf(c, v, vlen); v 20 fs/jfs/jfs_debug.c static int jfs_loglevel_proc_show(struct seq_file *m, void *v) v 52 fs/jfs/jfs_debug.h int jfs_txanchor_proc_show(struct seq_file *m, void *v); v 95 fs/jfs/jfs_debug.h int jfs_lmstats_proc_show(struct seq_file *m, void *v); v 96 fs/jfs/jfs_debug.h int jfs_txstats_proc_show(struct seq_file *m, void *v); v 97 fs/jfs/jfs_debug.h int jfs_mpstat_proc_show(struct seq_file *m, void *v); v 98 fs/jfs/jfs_debug.h int jfs_xtstat_proc_show(struct seq_file *m, void *v); v 2483 fs/jfs/jfs_logmgr.c int jfs_lmstats_proc_show(struct seq_file *m, void *v) v 805 fs/jfs/jfs_metapage.c int jfs_mpstat_proc_show(struct seq_file *m, void *v) v 2987 fs/jfs/jfs_txnmgr.c int jfs_txanchor_proc_show(struct seq_file *m, void *v) v 3024 fs/jfs/jfs_txnmgr.c int jfs_txstats_proc_show(struct seq_file *m, void *v) v 3864 fs/jfs/jfs_xtree.c int jfs_xtstat_proc_show(struct seq_file *m, void *v) v 435 fs/kernfs/dir.c int v; v 442 fs/kernfs/dir.c v = atomic_dec_return(&kn->active); v 443 fs/kernfs/dir.c if (likely(v != KN_DEACTIVATED_BIAS)) v 92 fs/kernfs/file.c static void kernfs_seq_stop_active(struct seq_file *sf, void *v) v 98 fs/kernfs/file.c ops->seq_stop(sf, v); v 131 fs/kernfs/file.c static void *kernfs_seq_next(struct seq_file *sf, void *v, loff_t *ppos) v 137 fs/kernfs/file.c void *next = ops->seq_next(sf, v, ppos); v 152 fs/kernfs/file.c static void kernfs_seq_stop(struct seq_file *sf, void *v) v 156 fs/kernfs/file.c if (v != ERR_PTR(-ENODEV)) v 157 fs/kernfs/file.c kernfs_seq_stop_active(sf, v); v 161 fs/kernfs/file.c static int kernfs_seq_show(struct seq_file *sf, void *v) v 167 fs/kernfs/file.c return of->kn->attr.ops->seq_show(sf, v); v 2900 fs/locks.c static int locks_show(struct seq_file *f, void *v) v 2906 fs/locks.c fl = hlist_entry(v, struct file_lock, fl_link); v 2968 fs/locks.c static void *locks_next(struct seq_file *f, void *v, loff_t *pos) v 2973 fs/locks.c return seq_hlist_next_percpu(v, &file_lock_list.hlist, &iter->li_cpu, pos); v 2976 fs/locks.c static void locks_stop(struct seq_file *f, void *v) v 12 fs/minix/itree_common.c static inline void add_chain(Indirect *p, struct buffer_head *bh, block_t *v) v 14 fs/minix/itree_common.c p->key = *(p->p = v); v 1255 fs/namespace.c void *v = p->cached_mount; v 1257 fs/namespace.c return v; v 1259 fs/namespace.c v = seq_list_next(v, &p->ns->list, &p->cached_index); v 1260 fs/namespace.c return p->cached_mount = v; v 1270 fs/namespace.c static void *m_next(struct seq_file *m, void *v, loff_t *pos) v 1274 fs/namespace.c p->cached_mount = seq_list_next(v, &p->ns->list, pos); v 1279 fs/namespace.c static void m_stop(struct seq_file *m, void *v) v 1284 fs/namespace.c static int m_show(struct seq_file *m, void *v) v 1287 fs/namespace.c struct mount *r = list_entry(v, struct mount, mnt_list); v 238 fs/nfs/blocklayout/dev.c struct pnfs_block_volume *v = &volumes[idx]; v 242 fs/nfs/blocklayout/dev.c dev = bl_resolve_deviceid(server, v, gfp_mask); v 264 fs/nfs/blocklayout/dev.c bl_validate_designator(struct pnfs_block_volume *v) v 266 fs/nfs/blocklayout/dev.c switch (v->scsi.designator_type) { v 268 fs/nfs/blocklayout/dev.c if (v->scsi.code_set != PS_CODE_SET_BINARY) v 271 fs/nfs/blocklayout/dev.c if (v->scsi.designator_len != 8 && v 272 fs/nfs/blocklayout/dev.c v->scsi.designator_len != 10 && v 273 fs/nfs/blocklayout/dev.c v->scsi.designator_len != 16) v 278 fs/nfs/blocklayout/dev.c if (v->scsi.code_set != PS_CODE_SET_BINARY) v 281 fs/nfs/blocklayout/dev.c if (v->scsi.designator_len != 8 && v 282 fs/nfs/blocklayout/dev.c v->scsi.designator_len != 16) v 290 fs/nfs/blocklayout/dev.c v->scsi.code_set, v 291 fs/nfs/blocklayout/dev.c v->scsi.designator_type, v 292 fs/nfs/blocklayout/dev.c v->scsi.designator_len); v 297 fs/nfs/blocklayout/dev.c v->scsi.code_set, v 298 fs/nfs/blocklayout/dev.c v->scsi.designator_type, v 299 fs/nfs/blocklayout/dev.c v->scsi.designator_len); v 309 fs/nfs/blocklayout/dev.c bl_open_udev_path(struct pnfs_block_volume *v) v 315 fs/nfs/blocklayout/dev.c v->scsi.designator_len, v->scsi.designator); v 334 fs/nfs/blocklayout/dev.c bl_open_dm_mpath_udev_path(struct pnfs_block_volume *v) v 341 fs/nfs/blocklayout/dev.c v->scsi.designator_type, v 342 fs/nfs/blocklayout/dev.c v->scsi.designator_len, v->scsi.designator); v 355 fs/nfs/blocklayout/dev.c struct pnfs_block_volume *v = &volumes[idx]; v 360 fs/nfs/blocklayout/dev.c if (!bl_validate_designator(v)) v 363 fs/nfs/blocklayout/dev.c bdev = bl_open_dm_mpath_udev_path(v); v 365 fs/nfs/blocklayout/dev.c bdev = bl_open_udev_path(v); v 372 fs/nfs/blocklayout/dev.c d->pr_key = v->scsi.pr_key; v 404 fs/nfs/blocklayout/dev.c struct pnfs_block_volume *v = &volumes[idx]; v 407 fs/nfs/blocklayout/dev.c ret = bl_parse_deviceid(server, d, volumes, v->slice.volume, gfp_mask); v 411 fs/nfs/blocklayout/dev.c d->disk_offset = v->slice.start; v 412 fs/nfs/blocklayout/dev.c d->len = v->slice.len; v 420 fs/nfs/blocklayout/dev.c struct pnfs_block_volume *v = &volumes[idx]; v 424 fs/nfs/blocklayout/dev.c d->children = kcalloc(v->concat.volumes_count, v 429 fs/nfs/blocklayout/dev.c for (i = 0; i < v->concat.volumes_count; i++) { v 431 fs/nfs/blocklayout/dev.c volumes, v->concat.volumes[i], gfp_mask); v 449 fs/nfs/blocklayout/dev.c struct pnfs_block_volume *v = &volumes[idx]; v 453 fs/nfs/blocklayout/dev.c d->children = kcalloc(v->stripe.volumes_count, v 458 fs/nfs/blocklayout/dev.c for (i = 0; i < v->stripe.volumes_count; i++) { v 460 fs/nfs/blocklayout/dev.c volumes, v->stripe.volumes[i], gfp_mask); v 469 fs/nfs/blocklayout/dev.c d->chunk_size = v->stripe.chunk_size; v 1096 fs/nfs/client.c static void *nfs_server_list_next(struct seq_file *p, void *v, loff_t *pos); v 1097 fs/nfs/client.c static void nfs_server_list_stop(struct seq_file *p, void *v); v 1098 fs/nfs/client.c static int nfs_server_list_show(struct seq_file *m, void *v); v 1108 fs/nfs/client.c static void *nfs_volume_list_next(struct seq_file *p, void *v, loff_t *pos); v 1109 fs/nfs/client.c static void nfs_volume_list_stop(struct seq_file *p, void *v); v 1110 fs/nfs/client.c static int nfs_volume_list_show(struct seq_file *m, void *v); v 1135 fs/nfs/client.c static void *nfs_server_list_next(struct seq_file *p, void *v, loff_t *pos) v 1139 fs/nfs/client.c return seq_list_next(v, &nn->nfs_client_list, pos); v 1145 fs/nfs/client.c static void nfs_server_list_stop(struct seq_file *p, void *v) v 1156 fs/nfs/client.c static int nfs_server_list_show(struct seq_file *m, void *v) v 1162 fs/nfs/client.c if (v == &nn->nfs_client_list) { v 1168 fs/nfs/client.c clp = list_entry(v, struct nfs_client, cl_share_link); v 1202 fs/nfs/client.c static void *nfs_volume_list_next(struct seq_file *p, void *v, loff_t *pos) v 1206 fs/nfs/client.c return seq_list_next(v, &nn->nfs_volume_list, pos); v 1212 fs/nfs/client.c static void nfs_volume_list_stop(struct seq_file *p, void *v) v 1223 fs/nfs/client.c static int nfs_volume_list_show(struct seq_file *m, void *v) v 1232 fs/nfs/client.c if (v == &nn->nfs_volume_list) { v 1238 fs/nfs/client.c server = list_entry(v, struct nfs_server, master_link); v 49 fs/nfs/nfstrace.h #define nfs_show_cache_validity(v) \ v 50 fs/nfs/nfstrace.h __print_flags(v, "|", \ v 75 fs/nfs/nfstrace.h #define nfs_show_nfsi_flags(v) \ v 76 fs/nfs/nfstrace.h __print_flags(v, "|", \ v 909 fs/nfsd/filecache.c static int nfsd_file_cache_stats_show(struct seq_file *m, void *v) v 371 fs/nfsd/nfs3xdr.c int v; v 383 fs/nfsd/nfs3xdr.c v=0; v 387 fs/nfsd/nfs3xdr.c rqstp->rq_vec[v].iov_base = page_address(p); v 388 fs/nfsd/nfs3xdr.c rqstp->rq_vec[v].iov_len = min_t(unsigned int, len, PAGE_SIZE); v 389 fs/nfsd/nfs3xdr.c len -= rqstp->rq_vec[v].iov_len; v 390 fs/nfsd/nfs3xdr.c v++; v 392 fs/nfsd/nfs3xdr.c args->vlen = v; v 2276 fs/nfsd/nfs4state.c static int client_info_show(struct seq_file *m, void *v) v 2330 fs/nfsd/nfs4state.c static void *states_next(struct seq_file *s, void *v, loff_t *pos) v 2343 fs/nfsd/nfs4state.c static void states_stop(struct seq_file *s, void *v) v 2476 fs/nfsd/nfs4state.c static int states_show(struct seq_file *s, void *v) v 2478 fs/nfsd/nfs4state.c struct nfs4_stid *st = v; v 3523 fs/nfsd/nfs4xdr.c int v; v 3534 fs/nfsd/nfs4xdr.c v = 0; v 3539 fs/nfsd/nfs4xdr.c resp->rqstp->rq_vec[v].iov_base = p; v 3540 fs/nfsd/nfs4xdr.c resp->rqstp->rq_vec[v].iov_len = thislen; v 3541 fs/nfsd/nfs4xdr.c v++; v 3548 fs/nfsd/nfs4xdr.c resp->rqstp->rq_vec[v].iov_base = p; v 3549 fs/nfsd/nfs4xdr.c resp->rqstp->rq_vec[v].iov_len = thislen; v 3550 fs/nfsd/nfs4xdr.c v++; v 3553 fs/nfsd/nfs4xdr.c read->rd_vlen = v; v 572 fs/nfsd/nfscache.c static int nfsd_reply_cache_stats_show(struct seq_file *m, void *v) v 179 fs/nfsd/nfsctl.c static int export_features_show(struct seq_file *m, void *v) v 198 fs/nfsd/nfsctl.c static int supported_enctypes_show(struct seq_file *m, void *v) v 242 fs/nfsd/nfsxdr.c int v; v 256 fs/nfsd/nfsxdr.c v=0; v 260 fs/nfsd/nfsxdr.c rqstp->rq_vec[v].iov_base = page_address(p); v 261 fs/nfsd/nfsxdr.c rqstp->rq_vec[v].iov_len = min_t(unsigned int, len, PAGE_SIZE); v 262 fs/nfsd/nfsxdr.c len -= rqstp->rq_vec[v].iov_len; v 263 fs/nfsd/nfsxdr.c v++; v 265 fs/nfsd/nfsxdr.c args->vlen = v; v 37 fs/nfsd/stats.c static int nfsd_proc_show(struct seq_file *seq, void *v) v 175 fs/nfsd/xdr4.h } v; v 185 fs/nfsd/xdr4.h #define lk_new_open_seqid v.new.open_seqid v 186 fs/nfsd/xdr4.h #define lk_new_open_stateid v.new.open_stateid v 187 fs/nfsd/xdr4.h #define lk_new_lock_seqid v.new.lock_seqid v 188 fs/nfsd/xdr4.h #define lk_new_clientid v.new.clientid v 189 fs/nfsd/xdr4.h #define lk_new_owner v.new.owner v 190 fs/nfsd/xdr4.h #define lk_old_lock_stateid v.old.lock_stateid v 191 fs/nfsd/xdr4.h #define lk_old_lock_seqid v.old.lock_seqid v 191 fs/nls/nls_base.c unsigned long u, v; v 208 fs/nls/nls_base.c v = get_utf16(*pwcs, endian); v 209 fs/nls/nls_base.c if ((v & SURROGATE_MASK) != SURROGATE_PAIR || v 210 fs/nls/nls_base.c !(v & SURROGATE_LOW)) { v 215 fs/nls/nls_base.c + (v & SURROGATE_BITS); v 89 fs/ntfs/super.c char *p, *v, *ov; v 102 fs/ntfs/super.c if (!v || !*v) \ v 105 fs/ntfs/super.c variable = simple_strtoul(ov = v, &v, 0); \ v 106 fs/ntfs/super.c if (*v) \ v 112 fs/ntfs/super.c if (!v || !*v) \ v 114 fs/ntfs/super.c variable = simple_strtoul(ov = v, &v, 0); \ v 115 fs/ntfs/super.c if (*v) \ v 121 fs/ntfs/super.c if (!v || !*v) \ v 123 fs/ntfs/super.c uid_value = simple_strtoul(ov = v, &v, 0); \ v 124 fs/ntfs/super.c if (*v) \ v 133 fs/ntfs/super.c if (!v || !*v) \ v 135 fs/ntfs/super.c gid_value = simple_strtoul(ov = v, &v, 0); \ v 136 fs/ntfs/super.c if (*v) \ v 144 fs/ntfs/super.c if (!v || !*v) \ v 146 fs/ntfs/super.c variable = simple_strtoul(ov = v, &v, 8); \ v 147 fs/ntfs/super.c if (*v) \ v 153 fs/ntfs/super.c if (!simple_getbool(v, &val)) \ v 160 fs/ntfs/super.c if (!v || !*v) \ v 162 fs/ntfs/super.c ov = v; \ v 166 fs/ntfs/super.c if (!strcmp(opt_array[_i].str, v)) { \ v 177 fs/ntfs/super.c if ((v = strchr(p, '='))) v 178 fs/ntfs/super.c *v++ = 0; v 200 fs/ntfs/super.c if (!v || !*v) v 204 fs/ntfs/super.c nls_map = load_nls(v); v 208 fs/ntfs/super.c "%s not found.", v); v 213 fs/ntfs/super.c v, old_nls->charset); v 225 fs/ntfs/super.c if (!v || !*v) v 227 fs/ntfs/super.c else if (!simple_getbool(v, &val)) v 230 fs/ntfs/super.c v = utf8; v 96 fs/ocfs2/cluster/netdebug.c static void *nst_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 111 fs/ocfs2/cluster/netdebug.c static int nst_seq_show(struct seq_file *seq, void *v) v 155 fs/ocfs2/cluster/netdebug.c static void nst_seq_stop(struct seq_file *seq, void *v) v 248 fs/ocfs2/cluster/netdebug.c static void *sc_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 349 fs/ocfs2/cluster/netdebug.c static int sc_seq_show(struct seq_file *seq, void *v) v 369 fs/ocfs2/cluster/netdebug.c static void sc_seq_stop(struct seq_file *seq, void *v) v 587 fs/ocfs2/dlm/dlmdebug.c static void lockres_seq_stop(struct seq_file *m, void *v) v 591 fs/ocfs2/dlm/dlmdebug.c static void *lockres_seq_next(struct seq_file *m, void *v, loff_t *pos) v 596 fs/ocfs2/dlm/dlmdebug.c static int lockres_seq_show(struct seq_file *s, void *v) v 598 fs/ocfs2/dlm/dlmdebug.c struct debug_lockres *dl = (struct debug_lockres *)v; v 3073 fs/ocfs2/dlmglue.c static void ocfs2_dlm_seq_stop(struct seq_file *m, void *v) v 3077 fs/ocfs2/dlmglue.c static void *ocfs2_dlm_seq_next(struct seq_file *m, void *v, loff_t *pos) v 3080 fs/ocfs2/dlmglue.c struct ocfs2_lock_res *iter = v; v 3107 fs/ocfs2/dlmglue.c static int ocfs2_dlm_seq_show(struct seq_file *m, void *v) v 3111 fs/ocfs2/dlmglue.c struct ocfs2_lock_res *lockres = v; v 67 fs/openpromfs/inode.c static int property_show(struct seq_file *f, void *v) v 127 fs/openpromfs/inode.c static void *property_next(struct seq_file *f, void *v, loff_t *pos) v 133 fs/openpromfs/inode.c static void property_stop(struct seq_file *f, void *v) v 70 fs/orangefs/orangefs-bufmap.c int v; v 73 fs/orangefs/orangefs-bufmap.c v = ++m->c; v 74 fs/orangefs/orangefs-bufmap.c if (v > 0) v 76 fs/orangefs/orangefs-bufmap.c if (unlikely(v == -1)) /* finished dying */ v 274 fs/orangefs/orangefs-debugfs.c static void *help_next(struct seq_file *m, void *v, loff_t *pos) v 288 fs/orangefs/orangefs-debugfs.c static int help_show(struct seq_file *m, void *v) v 292 fs/orangefs/orangefs-debugfs.c seq_puts(m, v); v 720 fs/proc/array.c static int children_seq_show(struct seq_file *seq, void *v) v 724 fs/proc/array.c seq_printf(seq, "%d ", pid_nr_ns(v, proc_pid_ns(inode))); v 733 fs/proc/array.c static void *children_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 737 fs/proc/array.c pid = get_children_pid(file_inode(seq->file), v, *pos + 1); v 738 fs/proc/array.c put_pid(v); v 744 fs/proc/array.c static void children_seq_stop(struct seq_file *seq, void *v) v 746 fs/proc/array.c put_pid(v); v 489 fs/proc/base.c static int lstats_show_proc(struct seq_file *m, void *v) v 744 fs/proc/base.c static int proc_single_show(struct seq_file *m, void *v) v 1413 fs/proc/base.c static int sched_show(struct seq_file *m, void *v) v 1465 fs/proc/base.c static int sched_autogroup_show(struct seq_file *m, void *v) v 1562 fs/proc/base.c static int comm_show(struct seq_file *m, void *v) v 2283 fs/proc/base.c static void *timers_next(struct seq_file *m, void *v, loff_t *pos) v 2286 fs/proc/base.c return seq_list_next(v, &tp->task->signal->posix_timers, pos); v 2289 fs/proc/base.c static void timers_stop(struct seq_file *m, void *v) v 2304 fs/proc/base.c static int show_timer(struct seq_file *m, void *v) v 2315 fs/proc/base.c timer = list_entry((struct list_head *)v, struct k_itimer, list); v 2405 fs/proc/base.c static int timerslack_ns_show(struct seq_file *m, void *v) v 7 fs/proc/cmdline.c static int cmdline_proc_show(struct seq_file *m, void *v) v 15 fs/proc/consoles.c static int show_console_dev(struct seq_file *m, void *v) v 29 fs/proc/consoles.c struct console *con = v; v 74 fs/proc/consoles.c static void *c_next(struct seq_file *m, void *v, loff_t *pos) v 76 fs/proc/consoles.c struct console *con = v; v 81 fs/proc/consoles.c static void c_stop(struct seq_file *m, void *v) v 7 fs/proc/devices.c static int devinfo_show(struct seq_file *f, void *v) v 9 fs/proc/devices.c int i = *(loff_t *) v; v 34 fs/proc/devices.c static void *devinfo_next(struct seq_file *f, void *v, loff_t *pos) v 42 fs/proc/devices.c static void devinfo_stop(struct seq_file *f, void *v) v 20 fs/proc/fd.c static int seq_show(struct seq_file *m, void *v) v 17 fs/proc/interrupts.c static void *int_seq_next(struct seq_file *f, void *v, loff_t *pos) v 25 fs/proc/interrupts.c static void int_seq_stop(struct seq_file *f, void *v) v 48 fs/proc/kcore.c #define kc_vaddr_to_offset(v) ((v) - PAGE_OFFSET) v 13 fs/proc/loadavg.c static int loadavg_proc_show(struct seq_file *m, void *v) v 33 fs/proc/meminfo.c static int meminfo_proc_show(struct seq_file *m, void *v) v 94 fs/proc/nommu.c static void nommu_region_list_stop(struct seq_file *m, void *v) v 99 fs/proc/nommu.c static void *nommu_region_list_next(struct seq_file *m, void *v, loff_t *pos) v 102 fs/proc/nommu.c return rb_next((struct rb_node *) v); v 69 fs/proc/proc_tty.c static int show_tty_driver(struct seq_file *m, void *v) v 71 fs/proc/proc_tty.c struct tty_driver *p = list_entry(v, struct tty_driver, tty_drivers); v 112 fs/proc/proc_tty.c static void *t_next(struct seq_file *m, void *v, loff_t *pos) v 114 fs/proc/proc_tty.c return seq_list_next(v, &tty_drivers, pos); v 117 fs/proc/proc_tty.c static void t_stop(struct seq_file *m, void *v) v 10 fs/proc/softirqs.c static int show_softirqs(struct seq_file *p, void *v) v 107 fs/proc/stat.c static int show_stat(struct seq_file *p, void *v) v 202 fs/proc/task_mmu.c static void *m_next(struct seq_file *m, void *v, loff_t *pos) v 208 fs/proc/task_mmu.c next = m_next_vma(priv, v); v 214 fs/proc/task_mmu.c static void m_stop(struct seq_file *m, void *v) v 218 fs/proc/task_mmu.c if (!IS_ERR_OR_NULL(v)) v 363 fs/proc/task_mmu.c static int show_map(struct seq_file *m, void *v) v 365 fs/proc/task_mmu.c show_map_vma(m, v); v 366 fs/proc/task_mmu.c m_cache_vma(m, v); v 825 fs/proc/task_mmu.c static int show_smap(struct seq_file *m, void *v) v 827 fs/proc/task_mmu.c struct vm_area_struct *vma = v; v 855 fs/proc/task_mmu.c static int show_smaps_rollup(struct seq_file *m, void *v) v 1816 fs/proc/task_mmu.c static int show_numa_map(struct seq_file *m, void *v) v 1820 fs/proc/task_mmu.c struct vm_area_struct *vma = v; v 10 fs/proc/uptime.c static int uptime_proc_show(struct seq_file *m, void *v) v 9 fs/proc/version.c static int version_proc_show(struct seq_file *m, void *v) v 80 fs/pstore/inode.c static void pstore_ftrace_seq_stop(struct seq_file *s, void *v) v 82 fs/pstore/inode.c kfree(v); v 85 fs/pstore/inode.c static void *pstore_ftrace_seq_next(struct seq_file *s, void *v, loff_t *pos) v 88 fs/pstore/inode.c struct pstore_ftrace_seq_data *data = v; v 98 fs/pstore/inode.c static int pstore_ftrace_seq_show(struct seq_file *s, void *v) v 101 fs/pstore/inode.c struct pstore_ftrace_seq_data *data = v; v 117 fs/reiserfs/reiserfs.h #define set_sb_block_count(sbp,v) ((sbp)->s_v1.s_block_count = cpu_to_le32(v)) v 119 fs/reiserfs/reiserfs.h #define set_sb_free_blocks(sbp,v) ((sbp)->s_v1.s_free_blocks = cpu_to_le32(v)) v 121 fs/reiserfs/reiserfs.h #define set_sb_root_block(sbp,v) ((sbp)->s_v1.s_root_block = cpu_to_le32(v)) v 125 fs/reiserfs/reiserfs.h #define set_sb_jp_journal_1st_block(sbp,v) \ v 126 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_journal.jp_journal_1st_block = cpu_to_le32(v)) v 129 fs/reiserfs/reiserfs.h #define set_sb_jp_journal_dev(sbp,v) \ v 130 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_journal.jp_journal_dev = cpu_to_le32(v)) v 133 fs/reiserfs/reiserfs.h #define set_sb_jp_journal_size(sbp,v) \ v 134 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_journal.jp_journal_size = cpu_to_le32(v)) v 137 fs/reiserfs/reiserfs.h #define set_sb_jp_journal_trans_max(sbp,v) \ v 138 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_journal.jp_journal_trans_max = cpu_to_le32(v)) v 141 fs/reiserfs/reiserfs.h #define set_sb_jp_journal_magic(sbp,v) \ v 142 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_journal.jp_journal_magic = cpu_to_le32(v)) v 145 fs/reiserfs/reiserfs.h #define set_sb_jp_journal_max_batch(sbp,v) \ v 146 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_journal.jp_journal_max_batch = cpu_to_le32(v)) v 149 fs/reiserfs/reiserfs.h #define set_sb_jp_journal_max_commit_age(sbp,v) \ v 150 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_journal.jp_journal_max_commit_age = cpu_to_le32(v)) v 153 fs/reiserfs/reiserfs.h #define set_sb_blocksize(sbp,v) ((sbp)->s_v1.s_blocksize = cpu_to_le16(v)) v 155 fs/reiserfs/reiserfs.h #define set_sb_oid_maxsize(sbp,v) ((sbp)->s_v1.s_oid_maxsize = cpu_to_le16(v)) v 157 fs/reiserfs/reiserfs.h #define set_sb_oid_cursize(sbp,v) ((sbp)->s_v1.s_oid_cursize = cpu_to_le16(v)) v 159 fs/reiserfs/reiserfs.h #define set_sb_umount_state(sbp,v) ((sbp)->s_v1.s_umount_state = cpu_to_le16(v)) v 161 fs/reiserfs/reiserfs.h #define set_sb_fs_state(sbp,v) ((sbp)->s_v1.s_fs_state = cpu_to_le16(v)) v 164 fs/reiserfs/reiserfs.h #define set_sb_hash_function_code(sbp,v) \ v 165 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_hash_function_code = cpu_to_le32(v)) v 167 fs/reiserfs/reiserfs.h #define set_sb_tree_height(sbp,v) ((sbp)->s_v1.s_tree_height = cpu_to_le16(v)) v 169 fs/reiserfs/reiserfs.h #define set_sb_bmap_nr(sbp,v) ((sbp)->s_v1.s_bmap_nr = cpu_to_le16(v)) v 171 fs/reiserfs/reiserfs.h #define set_sb_version(sbp,v) ((sbp)->s_v1.s_version = cpu_to_le16(v)) v 174 fs/reiserfs/reiserfs.h #define set_sb_mnt_count(sbp, v) ((sbp)->s_mnt_count = cpu_to_le16(v)) v 178 fs/reiserfs/reiserfs.h #define set_sb_reserved_for_journal(sbp,v) \ v 179 fs/reiserfs/reiserfs.h ((sbp)->s_v1.s_reserved_for_journal = cpu_to_le16(v)) v 1259 fs/reiserfs/reiserfs.h __le64 v; v 1264 fs/reiserfs/reiserfs.h __u8 type = le64_to_cpu(v2->v) >> 60; v 1270 fs/reiserfs/reiserfs.h v2->v = v 1271 fs/reiserfs/reiserfs.h (v2->v & cpu_to_le64(~0ULL >> 4)) | cpu_to_le64((__u64) type << 60); v 1276 fs/reiserfs/reiserfs.h return le64_to_cpu(v2->v) & (~0ULL >> 4); v 1282 fs/reiserfs/reiserfs.h v2->v = (v2->v & cpu_to_le64(15ULL << 60)) | cpu_to_le64(offset); v 1423 fs/reiserfs/reiserfs.h #define put_block_num(p, i, v) put_unaligned_le32((v), (p) + (i)) v 1744 fs/reiserfs/reiserfs.h #define set_sd_v1_mode(sdp,v) ((sdp)->sd_mode = cpu_to_le16(v)) v 1746 fs/reiserfs/reiserfs.h #define set_sd_v1_nlink(sdp,v) ((sdp)->sd_nlink = cpu_to_le16(v)) v 1748 fs/reiserfs/reiserfs.h #define set_sd_v1_uid(sdp,v) ((sdp)->sd_uid = cpu_to_le16(v)) v 1750 fs/reiserfs/reiserfs.h #define set_sd_v1_gid(sdp,v) ((sdp)->sd_gid = cpu_to_le16(v)) v 1752 fs/reiserfs/reiserfs.h #define set_sd_v1_size(sdp,v) ((sdp)->sd_size = cpu_to_le32(v)) v 1754 fs/reiserfs/reiserfs.h #define set_sd_v1_atime(sdp,v) ((sdp)->sd_atime = cpu_to_le32(v)) v 1756 fs/reiserfs/reiserfs.h #define set_sd_v1_mtime(sdp,v) ((sdp)->sd_mtime = cpu_to_le32(v)) v 1758 fs/reiserfs/reiserfs.h #define set_sd_v1_ctime(sdp,v) ((sdp)->sd_ctime = cpu_to_le32(v)) v 1760 fs/reiserfs/reiserfs.h #define set_sd_v1_rdev(sdp,v) ((sdp)->u.sd_rdev = cpu_to_le32(v)) v 1762 fs/reiserfs/reiserfs.h #define set_sd_v1_blocks(sdp,v) ((sdp)->u.sd_blocks = cpu_to_le32(v)) v 1765 fs/reiserfs/reiserfs.h #define set_sd_v1_first_direct_byte(sdp,v) \ v 1766 fs/reiserfs/reiserfs.h ((sdp)->sd_first_direct_byte = cpu_to_le32(v)) v 1824 fs/reiserfs/reiserfs.h #define set_sd_v2_mode(sdp,v) ((sdp)->sd_mode = cpu_to_le16(v)) v 1828 fs/reiserfs/reiserfs.h #define set_sd_v2_nlink(sdp,v) ((sdp)->sd_nlink = cpu_to_le32(v)) v 1830 fs/reiserfs/reiserfs.h #define set_sd_v2_size(sdp,v) ((sdp)->sd_size = cpu_to_le64(v)) v 1832 fs/reiserfs/reiserfs.h #define set_sd_v2_uid(sdp,v) ((sdp)->sd_uid = cpu_to_le32(v)) v 1834 fs/reiserfs/reiserfs.h #define set_sd_v2_gid(sdp,v) ((sdp)->sd_gid = cpu_to_le32(v)) v 1836 fs/reiserfs/reiserfs.h #define set_sd_v2_atime(sdp,v) ((sdp)->sd_atime = cpu_to_le32(v)) v 1838 fs/reiserfs/reiserfs.h #define set_sd_v2_mtime(sdp,v) ((sdp)->sd_mtime = cpu_to_le32(v)) v 1840 fs/reiserfs/reiserfs.h #define set_sd_v2_ctime(sdp,v) ((sdp)->sd_ctime = cpu_to_le32(v)) v 1842 fs/reiserfs/reiserfs.h #define set_sd_v2_blocks(sdp,v) ((sdp)->sd_blocks = cpu_to_le32(v)) v 1844 fs/reiserfs/reiserfs.h #define set_sd_v2_rdev(sdp,v) ((sdp)->u.sd_rdev = cpu_to_le32(v)) v 1846 fs/reiserfs/reiserfs.h #define set_sd_v2_generation(sdp,v) ((sdp)->u.sd_generation = cpu_to_le32(v)) v 1848 fs/reiserfs/reiserfs.h #define set_sd_v2_attrs(sdp,v) ((sdp)->sd_attrs = cpu_to_le16(v)) v 1913 fs/reiserfs/reiserfs.h #define put_deh_offset(p_deh,v) ((p_deh)->deh_offset = cpu_to_le32((v))) v 1914 fs/reiserfs/reiserfs.h #define put_deh_dir_id(p_deh,v) ((p_deh)->deh_dir_id = cpu_to_le32((v))) v 1915 fs/reiserfs/reiserfs.h #define put_deh_objectid(p_deh,v) ((p_deh)->deh_objectid = cpu_to_le32((v))) v 1916 fs/reiserfs/reiserfs.h #define put_deh_location(p_deh,v) ((p_deh)->deh_location = cpu_to_le16((v))) v 1917 fs/reiserfs/reiserfs.h #define put_deh_state(p_deh,v) ((p_deh)->deh_state = cpu_to_le16((v))) v 556 fs/seq_file.c static void *single_next(struct seq_file *p, void *v, loff_t *pos) v 562 fs/seq_file.c static void single_stop(struct seq_file *p, void *v) v 743 fs/seq_file.c unsigned long long v, unsigned int width) v 756 fs/seq_file.c if (v == 0) v 759 fs/seq_file.c len = (sizeof(v) * 8 - __builtin_clzll(v) + 3) / 4; v 770 fs/seq_file.c m->buf[m->count + i] = hex_asc[0xf & v]; v 771 fs/seq_file.c v = v >> 4; v 917 fs/seq_file.c struct list_head *seq_list_next(void *v, struct list_head *head, loff_t *ppos) v 921 fs/seq_file.c lh = ((struct list_head *)v)->next; v 970 fs/seq_file.c struct hlist_node *seq_hlist_next(void *v, struct hlist_head *head, v 973 fs/seq_file.c struct hlist_node *node = v; v 976 fs/seq_file.c if (v == SEQ_START_TOKEN) v 1040 fs/seq_file.c struct hlist_node *seq_hlist_next_rcu(void *v, v 1044 fs/seq_file.c struct hlist_node *node = v; v 1047 fs/seq_file.c if (v == SEQ_START_TOKEN) v 1087 fs/seq_file.c seq_hlist_next_percpu(void *v, struct hlist_head __percpu *head, v 1090 fs/seq_file.c struct hlist_node *node = v; v 39 fs/sysfs/file.c static int sysfs_kf_seq_show(struct seq_file *sf, void *v) v 67 fs/sysv/itree.c static inline void add_chain(Indirect *p, struct buffer_head *bh, sysv_zone_t *v) v 69 fs/sysv/itree.c p->key = *(p->p = v); v 88 fs/ufs/inode.c struct buffer_head *bh, __fs32 *v, v 96 fs/ufs/inode.c to->key32 = *(__fs32 *)(to->p = v); v 104 fs/ufs/inode.c struct buffer_head *bh, __fs64 *v, v 112 fs/ufs/inode.c to->key64 = *(__fs64 *)(to->p = v); v 30 fs/xfs/libxfs/xfs_bit.h static inline int xfs_highbit32(uint32_t v) v 32 fs/xfs/libxfs/xfs_bit.h return fls(v) - 1; v 36 fs/xfs/libxfs/xfs_bit.h static inline int xfs_highbit64(uint64_t v) v 38 fs/xfs/libxfs/xfs_bit.h return fls64(v) - 1; v 42 fs/xfs/libxfs/xfs_bit.h static inline int xfs_lowbit32(uint32_t v) v 44 fs/xfs/libxfs/xfs_bit.h return ffs(v) - 1; v 48 fs/xfs/libxfs/xfs_bit.h static inline int xfs_lowbit64(uint64_t v) v 50 fs/xfs/libxfs/xfs_bit.h uint32_t w = (uint32_t)v; v 56 fs/xfs/libxfs/xfs_bit.h w = (uint32_t)(v >> 32); v 246 fs/xfs/libxfs/xfs_dir2.c int v; /* type-checking value */ v 280 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isblock(args, &v); v 283 fs/xfs/libxfs/xfs_dir2.c if (v) { v 288 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isleaf(args, &v); v 291 fs/xfs/libxfs/xfs_dir2.c if (v) v 342 fs/xfs/libxfs/xfs_dir2.c int v; /* type-checking value */ v 375 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isblock(args, &v); v 378 fs/xfs/libxfs/xfs_dir2.c if (v) { v 383 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isleaf(args, &v); v 386 fs/xfs/libxfs/xfs_dir2.c if (v) v 420 fs/xfs/libxfs/xfs_dir2.c int v; /* type-checking value */ v 445 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isblock(args, &v); v 448 fs/xfs/libxfs/xfs_dir2.c if (v) { v 453 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isleaf(args, &v); v 456 fs/xfs/libxfs/xfs_dir2.c if (v) v 478 fs/xfs/libxfs/xfs_dir2.c int v; /* type-checking value */ v 506 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isblock(args, &v); v 509 fs/xfs/libxfs/xfs_dir2.c if (v) { v 514 fs/xfs/libxfs/xfs_dir2.c rval = xfs_dir2_isleaf(args, &v); v 517 fs/xfs/libxfs/xfs_dir2.c if (v) v 605 fs/xfs/libxfs/xfs_format.h #define XFS_AGF_GOOD_VERSION(v) ((v) == XFS_AGF_VERSION) v 606 fs/xfs/libxfs/xfs_format.h #define XFS_AGI_GOOD_VERSION(v) ((v) == XFS_AGI_VERSION) v 71 fs/xfs/libxfs/xfs_trans_space.h #define XFS_ATTRSET_SPACE_RES(mp, v) \ v 72 fs/xfs/libxfs/xfs_trans_space.h (XFS_DAENTER_SPACE_RES(mp, XFS_ATTR_FORK) + XFS_B_TO_FSB(mp, v)) v 75 fs/xfs/libxfs/xfs_trans_space.h #define XFS_DIOSTRAT_SPACE_RES(mp, v) \ v 76 fs/xfs/libxfs/xfs_trans_space.h (XFS_EXTENTADD_SPACE_RES(mp, XFS_DATA_FORK) + (v)) v 502 fs/xfs/xfs_dir2_readdir.c int v; v 518 fs/xfs/xfs_dir2_readdir.c else if ((rval = xfs_dir2_isblock(&args, &v))) v 520 fs/xfs/xfs_dir2_readdir.c else if (v) v 110 fs/xfs/xfs_stats.c static int xqm_proc_show(struct seq_file *m, void *v) v 120 fs/xfs/xfs_stats.c static int xqmstat_proc_show(struct seq_file *m, void *v) v 162 fs/xfs/xfs_stats.h #define XFS_STATS_INC(mp, v) \ v 164 fs/xfs/xfs_stats.h per_cpu_ptr(xfsstats.xs_stats, current_cpu())->s.v++; \ v 165 fs/xfs/xfs_stats.h per_cpu_ptr(mp->m_stats.xs_stats, current_cpu())->s.v++; \ v 168 fs/xfs/xfs_stats.h #define XFS_STATS_DEC(mp, v) \ v 170 fs/xfs/xfs_stats.h per_cpu_ptr(xfsstats.xs_stats, current_cpu())->s.v--; \ v 171 fs/xfs/xfs_stats.h per_cpu_ptr(mp->m_stats.xs_stats, current_cpu())->s.v--; \ v 174 fs/xfs/xfs_stats.h #define XFS_STATS_ADD(mp, v, inc) \ v 176 fs/xfs/xfs_stats.h per_cpu_ptr(xfsstats.xs_stats, current_cpu())->s.v += (inc); \ v 177 fs/xfs/xfs_stats.h per_cpu_ptr(mp->m_stats.xs_stats, current_cpu())->s.v += (inc); \ v 20 include/acpi/platform/acgcc.h #define va_start(v, l) __builtin_va_start(v, l) v 21 include/acpi/platform/acgcc.h #define va_end(v) __builtin_va_end(v) v 22 include/acpi/platform/acgcc.h #define va_arg(v, l) __builtin_va_arg(v, l) v 24 include/asm-generic/atomic-instrumented.h atomic_read(const atomic_t *v) v 26 include/asm-generic/atomic-instrumented.h kasan_check_read(v, sizeof(*v)); v 27 include/asm-generic/atomic-instrumented.h return arch_atomic_read(v); v 33 include/asm-generic/atomic-instrumented.h atomic_read_acquire(const atomic_t *v) v 35 include/asm-generic/atomic-instrumented.h kasan_check_read(v, sizeof(*v)); v 36 include/asm-generic/atomic-instrumented.h return arch_atomic_read_acquire(v); v 42 include/asm-generic/atomic-instrumented.h atomic_set(atomic_t *v, int i) v 44 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 45 include/asm-generic/atomic-instrumented.h arch_atomic_set(v, i); v 51 include/asm-generic/atomic-instrumented.h atomic_set_release(atomic_t *v, int i) v 53 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 54 include/asm-generic/atomic-instrumented.h arch_atomic_set_release(v, i); v 60 include/asm-generic/atomic-instrumented.h atomic_add(int i, atomic_t *v) v 62 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 63 include/asm-generic/atomic-instrumented.h arch_atomic_add(i, v); v 69 include/asm-generic/atomic-instrumented.h atomic_add_return(int i, atomic_t *v) v 71 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 72 include/asm-generic/atomic-instrumented.h return arch_atomic_add_return(i, v); v 79 include/asm-generic/atomic-instrumented.h atomic_add_return_acquire(int i, atomic_t *v) v 81 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 82 include/asm-generic/atomic-instrumented.h return arch_atomic_add_return_acquire(i, v); v 89 include/asm-generic/atomic-instrumented.h atomic_add_return_release(int i, atomic_t *v) v 91 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 92 include/asm-generic/atomic-instrumented.h return arch_atomic_add_return_release(i, v); v 99 include/asm-generic/atomic-instrumented.h atomic_add_return_relaxed(int i, atomic_t *v) v 101 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 102 include/asm-generic/atomic-instrumented.h return arch_atomic_add_return_relaxed(i, v); v 109 include/asm-generic/atomic-instrumented.h atomic_fetch_add(int i, atomic_t *v) v 111 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 112 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_add(i, v); v 119 include/asm-generic/atomic-instrumented.h atomic_fetch_add_acquire(int i, atomic_t *v) v 121 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 122 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_add_acquire(i, v); v 129 include/asm-generic/atomic-instrumented.h atomic_fetch_add_release(int i, atomic_t *v) v 131 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 132 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_add_release(i, v); v 139 include/asm-generic/atomic-instrumented.h atomic_fetch_add_relaxed(int i, atomic_t *v) v 141 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 142 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_add_relaxed(i, v); v 148 include/asm-generic/atomic-instrumented.h atomic_sub(int i, atomic_t *v) v 150 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 151 include/asm-generic/atomic-instrumented.h arch_atomic_sub(i, v); v 157 include/asm-generic/atomic-instrumented.h atomic_sub_return(int i, atomic_t *v) v 159 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 160 include/asm-generic/atomic-instrumented.h return arch_atomic_sub_return(i, v); v 167 include/asm-generic/atomic-instrumented.h atomic_sub_return_acquire(int i, atomic_t *v) v 169 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 170 include/asm-generic/atomic-instrumented.h return arch_atomic_sub_return_acquire(i, v); v 177 include/asm-generic/atomic-instrumented.h atomic_sub_return_release(int i, atomic_t *v) v 179 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 180 include/asm-generic/atomic-instrumented.h return arch_atomic_sub_return_release(i, v); v 187 include/asm-generic/atomic-instrumented.h atomic_sub_return_relaxed(int i, atomic_t *v) v 189 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 190 include/asm-generic/atomic-instrumented.h return arch_atomic_sub_return_relaxed(i, v); v 197 include/asm-generic/atomic-instrumented.h atomic_fetch_sub(int i, atomic_t *v) v 199 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 200 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_sub(i, v); v 207 include/asm-generic/atomic-instrumented.h atomic_fetch_sub_acquire(int i, atomic_t *v) v 209 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 210 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_sub_acquire(i, v); v 217 include/asm-generic/atomic-instrumented.h atomic_fetch_sub_release(int i, atomic_t *v) v 219 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 220 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_sub_release(i, v); v 227 include/asm-generic/atomic-instrumented.h atomic_fetch_sub_relaxed(int i, atomic_t *v) v 229 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 230 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_sub_relaxed(i, v); v 237 include/asm-generic/atomic-instrumented.h atomic_inc(atomic_t *v) v 239 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 240 include/asm-generic/atomic-instrumented.h arch_atomic_inc(v); v 247 include/asm-generic/atomic-instrumented.h atomic_inc_return(atomic_t *v) v 249 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 250 include/asm-generic/atomic-instrumented.h return arch_atomic_inc_return(v); v 257 include/asm-generic/atomic-instrumented.h atomic_inc_return_acquire(atomic_t *v) v 259 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 260 include/asm-generic/atomic-instrumented.h return arch_atomic_inc_return_acquire(v); v 267 include/asm-generic/atomic-instrumented.h atomic_inc_return_release(atomic_t *v) v 269 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 270 include/asm-generic/atomic-instrumented.h return arch_atomic_inc_return_release(v); v 277 include/asm-generic/atomic-instrumented.h atomic_inc_return_relaxed(atomic_t *v) v 279 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 280 include/asm-generic/atomic-instrumented.h return arch_atomic_inc_return_relaxed(v); v 287 include/asm-generic/atomic-instrumented.h atomic_fetch_inc(atomic_t *v) v 289 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 290 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_inc(v); v 297 include/asm-generic/atomic-instrumented.h atomic_fetch_inc_acquire(atomic_t *v) v 299 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 300 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_inc_acquire(v); v 307 include/asm-generic/atomic-instrumented.h atomic_fetch_inc_release(atomic_t *v) v 309 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 310 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_inc_release(v); v 317 include/asm-generic/atomic-instrumented.h atomic_fetch_inc_relaxed(atomic_t *v) v 319 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 320 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_inc_relaxed(v); v 327 include/asm-generic/atomic-instrumented.h atomic_dec(atomic_t *v) v 329 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 330 include/asm-generic/atomic-instrumented.h arch_atomic_dec(v); v 337 include/asm-generic/atomic-instrumented.h atomic_dec_return(atomic_t *v) v 339 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 340 include/asm-generic/atomic-instrumented.h return arch_atomic_dec_return(v); v 347 include/asm-generic/atomic-instrumented.h atomic_dec_return_acquire(atomic_t *v) v 349 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 350 include/asm-generic/atomic-instrumented.h return arch_atomic_dec_return_acquire(v); v 357 include/asm-generic/atomic-instrumented.h atomic_dec_return_release(atomic_t *v) v 359 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 360 include/asm-generic/atomic-instrumented.h return arch_atomic_dec_return_release(v); v 367 include/asm-generic/atomic-instrumented.h atomic_dec_return_relaxed(atomic_t *v) v 369 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 370 include/asm-generic/atomic-instrumented.h return arch_atomic_dec_return_relaxed(v); v 377 include/asm-generic/atomic-instrumented.h atomic_fetch_dec(atomic_t *v) v 379 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 380 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_dec(v); v 387 include/asm-generic/atomic-instrumented.h atomic_fetch_dec_acquire(atomic_t *v) v 389 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 390 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_dec_acquire(v); v 397 include/asm-generic/atomic-instrumented.h atomic_fetch_dec_release(atomic_t *v) v 399 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 400 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_dec_release(v); v 407 include/asm-generic/atomic-instrumented.h atomic_fetch_dec_relaxed(atomic_t *v) v 409 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 410 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_dec_relaxed(v); v 416 include/asm-generic/atomic-instrumented.h atomic_and(int i, atomic_t *v) v 418 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 419 include/asm-generic/atomic-instrumented.h arch_atomic_and(i, v); v 425 include/asm-generic/atomic-instrumented.h atomic_fetch_and(int i, atomic_t *v) v 427 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 428 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_and(i, v); v 435 include/asm-generic/atomic-instrumented.h atomic_fetch_and_acquire(int i, atomic_t *v) v 437 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 438 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_and_acquire(i, v); v 445 include/asm-generic/atomic-instrumented.h atomic_fetch_and_release(int i, atomic_t *v) v 447 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 448 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_and_release(i, v); v 455 include/asm-generic/atomic-instrumented.h atomic_fetch_and_relaxed(int i, atomic_t *v) v 457 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 458 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_and_relaxed(i, v); v 465 include/asm-generic/atomic-instrumented.h atomic_andnot(int i, atomic_t *v) v 467 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 468 include/asm-generic/atomic-instrumented.h arch_atomic_andnot(i, v); v 475 include/asm-generic/atomic-instrumented.h atomic_fetch_andnot(int i, atomic_t *v) v 477 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 478 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_andnot(i, v); v 485 include/asm-generic/atomic-instrumented.h atomic_fetch_andnot_acquire(int i, atomic_t *v) v 487 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 488 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_andnot_acquire(i, v); v 495 include/asm-generic/atomic-instrumented.h atomic_fetch_andnot_release(int i, atomic_t *v) v 497 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 498 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_andnot_release(i, v); v 505 include/asm-generic/atomic-instrumented.h atomic_fetch_andnot_relaxed(int i, atomic_t *v) v 507 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 508 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_andnot_relaxed(i, v); v 514 include/asm-generic/atomic-instrumented.h atomic_or(int i, atomic_t *v) v 516 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 517 include/asm-generic/atomic-instrumented.h arch_atomic_or(i, v); v 523 include/asm-generic/atomic-instrumented.h atomic_fetch_or(int i, atomic_t *v) v 525 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 526 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_or(i, v); v 533 include/asm-generic/atomic-instrumented.h atomic_fetch_or_acquire(int i, atomic_t *v) v 535 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 536 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_or_acquire(i, v); v 543 include/asm-generic/atomic-instrumented.h atomic_fetch_or_release(int i, atomic_t *v) v 545 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 546 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_or_release(i, v); v 553 include/asm-generic/atomic-instrumented.h atomic_fetch_or_relaxed(int i, atomic_t *v) v 555 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 556 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_or_relaxed(i, v); v 562 include/asm-generic/atomic-instrumented.h atomic_xor(int i, atomic_t *v) v 564 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 565 include/asm-generic/atomic-instrumented.h arch_atomic_xor(i, v); v 571 include/asm-generic/atomic-instrumented.h atomic_fetch_xor(int i, atomic_t *v) v 573 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 574 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_xor(i, v); v 581 include/asm-generic/atomic-instrumented.h atomic_fetch_xor_acquire(int i, atomic_t *v) v 583 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 584 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_xor_acquire(i, v); v 591 include/asm-generic/atomic-instrumented.h atomic_fetch_xor_release(int i, atomic_t *v) v 593 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 594 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_xor_release(i, v); v 601 include/asm-generic/atomic-instrumented.h atomic_fetch_xor_relaxed(int i, atomic_t *v) v 603 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 604 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_xor_relaxed(i, v); v 611 include/asm-generic/atomic-instrumented.h atomic_xchg(atomic_t *v, int i) v 613 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 614 include/asm-generic/atomic-instrumented.h return arch_atomic_xchg(v, i); v 621 include/asm-generic/atomic-instrumented.h atomic_xchg_acquire(atomic_t *v, int i) v 623 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 624 include/asm-generic/atomic-instrumented.h return arch_atomic_xchg_acquire(v, i); v 631 include/asm-generic/atomic-instrumented.h atomic_xchg_release(atomic_t *v, int i) v 633 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 634 include/asm-generic/atomic-instrumented.h return arch_atomic_xchg_release(v, i); v 641 include/asm-generic/atomic-instrumented.h atomic_xchg_relaxed(atomic_t *v, int i) v 643 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 644 include/asm-generic/atomic-instrumented.h return arch_atomic_xchg_relaxed(v, i); v 651 include/asm-generic/atomic-instrumented.h atomic_cmpxchg(atomic_t *v, int old, int new) v 653 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 654 include/asm-generic/atomic-instrumented.h return arch_atomic_cmpxchg(v, old, new); v 661 include/asm-generic/atomic-instrumented.h atomic_cmpxchg_acquire(atomic_t *v, int old, int new) v 663 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 664 include/asm-generic/atomic-instrumented.h return arch_atomic_cmpxchg_acquire(v, old, new); v 671 include/asm-generic/atomic-instrumented.h atomic_cmpxchg_release(atomic_t *v, int old, int new) v 673 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 674 include/asm-generic/atomic-instrumented.h return arch_atomic_cmpxchg_release(v, old, new); v 681 include/asm-generic/atomic-instrumented.h atomic_cmpxchg_relaxed(atomic_t *v, int old, int new) v 683 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 684 include/asm-generic/atomic-instrumented.h return arch_atomic_cmpxchg_relaxed(v, old, new); v 691 include/asm-generic/atomic-instrumented.h atomic_try_cmpxchg(atomic_t *v, int *old, int new) v 693 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 695 include/asm-generic/atomic-instrumented.h return arch_atomic_try_cmpxchg(v, old, new); v 702 include/asm-generic/atomic-instrumented.h atomic_try_cmpxchg_acquire(atomic_t *v, int *old, int new) v 704 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 706 include/asm-generic/atomic-instrumented.h return arch_atomic_try_cmpxchg_acquire(v, old, new); v 713 include/asm-generic/atomic-instrumented.h atomic_try_cmpxchg_release(atomic_t *v, int *old, int new) v 715 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 717 include/asm-generic/atomic-instrumented.h return arch_atomic_try_cmpxchg_release(v, old, new); v 724 include/asm-generic/atomic-instrumented.h atomic_try_cmpxchg_relaxed(atomic_t *v, int *old, int new) v 726 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 728 include/asm-generic/atomic-instrumented.h return arch_atomic_try_cmpxchg_relaxed(v, old, new); v 735 include/asm-generic/atomic-instrumented.h atomic_sub_and_test(int i, atomic_t *v) v 737 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 738 include/asm-generic/atomic-instrumented.h return arch_atomic_sub_and_test(i, v); v 745 include/asm-generic/atomic-instrumented.h atomic_dec_and_test(atomic_t *v) v 747 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 748 include/asm-generic/atomic-instrumented.h return arch_atomic_dec_and_test(v); v 755 include/asm-generic/atomic-instrumented.h atomic_inc_and_test(atomic_t *v) v 757 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 758 include/asm-generic/atomic-instrumented.h return arch_atomic_inc_and_test(v); v 765 include/asm-generic/atomic-instrumented.h atomic_add_negative(int i, atomic_t *v) v 767 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 768 include/asm-generic/atomic-instrumented.h return arch_atomic_add_negative(i, v); v 775 include/asm-generic/atomic-instrumented.h atomic_fetch_add_unless(atomic_t *v, int a, int u) v 777 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 778 include/asm-generic/atomic-instrumented.h return arch_atomic_fetch_add_unless(v, a, u); v 785 include/asm-generic/atomic-instrumented.h atomic_add_unless(atomic_t *v, int a, int u) v 787 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 788 include/asm-generic/atomic-instrumented.h return arch_atomic_add_unless(v, a, u); v 795 include/asm-generic/atomic-instrumented.h atomic_inc_not_zero(atomic_t *v) v 797 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 798 include/asm-generic/atomic-instrumented.h return arch_atomic_inc_not_zero(v); v 805 include/asm-generic/atomic-instrumented.h atomic_inc_unless_negative(atomic_t *v) v 807 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 808 include/asm-generic/atomic-instrumented.h return arch_atomic_inc_unless_negative(v); v 815 include/asm-generic/atomic-instrumented.h atomic_dec_unless_positive(atomic_t *v) v 817 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 818 include/asm-generic/atomic-instrumented.h return arch_atomic_dec_unless_positive(v); v 825 include/asm-generic/atomic-instrumented.h atomic_dec_if_positive(atomic_t *v) v 827 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 828 include/asm-generic/atomic-instrumented.h return arch_atomic_dec_if_positive(v); v 834 include/asm-generic/atomic-instrumented.h atomic64_read(const atomic64_t *v) v 836 include/asm-generic/atomic-instrumented.h kasan_check_read(v, sizeof(*v)); v 837 include/asm-generic/atomic-instrumented.h return arch_atomic64_read(v); v 843 include/asm-generic/atomic-instrumented.h atomic64_read_acquire(const atomic64_t *v) v 845 include/asm-generic/atomic-instrumented.h kasan_check_read(v, sizeof(*v)); v 846 include/asm-generic/atomic-instrumented.h return arch_atomic64_read_acquire(v); v 852 include/asm-generic/atomic-instrumented.h atomic64_set(atomic64_t *v, s64 i) v 854 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 855 include/asm-generic/atomic-instrumented.h arch_atomic64_set(v, i); v 861 include/asm-generic/atomic-instrumented.h atomic64_set_release(atomic64_t *v, s64 i) v 863 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 864 include/asm-generic/atomic-instrumented.h arch_atomic64_set_release(v, i); v 870 include/asm-generic/atomic-instrumented.h atomic64_add(s64 i, atomic64_t *v) v 872 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 873 include/asm-generic/atomic-instrumented.h arch_atomic64_add(i, v); v 879 include/asm-generic/atomic-instrumented.h atomic64_add_return(s64 i, atomic64_t *v) v 881 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 882 include/asm-generic/atomic-instrumented.h return arch_atomic64_add_return(i, v); v 889 include/asm-generic/atomic-instrumented.h atomic64_add_return_acquire(s64 i, atomic64_t *v) v 891 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 892 include/asm-generic/atomic-instrumented.h return arch_atomic64_add_return_acquire(i, v); v 899 include/asm-generic/atomic-instrumented.h atomic64_add_return_release(s64 i, atomic64_t *v) v 901 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 902 include/asm-generic/atomic-instrumented.h return arch_atomic64_add_return_release(i, v); v 909 include/asm-generic/atomic-instrumented.h atomic64_add_return_relaxed(s64 i, atomic64_t *v) v 911 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 912 include/asm-generic/atomic-instrumented.h return arch_atomic64_add_return_relaxed(i, v); v 919 include/asm-generic/atomic-instrumented.h atomic64_fetch_add(s64 i, atomic64_t *v) v 921 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 922 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_add(i, v); v 929 include/asm-generic/atomic-instrumented.h atomic64_fetch_add_acquire(s64 i, atomic64_t *v) v 931 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 932 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_add_acquire(i, v); v 939 include/asm-generic/atomic-instrumented.h atomic64_fetch_add_release(s64 i, atomic64_t *v) v 941 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 942 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_add_release(i, v); v 949 include/asm-generic/atomic-instrumented.h atomic64_fetch_add_relaxed(s64 i, atomic64_t *v) v 951 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 952 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_add_relaxed(i, v); v 958 include/asm-generic/atomic-instrumented.h atomic64_sub(s64 i, atomic64_t *v) v 960 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 961 include/asm-generic/atomic-instrumented.h arch_atomic64_sub(i, v); v 967 include/asm-generic/atomic-instrumented.h atomic64_sub_return(s64 i, atomic64_t *v) v 969 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 970 include/asm-generic/atomic-instrumented.h return arch_atomic64_sub_return(i, v); v 977 include/asm-generic/atomic-instrumented.h atomic64_sub_return_acquire(s64 i, atomic64_t *v) v 979 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 980 include/asm-generic/atomic-instrumented.h return arch_atomic64_sub_return_acquire(i, v); v 987 include/asm-generic/atomic-instrumented.h atomic64_sub_return_release(s64 i, atomic64_t *v) v 989 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 990 include/asm-generic/atomic-instrumented.h return arch_atomic64_sub_return_release(i, v); v 997 include/asm-generic/atomic-instrumented.h atomic64_sub_return_relaxed(s64 i, atomic64_t *v) v 999 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1000 include/asm-generic/atomic-instrumented.h return arch_atomic64_sub_return_relaxed(i, v); v 1007 include/asm-generic/atomic-instrumented.h atomic64_fetch_sub(s64 i, atomic64_t *v) v 1009 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1010 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_sub(i, v); v 1017 include/asm-generic/atomic-instrumented.h atomic64_fetch_sub_acquire(s64 i, atomic64_t *v) v 1019 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1020 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_sub_acquire(i, v); v 1027 include/asm-generic/atomic-instrumented.h atomic64_fetch_sub_release(s64 i, atomic64_t *v) v 1029 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1030 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_sub_release(i, v); v 1037 include/asm-generic/atomic-instrumented.h atomic64_fetch_sub_relaxed(s64 i, atomic64_t *v) v 1039 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1040 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_sub_relaxed(i, v); v 1047 include/asm-generic/atomic-instrumented.h atomic64_inc(atomic64_t *v) v 1049 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1050 include/asm-generic/atomic-instrumented.h arch_atomic64_inc(v); v 1057 include/asm-generic/atomic-instrumented.h atomic64_inc_return(atomic64_t *v) v 1059 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1060 include/asm-generic/atomic-instrumented.h return arch_atomic64_inc_return(v); v 1067 include/asm-generic/atomic-instrumented.h atomic64_inc_return_acquire(atomic64_t *v) v 1069 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1070 include/asm-generic/atomic-instrumented.h return arch_atomic64_inc_return_acquire(v); v 1077 include/asm-generic/atomic-instrumented.h atomic64_inc_return_release(atomic64_t *v) v 1079 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1080 include/asm-generic/atomic-instrumented.h return arch_atomic64_inc_return_release(v); v 1087 include/asm-generic/atomic-instrumented.h atomic64_inc_return_relaxed(atomic64_t *v) v 1089 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1090 include/asm-generic/atomic-instrumented.h return arch_atomic64_inc_return_relaxed(v); v 1097 include/asm-generic/atomic-instrumented.h atomic64_fetch_inc(atomic64_t *v) v 1099 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1100 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_inc(v); v 1107 include/asm-generic/atomic-instrumented.h atomic64_fetch_inc_acquire(atomic64_t *v) v 1109 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1110 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_inc_acquire(v); v 1117 include/asm-generic/atomic-instrumented.h atomic64_fetch_inc_release(atomic64_t *v) v 1119 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1120 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_inc_release(v); v 1127 include/asm-generic/atomic-instrumented.h atomic64_fetch_inc_relaxed(atomic64_t *v) v 1129 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1130 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_inc_relaxed(v); v 1137 include/asm-generic/atomic-instrumented.h atomic64_dec(atomic64_t *v) v 1139 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1140 include/asm-generic/atomic-instrumented.h arch_atomic64_dec(v); v 1147 include/asm-generic/atomic-instrumented.h atomic64_dec_return(atomic64_t *v) v 1149 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1150 include/asm-generic/atomic-instrumented.h return arch_atomic64_dec_return(v); v 1157 include/asm-generic/atomic-instrumented.h atomic64_dec_return_acquire(atomic64_t *v) v 1159 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1160 include/asm-generic/atomic-instrumented.h return arch_atomic64_dec_return_acquire(v); v 1167 include/asm-generic/atomic-instrumented.h atomic64_dec_return_release(atomic64_t *v) v 1169 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1170 include/asm-generic/atomic-instrumented.h return arch_atomic64_dec_return_release(v); v 1177 include/asm-generic/atomic-instrumented.h atomic64_dec_return_relaxed(atomic64_t *v) v 1179 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1180 include/asm-generic/atomic-instrumented.h return arch_atomic64_dec_return_relaxed(v); v 1187 include/asm-generic/atomic-instrumented.h atomic64_fetch_dec(atomic64_t *v) v 1189 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1190 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_dec(v); v 1197 include/asm-generic/atomic-instrumented.h atomic64_fetch_dec_acquire(atomic64_t *v) v 1199 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1200 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_dec_acquire(v); v 1207 include/asm-generic/atomic-instrumented.h atomic64_fetch_dec_release(atomic64_t *v) v 1209 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1210 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_dec_release(v); v 1217 include/asm-generic/atomic-instrumented.h atomic64_fetch_dec_relaxed(atomic64_t *v) v 1219 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1220 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_dec_relaxed(v); v 1226 include/asm-generic/atomic-instrumented.h atomic64_and(s64 i, atomic64_t *v) v 1228 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1229 include/asm-generic/atomic-instrumented.h arch_atomic64_and(i, v); v 1235 include/asm-generic/atomic-instrumented.h atomic64_fetch_and(s64 i, atomic64_t *v) v 1237 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1238 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_and(i, v); v 1245 include/asm-generic/atomic-instrumented.h atomic64_fetch_and_acquire(s64 i, atomic64_t *v) v 1247 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1248 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_and_acquire(i, v); v 1255 include/asm-generic/atomic-instrumented.h atomic64_fetch_and_release(s64 i, atomic64_t *v) v 1257 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1258 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_and_release(i, v); v 1265 include/asm-generic/atomic-instrumented.h atomic64_fetch_and_relaxed(s64 i, atomic64_t *v) v 1267 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1268 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_and_relaxed(i, v); v 1275 include/asm-generic/atomic-instrumented.h atomic64_andnot(s64 i, atomic64_t *v) v 1277 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1278 include/asm-generic/atomic-instrumented.h arch_atomic64_andnot(i, v); v 1285 include/asm-generic/atomic-instrumented.h atomic64_fetch_andnot(s64 i, atomic64_t *v) v 1287 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1288 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_andnot(i, v); v 1295 include/asm-generic/atomic-instrumented.h atomic64_fetch_andnot_acquire(s64 i, atomic64_t *v) v 1297 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1298 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_andnot_acquire(i, v); v 1305 include/asm-generic/atomic-instrumented.h atomic64_fetch_andnot_release(s64 i, atomic64_t *v) v 1307 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1308 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_andnot_release(i, v); v 1315 include/asm-generic/atomic-instrumented.h atomic64_fetch_andnot_relaxed(s64 i, atomic64_t *v) v 1317 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1318 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_andnot_relaxed(i, v); v 1324 include/asm-generic/atomic-instrumented.h atomic64_or(s64 i, atomic64_t *v) v 1326 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1327 include/asm-generic/atomic-instrumented.h arch_atomic64_or(i, v); v 1333 include/asm-generic/atomic-instrumented.h atomic64_fetch_or(s64 i, atomic64_t *v) v 1335 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1336 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_or(i, v); v 1343 include/asm-generic/atomic-instrumented.h atomic64_fetch_or_acquire(s64 i, atomic64_t *v) v 1345 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1346 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_or_acquire(i, v); v 1353 include/asm-generic/atomic-instrumented.h atomic64_fetch_or_release(s64 i, atomic64_t *v) v 1355 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1356 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_or_release(i, v); v 1363 include/asm-generic/atomic-instrumented.h atomic64_fetch_or_relaxed(s64 i, atomic64_t *v) v 1365 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1366 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_or_relaxed(i, v); v 1372 include/asm-generic/atomic-instrumented.h atomic64_xor(s64 i, atomic64_t *v) v 1374 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1375 include/asm-generic/atomic-instrumented.h arch_atomic64_xor(i, v); v 1381 include/asm-generic/atomic-instrumented.h atomic64_fetch_xor(s64 i, atomic64_t *v) v 1383 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1384 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_xor(i, v); v 1391 include/asm-generic/atomic-instrumented.h atomic64_fetch_xor_acquire(s64 i, atomic64_t *v) v 1393 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1394 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_xor_acquire(i, v); v 1401 include/asm-generic/atomic-instrumented.h atomic64_fetch_xor_release(s64 i, atomic64_t *v) v 1403 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1404 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_xor_release(i, v); v 1411 include/asm-generic/atomic-instrumented.h atomic64_fetch_xor_relaxed(s64 i, atomic64_t *v) v 1413 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1414 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_xor_relaxed(i, v); v 1421 include/asm-generic/atomic-instrumented.h atomic64_xchg(atomic64_t *v, s64 i) v 1423 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1424 include/asm-generic/atomic-instrumented.h return arch_atomic64_xchg(v, i); v 1431 include/asm-generic/atomic-instrumented.h atomic64_xchg_acquire(atomic64_t *v, s64 i) v 1433 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1434 include/asm-generic/atomic-instrumented.h return arch_atomic64_xchg_acquire(v, i); v 1441 include/asm-generic/atomic-instrumented.h atomic64_xchg_release(atomic64_t *v, s64 i) v 1443 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1444 include/asm-generic/atomic-instrumented.h return arch_atomic64_xchg_release(v, i); v 1451 include/asm-generic/atomic-instrumented.h atomic64_xchg_relaxed(atomic64_t *v, s64 i) v 1453 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1454 include/asm-generic/atomic-instrumented.h return arch_atomic64_xchg_relaxed(v, i); v 1461 include/asm-generic/atomic-instrumented.h atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new) v 1463 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1464 include/asm-generic/atomic-instrumented.h return arch_atomic64_cmpxchg(v, old, new); v 1471 include/asm-generic/atomic-instrumented.h atomic64_cmpxchg_acquire(atomic64_t *v, s64 old, s64 new) v 1473 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1474 include/asm-generic/atomic-instrumented.h return arch_atomic64_cmpxchg_acquire(v, old, new); v 1481 include/asm-generic/atomic-instrumented.h atomic64_cmpxchg_release(atomic64_t *v, s64 old, s64 new) v 1483 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1484 include/asm-generic/atomic-instrumented.h return arch_atomic64_cmpxchg_release(v, old, new); v 1491 include/asm-generic/atomic-instrumented.h atomic64_cmpxchg_relaxed(atomic64_t *v, s64 old, s64 new) v 1493 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1494 include/asm-generic/atomic-instrumented.h return arch_atomic64_cmpxchg_relaxed(v, old, new); v 1501 include/asm-generic/atomic-instrumented.h atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new) v 1503 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1505 include/asm-generic/atomic-instrumented.h return arch_atomic64_try_cmpxchg(v, old, new); v 1512 include/asm-generic/atomic-instrumented.h atomic64_try_cmpxchg_acquire(atomic64_t *v, s64 *old, s64 new) v 1514 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1516 include/asm-generic/atomic-instrumented.h return arch_atomic64_try_cmpxchg_acquire(v, old, new); v 1523 include/asm-generic/atomic-instrumented.h atomic64_try_cmpxchg_release(atomic64_t *v, s64 *old, s64 new) v 1525 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1527 include/asm-generic/atomic-instrumented.h return arch_atomic64_try_cmpxchg_release(v, old, new); v 1534 include/asm-generic/atomic-instrumented.h atomic64_try_cmpxchg_relaxed(atomic64_t *v, s64 *old, s64 new) v 1536 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1538 include/asm-generic/atomic-instrumented.h return arch_atomic64_try_cmpxchg_relaxed(v, old, new); v 1545 include/asm-generic/atomic-instrumented.h atomic64_sub_and_test(s64 i, atomic64_t *v) v 1547 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1548 include/asm-generic/atomic-instrumented.h return arch_atomic64_sub_and_test(i, v); v 1555 include/asm-generic/atomic-instrumented.h atomic64_dec_and_test(atomic64_t *v) v 1557 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1558 include/asm-generic/atomic-instrumented.h return arch_atomic64_dec_and_test(v); v 1565 include/asm-generic/atomic-instrumented.h atomic64_inc_and_test(atomic64_t *v) v 1567 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1568 include/asm-generic/atomic-instrumented.h return arch_atomic64_inc_and_test(v); v 1575 include/asm-generic/atomic-instrumented.h atomic64_add_negative(s64 i, atomic64_t *v) v 1577 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1578 include/asm-generic/atomic-instrumented.h return arch_atomic64_add_negative(i, v); v 1585 include/asm-generic/atomic-instrumented.h atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 1587 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1588 include/asm-generic/atomic-instrumented.h return arch_atomic64_fetch_add_unless(v, a, u); v 1595 include/asm-generic/atomic-instrumented.h atomic64_add_unless(atomic64_t *v, s64 a, s64 u) v 1597 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1598 include/asm-generic/atomic-instrumented.h return arch_atomic64_add_unless(v, a, u); v 1605 include/asm-generic/atomic-instrumented.h atomic64_inc_not_zero(atomic64_t *v) v 1607 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1608 include/asm-generic/atomic-instrumented.h return arch_atomic64_inc_not_zero(v); v 1615 include/asm-generic/atomic-instrumented.h atomic64_inc_unless_negative(atomic64_t *v) v 1617 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1618 include/asm-generic/atomic-instrumented.h return arch_atomic64_inc_unless_negative(v); v 1625 include/asm-generic/atomic-instrumented.h atomic64_dec_unless_positive(atomic64_t *v) v 1627 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1628 include/asm-generic/atomic-instrumented.h return arch_atomic64_dec_unless_positive(v); v 1635 include/asm-generic/atomic-instrumented.h atomic64_dec_if_positive(atomic64_t *v) v 1637 include/asm-generic/atomic-instrumented.h kasan_check_write(v, sizeof(*v)); v 1638 include/asm-generic/atomic-instrumented.h return arch_atomic64_dec_if_positive(v); v 26 include/asm-generic/atomic-long.h atomic_long_read(const atomic_long_t *v) v 28 include/asm-generic/atomic-long.h return atomic64_read(v); v 32 include/asm-generic/atomic-long.h atomic_long_read_acquire(const atomic_long_t *v) v 34 include/asm-generic/atomic-long.h return atomic64_read_acquire(v); v 38 include/asm-generic/atomic-long.h atomic_long_set(atomic_long_t *v, long i) v 40 include/asm-generic/atomic-long.h atomic64_set(v, i); v 44 include/asm-generic/atomic-long.h atomic_long_set_release(atomic_long_t *v, long i) v 46 include/asm-generic/atomic-long.h atomic64_set_release(v, i); v 50 include/asm-generic/atomic-long.h atomic_long_add(long i, atomic_long_t *v) v 52 include/asm-generic/atomic-long.h atomic64_add(i, v); v 56 include/asm-generic/atomic-long.h atomic_long_add_return(long i, atomic_long_t *v) v 58 include/asm-generic/atomic-long.h return atomic64_add_return(i, v); v 62 include/asm-generic/atomic-long.h atomic_long_add_return_acquire(long i, atomic_long_t *v) v 64 include/asm-generic/atomic-long.h return atomic64_add_return_acquire(i, v); v 68 include/asm-generic/atomic-long.h atomic_long_add_return_release(long i, atomic_long_t *v) v 70 include/asm-generic/atomic-long.h return atomic64_add_return_release(i, v); v 74 include/asm-generic/atomic-long.h atomic_long_add_return_relaxed(long i, atomic_long_t *v) v 76 include/asm-generic/atomic-long.h return atomic64_add_return_relaxed(i, v); v 80 include/asm-generic/atomic-long.h atomic_long_fetch_add(long i, atomic_long_t *v) v 82 include/asm-generic/atomic-long.h return atomic64_fetch_add(i, v); v 86 include/asm-generic/atomic-long.h atomic_long_fetch_add_acquire(long i, atomic_long_t *v) v 88 include/asm-generic/atomic-long.h return atomic64_fetch_add_acquire(i, v); v 92 include/asm-generic/atomic-long.h atomic_long_fetch_add_release(long i, atomic_long_t *v) v 94 include/asm-generic/atomic-long.h return atomic64_fetch_add_release(i, v); v 98 include/asm-generic/atomic-long.h atomic_long_fetch_add_relaxed(long i, atomic_long_t *v) v 100 include/asm-generic/atomic-long.h return atomic64_fetch_add_relaxed(i, v); v 104 include/asm-generic/atomic-long.h atomic_long_sub(long i, atomic_long_t *v) v 106 include/asm-generic/atomic-long.h atomic64_sub(i, v); v 110 include/asm-generic/atomic-long.h atomic_long_sub_return(long i, atomic_long_t *v) v 112 include/asm-generic/atomic-long.h return atomic64_sub_return(i, v); v 116 include/asm-generic/atomic-long.h atomic_long_sub_return_acquire(long i, atomic_long_t *v) v 118 include/asm-generic/atomic-long.h return atomic64_sub_return_acquire(i, v); v 122 include/asm-generic/atomic-long.h atomic_long_sub_return_release(long i, atomic_long_t *v) v 124 include/asm-generic/atomic-long.h return atomic64_sub_return_release(i, v); v 128 include/asm-generic/atomic-long.h atomic_long_sub_return_relaxed(long i, atomic_long_t *v) v 130 include/asm-generic/atomic-long.h return atomic64_sub_return_relaxed(i, v); v 134 include/asm-generic/atomic-long.h atomic_long_fetch_sub(long i, atomic_long_t *v) v 136 include/asm-generic/atomic-long.h return atomic64_fetch_sub(i, v); v 140 include/asm-generic/atomic-long.h atomic_long_fetch_sub_acquire(long i, atomic_long_t *v) v 142 include/asm-generic/atomic-long.h return atomic64_fetch_sub_acquire(i, v); v 146 include/asm-generic/atomic-long.h atomic_long_fetch_sub_release(long i, atomic_long_t *v) v 148 include/asm-generic/atomic-long.h return atomic64_fetch_sub_release(i, v); v 152 include/asm-generic/atomic-long.h atomic_long_fetch_sub_relaxed(long i, atomic_long_t *v) v 154 include/asm-generic/atomic-long.h return atomic64_fetch_sub_relaxed(i, v); v 158 include/asm-generic/atomic-long.h atomic_long_inc(atomic_long_t *v) v 160 include/asm-generic/atomic-long.h atomic64_inc(v); v 164 include/asm-generic/atomic-long.h atomic_long_inc_return(atomic_long_t *v) v 166 include/asm-generic/atomic-long.h return atomic64_inc_return(v); v 170 include/asm-generic/atomic-long.h atomic_long_inc_return_acquire(atomic_long_t *v) v 172 include/asm-generic/atomic-long.h return atomic64_inc_return_acquire(v); v 176 include/asm-generic/atomic-long.h atomic_long_inc_return_release(atomic_long_t *v) v 178 include/asm-generic/atomic-long.h return atomic64_inc_return_release(v); v 182 include/asm-generic/atomic-long.h atomic_long_inc_return_relaxed(atomic_long_t *v) v 184 include/asm-generic/atomic-long.h return atomic64_inc_return_relaxed(v); v 188 include/asm-generic/atomic-long.h atomic_long_fetch_inc(atomic_long_t *v) v 190 include/asm-generic/atomic-long.h return atomic64_fetch_inc(v); v 194 include/asm-generic/atomic-long.h atomic_long_fetch_inc_acquire(atomic_long_t *v) v 196 include/asm-generic/atomic-long.h return atomic64_fetch_inc_acquire(v); v 200 include/asm-generic/atomic-long.h atomic_long_fetch_inc_release(atomic_long_t *v) v 202 include/asm-generic/atomic-long.h return atomic64_fetch_inc_release(v); v 206 include/asm-generic/atomic-long.h atomic_long_fetch_inc_relaxed(atomic_long_t *v) v 208 include/asm-generic/atomic-long.h return atomic64_fetch_inc_relaxed(v); v 212 include/asm-generic/atomic-long.h atomic_long_dec(atomic_long_t *v) v 214 include/asm-generic/atomic-long.h atomic64_dec(v); v 218 include/asm-generic/atomic-long.h atomic_long_dec_return(atomic_long_t *v) v 220 include/asm-generic/atomic-long.h return atomic64_dec_return(v); v 224 include/asm-generic/atomic-long.h atomic_long_dec_return_acquire(atomic_long_t *v) v 226 include/asm-generic/atomic-long.h return atomic64_dec_return_acquire(v); v 230 include/asm-generic/atomic-long.h atomic_long_dec_return_release(atomic_long_t *v) v 232 include/asm-generic/atomic-long.h return atomic64_dec_return_release(v); v 236 include/asm-generic/atomic-long.h atomic_long_dec_return_relaxed(atomic_long_t *v) v 238 include/asm-generic/atomic-long.h return atomic64_dec_return_relaxed(v); v 242 include/asm-generic/atomic-long.h atomic_long_fetch_dec(atomic_long_t *v) v 244 include/asm-generic/atomic-long.h return atomic64_fetch_dec(v); v 248 include/asm-generic/atomic-long.h atomic_long_fetch_dec_acquire(atomic_long_t *v) v 250 include/asm-generic/atomic-long.h return atomic64_fetch_dec_acquire(v); v 254 include/asm-generic/atomic-long.h atomic_long_fetch_dec_release(atomic_long_t *v) v 256 include/asm-generic/atomic-long.h return atomic64_fetch_dec_release(v); v 260 include/asm-generic/atomic-long.h atomic_long_fetch_dec_relaxed(atomic_long_t *v) v 262 include/asm-generic/atomic-long.h return atomic64_fetch_dec_relaxed(v); v 266 include/asm-generic/atomic-long.h atomic_long_and(long i, atomic_long_t *v) v 268 include/asm-generic/atomic-long.h atomic64_and(i, v); v 272 include/asm-generic/atomic-long.h atomic_long_fetch_and(long i, atomic_long_t *v) v 274 include/asm-generic/atomic-long.h return atomic64_fetch_and(i, v); v 278 include/asm-generic/atomic-long.h atomic_long_fetch_and_acquire(long i, atomic_long_t *v) v 280 include/asm-generic/atomic-long.h return atomic64_fetch_and_acquire(i, v); v 284 include/asm-generic/atomic-long.h atomic_long_fetch_and_release(long i, atomic_long_t *v) v 286 include/asm-generic/atomic-long.h return atomic64_fetch_and_release(i, v); v 290 include/asm-generic/atomic-long.h atomic_long_fetch_and_relaxed(long i, atomic_long_t *v) v 292 include/asm-generic/atomic-long.h return atomic64_fetch_and_relaxed(i, v); v 296 include/asm-generic/atomic-long.h atomic_long_andnot(long i, atomic_long_t *v) v 298 include/asm-generic/atomic-long.h atomic64_andnot(i, v); v 302 include/asm-generic/atomic-long.h atomic_long_fetch_andnot(long i, atomic_long_t *v) v 304 include/asm-generic/atomic-long.h return atomic64_fetch_andnot(i, v); v 308 include/asm-generic/atomic-long.h atomic_long_fetch_andnot_acquire(long i, atomic_long_t *v) v 310 include/asm-generic/atomic-long.h return atomic64_fetch_andnot_acquire(i, v); v 314 include/asm-generic/atomic-long.h atomic_long_fetch_andnot_release(long i, atomic_long_t *v) v 316 include/asm-generic/atomic-long.h return atomic64_fetch_andnot_release(i, v); v 320 include/asm-generic/atomic-long.h atomic_long_fetch_andnot_relaxed(long i, atomic_long_t *v) v 322 include/asm-generic/atomic-long.h return atomic64_fetch_andnot_relaxed(i, v); v 326 include/asm-generic/atomic-long.h atomic_long_or(long i, atomic_long_t *v) v 328 include/asm-generic/atomic-long.h atomic64_or(i, v); v 332 include/asm-generic/atomic-long.h atomic_long_fetch_or(long i, atomic_long_t *v) v 334 include/asm-generic/atomic-long.h return atomic64_fetch_or(i, v); v 338 include/asm-generic/atomic-long.h atomic_long_fetch_or_acquire(long i, atomic_long_t *v) v 340 include/asm-generic/atomic-long.h return atomic64_fetch_or_acquire(i, v); v 344 include/asm-generic/atomic-long.h atomic_long_fetch_or_release(long i, atomic_long_t *v) v 346 include/asm-generic/atomic-long.h return atomic64_fetch_or_release(i, v); v 350 include/asm-generic/atomic-long.h atomic_long_fetch_or_relaxed(long i, atomic_long_t *v) v 352 include/asm-generic/atomic-long.h return atomic64_fetch_or_relaxed(i, v); v 356 include/asm-generic/atomic-long.h atomic_long_xor(long i, atomic_long_t *v) v 358 include/asm-generic/atomic-long.h atomic64_xor(i, v); v 362 include/asm-generic/atomic-long.h atomic_long_fetch_xor(long i, atomic_long_t *v) v 364 include/asm-generic/atomic-long.h return atomic64_fetch_xor(i, v); v 368 include/asm-generic/atomic-long.h atomic_long_fetch_xor_acquire(long i, atomic_long_t *v) v 370 include/asm-generic/atomic-long.h return atomic64_fetch_xor_acquire(i, v); v 374 include/asm-generic/atomic-long.h atomic_long_fetch_xor_release(long i, atomic_long_t *v) v 376 include/asm-generic/atomic-long.h return atomic64_fetch_xor_release(i, v); v 380 include/asm-generic/atomic-long.h atomic_long_fetch_xor_relaxed(long i, atomic_long_t *v) v 382 include/asm-generic/atomic-long.h return atomic64_fetch_xor_relaxed(i, v); v 386 include/asm-generic/atomic-long.h atomic_long_xchg(atomic_long_t *v, long i) v 388 include/asm-generic/atomic-long.h return atomic64_xchg(v, i); v 392 include/asm-generic/atomic-long.h atomic_long_xchg_acquire(atomic_long_t *v, long i) v 394 include/asm-generic/atomic-long.h return atomic64_xchg_acquire(v, i); v 398 include/asm-generic/atomic-long.h atomic_long_xchg_release(atomic_long_t *v, long i) v 400 include/asm-generic/atomic-long.h return atomic64_xchg_release(v, i); v 404 include/asm-generic/atomic-long.h atomic_long_xchg_relaxed(atomic_long_t *v, long i) v 406 include/asm-generic/atomic-long.h return atomic64_xchg_relaxed(v, i); v 410 include/asm-generic/atomic-long.h atomic_long_cmpxchg(atomic_long_t *v, long old, long new) v 412 include/asm-generic/atomic-long.h return atomic64_cmpxchg(v, old, new); v 416 include/asm-generic/atomic-long.h atomic_long_cmpxchg_acquire(atomic_long_t *v, long old, long new) v 418 include/asm-generic/atomic-long.h return atomic64_cmpxchg_acquire(v, old, new); v 422 include/asm-generic/atomic-long.h atomic_long_cmpxchg_release(atomic_long_t *v, long old, long new) v 424 include/asm-generic/atomic-long.h return atomic64_cmpxchg_release(v, old, new); v 428 include/asm-generic/atomic-long.h atomic_long_cmpxchg_relaxed(atomic_long_t *v, long old, long new) v 430 include/asm-generic/atomic-long.h return atomic64_cmpxchg_relaxed(v, old, new); v 434 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg(atomic_long_t *v, long *old, long new) v 436 include/asm-generic/atomic-long.h return atomic64_try_cmpxchg(v, (s64 *)old, new); v 440 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg_acquire(atomic_long_t *v, long *old, long new) v 442 include/asm-generic/atomic-long.h return atomic64_try_cmpxchg_acquire(v, (s64 *)old, new); v 446 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg_release(atomic_long_t *v, long *old, long new) v 448 include/asm-generic/atomic-long.h return atomic64_try_cmpxchg_release(v, (s64 *)old, new); v 452 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg_relaxed(atomic_long_t *v, long *old, long new) v 454 include/asm-generic/atomic-long.h return atomic64_try_cmpxchg_relaxed(v, (s64 *)old, new); v 458 include/asm-generic/atomic-long.h atomic_long_sub_and_test(long i, atomic_long_t *v) v 460 include/asm-generic/atomic-long.h return atomic64_sub_and_test(i, v); v 464 include/asm-generic/atomic-long.h atomic_long_dec_and_test(atomic_long_t *v) v 466 include/asm-generic/atomic-long.h return atomic64_dec_and_test(v); v 470 include/asm-generic/atomic-long.h atomic_long_inc_and_test(atomic_long_t *v) v 472 include/asm-generic/atomic-long.h return atomic64_inc_and_test(v); v 476 include/asm-generic/atomic-long.h atomic_long_add_negative(long i, atomic_long_t *v) v 478 include/asm-generic/atomic-long.h return atomic64_add_negative(i, v); v 482 include/asm-generic/atomic-long.h atomic_long_fetch_add_unless(atomic_long_t *v, long a, long u) v 484 include/asm-generic/atomic-long.h return atomic64_fetch_add_unless(v, a, u); v 488 include/asm-generic/atomic-long.h atomic_long_add_unless(atomic_long_t *v, long a, long u) v 490 include/asm-generic/atomic-long.h return atomic64_add_unless(v, a, u); v 494 include/asm-generic/atomic-long.h atomic_long_inc_not_zero(atomic_long_t *v) v 496 include/asm-generic/atomic-long.h return atomic64_inc_not_zero(v); v 500 include/asm-generic/atomic-long.h atomic_long_inc_unless_negative(atomic_long_t *v) v 502 include/asm-generic/atomic-long.h return atomic64_inc_unless_negative(v); v 506 include/asm-generic/atomic-long.h atomic_long_dec_unless_positive(atomic_long_t *v) v 508 include/asm-generic/atomic-long.h return atomic64_dec_unless_positive(v); v 512 include/asm-generic/atomic-long.h atomic_long_dec_if_positive(atomic_long_t *v) v 514 include/asm-generic/atomic-long.h return atomic64_dec_if_positive(v); v 520 include/asm-generic/atomic-long.h atomic_long_read(const atomic_long_t *v) v 522 include/asm-generic/atomic-long.h return atomic_read(v); v 526 include/asm-generic/atomic-long.h atomic_long_read_acquire(const atomic_long_t *v) v 528 include/asm-generic/atomic-long.h return atomic_read_acquire(v); v 532 include/asm-generic/atomic-long.h atomic_long_set(atomic_long_t *v, long i) v 534 include/asm-generic/atomic-long.h atomic_set(v, i); v 538 include/asm-generic/atomic-long.h atomic_long_set_release(atomic_long_t *v, long i) v 540 include/asm-generic/atomic-long.h atomic_set_release(v, i); v 544 include/asm-generic/atomic-long.h atomic_long_add(long i, atomic_long_t *v) v 546 include/asm-generic/atomic-long.h atomic_add(i, v); v 550 include/asm-generic/atomic-long.h atomic_long_add_return(long i, atomic_long_t *v) v 552 include/asm-generic/atomic-long.h return atomic_add_return(i, v); v 556 include/asm-generic/atomic-long.h atomic_long_add_return_acquire(long i, atomic_long_t *v) v 558 include/asm-generic/atomic-long.h return atomic_add_return_acquire(i, v); v 562 include/asm-generic/atomic-long.h atomic_long_add_return_release(long i, atomic_long_t *v) v 564 include/asm-generic/atomic-long.h return atomic_add_return_release(i, v); v 568 include/asm-generic/atomic-long.h atomic_long_add_return_relaxed(long i, atomic_long_t *v) v 570 include/asm-generic/atomic-long.h return atomic_add_return_relaxed(i, v); v 574 include/asm-generic/atomic-long.h atomic_long_fetch_add(long i, atomic_long_t *v) v 576 include/asm-generic/atomic-long.h return atomic_fetch_add(i, v); v 580 include/asm-generic/atomic-long.h atomic_long_fetch_add_acquire(long i, atomic_long_t *v) v 582 include/asm-generic/atomic-long.h return atomic_fetch_add_acquire(i, v); v 586 include/asm-generic/atomic-long.h atomic_long_fetch_add_release(long i, atomic_long_t *v) v 588 include/asm-generic/atomic-long.h return atomic_fetch_add_release(i, v); v 592 include/asm-generic/atomic-long.h atomic_long_fetch_add_relaxed(long i, atomic_long_t *v) v 594 include/asm-generic/atomic-long.h return atomic_fetch_add_relaxed(i, v); v 598 include/asm-generic/atomic-long.h atomic_long_sub(long i, atomic_long_t *v) v 600 include/asm-generic/atomic-long.h atomic_sub(i, v); v 604 include/asm-generic/atomic-long.h atomic_long_sub_return(long i, atomic_long_t *v) v 606 include/asm-generic/atomic-long.h return atomic_sub_return(i, v); v 610 include/asm-generic/atomic-long.h atomic_long_sub_return_acquire(long i, atomic_long_t *v) v 612 include/asm-generic/atomic-long.h return atomic_sub_return_acquire(i, v); v 616 include/asm-generic/atomic-long.h atomic_long_sub_return_release(long i, atomic_long_t *v) v 618 include/asm-generic/atomic-long.h return atomic_sub_return_release(i, v); v 622 include/asm-generic/atomic-long.h atomic_long_sub_return_relaxed(long i, atomic_long_t *v) v 624 include/asm-generic/atomic-long.h return atomic_sub_return_relaxed(i, v); v 628 include/asm-generic/atomic-long.h atomic_long_fetch_sub(long i, atomic_long_t *v) v 630 include/asm-generic/atomic-long.h return atomic_fetch_sub(i, v); v 634 include/asm-generic/atomic-long.h atomic_long_fetch_sub_acquire(long i, atomic_long_t *v) v 636 include/asm-generic/atomic-long.h return atomic_fetch_sub_acquire(i, v); v 640 include/asm-generic/atomic-long.h atomic_long_fetch_sub_release(long i, atomic_long_t *v) v 642 include/asm-generic/atomic-long.h return atomic_fetch_sub_release(i, v); v 646 include/asm-generic/atomic-long.h atomic_long_fetch_sub_relaxed(long i, atomic_long_t *v) v 648 include/asm-generic/atomic-long.h return atomic_fetch_sub_relaxed(i, v); v 652 include/asm-generic/atomic-long.h atomic_long_inc(atomic_long_t *v) v 654 include/asm-generic/atomic-long.h atomic_inc(v); v 658 include/asm-generic/atomic-long.h atomic_long_inc_return(atomic_long_t *v) v 660 include/asm-generic/atomic-long.h return atomic_inc_return(v); v 664 include/asm-generic/atomic-long.h atomic_long_inc_return_acquire(atomic_long_t *v) v 666 include/asm-generic/atomic-long.h return atomic_inc_return_acquire(v); v 670 include/asm-generic/atomic-long.h atomic_long_inc_return_release(atomic_long_t *v) v 672 include/asm-generic/atomic-long.h return atomic_inc_return_release(v); v 676 include/asm-generic/atomic-long.h atomic_long_inc_return_relaxed(atomic_long_t *v) v 678 include/asm-generic/atomic-long.h return atomic_inc_return_relaxed(v); v 682 include/asm-generic/atomic-long.h atomic_long_fetch_inc(atomic_long_t *v) v 684 include/asm-generic/atomic-long.h return atomic_fetch_inc(v); v 688 include/asm-generic/atomic-long.h atomic_long_fetch_inc_acquire(atomic_long_t *v) v 690 include/asm-generic/atomic-long.h return atomic_fetch_inc_acquire(v); v 694 include/asm-generic/atomic-long.h atomic_long_fetch_inc_release(atomic_long_t *v) v 696 include/asm-generic/atomic-long.h return atomic_fetch_inc_release(v); v 700 include/asm-generic/atomic-long.h atomic_long_fetch_inc_relaxed(atomic_long_t *v) v 702 include/asm-generic/atomic-long.h return atomic_fetch_inc_relaxed(v); v 706 include/asm-generic/atomic-long.h atomic_long_dec(atomic_long_t *v) v 708 include/asm-generic/atomic-long.h atomic_dec(v); v 712 include/asm-generic/atomic-long.h atomic_long_dec_return(atomic_long_t *v) v 714 include/asm-generic/atomic-long.h return atomic_dec_return(v); v 718 include/asm-generic/atomic-long.h atomic_long_dec_return_acquire(atomic_long_t *v) v 720 include/asm-generic/atomic-long.h return atomic_dec_return_acquire(v); v 724 include/asm-generic/atomic-long.h atomic_long_dec_return_release(atomic_long_t *v) v 726 include/asm-generic/atomic-long.h return atomic_dec_return_release(v); v 730 include/asm-generic/atomic-long.h atomic_long_dec_return_relaxed(atomic_long_t *v) v 732 include/asm-generic/atomic-long.h return atomic_dec_return_relaxed(v); v 736 include/asm-generic/atomic-long.h atomic_long_fetch_dec(atomic_long_t *v) v 738 include/asm-generic/atomic-long.h return atomic_fetch_dec(v); v 742 include/asm-generic/atomic-long.h atomic_long_fetch_dec_acquire(atomic_long_t *v) v 744 include/asm-generic/atomic-long.h return atomic_fetch_dec_acquire(v); v 748 include/asm-generic/atomic-long.h atomic_long_fetch_dec_release(atomic_long_t *v) v 750 include/asm-generic/atomic-long.h return atomic_fetch_dec_release(v); v 754 include/asm-generic/atomic-long.h atomic_long_fetch_dec_relaxed(atomic_long_t *v) v 756 include/asm-generic/atomic-long.h return atomic_fetch_dec_relaxed(v); v 760 include/asm-generic/atomic-long.h atomic_long_and(long i, atomic_long_t *v) v 762 include/asm-generic/atomic-long.h atomic_and(i, v); v 766 include/asm-generic/atomic-long.h atomic_long_fetch_and(long i, atomic_long_t *v) v 768 include/asm-generic/atomic-long.h return atomic_fetch_and(i, v); v 772 include/asm-generic/atomic-long.h atomic_long_fetch_and_acquire(long i, atomic_long_t *v) v 774 include/asm-generic/atomic-long.h return atomic_fetch_and_acquire(i, v); v 778 include/asm-generic/atomic-long.h atomic_long_fetch_and_release(long i, atomic_long_t *v) v 780 include/asm-generic/atomic-long.h return atomic_fetch_and_release(i, v); v 784 include/asm-generic/atomic-long.h atomic_long_fetch_and_relaxed(long i, atomic_long_t *v) v 786 include/asm-generic/atomic-long.h return atomic_fetch_and_relaxed(i, v); v 790 include/asm-generic/atomic-long.h atomic_long_andnot(long i, atomic_long_t *v) v 792 include/asm-generic/atomic-long.h atomic_andnot(i, v); v 796 include/asm-generic/atomic-long.h atomic_long_fetch_andnot(long i, atomic_long_t *v) v 798 include/asm-generic/atomic-long.h return atomic_fetch_andnot(i, v); v 802 include/asm-generic/atomic-long.h atomic_long_fetch_andnot_acquire(long i, atomic_long_t *v) v 804 include/asm-generic/atomic-long.h return atomic_fetch_andnot_acquire(i, v); v 808 include/asm-generic/atomic-long.h atomic_long_fetch_andnot_release(long i, atomic_long_t *v) v 810 include/asm-generic/atomic-long.h return atomic_fetch_andnot_release(i, v); v 814 include/asm-generic/atomic-long.h atomic_long_fetch_andnot_relaxed(long i, atomic_long_t *v) v 816 include/asm-generic/atomic-long.h return atomic_fetch_andnot_relaxed(i, v); v 820 include/asm-generic/atomic-long.h atomic_long_or(long i, atomic_long_t *v) v 822 include/asm-generic/atomic-long.h atomic_or(i, v); v 826 include/asm-generic/atomic-long.h atomic_long_fetch_or(long i, atomic_long_t *v) v 828 include/asm-generic/atomic-long.h return atomic_fetch_or(i, v); v 832 include/asm-generic/atomic-long.h atomic_long_fetch_or_acquire(long i, atomic_long_t *v) v 834 include/asm-generic/atomic-long.h return atomic_fetch_or_acquire(i, v); v 838 include/asm-generic/atomic-long.h atomic_long_fetch_or_release(long i, atomic_long_t *v) v 840 include/asm-generic/atomic-long.h return atomic_fetch_or_release(i, v); v 844 include/asm-generic/atomic-long.h atomic_long_fetch_or_relaxed(long i, atomic_long_t *v) v 846 include/asm-generic/atomic-long.h return atomic_fetch_or_relaxed(i, v); v 850 include/asm-generic/atomic-long.h atomic_long_xor(long i, atomic_long_t *v) v 852 include/asm-generic/atomic-long.h atomic_xor(i, v); v 856 include/asm-generic/atomic-long.h atomic_long_fetch_xor(long i, atomic_long_t *v) v 858 include/asm-generic/atomic-long.h return atomic_fetch_xor(i, v); v 862 include/asm-generic/atomic-long.h atomic_long_fetch_xor_acquire(long i, atomic_long_t *v) v 864 include/asm-generic/atomic-long.h return atomic_fetch_xor_acquire(i, v); v 868 include/asm-generic/atomic-long.h atomic_long_fetch_xor_release(long i, atomic_long_t *v) v 870 include/asm-generic/atomic-long.h return atomic_fetch_xor_release(i, v); v 874 include/asm-generic/atomic-long.h atomic_long_fetch_xor_relaxed(long i, atomic_long_t *v) v 876 include/asm-generic/atomic-long.h return atomic_fetch_xor_relaxed(i, v); v 880 include/asm-generic/atomic-long.h atomic_long_xchg(atomic_long_t *v, long i) v 882 include/asm-generic/atomic-long.h return atomic_xchg(v, i); v 886 include/asm-generic/atomic-long.h atomic_long_xchg_acquire(atomic_long_t *v, long i) v 888 include/asm-generic/atomic-long.h return atomic_xchg_acquire(v, i); v 892 include/asm-generic/atomic-long.h atomic_long_xchg_release(atomic_long_t *v, long i) v 894 include/asm-generic/atomic-long.h return atomic_xchg_release(v, i); v 898 include/asm-generic/atomic-long.h atomic_long_xchg_relaxed(atomic_long_t *v, long i) v 900 include/asm-generic/atomic-long.h return atomic_xchg_relaxed(v, i); v 904 include/asm-generic/atomic-long.h atomic_long_cmpxchg(atomic_long_t *v, long old, long new) v 906 include/asm-generic/atomic-long.h return atomic_cmpxchg(v, old, new); v 910 include/asm-generic/atomic-long.h atomic_long_cmpxchg_acquire(atomic_long_t *v, long old, long new) v 912 include/asm-generic/atomic-long.h return atomic_cmpxchg_acquire(v, old, new); v 916 include/asm-generic/atomic-long.h atomic_long_cmpxchg_release(atomic_long_t *v, long old, long new) v 918 include/asm-generic/atomic-long.h return atomic_cmpxchg_release(v, old, new); v 922 include/asm-generic/atomic-long.h atomic_long_cmpxchg_relaxed(atomic_long_t *v, long old, long new) v 924 include/asm-generic/atomic-long.h return atomic_cmpxchg_relaxed(v, old, new); v 928 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg(atomic_long_t *v, long *old, long new) v 930 include/asm-generic/atomic-long.h return atomic_try_cmpxchg(v, (int *)old, new); v 934 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg_acquire(atomic_long_t *v, long *old, long new) v 936 include/asm-generic/atomic-long.h return atomic_try_cmpxchg_acquire(v, (int *)old, new); v 940 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg_release(atomic_long_t *v, long *old, long new) v 942 include/asm-generic/atomic-long.h return atomic_try_cmpxchg_release(v, (int *)old, new); v 946 include/asm-generic/atomic-long.h atomic_long_try_cmpxchg_relaxed(atomic_long_t *v, long *old, long new) v 948 include/asm-generic/atomic-long.h return atomic_try_cmpxchg_relaxed(v, (int *)old, new); v 952 include/asm-generic/atomic-long.h atomic_long_sub_and_test(long i, atomic_long_t *v) v 954 include/asm-generic/atomic-long.h return atomic_sub_and_test(i, v); v 958 include/asm-generic/atomic-long.h atomic_long_dec_and_test(atomic_long_t *v) v 960 include/asm-generic/atomic-long.h return atomic_dec_and_test(v); v 964 include/asm-generic/atomic-long.h atomic_long_inc_and_test(atomic_long_t *v) v 966 include/asm-generic/atomic-long.h return atomic_inc_and_test(v); v 970 include/asm-generic/atomic-long.h atomic_long_add_negative(long i, atomic_long_t *v) v 972 include/asm-generic/atomic-long.h return atomic_add_negative(i, v); v 976 include/asm-generic/atomic-long.h atomic_long_fetch_add_unless(atomic_long_t *v, long a, long u) v 978 include/asm-generic/atomic-long.h return atomic_fetch_add_unless(v, a, u); v 982 include/asm-generic/atomic-long.h atomic_long_add_unless(atomic_long_t *v, long a, long u) v 984 include/asm-generic/atomic-long.h return atomic_add_unless(v, a, u); v 988 include/asm-generic/atomic-long.h atomic_long_inc_not_zero(atomic_long_t *v) v 990 include/asm-generic/atomic-long.h return atomic_inc_not_zero(v); v 994 include/asm-generic/atomic-long.h atomic_long_inc_unless_negative(atomic_long_t *v) v 996 include/asm-generic/atomic-long.h return atomic_inc_unless_negative(v); v 1000 include/asm-generic/atomic-long.h atomic_long_dec_unless_positive(atomic_long_t *v) v 1002 include/asm-generic/atomic-long.h return atomic_dec_unless_positive(v); v 1006 include/asm-generic/atomic-long.h atomic_long_dec_if_positive(atomic_long_t *v) v 1008 include/asm-generic/atomic-long.h return atomic_dec_if_positive(v); v 37 include/asm-generic/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 41 include/asm-generic/atomic.h c = v->counter; \ v 42 include/asm-generic/atomic.h while ((old = cmpxchg(&v->counter, c, c c_op i)) != c) \ v 47 include/asm-generic/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 51 include/asm-generic/atomic.h c = v->counter; \ v 52 include/asm-generic/atomic.h while ((old = cmpxchg(&v->counter, c, c c_op i)) != c) \ v 59 include/asm-generic/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 63 include/asm-generic/atomic.h c = v->counter; \ v 64 include/asm-generic/atomic.h while ((old = cmpxchg(&v->counter, c, c c_op i)) != c) \ v 75 include/asm-generic/atomic.h static inline void atomic_##op(int i, atomic_t *v) \ v 80 include/asm-generic/atomic.h v->counter = v->counter c_op i; \ v 85 include/asm-generic/atomic.h static inline int atomic_##op##_return(int i, atomic_t *v) \ v 91 include/asm-generic/atomic.h ret = (v->counter = v->counter c_op i); \ v 98 include/asm-generic/atomic.h static inline int atomic_fetch_##op(int i, atomic_t *v) \ v 104 include/asm-generic/atomic.h ret = v->counter; \ v 105 include/asm-generic/atomic.h v->counter = v->counter c_op i; \ v 171 include/asm-generic/atomic.h #define atomic_read(v) READ_ONCE((v)->counter) v 181 include/asm-generic/atomic.h #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) v 185 include/asm-generic/atomic.h static inline void atomic_add(int i, atomic_t *v) v 187 include/asm-generic/atomic.h atomic_add_return(i, v); v 190 include/asm-generic/atomic.h static inline void atomic_sub(int i, atomic_t *v) v 192 include/asm-generic/atomic.h atomic_sub_return(i, v); v 195 include/asm-generic/atomic.h #define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v))) v 196 include/asm-generic/atomic.h #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new))) v 18 include/asm-generic/atomic64.h extern s64 atomic64_read(const atomic64_t *v); v 19 include/asm-generic/atomic64.h extern void atomic64_set(atomic64_t *v, s64 i); v 21 include/asm-generic/atomic64.h #define atomic64_set_release(v, i) atomic64_set((v), (i)) v 24 include/asm-generic/atomic64.h extern void atomic64_##op(s64 a, atomic64_t *v); v 27 include/asm-generic/atomic64.h extern s64 atomic64_##op##_return(s64 a, atomic64_t *v); v 30 include/asm-generic/atomic64.h extern s64 atomic64_fetch_##op(s64 a, atomic64_t *v); v 49 include/asm-generic/atomic64.h extern s64 atomic64_dec_if_positive(atomic64_t *v); v 51 include/asm-generic/atomic64.h extern s64 atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n); v 52 include/asm-generic/atomic64.h extern s64 atomic64_xchg(atomic64_t *v, s64 new); v 53 include/asm-generic/atomic64.h extern s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u); v 120 include/asm-generic/barrier.h #define __smp_store_release(p, v) \ v 124 include/asm-generic/barrier.h WRITE_ONCE(*p, v); \ v 153 include/asm-generic/barrier.h #define smp_store_release(p, v) __smp_store_release(p, v) v 175 include/asm-generic/barrier.h #define smp_store_release(p, v) \ v 179 include/asm-generic/barrier.h WRITE_ONCE(*p, v); \ v 203 include/asm-generic/barrier.h #define virt_store_release(p, v) __smp_store_release(p, v) v 28 include/asm-generic/io.h #define __io_ar(v) rmb() v 30 include/asm-generic/io.h #define __io_ar(v) barrier() v 61 include/asm-generic/io.h #define __io_par(v) __io_ar(v) v 207 include/drm/drm_hdcp.h u8 v[HDCP_2_2_V_PRIME_HALF_LEN]; v 97 include/kvm/arm_arch_timer.h #define vcpu_timer(v) (&(v)->arch.timer_cpu) v 98 include/kvm/arm_arch_timer.h #define vcpu_get_timer(v,t) (&vcpu_timer(v)->timers[(t)]) v 99 include/kvm/arm_arch_timer.h #define vcpu_vtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_VTIMER]) v 100 include/kvm/arm_arch_timer.h #define vcpu_ptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_PTIMER]) v 32 include/kvm/arm_pmu.h #define kvm_arm_pmu_v3_ready(v) ((v)->arch.pmu.ready) v 33 include/kvm/arm_pmu.h #define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num >= VGIC_NR_SGIS) v 62 include/kvm/arm_pmu.h #define kvm_arm_pmu_v3_ready(v) (false) v 63 include/kvm/arm_pmu.h #define kvm_arm_pmu_irq_initialized(v) (false) v 44 include/kvm/iodev.h int l, void *v) v 46 include/kvm/iodev.h return dev->ops->read ? dev->ops->read(vcpu, dev, addr, l, v) v 52 include/kvm/iodev.h int l, const void *v) v 54 include/kvm/iodev.h return dev->ops->write ? dev->ops->write(vcpu, dev, addr, l, v) v 80 include/linux/atomic-fallback.h atomic_read_acquire(const atomic_t *v) v 82 include/linux/atomic-fallback.h return smp_load_acquire(&(v)->counter); v 89 include/linux/atomic-fallback.h atomic_set_release(atomic_t *v, int i) v 91 include/linux/atomic-fallback.h smp_store_release(&(v)->counter, i); v 104 include/linux/atomic-fallback.h atomic_add_return_acquire(int i, atomic_t *v) v 106 include/linux/atomic-fallback.h int ret = atomic_add_return_relaxed(i, v); v 115 include/linux/atomic-fallback.h atomic_add_return_release(int i, atomic_t *v) v 118 include/linux/atomic-fallback.h return atomic_add_return_relaxed(i, v); v 125 include/linux/atomic-fallback.h atomic_add_return(int i, atomic_t *v) v 129 include/linux/atomic-fallback.h ret = atomic_add_return_relaxed(i, v); v 146 include/linux/atomic-fallback.h atomic_fetch_add_acquire(int i, atomic_t *v) v 148 include/linux/atomic-fallback.h int ret = atomic_fetch_add_relaxed(i, v); v 157 include/linux/atomic-fallback.h atomic_fetch_add_release(int i, atomic_t *v) v 160 include/linux/atomic-fallback.h return atomic_fetch_add_relaxed(i, v); v 167 include/linux/atomic-fallback.h atomic_fetch_add(int i, atomic_t *v) v 171 include/linux/atomic-fallback.h ret = atomic_fetch_add_relaxed(i, v); v 188 include/linux/atomic-fallback.h atomic_sub_return_acquire(int i, atomic_t *v) v 190 include/linux/atomic-fallback.h int ret = atomic_sub_return_relaxed(i, v); v 199 include/linux/atomic-fallback.h atomic_sub_return_release(int i, atomic_t *v) v 202 include/linux/atomic-fallback.h return atomic_sub_return_relaxed(i, v); v 209 include/linux/atomic-fallback.h atomic_sub_return(int i, atomic_t *v) v 213 include/linux/atomic-fallback.h ret = atomic_sub_return_relaxed(i, v); v 230 include/linux/atomic-fallback.h atomic_fetch_sub_acquire(int i, atomic_t *v) v 232 include/linux/atomic-fallback.h int ret = atomic_fetch_sub_relaxed(i, v); v 241 include/linux/atomic-fallback.h atomic_fetch_sub_release(int i, atomic_t *v) v 244 include/linux/atomic-fallback.h return atomic_fetch_sub_relaxed(i, v); v 251 include/linux/atomic-fallback.h atomic_fetch_sub(int i, atomic_t *v) v 255 include/linux/atomic-fallback.h ret = atomic_fetch_sub_relaxed(i, v); v 266 include/linux/atomic-fallback.h atomic_inc(atomic_t *v) v 268 include/linux/atomic-fallback.h atomic_add(1, v); v 282 include/linux/atomic-fallback.h atomic_inc_return(atomic_t *v) v 284 include/linux/atomic-fallback.h return atomic_add_return(1, v); v 291 include/linux/atomic-fallback.h atomic_inc_return_acquire(atomic_t *v) v 293 include/linux/atomic-fallback.h return atomic_add_return_acquire(1, v); v 300 include/linux/atomic-fallback.h atomic_inc_return_release(atomic_t *v) v 302 include/linux/atomic-fallback.h return atomic_add_return_release(1, v); v 309 include/linux/atomic-fallback.h atomic_inc_return_relaxed(atomic_t *v) v 311 include/linux/atomic-fallback.h return atomic_add_return_relaxed(1, v); v 320 include/linux/atomic-fallback.h atomic_inc_return_acquire(atomic_t *v) v 322 include/linux/atomic-fallback.h int ret = atomic_inc_return_relaxed(v); v 331 include/linux/atomic-fallback.h atomic_inc_return_release(atomic_t *v) v 334 include/linux/atomic-fallback.h return atomic_inc_return_relaxed(v); v 341 include/linux/atomic-fallback.h atomic_inc_return(atomic_t *v) v 345 include/linux/atomic-fallback.h ret = atomic_inc_return_relaxed(v); v 363 include/linux/atomic-fallback.h atomic_fetch_inc(atomic_t *v) v 365 include/linux/atomic-fallback.h return atomic_fetch_add(1, v); v 372 include/linux/atomic-fallback.h atomic_fetch_inc_acquire(atomic_t *v) v 374 include/linux/atomic-fallback.h return atomic_fetch_add_acquire(1, v); v 381 include/linux/atomic-fallback.h atomic_fetch_inc_release(atomic_t *v) v 383 include/linux/atomic-fallback.h return atomic_fetch_add_release(1, v); v 390 include/linux/atomic-fallback.h atomic_fetch_inc_relaxed(atomic_t *v) v 392 include/linux/atomic-fallback.h return atomic_fetch_add_relaxed(1, v); v 401 include/linux/atomic-fallback.h atomic_fetch_inc_acquire(atomic_t *v) v 403 include/linux/atomic-fallback.h int ret = atomic_fetch_inc_relaxed(v); v 412 include/linux/atomic-fallback.h atomic_fetch_inc_release(atomic_t *v) v 415 include/linux/atomic-fallback.h return atomic_fetch_inc_relaxed(v); v 422 include/linux/atomic-fallback.h atomic_fetch_inc(atomic_t *v) v 426 include/linux/atomic-fallback.h ret = atomic_fetch_inc_relaxed(v); v 437 include/linux/atomic-fallback.h atomic_dec(atomic_t *v) v 439 include/linux/atomic-fallback.h atomic_sub(1, v); v 453 include/linux/atomic-fallback.h atomic_dec_return(atomic_t *v) v 455 include/linux/atomic-fallback.h return atomic_sub_return(1, v); v 462 include/linux/atomic-fallback.h atomic_dec_return_acquire(atomic_t *v) v 464 include/linux/atomic-fallback.h return atomic_sub_return_acquire(1, v); v 471 include/linux/atomic-fallback.h atomic_dec_return_release(atomic_t *v) v 473 include/linux/atomic-fallback.h return atomic_sub_return_release(1, v); v 480 include/linux/atomic-fallback.h atomic_dec_return_relaxed(atomic_t *v) v 482 include/linux/atomic-fallback.h return atomic_sub_return_relaxed(1, v); v 491 include/linux/atomic-fallback.h atomic_dec_return_acquire(atomic_t *v) v 493 include/linux/atomic-fallback.h int ret = atomic_dec_return_relaxed(v); v 502 include/linux/atomic-fallback.h atomic_dec_return_release(atomic_t *v) v 505 include/linux/atomic-fallback.h return atomic_dec_return_relaxed(v); v 512 include/linux/atomic-fallback.h atomic_dec_return(atomic_t *v) v 516 include/linux/atomic-fallback.h ret = atomic_dec_return_relaxed(v); v 534 include/linux/atomic-fallback.h atomic_fetch_dec(atomic_t *v) v 536 include/linux/atomic-fallback.h return atomic_fetch_sub(1, v); v 543 include/linux/atomic-fallback.h atomic_fetch_dec_acquire(atomic_t *v) v 545 include/linux/atomic-fallback.h return atomic_fetch_sub_acquire(1, v); v 552 include/linux/atomic-fallback.h atomic_fetch_dec_release(atomic_t *v) v 554 include/linux/atomic-fallback.h return atomic_fetch_sub_release(1, v); v 561 include/linux/atomic-fallback.h atomic_fetch_dec_relaxed(atomic_t *v) v 563 include/linux/atomic-fallback.h return atomic_fetch_sub_relaxed(1, v); v 572 include/linux/atomic-fallback.h atomic_fetch_dec_acquire(atomic_t *v) v 574 include/linux/atomic-fallback.h int ret = atomic_fetch_dec_relaxed(v); v 583 include/linux/atomic-fallback.h atomic_fetch_dec_release(atomic_t *v) v 586 include/linux/atomic-fallback.h return atomic_fetch_dec_relaxed(v); v 593 include/linux/atomic-fallback.h atomic_fetch_dec(atomic_t *v) v 597 include/linux/atomic-fallback.h ret = atomic_fetch_dec_relaxed(v); v 614 include/linux/atomic-fallback.h atomic_fetch_and_acquire(int i, atomic_t *v) v 616 include/linux/atomic-fallback.h int ret = atomic_fetch_and_relaxed(i, v); v 625 include/linux/atomic-fallback.h atomic_fetch_and_release(int i, atomic_t *v) v 628 include/linux/atomic-fallback.h return atomic_fetch_and_relaxed(i, v); v 635 include/linux/atomic-fallback.h atomic_fetch_and(int i, atomic_t *v) v 639 include/linux/atomic-fallback.h ret = atomic_fetch_and_relaxed(i, v); v 650 include/linux/atomic-fallback.h atomic_andnot(int i, atomic_t *v) v 652 include/linux/atomic-fallback.h atomic_and(~i, v); v 666 include/linux/atomic-fallback.h atomic_fetch_andnot(int i, atomic_t *v) v 668 include/linux/atomic-fallback.h return atomic_fetch_and(~i, v); v 675 include/linux/atomic-fallback.h atomic_fetch_andnot_acquire(int i, atomic_t *v) v 677 include/linux/atomic-fallback.h return atomic_fetch_and_acquire(~i, v); v 684 include/linux/atomic-fallback.h atomic_fetch_andnot_release(int i, atomic_t *v) v 686 include/linux/atomic-fallback.h return atomic_fetch_and_release(~i, v); v 693 include/linux/atomic-fallback.h atomic_fetch_andnot_relaxed(int i, atomic_t *v) v 695 include/linux/atomic-fallback.h return atomic_fetch_and_relaxed(~i, v); v 704 include/linux/atomic-fallback.h atomic_fetch_andnot_acquire(int i, atomic_t *v) v 706 include/linux/atomic-fallback.h int ret = atomic_fetch_andnot_relaxed(i, v); v 715 include/linux/atomic-fallback.h atomic_fetch_andnot_release(int i, atomic_t *v) v 718 include/linux/atomic-fallback.h return atomic_fetch_andnot_relaxed(i, v); v 725 include/linux/atomic-fallback.h atomic_fetch_andnot(int i, atomic_t *v) v 729 include/linux/atomic-fallback.h ret = atomic_fetch_andnot_relaxed(i, v); v 746 include/linux/atomic-fallback.h atomic_fetch_or_acquire(int i, atomic_t *v) v 748 include/linux/atomic-fallback.h int ret = atomic_fetch_or_relaxed(i, v); v 757 include/linux/atomic-fallback.h atomic_fetch_or_release(int i, atomic_t *v) v 760 include/linux/atomic-fallback.h return atomic_fetch_or_relaxed(i, v); v 767 include/linux/atomic-fallback.h atomic_fetch_or(int i, atomic_t *v) v 771 include/linux/atomic-fallback.h ret = atomic_fetch_or_relaxed(i, v); v 788 include/linux/atomic-fallback.h atomic_fetch_xor_acquire(int i, atomic_t *v) v 790 include/linux/atomic-fallback.h int ret = atomic_fetch_xor_relaxed(i, v); v 799 include/linux/atomic-fallback.h atomic_fetch_xor_release(int i, atomic_t *v) v 802 include/linux/atomic-fallback.h return atomic_fetch_xor_relaxed(i, v); v 809 include/linux/atomic-fallback.h atomic_fetch_xor(int i, atomic_t *v) v 813 include/linux/atomic-fallback.h ret = atomic_fetch_xor_relaxed(i, v); v 830 include/linux/atomic-fallback.h atomic_xchg_acquire(atomic_t *v, int i) v 832 include/linux/atomic-fallback.h int ret = atomic_xchg_relaxed(v, i); v 841 include/linux/atomic-fallback.h atomic_xchg_release(atomic_t *v, int i) v 844 include/linux/atomic-fallback.h return atomic_xchg_relaxed(v, i); v 851 include/linux/atomic-fallback.h atomic_xchg(atomic_t *v, int i) v 855 include/linux/atomic-fallback.h ret = atomic_xchg_relaxed(v, i); v 872 include/linux/atomic-fallback.h atomic_cmpxchg_acquire(atomic_t *v, int old, int new) v 874 include/linux/atomic-fallback.h int ret = atomic_cmpxchg_relaxed(v, old, new); v 883 include/linux/atomic-fallback.h atomic_cmpxchg_release(atomic_t *v, int old, int new) v 886 include/linux/atomic-fallback.h return atomic_cmpxchg_relaxed(v, old, new); v 893 include/linux/atomic-fallback.h atomic_cmpxchg(atomic_t *v, int old, int new) v 897 include/linux/atomic-fallback.h ret = atomic_cmpxchg_relaxed(v, old, new); v 915 include/linux/atomic-fallback.h atomic_try_cmpxchg(atomic_t *v, int *old, int new) v 918 include/linux/atomic-fallback.h r = atomic_cmpxchg(v, o, new); v 928 include/linux/atomic-fallback.h atomic_try_cmpxchg_acquire(atomic_t *v, int *old, int new) v 931 include/linux/atomic-fallback.h r = atomic_cmpxchg_acquire(v, o, new); v 941 include/linux/atomic-fallback.h atomic_try_cmpxchg_release(atomic_t *v, int *old, int new) v 944 include/linux/atomic-fallback.h r = atomic_cmpxchg_release(v, o, new); v 954 include/linux/atomic-fallback.h atomic_try_cmpxchg_relaxed(atomic_t *v, int *old, int new) v 957 include/linux/atomic-fallback.h r = atomic_cmpxchg_relaxed(v, o, new); v 969 include/linux/atomic-fallback.h atomic_try_cmpxchg_acquire(atomic_t *v, int *old, int new) v 971 include/linux/atomic-fallback.h bool ret = atomic_try_cmpxchg_relaxed(v, old, new); v 980 include/linux/atomic-fallback.h atomic_try_cmpxchg_release(atomic_t *v, int *old, int new) v 983 include/linux/atomic-fallback.h return atomic_try_cmpxchg_relaxed(v, old, new); v 990 include/linux/atomic-fallback.h atomic_try_cmpxchg(atomic_t *v, int *old, int new) v 994 include/linux/atomic-fallback.h ret = atomic_try_cmpxchg_relaxed(v, old, new); v 1014 include/linux/atomic-fallback.h atomic_sub_and_test(int i, atomic_t *v) v 1016 include/linux/atomic-fallback.h return atomic_sub_return(i, v) == 0; v 1031 include/linux/atomic-fallback.h atomic_dec_and_test(atomic_t *v) v 1033 include/linux/atomic-fallback.h return atomic_dec_return(v) == 0; v 1048 include/linux/atomic-fallback.h atomic_inc_and_test(atomic_t *v) v 1050 include/linux/atomic-fallback.h return atomic_inc_return(v) == 0; v 1066 include/linux/atomic-fallback.h atomic_add_negative(int i, atomic_t *v) v 1068 include/linux/atomic-fallback.h return atomic_add_return(i, v) < 0; v 1084 include/linux/atomic-fallback.h atomic_fetch_add_unless(atomic_t *v, int a, int u) v 1086 include/linux/atomic-fallback.h int c = atomic_read(v); v 1091 include/linux/atomic-fallback.h } while (!atomic_try_cmpxchg(v, &c, c + a)); v 1109 include/linux/atomic-fallback.h atomic_add_unless(atomic_t *v, int a, int u) v 1111 include/linux/atomic-fallback.h return atomic_fetch_add_unless(v, a, u) != u; v 1125 include/linux/atomic-fallback.h atomic_inc_not_zero(atomic_t *v) v 1127 include/linux/atomic-fallback.h return atomic_add_unless(v, 1, 0); v 1134 include/linux/atomic-fallback.h atomic_inc_unless_negative(atomic_t *v) v 1136 include/linux/atomic-fallback.h int c = atomic_read(v); v 1141 include/linux/atomic-fallback.h } while (!atomic_try_cmpxchg(v, &c, c + 1)); v 1150 include/linux/atomic-fallback.h atomic_dec_unless_positive(atomic_t *v) v 1152 include/linux/atomic-fallback.h int c = atomic_read(v); v 1157 include/linux/atomic-fallback.h } while (!atomic_try_cmpxchg(v, &c, c - 1)); v 1166 include/linux/atomic-fallback.h atomic_dec_if_positive(atomic_t *v) v 1168 include/linux/atomic-fallback.h int dec, c = atomic_read(v); v 1174 include/linux/atomic-fallback.h } while (!atomic_try_cmpxchg(v, &c, dec)); v 1181 include/linux/atomic-fallback.h #define atomic_cond_read_acquire(v, c) smp_cond_load_acquire(&(v)->counter, (c)) v 1182 include/linux/atomic-fallback.h #define atomic_cond_read_relaxed(v, c) smp_cond_load_relaxed(&(v)->counter, (c)) v 1190 include/linux/atomic-fallback.h atomic64_read_acquire(const atomic64_t *v) v 1192 include/linux/atomic-fallback.h return smp_load_acquire(&(v)->counter); v 1199 include/linux/atomic-fallback.h atomic64_set_release(atomic64_t *v, s64 i) v 1201 include/linux/atomic-fallback.h smp_store_release(&(v)->counter, i); v 1214 include/linux/atomic-fallback.h atomic64_add_return_acquire(s64 i, atomic64_t *v) v 1216 include/linux/atomic-fallback.h s64 ret = atomic64_add_return_relaxed(i, v); v 1225 include/linux/atomic-fallback.h atomic64_add_return_release(s64 i, atomic64_t *v) v 1228 include/linux/atomic-fallback.h return atomic64_add_return_relaxed(i, v); v 1235 include/linux/atomic-fallback.h atomic64_add_return(s64 i, atomic64_t *v) v 1239 include/linux/atomic-fallback.h ret = atomic64_add_return_relaxed(i, v); v 1256 include/linux/atomic-fallback.h atomic64_fetch_add_acquire(s64 i, atomic64_t *v) v 1258 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_add_relaxed(i, v); v 1267 include/linux/atomic-fallback.h atomic64_fetch_add_release(s64 i, atomic64_t *v) v 1270 include/linux/atomic-fallback.h return atomic64_fetch_add_relaxed(i, v); v 1277 include/linux/atomic-fallback.h atomic64_fetch_add(s64 i, atomic64_t *v) v 1281 include/linux/atomic-fallback.h ret = atomic64_fetch_add_relaxed(i, v); v 1298 include/linux/atomic-fallback.h atomic64_sub_return_acquire(s64 i, atomic64_t *v) v 1300 include/linux/atomic-fallback.h s64 ret = atomic64_sub_return_relaxed(i, v); v 1309 include/linux/atomic-fallback.h atomic64_sub_return_release(s64 i, atomic64_t *v) v 1312 include/linux/atomic-fallback.h return atomic64_sub_return_relaxed(i, v); v 1319 include/linux/atomic-fallback.h atomic64_sub_return(s64 i, atomic64_t *v) v 1323 include/linux/atomic-fallback.h ret = atomic64_sub_return_relaxed(i, v); v 1340 include/linux/atomic-fallback.h atomic64_fetch_sub_acquire(s64 i, atomic64_t *v) v 1342 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_sub_relaxed(i, v); v 1351 include/linux/atomic-fallback.h atomic64_fetch_sub_release(s64 i, atomic64_t *v) v 1354 include/linux/atomic-fallback.h return atomic64_fetch_sub_relaxed(i, v); v 1361 include/linux/atomic-fallback.h atomic64_fetch_sub(s64 i, atomic64_t *v) v 1365 include/linux/atomic-fallback.h ret = atomic64_fetch_sub_relaxed(i, v); v 1376 include/linux/atomic-fallback.h atomic64_inc(atomic64_t *v) v 1378 include/linux/atomic-fallback.h atomic64_add(1, v); v 1392 include/linux/atomic-fallback.h atomic64_inc_return(atomic64_t *v) v 1394 include/linux/atomic-fallback.h return atomic64_add_return(1, v); v 1401 include/linux/atomic-fallback.h atomic64_inc_return_acquire(atomic64_t *v) v 1403 include/linux/atomic-fallback.h return atomic64_add_return_acquire(1, v); v 1410 include/linux/atomic-fallback.h atomic64_inc_return_release(atomic64_t *v) v 1412 include/linux/atomic-fallback.h return atomic64_add_return_release(1, v); v 1419 include/linux/atomic-fallback.h atomic64_inc_return_relaxed(atomic64_t *v) v 1421 include/linux/atomic-fallback.h return atomic64_add_return_relaxed(1, v); v 1430 include/linux/atomic-fallback.h atomic64_inc_return_acquire(atomic64_t *v) v 1432 include/linux/atomic-fallback.h s64 ret = atomic64_inc_return_relaxed(v); v 1441 include/linux/atomic-fallback.h atomic64_inc_return_release(atomic64_t *v) v 1444 include/linux/atomic-fallback.h return atomic64_inc_return_relaxed(v); v 1451 include/linux/atomic-fallback.h atomic64_inc_return(atomic64_t *v) v 1455 include/linux/atomic-fallback.h ret = atomic64_inc_return_relaxed(v); v 1473 include/linux/atomic-fallback.h atomic64_fetch_inc(atomic64_t *v) v 1475 include/linux/atomic-fallback.h return atomic64_fetch_add(1, v); v 1482 include/linux/atomic-fallback.h atomic64_fetch_inc_acquire(atomic64_t *v) v 1484 include/linux/atomic-fallback.h return atomic64_fetch_add_acquire(1, v); v 1491 include/linux/atomic-fallback.h atomic64_fetch_inc_release(atomic64_t *v) v 1493 include/linux/atomic-fallback.h return atomic64_fetch_add_release(1, v); v 1500 include/linux/atomic-fallback.h atomic64_fetch_inc_relaxed(atomic64_t *v) v 1502 include/linux/atomic-fallback.h return atomic64_fetch_add_relaxed(1, v); v 1511 include/linux/atomic-fallback.h atomic64_fetch_inc_acquire(atomic64_t *v) v 1513 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_inc_relaxed(v); v 1522 include/linux/atomic-fallback.h atomic64_fetch_inc_release(atomic64_t *v) v 1525 include/linux/atomic-fallback.h return atomic64_fetch_inc_relaxed(v); v 1532 include/linux/atomic-fallback.h atomic64_fetch_inc(atomic64_t *v) v 1536 include/linux/atomic-fallback.h ret = atomic64_fetch_inc_relaxed(v); v 1547 include/linux/atomic-fallback.h atomic64_dec(atomic64_t *v) v 1549 include/linux/atomic-fallback.h atomic64_sub(1, v); v 1563 include/linux/atomic-fallback.h atomic64_dec_return(atomic64_t *v) v 1565 include/linux/atomic-fallback.h return atomic64_sub_return(1, v); v 1572 include/linux/atomic-fallback.h atomic64_dec_return_acquire(atomic64_t *v) v 1574 include/linux/atomic-fallback.h return atomic64_sub_return_acquire(1, v); v 1581 include/linux/atomic-fallback.h atomic64_dec_return_release(atomic64_t *v) v 1583 include/linux/atomic-fallback.h return atomic64_sub_return_release(1, v); v 1590 include/linux/atomic-fallback.h atomic64_dec_return_relaxed(atomic64_t *v) v 1592 include/linux/atomic-fallback.h return atomic64_sub_return_relaxed(1, v); v 1601 include/linux/atomic-fallback.h atomic64_dec_return_acquire(atomic64_t *v) v 1603 include/linux/atomic-fallback.h s64 ret = atomic64_dec_return_relaxed(v); v 1612 include/linux/atomic-fallback.h atomic64_dec_return_release(atomic64_t *v) v 1615 include/linux/atomic-fallback.h return atomic64_dec_return_relaxed(v); v 1622 include/linux/atomic-fallback.h atomic64_dec_return(atomic64_t *v) v 1626 include/linux/atomic-fallback.h ret = atomic64_dec_return_relaxed(v); v 1644 include/linux/atomic-fallback.h atomic64_fetch_dec(atomic64_t *v) v 1646 include/linux/atomic-fallback.h return atomic64_fetch_sub(1, v); v 1653 include/linux/atomic-fallback.h atomic64_fetch_dec_acquire(atomic64_t *v) v 1655 include/linux/atomic-fallback.h return atomic64_fetch_sub_acquire(1, v); v 1662 include/linux/atomic-fallback.h atomic64_fetch_dec_release(atomic64_t *v) v 1664 include/linux/atomic-fallback.h return atomic64_fetch_sub_release(1, v); v 1671 include/linux/atomic-fallback.h atomic64_fetch_dec_relaxed(atomic64_t *v) v 1673 include/linux/atomic-fallback.h return atomic64_fetch_sub_relaxed(1, v); v 1682 include/linux/atomic-fallback.h atomic64_fetch_dec_acquire(atomic64_t *v) v 1684 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_dec_relaxed(v); v 1693 include/linux/atomic-fallback.h atomic64_fetch_dec_release(atomic64_t *v) v 1696 include/linux/atomic-fallback.h return atomic64_fetch_dec_relaxed(v); v 1703 include/linux/atomic-fallback.h atomic64_fetch_dec(atomic64_t *v) v 1707 include/linux/atomic-fallback.h ret = atomic64_fetch_dec_relaxed(v); v 1724 include/linux/atomic-fallback.h atomic64_fetch_and_acquire(s64 i, atomic64_t *v) v 1726 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_and_relaxed(i, v); v 1735 include/linux/atomic-fallback.h atomic64_fetch_and_release(s64 i, atomic64_t *v) v 1738 include/linux/atomic-fallback.h return atomic64_fetch_and_relaxed(i, v); v 1745 include/linux/atomic-fallback.h atomic64_fetch_and(s64 i, atomic64_t *v) v 1749 include/linux/atomic-fallback.h ret = atomic64_fetch_and_relaxed(i, v); v 1760 include/linux/atomic-fallback.h atomic64_andnot(s64 i, atomic64_t *v) v 1762 include/linux/atomic-fallback.h atomic64_and(~i, v); v 1776 include/linux/atomic-fallback.h atomic64_fetch_andnot(s64 i, atomic64_t *v) v 1778 include/linux/atomic-fallback.h return atomic64_fetch_and(~i, v); v 1785 include/linux/atomic-fallback.h atomic64_fetch_andnot_acquire(s64 i, atomic64_t *v) v 1787 include/linux/atomic-fallback.h return atomic64_fetch_and_acquire(~i, v); v 1794 include/linux/atomic-fallback.h atomic64_fetch_andnot_release(s64 i, atomic64_t *v) v 1796 include/linux/atomic-fallback.h return atomic64_fetch_and_release(~i, v); v 1803 include/linux/atomic-fallback.h atomic64_fetch_andnot_relaxed(s64 i, atomic64_t *v) v 1805 include/linux/atomic-fallback.h return atomic64_fetch_and_relaxed(~i, v); v 1814 include/linux/atomic-fallback.h atomic64_fetch_andnot_acquire(s64 i, atomic64_t *v) v 1816 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_andnot_relaxed(i, v); v 1825 include/linux/atomic-fallback.h atomic64_fetch_andnot_release(s64 i, atomic64_t *v) v 1828 include/linux/atomic-fallback.h return atomic64_fetch_andnot_relaxed(i, v); v 1835 include/linux/atomic-fallback.h atomic64_fetch_andnot(s64 i, atomic64_t *v) v 1839 include/linux/atomic-fallback.h ret = atomic64_fetch_andnot_relaxed(i, v); v 1856 include/linux/atomic-fallback.h atomic64_fetch_or_acquire(s64 i, atomic64_t *v) v 1858 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_or_relaxed(i, v); v 1867 include/linux/atomic-fallback.h atomic64_fetch_or_release(s64 i, atomic64_t *v) v 1870 include/linux/atomic-fallback.h return atomic64_fetch_or_relaxed(i, v); v 1877 include/linux/atomic-fallback.h atomic64_fetch_or(s64 i, atomic64_t *v) v 1881 include/linux/atomic-fallback.h ret = atomic64_fetch_or_relaxed(i, v); v 1898 include/linux/atomic-fallback.h atomic64_fetch_xor_acquire(s64 i, atomic64_t *v) v 1900 include/linux/atomic-fallback.h s64 ret = atomic64_fetch_xor_relaxed(i, v); v 1909 include/linux/atomic-fallback.h atomic64_fetch_xor_release(s64 i, atomic64_t *v) v 1912 include/linux/atomic-fallback.h return atomic64_fetch_xor_relaxed(i, v); v 1919 include/linux/atomic-fallback.h atomic64_fetch_xor(s64 i, atomic64_t *v) v 1923 include/linux/atomic-fallback.h ret = atomic64_fetch_xor_relaxed(i, v); v 1940 include/linux/atomic-fallback.h atomic64_xchg_acquire(atomic64_t *v, s64 i) v 1942 include/linux/atomic-fallback.h s64 ret = atomic64_xchg_relaxed(v, i); v 1951 include/linux/atomic-fallback.h atomic64_xchg_release(atomic64_t *v, s64 i) v 1954 include/linux/atomic-fallback.h return atomic64_xchg_relaxed(v, i); v 1961 include/linux/atomic-fallback.h atomic64_xchg(atomic64_t *v, s64 i) v 1965 include/linux/atomic-fallback.h ret = atomic64_xchg_relaxed(v, i); v 1982 include/linux/atomic-fallback.h atomic64_cmpxchg_acquire(atomic64_t *v, s64 old, s64 new) v 1984 include/linux/atomic-fallback.h s64 ret = atomic64_cmpxchg_relaxed(v, old, new); v 1993 include/linux/atomic-fallback.h atomic64_cmpxchg_release(atomic64_t *v, s64 old, s64 new) v 1996 include/linux/atomic-fallback.h return atomic64_cmpxchg_relaxed(v, old, new); v 2003 include/linux/atomic-fallback.h atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new) v 2007 include/linux/atomic-fallback.h ret = atomic64_cmpxchg_relaxed(v, old, new); v 2025 include/linux/atomic-fallback.h atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new) v 2028 include/linux/atomic-fallback.h r = atomic64_cmpxchg(v, o, new); v 2038 include/linux/atomic-fallback.h atomic64_try_cmpxchg_acquire(atomic64_t *v, s64 *old, s64 new) v 2041 include/linux/atomic-fallback.h r = atomic64_cmpxchg_acquire(v, o, new); v 2051 include/linux/atomic-fallback.h atomic64_try_cmpxchg_release(atomic64_t *v, s64 *old, s64 new) v 2054 include/linux/atomic-fallback.h r = atomic64_cmpxchg_release(v, o, new); v 2064 include/linux/atomic-fallback.h atomic64_try_cmpxchg_relaxed(atomic64_t *v, s64 *old, s64 new) v 2067 include/linux/atomic-fallback.h r = atomic64_cmpxchg_relaxed(v, o, new); v 2079 include/linux/atomic-fallback.h atomic64_try_cmpxchg_acquire(atomic64_t *v, s64 *old, s64 new) v 2081 include/linux/atomic-fallback.h bool ret = atomic64_try_cmpxchg_relaxed(v, old, new); v 2090 include/linux/atomic-fallback.h atomic64_try_cmpxchg_release(atomic64_t *v, s64 *old, s64 new) v 2093 include/linux/atomic-fallback.h return atomic64_try_cmpxchg_relaxed(v, old, new); v 2100 include/linux/atomic-fallback.h atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new) v 2104 include/linux/atomic-fallback.h ret = atomic64_try_cmpxchg_relaxed(v, old, new); v 2124 include/linux/atomic-fallback.h atomic64_sub_and_test(s64 i, atomic64_t *v) v 2126 include/linux/atomic-fallback.h return atomic64_sub_return(i, v) == 0; v 2141 include/linux/atomic-fallback.h atomic64_dec_and_test(atomic64_t *v) v 2143 include/linux/atomic-fallback.h return atomic64_dec_return(v) == 0; v 2158 include/linux/atomic-fallback.h atomic64_inc_and_test(atomic64_t *v) v 2160 include/linux/atomic-fallback.h return atomic64_inc_return(v) == 0; v 2176 include/linux/atomic-fallback.h atomic64_add_negative(s64 i, atomic64_t *v) v 2178 include/linux/atomic-fallback.h return atomic64_add_return(i, v) < 0; v 2194 include/linux/atomic-fallback.h atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 2196 include/linux/atomic-fallback.h s64 c = atomic64_read(v); v 2201 include/linux/atomic-fallback.h } while (!atomic64_try_cmpxchg(v, &c, c + a)); v 2219 include/linux/atomic-fallback.h atomic64_add_unless(atomic64_t *v, s64 a, s64 u) v 2221 include/linux/atomic-fallback.h return atomic64_fetch_add_unless(v, a, u) != u; v 2235 include/linux/atomic-fallback.h atomic64_inc_not_zero(atomic64_t *v) v 2237 include/linux/atomic-fallback.h return atomic64_add_unless(v, 1, 0); v 2244 include/linux/atomic-fallback.h atomic64_inc_unless_negative(atomic64_t *v) v 2246 include/linux/atomic-fallback.h s64 c = atomic64_read(v); v 2251 include/linux/atomic-fallback.h } while (!atomic64_try_cmpxchg(v, &c, c + 1)); v 2260 include/linux/atomic-fallback.h atomic64_dec_unless_positive(atomic64_t *v) v 2262 include/linux/atomic-fallback.h s64 c = atomic64_read(v); v 2267 include/linux/atomic-fallback.h } while (!atomic64_try_cmpxchg(v, &c, c - 1)); v 2276 include/linux/atomic-fallback.h atomic64_dec_if_positive(atomic64_t *v) v 2278 include/linux/atomic-fallback.h s64 dec, c = atomic64_read(v); v 2284 include/linux/atomic-fallback.h } while (!atomic64_try_cmpxchg(v, &c, dec)); v 2291 include/linux/atomic-fallback.h #define atomic64_cond_read_acquire(v, c) smp_cond_load_acquire(&(v)->counter, (c)) v 2292 include/linux/atomic-fallback.h #define atomic64_cond_read_relaxed(v, c) smp_cond_load_relaxed(&(v)->counter, (c)) v 114 include/linux/bitfield.h static __always_inline __##type type##_encode_bits(base v, base field) \ v 116 include/linux/bitfield.h if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ v 118 include/linux/bitfield.h return to((v & field_mask(field)) * field_multiplier(field)); \ v 130 include/linux/bitfield.h static __always_inline base type##_get_bits(__##type v, base field) \ v 132 include/linux/bitfield.h return (from(v) & field)/field_multiplier(field); \ v 218 include/linux/blk-cgroup.h u64 __blkg_prfill_u64(struct seq_file *sf, struct blkg_policy_data *pd, u64 v); v 223 include/linux/blk-cgroup.h int blkg_print_stat_bytes(struct seq_file *sf, void *v); v 224 include/linux/blk-cgroup.h int blkg_print_stat_ios(struct seq_file *sf, void *v); v 225 include/linux/blk-cgroup.h int blkg_print_stat_bytes_recursive(struct seq_file *sf, void *v); v 226 include/linux/blk-cgroup.h int blkg_print_stat_ios_recursive(struct seq_file *sf, void *v); v 1490 include/linux/blkdev.h typedef struct {struct page *v;} Sector; v 1496 include/linux/blkdev.h put_page(p.v); v 70 include/linux/bug.h static inline __must_check bool check_data_corruption(bool v) { return v; } v 34 include/linux/ccp.h #define CCP_VERSION(v, r) ((unsigned int)((v << CCP_VSIZE) \ v 22 include/linux/ceph/ceph_frag.h static inline __u32 ceph_frag_make(__u32 b, __u32 v) v 25 include/linux/ceph/ceph_frag.h (v & (0xffffffu << (24-b)) & 0xffffffu); v 44 include/linux/ceph/ceph_frag.h static inline bool ceph_frag_contains_value(__u32 f, __u32 v) v 46 include/linux/ceph/ceph_frag.h return (v & ceph_frag_mask(f)) == ceph_frag_value(f); v 21 include/linux/ceph/decode.h u64 v = get_unaligned_le64(*p); v 23 include/linux/ceph/decode.h return v; v 27 include/linux/ceph/decode.h u32 v = get_unaligned_le32(*p); v 29 include/linux/ceph/decode.h return v; v 33 include/linux/ceph/decode.h u16 v = get_unaligned_le16(*p); v 35 include/linux/ceph/decode.h return v; v 39 include/linux/ceph/decode.h u8 v = *(u8 *)*p; v 41 include/linux/ceph/decode.h return v; v 63 include/linux/ceph/decode.h #define ceph_decode_64_safe(p, end, v, bad) \ v 66 include/linux/ceph/decode.h v = ceph_decode_64(p); \ v 68 include/linux/ceph/decode.h #define ceph_decode_32_safe(p, end, v, bad) \ v 71 include/linux/ceph/decode.h v = ceph_decode_32(p); \ v 73 include/linux/ceph/decode.h #define ceph_decode_16_safe(p, end, v, bad) \ v 76 include/linux/ceph/decode.h v = ceph_decode_16(p); \ v 78 include/linux/ceph/decode.h #define ceph_decode_8_safe(p, end, v, bad) \ v 81 include/linux/ceph/decode.h v = ceph_decode_8(p); \ v 245 include/linux/ceph/decode.h static inline void ceph_encode_64(void **p, u64 v) v 247 include/linux/ceph/decode.h put_unaligned_le64(v, (__le64 *)*p); v 250 include/linux/ceph/decode.h static inline void ceph_encode_32(void **p, u32 v) v 252 include/linux/ceph/decode.h put_unaligned_le32(v, (__le32 *)*p); v 255 include/linux/ceph/decode.h static inline void ceph_encode_16(void **p, u16 v) v 257 include/linux/ceph/decode.h put_unaligned_le16(v, (__le16 *)*p); v 260 include/linux/ceph/decode.h static inline void ceph_encode_8(void **p, u8 v) v 262 include/linux/ceph/decode.h *(u8 *)*p = v; v 328 include/linux/ceph/decode.h static inline int ceph_start_decoding(void **p, void *end, u8 v, v 337 include/linux/ceph/decode.h if (v < struct_compat) { v 339 include/linux/ceph/decode.h *struct_v, struct_compat, v, name); v 357 include/linux/ceph/decode.h #define ceph_encode_64_safe(p, end, v, bad) \ v 360 include/linux/ceph/decode.h ceph_encode_64(p, v); \ v 362 include/linux/ceph/decode.h #define ceph_encode_32_safe(p, end, v, bad) \ v 365 include/linux/ceph/decode.h ceph_encode_32(p, v); \ v 367 include/linux/ceph/decode.h #define ceph_encode_16_safe(p, end, v, bad) \ v 370 include/linux/ceph/decode.h ceph_encode_16(p, v); \ v 372 include/linux/ceph/decode.h #define ceph_encode_8_safe(p, end, v, bad) \ v 375 include/linux/ceph/decode.h ceph_encode_8(p, v); \ v 42 include/linux/ceph/pagelist.h static inline int ceph_pagelist_encode_64(struct ceph_pagelist *pl, u64 v) v 44 include/linux/ceph/pagelist.h __le64 ev = cpu_to_le64(v); v 47 include/linux/ceph/pagelist.h static inline int ceph_pagelist_encode_32(struct ceph_pagelist *pl, u32 v) v 49 include/linux/ceph/pagelist.h __le32 ev = cpu_to_le32(v); v 52 include/linux/ceph/pagelist.h static inline int ceph_pagelist_encode_16(struct ceph_pagelist *pl, u16 v) v 54 include/linux/ceph/pagelist.h __le16 ev = cpu_to_le16(v); v 57 include/linux/ceph/pagelist.h static inline int ceph_pagelist_encode_8(struct ceph_pagelist *pl, u8 v) v 59 include/linux/ceph/pagelist.h return ceph_pagelist_append(pl, &v, 1); v 588 include/linux/cgroup-defs.h int (*seq_show)(struct seq_file *sf, void *v); v 592 include/linux/cgroup-defs.h void *(*seq_next)(struct seq_file *sf, void *v, loff_t *ppos); v 593 include/linux/cgroup-defs.h void (*seq_stop)(struct seq_file *sf, void *v); v 135 include/linux/cgroup.h int cgroup_parse_float(const char *input, unsigned dec_shift, s64 *v); v 830 include/linux/cgroup.h unsigned long v; v 836 include/linux/cgroup.h v = READ_ONCE(skcd->val); v 838 include/linux/cgroup.h if (v & 1) v 841 include/linux/cgroup.h return (struct cgroup *)(unsigned long)v ?: &cgrp_dfl_root.cgrp; v 45 include/linux/compat.h #define __SC_DELOUSE(t,v) ((__force t)(unsigned long)(v)) v 458 include/linux/compat.h compat_sigset_t v; v 460 include/linux/compat.h case 4: v.sig[7] = (set->sig[3] >> 32); v.sig[6] = set->sig[3]; v 462 include/linux/compat.h case 3: v.sig[5] = (set->sig[2] >> 32); v.sig[4] = set->sig[2]; v 464 include/linux/compat.h case 2: v.sig[3] = (set->sig[1] >> 32); v.sig[2] = set->sig[1]; v 466 include/linux/compat.h case 1: v.sig[1] = (set->sig[0] >> 32); v.sig[0] = set->sig[0]; v 468 include/linux/compat.h return copy_to_user(compat, &v, size) ? -EFAULT : 0; v 32 include/linux/crush/mapper.h void crush_init_workspace(const struct crush_map *map, void *v); v 621 include/linux/dma-mapping.h #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) v 622 include/linux/dma-mapping.h #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) v 154 include/linux/fb.h extern int fb_notifier_call_chain(unsigned long val, void *v); v 166 include/linux/fb.h static inline int fb_notifier_call_chain(unsigned long val, void *v) v 55 include/linux/file.h static inline struct fd __to_fd(unsigned long v) v 57 include/linux/file.h return (struct fd){(struct file *)(v & ~3),v & 3}; v 432 include/linux/filter.h #define __BPF_MAP_0(m, v, ...) v v 433 include/linux/filter.h #define __BPF_MAP_1(m, v, t, a, ...) m(t, a) v 434 include/linux/filter.h #define __BPF_MAP_2(m, v, t, a, ...) m(t, a), __BPF_MAP_1(m, v, __VA_ARGS__) v 435 include/linux/filter.h #define __BPF_MAP_3(m, v, t, a, ...) m(t, a), __BPF_MAP_2(m, v, __VA_ARGS__) v 436 include/linux/filter.h #define __BPF_MAP_4(m, v, t, a, ...) m(t, a), __BPF_MAP_3(m, v, __VA_ARGS__) v 437 include/linux/filter.h #define __BPF_MAP_5(m, v, t, a, ...) m(t, a), __BPF_MAP_4(m, v, __VA_ARGS__) v 80 include/linux/fixp-arith.h #define fixp_cos32(v) fixp_sin32((v) + 90) v 88 include/linux/fixp-arith.h #define fixp_sin16(v) (fixp_sin32(v) >> 16) v 89 include/linux/fixp-arith.h #define fixp_cos16(v) (fixp_cos32(v) >> 16) v 38 include/linux/fsi.h #define FSI_DEVICE_VERSIONED(t, v) \ v 39 include/linux/fsi.h .engine_type = (t), .version = (v), v 43 include/linux/greybus.h #define GREYBUS_DEVICE(v, p) \ v 45 include/linux/greybus.h .vendor = (v), \ v 167 include/linux/hugetlb.h #define follow_hugetlb_page(m,v,p,vs,a,b,i,w,n) ({ BUG(); 0; }) v 986 include/linux/ide.h int ide_capacity_proc_show(struct seq_file *m, void *v); v 987 include/linux/ide.h int ide_geometry_proc_show(struct seq_file *m, void *v); v 62 include/linux/ieee802154.h #define IEEE802154_FC_SET_TYPE(v, x) do { \ v 63 include/linux/ieee802154.h v = (((v) & ~IEEE802154_FC_TYPE_MASK) | \ v 122 include/linux/intel-iommu.h #define dmar_writeq(a,v) writeq(v,a) v 124 include/linux/intel-iommu.h #define dmar_writel(a, v) writel(v, a) v 126 include/linux/intel-iommu.h #define DMAR_VER_MAJOR(v) (((v) & 0xf0) >> 4) v 127 include/linux/intel-iommu.h #define DMAR_VER_MINOR(v) ((v) & 0x0f) v 739 include/linux/interrupt.h int show_interrupts(struct seq_file *p, void *v); v 171 include/linux/ipmi_smi.h #define ipmi_version_major(v) ((v)->ipmi_version & 0xf) v 172 include/linux/ipmi_smi.h #define ipmi_version_minor(v) ((v)->ipmi_version >> 4) v 239 include/linux/kernfs.h int (*seq_show)(struct seq_file *sf, void *v); v 242 include/linux/kernfs.h void *(*seq_next)(struct seq_file *sf, void *v, loff_t *ppos); v 243 include/linux/kernfs.h void (*seq_stop)(struct seq_file *sf, void *v); v 93 include/linux/memory.h static inline int memory_notify(unsigned long val, void *v) v 104 include/linux/memory.h static inline int memory_isolate_notify(unsigned long val, void *v) v 116 include/linux/memory.h extern int memory_notify(unsigned long val, void *v); v 117 include/linux/memory.h extern int memory_isolate_notify(unsigned long val, void *v); v 53 include/linux/mempolicy.h } v; v 73 include/linux/mlx5/device.h #define MLX5_SET(typ, p, fld, v) do { \ v 74 include/linux/mlx5/device.h u32 _v = v; \ v 82 include/linux/mlx5/device.h #define MLX5_ARRAY_SET(typ, p, fld, idx, v) do { \ v 84 include/linux/mlx5/device.h MLX5_SET(typ, p, fld[idx], v); \ v 105 include/linux/mlx5/device.h #define __MLX5_SET64(typ, p, fld, v) do { \ v 107 include/linux/mlx5/device.h *((__be64 *)(p) + __mlx5_64_off(typ, fld)) = cpu_to_be64(v); \ v 110 include/linux/mlx5/device.h #define MLX5_SET64(typ, p, fld, v) do { \ v 112 include/linux/mlx5/device.h __MLX5_SET64(typ, p, fld, v); \ v 115 include/linux/mlx5/device.h #define MLX5_ARRAY_SET64(typ, p, fld, idx, v) do { \ v 117 include/linux/mlx5/device.h __MLX5_SET64(typ, p, fld[idx], v); \ v 132 include/linux/mlx5/device.h #define MLX5_SET16(typ, p, fld, v) do { \ v 133 include/linux/mlx5/device.h u16 _v = v; \ v 238 include/linux/mm_types.h #define set_page_private(page, v) ((page)->private = (v)) v 63 include/linux/mpi.h int mpi_cmp_ui(MPI u, ulong v); v 64 include/linux/mpi.h int mpi_cmp(MPI u, MPI v); v 263 include/linux/mroute_base.h void vif_device_init(struct vif_device *v, v 309 include/linux/mroute_base.h static inline void vif_device_init(struct vif_device *v, v 390 include/linux/mroute_base.h void *mr_vif_seq_next(struct seq_file *seq, void *v, loff_t *pos); v 404 include/linux/mroute_base.h void *mr_mfc_seq_next(struct seq_file *seq, void *v, v 421 include/linux/mroute_base.h static inline void mr_mfc_seq_stop(struct seq_file *seq, void *v) v 439 include/linux/mroute_base.h void *v, loff_t *pos) v 455 include/linux/mroute_base.h static inline void *mr_mfc_seq_next(struct seq_file *seq, void *v, v 467 include/linux/mroute_base.h static inline void mr_mfc_seq_stop(struct seq_file *seq, void *v) v 164 include/linux/mtd/onenand.h #define ONENAND_SET_SYS_CFG1(v, this) \ v 165 include/linux/mtd/onenand.h (this->write_word(v, this->base + ONENAND_REG_SYS_CFG1)) v 167 include/linux/notifier.h unsigned long val, void *v); v 169 include/linux/notifier.h unsigned long val, void *v, int nr_to_call, int *nr_calls); v 171 include/linux/notifier.h unsigned long val, void *v); v 173 include/linux/notifier.h unsigned long val, void *v, int nr_to_call, int *nr_calls); v 175 include/linux/notifier.h unsigned long val, void *v); v 177 include/linux/notifier.h unsigned long val, void *v, int nr_to_call, int *nr_calls); v 179 include/linux/notifier.h unsigned long val, void *v); v 181 include/linux/notifier.h unsigned long val, void *v, int nr_to_call, int *nr_calls); v 29 include/linux/page_ref.h extern void __page_ref_set(struct page *page, int v); v 30 include/linux/page_ref.h extern void __page_ref_mod(struct page *page, int v); v 31 include/linux/page_ref.h extern void __page_ref_mod_and_test(struct page *page, int v, int ret); v 32 include/linux/page_ref.h extern void __page_ref_mod_and_return(struct page *page, int v, int ret); v 33 include/linux/page_ref.h extern void __page_ref_mod_unless(struct page *page, int v, int u); v 34 include/linux/page_ref.h extern void __page_ref_freeze(struct page *page, int v, int ret); v 35 include/linux/page_ref.h extern void __page_ref_unfreeze(struct page *page, int v); v 41 include/linux/page_ref.h static inline void __page_ref_set(struct page *page, int v) v 44 include/linux/page_ref.h static inline void __page_ref_mod(struct page *page, int v) v 47 include/linux/page_ref.h static inline void __page_ref_mod_and_test(struct page *page, int v, int ret) v 50 include/linux/page_ref.h static inline void __page_ref_mod_and_return(struct page *page, int v, int ret) v 53 include/linux/page_ref.h static inline void __page_ref_mod_unless(struct page *page, int v, int u) v 56 include/linux/page_ref.h static inline void __page_ref_freeze(struct page *page, int v, int ret) v 59 include/linux/page_ref.h static inline void __page_ref_unfreeze(struct page *page, int v) v 75 include/linux/page_ref.h static inline void set_page_count(struct page *page, int v) v 77 include/linux/page_ref.h atomic_set(&page->_refcount, v); v 79 include/linux/page_ref.h __page_ref_set(page, v); v 495 include/linux/parport.h #define parport_frob_control(p,m,v) parport_pc_frob_control(p,m,v) v 509 include/linux/parport.h #define parport_frob_control(p,m,v) (p)->ops->frob_control(p,m,v) v 3116 include/linux/platform_data/cros_ec_commands.h int32_t v; /* In nV */ v 11 include/linux/platform_data/mcs.h #define MCS_KEY_MAP(v, c) ((((v) & 0xff) << 16) | ((c) & 0xffff)) v 12 include/linux/platform_data/mcs.h #define MCS_KEY_VAL(v) (((v) >> 16) & 0xff) v 13 include/linux/platform_data/mcs.h #define MCS_KEY_CODE(v) ((v) & 0xffff) v 125 include/linux/poll.h #define __MAP(v, from, to) \ v 126 include/linux/poll.h (from < to ? (v & from) * (to/from) : (v & from) / (from/to)) v 130 include/linux/poll.h __u16 v = (__force __u16)val; v 131 include/linux/poll.h #define M(X) __MAP(v, (__force __u16)EPOLL##X, POLL##X) v 170 include/linux/random.h static inline bool arch_get_random_long(unsigned long *v) v 174 include/linux/random.h static inline bool arch_get_random_int(unsigned int *v) v 182 include/linux/random.h static inline bool arch_get_random_seed_long(unsigned long *v) v 186 include/linux/random.h static inline bool arch_get_random_seed_int(unsigned int *v) v 341 include/linux/rcupdate.h #define RCU_INITIALIZER(v) (typeof(*(v)) __force __rcu *)(v) v 374 include/linux/rcupdate.h #define rcu_assign_pointer(p, v) \ v 376 include/linux/rcupdate.h uintptr_t _r_a_p__v = (uintptr_t)(v); \ v 379 include/linux/rcupdate.h if (__builtin_constant_p(v) && (_r_a_p__v) == (uintptr_t)NULL) \ v 778 include/linux/rcupdate.h #define RCU_INIT_POINTER(p, v) \ v 781 include/linux/rcupdate.h WRITE_ONCE(p, RCU_INITIALIZER(v)); \ v 791 include/linux/rcupdate.h #define RCU_POINTER_INITIALIZER(p, v) \ v 792 include/linux/rcupdate.h .p = RCU_INITIALIZER(v) v 20 include/linux/selection.h extern int set_selection_kernel(struct tiocl_selection *v, v 34 include/linux/seq_file.h void (*stop) (struct seq_file *m, void *v); v 35 include/linux/seq_file.h void * (*next) (struct seq_file *m, void *v, loff_t *pos); v 36 include/linux/seq_file.h int (*show) (struct seq_file *m, void *v); v 127 include/linux/seq_file.h unsigned long long v, unsigned int width); v 217 include/linux/seq_file.h extern struct list_head *seq_list_next(void *v, struct list_head *head, v 228 include/linux/seq_file.h extern struct hlist_node *seq_hlist_next(void *v, struct hlist_head *head, v 235 include/linux/seq_file.h extern struct hlist_node *seq_hlist_next_rcu(void *v, v 242 include/linux/seq_file.h extern struct hlist_node *seq_hlist_next_percpu(void *v, struct hlist_head __percpu *head, int *cpu, loff_t *pos); v 179 include/linux/serial_8250.h extern void serial8250_set_isa_configurator(void (*v) v 79 include/linux/soc/qcom/apr.h #define APR_SVC_MAJOR_VERSION(v) ((v >> 16) & 0xFF) v 80 include/linux/soc/qcom/apr.h #define APR_SVC_MINOR_VERSION(v) (v & 0xFF) v 58 include/linux/spi/mxs-spi.h #define BF_SSP_TIMING_CLOCK_DIVIDE(v) \ v 59 include/linux/spi/mxs-spi.h (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE) v 62 include/linux/spi/mxs-spi.h #define BF_SSP_TIMING_CLOCK_RATE(v) \ v 63 include/linux/spi/mxs-spi.h (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE) v 86 include/linux/spi/mxs-spi.h #define BF_SSP_CTRL1_WORD_LENGTH(v) \ v 87 include/linux/spi/mxs-spi.h (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH) v 93 include/linux/spi/mxs-spi.h #define BF_SSP_CTRL1_SSP_MODE(v) \ v 94 include/linux/spi/mxs-spi.h (((v) << 0) & BM_SSP_CTRL1_SSP_MODE) v 19 include/linux/ssbi.h u8 v; v 21 include/linux/ssbi.h ret = ssbi_read(context, reg, &v, 1); v 23 include/linux/ssbi.h *val = v; v 31 include/linux/ssbi.h u8 v = val; v 32 include/linux/ssbi.h return ssbi_write(context, reg, &v, 1); v 121 include/linux/string.h static inline void *memset_l(unsigned long *p, unsigned long v, v 125 include/linux/string.h return memset32((uint32_t *)p, v, n); v 127 include/linux/string.h return memset64((uint64_t *)p, v, n); v 130 include/linux/string.h static inline void *memset_p(void **p, void *v, __kernel_size_t n) v 133 include/linux/string.h return memset32((uint32_t *)p, (uintptr_t)v, n); v 135 include/linux/string.h return memset64((uint64_t *)p, (uintptr_t)v, n); v 117 include/linux/syscalls.h #define __TYPE_AS(t, v) __same_type((__force t)0, v) v 72 include/linux/torture.h bool torture_init_begin(char *ttype, int v); v 796 include/linux/usb/gadget.h static inline void usb_free_descriptors(struct usb_descriptor_header **v) v 798 include/linux/usb/gadget.h kfree(v); v 133 include/linux/user_namespace.h extern int proc_setgroups_show(struct seq_file *m, void *v); v 50 include/linux/virtio_ring.h __virtio16 *p, __virtio16 v) v 53 include/linux/virtio_ring.h virt_store_mb(*p, v); v 55 include/linux/virtio_ring.h WRITE_ONCE(*p, v); v 335 include/linux/vmw_vmci_defs.h #define VMCI_VERSION_MAJOR(v) ((u32) (v) >> VMCI_VERSION_SHIFT_WIDTH) v 336 include/linux/vmw_vmci_defs.h #define VMCI_VERSION_MINOR(v) ((u16) (v)) v 14 include/linux/win_minmax.h u32 v; /* value measured */ v 24 include/linux/win_minmax.h return m->s[0].v; v 29 include/linux/win_minmax.h struct minmax_sample val = { .t = t, .v = meas }; v 32 include/linux/win_minmax.h return m->s[0].v; v 52 include/linux/xarray.h static inline void *xa_mk_value(unsigned long v) v 54 include/linux/xarray.h WARN_ON((long)v < 0); v 55 include/linux/xarray.h return (void *)((v << 1) | 1); v 143 include/linux/xarray.h static inline void *xa_mk_internal(unsigned long v) v 145 include/linux/xarray.h return (void *)((v << 2) | 2); v 62 include/media/drv-intf/tea575x.h int snd_tea575x_g_tuner(struct snd_tea575x *tea, struct v4l2_tuner *v); v 291 include/net/addrconf.h int inet6addr_notifier_call_chain(unsigned long val, void *v); v 295 include/net/addrconf.h int inet6addr_validator_notifier_call_chain(unsigned long val, void *v); v 18 include/net/dcbevent.h int call_dcbevent_notifiers(unsigned long val, void *v); v 31 include/net/dcbevent.h static inline int call_dcbevent_notifiers(unsigned long val, void *v) v 637 include/net/dsa.h #define BRCM_TAG_GET_PORT(v) ((v) >> 8) v 638 include/net/dsa.h #define BRCM_TAG_GET_QUEUE(v) ((v) & 0xff) v 663 include/net/ipv6.h u32 v = (__force u32)a->s6_addr32[0] ^ (__force u32)a->s6_addr32[1]; v 665 include/net/ipv6.h return jhash_3words(v, v 36 include/net/netevent.h int call_netevent_notifiers(unsigned long val, void *v); v 324 include/net/netfilter/nf_conntrack.h #define NF_CT_STAT_ADD_ATOMIC(net, count, v) this_cpu_add((net)->ct.stat->count, (v)) v 1043 include/net/netfilter/nf_tables.h const struct nft_verdict *v); v 83 include/net/ping.h void *ping_seq_next(struct seq_file *seq, void *v, loff_t *pos); v 84 include/net/ping.h void ping_seq_stop(struct seq_file *seq, void *v); v 54 include/net/raw.h void *raw_seq_next(struct seq_file *seq, void *v, loff_t *pos); v 55 include/net/raw.h void raw_seq_stop(struct seq_file *seq, void *v); v 160 include/net/red.h static inline void red_set_vars(struct red_vars *v) v 166 include/net/red.h v->qavg = 0; v 168 include/net/red.h v->qcount = -1; v 220 include/net/red.h static inline int red_is_idling(const struct red_vars *v) v 222 include/net/red.h return v->qidlestart != 0; v 225 include/net/red.h static inline void red_start_of_idle_period(struct red_vars *v) v 227 include/net/red.h v->qidlestart = ktime_get(); v 230 include/net/red.h static inline void red_end_of_idle_period(struct red_vars *v) v 232 include/net/red.h v->qidlestart = 0; v 235 include/net/red.h static inline void red_restart(struct red_vars *v) v 237 include/net/red.h red_end_of_idle_period(v); v 238 include/net/red.h v->qavg = 0; v 239 include/net/red.h v->qcount = -1; v 243 include/net/red.h const struct red_vars *v) v 245 include/net/red.h s64 delta = ktime_us_delta(ktime_get(), v->qidlestart); v 272 include/net/red.h return v->qavg >> shift; v 281 include/net/red.h us_idle = (v->qavg * (u64)us_idle) >> p->Scell_log; v 283 include/net/red.h if (us_idle < (v->qavg >> 1)) v 284 include/net/red.h return v->qavg - us_idle; v 286 include/net/red.h return v->qavg >> 1; v 291 include/net/red.h const struct red_vars *v, v 303 include/net/red.h return v->qavg + (backlog - (v->qavg >> p->Wlog)); v 307 include/net/red.h const struct red_vars *v, v 310 include/net/red.h if (!red_is_idling(v)) v 311 include/net/red.h return red_calc_qavg_no_idle_time(p, v, backlog); v 313 include/net/red.h return red_calc_qavg_from_idle_time(p, v); v 323 include/net/red.h const struct red_vars *v, v 342 include/net/red.h return !(((qavg - p->qth_min) >> p->Wlog) * v->qcount < v->qR); v 368 include/net/red.h struct red_vars *v, v 373 include/net/red.h v->qcount = -1; v 377 include/net/red.h if (++v->qcount) { v 378 include/net/red.h if (red_mark_probability(p, v, qavg)) { v 379 include/net/red.h v->qcount = 0; v 380 include/net/red.h v->qR = red_random(p); v 384 include/net/red.h v->qR = red_random(p); v 389 include/net/red.h v->qcount = -1; v 397 include/net/red.h static inline void red_adaptative_algo(struct red_parms *p, struct red_vars *v) v 402 include/net/red.h qavg = v->qavg; v 403 include/net/red.h if (red_is_idling(v)) v 404 include/net/red.h qavg = red_calc_qavg_from_idle_time(p, v); v 432 include/net/sctp/sctp.h for (pos.v = chunk->member;\ v 433 include/net/sctp/sctp.h (pos.v + offsetof(struct sctp_paramhdr, length) + sizeof(pos.p->length) <=\ v 435 include/net/sctp/sctp.h pos.v <= (void *)chunk + end - ntohs(pos.p->length) &&\ v 437 include/net/sctp/sctp.h pos.v += SCTP_PAD4(ntohs(pos.p->length))) v 352 include/net/sctp/structs.h void *v; v 591 include/net/sctp/structs.h __u8 *v; v 1853 include/net/sock.h u32 v = prandom_u32(); v 1855 include/net/sock.h return v ?: 1; v 2293 include/net/sock.h int v = waitall ? len : min_t(int, READ_ONCE(sk->sk_rcvlowat), len); v 2295 include/net/sock.h return v ?: 1; v 1904 include/net/tcp.h void *tcp_seq_next(struct seq_file *seq, void *v, loff_t *pos); v 1905 include/net/tcp.h void tcp_seq_stop(struct seq_file *seq, void *v); v 446 include/net/udp.h void *udp_seq_next(struct seq_file *seq, void *v, loff_t *pos); v 447 include/net/udp.h void udp_seq_stop(struct seq_file *seq, void *v); v 1948 include/net/xfrm.h m->v = m->m = 0; v 1950 include/net/xfrm.h return m->v & m->m; v 1957 include/net/xfrm.h if (m->m | m->v) v 1966 include/net/xfrm.h return (m->v & m->m) | (mark & ~m->m); v 920 include/rdma/rdmavt_qp.h void (*cb)(struct rvt_qp *qp, u64 v); v 922 include/rdma/rdmavt_qp.h u64 v; v 1012 include/rdma/rdmavt_qp.h u64 v, v 1013 include/rdma/rdmavt_qp.h void (*cb)(struct rvt_qp *qp, u64 v)); v 1016 include/rdma/rdmavt_qp.h u64 v, v 1017 include/rdma/rdmavt_qp.h void (*cb)(struct rvt_qp *qp, u64 v)); v 55 include/scsi/fc/fc_fip.h #define FIP_VER_ENCAPS(v) ((v) << FIP_VER_SHIFT) v 56 include/scsi/fc/fc_fip.h #define FIP_VER_DECAPS(v) ((v) >> FIP_VER_SHIFT) v 31 include/scsi/fc_frame.h static inline void hton24(u8 *p, u32 v) v 33 include/scsi/fc_frame.h p[0] = (v >> 16) & 0xff; v 34 include/scsi/fc_frame.h p[1] = (v >> 8) & 0xff; v 35 include/scsi/fc_frame.h p[2] = v & 0xff; v 58 include/scsi/iscsi_proto.h #define hton24(p, v) { \ v 59 include/scsi/iscsi_proto.h p[0] = (((v) >> 16) & 0xFF); \ v 60 include/scsi/iscsi_proto.h p[1] = (((v) >> 8) & 0xFF); \ v 61 include/scsi/iscsi_proto.h p[2] = ((v) & 0xFF); \ v 255 include/scsi/scsi_transport_fc.h #define vport_to_shost(v) \ v 256 include/scsi/scsi_transport_fc.h (v->shost) v 257 include/scsi/scsi_transport_fc.h #define vport_to_shost_channel(v) \ v 258 include/scsi/scsi_transport_fc.h (v->channel) v 259 include/scsi/scsi_transport_fc.h #define vport_to_parent(v) \ v 260 include/scsi/scsi_transport_fc.h (v->dev.parent) v 14 include/soc/arc/aux.h #define write_aux_reg(r, v) __builtin_arc_sr((unsigned int)(v), r) v 27 include/soc/arc/aux.h static inline void write_aux_reg(u32 r, u32 v) v 271 include/soc/fsl/qman.h #define qm_fqid_set(p, v) ((p)->fqid = cpu_to_be32((v) & QM_FQID_MASK)) v 855 include/soc/fsl/qman.h #define QM_MCR_NP_RA1_NRA(v) (((v) >> 14) & 0x3) /* FQD::NRA */ v 856 include/soc/fsl/qman.h #define QM_MCR_NP_RA2_IT(v) (((v) >> 14) & 0x1) /* FQD::IT */ v 857 include/soc/fsl/qman.h #define QM_MCR_NP_OD1_NOD(v) (((v) >> 14) & 0x3) /* FQD::NOD */ v 858 include/soc/fsl/qman.h #define QM_MCR_NP_OD3_NPC(v) (((v) >> 14) & 0x3) /* FQD::NPC */ v 62 include/soc/nps/common.h #define write_aux_reg(r, v) v 46 include/sound/aess.h u32 v; v 49 include/sound/aess.h v = 1 << AESS_AUTO_GATING_ENABLE_SHIFT; v 50 include/sound/aess.h writel(v, base + AESS_AUTO_GATING_ENABLE_OFFSET); v 958 include/sound/pcm.h int snd_interval_refine(struct snd_interval *i, const struct snd_interval *v); v 105 include/sound/pcm_params.h unsigned int v; v 106 include/sound/pcm_params.h v = mask->bits[MASK_OFS(val)] & MASK_BIT(val); v 108 include/sound/pcm_params.h mask->bits[MASK_OFS(val)] = v; v 112 include/sound/pcm_params.h const struct snd_mask *v) v 116 include/sound/pcm_params.h mask->bits[i] &= v->bits[i]; v 120 include/sound/pcm_params.h const struct snd_mask *v) v 122 include/sound/pcm_params.h return ! memcmp(mask, v, SNDRV_MASK_SIZE * sizeof(u_int32_t)); v 126 include/sound/pcm_params.h const struct snd_mask *v) v 128 include/sound/pcm_params.h *mask = *v; v 152 include/sound/pcm_params.h const struct snd_mask *v) v 156 include/sound/pcm_params.h snd_mask_intersect(mask, v); v 259 include/sound/pcm_params.h unsigned int v; v 260 include/sound/pcm_params.h v = i->max; v 262 include/sound/pcm_params.h v--; v 263 include/sound/pcm_params.h return v; v 25 include/sound/soundfont.h struct soundfont_voice_info v; /* All the soundfont parameters */ v 35 include/sound/soundfont.h struct soundfont_sample_info v; v 929 include/target/target_core_base.h static inline void atomic_inc_mb(atomic_t *v) v 932 include/target/target_core_base.h atomic_inc(v); v 936 include/target/target_core_base.h static inline void atomic_dec_mb(atomic_t *v) v 939 include/target/target_core_base.h atomic_dec(v); v 15 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v), v 17 include/trace/events/page_ref.h TP_ARGS(page, v), v 36 include/trace/events/page_ref.h __entry->val = v; v 49 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v), v 51 include/trace/events/page_ref.h TP_ARGS(page, v) v 56 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v), v 58 include/trace/events/page_ref.h TP_ARGS(page, v) v 63 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v, int ret), v 65 include/trace/events/page_ref.h TP_ARGS(page, v, ret), v 85 include/trace/events/page_ref.h __entry->val = v; v 99 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v, int ret), v 101 include/trace/events/page_ref.h TP_ARGS(page, v, ret) v 106 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v, int ret), v 108 include/trace/events/page_ref.h TP_ARGS(page, v, ret) v 113 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v, int ret), v 115 include/trace/events/page_ref.h TP_ARGS(page, v, ret) v 120 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v, int ret), v 122 include/trace/events/page_ref.h TP_ARGS(page, v, ret) v 127 include/trace/events/page_ref.h TP_PROTO(struct page *page, int v), v 129 include/trace/events/page_ref.h TP_ARGS(page, v) v 520 include/uapi/drm/drm_fourcc.h #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) \ v 521 include/uapi/drm/drm_fourcc.h fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf)) v 598 include/uapi/drm/drm_fourcc.h #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ v 599 include/uapi/drm/drm_fourcc.h fourcc_mod_broadcom_code(2, v) v 600 include/uapi/drm/drm_fourcc.h #define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) \ v 601 include/uapi/drm/drm_fourcc.h fourcc_mod_broadcom_code(3, v) v 602 include/uapi/drm/drm_fourcc.h #define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) \ v 603 include/uapi/drm/drm_fourcc.h fourcc_mod_broadcom_code(4, v) v 604 include/uapi/drm/drm_fourcc.h #define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) \ v 605 include/uapi/drm/drm_fourcc.h fourcc_mod_broadcom_code(5, v) v 225 include/uapi/drm/exynos_drm.h struct drm_exynos_ipp_limit_val v; v 15 include/uapi/linux/bcache.h static inline void SET_##name(type *k, __u64 v) \ v 18 include/uapi/linux/bcache.h k->field |= (v & ~(~0ULL << size)) << offset; \ v 36 include/uapi/linux/bcache.h static inline void SET_##name(struct bkey *k, unsigned int i, __u64 v) \ v 39 include/uapi/linux/bcache.h k->ptr[i] |= (v & ~(~0ULL << size)) << offset; \ v 61 include/uapi/linux/bcache.h static inline void SET_KEY_OFFSET(struct bkey *k, __u64 v) v 63 include/uapi/linux/bcache.h k->low = v; v 53 include/uapi/linux/coff.h #define COFF_LONG(v) COFF_LONG_L(v) v 54 include/uapi/linux/coff.h #define COFF_SHORT(v) COFF_SHORT_L(v) v 727 include/uapi/linux/firewire-cdev.h #define FW_CDEV_ISO_PAYLOAD_LENGTH(v) (v) v 731 include/uapi/linux/firewire-cdev.h #define FW_CDEV_ISO_TAG(v) ((v) << 18) v 732 include/uapi/linux/firewire-cdev.h #define FW_CDEV_ISO_SY(v) ((v) << 20) v 733 include/uapi/linux/firewire-cdev.h #define FW_CDEV_ISO_HEADER_LENGTH(v) ((v) << 24) v 45 include/uapi/linux/keyboard.h #define K(t,v) (((t)<<8)|(v)) v 22 include/uapi/linux/msdos_fs.h #define CF_LE_W(v) le16_to_cpu(v) v 23 include/uapi/linux/msdos_fs.h #define CF_LE_L(v) le32_to_cpu(v) v 24 include/uapi/linux/msdos_fs.h #define CT_LE_W(v) cpu_to_le16(v) v 25 include/uapi/linux/msdos_fs.h #define CT_LE_L(v) cpu_to_le32(v) v 654 include/uapi/linux/pkt_cls.h #define TCF_EM_REL_VALID(v) (((v) & TCF_EM_REL_MASK) != TCF_EM_REL_MASK) v 56 include/uapi/linux/ppp-comp.h #define BSD_MAKE_OPT(v, n) (((v) << 5) | (n)) v 318 include/uapi/linux/xfrm.h __u32 v; /* value */ v 83 include/video/gbe.h #define GET(v, msb, lsb) \ v 84 include/video/gbe.h ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) ) v 85 include/video/gbe.h #define SET(v, f, msb, lsb) \ v 86 include/video/gbe.h ( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) ) v 88 include/video/gbe.h #define GET_GBE_FIELD(reg, field, v) \ v 89 include/video/gbe.h GET((v), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB) v 90 include/video/gbe.h #define SET_GBE_FIELD(reg, field, v, f) \ v 91 include/video/gbe.h SET((v), (f), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB) v 228 include/video/tgafb.h TGA_WRITE_REG(struct tga_par *par, u32 v, u32 r) v 230 include/video/tgafb.h writel(v, par->tga_regs_base +r); v 240 include/video/tgafb.h BT485_WRITE(struct tga_par *par, u8 v, u8 r) v 243 include/video/tgafb.h TGA_WRITE_REG(par, v | (r << 8), TGA_RAMDAC_REG); v 256 include/video/tgafb.h BT463_WRITE(struct tga_par *par, u32 m, u16 a, u8 v) v 260 include/video/tgafb.h TGA_WRITE_REG(par, m << 10 | v, TGA_RAMDAC_REG); v 273 include/video/tgafb.h BT459_WRITE(struct tga_par *par, u32 m, u16 a, u8 v) v 277 include/video/tgafb.h TGA_WRITE_REG(par, v, TGA_RAMDAC_REG); v 167 include/video/vga.h #define VGA_OUT16VAL(v, r) (((v) << 8) | (r)) v 79 include/xen/arm/page.h #define virt_to_gfn(v) (pfn_to_gfn(virt_to_phys(v) >> XEN_PAGE_SHIFT)) v 130 include/xen/interface/vcpu.h struct vcpu_runstate_info *v; v 217 include/xen/interface/vcpu.h struct pvclock_vcpu_time_info *v; v 41 ipc/compat.c struct compat_ipc64_perm v; v 42 ipc/compat.c if (copy_from_user(&v, from, sizeof(v))) v 44 ipc/compat.c to->uid = v.uid; v 45 ipc/compat.c to->gid = v.gid; v 46 ipc/compat.c to->mode = v.mode; v 53 ipc/compat.c struct compat_ipc_perm v; v 54 ipc/compat.c if (copy_from_user(&v, from, sizeof(v))) v 56 ipc/compat.c to->uid = v.uid; v 57 ipc/compat.c to->gid = v.gid; v 58 ipc/compat.c to->mode = v.mode; v 1450 ipc/mqueue.c struct compat_mq_attr v; v 1452 ipc/mqueue.c if (copy_from_user(&v, uattr, sizeof(*uattr))) v 1456 ipc/mqueue.c attr->mq_flags = v.mq_flags; v 1457 ipc/mqueue.c attr->mq_maxmsg = v.mq_maxmsg; v 1458 ipc/mqueue.c attr->mq_msgsize = v.mq_msgsize; v 1459 ipc/mqueue.c attr->mq_curmsgs = v.mq_curmsgs; v 1466 ipc/mqueue.c struct compat_mq_attr v; v 1468 ipc/mqueue.c memset(&v, 0, sizeof(v)); v 1469 ipc/mqueue.c v.mq_flags = attr->mq_flags; v 1470 ipc/mqueue.c v.mq_maxmsg = attr->mq_maxmsg; v 1471 ipc/mqueue.c v.mq_msgsize = attr->mq_msgsize; v 1472 ipc/mqueue.c v.mq_curmsgs = attr->mq_curmsgs; v 1473 ipc/mqueue.c if (copy_to_user(uattr, &v, sizeof(*uattr))) v 674 ipc/msg.c struct compat_msqid64_ds v; v 675 ipc/msg.c memset(&v, 0, sizeof(v)); v 676 ipc/msg.c to_compat_ipc64_perm(&v.msg_perm, &in->msg_perm); v 677 ipc/msg.c v.msg_stime = lower_32_bits(in->msg_stime); v 678 ipc/msg.c v.msg_stime_high = upper_32_bits(in->msg_stime); v 679 ipc/msg.c v.msg_rtime = lower_32_bits(in->msg_rtime); v 680 ipc/msg.c v.msg_rtime_high = upper_32_bits(in->msg_rtime); v 681 ipc/msg.c v.msg_ctime = lower_32_bits(in->msg_ctime); v 682 ipc/msg.c v.msg_ctime_high = upper_32_bits(in->msg_ctime); v 683 ipc/msg.c v.msg_cbytes = in->msg_cbytes; v 684 ipc/msg.c v.msg_qnum = in->msg_qnum; v 685 ipc/msg.c v.msg_qbytes = in->msg_qbytes; v 686 ipc/msg.c v.msg_lspid = in->msg_lspid; v 687 ipc/msg.c v.msg_lrpid = in->msg_lrpid; v 688 ipc/msg.c return copy_to_user(buf, &v, sizeof(v)); v 690 ipc/msg.c struct compat_msqid_ds v; v 691 ipc/msg.c memset(&v, 0, sizeof(v)); v 692 ipc/msg.c to_compat_ipc_perm(&v.msg_perm, &in->msg_perm); v 693 ipc/msg.c v.msg_stime = in->msg_stime; v 694 ipc/msg.c v.msg_rtime = in->msg_rtime; v 695 ipc/msg.c v.msg_ctime = in->msg_ctime; v 696 ipc/msg.c v.msg_cbytes = in->msg_cbytes; v 697 ipc/msg.c v.msg_qnum = in->msg_qnum; v 698 ipc/msg.c v.msg_qbytes = in->msg_qbytes; v 699 ipc/msg.c v.msg_lspid = in->msg_lspid; v 700 ipc/msg.c v.msg_lrpid = in->msg_lrpid; v 701 ipc/msg.c return copy_to_user(buf, &v, sizeof(v)); v 1736 ipc/sem.c struct compat_semid64_ds v; v 1737 ipc/sem.c memset(&v, 0, sizeof(v)); v 1738 ipc/sem.c to_compat_ipc64_perm(&v.sem_perm, &in->sem_perm); v 1739 ipc/sem.c v.sem_otime = lower_32_bits(in->sem_otime); v 1740 ipc/sem.c v.sem_otime_high = upper_32_bits(in->sem_otime); v 1741 ipc/sem.c v.sem_ctime = lower_32_bits(in->sem_ctime); v 1742 ipc/sem.c v.sem_ctime_high = upper_32_bits(in->sem_ctime); v 1743 ipc/sem.c v.sem_nsems = in->sem_nsems; v 1744 ipc/sem.c return copy_to_user(buf, &v, sizeof(v)); v 1746 ipc/sem.c struct compat_semid_ds v; v 1747 ipc/sem.c memset(&v, 0, sizeof(v)); v 1748 ipc/sem.c to_compat_ipc_perm(&v.sem_perm, &in->sem_perm); v 1749 ipc/sem.c v.sem_otime = in->sem_otime; v 1750 ipc/sem.c v.sem_ctime = in->sem_ctime; v 1751 ipc/sem.c v.sem_nsems = in->sem_nsems; v 1752 ipc/sem.c return copy_to_user(buf, &v, sizeof(v)); v 1292 ipc/shm.c struct compat_shmid64_ds v; v 1293 ipc/shm.c memset(&v, 0, sizeof(v)); v 1294 ipc/shm.c to_compat_ipc64_perm(&v.shm_perm, &in->shm_perm); v 1295 ipc/shm.c v.shm_atime = lower_32_bits(in->shm_atime); v 1296 ipc/shm.c v.shm_atime_high = upper_32_bits(in->shm_atime); v 1297 ipc/shm.c v.shm_dtime = lower_32_bits(in->shm_dtime); v 1298 ipc/shm.c v.shm_dtime_high = upper_32_bits(in->shm_dtime); v 1299 ipc/shm.c v.shm_ctime = lower_32_bits(in->shm_ctime); v 1300 ipc/shm.c v.shm_ctime_high = upper_32_bits(in->shm_ctime); v 1301 ipc/shm.c v.shm_segsz = in->shm_segsz; v 1302 ipc/shm.c v.shm_nattch = in->shm_nattch; v 1303 ipc/shm.c v.shm_cpid = in->shm_cpid; v 1304 ipc/shm.c v.shm_lpid = in->shm_lpid; v 1305 ipc/shm.c return copy_to_user(buf, &v, sizeof(v)); v 1307 ipc/shm.c struct compat_shmid_ds v; v 1308 ipc/shm.c memset(&v, 0, sizeof(v)); v 1309 ipc/shm.c to_compat_ipc_perm(&v.shm_perm, &in->shm_perm); v 1310 ipc/shm.c v.shm_perm.key = in->shm_perm.key; v 1311 ipc/shm.c v.shm_atime = in->shm_atime; v 1312 ipc/shm.c v.shm_dtime = in->shm_dtime; v 1313 ipc/shm.c v.shm_ctime = in->shm_ctime; v 1314 ipc/shm.c v.shm_segsz = in->shm_segsz; v 1315 ipc/shm.c v.shm_nattch = in->shm_nattch; v 1316 ipc/shm.c v.shm_cpid = in->shm_cpid; v 1317 ipc/shm.c v.shm_lpid = in->shm_lpid; v 1318 ipc/shm.c return copy_to_user(buf, &v, sizeof(v)); v 284 kernel/bpf/btf.c const struct resolve_vertex *v); v 998 kernel/bpf/btf.c struct resolve_vertex *v; v 1008 kernel/bpf/btf.c v = &env->stack[env->top_stack++]; v 1009 kernel/bpf/btf.c v->t = t; v 1010 kernel/bpf/btf.c v->type_id = type_id; v 1011 kernel/bpf/btf.c v->next_member = 0; v 1140 kernel/bpf/btf.c const struct resolve_vertex *v) v 1142 kernel/bpf/btf.c btf_verifier_log_basic(env, v->t, "Unsupported resolve"); v 1606 kernel/bpf/btf.c const struct resolve_vertex *v) v 1608 kernel/bpf/btf.c const struct btf_type *t = v->t; v 1615 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid type_id"); v 1637 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid type_id"); v 1648 kernel/bpf/btf.c const struct resolve_vertex *v) v 1651 kernel/bpf/btf.c const struct btf_type *t = v->t; v 1657 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid type_id"); v 1684 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid type_id"); v 1694 kernel/bpf/btf.c const struct resolve_vertex *v) v 1697 kernel/bpf/btf.c const struct btf_type *t = v->t; v 1703 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid type_id"); v 1740 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid type_id"); v 1925 kernel/bpf/btf.c const struct resolve_vertex *v) v 1927 kernel/bpf/btf.c const struct btf_array *array = btf_type_array(v->t); v 1938 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid index"); v 1949 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid index"); v 1958 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, v 1969 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid elem"); v 1974 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, "Invalid array of int"); v 1979 kernel/bpf/btf.c btf_verifier_log_type(env, v->t, v 2138 kernel/bpf/btf.c const struct resolve_vertex *v) v 2148 kernel/bpf/btf.c if (v->next_member) { v 2153 kernel/bpf/btf.c last_member = btf_type_member(v->t) + v->next_member - 1; v 2161 kernel/bpf/btf.c if (btf_type_kflag(v->t)) v 2162 kernel/bpf/btf.c err = btf_type_ops(last_member_type)->check_kflag_member(env, v->t, v 2166 kernel/bpf/btf.c err = btf_type_ops(last_member_type)->check_member(env, v->t, v 2173 kernel/bpf/btf.c for_each_member_from(i, v->next_member, v->t, member) { v 2180 kernel/bpf/btf.c btf_verifier_log_member(env, v->t, member, v 2191 kernel/bpf/btf.c if (btf_type_kflag(v->t)) v 2192 kernel/bpf/btf.c err = btf_type_ops(member_type)->check_kflag_member(env, v->t, v 2196 kernel/bpf/btf.c err = btf_type_ops(member_type)->check_member(env, v->t, v 2429 kernel/bpf/btf.c int v = *(int *)data; v 2432 kernel/bpf/btf.c if (v == enums[i].val) { v 2440 kernel/bpf/btf.c seq_printf(m, "%d", v); v 2716 kernel/bpf/btf.c const struct resolve_vertex *v) v 2722 kernel/bpf/btf.c for_each_vsi_from(i, v->next_member, v->t, vsi) { v 2727 kernel/bpf/btf.c btf_verifier_log_vsi(env, v->t, vsi, v 2740 kernel/bpf/btf.c btf_verifier_log_vsi(env, v->t, vsi, "Invalid type"); v 2745 kernel/bpf/btf.c btf_verifier_log_vsi(env, v->t, vsi, "Invalid size"); v 3034 kernel/bpf/btf.c const struct resolve_vertex *v; v 3039 kernel/bpf/btf.c while (!err && (v = env_stack_peak(env))) { v 3040 kernel/bpf/btf.c env->log_type_id = v->type_id; v 3041 kernel/bpf/btf.c err = btf_type_ops(v->t)->resolve(env, v); v 193 kernel/bpf/inode.c static void *map_seq_next(struct seq_file *m, void *v, loff_t *pos) v 203 kernel/bpf/inode.c if (unlikely(v == SEQ_START_TOKEN)) v 223 kernel/bpf/inode.c static void map_seq_stop(struct seq_file *m, void *v) v 227 kernel/bpf/inode.c static int map_seq_show(struct seq_file *m, void *v) v 232 kernel/bpf/inode.c if (unlikely(v == SEQ_START_TOKEN)) { v 88 kernel/bpf/tnum.c u64 alpha, beta, v; v 92 kernel/bpf/tnum.c v = a.value & b.value; v 93 kernel/bpf/tnum.c return TNUM(v, alpha & beta & ~v); v 98 kernel/bpf/tnum.c u64 v, mu; v 100 kernel/bpf/tnum.c v = a.value | b.value; v 102 kernel/bpf/tnum.c return TNUM(v, mu & ~v); v 107 kernel/bpf/tnum.c u64 v, mu; v 109 kernel/bpf/tnum.c v = a.value ^ b.value; v 111 kernel/bpf/tnum.c return TNUM(v & ~mu, mu); v 143 kernel/bpf/tnum.c u64 v, mu; v 145 kernel/bpf/tnum.c v = a.value | b.value; v 147 kernel/bpf/tnum.c return TNUM(v & ~mu, mu); v 269 kernel/cgroup/cgroup-internal.h int proc_cgroupstats_show(struct seq_file *m, void *v); v 453 kernel/cgroup/cgroup-v1.c static void cgroup_pidlist_stop(struct seq_file *s, void *v) v 464 kernel/cgroup/cgroup-v1.c static void *cgroup_pidlist_next(struct seq_file *s, void *v, loff_t *pos) v 468 kernel/cgroup/cgroup-v1.c pid_t *p = v; v 484 kernel/cgroup/cgroup-v1.c static int cgroup_pidlist_show(struct seq_file *s, void *v) v 486 kernel/cgroup/cgroup-v1.c seq_printf(s, "%d\n", *(int *)v); v 563 kernel/cgroup/cgroup-v1.c static int cgroup_release_agent_show(struct seq_file *seq, void *v) v 574 kernel/cgroup/cgroup-v1.c static int cgroup_sane_behavior_show(struct seq_file *seq, void *v) v 658 kernel/cgroup/cgroup-v1.c int proc_cgroupstats_show(struct seq_file *m, void *v) v 2906 kernel/cgroup/cgroup.c static int cgroup_controllers_show(struct seq_file *seq, void *v) v 2915 kernel/cgroup/cgroup.c static int cgroup_subtree_control_show(struct seq_file *seq, void *v) v 3425 kernel/cgroup/cgroup.c static int cgroup_type_show(struct seq_file *seq, void *v) v 3463 kernel/cgroup/cgroup.c static int cgroup_max_descendants_show(struct seq_file *seq, void *v) v 3506 kernel/cgroup/cgroup.c static int cgroup_max_depth_show(struct seq_file *seq, void *v) v 3549 kernel/cgroup/cgroup.c static int cgroup_events_show(struct seq_file *seq, void *v) v 3559 kernel/cgroup/cgroup.c static int cgroup_stat_show(struct seq_file *seq, void *v) v 3590 kernel/cgroup/cgroup.c static int cpu_stat_show(struct seq_file *seq, void *v) v 3603 kernel/cgroup/cgroup.c static int cgroup_io_pressure_show(struct seq_file *seq, void *v) v 3610 kernel/cgroup/cgroup.c static int cgroup_memory_pressure_show(struct seq_file *seq, void *v) v 3617 kernel/cgroup/cgroup.c static int cgroup_cpu_pressure_show(struct seq_file *seq, void *v) v 3684 kernel/cgroup/cgroup.c static int cgroup_freeze_show(struct seq_file *seq, void *v) v 3769 kernel/cgroup/cgroup.c unsigned long long v; v 3770 kernel/cgroup/cgroup.c ret = kstrtoull(buf, 0, &v); v 3772 kernel/cgroup/cgroup.c ret = cft->write_u64(css, cft, v); v 3774 kernel/cgroup/cgroup.c long long v; v 3775 kernel/cgroup/cgroup.c ret = kstrtoll(buf, 0, &v); v 3777 kernel/cgroup/cgroup.c ret = cft->write_s64(css, cft, v); v 3800 kernel/cgroup/cgroup.c static void *cgroup_seqfile_next(struct seq_file *seq, void *v, loff_t *ppos) v 3802 kernel/cgroup/cgroup.c return seq_cft(seq)->seq_next(seq, v, ppos); v 3805 kernel/cgroup/cgroup.c static void cgroup_seqfile_stop(struct seq_file *seq, void *v) v 3808 kernel/cgroup/cgroup.c seq_cft(seq)->seq_stop(seq, v); v 4666 kernel/cgroup/cgroup.c static void *cgroup_procs_next(struct seq_file *s, void *v, loff_t *pos) v 4723 kernel/cgroup/cgroup.c static int cgroup_procs_show(struct seq_file *s, void *v) v 4725 kernel/cgroup/cgroup.c seq_printf(s, "%d\n", task_pid_vnr(v)); v 6315 kernel/cgroup/cgroup.c u64 v = 1; v 6317 kernel/cgroup/cgroup.c v *= 10; v 6318 kernel/cgroup/cgroup.c return v; v 6335 kernel/cgroup/cgroup.c int cgroup_parse_float(const char *input, unsigned dec_shift, s64 *v) v 6351 kernel/cgroup/cgroup.c *v = whole * power_of_ten(dec_shift) + frac; v 2404 kernel/cgroup/cpuset.c static int cpuset_common_seq_show(struct seq_file *sf, void *v) v 2482 kernel/cgroup/cpuset.c static int sched_partition_show(struct seq_file *seq, void *v) v 40 kernel/cgroup/debug.c static int current_css_set_read(struct seq_file *seq, void *v) v 87 kernel/cgroup/debug.c static int current_css_set_cg_links_read(struct seq_file *seq, void *v) v 114 kernel/cgroup/debug.c static int cgroup_css_links_read(struct seq_file *seq, void *v) v 203 kernel/cgroup/debug.c static int cgroup_subsys_states_read(struct seq_file *seq, void *v) v 255 kernel/cgroup/debug.c static int cgroup_masks_read(struct seq_file *seq, void *v) v 291 kernel/cgroup/legacy_freezer.c static int freezer_read(struct seq_file *m, void *v) v 285 kernel/cgroup/pids.c static int pids_max_show(struct seq_file *sf, void *v) v 307 kernel/cgroup/pids.c static int pids_events_show(struct seq_file *sf, void *v) v 524 kernel/cgroup/rdma.c static int rdmacg_resource_read(struct seq_file *sf, void *v) v 341 kernel/compat.c compat_sigset_t v; v 342 kernel/compat.c if (copy_from_user(&v, compat, sizeof(compat_sigset_t))) v 345 kernel/compat.c case 4: set->sig[3] = v.sig[6] | (((long)v.sig[7]) << 32 ); v 347 kernel/compat.c case 3: set->sig[2] = v.sig[4] | (((long)v.sig[5]) << 32 ); v 349 kernel/compat.c case 2: set->sig[1] = v.sig[2] | (((long)v.sig[3]) << 32 ); v 351 kernel/compat.c case 1: set->sig[0] = v.sig[0] | (((long)v.sig[1]) << 32 ); v 118 kernel/dma.c static int proc_dma_show(struct seq_file *m, void *v) v 131 kernel/dma.c static int proc_dma_show(struct seq_file *m, void *v) v 822 kernel/dma/debug.c static int dump_show(struct seq_file *seq, void *v) v 12213 kernel/events/core.c perf_reboot(struct notifier_block *notifier, unsigned long val, void *v) v 48 kernel/events/uprobes.c #define uprobes_mmap_hash(v) (&uprobes_mmap_mutex[((unsigned long)(v)) % UPROBES_HASH_SZ]) v 24 kernel/exec_domain.c static int execdomains_proc_show(struct seq_file *m, void *v) v 192 kernel/fail_function.c static void fei_seq_stop(struct seq_file *m, void *v) v 197 kernel/fail_function.c static void *fei_seq_next(struct seq_file *m, void *v, loff_t *pos) v 199 kernel/fail_function.c return seq_list_next(v, &fei_attr_list, pos); v 202 kernel/fail_function.c static int fei_seq_show(struct seq_file *m, void *v) v 204 kernel/fail_function.c struct fei_attr *attr = list_entry(v, struct fei_attr, list); v 406 kernel/gcov/clang.c static size_t store_gcov_u32(void *buffer, size_t off, u32 v) v 412 kernel/gcov/clang.c *data = v; v 430 kernel/gcov/clang.c static size_t store_gcov_u64(void *buffer, size_t off, u64 v) v 437 kernel/gcov/clang.c data[0] = (v & 0xffffffffUL); v 438 kernel/gcov/clang.c data[1] = (v >> 32); v 501 kernel/gcov/gcc_3_4.c static int seq_write_gcov_u32(struct seq_file *seq, u32 v) v 503 kernel/gcov/gcc_3_4.c return seq_write(seq, &v, sizeof(v)); v 516 kernel/gcov/gcc_3_4.c static int seq_write_gcov_u64(struct seq_file *seq, u64 v) v 520 kernel/gcov/gcc_3_4.c data[0] = (v & 0xffffffffUL); v 521 kernel/gcov/gcc_3_4.c data[1] = (v >> 32); v 393 kernel/gcov/gcc_4_7.c static size_t store_gcov_u32(void *buffer, size_t off, u32 v) v 399 kernel/gcov/gcc_4_7.c *data = v; v 417 kernel/gcov/gcc_4_7.c static size_t store_gcov_u64(void *buffer, size_t off, u64 v) v 424 kernel/gcov/gcc_4_7.c data[0] = (v & 0xffffffffUL); v 425 kernel/gcov/gcc_4_7.c data[1] = (v >> 32); v 291 kernel/irq/affinity.c unsigned int ncpus, v; v 309 kernel/irq/affinity.c for (v = 0; v < nv->nvectors; v++, curvec++) { v 83 kernel/irq/proc.c static int irq_affinity_hint_proc_show(struct seq_file *m, void *v) v 104 kernel/irq/proc.c static int irq_affinity_proc_show(struct seq_file *m, void *v) v 109 kernel/irq/proc.c static int irq_affinity_list_proc_show(struct seq_file *m, void *v) v 218 kernel/irq/proc.c static int irq_effective_aff_proc_show(struct seq_file *m, void *v) v 223 kernel/irq/proc.c static int irq_effective_aff_list_proc_show(struct seq_file *m, void *v) v 229 kernel/irq/proc.c static int default_affinity_show(struct seq_file *m, void *v) v 279 kernel/irq/proc.c static int irq_node_proc_show(struct seq_file *m, void *v) v 288 kernel/irq/proc.c static int irq_spurious_proc_show(struct seq_file *m, void *v) v 460 kernel/irq/proc.c int show_interrupts(struct seq_file *p, void *v) v 465 kernel/irq/proc.c int i = *(loff_t *) v, j; v 118 kernel/jump_label.c int v, v1; v 135 kernel/jump_label.c for (v = atomic_read(&key->enabled); v > 0; v = v1) { v 136 kernel/jump_label.c v1 = atomic_cmpxchg(&key->enabled, v, v + 1); v 137 kernel/jump_label.c if (likely(v1 == v)) v 39 kernel/kcmp.c static long kptr_obfuscate(long v, int type) v 41 kernel/kcmp.c return (v ^ cookies[type][0]) * cookies[type][1]; v 2364 kernel/kprobes.c static void *kprobe_seq_next(struct seq_file *f, void *v, loff_t *pos) v 2372 kernel/kprobes.c static void kprobe_seq_stop(struct seq_file *f, void *v) v 2377 kernel/kprobes.c static int show_kprobe_addr(struct seq_file *pi, void *v) v 2382 kernel/kprobes.c unsigned int i = *(loff_t *) v; v 2426 kernel/kprobes.c static void *kprobe_blacklist_seq_next(struct seq_file *m, void *v, loff_t *pos) v 2428 kernel/kprobes.c return seq_list_next(v, &kprobe_blacklist, pos); v 2431 kernel/kprobes.c static int kprobe_blacklist_seq_show(struct seq_file *m, void *v) v 2434 kernel/kprobes.c list_entry(v, struct kprobe_blacklist_entry, list); v 217 kernel/latencytop.c static int lstats_show(struct seq_file *m, void *v) v 27 kernel/locking/lockdep_proc.c static void *l_next(struct seq_file *m, void *v, loff_t *pos) v 29 kernel/locking/lockdep_proc.c return seq_list_next(v, &all_lock_classes, pos); v 37 kernel/locking/lockdep_proc.c static void l_stop(struct seq_file *m, void *v) v 58 kernel/locking/lockdep_proc.c static int l_show(struct seq_file *m, void *v) v 60 kernel/locking/lockdep_proc.c struct lock_class *class = list_entry(v, struct lock_class, lock_entry); v 64 kernel/locking/lockdep_proc.c if (v == &all_lock_classes) { v 116 kernel/locking/lockdep_proc.c static void *lc_next(struct seq_file *m, void *v, loff_t *pos) v 122 kernel/locking/lockdep_proc.c static void lc_stop(struct seq_file *m, void *v) v 126 kernel/locking/lockdep_proc.c static int lc_show(struct seq_file *m, void *v) v 128 kernel/locking/lockdep_proc.c struct lock_chain *chain = v; v 132 kernel/locking/lockdep_proc.c if (v == SEQ_START_TOKEN) { v 201 kernel/locking/lockdep_proc.c static int lockdep_stats_show(struct seq_file *m, void *v) v 560 kernel/locking/lockdep_proc.c static void *ls_next(struct seq_file *m, void *v, loff_t *pos) v 566 kernel/locking/lockdep_proc.c static void ls_stop(struct seq_file *m, void *v) v 570 kernel/locking/lockdep_proc.c static int ls_show(struct seq_file *m, void *v) v 572 kernel/locking/lockdep_proc.c if (v == SEQ_START_TOKEN) v 575 kernel/locking/lockdep_proc.c seq_stats(m, v); v 134 kernel/locking/qspinlock_stat.h #define pv_wait(p, v) __pv_wait(p, v) v 77 kernel/notifier.c unsigned long val, void *v, v 95 kernel/notifier.c ret = nb->notifier_call(nb, val, v); v 179 kernel/notifier.c unsigned long val, void *v, v 185 kernel/notifier.c ret = notifier_call_chain(&nh->head, val, v, nr_to_call, nr_calls); v 193 kernel/notifier.c unsigned long val, void *v) v 195 kernel/notifier.c return __atomic_notifier_call_chain(nh, val, v, -1, NULL); v 307 kernel/notifier.c unsigned long val, void *v, v 319 kernel/notifier.c ret = notifier_call_chain(&nh->head, val, v, nr_to_call, v 328 kernel/notifier.c unsigned long val, void *v) v 330 kernel/notifier.c return __blocking_notifier_call_chain(nh, val, v, -1, NULL); v 393 kernel/notifier.c unsigned long val, void *v, v 396 kernel/notifier.c return notifier_call_chain(&nh->head, val, v, nr_to_call, nr_calls); v 401 kernel/notifier.c unsigned long val, void *v) v 403 kernel/notifier.c return __raw_notifier_call_chain(nh, val, v, -1, NULL); v 493 kernel/notifier.c unsigned long val, void *v, v 500 kernel/notifier.c ret = notifier_call_chain(&nh->head, val, v, nr_to_call, nr_calls); v 507 kernel/notifier.c unsigned long val, void *v) v 509 kernel/notifier.c return __srcu_notifier_call_chain(nh, val, v, -1, NULL); v 374 kernel/params.c bool v; v 377 kernel/params.c boolkp.arg = &v; v 381 kernel/params.c *(int *)kp->arg = v; v 452 kernel/printk/printk.c #define LOG_LEVEL(v) ((v) & 0x07) v 453 kernel/printk/printk.c #define LOG_FACILITY(v) ((v) >> 3 & 0xff) v 416 kernel/profile.c static int prof_cpu_mask_proc_show(struct seq_file *m, void *v) v 91 kernel/rcu/rcu_segcblist.c void rcu_segcblist_set_len(struct rcu_segcblist *rsclp, long v) v 94 kernel/rcu/rcu_segcblist.c atomic_long_set(&rsclp->len, v); v 96 kernel/rcu/rcu_segcblist.c WRITE_ONCE(rsclp->len, v); v 107 kernel/rcu/rcu_segcblist.c void rcu_segcblist_add_len(struct rcu_segcblist *rsclp, long v) v 111 kernel/rcu/rcu_segcblist.c atomic_long_add(v, &rsclp->len); v 115 kernel/rcu/rcu_segcblist.c WRITE_ONCE(rsclp->len, rsclp->len + v); v 137 kernel/rcu/rcu_segcblist.c long rcu_segcblist_xchg_len(struct rcu_segcblist *rsclp, long v) v 140 kernel/rcu/rcu_segcblist.c return atomic_long_xchg(&rsclp->len, v); v 145 kernel/rcu/rcu_segcblist.c WRITE_ONCE(rsclp->len, v); v 77 kernel/resource.c static void *r_next(struct seq_file *m, void *v, loff_t *pos) v 79 kernel/resource.c struct resource *p = v; v 99 kernel/resource.c static void r_stop(struct seq_file *m, void *v) v 105 kernel/resource.c static int r_show(struct seq_file *m, void *v) v 108 kernel/resource.c struct resource *r = v, *p; v 7341 kernel/sched/core.c static int cpu_uclamp_min_show(struct seq_file *sf, void *v) v 7347 kernel/sched/core.c static int cpu_uclamp_max_show(struct seq_file *sf, void *v) v 7613 kernel/sched/core.c static int cpu_cfs_stat_show(struct seq_file *sf, void *v) v 7834 kernel/sched/core.c static int cpu_max_show(struct seq_file *sf, void *v) v 269 kernel/sched/cpuacct.c static int cpuacct_stats_show(struct seq_file *sf, void *v) v 59 kernel/sched/debug.c static int sched_feat_show(struct seq_file *m, void *v) v 737 kernel/sched/debug.c static int sched_debug_show(struct seq_file *m, void *v) v 739 kernel/sched/debug.c int cpu = (unsigned long)(v - 2); v 86 kernel/sched/pelt.c #define cap_scale(v, s) ((v)*(s) >> SCHED_CAPACITY_SHIFT) v 977 kernel/sched/psi.c static int psi_io_show(struct seq_file *m, void *v) v 982 kernel/sched/psi.c static int psi_memory_show(struct seq_file *m, void *v) v 987 kernel/sched/psi.c static int psi_cpu_show(struct seq_file *m, void *v) v 1969 kernel/sched/rt.c static inline bool rto_start_trylock(atomic_t *v) v 1971 kernel/sched/rt.c return !atomic_cmpxchg_acquire(v, 0, 1); v 1974 kernel/sched/rt.c static inline void rto_start_unlock(atomic_t *v) v 1976 kernel/sched/rt.c atomic_set_release(v, 0); v 196 kernel/sched/sched.h #define cap_scale(v, s) ((v)*(s) >> SCHED_CAPACITY_SHIFT) v 15 kernel/sched/stats.c static int show_schedstat(struct seq_file *seq, void *v) v 19 kernel/sched/stats.c if (v == (void *)1) { v 28 kernel/sched/stats.c cpu = (unsigned long)(v - 2); v 1221 kernel/sys.c unsigned v; v 1231 kernel/sys.c v = ((LINUX_VERSION_CODE >> 8) & 0xff) + 60; v 1233 kernel/sys.c copy = scnprintf(buf, copy, "2.6.%u%s", v, rest); v 2137 kernel/sysctl.c static void proc_skip_char(char **buf, size_t *size, const char v) v 2140 kernel/sysctl.c if (**buf != v) v 68 kernel/time/test_udelay.c static int udelay_test_show(struct seq_file *s, void *v) v 304 kernel/time/timer_list.c static int timer_list_show(struct seq_file *m, void *v) v 306 kernel/time/timer_list.c struct timer_list_iter *iter = v; v 351 kernel/time/timer_list.c static void *timer_list_next(struct seq_file *file, void *v, loff_t *offset) v 358 kernel/time/timer_list.c static void timer_list_stop(struct seq_file *seq, void *v) v 662 kernel/torture.c bool torture_init_begin(char *ttype, int v) v 673 kernel/torture.c verbose = v; v 430 kernel/trace/ftrace.c function_stat_next(void *v, int idx) v 432 kernel/trace/ftrace.c struct ftrace_profile *rec = v; v 508 kernel/trace/ftrace.c static int function_stat_show(struct seq_file *m, void *v) v 510 kernel/trace/ftrace.c struct ftrace_profile *rec = v; v 3313 kernel/trace/ftrace.c t_next(struct seq_file *m, void *v, loff_t *pos) v 3425 kernel/trace/ftrace.c static int t_show(struct seq_file *m, void *v) v 5157 kernel/trace/ftrace.c g_next(struct seq_file *m, void *v, loff_t *pos) v 5190 kernel/trace/ftrace.c static int g_show(struct seq_file *m, void *v) v 5192 kernel/trace/ftrace.c struct ftrace_func_entry *entry = v; v 6535 kernel/trace/ftrace.c static void *fpid_next(struct seq_file *m, void *v, loff_t *pos) v 6540 kernel/trace/ftrace.c if (v == FTRACE_NO_PIDS) { v 6544 kernel/trace/ftrace.c return trace_pid_next(pid_list, v, pos); v 6554 kernel/trace/ftrace.c static int fpid_show(struct seq_file *m, void *v) v 6556 kernel/trace/ftrace.c if (v == FTRACE_NO_PIDS) { v 6561 kernel/trace/ftrace.c return trace_pid_show(m, v); v 434 kernel/trace/trace.c void *trace_pid_next(struct trace_pid_list *pid_list, void *v, loff_t *pos) v 436 kernel/trace/trace.c unsigned long pid = (unsigned long)v; v 485 kernel/trace/trace.c int trace_pid_show(struct seq_file *m, void *v) v 487 kernel/trace/trace.c unsigned long pid = (unsigned long)v - 1; v 3381 kernel/trace/trace.c static void *s_next(struct seq_file *m, void *v, loff_t *pos) v 4008 kernel/trace/trace.c static int s_show(struct seq_file *m, void *v) v 4010 kernel/trace/trace.c struct trace_iterator *iter = v; v 4322 kernel/trace/trace.c t_next(struct seq_file *m, void *v, loff_t *pos) v 4325 kernel/trace/trace.c struct tracer *t = v; v 4355 kernel/trace/trace.c static int t_show(struct seq_file *m, void *v) v 4357 kernel/trace/trace.c struct tracer *t = v; v 4525 kernel/trace/trace.c static int tracing_trace_options_show(struct seq_file *m, void *v) v 5029 kernel/trace/trace.c static void *saved_tgids_next(struct seq_file *m, void *v, loff_t *pos) v 5031 kernel/trace/trace.c int *ptr = v; v 5048 kernel/trace/trace.c void *v; v 5054 kernel/trace/trace.c v = &tgid_map[0]; v 5056 kernel/trace/trace.c v = saved_tgids_next(m, v, &l); v 5057 kernel/trace/trace.c if (!v) v 5061 kernel/trace/trace.c return v; v 5064 kernel/trace/trace.c static void saved_tgids_stop(struct seq_file *m, void *v) v 5068 kernel/trace/trace.c static int saved_tgids_show(struct seq_file *m, void *v) v 5070 kernel/trace/trace.c int pid = (int *)v - tgid_map; v 5102 kernel/trace/trace.c static void *saved_cmdlines_next(struct seq_file *m, void *v, loff_t *pos) v 5104 kernel/trace/trace.c unsigned int *ptr = v; v 5124 kernel/trace/trace.c void *v; v 5130 kernel/trace/trace.c v = &savedcmd->map_cmdline_to_pid[0]; v 5132 kernel/trace/trace.c v = saved_cmdlines_next(m, v, &l); v 5133 kernel/trace/trace.c if (!v) v 5137 kernel/trace/trace.c return v; v 5140 kernel/trace/trace.c static void saved_cmdlines_stop(struct seq_file *m, void *v) v 5146 kernel/trace/trace.c static int saved_cmdlines_show(struct seq_file *m, void *v) v 5149 kernel/trace/trace.c unsigned int *pid = v; v 5269 kernel/trace/trace.c static void *eval_map_next(struct seq_file *m, void *v, loff_t *pos) v 5271 kernel/trace/trace.c union trace_eval_map_item *ptr = v; v 5292 kernel/trace/trace.c union trace_eval_map_item *v; v 5297 kernel/trace/trace.c v = trace_eval_maps; v 5298 kernel/trace/trace.c if (v) v 5299 kernel/trace/trace.c v++; v 5301 kernel/trace/trace.c while (v && l < *pos) { v 5302 kernel/trace/trace.c v = eval_map_next(m, v, &l); v 5305 kernel/trace/trace.c return v; v 5308 kernel/trace/trace.c static void eval_map_stop(struct seq_file *m, void *v) v 5313 kernel/trace/trace.c static int eval_map_show(struct seq_file *m, void *v) v 5315 kernel/trace/trace.c union trace_eval_map_item *ptr = v; v 6520 kernel/trace/trace.c static int tracing_clock_show(struct seq_file *m, void *v) v 6613 kernel/trace/trace.c static int tracing_time_stamp_mode_show(struct seq_file *m, void *v) v 7104 kernel/trace/trace.c static void *tracing_err_log_seq_next(struct seq_file *m, void *v, loff_t *pos) v 7108 kernel/trace/trace.c return seq_list_next(v, &tr->err_log, pos); v 7111 kernel/trace/trace.c static void tracing_err_log_seq_stop(struct seq_file *m, void *v) v 7127 kernel/trace/trace.c static int tracing_err_log_seq_show(struct seq_file *m, void *v) v 7129 kernel/trace/trace.c struct tracing_log_err *err = v; v 774 kernel/trace/trace.h void *trace_pid_next(struct trace_pid_list *pid_list, void *v, loff_t *pos); v 776 kernel/trace/trace.h int trace_pid_show(struct seq_file *m, void *v); v 297 kernel/trace/trace_branch.c static int annotate_branch_stat_show(struct seq_file *m, void *v) v 299 kernel/trace/trace_branch.c struct ftrace_likely_data *p = v; v 323 kernel/trace/trace_branch.c annotated_branch_stat_next(void *v, int idx) v 325 kernel/trace/trace_branch.c struct ftrace_likely_data *p = v; v 413 kernel/trace/trace_branch.c all_branch_stat_next(void *v, int idx) v 415 kernel/trace/trace_branch.c struct ftrace_branch_data *p = v; v 425 kernel/trace/trace_branch.c static int all_branch_stat_show(struct seq_file *m, void *v) v 427 kernel/trace/trace_branch.c struct ftrace_branch_data *p = v; v 108 kernel/trace/trace_dynevent.c void *dyn_event_seq_next(struct seq_file *m, void *v, loff_t *pos) v 110 kernel/trace/trace_dynevent.c return seq_list_next(v, &dyn_event_list, pos); v 113 kernel/trace/trace_dynevent.c void dyn_event_seq_stop(struct seq_file *m, void *v) v 118 kernel/trace/trace_dynevent.c static int dyn_event_seq_show(struct seq_file *m, void *v) v 120 kernel/trace/trace_dynevent.c struct dyn_event *ev = v; v 97 kernel/trace/trace_dynevent.h void *dyn_event_seq_next(struct seq_file *m, void *v, loff_t *pos); v 98 kernel/trace/trace_dynevent.h void dyn_event_seq_stop(struct seq_file *m, void *v); v 897 kernel/trace/trace_events.c t_next(struct seq_file *m, void *v, loff_t *pos) v 899 kernel/trace/trace_events.c struct trace_event_file *file = v; v 937 kernel/trace/trace_events.c s_next(struct seq_file *m, void *v, loff_t *pos) v 939 kernel/trace/trace_events.c struct trace_event_file *file = v; v 969 kernel/trace/trace_events.c static int t_show(struct seq_file *m, void *v) v 971 kernel/trace/trace_events.c struct trace_event_file *file = v; v 987 kernel/trace/trace_events.c p_next(struct seq_file *m, void *v, loff_t *pos) v 992 kernel/trace/trace_events.c return trace_pid_next(pid_list, v, pos); v 1183 kernel/trace/trace_events.c static void *f_next(struct seq_file *m, void *v, loff_t *pos) v 1188 kernel/trace/trace_events.c struct list_head *node = v; v 1192 kernel/trace/trace_events.c switch ((unsigned long)v) { v 1215 kernel/trace/trace_events.c static int f_show(struct seq_file *m, void *v) v 1221 kernel/trace/trace_events.c switch ((unsigned long)v) { v 1238 kernel/trace/trace_events.c field = list_entry(v, struct ftrace_event_field, link); v 1481 kernel/trace/trace_events_hist.c static int synth_events_seq_show(struct seq_file *m, void *v) v 1483 kernel/trace/trace_events_hist.c struct dyn_event *ev = v; v 5587 kernel/trace/trace_events_hist.c static int hist_show(struct seq_file *m, void *v) v 147 kernel/trace/trace_events_trigger.c static int trigger_show(struct seq_file *m, void *v) v 152 kernel/trace/trace_events_trigger.c if (v == SHOW_AVAILABLE_TRIGGERS) { v 163 kernel/trace/trace_events_trigger.c data = list_entry(v, struct event_trigger_data, list); v 941 kernel/trace/trace_kprobe.c static int probes_seq_show(struct seq_file *m, void *v) v 943 kernel/trace/trace_kprobe.c struct dyn_event *ev = v; v 992 kernel/trace/trace_kprobe.c static int probes_profile_seq_show(struct seq_file *m, void *v) v 994 kernel/trace/trace_kprobe.c struct dyn_event *ev = v; v 492 kernel/trace/trace_output.c #define MARK(v, s) {.val = v, .sym = s} v 123 kernel/trace/trace_printk.c find_next_mod_format(int start_index, void *v, const char **fmt, loff_t *pos) v 136 kernel/trace/trace_printk.c if (!v || start_index == *pos) { v 153 kernel/trace/trace_printk.c mod_fmt = container_of(v, typeof(*mod_fmt), fmt); v 180 kernel/trace/trace_printk.c find_next_mod_format(int start_index, void *v, const char **fmt, loff_t *pos) v 254 kernel/trace/trace_printk.c static const char **find_next(void *v, loff_t *pos) v 256 kernel/trace/trace_printk.c const char **fmt = v; v 284 kernel/trace/trace_printk.c return find_next_mod_format(start_index, v, fmt, pos); v 294 kernel/trace/trace_printk.c static void *t_next(struct seq_file *m, void * v, loff_t *pos) v 297 kernel/trace/trace_printk.c return find_next(v, pos); v 300 kernel/trace/trace_printk.c static int t_show(struct seq_file *m, void *v) v 302 kernel/trace/trace_printk.c const char **fmt = v; v 389 kernel/trace/trace_stack.c t_next(struct seq_file *m, void *v, loff_t *pos) v 436 kernel/trace/trace_stack.c static int t_show(struct seq_file *m, void *v) v 441 kernel/trace/trace_stack.c if (v == SEQ_START_TOKEN) { v 453 kernel/trace/trace_stack.c i = *(long *)v; v 216 kernel/trace/trace_stat.c static int stat_seq_show(struct seq_file *s, void *v) v 219 kernel/trace/trace_stat.c struct stat_node *l = container_of(v, struct stat_node, node); v 221 kernel/trace/trace_stat.c if (v == SEQ_START_TOKEN) v 745 kernel/trace/trace_uprobe.c static int probes_seq_show(struct seq_file *m, void *v) v 747 kernel/trace/trace_uprobe.c struct dyn_event *ev = v; v 796 kernel/trace/trace_uprobe.c static int probes_profile_seq_show(struct seq_file *m, void *v) v 798 kernel/trace/trace_uprobe.c struct dyn_event *ev = v; v 175 kernel/ucount.c static inline bool atomic_inc_below(atomic_t *v, int u) v 178 kernel/ucount.c c = atomic_read(v); v 182 kernel/ucount.c old = atomic_cmpxchg(v, c, c+1); v 577 kernel/user_namespace.c static int uid_m_show(struct seq_file *seq, void *v) v 580 kernel/user_namespace.c struct uid_gid_extent *extent = v; v 598 kernel/user_namespace.c static int gid_m_show(struct seq_file *seq, void *v) v 601 kernel/user_namespace.c struct uid_gid_extent *extent = v; v 619 kernel/user_namespace.c static int projid_m_show(struct seq_file *seq, void *v) v 622 kernel/user_namespace.c struct uid_gid_extent *extent = v; v 677 kernel/user_namespace.c static void *m_next(struct seq_file *seq, void *v, loff_t *pos) v 683 kernel/user_namespace.c static void m_stop(struct seq_file *seq, void *v) v 1122 kernel/user_namespace.c int proc_setgroups_show(struct seq_file *seq, void *v) v 5519 kernel/workqueue.c int v, ret = -ENOMEM; v 5528 kernel/workqueue.c if (sscanf(buf, "%d", &v) == 1) { v 5529 kernel/workqueue.c attrs->no_numa = !v; v 133 lib/842/842_decompress.c u64 v; v 139 lib/842/842_decompress.c ret = next_bits(p, &v, n * 8); v 145 lib/842/842_decompress.c put_unaligned(cpu_to_be16((u16)v), (__be16 *)p->out); v 148 lib/842/842_decompress.c put_unaligned(cpu_to_be32((u32)v), (__be32 *)p->out); v 151 lib/842/842_decompress.c put_unaligned(cpu_to_be64((u64)v), (__be64 *)p->out); v 36 lib/atomic64.c static inline raw_spinlock_t *lock_addr(const atomic64_t *v) v 38 lib/atomic64.c unsigned long addr = (unsigned long) v; v 45 lib/atomic64.c s64 atomic64_read(const atomic64_t *v) v 48 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); v 52 lib/atomic64.c val = v->counter; v 58 lib/atomic64.c void atomic64_set(atomic64_t *v, s64 i) v 61 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); v 64 lib/atomic64.c v->counter = i; v 70 lib/atomic64.c void atomic64_##op(s64 a, atomic64_t *v) \ v 73 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); \ v 76 lib/atomic64.c v->counter c_op a; \ v 82 lib/atomic64.c s64 atomic64_##op##_return(s64 a, atomic64_t *v) \ v 85 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); \ v 89 lib/atomic64.c val = (v->counter c_op a); \ v 96 lib/atomic64.c s64 atomic64_fetch_##op(s64 a, atomic64_t *v) \ v 99 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); \ v 103 lib/atomic64.c val = v->counter; \ v 104 lib/atomic64.c v->counter c_op a; \ v 133 lib/atomic64.c s64 atomic64_dec_if_positive(atomic64_t *v) v 136 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); v 140 lib/atomic64.c val = v->counter - 1; v 142 lib/atomic64.c v->counter = val; v 148 lib/atomic64.c s64 atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n) v 151 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); v 155 lib/atomic64.c val = v->counter; v 157 lib/atomic64.c v->counter = n; v 163 lib/atomic64.c s64 atomic64_xchg(atomic64_t *v, s64 new) v 166 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); v 170 lib/atomic64.c val = v->counter; v 171 lib/atomic64.c v->counter = new; v 177 lib/atomic64.c s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) v 180 lib/atomic64.c raw_spinlock_t *lock = lock_addr(v); v 184 lib/atomic64.c val = v->counter; v 186 lib/atomic64.c v->counter += a; v 22 lib/atomic64_test.c atomic##bit##_set(&v, v0); \ v 24 lib/atomic64_test.c atomic##bit##_##op(val, &v); \ v 26 lib/atomic64_test.c WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \ v 27 lib/atomic64_test.c (unsigned long long)atomic##bit##_read(&v), \ v 46 lib/atomic64_test.c atomic##bit##_set(&v, v0); \ v 49 lib/atomic64_test.c BUG_ON(atomic##bit##_##op(val, &v) != r); \ v 50 lib/atomic64_test.c BUG_ON(atomic##bit##_read(&v) != r); \ v 55 lib/atomic64_test.c atomic##bit##_set(&v, v0); \ v 58 lib/atomic64_test.c BUG_ON(atomic##bit##_##op(val, &v) != v0); \ v 59 lib/atomic64_test.c BUG_ON(atomic##bit##_read(&v) != r); \ v 74 lib/atomic64_test.c atomic##bit##_set(&v, init); \ v 75 lib/atomic64_test.c BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \ v 76 lib/atomic64_test.c BUG_ON(atomic##bit##_read(&v) != expect); \ v 111 lib/atomic64_test.c atomic_t v; v 146 lib/atomic64_test.c #define INIT(c) do { atomic64_set(&v, c); r = c; } while (0) v 157 lib/atomic64_test.c atomic64_t v = ATOMIC64_INIT(v0); v 159 lib/atomic64_test.c BUG_ON(v.counter != r); v 161 lib/atomic64_test.c atomic64_set(&v, v1); v 163 lib/atomic64_test.c BUG_ON(v.counter != r); v 164 lib/atomic64_test.c BUG_ON(atomic64_read(&v) != r); v 191 lib/atomic64_test.c atomic64_inc(&v); v 193 lib/atomic64_test.c BUG_ON(v.counter != r); v 196 lib/atomic64_test.c atomic64_dec(&v); v 198 lib/atomic64_test.c BUG_ON(v.counter != r); v 207 lib/atomic64_test.c BUG_ON(atomic64_add_unless(&v, one, v0)); v 208 lib/atomic64_test.c BUG_ON(v.counter != r); v 211 lib/atomic64_test.c BUG_ON(!atomic64_add_unless(&v, one, v1)); v 213 lib/atomic64_test.c BUG_ON(v.counter != r); v 216 lib/atomic64_test.c BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1)); v 218 lib/atomic64_test.c BUG_ON(v.counter != r); v 221 lib/atomic64_test.c BUG_ON(atomic64_dec_if_positive(&v) != -one); v 222 lib/atomic64_test.c BUG_ON(v.counter != r); v 225 lib/atomic64_test.c BUG_ON(atomic64_dec_if_positive(&v) != (-one - one)); v 226 lib/atomic64_test.c BUG_ON(v.counter != r); v 229 lib/atomic64_test.c BUG_ON(!atomic64_inc_not_zero(&v)); v 231 lib/atomic64_test.c BUG_ON(v.counter != r); v 234 lib/atomic64_test.c BUG_ON(atomic64_inc_not_zero(&v)); v 235 lib/atomic64_test.c BUG_ON(v.counter != r); v 238 lib/atomic64_test.c BUG_ON(!atomic64_inc_not_zero(&v)); v 240 lib/atomic64_test.c BUG_ON(v.counter != r); v 244 lib/atomic64_test.c r_int = atomic64_inc_not_zero(&v); v 266 lib/bch.c static inline int modulo(struct bch_control *bch, unsigned int v) v 269 lib/bch.c while (v >= n) { v 270 lib/bch.c v -= n; v 271 lib/bch.c v = (v & n) + (v >> GF_M(bch)); v 273 lib/bch.c return v; v 279 lib/bch.c static inline int mod_s(struct bch_control *bch, unsigned int v) v 282 lib/bch.c return (v < n) ? v : v-n; v 574 lib/bch.c unsigned int u, v, r; v 591 lib/bch.c v = u; v 592 lib/bch.c while (v) { v 593 lib/bch.c i = deg(v); v 595 lib/bch.c v ^= (1 << i); v 1004 lib/debugobjects.c static int debug_stats_show(struct seq_file *m, void *v) v 65 lib/earlycpio.c unsigned int ch[C_NFIELDS], *chp, v; v 83 lib/earlycpio.c v = 0; v 85 lib/earlycpio.c v <<= 4; v 90 lib/earlycpio.c v += x; v 96 lib/earlycpio.c v += x + 10; v 102 lib/earlycpio.c *chp++ = v; v 164 lib/error-inject.c static void ei_seq_stop(struct seq_file *m, void *v) v 169 lib/error-inject.c static void *ei_seq_next(struct seq_file *m, void *v, loff_t *pos) v 171 lib/error-inject.c return seq_list_next(v, &error_injection_list, pos); v 188 lib/error-inject.c static int ei_seq_show(struct seq_file *m, void *v) v 190 lib/error-inject.c struct ei_entry *ent = list_entry(v, struct ei_entry, list); v 56 lib/fault-inject.c #define atomic_dec_not_zero(v) atomic_add_unless((v), -1, 0) v 107 lib/generic-radix-tree.c struct genradix_root *v = READ_ONCE(radix->root); v 113 lib/generic-radix-tree.c struct genradix_root *r = v, *new_root; v 131 lib/generic-radix-tree.c if ((v = cmpxchg_release(&radix->root, r, new_root)) == r) { v 132 lib/generic-radix-tree.c v = new_root; v 497 lib/idr.c unsigned long v = xa_to_value(bitmap); v 500 lib/idr.c if (!(v & (1UL << bit))) v 502 lib/idr.c v &= ~(1UL << bit); v 503 lib/idr.c if (!v) v 505 lib/idr.c xas_store(&xas, xa_mk_value(v)); v 145 lib/inflate.c } v; v 233 lib/inflate.c #define NEXTBYTE() ({ int v = get_byte(); if (v < 0) goto underrun; (uch)v; }) v 355 lib/inflate.c unsigned v[N_MAX]; /* values in order of bit length */ v 358 lib/inflate.c unsigned *c, *v, *x; v 369 lib/inflate.c v = stk->v; v 437 lib/inflate.c v[x[j]++] = i; v 445 lib/inflate.c p = v; /* grab values in bit order */ v 499 lib/inflate.c *(t = &(q->v.t)) = (struct huft *)NULL; v 509 lib/inflate.c r.v.t = q; /* pointer to this table */ v 519 lib/inflate.c if (p >= v + n) v 524 lib/inflate.c r.v.n = (ush)(*p); /* simple code is just the value */ v 530 lib/inflate.c r.v.n = d[*p++ - s]; v 581 lib/inflate.c q = (--p)->v.t; v 625 lib/inflate.c } while ((e = (t = t->v.t + ((unsigned)b & mask_bits[e]))->e) > 16); v 629 lib/inflate.c slide[w++] = (uch)t->v.n; v 645 lib/inflate.c n = t->v.n + ((unsigned)b & mask_bits[e]); v 657 lib/inflate.c } while ((e = (t = t->v.t + ((unsigned)b & mask_bits[e]))->e) > 16); v 660 lib/inflate.c d = w - t->v.n - ((unsigned)b & mask_bits[e]); v 920 lib/inflate.c j = td->v.n; v 77 lib/iov_iter.c #define iterate_all_kinds(i, n, v, I, B, K) { \ v 81 lib/iov_iter.c struct bio_vec v; \ v 83 lib/iov_iter.c iterate_bvec(i, n, v, __bi, skip, (B)) \ v 86 lib/iov_iter.c struct kvec v; \ v 87 lib/iov_iter.c iterate_kvec(i, n, v, kvec, skip, (K)) \ v 91 lib/iov_iter.c struct iovec v; \ v 92 lib/iov_iter.c iterate_iovec(i, n, v, iov, skip, (I)) \ v 97 lib/iov_iter.c #define iterate_and_advance(i, n, v, I, B, K) { \ v 104 lib/iov_iter.c struct bio_vec v; \ v 106 lib/iov_iter.c iterate_bvec(i, n, v, __bi, skip, (B)) \ v 112 lib/iov_iter.c struct kvec v; \ v 113 lib/iov_iter.c iterate_kvec(i, n, v, kvec, skip, (K)) \ v 124 lib/iov_iter.c struct iovec v; \ v 125 lib/iov_iter.c iterate_iovec(i, n, v, iov, skip, (I)) \ v 423 lib/iov_iter.c struct iovec v; v 426 lib/iov_iter.c iterate_iovec(i, bytes, v, iov, skip, ({ v 427 lib/iov_iter.c err = fault_in_pages_readable(v.iov_base, v.iov_len); v 610 lib/iov_iter.c iterate_and_advance(i, bytes, v, v 611 lib/iov_iter.c copyout(v.iov_base, (from += v.iov_len) - v.iov_len, v.iov_len), v 612 lib/iov_iter.c memcpy_to_page(v.bv_page, v.bv_offset, v 613 lib/iov_iter.c (from += v.bv_len) - v.bv_len, v.bv_len), v 614 lib/iov_iter.c memcpy(v.iov_base, (from += v.iov_len) - v.iov_len, v.iov_len) v 710 lib/iov_iter.c iterate_and_advance(i, bytes, v, v 711 lib/iov_iter.c copyout_mcsafe(v.iov_base, (from += v.iov_len) - v.iov_len, v.iov_len), v 713 lib/iov_iter.c rem = memcpy_mcsafe_to_page(v.bv_page, v.bv_offset, v 714 lib/iov_iter.c (from += v.bv_len) - v.bv_len, v.bv_len); v 722 lib/iov_iter.c rem = memcpy_mcsafe(v.iov_base, (from += v.iov_len) - v.iov_len, v 723 lib/iov_iter.c v.iov_len); v 746 lib/iov_iter.c iterate_and_advance(i, bytes, v, v 747 lib/iov_iter.c copyin((to += v.iov_len) - v.iov_len, v.iov_base, v.iov_len), v 748 lib/iov_iter.c memcpy_from_page((to += v.bv_len) - v.bv_len, v.bv_page, v 749 lib/iov_iter.c v.bv_offset, v.bv_len), v 750 lib/iov_iter.c memcpy((to += v.iov_len) - v.iov_len, v.iov_base, v.iov_len) v 769 lib/iov_iter.c iterate_all_kinds(i, bytes, v, ({ v 770 lib/iov_iter.c if (copyin((to += v.iov_len) - v.iov_len, v 771 lib/iov_iter.c v.iov_base, v.iov_len)) v 774 lib/iov_iter.c memcpy_from_page((to += v.bv_len) - v.bv_len, v.bv_page, v 775 lib/iov_iter.c v.bv_offset, v.bv_len), v 776 lib/iov_iter.c memcpy((to += v.iov_len) - v.iov_len, v.iov_base, v.iov_len) v 791 lib/iov_iter.c iterate_and_advance(i, bytes, v, v 792 lib/iov_iter.c __copy_from_user_inatomic_nocache((to += v.iov_len) - v.iov_len, v 793 lib/iov_iter.c v.iov_base, v.iov_len), v 794 lib/iov_iter.c memcpy_from_page((to += v.bv_len) - v.bv_len, v.bv_page, v 795 lib/iov_iter.c v.bv_offset, v.bv_len), v 796 lib/iov_iter.c memcpy((to += v.iov_len) - v.iov_len, v.iov_base, v.iov_len) v 825 lib/iov_iter.c iterate_and_advance(i, bytes, v, v 826 lib/iov_iter.c __copy_from_user_flushcache((to += v.iov_len) - v.iov_len, v 827 lib/iov_iter.c v.iov_base, v.iov_len), v 828 lib/iov_iter.c memcpy_page_flushcache((to += v.bv_len) - v.bv_len, v.bv_page, v 829 lib/iov_iter.c v.bv_offset, v.bv_len), v 830 lib/iov_iter.c memcpy_flushcache((to += v.iov_len) - v.iov_len, v.iov_base, v 831 lib/iov_iter.c v.iov_len) v 848 lib/iov_iter.c iterate_all_kinds(i, bytes, v, ({ v 849 lib/iov_iter.c if (__copy_from_user_inatomic_nocache((to += v.iov_len) - v.iov_len, v 850 lib/iov_iter.c v.iov_base, v.iov_len)) v 853 lib/iov_iter.c memcpy_from_page((to += v.bv_len) - v.bv_len, v.bv_page, v 854 lib/iov_iter.c v.bv_offset, v.bv_len), v 855 lib/iov_iter.c memcpy((to += v.iov_len) - v.iov_len, v.iov_base, v.iov_len) v 866 lib/iov_iter.c size_t v = n + offset; v 875 lib/iov_iter.c if (n <= v && v <= PAGE_SIZE) v 879 lib/iov_iter.c v += (page - head) << PAGE_SHIFT; v 881 lib/iov_iter.c if (likely(n <= v && v <= (page_size(head)))) v 953 lib/iov_iter.c iterate_and_advance(i, bytes, v, v 954 lib/iov_iter.c clear_user(v.iov_base, v.iov_len), v 955 lib/iov_iter.c memzero_page(v.bv_page, v.bv_offset, v.bv_len), v 956 lib/iov_iter.c memset(v.iov_base, 0, v.iov_len) v 976 lib/iov_iter.c iterate_all_kinds(i, bytes, v, v 977 lib/iov_iter.c copyin((p += v.iov_len) - v.iov_len, v.iov_base, v.iov_len), v 978 lib/iov_iter.c memcpy_from_page((p += v.bv_len) - v.bv_len, v.bv_page, v 979 lib/iov_iter.c v.bv_offset, v.bv_len), v 980 lib/iov_iter.c memcpy((p += v.iov_len) - v.iov_len, v.iov_base, v.iov_len) v 1043 lib/iov_iter.c iterate_and_advance(i, size, v, 0, 0, 0) v 1200 lib/iov_iter.c iterate_all_kinds(i, size, v, v 1201 lib/iov_iter.c (res |= (unsigned long)v.iov_base | v.iov_len, 0), v 1202 lib/iov_iter.c res |= v.bv_offset | v.bv_len, v 1203 lib/iov_iter.c res |= (unsigned long)v.iov_base | v.iov_len v 1219 lib/iov_iter.c iterate_all_kinds(i, size, v, v 1220 lib/iov_iter.c (res |= (!res ? 0 : (unsigned long)v.iov_base) | v 1221 lib/iov_iter.c (size != v.iov_len ? size : 0), 0), v 1222 lib/iov_iter.c (res |= (!res ? 0 : (unsigned long)v.bv_offset) | v 1223 lib/iov_iter.c (size != v.bv_len ? size : 0)), v 1224 lib/iov_iter.c (res |= (!res ? 0 : (unsigned long)v.iov_base) | v 1225 lib/iov_iter.c (size != v.iov_len ? size : 0)) v 1287 lib/iov_iter.c iterate_all_kinds(i, maxsize, v, ({ v 1288 lib/iov_iter.c unsigned long addr = (unsigned long)v.iov_base; v 1289 lib/iov_iter.c size_t len = v.iov_len + (*start = addr & (PAGE_SIZE - 1)); v 1305 lib/iov_iter.c *start = v.bv_offset; v 1306 lib/iov_iter.c get_page(*pages = v.bv_page); v 1307 lib/iov_iter.c return v.bv_len; v 1369 lib/iov_iter.c iterate_all_kinds(i, maxsize, v, ({ v 1370 lib/iov_iter.c unsigned long addr = (unsigned long)v.iov_base; v 1371 lib/iov_iter.c size_t len = v.iov_len + (*start = addr & (PAGE_SIZE - 1)); v 1390 lib/iov_iter.c *start = v.bv_offset; v 1394 lib/iov_iter.c get_page(*p = v.bv_page); v 1395 lib/iov_iter.c return v.bv_len; v 1415 lib/iov_iter.c iterate_and_advance(i, bytes, v, ({ v 1417 lib/iov_iter.c next = csum_and_copy_from_user(v.iov_base, v 1418 lib/iov_iter.c (to += v.iov_len) - v.iov_len, v 1419 lib/iov_iter.c v.iov_len, 0, &err); v 1422 lib/iov_iter.c off += v.iov_len; v 1424 lib/iov_iter.c err ? v.iov_len : 0; v 1426 lib/iov_iter.c char *p = kmap_atomic(v.bv_page); v 1427 lib/iov_iter.c sum = csum_and_memcpy((to += v.bv_len) - v.bv_len, v 1428 lib/iov_iter.c p + v.bv_offset, v.bv_len, v 1431 lib/iov_iter.c off += v.bv_len; v 1433 lib/iov_iter.c sum = csum_and_memcpy((to += v.iov_len) - v.iov_len, v 1434 lib/iov_iter.c v.iov_base, v.iov_len, v 1436 lib/iov_iter.c off += v.iov_len; v 1457 lib/iov_iter.c iterate_all_kinds(i, bytes, v, ({ v 1459 lib/iov_iter.c next = csum_and_copy_from_user(v.iov_base, v 1460 lib/iov_iter.c (to += v.iov_len) - v.iov_len, v 1461 lib/iov_iter.c v.iov_len, 0, &err); v 1465 lib/iov_iter.c off += v.iov_len; v 1468 lib/iov_iter.c char *p = kmap_atomic(v.bv_page); v 1469 lib/iov_iter.c sum = csum_and_memcpy((to += v.bv_len) - v.bv_len, v 1470 lib/iov_iter.c p + v.bv_offset, v.bv_len, v 1473 lib/iov_iter.c off += v.bv_len; v 1475 lib/iov_iter.c sum = csum_and_memcpy((to += v.iov_len) - v.iov_len, v 1476 lib/iov_iter.c v.iov_base, v.iov_len, v 1478 lib/iov_iter.c off += v.iov_len; v 1503 lib/iov_iter.c iterate_and_advance(i, bytes, v, ({ v 1505 lib/iov_iter.c next = csum_and_copy_to_user((from += v.iov_len) - v.iov_len, v 1506 lib/iov_iter.c v.iov_base, v 1507 lib/iov_iter.c v.iov_len, 0, &err); v 1510 lib/iov_iter.c off += v.iov_len; v 1512 lib/iov_iter.c err ? v.iov_len : 0; v 1514 lib/iov_iter.c char *p = kmap_atomic(v.bv_page); v 1515 lib/iov_iter.c sum = csum_and_memcpy(p + v.bv_offset, v 1516 lib/iov_iter.c (from += v.bv_len) - v.bv_len, v 1517 lib/iov_iter.c v.bv_len, sum, off); v 1519 lib/iov_iter.c off += v.bv_len; v 1521 lib/iov_iter.c sum = csum_and_memcpy(v.iov_base, v 1522 lib/iov_iter.c (from += v.iov_len) - v.iov_len, v 1523 lib/iov_iter.c v.iov_len, sum, off); v 1524 lib/iov_iter.c off += v.iov_len; v 1574 lib/iov_iter.c } else iterate_all_kinds(i, size, v, ({ v 1575 lib/iov_iter.c unsigned long p = (unsigned long)v.iov_base; v 1576 lib/iov_iter.c npages += DIV_ROUND_UP(p + v.iov_len, PAGE_SIZE) v 1585 lib/iov_iter.c unsigned long p = (unsigned long)v.iov_base; v 1586 lib/iov_iter.c npages += DIV_ROUND_UP(p + v.iov_len, PAGE_SIZE) v 1707 lib/iov_iter.c iterate_all_kinds(i, bytes, v, -EINVAL, ({ v 1708 lib/iov_iter.c w.iov_base = kmap(v.bv_page) + v.bv_offset; v 1709 lib/iov_iter.c w.iov_len = v.bv_len; v 1711 lib/iov_iter.c kunmap(v.bv_page); v 1713 lib/iov_iter.c w = v; v 15 lib/livepatch/test_klp_atomic_replace.c static int livepatch_meminfo_proc_show(struct seq_file *m, void *v) v 11 lib/livepatch/test_klp_livepatch.c static int livepatch_cmdline_proc_show(struct seq_file *m, void *v) v 167 lib/lzo/lzo1x_compress.c u64 v; v 168 lib/lzo/lzo1x_compress.c v = get_unaligned((const u64 *) (ip + m_len)) ^ v 170 lib/lzo/lzo1x_compress.c if (unlikely(v == 0)) { v 173 lib/lzo/lzo1x_compress.c v = get_unaligned((const u64 *) (ip + m_len)) ^ v 177 lib/lzo/lzo1x_compress.c } while (v == 0); v 180 lib/lzo/lzo1x_compress.c m_len += (unsigned) __builtin_ctzll(v) / 8; v 182 lib/lzo/lzo1x_compress.c m_len += (unsigned) __builtin_clzll(v) / 8; v 187 lib/lzo/lzo1x_compress.c u32 v; v 188 lib/lzo/lzo1x_compress.c v = get_unaligned((const u32 *) (ip + m_len)) ^ v 190 lib/lzo/lzo1x_compress.c if (unlikely(v == 0)) { v 193 lib/lzo/lzo1x_compress.c v = get_unaligned((const u32 *) (ip + m_len)) ^ v 195 lib/lzo/lzo1x_compress.c if (v != 0) v 198 lib/lzo/lzo1x_compress.c v = get_unaligned((const u32 *) (ip + m_len)) ^ v 202 lib/lzo/lzo1x_compress.c } while (v == 0); v 205 lib/lzo/lzo1x_compress.c m_len += (unsigned) __builtin_ctz(v) / 8; v 207 lib/lzo/lzo1x_compress.c m_len += (unsigned) __builtin_clz(v) / 8; v 232 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 239 lib/mpi/longlong.h "r" ((USItype)(v))); \ v 241 lib/mpi/longlong.h #define smul_ppmm(w1, w0, u, v) \ v 248 lib/mpi/longlong.h "r" ((SItype)(v))); \ v 250 lib/mpi/longlong.h #define __umulsidi3(u, v) \ v 255 lib/mpi/longlong.h "r" ((USItype)(v))); \ v 320 lib/mpi/longlong.h #define umul_ppmm(wh, wl, u, v) \ v 328 lib/mpi/longlong.h "*f" ((USItype)(v))); \ v 415 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 420 lib/mpi/longlong.h "rm" ((USItype)(v))) v 470 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 477 lib/mpi/longlong.h "dI" ((USItype)(v))); \ v 479 lib/mpi/longlong.h #define __umulsidi3(u, v) \ v 484 lib/mpi/longlong.h "dI" ((USItype)(v))); \ v 534 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 539 lib/mpi/longlong.h "dmi" ((USItype)(v))) v 613 lib/mpi/longlong.h #define umul_ppmm(wh, wl, u, v) \ v 618 lib/mpi/longlong.h __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v)); \ v 642 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 644 lib/mpi/longlong.h UDItype __ll = (UDItype)(u) * (v); \ v 661 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 666 lib/mpi/longlong.h "d" ((UDItype)(v))); \ v 670 lib/mpi/longlong.h "d" ((UDItype)(v))); \ v 673 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 676 lib/mpi/longlong.h __ll_UTItype __ll = (__ll_UTItype)(u) * (v); \ v 689 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 696 lib/mpi/longlong.h "g" ((USItype)(v))); \ v 698 lib/mpi/longlong.h #define __umulsidi3(u, v) \ v 703 lib/mpi/longlong.h "g" ((USItype)(v))); \ v 858 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 866 lib/mpi/longlong.h "g" ((USItype)(v))); \ v 933 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 941 lib/mpi/longlong.h "r" ((USItype)(v)) \ v 975 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 980 lib/mpi/longlong.h "r" ((USItype)(v))) v 1000 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 1005 lib/mpi/longlong.h "r" ((USItype)(v))) v 1058 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 1102 lib/mpi/longlong.h "r" ((USItype)(v)) \ v 1241 lib/mpi/longlong.h #define __umulsidi3(u, v) \ v 1243 lib/mpi/longlong.h umul_ppmm(__hi, __lo, u, v); \ v 1270 lib/mpi/longlong.h #define umul_ppmm(w1, w0, u, v) \ v 1274 lib/mpi/longlong.h UWtype __u = (u), __v = (v); \ v 1297 lib/mpi/longlong.h #define smul_ppmm(w1, w0, u, v) \ v 1300 lib/mpi/longlong.h UWtype __m0 = (u), __m1 = (v); \ v 23 lib/mpi/mpi-cmp.c int mpi_cmp_ui(MPI u, unsigned long v) v 25 lib/mpi/mpi-cmp.c mpi_limb_t limb = v; v 44 lib/mpi/mpi-cmp.c int mpi_cmp(MPI u, MPI v) v 50 lib/mpi/mpi-cmp.c mpi_normalize(v); v 52 lib/mpi/mpi-cmp.c vsize = v->nlimbs; v 53 lib/mpi/mpi-cmp.c if (!u->sign && v->sign) v 55 lib/mpi/mpi-cmp.c if (u->sign && !v->sign) v 57 lib/mpi/mpi-cmp.c if (usize != vsize && !u->sign && !v->sign) v 59 lib/mpi/mpi-cmp.c if (usize != vsize && u->sign && v->sign) v 63 lib/mpi/mpi-cmp.c cmp = mpihelp_cmp(u->d, v->d, usize); v 16 lib/muldi3.c #define umul_ppmm(w1, w0, u, v) \ v 23 lib/muldi3.c __vl = __ll_lowpart(v); \ v 24 lib/muldi3.c __vh = __ll_highpart(v); \ v 42 lib/muldi3.c #define __umulsidi3(u, v) ({ \ v 44 lib/muldi3.c umul_ppmm(__w.s.high, __w.s.low, u, v); \ v 49 lib/muldi3.c long long notrace __muldi3(long long u, long long v) v 52 lib/muldi3.c const DWunion vv = {.ll = v}; v 108 lib/oid_registry.c const unsigned char *v = data, *end = v + datasize; v 114 lib/oid_registry.c if (v >= end) v 117 lib/oid_registry.c n = *v++; v 124 lib/oid_registry.c while (v < end) { v 126 lib/oid_registry.c n = *v++; v 132 lib/oid_registry.c if (v >= end) v 134 lib/oid_registry.c n = *v++; v 23 lib/raid6/mktables.c uint8_t v = 0; v 27 lib/raid6/mktables.c v ^= a; v 32 lib/raid6/mktables.c return v; v 37 lib/raid6/mktables.c uint8_t v = 1; v 45 lib/raid6/mktables.c v = gfmul(v, a); v 50 lib/raid6/mktables.c return v; v 56 lib/raid6/mktables.c uint8_t v; v 107 lib/raid6/mktables.c v = 1; v 113 lib/raid6/mktables.c exptbl[i + j] = v; v 114 lib/raid6/mktables.c printf("0x%02x,%c", v, (j == 7) ? '\n' : ' '); v 115 lib/raid6/mktables.c v = gfmul(v, 2); v 116 lib/raid6/mktables.c if (v == 1) v 117 lib/raid6/mktables.c v = 0; /* For entry 255, not a real entry */ v 131 lib/raid6/mktables.c v = 255; v 134 lib/raid6/mktables.c v = k; v 137 lib/raid6/mktables.c printf("0x%02x,%c", v, (j == 7) ? '\n' : ' '); v 151 lib/raid6/mktables.c invtbl[i + j] = v = gfpow(i + j, 254); v 152 lib/raid6/mktables.c printf("0x%02x,%c", v, (j == 7) ? '\n' : ' '); v 32 lib/reed_solomon/test_rslib.c __param(int, v, V_PROGRESS, "Verbosity level"); v 326 lib/reed_solomon/test_rslib.c if (v >= V_PROGRESS) v 333 lib/reed_solomon/test_rslib.c if (v >= V_CSUMMARY) { v 343 lib/reed_solomon/test_rslib.c if (retval && v >= V_PROGRESS) v 356 lib/reed_solomon/test_rslib.c if (v >= V_PROGRESS) v 414 lib/reed_solomon/test_rslib.c if (v >= V_PROGRESS) v 427 lib/reed_solomon/test_rslib.c if (v >= V_CSUMMARY) { v 436 lib/reed_solomon/test_rslib.c if (stat.noncw && v >= V_PROGRESS) v 470 lib/reed_solomon/test_rslib.c if (v >= V_PROGRESS) { v 762 lib/string.c void *memset16(uint16_t *s, uint16_t v, size_t count) v 767 lib/string.c *xs++ = v; v 784 lib/string.c void *memset32(uint32_t *s, uint32_t v, size_t count) v 789 lib/string.c *xs++ = v; v 806 lib/string.c void *memset64(uint64_t *s, uint64_t v, size_t count) v 811 lib/string.c *xs++ = v; v 12 lib/test_bitfield.c #define CHECK_ENC_GET_U(tp, v, field, res) do { \ v 16 lib/test_bitfield.c _res = u##tp##_encode_bits(v, field); \ v 18 lib/test_bitfield.c pr_warn("u" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != " #res "\n",\ v 22 lib/test_bitfield.c if (u##tp##_get_bits(_res, field) != v) \ v 27 lib/test_bitfield.c #define CHECK_ENC_GET_LE(tp, v, field, res) do { \ v 31 lib/test_bitfield.c _res = le##tp##_encode_bits(v, field); \ v 33 lib/test_bitfield.c pr_warn("le" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != 0x%llx\n",\ v 38 lib/test_bitfield.c if (le##tp##_get_bits(_res, field) != v) \ v 43 lib/test_bitfield.c #define CHECK_ENC_GET_BE(tp, v, field, res) do { \ v 47 lib/test_bitfield.c _res = be##tp##_encode_bits(v, field); \ v 49 lib/test_bitfield.c pr_warn("be" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != 0x%llx\n",\ v 54 lib/test_bitfield.c if (be##tp##_get_bits(_res, field) != v) \ v 59 lib/test_bitfield.c #define CHECK_ENC_GET(tp, v, field, res) do { \ v 60 lib/test_bitfield.c CHECK_ENC_GET_U(tp, v, field, res); \ v 61 lib/test_bitfield.c CHECK_ENC_GET_LE(tp, v, field, res); \ v 62 lib/test_bitfield.c CHECK_ENC_GET_BE(tp, v, field, res); \ v 103 lib/test_bitfield.c u64 v; \ v 105 lib/test_bitfield.c for (v = 0; v < 1 << hweight32(mask); v++) \ v 106 lib/test_bitfield.c if (tp##_encode_bits(v, mask) != v << __ffs64(mask)) \ v 10 lib/test_string.c u16 v, *p; v 18 lib/test_string.c memset(p, 0xa1, 256 * 2 * sizeof(v)); v 21 lib/test_string.c v = p[k]; v 23 lib/test_string.c if (v != 0xa1a1) v 26 lib/test_string.c if (v != 0xb1b2) v 29 lib/test_string.c if (v != 0xa1a1) v 46 lib/test_string.c u32 v, *p; v 54 lib/test_string.c memset(p, 0xa1, 256 * 2 * sizeof(v)); v 57 lib/test_string.c v = p[k]; v 59 lib/test_string.c if (v != 0xa1a1a1a1) v 62 lib/test_string.c if (v != 0xb1b2b3b4) v 65 lib/test_string.c if (v != 0xa1a1a1a1) v 82 lib/test_string.c u64 v, *p; v 90 lib/test_string.c memset(p, 0xa1, 256 * 2 * sizeof(v)); v 93 lib/test_string.c v = p[k]; v 95 lib/test_string.c if (v != 0xa1a1a1a1a1a1a1a1ULL) v 98 lib/test_string.c if (v != 0xb1b2b3b4b5b6b7b8ULL) v 101 lib/test_string.c if (v != 0xa1a1a1a1a1a1a1a1ULL) v 63 lib/win_minmax.c return m->s[0].v; v 69 lib/win_minmax.c struct minmax_sample val = { .t = t, .v = meas }; v 71 lib/win_minmax.c if (unlikely(val.v >= m->s[0].v) || /* found new max? */ v 75 lib/win_minmax.c if (unlikely(val.v >= m->s[1].v)) v 77 lib/win_minmax.c else if (unlikely(val.v >= m->s[2].v)) v 87 lib/win_minmax.c struct minmax_sample val = { .t = t, .v = meas }; v 89 lib/win_minmax.c if (unlikely(val.v <= m->s[0].v) || /* found new min? */ v 93 lib/win_minmax.c if (unlikely(val.v <= m->s[1].v)) v 95 lib/win_minmax.c else if (unlikely(val.v <= m->s[2].v)) v 377 lib/zlib_deflate/deftree.c int v = s->heap[k]; v 386 lib/zlib_deflate/deftree.c if (smaller(tree, v, s->heap[j], s->depth)) break; v 394 lib/zlib_deflate/deftree.c s->heap[k] = v; v 49 mm/backing-dev.c static int bdi_debug_stats_show(struct seq_file *m, void *v) v 8 mm/debug_page_ref.c void __page_ref_set(struct page *page, int v) v 10 mm/debug_page_ref.c trace_page_ref_set(page, v); v 15 mm/debug_page_ref.c void __page_ref_mod(struct page *page, int v) v 17 mm/debug_page_ref.c trace_page_ref_mod(page, v); v 22 mm/debug_page_ref.c void __page_ref_mod_and_test(struct page *page, int v, int ret) v 24 mm/debug_page_ref.c trace_page_ref_mod_and_test(page, v, ret); v 29 mm/debug_page_ref.c void __page_ref_mod_and_return(struct page *page, int v, int ret) v 31 mm/debug_page_ref.c trace_page_ref_mod_and_return(page, v, ret); v 36 mm/debug_page_ref.c void __page_ref_mod_unless(struct page *page, int v, int u) v 38 mm/debug_page_ref.c trace_page_ref_mod_unless(page, v, u); v 43 mm/debug_page_ref.c void __page_ref_freeze(struct page *page, int v, int ret) v 45 mm/debug_page_ref.c trace_page_ref_freeze(page, v, ret); v 50 mm/debug_page_ref.c void __page_ref_unfreeze(struct page *page, int v) v 52 mm/debug_page_ref.c trace_page_ref_unfreeze(page, v); v 13 mm/interval_tree.c static inline unsigned long vma_start_pgoff(struct vm_area_struct *v) v 15 mm/interval_tree.c return v->vm_pgoff; v 18 mm/interval_tree.c static inline unsigned long vma_last_pgoff(struct vm_area_struct *v) v 20 mm/interval_tree.c return v->vm_pgoff + vma_pages(v) - 1; v 1640 mm/kmemleak.c static void *kmemleak_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1642 mm/kmemleak.c struct kmemleak_object *prev_obj = v; v 1662 mm/kmemleak.c static void kmemleak_seq_stop(struct seq_file *seq, void *v) v 1664 mm/kmemleak.c if (!IS_ERR(v)) { v 1671 mm/kmemleak.c if (v) v 1672 mm/kmemleak.c put_object(v); v 1679 mm/kmemleak.c static int kmemleak_seq_show(struct seq_file *seq, void *v) v 1681 mm/kmemleak.c struct kmemleak_object *object = v; v 3828 mm/memcontrol.c static int memcg_numa_stat_show(struct seq_file *m, void *v) v 3915 mm/memcontrol.c static int memcg_stat_show(struct seq_file *m, void *v) v 4348 mm/memcontrol.c static int mem_cgroup_oom_control_read(struct seq_file *sf, void *v) v 6082 mm/memcontrol.c static int memory_min_show(struct seq_file *m, void *v) v 6105 mm/memcontrol.c static int memory_low_show(struct seq_file *m, void *v) v 6128 mm/memcontrol.c static int memory_high_show(struct seq_file *m, void *v) v 6157 mm/memcontrol.c static int memory_max_show(struct seq_file *m, void *v) v 6222 mm/memcontrol.c static int memory_events_show(struct seq_file *m, void *v) v 6230 mm/memcontrol.c static int memory_events_local_show(struct seq_file *m, void *v) v 6238 mm/memcontrol.c static int memory_stat_show(struct seq_file *m, void *v) v 6251 mm/memcontrol.c static int memory_oom_group_show(struct seq_file *m, void *v) v 7230 mm/memcontrol.c static int swap_max_show(struct seq_file *m, void *v) v 7253 mm/memcontrol.c static int swap_events_show(struct seq_file *m, void *v) v 171 mm/mempolicy.c pol->v.nodes = *nodes; v 182 mm/mempolicy.c pol->v.preferred_node = first_node(*nodes); v 190 mm/mempolicy.c pol->v.nodes = *nodes; v 307 mm/mempolicy.c nodes_remap(tmp, pol->v.nodes,pol->w.cpuset_mems_allowed, v 315 mm/mempolicy.c pol->v.nodes = tmp; v 327 mm/mempolicy.c pol->v.preferred_node = node; v 333 mm/mempolicy.c pol->v.preferred_node = first_node(tmp); v 335 mm/mempolicy.c pol->v.preferred_node = node_remap(pol->v.preferred_node, v 842 mm/mempolicy.c *nodes = p->v.nodes; v 846 mm/mempolicy.c node_set(p->v.preferred_node, *nodes); v 932 mm/mempolicy.c *policy = next_node_in(current->il_prev, pol->v.nodes); v 1786 mm/mempolicy.c if (!nodes_intersects(policy->v.nodes, node_states[N_HIGH_MEMORY])) v 1801 mm/mempolicy.c cpuset_nodemask_valid_mems_allowed(&policy->v.nodes)) v 1802 mm/mempolicy.c return &policy->v.nodes; v 1812 mm/mempolicy.c nd = policy->v.preferred_node; v 1831 mm/mempolicy.c next = next_node_in(me->il_prev, policy->v.nodes); v 1858 mm/mempolicy.c return policy->v.preferred_node; v 1874 mm/mempolicy.c &policy->v.nodes); v 1890 mm/mempolicy.c unsigned nnodes = nodes_weight(pol->v.nodes); v 1898 mm/mempolicy.c nid = first_node(pol->v.nodes); v 1900 mm/mempolicy.c nid = next_node(nid, pol->v.nodes); v 1956 mm/mempolicy.c *nodemask = &(*mpol)->v.nodes; v 1992 mm/mempolicy.c nid = mempolicy->v.preferred_node; v 1999 mm/mempolicy.c *mask = mempolicy->v.nodes; v 2045 mm/mempolicy.c ret = nodes_intersects(mempolicy->v.nodes, *mask); v 2131 mm/mempolicy.c hpage_node = pol->v.preferred_node; v 2262 mm/mempolicy.c return !!nodes_equal(a->v.nodes, b->v.nodes); v 2267 mm/mempolicy.c return a->v.preferred_node == b->v.preferred_node; v 2411 mm/mempolicy.c polnid = pol->v.preferred_node; v 2422 mm/mempolicy.c if (node_isset(curnid, pol->v.nodes)) v 2427 mm/mempolicy.c &pol->v.nodes); v 2630 mm/mempolicy.c npol ? nodes_addr(npol->v.nodes)[0] : NUMA_NO_NODE); v 2728 mm/mempolicy.c .v = { .preferred_node = nid, }, v 2892 mm/mempolicy.c new->v.nodes = nodes; v 2894 mm/mempolicy.c new->v.preferred_node = first_node(nodes); v 2947 mm/mempolicy.c node_set(pol->v.preferred_node, nodes); v 2951 mm/mempolicy.c nodes = pol->v.nodes; v 135 mm/percpu-stats.c static int percpu_stats_show(struct seq_file *m, void *v) v 2173 mm/percpu.c int group, v; v 2176 mm/percpu.c v = ai->nr_groups; v 2177 mm/percpu.c while (v /= 10) v 2180 mm/percpu.c v = num_possible_cpus(); v 2181 mm/percpu.c while (v /= 10) v 4795 mm/slub.c int v; v 4797 mm/slub.c if (get_option(&str, &v) > 0) v 4798 mm/slub.c memcg_sysfs_enabled = v; v 48 mm/swap_state.c #define SWAP_RA_HITS(v) ((v) & SWAP_RA_HITS_MASK) v 49 mm/swap_state.c #define SWAP_RA_WIN(v) (((v) & SWAP_RA_WIN_MASK) >> SWAP_RA_WIN_SHIFT) v 50 mm/swap_state.c #define SWAP_RA_ADDR(v) ((v) & PAGE_MASK) v 2730 mm/swapfile.c static void *swap_next(struct seq_file *swap, void *v, loff_t *pos) v 2732 mm/swapfile.c struct swap_info_struct *si = v; v 2735 mm/swapfile.c if (v == SEQ_START_TOKEN) v 2750 mm/swapfile.c static void swap_stop(struct seq_file *swap, void *v) v 2755 mm/swapfile.c static int swap_show(struct seq_file *swap, void *v) v 2757 mm/swapfile.c struct swap_info_struct *si = v; v 3450 mm/vmalloc.c static void show_numa_info(struct seq_file *m, struct vm_struct *v) v 3458 mm/vmalloc.c if (v->flags & VM_UNINITIALIZED) v 3465 mm/vmalloc.c for (nr = 0; nr < v->nr_pages; nr++) v 3466 mm/vmalloc.c counters[page_to_nid(v->pages[nr])]++; v 3493 mm/vmalloc.c struct vm_struct *v; v 3509 mm/vmalloc.c v = va->vm; v 3512 mm/vmalloc.c v->addr, v->addr + v->size, v->size); v 3514 mm/vmalloc.c if (v->caller) v 3515 mm/vmalloc.c seq_printf(m, " %pS", v->caller); v 3517 mm/vmalloc.c if (v->nr_pages) v 3518 mm/vmalloc.c seq_printf(m, " pages=%d", v->nr_pages); v 3520 mm/vmalloc.c if (v->phys_addr) v 3521 mm/vmalloc.c seq_printf(m, " phys=%pa", &v->phys_addr); v 3523 mm/vmalloc.c if (v->flags & VM_IOREMAP) v 3526 mm/vmalloc.c if (v->flags & VM_ALLOC) v 3529 mm/vmalloc.c if (v->flags & VM_MAP) v 3532 mm/vmalloc.c if (v->flags & VM_USERMAP) v 3535 mm/vmalloc.c if (v->flags & VM_DMA_COHERENT) v 3538 mm/vmalloc.c if (is_vmalloc_addr(v->pages)) v 3541 mm/vmalloc.c show_numa_info(m, v); v 383 mm/vmstat.c s8 v, t; v 385 mm/vmstat.c v = __this_cpu_inc_return(*p); v 387 mm/vmstat.c if (unlikely(v > t)) { v 390 mm/vmstat.c zone_page_state_add(v + overstep, zone, item); v 399 mm/vmstat.c s8 v, t; v 401 mm/vmstat.c v = __this_cpu_inc_return(*p); v 403 mm/vmstat.c if (unlikely(v > t)) { v 406 mm/vmstat.c node_page_state_add(v + overstep, pgdat, item); v 427 mm/vmstat.c s8 v, t; v 429 mm/vmstat.c v = __this_cpu_dec_return(*p); v 431 mm/vmstat.c if (unlikely(v < - t)) { v 434 mm/vmstat.c zone_page_state_add(v - overstep, zone, item); v 443 mm/vmstat.c s8 v, t; v 445 mm/vmstat.c v = __this_cpu_dec_return(*p); v 447 mm/vmstat.c if (unlikely(v < - t)) { v 450 mm/vmstat.c node_page_state_add(v - overstep, pgdat, item); v 761 mm/vmstat.c int v; v 763 mm/vmstat.c v = this_cpu_xchg(p->vm_stat_diff[i], 0); v 764 mm/vmstat.c if (v) { v 766 mm/vmstat.c atomic_long_add(v, &zone->vm_stat[i]); v 767 mm/vmstat.c global_zone_diff[i] += v; v 776 mm/vmstat.c int v; v 778 mm/vmstat.c v = this_cpu_xchg(p->vm_numa_stat_diff[i], 0); v 779 mm/vmstat.c if (v) { v 781 mm/vmstat.c atomic_long_add(v, &zone->vm_numa_stat[i]); v 782 mm/vmstat.c global_numa_diff[i] += v; v 823 mm/vmstat.c int v; v 825 mm/vmstat.c v = this_cpu_xchg(p->vm_node_stat_diff[i], 0); v 826 mm/vmstat.c if (v) { v 827 mm/vmstat.c atomic_long_add(v, &pgdat->vm_stat[i]); v 828 mm/vmstat.c global_node_diff[i] += v; v 865 mm/vmstat.c int v; v 867 mm/vmstat.c v = p->vm_stat_diff[i]; v 869 mm/vmstat.c atomic_long_add(v, &zone->vm_stat[i]); v 870 mm/vmstat.c global_zone_diff[i] += v; v 876 mm/vmstat.c int v; v 878 mm/vmstat.c v = p->vm_numa_stat_diff[i]; v 880 mm/vmstat.c atomic_long_add(v, &zone->vm_numa_stat[i]); v 881 mm/vmstat.c global_numa_diff[i] += v; v 893 mm/vmstat.c int v; v 895 mm/vmstat.c v = p->vm_node_stat_diff[i]; v 897 mm/vmstat.c atomic_long_add(v, &pgdat->vm_stat[i]); v 898 mm/vmstat.c global_node_diff[i] += v; v 919 mm/vmstat.c int v = pset->vm_stat_diff[i]; v 921 mm/vmstat.c atomic_long_add(v, &zone->vm_stat[i]); v 922 mm/vmstat.c atomic_long_add(v, &vm_zone_stat[i]); v 928 mm/vmstat.c int v = pset->vm_numa_stat_diff[i]; v 931 mm/vmstat.c atomic_long_add(v, &zone->vm_numa_stat[i]); v 932 mm/vmstat.c atomic_long_add(v, &vm_numa_stat[i]); v 944 mm/vmstat.c u16 v; v 946 mm/vmstat.c v = __this_cpu_inc_return(*p); v 948 mm/vmstat.c if (unlikely(v > NUMA_STATS_THRESHOLD)) { v 949 mm/vmstat.c zone_numa_state_add(v, zone, item); v 1669 mm/vmstat.c unsigned long *v; v 1685 mm/vmstat.c v = kmalloc(stat_items_size, GFP_KERNEL); v 1686 mm/vmstat.c m->private = v; v 1687 mm/vmstat.c if (!v) v 1690 mm/vmstat.c v[i] = global_zone_page_state(i); v 1691 mm/vmstat.c v += NR_VM_ZONE_STAT_ITEMS; v 1695 mm/vmstat.c v[i] = global_numa_state(i); v 1696 mm/vmstat.c v += NR_VM_NUMA_STAT_ITEMS; v 1700 mm/vmstat.c v[i] = global_node_page_state(i); v 1701 mm/vmstat.c v += NR_VM_NODE_STAT_ITEMS; v 1703 mm/vmstat.c global_dirty_limits(v + NR_DIRTY_BG_THRESHOLD, v 1704 mm/vmstat.c v + NR_DIRTY_THRESHOLD); v 1705 mm/vmstat.c v += NR_VM_WRITEBACK_STAT_ITEMS; v 1708 mm/vmstat.c all_vm_events(v); v 1709 mm/vmstat.c v[PGPGIN] /= 2; /* sectors -> kbytes */ v 1710 mm/vmstat.c v[PGPGOUT] /= 2; v 590 mm/zsmalloc.c static int zs_stats_size_show(struct seq_file *s, void *v) v 217 net/802/mrp.c u8 *v = (u8 *)value; v 222 net/802/mrp.c while (len > 0 && !++v[--len]) v 36 net/8021q/vlanproc.c static int vlan_seq_show(struct seq_file *seq, void *v); v 38 net/8021q/vlanproc.c static void *vlan_seq_next(struct seq_file *seq, void *v, loff_t *pos); v 40 net/8021q/vlanproc.c static int vlandev_seq_show(struct seq_file *seq, void *v); v 189 net/8021q/vlanproc.c static void *vlan_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 196 net/8021q/vlanproc.c dev = v; v 197 net/8021q/vlanproc.c if (v == SEQ_START_TOKEN) v 210 net/8021q/vlanproc.c static void vlan_seq_stop(struct seq_file *seq, void *v) v 216 net/8021q/vlanproc.c static int vlan_seq_show(struct seq_file *seq, void *v) v 221 net/8021q/vlanproc.c if (v == SEQ_START_TOKEN) { v 232 net/8021q/vlanproc.c const struct net_device *vlandev = v; v 247 net/9p/trans_fd.c static int p9_fd_read(struct p9_client *client, void *v, int len) v 263 net/9p/trans_fd.c ret = kernel_read(ts->rd, v, len, &pos); v 410 net/9p/trans_fd.c static int p9_fd_write(struct p9_client *client, void *v, int len) v 424 net/9p/trans_fd.c ret = kernel_write(ts->wr, v, len, &ts->wr->f_pos); v 413 net/9p/trans_virtio.c __le32 v = cpu_to_le32(n); v 414 net/9p/trans_virtio.c memcpy(&req->tc.sdata[req->tc.size - 4], &v, 4); v 432 net/9p/trans_virtio.c __le32 v = cpu_to_le32(n); v 433 net/9p/trans_virtio.c memcpy(&req->tc.sdata[req->tc.size - 4], &v, 4); v 963 net/appletalk/aarp.c static void *aarp_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 965 net/appletalk/aarp.c struct aarp_entry *entry = v; v 971 net/appletalk/aarp.c if (v == SEQ_START_TOKEN) v 986 net/appletalk/aarp.c static void aarp_seq_stop(struct seq_file *seq, void *v) v 1001 net/appletalk/aarp.c static int aarp_seq_show(struct seq_file *seq, void *v) v 1004 net/appletalk/aarp.c struct aarp_entry *entry = v; v 1007 net/appletalk/aarp.c if (v == SEQ_START_TOKEN) v 36 net/appletalk/atalk_proc.c static void *atalk_seq_interface_next(struct seq_file *seq, void *v, loff_t *pos) v 41 net/appletalk/atalk_proc.c if (v == SEQ_START_TOKEN) { v 47 net/appletalk/atalk_proc.c i = v; v 53 net/appletalk/atalk_proc.c static void atalk_seq_interface_stop(struct seq_file *seq, void *v) v 59 net/appletalk/atalk_proc.c static int atalk_seq_interface_show(struct seq_file *seq, void *v) v 63 net/appletalk/atalk_proc.c if (v == SEQ_START_TOKEN) { v 69 net/appletalk/atalk_proc.c iface = v; v 97 net/appletalk/atalk_proc.c static void *atalk_seq_route_next(struct seq_file *seq, void *v, loff_t *pos) v 102 net/appletalk/atalk_proc.c if (v == SEQ_START_TOKEN) { v 108 net/appletalk/atalk_proc.c r = v; v 114 net/appletalk/atalk_proc.c static void atalk_seq_route_stop(struct seq_file *seq, void *v) v 120 net/appletalk/atalk_proc.c static int atalk_seq_route_show(struct seq_file *seq, void *v) v 124 net/appletalk/atalk_proc.c if (v == SEQ_START_TOKEN) { v 136 net/appletalk/atalk_proc.c rt = v; v 152 net/appletalk/atalk_proc.c static void *atalk_seq_socket_next(struct seq_file *seq, void *v, loff_t *pos) v 154 net/appletalk/atalk_proc.c return seq_hlist_next(v, &atalk_sockets, pos); v 157 net/appletalk/atalk_proc.c static void atalk_seq_socket_stop(struct seq_file *seq, void *v) v 163 net/appletalk/atalk_proc.c static int atalk_seq_socket_show(struct seq_file *seq, void *v) v 168 net/appletalk/atalk_proc.c if (v == SEQ_START_TOKEN) { v 174 net/appletalk/atalk_proc.c s = sk_entry(v); v 772 net/atm/br2684.c static void *br2684_seq_next(struct seq_file *seq, void *v, loff_t * pos) v 774 net/atm/br2684.c return seq_list_next(v, &br2684_devs, pos); v 777 net/atm/br2684.c static void br2684_seq_stop(struct seq_file *seq, void *v) v 783 net/atm/br2684.c static int br2684_seq_show(struct seq_file *seq, void *v) v 785 net/atm/br2684.c const struct br2684_dev *brdev = list_entry(v, struct br2684_dev, v 843 net/atm/clip.c static int clip_seq_show(struct seq_file *seq, void *v) v 848 net/atm/clip.c if (v == SEQ_START_TOKEN) { v 853 net/atm/clip.c struct neighbour *n = v; v 856 net/atm/lec.c void *v = NULL; v 860 net/atm/lec.c v = lec_tbl_walk(state, &priv->lec_arp_tables[p], l); v 861 net/atm/lec.c if (v) v 865 net/atm/lec.c return v; v 876 net/atm/lec.c void *v = NULL; v 880 net/atm/lec.c v = lec_tbl_walk(state, lec_misc_tables[q], l); v 881 net/atm/lec.c if (v) v 885 net/atm/lec.c return v; v 907 net/atm/lec.c void *v; v 910 net/atm/lec.c v = (dev && netdev_priv(dev)) ? v 912 net/atm/lec.c if (!v && dev) { v 918 net/atm/lec.c return v; v 923 net/atm/lec.c void *v = NULL; v 926 net/atm/lec.c v = lec_itf_walk(state, &l); v 927 net/atm/lec.c if (v) v 930 net/atm/lec.c return v; v 947 net/atm/lec.c static void lec_seq_stop(struct seq_file *seq, void *v) v 958 net/atm/lec.c static void *lec_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 962 net/atm/lec.c v = lec_get_idx(state, 1); v 963 net/atm/lec.c *pos += !!PTR_ERR(v); v 964 net/atm/lec.c return v; v 967 net/atm/lec.c static int lec_seq_show(struct seq_file *seq, void *v) v 974 net/atm/lec.c if (v == SEQ_START_TOKEN) v 120 net/atm/mpoa_proc.c static void *mpc_next(struct seq_file *m, void *v, loff_t *pos) v 122 net/atm/mpoa_proc.c struct mpoa_client *p = v; v 124 net/atm/mpoa_proc.c return v == SEQ_START_TOKEN ? mpcs : p->next; v 127 net/atm/mpoa_proc.c static void mpc_stop(struct seq_file *m, void *v) v 134 net/atm/mpoa_proc.c static int mpc_show(struct seq_file *m, void *v) v 136 net/atm/mpoa_proc.c struct mpoa_client *mpc = v; v 143 net/atm/mpoa_proc.c if (v == SEQ_START_TOKEN) { v 128 net/atm/proc.c static void vcc_seq_stop(struct seq_file *seq, void *v) v 134 net/atm/proc.c static void *vcc_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 136 net/atm/proc.c v = vcc_walk(seq, 1); v 137 net/atm/proc.c if (v) v 139 net/atm/proc.c return v; v 225 net/atm/proc.c static int atm_dev_seq_show(struct seq_file *seq, void *v) v 231 net/atm/proc.c if (v == &atm_devs) v 234 net/atm/proc.c struct atm_dev *dev = list_entry(v, struct atm_dev, dev_list); v 248 net/atm/proc.c static int pvc_seq_show(struct seq_file *seq, void *v) v 253 net/atm/proc.c if (v == SEQ_START_TOKEN) v 271 net/atm/proc.c static int vcc_seq_show(struct seq_file *seq, void *v) v 273 net/atm/proc.c if (v == SEQ_START_TOKEN) { v 293 net/atm/proc.c static int svc_seq_show(struct seq_file *seq, void *v) v 298 net/atm/proc.c if (v == SEQ_START_TOKEN) v 452 net/atm/resources.c void atm_dev_seq_stop(struct seq_file *seq, void *v) v 457 net/atm/resources.c void *atm_dev_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 459 net/atm/resources.c return seq_list_next(v, &atm_devs, pos); v 25 net/atm/resources.h void atm_dev_seq_stop(struct seq_file *seq, void *v); v 26 net/atm/resources.h void *atm_dev_seq_next(struct seq_file *seq, void *v, loff_t *pos); v 1861 net/ax25/af_ax25.c static void *ax25_info_next(struct seq_file *seq, void *v, loff_t *pos) v 1863 net/ax25/af_ax25.c return seq_hlist_next(v, &ax25_list, pos); v 1866 net/ax25/af_ax25.c static void ax25_info_stop(struct seq_file *seq, void *v) v 1872 net/ax25/af_ax25.c static int ax25_info_show(struct seq_file *seq, void *v) v 1874 net/ax25/af_ax25.c ax25_cb *ax25 = hlist_entry(v, struct ax25_cb, ax25_node); v 268 net/ax25/ax25_route.c static void *ax25_rt_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 271 net/ax25/ax25_route.c return (v == SEQ_START_TOKEN) ? ax25_route_list : v 272 net/ax25/ax25_route.c ((struct ax25_route *) v)->next; v 275 net/ax25/ax25_route.c static void ax25_rt_seq_stop(struct seq_file *seq, void *v) v 281 net/ax25/ax25_route.c static int ax25_rt_seq_show(struct seq_file *seq, void *v) v 285 net/ax25/ax25_route.c if (v == SEQ_START_TOKEN) v 288 net/ax25/ax25_route.c struct ax25_route *ax25_rt = v; v 153 net/ax25/ax25_uid.c static void *ax25_uid_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 155 net/ax25/ax25_uid.c return seq_hlist_next(v, &ax25_uid_list, pos); v 158 net/ax25/ax25_uid.c static void ax25_uid_seq_stop(struct seq_file *seq, void *v) v 164 net/ax25/ax25_uid.c static int ax25_uid_seq_show(struct seq_file *seq, void *v) v 168 net/ax25/ax25_uid.c if (v == SEQ_START_TOKEN) v 173 net/ax25/ax25_uid.c pt = hlist_entry(v, struct ax25_uid_assoc, uid_node); v 294 net/batman-adv/main.h #define batadv_atomic_dec_not_zero(v) atomic_add_unless((v), -1, 0) v 330 net/batman-adv/translation-table.c unsigned short vid, int v) v 338 net/batman-adv/translation-table.c atomic_add(v, &vlan->tt.num_entries); v 375 net/batman-adv/translation-table.c unsigned short vid, int v) v 383 net/batman-adv/translation-table.c if (atomic_add_return(v, &vlan->tt.num_entries) == 0) { v 619 net/bluetooth/af_bluetooth.c static void *bt_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 623 net/bluetooth/af_bluetooth.c return seq_hlist_next(v, &l->head, pos); v 626 net/bluetooth/af_bluetooth.c static void bt_seq_stop(struct seq_file *seq, void *v) v 634 net/bluetooth/af_bluetooth.c static int bt_seq_show(struct seq_file *seq, void *v) v 638 net/bluetooth/af_bluetooth.c if (v == SEQ_START_TOKEN) { v 643 net/bluetooth/af_bluetooth.c l->custom_seq_show(seq, v); v 648 net/bluetooth/af_bluetooth.c struct sock *sk = sk_entry(v); v 663 net/bluetooth/af_bluetooth.c l->custom_seq_show(seq, v); v 507 net/bluetooth/cmtp/capi.c static int cmtp_proc_show(struct seq_file *m, void *v) v 214 net/bluetooth/smp.c const u8 v[32], const u8 x[16], u8 z, u8 res[16]) v 220 net/bluetooth/smp.c SMP_DBG("v %32phN", v); v 224 net/bluetooth/smp.c memcpy(m + 1, v, 32); v 317 net/bluetooth/smp.c static int smp_g2(struct crypto_shash *tfm_cmac, const u8 u[32], const u8 v[32], v 324 net/bluetooth/smp.c SMP_DBG("v %32phN", v); v 328 net/bluetooth/smp.c memcpy(m + 16, v, 32); v 3637 net/bluetooth/smp.c const u8 v[32] = { v 3652 net/bluetooth/smp.c err = smp_f4(tfm_cmac, u, v, x, z, res); v 3739 net/bluetooth/smp.c const u8 v[32] = { v 3754 net/bluetooth/smp.c err = smp_g2(tfm_cmac, u, v, x, y, &val); v 217 net/bridge/br_fdb.c const struct net_bridge_vlan *v; v 233 net/bridge/br_fdb.c v = br_vlan_find(vg, vid); v 236 net/bridge/br_fdb.c (!vid || (v && br_vlan_should_use(v)))) { v 263 net/bridge/br_fdb.c struct net_bridge_vlan *v; v 292 net/bridge/br_fdb.c list_for_each_entry(v, &vg->vlan_list, vlist) v 293 net/bridge/br_fdb.c fdb_insert(br, p, newaddr, v->vid); v 303 net/bridge/br_fdb.c struct net_bridge_vlan *v; v 320 net/bridge/br_fdb.c list_for_each_entry(v, &vg->vlan_list, vlist) { v 321 net/bridge/br_fdb.c if (!br_vlan_should_use(v)) v 323 net/bridge/br_fdb.c f = br_fdb_find(br, br->dev->dev_addr, v->vid); v 326 net/bridge/br_fdb.c fdb_insert(br, NULL, newaddr, v->vid); v 918 net/bridge/br_fdb.c struct net_bridge_vlan *v; v 949 net/bridge/br_fdb.c v = br_vlan_find(vg, vid); v 950 net/bridge/br_fdb.c if (!v || !br_vlan_should_use(v)) { v 966 net/bridge/br_fdb.c list_for_each_entry(v, &vg->vlan_list, vlist) { v 967 net/bridge/br_fdb.c if (!br_vlan_should_use(v)) v 969 net/bridge/br_fdb.c err = __br_fdb_add(ndm, br, p, addr, nlh_flags, v->vid); v 1014 net/bridge/br_fdb.c struct net_bridge_vlan *v; v 1033 net/bridge/br_fdb.c v = br_vlan_find(vg, vid); v 1034 net/bridge/br_fdb.c if (!v) { v 1046 net/bridge/br_fdb.c list_for_each_entry(v, &vg->vlan_list, vlist) { v 1047 net/bridge/br_fdb.c if (!br_vlan_should_use(v)) v 1049 net/bridge/br_fdb.c err &= __br_fdb_delete(br, p, addr, v->vid); v 688 net/bridge/br_mdb.c struct net_bridge_vlan *v; v 715 net/bridge/br_mdb.c list_for_each_entry(v, &vg->vlan_list, vlist) { v 716 net/bridge/br_mdb.c entry->vid = v->vid; v 793 net/bridge/br_mdb.c struct net_bridge_vlan *v; v 820 net/bridge/br_mdb.c list_for_each_entry(v, &vg->vlan_list, vlist) { v 821 net/bridge/br_mdb.c entry->vid = v->vid; v 24 net/bridge/br_netlink.c struct net_bridge_vlan *v; v 34 net/bridge/br_netlink.c list_for_each_entry_rcu(v, &vg->vlan_list, vlist) { v 37 net/bridge/br_netlink.c if (!br_vlan_should_use(v)) v 39 net/bridge/br_netlink.c if (v->vid == pvid) v 42 net/bridge/br_netlink.c if (v->flags & BRIDGE_VLAN_INFO_UNTAGGED) v 47 net/bridge/br_netlink.c } else if ((v->vid - vid_range_end) == 1 && v 49 net/bridge/br_netlink.c vid_range_end = v->vid; v 58 net/bridge/br_netlink.c vid_range_start = v->vid; v 59 net/bridge/br_netlink.c vid_range_end = v->vid; v 284 net/bridge/br_netlink.c struct net_bridge_vlan *v; v 294 net/bridge/br_netlink.c list_for_each_entry_rcu(v, &vg->vlan_list, vlist) { v 296 net/bridge/br_netlink.c if (!br_vlan_should_use(v)) v 298 net/bridge/br_netlink.c if (v->vid == pvid) v 301 net/bridge/br_netlink.c if (v->flags & BRIDGE_VLAN_INFO_UNTAGGED) v 306 net/bridge/br_netlink.c } else if ((v->vid - vid_range_end) == 1 && v 308 net/bridge/br_netlink.c vid_range_end = v->vid; v 319 net/bridge/br_netlink.c vid_range_start = v->vid; v 320 net/bridge/br_netlink.c vid_range_end = v->vid; v 340 net/bridge/br_netlink.c struct net_bridge_vlan *v; v 344 net/bridge/br_netlink.c list_for_each_entry_rcu(v, &vg->vlan_list, vlist) { v 345 net/bridge/br_netlink.c if (!br_vlan_should_use(v)) v 348 net/bridge/br_netlink.c vinfo.vid = v->vid; v 350 net/bridge/br_netlink.c if (v->vid == pvid) v 353 net/bridge/br_netlink.c if (v->flags & BRIDGE_VLAN_INFO_UNTAGGED) v 587 net/bridge/br_netlink.c int v, err; v 597 net/bridge/br_netlink.c for (v = (*vinfo_last)->vid; v <= vinfo_curr->vid; v++) { v 598 net/bridge/br_netlink.c tmp_vinfo.vid = v; v 1511 net/bridge/br_netlink.c struct net_bridge_vlan *v; v 1533 net/bridge/br_netlink.c list_for_each_entry(v, &vg->vlan_list, vlist) v 1549 net/bridge/br_netlink.c struct net_bridge_vlan *v; v 1578 net/bridge/br_netlink.c list_for_each_entry(v, &vg->vlan_list, vlist) { v 1585 net/bridge/br_netlink.c vxi.vid = v->vid; v 1586 net/bridge/br_netlink.c vxi.flags = v->flags; v 1587 net/bridge/br_netlink.c if (v->vid == pvid) v 1589 net/bridge/br_netlink.c br_vlan_get_stats(v, &stats); v 40 net/bridge/br_netlink_tunnel.c struct net_bridge_vlan *v, *vtbegin = NULL, *vtend = NULL; v 44 net/bridge/br_netlink_tunnel.c list_for_each_entry_rcu(v, &vg->vlan_list, vlist) { v 46 net/bridge/br_netlink_tunnel.c if (!br_vlan_should_use(v) || !v->tinfo.tunnel_id) v 51 net/bridge/br_netlink_tunnel.c } else if ((v->vid - vtend->vid) == 1 && v 52 net/bridge/br_netlink_tunnel.c vlan_tunid_inrange(v, vtend)) { v 53 net/bridge/br_netlink_tunnel.c vtend = v; v 62 net/bridge/br_netlink_tunnel.c vtbegin = v; v 63 net/bridge/br_netlink_tunnel.c vtend = v; v 153 net/bridge/br_netlink_tunnel.c struct net_bridge_vlan *v; v 157 net/bridge/br_netlink_tunnel.c list_for_each_entry_rcu(v, &vg->vlan_list, vlist) { v 159 net/bridge/br_netlink_tunnel.c if (!br_vlan_should_use(v)) v 162 net/bridge/br_netlink_tunnel.c if (!v->tinfo.tunnel_dst) v 167 net/bridge/br_netlink_tunnel.c } else if ((v->vid - vtend->vid) == 1 && v 168 net/bridge/br_netlink_tunnel.c vlan_tunid_inrange(v, vtend)) { v 169 net/bridge/br_netlink_tunnel.c vtend = v; v 177 net/bridge/br_netlink_tunnel.c vtbegin = v; v 178 net/bridge/br_netlink_tunnel.c vtend = v; v 266 net/bridge/br_netlink_tunnel.c int t, v; v 274 net/bridge/br_netlink_tunnel.c for (v = tinfo_last->vid; v <= tinfo_curr->vid; v++) { v 275 net/bridge/br_netlink_tunnel.c err = br_vlan_tunnel_info(p, cmd, v, t, changed); v 474 net/bridge/br_private.h static inline bool br_vlan_is_master(const struct net_bridge_vlan *v) v 476 net/bridge/br_private.h return v->flags & BRIDGE_VLAN_INFO_MASTER; v 480 net/bridge/br_private.h static inline bool br_vlan_is_brentry(const struct net_bridge_vlan *v) v 482 net/bridge/br_private.h return v->flags & BRIDGE_VLAN_INFO_BRENTRY; v 486 net/bridge/br_private.h static inline bool br_vlan_should_use(const struct net_bridge_vlan *v) v 488 net/bridge/br_private.h if (br_vlan_is_master(v)) { v 489 net/bridge/br_private.h if (br_vlan_is_brentry(v)) v 897 net/bridge/br_private.h void br_vlan_get_stats(const struct net_bridge_vlan *v, v 1081 net/bridge/br_private.h static inline void br_vlan_get_stats(const struct net_bridge_vlan *v, v 148 net/bridge/br_switchdev.c struct switchdev_obj_port_vlan v = { v 156 net/bridge/br_switchdev.c return switchdev_port_obj_add(dev, &v.obj, extack); v 161 net/bridge/br_switchdev.c struct switchdev_obj_port_vlan v = { v 168 net/bridge/br_switchdev.c return switchdev_port_obj_del(dev, &v.obj); v 48 net/bridge/br_sysfs_if.c static int store_##_name(struct net_bridge_port *p, unsigned long v) \ v 50 net/bridge/br_sysfs_if.c return store_flag(p, v, _mask); \ v 55 net/bridge/br_sysfs_if.c static int store_flag(struct net_bridge_port *p, unsigned long v, v 62 net/bridge/br_sysfs_if.c if (v) v 166 net/bridge/br_sysfs_if.c static int store_flush(struct net_bridge_port *p, unsigned long v) v 179 net/bridge/br_sysfs_if.c unsigned long v) v 181 net/bridge/br_sysfs_if.c if (v & BR_GROUPFWD_MACPAUSE) v 183 net/bridge/br_sysfs_if.c p->group_fwd_mask = v; v 241 net/bridge/br_sysfs_if.c unsigned long v) v 243 net/bridge/br_sysfs_if.c return br_multicast_set_port_router(p, v); v 60 net/bridge/br_vlan.c static bool __vlan_add_flags(struct net_bridge_vlan *v, u16 flags) v 63 net/bridge/br_vlan.c u16 old_flags = v->flags; v 66 net/bridge/br_vlan.c if (br_vlan_is_master(v)) v 67 net/bridge/br_vlan.c vg = br_vlan_group(v->br); v 69 net/bridge/br_vlan.c vg = nbp_vlan_group(v->port); v 72 net/bridge/br_vlan.c ret = __vlan_add_pvid(vg, v->vid); v 74 net/bridge/br_vlan.c ret = __vlan_delete_pvid(vg, v->vid); v 77 net/bridge/br_vlan.c v->flags |= BRIDGE_VLAN_INFO_UNTAGGED; v 79 net/bridge/br_vlan.c v->flags &= ~BRIDGE_VLAN_INFO_UNTAGGED; v 81 net/bridge/br_vlan.c return ret || !!(old_flags ^ v->flags); v 85 net/bridge/br_vlan.c struct net_bridge_vlan *v, u16 flags, v 93 net/bridge/br_vlan.c err = br_switchdev_port_vlan_add(dev, v->vid, flags, extack); v 95 net/bridge/br_vlan.c return vlan_vid_add(dev, br->vlan_proto, v->vid); v 96 net/bridge/br_vlan.c v->priv_flags |= BR_VLFLAG_ADDED_BY_SWITCHDEV; v 100 net/bridge/br_vlan.c static void __vlan_add_list(struct net_bridge_vlan *v) v 106 net/bridge/br_vlan.c if (br_vlan_is_master(v)) v 107 net/bridge/br_vlan.c vg = br_vlan_group(v->br); v 109 net/bridge/br_vlan.c vg = nbp_vlan_group(v->port); v 114 net/bridge/br_vlan.c if (v->vid < vent->vid) v 119 net/bridge/br_vlan.c list_add_rcu(&v->vlist, hpos); v 122 net/bridge/br_vlan.c static void __vlan_del_list(struct net_bridge_vlan *v) v 124 net/bridge/br_vlan.c list_del_rcu(&v->vlist); v 128 net/bridge/br_vlan.c const struct net_bridge_vlan *v) v 135 net/bridge/br_vlan.c err = br_switchdev_port_vlan_del(dev, v->vid); v 136 net/bridge/br_vlan.c if (!(v->priv_flags & BR_VLFLAG_ADDED_BY_SWITCHDEV)) v 137 net/bridge/br_vlan.c vlan_vid_del(dev, br->vlan_proto, v->vid); v 172 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 174 net/bridge/br_vlan.c v = container_of(rcu, struct net_bridge_vlan, rcu); v 175 net/bridge/br_vlan.c WARN_ON(!br_vlan_is_master(v)); v 176 net/bridge/br_vlan.c free_percpu(v->stats); v 177 net/bridge/br_vlan.c v->stats = NULL; v 178 net/bridge/br_vlan.c kfree(v); v 199 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 201 net/bridge/br_vlan.c v = container_of(rcu, struct net_bridge_vlan, rcu); v 202 net/bridge/br_vlan.c WARN_ON(br_vlan_is_master(v)); v 204 net/bridge/br_vlan.c if (v->priv_flags & BR_VLFLAG_PER_PORT_STATS) v 205 net/bridge/br_vlan.c free_percpu(v->stats); v 206 net/bridge/br_vlan.c v->stats = NULL; v 207 net/bridge/br_vlan.c kfree(v); v 221 net/bridge/br_vlan.c static int __vlan_add(struct net_bridge_vlan *v, u16 flags, v 231 net/bridge/br_vlan.c if (br_vlan_is_master(v)) { v 232 net/bridge/br_vlan.c br = v->br; v 236 net/bridge/br_vlan.c p = v->port; v 247 net/bridge/br_vlan.c err = __vlan_vid_add(dev, br, v, flags, extack); v 255 net/bridge/br_vlan.c err = br_vlan_add(br, v->vid, v 262 net/bridge/br_vlan.c masterv = br_vlan_get_master(br, v->vid, extack); v 265 net/bridge/br_vlan.c v->brvlan = masterv; v 267 net/bridge/br_vlan.c v->stats = netdev_alloc_pcpu_stats(struct br_vlan_stats); v 268 net/bridge/br_vlan.c if (!v->stats) { v 272 net/bridge/br_vlan.c v->priv_flags |= BR_VLFLAG_PER_PORT_STATS; v 274 net/bridge/br_vlan.c v->stats = masterv->stats; v 277 net/bridge/br_vlan.c err = br_switchdev_port_vlan_add(dev, v->vid, flags, extack); v 283 net/bridge/br_vlan.c if (br_vlan_should_use(v)) { v 284 net/bridge/br_vlan.c err = br_fdb_insert(br, p, dev->dev_addr, v->vid); v 292 net/bridge/br_vlan.c err = rhashtable_lookup_insert_fast(&vg->vlan_hash, &v->vnode, v 297 net/bridge/br_vlan.c __vlan_add_list(v); v 298 net/bridge/br_vlan.c __vlan_add_flags(v, flags); v 301 net/bridge/br_vlan.c nbp_vlan_set_vlan_dev_state(p, v->vid); v 306 net/bridge/br_vlan.c if (br_vlan_should_use(v)) { v 307 net/bridge/br_vlan.c br_fdb_find_delete_local(br, p, dev->dev_addr, v->vid); v 313 net/bridge/br_vlan.c __vlan_vid_del(dev, br, v); v 315 net/bridge/br_vlan.c if (v->stats && masterv->stats != v->stats) v 316 net/bridge/br_vlan.c free_percpu(v->stats); v 317 net/bridge/br_vlan.c v->stats = NULL; v 320 net/bridge/br_vlan.c v->brvlan = NULL; v 323 net/bridge/br_vlan.c br_switchdev_port_vlan_del(dev, v->vid); v 329 net/bridge/br_vlan.c static int __vlan_del(struct net_bridge_vlan *v) v 331 net/bridge/br_vlan.c struct net_bridge_vlan *masterv = v; v 336 net/bridge/br_vlan.c if (br_vlan_is_master(v)) { v 337 net/bridge/br_vlan.c vg = br_vlan_group(v->br); v 339 net/bridge/br_vlan.c p = v->port; v 340 net/bridge/br_vlan.c vg = nbp_vlan_group(v->port); v 341 net/bridge/br_vlan.c masterv = v->brvlan; v 344 net/bridge/br_vlan.c __vlan_delete_pvid(vg, v->vid); v 346 net/bridge/br_vlan.c err = __vlan_vid_del(p->dev, p->br, v); v 350 net/bridge/br_vlan.c err = br_switchdev_port_vlan_del(v->br->dev, v->vid); v 356 net/bridge/br_vlan.c if (br_vlan_should_use(v)) { v 357 net/bridge/br_vlan.c v->flags &= ~BRIDGE_VLAN_INFO_BRENTRY; v 361 net/bridge/br_vlan.c if (masterv != v) { v 362 net/bridge/br_vlan.c vlan_tunnel_info_del(vg, v); v 363 net/bridge/br_vlan.c rhashtable_remove_fast(&vg->vlan_hash, &v->vnode, v 365 net/bridge/br_vlan.c __vlan_del_list(v); v 366 net/bridge/br_vlan.c nbp_vlan_set_vlan_dev_state(p, v->vid); v 367 net/bridge/br_vlan.c call_rcu(&v->rcu, nbp_vlan_rcu_free); v 398 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 410 net/bridge/br_vlan.c v = br_vlan_find(vg, vid); v 416 net/bridge/br_vlan.c if (!v || !br_vlan_should_use(v)) { v 425 net/bridge/br_vlan.c stats = this_cpu_ptr(v->stats); v 432 net/bridge/br_vlan.c if (v->flags & BRIDGE_VLAN_INFO_UNTAGGED) v 436 net/bridge/br_vlan.c br_handle_egress_vlan_tunnel(skb, v)) { v 450 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 516 net/bridge/br_vlan.c v = br_vlan_find(vg, *vid); v 517 net/bridge/br_vlan.c if (!v || !br_vlan_should_use(v)) v 521 net/bridge/br_vlan.c stats = this_cpu_ptr(v->stats); v 554 net/bridge/br_vlan.c const struct net_bridge_vlan *v; v 562 net/bridge/br_vlan.c v = br_vlan_find(vg, vid); v 563 net/bridge/br_vlan.c if (v && br_vlan_should_use(v)) v 695 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 700 net/bridge/br_vlan.c v = br_vlan_find(vg, vid); v 701 net/bridge/br_vlan.c if (!v || !br_vlan_is_brentry(v)) v 707 net/bridge/br_vlan.c vlan_tunnel_info_del(vg, v); v 709 net/bridge/br_vlan.c return __vlan_del(v); v 907 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 912 net/bridge/br_vlan.c v = br_vlan_lookup(&vg->vlan_hash, vid); v 913 net/bridge/br_vlan.c if (v && br_vlan_should_use(v) && v 914 net/bridge/br_vlan.c (v->flags & BRIDGE_VLAN_INFO_UNTAGGED)) v 1179 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 1183 net/bridge/br_vlan.c v = br_vlan_find(nbp_vlan_group(port), vid); v 1184 net/bridge/br_vlan.c if (!v) v 1189 net/bridge/br_vlan.c return __vlan_del(v); v 1205 net/bridge/br_vlan.c void br_vlan_get_stats(const struct net_bridge_vlan *v, v 1216 net/bridge/br_vlan.c cpu_stats = per_cpu_ptr(v->stats, i); v 1266 net/bridge/br_vlan.c struct net_bridge_vlan *v; v 1278 net/bridge/br_vlan.c v = br_vlan_find(vg, vid); v 1279 net/bridge/br_vlan.c if (!v) v 1283 net/bridge/br_vlan.c p_vinfo->flags = v->flags; v 113 net/bridge/br_vlan_tunnel.c struct net_bridge_vlan *v; v 118 net/bridge/br_vlan_tunnel.c v = br_vlan_find(vg, vid); v 119 net/bridge/br_vlan_tunnel.c if (!v) v 122 net/bridge/br_vlan_tunnel.c vlan_tunnel_info_del(vg, v); v 49 net/bridge/netfilter/ebtables.c int v = *(compat_int_t *)src; v 51 net/bridge/netfilter/ebtables.c if (v >= 0) v 52 net/bridge/netfilter/ebtables.c v += xt_compat_calc_jump(NFPROTO_BRIDGE, v); v 53 net/bridge/netfilter/ebtables.c memcpy(dst, &v, sizeof(v)); v 188 net/can/bcm.c static int bcm_proc_show(struct seq_file *m, void *v) v 213 net/can/proc.c static int can_stats_proc_show(struct seq_file *m, void *v) v 275 net/can/proc.c static int can_reset_stats_proc_show(struct seq_file *m, void *v) v 296 net/can/proc.c static int can_version_proc_show(struct seq_file *m, void *v) v 314 net/can/proc.c static int can_rcvlist_proc_show(struct seq_file *m, void *v) v 367 net/can/proc.c static int can_rcvlist_sff_proc_show(struct seq_file *m, void *v) v 398 net/can/proc.c static int can_rcvlist_eff_proc_show(struct seq_file *m, void *v) v 848 net/ceph/crush/mapper.c void crush_init_workspace(const struct crush_map *map, void *v) v 850 net/ceph/crush/mapper.c struct crush_work *w = v; v 861 net/ceph/crush/mapper.c v += sizeof(struct crush_work); v 862 net/ceph/crush/mapper.c w->work = v; v 863 net/ceph/crush/mapper.c v += map->max_buckets * sizeof(struct crush_work_bucket *); v 868 net/ceph/crush/mapper.c w->work[b] = v; v 871 net/ceph/crush/mapper.c v += sizeof(struct crush_work_bucket); v 876 net/ceph/crush/mapper.c w->work[b]->perm = v; v 877 net/ceph/crush/mapper.c v += map->buckets[b]->size * sizeof(__u32); v 879 net/ceph/crush/mapper.c BUG_ON(v - (void *)w != map->working_size); v 1096 net/ceph/osdmap.c const char *prefix, u8 *v) v 1137 net/ceph/osdmap.c *v = struct_v; v 5613 net/core/filter.c offsetof(struct minmax_sample, v)); v 3044 net/core/neighbour.c void *v; v 3046 net/core/neighbour.c v = state->neigh_sub_iter(state, n, &fakep); v 3047 net/core/neighbour.c if (!v) v 3075 net/core/neighbour.c void *v = state->neigh_sub_iter(state, n, pos); v 3076 net/core/neighbour.c if (v) v 3086 net/core/neighbour.c void *v = state->neigh_sub_iter(state, n, pos); v 3087 net/core/neighbour.c if (v) v 3224 net/core/neighbour.c void *neigh_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 3229 net/core/neighbour.c if (v == SEQ_START_TOKEN) { v 3236 net/core/neighbour.c rc = neigh_get_next(seq, v, NULL); v 3243 net/core/neighbour.c rc = pneigh_get_next(seq, v, NULL); v 3251 net/core/neighbour.c void neigh_seq_stop(struct seq_file *seq, void *v) v 3282 net/core/neighbour.c static void *neigh_stat_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 3296 net/core/neighbour.c static void neigh_stat_seq_stop(struct seq_file *seq, void *v) v 3301 net/core/neighbour.c static int neigh_stat_seq_show(struct seq_file *seq, void *v) v 3304 net/core/neighbour.c struct neigh_statistics *st = v; v 3306 net/core/neighbour.c if (v == SEQ_START_TOKEN) { v 66 net/core/net-procfs.c static void *dev_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 72 net/core/net-procfs.c static void dev_seq_stop(struct seq_file *seq, void *v) v 106 net/core/net-procfs.c static int dev_seq_show(struct seq_file *seq, void *v) v 108 net/core/net-procfs.c if (v == SEQ_START_TOKEN) v 115 net/core/net-procfs.c dev_seq_printf_stats(seq, v); v 137 net/core/net-procfs.c static void *softnet_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 143 net/core/net-procfs.c static void softnet_seq_stop(struct seq_file *seq, void *v) v 147 net/core/net-procfs.c static int softnet_seq_show(struct seq_file *seq, void *v) v 149 net/core/net-procfs.c struct softnet_data *sd = v; v 214 net/core/net-procfs.c static void *ptype_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 221 net/core/net-procfs.c if (v == SEQ_START_TOKEN) v 224 net/core/net-procfs.c pt = v; v 243 net/core/net-procfs.c static void ptype_seq_stop(struct seq_file *seq, void *v) v 249 net/core/net-procfs.c static int ptype_seq_show(struct seq_file *seq, void *v) v 251 net/core/net-procfs.c struct packet_type *pt = v; v 253 net/core/net-procfs.c if (v == SEQ_START_TOKEN) v 317 net/core/net-procfs.c static int dev_mc_seq_show(struct seq_file *seq, void *v) v 320 net/core/net-procfs.c struct net_device *dev = v; v 322 net/core/net-procfs.c if (v == SEQ_START_TOKEN) v 69 net/core/netclassid_cgroup.c static int update_classid_sock(const void *v, struct file *file, unsigned n) v 72 net/core/netclassid_cgroup.c struct update_classid_context *ctx = (void *)v; v 59 net/core/netevent.c int call_netevent_notifiers(unsigned long val, void *v) v 61 net/core/netevent.c return atomic_notifier_call_chain(&netevent_notif_chain, val, v); v 183 net/core/netprio_cgroup.c static int read_priomap(struct seq_file *sf, void *v) v 221 net/core/netprio_cgroup.c static int update_netprio(const void *v, struct file *file, unsigned n) v 228 net/core/netprio_cgroup.c (unsigned long)v); v 242 net/core/netprio_cgroup.c void *v = (void *)(unsigned long)css->cgroup->id; v 245 net/core/netprio_cgroup.c iterate_fd(p->files, 0, update_netprio, v); v 492 net/core/pktgen.c static int pgctrl_show(struct seq_file *seq, void *v) v 546 net/core/pktgen.c static int pktgen_if_show(struct seq_file *seq, void *v) v 1718 net/core/pktgen.c static int pktgen_thread_show(struct seq_file *seq, void *v) v 1229 net/core/sock.c } v; v 1239 net/core/sock.c memset(&v, 0, sizeof(v)); v 1243 net/core/sock.c v.val = sock_flag(sk, SOCK_DBG); v 1247 net/core/sock.c v.val = sock_flag(sk, SOCK_LOCALROUTE); v 1251 net/core/sock.c v.val = sock_flag(sk, SOCK_BROADCAST); v 1255 net/core/sock.c v.val = sk->sk_sndbuf; v 1259 net/core/sock.c v.val = sk->sk_rcvbuf; v 1263 net/core/sock.c v.val = sk->sk_reuse; v 1267 net/core/sock.c v.val = sk->sk_reuseport; v 1271 net/core/sock.c v.val = sock_flag(sk, SOCK_KEEPOPEN); v 1275 net/core/sock.c v.val = sk->sk_type; v 1279 net/core/sock.c v.val = sk->sk_protocol; v 1283 net/core/sock.c v.val = sk->sk_family; v 1287 net/core/sock.c v.val = -sock_error(sk); v 1288 net/core/sock.c if (v.val == 0) v 1289 net/core/sock.c v.val = xchg(&sk->sk_err_soft, 0); v 1293 net/core/sock.c v.val = sock_flag(sk, SOCK_URGINLINE); v 1297 net/core/sock.c v.val = sk->sk_no_check_tx; v 1301 net/core/sock.c v.val = sk->sk_priority; v 1305 net/core/sock.c lv = sizeof(v.ling); v 1306 net/core/sock.c v.ling.l_onoff = sock_flag(sk, SOCK_LINGER); v 1307 net/core/sock.c v.ling.l_linger = sk->sk_lingertime / HZ; v 1315 net/core/sock.c v.val = sock_flag(sk, SOCK_RCVTSTAMP) && v 1321 net/core/sock.c v.val = sock_flag(sk, SOCK_RCVTSTAMPNS) && !sock_flag(sk, SOCK_TSTAMP_NEW); v 1325 net/core/sock.c v.val = sock_flag(sk, SOCK_RCVTSTAMP) && sock_flag(sk, SOCK_TSTAMP_NEW); v 1329 net/core/sock.c v.val = sock_flag(sk, SOCK_RCVTSTAMPNS) && sock_flag(sk, SOCK_TSTAMP_NEW); v 1333 net/core/sock.c v.val = sk->sk_tsflags; v 1338 net/core/sock.c lv = sock_get_timeout(sk->sk_rcvtimeo, &v, SO_RCVTIMEO_OLD == optname); v 1343 net/core/sock.c lv = sock_get_timeout(sk->sk_sndtimeo, &v, SO_SNDTIMEO_OLD == optname); v 1347 net/core/sock.c v.val = sk->sk_rcvlowat; v 1351 net/core/sock.c v.val = 1; v 1355 net/core/sock.c v.val = !!test_bit(SOCK_PASSCRED, &sock->flags); v 1408 net/core/sock.c v.val = sk->sk_state == TCP_LISTEN; v 1412 net/core/sock.c v.val = !!test_bit(SOCK_PASSSEC, &sock->flags); v 1419 net/core/sock.c v.val = sk->sk_mark; v 1423 net/core/sock.c v.val = sock_flag(sk, SOCK_RXQ_OVFL); v 1427 net/core/sock.c v.val = sock_flag(sk, SOCK_WIFI_STATUS); v 1434 net/core/sock.c v.val = sk->sk_peek_off; v 1437 net/core/sock.c v.val = sock_flag(sk, SOCK_NOFCS); v 1451 net/core/sock.c v.val = sock_flag(sk, SOCK_FILTER_LOCKED); v 1455 net/core/sock.c v.val = bpf_tell_extensions(); v 1459 net/core/sock.c v.val = sock_flag(sk, SOCK_SELECT_ERR_QUEUE); v 1464 net/core/sock.c v.val = sk->sk_ll_usec; v 1469 net/core/sock.c if (sizeof(v.ulval) != sizeof(v.val) && len >= sizeof(v.ulval)) { v 1470 net/core/sock.c lv = sizeof(v.ulval); v 1471 net/core/sock.c v.ulval = sk->sk_max_pacing_rate; v 1474 net/core/sock.c v.val = min_t(unsigned long, sk->sk_max_pacing_rate, ~0U); v 1479 net/core/sock.c v.val = READ_ONCE(sk->sk_incoming_cpu); v 1497 net/core/sock.c v.val = READ_ONCE(sk->sk_napi_id); v 1500 net/core/sock.c if (v.val < MIN_NAPI_ID) v 1501 net/core/sock.c v.val = 0; v 1510 net/core/sock.c v.val64 = sock_gen_cookie(sk); v 1514 net/core/sock.c v.val = sock_flag(sk, SOCK_ZEROCOPY); v 1518 net/core/sock.c lv = sizeof(v.txtime); v 1519 net/core/sock.c v.txtime.clockid = sk->sk_clockid; v 1520 net/core/sock.c v.txtime.flags |= sk->sk_txtime_deadline_mode ? v 1522 net/core/sock.c v.txtime.flags |= sk->sk_txtime_report_errors ? v 1527 net/core/sock.c v.val = sk->sk_bound_dev_if; v 1539 net/core/sock.c if (copy_to_user(optval, &v, len)) v 3487 net/core/sock.c static void *proto_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 3489 net/core/sock.c return seq_list_next(v, &proto_list, pos); v 3492 net/core/sock.c static void proto_seq_stop(struct seq_file *seq, void *v) v 3547 net/core/sock.c static int proto_seq_show(struct seq_file *seq, void *v) v 3549 net/core/sock.c if (v == &proto_list) v 3561 net/core/sock.c proto_seq_printf(seq, list_entry(v, struct proto, node)); v 27 net/dcb/dcbevent.c int call_dcbevent_notifiers(unsigned long val, void *v) v 29 net/dcb/dcbevent.c return atomic_notifier_call_chain(&dcbevent_notif_chain, val, v); v 2175 net/decnet/af_decnet.c static void *dn_socket_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2179 net/decnet/af_decnet.c if (v == SEQ_START_TOKEN) { v 2184 net/decnet/af_decnet.c rc = dn_socket_get_next(seq, v); v 2193 net/decnet/af_decnet.c static void dn_socket_seq_stop(struct seq_file *seq, void *v) v 2195 net/decnet/af_decnet.c if (v && v != SEQ_START_TOKEN) v 2293 net/decnet/af_decnet.c static int dn_socket_seq_show(struct seq_file *seq, void *v) v 2295 net/decnet/af_decnet.c if (v == SEQ_START_TOKEN) { v 2298 net/decnet/af_decnet.c dn_socket_format_entry(seq, v); v 1314 net/decnet/dn_dev.c static void *dn_dev_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1320 net/decnet/dn_dev.c dev = v; v 1321 net/decnet/dn_dev.c if (v == SEQ_START_TOKEN) v 1334 net/decnet/dn_dev.c static void dn_dev_seq_stop(struct seq_file *seq, void *v) v 1354 net/decnet/dn_dev.c static int dn_dev_seq_show(struct seq_file *seq, void *v) v 1356 net/decnet/dn_dev.c if (v == SEQ_START_TOKEN) v 1359 net/decnet/dn_dev.c struct net_device *dev = v; v 569 net/decnet/dn_neigh.c static int dn_neigh_seq_show(struct seq_file *seq, void *v) v 571 net/decnet/dn_neigh.c if (v == SEQ_START_TOKEN) { v 574 net/decnet/dn_neigh.c dn_neigh_format_entry(seq, v); v 1816 net/decnet/dn_route.c static void *dn_rt_cache_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1818 net/decnet/dn_route.c struct dn_route *rt = dn_rt_cache_get_next(seq, v); v 1823 net/decnet/dn_route.c static void dn_rt_cache_seq_stop(struct seq_file *seq, void *v) v 1825 net/decnet/dn_route.c if (v) v 1829 net/decnet/dn_route.c static int dn_rt_cache_seq_show(struct seq_file *seq, void *v) v 1831 net/decnet/dn_route.c struct dn_route *rt = v; v 16 net/dsa/port.c static int dsa_port_notify(const struct dsa_port *dp, unsigned long e, void *v) v 21 net/dsa/port.c err = raw_notifier_call_chain(nh, e, v); v 1668 net/ipv4/af_inet.c u64 v; v 1675 net/ipv4/af_inet.c v = *(((u64 *)bhptr) + offt); v 1678 net/ipv4/af_inet.c return v; v 1385 net/ipv4/arp.c static int arp_seq_show(struct seq_file *seq, void *v) v 1387 net/ipv4/arp.c if (v == SEQ_START_TOKEN) { v 1394 net/ipv4/arp.c arp_format_pneigh_entry(seq, v); v 1396 net/ipv4/arp.c arp_format_neigh_entry(seq, v); v 2448 net/ipv4/fib_trie.c static int fib_triestat_seq_show(struct seq_file *seq, void *v) v 2519 net/ipv4/fib_trie.c static void *fib_trie_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2559 net/ipv4/fib_trie.c static void fib_trie_seq_stop(struct seq_file *seq, void *v) v 2609 net/ipv4/fib_trie.c static int fib_trie_seq_show(struct seq_file *seq, void *v) v 2612 net/ipv4/fib_trie.c struct key_vector *n = v; v 2726 net/ipv4/fib_trie.c static void *fib_route_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2735 net/ipv4/fib_trie.c if ((v == SEQ_START_TOKEN) || key) v 2748 net/ipv4/fib_trie.c static void fib_route_seq_stop(struct seq_file *seq, void *v) v 2778 net/ipv4/fib_trie.c static int fib_route_seq_show(struct seq_file *seq, void *v) v 2783 net/ipv4/fib_trie.c struct key_vector *l = v; v 2786 net/ipv4/fib_trie.c if (v == SEQ_START_TOKEN) { v 2807 net/ipv4/igmp.c static void *igmp_mc_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2810 net/ipv4/igmp.c if (v == SEQ_START_TOKEN) v 2813 net/ipv4/igmp.c im = igmp_mc_get_next(seq, v); v 2818 net/ipv4/igmp.c static void igmp_mc_seq_stop(struct seq_file *seq, void *v) v 2828 net/ipv4/igmp.c static int igmp_mc_seq_show(struct seq_file *seq, void *v) v 2830 net/ipv4/igmp.c if (v == SEQ_START_TOKEN) v 2834 net/ipv4/igmp.c struct ip_mc_list *im = (struct ip_mc_list *)v; v 2952 net/ipv4/igmp.c static void *igmp_mcf_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2955 net/ipv4/igmp.c if (v == SEQ_START_TOKEN) v 2958 net/ipv4/igmp.c psf = igmp_mcf_get_next(seq, v); v 2963 net/ipv4/igmp.c static void igmp_mcf_seq_stop(struct seq_file *seq, void *v) v 2976 net/ipv4/igmp.c static int igmp_mcf_seq_show(struct seq_file *seq, void *v) v 2978 net/ipv4/igmp.c struct ip_sf_list *psf = (struct ip_sf_list *)v; v 2981 net/ipv4/igmp.c if (v == SEQ_START_TOKEN) { v 99 net/ipv4/ipcomp.c u32 mark = x->mark.v & x->mark.m; v 1300 net/ipv4/ipconfig.c static int pnp_seq_show(struct seq_file *seq, void *v) v 1358 net/ipv4/ipconfig.c static int ntp_servers_seq_show(struct seq_file *seq, void *v) v 1632 net/ipv4/ipconfig.c char *v; v 1635 net/ipv4/ipconfig.c v = strchr(client_id, ','); v 1636 net/ipv4/ipconfig.c if (!v) v 1638 net/ipv4/ipconfig.c *v = 0; v 1641 net/ipv4/ipconfig.c strncpy(dhcp_client_identifier + 1, v + 1, 251); v 1642 net/ipv4/ipconfig.c *v = ','; v 420 net/ipv4/ipmr.c static void ipmr_del_tunnel(struct net_device *dev, struct vifctl *v) v 433 net/ipv4/ipmr.c p.iph.daddr = v->vifc_rmt_addr.s_addr; v 434 net/ipv4/ipmr.c p.iph.saddr = v->vifc_lcl_addr.s_addr; v 438 net/ipv4/ipmr.c sprintf(p.name, "dvmrp%d", v->vifc_vifi); v 468 net/ipv4/ipmr.c static struct net_device *ipmr_new_tunnel(struct net *net, struct vifctl *v) v 481 net/ipv4/ipmr.c p.iph.daddr = v->vifc_rmt_addr.s_addr; v 482 net/ipv4/ipmr.c p.iph.saddr = v->vifc_lcl_addr.s_addr; v 486 net/ipv4/ipmr.c sprintf(p.name, "dvmrp%d", v->vifc_vifi); v 671 net/ipv4/ipmr.c struct vif_device *v; v 678 net/ipv4/ipmr.c v = &mrt->vif_table[vifi]; v 681 net/ipv4/ipmr.c call_ipmr_vif_entry_notifiers(net, FIB_EVENT_VIF_DEL, v, vifi, v 685 net/ipv4/ipmr.c dev = v->dev; v 686 net/ipv4/ipmr.c v->dev = NULL; v 719 net/ipv4/ipmr.c if (v->flags & (VIFF_TUNNEL | VIFF_REGISTER) && !notify) v 836 net/ipv4/ipmr.c struct vif_device *v = &mrt->vif_table[vifi]; v 909 net/ipv4/ipmr.c vif_device_init(v, dev, vifc->vifc_rate_limit, v 916 net/ipv4/ipmr.c memcpy(v->dev_parent_id.id, ppid.id, ppid.id_len); v 917 net/ipv4/ipmr.c v->dev_parent_id.id_len = ppid.id_len; v 919 net/ipv4/ipmr.c v->dev_parent_id.id_len = 0; v 922 net/ipv4/ipmr.c v->local = vifc->vifc_lcl_addr.s_addr; v 923 net/ipv4/ipmr.c v->remote = vifc->vifc_rmt_addr.s_addr; v 927 net/ipv4/ipmr.c v->dev = dev; v 928 net/ipv4/ipmr.c if (v->flags & VIFF_REGISTER) v 933 net/ipv4/ipmr.c call_ipmr_vif_entry_notifiers(net, FIB_EVENT_VIF_ADD, v, vifi, mrt->id); v 1749 net/ipv4/ipmr.c struct vif_device *v; v 1756 net/ipv4/ipmr.c v = &mrt->vif_table[0]; v 1757 net/ipv4/ipmr.c for (ct = 0; ct < mrt->maxvif; ct++, v++) { v 1758 net/ipv4/ipmr.c if (v->dev == dev) v 2933 net/ipv4/ipmr.c static void ipmr_vif_seq_stop(struct seq_file *seq, void *v) v 2939 net/ipv4/ipmr.c static int ipmr_vif_seq_show(struct seq_file *seq, void *v) v 2944 net/ipv4/ipmr.c if (v == SEQ_START_TOKEN) { v 2948 net/ipv4/ipmr.c const struct vif_device *vif = v; v 2981 net/ipv4/ipmr.c static int ipmr_mfc_seq_show(struct seq_file *seq, void *v) v 2985 net/ipv4/ipmr.c if (v == SEQ_START_TOKEN) { v 2989 net/ipv4/ipmr.c const struct mfc_cache *mfc = v; v 9 net/ipv4/ipmr_base.c void vif_device_init(struct vif_device *v, v 16 net/ipv4/ipmr_base.c v->dev = NULL; v 17 net/ipv4/ipmr_base.c v->bytes_in = 0; v 18 net/ipv4/ipmr_base.c v->bytes_out = 0; v 19 net/ipv4/ipmr_base.c v->pkt_in = 0; v 20 net/ipv4/ipmr_base.c v->pkt_out = 0; v 21 net/ipv4/ipmr_base.c v->rate_limit = rate_limit; v 22 net/ipv4/ipmr_base.c v->flags = flags; v 23 net/ipv4/ipmr_base.c v->threshold = threshold; v 24 net/ipv4/ipmr_base.c if (v->flags & get_iflink_mask) v 25 net/ipv4/ipmr_base.c v->link = dev_get_iflink(dev); v 27 net/ipv4/ipmr_base.c v->link = dev->ifindex; v 128 net/ipv4/ipmr_base.c void *mr_vif_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 135 net/ipv4/ipmr_base.c if (v == SEQ_START_TOKEN) v 172 net/ipv4/ipmr_base.c void *mr_mfc_seq_next(struct seq_file *seq, void *v, v 178 net/ipv4/ipmr_base.c struct mr_mfc *c = v; v 182 net/ipv4/ipmr_base.c if (v == SEQ_START_TOKEN) v 402 net/ipv4/ipmr_base.c struct vif_device *v = &mrt->vif_table[0]; v 408 net/ipv4/ipmr_base.c for (vifi = 0; vifi < mrt->maxvif; vifi++, v++) { v 409 net/ipv4/ipmr_base.c if (!v->dev) v 414 net/ipv4/ipmr_base.c v, vifi, mrt->id); v 236 net/ipv4/netfilter/arp_tables.c int v; v 238 net/ipv4/netfilter/arp_tables.c v = ((struct xt_standard_target *)t)->verdict; v 239 net/ipv4/netfilter/arp_tables.c if (v < 0) { v 241 net/ipv4/netfilter/arp_tables.c if (v != XT_RETURN) { v 242 net/ipv4/netfilter/arp_tables.c verdict = (unsigned int)(-v) - 1; v 254 net/ipv4/netfilter/arp_tables.c if (table_base + v v 263 net/ipv4/netfilter/arp_tables.c e = get_entry(table_base, v); v 719 net/ipv4/netfilter/arp_tables.c int v = *(compat_int_t *)src; v 721 net/ipv4/netfilter/arp_tables.c if (v > 0) v 722 net/ipv4/netfilter/arp_tables.c v += xt_compat_calc_jump(NFPROTO_ARP, v); v 723 net/ipv4/netfilter/arp_tables.c memcpy(dst, &v, sizeof(v)); v 312 net/ipv4/netfilter/ip_tables.c int v; v 314 net/ipv4/netfilter/ip_tables.c v = ((struct xt_standard_target *)t)->verdict; v 315 net/ipv4/netfilter/ip_tables.c if (v < 0) { v 317 net/ipv4/netfilter/ip_tables.c if (v != XT_RETURN) { v 318 net/ipv4/netfilter/ip_tables.c verdict = (unsigned int)(-v) - 1; v 330 net/ipv4/netfilter/ip_tables.c if (table_base + v != ipt_next_entry(e) && v 339 net/ipv4/netfilter/ip_tables.c e = get_entry(table_base, v); v 874 net/ipv4/netfilter/ip_tables.c int v = *(compat_int_t *)src; v 876 net/ipv4/netfilter/ip_tables.c if (v > 0) v 877 net/ipv4/netfilter/ip_tables.c v += xt_compat_calc_jump(AF_INET, v); v 878 net/ipv4/netfilter/ip_tables.c memcpy(dst, &v, sizeof(v)); v 703 net/ipv4/netfilter/ipt_CLUSTERIP.c static void *clusterip_seq_next(struct seq_file *s, void *v, loff_t *pos) v 705 net/ipv4/netfilter/ipt_CLUSTERIP.c struct clusterip_seq_position *idx = v; v 709 net/ipv4/netfilter/ipt_CLUSTERIP.c kfree(v); v 717 net/ipv4/netfilter/ipt_CLUSTERIP.c static void clusterip_seq_stop(struct seq_file *s, void *v) v 719 net/ipv4/netfilter/ipt_CLUSTERIP.c if (!IS_ERR(v)) v 720 net/ipv4/netfilter/ipt_CLUSTERIP.c kfree(v); v 723 net/ipv4/netfilter/ipt_CLUSTERIP.c static int clusterip_seq_show(struct seq_file *s, void *v) v 725 net/ipv4/netfilter/ipt_CLUSTERIP.c struct clusterip_seq_position *idx = v; v 1080 net/ipv4/ping.c void *ping_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1084 net/ipv4/ping.c if (v == SEQ_START_TOKEN) v 1087 net/ipv4/ping.c sk = ping_get_next(seq, v); v 1094 net/ipv4/ping.c void ping_seq_stop(struct seq_file *seq, void *v) v 1122 net/ipv4/ping.c static int ping_v4_seq_show(struct seq_file *seq, void *v) v 1125 net/ipv4/ping.c if (v == SEQ_START_TOKEN) v 1132 net/ipv4/ping.c ping_v4_format_sock(v, seq, state->bucket); v 50 net/ipv4/proc.c static int sockstat_seq_show(struct seq_file *seq, void *v) v 368 net/ipv4/proc.c static int snmp_seq_show_ipstats(struct seq_file *seq, void *v) v 394 net/ipv4/proc.c static int snmp_seq_show_tcp_udp(struct seq_file *seq, void *v) v 444 net/ipv4/proc.c static int snmp_seq_show(struct seq_file *seq, void *v) v 446 net/ipv4/proc.c snmp_seq_show_ipstats(seq, v); v 451 net/ipv4/proc.c snmp_seq_show_tcp_udp(seq, v); v 459 net/ipv4/proc.c static int netstat_seq_show(struct seq_file *seq, void *v) v 1045 net/ipv4/raw.c void *raw_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1049 net/ipv4/raw.c if (v == SEQ_START_TOKEN) v 1052 net/ipv4/raw.c sk = raw_get_next(seq, v); v 1058 net/ipv4/raw.c void raw_seq_stop(struct seq_file *seq, void *v) v 1085 net/ipv4/raw.c static int raw_seq_show(struct seq_file *seq, void *v) v 1087 net/ipv4/raw.c if (v == SEQ_START_TOKEN) v 1092 net/ipv4/raw.c raw_sock_seq_show(seq, v, raw_seq_private(seq)->bucket); v 208 net/ipv4/route.c static void *rt_cache_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 214 net/ipv4/route.c static void rt_cache_seq_stop(struct seq_file *seq, void *v) v 218 net/ipv4/route.c static int rt_cache_seq_show(struct seq_file *seq, void *v) v 220 net/ipv4/route.c if (v == SEQ_START_TOKEN) v 264 net/ipv4/route.c static void *rt_cpu_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 278 net/ipv4/route.c static void rt_cpu_seq_stop(struct seq_file *seq, void *v) v 283 net/ipv4/route.c static int rt_cpu_seq_show(struct seq_file *seq, void *v) v 285 net/ipv4/route.c struct rt_cache_stat *st = v; v 287 net/ipv4/route.c if (v == SEQ_START_TOKEN) { v 338 net/ipv4/route.c static int rt_acct_proc_show(struct seq_file *m, void *v) v 105 net/ipv4/tcp_cdg.c static const u16 v[] = { v 124 net/ipv4/tcp_cdg.c u32 y = v[i & -(msb & 1)] + U32_C(1); v 189 net/ipv4/tcp_cubic.c static const u8 v[] = { v 203 net/ipv4/tcp_cubic.c return ((u32)v[(u32)a] + 35) >> 6; v 209 net/ipv4/tcp_cubic.c x = ((u32)(((u32)v[shift] + 10) << b)) >> 6; v 2350 net/ipv4/tcp_ipv4.c void *tcp_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2355 net/ipv4/tcp_ipv4.c if (v == SEQ_START_TOKEN) { v 2362 net/ipv4/tcp_ipv4.c rc = listening_get_next(seq, v); v 2371 net/ipv4/tcp_ipv4.c rc = established_get_next(seq, v); v 2381 net/ipv4/tcp_ipv4.c void tcp_seq_stop(struct seq_file *seq, void *v) v 2387 net/ipv4/tcp_ipv4.c if (v != SEQ_START_TOKEN) v 2391 net/ipv4/tcp_ipv4.c if (v) v 2507 net/ipv4/tcp_ipv4.c static int tcp4_seq_show(struct seq_file *seq, void *v) v 2510 net/ipv4/tcp_ipv4.c struct sock *sk = v; v 2513 net/ipv4/tcp_ipv4.c if (v == SEQ_START_TOKEN) { v 2522 net/ipv4/tcp_ipv4.c get_timewait4_sock(v, seq, st->num); v 2524 net/ipv4/tcp_ipv4.c get_openreq4(v, seq, st->num); v 2526 net/ipv4/tcp_ipv4.c get_tcp4_sock(v, seq, st->num); v 2877 net/ipv4/udp.c void *udp_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2881 net/ipv4/udp.c if (v == SEQ_START_TOKEN) v 2884 net/ipv4/udp.c sk = udp_get_next(seq, v); v 2891 net/ipv4/udp.c void udp_seq_stop(struct seq_file *seq, void *v) v 2923 net/ipv4/udp.c int udp4_seq_show(struct seq_file *seq, void *v) v 2926 net/ipv4/udp.c if (v == SEQ_START_TOKEN) v 2933 net/ipv4/udp.c udp4_format_sock(v, seq, state->bucket); v 33 net/ipv4/udp_impl.h int udp4_seq_show(struct seq_file *seq, void *v); v 4320 net/ipv6/addrconf.c static void *if6_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 4324 net/ipv6/addrconf.c ifa = if6_get_next(seq, v); v 4329 net/ipv6/addrconf.c static void if6_seq_stop(struct seq_file *seq, void *v) v 4335 net/ipv6/addrconf.c static int if6_seq_show(struct seq_file *seq, void *v) v 4337 net/ipv6/addrconf.c struct inet6_ifaddr *ifp = (struct inet6_ifaddr *)v; v 107 net/ipv6/addrconf_core.c int inet6addr_notifier_call_chain(unsigned long val, void *v) v 109 net/ipv6/addrconf_core.c return atomic_notifier_call_chain(&inet6addr_chain, val, v); v 126 net/ipv6/addrconf_core.c int inet6addr_validator_notifier_call_chain(unsigned long val, void *v) v 128 net/ipv6/addrconf_core.c return blocking_notifier_call_chain(&inet6addr_validator_chain, val, v); v 540 net/ipv6/anycast.c static void *ac6_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 542 net/ipv6/anycast.c struct ifacaddr6 *im = ac6_get_next(seq, v); v 548 net/ipv6/anycast.c static void ac6_seq_stop(struct seq_file *seq, void *v) v 560 net/ipv6/anycast.c static int ac6_seq_show(struct seq_file *seq, void *v) v 562 net/ipv6/anycast.c struct ifacaddr6 *im = (struct ifacaddr6 *)v; v 43 net/ipv6/ila/ila_xlat.c u32 *v = (u32 *)loc.v32; v 46 net/ipv6/ila/ila_xlat.c return jhash_2words(v[0], v[1], hashrnd); v 2372 net/ipv6/ip6_fib.c static int ipv6_route_seq_show(struct seq_file *seq, void *v) v 2374 net/ipv6/ip6_fib.c struct fib6_info *rt = v; v 2470 net/ipv6/ip6_fib.c static void *ipv6_route_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2477 net/ipv6/ip6_fib.c if (!v) v 2480 net/ipv6/ip6_fib.c n = rcu_dereference_bh(((struct fib6_info *)v)->fib6_next); v 2492 net/ipv6/ip6_fib.c if (v) v 2533 net/ipv6/ip6_fib.c static void ipv6_route_seq_stop(struct seq_file *seq, void *v) v 788 net/ipv6/ip6_flowlabel.c static void *ip6fl_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 792 net/ipv6/ip6_flowlabel.c if (v == SEQ_START_TOKEN) v 795 net/ipv6/ip6_flowlabel.c fl = ip6fl_get_next(seq, v); v 800 net/ipv6/ip6_flowlabel.c static void ip6fl_seq_stop(struct seq_file *seq, void *v) v 806 net/ipv6/ip6_flowlabel.c static int ip6fl_seq_show(struct seq_file *seq, void *v) v 809 net/ipv6/ip6_flowlabel.c if (v == SEQ_START_TOKEN) { v 812 net/ipv6/ip6_flowlabel.c struct ip6_flowlabel *fl = v; v 418 net/ipv6/ip6mr.c static void ip6mr_vif_seq_stop(struct seq_file *seq, void *v) v 424 net/ipv6/ip6mr.c static int ip6mr_vif_seq_show(struct seq_file *seq, void *v) v 429 net/ipv6/ip6mr.c if (v == SEQ_START_TOKEN) { v 433 net/ipv6/ip6mr.c const struct vif_device *vif = v; v 465 net/ipv6/ip6mr.c static int ipmr_mfc_seq_show(struct seq_file *seq, void *v) v 469 net/ipv6/ip6mr.c if (v == SEQ_START_TOKEN) { v 475 net/ipv6/ip6mr.c const struct mfc6_cache *mfc = v; v 694 net/ipv6/ip6mr.c struct vif_device *v; v 701 net/ipv6/ip6mr.c v = &mrt->vif_table[vifi]; v 705 net/ipv6/ip6mr.c FIB_EVENT_VIF_DEL, v, vifi, v 709 net/ipv6/ip6mr.c dev = v->dev; v 710 net/ipv6/ip6mr.c v->dev = NULL; v 743 net/ipv6/ip6mr.c if ((v->flags & MIFF_REGISTER) && !notify) v 860 net/ipv6/ip6mr.c struct vif_device *v = &mrt->vif_table[vifi]; v 912 net/ipv6/ip6mr.c vif_device_init(v, dev, vifc->vifc_rate_limit, vifc->vifc_threshold, v 918 net/ipv6/ip6mr.c v->dev = dev; v 920 net/ipv6/ip6mr.c if (v->flags & MIFF_REGISTER) v 927 net/ipv6/ip6mr.c v, vifi, mrt->id); v 1235 net/ipv6/ip6mr.c struct vif_device *v; v 1242 net/ipv6/ip6mr.c v = &mrt->vif_table[0]; v 1243 net/ipv6/ip6mr.c for (ct = 0; ct < mrt->maxvif; ct++, v++) { v 1244 net/ipv6/ip6mr.c if (v->dev == dev) v 1729 net/ipv6/ip6mr.c int v; v 1731 net/ipv6/ip6mr.c if (optlen != sizeof(v)) v 1733 net/ipv6/ip6mr.c if (get_user(v, (int __user *)optval)) v 1735 net/ipv6/ip6mr.c mrt->mroute_do_assert = v; v 1742 net/ipv6/ip6mr.c int v; v 1744 net/ipv6/ip6mr.c if (optlen != sizeof(v)) v 1746 net/ipv6/ip6mr.c if (get_user(v, (int __user *)optval)) v 1748 net/ipv6/ip6mr.c v = !!v; v 1751 net/ipv6/ip6mr.c if (v != mrt->mroute_do_pim) { v 1752 net/ipv6/ip6mr.c mrt->mroute_do_pim = v; v 1753 net/ipv6/ip6mr.c mrt->mroute_do_assert = v; v 1763 net/ipv6/ip6mr.c u32 v; v 1767 net/ipv6/ip6mr.c if (get_user(v, (u32 __user *)optval)) v 1770 net/ipv6/ip6mr.c if (v != RT_TABLE_DEFAULT && v >= 100000000) v 1777 net/ipv6/ip6mr.c mrt = ip6mr_new_table(net, v); v 1781 net/ipv6/ip6mr.c raw6_sk(sk)->ip6mr_table = v; v 116 net/ipv6/ipcomp6.c u32 mark = x->mark.m & x->mark.v; v 2736 net/ipv6/mcast.c static void *igmp6_mc_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2738 net/ipv6/mcast.c struct ifmcaddr6 *im = igmp6_mc_get_next(seq, v); v 2744 net/ipv6/mcast.c static void igmp6_mc_seq_stop(struct seq_file *seq, void *v) v 2757 net/ipv6/mcast.c static int igmp6_mc_seq_show(struct seq_file *seq, void *v) v 2759 net/ipv6/mcast.c struct ifmcaddr6 *im = (struct ifmcaddr6 *)v; v 2867 net/ipv6/mcast.c static void *igmp6_mcf_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2870 net/ipv6/mcast.c if (v == SEQ_START_TOKEN) v 2873 net/ipv6/mcast.c psf = igmp6_mcf_get_next(seq, v); v 2878 net/ipv6/mcast.c static void igmp6_mcf_seq_stop(struct seq_file *seq, void *v) v 2894 net/ipv6/mcast.c static int igmp6_mcf_seq_show(struct seq_file *seq, void *v) v 2896 net/ipv6/mcast.c struct ip6_sf_list *psf = (struct ip6_sf_list *)v; v 2899 net/ipv6/mcast.c if (v == SEQ_START_TOKEN) { v 335 net/ipv6/netfilter/ip6_tables.c int v; v 337 net/ipv6/netfilter/ip6_tables.c v = ((struct xt_standard_target *)t)->verdict; v 338 net/ipv6/netfilter/ip6_tables.c if (v < 0) { v 340 net/ipv6/netfilter/ip6_tables.c if (v != XT_RETURN) { v 341 net/ipv6/netfilter/ip6_tables.c verdict = (unsigned int)(-v) - 1; v 351 net/ipv6/netfilter/ip6_tables.c if (table_base + v != ip6t_next_entry(e) && v 360 net/ipv6/netfilter/ip6_tables.c e = get_entry(table_base, v); v 890 net/ipv6/netfilter/ip6_tables.c int v = *(compat_int_t *)src; v 892 net/ipv6/netfilter/ip6_tables.c if (v > 0) v 893 net/ipv6/netfilter/ip6_tables.c v += xt_compat_calc_jump(AF_INET6, v); v 894 net/ipv6/netfilter/ip6_tables.c memcpy(dst, &v, sizeof(v)); v 197 net/ipv6/ping.c static int ping_v6_seq_show(struct seq_file *seq, void *v) v 199 net/ipv6/ping.c if (v == SEQ_START_TOKEN) { v 203 net/ipv6/ping.c struct inet_sock *inet = inet_sk(v); v 206 net/ipv6/ping.c ip6_dgram_sock_seq_show(seq, v, srcp, destp, bucket); v 34 net/ipv6/proc.c static int sockstat6_seq_show(struct seq_file *seq, void *v) v 213 net/ipv6/proc.c static int snmp6_seq_show(struct seq_file *seq, void *v) v 229 net/ipv6/proc.c static int snmp6_dev_seq_show(struct seq_file *seq, void *v) v 1308 net/ipv6/raw.c static int raw6_seq_show(struct seq_file *seq, void *v) v 1310 net/ipv6/raw.c if (v == SEQ_START_TOKEN) { v 1313 net/ipv6/raw.c struct sock *sp = v; v 1315 net/ipv6/raw.c ip6_dgram_sock_seq_show(seq, v, srcp, 0, v 6042 net/ipv6/route.c static int rt6_stats_seq_show(struct seq_file *seq, void *v) v 1955 net/ipv6/tcp_ipv6.c static int tcp6_seq_show(struct seq_file *seq, void *v) v 1958 net/ipv6/tcp_ipv6.c struct sock *sk = v; v 1960 net/ipv6/tcp_ipv6.c if (v == SEQ_START_TOKEN) { v 1972 net/ipv6/tcp_ipv6.c get_timewait6_sock(seq, v, st->num); v 1974 net/ipv6/tcp_ipv6.c get_openreq6(seq, v, st->num); v 1976 net/ipv6/tcp_ipv6.c get_tcp6_sock(seq, v, st->num); v 1610 net/ipv6/udp.c int udp6_seq_show(struct seq_file *seq, void *v) v 1612 net/ipv6/udp.c if (v == SEQ_START_TOKEN) { v 1616 net/ipv6/udp.c struct inet_sock *inet = inet_sk(v); v 1619 net/ipv6/udp.c __ip6_dgram_sock_seq_show(seq, v, srcp, destp, v 1620 net/ipv6/udp.c udp_rqueue_get(v), bucket); v 34 net/ipv6/udp_impl.h int udp6_seq_show(struct seq_file *seq, void *v); v 49 net/kcm/kcmproc.c static void *kcm_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 53 net/kcm/kcmproc.c if (v == SEQ_START_TOKEN) v 56 net/kcm/kcmproc.c p = kcm_get_next(v); v 72 net/kcm/kcmproc.c static void kcm_seq_stop(struct seq_file *seq, void *v) v 220 net/kcm/kcmproc.c static int kcm_seq_show(struct seq_file *seq, void *v) v 225 net/kcm/kcmproc.c if (v == SEQ_START_TOKEN) { v 229 net/kcm/kcmproc.c kcm_format_mux(v, mux_state->idx, seq); v 242 net/kcm/kcmproc.c static int kcm_stats_seq_show(struct seq_file *seq, void *v) v 3756 net/key/af_key.c static int pfkey_seq_show(struct seq_file *f, void *v) v 3758 net/key/af_key.c struct sock *s = sk_entry(v); v 3760 net/key/af_key.c if (v == SEQ_START_TOKEN) v 3784 net/key/af_key.c static void *pfkey_seq_next(struct seq_file *f, void *v, loff_t *ppos) v 3789 net/key/af_key.c return seq_hlist_next_rcu(v, &net_pfkey->table, ppos); v 3792 net/key/af_key.c static void pfkey_seq_stop(struct seq_file *f, void *v) v 94 net/l2tp/l2tp_debugfs.c static void *l2tp_dfs_seq_next(struct seq_file *m, void *v, loff_t *pos) v 100 net/l2tp/l2tp_debugfs.c static void l2tp_dfs_seq_stop(struct seq_file *p, void *v) v 102 net/l2tp/l2tp_debugfs.c struct l2tp_dfs_seq_data *pd = v; v 120 net/l2tp/l2tp_debugfs.c static void l2tp_dfs_seq_tunnel_show(struct seq_file *m, void *v) v 122 net/l2tp/l2tp_debugfs.c struct l2tp_tunnel *tunnel = v; v 177 net/l2tp/l2tp_debugfs.c static void l2tp_dfs_seq_session_show(struct seq_file *m, void *v) v 179 net/l2tp/l2tp_debugfs.c struct l2tp_session *session = v; v 231 net/l2tp/l2tp_debugfs.c static int l2tp_dfs_seq_show(struct seq_file *m, void *v) v 233 net/l2tp/l2tp_debugfs.c struct l2tp_dfs_seq_data *pd = v; v 236 net/l2tp/l2tp_debugfs.c if (v == SEQ_START_TOKEN) { v 1498 net/l2tp/l2tp_ppp.c static void *pppol2tp_seq_next(struct seq_file *m, void *v, loff_t *pos) v 1504 net/l2tp/l2tp_ppp.c static void pppol2tp_seq_stop(struct seq_file *p, void *v) v 1506 net/l2tp/l2tp_ppp.c struct pppol2tp_seq_data *pd = v; v 1524 net/l2tp/l2tp_ppp.c static void pppol2tp_seq_tunnel_show(struct seq_file *m, void *v) v 1526 net/l2tp/l2tp_ppp.c struct l2tp_tunnel *tunnel = v; v 1542 net/l2tp/l2tp_ppp.c static void pppol2tp_seq_session_show(struct seq_file *m, void *v) v 1544 net/l2tp/l2tp_ppp.c struct l2tp_session *session = v; v 1598 net/l2tp/l2tp_ppp.c static int pppol2tp_seq_show(struct seq_file *m, void *v) v 1600 net/l2tp/l2tp_ppp.c struct pppol2tp_seq_data *pd = v; v 1603 net/l2tp/l2tp_ppp.c if (v == SEQ_START_TOKEN) { v 80 net/llc/llc_proc.c static void *llc_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 87 net/llc/llc_proc.c if (v == SEQ_START_TOKEN) { v 91 net/llc/llc_proc.c sk = v; v 114 net/llc/llc_proc.c static void llc_seq_stop(struct seq_file *seq, void *v) v 116 net/llc/llc_proc.c if (v && v != SEQ_START_TOKEN) { v 117 net/llc/llc_proc.c struct sock *sk = v; v 126 net/llc/llc_proc.c static int llc_seq_socket_show(struct seq_file *seq, void *v) v 131 net/llc/llc_proc.c if (v == SEQ_START_TOKEN) { v 136 net/llc/llc_proc.c sk = v; v 175 net/llc/llc_proc.c static int llc_seq_core_show(struct seq_file *seq, void *v) v 180 net/llc/llc_proc.c if (v == SEQ_START_TOKEN) { v 186 net/llc/llc_proc.c sk = v; v 870 net/mac80211/debugfs_sta.c u16 v = le16_to_cpu(nss->f); \ v 871 net/mac80211/debugfs_sta.c p += scnprintf(p, buf_sz + buf - p, n ": %#.4x\n", v); \ v 873 net/mac80211/debugfs_sta.c switch ((v >> _i) & 0x3) { \ v 26 net/mac80211/fils_aead.c size_t num_elem, const u8 *addr[], size_t len[], u8 *v) v 60 net/mac80211/fils_aead.c crypto_shash_finup(desc, d, AES_BLOCK_SIZE, v); v 71 net/mac80211/fils_aead.c u8 v[AES_BLOCK_SIZE]; v 93 net/mac80211/fils_aead.c res = aes_s2v(tfm, num_elem, addr, len, v); v 106 net/mac80211/fils_aead.c memcpy(out, v, AES_BLOCK_SIZE); v 111 net/mac80211/fils_aead.c v[8] &= 0x7f; v 112 net/mac80211/fils_aead.c v[12] &= 0x7f; v 134 net/mac80211/fils_aead.c skcipher_request_set_crypt(req, src, dst, plain_len, v); v 543 net/netfilter/ipvs/ip_vs_app.c static void *ip_vs_app_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 551 net/netfilter/ipvs/ip_vs_app.c if (v == SEQ_START_TOKEN) v 554 net/netfilter/ipvs/ip_vs_app.c inc = v; v 570 net/netfilter/ipvs/ip_vs_app.c static void ip_vs_app_seq_stop(struct seq_file *seq, void *v) v 575 net/netfilter/ipvs/ip_vs_app.c static int ip_vs_app_seq_show(struct seq_file *seq, void *v) v 577 net/netfilter/ipvs/ip_vs_app.c if (v == SEQ_START_TOKEN) v 580 net/netfilter/ipvs/ip_vs_app.c const struct ip_vs_app *inc = v; v 1044 net/netfilter/ipvs/ip_vs_conn.c static void *ip_vs_conn_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1046 net/netfilter/ipvs/ip_vs_conn.c struct ip_vs_conn *cp = v; v 1053 net/netfilter/ipvs/ip_vs_conn.c if (v == SEQ_START_TOKEN) v 1073 net/netfilter/ipvs/ip_vs_conn.c static void ip_vs_conn_seq_stop(struct seq_file *seq, void *v) v 1079 net/netfilter/ipvs/ip_vs_conn.c static int ip_vs_conn_seq_show(struct seq_file *seq, void *v) v 1082 net/netfilter/ipvs/ip_vs_conn.c if (v == SEQ_START_TOKEN) v 1086 net/netfilter/ipvs/ip_vs_conn.c const struct ip_vs_conn *cp = v; v 1156 net/netfilter/ipvs/ip_vs_conn.c static int ip_vs_conn_sync_seq_show(struct seq_file *seq, void *v) v 1160 net/netfilter/ipvs/ip_vs_conn.c if (v == SEQ_START_TOKEN) v 1164 net/netfilter/ipvs/ip_vs_conn.c const struct ip_vs_conn *cp = v; v 1780 net/netfilter/ipvs/ip_vs_core.c int v; v 1785 net/netfilter/ipvs/ip_vs_core.c if (!ip_vs_try_to_schedule(ipvs, AF_INET, skb, pd, &v, &cp, &ciph)) v 1786 net/netfilter/ipvs/ip_vs_core.c return v; v 1933 net/netfilter/ipvs/ip_vs_core.c int v; v 1938 net/netfilter/ipvs/ip_vs_core.c if (!ip_vs_try_to_schedule(ipvs, AF_INET6, skb, pd, &v, &cp, &ciph)) v 1939 net/netfilter/ipvs/ip_vs_core.c return v; v 2094 net/netfilter/ipvs/ip_vs_core.c int v; v 2096 net/netfilter/ipvs/ip_vs_core.c if (!ip_vs_try_to_schedule(ipvs, af, skb, pd, &v, &cp, &iph)) v 2097 net/netfilter/ipvs/ip_vs_core.c return v; v 2061 net/netfilter/ipvs/ip_vs_ctl.c static void *ip_vs_info_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2068 net/netfilter/ipvs/ip_vs_ctl.c if (v == SEQ_START_TOKEN) v 2071 net/netfilter/ipvs/ip_vs_ctl.c svc = v; v 2109 net/netfilter/ipvs/ip_vs_ctl.c static void ip_vs_info_seq_stop(struct seq_file *seq, void *v) v 2116 net/netfilter/ipvs/ip_vs_ctl.c static int ip_vs_info_seq_show(struct seq_file *seq, void *v) v 2118 net/netfilter/ipvs/ip_vs_ctl.c if (v == SEQ_START_TOKEN) { v 2129 net/netfilter/ipvs/ip_vs_ctl.c const struct ip_vs_service *svc = v; v 2202 net/netfilter/ipvs/ip_vs_ctl.c static int ip_vs_stats_show(struct seq_file *seq, void *v) v 2234 net/netfilter/ipvs/ip_vs_ctl.c static int ip_vs_stats_percpu_show(struct seq_file *seq, void *v) v 92 net/netfilter/ipvs/ip_vs_mh.c unsigned int v; v 100 net/netfilter/ipvs/ip_vs_mh.c v = (offset + ntohs(port) + ntohl(addr_fold)); v 101 net/netfilter/ipvs/ip_vs_mh.c return hsiphash(&v, sizeof(v), key); v 594 net/netfilter/nf_conntrack_expect.c static void *exp_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 597 net/netfilter/nf_conntrack_expect.c return ct_expect_get_next(seq, v); v 600 net/netfilter/nf_conntrack_expect.c static void exp_seq_stop(struct seq_file *seq, void *v) v 606 net/netfilter/nf_conntrack_expect.c static int exp_seq_show(struct seq_file *s, void *v) v 610 net/netfilter/nf_conntrack_expect.c struct hlist_node *n = v; v 152 net/netfilter/nf_conntrack_h323_asn1.c unsigned int v; v 154 net/netfilter/nf_conntrack_h323_asn1.c v = *bs->cur++; v 156 net/netfilter/nf_conntrack_h323_asn1.c if (v & 0x80) { v 157 net/netfilter/nf_conntrack_h323_asn1.c v &= 0x3f; v 158 net/netfilter/nf_conntrack_h323_asn1.c v <<= 8; v 159 net/netfilter/nf_conntrack_h323_asn1.c v += *bs->cur++; v 162 net/netfilter/nf_conntrack_h323_asn1.c return v; v 190 net/netfilter/nf_conntrack_h323_asn1.c unsigned int v, l; v 192 net/netfilter/nf_conntrack_h323_asn1.c v = (*bs->cur) & (0xffU >> bs->bit); v 196 net/netfilter/nf_conntrack_h323_asn1.c v >>= 8 - l; v 203 net/netfilter/nf_conntrack_h323_asn1.c v <<= 8; v 204 net/netfilter/nf_conntrack_h323_asn1.c v += *(++bs->cur); v 205 net/netfilter/nf_conntrack_h323_asn1.c v >>= 16 - l; v 209 net/netfilter/nf_conntrack_h323_asn1.c return v; v 215 net/netfilter/nf_conntrack_h323_asn1.c unsigned int v, l, shift, bytes; v 223 net/netfilter/nf_conntrack_h323_asn1.c v = (unsigned int)(*bs->cur) << (bs->bit + 24); v 226 net/netfilter/nf_conntrack_h323_asn1.c v = (unsigned int)(*bs->cur++) << (bs->bit + 24); v 229 net/netfilter/nf_conntrack_h323_asn1.c for (bytes = l >> 3, shift = 24, v = 0; bytes; v 231 net/netfilter/nf_conntrack_h323_asn1.c v |= (unsigned int)(*bs->cur++) << shift; v 234 net/netfilter/nf_conntrack_h323_asn1.c v |= (unsigned int)(*bs->cur) << shift; v 235 net/netfilter/nf_conntrack_h323_asn1.c v <<= bs->bit; v 237 net/netfilter/nf_conntrack_h323_asn1.c v <<= bs->bit; v 238 net/netfilter/nf_conntrack_h323_asn1.c v |= (*bs->cur) >> (8 - bs->bit); v 244 net/netfilter/nf_conntrack_h323_asn1.c v &= 0xffffffff << (32 - b); v 246 net/netfilter/nf_conntrack_h323_asn1.c return v; v 254 net/netfilter/nf_conntrack_h323_asn1.c unsigned int v = 0; v 258 net/netfilter/nf_conntrack_h323_asn1.c v |= *bs->cur++; v 259 net/netfilter/nf_conntrack_h323_asn1.c v <<= 8; v 262 net/netfilter/nf_conntrack_h323_asn1.c v |= *bs->cur++; v 263 net/netfilter/nf_conntrack_h323_asn1.c v <<= 8; v 266 net/netfilter/nf_conntrack_h323_asn1.c v |= *bs->cur++; v 267 net/netfilter/nf_conntrack_h323_asn1.c v <<= 8; v 270 net/netfilter/nf_conntrack_h323_asn1.c v |= *bs->cur++; v 273 net/netfilter/nf_conntrack_h323_asn1.c return v; v 336 net/netfilter/nf_conntrack_h323_asn1.c unsigned int v = get_uint(bs, len) + f->lb; v 337 net/netfilter/nf_conntrack_h323_asn1.c PRINT(" = %u", v); v 338 net/netfilter/nf_conntrack_h323_asn1.c *((unsigned int *)(base + f->offset)) = v; v 160 net/netfilter/nf_conntrack_standalone.c static void *ct_seq_next(struct seq_file *s, void *v, loff_t *pos) v 163 net/netfilter/nf_conntrack_standalone.c return ct_get_next(s, v); v 166 net/netfilter/nf_conntrack_standalone.c static void ct_seq_stop(struct seq_file *s, void *v) v 293 net/netfilter/nf_conntrack_standalone.c static int ct_seq_show(struct seq_file *s, void *v) v 295 net/netfilter/nf_conntrack_standalone.c struct nf_conntrack_tuple_hash *hash = v; v 403 net/netfilter/nf_conntrack_standalone.c static void *ct_cpu_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 418 net/netfilter/nf_conntrack_standalone.c static void ct_cpu_seq_stop(struct seq_file *seq, void *v) v 422 net/netfilter/nf_conntrack_standalone.c static int ct_cpu_seq_show(struct seq_file *seq, void *v) v 426 net/netfilter/nf_conntrack_standalone.c const struct ip_conntrack_stat *st = v; v 428 net/netfilter/nf_conntrack_standalone.c if (v == SEQ_START_TOKEN) { v 338 net/netfilter/nf_log.c static void *seq_next(struct seq_file *s, void *v, loff_t *pos) v 350 net/netfilter/nf_log.c static void seq_stop(struct seq_file *s, void *v) v 355 net/netfilter/nf_log.c static int seq_show(struct seq_file *s, void *v) v 357 net/netfilter/nf_log.c loff_t *pos = v; v 259 net/netfilter/nf_synproxy_core.c static void *synproxy_cpu_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 274 net/netfilter/nf_synproxy_core.c static void synproxy_cpu_seq_stop(struct seq_file *seq, void *v) v 279 net/netfilter/nf_synproxy_core.c static int synproxy_cpu_seq_show(struct seq_file *seq, void *v) v 281 net/netfilter/nf_synproxy_core.c struct synproxy_stats *stats = v; v 283 net/netfilter/nf_synproxy_core.c if (v == SEQ_START_TOKEN) { v 7528 net/netfilter/nf_tables_api.c int nft_verdict_dump(struct sk_buff *skb, int type, const struct nft_verdict *v) v 7536 net/netfilter/nf_tables_api.c if (nla_put_be32(skb, NFTA_VERDICT_CODE, htonl(v->code))) v 7539 net/netfilter/nf_tables_api.c switch (v->code) { v 7543 net/netfilter/nf_tables_api.c v->chain->name)) v 1070 net/netfilter/nfnetlink_log.c static void *seq_next(struct seq_file *s, void *v, loff_t *pos) v 1073 net/netfilter/nfnetlink_log.c return get_next(seq_file_net(s), s->private, v); v 1076 net/netfilter/nfnetlink_log.c static void seq_stop(struct seq_file *s, void *v) v 1082 net/netfilter/nfnetlink_log.c static int seq_show(struct seq_file *s, void *v) v 1084 net/netfilter/nfnetlink_log.c const struct nfulnl_instance *inst = v; v 1462 net/netfilter/nfnetlink_queue.c static void *seq_next(struct seq_file *s, void *v, loff_t *pos) v 1465 net/netfilter/nfnetlink_queue.c return get_next(s, v); v 1468 net/netfilter/nfnetlink_queue.c static void seq_stop(struct seq_file *s, void *v) v 1474 net/netfilter/nfnetlink_queue.c static int seq_show(struct seq_file *s, void *v) v 1476 net/netfilter/nfnetlink_queue.c const struct nfqnl_instance *inst = v; v 617 net/netfilter/x_tables.c int v = -verdict - 1; v 622 net/netfilter/x_tables.c switch (v) { v 1497 net/netfilter/x_tables.c static void *xt_table_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1502 net/netfilter/x_tables.c return seq_list_next(v, &net->xt.tables[af], pos); v 1505 net/netfilter/x_tables.c static void xt_table_seq_stop(struct seq_file *seq, void *v) v 1512 net/netfilter/x_tables.c static int xt_table_seq_show(struct seq_file *seq, void *v) v 1514 net/netfilter/x_tables.c struct xt_table *table = list_entry(v, struct xt_table, list); v 1544 net/netfilter/x_tables.c static void *xt_mttg_seq_next(struct seq_file *seq, void *v, loff_t *ppos, v 1598 net/netfilter/x_tables.c static void xt_mttg_seq_stop(struct seq_file *seq, void *v) v 1618 net/netfilter/x_tables.c static void *xt_match_seq_next(struct seq_file *seq, void *v, loff_t *ppos) v 1620 net/netfilter/x_tables.c return xt_mttg_seq_next(seq, v, ppos, false); v 1623 net/netfilter/x_tables.c static int xt_match_seq_show(struct seq_file *seq, void *v) v 1652 net/netfilter/x_tables.c static void *xt_target_seq_next(struct seq_file *seq, void *v, loff_t *ppos) v 1654 net/netfilter/x_tables.c return xt_mttg_seq_next(seq, v, ppos, true); v 1657 net/netfilter/x_tables.c static int xt_target_seq_show(struct seq_file *seq, void *v) v 1070 net/netfilter/xt_hashlimit.c static void *dl_seq_next(struct seq_file *s, void *v, loff_t *pos) v 1073 net/netfilter/xt_hashlimit.c unsigned int *bucket = v; v 1077 net/netfilter/xt_hashlimit.c kfree(v); v 1083 net/netfilter/xt_hashlimit.c static void dl_seq_stop(struct seq_file *s, void *v) v 1087 net/netfilter/xt_hashlimit.c unsigned int *bucket = v; v 1170 net/netfilter/xt_hashlimit.c static int dl_seq_show_v2(struct seq_file *s, void *v) v 1173 net/netfilter/xt_hashlimit.c unsigned int *bucket = (unsigned int *)v; v 1184 net/netfilter/xt_hashlimit.c static int dl_seq_show_v1(struct seq_file *s, void *v) v 1187 net/netfilter/xt_hashlimit.c unsigned int *bucket = v; v 1198 net/netfilter/xt_hashlimit.c static int dl_seq_show(struct seq_file *s, void *v) v 1201 net/netfilter/xt_hashlimit.c unsigned int *bucket = v; v 488 net/netfilter/xt_recent.c static void *recent_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 492 net/netfilter/xt_recent.c const struct recent_entry *e = v; v 504 net/netfilter/xt_recent.c static void recent_seq_stop(struct seq_file *s, void *v) v 510 net/netfilter/xt_recent.c static int recent_seq_show(struct seq_file *seq, void *v) v 512 net/netfilter/xt_recent.c const struct recent_entry *e = v; v 82 net/netfilter/xt_time.c unsigned int v, w; v 85 net/netfilter/xt_time.c v = time % SECONDS_PER_DAY; v 86 net/netfilter/xt_time.c r->second = v % 60; v 87 net/netfilter/xt_time.c w = v / 60; v 90 net/netfilter/xt_time.c return v; v 2601 net/netlink/af_netlink.c static void *netlink_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2607 net/netlink/af_netlink.c static void netlink_seq_stop(struct seq_file *seq, void *v) v 2618 net/netlink/af_netlink.c static int netlink_seq_show(struct seq_file *seq, void *v) v 2620 net/netlink/af_netlink.c if (v == SEQ_START_TOKEN) { v 2625 net/netlink/af_netlink.c struct sock *s = v; v 1238 net/netrom/af_netrom.c static void *nr_info_next(struct seq_file *seq, void *v, loff_t *pos) v 1240 net/netrom/af_netrom.c return seq_hlist_next(v, &nr_list, pos); v 1243 net/netrom/af_netrom.c static void nr_info_stop(struct seq_file *seq, void *v) v 1248 net/netrom/af_netrom.c static int nr_info_show(struct seq_file *seq, void *v) v 1250 net/netrom/af_netrom.c struct sock *s = sk_entry(v); v 1256 net/netrom/af_netrom.c if (v == SEQ_START_TOKEN) v 847 net/netrom/nr_route.c static void *nr_node_next(struct seq_file *seq, void *v, loff_t *pos) v 849 net/netrom/nr_route.c return seq_hlist_next(v, &nr_node_list, pos); v 852 net/netrom/nr_route.c static void nr_node_stop(struct seq_file *seq, void *v) v 857 net/netrom/nr_route.c static int nr_node_show(struct seq_file *seq, void *v) v 862 net/netrom/nr_route.c if (v == SEQ_START_TOKEN) v 866 net/netrom/nr_route.c struct nr_node *nr_node = hlist_entry(v, struct nr_node, v 902 net/netrom/nr_route.c static void *nr_neigh_next(struct seq_file *seq, void *v, loff_t *pos) v 904 net/netrom/nr_route.c return seq_hlist_next(v, &nr_neigh_list, pos); v 907 net/netrom/nr_route.c static void nr_neigh_stop(struct seq_file *seq, void *v) v 912 net/netrom/nr_route.c static int nr_neigh_show(struct seq_file *seq, void *v) v 917 net/netrom/nr_route.c if (v == SEQ_START_TOKEN) v 922 net/netrom/nr_route.c nr_neigh = hlist_entry(v, struct nr_neigh, neigh_node); v 4581 net/packet/af_packet.c static void *packet_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 4584 net/packet/af_packet.c return seq_hlist_next_rcu(v, &net->packet.sklist, pos); v 4587 net/packet/af_packet.c static void packet_seq_stop(struct seq_file *seq, void *v) v 4593 net/packet/af_packet.c static int packet_seq_show(struct seq_file *seq, void *v) v 4595 net/packet/af_packet.c if (v == SEQ_START_TOKEN) v 4598 net/packet/af_packet.c struct sock *s = sk_entry(v); v 568 net/phonet/socket.c static void *pn_sock_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 572 net/phonet/socket.c if (v == SEQ_START_TOKEN) v 575 net/phonet/socket.c sk = pn_sock_get_next(seq, v); v 580 net/phonet/socket.c static void pn_sock_seq_stop(struct seq_file *seq, void *v) v 586 net/phonet/socket.c static int pn_sock_seq_show(struct seq_file *seq, void *v) v 589 net/phonet/socket.c if (v == SEQ_START_TOKEN) v 593 net/phonet/socket.c struct sock *sk = v; v 743 net/phonet/socket.c static void *pn_res_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 747 net/phonet/socket.c if (v == SEQ_START_TOKEN) v 750 net/phonet/socket.c sk = pn_res_get_next(seq, v); v 755 net/phonet/socket.c static void pn_res_seq_stop(struct seq_file *seq, void *v) v 761 net/phonet/socket.c static int pn_res_seq_show(struct seq_file *seq, void *v) v 764 net/phonet/socket.c if (v == SEQ_START_TOKEN) v 767 net/phonet/socket.c struct sock **psk = v; v 227 net/rds/ib.h #define IB_GET_SEND_CREDITS(v) ((v) & 0xffff) v 228 net/rds/ib.h #define IB_GET_POST_CREDITS(v) ((v) >> 16) v 229 net/rds/ib.h #define IB_SET_SEND_CREDITS(v) ((v) & 0xffff) v 230 net/rds/ib.h #define IB_SET_POST_CREDITS(v) ((v) << 16) v 25 net/rds/rds.h #define RDS_PROTOCOL_MAJOR(v) ((v) >> 8) v 26 net/rds/rds.h #define RDS_PROTOCOL_MINOR(v) ((v) & 255) v 1356 net/rose/af_rose.c static void *rose_info_next(struct seq_file *seq, void *v, loff_t *pos) v 1358 net/rose/af_rose.c return seq_hlist_next(v, &rose_list, pos); v 1361 net/rose/af_rose.c static void rose_info_stop(struct seq_file *seq, void *v) v 1367 net/rose/af_rose.c static int rose_info_show(struct seq_file *seq, void *v) v 1371 net/rose/af_rose.c if (v == SEQ_START_TOKEN) v 1376 net/rose/af_rose.c struct sock *s = sk_entry(v); v 1105 net/rose/rose_route.c static void *rose_node_next(struct seq_file *seq, void *v, loff_t *pos) v 1109 net/rose/rose_route.c return (v == SEQ_START_TOKEN) ? rose_node_list v 1110 net/rose/rose_route.c : ((struct rose_node *)v)->next; v 1113 net/rose/rose_route.c static void rose_node_stop(struct seq_file *seq, void *v) v 1119 net/rose/rose_route.c static int rose_node_show(struct seq_file *seq, void *v) v 1124 net/rose/rose_route.c if (v == SEQ_START_TOKEN) v 1127 net/rose/rose_route.c const struct rose_node *rose_node = v; v 1171 net/rose/rose_route.c static void *rose_neigh_next(struct seq_file *seq, void *v, loff_t *pos) v 1175 net/rose/rose_route.c return (v == SEQ_START_TOKEN) ? rose_neigh_list v 1176 net/rose/rose_route.c : ((struct rose_neigh *)v)->next; v 1179 net/rose/rose_route.c static void rose_neigh_stop(struct seq_file *seq, void *v) v 1185 net/rose/rose_route.c static int rose_neigh_show(struct seq_file *seq, void *v) v 1190 net/rose/rose_route.c if (v == SEQ_START_TOKEN) v 1194 net/rose/rose_route.c struct rose_neigh *rose_neigh = v; v 1242 net/rose/rose_route.c static void *rose_route_next(struct seq_file *seq, void *v, loff_t *pos) v 1246 net/rose/rose_route.c return (v == SEQ_START_TOKEN) ? rose_route_list v 1247 net/rose/rose_route.c : ((struct rose_route *)v)->next; v 1250 net/rose/rose_route.c static void rose_route_stop(struct seq_file *seq, void *v) v 1256 net/rose/rose_route.c static int rose_route_show(struct seq_file *seq, void *v) v 1260 net/rose/rose_route.c if (v == SEQ_START_TOKEN) v 1264 net/rose/rose_route.c struct rose_route *rose_route = v; v 85 net/rxrpc/local_event.c char v; v 99 net/rxrpc/local_event.c &v, 1) < 0) v 101 net/rxrpc/local_event.c _proto("Rx VERSION { %02x }", v); v 102 net/rxrpc/local_event.c if (v == 0) v 38 net/rxrpc/proc.c static void *rxrpc_call_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 42 net/rxrpc/proc.c return seq_list_next(v, &rxnet->calls, pos); v 45 net/rxrpc/proc.c static void rxrpc_call_seq_stop(struct seq_file *seq, void *v) v 55 net/rxrpc/proc.c static int rxrpc_call_seq_show(struct seq_file *seq, void *v) v 66 net/rxrpc/proc.c if (v == &rxnet->calls) { v 75 net/rxrpc/proc.c call = list_entry(v, struct rxrpc_call, link); v 141 net/rxrpc/proc.c static void *rxrpc_connection_seq_next(struct seq_file *seq, void *v, v 146 net/rxrpc/proc.c return seq_list_next(v, &rxnet->conn_proc_list, pos); v 149 net/rxrpc/proc.c static void rxrpc_connection_seq_stop(struct seq_file *seq, void *v) v 157 net/rxrpc/proc.c static int rxrpc_connection_seq_show(struct seq_file *seq, void *v) v 163 net/rxrpc/proc.c if (v == &rxnet->conn_proc_list) { v 173 net/rxrpc/proc.c conn = list_entry(v, struct rxrpc_connection, proc_link); v 215 net/rxrpc/proc.c static int rxrpc_peer_seq_show(struct seq_file *seq, void *v) v 221 net/rxrpc/proc.c if (v == SEQ_START_TOKEN) { v 230 net/rxrpc/proc.c peer = list_entry(v, struct rxrpc_peer, hash_link); v 288 net/rxrpc/proc.c static void *rxrpc_peer_seq_next(struct seq_file *seq, void *v, loff_t *_pos) v 300 net/rxrpc/proc.c p = seq_hlist_next_rcu(v, &rxnet->peer_hash[bucket], _pos); v 324 net/rxrpc/proc.c static void rxrpc_peer_seq_stop(struct seq_file *seq, void *v) v 25 net/sched/act_vlan.c struct tcf_vlan *v = to_vlan(a); v 31 net/sched/act_vlan.c tcf_lastuse_update(&v->tcf_tm); v 32 net/sched/act_vlan.c bstats_cpu_update(this_cpu_ptr(v->common.cpu_bstats), skb); v 40 net/sched/act_vlan.c action = READ_ONCE(v->tcf_action); v 42 net/sched/act_vlan.c p = rcu_dereference_bh(v->vlan_p); v 91 net/sched/act_vlan.c qstats_drop_inc(this_cpu_ptr(v->common.cpu_qstats)); v 112 net/sched/act_vlan.c struct tcf_vlan *v; v 208 net/sched/act_vlan.c v = to_vlan(*a); v 221 net/sched/act_vlan.c spin_lock_bh(&v->tcf_lock); v 223 net/sched/act_vlan.c rcu_swap_protected(v->vlan_p, p, lockdep_is_held(&v->tcf_lock)); v 224 net/sched/act_vlan.c spin_unlock_bh(&v->tcf_lock); v 244 net/sched/act_vlan.c struct tcf_vlan *v = to_vlan(a); v 247 net/sched/act_vlan.c p = rcu_dereference_protected(v->vlan_p, 1); v 256 net/sched/act_vlan.c struct tcf_vlan *v = to_vlan(a); v 259 net/sched/act_vlan.c .index = v->tcf_index, v 260 net/sched/act_vlan.c .refcnt = refcount_read(&v->tcf_refcnt) - ref, v 261 net/sched/act_vlan.c .bindcnt = atomic_read(&v->tcf_bindcnt) - bind, v 265 net/sched/act_vlan.c spin_lock_bh(&v->tcf_lock); v 266 net/sched/act_vlan.c opt.action = v->tcf_action; v 267 net/sched/act_vlan.c p = rcu_dereference_protected(v->vlan_p, lockdep_is_held(&v->tcf_lock)); v 281 net/sched/act_vlan.c tcf_tm_dump(&t, &v->tcf_tm); v 284 net/sched/act_vlan.c spin_unlock_bh(&v->tcf_lock); v 289 net/sched/act_vlan.c spin_unlock_bh(&v->tcf_lock); v 307 net/sched/act_vlan.c struct tcf_vlan *v = to_vlan(a); v 308 net/sched/act_vlan.c struct tcf_t *tm = &v->tcf_tm; v 89 net/sched/em_meta.c static inline int meta_id(struct meta_value *v) v 91 net/sched/em_meta.c return TCF_META_ID(v->hdr.kind); v 94 net/sched/em_meta.c static inline int meta_type(struct meta_value *v) v 96 net/sched/em_meta.c return TCF_META_TYPE(v->hdr.kind); v 100 net/sched/em_meta.c struct tcf_pkt_info *info, struct meta_value *v, \ v 703 net/sched/em_meta.c static void meta_var_destroy(struct meta_value *v) v 705 net/sched/em_meta.c kfree((void *) v->val); v 708 net/sched/em_meta.c static void meta_var_apply_extras(struct meta_value *v, v 711 net/sched/em_meta.c int shift = v->hdr.shift; v 717 net/sched/em_meta.c static int meta_var_dump(struct sk_buff *skb, struct meta_value *v, int tlv) v 719 net/sched/em_meta.c if (v->val && v->len && v 720 net/sched/em_meta.c nla_put(skb, tlv, v->len, (void *) v->val)) v 759 net/sched/em_meta.c static void meta_int_apply_extras(struct meta_value *v, v 762 net/sched/em_meta.c if (v->hdr.shift) v 763 net/sched/em_meta.c dst->value >>= v->hdr.shift; v 765 net/sched/em_meta.c if (v->val) v 766 net/sched/em_meta.c dst->value &= v->val; v 769 net/sched/em_meta.c static int meta_int_dump(struct sk_buff *skb, struct meta_value *v, int tlv) v 771 net/sched/em_meta.c if (v->len == sizeof(unsigned long)) { v 772 net/sched/em_meta.c if (nla_put(skb, tlv, sizeof(unsigned long), &v->val)) v 774 net/sched/em_meta.c } else if (v->len == sizeof(u32)) { v 775 net/sched/em_meta.c if (nla_put_u32(skb, tlv, v->val)) v 813 net/sched/em_meta.c static inline const struct meta_type_ops *meta_type_ops(struct meta_value *v) v 815 net/sched/em_meta.c return &__meta_type_ops[meta_type(v)]; v 823 net/sched/em_meta.c struct meta_value *v, struct meta_obj *dst) v 827 net/sched/em_meta.c if (meta_id(v) == TCF_META_ID_VALUE) { v 828 net/sched/em_meta.c dst->value = v->val; v 829 net/sched/em_meta.c dst->len = v->len; v 833 net/sched/em_meta.c meta_ops(v)->get(skb, info, v, dst, &err); v 837 net/sched/em_meta.c if (meta_type_ops(v)->apply_extras) v 838 net/sched/em_meta.c meta_type_ops(v)->apply_extras(v, dst); v 262 net/sched/ematch.c void *v = kmemdup(data, data_len, GFP_KERNEL); v 263 net/sched/ematch.c if (v == NULL) { v 267 net/sched/ematch.c em->data = (unsigned long) v; v 2222 net/sched/sch_api.c static int psched_show(struct seq_file *seq, void *v) v 408 net/sched/sch_cake.c struct cobalt_vars v; v 410 net/sched/sch_cake.c memset(&v, 0, sizeof(v)); v 411 net/sched/sch_cake.c v.rec_inv_sqrt = ~0U; v 412 net/sched/sch_cake.c cobalt_rec_inv_sqrt_cache[0] = v.rec_inv_sqrt; v 414 net/sched/sch_cake.c for (v.count = 1; v.count < REC_INV_SQRT_CACHE; v.count++) { v 415 net/sched/sch_cake.c cobalt_newton_step(&v); v 416 net/sched/sch_cake.c cobalt_newton_step(&v); v 417 net/sched/sch_cake.c cobalt_newton_step(&v); v 418 net/sched/sch_cake.c cobalt_newton_step(&v); v 420 net/sched/sch_cake.c cobalt_rec_inv_sqrt_cache[v.count] = v.rec_inv_sqrt; v 230 net/sctp/bind_addr.c retval.v = NULL; v 234 net/sctp/bind_addr.c retval.v = kmalloc(len, gfp); v 235 net/sctp/bind_addr.c if (!retval.v) v 243 net/sctp/bind_addr.c memcpy(addrparms.v, &rawaddr, len); v 244 net/sctp/bind_addr.c addrparms.v += len; v 203 net/sctp/inqueue.c chunk->subh.v = NULL; /* Subheader is no longer valid. */ v 62 net/sctp/objcnt.c static int sctp_objcnt_seq_show(struct seq_file *seq, void *v) v 66 net/sctp/objcnt.c i = (int)*(loff_t *)v; v 79 net/sctp/objcnt.c static void sctp_objcnt_seq_stop(struct seq_file *seq, void *v) v 83 net/sctp/objcnt.c static void *sctp_objcnt_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 59 net/sctp/proc.c static int sctp_snmp_seq_show(struct seq_file *seq, void *v) v 146 net/sctp/proc.c static void sctp_eps_seq_stop(struct seq_file *seq, void *v) v 151 net/sctp/proc.c static void *sctp_eps_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 161 net/sctp/proc.c static int sctp_eps_seq_show(struct seq_file *seq, void *v) v 167 net/sctp/proc.c int hash = *(loff_t *)v; v 214 net/sctp/proc.c static void sctp_transport_seq_stop(struct seq_file *seq, void *v) v 221 net/sctp/proc.c static void *sctp_transport_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 231 net/sctp/proc.c static int sctp_assocs_seq_show(struct seq_file *seq, void *v) v 238 net/sctp/proc.c if (v == SEQ_START_TOKEN) { v 247 net/sctp/proc.c transport = (struct sctp_transport *)v; v 292 net/sctp/proc.c static int sctp_remaddr_seq_show(struct seq_file *seq, void *v) v 297 net/sctp/proc.c if (v == SEQ_START_TOKEN) { v 303 net/sctp/proc.c transport = (struct sctp_transport *)v; v 325 net/sctp/sm_make_chunk.c retval->param_hdr.v = v 326 net/sctp/sm_make_chunk.c sctp_addto_chunk(retval, addrs_len, addrs.v); v 375 net/sctp/sm_make_chunk.c kfree(addrs.v); v 412 net/sctp/sm_make_chunk.c addrs.v, addrs_len); v 492 net/sctp/sm_make_chunk.c retval->param_hdr.v = sctp_addto_chunk(retval, addrs_len, addrs.v); v 529 net/sctp/sm_make_chunk.c kfree(addrs.v); v 1967 net/sctp/sm_make_chunk.c param.v, len, 0); v 2108 net/sctp/sm_make_chunk.c param.v); v 2276 net/sctp/sm_make_chunk.c if (param.v != (void *)chunk->chunk_end) v 2623 net/sctp/sm_make_chunk.c addr_param = param.v + sizeof(struct sctp_addip_param); v 2785 net/sctp/sm_make_chunk.c retval->param_hdr.v = v 3179 net/sctp/sm_make_chunk.c if (param.v != addip->addip_hdr.params) v 3186 net/sctp/sm_make_chunk.c if (param.v != addip->addip_hdr.params) v 3217 net/sctp/sm_make_chunk.c if (param.v != chunk->chunk_end) v 3599 net/sctp/sm_make_chunk.c retval->param_hdr.v = reconf->params; v 399 net/sctp/sm_statefuns.c chunk->param_hdr.v = skb_pull(chunk->skb, sizeof(struct sctp_inithdr)); v 583 net/sctp/sm_statefuns.c chunk->param_hdr.v = skb_pull(chunk->skb, sizeof(struct sctp_inithdr)); v 1500 net/sctp/sm_statefuns.c chunk->param_hdr.v = skb_pull(chunk->skb, sizeof(struct sctp_inithdr)); v 493 net/sctp/stream.c struct sctp_strreset_tsnreq *req = param.v; v 497 net/sctp/stream.c return param.v; v 515 net/sctp/stream.c struct sctp_strreset_outreq *outreq = param.v; v 604 net/sctp/stream.c struct sctp_strreset_inreq *inreq = param.v; v 682 net/sctp/stream.c struct sctp_strreset_tsnreq *tsnreq = param.v; v 778 net/sctp/stream.c struct sctp_strreset_addstrm *addstrm = param.v; v 848 net/sctp/stream.c struct sctp_strreset_addstrm *addstrm = param.v; v 914 net/sctp/stream.c struct sctp_strreset_resp *resp = param.v; v 11 net/sunrpc/auth_gss/gss_rpc_xdr.c static int gssx_enc_bool(struct xdr_stream *xdr, int v) v 18 net/sunrpc/auth_gss/gss_rpc_xdr.c *p = v ? xdr_one : xdr_zero; v 22 net/sunrpc/auth_gss/gss_rpc_xdr.c static int gssx_dec_bool(struct xdr_stream *xdr, u32 *v) v 29 net/sunrpc/auth_gss/gss_rpc_xdr.c *v = be32_to_cpu(*p); v 20 net/sunrpc/debugfs.c tasks_show(struct seq_file *f, void *v) v 23 net/sunrpc/debugfs.c struct rpc_task *task = v; v 57 net/sunrpc/debugfs.c tasks_next(struct seq_file *f, void *v, loff_t *pos) v 60 net/sunrpc/debugfs.c struct rpc_task *task = v; v 72 net/sunrpc/debugfs.c tasks_stop(struct seq_file *f, void *v) v 174 net/sunrpc/debugfs.c xprt_info_show(struct seq_file *f, void *v) v 398 net/sunrpc/rpc_pipe.c rpc_show_info(struct seq_file *m, void *v) v 1268 net/sunrpc/rpc_pipe.c rpc_dummy_info_show(struct seq_file *m, void *v) v 37 net/sunrpc/stats.c static int rpc_proc_show(struct seq_file *seq, void *v) { v 125 net/tipc/monitor.c static void map_set(u64 *up_map, int i, unsigned int v) v 128 net/tipc/monitor.c *up_map |= ((u64)v << i); v 2763 net/unix/af_unix.c static void *unix_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 2766 net/unix/af_unix.c return unix_next_socket(seq, v, pos); v 2769 net/unix/af_unix.c static void unix_seq_stop(struct seq_file *seq, void *v) v 2775 net/unix/af_unix.c static int unix_seq_show(struct seq_file *seq, void *v) v 2778 net/unix/af_unix.c if (v == SEQ_START_TOKEN) v 2782 net/unix/af_unix.c struct sock *s = v; v 167 net/wireless/lib80211_crypt_tkip.c static inline u16 Mk16_le(__le16 * v) v 169 net/wireless/lib80211_crypt_tkip.c return le16_to_cpu(*v); v 207 net/wireless/lib80211_crypt_tkip.c static inline u16 _S_(u16 v) v 209 net/wireless/lib80211_crypt_tkip.c u16 t = Sbox[Hi8(v)]; v 210 net/wireless/lib80211_crypt_tkip.c return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8)); v 5528 net/wireless/nl80211.c struct net_device *v; v 5534 net/wireless/nl80211.c v = dev_get_by_index(genl_info_net(info), nla_get_u32(vlanattr)); v 5535 net/wireless/nl80211.c if (!v) v 5538 net/wireless/nl80211.c if (!v->ieee80211_ptr || v->ieee80211_ptr->wiphy != &rdev->wiphy) { v 5543 net/wireless/nl80211.c if (v->ieee80211_ptr->iftype != NL80211_IFTYPE_AP_VLAN && v 5544 net/wireless/nl80211.c v->ieee80211_ptr->iftype != NL80211_IFTYPE_AP && v 5545 net/wireless/nl80211.c v->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO) { v 5550 net/wireless/nl80211.c if (!netif_running(v)) { v 5555 net/wireless/nl80211.c return v; v 5557 net/wireless/nl80211.c dev_put(v); v 75 net/wireless/wext-proc.c static int wireless_dev_seq_show(struct seq_file *seq, void *v) v 79 net/wireless/wext-proc.c if (v == SEQ_START_TOKEN) v 86 net/wireless/wext-proc.c wireless_seq_printf_stats(seq, v); v 107 net/wireless/wext-proc.c static void *wireless_dev_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 113 net/wireless/wext-proc.c return v == SEQ_START_TOKEN ? v 114 net/wireless/wext-proc.c first_net_device(net) : next_net_device(v); v 117 net/wireless/wext-proc.c static void wireless_dev_seq_stop(struct seq_file *seq, void *v) v 32 net/x25/x25_proc.c static void *x25_seq_route_next(struct seq_file *seq, void *v, loff_t *pos) v 34 net/x25/x25_proc.c return seq_list_next(v, &x25_route_list, pos); v 37 net/x25/x25_proc.c static void x25_seq_route_stop(struct seq_file *seq, void *v) v 43 net/x25/x25_proc.c static int x25_seq_route_show(struct seq_file *seq, void *v) v 45 net/x25/x25_proc.c struct x25_route *rt = list_entry(v, struct x25_route, node); v 47 net/x25/x25_proc.c if (v == &x25_route_list) { v 52 net/x25/x25_proc.c rt = v; v 67 net/x25/x25_proc.c static void *x25_seq_socket_next(struct seq_file *seq, void *v, loff_t *pos) v 69 net/x25/x25_proc.c return seq_hlist_next(v, &x25_list, pos); v 72 net/x25/x25_proc.c static void x25_seq_socket_stop(struct seq_file *seq, void *v) v 78 net/x25/x25_proc.c static int x25_seq_socket_show(struct seq_file *seq, void *v) v 85 net/x25/x25_proc.c if (v == SEQ_START_TOKEN) { v 91 net/x25/x25_proc.c s = sk_entry(v); v 120 net/x25/x25_proc.c static void *x25_seq_forward_next(struct seq_file *seq, void *v, loff_t *pos) v 122 net/x25/x25_proc.c return seq_list_next(v, &x25_forward_list, pos); v 125 net/x25/x25_proc.c static void x25_seq_forward_stop(struct seq_file *seq, void *v) v 131 net/x25/x25_proc.c static int x25_seq_forward_show(struct seq_file *seq, void *v) v 133 net/x25/x25_proc.c struct x25_forward *f = list_entry(v, struct x25_forward, node); v 135 net/x25/x25_proc.c if (v == &x25_forward_list) { v 140 net/x25/x25_proc.c f = v; v 947 net/xfrm/xfrm_policy.c struct xfrm_pol_inexact_node *v, v 959 net/xfrm/xfrm_policy.c while ((rnode = rb_first(&v->root)) != NULL) { v 961 net/xfrm/xfrm_policy.c rb_erase(&node->node, &v->root); v 966 net/xfrm/xfrm_policy.c hlist_for_each_entry(tmp, &v->hhead, bydst) { v 1436 net/xfrm/xfrm_policy.c if (policy->mark.v == pol->mark.v && v 1623 net/xfrm/xfrm_policy.c (mark & pol->mark.m) == pol->mark.v && v 1721 net/xfrm/xfrm_policy.c (mark & pol->mark.m) == pol->mark.v) { v 1893 net/xfrm/xfrm_policy.c (fl->flowi_mark & pol->mark.m) != pol->mark.v || v 2172 net/xfrm/xfrm_policy.c if ((sk->sk_mark & pol->mark.m) != pol->mark.v || v 2594 net/xfrm/xfrm_policy.c if (xfrm[i]->props.smark.v || xfrm[i]->props.smark.m) v 47 net/xfrm/xfrm_proc.c static int xfrm_statistics_seq_show(struct seq_file *seq, void *v) v 942 net/xfrm/xfrm_state.c if ((mark & x->mark.m) != x->mark.v) v 967 net/xfrm/xfrm_state.c if ((mark & x->mark.m) != x->mark.v) v 981 net/xfrm/xfrm_state.c u32 mark = x->mark.v & x->mark.m; v 1051 net/xfrm/xfrm_state.c u32 mark = pol->mark.v & pol->mark.m; v 1065 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && v 1082 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && v 1195 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && v 1276 net/xfrm/xfrm_state.c u32 mark = xnew->mark.v & xnew->mark.m; v 1284 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && v 1313 net/xfrm/xfrm_state.c u32 mark = m->v & m->m; v 1322 net/xfrm/xfrm_state.c (mark & x->mark.m) != x->mark.v || v 1362 net/xfrm/xfrm_state.c x->mark.v = m->v; v 1390 net/xfrm/xfrm_state.c u32 mark = x->mark.v & x->mark.m; v 1678 net/xfrm/xfrm_state.c if (x->props.smark.m || x->props.smark.v || x->if_id) { v 1681 net/xfrm/xfrm_state.c if (x->props.smark.m || x->props.smark.v) v 1806 net/xfrm/xfrm_state.c const struct xfrm_state *v = p; v 1808 net/xfrm/xfrm_state.c switch (v->props.mode) { v 1810 net/xfrm/xfrm_state.c if (v->id.proto != IPPROTO_AH) v 1835 net/xfrm/xfrm_state.c const struct xfrm_tmpl *v = p; v 1837 net/xfrm/xfrm_state.c switch (v->mode) { v 1906 net/xfrm/xfrm_state.c (mark & x->mark.m) == x->mark.v && v 1972 net/xfrm/xfrm_state.c u32 mark = x->mark.v & x->mark.m; v 560 net/xfrm/xfrm_user.c m->v = nla_get_u32(attrs[XFRMA_SET_MARK]); v 566 net/xfrm/xfrm_user.c m->v = m->m = 0; v 873 net/xfrm/xfrm_user.c if (m->v | m->m) { v 874 net/xfrm/xfrm_user.c ret = nla_put_u32(skb, XFRMA_SET_MARK, m->v); v 2292 net/xfrm/xfrm_user.c xp->mark.v = x->mark.v = mark.v; v 2816 net/xfrm/xfrm_user.c if (x->props.smark.v | x->props.smark.m) { v 2817 net/xfrm/xfrm_user.c l += nla_total_size(sizeof(x->props.smark.v)); v 40 samples/bpf/lathist_kern.c static unsigned int log2(unsigned int v) v 45 samples/bpf/lathist_kern.c r = (v > 0xFFFF) << 4; v >>= r; v 46 samples/bpf/lathist_kern.c shift = (v > 0xFF) << 3; v >>= shift; r |= shift; v 47 samples/bpf/lathist_kern.c shift = (v > 0xF) << 2; v >>= shift; r |= shift; v 48 samples/bpf/lathist_kern.c shift = (v > 0x3) << 1; v >>= shift; r |= shift; v 49 samples/bpf/lathist_kern.c r |= (v >> 1); v 54 samples/bpf/lathist_kern.c static unsigned int log2l(unsigned long v) v 56 samples/bpf/lathist_kern.c unsigned int hi = v >> 32; v 61 samples/bpf/lathist_kern.c return log2(v); v 44 samples/bpf/lwt_len_hist_kern.c static unsigned int log2(unsigned int v) v 49 samples/bpf/lwt_len_hist_kern.c r = (v > 0xFFFF) << 4; v >>= r; v 50 samples/bpf/lwt_len_hist_kern.c shift = (v > 0xFF) << 3; v >>= shift; r |= shift; v 51 samples/bpf/lwt_len_hist_kern.c shift = (v > 0xF) << 2; v >>= shift; r |= shift; v 52 samples/bpf/lwt_len_hist_kern.c shift = (v > 0x3) << 1; v >>= shift; r |= shift; v 53 samples/bpf/lwt_len_hist_kern.c r |= (v >> 1); v 57 samples/bpf/lwt_len_hist_kern.c static unsigned int log2l(unsigned long v) v 59 samples/bpf/lwt_len_hist_kern.c unsigned int hi = v >> 32; v 63 samples/bpf/lwt_len_hist_kern.c return log2(v); v 37 samples/bpf/spintest_kern.c long v = PT_REGS_IP(ctx), *val; \ v 39 samples/bpf/spintest_kern.c val = bpf_map_lookup_elem(&my_map, &v); \ v 40 samples/bpf/spintest_kern.c bpf_map_update_elem(&my_map, &v, &v, BPF_ANY); \ v 41 samples/bpf/spintest_kern.c bpf_map_update_elem(&my_map2, &v, &v, BPF_ANY); \ v 42 samples/bpf/spintest_kern.c bpf_map_delete_elem(&my_map2, &v); \ v 43 samples/bpf/tracex2_kern.c static unsigned int log2(unsigned int v) v 48 samples/bpf/tracex2_kern.c r = (v > 0xFFFF) << 4; v >>= r; v 49 samples/bpf/tracex2_kern.c shift = (v > 0xFF) << 3; v >>= shift; r |= shift; v 50 samples/bpf/tracex2_kern.c shift = (v > 0xF) << 2; v >>= shift; r |= shift; v 51 samples/bpf/tracex2_kern.c shift = (v > 0x3) << 1; v >>= shift; r |= shift; v 52 samples/bpf/tracex2_kern.c r |= (v >> 1); v 56 samples/bpf/tracex2_kern.c static unsigned int log2l(unsigned long v) v 58 samples/bpf/tracex2_kern.c unsigned int hi = v >> 32; v 62 samples/bpf/tracex2_kern.c return log2(v); v 45 samples/bpf/tracex4_kern.c struct pair v = { v 50 samples/bpf/tracex4_kern.c bpf_map_update_elem(&my_map, &ptr, &v, BPF_ANY); v 34 samples/bpf/tracex4_user.c struct pair v; v 40 samples/bpf/tracex4_user.c bpf_map_lookup_elem(map_fd[0], &next_key, &v); v 42 samples/bpf/tracex4_user.c if (val - v.val < 1000000000ll) v 46 samples/bpf/tracex4_user.c next_key, (val - v.val) / 1000000000ll, v.ip); v 33 samples/livepatch/livepatch-sample.c static int livepatch_cmdline_proc_show(struct seq_file *m, void *v) v 241 scripts/kconfig/preprocess.c struct variable *v; v 243 scripts/kconfig/preprocess.c list_for_each_entry(v, &variable_list, node) { v 244 scripts/kconfig/preprocess.c if (!strcmp(name, v->name)) v 245 scripts/kconfig/preprocess.c return v; v 253 scripts/kconfig/preprocess.c struct variable *v; v 256 scripts/kconfig/preprocess.c v = variable_lookup(name); v 257 scripts/kconfig/preprocess.c if (!v) v 260 scripts/kconfig/preprocess.c if (argc == 0 && v->exp_count) v 264 scripts/kconfig/preprocess.c if (v->exp_count > 1000) v 267 scripts/kconfig/preprocess.c v->exp_count++; v 269 scripts/kconfig/preprocess.c if (v->flavor == VAR_RECURSIVE) v 270 scripts/kconfig/preprocess.c res = expand_string_with_args(v->value, argc, argv); v 272 scripts/kconfig/preprocess.c res = xstrdup(v->value); v 274 scripts/kconfig/preprocess.c v->exp_count--; v 282 scripts/kconfig/preprocess.c struct variable *v; v 286 scripts/kconfig/preprocess.c v = variable_lookup(name); v 287 scripts/kconfig/preprocess.c if (v) { v 290 scripts/kconfig/preprocess.c flavor = v->flavor; v 293 scripts/kconfig/preprocess.c free(v->value); v 300 scripts/kconfig/preprocess.c v = xmalloc(sizeof(*v)); v 301 scripts/kconfig/preprocess.c v->name = xstrdup(name); v 302 scripts/kconfig/preprocess.c v->exp_count = 0; v 303 scripts/kconfig/preprocess.c list_add_tail(&v->node, &variable_list); v 306 scripts/kconfig/preprocess.c v->flavor = flavor; v 314 scripts/kconfig/preprocess.c v->value = xrealloc(v->value, v 315 scripts/kconfig/preprocess.c strlen(v->value) + strlen(new_value) + 2); v 316 scripts/kconfig/preprocess.c strcat(v->value, " "); v 317 scripts/kconfig/preprocess.c strcat(v->value, new_value); v 320 scripts/kconfig/preprocess.c v->value = new_value; v 324 scripts/kconfig/preprocess.c static void variable_del(struct variable *v) v 326 scripts/kconfig/preprocess.c list_del(&v->node); v 327 scripts/kconfig/preprocess.c free(v->name); v 328 scripts/kconfig/preprocess.c free(v->value); v 329 scripts/kconfig/preprocess.c free(v); v 334 scripts/kconfig/preprocess.c struct variable *v, *tmp; v 336 scripts/kconfig/preprocess.c list_for_each_entry_safe(v, tmp, &variable_list, node) v 337 scripts/kconfig/preprocess.c variable_del(v); v 215 scripts/kconfig/qconf.cc void ConfigItem::testUpdateMenu(bool v) v 219 scripts/kconfig/qconf.cc visible = v; v 994 scripts/kconfig/qconf.cc ConfigView* v; v 996 scripts/kconfig/qconf.cc for (v = viewList; v; v = v->nextView) v 997 scripts/kconfig/qconf.cc v->list->updateList(item); v 1002 scripts/kconfig/qconf.cc ConfigView* v; v 1004 scripts/kconfig/qconf.cc for (v = viewList; v; v = v->nextView) v 1005 scripts/kconfig/qconf.cc v->list->updateListAll(); v 1856 scripts/kconfig/qconf.cc ConfigMainWindow* v; v 1883 scripts/kconfig/qconf.cc v = new ConfigMainWindow(); v 1887 scripts/kconfig/qconf.cc configApp->connect(configApp, SIGNAL(aboutToQuit()), v, SLOT(saveSettings())); v 1888 scripts/kconfig/qconf.cc v->show(); v 1893 scripts/kconfig/qconf.cc delete v; v 126 scripts/kconfig/qconf.h ConfigItem(ConfigList *parent, ConfigItem *after, struct menu *m, bool v) v 127 scripts/kconfig/qconf.h : Parent(parent, after), nextItem(0), menu(m), visible(v), goParent(false) v 131 scripts/kconfig/qconf.h ConfigItem(ConfigItem *parent, ConfigItem *after, struct menu *m, bool v) v 132 scripts/kconfig/qconf.h : Parent(parent, after), nextItem(0), menu(m), visible(v), goParent(false) v 136 scripts/kconfig/qconf.h ConfigItem(ConfigList *parent, ConfigItem *after, bool v) v 137 scripts/kconfig/qconf.h : Parent(parent, after), nextItem(0), menu(0), visible(v), goParent(true) v 145 scripts/kconfig/qconf.h void testUpdateMenu(bool v); v 75 scripts/mod/file2alias.c #define DEF_FIELD_ADDR_VAR(m, devid, f, v) \ v 76 scripts/mod/file2alias.c typeof(((struct devid *)0)->f) *v = ((m) + OFF_##devid##_##f) v 116 scripts/sign-file.c static int pem_pw_cb(char *buf, int len, int w, void *v) v 746 scripts/unifdef.c static Linetype op_strict(int *p, int v, Linetype at, Linetype bt) { v 748 scripts/unifdef.c return (*p = v, v ? LT_TRUE : LT_FALSE); v 987 security/apparmor/apparmorfs.c static int aa_sfs_seq_show(struct seq_file *seq, void *v) v 996 security/apparmor/apparmorfs.c seq_printf(seq, "%s\n", fs_file->v.boolean ? "yes" : "no"); v 999 security/apparmor/apparmorfs.c seq_printf(seq, "%s\n", fs_file->v.string); v 1002 security/apparmor/apparmorfs.c seq_printf(seq, "%#08lx\n", fs_file->v.u64); v 1066 security/apparmor/apparmorfs.c static int seq_profile_name_show(struct seq_file *seq, void *v) v 1077 security/apparmor/apparmorfs.c static int seq_profile_mode_show(struct seq_file *seq, void *v) v 1088 security/apparmor/apparmorfs.c static int seq_profile_attach_show(struct seq_file *seq, void *v) v 1104 security/apparmor/apparmorfs.c static int seq_profile_hash_show(struct seq_file *seq, void *v) v 1146 security/apparmor/apparmorfs.c static int seq_ns_stacked_show(struct seq_file *seq, void *v) v 1157 security/apparmor/apparmorfs.c static int seq_ns_nsstacked_show(struct seq_file *seq, void *v) v 1180 security/apparmor/apparmorfs.c static int seq_ns_level_show(struct seq_file *seq, void *v) v 1191 security/apparmor/apparmorfs.c static int seq_ns_name_show(struct seq_file *seq, void *v) v 1252 security/apparmor/apparmorfs.c static int seq_rawdata_abi_show(struct seq_file *seq, void *v) v 1261 security/apparmor/apparmorfs.c static int seq_rawdata_revision_show(struct seq_file *seq, void *v) v 1270 security/apparmor/apparmorfs.c static int seq_rawdata_hash_show(struct seq_file *seq, void *v) v 2347 security/apparmor/apparmorfs.c for (fs_file = fs_dir->v.files; fs_file && fs_file->name; ++fs_file) { v 2385 security/apparmor/apparmorfs.c for (fs_file = fs_dir->v.files; fs_file && fs_file->name; ++fs_file) { v 36 security/apparmor/include/apparmorfs.h } v; v 44 security/apparmor/include/apparmorfs.h .v_type = AA_SFS_TYPE_BOOLEAN, .v.boolean = (_value), \ v 48 security/apparmor/include/apparmorfs.h .v_type = AA_SFS_TYPE_STRING, .v.string = (_value), \ v 52 security/apparmor/include/apparmorfs.h .v_type = AA_SFS_TYPE_U64, .v.u64 = (_value), \ v 58 security/apparmor/include/apparmorfs.h { .name = (_name), .v_type = AA_SFS_TYPE_DIR, .v.files = (_value) } v 267 security/device_cgroup.c static int devcgroup_seq_show(struct seq_file *m, void *v) v 158 security/integrity/ima/ima.h int ima_measurements_show(struct seq_file *m, void *v); v 242 security/integrity/ima/ima.h void *ima_policy_next(struct seq_file *m, void *v, loff_t *pos); v 243 security/integrity/ima/ima.h void ima_policy_stop(struct seq_file *m, void *v); v 244 security/integrity/ima/ima.h int ima_policy_show(struct seq_file *m, void *v); v 95 security/integrity/ima/ima_fs.c static void *ima_measurements_next(struct seq_file *m, void *v, loff_t *pos) v 97 security/integrity/ima/ima_fs.c struct ima_queue_entry *qe = v; v 110 security/integrity/ima/ima_fs.c static void ima_measurements_stop(struct seq_file *m, void *v) v 128 security/integrity/ima/ima_fs.c int ima_measurements_show(struct seq_file *m, void *v) v 131 security/integrity/ima/ima_fs.c struct ima_queue_entry *qe = v; v 218 security/integrity/ima/ima_fs.c static int ima_ascii_measurements_show(struct seq_file *m, void *v) v 221 security/integrity/ima/ima_fs.c struct ima_queue_entry *qe = v; v 1344 security/integrity/ima/ima_policy.c void *ima_policy_next(struct seq_file *m, void *v, loff_t *pos) v 1346 security/integrity/ima/ima_policy.c struct ima_rule_entry *entry = v; v 1356 security/integrity/ima/ima_policy.c void ima_policy_stop(struct seq_file *m, void *v) v 1374 security/integrity/ima/ima_policy.c int ima_policy_show(struct seq_file *m, void *v) v 1376 security/integrity/ima/ima_policy.c struct ima_rule_entry *entry = v; v 17 security/keys/proc.c static void *proc_keys_next(struct seq_file *p, void *v, loff_t *_pos); v 18 security/keys/proc.c static void proc_keys_stop(struct seq_file *p, void *v); v 19 security/keys/proc.c static int proc_keys_show(struct seq_file *m, void *v); v 29 security/keys/proc.c static void *proc_key_users_next(struct seq_file *p, void *v, loff_t *_pos); v 30 security/keys/proc.c static void proc_key_users_stop(struct seq_file *p, void *v); v 31 security/keys/proc.c static int proc_key_users_show(struct seq_file *m, void *v); v 135 security/keys/proc.c static void *proc_keys_next(struct seq_file *p, void *v, loff_t *_pos) v 139 security/keys/proc.c n = key_serial_next(p, v); v 147 security/keys/proc.c static void proc_keys_stop(struct seq_file *p, void *v) v 153 security/keys/proc.c static int proc_keys_show(struct seq_file *m, void *v) v 155 security/keys/proc.c struct rb_node *_p = v; v 291 security/keys/proc.c static void *proc_key_users_next(struct seq_file *p, void *v, loff_t *_pos) v 294 security/keys/proc.c return key_user_next(seq_user_ns(p), (struct rb_node *)v); v 297 security/keys/proc.c static void proc_key_users_stop(struct seq_file *p, void *v) v 303 security/keys/proc.c static int proc_key_users_show(struct seq_file *m, void *v) v 305 security/keys/proc.c struct rb_node *_p = v; v 1524 security/selinux/selinuxfs.c static void *sel_avc_stats_seq_next(struct seq_file *seq, void *v, loff_t *pos) v 1529 security/selinux/selinuxfs.c static int sel_avc_stats_seq_show(struct seq_file *seq, void *v) v 1531 security/selinux/selinuxfs.c struct avc_cache_stats *st = v; v 1533 security/selinux/selinuxfs.c if (v == SEQ_START_TOKEN) { v 1547 security/selinux/selinuxfs.c static void sel_avc_stats_seq_stop(struct seq_file *seq, void *v) v 44 security/selinux/ss/avtab.c u32 v = input; \ v 45 security/selinux/ss/avtab.c v *= c1; \ v 46 security/selinux/ss/avtab.c v = (v << r1) | (v >> (32 - r1)); \ v 47 security/selinux/ss/avtab.c v *= c2; \ v 48 security/selinux/ss/avtab.c hash ^= v; \ v 421 security/selinux/ss/policydb.c int v; v 423 security/selinux/ss/policydb.c v = ft1->stype - ft2->stype; v 424 security/selinux/ss/policydb.c if (v) v 425 security/selinux/ss/policydb.c return v; v 427 security/selinux/ss/policydb.c v = ft1->ttype - ft2->ttype; v 428 security/selinux/ss/policydb.c if (v) v 429 security/selinux/ss/policydb.c return v; v 431 security/selinux/ss/policydb.c v = ft1->tclass - ft2->tclass; v 432 security/selinux/ss/policydb.c if (v) v 433 security/selinux/ss/policydb.c return v; v 450 security/selinux/ss/policydb.c int v; v 452 security/selinux/ss/policydb.c v = key1->source_type - key2->source_type; v 453 security/selinux/ss/policydb.c if (v) v 454 security/selinux/ss/policydb.c return v; v 456 security/selinux/ss/policydb.c v = key1->target_type - key2->target_type; v 457 security/selinux/ss/policydb.c if (v) v 458 security/selinux/ss/policydb.c return v; v 460 security/selinux/ss/policydb.c v = key1->target_class - key2->target_class; v 462 security/selinux/ss/policydb.c return v; v 2028 security/selinux/ss/policydb.c newc->v.sclass = le32_to_cpu(buf[0]); v 2037 security/selinux/ss/policydb.c (!c->v.sclass || !newc->v.sclass || v 2038 security/selinux/ss/policydb.c newc->v.sclass == c->v.sclass)) { v 2152 security/selinux/ss/policydb.c c->v.behavior = le32_to_cpu(buf[0]); v 2154 security/selinux/ss/policydb.c if (c->v.behavior == SECURITY_FS_USE_MNTPOINT) v 2156 security/selinux/ss/policydb.c if (c->v.behavior > SECURITY_FS_USE_MAX) v 3142 security/selinux/ss/policydb.c buf[0] = cpu_to_le32(c->v.behavior); v 3245 security/selinux/ss/policydb.c buf[0] = cpu_to_le32(c->v.sclass); v 199 security/selinux/ss/policydb.h } v; v 2700 security/selinux/ss/services.c if ((!c->v.sclass || sclass == c->v.sclass) && v 2771 security/selinux/ss/services.c sbsec->behavior = c->v.behavior; v 228 security/selinux/ss/sidtab.c u32 v = READ_ONCE(s->rcache[i]); v 230 security/selinux/ss/sidtab.c if (v >= SIDTAB_MAX) v 233 security/selinux/ss/sidtab.c if (context_cmp(sidtab_do_lookup(s, v, 0), context)) { v 234 security/selinux/ss/sidtab.c sidtab_rcache_update(s, v, i); v 235 security/selinux/ss/sidtab.c *index = v; v 548 security/smack/smackfs.c static void *smk_seq_next(struct seq_file *s, void *v, loff_t *pos, v 551 security/smack/smackfs.c struct list_head *list = v; v 559 security/smack/smackfs.c static void smk_seq_stop(struct seq_file *s, void *v) v 612 security/smack/smackfs.c static void *load2_seq_next(struct seq_file *s, void *v, loff_t *pos) v 614 security/smack/smackfs.c return smk_seq_next(s, v, pos, &smack_known_list); v 617 security/smack/smackfs.c static int load_seq_show(struct seq_file *s, void *v) v 619 security/smack/smackfs.c struct list_head *list = v; v 758 security/smack/smackfs.c static void *cipso_seq_next(struct seq_file *s, void *v, loff_t *pos) v 760 security/smack/smackfs.c return smk_seq_next(s, v, pos, &smack_known_list); v 767 security/smack/smackfs.c static int cipso_seq_show(struct seq_file *s, void *v) v 769 security/smack/smackfs.c struct list_head *list = v; v 961 security/smack/smackfs.c static int cipso2_seq_show(struct seq_file *s, void *v) v 963 security/smack/smackfs.c struct list_head *list = v; v 1036 security/smack/smackfs.c static void *net4addr_seq_next(struct seq_file *s, void *v, loff_t *pos) v 1038 security/smack/smackfs.c return smk_seq_next(s, v, pos, &smk_net4addr_list); v 1044 security/smack/smackfs.c static int net4addr_seq_show(struct seq_file *s, void *v) v 1046 security/smack/smackfs.c struct list_head *list = v; v 1302 security/smack/smackfs.c static void *net6addr_seq_next(struct seq_file *s, void *v, loff_t *pos) v 1304 security/smack/smackfs.c return smk_seq_next(s, v, pos, &smk_net6addr_list); v 1310 security/smack/smackfs.c static int net6addr_seq_show(struct seq_file *s, void *v) v 1312 security/smack/smackfs.c struct list_head *list = v; v 1866 security/smack/smackfs.c static void *onlycap_seq_next(struct seq_file *s, void *v, loff_t *pos) v 1868 security/smack/smackfs.c return smk_seq_next(s, v, pos, &smack_onlycap_list); v 1871 security/smack/smackfs.c static int onlycap_seq_show(struct seq_file *s, void *v) v 1873 security/smack/smackfs.c struct list_head *list = v; v 2198 security/smack/smackfs.c static void *load_self_seq_next(struct seq_file *s, void *v, loff_t *pos) v 2202 security/smack/smackfs.c return smk_seq_next(s, v, pos, &tsp->smk_rules); v 2205 security/smack/smackfs.c static int load_self_seq_show(struct seq_file *s, void *v) v 2207 security/smack/smackfs.c struct list_head *list = v; v 2334 security/smack/smackfs.c static int load2_seq_show(struct seq_file *s, void *v) v 2336 security/smack/smackfs.c struct list_head *list = v; v 2406 security/smack/smackfs.c static void *load_self2_seq_next(struct seq_file *s, void *v, loff_t *pos) v 2410 security/smack/smackfs.c return smk_seq_next(s, v, pos, &tsp->smk_rules); v 2413 security/smack/smackfs.c static int load_self2_seq_show(struct seq_file *s, void *v) v 2415 security/smack/smackfs.c struct list_head *list = v; v 2673 security/smack/smackfs.c static void *relabel_self_seq_next(struct seq_file *s, void *v, loff_t *pos) v 2677 security/smack/smackfs.c return smk_seq_next(s, v, pos, &tsp->smk_relabel); v 2680 security/smack/smackfs.c static int relabel_self_seq_show(struct seq_file *s, void *v) v 2682 security/smack/smackfs.c struct list_head *list = v; v 275 security/tomoyo/util.c unsigned long v; v 284 security/tomoyo/util.c type = tomoyo_parse_ulong(&v, &data); v 287 security/tomoyo/util.c ptr->values[0] = v; v 290 security/tomoyo/util.c ptr->values[1] = v; v 296 security/tomoyo/util.c type = tomoyo_parse_ulong(&v, &data); v 297 security/tomoyo/util.c if (type == TOMOYO_VALUE_TYPE_INVALID || *data || ptr->values[0] > v) v 299 security/tomoyo/util.c ptr->values[1] = v; v 67 sound/aoa/codecs/onyx.c s32 v; v 73 sound/aoa/codecs/onyx.c v = i2c_smbus_read_byte_data(onyx->i2c, reg); v 74 sound/aoa/codecs/onyx.c if (v < 0) { v 78 sound/aoa/codecs/onyx.c *value = (u8)v; v 214 sound/aoa/codecs/onyx.c u8 v, n; v 220 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_ADC_CONTROL, &v); v 221 sound/aoa/codecs/onyx.c n = v; v 228 sound/aoa/codecs/onyx.c return n != v; v 252 sound/aoa/codecs/onyx.c s8 v; v 255 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_ADC_CONTROL, &v); v 258 sound/aoa/codecs/onyx.c ucontrol->value.enumerated.item[0] = !!(v&ONYX_ADC_INPUT_MIC); v 265 sound/aoa/codecs/onyx.c s8 v; v 268 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_ADC_CONTROL, &v); v 269 sound/aoa/codecs/onyx.c v &= ~ONYX_ADC_INPUT_MIC; v 271 sound/aoa/codecs/onyx.c v |= ONYX_ADC_INPUT_MIC; v 272 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_ADC_CONTROL, v); v 328 sound/aoa/codecs/onyx.c u8 v = 0, c = 0; v 335 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DAC_CONTROL, &v); v 336 sound/aoa/codecs/onyx.c c = v; v 347 sound/aoa/codecs/onyx.c return !err ? (v != c) : err; v 388 sound/aoa/codecs/onyx.c u8 v = 0, c = 0; v 402 sound/aoa/codecs/onyx.c onyx_read_register(onyx, address, &v); v 403 sound/aoa/codecs/onyx.c c = v; v 412 sound/aoa/codecs/onyx.c return !err ? (v != c) : err; v 490 sound/aoa/codecs/onyx.c u8 v; v 493 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO1, &v); v 494 sound/aoa/codecs/onyx.c ucontrol->value.iec958.status[0] = v & 0x3e; v 496 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO2, &v); v 497 sound/aoa/codecs/onyx.c ucontrol->value.iec958.status[1] = v; v 499 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO3, &v); v 500 sound/aoa/codecs/onyx.c ucontrol->value.iec958.status[3] = v & 0x3f; v 502 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v); v 503 sound/aoa/codecs/onyx.c ucontrol->value.iec958.status[4] = v & 0x0f; v 513 sound/aoa/codecs/onyx.c u8 v; v 516 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO1, &v); v 517 sound/aoa/codecs/onyx.c v = (v & ~0x3e) | (ucontrol->value.iec958.status[0] & 0x3e); v 518 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_DIG_INFO1, v); v 520 sound/aoa/codecs/onyx.c v = ucontrol->value.iec958.status[1]; v 521 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_DIG_INFO2, v); v 523 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO3, &v); v 524 sound/aoa/codecs/onyx.c v = (v & ~0x3f) | (ucontrol->value.iec958.status[3] & 0x3f); v 525 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_DIG_INFO3, v); v 527 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v); v 528 sound/aoa/codecs/onyx.c v = (v & ~0x0f) | (ucontrol->value.iec958.status[4] & 0x0f); v 529 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_DIG_INFO4, v); v 671 sound/aoa/codecs/onyx.c u8 v; v 676 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v); v 677 sound/aoa/codecs/onyx.c spdif_enabled = !!(v & ONYX_SPDIF_ENABLE); v 678 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DAC_CONTROL, &v); v 680 sound/aoa/codecs/onyx.c (v & (ONYX_MUTE_RIGHT|ONYX_MUTE_LEFT)) v 696 sound/aoa/codecs/onyx.c u8 v; v 705 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DAC_CONTROL, &v); v 708 sound/aoa/codecs/onyx.c v | ONYX_MUTE_RIGHT | ONYX_MUTE_LEFT)) v 727 sound/aoa/codecs/onyx.c onyx_read_register(cii->codec_data, ONYX_REG_DIG_INFO4, &v); v 730 sound/aoa/codecs/onyx.c v & ~ONYX_SPDIF_ENABLE)) v 796 sound/aoa/codecs/onyx.c u8 v; v 800 sound/aoa/codecs/onyx.c if (onyx_read_register(onyx, ONYX_REG_CONTROL, &v)) v 802 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_CONTROL, v | ONYX_ADPSV | ONYX_DAPSV); v 814 sound/aoa/codecs/onyx.c u8 v; v 828 sound/aoa/codecs/onyx.c if (onyx_read_register(onyx, ONYX_REG_CONTROL, &v)) v 830 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_CONTROL, v & ~(ONYX_ADPSV | ONYX_DAPSV)); v 865 sound/aoa/codecs/onyx.c u8 v; v 967 sound/aoa/codecs/onyx.c onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v); v 968 sound/aoa/codecs/onyx.c v |= ONYX_SPDIF_ENABLE; v 969 sound/aoa/codecs/onyx.c onyx_write_register(onyx, ONYX_REG_DIG_INFO4, v); v 127 sound/aoa/core/gpio-feature.c #define SWITCH_GPIO(name, v, on) \ v 128 sound/aoa/core/gpio-feature.c (((v)&~1) | ((on)? \ v 135 sound/aoa/core/gpio-feature.c int v; \ v 142 sound/aoa/core/gpio-feature.c v = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, \ v 147 sound/aoa/core/gpio-feature.c v = SWITCH_GPIO(name##_mute, v, !on); \ v 150 sound/aoa/core/gpio-feature.c name##_mute_gpio, v); \ v 168 sound/aoa/core/gpio-feature.c int v; v 174 sound/aoa/core/gpio-feature.c v = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, v 176 sound/aoa/core/gpio-feature.c v = SWITCH_GPIO(hw_reset, v, on); v 178 sound/aoa/core/gpio-feature.c hw_reset_gpio, v); v 223 sound/aoa/core/gpio-feature.c int v; v 227 sound/aoa/core/gpio-feature.c v = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, gpio, 0); v 228 sound/aoa/core/gpio-feature.c v |= 0x80; /* enable dual edge */ v 229 sound/aoa/core/gpio-feature.c pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, gpio, v); v 16 sound/aoa/core/gpio-pmf.c struct pmf_args args = { .count = 1, .u[0].v = !on }; \ v 39 sound/aoa/core/gpio-pmf.c struct pmf_args args = { .count = 1, .u[0].v = !!on }; v 732 sound/aoa/fabrics/layout.c int v; v 736 sound/aoa/fabrics/layout.c v = ldev->gpio.methods->get_detect(&ldev->gpio, v 740 sound/aoa/fabrics/layout.c v = ldev->gpio.methods->get_detect(&ldev->gpio, v 746 sound/aoa/fabrics/layout.c ucontrol->value.integer.value[0] = v; v 854 sound/aoa/fabrics/layout.c int v, update; v 860 sound/aoa/fabrics/layout.c v = ldev->gpio.methods->get_detect(&ldev->gpio, AOA_NOTIFY_HEADPHONE); v 864 sound/aoa/fabrics/layout.c ldev->gpio.methods->set_speakers(&ldev->gpio, !v); v 865 sound/aoa/fabrics/layout.c ldev->gpio.methods->set_headphone(&ldev->gpio, v); v 869 sound/aoa/fabrics/layout.c v = ldev->gpio.methods->get_detect(&ldev->gpio, AOA_NOTIFY_LINE_OUT); v 873 sound/aoa/fabrics/layout.c ldev->gpio.methods->set_speakers(&ldev->gpio, !v); v 875 sound/aoa/fabrics/layout.c ldev->gpio.methods->set_lineout(&ldev->gpio, v); v 81 sound/aoa/soundbus/i2sbus/pcm.c struct transfer_info v; v 105 sound/aoa/soundbus/i2sbus/pcm.c v = *ti; v 107 sound/aoa/soundbus/i2sbus/pcm.c && cii->codec->usable(cii, ti, &v)) { v 109 sound/aoa/soundbus/i2sbus/pcm.c formats &= v.formats; v 110 sound/aoa/soundbus/i2sbus/pcm.c rates &= v.rates; v 112 sound/aoa/soundbus/i2sbus/pcm.c formats = v.formats; v 113 sound/aoa/soundbus/i2sbus/pcm.c rates = v.rates; v 39 sound/arm/aaci.c u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num); v 44 sound/arm/aaci.c v = readl(aaci->base + AACI_SLFR); v 45 sound/arm/aaci.c if (v & SLFR_2RXV) v 47 sound/arm/aaci.c if (v & SLFR_1RXV) v 71 sound/arm/aaci.c u32 v; v 94 sound/arm/aaci.c v = readl(aaci->base + AACI_SLFR); v 95 sound/arm/aaci.c } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout); v 97 sound/arm/aaci.c if (v & (SLFR_1TXB|SLFR_2TXB)) v 111 sound/arm/aaci.c u32 v; v 132 sound/arm/aaci.c v = readl(aaci->base + AACI_SLFR); v 133 sound/arm/aaci.c } while ((v & SLFR_1TXB) && --timeout); v 135 sound/arm/aaci.c if (v & SLFR_1TXB) { v 137 sound/arm/aaci.c v = ~0; v 149 sound/arm/aaci.c v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); v 150 sound/arm/aaci.c } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout); v 152 sound/arm/aaci.c if (v != (SLFR_1RXV|SLFR_2RXV)) { v 154 sound/arm/aaci.c v = ~0; v 159 sound/arm/aaci.c v = readl(aaci->base + AACI_SL1RX) >> 12; v 160 sound/arm/aaci.c if (v == reg) { v 161 sound/arm/aaci.c v = readl(aaci->base + AACI_SL2RX) >> 4; v 170 sound/arm/aaci.c v, reg); v 171 sound/arm/aaci.c v = ~0; v 176 sound/arm/aaci.c return v; v 96 sound/core/oss/io.c struct snd_pcm_plugin_channel *v; v 97 sound/core/oss/io.c err = snd_pcm_plugin_client_channels(plugin, frames, &v); v 100 sound/core/oss/io.c *channels = v; v 102 sound/core/oss/io.c for (channel = 0; channel < plugin->src_format.channels; ++channel, ++v) v 103 sound/core/oss/io.c v->wanted = 1; v 381 sound/core/oss/pcm_oss.c int v; v 440 sound/core/oss/pcm_oss.c v = snd_pcm_hw_param_last(pcm, params, var, dir); v 442 sound/core/oss/pcm_oss.c v = snd_pcm_hw_param_first(pcm, params, var, dir); v 443 sound/core/oss/pcm_oss.c return v; v 583 sound/core/oss/pcm_plugin.c struct snd_pcm_plugin_channel *v; v 597 sound/core/oss/pcm_plugin.c v = plugin->buf_channels; v 598 sound/core/oss/pcm_plugin.c *channels = v; v 605 sound/core/oss/pcm_plugin.c for (channel = 0; channel < nchannels; channel++, v++) { v 606 sound/core/oss/pcm_plugin.c v->frames = count; v 607 sound/core/oss/pcm_plugin.c v->enabled = 1; v 608 sound/core/oss/pcm_plugin.c v->wanted = (stream == SNDRV_PCM_STREAM_CAPTURE); v 609 sound/core/oss/pcm_plugin.c v->area.addr = buf; v 610 sound/core/oss/pcm_plugin.c v->area.first = channel * width; v 611 sound/core/oss/pcm_plugin.c v->area.step = nchannels * width; v 164 sound/core/pcm.c #define FORMAT(v) [SNDRV_PCM_FORMAT_##v] = #v v 230 sound/core/pcm.c #define STATE(v) [SNDRV_PCM_STATE_##v] = #v v 231 sound/core/pcm.c #define STREAM(v) [SNDRV_PCM_STREAM_##v] = #v v 232 sound/core/pcm.c #define READY(v) [SNDRV_PCM_READY_##v] = #v v 233 sound/core/pcm.c #define XRUN(v) [SNDRV_PCM_XRUN_##v] = #v v 234 sound/core/pcm.c #define SILENCE(v) [SNDRV_PCM_SILENCE_##v] = #v v 235 sound/core/pcm.c #define TSTAMP(v) [SNDRV_PCM_TSTAMP_##v] = #v v 236 sound/core/pcm.c #define ACCESS(v) [SNDRV_PCM_ACCESS_##v] = #v v 237 sound/core/pcm.c #define START(v) [SNDRV_PCM_START_##v] = #v v 238 sound/core/pcm.c #define SUBFORMAT(v) [SNDRV_PCM_SUBFORMAT_##v] = #v v 570 sound/core/pcm_lib.c int snd_interval_refine(struct snd_interval *i, const struct snd_interval *v) v 575 sound/core/pcm_lib.c if (i->min < v->min) { v 576 sound/core/pcm_lib.c i->min = v->min; v 577 sound/core/pcm_lib.c i->openmin = v->openmin; v 579 sound/core/pcm_lib.c } else if (i->min == v->min && !i->openmin && v->openmin) { v 583 sound/core/pcm_lib.c if (i->max > v->max) { v 584 sound/core/pcm_lib.c i->max = v->max; v 585 sound/core/pcm_lib.c i->openmax = v->openmax; v 587 sound/core/pcm_lib.c } else if (i->max == v->max && !i->openmax && v->openmax) { v 591 sound/core/pcm_lib.c if (!i->integer && v->integer) { v 595 sound/core/pcm_native.c const int *v; v 600 sound/core/pcm_native.c for (v = vars; *v != -1; v++) { v 603 sound/core/pcm_native.c if (hw_is_mask(*v)) v 604 sound/core/pcm_native.c old_mask = *hw_param_mask(params, *v); v 607 sound/core/pcm_native.c if (hw_is_interval(*v)) v 608 sound/core/pcm_native.c old_interval = *hw_param_interval(params, *v); v 610 sound/core/pcm_native.c if (*v != SNDRV_PCM_HW_PARAM_BUFFER_SIZE) v 611 sound/core/pcm_native.c changed = snd_pcm_hw_param_first(pcm, params, *v, NULL); v 613 sound/core/pcm_native.c changed = snd_pcm_hw_param_last(pcm, params, *v, NULL); v 620 sound/core/pcm_native.c if (hw_is_mask(*v)) { v 621 sound/core/pcm_native.c trace_hw_mask_param(pcm, *v, 0, &old_mask, v 622 sound/core/pcm_native.c hw_param_mask(params, *v)); v 624 sound/core/pcm_native.c if (hw_is_interval(*v)) { v 625 sound/core/pcm_native.c trace_hw_interval_param(pcm, *v, 0, &old_interval, v 626 sound/core/pcm_native.c hw_param_interval(params, *v)); v 177 sound/core/seq/oss/seq_oss_event.c if (q->v.chn >= 32) v 179 sound/core/seq/oss/seq_oss_event.c switch (q->v.cmd) { v 181 sound/core/seq/oss/seq_oss_event.c return note_on_event(dp, q->v.dev, q->v.chn, q->v.note, q->v.parm, ev); v 184 sound/core/seq/oss/seq_oss_event.c return note_off_event(dp, q->v.dev, q->v.chn, q->v.note, q->v.parm, ev); v 187 sound/core/seq/oss/seq_oss_event.c return set_note_event(dp, q->v.dev, SNDRV_SEQ_EVENT_KEYPRESS, v 188 sound/core/seq/oss/seq_oss_event.c q->v.chn, q->v.note, q->v.parm, ev); v 83 sound/core/seq/oss/seq_oss_event.h struct evrec_voice v; v 542 sound/core/seq/oss/seq_oss_midi.c ossev.v.cmd = MIDI_NOTEON; break; v 544 sound/core/seq/oss/seq_oss_midi.c ossev.v.cmd = MIDI_NOTEOFF; break; v 546 sound/core/seq/oss/seq_oss_midi.c ossev.v.cmd = MIDI_KEY_PRESSURE; break; v 559 sound/core/seq/oss/seq_oss_midi.c ossev.v.dev = dev; v 565 sound/core/seq/oss/seq_oss_midi.c ossev.v.code = EV_CHN_VOICE; v 566 sound/core/seq/oss/seq_oss_midi.c ossev.v.note = ev->data.note.note; v 567 sound/core/seq/oss/seq_oss_midi.c ossev.v.parm = ev->data.note.velocity; v 568 sound/core/seq/oss/seq_oss_midi.c ossev.v.chn = ev->data.note.channel; v 321 sound/drivers/ml403-ac97cr.c #define CR_CODEC_DATAREAD(v) ((v) & 0xFFFF) v 324 sound/drivers/ml403-ac97cr.c #define CR_CODEC_DATAWRITE(v) ((v) & 0xFFFF) v 69 sound/firewire/oxfw/oxfw.c const char *d, *v, *m; v 96 sound/firewire/oxfw/oxfw.c v = info->vendor_name; v 100 sound/firewire/oxfw/oxfw.c v = vendor; v 110 sound/firewire/oxfw/oxfw.c v, m, firmware >> 20, firmware & 0xffff, v 227 sound/hda/hdac_bus.c unsigned int v; v 229 sound/hda/hdac_bus.c v = readl(aligned_addr); v 230 sound/hda/hdac_bus.c return (v >> shift) & mask; v 240 sound/hda/hdac_bus.c unsigned int v; v 242 sound/hda/hdac_bus.c v = readl(aligned_addr); v 243 sound/hda/hdac_bus.c v &= ~(mask << shift); v 244 sound/hda/hdac_bus.c v |= val << shift; v 245 sound/hda/hdac_bus.c writel(v, aligned_addr); v 70 sound/hda/hdac_regmap.c const unsigned int *v; v 73 sound/hda/hdac_regmap.c snd_array_for_each(&codec->vendor_verbs, i, v) { v 74 sound/hda/hdac_regmap.c if (verb == *v) v 151 sound/isa/sb/emu8000_patch.c if (sp->v.size == 0) v 155 sound/isa/sb/emu8000_patch.c if (sp->v.loopstart > sp->v.loopend) v 156 sound/isa/sb/emu8000_patch.c swap(sp->v.loopstart, sp->v.loopend); v 159 sound/isa/sb/emu8000_patch.c truesize = sp->v.size; v 160 sound/isa/sb/emu8000_patch.c if (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP|SNDRV_SFNT_SAMPLE_REVERSE_LOOP)) v 161 sound/isa/sb/emu8000_patch.c truesize += sp->v.loopend - sp->v.loopstart; v 162 sound/isa/sb/emu8000_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_NO_BLANK) v 172 sound/isa/sb/emu8000_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS) { v 173 sound/isa/sb/emu8000_patch.c if (!access_ok(data, sp->v.size)) v 176 sound/isa/sb/emu8000_patch.c if (!access_ok(data, sp->v.size * 2)) v 181 sound/isa/sb/emu8000_patch.c sp->v.end -= sp->v.start; v 182 sound/isa/sb/emu8000_patch.c sp->v.loopstart -= sp->v.start; v 183 sound/isa/sb/emu8000_patch.c sp->v.loopend -= sp->v.start; v 184 sound/isa/sb/emu8000_patch.c sp->v.start = 0; v 191 sound/isa/sb/emu8000_patch.c sp->v.truesize = truesize * 2; /* in bytes */ v 213 sound/isa/sb/emu8000_patch.c for (i = 0; i < sp->v.size; i++) { v 216 sound/isa/sb/emu8000_patch.c s = read_word(data, offset, sp->v.mode_flags); v 225 sound/isa/sb/emu8000_patch.c if (i == sp->v.loopend && v 226 sound/isa/sb/emu8000_patch.c (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP|SNDRV_SFNT_SAMPLE_REVERSE_LOOP))) v 228 sound/isa/sb/emu8000_patch.c int looplen = sp->v.loopend - sp->v.loopstart; v 233 sound/isa/sb/emu8000_patch.c s = read_word(data, offset - k, sp->v.mode_flags); v 236 sound/isa/sb/emu8000_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_BIDIR_LOOP) { v 237 sound/isa/sb/emu8000_patch.c sp->v.loopend += looplen; v 239 sound/isa/sb/emu8000_patch.c sp->v.loopstart += looplen; v 240 sound/isa/sb/emu8000_patch.c sp->v.loopend += looplen; v 242 sound/isa/sb/emu8000_patch.c sp->v.end += looplen; v 247 sound/isa/sb/emu8000_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_NO_BLANK) { v 251 sound/isa/sb/emu8000_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_SINGLESHOT) { v 252 sound/isa/sb/emu8000_patch.c sp->v.loopstart = sp->v.end + BLANK_LOOP_START; v 253 sound/isa/sb/emu8000_patch.c sp->v.loopend = sp->v.end + BLANK_LOOP_END; v 258 sound/isa/sb/emu8000_patch.c sp->v.start += dram_start; v 259 sound/isa/sb/emu8000_patch.c sp->v.end += dram_start; v 260 sound/isa/sb/emu8000_patch.c sp->v.loopstart += dram_start; v 261 sound/isa/sb/emu8000_patch.c sp->v.loopend += dram_start; v 32 sound/isa/sb/sb8_main.c #define SB8_DEN(v) ((SB8_CLOCK + (v) / 2) / (v)) v 33 sound/isa/sb/sb8_main.c #define SB8_RATE(v) (SB8_CLOCK / SB8_DEN(v)) v 873 sound/oss/dmasound/dmasound_atari.c #define TONE_VOXWARE_TO_DB(v) \ v 874 sound/oss/dmasound/dmasound_atari.c (((v) < 0) ? -12 : ((v) > 100) ? 12 : ((v) - 50) * 6 / 25) v 875 sound/oss/dmasound/dmasound_atari.c #define TONE_DB_TO_VOXWARE(v) (((v) * 25 + ((v) > 0 ? 5 : -5)) / 6 + 50) v 985 sound/oss/dmasound/dmasound_atari.c #define VOLUME_VOXWARE_TO_DB(v) \ v 986 sound/oss/dmasound/dmasound_atari.c (((v) < 0) ? -40 : ((v) > 100) ? 0 : ((v) * 2) / 5 - 40) v 987 sound/oss/dmasound/dmasound_atari.c #define VOLUME_DB_TO_VOXWARE(v) ((((v) + 40) * 5 + 1) / 2) v 1001 sound/oss/dmasound/dmasound_atari.c #define GAIN_VOXWARE_TO_DB(v) \ v 1002 sound/oss/dmasound/dmasound_atari.c (((v) < 0) ? -80 : ((v) > 100) ? 0 : ((v) * 4) / 5 - 80) v 1003 sound/oss/dmasound/dmasound_atari.c #define GAIN_DB_TO_VOXWARE(v) ((((v) + 80) * 5 + 1) / 4) v 1154 sound/oss/dmasound/dmasound_atari.c #define VOLUME_VOXWARE_TO_ATT(v) \ v 1155 sound/oss/dmasound/dmasound_atari.c ((v) < 0 ? 15 : (v) > 100 ? 0 : 15 - (v) * 3 / 20) v 1156 sound/oss/dmasound/dmasound_atari.c #define VOLUME_ATT_TO_VOXWARE(v) (100 - (v) * 20 / 3) v 1339 sound/oss/dmasound/dmasound_atari.c #define RECLEVEL_VOXWARE_TO_GAIN(v) \ v 1340 sound/oss/dmasound/dmasound_atari.c ((v) < 0 ? 0 : (v) > 100 ? 15 : (v) * 3 / 20) v 1341 sound/oss/dmasound/dmasound_atari.c #define RECLEVEL_GAIN_TO_VOXWARE(v) (((v) * 20 + 2) / 3) v 423 sound/oss/dmasound/dmasound_paula.c #define VOLUME_VOXWARE_TO_AMI(v) \ v 424 sound/oss/dmasound/dmasound_paula.c (((v) < 0) ? 0 : ((v) > 100) ? 64 : ((v) * 64)/100) v 425 sound/oss/dmasound/dmasound_paula.c #define VOLUME_AMI_TO_VOXWARE(v) ((v)*100/64) v 101 sound/parisc/harmony.c harmony_write(struct snd_harmony *h, unsigned r, unsigned long v) v 103 sound/parisc/harmony.c __raw_writel(v, h->iobase + r); v 777 sound/pci/ac97/ac97_codec.c int v; v 778 sound/pci/ac97/ac97_codec.c v = new & (IEC958_AES0_CON_EMPHASIS_5015|IEC958_AES0_CON_NOT_COPYRIGHT) ? 0 : AC97_CXR_COPYRGT; v 779 sound/pci/ac97/ac97_codec.c v |= new & IEC958_AES0_NONAUDIO ? AC97_CXR_SPDIF_AC3 : AC97_CXR_SPDIF_PCM; v 782 sound/pci/ac97/ac97_codec.c v); v 27 sound/pci/asihpi/hpi_version.h #define HPI_VER_MAJOR(v) ((int)(v >> 16)) v 29 sound/pci/asihpi/hpi_version.h #define HPI_VER_MINOR(v) ((int)((v >> 8) & 0xFF)) v 31 sound/pci/asihpi/hpi_version.h #define HPI_VER_RELEASE(v) ((int)(v & 0xFF)) v 232 sound/pci/au88x0/au88x0.h static int vortex_alsafmt_aspfmt(snd_pcm_format_t alsafmt, vortex_t *v); v 264 sound/pci/au88x0/au88x0.h static void vortex_Vort3D_enable(vortex_t * v); v 265 sound/pci/au88x0/au88x0.h static void vortex_Vort3D_disable(vortex_t * v); v 267 sound/pci/au88x0/au88x0.h static void vortex_Vort3D_InitializeSource(a3dsrc_t *a, int en, vortex_t *v); v 475 sound/pci/au88x0/au88x0_a3d.c static void a3dsrc_ZeroStateA3D(a3dsrc_t *a, vortex_t *v) v 480 sound/pci/au88x0/au88x0_a3d.c dev_err(v->card->dev, v 542 sound/pci/au88x0/au88x0_a3d.c static void vortex_A3dSourceHw_Initialize(vortex_t * v, int source, int slice) v 544 sound/pci/au88x0/au88x0_a3d.c a3dsrc_t *a3dsrc = &(v->a3d[source + (slice * 4)]); v 547 sound/pci/au88x0/au88x0_a3d.c a3dsrc->vortex = (void *)v; v 555 sound/pci/au88x0/au88x0_a3d.c static int Vort3DRend_Initialize(vortex_t * v, unsigned short mode) v 557 sound/pci/au88x0/au88x0_a3d.c v->xt_mode = mode; /* this_14 */ v 559 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_init(v); v 560 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_SetGainsAllChan(v); v 561 sound/pci/au88x0/au88x0_a3d.c switch (v->xt_mode) { v 563 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_ProgramXtalkNarrow(v); v 566 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_ProgramXtalkWide(v); v 570 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_ProgramPipe(v); v 573 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_ProgramDiamondXtalk(v); v 576 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_SetSampleRate(v, 0x11); v 577 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_Enable(v); v 586 sound/pci/au88x0/au88x0_a3d.c static void vortex_Vort3D_enable(vortex_t *v) v 590 sound/pci/au88x0/au88x0_a3d.c Vort3DRend_Initialize(v, XT_HEADPHONE); v 592 sound/pci/au88x0/au88x0_a3d.c vortex_A3dSourceHw_Initialize(v, i % 4, i >> 2); v 593 sound/pci/au88x0/au88x0_a3d.c a3dsrc_ZeroStateA3D(&v->a3d[0], v); v 596 sound/pci/au88x0/au88x0_a3d.c vortex_a3d_register_controls(v); v 599 sound/pci/au88x0/au88x0_a3d.c static void vortex_Vort3D_disable(vortex_t * v) v 601 sound/pci/au88x0/au88x0_a3d.c vortex_XtalkHw_Disable(v); v 602 sound/pci/au88x0/au88x0_a3d.c vortex_a3d_unregister_controls(v); v 606 sound/pci/au88x0/au88x0_a3d.c static void vortex_Vort3D_connect(vortex_t * v, int en) v 617 sound/pci/au88x0/au88x0_a3d.c v->mixxtlk[0] = v 618 sound/pci/au88x0/au88x0_a3d.c vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN); v 619 sound/pci/au88x0/au88x0_a3d.c if (v->mixxtlk[0] < 0) { v 620 sound/pci/au88x0/au88x0_a3d.c dev_warn(v->card->dev, v 624 sound/pci/au88x0/au88x0_a3d.c v->mixxtlk[1] = v 625 sound/pci/au88x0/au88x0_a3d.c vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN); v 626 sound/pci/au88x0/au88x0_a3d.c if (v->mixxtlk[1] < 0) { v 627 sound/pci/au88x0/au88x0_a3d.c dev_warn(v->card->dev, v 636 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_A3DOUT(i * 2), ADB_XTALKIN(i)); v 637 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_A3DOUT(i * 2) + 1, ADB_XTALKIN(5 + i)); v 640 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(0), ADB_EQIN(2)); v 641 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(1), ADB_EQIN(3)); v 644 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(0), ADB_MIXIN(v->mixxtlk[0])); v 645 sound/pci/au88x0/au88x0_a3d.c vortex_route(v, en, 0x11, ADB_XTALKOUT(1), ADB_MIXIN(v->mixxtlk[1])); v 646 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[0], v->mixplayb[0], 0); v 647 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[1], v->mixplayb[1], 0); v 648 sound/pci/au88x0/au88x0_a3d.c vortex_mix_setinputvolumebyte(v, v->mixplayb[0], v->mixxtlk[0], v 650 sound/pci/au88x0/au88x0_a3d.c vortex_mix_setinputvolumebyte(v, v->mixplayb[1], v->mixxtlk[1], v 652 sound/pci/au88x0/au88x0_a3d.c if (VORTEX_IS_QUAD(v)) { v 653 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[0], v 654 sound/pci/au88x0/au88x0_a3d.c v->mixplayb[2], 0); v 655 sound/pci/au88x0/au88x0_a3d.c vortex_connection_mixin_mix(v, en, v->mixxtlk[1], v 656 sound/pci/au88x0/au88x0_a3d.c v->mixplayb[3], 0); v 657 sound/pci/au88x0/au88x0_a3d.c vortex_mix_setinputvolumebyte(v, v->mixplayb[2], v 658 sound/pci/au88x0/au88x0_a3d.c v->mixxtlk[0], v 660 sound/pci/au88x0/au88x0_a3d.c vortex_mix_setinputvolumebyte(v, v->mixplayb[3], v 661 sound/pci/au88x0/au88x0_a3d.c v->mixxtlk[1], v 668 sound/pci/au88x0/au88x0_a3d.c static void vortex_Vort3D_InitializeSource(a3dsrc_t *a, int en, vortex_t *v) v 671 sound/pci/au88x0/au88x0_a3d.c dev_warn(v->card->dev, v 2767 sound/pci/au88x0/au88x0_core.c static int vortex_alsafmt_aspfmt(snd_pcm_format_t alsafmt, vortex_t *v) v 2795 sound/pci/au88x0/au88x0_core.c dev_err(v->card->dev, v 1978 sound/pci/cmipci.c unsigned char v; v 1981 sound/pci/cmipci.c v = inb(s->iobase + CM_REG_SB16_DATA); v 1982 sound/pci/cmipci.c return v; v 2766 sound/pci/cmipci.c int i, v; v 2772 sound/pci/cmipci.c v = inb(cm->iobase + i); v 2775 sound/pci/cmipci.c snd_iprintf(buffer, " %02x", v); v 71 sound/pci/cs5535audio/cs5535audio_olpc.c static int olpc_dc_get(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *v) v 73 sound/pci/cs5535audio/cs5535audio_olpc.c v->value.integer.value[0] = gpio_get_value(OLPC_GPIO_MIC_AC); v 77 sound/pci/cs5535audio/cs5535audio_olpc.c static int olpc_dc_put(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *v) v 81 sound/pci/cs5535audio/cs5535audio_olpc.c olpc_analog_input(cs5535au->ac97, v->value.integer.value[0]); v 95 sound/pci/cs5535audio/cs5535audio_olpc.c static int olpc_mic_get(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *v) v 102 sound/pci/cs5535audio/cs5535audio_olpc.c v->value.integer.value[0] = i ? 0 : 1; v 106 sound/pci/cs5535audio/cs5535audio_olpc.c static int olpc_mic_put(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *v) v 110 sound/pci/cs5535audio/cs5535audio_olpc.c olpc_mic_bias(cs5535au->ac97, v->value.integer.value[0]); v 39 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.size == 0) { v 41 sound/pci/emu10k1/emu10k1_patch.c "emu: rom font for sample %d\n", sp->v.sample); v 46 sound/pci/emu10k1/emu10k1_patch.c sp->v.end -= sp->v.start; v 47 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopstart -= sp->v.start; v 48 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopend -= sp->v.start; v 49 sound/pci/emu10k1/emu10k1_patch.c sp->v.start = 0; v 52 sound/pci/emu10k1/emu10k1_patch.c sampleend = sp->v.end; v 53 sound/pci/emu10k1/emu10k1_patch.c if (sampleend > sp->v.size) v 54 sound/pci/emu10k1/emu10k1_patch.c sampleend = sp->v.size; v 55 sound/pci/emu10k1/emu10k1_patch.c loopend = sp->v.loopend; v 60 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.loopstart >= sp->v.loopend) v 61 sound/pci/emu10k1/emu10k1_patch.c swap(sp->v.loopstart, sp->v.loopend); v 64 sound/pci/emu10k1/emu10k1_patch.c truesize = sp->v.size + BLANK_HEAD_SIZE; v 67 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP|SNDRV_SFNT_SAMPLE_REVERSE_LOOP)) v 68 sound/pci/emu10k1/emu10k1_patch.c loopsize = sp->v.loopend - sp->v.loopstart; v 71 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_NO_BLANK) v 76 sound/pci/emu10k1/emu10k1_patch.c if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) v 86 sound/pci/emu10k1/emu10k1_patch.c sp->v.truesize = blocksize; v 91 sound/pci/emu10k1/emu10k1_patch.c if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) v 100 sound/pci/emu10k1/emu10k1_patch.c if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) v 114 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.mode_flags & (SNDRV_SFNT_SAMPLE_BIDIR_LOOP|SNDRV_SFNT_SAMPLE_REVERSE_LOOP)) { v 116 sound/pci/emu10k1/emu10k1_patch.c if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) { v 134 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_BIDIR_LOOP) { v 135 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopend += loopsize; v 137 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopstart += loopsize; v 138 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopend += loopsize; v 141 sound/pci/emu10k1/emu10k1_patch.c sp->v.end += loopsize; v 146 sound/pci/emu10k1/emu10k1_patch.c size = sp->v.size - loopend; v 149 sound/pci/emu10k1/emu10k1_patch.c if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) v 162 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_NO_BLANK) { v 164 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_SINGLESHOT) { v 165 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopstart = sp->v.end + BLANK_LOOP_START; v 166 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopend = sp->v.end + BLANK_LOOP_END; v 171 sound/pci/emu10k1/emu10k1_patch.c if (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_UNSIGNED) { v 173 sound/pci/emu10k1/emu10k1_patch.c if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) { v 186 sound/pci/emu10k1/emu10k1_patch.c if (! (sp->v.mode_flags & SNDRV_SFNT_SAMPLE_8BITS)) v 188 sound/pci/emu10k1/emu10k1_patch.c sp->v.start += start_addr; v 189 sound/pci/emu10k1/emu10k1_patch.c sp->v.end += start_addr; v 190 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopstart += start_addr; v 191 sound/pci/emu10k1/emu10k1_patch.c sp->v.loopend += start_addr; v 2031 sound/pci/emu10k1/emumixer.c int v; v 2036 sound/pci/emu10k1/emumixer.c for (v = 0; v < 4; v++) v 2037 sound/pci/emu10k1/emumixer.c mix->send_routing[0][v] = v 2038 sound/pci/emu10k1/emumixer.c mix->send_routing[1][v] = v 2039 sound/pci/emu10k1/emumixer.c mix->send_routing[2][v] = v; v 2051 sound/pci/emu10k1/emumixer.c int v; v 2058 sound/pci/emu10k1/emumixer.c for (v = 0; v < 2; v++) v 2059 sound/pci/emu10k1/emumixer.c mix->send_routing[0][2+v] = 13+v; v 2061 sound/pci/emu10k1/emumixer.c for (v = 0; v < 4; v++) v 2062 sound/pci/emu10k1/emumixer.c mix->send_routing[0][4+v] = 60+v; v 298 sound/pci/es1938.c unsigned char v; v 300 sound/pci/es1938.c if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) { v 306 sound/pci/es1938.c "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v); v 315 sound/pci/es1938.c unsigned char v; v 317 sound/pci/es1938.c if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80) v 319 sound/pci/es1938.c dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v); v 724 sound/pci/es1968.c u16 v; v 726 sound/pci/es1968.c v = __apu_get_register(chip, channel, reg); v 728 sound/pci/es1968.c return v; v 777 sound/pci/hda/hda_auto_parser.c const struct hda_verb **v; v 778 sound/pci/hda/hda_auto_parser.c v = snd_array_new(&codec->verbs); v 779 sound/pci/hda/hda_auto_parser.c if (!v) v 781 sound/pci/hda/hda_auto_parser.c *v = list; v 792 sound/pci/hda/hda_auto_parser.c const struct hda_verb **v; v 795 sound/pci/hda/hda_auto_parser.c snd_array_for_each(&codec->verbs, i, v) v 796 sound/pci/hda/hda_auto_parser.c snd_hda_sequence_write(codec, *v); v 834 sound/pci/hda/hda_auto_parser.c if (action != HDA_FIXUP_ACT_PRE_PROBE || !fix->v.pins) v 838 sound/pci/hda/hda_auto_parser.c snd_hda_apply_pincfgs(codec, fix->v.pins); v 841 sound/pci/hda/hda_auto_parser.c if (action != HDA_FIXUP_ACT_PROBE || !fix->v.verbs) v 845 sound/pci/hda/hda_auto_parser.c snd_hda_add_verbs(codec, fix->v.verbs); v 848 sound/pci/hda/hda_auto_parser.c if (!fix->v.func) v 852 sound/pci/hda/hda_auto_parser.c fix->v.func(codec, fix, action); v 855 sound/pci/hda/hda_auto_parser.c if (action != HDA_FIXUP_ACT_PROBE || !fix->v.pins) v 859 sound/pci/hda/hda_auto_parser.c set_pin_targets(codec, fix->v.pins); v 3426 sound/pci/hda/hda_codec.c int ch, v; v 3439 sound/pci/hda/hda_codec.c v = snd_hda_codec_amp_read(codec, p->nid, ch, p->dir, v 3441 sound/pci/hda/hda_codec.c if (!(v & HDA_AMP_MUTE) && v > 0) { v 301 sound/pci/hda/hda_local.h } v; v 221 sound/pci/hda/hda_sysfs.c const struct hda_verb *v; v 224 sound/pci/hda/hda_sysfs.c snd_array_for_each(&codec->init_verbs, i, v) { v 227 sound/pci/hda/hda_sysfs.c v->nid, v->verb, v->param); v 235 sound/pci/hda/hda_sysfs.c struct hda_verb *v; v 243 sound/pci/hda/hda_sysfs.c v = snd_array_new(&codec->init_verbs); v 244 sound/pci/hda/hda_sysfs.c if (!v) { v 248 sound/pci/hda/hda_sysfs.c v->nid = nid; v 249 sound/pci/hda/hda_sysfs.c v->verb = verb; v 250 sound/pci/hda/hda_sysfs.c v->param = param; v 82 sound/pci/hda/hda_tegra.c u32 v; v 85 sound/pci/hda/hda_tegra.c v = readl(hda->regs + HDA_IPFS_CONFIG); v 86 sound/pci/hda/hda_tegra.c v |= HDA_IPFS_EN_FPCI; v 87 sound/pci/hda/hda_tegra.c writel(v, hda->regs + HDA_IPFS_CONFIG); v 90 sound/pci/hda/hda_tegra.c v = readl(hda->regs + HDA_CFG_CMD); v 91 sound/pci/hda/hda_tegra.c v &= ~HDA_DISABLE_INTR; v 92 sound/pci/hda/hda_tegra.c v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE | v 94 sound/pci/hda/hda_tegra.c writel(v, hda->regs + HDA_CFG_CMD); v 100 sound/pci/hda/hda_tegra.c v = readl(hda->regs + HDA_IPFS_INTR_MASK); v 101 sound/pci/hda/hda_tegra.c v |= HDA_IPFS_EN_INTR; v 102 sound/pci/hda/hda_tegra.c writel(v, hda->regs + HDA_IPFS_INTR_MASK); v 273 sound/pci/hda/patch_analog.c .v.func = ad_fixup_inv_jack_detect, v 277 sound/pci/hda/patch_analog.c .v.pins = (const struct hda_pintbl[]) { v 285 sound/pci/hda/patch_analog.c .v.pins = (const struct hda_pintbl[]) { v 295 sound/pci/hda/patch_analog.c .v.pins = (const struct hda_pintbl[]) { v 308 sound/pci/hda/patch_analog.c .v.pins = (const struct hda_pintbl[]) { v 321 sound/pci/hda/patch_analog.c .v.pins = (const struct hda_pintbl[]) { v 330 sound/pci/hda/patch_analog.c .v.func = ad1986a_fixup_eapd, v 334 sound/pci/hda/patch_analog.c .v.func = ad1986a_fixup_eapd_mix_in, v 338 sound/pci/hda/patch_analog.c .v.pins = (const struct hda_pintbl[]) { v 591 sound/pci/hda/patch_analog.c .v.func = ad1981_fixup_amp_override, v 595 sound/pci/hda/patch_analog.c .v.func = ad1981_fixup_hp_eapd, v 879 sound/pci/hda/patch_analog.c .v.pins = (const struct hda_pintbl[]) { v 1045 sound/pci/hda/patch_analog.c .v.func = ad1884_fixup_amp_override, v 1049 sound/pci/hda/patch_analog.c .v.func = ad1884_fixup_hp_eapd, v 1055 sound/pci/hda/patch_analog.c .v.verbs = ad1884_dmic_init_verbs, v 1059 sound/pci/hda/patch_analog.c .v.func = ad1884_fixup_thinkpad, v 1065 sound/pci/hda/patch_analog.c .v.verbs = ad1884_dmic_init_verbs, v 521 sound/pci/hda/patch_cirrus.c .v.pins = mbp53_pincfgs, v 527 sound/pci/hda/patch_cirrus.c .v.pins = mbp55_pincfgs, v 533 sound/pci/hda/patch_cirrus.c .v.pins = imac27_pincfgs, v 539 sound/pci/hda/patch_cirrus.c .v.func = cs420x_fixup_gpio_13, v 543 sound/pci/hda/patch_cirrus.c .v.func = cs420x_fixup_gpio_23, v 547 sound/pci/hda/patch_cirrus.c .v.pins = mbp101_pincfgs, v 553 sound/pci/hda/patch_cirrus.c .v.verbs = (const struct hda_verb[]) { v 564 sound/pci/hda/patch_cirrus.c .v.pins = mba42_pincfgs, v 729 sound/pci/hda/patch_cirrus.c .v.pins = mba6_pincfgs, v 735 sound/pci/hda/patch_cirrus.c .v.func = cs4208_fixup_spdif_switch, v 741 sound/pci/hda/patch_cirrus.c .v.func = cs4208_fixup_macmini, v 747 sound/pci/hda/patch_cirrus.c .v.func = cs4208_fixup_gpio0, v 751 sound/pci/hda/patch_cirrus.c .v.func = cs4208_fixup_mac, v 859 sound/pci/hda/patch_cirrus.c .v.pins = cdb4210_pincfgs, v 865 sound/pci/hda/patch_cirrus.c .v.func = cs421x_fixup_sense_b, v 869 sound/pci/hda/patch_cirrus.c .v.pins = stumpy_pincfgs, v 709 sound/pci/hda/patch_conexant.c .v.pins = cxt_pincfg_lenovo_x200, v 713 sound/pci/hda/patch_conexant.c .v.pins = cxt_pincfg_lenovo_tp410, v 721 sound/pci/hda/patch_conexant.c .v.pins = cxt_pincfg_lemote, v 725 sound/pci/hda/patch_conexant.c .v.pins = cxt_pincfg_lemote, v 729 sound/pci/hda/patch_conexant.c .v.pins = (const struct hda_pintbl[]) { v 738 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_stereo_dmic, v 742 sound/pci/hda/patch_conexant.c .v.func = cxt5066_increase_mic_boost, v 748 sound/pci/hda/patch_conexant.c .v.pins = (const struct hda_pintbl[]) { v 755 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_headphone_mic, v 759 sound/pci/hda/patch_conexant.c .v.verbs = (const struct hda_verb[]) { v 768 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_stereo_dmic, v 774 sound/pci/hda/patch_conexant.c .v.func = hda_fixup_thinkpad_acpi, v 778 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_olpc_xo, v 782 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_cap_mix_amp, v 786 sound/pci/hda/patch_conexant.c .v.pins = (const struct hda_pintbl[]) { v 795 sound/pci/hda/patch_conexant.c .v.pins = (const struct hda_pintbl[]) { v 804 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_cap_mix_amp_5047, v 808 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_mute_led_eapd, v 812 sound/pci/hda/patch_conexant.c .v.pins = (const struct hda_pintbl[]) { v 822 sound/pci/hda/patch_conexant.c .v.pins = (const struct hda_pintbl[]) { v 830 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_hp_gate_mic_jack, v 834 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_mute_led_gpio, v 838 sound/pci/hda/patch_conexant.c .v.func = cxt_fixup_headset_mic, v 842 sound/pci/hda/patch_conexant.c .v.pins = (const struct hda_pintbl[]) { v 1203 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio1, v 1207 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio2, v 1211 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 1221 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1231 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1239 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1249 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 1258 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 1269 sound/pci/hda/patch_realtek.c .v.func = alc880_fixup_vol_knob, v 1274 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1294 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1314 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1323 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1334 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1352 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1372 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1390 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1399 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1408 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1426 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1435 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1444 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1462 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1471 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1480 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1718 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1725 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1732 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 1740 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio1, v 1744 sound/pci/hda/patch_realtek.c .v.func = alc260_fixup_gpio1_toggle, v 1750 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 1760 sound/pci/hda/patch_realtek.c .v.func = alc260_fixup_gpio1_toggle, v 1766 sound/pci/hda/patch_realtek.c .v.func = alc260_fixup_kn1, v 1770 sound/pci/hda/patch_realtek.c .v.func = alc260_fixup_fsc_s7020, v 1774 sound/pci/hda/patch_realtek.c .v.func = alc260_fixup_fsc_s7020_jwse, v 1780 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2137 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2146 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2154 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2161 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_sku_ignore, v 2165 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2172 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2179 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2188 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2195 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2203 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2212 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2221 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2230 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio1, v 2234 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio2, v 2238 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio3, v 2242 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio1, v 2248 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_coef, v 2252 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2262 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2273 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2307 sound/pci/hda/patch_realtek.c .v.func = alc885_fixup_macpro_gpio, v 2311 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_dac_route, v 2315 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_mbp_vref, v 2321 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_imac91_vref, v 2327 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_mba11_vref, v 2333 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_mba21_vref, v 2339 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_mba11_vref, v 2345 sound/pci/hda/patch_realtek.c .v.func = alc889_fixup_mbp_vref, v 2351 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_inv_dmic, v 2355 sound/pci/hda/patch_realtek.c .v.func = alc882_fixup_no_primary_hp, v 2359 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2368 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_bass_chmap, v 2372 sound/pci/hda/patch_realtek.c .v.func = alc1220_fixup_gb_dual_codecs, v 2376 sound/pci/hda/patch_realtek.c .v.func = alc1220_fixup_clevo_p950, v 2380 sound/pci/hda/patch_realtek.c .v.func = alc1220_fixup_clevo_pb51ed, v 2384 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2619 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2628 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2637 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2644 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2651 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 2660 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2668 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2676 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_inv_dmic, v 2680 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_no_depop_delay, v 2820 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_inv_dmic, v 2824 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 2831 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6119 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6126 sound/pci/hda/patch_realtek.c .v.func = alc275_fixup_gpio4_off, v 6132 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6141 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_sku_ignore, v 6145 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6152 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6159 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hweq, v 6165 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6171 sound/pci/hda/patch_realtek.c .v.func = alc271_fixup_dmic, v 6175 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_pcm_44k, v 6181 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_stereo_dmic, v 6185 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_headset_mic, v 6189 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_quanta_mute, v 6193 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6203 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6210 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6217 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_pincfg_no_hp_to_lineout, v 6221 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_pincfg_U7x7_headset_mic, v 6225 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6235 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6245 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6255 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6265 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hp_mute_led, v 6269 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hp_mute_led_mic1, v 6273 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hp_mute_led_mic2, v 6277 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hp_mute_led_mic3, v 6283 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hp_gpio_led, v 6287 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hp_gpio_mic1_led, v 6291 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_hp_line1_mic1_led, v 6295 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_inv_dmic, v 6299 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_no_shutup, v 6303 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6313 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_limit_int_mic_boost, v 6319 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_pincfg_no_hp_to_lineout, v 6325 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6335 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6346 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6355 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6365 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode, v 6371 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode_no_hp_mic, v 6375 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6384 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6393 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6411 sound/pci/hda/patch_realtek.c .v.func = alc298_fixup_huawei_mbx_stereo, v 6417 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_x101_headset_mic, v 6421 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6432 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6441 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6451 sound/pci/hda/patch_realtek.c .v.func = alc271_hp_gate_mic_jack, v 6457 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_limit_int_mic_boost, v 6463 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6476 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_limit_int_mic_boost, v 6482 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_limit_int_mic_boost, v 6488 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6499 sound/pci/hda/patch_realtek.c .v.func = alc269_fixup_limit_int_mic_boost, v 6505 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6514 sound/pci/hda/patch_realtek.c .v.func = alc283_fixup_chromebook, v 6518 sound/pci/hda/patch_realtek.c .v.func = alc283_fixup_sense_combo_jack, v 6524 sound/pci/hda/patch_realtek.c .v.func = alc282_fixup_asus_tx300, v 6528 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6538 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6547 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6556 sound/pci/hda/patch_realtek.c .v.func = alc290_fixup_mono_speakers, v 6560 sound/pci/hda/patch_realtek.c .v.func = alc290_fixup_mono_speakers, v 6566 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_thinkpad_acpi, v 6572 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_inv_dmic, v 6578 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6587 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6596 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6606 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6615 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode_alc255, v 6621 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode_alc255_no_hp_mic, v 6625 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6635 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_tpt440_dock, v 6641 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6647 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6654 sound/pci/hda/patch_realtek.c .v.func = snd_hda_gen_fixup_micmute_led, v 6658 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6674 sound/pci/hda/patch_realtek.c .v.func = alc280_fixup_hp_gpio4, v 6678 sound/pci/hda/patch_realtek.c .v.func = alc286_fixup_hp_gpio_led, v 6682 sound/pci/hda/patch_realtek.c .v.func = alc280_fixup_hp_gpio2_mic_hotkey, v 6686 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6697 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6707 sound/pci/hda/patch_realtek.c .v.func = alc280_fixup_hp_9480m, v 6711 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode_dell_alc288, v 6717 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6727 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6733 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_dell_xps13, v 6739 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6745 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6751 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_dell_xps13, v 6757 sound/pci/hda/patch_realtek.c .v.func = snd_hda_gen_fixup_micmute_led, v 6764 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6773 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6783 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6792 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6803 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6809 sound/pci/hda/patch_realtek.c .v.func = alc233_fixup_lenovo_line2_mic_hotkey, v 6813 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6819 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_mic_vref, v 6825 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6836 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 6842 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6849 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_tpt440_dock, v 6855 sound/pci/hda/patch_realtek.c .v.func = alc298_fixup_speaker_volume, v 6861 sound/pci/hda/patch_realtek.c .v.func = alc295_fixup_disable_dac3, v 6865 sound/pci/hda/patch_realtek.c .v.func = alc285_fixup_speaker2_to_dac1, v 6871 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6880 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_auto_mute_via_amp, v 6886 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6896 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode, v 6900 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6911 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio4, v 6915 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6924 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6935 sound/pci/hda/patch_realtek.c .v.func = alc233_alc662_fixup_lenovo_dual_codecs, v 6939 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6949 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6961 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 6973 sound/pci/hda/patch_realtek.c .v.func = alc225_fixup_s3_pop_noise, v 6979 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 6994 sound/pci/hda/patch_realtek.c .v.func = alc274_fixup_bind_dacs, v 7000 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7009 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_tpt470_dock, v 7015 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_tpt470_dacs, v 7021 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7030 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7039 sound/pci/hda/patch_realtek.c .v.func = alc295_fixup_hp_top_speakers, v 7045 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7054 sound/pci/hda/patch_realtek.c .v.func = alc285_fixup_invalidate_dacs, v 7060 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_auto_mute_via_amp, v 7064 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7073 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7083 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7092 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 7103 sound/pci/hda/patch_realtek.c .v.func = alc295_fixup_chromebook, v 7109 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_jack, v 7113 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7122 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 7133 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7143 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7153 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_auto_mute_via_amp, v 7159 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_mic_vref, v 7165 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 7175 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7184 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7193 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7200 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7210 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 7219 sound/pci/hda/patch_realtek.c .v.func = alc285_fixup_speaker2_to_dac1, v 7225 sound/pci/hda/patch_realtek.c .v.func = alc285_fixup_speaker2_to_dac1, v 7232 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_gpio4, v 7238 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_jack, v 7244 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 7255 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 7266 sound/pci/hda/patch_realtek.c .v.func = alc285_fixup_hp_gpio_led, v 7270 sound/pci/hda/patch_realtek.c .v.func = alc285_fixup_hp_mute_led, v 7274 sound/pci/hda/patch_realtek.c .v.func = alc236_fixup_hp_mute_led, v 7278 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 7285 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8461 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8469 sound/pci/hda/patch_realtek.c .v.func = alc861_fixup_asus_amp_vref_0f, v 8473 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_no_jack_detect, v 8477 sound/pci/hda/patch_realtek.c .v.func = alc861_fixup_asus_amp_vref_0f, v 8483 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 8592 sound/pci/hda/patch_realtek.c .v.func = alc660vd_fixup_asus_gpio1, v 8596 sound/pci/hda/patch_realtek.c .v.func = alc861vd_fixup_dallas, v 8905 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8912 sound/pci/hda/patch_realtek.c .v.func = alc662_fixup_led_gpio1, v 8916 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8925 sound/pci/hda/patch_realtek.c .v.func = alc272_fixup_mario, v 8929 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 8936 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_sku_ignore, v 8940 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8949 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8961 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8973 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8986 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 8999 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9012 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9025 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9039 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9053 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_no_jack_detect, v 9057 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9064 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_inv_dmic, v 9068 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_dell_xps13, v 9074 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_disable_aamix, v 9080 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_auto_mute_via_amp, v 9086 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9096 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode_alc662, v 9100 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9110 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode_alc668, v 9114 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_bass_chmap, v 9120 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9129 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9138 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_bass_chmap, v 9142 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_auto_mute_via_amp, v 9148 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode_alc668, v 9153 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9164 sound/pci/hda/patch_realtek.c .v.verbs = (const struct hda_verb[]) { v 9172 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9181 sound/pci/hda/patch_realtek.c .v.func = alc_fixup_headset_mode, v 9185 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9195 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9202 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9210 sound/pci/hda/patch_realtek.c .v.func = alc662_fixup_usi_headset_mic, v 9214 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9224 sound/pci/hda/patch_realtek.c .v.func = alc233_alc662_fixup_lenovo_dual_codecs, v 9228 sound/pci/hda/patch_realtek.c .v.func = alc662_fixup_aspire_ethos_hp, v 9232 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9243 sound/pci/hda/patch_realtek.c .v.func = alc671_fixup_hp_headset_mic2, v 9247 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 9256 sound/pci/hda/patch_realtek.c .v.pins = (const struct hda_pintbl[]) { v 1366 sound/pci/hda/patch_sigmatel.c .v.pins = ref9200_pin_configs, v 1370 sound/pci/hda/patch_sigmatel.c .v.pins = oqo9200_pin_configs, v 1376 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_d21_pin_configs, v 1380 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_d22_pin_configs, v 1384 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_d23_pin_configs, v 1388 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_m21_pin_configs, v 1392 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_m22_pin_configs, v 1396 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_m23_pin_configs, v 1400 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_m24_pin_configs, v 1404 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_m25_pin_configs, v 1408 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_m26_pin_configs, v 1412 sound/pci/hda/patch_sigmatel.c .v.pins = dell9200_m27_pin_configs, v 1416 sound/pci/hda/patch_sigmatel.c .v.pins = gateway9200_m4_pin_configs, v 1422 sound/pci/hda/patch_sigmatel.c .v.pins = gateway9200_m4_2_pin_configs, v 1428 sound/pci/hda/patch_sigmatel.c .v.func = stac9200_fixup_panasonic, v 1432 sound/pci/hda/patch_sigmatel.c .v.verbs = (const struct hda_verb[]) { v 1635 sound/pci/hda/patch_sigmatel.c .v.pins = ref925x_pin_configs, v 1639 sound/pci/hda/patch_sigmatel.c .v.pins = stac925xM1_pin_configs, v 1643 sound/pci/hda/patch_sigmatel.c .v.pins = stac925xM1_2_pin_configs, v 1647 sound/pci/hda/patch_sigmatel.c .v.pins = stac925xM2_pin_configs, v 1651 sound/pci/hda/patch_sigmatel.c .v.pins = stac925xM2_2_pin_configs, v 1655 sound/pci/hda/patch_sigmatel.c .v.pins = stac925xM3_pin_configs, v 1659 sound/pci/hda/patch_sigmatel.c .v.pins = stac925xM5_pin_configs, v 1663 sound/pci/hda/patch_sigmatel.c .v.pins = stac925xM6_pin_configs, v 1876 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_fixup_ref, v 1880 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_fixup_dell_m6_amic, v 1884 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_fixup_dell_m6_dmic, v 1888 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_fixup_dell_m6_both, v 1892 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_fixup_dell_eq, v 1896 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_fixup_alienware_m17x, v 1900 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_disable_automute, v 1904 sound/pci/hda/patch_sigmatel.c .v.pins = intel_dg45id_pin_configs, v 1908 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd73xx_fixup_no_jd, v 1912 sound/pci/hda/patch_sigmatel.c .v.pins = stac92hd89xx_hp_front_jack_pin_configs, v 1916 sound/pci/hda/patch_sigmatel.c .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs, v 1920 sound/pci/hda/patch_sigmatel.c .v.pins = (const struct hda_pintbl[]) { v 2627 sound/pci/hda/patch_sigmatel.c .v.pins = ref92hd83xxx_pin_configs, v 2631 sound/pci/hda/patch_sigmatel.c .v.pins = ref92hd83xxx_pin_configs, v 2635 sound/pci/hda/patch_sigmatel.c .v.pins = dell_s14_pin_configs, v 2639 sound/pci/hda/patch_sigmatel.c .v.pins = dell_vostro_3500_pin_configs, v 2643 sound/pci/hda/patch_sigmatel.c .v.pins = hp_cNB11_intquad_pin_configs, v 2649 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_hp, v 2653 sound/pci/hda/patch_sigmatel.c .v.pins = hp_dv7_4000_pin_configs, v 2659 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_hp_zephyr, v 2665 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_hp_led, v 2671 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_hp_inv_led, v 2677 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_hp_mic_led, v 2683 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_hp_led_gpio10, v 2689 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_headset_jack, v 2693 sound/pci/hda/patch_sigmatel.c .v.pins = (const struct hda_pintbl[]) { v 2700 sound/pci/hda/patch_sigmatel.c .v.verbs = hp_bnb13_eq_verbs, v 2706 sound/pci/hda/patch_sigmatel.c .v.pins = (const struct hda_pintbl[]) { v 2713 sound/pci/hda/patch_sigmatel.c .v.func = hp_envy_ts_fixup_dac_bind, v 2719 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd83xxx_fixup_gpio10_eapd, v 3167 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd71bxx_fixup_ref, v 3171 sound/pci/hda/patch_sigmatel.c .v.pins = dell_m4_1_pin_configs, v 3175 sound/pci/hda/patch_sigmatel.c .v.pins = dell_m4_2_pin_configs, v 3179 sound/pci/hda/patch_sigmatel.c .v.pins = dell_m4_3_pin_configs, v 3183 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd71bxx_fixup_hp_m4, v 3189 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd71bxx_fixup_hp_dv4, v 3195 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd71bxx_fixup_hp_dv5, v 3201 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd71bxx_fixup_hp_hdx, v 3207 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd71bxx_fixup_hp, v 3533 sound/pci/hda/patch_sigmatel.c .v.pins = ref922x_pin_configs, v 3537 sound/pci/hda/patch_sigmatel.c .v.pins = d945gtp3_pin_configs, v 3541 sound/pci/hda/patch_sigmatel.c .v.pins = d945gtp5_pin_configs, v 3545 sound/pci/hda/patch_sigmatel.c .v.func = stac922x_fixup_intel_mac_auto, v 3549 sound/pci/hda/patch_sigmatel.c .v.pins = intel_mac_v1_pin_configs, v 3555 sound/pci/hda/patch_sigmatel.c .v.pins = intel_mac_v2_pin_configs, v 3561 sound/pci/hda/patch_sigmatel.c .v.pins = intel_mac_v3_pin_configs, v 3567 sound/pci/hda/patch_sigmatel.c .v.pins = intel_mac_v4_pin_configs, v 3573 sound/pci/hda/patch_sigmatel.c .v.pins = intel_mac_v5_pin_configs, v 3579 sound/pci/hda/patch_sigmatel.c .v.func = stac922x_fixup_intel_mac_gpio, v 3583 sound/pci/hda/patch_sigmatel.c .v.pins = ecs202_pin_configs, v 3587 sound/pci/hda/patch_sigmatel.c .v.pins = dell_922x_d81_pin_configs, v 3591 sound/pci/hda/patch_sigmatel.c .v.pins = dell_922x_d82_pin_configs, v 3595 sound/pci/hda/patch_sigmatel.c .v.pins = dell_922x_m81_pin_configs, v 3599 sound/pci/hda/patch_sigmatel.c .v.pins = dell_922x_m82_pin_configs, v 3862 sound/pci/hda/patch_sigmatel.c .v.func = stac927x_fixup_ref_no_jd, v 3868 sound/pci/hda/patch_sigmatel.c .v.func = stac927x_fixup_ref, v 3872 sound/pci/hda/patch_sigmatel.c .v.pins = d965_3st_pin_configs, v 3878 sound/pci/hda/patch_sigmatel.c .v.pins = d965_5st_pin_configs, v 3884 sound/pci/hda/patch_sigmatel.c .v.verbs = d965_core_init, v 3888 sound/pci/hda/patch_sigmatel.c .v.pins = d965_5st_no_fp_pin_configs, v 3892 sound/pci/hda/patch_sigmatel.c .v.pins = nemo_pin_configs, v 3896 sound/pci/hda/patch_sigmatel.c .v.pins = dell_3st_pin_configs, v 3902 sound/pci/hda/patch_sigmatel.c .v.pins = (const struct hda_pintbl[]) { v 3914 sound/pci/hda/patch_sigmatel.c .v.pins = (const struct hda_pintbl[]) { v 3924 sound/pci/hda/patch_sigmatel.c .v.pins = (const struct hda_pintbl[]) { v 3934 sound/pci/hda/patch_sigmatel.c .v.func = stac927x_fixup_dell_dmic, v 3938 sound/pci/hda/patch_sigmatel.c .v.func = stac927x_fixup_volknob, v 4136 sound/pci/hda/patch_sigmatel.c .v.func = stac9205_fixup_ref, v 4140 sound/pci/hda/patch_sigmatel.c .v.pins = dell_9205_m42_pin_configs, v 4144 sound/pci/hda/patch_sigmatel.c .v.func = stac9205_fixup_dell_m43, v 4148 sound/pci/hda/patch_sigmatel.c .v.pins = dell_9205_m44_pin_configs, v 4152 sound/pci/hda/patch_sigmatel.c .v.func = stac9205_fixup_eapd, v 4230 sound/pci/hda/patch_sigmatel.c .v.func = stac92hd95_fixup_hp_led, v 4234 sound/pci/hda/patch_sigmatel.c .v.verbs = (const struct hda_verb[]) { v 4995 sound/pci/hda/patch_sigmatel.c .v.pins = stac9872_vaio_pin_configs, v 295 sound/pci/hda/patch_via.c int ch, v; v 302 sound/pci/hda/patch_via.c v = snd_hda_codec_amp_read(codec, p->nid, ch, p->dir, v 304 sound/pci/hda/patch_via.c if (!(v & HDA_AMP_MUTE) && v > 0) v 1017 sound/pci/hda/patch_via.c .v.func = via_fixup_intmic_boost, v 1021 sound/pci/hda/patch_via.c .v.pins = (const struct hda_pintbl[]) { v 290 sound/pci/korg1212/korg1212.c } v; v 297 sound/pci/korg1212/korg1212.c } v; v 938 sound/pci/korg1212/korg1212.c sensVals.l.v.leftChanId = SET_SENS_LEFTCHANID; v 939 sound/pci/korg1212/korg1212.c sensVals.r.v.rightChanId = SET_SENS_RIGHTCHANID; v 940 sound/pci/korg1212/korg1212.c sensVals.l.v.leftChanVal = korg1212->leftADCInSens; v 941 sound/pci/korg1212/korg1212.c sensVals.r.v.rightChanVal = korg1212->rightADCInSens; v 1191 sound/pci/rme9652/hdspm.c static inline void snd_hdspm_enable_in(struct hdspm * hdspm, int i, int v) v 1193 sound/pci/rme9652/hdspm.c hdspm_write(hdspm, HDSPM_inputEnableBase + (4 * i), v); v 1196 sound/pci/rme9652/hdspm.c static inline void snd_hdspm_enable_out(struct hdspm * hdspm, int i, int v) v 1198 sound/pci/rme9652/hdspm.c hdspm_write(hdspm, HDSPM_outputEnableBase + (4 * i), v); v 77 sound/soc/au1x/ac97c.c static inline void WR(struct au1xpsc_audio_data *ctx, int reg, unsigned long v) v 79 sound/soc/au1x/ac97c.c __raw_writel(v, ctx->mmio + reg); v 126 sound/soc/au1x/ac97c.c unsigned short v) v 142 sound/soc/au1x/ac97c.c WR(ctx, AC97_CMDRESP, CMD_WRITE | CMD_IDX(r) | CMD_SET_DATA(v)); v 152 sound/soc/au1x/ac97c.c pr_debug("AC97WR %04x %04x %d\n", r, v, retry); v 75 sound/soc/au1x/i2sc.c static inline void WR(struct au1xpsc_audio_data *ctx, int reg, unsigned long v) v 77 sound/soc/au1x/i2sc.c __raw_writel(v, ctx->mmio + reg); v 186 sound/soc/au1x/i2sc.c unsigned long v; v 188 sound/soc/au1x/i2sc.c v = msbits_to_reg(params->msbits); v 189 sound/soc/au1x/i2sc.c if (!v) v 193 sound/soc/au1x/i2sc.c ctx->cfg |= v; v 69 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_RXTHR(v) ((v) << 7) v 70 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_TXTHR(v) ((v) << 5) v 86 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_FLEN(v) ((v) << 10) v 87 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_FSLEN(v) (v) v 91 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_CHPOS(v) ((v) << 4) v 92 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_CHWID(v) (v) v 93 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_CH1(v) ((v) << 16) v 94 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_CH2(v) (v) v 95 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_CH1_POS(v) BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(v)) v 96 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_CH2_POS(v) BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(v)) v 98 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_TX_PANIC(v) ((v) << 24) v 99 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_RX_PANIC(v) ((v) << 16) v 100 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_TX(v) ((v) << 8) v 101 sound/soc/bcm/bcm2835-i2s.c #define BCM2835_I2S_RX(v) (v) v 254 sound/soc/cirrus/ep93xx-ac97.c unsigned v = 0; v 265 sound/soc/cirrus/ep93xx-ac97.c v |= AC97TXCR_CM; v 266 sound/soc/cirrus/ep93xx-ac97.c v |= AC97TXCR_TX3 | AC97TXCR_TX4; v 267 sound/soc/cirrus/ep93xx-ac97.c v |= AC97TXCR_TEN; v 268 sound/soc/cirrus/ep93xx-ac97.c ep93xx_ac97_write_reg(info, AC97TXCR(1), v); v 274 sound/soc/cirrus/ep93xx-ac97.c v |= AC97RXCR_CM; v 275 sound/soc/cirrus/ep93xx-ac97.c v |= AC97RXCR_RX3 | AC97RXCR_RX4; v 276 sound/soc/cirrus/ep93xx-ac97.c v |= AC97RXCR_REN; v 277 sound/soc/cirrus/ep93xx-ac97.c ep93xx_ac97_write_reg(info, AC97RXCR(1), v); v 296 sound/soc/cirrus/ep93xx-ac97.c v = ep93xx_ac97_read_reg(info, AC97SR(1)); v 301 sound/soc/cirrus/ep93xx-ac97.c } while (!(v & (AC97SR_TXFE | AC97SR_TXUE))); v 96 sound/soc/codecs/cs42xx8.h #define CS42XX8_FUNCMOD_DAC_FM(v) ((v) << CS42XX8_FUNCMOD_DAC_FM_SHIFT) v 100 sound/soc/codecs/cs42xx8.h #define CS42XX8_FUNCMOD_ADC_FM(v) ((v) << CS42XX8_FUNCMOD_ADC_FM_SHIFT) v 102 sound/soc/codecs/cs42xx8.h #define CS42XX8_FUNCMOD_xC_FM(x, v) ((x) ? CS42XX8_FUNCMOD_DAC_FM(v) : CS42XX8_FUNCMOD_ADC_FM(v)) v 64 sound/soc/codecs/cs47l24.c unsigned int v; v 67 sound/soc/codecs/cs47l24.c ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); v 73 sound/soc/codecs/cs47l24.c v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; v 75 sound/soc/codecs/cs47l24.c wm_adsp2_set_dspclk(w, v); v 110 sound/soc/codecs/msm8916-wcd-analog.c #define MICB_VOLTAGE_REGVAL(v) (((v - MICB_MIN_VAL)/MICB_STEP_SIZE) << 3) v 115 sound/soc/codecs/tscs42xx.h #define RV(v, b) ((v)<<(b)) v 624 sound/soc/codecs/wm5102.c unsigned int v = 0; v 629 sound/soc/codecs/wm5102.c ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); v 636 sound/soc/codecs/wm5102.c v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; v 638 sound/soc/codecs/wm5102.c if (v >= 3) { v 647 sound/soc/codecs/wm5102.c wm_adsp2_set_dspclk(w, v); v 200 sound/soc/codecs/wm5110.c unsigned int v; v 203 sound/soc/codecs/wm5110.c ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); v 209 sound/soc/codecs/wm5110.c v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; v 211 sound/soc/codecs/wm5110.c wm_adsp2_set_dspclk(w, v); v 124 sound/soc/fsl/fsl_asrc.h #define ASRCNCR_ANCi(i, v, b) ((v << ASRCNCR_ANCi_SHIFT(i, b)) & ASRCNCR_ANCi_MASK(i, b)) v 139 sound/soc/fsl/fsl_asrc.h #define ASRCFG_POSTMOD(i, v) ((v) << ASRCFG_POSTMODi_SHIFT(i)) v 147 sound/soc/fsl/fsl_asrc.h #define ASRCFG_PREMOD(i, v) ((v) << ASRCFG_PREMODi_SHIFT(i)) v 158 sound/soc/fsl/fsl_asrc.h #define ASRCSR_AOCS(i, v) ((v) << ASRCSR_AOCSi_SHIFT(i)) v 161 sound/soc/fsl/fsl_asrc.h #define ASRCSR_AICS(i, v) ((v) << ASRCSR_AICSi_SHIFT(i)) v 167 sound/soc/fsl/fsl_asrc.h #define ASRCDRi_AICP(i, v) ((v) << ASRCDRi_AICPi_SHIFT(i)) v 170 sound/soc/fsl/fsl_asrc.h #define ASRCDRi_AICD(i, v) ((v) << ASRCDRi_AICDi_SHIFT(i)) v 173 sound/soc/fsl/fsl_asrc.h #define ASRCDRi_AOCP(i, v) ((v) << ASRCDRi_AOCPi_SHIFT(i)) v 176 sound/soc/fsl/fsl_asrc.h #define ASRCDRi_AOCD(i, v) ((v) << ASRCDRi_AOCDi_SHIFT(i)) v 236 sound/soc/fsl/fsl_asrc.h #define ASRMCRi_OUTFIFO_THRESHOLD(v) (((v) << ASRMCRi_OUTFIFO_THRESHOLD_SHIFT) & ASRMCRi_OUTFIFO_THRESHOLD_MASK) v 246 sound/soc/fsl/fsl_asrc.h #define ASRMCRi_INFIFO_THRESHOLD(v) (((v) << ASRMCRi_INFIFO_THRESHOLD_SHIFT) & ASRMCRi_INFIFO_THRESHOLD_MASK) v 270 sound/soc/fsl/fsl_asrc.h #define ASRMCR1i_IWD(v) ((v) << ASRMCR1i_IWD_SHIFT) v 284 sound/soc/fsl/fsl_asrc.h #define ASRMCR1i_OW16(v) ((v) << ASRMCR1i_OW16_SHIFT) v 120 sound/soc/fsl/fsl_esai.h #define ESAI_xFCR_xWA(v) (((8 - ((v) >> 2)) << ESAI_xFCR_xWA_SHIFT) & ESAI_xFCR_xWA_MASK) v 124 sound/soc/fsl/fsl_esai.h #define ESAI_xFCR_xFWM(v) ((((v) - 1) << ESAI_xFCR_xFWM_SHIFT) & ESAI_xFCR_xFWM_MASK) v 300 sound/soc/fsl/fsl_esai.h #define ESAI_xCCR_xFP(v) ((((v) - 1) << ESAI_xCCR_xFP_SHIFT) & ESAI_xCCR_xFP_MASK) v 304 sound/soc/fsl/fsl_esai.h #define ESAI_xCCR_xDC(v) ((((v) - 1) << ESAI_xCCR_xDC_SHIFT) & ESAI_xCCR_xDC_MASK) v 312 sound/soc/fsl/fsl_esai.h #define ESAI_xCCR_xPM(v) ((((v) - 1) << ESAI_xCCR_xPM_SHIFT) & ESAI_xCCR_xPM_MASK) v 318 sound/soc/fsl/fsl_esai.h #define ESAI_xSMA_xS(v) ((v) & ESAI_xSMA_xS_MASK) v 322 sound/soc/fsl/fsl_esai.h #define ESAI_xSMB_xS(v) (((v) >> ESAI_xSMA_xS_WIDTH) & ESAI_xSMB_xS_MASK) v 328 sound/soc/fsl/fsl_esai.h #define ESAI_PRRC_PDC(v) ((v) & ESAI_PRRC_PDC_MASK) v 334 sound/soc/fsl/fsl_esai.h #define ESAI_PCRC_PC(v) ((v) & ESAI_PCRC_PC_MASK) v 58 sound/soc/fsl/fsl_micfil.h #define MICFIL_CTRL1_DISEL(v) (((v) << MICFIL_CTRL1_DISEL_SHIFT) \ v 84 sound/soc/fsl/fsl_micfil.h #define MICFIL_CTRL2_CICOSR(v) (((v) << MICFIL_CTRL2_CICOSR_SHIFT) \ v 90 sound/soc/fsl/fsl_micfil.h #define MICFIL_CTRL2_CLKDIV(v) (((v) << MICFIL_CTRL2_CLKDIV_SHIFT) \ v 103 sound/soc/fsl/fsl_micfil.h #define MICFIL_STAT_CHXF_SHIFT(v) (v) v 104 sound/soc/fsl/fsl_micfil.h #define MICFIL_STAT_CHXF_MASK(v) BIT(MICFIL_STAT_CHXF_SHIFT(v)) v 105 sound/soc/fsl/fsl_micfil.h #define MICFIL_STAT_CHXF(v) BIT(MICFIL_STAT_CHXF_SHIFT(v)) v 112 sound/soc/fsl/fsl_micfil.h #define MICFIL_FIFO_CTRL_FIFOWMK(v) (((v) << MICFIL_FIFO_CTRL_FIFOWMK_SHIFT) \ v 116 sound/soc/fsl/fsl_micfil.h #define MICFIL_FIFO_STAT_FIFOX_OVER_SHIFT(v) (v) v 117 sound/soc/fsl/fsl_micfil.h #define MICFIL_FIFO_STAT_FIFOX_OVER_MASK(v) BIT(MICFIL_FIFO_STAT_FIFOX_OVER_SHIFT(v)) v 118 sound/soc/fsl/fsl_micfil.h #define MICFIL_FIFO_STAT_FIFOX_UNDER_SHIFT(v) ((v) + 8) v 119 sound/soc/fsl/fsl_micfil.h #define MICFIL_FIFO_STAT_FIFOX_UNDER_MASK(v) BIT(MICFIL_FIFO_STAT_FIFOX_UNDER_SHIFT(v)) v 126 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_CTRL1_CHSEL(v) (((v) << MICFIL_VAD0_CTRL1_CHSEL_SHIFT) \ v 132 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_CTRL1_CICOSR(v) (((v) << MICFIL_VAD0_CTRL1_CICOSR_SHIFT) \ v 138 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_CTRL1_INITT(v) (((v) << MICFIL_VAD0_CTRL1_INITT_SHIFT) \ v 170 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_CTRL2_FRAMET(v) (((v) << MICFIL_VAD0_CTRL2_FRAMET_SHIFT) \ v 176 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_CTRL2_INPGAIN(v) (((v) << MICFIL_VAD0_CTRL2_INPGAIN_SHIFT) \ v 182 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_CTRL2_HPF(v) (((v) << MICFIL_VAD0_CTRL2_HPF_SHIFT) \ v 196 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_SCONFIG_SGAIN(v) (((v) << MICFIL_VAD0_SCONFIG_SGAIN_SHIFT) \ v 215 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_NCONFIG_NFILADJ(v) (((v) << MICFIL_VAD0_NCONFIG_NFILADJ_SHIFT) \ v 221 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_NCONFIG_NGAIN(v) (((v) << MICFIL_VAD0_NCONFIG_NGAIN_SHIFT) \ v 229 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_ZCD_ZCDTH(v) (((v) << MICFIL_VAD0_ZCD_ZCDTH_SHIFT)\ v 235 sound/soc/fsl/fsl_micfil.h #define MICFIL_VAD0_ZCD_ZCDADJ(v) (((v) << MICFIL_VAD0_ZCD_ZCDADJ_SHIFT)\ v 262 sound/soc/fsl/fsl_micfil.h #define MICFIL_OUTGAIN_CHX_SHIFT(v) (4 * (v)) v 265 sound/soc/fsl/fsl_micfil.h #define MICFIL_DMA_IRQ_DISABLED(v) ((v) & MICFIL_CTRL1_DISEL_MASK) v 266 sound/soc/fsl/fsl_micfil.h #define MICFIL_DMA_ENABLED(v) ((0x1 << MICFIL_CTRL1_DISEL_SHIFT) \ v 267 sound/soc/fsl/fsl_micfil.h == ((v) & MICFIL_CTRL1_DISEL_MASK)) v 268 sound/soc/fsl/fsl_micfil.h #define MICFIL_IRQ_ENABLED(v) ((0x2 << MICFIL_CTRL1_DISEL_SHIFT) \ v 269 sound/soc/fsl/fsl_micfil.h == ((v) & MICFIL_CTRL1_DISEL_MASK)) v 20 sound/soc/mxs/mxs-saif.h #define BF_SAIF_CTRL_BITCLK_MULT_RATE(v) \ v 21 sound/soc/mxs/mxs-saif.h (((v) << 27) & BM_SAIF_CTRL_BITCLK_MULT_RATE) v 30 sound/soc/mxs/mxs-saif.h #define BF_SAIF_CTRL_DMAWAIT_COUNT(v) \ v 31 sound/soc/mxs/mxs-saif.h (((v) << 16) & BM_SAIF_CTRL_DMAWAIT_COUNT) v 34 sound/soc/mxs/mxs-saif.h #define BF_SAIF_CTRL_CHANNEL_NUM_SELECT(v) \ v 35 sound/soc/mxs/mxs-saif.h (((v) << 14) & BM_SAIF_CTRL_CHANNEL_NUM_SELECT) v 44 sound/soc/mxs/mxs-saif.h #define BF_SAIF_CTRL_WORD_LENGTH(v) \ v 45 sound/soc/mxs/mxs-saif.h (((v) << 4) & BM_SAIF_CTRL_WORD_LENGTH) v 55 sound/soc/mxs/mxs-saif.h #define BF_SAIF_STAT_RSRVD2(v) \ v 56 sound/soc/mxs/mxs-saif.h (((v) << 17) & BM_SAIF_STAT_RSRVD2) v 60 sound/soc/mxs/mxs-saif.h #define BF_SAIF_STAT_RSRVD1(v) \ v 61 sound/soc/mxs/mxs-saif.h (((v) << 7) & BM_SAIF_STAT_RSRVD1) v 68 sound/soc/mxs/mxs-saif.h #define BF_SAIF_STAT_RSRVD0(v) \ v 69 sound/soc/mxs/mxs-saif.h (((v) << 1) & BM_SAIF_STAT_RSRVD0) v 75 sound/soc/mxs/mxs-saif.h #define BF_SAIF_DATA_PCM_RIGHT(v) \ v 76 sound/soc/mxs/mxs-saif.h (((v) << 16) & BM_SAIF_DATA_PCM_RIGHT) v 79 sound/soc/mxs/mxs-saif.h #define BF_SAIF_DATA_PCM_LEFT(v) \ v 80 sound/soc/mxs/mxs-saif.h (((v) << 0) & BM_SAIF_DATA_PCM_LEFT) v 85 sound/soc/mxs/mxs-saif.h #define BF_SAIF_VERSION_MAJOR(v) \ v 86 sound/soc/mxs/mxs-saif.h (((v) << 24) & BM_SAIF_VERSION_MAJOR) v 89 sound/soc/mxs/mxs-saif.h #define BF_SAIF_VERSION_MINOR(v) \ v 90 sound/soc/mxs/mxs-saif.h (((v) << 16) & BM_SAIF_VERSION_MINOR) v 93 sound/soc/mxs/mxs-saif.h #define BF_SAIF_VERSION_STEP(v) \ v 94 sound/soc/mxs/mxs-saif.h (((v) << 0) & BM_SAIF_VERSION_STEP) v 130 sound/soc/qcom/lpass-apq8016.c struct lpass_variant *v = drvdata->variant; v 135 sound/soc/qcom/lpass-apq8016.c v->rdma_channels); v 137 sound/soc/qcom/lpass-apq8016.c if (chan >= v->rdma_channels) v 141 sound/soc/qcom/lpass-apq8016.c v->wrdma_channel_start + v 142 sound/soc/qcom/lpass-apq8016.c v->wrdma_channels, v 143 sound/soc/qcom/lpass-apq8016.c v->wrdma_channel_start); v 145 sound/soc/qcom/lpass-apq8016.c if (chan >= v->wrdma_channel_start + v->wrdma_channels) v 300 sound/soc/qcom/lpass-cpu.c struct lpass_variant *v = drvdata->variant; v 303 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->i2s_ports; ++i) v 304 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_I2SCTL_REG(v, i)) v 307 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->irq_ports; ++i) { v 308 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_IRQEN_REG(v, i)) v 310 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_IRQCLEAR_REG(v, i)) v 314 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->rdma_channels; ++i) { v 315 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMACTL_REG(v, i)) v 317 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMABASE_REG(v, i)) v 319 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMABUFF_REG(v, i)) v 321 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMAPER_REG(v, i)) v 325 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->wrdma_channels; ++i) { v 326 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) v 328 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) v 330 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) v 332 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) v 342 sound/soc/qcom/lpass-cpu.c struct lpass_variant *v = drvdata->variant; v 345 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->i2s_ports; ++i) v 346 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_I2SCTL_REG(v, i)) v 349 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->irq_ports; ++i) { v 350 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_IRQEN_REG(v, i)) v 352 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_IRQSTAT_REG(v, i)) v 356 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->rdma_channels; ++i) { v 357 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMACTL_REG(v, i)) v 359 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMABASE_REG(v, i)) v 361 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMABUFF_REG(v, i)) v 363 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMACURR_REG(v, i)) v 365 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMAPER_REG(v, i)) v 369 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->wrdma_channels; ++i) { v 370 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) v 372 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) v 374 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) v 376 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) v 378 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) v 388 sound/soc/qcom/lpass-cpu.c struct lpass_variant *v = drvdata->variant; v 391 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->irq_ports; ++i) v 392 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_IRQSTAT_REG(v, i)) v 395 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->rdma_channels; ++i) v 396 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_RDMACURR_REG(v, i)) v 399 sound/soc/qcom/lpass-cpu.c for (i = 0; i < v->wrdma_channels; ++i) v 400 sound/soc/qcom/lpass-cpu.c if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) v 11 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ v 12 sound/soc/qcom/lpass-lpaif-reg.h (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port)) v 14 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) v 76 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ v 77 sound/soc/qcom/lpass-lpaif-reg.h (v->irq_reg_base + (addr) + v->irq_reg_stride * (port)) v 81 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) v 82 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) v 83 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) v 95 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_RDMA_REG_ADDR(v, addr, chan) \ v 96 sound/soc/qcom/lpass-lpaif-reg.h (v->rdma_reg_base + (addr) + v->rdma_reg_stride * (chan)) v 100 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_RDMACTL_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x00, (chan)) v 101 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_RDMABASE_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x04, (chan)) v 102 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_RDMABUFF_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x08, (chan)) v 103 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_RDMACURR_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x0C, (chan)) v 104 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_RDMAPER_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x10, (chan)) v 105 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_RDMAPERCNT_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x14, (chan)) v 107 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_WRDMA_REG_ADDR(v, addr, chan) \ v 108 sound/soc/qcom/lpass-lpaif-reg.h (v->wrdma_reg_base + (addr) + \ v 109 sound/soc/qcom/lpass-lpaif-reg.h v->wrdma_reg_stride * (chan - v->wrdma_channel_start)) v 111 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_WRDMACTL_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x00, (chan)) v 112 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_WRDMABASE_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x04, (chan)) v 113 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_WRDMABUFF_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x08, (chan)) v 114 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_WRDMACURR_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x0C, (chan)) v 115 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_WRDMAPER_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x10, (chan)) v 116 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_WRDMAPERCNT_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x14, (chan)) v 118 sound/soc/qcom/lpass-lpaif-reg.h #define __LPAIF_DMA_REG(v, chan, dir, reg) \ v 120 sound/soc/qcom/lpass-lpaif-reg.h LPAIF_RDMA##reg##_REG(v, chan) : \ v 121 sound/soc/qcom/lpass-lpaif-reg.h LPAIF_WRDMA##reg##_REG(v, chan) v 123 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_DMACTL_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, CTL) v 124 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_DMABASE_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, BASE) v 125 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_DMABUFF_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, BUFF) v 126 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_DMACURR_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, CURR) v 127 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_DMAPER_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, PER) v 128 sound/soc/qcom/lpass-lpaif-reg.h #define LPAIF_DMAPERCNT_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, PERCNT) v 60 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 71 sound/soc/qcom/lpass-platform.c if (v->alloc_dma_channel) v 72 sound/soc/qcom/lpass-platform.c dma_ch = v->alloc_dma_channel(drvdata, dir); v 82 sound/soc/qcom/lpass-platform.c LPAIF_DMACTL_REG(v, dma_ch, dir), 0); v 114 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 119 sound/soc/qcom/lpass-platform.c if (v->free_dma_channel) v 120 sound/soc/qcom/lpass-platform.c v->free_dma_channel(drvdata, data->dma_ch); v 133 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 139 sound/soc/qcom/lpass-platform.c int ret, dma_port = pcm_data->i2s_port + v->dmactl_audif_start; v 209 sound/soc/qcom/lpass-platform.c LPAIF_DMACTL_REG(v, ch, dir), regval); v 226 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 230 sound/soc/qcom/lpass-platform.c reg = LPAIF_DMACTL_REG(v, pcm_data->dma_ch, substream->stream); v 247 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 253 sound/soc/qcom/lpass-platform.c LPAIF_DMABASE_REG(v, ch, dir), v 262 sound/soc/qcom/lpass-platform.c LPAIF_DMABUFF_REG(v, ch, dir), v 271 sound/soc/qcom/lpass-platform.c LPAIF_DMAPER_REG(v, ch, dir), v 280 sound/soc/qcom/lpass-platform.c LPAIF_DMACTL_REG(v, ch, dir), v 299 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 310 sound/soc/qcom/lpass-platform.c LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), v 319 sound/soc/qcom/lpass-platform.c LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), v 329 sound/soc/qcom/lpass-platform.c LPAIF_DMACTL_REG(v, ch, dir), v 342 sound/soc/qcom/lpass-platform.c LPAIF_DMACTL_REG(v, ch, dir), v 352 sound/soc/qcom/lpass-platform.c LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), v 373 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 380 sound/soc/qcom/lpass-platform.c LPAIF_DMABASE_REG(v, ch, dir), &base_addr); v 388 sound/soc/qcom/lpass-platform.c LPAIF_DMACURR_REG(v, ch, dir), &curr_addr); v 426 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 432 sound/soc/qcom/lpass-platform.c LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), v 445 sound/soc/qcom/lpass-platform.c LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), v 459 sound/soc/qcom/lpass-platform.c LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), v 477 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 482 sound/soc/qcom/lpass-platform.c LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &irqs); v 563 sound/soc/qcom/lpass-platform.c struct lpass_variant *v = drvdata->variant; v 572 sound/soc/qcom/lpass-platform.c LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0); v 117 sound/soc/qcom/qdsp6/q6core.c struct avcs_cmdrsp_get_version *v; v 119 sound/soc/qcom/qdsp6/q6core.c v = data->payload; v 122 sound/soc/qcom/qdsp6/q6core.c struct_size(v, svc_api_info, v 123 sound/soc/qcom/qdsp6/q6core.c v->num_services), v 42 sound/soc/samsung/s3c-i2s-v2.c #define bit_set(v, b) (((v) & (b)) ? 1 : 0) v 100 sound/soc/sh/hac.c unsigned short *v) v 106 sound/soc/sh/hac.c *v = 0; v 121 sound/soc/sh/hac.c *v = ((HACREG(HACCSDR) & CSDR_MASK) >> CSDR_SHIFT); v 59 sound/soc/sh/rcar/ssi.c #define CKDV(v) (v << 4) /* Serial Clock Division Ratio */ v 182 sound/soc/soc-core.c static int dai_list_show(struct seq_file *m, void *v) v 199 sound/soc/soc-core.c static int component_list_show(struct seq_file *m, void *v) v 628 sound/soc/sof/ipc.c struct sof_ipc_fw_version *v = &ready->version; v 705 sound/soc/sof/ipc.c if (v->abi_version < SOF_ABI_VER(3, 3, 0)) { v 739 sound/soc/sof/ipc.c struct sof_ipc_fw_version *v = &ready->version; v 742 sound/soc/sof/ipc.c "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor, v 743 sound/soc/sof/ipc.c v->micro, v->tag); v 746 sound/soc/sof/ipc.c SOF_ABI_VERSION_MAJOR(v->abi_version), v 747 sound/soc/sof/ipc.c SOF_ABI_VERSION_MINOR(v->abi_version), v 748 sound/soc/sof/ipc.c SOF_ABI_VERSION_PATCH(v->abi_version), v 751 sound/soc/sof/ipc.c if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) { v 756 sound/soc/sof/ipc.c if (v->abi_version > SOF_ABI_VERSION) { v 771 sound/soc/sof/ipc.c v->build, v->date, v->time, v 781 sound/soc/sof/ipc.c memcpy(&sdev->fw_version, v, sizeof(*v)); v 2554 sound/soc/sof/topology.c struct sof_ipc_fw_version *v = &ready->version; v 2640 sound/soc/sof/topology.c if (SOF_ABI_VER(v->major, v->minor, v->micro) < SOF_ABI_VER(3, 0, 1)) { v 160 sound/soc/sof/trace.c struct sof_ipc_fw_version *v = &ready->version; v 171 sound/soc/sof/trace.c if (v->abi_version >= SOF_ABI_VER(3, 7, 0)) { v 29 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_CTL_MCLKDIV(v) ((v) << 4) /* v even */ v 38 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCFG_TXRATIO(v) ((v) << 4) v 61 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_FCTL_TXTL(v) ((v) << 8) v 63 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_FCTL_RXTL(v) ((v) << 3) v 66 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_FCTL_RXOM(v) ((v) << 0) v 73 sound/soc/sunxi/sun4i-spdif.c #define SUN50I_H6_SPDIF_FCTL_TXTL(v) ((v) << 12) v 75 sound/soc/sunxi/sun4i-spdif.c #define SUN50I_H6_SPDIF_FCTL_RXTL(v) ((v) << 4) v 78 sound/soc/sunxi/sun4i-spdif.c #define SUN50I_H6_SPDIF_FCTL_RXOM(v) ((v) << 0) v 116 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA0_CLK(v) ((v) << 28) v 117 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA0_SAMFREQ(v) ((v) << 24) v 119 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA0_CHNUM(v) ((v) << 20) v 121 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA0_SRCNUM(v) ((v) << 16) v 122 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA0_CATACOD(v) ((v) << 8) v 123 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA0_MODE(v) ((v) << 6) v 124 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA0_EMPHASIS(v) ((v) << 3) v 130 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA1_CGMSA(v) ((v) << 8) v 131 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA1_ORISAMFREQ(v) ((v) << 4) v 133 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_TXCHSTA1_SAMWORDLEN(v) ((v) << 1) v 137 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA0_CLK(v) ((v) << 28) v 138 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA0_SAMFREQ(v) ((v) << 24) v 139 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA0_CHNUM(v) ((v) << 20) v 140 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA0_SRCNUM(v) ((v) << 16) v 141 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA0_CATACOD(v) ((v) << 8) v 142 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA0_MODE(v) ((v) << 6) v 143 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA0_EMPHASIS(v) ((v) << 3) v 149 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA1_CGMSA(v) ((v) << 8) v 150 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA1_ORISAMFREQ(v) ((v) << 4) v 151 sound/soc/sunxi/sun4i-spdif.c #define SUN4I_SPDIF_RXCHSTA1_SAMWORDLEN(v) ((v) << 1) v 64 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_SPCR_RINTM(v) ((v) << 4) v 66 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_SPCR_XINTM(v) ((v) << 20) v 71 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_RCR_RWDLEN1(v) ((v) << 5) v 72 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_RCR_RFRLEN1(v) ((v) << 8) v 73 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_RCR_RDATDLY(v) ((v) << 16) v 75 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_RCR_RWDLEN2(v) ((v) << 21) v 76 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_RCR_RFRLEN2(v) ((v) << 24) v 79 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_XCR_XWDLEN1(v) ((v) << 5) v 80 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_XCR_XFRLEN1(v) ((v) << 8) v 81 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_XCR_XDATDLY(v) ((v) << 16) v 83 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_XCR_XWDLEN2(v) ((v) << 21) v 84 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_XCR_XFRLEN2(v) ((v) << 24) v 87 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_SRGR_FWID(v) ((v) << 8) v 88 sound/soc/ti/davinci-i2s.c #define DAVINCI_MCBSP_SRGR_FPER(v) ((v) << 16) v 111 sound/soc/uniphier/aio-core.c u32 v; v 137 sound/soc/uniphier/aio-core.c v = A2APLLCTR1_APLLX_36MHZ; v 140 sound/soc/uniphier/aio-core.c v = A2APLLCTR1_APLLX_33MHZ; v 149 sound/soc/uniphier/aio-core.c v << shift); v 334 sound/soc/uniphier/aio-core.c u32 v; v 339 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_8; v 342 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_11_025; v 345 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_12; v 348 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_16; v 351 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_22_05; v 354 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_24; v 357 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_32; v 360 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_44_1; v 363 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_48; v 366 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_88_2; v 369 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_96; v 372 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_176_4; v 375 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_FSSEL_192; v 383 sound/soc/uniphier/aio-core.c OPORTMXCTR1_FSSEL_MASK, v); v 387 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_8; v 390 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_11_025; v 393 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_12; v 396 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_16; v 399 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_22_05; v 402 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_24; v 405 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_32; v 408 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_44_1; v 411 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_48; v 414 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_88_2; v 417 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_96; v 420 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_176_4; v 423 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_FSSEL_192; v 431 sound/soc/uniphier/aio-core.c IPORTMXCTR1_FSSEL_MASK, v); v 453 sound/soc/uniphier/aio-core.c u32 v; v 458 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_I2SLRSEL_LEFT; v 461 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_I2SLRSEL_RIGHT; v 464 sound/soc/uniphier/aio-core.c v = OPORTMXCTR1_I2SLRSEL_I2S; v 472 sound/soc/uniphier/aio-core.c v |= OPORTMXCTR1_OUTBITSEL_24; v 475 sound/soc/uniphier/aio-core.c OPORTMXCTR1_OUTBITSEL_MASK, v); v 479 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_LRSEL_LEFT; v 482 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_LRSEL_RIGHT; v 485 sound/soc/uniphier/aio-core.c v = IPORTMXCTR1_LRSEL_I2S; v 493 sound/soc/uniphier/aio-core.c v |= IPORTMXCTR1_OUTBITSEL_24 | v 498 sound/soc/uniphier/aio-core.c IPORTMXCTR1_CHSEL_MASK, v); v 529 sound/soc/uniphier/aio-core.c u32 v; v 544 sound/soc/uniphier/aio-core.c v = v_pll[sub->aio->pll_out] | v 552 sound/soc/uniphier/aio-core.c v |= OPORTMXCTR2_EXTLSIFSSEL_36; v 555 sound/soc/uniphier/aio-core.c v |= OPORTMXCTR2_EXTLSIFSSEL_24; v 559 sound/soc/uniphier/aio-core.c v = OPORTMXCTR2_ACLKSEL_A2PLL | v 569 sound/soc/uniphier/aio-core.c v = v_pll[sub->aio->pll_out] | v 577 sound/soc/uniphier/aio-core.c v |= OPORTMXCTR2_EXTLSIFSSEL_36; v 580 sound/soc/uniphier/aio-core.c v |= OPORTMXCTR2_EXTLSIFSSEL_24; v 584 sound/soc/uniphier/aio-core.c v = OPORTMXCTR2_ACLKSEL_A1 | v 589 sound/soc/uniphier/aio-core.c regmap_write(r, OPORTMXCTR2(sub->swm->oport.map), v); v 591 sound/soc/uniphier/aio-core.c v = IPORTMXCTR2_ACLKSEL_A1 | v 595 sound/soc/uniphier/aio-core.c regmap_write(r, IPORTMXCTR2(sub->swm->iport.map), v); v 618 sound/soc/uniphier/aio-core.c u32 v; v 648 sound/soc/uniphier/aio-core.c v = OPORTMXCTR3_SRCSEL_STREAM | v 651 sound/soc/uniphier/aio-core.c v = OPORTMXCTR3_SRCSEL_PCM | v 654 sound/soc/uniphier/aio-core.c v |= OPORTMXCTR3_IECTHUR_IECOUT | v 657 sound/soc/uniphier/aio-core.c regmap_write(r, OPORTMXCTR3(sub->swm->oport.map), v); v 726 sound/soc/uniphier/aio-core.c u32 v; v 728 sound/soc/uniphier/aio-core.c regmap_read(r, OPORTMXTYVOLGAINSTATUS(sub->swm->oport.map, 0), &v); v 730 sound/soc/uniphier/aio-core.c return FIELD_GET(OPORTMXTYVOLGAINSTATUS_CUR_MASK, v); v 789 sound/soc/uniphier/aio-core.c u32 memfmt, v; v 793 sound/soc/uniphier/aio-core.c v = PBOUTMXCTR0_ENDIAN_0123 | v 809 sound/soc/uniphier/aio-core.c v = PBOUTMXCTR0_ENDIAN_3210 | memfmt; v 812 sound/soc/uniphier/aio-core.c regmap_write(r, PBOUTMXCTR0(sub->swm->oif.map), v); v 923 sound/soc/uniphier/aio-core.c u32 v; v 938 sound/soc/uniphier/aio-core.c v = OPORTMXRATE_I_ACLKSEL_APLLA1 | v 943 sound/soc/uniphier/aio-core.c v = OPORTMXRATE_I_ACLKSEL_APLLA2 | v 948 sound/soc/uniphier/aio-core.c v = OPORTMXRATE_I_ACLKSEL_APLLA1 | v 955 sound/soc/uniphier/aio-core.c v | OPORTMXRATE_I_ACLKSRC_APLL | v 1002 sound/soc/uniphier/aio-core.c u32 v; v 1005 sound/soc/uniphier/aio-core.c v = CDA2D_STRT0_STOP_START; v 1007 sound/soc/uniphier/aio-core.c v = CDA2D_STRT0_STOP_STOP; v 1010 sound/soc/uniphier/aio-core.c v | BIT(sub->swm->och.map)); v 1016 sound/soc/uniphier/aio-core.c u32 v; v 1021 sound/soc/uniphier/aio-core.c v = CDA2D_CHMXAMODE_ENDIAN_3210 | v 1026 sound/soc/uniphier/aio-core.c regmap_write(r, CDA2D_CHMXSRCAMODE(sub->swm->ch.map), v); v 1028 sound/soc/uniphier/aio-core.c regmap_write(r, CDA2D_CHMXDSTAMODE(sub->swm->ch.map), v); v 215 sound/sparc/dbri.c #define CS4215_LO(v) v /* Left Output Attenuation 0x3f: -94.5 dB */ v 220 sound/sparc/dbri.c #define CS4215_RO(v) v /* Right Output Attenuation 0x3f: -94.5 dB */ v 225 sound/sparc/dbri.c #define CS4215_LG(v) v /* Left Gain Setting 0xf: 22.5 dB */ v 232 sound/sparc/dbri.c #define CS4215_RG(v) v /* Right Gain Setting 0xf: 22.5 dB */ v 233 sound/sparc/dbri.c #define CS4215_MA(v) (v<<4) /* Monitor Path Attenuation 0xf: mute */ v 380 sound/sparc/dbri.c #define D_PIPE(v) ((v)<<0) /* Pipe No.: 0-15 long, 16-21 short */ v 396 sound/sparc/dbri.c #define D_SDP_MODE(v) ((v)&(7<<13)) v 411 sound/sparc/dbri.c #define D_DTS_PRVIN(v) ((v)<<10) /* Previous In Pipe */ v 412 sound/sparc/dbri.c #define D_DTS_PRVOUT(v) ((v)<<5) /* Previous Out Pipe */ v 415 sound/sparc/dbri.c #define D_TS_LEN(v) ((v)<<24) /* Number of bits in this time slot */ v 416 sound/sparc/dbri.c #define D_TS_CYCLE(v) ((v)<<14) /* Bit Count at start of TS */ v 422 sound/sparc/dbri.c #define D_TS_MON(v) ((v)<<5) /* Monitor Pipe */ v 423 sound/sparc/dbri.c #define D_TS_NEXT(v) ((v)<<0) /* Pipe no.: 0-15 long, 16-21 short */ v 426 sound/sparc/dbri.c #define D_CHI_CHICM(v) ((v)<<16) /* Clock mode */ v 432 sound/sparc/dbri.c #define D_CHI_BPF(v) ((v)<<0) /* Bits per Frame */ v 445 sound/sparc/dbri.c #define D_NT_RLB(v) ((v)<<5) /* Remote Loopback */ v 446 sound/sparc/dbri.c #define D_NT_LLB(v) ((v)<<2) /* Local Loopback */ v 451 sound/sparc/dbri.c #define D_CDEC_CK(v) ((v)<<24) /* Clock Select */ v 452 sound/sparc/dbri.c #define D_CDEC_FED(v) ((v)<<12) /* FSCOD Falling Edge Delay */ v 453 sound/sparc/dbri.c #define D_CDEC_RED(v) ((v)<<0) /* FSCOD Rising Edge Delay */ v 456 sound/sparc/dbri.c #define D_TEST_RAM(v) ((v)<<16) /* RAM Pointer */ v 457 sound/sparc/dbri.c #define D_TEST_SIZE(v) ((v)<<11) /* */ v 497 sound/sparc/dbri.c #define D_INTR_GETCHAN(v) (((v) >> 24) & 0x3f) v 498 sound/sparc/dbri.c #define D_INTR_GETCODE(v) (((v) >> 20) & 0xf) v 499 sound/sparc/dbri.c #define D_INTR_GETCMD(v) (((v) >> 16) & 0xf) v 500 sound/sparc/dbri.c #define D_INTR_GETVAL(v) ((v) & 0xffff) v 501 sound/sparc/dbri.c #define D_INTR_GETRVAL(v) ((v) & 0xfffff) v 539 sound/sparc/dbri.c #define DBRI_TD_CNT(v) ((v) << 16) /* Number of valid bytes in the buffer */ v 543 sound/sparc/dbri.c #define DBRI_TD_FCNT(v) (v) /* Flag Count */ v 547 sound/sparc/dbri.c #define DBRI_TD_STATUS(v) ((v) & 0xff) /* Transmit status */ v 556 sound/sparc/dbri.c #define DBRI_RD_BCNT(v) (v) /* Buffer size */ v 561 sound/sparc/dbri.c #define DBRI_RD_STATUS(v) ((v) & 0xff) /* Receive status */ v 562 sound/sparc/dbri.c #define DBRI_RD_CNT(v) (((v) >> 16) & 0x1fff) /* Valid bytes in the buffer */ v 201 sound/synth/emux/emux_effect.c origp = (unsigned char*)&vp->zone->v.parm + offset; v 71 sound/synth/emux/emux_synth.c if (zp && zp->v.exclusiveClass) v 72 sound/synth/emux/emux_synth.c exclusive_note_off(emu, port, zp->v.exclusiveClass); v 538 sound/synth/emux/emux_synth.c #define LO_BYTE(v) ((v) & 0xff) v 539 sound/synth/emux/emux_synth.c #define HI_BYTE(v) (((v) >> 8) & 0xff) v 552 sound/synth/emux/emux_synth.c vp->reg = vp->zone->v; v 357 sound/synth/emux/soundfont.c init_voice_info(&zp->v); v 436 sound/synth/emux/soundfont.c zp->v.low == map.map_key && v 437 sound/synth/emux/soundfont.c zp->v.start == map.src_instr && v 438 sound/synth/emux/soundfont.c zp->v.end == map.src_bank && v 439 sound/synth/emux/soundfont.c zp->v.fixkey == map.src_key) { v 461 sound/synth/emux/soundfont.c zp->v.low = map.map_key; v 462 sound/synth/emux/soundfont.c zp->v.high = map.map_key; v 464 sound/synth/emux/soundfont.c zp->v.start = map.src_instr; v 465 sound/synth/emux/soundfont.c zp->v.end = map.src_bank; v 466 sound/synth/emux/soundfont.c zp->v.fixkey = map.src_key; v 467 sound/synth/emux/soundfont.c zp->v.sf_id = sf->id; v 567 sound/synth/emux/soundfont.c if (copy_from_user(&tmpzone.v, data, sizeof(tmpzone.v))) { v 571 sound/synth/emux/soundfont.c data += sizeof(tmpzone.v); v 572 sound/synth/emux/soundfont.c count -= sizeof(tmpzone.v); v 577 sound/synth/emux/soundfont.c tmpzone.v.sf_id = sf->id; v 578 sound/synth/emux/soundfont.c if (tmpzone.v.mode & SNDRV_SFNT_MODE_INIT_PARM) v 579 sound/synth/emux/soundfont.c init_voice_parm(&tmpzone.v.parm); v 589 sound/synth/emux/soundfont.c zone->v = tmpzone.v; v 592 sound/synth/emux/soundfont.c zone->sample = set_sample(sf, &zone->v); v 660 sound/synth/emux/soundfont.c avp->start += sample->v.start; v 661 sound/synth/emux/soundfont.c avp->end += sample->v.end; v 662 sound/synth/emux/soundfont.c avp->loopstart += sample->v.loopstart; v 663 sound/synth/emux/soundfont.c avp->loopend += sample->v.loopend; v 666 sound/synth/emux/soundfont.c avp->sample_mode = sample->v.mode_flags; v 681 sound/synth/emux/soundfont.c if (p->v.sample == sample_id) v 729 sound/synth/emux/soundfont.c sp->v = sample_info; v 730 sound/synth/emux/soundfont.c sp->v.sf_id = sf->id; v 731 sound/synth/emux/soundfont.c sp->v.dummy = 0; v 732 sound/synth/emux/soundfont.c sp->v.truesize = sp->v.size; v 737 sound/synth/emux/soundfont.c if (sp->v.size > 0) { v 746 sound/synth/emux/soundfont.c sflist->mem_used += sp->v.truesize; v 787 sound/synth/emux/soundfont.c int v; v 797 sound/synth/emux/soundfont.c v = (log_tbl[s + 1] * low + log_tbl[s] * (0x100 - low)) >> 8; v 798 sound/synth/emux/soundfont.c v -= offset; v 799 sound/synth/emux/soundfont.c v = (v * ratio) >> 16; v 800 sound/synth/emux/soundfont.c v += (24 - bit) * ratio; v 801 sound/synth/emux/soundfont.c return v; v 964 sound/synth/emux/soundfont.c smp->v.sample = sample_id; v 965 sound/synth/emux/soundfont.c smp->v.start = 0; v 966 sound/synth/emux/soundfont.c smp->v.end = patch.len; v 967 sound/synth/emux/soundfont.c smp->v.loopstart = patch.loop_start; v 968 sound/synth/emux/soundfont.c smp->v.loopend = patch.loop_end; v 969 sound/synth/emux/soundfont.c smp->v.size = patch.len; v 972 sound/synth/emux/soundfont.c smp->v.mode_flags = 0; v 974 sound/synth/emux/soundfont.c smp->v.mode_flags |= SNDRV_SFNT_SAMPLE_8BITS; v 976 sound/synth/emux/soundfont.c smp->v.mode_flags |= SNDRV_SFNT_SAMPLE_UNSIGNED; v 977 sound/synth/emux/soundfont.c smp->v.mode_flags |= SNDRV_SFNT_SAMPLE_NO_BLANK; v 979 sound/synth/emux/soundfont.c smp->v.mode_flags |= SNDRV_SFNT_SAMPLE_SINGLESHOT; v 981 sound/synth/emux/soundfont.c smp->v.mode_flags |= SNDRV_SFNT_SAMPLE_BIDIR_LOOP; v 983 sound/synth/emux/soundfont.c smp->v.mode_flags |= SNDRV_SFNT_SAMPLE_REVERSE_LOOP; v 987 sound/synth/emux/soundfont.c smp->v.size /= 2; v 988 sound/synth/emux/soundfont.c smp->v.end /= 2; v 989 sound/synth/emux/soundfont.c smp->v.loopstart /= 2; v 990 sound/synth/emux/soundfont.c smp->v.loopend /= 2; v 994 sound/synth/emux/soundfont.c smp->v.dummy = 0; v 995 sound/synth/emux/soundfont.c smp->v.truesize = 0; v 996 sound/synth/emux/soundfont.c smp->v.sf_id = sf->id; v 1020 sound/synth/emux/soundfont.c sflist->mem_used += smp->v.truesize; v 1022 sound/synth/emux/soundfont.c zone->v.sample = sample_id; /* the last sample */ v 1023 sound/synth/emux/soundfont.c zone->v.rate_offset = calc_rate_offset(patch.base_freq); v 1025 sound/synth/emux/soundfont.c zone->v.root = note / 100; v 1026 sound/synth/emux/soundfont.c zone->v.tune = -(note % 100); v 1027 sound/synth/emux/soundfont.c zone->v.low = (freq_to_note(patch.low_note) + 99) / 100; v 1028 sound/synth/emux/soundfont.c zone->v.high = freq_to_note(patch.high_note) / 100; v 1030 sound/synth/emux/soundfont.c zone->v.pan = (patch.panning + 128) / 2; v 1034 sound/synth/emux/soundfont.c (int)patch.base_freq, zone->v.rate_offset, v 1035 sound/synth/emux/soundfont.c zone->v.root, zone->v.tune, zone->v.low, zone->v.high); v 1059 sound/synth/emux/soundfont.c zone->v.parm.volatkhld = v 1062 sound/synth/emux/soundfont.c zone->v.parm.voldcysus = (calc_gus_sustain(patch.env_offset[2]) << 8) | v 1064 sound/synth/emux/soundfont.c zone->v.parm.volrelease = 0x8000 | snd_sf_calc_parm_decay(release); v 1065 sound/synth/emux/soundfont.c zone->v.attenuation = calc_gus_attenuation(patch.env_offset[0]); v 1069 sound/synth/emux/soundfont.c zone->v.parm.volatkhld, v 1070 sound/synth/emux/soundfont.c zone->v.parm.voldcysus, v 1071 sound/synth/emux/soundfont.c zone->v.parm.volrelease, v 1072 sound/synth/emux/soundfont.c zone->v.attenuation); v 1078 sound/synth/emux/soundfont.c zone->v.parm.volrelease = 0x807f; v 1084 sound/synth/emux/soundfont.c zone->v.parm.tremfrq = ((patch.tremolo_depth / 2) << 8) | rate; v 1089 sound/synth/emux/soundfont.c zone->v.parm.fm2frq2 = ((patch.vibrato_depth / 6) << 8) | rate; v 1094 sound/synth/emux/soundfont.c if (!(smp->v.mode_flags & SNDRV_SFNT_SAMPLE_SINGLESHOT)) v 1095 sound/synth/emux/soundfont.c zone->v.mode = SNDRV_SFNT_MODE_LOOPING; v 1097 sound/synth/emux/soundfont.c zone->v.mode = 0; v 1104 sound/synth/emux/soundfont.c zone->v.sf_id = sf->id; v 1106 sound/synth/emux/soundfont.c zone->sample = set_sample(sf, &zone->v); v 1148 sound/synth/emux/soundfont.c cur->sample = set_sample(sf, &cur->v); v 1168 sound/synth/emux/soundfont.c zone = search_first_zone(sflist, cur->bank, cur->instr, cur->v.low); v 1169 sound/synth/emux/soundfont.c if (zone && zone->v.sf_id != cur->v.sf_id) { v 1184 sound/synth/emux/soundfont.c if ((index = get_index(cur->bank, cur->instr, cur->v.low)) < 0) v 1200 sound/synth/emux/soundfont.c if ((index = get_index(zp->bank, zp->instr, zp->v.low)) < 0) v 1284 sound/synth/emux/soundfont.c if (*notep >= zp->v.low && *notep <= zp->v.high && v 1285 sound/synth/emux/soundfont.c vel >= zp->v.vellow && vel <= zp->v.velhigh) { v 1288 sound/synth/emux/soundfont.c int key = zp->v.fixkey; v 1289 sound/synth/emux/soundfont.c preset = zp->v.start; v 1290 sound/synth/emux/soundfont.c bank = zp->v.end; v 1471 sound/synth/emux/soundfont.c sflist->mem_used -= sp->v.truesize; v 89 sound/usb/caiaq/control.c int v = ucontrol->value.integer.value[0]; v 107 sound/usb/caiaq/control.c cdev->control_state[i] = v; v 114 sound/usb/caiaq/control.c cdev->ep8_out_buf[1] = v; v 139 sound/usb/caiaq/control.c if (v) v 111 sound/usb/usx2y/us122l.c static void pt_info_set(struct usb_device *dev, u8 v) v 118 sound/usb/usx2y/us122l.c v, 0, NULL, 0, 1000); v 18 sound/usb/validate.c bool (*func)(const void *p, const struct usb_desc_validator *v); v 26 sound/usb/validate.c const struct usb_desc_validator *v) v 36 sound/usb/validate.c const struct usb_desc_validator *v) v 48 sound/usb/validate.c switch (v->protocol) { v 70 sound/usb/validate.c const struct usb_desc_validator *v) v 81 sound/usb/validate.c switch (v->protocol) { v 94 sound/usb/validate.c if (v->type == UAC2_PROCESSING_UNIT_V2) v 108 sound/usb/validate.c switch (v->protocol) { v 111 sound/usb/validate.c if (v->type == UAC1_EXTENSION_UNIT) v 126 sound/usb/validate.c if (v->type == UAC2_EXTENSION_UNIT_V2) v 141 sound/usb/validate.c if (v->type == UAC3_EXTENSION_UNIT) { v 168 sound/usb/validate.c const struct usb_desc_validator *v) v 176 sound/usb/validate.c switch (v->protocol) { v 192 sound/usb/validate.c const struct usb_desc_validator *v) v 203 sound/usb/validate.c const struct usb_desc_validator *v) v 214 sound/usb/validate.c const struct usb_desc_validator *v) v 225 sound/usb/validate.c const struct usb_desc_validator *v) v 304 sound/usb/validate.c const struct usb_desc_validator *v) v 309 sound/usb/validate.c for (; v->type; v++) { v 310 sound/usb/validate.c if (v->type == hdr[2] && v 311 sound/usb/validate.c (v->protocol == UAC_VERSION_ALL || v 312 sound/usb/validate.c v->protocol == protocol)) { v 313 sound/usb/validate.c if (v->func) v 314 sound/usb/validate.c return v->func(hdr, v); v 316 sound/usb/validate.c return hdr[0] >= v->size; v 27 tools/arch/arm64/include/asm/barrier.h #define smp_store_release(p, v) \ v 30 tools/arch/arm64/include/asm/barrier.h { .__val = (v) }; \ v 49 tools/arch/ia64/include/asm/barrier.h #define smp_store_release(p, v) \ v 52 tools/arch/ia64/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 33 tools/arch/powerpc/include/asm/barrier.h #define smp_store_release(p, v) \ v 36 tools/arch/powerpc/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 31 tools/arch/s390/include/asm/barrier.h #define smp_store_release(p, v) \ v 34 tools/arch/s390/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 43 tools/arch/sparc/include/asm/barrier_64.h #define smp_store_release(p, v) \ v 46 tools/arch/sparc/include/asm/barrier_64.h WRITE_ONCE(*p, v); \ v 26 tools/arch/x86/include/asm/atomic.h static inline int atomic_read(const atomic_t *v) v 28 tools/arch/x86/include/asm/atomic.h return READ_ONCE((v)->counter); v 38 tools/arch/x86/include/asm/atomic.h static inline void atomic_set(atomic_t *v, int i) v 40 tools/arch/x86/include/asm/atomic.h v->counter = i; v 49 tools/arch/x86/include/asm/atomic.h static inline void atomic_inc(atomic_t *v) v 52 tools/arch/x86/include/asm/atomic.h : "+m" (v->counter)); v 63 tools/arch/x86/include/asm/atomic.h static inline int atomic_dec_and_test(atomic_t *v) v 65 tools/arch/x86/include/asm/atomic.h GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, "%0", "e"); v 68 tools/arch/x86/include/asm/atomic.h static __always_inline int atomic_cmpxchg(atomic_t *v, int old, int new) v 70 tools/arch/x86/include/asm/atomic.h return cmpxchg(&v->counter, old, new); v 33 tools/arch/x86/include/asm/barrier.h #define smp_store_release(p, v) \ v 36 tools/arch/x86/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 105 tools/bpf/bpftool/btf.c __u32 v = *(__u32 *)(t + 1); v 108 tools/bpf/bpftool/btf.c enc = btf_int_enc_str(BTF_INT_ENCODING(v)); v 112 tools/bpf/bpftool/btf.c jsonw_uint_field(w, "bits_offset", BTF_INT_OFFSET(v)); v 113 tools/bpf/bpftool/btf.c jsonw_uint_field(w, "nr_bits", BTF_INT_BITS(v)); v 117 tools/bpf/bpftool/btf.c t->size, BTF_INT_OFFSET(v), BTF_INT_BITS(v), v 193 tools/bpf/bpftool/btf.c const struct btf_enum *v = (const void *)(t + 1); v 205 tools/bpf/bpftool/btf.c for (i = 0; i < vlen; i++, v++) { v 206 tools/bpf/bpftool/btf.c const char *name = btf_str(btf, v->name_off); v 211 tools/bpf/bpftool/btf.c jsonw_uint_field(w, "val", v->val); v 214 tools/bpf/bpftool/btf.c printf("\n\t'%s' val=%u", name, v->val); v 267 tools/bpf/bpftool/btf.c const struct btf_var *v = (const void *)(t + 1); v 270 tools/bpf/bpftool/btf.c linkage = btf_var_linkage_str(v->linkage); v 281 tools/bpf/bpftool/btf.c const struct btf_var_secinfo *v = (const void *)(t+1); v 293 tools/bpf/bpftool/btf.c for (i = 0; i < vlen; i++, v++) { v 296 tools/bpf/bpftool/btf.c jsonw_uint_field(w, "type_id", v->type); v 297 tools/bpf/bpftool/btf.c jsonw_uint_field(w, "offset", v->offset); v 298 tools/bpf/bpftool/btf.c jsonw_uint_field(w, "size", v->size); v 302 tools/bpf/bpftool/btf.c v->type, v->offset, v->size); v 23 tools/include/asm-generic/atomic-gcc.h static inline int atomic_read(const atomic_t *v) v 25 tools/include/asm-generic/atomic-gcc.h return READ_ONCE((v)->counter); v 35 tools/include/asm-generic/atomic-gcc.h static inline void atomic_set(atomic_t *v, int i) v 37 tools/include/asm-generic/atomic-gcc.h v->counter = i; v 46 tools/include/asm-generic/atomic-gcc.h static inline void atomic_inc(atomic_t *v) v 48 tools/include/asm-generic/atomic-gcc.h __sync_add_and_fetch(&v->counter, 1); v 59 tools/include/asm-generic/atomic-gcc.h static inline int atomic_dec_and_test(atomic_t *v) v 61 tools/include/asm-generic/atomic-gcc.h return __sync_sub_and_fetch(&v->counter, 1) == 0; v 67 tools/include/asm-generic/atomic-gcc.h static inline int atomic_cmpxchg(atomic_t *v, int oldval, int newval) v 69 tools/include/asm-generic/atomic-gcc.h return cmpxchg(&(v)->counter, oldval, newval); v 51 tools/include/asm/barrier.h # define smp_store_release(p, v) \ v 54 tools/include/asm/barrier.h WRITE_ONCE(*p, v); \ v 22 tools/include/linux/rcu.h #define rcu_assign_pointer(p, v) do { (p) = (v); } while (0) v 23 tools/include/linux/rcu.h #define RCU_INIT_POINTER(p, v) do { (p) = (v); } while (0) v 104 tools/include/nolibc/nolibc.h #define SET_ERRNO(v) do { errno = (v); } while (0) v 106 tools/include/nolibc/nolibc.h #define SET_ERRNO(v) do { } while (0) v 576 tools/include/uapi/linux/pkt_cls.h #define TCF_EM_REL_VALID(v) (((v) & TCF_EM_REL_MASK) != TCF_EM_REL_MASK) v 298 tools/lib/bpf/btf_dump.c const struct btf_var_secinfo *v = btf_var_secinfos(t); v 300 tools/lib/bpf/btf_dump.c for (j = 0; j < vlen; j++, v++) v 301 tools/lib/bpf/btf_dump.c d->type_states[v->type].referenced = 1; v 932 tools/lib/bpf/btf_dump.c const struct btf_enum *v = btf_enum(t); v 944 tools/lib/bpf/btf_dump.c for (i = 0; i < vlen; i++, v++) { v 945 tools/lib/bpf/btf_dump.c name = btf_name_of(d, v->name_off); v 951 tools/lib/bpf/btf_dump.c (__s32)v->val); v 955 tools/lib/bpf/btf_dump.c (__s32)v->val); v 1388 tools/lib/bpf/libbpf.c const struct btf_var_secinfo *v = btf_var_secinfos(t); v 1402 tools/lib/bpf/libbpf.c for (j = 0; j < vlen; j++, v++, m++) { v 1404 tools/lib/bpf/libbpf.c m->offset = v->offset * 8; v 1405 tools/lib/bpf/libbpf.c m->type = v->type; v 1407 tools/lib/bpf/libbpf.c vt = (void *)btf__type_by_id(btf, v->type); v 118 tools/lib/subcmd/parse-options.h #define check_vtype(v, type) ( BUILD_BUG_ON_ZERO(!__builtin_types_compatible_p(typeof(v), type)) + v ) v 124 tools/lib/subcmd/parse-options.h #define OPT_BIT(s, l, v, h, b) { .type = OPTION_BIT, .short_name = (s), .long_name = (l), .value = check_vtype(v, int *), .help = (h), .defval = (b) } v 125 tools/lib/subcmd/parse-options.h #define OPT_BOOLEAN(s, l, v, h) { .type = OPTION_BOOLEAN, .short_name = (s), .long_name = (l), .value = check_vtype(v, bool *), .help = (h) } v 126 tools/lib/subcmd/parse-options.h #define OPT_BOOLEAN_FLAG(s, l, v, h, f) { .type = OPTION_BOOLEAN, .short_name = (s), .long_name = (l), .value = check_vtype(v, bool *), .help = (h), .flags = (f) } v 127 tools/lib/subcmd/parse-options.h #define OPT_BOOLEAN_SET(s, l, v, os, h) \ v 129 tools/lib/subcmd/parse-options.h .value = check_vtype(v, bool *), .help = (h), \ v 131 tools/lib/subcmd/parse-options.h #define OPT_INCR(s, l, v, h) { .type = OPTION_INCR, .short_name = (s), .long_name = (l), .value = check_vtype(v, int *), .help = (h) } v 132 tools/lib/subcmd/parse-options.h #define OPT_SET_UINT(s, l, v, h, i) { .type = OPTION_SET_UINT, .short_name = (s), .long_name = (l), .value = check_vtype(v, unsigned int *), .help = (h), .defval = (i) } v 133 tools/lib/subcmd/parse-options.h #define OPT_SET_PTR(s, l, v, h, p) { .type = OPTION_SET_PTR, .short_name = (s), .long_name = (l), .value = (v), .help = (h), .defval = (p) } v 134 tools/lib/subcmd/parse-options.h #define OPT_INTEGER(s, l, v, h) { .type = OPTION_INTEGER, .short_name = (s), .long_name = (l), .value = check_vtype(v, int *), .help = (h) } v 135 tools/lib/subcmd/parse-options.h #define OPT_UINTEGER(s, l, v, h) { .type = OPTION_UINTEGER, .short_name = (s), .long_name = (l), .value = check_vtype(v, unsigned int *), .help = (h) } v 136 tools/lib/subcmd/parse-options.h #define OPT_LONG(s, l, v, h) { .type = OPTION_LONG, .short_name = (s), .long_name = (l), .value = check_vtype(v, long *), .help = (h) } v 137 tools/lib/subcmd/parse-options.h #define OPT_ULONG(s, l, v, h) { .type = OPTION_ULONG, .short_name = (s), .long_name = (l), .value = check_vtype(v, unsigned long *), .help = (h) } v 138 tools/lib/subcmd/parse-options.h #define OPT_U64(s, l, v, h) { .type = OPTION_U64, .short_name = (s), .long_name = (l), .value = check_vtype(v, u64 *), .help = (h) } v 139 tools/lib/subcmd/parse-options.h #define OPT_STRING(s, l, v, a, h) { .type = OPTION_STRING, .short_name = (s), .long_name = (l), .value = check_vtype(v, const char **), .argh = (a), .help = (h) } v 140 tools/lib/subcmd/parse-options.h #define OPT_STRING_OPTARG(s, l, v, a, h, d) \ v 142 tools/lib/subcmd/parse-options.h .value = check_vtype(v, const char **), .argh =(a), .help = (h), \ v 144 tools/lib/subcmd/parse-options.h #define OPT_STRING_OPTARG_SET(s, l, v, os, a, h, d) \ v 146 tools/lib/subcmd/parse-options.h .value = check_vtype(v, const char **), .argh = (a), .help = (h), \ v 149 tools/lib/subcmd/parse-options.h #define OPT_STRING_NOEMPTY(s, l, v, a, h) { .type = OPTION_STRING, .short_name = (s), .long_name = (l), .value = check_vtype(v, const char **), .argh = (a), .help = (h), .flags = PARSE_OPT_NOEMPTY} v 150 tools/lib/subcmd/parse-options.h #define OPT_DATE(s, l, v, h) \ v 151 tools/lib/subcmd/parse-options.h { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = "time", .help = (h), .callback = parse_opt_approxidate_cb } v 152 tools/lib/subcmd/parse-options.h #define OPT_CALLBACK(s, l, v, a, h, f) \ v 153 tools/lib/subcmd/parse-options.h { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = (a), .help = (h), .callback = (f) } v 154 tools/lib/subcmd/parse-options.h #define OPT_CALLBACK_NOOPT(s, l, v, a, h, f) \ v 155 tools/lib/subcmd/parse-options.h { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = (a), .help = (h), .callback = (f), .flags = PARSE_OPT_NOARG } v 156 tools/lib/subcmd/parse-options.h #define OPT_CALLBACK_DEFAULT(s, l, v, a, h, f, d) \ v 157 tools/lib/subcmd/parse-options.h { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = (a), .help = (h), .callback = (f), .defval = (intptr_t)d, .flags = PARSE_OPT_LASTARG_DEFAULT } v 158 tools/lib/subcmd/parse-options.h #define OPT_CALLBACK_DEFAULT_NOOPT(s, l, v, a, h, f, d) \ v 160 tools/lib/subcmd/parse-options.h .value = (v), .arg = (a), .help = (h), .callback = (f), .defval = (intptr_t)d,\ v 162 tools/lib/subcmd/parse-options.h #define OPT_CALLBACK_OPTARG(s, l, v, d, a, h, f) \ v 164 tools/lib/subcmd/parse-options.h .value = (v), .argh = (a), .help = (h), .callback = (f), \ v 45 tools/lib/traceevent/plugins/plugin_mac80211.c unsigned long long v; v 46 tools/lib/traceevent/plugins/plugin_mac80211.c if (tep_read_number_field(f, data, &v)) { v 50 tools/lib/traceevent/plugins/plugin_mac80211.c offset = v & 0xffff; v 51 tools/lib/traceevent/plugins/plugin_mac80211.c length = v >> 16; v 167 tools/perf/tests/attr.c char v[] = "-vvvvv"; v 168 tools/perf/tests/attr.c int vcnt = min(verbose, (int) sizeof(v) - 1); v 175 tools/perf/tests/attr.c d, d, perf, vcnt, v); v 824 tools/perf/util/bpf-loader.c } v; v 1042 tools/perf/util/bpf-loader.c op->v.value = term->val.num; v 1102 tools/perf/util/bpf-loader.c op->v.evsel = evsel; v 1470 tools/perf/util/bpf-loader.c op->v.value); v 1474 tools/perf/util/bpf-loader.c op->v.evsel); v 1599 tools/perf/util/bpf-loader.c op->v.evsel = evsel; v 1359 tools/perf/util/callchain.c u64 cycles, v = 0; v 1369 tools/perf/util/callchain.c v = iter_count / from_count; v 1370 tools/perf/util/callchain.c if (v) { v 1372 tools/perf/util/callchain.c v, bf + printed, bfsize - printed); v 496 tools/perf/util/config.c const char *v = getenv(k); v 497 tools/perf/util/config.c return v ? perf_config_bool(k, v) : def; v 190 tools/perf/util/debug.c int v = 1; v 209 tools/perf/util/debug.c v = atoi(vstr); v 214 tools/perf/util/debug.c v = (v < 0) || (v > 10) ? 0 : v; v 218 tools/perf/util/debug.c v = -1; v 220 tools/perf/util/debug.c *var->ptr = v; v 1334 tools/perf/util/evsel.c struct sample_read_value *v; v 1348 tools/perf/util/evsel.c v = (struct sample_read_value *) data; v 1351 tools/perf/util/evsel.c v[0].value, ena, run); v 1356 tools/perf/util/evsel.c counter = perf_evlist__id2evsel(leader->evlist, v[i].id); v 1361 tools/perf/util/evsel.c v[i].value, ena, run); v 1154 tools/perf/util/header.c #define _W(v) \ v 1155 tools/perf/util/header.c ret = do_write(ff, &c->v, sizeof(u32)); \ v 1165 tools/perf/util/header.c #define _W(v) \ v 1166 tools/perf/util/header.c ret = do_write_string(ff, (const char *) c->v); \ v 1355 tools/perf/util/header.c #define _W(v) \ v 1356 tools/perf/util/header.c ret = do_write(ff, &n->v, sizeof(n->v)); \ v 2541 tools/perf/util/header.c #define _R(v) \ v 2542 tools/perf/util/header.c if (do_read_u32(ff, &c.v))\ v 2551 tools/perf/util/header.c #define _R(v) \ v 2552 tools/perf/util/header.c c.v = do_read_string(ff); \ v 2553 tools/perf/util/header.c if (!c.v) \ v 2619 tools/perf/util/header.c #define _R(v) \ v 2620 tools/perf/util/header.c if (do_read_u64(ff, &n.v)) \ v 932 tools/perf/util/pmu.c static void pmu_format_value(unsigned long *format, __u64 value, __u64 *v, v 943 tools/perf/util/pmu.c *v |= (1llu << fbit); v 945 tools/perf/util/pmu.c *v &= ~(1llu << fbit); v 1322 tools/perf/util/session.c struct sample_read_value *v, v 1325 tools/perf/util/session.c struct perf_sample_id *sid = perf_evlist__id2sid(evlist, v->id); v 1329 tools/perf/util/session.c sample->id = v->id; v 1330 tools/perf/util/session.c sample->period = v->value - sid->period; v 1331 tools/perf/util/session.c sid->period = v->value; v 91 tools/perf/util/stat-shadow.c struct saved_value *v; v 94 tools/perf/util/stat-shadow.c v = container_of(rb_node, struct saved_value, rb_node); v 95 tools/perf/util/stat-shadow.c free(v); v 198 tools/perf/util/stat-shadow.c struct saved_value *v = saved_value_lookup(NULL, cpu, true, v 201 tools/perf/util/stat-shadow.c if (v) v 202 tools/perf/util/stat-shadow.c update_stats(&v->stats, count); v 215 tools/perf/util/stat-shadow.c struct saved_value *v; v 270 tools/perf/util/stat-shadow.c v = saved_value_lookup(counter, cpu, true, STAT_NONE, 0, st); v 271 tools/perf/util/stat-shadow.c update_stats(&v->stats, count); v 273 tools/perf/util/stat-shadow.c v->metric_total += count; v 275 tools/perf/util/stat-shadow.c v = saved_value_lookup(counter->metric_leader, v 277 tools/perf/util/stat-shadow.c v->metric_total += count; v 278 tools/perf/util/stat-shadow.c v->metric_other++; v 402 tools/perf/util/stat-shadow.c struct saved_value *v; v 404 tools/perf/util/stat-shadow.c v = saved_value_lookup(NULL, cpu, false, type, ctx, st); v 405 tools/perf/util/stat-shadow.c if (!v) v 408 tools/perf/util/stat-shadow.c return avg_stats(&v->stats); v 414 tools/perf/util/stat-shadow.c struct saved_value *v; v 416 tools/perf/util/stat-shadow.c v = saved_value_lookup(NULL, cpu, false, type, ctx, st); v 417 tools/perf/util/stat-shadow.c if (!v) v 420 tools/perf/util/stat-shadow.c return v->stats.n; v 742 tools/perf/util/stat-shadow.c struct saved_value *v; v 750 tools/perf/util/stat-shadow.c v = saved_value_lookup(metric_events[i], cpu, false, v 752 tools/perf/util/stat-shadow.c if (!v) v 754 tools/perf/util/stat-shadow.c stats = &v->stats; v 757 tools/perf/util/stat-shadow.c if (v->metric_other) v 758 tools/perf/util/stat-shadow.c metric_total = v->metric_total; v 56 tools/perf/util/symbol-elf.c static inline char *bfd_demangle(void __maybe_unused *v, const char *c, int i) v 62 tools/perf/util/symbol-elf.c static inline char *bfd_demangle(void __maybe_unused *v, v 235 tools/perf/util/util.c size_t hex_width(u64 v) v 239 tools/perf/util/util.c while ((v >>= 4)) v 28 tools/perf/util/util.h size_t hex_width(u64 v); v 71 tools/power/cpupower/utils/helpers/bitmask.c static void _setbit(struct bitmask *bmp, unsigned int n, unsigned int v) v 74 tools/power/cpupower/utils/helpers/bitmask.c if (v) v 10 tools/testing/radix-tree/linux/rcupdate.h #define RCU_INIT_POINTER(p, v) do { (p) = (v); } while (0) v 26 tools/testing/selftests/bpf/bpf_util.h struct { type v; /* padding */ } __bpf_percpu_val_align \ v 28 tools/testing/selftests/bpf/bpf_util.h #define bpf_percpu(name, cpu) name[(cpu)].v v 62 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c int v = 0; v 93 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c v = 0xff; v 94 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c rv = bpf_setsockopt(skops, SOL_IPV6, IPV6_TCLASS, &v, v 95 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c sizeof(v)); v 97 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c v = bpf_getsockopt(skops, IPPROTO_TCP, TCP_SAVED_SYN, v 100 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c if (!v) { v 104 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c v = thdr->syn; v 107 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c bpf_map_update_elem(&sockopt_results, &key, &v, v 140 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c v = bpf_setsockopt(skops, IPPROTO_TCP, TCP_SAVE_SYN, v 145 tools/testing/selftests/bpf/progs/test_tcpbpf_kern.c bpf_map_update_elem(&sockopt_results, &key, &v, BPF_ANY); v 4647 tools/testing/selftests/bpf/test_btf.c struct pprint_mapv *v = mapv; v 4650 tools/testing/selftests/bpf/test_btf.c v->ui32 = i + cpu; v 4651 tools/testing/selftests/bpf/test_btf.c v->si32 = -i; v 4652 tools/testing/selftests/bpf/test_btf.c v->unused_bits2a = 3; v 4653 tools/testing/selftests/bpf/test_btf.c v->bits28 = i; v 4654 tools/testing/selftests/bpf/test_btf.c v->unused_bits2b = 3; v 4655 tools/testing/selftests/bpf/test_btf.c v->ui64 = i; v 4656 tools/testing/selftests/bpf/test_btf.c v->aenum = i & 0x03; v 4657 tools/testing/selftests/bpf/test_btf.c v->ui32b = 4; v 4658 tools/testing/selftests/bpf/test_btf.c v->bits2c = 1; v 4659 tools/testing/selftests/bpf/test_btf.c v->si8_4[0][0] = (cpu + i) & 0xff; v 4660 tools/testing/selftests/bpf/test_btf.c v->si8_4[0][1] = (cpu + i + 1) & 0xff; v 4661 tools/testing/selftests/bpf/test_btf.c v->si8_4[1][0] = (cpu + i + 2) & 0xff; v 4662 tools/testing/selftests/bpf/test_btf.c v->si8_4[1][1] = (cpu + i + 3) & 0xff; v 4663 tools/testing/selftests/bpf/test_btf.c v = (void *)v + rounded_value_size; v 4669 tools/testing/selftests/bpf/test_btf.c struct pprint_mapv_int128 *v = mapv; v 4672 tools/testing/selftests/bpf/test_btf.c v->si128a = i; v 4673 tools/testing/selftests/bpf/test_btf.c v->si128b = -i; v 4674 tools/testing/selftests/bpf/test_btf.c v->bits3 = i & 0x07; v 4675 tools/testing/selftests/bpf/test_btf.c v->bits80 = (((unsigned __int128)1) << 64) + i; v 4676 tools/testing/selftests/bpf/test_btf.c v->ui128 = (((unsigned __int128)2) << 64) + i; v 4677 tools/testing/selftests/bpf/test_btf.c v = (void *)v + rounded_value_size; v 4691 tools/testing/selftests/bpf/test_btf.c struct pprint_mapv *v = mapv; v 4699 tools/testing/selftests/bpf/test_btf.c v->ui32, v->si32, v 4700 tools/testing/selftests/bpf/test_btf.c v->unused_bits2a, v 4701 tools/testing/selftests/bpf/test_btf.c v->bits28, v 4702 tools/testing/selftests/bpf/test_btf.c v->unused_bits2b, v 4703 tools/testing/selftests/bpf/test_btf.c v->ui64, v 4704 tools/testing/selftests/bpf/test_btf.c v->ui8a[0], v->ui8a[1], v 4705 tools/testing/selftests/bpf/test_btf.c v->ui8a[2], v->ui8a[3], v 4706 tools/testing/selftests/bpf/test_btf.c v->ui8a[4], v->ui8a[5], v 4707 tools/testing/selftests/bpf/test_btf.c v->ui8a[6], v->ui8a[7], v 4708 tools/testing/selftests/bpf/test_btf.c pprint_enum_str[v->aenum], v 4709 tools/testing/selftests/bpf/test_btf.c v->ui32b, v 4710 tools/testing/selftests/bpf/test_btf.c v->bits2c, v 4711 tools/testing/selftests/bpf/test_btf.c v->si8_4[0][0], v->si8_4[0][1], v 4712 tools/testing/selftests/bpf/test_btf.c v->si8_4[1][0], v->si8_4[1][1]); v 4717 tools/testing/selftests/bpf/test_btf.c struct pprint_mapv_int128 *v = mapv; v 4724 tools/testing/selftests/bpf/test_btf.c (uint64_t)v->si128a, v 4725 tools/testing/selftests/bpf/test_btf.c (uint64_t)v->si128b, v 4726 tools/testing/selftests/bpf/test_btf.c (uint64_t)v->bits3, v 4727 tools/testing/selftests/bpf/test_btf.c (uint64_t)(v->bits80 >> 64), v 4728 tools/testing/selftests/bpf/test_btf.c (uint64_t)v->bits80, v 4729 tools/testing/selftests/bpf/test_btf.c (uint64_t)(v->ui128 >> 64), v 4730 tools/testing/selftests/bpf/test_btf.c (uint64_t)v->ui128); v 67 tools/testing/selftests/bpf/test_hashmap.c void *oldv, *v = (void *)(long)(1024 + i); v 69 tools/testing/selftests/bpf/test_hashmap.c err = hashmap__update(map, k, v, &oldk, &oldv); v 74 tools/testing/selftests/bpf/test_hashmap.c err = hashmap__add(map, k, v); v 76 tools/testing/selftests/bpf/test_hashmap.c err = hashmap__set(map, k, v, &oldk, &oldv); v 83 tools/testing/selftests/bpf/test_hashmap.c (long)k, (long)v, err)) v 89 tools/testing/selftests/bpf/test_hashmap.c if (CHECK(oldv != v, "found value is wrong: %ld\n", (long)oldv)) v 103 tools/testing/selftests/bpf/test_hashmap.c long v = (long)entry->value; v 106 tools/testing/selftests/bpf/test_hashmap.c if (CHECK(v - k != 1024, "invalid k/v pair: %ld = %ld\n", k, v)) v 115 tools/testing/selftests/bpf/test_hashmap.c void *oldv, *v = (void *)(long)(256 + i); v 117 tools/testing/selftests/bpf/test_hashmap.c err = hashmap__add(map, k, v); v 122 tools/testing/selftests/bpf/test_hashmap.c err = hashmap__update(map, k, v, &oldk, &oldv); v 124 tools/testing/selftests/bpf/test_hashmap.c err = hashmap__set(map, k, v, &oldk, &oldv); v 127 tools/testing/selftests/bpf/test_hashmap.c (long)k, (long)v, err)) v 132 tools/testing/selftests/bpf/test_hashmap.c if (CHECK(oldv != v, "found value is wrong: %ld\n", (long)oldv)) v 146 tools/testing/selftests/bpf/test_hashmap.c long v = (long)entry->value; v 149 tools/testing/selftests/bpf/test_hashmap.c if (CHECK(v - k != 256, v 150 tools/testing/selftests/bpf/test_hashmap.c "invalid updated k/v pair: %ld = %ld\n", k, v)) v 168 tools/testing/selftests/bpf/test_hashmap.c void *oldv, *v; v 171 tools/testing/selftests/bpf/test_hashmap.c v = entry->value; v 178 tools/testing/selftests/bpf/test_hashmap.c (long)k, (long)v)) v 180 tools/testing/selftests/bpf/test_hashmap.c if (CHECK(oldk != k || oldv != v, v 182 tools/testing/selftests/bpf/test_hashmap.c (long)k, (long)v, (long)oldk, (long)oldv)) v 203 tools/testing/selftests/bpf/test_hashmap.c void *oldv, *v; v 206 tools/testing/selftests/bpf/test_hashmap.c v = entry->value; v 213 tools/testing/selftests/bpf/test_hashmap.c (long)k, (long)v)) v 215 tools/testing/selftests/bpf/test_hashmap.c if (CHECK(oldk != k || oldv != v, v 217 tools/testing/selftests/bpf/test_hashmap.c (long)k, (long)v, (long)oldk, (long)oldv)) v 221 tools/testing/selftests/bpf/test_hashmap.c (long)k, (long)v)) v 177 tools/testing/selftests/bpf/test_select_reuseport.c static void write_int_sysctl(const char *sysctl, int v) v 186 tools/testing/selftests/bpf/test_select_reuseport.c size = snprintf(buf, sizeof(buf), "%d", v); v 19 tools/testing/selftests/kvm/lib/aarch64/processor.c static uint64_t page_align(struct kvm_vm *vm, uint64_t v) v 21 tools/testing/selftests/kvm/lib/aarch64/processor.c return (v + vm->page_size) & ~(vm->page_size - 1); v 69 tools/testing/selftests/powerpc/benchmarks/null_syscall.c unsigned long v; v 86 tools/testing/selftests/powerpc/benchmarks/null_syscall.c v = strtoull(p + 1, &end, 0); v 88 tools/testing/selftests/powerpc/benchmarks/null_syscall.c timebase_frequency = v; v 15 tools/testing/selftests/powerpc/include/reg.h #define mtspr(rn, v) asm volatile("mtspr " _str(rn) ",%0" : \ v 16 tools/testing/selftests/powerpc/include/reg.h : "r" ((unsigned long)(v)) \ v 49 tools/testing/selftests/powerpc/security/rfi_flush.c struct perf_event_read v; v 86 tools/testing/selftests/powerpc/security/rfi_flush.c FAIL_IF(read(fd, &v, sizeof(v)) != sizeof(v)); v 88 tools/testing/selftests/powerpc/security/rfi_flush.c if (rfi_flush && v.l1d_misses >= l1d_misses_expected) v 90 tools/testing/selftests/powerpc/security/rfi_flush.c else if (!rfi_flush && v.l1d_misses < (l1d_misses_expected / 2)) v 93 tools/testing/selftests/powerpc/security/rfi_flush.c l1d_misses_total += v.l1d_misses; v 17 tools/testing/selftests/rseq/basic_percpu_ops_test.c intptr_t v; v 56 tools/testing/selftests/rseq/basic_percpu_ops_test.c ret = rseq_cmpeqv_storev(&lock->c[cpu].v, v 72 tools/testing/selftests/rseq/basic_percpu_ops_test.c assert(lock->c[cpu].v == 1); v 77 tools/testing/selftests/rseq/basic_percpu_ops_test.c rseq_smp_store_release(&lock->c[cpu].v, 0); v 247 tools/testing/selftests/rseq/param_test.c intptr_t v; v 334 tools/testing/selftests/rseq/param_test.c ret = rseq_cmpeqv_storev(&lock->c[cpu].v, v 350 tools/testing/selftests/rseq/param_test.c assert(lock->c[cpu].v == 1); v 355 tools/testing/selftests/rseq/param_test.c rseq_smp_store_release(&lock->c[cpu].v, 0); v 76 tools/testing/selftests/rseq/rseq-arm.h #define rseq_smp_store_release(p, v) \ v 79 tools/testing/selftests/rseq/rseq-arm.h RSEQ_WRITE_ONCE(*p, v); \ v 153 tools/testing/selftests/rseq/rseq-arm.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 190 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 219 tools/testing/selftests/rseq/rseq-arm.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 261 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 291 tools/testing/selftests/rseq/rseq-arm.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 321 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 344 tools/testing/selftests/rseq/rseq-arm.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 390 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 419 tools/testing/selftests/rseq/rseq-arm.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 466 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 495 tools/testing/selftests/rseq/rseq-arm.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 546 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 577 tools/testing/selftests/rseq/rseq-arm.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 663 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 701 tools/testing/selftests/rseq/rseq-arm.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 788 tools/testing/selftests/rseq/rseq-arm.h [v] "m" (*v), v 58 tools/testing/selftests/rseq/rseq-arm64.h #define rseq_smp_store_release(p, v) \ v 64 tools/testing/selftests/rseq/rseq-arm64.h : "r" ((__u8)v) \ v 70 tools/testing/selftests/rseq/rseq-arm64.h : "r" ((__u16)v) \ v 76 tools/testing/selftests/rseq/rseq-arm64.h : "r" ((__u32)v) \ v 82 tools/testing/selftests/rseq/rseq-arm64.h : "r" ((__u64)v) \ v 208 tools/testing/selftests/rseq/rseq-arm64.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 222 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 226 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 228 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) v 235 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 261 tools/testing/selftests/rseq/rseq-arm64.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 276 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPNE(v, expectnot, %l[cmpfail]) v 280 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPNE(v, expectnot, %l[error2]) v 282 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_R_LOAD(v) v 285 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_R_FINAL_STORE(v, 3) v 292 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 318 tools/testing/selftests/rseq/rseq-arm64.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 333 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_R_LOAD(v) v 335 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_R_FINAL_STORE(v, 3) v 342 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 362 tools/testing/selftests/rseq/rseq-arm64.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 378 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 382 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 386 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) v 394 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 421 tools/testing/selftests/rseq/rseq-arm64.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 437 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 441 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 445 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_FINAL_STORE_RELEASE(newv, v, 3) v 453 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 480 tools/testing/selftests/rseq/rseq-arm64.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 497 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 503 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 506 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) v 513 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 543 tools/testing/selftests/rseq/rseq-arm64.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 559 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 563 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 567 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) v 575 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 603 tools/testing/selftests/rseq/rseq-arm64.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 619 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 623 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 627 tools/testing/selftests/rseq/rseq-arm64.h RSEQ_ASM_OP_FINAL_STORE_RELEASE(newv, v, 3) v 635 tools/testing/selftests/rseq/rseq-arm64.h [v] "Qo" (*v), v 57 tools/testing/selftests/rseq/rseq-mips.h #define rseq_smp_store_release(p, v) \ v 60 tools/testing/selftests/rseq/rseq-mips.h RSEQ_WRITE_ONCE(*p, v); \ v 160 tools/testing/selftests/rseq/rseq-mips.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 195 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 224 tools/testing/selftests/rseq/rseq-mips.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 264 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 294 tools/testing/selftests/rseq/rseq-mips.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 324 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 347 tools/testing/selftests/rseq/rseq-mips.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 391 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 420 tools/testing/selftests/rseq/rseq-mips.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 465 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 494 tools/testing/selftests/rseq/rseq-mips.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 541 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 572 tools/testing/selftests/rseq/rseq-mips.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 655 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 693 tools/testing/selftests/rseq/rseq-mips.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 777 tools/testing/selftests/rseq/rseq-mips.h [v] "m" (*v), v 33 tools/testing/selftests/rseq/rseq-ppc.h #define rseq_smp_store_release(p, v) \ v 36 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_WRITE_ONCE(*p, v); \ v 207 tools/testing/selftests/rseq/rseq-ppc.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 224 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 230 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 233 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) v 240 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 266 tools/testing/selftests/rseq/rseq-ppc.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 284 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPNE(v, expectnot, %l[cmpfail]) v 290 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPNE(v, expectnot, %l[error2]) v 293 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_R_LOAD(v) v 299 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_R_FINAL_STORE(v, 2) v 307 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 334 tools/testing/selftests/rseq/rseq-ppc.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 353 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_R_LOAD(v) v 357 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_R_FINAL_STORE(v, 2) v 365 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 386 tools/testing/selftests/rseq/rseq-ppc.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 405 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 411 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 417 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) v 428 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 454 tools/testing/selftests/rseq/rseq-ppc.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 473 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 479 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 487 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) v 498 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 524 tools/testing/selftests/rseq/rseq-ppc.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 544 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 553 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 558 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) v 569 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 597 tools/testing/selftests/rseq/rseq-ppc.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 620 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 626 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 632 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) v 641 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 671 tools/testing/selftests/rseq/rseq-ppc.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 694 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) v 700 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) v 708 tools/testing/selftests/rseq/rseq-ppc.h RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) v 717 tools/testing/selftests/rseq/rseq-ppc.h [v] "m" (*v), v 25 tools/testing/selftests/rseq/rseq-s390.h #define rseq_smp_store_release(p, v) \ v 28 tools/testing/selftests/rseq/rseq-s390.h RSEQ_WRITE_ONCE(*p, v); \ v 138 tools/testing/selftests/rseq/rseq-s390.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 170 tools/testing/selftests/rseq/rseq-s390.h [v] "m" (*v), v 200 tools/testing/selftests/rseq/rseq-s390.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 239 tools/testing/selftests/rseq/rseq-s390.h [v] "m" (*v), v 266 tools/testing/selftests/rseq/rseq-s390.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 294 tools/testing/selftests/rseq/rseq-s390.h [v] "m" (*v), v 315 tools/testing/selftests/rseq/rseq-s390.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 356 tools/testing/selftests/rseq/rseq-s390.h [v] "m" (*v), v 383 tools/testing/selftests/rseq/rseq-s390.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 387 tools/testing/selftests/rseq/rseq-s390.h return rseq_cmpeqv_trystorev_storev(v, expect, v2, newv2, newv, cpu); v 391 tools/testing/selftests/rseq/rseq-s390.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 435 tools/testing/selftests/rseq/rseq-s390.h [v] "m" (*v), v 463 tools/testing/selftests/rseq/rseq-s390.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 540 tools/testing/selftests/rseq/rseq-s390.h [v] "m" (*v), v 574 tools/testing/selftests/rseq/rseq-s390.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 578 tools/testing/selftests/rseq/rseq-s390.h return rseq_cmpeqv_trymemcpy_storev(v, expect, dst, src, len, v 9 tools/testing/selftests/rseq/rseq-skip.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 15 tools/testing/selftests/rseq/rseq-skip.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 22 tools/testing/selftests/rseq/rseq-skip.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 28 tools/testing/selftests/rseq/rseq-skip.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 36 tools/testing/selftests/rseq/rseq-skip.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 44 tools/testing/selftests/rseq/rseq-skip.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 52 tools/testing/selftests/rseq/rseq-skip.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 60 tools/testing/selftests/rseq/rseq-skip.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 45 tools/testing/selftests/rseq/rseq-x86.h #define rseq_smp_store_release(p, v) \ v 48 tools/testing/selftests/rseq/rseq-x86.h RSEQ_WRITE_ONCE(*p, v); \ v 114 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 145 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 174 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 212 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 238 tools/testing/selftests/rseq/rseq-x86.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 263 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 283 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 323 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 349 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 353 tools/testing/selftests/rseq/rseq-x86.h return rseq_cmpeqv_trystorev_storev(v, expect, v2, newv2, newv, cpu); v 357 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 400 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 427 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 503 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 536 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 540 tools/testing/selftests/rseq/rseq-x86.h return rseq_cmpeqv_trymemcpy_storev(v, expect, dst, src, len, v 564 tools/testing/selftests/rseq/rseq-x86.h #define rseq_smp_store_release(p, v) \ v 567 tools/testing/selftests/rseq/rseq-x86.h RSEQ_WRITE_ONCE(*p, v); \ v 635 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) v 666 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 695 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpnev_storeoffp_load(intptr_t *v, intptr_t expectnot, v 733 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 759 tools/testing/selftests/rseq/rseq-x86.h int rseq_addv(intptr_t *v, intptr_t count, int cpu) v 784 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 804 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trystorev_storev(intptr_t *v, intptr_t expect, v 845 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 870 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trystorev_storev_release(intptr_t *v, intptr_t expect, v 913 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 939 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_cmpeqv_storev(intptr_t *v, intptr_t expect, v 983 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 1011 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trymemcpy_storev(intptr_t *v, intptr_t expect, v 1090 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 1123 tools/testing/selftests/rseq/rseq-x86.h int rseq_cmpeqv_trymemcpy_storev_release(intptr_t *v, intptr_t expect, v 1203 tools/testing/selftests/rseq/rseq-x86.h [v] "m" (*v), v 54 tools/testing/selftests/rseq/rseq.h #define RSEQ_WRITE_ONCE(x, v) __extension__ ({ RSEQ_ACCESS_ONCE(x) = (v); }) v 53 tools/testing/selftests/vm/thuge-gen.c int ilog2(unsigned long v) v 56 tools/testing/selftests/vm/thuge-gen.c while ((1UL << l) < v) v 21 tools/testing/selftests/watchdog/watchdog-test.c const char v = 'V'; v 61 tools/testing/selftests/watchdog/watchdog-test.c int ret = write(fd, &v, 1); v 252 tools/testing/selftests/watchdog/watchdog-test.c ret = write(fd, &v, 1); v 85 tools/usb/usbip/libsrc/names.c struct vendor *v; v 87 tools/usb/usbip/libsrc/names.c v = vendors[hashnum(vendorid)]; v 88 tools/usb/usbip/libsrc/names.c for (; v; v = v->next) v 89 tools/usb/usbip/libsrc/names.c if (v->vendorid == vendorid) v 90 tools/usb/usbip/libsrc/names.c return v->name; v 190 tools/usb/usbip/libsrc/names.c struct vendor *v; v 193 tools/usb/usbip/libsrc/names.c v = vendors[h]; v 194 tools/usb/usbip/libsrc/names.c for (; v; v = v->next) v 195 tools/usb/usbip/libsrc/names.c if (v->vendorid == vendorid) v 197 tools/usb/usbip/libsrc/names.c v = my_malloc(sizeof(struct vendor) + strlen(name)); v 198 tools/usb/usbip/libsrc/names.c if (!v) v 200 tools/usb/usbip/libsrc/names.c strcpy(v->name, name); v 201 tools/usb/usbip/libsrc/names.c v->vendorid = vendorid; v 202 tools/usb/usbip/libsrc/names.c v->next = vendors[h]; v 203 tools/usb/usbip/libsrc/names.c vendors[h] = v; v 36 tools/virtio/ringtest/main.c unsigned long long v = 1; v 40 tools/virtio/ringtest/main.c r = write(fd, &v, sizeof v); v 41 tools/virtio/ringtest/main.c assert(r == sizeof v); v 47 tools/virtio/ringtest/main.c unsigned long long v = 1; v 51 tools/virtio/ringtest/main.c r = read(fd, &v, sizeof v); v 52 tools/virtio/ringtest/main.c assert(r == sizeof v); v 49 tools/virtio/virtio_test.c unsigned long long v = 1; v 51 tools/virtio/virtio_test.c r = write(info->kick, &v, sizeof v); v 52 tools/virtio/virtio_test.c assert(r == sizeof v); v 469 virt/kvm/arm/arm.c int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) v 471 virt/kvm/arm/arm.c bool irq_lines = *vcpu_hcr(v) & (HCR_VI | HCR_VF); v 472 virt/kvm/arm/arm.c return ((irq_lines || kvm_vgic_vcpu_pending_irq(v)) v 473 virt/kvm/arm/arm.c && !v->arch.power_off && !v->arch.pause); v 1410 virt/kvm/arm/arm.c void *v) v 15 virt/kvm/arm/hyp/vgic-v3-sr.c #define vtr_to_max_lr_idx(v) ((v) & 0xf) v 16 virt/kvm/arm/hyp/vgic-v3-sr.c #define vtr_to_nr_pre_bits(v) ((((u32)(v) >> 26) & 7) + 1) v 17 virt/kvm/arm/hyp/vgic-v3-sr.c #define vtr_to_nr_apr_regs(v) (1 << (vtr_to_nr_pre_bits(v) - 5)) v 111 virt/kvm/arm/vgic/vgic-debug.c static void *vgic_debug_next(struct seq_file *s, void *v, loff_t *pos) v 123 virt/kvm/arm/vgic/vgic-debug.c static void vgic_debug_stop(struct seq_file *s, void *v) v 132 virt/kvm/arm/vgic/vgic-debug.c if (IS_ERR(v)) v 218 virt/kvm/arm/vgic/vgic-debug.c static int vgic_debug_show(struct seq_file *s, void *v) v 221 virt/kvm/arm/vgic/vgic-debug.c struct vgic_state_iter *iter = (struct vgic_state_iter *)v; v 3769 virt/kvm/kvm_main.c void *v)