uint8_t           270 arch/arm/mach-davinci/board-da830-evm.c static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
uint8_t           271 arch/arm/mach-davinci/board-da830-evm.c static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
uint8_t           193 arch/arm/mach-ixp4xx/fsg-setup.c 	uint8_t __iomem *f;
uint8_t           279 arch/arm/mach-ixp4xx/nas100d-setup.c 	uint8_t __iomem *f;
uint8_t           260 arch/arm/mach-ixp4xx/nslu2-setup.c 	uint8_t __iomem *f;
uint8_t           156 arch/arm/mach-orion5x/ts78xx-setup.c 				     const uint8_t *buf, int len)
uint8_t           182 arch/arm/mach-orion5x/ts78xx-setup.c 				    uint8_t *buf, int len)
uint8_t           570 arch/arm/mach-pxa/balloon3.c 	uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0;
uint8_t           618 arch/arm/mach-pxa/corgi.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t           292 arch/arm/mach-pxa/eseries.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t           341 arch/arm/mach-pxa/poodle.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t           201 arch/arm/mach-pxa/spitz.c static void __maybe_unused spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr)
uint8_t           232 arch/arm/mach-pxa/spitz.c static inline void spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr) {}
uint8_t           748 arch/arm/mach-pxa/spitz.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t           683 arch/arm/mach-pxa/tosa.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t           619 arch/ia64/kernel/module.c do_reloc (struct module *mod, uint8_t r_type, Elf64_Sym *sym, uint64_t addend,
uint8_t            11 arch/mips/boot/tools/relocs_64.c typedef uint8_t Elf64_Byte;
uint8_t            39 arch/mips/cavium-octeon/executive/octeon-model.c static uint8_t __init cvmx_fuse_read_byte(int byte_addr)
uint8_t          2972 arch/mips/cavium-octeon/octeon-irq.c struct irq_domain *octeon_irq_get_block_domain(int node, uint8_t block)
uint8_t           225 arch/mips/cavium-octeon/octeon-usb.c static uint8_t clk_div[OCTEON_H_CLKDIV_SEL] = {1, 2, 4, 6, 8, 16, 24, 32};
uint8_t           191 arch/mips/include/asm/elf.h 	uint8_t isa_level;	/* The level of the ISA: 1-5, 32, 64 */
uint8_t           192 arch/mips/include/asm/elf.h 	uint8_t isa_rev;	/* The revision of ISA: 0 for MIPS V and below,
uint8_t           194 arch/mips/include/asm/elf.h 	uint8_t gpr_size;	/* The size of general purpose registers */
uint8_t           195 arch/mips/include/asm/elf.h 	uint8_t cpr1_size;	/* The size of co-processor 1 registers */
uint8_t           196 arch/mips/include/asm/elf.h 	uint8_t cpr2_size;	/* The size of co-processor 2 registers */
uint8_t           197 arch/mips/include/asm/elf.h 	uint8_t fp_abi;		/* The floating-point ABI */
uint8_t            17 arch/mips/include/asm/module.h typedef uint8_t Elf64_Byte;		/* Type for a 8-bit quantity.  */
uint8_t            86 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t board_rev_major;
uint8_t            87 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t board_rev_minor;
uint8_t            89 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t reserved2;
uint8_t            90 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t reserved3;
uint8_t            92 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t mac_addr_base[6];
uint8_t            93 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t mac_addr_count;
uint8_t           165 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t reserved3;
uint8_t           166 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t reserved2;
uint8_t           168 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t board_rev_minor;
uint8_t           169 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t board_rev_major;
uint8_t           173 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t mac_addr_base[6];
uint8_t           174 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t mac_addr_count;
uint8_t           175 arch/mips/include/asm/octeon/cvmx-bootinfo.h 	uint8_t pad[5];
uint8_t           130 arch/mips/include/asm/octeon/cvmx-cmd-queue.h 	uint8_t now_serving;
uint8_t          1874 arch/mips/include/asm/octeon/cvmx-pow.h 					 const uint8_t priority[])
uint8_t            51 arch/mips/include/asm/octeon/cvmx-scratch.h static inline uint8_t cvmx_scratch_read8(uint64_t address)
uint8_t            53 arch/mips/include/asm/octeon/cvmx-scratch.h 	return *CASTPTR(volatile uint8_t, CVMX_SCRATCH_BASE + address);
uint8_t           100 arch/mips/include/asm/octeon/cvmx-scratch.h 	*CASTPTR(volatile uint8_t, CVMX_SCRATCH_BASE + address) =
uint8_t           101 arch/mips/include/asm/octeon/cvmx-scratch.h 	    (uint8_t) value;
uint8_t            82 arch/mips/include/asm/octeon/cvmx-sysinfo.h 	uint8_t board_rev_major;
uint8_t            83 arch/mips/include/asm/octeon/cvmx-sysinfo.h 	uint8_t board_rev_minor;
uint8_t            84 arch/mips/include/asm/octeon/cvmx-sysinfo.h 	uint8_t mac_addr_base[6];
uint8_t            85 arch/mips/include/asm/octeon/cvmx-sysinfo.h 	uint8_t mac_addr_count;
uint8_t           111 arch/mips/include/asm/octeon/cvmx-sysinfo.h 	uint8_t console_uart_num;
uint8_t           415 arch/mips/include/asm/octeon/cvmx-wqe.h 		uint8_t unused;
uint8_t           425 arch/mips/include/asm/octeon/cvmx-wqe.h 		uint8_t unused;
uint8_t           587 arch/mips/include/asm/octeon/cvmx-wqe.h 	uint8_t packet_data[96];
uint8_t           100 arch/mips/include/asm/octeon/octeon.h 	uint8_t board_rev_major;
uint8_t           101 arch/mips/include/asm/octeon/octeon.h 	uint8_t board_rev_minor;
uint8_t           103 arch/mips/include/asm/octeon/octeon.h 	uint8_t chip_rev_major;
uint8_t           104 arch/mips/include/asm/octeon/octeon.h 	uint8_t chip_rev_minor;
uint8_t           106 arch/mips/include/asm/octeon/octeon.h 	uint8_t mac_addr_base[6];
uint8_t           107 arch/mips/include/asm/octeon/octeon.h 	uint8_t mac_addr_count;
uint8_t           153 arch/mips/include/asm/octeon/octeon.h 	uint8_t chip_rev_minor;
uint8_t           154 arch/mips/include/asm/octeon/octeon.h 	uint8_t chip_rev_major;
uint8_t           156 arch/mips/include/asm/octeon/octeon.h 	uint8_t board_rev_minor;
uint8_t           157 arch/mips/include/asm/octeon/octeon.h 	uint8_t board_rev_major;
uint8_t           364 arch/mips/include/asm/octeon/octeon.h struct irq_domain *octeon_irq_get_block_domain(int node, uint8_t block);
uint8_t            59 arch/mips/include/asm/vr41xx/pci.h 	uint8_t wait_time_limit_from_irdy_to_trdy;	/* Only VR4122 is supported */
uint8_t            65 arch/mips/include/asm/vr41xx/pci.h 	uint8_t master_latency_timer;
uint8_t            66 arch/mips/include/asm/vr41xx/pci.h 	uint8_t retry_limit;
uint8_t           256 arch/mips/mm/cerr-sb1.c static const uint8_t parity[256] = {
uint8_t           326 arch/mips/mm/cerr-sb1.c 	uint8_t lru;
uint8_t           381 arch/mips/mm/cerr-sb1.c 			uint8_t predecode;
uint8_t           423 arch/mips/mm/cerr-sb1.c static uint8_t dc_ecc(uint64_t dword)
uint8_t           427 arch/mips/mm/cerr-sb1.c 	uint8_t	 p;
uint8_t           481 arch/mips/mm/cerr-sb1.c 	uint8_t ecc, lru;
uint8_t           265 arch/mips/pci/pcie-octeon.c static uint8_t cvmx_pcie_config_read8(int pcie_port, int bus, int dev,
uint8_t           331 arch/mips/pci/pcie-octeon.c 				    int reg, uint8_t val)
uint8_t            83 arch/mips/sibyte/swarm/rtc_m41t81.c static int m41t81_read(uint8_t addr)
uint8_t           110 arch/mips/sibyte/swarm/rtc_m41t81.c static int m41t81_write(uint8_t addr, int b)
uint8_t            58 arch/mips/sibyte/swarm/rtc_xicor1241.c static int xicor_read(uint8_t addr)
uint8_t            86 arch/mips/sibyte/swarm/rtc_xicor1241.c static int xicor_write(uint8_t addr, int b)
uint8_t            98 arch/mips/vr41xx/common/icu.c static inline uint16_t icu1_set(uint8_t offset, uint16_t set)
uint8_t           109 arch/mips/vr41xx/common/icu.c static inline uint16_t icu1_clear(uint8_t offset, uint16_t clear)
uint8_t           120 arch/mips/vr41xx/common/icu.c static inline uint16_t icu2_set(uint8_t offset, uint16_t set)
uint8_t           131 arch/mips/vr41xx/common/icu.c static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear)
uint8_t            53 arch/parisc/kernel/perf.c 	uint8_t		num_words;
uint8_t            54 arch/parisc/kernel/perf.c 	uint8_t		write_control;
uint8_t           146 arch/powerpc/include/asm/asm-prototypes.h void tm_abort(uint8_t cause);
uint8_t            27 arch/powerpc/include/asm/hvsi.h 	uint8_t  type;
uint8_t            28 arch/powerpc/include/asm/hvsi.h 	uint8_t  len;
uint8_t            34 arch/powerpc/include/asm/hvsi.h 	uint8_t  data[HVSI_MAX_OUTGOING_DATA];
uint8_t            55 arch/powerpc/include/asm/hvsi.h 		uint8_t  version;
uint8_t            38 arch/powerpc/include/asm/io_event_irq.h 	uint8_t event_type;		/* 0x00 IO-Event Type		*/
uint8_t            39 arch/powerpc/include/asm/io_event_irq.h 	uint8_t rpc_data_len;		/* 0x01 RPC data length		*/
uint8_t            40 arch/powerpc/include/asm/io_event_irq.h 	uint8_t scope;			/* 0x02 Error/Event Scope	*/
uint8_t            41 arch/powerpc/include/asm/io_event_irq.h 	uint8_t event_subtype;		/* 0x03 I/O-Event Sub-Type	*/
uint8_t            43 arch/powerpc/include/asm/io_event_irq.h 	uint8_t rpc_data[PSERIES_IOEI_RPC_MAX_LEN];
uint8_t           481 arch/powerpc/include/asm/opal-api.h 	uint8_t version;
uint8_t           482 arch/powerpc/include/asm/opal-api.h 	uint8_t netfn;
uint8_t           483 arch/powerpc/include/asm/opal-api.h 	uint8_t cmd;
uint8_t           484 arch/powerpc/include/asm/opal-api.h 	uint8_t data[];
uint8_t           513 arch/powerpc/include/asm/opal-api.h 	uint8_t			reserved_1[4];	/* 0x04 */
uint8_t           519 arch/powerpc/include/asm/opal-api.h 			uint8_t				reserved_1[7];
uint8_t           526 arch/powerpc/include/asm/opal-api.h 			uint8_t				reserved_1[7];
uint8_t           612 arch/powerpc/include/asm/opal-api.h 	uint8_t		version;	/* 0x00 */
uint8_t           613 arch/powerpc/include/asm/opal-api.h 	uint8_t		severity;	/* 0x01 */
uint8_t           614 arch/powerpc/include/asm/opal-api.h 	uint8_t		type;		/* 0x02 */
uint8_t           615 arch/powerpc/include/asm/opal-api.h 	uint8_t		disposition;	/* 0x03 */
uint8_t           616 arch/powerpc/include/asm/opal-api.h 	uint8_t		reserved_1[4];	/* 0x04 */
uint8_t           629 arch/powerpc/include/asm/opal-api.h 			uint8_t	xstop_type;	/* enum OpalHMI_XstopType */
uint8_t           630 arch/powerpc/include/asm/opal-api.h 			uint8_t reserved_1[3];
uint8_t           687 arch/powerpc/include/asm/opal-api.h 			uint8_t biDownbound;	/* BI Downbound or Upbound */
uint8_t           693 arch/powerpc/include/asm/opal-api.h 			uint8_t ciPort;		/* Index of CI port: 0/1 */
uint8_t           945 arch/powerpc/include/asm/opal-api.h 	uint8_t		type;
uint8_t           946 arch/powerpc/include/asm/opal-api.h 	uint8_t		pad[1];
uint8_t          1005 arch/powerpc/include/asm/opal-api.h 	uint8_t	type;
uint8_t          1010 arch/powerpc/include/asm/opal-api.h 	uint8_t flags;
uint8_t          1012 arch/powerpc/include/asm/opal-api.h 	uint8_t	subaddr_sz;		/* Max 4 */
uint8_t          1013 arch/powerpc/include/asm/opal-api.h 	uint8_t reserved;
uint8_t            44 arch/powerpc/include/asm/opal.h 			   const uint8_t *buffer);
uint8_t            46 arch/powerpc/include/asm/opal.h 			  uint8_t *buffer);
uint8_t            69 arch/powerpc/include/asm/opal.h 				  uint64_t offset, uint8_t *data);
uint8_t            75 arch/powerpc/include/asm/opal.h 				   uint64_t offset, uint8_t data);
uint8_t            80 arch/powerpc/include/asm/opal.h int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
uint8_t            81 arch/powerpc/include/asm/opal.h int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
uint8_t            86 arch/powerpc/include/asm/opal.h 				   uint8_t *freeze_state,
uint8_t            95 arch/powerpc/include/asm/opal.h int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
uint8_t           114 arch/powerpc/include/asm/opal.h 			uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare,
uint8_t           115 arch/powerpc/include/asm/opal.h 			uint8_t pe_action);
uint8_t           117 arch/powerpc/include/asm/opal.h 			   uint8_t state);
uint8_t           122 arch/powerpc/include/asm/opal.h 				  uint8_t *p_bit, uint8_t *q_bit);
uint8_t           124 arch/powerpc/include/asm/opal.h 				  uint8_t p_bit, uint8_t q_bit);
uint8_t           131 arch/powerpc/include/asm/opal.h 			uint8_t msi_range, __be32 *msi_address,
uint8_t           134 arch/powerpc/include/asm/opal.h 			uint32_t xive_num, uint8_t msi_range,
uint8_t           137 arch/powerpc/include/asm/opal.h int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
uint8_t           145 arch/powerpc/include/asm/opal.h int64_t opal_pci_reset(uint64_t id, uint8_t reset_scope, uint8_t assert_state);
uint8_t           155 arch/powerpc/include/asm/opal.h int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
uint8_t           156 arch/powerpc/include/asm/opal.h int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
uint8_t           159 arch/powerpc/include/asm/opal.h int64_t opal_set_system_attention_led(uint8_t led_action);
uint8_t           182 arch/powerpc/include/asm/opal.h int64_t opal_manage_flash(uint8_t op);
uint8_t           184 arch/powerpc/include/asm/opal.h int64_t opal_dump_init(uint8_t dump_type);
uint8_t           237 arch/powerpc/include/asm/opal.h int64_t opal_int_set_cppr(uint8_t cppr);
uint8_t           239 arch/powerpc/include/asm/opal.h int64_t opal_int_set_mfrr(uint32_t cpu, uint8_t mfrr);
uint8_t           252 arch/powerpc/include/asm/opal.h 				 uint8_t *out_prio, __be32 *out_lirq);
uint8_t           253 arch/powerpc/include/asm/opal.h int64_t opal_xive_set_irq_config(uint32_t girq, uint64_t vp, uint8_t prio,
uint8_t            21 arch/powerpc/include/asm/pnv-pci.h extern int pnv_pci_get_presence_state(uint64_t id, uint8_t *state);
uint8_t            22 arch/powerpc/include/asm/pnv-pci.h extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state);
uint8_t            23 arch/powerpc/include/asm/pnv-pci.h extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
uint8_t            74 arch/powerpc/include/asm/pnv-pci.h 					uint8_t state);
uint8_t           153 arch/powerpc/include/asm/rtas.h 	uint8_t		byte0;			/* Architectural version */
uint8_t           156 arch/powerpc/include/asm/rtas.h 	uint8_t		byte1;
uint8_t           165 arch/powerpc/include/asm/rtas.h 	uint8_t		byte2;
uint8_t           170 arch/powerpc/include/asm/rtas.h 	uint8_t		byte3;			/* General event or error*/
uint8_t           176 arch/powerpc/include/asm/rtas.h static inline uint8_t rtas_error_severity(const struct rtas_error_log *elog)
uint8_t           181 arch/powerpc/include/asm/rtas.h static inline uint8_t rtas_error_disposition(const struct rtas_error_log *elog)
uint8_t           193 arch/powerpc/include/asm/rtas.h static inline uint8_t rtas_error_extended(const struct rtas_error_log *elog)
uint8_t           198 arch/powerpc/include/asm/rtas.h static inline uint8_t rtas_error_initiator(const struct rtas_error_log *elog)
uint8_t           220 arch/powerpc/include/asm/rtas.h 	uint8_t byte0;
uint8_t           233 arch/powerpc/include/asm/rtas.h 	uint8_t byte1;			/* reserved */
uint8_t           236 arch/powerpc/include/asm/rtas.h 	uint8_t byte2;
uint8_t           244 arch/powerpc/include/asm/rtas.h 	uint8_t byte3;			/* reserved */
uint8_t           246 arch/powerpc/include/asm/rtas.h 	uint8_t reserved[8];		/* reserved */
uint8_t           252 arch/powerpc/include/asm/rtas.h 	uint8_t vendor_log[1];		/* Start of vendor specific log	*/
uint8_t           257 arch/powerpc/include/asm/rtas.h inline uint8_t rtas_ext_event_log_format(struct rtas_ext_event_log_v6 *ext_log)
uint8_t           294 arch/powerpc/include/asm/rtas.h 	uint8_t version;		/* 0x04 Section version		*/
uint8_t           295 arch/powerpc/include/asm/rtas.h 	uint8_t subtype;		/* 0x05 Section subtype		*/
uint8_t           297 arch/powerpc/include/asm/rtas.h 	uint8_t data[];			/* 0x08 Start of section data	*/
uint8_t            14 arch/powerpc/include/asm/tm.h 		       uint8_t cause);
uint8_t            15 arch/powerpc/include/asm/tm.h extern void tm_reclaim_current(uint8_t cause);
uint8_t           829 arch/powerpc/kernel/process.c static void tm_reclaim_thread(struct thread_struct *thr, uint8_t cause)
uint8_t           873 arch/powerpc/kernel/process.c void tm_reclaim_current(uint8_t cause)
uint8_t          1039 arch/powerpc/kernel/rtas.c 	uint8_t log_format = rtas_ext_event_log_format(ext_log);
uint8_t           167 arch/powerpc/kvm/book3s_xive.h 	uint8_t			cppr;	/* guest CPPR */
uint8_t           168 arch/powerpc/kvm/book3s_xive.h 	uint8_t			hw_cppr;/* Hardware CPPR */
uint8_t           169 arch/powerpc/kvm/book3s_xive.h 	uint8_t			mfrr;
uint8_t           170 arch/powerpc/kvm/book3s_xive.h 	uint8_t			pending;
uint8_t           134 arch/powerpc/perf/hv-gpci.c 	uint8_t bytes[HGPCI_MAX_DATA_BYTES];
uint8_t           286 arch/powerpc/platforms/512x/clock-commonclk.c static inline int get_bit_field(uint32_t __iomem *reg, uint8_t pos, uint8_t len)
uint8_t           904 arch/powerpc/platforms/powernv/eeh-powernv.c 	uint8_t scope;
uint8_t           115 arch/powerpc/platforms/powernv/opal-dump.c static int64_t dump_fips_init(uint8_t type)
uint8_t           225 arch/powerpc/platforms/powernv/opal-flash.c static inline void opal_flash_manage(uint8_t op)
uint8_t           256 arch/powerpc/platforms/powernv/opal-flash.c 	uint8_t op;
uint8_t           143 arch/powerpc/platforms/powernv/opal-hmi.c 	uint8_t reason, reason_count, i;
uint8_t           180 arch/powerpc/platforms/powernv/opal-hmi.c 	uint8_t type = hmi_evt->u.xstop_error.xstop_type;
uint8_t           270 arch/powerpc/platforms/powernv/opal-hmi.c 	uint8_t disposition;
uint8_t           682 arch/powerpc/platforms/powernv/pci-ioda.c 	uint8_t op = is_add ? OPAL_ADD_PE_TO_DOMAIN :
uint8_t           783 arch/powerpc/platforms/powernv/pci-ioda.c 	uint8_t bcomp, dcomp, fcomp;
uint8_t           866 arch/powerpc/platforms/powernv/pci-ioda.c 	uint8_t bcomp, dcomp, fcomp;
uint8_t            92 arch/powerpc/platforms/powernv/pci.c int pnv_pci_get_presence_state(uint64_t id, uint8_t *state)
uint8_t           107 arch/powerpc/platforms/powernv/pci.c int pnv_pci_get_power_state(uint64_t id, uint8_t *state)
uint8_t           122 arch/powerpc/platforms/powernv/pci.c int pnv_pci_set_power_state(uint64_t id, uint8_t state, struct opal_msg *msg)
uint8_t           313 arch/powerpc/platforms/powernv/setup.c 		uint8_t status;
uint8_t            70 arch/powerpc/platforms/powernv/smp.c 	uint8_t status;
uint8_t           390 arch/powerpc/platforms/ps3/os-area.c        uint8_t owner:5;
uint8_t           391 arch/powerpc/platforms/ps3/os-area.c        uint8_t key:3;
uint8_t           193 arch/powerpc/platforms/pseries/papr_scm.c 			*(uint8_t *)(hdr->out_buf + data_offset) = (data[0] & 0xff);
uint8_t           232 arch/powerpc/platforms/pseries/papr_scm.c 			data_be = *(uint8_t *)(hdr->in_buf + data_offset);
uint8_t            57 arch/s390/kvm/intercept.c 	uint8_t flags, stop_pending;
uint8_t          1792 arch/s390/kvm/kvm-s390.c 	uint8_t *keys;
uint8_t          1807 arch/s390/kvm/kvm-s390.c 	keys = kvmalloc_array(args->count, sizeof(uint8_t), GFP_KERNEL);
uint8_t          1828 arch/s390/kvm/kvm-s390.c 		r = copy_to_user((uint8_t __user *)args->skeydata_addr, keys,
uint8_t          1829 arch/s390/kvm/kvm-s390.c 				 sizeof(uint8_t) * args->count);
uint8_t          1840 arch/s390/kvm/kvm-s390.c 	uint8_t *keys;
uint8_t          1852 arch/s390/kvm/kvm-s390.c 	keys = kvmalloc_array(args->count, sizeof(uint8_t), GFP_KERNEL);
uint8_t          1856 arch/s390/kvm/kvm-s390.c 	r = copy_from_user(keys, (uint8_t __user *)args->skeydata_addr,
uint8_t          1857 arch/s390/kvm/kvm-s390.c 			   sizeof(uint8_t) * args->count);
uint8_t          2112 arch/s390/kvm/kvm-s390.c 	uint8_t *bits;
uint8_t           616 arch/s390/kvm/priv.c 	uint8_t fc;
uint8_t            25 arch/s390/purgatory/purgatory.c 		sha256_update(&sctx, (uint8_t *)(ptr->start), ptr->len);
uint8_t           108 arch/um/drivers/vector_kern.h 	int (*form_header)(uint8_t *header,
uint8_t           110 arch/um/drivers/vector_kern.h 	int (*verify_header)(uint8_t *header,
uint8_t            66 arch/um/drivers/vector_transports.c static int l2tpv3_form_header(uint8_t *header,
uint8_t            96 arch/um/drivers/vector_transports.c static int gre_form_header(uint8_t *header,
uint8_t           114 arch/um/drivers/vector_transports.c static int raw_form_header(uint8_t *header,
uint8_t           131 arch/um/drivers/vector_transports.c 	uint8_t *header, struct sk_buff *skb, struct vector_private *vp)
uint8_t           166 arch/um/drivers/vector_transports.c 	uint8_t *header, struct sk_buff *skb, struct vector_private *vp)
uint8_t           197 arch/um/drivers/vector_transports.c 	uint8_t *header, struct sk_buff *skb, struct vector_private *vp)
uint8_t           782 arch/x86/crypto/camellia_glue.c 	y = camellia_sp11101110[(uint8_t)ii];				\
uint8_t           783 arch/x86/crypto/camellia_glue.c 	y ^= camellia_sp44044404[(uint8_t)(ii >> 8)];			\
uint8_t           785 arch/x86/crypto/camellia_glue.c 	y ^= camellia_sp30333033[(uint8_t)ii];				\
uint8_t           786 arch/x86/crypto/camellia_glue.c 	y ^= camellia_sp02220222[(uint8_t)(ii >> 8)];			\
uint8_t           788 arch/x86/crypto/camellia_glue.c 	y ^= camellia_sp00444404[(uint8_t)ii];				\
uint8_t           789 arch/x86/crypto/camellia_glue.c 	y ^= camellia_sp03303033[(uint8_t)(ii >> 8)];			\
uint8_t           791 arch/x86/crypto/camellia_glue.c 	y ^= camellia_sp22000222[(uint8_t)ii];				\
uint8_t           792 arch/x86/crypto/camellia_glue.c 	y ^= camellia_sp10011110[(uint8_t)(ii >> 8)];			\
uint8_t            28 arch/x86/include/asm/olpc.h static inline uint32_t olpc_board(uint8_t id)
uint8_t            33 arch/x86/include/asm/olpc.h static inline uint32_t olpc_board_pre(uint8_t id)
uint8_t           159 arch/x86/include/asm/pci.h 	uint8_t romdata[0];
uint8_t           456 arch/x86/include/asm/pgtable_types.h extern uint8_t __pte2cachemode_tbl[8];
uint8_t           142 arch/x86/include/asm/xen/interface.h     uint8_t       vector;  /* exception vector                              */
uint8_t           143 arch/x86/include/asm/xen/interface.h     uint8_t       flags;   /* 0-3: privilege level; 4: clear event enable?  */
uint8_t           310 arch/x86/include/asm/xen/interface.h 	uint8_t cpl;
uint8_t           311 arch/x86/include/asm/xen/interface.h 	uint8_t pad[3];
uint8_t           340 arch/x86/include/asm/xen/interface.h 		uint8_t pad[XENPMU_REGS_PAD_SZ];
uint8_t           372 arch/x86/include/asm/xen/interface.h 		uint8_t pad[XENPMU_CTXT_PAD_SZ];
uint8_t            61 arch/x86/include/asm/xen/interface_32.h     uint8_t  saved_upcall_mask;
uint8_t            62 arch/x86/include/asm/xen/interface_32.h     uint8_t  _pad0;
uint8_t           119 arch/x86/include/asm/xen/interface_64.h     uint8_t  saved_upcall_mask;
uint8_t           120 arch/x86/include/asm/xen/interface_64.h     uint8_t  _pad1[3];
uint8_t           348 arch/x86/kernel/tboot.c static uint8_t tboot_log_uuid[16] = TBOOT_LOG_UUID;
uint8_t          1894 arch/x86/kvm/svm.c 	uint8_t *page_virtual;
uint8_t            62 arch/x86/mm/init.c uint8_t __pte2cachemode_tbl[8] = {
uint8_t           127 arch/x86/mm/mpx.c 	uint8_t bndregno;
uint8_t           247 arch/x86/pci/olpc.c 		*value = *(uint8_t *)addr;
uint8_t            49 arch/x86/purgatory/purgatory.c 		sha256_update(&sctx, (uint8_t *)(ptr->start), ptr->len);
uint8_t            23 arch/x86/xen/pmu.c 	uint8_t flags;
uint8_t           197 arch/x86/xen/pmu.c 	uint8_t xenpmu_flags = get_xenpmu_flags();
uint8_t           259 arch/x86/xen/pmu.c 	uint8_t xenpmu_flags = get_xenpmu_flags();
uint8_t           342 arch/x86/xen/pmu.c 	uint8_t xenpmu_flags = get_xenpmu_flags();
uint8_t           363 arch/x86/xen/pmu.c 	uint8_t xenpmu_flags = get_xenpmu_flags();
uint8_t           490 arch/x86/xen/pmu.c 	uint8_t xenpmu_flags = get_xenpmu_flags();
uint8_t            29 crypto/aegis128-neon-inner.c extern const uint8_t crypto_aes_sbox[];
uint8_t            58 crypto/aegis128-neon-inner.c 		static const uint8_t shift_rows[] = {
uint8_t            62 crypto/aegis128-neon-inner.c 		static const uint8_t ror32by8[] = {
uint8_t           168 crypto/aegis128-neon-inner.c 		uint8_t buf[AEGIS_BLOCK_SIZE] = {};
uint8_t           200 crypto/aegis128-neon-inner.c 		uint8_t buf[AEGIS_BLOCK_SIZE];
uint8_t           334 crypto/asymmetric_keys/asym_tpm.c static inline uint8_t *encode_tag_length(uint8_t *buf, uint8_t tag,
uint8_t           355 crypto/asymmetric_keys/asym_tpm.c static uint32_t derive_pub_key(const void *pub_key, uint32_t len, uint8_t *buf)
uint8_t           357 crypto/asymmetric_keys/asym_tpm.c 	uint8_t *cur = buf;
uint8_t           360 crypto/asymmetric_keys/asym_tpm.c 	uint8_t e[3] = { 0x01, 0x00, 0x01 };
uint8_t           415 crypto/asymmetric_keys/asym_tpm.c 	uint8_t der_pub_key[PUB_KEY_BUF_SIZE];
uint8_t           468 crypto/asymmetric_keys/asym_tpm.c 	uint8_t der_pub_key[PUB_KEY_BUF_SIZE];
uint8_t           525 crypto/asymmetric_keys/asym_tpm.c 	uint8_t srkauth[SHA1_DIGEST_SIZE];
uint8_t           526 crypto/asymmetric_keys/asym_tpm.c 	uint8_t keyauth[SHA1_DIGEST_SIZE];
uint8_t           649 crypto/asymmetric_keys/asym_tpm.c 	uint8_t srkauth[SHA1_DIGEST_SIZE];
uint8_t           650 crypto/asymmetric_keys/asym_tpm.c 	uint8_t keyauth[SHA1_DIGEST_SIZE];
uint8_t           757 crypto/asymmetric_keys/asym_tpm.c 	uint8_t der_pub_key[PUB_KEY_BUF_SIZE];
uint8_t           102 crypto/rsa-pkcs1pad.c 	uint8_t *in_buf, *out_buf;
uint8_t          1197 drivers/atm/solos-pci.c 	uint8_t major_ver, minor_ver;
uint8_t            66 drivers/auxdisplay/ht16k33.c 	uint8_t *buffer;
uint8_t            67 drivers/auxdisplay/ht16k33.c 	uint8_t *cache;
uint8_t           106 drivers/auxdisplay/ht16k33.c 	uint8_t data = REG_DISPLAY_SETUP | REG_DISPLAY_SETUP_ON;
uint8_t           134 drivers/auxdisplay/ht16k33.c 	uint8_t *p1, *p2;
uint8_t           172 drivers/auxdisplay/ht16k33.c 	uint8_t byte;
uint8_t           174 drivers/auxdisplay/ht16k33.c 	uint8_t data[HT16K33_MATRIX_LED_MAX_COLS * 2];
uint8_t           211 drivers/block/skd_s1120.h 	uint8_t protocol_id;
uint8_t           212 drivers/block/skd_s1120.h 	uint8_t num_protocol_cmds_coalesced;
uint8_t           213 drivers/block/skd_s1120.h 	uint8_t _reserved[62];
uint8_t           249 drivers/block/skd_s1120.h 	uint8_t		status;  /* SCSI status */
uint8_t           250 drivers/block/skd_s1120.h 	uint8_t		cycle;
uint8_t           256 drivers/block/skd_s1120.h 	uint8_t		type:7; /* 00: Bits0-6 indicates the type of sense data. */
uint8_t           257 drivers/block/skd_s1120.h 	uint8_t		valid:1; /* 00: Bit 7 := 1 ==> info field is valid. */
uint8_t           258 drivers/block/skd_s1120.h 	uint8_t		reserved0; /* 01: Obsolete field */
uint8_t           259 drivers/block/skd_s1120.h 	uint8_t		key:4; /* 02: Bits0-3 indicate the sense key. */
uint8_t           260 drivers/block/skd_s1120.h 	uint8_t		reserved2:1; /* 02: Reserved bit. */
uint8_t           261 drivers/block/skd_s1120.h 	uint8_t		bad_length:1; /* 02: Incorrect Length Indicator */
uint8_t           262 drivers/block/skd_s1120.h 	uint8_t		end_medium:1; /* 02: End of Medium */
uint8_t           263 drivers/block/skd_s1120.h 	uint8_t		file_mark:1; /* 02: Filemark */
uint8_t           264 drivers/block/skd_s1120.h 	uint8_t		info[4]; /* 03: */
uint8_t           265 drivers/block/skd_s1120.h 	uint8_t		reserved1; /* 07: Additional Sense Length */
uint8_t           266 drivers/block/skd_s1120.h 	uint8_t		cmd_spec[4]; /* 08: Command Specific Information */
uint8_t           267 drivers/block/skd_s1120.h 	uint8_t		code; /* 0C: Additional Sense Code */
uint8_t           268 drivers/block/skd_s1120.h 	uint8_t		qual; /* 0D: Additional Sense Code Qualifier */
uint8_t           269 drivers/block/skd_s1120.h 	uint8_t		fruc; /* 0E: Field Replaceable Unit Code */
uint8_t           270 drivers/block/skd_s1120.h 	uint8_t		sks_high:7; /* 0F: Sense Key Specific (MSB) */
uint8_t           271 drivers/block/skd_s1120.h 	uint8_t		sks_valid:1; /* 0F: Sense Key Specific Valid */
uint8_t           276 drivers/block/skd_s1120.h 	uint8_t		reserved4[2]; /* 1E: Additional Sense Bytes (unused) */
uint8_t           291 drivers/block/skd_s1120.h 	uint8_t		attribute;
uint8_t           292 drivers/block/skd_s1120.h 	uint8_t		add_cdb_len;     /* In 32 bit words */
uint8_t           303 drivers/block/skd_s1120.h 	uint8_t		peripheral_device_type:5;
uint8_t           304 drivers/block/skd_s1120.h 	uint8_t		qualifier:3;
uint8_t           305 drivers/block/skd_s1120.h 	uint8_t		page_code;
uint8_t           308 drivers/block/skd_s1120.h 	uint8_t		pcie_device_number;
uint8_t           309 drivers/block/skd_s1120.h 	uint8_t		pcie_function_number;
uint8_t           310 drivers/block/skd_s1120.h 	uint8_t		pcie_link_speed;
uint8_t           311 drivers/block/skd_s1120.h 	uint8_t		pcie_link_lanes;
uint8_t           316 drivers/block/skd_s1120.h 	uint8_t		reserved1[2];
uint8_t           317 drivers/block/skd_s1120.h 	uint8_t		reserved2[3];
uint8_t           318 drivers/block/skd_s1120.h 	uint8_t		driver_version_length;
uint8_t           319 drivers/block/skd_s1120.h 	uint8_t		driver_version[0x14];
uint8_t           977 drivers/block/xen-blkback/blkback.c 		uint8_t first_sect, last_sect;
uint8_t            82 drivers/block/xen-blkback/common.h 	uint8_t        nr_segments;  /* number of segments                   */
uint8_t            90 drivers/block/xen-blkback/common.h 	uint8_t        flag;         /* BLKIF_DISCARD_SECURE or zero         */
uint8_t            98 drivers/block/xen-blkback/common.h 	uint8_t        _pad1;
uint8_t           104 drivers/block/xen-blkback/common.h 	uint8_t        indirect_op;
uint8_t           122 drivers/block/xen-blkback/common.h 	uint8_t        operation;    /* BLKIF_OP_???                         */
uint8_t           134 drivers/block/xen-blkback/common.h 	uint8_t        nr_segments;  /* number of segments                   */
uint8_t           143 drivers/block/xen-blkback/common.h 	uint8_t        flag;         /* BLKIF_DISCARD_SECURE or zero         */
uint8_t           152 drivers/block/xen-blkback/common.h 	uint8_t        _pad1;
uint8_t           159 drivers/block/xen-blkback/common.h 	uint8_t        indirect_op;
uint8_t           178 drivers/block/xen-blkback/common.h 	uint8_t        operation;    /* BLKIF_OP_???                         */
uint8_t           381 drivers/bluetooth/btqca.c int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
uint8_t            74 drivers/bluetooth/btqca.h 	uint8_t user_baud_rate;
uint8_t           134 drivers/bluetooth/btqca.h int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
uint8_t           151 drivers/bluetooth/btqca.h static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
uint8_t           147 drivers/bluetooth/hci_ath.c static int ath_vendor_cmd(struct hci_dev *hdev, uint8_t opcode, uint16_t index,
uint8_t           962 drivers/bluetooth/hci_qca.c static uint8_t qca_get_baudrate_value(int speed)
uint8_t           998 drivers/bluetooth/hci_qca.c static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
uint8_t           192 drivers/clk/clk-si570.c 	static const uint8_t si570_hs_div_values[] = { 11, 9, 7, 6, 5, 4 };
uint8_t           222 drivers/clk/mediatek/clk-mtk.h 	uint8_t tuner_en_bit;
uint8_t           531 drivers/crypto/amcc/crypto4xx_alg.c 	uint8_t src[16] = { 0 };
uint8_t           666 drivers/crypto/caam/ctrl.c 			   ((__force uint8_t *)ctrl +
uint8_t           670 drivers/crypto/caam/ctrl.c 			 ((__force uint8_t *)ctrl +
uint8_t           744 drivers/crypto/caam/ctrl.c 			       ((__force uint8_t *)ctrl +
uint8_t           769 drivers/crypto/caam/ctrl.c 					     ((__force uint8_t *)ctrl +
uint8_t            35 drivers/crypto/mxs-dcp.c static const uint8_t sha1_null_hash[] =
uint8_t            39 drivers/crypto/mxs-dcp.c static const uint8_t sha256_null_hash[] =
uint8_t            59 drivers/crypto/mxs-dcp.c 	uint8_t			aes_in_buf[DCP_BUF_SZ];
uint8_t            60 drivers/crypto/mxs-dcp.c 	uint8_t			aes_out_buf[DCP_BUF_SZ];
uint8_t            61 drivers/crypto/mxs-dcp.c 	uint8_t			sha_in_buf[DCP_BUF_SZ];
uint8_t            62 drivers/crypto/mxs-dcp.c 	uint8_t			sha_out_buf[DCP_SHA_PAY_SZ];
uint8_t            64 drivers/crypto/mxs-dcp.c 	uint8_t			aes_key[2 * AES_KEYSIZE_128];
uint8_t           102 drivers/crypto/mxs-dcp.c 	uint8_t				key[AES_KEYSIZE_128];
uint8_t           287 drivers/crypto/mxs-dcp.c 	uint8_t *in_buf = sdcp->coh->aes_in_buf;
uint8_t           288 drivers/crypto/mxs-dcp.c 	uint8_t *out_buf = sdcp->coh->aes_out_buf;
uint8_t           290 drivers/crypto/mxs-dcp.c 	uint8_t *out_tmp, *src_buf, *dst_buf = NULL;
uint8_t           294 drivers/crypto/mxs-dcp.c 	uint8_t *key = sdcp->coh->aes_key;
uint8_t           588 drivers/crypto/mxs-dcp.c 		const uint8_t *sha_buf =
uint8_t           626 drivers/crypto/mxs-dcp.c 	uint8_t *in_buf = sdcp->coh->sha_in_buf;
uint8_t           627 drivers/crypto/mxs-dcp.c 	uint8_t *out_buf = sdcp->coh->sha_out_buf;
uint8_t            75 drivers/crypto/padlock-aes.c aes_hw_extkey_available(uint8_t key_len)
uint8_t           106 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t revid;
uint8_t           107 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t sku;
uint8_t           189 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t tx_rx_gap;
uint8_t           190 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t num_banks;
uint8_t           191 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t num_accel;
uint8_t           192 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t num_logical_accel;
uint8_t           193 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t num_engines;
uint8_t           194 drivers/crypto/qat/qat_common/adf_accel_devices.h 	uint8_t min_iov_compat_ver;
uint8_t           251 drivers/crypto/qat/qat_common/adf_accel_devices.h 			uint8_t compatible;
uint8_t           252 drivers/crypto/qat/qat_common/adf_accel_devices.h 			uint8_t pf_version;
uint8_t            86 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t num_ae;
uint8_t            87 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t num_accel;
uint8_t            88 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t num_logical_accel;
uint8_t            89 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t banks_per_accel;
uint8_t            90 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t state;
uint8_t            91 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t bus;
uint8_t            92 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t dev;
uint8_t            93 drivers/crypto/qat/qat_common/adf_cfg_common.h 	uint8_t fun;
uint8_t            80 drivers/crypto/qat/qat_common/adf_cfg_user.h 	uint8_t device_id;
uint8_t            68 drivers/crypto/qat/qat_common/adf_transport_internal.h 	uint8_t ring_number;
uint8_t            69 drivers/crypto/qat/qat_common/adf_transport_internal.h 	uint8_t ring_size;
uint8_t            70 drivers/crypto/qat/qat_common/adf_transport_internal.h 	uint8_t msg_size;
uint8_t            71 drivers/crypto/qat/qat_common/adf_transport_internal.h 	uint8_t reserved;
uint8_t            94 drivers/crypto/qat/qat_common/icp_qat_fw.h 			uint8_t content_desc_params_sz;
uint8_t            95 drivers/crypto/qat/qat_common/icp_qat_fw.h 			uint8_t content_desc_hdr_resrvd2;
uint8_t           117 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t resrvd1;
uint8_t           118 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t service_cmd_id;
uint8_t           119 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t service_type;
uint8_t           120 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t hdr_flags;
uint8_t           138 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t xlat_err_code;
uint8_t           139 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t cmp_err_code;
uint8_t           143 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t resrvd1;
uint8_t           144 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t service_id;
uint8_t           145 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t response_type;
uint8_t           146 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t hdr_flags;
uint8_t           148 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t comn_status;
uint8_t           149 drivers/crypto/qat/qat_common/icp_qat_fw.h 	uint8_t cmd_id;
uint8_t            71 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 	uint8_t resrvd1;
uint8_t            72 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 	uint8_t init_admin_cmd_id;
uint8_t            80 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 	uint8_t flags;
uint8_t            81 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 	uint8_t resrvd1;
uint8_t            82 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 	uint8_t status;
uint8_t            83 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 	uint8_t init_admin_cmd_id;
uint8_t            91 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 			uint8_t context_id;
uint8_t            92 drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h 			uint8_t ae_id;
uint8_t           231 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 			uint8_t content_desc_params_sz;
uint8_t           232 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 			uint8_t content_desc_hdr_resrvd2;
uint8_t           246 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 			uint8_t content_desc_params_sz;
uint8_t           247 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 			uint8_t content_desc_hdr_resrvd2;
uint8_t           257 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_state_sz;
uint8_t           258 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_key_sz;
uint8_t           259 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_cfg_offset;
uint8_t           260 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t next_curr_id;
uint8_t           261 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_padding_sz;
uint8_t           262 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd1;
uint8_t           269 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd2;
uint8_t           270 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t hash_flags;
uint8_t           271 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t hash_cfg_offset;
uint8_t           272 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t next_curr_id;
uint8_t           273 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd3;
uint8_t           274 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_prefix_sz;
uint8_t           275 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t final_sz;
uint8_t           276 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_res_sz;
uint8_t           277 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd4;
uint8_t           278 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_state1_sz;
uint8_t           279 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_state2_offset;
uint8_t           280 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_state2_sz;
uint8_t           281 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_config_offset;
uint8_t           282 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_state1_sz;
uint8_t           283 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_res_sz;
uint8_t           284 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_prefix_offset;
uint8_t           288 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_state_sz;
uint8_t           289 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_key_sz;
uint8_t           290 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_cfg_offset;
uint8_t           291 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t next_curr_id_cipher;
uint8_t           292 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t cipher_padding_sz;
uint8_t           293 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t hash_flags;
uint8_t           294 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t hash_cfg_offset;
uint8_t           295 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t next_curr_id_auth;
uint8_t           296 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd1;
uint8_t           297 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_prefix_sz;
uint8_t           298 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t final_sz;
uint8_t           299 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_res_sz;
uint8_t           300 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd2;
uint8_t           301 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_state1_sz;
uint8_t           302 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_state2_offset;
uint8_t           303 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t inner_state2_sz;
uint8_t           304 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_config_offset;
uint8_t           305 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_state1_sz;
uint8_t           306 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_res_sz;
uint8_t           307 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t outer_prefix_offset;
uint8_t           338 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 		uint8_t inner_prefix_sz;
uint8_t           339 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 		uint8_t aad_sz;
uint8_t           341 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd1;
uint8_t           342 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t hash_state_sz;
uint8_t           343 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t auth_res_sz;
uint8_t           349 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 		uint8_t inner_prefix_sz;
uint8_t           350 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 		uint8_t aad_sz;
uint8_t           352 drivers/crypto/qat/qat_common/icp_qat_fw_la.h 	uint8_t resrvd1;
uint8_t           194 drivers/crypto/qat/qat_common/icp_qat_hw.h 	uint8_t state1[ICP_QAT_HW_SHA512_STATE1_SZ];
uint8_t           196 drivers/crypto/qat/qat_common/icp_qat_hw.h 	uint8_t state2[ICP_QAT_HW_SHA512_STATE2_SZ];
uint8_t           299 drivers/crypto/qat/qat_common/icp_qat_hw.h 	uint8_t key[ICP_QAT_HW_AES_256_F8_KEY_SZ];
uint8_t           153 drivers/crypto/qat/qat_common/qat_algs.c 				  const uint8_t *auth_key,
uint8_t           469 drivers/crypto/qat/qat_common/qat_algs.c 					const uint8_t *key, unsigned int keylen)
uint8_t           489 drivers/crypto/qat/qat_common/qat_algs.c 					int alg, const uint8_t *key,
uint8_t           502 drivers/crypto/qat/qat_common/qat_algs.c 					int alg, const uint8_t *key,
uint8_t           581 drivers/crypto/qat/qat_common/qat_algs.c 					    const uint8_t *key,
uint8_t           598 drivers/crypto/qat/qat_common/qat_algs.c static int qat_alg_aead_rekey(struct crypto_aead *tfm, const uint8_t *key,
uint8_t           612 drivers/crypto/qat/qat_common/qat_algs.c static int qat_alg_aead_newkey(struct crypto_aead *tfm, const uint8_t *key,
uint8_t           664 drivers/crypto/qat/qat_common/qat_algs.c static int qat_alg_aead_setkey(struct crypto_aead *tfm, const uint8_t *key,
uint8_t           826 drivers/crypto/qat/qat_common/qat_algs.c 	uint8_t stat_filed = qat_resp->comn_resp.comn_status;
uint8_t           841 drivers/crypto/qat/qat_common/qat_algs.c 	uint8_t stat_filed = qat_resp->comn_resp.comn_status;
uint8_t           893 drivers/crypto/qat/qat_common/qat_algs.c 	auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
uint8_t           916 drivers/crypto/qat/qat_common/qat_algs.c 	uint8_t *iv = areq->iv;
uint8_t           932 drivers/crypto/qat/qat_common/qat_algs.c 	auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
uint8_t            35 drivers/crypto/virtio/virtio_crypto_algs.c 	uint8_t *iv;
uint8_t           115 drivers/crypto/virtio/virtio_crypto_algs.c 		uint32_t alg, const uint8_t *key,
uint8_t           130 drivers/crypto/virtio/virtio_crypto_algs.c 	uint8_t *cipher_key = kmemdup(key, keylen, GFP_ATOMIC);
uint8_t           266 drivers/crypto/virtio/virtio_crypto_algs.c 		const uint8_t *key, unsigned int keylen)
uint8_t           301 drivers/crypto/virtio/virtio_crypto_algs.c 					 const uint8_t *key,
uint8_t           359 drivers/crypto/virtio/virtio_crypto_algs.c 	uint8_t *iv;
uint8_t            76 drivers/crypto/virtio/virtio_crypto_common.h 	uint8_t dev_id;
uint8_t            92 drivers/crypto/virtio/virtio_crypto_common.h 	uint8_t status;
uint8_t           187 drivers/dma/ioat/hw.h 	uint8_t		coef[8];
uint8_t           237 drivers/dma/ioat/hw.h 	uint8_t coef[8];
uint8_t           129 drivers/dma/moxart-dma.c 	uint8_t				es;
uint8_t            98 drivers/dma/ti/omap-dma.c 	uint8_t es;		/* CSDP_DATA_TYPE_xxx */
uint8_t          1174 drivers/dma/ti/omap-dma.c 	uint8_t data_type;
uint8_t          1221 drivers/dma/ti/omap-dma.c 	uint8_t data_type;
uint8_t            83 drivers/edac/armada_xp_edac.c 				    uint8_t cs, uint8_t bank, uint16_t row,
uint8_t           131 drivers/edac/armada_xp_edac.c 	uint8_t syndrome_val, cs_val;
uint8_t           391 drivers/edac/armada_xp_edac.c 	uint8_t inject_ctl;
uint8_t           146 drivers/firmware/broadcom/bcm47xx_nvram.c 	err = mtd_read(mtd, 0, sizeof(header), &bytes_read, (uint8_t *)&header);
uint8_t            58 drivers/firmware/imx/misc.c 	hdr->svc = (uint8_t)IMX_SC_RPC_SVC_MISC;
uint8_t            59 drivers/firmware/imx/misc.c 	hdr->func = (uint8_t)IMX_SC_MISC_FUNC_SET_CONTROL;
uint8_t            90 drivers/firmware/imx/misc.c 	hdr->svc = (uint8_t)IMX_SC_RPC_SVC_MISC;
uint8_t            91 drivers/firmware/imx/misc.c 	hdr->func = (uint8_t)IMX_SC_MISC_FUNC_GET_CONTROL;
uint8_t           220 drivers/firmware/meson/meson_sm.c 	uint8_t *id_buf;
uint8_t           106 drivers/fsi/fsi-core.c 		uint8_t slave_id, uint32_t addr, void *val, size_t size);
uint8_t           108 drivers/fsi/fsi-core.c 		uint8_t slave_id, uint32_t addr, const void *val, size_t size);
uint8_t           180 drivers/fsi/fsi-core.c 		uint8_t *idp)
uint8_t           183 drivers/fsi/fsi-core.c 	uint8_t id = *idp;
uint8_t           208 drivers/fsi/fsi-core.c 	uint8_t id;
uint8_t           285 drivers/fsi/fsi-core.c 	uint8_t id, send_delay, echo_delay;
uint8_t           342 drivers/fsi/fsi-core.c 	uint8_t id = slave->id;
uint8_t           367 drivers/fsi/fsi-core.c 	uint8_t id = slave->id;
uint8_t           474 drivers/fsi/fsi-core.c 		uint8_t slots, version, type, crc;
uint8_t           646 drivers/fsi/fsi-core.c 		int link, uint8_t id)
uint8_t           672 drivers/fsi/fsi-core.c 		int link, uint8_t id)
uint8_t           979 drivers/fsi/fsi-core.c static int fsi_slave_init(struct fsi_master *master, int link, uint8_t id)
uint8_t           983 drivers/fsi/fsi-core.c 	uint8_t crc;
uint8_t          1124 drivers/fsi/fsi-core.c 		uint8_t slave_id, uint32_t addr, void *val, size_t size)
uint8_t          1141 drivers/fsi/fsi-core.c 		uint8_t slave_id, uint32_t addr, const void *val, size_t size)
uint8_t           103 drivers/fsi/fsi-master-ast-cf.c 	uint8_t			gpio_clk_bit;
uint8_t           104 drivers/fsi/fsi-master-ast-cf.c 	uint8_t			gpio_dat_bit;
uint8_t           105 drivers/fsi/fsi-master-ast-cf.c 	uint8_t			gpio_tra_bit;
uint8_t           116 drivers/fsi/fsi-master-ast-cf.c 	uint8_t			t_send_delay;
uint8_t           117 drivers/fsi/fsi-master-ast-cf.c 	uint8_t			t_echo_delay;
uint8_t           124 drivers/fsi/fsi-master-ast-cf.c 	uint8_t		bits;
uint8_t           139 drivers/fsi/fsi-master-ast-cf.c 	uint8_t crc;
uint8_t           209 drivers/fsi/fsi-master-ast-cf.c 			     struct fsi_msg *cmd, uint8_t id,
uint8_t           215 drivers/fsi/fsi-master-ast-cf.c 	uint8_t ds, opcode;
uint8_t           268 drivers/fsi/fsi-master-ast-cf.c 		msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
uint8_t           274 drivers/fsi/fsi-master-ast-cf.c static void build_dpoll_command(struct fsi_msg *cmd, uint8_t slave_id)
uint8_t           285 drivers/fsi/fsi-master-ast-cf.c static void build_epoll_command(struct fsi_msg *cmd, uint8_t slave_id)
uint8_t           296 drivers/fsi/fsi-master-ast-cf.c static void build_term_command(struct fsi_msg *cmd, uint8_t slave_id)
uint8_t           310 drivers/fsi/fsi-master-ast-cf.c 	uint8_t stat;
uint8_t           377 drivers/fsi/fsi-master-ast-cf.c static int read_copro_response(struct fsi_master_acf *master, uint8_t size,
uint8_t           380 drivers/fsi/fsi-master-ast-cf.c 	uint8_t rtag = ioread8(master->sram + STAT_RTAG) & 0xf;
uint8_t           381 drivers/fsi/fsi-master-ast-cf.c 	uint8_t rcrc = ioread8(master->sram + STAT_RCRC) & 0xf;
uint8_t           384 drivers/fsi/fsi-master-ast-cf.c 	uint8_t ack;
uint8_t           414 drivers/fsi/fsi-master-ast-cf.c static int send_term(struct fsi_master_acf *master, uint8_t slave)
uint8_t           417 drivers/fsi/fsi-master-ast-cf.c 	uint8_t tag;
uint8_t           455 drivers/fsi/fsi-master-ast-cf.c 		uint8_t v;
uint8_t           468 drivers/fsi/fsi-master-ast-cf.c 			   uint8_t slave, uint8_t size, void *data)
uint8_t           474 drivers/fsi/fsi-master-ast-cf.c 	uint8_t tag;
uint8_t           571 drivers/fsi/fsi-master-ast-cf.c static int fsi_master_acf_xfer(struct fsi_master_acf *master, uint8_t slave,
uint8_t           598 drivers/fsi/fsi-master-ast-cf.c 			       uint8_t id, uint32_t addr, void *val,
uint8_t           622 drivers/fsi/fsi-master-ast-cf.c 				uint8_t id, uint32_t addr, const void *val,
uint8_t           647 drivers/fsi/fsi-master-ast-cf.c 			       int link, uint8_t id)
uint8_t            35 drivers/fsi/fsi-master-gpio.c 	uint8_t			t_send_delay;
uint8_t            36 drivers/fsi/fsi-master-gpio.c 	uint8_t			t_echo_delay;
uint8_t            46 drivers/fsi/fsi-master-gpio.c 	uint8_t		bits;
uint8_t           113 drivers/fsi/fsi-master-gpio.c 			uint8_t num_bits)
uint8_t           115 drivers/fsi/fsi-master-gpio.c 	uint8_t bit, in_bit;
uint8_t           132 drivers/fsi/fsi-master-gpio.c 	uint8_t bit;
uint8_t           171 drivers/fsi/fsi-master-gpio.c 	uint8_t crc;
uint8_t           235 drivers/fsi/fsi-master-gpio.c 		struct fsi_gpio_msg *cmd, uint8_t id,
uint8_t           240 drivers/fsi/fsi-master-gpio.c 	uint8_t ds, opcode;
uint8_t           293 drivers/fsi/fsi-master-gpio.c 		msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
uint8_t           298 drivers/fsi/fsi-master-gpio.c static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
uint8_t           308 drivers/fsi/fsi-master-gpio.c static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
uint8_t           318 drivers/fsi/fsi-master-gpio.c static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
uint8_t           335 drivers/fsi/fsi-master-gpio.c 		uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
uint8_t           340 drivers/fsi/fsi-master-gpio.c 	uint8_t tag;
uint8_t           397 drivers/fsi/fsi-master-gpio.c static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
uint8_t           401 drivers/fsi/fsi-master-gpio.c 	uint8_t tag;
uint8_t           425 drivers/fsi/fsi-master-gpio.c 		uint8_t slave, uint8_t size, void *data)
uint8_t           430 drivers/fsi/fsi-master-gpio.c 	uint8_t tag;
uint8_t           431 drivers/fsi/fsi-master-gpio.c 	uint8_t *data_byte = data;
uint8_t           539 drivers/fsi/fsi-master-gpio.c static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
uint8_t           562 drivers/fsi/fsi-master-gpio.c 		uint8_t id, uint32_t addr, void *val, size_t size)
uint8_t           581 drivers/fsi/fsi-master-gpio.c 		uint8_t id, uint32_t addr, const void *val, size_t size)
uint8_t           600 drivers/fsi/fsi-master-gpio.c 		int link, uint8_t id)
uint8_t            92 drivers/fsi/fsi-master-hub.c 			uint8_t id, uint32_t addr, void *val, size_t size)
uint8_t           104 drivers/fsi/fsi-master-hub.c 			uint8_t id, uint32_t addr, const void *val, size_t size)
uint8_t            56 drivers/fsi/fsi-master.h 	int		(*read)(struct fsi_master *, int link, uint8_t id,
uint8_t            58 drivers/fsi/fsi-master.h 	int		(*write)(struct fsi_master *, int link, uint8_t id,
uint8_t            60 drivers/fsi/fsi-master.h 	int		(*term)(struct fsi_master *, int link, uint8_t id);
uint8_t           256 drivers/fsi/fsi-scom.c static int handle_pib_status(struct scom_device *scom, uint8_t status)
uint8_t            36 drivers/gpio/gpio-adnp.c static int adnp_read(struct adnp *adnp, unsigned offset, uint8_t *value)
uint8_t            51 drivers/gpio/gpio-adnp.c static int adnp_write(struct adnp *adnp, unsigned offset, uint8_t value)
uint8_t            26 drivers/gpio/gpio-adp5520.c 	uint8_t reg_val;
uint8_t            36 drivers/gpio/gpio-adp5588.c 	uint8_t dat_out[3];
uint8_t            37 drivers/gpio/gpio-adp5588.c 	uint8_t dir[3];
uint8_t            38 drivers/gpio/gpio-adp5588.c 	uint8_t int_lvl_low[3];
uint8_t            39 drivers/gpio/gpio-adp5588.c 	uint8_t int_lvl_high[3];
uint8_t            40 drivers/gpio/gpio-adp5588.c 	uint8_t int_en[3];
uint8_t            41 drivers/gpio/gpio-adp5588.c 	uint8_t irq_mask[3];
uint8_t            42 drivers/gpio/gpio-adp5588.c 	uint8_t int_input_en[3];
uint8_t           146 drivers/gpio/gpio-max732x.c 	uint8_t		reg_out[2];
uint8_t           150 drivers/gpio/gpio-max732x.c 	uint8_t			irq_mask;
uint8_t           151 drivers/gpio/gpio-max732x.c 	uint8_t			irq_mask_cur;
uint8_t           152 drivers/gpio/gpio-max732x.c 	uint8_t			irq_trig_raise;
uint8_t           153 drivers/gpio/gpio-max732x.c 	uint8_t			irq_trig_fall;
uint8_t           154 drivers/gpio/gpio-max732x.c 	uint8_t			irq_features;
uint8_t           158 drivers/gpio/gpio-max732x.c static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val)
uint8_t           173 drivers/gpio/gpio-max732x.c static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val)
uint8_t           185 drivers/gpio/gpio-max732x.c 	*val = (uint8_t)ret;
uint8_t           197 drivers/gpio/gpio-max732x.c 	uint8_t reg_val;
uint8_t           211 drivers/gpio/gpio-max732x.c 	uint8_t reg_out;
uint8_t           235 drivers/gpio/gpio-max732x.c 	uint8_t mask = 1u << (off & 0x7);
uint8_t           341 drivers/gpio/gpio-max732x.c 		max732x_writeb(chip, 1, (uint8_t)msg);
uint8_t           442 drivers/gpio/gpio-max732x.c static uint8_t max732x_irq_pending(struct max732x_chip *chip)
uint8_t           444 drivers/gpio/gpio-max732x.c 	uint8_t cur_stat;
uint8_t           445 drivers/gpio/gpio-max732x.c 	uint8_t old_stat;
uint8_t           446 drivers/gpio/gpio-max732x.c 	uint8_t trigger;
uint8_t           447 drivers/gpio/gpio-max732x.c 	uint8_t pending;
uint8_t           476 drivers/gpio/gpio-max732x.c 	uint8_t pending;
uint8_t           477 drivers/gpio/gpio-max732x.c 	uint8_t level;
uint8_t            28 drivers/gpio/gpio-rc5t583.c 	uint8_t val = 0;
uint8_t            33 drivers/gpio/gpio-tps6586x.c 	uint8_t val;
uint8_t            56 drivers/gpio/gpio-tps6586x.c 	uint8_t val, mask;
uint8_t           813 drivers/gpu/drm/amd/amdgpu/amdgpu.h 	uint8_t				*bios;
uint8_t           959 drivers/gpu/drm/amd/amdgpu/amdgpu.h 	uint8_t				*discovery;
uint8_t          1040 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
uint8_t          1041 drivers/gpu/drm/amd/amdgpu/amdgpu.h uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
uint8_t           571 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src)
uint8_t           583 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c 	return  (uint8_t)ret;
uint8_t           180 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src);
uint8_t           102 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 		uint8_t vmid);
uint8_t           104 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 		uint8_t vmid);
uint8_t           783 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 							uint8_t vmid)
uint8_t           794 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 								uint8_t vmid)
uint8_t           136 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid);
uint8_t           138 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 							uint8_t vmid);
uint8_t           762 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 							uint8_t vmid)
uint8_t           772 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 								uint8_t vmid)
uint8_t            93 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 		uint8_t vmid);
uint8_t            95 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 		uint8_t vmid);
uint8_t           675 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 							uint8_t vmid)
uint8_t           685 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 								uint8_t vmid)
uint8_t           621 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 							uint8_t vmid)
uint8_t           632 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 								uint8_t vmid)
uint8_t            59 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h 		uint8_t vmid);
uint8_t            61 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h 		uint8_t vmid);
uint8_t            90 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 							  uint8_t id)
uint8_t           334 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		uint8_t *addr = (uint8_t *) path_obj->asDispPath;
uint8_t           341 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 			uint8_t con_obj_id =
uint8_t           368 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 				uint8_t grph_obj_type =
uint8_t           562 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 	uint8_t frev, crev;
uint8_t           716 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 	uint8_t frev, crev;
uint8_t           889 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 	uint8_t frev, crev;
uint8_t           140 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h 							  uint8_t id);
uint8_t           348 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 	uint8_t frev, crev;
uint8_t           432 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 	uint8_t frev, crev;
uint8_t            49 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static bool check_atom_bios(uint8_t *bios, size_t size)
uint8_t            92 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c 	uint8_t __iomem *bios;
uint8_t           126 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c 	uint8_t __iomem *bios;
uint8_t           195 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c 	uint8_t __iomem *bios;
uint8_t           239 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static int amdgpu_atrm_call(acpi_handle atrm_handle, uint8_t *bios,
uint8_t           245 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c 		const uint8_t *src;
uint8_t           467 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c 		src = (const uint8_t *)(adev->pm.fw->data +
uint8_t           806 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 			uint8_t *kptr;
uint8_t           202 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset) {
uint8_t           223 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value) {
uint8_t           135 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary)
uint8_t           154 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c static uint16_t amdgpu_discovery_calculate_checksum(uint8_t *data, uint32_t size)
uint8_t           165 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c static inline bool amdgpu_discovery_verify_checksum(uint8_t *data, uint32_t size,
uint8_t           267 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 	uint8_t num_base_address;
uint8_t           119 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 	uint8_t num_pipes;
uint8_t           120 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 	uint8_t max_compress_frags;
uint8_t           121 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 	uint8_t num_banks;
uint8_t           122 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 	uint8_t num_se;
uint8_t           123 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 	uint8_t num_rb_per_se;
uint8_t           322 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c 	uint8_t out_buf[2];
uint8_t           790 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 			uint8_t *bios;
uint8_t           145 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint8_t i2c_id;
uint8_t           362 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint8_t negative;
uint8_t           370 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint8_t type;
uint8_t           372 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint8_t delay;
uint8_t           373 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint8_t range;
uint8_t           374 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint8_t refdiv;
uint8_t           445 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint8_t backlight_level;
uint8_t           116 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t					num_hops;
uint8_t           117 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t					is_sharing_enabled;
uint8_t           127 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				initialized;
uint8_t           166 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				*sys_start_addr;
uint8_t           167 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				*sos_start_addr;
uint8_t           168 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				*toc_start_addr;
uint8_t           169 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				*kdb_start_addr;
uint8_t           180 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				*asd_start_addr;
uint8_t           205 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				*ta_xgmi_start_addr;
uint8_t           208 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 	uint8_t				*ta_ras_start_addr;
uint8_t          1585 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		buf = (uint8_t *)buf + bytes;
uint8_t           477 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 		memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data +
uint8_t           485 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 		memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data +
uint8_t           492 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 		memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data +
uint8_t           500 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 		memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data +
uint8_t           506 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 		memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data +
uint8_t           532 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 	uint8_t* src_addr = NULL;
uint8_t           533 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 	uint8_t* dst_addr = NULL;
uint8_t           543 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 	src_addr = (uint8_t *)ucode->fw->data +
uint8_t           265 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h 	uint8_t raw[0x100];
uint8_t            59 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h 	uint8_t			num_uvd_inst;
uint8_t           190 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h 	uint8_t	num_vcn_inst;
uint8_t           194 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h 	uint8_t driver_version[64];
uint8_t           176 drivers/gpu/drm/amd/amdgpu/atom.c static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
uint8_t           361 drivers/gpu/drm/amd/amdgpu/atom.c static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
uint8_t           397 drivers/gpu/drm/amd/amdgpu/atom.c static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
uint8_t           402 drivers/gpu/drm/amd/amdgpu/atom.c static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
uint8_t           428 drivers/gpu/drm/amd/amdgpu/atom.c static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
uint8_t           437 drivers/gpu/drm/amd/amdgpu/atom.c static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
uint8_t           444 drivers/gpu/drm/amd/amdgpu/atom.c static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
uint8_t           582 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           596 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           631 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           643 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           669 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           687 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           765 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           782 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           799 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           811 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           829 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           843 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t val = U8((*ptr)++);
uint8_t           878 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           919 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           935 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           951 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           970 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           989 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t          1003 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t          1030 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t          1042 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t          1056 drivers/gpu/drm/amd/amdgpu/atom.c 	uint8_t val = U8((*ptr)++);
uint8_t          1388 drivers/gpu/drm/amd/amdgpu/atom.c 			    uint16_t * size, uint8_t * frev, uint8_t * crev,
uint8_t          1408 drivers/gpu/drm/amd/amdgpu/atom.c bool amdgpu_atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
uint8_t          1409 drivers/gpu/drm/amd/amdgpu/atom.c 			   uint8_t * crev)
uint8_t           139 drivers/gpu/drm/amd/amdgpu/atom.h 	uint8_t shift;
uint8_t           154 drivers/gpu/drm/amd/amdgpu/atom.h 			    uint8_t *frev, uint8_t *crev, uint16_t *data_start);
uint8_t           156 drivers/gpu/drm/amd/amdgpu/atom.h 			   uint8_t *frev, uint8_t *crev);
uint8_t           389 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 	uint8_t frev, crev;
uint8_t           582 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 	uint8_t frev, crev;
uint8_t           762 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 					      uint8_t lane_num, uint8_t lane_set)
uint8_t           771 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          1184 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          1474 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          1713 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 		uint8_t frev, crev;
uint8_t          2007 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 	uint8_t frev, crev;
uint8_t            51 drivers/gpu/drm/amd/amdgpu/atombios_encoders.h 				       uint8_t lane_num, uint8_t lane_set);
uint8_t          1507 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	uint8_t *frame = buffer + 3;
uint8_t          1508 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	uint8_t *header = buffer;
uint8_t          1549 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	uint8_t *frame = buffer + 3;
uint8_t          1550 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	uint8_t *header = buffer;
uint8_t          1438 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	uint8_t *payload = buffer + 3;
uint8_t          1439 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	uint8_t *header = buffer;
uint8_t          1458 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	uint8_t *frame = buffer + 3;
uint8_t          1459 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	uint8_t *header = buffer;
uint8_t          1516 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 					   (uint8_t *)&pi->uvd_boot_level,
uint8_t            76 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static uint8_t xgpu_ai_peek_ack(struct amdgpu_device *adev) {
uint8_t           121 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	uint8_t trn;
uint8_t            67 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_Result_OK             ((uint8_t)0x01)
uint8_t            68 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_Result_Failed         ((uint8_t)0xFF)
uint8_t            70 drivers/gpu/drm/amd/amdgpu/ppsmc.h typedef uint8_t PPSMC_Result;
uint8_t            72 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_Halt                      ((uint8_t)0x10)
uint8_t            73 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_Resume                    ((uint8_t)0x11)
uint8_t            74 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_ZeroLevelsDisabled        ((uint8_t)0x13)
uint8_t            75 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_OneLevelsDisabled         ((uint8_t)0x14)
uint8_t            76 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_TwoLevelsDisabled         ((uint8_t)0x15)
uint8_t            77 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_EnableThermalInterrupt    ((uint8_t)0x16)
uint8_t            78 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_RunningOnAC               ((uint8_t)0x17)
uint8_t            79 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_SwitchToSwState           ((uint8_t)0x20)
uint8_t            80 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_SwitchToInitialState      ((uint8_t)0x40)
uint8_t            81 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_NoForcedLevel             ((uint8_t)0x41)
uint8_t            82 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_ForceHigh                 ((uint8_t)0x42)
uint8_t            83 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_ForceMediumOrHigh         ((uint8_t)0x43)
uint8_t            84 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_SwitchToMinimumPower      ((uint8_t)0x51)
uint8_t            85 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_ResumeFromMinimumPower    ((uint8_t)0x52)
uint8_t            86 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_EnableCac                 ((uint8_t)0x53)
uint8_t            87 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_DisableCac                ((uint8_t)0x54)
uint8_t            88 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_TDPClampingActive             ((uint8_t)0x59)
uint8_t            89 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_TDPClampingInactive           ((uint8_t)0x5A)
uint8_t            90 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_StartFanControl               ((uint8_t)0x5B)
uint8_t            91 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_StopFanControl                ((uint8_t)0x5C)
uint8_t            92 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_NoDisplay                 ((uint8_t)0x5D)
uint8_t            93 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_NoDisplay                     ((uint8_t)0x5D)
uint8_t            94 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_HasDisplay                ((uint8_t)0x5E)
uint8_t            95 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_HasDisplay                    ((uint8_t)0x5E)
uint8_t            96 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_UVDPowerOFF               ((uint8_t)0x60)
uint8_t            97 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_UVDPowerON                ((uint8_t)0x61)
uint8_t            98 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_EnableULV                 ((uint8_t)0x62)
uint8_t            99 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_DisableULV                ((uint8_t)0x63)
uint8_t           100 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_EnterULV                  ((uint8_t)0x64)
uint8_t           101 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_ExitULV                   ((uint8_t)0x65)
uint8_t           102 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_CACLongTermAvgEnable          ((uint8_t)0x6E)
uint8_t           103 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_CACLongTermAvgDisable         ((uint8_t)0x6F)
uint8_t           104 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_CollectCAC_PowerCorreln   ((uint8_t)0x7A)
uint8_t           105 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_FlushDataCache                ((uint8_t)0x80)
uint8_t           106 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_SetEnabledLevels          ((uint8_t)0x82)
uint8_t           107 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_SetForcedLevels           ((uint8_t)0x83)
uint8_t           108 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_ResetToDefaults           ((uint8_t)0x84)
uint8_t           109 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_EnableDTE                 ((uint8_t)0x87)
uint8_t           110 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_DisableDTE                ((uint8_t)0x88)
uint8_t           111 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_ThrottleOVRDSCLKDS        ((uint8_t)0x96)
uint8_t           112 drivers/gpu/drm/amd/amdgpu/ppsmc.h #define PPSMC_MSG_CancelThrottleOVRDSCLKDS  ((uint8_t)0x97)
uint8_t           331 drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h     uint8_t         reserved_1[864 - sizeof(union psp_gfx_commands) - 28];
uint8_t           338 drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h     uint8_t         reserved_2[1024 - 864 - sizeof(struct psp_gfx_resp)];
uint8_t           357 drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h     uint8_t     vmid;               /* +32 VMID value used for mapping of all addresses for this frame */
uint8_t           358 drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h     uint8_t     frame_type;         /* +33 1: destory context frame, 0: all other frames; used only for RBI frames */
uint8_t           359 drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h     uint8_t     reserved1[2];       /* +34 reserved, must be 0 */
uint8_t            79 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c 	adev->psp.asd_start_addr = (uint8_t *)hdr +
uint8_t           113 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 		adev->psp.sys_start_addr = (uint8_t *)sos_hdr +
uint8_t           115 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 		adev->psp.sos_start_addr = (uint8_t *)adev->psp.sys_start_addr +
uint8_t           120 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 			adev->psp.toc_start_addr = (uint8_t *)adev->psp.sys_start_addr +
uint8_t           123 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 			adev->psp.kdb_start_addr = (uint8_t *)adev->psp.sys_start_addr +
uint8_t           129 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 			adev->psp.kdb_start_addr = (uint8_t *)adev->psp.sys_start_addr +
uint8_t           153 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 	adev->psp.asd_start_addr = (uint8_t *)asd_hdr +
uint8_t           173 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 			adev->psp.ta_xgmi_start_addr = (uint8_t *)ta_hdr +
uint8_t           178 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c 			adev->psp.ta_ras_start_addr = (uint8_t *)adev->psp.ta_xgmi_start_addr +
uint8_t            75 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c 	adev->psp.asd_start_addr = (uint8_t *)asd_hdr +
uint8_t            94 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c 	adev->psp.sys_start_addr = (uint8_t *)hdr +
uint8_t            96 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c 	adev->psp.sos_start_addr = (uint8_t *)adev->psp.sys_start_addr +
uint8_t           112 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c 	adev->psp.asd_start_addr = (uint8_t *)hdr +
uint8_t          6518 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	fan_table.temp_src = (uint8_t)tmp;
uint8_t           291 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             last;
uint8_t           292 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             reserved[3];
uint8_t           321 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             last;
uint8_t           322 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             reserved[3];
uint8_t           410 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t              index;
uint8_t           411 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t              padding;
uint8_t           426 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 arbValue;
uint8_t           428 drivers/gpu/drm/amd/amdgpu/si_dpm.h         uint8_t             seqValue;
uint8_t           429 drivers/gpu/drm/amd/amdgpu/si_dpm.h         uint8_t             ACIndex;
uint8_t           431 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 displayWatermark;
uint8_t           432 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 gen2PCIE;
uint8_t           433 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 gen2XSP;
uint8_t           434 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 backbias;
uint8_t           435 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 strobeMode;
uint8_t           436 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 mcFlags;
uint8_t           444 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 reserved1;
uint8_t           445 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 reserved2;
uint8_t           446 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 stateFlags;
uint8_t           447 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                 padding;
uint8_t           454 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t           flags;
uint8_t           455 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t           padding1;
uint8_t           456 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t           padding2;
uint8_t           457 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t           padding3;
uint8_t           465 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t  highMask[RV770_SMC_VOLTAGEMASK_MAX];
uint8_t           473 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t             thermalProtectType;
uint8_t           474 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t             systemFlags;
uint8_t           475 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t             maxVDDCIndexInPPTable;
uint8_t           476 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t             extraFlags;
uint8_t           477 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t             highSMIO[MAX_NO_VREG_STEPS];
uint8_t           683 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     MaxPS;
uint8_t           684 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     TgtAct;
uint8_t           685 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     MaxPS_StepInc;
uint8_t           686 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     MaxPS_StepDec;
uint8_t           687 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     PSST;
uint8_t           688 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     NearTDPDec;
uint8_t           689 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     AboveSafeInc;
uint8_t           690 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     BelowSafeInc;
uint8_t           691 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     PSDeltaLimit;
uint8_t           692 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     PSDeltaWin;
uint8_t           693 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t     Reserved[6];
uint8_t           741 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t              index;
uint8_t           742 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t              padding;
uint8_t           749 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     arbValue;
uint8_t           750 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     ACIndex;
uint8_t           751 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     displayWatermark;
uint8_t           752 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     gen2PCIE;
uint8_t           753 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     reserved1;
uint8_t           754 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     reserved2;
uint8_t           755 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     strobeMode;
uint8_t           756 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     mcFlags;
uint8_t           766 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     hUp;
uint8_t           767 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     hDown;
uint8_t           768 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     stateFlags;
uint8_t           769 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                     arbRefreshState;
uint8_t           780 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             flags;
uint8_t           781 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             levelCount;
uint8_t           782 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             padding2;
uint8_t           783 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             padding3;
uint8_t           791 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t  highMask[NISLANDS_SMC_VOLTAGEMASK_MAX];
uint8_t           801 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             thermalProtectType;
uint8_t           802 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             systemFlags;
uint8_t           803 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             maxVDDCIndexInPPTable;
uint8_t           804 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             extraFlags;
uint8_t           805 drivers/gpu/drm/amd/amdgpu/si_dpm.h     uint8_t                             highSMIO[NISLANDS_MAX_NO_VREG_STEPS];
uint8_t            34 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t MaxPS;
uint8_t            35 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t TgtAct;
uint8_t            36 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t MaxPS_StepInc;
uint8_t            37 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t MaxPS_StepDec;
uint8_t            38 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t PSSamplingTime;
uint8_t            39 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t NearTDPDec;
uint8_t            40 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t AboveSafeInc;
uint8_t            41 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t BelowSafeInc;
uint8_t            42 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t PSDeltaLimit;
uint8_t            43 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t PSDeltaWin;
uint8_t            45 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t Reserved[4];
uint8_t            53 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     CurrPSkip;
uint8_t            54 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     CurrPSkipPowerShift;
uint8_t            55 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     CurrPSkipTDP;
uint8_t            56 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     CurrPSkipOCP;
uint8_t            57 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     MaxSPLLIndex;
uint8_t            58 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     MinSPLLIndex;
uint8_t            59 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     CurrSPLLIndex;
uint8_t            60 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     InfSweepMode;
uint8_t            61 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     InfSweepDir;
uint8_t            62 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     TDPexceeded;
uint8_t            63 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     reserved;
uint8_t            64 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     SwitchDownThreshold;
uint8_t            87 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     dGPU_T_Limit_Exceeded;
uint8_t            88 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     reserved[3];
uint8_t           135 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     index;
uint8_t           136 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t     phase_settings;
uint8_t           143 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     ACIndex;
uint8_t           144 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     displayWatermark;
uint8_t           145 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     gen2PCIE;
uint8_t           146 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     UVDWatermark;
uint8_t           147 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     VCEWatermark;
uint8_t           148 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     strobeMode;
uint8_t           149 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     mcFlags;
uint8_t           150 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     padding;
uint8_t           159 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     hysteresisUp;
uint8_t           160 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     hysteresisDown;
uint8_t           161 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     stateFlags;
uint8_t           162 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                     arbRefreshState;
uint8_t           185 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             flags;
uint8_t           186 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             levelCount;
uint8_t           187 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             padding2;
uint8_t           188 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             padding3;
uint8_t           211 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             thermalProtectType;
uint8_t           212 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             systemFlags;
uint8_t           213 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             maxVDDCIndexInPPTable;
uint8_t           214 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             extraFlags;
uint8_t           251 drivers/gpu/drm/amd/amdgpu/sislands_smc.h 	uint8_t  fdo_mode;
uint8_t           252 drivers/gpu/drm/amd/amdgpu/sislands_smc.h 	uint8_t  padding;
uint8_t           268 drivers/gpu/drm/amd/amdgpu/sislands_smc.h 	uint8_t  temp_src;
uint8_t           290 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t    lts_truncate_n;
uint8_t           291 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t    SHIFT_N;
uint8_t           292 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t    log2_PG_LKG_SCALE;
uint8_t           293 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t    cac_temp;
uint8_t           320 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             last;
uint8_t           321 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                             reserved[3];
uint8_t           332 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  mc_arb_rfsh_rate;
uint8_t           333 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  mc_arb_burst_time;
uint8_t           334 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  padding[2];
uint8_t           341 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                                     arb_current;
uint8_t           342 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t                                     reserved[3];
uint8_t           376 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  WindowSize;
uint8_t           377 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  Tdep_count;
uint8_t           378 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  temp_select;
uint8_t           379 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  DTE_mode;
uint8_t           380 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint8_t  T_limits[SMC_SISLANDS_DTE_MAX_TEMPERATURE_DEPENDENT_ARRAY_SIZE];
uint8_t           118 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c static void smu_v11_0_i2c_set_address(struct i2c_adapter *control, uint8_t address)
uint8_t           225 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 				  uint8_t address, uint8_t *data,
uint8_t           325 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 				 uint8_t address, uint8_t *data,
uint8_t           326 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 				 uint32_t numbytes, uint8_t i2c_flag)
uint8_t           544 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 					       uint8_t address,
uint8_t           545 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 					       uint8_t *data,
uint8_t           567 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 						uint8_t address,
uint8_t           568 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 						uint8_t *data,
uint8_t           645 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 							(uint8_t)msgs[i].addr,
uint8_t           649 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 							 (uint8_t)msgs[i].addr,
uint8_t           707 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c 	uint8_t data[6] = {0xf, 0, 0xde, 0xad, 0xbe, 0xef};
uint8_t            73 drivers/gpu/drm/amd/amdgpu/ta_xgmi_if.h 	uint8_t					num_hops;
uint8_t            74 drivers/gpu/drm/amd/amdgpu/ta_xgmi_if.h 	uint8_t					is_sharing_enabled;
uint8_t           775 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 	uint8_t i = 0;
uint8_t          1119 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 	uint8_t i = 0;
uint8_t           633 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel)
uint8_t           612 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		uint8_t sram_sel, uint8_t indirect)
uint8_t           585 drivers/gpu/drm/amd/amdkfd/kfd_crat.c 		pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF);
uint8_t           587 drivers/gpu/drm/amd/amdkfd/kfd_crat.c 				(uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
uint8_t           589 drivers/gpu/drm/amd/amdkfd/kfd_crat.c 				(uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
uint8_t           591 drivers/gpu/drm/amd/amdkfd/kfd_crat.c 				(uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
uint8_t           885 drivers/gpu/drm/amd/amdkfd/kfd_crat.c 	uint8_t link_type;
uint8_t          1034 drivers/gpu/drm/amd/amdkfd/kfd_crat.c 		struct kfd_dev *kdev, uint8_t type, uint64_t size,
uint8_t            54 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		revision;
uint8_t            55 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		checksum;
uint8_t            56 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		oem_id[CRAT_OEMID_LENGTH];
uint8_t            57 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		oem_table_id[CRAT_OEMTABLEID_LENGTH];
uint8_t            63 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		reserved[CRAT_RESERVED_LENGTH];
uint8_t            97 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		type;
uint8_t            98 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		length;
uint8_t           109 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		wave_front_size;
uint8_t           110 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		num_banks;
uint8_t           112 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		array_count;
uint8_t           113 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		num_cu_per_array;
uint8_t           114 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		num_simd_per_cu;
uint8_t           115 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		max_slots_scatch_cu;
uint8_t           116 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		reserved2[CRAT_COMPUTEUNIT_RESERVED_LENGTH];
uint8_t           130 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		type;
uint8_t           131 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		length;
uint8_t           140 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		visibility_type; /* for virtual (dGPU) CRAT */
uint8_t           141 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		reserved2[CRAT_MEMORY_RESERVED_LENGTH - 1];
uint8_t           157 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		type;
uint8_t           158 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		length;
uint8_t           162 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		sibling_map[CRAT_SIBLINGMAP_SIZE];
uint8_t           164 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		cache_level;
uint8_t           165 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		lines_per_tag;
uint8_t           167 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		associativity;
uint8_t           168 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		cache_properties;
uint8_t           170 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		reserved2[CRAT_CACHE_RESERVED_LENGTH];
uint8_t           186 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		type;
uint8_t           187 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		length;
uint8_t           191 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		sibling_map[CRAT_SIBLINGMAP_SIZE];
uint8_t           193 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		data_tlb_associativity_2mb;
uint8_t           194 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		data_tlb_size_2mb;
uint8_t           195 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		instruction_tlb_associativity_2mb;
uint8_t           196 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		instruction_tlb_size_2mb;
uint8_t           197 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		data_tlb_associativity_4k;
uint8_t           198 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		data_tlb_size_4k;
uint8_t           199 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		instruction_tlb_associativity_4k;
uint8_t           200 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		instruction_tlb_size_4k;
uint8_t           201 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		data_tlb_associativity_1gb;
uint8_t           202 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		data_tlb_size_1gb;
uint8_t           203 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		instruction_tlb_associativity_1gb;
uint8_t           204 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		instruction_tlb_size_1gb;
uint8_t           205 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		reserved2[CRAT_TLB_RESERVED_LENGTH];
uint8_t           217 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		type;
uint8_t           218 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		length;
uint8_t           222 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		sibling_map[CRAT_SIBLINGMAP_SIZE];
uint8_t           224 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		reserved2[CRAT_CCOMPUTE_RESERVED_LENGTH];
uint8_t           263 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		type;
uint8_t           264 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		length;
uint8_t           269 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		io_interface_type;
uint8_t           270 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		version_major;
uint8_t           277 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		reserved2[CRAT_IOLINK_RESERVED_LENGTH - 1];
uint8_t           278 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		num_hops_xgmi;
uint8_t           288 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		type;
uint8_t           289 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		length;
uint8_t           303 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		revision;
uint8_t           304 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		checksum;
uint8_t           305 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		oem_id[CDIT_OEMID_LENGTH];
uint8_t           306 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		oem_table_id[CDIT_OEMTABLEID_LENGTH];
uint8_t           312 drivers/gpu/drm/amd/amdkfd/kfd_crat.h 	uint8_t		entry[1];
uint8_t            79 drivers/gpu/drm/amd/amdkfd/kfd_events.c 	memset(backing_store, (uint8_t) UNSIGNALED_EVENT_SLOT,
uint8_t           311 drivers/gpu/drm/amd/amdkfd/kfd_events.c 	memset(kernel_address, (uint8_t) UNSIGNALED_EVENT_SLOT,
uint8_t           315 drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c static void kfd_init_apertures_vi(struct kfd_process_device *pdd, uint8_t id)
uint8_t           345 drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c static void kfd_init_apertures_v9(struct kfd_process_device *pdd, uint8_t id)
uint8_t           366 drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c 	uint8_t id  = 0;
uint8_t           204 drivers/gpu/drm/amd/amdkfd/kfd_priv.h 	uint8_t num_of_watch_points;
uint8_t           852 drivers/gpu/drm/amd/amdkfd/kfd_priv.h int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);
uint8_t          1408 drivers/gpu/drm/amd/amdkfd/kfd_topology.c int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev)
uint8_t          1412 drivers/gpu/drm/amd/amdkfd/kfd_topology.c 	uint8_t device_idx = 0;
uint8_t           125 drivers/gpu/drm/amd/amdkfd/kfd_topology.h 	uint8_t			sibling_map[CRAT_SIBLINGMAP_SIZE];
uint8_t           175 drivers/gpu/drm/amd/amdkfd/kfd_topology.h 	uint8_t				oem_id[CRAT_OEMID_LENGTH];
uint8_t           176 drivers/gpu/drm/amd/amdkfd/kfd_topology.h 	uint8_t				oem_table_id[CRAT_OEMTABLEID_LENGTH];
uint8_t          1506 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	uint8_t esi[DP_PSR_ERROR_STATUS - DP_SINK_COUNT_ESI] = { 0 };
uint8_t          1507 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	uint8_t dret;
uint8_t          1535 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		uint8_t retry;
uint8_t          1554 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 				uint8_t wret;
uint8_t          3187 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	uint8_t bpc = (uint8_t)connector->display_info.bpc;
uint8_t          4067 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		(uint8_t *)edid,
uint8_t          7508 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	uint8_t dpcd_data;
uint8_t           345 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 	uint8_t underscan_vborder;
uint8_t           346 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 	uint8_t underscan_hborder;
uint8_t           349 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 	uint8_t abm_level;
uint8_t            86 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	uint8_t str_len = 0;
uint8_t           157 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	uint8_t param_index = 0;
uint8_t           332 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	uint8_t param_index = 0;
uint8_t           492 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	uint8_t param_index = 0;
uint8_t           493 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	uint8_t param_nums = 0;
uint8_t           500 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	uint8_t custom_pattern[10] = {
uint8_t           613 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 			if ((uint8_t) param[i + 1] != 0x0)
uint8_t           620 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 				custom_pattern[i] = (uint8_t) param[i + 1];
uint8_t           778 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	uint8_t data[36];
uint8_t            63 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 	uint8_t *sadb = NULL;
uint8_t           472 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 		uint8_t *data,
uint8_t           491 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 		const uint8_t *data,
uint8_t           502 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 			address, (uint8_t *)data, size) > 0;
uint8_t           546 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 	uint8_t enable_dsc = enable ? 1 : 0;
uint8_t           595 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 		memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length);
uint8_t            61 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c static void log_dpcd(uint8_t type,
uint8_t            63 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 		     uint8_t *data,
uint8_t           226 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 			(uint8_t *)aconnector->edid,
uint8_t            36 drivers/gpu/drm/amd/display/dc/basics/conversion.c 	uint8_t integer_bits,
uint8_t            37 drivers/gpu/drm/amd/display/dc/basics/conversion.c 	uint8_t fractional_bits)
uint8_t            33 drivers/gpu/drm/amd/display/dc/basics/conversion.h 	uint8_t integer_bits,
uint8_t            34 drivers/gpu/drm/amd/display/dc/basics/conversion.h 	uint8_t fractional_bits);
uint8_t            31 drivers/gpu/drm/amd/display/dc/basics/log_helpers.c void dc_conn_log_hex_linux(const uint8_t *hex_data, int hex_data_count)
uint8_t           210 drivers/gpu/drm/amd/display/dc/basics/vector.c 	uint8_t *insert_address;
uint8_t            87 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c static uint8_t bios_parser_get_connectors_number(
uint8_t           135 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c static uint8_t get_number_of_objects(struct bios_parser *bp, uint32_t offset)
uint8_t           149 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c static uint8_t bios_parser_get_connectors_number(struct dc_bios *dcb)
uint8_t           159 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	uint8_t i)
uint8_t           678 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 		if (tbl[i].ucClockIndication != (uint8_t) id)
uint8_t          1045 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 		if (tbl[i].ucClockIndication != (uint8_t)id)
uint8_t          1286 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 		uint8_t rr = le16_to_cpu(lvds->usSupportedRefreshRate);
uint8_t          1410 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 		uint8_t min_rr =
uint8_t          1412 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 		uint8_t rr = lvds->sRefreshRateSupport.ucSupportedRefreshRate;
uint8_t          1723 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 		if (tbl[i].ucClockIndication == (uint8_t)id)
uint8_t          1759 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 		if (tbl[i].ucClockIndication == (uint8_t)id)
uint8_t          1997 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	uint8_t *number;
uint8_t          2007 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	number = GET_IMAGE(uint8_t, offset);
uint8_t          2011 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	offset += sizeof(uint8_t);
uint8_t            75 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	uint8_t bfI2C_LineMux:4;
uint8_t            76 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	uint8_t bfHW_EngineID:3;
uint8_t            77 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	uint8_t bfHW_Capable:1;
uint8_t            78 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	uint8_t ucAccess;
uint8_t           158 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c static uint8_t bios_parser_get_connectors_number(struct dc_bios *dcb)
uint8_t           173 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	uint8_t i)
uint8_t            36 drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c uint8_t *bios_get_image(struct dc_bios *bp,
uint8_t            31 drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h uint8_t *bios_get_image(struct dc_bios *bp, uint32_t offset,
uint8_t            87 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t frev, crev;
uint8_t           237 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.acConfig.ucDigSel = (uint8_t)(cntl->engine_id);
uint8_t           243 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t           246 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucLaneNum = (uint8_t)(cntl->lanes_number);
uint8_t           266 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.acConfig.ucDigSel = (uint8_t)(cntl->engine_id);
uint8_t           272 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)(bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t           275 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucLaneNum = (uint8_t)(cntl->lanes_number);
uint8_t           290 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucDigId = (uint8_t)(cntl->engine_id);
uint8_t           295 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)(bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t           298 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucLaneNum = (uint8_t)(cntl->lanes_number);
uint8_t           367 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t frev;
uint8_t           368 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t crev;
uint8_t           434 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				cpu_to_le16((uint8_t)cntl->connector_obj_id.id);
uint8_t           438 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		params.asMode.ucLaneSel = (uint8_t)cntl->lane_select;
uint8_t           439 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		params.asMode.ucLaneSet = (uint8_t)cntl->lane_settings;
uint8_t           505 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp->cmd_helper->transmitter_bp_to_atom(
uint8_t           508 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucAction = (uint8_t)cntl->action;
uint8_t           562 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				cpu_to_le16((uint8_t)(cntl->connector_obj_id.id));
uint8_t           566 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		params.asMode.ucLaneSel = (uint8_t)cntl->lane_select;
uint8_t           567 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		params.asMode.ucLaneSet = (uint8_t)cntl->lane_settings;
uint8_t           636 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)cmd->transmitter_bp_to_atom(cntl->transmitter);
uint8_t           638 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucLaneNum = (uint8_t)cntl->lanes_number;
uint8_t           640 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.acConfig.ucRefClkSource = (uint8_t)pll_id;
uint8_t           642 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucAction = (uint8_t)cntl->action;
uint8_t           694 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				cpu_to_le16((uint8_t)(cntl->connector_obj_id.id));
uint8_t           699 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		params.asMode.ucLaneSel = (uint8_t)(cntl->lane_select);
uint8_t           700 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		params.asMode.ucLaneSet = (uint8_t)(cntl->lane_settings);
uint8_t           762 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		(uint8_t)(cmd->transmitter_bp_to_atom(cntl->transmitter));
uint8_t           763 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucLaneNum = (uint8_t)(cntl->lanes_number);
uint8_t           764 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.acConfig.ucRefClkSource = (uint8_t)(ref_clk_src_id);
uint8_t           765 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucAction = (uint8_t)(cntl->action);
uint8_t           783 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucAction = (uint8_t)cntl->action;
uint8_t           784 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucLaneNum = (uint8_t)cntl->lanes_number;
uint8_t           785 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucConnObjId = (uint8_t)cntl->connector_obj_id.id;
uint8_t           797 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucDPLaneSet = (uint8_t) cntl->lane_settings;
uint8_t           844 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucAction = (uint8_t)cntl->action;
uint8_t           847 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		params.ucDPLaneSet = (uint8_t)cntl->lane_settings;
uint8_t           851 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucLaneNum = (uint8_t)cntl->lanes_number;
uint8_t           854 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucConnObjId = (uint8_t)cntl->connector_obj_id.id;
uint8_t           961 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp_params->fractional_feedback_divider;
uint8_t           963 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp_params->pixel_clock_post_divider;
uint8_t           975 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)(bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t          1017 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t controller_id;
uint8_t          1026 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.sPCLKInput.ucPpll = (uint8_t)pll_id;
uint8_t          1028 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t)(bp_params->reference_divider);
uint8_t          1034 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t)(bp_params->pixel_clock_post_divider);
uint8_t          1040 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t          1074 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t controller_id;
uint8_t          1102 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.sPCLKInput.ucPpll = (uint8_t) pll_id;
uint8_t          1104 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t) bp_params->reference_divider;
uint8_t          1110 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t) bp_params->pixel_clock_post_divider;
uint8_t          1116 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t) bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t          1152 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t controller_id;
uint8_t          1179 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.ucPpll = (uint8_t) pll_id;
uint8_t          1181 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.ucEncoderMode = (uint8_t) bp->cmd_helper->encoder_mode_bp_to_atom(bp_params->signal_type, false);
uint8_t          1185 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.ucDeepColorRatio = (uint8_t) bp->cmd_helper->transmitter_color_depth_to_atom(bp_params->color_depth);
uint8_t          1275 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp_params->ver1.step;
uint8_t          1277 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp_params->ver1.delay;
uint8_t          1280 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)(bp_params->ver1.range / 10000);
uint8_t          1471 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t          1494 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			(uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t          1541 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t dac_standard);
uint8_t          1546 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t dac_standard);
uint8_t          1572 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t dac_standard)
uint8_t          1590 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t dac_standard)
uint8_t          1611 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t dac_standard)
uint8_t          1746 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t atom_controller_id;
uint8_t          1769 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucOverscanRight = (uint8_t)bp_params->h_overscan_right;
uint8_t          1770 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucOverscanLeft = (uint8_t)bp_params->h_overscan_left;
uint8_t          1771 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucOverscanBottom = (uint8_t)bp_params->v_overscan_bottom;
uint8_t          1772 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.ucOverscanTop = (uint8_t)bp_params->v_overscan_top;
uint8_t          1819 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t atom_controller_id;
uint8_t          1930 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t id;
uint8_t          1980 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t id;
uint8_t          2048 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.sPCLKInput.ucPpll = (uint8_t) atom_pll_id;
uint8_t          2051 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.sPCLKInput.ucCRTC = (uint8_t) ATOM_CRTC_INVALID;
uint8_t          2080 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	params.sPCLKInput.ucPpll = (uint8_t)atom_pll_id;
uint8_t          2170 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	cntl_params->ucConfig = (uint8_t)((encoder.enum_id - 1) << 4);
uint8_t          2190 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t          2202 drivers/gpu/drm/amd/display/dc/bios/command_table.c 					(uint8_t)(cntl->color_depth);
uint8_t          2206 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		cntl_params->ucLaneNum = (uint8_t)(cntl->lanes_number);
uint8_t          2212 drivers/gpu/drm/amd/display/dc/bios/command_table.c 				(uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t          2214 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		cntl_params->ucLaneNum = (uint8_t)cntl->lanes_number;
uint8_t          2220 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	cntl_params->ucAction = (uint8_t)cntl->action;
uint8_t          2265 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t atom_crtc_id;
uint8_t            59 drivers/gpu/drm/amd/display/dc/bios/command_table.h 		uint8_t dac_standard);
uint8_t            64 drivers/gpu/drm/amd/display/dc/bios/command_table.h 		uint8_t dac_standard);
uint8_t            68 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t frev, crev;
uint8_t           113 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	params.digid = (uint8_t)(cntl->engine_id);
uint8_t           118 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 			(uint8_t)(bp->cmd_helper->encoder_mode_bp_to_atom(
uint8_t           121 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	params.lanenum = (uint8_t)(cntl->lanes_number);
uint8_t           178 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t frev;
uint8_t           179 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t crev;
uint8_t           203 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	ps.param.action = (uint8_t)cntl->action;
uint8_t           206 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		ps.param.mode_laneset.dplaneset = (uint8_t)cntl->lane_settings;
uint8_t           211 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	ps.param.lanenum = (uint8_t)cntl->lanes_number;
uint8_t           214 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	ps.param.connobj_id = (uint8_t)cntl->connector_obj_id.id;
uint8_t           266 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t controller_id;
uint8_t           294 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		clk.pll_id = (uint8_t) pll_id;
uint8_t           300 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		clk.encoder_mode = (uint8_t) bp->
uint8_t           307 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 			(uint8_t) bp->cmd_helper->
uint8_t           375 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t atom_controller_id;
uint8_t           497 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t id;
uint8_t           597 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t atom_crtc_id;
uint8_t           707 drivers/gpu/drm/amd/display/dc/bios/command_table2.c static unsigned int get_smu_clock_info_v3_1(struct bios_parser *bp, uint8_t id);
uint8_t           716 drivers/gpu/drm/amd/display/dc/bios/command_table2.c static unsigned int get_smu_clock_info_v3_1(struct bios_parser *bp, uint8_t id)
uint8_t            59 drivers/gpu/drm/amd/display/dc/bios/command_table2.h 		uint8_t dac_standard);
uint8_t            64 drivers/gpu/drm/amd/display/dc/bios/command_table2.h 		uint8_t dac_standard);
uint8_t            96 drivers/gpu/drm/amd/display/dc/bios/command_table2.h 			struct bios_parser *bp, uint8_t id);
uint8_t            69 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c 	uint8_t *atom_id)
uint8_t           121 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c uint8_t dal_cmd_table_helper_transmitter_bp_to_atom(
uint8_t           197 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c 		(uint8_t)(h->transmitter_bp_to_atom(control->transmitter));
uint8_t           203 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c 		(uint8_t)(h->encoder_mode_bp_to_atom(
uint8_t           205 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c 	ctrl_param->ucLaneNum = (uint8_t)(control->lanes_number);
uint8_t           240 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c uint8_t dal_cmd_table_helper_encoder_id_to_atom(
uint8_t            39 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.h 	uint8_t *atom_id);
uint8_t            54 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.h uint8_t dal_cmd_table_helper_transmitter_bp_to_atom(
uint8_t            57 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.h uint8_t dal_cmd_table_helper_encoder_id_to_atom(
uint8_t            91 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c 	uint8_t *atom_id)
uint8_t           144 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2(
uint8_t           225 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c uint8_t dal_cmd_table_helper_encoder_id_to_atom2(
uint8_t            39 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.h 	uint8_t *atom_id);
uint8_t            49 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.h uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2(
uint8_t            52 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.h uint8_t dal_cmd_table_helper_encoder_id_to_atom2(
uint8_t            35 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id);
uint8_t            36 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*encoder_action_to_atom)(
uint8_t            51 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*transmitter_bp_to_atom)(enum transmitter t);
uint8_t            52 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*encoder_id_to_atom)(enum encoder_id id);
uint8_t            53 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*clock_source_id_to_atom_phy_clk_src_id)(
uint8_t            55 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*signal_type_to_atom_dig_mode)(enum signal_type s);
uint8_t            56 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*hpd_sel_to_atom)(enum hpd_source_id id);
uint8_t            57 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*dig_encoder_sel_to_atom)(enum engine_id engine_id);
uint8_t            58 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*phy_id_to_atom)(enum transmitter t);
uint8_t            59 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*disp_power_gating_action_to_atom)(
uint8_t            63 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	uint8_t (*transmitter_color_depth_to_atom)(enum transmitter_color_depth id);
uint8_t            34 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c static uint8_t phy_id_to_atom(enum transmitter t)
uint8_t            36 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 	uint8_t atom_phy_id;
uint8_t            67 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c static uint8_t signal_type_to_atom_dig_mode(enum signal_type s)
uint8_t            69 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 	uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP;
uint8_t            97 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c static uint8_t clock_source_id_to_atom_phy_clk_src_id(
uint8_t           100 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 	uint8_t atom_phy_clk_src_id = 0;
uint8_t           123 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
uint8_t           125 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 	uint8_t atom_hpd_sel = 0;
uint8_t           154 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
uint8_t           255 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action)
uint8_t           257 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 	uint8_t atom_action = 0;
uint8_t           280 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c static uint8_t disp_power_gating_action_to_atom(
uint8_t           283 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 	uint8_t atom_pipe_action = 0;
uint8_t            34 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t phy_id_to_atom(enum transmitter t)
uint8_t            36 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	uint8_t atom_phy_id;
uint8_t            67 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t signal_type_to_atom_dig_mode(enum signal_type s)
uint8_t            69 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP;
uint8_t            94 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t clock_source_id_to_atom_phy_clk_src_id(
uint8_t            97 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	uint8_t atom_phy_clk_src_id = 0;
uint8_t           120 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
uint8_t           122 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	uint8_t atom_hpd_sel = 0;
uint8_t           151 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
uint8_t           257 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action)
uint8_t           259 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	uint8_t atom_action = 0;
uint8_t           282 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t disp_power_gating_action_to_atom(
uint8_t           285 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	uint8_t atom_pipe_action = 0;
uint8_t           330 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c static uint8_t transmitter_color_depth_to_atom(enum transmitter_color_depth id)
uint8_t           332 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	uint8_t atomColorDepth = 0;
uint8_t            34 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t phy_id_to_atom(enum transmitter t)
uint8_t            36 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	uint8_t atom_phy_id;
uint8_t            67 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t signal_type_to_atom_dig_mode(enum signal_type s)
uint8_t            69 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP;
uint8_t            94 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t clock_source_id_to_atom_phy_clk_src_id(
uint8_t            97 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	uint8_t atom_phy_clk_src_id = 0;
uint8_t           120 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
uint8_t           122 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	uint8_t atom_hpd_sel = 0;
uint8_t           151 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
uint8_t           257 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action)
uint8_t           259 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	uint8_t atom_action = 0;
uint8_t           282 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t disp_power_gating_action_to_atom(
uint8_t           285 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	uint8_t atom_pipe_action = 0;
uint8_t           330 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c static uint8_t transmitter_color_depth_to_atom(enum transmitter_color_depth id)
uint8_t           332 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	uint8_t atomColorDepth = 0;
uint8_t            36 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action)
uint8_t            38 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	uint8_t atom_action = 0;
uint8_t           152 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c static uint8_t clock_source_id_to_atom_phy_clk_src_id(
uint8_t           155 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	uint8_t atom_phy_clk_src_id = 0;
uint8_t           178 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c static uint8_t signal_type_to_atom_dig_mode(enum signal_type s)
uint8_t           180 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP;
uint8_t           208 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
uint8_t           210 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	uint8_t atom_hpd_sel = 0;
uint8_t           239 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
uint8_t           241 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	uint8_t atom_dig_encoder_sel = 0;
uint8_t           273 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c static uint8_t phy_id_to_atom(enum transmitter t)
uint8_t           275 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	uint8_t atom_phy_id;
uint8_t           306 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c static uint8_t disp_power_gating_action_to_atom(
uint8_t           309 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	uint8_t atom_pipe_action = 0;
uint8_t          3034 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		uint8_t yclk_lvl, sclk_lvl;
uint8_t            94 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 	uint8_t j;
uint8_t           957 drivers/gpu/drm/amd/display/dc/core/dc.c 	uint8_t i;
uint8_t          1030 drivers/gpu/drm/amd/display/dc/core/dc.c 	uint8_t stream_count)
uint8_t          1668 drivers/gpu/drm/amd/display/dc/core/dc.c 	uint8_t i;
uint8_t          2264 drivers/gpu/drm/amd/display/dc/core/dc.c uint8_t dc_get_current_stream_count(struct dc *dc)
uint8_t          2269 drivers/gpu/drm/amd/display/dc/core/dc.c struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i)
uint8_t          2427 drivers/gpu/drm/amd/display/dc/core/dc.c 		const uint8_t *edid,
uint8_t           352 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t retry = 0;
uint8_t           526 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t link_bw_set;
uint8_t           527 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t link_rate_set;
uint8_t           745 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t i;
uint8_t          1212 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t i;
uint8_t          1679 drivers/gpu/drm/amd/display/dc/core/dc_link.c 		uint8_t address, uint8_t *buffer, uint32_t length)
uint8_t          1710 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t slave_address = (settings->slv_addr >> 1);
uint8_t          1711 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t buffer[2];
uint8_t          1712 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	const uint8_t apply_rx_tx_change = 0x4;
uint8_t          1713 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t offset = 0xA;
uint8_t          1714 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t value = 0;
uint8_t          1875 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t slave_address = (0xBA >> 1);
uint8_t          1876 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t buffer[2];
uint8_t          2001 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t slave_address = (0xF0 >> 1);
uint8_t          2002 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t buffer[16];
uint8_t          2524 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t i;
uint8_t          2602 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	uint8_t i;
uint8_t            49 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t version[2];
uint8_t            50 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t size;
uint8_t            55 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c static const uint8_t dp_hdmi_dongle_signature_str[] = "DP-HDMI ADAPTOR";
uint8_t            60 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t eot;/* end of transmition '\x4' */
uint8_t            77 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t byte[2];
uint8_t            79 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t STATUS_UPDATE:1;
uint8_t            80 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CED_UPDATE:1;
uint8_t            81 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RR_TEST:1;
uint8_t            82 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED:5;
uint8_t            83 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED2:8;
uint8_t            88 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t byte[2];
uint8_t            90 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CLOCK_DETECTED:1;
uint8_t            91 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH0_LOCKED:1;
uint8_t            92 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH1_LOCKED:1;
uint8_t            93 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH2_LOCKED:1;
uint8_t            94 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED:4;
uint8_t            95 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED2:8;
uint8_t            96 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED3:8;
uint8_t           102 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t byte[7];
uint8_t           104 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH0_8LOW:8;
uint8_t           105 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH0_7HIGH:7;
uint8_t           106 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH0_VALID:1;
uint8_t           107 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH1_8LOW:8;
uint8_t           108 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH1_7HIGH:7;
uint8_t           109 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH1_VALID:1;
uint8_t           110 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH2_8LOW:8;
uint8_t           111 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH2_7HIGH:7;
uint8_t           112 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CH2_VALID:1;
uint8_t           113 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t CHECKSUM:8;
uint8_t           114 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED:8;
uint8_t           115 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED2:8;
uint8_t           116 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED3:8;
uint8_t           117 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t RESERVED4:4;
uint8_t           173 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t *data,
uint8_t           340 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t *buffer,
uint8_t           343 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t offs_data = 0;
uint8_t           372 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t i;
uint8_t           375 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t type2_dongle_buf[DP_ADAPTOR_TYPE2_SIZE];
uint8_t           506 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t *write_buf,
uint8_t           508 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t *read_buf,
uint8_t           634 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t slave_address = HDMI_SCDC_ADDRESS;
uint8_t           635 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t offset = HDMI_SCDC_SINK_VERSION;
uint8_t           636 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t sink_version = 0;
uint8_t           637 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t write_buffer[2] = {0};
uint8_t           665 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t slave_address = HDMI_SCDC_ADDRESS;
uint8_t           666 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t offset = HDMI_SCDC_TMDS_CONFIG;
uint8_t           667 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 	uint8_t tmds_config = 0;
uint8_t           673 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c 		uint8_t scramble_status = 0;
uint8_t            67 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			(uint8_t *)&training_rd_interval,
uint8_t           131 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t rate;
uint8_t           137 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	downspread.raw = (uint8_t)
uint8_t           166 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		rate = (uint8_t) (lt_settings->link_settings.link_rate);
uint8_t           232 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t dpcd_lt_buffer[5] = {0};
uint8_t           259 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		(uint8_t)(lt_settings->lane_settings[lane].VOLTAGE_SWING);
uint8_t           261 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		(uint8_t)(lt_settings->lane_settings[lane].PRE_EMPHASIS);
uint8_t           302 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			(uint8_t *)(dpcd_lane),
uint8_t           372 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static uint8_t get_nibble_at_index(const uint8_t *buf,
uint8_t           375 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t nibble;
uint8_t           500 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t dpcd_buf[6] = {0};
uint8_t           510 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		(uint8_t *)(dpcd_buf),
uint8_t           584 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			(uint8_t)(link_training_setting->
uint8_t           587 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			(uint8_t)(link_training_setting->
uint8_t           601 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		(uint8_t *)(dpcd_lane),
uint8_t          1241 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t j;
uint8_t          1242 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t delay_between_attempts = LINK_TRAINING_RETRY_DELAY;
uint8_t          1450 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		uint8_t tmp[DP_SINK_STATUS_ESI - DP_SINK_COUNT_ESI + 1];
uint8_t          1476 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t irq_reg_rx_power_state = 0;
uint8_t          1651 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t i = 0;
uint8_t          2528 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		(uint8_t *)&dp_id,
uint8_t          2545 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t data, struct dc_link *link)
uint8_t          2583 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		uint8_t det_caps[16]; /* CTS 4.2.2.7 expects source to read Detailed Capabilities Info : 00080h-0008F.*/
uint8_t          2653 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			(uint8_t *)&dp_hw_fw_revision,
uint8_t          2666 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static void dp_wa_power_up_0010FA(struct dc_link *link, uint8_t *dpcd_data,
uint8_t          2710 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t dpcd_data[DP_ADAPTER_CAP - DP_DPCD_REV + 1];
uint8_t          2714 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t dpcd_dprx_data = '\0';
uint8_t          2715 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t dpcd_power_state = '\0';
uint8_t          2768 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			uint8_t ext_cap_data[16];
uint8_t          2869 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			(uint8_t *)(&sink_id),
uint8_t          2884 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		uint8_t str_mbp_2017[] = { 101, 68, 21, 101, 98, 97 };
uint8_t          2896 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		(uint8_t *)&dp_hw_fw_revision,
uint8_t          2988 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t supported_link_rates[16];
uint8_t          3219 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 				(uint8_t *)p_custom_pattern,
uint8_t          3255 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 				(uint8_t *)p_custom_pattern,
uint8_t          3461 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t fec_config = 0;
uint8_t            25 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 	uint8_t *data,
uint8_t            40 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 	const uint8_t *data,
uint8_t            54 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 	uint8_t state;
uint8_t           254 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 	uint8_t *custom_pattern,
uint8_t           497 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		uint8_t dsc_packed_pps[128];
uint8_t          2103 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		uint8_t chk_sum = 0;
uint8_t          2104 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		uint8_t *ptr;
uint8_t          2105 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		uint8_t i;
uint8_t          2113 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		gamut_packet->sb[2] = (uint8_t) (0x100 - chk_sum);
uint8_t          2127 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	uint8_t itc_value = 0;
uint8_t          2128 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	uint8_t cn0_cn1 = 0;
uint8_t          2130 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	uint8_t *check_sum = NULL;
uint8_t          2131 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	uint8_t byte_index = 0;
uint8_t          2363 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	*check_sum = (uint8_t) (0x100 - *check_sum);
uint8_t           214 drivers/gpu/drm/amd/display/dc/core/dc_stream.c 	uint8_t i;
uint8_t           487 drivers/gpu/drm/amd/display/dc/core/dc_stream.c 	uint8_t i;
uint8_t           505 drivers/gpu/drm/amd/display/dc/core/dc_stream.c 		const uint8_t *custom_sdp_message,
uint8_t           545 drivers/gpu/drm/amd/display/dc/core/dc_stream.c 	uint8_t i;
uint8_t            29 drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c void vm_helper_mark_vmid_used(struct vm_helper *vm_helper, unsigned int pos, uint8_t hubp_idx)
uint8_t           437 drivers/gpu/drm/amd/display/dc/dc.h 	uint8_t		page_table_depth; // 1 = 1 level, 2 = 2 level, etc.  0 = invalid
uint8_t           473 drivers/gpu/drm/amd/display/dc/dc.h 	uint8_t link_count;
uint8_t           556 drivers/gpu/drm/amd/display/dc/dc.h 	uint8_t reserved;
uint8_t           866 drivers/gpu/drm/amd/display/dc/dc.h 	uint8_t plane_count;
uint8_t           932 drivers/gpu/drm/amd/display/dc/dc.h 	uint8_t edp_supported_link_rates_count;
uint8_t            42 drivers/gpu/drm/amd/display/dc/dc_bios_types.h 	uint8_t (*get_connectors_number)(struct dc_bios *bios);
uint8_t            46 drivers/gpu/drm/amd/display/dc/dc_bios_types.h 		uint8_t connector_index);
uint8_t           144 drivers/gpu/drm/amd/display/dc/dc_bios_types.h 	uint8_t *bios;
uint8_t           147 drivers/gpu/drm/amd/display/dc/dc_bios_types.h 	uint8_t *bios_local_image;
uint8_t            62 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t delay;
uint8_t            64 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t *data;
uint8_t            86 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t *data;
uint8_t            91 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t address;
uint8_t            93 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t *data;
uint8_t           104 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t number_of_payloads;
uint8_t           134 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t EDID_QUERY_DONE_ONCE:1;
uint8_t           135 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t IS_INTERNAL_DISPLAY:1;
uint8_t           136 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t FORCE_READ_REPEATED_START:1;
uint8_t           137 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t EDID_STRESS_READ:1;
uint8_t           173 drivers/gpu/drm/amd/display/dc/dc_ddc_types.h 	uint8_t edid_buf[DC_MAX_EDID_BUFFER_SIZE];
uint8_t           105 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t link_rate_set;
uint8_t           139 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MINOR:4;
uint8_t           140 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MAJOR:4;
uint8_t           142 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           147 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MAX_LANE_COUNT:5;
uint8_t           148 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t POST_LT_ADJ_REQ_SUPPORTED:1;
uint8_t           149 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t TPS3_SUPPORTED:1;
uint8_t           150 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t ENHANCED_FRAME_CAP:1;
uint8_t           152 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           157 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MAX_DOWN_SPREAD:1;
uint8_t           158 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:5;
uint8_t           159 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t NO_AUX_HANDSHAKE_LINK_TRAINING:1;
uint8_t           160 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t TPS4_SUPPORTED:1;
uint8_t           162 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           167 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MST_CAP:1;
uint8_t           168 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:7;
uint8_t           170 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           175 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t LANE_COUNT_SET:5;
uint8_t           176 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t POST_LT_ADJ_REQ_GRANTED:1;
uint8_t           177 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:1;
uint8_t           178 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t ENHANCED_FRAMING:1;
uint8_t           180 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           185 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t CR_DONE_0:1;
uint8_t           186 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t CHANNEL_EQ_DONE_0:1;
uint8_t           187 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SYMBOL_LOCKED_0:1;
uint8_t           188 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED0:1;
uint8_t           189 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t CR_DONE_1:1;
uint8_t           190 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t CHANNEL_EQ_DONE_1:1;
uint8_t           191 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SYMBOL_LOCKED_1:1;
uint8_t           192 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED_1:1;
uint8_t           194 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           199 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t REMOTE_CONTROL_CMD_PENDING:1;
uint8_t           200 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t AUTOMATED_TEST:1;
uint8_t           201 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t CP_IRQ:1;
uint8_t           202 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MCCS_IRQ:1;
uint8_t           203 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DOWN_REP_MSG_RDY:1;
uint8_t           204 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t UP_REQ_MSG_RDY:1;
uint8_t           205 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SINK_SPECIFIC:1;
uint8_t           206 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t reserved:1;
uint8_t           208 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           213 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SINK_COUNT:6;
uint8_t           214 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t CPREADY:1;
uint8_t           215 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:1;
uint8_t           217 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           222 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t INTERLANE_ALIGN_DONE:1;
uint8_t           223 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t POST_LT_ADJ_REQ_IN_PROGRESS:1;
uint8_t           224 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:4;
uint8_t           225 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DOWNSTREAM_PORT_STATUS_CHANGED:1;
uint8_t           226 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t LINK_STATUS_UPDATED:1;
uint8_t           228 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           233 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t VOLTAGE_SWING_LANE:2;
uint8_t           234 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t PRE_EMPHASIS_LANE:2;
uint8_t           235 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:4;
uint8_t           237 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           242 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t TRAINING_PATTERN_SET:4;
uint8_t           243 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RECOVERED_CLOCK_OUT_EN:1;
uint8_t           244 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SCRAMBLING_DISABLE:1;
uint8_t           245 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SYMBOL_ERROR_COUNT_SEL:2;
uint8_t           248 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t TRAINING_PATTERN_SET:2;
uint8_t           249 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t LINK_QUAL_PATTERN_SET:2;
uint8_t           250 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:4;
uint8_t           252 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           260 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t VOLTAGE_SWING_SET:2;
uint8_t           261 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MAX_SWING_REACHED:1;
uint8_t           262 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t PRE_EMPHASIS_SET:2;
uint8_t           263 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MAX_PRE_EMPHASIS_REACHED:1;
uint8_t           264 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:2;
uint8_t           266 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           272 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DWN_STRM_PORTX_TYPE:3;
uint8_t           273 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DWN_STRM_PORTX_HPD:1;
uint8_t           274 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVERD:4;
uint8_t           276 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           291 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t MAX_BITS_PER_COLOR_COMPONENT:2;
uint8_t           292 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:6;
uint8_t           294 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           298 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t byte;
uint8_t           300 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t PORT_PRESENT:1;
uint8_t           301 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t PORT_TYPE:2;
uint8_t           302 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t FMT_CONVERSION:1;
uint8_t           303 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DETAILED_CAPS:1;
uint8_t           304 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:3;
uint8_t           310 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED1:1;
uint8_t           311 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DUAL_LINK:1;
uint8_t           312 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t HIGH_COLOR_DEPTH:1;
uint8_t           313 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED2:5;
uint8_t           315 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           320 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t FRAME_SEQ_TO_FRAME_PACK:1;
uint8_t           321 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t YCrCr422_PASS_THROUGH:1;
uint8_t           322 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t YCrCr420_PASS_THROUGH:1;
uint8_t           323 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t YCrCr422_CONVERSION:1;
uint8_t           324 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t YCrCr420_CONVERSION:1;
uint8_t           325 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:3;
uint8_t           327 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           361 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RX_PORT0_STATUS:1;
uint8_t           362 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RX_PORT1_STATUS:1;
uint8_t           363 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:6;
uint8_t           365 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           379 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw[6];
uint8_t           384 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DOWN_STR_PORT_COUNT:4;
uint8_t           385 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:2; /*Bits 5:4 = RESERVED. Read all 0s.*/
uint8_t           390 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t IGNORE_MSA_TIMING_PARAM:1;
uint8_t           395 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t OUI_SUPPORT:1;
uint8_t           397 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           402 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED1:4;/* Bit 3:0 = RESERVED. Read all 0s*/
uint8_t           407 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SPREAD_AMP:1;
uint8_t           408 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED2:2;/*Bit 6:5 = RESERVED. Read all 0s*/
uint8_t           412 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t IGNORE_MSA_TIMING_PARAM:1;
uint8_t           414 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           419 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t PANEL_MODE_EDP:1;
uint8_t           420 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t FRAMING_CHANGE_ENABLE:1;
uint8_t           421 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:5;
uint8_t           422 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t PANEL_SELF_TEST_ENABLE:1;
uint8_t           424 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           428 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t ieee_oui[3];/*24-bit IEEE OUI*/
uint8_t           429 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t ieee_device_id[6];/*usually 6-byte ASCII name*/
uint8_t           433 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t ieee_hw_rev;
uint8_t           434 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t ieee_fw_rev[2];
uint8_t           440 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t ALT_SCRAMBLER_RESET:1;
uint8_t           441 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t FRAMING_CHANGE:1;
uint8_t           442 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:1;
uint8_t           443 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t DPCD_DISPLAY_CONTROL_CAPABLE:1;
uint8_t           444 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED2:4;
uint8_t           446 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           451 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t GTC_CAP:1;                             // bit 0: DP 1.3+
uint8_t           452 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t SST_SPLIT_SDP_CAP:1;                   // bit 1: DP 1.4
uint8_t           453 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t AV_SYNC_CAP:1;                         // bit 2: DP 1.3+
uint8_t           454 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t VSC_SDP_COLORIMETRY_SUPPORTED:1;       // bit 3: DP 1.3+
uint8_t           455 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t VSC_EXT_VESA_SDP_SUPPORTED:1;          // bit 4: DP 1.4
uint8_t           456 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t VSC_EXT_VESA_SDP_CHAINING_SUPPORTED:1; // bit 5: DP 1.4
uint8_t           457 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t VSC_EXT_CEA_SDP_SUPPORTED:1;           // bit 6: DP 1.4
uint8_t           458 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t VSC_EXT_CEA_SDP_CHAINING_SUPPORTED:1;  // bit 7: DP 1.4
uint8_t           460 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           465 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t TRAINIG_AUX_RD_INTERVAL:7;
uint8_t           466 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t EXT_RECEIVER_CAP_FIELD_PRESENT:1;
uint8_t           468 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           474 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t LINK_TRAINING         :1;
uint8_t           475 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t LINK_TEST_PATTRN      :1;
uint8_t           476 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t EDID_READ             :1;
uint8_t           477 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t PHY_TEST_PATTERN      :1;
uint8_t           478 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t AUDIO_TEST_PATTERN    :1;
uint8_t           479 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED              :1;
uint8_t           480 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TEST_STEREO_3D        :1;
uint8_t           482 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           487 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t ACK         :1;
uint8_t           488 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t NO_ACK      :1;
uint8_t           489 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t EDID_CHECKSUM_WRITE:1;
uint8_t           490 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED    :5;
uint8_t           492 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           500 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t PATTERN     :3;
uint8_t           502 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED    :5;
uint8_t           504 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           543 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t FEC_CAPABLE:1;
uint8_t           544 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t UNCORRECTED_BLOCK_ERROR_COUNT_CAPABLE:1;
uint8_t           545 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t CORRECTED_BLOCK_ERROR_COUNT_CAPABLE:1;
uint8_t           546 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t BIT_ERROR_COUNT_CAPABLE:1;
uint8_t           547 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t RESERVED:4;
uint8_t           549 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw;
uint8_t           554 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t DSC_SUPPORT		:1;
uint8_t           555 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t DSC_PASSTHROUGH_SUPPORT	:1;
uint8_t           556 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED		:6;
uint8_t           560 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t DSC_VERSION_MAJOR	:4;
uint8_t           561 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t DSC_VERSION_MINOR	:4;
uint8_t           565 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RC_BLOCK_BUFFER_SIZE	:2;
uint8_t           566 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED		:6;
uint8_t           570 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t ONE_SLICE_PER_DP_DSC_SINK_DEVICE	:1;
uint8_t           571 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TWO_SLICES_PER_DP_DSC_SINK_DEVICE	:1;
uint8_t           572 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED				:1;
uint8_t           573 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t FOUR_SLICES_PER_DP_DSC_SINK_DEVICE	:1;
uint8_t           574 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t SIX_SLICES_PER_DP_DSC_SINK_DEVICE	:1;
uint8_t           575 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t EIGHT_SLICES_PER_DP_DSC_SINK_DEVICE	:1;
uint8_t           576 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TEN_SLICES_PER_DP_DSC_SINK_DEVICE	:1;
uint8_t           577 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TWELVE_SLICES_PER_DP_DSC_SINK_DEVICE	:1;
uint8_t           581 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t LINE_BUFFER_BIT_DEPTH	:4;
uint8_t           582 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED		:4;
uint8_t           586 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t BLOCK_PREDICTION_SUPPORT:1;
uint8_t           587 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED		:7;
uint8_t           591 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t MAXIMUM_BITS_PER_PIXEL_SUPPORTED_BY_THE_DECOMPRESSOR_LOW	:7;
uint8_t           592 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t MAXIMUM_BITS_PER_PIXEL_SUPPORTED_BY_THE_DECOMPRESSOR_HIGH	:7;
uint8_t           593 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED							:2;
uint8_t           597 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RGB_SUPPORT			:1;
uint8_t           598 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t Y_CB_CR_444_SUPPORT		:1;
uint8_t           599 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t Y_CB_CR_SIMPLE_422_SUPPORT	:1;
uint8_t           600 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t Y_CB_CR_NATIVE_422_SUPPORT	:1;
uint8_t           601 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t Y_CB_CR_NATIVE_420_SUPPORT	:1;
uint8_t           602 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED			:3;
uint8_t           606 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED0			:1;
uint8_t           607 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t EIGHT_BITS_PER_COLOR_SUPPORT	:1;
uint8_t           608 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TEN_BITS_PER_COLOR_SUPPORT	:1;
uint8_t           609 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TWELVE_BITS_PER_COLOR_SUPPORT	:1;
uint8_t           610 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED1			:4;
uint8_t           614 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t THROUGHPUT_MODE_0:4;
uint8_t           615 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t THROUGHPUT_MODE_1:4;
uint8_t           619 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t SIXTEEN_SLICES_PER_DSC_SINK_DEVICE	:1;
uint8_t           620 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TWENTY_SLICES_PER_DSC_SINK_DEVICE	:1;
uint8_t           621 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t TWENTYFOUR_SLICES_PER_DSC_SINK_DEVICE	:1;
uint8_t           622 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED				:5;
uint8_t           626 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t INCREMENT_OF_BITS_PER_PIXEL_SUPPORTED	:3;
uint8_t           627 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t RESERVED				:5;
uint8_t           634 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t dsc_rc_buffer_size;
uint8_t           642 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t dsc_maximum_slice_width;
uint8_t           644 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t reserved;
uint8_t           647 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw[16];
uint8_t           652 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t BRANCH_OVERALL_THROUGHPUT_0;
uint8_t           653 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t BRANCH_OVERALL_THROUGHPUT_1;
uint8_t           654 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 		uint8_t BRANCH_MAX_LINE_WIDTH;
uint8_t           656 drivers/gpu/drm/amd/display/dc/dc_dp_types.h 	uint8_t raw[3];
uint8_t            43 drivers/gpu/drm/amd/display/dc/dc_dsc.h bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data,
uint8_t            44 drivers/gpu/drm/amd/display/dc/dc_dsc.h 		const uint8_t *dpcd_dsc_ext_data,
uint8_t            49 drivers/gpu/drm/amd/display/dc/dc_helper.c 	uint8_t shift)
uint8_t            59 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t field_value1,
uint8_t            82 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t field_value1,
uint8_t           105 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t field_value1,
uint8_t           144 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift, uint32_t mask, uint32_t *field_value)
uint8_t           152 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           153 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2)
uint8_t           162 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           163 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           164 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3)
uint8_t           174 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           175 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           176 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           177 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4)
uint8_t           188 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           189 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           190 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           191 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           192 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5)
uint8_t           204 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           205 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           206 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           207 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           208 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
uint8_t           209 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift6, uint32_t mask6, uint32_t *field_value6)
uint8_t           222 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           223 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           224 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           225 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           226 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
uint8_t           227 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift6, uint32_t mask6, uint32_t *field_value6,
uint8_t           228 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift7, uint32_t mask7, uint32_t *field_value7)
uint8_t           242 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           243 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           244 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           245 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           246 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
uint8_t           247 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift6, uint32_t mask6, uint32_t *field_value6,
uint8_t           248 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift7, uint32_t mask7, uint32_t *field_value7,
uint8_t           249 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift8, uint32_t mask8, uint32_t *field_value8)
uint8_t           359 drivers/gpu/drm/amd/display/dc/dc_helper.c 		uint8_t shift1, uint32_t mask1, uint32_t field_value1,
uint8_t           103 drivers/gpu/drm/amd/display/dc/dc_hw_types.h 	uint8_t vmid;
uint8_t            49 drivers/gpu/drm/amd/display/dc/dc_link.h 	uint8_t vcp_id;
uint8_t            51 drivers/gpu/drm/amd/display/dc/dc_link.h 	uint8_t slot_count;
uint8_t            99 drivers/gpu/drm/amd/display/dc/dc_link.h 	uint8_t ddc_hw_inst;
uint8_t           101 drivers/gpu/drm/amd/display/dc/dc_link.h 	uint8_t hpd_src;
uint8_t           103 drivers/gpu/drm/amd/display/dc/dc_link.h 	uint8_t link_enc_hw_inst;
uint8_t           209 drivers/gpu/drm/amd/display/dc/dc_link.h 		const uint8_t *edid,
uint8_t           154 drivers/gpu/drm/amd/display/dc/dc_stream.h 	uint8_t qs_bit;
uint8_t           155 drivers/gpu/drm/amd/display/dc/dc_stream.h 	uint8_t qy_bit;
uint8_t           207 drivers/gpu/drm/amd/display/dc/dc_stream.h 		uint8_t otg_offset;
uint8_t           276 drivers/gpu/drm/amd/display/dc/dc_stream.h uint8_t dc_get_current_stream_count(struct dc *dc);
uint8_t           277 drivers/gpu/drm/amd/display/dc/dc_stream.h struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
uint8_t           288 drivers/gpu/drm/amd/display/dc/dc_stream.h 		const uint8_t *custom_sdp_message,
uint8_t           367 drivers/gpu/drm/amd/display/dc/dc_stream.h 	uint8_t stream_count);
uint8_t           164 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t format_code; /* ucData[0] [6:3]*/
uint8_t           165 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t channel_count; /* ucData[0] [2:0]*/
uint8_t           166 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t sample_rate; /* ucData[1]*/
uint8_t           168 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t sample_size; /* for LPCM*/
uint8_t           170 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t max_bit_rate;
uint8_t           171 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t audio_codec_vendor_specific; /* for Audio Formats 9-15*/
uint8_t           177 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t raw_edid[DC_MAX_EDID_BUFFER_SIZE];
uint8_t           213 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t manufacture_week;
uint8_t           214 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t manufacture_year;
uint8_t           215 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t display_name[AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS];
uint8_t           218 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t speaker_flags;
uint8_t           226 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t qs_bit;
uint8_t           227 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t qy_bit;
uint8_t           462 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RATE_32:1;
uint8_t           463 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RATE_44_1:1;
uint8_t           464 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RATE_48:1;
uint8_t           465 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RATE_88_2:1;
uint8_t           466 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RATE_96:1;
uint8_t           467 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RATE_176_4:1;
uint8_t           468 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RATE_192:1;
uint8_t           471 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t all;
uint8_t           498 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t all;
uint8_t           531 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t channel_count;
uint8_t           536 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t sample_size;
uint8_t           538 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t max_bit_rate;
uint8_t           540 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t vendor_specific;
uint8_t           549 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t display_name[AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS];
uint8_t           571 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb0;
uint8_t           572 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb1;
uint8_t           573 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb2;
uint8_t           574 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb3;
uint8_t           575 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t sb[32];
uint8_t           580 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb0;
uint8_t           581 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb1;
uint8_t           582 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb2;
uint8_t           583 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t hb3;
uint8_t           584 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t sb[128];
uint8_t           746 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_1 : 1;
uint8_t           747 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_2 : 1;
uint8_t           748 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RESERVED : 1;
uint8_t           749 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_4 : 1;
uint8_t           750 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_6 : 1;
uint8_t           751 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_8 : 1;
uint8_t           752 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_10 : 1;
uint8_t           753 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_12 : 1;
uint8_t           755 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t raw;
uint8_t           760 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_16 : 1;
uint8_t           761 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_20 : 1;
uint8_t           762 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t NUM_SLICES_24 : 1;
uint8_t           763 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RESERVED : 5;
uint8_t           765 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t raw;
uint8_t           770 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RGB : 1;
uint8_t           771 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t YCBCR_444 : 1;
uint8_t           772 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t YCBCR_SIMPLE_422 : 1;
uint8_t           773 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t YCBCR_NATIVE_422 : 1;
uint8_t           774 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t YCBCR_NATIVE_420 : 1;
uint8_t           775 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RESERVED : 3;
uint8_t           777 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t raw;
uint8_t           782 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RESERVED1 : 1;
uint8_t           783 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t COLOR_DEPTH_8_BPC : 1;
uint8_t           784 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t COLOR_DEPTH_10_BPC : 1;
uint8_t           785 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t COLOR_DEPTH_12_BPC : 1;
uint8_t           786 drivers/gpu/drm/amd/display/dc/dc_types.h 		uint8_t RESERVED2 : 3;
uint8_t           788 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t raw;
uint8_t           793 drivers/gpu/drm/amd/display/dc/dc_types.h 	uint8_t dsc_version;
uint8_t           140 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 	uint8_t bit_count;
uint8_t           200 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	ABM_REG_FIELD_LIST(uint8_t);
uint8_t           514 drivers/gpu/drm/amd/display/dc/dce/dce_audio.c 			uint8_t byte2 = audio_mode->max_bit_rate;
uint8_t            86 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t AZALIA_ENDPOINT_REG_INDEX;
uint8_t            87 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t AZALIA_ENDPOINT_REG_DATA;
uint8_t            89 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t AUDIO_RATE_CAPABILITIES;
uint8_t            90 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t CLKSTOP;
uint8_t            91 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t EPSS;
uint8_t            93 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t DCCG_AUDIO_DTO0_SOURCE_SEL;
uint8_t            94 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t DCCG_AUDIO_DTO_SEL;
uint8_t            95 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t DCCG_AUDIO_DTO0_MODULE;
uint8_t            96 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t DCCG_AUDIO_DTO0_PHASE;
uint8_t            97 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t DCCG_AUDIO_DTO1_MODULE;
uint8_t            98 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t DCCG_AUDIO_DTO1_PHASE;
uint8_t            99 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h 	uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
uint8_t           261 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 			      uint8_t *buffer, uint8_t *reply_result,
uint8_t           287 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 		*reply_result = (uint8_t)reply_result_32;
uint8_t           315 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	uint8_t *returned_bytes)
uint8_t           459 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	uint8_t returned_bytes = 0;
uint8_t           512 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	uint8_t reply;
uint8_t           546 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	uint8_t j;
uint8_t           143 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	CS_REG_FIELD_LIST(uint8_t)
uint8_t           152 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_REG_FIELD_LIST(uint8_t);
uint8_t           806 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWSEQ_REG_FIELD_LIST(uint8_t)
uint8_t           807 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWSEQ_DCN_REG_FIELD_LIST(uint8_t)
uint8_t            73 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c 	uint8_t *returned_bytes)
uint8_t           122 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c 	uint8_t *buffer = reply->data;
uint8_t           180 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c 	uint8_t *buffer = request->data;
uint8_t           542 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c 	request.address = (uint8_t) ((payload->address << 1) | !payload->write);
uint8_t           582 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c 	uint8_t index_of_payload = 0;
uint8_t           144 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_ENABLE;
uint8_t           145 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_TIME_LIMIT;
uint8_t           146 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_DATA_DRIVE_EN;
uint8_t           147 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_CLK_DRIVE_EN;
uint8_t           148 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_DATA_DRIVE_SEL;
uint8_t           149 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_INTRA_TRANSACTION_DELAY;
uint8_t           150 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_INTRA_BYTE_DELAY;
uint8_t           151 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_HW_STATUS;
uint8_t           152 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_DONE_USING_I2C_REG;
uint8_t           153 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_USE_I2C_REG_REQ;
uint8_t           154 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_NO_QUEUED_SW_GO;
uint8_t           155 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_PRIORITY;
uint8_t           156 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SOFT_RESET;
uint8_t           157 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_STATUS_RESET;
uint8_t           158 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_GO;
uint8_t           159 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SEND_RESET;
uint8_t           160 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_TRANSACTION_COUNT;
uint8_t           161 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC_SELECT;
uint8_t           162 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_PRESCALE;
uint8_t           163 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_THRESHOLD;
uint8_t           164 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_START_STOP_TIMING_CNTL;
uint8_t           165 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_STOPPED_ON_NACK;
uint8_t           166 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_TIMEOUT;
uint8_t           167 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_ABORTED;
uint8_t           168 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_DONE;
uint8_t           169 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_SW_STATUS;
uint8_t           170 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_STOP_ON_NACK0;
uint8_t           171 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_START0;
uint8_t           172 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_RW0;
uint8_t           173 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_STOP0;
uint8_t           174 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_COUNT0;
uint8_t           175 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DATA_RW;
uint8_t           176 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DATA;
uint8_t           177 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_INDEX;
uint8_t           178 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_INDEX_WRITE;
uint8_t           179 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t XTAL_REF_DIV;
uint8_t           181 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_DDC1_SEND_RESET_LENGTH;
uint8_t           183 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t DC_I2C_REG_RW_CNTL_STATUS;
uint8_t           258 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t address;
uint8_t           260 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h 	uint8_t *data;
uint8_t           126 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	uint8_t byte)
uint8_t           183 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	uint8_t *byte,
uint8_t           188 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	uint8_t data = 0;
uint8_t           280 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	uint8_t address,
uint8_t           282 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	const uint8_t *data)
uint8_t           302 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	uint8_t address,
uint8_t           304 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	uint8_t *data)
uint8_t           484 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	request.address = (uint8_t) ((payload->address << 1) | !payload->write);
uint8_t           502 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 	uint8_t index_of_payload = 0;
uint8_t           191 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h 	IPP_REG_FIELD_LIST(uint8_t);
uint8_t           332 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 	const uint8_t *pattern)
uint8_t           455 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c static uint8_t get_frontend_source(
uint8_t           319 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	MI_REG_FIELD_LIST(uint8_t)
uint8_t           327 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	uint8_t single_head_rdreq_dmif_limit;
uint8_t           240 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h 	OPP_REG_FIELD_LIST(uint8_t)
uint8_t           287 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 	uint8_t synchronous_clock = 0; /* asynchronous mode */
uint8_t           288 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 	uint8_t colorimetry_bpc;
uint8_t           289 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 	uint8_t dynamic_range_rgb = 0; /*full range*/
uint8_t           290 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 	uint8_t dynamic_range_ycbcr = 1; /*bt709*/
uint8_t          1134 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 	uint8_t all;
uint8_t           372 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_INDEX;
uint8_t           373 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC0_UPDATE;
uint8_t           374 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC2_UPDATE;
uint8_t           375 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_HB0;
uint8_t           376 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_HB1;
uint8_t           377 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_HB2;
uint8_t           378 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_HB3;
uint8_t           379 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_LOCK_STATUS;
uint8_t           380 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_CONFLICT;
uint8_t           381 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC_CONFLICT_CLR;
uint8_t           382 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC0_FRAME_UPDATE_PENDING;
uint8_t           383 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC1_FRAME_UPDATE_PENDING;
uint8_t           384 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC2_FRAME_UPDATE_PENDING;
uint8_t           385 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC3_FRAME_UPDATE_PENDING;
uint8_t           386 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC4_FRAME_UPDATE_PENDING;
uint8_t           387 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC5_FRAME_UPDATE_PENDING;
uint8_t           388 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC6_FRAME_UPDATE_PENDING;
uint8_t           389 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC7_FRAME_UPDATE_PENDING;
uint8_t           390 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC0_FRAME_UPDATE;
uint8_t           391 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC1_FRAME_UPDATE;
uint8_t           392 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC2_FRAME_UPDATE;
uint8_t           393 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC3_FRAME_UPDATE;
uint8_t           394 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC4_FRAME_UPDATE;
uint8_t           395 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC5_FRAME_UPDATE;
uint8_t           396 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC6_FRAME_UPDATE;
uint8_t           397 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_GENERIC7_FRAME_UPDATE;
uint8_t           398 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GENERIC0_CONT;
uint8_t           399 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GENERIC0_SEND;
uint8_t           400 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GENERIC0_LINE;
uint8_t           401 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GENERIC1_CONT;
uint8_t           402 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GENERIC1_SEND;
uint8_t           403 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GENERIC1_LINE;
uint8_t           404 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_PIXEL_ENCODING;
uint8_t           405 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_COMPONENT_DEPTH;
uint8_t           406 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_DYN_RANGE;
uint8_t           407 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_YCBCR_RANGE;
uint8_t           408 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_PACKET_GEN_VERSION;
uint8_t           409 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_KEEPOUT_MODE;
uint8_t           410 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_DEEP_COLOR_ENABLE;
uint8_t           411 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_CLOCK_CHANNEL_RATE;
uint8_t           412 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_DEEP_COLOR_DEPTH;
uint8_t           413 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GC_CONT;
uint8_t           414 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GC_SEND;
uint8_t           415 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_NULL_SEND;
uint8_t           416 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_DATA_SCRAMBLE_EN;
uint8_t           417 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_AUDIO_INFO_SEND;
uint8_t           418 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_AUDIO_INFO_UPDATE;
uint8_t           419 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_AUDIO_INFO_LINE;
uint8_t           420 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_GC_AVMUTE;
uint8_t           421 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSE_RATE_X;
uint8_t           422 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSE_RATE_Y;
uint8_t           423 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSE_RATE_UPDATE_PENDING;
uint8_t           424 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_AVI_INFO_VERSION;
uint8_t           425 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_AVI_INFO_SEND;
uint8_t           426 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_AVI_INFO_CONT;
uint8_t           427 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_AVI_INFO_LINE;
uint8_t           428 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP0_ENABLE;
uint8_t           429 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_STREAM_ENABLE;
uint8_t           430 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP1_ENABLE;
uint8_t           431 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP2_ENABLE;
uint8_t           432 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP3_ENABLE;
uint8_t           433 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP4_ENABLE;
uint8_t           434 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP5_ENABLE;
uint8_t           435 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP6_ENABLE;
uint8_t           436 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_GSP7_ENABLE;
uint8_t           437 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_AVI_ENABLE;
uint8_t           438 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_MPG_ENABLE;
uint8_t           439 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_STREAM_DIS_DEFER;
uint8_t           440 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_STREAM_ENABLE;
uint8_t           441 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_STREAM_STATUS;
uint8_t           442 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_STEER_FIFO_RESET;
uint8_t           443 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_M_N_GEN_EN;
uint8_t           444 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_N;
uint8_t           445 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_M;
uint8_t           446 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DIG_START;
uint8_t           447 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_AUDIO_SRC_SELECT;
uint8_t           448 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_AUDIO_CHANNEL_ENABLE;
uint8_t           449 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_AUDIO_PACKETS_PER_LINE;
uint8_t           450 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_AUDIO_DELAY_EN;
uint8_t           451 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_UPDATE;
uint8_t           452 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_AUDIO_LAYOUT_OVRD;
uint8_t           453 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_OSF_OVRD;
uint8_t           454 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_AUTO_SEND;
uint8_t           455 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_SOURCE;
uint8_t           456 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_AUDIO_PRIORITY;
uint8_t           457 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_CTS_32;
uint8_t           458 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_N_32;
uint8_t           459 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_CTS_44;
uint8_t           460 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_N_44;
uint8_t           461 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_CTS_48;
uint8_t           462 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_N_48;
uint8_t           463 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_L;
uint8_t           464 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CLOCK_ACCURACY;
uint8_t           465 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_R;
uint8_t           466 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_2;
uint8_t           467 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_3;
uint8_t           468 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_4;
uint8_t           469 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_5;
uint8_t           470 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_6;
uint8_t           471 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_60958_CS_CHANNEL_NUMBER_7;
uint8_t           472 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_AUD_N;
uint8_t           473 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_TIMESTAMP_MODE;
uint8_t           474 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_ASP_ENABLE;
uint8_t           475 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_ATP_ENABLE;
uint8_t           476 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_AIP_ENABLE;
uint8_t           477 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_SEC_ACM_ENABLE;
uint8_t           478 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_AUDIO_SAMPLE_SEND;
uint8_t           479 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t AFMT_AUDIO_CLOCK_EN;
uint8_t           480 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t TMDS_PIXEL_ENCODING;
uint8_t           481 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t TMDS_COLOR_FORMAT;
uint8_t           482 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DIG_STEREOSYNC_SELECT;
uint8_t           483 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DIG_STEREOSYNC_GATE_EN;
uint8_t           484 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_DB_DISABLE;
uint8_t           485 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_MISC0;
uint8_t           486 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_HTOTAL;
uint8_t           487 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_VTOTAL;
uint8_t           488 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_HSTART;
uint8_t           489 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_VSTART;
uint8_t           490 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_HSYNCWIDTH;
uint8_t           491 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_HSYNCPOLARITY;
uint8_t           492 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_VSYNCWIDTH;
uint8_t           493 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_VSYNCPOLARITY;
uint8_t           494 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_HWIDTH;
uint8_t           495 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_MSA_VHEIGHT;
uint8_t           496 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_DB_DISABLE;
uint8_t           497 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_N_MUL;
uint8_t           498 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_M_DOUBLE_VALUE_EN;
uint8_t           499 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DIG_SOURCE_SELECT;
uint8_t          1141 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	uint8_t max_tries = 10;
uint8_t          1142 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	uint8_t counter = 0;
uint8_t           378 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_REG_FIELD_LIST(uint8_t);
uint8_t            75 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c 	uint8_t controller_id,
uint8_t            44 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,
uint8_t           908 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	uint8_t num_virtual_links,
uint8_t          1083 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	uint8_t num_virtual_links,
uint8_t            39 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h 	uint8_t num_virtual_links,
uint8_t           194 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	uint8_t controller_id,
uint8_t          1650 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	uint8_t i, num_pipes;
uint8_t           367 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c 		uint8_t grph_depth;
uint8_t           368 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c 		uint8_t grph_format;
uint8_t           440 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c 		uint8_t video_format;
uint8_t          1271 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	uint8_t num_virtual_links,
uint8_t          1453 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	uint8_t num_virtual_links,
uint8_t            44 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.h 	uint8_t num_virtual_links,
uint8_t          2049 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c bool dce110_arm_vert_intr(struct timing_generator *tg, uint8_t width)
uint8_t           282 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h 		struct timing_generator *tg, uint8_t width);
uint8_t           297 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	uint8_t counter = 0;
uint8_t           115 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c 	uint8_t controller_id,
uint8_t          1144 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	uint8_t num_virtual_links,
uint8_t          1334 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	uint8_t num_virtual_links,
uint8_t            35 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h 	uint8_t num_virtual_links,
uint8_t            83 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c static void dce120_init_pte(struct dc_context *ctx, uint8_t controller_id)
uint8_t           152 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c 	uint8_t controller_id,
uint8_t           982 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	uint8_t num_virtual_links,
uint8_t          1200 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	uint8_t num_virtual_links,
uint8_t            35 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.h 	uint8_t num_virtual_links,
uint8_t          1094 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 		uint8_t width)
uint8_t           874 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	uint8_t num_virtual_links,
uint8_t          1054 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	uint8_t num_virtual_links,
uint8_t          1071 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	uint8_t num_virtual_links,
uint8_t          1251 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	uint8_t num_virtual_links,
uint8_t          1268 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	uint8_t num_virtual_links,
uint8_t          1444 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	uint8_t num_virtual_links,
uint8_t            35 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h 	uint8_t num_virtual_links,
uint8_t            39 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h 	uint8_t num_virtual_links,
uint8_t            43 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.h 	uint8_t num_virtual_links,
uint8_t            62 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h 	TF_HELPER_REG_FIELD_LIST(uint8_t);
uint8_t            77 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h 	TF_CM_REG_FIELD_LIST(uint8_t);
uint8_t          1087 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_REG_FIELD_LIST(uint8_t)
uint8_t           253 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h 	DWBC_REG_FIELD_LIST(uint8_t)
uint8_t           284 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h 	DCN_HUBBUB_REG_FIELD_LIST(uint8_t);
uint8_t           285 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h 	HUBBUB_STUTTER_REG_FIELD_LIST(uint8_t);
uint8_t           287 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h 	HUBBUB_HVM_REG_FIELD_LIST(uint8_t);
uint8_t           624 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	DCN_HUBP_REG_FIELD_LIST(uint8_t);
uint8_t          2100 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	uint8_t integer_bits,
uint8_t          2101 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	uint8_t fractional_bits)
uint8_t          2671 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	uint8_t i;
uint8_t          2915 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	uint8_t controller_id,
uint8_t          3248 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				const uint8_t *custom_sdp_message,
uint8_t           158 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h 	IPP_DCN10_REG_FIELD_LIST(uint8_t);
uint8_t           301 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 	const uint8_t *pattern)
uint8_t           426 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c static uint8_t get_frontend_source(
uint8_t           381 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h 	DCN_LINK_ENCODER_REG_FIELD_LIST(uint8_t);
uint8_t           383 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h 	DCN20_LINK_ENCODER_REG_FIELD_LIST(uint8_t);
uint8_t           111 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h 	MPC_REG_FIELD_LIST(uint8_t)
uint8_t           139 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h 	OPP_DCN10_REG_FIELD_LIST(uint8_t);
uint8_t           861 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 					(uint8_t)params->vertical_total_mid_frame_num);
uint8_t           491 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	TG_REG_FIELD_LIST(uint8_t)
uint8_t          1272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	uint8_t num_virtual_links,
uint8_t           258 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	uint8_t synchronous_clock = 0; /* asynchronous mode */
uint8_t           259 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	uint8_t colorimetry_bpc;
uint8_t           260 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	uint8_t dynamic_range_rgb = 0; /*full range*/
uint8_t           261 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	uint8_t dynamic_range_ycbcr = 1; /*bt709*/
uint8_t           262 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	uint8_t dp_pixel_encoding = 0;
uint8_t           263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	uint8_t dp_component_depth = 0;
uint8_t           758 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	const uint8_t *custom_sdp_message,
uint8_t          1096 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 	uint8_t all;
uint8_t           491 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SE_REG_FIELD_LIST_DCN1_0(uint8_t);
uint8_t           493 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SE_REG_FIELD_LIST_DCN2_0(uint8_t);
uint8_t           552 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	const uint8_t *custom_sdp_message,
uint8_t            80 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_REG_FIELD_LIST(uint8_t)
uint8_t           597 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h 	TF_REG_FIELD_LIST_DCN2_0(uint8_t);
uint8_t            46 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps);
uint8_t           204 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps)
uint8_t           515 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	DSC_FIELD_LIST_DCN20(uint8_t);
uint8_t           412 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	DWBC_REG_FIELD_LIST_DCN2_0(uint8_t)
uint8_t           210 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h 	DCN21_HUBP_REG_FIELD_VARIABLE_LIST(uint8_t);
uint8_t           212 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h 	DCN2_HUBP_REG_FIELD_VARIABLE_LIST(uint8_t);
uint8_t           509 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h 	MCIF_WB_REG_FIELD_LIST_DCN2_0(uint8_t);
uint8_t           230 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	MPC_REG_FIELD_LIST_DCN2_0(uint8_t)
uint8_t           116 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h 	OPP_DCN20_REG_FIELD_LIST(uint8_t);
uint8_t          3432 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	uint8_t num_virtual_links,
uint8_t           294 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 					uint8_t *dsc_packed_pps)
uint8_t            74 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h 	DCN20_VMID_REG_FIELD_LIST(uint8_t);
uint8_t          1438 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	uint8_t num_virtual_links,
uint8_t           103 drivers/gpu/drm/amd/display/dc/dm_helpers.h 		uint8_t *data,
uint8_t           113 drivers/gpu/drm/amd/display/dc/dm_helpers.h 		const uint8_t *data,
uint8_t            88 drivers/gpu/drm/amd/display/dc/dm_pp_smu.h 	uint8_t wm_inst;
uint8_t            89 drivers/gpu/drm/amd/display/dc/dm_pp_smu.h 	uint8_t wm_type;
uint8_t           106 drivers/gpu/drm/amd/display/dc/dm_services.h 	uint8_t shift)
uint8_t           121 drivers/gpu/drm/amd/display/dc/dm_services.h 	uint8_t shift)
uint8_t           136 drivers/gpu/drm/amd/display/dc/dm_services.h 		uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
uint8_t           140 drivers/gpu/drm/amd/display/dc/dm_services.h 		uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
uint8_t           124 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t transmitter;
uint8_t           125 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t ddi_channel_mapping;
uint8_t           126 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t pipe_idx;
uint8_t           203 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t display_count;
uint8_t           208 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t crtc_index;
uint8_t           215 drivers/gpu/drm/amd/display/dc/dm_services_types.h 		uint8_t luminance;
uint8_t           219 drivers/gpu/drm/amd/display/dc/dm_services_types.h 		uint8_t signal_level;
uint8_t           226 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t  error_code; /* Byte 4 */
uint8_t           227 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t  ac_level_percentage; /* Byte 5 */
uint8_t           228 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t  dc_level_percentage; /* Byte 6 */
uint8_t           229 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t  min_input_signal; /* Byte 7 */
uint8_t           230 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t  max_input_signal; /* Byte 8 */
uint8_t           231 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint8_t  num_data_points; /* Byte 9 */
uint8_t           712 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_ext_data, struct dsc_dec_dpcd_caps *dsc_sink_caps)
uint8_t           253 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	uint8_t gsl_group;
uint8_t           264 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	uint8_t mpcc_inst;
uint8_t           299 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	uint8_t pipe_idx;
uint8_t           323 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	uint8_t clock_source_ref_count[MAX_CLOCK_SOURCES];
uint8_t           324 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	uint8_t dp_clock_source_ref_count;
uint8_t           384 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	uint8_t stream_count;
uint8_t            64 drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h 		uint8_t *data,
uint8_t            93 drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h 		uint8_t *write_buf,
uint8_t            95 drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h 		uint8_t *read_buf,
uint8_t            46 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 	uint8_t *data;
uint8_t            96 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 	uint8_t *buffer;
uint8_t           104 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 	uint8_t returned_byte;
uint8_t           119 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 	uint8_t *buffer;
uint8_t           126 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 	uint8_t returned_byte;
uint8_t           135 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 	uint8_t reply_data[DEFAULT_AUX_MAX_DATA_SIZE];
uint8_t           159 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 		uint8_t *buffer,
uint8_t           160 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 		uint8_t *reply_result,
uint8_t           164 drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h 		uint8_t *returned_bytes);
uint8_t           158 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h 	CLK_REG_FIELD_LIST(uint8_t)
uint8_t           160 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h 	CLK20_REG_FIELD_LIST(uint8_t)
uint8_t            63 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 		uint8_t NUM_SLICES_1 : 1;
uint8_t            64 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 		uint8_t NUM_SLICES_2 : 1;
uint8_t            65 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 		uint8_t NUM_SLICES_3 : 1; /* This one is not per DSC spec, but our encoder supports it */
uint8_t            66 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 		uint8_t NUM_SLICES_4 : 1;
uint8_t            67 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 		uint8_t NUM_SLICES_8 : 1;
uint8_t            69 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 	uint8_t raw;
uint8_t            73 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 	uint8_t dsc_version;
uint8_t            97 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 			uint8_t *dsc_packed_pps);
uint8_t           100 drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h 	const uint8_t *custom_pattern;
uint8_t           163 drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h 				const uint8_t *custom_sdp_message,
uint8_t           229 drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h 				uint8_t *dsc_packed_pps);
uint8_t            82 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 	uint8_t PROGRAM_STEREO         : 1;
uint8_t            83 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 	uint8_t PROGRAM_POLARITY       : 1;
uint8_t            84 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 	uint8_t RIGHT_EYE_POLARITY     : 1;
uint8_t            85 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 	uint8_t FRAME_PACKED           : 1;
uint8_t            86 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 	uint8_t DISABLE_STEREO_DP_SYNC : 1;
uint8_t           219 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 	bool (*arm_vert_intr)(struct timing_generator *tg, uint8_t width);
uint8_t           185 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 					uint8_t controller_id,
uint8_t           195 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 				const uint8_t *custom_sdp_message,
uint8_t            34 drivers/gpu/drm/amd/display/dc/inc/link_hwss.h 	uint8_t *data,
uint8_t            40 drivers/gpu/drm/amd/display/dc/inc/link_hwss.h 	const uint8_t *data,
uint8_t            72 drivers/gpu/drm/amd/display/dc/inc/link_hwss.h 	uint8_t *custom_pattern,
uint8_t           392 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift, uint32_t mask, uint32_t *field_value);
uint8_t           395 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           396 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2);
uint8_t           399 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           400 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           401 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3);
uint8_t           404 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           405 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           406 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           407 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4);
uint8_t           410 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           411 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           412 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           413 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           414 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5);
uint8_t           417 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           418 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           419 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           420 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           421 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
uint8_t           422 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift6, uint32_t mask6, uint32_t *field_value6);
uint8_t           425 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           426 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           427 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           428 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           429 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
uint8_t           430 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift6, uint32_t mask6, uint32_t *field_value6,
uint8_t           431 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift7, uint32_t mask7, uint32_t *field_value7);
uint8_t           434 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
uint8_t           435 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
uint8_t           436 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
uint8_t           437 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
uint8_t           438 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift5, uint32_t mask5, uint32_t *field_value5,
uint8_t           439 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift6, uint32_t mask6, uint32_t *field_value6,
uint8_t           440 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift7, uint32_t mask7, uint32_t *field_value7,
uint8_t           441 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift8, uint32_t mask8, uint32_t *field_value8);
uint8_t           485 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		uint8_t shift1, uint32_t mask1, uint32_t field_value1,
uint8_t            42 drivers/gpu/drm/amd/display/dc/inc/vm_helper.h void vm_helper_mark_vmid_used(struct vm_helper *vm_helper, unsigned int pos, uint8_t hubp_idx);
uint8_t           212 drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c 	uint8_t pipe_offset = dal_irq_src - IRQ_TYPE_VBLANK;
uint8_t            35 drivers/gpu/drm/amd/display/include/bios_parser_interface.h 	uint8_t *bios;
uint8_t           107 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t av_granularity;/* DPCD 00023h */
uint8_t           108 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t aud_dec_lat1;/* DPCD 00024h */
uint8_t           109 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t aud_dec_lat2;/* DPCD 00025h */
uint8_t           110 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t aud_pp_lat1;/* DPCD 00026h */
uint8_t           111 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t aud_pp_lat2;/* DPCD 00027h */
uint8_t           112 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t vid_inter_lat;/* DPCD 00028h */
uint8_t           113 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t vid_prog_lat;/* DPCD 00029h */
uint8_t           114 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t aud_del_ins1;/* DPCD 0002Bh */
uint8_t           115 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t aud_del_ins2;/* DPCD 0002Ch */
uint8_t           116 drivers/gpu/drm/amd/display/include/ddc_service_types.h 	uint8_t aud_del_ins3;/* DPCD 0002Dh */
uint8_t           120 drivers/gpu/drm/amd/display/include/ddc_service_types.h static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT";
uint8_t           122 drivers/gpu/drm/amd/display/include/ddc_service_types.h static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA";
uint8_t           124 drivers/gpu/drm/amd/display/include/ddc_service_types.h static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
uint8_t            99 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 	uint8_t hpd_int_gpio_uid;
uint8_t           100 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 	uint8_t hpd_active;
uint8_t           175 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 	uint8_t min_allowed_bl_level;
uint8_t           176 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 	uint8_t remote_display_config;
uint8_t           236 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 		uint8_t lane0:2;	/* Mapping for lane 0 */
uint8_t           237 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 		uint8_t lane1:2;	/* Mapping for lane 1 */
uint8_t           238 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 		uint8_t lane2:2;	/* Mapping for lane 2 */
uint8_t           239 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 		uint8_t lane3:2;	/* Mapping for lane 3 */
uint8_t           241 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 	uint8_t raw;
uint8_t           302 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 			uint8_t ext_aux_ddc_lut_index;
uint8_t           304 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 			uint8_t ext_hpd_pin_lut_index;
uint8_t           313 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 		uint8_t gu_id[NUMBER_OF_UCHAR_FOR_GUID];
uint8_t           314 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 		uint8_t checksum;
uint8_t           326 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 	uint8_t memory_type;
uint8_t           327 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h 	uint8_t ma_channel_number;
uint8_t            45 drivers/gpu/drm/amd/display/include/i2caux_interface.h 	uint8_t length;
uint8_t            46 drivers/gpu/drm/amd/display/include/i2caux_interface.h 	uint8_t *data;
uint8_t            51 drivers/gpu/drm/amd/display/include/i2caux_interface.h 	uint8_t *reply;
uint8_t            60 drivers/gpu/drm/amd/display/include/i2caux_interface.h 	uint8_t number_of_payloads;
uint8_t           139 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t VOLTAGE_SWING_SET:2;
uint8_t           140 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t MAX_SWING_REACHED:1;
uint8_t           141 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t PRE_EMPHASIS_SET:2;
uint8_t           142 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t MAX_PRE_EMPHASIS_REACHED:1;
uint8_t           144 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t POST_CURSOR2_SET:2;
uint8_t           146 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t POST_CURSOR2_SET:2;
uint8_t           147 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t MAX_PRE_EMPHASIS_REACHED:1;
uint8_t           148 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t PRE_EMPHASIS_SET:2;
uint8_t           149 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t MAX_SWING_REACHED:1;
uint8_t           150 drivers/gpu/drm/amd/display/include/link_service_types.h 		uint8_t VOLTAGE_SWING_SET:2;
uint8_t           156 drivers/gpu/drm/amd/display/include/link_service_types.h 	uint8_t raw;
uint8_t           162 drivers/gpu/drm/amd/display/include/link_service_types.h 	uint8_t vcp_id;
uint8_t           165 drivers/gpu/drm/amd/display/include/link_service_types.h 	uint8_t slot_count;
uint8_t            43 drivers/gpu/drm/amd/display/include/logger_interface.h void dc_conn_log_hex_linux(const uint8_t *hex_data, int hex_data_count);
uint8_t            41 drivers/gpu/drm/amd/display/include/set_mode_types.h 	uint8_t info_frame_type;
uint8_t            42 drivers/gpu/drm/amd/display/include/set_mode_types.h 	uint8_t version;
uint8_t            43 drivers/gpu/drm/amd/display/include/set_mode_types.h 	uint8_t length;
uint8_t            50 drivers/gpu/drm/amd/display/include/set_mode_types.h 	uint8_t hb0;
uint8_t            51 drivers/gpu/drm/amd/display/include/set_mode_types.h 	uint8_t hb1;
uint8_t            52 drivers/gpu/drm/amd/display/include/set_mode_types.h 	uint8_t hb2;
uint8_t            53 drivers/gpu/drm/amd/display/include/set_mode_types.h 	uint8_t sb[28]; /* sb0~sb27 */
uint8_t            60 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t CHECK_SUM:8;
uint8_t            62 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t S0_S1:2;
uint8_t            63 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t B0_B1:2;
uint8_t            64 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t A0:1;
uint8_t            65 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t Y0_Y1_Y2:3;
uint8_t            67 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t R0_R3:4;
uint8_t            68 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t M0_M1:2;
uint8_t            69 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t C0_C1:2;
uint8_t            71 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t SC0_SC1:2;
uint8_t            72 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t Q0_Q1:2;
uint8_t            73 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t EC0_EC2:3;
uint8_t            74 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t ITC:1;
uint8_t            76 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t VIC0_VIC7:8;
uint8_t            78 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t PR0_PR3:4;
uint8_t            79 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t CN0_CN1:2;
uint8_t            80 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t YQ0_YQ1:2;
uint8_t            87 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t F140_F143:4;
uint8_t            88 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t ACE0_ACE3:4;
uint8_t            90 drivers/gpu/drm/amd/display/include/set_mode_types.h 		uint8_t reserved[13];
uint8_t            30 drivers/gpu/drm/amd/display/include/vector.h 	uint8_t *container;
uint8_t            37 drivers/gpu/drm/amd/display/modules/inc/mod_vmid.h uint8_t mod_vmid_get_for_ptb(struct mod_vmid *mod_vmid, uint64_t ptb);
uint8_t           121 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x02 U0.8 */
uint8_t           122 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x16 U0.8 */
uint8_t           123 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x2a U2.6 */
uint8_t           124 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x3e U2.6 */
uint8_t           125 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x52 U2.6 */
uint8_t           126 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x66 U2.6 */
uint8_t           127 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t iir_curve[NUM_AMBI_LEVEL];				/* 0x7a U0.8 */
uint8_t           128 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t deviation_gain;						/* 0x7f U0.8 */
uint8_t           142 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t psr_state;						/* 0xf0       */
uint8_t           143 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_mcp_interface_version;				/* 0xf1       */
uint8_t           144 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_abm_feature_version;				/* 0xf2       */
uint8_t           145 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_psr_feature_version;				/* 0xf3       */
uint8_t           147 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_state;						/* 0xf6       */
uint8_t           151 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy5;							/* 0xfb       */
uint8_t           152 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy6;							/* 0xfc       */
uint8_t           153 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy7;							/* 0xfd       */
uint8_t           154 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy8;							/* 0xfe       */
uint8_t           155 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy9;							/* 0xff       */
uint8_t           163 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x02 U0.8 */
uint8_t           164 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x16 U0.8 */
uint8_t           165 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x2a U2.6 */
uint8_t           166 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x3e U2.6 */
uint8_t           167 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t hybrid_factor[NUM_AGGR_LEVEL];				/* 0x52 U0.8 */
uint8_t           168 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t contrast_factor[NUM_AGGR_LEVEL];			/* 0x56 U0.8 */
uint8_t           169 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t deviation_gain[NUM_AGGR_LEVEL];				/* 0x5a U0.8 */
uint8_t           170 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t iir_curve[NUM_AMBI_LEVEL];				/* 0x5e U0.8 */
uint8_t           171 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t min_knee[NUM_AGGR_LEVEL];				/* 0x63 U0.8 */
uint8_t           172 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t max_knee[NUM_AGGR_LEVEL];				/* 0x67 U0.8 */
uint8_t           174 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t pad[19];						/* 0x6d U0.8 */
uint8_t           188 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t psr_state;						/* 0xf0       */
uint8_t           189 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_mcp_interface_version;				/* 0xf1       */
uint8_t           190 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_abm_feature_version;				/* 0xf2       */
uint8_t           191 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_psr_feature_version;				/* 0xf3       */
uint8_t           193 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dmcu_state;						/* 0xf6       */
uint8_t           195 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy1;							/* 0xf7       */
uint8_t           196 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy2;							/* 0xf8       */
uint8_t           197 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy3;							/* 0xf9       */
uint8_t           198 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy4;							/* 0xfa       */
uint8_t           199 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy5;							/* 0xfb       */
uint8_t           200 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy6;							/* 0xfc       */
uint8_t           201 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy7;							/* 0xfd       */
uint8_t           202 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy8;							/* 0xfe       */
uint8_t           203 drivers/gpu/drm/amd/display/modules/power/power_helpers.c 	uint8_t dummy9;							/* 0xff       */
uint8_t            91 drivers/gpu/drm/amd/display/modules/vmid/vmid.c uint8_t mod_vmid_get_for_ptb(struct mod_vmid *mod_vmid, uint64_t ptb)
uint8_t            28 drivers/gpu/drm/amd/include/atom-bits.h static inline uint8_t get_u8(void *bios, int ptr)
uint8_t            32 drivers/gpu/drm/amd/include/atom-types.h typedef uint8_t UCHAR;
uint8_t            52 drivers/gpu/drm/amd/include/atomfirmware.h   #ifndef uint8_t 
uint8_t           228 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  format_revision;   //mainly used for a hw function, when the parser is not backward compatible 
uint8_t           229 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  content_revision;  //change it when a data table has a structure change, or a hw function has a input/output parameter change                                
uint8_t           238 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  atom_bios_string[4];        //enum atom_string_def atom_bios_string;     //Signature to distinguish between Atombios and non-atombios, 
uint8_t           441 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   h_border;
uint8_t           442 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   v_border;
uint8_t           444 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   atom_mode_id;
uint8_t           445 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   refreshrate;
uint8_t           484 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem_module_id;       
uint8_t           485 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  coolingsolution_id;              /*0: Air cooling; 1: Liquid cooling ... */
uint8_t           486 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved1[2];
uint8_t           520 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem_module_id;
uint8_t           521 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  coolingsolution_id;              /*0: Air cooling; 1: Liquid cooling ... */
uint8_t           522 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved1[2];
uint8_t           525 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  board_i2c_feature_id;            // enum of atom_board_i2c_feature_id_def
uint8_t           526 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  board_i2c_feature_gpio_id;       // i2c id find in gpio_lut data table gpio_id
uint8_t           527 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  board_i2c_feature_slave_addr;
uint8_t           528 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved3;
uint8_t           548 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem_module_id;
uint8_t           549 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  coolingsolution_id;              /*0: Air cooling; 1: Liquid cooling ... */
uint8_t           550 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved1[2];
uint8_t           553 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  board_i2c_feature_id;            // enum of atom_board_i2c_feature_id_def
uint8_t           554 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  board_i2c_feature_gpio_id;       // i2c id find in gpio_lut data table gpio_id
uint8_t           555 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  board_i2c_feature_slave_addr;
uint8_t           556 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved3;
uint8_t           580 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pwr_on_digon_to_de;          /*all pwr sequence numbers below are in uint of 4ms*/
uint8_t           581 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pwr_on_de_to_vary_bl;
uint8_t           582 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pwr_down_vary_bloff_to_de;
uint8_t           583 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pwr_down_de_to_digoff;
uint8_t           584 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pwr_off_delay;
uint8_t           585 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pwr_on_vary_bl_to_blon;
uint8_t           586 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pwr_down_bloff_to_vary_bloff;
uint8_t           587 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  panel_bpc;
uint8_t           588 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dpcd_edp_config_cap;
uint8_t           589 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dpcd_max_link_rate;
uint8_t           590 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dpcd_max_lane_count;
uint8_t           591 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dpcd_max_downspread;
uint8_t           592 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  min_allowed_bl_level;
uint8_t           593 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_allowed_bl_level;
uint8_t           594 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  bootup_bl_level;
uint8_t           595 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dplvdsrxid;
uint8_t           622 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gpio_bitshift;
uint8_t           623 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gpio_mask_bitshift;
uint8_t           624 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gpio_id;
uint8_t           625 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved;
uint8_t           696 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t record_type;                      //An emun to indicate the record type
uint8_t           697 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t record_size;                      //The size of the whole record in byte
uint8_t           703 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t i2c_id; 
uint8_t           704 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t i2c_slave_addr;                   //The slave address, it's 0 when the record is attached to connector for DDC
uint8_t           710 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pin_id;              //Corresponding block in GPIO_PIN_INFO table gives the pin info           
uint8_t           711 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  plugin_pin_state;
uint8_t           746 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gpio_id;               // GPIO_ID, find the corresponding ID in GPIO_LUT table
uint8_t           747 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gpio_pinstate;         // Pin state showing how to set-up the pin
uint8_t           753 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t flag;                   // Future expnadibility
uint8_t           754 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t number_of_pins;         // Number of GPIO pins used to control the object
uint8_t           792 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t hpd_pin_map[8];             
uint8_t           798 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t aux_ddc_map[8];
uint8_t           805 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  maxtmdsclkrate_in2_5mhz;
uint8_t           806 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved;
uint8_t           812 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  connector_type;
uint8_t           813 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  position;
uint8_t           829 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t bracketlen;
uint8_t           830 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t bracketwidth;
uint8_t           831 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t conn_num;
uint8_t           832 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t reserved;
uint8_t           856 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  priority_id;
uint8_t           857 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved;
uint8_t           864 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   number_of_path;
uint8_t           865 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   reserved;
uint8_t           888 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dvi_ss_mode;             // enum of atom_spread_spectrum_mode
uint8_t           889 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  hdmi_ss_mode;            // enum of atom_spread_spectrum_mode
uint8_t           890 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dp_ss_mode;              // enum of atom_spread_spectrum_mode 
uint8_t           891 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ss_reserved;
uint8_t           892 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  hardcode_mode_num;       // a hardcode mode number defined in StandardVESA_TimingTable when a CRT or DFP EDID is not available
uint8_t           893 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved1[3];
uint8_t           896 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dceip_min_ver;
uint8_t           897 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dceip_max_ver;
uint8_t           898 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_disp_pipe_num;
uint8_t           899 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_vbios_active_disp_pipe_num;
uint8_t           900 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_ppll_num;
uint8_t           901 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_disp_phy_num;
uint8_t           902 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_aux_pairs;
uint8_t           903 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  remotedisplayconfig;
uint8_t           904 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved3[8];
uint8_t           921 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dvi_ss_mode;             // enum of atom_spread_spectrum_mode
uint8_t           922 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  hdmi_ss_mode;            // enum of atom_spread_spectrum_mode
uint8_t           923 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dp_ss_mode;              // enum of atom_spread_spectrum_mode 
uint8_t           924 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ss_reserved;
uint8_t           925 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dfp_hardcode_mode_num;   // DFP hardcode mode number defined in StandardVESA_TimingTable when EDID is not available
uint8_t           926 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dfp_hardcode_refreshrate;// DFP hardcode mode refreshrate defined in StandardVESA_TimingTable when EDID is not available
uint8_t           927 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vga_hardcode_mode_num;   // VGA hardcode mode number defined in StandardVESA_TimingTable when EDID is not avablable
uint8_t           928 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vga_hardcode_refreshrate;// VGA hardcode mode number defined in StandardVESA_TimingTable when EDID is not avablable
uint8_t           931 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dcnip_min_ver;
uint8_t           932 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dcnip_max_ver;
uint8_t           933 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_disp_pipe_num;
uint8_t           934 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_vbios_active_disp_pipe_num;
uint8_t           935 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_ppll_num;
uint8_t           936 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_disp_phy_num;
uint8_t           937 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  max_aux_pairs;
uint8_t           938 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  remotedisplayconfig;
uint8_t           939 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved3[8];
uint8_t           964 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   auxddclut_index;                 //An index into external AUX/DDC channel LUT
uint8_t           965 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   hpdlut_index;                    //An index into external HPD pin LUT
uint8_t           967 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   channelmapping;                  // if ucChannelMapping=0, using default one to one mapping
uint8_t           968 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   chpninvert;                      // bit vector for up to 8 lanes, =0: P and N is not invert, =1 P and N is inverted
uint8_t           984 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  guid[16];                                  // a GUID is a 16 byte long string
uint8_t           986 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  checksum;                                  // a simple Checksum of the sum of whole structure equal to 0x0. 
uint8_t           987 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  stereopinid;                               // use for eDP panel
uint8_t           988 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  remotedisplayconfig;
uint8_t           989 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  edptolvdsrxid;
uint8_t           990 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  fixdpvoltageswing;                         // usCaps[1]=1, this indicate DP_LANE_SET value
uint8_t           991 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  reserved[3];                               // for potential expansion
uint8_t          1002 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  profile_id;       // SENSOR_PROFILES
uint8_t          1013 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t module_id;                    // 0: Rear, 1: Front right of user, 2: Front left of user
uint8_t          1014 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t module_name[8];
uint8_t          1020 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t flashlight_id;                // 0: Rear, 1: Front
uint8_t          1021 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t name[8];
uint8_t          1037 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t encoder_mode;            //atom_encode_mode_def, =2: DVI, =3: HDMI mode
uint8_t          1038 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t phy_sel;                 //bit vector of phy, bit0= phya, bit1=phyb, ....bit5 = phyf 
uint8_t          1040 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t deemph_6db_4;            //COMMON_SELDEEMPH60[31:24]deemph_6db_4
uint8_t          1041 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t boostadj;                //CMD_BUS_GLOBAL_FOR_TX_LANE0 [19:16]tx_boost_adj  [20]tx_boost_en  [23:22]tx_binary_ron_code_offset
uint8_t          1042 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t tx_driver_fifty_ohms;    //COMMON_ZCALCODE_CTRL[21].tx_driver_fifty_ohms
uint8_t          1043 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t deemph_sel;              //MARGIN_DEEMPH_LANE0.DEEMPH_SEL
uint8_t          1047 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t dp_vs_pemph_level;       //enum of atom_dp_vs_preemph_def
uint8_t          1049 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t deemph_6db_4;            //COMMON_SELDEEMPH60[31:24]deemph_6db_4
uint8_t          1050 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t boostadj;                //CMD_BUS_GLOBAL_FOR_TX_LANE0 [19:16]tx_boost_adj  [20]tx_boost_en  [23:22]tx_binary_ron_code_offset
uint8_t          1054 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t phy_sel;                 // bit vector of phy, bit0= phya, bit1=phyb, ....bit5 = phyf 
uint8_t          1055 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t version;
uint8_t          1070 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t sym_clk;
uint8_t          1071 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t dig_mode;
uint8_t          1072 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t phy_sel;
uint8_t          1074 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t common_seldeemph60__deemph_6db_4_val;
uint8_t          1075 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t cmd_bus_global_for_tx_lane0__boostadj_val ;
uint8_t          1076 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t common_zcalcode_ctrl__tx_driver_fifty_ohms_val;
uint8_t          1077 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t margin_deemph_lane0__deemph_sel_val;         
uint8_t          1081 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t ucI2cRegIndex;
uint8_t          1082 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t ucI2cRegVal;
uint8_t          1086 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t HdmiSlvAddr;
uint8_t          1087 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t HdmiRegNum;
uint8_t          1088 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t Hdmi6GRegNum;
uint8_t          1111 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   memorytype;                       // enum of atom_dmi_t17_mem_type_def, APU memory type indication.
uint8_t          1112 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   umachannelnumber;                 // number of memory channels
uint8_t          1113 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pwr_on_digon_to_de;               /* all pwr sequence numbers below are in uint of 4ms */
uint8_t          1114 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pwr_on_de_to_vary_bl;
uint8_t          1115 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pwr_down_vary_bloff_to_de;
uint8_t          1116 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pwr_down_de_to_digoff;
uint8_t          1117 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pwr_off_delay;
uint8_t          1118 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pwr_on_vary_bl_to_blon;
uint8_t          1119 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pwr_down_bloff_to_vary_bloff;
uint8_t          1120 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   min_allowed_bl_level;
uint8_t          1121 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   htc_hyst_limit;
uint8_t          1122 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   htc_tmp_limit;
uint8_t          1123 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   reserved1;
uint8_t          1124 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   reserved2;
uint8_t          1221 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gfxip_min_ver;
uint8_t          1222 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gfxip_max_ver;
uint8_t          1223 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_shader_engines;
uint8_t          1224 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_tile_pipes;
uint8_t          1225 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_cu_per_sh;
uint8_t          1226 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_sh_per_se;
uint8_t          1227 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_backends_per_se;
uint8_t          1228 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_texture_channel_caches;
uint8_t          1241 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gfxip_min_ver;
uint8_t          1242 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gfxip_max_ver;
uint8_t          1243 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_shader_engines;
uint8_t          1244 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_tile_pipes;
uint8_t          1245 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_cu_per_sh;
uint8_t          1246 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_sh_per_se;
uint8_t          1247 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_backends_per_se;
uint8_t          1248 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_texture_channel_caches;
uint8_t          1257 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t active_cu_per_sh;
uint8_t          1258 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t active_rb_per_se;
uint8_t          1266 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gfxip_min_ver;
uint8_t          1267 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gfxip_max_ver;
uint8_t          1268 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_shader_engines;
uint8_t          1269 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t reserved;
uint8_t          1270 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_cu_per_sh;
uint8_t          1271 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_sh_per_se;
uint8_t          1272 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_backends_per_se;
uint8_t          1273 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t max_texture_channel_caches;
uint8_t          1282 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t active_cu_per_sh;
uint8_t          1283 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t active_rb_per_se;
uint8_t          1291 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gc_num_max_gs_thds;
uint8_t          1292 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gc_gs_table_depth;
uint8_t          1293 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gc_double_offchip_lds_buffer;
uint8_t          1294 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gc_max_scratch_slots_per_cu;
uint8_t          1307 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t smuip_min_ver;
uint8_t          1308 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t smuip_max_ver;
uint8_t          1309 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t smu_rsd1;
uint8_t          1310 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t gpuclk_ss_mode;           // enum of atom_spread_spectrum_mode
uint8_t          1316 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ac_dc_gpio_bit;          // GPIO bit shift in SMU_GPIOPAD_A  configured for AC/DC switching, =0xff means invalid
uint8_t          1317 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ac_dc_polarity;          // GPIO polarity for AC/DC switching
uint8_t          1318 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hot_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A  configured for VR0 HOT event, =0xff means invalid
uint8_t          1319 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hot_polarity;         // GPIO polarity for VR0 HOT event
uint8_t          1320 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hot_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A configured for VR1 HOT event , =0xff means invalid
uint8_t          1321 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hot_polarity;         // GPIO polarity for VR1 HOT event 
uint8_t          1322 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fw_ctf_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A configured for CTF, =0xff means invalid
uint8_t          1323 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fw_ctf_polarity;         // GPIO polarity for CTF
uint8_t          1328 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  smuip_min_ver;
uint8_t          1329 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  smuip_max_ver;
uint8_t          1330 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  smu_rsd1;
uint8_t          1331 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gpuclk_ss_mode;
uint8_t          1337 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ac_dc_gpio_bit;          // GPIO bit shift in SMU_GPIOPAD_A  configured for AC/DC switching, =0xff means invalid
uint8_t          1338 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ac_dc_polarity;          // GPIO polarity for AC/DC switching
uint8_t          1339 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hot_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A  configured for VR0 HOT event, =0xff means invalid
uint8_t          1340 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hot_polarity;         // GPIO polarity for VR0 HOT event
uint8_t          1341 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hot_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A configured for VR1 HOT event , =0xff means invalid
uint8_t          1342 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hot_polarity;         // GPIO polarity for VR1 HOT event
uint8_t          1343 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fw_ctf_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A configured for CTF, =0xff means invalid
uint8_t          1344 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fw_ctf_polarity;         // GPIO polarity for CTF
uint8_t          1345 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pcc_gpio_bit;            // GPIO bit shift in SMU_GPIOPAD_A configured for PCC, =0xff means invalid
uint8_t          1346 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pcc_gpio_polarity;       // GPIO polarity for CTF
uint8_t          1361 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  smuip_min_ver;
uint8_t          1362 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  smuip_max_ver;
uint8_t          1363 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  waflclk_ss_mode;
uint8_t          1364 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gpuclk_ss_mode;
uint8_t          1370 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ac_dc_gpio_bit;          // GPIO bit shift in SMU_GPIOPAD_A  configured for AC/DC switching, =0xff means invalid
uint8_t          1371 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ac_dc_polarity;          // GPIO polarity for AC/DC switching
uint8_t          1372 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hot_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A  configured for VR0 HOT event, =0xff means invalid
uint8_t          1373 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hot_polarity;         // GPIO polarity for VR0 HOT event
uint8_t          1374 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hot_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A configured for VR1 HOT event , =0xff means invalid
uint8_t          1375 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hot_polarity;         // GPIO polarity for VR1 HOT event
uint8_t          1376 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fw_ctf_gpio_bit;         // GPIO bit shift in SMU_GPIOPAD_A configured for CTF, =0xff means invalid
uint8_t          1377 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fw_ctf_polarity;         // GPIO polarity for CTF
uint8_t          1378 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pcc_gpio_bit;            // GPIO bit shift in SMU_GPIOPAD_A configured for PCC, =0xff means invalid
uint8_t          1379 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pcc_gpio_polarity;       // GPIO polarity for CTF
uint8_t          1407 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid1_i2c_address;
uint8_t          1408 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid2_i2c_address;
uint8_t          1409 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr_i2c_address;
uint8_t          1410 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  plx_i2c_address;
uint8_t          1412 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid_i2c_linescl;
uint8_t          1413 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid_i2c_linesda;
uint8_t          1414 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr_i2c_linescl;
uint8_t          1415 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr_i2c_linesda;
uint8_t          1417 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  plx_i2c_linescl;
uint8_t          1418 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  plx_i2c_linesda;
uint8_t          1419 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vrsensorpresent;
uint8_t          1420 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquidsensorpresent;
uint8_t          1425 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddgfxvrmapping;
uint8_t          1426 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddsocvrmapping;
uint8_t          1427 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddmem0vrmapping;
uint8_t          1428 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddmem1vrmapping;
uint8_t          1430 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gfxulvphasesheddingmask;
uint8_t          1431 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  soculvphasesheddingmask;
uint8_t          1432 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding8_v[2];
uint8_t          1435 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gfxoffset;
uint8_t          1436 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrygfx;
uint8_t          1439 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  socoffset;
uint8_t          1440 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrysoc;
uint8_t          1443 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem0offset;
uint8_t          1444 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrymem0;
uint8_t          1447 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem1offset;
uint8_t          1448 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrymem1;
uint8_t          1450 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  acdcgpio;
uint8_t          1451 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  acdcpolarity;
uint8_t          1452 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hotgpio;
uint8_t          1453 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hotpolarity;
uint8_t          1455 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hotgpio;
uint8_t          1456 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hotpolarity;
uint8_t          1457 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding1;
uint8_t          1458 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding2;
uint8_t          1460 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin0;
uint8_t          1461 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin1;
uint8_t          1462 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin2;
uint8_t          1463 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding8_4;
uint8_t          1465 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t  pllgfxclkspreadenabled;
uint8_t          1466 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t  pllgfxclkspreadpercent;
uint8_t          1469 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t uclkspreadenabled;
uint8_t          1470 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t uclkspreadpercent;
uint8_t          1473 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t socclkspreadenabled;
uint8_t          1474 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t socclkspreadpercent;
uint8_t          1477 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t  acggfxclkspreadenabled;
uint8_t          1478 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t  acggfxclkspreadpercent;
uint8_t          1481 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t Vr2_I2C_address;
uint8_t          1482 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t padding_vr2[3];
uint8_t          1495 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid1_i2c_address;
uint8_t          1496 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid2_i2c_address;
uint8_t          1497 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr_i2c_address;
uint8_t          1498 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  plx_i2c_address;
uint8_t          1500 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid_i2c_linescl;
uint8_t          1501 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquid_i2c_linesda;
uint8_t          1502 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr_i2c_linescl;
uint8_t          1503 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr_i2c_linesda;
uint8_t          1505 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  plx_i2c_linescl;
uint8_t          1506 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  plx_i2c_linesda;
uint8_t          1507 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vrsensorpresent;
uint8_t          1508 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  liquidsensorpresent;
uint8_t          1513 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddgfxvrmapping;
uint8_t          1514 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddsocvrmapping;
uint8_t          1515 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddmem0vrmapping;
uint8_t          1516 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddmem1vrmapping;
uint8_t          1518 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gfxulvphasesheddingmask;
uint8_t          1519 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  soculvphasesheddingmask;
uint8_t          1520 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  externalsensorpresent;
uint8_t          1521 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding8_v;
uint8_t          1524 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gfxoffset;
uint8_t          1525 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrygfx;
uint8_t          1528 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  socoffset;
uint8_t          1529 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrysoc;
uint8_t          1532 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem0offset;
uint8_t          1533 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrymem0;
uint8_t          1536 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem1offset;
uint8_t          1537 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrymem1;
uint8_t          1539 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  acdcgpio;
uint8_t          1540 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  acdcpolarity;
uint8_t          1541 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hotgpio;
uint8_t          1542 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hotpolarity;
uint8_t          1544 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hotgpio;
uint8_t          1545 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hotpolarity;
uint8_t          1546 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding1;
uint8_t          1547 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding2;
uint8_t          1549 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin0;
uint8_t          1550 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin1;
uint8_t          1551 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin2;
uint8_t          1552 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding8_4;
uint8_t          1554 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pllgfxclkspreadenabled;
uint8_t          1555 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pllgfxclkspreadpercent;
uint8_t          1558 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t uclkspreadenabled;
uint8_t          1559 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t uclkspreadpercent;
uint8_t          1562 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t fclkspreadenabled;
uint8_t          1563 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t fclkspreadpercent;
uint8_t          1566 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t fllgfxclkspreadenabled;
uint8_t          1567 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t fllgfxclkspreadpercent;
uint8_t          1591 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddgfxvrmapping;
uint8_t          1592 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddsocvrmapping;
uint8_t          1593 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddmem0vrmapping;
uint8_t          1594 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vddmem1vrmapping;
uint8_t          1596 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gfxulvphasesheddingmask;
uint8_t          1597 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  soculvphasesheddingmask;
uint8_t          1598 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  externalsensorpresent;
uint8_t          1599 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding8_v;
uint8_t          1602 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  gfxoffset;
uint8_t          1603 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrygfx;
uint8_t          1606 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  socoffset;
uint8_t          1607 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrysoc;
uint8_t          1610 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem0offset;
uint8_t          1611 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrymem0;
uint8_t          1614 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mem1offset;
uint8_t          1615 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding_telemetrymem1;
uint8_t          1618 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  acdcgpio;
uint8_t          1619 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  acdcpolarity;
uint8_t          1620 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hotgpio;
uint8_t          1621 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr0hotpolarity;
uint8_t          1623 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hotgpio;
uint8_t          1624 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vr1hotpolarity;
uint8_t          1625 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding1;
uint8_t          1626 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding2;
uint8_t          1629 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin0;
uint8_t          1630 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin1;
uint8_t          1631 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  ledpin2;
uint8_t          1632 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  padding8_4;
uint8_t          1635 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pllgfxclkspreadenabled;
uint8_t          1636 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  pllgfxclkspreadpercent;
uint8_t          1640 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  uclkspreadenabled;
uint8_t          1641 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  uclkspreadpercent;
uint8_t          1645 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fclkspreadenabled;
uint8_t          1646 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fclkspreadpercent;
uint8_t          1650 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fllgfxclkspreadenabled;
uint8_t          1651 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  fllgfxclkspreadpercent;
uint8_t          1697 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   Enabled;
uint8_t          1698 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   Speed;
uint8_t          1699 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   Padding[2];
uint8_t          1701 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   ControllerPort;
uint8_t          1702 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   ControllerName;
uint8_t          1703 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   ThermalThrotter;
uint8_t          1704 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   I2cProtocol;
uint8_t          1718 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VddGfxVrMapping;   // Use VR_MAPPING* bitfields
uint8_t          1719 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VddSocVrMapping;   // Use VR_MAPPING* bitfields
uint8_t          1720 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VddMem0VrMapping;  // Use VR_MAPPING* bitfields
uint8_t          1721 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VddMem1VrMapping;  // Use VR_MAPPING* bitfields
uint8_t          1723 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      GfxUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
uint8_t          1724 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      SocUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
uint8_t          1725 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      ExternalSensorPresent; // External RDI connected to TMON (aka TEMP IN)
uint8_t          1726 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      Padding8_V;
uint8_t          1730 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      GfxOffset;       // in Amps
uint8_t          1731 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      Padding_TelemetryGfx;
uint8_t          1733 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      SocOffset;       // in Amps
uint8_t          1734 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      Padding_TelemetrySoc;
uint8_t          1737 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      Mem0Offset;       // in Amps
uint8_t          1738 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      Padding_TelemetryMem0;
uint8_t          1741 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      Mem1Offset;       // in Amps
uint8_t          1742 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      Padding_TelemetryMem1;
uint8_t          1745 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      AcDcGpio;        // GPIO pin configured for AC/DC switching
uint8_t          1746 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      AcDcPolarity;    // GPIO polarity for AC/DC switching
uint8_t          1747 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VR0HotGpio;      // GPIO pin configured for VR0 HOT event
uint8_t          1748 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VR0HotPolarity;  // GPIO polarity for VR0 HOT event
uint8_t          1750 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VR1HotGpio;      // GPIO pin configured for VR1 HOT event 
uint8_t          1751 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      VR1HotPolarity;  // GPIO polarity for VR1 HOT event 
uint8_t          1752 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      GthrGpio;        // GPIO pin configured for GTHR Event
uint8_t          1753 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      GthrPolarity;    // replace GPIO polarity for GTHR
uint8_t          1756 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      LedPin0;         // GPIO number for LedPin[0]
uint8_t          1757 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      LedPin1;         // GPIO number for LedPin[1]
uint8_t          1758 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      LedPin2;         // GPIO number for LedPin[2]
uint8_t          1759 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      padding8_4;
uint8_t          1762 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      PllGfxclkSpreadEnabled;   // on or off
uint8_t          1763 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      PllGfxclkSpreadPercent;   // Q4.4
uint8_t          1767 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      DfllGfxclkSpreadEnabled;   // on or off
uint8_t          1768 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      DfllGfxclkSpreadPercent;   // Q4.4
uint8_t          1772 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      UclkSpreadEnabled;   // on or off
uint8_t          1773 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      UclkSpreadPercent;   // Q4.4
uint8_t          1777 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      SoclkSpreadEnabled;   // on or off
uint8_t          1778 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      SocclkSpreadPercent;   // Q4.4
uint8_t          1801 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      vddgfxvrmapping;     // use vr_mapping* bitfields
uint8_t          1802 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      vddsocvrmapping;     // use vr_mapping* bitfields
uint8_t          1803 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      vddmemvrmapping;     // use vr_mapping* bitfields
uint8_t          1804 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      boardvrmapping;      // use vr_mapping* bitfields
uint8_t          1806 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      gfxulvphasesheddingmask; // set this to 1 to set psi0/1 to 1 in ulv mode
uint8_t          1807 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      externalsensorpresent; // external rdi connected to tmon (aka temp in)
uint8_t          1808 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      padding8_v[2];
uint8_t          1812 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      gfxoffset;       // in amps
uint8_t          1813 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      padding_telemetrygfx;
uint8_t          1816 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      socoffset;       // in amps
uint8_t          1817 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      padding_telemetrysoc;
uint8_t          1820 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      memoffset;       // in amps
uint8_t          1821 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      padding_telemetrymem;
uint8_t          1824 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      boardoffset;       // in amps
uint8_t          1825 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      padding_telemetryboardinput;
uint8_t          1828 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      vr0hotgpio;      // gpio pin configured for vr0 hot event
uint8_t          1829 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      vr0hotpolarity;  // gpio polarity for vr0 hot event
uint8_t          1830 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      vr1hotgpio;      // gpio pin configured for vr1 hot event
uint8_t          1831 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      vr1hotpolarity;  // gpio polarity for vr1 hot event
uint8_t          1834 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t	   pllgfxclkspreadenabled;	// on or off
uint8_t          1835 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t	   pllgfxclkspreadpercent;	// q4.4
uint8_t          1839 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t	   uclkspreadenabled;   // on or off
uint8_t          1840 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t	   uclkspreadpercent;   // q4.4
uint8_t          1844 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t	   fclkspreadenabled;   // on or off
uint8_t          1845 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t	   fclkspreadpercent;   // q4.4
uint8_t          1850 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      fllgfxclkspreadenabled;   // on or off
uint8_t          1851 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t      fllgfxclkspreadpercent;   // q4.4
uint8_t          1860 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t 	 drambitwidth; // for dram use only.  see dram bit width type defines
uint8_t          1861 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t 	 paddingmem[3];
uint8_t          1868 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t 	 xgmilinkspeed[4];
uint8_t          1869 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t 	 xgmilinkwidth[4];
uint8_t          1907 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   enable_gb_vdroop_table_cksoff;
uint8_t          1908 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   enable_gb_vdroop_table_ckson;
uint8_t          1909 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   enable_gb_fuse_table_cksoff;
uint8_t          1910 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   enable_gb_fuse_table_ckson;
uint8_t          1912 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   enable_apply_avfs_cksoff_voltage;
uint8_t          1913 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   reserved;
uint8_t          1951 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   enable_gb_vdroop_table_cksoff;
uint8_t          1952 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   enable_gb_vdroop_table_ckson;
uint8_t          1953 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   enable_gb_fuse_table_cksoff;
uint8_t          1954 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   enable_gb_fuse_table_ckson;
uint8_t          1956 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   enable_apply_avfs_cksoff_voltage;
uint8_t          1957 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   reserved;
uint8_t          1976 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   enable_acg_gb_vdroop_table;
uint8_t          1977 drivers/gpu/drm/amd/include/atomfirmware.h 	uint8_t   enable_acg_gb_fuse_table;
uint8_t          2000 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t uvdip_min_ver;
uint8_t          2001 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t uvdip_max_ver;
uint8_t          2002 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t vceip_min_ver;
uint8_t          2003 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t vceip_max_ver;
uint8_t          2028 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umcip_min_ver;
uint8_t          2029 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umcip_max_ver;
uint8_t          2030 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t vram_type;              //enum of atom_dgpu_vram_type
uint8_t          2031 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umc_config;
uint8_t          2055 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umcip_min_ver;
uint8_t          2056 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umcip_max_ver;
uint8_t          2057 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t vram_type;              //enum of atom_dgpu_vram_type
uint8_t          2058 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umc_config;
uint8_t          2075 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umcip_min_ver;
uint8_t          2076 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umcip_max_ver;
uint8_t          2077 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t vram_type;              //enum of atom_dgpu_vram_type
uint8_t          2078 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t umc_config;
uint8_t          2099 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   ext_memory_id;                 // Current memory module ID
uint8_t          2100 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   memory_type;                   // enum of atom_dgpu_vram_type
uint8_t          2101 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   channel_num;                   // Number of mem. channels supported in this module
uint8_t          2102 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   channel_width;                 // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT
uint8_t          2103 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   density;                       // _8Mx32, _16Mx32, _16Mx16, _32Mx16
uint8_t          2104 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   tunningset_id;                 // MC phy registers set per. 
uint8_t          2105 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   vender_rev_id;                 // [7:4] Revision, [3:0] Vendor code
uint8_t          2106 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   refreshrate;                   // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
uint8_t          2107 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   hbm_ven_rev_id;		   // hbm_ven_rev_id
uint8_t          2108 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   vram_rsd2;			   // reserved
uint8_t          2122 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vram_module_num;                              // indicate number of VRAM module
uint8_t          2123 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  umcip_min_ver;
uint8_t          2124 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  umcip_max_ver;
uint8_t          2125 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mc_phy_tile_num;                              // indicate the MCD tile number which use in DramDataRemapTbl and usMcAdjustPerTileTblOffset
uint8_t          2177 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   ext_memory_id;                 // Current memory module ID
uint8_t          2178 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   memory_type;                   // enum of atom_dgpu_vram_type
uint8_t          2179 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   channel_num;                   // Number of mem. channels supported in this module
uint8_t          2180 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   channel_width;                 // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT
uint8_t          2181 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   density;                       // _8Mx32, _16Mx32, _16Mx16, _32Mx16
uint8_t          2182 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   tunningset_id;                 // MC phy registers set per
uint8_t          2183 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   vender_rev_id;                 // [7:4] Revision, [3:0] Vendor code
uint8_t          2184 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   refreshrate;                   // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
uint8_t          2185 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   vram_flags;			   // bit0= bankgroup enable
uint8_t          2186 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   vram_rsd2;			   // reserved
uint8_t          2204 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  vram_module_num;                              // indicate number of VRAM module
uint8_t          2205 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  umcip_min_ver;
uint8_t          2206 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  umcip_max_ver;
uint8_t          2207 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  mc_phy_tile_num;                              // indicate the MCD tile number which use in DramDataRemapTbl and usMcAdjustPerTileTblOffset
uint8_t          2223 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t    voltage_type;                           //enum atom_voltage_type
uint8_t          2224 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t    voltage_mode;                           //enum atom_voltage_object_mode 
uint8_t          2242 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  regulator_id;                        //Indicate Voltage Regulator Id
uint8_t          2243 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  i2c_id;
uint8_t          2244 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  i2c_slave_addr;
uint8_t          2245 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  i2c_control_offset;       
uint8_t          2246 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  i2c_flag;                            // Bit0: 0 - One byte data; 1 - Two byte data
uint8_t          2247 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  i2c_speed;                           // =0, use default i2c speed, otherwise use it in unit of kHz. 
uint8_t          2248 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  reserved[2];
uint8_t          2269 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  gpio_control_id;                     // default is 0 which indicate control through CG VID mode 
uint8_t          2270 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  gpio_entry_num;                      // indiate the entry numbers of Votlage/Gpio value Look up table
uint8_t          2271 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  phase_delay_us;                      // phase delay in unit of micro second
uint8_t          2272 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t  reserved;   
uint8_t          2280 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t loadline_psi1;                        // bit4:0= loadline setting ( Core Loadline trim and offset trim ), bit5=0:PSI1_L disable =1: PSI1_L enable
uint8_t          2281 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t psi0_l_vid_thresd;                    // VR PSI0_L VID threshold
uint8_t          2282 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t psi0_enable;                          // 
uint8_t          2283 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t maxvstep;
uint8_t          2284 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t telemetry_offset;
uint8_t          2285 drivers/gpu/drm/amd/include/atomfirmware.h    uint8_t telemetry_gain; 
uint8_t          2292 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  merged_powerrail_type;               //enum atom_voltage_type
uint8_t          2293 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved[3];
uint8_t          2438 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  voltagetype;                /* enum atom_voltage_type */
uint8_t          2439 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  command;                    /* Indicate action: Set voltage level, enum atom_set_voltage_command */
uint8_t          2487 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   pll_ss_enable;
uint8_t          2488 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   reserved;
uint8_t          2503 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved;
uint8_t          2504 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  bitslen;
uint8_t          2522 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t syspll_id;          // 0= syspll0, 1=syspll1, 2=syspll2                
uint8_t          2523 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t clk_id;             // atom_smu9_syspll0_clock_id  (only valid when command == GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ )
uint8_t          2524 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t command;            // enum of atom_get_smu_clock_info_command
uint8_t          2525 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t dfsdid;             // =0: get DFS DID from register, >0, give DFS divider, (only valid when command == GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ )
uint8_t          2662 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t ucode_func_id;
uint8_t          2663 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t ucode_reserved[3];
uint8_t          2678 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t  pll_id;                     // ATOM_PHY_PLL0/ATOM_PHY_PLL1/ATOM_PPLL0
uint8_t          2679 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t  encoderobjid;               // ASIC encoder id defined in objectId.h, 
uint8_t          2681 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t  encoder_mode;               // Encoder mode: 
uint8_t          2682 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t  miscinfo;                   // enum atom_set_pixel_clock_v1_7_misc_info
uint8_t          2683 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t  crtc_id;                    // enum of atom_crtc_def
uint8_t          2684 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t  deep_color_ratio;           // HDMI panel bit depth: enum atom_set_pixel_clock_v1_7_deepcolor_ratio
uint8_t          2685 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t  reserved1[2];    
uint8_t          2724 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dceclktype;                                 // =0: DISPCLK  =1: DPREFCLK  =2: PIXCLK
uint8_t          2725 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dceclksrc;                                  // ATOM_PLL0 or ATOM_GCK_DFS or ATOM_FCH_CLK or ATOM_COMBOPHY_PLLx
uint8_t          2726 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  dceclkflag;                                 // Bit [1:0] = PPLL ref clock source ( when ucDCEClkSrc= ATOM_PPLL0 )
uint8_t          2727 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  crtc_id;                                    // ucDisp Pipe Id, ATOM_CRTC0/1/2/..., use only when ucDCEClkType = PIXCLK
uint8_t          2771 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  crtc_id;                   // enum atom_crtc_def
uint8_t          2772 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  blanking;                  // enum atom_blank_crtc_command
uint8_t          2788 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t crtc_id;                    // enum atom_crtc_def
uint8_t          2789 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t enable;                     // ATOM_ENABLE or ATOM_DISABLE 
uint8_t          2790 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t padding[2];
uint8_t          2799 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t disp_pipe_id;                // ATOM_CRTC1, ATOM_CRTC2, ...
uint8_t          2800 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t enable;                     // ATOM_ENABLE or ATOM_DISABLE
uint8_t          2801 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t padding[2];
uint8_t          2824 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   h_border;
uint8_t          2825 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   v_border;
uint8_t          2826 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   crtc_id;                   // enum atom_crtc_def
uint8_t          2827 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   encoder_mode;			   // atom_encode_mode_def
uint8_t          2828 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   padding[2];
uint8_t          2837 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t i2cspeed_khz;
uint8_t          2839 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t regindex;
uint8_t          2840 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t status;                  /* enum atom_process_i2c_flag */
uint8_t          2843 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   flag;                    /* enum atom_process_i2c_status */
uint8_t          2844 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   trans_bytes;
uint8_t          2845 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   slave_addr;
uint8_t          2846 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   i2c_id;
uint8_t          2874 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  channelid;
uint8_t          2876 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   reply_status;
uint8_t          2877 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t   aux_delay;
uint8_t          2879 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   dataout_len;
uint8_t          2880 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t   hpd_id;                                       //=0: HPD1, =1: HPD2, =2: HPD3, =3: HPD4, =4: HPD5, =5: HPD6
uint8_t          2890 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t crtc_id;                        // enum atom_crtc_def
uint8_t          2891 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t encoder_id;                     // enum atom_dig_def
uint8_t          2892 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t encode_mode;                    // enum atom_encode_mode_def
uint8_t          2893 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t dst_bpc;                        // enum atom_panel_bit_per_color
uint8_t          2943 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t digid;            // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
uint8_t          2944 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t action;           // =  ATOM_ENOCODER_CMD_STREAM_SETUP
uint8_t          2945 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t digmode;          // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI
uint8_t          2946 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t lanenum;          // Lane number     
uint8_t          2948 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t bitpercolor;
uint8_t          2949 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t dplinkrate_270mhz;//= DP link rate/270Mhz, =6: 1.62G  = 10: 2.7G, =20: 5.4Ghz, =30: 8.1Ghz etc
uint8_t          2950 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t reserved[2];
uint8_t          2955 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t digid;           // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
uint8_t          2956 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t action;          // =  ATOM_ENOCODER_CMD_LINK_SETUP              
uint8_t          2957 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t digmode;         // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI
uint8_t          2958 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t lanenum;         // Lane number     
uint8_t          2959 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t symclk_10khz;    // Symbol Clock in 10Khz
uint8_t          2960 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t hpd_sel;
uint8_t          2961 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t digfe_sel;       // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable, 
uint8_t          2962 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t reserved[2];
uint8_t          2967 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t digid;              // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
uint8_t          2968 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t action;             // = ATOM_ENCODER_CMD_DPLINK_SETUP
uint8_t          2969 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t panelmode;      // enum atom_dig_encoder_control_panelmode
uint8_t          2970 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t reserved1;    
uint8_t          2976 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t digid;           // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
uint8_t          2977 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t action;          // = rest of generic encoder command which does not carry any parameters
uint8_t          2978 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t reserved1[2];    
uint8_t          2997 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t phyid;           // 0=UNIPHYA, 1=UNIPHYB, 2=UNIPHYC, 3=UNIPHYD, 4= UNIPHYE 5=UNIPHYF
uint8_t          2998 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t action;          // define as ATOM_TRANSMITER_ACTION_xxx
uint8_t          3000 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t digmode;        // enum atom_encode_mode_def
uint8_t          3001 drivers/gpu/drm/amd/include/atomfirmware.h     uint8_t dplaneset;      // DP voltage swing and pre-emphasis value defined in DPCD DP_LANE_SET, "DP_LANE_SET__xDB_y_zV"
uint8_t          3003 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  lanenum;        // Lane number 1, 2, 4, 8    
uint8_t          3005 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  hpdsel;         // =1: HPD1, =2: HPD2, .... =6: HPD6, =0: HPD is not assigned
uint8_t          3006 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  digfe_sel;      // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable, 
uint8_t          3007 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  connobj_id;     // Connector Object Id defined in ObjectId.h
uint8_t          3008 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  reserved;
uint8_t          3086 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  config;            // indicate which encoder, and DP link rate when ucAction = SETUP/ENABLE_OUTPUT  
uint8_t          3087 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  action;            // 
uint8_t          3088 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  encodermode;       // encoder mode, only used when ucAction = SETUP/ENABLE_OUTPUT
uint8_t          3089 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  lanenum;           // lane number, only used when ucAction = SETUP/ENABLE_OUTPUT  
uint8_t          3090 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  bitpercolor;       // output bit per color, only valid when ucAction = SETUP/ENABLE_OUTPUT and ucEncodeMode= DP
uint8_t          3091 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  hpd_id;        
uint8_t          3139 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  revision;
uint8_t          3140 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  checksum;
uint8_t          3141 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  oemId[6];
uint8_t          3142 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  oemTableId[8];    //UINT64  OemTableId;
uint8_t          3150 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t  tableUUID[16];    //0x24
uint8_t          3171 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  vbioscontent[1];
uint8_t          3176 drivers/gpu/drm/amd/include/atomfirmware.h   uint8_t                  lib1content[1];
uint8_t            84 drivers/gpu/drm/amd/include/discovery.h 	uint8_t number_instance;  /* instance of the IP */
uint8_t            85 drivers/gpu/drm/amd/include/discovery.h 	uint8_t num_base_address; /* Number of Base Addresses */
uint8_t            86 drivers/gpu/drm/amd/include/discovery.h 	uint8_t major;            /* HCID Major */
uint8_t            87 drivers/gpu/drm/amd/include/discovery.h 	uint8_t minor;            /* HCID Minor */
uint8_t            88 drivers/gpu/drm/amd/include/discovery.h 	uint8_t revision;         /* HCID Revision */
uint8_t            90 drivers/gpu/drm/amd/include/discovery.h 	uint8_t reserved : 4;     /* Placeholder field */
uint8_t            91 drivers/gpu/drm/amd/include/discovery.h 	uint8_t harvest : 4;      /* Harvest */
uint8_t            93 drivers/gpu/drm/amd/include/discovery.h 	uint8_t harvest : 4;      /* Harvest */
uint8_t            94 drivers/gpu/drm/amd/include/discovery.h 	uint8_t reserved : 4;     /* Placeholder field */
uint8_t           153 drivers/gpu/drm/amd/include/discovery.h 	uint8_t number_instance; /* Instance of the IP */
uint8_t           154 drivers/gpu/drm/amd/include/discovery.h 	uint8_t reserved;        /* Reserved for alignment */
uint8_t            55 drivers/gpu/drm/amd/include/dm_pp_interface.h 	uint8_t primary_transmitter_phyi_d;
uint8_t            57 drivers/gpu/drm/amd/include/dm_pp_interface.h 	uint8_t primary_transmitter_active_lanemap;
uint8_t            59 drivers/gpu/drm/amd/include/dm_pp_interface.h 	uint8_t secondary_transmitter_phy_id;
uint8_t            61 drivers/gpu/drm/amd/include/dm_pp_interface.h 	uint8_t secondary_transmitter_active_lanemap;
uint8_t           296 drivers/gpu/drm/amd/include/kgd_kfd_interface.h 					uint8_t vmid);
uint8_t           299 drivers/gpu/drm/amd/include/kgd_kfd_interface.h 					uint8_t vmid);
uint8_t           762 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 			    uint16_t *size, uint8_t *frev, uint8_t *crev,
uint8_t           763 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 			    uint8_t **addr)
uint8_t           772 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	*addr = (uint8_t *)adev->mode_info.atom_context->bios + data_start;
uint8_t           514 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 				      (uint8_t **)&smc_dpm_table);
uint8_t            54 drivers/gpu/drm/amd/powerplay/arcturus_ppt.h         uint8_t  pcie_gen[MAX_PCIE_CONF];
uint8_t            55 drivers/gpu/drm/amd/powerplay/arcturus_ppt.h         uint8_t  pcie_lane[MAX_PCIE_CONF];
uint8_t            33 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t  vddInd;
uint8_t            34 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t  vddciInd;
uint8_t            35 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t  mvddInd;
uint8_t            41 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t  phases;
uint8_t            42 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t  cks_enable;
uint8_t            43 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t  cks_voffset;
uint8_t            64 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t	vddcInd;
uint8_t            68 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t phases;
uint8_t            96 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t gen_speed;
uint8_t            97 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t lane_width;
uint8_t           111 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h 	uint8_t vrhot_triggered_sclk_dpm_index;           /* SCLK DPM level index to switch to when VRHot is triggered */
uint8_t            48 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t index,
uint8_t            53 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	uint8_t tmem_id;
uint8_t            55 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		((uint8_t *)reg_block + (2 * sizeof(uint16_t)) + le16_to_cpu(reg_block->usRegIndexTblSize));
uint8_t            57 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	uint8_t num_ranges = 0;
uint8_t            61 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		tmem_id = (uint8_t)((*(uint32_t *)reg_data & MEM_ID_MASK) >> MEM_ID_SHIFT);
uint8_t            84 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 			((uint8_t *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)) ;
uint8_t           105 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	uint8_t i = 0;
uint8_t           106 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	uint8_t num_entries = (uint8_t)((le16_to_cpu(reg_block->usRegIndexTblSize))
uint8_t           125 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 			((uint8_t *)format + sizeof(ATOM_INIT_REG_INDEX_FORMAT));
uint8_t           134 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t module_index,
uint8_t           157 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 			((uint8_t *)vram_info + le16_to_cpu(vram_info->usMemClkPatchTblOffset));
uint8_t           220 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t voltage_type, uint8_t voltage_mode)
uint8_t           224 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	uint8_t *start = (uint8_t *)voltage_object_info_table;
uint8_t           258 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	mpll_parameters.ucInputFlag = (uint8_t)((strobe_mode) ? 1 : 0);
uint8_t           509 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t voltage_type,
uint8_t           510 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t voltage_mode)
uint8_t           527 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t voltage_type,
uint8_t           528 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t voltage_mode,
uint8_t           576 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	uint8_t *start = (uint8_t *)gpio_lookup_table;
uint8_t           642 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t voltage_type,
uint8_t          1086 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		uint8_t voltage_type,
uint8_t          1215 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		const uint8_t clockSource,
uint8_t          1232 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	while (((uint8_t *)ssInfo - (uint8_t *)table) <
uint8_t          1240 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		ssInfo = (ATOM_ASIC_SS_ASSIGNMENT *)((uint8_t *)ssInfo +
uint8_t          1305 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	efuse_param.sEfuse.ucBitShift = (uint8_t)
uint8_t          1307 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 	efuse_param.sEfuse.ucBitLength  = (uint8_t)
uint8_t          1319 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 			      uint8_t level)
uint8_t          1338 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t          1431 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c int  atomctrl_get_svi2_info(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t          1432 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 				uint8_t *svd_gpio_id, uint8_t *svc_gpio_id,
uint8_t            88 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   uc_pll_ref_div;                      /* Output Parameter: PLL ref divider */
uint8_t            89 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   uc_pll_post_div;                      /* Output Parameter: PLL post divider */
uint8_t            90 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   uc_pll_cntl_flag;                    /*Output Flags: control flag */
uint8_t            98 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   uc_pll_ref_div;                      /*Output Parameter: PLL ref divider */
uint8_t            99 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   uc_pll_post_div;                     /*Output Parameter: PLL post divider */
uint8_t           100 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   uc_pll_cntl_flag;                    /*Output Flags: control flag */
uint8_t           177 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t			uc_htc_tmp_lmt;               /* bit [22:16] of D24F3x64 Hardware Thermal Control (HTC) Register, may not be needed, TBD */
uint8_t           178 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t			uc_tj_offset;                /* bit [28:22] of D24F3xE4 Thermtrip Status Register,may not be needed, TBD */
uint8_t           185 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t memory_vendor;
uint8_t           186 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t memory_type;
uint8_t           193 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   num_entries;
uint8_t           194 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t   rsv[3];
uint8_t           227 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  uc_pre_reg_data;
uint8_t           235 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucVco_setting;
uint8_t           236 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucPostdiv;
uint8_t           248 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t                         last;                    /* number of registers */
uint8_t           249 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t                         num_entries;             /* number of AC timing entries */
uint8_t           257 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t                    uc_gpio_pin_bit_shift;
uint8_t           281 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucEnableGB_VDROOP_TABLE_CKSOFF;
uint8_t           282 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucEnableGB_VDROOP_TABLE_CKSON;
uint8_t           283 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucEnableGB_FUSE_TABLE_CKSOFF;
uint8_t           284 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucEnableGB_FUSE_TABLE_CKSON;
uint8_t           286 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucEnableApplyAVFS_CKS_OFF_Voltage;
uint8_t           287 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint8_t  ucReserved;
uint8_t           291 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h extern int atomctrl_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage);
uint8_t           296 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h extern int atomctrl_initialize_mc_reg_table(struct pp_hwmgr *hwmgr, uint8_t module_index, pp_atomctrl_mc_reg_table *table);
uint8_t           302 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h extern bool atomctrl_is_voltage_controlled_by_gpio_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode);
uint8_t           303 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h extern int atomctrl_get_voltage_table_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table);
uint8_t           313 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h extern int atomctrl_calculate_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t           317 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 								uint8_t level);
uint8_t           318 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h extern int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t           324 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h extern int  atomctrl_get_svi2_info(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t           325 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 				uint8_t *svd_gpio_id, uint8_t *svc_gpio_id,
uint8_t            31 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c 		uint8_t voltage_type, uint8_t voltage_mode)
uint8_t            77 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c 		uint8_t voltage_type, uint8_t voltage_mode)
uint8_t            96 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c 		uint8_t voltage_type, uint8_t voltage_mode,
uint8_t           280 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c 	uint8_t format_revision, content_revision;
uint8_t           492 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c 					       uint8_t clk_id, uint8_t syspll_id,
uint8_t            47 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t psi0_enable;
uint8_t            48 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t psi1_enable;
uint8_t            49 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t max_vid_step;
uint8_t            50 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t telemetry_offset;
uint8_t            51 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t telemetry_slope;
uint8_t            57 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t uc_gpio_pin_bit_shift;
uint8_t            66 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t    ucPll_ss_enable;
uint8_t            67 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t    ucReserve;
uint8_t            96 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t    ucEnableGbVdroopTableCkson;
uint8_t            97 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t    ucEnableGbFuseTableCkson;
uint8_t           123 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucAcDcGpio;
uint8_t           124 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucAcDcPolarity;
uint8_t           125 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucVR0HotGpio;
uint8_t           126 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucVR0HotPolarity;
uint8_t           127 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucVR1HotGpio;
uint8_t           128 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucVR1HotPolarity;
uint8_t           129 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucFwCtfGpio;
uint8_t           130 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t   ucFwCtfPolarity;
uint8_t           147 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t    ucCoolingID;
uint8_t           152 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  liquid1_i2c_address;
uint8_t           153 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  liquid2_i2c_address;
uint8_t           154 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vr_i2c_address;
uint8_t           155 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  plx_i2c_address;
uint8_t           156 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  liquid_i2c_linescl;
uint8_t           157 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  liquid_i2c_linesda;
uint8_t           158 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vr_i2c_linescl;
uint8_t           159 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vr_i2c_linesda;
uint8_t           160 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  plx_i2c_linescl;
uint8_t           161 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  plx_i2c_linesda;
uint8_t           162 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vrsensorpresent;
uint8_t           163 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  liquidsensorpresent;
uint8_t           166 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vddgfxvrmapping;
uint8_t           167 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vddsocvrmapping;
uint8_t           168 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vddmem0vrmapping;
uint8_t           169 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vddmem1vrmapping;
uint8_t           170 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  gfxulvphasesheddingmask;
uint8_t           171 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  soculvphasesheddingmask;
uint8_t           174 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  gfxoffset;
uint8_t           175 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  padding_telemetrygfx;
uint8_t           177 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  socoffset;
uint8_t           178 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  padding_telemetrysoc;
uint8_t           180 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  mem0offset;
uint8_t           181 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  padding_telemetrymem0;
uint8_t           183 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  mem1offset;
uint8_t           184 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  padding_telemetrymem1;
uint8_t           186 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  acdcgpio;
uint8_t           187 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  acdcpolarity;
uint8_t           188 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vr0hotgpio;
uint8_t           189 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vr0hotpolarity;
uint8_t           190 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vr1hotgpio;
uint8_t           191 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  vr1hotpolarity;
uint8_t           192 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  padding1;
uint8_t           193 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  padding2;
uint8_t           195 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  ledpin0;
uint8_t           196 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  ledpin1;
uint8_t           197 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  ledpin2;
uint8_t           199 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t  pllgfxclkspreadenabled;
uint8_t           200 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t  pllgfxclkspreadpercent;
uint8_t           203 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  uclkspreadenabled;
uint8_t           204 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t  uclkspreadpercent;
uint8_t           207 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t socclkspreadenabled;
uint8_t           208 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h   uint8_t socclkspreadpercent;
uint8_t           211 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t  acggfxclkspreadenabled;
uint8_t           212 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t  acggfxclkspreadpercent;
uint8_t           215 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 	uint8_t Vr2_I2C_address;
uint8_t           225 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h int pp_atomfwctrl_get_voltage_table_v4(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t           226 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 		uint8_t voltage_mode, struct pp_atomfwctrl_voltage_table *voltage_table);
uint8_t           228 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 		uint8_t voltage_type, uint8_t voltage_mode);
uint8_t           240 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h 					uint8_t clk_id, uint8_t syspll_id,
uint8_t            56 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c uint8_t encode_pcie_lane_width(uint32_t num_lanes)
uint8_t            61 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c uint8_t decode_pcie_lane_width(uint32_t num_lanes)
uint8_t            27 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.h extern uint8_t encode_pcie_lane_width(uint32_t num_lanes);
uint8_t            28 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.h extern uint8_t decode_pcie_lane_width(uint32_t num_lanes);
uint8_t            94 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		table_size = sizeof(uint8_t) + p->ucNumEntries * sizeof(VCEClockInfo);
uint8_t           123 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		table_size = sizeof(uint8_t) + ptable->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record);
uint8_t           680 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 							    uint8_t version,
uint8_t           716 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		static const uint8_t look_up[(ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK >> ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT) + 1] = \
uint8_t           831 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 	uint8_t frev, crev;
uint8_t          1073 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 	uint8_t frev, crev;
uint8_t           444 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	result = smum_smc_table_manager(hwmgr, (uint8_t *)table, SMU10_CLOCKTABLE, true);
uint8_t          1162 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	smum_smc_table_manager(hwmgr, (uint8_t *)table, (uint16_t)SMU10_WMTABLE, false);
uint8_t          1238 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	static const uint8_t
uint8_t            77 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t vddc_index;
uint8_t            78 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t ds_divider_index;
uint8_t            79 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t ss_divider_index;
uint8_t            80 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t allow_gnb_slow;
uint8_t            81 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t force_nbp_state;
uint8_t            82 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t display_wm;
uint8_t            83 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t vce_wm;
uint8_t            84 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t num_simd_to_powerdown;
uint8_t            85 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t hysteresis_up;
uint8_t            86 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t rsv[3];
uint8_t           139 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t dpm0_pg_nbps_low;
uint8_t           140 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t dpm0_pg_nbps_high;
uint8_t           141 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t dpm_x_nbps_low;
uint8_t           142 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t dpm_x_nbps_high;
uint8_t           155 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t                   phy_present;
uint8_t           156 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t                   active_lane_mapping;
uint8_t           157 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t                   display_config_type;
uint8_t           158 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t                   active_num_of_lanes;
uint8_t           171 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t                      htc_tmp_lmt;
uint8_t           172 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t                      htc_hyst_lmt;
uint8_t           232 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t disp_config;
uint8_t           249 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t uvd_level_count;
uint8_t           250 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t vce_level_count;
uint8_t           251 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t acp_level_count;
uint8_t           252 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	uint8_t samu_level_count;
uint8_t          1594 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		uint8_t tmp1, tmp2;
uint8_t          1845 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint8_t entry_id;
uint8_t          1846 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint8_t voltage_id;
uint8_t          1927 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint8_t entry_id;
uint8_t          1969 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint8_t entry_id;
uint8_t          2140 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 				dep_mclk_table->entries[dep_mclk_table->count-1].vddInd = (uint8_t) i;
uint8_t          3065 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint8_t frev, crev;
uint8_t          3919 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint8_t  request;
uint8_t          5167 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
uint8_t          5170 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	uint8_t i;
uint8_t           193 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t bupdate_sclk;
uint8_t           194 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t sclk_up_hyst;
uint8_t           195 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t sclk_down_hyst;
uint8_t           197 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t bupdate_mclk;
uint8_t           198 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t mclk_up_hyst;
uint8_t           199 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t mclk_down_hyst;
uint8_t           261 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t                              mvdd_high_index;
uint8_t           262 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t                              mvdd_low_index;
uint8_t           287 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint8_t                           vddc_phase_shed_control;
uint8_t           365 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
uint8_t           313 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	uint8_t frev, crev;
uint8_t           419 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)data->sys_info.bootup_nb_voltage_index;
uint8_t           478 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(i < vddc_table->count) ? (uint8_t)vddc_table->entries[i].v : 0;
uint8_t           487 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
uint8_t           491 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(i < vdd_gfx_table->count) ? (uint8_t)vdd_gfx_table->entries[i].v : 0;
uint8_t           495 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(i < acp_table->count) ? (uint8_t)acp_table->entries[i].v : 0;
uint8_t           504 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
uint8_t           509 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0;
uint8_t           518 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
uint8_t           521 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0;
uint8_t           530 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
uint8_t           534 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(i < vce_table->count) ? (uint8_t)vce_table->entries[i].v : 0;
uint8_t           544 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
uint8_t          1345 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	uint8_t clock_info_index = smu8_clock_info->index;
uint8_t          1347 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	if (clock_info_index > (uint8_t)(hwmgr->platform_descriptor.hardwareActivityPerformanceLevels - 1))
uint8_t          1348 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 		clock_info_index = (uint8_t)(hwmgr->platform_descriptor.hardwareActivityPerformanceLevels - 1);
uint8_t          1351 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 	smu8_ps->levels[index].vddcIndex = (uint8_t)table->entries[clock_info_index].v;
uint8_t            61 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t htc_tmp_lmt;
uint8_t            62 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t htc_hyst_lmt;
uint8_t            86 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t phy_present;
uint8_t            87 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t active_lane_mapping;
uint8_t            88 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t display_config_type;
uint8_t            89 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t active_number_of_lanes;
uint8_t           101 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t vddcIndex;
uint8_t           102 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t dsDividerIndex;
uint8_t           103 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t ssDividerIndex;
uint8_t           104 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t allowGnbSlow;
uint8_t           105 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t forceNBPstate;
uint8_t           106 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t display_wm;
uint8_t           107 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t vce_wm;
uint8_t           108 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t numSIMDToPowerDown;
uint8_t           109 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t hysteresis_up;
uint8_t           110 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t rsv[3];
uint8_t           154 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t dpm_0_pg_nb_ps_low;
uint8_t           155 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t dpm_0_pg_nb_ps_high;
uint8_t           156 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t dpm_x_nb_ps_low;
uint8_t           157 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t dpm_x_nb_ps_high;
uint8_t           248 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t disp_config;
uint8_t           261 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t uvd_level_count;
uint8_t           262 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t vce_level_count;
uint8_t           264 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t acp_level_count;
uint8_t           265 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t samu_level_count;
uint8_t           275 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t uvd_boot_level;
uint8_t           276 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t vce_boot_level;
uint8_t           277 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t acp_boot_level;
uint8_t           278 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t samu_boot_level;
uint8_t           279 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t uvd_interval;
uint8_t           280 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t vce_interval;
uint8_t           281 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t acp_interval;
uint8_t           282 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t samu_interval;
uint8_t           284 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t graphics_interval;
uint8_t           285 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t graphics_therm_throttle_enable;
uint8_t           286 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t graphics_voltage_change_enable;
uint8_t           288 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t graphics_clk_slow_enable;
uint8_t           289 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	uint8_t graphics_clk_slow_divider;
uint8_t            35 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c uint8_t convert_to_vid(uint16_t vddc)
uint8_t            37 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	return (uint8_t) ((6200 - (vddc * VOLTAGE_SCALE)) / 25);
uint8_t            40 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c uint16_t convert_to_vddc(uint8_t vid)
uint8_t            95 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	if (size == sizeof(uint8_t))
uint8_t           388 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c uint8_t phm_get_voltage_index(
uint8_t           391 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	uint8_t count = (uint8_t) (lookup_table->count);
uint8_t           392 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	uint8_t i;
uint8_t           408 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c uint8_t phm_get_voltage_id(pp_atomctrl_voltage_table *voltage_table,
uint8_t           411 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	uint8_t count = (uint8_t) (voltage_table->count);
uint8_t           412 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	uint8_t i = 0;
uint8_t           463 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	uint8_t entry_id;
uint8_t           464 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	uint8_t voltage_id;
uint8_t           568 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t           664 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 						uint8_t *frev, uint8_t *crev)
uint8_t           672 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		return (uint8_t *)adev->mode_info.atom_context->bios +
uint8_t           682 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	uint8_t i = 0;
uint8_t           733 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table->WatermarkRow[1][i].WmSetting = (uint8_t)
uint8_t           754 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		table->WatermarkRow[0][i].WmSetting = (uint8_t)
uint8_t            32 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h uint8_t convert_to_vid(uint16_t vddc);
uint8_t            33 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h uint16_t convert_to_vddc(uint8_t vid);
uint8_t            41 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h 	uint8_t  WmSetting;
uint8_t            42 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h 	uint8_t  Padding[3];
uint8_t            83 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h extern uint8_t phm_get_voltage_id(struct pp_atomctrl_voltage_table *voltage_table,
uint8_t            85 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h extern uint8_t phm_get_voltage_index(struct phm_ppt_v1_voltage_lookup_table *lookup_table, uint16_t voltage);
uint8_t            94 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h extern int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
uint8_t           115 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h 						uint8_t *frev, uint8_t *crev);
uint8_t           519 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t entry_id;
uint8_t           520 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t voltage_id;
uint8_t           661 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t entry_id, voltage_id;
uint8_t           956 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t i, j;
uint8_t           976 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->LedPin0 = (uint8_t)(mask & 0xff);
uint8_t           977 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->LedPin1 = (uint8_t)((mask >> 8) & 0xff);
uint8_t           978 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->LedPin2 = (uint8_t)((mask >> 16) & 0xff);
uint8_t          1264 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			pcie_table->pcie_lane[i] = (uint8_t)encode_pcie_lane_width(
uint8_t          1267 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			pcie_table->pcie_lane[i] = (uint8_t)encode_pcie_lane_width(
uint8_t          1470 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)table_info->us_ulv_voltage_offset;
uint8_t          1473 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->us_ulv_smnclk_did);
uint8_t          1475 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->us_ulv_mp1clk_did);
uint8_t          1477 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->us_ulv_gfxclk_bypass);
uint8_t          1479 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(data->vddc_voltage_table.psi0_enable);
uint8_t          1481 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(data->vddc_voltage_table.psi1_enable);
uint8_t          1487 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint32_t lclock, uint8_t *curr_lclk_did)
uint8_t          1599 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	current_gfxclk_level->Did = (uint8_t)(dividers.ulDid);
uint8_t          1615 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint32_t soc_clock, uint8_t *current_soc_did,
uint8_t          1616 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint8_t *current_vol_index)
uint8_t          1650 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	*current_soc_did = (uint8_t)dividers.ulDid;
uint8_t          1651 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	*current_vol_index = (uint8_t)(dep_on_soc->entries[i].vddInd);
uint8_t          1724 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t soc_vid = 0;
uint8_t          1734 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		soc_vid = (uint8_t)convert_to_vid(vddc_lookup_table->entries[i].us_vdd);
uint8_t          1751 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint32_t mem_clock, uint8_t *current_mem_vid,
uint8_t          1752 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		PllSetting_t *current_memclk_level, uint8_t *current_mem_soc_vind)
uint8_t          1791 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(convert_to_vid(dep_on_mclk->entries[i].mvdd));
uint8_t          1793 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(dep_on_mclk->entries[i].vddInd);
uint8_t          1795 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	current_memclk_level->Did = (uint8_t)(dividers.ulDid);
uint8_t          1847 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(data->lowest_uclk_reserved_for_ulv);
uint8_t          1863 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t vid = 0;
uint8_t          1890 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		vid = (uint8_t)convert_to_vid(vddc);
uint8_t          1922 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint32_t eclock, uint8_t *current_eclk_did,
uint8_t          1923 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint8_t *current_soc_vol)
uint8_t          1938 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	*current_eclk_did = (uint8_t)dividers.ulDid;
uint8_t          1980 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint32_t vclock, uint8_t *current_vclk_did)
uint8_t          1990 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	*current_vclk_did = (uint8_t)dividers.ulDid;
uint8_t          1996 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		uint32_t dclock, uint8_t *current_dclk_did)
uint8_t          2006 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	*current_dclk_did = (uint8_t)dividers.ulDid;
uint8_t          2094 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		pp_table->CksVidOffset[i] = (uint8_t)(dep_table->entries[i].cks_voffset
uint8_t          2113 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->MinVoltageVid = (uint8_t)0xff;
uint8_t          2114 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->MaxVoltageVid = (uint8_t)0;
uint8_t          2119 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			pp_table->MinVoltageVid = (uint8_t)
uint8_t          2121 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			pp_table->MaxVoltageVid = (uint8_t)
uint8_t          2177 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 						convert_to_vid((uint8_t)(dep_table->entries[i].sclk_offset));
uint8_t          2446 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		result = smum_smc_table_manager(hwmgr,  (uint8_t *)avfs_fuse_table,
uint8_t          2523 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->uc_gfx_dpm_voltage_mode);
uint8_t          2525 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->uc_soc_dpm_voltage_mode);
uint8_t          2527 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->uc_uclk_dpm_voltage_mode);
uint8_t          2529 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->uc_uvd_dpm_voltage_mode);
uint8_t          2531 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->uc_vce_dpm_voltage_mode);
uint8_t          2533 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->uc_mp0_dpm_voltage_mode);
uint8_t          2536 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			(uint8_t)(table_info->uc_dcef_dpm_voltage_mode);
uint8_t          2626 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->GfxclkAverageAlpha = (uint8_t)
uint8_t          2628 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->SocclkAverageAlpha = (uint8_t)
uint8_t          2630 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->UclkAverageAlpha = (uint8_t)
uint8_t          2632 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	pp_table->GfxActivityAverageAlpha = (uint8_t)
uint8_t          2637 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	result = smum_smc_table_manager(hwmgr, (uint8_t *)pp_table, PPTABLE, false);
uint8_t          3690 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	result = smum_smc_table_manager(hwmgr, (uint8_t *)pp_table, PPTABLE, false);
uint8_t          3829 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		*((uint32_t *)value) = (uint32_t)convert_to_vddc((uint8_t)val_vid);
uint8_t          3890 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c static uint8_t vega10_get_uclk_index(struct pp_hwmgr *hwmgr,
uint8_t          3894 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t count;
uint8_t          3895 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t i;
uint8_t          3900 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	count = (uint8_t)(mclk_table->count);
uint8_t          4590 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		result = smum_smc_table_manager(hwmgr, (uint8_t *)wm_table, WMTABLE, false);
uint8_t          4906 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	static const uint8_t profile_mode_setting[6][4] = {{70, 60, 0, 0,},
uint8_t          4948 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t busy_set_point;
uint8_t          4949 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t FPS;
uint8_t          4950 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t use_rlc_busy;
uint8_t          4951 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t min_active_level;
uint8_t          5097 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	uint8_t i, j;
uint8_t           141 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t  pcie_gen[MAX_PCIE_CONF];
uint8_t           142 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t  pcie_lane[MAX_PCIE_CONF];
uint8_t           203 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t         vr_hot_gpio;
uint8_t           204 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t         ac_dc_gpio;
uint8_t           205 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t         therm_out_gpio;
uint8_t           206 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t         therm_out_polarity;
uint8_t           207 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t         therm_out_mode;
uint8_t           225 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   ac_dc_switch_gpio_support;
uint8_t           226 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   avfs_support;
uint8_t           227 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   cac_support;
uint8_t           228 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   clock_stretcher_support;
uint8_t           229 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   db_ramping_support;
uint8_t           230 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   didt_mode;
uint8_t           231 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   didt_support;
uint8_t           232 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   edc_didt_support;
uint8_t           233 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   dynamic_state_patching_support;
uint8_t           234 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   enable_pkg_pwr_tracking_feature;
uint8_t           235 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   enable_tdc_limit_feature;
uint8_t           237 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   force_dpm_high;
uint8_t           238 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   fuzzy_fan_control_support;
uint8_t           239 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   long_idle_baco_support;
uint8_t           240 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   mclk_dpm_key_disabled;
uint8_t           241 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   od_state_in_dc_support;
uint8_t           242 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   pcieLaneOverride;
uint8_t           243 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   pcieSpeedOverride;
uint8_t           245 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   pcie_dpm_key_disabled;
uint8_t           246 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   dcefclk_dpm_key_disabled;
uint8_t           247 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   power_containment_support;
uint8_t           248 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   ppt_support;
uint8_t           249 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   prefetcher_dpm_key_disabled;
uint8_t           250 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   quick_transition_support;
uint8_t           251 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   regulator_hot_gpio_support;
uint8_t           252 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   sclk_deep_sleep_support;
uint8_t           253 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   sclk_dpm_key_disabled;
uint8_t           254 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   sclk_from_vbios;
uint8_t           255 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   sclk_throttle_low_notification;
uint8_t           256 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   show_baco_dbg_info;
uint8_t           257 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   skip_baco_hardware;
uint8_t           258 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   socclk_dpm_key_disabled;
uint8_t           259 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   spll_shutdown_support;
uint8_t           260 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   sq_ramping_support;
uint8_t           262 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   tcp_ramping_support;
uint8_t           263 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   tdc_support;
uint8_t           264 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   td_ramping_support;
uint8_t           265 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   dbr_ramping_support;
uint8_t           266 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   gc_didt_support;
uint8_t           267 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   psm_didt_support;
uint8_t           268 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   thermal_out_gpio_support;
uint8_t           269 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   thermal_support;
uint8_t           270 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   fw_ctf_enabled;
uint8_t           271 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   fan_control_support;
uint8_t           272 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   ulps_support;
uint8_t           273 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   ulv_support;
uint8_t           275 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   odn_feature_enable;
uint8_t           276 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   disable_water_mark;
uint8_t           277 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   zrpm_stop_temp;
uint8_t           278 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   zrpm_start_temp;
uint8_t           279 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   led_dpm_enabled;
uint8_t           280 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   vr0hot_enabled;
uint8_t           281 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   vr1hot_enabled;
uint8_t           334 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t                           need_update_dpm_table;
uint8_t           386 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t                       custom_profile_mode[4];
uint8_t            61 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h     uint8_t   SviLoadLineEn;
uint8_t            62 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h     uint8_t   SviLoadLineVddC;
uint8_t            63 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h     uint8_t   TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t            64 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h     uint8_t   TDC_MAWt;
uint8_t            65 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h     uint8_t   TdcWaterfallCtl;
uint8_t            66 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.h     uint8_t   DTEAmbientTempBase;
uint8_t           379 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c static void get_scl_sda_value(uint8_t line, uint8_t *scl, uint8_t* sda)
uint8_t           428 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	uint8_t scl;
uint8_t           429 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	uint8_t sda;
uint8_t           751 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	uint8_t num_entries;
uint8_t           551 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c 				(uint8_t *)(&(data->smc_state_table.pp_table)),
uint8_t           576 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c 				(uint8_t *)(&(data->smc_state_table.pp_table)),
uint8_t           760 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 					(uint8_t *)pp_table, TABLE_PPTABLE, false);
uint8_t          1257 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 		ret = smum_smc_table_manager(hwmgr, (uint8_t *)metrics_table,
uint8_t          2379 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 						(uint8_t *)wm_table, TABLE_WATERMARKS, false);
uint8_t           120 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t  pcie_gen[MAX_PCIE_CONF];
uint8_t           121 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t  pcie_lane[MAX_PCIE_CONF];
uint8_t           161 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t     uc_cooling_id;
uint8_t           190 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t         vr_hot_gpio;
uint8_t           191 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t         ac_dc_gpio;
uint8_t           192 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t         therm_out_gpio;
uint8_t           193 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t         therm_out_polarity;
uint8_t           194 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t         therm_out_mode;
uint8_t           217 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   ac_dc_switch_gpio_support;
uint8_t           218 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   acg_loop_support;
uint8_t           219 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   clock_stretcher_support;
uint8_t           220 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   db_ramping_support;
uint8_t           221 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   didt_mode;
uint8_t           222 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   didt_support;
uint8_t           223 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   edc_didt_support;
uint8_t           224 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   force_dpm_high;
uint8_t           225 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   fuzzy_fan_control_support;
uint8_t           226 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   mclk_dpm_key_disabled;
uint8_t           227 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   od_state_in_dc_support;
uint8_t           228 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   pcie_lane_override;
uint8_t           229 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   pcie_speed_override;
uint8_t           231 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   pcie_dpm_key_disabled;
uint8_t           232 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   dcefclk_dpm_key_disabled;
uint8_t           233 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   prefetcher_dpm_key_disabled;
uint8_t           234 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   quick_transition_support;
uint8_t           235 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   regulator_hot_gpio_support;
uint8_t           236 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   master_deep_sleep_support;
uint8_t           237 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   gfx_clk_deep_sleep_support;
uint8_t           238 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   sclk_deep_sleep_support;
uint8_t           239 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   lclk_deep_sleep_support;
uint8_t           240 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   dce_fclk_deep_sleep_support;
uint8_t           241 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   sclk_dpm_key_disabled;
uint8_t           242 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   sclk_throttle_low_notification;
uint8_t           243 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   skip_baco_hardware;
uint8_t           244 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   socclk_dpm_key_disabled;
uint8_t           245 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   sq_ramping_support;
uint8_t           246 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   tcp_ramping_support;
uint8_t           247 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   td_ramping_support;
uint8_t           248 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   dbr_ramping_support;
uint8_t           249 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   gc_didt_support;
uint8_t           250 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   psm_didt_support;
uint8_t           251 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   thermal_support;
uint8_t           252 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   fw_ctf_enabled;
uint8_t           253 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   led_dpm_enabled;
uint8_t           254 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   fan_control_support;
uint8_t           255 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   ulv_support;
uint8_t           256 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   odn_feature_enable;
uint8_t           257 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   disable_water_mark;
uint8_t           258 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   disable_workload_policy;
uint8_t           260 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   disable_3d_fs_detection;
uint8_t           261 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   disable_pp_tuning;
uint8_t           262 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   disable_xlpp_tuning;
uint8_t           269 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   fps_support;
uint8_t           270 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   vr0hot;
uint8_t           271 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   vr1hot;
uint8_t           272 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   disable_auto_wattman;
uint8_t           275 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   auto_wattman_threshold;
uint8_t           276 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   log_avfs_param;
uint8_t           277 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   enable_enginess;
uint8_t           278 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   custom_fan_support;
uint8_t           279 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t   disable_pcc_limit_control;
uint8_t           336 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint8_t                           need_update_dpm_table;
uint8_t           817 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 					(uint8_t *)pp_table, TABLE_PPTABLE, false);
uint8_t          1226 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, true);
uint8_t          1354 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, false);
uint8_t          1373 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	ret = smum_smc_table_manager(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE, true);
uint8_t          1430 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	ret = smum_smc_table_manager(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE, false);
uint8_t          2080 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		ret = smum_smc_table_manager(hwmgr, (uint8_t *)metrics_table,
uint8_t          2227 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 			(uint32_t)convert_to_vddc((uint8_t)val_vid);
uint8_t          3077 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 					     (uint8_t *)od_table,
uint8_t          3086 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 					     (uint8_t *)od_table,
uint8_t          3552 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 						(uint8_t *)wm_table, TABLE_WATERMARKS, false);
uint8_t          3919 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				(uint8_t *)(&activity_monitor), workload_type);
uint8_t          4007 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				(uint8_t *)(&activity_monitor),
uint8_t          4068 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				(uint8_t *)(&activity_monitor),
uint8_t           172 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t  pcie_gen[MAX_PCIE_CONF];
uint8_t           173 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t  pcie_lane[MAX_PCIE_CONF];
uint8_t           213 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t     uc_cooling_id;
uint8_t           250 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t         vr_hot_gpio;
uint8_t           251 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t         ac_dc_gpio;
uint8_t           252 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t         therm_out_gpio;
uint8_t           253 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t         therm_out_polarity;
uint8_t           254 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t         therm_out_mode;
uint8_t           277 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   ac_dc_switch_gpio_support;
uint8_t           278 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   acg_loop_support;
uint8_t           279 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   clock_stretcher_support;
uint8_t           280 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   db_ramping_support;
uint8_t           281 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   didt_mode;
uint8_t           282 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   didt_support;
uint8_t           283 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   edc_didt_support;
uint8_t           284 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   force_dpm_high;
uint8_t           285 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   fuzzy_fan_control_support;
uint8_t           286 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   mclk_dpm_key_disabled;
uint8_t           287 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   od_state_in_dc_support;
uint8_t           288 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   pcie_lane_override;
uint8_t           289 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   pcie_speed_override;
uint8_t           291 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   pcie_dpm_key_disabled;
uint8_t           292 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   dcefclk_dpm_key_disabled;
uint8_t           293 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   prefetcher_dpm_key_disabled;
uint8_t           294 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   quick_transition_support;
uint8_t           295 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   regulator_hot_gpio_support;
uint8_t           296 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   master_deep_sleep_support;
uint8_t           297 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   gfx_clk_deep_sleep_support;
uint8_t           298 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   sclk_deep_sleep_support;
uint8_t           299 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   lclk_deep_sleep_support;
uint8_t           300 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   dce_fclk_deep_sleep_support;
uint8_t           301 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   sclk_dpm_key_disabled;
uint8_t           302 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   sclk_throttle_low_notification;
uint8_t           303 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   skip_baco_hardware;
uint8_t           304 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   socclk_dpm_key_disabled;
uint8_t           305 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   sq_ramping_support;
uint8_t           306 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   tcp_ramping_support;
uint8_t           307 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   td_ramping_support;
uint8_t           308 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   dbr_ramping_support;
uint8_t           309 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   gc_didt_support;
uint8_t           310 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   psm_didt_support;
uint8_t           311 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   thermal_support;
uint8_t           312 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   fw_ctf_enabled;
uint8_t           313 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   led_dpm_enabled;
uint8_t           314 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   fan_control_support;
uint8_t           315 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   ulv_support;
uint8_t           316 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   od8_feature_enable;
uint8_t           317 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   disable_water_mark;
uint8_t           318 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   disable_workload_policy;
uint8_t           320 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   disable_3d_fs_detection;
uint8_t           321 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   disable_pp_tuning;
uint8_t           322 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   disable_xlpp_tuning;
uint8_t           329 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   fps_support;
uint8_t           330 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   vr0hot;
uint8_t           331 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   vr1hot;
uint8_t           332 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   disable_auto_wattman;
uint8_t           336 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   auto_wattman_threshold;
uint8_t           337 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   log_avfs_param;
uint8_t           338 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   enable_enginess;
uint8_t           339 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   custom_fan_support;
uint8_t           340 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   disable_pcc_limit_control;
uint8_t           341 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t   gfxoff_controlled_by_driver;
uint8_t           458 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint8_t                           need_update_dpm_table;
uint8_t           688 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 		uint8_t **pptable_info_array,
uint8_t           689 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 		const uint8_t *pptable_array,
uint8_t           690 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 		uint8_t od_feature_count)
uint8_t           693 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 	uint8_t *table;
uint8_t           696 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c 	array_size = sizeof(uint8_t) * od_feature_count;
uint8_t           103 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	uint8_t                 m3arb;
uint8_t           104 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	uint8_t                 unused[3];
uint8_t           127 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	uint8_t supported_power_levels;
uint8_t           180 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	uint8_t domain;
uint8_t           223 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	uint8_t				cooling_id;
uint8_t           264 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	uint8_t                         thermal_controller_type;
uint8_t           369 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	uint8_t  *ppt_start_addr;
uint8_t           772 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 				   uint16_t *size, uint8_t *frev, uint8_t *crev,
uint8_t           773 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 				   uint8_t **addr);
uint8_t           142 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t count;
uint8_t           168 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t count;                                    /* Number of entries. */
uint8_t           173 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t count;                                    /* Number of entries. */
uint8_t           178 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t count;                                    /* Number of entries. */
uint8_t           188 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t count;
uint8_t           231 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	int (*smc_table_manager)(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw); /*rw: true for read, false for write */
uint8_t           396 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t count;
uint8_t           425 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucLiquid1_I2C_address;
uint8_t           426 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucLiquid2_I2C_address;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucLiquid_I2C_Line;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucVr_I2C_address;
uint8_t           429 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucVr_I2C_Line;
uint8_t           430 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucPlx_I2C_address;
uint8_t           431 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucPlx_I2C_Line;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucCKS_LDO_REFSEL;
uint8_t           463 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucLiquid1_I2C_address;
uint8_t           464 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucLiquid2_I2C_address;
uint8_t           465 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucLiquid_I2C_Line;
uint8_t           466 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucVr_I2C_address;
uint8_t           467 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucVr_I2C_Line;
uint8_t           468 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucPlx_I2C_address;
uint8_t           469 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucPlx_I2C_Line;
uint8_t           470 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucLiquid_I2C_LineSDA;
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucVr_I2C_LineSDA;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucPlx_I2C_LineSDA;
uint8_t           480 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ppm_design;
uint8_t           498 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  ucDispConfig;
uint8_t           506 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t numEntries;
uint8_t           589 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  uc_gfx_dpm_voltage_mode;
uint8_t           590 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  uc_soc_dpm_voltage_mode;
uint8_t           591 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  uc_uclk_dpm_voltage_mode;
uint8_t           592 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  uc_uvd_dpm_voltage_mode;
uint8_t           593 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  uc_vce_dpm_voltage_mode;
uint8_t           594 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  uc_mp0_dpm_voltage_mode;
uint8_t           595 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t  uc_dcef_dpm_voltage_mode;
uint8_t           600 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t uc_thermal_controller_type;
uint8_t           613 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t *od_feature_capabilities;
uint8_t           653 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucTachometerPulsesPerRevolution;
uint8_t           665 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucTHyst;                         /* Temperature hysteresis. Integer. */
uint8_t           668 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucFanControlMode;
uint8_t           686 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucTargetTemperature;             /* Advanced fan controller target temperature. */
uint8_t           687 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucMinimumPWMLimit;               /* The minimum PWM that the advanced fan controller can set.  This should be set to the highest PWM that will run the fan at its lowest RPM. */
uint8_t           695 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucEnableZeroRPM;
uint8_t           696 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucFanStopTemperature;
uint8_t           697 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t   ucFanStartTemperature;
uint8_t           706 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t ucType;
uint8_t           707 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t ucI2cLine;
uint8_t           708 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t ucI2cAddress;
uint8_t           709 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 	uint8_t use_hw_fan_control;
uint8_t           110 drivers/gpu/drm/amd/powerplay/inc/power_state.h 	uint8_t                 m3arb;
uint8_t           111 drivers/gpu/drm/amd/powerplay/inc/power_state.h 	uint8_t                 unused[3];
uint8_t           139 drivers/gpu/drm/amd/powerplay/inc/power_state.h 	uint8_t supportedPowerLevels;
uint8_t            56 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h 	uint8_t  WmSetting;
uint8_t            57 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h 	uint8_t  Padding[3];
uint8_t            84 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h 	uint8_t             ActiveHystLimit;
uint8_t            85 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h 	uint8_t             IdleHystLimit;
uint8_t            86 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h 	uint8_t             FPS;
uint8_t            87 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h 	uint8_t             MinActiveFreqType;
uint8_t           353 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t        VoltageMode;
uint8_t           354 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t        SnapToDiscrete;
uint8_t           355 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t        NumDiscreteLevels;
uint8_t           356 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t        padding;
uint8_t           396 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  MemoryOnPackage;
uint8_t           397 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  padding8_limits;
uint8_t           403 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  UlvSmnclkDid;
uint8_t           404 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  UlvMp1clkDid;
uint8_t           405 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  UlvGfxclkBypass;
uint8_t           406 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  Padding234;
uint8_t           443 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t         Padding567[4];
uint8_t           445 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t         GfxclkSource;
uint8_t           446 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t         Padding456;
uint8_t           448 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      LowestUclkReservedForUlv;
uint8_t           449 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding8_Uclk[3];
uint8_t           452 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      PcieGenSpeed[NUM_LINK_LEVELS];
uint8_t           453 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      PcieLaneCount[NUM_LINK_LEVELS];
uint8_t           479 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      FanZeroRpmEnable;
uint8_t           480 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      FanTachEdgePerRev;
uint8_t           490 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t           OverrideAvfsGb[AVFS_VOLTAGE_COUNT];
uint8_t           491 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t           Padding8_Avfs[2];
uint8_t           504 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t           DcBtcEnabled[AVFS_VOLTAGE_COUNT];
uint8_t           505 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t           Padding8_GfxBtc[2];
uint8_t           511 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t           XgmiLinkSpeed   [NUM_XGMI_LEVELS];
uint8_t           512 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t           XgmiLinkWidth   [NUM_XGMI_LEVELS];
uint8_t           542 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VddGfxVrMapping;
uint8_t           543 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VddSocVrMapping;
uint8_t           544 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VddMem0VrMapping;
uint8_t           545 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VddMem1VrMapping;
uint8_t           547 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      GfxUlvPhaseSheddingMask;
uint8_t           548 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      SocUlvPhaseSheddingMask;
uint8_t           549 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      ExternalSensorPresent;
uint8_t           550 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding8_V;
uint8_t           555 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding_TelemetryGfx;
uint8_t           559 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding_TelemetrySoc;
uint8_t           563 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding_TelemetryMem0;
uint8_t           567 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding_TelemetryMem1;
uint8_t           570 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      AcDcGpio;
uint8_t           571 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      AcDcPolarity;
uint8_t           572 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VR0HotGpio;
uint8_t           573 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VR0HotPolarity;
uint8_t           575 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VR1HotGpio;
uint8_t           576 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      VR1HotPolarity;
uint8_t           577 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding1;
uint8_t           578 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      Padding2;
uint8_t           582 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      LedPin0;
uint8_t           583 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      LedPin1;
uint8_t           584 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      LedPin2;
uint8_t           585 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      padding8_4;
uint8_t           588 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      PllGfxclkSpreadEnabled;
uint8_t           589 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      PllGfxclkSpreadPercent;
uint8_t           592 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      UclkSpreadEnabled;
uint8_t           593 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      UclkSpreadPercent;
uint8_t           596 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      FclkSpreadEnabled;
uint8_t           597 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      FclkSpreadPercent;
uint8_t           600 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      FllGfxclkSpreadEnabled;
uint8_t           601 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t      FllGfxclkSpreadPercent;
uint8_t           654 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  CurrSocVoltageOffset  ;
uint8_t           655 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  CurrGfxVoltageOffset  ;
uint8_t           656 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  CurrMemVidOffset      ;
uint8_t           657 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  Padding8              ;
uint8_t           670 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  LinkDpmLevel;
uint8_t           672 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  Padding;
uint8_t           684 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  WmSetting;
uint8_t           685 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  Padding[3];
uint8_t           719 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  AvfsVersion;
uint8_t           720 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  AvfsEn[AVFS_VOLTAGE_COUNT];
uint8_t           722 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  OverrideVFT[AVFS_VOLTAGE_COUNT];
uint8_t           723 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  OverrideAvfsGb[AVFS_VOLTAGE_COUNT];
uint8_t           725 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  OverrideTemperatures[AVFS_VOLTAGE_COUNT];
uint8_t           726 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  OverrideVInversion[AVFS_VOLTAGE_COUNT];
uint8_t           727 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  OverrideP2V[AVFS_VOLTAGE_COUNT];
uint8_t           728 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t  OverrideP2VCharzFreq[AVFS_VOLTAGE_COUNT];
uint8_t           770 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Gfx_ActiveHystLimit;
uint8_t           771 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Gfx_IdleHystLimit;
uint8_t           772 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Gfx_FPS;
uint8_t           773 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Gfx_MinActiveFreqType;
uint8_t           774 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Gfx_BoosterFreqType; 
uint8_t           775 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Gfx_UseRlcBusy; 
uint8_t           785 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Soc_ActiveHystLimit;
uint8_t           786 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Soc_IdleHystLimit;
uint8_t           787 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Soc_FPS;
uint8_t           788 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Soc_MinActiveFreqType;
uint8_t           789 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Soc_BoosterFreqType; 
uint8_t           790 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Soc_UseRlcBusy;
uint8_t           800 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Mem_ActiveHystLimit;
uint8_t           801 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Mem_IdleHystLimit;
uint8_t           802 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Mem_FPS;
uint8_t           803 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Mem_MinActiveFreqType;
uint8_t           804 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Mem_BoosterFreqType;
uint8_t           805 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Mem_UseRlcBusy; 
uint8_t           815 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Fclk_ActiveHystLimit;
uint8_t           816 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Fclk_IdleHystLimit;
uint8_t           817 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Fclk_FPS;
uint8_t           818 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Fclk_MinActiveFreqType;
uint8_t           819 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Fclk_BoosterFreqType;
uint8_t           820 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h   uint8_t   Fclk_UseRlcBusy;
uint8_t           260 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t   Enabled;
uint8_t           261 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t   Speed;
uint8_t           262 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t   Padding[2];
uint8_t           264 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t   ControllerPort;
uint8_t           265 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t   ControllerName;
uint8_t           266 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t   ThermalThrotter;
uint8_t           267 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t   I2cProtocol;
uint8_t           298 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t RegisterAddr; ////only valid for write, ignored for read
uint8_t           299 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t Cmd;  //Read(0) or Write(1)
uint8_t           300 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t Data;  //Return data for read. Data to send for write
uint8_t           301 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t CmdConfig; //Includes whether associated command should have a stop or restart command
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t     I2CcontrollerPort; //CKSVII2C0(0) or //CKSVII2C1(1)
uint8_t           306 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t     I2CSpeed;          //Slow(0) or Fast(1)
uint8_t           308 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t     NumCmds;           //Number of commands
uint8_t           309 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t     Padding[3];
uint8_t           442 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t        VoltageMode;         // 0 - AVFS only, 1- min(AVFS,SS), 2-SS only
uint8_t           443 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t        SnapToDiscrete;      // 0 - Fine grained DPM, 1 - Discrete DPM
uint8_t           444 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t        NumDiscreteLevels;   // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwise set to # discrete levels used
uint8_t           445 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t        padding;
uint8_t           484 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  UlvGfxclkBypass;  // 1 to turn off/bypass Gfxclk during ULV, 0 to leave Gfxclk on during ULV
uint8_t           485 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  Padding234[3];
uint8_t           515 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t         Padding567[4];
uint8_t           517 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t         GfxclkSource;         // 0 = PLL, 1 = AFLL
uint8_t           518 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t         Padding456;
uint8_t           542 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      FanZeroRpmEnable;
uint8_t           543 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      FanTachEdgePerRev;
uint8_t           544 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      FanTempInputSelect;
uint8_t           545 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      padding8_Fan;
uint8_t           556 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           OverrideAvfsGb[AVFS_VOLTAGE_COUNT];
uint8_t           557 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           Padding8_Avfs[2];
uint8_t           569 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           DcBtcEnabled[AVFS_VOLTAGE_COUNT];
uint8_t           570 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           Padding8_GfxBtc[2];
uint8_t           578 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           XgmiDpmPstates[NUM_XGMI_LEVELS]; // 2 DPM states, high and low.  0-P0, 1-P1, 2-P2, 3-P3.
uint8_t           579 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           XgmiDpmSpare[2];
uint8_t           604 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      TotalPowerConfig;    //0-TDP, 1-TGP, 2-TCP Estimated, 3-TCP Measured
uint8_t           605 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      TotalPowerSpare1;
uint8_t           622 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      VddGfxVrMapping;     // Use VR_MAPPING* bitfields
uint8_t           623 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      VddSocVrMapping;     // Use VR_MAPPING* bitfields
uint8_t           624 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      VddMemVrMapping;     // Use VR_MAPPING* bitfields
uint8_t           625 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      BoardVrMapping;      // Use VR_MAPPING* bitfields
uint8_t           627 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      GfxUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
uint8_t           628 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      ExternalSensorPresent; // External RDI connected to TMON (aka TEMP IN)
uint8_t           629 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      Padding8_V[2];
uint8_t           634 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      Padding_TelemetryGfx;
uint8_t           638 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      Padding_TelemetrySoc;
uint8_t           642 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      Padding_TelemetryMem;
uint8_t           646 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      Padding_TelemetryBoardInput;
uint8_t           649 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      VR0HotGpio;      // GPIO pin configured for VR0 HOT event
uint8_t           650 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      VR0HotPolarity;  // GPIO polarity for VR0 HOT event
uint8_t           651 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      VR1HotGpio;      // GPIO pin configured for VR1 HOT event
uint8_t           652 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      VR1HotPolarity;  // GPIO polarity for VR1 HOT event
uint8_t           655 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      PllGfxclkSpreadEnabled;   // on or off
uint8_t           656 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      PllGfxclkSpreadPercent;   // Q4.4
uint8_t           660 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      UclkSpreadEnabled;   // on or off
uint8_t           661 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      UclkSpreadPercent;   // Q4.4
uint8_t           665 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      FclkSpreadEnabled;   // on or off
uint8_t           666 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      FclkSpreadPercent;   // Q4.4
uint8_t           670 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      FllGfxclkSpreadEnabled;   // on or off
uint8_t           671 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      FllGfxclkSpreadPercent;   // Q4.4
uint8_t           680 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      DramBitWidth; // For DRAM use only.  See Dram Bit width type defines
uint8_t           681 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      PaddingMem[3];
uint8_t           688 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           XgmiLinkSpeed   [NUM_XGMI_PSTATE_LEVELS];
uint8_t           689 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t           XgmiLinkWidth   [NUM_XGMI_PSTATE_LEVELS];
uint8_t           695 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      GpioI2cScl;          // Serial Clock
uint8_t           696 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t      GpioI2cSda;          // Serial Data
uint8_t           727 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  CurrSocVoltageOffset  ;
uint8_t           728 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  CurrGfxVoltageOffset  ;
uint8_t           729 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  CurrMemVidOffset      ;
uint8_t           730 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  Padding8              ;
uint8_t           760 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  AvfsVersion;
uint8_t           761 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  Padding;
uint8_t           762 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  AvfsEn[AVFS_VOLTAGE_COUNT];
uint8_t           764 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  OverrideVFT[AVFS_VOLTAGE_COUNT];
uint8_t           765 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  OverrideAvfsGb[AVFS_VOLTAGE_COUNT];
uint8_t           767 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  OverrideTemperatures[AVFS_VOLTAGE_COUNT];
uint8_t           768 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  OverrideVInversion[AVFS_VOLTAGE_COUNT];
uint8_t           769 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  OverrideP2V[AVFS_VOLTAGE_COUNT];
uint8_t           770 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_arcturus.h   uint8_t  OverrideP2VCharzFreq[AVFS_VOLTAGE_COUNT];
uint8_t           267 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Enabled;
uint8_t           268 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Speed;
uint8_t           269 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Padding[2];
uint8_t           271 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   ControllerPort;
uint8_t           272 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   ControllerName;
uint8_t           273 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   ThermalThrotter;
uint8_t           274 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   I2cProtocol;
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t RegisterAddr; ////only valid for write, ignored for read
uint8_t           306 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t Cmd;  //Read(0) or Write(1) 
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t Data;  //Return data for read. Data to send for write
uint8_t           308 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t CmdConfig; //Includes whether associated command should have a stop or restart command
uint8_t           312 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t     I2CcontrollerPort; //CKSVII2C0(0) or //CKSVII2C1(1)
uint8_t           313 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t     I2CSpeed;          //Slow(0) or Fast(1)
uint8_t           315 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t     NumCmds;           //Number of commands
uint8_t           316 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t     Padding[3];
uint8_t           435 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t        VoltageMode;         // 0 - AVFS only, 1- min(AVFS,SS), 2-SS only
uint8_t           436 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t        SnapToDiscrete;      // 0 - Fine grained DPM, 1 - Discrete DPM
uint8_t           437 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t        NumDiscreteLevels;   // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwise set to # discrete levels used
uint8_t           438 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t        Padding;         
uint8_t           482 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  MinorInfoVersion;
uint8_t           483 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  MajorInfoVersion;
uint8_t           484 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  TableSize;
uint8_t           485 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  Reserved;
uint8_t           487 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  Reserved1;
uint8_t           488 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  RevID;
uint8_t           512 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t MemoryHotspotPosition;
uint8_t           513 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t Reserved4;
uint8_t           560 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   GceaLinkMgrIdleThreshold;        //Set by SMU FW during enablment of SOC_ULV. Controls delay for GFX SDP port disconnection during idle events
uint8_t           561 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   paddingRlcUlvParams[3];
uint8_t           563 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  UlvSmnclkDid;     //DID for ULV mode. 0 means CLK will not be modified in ULV.
uint8_t           564 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  UlvMp1clkDid;     //DID for ULV mode. 0 means CLK will not be modified in ULV.
uint8_t           565 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  UlvGfxclkBypass;  // 1 to turn off/bypass Gfxclk during ULV, 0 to leave Gfxclk on during ULV
uint8_t           566 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  Padding234;
uint8_t           598 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t        FreqTableUclkDiv  [NUM_UCLK_DPM_LEVELS    ];     // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
uint8_t           611 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t         Padding567[2]; 
uint8_t           613 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t         GfxclkSource;         // 0 = PLL, 1 = DFLL
uint8_t           614 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t         Padding456;
uint8_t           617 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      LowestUclkReservedForUlv; // Set this to 1 if UCLK DPM0 is reserved for ULV-mode only
uint8_t           618 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      paddingUclk[3];
uint8_t           620 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      MemoryType;          // 0-GDDR6, 1-HBM
uint8_t           621 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      MemoryChannels;
uint8_t           622 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      PaddingMem[2];
uint8_t           625 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      PcieGenSpeed[NUM_LINK_LEVELS];           ///< 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3 3:PciE-gen4
uint8_t           626 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      PcieLaneCount[NUM_LINK_LEVELS];          ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16
uint8_t           655 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      FanTempInputSelect;
uint8_t           656 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      FanPadding;
uint8_t           657 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      FanZeroRpmEnable; 
uint8_t           658 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      FanTachEdgePerRev;
uint8_t           670 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t           OverrideAvfsGb[AVFS_VOLTAGE_COUNT];
uint8_t           671 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t           Padding8_Avfs[2];
uint8_t           683 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t           DcBtcEnabled[AVFS_VOLTAGE_COUNT];
uint8_t           684 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t           Padding8_GfxBtc[2];
uint8_t           697 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      TotalPowerConfig;    //0-TDP, 1-TGP, 2-TCP Estimated, 3-TCP Measured
uint8_t           698 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      TotalPowerSpare1;  
uint8_t           734 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VddGfxVrMapping;   // Use VR_MAPPING* bitfields
uint8_t           735 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VddSocVrMapping;   // Use VR_MAPPING* bitfields
uint8_t           736 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VddMem0VrMapping;  // Use VR_MAPPING* bitfields
uint8_t           737 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VddMem1VrMapping;  // Use VR_MAPPING* bitfields
uint8_t           739 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      GfxUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
uint8_t           740 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      SocUlvPhaseSheddingMask; // set this to 1 to set PSI0/1 to 1 in ULV mode
uint8_t           741 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      ExternalSensorPresent; // External RDI connected to TMON (aka TEMP IN)
uint8_t           742 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      Padding8_V; 
uint8_t           747 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      Padding_TelemetryGfx;
uint8_t           751 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      Padding_TelemetrySoc;
uint8_t           755 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      Padding_TelemetryMem0;
uint8_t           759 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      Padding_TelemetryMem1;
uint8_t           762 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      AcDcGpio;        // GPIO pin configured for AC/DC switching
uint8_t           763 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      AcDcPolarity;    // GPIO polarity for AC/DC switching
uint8_t           764 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VR0HotGpio;      // GPIO pin configured for VR0 HOT event
uint8_t           765 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VR0HotPolarity;  // GPIO polarity for VR0 HOT event
uint8_t           767 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VR1HotGpio;      // GPIO pin configured for VR1 HOT event 
uint8_t           768 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      VR1HotPolarity;  // GPIO polarity for VR1 HOT event 
uint8_t           769 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      GthrGpio;        // GPIO pin configured for GTHR Event
uint8_t           770 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      GthrPolarity;    // replace GPIO polarity for GTHR
uint8_t           773 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      LedPin0;         // GPIO number for LedPin[0]
uint8_t           774 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      LedPin1;         // GPIO number for LedPin[1]
uint8_t           775 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      LedPin2;         // GPIO number for LedPin[2]
uint8_t           776 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      padding8_4;
uint8_t           779 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      PllGfxclkSpreadEnabled;   // on or off
uint8_t           780 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      PllGfxclkSpreadPercent;   // Q4.4
uint8_t           784 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      DfllGfxclkSpreadEnabled;   // on or off
uint8_t           785 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      DfllGfxclkSpreadPercent;   // Q4.4
uint8_t           789 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      UclkSpreadEnabled;   // on or off
uint8_t           790 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      UclkSpreadPercent;   // Q4.4
uint8_t           794 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      SoclkSpreadEnabled;   // on or off
uint8_t           795 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      SocclkSpreadPercent;   // Q4.4
uint8_t           805 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      RenesesLoadLineEnabled;
uint8_t           806 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      GfxLoadlineResistance;
uint8_t           807 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      SocLoadlineResistance;
uint8_t           808 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t      Padding8_Loadline;
uint8_t           860 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  CurrSocVoltageOffset  ;
uint8_t           861 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  CurrGfxVoltageOffset  ;
uint8_t           862 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  CurrMemVidOffset      ;
uint8_t           863 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  Padding8              ;
uint8_t           878 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  LinkDpmLevel;
uint8_t           879 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  Padding8_2;
uint8_t           892 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  WmSetting;
uint8_t           893 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  Padding[3];
uint8_t           932 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  AvfsVersion;
uint8_t           933 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  Padding;
uint8_t           935 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  AvfsEn[AVFS_VOLTAGE_COUNT];
uint8_t           937 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  OverrideVFT[AVFS_VOLTAGE_COUNT];
uint8_t           938 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  OverrideAvfsGb[AVFS_VOLTAGE_COUNT];
uint8_t           940 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  OverrideTemperatures[AVFS_VOLTAGE_COUNT];
uint8_t           941 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  OverrideVInversion[AVFS_VOLTAGE_COUNT];
uint8_t           942 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  OverrideP2V[AVFS_VOLTAGE_COUNT];
uint8_t           943 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t  OverrideP2VCharzFreq[AVFS_VOLTAGE_COUNT];
uint8_t           985 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Gfx_ActiveHystLimit;
uint8_t           986 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Gfx_IdleHystLimit;
uint8_t           987 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Gfx_FPS;
uint8_t           988 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Gfx_MinActiveFreqType;
uint8_t           989 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Gfx_BoosterFreqType; 
uint8_t           990 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Gfx_MinFreqStep;                // Minimum delta between current and target frequeny in order for FW to change clock.
uint8_t          1000 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Soc_ActiveHystLimit;
uint8_t          1001 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Soc_IdleHystLimit;
uint8_t          1002 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Soc_FPS;
uint8_t          1003 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Soc_MinActiveFreqType;
uint8_t          1004 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Soc_BoosterFreqType; 
uint8_t          1005 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Soc_MinFreqStep;                // Minimum delta between current and target frequeny in order for FW to change clock.
uint8_t          1015 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_ActiveHystLimit;
uint8_t          1016 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_IdleHystLimit;
uint8_t          1017 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_FPS;
uint8_t          1018 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_MinActiveFreqType;
uint8_t          1019 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_BoosterFreqType;
uint8_t          1020 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_MinFreqStep;                // Minimum delta between current and target frequeny in order for FW to change clock.
uint8_t          1031 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_UpHystLimit;
uint8_t          1032 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h   uint8_t   Mem_DownHystLimit;
uint8_t            56 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t  WmSetting;
uint8_t            57 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t  WmType;  // Used for normal pstate change or memory retraining
uint8_t            58 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t  Padding[2];
uint8_t            89 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t             ActiveHystLimit;
uint8_t            90 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t             IdleHystLimit;
uint8_t            91 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t             FPS;
uint8_t            92 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t             MinActiveFreqType;
uint8_t           124 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t NumDcfClkDpmEnabled;
uint8_t           125 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t NumSocClkDpmEnabled;
uint8_t           126 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t NumFClkDpmEnabled;
uint8_t           127 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t NumMemClkDpmEnabled;
uint8_t           128 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t NumVClkDpmEnabled;
uint8_t           129 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t NumDClkDpmEnabled;
uint8_t           130 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h   uint8_t spare[2];
uint8_t           150 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  TdpClampMode;
uint8_t           151 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  TdcClampMode;
uint8_t           152 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  ThermClampMode;
uint8_t           153 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  VoltageBusy;
uint8_t           157 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  LevelChangeInProgress;
uint8_t           158 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  UpHyst;
uint8_t           160 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  DownHyst;
uint8_t           161 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  VoltageDownHyst;
uint8_t           162 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  DpmEnable;
uint8_t           163 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  DpmRunning;
uint8_t           165 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  DpmForce;
uint8_t           166 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  DpmForceLevel;
uint8_t           167 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  DisplayWatermark;
uint8_t           168 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  McArbIndex;
uint8_t           172 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  AcpiReq;
uint8_t           173 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  AcpiAck;
uint8_t           174 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  GfxClkSlow;
uint8_t           175 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  GpioClampMode;
uint8_t           177 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  FpsFilterWeight;
uint8_t           178 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  EnabledLevelsChange;
uint8_t           179 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  DteClampMode;
uint8_t           180 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  FpsClampMode;
uint8_t           185 drivers/gpu/drm/amd/powerplay/inc/smu71.h     void     (*TargetStateCalculator)(uint8_t);
uint8_t           186 drivers/gpu/drm/amd/powerplay/inc/smu71.h     void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           191 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  FpsEnabled;
uint8_t           192 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  MaxPerfLevel;
uint8_t           193 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  AllowLowClkInterruptToHost;
uint8_t           194 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  FpsRunning;
uint8_t           208 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  HighestVidOffset;
uint8_t           209 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  CurrentVidOffset;
uint8_t           211 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  CurrentPhases;
uint8_t           212 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  HighestPhases;
uint8_t           214 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  AvsOffset;
uint8_t           215 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  AvsOffsetApplied;
uint8_t           217 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  ControllerBusy;
uint8_t           218 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  CurrentVid;
uint8_t           221 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  RequestedPhases[SMU7_MAX_VOLTAGE_CLIENTS];
uint8_t           223 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  EnabledRequest[SMU7_MAX_VOLTAGE_CLIENTS];
uint8_t           224 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  TargetIndex;
uint8_t           225 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  Delay;
uint8_t           226 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  ControllerEnable;
uint8_t           227 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  ControllerRunning;
uint8_t           234 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  CurrentVddciVid;
uint8_t           235 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t  TargetVddciIndex;
uint8_t           246 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     DpmEnable;
uint8_t           247 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     DpmRunning;
uint8_t           248 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     DpmForce;
uint8_t           249 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     DpmForceLevel;
uint8_t           251 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     CurrentLinkSpeed;
uint8_t           252 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     EnabledLevelsChange;
uint8_t           258 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     DpmMode;
uint8_t           259 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     AcpiReq;
uint8_t           260 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     AcpiAck;
uint8_t           261 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t     CurrentLinkLevel;
uint8_t           318 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t   CalculationRepeats;
uint8_t           319 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t   WaterfallUp;
uint8_t           320 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t   WaterfallDown;
uint8_t           321 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t   WaterfallLimit;
uint8_t           334 drivers/gpu/drm/amd/powerplay/inc/smu71.h    uint8_t  ControllerEnable;
uint8_t           335 drivers/gpu/drm/amd/powerplay/inc/smu71.h    uint8_t  ControllerRunning;
uint8_t           336 drivers/gpu/drm/amd/powerplay/inc/smu71.h    uint8_t  WaterfallUp;
uint8_t           337 drivers/gpu/drm/amd/powerplay/inc/smu71.h    uint8_t  WaterfallDown;
uint8_t           338 drivers/gpu/drm/amd/powerplay/inc/smu71.h    uint8_t  WaterfallLimit;
uint8_t           339 drivers/gpu/drm/amd/powerplay/inc/smu71.h    uint8_t  padding[3];
uint8_t           381 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy1Config;
uint8_t           382 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy2Config;
uint8_t           383 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy3Config;
uint8_t           384 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy4Config;
uint8_t           386 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy5Config;
uint8_t           387 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy6Config;
uint8_t           388 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy7Config;
uint8_t           389 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DisplayPhy8Config;
uint8_t           395 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         SClkDpmEnabledLevels;
uint8_t           396 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         MClkDpmEnabledLevels;
uint8_t           397 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         LClkDpmEnabledLevels;
uint8_t           398 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         PCIeDpmEnabledLevels;
uint8_t           408 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         DPMFreezeAndForced;
uint8_t           409 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         Activity_Weight;
uint8_t           410 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t         Reserved8[2];
uint8_t           452 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t waterfall_up;
uint8_t           453 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t waterfall_down;
uint8_t           454 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t pstate;
uint8_t           455 drivers/gpu/drm/amd/powerplay/inc/smu71.h     uint8_t clamp_mode;
uint8_t           489 drivers/gpu/drm/amd/powerplay/inc/smu71.h   uint8_t BlockId;
uint8_t           490 drivers/gpu/drm/amd/powerplay/inc/smu71.h   uint8_t SignalId;
uint8_t           491 drivers/gpu/drm/amd/powerplay/inc/smu71.h   uint8_t Threshold;
uint8_t           492 drivers/gpu/drm/amd/powerplay/inc/smu71.h   uint8_t Padding;
uint8_t            41 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     Smio;
uint8_t            42 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     padding;
uint8_t            54 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     pcieDpmLevel;
uint8_t            55 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     DeepSleepDivId;
uint8_t            64 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     SclkDid;
uint8_t            65 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     DisplayWatermark;
uint8_t            66 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EnabledForActivity;
uint8_t            67 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EnabledForThrottle;
uint8_t            68 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     UpHyst;
uint8_t            69 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     DownHyst;
uint8_t            70 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     VoltageDownHyst;
uint8_t            71 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     PowerThrottle;
uint8_t            82 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     SclkDid;
uint8_t            83 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     DisplayWatermark;
uint8_t            84 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     DeepSleepDivId;
uint8_t            85 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     padding;
uint8_t           103 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     VddcOffsetVid;
uint8_t           104 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     VddcPhase;
uint8_t           119 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EdcReadEnable;
uint8_t           120 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EdcWriteEnable;
uint8_t           121 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     RttEnable;
uint8_t           122 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     StutterEnable;
uint8_t           124 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     StrobeEnable;
uint8_t           125 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     StrobeRatio;
uint8_t           126 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EnabledForThrottle;
uint8_t           127 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EnabledForActivity;
uint8_t           129 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     UpHyst;
uint8_t           130 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     DownHyst;
uint8_t           131 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     VoltageDownHyst;
uint8_t           132 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     padding;
uint8_t           135 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     DisplayWatermark;
uint8_t           136 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     padding1;
uint8_t           153 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     PcieGenSpeed;           ///< 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3
uint8_t           154 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     PcieLaneCount;          ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16
uint8_t           155 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EnabledForActivity;
uint8_t           156 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     SPC;
uint8_t           171 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  McArbBurstTime;
uint8_t           172 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  padding[3];
uint8_t           191 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  MinVddcPhases;
uint8_t           192 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  VclkDivider;
uint8_t           193 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DclkDivider;
uint8_t           194 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  padding[3];
uint8_t           204 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  MinPhases;
uint8_t           205 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  Divider;
uint8_t           225 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DisplayWatermark;
uint8_t           226 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  McArbIndex;
uint8_t           227 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  McRegIndex;
uint8_t           228 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  SeqIndex;
uint8_t           229 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  SclkDid;
uint8_t           232 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  PCIeGen;
uint8_t           262 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             GraphicsDpmLevelCount;
uint8_t           263 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             MemoryDpmLevelCount;
uint8_t           264 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             LinkLevelCount;
uint8_t           265 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             MasterDeepSleepControl;
uint8_t           279 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             GraphicsBootLevel;
uint8_t           280 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             GraphicsVoltageChangeEnable;
uint8_t           281 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             GraphicsThermThrottleEnable;
uint8_t           282 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             GraphicsInterval;
uint8_t           284 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             VoltageInterval;
uint8_t           285 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             ThermalInterval;
uint8_t           289 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             MemoryBootLevel;
uint8_t           290 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             MemoryVoltageChangeEnable;
uint8_t           292 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             MemoryInterval;
uint8_t           293 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             MemoryThermThrottleEnable;
uint8_t           294 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             MergedVddci;
uint8_t           295 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             padding2;
uint8_t           300 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             PCIeBootLinkLevel;
uint8_t           301 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             PCIeGenInterval;
uint8_t           302 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             DTEInterval;
uint8_t           303 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             DTEMode;
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             SVI2Enable;
uint8_t           306 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             VRHotGpio;
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             AcDcGpio;
uint8_t           308 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             ThermGpio;
uint8_t           321 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             DTEAmbientTempBase;
uint8_t           322 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             DTETjOffset;
uint8_t           323 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             GpuTjMax;
uint8_t           324 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             GpuTjHyst;
uint8_t           367 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             last;
uint8_t           368 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             reserved[3];
uint8_t           395 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  TempSrc;
uint8_t           419 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  TdpClampMode;
uint8_t           420 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  TdcClampMode;
uint8_t           421 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  ThermClampMode;
uint8_t           422 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  VoltageBusy;
uint8_t           426 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  LevelChangeInProgress;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  UpHyst;
uint8_t           429 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DownHyst;
uint8_t           430 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  VoltageDownHyst;
uint8_t           431 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DpmEnable;
uint8_t           432 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DpmRunning;
uint8_t           434 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DpmForce;
uint8_t           435 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DpmForceLevel;
uint8_t           436 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  DisplayWatermark;
uint8_t           437 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  McArbIndex;
uint8_t           441 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  AcpiReq;
uint8_t           442 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  AcpiAck;
uint8_t           443 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  MclkSwitchInProgress;
uint8_t           444 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  MclkSwitchCritical;
uint8_t           446 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  TargetMclkIndex;
uint8_t           447 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  TargetMvddIndex;
uint8_t           448 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  MclkSwitchResult;
uint8_t           450 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t  EnabledLevelsChange;
uint8_t           455 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     void     (*TargetStateCalculator)(uint8_t);
uint8_t           456 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           462 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t padding[2];
uint8_t           469 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EnterUlv;
uint8_t           470 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     ExitUlv;
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     UlvActive;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     WaitingForUlv;
uint8_t           473 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     UlvEnable;
uint8_t           474 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     UlvRunning;
uint8_t           475 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     UlvMasterEnable;
uint8_t           476 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     padding;
uint8_t           485 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     VddGfxEnable;
uint8_t           486 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     VddGfxActive;
uint8_t           487 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     padding[2];
uint8_t           497 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t LastACPIRequest;
uint8_t           498 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t CgBifResp;
uint8_t           499 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t RequestType;
uint8_t           500 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t Padding;
uint8_t           509 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t BapmVddCVidHiSidd[8];
uint8_t           512 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t BapmVddCVidLoSidd[8];
uint8_t           515 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t VddCVid[8];
uint8_t           518 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t SviLoadLineEn;
uint8_t           519 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t SviLoadLineVddC;
uint8_t           520 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t SviLoadLineTrimVddC;
uint8_t           521 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t SviLoadLineOffsetVddC;
uint8_t           525 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t           526 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t TDC_MAWt;
uint8_t           529 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t TdcWaterfallCtl;
uint8_t           530 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t LPMLTemperatureMin;
uint8_t           531 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t LPMLTemperatureMax;
uint8_t           532 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t Reserved;
uint8_t           535 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t LPMLTemperatureScaler[16];
uint8_t           544 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t GnbLPML[16];
uint8_t           547 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t GnbLPMLMaxVid;
uint8_t           548 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t GnbLPMLMinVid;
uint8_t           549 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t Reserved1[2];
uint8_t           565 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t     type;
uint8_t           566 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t     mode;
uint8_t           567 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h   uint8_t     filler_0[2];
uint8_t           574 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t             Enabled;
uint8_t           575 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t             Type;
uint8_t           576 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t             padding[2];
uint8_t            54 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t a_shift;
uint8_t            55 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t b_shift;
uint8_t            56 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t c_shift;
uint8_t            57 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t x_shift;
uint8_t            82 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t index;
uint8_t           197 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t waterfall_up;
uint8_t           198 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t waterfall_down;
uint8_t           199 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t waterfall_limit;
uint8_t           200 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t spare;
uint8_t           234 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  TdpClampMode;
uint8_t           235 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  TdcClampMode;
uint8_t           236 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  ThermClampMode;
uint8_t           237 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  VoltageBusy;
uint8_t           241 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  LevelChangeInProgress;
uint8_t           242 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  UpHyst;
uint8_t           244 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  DownHyst;
uint8_t           245 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  VoltageDownHyst;
uint8_t           246 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  DpmEnable;
uint8_t           247 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  DpmRunning;
uint8_t           249 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  DpmForce;
uint8_t           250 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  DpmForceLevel;
uint8_t           251 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  DisplayWatermark;
uint8_t           252 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  McArbIndex;
uint8_t           256 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  AcpiReq;
uint8_t           257 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  AcpiAck;
uint8_t           258 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  GfxClkSlow;
uint8_t           259 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  GpioClampMode; /* bit0 = VRHOT: bit1 = THERM: bit2 = DC */
uint8_t           261 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  FpsFilterWeight;
uint8_t           262 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  EnabledLevelsChange;
uint8_t           263 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  DteClampMode;
uint8_t           264 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  FpsClampMode;
uint8_t           269 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	void     (*TargetStateCalculator)(uint8_t);
uint8_t           270 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           275 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  FpsEnabled;
uint8_t           276 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  MaxPerfLevel;
uint8_t           277 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  AllowLowClkInterruptToHost;
uint8_t           278 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  FpsRunning;
uint8_t           291 drivers/gpu/drm/amd/powerplay/inc/smu72.h typedef uint8_t (*VoltageChangeHandler_t)(uint16_t, uint8_t);
uint8_t           294 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t Vddc;
uint8_t           295 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t Vddci;
uint8_t           296 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t VddGfx;
uint8_t           297 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t Phases;
uint8_t           306 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  HighestVidOffset;
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  CurrentVidOffset;
uint8_t           309 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  ControllerBusy;
uint8_t           310 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  CurrentVid;
uint8_t           311 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  CurrentVddciVid;
uint8_t           312 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  VddGfxShutdown; /* 0 = normal mode, 1 = shut down */
uint8_t           315 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  EnabledRequest[SMU7_MAX_VOLTAGE_CLIENTS];
uint8_t           317 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  TargetIndex;
uint8_t           318 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  Delay;
uint8_t           319 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  ControllerEnable;
uint8_t           320 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  ControllerRunning;
uint8_t           323 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  OverrideVoltage;
uint8_t           324 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  VddcUseUlvOffset;
uint8_t           325 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  VddGfxUseUlvOffset;
uint8_t           326 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  padding;
uint8_t           336 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t *VddcFollower1;
uint8_t           337 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t *VddcFollower2;
uint8_t           348 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     DpmEnable;
uint8_t           349 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     DpmRunning;
uint8_t           350 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     DpmForce;
uint8_t           351 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     DpmForceLevel;
uint8_t           353 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     CurrentLinkSpeed;
uint8_t           354 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     EnabledLevelsChange;
uint8_t           360 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     DpmMode;
uint8_t           361 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     AcpiReq;
uint8_t           362 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     AcpiAck;
uint8_t           363 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t     CurrentLinkLevel;
uint8_t           388 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t    SidOptionPower;
uint8_t           389 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t    SidOptionCurrent;
uint8_t           421 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  ControllerEnable;
uint8_t           422 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  ControllerRunning;
uint8_t           423 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  AutoTmonCalInterval;
uint8_t           424 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  AutoTmonCalEnable;
uint8_t           426 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  ThermalDpmEnabled;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  SclkEnabledMask;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t  spare[2];
uint8_t           476 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy1Config;
uint8_t           477 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy2Config;
uint8_t           478 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy3Config;
uint8_t           479 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy4Config;
uint8_t           481 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy5Config;
uint8_t           482 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy6Config;
uint8_t           483 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy7Config;
uint8_t           484 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         DisplayPhy8Config;
uint8_t           490 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         SClkDpmEnabledLevels;
uint8_t           491 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         MClkDpmEnabledLevels;
uint8_t           492 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         LClkDpmEnabledLevels;
uint8_t           493 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         PCIeDpmEnabledLevels;
uint8_t           495 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         UVDDpmEnabledLevels;
uint8_t           496 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         SAMUDpmEnabledLevels;
uint8_t           497 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         ACPDpmEnabledLevels;
uint8_t           498 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t         VCEDpmEnabledLevels;
uint8_t           564 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t BlockId;
uint8_t           565 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t SignalId;
uint8_t           566 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t Threshold;
uint8_t           567 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t Padding;
uint8_t           659 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t minVID;
uint8_t           660 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t maxVID;
uint8_t           675 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t setting;
uint8_t           676 drivers/gpu/drm/amd/powerplay/inc/smu72.h 	uint8_t padding[3];
uint8_t            35 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Smio;
uint8_t            36 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  padding;
uint8_t            52 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     pcieDpmLevel;
uint8_t            53 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     DeepSleepDivId;
uint8_t            62 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     SclkDid;
uint8_t            63 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     DisplayWatermark;
uint8_t            64 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EnabledForActivity;
uint8_t            65 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EnabledForThrottle;
uint8_t            66 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     UpHyst;
uint8_t            67 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     DownHyst;
uint8_t            68 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VoltageDownHyst;
uint8_t            69 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     PowerThrottle;
uint8_t            78 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     SclkDid;
uint8_t            79 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     DisplayWatermark;
uint8_t            80 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     DeepSleepDivId;
uint8_t            81 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     padding;
uint8_t            98 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VddcOffsetVid;
uint8_t            99 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VddcPhase;
uint8_t           111 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EdcReadEnable;
uint8_t           112 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EdcWriteEnable;
uint8_t           113 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     RttEnable;
uint8_t           114 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     StutterEnable;
uint8_t           116 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     StrobeEnable;
uint8_t           117 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     StrobeRatio;
uint8_t           118 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EnabledForThrottle;
uint8_t           119 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EnabledForActivity;
uint8_t           121 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     UpHyst;
uint8_t           122 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     DownHyst;
uint8_t           123 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VoltageDownHyst;
uint8_t           124 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     padding;
uint8_t           127 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     DisplayWatermark;
uint8_t           128 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     padding1;
uint8_t           144 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     PcieGenSpeed;           /*< 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3 */
uint8_t           145 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     PcieLaneCount;          /*< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 */
uint8_t           146 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EnabledForActivity;
uint8_t           147 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     SPC;
uint8_t           159 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  McArbBurstTime;
uint8_t           160 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  padding[3];
uint8_t           176 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  VclkDivider;
uint8_t           177 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DclkDivider;
uint8_t           178 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  padding[2];
uint8_t           187 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Divider;
uint8_t           188 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  padding[3];
uint8_t           203 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DisplayWatermark;
uint8_t           204 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  McArbIndex;
uint8_t           205 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  McRegIndex;
uint8_t           206 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  SeqIndex;
uint8_t           207 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  SclkDid;
uint8_t           210 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  PCIeGen;
uint8_t           240 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             BapmVddGfxVidHiSidd[SMU72_MAX_LEVELS_VDDGFX];
uint8_t           241 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             BapmVddGfxVidLoSidd[SMU72_MAX_LEVELS_VDDGFX];
uint8_t           242 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             BapmVddGfxVidHiSidd2[SMU72_MAX_LEVELS_VDDGFX];
uint8_t           244 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             BapmVddcVidHiSidd[SMU72_MAX_LEVELS_VDDC];
uint8_t           245 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             BapmVddcVidLoSidd[SMU72_MAX_LEVELS_VDDC];
uint8_t           246 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             BapmVddcVidHiSidd2[SMU72_MAX_LEVELS_VDDC];
uint8_t           248 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             GraphicsDpmLevelCount;
uint8_t           249 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             MemoryDpmLevelCount;
uint8_t           250 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             LinkLevelCount;
uint8_t           251 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             MasterDeepSleepControl;
uint8_t           253 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             UvdLevelCount;
uint8_t           254 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             VceLevelCount;
uint8_t           255 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             AcpLevelCount;
uint8_t           256 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             SamuLevelCount;
uint8_t           258 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             ThermOutGpio;
uint8_t           259 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             ThermOutPolarity;
uint8_t           260 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             ThermOutMode;
uint8_t           261 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             DPMFreezeAndForced;
uint8_t           279 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             UvdBootLevel;
uint8_t           280 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             VceBootLevel;
uint8_t           281 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             AcpBootLevel;
uint8_t           282 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             SamuBootLevel;
uint8_t           284 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             GraphicsBootLevel;
uint8_t           285 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             GraphicsVoltageChangeEnable;
uint8_t           286 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             GraphicsThermThrottleEnable;
uint8_t           287 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             GraphicsInterval;
uint8_t           289 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             VoltageInterval;
uint8_t           290 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             ThermalInterval;
uint8_t           294 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             MemoryBootLevel;
uint8_t           295 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             MemoryVoltageChangeEnable;
uint8_t           298 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             MemoryInterval;
uint8_t           299 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             MemoryThermThrottleEnable;
uint8_t           304 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             PCIeBootLinkLevel;
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             PCIeGenInterval;
uint8_t           306 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             DTEInterval;
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             DTEMode;
uint8_t           309 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             SVI2Enable;
uint8_t           310 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             VRHotGpio;
uint8_t           311 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             AcDcGpio;
uint8_t           312 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             ThermGpio;
uint8_t           326 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             DTEAmbientTempBase;
uint8_t           327 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             DTETjOffset;
uint8_t           328 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             GpuTjMax;
uint8_t           329 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             GpuTjHyst;
uint8_t           338 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             ClockStretcherAmount;
uint8_t           340 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             Sclk_CKS_masterEn0_7;
uint8_t           341 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             Sclk_CKS_masterEn8_15;
uint8_t           342 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             padding[1];
uint8_t           344 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             Sclk_voltageOffset[8];
uint8_t           370 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             last;
uint8_t           371 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             reserved[3];
uint8_t           398 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  TempSrc;
uint8_t           421 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  TdpClampMode;
uint8_t           422 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  TdcClampMode;
uint8_t           423 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  ThermClampMode;
uint8_t           424 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  VoltageBusy;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  LevelChangeInProgress;
uint8_t           429 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  UpHyst;
uint8_t           431 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DownHyst;
uint8_t           432 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  VoltageDownHyst;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DpmEnable;
uint8_t           434 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DpmRunning;
uint8_t           436 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DpmForce;
uint8_t           437 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DpmForceLevel;
uint8_t           438 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  DisplayWatermark;
uint8_t           439 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  McArbIndex;
uint8_t           443 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  AcpiReq;
uint8_t           444 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  AcpiAck;
uint8_t           445 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  MclkSwitchInProgress;
uint8_t           446 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  MclkSwitchCritical;
uint8_t           448 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  IgnoreVBlank;
uint8_t           449 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  TargetMclkIndex;
uint8_t           450 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  TargetMvddIndex;
uint8_t           451 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  MclkSwitchResult;
uint8_t           454 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  VbiWaitCounter;
uint8_t           455 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  EnabledLevelsChange;
uint8_t           460 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	void     (*TargetStateCalculator)(uint8_t);
uint8_t           461 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           469 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  fastSwitch;
uint8_t           470 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Save_PIC_VDDGFX_EXIT;
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Save_PIC_VDDGFX_ENTER;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  padding;
uint8_t           479 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EnterUlv;
uint8_t           480 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     ExitUlv;
uint8_t           481 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     UlvActive;
uint8_t           482 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     WaitingForUlv;
uint8_t           483 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     UlvEnable;
uint8_t           484 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     UlvRunning;
uint8_t           485 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     UlvMasterEnable;
uint8_t           486 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     padding;
uint8_t           505 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VddGfxEnable;
uint8_t           506 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VddGfxActive;
uint8_t           507 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VPUResetOccured;
uint8_t           508 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     padding;
uint8_t           521 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Enable;
uint8_t           522 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Running;
uint8_t           533 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Enable;
uint8_t           534 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t  Running;
uint8_t           559 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t VariantID;
uint8_t           560 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t spare997;
uint8_t           574 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t LastACPIRequest;
uint8_t           575 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t CgBifResp;
uint8_t           576 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t RequestType;
uint8_t           577 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t Padding;
uint8_t           585 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t SviLoadLineEn;
uint8_t           586 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t SviLoadLineVddC;
uint8_t           587 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t SviLoadLineTrimVddC;
uint8_t           588 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t SviLoadLineOffsetVddC;
uint8_t           592 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t           593 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t TDC_MAWt;
uint8_t           596 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t TdcWaterfallCtl;
uint8_t           597 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t LPMLTemperatureMin;
uint8_t           598 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t LPMLTemperatureMax;
uint8_t           599 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t Reserved;
uint8_t           602 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t LPMLTemperatureScaler[16];
uint8_t           611 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t GnbLPML[16];
uint8_t           614 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t GnbLPMLMaxVid;
uint8_t           615 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t GnbLPMLMinVid;
uint8_t           616 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t Reserved1[2];
uint8_t           632 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     type;
uint8_t           633 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     mode;
uint8_t           634 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     filler_0[2];
uint8_t           641 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t             Enabled;
uint8_t           642 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t             Type;
uint8_t           643 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t             padding[2];
uint8_t            46 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t a_shift;
uint8_t            47 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t b_shift;
uint8_t            48 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t c_shift;
uint8_t            49 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t x_shift;
uint8_t            76 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t index;
uint8_t           232 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  TdpClampMode;
uint8_t           233 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  TdcClampMode;
uint8_t           234 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  ThermClampMode;
uint8_t           235 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  VoltageBusy;
uint8_t           239 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  LevelChangeInProgress;
uint8_t           240 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  UpHyst;
uint8_t           242 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  DownHyst;
uint8_t           243 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  VoltageDownHyst;
uint8_t           244 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  DpmEnable;
uint8_t           245 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  DpmRunning;
uint8_t           247 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  DpmForce;
uint8_t           248 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  DpmForceLevel;
uint8_t           249 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  DisplayWatermark;
uint8_t           250 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  McArbIndex;
uint8_t           254 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  AcpiReq;
uint8_t           255 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  AcpiAck;
uint8_t           256 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  GfxClkSlow;
uint8_t           257 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  GpioClampMode;
uint8_t           259 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  spare2;
uint8_t           260 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  EnabledLevelsChange;
uint8_t           261 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  DteClampMode;
uint8_t           262 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  FpsClampMode;
uint8_t           267 drivers/gpu/drm/amd/powerplay/inc/smu73.h     void     (*TargetStateCalculator)(uint8_t);
uint8_t           268 drivers/gpu/drm/amd/powerplay/inc/smu73.h     void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           273 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  FpsEnabled;
uint8_t           274 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  MaxPerfLevel;
uint8_t           275 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  AllowLowClkInterruptToHost;
uint8_t           276 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  FpsRunning;
uint8_t           284 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  LedEnable;
uint8_t           285 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  LedPin0;
uint8_t           286 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  LedPin1;
uint8_t           287 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  LedPin2;
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu73.h typedef uint8_t (*VoltageChangeHandler_t)(uint16_t, uint8_t);
uint8_t           322 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  HighestVidOffset;
uint8_t           323 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  CurrentVidOffset;
uint8_t           329 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  ControllerBusy;
uint8_t           330 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  CurrentVid;
uint8_t           331 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  CurrentVddciVid;
uint8_t           332 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  padding;
uint8_t           336 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  EnabledRequest[SMU7_MAX_VOLTAGE_CLIENTS];
uint8_t           338 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  padding2;
uint8_t           339 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  padding3;
uint8_t           340 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  ControllerEnable;
uint8_t           341 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  ControllerRunning;
uint8_t           344 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  OverrideVoltage;
uint8_t           345 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  padding4;
uint8_t           346 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  padding5;
uint8_t           347 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t  CurrentPhases;
uint8_t           371 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     DpmEnable;
uint8_t           372 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     DpmRunning;
uint8_t           373 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     DpmForce;
uint8_t           374 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     DpmForceLevel;
uint8_t           376 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     CurrentLinkSpeed;
uint8_t           377 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     EnabledLevelsChange;
uint8_t           383 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     DpmMode;
uint8_t           384 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     AcpiReq;
uint8_t           385 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     AcpiAck;
uint8_t           386 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t     CurrentLinkLevel;
uint8_t           458 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy1Config;
uint8_t           459 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy2Config;
uint8_t           460 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy3Config;
uint8_t           461 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy4Config;
uint8_t           463 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy5Config;
uint8_t           464 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy6Config;
uint8_t           465 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy7Config;
uint8_t           466 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         DisplayPhy8Config;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         SClkDpmEnabledLevels;
uint8_t           473 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         MClkDpmEnabledLevels;
uint8_t           474 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         LClkDpmEnabledLevels;
uint8_t           475 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         PCIeDpmEnabledLevels;
uint8_t           477 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         UVDDpmEnabledLevels;
uint8_t           478 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         SAMUDpmEnabledLevels;
uint8_t           479 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         ACPDpmEnabledLevels;
uint8_t           480 drivers/gpu/drm/amd/powerplay/inc/smu73.h     uint8_t         VCEDpmEnabledLevels;
uint8_t           556 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t BlockId;
uint8_t           557 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t SignalId;
uint8_t           558 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t Threshold;
uint8_t           559 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t Padding;
uint8_t           654 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t minVID;
uint8_t           655 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t maxVID;
uint8_t           671 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t setting;
uint8_t           672 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t padding[3];
uint8_t           715 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t       NumTemperatureSteps;
uint8_t           716 drivers/gpu/drm/amd/powerplay/inc/smu73.h   uint8_t       padding[3];
uint8_t            33 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t  Smio;
uint8_t            34 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t  padding;
uint8_t            51 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     pcieDpmLevel;
uint8_t            52 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     DeepSleepDivId;
uint8_t            60 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     SclkDid;
uint8_t            61 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     DisplayWatermark;
uint8_t            62 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     EnabledForActivity;
uint8_t            63 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     EnabledForThrottle;
uint8_t            64 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     UpHyst;
uint8_t            65 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     DownHyst;
uint8_t            66 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     VoltageDownHyst;
uint8_t            67 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     PowerThrottle;
uint8_t            76 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     SclkDid;
uint8_t            77 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     DisplayWatermark;
uint8_t            78 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     DeepSleepDivId;
uint8_t            79 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     padding;
uint8_t            96 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     VddcOffsetVid;
uint8_t            97 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     VddcPhase;
uint8_t           110 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     StutterEnable;
uint8_t           111 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     FreqRange;
uint8_t           112 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     EnabledForThrottle;
uint8_t           113 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     EnabledForActivity;
uint8_t           115 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     UpHyst;
uint8_t           116 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     DownHyst;
uint8_t           117 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     VoltageDownHyst;
uint8_t           118 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     padding;
uint8_t           121 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     DisplayWatermark;
uint8_t           122 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     MclkDivider;
uint8_t           129 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     PcieGenSpeed;           ///< 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3
uint8_t           130 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     PcieLaneCount;          ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 
uint8_t           131 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     EnabledForActivity;
uint8_t           132 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     SPC;
uint8_t           146 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  McArbBurstTime;
uint8_t           147 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  TRRDS;
uint8_t           148 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  TRRDL;
uint8_t           149 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  padding;
uint8_t           167 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  VclkDivider;
uint8_t           168 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DclkDivider;
uint8_t           169 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  padding[2];
uint8_t           179 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  Divider;
uint8_t           180 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  padding[3];
uint8_t           196 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DisplayWatermark;
uint8_t           197 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  McArbIndex;
uint8_t           198 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  McRegIndex;
uint8_t           199 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  SeqIndex;
uint8_t           200 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  SclkDid;
uint8_t           203 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  PCIeGen;
uint8_t           228 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             BapmVddcVidHiSidd        [SMU73_MAX_LEVELS_VDDC];
uint8_t           229 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             BapmVddcVidLoSidd        [SMU73_MAX_LEVELS_VDDC];
uint8_t           230 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             BapmVddcVidHiSidd2       [SMU73_MAX_LEVELS_VDDC];
uint8_t           232 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GraphicsDpmLevelCount;
uint8_t           233 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             MemoryDpmLevelCount;
uint8_t           234 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             LinkLevelCount;
uint8_t           235 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             MasterDeepSleepControl;
uint8_t           237 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             UvdLevelCount;
uint8_t           238 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             VceLevelCount;
uint8_t           239 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             AcpLevelCount;
uint8_t           240 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             SamuLevelCount;
uint8_t           242 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             ThermOutGpio;
uint8_t           243 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             ThermOutPolarity;
uint8_t           244 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             ThermOutMode;
uint8_t           245 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             BootPhases;
uint8_t           263 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             UvdBootLevel;
uint8_t           264 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             VceBootLevel;
uint8_t           265 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             AcpBootLevel;
uint8_t           266 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             SamuBootLevel;
uint8_t           268 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GraphicsBootLevel;
uint8_t           269 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GraphicsVoltageChangeEnable;
uint8_t           270 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GraphicsThermThrottleEnable;
uint8_t           271 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GraphicsInterval;
uint8_t           273 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             VoltageInterval;
uint8_t           274 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             ThermalInterval;
uint8_t           278 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             MemoryBootLevel;
uint8_t           279 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             MemoryVoltageChangeEnable;
uint8_t           282 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             MemoryInterval;
uint8_t           283 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             MemoryThermThrottleEnable;
uint8_t           288 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             PCIeBootLinkLevel;
uint8_t           289 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             PCIeGenInterval;
uint8_t           290 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             DTEInterval;
uint8_t           291 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             DTEMode;
uint8_t           293 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             SVI2Enable;
uint8_t           294 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             VRHotGpio;
uint8_t           295 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             AcDcGpio;
uint8_t           296 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             ThermGpio;
uint8_t           323 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Liquid1_I2C_address;
uint8_t           324 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Liquid2_I2C_address;
uint8_t           325 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Vr_I2C_address;
uint8_t           326 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Plx_I2C_address;
uint8_t           328 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GeminiMode;
uint8_t           329 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             spare17[3];
uint8_t           333 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Liquid_I2C_LineSCL;
uint8_t           334 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Liquid_I2C_LineSDA;
uint8_t           335 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Vr_I2C_LineSCL;
uint8_t           336 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Vr_I2C_LineSDA;
uint8_t           337 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Plx_I2C_LineSCL;
uint8_t           338 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Plx_I2C_LineSDA;
uint8_t           340 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             spare1253[2];
uint8_t           343 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             DTEAmbientTempBase;
uint8_t           344 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             DTETjOffset;
uint8_t           345 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GpuTjMax;
uint8_t           346 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             GpuTjHyst;
uint8_t           356 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             ClockStretcherAmount;
uint8_t           357 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Sclk_CKS_masterEn0_7;
uint8_t           358 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Sclk_CKS_masterEn8_15;
uint8_t           359 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             DPMFreezeAndForced;
uint8_t           361 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             Sclk_voltageOffset[8];
uint8_t           389 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  TempSrc;
uint8_t           415 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  TdpClampMode;
uint8_t           416 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  TdcClampMode;
uint8_t           417 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  ThermClampMode;
uint8_t           418 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  VoltageBusy;
uint8_t           422 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  LevelChangeInProgress;
uint8_t           423 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  UpHyst;
uint8_t           425 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DownHyst;
uint8_t           426 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  VoltageDownHyst;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DpmEnable;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DpmRunning;
uint8_t           430 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DpmForce;
uint8_t           431 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DpmForceLevel;
uint8_t           432 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  DisplayWatermark;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  McArbIndex;
uint8_t           437 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  AcpiReq;
uint8_t           438 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  AcpiAck;
uint8_t           439 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  MclkSwitchInProgress;
uint8_t           440 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  MclkSwitchCritical;
uint8_t           442 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  IgnoreVBlank;
uint8_t           443 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  TargetMclkIndex;
uint8_t           444 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  TargetMvddIndex;
uint8_t           445 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  MclkSwitchResult;
uint8_t           448 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  VbiWaitCounter;
uint8_t           449 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  EnabledLevelsChange;
uint8_t           454 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     void     (*TargetStateCalculator)(uint8_t);
uint8_t           455 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           463 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  fastSwitch;
uint8_t           464 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  Save_PIC_VDDGFX_EXIT;
uint8_t           465 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  Save_PIC_VDDGFX_ENTER;
uint8_t           466 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t  padding;
uint8_t           474 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     EnterUlv;
uint8_t           475 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     ExitUlv;
uint8_t           476 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     UlvActive;
uint8_t           477 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     WaitingForUlv;
uint8_t           478 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     UlvEnable;
uint8_t           479 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     UlvRunning;
uint8_t           480 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     UlvMasterEnable;
uint8_t           481 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     padding;
uint8_t           502 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     VddGfxEnable;
uint8_t           503 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     VddGfxActive;
uint8_t           504 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     VPUResetOccured;
uint8_t           505 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t     padding;
uint8_t           518 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t  Enable;
uint8_t           519 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t  Running;
uint8_t           530 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t  Enable;
uint8_t           531 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t  Running;
uint8_t           556 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t VariantID;
uint8_t           557 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t spare997;
uint8_t           571 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t LastACPIRequest;
uint8_t           572 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t CgBifResp;
uint8_t           573 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t RequestType;
uint8_t           574 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t Padding;
uint8_t           585 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t m1_shift;
uint8_t           586 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t m2_shift;
uint8_t           593 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t BapmVddCVidHiSidd[8];
uint8_t           596 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t BapmVddCVidLoSidd[8];
uint8_t           599 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t VddCVid[8];
uint8_t           602 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t SviLoadLineEn;
uint8_t           603 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t SviLoadLineVddC;
uint8_t           604 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t SviLoadLineTrimVddC;
uint8_t           605 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t SviLoadLineOffsetVddC;
uint8_t           609 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t           610 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t TDC_MAWt;
uint8_t           613 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t TdcWaterfallCtl;
uint8_t           614 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t LPMLTemperatureMin;
uint8_t           615 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t LPMLTemperatureMax;
uint8_t           616 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t Reserved;
uint8_t           619 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t LPMLTemperatureScaler[16];
uint8_t           628 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t GnbLPML[16];
uint8_t           631 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t GnbLPMLMaxVid;
uint8_t           632 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t GnbLPMLMinVid;
uint8_t           633 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t Reserved1[2];
uint8_t           667 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t     type;
uint8_t           668 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t     mode;
uint8_t           669 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h   uint8_t     filler_0[2];
uint8_t           676 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t             Enabled;
uint8_t           677 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t             Type;
uint8_t           678 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t             padding[2];
uint8_t            79 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t a_shift;
uint8_t            80 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t b_shift;
uint8_t            81 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t c_shift;
uint8_t            82 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t x_shift;
uint8_t           107 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t index;
uint8_t           224 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t waterfall_up;
uint8_t           225 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t waterfall_down;
uint8_t           226 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t waterfall_limit;
uint8_t           227 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t spare;
uint8_t           261 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  TdpClampMode;
uint8_t           262 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  TdcClampMode;
uint8_t           263 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  ThermClampMode;
uint8_t           264 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  VoltageBusy;
uint8_t           268 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  LevelChangeInProgress;
uint8_t           269 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  UpHyst;
uint8_t           271 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  DownHyst;
uint8_t           272 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  VoltageDownHyst;
uint8_t           273 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  DpmEnable;
uint8_t           274 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  DpmRunning;
uint8_t           276 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  DpmForce;
uint8_t           277 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  DpmForceLevel;
uint8_t           278 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  DisplayWatermark;
uint8_t           279 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  McArbIndex;
uint8_t           283 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  AcpiReq;
uint8_t           284 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  AcpiAck;
uint8_t           285 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  GfxClkSlow;
uint8_t           286 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  GpioClampMode;
uint8_t           288 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  spare2;
uint8_t           289 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  EnabledLevelsChange;
uint8_t           290 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  DteClampMode;
uint8_t           291 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  FpsClampMode;
uint8_t           296 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	void     (*TargetStateCalculator)(uint8_t);
uint8_t           297 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           302 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  FpsEnabled;
uint8_t           303 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  MaxPerfLevel;
uint8_t           304 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  AllowLowClkInterruptToHost;
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  FpsRunning;
uint8_t           313 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t MinPerfLevel;
uint8_t           314 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t padding[3];
uint8_t           333 drivers/gpu/drm/amd/powerplay/inc/smu74.h typedef uint8_t (*VoltageChangeHandler_t)(uint16_t, uint8_t);
uint8_t           348 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  HighestVidOffset;
uint8_t           349 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  CurrentVidOffset;
uint8_t           355 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  ControllerBusy;
uint8_t           356 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  CurrentVid;
uint8_t           357 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  CurrentVddciVid;
uint8_t           358 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  padding;
uint8_t           362 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  EnabledRequest[SMU7_MAX_VOLTAGE_CLIENTS];
uint8_t           364 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  padding2;
uint8_t           365 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  padding3;
uint8_t           366 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  ControllerEnable;
uint8_t           367 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  ControllerRunning;
uint8_t           370 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  OverrideVoltage;
uint8_t           371 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  padding4;
uint8_t           372 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  padding5;
uint8_t           373 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  CurrentPhases;
uint8_t           394 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     DpmEnable;
uint8_t           395 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     DpmRunning;
uint8_t           396 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     DpmForce;
uint8_t           397 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     DpmForceLevel;
uint8_t           399 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     CurrentLinkSpeed;
uint8_t           400 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     EnabledLevelsChange;
uint8_t           406 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     DpmMode;
uint8_t           407 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     AcpiReq;
uint8_t           408 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     AcpiAck;
uint8_t           409 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t     CurrentLinkLevel;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t    SidOptionPower;
uint8_t           434 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t    SidOptionCurrent;
uint8_t           466 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  ControllerEnable;
uint8_t           467 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  ControllerRunning;
uint8_t           468 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  AutoTmonCalInterval;
uint8_t           469 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  AutoTmonCalEnable;
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  ThermalDpmEnabled;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  SclkEnabledMask;
uint8_t           473 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  spare[2];
uint8_t           520 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy1Config;
uint8_t           521 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy2Config;
uint8_t           522 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy3Config;
uint8_t           523 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy4Config;
uint8_t           525 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy5Config;
uint8_t           526 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy6Config;
uint8_t           527 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy7Config;
uint8_t           528 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         DisplayPhy8Config;
uint8_t           534 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         SClkDpmEnabledLevels;
uint8_t           535 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         MClkDpmEnabledLevels;
uint8_t           536 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         LClkDpmEnabledLevels;
uint8_t           537 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         PCIeDpmEnabledLevels;
uint8_t           539 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         UVDDpmEnabledLevels;
uint8_t           540 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         SAMUDpmEnabledLevels;
uint8_t           541 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         ACPDpmEnabledLevels;
uint8_t           542 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         VCEDpmEnabledLevels;
uint8_t           553 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         Activity_Weight;
uint8_t           554 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t         Reserved8[3];
uint8_t           619 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t BlockId;
uint8_t           620 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t SignalId;
uint8_t           621 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t Threshold;
uint8_t           622 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t Padding;
uint8_t           726 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t minVID;
uint8_t           727 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t maxVID;
uint8_t           741 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t setting;
uint8_t           742 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t padding[3];
uint8_t           787 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t       NumTemperatureSteps;
uint8_t           788 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t       padding[3];
uint8_t           822 drivers/gpu/drm/amd/powerplay/inc/smu74.h 	uint8_t  Static_Voltage_Offset[NUM_VFT_COLUMNS];
uint8_t            44 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  vco_setting;
uint8_t            45 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  postdiv;
uint8_t            55 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Smio;
uint8_t            56 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  padding;
uint8_t            72 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     PllRange;
uint8_t            73 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     SSc_En;
uint8_t            85 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     pcieDpmLevel;
uint8_t            86 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     DeepSleepDivId;
uint8_t            92 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     SclkDid;
uint8_t            93 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     padding;
uint8_t            94 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     EnabledForActivity;
uint8_t            95 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     EnabledForThrottle;
uint8_t            96 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     UpHyst;
uint8_t            97 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     DownHyst;
uint8_t            98 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VoltageDownHyst;
uint8_t            99 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     PowerThrottle;
uint8_t           109 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     SclkDid;
uint8_t           110 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     DisplayWatermark;
uint8_t           111 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     DeepSleepDivId;
uint8_t           112 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     padding;
uint8_t           125 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VddcOffsetVid;
uint8_t           126 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VddcPhase;
uint8_t           139 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     StutterEnable;
uint8_t           140 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     EnabledForThrottle;
uint8_t           141 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     EnabledForActivity;
uint8_t           142 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     padding_0;
uint8_t           144 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     UpHyst;
uint8_t           145 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     DownHyst;
uint8_t           146 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VoltageDownHyst;
uint8_t           147 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     padding_1;
uint8_t           150 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     DisplayWatermark;
uint8_t           151 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     Reserved;
uint8_t           157 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     PcieGenSpeed;
uint8_t           158 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     PcieLaneCount;
uint8_t           159 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     EnabledForActivity;
uint8_t           160 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     SPC;
uint8_t           172 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  McArbBurstTime;
uint8_t           173 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  padding[3];
uint8_t           188 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  VclkDivider;
uint8_t           189 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  DclkDivider;
uint8_t           190 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  padding[2];
uint8_t           198 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Divider;
uint8_t           199 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  padding[3];
uint8_t           214 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  DisplayWatermark;
uint8_t           215 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  McArbIndex;
uint8_t           216 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  McRegIndex;
uint8_t           217 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  SeqIndex;
uint8_t           218 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  SclkDid;
uint8_t           221 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  PCIeGen;
uint8_t           231 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t m1_shift;
uint8_t           232 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t m2_shift;
uint8_t           253 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             BapmVddcVidHiSidd[SMU74_MAX_LEVELS_VDDC];
uint8_t           254 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             BapmVddcVidLoSidd[SMU74_MAX_LEVELS_VDDC];
uint8_t           255 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             BapmVddcVidHiSidd2[SMU74_MAX_LEVELS_VDDC];
uint8_t           257 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             GraphicsDpmLevelCount;
uint8_t           258 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             MemoryDpmLevelCount;
uint8_t           259 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             LinkLevelCount;
uint8_t           260 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             MasterDeepSleepControl;
uint8_t           262 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             UvdLevelCount;
uint8_t           263 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             VceLevelCount;
uint8_t           264 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             AcpLevelCount;
uint8_t           265 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             SamuLevelCount;
uint8_t           267 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             ThermOutGpio;
uint8_t           268 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             ThermOutPolarity;
uint8_t           269 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             ThermOutMode;
uint8_t           270 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             BootPhases;
uint8_t           272 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             VRHotLevel;
uint8_t           273 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             LdoRefSel;
uint8_t           274 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             Reserved1[2];
uint8_t           292 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             DisplayWatermark[SMU74_MAX_LEVELS_MEMORY][SMU74_MAX_LEVELS_GRAPHICS];
uint8_t           297 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             UvdBootLevel;
uint8_t           298 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             VceBootLevel;
uint8_t           299 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             AcpBootLevel;
uint8_t           300 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             SamuBootLevel;
uint8_t           302 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             GraphicsBootLevel;
uint8_t           303 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             GraphicsVoltageChangeEnable;
uint8_t           304 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             GraphicsThermThrottleEnable;
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             GraphicsInterval;
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             VoltageInterval;
uint8_t           308 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             ThermalInterval;
uint8_t           312 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             MemoryBootLevel;
uint8_t           313 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             MemoryVoltageChangeEnable;
uint8_t           316 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             MemoryInterval;
uint8_t           317 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             MemoryThermThrottleEnable;
uint8_t           322 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             PCIeBootLinkLevel;
uint8_t           323 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             PCIeGenInterval;
uint8_t           324 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             DTEInterval;
uint8_t           325 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             DTEMode;
uint8_t           327 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             SVI2Enable;
uint8_t           328 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             VRHotGpio;
uint8_t           329 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             AcDcGpio;
uint8_t           330 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             ThermGpio;
uint8_t           356 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             ClockStretcherAmount;
uint8_t           357 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             Sclk_CKS_masterEn0_7;
uint8_t           358 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             Sclk_CKS_masterEn8_15;
uint8_t           359 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             DPMFreezeAndForced;
uint8_t           361 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             Sclk_voltageOffset[8];
uint8_t           392 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  TempSrc;
uint8_t           415 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  TdpClampMode;
uint8_t           416 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  TdcClampMode;
uint8_t           417 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  ThermClampMode;
uint8_t           418 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  VoltageBusy;
uint8_t           422 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  LevelChangeInProgress;
uint8_t           423 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  UpHyst;
uint8_t           425 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  DownHyst;
uint8_t           426 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  VoltageDownHyst;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  DpmEnable;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  DpmRunning;
uint8_t           430 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  DpmForce;
uint8_t           431 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  DpmForceLevel;
uint8_t           432 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  padding2;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  McArbIndex;
uint8_t           437 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  AcpiReq;
uint8_t           438 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  AcpiAck;
uint8_t           439 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  MclkSwitchInProgress;
uint8_t           440 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  MclkSwitchCritical;
uint8_t           442 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  IgnoreVBlank;
uint8_t           443 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  TargetMclkIndex;
uint8_t           445 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  VbiWaitCounter;
uint8_t           446 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  EnabledLevelsChange;
uint8_t           451 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	void     (*TargetStateCalculator)(uint8_t);
uint8_t           452 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           460 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  fastSwitch;
uint8_t           461 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Save_PIC_VDDGFX_EXIT;
uint8_t           462 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Save_PIC_VDDGFX_ENTER;
uint8_t           463 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  padding;
uint8_t           469 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     EnterUlv;
uint8_t           470 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     ExitUlv;
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     UlvActive;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     WaitingForUlv;
uint8_t           473 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     UlvEnable;
uint8_t           474 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     UlvRunning;
uint8_t           475 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     UlvMasterEnable;
uint8_t           476 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     padding;
uint8_t           495 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VddGfxEnable;
uint8_t           496 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VddGfxActive;
uint8_t           497 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VPUResetOccured;
uint8_t           498 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     padding;
uint8_t           511 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Enable;
uint8_t           512 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Running;
uint8_t           523 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Enable;
uint8_t           524 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t  Running;
uint8_t           549 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t VariantID;
uint8_t           550 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t spare997;
uint8_t           564 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t LastACPIRequest;
uint8_t           565 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t CgBifResp;
uint8_t           566 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t RequestType;
uint8_t           567 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t Padding;
uint8_t           574 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t BapmVddCVidHiSidd[8];
uint8_t           575 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t BapmVddCVidLoSidd[8];
uint8_t           576 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t VddCVid[8];
uint8_t           577 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t SviLoadLineEn;
uint8_t           578 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t SviLoadLineVddC;
uint8_t           579 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t SviLoadLineTrimVddC;
uint8_t           580 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t SviLoadLineOffsetVddC;
uint8_t           582 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t           583 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t TDC_MAWt;
uint8_t           584 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t TdcWaterfallCtl;
uint8_t           585 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t LPMLTemperatureMin;
uint8_t           586 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t LPMLTemperatureMax;
uint8_t           587 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t Reserved;
uint8_t           589 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t LPMLTemperatureScaler[16];
uint8_t           596 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t GnbLPML[16];
uint8_t           598 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t GnbLPMLMaxVid;
uint8_t           599 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t GnbLPMLMinVid;
uint8_t           600 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t Reserved1[2];
uint8_t           632 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     type;
uint8_t           633 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     mode;
uint8_t           634 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     filler_0[2];
uint8_t           641 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t             Enabled;
uint8_t           642 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t             Type;
uint8_t           643 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t             padding[2];
uint8_t           738 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t Enabled;
uint8_t           739 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t WaterfallUp;
uint8_t           740 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t WaterfallDown;
uint8_t           741 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t WaterfallLimit;
uint8_t           742 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t CurrMaxCu;
uint8_t           743 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t TargMaxCu;
uint8_t           744 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t ClampMode;
uint8_t           745 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t Active;
uint8_t           746 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t MaxSupportedCu;
uint8_t           747 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t MinSupportedCu;
uint8_t           748 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t PendingGfxCuHostInterrupt;
uint8_t           749 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t LastFilteredMaxCuInteger;
uint8_t           754 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t ForceCu;
uint8_t           755 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t ForceCuCount;
uint8_t           756 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t spare[2];
uint8_t           195 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  TdpClampMode;
uint8_t           196 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  TdcClampMode;
uint8_t           197 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  ThermClampMode;
uint8_t           198 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  VoltageBusy;
uint8_t           202 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  LevelChangeInProgress;
uint8_t           203 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  UpHyst;
uint8_t           205 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  DownHyst;
uint8_t           206 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  VoltageDownHyst;
uint8_t           207 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  DpmEnable;
uint8_t           208 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  DpmRunning;
uint8_t           210 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  DpmForce;
uint8_t           211 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  DpmForceLevel;
uint8_t           212 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  DisplayWatermark;
uint8_t           213 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  McArbIndex;
uint8_t           217 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  AcpiReq;
uint8_t           218 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  AcpiAck;
uint8_t           219 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  GfxClkSlow;
uint8_t           220 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  GpioClampMode;
uint8_t           222 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  EnableModeSwitchRLCNotification;
uint8_t           223 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  EnabledLevelsChange;
uint8_t           224 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  DteClampMode;
uint8_t           225 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  FpsClampMode;
uint8_t           230 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	void     (*TargetStateCalculator)(uint8_t);
uint8_t           231 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           236 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  FpsEnabled;
uint8_t           237 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  MaxPerfLevel;
uint8_t           238 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  AllowLowClkInterruptToHost;
uint8_t           239 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  FpsRunning;
uint8_t           247 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t MinPerfLevel;
uint8_t           249 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t ScksClampMode;
uint8_t           250 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t padding[2];
uint8_t           252 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t padding[3];
uint8_t           272 drivers/gpu/drm/amd/powerplay/inc/smu75.h typedef uint8_t (*VoltageChangeHandler_t)(uint16_t, uint8_t);
uint8_t           286 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  HighestVidOffset;
uint8_t           287 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  CurrentVidOffset;
uint8_t           292 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  ControllerBusy;
uint8_t           293 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  CurrentVid;
uint8_t           294 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  CurrentVddciVid;
uint8_t           295 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  padding;
uint8_t           299 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  EnabledRequest[SMU7_MAX_VOLTAGE_CLIENTS];
uint8_t           301 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  padding2;
uint8_t           302 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  padding3;
uint8_t           303 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  ControllerEnable;
uint8_t           304 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  ControllerRunning;
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  OverrideVoltage;
uint8_t           308 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  padding4;
uint8_t           309 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  padding5;
uint8_t           310 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  CurrentPhases;
uint8_t           329 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     DpmEnable;
uint8_t           330 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     DpmRunning;
uint8_t           331 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     DpmForce;
uint8_t           332 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     DpmForceLevel;
uint8_t           334 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     CurrentLinkSpeed;
uint8_t           335 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     EnabledLevelsChange;
uint8_t           341 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     DpmMode;
uint8_t           342 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     AcpiReq;
uint8_t           343 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     AcpiAck;
uint8_t           344 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t     CurrentLinkLevel;
uint8_t           373 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t MCLK_patch_flag;
uint8_t           374 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t reserved[3];
uint8_t           413 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy1Config;
uint8_t           414 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy2Config;
uint8_t           415 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy3Config;
uint8_t           416 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy4Config;
uint8_t           418 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy5Config;
uint8_t           419 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy6Config;
uint8_t           420 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy7Config;
uint8_t           421 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         DisplayPhy8Config;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         SClkDpmEnabledLevels;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         MClkDpmEnabledLevels;
uint8_t           429 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         LClkDpmEnabledLevels;
uint8_t           430 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         PCIeDpmEnabledLevels;
uint8_t           432 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         UVDDpmEnabledLevels;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         SAMUDpmEnabledLevels;
uint8_t           434 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         ACPDpmEnabledLevels;
uint8_t           435 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         VCEDpmEnabledLevels;
uint8_t           446 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         Activity_Weight;
uint8_t           447 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t         Reserved8[3];
uint8_t           512 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t BlockId;
uint8_t           513 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t SignalId;
uint8_t           514 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t Threshold;
uint8_t           515 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t Padding;
uint8_t           608 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t minVID;
uint8_t           609 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t maxVID;
uint8_t           624 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t setting;
uint8_t           625 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t padding[3];
uint8_t           688 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t       NumTemperatureSteps;
uint8_t           689 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t       padding[3];
uint8_t           709 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t m1_shift;
uint8_t           710 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t m2_shift;
uint8_t           740 drivers/gpu/drm/amd/powerplay/inc/smu75.h 	uint8_t  Static_Voltage_Offset[NUM_VFT_COLUMNS];
uint8_t            43 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  vco_setting; /* 1: 3-6GHz, 3: 2-4GHz */
uint8_t            44 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  postdiv;     /* divide by 2^n */
uint8_t            53 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Smio;
uint8_t            54 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  padding;
uint8_t            70 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     PllRange;
uint8_t            71 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     SSc_En;
uint8_t            84 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     pcieDpmLevel;
uint8_t            85 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     DeepSleepDivId;
uint8_t            93 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     SclkDid;
uint8_t            94 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding;
uint8_t            95 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     EnabledForActivity;
uint8_t            96 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     EnabledForThrottle;
uint8_t            97 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     UpHyst;
uint8_t            98 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     DownHyst;
uint8_t            99 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VoltageDownHyst;
uint8_t           100 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     PowerThrottle;
uint8_t           104 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  ScksStretchThreshVid[NUM_SCKS_STATE_TYPES];
uint8_t           114 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     SclkDid;
uint8_t           115 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     DisplayWatermark;
uint8_t           116 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     DeepSleepDivId;
uint8_t           117 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding;
uint8_t           130 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VddcOffsetVid;
uint8_t           131 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VddcPhase;
uint8_t           144 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     StutterEnable;
uint8_t           145 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     EnabledForThrottle;
uint8_t           146 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     EnabledForActivity;
uint8_t           147 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding_0;
uint8_t           149 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     UpHyst;
uint8_t           150 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     DownHyst;
uint8_t           151 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VoltageDownHyst;
uint8_t           152 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding_1;
uint8_t           155 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     DisplayWatermark;
uint8_t           156 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding_2;
uint8_t           160 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     Postdiv;
uint8_t           161 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding_3[3];
uint8_t           167 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     PcieGenSpeed;
uint8_t           168 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     PcieLaneCount;
uint8_t           169 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     EnabledForActivity;
uint8_t           170 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     SPC;
uint8_t           202 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  VclkDivider;
uint8_t           203 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  DclkDivider;
uint8_t           204 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  padding[2];
uint8_t           213 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Divider;
uint8_t           214 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  padding[3];
uint8_t           229 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  DisplayWatermark;
uint8_t           230 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  McArbIndex;
uint8_t           231 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  McRegIndex;
uint8_t           232 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  SeqIndex;
uint8_t           233 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  SclkDid;
uint8_t           236 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  PCIeGen;
uint8_t           256 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             BapmVddcVidHiSidd        [SMU75_MAX_LEVELS_VDDC];
uint8_t           257 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             BapmVddcVidLoSidd        [SMU75_MAX_LEVELS_VDDC];
uint8_t           258 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             BapmVddcVidHiSidd2       [SMU75_MAX_LEVELS_VDDC];
uint8_t           260 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             GraphicsDpmLevelCount;
uint8_t           261 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             MemoryDpmLevelCount;
uint8_t           262 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             LinkLevelCount;
uint8_t           263 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             MasterDeepSleepControl;
uint8_t           265 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             UvdLevelCount;
uint8_t           266 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             VceLevelCount;
uint8_t           267 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             AcpLevelCount;
uint8_t           268 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             SamuLevelCount;
uint8_t           270 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             ThermOutGpio;
uint8_t           271 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             ThermOutPolarity;
uint8_t           272 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             ThermOutMode;
uint8_t           273 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             BootPhases;
uint8_t           275 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             VRHotLevel;
uint8_t           276 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             LdoRefSel;
uint8_t           278 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             Reserved1[2];
uint8_t           298 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             DisplayWatermark        [SMU75_MAX_LEVELS_MEMORY][SMU75_MAX_LEVELS_GRAPHICS];
uint8_t           303 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             UvdBootLevel;
uint8_t           304 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             VceBootLevel;
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             AcpBootLevel;
uint8_t           306 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             SamuBootLevel;
uint8_t           308 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             GraphicsBootLevel;
uint8_t           309 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             GraphicsVoltageChangeEnable;
uint8_t           310 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             GraphicsThermThrottleEnable;
uint8_t           311 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             GraphicsInterval;
uint8_t           313 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             VoltageInterval;
uint8_t           314 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             ThermalInterval;
uint8_t           318 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             MemoryBootLevel;
uint8_t           319 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             MemoryVoltageChangeEnable;
uint8_t           322 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             MemoryInterval;
uint8_t           323 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             MemoryThermThrottleEnable;
uint8_t           328 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             PCIeBootLinkLevel;
uint8_t           329 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             PCIeGenInterval;
uint8_t           330 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             DTEInterval;
uint8_t           331 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             DTEMode;
uint8_t           333 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             SVI2Enable;
uint8_t           334 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             VRHotGpio;
uint8_t           335 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             AcDcGpio;
uint8_t           336 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             ThermGpio;
uint8_t           362 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             ClockStretcherAmount;
uint8_t           363 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             Sclk_CKS_masterEn0_7;
uint8_t           364 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             Sclk_CKS_masterEn8_15;
uint8_t           365 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             DPMFreezeAndForced;
uint8_t           367 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             Sclk_voltageOffset[8];
uint8_t           398 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  TempSrc;
uint8_t           422 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  TdpClampMode;
uint8_t           423 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  TdcClampMode;
uint8_t           424 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  ThermClampMode;
uint8_t           425 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  VoltageBusy;
uint8_t           429 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  LevelChangeInProgress;
uint8_t           430 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  UpHyst;
uint8_t           432 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  DownHyst;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  VoltageDownHyst;
uint8_t           434 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  DpmEnable;
uint8_t           435 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  DpmRunning;
uint8_t           437 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  DpmForce;
uint8_t           438 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  DpmForceLevel;
uint8_t           439 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  padding2;
uint8_t           440 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  McArbIndex;
uint8_t           444 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  AcpiReq;
uint8_t           445 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  AcpiAck;
uint8_t           446 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  MclkSwitchInProgress;
uint8_t           447 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  MclkSwitchCritical;
uint8_t           449 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  IgnoreVBlank;
uint8_t           450 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  TargetMclkIndex;
uint8_t           451 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  TargetMvddIndex;
uint8_t           452 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  MclkSwitchResult;
uint8_t           455 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  VbiWaitCounter;
uint8_t           456 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  EnabledLevelsChange;
uint8_t           461 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	void     (*TargetStateCalculator)(uint8_t);
uint8_t           462 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	void     (*SavedTargetStateCalculator)(uint8_t);
uint8_t           470 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  fastSwitch;
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Save_PIC_VDDGFX_EXIT;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Save_PIC_VDDGFX_ENTER;
uint8_t           473 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  VbiTimeout;
uint8_t           481 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     EnterUlv;
uint8_t           482 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     ExitUlv;
uint8_t           483 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     UlvActive;
uint8_t           484 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     WaitingForUlv;
uint8_t           485 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     UlvEnable;
uint8_t           486 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     UlvRunning;
uint8_t           487 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     UlvMasterEnable;
uint8_t           488 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding;
uint8_t           507 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VddGfxEnable;
uint8_t           508 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VddGfxActive;
uint8_t           509 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VPUResetOccured;
uint8_t           510 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     padding;
uint8_t           523 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Enable;
uint8_t           524 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Running;
uint8_t           535 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Enable;
uint8_t           536 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t  Running;
uint8_t           542 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t PowerSharingEnabled;
uint8_t           543 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t PowerSharingCounter;
uint8_t           544 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t PowerSharingINTEnabled;
uint8_t           545 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t GFXActivityCounterEnabled;
uint8_t           548 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t RollOverRequired;
uint8_t           549 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t RollOverCount;
uint8_t           550 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t padding[2];
uint8_t           570 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t VariantID;
uint8_t           571 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t spare997;
uint8_t           585 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t LastACPIRequest;
uint8_t           586 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t CgBifResp;
uint8_t           587 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t RequestType;
uint8_t           588 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t Padding;
uint8_t           595 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t BapmVddCVidHiSidd[8];
uint8_t           597 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t BapmVddCVidLoSidd[8];
uint8_t           599 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t VddCVid[8];
uint8_t           601 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t SviLoadLineEn;
uint8_t           602 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t SviLoadLineVddC;
uint8_t           603 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t SviLoadLineTrimVddC;
uint8_t           604 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t SviLoadLineOffsetVddC;
uint8_t           607 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t           608 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t TDC_MAWt;
uint8_t           610 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t TdcWaterfallCtl;
uint8_t           611 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t LPMLTemperatureMin;
uint8_t           612 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t LPMLTemperatureMax;
uint8_t           613 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t Reserved;
uint8_t           615 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t LPMLTemperatureScaler[16];
uint8_t           622 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t GnbLPML[16];
uint8_t           624 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t GnbLPMLMaxVid;
uint8_t           625 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t GnbLPMLMinVid;
uint8_t           626 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t Reserved1[2];
uint8_t           632 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t   Version;
uint8_t           633 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t   padding;
uint8_t           661 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     type;
uint8_t           662 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     mode;
uint8_t           663 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     filler_0[2];
uint8_t           670 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t             Enabled;
uint8_t           671 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t             Type;
uint8_t           672 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t             padding[2];
uint8_t           774 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t Enabled;
uint8_t           775 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t WaterfallUp;
uint8_t           776 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t WaterfallDown;
uint8_t           777 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t WaterfallLimit;
uint8_t           778 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t CurrMaxCu;
uint8_t           779 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t TargMaxCu;
uint8_t           780 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t ClampMode;
uint8_t           781 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t Active;
uint8_t           782 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t MaxSupportedCu;
uint8_t           783 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t MinSupportedCu;
uint8_t           784 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t PendingGfxCuHostInterrupt;
uint8_t           785 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t LastFilteredMaxCuInteger;
uint8_t           790 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t ForceCu;
uint8_t           791 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t ForceCuCount;
uint8_t           792 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t AcModeMaxCu;
uint8_t           793 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t DcModeMaxCu;
uint8_t            55 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy1Config;
uint8_t            56 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy2Config;
uint8_t            57 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy3Config;
uint8_t            58 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy4Config;
uint8_t            60 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy5Config;
uint8_t            61 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy6Config;
uint8_t            62 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy7Config;
uint8_t            63 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         DisplayPhy8Config;
uint8_t            69 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         SClkDpmEnabledLevels;
uint8_t            70 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         MClkDpmEnabledLevels;
uint8_t            71 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         LClkDpmEnabledLevels;
uint8_t            72 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         PCIeDpmEnabledLevels;
uint8_t            74 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         UVDDpmEnabledLevels;
uint8_t            75 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         SAMUDpmEnabledLevels;
uint8_t            76 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         ACPDpmEnabledLevels;
uint8_t            77 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t         VCEDpmEnabledLevels;
uint8_t            97 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     Smio;
uint8_t            98 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     padding;
uint8_t           111 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     padding1[2];
uint8_t           120 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     SclkDid;
uint8_t           121 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     DisplayWatermark;
uint8_t           122 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EnabledForActivity;
uint8_t           123 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EnabledForThrottle;
uint8_t           124 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     UpH;
uint8_t           125 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     DownH;
uint8_t           126 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     VoltageDownH;
uint8_t           127 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     PowerThrottle;
uint8_t           128 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     DeepSleepDivId;
uint8_t           129 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     padding[3];
uint8_t           140 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     SclkDid;
uint8_t           141 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     DisplayWatermark;
uint8_t           142 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     DeepSleepDivId;
uint8_t           143 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     padding;
uint8_t           161 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     VddcOffsetVid;
uint8_t           162 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     VddcPhase;
uint8_t           177 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EdcReadEnable;
uint8_t           178 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EdcWriteEnable;
uint8_t           179 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     RttEnable;
uint8_t           180 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     StutterEnable;
uint8_t           182 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     StrobeEnable;
uint8_t           183 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     StrobeRatio;
uint8_t           184 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EnabledForThrottle;
uint8_t           185 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EnabledForActivity;
uint8_t           187 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     UpH;
uint8_t           188 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     DownH;
uint8_t           189 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     VoltageDownH;
uint8_t           190 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     padding;
uint8_t           193 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     DisplayWatermark;
uint8_t           194 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     padding1;
uint8_t           211 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     PcieGenSpeed;
uint8_t           212 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     PcieLaneCount;
uint8_t           213 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EnabledForActivity;
uint8_t           214 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     Padding;
uint8_t           227 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  McArbBurstTime;
uint8_t           228 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  padding[3];
uint8_t           245 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  MinVddcPhases;
uint8_t           246 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  VclkDivider;
uint8_t           247 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  DclkDivider;
uint8_t           248 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  padding[3];
uint8_t           257 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  MinPhases;
uint8_t           258 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  Divider;
uint8_t           274 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  DisplayWatermark;
uint8_t           275 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  McArbIndex;
uint8_t           276 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  McRegIndex;
uint8_t           277 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  SeqIndex;
uint8_t           278 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  SclkDid;
uint8_t           281 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t  PCIeGen;
uint8_t           311 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             GraphicsDpmLevelCount;
uint8_t           312 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             MemoryDpmLevelCount;
uint8_t           313 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             LinkLevelCount;
uint8_t           314 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             UvdLevelCount;
uint8_t           315 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             VceLevelCount;
uint8_t           316 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             AcpLevelCount;
uint8_t           317 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             SamuLevelCount;
uint8_t           318 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             MasterDeepSleepControl;
uint8_t           337 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             UvdBootLevel;
uint8_t           338 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             VceBootLevel;
uint8_t           339 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             AcpBootLevel;
uint8_t           340 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             SamuBootLevel;
uint8_t           342 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             UVDInterval;
uint8_t           343 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             VCEInterval;
uint8_t           344 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             ACPInterval;
uint8_t           345 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             SAMUInterval;
uint8_t           347 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             GraphicsBootLevel;
uint8_t           348 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             GraphicsVoltageChangeEnable;
uint8_t           349 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             GraphicsThermThrottleEnable;
uint8_t           350 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             GraphicsInterval;
uint8_t           352 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             VoltageInterval;
uint8_t           353 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             ThermalInterval;
uint8_t           357 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             MemoryBootLevel;
uint8_t           358 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             MemoryVoltageChangeEnable;
uint8_t           360 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             MemoryInterval;
uint8_t           361 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             MemoryThermThrottleEnable;
uint8_t           367 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             PCIeBootLinkLevel;
uint8_t           368 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             PCIeGenInterval;
uint8_t           369 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             DTEInterval;
uint8_t           370 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             DTEMode;
uint8_t           372 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             SVI2Enable;
uint8_t           373 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             VRHotGpio;
uint8_t           374 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             AcDcGpio;
uint8_t           375 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             ThermGpio;
uint8_t           389 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             DTEAmbientTempBase;
uint8_t           390 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             DTETjOffset;
uint8_t           391 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             GpuTjMax;
uint8_t           392 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             GpuTjHyst;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             last;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             reserved[3];
uint8_t           453 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h 	uint8_t  TempSrc;
uint8_t           462 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t BapmVddCVidHiSidd[8];
uint8_t           465 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t BapmVddCVidLoSidd[8];
uint8_t           468 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t VddCVid[8];
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t SviLoadLineEn;
uint8_t           472 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t SviLoadLineVddC;
uint8_t           473 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t SviLoadLineTrimVddC;
uint8_t           474 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t SviLoadLineOffsetVddC;
uint8_t           478 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t           479 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t TDC_MAWt;
uint8_t           482 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t TdcWaterfallCtl;
uint8_t           483 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t LPMLTemperatureMin;
uint8_t           484 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t LPMLTemperatureMax;
uint8_t           485 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t Reserved;
uint8_t           488 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t BapmVddCVidHiSidd2[8];
uint8_t           497 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t GnbLPML[16];
uint8_t           500 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t GnbLPMLMaxVid;
uint8_t           501 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t GnbLPMLMinVid;
uint8_t           502 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h   uint8_t Reserved1[2];
uint8_t            46 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy1Config;
uint8_t            47 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy2Config;
uint8_t            48 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy3Config;
uint8_t            49 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy4Config;
uint8_t            51 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy5Config;
uint8_t            52 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy6Config;
uint8_t            53 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy7Config;
uint8_t            54 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         DisplayPhy8Config;
uint8_t            60 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         SClkDpmEnabledLevels;
uint8_t            61 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         MClkDpmEnabledLevels;
uint8_t            62 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         LClkDpmEnabledLevels;
uint8_t            63 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         PCIeDpmEnabledLevels;
uint8_t            65 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         UVDDpmEnabledLevels;
uint8_t            66 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         SAMUDpmEnabledLevels;
uint8_t            67 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         ACPDpmEnabledLevels;
uint8_t            68 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t         VCEDpmEnabledLevels;
uint8_t            89 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     Vid;
uint8_t            90 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     VidOffset;
uint8_t            93 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     PowerThrottle;
uint8_t            94 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     GnbSlow;
uint8_t            95 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     ForceNbPs1;
uint8_t            96 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     SclkDid;
uint8_t            98 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     DisplayWatermark;
uint8_t            99 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     EnabledForActivity;
uint8_t           100 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     EnabledForThrottle;
uint8_t           101 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     UpH;
uint8_t           103 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     DownH;
uint8_t           104 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     VoltageDownH;
uint8_t           105 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     DeepSleepDivId;
uint8_t           107 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     ClkBypassCntl;
uint8_t           116 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     EnabledForActivity;
uint8_t           117 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     LclkDid;
uint8_t           118 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     Vid;
uint8_t           119 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     VoltageDownH;
uint8_t           124 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     UpH;
uint8_t           125 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     DownH;
uint8_t           129 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     ActivityLevel;
uint8_t           130 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     EnabledForThrottle;
uint8_t           132 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     ClkBypassCntl;
uint8_t           134 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     padding;
uint8_t           145 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t  VclkDivider;
uint8_t           146 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t  DclkDivider;
uint8_t           148 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     VClkBypassCntl;
uint8_t           149 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     DClkBypassCntl;
uint8_t           151 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     padding[2];
uint8_t           162 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t  Divider;
uint8_t           163 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t  ClkBypassCntl;
uint8_t           174 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     SclkDid;
uint8_t           175 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     GnbSlow;
uint8_t           176 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     ForceNbPs1;
uint8_t           177 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     DisplayWatermark;
uint8_t           178 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     DeepSleepDivId;
uint8_t           179 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t     padding[3];
uint8_t           186 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t DpmXNbPsHi;
uint8_t           187 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t DpmXNbPsLo;
uint8_t           188 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t Dpm0PgNbPsHi;
uint8_t           189 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t Dpm0PgNbPsLo;
uint8_t           190 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t EnablePsi1;
uint8_t           191 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t SkipDPM0;
uint8_t           192 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t SkipPG;
uint8_t           193 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t Hysteresis;
uint8_t           194 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t EnableDpmPstatePoll;
uint8_t           195 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t padding[3];
uint8_t           209 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t  DisplayWatermark;
uint8_t           210 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t  McArbIndex;
uint8_t           224 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                            GraphicsDpmLevelCount;
uint8_t           225 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                            GIOLevelCount;
uint8_t           226 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                            UvdLevelCount;
uint8_t           227 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                            VceLevelCount;
uint8_t           229 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                            AcpLevelCount;
uint8_t           230 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                            SamuLevelCount;
uint8_t           240 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           UvdBootLevel;
uint8_t           241 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           VceBootLevel;
uint8_t           242 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           AcpBootLevel;
uint8_t           243 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           SamuBootLevel;
uint8_t           244 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           UVDInterval;
uint8_t           245 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           VCEInterval;
uint8_t           246 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           ACPInterval;
uint8_t           247 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           SAMUInterval;
uint8_t           249 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GraphicsBootLevel;
uint8_t           250 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GraphicsInterval;
uint8_t           251 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GraphicsThermThrottleEnable;
uint8_t           252 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GraphicsVoltageChangeEnable;
uint8_t           254 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GraphicsClkSlowEnable;
uint8_t           255 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GraphicsClkSlowDivider;
uint8_t           278 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           Enable;
uint8_t           279 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GIOVoltageChangeEnable;
uint8_t           280 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           GIOBootLevel;
uint8_t           281 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           padding;
uint8_t           282 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           padding1[2];
uint8_t           283 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           TargetState;
uint8_t           284 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           CurrenttState;
uint8_t           285 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           ThrottleOnHtc;
uint8_t           286 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           ThermThrottleStatus;
uint8_t           287 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           ThermThrottleTempSelect;
uint8_t           288 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     uint8_t                           ThermThrottleEnable;
uint8_t            36 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h     uint8_t Enabled;
uint8_t            37 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h     uint8_t spare[3];
uint8_t            47 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h 	uint8_t  EnableCsrShadow;
uint8_t            48 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h 	uint8_t  EnableDramShadow;
uint8_t            67 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h 	uint8_t		GnbVid;
uint8_t            68 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h 	uint8_t		GfxVid;
uint8_t            69 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h 	uint8_t		DfsDid;
uint8_t            70 drivers/gpu/drm/amd/powerplay/inc/smu8_fusion.h 	uint8_t		DeepSleepDid;
uint8_t            84 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  SsOn;
uint8_t            85 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Did;      /* DID */
uint8_t            93 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t a0_shift;
uint8_t            94 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t a1_shift;
uint8_t            95 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t a2_shift;
uint8_t            96 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t padding;
uint8_t           104 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t m1_shift;
uint8_t           105 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t m2_shift;
uint8_t           106 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t b_shift;
uint8_t           107 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t padding;
uint8_t           142 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Liquid1_I2C_address;
uint8_t           143 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Liquid2_I2C_address;
uint8_t           144 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Vr_I2C_address;
uint8_t           145 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Plx_I2C_address;
uint8_t           147 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  GeminiMode;
uint8_t           148 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  spare17[3];
uint8_t           152 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Liquid_I2C_LineSCL;
uint8_t           153 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Liquid_I2C_LineSDA;
uint8_t           154 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Vr_I2C_LineSCL;
uint8_t           155 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Vr_I2C_LineSDA;
uint8_t           156 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Plx_I2C_LineSCL;
uint8_t           157 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Plx_I2C_LineSDA;
uint8_t           158 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  paddingx[2];
uint8_t           161 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  UlvOffsetVid;     /* SVI2 VID */
uint8_t           162 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  UlvSmnclkDid;     /* DID for ULV mode. 0 means CLK will not be modified in ULV. */
uint8_t           163 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  UlvMp1clkDid;     /* DID for ULV mode. 0 means CLK will not be modified in ULV. */
uint8_t           164 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  UlvGfxclkBypass;  /* 1 to turn off/bypass Gfxclk during ULV, 0 to leave Gfxclk on during ULV */
uint8_t           167 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      SocVid[NUM_EVV_VOLTAGE_LEVELS];
uint8_t           170 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      MinVoltageVid; /* Minimum Voltage ("Vmin") of ASIC */
uint8_t           171 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      MaxVoltageVid; /* Maximum Voltage allowable */
uint8_t           172 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      MaxVidStep; /* Max VID step that SMU will request. Multiple steps are taken if voltage change exceeds this value. */
uint8_t           173 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      padding8;
uint8_t           175 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      UlvPhaseSheddingPsi0; /* set this to 1 to set PSI0/1 to 1 in ULV mode */
uint8_t           176 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      UlvPhaseSheddingPsi1; /* set this to 1 to set PSI0/1 to 1 in ULV mode */
uint8_t           177 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      padding8_2[2];
uint8_t           182 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      SocclkDid          [NUM_SOCCLK_DPM_LEVELS];          /* DID */
uint8_t           183 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      SocDpmVoltageIndex [NUM_SOCCLK_DPM_LEVELS];
uint8_t           185 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      VclkDid            [NUM_UVD_DPM_LEVELS];            /* DID */
uint8_t           186 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      DclkDid            [NUM_UVD_DPM_LEVELS];            /* DID */
uint8_t           187 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      UvdDpmVoltageIndex [NUM_UVD_DPM_LEVELS];
uint8_t           189 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      EclkDid            [NUM_VCE_DPM_LEVELS];            /* DID */
uint8_t           190 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      VceDpmVoltageIndex [NUM_VCE_DPM_LEVELS];
uint8_t           192 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      Mp0clkDid          [NUM_MP0CLK_DPM_LEVELS];          /* DID */
uint8_t           193 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      Mp0DpmVoltageIndex [NUM_MP0CLK_DPM_LEVELS];
uint8_t           198 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      GfxDpmVoltageMode;
uint8_t           199 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      SocDpmVoltageMode;
uint8_t           200 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      UclkDpmVoltageMode;
uint8_t           201 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      UvdDpmVoltageMode;
uint8_t           203 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      VceDpmVoltageMode;
uint8_t           204 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      Mp0DpmVoltageMode;
uint8_t           205 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      DisplayDpmVoltageMode;
uint8_t           206 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      padding8_3;
uint8_t           214 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      GfxclkAverageAlpha;
uint8_t           215 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      SocclkAverageAlpha;
uint8_t           216 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      UclkAverageAlpha;
uint8_t           217 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      GfxActivityAverageAlpha;
uint8_t           220 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      MemVid[NUM_UCLK_DPM_LEVELS];    /* VID */
uint8_t           222 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      MemSocVoltageIndex[NUM_UCLK_DPM_LEVELS];
uint8_t           223 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      LowestUclkReservedForUlv; /* Set this to 1 if UCLK DPM0 is reserved for ULV-mode only */
uint8_t           224 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      paddingUclk[3];
uint8_t           229 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      CksEnable[NUM_GFXCLK_DPM_LEVELS];
uint8_t           230 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      CksVidOffset[NUM_GFXCLK_DPM_LEVELS];
uint8_t           233 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      PspLevelMap[NUM_PSP_LEVEL_MAP];
uint8_t           236 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t     PcieGenSpeed[NUM_LINK_LEVELS];           /* 0:PciE-gen1 1:PciE-gen2 2:PciE-gen3 */
uint8_t           237 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t     PcieLaneCount[NUM_LINK_LEVELS];          /* 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 */
uint8_t           238 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t     LclkDid[NUM_LINK_LEVELS];                /* Leave at 0 to use hardcoded values in FW */
uint8_t           239 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t     paddingLinkDpm[2];
uint8_t           258 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      FanZeroRpmEnable;
uint8_t           259 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      FanSpare;
uint8_t           268 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      AcDcGpio;        /* GPIO pin configured for AC/DC switching */
uint8_t           269 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      AcDcPolarity;    /* GPIO polarity for AC/DC switching */
uint8_t           270 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      VR0HotGpio;      /* GPIO pin configured for VR0 HOT event */
uint8_t           271 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      VR0HotPolarity;  /* GPIO polarity for VR0 HOT event */
uint8_t           272 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      VR1HotGpio;      /* GPIO pin configured for VR1 HOT event */
uint8_t           273 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      VR1HotPolarity;  /* GPIO polarity for VR1 HOT event */
uint8_t           274 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      Padding1;       /* replace GPIO pin configured for CTF */
uint8_t           275 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      Padding2;       /* replace GPIO polarity for CTF */
uint8_t           278 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      LedPin0;         /* GPIO number for LedPin[0] */
uint8_t           279 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      LedPin1;         /* GPIO number for LedPin[1] */
uint8_t           280 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      LedPin2;         /* GPIO number for LedPin[2] */
uint8_t           281 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      padding8_4;
uint8_t           284 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      OverrideBtcGbCksOn;
uint8_t           285 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      OverrideAvfsGbCksOn;
uint8_t           286 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      PaddingAvfs8[2];
uint8_t           294 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      StaticVoltageOffsetVid[NUM_GFXCLK_DPM_LEVELS]; /* This values are added on to the final voltage calculation */
uint8_t           305 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      EnableBoostState;
uint8_t           306 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      AConstant_Shift;
uint8_t           307 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      DC_tol_sigma_Shift;
uint8_t           308 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      PSM_Age_CompFactor_Shift;
uint8_t           315 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t      AcgEnable[NUM_GFXCLK_DPM_LEVELS];
uint8_t           333 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  WmSetting;
uint8_t           334 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Padding[3];
uint8_t           384 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  AvfsEn;
uint8_t           385 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  AvfsVersion;
uint8_t           386 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h   uint8_t  Padding[2];
uint8_t           114 drivers/gpu/drm/amd/powerplay/inc/smu_ucode_xfer_cz.h     uint8_t type;
uint8_t           115 drivers/gpu/drm/amd/powerplay/inc/smu_ucode_xfer_cz.h     uint8_t arg;
uint8_t           123 drivers/gpu/drm/amd/powerplay/inc/smu_ucode_xfer_cz.h     uint8_t JobList[NUM_JOBLIST_ENTRIES];
uint8_t           121 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h 	uint8_t		in_power_limit_boost_mode;
uint8_t            87 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h     uint8_t  revision;                                        //Revision = SMU_11_0_PP_OVERDRIVE_VERSION
uint8_t            88 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h     uint8_t  reserve[3];                                      //Zero filled field reserved for future use
uint8_t            91 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h     uint8_t  cap[SMU_11_0_MAX_ODFEATURE];                     //OD feature support flags
uint8_t           113 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h     uint8_t  revision;                                        //Revision = SMU_11_0_PP_POWERSAVINGCLOCK_VERSION
uint8_t           114 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h     uint8_t  reserve[3];                                      //Zero filled field reserved for future use
uint8_t           123 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h       uint8_t  table_revision;
uint8_t           130 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h       uint8_t  thermal_controller_type;             //one of SMU_11_0_PP_THERMALCONTROLLER
uint8_t           115 drivers/gpu/drm/amd/powerplay/inc/smumgr.h extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);
uint8_t           240 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t        VoltageMode;
uint8_t           241 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t        SnapToDiscrete;
uint8_t           242 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t        NumDiscreteLevels;
uint8_t           243 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t        padding;
uint8_t           283 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  MemoryOnPackage;
uint8_t           284 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  padding8_limits[3];
uint8_t           290 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  UlvSmnclkDid;
uint8_t           291 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  UlvMp1clkDid;
uint8_t           292 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  UlvGfxclkBypass;
uint8_t           293 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  Padding234;
uint8_t           333 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t         Padding456[2];
uint8_t           336 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      LowestUclkReservedForUlv;
uint8_t           337 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding8_Uclk[3];
uint8_t           340 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      PcieGenSpeed[NUM_LINK_LEVELS];
uint8_t           341 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      PcieLaneCount[NUM_LINK_LEVELS];
uint8_t           367 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      FanZeroRpmEnable; 
uint8_t           368 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      FanTachEdgePerRev;
uint8_t           380 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t           OverrideAvfsGb;
uint8_t           381 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t           Padding8_Avfs[3];
uint8_t           397 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t           DcBtcGfxEnabled;
uint8_t           398 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t           DcBtcSocEnabled;
uint8_t           399 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t           Padding8_GfxBtc[2];
uint8_t           422 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Liquid1_I2C_address;
uint8_t           423 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Liquid2_I2C_address;
uint8_t           424 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Vr_I2C_address;
uint8_t           425 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Plx_I2C_address;
uint8_t           427 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Liquid_I2C_LineSCL;
uint8_t           428 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Liquid_I2C_LineSDA;
uint8_t           429 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Vr_I2C_LineSCL;
uint8_t           430 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Vr_I2C_LineSDA;
uint8_t           432 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Plx_I2C_LineSCL;
uint8_t           433 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Plx_I2C_LineSDA;
uint8_t           434 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VrSensorPresent;
uint8_t           435 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      LiquidSensorPresent;
uint8_t           440 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VddGfxVrMapping;
uint8_t           441 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VddSocVrMapping;
uint8_t           442 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VddMem0VrMapping;
uint8_t           443 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VddMem1VrMapping;
uint8_t           445 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      GfxUlvPhaseSheddingMask;
uint8_t           446 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      SocUlvPhaseSheddingMask;
uint8_t           447 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      ExternalSensorPresent;
uint8_t           448 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding8_V;
uint8_t           453 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding_TelemetryGfx;
uint8_t           457 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding_TelemetrySoc;
uint8_t           461 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding_TelemetryMem0;
uint8_t           465 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding_TelemetryMem1;
uint8_t           468 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      AcDcGpio;
uint8_t           469 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      AcDcPolarity;
uint8_t           470 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VR0HotGpio;
uint8_t           471 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VR0HotPolarity;
uint8_t           473 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VR1HotGpio;
uint8_t           474 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      VR1HotPolarity;
uint8_t           475 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding1;
uint8_t           476 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Padding2;
uint8_t           480 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      LedPin0;
uint8_t           481 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      LedPin1;
uint8_t           482 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      LedPin2;
uint8_t           483 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      padding8_4;
uint8_t           486 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      PllGfxclkSpreadEnabled;
uint8_t           487 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      PllGfxclkSpreadPercent;
uint8_t           490 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      UclkSpreadEnabled;
uint8_t           491 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      UclkSpreadPercent;
uint8_t           494 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      SocclkSpreadEnabled;
uint8_t           495 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      SocclkSpreadPercent;
uint8_t           498 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      AcgGfxclkSpreadEnabled;
uint8_t           499 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      AcgGfxclkSpreadPercent;
uint8_t           502 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      Vr2_I2C_address;
uint8_t           503 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t      padding_vr2[3];
uint8_t           550 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  CurrSocVoltageOffset  ;
uint8_t           551 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  CurrGfxVoltageOffset  ;
uint8_t           552 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  CurrMemVidOffset      ;
uint8_t           553 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  Padding8              ;
uint8_t           564 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  LinkDpmLevel;
uint8_t           565 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  Padding[3];
uint8_t           577 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  WmSetting;
uint8_t           578 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  Padding[3];
uint8_t           606 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  AvfsEn;
uint8_t           607 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  AvfsVersion;
uint8_t           608 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  OverrideVFT;
uint8_t           609 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  OverrideAvfsGb;
uint8_t           611 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  OverrideTemperatures;
uint8_t           612 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  OverrideVInversion;
uint8_t           613 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  OverrideP2V;
uint8_t           614 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t  OverrideP2VCharzFreq;
uint8_t           656 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Gfx_ActiveHystLimit;
uint8_t           657 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Gfx_IdleHystLimit;
uint8_t           658 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Gfx_FPS;
uint8_t           659 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Gfx_MinActiveFreqType;
uint8_t           660 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Gfx_BoosterFreqType; 
uint8_t           661 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Gfx_UseRlcBusy; 
uint8_t           671 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Soc_ActiveHystLimit;
uint8_t           672 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Soc_IdleHystLimit;
uint8_t           673 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Soc_FPS;
uint8_t           674 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Soc_MinActiveFreqType;
uint8_t           675 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Soc_BoosterFreqType; 
uint8_t           676 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Soc_UseRlcBusy;
uint8_t           686 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Mem_ActiveHystLimit;
uint8_t           687 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Mem_IdleHystLimit;
uint8_t           688 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Mem_FPS;
uint8_t           689 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Mem_MinActiveFreqType;
uint8_t           690 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Mem_BoosterFreqType;
uint8_t           691 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h   uint8_t   Mem_UseRlcBusy; 
uint8_t           409 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 				      (uint8_t **)&smc_dpm_table);
uint8_t          1324 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 		table->WatermarkRow[1][i].WmSetting = (uint8_t)
uint8_t          1345 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 		table->WatermarkRow[0][i].WmSetting = (uint8_t)
uint8_t           266 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	uint8_t smu_minor, smu_debug;
uint8_t           325 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	*table = (uint8_t *)v2 + ppt_offset_bytes;
uint8_t           341 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 		((uint8_t *)v2_1 + le32_to_cpu(v2_1->pptable_entry_offset));
uint8_t           345 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 			*table = ((uint8_t *)v2_1 + le32_to_cpu(entries[i].ppt_offset_bytes));
uint8_t           364 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	uint8_t frev, crev;
uint8_t           392 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 					      (uint8_t **)&table);
uint8_t           522 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	uint8_t frev, crev;
uint8_t           531 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 				      (uint8_t **)&header);
uint8_t          1219 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static uint16_t convert_to_vddc(uint8_t vid)
uint8_t          1235 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	vdd = (uint32_t)convert_to_vddc((uint8_t)val_vid);
uint8_t           154 drivers/gpu/drm/amd/powerplay/smu_v12_0.c 	uint8_t smu_minor, smu_debug;
uint8_t           109 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				const uint8_t *src, uint32_t byte_count, uint32_t limit)
uint8_t           364 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
uint8_t           386 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c static uint8_t ci_get_sleep_divider_id_from_clock(uint32_t clock,
uint8_t           389 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t i;
uint8_t           579 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t *hi_vid = smu_data->power_tune_table.BapmVddCVidHiSidd;
uint8_t           580 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t *lo_vid = smu_data->power_tune_table.BapmVddCVidLoSidd;
uint8_t           581 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t *hi2_vid = smu_data->power_tune_table.BapmVddCVidHiSidd2;
uint8_t           608 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t *vid = smu_data->power_tune_table.VddCVid;
uint8_t           707 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				(uint8_t *)&smu_data->power_tune_table,
uint8_t           728 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	dpm_table->GpuTjMax = (uint8_t)(data->thermal_temp_setting.temperature_high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES);
uint8_t           855 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			table->VddcLevel[count].Smio = (uint8_t) count;
uint8_t           883 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			table->VddciLevel[count].Smio = (uint8_t) count;
uint8_t           911 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			table->MvddLevel[count].Smio = (uint8_t) count;
uint8_t           975 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			state->VddcOffsetVid = (uint8_t)(
uint8_t          1005 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;
uint8_t          1007 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			(uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1);
uint8_t          1014 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		(uint8_t)dpm_table->pcie_speed_table.count;
uint8_t          1117 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c static uint8_t ci_get_mclk_frequency_ratio(uint32_t memory_clock,
uint8_t          1120 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t mc_para_index;
uint8_t          1128 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			mc_para_index = (uint8_t)((memory_clock - 10000) / 2500);
uint8_t          1135 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			mc_para_index = (uint8_t)((memory_clock - 60000) / 5000);
uint8_t          1141 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c static uint8_t ci_get_ddr3_mclk_frequency_ratio(uint32_t memory_clock)
uint8_t          1143 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t mc_para_index;
uint8_t          1150 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		mc_para_index = (uint8_t)((memory_clock - 10000) / 5000 + 1);
uint8_t          1337 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count;
uint8_t          1342 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		level_array_address, (uint8_t *)levels, (uint32_t)level_array_size,
uint8_t          1409 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
uint8_t          1520 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t count;
uint8_t          1525 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->UvdLevelCount = (uint8_t)(uvd_table->count);
uint8_t          1541 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1548 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1561 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t count;
uint8_t          1566 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->VceLevelCount = (uint8_t)(vce_table->count);
uint8_t          1581 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1593 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t count;
uint8_t          1598 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->AcpLevelCount = (uint8_t)(acp_table->count);
uint8_t          1611 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1643 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	arb_regs->McArbBurstTime = (uint8_t)burstTime;
uint8_t          1674 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				(uint8_t *)&arb_regs,
uint8_t          1740 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	mc_reg_table->last = (uint8_t)i;
uint8_t          1829 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				 (uint8_t *)&smu_data->mc_regs.data[0],
uint8_t          1849 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			(uint8_t *)&smu_data->mc_regs, sizeof(SMU7_Discrete_MCRegisters), SMC_RAM_END);
uint8_t          1856 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t count, level;
uint8_t          1858 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->count);
uint8_t          1868 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_mclk->count);
uint8_t          2056 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->PCIeBootLinkLevel = (uint8_t)data->dpm_table.pcie_speed_table.count;
uint8_t          2103 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					(uint8_t *)&(table->SystemFlags),
uint8_t          2191 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_MULT_THERMAL_CTRL, TEMP_SEL);
uint8_t          2193 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	res = ci_copy_bytes_to_smc(hwmgr, ci_data->fan_table_start, (uint8_t *)&fan_table, (uint32_t)sizeof(fan_table), SMC_RAM_END);
uint8_t          2230 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				(uint8_t *)&low_sclk_interrupt_threshold,
uint8_t          2313 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t *src;
uint8_t          2323 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	src = (uint8_t *)info.kptr;
uint8_t          2440 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c static uint8_t ci_get_memory_modile_index(struct pp_hwmgr *hwmgr)
uint8_t          2442 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));
uint8_t          2554 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t i, j;
uint8_t          2583 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t i, j, k;
uint8_t          2658 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t i, j;
uint8_t          2679 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint8_t module_index = ci_get_memory_modile_index(hwmgr);
uint8_t          2807 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpH, sizeof(uint8_t));
uint8_t          2808 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownH, sizeof(uint8_t));
uint8_t          2842 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t));
uint8_t          2843 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownH, sizeof(uint8_t));
uint8_t            54 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.h 	uint8_t   last;
uint8_t            55 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.h 	uint8_t   num_entries;
uint8_t            76 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c static const uint8_t fiji_clock_stretch_amount_conversion[2][6] = {
uint8_t           246 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t *)&vr_config, sizeof(int32_t), 0x40000),
uint8_t           254 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t *)(&avfs_graphics_level), level_size, 0x40000),
uint8_t           427 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c static void get_scl_sda_value(uint8_t line, uint8_t *scl, uint8_t *sda)
uint8_t           499 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t uc_scl, uc_sda;
uint8_t           513 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	dpm_table->GpuTjMax = (uint8_t)(cac_dtp_table->usTargetOperatingTemp);
uint8_t           621 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t)((temp >> 16) & 0xff);
uint8_t           623 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t)((temp >> 8) & 0xff);
uint8_t           624 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		smu_data->power_tune_table.Reserved = (uint8_t)(temp & 0xff);
uint8_t           747 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t *)&smu_data->power_tune_table,
uint8_t           760 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t index;
uint8_t           809 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
uint8_t           840 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;
uint8_t           841 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width(
uint8_t           844 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->LinkLevel[i].SPC = (uint8_t)(data->pcie_spc_cap & 0xff);
uint8_t           850 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t)dpm_table->pcie_speed_table.count;
uint8_t           933 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
uint8_t          1012 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t pcie_entry_cnt = (uint8_t) data->dpm_table.pcie_speed_table.count;
uint8_t          1021 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t hightest_pcie_level_enabled = 0,
uint8_t          1046 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t)dpm_table->sclk_table.count;
uint8_t          1057 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 					(uint8_t) ((i < max_entry) ? i : max_entry);
uint8_t          1090 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
uint8_t          1110 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c static uint8_t fiji_get_mclk_frequency_ratio(uint32_t mem_clock)
uint8_t          1159 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	mclk->MclkDivider     = (uint8_t)mem_param.mpll_post_divider;
uint8_t          1261 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t)dpm_table->mclk_table.count;
uint8_t          1269 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
uint8_t          1343 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
uint8_t          1426 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t count;
uint8_t          1433 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->VceLevelCount = (uint8_t)(mm_table->count);
uint8_t          1453 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1465 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t count;
uint8_t          1472 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->AcpLevelCount = (uint8_t)(mm_table->count);
uint8_t          1489 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1522 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	arb_regs->McArbBurstTime   = (uint8_t)burstTime;
uint8_t          1523 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	arb_regs->TRRDS            = (uint8_t)trrds;
uint8_t          1524 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	arb_regs->TRRDL            = (uint8_t)trrdl;
uint8_t          1552 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t *)&arb_regs,
uint8_t          1562 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t count;
uint8_t          1569 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->UvdLevelCount = (uint8_t)(mm_table->count);
uint8_t          1588 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1595 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1643 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t count, level;
uint8_t          1645 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	count = (uint8_t)(table_info->vdd_dep_on_sclk->count);
uint8_t          1654 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	count = (uint8_t)(table_info->vdd_dep_on_mclk->count);
uint8_t          1672 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t type, i, j, cks_setting, stretch_amount, stretch_amount2,
uint8_t          1679 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;
uint8_t          1716 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks +
uint8_t          1785 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t) fiji_clock_stretcher_ddt_table[type][i][2];
uint8_t          1788 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t) fiji_clock_stretcher_ddt_table[type][i][3];
uint8_t          1931 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint8_t i;
uint8_t          2112 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t *)&(table->SystemFlags),
uint8_t          2213 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD(
uint8_t          2218 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t *)&fan_table, (uint32_t)sizeof(fan_table),
uint8_t          2285 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t *)&low_sclk_interrupt_threshold,
uint8_t          2378 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t          2410 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t          2599 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t));
uint8_t          2600 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownHyst, sizeof(uint8_t));
uint8_t          2634 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
uint8_t          2635 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t));
uint8_t            32 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h 	uint8_t   SviLoadLineEn;
uint8_t            33 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h 	uint8_t   SviLoadLineVddC;
uint8_t            34 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h 	uint8_t   TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t            35 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h 	uint8_t   TDC_MAWt;
uint8_t            36 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h 	uint8_t   TdcWaterfallCtl;
uint8_t            37 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h 	uint8_t   DTEAmbientTempBase;
uint8_t           158 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					uint32_t length, const uint8_t *src,
uint8_t           222 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				(uint8_t *)info.kptr, ICELAND_SMC_SIZE,
uint8_t           393 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t *hi_vid = smu_data->power_tune_table.BapmVddCVidHiSidd;
uint8_t           394 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t *lo_vid = smu_data->power_tune_table.BapmVddCVidLoSidd;
uint8_t           419 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t *vid = smu_data->power_tune_table.VddCVid;
uint8_t           497 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				(uint8_t *)&smu_data->power_tune_table,
uint8_t           744 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			state->VddcOffsetVid = (uint8_t)(
uint8_t           774 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;
uint8_t           776 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			(uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1);
uint8_t           780 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			(uint8_t)(data->pcie_spc_cap & 0xff);
uint8_t           788 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		(uint8_t)dpm_table->pcie_speed_table.count;
uint8_t           868 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
uint8_t           973 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t highest_pcie_level_enabled = 0;
uint8_t           974 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t lowest_pcie_level_enabled = 0, mid_pcie_level_enabled = 0;
uint8_t           975 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t count = 0;
uint8_t          1001 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		(uint8_t)dpm_table->sclk_table.count;
uint8_t          1038 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				(uint8_t *)levels, (uint32_t)level_array_size,
uint8_t          1169 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c static uint8_t iceland_get_mclk_frequency_ratio(uint32_t memory_clock,
uint8_t          1172 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t mc_para_index;
uint8_t          1180 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			mc_para_index = (uint8_t)((memory_clock - 10000) / 2500);
uint8_t          1188 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			mc_para_index = (uint8_t)((memory_clock - 60000) / 5000);
uint8_t          1195 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c static uint8_t iceland_get_ddr3_mclk_frequency_ratio(uint32_t memory_clock)
uint8_t          1197 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t mc_para_index;
uint8_t          1204 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		mc_para_index = (uint8_t)((memory_clock - 10000) / 5000 + 1);
uint8_t          1382 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count;
uint8_t          1389 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		level_array_adress, (uint8_t *)levels, (uint32_t)level_array_size,
uint8_t          1457 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
uint8_t          1606 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	arb_regs->McArbBurstTime = (uint8_t)burstTime;
uint8_t          1638 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				(uint8_t *)&arb_regs,
uint8_t          1707 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	mc_reg_table->last = (uint8_t)i;
uint8_t          1797 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				 (uint8_t *)&smu_data->mc_regs.data[0],
uint8_t          1817 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			(uint8_t *)&smu_data->mc_regs, sizeof(SMU71_Discrete_MCRegisters), SMC_RAM_END);
uint8_t          1824 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t count, level;
uint8_t          1826 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->count);
uint8_t          1836 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_mclk->count);
uint8_t          1872 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	dpm_table->GpuTjMax = (uint8_t)(data->thermal_temp_setting.temperature_high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES);
uint8_t          2059 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 										(uint8_t *)&(table->SystemFlags),
uint8_t          2069 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			(uint8_t *)&(smu_data->ulv_setting),
uint8_t          2153 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_MULT_THERMAL_CTRL, TEMP_SEL);
uint8_t          2157 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	res = smu7_copy_bytes_to_smc(hwmgr, smu7_data->fan_table_start, (uint8_t *)&fan_table, (uint32_t)sizeof(fan_table), SMC_RAM_END);
uint8_t          2195 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				(uint8_t *)&low_sclk_interrupt_threshold,
uint8_t          2369 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c static uint8_t iceland_get_memory_modile_index(struct pp_hwmgr *hwmgr)
uint8_t          2371 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));
uint8_t          2483 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t i, j;
uint8_t          2512 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t i, j, k;
uint8_t          2588 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t i, j;
uint8_t          2608 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint8_t module_index = iceland_get_memory_modile_index(hwmgr);
uint8_t            35 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   svi_load_line_en;
uint8_t            36 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   svi_load_line_vddc;
uint8_t            37 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   tdc_vddc_throttle_release_limit_perc;
uint8_t            38 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   tdc_mawt;
uint8_t            39 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   tdc_waterfall_ctl;
uint8_t            40 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   dte_ambient_temp_base;
uint8_t            53 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   last;               /* number of registers*/
uint8_t            54 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	uint8_t   num_entries;        /* number of entries in mc_reg_table_entry used*/
uint8_t           142 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t *)&vr_config, sizeof(uint32_t), 0x40000),
uint8_t           149 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t *)(&avfs_graphics_level_polaris10),
uint8_t           157 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t *)(&avfs_memory_level_polaris10), sizeof(avfs_memory_level_polaris10), 0x40000),
uint8_t           166 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t *)(&u16_boot_mvdd), sizeof(u16_boot_mvdd), 0x40000),
uint8_t           298 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE));
uint8_t           299 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL));
uint8_t           519 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t)((temp >> 16) & 0xff);
uint8_t           521 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t)((temp >> 8) & 0xff);
uint8_t           522 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		smu_data->power_tune_table.Reserved = (uint8_t)(temp & 0xff);
uint8_t           637 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t *)&smu_data->power_tune_table,
uint8_t           661 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t) level;
uint8_t           687 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			table->SmioTable1.Pattern[level].Smio = (uint8_t) level;
uint8_t           702 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t index;
uint8_t           745 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
uint8_t           778 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;
uint8_t           779 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width(
uint8_t           782 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->LinkLevel[i].SPC = (uint8_t)(data->pcie_spc_cap & 0xff);
uint8_t           788 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t)dpm_table->pcie_speed_table.count;
uint8_t           849 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t i;
uint8_t           954 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		level->UpHyst = (uint8_t)data->up_hyst;
uint8_t           956 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		level->DownHyst = (uint8_t)data->down_hyst;
uint8_t           985 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t pcie_entry_cnt = (uint8_t) hw_data->dpm_table.pcie_speed_table.count;
uint8_t           994 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t hightest_pcie_level_enabled = 0,
uint8_t          1019 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t)dpm_table->sclk_table.count;
uint8_t          1031 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					(uint8_t) ((i < max_entry) ? i : max_entry);
uint8_t          1064 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
uint8_t          1163 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t)dpm_table->mclk_table.count;
uint8_t          1168 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
uint8_t          1290 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t count;
uint8_t          1299 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	table->VceLevelCount = (uint8_t)(mm_table->count);
uint8_t          1328 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1357 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	arb_regs->McArbBurstTime   = (uint8_t)burst_time;
uint8_t          1386 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t *)&arb_regs,
uint8_t          1396 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t count;
uint8_t          1405 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	table->UvdLevelCount = (uint8_t)(mm_table->count);
uint8_t          1432 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1439 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1487 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t count, level;
uint8_t          1489 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	count = (uint8_t)(table_info->vdd_dep_on_sclk->count);
uint8_t          1499 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	count = (uint8_t)(table_info->vdd_dep_on_mclk->count);
uint8_t          1516 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t i, stretch_amount, volt_offset = 0;
uint8_t          1522 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;
uint8_t          1572 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks +
uint8_t          1744 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			AVFS_meanNsigma.Static_Voltage_Offset[i] = (uint8_t)(sclk_table->entries[i].cks_voffset * 100 / 625);
uint8_t          1754 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					(uint8_t *)&AVFS_meanNsigma,
uint8_t          1763 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					(uint8_t *)&AVFS_SclkOffset,
uint8_t          1829 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint8_t i;
uint8_t          2016 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t *)&(table->SystemFlags),
uint8_t          2148 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD(
uint8_t          2153 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t *)&fan_table, (uint32_t)sizeof(fan_table),
uint8_t          2187 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t          2219 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t          2296 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(uint8_t *)&low_sclk_interrupt_threshold,
uint8_t          2512 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t));
uint8_t          2513 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownHyst, sizeof(uint8_t));
uint8_t          2547 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
uint8_t          2548 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t));
uint8_t            36 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	uint8_t   SviLoadLineEn;
uint8_t            37 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	uint8_t   SviLoadLineVddC;
uint8_t            38 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	uint8_t   TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t            39 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	uint8_t   TDC_MAWt;
uint8_t            40 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	uint8_t   TdcWaterfallCtl;
uint8_t            41 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	uint8_t   DTEAmbientTempBase;
uint8_t            56 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	uint8_t protected_mode;
uint8_t           117 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c 		uint8_t *table, int16_t table_id)
uint8_t           142 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c 	memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,
uint8_t           149 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c 		uint8_t *table, int16_t table_id)
uint8_t           286 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c static int smu10_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
uint8_t            53 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	uint8_t *dest_byte;
uint8_t            54 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	uint8_t i, data_byte[4] = {0};
uint8_t            76 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 		dest_byte = (uint8_t *)dest;
uint8_t            86 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 				const uint8_t *src, uint32_t byte_count, uint32_t limit)
uint8_t            50 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h 	uint8_t                              security_hard_key;
uint8_t            59 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h 			const uint8_t *src, uint32_t byte_count, uint32_t limit);
uint8_t           219 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c static uint8_t smu8_translate_firmware_enum_to_arg(struct pp_hwmgr *hwmgr,
uint8_t           222 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c 	uint8_t ret = 0;
uint8_t           331 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c 			uint8_t type, bool is_last)
uint8_t           333 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c 	uint8_t i;
uint8_t           370 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c 	uint8_t i;
uint8_t           414 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c 		toc->JobList[i] = (uint8_t)IGNORE_JOB;
uint8_t           424 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c 	toc->JobList[JOB_GFX_SAVE] = (uint8_t)smu8_smu->toc_entry_used_count;
uint8_t           442 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c 	toc->JobList[JOB_GFX_RESTORE] = (uint8_t)smu8_smu->toc_entry_used_count;
uint8_t            80 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.h 	uint8_t driver_buffer_length;
uint8_t            81 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.h 	uint8_t scratch_buffer_length;
uint8_t           213 drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
uint8_t            92 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c static const uint8_t tonga_clock_stretch_amount_conversion[2][6] = {
uint8_t           352 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t) count;
uint8_t           379 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t) count;
uint8_t           395 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t index = 0;
uint8_t           489 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
uint8_t           517 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;
uint8_t           519 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			(uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1);
uint8_t           523 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			(uint8_t)(data->pcie_spc_cap & 0xff);
uint8_t           531 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		(uint8_t)dpm_table->pcie_speed_table.count;
uint8_t           611 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
uint8_t           693 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t pcie_entry_count = (uint8_t) data->dpm_table.pcie_speed_table.count;
uint8_t           703 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t highest_pcie_level_enabled = 0;
uint8_t           704 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t lowest_pcie_level_enabled = 0, mid_pcie_level_enabled = 0;
uint8_t           705 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t count = 0;
uint8_t           731 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		(uint8_t)dpm_table->sclk_table.count;
uint8_t           742 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t) ((i < max_entry) ? i : max_entry);
uint8_t           781 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t *)levels, (uint32_t)level_array_size,
uint8_t           920 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c static uint8_t tonga_get_mclk_frequency_ratio(uint32_t memory_clock,
uint8_t           923 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t mc_para_index;
uint8_t           931 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			mc_para_index = (uint8_t)((memory_clock - 10000) / 2500);
uint8_t           938 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			mc_para_index = (uint8_t)((memory_clock - 60000) / 5000);
uint8_t           944 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c static uint8_t tonga_get_ddr3_mclk_frequency_ratio(uint32_t memory_clock)
uint8_t           946 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t mc_para_index;
uint8_t           953 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		mc_para_index = (uint8_t)((memory_clock - 10000) / 5000 + 1);
uint8_t          1130 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count;
uint8_t          1137 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		level_array_address, (uint8_t *)levels, (uint32_t)level_array_size,
uint8_t          1206 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
uint8_t          1312 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t count;
uint8_t          1320 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->UvdLevelCount = (uint8_t) (mm_table->count);
uint8_t          1348 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1357 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					(uint8_t)dividers.pll_post_divider;
uint8_t          1372 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t count;
uint8_t          1380 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->VceLevelCount = (uint8_t) (mm_table->count);
uint8_t          1405 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1417 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t count;
uint8_t          1425 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->AcpLevelCount = (uint8_t) (mm_table->count);
uint8_t          1449 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1481 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	arb_regs->McArbBurstTime = (uint8_t)burstTime;
uint8_t          1513 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t *)&arb_regs,
uint8_t          1580 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t type, i, j, cks_setting, stretch_amount, stretch_amount2,
uint8_t          1589 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;
uint8_t          1639 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks +
uint8_t          1708 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t) tonga_clock_stretcher_ddt_table[type][i][2];
uint8_t          1711 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t) tonga_clock_stretcher_ddt_table[type][i][3];
uint8_t          1847 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	dpm_table->GpuTjMax = (uint8_t)(cac_dtp_table->usTargetOperatingTemp);
uint8_t          2054 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t *)&smu_data->power_tune_table,
uint8_t          2085 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	mc_reg_table->last = (uint8_t)i;
uint8_t          2178 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			(uint8_t *)&smu_data->mc_regs.data[0],
uint8_t          2201 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			(uint8_t *)&smu_data->mc_regs, sizeof(SMU72_Discrete_MCRegisters), SMC_RAM_END);
uint8_t          2230 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t i;
uint8_t          2350 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->PCIeBootLinkLevel = (uint8_t) (data->dpm_table.pcie_speed_table.count);
uint8_t          2438 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			(uint8_t *)&(table->SystemFlags),
uint8_t          2538 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_MULT_THERMAL_CTRL, TEMP_SEL);
uint8_t          2544 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					(uint8_t *)&fan_table,
uint8_t          2585 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t *)&low_sclk_interrupt_threshold,
uint8_t          2686 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t          2719 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t          2830 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c static uint8_t tonga_get_memory_modile_index(struct pp_hwmgr *hwmgr)
uint8_t          2832 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));
uint8_t          2946 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t i, j;
uint8_t          2975 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t i, j, k;
uint8_t          3050 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t i, j;
uint8_t          3071 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint8_t module_index = tonga_get_memory_modile_index(hwmgr);
uint8_t          3195 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t));
uint8_t          3196 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownHyst, sizeof(uint8_t));
uint8_t          3230 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t));
uint8_t          3231 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t));
uint8_t            37 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   svi_load_line_en;
uint8_t            38 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   svi_load_line_vddC;
uint8_t            39 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   tdc_vddc_throttle_release_limit_perc;
uint8_t            40 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   tdc_mawt;
uint8_t            41 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   tdc_waterfall_ctl;
uint8_t            42 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   dte_ambient_temp_base;
uint8_t            55 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   last;               /* number of registers*/
uint8_t            56 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	uint8_t   num_entries;        /* number of entries in mc_reg_table_entry used*/
uint8_t            39 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c 		uint8_t *table, int16_t table_id)
uint8_t            70 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c 		uint8_t *table, int16_t table_id)
uint8_t           341 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c static int vega10_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table,
uint8_t            41 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c 				      uint8_t *table, int16_t table_id)
uint8_t            83 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c 				    uint8_t *table, int16_t table_id)
uint8_t           379 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c static int vega12_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table,
uint8_t           162 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c 				      uint8_t *table, int16_t table_id)
uint8_t           206 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c 				    uint8_t *table, int16_t table_id)
uint8_t           241 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c 		uint8_t *table, uint16_t workload_type)
uint8_t           269 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c 		uint8_t *table, uint16_t workload_type)
uint8_t           589 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c static int vega20_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table,
uint8_t            55 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.h 		uint8_t *table, uint16_t workload_type);
uint8_t            57 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.h 		uint8_t *table, uint16_t workload_type);
uint8_t           199 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		smu_data->protected_mode = (uint8_t)(PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
uint8_t           201 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		smu_data->smu7_data.security_hard_key = (uint8_t)(PHM_READ_VFPF_INDIRECT_FIELD(
uint8_t           341 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t           373 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			(uint8_t) (table_info->mm_dep_table->count - 1);
uint8_t           462 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(uint8_t) level;
uint8_t           488 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			table->SmioTable1.Pattern[level].Smio = (uint8_t) level;
uint8_t           503 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t index;
uint8_t           549 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
uint8_t           580 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;
uint8_t           581 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width(
uint8_t           584 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->LinkLevel[i].SPC = (uint8_t)(data->pcie_spc_cap & 0xff);
uint8_t           590 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			(uint8_t)dpm_table->pcie_speed_table.count;
uint8_t           724 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t i;
uint8_t           787 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c static uint8_t vegam_get_sleep_divider_id_from_clock(uint32_t clock,
uint8_t           790 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t i;
uint8_t           869 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t pcie_entry_cnt = (uint8_t) hw_data->dpm_table.pcie_speed_table.count;
uint8_t           878 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t hightest_pcie_level_enabled = 0,
uint8_t           893 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		levels[i].UpHyst = (uint8_t)
uint8_t           895 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		levels[i].DownHyst = (uint8_t)
uint8_t           906 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			(uint8_t)dpm_table->sclk_table.count;
uint8_t           921 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					(uint8_t) ((i < max_entry) ? i : max_entry);
uint8_t           954 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
uint8_t           973 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	mem_level->Postdiv = (uint8_t)mpll_param.ulPostDiv;
uint8_t          1057 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		levels[i].UpHyst = (uint8_t)
uint8_t          1059 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		levels[i].DownHyst = (uint8_t)
uint8_t          1064 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			(uint8_t)dpm_table->mclk_table.count;
uint8_t          1076 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,
uint8_t          1207 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t count;
uint8_t          1216 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	table->VceLevelCount = (uint8_t)(mm_table->count);
uint8_t          1245 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
uint8_t          1310 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			(uint8_t *)&arb_regs,
uint8_t          1320 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t count;
uint8_t          1329 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	table->UvdLevelCount = (uint8_t)(mm_table->count);
uint8_t          1356 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1363 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
uint8_t          1411 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t count, level;
uint8_t          1413 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	count = (uint8_t)(table_info->vdd_dep_on_sclk->count);
uint8_t          1423 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	count = (uint8_t)(table_info->vdd_dep_on_mclk->count);
uint8_t          1496 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t i, stretch_amount, stretch_amount2, volt_offset = 0;
uint8_t          1503 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;
uint8_t          1525 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks +
uint8_t          1637 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					(uint8_t)(sclk_table->entries[i].cks_voffset * 100 / 625);
uint8_t          1649 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					(uint8_t *)&AVFS_meanNsigma,
uint8_t          1659 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					(uint8_t *)&AVFS_SclkOffset,
uint8_t          1784 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(uint8_t)((temp >> 16) & 0xff);
uint8_t          1786 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(uint8_t)((temp >> 8) & 0xff);
uint8_t          1787 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		smu_data->power_tune_table.Reserved = (uint8_t)(temp & 0xff);
uint8_t          1902 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(uint8_t *)&smu_data->power_tune_table,
uint8_t          1932 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint8_t i;
uint8_t          2142 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			(uint8_t *)&(table->SystemFlags),
uint8_t          2239 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(uint8_t *)&low_sclk_interrupt_threshold,
uint8_t            45 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h 	uint8_t   SviLoadLineEn;
uint8_t            46 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h 	uint8_t   SviLoadLineVddC;
uint8_t            47 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h 	uint8_t   TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t            48 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h 	uint8_t   TDC_MAWt;
uint8_t            49 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h 	uint8_t   TdcWaterfallCtl;
uint8_t            50 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h 	uint8_t   DTEAmbientTempBase;
uint8_t            65 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h 	uint8_t protected_mode;
uint8_t           400 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 		od_feature_array_size = sizeof(uint8_t) * od_feature_count;
uint8_t           483 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 				      (uint8_t **)&smc_dpm_table);
uint8_t          3092 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 		table->WatermarkRow[1][i].WmSetting = (uint8_t)
uint8_t          3113 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 		table->WatermarkRow[0][i].WmSetting = (uint8_t)
uint8_t           104 drivers/gpu/drm/amd/powerplay/vega20_ppt.h         uint8_t  pcie_gen[MAX_PCIE_CONF];
uint8_t           105 drivers/gpu/drm/amd/powerplay/vega20_ppt.h         uint8_t  pcie_lane[MAX_PCIE_CONF];
uint8_t           169 drivers/gpu/drm/amd/powerplay/vega20_ppt.h 	uint8_t				*od_feature_capabilities;
uint8_t            25 drivers/gpu/drm/armada/armada_fb.c 	uint8_t format, config;
uint8_t            10 drivers/gpu/drm/armada/armada_fb.h 	uint8_t			fmt;
uint8_t            11 drivers/gpu/drm/armada/armada_fb.h 	uint8_t			mod;
uint8_t           175 drivers/gpu/drm/ast/ast_drv.h 				     uint32_t base, uint8_t index,
uint8_t           176 drivers/gpu/drm/ast/ast_drv.h 				     uint8_t val)
uint8_t           182 drivers/gpu/drm/ast/ast_drv.h 			    uint32_t base, uint8_t index,
uint8_t           183 drivers/gpu/drm/ast/ast_drv.h 			    uint8_t mask, uint8_t val);
uint8_t           184 drivers/gpu/drm/ast/ast_drv.h uint8_t ast_get_index_reg(struct ast_private *ast,
uint8_t           185 drivers/gpu/drm/ast/ast_drv.h 			  uint32_t base, uint8_t index);
uint8_t           186 drivers/gpu/drm/ast/ast_drv.h uint8_t ast_get_index_reg_mask(struct ast_private *ast,
uint8_t           187 drivers/gpu/drm/ast/ast_drv.h 			       uint32_t base, uint8_t index, uint8_t mask);
uint8_t            41 drivers/gpu/drm/ast/ast_main.c 			    uint32_t base, uint8_t index,
uint8_t            42 drivers/gpu/drm/ast/ast_main.c 			    uint8_t mask, uint8_t val)
uint8_t            50 drivers/gpu/drm/ast/ast_main.c uint8_t ast_get_index_reg(struct ast_private *ast,
uint8_t            51 drivers/gpu/drm/ast/ast_main.c 			  uint32_t base, uint8_t index)
uint8_t            53 drivers/gpu/drm/ast/ast_main.c 	uint8_t ret;
uint8_t            59 drivers/gpu/drm/ast/ast_main.c uint8_t ast_get_index_reg_mask(struct ast_private *ast,
uint8_t            60 drivers/gpu/drm/ast/ast_main.c 			       uint32_t base, uint8_t index, uint8_t mask)
uint8_t            62 drivers/gpu/drm/ast/ast_main.c 	uint8_t ret;
uint8_t           345 drivers/gpu/drm/bridge/adv7511/adv7511.h 	uint8_t edid_buf[256];
uint8_t            42 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c static const uint8_t adv7511_register_defaults[] = {
uint8_t           210 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c 	uint8_t infoframe[17];
uint8_t           526 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c 	uint8_t offset;
uint8_t           683 drivers/gpu/drm/bridge/sii902x.c 				 uint8_t *buf, size_t len)
uint8_t           125 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c static int dw_hdmi_i2s_get_eld(struct device *dev, void *data, uint8_t *buf,
uint8_t            47 drivers/gpu/drm/drm_cache.c 	uint8_t *page_virtual;
uint8_t           158 drivers/gpu/drm/drm_dp_aux_dev.c 		uint8_t buf[DP_AUX_MAX_PAYLOAD_BYTES];
uint8_t           205 drivers/gpu/drm/drm_dp_aux_dev.c 		uint8_t buf[DP_AUX_MAX_PAYLOAD_BYTES];
uint8_t           147 drivers/gpu/drm/drm_dp_dual_mode_helper.c static bool is_type1_adaptor(uint8_t adaptor_id)
uint8_t           152 drivers/gpu/drm/drm_dp_dual_mode_helper.c static bool is_type2_adaptor(uint8_t adaptor_id)
uint8_t           159 drivers/gpu/drm/drm_dp_dual_mode_helper.c 			      const uint8_t adaptor_id)
uint8_t           184 drivers/gpu/drm/drm_dp_dual_mode_helper.c 	uint8_t adaptor_id = 0x00;
uint8_t           269 drivers/gpu/drm/drm_dp_dual_mode_helper.c 	uint8_t max_tmds_clock;
uint8_t           314 drivers/gpu/drm/drm_dp_dual_mode_helper.c 	uint8_t tmds_oen;
uint8_t           353 drivers/gpu/drm/drm_dp_dual_mode_helper.c 	uint8_t tmds_oen = enable ? 0 : DP_DUAL_MODE_TMDS_DISABLE;
uint8_t           365 drivers/gpu/drm/drm_dp_dual_mode_helper.c 		uint8_t tmp;
uint8_t           574 drivers/gpu/drm/drm_dp_helper.c 	uint8_t rev[2];
uint8_t           135 drivers/gpu/drm/drm_dp_mst_topology.c static u8 drm_dp_msg_header_crc4(const uint8_t *data, size_t num_nibbles)
uint8_t           169 drivers/gpu/drm/drm_dp_mst_topology.c static u8 drm_dp_msg_data_crc4(const uint8_t *data, u8 number_of_bytes)
uint8_t          1803 drivers/gpu/drm/drm_dp_mst_topology.c 	uint8_t *guid)
uint8_t          1827 drivers/gpu/drm/drm_dp_mst_topology.c 				     uint8_t *guid)
uint8_t          3951 drivers/gpu/drm/drm_edid.c static uint8_t eotf_supported(const u8 *edid_ext)
uint8_t          3960 drivers/gpu/drm/drm_edid.c static uint8_t hdr_metadata_type(const u8 *edid_ext)
uint8_t          4086 drivers/gpu/drm/drm_edid.c 	uint8_t *eld = connector->eld;
uint8_t           139 drivers/gpu/drm/etnaviv/etnaviv_cmd_parser.c static uint8_t cmd_length[32] = {
uint8_t          1623 drivers/gpu/drm/exynos/exynos_hdmi.c static int hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf,
uint8_t            53 drivers/gpu/drm/gma500/cdv_intel_dp.c 		       int mode, uint8_t write_byte,
uint8_t            54 drivers/gpu/drm/gma500/cdv_intel_dp.c 		       uint8_t *read_byte);
uint8_t            60 drivers/gpu/drm/gma500/cdv_intel_dp.c 			    uint8_t write_byte, uint8_t *read_byte)
uint8_t           260 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
uint8_t           264 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t link_bw;
uint8_t           265 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t lane_count;
uint8_t           266 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t dpcd[4];
uint8_t           270 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t	train_set[4];
uint8_t           271 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t link_status[DP_LINK_STATUS_SIZE];
uint8_t           359 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_dp_link_clock(uint8_t link_bw)
uint8_t           546 drivers/gpu/drm/gma500/cdv_intel_dp.c pack_aux(uint8_t *src, int src_bytes)
uint8_t           559 drivers/gpu/drm/gma500/cdv_intel_dp.c unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes)
uint8_t           570 drivers/gpu/drm/gma500/cdv_intel_dp.c 		uint8_t *send, int send_bytes,
uint8_t           571 drivers/gpu/drm/gma500/cdv_intel_dp.c 		uint8_t *recv, int recv_size)
uint8_t           672 drivers/gpu/drm/gma500/cdv_intel_dp.c 			  uint16_t address, uint8_t *send, int send_bytes)
uint8_t           675 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t	msg[20];
uint8_t           677 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t	ack;
uint8_t           705 drivers/gpu/drm/gma500/cdv_intel_dp.c 			    uint16_t address, uint8_t byte)
uint8_t           713 drivers/gpu/drm/gma500/cdv_intel_dp.c 			 uint16_t address, uint8_t *recv, int recv_bytes)
uint8_t           715 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t msg[4];
uint8_t           717 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t reply[20];
uint8_t           719 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t ack;
uint8_t           751 drivers/gpu/drm/gma500/cdv_intel_dp.c 		    uint8_t write_byte, uint8_t *read_byte)
uint8_t           759 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t msg[5];
uint8_t           760 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t reply[2];
uint8_t          1208 drivers/gpu/drm/gma500/cdv_intel_dp.c 			       uint8_t *recv, int recv_bytes)
uint8_t          1241 drivers/gpu/drm/gma500/cdv_intel_dp.c static uint8_t
uint8_t          1242 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
uint8_t          1248 drivers/gpu/drm/gma500/cdv_intel_dp.c static uint8_t
uint8_t          1249 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE],
uint8_t          1256 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t l = cdv_intel_dp_link_status(link_status, i);
uint8_t          1261 drivers/gpu/drm/gma500/cdv_intel_dp.c static uint8_t
uint8_t          1262 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE],
uint8_t          1269 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t l = cdv_intel_dp_link_status(link_status, i);
uint8_t          1309 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t v = 0;
uint8_t          1310 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t p = 0;
uint8_t          1314 drivers/gpu/drm/gma500/cdv_intel_dp.c 		uint8_t this_v = cdv_intel_get_adjust_request_voltage(intel_dp->link_status, lane);
uint8_t          1315 drivers/gpu/drm/gma500/cdv_intel_dp.c 		uint8_t this_p = cdv_intel_get_adjust_request_pre_emphasis(intel_dp->link_status, lane);
uint8_t          1334 drivers/gpu/drm/gma500/cdv_intel_dp.c static uint8_t
uint8_t          1335 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
uint8_t          1340 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t l = cdv_intel_dp_link_status(link_status, i);
uint8_t          1347 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
uint8_t          1350 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t lane_status;
uint8_t          1368 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t lane_align;
uint8_t          1369 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t lane_status;
uint8_t          1387 drivers/gpu/drm/gma500/cdv_intel_dp.c 			uint8_t dp_train_pat)
uint8_t          1413 drivers/gpu/drm/gma500/cdv_intel_dp.c 			uint8_t dp_train_pat)
uint8_t          1433 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_dp_set_vswing_premph(struct gma_encoder *encoder, uint8_t signal_level)
uint8_t          1504 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint8_t voltage;
uint8_t            50 drivers/gpu/drm/gma500/intel_bios.c 	uint8_t	panel_type;
uint8_t           105 drivers/gpu/drm/gma500/mid_bios.c 	dev_priv->platform_rev_id = (uint8_t) platform_rev_id;
uint8_t           275 drivers/gpu/drm/gma500/mmu.c 	uint8_t *clf;
uint8_t           291 drivers/gpu/drm/gma500/mmu.c 	clf = (uint8_t *) v;
uint8_t           461 drivers/gpu/drm/gma500/psb_drv.h 	uint8_t __iomem *sgx_reg;
uint8_t           462 drivers/gpu/drm/gma500/psb_drv.h 	uint8_t __iomem *vdc_reg;
uint8_t           463 drivers/gpu/drm/gma500/psb_drv.h 	uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */
uint8_t           494 drivers/gpu/drm/gma500/psb_drv.h 	uint8_t platform_rev_id;
uint8_t           498 drivers/gpu/drm/gma500/psb_drv.h 	uint8_t __iomem *gmbus_reg;
uint8_t           609 drivers/gpu/drm/gma500/psb_drv.h 	uint8_t panel_type;
uint8_t           133 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t ddc_bus;
uint8_t           821 drivers/gpu/drm/gma500/psb_intel_sdvo.c 				  uint8_t mode)
uint8_t           827 drivers/gpu/drm/gma500/psb_intel_sdvo.c 				       uint8_t mode)
uint8_t           836 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t set_buf_index[2];
uint8_t           837 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t av_split;
uint8_t           838 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t buf_size;
uint8_t           839 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t buf[48];
uint8_t           840 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t *pos;
uint8_t           873 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
uint8_t           874 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t set_buf_index[2] = { 1, 0 };
uint8_t          1673 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	uint8_t cmd;
uint8_t           121 drivers/gpu/drm/i2c/ch7006_drv.c 	uint8_t *regs = state->regs;
uint8_t           391 drivers/gpu/drm/i2c/ch7006_drv.c 	uint8_t addr = CH7006_VERSION_ID;
uint8_t           392 drivers/gpu/drm/i2c/ch7006_drv.c 	uint8_t val;
uint8_t           204 drivers/gpu/drm/i2c/ch7006_mode.c 	uint8_t *regs = priv->state.regs;
uint8_t           259 drivers/gpu/drm/i2c/ch7006_mode.c 	uint8_t *regs = priv->state.regs;
uint8_t           296 drivers/gpu/drm/i2c/ch7006_mode.c 	uint8_t *power = &priv->state.regs[CH7006_POWER];
uint8_t           334 drivers/gpu/drm/i2c/ch7006_mode.c 	uint8_t *regs = state->regs;
uint8_t           369 drivers/gpu/drm/i2c/ch7006_mode.c void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val)
uint8_t           371 drivers/gpu/drm/i2c/ch7006_mode.c 	uint8_t buf[] = {addr, val};
uint8_t           380 drivers/gpu/drm/i2c/ch7006_mode.c uint8_t ch7006_read(struct i2c_client *client, uint8_t addr)
uint8_t           382 drivers/gpu/drm/i2c/ch7006_mode.c 	uint8_t val;
uint8_t            76 drivers/gpu/drm/i2c/ch7006_priv.h 	uint8_t regs[0x26];
uint8_t           122 drivers/gpu/drm/i2c/ch7006_priv.h void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val);
uint8_t           123 drivers/gpu/drm/i2c/ch7006_priv.h uint8_t ch7006_read(struct i2c_client *client, uint8_t addr);
uint8_t            39 drivers/gpu/drm/i2c/sil164_drv.c 	uint8_t saved_state[0x10];
uint8_t            40 drivers/gpu/drm/i2c/sil164_drv.c 	uint8_t saved_slave_state[0x10];
uint8_t           106 drivers/gpu/drm/i2c/sil164_drv.c sil164_write(struct i2c_client *client, uint8_t addr, uint8_t val)
uint8_t           108 drivers/gpu/drm/i2c/sil164_drv.c 	uint8_t buf[] = {addr, val};
uint8_t           117 drivers/gpu/drm/i2c/sil164_drv.c static uint8_t
uint8_t           118 drivers/gpu/drm/i2c/sil164_drv.c sil164_read(struct i2c_client *client, uint8_t addr)
uint8_t           120 drivers/gpu/drm/i2c/sil164_drv.c 	uint8_t val;
uint8_t           140 drivers/gpu/drm/i2c/sil164_drv.c sil164_save_state(struct i2c_client *client, uint8_t *state)
uint8_t           149 drivers/gpu/drm/i2c/sil164_drv.c sil164_restore_state(struct i2c_client *client, uint8_t *state)
uint8_t           160 drivers/gpu/drm/i2c/sil164_drv.c 	uint8_t control0 = sil164_read(client, SIL164_CONTROL0);
uint8_t          1147 drivers/gpu/drm/i2c/tda998x_drv.c 				 uint8_t *buf, size_t len)
uint8_t          1639 drivers/gpu/drm/mediatek/mtk_hdmi.c static int mtk_hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, size_t len)
uint8_t           111 drivers/gpu/drm/meson/meson_overlay.c static const uint8_t skip_tab[6] = {
uint8_t           186 drivers/gpu/drm/msm/adreno/adreno_device.c static inline bool _rev_match(uint8_t entry, uint8_t id)
uint8_t            57 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	uint8_t  core;
uint8_t            58 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	uint8_t  major;
uint8_t            59 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	uint8_t  minor;
uint8_t            60 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	uint8_t  patchid;
uint8_t           274 drivers/gpu/drm/msm/adreno/adreno_gpu.h OUT_PKT3(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
uint8_t           303 drivers/gpu/drm/msm/adreno/adreno_gpu.h OUT_PKT7(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
uint8_t           101 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	uint8_t enable_pxl_ext;
uint8_t            64 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h 	uint8_t reserved[MAX_CLIENTS];	/* # of MMBs allocated per client */
uint8_t           100 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h 	uint8_t premultiplied;
uint8_t           101 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h 	uint8_t zpos;
uint8_t           102 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h 	uint8_t alpha;
uint8_t           118 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 	SET_PROPERTY(zpos, ZPOS, uint8_t);
uint8_t           146 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 	GET_PROPERTY(zpos, ZPOS, uint8_t);
uint8_t            18 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c 	uint8_t reserved[MAX_CLIENTS]; /* fixed MMBs allocation per client */
uint8_t            68 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c 	uint8_t reserved;
uint8_t            79 drivers/gpu/drm/msm/disp/mdp_kms.h 	uint8_t unpack[4];
uint8_t            81 drivers/gpu/drm/msm/disp/mdp_kms.h 	uint8_t cpp, unpack_count;
uint8_t           116 drivers/gpu/drm/msm/hdmi/hdmi_audio.c 		uint8_t buf[14];
uint8_t            45 drivers/gpu/drm/msm/msm_gem.h 	uint8_t madv;
uint8_t            50 drivers/gpu/drm/msm/msm_gem.h 	uint8_t vmap_count;
uint8_t           685 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	uint8_t saved_cr21 = nv04_display(dev)->saved_reg.crtc_reg[head].CRTC[NV_CIO_CRE_21];
uint8_t           731 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		uint8_t tmp = NVReadVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RCR);
uint8_t           766 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	struct rgb { uint8_t r, g, b; } __attribute__((packed)) *rgbs;
uint8_t           137 drivers/gpu/drm/nouveau/dispnv04/dac.c 	uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode;
uint8_t           138 drivers/gpu/drm/nouveau/dispnv04/dac.c 	uint8_t saved_palette0[3], saved_palette_mask;
uint8_t           141 drivers/gpu/drm/nouveau/dispnv04/dac.c 	uint8_t blue;
uint8_t            79 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	uint8_t tmds04 = 0x80;
uint8_t           251 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	uint8_t *cr_lcd = &crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX];
uint8_t           252 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	uint8_t *cr_lcd_oth = &crtcstate[head ^ 1].CRTC[NV_CIO_CRE_LCD__INDEX];
uint8_t            21 drivers/gpu/drm/nouveau/dispnv04/disp.h 	uint8_t CRTC[0xa0];
uint8_t            22 drivers/gpu/drm/nouveau/dispnv04/disp.h 	uint8_t CR58[0x10];
uint8_t            23 drivers/gpu/drm/nouveau/dispnv04/disp.h 	uint8_t Sequencer[5];
uint8_t            24 drivers/gpu/drm/nouveau/dispnv04/disp.h 	uint8_t Graphics[9];
uint8_t            25 drivers/gpu/drm/nouveau/dispnv04/disp.h 	uint8_t Attribute[21];
uint8_t            38 drivers/gpu/drm/nouveau/dispnv04/hw.c NVWriteVgaSeq(struct drm_device *dev, int head, uint8_t index, uint8_t value)
uint8_t            44 drivers/gpu/drm/nouveau/dispnv04/hw.c uint8_t
uint8_t            45 drivers/gpu/drm/nouveau/dispnv04/hw.c NVReadVgaSeq(struct drm_device *dev, int head, uint8_t index)
uint8_t            52 drivers/gpu/drm/nouveau/dispnv04/hw.c NVWriteVgaGr(struct drm_device *dev, int head, uint8_t index, uint8_t value)
uint8_t            58 drivers/gpu/drm/nouveau/dispnv04/hw.c uint8_t
uint8_t            59 drivers/gpu/drm/nouveau/dispnv04/hw.c NVReadVgaGr(struct drm_device *dev, int head, uint8_t index)
uint8_t           311 drivers/gpu/drm/nouveau/dispnv04/hw.c 	uint8_t misc, gr4, gr5, gr6, seq2, seq4;
uint8_t            37 drivers/gpu/drm/nouveau/dispnv04/hw.h void NVWriteVgaSeq(struct drm_device *, int head, uint8_t index, uint8_t value);
uint8_t            38 drivers/gpu/drm/nouveau/dispnv04/hw.h uint8_t NVReadVgaSeq(struct drm_device *, int head, uint8_t index);
uint8_t            39 drivers/gpu/drm/nouveau/dispnv04/hw.h void NVWriteVgaGr(struct drm_device *, int head, uint8_t index, uint8_t value);
uint8_t            40 drivers/gpu/drm/nouveau/dispnv04/hw.h uint8_t NVReadVgaGr(struct drm_device *, int head, uint8_t index);
uint8_t            99 drivers/gpu/drm/nouveau/dispnv04/hw.h static inline uint8_t nv_read_tmds(struct drm_device *dev,
uint8_t           100 drivers/gpu/drm/nouveau/dispnv04/hw.h 					int or, int dl, uint8_t address)
uint8_t           110 drivers/gpu/drm/nouveau/dispnv04/hw.h 					int or, int dl, uint8_t address,
uint8_t           111 drivers/gpu/drm/nouveau/dispnv04/hw.h 					uint8_t data)
uint8_t           120 drivers/gpu/drm/nouveau/dispnv04/hw.h 					int head, uint8_t index, uint8_t value)
uint8_t           127 drivers/gpu/drm/nouveau/dispnv04/hw.h static inline uint8_t NVReadVgaCrtc(struct drm_device *dev,
uint8_t           128 drivers/gpu/drm/nouveau/dispnv04/hw.h 					int head, uint8_t index)
uint8_t           131 drivers/gpu/drm/nouveau/dispnv04/hw.h 	uint8_t val;
uint8_t           152 drivers/gpu/drm/nouveau/dispnv04/hw.h NVWriteVgaCrtc5758(struct drm_device *dev, int head, uint8_t index, uint8_t value)
uint8_t           158 drivers/gpu/drm/nouveau/dispnv04/hw.h static inline uint8_t NVReadVgaCrtc5758(struct drm_device *dev, int head, uint8_t index)
uint8_t           164 drivers/gpu/drm/nouveau/dispnv04/hw.h static inline uint8_t NVReadPRMVIO(struct drm_device *dev,
uint8_t           169 drivers/gpu/drm/nouveau/dispnv04/hw.h 	uint8_t val;
uint8_t           181 drivers/gpu/drm/nouveau/dispnv04/hw.h 					int head, uint32_t reg, uint8_t value)
uint8_t           209 drivers/gpu/drm/nouveau/dispnv04/hw.h 					int head, uint8_t index, uint8_t value)
uint8_t           222 drivers/gpu/drm/nouveau/dispnv04/hw.h static inline uint8_t NVReadVgaAttr(struct drm_device *dev,
uint8_t           223 drivers/gpu/drm/nouveau/dispnv04/hw.h 					int head, uint8_t index)
uint8_t           226 drivers/gpu/drm/nouveau/dispnv04/hw.h 	uint8_t val;
uint8_t           245 drivers/gpu/drm/nouveau/dispnv04/hw.h 	uint8_t seq1 = NVReadVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX);
uint8_t           274 drivers/gpu/drm/nouveau/dispnv04/hw.h 	uint8_t cr11 = NVReadVgaCrtc(dev, head, NV_CIO_CR_VRE_INDEX);
uint8_t           299 drivers/gpu/drm/nouveau/dispnv04/hw.h 	uint8_t cr21 = lock;
uint8_t           375 drivers/gpu/drm/nouveau/dispnv04/hw.h 	uint8_t *curctl1 =
uint8_t            92 drivers/gpu/drm/nouveau/dispnv04/overlay.c verify_scaling(const struct drm_framebuffer *fb, uint8_t shift,
uint8_t            80 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	uint8_t crtc1A;
uint8_t           403 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	uint8_t *cr_lcd = &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[
uint8_t            31 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h 	uint8_t tv_enc[0x40];
uint8_t           102 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h 			uint8_t tv_enc[0x40];
uint8_t           143 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h static inline void nv_write_tv_enc(struct drm_device *dev, uint8_t reg,
uint8_t           144 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h 				   uint8_t val)
uint8_t           150 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h static inline uint8_t nv_read_tv_enc(struct drm_device *dev, uint8_t reg)
uint8_t            21 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t i2c_index;
uint8_t            22 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t heads;
uint8_t            23 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t connector;
uint8_t            24 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t bus;
uint8_t            25 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t location;
uint8_t            26 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t or;
uint8_t            27 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t link;
uint8_t            29 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h 	uint8_t extdev;
uint8_t             9 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h 			uint8_t N1, M1, N2, M2;
uint8_t            11 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h 			uint8_t M1, N1, M2, N2;
uint8_t           389 drivers/gpu/drm/nouveau/nouveau_acpi.c static int nouveau_rom_call(acpi_handle rom_handle, uint8_t *bios,
uint8_t           436 drivers/gpu/drm/nouveau/nouveau_acpi.c int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len)
uint8_t            13 drivers/gpu/drm/nouveau/nouveau_acpi.h int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
uint8_t            23 drivers/gpu/drm/nouveau/nouveau_acpi.h static inline int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) { return -EINVAL; }
uint8_t            48 drivers/gpu/drm/nouveau/nouveau_bios.c static bool nv_cksum(const uint8_t *data, unsigned int length)
uint8_t            55 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t sum = 0;
uint8_t            80 drivers/gpu/drm/nouveau/nouveau_bios.c 				uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
uint8_t           111 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
uint8_t           218 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
uint8_t           257 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t lvds_ver, headerlen, recordlen;
uint8_t           270 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t lvds_ver, headerlen, recordlen;
uint8_t           346 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t *fptable;
uint8_t           347 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
uint8_t           451 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
uint8_t           705 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t version, headerlen, entrylen, num_entries;
uint8_t           797 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t dacver, dacheaderlen;
uint8_t          1085 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
uint8_t          1232 drivers/gpu/drm/nouveau/nouveau_bios.c static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
uint8_t          1922 drivers/gpu/drm/nouveau/nouveau_bios.c 	uint8_t bytes_to_write;
uint8_t          1969 drivers/gpu/drm/nouveau/nouveau_bios.c 	static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
uint8_t          1981 drivers/gpu/drm/nouveau/nouveau_bios.c uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
uint8_t          1985 drivers/gpu/drm/nouveau/nouveau_bios.c 	static const uint8_t edid_sig[] = {
uint8_t            42 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t  id;
uint8_t            43 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t  version;
uint8_t            46 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t *data;
uint8_t            55 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t version;
uint8_t            84 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t *data;
uint8_t            86 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t chip_version;
uint8_t            90 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t digital_min_front_porch;
uint8_t            97 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t major_version;
uint8_t            98 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t feature_byte;
uint8_t           108 drivers/gpu/drm/nouveau/nouveau_bios.h 	uint8_t ram_restrict_group_count;
uint8_t           130 drivers/gpu/drm/nouveau/nouveau_bios.h 		uint8_t strapless_is_24bit;
uint8_t           131 drivers/gpu/drm/nouveau/nouveau_bios.h 		uint8_t *edid;
uint8_t           149 drivers/gpu/drm/nouveau/nouveau_bios.h 			uint8_t crt, tv, panel;
uint8_t           169 drivers/gpu/drm/nouveau/nouveau_bios.h uint8_t *nouveau_bios_embedded_edid(struct drm_device *);
uint8_t            26 drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.c int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
uint8_t            36 drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.c nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len)
uint8_t           159 drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.c 	uint8_t duty_lut[] = { 0, 0, 25, 0, 40, 0, 50, 0,
uint8_t           308 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 		uint8_t Pval2;
uint8_t            39 drivers/gpu/drm/qxl/qxl_cmd.c 	uint8_t                     elements[0];
uint8_t           116 drivers/gpu/drm/qxl/qxl_cmd.c 	uint8_t *elt;
uint8_t           163 drivers/gpu/drm/qxl/qxl_cmd.c 	volatile uint8_t *ring_elt;
uint8_t           287 drivers/gpu/drm/qxl/qxl_cmd.c static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr)
uint8_t           322 drivers/gpu/drm/qxl/qxl_cmd.c static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port)
uint8_t           410 drivers/gpu/drm/qxl/qxl_cmd.c void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id)
uint8_t           245 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t slots_start;
uint8_t           246 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t slots_end;
uint8_t           247 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t slot_gen_bits;
uint8_t           248 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t slot_id_bits;
uint8_t           249 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t slot_generation;
uint8_t           251 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t client_present;
uint8_t           252 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t client_capabilities[58];
uint8_t           352 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t log_buf[QXL_LOG_BUF_SIZE];
uint8_t           370 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t guest_capabilities[64];
uint8_t           387 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t data[0];
uint8_t           392 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t data[0];
uint8_t           434 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t type;
uint8_t           438 drivers/gpu/drm/qxl/qxl_dev.h 			uint8_t visible;
uint8_t           448 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t device_data[QXL_CURSOR_DEVICE_DATA_SIZE];
uint8_t           474 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t data[0];
uint8_t           513 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t flags;
uint8_t           529 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t scale_mode;
uint8_t           537 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t scale_mode;
uint8_t           550 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t alpha;
uint8_t           556 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t alpha;
uint8_t           565 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t rop3;
uint8_t           566 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t scale_mode;
uint8_t           571 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t flags;
uint8_t           572 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t join_style;
uint8_t           573 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t end_style;
uint8_t           574 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t style_nseg;
uint8_t           681 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t effect;
uint8_t           682 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t type;
uint8_t           708 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t effect;
uint8_t           709 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t type;
uint8_t           710 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t self_bitmap;
uint8_t           751 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t type;
uint8_t           815 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t type;
uint8_t           816 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t flags;
uint8_t           828 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t format;
uint8_t           829 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t flags;
uint8_t           843 drivers/gpu/drm/qxl/qxl_dev.h 	uint8_t data[0];
uint8_t            78 drivers/gpu/drm/qxl/qxl_display.c 	crc = crc32(0, (const uint8_t *)&qdev->rom->client_monitors_config,
uint8_t            74 drivers/gpu/drm/qxl/qxl_draw.c make_drawable(struct qxl_device *qdev, int surface, uint8_t type,
uint8_t           145 drivers/gpu/drm/qxl/qxl_draw.c 	uint8_t *surface_base;
uint8_t           132 drivers/gpu/drm/qxl/qxl_drv.h 	uint8_t		generation;
uint8_t           364 drivers/gpu/drm/qxl/qxl_drv.h 		   const uint8_t *data,
uint8_t           381 drivers/gpu/drm/qxl/qxl_drv.h void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id);
uint8_t           103 drivers/gpu/drm/qxl/qxl_image.c 		      const uint8_t *data,
uint8_t           233 drivers/gpu/drm/qxl/qxl_image.c 		     const uint8_t *data,
uint8_t            28 drivers/gpu/drm/radeon/atom-bits.h static inline uint8_t get_u8(void *bios, int ptr)
uint8_t            32 drivers/gpu/drm/radeon/atom-types.h typedef uint8_t UCHAR;
uint8_t           182 drivers/gpu/drm/radeon/atom.c static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
uint8_t           367 drivers/gpu/drm/radeon/atom.c static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
uint8_t           403 drivers/gpu/drm/radeon/atom.c static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
uint8_t           408 drivers/gpu/drm/radeon/atom.c static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
uint8_t           434 drivers/gpu/drm/radeon/atom.c static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
uint8_t           443 drivers/gpu/drm/radeon/atom.c static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
uint8_t           450 drivers/gpu/drm/radeon/atom.c static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
uint8_t           588 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           602 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           637 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           649 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           675 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           750 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           767 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           784 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           800 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           814 drivers/gpu/drm/radeon/atom.c 	uint8_t val = U8((*ptr)++);
uint8_t           849 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           890 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           906 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           922 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           941 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++), shift;
uint8_t           960 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t           974 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t          1001 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t          1013 drivers/gpu/drm/radeon/atom.c 	uint8_t attr = U8((*ptr)++);
uint8_t          1362 drivers/gpu/drm/radeon/atom.c 			    uint16_t * size, uint8_t * frev, uint8_t * crev,
uint8_t          1382 drivers/gpu/drm/radeon/atom.c bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
uint8_t          1383 drivers/gpu/drm/radeon/atom.c 			   uint8_t * crev)
uint8_t           137 drivers/gpu/drm/radeon/atom.h 	uint8_t shift;
uint8_t           152 drivers/gpu/drm/radeon/atom.h 			    uint8_t *frev, uint8_t *crev, uint16_t *data_start);
uint8_t           154 drivers/gpu/drm/radeon/atom.h 			   uint8_t *frev, uint8_t *crev);
uint8_t           500 drivers/gpu/drm/radeon/atombios_encoders.c 	uint8_t frev, crev;
uint8_t           574 drivers/gpu/drm/radeon/atombios_encoders.c 	uint8_t frev, crev;
uint8_t           855 drivers/gpu/drm/radeon/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          1016 drivers/gpu/drm/radeon/atombios_encoders.c atombios_dig_transmitter_setup2(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set, int fe)
uint8_t          1025 drivers/gpu/drm/radeon/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          1383 drivers/gpu/drm/radeon/atombios_encoders.c atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set)
uint8_t          1396 drivers/gpu/drm/radeon/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          1872 drivers/gpu/drm/radeon/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          2019 drivers/gpu/drm/radeon/atombios_encoders.c 	uint8_t frev, crev;
uint8_t          2351 drivers/gpu/drm/radeon/atombios_encoders.c 		uint8_t frev, crev;
uint8_t          1018 drivers/gpu/drm/radeon/ci_dpm.c 	fan_table.TempSrc = (uint8_t)tmp;
uint8_t           211 drivers/gpu/drm/radeon/evergreen_hdmi.c 	uint8_t *frame = buffer + 3;
uint8_t            50 drivers/gpu/drm/radeon/evergreen_smc.h     uint8_t                             last;
uint8_t            51 drivers/gpu/drm/radeon/evergreen_smc.h     uint8_t                             reserved[3];
uint8_t          1448 drivers/gpu/drm/radeon/kv_dpm.c 					   (uint8_t *)&pi->uvd_boot_level,
uint8_t            32 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     MaxPS;
uint8_t            33 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     TgtAct;
uint8_t            34 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     MaxPS_StepInc;
uint8_t            35 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     MaxPS_StepDec;
uint8_t            36 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     PSST;
uint8_t            37 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     NearTDPDec;
uint8_t            38 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     AboveSafeInc;
uint8_t            39 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     BelowSafeInc;
uint8_t            40 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     PSDeltaLimit;
uint8_t            41 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     PSDeltaWin;
uint8_t            42 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t     Reserved[6];
uint8_t            90 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t              index;
uint8_t            91 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t              padding;
uint8_t            98 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     arbValue;
uint8_t            99 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     ACIndex;
uint8_t           100 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     displayWatermark;
uint8_t           101 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     gen2PCIE;
uint8_t           102 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     reserved1;
uint8_t           103 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     reserved2;
uint8_t           104 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     strobeMode;
uint8_t           105 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     mcFlags;
uint8_t           115 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     hUp;
uint8_t           116 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     hDown;
uint8_t           117 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     stateFlags;
uint8_t           118 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                     arbRefreshState;
uint8_t           137 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             flags;
uint8_t           138 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             levelCount;
uint8_t           139 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             padding2;
uint8_t           140 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             padding3;
uint8_t           153 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t  highMask[NISLANDS_SMC_VOLTAGEMASK_MAX];
uint8_t           163 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             thermalProtectType;
uint8_t           164 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             systemFlags;
uint8_t           165 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             maxVDDCIndexInPPTable;
uint8_t           166 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             extraFlags;
uint8_t           167 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             highSMIO[NISLANDS_MAX_NO_VREG_STEPS];
uint8_t           218 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 cac_width;
uint8_t           219 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 window_size_p2;
uint8_t           221 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 num_drop_lsb;
uint8_t           222 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 padding_0;
uint8_t           226 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 AllowOvrflw;
uint8_t           227 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 MCWrWeight;
uint8_t           228 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 MCRdWeight;
uint8_t           229 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 padding_1[9];
uint8_t           231 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 enableWinAvg;
uint8_t           232 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 numWin_TDP;
uint8_t           233 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 l2numWin_TDP;
uint8_t           234 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 WinIndex;
uint8_t           243 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 lts_truncate_n;
uint8_t           244 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                 padding_2[7];
uint8_t           270 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             last;
uint8_t           271 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                             reserved[3];
uint8_t           282 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t  mc_arb_rfsh_rate;
uint8_t           283 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t  padding[3];
uint8_t           290 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                                     arb_current;
uint8_t           291 drivers/gpu/drm/radeon/nislands_smc.h     uint8_t                                     reserved[3];
uint8_t            67 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_Result_OK             ((uint8_t)0x01)
uint8_t            68 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_Result_Failed         ((uint8_t)0xFF)
uint8_t            70 drivers/gpu/drm/radeon/ppsmc.h typedef uint8_t PPSMC_Result;
uint8_t            72 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_Halt                      ((uint8_t)0x10)
uint8_t            73 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_Resume                    ((uint8_t)0x11)
uint8_t            74 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_ZeroLevelsDisabled        ((uint8_t)0x13)
uint8_t            75 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_OneLevelsDisabled         ((uint8_t)0x14)
uint8_t            76 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_TwoLevelsDisabled         ((uint8_t)0x15)
uint8_t            77 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_EnableThermalInterrupt    ((uint8_t)0x16)
uint8_t            78 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_RunningOnAC               ((uint8_t)0x17)
uint8_t            79 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_SwitchToSwState           ((uint8_t)0x20)
uint8_t            80 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_SwitchToInitialState      ((uint8_t)0x40)
uint8_t            81 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_NoForcedLevel             ((uint8_t)0x41)
uint8_t            82 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_ForceHigh                 ((uint8_t)0x42)
uint8_t            83 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_ForceMediumOrHigh         ((uint8_t)0x43)
uint8_t            84 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_SwitchToMinimumPower      ((uint8_t)0x51)
uint8_t            85 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_ResumeFromMinimumPower    ((uint8_t)0x52)
uint8_t            86 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_EnableCac                 ((uint8_t)0x53)
uint8_t            87 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_DisableCac                ((uint8_t)0x54)
uint8_t            88 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_TDPClampingActive             ((uint8_t)0x59)
uint8_t            89 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_TDPClampingInactive           ((uint8_t)0x5A)
uint8_t            90 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_StartFanControl               ((uint8_t)0x5B)
uint8_t            91 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_StopFanControl                ((uint8_t)0x5C)
uint8_t            92 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_NoDisplay                 ((uint8_t)0x5D)
uint8_t            93 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_HasDisplay                ((uint8_t)0x5E)
uint8_t            94 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_UVDPowerOFF               ((uint8_t)0x60)
uint8_t            95 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_UVDPowerON                ((uint8_t)0x61)
uint8_t            96 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_EnableULV                 ((uint8_t)0x62)
uint8_t            97 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_DisableULV                ((uint8_t)0x63)
uint8_t            98 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_EnterULV                  ((uint8_t)0x64)
uint8_t            99 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_ExitULV                   ((uint8_t)0x65)
uint8_t           100 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_CACLongTermAvgEnable          ((uint8_t)0x6E)
uint8_t           101 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_CACLongTermAvgDisable         ((uint8_t)0x6F)
uint8_t           102 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_CollectCAC_PowerCorreln   ((uint8_t)0x7A)
uint8_t           103 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_FlushDataCache                ((uint8_t)0x80)
uint8_t           104 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_SetEnabledLevels          ((uint8_t)0x82)
uint8_t           105 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_SetForcedLevels           ((uint8_t)0x83)
uint8_t           106 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_ResetToDefaults           ((uint8_t)0x84)
uint8_t           107 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_EnableDTE                 ((uint8_t)0x87)
uint8_t           108 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_DisableDTE                ((uint8_t)0x88)
uint8_t           109 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_ThrottleOVRDSCLKDS        ((uint8_t)0x96)
uint8_t           110 drivers/gpu/drm/radeon/ppsmc.h #define PPSMC_MSG_CancelThrottleOVRDSCLKDS  ((uint8_t)0x97)
uint8_t           220 drivers/gpu/drm/radeon/r600_hdmi.c 	uint8_t *frame = buffer + 3;
uint8_t           418 drivers/gpu/drm/radeon/r600_hdmi.c 	uint8_t buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE];
uint8_t          2323 drivers/gpu/drm/radeon/radeon.h 	uint8_t				*bios;
uint8_t           134 drivers/gpu/drm/radeon/radeon_atombios.c 							       uint8_t id)
uint8_t           565 drivers/gpu/drm/radeon/radeon_atombios.c 		uint8_t *addr = (uint8_t *) path_obj->asDispPath;
uint8_t           572 drivers/gpu/drm/radeon/radeon_atombios.c 			uint8_t con_obj_id, con_obj_num, con_obj_type;
uint8_t           650 drivers/gpu/drm/radeon/radeon_atombios.c 				uint8_t grph_obj_id, grph_obj_num, grph_obj_type;
uint8_t           866 drivers/gpu/drm/radeon/radeon_atombios.c 		uint8_t frev, crev;
uint8_t           910 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t           912 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t dac;
uint8_t          1144 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1350 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1399 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1527 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1639 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1779 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1780 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t bg, dac;
uint8_t          1904 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1965 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t frev, crev;
uint8_t          1966 drivers/gpu/drm/radeon/radeon_atombios.c 	uint8_t bg, dac;
uint8_t            51 drivers/gpu/drm/radeon/radeon_bios.c 	uint8_t __iomem *bios;
uint8_t            82 drivers/gpu/drm/radeon/radeon_bios.c 	uint8_t __iomem *bios, val1, val2;
uint8_t           111 drivers/gpu/drm/radeon/radeon_bios.c 	uint8_t __iomem *bios;
uint8_t           150 drivers/gpu/drm/radeon/radeon_bios.c static int radeon_atrm_call(acpi_handle atrm_handle, uint8_t *bios,
uint8_t           868 drivers/gpu/drm/radeon/radeon_combios.c 	uint8_t rev, bg, dac;
uint8_t          1019 drivers/gpu/drm/radeon/radeon_combios.c 	uint8_t rev, bg, dac;
uint8_t          1340 drivers/gpu/drm/radeon/radeon_combios.c 	uint8_t ver;
uint8_t          1416 drivers/gpu/drm/radeon/radeon_combios.c 	uint8_t ver;
uint8_t          2284 drivers/gpu/drm/radeon/radeon_combios.c 		uint8_t rev = RBIOS8(ext_tmds_info);
uint8_t          2285 drivers/gpu/drm/radeon/radeon_combios.c 		uint8_t flags = RBIOS8(ext_tmds_info + 4 + 5);
uint8_t          2890 drivers/gpu/drm/radeon/radeon_combios.c 	uint8_t blocks, slave_addr, rev;
uint8_t          3100 drivers/gpu/drm/radeon/radeon_combios.c 			uint8_t cmd = ((RBIOS8(offset) & 0xc0) >> 6);
uint8_t          3101 drivers/gpu/drm/radeon/radeon_combios.c 			uint8_t addr = (RBIOS8(offset) & 0x3f);
uint8_t          3191 drivers/gpu/drm/radeon/radeon_combios.c 		uint8_t val = RBIOS8(offset);
uint8_t          3266 drivers/gpu/drm/radeon/radeon_combios.c 	uint8_t rev;
uint8_t            89 drivers/gpu/drm/radeon/radeon_encoders.c radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
uint8_t          1088 drivers/gpu/drm/radeon/radeon_i2c.c 	uint8_t out_buf[2];
uint8_t           266 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div,
uint8_t           744 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	uint8_t pll_gain;
uint8_t            61 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	uint8_t backlight_level;
uint8_t           322 drivers/gpu/drm/radeon/radeon_legacy_encoders.c static uint8_t radeon_legacy_lvds_level(struct backlight_device *bd)
uint8_t           325 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	uint8_t level;
uint8_t           358 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	uint8_t backlight_level;
uint8_t           379 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	uint8_t backlight_level;
uint8_t            82 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	uint8_t  crtcPLL_M;
uint8_t            83 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	uint8_t  crtcPLL_post_div;
uint8_t           115 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t i2c_id;
uint8_t           288 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t negative;
uint8_t           311 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t type;
uint8_t           313 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t delay;
uint8_t           314 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t range;
uint8_t           315 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t refdiv;
uint8_t           384 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t  panel_pwr_delay;
uint8_t           385 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t  panel_digon_delay;
uint8_t           386 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t  panel_blon_delay;
uint8_t           388 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t  panel_post_divider;
uint8_t           396 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t  backlight_level;
uint8_t           422 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t slave_addr;
uint8_t           440 drivers/gpu/drm/radeon/radeon_mode.h 	uint8_t backlight_level;
uint8_t           714 drivers/gpu/drm/radeon/radeon_mode.h 			uint8_t dac);
uint8_t           770 drivers/gpu/drm/radeon/radeon_mode.h 					   int action, uint8_t lane_num,
uint8_t           771 drivers/gpu/drm/radeon/radeon_mode.h 					   uint8_t lane_set);
uint8_t           773 drivers/gpu/drm/radeon/radeon_mode.h 					    int action, uint8_t lane_num,
uint8_t           774 drivers/gpu/drm/radeon/radeon_mode.h 					    uint8_t lane_set, int fe);
uint8_t           217 drivers/gpu/drm/radeon/radeon_ucode.h 	uint8_t raw[0x100];
uint8_t            62 drivers/gpu/drm/radeon/radeon_vce.c 	uint8_t start, mid, end;
uint8_t            71 drivers/gpu/drm/radeon/rs690.c 	uint8_t frev, crev;
uint8_t            79 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t              index;
uint8_t            80 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t              padding;
uint8_t            95 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 arbValue;
uint8_t            97 drivers/gpu/drm/radeon/rv770_smc.h         uint8_t             seqValue;
uint8_t            98 drivers/gpu/drm/radeon/rv770_smc.h         uint8_t             ACIndex;
uint8_t           100 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 displayWatermark;
uint8_t           101 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 gen2PCIE;
uint8_t           102 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 gen2XSP;
uint8_t           103 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 backbias;
uint8_t           104 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 strobeMode;
uint8_t           105 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 mcFlags;
uint8_t           113 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 reserved1;
uint8_t           114 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 reserved2;
uint8_t           115 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 stateFlags;
uint8_t           116 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t                 padding;
uint8_t           131 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t           flags;
uint8_t           132 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t           padding1;
uint8_t           133 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t           padding2;
uint8_t           134 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t           padding3;
uint8_t           147 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t  highMask[RV770_SMC_VOLTAGEMASK_MAX];
uint8_t           157 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t             thermalProtectType;
uint8_t           158 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t             systemFlags;
uint8_t           159 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t             maxVDDCIndexInPPTable;
uint8_t           160 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t             extraFlags;
uint8_t           161 drivers/gpu/drm/radeon/rv770_smc.h     uint8_t             highSMIO[MAX_NO_VREG_STEPS];
uint8_t          6091 drivers/gpu/drm/radeon/si_dpm.c 	fan_table.temp_src = (uint8_t)tmp;
uint8_t            34 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t MaxPS;
uint8_t            35 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t TgtAct;
uint8_t            36 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t MaxPS_StepInc;
uint8_t            37 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t MaxPS_StepDec;
uint8_t            38 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t PSSamplingTime;
uint8_t            39 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t NearTDPDec;
uint8_t            40 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t AboveSafeInc;
uint8_t            41 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t BelowSafeInc;
uint8_t            42 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t PSDeltaLimit;
uint8_t            43 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t PSDeltaWin;
uint8_t            45 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t Reserved[4];
uint8_t            53 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     CurrPSkip;
uint8_t            54 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     CurrPSkipPowerShift;
uint8_t            55 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     CurrPSkipTDP;
uint8_t            56 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     CurrPSkipOCP;
uint8_t            57 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     MaxSPLLIndex;
uint8_t            58 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     MinSPLLIndex;
uint8_t            59 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     CurrSPLLIndex;
uint8_t            60 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     InfSweepMode;
uint8_t            61 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     InfSweepDir;
uint8_t            62 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     TDPexceeded;
uint8_t            63 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     reserved;
uint8_t            64 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     SwitchDownThreshold;
uint8_t            87 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     dGPU_T_Limit_Exceeded;
uint8_t            88 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     reserved[3];
uint8_t           135 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     index;
uint8_t           136 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t     phase_settings;
uint8_t           143 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     ACIndex;
uint8_t           144 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     displayWatermark;
uint8_t           145 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     gen2PCIE;
uint8_t           146 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     UVDWatermark;
uint8_t           147 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     VCEWatermark;
uint8_t           148 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     strobeMode;
uint8_t           149 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     mcFlags;
uint8_t           150 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     padding;
uint8_t           159 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     hysteresisUp;
uint8_t           160 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     hysteresisDown;
uint8_t           161 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     stateFlags;
uint8_t           162 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                     arbRefreshState;
uint8_t           185 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             flags;
uint8_t           186 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             levelCount;
uint8_t           187 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             padding2;
uint8_t           188 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             padding3;
uint8_t           211 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             thermalProtectType;
uint8_t           212 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             systemFlags;
uint8_t           213 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             maxVDDCIndexInPPTable;
uint8_t           214 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             extraFlags;
uint8_t           251 drivers/gpu/drm/radeon/sislands_smc.h 	uint8_t  fdo_mode;
uint8_t           252 drivers/gpu/drm/radeon/sislands_smc.h 	uint8_t  padding;
uint8_t           268 drivers/gpu/drm/radeon/sislands_smc.h 	uint8_t  temp_src;
uint8_t           290 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t    lts_truncate_n;
uint8_t           291 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t    SHIFT_N;
uint8_t           292 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t    log2_PG_LKG_SCALE;
uint8_t           293 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t    cac_temp;
uint8_t           320 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             last;
uint8_t           321 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                             reserved[3];
uint8_t           332 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  mc_arb_rfsh_rate;
uint8_t           333 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  mc_arb_burst_time;
uint8_t           334 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  padding[2];
uint8_t           341 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                                     arb_current;
uint8_t           342 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t                                     reserved[3];
uint8_t           376 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  WindowSize;
uint8_t           377 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  Tdep_count;
uint8_t           378 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  temp_select;
uint8_t           379 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  DTE_mode;
uint8_t           380 drivers/gpu/drm/radeon/sislands_smc.h     uint8_t  T_limits[SMC_SISLANDS_DTE_MAX_TEMPERATURE_DEPENDENT_ARRAY_SIZE];
uint8_t            55 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy1Config;
uint8_t            56 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy2Config;
uint8_t            57 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy3Config;
uint8_t            58 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy4Config;
uint8_t            60 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy5Config;
uint8_t            61 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy6Config;
uint8_t            62 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy7Config;
uint8_t            63 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         DisplayPhy8Config;
uint8_t            69 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         SClkDpmEnabledLevels;
uint8_t            70 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         MClkDpmEnabledLevels;
uint8_t            71 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         LClkDpmEnabledLevels;
uint8_t            72 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         PCIeDpmEnabledLevels;
uint8_t            74 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         UVDDpmEnabledLevels;
uint8_t            75 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         SAMUDpmEnabledLevels;
uint8_t            76 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         ACPDpmEnabledLevels;
uint8_t            77 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t         VCEDpmEnabledLevels;
uint8_t            97 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     Smio;
uint8_t            98 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     padding;
uint8_t           111 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     padding1[2];
uint8_t           120 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     SclkDid;
uint8_t           121 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     DisplayWatermark;
uint8_t           122 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EnabledForActivity;
uint8_t           123 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EnabledForThrottle;
uint8_t           124 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     UpH;
uint8_t           125 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     DownH;
uint8_t           126 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     VoltageDownH;
uint8_t           127 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     PowerThrottle;
uint8_t           128 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     DeepSleepDivId;
uint8_t           129 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     padding[3];
uint8_t           140 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     SclkDid;
uint8_t           141 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     DisplayWatermark;
uint8_t           142 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     DeepSleepDivId;
uint8_t           143 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     padding;
uint8_t           161 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     VddcOffsetVid;
uint8_t           162 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     VddcPhase;
uint8_t           177 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EdcReadEnable;
uint8_t           178 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EdcWriteEnable;
uint8_t           179 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     RttEnable;
uint8_t           180 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     StutterEnable;
uint8_t           182 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     StrobeEnable;
uint8_t           183 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     StrobeRatio;
uint8_t           184 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EnabledForThrottle;
uint8_t           185 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EnabledForActivity;
uint8_t           187 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     UpH;
uint8_t           188 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     DownH;
uint8_t           189 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     VoltageDownH;
uint8_t           190 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     padding;
uint8_t           193 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     DisplayWatermark;
uint8_t           194 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     padding1;
uint8_t           211 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     PcieGenSpeed;
uint8_t           212 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     PcieLaneCount;
uint8_t           213 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EnabledForActivity;
uint8_t           214 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     Padding;
uint8_t           227 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  McArbBurstTime;
uint8_t           228 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  padding[3];
uint8_t           245 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  MinVddcPhases;
uint8_t           246 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  VclkDivider;
uint8_t           247 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  DclkDivider;
uint8_t           248 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  padding[3];
uint8_t           257 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  MinPhases;
uint8_t           258 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  Divider;
uint8_t           274 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  DisplayWatermark;
uint8_t           275 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  McArbIndex;
uint8_t           276 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  McRegIndex;
uint8_t           277 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  SeqIndex;
uint8_t           278 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  SclkDid;
uint8_t           281 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t  PCIeGen;
uint8_t           311 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             GraphicsDpmLevelCount;
uint8_t           312 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             MemoryDpmLevelCount;
uint8_t           313 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             LinkLevelCount;
uint8_t           314 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             UvdLevelCount;
uint8_t           315 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             VceLevelCount;
uint8_t           316 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             AcpLevelCount;
uint8_t           317 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             SamuLevelCount;
uint8_t           318 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             MasterDeepSleepControl;
uint8_t           336 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             UvdBootLevel;
uint8_t           337 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             VceBootLevel;
uint8_t           338 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             AcpBootLevel;
uint8_t           339 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             SamuBootLevel;
uint8_t           341 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             UVDInterval;
uint8_t           342 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             VCEInterval;
uint8_t           343 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             ACPInterval;
uint8_t           344 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             SAMUInterval;
uint8_t           346 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             GraphicsBootLevel;
uint8_t           347 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             GraphicsVoltageChangeEnable;
uint8_t           348 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             GraphicsThermThrottleEnable;
uint8_t           349 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             GraphicsInterval;
uint8_t           351 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             VoltageInterval;
uint8_t           352 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             ThermalInterval;
uint8_t           356 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             MemoryBootLevel;
uint8_t           357 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             MemoryVoltageChangeEnable;
uint8_t           359 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             MemoryInterval;
uint8_t           360 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             MemoryThermThrottleEnable;
uint8_t           366 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             PCIeBootLinkLevel;
uint8_t           367 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             PCIeGenInterval;
uint8_t           368 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             DTEInterval;
uint8_t           369 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             DTEMode;
uint8_t           371 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             SVI2Enable;
uint8_t           372 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             VRHotGpio;
uint8_t           373 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             AcDcGpio;
uint8_t           374 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             ThermGpio;
uint8_t           388 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             DTEAmbientTempBase;
uint8_t           389 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             DTETjOffset;
uint8_t           390 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             GpuTjMax;
uint8_t           391 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             GpuTjHyst;
uint8_t           426 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             last;
uint8_t           427 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             reserved[3];
uint8_t           452 drivers/gpu/drm/radeon/smu7_discrete.h 	uint8_t  TempSrc;
uint8_t           461 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t BapmVddCVidHiSidd[8];
uint8_t           464 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t BapmVddCVidLoSidd[8];
uint8_t           467 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t VddCVid[8];
uint8_t           470 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t SviLoadLineEn;
uint8_t           471 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t SviLoadLineVddC;
uint8_t           472 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t SviLoadLineTrimVddC;
uint8_t           473 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t SviLoadLineOffsetVddC;
uint8_t           477 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
uint8_t           478 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t TDC_MAWt;
uint8_t           481 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t TdcWaterfallCtl;
uint8_t           482 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t LPMLTemperatureMin;
uint8_t           483 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t LPMLTemperatureMax;
uint8_t           484 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t Reserved;
uint8_t           487 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t BapmVddCVidHiSidd2[8];
uint8_t           496 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t GnbLPML[16];
uint8_t           499 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t GnbLPMLMaxVid;
uint8_t           500 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t GnbLPMLMinVid;
uint8_t           501 drivers/gpu/drm/radeon/smu7_discrete.h   uint8_t Reserved1[2];
uint8_t            46 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy1Config;
uint8_t            47 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy2Config;
uint8_t            48 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy3Config;
uint8_t            49 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy4Config;
uint8_t            51 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy5Config;
uint8_t            52 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy6Config;
uint8_t            53 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy7Config;
uint8_t            54 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         DisplayPhy8Config;
uint8_t            60 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         SClkDpmEnabledLevels;
uint8_t            61 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         MClkDpmEnabledLevels;
uint8_t            62 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         LClkDpmEnabledLevels;
uint8_t            63 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         PCIeDpmEnabledLevels;
uint8_t            65 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         UVDDpmEnabledLevels;
uint8_t            66 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         SAMUDpmEnabledLevels;
uint8_t            67 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         ACPDpmEnabledLevels;
uint8_t            68 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t         VCEDpmEnabledLevels;
uint8_t            89 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     Vid;
uint8_t            90 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     VidOffset;
uint8_t            93 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     PowerThrottle;
uint8_t            94 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     GnbSlow;
uint8_t            95 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     ForceNbPs1;
uint8_t            96 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     SclkDid;
uint8_t            98 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     DisplayWatermark;
uint8_t            99 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     EnabledForActivity;
uint8_t           100 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     EnabledForThrottle;
uint8_t           101 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     UpH;
uint8_t           103 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     DownH;
uint8_t           104 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     VoltageDownH;
uint8_t           105 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     DeepSleepDivId;
uint8_t           107 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     ClkBypassCntl;
uint8_t           116 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     EnabledForActivity;
uint8_t           117 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     LclkDid;
uint8_t           118 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     Vid;
uint8_t           119 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     VoltageDownH;
uint8_t           124 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     UpH;
uint8_t           125 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     DownH;
uint8_t           129 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     ActivityLevel;
uint8_t           130 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     EnabledForThrottle;
uint8_t           132 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     ClkBypassCntl;
uint8_t           134 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     padding;
uint8_t           145 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t  VclkDivider;
uint8_t           146 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t  DclkDivider;
uint8_t           148 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     VClkBypassCntl;
uint8_t           149 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     DClkBypassCntl;
uint8_t           151 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     padding[2];
uint8_t           162 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t  Divider;
uint8_t           163 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t  ClkBypassCntl;
uint8_t           174 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     SclkDid;
uint8_t           175 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     GnbSlow;
uint8_t           176 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     ForceNbPs1;
uint8_t           177 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     DisplayWatermark;
uint8_t           178 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     DeepSleepDivId;
uint8_t           179 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t     padding[3];
uint8_t           186 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t DpmXNbPsHi;
uint8_t           187 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t DpmXNbPsLo;
uint8_t           188 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t Dpm0PgNbPsHi;
uint8_t           189 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t Dpm0PgNbPsLo;
uint8_t           190 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t EnablePsi1;
uint8_t           191 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t SkipDPM0;
uint8_t           192 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t SkipPG;
uint8_t           193 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t Hysteresis;
uint8_t           194 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t EnableDpmPstatePoll;
uint8_t           195 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t padding[3];
uint8_t           209 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t  DisplayWatermark;
uint8_t           210 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t  McArbIndex;
uint8_t           224 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                            GraphicsDpmLevelCount;
uint8_t           225 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                            GIOLevelCount;
uint8_t           226 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                            UvdLevelCount;
uint8_t           227 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                            VceLevelCount;
uint8_t           229 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                            AcpLevelCount;
uint8_t           230 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                            SamuLevelCount;
uint8_t           240 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           UvdBootLevel;
uint8_t           241 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           VceBootLevel;
uint8_t           242 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           AcpBootLevel;
uint8_t           243 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           SamuBootLevel;
uint8_t           244 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           UVDInterval;
uint8_t           245 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           VCEInterval;
uint8_t           246 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           ACPInterval;
uint8_t           247 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           SAMUInterval;
uint8_t           249 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GraphicsBootLevel;
uint8_t           250 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GraphicsInterval;
uint8_t           251 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GraphicsThermThrottleEnable;
uint8_t           252 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GraphicsVoltageChangeEnable;
uint8_t           254 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GraphicsClkSlowEnable;
uint8_t           255 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GraphicsClkSlowDivider;
uint8_t           278 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           Enable;
uint8_t           279 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GIOVoltageChangeEnable;
uint8_t           280 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           GIOBootLevel;
uint8_t           281 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           padding;
uint8_t           282 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           padding1[2];
uint8_t           283 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           TargetState;
uint8_t           284 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           CurrenttState;
uint8_t           285 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           ThrottleOnHtc;
uint8_t           286 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           ThermThrottleStatus;
uint8_t           287 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           ThermThrottleTempSelect;
uint8_t           288 drivers/gpu/drm/radeon/smu7_fusion.h     uint8_t                           ThermThrottleEnable;
uint8_t            32 drivers/gpu/drm/rockchip/rockchip_drm_vop.h 	uint8_t shift;
uint8_t           815 drivers/gpu/drm/savage/savage_bci.c 	    (drm_savage_sarea_t *) ((uint8_t *) dev_priv->sarea->handle +
uint8_t           854 drivers/gpu/drm/savage/savage_bci.c 	    ((uint8_t *) dev_priv->mmio->handle + SAVAGE_BCI_OFFSET);
uint8_t          1210 drivers/gpu/drm/sti/sti_hdmi.c static int hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, size_t len)
uint8_t           422 drivers/gpu/drm/tilcdc/tilcdc_drv.c 	uint8_t  rev;
uint8_t           423 drivers/gpu/drm/tilcdc/tilcdc_drv.c 	uint8_t  save;
uint8_t           321 drivers/gpu/drm/ttm/ttm_bo_vm.c 				 uint8_t *buf, int len, int write)
uint8_t           341 drivers/gpu/drm/ttm/ttm_bo_vm.c 		ptr = (uint8_t *)ttm_kmap_obj_virtual(&map, &is_iomem) + offset;
uint8_t            40 drivers/gpu/drm/udl/udl_fb.c #define DLO_RGB_GETRED(col) (uint8_t)((col) & 0xFF)
uint8_t            43 drivers/gpu/drm/udl/udl_fb.c #define DLO_RGB_GETGRN(col) (uint8_t)(((col) >> 8) & 0xFF)
uint8_t            46 drivers/gpu/drm/udl/udl_fb.c #define DLO_RGB_GETBLU(col) (uint8_t)(((col) >> 16) & 0xFF)
uint8_t            49 drivers/gpu/drm/udl/udl_fb.c #define DLO_RG16(red, grn) (uint8_t)((((red) & 0xF8) | ((grn) >> 5)) & 0xFF)
uint8_t            52 drivers/gpu/drm/udl/udl_fb.c #define DLO_GB16(grn, blu) (uint8_t)(((((grn) & 0x1C) << 3) | ((blu) >> 3)) & 0xFF)
uint8_t            58 drivers/gpu/drm/udl/udl_fb.c static uint8_t rgb8(uint32_t col)
uint8_t            60 drivers/gpu/drm/udl/udl_fb.c 	uint8_t red = DLO_RGB_GETRED(col);
uint8_t            61 drivers/gpu/drm/udl/udl_fb.c 	uint8_t grn = DLO_RGB_GETGRN(col);
uint8_t            62 drivers/gpu/drm/udl/udl_fb.c 	uint8_t blu = DLO_RGB_GETBLU(col);
uint8_t            69 drivers/gpu/drm/udl/udl_fb.c 	uint8_t red = DLO_RGB_GETRED(col);
uint8_t            70 drivers/gpu/drm/udl/udl_fb.c 	uint8_t grn = DLO_RGB_GETGRN(col);
uint8_t            71 drivers/gpu/drm/udl/udl_fb.c 	uint8_t blu = DLO_RGB_GETBLU(col);
uint8_t            75 drivers/gpu/drm/udl/udl_transfer.c static inline u16 get_pixel_val16(const uint8_t *pixel, int log_bpp)
uint8_t           116 drivers/gpu/drm/udl/udl_transfer.c 	uint8_t **command_buffer_ptr,
uint8_t           117 drivers/gpu/drm/udl/udl_transfer.c 	const uint8_t *const cmd_buffer_end, int log_bpp)
uint8_t           122 drivers/gpu/drm/udl/udl_transfer.c 	uint8_t *cmd = *command_buffer_ptr;
uint8_t           126 drivers/gpu/drm/udl/udl_transfer.c 		uint8_t *raw_pixels_count_byte = NULL;
uint8_t           127 drivers/gpu/drm/udl/udl_transfer.c 		uint8_t *cmd_pixels_count_byte = NULL;
uint8_t           134 drivers/gpu/drm/udl/udl_transfer.c 		*cmd++ = (uint8_t) ((dev_addr >> 16) & 0xFF);
uint8_t           135 drivers/gpu/drm/udl/udl_transfer.c 		*cmd++ = (uint8_t) ((dev_addr >> 8) & 0xFF);
uint8_t           136 drivers/gpu/drm/udl/udl_transfer.c 		*cmd++ = (uint8_t) ((dev_addr) & 0xFF);
uint8_t           196 drivers/gpu/drm/udl/udl_transfer.c 		cmd = (uint8_t *) cmd_buffer_end;
uint8_t           556 drivers/gpu/drm/vc4/vc4_drv.h 	uint8_t bin_tiles_x, bin_tiles_y;
uint8_t           873 drivers/gpu/drm/vc4/vc4_drv.h 			uint32_t offset, uint8_t tiling_format,
uint8_t           874 drivers/gpu/drm/vc4/vc4_drv.h 			uint32_t width, uint32_t height, uint8_t cpp);
uint8_t           336 drivers/gpu/drm/vc4/vc4_hdmi.c 	uint8_t buffer[VC4_HDMI_PACKET_STRIDE];
uint8_t           102 drivers/gpu/drm/vc4/vc4_render_cl.c 				    uint8_t x, uint8_t y)
uint8_t           125 drivers/gpu/drm/vc4/vc4_render_cl.c 		      uint8_t x, uint8_t y, bool first, bool last)
uint8_t           258 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t min_x_tile = args->min_x_tile;
uint8_t           259 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t min_y_tile = args->min_y_tile;
uint8_t           260 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t max_x_tile = args->max_x_tile;
uint8_t           261 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t max_y_tile = args->max_y_tile;
uint8_t           262 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t xtiles = max_x_tile - min_x_tile + 1;
uint8_t           263 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t ytiles = max_y_tile - min_y_tile + 1;
uint8_t           264 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t xi, yi;
uint8_t           440 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t tiling = VC4_GET_FIELD(surf->bits,
uint8_t           442 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t buffer = VC4_GET_FIELD(surf->bits,
uint8_t           444 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t format = VC4_GET_FIELD(surf->bits,
uint8_t           539 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t tiling = VC4_GET_FIELD(surf->bits,
uint8_t           541 drivers/gpu/drm/vc4/vc4_render_cl.c 	uint8_t format = VC4_GET_FIELD(surf->bits,
uint8_t           160 drivers/gpu/drm/vc4/vc4_validate.c 		   uint32_t offset, uint8_t tiling_format,
uint8_t           161 drivers/gpu/drm/vc4/vc4_validate.c 		   uint32_t width, uint32_t height, uint8_t cpp)
uint8_t           262 drivers/gpu/drm/vc4/vc4_validate.c 	uint32_t index_size = (*(uint8_t *)(untrusted + 0) >> 4) ? 2 : 1;
uint8_t           353 drivers/gpu/drm/vc4/vc4_validate.c 	uint8_t flags;
uint8_t           364 drivers/gpu/drm/vc4/vc4_validate.c 	exec->bin_tiles_x = *(uint8_t *)(untrusted + 12);
uint8_t           365 drivers/gpu/drm/vc4/vc4_validate.c 	exec->bin_tiles_y = *(uint8_t *)(untrusted + 13);
uint8_t           367 drivers/gpu/drm/vc4/vc4_validate.c 	flags = *(uint8_t *)(untrusted + 14);
uint8_t           405 drivers/gpu/drm/vc4/vc4_validate.c 	*(uint8_t *)(validated + 14) =
uint8_t           492 drivers/gpu/drm/vc4/vc4_validate.c 		u8 cmd = *(uint8_t *)src_pkt;
uint8_t           891 drivers/gpu/drm/vc4/vc4_validate.c 		uint32_t attr_size = *(uint8_t *)(pkt_u + o + 4) + 1;
uint8_t           892 drivers/gpu/drm/vc4/vc4_validate.c 		uint32_t stride = *(uint8_t *)(pkt_u + o + 5);
uint8_t           380 drivers/gpu/drm/vmwgfx/vmwgfx_context.c 	uint8_t *cmd;
uint8_t           587 drivers/gpu/drm/vmwgfx/vmwgfx_context.c 	uint8_t *cmd;
uint8_t            38 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c 	uint8_t num_input_sig;
uint8_t            39 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c 	uint8_t num_output_sig;
uint8_t           164 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c 			      uint8_t num_input_sig,
uint8_t           165 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c 			      uint8_t num_output_sig,
uint8_t           718 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c 				 uint8_t num_input_sig,
uint8_t           719 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c 				 uint8_t num_output_sig,
uint8_t           842 drivers/gpu/drm/vmwgfx/vmwgfx_shader.c 			     uint8_t num_input_sig, uint8_t num_output_sig,
uint8_t           387 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c 	uint8_t *cmd;
uint8_t           465 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c 	uint8_t *cmd;
uint8_t           547 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c 	uint8_t *cmd;
uint8_t          1199 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c 	uint8_t *cmd;
uint8_t           459 drivers/gpu/drm/zte/zx_hdmi.c 				 uint8_t *buf, size_t len)
uint8_t          1476 drivers/hid/hid-logitech-hidpp.c 	uint8_t presence;
uint8_t          1477 drivers/hid/hid-logitech-hidpp.c 	uint8_t desired_state;
uint8_t          1478 drivers/hid/hid-logitech-hidpp.c 	uint8_t state;
uint8_t          1479 drivers/hid/hid-logitech-hidpp.c 	uint8_t persistent;
uint8_t           397 drivers/hid/hid-roccat-arvo.c 			(uint8_t const *)&roccat_report);
uint8_t            15 drivers/hid/hid-roccat-arvo.h 	uint8_t command; /* ARVO_COMMAND_MODE_KEY */
uint8_t            16 drivers/hid/hid-roccat-arvo.h 	uint8_t state;
uint8_t            20 drivers/hid/hid-roccat-arvo.h 	uint8_t unknown[24];
uint8_t            24 drivers/hid/hid-roccat-arvo.h 	uint8_t unknown[8];
uint8_t            28 drivers/hid/hid-roccat-arvo.h 	uint8_t command; /* ARVO_COMMAND_KEY_MASK */
uint8_t            29 drivers/hid/hid-roccat-arvo.h 	uint8_t key_mask;
uint8_t            34 drivers/hid/hid-roccat-arvo.h 	uint8_t command; /* ARVO_COMMAND_ACTUAL_PROFILE */
uint8_t            35 drivers/hid/hid-roccat-arvo.h 	uint8_t actual_profile;
uint8_t            47 drivers/hid/hid-roccat-arvo.h 	uint8_t unknown1; /* always 0x01 */
uint8_t            48 drivers/hid/hid-roccat-arvo.h 	uint8_t event;
uint8_t            49 drivers/hid/hid-roccat-arvo.h 	uint8_t unknown2; /* always 0x70 */
uint8_t            63 drivers/hid/hid-roccat-arvo.h 	uint8_t profile;
uint8_t            64 drivers/hid/hid-roccat-arvo.h 	uint8_t button;
uint8_t            65 drivers/hid/hid-roccat-arvo.h 	uint8_t action;
uint8_t            16 drivers/hid/hid-roccat-common.c static inline uint16_t roccat_common2_feature_report(uint8_t report_id)
uint8_t            20 drivers/hid/hid-roccat-common.h 	uint8_t command;
uint8_t            21 drivers/hid/hid-roccat-common.h 	uint8_t value;
uint8_t            22 drivers/hid/hid-roccat-common.h 	uint8_t request; /* always 0 on requesting write check */
uint8_t           103 drivers/hid/hid-roccat-isku.c 	roccat_report_event(isku->chrdev_minor, (uint8_t const *)&roccat_report);
uint8_t           392 drivers/hid/hid-roccat-isku.c 			(uint8_t const *)&roccat_report);
uint8_t            38 drivers/hid/hid-roccat-isku.h 	uint8_t command; /* ISKU_COMMAND_ACTUAL_PROFILE */
uint8_t            39 drivers/hid/hid-roccat-isku.h 	uint8_t size; /* always 3 */
uint8_t            40 drivers/hid/hid-roccat-isku.h 	uint8_t actual_profile;
uint8_t            66 drivers/hid/hid-roccat-isku.h 	uint8_t number; /* ISKU_REPORT_NUMBER_BUTTON */
uint8_t            67 drivers/hid/hid-roccat-isku.h 	uint8_t zero;
uint8_t            68 drivers/hid/hid-roccat-isku.h 	uint8_t event;
uint8_t            69 drivers/hid/hid-roccat-isku.h 	uint8_t data1;
uint8_t            70 drivers/hid/hid-roccat-isku.h 	uint8_t data2;
uint8_t            82 drivers/hid/hid-roccat-isku.h 	uint8_t event;
uint8_t            83 drivers/hid/hid-roccat-isku.h 	uint8_t data1;
uint8_t            84 drivers/hid/hid-roccat-isku.h 	uint8_t data2;
uint8_t            85 drivers/hid/hid-roccat-isku.h 	uint8_t profile;
uint8_t            50 drivers/hid/hid-roccat-kone.c 	roccat_report_event(kone->chrdev_minor, (uint8_t *)&roccat_report);
uint8_t           114 drivers/hid/hid-roccat-kone.c 	uint8_t data;
uint8_t           236 drivers/hid/hid-roccat-kone.c 	uint8_t data;
uint8_t           808 drivers/hid/hid-roccat-kone.c 				(uint8_t *)&roccat_report);
uint8_t           817 drivers/hid/hid-roccat-kone.c 					(uint8_t *)&roccat_report);
uint8_t            15 drivers/hid/hid-roccat-kone.h 	uint8_t key;
uint8_t            16 drivers/hid/hid-roccat-kone.h 	uint8_t action;
uint8_t            34 drivers/hid/hid-roccat-kone.h 	uint8_t number; /* range 1-8 */
uint8_t            35 drivers/hid/hid-roccat-kone.h 	uint8_t type;
uint8_t            36 drivers/hid/hid-roccat-kone.h 	uint8_t macro_type; /* 0 = short, 1 = overlong */
uint8_t            37 drivers/hid/hid-roccat-kone.h 	uint8_t macro_set_name[16]; /* can be max 15 chars long */
uint8_t            38 drivers/hid/hid-roccat-kone.h 	uint8_t macro_name[16]; /* can be max 15 chars long */
uint8_t            39 drivers/hid/hid-roccat-kone.h 	uint8_t count;
uint8_t            87 drivers/hid/hid-roccat-kone.h 	uint8_t number; /* number of light 1-5 */
uint8_t            88 drivers/hid/hid-roccat-kone.h 	uint8_t mod;   /* 1 = on, 2 = off */
uint8_t            89 drivers/hid/hid-roccat-kone.h 	uint8_t red;   /* range 0x00-0xff */
uint8_t            90 drivers/hid/hid-roccat-kone.h 	uint8_t green; /* range 0x00-0xff */
uint8_t            91 drivers/hid/hid-roccat-kone.h 	uint8_t blue;  /* range 0x00-0xff */
uint8_t           103 drivers/hid/hid-roccat-kone.h 	uint8_t profile; /* range 1-5 */
uint8_t           106 drivers/hid/hid-roccat-kone.h 	uint8_t xy_sensitivity_enabled; /* 1 = on, 2 = off */
uint8_t           109 drivers/hid/hid-roccat-kone.h 	uint8_t dpi_rate; /* bit 1 = 800, ... */
uint8_t           110 drivers/hid/hid-roccat-kone.h 	uint8_t startup_dpi; /* range 1-6 */
uint8_t           111 drivers/hid/hid-roccat-kone.h 	uint8_t polling_rate; /* 1 = 125Hz, 2 = 500Hz, 3 = 1000Hz */
uint8_t           116 drivers/hid/hid-roccat-kone.h 	uint8_t dcu_flag;
uint8_t           117 drivers/hid/hid-roccat-kone.h 	uint8_t light_effect_1; /* range 1-3 */
uint8_t           118 drivers/hid/hid-roccat-kone.h 	uint8_t light_effect_2; /* range 1-5 */
uint8_t           119 drivers/hid/hid-roccat-kone.h 	uint8_t light_effect_3; /* range 1-4 */
uint8_t           120 drivers/hid/hid-roccat-kone.h 	uint8_t light_effect_speed; /* range 0-255 */
uint8_t           137 drivers/hid/hid-roccat-kone.h 	uint8_t  startup_profile; /* 1-5 */
uint8_t           138 drivers/hid/hid-roccat-kone.h 	uint8_t	 unknown1;
uint8_t           139 drivers/hid/hid-roccat-kone.h 	uint8_t  tcu; /* 0 = off, 1 = on */
uint8_t           140 drivers/hid/hid-roccat-kone.h 	uint8_t  unknown2[23];
uint8_t           141 drivers/hid/hid-roccat-kone.h 	uint8_t  calibration_data[4];
uint8_t           142 drivers/hid/hid-roccat-kone.h 	uint8_t  unknown3[2];
uint8_t           150 drivers/hid/hid-roccat-kone.h 	uint8_t report_number; /* always 1 */
uint8_t           151 drivers/hid/hid-roccat-kone.h 	uint8_t button;
uint8_t           154 drivers/hid/hid-roccat-kone.h 	uint8_t wheel; /* up = 1, down = -1 */
uint8_t           155 drivers/hid/hid-roccat-kone.h 	uint8_t tilt; /* right = 1, left = -1 */
uint8_t           156 drivers/hid/hid-roccat-kone.h 	uint8_t unknown;
uint8_t           157 drivers/hid/hid-roccat-kone.h 	uint8_t event;
uint8_t           158 drivers/hid/hid-roccat-kone.h 	uint8_t value; /* press = 0, release = 1 */
uint8_t           159 drivers/hid/hid-roccat-kone.h 	uint8_t macro_key; /* 0 to 8 */
uint8_t           186 drivers/hid/hid-roccat-kone.h 	uint8_t event;
uint8_t           187 drivers/hid/hid-roccat-kone.h 	uint8_t value; /* holds dpi or profile value */
uint8_t           188 drivers/hid/hid-roccat-kone.h 	uint8_t key; /* macro key on overlong macro execution */
uint8_t           285 drivers/hid/hid-roccat-koneplus.c 			(uint8_t const *)&roccat_report);
uint8_t           504 drivers/hid/hid-roccat-koneplus.c 			(uint8_t const *)&roccat_report);
uint8_t            34 drivers/hid/hid-roccat-koneplus.h 	uint8_t command; /* KONEPLUS_COMMAND_ACTUAL_PROFILE */
uint8_t            35 drivers/hid/hid-roccat-koneplus.h 	uint8_t size; /* always 3 */
uint8_t            36 drivers/hid/hid-roccat-koneplus.h 	uint8_t actual_profile; /* Range 0-4! */
uint8_t            40 drivers/hid/hid-roccat-koneplus.h 	uint8_t command; /* KONEPLUS_COMMAND_INFO */
uint8_t            41 drivers/hid/hid-roccat-koneplus.h 	uint8_t size; /* always 6 */
uint8_t            42 drivers/hid/hid-roccat-koneplus.h 	uint8_t firmware_version;
uint8_t            43 drivers/hid/hid-roccat-koneplus.h 	uint8_t unknown[3];
uint8_t            69 drivers/hid/hid-roccat-koneplus.h 	uint8_t report_number; /* always KONEPLUS_MOUSE_REPORT_NUMBER_BUTTON */
uint8_t            70 drivers/hid/hid-roccat-koneplus.h 	uint8_t zero1;
uint8_t            71 drivers/hid/hid-roccat-koneplus.h 	uint8_t type;
uint8_t            72 drivers/hid/hid-roccat-koneplus.h 	uint8_t data1;
uint8_t            73 drivers/hid/hid-roccat-koneplus.h 	uint8_t data2;
uint8_t            74 drivers/hid/hid-roccat-koneplus.h 	uint8_t zero2;
uint8_t            75 drivers/hid/hid-roccat-koneplus.h 	uint8_t unknown[2];
uint8_t           107 drivers/hid/hid-roccat-koneplus.h 	uint8_t type;
uint8_t           108 drivers/hid/hid-roccat-koneplus.h 	uint8_t data1;
uint8_t           109 drivers/hid/hid-roccat-koneplus.h 	uint8_t data2;
uint8_t           110 drivers/hid/hid-roccat-koneplus.h 	uint8_t profile;
uint8_t            30 drivers/hid/hid-roccat-konepure.c 	uint8_t report_number; /* always KONEPURE_MOUSE_REPORT_NUMBER_BUTTON */
uint8_t            31 drivers/hid/hid-roccat-konepure.c 	uint8_t zero;
uint8_t            32 drivers/hid/hid-roccat-konepure.c 	uint8_t type;
uint8_t            33 drivers/hid/hid-roccat-konepure.c 	uint8_t data1;
uint8_t            34 drivers/hid/hid-roccat-konepure.c 	uint8_t data2;
uint8_t            35 drivers/hid/hid-roccat-konepure.c 	uint8_t zero2;
uint8_t            36 drivers/hid/hid-roccat-konepure.c 	uint8_t unknown[2];
uint8_t           315 drivers/hid/hid-roccat-kovaplus.c 			(uint8_t const *)&roccat_report);
uint8_t           595 drivers/hid/hid-roccat-kovaplus.c 			(uint8_t const *)&roccat_report);
uint8_t            29 drivers/hid/hid-roccat-kovaplus.h 	uint8_t command; /* KOVAPLUS_COMMAND_ACTUAL_PROFILE */
uint8_t            30 drivers/hid/hid-roccat-kovaplus.h 	uint8_t size; /* always 3 */
uint8_t            31 drivers/hid/hid-roccat-kovaplus.h 	uint8_t actual_profile; /* Range 0-4! */
uint8_t            35 drivers/hid/hid-roccat-kovaplus.h 	uint8_t command; /* KOVAPLUS_COMMAND_PROFILE_SETTINGS */
uint8_t            36 drivers/hid/hid-roccat-kovaplus.h 	uint8_t size; /* 16 */
uint8_t            37 drivers/hid/hid-roccat-kovaplus.h 	uint8_t profile_index; /* range 0-4 */
uint8_t            38 drivers/hid/hid-roccat-kovaplus.h 	uint8_t unknown1;
uint8_t            39 drivers/hid/hid-roccat-kovaplus.h 	uint8_t sensitivity_x; /* range 1-10 */
uint8_t            40 drivers/hid/hid-roccat-kovaplus.h 	uint8_t sensitivity_y; /* range 1-10 */
uint8_t            41 drivers/hid/hid-roccat-kovaplus.h 	uint8_t cpi_levels_enabled;
uint8_t            42 drivers/hid/hid-roccat-kovaplus.h 	uint8_t cpi_startup_level; /* range 1-4 */
uint8_t            43 drivers/hid/hid-roccat-kovaplus.h 	uint8_t data[8];
uint8_t            47 drivers/hid/hid-roccat-kovaplus.h 	uint8_t command; /* KOVAPLUS_COMMAND_PROFILE_BUTTONS */
uint8_t            48 drivers/hid/hid-roccat-kovaplus.h 	uint8_t size; /* 23 */
uint8_t            49 drivers/hid/hid-roccat-kovaplus.h 	uint8_t profile_index; /* range 0-4 */
uint8_t            50 drivers/hid/hid-roccat-kovaplus.h 	uint8_t data[20];
uint8_t            54 drivers/hid/hid-roccat-kovaplus.h 	uint8_t command; /* KOVAPLUS_COMMAND_INFO */
uint8_t            55 drivers/hid/hid-roccat-kovaplus.h 	uint8_t size; /* 6 */
uint8_t            56 drivers/hid/hid-roccat-kovaplus.h 	uint8_t firmware_version;
uint8_t            57 drivers/hid/hid-roccat-kovaplus.h 	uint8_t unknown[3];
uint8_t            77 drivers/hid/hid-roccat-kovaplus.h 	uint8_t report_number; /* KOVAPLUS_MOUSE_REPORT_NUMBER_BUTTON */
uint8_t            78 drivers/hid/hid-roccat-kovaplus.h 	uint8_t unknown1;
uint8_t            79 drivers/hid/hid-roccat-kovaplus.h 	uint8_t type;
uint8_t            80 drivers/hid/hid-roccat-kovaplus.h 	uint8_t data1;
uint8_t            81 drivers/hid/hid-roccat-kovaplus.h 	uint8_t data2;
uint8_t           111 drivers/hid/hid-roccat-kovaplus.h 	uint8_t type;
uint8_t           112 drivers/hid/hid-roccat-kovaplus.h 	uint8_t profile;
uint8_t           113 drivers/hid/hid-roccat-kovaplus.h 	uint8_t button;
uint8_t           114 drivers/hid/hid-roccat-kovaplus.h 	uint8_t data1;
uint8_t           115 drivers/hid/hid-roccat-kovaplus.h 	uint8_t data2;
uint8_t           272 drivers/hid/hid-roccat-pyra.c 			(uint8_t const *)&roccat_report);
uint8_t           521 drivers/hid/hid-roccat-pyra.c 				(uint8_t const *)&roccat_report);
uint8_t           535 drivers/hid/hid-roccat-pyra.c 					(uint8_t const *)&roccat_report);
uint8_t            28 drivers/hid/hid-roccat-pyra.h 	uint8_t command; /* PYRA_COMMAND_SETTINGS */
uint8_t            29 drivers/hid/hid-roccat-pyra.h 	uint8_t size; /* always 3 */
uint8_t            30 drivers/hid/hid-roccat-pyra.h 	uint8_t startup_profile; /* Range 0-4! */
uint8_t            34 drivers/hid/hid-roccat-pyra.h 	uint8_t command; /* PYRA_COMMAND_PROFILE_SETTINGS */
uint8_t            35 drivers/hid/hid-roccat-pyra.h 	uint8_t size; /* always 0xd */
uint8_t            36 drivers/hid/hid-roccat-pyra.h 	uint8_t number; /* Range 0-4 */
uint8_t            37 drivers/hid/hid-roccat-pyra.h 	uint8_t xysync;
uint8_t            38 drivers/hid/hid-roccat-pyra.h 	uint8_t x_sensitivity; /* 0x1-0xa */
uint8_t            39 drivers/hid/hid-roccat-pyra.h 	uint8_t y_sensitivity;
uint8_t            40 drivers/hid/hid-roccat-pyra.h 	uint8_t x_cpi; /* unused */
uint8_t            41 drivers/hid/hid-roccat-pyra.h 	uint8_t y_cpi; /* this value is for x and y */
uint8_t            42 drivers/hid/hid-roccat-pyra.h 	uint8_t lightswitch; /* 0 = off, 1 = on */
uint8_t            43 drivers/hid/hid-roccat-pyra.h 	uint8_t light_effect;
uint8_t            44 drivers/hid/hid-roccat-pyra.h 	uint8_t handedness;
uint8_t            49 drivers/hid/hid-roccat-pyra.h 	uint8_t command; /* PYRA_COMMAND_INFO */
uint8_t            50 drivers/hid/hid-roccat-pyra.h 	uint8_t size; /* always 6 */
uint8_t            51 drivers/hid/hid-roccat-pyra.h 	uint8_t firmware_version;
uint8_t            52 drivers/hid/hid-roccat-pyra.h 	uint8_t unknown1; /* always 0 */
uint8_t            53 drivers/hid/hid-roccat-pyra.h 	uint8_t unknown2; /* always 1 */
uint8_t            54 drivers/hid/hid-roccat-pyra.h 	uint8_t unknown3; /* always 0 */
uint8_t            73 drivers/hid/hid-roccat-pyra.h 	uint8_t report_number; /* always 3 */
uint8_t            74 drivers/hid/hid-roccat-pyra.h 	uint8_t unknown; /* always 0 */
uint8_t            75 drivers/hid/hid-roccat-pyra.h 	uint8_t type;
uint8_t            76 drivers/hid/hid-roccat-pyra.h 	uint8_t data1;
uint8_t            77 drivers/hid/hid-roccat-pyra.h 	uint8_t data2;
uint8_t            81 drivers/hid/hid-roccat-pyra.h 	uint8_t report_number; /* always 2 */
uint8_t            82 drivers/hid/hid-roccat-pyra.h 	uint8_t type;
uint8_t            83 drivers/hid/hid-roccat-pyra.h 	uint8_t unused; /* always 0 */
uint8_t           135 drivers/hid/hid-roccat-pyra.h 	uint8_t type;
uint8_t           136 drivers/hid/hid-roccat-pyra.h 	uint8_t value;
uint8_t           137 drivers/hid/hid-roccat-pyra.h 	uint8_t key;
uint8_t            27 drivers/hid/hid-roccat-ryos.c 	uint8_t number; /* RYOS_REPORT_NUMBER_SPECIAL */
uint8_t            28 drivers/hid/hid-roccat-ryos.c 	uint8_t data[4];
uint8_t           163 drivers/hid/hid-roccat-savu.c 			(uint8_t const *)&roccat_report);
uint8_t            15 drivers/hid/hid-roccat-savu.h 	uint8_t report_number; /* always 3 */
uint8_t            16 drivers/hid/hid-roccat-savu.h 	uint8_t zero;
uint8_t            17 drivers/hid/hid-roccat-savu.h 	uint8_t type;
uint8_t            18 drivers/hid/hid-roccat-savu.h 	uint8_t data[2];
uint8_t            48 drivers/hid/hid-roccat-savu.h 	uint8_t type;
uint8_t            49 drivers/hid/hid-roccat-savu.h 	uint8_t data[2];
uint8_t            36 drivers/hid/hid-roccat.c 	uint8_t *value;
uint8_t           252 drivers/hid/hid-roccat.c 	uint8_t *new_value;
uint8_t            20 drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c 		uint8_t             *i2c_hid_desc_buffer;
uint8_t            22 drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c 	uint8_t              *hid_report_desc;
uint8_t            24 drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c 	uint8_t              *i2c_name;
uint8_t            39 drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c 	.i2c_hid_desc_buffer = (uint8_t [])
uint8_t            56 drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c 	.hid_report_desc = (uint8_t [])
uint8_t           404 drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c struct i2c_hid_desc *i2c_hid_get_dmi_i2c_hid_desc_override(uint8_t *i2c_name)
uint8_t           420 drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c char *i2c_hid_get_dmi_hid_report_desc_override(uint8_t *i2c_name,
uint8_t             8 drivers/hid/i2c-hid/i2c-hid.h struct i2c_hid_desc *i2c_hid_get_dmi_i2c_hid_desc_override(uint8_t *i2c_name);
uint8_t             9 drivers/hid/i2c-hid/i2c-hid.h char *i2c_hid_get_dmi_hid_report_desc_override(uint8_t *i2c_name,
uint8_t            13 drivers/hid/i2c-hid/i2c-hid.h 		   *i2c_hid_get_dmi_i2c_hid_desc_override(uint8_t *i2c_name)
uint8_t            15 drivers/hid/i2c-hid/i2c-hid.h static inline char *i2c_hid_get_dmi_hid_report_desc_override(uint8_t *i2c_name,
uint8_t            45 drivers/hid/intel-ish-hid/ipc/hw-ish.h 	uint8_t ts1_source;
uint8_t            46 drivers/hid/intel-ish-hid/ipc/hw-ish.h 	uint8_t ts2_source;
uint8_t           438 drivers/hid/intel-ish-hid/ishtp-hid-client.c 	rv = ishtp_cl_send(client_data->hid_ishtp_cl, (uint8_t *)&msg,
uint8_t            30 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	command; /* Bit 7: is_response */
uint8_t            31 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	device_id;
uint8_t            32 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	status;
uint8_t            33 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	flags;
uint8_t            43 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	report_id;
uint8_t            48 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t dev_class;
uint8_t            54 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	major;
uint8_t            55 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	minor;
uint8_t            56 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	hotfix;
uint8_t            63 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	num_of_reports;
uint8_t            64 drivers/hid/intel-ish-hid/ishtp-hid.h 	uint8_t	flags;
uint8_t            67 drivers/hid/intel-ish-hid/ishtp-hid.h 		uint8_t report[1];
uint8_t           187 drivers/hid/intel-ish-hid/ishtp/bus.c int ishtp_fw_cl_by_id(struct ishtp_device *dev, uint8_t client_id)
uint8_t           528 drivers/hid/intel-ish-hid/ishtp/client.c int ishtp_cl_send(struct ishtp_cl *cl, uint8_t *buf, size_t length)
uint8_t           924 drivers/hid/intel-ish-hid/ishtp/client.c 		uint8_t	rd_msg_buf[ISHTP_RD_MSG_BUF_SIZE];
uint8_t            46 drivers/hid/intel-ish-hid/ishtp/client.h 	uint8_t	host_client_id;
uint8_t            47 drivers/hid/intel-ish-hid/ishtp/client.h 	uint8_t	fw_client_id;
uint8_t            48 drivers/hid/intel-ish-hid/ishtp/client.h 	uint8_t	ishtp_flow_ctrl_creds;
uint8_t            49 drivers/hid/intel-ish-hid/ishtp/client.h 	uint8_t	out_flow_ctrl_creds;
uint8_t           113 drivers/hid/intel-ish-hid/ishtp/client.h int ishtp_fw_cl_by_id(struct ishtp_device *dev, uint8_t client_id);
uint8_t           136 drivers/hid/intel-ish-hid/ishtp/client.h 				    uint8_t size);
uint8_t            45 drivers/hid/intel-ish-hid/ishtp/dma-if.c 					sizeof(uint8_t),
uint8_t           141 drivers/hid/intel-ish-hid/ishtp/dma-if.c 				    uint8_t size)
uint8_t            55 drivers/hid/intel-ish-hid/ishtp/hbm.c static inline void ishtp_hbm_cl_hdr(struct ishtp_cl *cl, uint8_t hbm_cmd,
uint8_t           194 drivers/hid/intel-ish-hid/ishtp/hbm.c 	uint8_t client_num;
uint8_t           771 drivers/hid/intel-ish-hid/ishtp/hbm.c 	uint8_t	rd_msg_buf[ISHTP_RD_MSG_BUF_SIZE];
uint8_t           878 drivers/hid/intel-ish-hid/ishtp/hbm.c 	uint8_t rd_msg_buf[ISHTP_RD_MSG_BUF_SIZE];
uint8_t           905 drivers/hid/intel-ish-hid/ishtp/hbm.c 	uint8_t cl_addr)
uint8_t            84 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t            85 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t data[0];
uint8_t            98 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t            99 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t fw_addr;
uint8_t           100 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t host_addr;
uint8_t           101 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t data;
uint8_t           105 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t minor_version;
uint8_t           106 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t major_version;
uint8_t           110 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           111 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved;
uint8_t           116 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           117 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t host_version_supported;
uint8_t           122 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           123 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reason;
uint8_t           124 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[2];
uint8_t           128 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           129 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[3];
uint8_t           133 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           134 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[3];
uint8_t           138 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           139 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[3];
uint8_t           140 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t valid_addresses[32];
uint8_t           145 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t protocol_version;
uint8_t           146 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t max_number_of_connections;
uint8_t           147 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t fixed_address;
uint8_t           148 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t single_recv_buf;
uint8_t           150 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t dma_hdr_len;
uint8_t           152 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved4;
uint8_t           153 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved5;
uint8_t           154 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved6;
uint8_t           158 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           159 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t address;
uint8_t           160 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[2];
uint8_t           164 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           165 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t address;
uint8_t           166 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t status;
uint8_t           167 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[1];
uint8_t           180 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           181 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t fw_addr;
uint8_t           182 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t host_addr;
uint8_t           183 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved;
uint8_t           195 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           196 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t fw_addr;
uint8_t           197 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t host_addr;
uint8_t           198 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t status;
uint8_t           205 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm_cmd;
uint8_t           206 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t fw_addr;
uint8_t           207 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t host_addr;
uint8_t           208 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[ISHTP_FC_MESSAGE_RESERVED_LENGTH];
uint8_t           212 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm;
uint8_t           213 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t status;
uint8_t           214 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved[2];
uint8_t           221 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t hbm;
uint8_t           222 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t fw_client_id;
uint8_t           223 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t host_client_id;
uint8_t           224 drivers/hid/intel-ish-hid/ishtp/hbm.h 	uint8_t reserved;
uint8_t            71 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h 	uint8_t client_id;
uint8_t           183 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h 	uint8_t fw_clients_num;
uint8_t           184 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h 	uint8_t fw_client_presentation_num;
uint8_t           185 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h 	uint8_t fw_client_index;
uint8_t           196 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h 	uint8_t *ishtp_dma_tx_map;
uint8_t            98 drivers/hwmon/ads7871.c 	uint8_t channel, mux_cnv;
uint8_t           160 drivers/hwmon/ads7871.c 	uint8_t val;
uint8_t            41 drivers/hwmon/max1111.c 	uint8_t tx_buf[MAX1111_TX_BUF_SIZE];
uint8_t            42 drivers/hwmon/max1111.c 	uint8_t rx_buf[MAX1111_RX_BUF_SIZE];
uint8_t            52 drivers/hwmon/max1111.c 	uint8_t v1, v2;
uint8_t           122 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t time_m;		/* Number of cycles for setup time */
uint8_t           123 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t time_n;		/* Number of cycles for hold time */
uint8_t           124 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t prescale;	/* Prescale divider */
uint8_t           125 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t time_p;		/* Timing coefficient */
uint8_t           126 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t no_div;		/* Disable clock divider */
uint8_t           127 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t time_div;	/* Post-prescale divider */
uint8_t           132 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t hs_hold;	/* Number of clock cycles SCL stays low until
uint8_t           134 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t hs_high_phase;	/* Number of clock cycles SCL stays high
uint8_t           136 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t hs_setup;	/* Number of clock cycles SCL stays low
uint8_t           138 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t prescale;	/* Prescale divider */
uint8_t           139 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t time_p;		/* Timing coefficient */
uint8_t           140 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t no_div;		/* Disable clock divider */
uint8_t           141 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t time_div;	/* Post-prescale divider */
uint8_t           291 drivers/i2c/busses/i2c-bcm-kona.c 					 uint8_t *buf, unsigned int len,
uint8_t           334 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t *tmp_buf = msg->buf;
uint8_t           355 drivers/i2c/busses/i2c-bcm-kona.c static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev *dev, uint8_t data,
uint8_t           402 drivers/i2c/busses/i2c-bcm-kona.c 					  uint8_t *buf, unsigned int len)
uint8_t           458 drivers/i2c/busses/i2c-bcm-kona.c 	uint8_t *tmp_buf = msg->buf;
uint8_t           604 drivers/i2c/busses/i2c-piix4.c static uint8_t piix4_imc_read(uint8_t idx)
uint8_t           610 drivers/i2c/busses/i2c-piix4.c static void piix4_imc_write(uint8_t idx, uint8_t value)
uint8_t           366 drivers/iio/accel/sca3000.c 				  uint8_t val)
uint8_t           148 drivers/iio/adc/ad7791.c 	uint8_t mode;
uint8_t           149 drivers/iio/adc/ad7791.c 	uint8_t filter;
uint8_t           238 drivers/iio/adc/ad7887.c 	uint8_t mode;
uint8_t            39 drivers/iio/adc/ad_sigma_delta.c void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm)
uint8_t            60 drivers/iio/adc/ad_sigma_delta.c 	uint8_t *data = sigma_delta->data;
uint8_t           102 drivers/iio/adc/ad_sigma_delta.c 	unsigned int reg, unsigned int size, uint8_t *val)
uint8_t           104 drivers/iio/adc/ad_sigma_delta.c 	uint8_t *data = sigma_delta->data;
uint8_t           191 drivers/iio/adc/ad_sigma_delta.c 	uint8_t *buf;
uint8_t           407 drivers/iio/adc/ad_sigma_delta.c 	uint8_t data[16];
uint8_t           303 drivers/iio/dac/ad5446.c 	uint8_t data[3];
uint8_t            39 drivers/iio/dac/ad7303.c 	uint8_t dac_cache[2];
uint8_t            52 drivers/iio/dac/ad7303.c 	uint8_t val)
uint8_t            58 drivers/iio/dac/ds4424.c 	uint8_t save[DS4424_MAX_DAC_CHANNELS];
uint8_t            60 drivers/iio/dac/ds4424.c 	uint8_t raw[DS4424_MAX_DAC_CHANNELS];
uint8_t            29 drivers/iio/dac/ti-dac7612.c 	uint8_t data[2] ____cacheline_aligned;
uint8_t           374 drivers/iio/imu/adis16400.c 	uint8_t val = 0;
uint8_t           497 drivers/iio/imu/adis16400.c static const uint8_t adis16400_addresses[] = {
uint8_t           572 drivers/iio/light/si1133.c static int si1133_update_adcconfig(struct si1133_data *data, uint8_t adc,
uint8_t           202 drivers/iio/temperature/mlx90632.c static int mlx90632_channel_new_select(int perform_ret, uint8_t *channel_new,
uint8_t           203 drivers/iio/temperature/mlx90632.c 				       uint8_t *channel_old)
uint8_t          3383 drivers/infiniband/core/cma.c 			  struct rdma_id_private *id_priv, uint8_t reuseaddr)
uint8_t            80 drivers/infiniband/hw/mlx4/mcg.c 	uint8_t			join_state;
uint8_t           451 drivers/infiniband/hw/mlx5/cq.c 	uint8_t opcode;
uint8_t           399 drivers/infiniband/hw/ocrdma/ocrdma.h 		uint8_t  signaled;
uint8_t           400 drivers/infiniband/hw/ocrdma/ocrdma.h 		uint8_t  rsvd[3];
uint8_t           974 drivers/infiniband/hw/qib/qib_sd7220.c 	uint8_t reg_vals[NUM_DDS_REGS];
uint8_t           161 drivers/infiniband/ulp/iser/iscsi_iser.c iscsi_iser_pdu_alloc(struct iscsi_task *task, uint8_t opcode)
uint8_t            70 drivers/input/joystick/as5011.c 			    uint8_t aregaddr,
uint8_t            71 drivers/input/joystick/as5011.c 			    uint8_t avalue)
uint8_t            73 drivers/input/joystick/as5011.c 	uint8_t data[2] = { aregaddr, avalue };
uint8_t            78 drivers/input/joystick/as5011.c 		.buf = (uint8_t *)data
uint8_t            87 drivers/input/joystick/as5011.c 			   uint8_t aregaddr, signed char *value)
uint8_t            89 drivers/input/joystick/as5011.c 	uint8_t data[2] = { aregaddr };
uint8_t            95 drivers/input/joystick/as5011.c 			.buf = (uint8_t *)data
uint8_t           101 drivers/input/joystick/as5011.c 			.buf = (uint8_t *)data
uint8_t            39 drivers/input/keyboard/adp5520-keys.c 	uint8_t reg_val_lo, reg_val_hi;
uint8_t            50 drivers/input/keyboard/cros_ec_keyb.c 	uint8_t *valid_keys;
uint8_t            51 drivers/input/keyboard/cros_ec_keyb.c 	uint8_t *old_kb_state;
uint8_t           116 drivers/input/keyboard/cros_ec_keyb.c static bool cros_ec_keyb_has_ghosting(struct cros_ec_keyb *ckdev, uint8_t *buf)
uint8_t           120 drivers/input/keyboard/cros_ec_keyb.c 	uint8_t *valid_keys = ckdev->valid_keys;
uint8_t           157 drivers/input/keyboard/cros_ec_keyb.c 			 uint8_t *kb_state, int len)
uint8_t           229 drivers/input/keyboard/cros_ec_keyb.c 	uint8_t mkbp_event_type = ckdev->ec->event_data.event_type &
uint8_t            56 drivers/input/keyboard/goldfish_events.c 	uint8_t val;
uint8_t           329 drivers/input/keyboard/hil_kbd.c 	uint8_t did = kbd->idd[0];
uint8_t           356 drivers/input/keyboard/hil_kbd.c 	uint8_t did = ptr->idd[0];
uint8_t           357 drivers/input/keyboard/hil_kbd.c 	uint8_t *idd = ptr->idd + 1;
uint8_t           447 drivers/input/keyboard/hil_kbd.c 	uint8_t did, *idd;
uint8_t            79 drivers/input/misc/hp_sdc_rtc.c 			    uint8_t status, uint8_t data) 
uint8_t            88 drivers/input/misc/hp_sdc_rtc.c 	uint8_t tseq[91];
uint8_t           154 drivers/input/misc/hp_sdc_rtc.c static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
uint8_t           157 drivers/input/misc/hp_sdc_rtc.c 	uint8_t tseq[26] = {
uint8_t           294 drivers/input/misc/hp_sdc_rtc.c 	uint8_t tseq[11] = {
uint8_t           315 drivers/input/misc/hp_sdc_rtc.c 	tseq[3] = (uint8_t)(tenms & 0xff);
uint8_t           316 drivers/input/misc/hp_sdc_rtc.c 	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
uint8_t           317 drivers/input/misc/hp_sdc_rtc.c 	tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
uint8_t           319 drivers/input/misc/hp_sdc_rtc.c 	tseq[9] = (uint8_t)(days & 0xff);
uint8_t           320 drivers/input/misc/hp_sdc_rtc.c 	tseq[10] = (uint8_t)((days >> 8) & 0xff);
uint8_t           333 drivers/input/misc/hp_sdc_rtc.c 	uint8_t tseq[5] = {
uint8_t           346 drivers/input/misc/hp_sdc_rtc.c 	tseq[3] = (uint8_t)(tenms & 0xff);
uint8_t           347 drivers/input/misc/hp_sdc_rtc.c 	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
uint8_t           369 drivers/input/misc/hp_sdc_rtc.c static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd)
uint8_t           373 drivers/input/misc/hp_sdc_rtc.c 	uint8_t tseq[6] = {
uint8_t           387 drivers/input/misc/hp_sdc_rtc.c 	tseq[3] = (uint8_t)(tenms & 0xff);
uint8_t           388 drivers/input/misc/hp_sdc_rtc.c 	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
uint8_t           389 drivers/input/misc/hp_sdc_rtc.c 	tseq[5] = (uint8_t)((tenms >> 16)  & 0xff);
uint8_t           797 drivers/input/serio/hil_mlc.c 	uint8_t *idx, *last;
uint8_t           114 drivers/input/serio/hp_sdc.c static inline uint8_t hp_sdc_status_in8(void)
uint8_t           116 drivers/input/serio/hp_sdc.c 	uint8_t status;
uint8_t           128 drivers/input/serio/hp_sdc.c static inline uint8_t hp_sdc_data_in8(void)
uint8_t           133 drivers/input/serio/hp_sdc.c static inline void hp_sdc_status_out8(uint8_t val)
uint8_t           145 drivers/input/serio/hp_sdc.c static inline void hp_sdc_data_out8(uint8_t val)
uint8_t           181 drivers/input/serio/hp_sdc.c static void hp_sdc_take(int irq, void *dev_id, uint8_t status, uint8_t data)
uint8_t           221 drivers/input/serio/hp_sdc.c 	uint8_t status, data;
uint8_t           314 drivers/input/serio/hp_sdc.c 			uint8_t tmp;
uint8_t           351 drivers/input/serio/hp_sdc.c 	uint8_t act;
uint8_t           473 drivers/input/serio/hp_sdc.c 		uint8_t w7[4];
uint8_t           542 drivers/input/serio/hp_sdc.c 		uint8_t postcmd;
uint8_t           832 drivers/input/serio/hp_sdc.c 	uint8_t ts_sync[6];
uint8_t           997 drivers/input/serio/hp_sdc.c 	uint8_t tq_init_seq[5];
uint8_t            62 drivers/input/serio/hp_sdc_mlc.c 			    uint8_t status, uint8_t data)
uint8_t          1727 drivers/input/touchscreen/atmel_mxt_ts.c 	uint8_t num_objects;
uint8_t           129 drivers/input/touchscreen/auo-pixcir-ts.c 	uint8_t raw_coord[8];
uint8_t           130 drivers/input/touchscreen/auo-pixcir-ts.c 	uint8_t raw_area[4];
uint8_t            83 drivers/input/touchscreen/da9034-ts.c 	uint8_t _x, _y, _v;
uint8_t            45 drivers/leds/leds-da903x.c 	uint8_t val;
uint8_t           108 drivers/leds/leds-lp8860.c 	uint8_t reg;
uint8_t           109 drivers/leds/leds-lp8860.c 	uint8_t value;
uint8_t            76 drivers/md/bcache/alloc.c uint8_t bch_inc_gen(struct cache *ca, struct bucket *b)
uint8_t            78 drivers/md/bcache/alloc.c 	uint8_t ret = ++b->gen;
uint8_t           200 drivers/md/bcache/bcache.h 	uint8_t		gen;
uint8_t           201 drivers/md/bcache/bcache.h 	uint8_t		last_gc; /* Most out of date gen in the btree */
uint8_t           623 drivers/md/bcache/bcache.h 	uint8_t			need_gc;
uint8_t           644 drivers/md/bcache/bcache.h 	uint8_t			gc_after_writeback;
uint8_t           803 drivers/md/bcache/bcache.h static inline uint8_t gen_after(uint8_t a, uint8_t b)
uint8_t           805 drivers/md/bcache/bcache.h 	uint8_t r = a - b;
uint8_t           810 drivers/md/bcache/bcache.h static inline uint8_t ptr_stale(struct cache_set *c, const struct bkey *k,
uint8_t           895 drivers/md/bcache/bcache.h static inline uint8_t bucket_gc_gen(struct bucket *b)
uint8_t           961 drivers/md/bcache/bcache.h uint8_t bch_inc_gen(struct cache *ca, struct bucket *b);
uint8_t          1008 drivers/md/bcache/bcache.h 			  uint8_t *set_uuid);
uint8_t           285 drivers/md/bcache/bset.c 	return btree_keys_cachelines(b) * sizeof(uint8_t);
uint8_t           564 drivers/md/bcache/bset.c static inline uint64_t shrd128(uint64_t high, uint64_t low, uint8_t shift)
uint8_t           183 drivers/md/bcache/bset.h 	uint8_t			*prev;
uint8_t           219 drivers/md/bcache/bset.h 	uint8_t			page_order;
uint8_t           220 drivers/md/bcache/bset.h 	uint8_t			nsets;
uint8_t          1236 drivers/md/bcache/btree.c static uint8_t __bch_btree_mark_key(struct cache_set *c, int level,
uint8_t          1239 drivers/md/bcache/btree.c 	uint8_t stale = 0;
uint8_t          1317 drivers/md/bcache/btree.c 	uint8_t stale = 0;
uint8_t           135 drivers/md/bcache/btree.h 	uint8_t			level;
uint8_t          1101 drivers/md/bcache/super.c 			  uint8_t *set_uuid)
uint8_t           411 drivers/md/bcache/sysfs.c 		uint8_t		set_uuid[16];
uint8_t            18 drivers/media/dvb-frontends/as102_fe.c 	uint8_t elna_cfg;
uint8_t            26 drivers/media/dvb-frontends/as102_fe.c static uint8_t as102_fe_get_code_rate(enum fe_code_rate arg)
uint8_t            28 drivers/media/dvb-frontends/as102_fe.c 	uint8_t c;
uint8_t           444 drivers/media/dvb-frontends/as102_fe.c 				  uint8_t elna_cfg)
uint8_t            20 drivers/media/dvb-frontends/as102_fe.h 				  uint8_t elna_cfg);
uint8_t           100 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t modulation;
uint8_t           101 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t hierarchy;
uint8_t           102 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t interleaving_mode;
uint8_t           103 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t code_rate_HP;
uint8_t           104 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t code_rate_LP;
uint8_t           105 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t guard_interval;
uint8_t           106 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t transmission_mode;
uint8_t           107 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t DVBH_mask_HP;
uint8_t           108 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t DVBH_mask_LP;
uint8_t           116 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t bandwidth;
uint8_t           118 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t hier_select;
uint8_t           120 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t modulation;
uint8_t           122 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t hierarchy;
uint8_t           124 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t interleaving_mode;
uint8_t           126 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t code_rate;
uint8_t           128 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t guard_interval;
uint8_t           130 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t transmission_mode;
uint8_t           135 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t tune_state;
uint8_t           154 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t has_started;
uint8_t           159 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t  type; /* Red TS_PID_TYPE_<N> values */
uint8_t           160 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t  idx;  /* index in filtering table */
uint8_t           164 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t mode;
uint8_t           166 drivers/media/dvb-frontends/as102_fe_types.h 		uint8_t  value8;   /* 8 bit value */
uint8_t           176 drivers/media/dvb-frontends/as102_fe_types.h 	uint8_t mode;
uint8_t          2175 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t nominalRate8bw[3][5] = {
uint8_t          2182 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t nominalRate7bw[3][5] = {
uint8_t          2189 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t nominalRate6bw[3][5] = {
uint8_t          2196 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t nominalRate5bw[3][5] = {
uint8_t          2203 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t nominalRate17bw[3][5] = {
uint8_t          2210 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t itbCoef8bw[3][14] = {
uint8_t          2219 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t itbCoef7bw[3][14] = {
uint8_t          2228 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t itbCoef6bw[3][14] = {
uint8_t          2237 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t itbCoef5bw[3][14] = {
uint8_t          2246 drivers/media/dvb-frontends/cxd2841er.c 	static const uint8_t itbCoef17bw[3][14] = {
uint8_t            76 drivers/media/dvb-frontends/dib7000m.h 						uint8_t onoff)
uint8_t          1968 drivers/media/dvb-frontends/dib8000.c static u32 dib8000_ctrl_timf(struct dvb_frontend *fe, uint8_t op, uint32_t timf)
uint8_t            53 drivers/media/dvb-frontends/dib8000.h 	u32 (*ctrl_timf)(struct dvb_frontend *fe, uint8_t op, uint32_t timf);
uint8_t           136 drivers/media/dvb-frontends/helene.c 	uint8_t RF_GAIN;
uint8_t           139 drivers/media/dvb-frontends/helene.c 	uint8_t IF_BPF_GC;
uint8_t           143 drivers/media/dvb-frontends/helene.c 	uint8_t RFOVLD_DET_LV1_VL;
uint8_t           147 drivers/media/dvb-frontends/helene.c 	uint8_t RFOVLD_DET_LV1_VH;
uint8_t           151 drivers/media/dvb-frontends/helene.c 	uint8_t RFOVLD_DET_LV1_U;
uint8_t           155 drivers/media/dvb-frontends/helene.c 	uint8_t IFOVLD_DET_LV_VL;
uint8_t           159 drivers/media/dvb-frontends/helene.c 	uint8_t IFOVLD_DET_LV_VH;
uint8_t           163 drivers/media/dvb-frontends/helene.c 	uint8_t IFOVLD_DET_LV_U;
uint8_t           167 drivers/media/dvb-frontends/helene.c 	uint8_t IF_BPF_F0;
uint8_t           172 drivers/media/dvb-frontends/helene.c 	uint8_t BW;
uint8_t           176 drivers/media/dvb-frontends/helene.c 	uint8_t FIF_OFFSET;
uint8_t           181 drivers/media/dvb-frontends/helene.c 	uint8_t BW_OFFSET;
uint8_t           185 drivers/media/dvb-frontends/helene.c 	uint8_t IS_LOWERLOCAL;
uint8_t           607 drivers/media/dvb-frontends/helene.c 			data[11] = (uint8_t)((symbol_rate * 47
uint8_t           610 drivers/media/dvb-frontends/helene.c 			data[11] = (uint8_t)((symbol_rate * 27
uint8_t           620 drivers/media/dvb-frontends/helene.c 			data[11] = (uint8_t)((symbol_rate * 11
uint8_t           623 drivers/media/dvb-frontends/helene.c 			data[11] = (uint8_t)((symbol_rate * 3
uint8_t           637 drivers/media/dvb-frontends/helene.c 	data[12] = (uint8_t)(frequency4kHz & 0xFF);         /* FRF_L */
uint8_t           638 drivers/media/dvb-frontends/helene.c 	data[13] = (uint8_t)((frequency4kHz >> 8) & 0xFF);  /* FRF_M */
uint8_t           640 drivers/media/dvb-frontends/helene.c 	data[14] = (uint8_t)((frequency4kHz >> 16) & 0x0F);
uint8_t           709 drivers/media/dvb-frontends/helene.c 	data[1] = (uint8_t)(terr_params[tv_system].IS_LOWERLOCAL & 0x01);
uint8_t           755 drivers/media/dvb-frontends/helene.c 		data[1] = (uint8_t)((terr_params[tv_system].RF_GAIN
uint8_t           759 drivers/media/dvb-frontends/helene.c 	data[1] |= (uint8_t)(terr_params[tv_system].IF_BPF_GC & 0x0F);
uint8_t           764 drivers/media/dvb-frontends/helene.c 		data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VL
uint8_t           766 drivers/media/dvb-frontends/helene.c 		data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VL
uint8_t           769 drivers/media/dvb-frontends/helene.c 		data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VH
uint8_t           771 drivers/media/dvb-frontends/helene.c 		data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VH
uint8_t           774 drivers/media/dvb-frontends/helene.c 		data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_U
uint8_t           776 drivers/media/dvb-frontends/helene.c 		data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_U
uint8_t           784 drivers/media/dvb-frontends/helene.c 	data[5] = (uint8_t)((terr_params[tv_system].IF_BPF_F0 << 4) & 0x30);
uint8_t           787 drivers/media/dvb-frontends/helene.c 	data[5] |= (uint8_t)(terr_params[tv_system].BW & 0x03);
uint8_t           790 drivers/media/dvb-frontends/helene.c 	data[6] = (uint8_t)(terr_params[tv_system].FIF_OFFSET & 0x1F);
uint8_t           793 drivers/media/dvb-frontends/helene.c 	data[7] = (uint8_t)(terr_params[tv_system].BW_OFFSET & 0x1F);
uint8_t           796 drivers/media/dvb-frontends/helene.c 	data[8]  = (uint8_t)(frequencykHz & 0xFF);         /* FRF_L */
uint8_t           797 drivers/media/dvb-frontends/helene.c 	data[9]  = (uint8_t)((frequencykHz >> 8) & 0xFF);  /* FRF_M */
uint8_t           798 drivers/media/dvb-frontends/helene.c 	data[10] = (uint8_t)((frequencykHz >> 16)
uint8_t           922 drivers/media/dvb-frontends/helene.c 	data[1] = (uint8_t)(0x80 | (0x04 & 0x1F)); /* 4 x 25 = 100uA */
uint8_t           923 drivers/media/dvb-frontends/helene.c 	data[2] = (uint8_t)(0x80 | (0x26 & 0x7F)); /* 38 x 0.25 = 9.5pF */
uint8_t           969 drivers/media/dvb-frontends/helene.c 	helene_write_reg(priv, 0x95, (uint8_t)((data[0] >> 4) & 0x0F));
uint8_t           234 drivers/media/i2c/adv7511-v4l2.c static void adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
uint8_t          2421 drivers/media/i2c/adv7604.c 	uint8_t buffer[32];
uint8_t           322 drivers/media/i2c/ov6650.c 	uint8_t reg, reg2;
uint8_t           289 drivers/media/i2c/saa6752hs.c static inline void set_reg8(struct i2c_client *client, uint8_t reg, uint8_t val)
uint8_t           298 drivers/media/i2c/saa6752hs.c static inline void set_reg16(struct i2c_client *client, uint8_t reg, uint16_t val)
uint8_t            31 drivers/media/i2c/smiapp-pll.h 	uint8_t bus_type;
uint8_t            34 drivers/media/i2c/smiapp-pll.h 			uint8_t lanes;
uint8_t            37 drivers/media/i2c/smiapp-pll.h 			uint8_t bus_width;
uint8_t            41 drivers/media/i2c/smiapp-pll.h 	uint8_t binning_horizontal;
uint8_t            42 drivers/media/i2c/smiapp-pll.h 	uint8_t binning_vertical;
uint8_t            43 drivers/media/i2c/smiapp-pll.h 	uint8_t scale_m;
uint8_t            44 drivers/media/i2c/smiapp-pll.h 	uint8_t scale_n;
uint8_t            45 drivers/media/i2c/smiapp-pll.h 	uint8_t bits_per_pixel;
uint8_t          1241 drivers/media/i2c/tc358743.c 	uint8_t hdmi_sys_status =  i2c_rd8(sd, SYS_STATUS);
uint8_t            42 drivers/media/i2c/ths8200.c 	uint8_t chip_version;
uint8_t            98 drivers/media/i2c/ths8200.c 		     uint8_t clr_mask, uint8_t val_mask)
uint8_t           126 drivers/media/i2c/ths8200.c 	uint8_t reg_03 = ths8200_read(sd, THS8200_CHIP_CTL);
uint8_t           216 drivers/media/i2c/ths8200.c 	uint8_t polarity = 0;
uint8_t            45 drivers/media/platform/cros-ec-cec/cros-ec-cec.c 	uint8_t *cec_message = cros_ec->event_data.data.cec_message;
uint8_t            31 drivers/media/platform/vicodec/codec-fwht.c static const uint8_t zigzag[64] = {
uint8_t            41 drivers/media/rc/igorplugusb.c 	uint8_t buf_in[MAX_PACKET];
uint8_t           179 drivers/media/rc/igorplugusb.c 		usb_rcvctrlpipe(udev, 0), (uint8_t *)&ir->request,
uint8_t            27 drivers/media/rc/iguanair.c 	uint8_t bufsize;
uint8_t            28 drivers/media/rc/iguanair.c 	uint8_t cycle_overhead;
uint8_t            35 drivers/media/rc/iguanair.c 	uint8_t *buf_in;
uint8_t            69 drivers/media/rc/iguanair.c 	uint8_t direction;
uint8_t            70 drivers/media/rc/iguanair.c 	uint8_t cmd;
uint8_t            75 drivers/media/rc/iguanair.c 	uint8_t length;
uint8_t            76 drivers/media/rc/iguanair.c 	uint8_t channels;
uint8_t            77 drivers/media/rc/iguanair.c 	uint8_t busy7;
uint8_t            78 drivers/media/rc/iguanair.c 	uint8_t busy4;
uint8_t            79 drivers/media/rc/iguanair.c 	uint8_t payload[0];
uint8_t            35 drivers/media/rc/ttusbir.c 	uint8_t bulk_buffer[5];
uint8_t           109 drivers/media/rc/ttusbir.c static void ttusbir_process_ir_data(struct ttusbir *tt, uint8_t *buf)
uint8_t          1221 drivers/media/tuners/r820t.c 		uint8_t mix_index = 0, lna_index = 0;
uint8_t            54 drivers/media/usb/as102/as102_drv.h 	uint8_t elna_cfg;
uint8_t           126 drivers/media/usb/as102/as102_fw.c 							     (uint8_t *)
uint8_t           141 drivers/media/usb/as102/as102_fw.c 								     (uint8_t *)
uint8_t            49 drivers/media/usb/as102/as102_usb_drv.c static uint8_t const as102_elna_cfg[] = {
uint8_t            35 drivers/media/usb/as102/as10x_cmd.c 		error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
uint8_t            38 drivers/media/usb/as102/as10x_cmd.c 					    (uint8_t *) prsp,
uint8_t            77 drivers/media/usb/as102/as10x_cmd.c 			adap, (uint8_t *) pcmd,
uint8_t            79 drivers/media/usb/as102/as10x_cmd.c 			(uint8_t *) prsp,
uint8_t           130 drivers/media/usb/as102/as10x_cmd.c 					    (uint8_t *) preq,
uint8_t           133 drivers/media/usb/as102/as10x_cmd.c 					    (uint8_t *) prsp,
uint8_t           176 drivers/media/usb/as102/as10x_cmd.c 			(uint8_t *) preq,
uint8_t           178 drivers/media/usb/as102/as10x_cmd.c 			(uint8_t *) prsp,
uint8_t           227 drivers/media/usb/as102/as10x_cmd.c 					    (uint8_t *) pcmd,
uint8_t           230 drivers/media/usb/as102/as10x_cmd.c 					    (uint8_t *) prsp,
uint8_t           286 drivers/media/usb/as102/as10x_cmd.c 				(uint8_t *) pcmd,
uint8_t           289 drivers/media/usb/as102/as10x_cmd.c 				(uint8_t *) prsp,
uint8_t           327 drivers/media/usb/as102/as10x_cmd.c 			       uint8_t *is_ready)
uint8_t           346 drivers/media/usb/as102/as10x_cmd.c 					(uint8_t *) pcmd,
uint8_t           349 drivers/media/usb/as102/as10x_cmd.c 					(uint8_t *) prsp,
uint8_t            93 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           108 drivers/media/usb/as102/as10x_cmd.h 		uint8_t err;
uint8_t           125 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           140 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           157 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           174 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           186 drivers/media/usb/as102/as10x_cmd.h 		uint8_t stream_type;
uint8_t           188 drivers/media/usb/as102/as10x_cmd.h 		uint8_t idx;
uint8_t           195 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           197 drivers/media/usb/as102/as10x_cmd.h 		uint8_t filter_id;
uint8_t           214 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           229 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           244 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           259 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           276 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           278 drivers/media/usb/as102/as10x_cmd.h 		uint8_t is_ready;
uint8_t           303 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           322 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           339 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           351 drivers/media/usb/as102/as10x_cmd.h 		uint8_t mode;
uint8_t           358 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           377 drivers/media/usb/as102/as10x_cmd.h 		uint8_t dump_req;
uint8_t           388 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           390 drivers/media/usb/as102/as10x_cmd.h 		uint8_t dump_rsp;
uint8_t           393 drivers/media/usb/as102/as10x_cmd.h 			uint8_t  data8[DUMP_BLOCK_SIZE];
uint8_t           405 drivers/media/usb/as102/as10x_cmd.h 		uint8_t dump_req;
uint8_t           411 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           413 drivers/media/usb/as102/as10x_cmd.h 		uint8_t dump_rsp;
uint8_t           415 drivers/media/usb/as102/as10x_cmd.h 		uint8_t data[DUMP_BLOCK_SIZE];
uint8_t           423 drivers/media/usb/as102/as10x_cmd.h 		uint8_t data[64 - sizeof(struct as10x_cmd_header_t)
uint8_t           429 drivers/media/usb/as102/as10x_cmd.h 		uint8_t error;
uint8_t           430 drivers/media/usb/as102/as10x_cmd.h 		uint8_t data[64 - sizeof(struct as10x_cmd_header_t)
uint8_t           493 drivers/media/usb/as102/as10x_cmd.h 			       uint8_t *is_ready);
uint8_t           512 drivers/media/usb/as102/as10x_cmd.h int as10x_cmd_eLNA_change_mode(struct as10x_bus_adapter_t *adap, uint8_t mode);
uint8_t            44 drivers/media/usb/as102/as10x_cmd_cfg.c 					     (uint8_t *) pcmd,
uint8_t            47 drivers/media/usb/as102/as10x_cmd_cfg.c 					     (uint8_t *) prsp,
uint8_t           102 drivers/media/usb/as102/as10x_cmd_cfg.c 					     (uint8_t *) pcmd,
uint8_t           105 drivers/media/usb/as102/as10x_cmd_cfg.c 					     (uint8_t *) prsp,
uint8_t           134 drivers/media/usb/as102/as10x_cmd_cfg.c int as10x_cmd_eLNA_change_mode(struct as10x_bus_adapter_t *adap, uint8_t mode)
uint8_t           153 drivers/media/usb/as102/as10x_cmd_cfg.c 		error  = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
uint8_t           155 drivers/media/usb/as102/as10x_cmd_cfg.c 				+ HEADER_SIZE, (uint8_t *) prsp,
uint8_t            44 drivers/media/usb/as102/as10x_cmd_stream.c 		error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
uint8_t            46 drivers/media/usb/as102/as10x_cmd_stream.c 				+ HEADER_SIZE, (uint8_t *) prsp,
uint8_t            95 drivers/media/usb/as102/as10x_cmd_stream.c 		error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
uint8_t            97 drivers/media/usb/as102/as10x_cmd_stream.c 				+ HEADER_SIZE, (uint8_t *) prsp,
uint8_t           138 drivers/media/usb/as102/as10x_cmd_stream.c 		error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
uint8_t           140 drivers/media/usb/as102/as10x_cmd_stream.c 				+ HEADER_SIZE, (uint8_t *) prsp,
uint8_t           181 drivers/media/usb/as102/as10x_cmd_stream.c 		error = adap->ops->xfer_cmd(adap, (uint8_t *) pcmd,
uint8_t           183 drivers/media/usb/as102/as10x_cmd_stream.c 				+ HEADER_SIZE, (uint8_t *) prsp,
uint8_t            34 drivers/media/usb/as102/as10x_handle.h 	int (*read_write)(struct as10x_bus_adapter_t *bus_adap, uint8_t mode,
uint8_t            56 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t bandwidth;
uint8_t            58 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t flags;
uint8_t            60 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t snr;
uint8_t            64 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t lock_bits;
uint8_t            65 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t prev_lock_bits;
uint8_t            70 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t cmd;
uint8_t            72 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t bandwidth;
uint8_t            74 drivers/media/usb/dvb-usb/cinergyT2.h 	uint8_t flags;
uint8_t           166 drivers/media/usb/dvb-usb/dib0700_core.c 	uint8_t bus_mode = 1;  /* 0=eeprom bus, 1=frontend bus */
uint8_t           167 drivers/media/usb/dvb-usb/dib0700_core.c 	uint8_t gen_mode = 0; /* 0=master i2c, 1=gpio i2c */
uint8_t           168 drivers/media/usb/dvb-usb/dib0700_core.c 	uint8_t en_start = 0;
uint8_t           169 drivers/media/usb/dvb-usb/dib0700_core.c 	uint8_t en_stop = 0;
uint8_t           197 drivers/media/usb/dvb-usb/dib0700_core.c 			uint8_t i2c_dest;
uint8_t            29 drivers/media/usb/gspca/kinect.c 	uint8_t magic[2];
uint8_t            30 drivers/media/usb/gspca/kinect.c 	uint8_t pad;
uint8_t            31 drivers/media/usb/gspca/kinect.c 	uint8_t flag;
uint8_t            32 drivers/media/usb/gspca/kinect.c 	uint8_t unk1;
uint8_t            33 drivers/media/usb/gspca/kinect.c 	uint8_t seq;
uint8_t            34 drivers/media/usb/gspca/kinect.c 	uint8_t unk2;
uint8_t            35 drivers/media/usb/gspca/kinect.c 	uint8_t unk3;
uint8_t            40 drivers/media/usb/gspca/kinect.c 	uint8_t magic[2];
uint8_t            50 drivers/media/usb/gspca/kinect.c 	uint8_t stream_flag;        /* to identify different stream types */
uint8_t            51 drivers/media/usb/gspca/kinect.c 	uint8_t obuf[0x400];        /* output buffer for control commands */
uint8_t            52 drivers/media/usb/gspca/kinect.c 	uint8_t ibuf[0x200];        /* input buffer for control commands */
uint8_t           101 drivers/media/usb/gspca/kinect.c static int kinect_write(struct usb_device *udev, uint8_t *data,
uint8_t           111 drivers/media/usb/gspca/kinect.c static int kinect_read(struct usb_device *udev, uint8_t *data, uint16_t wLength)
uint8_t           126 drivers/media/usb/gspca/kinect.c 	uint8_t *obuf = sd->obuf;
uint8_t           127 drivers/media/usb/gspca/kinect.c 	uint8_t *ibuf = sd->ibuf;
uint8_t           277 drivers/media/usb/gspca/kinect.c 	uint8_t fmt_reg, fmt_val;
uint8_t           278 drivers/media/usb/gspca/kinect.c 	uint8_t res_reg, res_val;
uint8_t           279 drivers/media/usb/gspca/kinect.c 	uint8_t fps_reg, fps_val;
uint8_t           280 drivers/media/usb/gspca/kinect.c 	uint8_t mode_val;
uint8_t           384 drivers/media/usb/gspca/kinect.c 	uint8_t *data = __data + sizeof(*hdr);
uint8_t           387 drivers/media/usb/gspca/kinect.c 	uint8_t sof = sd->stream_flag | 1;
uint8_t           388 drivers/media/usb/gspca/kinect.c 	uint8_t mof = sd->stream_flag | 2;
uint8_t           389 drivers/media/usb/gspca/kinect.c 	uint8_t eof = sd->stream_flag | 5;
uint8_t           324 drivers/media/usb/tm6000/tm6000-stds.c 	uint8_t areg_02 = 0x04; /* GC1 Fixed gain 0dB */
uint8_t           325 drivers/media/usb/tm6000/tm6000-stds.c 	uint8_t areg_05 = 0x01; /* Auto 4.5 = M Japan, Auto 6.5 = DK */
uint8_t           326 drivers/media/usb/tm6000/tm6000-stds.c 	uint8_t areg_06 = 0x02; /* Auto de-emphasis, manual channel mode */
uint8_t            39 drivers/mfd/adp5520.c 	uint8_t mode;
uint8_t            43 drivers/mfd/adp5520.c 				int reg, uint8_t *val)
uint8_t            53 drivers/mfd/adp5520.c 	*val = (uint8_t)ret;
uint8_t            58 drivers/mfd/adp5520.c 				 int reg, uint8_t val)
uint8_t            72 drivers/mfd/adp5520.c 			      uint8_t bit_mask)
uint8_t            75 drivers/mfd/adp5520.c 	uint8_t reg_val;
uint8_t            91 drivers/mfd/adp5520.c int adp5520_write(struct device *dev, int reg, uint8_t val)
uint8_t            97 drivers/mfd/adp5520.c int adp5520_read(struct device *dev, int reg, uint8_t *val)
uint8_t           103 drivers/mfd/adp5520.c int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask)
uint8_t           106 drivers/mfd/adp5520.c 	uint8_t reg_val;
uint8_t           123 drivers/mfd/adp5520.c int adp5520_clr_bits(struct device *dev, int reg, uint8_t bit_mask)
uint8_t           126 drivers/mfd/adp5520.c 	uint8_t reg_val;
uint8_t           178 drivers/mfd/adp5520.c 	uint8_t reg_val;
uint8_t            72 drivers/mfd/da903x.c 				int reg, uint8_t *val)
uint8_t            82 drivers/mfd/da903x.c 	*val = (uint8_t)ret;
uint8_t            87 drivers/mfd/da903x.c 				 int len, uint8_t *val)
uint8_t           100 drivers/mfd/da903x.c 				 int reg, uint8_t val)
uint8_t           114 drivers/mfd/da903x.c 				  int len, uint8_t *val)
uint8_t           146 drivers/mfd/da903x.c int da903x_write(struct device *dev, int reg, uint8_t val)
uint8_t           152 drivers/mfd/da903x.c int da903x_writes(struct device *dev, int reg, int len, uint8_t *val)
uint8_t           158 drivers/mfd/da903x.c int da903x_read(struct device *dev, int reg, uint8_t *val)
uint8_t           164 drivers/mfd/da903x.c int da903x_reads(struct device *dev, int reg, int len, uint8_t *val)
uint8_t           170 drivers/mfd/da903x.c int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask)
uint8_t           173 drivers/mfd/da903x.c 	uint8_t reg_val;
uint8_t           192 drivers/mfd/da903x.c int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask)
uint8_t           195 drivers/mfd/da903x.c 	uint8_t reg_val;
uint8_t           214 drivers/mfd/da903x.c int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask)
uint8_t           217 drivers/mfd/da903x.c 	uint8_t reg_val;
uint8_t           248 drivers/mfd/da903x.c 	uint8_t chip_id;
uint8_t           265 drivers/mfd/da903x.c 	uint8_t v[3];
uint8_t           278 drivers/mfd/da903x.c 	uint8_t v[3];
uint8_t           291 drivers/mfd/da903x.c 	uint8_t v[3] = {0, 0, 0};
uint8_t           304 drivers/mfd/da903x.c 	return __da903x_read(chip->client, DA9030_STATUS, (uint8_t *)status);
uint8_t           309 drivers/mfd/da903x.c 	uint8_t chip_id;
uint8_t           342 drivers/mfd/da903x.c 	uint8_t v[4];
uint8_t           356 drivers/mfd/da903x.c 	uint8_t v[4];
uint8_t           370 drivers/mfd/da903x.c 	uint8_t v[4] = {0, 0, 0, 0};
uint8_t           383 drivers/mfd/da903x.c 	uint8_t v[2] = {0, 0};
uint8_t           380 drivers/mfd/da9055-core.c 	uint8_t clear_events[3] = {0xFF, 0xFF, 0xFF};
uint8_t           244 drivers/mfd/rc5t583-irq.c 	uint8_t int_sts[RC5T583_MAX_INTERRUPT_MASK_REGS];
uint8_t           245 drivers/mfd/rc5t583-irq.c 	uint8_t master_int = 0;
uint8_t            75 drivers/mfd/rc5t583.c 	uint8_t sleepseq_val = 0;
uint8_t           157 drivers/mfd/rc5t583.c 	uint8_t on_off_val = 0;
uint8_t           373 drivers/mfd/si476x-cmd.c 				     uint8_t cmd,
uint8_t           374 drivers/mfd/si476x-cmd.c 				     const uint8_t args[], size_t argn,
uint8_t           375 drivers/mfd/si476x-cmd.c 				     uint8_t *resp, size_t respn)
uint8_t           140 drivers/mfd/tps6586x.c int tps6586x_write(struct device *dev, int reg, uint8_t val)
uint8_t           148 drivers/mfd/tps6586x.c int tps6586x_writes(struct device *dev, int reg, int len, uint8_t *val)
uint8_t           156 drivers/mfd/tps6586x.c int tps6586x_read(struct device *dev, int reg, uint8_t *val)
uint8_t           169 drivers/mfd/tps6586x.c int tps6586x_reads(struct device *dev, int reg, int len, uint8_t *val)
uint8_t           177 drivers/mfd/tps6586x.c int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask)
uint8_t           185 drivers/mfd/tps6586x.c int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask)
uint8_t           193 drivers/mfd/tps6586x.c int tps6586x_update(struct device *dev, int reg, uint8_t val, uint8_t mask)
uint8_t           316 drivers/mfd/tps6586x.c 			     sizeof(acks), (uint8_t *)&acks);
uint8_t           423 drivers/mfd/tps80031.c 	uint8_t es_version;
uint8_t           424 drivers/mfd/tps80031.c 	uint8_t ep_ver;
uint8_t           176 drivers/mmc/host/cb710-mmc.c static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask)
uint8_t          1425 drivers/mtd/chips/cfi_cmdset_0002.c 	uint8_t lockreg;
uint8_t          1495 drivers/mtd/chips/cfi_cmdset_0002.c 	uint8_t otp, lockreg;
uint8_t           271 drivers/mtd/chips/jedec_probe.c 	const uint8_t dev_size;
uint8_t           272 drivers/mtd/chips/jedec_probe.c 	const uint8_t nr_regions;
uint8_t           275 drivers/mtd/chips/jedec_probe.c 	const uint8_t devtypes;		/* Bitmask for x8, x16 etc. */
uint8_t           276 drivers/mtd/chips/jedec_probe.c 	const uint8_t uaddr;		/* unlock addrs for 8, 16, 32, 64 */
uint8_t          1975 drivers/mtd/chips/jedec_probe.c 	uint8_t uaddr;
uint8_t          2037 drivers/mtd/chips/jedec_probe.c 	uint8_t uaddr;
uint8_t          2050 drivers/mtd/chips/jedec_probe.c 		mfr = (uint8_t)finfo->mfr_id;
uint8_t          2051 drivers/mtd/chips/jedec_probe.c 		id = (uint8_t)finfo->dev_id;
uint8_t           251 drivers/mtd/devices/st_spi_fsm.c 	uint8_t  seq[16];
uint8_t           278 drivers/mtd/devices/st_spi_fsm.c 	uint8_t         cmd;            /* FLASH command */
uint8_t           280 drivers/mtd/devices/st_spi_fsm.c 	uint8_t         addr_pads;      /* No. of addr pads (MODE & DUMMY) */
uint8_t           281 drivers/mtd/devices/st_spi_fsm.c 	uint8_t         data_pads;      /* No. of data pads */
uint8_t           282 drivers/mtd/devices/st_spi_fsm.c 	uint8_t         mode_data;      /* MODE data */
uint8_t           283 drivers/mtd/devices/st_spi_fsm.c 	uint8_t         mode_cycles;    /* No. of MODE cycles */
uint8_t           284 drivers/mtd/devices/st_spi_fsm.c 	uint8_t         dummy_cycles;   /* No. of DUMMY cycles */
uint8_t           476 drivers/mtd/devices/st_spi_fsm.c #define N25Q_VCR_XIP_DISABLED		((uint8_t)0x1 << 3)
uint8_t           867 drivers/mtd/devices/st_spi_fsm.c static uint8_t stfsm_wait_busy(struct stfsm *fsm)
uint8_t           900 drivers/mtd/devices/st_spi_fsm.c 			return (uint8_t)(status & 0xff);
uint8_t           914 drivers/mtd/devices/st_spi_fsm.c static int stfsm_read_status(struct stfsm *fsm, uint8_t cmd,
uint8_t           915 drivers/mtd/devices/st_spi_fsm.c 			     uint8_t *data, int bytes)
uint8_t           919 drivers/mtd/devices/st_spi_fsm.c 	uint8_t *t = (uint8_t *)&tmp;
uint8_t           942 drivers/mtd/devices/st_spi_fsm.c static int stfsm_write_status(struct stfsm *fsm, uint8_t cmd,
uint8_t          1153 drivers/mtd/devices/st_spi_fsm.c 	uint8_t sta;
uint8_t          1210 drivers/mtd/devices/st_spi_fsm.c 	uint8_t vcr;
uint8_t          1285 drivers/mtd/devices/st_spi_fsm.c static void stfsm_s25fl_read_dyb(struct stfsm *fsm, uint32_t offs, uint8_t *dby)
uint8_t          1316 drivers/mtd/devices/st_spi_fsm.c 	*dby = (uint8_t)(tmp >> 24);
uint8_t          1321 drivers/mtd/devices/st_spi_fsm.c static void stfsm_s25fl_write_dyb(struct stfsm *fsm, uint32_t offs, uint8_t dby)
uint8_t          1394 drivers/mtd/devices/st_spi_fsm.c 	uint8_t sr1, cr1, dyb;
uint8_t          1479 drivers/mtd/devices/st_spi_fsm.c 	uint8_t sr1, sr2;
uint8_t          1514 drivers/mtd/devices/st_spi_fsm.c static int stfsm_read(struct stfsm *fsm, uint8_t *buf, uint32_t size,
uint8_t          1525 drivers/mtd/devices/st_spi_fsm.c 	uint8_t *p;
uint8_t          1538 drivers/mtd/devices/st_spi_fsm.c 	p = ((uintptr_t)buf & 0x3) ? (uint8_t *)page_buf : buf;
uint8_t          1575 drivers/mtd/devices/st_spi_fsm.c static int stfsm_write(struct stfsm *fsm, const uint8_t *buf,
uint8_t          1587 drivers/mtd/devices/st_spi_fsm.c 	uint8_t *t = (uint8_t *)&tmp;
uint8_t          1588 drivers/mtd/devices/st_spi_fsm.c 	const uint8_t *p;
uint8_t          1604 drivers/mtd/devices/st_spi_fsm.c 		p = (uint8_t *)page_buf;
uint8_t          1753 drivers/mtd/devices/st_spi_fsm.c 	uint8_t *b = (uint8_t *)buf;
uint8_t          1832 drivers/mtd/devices/st_spi_fsm.c static void stfsm_read_jedec(struct stfsm *fsm, uint8_t *jedec)
uint8_t           137 drivers/mtd/inftlcore.c 		   size_t *retlen, uint8_t *buf)
uint8_t           157 drivers/mtd/inftlcore.c 		    size_t *retlen, uint8_t *buf)
uint8_t           177 drivers/mtd/inftlcore.c 		       size_t *retlen, uint8_t *buf, uint8_t *oob)
uint8_t            57 drivers/mtd/maps/dc21285.c 	val.x[0] = *(uint8_t*)(map->virt + ofs);
uint8_t            86 drivers/mtd/maps/dc21285.c 	*(uint8_t*)(map->virt + adr) = d.x[0];
uint8_t           132 drivers/mtd/maps/dc21285.c 	d.x[0] = *((uint8_t*)from);
uint8_t           376 drivers/mtd/mtdswap.c 	ops.oobbuf = (uint8_t *)&n;
uint8_t          1051 drivers/mtd/nand/onenand/onenand_base.c static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
uint8_t            32 drivers/mtd/nand/onenand/onenand_bbt.c static int check_short_pattern(uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
uint8_t            35 drivers/mtd/nand/onenand/onenand_bbt.c 	uint8_t *p = buf;
uint8_t            56 drivers/mtd/nand/onenand/onenand_bbt.c static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
uint8_t           149 drivers/mtd/nand/onenand/onenand_bbt.c 	uint8_t res;
uint8_t           213 drivers/mtd/nand/onenand/onenand_bbt.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t            85 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c static void bcm47xxnflash_ops_bcm4706_read(struct mtd_info *mtd, uint8_t *buf,
uint8_t           136 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c 					    const uint8_t *buf, int len)
uint8_t           336 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c 					       uint8_t *buf, int len)
uint8_t           352 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c 						const uint8_t *buf, int len)
uint8_t          1551 drivers/mtd/nand/raw/brcmnand/brcmnand.c static uint8_t brcmnand_read_byte(struct nand_chip *chip)
uint8_t          1555 drivers/mtd/nand/raw/brcmnand/brcmnand.c 	uint8_t ret = 0;
uint8_t          1607 drivers/mtd/nand/raw/brcmnand/brcmnand.c static void brcmnand_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t          1615 drivers/mtd/nand/raw/brcmnand/brcmnand.c static void brcmnand_write_buf(struct nand_chip *chip, const uint8_t *buf,
uint8_t          1902 drivers/mtd/nand/raw/brcmnand/brcmnand.c static int brcmnand_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t          1915 drivers/mtd/nand/raw/brcmnand/brcmnand.c static int brcmnand_read_page_raw(struct nand_chip *chip, uint8_t *buf,
uint8_t          2019 drivers/mtd/nand/raw/brcmnand/brcmnand.c static int brcmnand_write_page(struct nand_chip *chip, const uint8_t *buf,
uint8_t          2032 drivers/mtd/nand/raw/brcmnand/brcmnand.c static int brcmnand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
uint8_t           120 drivers/mtd/nand/raw/cafe_nand.c static void cafe_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
uint8_t           135 drivers/mtd/nand/raw/cafe_nand.c static void cafe_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           149 drivers/mtd/nand/raw/cafe_nand.c static uint8_t cafe_read_byte(struct nand_chip *chip)
uint8_t           152 drivers/mtd/nand/raw/cafe_nand.c 	uint8_t d;
uint8_t           370 drivers/mtd/nand/raw/cafe_nand.c static int cafe_nand_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t           485 drivers/mtd/nand/raw/cafe_nand.c static uint8_t cafe_bbt_pattern_2048[] = { 'B', 'b', 't', '0' };
uint8_t           486 drivers/mtd/nand/raw/cafe_nand.c static uint8_t cafe_mirror_pattern_2048[] = { '1', 't', 'b', 'B' };
uint8_t           488 drivers/mtd/nand/raw/cafe_nand.c static uint8_t cafe_bbt_pattern_512[] = { 0xBB };
uint8_t           489 drivers/mtd/nand/raw/cafe_nand.c static uint8_t cafe_mirror_pattern_512[] = { 0xBC };
uint8_t           534 drivers/mtd/nand/raw/cafe_nand.c 					 const uint8_t *buf, int oob_required,
uint8_t           424 drivers/mtd/nand/raw/davinci_nand.c static void nand_davinci_read_buf(struct nand_chip *chip, uint8_t *buf,
uint8_t           435 drivers/mtd/nand/raw/davinci_nand.c static void nand_davinci_write_buf(struct nand_chip *chip, const uint8_t *buf,
uint8_t           137 drivers/mtd/nand/raw/diskonchip.c static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc)
uint8_t           140 drivers/mtd/nand/raw/diskonchip.c 	uint8_t parity;
uint8_t           187 drivers/mtd/nand/raw/diskonchip.c 		uint8_t val;
uint8_t           198 drivers/mtd/nand/raw/diskonchip.c 				val = (uint8_t) (errval[i] >> (2 + bitpos));
uint8_t           208 drivers/mtd/nand/raw/diskonchip.c 				val = (uint8_t) (errval[i] << (8 - bitpos));
uint8_t           360 drivers/mtd/nand/raw/diskonchip.c 			*(uint8_t *) (&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i);
uint8_t           393 drivers/mtd/nand/raw/diskonchip.c 			uint8_t byte[4];
uint8_t           888 drivers/mtd/nand/raw/diskonchip.c 	uint8_t calc_ecc[6];
uint8_t           634 drivers/mtd/nand/raw/fsl_elbc_nand.c static int fsl_elbc_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t           655 drivers/mtd/nand/raw/fsl_elbc_nand.c static int fsl_elbc_write_page(struct nand_chip *chip, const uint8_t *buf,
uint8_t           670 drivers/mtd/nand/raw/fsl_elbc_nand.c 				  uint32_t data_len, const uint8_t *buf,
uint8_t           535 drivers/mtd/nand/raw/fsl_ifc_nand.c static uint8_t fsl_ifc_read_byte(struct nand_chip *chip)
uint8_t           557 drivers/mtd/nand/raw/fsl_ifc_nand.c static uint8_t fsl_ifc_read_byte16(struct nand_chip *chip)
uint8_t           569 drivers/mtd/nand/raw/fsl_ifc_nand.c 		return (uint8_t) data;
uint8_t           667 drivers/mtd/nand/raw/fsl_ifc_nand.c static int fsl_ifc_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t           695 drivers/mtd/nand/raw/fsl_ifc_nand.c static int fsl_ifc_write_page(struct nand_chip *chip, const uint8_t *buf,
uint8_t            34 drivers/mtd/nand/raw/fsl_upm.c 	uint8_t upm_addr_offset;
uint8_t            35 drivers/mtd/nand/raw/fsl_upm.c 	uint8_t upm_cmd_offset;
uint8_t           121 drivers/mtd/nand/raw/fsl_upm.c static uint8_t fun_read_byte(struct nand_chip *chip)
uint8_t           128 drivers/mtd/nand/raw/fsl_upm.c static void fun_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           137 drivers/mtd/nand/raw/fsl_upm.c static void fun_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
uint8_t           990 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c static uint8_t scan_ff_pattern[] = { 0xff };
uint8_t          1452 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c static int gpmi_ecc_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t          1487 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 		chip->oob_poi[0] = ((uint8_t *)this->auxiliary_virt)[0];
uint8_t          1495 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 				 uint32_t len, uint8_t *buf, int page)
uint8_t          1570 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c static int gpmi_ecc_write_page(struct nand_chip *chip, const uint8_t *buf,
uint8_t          1720 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c static int gpmi_ecc_read_page_raw(struct nand_chip *chip, uint8_t *buf,
uint8_t          1732 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	uint8_t *oob = chip->oob_poi;
uint8_t          1807 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c static int gpmi_ecc_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
uint8_t          1816 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	uint8_t *oob = chip->oob_poi;
uint8_t          1893 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	uint8_t *block_mark;
uint8_t          2073 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c 	uint8_t block_mark;
uint8_t           357 drivers/mtd/nand/raw/hisi504_nand.c static uint8_t hisi_nfc_read_byte(struct nand_chip *chip)
uint8_t           362 drivers/mtd/nand/raw/hisi504_nand.c 		return *(uint8_t *)(host->mmio);
uint8_t           367 drivers/mtd/nand/raw/hisi504_nand.c 		return *(uint8_t *)(host->mmio + host->offset - 1);
uint8_t           369 drivers/mtd/nand/raw/hisi504_nand.c 	return *(uint8_t *)(host->buffer + host->offset - 1);
uint8_t           373 drivers/mtd/nand/raw/hisi504_nand.c hisi_nfc_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
uint8_t           381 drivers/mtd/nand/raw/hisi504_nand.c static void hisi_nfc_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           518 drivers/mtd/nand/raw/hisi504_nand.c static int hisi_nand_read_page_hwecc(struct nand_chip *chip, uint8_t *buf,
uint8_t           568 drivers/mtd/nand/raw/hisi504_nand.c 				      const uint8_t *buf, int oob_required,
uint8_t            41 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c static const uint8_t empty_block_ecc[] = {
uint8_t            99 drivers/mtd/nand/raw/ingenic/jz4740_ecc.c static void jz_nand_correct_data(uint8_t *buf, int index, int mask)
uint8_t            97 drivers/mtd/nand/raw/internals.h void sanitize_string(uint8_t *s, size_t len);
uint8_t           194 drivers/mtd/nand/raw/lpc32xx_mlc.c 	uint8_t			*oob_buf;
uint8_t           202 drivers/mtd/nand/raw/lpc32xx_mlc.c 	uint8_t			*dma_buf;
uint8_t           203 drivers/mtd/nand/raw/lpc32xx_mlc.c 	uint8_t			*dummy_buf;
uint8_t           309 drivers/mtd/nand/raw/lpc32xx_mlc.c 	uint8_t sr;
uint8_t           434 drivers/mtd/nand/raw/lpc32xx_mlc.c static int lpc32xx_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t           440 drivers/mtd/nand/raw/lpc32xx_mlc.c 	uint8_t *oobbuf = chip->oob_poi;
uint8_t           443 drivers/mtd/nand/raw/lpc32xx_mlc.c 	uint8_t *dma_buf;
uint8_t           501 drivers/mtd/nand/raw/lpc32xx_mlc.c 				       const uint8_t *buf, int oob_required,
uint8_t           506 drivers/mtd/nand/raw/lpc32xx_mlc.c 	const uint8_t *oobbuf = chip->oob_poi;
uint8_t           507 drivers/mtd/nand/raw/lpc32xx_mlc.c 	uint8_t *dma_buf = (uint8_t *)buf;
uint8_t           234 drivers/mtd/nand/raw/lpc32xx_slc.c 	uint8_t			*data_buf;
uint8_t           351 drivers/mtd/nand/raw/lpc32xx_slc.c static uint8_t lpc32xx_nand_read_byte(struct nand_chip *chip)
uint8_t           355 drivers/mtd/nand/raw/lpc32xx_slc.c 	return (uint8_t)readl(SLC_DATA(host->io_base));
uint8_t           367 drivers/mtd/nand/raw/lpc32xx_slc.c 		*buf++ = (uint8_t)readl(SLC_DATA(host->io_base));
uint8_t           373 drivers/mtd/nand/raw/lpc32xx_slc.c static void lpc32xx_nand_write_buf(struct nand_chip *chip, const uint8_t *buf,
uint8_t           407 drivers/mtd/nand/raw/lpc32xx_slc.c static void lpc32xx_slc_ecc_copy(uint8_t *spare, const uint32_t *ecc, int count)
uint8_t           414 drivers/mtd/nand/raw/lpc32xx_slc.c 		spare[i + 2] = (uint8_t)(ce & 0xFF);
uint8_t           416 drivers/mtd/nand/raw/lpc32xx_slc.c 		spare[i + 1] = (uint8_t)(ce & 0xFF);
uint8_t           418 drivers/mtd/nand/raw/lpc32xx_slc.c 		spare[i] = (uint8_t)(ce & 0xFF);
uint8_t           487 drivers/mtd/nand/raw/lpc32xx_slc.c static int lpc32xx_xfer(struct mtd_info *mtd, uint8_t *buf, int eccsubpages,
uint8_t           497 drivers/mtd/nand/raw/lpc32xx_slc.c 	uint8_t *dma_buf;
uint8_t           602 drivers/mtd/nand/raw/lpc32xx_slc.c static int lpc32xx_nand_read_page_syndrome(struct nand_chip *chip, uint8_t *buf,
uint8_t           609 drivers/mtd/nand/raw/lpc32xx_slc.c 	uint8_t *oobecc, tmpecc[LPC32XX_ECC_SAVE_SIZE];
uint8_t           650 drivers/mtd/nand/raw/lpc32xx_slc.c 					       uint8_t *buf, int oob_required,
uint8_t           670 drivers/mtd/nand/raw/lpc32xx_slc.c 					    const uint8_t *buf,
uint8_t           676 drivers/mtd/nand/raw/lpc32xx_slc.c 	uint8_t *pb;
uint8_t           682 drivers/mtd/nand/raw/lpc32xx_slc.c 	error = lpc32xx_xfer(mtd, (uint8_t *)buf, chip->ecc.steps, 0);
uint8_t           708 drivers/mtd/nand/raw/lpc32xx_slc.c 						const uint8_t *buf,
uint8_t           183 drivers/mtd/nand/raw/mxc_nand.c 	uint8_t			*data_buf;
uint8_t           819 drivers/mtd/nand/raw/mxc_nand.c static int mxc_nand_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t           833 drivers/mtd/nand/raw/mxc_nand.c static int mxc_nand_read_page_raw(struct nand_chip *chip, uint8_t *buf,
uint8_t           855 drivers/mtd/nand/raw/mxc_nand.c static int mxc_nand_write_page(struct nand_chip *chip, const uint8_t *buf,
uint8_t           876 drivers/mtd/nand/raw/mxc_nand.c static int mxc_nand_write_page_ecc(struct nand_chip *chip, const uint8_t *buf,
uint8_t           882 drivers/mtd/nand/raw/mxc_nand.c static int mxc_nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
uint8_t           901 drivers/mtd/nand/raw/mxc_nand.c 	uint8_t ret;
uint8_t           913 drivers/mtd/nand/raw/mxc_nand.c 		ret = *(uint8_t *)(host->data_buf + host->buf_start);
uint8_t          1438 drivers/mtd/nand/raw/mxc_nand.c static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
uint8_t          1439 drivers/mtd/nand/raw/mxc_nand.c static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' };
uint8_t           405 drivers/mtd/nand/raw/nand_base.c static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, size_t len,
uint8_t           519 drivers/mtd/nand/raw/nand_base.c 	uint8_t buf[2] = { 0, 0 };
uint8_t          2606 drivers/mtd/nand/raw/nand_base.c int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required,
uint8_t          2636 drivers/mtd/nand/raw/nand_base.c static int nand_read_page_raw_syndrome(struct nand_chip *chip, uint8_t *buf,
uint8_t          2642 drivers/mtd/nand/raw/nand_base.c 	uint8_t *oob = chip->oob_poi;
uint8_t          2698 drivers/mtd/nand/raw/nand_base.c static int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf,
uint8_t          2705 drivers/mtd/nand/raw/nand_base.c 	uint8_t *p = buf;
uint8_t          2706 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          2707 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_code = chip->ecc.code_buf;
uint8_t          2746 drivers/mtd/nand/raw/nand_base.c 			     uint32_t readlen, uint8_t *bufpoi, int page)
uint8_t          2750 drivers/mtd/nand/raw/nand_base.c 	uint8_t *p;
uint8_t          2857 drivers/mtd/nand/raw/nand_base.c static int nand_read_page_hwecc(struct nand_chip *chip, uint8_t *buf,
uint8_t          2864 drivers/mtd/nand/raw/nand_base.c 	uint8_t *p = buf;
uint8_t          2865 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          2866 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_code = chip->ecc.code_buf;
uint8_t          2931 drivers/mtd/nand/raw/nand_base.c static int nand_read_page_hwecc_oob_first(struct nand_chip *chip, uint8_t *buf,
uint8_t          2938 drivers/mtd/nand/raw/nand_base.c 	uint8_t *p = buf;
uint8_t          2939 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_code = chip->ecc.code_buf;
uint8_t          2940 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          2998 drivers/mtd/nand/raw/nand_base.c static int nand_read_page_syndrome(struct nand_chip *chip, uint8_t *buf,
uint8_t          3006 drivers/mtd/nand/raw/nand_base.c 	uint8_t *p = buf;
uint8_t          3007 drivers/mtd/nand/raw/nand_base.c 	uint8_t *oob = chip->oob_poi;
uint8_t          3087 drivers/mtd/nand/raw/nand_base.c static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
uint8_t          3163 drivers/mtd/nand/raw/nand_base.c 	uint8_t *bufpoi, *oob, *buf;
uint8_t          3345 drivers/mtd/nand/raw/nand_base.c 	uint8_t *bufpoi = chip->oob_poi;
uint8_t          3413 drivers/mtd/nand/raw/nand_base.c 	const uint8_t *bufpoi = chip->oob_poi;
uint8_t          3491 drivers/mtd/nand/raw/nand_base.c 	uint8_t *buf = ops->oobbuf;
uint8_t          3610 drivers/mtd/nand/raw/nand_base.c int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
uint8_t          3641 drivers/mtd/nand/raw/nand_base.c 					const uint8_t *buf, int oob_required,
uint8_t          3647 drivers/mtd/nand/raw/nand_base.c 	uint8_t *oob = chip->oob_poi;
uint8_t          3702 drivers/mtd/nand/raw/nand_base.c static int nand_write_page_swecc(struct nand_chip *chip, const uint8_t *buf,
uint8_t          3709 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          3710 drivers/mtd/nand/raw/nand_base.c 	const uint8_t *p = buf;
uint8_t          3731 drivers/mtd/nand/raw/nand_base.c static int nand_write_page_hwecc(struct nand_chip *chip, const uint8_t *buf,
uint8_t          3738 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          3739 drivers/mtd/nand/raw/nand_base.c 	const uint8_t *p = buf;
uint8_t          3778 drivers/mtd/nand/raw/nand_base.c 				    uint32_t data_len, const uint8_t *buf,
uint8_t          3782 drivers/mtd/nand/raw/nand_base.c 	uint8_t *oob_buf  = chip->oob_poi;
uint8_t          3783 drivers/mtd/nand/raw/nand_base.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          3848 drivers/mtd/nand/raw/nand_base.c static int nand_write_page_syndrome(struct nand_chip *chip, const uint8_t *buf,
uint8_t          3855 drivers/mtd/nand/raw/nand_base.c 	const uint8_t *p = buf;
uint8_t          3856 drivers/mtd/nand/raw/nand_base.c 	uint8_t *oob = chip->oob_poi;
uint8_t          3919 drivers/mtd/nand/raw/nand_base.c 			   int data_len, const uint8_t *buf, int oob_required,
uint8_t          3966 drivers/mtd/nand/raw/nand_base.c 	uint8_t *oob = ops->oobbuf;
uint8_t          3967 drivers/mtd/nand/raw/nand_base.c 	uint8_t *buf = ops->datbuf;
uint8_t          4009 drivers/mtd/nand/raw/nand_base.c 		uint8_t *wbuf = buf;
uint8_t          4086 drivers/mtd/nand/raw/nand_base.c 			    size_t *retlen, const uint8_t *buf)
uint8_t          4100 drivers/mtd/nand/raw/nand_base.c 	ops.datbuf = (uint8_t *)buf;
uint8_t          4379 drivers/mtd/nand/raw/nand_base.c void sanitize_string(uint8_t *s, size_t len)
uint8_t            76 drivers/mtd/nand/raw/nand_bbt.c static inline uint8_t bbt_get_entry(struct nand_chip *chip, int block)
uint8_t            78 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t entry = chip->bbt[block >> BBT_ENTRY_SHIFT];
uint8_t            84 drivers/mtd/nand/raw/nand_bbt.c 		uint8_t mark)
uint8_t            86 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t msk = (mark & BBT_ENTRY_MASK) << ((block & BBT_ENTRY_MASK) * 2);
uint8_t            90 drivers/mtd/nand/raw/nand_bbt.c static int check_pattern_no_oob(uint8_t *buf, struct nand_bbt_descr *td)
uint8_t           107 drivers/mtd/nand/raw/nand_bbt.c static int check_pattern(uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
uint8_t           128 drivers/mtd/nand/raw/nand_bbt.c static int check_short_pattern(uint8_t *buf, struct nand_bbt_descr *td)
uint8_t           166 drivers/mtd/nand/raw/nand_bbt.c static int read_bbt(struct nand_chip *this, uint8_t *buf, int page, int num,
uint8_t           174 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t msk = (uint8_t)((1 << bits) - 1);
uint8_t           211 drivers/mtd/nand/raw/nand_bbt.c 			uint8_t dat = buf[i];
uint8_t           213 drivers/mtd/nand/raw/nand_bbt.c 				uint8_t tmp = (dat >> j) & msk;
uint8_t           259 drivers/mtd/nand/raw/nand_bbt.c static int read_abs_bbt(struct nand_chip *this, uint8_t *buf,
uint8_t           287 drivers/mtd/nand/raw/nand_bbt.c static int scan_read_data(struct nand_chip *this, uint8_t *buf, loff_t offs,
uint8_t           312 drivers/mtd/nand/raw/nand_bbt.c static int scan_read_oob(struct nand_chip *this, uint8_t *buf, loff_t offs,
uint8_t           343 drivers/mtd/nand/raw/nand_bbt.c static int scan_read(struct nand_chip *this, uint8_t *buf, loff_t offs,
uint8_t           354 drivers/mtd/nand/raw/nand_bbt.c 			  uint8_t *buf, uint8_t *oob)
uint8_t           389 drivers/mtd/nand/raw/nand_bbt.c static void read_abs_bbts(struct nand_chip *this, uint8_t *buf,
uint8_t           415 drivers/mtd/nand/raw/nand_bbt.c 			   loff_t offs, uint8_t *buf)
uint8_t           461 drivers/mtd/nand/raw/nand_bbt.c static int create_bbt(struct nand_chip *this, uint8_t *buf,
uint8_t           523 drivers/mtd/nand/raw/nand_bbt.c static int search_bbt(struct nand_chip *this, uint8_t *buf,
uint8_t           596 drivers/mtd/nand/raw/nand_bbt.c static void search_read_bbts(struct nand_chip *this, uint8_t *buf,
uint8_t           712 drivers/mtd/nand/raw/nand_bbt.c static int write_bbt(struct nand_chip *this, uint8_t *buf,
uint8_t           722 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t msk[4];
uint8_t           723 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t rcode = td->reserved_block_code;
uint8_t           849 drivers/mtd/nand/raw/nand_bbt.c 			uint8_t dat;
uint8_t           917 drivers/mtd/nand/raw/nand_bbt.c static int check_create(struct nand_chip *this, uint8_t *buf,
uint8_t          1046 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t *buf;
uint8_t          1102 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t oldval;
uint8_t          1215 drivers/mtd/nand/raw/nand_bbt.c 	uint8_t *buf;
uint8_t          1283 drivers/mtd/nand/raw/nand_bbt.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t          1286 drivers/mtd/nand/raw/nand_bbt.c static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
uint8_t          1287 drivers/mtd/nand/raw/nand_bbt.c static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
uint8_t            57 drivers/mtd/nand/raw/nand_jedec.c 		if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) ==
uint8_t            28 drivers/mtd/nand/raw/nand_legacy.c static uint8_t nand_read_byte(struct nand_chip *chip)
uint8_t            40 drivers/mtd/nand/raw/nand_legacy.c static uint8_t nand_read_byte16(struct nand_chip *chip)
uint8_t            42 drivers/mtd/nand/raw/nand_legacy.c 	return (uint8_t) cpu_to_le16(readw(chip->legacy.IO_ADDR_R));
uint8_t            74 drivers/mtd/nand/raw/nand_legacy.c static void nand_write_byte(struct nand_chip *chip, uint8_t byte)
uint8_t            86 drivers/mtd/nand/raw/nand_legacy.c static void nand_write_byte16(struct nand_chip *chip, uint8_t byte)
uint8_t           106 drivers/mtd/nand/raw/nand_legacy.c 	chip->legacy.write_buf(chip, (uint8_t *)&word, 2);
uint8_t           117 drivers/mtd/nand/raw/nand_legacy.c static void nand_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
uint8_t           130 drivers/mtd/nand/raw/nand_legacy.c static void nand_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           143 drivers/mtd/nand/raw/nand_legacy.c static void nand_write_buf16(struct nand_chip *chip, const uint8_t *buf,
uint8_t           159 drivers/mtd/nand/raw/nand_legacy.c static void nand_read_buf16(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           284 drivers/mtd/nand/raw/nand_micron.c micron_nand_read_page_on_die_ecc(struct nand_chip *chip, uint8_t *buf,
uint8_t           326 drivers/mtd/nand/raw/nand_micron.c micron_nand_write_page_on_die_ecc(struct nand_chip *chip, const uint8_t *buf,
uint8_t            38 drivers/mtd/nand/raw/nand_onfi.c 	uint8_t *cursor;
uint8_t            61 drivers/mtd/nand/raw/nand_onfi.c 	if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)
uint8_t            77 drivers/mtd/nand/raw/nand_onfi.c 	cursor = (uint8_t *)(ep + 1);
uint8_t            42 drivers/mtd/nand/raw/nand_toshiba.c toshiba_nand_read_page_benand(struct nand_chip *chip, uint8_t *buf,
uint8_t            56 drivers/mtd/nand/raw/nand_toshiba.c 				 uint32_t readlen, uint8_t *bufpoi, int page)
uint8_t            92 drivers/mtd/nand/raw/ndfc.c 	uint8_t *p = (uint8_t *)&ecc;
uint8_t           111 drivers/mtd/nand/raw/ndfc.c static void ndfc_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           120 drivers/mtd/nand/raw/ndfc.c static void ndfc_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
uint8_t          1523 drivers/mtd/nand/raw/omap2.c static int omap_write_page_bch(struct nand_chip *chip, const uint8_t *buf,
uint8_t          1528 drivers/mtd/nand/raw/omap2.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          1632 drivers/mtd/nand/raw/omap2.c static int omap_read_page_bch(struct nand_chip *chip, uint8_t *buf,
uint8_t          1636 drivers/mtd/nand/raw/omap2.c 	uint8_t *ecc_calc = chip->ecc.calc_buf;
uint8_t          1637 drivers/mtd/nand/raw/omap2.c 	uint8_t *ecc_code = chip->ecc.code_buf;
uint8_t            51 drivers/mtd/nand/raw/orion_nand.c static void orion_nand_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t            37 drivers/mtd/nand/raw/oxnas_nand.c static uint8_t oxnas_nand_read_byte(struct nand_chip *chip)
uint8_t           201 drivers/mtd/nand/raw/qcom_nandc.c 	((uint8_t *)(vaddr) - (uint8_t *)(chip)->reg_read_buf))
uint8_t          1941 drivers/mtd/nand/raw/qcom_nandc.c static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t          1958 drivers/mtd/nand/raw/qcom_nandc.c static int qcom_nandc_read_page_raw(struct nand_chip *chip, uint8_t *buf,
uint8_t          1998 drivers/mtd/nand/raw/qcom_nandc.c static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
uint8_t          2069 drivers/mtd/nand/raw/qcom_nandc.c 				     const uint8_t *buf, int oob_required,
uint8_t          2274 drivers/mtd/nand/raw/qcom_nandc.c static uint8_t qcom_nandc_read_byte(struct nand_chip *chip)
uint8_t          2295 drivers/mtd/nand/raw/qcom_nandc.c static void qcom_nandc_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t          2304 drivers/mtd/nand/raw/qcom_nandc.c static void qcom_nandc_write_buf(struct nand_chip *chip, const uint8_t *buf,
uint8_t            34 drivers/mtd/nand/raw/r852.c static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
uint8_t            36 drivers/mtd/nand/raw/r852.c 	uint8_t reg = readb(dev->mmio + address);
uint8_t            42 drivers/mtd/nand/raw/r852.c 						int address, uint8_t value)
uint8_t            91 drivers/mtd/nand/raw/r852.c 	uint8_t dma_reg, dma_irq_reg;
uint8_t           172 drivers/mtd/nand/raw/r852.c static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
uint8_t           230 drivers/mtd/nand/raw/r852.c static void r852_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
uint8_t           241 drivers/mtd/nand/raw/r852.c 		r852_do_dma(dev, (uint8_t *)buf, 0);
uint8_t           264 drivers/mtd/nand/raw/r852.c static void r852_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           301 drivers/mtd/nand/raw/r852.c static uint8_t r852_read_byte(struct nand_chip *chip)
uint8_t           430 drivers/mtd/nand/raw/r852.c static int r852_ecc_calculate(struct nand_chip *chip, const uint8_t *dat,
uint8_t           431 drivers/mtd/nand/raw/r852.c 			      uint8_t *ecc_code)
uint8_t           462 drivers/mtd/nand/raw/r852.c static int r852_ecc_correct(struct nand_chip *chip, uint8_t *dat,
uint8_t           463 drivers/mtd/nand/raw/r852.c 			    uint8_t *read_ecc, uint8_t *calc_ecc)
uint8_t           466 drivers/mtd/nand/raw/r852.c 	uint8_t ecc_status, err_byte;
uint8_t           560 drivers/mtd/nand/raw/r852.c 	uint8_t reg;
uint8_t           603 drivers/mtd/nand/raw/r852.c 	uint8_t reg;
uint8_t           707 drivers/mtd/nand/raw/r852.c 	uint8_t reg;
uint8_t           724 drivers/mtd/nand/raw/r852.c 	uint8_t card_status, dma_status;
uint8_t           116 drivers/mtd/nand/raw/r852.h 	uint8_t *bounce_buffer;		/* virtual address of bounce buffer */
uint8_t           141 drivers/mtd/nand/raw/r852.h 	uint8_t ctlreg;			/* cached contents of control reg */
uint8_t           101 drivers/mtd/nand/raw/sh_flctl.c static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
uint8_t           341 drivers/mtd/nand/raw/sh_flctl.c 			uint8_t org;
uint8_t           483 drivers/mtd/nand/raw/sh_flctl.c 		(struct sh_flctl *flctl, uint8_t *buff, int sector)
uint8_t           599 drivers/mtd/nand/raw/sh_flctl.c static int flctl_read_page_hwecc(struct nand_chip *chip, uint8_t *buf,
uint8_t           610 drivers/mtd/nand/raw/sh_flctl.c static int flctl_write_page_hwecc(struct nand_chip *chip, const uint8_t *buf,
uint8_t           959 drivers/mtd/nand/raw/sh_flctl.c static void flctl_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
uint8_t           967 drivers/mtd/nand/raw/sh_flctl.c static uint8_t flctl_read_byte(struct nand_chip *chip)
uint8_t           970 drivers/mtd/nand/raw/sh_flctl.c 	uint8_t data;
uint8_t           977 drivers/mtd/nand/raw/sh_flctl.c static void flctl_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t            12 drivers/mtd/nand/raw/sm_common.h 	uint8_t data_status;
uint8_t            13 drivers/mtd/nand/raw/sm_common.h 	uint8_t block_status;
uint8_t            14 drivers/mtd/nand/raw/sm_common.h 	uint8_t lba_copy1[2];
uint8_t            15 drivers/mtd/nand/raw/sm_common.h 	uint8_t ecc2[3];
uint8_t            16 drivers/mtd/nand/raw/sm_common.h 	uint8_t lba_copy2[2];
uint8_t            17 drivers/mtd/nand/raw/sm_common.h 	uint8_t ecc1[3];
uint8_t            36 drivers/mtd/nand/raw/socrates_nand.c static void socrates_nand_write_buf(struct nand_chip *this, const uint8_t *buf,
uint8_t            55 drivers/mtd/nand/raw/socrates_nand.c static void socrates_nand_read_buf(struct nand_chip *this, uint8_t *buf,
uint8_t            75 drivers/mtd/nand/raw/socrates_nand.c static uint8_t socrates_nand_read_byte(struct nand_chip *this)
uint8_t            77 drivers/mtd/nand/raw/socrates_nand.c 	uint8_t byte;
uint8_t           436 drivers/mtd/nand/raw/sunxi_nand.c static void sunxi_nfc_read_buf(struct nand_chip *nand, uint8_t *buf, int len)
uint8_t           473 drivers/mtd/nand/raw/sunxi_nand.c static void sunxi_nfc_write_buf(struct nand_chip *nand, const uint8_t *buf,
uint8_t           659 drivers/mtd/nand/raw/sunxi_nand.c 					   const uint8_t *buf, int len,
uint8_t           668 drivers/mtd/nand/raw/sunxi_nand.c static void sunxi_nfc_randomizer_read_buf(struct nand_chip *nand, uint8_t *buf,
uint8_t           903 drivers/mtd/nand/raw/sunxi_nand.c static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf,
uint8_t          1087 drivers/mtd/nand/raw/sunxi_nand.c static int sunxi_nfc_hw_ecc_read_page(struct nand_chip *nand, uint8_t *buf,
uint8_t          1202 drivers/mtd/nand/raw/sunxi_nand.c 				       const uint8_t *buf, int oob_required,
uint8_t           102 drivers/mtd/nand/raw/txx9ndfmc.c static uint8_t txx9ndfmc_read_byte(struct nand_chip *chip)
uint8_t           109 drivers/mtd/nand/raw/txx9ndfmc.c static void txx9ndfmc_write_buf(struct nand_chip *chip, const uint8_t *buf,
uint8_t           122 drivers/mtd/nand/raw/txx9ndfmc.c static void txx9ndfmc_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
uint8_t           168 drivers/mtd/nand/raw/txx9ndfmc.c static int txx9ndfmc_calculate_ecc(struct nand_chip *chip, const uint8_t *dat,
uint8_t           169 drivers/mtd/nand/raw/txx9ndfmc.c 				   uint8_t *ecc_code)
uint8_t           510 drivers/mtd/nand/raw/vf610_nfc.c static inline int vf610_nfc_correct_data(struct nand_chip *chip, uint8_t *dat,
uint8_t           511 drivers/mtd/nand/raw/vf610_nfc.c 					 uint8_t *oob, int page)
uint8_t           551 drivers/mtd/nand/raw/vf610_nfc.c static int vf610_nfc_read_page(struct nand_chip *chip, uint8_t *buf,
uint8_t           599 drivers/mtd/nand/raw/vf610_nfc.c static int vf610_nfc_write_page(struct nand_chip *chip, const uint8_t *buf,
uint8_t           124 drivers/mtd/nftlcore.c 		  size_t *retlen, uint8_t *buf)
uint8_t           145 drivers/mtd/nftlcore.c 		   size_t *retlen, uint8_t *buf)
uint8_t           168 drivers/mtd/nftlcore.c 		      size_t *retlen, uint8_t *buf, uint8_t *oob)
uint8_t            60 drivers/mtd/parsers/ar7part.c 			 (uint8_t *)&header);
uint8_t            82 drivers/mtd/parsers/ar7part.c 				 (uint8_t *)&header);
uint8_t            90 drivers/mtd/parsers/ar7part.c 				 (uint8_t *)&header);
uint8_t            91 drivers/mtd/parsers/bcm47xxpart.c 	uint8_t i, curr_part = 0;
uint8_t           134 drivers/mtd/parsers/bcm47xxpart.c 			       &bytes_read, (uint8_t *)buf);
uint8_t           237 drivers/mtd/parsers/bcm47xxpart.c 			       (uint8_t *)buf);
uint8_t           261 drivers/mtd/parsers/bcm47xxpart.c 			       (uint8_t *)buf);
uint8_t            36 drivers/mtd/parsers/parser_trx.c 			(uint8_t *)&buf);
uint8_t            58 drivers/mtd/parsers/parser_trx.c 	uint8_t curr_part = 0, i = 0;
uint8_t            66 drivers/mtd/parsers/parser_trx.c 	err = mtd_read(mtd, 0, sizeof(trx), &bytes_read, (uint8_t *)&trx);
uint8_t           129 drivers/mtd/sm_ftl.c static int sm_get_lba(uint8_t *lba)
uint8_t           176 drivers/mtd/sm_ftl.c 	uint8_t tmp[2];
uint8_t           217 drivers/mtd/sm_ftl.c static int sm_correct_sector(uint8_t *buffer, struct sm_oob *oob)
uint8_t           219 drivers/mtd/sm_ftl.c 	uint8_t ecc[3];
uint8_t           240 drivers/mtd/sm_ftl.c 			  uint8_t *buffer, struct sm_oob *oob)
uint8_t           322 drivers/mtd/sm_ftl.c 			   uint8_t *buffer, struct sm_oob *oob)
uint8_t           367 drivers/mtd/sm_ftl.c static int sm_write_block(struct sm_ftl *ftl, uint8_t *buf,
uint8_t           552 drivers/mtd/sm_ftl.c static const uint8_t cis_signature[] = {
uint8_t            98 drivers/mtd/ssfdc.c static const uint8_t cis_numbers[] = {
uint8_t           108 drivers/mtd/ssfdc.c 	uint8_t *sect_buf;
uint8_t           149 drivers/mtd/ssfdc.c static int read_physical_sector(struct mtd_info *mtd, uint8_t *sect_buf,
uint8_t           164 drivers/mtd/ssfdc.c static int read_raw_oob(struct mtd_info *mtd, loff_t offs, uint8_t *buf)
uint8_t           197 drivers/mtd/ssfdc.c static int get_logical_address(uint8_t *oob_buf)
uint8_t           243 drivers/mtd/ssfdc.c 	uint8_t oob_buf[OOB_SIZE];
uint8_t            69 drivers/mtd/tests/nandbiterrs.c static uint8_t *wbuffer; /* One page write / compare buffer */
uint8_t            70 drivers/mtd/tests/nandbiterrs.c static uint8_t *rbuffer; /* One page read buffer */
uint8_t            73 drivers/mtd/tests/nandbiterrs.c static uint8_t hash(unsigned offset)
uint8_t          1666 drivers/mtd/ubi/attach.c 	uint8_t *buf;
uint8_t           150 drivers/mtd/ubi/io.c 	*((uint8_t *)buf) ^= 0xFF;
uint8_t           352 drivers/mtd/ubi/io.c static uint8_t patterns[] = {0xa5, 0x5a, 0x0};
uint8_t          1311 drivers/mtd/ubi/io.c 		uint8_t c = ((uint8_t *)buf)[i];
uint8_t          1312 drivers/mtd/ubi/io.c 		uint8_t c1 = ((uint8_t *)buf1)[i];
uint8_t            30 drivers/mtd/ubi/misc.c 		if (((const uint8_t *)buf)[i] != 0xFF)
uint8_t           134 drivers/mtd/ubi/misc.c int ubi_check_pattern(const void *buf, uint8_t patt, int size)
uint8_t           139 drivers/mtd/ubi/misc.c 		if (((const uint8_t *)buf)[i] != patt)
uint8_t           867 drivers/mtd/ubi/ubi.h int ubi_check_pattern(const void *buf, uint8_t patt, int size);
uint8_t            85 drivers/net/arcnet/arc-rawmode.c 			unsigned short type, uint8_t daddr)
uint8_t           199 drivers/net/arcnet/arcdevice.h 			    unsigned short ethproto, uint8_t daddr);
uint8_t           218 drivers/net/arcnet/arcdevice.h 	uint8_t lastpacket,	/* number of last packet (from 1) */
uint8_t           238 drivers/net/arcnet/arcdevice.h 	uint8_t config,		/* current value of CONFIG register */
uint8_t           246 drivers/net/arcnet/arcdevice.h 	uint8_t default_proto[256];	/* default encap to use for each host */
uint8_t            65 drivers/net/arcnet/arcnet.c 			     unsigned short type, uint8_t daddr);
uint8_t           167 drivers/net/arcnet/arcnet.c 	static uint8_t buf[512];
uint8_t           600 drivers/net/arcnet/arcnet.c 	uint8_t _daddr, proto_num;
uint8_t           605 drivers/net/arcnet/arcnet.c 		   saddr ? *(uint8_t *)saddr : -1,
uint8_t           606 drivers/net/arcnet/arcnet.c 		   daddr ? *(uint8_t *)daddr : -1,
uint8_t           618 drivers/net/arcnet/arcnet.c 		_daddr = daddr ? *(uint8_t *)daddr : 0;
uint8_t           633 drivers/net/arcnet/arcnet.c 		_daddr = *(uint8_t *)daddr;
uint8_t          1132 drivers/net/arcnet/arcnet.c 			     unsigned short type, uint8_t daddr)
uint8_t           101 drivers/net/arcnet/capmode.c 			uint8_t daddr)
uint8_t            43 drivers/net/arcnet/rfc1051.c 			unsigned short type, uint8_t daddr);
uint8_t           162 drivers/net/arcnet/rfc1051.c 			unsigned short type, uint8_t daddr)
uint8_t            44 drivers/net/arcnet/rfc1201.c 			unsigned short type, uint8_t daddr);
uint8_t           212 drivers/net/arcnet/rfc1201.c 				uint8_t *cptr = (uint8_t *)arp + sizeof(struct arphdr);
uint8_t           378 drivers/net/arcnet/rfc1201.c 			unsigned short type, uint8_t daddr)
uint8_t           286 drivers/net/can/sja1000/sja1000.c 	uint8_t fi;
uint8_t           287 drivers/net/can/sja1000/sja1000.c 	uint8_t dlc;
uint8_t           289 drivers/net/can/sja1000/sja1000.c 	uint8_t dreg;
uint8_t           343 drivers/net/can/sja1000/sja1000.c 	uint8_t fi;
uint8_t           344 drivers/net/can/sja1000/sja1000.c 	uint8_t dreg;
uint8_t           390 drivers/net/can/sja1000/sja1000.c static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
uint8_t           399 drivers/net/can/sja1000/sja1000.c 	uint8_t ecc, alc;
uint8_t           504 drivers/net/can/sja1000/sja1000.c 	uint8_t isrc, status;
uint8_t            32 drivers/net/can/softing/softing.h 	uint8_t output;
uint8_t            65 drivers/net/can/softing/softing.h 	__iomem uint8_t *dpram;
uint8_t            86 drivers/net/can/softing/softing.h 		    __iomem uint8_t *virt, unsigned int size, int offset);
uint8_t            94 drivers/net/can/softing/softing_fw.c static int fw_parse(const uint8_t **pmem, uint16_t *ptype, uint32_t *paddr,
uint8_t            95 drivers/net/can/softing/softing_fw.c 		uint16_t *plen, const uint8_t **pdat)
uint8_t            98 drivers/net/can/softing/softing_fw.c 	const uint8_t *mem;
uint8_t            99 drivers/net/can/softing/softing_fw.c 	const uint8_t *end;
uint8_t           134 drivers/net/can/softing/softing_fw.c 		__iomem uint8_t *dpram, unsigned int size, int offset)
uint8_t           138 drivers/net/can/softing/softing_fw.c 	const uint8_t *mem, *end, *dat;
uint8_t           141 drivers/net/can/softing/softing_fw.c 	uint8_t *buf = NULL, *new_buf;
uint8_t           221 drivers/net/can/softing/softing_fw.c 	const uint8_t *mem, *end, *dat;
uint8_t            57 drivers/net/can/softing/softing_main.c 	uint8_t *ptr;
uint8_t            58 drivers/net/can/softing/softing_main.c 	uint8_t fifo_wr, fifo_rd;
uint8_t            60 drivers/net/can/softing/softing_main.c 	uint8_t buf[DPRAM_TX_SIZE];
uint8_t           156 drivers/net/can/softing/softing_main.c 	uint8_t fifo_rd, fifo_wr, cmd;
uint8_t           157 drivers/net/can/softing/softing_main.c 	uint8_t *ptr;
uint8_t           159 drivers/net/can/softing/softing_main.c 	uint8_t buf[DPRAM_RX_SIZE];
uint8_t           216 drivers/net/can/softing/softing_main.c 		uint8_t can_state, state;
uint8_t           359 drivers/net/can/softing/softing_main.c 	uint8_t ir;
uint8_t           369 drivers/net/can/softing/softing_main.c 	uint8_t ir;
uint8_t           472 drivers/net/can/softing/softing_main.c 	static const uint8_t stream[] = {
uint8_t           870 drivers/net/dsa/b53/b53_common.c 		     uint8_t *data)
uint8_t           314 drivers/net/dsa/b53/b53_priv.h 		     uint8_t *data);
uint8_t           911 drivers/net/dsa/bcm_sf2.c 				   u32 stringset, uint8_t *data)
uint8_t           213 drivers/net/dsa/bcm_sf2.h 			     u32 stringset, uint8_t *data);
uint8_t          1227 drivers/net/dsa/bcm_sf2_cfp.c 			     u32 stringset, uint8_t *data)
uint8_t            94 drivers/net/dsa/dsa_loop.c 				 u32 stringset, uint8_t *data)
uint8_t           972 drivers/net/dsa/lan9303-core.c 				u32 stringset, uint8_t *data)
uint8_t          1529 drivers/net/dsa/lantiq_gswip.c 			      uint8_t *data)
uint8_t           654 drivers/net/dsa/microchip/ksz8795.c 				u32 stringset, uint8_t *buf)
uint8_t           376 drivers/net/dsa/microchip/ksz9477.c 				u32 stringset, uint8_t *buf)
uint8_t           521 drivers/net/dsa/mt7530.c 		   uint8_t *data)
uint8_t           773 drivers/net/dsa/mv88e6xxx/chip.c 				       uint8_t *data, int types)
uint8_t           791 drivers/net/dsa/mv88e6xxx/chip.c 				       uint8_t *data)
uint8_t           798 drivers/net/dsa/mv88e6xxx/chip.c 				       uint8_t *data)
uint8_t           804 drivers/net/dsa/mv88e6xxx/chip.c 				       uint8_t *data)
uint8_t           810 drivers/net/dsa/mv88e6xxx/chip.c static const uint8_t *mv88e6xxx_atu_vtu_stats_strings[] = {
uint8_t           818 drivers/net/dsa/mv88e6xxx/chip.c static void mv88e6xxx_atu_vtu_get_strings(uint8_t *data)
uint8_t           829 drivers/net/dsa/mv88e6xxx/chip.c 				  u32 stringset, uint8_t *data)
uint8_t           463 drivers/net/dsa/mv88e6xxx/chip.h 	int (*stats_get_strings)(struct mv88e6xxx_chip *chip,  uint8_t *data);
uint8_t           496 drivers/net/dsa/mv88e6xxx/chip.h 				  uint8_t *data);
uint8_t           114 drivers/net/dsa/mv88e6xxx/serdes.c 				 int port, uint8_t *data)
uint8_t            99 drivers/net/dsa/mv88e6xxx/serdes.h 				 int port, uint8_t *data);
uint8_t           786 drivers/net/dsa/qca8k.c qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data)
uint8_t           138 drivers/net/dsa/realtek-smi-core.h 			 uint8_t *data);
uint8_t           466 drivers/net/dsa/rtl8366.c 			 uint8_t *data)
uint8_t           936 drivers/net/dsa/vitesse-vsc73xx-core.c 				uint8_t *data)
uint8_t           124 drivers/net/ethernet/8390/xsurf100.c 		ei_outb(*(uint8_t *)src, ei_local->mem + NE_DATAPORT);
uint8_t           150 drivers/net/ethernet/8390/xsurf100.c 		*(uint8_t *)dst = ei_inb(ei_local->mem + NE_DATAPORT);
uint8_t          2182 drivers/net/ethernet/broadcom/sb1250-mac.c 		eaddr[i] = (uint8_t) (ea_reg & 0xFF);
uint8_t          1213 drivers/net/ethernet/cadence/macb.h 	uint8_t hw_dma_cap;
uint8_t           396 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c 	memcpy((uint8_t *)&oct->pfvf_hsword, cmd->msg.s.params,
uint8_t           254 drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c 		memcpy(mbox_cmd->msg.s.params, (uint8_t *)&oct->pfvf_hsword, 6);
uint8_t            73 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t data[128];
uint8_t            82 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t buf[0];
uint8_t           101 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t sched;
uint8_t           102 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t idx;
uint8_t           103 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t min;
uint8_t           104 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t max;
uint8_t           105 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t binding;
uint8_t           166 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t proto;
uint8_t           167 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t proto_mask;
uint8_t           168 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t invert_match:1;
uint8_t           169 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t config_tx:1;
uint8_t           170 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t config_rx:1;
uint8_t           171 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t trace_tx:1;
uint8_t           172 drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h 	uint8_t trace_rx:1;
uint8_t          1165 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h 	uint8_t lip[16];        /* local IP address (IPv4 in [3:0]) */
uint8_t          1166 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h 	uint8_t fip[16];        /* foreign IP address (IPv4 in [3:0]) */
uint8_t          1209 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h 	uint8_t dmac[ETH_ALEN]; /* new destination MAC address */
uint8_t          1210 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h 	uint8_t smac[ETH_ALEN]; /* new source MAC address */
uint8_t            62 drivers/net/ethernet/cisco/enic/vnic_wq.h 	uint8_t cq_entry; /* Gets completion event from hw */
uint8_t            63 drivers/net/ethernet/cisco/enic/vnic_wq.h 	uint8_t desc_skip_cnt; /* Num descs to occupy */
uint8_t            64 drivers/net/ethernet/cisco/enic/vnic_wq.h 	uint8_t compressed_send; /* Both hdr and payload in one desc */
uint8_t           134 drivers/net/ethernet/cisco/enic/vnic_wq.h 	uint8_t desc_skip_cnt, uint8_t cq_entry,
uint8_t           135 drivers/net/ethernet/cisco/enic/vnic_wq.h 	uint8_t compressed_send, uint64_t wrid)
uint8_t           427 drivers/net/ethernet/emulex/benet/be_ethtool.c 				uint8_t *data)
uint8_t          1007 drivers/net/ethernet/emulex/benet/be_ethtool.c 			  struct ethtool_eeprom *eeprom, uint8_t *data)
uint8_t          1692 drivers/net/ethernet/marvell/mv643xx_eth.c 				    uint32_t stringset, uint8_t *data)
uint8_t           445 drivers/net/ethernet/mellanox/mlx4/en_ethtool.c 				uint32_t stringset, uint8_t *data)
uint8_t            84 drivers/net/ethernet/mellanox/mlx4/main.c static uint8_t num_vfs[3] = {0, 0, 0};
uint8_t            90 drivers/net/ethernet/mellanox/mlx4/main.c static uint8_t probe_vf[3] = {0, 0, 0};
uint8_t          1137 drivers/net/ethernet/mellanox/mlx5/core/en.h 			       uint32_t stringset, uint8_t *data);
uint8_t           113 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv, uint8_t *data);
uint8_t           145 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h 					  uint8_t *data)
uint8_t            86 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv, uint8_t *data)
uint8_t            94 drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.h int mlx5e_tls_get_strings(struct mlx5e_priv *priv, uint8_t *data);
uint8_t           108 drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.h static inline int mlx5e_tls_get_strings(struct mlx5e_priv *priv, uint8_t *data) { return 0; }
uint8_t            62 drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls_stats.c int mlx5e_tls_get_strings(struct mlx5e_priv *priv, uint8_t *data)
uint8_t           119 drivers/net/ethernet/mellanox/mlx5/core/en_rep.c 				  u32 stringset, uint8_t *data)
uint8_t           937 drivers/net/ethernet/qlogic/netxen/netxen_nic.h 	uint8_t mac_addr[ETH_ALEN+2];
uint8_t          1451 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c 	uint8_t revision_id;
uint8_t           859 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h 	uint8_t mac_addr[ETH_ALEN+2];
uint8_t           730 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define LSB(x)	((uint8_t)(x))
uint8_t           731 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define MSB(x)	((uint8_t)((uint16_t)(x) >> 8))
uint8_t            27 drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c static uint32_t gmac_read_reg(struct anarion_gmac *gmac, uint8_t reg)
uint8_t            32 drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c static void gmac_write_reg(struct anarion_gmac *gmac, uint8_t reg, uint32_t val)
uint8_t          1771 drivers/net/ethernet/ti/netcp_ethss.c 				      uint32_t stringset, uint8_t *data)
uint8_t           598 drivers/net/ethernet/toshiba/ps3_gelic_net.c 	uint8_t *p;
uint8_t            53 drivers/net/phy/mdio-mux-mmioreg.c 		case sizeof(uint8_t): {
uint8_t            54 drivers/net/phy/mdio-mux-mmioreg.c 			uint8_t x, y;
uint8_t           120 drivers/net/phy/mdio-mux-mmioreg.c 	if (s->iosize != sizeof(uint8_t) &&
uint8_t            24 drivers/net/wireless/ath/ath10k/spectral.c static uint8_t get_max_exp(s8 max_index, u16 max_magnitude, size_t bin_len,
uint8_t           659 drivers/net/wireless/ath/carl9170/tx.c 	const uint8_t cookie, const uint8_t info)
uint8_t          1276 drivers/net/wireless/ath/carl9170/tx.c 	uint8_t q = 0;
uint8_t          1659 drivers/net/wireless/broadcom/b43/main.c 		uint8_t ie_id, ie_len;
uint8_t          2782 drivers/net/wireless/broadcom/b43/main.c 			iv = (const struct b43_iv *)((const uint8_t *)iv +
uint8_t          2795 drivers/net/wireless/broadcom/b43/main.c 			iv = (const struct b43_iv *)((const uint8_t *)iv +
uint8_t           979 drivers/net/wireless/broadcom/b43legacy/main.c 		uint8_t ie_id, ie_len;
uint8_t          1810 drivers/net/wireless/broadcom/b43legacy/main.c 			iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
uint8_t          1823 drivers/net/wireless/broadcom/b43legacy/main.c 			iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
uint8_t           200 drivers/net/wireless/marvell/libertas/cmd.c 		memcpy((uint8_t *)&cmd_config.wol_conf, (uint8_t *)p_wol_config,
uint8_t           210 drivers/net/wireless/marvell/libertas/cmd.c 			memcpy((uint8_t *) p_wol_config,
uint8_t           211 drivers/net/wireless/marvell/libertas/cmd.c 					(uint8_t *)&cmd_config.wol_conf,
uint8_t           650 drivers/net/wireless/marvell/libertas/cmd.c 	priv->channel = (uint8_t) le16_to_cpu(cmd.channel);
uint8_t           197 drivers/net/wireless/marvell/libertas/debugfs.c static void *lbs_tlv_find(uint16_t tlv_type, const uint8_t *tlv, uint16_t size)
uint8_t            21 drivers/net/wireless/marvell/libertas/dev.h 	uint8_t  sp_calcontrol;
uint8_t            22 drivers/net/wireless/marvell/libertas/dev.h 	uint8_t  sp_extsleepclk;
uint8_t           155 drivers/net/wireless/marvell/libertas/dev.h 	uint8_t wol_gpio;
uint8_t           156 drivers/net/wireless/marvell/libertas/dev.h 	uint8_t wol_gap;
uint8_t           452 drivers/net/wireless/marvell/libertas/host.h 	uint8_t tlv[128];
uint8_t           462 drivers/net/wireless/marvell/libertas/host.h 	uint8_t bsstype;
uint8_t           463 drivers/net/wireless/marvell/libertas/host.h 	uint8_t bssid[ETH_ALEN];
uint8_t           464 drivers/net/wireless/marvell/libertas/host.h 	uint8_t tlvbuffer[0];
uint8_t           471 drivers/net/wireless/marvell/libertas/host.h 	uint8_t nr_sets;
uint8_t           472 drivers/net/wireless/marvell/libertas/host.h 	uint8_t bssdesc_and_tlvbuffer[0];
uint8_t           551 drivers/net/wireless/marvell/libertas/host.h 	uint8_t keytype[4];
uint8_t           552 drivers/net/wireless/marvell/libertas/host.h 	uint8_t keymaterial[4][16];
uint8_t           606 drivers/net/wireless/marvell/libertas/host.h 	uint8_t calcontrol;
uint8_t           609 drivers/net/wireless/marvell/libertas/host.h 	uint8_t externalsleepclk;
uint8_t           829 drivers/net/wireless/marvell/libertas/host.h 	uint8_t rule_no;
uint8_t           830 drivers/net/wireless/marvell/libertas/host.h 	uint8_t rule_ops;
uint8_t           839 drivers/net/wireless/marvell/libertas/host.h 	uint8_t action;
uint8_t           840 drivers/net/wireless/marvell/libertas/host.h 	uint8_t pattern;
uint8_t           841 drivers/net/wireless/marvell/libertas/host.h 	uint8_t no_rules_in_cmd;
uint8_t           842 drivers/net/wireless/marvell/libertas/host.h 	uint8_t result;
uint8_t           849 drivers/net/wireless/marvell/libertas/host.h 	uint8_t gpio;
uint8_t           877 drivers/net/wireless/marvell/libertas/host.h 	uint8_t enable;
uint8_t           881 drivers/net/wireless/marvell/libertas/host.h 	uint8_t usesnr;
uint8_t           889 drivers/net/wireless/marvell/libertas/host.h 	uint8_t enable;
uint8_t            71 drivers/net/wireless/marvell/libertas/if_usb.c static int if_usb_host_to_card(struct lbs_private *priv, uint8_t type,
uint8_t            72 drivers/net/wireless/marvell/libertas/if_usb.c 			       uint8_t *payload, uint16_t nb);
uint8_t            73 drivers/net/wireless/marvell/libertas/if_usb.c static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload,
uint8_t           332 drivers/net/wireless/marvell/libertas/if_usb.c 	const uint8_t *firmware = cardp->fw->data;
uint8_t           415 drivers/net/wireless/marvell/libertas/if_usb.c static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload, uint16_t nb)
uint8_t           615 drivers/net/wireless/marvell/libertas/if_usb.c static inline void process_cmdrequest(int recvlength, uint8_t *recvbuff,
uint8_t           659 drivers/net/wireless/marvell/libertas/if_usb.c 	uint8_t *recvbuff = NULL;
uint8_t           725 drivers/net/wireless/marvell/libertas/if_usb.c static int if_usb_host_to_card(struct lbs_private *priv, uint8_t type,
uint8_t           726 drivers/net/wireless/marvell/libertas/if_usb.c 			       uint8_t *payload, uint16_t nb)
uint8_t           776 drivers/net/wireless/marvell/libertas/if_usb.c static int check_fwfile_format(const uint8_t *data, uint32_t totlen)
uint8_t            28 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t	cmd;
uint8_t            29 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t	pad[11];
uint8_t            39 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t	cmd;
uint8_t            40 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t	result;
uint8_t            41 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t	pad[2];
uint8_t            53 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t ep_in;
uint8_t            54 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t ep_out;
uint8_t            73 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t CRC_OK;
uint8_t            74 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t fwdnldover;
uint8_t            75 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t fwfinalblk;
uint8_t            76 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t surprise_removed;
uint8_t            94 drivers/net/wireless/marvell/libertas/if_usb.h 	uint8_t data[0];
uint8_t           453 drivers/net/wireless/marvell/libertas/mesh.c 	cmd.length = cpu_to_le16(sizeof(uint8_t));
uint8_t          1162 drivers/net/wireless/marvell/libertas/mesh.c 	uint32_t stringset, uint8_t *s)
uint8_t            58 drivers/net/wireless/marvell/libertas/mesh.h 	uint32_t stringset, uint8_t *s);
uint8_t           227 drivers/net/wireless/marvell/libertas/types.h 	uint8_t	firmwarestate;
uint8_t           228 drivers/net/wireless/marvell/libertas/types.h 	uint8_t	led;
uint8_t           229 drivers/net/wireless/marvell/libertas/types.h 	uint8_t	ledstate;
uint8_t           230 drivers/net/wireless/marvell/libertas/types.h 	uint8_t	ledarg;
uint8_t           245 drivers/net/wireless/marvell/libertas/types.h 	uint8_t oui[3];
uint8_t           246 drivers/net/wireless/marvell/libertas/types.h 	uint8_t type;
uint8_t           247 drivers/net/wireless/marvell/libertas/types.h 	uint8_t subtype;
uint8_t           248 drivers/net/wireless/marvell/libertas/types.h 	uint8_t version;
uint8_t           249 drivers/net/wireless/marvell/libertas/types.h 	uint8_t active_protocol_id;
uint8_t           250 drivers/net/wireless/marvell/libertas/types.h 	uint8_t active_metric_id;
uint8_t           251 drivers/net/wireless/marvell/libertas/types.h 	uint8_t mesh_capability;
uint8_t           252 drivers/net/wireless/marvell/libertas/types.h 	uint8_t mesh_id_len;
uint8_t           253 drivers/net/wireless/marvell/libertas/types.h 	uint8_t mesh_id[IEEE80211_MAX_SSID_LEN];
uint8_t           263 drivers/net/wireless/marvell/libertas/types.h 	uint8_t boottime;
uint8_t           264 drivers/net/wireless/marvell/libertas/types.h 	uint8_t reserved;
uint8_t           365 drivers/net/wireless/marvell/libertas_tf/cmd.c int lbtf_set_mac_address(struct lbtf_private *priv, uint8_t *mac_addr)
uint8_t            42 drivers/net/wireless/marvell/libertas_tf/if_usb.c static int if_usb_host_to_card(struct lbtf_private *priv, uint8_t type,
uint8_t            43 drivers/net/wireless/marvell/libertas_tf/if_usb.c 			       uint8_t *payload, uint16_t nb);
uint8_t            44 drivers/net/wireless/marvell/libertas_tf/if_usb.c static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload,
uint8_t           370 drivers/net/wireless/marvell/libertas_tf/if_usb.c static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload,
uint8_t           596 drivers/net/wireless/marvell/libertas_tf/if_usb.c static inline void process_cmdrequest(int recvlength, uint8_t *recvbuff,
uint8_t           630 drivers/net/wireless/marvell/libertas_tf/if_usb.c 	uint8_t *recvbuff = NULL;
uint8_t           712 drivers/net/wireless/marvell/libertas_tf/if_usb.c static int if_usb_host_to_card(struct lbtf_private *priv, uint8_t type,
uint8_t           713 drivers/net/wireless/marvell/libertas_tf/if_usb.c 			       uint8_t *payload, uint16_t nb)
uint8_t            26 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t	cmd;
uint8_t            27 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t	pad[11];
uint8_t            35 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t	cmd;
uint8_t            36 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t	result;
uint8_t            37 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t	pad[2];
uint8_t            48 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t ep_in;
uint8_t            49 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t ep_out;
uint8_t            64 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t CRC_OK;
uint8_t            65 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t fwdnldover;
uint8_t            66 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t fwfinalblk;
uint8_t            84 drivers/net/wireless/marvell/libertas_tf/if_usb.h 	uint8_t data[0];
uint8_t           386 drivers/net/wireless/marvell/libertas_tf/libertas_tf.h 	uint8_t macadd[ETH_ALEN];
uint8_t           471 drivers/net/wireless/marvell/libertas_tf/libertas_tf.h int lbtf_set_mac_address(struct lbtf_private *priv, uint8_t *mac_addr);
uint8_t            56 drivers/nfc/nfcmrvl/fw_dnld.c static const uint8_t nci_pattern_core_reset_ntf[] = {
uint8_t            60 drivers/nfc/nfcmrvl/fw_dnld.c static const uint8_t nci_pattern_core_init_rsp[] = {
uint8_t            64 drivers/nfc/nfcmrvl/fw_dnld.c static const uint8_t nci_pattern_core_set_config_rsp[] = {
uint8_t            68 drivers/nfc/nfcmrvl/fw_dnld.c static const uint8_t nci_pattern_core_conn_create_rsp[] = {
uint8_t            72 drivers/nfc/nfcmrvl/fw_dnld.c static const uint8_t nci_pattern_core_conn_close_rsp[] = {
uint8_t            76 drivers/nfc/nfcmrvl/fw_dnld.c static const uint8_t nci_pattern_core_conn_credits_ntf[] = {
uint8_t            80 drivers/nfc/nfcmrvl/fw_dnld.c static const uint8_t nci_pattern_proprietary_boot_rsp[] = {
uint8_t            84 drivers/nfc/nfcmrvl/fw_dnld.c static struct sk_buff *alloc_lc_skb(struct nfcmrvl_private *priv, uint8_t plen)
uint8_t           182 drivers/nfc/nfcmrvl/fw_dnld.c 	uint8_t param[2] = { NCI_CORE_LC_PROP_FW_DL, 0x0 };
uint8_t           318 drivers/nfc/nfcmrvl/fw_dnld.c 			uint8_t conn_id = NCI_CORE_LC_CONNID_PROP_FW_DL;
uint8_t           328 drivers/nfc/nfcmrvl/fw_dnld.c 				     ((uint8_t *)priv->fw_dnld.fw->data) + priv->fw_dnld.offset,
uint8_t            39 drivers/nfc/nfcmrvl/fw_dnld.h 	uint8_t flow_control;
uint8_t            58 drivers/nfc/nfcmrvl/fw_dnld.h 		uint8_t reserved[64];
uint8_t            69 drivers/nfc/nfcmrvl/fw_dnld.h 	uint8_t reserved[64];
uint8_t            99 drivers/nvme/host/fc.c 	uint8_t			priv[0];
uint8_t          1200 drivers/of/unittest.c 	extern uint8_t __dtb_testcases_begin[];
uint8_t          1201 drivers/of/unittest.c 	extern uint8_t __dtb_testcases_end[];
uint8_t          2180 drivers/of/unittest.c 	extern uint8_t __dtb_##name##_begin[]; \
uint8_t          2181 drivers/of/unittest.c 	extern uint8_t __dtb_##name##_end[]
uint8_t          2191 drivers/of/unittest.c 	uint8_t		*dtb_begin;
uint8_t          2192 drivers/of/unittest.c 	uint8_t		*dtb_end;
uint8_t           336 drivers/pci/hotplug/pnv_php.c 				 uint8_t state)
uint8_t           371 drivers/pci/hotplug/pnv_php.c 	uint8_t power_state = OPAL_PCI_SLOT_POWER_ON;
uint8_t           393 drivers/pci/hotplug/pnv_php.c 	uint8_t presence = OPAL_PCI_SLOT_EMPTY;
uint8_t           444 drivers/pci/hotplug/pnv_php.c 	uint8_t presence = OPAL_PCI_SLOT_EMPTY;
uint8_t           445 drivers/pci/hotplug/pnv_php.c 	uint8_t power_status = OPAL_PCI_SLOT_POWER_ON;
uint8_t          2388 drivers/pci/quirks.c 	uint8_t b;
uint8_t          2417 drivers/pci/quirks.c 	uint8_t b;
uint8_t           158 drivers/pcmcia/vrc4171_card.c static inline uint8_t exca_read_byte(int slot, uint8_t index)
uint8_t           167 drivers/pcmcia/vrc4171_card.c static inline uint16_t exca_read_word(int slot, uint8_t index)
uint8_t           183 drivers/pcmcia/vrc4171_card.c static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
uint8_t           194 drivers/pcmcia/vrc4171_card.c static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
uint8_t           203 drivers/pcmcia/vrc4171_card.c 	outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
uint8_t           244 drivers/pcmcia/vrc4171_card.c 	uint8_t status, sense;
uint8_t           292 drivers/pcmcia/vrc4171_card.c static inline uint8_t set_Vcc_value(u_char Vcc)
uint8_t           309 drivers/pcmcia/vrc4171_card.c 	uint8_t voltage, power, control, cscint;
uint8_t           370 drivers/pcmcia/vrc4171_card.c 	uint8_t ioctl, addrwin;
uint8_t           413 drivers/pcmcia/vrc4171_card.c 	uint8_t addrwin;
uint8_t           481 drivers/pcmcia/vrc4171_card.c 	uint8_t status, csc;
uint8_t           566 drivers/pcmcia/vrc4171_card.c 			uint8_t addrwin;
uint8_t            56 drivers/pcmcia/vrc4173_cardu.c static inline uint8_t exca_readb(vrc4173_socket_t *socket, uint16_t offset)
uint8_t            71 drivers/pcmcia/vrc4173_cardu.c static inline void exca_writeb(vrc4173_socket_t *socket, uint16_t offset, uint8_t val)
uint8_t            76 drivers/pcmcia/vrc4173_cardu.c static inline void exca_writew(vrc4173_socket_t *socket, uint8_t offset, uint16_t val)
uint8_t           169 drivers/pcmcia/vrc4173_cardu.c 	uint8_t status;
uint8_t           201 drivers/pcmcia/vrc4173_cardu.c static inline uint8_t set_Vcc_value(u_char Vcc)
uint8_t           213 drivers/pcmcia/vrc4173_cardu.c static inline uint8_t set_Vpp_value(u_char Vpp)
uint8_t           229 drivers/pcmcia/vrc4173_cardu.c 	uint8_t val;
uint8_t           251 drivers/pcmcia/vrc4173_cardu.c 	uint8_t ioctl, window;
uint8_t           276 drivers/pcmcia/vrc4173_cardu.c 	uint8_t window, enable;
uint8_t           309 drivers/pcmcia/vrc4173_cardu.c 	uint8_t window;
uint8_t           343 drivers/pcmcia/vrc4173_cardu.c 	uint8_t window, enable;
uint8_t           417 drivers/pcmcia/vrc4173_cardu.c 	uint8_t csc, status;
uint8_t            72 drivers/platform/chrome/cros_ec_debugfs.c 	uint8_t *ec_buffer = (uint8_t *)debug_info->read_msg->data;
uint8_t            25 drivers/platform/chrome/cros_ec_i2c.c 	uint8_t  command_protocol;
uint8_t            38 drivers/platform/chrome/cros_ec_i2c.c 	uint8_t result;
uint8_t            39 drivers/platform/chrome/cros_ec_i2c.c 	uint8_t packet_length;
uint8_t           331 drivers/platform/chrome/cros_ec_lightbar.c static int lb_send_empty_cmd(struct cros_ec_dev *ec, uint8_t cmd)
uint8_t           362 drivers/platform/chrome/cros_ec_lightbar.c static int lb_manual_suspend_ctrl(struct cros_ec_dev *ec, uint8_t enable)
uint8_t            44 drivers/platform/chrome/cros_ec_sysfs.c 		uint8_t cmd;
uint8_t            45 drivers/platform/chrome/cros_ec_sysfs.c 		uint8_t flags;
uint8_t           165 drivers/platform/x86/intel_mid_thermal.c 	uint8_t data = 0;
uint8_t           216 drivers/platform/x86/intel_mid_thermal.c 	uint8_t data;
uint8_t           277 drivers/platform/x86/intel_mid_thermal.c 	uint8_t data;
uint8_t           302 drivers/platform/x86/intel_mid_thermal.c 	uint8_t data;
uint8_t            60 drivers/power/supply/da9030_battery.c 	uint8_t vbat_res;
uint8_t            61 drivers/power/supply/da9030_battery.c 	uint8_t vbatmin_res;
uint8_t            62 drivers/power/supply/da9030_battery.c 	uint8_t vbatmintxon;
uint8_t            63 drivers/power/supply/da9030_battery.c 	uint8_t ichmax_res;
uint8_t            64 drivers/power/supply/da9030_battery.c 	uint8_t ichmin_res;
uint8_t            65 drivers/power/supply/da9030_battery.c 	uint8_t ichaverage_res;
uint8_t            66 drivers/power/supply/da9030_battery.c 	uint8_t vchmax_res;
uint8_t            67 drivers/power/supply/da9030_battery.c 	uint8_t vchmin_res;
uint8_t            68 drivers/power/supply/da9030_battery.c 	uint8_t tbat_res;
uint8_t            69 drivers/power/supply/da9030_battery.c 	uint8_t adc_in4_res;
uint8_t            70 drivers/power/supply/da9030_battery.c 	uint8_t adc_in5_res;
uint8_t           107 drivers/power/supply/da9030_battery.c 	uint8_t fault;
uint8_t           212 drivers/power/supply/da9030_battery.c 		     sizeof(*adc), (uint8_t *)adc);
uint8_t           217 drivers/power/supply/da9030_battery.c 	uint8_t val;
uint8_t           232 drivers/power/supply/da9030_battery.c 	uint8_t val;
uint8_t           174 drivers/power/supply/max14656_charger_detector.c 	uint8_t val = 0;
uint8_t           175 drivers/power/supply/max14656_charger_detector.c 	uint8_t rev;
uint8_t           227 drivers/power/supply/max1721x_battery.c 			uint16_t reg, uint8_t nr, char *str)
uint8_t            69 drivers/power/supply/olpc_battery.c 	uint8_t status;
uint8_t            99 drivers/power/supply/olpc_battery.c 		union power_supply_propval *val, uint8_t ec_byte)
uint8_t           125 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           162 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           187 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           212 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           258 drivers/power/supply/olpc_battery.c 	uint8_t soc;
uint8_t           276 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           341 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           532 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           564 drivers/power/supply/olpc_battery.c 	uint8_t ec_byte;
uint8_t           638 drivers/power/supply/olpc_battery.c 	uint8_t status;
uint8_t           639 drivers/power/supply/olpc_battery.c 	uint8_t ecver;
uint8_t            64 drivers/power/supply/tps65090-charger.c 	uint8_t ctrl0 = 0;
uint8_t            89 drivers/power/supply/tps65090-charger.c 	uint8_t intrmask = 0;
uint8_t           142 drivers/power/supply/tps65090-charger.c 	uint8_t status1 = 0;
uint8_t           143 drivers/power/supply/tps65090-charger.c 	uint8_t intrsts = 0;
uint8_t           234 drivers/power/supply/tps65090-charger.c 	uint8_t status1 = 0;
uint8_t           104 drivers/regulator/da903x.c 	uint8_t val, mask;
uint8_t           119 drivers/regulator/da903x.c 	uint8_t val, mask;
uint8_t           157 drivers/regulator/da903x.c 	uint8_t reg_val;
uint8_t           173 drivers/regulator/da903x.c 	uint8_t val, mask;
uint8_t           236 drivers/regulator/da903x.c 	uint8_t val, mask;
uint8_t           358 drivers/regulator/max8973-regulator.c 	uint8_t	control1 = 0;
uint8_t           359 drivers/regulator/max8973-regulator.c 	uint8_t control2 = 0;
uint8_t            26 drivers/regulator/rc5t583-regulator.c 	uint8_t			reg_disc_reg;
uint8_t            27 drivers/regulator/rc5t583-regulator.c 	uint8_t			disc_bit;
uint8_t            28 drivers/regulator/rc5t583-regulator.c 	uint8_t			deepsleep_reg;
uint8_t           123 drivers/regulator/tps51632-regulator.c 	uint8_t	control = 0;
uint8_t           270 drivers/regulator/tps6586x-regulator.c 	uint8_t val1, val2;
uint8_t           308 drivers/regulator/tps6586x-regulator.c 	uint8_t reg;
uint8_t           201 drivers/regulator/tps80031-regulator.c 	uint8_t vsel = 0;
uint8_t           275 drivers/regulator/tps80031-regulator.c 	uint8_t ctrl1 = 0;
uint8_t           276 drivers/regulator/tps80031-regulator.c 	uint8_t ctrl3 = 0;
uint8_t           192 drivers/remoteproc/qcom_sysmon.c 		.elem_size	= sizeof(uint8_t),
uint8_t           222 drivers/remoteproc/qcom_sysmon.c 		.elem_size	= sizeof(uint8_t),
uint8_t            41 drivers/rtc/rtc-bq32k.c 	uint8_t		seconds;
uint8_t            42 drivers/rtc/rtc-bq32k.c 	uint8_t		minutes;
uint8_t            43 drivers/rtc/rtc-bq32k.c 	uint8_t		cent_hours;
uint8_t            44 drivers/rtc/rtc-bq32k.c 	uint8_t		day;
uint8_t            45 drivers/rtc/rtc-bq32k.c 	uint8_t		date;
uint8_t            46 drivers/rtc/rtc-bq32k.c 	uint8_t		month;
uint8_t            47 drivers/rtc/rtc-bq32k.c 	uint8_t		years;
uint8_t            52 drivers/rtc/rtc-bq32k.c static int bq32k_read(struct device *dev, void *data, uint8_t off, uint8_t len)
uint8_t            75 drivers/rtc/rtc-bq32k.c static int bq32k_write(struct device *dev, void *data, uint8_t off, uint8_t len)
uint8_t            78 drivers/rtc/rtc-bq32k.c 	uint8_t buffer[MAX_LEN + 1];
uint8_t           257 drivers/rtc/rtc-bq32k.c 	uint8_t reg;
uint8_t            59 drivers/rtc/rtc-da9052.c 	uint8_t v[2][5];
uint8_t           104 drivers/rtc/rtc-da9052.c 	uint8_t v[3];
uint8_t           159 drivers/rtc/rtc-da9052.c 	uint8_t v[2][6];
uint8_t           201 drivers/rtc/rtc-da9052.c 	uint8_t v[6];
uint8_t            59 drivers/rtc/rtc-da9055.c 	uint8_t v[5];
uint8_t            80 drivers/rtc/rtc-da9055.c 	uint8_t v[2];
uint8_t           128 drivers/rtc/rtc-da9055.c 	uint8_t v[6];
uint8_t           162 drivers/rtc/rtc-da9055.c 	uint8_t v[6];
uint8_t           102 drivers/rtc/rtc-ds1511.c rtc_write(uint8_t val, uint32_t reg)
uint8_t           108 drivers/rtc/rtc-ds1511.c rtc_write_alarm(uint8_t val, enum ds1511reg reg)
uint8_t           113 drivers/rtc/rtc-ds1511.c static noinline uint8_t
uint8_t            50 drivers/rtc/rtc-isl12022.c static int isl12022_read_regs(struct i2c_client *client, uint8_t reg,
uint8_t            51 drivers/rtc/rtc-isl12022.c 			      uint8_t *data, size_t n)
uint8_t            83 drivers/rtc/rtc-isl12022.c 			      uint8_t reg, uint8_t val)
uint8_t            85 drivers/rtc/rtc-isl12022.c 	uint8_t data[2] = { reg, val };
uint8_t           107 drivers/rtc/rtc-isl12022.c 	uint8_t buf[ISL12022_REG_INT + 1];
uint8_t           159 drivers/rtc/rtc-isl12022.c 	uint8_t buf[ISL12022_REG_DW + 1];
uint8_t           418 drivers/s390/cio/vfio_ccw_ops.c 		uint8_t trigger;
uint8_t           420 drivers/s390/cio/vfio_ccw_ops.c 		if (get_user(trigger, (uint8_t __user *)data))
uint8_t           274 drivers/scsi/aic7xxx/aic7770.c 	uint8_t scsi_conf;
uint8_t           321 drivers/scsi/aic7xxx/aic7770.c 			uint8_t target_settings;
uint8_t           398 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	 scsi_status;		/* Standard SCSI status byte */
uint8_t           404 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  scsi_status;		/* SCSI status to give to initiator */
uint8_t           405 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  target_phases;		/* Bitmap of phases to execute */
uint8_t           406 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  data_phase;		/* Data-In or Data-Out */
uint8_t           407 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  initiator_tag;		/* Initiator's transaction tag */
uint8_t           423 drivers/scsi/aic7xxx/aic79xx.h 		uint8_t  cdblen;
uint8_t           425 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	 cdb[MAX_CDB_LEN];
uint8_t           427 drivers/scsi/aic7xxx/aic79xx.h 		uint8_t	 cdb[MAX_CDB_LEN_WITH_SENSE_ADDR];
uint8_t           437 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  scsi_status;		/* SCSI status to give to initiator */
uint8_t           438 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  target_phases;		/* Bitmap of phases to execute */
uint8_t           439 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  data_phase;		/* Data-In or Data-Out */
uint8_t           440 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  initiator_tag;		/* Initiator's transaction tag */
uint8_t           491 drivers/scsi/aic7xxx/aic79xx.h /*18*/	uint8_t  control;	/* See SCB_CONTROL in aic79xx.reg for details */
uint8_t           492 drivers/scsi/aic7xxx/aic79xx.h /*19*/	uint8_t	 scsiid;	/*
uint8_t           496 drivers/scsi/aic7xxx/aic79xx.h /*20*/	uint8_t  lun;
uint8_t           497 drivers/scsi/aic7xxx/aic79xx.h /*21*/	uint8_t  task_attribute;
uint8_t           498 drivers/scsi/aic7xxx/aic79xx.h /*22*/	uint8_t  cdb_len;
uint8_t           499 drivers/scsi/aic7xxx/aic79xx.h /*23*/	uint8_t  task_management;
uint8_t           506 drivers/scsi/aic7xxx/aic79xx.h /*48*/  uint8_t	 pkt_long_lun[8];
uint8_t           508 drivers/scsi/aic7xxx/aic79xx.h /*56*/  uint8_t	 spare[8];
uint8_t           543 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			*vaddr;
uint8_t           615 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			 *sense_data;
uint8_t           663 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t		 init_level;	/*
uint8_t           675 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t scsiid;		/* Our ID and the initiator's ID */
uint8_t           676 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t identify;	/* Identify message */
uint8_t           677 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t bytes[22];	/* 
uint8_t           682 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t cmd_valid;	/*
uint8_t           693 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t pad[7];
uint8_t           702 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t initiator_id;
uint8_t           703 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t event_type;	/* MSG type or EVENT_TYPE_BUS_RESET */
uint8_t           705 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t event_arg;
uint8_t           721 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t event_r_idx;
uint8_t           722 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t event_w_idx;
uint8_t           744 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t protocol_version;	/* SCSI Revision level */
uint8_t           745 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t transport_version;	/* SPI Revision level */
uint8_t           746 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t width;			/* Bus width */
uint8_t           747 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t period;			/* Sync rate factor */
uint8_t           748 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t offset;			/* Sync offset */
uint8_t           749 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t ppr_options;		/* Parallel Protocol Request options */
uint8_t           813 drivers/scsi/aic7xxx/aic79xx.h         uint8_t phase;
uint8_t           814 drivers/scsi/aic7xxx/aic79xx.h         uint8_t mesg_out; /* Message response to parity errors */
uint8_t           898 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  bios_flags;
uint8_t           901 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  reserved_1[21];
uint8_t           902 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  resource_type;
uint8_t           903 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  resource_len[2];
uint8_t           904 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  resource_data[8];
uint8_t           905 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  vpd_tag;
uint8_t           907 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  vpd_keyword[2];
uint8_t           908 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  length;
uint8_t           909 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  revision;
uint8_t           910 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  device_flags;
uint8_t           911 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  termination_menus[2];
uint8_t           912 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  fifo_threshold;
uint8_t           913 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  end_tag;
uint8_t           914 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  vpd_checksum;
uint8_t           918 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  default_irq;
uint8_t           919 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  pci_lattime;
uint8_t           920 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  max_target;
uint8_t           921 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  boot_lun;
uint8_t           923 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  reserved_2;
uint8_t           924 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t  checksum;
uint8_t           925 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	 reserved_3[4];
uint8_t           994 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	scsiseq;
uint8_t           995 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	sxfrctl0;
uint8_t           996 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	sxfrctl1;
uint8_t           997 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	simode0;
uint8_t           998 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	simode1;
uint8_t           999 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	seltimer;
uint8_t          1000 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	seqctl;
uint8_t          1005 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t   command;
uint8_t          1006 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t   csize_lattime;
uint8_t          1012 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	optionmode;
uint8_t          1013 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	dscommand0;
uint8_t          1014 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	dspcistatus;
uint8_t          1016 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	crccontrol1;
uint8_t          1017 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	scbbaddr;
uint8_t          1019 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	dff_thrsh;
uint8_t          1020 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	*scratch_ram;
uint8_t          1021 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t	*btt;
uint8_t          1044 drivers/scsi/aic7xxx/aic79xx.h typedef uint8_t ahd_mode_state;
uint8_t          1049 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t		sg_status;
uint8_t          1050 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t		valid_tag;
uint8_t          1152 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  unpause;
uint8_t          1153 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  pause;
uint8_t          1160 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			 *overrun_buf;
uint8_t          1169 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  our_id;
uint8_t          1175 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  tqinfifonext;
uint8_t          1181 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  hs_mailbox;
uint8_t          1186 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  send_msg_perror;
uint8_t          1189 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  msgout_buf[12];/* Message we are sending */
uint8_t          1190 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  msgin_buf[12];/* Message we are receiving */
uint8_t          1216 drivers/scsi/aic7xxx/aic79xx.h 	uint8_t			  iocell_opts[AHD_NUM_PER_DEV_ANNEXCOLS];
uint8_t          1367 drivers/scsi/aic7xxx/aic79xx.h 					   uint8_t *value);
uint8_t            60 drivers/scsi/aic7xxx/aic79xx_core.c         uint8_t errno;
uint8_t           213 drivers/scsi/aic7xxx/aic79xx_core.c 					   u_int instrptr, uint8_t *dconsts);
uint8_t           503 drivers/scsi/aic7xxx/aic79xx_core.c 	return ((uint8_t *)scb->sg_list + sg_offset);
uint8_t           512 drivers/scsi/aic7xxx/aic79xx_core.c 	sg_offset = ((uint8_t *)sg - (uint8_t *)scb->sg_list)
uint8_t           523 drivers/scsi/aic7xxx/aic79xx_core.c 			/*offset*/(uint8_t*)scb->hscb - scb->hscb_map->vaddr,
uint8_t           552 drivers/scsi/aic7xxx/aic79xx_core.c 	return (((uint8_t *)&ahd->targetcmds[index])
uint8_t           553 drivers/scsi/aic7xxx/aic79xx_core.c 	       - (uint8_t *)ahd->qoutfifo);
uint8_t          1327 drivers/scsi/aic7xxx/aic79xx_core.c 		uint8_t *hscb_ptr;
uint8_t          1338 drivers/scsi/aic7xxx/aic79xx_core.c 		hscb_ptr = (uint8_t *)scb->hscb;
uint8_t          4103 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t		iocell_opts[sizeof(ahd->iocell_opts)];
uint8_t          6800 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t		*segs;
uint8_t          6801 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t		*sense_data;
uint8_t          7030 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t		*next_vaddr;
uint8_t          7036 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t		 current_sensing;
uint8_t          7037 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t		 fstat;
uint8_t          7115 drivers/scsi/aic7xxx/aic79xx_core.c 	next_vaddr = (uint8_t *)&ahd->qoutfifo[AHD_QOUT_SIZE];
uint8_t          8630 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t scsiseq;
uint8_t          8667 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t scsiseq;
uint8_t          9288 drivers/scsi/aic7xxx/aic79xx_core.c 		uint8_t ins_bytes[4];
uint8_t          9316 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t	download_consts[DOWNLOAD_CONST_COUNT];
uint8_t          9399 drivers/scsi/aic7xxx/aic79xx_core.c 		(ahd->overrun_buf - (uint8_t *)ahd->qoutfifo) / 256;
uint8_t          9525 drivers/scsi/aic7xxx/aic79xx_core.c ahd_download_instr(struct ahd_softc *ahd, u_int instrptr, uint8_t *dconsts)
uint8_t          9997 drivers/scsi/aic7xxx/aic79xx_core.c 			uint8_t *bytestream_ptr;
uint8_t          9999 drivers/scsi/aic7xxx/aic79xx_core.c 			bytestream_ptr = (uint8_t *)buf;
uint8_t          10091 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t *vpdarray;
uint8_t          10093 drivers/scsi/aic7xxx/aic79xx_core.c 	vpdarray = (uint8_t *)vpd;
uint8_t          10147 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t	seetype;
uint8_t          10206 drivers/scsi/aic7xxx/aic79xx_core.c ahd_read_flexport(struct ahd_softc *ahd, u_int addr, uint8_t *value)
uint8_t          10663 drivers/scsi/aic7xxx/aic79xx_core.c 	uint8_t *byte;
uint8_t           142 drivers/scsi/aic7xxx/aic79xx_inline.h static inline uint8_t *ahd_get_sense_buf(struct ahd_softc *ahd,
uint8_t           157 drivers/scsi/aic7xxx/aic79xx_inline.h static inline uint8_t *
uint8_t           181 drivers/scsi/aic7xxx/aic79xx_osm.c 	uint8_t	precomp;
uint8_t           182 drivers/scsi/aic7xxx/aic79xx_osm.c 	uint8_t	slewrate;
uint8_t           183 drivers/scsi/aic7xxx/aic79xx_osm.c 	uint8_t amplitude;
uint8_t           391 drivers/scsi/aic7xxx/aic79xx_osm.c uint8_t ahd_inb(struct ahd_softc * ahd, long port);
uint8_t           392 drivers/scsi/aic7xxx/aic79xx_osm.c void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
uint8_t           396 drivers/scsi/aic7xxx/aic79xx_osm.c 			       uint8_t *, int count);
uint8_t           398 drivers/scsi/aic7xxx/aic79xx_osm.c 			       uint8_t *, int count);
uint8_t           400 drivers/scsi/aic7xxx/aic79xx_osm.c uint8_t
uint8_t           403 drivers/scsi/aic7xxx/aic79xx_osm.c 	uint8_t x;
uint8_t           418 drivers/scsi/aic7xxx/aic79xx_osm.c 	uint8_t x;
uint8_t           431 drivers/scsi/aic7xxx/aic79xx_osm.c ahd_outb(struct ahd_softc * ahd, long port, uint8_t val)
uint8_t           453 drivers/scsi/aic7xxx/aic79xx_osm.c ahd_outsb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
uint8_t           467 drivers/scsi/aic7xxx/aic79xx_osm.c ahd_insb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
uint8_t           487 drivers/scsi/aic7xxx/aic79xx_osm.c 		uint8_t retval;
uint8_t           726 drivers/scsi/aic7xxx/aic79xx_osm.c 	uint8_t *bh;
uint8_t          1019 drivers/scsi/aic7xxx/aic79xx_osm.c 		uint8_t *iocell_info;
uint8_t          1021 drivers/scsi/aic7xxx/aic79xx_osm.c 		iocell_info = (uint8_t*)&aic79xx_iocell_info[instance];
uint8_t          2748 drivers/scsi/aic7xxx/aic79xx_osm.c 		uint8_t precomp;
uint8_t           127 drivers/scsi/aic7xxx/aic79xx_osm.h 	volatile uint8_t __iomem *maddr;
uint8_t           357 drivers/scsi/aic7xxx/aic79xx_osm.h uint8_t ahd_inb(struct ahd_softc * ahd, long port);
uint8_t           358 drivers/scsi/aic7xxx/aic79xx_osm.h void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
uint8_t           362 drivers/scsi/aic7xxx/aic79xx_osm.h 			       uint8_t *, int count);
uint8_t           364 drivers/scsi/aic7xxx/aic79xx_osm.h 			       uint8_t *, int count);
uint8_t           275 drivers/scsi/aic7xxx/aic79xx_osm_pci.c 				 uint8_t __iomem **maddr)
uint8_t           313 drivers/scsi/aic7xxx/aic79xx_osm_pci.c 	uint8_t	__iomem *maddr;
uint8_t           420 drivers/scsi/aic7xxx/aic79xx_pci.c 	uint8_t	 hcntrl;
uint8_t           643 drivers/scsi/aic7xxx/aic79xx_pci.c 	uint8_t	 termctl;
uint8_t           785 drivers/scsi/aic7xxx/aic79xx_pci.c 	uint8_t		pci_status[8];
uint8_t           843 drivers/scsi/aic7xxx/aic79xx_pci.c 	uint8_t		split_status[4];
uint8_t           844 drivers/scsi/aic7xxx/aic79xx_pci.c 	uint8_t		split_status1[4];
uint8_t           845 drivers/scsi/aic7xxx/aic79xx_pci.c 	uint8_t		sg_split_status[2];
uint8_t           846 drivers/scsi/aic7xxx/aic79xx_pci.c 	uint8_t		sg_split_status1[2];
uint8_t           389 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t	 scsi_status;		/* Standard SCSI status byte */
uint8_t           398 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t  scsi_status;		/* SCSI status to give to initiator */
uint8_t           399 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t  target_phases;		/* Bitmap of phases to execute */
uint8_t           400 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t  data_phase;		/* Data-In or Data-Out */
uint8_t           401 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t  initiator_tag;		/* Initiator's transaction tag */
uint8_t           412 drivers/scsi/aic7xxx/aic7xxx.h 		uint8_t	 cdb[12];
uint8_t           462 drivers/scsi/aic7xxx/aic7xxx.h /*24*/	uint8_t  control;	/* See SCB_CONTROL in aic7xxx.reg for details */
uint8_t           463 drivers/scsi/aic7xxx/aic7xxx.h /*25*/	uint8_t  scsiid;	/* what to load in the SCSIID register */
uint8_t           464 drivers/scsi/aic7xxx/aic7xxx.h /*26*/	uint8_t  lun;
uint8_t           465 drivers/scsi/aic7xxx/aic7xxx.h /*27*/	uint8_t  tag;			/*
uint8_t           469 drivers/scsi/aic7xxx/aic7xxx.h /*28*/	uint8_t  cdb_len;
uint8_t           470 drivers/scsi/aic7xxx/aic7xxx.h /*29*/	uint8_t  scsirate;		/* Value for SCSIRATE register */
uint8_t           471 drivers/scsi/aic7xxx/aic7xxx.h /*30*/	uint8_t  scsioffset;		/* Value for SCSIOFFSET register */
uint8_t           472 drivers/scsi/aic7xxx/aic7xxx.h /*31*/	uint8_t  next;			/*
uint8_t           478 drivers/scsi/aic7xxx/aic7xxx.h /*32*/	uint8_t  cdb32[32];		/*
uint8_t           607 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t	numscbs;
uint8_t           608 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t	maxhscbs;		/* Number of SCBs on the card */
uint8_t           609 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t	init_level;		/*
uint8_t           621 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t scsiid;		/* Our ID and the initiator's ID */
uint8_t           622 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t identify;	/* Identify message */
uint8_t           623 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t bytes[22];	/* 
uint8_t           628 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t cmd_valid;	/*
uint8_t           639 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t pad[7];
uint8_t           648 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t initiator_id;
uint8_t           649 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t event_type;	/* MSG type or EVENT_TYPE_BUS_RESET */
uint8_t           651 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t event_arg;
uint8_t           667 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t event_r_idx;
uint8_t           668 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t event_w_idx;
uint8_t           689 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t protocol_version;	/* SCSI Revision level */
uint8_t           690 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t transport_version;	/* SPI Revision level */
uint8_t           691 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t width;			/* Bus width */
uint8_t           692 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t period;			/* Sync rate factor */
uint8_t           693 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t offset;			/* Sync offset */
uint8_t           694 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t ppr_options;		/* Parallel Protocol Request options */
uint8_t           700 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t scsirate;		/* Computed value for SCSIRATE reg */
uint8_t           735 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t period; /* Period to send to SCSI target */
uint8_t           759 drivers/scsi/aic7xxx/aic7xxx.h         uint8_t phase;
uint8_t           760 drivers/scsi/aic7xxx/aic7xxx.h         uint8_t mesg_out; /* Message response to parity errors */
uint8_t           872 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t busspd;
uint8_t           873 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t bustime;
uint8_t           882 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   command;
uint8_t           883 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   csize_lattime;
uint8_t           884 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   optionmode;
uint8_t           885 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   crccontrol1;
uint8_t           886 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   dscommand0;
uint8_t           887 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   dspcistatus;
uint8_t           888 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   scbbaddr;
uint8_t           889 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t   dff_thrsh;
uint8_t           989 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  unpause;
uint8_t           990 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  pause;
uint8_t           993 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  qoutfifonext;
uint8_t           994 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  qinfifonext;
uint8_t           995 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			 *qoutfifo;
uint8_t           996 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			 *qinfifo;
uint8_t          1007 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  our_id;
uint8_t          1008 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  our_id_b;
uint8_t          1019 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  tqinfifonext;
uint8_t          1024 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  seqctl;
uint8_t          1029 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  send_msg_perror;
uint8_t          1031 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  msgout_buf[12];/* Message we are sending */
uint8_t          1032 drivers/scsi/aic7xxx/aic7xxx.h 	uint8_t			  msgin_buf[12];/* Message we are receiving */
uint8_t            76 drivers/scsi/aic7xxx/aic7xxx_93cx6.c   	uint8_t len;
uint8_t            77 drivers/scsi/aic7xxx/aic7xxx_93cx6.c  	uint8_t bits[11];
uint8_t           107 drivers/scsi/aic7xxx/aic7xxx_93cx6.c 	uint8_t temp;
uint8_t           133 drivers/scsi/aic7xxx/aic7xxx_93cx6.c 	uint8_t temp;
uint8_t           155 drivers/scsi/aic7xxx/aic7xxx_93cx6.c 	uint8_t temp;
uint8_t           226 drivers/scsi/aic7xxx/aic7xxx_93cx6.c 	uint8_t temp;
uint8_t            69 drivers/scsi/aic7xxx/aic7xxx_core.c         uint8_t errno;
uint8_t           220 drivers/scsi/aic7xxx/aic7xxx_core.c 					   u_int instrptr, uint8_t *dconsts);
uint8_t           419 drivers/scsi/aic7xxx/aic7xxx_core.c 	return (((uint8_t *)&ahc->targetcmds[index]) - ahc->qoutfifo);
uint8_t           810 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t	sblkctl;
uint8_t          5324 drivers/scsi/aic7xxx/aic7xxx_core.c 	driver_data_size = 2 * 256 * sizeof(uint8_t);
uint8_t          5358 drivers/scsi/aic7xxx/aic7xxx_core.c 		ahc->qoutfifo = (uint8_t *)&ahc->targetcmds[AHC_TMODE_CMDS];
uint8_t          5365 drivers/scsi/aic7xxx/aic7xxx_core.c 		ahc->qoutfifo = (uint8_t *)&ahc->targetcmds[256];
uint8_t          5783 drivers/scsi/aic7xxx/aic7xxx_core.c 		uint8_t prev_pos;
uint8_t          5816 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t qinpos;
uint8_t          5817 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t diff;
uint8_t          5835 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t qinstart;
uint8_t          5836 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t qinpos;
uint8_t          5837 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t qintail;
uint8_t          5838 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t next;
uint8_t          5839 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t prev;
uint8_t          5840 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t curscbptr;
uint8_t          5972 drivers/scsi/aic7xxx/aic7xxx_core.c 		uint8_t scb_index;
uint8_t          6433 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t scsiseq;
uint8_t          6804 drivers/scsi/aic7xxx/aic7xxx_core.c 		uint8_t ins_bytes[4];
uint8_t          6828 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t	download_consts[7];
uint8_t          6962 drivers/scsi/aic7xxx/aic7xxx_core.c ahc_download_instr(struct ahc_softc *ahc, u_int instrptr, uint8_t *dconsts)
uint8_t          7144 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t last_phase;
uint8_t          7145 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t qinpos;
uint8_t          7146 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t qintail;
uint8_t          7147 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t qoutpos;
uint8_t          7148 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t scb_index;
uint8_t          7149 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t saved_scbptr;
uint8_t          7830 drivers/scsi/aic7xxx/aic7xxx_core.c 	uint8_t *byte;
uint8_t           159 drivers/scsi/aic7xxx/aic7xxx_osm.c 	uint8_t tag_commands[16];	/* Allow for wide/twin adapters. */
uint8_t           398 drivers/scsi/aic7xxx/aic7xxx_osm.c uint8_t
uint8_t           401 drivers/scsi/aic7xxx/aic7xxx_osm.c 	uint8_t x;
uint8_t           413 drivers/scsi/aic7xxx/aic7xxx_osm.c ahc_outb(struct ahc_softc * ahc, long port, uint8_t val)
uint8_t           424 drivers/scsi/aic7xxx/aic7xxx_osm.c ahc_outsb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
uint8_t           438 drivers/scsi/aic7xxx/aic7xxx_osm.c ahc_insb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
uint8_t           698 drivers/scsi/aic7xxx/aic7xxx_osm.c 	uint8_t *bh;
uint8_t           140 drivers/scsi/aic7xxx/aic7xxx_osm.h 	volatile uint8_t __iomem *maddr;
uint8_t           370 drivers/scsi/aic7xxx/aic7xxx_osm.h uint8_t ahc_inb(struct ahc_softc * ahc, long port);
uint8_t           371 drivers/scsi/aic7xxx/aic7xxx_osm.h void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val);
uint8_t           373 drivers/scsi/aic7xxx/aic7xxx_osm.h 	       uint8_t *, int count);
uint8_t           375 drivers/scsi/aic7xxx/aic7xxx_osm.h 	       uint8_t *, int count);
uint8_t           279 drivers/scsi/aic7xxx/aic7xxx_osm_pci.c 		uint8_t retval;
uint8_t           363 drivers/scsi/aic7xxx/aic7xxx_osm_pci.c 				 uint8_t __iomem **maddr)
uint8_t           391 drivers/scsi/aic7xxx/aic7xxx_osm_pci.c 	uint8_t	__iomem *maddr;
uint8_t           624 drivers/scsi/aic7xxx/aic7xxx_pci.c static void    write_brdctl(struct ahc_softc *ahc, uint8_t value);
uint8_t           625 drivers/scsi/aic7xxx/aic7xxx_pci.c static uint8_t read_brdctl(struct ahc_softc *ahc);
uint8_t           714 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t	 sblkctl;
uint8_t          1169 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t	 hcntrl;
uint8_t          1525 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t brddat;
uint8_t          1750 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t brdctl;
uint8_t          1772 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t brdctl;
uint8_t          1812 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t brdctl;
uint8_t          1813 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t spiocap;
uint8_t          1867 drivers/scsi/aic7xxx/aic7xxx_pci.c write_brdctl(struct ahc_softc *ahc, uint8_t value)
uint8_t          1869 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t brdctl;
uint8_t          1898 drivers/scsi/aic7xxx/aic7xxx_pci.c static uint8_t
uint8_t          1901 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t brdctl;
uint8_t          1902 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t value;
uint8_t          2049 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t rev;
uint8_t          2067 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t rev;
uint8_t          2172 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t rev;
uint8_t          2244 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t rev;
uint8_t          2275 drivers/scsi/aic7xxx/aic7xxx_pci.c 	uint8_t rev;
uint8_t          1728 drivers/scsi/aic7xxx/aicasm/aicasm_gram.y 	uint8_t shift_control;
uint8_t           164 drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h 		uint8_t		   bytes[4];
uint8_t            77 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h 	uint8_t	  valid_bitmask;
uint8_t            78 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h 	uint8_t	  modes;
uint8_t            84 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h 	uint8_t	  value;
uint8_t            85 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h 	uint8_t	  mask;
uint8_t            62 drivers/scsi/aic7xxx/aiclib.h 	uint8_t opcode;
uint8_t            63 drivers/scsi/aic7xxx/aiclib.h 	uint8_t byte2;
uint8_t            64 drivers/scsi/aic7xxx/aiclib.h 	uint8_t unused[2];
uint8_t            65 drivers/scsi/aic7xxx/aiclib.h 	uint8_t length;
uint8_t            66 drivers/scsi/aic7xxx/aiclib.h 	uint8_t control;
uint8_t            77 drivers/scsi/aic7xxx/aiclib.h 	uint8_t error_code;
uint8_t            82 drivers/scsi/aic7xxx/aiclib.h 	uint8_t segment;
uint8_t            83 drivers/scsi/aic7xxx/aiclib.h 	uint8_t flags;
uint8_t           104 drivers/scsi/aic7xxx/aiclib.h 	uint8_t info[4];
uint8_t           105 drivers/scsi/aic7xxx/aiclib.h 	uint8_t extra_len;
uint8_t           106 drivers/scsi/aic7xxx/aiclib.h 	uint8_t cmd_spec_info[4];
uint8_t           107 drivers/scsi/aic7xxx/aiclib.h 	uint8_t add_sense_code;
uint8_t           108 drivers/scsi/aic7xxx/aiclib.h 	uint8_t add_sense_code_qual;
uint8_t           109 drivers/scsi/aic7xxx/aiclib.h 	uint8_t fru;
uint8_t           110 drivers/scsi/aic7xxx/aiclib.h 	uint8_t sense_key_spec[3];
uint8_t           116 drivers/scsi/aic7xxx/aiclib.h 	uint8_t extra_bytes[14];
uint8_t           145 drivers/scsi/aic7xxx/aiclib.h scsi_4btoul(uint8_t *bytes)
uint8_t           107 drivers/scsi/arcmsr/arcmsr.h       uint8_t  Signature[8];
uint8_t           122 drivers/scsi/arcmsr/arcmsr.h     uint8_t				messagedatabuffer[ARCMSR_API_DATA_BUFLEN];
uint8_t           190 drivers/scsi/arcmsr/arcmsr.h 	uint8_t       data[124];
uint8_t           209 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		cfgSerial[16];		/*26,104-119*/
uint8_t           446 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		Bus;
uint8_t           447 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		TargetID;
uint8_t           448 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		LUN;
uint8_t           449 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		Function;
uint8_t           450 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		CdbLength;
uint8_t           451 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		sgcount;
uint8_t           452 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		Flags;
uint8_t           460 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		msgPages;
uint8_t           463 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		Cdb[16];
uint8_t           464 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		DeviceStatus;
uint8_t           470 drivers/scsi/arcmsr/arcmsr.h 	uint8_t		SenseData[15];
uint8_t           769 drivers/scsi/arcmsr/arcmsr.h 	uint8_t			adapter_index;
uint8_t           806 drivers/scsi/arcmsr/arcmsr.h 	uint8_t			rqbuffer[ARCMSR_MAX_QBUFFER];
uint8_t           812 drivers/scsi/arcmsr/arcmsr.h 	uint8_t			wqbuffer[ARCMSR_MAX_QBUFFER];
uint8_t           818 drivers/scsi/arcmsr/arcmsr.h 	uint8_t			devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN];
uint8_t           894 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				ErrorCode:7;
uint8_t           897 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				Valid:1;
uint8_t           898 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				SegmentNumber;
uint8_t           899 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				SenseKey:4;
uint8_t           900 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				Reserved:1;
uint8_t           901 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				IncorrectLength:1;
uint8_t           902 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				EndOfMedia:1;
uint8_t           903 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				FileMark:1;
uint8_t           904 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				Information[4];
uint8_t           905 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				AdditionalSenseLength;
uint8_t           906 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				CommandSpecificInformation[4];
uint8_t           907 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				AdditionalSenseCode;
uint8_t           908 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				AdditionalSenseCodeQualifier;
uint8_t           909 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				FieldReplaceableUnitCode;
uint8_t           910 drivers/scsi/arcmsr/arcmsr.h 	uint8_t				SenseKeySpecific[3];
uint8_t            72 drivers/scsi/arcmsr/arcmsr_attr.c 	uint8_t *ptmpQbuffer;
uint8_t            80 drivers/scsi/arcmsr/arcmsr_attr.c 	ptmpQbuffer = (uint8_t *)buf;
uint8_t           120 drivers/scsi/arcmsr/arcmsr_attr.c 	uint8_t *pQbuffer, *ptmpuserbuffer;
uint8_t           128 drivers/scsi/arcmsr/arcmsr_attr.c 	ptmpuserbuffer = (uint8_t *)buf;
uint8_t           167 drivers/scsi/arcmsr/arcmsr_attr.c 	uint8_t *pQbuffer;
uint8_t           381 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
uint8_t           399 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
uint8_t           419 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
uint8_t           959 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t bus,dev_fun;
uint8_t          1151 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
uint8_t          1164 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
uint8_t          1177 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
uint8_t          1191 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
uint8_t          1204 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
uint8_t          1219 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
uint8_t          1221 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t rtnval = 0;
uint8_t          1331 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t id, lun;
uint8_t          1768 drivers/scsi/arcmsr/arcmsr_hba.c 	arcmsr_cdb->sgcount = (uint8_t)nseg;
uint8_t          2110 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t *pQbuffer;
uint8_t          2111 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t *buf1 = NULL;
uint8_t          2151 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t *pQbuffer;
uint8_t          2152 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t __iomem *iop_data;
uint8_t          2157 drivers/scsi/arcmsr/arcmsr_hba.c 	iop_data = (uint8_t __iomem *)prbuffer->data;
uint8_t          2191 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t *pQbuffer;
uint8_t          2193 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t *buf1 = NULL;
uint8_t          2216 drivers/scsi/arcmsr/arcmsr_hba.c 		buf1 = (uint8_t *)buf2;
uint8_t          2236 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t *pQbuffer;
uint8_t          2238 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t __iomem *iop_data;
uint8_t          2248 drivers/scsi/arcmsr/arcmsr_hba.c 		iop_data = (uint8_t __iomem *)pwbuffer->data;
uint8_t          2798 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t *ptmpQbuffer;
uint8_t          2849 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t *pQbuffer, *ptmpuserbuffer;
uint8_t          2908 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t *pQbuffer = acb->rqbuffer;
uint8_t          2926 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t *pQbuffer = acb->wqbuffer;
uint8_t          2943 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t *pQbuffer;
uint8_t          3682 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t		year;
uint8_t          3683 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t		month;
uint8_t          3684 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t		date;
uint8_t          3685 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t		hour;
uint8_t          3686 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t		minute;
uint8_t          3687 drivers/scsi/arcmsr/arcmsr_hba.c 		uint8_t		second;
uint8_t          4226 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t value[64];
uint8_t          4333 drivers/scsi/arcmsr/arcmsr_hba.c static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
uint8_t          4337 drivers/scsi/arcmsr/arcmsr_hba.c 	uint8_t rtnval = 0x00;
uint8_t           977 drivers/scsi/be2iscsi/be_cmds.c 				    int entry_size, uint8_t is_header,
uint8_t           978 drivers/scsi/be2iscsi/be_cmds.c 				    uint8_t ulp_num)
uint8_t          1079 drivers/scsi/be2iscsi/be_cmds.c 			uint8_t ulp_num)
uint8_t          1337 drivers/scsi/be2iscsi/be_cmds.c 	uint8_t ulp_num = 0;
uint8_t          1794 drivers/scsi/be2iscsi/be_cmds.c 	uint8_t i = 0;
uint8_t           840 drivers/scsi/be2iscsi/be_cmds.h 				    int entry_size, uint8_t is_header,
uint8_t           841 drivers/scsi/be2iscsi/be_cmds.h 				    uint8_t ulp_num);
uint8_t           855 drivers/scsi/be2iscsi/be_cmds.h 		       uint8_t ulp_num);
uint8_t           562 drivers/scsi/be2iscsi/be_main.c 	uint8_t ulp_num = 0;
uint8_t          1335 drivers/scsi/be2iscsi/be_main.c 	uint8_t type;
uint8_t          2267 drivers/scsi/be2iscsi/be_main.c 	uint8_t dsp_value = 0;
uint8_t          2349 drivers/scsi/be2iscsi/be_main.c 	uint8_t mem_descr_index, ulp_num;
uint8_t          2702 drivers/scsi/be2iscsi/be_main.c 	uint8_t ulp_num;
uint8_t          3129 drivers/scsi/be2iscsi/be_main.c 		       unsigned int def_pdu_ring_sz, uint8_t ulp_num)
uint8_t          3181 drivers/scsi/be2iscsi/be_main.c 			unsigned int def_pdu_ring_sz, uint8_t ulp_num)
uint8_t          3346 drivers/scsi/be2iscsi/be_main.c 	uint8_t ulp_count = 0, ulp_base_num = 0;
uint8_t          4373 drivers/scsi/be2iscsi/be_main.c static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
uint8_t           240 drivers/scsi/be2iscsi/be_main.h 	uint8_t ulp_num;	/* ULP to which CID binded */
uint8_t           470 drivers/scsi/be2iscsi/be_main.h 	uint8_t wrb_type;
uint8_t          5549 drivers/scsi/bfa/bfa_ioc.c 	phy->ubuf = (uint8_t *) attr;
uint8_t          5519 drivers/scsi/bfa/bfa_svc.c 	uint8_t *buf;
uint8_t          6557 drivers/scsi/bfa/bfa_svc.c 	uint8_t subtesttype;
uint8_t          3253 drivers/scsi/bfa/bfad_bsg.c 	sg_table = (struct bfa_sge_s *) (((uint8_t *)buf_base) +
uint8_t          3308 drivers/scsi/bfa/bfad_bsg.c 	uint8_t	lp_tag;
uint8_t          3379 drivers/scsi/bfa/bfad_bsg.c 	if (copy_from_user((uint8_t *)bsg_fcpt,
uint8_t          3474 drivers/scsi/bfa/bfad_bsg.c 			    (((uint8_t *)drv_fcxp->reqbuf_info) +
uint8_t          3491 drivers/scsi/bfa/bfad_bsg.c 			    (((uint8_t *)drv_fcxp->rspbuf_info) +
uint8_t          3522 drivers/scsi/bfa/bfad_bsg.c 			    (uint8_t *)rsp_buf_info->virt,
uint8_t           326 drivers/scsi/bfa/bfi.h 	uint8_t patch;
uint8_t           327 drivers/scsi/bfa/bfi.h 	uint8_t maint;
uint8_t           328 drivers/scsi/bfa/bfi.h 	uint8_t minor;
uint8_t           329 drivers/scsi/bfa/bfi.h 	uint8_t major;
uint8_t           330 drivers/scsi/bfa/bfi.h 	uint8_t rsvd[2];
uint8_t           331 drivers/scsi/bfa/bfi.h 	uint8_t build;
uint8_t           332 drivers/scsi/bfa/bfi.h 	uint8_t phase;
uint8_t           334 drivers/scsi/bfa/bfi.h 	uint8_t major;
uint8_t           335 drivers/scsi/bfa/bfi.h 	uint8_t minor;
uint8_t           336 drivers/scsi/bfa/bfi.h 	uint8_t maint;
uint8_t           337 drivers/scsi/bfa/bfi.h 	uint8_t patch;
uint8_t           338 drivers/scsi/bfa/bfi.h 	uint8_t phase;
uint8_t           339 drivers/scsi/bfa/bfi.h 	uint8_t build;
uint8_t           340 drivers/scsi/bfa/bfi.h 	uint8_t rsvd[2];
uint8_t           558 drivers/scsi/csiostor/csio_attr.c 	uint8_t wwn[8];
uint8_t           265 drivers/scsi/csiostor/csio_hw.c 	const uint8_t *buf = &v->id_tag;
uint8_t           266 drivers/scsi/csiostor/csio_hw.c 	const uint8_t *vpdr_len = &v->vpdr_tag;
uint8_t           306 drivers/scsi/csiostor/csio_hw.c 	uint8_t *vpd, csum;
uint8_t           528 drivers/scsi/csiostor/csio_hw.c 		    uint32_t n, const uint8_t *data)
uint8_t           567 drivers/scsi/csiostor/csio_hw.c 	if (memcmp(data - n, (uint8_t *)buf + offset, n)) {
uint8_t           668 drivers/scsi/csiostor/csio_hw.c csio_hw_fw_dload(struct csio_hw *hw, uint8_t *fw_data, uint32_t size)
uint8_t           674 drivers/scsi/csiostor/csio_hw.c 	uint8_t first_page[SF_PAGE_SIZE];
uint8_t           753 drivers/scsi/csiostor/csio_hw.c 				  (const uint8_t *)&hdr->fw_ver);
uint8_t           921 drivers/scsi/csiostor/csio_hw.c 	uint8_t mpfn;
uint8_t          1332 drivers/scsi/csiostor/csio_hw.c 	ret = csio_hw_fw_dload(hw, (uint8_t *) fw_data, size);
uint8_t          1781 drivers/scsi/csiostor/csio_hw.c 	uint8_t portid;
uint8_t          3984 drivers/scsi/csiostor/csio_hw.c 	uint8_t evtq_stop = 0;
uint8_t           174 drivers/scsi/csiostor/csio_hw.h 	uint8_t			data[CSIO_EVT_MSG_SIZE];
uint8_t           249 drivers/scsi/csiostor/csio_hw.h 	uint8_t    width;
uint8_t           266 drivers/scsi/csiostor/csio_hw.h 	uint8_t ec[EC_LEN + 1];
uint8_t           267 drivers/scsi/csiostor/csio_hw.h 	uint8_t sn[SERNUM_LEN + 1];
uint8_t           268 drivers/scsi/csiostor/csio_hw.h 	uint8_t id[ID_LEN + 1];
uint8_t           327 drivers/scsi/csiostor/csio_hw.h 	uint8_t		portid;
uint8_t           328 drivers/scsi/csiostor/csio_hw.h 	uint8_t		link_status;
uint8_t           330 drivers/scsi/csiostor/csio_hw.h 	uint8_t		mac[6];
uint8_t           331 drivers/scsi/csiostor/csio_hw.h 	uint8_t		mod_type;
uint8_t           332 drivers/scsi/csiostor/csio_hw.h 	uint8_t		rsvd1;
uint8_t           333 drivers/scsi/csiostor/csio_hw.h 	uint8_t		rsvd2;
uint8_t           334 drivers/scsi/csiostor/csio_hw.h 	uint8_t		rsvd3;
uint8_t           512 drivers/scsi/csiostor/csio_hw.h 	uint8_t			pfn;			/* Physical Function
uint8_t           516 drivers/scsi/csiostor/csio_hw.h 	uint8_t			num_pports;		/* Number of physical
uint8_t           519 drivers/scsi/csiostor/csio_hw.h 	uint8_t			rst_retries;		/* Reset retries */
uint8_t           520 drivers/scsi/csiostor/csio_hw.h 	uint8_t			cur_evt;		/* current s/m evt */
uint8_t           521 drivers/scsi/csiostor/csio_hw.h 	uint8_t			prev_evt;		/* Previous s/m evt */
uint8_t           539 drivers/scsi/csiostor/csio_hw.h 	uint8_t			cfg_neq;		/* FW configured no of
uint8_t           542 drivers/scsi/csiostor/csio_hw.h 	uint8_t			cfg_niq;		/* FW configured no of
uint8_t           772 drivers/scsi/csiostor/csio_init.c csio_lnodes_block_by_port(struct csio_hw *hw, uint8_t portid)
uint8_t           813 drivers/scsi/csiostor/csio_init.c csio_lnodes_unblock_by_port(struct csio_hw *hw, uint8_t portid)
uint8_t            69 drivers/scsi/csiostor/csio_init.h void csio_lnodes_block_by_port(struct csio_hw *, uint8_t);
uint8_t            70 drivers/scsi/csiostor/csio_init.h void csio_lnodes_unblock_by_port(struct csio_hw *, uint8_t);
uint8_t           150 drivers/scsi/csiostor/csio_isr.c 	uint8_t *scsiwr;
uint8_t           151 drivers/scsi/csiostor/csio_isr.c 	uint8_t subop;
uint8_t           516 drivers/scsi/csiostor/csio_isr.c 		cnt = min_t(uint8_t, hw->cfg_niq, cnt);
uint8_t            55 drivers/scsi/csiostor/csio_lnode.c #define PORT_ID_PTR(_x)         ((uint8_t *)(&_x) + 1)
uint8_t           105 drivers/scsi/csiostor/csio_lnode.c #define csio_ct_get_pld(cp)	((void *)(((uint8_t *)cp) + FC_CT_HDR_LEN))
uint8_t           115 drivers/scsi/csiostor/csio_lnode.c csio_ln_lookup_by_portid(struct csio_hw *hw, uint8_t portid)
uint8_t           178 drivers/scsi/csiostor/csio_lnode.c csio_lnode_lookup_by_wwpn(struct csio_hw *hw, uint8_t *wwpn)
uint8_t           211 drivers/scsi/csiostor/csio_lnode.c csio_fill_ct_iu(void *buf, uint8_t type, uint8_t sub_type, uint16_t op)
uint8_t           221 drivers/scsi/csiostor/csio_lnode.c csio_hostname(uint8_t *buf, size_t buf_len)
uint8_t           229 drivers/scsi/csiostor/csio_lnode.c csio_osname(uint8_t *buf, size_t buf_len)
uint8_t           241 drivers/scsi/csiostor/csio_lnode.c csio_append_attrib(uint8_t **ptr, uint16_t type, void *val, size_t val_len)
uint8_t           294 drivers/scsi/csiostor/csio_lnode.c 	uint8_t *pld;
uint8_t           302 drivers/scsi/csiostor/csio_lnode.c 	uint8_t buf[64];
uint8_t           303 drivers/scsi/csiostor/csio_lnode.c 	uint8_t *fc4_type;
uint8_t           328 drivers/scsi/csiostor/csio_lnode.c 	pld = (uint8_t *)csio_ct_get_pld(cmd);
uint8_t           386 drivers/scsi/csiostor/csio_lnode.c 	len = (uint32_t)(pld - (uint8_t *)cmd);
uint8_t           407 drivers/scsi/csiostor/csio_lnode.c 	uint8_t *pld;
uint8_t           415 drivers/scsi/csiostor/csio_lnode.c 	uint8_t buf[64];
uint8_t           440 drivers/scsi/csiostor/csio_lnode.c 	pld = (uint8_t *)csio_ct_get_pld(cmd);
uint8_t           491 drivers/scsi/csiostor/csio_lnode.c 	len = (uint32_t)(pld - (uint8_t *)cmd);
uint8_t           634 drivers/scsi/csiostor/csio_lnode.c 	memcpy(&nport_id, &rsp->vnport_mac[3], sizeof(uint8_t)*3);
uint8_t           723 drivers/scsi/csiostor/csio_lnode.c 	uint8_t portid;
uint8_t           724 drivers/scsi/csiostor/csio_lnode.c 	uint8_t sub_op;
uint8_t           873 drivers/scsi/csiostor/csio_lnode.c csio_handle_link_up(struct csio_hw *hw, uint8_t portid, uint32_t fcfi,
uint8_t          1035 drivers/scsi/csiostor/csio_lnode.c csio_handle_link_down(struct csio_hw *hw, uint8_t portid, uint32_t fcfi,
uint8_t          1387 drivers/scsi/csiostor/csio_lnode.c csio_get_phy_port_stats(struct csio_hw *hw, uint8_t portid,
uint8_t          1488 drivers/scsi/csiostor/csio_lnode.c 	uint8_t portid, opcode = *(uint8_t *)cmd;
uint8_t          1682 drivers/scsi/csiostor/csio_lnode.c 		      uint32_t immd_len, uint8_t sub_op, uint32_t sid,
uint8_t          1683 drivers/scsi/csiostor/csio_lnode.c 		      uint32_t did, uint32_t flow_id, uint8_t *fw_wr)
uint8_t          1702 drivers/scsi/csiostor/csio_lnode.c 	wr->tmo_val = (uint8_t) io_req->tmo;
uint8_t          1726 drivers/scsi/csiostor/csio_lnode.c 		uint8_t sub_op, struct csio_dma_buf *pld,
uint8_t          1733 drivers/scsi/csiostor/csio_lnode.c 	uint8_t fw_wr[64];
uint8_t          1736 drivers/scsi/csiostor/csio_lnode.c 	uint8_t im_len = 0;
uint8_t          1747 drivers/scsi/csiostor/csio_lnode.c 		im_len = (uint8_t)pld_len;
uint8_t          1966 drivers/scsi/csiostor/csio_lnode.c csio_disable_lnodes(struct csio_hw *hw, uint8_t portid, bool disable)
uint8_t            71 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			priority;
uint8_t            72 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			mac[6];
uint8_t            73 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			name_id[8];
uint8_t            74 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			fabric[8];
uint8_t            76 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			vlan_id;
uint8_t            78 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			fc_map[3];
uint8_t            81 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			get_next:1;
uint8_t            82 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			link_aff:1;
uint8_t            83 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			fpma:1;
uint8_t            84 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			spma:1;
uint8_t            85 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			login:1;
uint8_t            86 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			portid;
uint8_t            87 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			spma_mac[6];
uint8_t           139 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			wwpn[8];	/* WWPN */
uint8_t           140 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			wwnn[8];	/* WWNN */
uint8_t           142 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			vvl[16];	/* Vendor version level */
uint8_t           151 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			portid;		/* Port ID */
uint8_t           152 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			rsvd1;
uint8_t           161 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			mac[6];
uint8_t           169 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			cur_evt;	/* Current event */
uint8_t           170 drivers/scsi/csiostor/csio_lnode.h 	uint8_t			prev_evt;	/* Previous event */
uint8_t           239 drivers/scsi/csiostor/csio_lnode.h struct csio_lnode *csio_lnode_lookup_by_wwpn(struct csio_hw *, uint8_t *);
uint8_t           240 drivers/scsi/csiostor/csio_lnode.h int csio_get_phy_port_stats(struct csio_hw *, uint8_t ,
uint8_t           245 drivers/scsi/csiostor/csio_lnode.h void csio_disable_lnodes(struct csio_hw *, uint8_t, bool);
uint8_t           110 drivers/scsi/csiostor/csio_mb.c 			  uint8_t *mpfn)
uint8_t           282 drivers/scsi/csiostor/csio_mb.c 	ldst_cmd->u.pcie.r = (uint8_t)reg;
uint8_t           839 drivers/scsi/csiostor/csio_mb.c 			uint32_t mb_tmo, uint8_t port_id, uint32_t sub_opcode,
uint8_t           840 drivers/scsi/csiostor/csio_mb.c 			uint8_t cos, bool link_status, uint32_t fcfi,
uint8_t           909 drivers/scsi/csiostor/csio_mb.c 		uint8_t vnport_wwnn[8],	uint8_t vnport_wwpn[8],
uint8_t          1059 drivers/scsi/csiostor/csio_mb.c 	uint8_t *src;
uint8_t          1060 drivers/scsi/csiostor/csio_mb.c 	uint8_t *dst;
uint8_t          1067 drivers/scsi/csiostor/csio_mb.c 		dst = (uint8_t *)(&stats) + ((portparams->idx - 1) * 8);
uint8_t          1068 drivers/scsi/csiostor/csio_mb.c 		src = (uint8_t *)rsp + (CSIO_STATS_OFFSET * 8);
uint8_t          1212 drivers/scsi/csiostor/csio_mb.c 			 *((uint8_t *)mbp->mb));
uint8_t          1221 drivers/scsi/csiostor/csio_mb.c 				    hw->pfn, *((uint8_t *)mbp->mb));
uint8_t          1250 drivers/scsi/csiostor/csio_mb.c 					 hw->pfn, *((uint8_t *)mbp->mb), owner);
uint8_t          1257 drivers/scsi/csiostor/csio_mb.c 						 hw->pfn, *((uint8_t *)mbp->mb),
uint8_t          1338 drivers/scsi/csiostor/csio_mb.c 		 hw->pfn, *((uint8_t *)cmd));
uint8_t          1376 drivers/scsi/csiostor/csio_mb.c csio_mb_portmod_changed(struct csio_hw *hw, uint8_t port_id)
uint8_t          1407 drivers/scsi/csiostor/csio_mb.c 	uint8_t opcode = *(uint8_t *)cmd;
uint8_t          1409 drivers/scsi/csiostor/csio_mb.c 	uint8_t port_id;
uint8_t          1412 drivers/scsi/csiostor/csio_mb.c 	uint8_t mod_type;
uint8_t            49 drivers/scsi/csiostor/csio_mb.h 	uint8_t		portid;
uint8_t            50 drivers/scsi/csiostor/csio_mb.h 	uint8_t		idx;
uint8_t            51 drivers/scsi/csiostor/csio_mb.h 	uint8_t		nstats;
uint8_t           159 drivers/scsi/csiostor/csio_mb.h 			       uint8_t *);
uint8_t           182 drivers/scsi/csiostor/csio_mb.h 		  uint8_t, bool, uint32_t, uint16_t,
uint8_t           219 drivers/scsi/csiostor/csio_mb.h 			uint32_t, uint8_t, uint32_t, uint8_t, bool, uint32_t,
uint8_t           224 drivers/scsi/csiostor/csio_mb.h 			uint8_t [8], uint8_t [8],
uint8_t           101 drivers/scsi/csiostor/csio_rnode.c csio_is_rnode_wka(uint8_t rport_type)
uint8_t           145 drivers/scsi/csiostor/csio_rnode.c csio_rn_lookup_wwpn(struct csio_lnode *ln, uint8_t *wwpn)
uint8_t           303 drivers/scsi/csiostor/csio_rnode.c 	uint8_t rport_type;
uint8_t           447 drivers/scsi/csiostor/csio_rnode.c 	uint8_t null[8];
uint8_t           448 drivers/scsi/csiostor/csio_rnode.c 	uint8_t rport_type;
uint8_t           449 drivers/scsi/csiostor/csio_rnode.c 	uint8_t fc_class;
uint8_t           868 drivers/scsi/csiostor/csio_rnode.c csio_rnode_fwevt_handler(struct csio_rnode *rn, uint8_t fwevt)
uint8_t           103 drivers/scsi/csiostor/csio_rnode.h 	uint8_t			cur_evt;		/* Current event */
uint8_t           104 drivers/scsi/csiostor/csio_rnode.h 	uint8_t			prev_evt;		/* Previous event */
uint8_t           132 drivers/scsi/csiostor/csio_rnode.h void csio_rnode_fwevt_handler(struct csio_rnode *rn, uint8_t fwevt);
uint8_t           188 drivers/scsi/csiostor/csio_scsi.c 		fcp_cmnd->fc_tm_flags = (uint8_t)scmnd->SCp.Message;
uint8_t           207 drivers/scsi/csiostor/csio_scsi.c 	uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len;
uint8_t           217 drivers/scsi/csiostor/csio_scsi.c 	wr->tmo_val = (uint8_t) req->tmo;
uint8_t           270 drivers/scsi/csiostor/csio_scsi.c 		uint8_t *tmpwr = csio_q_eq_wrap(hw, req->eq_idx);
uint8_t           367 drivers/scsi/csiostor/csio_scsi.c 	uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len;
uint8_t           376 drivers/scsi/csiostor/csio_scsi.c 	wr->tmo_val = (uint8_t)(req->tmo);
uint8_t           420 drivers/scsi/csiostor/csio_scsi.c 	uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len;
uint8_t           429 drivers/scsi/csiostor/csio_scsi.c 	wr->tmo_val = (uint8_t)(req->tmo);
uint8_t           495 drivers/scsi/csiostor/csio_scsi.c 			uint8_t *tmpwr = csio_q_eq_wrap(hw, req->eq_idx);
uint8_t           532 drivers/scsi/csiostor/csio_scsi.c 			uint8_t *tmpwr = csio_q_eq_wrap(hw, req->eq_idx);
uint8_t           660 drivers/scsi/csiostor/csio_scsi.c 	wr->tmo_val = (uint8_t) req->tmo;
uint8_t           688 drivers/scsi/csiostor/csio_scsi.c 		uint8_t *tmpwr = csio_q_eq_wrap(hw, req->eq_idx);
uint8_t          1103 drivers/scsi/csiostor/csio_scsi.c 		     struct csio_fl_dma_buf *flb, void *priv, uint8_t **scsiwr)
uint8_t          1107 drivers/scsi/csiostor/csio_scsi.c 	uint8_t *tempwr;
uint8_t          1108 drivers/scsi/csiostor/csio_scsi.c 	uint8_t	status;
uint8_t          1121 drivers/scsi/csiostor/csio_scsi.c 	tempwr = (uint8_t *)(cpl->data);
uint8_t          1565 drivers/scsi/csiostor/csio_scsi.c 	uint8_t flags, scsi_status = 0;
uint8_t          1740 drivers/scsi/csiostor/csio_scsi.c 	uint8_t scsi_status = SAM_STAT_GOOD;
uint8_t          2017 drivers/scsi/csiostor/csio_scsi.c 	uint8_t flags = 0;
uint8_t           149 drivers/scsi/csiostor/csio_scsi.h 	uint8_t			max_sge;	/* Max SGE */
uint8_t           150 drivers/scsi/csiostor/csio_scsi.h 	uint8_t			proto_cmd_len;	/* Proto specific SCSI
uint8_t           337 drivers/scsi/csiostor/csio_scsi.h 					  void *, uint8_t **);
uint8_t           417 drivers/scsi/csiostor/csio_wr.c 		  uint32_t vec, uint8_t portid, bool async,
uint8_t           466 drivers/scsi/csiostor/csio_wr.c 	iqp.iqintcntthresh	= (uint8_t)csio_sge_thresh_reg;
uint8_t           558 drivers/scsi/csiostor/csio_wr.c 		  int iq_idx, uint8_t portid,
uint8_t           959 drivers/scsi/csiostor/csio_wr.c 	memcpy((uint8_t *) wrp->addr1 + wr_off, data_buf, nbytes);
uint8_t           966 drivers/scsi/csiostor/csio_wr.c 		memcpy(wrp->addr2, (uint8_t *) data_buf + nbytes, data_len);
uint8_t           114 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iq_start:1;
uint8_t           115 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iq_stop:1;
uint8_t           116 drivers/scsi/csiostor/csio_wr.h 	uint8_t		pfn:3;
uint8_t           118 drivers/scsi/csiostor/csio_wr.h 	uint8_t		vfn;
uint8_t           126 drivers/scsi/csiostor/csio_wr.h 	uint8_t		viid;
uint8_t           128 drivers/scsi/csiostor/csio_wr.h 	uint8_t		type;
uint8_t           129 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqasynch;
uint8_t           130 drivers/scsi/csiostor/csio_wr.h 	uint8_t		reserved4;
uint8_t           132 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqandst;
uint8_t           133 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqanus;
uint8_t           134 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqanud;
uint8_t           138 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqdroprss;
uint8_t           139 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqpciech;
uint8_t           140 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqdcaen;
uint8_t           142 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqdcacpu;
uint8_t           143 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqintcntthresh;
uint8_t           144 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqo;
uint8_t           146 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqcprio;
uint8_t           147 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqesize;
uint8_t           153 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqflintiqhsen;
uint8_t           154 drivers/scsi/csiostor/csio_wr.h 	uint8_t		reserved5;
uint8_t           155 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqflintcongen;
uint8_t           156 drivers/scsi/csiostor/csio_wr.h 	uint8_t		iqflintcngchmap;
uint8_t           160 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0hostfcmode;
uint8_t           161 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0cprio;
uint8_t           162 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0paden;
uint8_t           163 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0packen;
uint8_t           164 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0congen;
uint8_t           165 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0dcaen;
uint8_t           167 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0dcacpu;
uint8_t           168 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0fbmin;
uint8_t           170 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0fbmax;
uint8_t           171 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0cidxfthresho;
uint8_t           172 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl0cidxfthresh;
uint8_t           180 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1hostfcmode;
uint8_t           181 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1cprio;
uint8_t           182 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1paden;
uint8_t           183 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1packen;
uint8_t           184 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1congen;
uint8_t           185 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1dcaen;
uint8_t           187 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1dcacpu;
uint8_t           188 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1fbmin;
uint8_t           190 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1fbmax;
uint8_t           191 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1cidxfthresho;
uint8_t           192 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fl1cidxfthresh;
uint8_t           202 drivers/scsi/csiostor/csio_wr.h 	uint8_t		pfn;
uint8_t           203 drivers/scsi/csiostor/csio_wr.h 	uint8_t		vfn;
uint8_t           205 drivers/scsi/csiostor/csio_wr.h 	uint8_t		eqstart:1;
uint8_t           206 drivers/scsi/csiostor/csio_wr.h 	uint8_t		eqstop:1;
uint8_t           211 drivers/scsi/csiostor/csio_wr.h 	uint8_t		hostfcmode:2;
uint8_t           212 drivers/scsi/csiostor/csio_wr.h 	uint8_t		cprio:1;
uint8_t           213 drivers/scsi/csiostor/csio_wr.h 	uint8_t		pciechn:3;
uint8_t           217 drivers/scsi/csiostor/csio_wr.h 	uint8_t		dcaen:1;
uint8_t           218 drivers/scsi/csiostor/csio_wr.h 	uint8_t		dcacpu:5;
uint8_t           220 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fbmin:3;
uint8_t           221 drivers/scsi/csiostor/csio_wr.h 	uint8_t		fbmax:3;
uint8_t           223 drivers/scsi/csiostor/csio_wr.h 	uint8_t		cidxfthresho:1;
uint8_t           224 drivers/scsi/csiostor/csio_wr.h 	uint8_t		cidxfthresh:3;
uint8_t           264 drivers/scsi/csiostor/csio_wr.h 	uint8_t			dcopy;		/* Data copy required */
uint8_t           265 drivers/scsi/csiostor/csio_wr.h 	uint8_t			reserved1;
uint8_t           344 drivers/scsi/csiostor/csio_wr.h 	uint8_t			defer_free;	/* Free of buffer can
uint8_t           366 drivers/scsi/csiostor/csio_wr.h 	uint8_t			wrap[512];	/* Temp area for q-wrap around*/
uint8_t           434 drivers/scsi/csiostor/csio_wr.h 	uint8_t		counter_val[CSIO_SGE_NCOUNTERS];
uint8_t           486 drivers/scsi/csiostor/csio_wr.h 				uint32_t, uint8_t, bool,
uint8_t           488 drivers/scsi/csiostor/csio_wr.h int csio_wr_eq_create(struct csio_hw *, void *, int, int, uint8_t,
uint8_t          2232 drivers/scsi/ips.c 	uint8_t major;
uint8_t          2233 drivers/scsi/ips.c 	uint8_t minor;
uint8_t          2234 drivers/scsi/ips.c 	uint8_t subminor;
uint8_t          2235 drivers/scsi/ips.c 	uint8_t *buffer;
uint8_t          3834 drivers/scsi/ips.c 	uint8_t basic_status;
uint8_t          3835 drivers/scsi/ips.c 	uint8_t ext_status;
uint8_t          4470 drivers/scsi/ips.c 	uint8_t scpr;
uint8_t          4471 drivers/scsi/ips.c 	uint8_t isr;
uint8_t          4496 drivers/scsi/ips.c 	uint8_t isr = 0;
uint8_t          4497 drivers/scsi/ips.c 	uint8_t scpr;
uint8_t          4697 drivers/scsi/ips.c 	uint8_t Isr;
uint8_t          4698 drivers/scsi/ips.c 	uint8_t Cbsp;
uint8_t          4699 drivers/scsi/ips.c 	uint8_t PostByte[IPS_MAX_POST_BYTES];
uint8_t          4700 drivers/scsi/ips.c 	uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
uint8_t          4791 drivers/scsi/ips.c 	uint8_t Isr = 0;
uint8_t          4792 drivers/scsi/ips.c 	uint8_t Cbsp;
uint8_t          4793 drivers/scsi/ips.c 	uint8_t PostByte[IPS_MAX_POST_BYTES];
uint8_t          4794 drivers/scsi/ips.c 	uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
uint8_t          5094 drivers/scsi/ips.c 	uint8_t junk;
uint8_t          5445 drivers/scsi/ips.c 	uint8_t Isr;
uint8_t          5478 drivers/scsi/ips.c 	uint8_t Isr;
uint8_t          6016 drivers/scsi/ips.c 	uint8_t status = 0;
uint8_t          6128 drivers/scsi/ips.c 	uint8_t status;
uint8_t          6242 drivers/scsi/ips.c 	uint8_t status = 0;
uint8_t          6333 drivers/scsi/ips.c 	uint8_t status = 0;
uint8_t          6422 drivers/scsi/ips.c 	uint8_t checksum;
uint8_t          6448 drivers/scsi/ips.c 		checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
uint8_t          6471 drivers/scsi/ips.c 	uint8_t checksum;
uint8_t          6498 drivers/scsi/ips.c 		    (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
uint8_t          6838 drivers/scsi/ips.c 	uint8_t bus;
uint8_t          6839 drivers/scsi/ips.c 	uint8_t func;
uint8_t           409 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           410 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           411 drivers/scsi/ips.h    uint8_t  log_drv;
uint8_t           412 drivers/scsi/ips.h    uint8_t  sg_count;
uint8_t           416 drivers/scsi/ips.h    uint8_t  segment_4G;
uint8_t           417 drivers/scsi/ips.h    uint8_t  enhanced_sg;
uint8_t           423 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           424 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           434 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           435 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           436 drivers/scsi/ips.h    uint8_t  reserved;
uint8_t           437 drivers/scsi/ips.h    uint8_t  reserved2;
uint8_t           444 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           445 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           446 drivers/scsi/ips.h    uint8_t  channel;
uint8_t           447 drivers/scsi/ips.h    uint8_t  reserved3;
uint8_t           448 drivers/scsi/ips.h    uint8_t  reserved4;
uint8_t           449 drivers/scsi/ips.h    uint8_t  reserved5;
uint8_t           450 drivers/scsi/ips.h    uint8_t  reserved6;
uint8_t           451 drivers/scsi/ips.h    uint8_t  reserved7;
uint8_t           452 drivers/scsi/ips.h    uint8_t  reserved8;
uint8_t           453 drivers/scsi/ips.h    uint8_t  reserved9;
uint8_t           454 drivers/scsi/ips.h    uint8_t  reserved10;
uint8_t           455 drivers/scsi/ips.h    uint8_t  reserved11;
uint8_t           456 drivers/scsi/ips.h    uint8_t  reserved12;
uint8_t           457 drivers/scsi/ips.h    uint8_t  reserved13;
uint8_t           458 drivers/scsi/ips.h    uint8_t  reserved14;
uint8_t           459 drivers/scsi/ips.h    uint8_t  adapter_flag;
uint8_t           463 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           464 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           469 drivers/scsi/ips.h    uint8_t  segment_4G;
uint8_t           470 drivers/scsi/ips.h    uint8_t  enhanced_sg;
uint8_t           476 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           477 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           478 drivers/scsi/ips.h    uint8_t  channel;
uint8_t           479 drivers/scsi/ips.h    uint8_t  source_target;
uint8_t           488 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           489 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           490 drivers/scsi/ips.h    uint8_t  log_drv;
uint8_t           491 drivers/scsi/ips.h    uint8_t  control;
uint8_t           500 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           501 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           502 drivers/scsi/ips.h    uint8_t  reserved;
uint8_t           503 drivers/scsi/ips.h    uint8_t  state;
uint8_t           512 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           513 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           514 drivers/scsi/ips.h    uint8_t  reserved;
uint8_t           515 drivers/scsi/ips.h    uint8_t  desc;
uint8_t           524 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           525 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           526 drivers/scsi/ips.h    uint8_t  page;
uint8_t           527 drivers/scsi/ips.h    uint8_t  write;
uint8_t           537 drivers/scsi/ips.h     uint8_t  op_code;
uint8_t           538 drivers/scsi/ips.h     uint8_t  command_id;
uint8_t           546 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           547 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           548 drivers/scsi/ips.h    uint8_t  reset_count;
uint8_t           549 drivers/scsi/ips.h    uint8_t  reset_type;
uint8_t           550 drivers/scsi/ips.h    uint8_t  second;
uint8_t           551 drivers/scsi/ips.h    uint8_t  minute;
uint8_t           552 drivers/scsi/ips.h    uint8_t  hour;
uint8_t           553 drivers/scsi/ips.h    uint8_t  day;
uint8_t           554 drivers/scsi/ips.h    uint8_t  reserved1[4];
uint8_t           555 drivers/scsi/ips.h    uint8_t  month;
uint8_t           556 drivers/scsi/ips.h    uint8_t  yearH;
uint8_t           557 drivers/scsi/ips.h    uint8_t  yearL;
uint8_t           558 drivers/scsi/ips.h    uint8_t  reserved2;
uint8_t           562 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           563 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           564 drivers/scsi/ips.h    uint8_t  type;
uint8_t           565 drivers/scsi/ips.h    uint8_t  direction;
uint8_t           568 drivers/scsi/ips.h    uint8_t  total_packets;
uint8_t           569 drivers/scsi/ips.h    uint8_t  packet_num;
uint8_t           574 drivers/scsi/ips.h    uint8_t  op_code;
uint8_t           575 drivers/scsi/ips.h    uint8_t  command_id;
uint8_t           576 drivers/scsi/ips.h    uint8_t  type;
uint8_t           577 drivers/scsi/ips.h    uint8_t  direction;
uint8_t           601 drivers/scsi/ips.h    uint8_t  logical_id;
uint8_t           602 drivers/scsi/ips.h    uint8_t  reserved;
uint8_t           603 drivers/scsi/ips.h    uint8_t  raid_level;
uint8_t           604 drivers/scsi/ips.h    uint8_t  state;
uint8_t           609 drivers/scsi/ips.h    uint8_t       no_of_log_drive;
uint8_t           610 drivers/scsi/ips.h    uint8_t       reserved[3];
uint8_t           615 drivers/scsi/ips.h    uint8_t   device_address;
uint8_t           616 drivers/scsi/ips.h    uint8_t   cmd_attribute;
uint8_t           619 drivers/scsi/ips.h    uint8_t   cdb_length;
uint8_t           620 drivers/scsi/ips.h    uint8_t   sense_length;
uint8_t           621 drivers/scsi/ips.h    uint8_t   sg_count;
uint8_t           622 drivers/scsi/ips.h    uint8_t   reserved;
uint8_t           623 drivers/scsi/ips.h    uint8_t   scsi_cdb[12];
uint8_t           624 drivers/scsi/ips.h    uint8_t   sense_info[64];
uint8_t           625 drivers/scsi/ips.h    uint8_t   scsi_status;
uint8_t           626 drivers/scsi/ips.h    uint8_t   reserved2[3];
uint8_t           630 drivers/scsi/ips.h    uint8_t   device_address;
uint8_t           631 drivers/scsi/ips.h    uint8_t   cmd_attribute;
uint8_t           632 drivers/scsi/ips.h    uint8_t   cdb_length;
uint8_t           633 drivers/scsi/ips.h    uint8_t   reserved_for_LUN;
uint8_t           637 drivers/scsi/ips.h    uint8_t   sense_length;
uint8_t           638 drivers/scsi/ips.h    uint8_t   scsi_status;
uint8_t           640 drivers/scsi/ips.h    uint8_t   scsi_cdb[16];
uint8_t           641 drivers/scsi/ips.h    uint8_t   sense_info[56];
uint8_t           646 drivers/scsi/ips.h       volatile uint8_t  reserved;
uint8_t           647 drivers/scsi/ips.h       volatile uint8_t  command_id;
uint8_t           648 drivers/scsi/ips.h       volatile uint8_t  basic_status;
uint8_t           649 drivers/scsi/ips.h       volatile uint8_t  extended_status;
uint8_t           665 drivers/scsi/ips.h    uint8_t  ucLogDriveCount;
uint8_t           666 drivers/scsi/ips.h    uint8_t  ucMiscFlag;
uint8_t           667 drivers/scsi/ips.h    uint8_t  ucSLTFlag;
uint8_t           668 drivers/scsi/ips.h    uint8_t  ucBSTFlag;
uint8_t           669 drivers/scsi/ips.h    uint8_t  ucPwrChgCnt;
uint8_t           670 drivers/scsi/ips.h    uint8_t  ucWrongAdrCnt;
uint8_t           671 drivers/scsi/ips.h    uint8_t  ucUnidentCnt;
uint8_t           672 drivers/scsi/ips.h    uint8_t  ucNVramDevChgCnt;
uint8_t           673 drivers/scsi/ips.h    uint8_t  CodeBlkVersion[8];
uint8_t           674 drivers/scsi/ips.h    uint8_t  BootBlkVersion[8];
uint8_t           676 drivers/scsi/ips.h    uint8_t  ucConcurrentCmdCount;
uint8_t           677 drivers/scsi/ips.h    uint8_t  ucMaxPhysicalDevices;
uint8_t           679 drivers/scsi/ips.h    uint8_t  ucDefunctDiskCount;
uint8_t           680 drivers/scsi/ips.h    uint8_t  ucRebuildFlag;
uint8_t           681 drivers/scsi/ips.h    uint8_t  ucOfflineLogDrvCount;
uint8_t           682 drivers/scsi/ips.h    uint8_t  ucCriticalDrvCount;
uint8_t           684 drivers/scsi/ips.h    uint8_t  ucBlkFlag;
uint8_t           685 drivers/scsi/ips.h    uint8_t  reserved;
uint8_t           690 drivers/scsi/ips.h    uint8_t  ucInitiator;
uint8_t           691 drivers/scsi/ips.h    uint8_t  ucParameters;
uint8_t           692 drivers/scsi/ips.h    uint8_t  ucMiscFlag;
uint8_t           693 drivers/scsi/ips.h    uint8_t  ucState;
uint8_t           695 drivers/scsi/ips.h    uint8_t  ucDeviceId[28];
uint8_t           699 drivers/scsi/ips.h    uint8_t  ucChn;
uint8_t           700 drivers/scsi/ips.h    uint8_t  ucTgt;
uint8_t           708 drivers/scsi/ips.h    uint8_t  ucState;
uint8_t           709 drivers/scsi/ips.h    uint8_t  ucRaidCacheParam;
uint8_t           710 drivers/scsi/ips.h    uint8_t  ucNoOfChunkUnits;
uint8_t           711 drivers/scsi/ips.h    uint8_t  ucStripeSize;
uint8_t           712 drivers/scsi/ips.h    uint8_t  ucParams;
uint8_t           713 drivers/scsi/ips.h    uint8_t  ucReserved;
uint8_t           719 drivers/scsi/ips.h    uint8_t  board_disc[8];
uint8_t           720 drivers/scsi/ips.h    uint8_t  processor[8];
uint8_t           721 drivers/scsi/ips.h    uint8_t  ucNoChanType;
uint8_t           722 drivers/scsi/ips.h    uint8_t  ucNoHostIntType;
uint8_t           723 drivers/scsi/ips.h    uint8_t  ucCompression;
uint8_t           724 drivers/scsi/ips.h    uint8_t  ucNvramType;
uint8_t           729 drivers/scsi/ips.h    uint8_t        ucLogDriveCount;
uint8_t           730 drivers/scsi/ips.h    uint8_t        ucDateD;
uint8_t           731 drivers/scsi/ips.h    uint8_t        ucDateM;
uint8_t           732 drivers/scsi/ips.h    uint8_t        ucDateY;
uint8_t           733 drivers/scsi/ips.h    uint8_t        init_id[4];
uint8_t           734 drivers/scsi/ips.h    uint8_t        host_id[12];
uint8_t           735 drivers/scsi/ips.h    uint8_t        time_sign[8];
uint8_t           738 drivers/scsi/ips.h    uint8_t        ucRebuildRate;
uint8_t           739 drivers/scsi/ips.h    uint8_t        ucReserve;
uint8_t           743 drivers/scsi/ips.h    uint8_t        reserved[512];
uint8_t           748 drivers/scsi/ips.h    uint8_t   reserved1;
uint8_t           749 drivers/scsi/ips.h    uint8_t   adapter_slot;
uint8_t           751 drivers/scsi/ips.h    uint8_t   ctrl_bios[8];
uint8_t           752 drivers/scsi/ips.h    uint8_t   versioning;                   /* 1 = Versioning Supported, else 0 */
uint8_t           753 drivers/scsi/ips.h    uint8_t   version_mismatch;             /* 1 = Versioning MisMatch,  else 0 */
uint8_t           754 drivers/scsi/ips.h    uint8_t   reserved2;
uint8_t           755 drivers/scsi/ips.h    uint8_t   operating_system;
uint8_t           756 drivers/scsi/ips.h    uint8_t   driver_high[4];
uint8_t           757 drivers/scsi/ips.h    uint8_t   driver_low[4];
uint8_t           758 drivers/scsi/ips.h    uint8_t   BiosCompatibilityID[8];
uint8_t           759 drivers/scsi/ips.h    uint8_t   ReservedForOS2[8];
uint8_t           760 drivers/scsi/ips.h    uint8_t   bios_high[4];                 /* Adapter's Flashed BIOS Version   */
uint8_t           761 drivers/scsi/ips.h    uint8_t   bios_low[4];
uint8_t           762 drivers/scsi/ips.h    uint8_t   adapter_order[16];            /* BIOS Telling us the Sort Order   */
uint8_t           763 drivers/scsi/ips.h    uint8_t   Filler[60];
uint8_t           776 drivers/scsi/ips.h    uint8_t   bootBlkVersion[32];
uint8_t           777 drivers/scsi/ips.h    uint8_t   bootBlkAttributes[4];
uint8_t           778 drivers/scsi/ips.h    uint8_t   codeBlkVersion[32];
uint8_t           779 drivers/scsi/ips.h    uint8_t   biosVersion[32];
uint8_t           780 drivers/scsi/ips.h    uint8_t   biosAttributes[4];
uint8_t           781 drivers/scsi/ips.h    uint8_t   compatibilityId[32];
uint8_t           782 drivers/scsi/ips.h    uint8_t   reserved[4];
uint8_t           798 drivers/scsi/ips.h    uint8_t   DeviceType;
uint8_t           799 drivers/scsi/ips.h    uint8_t   DeviceTypeQualifier;
uint8_t           800 drivers/scsi/ips.h    uint8_t   Version;
uint8_t           801 drivers/scsi/ips.h    uint8_t   ResponseDataFormat;
uint8_t           802 drivers/scsi/ips.h    uint8_t   AdditionalLength;
uint8_t           803 drivers/scsi/ips.h    uint8_t   Reserved;
uint8_t           804 drivers/scsi/ips.h    uint8_t   Flags[2];
uint8_t           805 drivers/scsi/ips.h    uint8_t   VendorId[8];
uint8_t           806 drivers/scsi/ips.h    uint8_t   ProductId[16];
uint8_t           807 drivers/scsi/ips.h    uint8_t   ProductRevisionLevel[4];
uint8_t           808 drivers/scsi/ips.h    uint8_t   Reserved2;                                  /* Provides NULL terminator to name */
uint8_t           823 drivers/scsi/ips.h    uint8_t  ResponseCode;
uint8_t           824 drivers/scsi/ips.h    uint8_t  SegmentNumber;
uint8_t           825 drivers/scsi/ips.h    uint8_t  Flags;
uint8_t           826 drivers/scsi/ips.h    uint8_t  Information[4];
uint8_t           827 drivers/scsi/ips.h    uint8_t  AdditionalLength;
uint8_t           828 drivers/scsi/ips.h    uint8_t  CommandSpecific[4];
uint8_t           829 drivers/scsi/ips.h    uint8_t  AdditionalSenseCode;
uint8_t           830 drivers/scsi/ips.h    uint8_t  AdditionalSenseCodeQual;
uint8_t           831 drivers/scsi/ips.h    uint8_t  FRUCode;
uint8_t           832 drivers/scsi/ips.h    uint8_t  SenseKeySpecific[3];
uint8_t           839 drivers/scsi/ips.h    uint8_t  PageCode;
uint8_t           840 drivers/scsi/ips.h    uint8_t  PageLength;
uint8_t           850 drivers/scsi/ips.h    uint8_t  flags;
uint8_t           851 drivers/scsi/ips.h    uint8_t  reserved[3];
uint8_t           858 drivers/scsi/ips.h    uint8_t  PageCode;
uint8_t           859 drivers/scsi/ips.h    uint8_t  PageLength;
uint8_t           861 drivers/scsi/ips.h    uint8_t  CylindersLow;
uint8_t           862 drivers/scsi/ips.h    uint8_t  Heads;
uint8_t           864 drivers/scsi/ips.h    uint8_t  WritePrecompLow;
uint8_t           866 drivers/scsi/ips.h    uint8_t  ReducedWriteCurrentLow;
uint8_t           869 drivers/scsi/ips.h    uint8_t  LandingZoneLow;
uint8_t           870 drivers/scsi/ips.h    uint8_t  flags;
uint8_t           871 drivers/scsi/ips.h    uint8_t  RotationalOffset;
uint8_t           872 drivers/scsi/ips.h    uint8_t  Reserved;
uint8_t           874 drivers/scsi/ips.h    uint8_t  Reserved2[2];
uint8_t           881 drivers/scsi/ips.h    uint8_t  PageCode;
uint8_t           882 drivers/scsi/ips.h    uint8_t  PageLength;
uint8_t           883 drivers/scsi/ips.h    uint8_t  flags;
uint8_t           884 drivers/scsi/ips.h    uint8_t  RetentPrio;
uint8_t           896 drivers/scsi/ips.h    uint8_t  DensityCode;
uint8_t           898 drivers/scsi/ips.h    uint8_t  BlockLengthLow;
uint8_t           905 drivers/scsi/ips.h    uint8_t  DataLength;
uint8_t           906 drivers/scsi/ips.h    uint8_t  MediumType;
uint8_t           907 drivers/scsi/ips.h    uint8_t  Reserved;
uint8_t           908 drivers/scsi/ips.h    uint8_t  BlockDescLength;
uint8_t           955 drivers/scsi/ips.h    uint8_t  padding[12 - sizeof(void *)];
uint8_t          1006 drivers/scsi/ips.h    uint8_t            ha_id[IPS_MAX_CHANNELS+1];
uint8_t          1009 drivers/scsi/ips.h    uint8_t            ntargets;           /* Number of targets          */
uint8_t          1010 drivers/scsi/ips.h    uint8_t            nbus;               /* Number of buses            */
uint8_t          1011 drivers/scsi/ips.h    uint8_t            nlun;               /* Number of Luns             */
uint8_t          1035 drivers/scsi/ips.h    uint8_t            waitflag;           /* are we waiting for cmd     */
uint8_t          1036 drivers/scsi/ips.h    uint8_t            active;
uint8_t          1040 drivers/scsi/ips.h    uint8_t            slot_num;           /* PCI Slot Number            */
uint8_t          1043 drivers/scsi/ips.h    uint8_t            bios_version[8];    /* BIOS Revision              */
uint8_t          1056 drivers/scsi/ips.h    uint8_t            requires_esl;       /* Requires an EraseStripeLock */
uint8_t          1067 drivers/scsi/ips.h    uint8_t           target_id;
uint8_t          1068 drivers/scsi/ips.h    uint8_t           bus;
uint8_t          1069 drivers/scsi/ips.h    uint8_t           lun;
uint8_t          1070 drivers/scsi/ips.h    uint8_t           cdb[12];
uint8_t          1074 drivers/scsi/ips.h    uint8_t           basic_status;
uint8_t          1075 drivers/scsi/ips.h    uint8_t           extended_status;
uint8_t          1076 drivers/scsi/ips.h    uint8_t           breakup;
uint8_t          1077 drivers/scsi/ips.h    uint8_t           sg_break;
uint8_t          1094 drivers/scsi/ips.h    uint8_t           target_id;
uint8_t          1095 drivers/scsi/ips.h    uint8_t           bus;
uint8_t          1096 drivers/scsi/ips.h    uint8_t           lun;
uint8_t          1097 drivers/scsi/ips.h    uint8_t           cdb[12];
uint8_t          1101 drivers/scsi/ips.h    uint8_t           basic_status;
uint8_t          1102 drivers/scsi/ips.h    uint8_t           extended_status;
uint8_t          1118 drivers/scsi/ips.h    uint8_t       CoppID[4];
uint8_t          1121 drivers/scsi/ips.h    uint8_t      *CmdBuffer;
uint8_t          1125 drivers/scsi/ips.h    uint8_t       BasicStatus;
uint8_t          1126 drivers/scsi/ips.h    uint8_t       ExtendedStatus;
uint8_t          1127 drivers/scsi/ips.h    uint8_t       AdapterType;
uint8_t          1128 drivers/scsi/ips.h    uint8_t       reserved;
uint8_t           212 drivers/scsi/isci/probe_roms.h 	uint8_t signature[ISCI_ROM_SIG_SIZE];
uint8_t           214 drivers/scsi/isci/probe_roms.h 	uint8_t hdr_length;
uint8_t           215 drivers/scsi/isci/probe_roms.h 	uint8_t version;
uint8_t           216 drivers/scsi/isci/probe_roms.h 	uint8_t preboot_source;
uint8_t           217 drivers/scsi/isci/probe_roms.h 	uint8_t num_elements;
uint8_t           219 drivers/scsi/isci/probe_roms.h 	uint8_t reserved[8];
uint8_t           224 drivers/scsi/isci/probe_roms.h 		uint8_t mode_type;
uint8_t           225 drivers/scsi/isci/probe_roms.h 		uint8_t max_concurr_spin_up;
uint8_t           242 drivers/scsi/isci/probe_roms.h 				uint8_t ssc_sata_tx_spread_level:4;
uint8_t           258 drivers/scsi/isci/probe_roms.h 				uint8_t ssc_sas_tx_spread_level:3;
uint8_t           268 drivers/scsi/isci/probe_roms.h 				uint8_t ssc_sas_tx_type:1;
uint8_t           270 drivers/scsi/isci/probe_roms.h 			uint8_t do_enable_ssc;
uint8_t           305 drivers/scsi/isci/probe_roms.h 		uint8_t cable_selection_mask;
uint8_t           309 drivers/scsi/isci/probe_roms.h 		uint8_t phy_mask;
uint8_t           534 drivers/scsi/iscsi_tcp.c static int iscsi_sw_tcp_pdu_alloc(struct iscsi_task *task, uint8_t opcode)
uint8_t           616 drivers/scsi/libiscsi.c 	uint8_t opcode = hdr->opcode & ISCSI_OPCODE_MASK;
uint8_t           662 drivers/scsi/libiscsi.c 	uint8_t opcode = hdr->opcode & ISCSI_OPCODE_MASK;
uint8_t           196 drivers/scsi/lpfc/lpfc.h 		uint8_t fcphHigh;
uint8_t           197 drivers/scsi/lpfc/lpfc.h 		uint8_t fcphLow;
uint8_t           198 drivers/scsi/lpfc/lpfc.h 		uint8_t feaLevelHigh;
uint8_t           199 drivers/scsi/lpfc/lpfc.h 		uint8_t feaLevelLow;
uint8_t           202 drivers/scsi/lpfc/lpfc.h 		uint8_t opFwName[16];
uint8_t           204 drivers/scsi/lpfc/lpfc.h 		uint8_t sli1FwName[16];
uint8_t           206 drivers/scsi/lpfc/lpfc.h 		uint8_t sli2FwName[16];
uint8_t           340 drivers/scsi/lpfc/lpfc.h 	uint8_t fault;
uint8_t           353 drivers/scsi/lpfc/lpfc.h 	uint8_t port_type;
uint8_t           361 drivers/scsi/lpfc/lpfc.h 	uint8_t vpi_state;
uint8_t           418 drivers/scsi/lpfc/lpfc.h 	uint8_t fc_linkspeed;	/* Link speed after last READ_LA */
uint8_t           433 drivers/scsi/lpfc/lpfc.h 	uint8_t fc_ns_retry;	/* retries for fabric nameserver */
uint8_t           454 drivers/scsi/lpfc/lpfc.h 	uint8_t load_flag;
uint8_t           490 drivers/scsi/lpfc/lpfc.h 	uint8_t stat_data_enabled;
uint8_t           491 drivers/scsi/lpfc/lpfc.h 	uint8_t stat_data_blocked;
uint8_t           505 drivers/scsi/lpfc/lpfc.h 	uint8_t  nvmei_support; /* driver supports NVME Initiator */
uint8_t           609 drivers/scsi/lpfc/lpfc.h 	uint8_t *fwlog_buff;
uint8_t           697 drivers/scsi/lpfc/lpfc.h 	uint8_t pci_dev_grp;	/* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
uint8_t           761 drivers/scsi/lpfc/lpfc.h 	uint8_t fc_linkspeed;	/* Link speed after last READ_LA */
uint8_t           768 drivers/scsi/lpfc/lpfc.h 	uint8_t  fc_pref_ALPA;	/* preferred AL_PA */
uint8_t           778 drivers/scsi/lpfc/lpfc.h 	uint8_t alpa_map[128];	/* AL_PA map from READ_LA */
uint8_t           790 drivers/scsi/lpfc/lpfc.h 	uint8_t  wwnn[8];
uint8_t           791 drivers/scsi/lpfc/lpfc.h 	uint8_t  wwpn[8];
uint8_t           793 drivers/scsi/lpfc/lpfc.h 	uint8_t  fcp_embed_io;
uint8_t           794 drivers/scsi/lpfc/lpfc.h 	uint8_t  nvme_support;	/* Firmware supports NVME */
uint8_t           795 drivers/scsi/lpfc/lpfc.h 	uint8_t  nvmet_support;	/* driver supports NVMET */
uint8_t           797 drivers/scsi/lpfc/lpfc.h 	uint8_t  mds_diags_support;
uint8_t           798 drivers/scsi/lpfc/lpfc.h 	uint8_t  bbcredit_support;
uint8_t           799 drivers/scsi/lpfc/lpfc.h 	uint8_t  enab_exp_wqcq_pages;
uint8_t           854 drivers/scsi/lpfc/lpfc.h 	uint8_t cfg_oas_tgt_wwpn[8];
uint8_t           855 drivers/scsi/lpfc/lpfc.h 	uint8_t cfg_oas_vpt_wwpn[8];
uint8_t           958 drivers/scsi/lpfc/lpfc.h 	uint8_t vpd_flag;               /* VPD data flag */
uint8_t           966 drivers/scsi/lpfc/lpfc.h 	uint8_t soft_wwn_enable;
uint8_t          1088 drivers/scsi/lpfc/lpfc.h 	uint8_t lpfc_idiag_last_eq;
uint8_t          1097 drivers/scsi/lpfc/lpfc.h 	uint8_t temp_sensor_support;
uint8_t          1102 drivers/scsi/lpfc/lpfc.h 	uint8_t hb_outstanding;
uint8_t          1119 drivers/scsi/lpfc/lpfc.h 	uint8_t  bucket_type;
uint8_t          1131 drivers/scsi/lpfc/lpfc.h 	uint8_t fc_map[3];
uint8_t          1132 drivers/scsi/lpfc/lpfc.h 	uint8_t valid_vlan;
uint8_t          1148 drivers/scsi/lpfc/lpfc.h 	uint8_t menlo_flag;	/* menlo generic flags */
uint8_t          1153 drivers/scsi/lpfc/lpfc.h 	uint8_t fips_spec_rev;
uint8_t          1154 drivers/scsi/lpfc/lpfc.h 	uint8_t fips_level;
uint8_t           808 drivers/scsi/lpfc/lpfc_attr.c 	uint8_t sli_family;
uint8_t          2777 drivers/scsi/lpfc/lpfc_attr.c 	uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
uint8_t          3022 drivers/scsi/lpfc/lpfc_attr.c 	uint8_t wwpn[WWN_SZ];
uint8_t          3036 drivers/scsi/lpfc/lpfc_attr.c 	memcpy(phba->cfg_oas_tgt_wwpn, wwpn, (8 * sizeof(uint8_t)));
uint8_t          3037 drivers/scsi/lpfc/lpfc_attr.c 	memcpy(phba->sli4_hba.oas_next_tgt_wwpn, wwpn, (8 * sizeof(uint8_t)));
uint8_t          3104 drivers/scsi/lpfc/lpfc_attr.c 		phba->cfg_oas_priority = (uint8_t)val;
uint8_t          3153 drivers/scsi/lpfc/lpfc_attr.c 	uint8_t wwpn[WWN_SZ];
uint8_t          3167 drivers/scsi/lpfc/lpfc_attr.c 	memcpy(phba->cfg_oas_vpt_wwpn, wwpn, (8 * sizeof(uint8_t)));
uint8_t          3168 drivers/scsi/lpfc/lpfc_attr.c 	memcpy(phba->sli4_hba.oas_next_vpt_wwpn, wwpn, (8 * sizeof(uint8_t)));
uint8_t          3284 drivers/scsi/lpfc/lpfc_attr.c lpfc_oas_lun_state_set(struct lpfc_hba *phba, uint8_t vpt_wwpn[],
uint8_t          3285 drivers/scsi/lpfc/lpfc_attr.c 		       uint8_t tgt_wwpn[], uint64_t lun,
uint8_t          3286 drivers/scsi/lpfc/lpfc_attr.c 		       uint32_t oas_state, uint8_t pri)
uint8_t          3324 drivers/scsi/lpfc/lpfc_attr.c lpfc_oas_lun_get_next(struct lpfc_hba *phba, uint8_t vpt_wwpn[],
uint8_t          3325 drivers/scsi/lpfc/lpfc_attr.c 		      uint8_t tgt_wwpn[], uint32_t *lun_status,
uint8_t          3362 drivers/scsi/lpfc/lpfc_attr.c lpfc_oas_lun_state_change(struct lpfc_hba *phba, uint8_t vpt_wwpn[],
uint8_t          3363 drivers/scsi/lpfc/lpfc_attr.c 			  uint8_t tgt_wwpn[], uint64_t lun,
uint8_t          3364 drivers/scsi/lpfc/lpfc_attr.c 			  uint32_t oas_state, uint8_t pri)
uint8_t          7137 drivers/scsi/lpfc/lpfc_attr.c 	memset(phba->cfg_oas_tgt_wwpn, 0, (8 * sizeof(uint8_t)));
uint8_t          7138 drivers/scsi/lpfc/lpfc_attr.c 	memset(phba->cfg_oas_vpt_wwpn, 0, (8 * sizeof(uint8_t)));
uint8_t            85 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *ext; /* extended mailbox data */
uint8_t           587 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *rjt_data;
uint8_t           631 drivers/scsi/lpfc/lpfc_bsg.c 			rjt_data = (uint8_t *)&rsp->un.ulpWord[4];
uint8_t          2555 drivers/scsi/lpfc/lpfc_bsg.c 				(uint8_t *)&phba->pport->fc_sparam,
uint8_t          2565 drivers/scsi/lpfc/lpfc_bsg.c 				(uint8_t *)&phba->pport->fc_sparam,
uint8_t          2920 drivers/scsi/lpfc/lpfc_bsg.c 			memset((uint8_t *)dmp->dma.virt, 0, cnt);
uint8_t          3121 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *ptr = NULL, *rx_databuf = NULL;
uint8_t          3461 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *pmb, *pmb_buf;
uint8_t          3469 drivers/scsi/lpfc/lpfc_bsg.c 	pmb = (uint8_t *)&pmboxq->u.mb;
uint8_t          3470 drivers/scsi/lpfc/lpfc_bsg.c 	pmb_buf = (uint8_t *)dd_data->context_un.mbox.mb;
uint8_t          3640 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *pmb, *pmb_buf;
uint8_t          3646 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *pmbx;
uint8_t          3665 drivers/scsi/lpfc/lpfc_bsg.c 	pmb = (uint8_t *)&pmboxq->u.mb;
uint8_t          3666 drivers/scsi/lpfc/lpfc_bsg.c 	pmb_buf = (uint8_t *)dd_data->context_un.mbox.mb;
uint8_t          3674 drivers/scsi/lpfc/lpfc_bsg.c 		pmbx = (uint8_t *)dmabuf->virt;
uint8_t          3914 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *pmbx;
uint8_t          4018 drivers/scsi/lpfc/lpfc_bsg.c 	pmbx = (uint8_t *)dmabuf->virt;
uint8_t          4101 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *mbx;
uint8_t          4197 drivers/scsi/lpfc/lpfc_bsg.c 		mbx = (uint8_t *)dmabuf->virt;
uint8_t          4410 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *pbuf;
uint8_t          4444 drivers/scsi/lpfc/lpfc_bsg.c 	pbuf = (uint8_t *)dmabuf->virt;
uint8_t          4483 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *pbuf;
uint8_t          4492 drivers/scsi/lpfc/lpfc_bsg.c 	pbuf = (uint8_t *)dmabuf->virt;
uint8_t          4542 drivers/scsi/lpfc/lpfc_bsg.c 		pbuf = (uint8_t *)phba->mbox_ext_buf_ctx.mbx_dmabuf->virt;
uint8_t          4732 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *pmbx = NULL;
uint8_t          4741 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *ext = NULL;
uint8_t          4743 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t *from;
uint8_t          4782 drivers/scsi/lpfc/lpfc_bsg.c 	pmbx = (uint8_t *)dmabuf->virt;
uint8_t          5476 drivers/scsi/lpfc/lpfc_bsg.c 	uint8_t action = 0, log_level = 0;
uint8_t           303 drivers/scsi/lpfc/lpfc_bsg.h 	uint8_t supported;
uint8_t           323 drivers/scsi/lpfc/lpfc_bsg.h 	uint8_t action;
uint8_t           326 drivers/scsi/lpfc/lpfc_bsg.h 	uint8_t log_level;
uint8_t           330 drivers/scsi/lpfc/lpfc_bsg.h 	uint8_t state;
uint8_t           333 drivers/scsi/lpfc/lpfc_bsg.h 	uint8_t log_level;
uint8_t            46 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_reg_rpi(struct lpfc_hba *, uint16_t, uint32_t, uint8_t *,
uint8_t           138 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_issue_els_plogi(struct lpfc_vport *, uint32_t, uint8_t);
uint8_t           139 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_issue_els_prli(struct lpfc_vport *, struct lpfc_nodelist *, uint8_t);
uint8_t           140 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_issue_els_adisc(struct lpfc_vport *, struct lpfc_nodelist *, uint8_t);
uint8_t           141 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_issue_els_logo(struct lpfc_vport *, struct lpfc_nodelist *, uint8_t);
uint8_t           143 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_issue_els_scr(struct lpfc_vport *, uint32_t, uint8_t);
uint8_t           144 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_issue_els_rscn(struct lpfc_vport *vport, uint8_t retry);
uint8_t           170 drivers/scsi/lpfc/lpfc_crtn.h struct lpfc_iocbq *lpfc_prep_els_iocb(struct lpfc_vport *, uint8_t, uint16_t,
uint8_t           171 drivers/scsi/lpfc/lpfc_crtn.h 				      uint8_t, struct lpfc_nodelist *,
uint8_t           181 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_ns_cmd(struct lpfc_vport *, int, uint8_t, uint32_t);
uint8_t           219 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_sli4_poll_eq(struct lpfc_queue *q, uint8_t path);
uint8_t           244 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_check_pending_fcoe_event(struct lpfc_hba *, uint8_t);
uint8_t           393 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_init_api_table_setup(struct lpfc_hba *, uint8_t);
uint8_t           394 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_sli_api_table_setup(struct lpfc_hba *, uint8_t);
uint8_t           395 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_scsi_api_table_setup(struct lpfc_hba *, uint8_t);
uint8_t           396 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_mbox_api_table_setup(struct lpfc_hba *, uint8_t);
uint8_t           397 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_api_table_setup(struct lpfc_hba *, uint8_t);
uint8_t           461 drivers/scsi/lpfc/lpfc_crtn.h void lpfc_parse_fcoe_conf(struct lpfc_hba *, uint8_t *, uint32_t);
uint8_t           462 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
uint8_t           524 drivers/scsi/lpfc/lpfc_crtn.h int lpfc_sli4_request_firmware_update(struct lpfc_hba *, uint8_t);
uint8_t           537 drivers/scsi/lpfc/lpfc_crtn.h 			 struct lpfc_name *, uint64_t, uint8_t);
uint8_t           539 drivers/scsi/lpfc/lpfc_crtn.h 			  struct lpfc_name *, uint64_t, uint8_t);
uint8_t           572 drivers/scsi/lpfc/lpfc_crtn.h 				uint8_t cqflag);
uint8_t           321 drivers/scsi/lpfc/lpfc_ct.c 	     uint32_t tmo, uint8_t retry)
uint8_t           344 drivers/scsi/lpfc/lpfc_ct.c 		geniocb->context3 = (uint8_t *) bmp;
uint8_t           347 drivers/scsi/lpfc/lpfc_ct.c 	geniocb->context1 = (uint8_t *) inp;
uint8_t           348 drivers/scsi/lpfc/lpfc_ct.c 	geniocb->context2 = (uint8_t *) outp;
uint8_t           413 drivers/scsi/lpfc/lpfc_ct.c 	    uint32_t rsp_size, uint8_t retry)
uint8_t           460 drivers/scsi/lpfc/lpfc_ct.c lpfc_prep_node_fc4type(struct lpfc_vport *vport, uint32_t Did, uint8_t fc4_type)
uint8_t           548 drivers/scsi/lpfc/lpfc_ct.c lpfc_ns_rsp_audit_did(struct lpfc_vport *vport, uint32_t Did, uint8_t fc4_type)
uint8_t           592 drivers/scsi/lpfc/lpfc_ct.c lpfc_ns_rsp(struct lpfc_vport *vport, struct lpfc_dmabuf *mp, uint8_t fc4_type,
uint8_t          1064 drivers/scsi/lpfc/lpfc_ct.c 	uint8_t fbits;
uint8_t          1276 drivers/scsi/lpfc/lpfc_ct.c 	uint8_t retry;
uint8_t          1560 drivers/scsi/lpfc/lpfc_ct.c 	    uint8_t retry, uint32_t context)
uint8_t          2176 drivers/scsi/lpfc/lpfc_ct.c 			    (char)((uint8_t) 0x30 +
uint8_t          2177 drivers/scsi/lpfc/lpfc_ct.c 				   (uint8_t) j);
uint8_t          2180 drivers/scsi/lpfc/lpfc_ct.c 			    (char)((uint8_t) 0x61 +
uint8_t          2181 drivers/scsi/lpfc/lpfc_ct.c 				   (uint8_t) (j - 10));
uint8_t          2851 drivers/scsi/lpfc/lpfc_ct.c 	memcpy((((uint8_t *)&ae->un.AttrString) +
uint8_t          3101 drivers/scsi/lpfc/lpfc_ct.c 		ab = (struct lpfc_fdmi_attr_block *)((uint8_t *)rh + size);
uint8_t          3116 drivers/scsi/lpfc/lpfc_ct.c 					     ((uint8_t *)rh + size));
uint8_t          3141 drivers/scsi/lpfc/lpfc_ct.c 				((uint8_t *)pab +  sizeof(struct lpfc_name));
uint8_t          3144 drivers/scsi/lpfc/lpfc_ct.c 		memcpy((uint8_t *)&pab->PortName,
uint8_t          3145 drivers/scsi/lpfc/lpfc_ct.c 		       (uint8_t *)&vport->fc_sparam.portName,
uint8_t          3161 drivers/scsi/lpfc/lpfc_ct.c 					     ((uint8_t *)pab + size));
uint8_t          3185 drivers/scsi/lpfc/lpfc_ct.c 		memcpy((uint8_t *)&pe->PortName,
uint8_t          3186 drivers/scsi/lpfc/lpfc_ct.c 		       (uint8_t *)&vport->fc_sparam.portName,
uint8_t          3198 drivers/scsi/lpfc/lpfc_ct.c 		memcpy((uint8_t *)&pe->PortName,
uint8_t          3199 drivers/scsi/lpfc/lpfc_ct.c 		       (uint8_t *)&vport->fc_sparam.portName,
uint8_t          3306 drivers/scsi/lpfc/lpfc_ct.c 	uint8_t *fwname;
uint8_t          3104 drivers/scsi/lpfc/lpfc_debugfs.c 	uint8_t u8val;
uint8_t          3223 drivers/scsi/lpfc/lpfc_debugfs.c 	uint8_t u8val;
uint8_t          3250 drivers/scsi/lpfc/lpfc_debugfs.c 		} else if ((count != sizeof(uint8_t)) &&
uint8_t          3254 drivers/scsi/lpfc/lpfc_debugfs.c 		if (count == sizeof(uint8_t)) {
uint8_t          3255 drivers/scsi/lpfc/lpfc_debugfs.c 			if (where > LPFC_PCI_CFG_SIZE - sizeof(uint8_t))
uint8_t          3257 drivers/scsi/lpfc/lpfc_debugfs.c 			if (where % sizeof(uint8_t))
uint8_t          3283 drivers/scsi/lpfc/lpfc_debugfs.c 		if ((count != sizeof(uint8_t)) &&
uint8_t          3287 drivers/scsi/lpfc/lpfc_debugfs.c 		if (count == sizeof(uint8_t)) {
uint8_t          3288 drivers/scsi/lpfc/lpfc_debugfs.c 			if (where > LPFC_PCI_CFG_SIZE - sizeof(uint8_t))
uint8_t          3290 drivers/scsi/lpfc/lpfc_debugfs.c 			if (where % sizeof(uint8_t))
uint8_t          3294 drivers/scsi/lpfc/lpfc_debugfs.c 						      (uint8_t)value);
uint8_t          3298 drivers/scsi/lpfc/lpfc_debugfs.c 					u8val |= (uint8_t)value;
uint8_t          3306 drivers/scsi/lpfc/lpfc_debugfs.c 					u8val &= (uint8_t)(~value);
uint8_t          5577 drivers/scsi/lpfc/lpfc_debugfs.c 	uint8_t *pbyte;
uint8_t          5624 drivers/scsi/lpfc/lpfc_debugfs.c 		pbyte = (uint8_t *)pmbox;
uint8_t          5639 drivers/scsi/lpfc/lpfc_debugfs.c 						((uint8_t)*pbyte) & 0xff);
uint8_t           201 drivers/scsi/lpfc/lpfc_debugfs.h #define SIZE_U8  sizeof(uint8_t)
uint8_t           111 drivers/scsi/lpfc/lpfc_disc.h 	uint8_t		nlp_class_sup;		/* Supported Classes */
uint8_t           112 drivers/scsi/lpfc/lpfc_disc.h 	uint8_t         nlp_retry;		/* used for ELS retries */
uint8_t           113 drivers/scsi/lpfc/lpfc_disc.h 	uint8_t         nlp_fcp_info;	        /* class info, bits 0-3 */
uint8_t            55 drivers/scsi/lpfc/lpfc_els.c 				struct lpfc_nodelist *ndlp, uint8_t retry);
uint8_t           153 drivers/scsi/lpfc/lpfc_els.c lpfc_prep_els_iocb(struct lpfc_vport *vport, uint8_t expectRsp,
uint8_t           154 drivers/scsi/lpfc/lpfc_els.c 		   uint16_t cmdSize, uint8_t retry,
uint8_t           408 drivers/scsi/lpfc/lpfc_els.c 	rc = lpfc_reg_rpi(phba, vport->vpi, Fabric_DID, (uint8_t *)sp, mbox,
uint8_t           598 drivers/scsi/lpfc/lpfc_els.c static uint8_t
uint8_t           603 drivers/scsi/lpfc/lpfc_els.c 	uint8_t fabric_param_changed = 0;
uint8_t           664 drivers/scsi/lpfc/lpfc_els.c 	uint8_t fabric_param_changed;
uint8_t          1267 drivers/scsi/lpfc/lpfc_els.c 		     uint8_t retry)
uint8_t          1274 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          1287 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          1605 drivers/scsi/lpfc/lpfc_els.c 	uint8_t  name[sizeof(struct lpfc_name)];
uint8_t          1621 drivers/scsi/lpfc/lpfc_els.c 	sp = (struct serv_parm *) ((uint8_t *) prsp + sizeof(uint32_t));
uint8_t          2121 drivers/scsi/lpfc/lpfc_els.c lpfc_issue_els_plogi(struct lpfc_vport *vport, uint32_t did, uint8_t retry)
uint8_t          2128 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          2169 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          2337 drivers/scsi/lpfc/lpfc_els.c 		    uint8_t retry)
uint8_t          2344 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          2402 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          2741 drivers/scsi/lpfc/lpfc_els.c 		     uint8_t retry)
uint8_t          2747 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          2756 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          2945 drivers/scsi/lpfc/lpfc_els.c 		    uint8_t retry)
uint8_t          2950 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          2967 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          3065 drivers/scsi/lpfc/lpfc_els.c lpfc_issue_els_scr(struct lpfc_vport *vport, uint32_t nportid, uint8_t retry)
uint8_t          3069 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          3098 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          3152 drivers/scsi/lpfc/lpfc_els.c lpfc_issue_els_rscn(struct lpfc_vport *vport, uint8_t retry)
uint8_t          3264 drivers/scsi/lpfc/lpfc_els.c lpfc_issue_els_farpr(struct lpfc_vport *vport, uint32_t nportid, uint8_t retry)
uint8_t          3269 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          3299 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          4297 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          4310 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) cmdiocb->context2)->virt);
uint8_t          4502 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          4672 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          4686 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          4745 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          4767 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          4831 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          4878 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          4987 drivers/scsi/lpfc/lpfc_els.c lpfc_els_rsp_rnid_acc(struct lpfc_vport *vport, uint8_t format,
uint8_t          4994 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          5017 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          5073 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          5080 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) iocb->context2)->virt);
uint8_t          5119 drivers/scsi/lpfc/lpfc_els.c lpfc_els_rsp_echo_acc(struct lpfc_vport *vport, uint8_t *data,
uint8_t          5124 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          5147 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          5298 drivers/scsi/lpfc/lpfc_els.c 		uint8_t *page_a0, uint8_t *page_a2)
uint8_t          5417 drivers/scsi/lpfc/lpfc_els.c 			   struct fc_rdp_oed_sfp_desc *desc, uint8_t *page_a2)
uint8_t          5446 drivers/scsi/lpfc/lpfc_els.c 			      uint8_t *page_a2)
uint8_t          5475 drivers/scsi/lpfc/lpfc_els.c 			     uint8_t *page_a2)
uint8_t          5504 drivers/scsi/lpfc/lpfc_els.c 			      uint8_t *page_a2)
uint8_t          5534 drivers/scsi/lpfc/lpfc_els.c 			      uint8_t *page_a2)
uint8_t          5562 drivers/scsi/lpfc/lpfc_els.c 		      uint8_t *page_a0, struct lpfc_vport *vport)
uint8_t          5710 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          5742 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          5818 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          5887 drivers/scsi/lpfc/lpfc_els.c 	uint8_t rjt_err, rjt_expl = LSEXP_NOTHING_MORE;
uint8_t          5965 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          6019 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *)(((struct lpfc_dmabuf *)elsiocb->context2)->virt);
uint8_t          6047 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *)(((struct lpfc_dmabuf *)elsiocb->context2)->virt);
uint8_t          6157 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *lp;
uint8_t          6160 drivers/scsi/lpfc/lpfc_els.c 	uint8_t state, rjt_err;
uint8_t          6164 drivers/scsi/lpfc/lpfc_els.c 	lp = (uint8_t *)pcmd->virt;
uint8_t          6593 drivers/scsi/lpfc/lpfc_els.c 				memcpy(((uint8_t *)cmd) + length, lp,
uint8_t          6975 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          6977 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) cmdiocb->context2)->virt);
uint8_t          7064 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          7101 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          7151 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          7188 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          7310 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          7328 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          7393 drivers/scsi/lpfc/lpfc_els.c 	uint8_t flag;
uint8_t          7467 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          7484 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          7566 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          8325 drivers/scsi/lpfc/lpfc_els.c 	uint8_t rjt_exp, rjt_err = 0, init_link = 0;
uint8_t          9236 drivers/scsi/lpfc/lpfc_els.c 	uint8_t fabric_param_changed;
uint8_t          9369 drivers/scsi/lpfc/lpfc_els.c 		     uint8_t retry)
uint8_t          9375 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          9405 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t          9522 drivers/scsi/lpfc/lpfc_els.c 	uint8_t *pcmd;
uint8_t          9531 drivers/scsi/lpfc/lpfc_els.c 	pcmd = (uint8_t *) (((struct lpfc_dmabuf *) elsiocb->context2)->virt);
uint8_t            56 drivers/scsi/lpfc/lpfc_hbadisc.c static uint8_t lpfcAlpaArray[] = {
uint8_t           213 drivers/scsi/lpfc/lpfc_hbadisc.c 	uint8_t *name;
uint8_t           230 drivers/scsi/lpfc/lpfc_hbadisc.c 	name = (uint8_t *) &ndlp->nlp_portname;
uint8_t          1273 drivers/scsi/lpfc/lpfc_hbadisc.c lpfc_fab_name_match(uint8_t *fab_name, struct fcf_record *new_fcf_record)
uint8_t          1304 drivers/scsi/lpfc/lpfc_hbadisc.c lpfc_sw_name_match(uint8_t *sw_name, struct fcf_record *new_fcf_record)
uint8_t          1335 drivers/scsi/lpfc/lpfc_hbadisc.c lpfc_mac_addr_match(uint8_t *mac_addr, struct fcf_record *new_fcf_record)
uint8_t          1737 drivers/scsi/lpfc/lpfc_hbadisc.c lpfc_check_pending_fcoe_event(struct lpfc_hba *phba, uint8_t unreg_fcf)
uint8_t          3076 drivers/scsi/lpfc/lpfc_hbadisc.c 	memcpy((uint8_t *) &vport->fc_sparam, (uint8_t *) mp->virt,
uint8_t          3189 drivers/scsi/lpfc/lpfc_hbadisc.c 					uint8_t pamap[16];
uint8_t          3393 drivers/scsi/lpfc/lpfc_hbadisc.c 	uint8_t attn_type;
uint8_t          3737 drivers/scsi/lpfc/lpfc_hbadisc.c 	uint8_t *vport_buff;
uint8_t          3760 drivers/scsi/lpfc/lpfc_hbadisc.c 	vport_buff = (uint8_t *) vport_info;
uint8_t          3800 drivers/scsi/lpfc/lpfc_hbadisc.c 			lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
uint8_t          4728 drivers/scsi/lpfc/lpfc_hbadisc.c 			if (iocb->context1 == (uint8_t *) ndlp)
uint8_t          5226 drivers/scsi/lpfc/lpfc_hbadisc.c 			    (uint8_t *) &vport->fc_sparam, mbox, ndlp->nlp_rpi);
uint8_t          6774 drivers/scsi/lpfc/lpfc_hbadisc.c 	uint8_t *buff)
uint8_t          6857 drivers/scsi/lpfc/lpfc_hbadisc.c 			uint8_t *buff)
uint8_t          6893 drivers/scsi/lpfc/lpfc_hbadisc.c static uint8_t *
uint8_t          6894 drivers/scsi/lpfc/lpfc_hbadisc.c lpfc_get_rec_conf23(uint8_t *buff, uint32_t size, uint8_t rec_type)
uint8_t          6933 drivers/scsi/lpfc/lpfc_hbadisc.c 		uint8_t *buff,
uint8_t          6937 drivers/scsi/lpfc/lpfc_hbadisc.c 	uint8_t *rec_ptr;
uint8_t           103 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t FsType;
uint8_t           104 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t FsSubType;
uint8_t           105 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Options;
uint8_t           106 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Rsrvd1;
uint8_t           108 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Rsrvd2;
uint8_t           109 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t ReasonCode;
uint8_t           110 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Explanation;
uint8_t           111 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t VendorUnique;
uint8_t           117 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t PortType;	/* for GID_PT requests */
uint8_t           119 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t DomainScope;
uint8_t           120 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t AreaScope;
uint8_t           121 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t Fc4Type;	/* for GID_FT requests */
uint8_t           124 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t Flags;
uint8_t           125 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t DomainScope;
uint8_t           126 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t AreaScope;
uint8_t           127 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t rsvd1;
uint8_t           128 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t rsvd2;
uint8_t           129 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t rsvd3;
uint8_t           130 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t Fc4FBits;
uint8_t           131 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t Fc4Type;
uint8_t           156 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t wwnn[8];
uint8_t           159 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t wwnn[8];
uint8_t           160 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t len;
uint8_t           161 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t symbname[255];
uint8_t           168 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t len;
uint8_t           169 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t symbname[255];
uint8_t           175 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t fbits[128];
uint8_t           186 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t reserved[2];
uint8_t           187 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t fbits;
uint8_t           188 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t type_code;     /* type=8 for FCP */
uint8_t           347 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t nameType:4;	/* FC Word 0, bit 28:31 */
uint8_t           348 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t IEEEextMsn:4;	/* FC Word 0, bit 24:27, bit
uint8_t           351 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t IEEEextMsn:4;	/* FC Word 0, bit 24:27, bit
uint8_t           353 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t nameType:4;	/* FC Word 0, bit 28:31 */
uint8_t           362 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t IEEEextLsb;	/* FC Word 0, bit 16:23, IEEE
uint8_t           364 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t IEEE[6];	/* FC IEEE address */
uint8_t           366 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t wwn[8];
uint8_t           372 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fcphHigh;	/* FC Word 0, byte 0 */
uint8_t           373 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fcphLow;
uint8_t           374 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t bbCreditMsb;
uint8_t           375 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t bbCreditLsb;	/* FC Word 0, byte 3 */
uint8_t           429 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t bbRcvSizeMsb;	/* Upper nibble is reserved */
uint8_t           430 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t bbRcvSizeLsb;	/* FC Word 1, byte 3 */
uint8_t           433 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t word2Reserved1;	/* FC Word 2 byte 0 */
uint8_t           435 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t totalConcurrSeq;	/* FC Word 2 byte 1 */
uint8_t           436 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t roByCategoryMsb;	/* FC Word 2 byte 2 */
uint8_t           438 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t roByCategoryLsb;	/* FC Word 2 byte 3 */
uint8_t           448 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t classValid:1;	/* FC Word 0, bit 31 */
uint8_t           449 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t intermix:1;	/* FC Word 0, bit 30 */
uint8_t           450 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t stackedXparent:1;	/* FC Word 0, bit 29 */
uint8_t           451 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t stackedLockDown:1;	/* FC Word 0, bit 28 */
uint8_t           452 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t seqDelivery:1;	/* FC Word 0, bit 27 */
uint8_t           453 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved1:3;	/* FC Word 0, bit 24:26 */
uint8_t           455 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved1:3;	/* FC Word 0, bit 24:26 */
uint8_t           456 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t seqDelivery:1;	/* FC Word 0, bit 27 */
uint8_t           457 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t stackedLockDown:1;	/* FC Word 0, bit 28 */
uint8_t           458 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t stackedXparent:1;	/* FC Word 0, bit 29 */
uint8_t           459 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t intermix:1;	/* FC Word 0, bit 30 */
uint8_t           460 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t classValid:1;	/* FC Word 0, bit 31 */
uint8_t           464 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved2;	/* FC Word 0, bit 16:23 */
uint8_t           467 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlXidReAssgn:2;	/* FC Word 0, Bit 14:15 */
uint8_t           468 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlInitialPa:2;	/* FC Word 0, bit 12:13 */
uint8_t           469 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlAck0capable:1;	/* FC Word 0, bit 11 */
uint8_t           470 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlAckNcapable:1;	/* FC Word 0, bit 10 */
uint8_t           471 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved3:2;	/* FC Word 0, bit  8: 9 */
uint8_t           473 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved3:2;	/* FC Word 0, bit  8: 9 */
uint8_t           474 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlAckNcapable:1;	/* FC Word 0, bit 10 */
uint8_t           475 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlAck0capable:1;	/* FC Word 0, bit 11 */
uint8_t           476 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlInitialPa:2;	/* FC Word 0, bit 12:13 */
uint8_t           477 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t iCtlXidReAssgn:2;	/* FC Word 0, Bit 14:15 */
uint8_t           480 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved4;	/* FC Word 0, bit  0: 7 */
uint8_t           483 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlAck0capable:1;	/* FC Word 1, bit 31 */
uint8_t           484 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlAckNcapable:1;	/* FC Word 1, bit 30 */
uint8_t           485 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlXidInterlck:1;	/* FC Word 1, bit 29 */
uint8_t           486 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlErrorPolicy:2;	/* FC Word 1, bit 27:28 */
uint8_t           487 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word1Reserved1:1;	/* FC Word 1, bit 26 */
uint8_t           488 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlCatPerSeq:2;	/* FC Word 1, bit 24:25 */
uint8_t           490 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlCatPerSeq:2;	/* FC Word 1, bit 24:25 */
uint8_t           491 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word1Reserved1:1;	/* FC Word 1, bit 26 */
uint8_t           492 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlErrorPolicy:2;	/* FC Word 1, bit 27:28 */
uint8_t           493 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlXidInterlck:1;	/* FC Word 1, bit 29 */
uint8_t           494 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlAckNcapable:1;	/* FC Word 1, bit 30 */
uint8_t           495 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rCtlAck0capable:1;	/* FC Word 1, bit 31 */
uint8_t           498 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word1Reserved2;	/* FC Word 1, bit 16:23 */
uint8_t           499 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rcvDataSizeMsb;	/* FC Word 1, bit  8:15 */
uint8_t           500 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rcvDataSizeLsb;	/* FC Word 1, bit  0: 7 */
uint8_t           502 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t concurrentSeqMsb;	/* FC Word 2, bit 24:31 */
uint8_t           503 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t concurrentSeqLsb;	/* FC Word 2, bit 16:23 */
uint8_t           504 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t EeCreditSeqMsb;	/* FC Word 2, bit  8:15 */
uint8_t           505 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t EeCreditSeqLsb;	/* FC Word 2, bit  0: 7 */
uint8_t           507 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t openSeqPerXchgMsb;	/* FC Word 3, bit 24:31 */
uint8_t           508 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t openSeqPerXchgLsb;	/* FC Word 3, bit 16:23 */
uint8_t           509 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word3Reserved1;	/* Fc Word 3, bit  8:15 */
uint8_t           510 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word3Reserved2;	/* Fc Word 3, bit  0: 7 */
uint8_t           524 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t vendorVersion[16];
uint8_t           662 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t lsRjtRsvd0;	/* FC Word 0, bit 24:31 */
uint8_t           664 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t lsRjtRsnCode;	/* FC Word 0, bit 16:23 */
uint8_t           674 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t lsRjtRsnCodeExp; /* FC Word 0, bit 8:15 */
uint8_t           700 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t vendorUnique;	/* FC Word 0, bit  0: 7 */
uint8_t           713 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t word1Reserved1;	/* FC Word 1, bit 31:24 */
uint8_t           714 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t nPortIdByte0;	/* N_port  ID bit 16:23 */
uint8_t           715 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t nPortIdByte1;	/* N_port  ID bit  8:15 */
uint8_t           716 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t nPortIdByte2;	/* N_port  ID bit  0: 7 */
uint8_t           730 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t prliType;	/* FC Parm Word 0, bit 24:31 */
uint8_t           734 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved1;	/* FC Parm Word 0, bit 16:23 */
uint8_t           737 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t origProcAssocV:1;	/* FC Parm Word 0, bit 15 */
uint8_t           738 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t respProcAssocV:1;	/* FC Parm Word 0, bit 14 */
uint8_t           739 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t estabImagePair:1;	/* FC Parm Word 0, bit 13 */
uint8_t           742 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved2:1;	/* FC Parm Word 0, bit 12 */
uint8_t           743 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t acceptRspCode:4;	/* FC Parm Word 0, bit 8:11, ACC ONLY */
uint8_t           745 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t acceptRspCode:4;	/* FC Parm Word 0, bit 8:11, ACC ONLY */
uint8_t           746 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved2:1;	/* FC Parm Word 0, bit 12 */
uint8_t           747 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t estabImagePair:1;	/* FC Parm Word 0, bit 13 */
uint8_t           748 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t respProcAssocV:1;	/* FC Parm Word 0, bit 14 */
uint8_t           749 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t origProcAssocV:1;	/* FC Parm Word 0, bit 15 */
uint8_t           760 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved3;	/* FC Parm Word 0, bit 0:7 */
uint8_t           766 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word3Reserved1;	/* FC Parm Word 3, bit 24:31 */
uint8_t           767 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word3Reserved2;	/* FC Parm Word 3, bit 16:23 */
uint8_t           811 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t prloType;	/* FC Parm Word 0, bit 24:31 */
uint8_t           814 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved1;	/* FC Parm Word 0, bit 16:23 */
uint8_t           817 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t origProcAssocV:1;	/* FC Parm Word 0, bit 15 */
uint8_t           818 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t respProcAssocV:1;	/* FC Parm Word 0, bit 14 */
uint8_t           819 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved2:2;	/* FC Parm Word 0, bit 12:13 */
uint8_t           820 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t acceptRspCode:4;	/* FC Parm Word 0, bit 8:11, ACC ONLY */
uint8_t           822 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t acceptRspCode:4;	/* FC Parm Word 0, bit 8:11, ACC ONLY */
uint8_t           823 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved2:2;	/* FC Parm Word 0, bit 12:13 */
uint8_t           824 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t respProcAssocV:1;	/* FC Parm Word 0, bit 14 */
uint8_t           825 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t origProcAssocV:1;	/* FC Parm Word 0, bit 15 */
uint8_t           832 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t word0Reserved3;	/* FC Parm Word 0, bit 0:7 */
uint8_t           868 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Oipaddr[16];
uint8_t           869 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Ripaddr[16];
uint8_t           879 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t resvd1;
uint8_t           880 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t resvd2;
uint8_t           881 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t resvd3;
uint8_t           882 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Function;
uint8_t           891 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t resvd[8];
uint8_t           902 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t ipAddr[16];
uint8_t           910 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t Format;
uint8_t           912 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t CommonLen;
uint8_t           913 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t resvd1;
uint8_t           914 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t SpecificLen;
uint8_t          1024 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t resv;
uint8_t          1025 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t domain;
uint8_t          1026 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t area;
uint8_t          1027 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t id;
uint8_t          1029 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t id;
uint8_t          1030 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t area;
uint8_t          1031 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t domain;
uint8_t          1032 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t resv;
uint8_t          1049 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t elsCode;	/* FC Word 0, bit 24:31 */
uint8_t          1050 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t elsByte1;
uint8_t          1051 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t elsByte2;
uint8_t          1052 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t elsByte3;
uint8_t          1064 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t pad[128 - 4];	/* Pad out to payload of 128 bytes */
uint8_t          1074 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */
uint8_t          1077 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       reserved[2];
uint8_t          1078 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t	      capability;	/* LCB Payload Word 1, bit 0:7 */
uint8_t          1079 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       lcb_type; /* LCB Payload Word 2, bit 24:31 */
uint8_t          1082 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       lcb_frequency;    /* LCB Payload Word 2, bit 16:23 */
uint8_t          1094 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */
uint8_t          1095 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       reserved[2];
uint8_t          1096 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t	      capability;	/* LCB Payload Word 1, bit 0:7 */
uint8_t          1097 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       lcb_type; /* LCB Payload Word 2, bit 24:31 */
uint8_t          1098 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t       lcb_frequency;    /* LCB Payload Word 2, bit 16:23 */
uint8_t          1128 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t wwnn[8];
uint8_t          1129 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t wwpn[8];
uint8_t          1297 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t            vendor_name[16];
uint8_t          1298 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t            model_number[16];
uint8_t          1299 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t            serial_number[16];
uint8_t          1300 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t            revision[4];
uint8_t          1301 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t            date[8];
uint8_t          1366 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t  AttrTypes[32];
uint8_t          1367 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t  AttrString[256];
uint8_t          1992 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tval;
uint8_t          1993 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tmask;
uint8_t          1994 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rval;
uint8_t          1995 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rmask;
uint8_t          1997 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rmask;
uint8_t          1998 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rval;
uint8_t          1999 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tmask;
uint8_t          2000 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tval;
uint8_t          2245 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fabric_AL_PA;	/* If using a Fabric Assigned AL_PA */
uint8_t          2246 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rsvd2;
uint8_t          2250 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rsvd2;
uint8_t          2251 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fabric_AL_PA;	/* If using a Fabric Assigned AL_PA */
uint8_t          2612 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t seqId;
uint8_t          2613 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rsvd5;
uint8_t          2631 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rsvd5;
uint8_t          2632 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t seqId;
uint8_t          2668 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t ProgType;
uint8_t          2669 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t ProgId;
uint8_t          2681 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t ProgId;
uint8_t          2682 drivers/scsi/lpfc/lpfc_hw.h 			uint8_t ProgType;
uint8_t          2689 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t feaLevelHigh;
uint8_t          2690 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t feaLevelLow;
uint8_t          2691 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fcphHigh;
uint8_t          2692 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fcphLow;
uint8_t          2694 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fcphLow;
uint8_t          2695 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t fcphHigh;
uint8_t          2696 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t feaLevelLow;
uint8_t          2697 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t feaLevelHigh;
uint8_t          2702 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t opFwName[16];
uint8_t          2704 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t sli1FwName[16];
uint8_t          2706 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t sli2FwName[16];
uint8_t          3048 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t wwpn[8];
uint8_t          3049 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t wwnn[8];
uint8_t          3066 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t  type;
uint8_t          3067 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t  id;
uint8_t          3079 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t  id;
uint8_t          3080 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t  type;
uint8_t          3116 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tmatch;
uint8_t          3117 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tmask;
uint8_t          3118 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rctlmatch;
uint8_t          3119 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rctlmask;
uint8_t          3121 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rctlmask;
uint8_t          3122 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t rctlmatch;
uint8_t          3123 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tmask;
uint8_t          3124 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t tmatch;
uint8_t          3397 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t  attentionId[16];
uint8_t          3398 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t  messageNumberByHA[64];
uint8_t          3399 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t  messageNumberByID[16];
uint8_t          3473 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t portname[8];	/* Used to be struct lpfc_name */
uint8_t          3474 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t nodename[8];
uint8_t          3586 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxCommand;
uint8_t          3587 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxReserved:6;
uint8_t          3588 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxHc:1;
uint8_t          3589 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxOwner:1;	/* Low order bit first word */
uint8_t          3591 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxOwner:1;	/* Low order bit first word */
uint8_t          3592 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxHc:1;
uint8_t          3593 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxReserved:6;
uint8_t          3594 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t mbxCommand;
uint8_t          3608 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statAction;
uint8_t          3609 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statRsn;
uint8_t          3610 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statBaExp;
uint8_t          3611 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statLocalError;
uint8_t          3613 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statLocalError;
uint8_t          3614 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statBaExp;
uint8_t          3615 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statRsn;
uint8_t          3616 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t statAction;
uint8_t          3709 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Rctl;	/* R_CTL field */
uint8_t          3710 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Type;	/* TYPE field */
uint8_t          3711 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Dfctl;	/* DF_CTL field */
uint8_t          3712 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Fctl;	/* Bits 0-7 of IOCB word 5 */
uint8_t          3714 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Fctl;	/* Bits 0-7 of IOCB word 5 */
uint8_t          3715 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Dfctl;	/* DF_CTL field */
uint8_t          3716 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Type;	/* TYPE field */
uint8_t          3717 drivers/scsi/lpfc/lpfc_hw.h 		uint8_t Rctl;	/* R_CTL field */
uint8_t          4081 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		reserved1;
uint8_t          4082 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		reserved2;
uint8_t          4083 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		reserved3;
uint8_t          4084 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		ebde_count;
uint8_t          4086 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		ebde_count;
uint8_t          4087 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		reserved3;
uint8_t          4088 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		reserved2;
uint8_t          4089 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t		reserved1;
uint8_t          4094 drivers/scsi/lpfc/lpfc_hw.h 	uint8_t icd[32];		/* immediate command data (32 bytes) */
uint8_t          2208 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t vlan_bitmap[512];
uint8_t          2778 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t  fw_name[16];
uint8_t          2780 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t  ulp_fw_name[16];
uint8_t          3165 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t inifiband:4;
uint8_t          3166 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t teng_ethernet:4;
uint8_t          3170 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t  sonet:6;
uint8_t          3171 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t  escon:2;
uint8_t          3175 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t  soNet:8;
uint8_t          3179 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t ethernet:8;
uint8_t          3183 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_el_lo:1;
uint8_t          3184 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_lw_laser:1;
uint8_t          3185 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sw_laser:1;
uint8_t          3186 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_md_distance:1;
uint8_t          3187 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_lg_distance:1;
uint8_t          3188 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_int_distance:1;
uint8_t          3189 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_short_distance:1;
uint8_t          3190 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_vld_distance:1;
uint8_t          3194 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t reserved1:1;
uint8_t          3195 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t reserved2:1;
uint8_t          3196 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sfp_active:1;  /* Active cable   */
uint8_t          3197 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sfp_passive:1; /* Passive cable  */
uint8_t          3198 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_lw_laser:1;     /* Longwave laser */
uint8_t          3199 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sw_laser_sl:1;
uint8_t          3200 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sw_laser_sn:1;
uint8_t          3201 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_el_hi:1;        /* Electrical enclosure high bit */
uint8_t          3205 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_tm_sm:1;      /* Single Mode */
uint8_t          3206 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t reserved:1;
uint8_t          3207 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_tm_m6:1;       /* Multimode, 62.5um (M6) */
uint8_t          3208 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_tm_tv:1;      /* Video Coax (TV) */
uint8_t          3209 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_tm_mi:1;      /* Miniature Coax (MI) */
uint8_t          3210 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_tm_tp:1;      /* Twisted Pair (TP) */
uint8_t          3211 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_tm_tw:1;      /* Twin Axial Pair  */
uint8_t          3215 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sp_100MB:1;   /*  100 MB/sec */
uint8_t          3216 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t reserve:1;
uint8_t          3217 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sp_200mb:1;   /*  200 MB/sec */
uint8_t          3218 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sp_3200MB:1;  /* 3200 MB/sec */
uint8_t          3219 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sp_400MB:1;   /*  400 MB/sec */
uint8_t          3220 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sp_1600MB:1;  /* 1600 MB/sec */
uint8_t          3221 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sp_800MB:1;   /*  800 MB/sec */
uint8_t          3222 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t fc_sp_1200MB:1;  /* 1200 MB/sec */
uint8_t          3227 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t vendor_name[16];
uint8_t          3228 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t vendor_oui[3];
uint8_t          3229 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t vendor_pn[816];
uint8_t          3230 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t vendor_rev[4];
uint8_t          3231 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t vendor_sn[16];
uint8_t          3232 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t datecode[6];
uint8_t          3233 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t lot_code[2];
uint8_t          3234 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t reserved191[57];
uint8_t          3551 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t  data[LPFC_HOST_OS_DRIVER_VERSION_SIZE];
uint8_t          4823 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t rev_name[128];
uint8_t          4824 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t date[12];
uint8_t          4825 drivers/scsi/lpfc/lpfc_hw4.h 	uint8_t revision[32];
uint8_t            77 drivers/scsi/lpfc/lpfc_init.c static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
uint8_t           260 drivers/scsi/lpfc/lpfc_init.c 		lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
uint8_t           350 drivers/scsi/lpfc/lpfc_init.c 	uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
uint8_t           475 drivers/scsi/lpfc/lpfc_init.c 		uint8_t *outptr;
uint8_t           483 drivers/scsi/lpfc/lpfc_init.c 				    (char)((uint8_t) 0x30 + (uint8_t) j);
uint8_t           486 drivers/scsi/lpfc/lpfc_init.c 				    (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
uint8_t           491 drivers/scsi/lpfc/lpfc_init.c 				    (char)((uint8_t) 0x30 + (uint8_t) j);
uint8_t           494 drivers/scsi/lpfc/lpfc_init.c 				    (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
uint8_t          2124 drivers/scsi/lpfc/lpfc_init.c lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
uint8_t          2126 drivers/scsi/lpfc/lpfc_init.c 	uint8_t lenlo, lenhi;
uint8_t          2281 drivers/scsi/lpfc/lpfc_init.c lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
uint8_t          2987 drivers/scsi/lpfc/lpfc_init.c 	uint8_t actcmd = MBX_HEARTBEAT;
uint8_t          4693 drivers/scsi/lpfc/lpfc_init.c static uint8_t
uint8_t          4697 drivers/scsi/lpfc/lpfc_init.c 	uint8_t att_type;
uint8_t          4783 drivers/scsi/lpfc/lpfc_init.c 			   uint8_t speed_code)
uint8_t          4875 drivers/scsi/lpfc/lpfc_init.c 	uint8_t att_type;
uint8_t          5003 drivers/scsi/lpfc/lpfc_init.c static uint8_t
uint8_t          5004 drivers/scsi/lpfc/lpfc_init.c lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
uint8_t          5006 drivers/scsi/lpfc/lpfc_init.c 	uint8_t port_speed;
uint8_t          5057 drivers/scsi/lpfc/lpfc_init.c 	uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
uint8_t          5058 drivers/scsi/lpfc/lpfc_init.c 	uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
uint8_t          5282 drivers/scsi/lpfc/lpfc_init.c 	uint8_t status;
uint8_t          5283 drivers/scsi/lpfc/lpfc_init.c 	uint8_t evt_type;
uint8_t          5284 drivers/scsi/lpfc/lpfc_init.c 	uint8_t operational = 0;
uint8_t          5542 drivers/scsi/lpfc/lpfc_init.c 	uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
uint8_t          5924 drivers/scsi/lpfc/lpfc_init.c lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
uint8_t          6418 drivers/scsi/lpfc/lpfc_init.c 	uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
uint8_t          6461 drivers/scsi/lpfc/lpfc_init.c 	memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
uint8_t          6648 drivers/scsi/lpfc/lpfc_init.c 		memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
uint8_t          7014 drivers/scsi/lpfc/lpfc_init.c lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
uint8_t          12623 drivers/scsi/lpfc/lpfc_init.c lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
uint8_t          12625 drivers/scsi/lpfc/lpfc_init.c 	uint8_t file_name[ELX_MODEL_NAME_SIZE];
uint8_t            97 drivers/scsi/lpfc/lpfc_mbox.c 	pmb->ctx_buf = (uint8_t *)mp;
uint8_t           307 drivers/scsi/lpfc/lpfc_mbox.c 	pmb->ctx_buf = (uint8_t *)mp;
uint8_t           574 drivers/scsi/lpfc/lpfc_mbox.c 	mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
uint8_t           751 drivers/scsi/lpfc/lpfc_mbox.c 	     uint8_t *param, LPFC_MBOXQ_t *pmb, uint16_t rpi)
uint8_t           754 drivers/scsi/lpfc/lpfc_mbox.c 	uint8_t *sparam;
uint8_t           786 drivers/scsi/lpfc/lpfc_mbox.c 	pmb->ctx_buf = (uint8_t *)mp;
uint8_t           994 drivers/scsi/lpfc/lpfc_mbox.c 		offset = (uint8_t *) &phba->IOCBs[iocbCnt] -
uint8_t           995 drivers/scsi/lpfc/lpfc_mbox.c 			 (uint8_t *) phba->slim2p.virt;
uint8_t          1005 drivers/scsi/lpfc/lpfc_mbox.c 		offset = (uint8_t *)&phba->IOCBs[iocbCnt] -
uint8_t          1006 drivers/scsi/lpfc/lpfc_mbox.c 			 (uint8_t *)phba->slim2p.virt;
uint8_t          1288 drivers/scsi/lpfc/lpfc_mbox.c 	offset = (uint8_t *)phba->pcb - (uint8_t *)phba->slim2p.virt;
uint8_t          1326 drivers/scsi/lpfc/lpfc_mbox.c 	offset = (uint8_t *)phba->mbox - (uint8_t *)phba->slim2p.virt;
uint8_t          1384 drivers/scsi/lpfc/lpfc_mbox.c 		offset = (uint8_t *)&phba->mbox->us.s2.host -
uint8_t          1385 drivers/scsi/lpfc/lpfc_mbox.c 			(uint8_t *)phba->slim2p.virt;
uint8_t          1628 drivers/scsi/lpfc/lpfc_mbox.c 	uint8_t subsys, opcode;
uint8_t          1779 drivers/scsi/lpfc/lpfc_mbox.c 		 uint8_t subsystem, uint8_t opcode, uint32_t length, bool emb)
uint8_t          1889 drivers/scsi/lpfc/lpfc_mbox.c 	uint8_t opcode = 0;
uint8_t          1956 drivers/scsi/lpfc/lpfc_mbox.c uint8_t
uint8_t          1989 drivers/scsi/lpfc/lpfc_mbox.c uint8_t
uint8_t          2029 drivers/scsi/lpfc/lpfc_mbox.c 	uint8_t *bytep;
uint8_t          2151 drivers/scsi/lpfc/lpfc_mbox.c 	uint8_t bbscn_fabric = 0, bbscn_max = 0, bbscn_def = 0;
uint8_t          2291 drivers/scsi/lpfc/lpfc_mbox.c 	mbox->ctx_buf = (uint8_t *)mp;
uint8_t            70 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t wwpn[8];
uint8_t            71 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t wwnn[8];
uint8_t            92 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t logo_wwpn[8];
uint8_t            99 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t wwpn[8];
uint8_t           100 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t wwnn[8];
uint8_t           122 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t wwpn[8];
uint8_t           123 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t wwnn[8];
uint8_t           145 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t opcode;
uint8_t           146 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t sense_key;
uint8_t           147 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t asc;
uint8_t           148 drivers/scsi/lpfc/lpfc_nl.h 	uint8_t ascq;
uint8_t           189 drivers/scsi/lpfc/lpfc_nportdisc.c 			ptr = (void *)((uint8_t *)lp + sizeof(uint32_t));
uint8_t           302 drivers/scsi/lpfc/lpfc_nportdisc.c 	sp = (struct serv_parm *) ((uint8_t *) lp + sizeof (uint32_t));
uint8_t           460 drivers/scsi/lpfc/lpfc_nportdisc.c 			    (uint8_t *) sp, mbox, ndlp->nlp_rpi);
uint8_t           599 drivers/scsi/lpfc/lpfc_nportdisc.c 				memcpy((uint8_t *)elsiocb, (uint8_t *)cmdiocb,
uint8_t           786 drivers/scsi/lpfc/lpfc_nportdisc.c 	npr = (PRLI *) ((uint8_t *) lp + sizeof (uint32_t));
uint8_t          1181 drivers/scsi/lpfc/lpfc_nportdisc.c 	sp = (struct serv_parm *) ((uint8_t *) lp + sizeof (uint32_t));
uint8_t          1283 drivers/scsi/lpfc/lpfc_nportdisc.c 			 (uint8_t *) sp, mbox, ndlp->nlp_rpi) == 0) {
uint8_t           426 drivers/scsi/lpfc/lpfc_nvme.c 		  uint32_t tmo, uint8_t retry)
uint8_t           444 drivers/scsi/lpfc/lpfc_nvme.c 	genwqe->context3 = (uint8_t *)bmp;
uint8_t           449 drivers/scsi/lpfc/lpfc_nvme.c 	genwqe->context2 = (uint8_t *)pnvme_lsreq;
uint8_t          2233 drivers/scsi/lpfc/lpfc_nvmet.c 			    uint8_t cqflag)
uint8_t          2430 drivers/scsi/lpfc/lpfc_nvmet.c 			   uint8_t cqflag)
uint8_t          1390 drivers/scsi/lpfc/lpfc_scsi.c 		uint8_t *txop, uint8_t *rxop)
uint8_t          1392 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t ret = 0;
uint8_t          1470 drivers/scsi/lpfc/lpfc_scsi.c 		uint8_t *txop, uint8_t *rxop)
uint8_t          1472 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t ret = 0;
uint8_t          1575 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t txop, rxop;
uint8_t          1724 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t txop, rxop;
uint8_t          1955 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t txop, rxop;
uint8_t          2143 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t txop, rxop;
uint8_t          2682 drivers/scsi/lpfc/lpfc_scsi.c lpfc_bg_crc(uint8_t *data, int count)
uint8_t          2698 drivers/scsi/lpfc/lpfc_scsi.c lpfc_bg_csum(uint8_t *data, int count)
uint8_t          2717 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t *data_src = NULL;
uint8_t          2755 drivers/scsi/lpfc/lpfc_scsi.c 		data_src = (uint8_t *)sg_virt(sgde);
uint8_t          2826 drivers/scsi/lpfc/lpfc_scsi.c 					data_src = (uint8_t *)sg_virt(sgde);
uint8_t          4059 drivers/scsi/lpfc/lpfc_scsi.c lpfc_fcpcmd_to_iocb(uint8_t *data, struct fcp_cmnd *fcp_cmnd)
uint8_t          4089 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t *ptr;
uint8_t          4196 drivers/scsi/lpfc/lpfc_scsi.c 			     uint8_t task_mgmt_cmd)
uint8_t          4258 drivers/scsi/lpfc/lpfc_scsi.c lpfc_scsi_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
uint8_t          4910 drivers/scsi/lpfc/lpfc_scsi.c lpfc_taskmgmt_name(uint8_t task_mgmt_cmd)
uint8_t          4950 drivers/scsi/lpfc/lpfc_scsi.c 	uint8_t  rsp_info_code;
uint8_t          5022 drivers/scsi/lpfc/lpfc_scsi.c 		   uint8_t task_mgmt_cmd)
uint8_t          5896 drivers/scsi/lpfc/lpfc_scsi.c 		    struct lpfc_name *target_wwpn, uint64_t lun, uint8_t pri)
uint8_t          5955 drivers/scsi/lpfc/lpfc_scsi.c 		     struct lpfc_name *target_wwpn, uint64_t lun, uint8_t pri)
uint8_t            56 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t priority;
uint8_t            65 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspStatus0;	/* FCP_STATUS byte 0 (reserved) */
uint8_t            66 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspStatus1;	/* FCP_STATUS byte 1 (reserved) */
uint8_t            67 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspStatus2;	/* FCP_STATUS byte 2 field validity */
uint8_t            72 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspStatus3;	/* FCP_STATUS byte 3 SCSI status byte */
uint8_t            82 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspInfo0;	/* FCP_RSP_INFO byte 0 (reserved) */
uint8_t            83 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspInfo1;	/* FCP_RSP_INFO byte 1 (reserved) */
uint8_t            84 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspInfo2;	/* FCP_RSP_INFO byte 2 (reserved) */
uint8_t            85 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspInfo3;	/* FCP_RSP_INFO RSP_CODE byte 3 */
uint8_t            97 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t rspSnsInfo[128];
uint8_t           105 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t fcpCntl0;	/* FCP_CNTL byte 0 (reserved) */
uint8_t           106 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t fcpCntl1;	/* FCP_CNTL byte 1 task codes */
uint8_t           112 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t fcpCntl2;	/* FCP_CTL byte 2 task management codes */
uint8_t           120 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t fcpCntl3;
uint8_t           124 drivers/scsi/lpfc/lpfc_scsi.h 	uint8_t fcpCdb[LPFC_FCP_CDB_LEN]; /* SRB cdb field is copied here */
uint8_t            74 drivers/scsi/lpfc/lpfc_sli.c 			      uint8_t *, uint32_t *);
uint8_t           145 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t *tmp;
uint8_t           170 drivers/scsi/lpfc/lpfc_sli.c 		tmp = (uint8_t *)temp_wqe;
uint8_t           489 drivers/scsi/lpfc/lpfc_sli.c 		     uint8_t rearm)
uint8_t          1425 drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
uint8_t          2324 drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
uint8_t          2326 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t ret;
uint8_t          3473 drivers/scsi/lpfc/lpfc_sli.c 				memcpy(&adaptermsg[0], (uint8_t *) irsp,
uint8_t          3555 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t iocb_cmd_type;
uint8_t          3671 drivers/scsi/lpfc/lpfc_sli.c 				memcpy(&adaptermsg[0], (uint8_t *)irsp,
uint8_t          4209 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t hdrtype;
uint8_t          5290 drivers/scsi/lpfc/lpfc_sli.c 		    uint8_t *vpd, uint32_t *vpd_size)
uint8_t          7164 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t *vpd;
uint8_t          7822 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t	qe_valid;
uint8_t          8218 drivers/scsi/lpfc/lpfc_sli.c 				= (uint8_t *)phba->mbox_ext
uint8_t          8219 drivers/scsi/lpfc/lpfc_sli.c 				  - (uint8_t *)phba->mbox;
uint8_t          8225 drivers/scsi/lpfc/lpfc_sli.c 					      (uint8_t *)phba->mbox_ext,
uint8_t          8941 drivers/scsi/lpfc/lpfc_sli.c lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
uint8_t          9285 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t ct = 0;
uint8_t          9288 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t command_type = ELS_COMMAND_NON_FIP;
uint8_t          9289 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t cmnd;
uint8_t          9990 drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
uint8_t          14338 drivers/scsi/lpfc/lpfc_sli.c inline int lpfc_sli4_poll_eq(struct lpfc_queue *eq, uint8_t path)
uint8_t          14406 drivers/scsi/lpfc/lpfc_sli.c __lpfc_sli4_switch_eqmode(struct lpfc_queue *eq, uint8_t mode)
uint8_t          15504 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t dpp_barset;
uint8_t          15507 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t wq_create_version;
uint8_t          17293 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t	found = 0;
uint8_t          18518 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t *bytep;
uint8_t          19189 drivers/scsi/lpfc/lpfc_sli.c 		lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
uint8_t          19262 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t *rgn23_data = NULL;
uint8_t          19392 drivers/scsi/lpfc/lpfc_sli.c 	sprintf((uint8_t *)wr_object->u.request.object_name, "/");
uint8_t          19491 drivers/scsi/lpfc/lpfc_sli.c 	uint8_t restart_loop;
uint8_t          20759 drivers/scsi/lpfc/lpfc_sli.c 		tmp->fcp_rsp = (struct fcp_rsp *)((uint8_t *)tmp->fcp_cmnd +
uint8_t            72 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t rsvd2;
uint8_t            73 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t priority;	/* OAS priority */
uint8_t            74 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t retry;		/* retry counter for IOCB cmd - if needed */
uint8_t           158 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t mbox_flag;
uint8_t           161 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t  mbox_offset_word;
uint8_t           179 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t profile;	/* profile associated with ring */
uint8_t           180 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t rctl;	/* rctl / type pair configured for ring */
uint8_t           181 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t type;	/* rctl / type pair configured for ring */
uint8_t           182 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t rsvd;
uint8_t           227 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t rsvd;
uint8_t           228 drivers/scsi/lpfc/lpfc_sli.h 	uint8_t ringno;		/* ring number */
uint8_t           148 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t	 qe_valid;
uint8_t           149 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  mode;	/* interrupt or polling */
uint8_t           213 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t db_format;
uint8_t           216 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t q_flag;
uint8_t           266 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t duplex;
uint8_t           267 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t status;
uint8_t           268 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t type;
uint8_t           269 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t number;
uint8_t           270 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t fault;
uint8_t           276 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  fabric_name[8];
uint8_t           277 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  switch_name[8];
uint8_t           278 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  mac_addr[6];
uint8_t           343 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t type;
uint8_t           345 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t length;
uint8_t           347 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t parm_version;
uint8_t           349 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t parm_flags;
uint8_t           359 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t fc_map[3];
uint8_t           360 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t reserved1;
uint8_t           362 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t reserved[2];
uint8_t           366 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t type;
uint8_t           368 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t length;   /* words */
uint8_t           369 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t reserved[2];
uint8_t           385 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t fabric_name[8];
uint8_t           386 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t switch_name[8];
uint8_t           523 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t cqv;
uint8_t           524 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t mqv;
uint8_t           525 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t wqv;
uint8_t           526 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t rqv;
uint8_t           527 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t eqav;
uint8_t           528 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t cqav;
uint8_t           529 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t wqsize;
uint8_t           530 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t bv1s;
uint8_t           533 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t wqpcnt;
uint8_t           534 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t nvme;
uint8_t           548 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t lnk_dv;
uint8_t           551 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t lnk_tp;
uint8_t           555 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t lnk_no;
uint8_t           556 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t optic_state;
uint8_t           831 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t oas_next_tgt_wwpn[8];
uint8_t           832 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t oas_next_vpt_wwpn[8];
uint8_t           986 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE];
uint8_t           987 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE];
uint8_t           992 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  sub_command;
uint8_t           993 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  type;
uint8_t           994 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  capability;
uint8_t           995 drivers/scsi/lpfc/lpfc_sli4.h 	uint8_t  frequency;
uint8_t          1009 drivers/scsi/lpfc/lpfc_sli4.h int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
uint8_t          1010 drivers/scsi/lpfc/lpfc_sli4.h 		     uint8_t, uint32_t, bool);
uint8_t          1108 drivers/scsi/lpfc/lpfc_sli4.h uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
uint8_t          1109 drivers/scsi/lpfc/lpfc_sli4.h uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
uint8_t            34 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t linktype;
uint8_t            38 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t state;
uint8_t            43 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t fail_reason;
uint8_t            44 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t prev_fail_reason;
uint8_t            52 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t node_name[8];	/* WWNN */
uint8_t            53 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t port_name[8];	/* WWPN */
uint8_t            72 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t node_name[8];	/* WWNN */
uint8_t            73 drivers/scsi/lpfc/lpfc_vport.h 	uint8_t port_name[8];	/* WWPN */
uint8_t           158 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cmd;
uint8_t           159 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cmdid;
uint8_t           163 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		logdrv;
uint8_t           164 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		numsge;
uint8_t           165 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		resvd;
uint8_t           166 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		busy;
uint8_t           167 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		numstatus;
uint8_t           168 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		status;
uint8_t           169 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		completed[MBOX_MAX_FIRMWARE_STATUS];
uint8_t           170 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		poll;
uint8_t           171 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ack;
uint8_t           227 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		timeout		:3;
uint8_t           228 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ars		:1;
uint8_t           229 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		reserved	:3;
uint8_t           230 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		islogical	:1;
uint8_t           231 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		logdrv;
uint8_t           232 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		channel;
uint8_t           233 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		target;
uint8_t           234 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		queuetag;
uint8_t           235 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		queueaction;
uint8_t           236 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cdb[10];
uint8_t           237 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cdblen;
uint8_t           238 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		reqsenselen;
uint8_t           239 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		reqsensearea[MAX_REQ_SENSE_LEN];
uint8_t           240 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		numsge;
uint8_t           241 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		scsistatus;
uint8_t           279 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		timeout		:3;
uint8_t           280 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ars		:1;
uint8_t           281 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd1		:1;
uint8_t           282 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cd_rom		:1;
uint8_t           283 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd2		:1;
uint8_t           284 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		islogical	:1;
uint8_t           285 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		logdrv;
uint8_t           286 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		channel;
uint8_t           287 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		target;
uint8_t           288 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		queuetag;
uint8_t           289 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		queueaction;
uint8_t           290 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cdblen;
uint8_t           291 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd3;
uint8_t           292 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cdb[16];
uint8_t           293 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		numsge;
uint8_t           294 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		status;
uint8_t           295 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		reqsenselen;
uint8_t           296 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		reqsensearea[MAX_REQ_SENSE_LEN];
uint8_t           297 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd4;
uint8_t           332 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fw_version[16];
uint8_t           333 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		bios_version[16];
uint8_t           334 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		product_name[80];
uint8_t           335 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		max_commands;
uint8_t           336 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		nchannels;
uint8_t           337 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fc_loop_present;
uint8_t           338 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		mem_type;
uint8_t           343 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		notify_counters;
uint8_t           344 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pad1k[889];
uint8_t           387 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		param_counter;
uint8_t           388 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		param_id;
uint8_t           390 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		write_config_counter;
uint8_t           391 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		write_config_rsvd[3];
uint8_t           392 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_op_counter;
uint8_t           393 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_opid;
uint8_t           394 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_opcmd;
uint8_t           395 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_opstatus;
uint8_t           396 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_state_counter;
uint8_t           397 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_state_id;
uint8_t           398 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_state_new;
uint8_t           399 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_state_old;
uint8_t           400 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_state_counter;
uint8_t           401 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_state_id;
uint8_t           402 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_state_new;
uint8_t           403 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_state_old;
uint8_t           404 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_fmt_counter;
uint8_t           405 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_fmt_id;
uint8_t           406 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_fmt_val;
uint8_t           407 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_fmt_rsvd;
uint8_t           408 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		targ_xfer_counter;
uint8_t           409 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		targ_xfer_id;
uint8_t           410 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		targ_xfer_val;
uint8_t           411 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		targ_xfer_rsvd;
uint8_t           412 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloop_id_chg_counter;
uint8_t           413 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloopid_pdrvid;
uint8_t           414 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloop_id0;
uint8_t           415 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloop_id1;
uint8_t           416 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloop_state_counter;
uint8_t           417 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloop_state0;
uint8_t           418 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloop_state1;
uint8_t           419 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fcloop_state_rsvd;
uint8_t           453 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		notify_rsvd[MAX_NOTIFY_SIZE - CUR_NOTIFY_SIZE];
uint8_t           455 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rebuild_rate;
uint8_t           456 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cache_flush_int;
uint8_t           457 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		sense_alert;
uint8_t           458 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		drive_insert_count;
uint8_t           460 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		battery_status;
uint8_t           461 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		num_ldrv;
uint8_t           462 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		recon_state[MAX_LOGICAL_DRIVES_40LD / 8];
uint8_t           466 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_prop[MAX_LOGICAL_DRIVES_40LD];
uint8_t           467 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		ldrv_state[MAX_LOGICAL_DRIVES_40LD];
uint8_t           468 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_state[FC_MAX_PHYSICAL_DEVICES];
uint8_t           471 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		targ_xfer[80];
uint8_t           472 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pad1k[263];
uint8_t           507 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		max_commands;
uint8_t           508 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rebuild_rate;
uint8_t           509 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		max_targ_per_chan;
uint8_t           510 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		nchannels;
uint8_t           511 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		fw_version[4];
uint8_t           513 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		chip_set_value;
uint8_t           514 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		dram_size;
uint8_t           515 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cache_flush_interval;
uint8_t           516 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		bios_version[4];
uint8_t           517 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		board_type;
uint8_t           518 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		sense_alert;
uint8_t           519 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		write_config_count;
uint8_t           520 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		battery_status;
uint8_t           521 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		dec_fault_bus_info;
uint8_t           534 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		nldrv;
uint8_t           535 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd[3];
uint8_t           537 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		prop[MAX_LOGICAL_DRIVES_8LD];
uint8_t           538 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		state[MAX_LOGICAL_DRIVES_8LD];
uint8_t           547 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];
uint8_t           548 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd;
uint8_t           577 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		stack_attn;
uint8_t           578 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		modem_status;
uint8_t           579 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd[2];
uint8_t           589 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		channel;
uint8_t           590 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		target;
uint8_t           631 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		span_depth;
uint8_t           632 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		level;
uint8_t           633 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		read_ahead;
uint8_t           634 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		stripe_sz;
uint8_t           635 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		status;
uint8_t           636 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		write_mode;
uint8_t           637 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		direct_io;
uint8_t           638 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		row_size;
uint8_t           688 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		type;
uint8_t           689 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		cur_status;
uint8_t           690 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		tag_depth;
uint8_t           691 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		sync_neg;
uint8_t           704 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		numldrv;
uint8_t           705 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		resvd[3];
uint8_t           721 drivers/scsi/megaraid/mbox_defs.h 	uint8_t			numldrv;
uint8_t           722 drivers/scsi/megaraid/mbox_defs.h 	uint8_t			resvd[3];
uint8_t           738 drivers/scsi/megaraid/mbox_defs.h 	uint8_t			numldrv;
uint8_t           739 drivers/scsi/megaraid/mbox_defs.h 	uint8_t			resvd[3];
uint8_t           755 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		geometry	:4;
uint8_t           756 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		unused		:4;
uint8_t           757 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		boot_drv;
uint8_t           758 drivers/scsi/megaraid/mbox_defs.h 	uint8_t		rsvd[12];
uint8_t           156 drivers/scsi/megaraid/mega_common.h 	uint8_t			quiescent;
uint8_t           169 drivers/scsi/megaraid/mega_common.h 	uint8_t			max_channel;
uint8_t           171 drivers/scsi/megaraid/mega_common.h 	uint8_t			max_lun;
uint8_t           175 drivers/scsi/megaraid/mega_common.h 	uint8_t			ito;
uint8_t           182 drivers/scsi/megaraid/mega_common.h 	uint8_t			fw_version[VERSION_SIZE];
uint8_t           183 drivers/scsi/megaraid/mega_common.h 	uint8_t			bios_version[VERSION_SIZE];
uint8_t           184 drivers/scsi/megaraid/mega_common.h 	uint8_t			max_cdb_sz;
uint8_t           185 drivers/scsi/megaraid/mega_common.h 	uint8_t			ha;
uint8_t           118 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t			signature[EXT_IOCTL_SIGN_SZ];
uint8_t           127 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t			reserved[128];
uint8_t           147 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t			free_buf;
uint8_t           149 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t			timedout;
uint8_t           185 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		pci_bus;
uint8_t           186 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		pci_dev_fn;
uint8_t           187 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		pci_slot;
uint8_t           188 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		irq;
uint8_t           193 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		num_ldrv;
uint8_t           214 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		irq;
uint8_t           215 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		numldrv;
uint8_t           216 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		pcibus;
uint8_t           218 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		pcifun;
uint8_t           221 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		pcislot;
uint8_t           243 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t		in_use;
uint8_t           277 drivers/scsi/megaraid/megaraid_ioctl.h 	uint8_t			max_kioc;
uint8_t            97 drivers/scsi/megaraid/megaraid_mbox.c static int mbox_post_sync_cmd(adapter_t *, uint8_t []);
uint8_t            98 drivers/scsi/megaraid/megaraid_mbox.c static int mbox_post_sync_cmd_fast(adapter_t *, uint8_t []);
uint8_t          1043 drivers/scsi/megaraid/megaraid_mbox.c 		ccb->raw_mbox	= (uint8_t *)ccb->mbox;
uint8_t          1940 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			channel;
uint8_t          1941 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			target;
uint8_t          1989 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			channel;
uint8_t          1990 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			target;
uint8_t          2038 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			nstatus;
uint8_t          2039 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			completed[MBOX_MAX_FIRMWARE_STATUS];
uint8_t          2188 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			c;
uint8_t          2529 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		raw_mbox[sizeof(mbox_t)];
uint8_t          2673 drivers/scsi/megaraid/megaraid_mbox.c mbox_post_sync_cmd(adapter_t *adapter, uint8_t raw_mbox[])
uint8_t          2677 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		status;
uint8_t          2803 drivers/scsi/megaraid/megaraid_mbox.c mbox_post_sync_cmd_fast(adapter_t *adapter, uint8_t raw_mbox[])
uint8_t          2882 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			raw_mbox[sizeof(mbox_t)];
uint8_t          3004 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		raw_mbox[sizeof(mbox_t)];
uint8_t          3040 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		raw_mbox[sizeof(mbox_t)];
uint8_t          3059 drivers/scsi/megaraid/megaraid_mbox.c 		*init_id = *(uint8_t *)adapter->ibuf;
uint8_t          3082 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		raw_mbox[sizeof(mbox_t)];
uint8_t          3132 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		raw_mbox[sizeof(mbox_t)];
uint8_t          3149 drivers/scsi/megaraid/megaraid_mbox.c 		nsg =  *(uint8_t *)adapter->ibuf;
uint8_t          3173 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		raw_mbox[sizeof(mbox_t)];
uint8_t          3191 drivers/scsi/megaraid/megaraid_mbox.c 		raid_dev->channel_class =  *(uint8_t *)adapter->ibuf;
uint8_t          3207 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t	raw_mbox[sizeof(mbox_t)];
uint8_t          3237 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t	raw_mbox[sizeof(mbox_t)];
uint8_t          3362 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		c;
uint8_t          3363 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t		t;
uint8_t          3443 drivers/scsi/megaraid/megaraid_mbox.c 		ccb->raw_mbox		= (uint8_t *)ccb->mbox;
uint8_t          3566 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			*raw_mbox;
uint8_t          3595 drivers/scsi/megaraid/megaraid_mbox.c 	raw_mbox	= (uint8_t *)&mbox64->mbox32;
uint8_t          3690 drivers/scsi/megaraid/megaraid_mbox.c 	uint8_t			*raw_mbox;
uint8_t          3696 drivers/scsi/megaraid/megaraid_mbox.c 	raw_mbox		= (uint8_t *)&mbox64->mbox32;
uint8_t           129 drivers/scsi/megaraid/megaraid_mbox.h 	uint8_t			*raw_mbox;
uint8_t           203 drivers/scsi/megaraid/megaraid_mbox.h 	uint8_t				pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];
uint8_t           207 drivers/scsi/megaraid/megaraid_mbox.h 	uint8_t				channel_class;
uint8_t            31 drivers/scsi/megaraid/megaraid_mm.c static int handle_drvrcmd(void __user *, uint8_t, int *);
uint8_t           116 drivers/scsi/megaraid/megaraid_mm.c 	uint8_t		old_ioctl;
uint8_t           285 drivers/scsi/megaraid/megaraid_mm.c handle_drvrcmd(void __user *arg, uint8_t old_ioctl, int *rval)
uint8_t           289 drivers/scsi/megaraid/megaraid_mm.c 	uint8_t		opcode;
uint8_t           290 drivers/scsi/megaraid/megaraid_mm.c 	uint8_t		subopcode;
uint8_t           364 drivers/scsi/megaraid/megaraid_mm.c 	uint8_t			opcode;
uint8_t           365 drivers/scsi/megaraid/megaraid_mm.c 	uint8_t			subopcode;
uint8_t           806 drivers/scsi/megaraid/megaraid_mm.c 	uint8_t			opcode;
uint8_t           807 drivers/scsi/megaraid/megaraid_mm.c 	uint8_t			subopcode;
uint8_t           853 drivers/scsi/megaraid/megaraid_mm.c 					sizeof(uint8_t))) {
uint8_t           866 drivers/scsi/megaraid/megaraid_mm.c 			&mbox64->mbox32.status, sizeof(uint8_t))) {
uint8_t            66 drivers/scsi/megaraid/megaraid_mm.h 		uint8_t fca[16];
uint8_t            68 drivers/scsi/megaraid/megaraid_mm.h 			uint8_t opcode;
uint8_t            69 drivers/scsi/megaraid/megaraid_mm.h 			uint8_t subopcode;
uint8_t            72 drivers/scsi/megaraid/megaraid_mm.h 			uint8_t __user *buffer;
uint8_t            73 drivers/scsi/megaraid/megaraid_mm.h 			uint8_t pad[4];
uint8_t            76 drivers/scsi/megaraid/megaraid_mm.h 			uint8_t __user *buffer;
uint8_t            82 drivers/scsi/megaraid/megaraid_mm.h 	uint8_t mbox[18];		/* 16 bytes + 2 status bytes */
uint8_t           178 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t driver_version[MPT2_IOCTL_VERSION_LENGTH];
uint8_t           179 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t rsvd1;
uint8_t           180 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t scsi_id;
uint8_t           223 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t data[MPT3_EVENT_DATA_SIZE];
uint8_t           265 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t mf[1];
uint8_t           281 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t mf[1];
uint8_t           336 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t reserved;
uint8_t           337 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t buffer_type;
uint8_t           376 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t reserved;
uint8_t           377 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t buffer_type;
uint8_t           415 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t status;
uint8_t           416 drivers/scsi/mpt3sas/mpt3sas_ctl.h 	uint8_t reserved;
uint8_t           118 drivers/scsi/qedf/qedf.h 	uint8_t tm_flags;
uint8_t           157 drivers/scsi/qedf/qedf.h 	uint8_t *sense_buffer;
uint8_t           281 drivers/scsi/qedf/qedf.h 	uint8_t direction;
uint8_t           286 drivers/scsi/qedf/qedf.h 	uint8_t lba[4];
uint8_t           395 drivers/scsi/qedf/qedf.h 	uint8_t	*grcdump;
uint8_t           118 drivers/scsi/qedf/qedf_dbg.c qedf_free_grc_dump_buf(uint8_t **buf)
uint8_t           105 drivers/scsi/qedf/qedf_dbg.h extern int qedf_alloc_grc_dump_buf(uint8_t **buf, uint32_t len);
uint8_t           106 drivers/scsi/qedf/qedf_dbg.h extern void qedf_free_grc_dump_buf(uint8_t **buf);
uint8_t           108 drivers/scsi/qedf/qedf_dbg.h 			     const struct qed_common_ops *common, uint8_t **buf,
uint8_t           815 drivers/scsi/qedf/qedf_io.c 	uint8_t op;
uint8_t          1066 drivers/scsi/qedf/qedf_io.c 	uint8_t *rsp_info, *sense_data;
uint8_t          2269 drivers/scsi/qedf/qedf_io.c 	uint8_t tm_flags)
uint8_t           403 drivers/scsi/qla1280.c 				   uint8_t, uint16_t *);
uint8_t           581 drivers/scsi/qla1280.c 	uint8_t chksum;
uint8_t          1117 drivers/scsi/qla1280.c 	uint8_t mr;
uint8_t          1713 drivers/scsi/qla1280.c 	uint8_t *sp, *tbuf;
uint8_t          1786 drivers/scsi/qla1280.c 		sp = (uint8_t *)ha->request_ring;
uint8_t          2415 drivers/scsi/qla1280.c qla1280_mailbox_command(struct scsi_qla_host *ha, uint8_t mr, uint16_t *mb)
uint8_t          2711 drivers/scsi/qla1280.c 		pkt->lun = (uint8_t) lun;
uint8_t          2712 drivers/scsi/qla1280.c 		pkt->target = (uint8_t) (bus ? (id | BIT_7) : id);
uint8_t          2816 drivers/scsi/qla1280.c 	pkt->entry_count = (uint8_t) req_cnt;
uint8_t          2817 drivers/scsi/qla1280.c 	pkt->sys_define = (uint8_t) ha->req_ring_index;
uint8_t          2912 drivers/scsi/qla1280.c 				(uint8_t)ha->req_ring_index;
uint8_t          3071 drivers/scsi/qla1280.c 	pkt->entry_count = (uint8_t) req_cnt;
uint8_t          3072 drivers/scsi/qla1280.c 	pkt->sys_define = (uint8_t) ha->req_ring_index;
uint8_t          3158 drivers/scsi/qla1280.c 				(uint8_t) ha->req_ring_index;
uint8_t          3269 drivers/scsi/qla1280.c 			pkt->sys_define = (uint8_t) ha->req_ring_index;
uint8_t          3561 drivers/scsi/qla1280.c 	uint8_t bus;
uint8_t           100 drivers/scsi/qla1280.h 	uint8_t flags;		/* (1) Status flags. */
uint8_t           101 drivers/scsi/qla1280.h 	uint8_t dir;		/* direction of transfer */
uint8_t           334 drivers/scsi/qla1280.h 	uint8_t id0;		/* 0 */
uint8_t           335 drivers/scsi/qla1280.h 	uint8_t id1;		/* 1 */
uint8_t           336 drivers/scsi/qla1280.h 	uint8_t id2;		/* 2 */
uint8_t           337 drivers/scsi/qla1280.h 	uint8_t id3;		/* 3 */
uint8_t           338 drivers/scsi/qla1280.h 	uint8_t version;	/* 4 */
uint8_t           341 drivers/scsi/qla1280.h 		uint8_t bios_configuration_mode:2;
uint8_t           342 drivers/scsi/qla1280.h 		uint8_t bios_disable:1;
uint8_t           343 drivers/scsi/qla1280.h 		uint8_t selectable_scsi_boot_enable:1;
uint8_t           344 drivers/scsi/qla1280.h 		uint8_t cd_rom_boot_enable:1;
uint8_t           345 drivers/scsi/qla1280.h 		uint8_t disable_loading_risc_code:1;
uint8_t           346 drivers/scsi/qla1280.h 		uint8_t enable_64bit_addressing:1;
uint8_t           347 drivers/scsi/qla1280.h 		uint8_t unused_7:1;
uint8_t           351 drivers/scsi/qla1280.h 		uint8_t boot_lun_number:5;
uint8_t           352 drivers/scsi/qla1280.h 		uint8_t scsi_bus_number:1;
uint8_t           353 drivers/scsi/qla1280.h 		uint8_t unused_6:1;
uint8_t           354 drivers/scsi/qla1280.h 		uint8_t unused_7:1;
uint8_t           358 drivers/scsi/qla1280.h 		uint8_t boot_target_number:4;
uint8_t           359 drivers/scsi/qla1280.h 		uint8_t unused_12:1;
uint8_t           360 drivers/scsi/qla1280.h 		uint8_t unused_13:1;
uint8_t           361 drivers/scsi/qla1280.h 		uint8_t unused_14:1;
uint8_t           362 drivers/scsi/qla1280.h 		uint8_t unused_15:1;
uint8_t           371 drivers/scsi/qla1280.h 		uint8_t reserved:2;
uint8_t           372 drivers/scsi/qla1280.h 		uint8_t burst_enable:1;
uint8_t           373 drivers/scsi/qla1280.h 		uint8_t reserved_1:1;
uint8_t           374 drivers/scsi/qla1280.h 		uint8_t fifo_threshold:4;
uint8_t           381 drivers/scsi/qla1280.h 		uint8_t scsi_bus_1_control:2;
uint8_t           382 drivers/scsi/qla1280.h 		uint8_t scsi_bus_0_control:2;
uint8_t           383 drivers/scsi/qla1280.h 		uint8_t unused_0:1;
uint8_t           384 drivers/scsi/qla1280.h 		uint8_t unused_1:1;
uint8_t           385 drivers/scsi/qla1280.h 		uint8_t unused_2:1;
uint8_t           386 drivers/scsi/qla1280.h 		uint8_t auto_term_support:1;
uint8_t           417 drivers/scsi/qla1280.h 			uint8_t initiator_id:4;
uint8_t           418 drivers/scsi/qla1280.h 			uint8_t scsi_reset_disable:1;
uint8_t           419 drivers/scsi/qla1280.h 			uint8_t scsi_bus_size:1;
uint8_t           420 drivers/scsi/qla1280.h 			uint8_t scsi_bus_type:1;
uint8_t           421 drivers/scsi/qla1280.h 			uint8_t unused_7:1;
uint8_t           424 drivers/scsi/qla1280.h 		uint8_t bus_reset_delay;	/* 25 */
uint8_t           425 drivers/scsi/qla1280.h 		uint8_t retry_count;	/* 26 */
uint8_t           426 drivers/scsi/qla1280.h 		uint8_t retry_delay;	/* 27 */
uint8_t           429 drivers/scsi/qla1280.h 			uint8_t async_data_setup_time:4;
uint8_t           430 drivers/scsi/qla1280.h 			uint8_t req_ack_active_negation:1;
uint8_t           431 drivers/scsi/qla1280.h 			uint8_t data_line_active_negation:1;
uint8_t           432 drivers/scsi/qla1280.h 			uint8_t unused_6:1;
uint8_t           433 drivers/scsi/qla1280.h 			uint8_t unused_7:1;
uint8_t           436 drivers/scsi/qla1280.h 		uint8_t unused_29;	/* 29 */
uint8_t           447 drivers/scsi/qla1280.h 				uint8_t renegotiate_on_error:1;
uint8_t           448 drivers/scsi/qla1280.h 				uint8_t stop_queue_on_check:1;
uint8_t           449 drivers/scsi/qla1280.h 				uint8_t auto_request_sense:1;
uint8_t           450 drivers/scsi/qla1280.h 				uint8_t tag_queuing:1;
uint8_t           451 drivers/scsi/qla1280.h 				uint8_t enable_sync:1;
uint8_t           452 drivers/scsi/qla1280.h 				uint8_t enable_wide:1;
uint8_t           453 drivers/scsi/qla1280.h 				uint8_t parity_checking:1;
uint8_t           454 drivers/scsi/qla1280.h 				uint8_t disconnect_allowed:1;
uint8_t           457 drivers/scsi/qla1280.h 			uint8_t execution_throttle;	/* 41 */
uint8_t           458 drivers/scsi/qla1280.h 			uint8_t sync_period;	/* 42 */
uint8_t           461 drivers/scsi/qla1280.h 				uint8_t flags_43;
uint8_t           463 drivers/scsi/qla1280.h 					uint8_t sync_offset:4;
uint8_t           464 drivers/scsi/qla1280.h 					uint8_t device_enable:1;
uint8_t           465 drivers/scsi/qla1280.h 					uint8_t lun_disable:1;
uint8_t           466 drivers/scsi/qla1280.h 					uint8_t unused_6:1;
uint8_t           467 drivers/scsi/qla1280.h 					uint8_t unused_7:1;
uint8_t           470 drivers/scsi/qla1280.h 					uint8_t sync_offset:5;
uint8_t           471 drivers/scsi/qla1280.h 					uint8_t device_enable:1;
uint8_t           472 drivers/scsi/qla1280.h 					uint8_t unused_6:1;
uint8_t           473 drivers/scsi/qla1280.h 					uint8_t unused_7:1;
uint8_t           477 drivers/scsi/qla1280.h 				uint8_t unused_44;
uint8_t           479 drivers/scsi/qla1280.h 					uint8_t ppr_options:4;
uint8_t           480 drivers/scsi/qla1280.h 					uint8_t ppr_bus_width:2;
uint8_t           481 drivers/scsi/qla1280.h 					uint8_t unused_8:1;
uint8_t           482 drivers/scsi/qla1280.h 					uint8_t enable_ppr:1;
uint8_t           485 drivers/scsi/qla1280.h 			uint8_t unused_45;	/* 45 */
uint8_t           494 drivers/scsi/qla1280.h 		uint8_t unused_254;
uint8_t           495 drivers/scsi/qla1280.h 		uint8_t system_id_pointer;
uint8_t           498 drivers/scsi/qla1280.h 	uint8_t chksum;		/* 255 */
uint8_t           506 drivers/scsi/qla1280.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           508 drivers/scsi/qla1280.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           509 drivers/scsi/qla1280.h 	uint8_t sys_define;		/* System defined. */
uint8_t           510 drivers/scsi/qla1280.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           512 drivers/scsi/qla1280.h 	uint8_t lun;			/* SCSI LUN */
uint8_t           513 drivers/scsi/qla1280.h 	uint8_t target;			/* SCSI ID */
uint8_t           519 drivers/scsi/qla1280.h 	uint8_t scsi_cdb[MAX_CMDSZ];	/* SCSI command words. */
uint8_t           534 drivers/scsi/qla1280.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           536 drivers/scsi/qla1280.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           537 drivers/scsi/qla1280.h 	uint8_t sys_define;		/* System defined. */
uint8_t           538 drivers/scsi/qla1280.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           560 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           562 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           563 drivers/scsi/qla1280.h 	uint8_t sys_define;	/* System defined. */
uint8_t           564 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           585 drivers/scsi/qla1280.h 	uint8_t req_sense_data[32];	/* Request sense data. */
uint8_t           592 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           594 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           595 drivers/scsi/qla1280.h 	uint8_t sys_define;	/* System defined. */
uint8_t           596 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           598 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           599 drivers/scsi/qla1280.h 	uint8_t target;		/* SCSI ID */
uint8_t           600 drivers/scsi/qla1280.h 	uint8_t modifier;	/* Modifier (7-0). */
uint8_t           604 drivers/scsi/qla1280.h 	uint8_t reserved_1[53];
uint8_t           613 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           615 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           616 drivers/scsi/qla1280.h 	uint8_t sys_define;	/* System defined. */
uint8_t           617 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           619 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           620 drivers/scsi/qla1280.h 	uint8_t target;		/* SCSI ID */
uint8_t           626 drivers/scsi/qla1280.h 	uint8_t scsi_cdb[88];	/* SCSI command words. */
uint8_t           633 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           635 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           636 drivers/scsi/qla1280.h 	uint8_t sys_define;	/* System defined. */
uint8_t           637 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           639 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           640 drivers/scsi/qla1280.h 	uint8_t target;		/* SCSI ID */
uint8_t           646 drivers/scsi/qla1280.h 	uint8_t scsi_cdb[MAX_CMDSZ];	/* SCSI command words. */
uint8_t           658 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           660 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           661 drivers/scsi/qla1280.h 	uint8_t sys_define;	/* System defined. */
uint8_t           662 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           679 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           681 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           682 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           683 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status not used. */
uint8_t           688 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           689 drivers/scsi/qla1280.h 	uint8_t reserved_5;
uint8_t           690 drivers/scsi/qla1280.h 	uint8_t command_count;	/* Number of ATIOs allocated. */
uint8_t           691 drivers/scsi/qla1280.h 	uint8_t immed_notify_count;	/* Number of Immediate Notify */
uint8_t           693 drivers/scsi/qla1280.h 	uint8_t group_6_length;	/* SCSI CDB length for group 6 */
uint8_t           695 drivers/scsi/qla1280.h 	uint8_t group_7_length;	/* SCSI CDB length for group 7 */
uint8_t           707 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           709 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           710 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           711 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           713 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           714 drivers/scsi/qla1280.h 	uint8_t reserved_3;
uint8_t           715 drivers/scsi/qla1280.h 	uint8_t operators;
uint8_t           716 drivers/scsi/qla1280.h 	uint8_t reserved_4;
uint8_t           718 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           719 drivers/scsi/qla1280.h 	uint8_t reserved_5;
uint8_t           720 drivers/scsi/qla1280.h 	uint8_t command_count;	/* Number of ATIOs allocated. */
uint8_t           721 drivers/scsi/qla1280.h 	uint8_t immed_notify_count;	/* Number of Immediate Notify */
uint8_t           732 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           734 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           735 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           736 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           738 drivers/scsi/qla1280.h 	uint8_t lun;
uint8_t           739 drivers/scsi/qla1280.h 	uint8_t initiator_id;
uint8_t           740 drivers/scsi/qla1280.h 	uint8_t reserved_3;
uint8_t           741 drivers/scsi/qla1280.h 	uint8_t target_id;
uint8_t           743 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           744 drivers/scsi/qla1280.h 	uint8_t reserved_4;
uint8_t           745 drivers/scsi/qla1280.h 	uint8_t tag_value;	/* Received queue tag message value */
uint8_t           746 drivers/scsi/qla1280.h 	uint8_t tag_type;	/* Received queue tag message type */
uint8_t           749 drivers/scsi/qla1280.h 	uint8_t scsi_msg[8];	/* SCSI message not handled by ISP */
uint8_t           751 drivers/scsi/qla1280.h 	uint8_t sense_data[18];
uint8_t           758 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           760 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           761 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           762 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           764 drivers/scsi/qla1280.h 	uint8_t lun;
uint8_t           765 drivers/scsi/qla1280.h 	uint8_t initiator_id;
uint8_t           766 drivers/scsi/qla1280.h 	uint8_t reserved_3;
uint8_t           767 drivers/scsi/qla1280.h 	uint8_t target_id;
uint8_t           769 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           770 drivers/scsi/qla1280.h 	uint8_t event;
uint8_t           779 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           781 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           782 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           783 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           785 drivers/scsi/qla1280.h 	uint8_t lun;
uint8_t           786 drivers/scsi/qla1280.h 	uint8_t initiator_id;
uint8_t           787 drivers/scsi/qla1280.h 	uint8_t cdb_len;
uint8_t           788 drivers/scsi/qla1280.h 	uint8_t target_id;
uint8_t           790 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           791 drivers/scsi/qla1280.h 	uint8_t scsi_status;
uint8_t           792 drivers/scsi/qla1280.h 	uint8_t tag_value;	/* Received queue tag message value */
uint8_t           793 drivers/scsi/qla1280.h 	uint8_t tag_type;	/* Received queue tag message type */
uint8_t           794 drivers/scsi/qla1280.h 	uint8_t cdb[26];
uint8_t           795 drivers/scsi/qla1280.h 	uint8_t sense_data[18];
uint8_t           802 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           804 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           805 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           806 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           808 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           809 drivers/scsi/qla1280.h 	uint8_t initiator_id;
uint8_t           810 drivers/scsi/qla1280.h 	uint8_t reserved_3;
uint8_t           811 drivers/scsi/qla1280.h 	uint8_t target_id;
uint8_t           813 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           814 drivers/scsi/qla1280.h 	uint8_t scsi_status;
uint8_t           815 drivers/scsi/qla1280.h 	uint8_t tag_value;	/* Received queue tag message value */
uint8_t           816 drivers/scsi/qla1280.h 	uint8_t tag_type;	/* Received queue tag message type */
uint8_t           835 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           837 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           838 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           839 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           841 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           842 drivers/scsi/qla1280.h 	uint8_t initiator_id;
uint8_t           843 drivers/scsi/qla1280.h 	uint8_t reserved_3;
uint8_t           844 drivers/scsi/qla1280.h 	uint8_t target_id;
uint8_t           846 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           847 drivers/scsi/qla1280.h 	uint8_t scsi_status;
uint8_t           848 drivers/scsi/qla1280.h 	uint8_t tag_value;	/* Received queue tag message value */
uint8_t           849 drivers/scsi/qla1280.h 	uint8_t tag_type;	/* Received queue tag message type */
uint8_t           858 drivers/scsi/qla1280.h 	uint8_t sense_data[18];
uint8_t           865 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           867 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           868 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           869 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           871 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           872 drivers/scsi/qla1280.h 	uint8_t initiator_id;
uint8_t           873 drivers/scsi/qla1280.h 	uint8_t reserved_3;
uint8_t           874 drivers/scsi/qla1280.h 	uint8_t target_id;
uint8_t           876 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           877 drivers/scsi/qla1280.h 	uint8_t scsi_status;
uint8_t           878 drivers/scsi/qla1280.h 	uint8_t tag_value;	/* Received queue tag message value */
uint8_t           879 drivers/scsi/qla1280.h 	uint8_t tag_type;	/* Received queue tag message type */
uint8_t           895 drivers/scsi/qla1280.h 	uint8_t entry_type;	/* Entry type. */
uint8_t           897 drivers/scsi/qla1280.h 	uint8_t entry_count;	/* Entry count. */
uint8_t           898 drivers/scsi/qla1280.h 	uint8_t reserved_1;
uint8_t           899 drivers/scsi/qla1280.h 	uint8_t entry_status;	/* Entry Status. */
uint8_t           901 drivers/scsi/qla1280.h 	uint8_t lun;		/* SCSI LUN */
uint8_t           902 drivers/scsi/qla1280.h 	uint8_t initiator_id;
uint8_t           903 drivers/scsi/qla1280.h 	uint8_t reserved_3;
uint8_t           904 drivers/scsi/qla1280.h 	uint8_t target_id;
uint8_t           906 drivers/scsi/qla1280.h 	uint8_t status;
uint8_t           907 drivers/scsi/qla1280.h 	uint8_t scsi_status;
uint8_t           908 drivers/scsi/qla1280.h 	uint8_t tag_value;	/* Received queue tag message value */
uint8_t           909 drivers/scsi/qla1280.h 	uint8_t tag_type;	/* Received queue tag message type */
uint8_t           915 drivers/scsi/qla1280.h 	uint8_t sense_data[18];
uint8_t           981 drivers/scsi/qla1280.h 	uint8_t id;		/* Host adapter SCSI id */
uint8_t           982 drivers/scsi/qla1280.h 	uint8_t bus_reset_delay;	/* SCSI bus reset delay. */
uint8_t           983 drivers/scsi/qla1280.h 	uint8_t failed_reset_count;	/* number of time reset failed */
uint8_t           984 drivers/scsi/qla1280.h 	uint8_t unused;
uint8_t           989 drivers/scsi/qla1280.h 	uint8_t reset_marker:1;
uint8_t           990 drivers/scsi/qla1280.h 	uint8_t disable_scsi_reset:1;
uint8_t           991 drivers/scsi/qla1280.h 	uint8_t scsi_bus_dead:1;	/* SCSI Bus is Dead, when 5 back to back resets failed */
uint8_t          1018 drivers/scsi/qla1280.h 	uint8_t devnum;
uint8_t          1019 drivers/scsi/qla1280.h 	uint8_t revision;
uint8_t          1020 drivers/scsi/qla1280.h 	uint8_t ports;
uint8_t           218 drivers/scsi/qla2xxx/qla_attr.c 		uint8_t *iter;
uint8_t           219 drivers/scsi/qla2xxx/qla_attr.c 		uint8_t chksum;
uint8_t           221 drivers/scsi/qla2xxx/qla_attr.c 		iter = (uint8_t *)buf;
uint8_t           568 drivers/scsi/qla2xxx/qla_attr.c 	uint8_t *tmp_data;
uint8_t           674 drivers/scsi/qla2xxx/qla_attr.c 	uint8_t *tmp_data = NULL;
uint8_t          2731 drivers/scsi/qla2xxx/qla_attr.c 	static const uint8_t node_name[WWN_SIZE] = {
uint8_t          2779 drivers/scsi/qla2xxx/qla_attr.c 	uint8_t	qos = 0;
uint8_t            63 drivers/scsi/qla2xxx/qla_bsg.c 	struct qla_fcp_prio_cfg *pri_cfg, uint8_t flag)
uint8_t            66 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *bcode;
uint8_t            72 drivers/scsi/qla2xxx/qla_bsg.c 	bcode = (uint8_t *)pri_cfg;
uint8_t           714 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t command_sent;
uint8_t           719 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *fw_sts_ptr;
uint8_t           720 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *req_data = NULL;
uint8_t           723 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *rsp_data = NULL;
uint8_t           920 drivers/scsi/qla2xxx/qla_bsg.c 	    sizeof(response) + sizeof(uint8_t);
uint8_t          1301 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *rsp_ptr = NULL;
uint8_t          1363 drivers/scsi/qla2xxx/qla_bsg.c 			rsp_ptr = ((uint8_t *)bsg_reply) +
uint8_t          1380 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t is_update)
uint8_t          1529 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t bsg[DMA_POOL_SIZE];
uint8_t          1582 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t bsg[DMA_POOL_SIZE];
uint8_t          1585 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma);
uint8_t          1633 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t bsg[DMA_POOL_SIZE];
uint8_t          1636 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma);
uint8_t          1680 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t bsg[DMA_POOL_SIZE];
uint8_t          1683 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma);
uint8_t          1726 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t bsg[DMA_POOL_SIZE];
uint8_t          1729 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma);
uint8_t          2240 drivers/scsi/qla2xxx/qla_bsg.c 	uint8_t domain, area, al_pa, state;
uint8_t           154 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t payload[0]; /* payload for cmd */
uint8_t           168 drivers/scsi/qla2xxx/qla_bsg.h 		uint8_t wwnn[8];
uint8_t           169 drivers/scsi/qla2xxx/qla_bsg.h 		uint8_t wwpn[8];
uint8_t           170 drivers/scsi/qla2xxx/qla_bsg.h 		uint8_t id[4];
uint8_t           197 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t version[MAX_FRU_SIZE];
uint8_t           212 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t status_reg;
uint8_t           213 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t reserved[7];
uint8_t           221 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t  buffer[0x40];
uint8_t           245 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t   reserved[20];
uint8_t           264 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t   status;         /* 1 - enabled, 0 - Disabled */
uint8_t           265 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t   state;          /* 1 - online, 0 - offline */
uint8_t           266 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t   configured_bbscn;       /* 0-15 */
uint8_t           267 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t   negotiated_bbscn;       /* 0-15 */
uint8_t           268 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t   offline_reason_code;
uint8_t           270 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t   reserved[9];
uint8_t           276 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t  unused[62];
uint8_t           285 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t global_image;
uint8_t           286 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t board_config;
uint8_t           287 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t vpd_nvram;
uint8_t           288 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t npiv_config_0_1;
uint8_t           289 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t npiv_config_2_3;
uint8_t           290 drivers/scsi/qla2xxx/qla_bsg.h 	uint8_t reserved[32];
uint8_t           666 drivers/scsi/qla2xxx/qla_dbg.c 	uint8_t que_cnt;
uint8_t           275 drivers/scsi/qla2xxx/qla_dbg.h 	uint8_t signature[4];
uint8_t            39 drivers/scsi/qla2xxx/qla_def.h 	uint8_t domain;
uint8_t            40 drivers/scsi/qla2xxx/qla_def.h 	uint8_t area;
uint8_t            41 drivers/scsi/qla2xxx/qla_def.h 	uint8_t al_pa;
uint8_t            46 drivers/scsi/qla2xxx/qla_def.h 	uint8_t al_pa;
uint8_t            47 drivers/scsi/qla2xxx/qla_def.h 	uint8_t area;
uint8_t            48 drivers/scsi/qla2xxx/qla_def.h 	uint8_t domain;
uint8_t           113 drivers/scsi/qla2xxx/qla_def.h #define LSB(x)	((uint8_t)(x))
uint8_t           114 drivers/scsi/qla2xxx/qla_def.h #define MSB(x)	((uint8_t)((uint16_t)(x) >> 8))
uint8_t           319 drivers/scsi/qla2xxx/qla_def.h 	uint8_t *request_sense_ptr;
uint8_t           346 drivers/scsi/qla2xxx/qla_def.h 		uint8_t domain;
uint8_t           347 drivers/scsi/qla2xxx/qla_def.h 		uint8_t area;
uint8_t           348 drivers/scsi/qla2xxx/qla_def.h 		uint8_t al_pa;
uint8_t           350 drivers/scsi/qla2xxx/qla_def.h 		uint8_t al_pa;
uint8_t           351 drivers/scsi/qla2xxx/qla_def.h 		uint8_t area;
uint8_t           352 drivers/scsi/qla2xxx/qla_def.h 		uint8_t domain;
uint8_t           356 drivers/scsi/qla2xxx/qla_def.h 		uint8_t rsvd_1;
uint8_t           407 drivers/scsi/qla2xxx/qla_def.h 	uint8_t opcode;
uint8_t           408 drivers/scsi/qla2xxx/qla_def.h 	uint8_t rsvd[3];
uint8_t           409 drivers/scsi/qla2xxx/qla_def.h 	uint8_t s_id[3];
uint8_t           410 drivers/scsi/qla2xxx/qla_def.h 	uint8_t rsvd1[1];
uint8_t           411 drivers/scsi/qla2xxx/qla_def.h 	uint8_t wwpn[WWN_SIZE];
uint8_t           415 drivers/scsi/qla2xxx/qla_def.h 	uint8_t opcode;
uint8_t           416 drivers/scsi/qla2xxx/qla_def.h 	uint8_t rsvd[3];
uint8_t           417 drivers/scsi/qla2xxx/qla_def.h 	uint8_t data[112];
uint8_t           491 drivers/scsi/qla2xxx/qla_def.h 			uint8_t flags;
uint8_t           508 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved_1;
uint8_t           533 drivers/scsi/qla2xxx/qla_def.h 			uint8_t	aen_op;
uint8_t           592 drivers/scsi/qla2xxx/qla_def.h 	uint8_t cmd_type;
uint8_t           593 drivers/scsi/qla2xxx/qla_def.h 	uint8_t pad[3];
uint8_t           944 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		flags;
uint8_t           957 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		flags;
uint8_t          1302 drivers/scsi/qla2xxx/qla_def.h 	uint8_t options;
uint8_t          1303 drivers/scsi/qla2xxx/qla_def.h 	uint8_t control;
uint8_t          1304 drivers/scsi/qla2xxx/qla_def.h 	uint8_t master_state;
uint8_t          1305 drivers/scsi/qla2xxx/qla_def.h 	uint8_t slave_state;
uint8_t          1306 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved[2];
uint8_t          1307 drivers/scsi/qla2xxx/qla_def.h 	uint8_t hard_address;
uint8_t          1308 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved_1;
uint8_t          1309 drivers/scsi/qla2xxx/qla_def.h 	uint8_t port_id[4];
uint8_t          1310 drivers/scsi/qla2xxx/qla_def.h 	uint8_t node_name[WWN_SIZE];
uint8_t          1311 drivers/scsi/qla2xxx/qla_def.h 	uint8_t port_name[WWN_SIZE];
uint8_t          1314 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reset_count;
uint8_t          1315 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved_2;
uint8_t          1325 drivers/scsi/qla2xxx/qla_def.h 	uint8_t recipient;
uint8_t          1326 drivers/scsi/qla2xxx/qla_def.h 	uint8_t initiator;
uint8_t          1338 drivers/scsi/qla2xxx/qla_def.h 	uint8_t prli_svc_param_word_0[2];	/* Big endian */
uint8_t          1340 drivers/scsi/qla2xxx/qla_def.h 	uint8_t prli_svc_param_word_3[2];	/* Big endian */
uint8_t          1374 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  version;
uint8_t          1375 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  reserved_1;
uint8_t          1396 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  firmware_options[2];
uint8_t          1401 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  retry_count;
uint8_t          1402 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 retry_delay;			/* unused */
uint8_t          1403 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 port_name[WWN_SIZE];		/* Big endian. */
uint8_t          1405 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 inquiry_data;
uint8_t          1406 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 login_timeout;
uint8_t          1407 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 node_name[WWN_SIZE];		/* Big endian. */
uint8_t          1417 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  command_resource_count;
uint8_t          1418 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  immediate_notify_resource_count;
uint8_t          1420 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  reserved_2[2];
uint8_t          1441 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 add_firmware_options[2];
uint8_t          1443 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 response_accumulation_timer;
uint8_t          1444 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 interrupt_delay_timer;
uint8_t          1465 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 special_options[2];
uint8_t          1467 drivers/scsi/qla2xxx/qla_def.h 	uint8_t  reserved_3[26];
uint8_t          1538 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	id[4];
uint8_t          1539 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	nvram_version;
uint8_t          1540 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	reserved_0;
uint8_t          1545 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	parameter_block_version;
uint8_t          1546 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	reserved_1;
uint8_t          1567 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 firmware_options[2];
uint8_t          1572 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 retry_count;
uint8_t          1573 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 retry_delay;			/* unused */
uint8_t          1574 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 port_name[WWN_SIZE];		/* Big endian. */
uint8_t          1576 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 inquiry_data;
uint8_t          1577 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 login_timeout;
uint8_t          1578 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 node_name[WWN_SIZE];		/* Big endian. */
uint8_t          1599 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 add_firmware_options[2];
uint8_t          1601 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 response_accumulation_timer;
uint8_t          1602 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 interrupt_delay_timer;
uint8_t          1623 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 special_options[2];
uint8_t          1626 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved_2[22];
uint8_t          1665 drivers/scsi/qla2xxx/qla_def.h 	uint8_t seriallink_options[4];
uint8_t          1688 drivers/scsi/qla2xxx/qla_def.h 	uint8_t host_p[2];
uint8_t          1690 drivers/scsi/qla2xxx/qla_def.h 	uint8_t boot_node_name[WWN_SIZE];
uint8_t          1691 drivers/scsi/qla2xxx/qla_def.h 	uint8_t boot_lun_number;
uint8_t          1692 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reset_delay;
uint8_t          1693 drivers/scsi/qla2xxx/qla_def.h 	uint8_t port_down_retry_count;
uint8_t          1694 drivers/scsi/qla2xxx/qla_def.h 	uint8_t boot_id_number;
uint8_t          1696 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fcode_boot_port_name[WWN_SIZE];
uint8_t          1697 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alternate_port_name[WWN_SIZE];
uint8_t          1698 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alternate_node_name[WWN_SIZE];
uint8_t          1710 drivers/scsi/qla2xxx/qla_def.h 	uint8_t efi_parameters;
uint8_t          1712 drivers/scsi/qla2xxx/qla_def.h 	uint8_t link_down_timeout;
uint8_t          1714 drivers/scsi/qla2xxx/qla_def.h 	uint8_t adapter_id[16];
uint8_t          1716 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alt1_boot_node_name[WWN_SIZE];
uint8_t          1718 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alt2_boot_node_name[WWN_SIZE];
uint8_t          1720 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alt3_boot_node_name[WWN_SIZE];
uint8_t          1722 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alt4_boot_node_name[WWN_SIZE];
uint8_t          1724 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alt5_boot_node_name[WWN_SIZE];
uint8_t          1726 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alt6_boot_node_name[WWN_SIZE];
uint8_t          1728 drivers/scsi/qla2xxx/qla_def.h 	uint8_t alt7_boot_node_name[WWN_SIZE];
uint8_t          1731 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved_3[2];
uint8_t          1734 drivers/scsi/qla2xxx/qla_def.h 	uint8_t model_number[16];
uint8_t          1737 drivers/scsi/qla2xxx/qla_def.h 	uint8_t oem_specific[16];
uint8_t          1760 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	adapter_features[2];
uint8_t          1762 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved_4[16];
uint8_t          1770 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 reserved_5;
uint8_t          1771 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 checksum;
uint8_t          1778 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_type;		/* Entry type. */
uint8_t          1779 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_count;		/* Entry count. */
uint8_t          1780 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		sys_define;		/* System defined. */
uint8_t          1781 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_status;		/* Entry Status. */
uint8_t          1783 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		data[52];
uint8_t          1792 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_type;		/* Entry type. */
uint8_t          1793 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_count;		/* Entry count. */
uint8_t          1795 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		data[56];
uint8_t          1803 drivers/scsi/qla2xxx/qla_def.h 		uint8_t reserved;
uint8_t          1804 drivers/scsi/qla2xxx/qla_def.h 		uint8_t standard;
uint8_t          1813 drivers/scsi/qla2xxx/qla_def.h 		to.id.standard = (uint8_t)from;		\
uint8_t          1821 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1822 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1823 drivers/scsi/qla2xxx/qla_def.h 	uint8_t sys_define;		/* System defined. */
uint8_t          1824 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1837 drivers/scsi/qla2xxx/qla_def.h 	uint8_t scsi_cdb[MAX_CMDSZ]; 	/* SCSI command words. */
uint8_t          1850 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1851 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1852 drivers/scsi/qla2xxx/qla_def.h 	uint8_t sys_define;		/* System defined. */
uint8_t          1853 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1861 drivers/scsi/qla2xxx/qla_def.h 	uint8_t scsi_cdb[MAX_CMDSZ];	/* SCSI command words. */
uint8_t          1871 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1872 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1873 drivers/scsi/qla2xxx/qla_def.h 	uint8_t sys_define;		/* System defined. */
uint8_t          1874 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1884 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1885 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1886 drivers/scsi/qla2xxx/qla_def.h 	uint8_t sys_define;		/* System defined. */
uint8_t          1887 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1917 drivers/scsi/qla2xxx/qla_def.h 	uint8_t ref_tag_mask[4];	/* Validation/Replacement Mask*/
uint8_t          1918 drivers/scsi/qla2xxx/qla_def.h 	uint8_t app_tag_mask[2];	/* Validation/Replacement Mask*/
uint8_t          1970 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1971 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1972 drivers/scsi/qla2xxx/qla_def.h 	uint8_t sys_define;		/* System defined. */
uint8_t          1973 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1982 drivers/scsi/qla2xxx/qla_def.h 	uint8_t rsp_info[8];		/* FCP response information. */
uint8_t          1983 drivers/scsi/qla2xxx/qla_def.h 	uint8_t req_sense_data[32];	/* Request sense data. */
uint8_t          2061 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          2062 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          2063 drivers/scsi/qla2xxx/qla_def.h 	uint8_t sys_define;		/* System defined. */
uint8_t          2064 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          2065 drivers/scsi/qla2xxx/qla_def.h 	uint8_t data[60];		/* data */
uint8_t          2074 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          2075 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          2076 drivers/scsi/qla2xxx/qla_def.h 	uint8_t handle_count;		/* Handle count. */
uint8_t          2077 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          2087 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          2088 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          2089 drivers/scsi/qla2xxx/qla_def.h 	uint8_t handle_count;		/* Handle count. */
uint8_t          2090 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          2099 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          2100 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          2101 drivers/scsi/qla2xxx/qla_def.h 	uint8_t handle_count;		/* Handle count. */
uint8_t          2102 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          2105 drivers/scsi/qla2xxx/qla_def.h 	uint8_t modifier;		/* Modifier (7-0). */
uint8_t          2112 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved_1;
uint8_t          2115 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved_2[48];
uint8_t          2123 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          2124 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          2125 drivers/scsi/qla2xxx/qla_def.h 	uint8_t handle_count;		/* Handle count. */
uint8_t          2126 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          2135 drivers/scsi/qla2xxx/qla_def.h 	uint8_t type;
uint8_t          2136 drivers/scsi/qla2xxx/qla_def.h 	uint8_t r_ctl;
uint8_t          2152 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_type;
uint8_t          2153 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_count;
uint8_t          2154 drivers/scsi/qla2xxx/qla_def.h 	uint8_t sys_define1;
uint8_t          2164 drivers/scsi/qla2xxx/qla_def.h 	uint8_t entry_status;
uint8_t          2184 drivers/scsi/qla2xxx/qla_def.h 	uint8_t node_name[WWN_SIZE];
uint8_t          2185 drivers/scsi/qla2xxx/qla_def.h 	uint8_t port_name[WWN_SIZE];
uint8_t          2198 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 entry_type;		    /* Entry type. */
uint8_t          2199 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 entry_count;		    /* Entry count. */
uint8_t          2200 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 sys_define;		    /* System defined. */
uint8_t          2201 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	 entry_status;		    /* Entry Status. */
uint8_t          2207 drivers/scsi/qla2xxx/qla_def.h 			uint8_t  target_id;
uint8_t          2208 drivers/scsi/qla2xxx/qla_def.h 			uint8_t  reserved_1;
uint8_t          2220 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved_2[28];
uint8_t          2231 drivers/scsi/qla2xxx/qla_def.h 			uint8_t  status_subcode;
uint8_t          2232 drivers/scsi/qla2xxx/qla_def.h 			uint8_t  fw_handle;
uint8_t          2239 drivers/scsi/qla2xxx/qla_def.h 					uint8_t node_name[8];
uint8_t          2244 drivers/scsi/qla2xxx/qla_def.h 					uint8_t resv0[6];
uint8_t          2247 drivers/scsi/qla2xxx/qla_def.h 					uint8_t port_id[3];
uint8_t          2248 drivers/scsi/qla2xxx/qla_def.h 					uint8_t resv1;
uint8_t          2253 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2254 drivers/scsi/qla2xxx/qla_def.h 			uint8_t resv3[3];
uint8_t          2255 drivers/scsi/qla2xxx/qla_def.h 			uint8_t  vp_index;
uint8_t          2257 drivers/scsi/qla2xxx/qla_def.h 			uint8_t  port_id[3];
uint8_t          2258 drivers/scsi/qla2xxx/qla_def.h 			uint8_t  reserved_6;
uint8_t          2279 drivers/scsi/qla2xxx/qla_def.h 	uint8_t node_name[WWN_SIZE];
uint8_t          2280 drivers/scsi/qla2xxx/qla_def.h 	uint8_t port_name[WWN_SIZE];
uint8_t          2281 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fabric_port_name[WWN_SIZE];
uint8_t          2283 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fc4_type;
uint8_t          2284 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fc4f_nvme;	/* nvme fc4 feature bits */
uint8_t          2295 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_type;
uint8_t          2296 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_count;
uint8_t          2297 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		sys_define1;
uint8_t          2298 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		entry_status;
uint8_t          2384 drivers/scsi/qla2xxx/qla_def.h 	uint8_t node_name[WWN_SIZE];
uint8_t          2385 drivers/scsi/qla2xxx/qla_def.h 	uint8_t port_name[WWN_SIZE];
uint8_t          2414 drivers/scsi/qla2xxx/qla_def.h 	uint8_t nvme_flag;
uint8_t          2439 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fcp_prio;
uint8_t          2441 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fabric_port_name[WWN_SIZE];
uint8_t          2454 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fc4_type;
uint8_t          2455 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	fc4f_nvme;
uint8_t          2456 drivers/scsi/qla2xxx/qla_def.h 	uint8_t scan_state;
uint8_t          2634 drivers/scsi/qla2xxx/qla_def.h 		uint8_t node_name[WWN_SIZE];
uint8_t          2635 drivers/scsi/qla2xxx/qla_def.h 		uint8_t manufacturer[64];
uint8_t          2636 drivers/scsi/qla2xxx/qla_def.h 		uint8_t serial_num[32];
uint8_t          2637 drivers/scsi/qla2xxx/qla_def.h 		uint8_t model[16+1];
uint8_t          2638 drivers/scsi/qla2xxx/qla_def.h 		uint8_t model_desc[80];
uint8_t          2639 drivers/scsi/qla2xxx/qla_def.h 		uint8_t hw_version[32];
uint8_t          2640 drivers/scsi/qla2xxx/qla_def.h 		uint8_t driver_version[32];
uint8_t          2641 drivers/scsi/qla2xxx/qla_def.h 		uint8_t orom_version[16];
uint8_t          2642 drivers/scsi/qla2xxx/qla_def.h 		uint8_t fw_version[32];
uint8_t          2643 drivers/scsi/qla2xxx/qla_def.h 		uint8_t os_version[128];
uint8_t          2657 drivers/scsi/qla2xxx/qla_def.h 		uint8_t node_name[WWN_SIZE];
uint8_t          2658 drivers/scsi/qla2xxx/qla_def.h 		uint8_t manufacturer[64];
uint8_t          2659 drivers/scsi/qla2xxx/qla_def.h 		uint8_t serial_num[32];
uint8_t          2660 drivers/scsi/qla2xxx/qla_def.h 		uint8_t model[16+1];
uint8_t          2661 drivers/scsi/qla2xxx/qla_def.h 		uint8_t model_desc[80];
uint8_t          2662 drivers/scsi/qla2xxx/qla_def.h 		uint8_t hw_version[16];
uint8_t          2663 drivers/scsi/qla2xxx/qla_def.h 		uint8_t driver_version[32];
uint8_t          2664 drivers/scsi/qla2xxx/qla_def.h 		uint8_t orom_version[16];
uint8_t          2665 drivers/scsi/qla2xxx/qla_def.h 		uint8_t fw_version[32];
uint8_t          2666 drivers/scsi/qla2xxx/qla_def.h 		uint8_t os_version[128];
uint8_t          2668 drivers/scsi/qla2xxx/qla_def.h 		uint8_t sym_name[256];
uint8_t          2671 drivers/scsi/qla2xxx/qla_def.h 		uint8_t fabric_name[WWN_SIZE];
uint8_t          2672 drivers/scsi/qla2xxx/qla_def.h 		uint8_t bios_name[32];
uint8_t          2673 drivers/scsi/qla2xxx/qla_def.h 		uint8_t vendor_identifier[8];
uint8_t          2722 drivers/scsi/qla2xxx/qla_def.h 		uint8_t fc4_types[32];
uint8_t          2726 drivers/scsi/qla2xxx/qla_def.h 		uint8_t os_dev_name[32];
uint8_t          2727 drivers/scsi/qla2xxx/qla_def.h 		uint8_t host_name[256];
uint8_t          2728 drivers/scsi/qla2xxx/qla_def.h 		uint8_t node_name[WWN_SIZE];
uint8_t          2729 drivers/scsi/qla2xxx/qla_def.h 		uint8_t port_name[WWN_SIZE];
uint8_t          2730 drivers/scsi/qla2xxx/qla_def.h 		uint8_t port_sym_name[128];
uint8_t          2733 drivers/scsi/qla2xxx/qla_def.h 		uint8_t fabric_name[WWN_SIZE];
uint8_t          2734 drivers/scsi/qla2xxx/qla_def.h 		uint8_t port_fc4_type[32];
uint8_t          2753 drivers/scsi/qla2xxx/qla_def.h 		uint8_t fc4_types[32];
uint8_t          2757 drivers/scsi/qla2xxx/qla_def.h 		uint8_t os_dev_name[32];
uint8_t          2758 drivers/scsi/qla2xxx/qla_def.h 		uint8_t host_name[256];
uint8_t          2792 drivers/scsi/qla2xxx/qla_def.h 	uint8_t revision;
uint8_t          2793 drivers/scsi/qla2xxx/qla_def.h 	uint8_t in_id[3];
uint8_t          2794 drivers/scsi/qla2xxx/qla_def.h 	uint8_t gs_type;
uint8_t          2795 drivers/scsi/qla2xxx/qla_def.h 	uint8_t gs_subtype;
uint8_t          2796 drivers/scsi/qla2xxx/qla_def.h 	uint8_t options;
uint8_t          2797 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved;
uint8_t          2805 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fragment_id;
uint8_t          2806 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved[3];
uint8_t          2811 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2816 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2817 drivers/scsi/qla2xxx/qla_def.h 			uint8_t domain;
uint8_t          2818 drivers/scsi/qla2xxx/qla_def.h 			uint8_t area;
uint8_t          2819 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_type;
uint8_t          2823 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_type;
uint8_t          2824 drivers/scsi/qla2xxx/qla_def.h 			uint8_t domain;
uint8_t          2825 drivers/scsi/qla2xxx/qla_def.h 			uint8_t area;
uint8_t          2826 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2830 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2832 drivers/scsi/qla2xxx/qla_def.h 			uint8_t fc4_types[32];
uint8_t          2836 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2839 drivers/scsi/qla2xxx/qla_def.h 			uint8_t fc4_feature;
uint8_t          2840 drivers/scsi/qla2xxx/qla_def.h 			uint8_t fc4_type;
uint8_t          2844 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2846 drivers/scsi/qla2xxx/qla_def.h 			uint8_t node_name[8];
uint8_t          2850 drivers/scsi/qla2xxx/qla_def.h 			uint8_t node_name[8];
uint8_t          2851 drivers/scsi/qla2xxx/qla_def.h 			uint8_t name_len;
uint8_t          2852 drivers/scsi/qla2xxx/qla_def.h 			uint8_t sym_node_name[255];
uint8_t          2856 drivers/scsi/qla2xxx/qla_def.h 			uint8_t hba_identifier[8];
uint8_t          2860 drivers/scsi/qla2xxx/qla_def.h 			uint8_t hba_identifier[8];
uint8_t          2862 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2867 drivers/scsi/qla2xxx/qla_def.h 			uint8_t hba_identifier[8];
uint8_t          2869 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2874 drivers/scsi/qla2xxx/qla_def.h 			uint8_t hba_identifier[8];
uint8_t          2879 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2884 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2889 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2893 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2897 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2901 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2905 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2909 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2910 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_id[3];
uint8_t          2914 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2924 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fragment_id;
uint8_t          2925 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reason_code;
uint8_t          2926 drivers/scsi/qla2xxx/qla_def.h 	uint8_t explanation_code;
uint8_t          2927 drivers/scsi/qla2xxx/qla_def.h 	uint8_t vendor_unique;
uint8_t          2931 drivers/scsi/qla2xxx/qla_def.h 	uint8_t control_byte;
uint8_t          2941 drivers/scsi/qla2xxx/qla_def.h 		uint8_t fragment_id;
uint8_t          2942 drivers/scsi/qla2xxx/qla_def.h 		uint8_t reason_code;
uint8_t          2943 drivers/scsi/qla2xxx/qla_def.h 		uint8_t explanation_code;
uint8_t          2944 drivers/scsi/qla2xxx/qla_def.h 		uint8_t vendor_unique;
uint8_t          2961 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_type;
uint8_t          2963 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2964 drivers/scsi/qla2xxx/qla_def.h 			uint8_t sym_port_name_len;
uint8_t          2965 drivers/scsi/qla2xxx/qla_def.h 			uint8_t sym_port_name[255];
uint8_t          2966 drivers/scsi/qla2xxx/qla_def.h 			uint8_t node_name[8];
uint8_t          2967 drivers/scsi/qla2xxx/qla_def.h 			uint8_t sym_node_name_len;
uint8_t          2968 drivers/scsi/qla2xxx/qla_def.h 			uint8_t sym_node_name[255];
uint8_t          2969 drivers/scsi/qla2xxx/qla_def.h 			uint8_t init_proc_assoc[8];
uint8_t          2970 drivers/scsi/qla2xxx/qla_def.h 			uint8_t node_ip_addr[16];
uint8_t          2971 drivers/scsi/qla2xxx/qla_def.h 			uint8_t class_of_service[4];
uint8_t          2972 drivers/scsi/qla2xxx/qla_def.h 			uint8_t fc4_types[32];
uint8_t          2973 drivers/scsi/qla2xxx/qla_def.h 			uint8_t ip_address[16];
uint8_t          2974 drivers/scsi/qla2xxx/qla_def.h 			uint8_t fabric_port_name[8];
uint8_t          2975 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          2976 drivers/scsi/qla2xxx/qla_def.h 			uint8_t hard_address[3];
uint8_t          2986 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          2990 drivers/scsi/qla2xxx/qla_def.h 			uint8_t node_name[8];
uint8_t          2994 drivers/scsi/qla2xxx/qla_def.h 			uint8_t fc4_types[32];
uint8_t          2999 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          3004 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_name[8];
uint8_t          3015 drivers/scsi/qla2xxx/qla_def.h 			uint8_t fc4_features[128];
uint8_t          3018 drivers/scsi/qla2xxx/qla_def.h 			uint8_t reserved;
uint8_t          3019 drivers/scsi/qla2xxx/qla_def.h 			uint8_t port_id[3];
uint8_t          3107 drivers/scsi/qla2xxx/qla_def.h 			uint8_t param[36];
uint8_t          3110 drivers/scsi/qla2xxx/qla_def.h 		uint8_t rft_data[RFT_ID_SNS_DATA_SIZE];
uint8_t          3111 drivers/scsi/qla2xxx/qla_def.h 		uint8_t rnn_data[RNN_ID_SNS_DATA_SIZE];
uint8_t          3112 drivers/scsi/qla2xxx/qla_def.h 		uint8_t gan_data[GA_NXT_SNS_DATA_SIZE];
uint8_t          3113 drivers/scsi/qla2xxx/qla_def.h 		uint8_t gid_data[GID_PT_SNS_DATA_SIZE];
uint8_t          3114 drivers/scsi/qla2xxx/qla_def.h 		uint8_t gpn_data[GPN_ID_SNS_DATA_SIZE];
uint8_t          3115 drivers/scsi/qla2xxx/qla_def.h 		uint8_t gnn_data[GNN_ID_SNS_DATA_SIZE];
uint8_t          3127 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	al_pa;
uint8_t          3128 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	area;
uint8_t          3129 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	domain;
uint8_t          3130 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	loop_id_2100;	/* ISP2100/ISP2200 -- 4 bytes. */
uint8_t          3137 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		port_name[WWN_SIZE];
uint8_t          3138 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		node_name[WWN_SIZE];
uint8_t          3142 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		port_id[3];
uint8_t          3147 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	port_name[WWN_SIZE];
uint8_t          3148 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	node_name[WWN_SIZE];
uint8_t          3189 drivers/scsi/qla2xxx/qla_def.h 	int (*fabric_login) (struct scsi_qla_host *, uint16_t, uint8_t,
uint8_t          3190 drivers/scsi/qla2xxx/qla_def.h 		uint8_t, uint8_t, uint16_t *, uint8_t);
uint8_t          3191 drivers/scsi/qla2xxx/qla_def.h 	int (*fabric_logout) (struct scsi_qla_host *, uint16_t, uint8_t,
uint8_t          3192 drivers/scsi/qla2xxx/qla_def.h 	    uint8_t, uint8_t);
uint8_t          3200 drivers/scsi/qla2xxx/qla_def.h 	uint8_t *(*read_nvram)(struct scsi_qla_host *, void *,
uint8_t          3400 drivers/scsi/qla2xxx/qla_def.h 	uint8_t *ctx_dsd_alloced;
uint8_t          3458 drivers/scsi/qla2xxx/qla_def.h 	uint8_t rsp_pkt[REQUEST_ENTRY_SIZE];
uint8_t          3487 drivers/scsi/qla2xxx/qla_def.h 	uint8_t req_pkt[REQUEST_ENTRY_SIZE];
uint8_t          3574 drivers/scsi/qla2xxx/qla_def.h 	uint8_t saved_firmware_options[2];
uint8_t          3575 drivers/scsi/qla2xxx/qla_def.h 	uint8_t saved_add_firmware_options[2];
uint8_t          3577 drivers/scsi/qla2xxx/qla_def.h 	uint8_t tgt_node_name[WWN_SIZE];
uint8_t          3704 drivers/scsi/qla2xxx/qla_def.h 	uint8_t         mqenable;
uint8_t          3712 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	max_req_queues;
uint8_t          3713 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	max_rsp_queues;
uint8_t          3714 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		max_qpairs;
uint8_t          3715 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		num_qpairs;
uint8_t          3726 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		port_no;		/* Physical port of adapter */
uint8_t          3727 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		exch_starvation;
uint8_t          3730 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	loop_down_abort_time;    /* port down timer */
uint8_t          3732 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		link_down_timeout;       /* link down timeout */
uint8_t          3752 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		current_topology;
uint8_t          3753 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		prev_topology;
uint8_t          3759 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		operating_mode;         /* F/W operating mode */
uint8_t          3764 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		interrupts_on;
uint8_t          3912 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		serial0;
uint8_t          3913 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		serial1;
uint8_t          3914 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		serial2;
uint8_t          3927 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		retry_count;
uint8_t          3928 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		login_timeout;
uint8_t          3931 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		mbx_count;
uint8_t          3932 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		aen_mbx_count;
uint8_t          3965 drivers/scsi/qla2xxx/qla_def.h 	uint8_t dpc_active;                  /* DPC routine is active */
uint8_t          4064 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		fw_seriallink_options[4];
uint8_t          4067 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		serdes_version[3];
uint8_t          4068 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		mpi_version[3];
uint8_t          4070 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		phy_version[3];
uint8_t          4071 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		pep_version[3];
uint8_t          4121 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		model_number[16+1];
uint8_t          4123 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		adapter_id[16+1];
uint8_t          4140 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	bios_revision[2];
uint8_t          4141 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	efi_revision[2];
uint8_t          4142 drivers/scsi/qla2xxx/qla_def.h 	uint8_t 	fcode_revision[16];
uint8_t          4183 drivers/scsi/qla2xxx/qla_def.h 	uint8_t         active_image;
uint8_t          4187 drivers/scsi/qla2xxx/qla_def.h 	uint8_t         beacon_color_state;
uint8_t          4244 drivers/scsi/qla2xxx/qla_def.h 	uint8_t fw_type;
uint8_t          4308 drivers/scsi/qla2xxx/qla_def.h 	uint8_t global;
uint8_t          4310 drivers/scsi/qla2xxx/qla_def.h 		uint8_t board_config;
uint8_t          4311 drivers/scsi/qla2xxx/qla_def.h 		uint8_t vpd_nvram;
uint8_t          4312 drivers/scsi/qla2xxx/qla_def.h 		uint8_t npiv_config_0_1;
uint8_t          4313 drivers/scsi/qla2xxx/qla_def.h 		uint8_t npiv_config_2_3;
uint8_t          4340 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		host_str[16];
uint8_t          4428 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		marker_needed;
uint8_t          4434 drivers/scsi/qla2xxx/qla_def.h 	uint8_t         loop_down_abort_time;    /* port down timer */
uint8_t          4436 drivers/scsi/qla2xxx/qla_def.h 	uint8_t         link_down_timeout;       /* link down timeout */
uint8_t          4441 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		node_name[WWN_SIZE];
uint8_t          4442 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		port_name[WWN_SIZE];
uint8_t          4443 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		fabric_node_name[WWN_SIZE];
uint8_t          4450 drivers/scsi/qla2xxx/qla_def.h 	uint8_t		fcoe_vn_port_mac[6];
uint8_t          4519 drivers/scsi/qla2xxx/qla_def.h 	uint8_t min_supported_speed;
uint8_t          4520 drivers/scsi/qla2xxx/qla_def.h 	uint8_t n2n_node_name[WWN_SIZE];
uint8_t          4521 drivers/scsi/qla2xxx/qla_def.h 	uint8_t n2n_port_name[WWN_SIZE];
uint8_t          4530 drivers/scsi/qla2xxx/qla_def.h 	uint8_t image_status_mask;
uint8_t          4532 drivers/scsi/qla2xxx/qla_def.h 	uint8_t ver_major;
uint8_t          4533 drivers/scsi/qla2xxx/qla_def.h 	uint8_t ver_minor;
uint8_t          4534 drivers/scsi/qla2xxx/qla_def.h 	uint8_t bitmap;		/* 28xx only */
uint8_t          4535 drivers/scsi/qla2xxx/qla_def.h 	uint8_t reserved[2];
uint8_t          4551 drivers/scsi/qla2xxx/qla_def.h 	uint8_t	idx;
uint8_t            51 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t current_login_state;
uint8_t            52 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t last_login_state;
uint8_t            62 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t hard_address[3];
uint8_t            63 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_1;
uint8_t            65 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];
uint8_t            66 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sequence_id;
uint8_t            75 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prli_svc_param_word_0[2];	/* Big endian */
uint8_t            77 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prli_svc_param_word_3[2];	/* Big endian */
uint8_t            80 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];
uint8_t            81 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];
uint8_t            83 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_3[4];
uint8_t            87 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_4[14];
uint8_t           123 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  options;
uint8_t           124 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  id;
uint8_t           125 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  port_name[WWN_SIZE];
uint8_t           126 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  node_name[WWN_SIZE];
uint8_t           133 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t id[4];
uint8_t           145 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];
uint8_t           146 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];
uint8_t           220 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alternate_port_name[WWN_SIZE];
uint8_t           221 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alternate_node_name[WWN_SIZE];
uint8_t           223 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t boot_port_name[WWN_SIZE];
uint8_t           227 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alt1_boot_port_name[WWN_SIZE];
uint8_t           231 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alt2_boot_port_name[WWN_SIZE];
uint8_t           235 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alt3_boot_port_name[WWN_SIZE];
uint8_t           251 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reset_delay;
uint8_t           252 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_12;
uint8_t           270 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prev_drv_ver_major;
uint8_t           271 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prev_drv_ver_submajob;
uint8_t           272 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prev_drv_ver_minor;
uint8_t           273 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prev_drv_ver_subminor;
uint8_t           282 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prev_fw_ver_minor;
uint8_t           283 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prev_fw_ver_subminor;
uint8_t           297 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t model_name[16];
uint8_t           327 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];		/* Big endian. */
uint8_t           328 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];		/* Big endian. */
uint8_t           350 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_2[4];
uint8_t           428 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  reserved_3[20];
uint8_t           436 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           437 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           438 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined */
uint8_t           439 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry status. */
uint8_t           465 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];			/* PortID of destination port.*/
uint8_t           466 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           473 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           474 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           475 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined. */
uint8_t           476 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           503 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];		/* PortID of destination port. */
uint8_t           504 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           511 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           512 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           513 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined. */
uint8_t           514 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           537 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t task;
uint8_t           544 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t crn;
uint8_t           546 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t fcp_cdb[MAX_CMDSZ]; 	/* SCSI command words. */
uint8_t           549 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];		/* PortID of destination port. */
uint8_t           550 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           558 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           559 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           560 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined. */
uint8_t           561 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           583 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];		/* PortID of destination port. */
uint8_t           584 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           597 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           598 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           599 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined. */
uint8_t           600 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           630 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t data[28];	/* FCP rsp/sense information */
uint8_t           633 drivers/scsi/qla2xxx/qla_fw.h 		uint8_t nvme_ersp_data[32];
uint8_t           665 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           666 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           667 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t handle_count;		/* Handle count. */
uint8_t           668 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           674 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t modifier;		/* Modifier (7-0). */
uint8_t           678 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_1;
uint8_t           680 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_2;
uint8_t           681 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           685 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t lun[8];			/* FCP LUN (BE). */
uint8_t           686 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_4[40];
uint8_t           694 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           695 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           696 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System Defined. */
uint8_t           697 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           707 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           708 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_1;
uint8_t           715 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_3[10];
uint8_t           728 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           729 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           730 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System Defined. */
uint8_t           731 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           741 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           742 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sof_type;
uint8_t           749 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t opcode;
uint8_t           750 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_2;
uint8_t           752 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];
uint8_t           753 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t s_id[3];
uint8_t           774 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           775 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           776 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System Defined. */
uint8_t           777 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           787 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           788 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sof_type;
uint8_t           793 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t opcode;
uint8_t           794 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_3;
uint8_t           796 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];
uint8_t           797 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_4;
uint8_t           811 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           812 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           813 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t handle_count;		/* Handle count. */
uint8_t           814 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           824 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           825 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           826 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined. */
uint8_t           827 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           858 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           859 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_1;
uint8_t           861 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];		/* PortID of destination port. */
uint8_t           863 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t rsp_size;		/* Response size in 32bit words. */
uint8_t           886 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           887 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           888 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t handle_count;		/* Handle count. */
uint8_t           889 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           911 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_2[20];
uint8_t           913 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];		/* PortID of destination port. */
uint8_t           914 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           916 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_3[12];
uint8_t           921 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           922 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           923 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t handle_count;		/* Handle count. */
uint8_t           924 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           937 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_1[30];
uint8_t           939 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];		/* PortID of destination port. */
uint8_t           940 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index;
uint8_t           942 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_2[12];
uint8_t          1205 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t options;
uint8_t          1207 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t hard_address;
uint8_t          1209 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];
uint8_t          1210 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];
uint8_t          1229 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t options;
uint8_t          1230 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t hard_address;
uint8_t          1232 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];
uint8_t          1233 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];
uint8_t          1235 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];
uint8_t          1236 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_1;
uint8_t          1244 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1245 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1246 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined. */
uint8_t          1247 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1267 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_idx_map[16];
uint8_t          1272 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_5[24];
uint8_t          1280 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1281 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1282 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t handle_count;
uint8_t          1283 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1299 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t command;
uint8_t          1303 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_count;
uint8_t          1305 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index1;
uint8_t          1306 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_index2;
uint8_t          1308 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t options_idx1;
uint8_t          1309 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t hard_address_idx1;
uint8_t          1311 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name_idx1[WWN_SIZE];
uint8_t          1312 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name_idx1[WWN_SIZE];
uint8_t          1314 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t options_idx2;
uint8_t          1315 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t hard_address_idx2;
uint8_t          1317 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name_idx2[WWN_SIZE];
uint8_t          1318 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name_idx2[WWN_SIZE];
uint8_t          1322 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_5[2];
uint8_t          1344 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;		/* Entry type. */
uint8_t          1345 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;		/* Entry count. */
uint8_t          1346 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_define;		/* System defined. */
uint8_t          1347 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t          1349 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_acquired;
uint8_t          1350 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_setup;
uint8_t          1351 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_idx;		/* Format 0=reserved */
uint8_t          1352 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t vp_status;	/* Format 0=reserved */
uint8_t          1354 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_id[3];
uint8_t          1355 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t format;
uint8_t          1359 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t vp_idx_map[16];
uint8_t          1360 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t reserved_4[32];
uint8_t          1364 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t vpstat1_subcode; /* vp_status=1 subcode */
uint8_t          1365 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t flags;
uint8_t          1372 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t rsv2[12];
uint8_t          1374 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t ls_rjt_vendor;
uint8_t          1375 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t ls_rjt_explanation;
uint8_t          1376 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t ls_rjt_reason;
uint8_t          1377 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t rsv3[5];
uint8_t          1379 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t port_name[8];
uint8_t          1380 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t node_name[8];
uint8_t          1382 drivers/scsi/qla2xxx/qla_fw.h 			uint8_t reserved_5[6];
uint8_t          1385 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t vpstat1_subcode;
uint8_t          1386 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t flags;
uint8_t          1388 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t rsv2[12];
uint8_t          1390 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t ls_rjt_vendor;
uint8_t          1391 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t ls_rjt_explanation;
uint8_t          1392 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t ls_rjt_reason;
uint8_t          1393 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t rsv3[5];
uint8_t          1395 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t port_name[8];
uint8_t          1396 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t node_name[8];
uint8_t          1397 drivers/scsi/qla2xxx/qla_fw.h 		    uint8_t remote_nport_id[4];
uint8_t          1405 drivers/scsi/qla2xxx/qla_fw.h         uint8_t entry_type;             /* Entry type. */
uint8_t          1406 drivers/scsi/qla2xxx/qla_fw.h         uint8_t entry_count;            /* Entry count. */
uint8_t          1407 drivers/scsi/qla2xxx/qla_fw.h         uint8_t sys_define;             /* System defined. */
uint8_t          1408 drivers/scsi/qla2xxx/qla_fw.h         uint8_t entry_status;           /* Entry Status. */
uint8_t          1433 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sig[4];
uint8_t          1437 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t unused1[2];
uint8_t          1438 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t model[16];
uint8_t          1441 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t flags;
uint8_t          1442 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t erase_cmd;
uint8_t          1443 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alt_erase_cmd;
uint8_t          1444 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t wrt_enable_cmd;
uint8_t          1445 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t wrt_enable_bits;
uint8_t          1446 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t wrt_sts_reg_cmd;
uint8_t          1447 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t unprotect_sec_cmd;
uint8_t          1448 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t read_man_id_cmd;
uint8_t          1453 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t read_id_addr_len;
uint8_t          1454 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t wrt_disable_bits;
uint8_t          1455 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t read_dev_id_len;
uint8_t          1456 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t chip_erase_cmd;
uint8_t          1458 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t protect_sec_cmd;
uint8_t          1459 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t unused2[65];
uint8_t          1465 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sig[4];
uint8_t          1468 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t version;
uint8_t          1469 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t unused[5];
uint8_t          1533 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t attribute;
uint8_t          1534 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved;
uint8_t          1547 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sig[2];
uint8_t          1557 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t q_qos;
uint8_t          1558 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t f_qos;
uint8_t          1560 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];
uint8_t          1561 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];
uint8_t          1582 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;
uint8_t          1583 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;
uint8_t          1584 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_defined;
uint8_t          1585 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;
uint8_t          1614 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;
uint8_t          1615 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;
uint8_t          1616 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_defined;
uint8_t          1617 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;
uint8_t          1641 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;
uint8_t          1642 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;
uint8_t          1643 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_defined;
uint8_t          1644 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;
uint8_t          1671 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_type;
uint8_t          1672 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_count;
uint8_t          1673 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t sys_defined;
uint8_t          1674 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t entry_status;
uint8_t          1737 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t id[4];
uint8_t          1749 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];
uint8_t          1750 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];
uint8_t          1764 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t enode_mac[6];
uint8_t          1772 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prio_fcf_matching_flags;
uint8_t          1773 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_6_1[3];
uint8_t          1775 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t pri_fcf_fabric_name[8];
uint8_t          1777 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t spma_mac_addr[6];
uint8_t          1781 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t min_supported_speed;
uint8_t          1782 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_7_0;
uint8_t          1818 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alternate_port_name[WWN_SIZE];
uint8_t          1819 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alternate_node_name[WWN_SIZE];
uint8_t          1821 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t boot_port_name[WWN_SIZE];
uint8_t          1825 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alt1_boot_port_name[WWN_SIZE];
uint8_t          1829 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alt2_boot_port_name[WWN_SIZE];
uint8_t          1833 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t alt3_boot_port_name[WWN_SIZE];
uint8_t          1849 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reset_delay;
uint8_t          1850 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_12;
uint8_t          1868 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_17[4];
uint8_t          1870 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_19[2];
uint8_t          1874 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_21[16];
uint8_t          1890 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t model_name[16];
uint8_t          1918 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t port_name[WWN_SIZE];		/* Big endian. */
uint8_t          1919 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t node_name[WWN_SIZE];		/* Big endian. */
uint8_t          1939 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_4[8];
uint8_t          2000 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  reserved_5[8];
uint8_t          2002 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t enode_mac[6];
uint8_t          2004 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_6[10];
uint8_t          2018 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t prio_fcf_matching_flags;
uint8_t          2019 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t reserved_1[3];
uint8_t          2021 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t pri_fcf_fabric_name[8];
uint8_t          2023 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t spma_mac_addr[6];
uint8_t          2050 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  tag;           /* Priority value                   */
uint8_t          2051 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  reserved;      /* Reserved for future use          */
uint8_t          2060 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  src_wwpn[8];   /* Source WWPN: -1 (wild card)      */
uint8_t          2061 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  dst_wwpn[8];   /* Destination WWPN: -1 (wild card) */
uint8_t          2065 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  signature[4];  /* "HQOS" signature of config data  */
uint8_t          2071 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  attributes;    /* enable/disable, persistence      */
uint8_t          2075 drivers/scsi/qla2xxx/qla_fw.h 	uint8_t  reserved;      /* Reserved for future use          */
uint8_t           285 drivers/scsi/qla2xxx/qla_gbl.h     uint16_t, uint64_t, uint8_t);
uint8_t           345 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_get_adapter_id(scsi_qla_host_t *, uint16_t *, uint8_t *, uint8_t *,
uint8_t           346 drivers/scsi/qla2xxx/qla_gbl.h     uint8_t *, uint16_t *, uint16_t *);
uint8_t           349 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_get_retry_cnt(scsi_qla_host_t *, uint8_t *, uint8_t *, uint16_t *);
uint8_t           355 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_get_port_database(scsi_qla_host_t *, fc_port_t *, uint8_t);
uint8_t           361 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_get_port_name(scsi_qla_host_t *, uint16_t, uint8_t *, uint8_t);
uint8_t           373 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_login_fabric(scsi_qla_host_t *, uint16_t, uint8_t, uint8_t, uint8_t,
uint8_t           374 drivers/scsi/qla2xxx/qla_gbl.h     uint16_t *, uint8_t);
uint8_t           376 drivers/scsi/qla2xxx/qla_gbl.h qla24xx_login_fabric(scsi_qla_host_t *, uint16_t, uint8_t, uint8_t, uint8_t,
uint8_t           377 drivers/scsi/qla2xxx/qla_gbl.h     uint16_t *, uint8_t);
uint8_t           381 drivers/scsi/qla2xxx/qla_gbl.h     uint8_t);
uint8_t           384 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_fabric_logout(scsi_qla_host_t *, uint16_t, uint8_t, uint8_t, uint8_t);
uint8_t           387 drivers/scsi/qla2xxx/qla_gbl.h qla24xx_fabric_logout(scsi_qla_host_t *, uint16_t, uint8_t, uint8_t, uint8_t);
uint8_t           456 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_read_sfp(scsi_qla_host_t *, dma_addr_t, uint8_t *,
uint8_t           460 drivers/scsi/qla2xxx/qla_gbl.h qla2x00_write_sfp(scsi_qla_host_t *, dma_addr_t, uint8_t *,
uint8_t           566 drivers/scsi/qla2xxx/qla_gbl.h extern uint8_t *qla2x00_read_nvram_data(scsi_qla_host_t *, void *, uint32_t,
uint8_t           568 drivers/scsi/qla2xxx/qla_gbl.h extern uint8_t *qla24xx_read_nvram_data(scsi_qla_host_t *, void *, uint32_t,
uint8_t           574 drivers/scsi/qla2xxx/qla_gbl.h extern uint8_t *qla25xx_read_nvram_data(scsi_qla_host_t *, void *, uint32_t,
uint8_t           660 drivers/scsi/qla2xxx/qla_gbl.h extern void qla2x00_get_sym_node_name(scsi_qla_host_t *, uint8_t *, size_t);
uint8_t           707 drivers/scsi/qla2xxx/qla_gbl.h 	struct qla_fcp_prio_cfg *, uint8_t);
uint8_t           720 drivers/scsi/qla2xxx/qla_gbl.h extern int qla25xx_create_req_que(struct qla_hw_data *, uint16_t, uint8_t,
uint8_t           721 drivers/scsi/qla2xxx/qla_gbl.h 	uint16_t, int, uint8_t, bool);
uint8_t           722 drivers/scsi/qla2xxx/qla_gbl.h extern int qla25xx_create_rsp_que(struct qla_hw_data *, uint16_t, uint8_t,
uint8_t           832 drivers/scsi/qla2xxx/qla_gbl.h extern void qla2x00_set_model_info(scsi_qla_host_t *, uint8_t *, size_t,
uint8_t           848 drivers/scsi/qla2xxx/qla_gs.c qla2x00_get_sym_node_name(scsi_qla_host_t *vha, uint8_t *snn, size_t size)
uint8_t           932 drivers/scsi/qla2xxx/qla_gs.c 	    (uint8_t)strlen(ct_req->req.rsnn_nn.sym_node_name);
uint8_t          1074 drivers/scsi/qla2xxx/qla_gs.c 	uint8_t		*entry;
uint8_t          2890 drivers/scsi/qla2xxx/qla_gs.c 	uint8_t fcp_scsi_features = 0;
uint8_t          1410 drivers/scsi/qla2xxx/qla_init.c 	uint8_t	ls;
uint8_t          2512 drivers/scsi/qla2xxx/qla_init.c 	uint8_t domain, area, al_pa;
uint8_t          4296 drivers/scsi/qla2xxx/qla_init.c 	uint8_t       al_pa;
uint8_t          4297 drivers/scsi/qla2xxx/qla_init.c 	uint8_t       area;
uint8_t          4298 drivers/scsi/qla2xxx/qla_init.c 	uint8_t       domain;
uint8_t          4399 drivers/scsi/qla2xxx/qla_init.c qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
uint8_t          4488 drivers/scsi/qla2xxx/qla_init.c 	uint8_t         chksum = 0;
uint8_t          4490 drivers/scsi/qla2xxx/qla_init.c 	uint8_t         *dptr1, *dptr2;
uint8_t          4494 drivers/scsi/qla2xxx/qla_init.c 	uint8_t         *ptr = ha->nvram;
uint8_t          4624 drivers/scsi/qla2xxx/qla_init.c 	dptr1 = (uint8_t *)icb;
uint8_t          4625 drivers/scsi/qla2xxx/qla_init.c 	dptr2 = (uint8_t *)&nv->parameter_block_version;
uint8_t          4626 drivers/scsi/qla2xxx/qla_init.c 	cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
uint8_t          4631 drivers/scsi/qla2xxx/qla_init.c 	dptr1 = (uint8_t *)icb->add_firmware_options;
uint8_t          4632 drivers/scsi/qla2xxx/qla_init.c 	cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
uint8_t          4769 drivers/scsi/qla2xxx/qla_init.c 			icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
uint8_t          4770 drivers/scsi/qla2xxx/qla_init.c 			icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
uint8_t          5043 drivers/scsi/qla2xxx/qla_init.c 	uint8_t		domain, area, al_pa;
uint8_t          6749 drivers/scsi/qla2xxx/qla_init.c 	uint8_t        status = 0;
uint8_t          7083 drivers/scsi/qla2xxx/qla_init.c 	uint8_t  *dptr1, *dptr2;
uint8_t          7190 drivers/scsi/qla2xxx/qla_init.c 	dptr1 = (uint8_t *)icb;
uint8_t          7191 drivers/scsi/qla2xxx/qla_init.c 	dptr2 = (uint8_t *)&nv->version;
uint8_t          7192 drivers/scsi/qla2xxx/qla_init.c 	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
uint8_t          7200 drivers/scsi/qla2xxx/qla_init.c 	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
uint8_t          7201 drivers/scsi/qla2xxx/qla_init.c 	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
uint8_t          7202 drivers/scsi/qla2xxx/qla_init.c 	cnt = (uint8_t *)&icb->reserved_3 -
uint8_t          7203 drivers/scsi/qla2xxx/qla_init.c 	    (uint8_t *)&icb->interrupt_delay_timer;
uint8_t          8262 drivers/scsi/qla2xxx/qla_init.c 	uint8_t  *dptr1, *dptr2;
uint8_t          8387 drivers/scsi/qla2xxx/qla_init.c 	dptr1 = (uint8_t *)icb;
uint8_t          8388 drivers/scsi/qla2xxx/qla_init.c 	dptr2 = (uint8_t *)&nv->version;
uint8_t          8389 drivers/scsi/qla2xxx/qla_init.c 	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
uint8_t          8396 drivers/scsi/qla2xxx/qla_init.c 	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
uint8_t          8397 drivers/scsi/qla2xxx/qla_init.c 	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
uint8_t          8398 drivers/scsi/qla2xxx/qla_init.c 	cnt = (uint8_t *)&icb->reserved_5 -
uint8_t          8399 drivers/scsi/qla2xxx/qla_init.c 	    (uint8_t *)&icb->interrupt_delay_timer;
uint8_t          8729 drivers/scsi/qla2xxx/qla_init.c 	uint8_t pid_match, wwn_match;
uint8_t            69 drivers/scsi/qla2xxx/qla_inline.h static inline uint8_t *
uint8_t            70 drivers/scsi/qla2xxx/qla_inline.h host_to_fcp_swap(uint8_t *fcp, uint32_t bsize)
uint8_t            83 drivers/scsi/qla2xxx/qla_inline.h host_to_adap(uint8_t *src, uint8_t *dst, uint32_t bsize)
uint8_t           172 drivers/scsi/qla2xxx/qla_inline.h 	uint8_t bail;
uint8_t           198 drivers/scsi/qla2xxx/qla_inline.h 	uint8_t bail;
uint8_t           149 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t	guard = scsi_host_get_guard(cmd->device->host);
uint8_t           417 drivers/scsi/qla2xxx/qla_iocb.c 	cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t           508 drivers/scsi/qla2xxx/qla_iocb.c     uint16_t loop_id, uint64_t lun, uint8_t type)
uint8_t           548 drivers/scsi/qla2xxx/qla_iocb.c     uint16_t loop_id, uint64_t lun, uint8_t type)
uint8_t           592 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t avail_dsds;
uint8_t           593 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t first_iocb = 1;
uint8_t           760 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t ref_tag_mask[4];	/* Validation/Replacement Mask*/
uint8_t           761 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t app_tag_mask[2];	/* Validation/Replacement Mask*/
uint8_t           891 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t avail_dsds = 0;
uint8_t          1005 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t avail_dsds = 0;
uint8_t          1398 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t			bundling = 1;
uint8_t          1402 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t			additional_fcpcdb_len;
uint8_t          1674 drivers/scsi/qla2xxx/qla_iocb.c 	host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
uint8_t          1688 drivers/scsi/qla2xxx/qla_iocb.c 	cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t          1858 drivers/scsi/qla2xxx/qla_iocb.c 	host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
uint8_t          1869 drivers/scsi/qla2xxx/qla_iocb.c 	cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t          1871 drivers/scsi/qla2xxx/qla_iocb.c 	cmd_pkt->entry_status = (uint8_t) rsp->id;
uint8_t          1994 drivers/scsi/qla2xxx/qla_iocb.c 	host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
uint8_t          2008 drivers/scsi/qla2xxx/qla_iocb.c 	cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t          2193 drivers/scsi/qla2xxx/qla_iocb.c 	host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
uint8_t          2204 drivers/scsi/qla2xxx/qla_iocb.c 	cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t          2503 drivers/scsi/qla2xxx/qla_iocb.c 		host_to_fcp_swap((uint8_t *)&tsk->lun,
uint8_t          2687 drivers/scsi/qla2xxx/qla_iocb.c 		    (uint8_t *)els_iocb,
uint8_t          2854 drivers/scsi/qla2xxx/qla_iocb.c 	    (uint8_t *)elsio->u.els_plogi.els_plogi_pyld,
uint8_t          3090 drivers/scsi/qla2xxx/qla_iocb.c 	uint8_t additional_cdb_len;
uint8_t          3253 drivers/scsi/qla2xxx/qla_iocb.c 		host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
uint8_t          3282 drivers/scsi/qla2xxx/qla_iocb.c 		cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t          3286 drivers/scsi/qla2xxx/qla_iocb.c 		cmd_pkt->entry_status = (uint8_t) rsp->id;
uint8_t          3320 drivers/scsi/qla2xxx/qla_iocb.c 		host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
uint8_t          3337 drivers/scsi/qla2xxx/qla_iocb.c 		cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t          3341 drivers/scsi/qla2xxx/qla_iocb.c 		cmd_pkt->entry_status = (uint8_t) rsp->id;
uint8_t          3794 drivers/scsi/qla2xxx/qla_iocb.c 	cmd_pkt->entry_status = (uint8_t) rsp->id;
uint8_t          2081 drivers/scsi/qla2xxx/qla_isr.c qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
uint8_t          2136 drivers/scsi/qla2xxx/qla_isr.c 	uint8_t		*ap = &sts24->data[12];
uint8_t          2137 drivers/scsi/qla2xxx/qla_isr.c 	uint8_t		*ep = &sts24->data[20];
uint8_t          2418 drivers/scsi/qla2xxx/qla_isr.c 	uint8_t		lscsi_status;
uint8_t          2422 drivers/scsi/qla2xxx/qla_isr.c 	uint8_t		*rsp_info, *sense_data;
uint8_t          2808 drivers/scsi/qla2xxx/qla_isr.c 	uint8_t	sense_sz = 0;
uint8_t          2814 drivers/scsi/qla2xxx/qla_isr.c 	uint8_t *sense_ptr;
uint8_t           105 drivers/scsi/qla2xxx/qla_mbx.c 	uint8_t		abort_active;
uint8_t           106 drivers/scsi/qla2xxx/qla_mbx.c 	uint8_t		io_lock_on;
uint8_t          1633 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
uint8_t          1634 drivers/scsi/qla2xxx/qla_mbx.c     uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
uint8_t          1728 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
uint8_t          1756 drivers/scsi/qla2xxx/qla_mbx.c 			*retry_cnt = (uint8_t)mcp->mb[1];
uint8_t          1875 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
uint8_t          1959 drivers/scsi/qla2xxx/qla_mbx.c 		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
uint8_t          2004 drivers/scsi/qla2xxx/qla_mbx.c 		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
uint8_t          2130 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
uint8_t          2131 drivers/scsi/qla2xxx/qla_mbx.c     uint8_t opt)
uint8_t          2359 drivers/scsi/qla2xxx/qla_mbx.c qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
uint8_t          2360 drivers/scsi/qla2xxx/qla_mbx.c     uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
uint8_t          2495 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
uint8_t          2496 drivers/scsi/qla2xxx/qla_mbx.c     uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
uint8_t          2577 drivers/scsi/qla2xxx/qla_mbx.c     uint16_t *mb_ret, uint8_t opt)
uint8_t          2635 drivers/scsi/qla2xxx/qla_mbx.c qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
uint8_t          2636 drivers/scsi/qla2xxx/qla_mbx.c     uint8_t area, uint8_t al_pa)
uint8_t          2710 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
uint8_t          2711 drivers/scsi/qla2xxx/qla_mbx.c     uint8_t area, uint8_t al_pa)
uint8_t          3237 drivers/scsi/qla2xxx/qla_mbx.c 		host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
uint8_t          4736 drivers/scsi/qla2xxx/qla_mbx.c 	uint8_t *str;
uint8_t          4863 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
uint8_t          4914 drivers/scsi/qla2xxx/qla_mbx.c qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
uint8_t          5533 drivers/scsi/qla2xxx/qla_mbx.c 	uint8_t byte;
uint8_t          6083 drivers/scsi/qla2xxx/qla_mbx.c 	uint8_t subcode = (uint8_t)options;
uint8_t          6379 drivers/scsi/qla2xxx/qla_mbx.c 	    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
uint8_t           103 drivers/scsi/qla2xxx/qla_mid.c qla24xx_find_vhost_by_name(struct qla_hw_data *ha, uint8_t *port_name)
uint8_t           447 drivers/scsi/qla2xxx/qla_mid.c 	uint8_t port_name[WWN_SIZE];
uint8_t           684 drivers/scsi/qla2xxx/qla_mid.c     uint8_t vp_idx, uint16_t rid, int rsp_que, uint8_t qos, bool startqp)
uint8_t           814 drivers/scsi/qla2xxx/qla_mid.c     uint8_t vp_idx, uint16_t rid, struct qla_qpair *qpair, bool startqp)
uint8_t            45 drivers/scsi/qla2xxx/qla_mr.c 	uint8_t		abort_active;
uint8_t            46 drivers/scsi/qla2xxx/qla_mr.c 	uint8_t		io_lock_on;
uint8_t           133 drivers/scsi/qla2xxx/qla_mr.c 	    (uint8_t *)mcp->mb, 16);
uint8_t           135 drivers/scsi/qla2xxx/qla_mr.c 	    ((uint8_t *)mcp->mb + 0x10), 16);
uint8_t           137 drivers/scsi/qla2xxx/qla_mr.c 	    ((uint8_t *)mcp->mb + 0x20), 8);
uint8_t          2130 drivers/scsi/qla2xxx/qla_mr.c qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
uint8_t          2218 drivers/scsi/qla2xxx/qla_mr.c 	uint8_t	*fw_sts_ptr;
uint8_t          2248 drivers/scsi/qla2xxx/qla_mr.c 		    pkt->reserved_2, 20 * sizeof(uint8_t));
uint8_t          2254 drivers/scsi/qla2xxx/qla_mr.c 			sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
uint8_t          2289 drivers/scsi/qla2xxx/qla_mr.c 	uint8_t		*rsp_info = NULL, *sense_data = NULL;
uint8_t          2556 drivers/scsi/qla2xxx/qla_mr.c 	uint8_t	sense_sz = 0;
uint8_t          2562 drivers/scsi/qla2xxx/qla_mr.c 	uint8_t *sense_ptr;
uint8_t          3147 drivers/scsi/qla2xxx/qla_mr.c 	host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
uint8_t          3158 drivers/scsi/qla2xxx/qla_mr.c 	lcmd_pkt.entry_count = (uint8_t)req_cnt;
uint8_t          3161 drivers/scsi/qla2xxx/qla_mr.c 	lcmd_pkt.entry_status = (uint8_t) rsp->id;
uint8_t          3215 drivers/scsi/qla2xxx/qla_mr.c 		host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
uint8_t          3254 drivers/scsi/qla2xxx/qla_mr.c 	uint8_t entry_cnt = 1;
uint8_t          3355 drivers/scsi/qla2xxx/qla_mr.c 					    (uint8_t *)&lcont_pkt,
uint8_t          3364 drivers/scsi/qla2xxx/qla_mr.c 				    (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
uint8_t          3411 drivers/scsi/qla2xxx/qla_mr.c 					    (uint8_t *)&lcont_pkt,
uint8_t          3420 drivers/scsi/qla2xxx/qla_mr.c 				    (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
uint8_t            21 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_type;		/* Entry type. */
uint8_t            22 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_count;		/* Entry count. */
uint8_t            23 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t sys_define;		/* System defined. */
uint8_t            24 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t            27 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_0;
uint8_t            28 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t port_path_ctrl;
uint8_t            35 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t	scsi_rsp_dsd_len;
uint8_t            36 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_2;
uint8_t            40 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t cntrl_flags;
uint8_t            42 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t task_mgmt_flags;	/* Task management flags. */
uint8_t            44 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t task;
uint8_t            46 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t crn;
uint8_t            48 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t fcp_cdb[MAX_CMDSZ];	/* SCSI command words. */
uint8_t            56 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_type;		/* Entry type. */
uint8_t            57 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_count;		/* Entry count. */
uint8_t            58 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t sys_define;		/* System defined. */
uint8_t            59 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t            76 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t data[32];		/* FCP response/sense information. */
uint8_t            84 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_type;		/* Entry type. */
uint8_t            85 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_count;		/* Entry count. */
uint8_t            86 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t handle_count;
uint8_t            87 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_status;
uint8_t            94 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_type;		/* Entry type. */
uint8_t            95 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_count;		/* Entry count. */
uint8_t            96 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t sys_define;
uint8_t            97 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           113 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_2[32];
uint8_t           119 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           120 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           121 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t sys_define;		/* System defined. */
uint8_t           122 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           134 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_1[38];
uint8_t           139 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           140 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           141 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t sys_define;		/* System defined. */
uint8_t           142 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           155 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_2[20];
uint8_t           164 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           165 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           166 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t sys_define;		/* System Defined. */
uint8_t           167 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           177 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t flags;
uint8_t           178 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_1;
uint8_t           190 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t tgt_node_wwpn[WWN_SIZE];
uint8_t           191 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t tgt_node_wwnn[WWN_SIZE];
uint8_t           193 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved[128];
uint8_t           208 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         port_state;
uint8_t           209 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         port_type;
uint8_t           212 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         fw_ver_num[32];
uint8_t           213 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         portal_attrib;
uint8_t           215 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         reset_delay;
uint8_t           216 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         pdwn_retry_cnt;
uint8_t           218 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         risc_ver;
uint8_t           219 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         pconn_option;
uint8_t           224 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         retry_cnt;
uint8_t           225 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         retry_delay;
uint8_t           226 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         port_name[8];
uint8_t           227 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         port_id[3];
uint8_t           228 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         link_status;
uint8_t           229 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         plink_rate;
uint8_t           232 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         tgt_disc;
uint8_t           233 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         log_tout;
uint8_t           234 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         node_name[8];
uint8_t           236 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         resp_acc_tmr;
uint8_t           237 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         intr_del_tmr;
uint8_t           238 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         erisc_opt2;
uint8_t           239 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         alt_port_name[8];
uint8_t           240 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         alt_node_name[8];
uint8_t           241 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         link_down_tout;
uint8_t           242 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         conn_type;
uint8_t           243 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t         fc_fw_mode;
uint8_t           282 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		model_num[16];
uint8_t           283 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		model_description[80];
uint8_t           284 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		reserved0[160];
uint8_t           285 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		symbolic_name[64];
uint8_t           286 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		serial_num[32];
uint8_t           287 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		hw_version[16];
uint8_t           288 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		fw_version[16];
uint8_t           289 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		uboot_version[16];
uint8_t           290 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		fru_serial_num[32];
uint8_t           292 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		fc_port_count;
uint8_t           293 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		iscsi_port_count;
uint8_t           294 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		reserved1[2];
uint8_t           296 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		mode;
uint8_t           297 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		log_level;
uint8_t           298 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		reserved2[2];
uint8_t           302 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		tgt_pres_mode;
uint8_t           303 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		iqn_flags;
uint8_t           304 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		lun_mapping;
uint8_t           309 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		cluster_key[16];
uint8_t           313 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t		cluster_flags;
uint8_t           408 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t flags;
uint8_t           409 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_1;
uint8_t           439 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t reserved_3[20];
uint8_t           468 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t	symbolic_name[64];
uint8_t           469 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t	serial_num[32];
uint8_t           470 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t	hw_version[16];
uint8_t           471 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t	fw_version[16];
uint8_t           472 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t	uboot_version[16];
uint8_t           473 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t	fru_serial_num[32];
uint8_t           478 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t fw_hbt_en;
uint8_t           479 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t fw_hbt_cnt;
uint8_t           480 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t fw_hbt_miss_cnt;
uint8_t           483 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t fw_reset_timer_exp;
uint8_t           489 drivers/scsi/qla2xxx/qla_mr.h 	uint8_t hinfo_resend_timer_tick;
uint8_t           504 drivers/scsi/qla2xxx/qla_nvme.c 	cmd_pkt->entry_count = (uint8_t)req_cnt;
uint8_t           692 drivers/scsi/qla2xxx/qla_nvme.c 	    min((uint8_t)(qla_nvme_fc_transport.max_hw_queues),
uint8_t           693 drivers/scsi/qla2xxx/qla_nvme.c 		(uint8_t)(ha->max_req_queues - 2));
uint8_t            45 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_type;             /* Entry type. */
uint8_t            46 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_count;            /* Entry count. */
uint8_t            47 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t sys_define;             /* System defined. */
uint8_t            48 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_status;           /* Entry Status. */
uint8_t            72 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t port_id[3];             /* PortID of destination port. */
uint8_t            73 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t vp_index;
uint8_t            80 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_type;
uint8_t            81 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_count;
uint8_t            82 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t sys_define;
uint8_t            83 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_status;
uint8_t            88 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t  vp_index;
uint8_t            89 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t  rsvd;
uint8_t           108 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_type;
uint8_t           109 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t entry_count;
uint8_t           112 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t vp_index;
uint8_t           113 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t rsvd2;
uint8_t           119 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t d_id[3];
uint8_t           120 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t r_ctl;
uint8_t           122 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t cs_ctl;
uint8_t           123 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t f_ctl[3];
uint8_t           124 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t type;
uint8_t           126 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t df_ctl;
uint8_t           127 drivers/scsi/qla2xxx/qla_nvme.h 	uint8_t seq_id;
uint8_t           699 drivers/scsi/qla2xxx/qla_nx.c 	uint8_t __iomem  *mem_ptr = NULL;
uint8_t           771 drivers/scsi/qla2xxx/qla_nx.c 	uint8_t __iomem *mem_ptr = NULL;
uint8_t           936 drivers/scsi/qla2xxx/qla_nx.c qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag)
uint8_t          1370 drivers/scsi/qla2xxx/qla_nx.c 		tmpw = *((uint8_t *)data);
uint8_t          1542 drivers/scsi/qla2xxx/qla_nx.c 		*(uint8_t  *)data = val;
uint8_t          1848 drivers/scsi/qla2xxx/qla_nx.c 	const uint8_t *unirom = ha->hablob->fw->data;
uint8_t          1852 drivers/scsi/qla2xxx/qla_nx.c 	uint8_t chiprev = ha->chip_revision;
uint8_t          1883 drivers/scsi/qla2xxx/qla_nx.c qla82xx_validate_firmware_blob(scsi_qla_host_t *vha, uint8_t fw_type)
uint8_t          4239 drivers/scsi/qla2xxx/qla_nx.c 	    (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
uint8_t          4342 drivers/scsi/qla2xxx/qla_nx.c 		data_collected = (uint8_t *)data_ptr -
uint8_t          4343 drivers/scsi/qla2xxx/qla_nx.c 		    (uint8_t *)ha->md_dump;
uint8_t          4346 drivers/scsi/qla2xxx/qla_nx.c 		    (((uint8_t *)entry_hdr) + entry_hdr->entry_size);
uint8_t           853 drivers/scsi/qla2xxx/qla_nx.h 	uint8_t crn;
uint8_t           854 drivers/scsi/qla2xxx/qla_nx.h 	uint8_t task_attribute;
uint8_t           855 drivers/scsi/qla2xxx/qla_nx.h 	uint8_t task_management;
uint8_t           856 drivers/scsi/qla2xxx/qla_nx.h 	uint8_t additional_cdb_len;
uint8_t           857 drivers/scsi/qla2xxx/qla_nx.h 	uint8_t cdb[260]; /* 256 for CDB len and 4 for FCP_DL */
uint8_t          1019 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t entry_capture_mask;
uint8_t          1020 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t entry_code;
uint8_t          1021 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t driver_code;
uint8_t          1022 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t driver_flags;
uint8_t          1033 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t addr_stride;
uint8_t          1034 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t state_index_a;
uint8_t          1042 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t opcode;
uint8_t          1043 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t state_index_v;
uint8_t          1044 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t shl;
uint8_t          1045 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t shr;
uint8_t          1071 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t poll_mask;
uint8_t          1072 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t poll_wait;
uint8_t          1077 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t read_addr_stride;
uint8_t          1078 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t read_addr_cnt;
uint8_t          1151 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t read_addr_stride;
uint8_t          1152 drivers/scsi/qla2xxx/qla_nx.h 		uint8_t read_addr_cnt;
uint8_t           508 drivers/scsi/qla2xxx/qla_nx2.c qla8044_read_flash_data(scsi_qla_host_t *vha,  uint8_t *p_data,
uint8_t           665 drivers/scsi/qla2xxx/qla_nx2.c 	uint8_t retries;
uint8_t          1032 drivers/scsi/qla2xxx/qla_nx2.c 	uint32_t flash_addr, uint8_t *p_data, int u32_word_count)
uint8_t          1217 drivers/scsi/qla2xxx/qla_nx2.c 	uint8_t *p_cache;
uint8_t          1517 drivers/scsi/qla2xxx/qla_nx2.c 	uint8_t *p_buff;
uint8_t          2915 drivers/scsi/qla2xxx/qla_nx2.c 	uint8_t *data_ptr = (uint8_t *)*d_ptr;
uint8_t          3006 drivers/scsi/qla2xxx/qla_nx2.c 	uint8_t stride, stride2;
uint8_t          3102 drivers/scsi/qla2xxx/qla_nx2.c 	uint8_t stride1, stride2;
uint8_t          3282 drivers/scsi/qla2xxx/qla_nx2.c 	data_ptr = (uint32_t *)((uint8_t *)ha->md_dump);
uint8_t          3314 drivers/scsi/qla2xxx/qla_nx2.c 		(((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
uint8_t          3451 drivers/scsi/qla2xxx/qla_nx2.c 		data_collected = (uint8_t *)data_ptr -
uint8_t          3452 drivers/scsi/qla2xxx/qla_nx2.c 		    (uint8_t *)((uint8_t *)ha->md_dump);
uint8_t          3458 drivers/scsi/qla2xxx/qla_nx2.c 		    (((uint8_t *)entry_hdr) + entry_hdr->entry_size);
uint8_t          3805 drivers/scsi/qla2xxx/qla_nx2.c 	uint8_t *p_cache, *p_src;
uint8_t          3809 drivers/scsi/qla2xxx/qla_nx2.c 	p_cache = kcalloc(length, sizeof(uint8_t), GFP_KERNEL);
uint8_t           249 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t shl;
uint8_t           250 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t shr;
uint8_t           251 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t index_a;
uint8_t           252 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t rsvd;
uint8_t           274 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t *buff;
uint8_t           275 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t *stop_offset;
uint8_t           276 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t *start_offset;
uint8_t           277 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t *init_offset;
uint8_t           279 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t seq_end;
uint8_t           280 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t template_end;
uint8_t           291 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t entry_capture_mask;
uint8_t           292 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t entry_code;
uint8_t           293 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t driver_code;
uint8_t           294 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t driver_flags;
uint8_t           303 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t addr_stride;
uint8_t           304 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t state_index_a;
uint8_t           311 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t opcode;
uint8_t           312 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t state_index_v;
uint8_t           313 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t shl;
uint8_t           314 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t shr;
uint8_t           334 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t poll_mask;
uint8_t           335 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t poll_wait;
uint8_t           339 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t read_addr_stride;
uint8_t           340 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t read_addr_cnt;
uint8_t           371 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t rsvd[2];
uint8_t           373 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t rsvd2[12];
uint8_t           413 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t read_addr_stride;
uint8_t           414 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t read_addr_cnt;
uint8_t           437 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t stride;
uint8_t           438 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t stride2;
uint8_t           454 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t stride_1;
uint8_t           455 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t stride_2;
uint8_t           487 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t select_value_stride;
uint8_t           488 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t data_size;
uint8_t           489 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t rsvd[2];
uint8_t           572 drivers/scsi/qla2xxx/qla_nx2.h 		uint8_t rsvd[2];
uint8_t           577 drivers/scsi/qla2xxx/qla_nx2.h 	uint8_t rsvd[24];
uint8_t          4858 drivers/scsi/qla2xxx/qla_os.c 	uint8_t bail;
uint8_t          5029 drivers/scsi/qla2xxx/qla_os.c 	uint8_t free_fcport = 0;
uint8_t           106 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t		cnt;
uint8_t           518 drivers/scsi/qla2xxx/qla_sup.c qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
uint8_t           519 drivers/scsi/qla2xxx/qla_sup.c     uint8_t *flash_id)
uint8_t           557 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *buf = (void *)req->ring, *bcode,  last_image;
uint8_t           954 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t	man_id, flash_id;
uint8_t          1377 drivers/scsi/qla2xxx/qla_sup.c uint8_t *
uint8_t          1396 drivers/scsi/qla2xxx/qla_sup.c uint8_t *
uint8_t          1500 drivers/scsi/qla2xxx/qla_sup.c uint8_t *
uint8_t          1527 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *dbuf = vmalloc(RMW_BUFFER_SIZE);
uint8_t          2004 drivers/scsi/qla2xxx/qla_sup.c static uint8_t
uint8_t          2025 drivers/scsi/qla2xxx/qla_sup.c 		return (uint8_t)data;
uint8_t          2056 drivers/scsi/qla2xxx/qla_sup.c 	return (uint8_t)data;
uint8_t          2066 drivers/scsi/qla2xxx/qla_sup.c qla2x00_write_flash_byte(struct qla_hw_data *ha, uint32_t addr, uint8_t data)
uint8_t          2129 drivers/scsi/qla2xxx/qla_sup.c qla2x00_poll_flash(struct qla_hw_data *ha, uint32_t addr, uint8_t poll_data,
uint8_t          2130 drivers/scsi/qla2xxx/qla_sup.c     uint8_t man_id, uint8_t flash_id)
uint8_t          2133 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t flash_data;
uint8_t          2170 drivers/scsi/qla2xxx/qla_sup.c     uint8_t data, uint8_t man_id, uint8_t flash_id)
uint8_t          2206 drivers/scsi/qla2xxx/qla_sup.c qla2x00_erase_flash(struct qla_hw_data *ha, uint8_t man_id, uint8_t flash_id)
uint8_t          2243 drivers/scsi/qla2xxx/qla_sup.c     uint32_t sec_mask, uint8_t man_id, uint8_t flash_id)
uint8_t          2269 drivers/scsi/qla2xxx/qla_sup.c qla2x00_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
uint8_t          2270 drivers/scsi/qla2xxx/qla_sup.c     uint8_t *flash_id)
uint8_t          2283 drivers/scsi/qla2xxx/qla_sup.c qla2x00_read_flash_data(struct qla_hw_data *ha, uint8_t *tmp_buf,
uint8_t          2288 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t data;
uint8_t          2354 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *data;
uint8_t          2389 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t man_id, flash_id, sec_number, *data;
uint8_t          2624 drivers/scsi/qla2xxx/qla_sup.c     uint32_t len, uint32_t buf_size_without_sfub, uint8_t *sfub_buf)
uint8_t          2632 drivers/scsi/qla2xxx/qla_sup.c 	memcpy(sfub_buf, (uint8_t *)p,
uint8_t          2669 drivers/scsi/qla2xxx/qla_sup.c 			memcpy((uint8_t *)region, flt_reg,
uint8_t          2796 drivers/scsi/qla2xxx/qla_sup.c 			buf_size_without_sfub, (uint8_t *)sfub);
uint8_t          3003 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *pbuf;
uint8_t          3089 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t do_next, rbyte, *vbyte;
uint8_t          3162 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t code_type, last_image;
uint8_t          3164 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *dbyte;
uint8_t          3296 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *bcode = mbuf;
uint8_t          3297 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t code_type, last_image;
uint8_t          3405 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *bcode = mbuf;
uint8_t          3406 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t code_type, last_image;
uint8_t          3546 drivers/scsi/qla2xxx/qla_sup.c qla2xxx_is_vpd_valid(uint8_t *pos, uint8_t *end)
uint8_t          3566 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *pos = ha->vpd;
uint8_t          3567 drivers/scsi/qla2xxx/qla_sup.c 	uint8_t *end = pos + ha->vpd_size;
uint8_t           111 drivers/scsi/qla2xxx/qla_target.c 	struct atio_from_isp *pkt, uint8_t);
uint8_t           125 drivers/scsi/qla2xxx/qla_target.c 	uint16_t srr_flags, uint16_t srr_reject_code, uint8_t srr_explan);
uint8_t           250 drivers/scsi/qla2xxx/qla_target.c 	struct atio_from_isp *atio, uint8_t ha_locked)
uint8_t           286 drivers/scsi/qla2xxx/qla_target.c 	uint8_t ha_locked)
uint8_t           292 drivers/scsi/qla2xxx/qla_target.c 	uint8_t queued = 0;
uint8_t           343 drivers/scsi/qla2xxx/qla_target.c 	struct atio_from_isp *atio, uint8_t ha_locked)
uint8_t          1659 drivers/scsi/qla2xxx/qla_target.c 	uint16_t srr_flags, uint16_t srr_reject_code, uint8_t srr_explan)
uint8_t          1721 drivers/scsi/qla2xxx/qla_target.c 	uint8_t *p;
uint8_t          1764 drivers/scsi/qla2xxx/qla_target.c 	p = (uint8_t *)&f_ctl;
uint8_t          1810 drivers/scsi/qla2xxx/qla_target.c 	uint8_t *p;
uint8_t          1836 drivers/scsi/qla2xxx/qla_target.c 	p = (uint8_t *)&f_ctl;
uint8_t          2252 drivers/scsi/qla2xxx/qla_target.c     uint8_t scsi_status, uint8_t sense_key, uint8_t asc, uint8_t ascq)
uint8_t          2516 drivers/scsi/qla2xxx/qla_target.c 	uint8_t found = 0;
uint8_t          2561 drivers/scsi/qla2xxx/qla_target.c 	pkt->entry_count = (uint8_t)prm->req_cnt;
uint8_t          2722 drivers/scsi/qla2xxx/qla_target.c 	struct qla_tgt_prm *prm, int xmit_type, uint8_t scsi_status,
uint8_t          2990 drivers/scsi/qla2xxx/qla_target.c 	uint8_t			bundling = 1;
uint8_t          3153 drivers/scsi/qla2xxx/qla_target.c 	memset((uint8_t *)&tc, 0 , sizeof(tc));
uint8_t          3196 drivers/scsi/qla2xxx/qla_target.c 	uint8_t scsi_status)
uint8_t          3441 drivers/scsi/qla2xxx/qla_target.c 	uint8_t		*ap = &sts->actual_dif[0];
uint8_t          3442 drivers/scsi/qla2xxx/qla_target.c 	uint8_t		*ep = &sts->expected_dif[0];
uint8_t          3444 drivers/scsi/qla2xxx/qla_target.c 	uint8_t scsi_status, sense_key, asc, ascq;
uint8_t          4047 drivers/scsi/qla2xxx/qla_target.c 	uint8_t task_codes)
uint8_t          5517 drivers/scsi/qla2xxx/qla_target.c 	struct atio_from_isp *atio, uint8_t ha_locked)
uint8_t          5537 drivers/scsi/qla2xxx/qla_target.c 	struct atio_from_isp *atio, uint8_t ha_locked)
uint8_t          5676 drivers/scsi/qla2xxx/qla_target.c 			    vha, 0xffff, (uint8_t *)entry, sizeof(*entry));
uint8_t          6749 drivers/scsi/qla2xxx/qla_target.c qlt_24xx_process_atio_queue(struct scsi_qla_host *vha, uint8_t ha_locked)
uint8_t           132 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_type;		    /* Entry type. */
uint8_t           133 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_count;		    /* Entry count. */
uint8_t           134 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 sys_define;		    /* System defined. */
uint8_t           135 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_status;		    /* Entry Status. */
uint8_t           140 drivers/scsi/qla2xxx/qla_target.h 			uint8_t	 target_id;
uint8_t           141 drivers/scsi/qla2xxx/qla_target.h 			uint8_t	 reserved_1;
uint8_t           152 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  srr_reject_vendor_uniq;
uint8_t           153 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  srr_reject_code_expl;
uint8_t           154 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  reserved_2[24];
uint8_t           163 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  status_subcode;
uint8_t           164 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  fw_handle;
uint8_t           169 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  reserved_4[19];
uint8_t           170 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  vp_index;
uint8_t           171 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  srr_reject_vendor_uniq;
uint8_t           172 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  srr_reject_code_expl;
uint8_t           173 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  srr_reject_code;
uint8_t           174 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  reserved_5[5];
uint8_t           177 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved[2];
uint8_t           203 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_type;		/* Entry type. */
uint8_t           204 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_count;		/* Entry count. */
uint8_t           205 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 sys_define;		/* System defined. */
uint8_t           206 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_status;		/* Entry Status. */
uint8_t           249 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  r_ctl;
uint8_t           251 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  cs_ctl;
uint8_t           253 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  type;
uint8_t           254 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  f_ctl[3];
uint8_t           255 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  seq_id;
uint8_t           256 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  df_ctl;
uint8_t           265 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  r_ctl;
uint8_t           267 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  cs_ctl;
uint8_t           268 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  f_ctl[3];
uint8_t           269 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  type;
uint8_t           271 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  df_ctl;
uint8_t           272 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  seq_id;
uint8_t           290 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  cmnd_ref;
uint8_t           291 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  task_attr:3;
uint8_t           292 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved:5;
uint8_t           293 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  task_mgmt_flags;
uint8_t           299 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  wrdata:1;
uint8_t           300 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  rddata:1;
uint8_t           301 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  add_cdb_len:6;
uint8_t           302 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  cdb[16];
uint8_t           308 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  add_cdb[4];
uint8_t           320 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  sys_define;   /* System defined. */
uint8_t           321 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  entry_status; /* Entry Status.   */
uint8_t           327 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  command_ref;
uint8_t           328 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  task_codes;
uint8_t           329 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  task_flags;
uint8_t           330 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  execution_codes;
uint8_t           331 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  cdb[MAX_CMDSZ];
uint8_t           334 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  initiator_port_name[WWN_SIZE]; /* on qla23xx */
uint8_t           340 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  fcp_cmnd_len_low;
uint8_t           341 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  fcp_cmnd_len_high:4;
uint8_t           342 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  attr:4;
uint8_t           349 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  entry_type;	/* Entry type. */
uint8_t           350 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  entry_count;	/* Entry count. */
uint8_t           354 drivers/scsi/qla2xxx/qla_target.h 			uint8_t  data[56];
uint8_t           394 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_type;		    /* Entry type. */
uint8_t           395 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_count;		    /* Entry count. */
uint8_t           396 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 sys_define;		    /* System defined. */
uint8_t           397 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_status;		    /* Entry Status. */
uint8_t           403 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  vp_index;
uint8_t           404 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  add_flags;
uint8_t           406 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved;
uint8_t           429 drivers/scsi/qla2xxx/qla_target.h 			uint8_t sense_data[24];
uint8_t           439 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_type;		    /* Entry type. */
uint8_t           440 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_count;		    /* Entry count. */
uint8_t           441 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 sys_define;		    /* System defined. */
uint8_t           442 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_status;		    /* Entry Status. */
uint8_t           447 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  vp_index;
uint8_t           448 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved1[5];
uint8_t           456 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved4[24];
uint8_t           486 drivers/scsi/qla2xxx/qla_target.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           488 drivers/scsi/qla2xxx/qla_target.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           489 drivers/scsi/qla2xxx/qla_target.h 	uint8_t sys_define;		/* System defined. */
uint8_t           490 drivers/scsi/qla2xxx/qla_target.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           497 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  vp_index;
uint8_t           498 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  add_flags;		/* additional flags */
uint8_t           502 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved1;
uint8_t           520 drivers/scsi/qla2xxx/qla_target.h 	uint8_t entry_type;		/* Entry type. */
uint8_t           521 drivers/scsi/qla2xxx/qla_target.h 	uint8_t entry_count;		/* Entry count. */
uint8_t           522 drivers/scsi/qla2xxx/qla_target.h 	uint8_t sys_define;		/* System defined. */
uint8_t           523 drivers/scsi/qla2xxx/qla_target.h 	uint8_t entry_status;		/* Entry Status. */
uint8_t           538 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved3[12];
uint8_t           540 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  actual_dif[8];
uint8_t           541 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  expected_dif[8];
uint8_t           557 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_type;		    /* Entry type. */
uint8_t           558 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_count;		    /* Entry count. */
uint8_t           559 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 sys_define;		    /* System defined. */
uint8_t           560 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_status;		    /* Entry Status. */
uint8_t           561 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved_1[6];
uint8_t           563 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved_2[2];
uint8_t           564 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  vp_index;
uint8_t           565 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved_3:4;
uint8_t           566 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  sof_type:4;
uint8_t           569 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved_4[16];
uint8_t           577 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  seq_id_last;
uint8_t           578 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  seq_id_valid;
uint8_t           588 drivers/scsi/qla2xxx/qla_target.h 	uint8_t vendor_uniq;
uint8_t           589 drivers/scsi/qla2xxx/qla_target.h 	uint8_t reason_expl;
uint8_t           590 drivers/scsi/qla2xxx/qla_target.h 	uint8_t reason_code;
uint8_t           593 drivers/scsi/qla2xxx/qla_target.h 	uint8_t reserved;
uint8_t           603 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_type;		    /* Entry type. */
uint8_t           604 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_count;		    /* Entry count. */
uint8_t           605 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 sys_define;		    /* System defined. */
uint8_t           606 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_status;		    /* Entry Status. */
uint8_t           612 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  vp_index;
uint8_t           613 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved_3:4;
uint8_t           614 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  sof_type:4;
uint8_t           633 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_type;		    /* Entry type. */
uint8_t           634 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_count;		    /* Entry count. */
uint8_t           635 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 sys_define;		    /* System defined. */
uint8_t           636 drivers/scsi/qla2xxx/qla_target.h 	uint8_t	 entry_status;		    /* Entry Status. */
uint8_t           643 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved_2;
uint8_t           644 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  reserved_3:4;
uint8_t           645 drivers/scsi/qla2xxx/qla_target.h 	uint8_t  sof_type:4;
uint8_t           648 drivers/scsi/qla2xxx/qla_target.h 	uint8_t reserved_4[8];
uint8_t           759 drivers/scsi/qla2xxx/qla_target.h 				(((const uint8_t *)(sense))[0] & 0x70) == 0x70)
uint8_t           762 drivers/scsi/qla2xxx/qla_target.h 	uint8_t port_name[WWN_SIZE];
uint8_t           771 drivers/scsi/qla2xxx/qla_target.h 	uint8_t cmd_cnt;
uint8_t           855 drivers/scsi/qla2xxx/qla_target.h 	uint8_t cmd_type;
uint8_t           856 drivers/scsi/qla2xxx/qla_target.h 	uint8_t pad[7];
uint8_t           901 drivers/scsi/qla2xxx/qla_target.h 	uint8_t ctx_dsd_alloced;
uint8_t           912 drivers/scsi/qla2xxx/qla_target.h 	uint8_t scsi_status, sense_key, asc, ascq;
uint8_t           915 drivers/scsi/qla2xxx/qla_target.h 	const uint8_t	*cdb;
uint8_t           943 drivers/scsi/qla2xxx/qla_target.h 	uint8_t cmd_type;
uint8_t           944 drivers/scsi/qla2xxx/qla_target.h 	uint8_t pad[3];
uint8_t           946 drivers/scsi/qla2xxx/qla_target.h 	uint8_t fc_tm_rsp;
uint8_t           947 drivers/scsi/qla2xxx/qla_target.h 	uint8_t abort_io_attr;
uint8_t          1046 drivers/scsi/qla2xxx/qla_target.h extern int qlt_xmit_response(struct qla_tgt_cmd *, int, uint8_t);
uint8_t          1056 drivers/scsi/qla2xxx/qla_target.h extern void qlt_24xx_process_atio_queue(struct scsi_qla_host *, uint8_t);
uint8_t          1081 drivers/scsi/qla2xxx/qla_target.h void qlt_send_resp_ctio(struct qla_qpair *, struct qla_tgt_cmd *, uint8_t,
uint8_t          1082 drivers/scsi/qla2xxx/qla_target.h     uint8_t, uint8_t, uint8_t);
uint8_t            47 drivers/scsi/qla2xxx/qla_tmpl.c 	uint8_t value = ~0;
uint8_t           861 drivers/scsi/qla2xxx/qla_tmpl.c 	uint8_t v[] = { 0, 0, 0, 0, 0, 0 };
uint8_t            72 drivers/scsi/qla2xxx/qla_tmpl.h 		uint8_t  capture_flags;
uint8_t            73 drivers/scsi/qla2xxx/qla_tmpl.h 		uint8_t  reserved_2[2];
uint8_t            74 drivers/scsi/qla2xxx/qla_tmpl.h 		uint8_t  driver_flags;
uint8_t            85 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reg_width;
uint8_t            87 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  pci_offset;
uint8_t            93 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  pci_offset;
uint8_t            94 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[3];
uint8_t            99 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reg_width;
uint8_t           101 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  pci_offset;
uint8_t           102 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  banksel_offset;
uint8_t           103 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[3];
uint8_t           110 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[2];
uint8_t           111 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  pci_offset;
uint8_t           112 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  banksel_offset;
uint8_t           117 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t pci_offset;
uint8_t           118 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t reserved[3];
uint8_t           122 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t pci_offset;
uint8_t           123 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t reserved[3];
uint8_t           128 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  ram_area;
uint8_t           129 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[3];
uint8_t           136 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  queue_type;
uint8_t           137 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[3];
uint8_t           159 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  pci_offset;
uint8_t           160 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[3];
uint8_t           165 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  buf_type;
uint8_t           166 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[3];
uint8_t           197 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  queue_type;
uint8_t           198 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  reserved[3];
uint8_t           203 drivers/scsi/qla2xxx/qla_tmpl.h 			uint8_t  buffer[];
uint8_t           111 drivers/scsi/qla4xxx/ql4_83xx.c 			     uint8_t *p_data, int u32_word_count)
uint8_t           161 drivers/scsi/qla4xxx/ql4_83xx.c 				      uint32_t flash_addr, uint8_t *p_data,
uint8_t           587 drivers/scsi/qla4xxx/ql4_83xx.c 					   (uint8_t *)&idc_params, 1);
uint8_t           606 drivers/scsi/qla4xxx/ql4_83xx.c 	uint8_t *phdr;
uint8_t           626 drivers/scsi/qla4xxx/ql4_83xx.c 	uint8_t *p_cache;
uint8_t           714 drivers/scsi/qla4xxx/ql4_83xx.c 	uint8_t retries;
uint8_t           777 drivers/scsi/qla4xxx/ql4_83xx.c 	uint8_t *p_buff;
uint8_t           209 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t shl;
uint8_t           210 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t shr;
uint8_t           211 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t index_a;
uint8_t           212 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t rsvd;
uint8_t           234 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t *buff;
uint8_t           235 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t *stop_offset;
uint8_t           236 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t *start_offset;
uint8_t           237 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t *init_offset;
uint8_t           239 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t seq_end;
uint8_t           240 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t template_end;
uint8_t           261 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t stride;
uint8_t           262 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t stride2;
uint8_t           278 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t stride_1;
uint8_t           279 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t stride_2;
uint8_t           311 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t select_value_stride;
uint8_t           312 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t data_size;
uint8_t           313 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t rsvd[2];
uint8_t           352 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t rsvd[2];
uint8_t           354 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t rsvd2[12];
uint8_t           362 drivers/scsi/qla4xxx/ql4_83xx.h 		uint8_t rsvd[2];
uint8_t           368 drivers/scsi/qla4xxx/ql4_83xx.h 	uint8_t rsvd[24];
uint8_t            22 drivers/scsi/qla4xxx/ql4_bsg.c 	uint8_t *flash = NULL;
uint8_t            88 drivers/scsi/qla4xxx/ql4_bsg.c 	uint8_t *flash = NULL;
uint8_t           210 drivers/scsi/qla4xxx/ql4_bsg.c 	uint8_t *nvram = NULL;
uint8_t           282 drivers/scsi/qla4xxx/ql4_bsg.c 	uint8_t *nvram = NULL;
uint8_t           394 drivers/scsi/qla4xxx/ql4_bsg.c 	uint8_t *acb = NULL;
uint8_t           455 drivers/scsi/qla4xxx/ql4_bsg.c 	uint8_t *rsp_ptr = NULL;
uint8_t           495 drivers/scsi/qla4xxx/ql4_bsg.c 	rsp_ptr = ((uint8_t *)bsg_reply) + sizeof(struct iscsi_bsg_reply);
uint8_t           659 drivers/scsi/qla4xxx/ql4_bsg.c 	uint8_t *rsp_ptr = NULL;
uint8_t           723 drivers/scsi/qla4xxx/ql4_bsg.c 	rsp_ptr = ((uint8_t *)bsg_reply) + sizeof(struct iscsi_bsg_reply);
uint8_t            16 drivers/scsi/qla4xxx/ql4_dbg.c 	uint8_t *c = b;
uint8_t            35 drivers/scsi/qla4xxx/ql4_dbg.c 	uint8_t i;
uint8_t            46 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, mailbox[i]), i,
uint8_t            51 drivers/scsi/qla4xxx/ql4_dbg.c 	    (uint8_t) offsetof(struct isp_reg, flash_address),
uint8_t            54 drivers/scsi/qla4xxx/ql4_dbg.c 	    (uint8_t) offsetof(struct isp_reg, flash_data),
uint8_t            57 drivers/scsi/qla4xxx/ql4_dbg.c 	    (uint8_t) offsetof(struct isp_reg, ctrl_status),
uint8_t            62 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u1.isp4010.nvram),
uint8_t            66 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.intr_mask),
uint8_t            69 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram),
uint8_t            72 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.semaphore),
uint8_t            76 drivers/scsi/qla4xxx/ql4_dbg.c 	    (uint8_t) offsetof(struct isp_reg, req_q_in),
uint8_t            79 drivers/scsi/qla4xxx/ql4_dbg.c 	    (uint8_t) offsetof(struct isp_reg, rsp_q_out),
uint8_t            84 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4010.ext_hw_conf),
uint8_t            87 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4010.port_ctrl),
uint8_t            90 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4010.port_status),
uint8_t            93 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4010.req_q_out),
uint8_t            96 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out),
uint8_t            99 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_in),
uint8_t           101 drivers/scsi/qla4xxx/ql4_dbg.c 		printk(KERN_INFO "0x%02X port_err_status  = 0x%08X\n", (uint8_t)
uint8_t           106 drivers/scsi/qla4xxx/ql4_dbg.c 		printk(KERN_INFO "0x%02X ext_hw_conf      = 0x%08X\n", (uint8_t)
uint8_t           109 drivers/scsi/qla4xxx/ql4_dbg.c 		printk(KERN_INFO "0x%02X port_ctrl        = 0x%08X\n", (uint8_t)
uint8_t           112 drivers/scsi/qla4xxx/ql4_dbg.c 		printk(KERN_INFO "0x%02X port_status      = 0x%08X\n", (uint8_t)
uint8_t           116 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_out),
uint8_t           119 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in),
uint8_t           121 drivers/scsi/qla4xxx/ql4_dbg.c 		printk(KERN_INFO "0x%02X port_err_status  = 0x%08X\n", (uint8_t)
uint8_t           128 drivers/scsi/qla4xxx/ql4_dbg.c 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p1.req_q_out),
uint8_t           234 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t state;		/* (1) Status flags. */
uint8_t           245 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t err_id;		/* error id */
uint8_t           257 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t *req_sense_ptr;
uint8_t           323 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t flash_isid[6];
uint8_t           336 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t isid[6];
uint8_t           370 drivers/scsi/qla4xxx/ql4_def.h 			uint8_t data[0];
uint8_t           376 drivers/scsi/qla4xxx/ql4_def.h 			uint8_t data[0];
uint8_t           461 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_addr_state;
uint8_t           462 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ip_address[IP_ADDR_LEN];
uint8_t           463 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t subnet_mask[IP_ADDR_LEN];
uint8_t           464 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t gateway[IP_ADDR_LEN];
uint8_t           467 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_link_local_state;
uint8_t           468 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_addr0_state;
uint8_t           469 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_addr1_state;
uint8_t           470 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_default_router_state;
uint8_t           479 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t control;
uint8_t           481 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t tcp_wsf;
uint8_t           482 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_tcp_wsf;
uint8_t           483 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_tos;
uint8_t           484 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_cache_id;
uint8_t           485 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_cache_id;
uint8_t           486 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_alt_cid_len;
uint8_t           487 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_alt_cid[11];
uint8_t           488 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_vid_len;
uint8_t           489 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_vid[11];
uint8_t           490 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv4_ttl;
uint8_t           492 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_traffic_class;
uint8_t           493 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_hop_limit;
uint8_t           497 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t ipv6_dup_addr_detect_count;
uint8_t           500 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t abort_timer;
uint8_t           506 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t iscsi_name[224];
uint8_t           648 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t alias[32];
uint8_t           649 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t name_string[256];
uint8_t           650 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t heartbeat_interval;
uint8_t           653 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t my_mac[MAC_ADDR_LEN];
uint8_t           654 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t serial_number[16];
uint8_t           714 drivers/scsi/qla4xxx/ql4_def.h 	volatile uint8_t mbox_status_count;
uint8_t           723 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t acb_version;
uint8_t           728 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t *nx_db_rd_ptr;		/* Doorbell read pointer */
uint8_t           746 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t revision_id;
uint8_t           779 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t *chap_list; /* CHAP table cache */
uint8_t           791 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t model_name[16];
uint8_t           826 drivers/scsi/qla4xxx/ql4_def.h 	uint8_t iocb_req_cnt;
uint8_t           296 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t sig[4];
uint8_t           300 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t unused1[2];
uint8_t           301 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t model[16];
uint8_t           304 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t flags;
uint8_t           305 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t erase_cmd;
uint8_t           306 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t alt_erase_cmd;
uint8_t           307 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t wrt_enable_cmd;
uint8_t           308 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t wrt_enable_bits;
uint8_t           309 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t wrt_sts_reg_cmd;
uint8_t           310 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t unprotect_sec_cmd;
uint8_t           311 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t read_man_id_cmd;
uint8_t           316 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t read_id_addr_len;
uint8_t           317 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t wrt_disable_bits;
uint8_t           318 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t read_dev_id_len;
uint8_t           319 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t chip_erase_cmd;
uint8_t           321 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t protect_sec_cmd;
uint8_t           322 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t unused2[65];
uint8_t           328 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t sig[4];
uint8_t           331 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t version;
uint8_t           332 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t unused[5];
uint8_t           557 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t version;	/* 00 */
uint8_t           560 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t control;	/* 01 */
uint8_t           571 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t zio_count;	/* 06 */
uint8_t           572 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res0;	/* 07 */
uint8_t           578 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t hb_interval;	/* 0C */
uint8_t           579 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t inst_num; /* 0D */
uint8_t           629 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_tos;	/* 38 */
uint8_t           630 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_ttl;	/* 39 */
uint8_t           631 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t acb_version;	/* 3A */
uint8_t           636 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res2;	/* 3B */
uint8_t           646 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_addr[4];	/* 50-53 */
uint8_t           648 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_addr_state;	/* 56 */
uint8_t           649 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_cacheid;	/* 57 */
uint8_t           650 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res6[8];	/* 58-5F */
uint8_t           651 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_subnet[4];	/* 60-63 */
uint8_t           652 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res7[12];	/* 64-6F */
uint8_t           653 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_gw_addr[4];	/* 70-73 */
uint8_t           654 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res8[0xc];	/* 74-7F */
uint8_t           655 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t pri_dns_srvr_ip[4];/* 80-83 */
uint8_t           656 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t sec_dns_srvr_ip[4];/* 84-87 */
uint8_t           659 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res9[4];	/* 8C-8F */
uint8_t           660 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t iscsi_alias[32];/* 90-AF */
uint8_t           661 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res9_1[0x16];	/* B0-C5 */
uint8_t           663 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t abort_timer;	/* C8	 */
uint8_t           664 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_tcp_wsf;	/* C9	 */
uint8_t           665 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res10[6];	/* CA-CF */
uint8_t           666 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_sec_ip_addr[4];	/* D0-D3 */
uint8_t           667 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_vid_len;	/* D4 */
uint8_t           668 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_vid[11];	/* D5-DF */
uint8_t           669 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res11[20];	/* E0-F3 */
uint8_t           670 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_alt_cid_len;	/* F4 */
uint8_t           671 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_alt_cid[11];	/* F5-FF */
uint8_t           672 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t iscsi_name[224];	/* 100-1DF */
uint8_t           673 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res12[32];	/* 1E0-1FF */
uint8_t           695 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_tcp_wsf;	/* 20C */
uint8_t           697 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_dflt_rtr_addr[16]; /* 210-21F */
uint8_t           699 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_lnk_lcl_addr_state;/* 222 */
uint8_t           700 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr0_state;	/* 223 */
uint8_t           701 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr1_state;	/* 224 */
uint8_t           702 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_dflt_rtr_state;    /* 225 */
uint8_t           708 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_traffic_class;	/* 226 */
uint8_t           709 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_hop_limit;	/* 227 */
uint8_t           710 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_if_id[8];	/* 228-22F */
uint8_t           711 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr0[16];	/* 230-23F */
uint8_t           712 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr1[16];	/* 240-24F */
uint8_t           716 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_dup_addr_detect_count;	/* 25C */
uint8_t           717 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_cache_id;	/* 25D */
uint8_t           718 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res13[18];	/* 25E-26F */
uint8_t           720 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res14[140];	/* 274-2FF */
uint8_t           739 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved1[1];	/* 00 */
uint8_t           740 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t control;	/* 01 */
uint8_t           741 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved2[11];	/* 02-0C */
uint8_t           742 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t inst_num;	/* 0D */
uint8_t           743 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved3[34];	/* 0E-2F */
uint8_t           748 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_tos;	/* 38 */
uint8_t           749 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_ttl;	/* 39 */
uint8_t           750 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved4[2];	/* 3A-3B */
uint8_t           753 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved5[4];	/* 40-43 */
uint8_t           755 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved6[2];	/* 46-47 */
uint8_t           758 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved7[4];	/* 4C-4F */
uint8_t           759 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_addr[4];	/* 50-53 */
uint8_t           761 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_addr_state;	/* 56 */
uint8_t           762 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_cacheid;	/* 57 */
uint8_t           763 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved8[8];	/* 58-5F */
uint8_t           764 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_subnet[4];	/* 60-63 */
uint8_t           765 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved9[12];	/* 64-6F */
uint8_t           766 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_gw_addr[4];	/* 70-73 */
uint8_t           767 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved10[84];	/* 74-C7 */
uint8_t           768 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t abort_timer;	/* C8    */
uint8_t           769 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_tcp_wsf;	/* C9    */
uint8_t           770 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved11[10];	/* CA-D3 */
uint8_t           771 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_vid_len;	/* D4 */
uint8_t           772 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_vid[11];	/* D5-DF */
uint8_t           773 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved12[20];	/* E0-F3 */
uint8_t           774 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_alt_cid_len;	/* F4 */
uint8_t           775 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_dhcp_alt_cid[11];	/* F5-FF */
uint8_t           776 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t iscsi_name[224];	/* 100-1DF */
uint8_t           777 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved13[32];	/* 1E0-1FF */
uint8_t           783 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_tcp_wsf;		/* 20C */
uint8_t           785 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_dflt_rtr_addr[16];	/* 210-21F */
uint8_t           787 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_lnk_lcl_addr_state;	/* 222 */
uint8_t           788 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr0_state;	/* 223 */
uint8_t           789 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr1_state;	/* 224 */
uint8_t           790 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_dflt_rtr_state;	/* 225 */
uint8_t           791 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_traffic_class;	/* 226 */
uint8_t           792 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_hop_limit;		/* 227 */
uint8_t           793 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_if_id[8];		/* 228-22F */
uint8_t           794 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr0[16];		/* 230-23F */
uint8_t           795 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_addr1[16];		/* 240-24F */
uint8_t           799 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_dup_addr_detect_count;	/* 25C */
uint8_t           800 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv6_cache_id;		/* 25D */
uint8_t           801 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved14[18];		/* 25E-26F */
uint8_t           803 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved15[140];	/* 274-2FF */
uint8_t           815 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t flags;
uint8_t           816 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t secret_len;
uint8_t           819 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t secret[MAX_CHAP_SECRET_LEN];
uint8_t           821 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t name[MAX_CHAP_NAME_LEN];
uint8_t           881 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t isid[6];	/* 20-25 big-endian, must be converted
uint8_t           888 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ip_addr[0x10];	/* 30-3F */
uint8_t           889 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t iscsi_alias[0x20];	/* 40-5F */
uint8_t           890 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t tgt_addr[0x20];	/* 60-7F */
uint8_t           894 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t ipv4_tos;	/* 86 */
uint8_t           896 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res4[0x36];	/* 8A-BF */
uint8_t           897 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t iscsi_name[0xE0];	/* C0-19F : xxzzy Make this a
uint8_t           901 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t link_local_ipv6_addr[0x10]; /* 1A0-1AF */
uint8_t           902 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res5[0x10];	/* 1B0-1BF */
uint8_t           908 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t tcp_xmt_wsf;	/* 1C6 */
uint8_t           909 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t tcp_rcv_wsf;	/* 1C7 */
uint8_t           912 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res6[0x2b];	/* 1D0-1FB */
uint8_t           937 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t address[6];	/* 00-05 */
uint8_t           938 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t filler[2];	/* 06-07 */
uint8_t           945 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t vendorId[128];	/* 28-A7 */
uint8_t           946 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t productId[128]; /* A8-127 */
uint8_t           963 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t acSerialNumber[16];	/* 150-15f */
uint8_t           973 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t board_id_str[16];   /*  0-f  Keep board ID string first */
uint8_t           979 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t mac_addr[6];	/* 16-1b MAC address for this PCI function */
uint8_t           983 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved[12];		  /* 34-3f */
uint8_t           991 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t fw_build_date[16];	/* 08 - 17 ASCII String */
uint8_t           992 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t fw_build_time[16];	/* 18 - 27 ASCII String */
uint8_t           993 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t fw_build_user[16];	/* 28 - 37 ASCII String */
uint8_t           999 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved1[6];		/* 3A - 3F */
uint8_t          1006 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t extended_timestamp[180];/* 4C - FF */
uint8_t          1015 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t build_date[16]; /* 08 - 17 */
uint8_t          1016 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t build_time[16]; /* 18 - 27 */
uint8_t          1017 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t build_user[16]; /* 28 - 37 */
uint8_t          1018 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t card_serial_num[16];	/* 38 - 47 */
uint8_t          1028 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved1[28];	/* 58 - 7F */
uint8_t          1030 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t out_RISC_reg_dump[256]; /* 80 -17F */
uint8_t          1031 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t in_RISC_reg_dump[256];	/*180 -27F */
uint8_t          1032 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t in_out_RISC_stack_dump[0];	/*280 - ??? */
uint8_t          1041 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t event_type;	/* 0C - 0C  */
uint8_t          1042 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t error_code;	/* 0D - 0D  */
uint8_t          1044 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t num_consecutive_events; /* 10 - 10  */
uint8_t          1045 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t rsvd[3];	/* 11 - 13  */
uint8_t          1059 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t entryType;
uint8_t          1070 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t entryStatus;
uint8_t          1071 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t systemDefined;
uint8_t          1073 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t entryCount;
uint8_t          1080 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t data[60];
uint8_t          1112 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t control_flags;	/* 0C */
uint8_t          1129 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t state_flags;	/* 0D */
uint8_t          1130 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t cmdRefNum;	/* 0E */
uint8_t          1131 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved1;	/* 0F */
uint8_t          1132 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t cdb[IOCB_MAX_CDB_LEN];	/* 10-1F */
uint8_t          1184 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t scsiStatus;	/* 08 */
uint8_t          1187 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t iscsiFlags;	/* 09 */
uint8_t          1191 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t iscsiResponse;	/* 0A */
uint8_t          1193 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t completionStatus;	/* 0B */
uint8_t          1205 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved1;	/* 0C */
uint8_t          1209 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t state_flags;	/* 0D */
uint8_t          1216 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t senseData[IOCB_MAX_SENSEDATA_LEN];	/* 20-3F */
uint8_t          1223 drivers/scsi/qla4xxx/ql4_fw.h        uint8_t ext_sense_data[IOCB_MAX_EXT_SENSEDATA_LEN]; /* 04-63 */
uint8_t          1246 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res2[20];	/* 2C-3F */
uint8_t          1255 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t completionStatus;	/* 0C */
uint8_t          1258 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t residualFlags;	/* 0D */
uint8_t          1262 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res1[10];	/* 12-1B */
uint8_t          1264 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res2[12];	/* 20-2B */
uint8_t          1266 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t res4[16];	/* 30-3F */
uint8_t          1287 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t data[60];
uint8_t          1409 drivers/scsi/qla4xxx/ql4_fw.h 	uint8_t reserved2[264]; /* 0x0308 - 0x040F */
uint8_t            21 drivers/scsi/qla4xxx/ql4_glbl.h void qla4xxx_process_aen(struct scsi_qla_host *ha, uint8_t process_aen);
uint8_t            50 drivers/scsi/qla4xxx/ql4_glbl.h uint8_t qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
uint8_t            82 drivers/scsi/qla4xxx/ql4_glbl.h int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
uint8_t            83 drivers/scsi/qla4xxx/ql4_glbl.h 		uint8_t outCount, uint32_t *mbx_cmd, uint32_t *mbx_sts);
uint8_t           105 drivers/scsi/qla4xxx/ql4_glbl.h uint8_t qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
uint8_t           189 drivers/scsi/qla4xxx/ql4_glbl.h 			  uint32_t data_size, uint8_t *data);
uint8_t           191 drivers/scsi/qla4xxx/ql4_glbl.h 		      uint32_t payload_size, uint32_t pid, uint8_t *ipaddr);
uint8_t           194 drivers/scsi/qla4xxx/ql4_glbl.h 			       uint32_t data_size, uint8_t *data);
uint8_t           247 drivers/scsi/qla4xxx/ql4_glbl.h 				      uint32_t flash_addr, uint8_t *p_data,
uint8_t           252 drivers/scsi/qla4xxx/ql4_glbl.h 			     uint8_t *p_data, int u32_word_count);
uint8_t           278 drivers/scsi/qla4xxx/ql4_glbl.h uint8_t qla4xxx_set_ipaddr_state(uint8_t fw_ipaddr_state);
uint8_t            17 drivers/scsi/qla4xxx/ql4_init.c 	uint8_t func_number;
uint8_t            25 drivers/scsi/qla4xxx/ql4_init.c 	func_number = (uint8_t) ((value >> 4) & 0x30);
uint8_t           203 drivers/scsi/qla4xxx/ql4_init.c static uint8_t
uint8_t           206 drivers/scsi/qla4xxx/ql4_init.c 	uint8_t ipv4_wait = 0;
uint8_t           207 drivers/scsi/qla4xxx/ql4_init.c 	uint8_t ipv6_wait = 0;
uint8_t            90 drivers/scsi/qla4xxx/ql4_iocb.c 	uint8_t status = QLA_SUCCESS;
uint8_t           130 drivers/scsi/qla4xxx/ql4_iocb.c 	cont_entry->hdr.systemDefined = (uint8_t) cpu_to_le16(ha->request_in);
uint8_t           413 drivers/scsi/qla4xxx/ql4_iocb.c 		memcpy((uint8_t *)task_data->req_buffer +
uint8_t           508 drivers/scsi/qla4xxx/ql4_iocb.c 		      uint32_t payload_size, uint32_t pid, uint8_t *ipaddr)
uint8_t           118 drivers/scsi/qla4xxx/ql4_isr.c 	uint8_t scsi_status;
uint8_t           455 drivers/scsi/qla4xxx/ql4_isr.c 					(uint8_t *) mbox_sts_entry->out_mbox);
uint8_t           613 drivers/scsi/qla4xxx/ql4_isr.c 	uint8_t ipaddr_state;
uint8_t           614 drivers/scsi/qla4xxx/ql4_isr.c 	uint8_t ip_idx;
uint8_t           617 drivers/scsi/qla4xxx/ql4_isr.c 	ipaddr_state = qla4xxx_set_ipaddr_state((uint8_t)ipaddr_fw_state);
uint8_t           743 drivers/scsi/qla4xxx/ql4_isr.c 					      (uint8_t *) mbox_sts);
uint8_t           761 drivers/scsi/qla4xxx/ql4_isr.c 					      (uint8_t *) mbox_sts);
uint8_t          1102 drivers/scsi/qla4xxx/ql4_isr.c     uint8_t reqs_count)
uint8_t          1127 drivers/scsi/qla4xxx/ql4_isr.c 	uint8_t reqs_count = 0;
uint8_t          1224 drivers/scsi/qla4xxx/ql4_isr.c 	uint8_t reqs_count = 0;
uint8_t          1397 drivers/scsi/qla4xxx/ql4_isr.c 	uint8_t reqs_count = 0;
uint8_t          1474 drivers/scsi/qla4xxx/ql4_isr.c void qla4xxx_process_aen(struct scsi_qla_host * ha, uint8_t process_aen)
uint8_t            83 drivers/scsi/qla4xxx/ql4_mbx.c int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
uint8_t            84 drivers/scsi/qla4xxx/ql4_mbx.c 			    uint8_t outCount, uint32_t *mbx_cmd,
uint8_t            88 drivers/scsi/qla4xxx/ql4_mbx.c 	uint8_t i;
uint8_t           371 drivers/scsi/qla4xxx/ql4_mbx.c static uint8_t
uint8_t           398 drivers/scsi/qla4xxx/ql4_mbx.c uint8_t
uint8_t           420 drivers/scsi/qla4xxx/ql4_mbx.c uint8_t qla4xxx_set_ipaddr_state(uint8_t fw_ipaddr_state)
uint8_t           422 drivers/scsi/qla4xxx/ql4_mbx.c 	uint8_t ipaddr_state;
uint8_t           583 drivers/scsi/qla4xxx/ql4_mbx.c uint8_t
uint8_t          1079 drivers/scsi/qla4xxx/ql4_mbx.c 	uint8_t		i;
uint8_t          1132 drivers/scsi/qla4xxx/ql4_mbx.c 				qla4xxx_dump_buffer((uint8_t *)event_log+
uint8_t          1141 drivers/scsi/qla4xxx/ql4_mbx.c 				qla4xxx_dump_buffer((uint8_t *)event_log+
uint8_t          1146 drivers/scsi/qla4xxx/ql4_mbx.c 				qla4xxx_dump_buffer((uint8_t *)event_log+
uint8_t            74 drivers/scsi/qla4xxx/ql4_nvram.h 	uint8_t bootID0:7;
uint8_t            75 drivers/scsi/qla4xxx/ql4_nvram.h 	uint8_t bootID0Valid:1;
uint8_t            76 drivers/scsi/qla4xxx/ql4_nvram.h 	uint8_t bootLUN0[8];
uint8_t            77 drivers/scsi/qla4xxx/ql4_nvram.h 	uint8_t bootID1:7;
uint8_t            78 drivers/scsi/qla4xxx/ql4_nvram.h 	uint8_t bootID1Valid:1;
uint8_t            79 drivers/scsi/qla4xxx/ql4_nvram.h 	uint8_t bootLUN1[8];
uint8_t            81 drivers/scsi/qla4xxx/ql4_nvram.h 	uint8_t Reserved1[10];
uint8_t          1441 drivers/scsi/qla4xxx/ql4_nx.c 		*(uint8_t  *)data = val;
uint8_t          1495 drivers/scsi/qla4xxx/ql4_nx.c 		tmpw = *((uint8_t *)data);
uint8_t          2036 drivers/scsi/qla4xxx/ql4_nx.c 	uint8_t *data_ptr = (uint8_t *)*d_ptr;
uint8_t          2646 drivers/scsi/qla4xxx/ql4_nx.c 	uint8_t stride, stride2;
uint8_t          2742 drivers/scsi/qla4xxx/ql4_nx.c 	uint8_t stride1, stride2;
uint8_t          3025 drivers/scsi/qla4xxx/ql4_nx.c 	data_ptr = (uint32_t *)((uint8_t *)ha->fw_dump +
uint8_t          3046 drivers/scsi/qla4xxx/ql4_nx.c 					(((uint8_t *)ha->fw_dump_tmplt_hdr) +
uint8_t          3198 drivers/scsi/qla4xxx/ql4_nx.c 		data_collected = (uint8_t *)data_ptr - (uint8_t *)ha->fw_dump;
uint8_t          3202 drivers/scsi/qla4xxx/ql4_nx.c 				(((uint8_t *)entry_hdr) +
uint8_t          3694 drivers/scsi/qla4xxx/ql4_nx.c static uint8_t *
uint8_t          3695 drivers/scsi/qla4xxx/ql4_nx.c qla4_82xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
uint8_t          3736 drivers/scsi/qla4xxx/ql4_nx.c 		qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring,
uint8_t          3740 drivers/scsi/qla4xxx/ql4_nx.c 						  (uint8_t *)ha->request_ring,
uint8_t          3848 drivers/scsi/qla4xxx/ql4_nx.c 	qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring,
uint8_t          3905 drivers/scsi/qla4xxx/ql4_nx.c 	qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring,
uint8_t           895 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t entry_capture_mask;
uint8_t           896 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t entry_code;
uint8_t           897 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t driver_code;
uint8_t           898 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t driver_flags;
uint8_t           907 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t addr_stride;
uint8_t           908 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t state_index_a;
uint8_t           915 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t opcode;
uint8_t           916 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t state_index_v;
uint8_t           917 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t shl;
uint8_t           918 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t shr;
uint8_t           938 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t poll_mask;
uint8_t           939 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t poll_wait;
uint8_t           943 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t read_addr_stride;
uint8_t           944 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t read_addr_cnt;
uint8_t          1005 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t read_addr_stride;
uint8_t          1006 drivers/scsi/qla4xxx/ql4_nx.h 		uint8_t read_addr_cnt;
uint8_t           140 drivers/scsi/qla4xxx/ql4_os.c static int qla4xxx_alloc_pdu(struct iscsi_task *, uint8_t);
uint8_t           290 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t ipaddr[IPv6_ADDR_LEN];
uint8_t           600 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t *chap_flash_data = NULL;
uint8_t          2951 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t dst_ipaddr[IPv6_ADDR_LEN];
uint8_t          3322 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t *data;
uint8_t          3359 drivers/scsi/qla4xxx/ql4_os.c static int qla4xxx_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
uint8_t          3673 drivers/scsi/qla4xxx/ql4_os.c 	fw_ddb_entry->tcp_xmt_wsf = (uint8_t) cpu_to_le32(conn->tcp_xmit_wsf);
uint8_t          3674 drivers/scsi/qla4xxx/ql4_os.c 	fw_ddb_entry->tcp_rcv_wsf = (uint8_t) cpu_to_le32(conn->tcp_recv_wsf);
uint8_t          4824 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t reset_chip = 0;
uint8_t          5196 drivers/scsi/qla4xxx/ql4_os.c 			  uint32_t data_size, uint8_t *data)
uint8_t          5215 drivers/scsi/qla4xxx/ql4_os.c 			       uint32_t data_size, uint8_t *data)
uint8_t          5375 drivers/scsi/qla4xxx/ql4_os.c 			uint8_t wait_time = RESET_INTR_TOV;
uint8_t          5530 drivers/scsi/qla4xxx/ql4_os.c 				    ((uint8_t *)ha->nx_pcibase + 0xbc000 +
uint8_t          5536 drivers/scsi/qla4xxx/ql4_os.c 				    ((uint8_t *)ha->nx_pcibase);
uint8_t          5890 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t val;
uint8_t          5891 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t *buf = NULL;
uint8_t          5892 drivers/scsi/qla4xxx/ql4_os.c 	size_t size = 13 * sizeof(uint8_t);
uint8_t          5955 drivers/scsi/qla4xxx/ql4_os.c 				      13 * sizeof(uint8_t)) != QLA_SUCCESS) {
uint8_t          6273 drivers/scsi/qla4xxx/ql4_os.c 				      uint8_t *flash_isid)
uint8_t          6299 drivers/scsi/qla4xxx/ql4_os.c 				     uint8_t is_isid_compare)
uint8_t          6393 drivers/scsi/qla4xxx/ql4_os.c static int qla4xxx_check_existing_isid(struct list_head *list_nt, uint8_t *isid)
uint8_t          6423 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t base_value, i;
uint8_t          8265 drivers/scsi/qla4xxx/ql4_os.c 						*(uint8_t *)fnode_param->value;
uint8_t          8269 drivers/scsi/qla4xxx/ql4_os.c 						*(uint8_t *)fnode_param->value;
uint8_t          8606 drivers/scsi/qla4xxx/ql4_os.c 	uint8_t init_retry_count = 0;
uint8_t          2482 drivers/scsi/scsi_transport_iscsi.c 			   uint8_t *data)
uint8_t          2513 drivers/scsi/scsi_transport_iscsi.c 			   uint8_t *data)
uint8_t            44 drivers/scsi/ufs/ufs_bsg.c 				     uint8_t **desc_buff, int *desc_len,
uint8_t            90 drivers/scsi/ufs/ufs_bsg.c 	uint8_t *desc_buff = NULL;
uint8_t            82 drivers/scsi/xen-scsifront.c 	uint8_t nr_segments;
uint8_t           214 drivers/scsi/xen-scsifront.c 	ring_req->sc_data_direction   = (uint8_t)sc->sc_data_direction;
uint8_t           253 drivers/scsi/xen-scsifront.c 	uint8_t sense_len;
uint8_t           267 drivers/scsi/xen-scsifront.c 	sense_len = min_t(uint8_t, VSCSIIF_SENSE_BUFFERSIZE,
uint8_t           501 drivers/scsi/xen-scsifront.c 		shadow->nr_segments = (uint8_t)ref_cnt;
uint8_t           581 drivers/scsi/xen-scsifront.c static int scsifront_action_handler(struct scsi_cmnd *sc, uint8_t act)
uint8_t           194 drivers/slimbus/qcom-ngd-ctrl.c 	uint8_t mode_valid;
uint8_t           204 drivers/slimbus/qcom-ngd-ctrl.c 	uint8_t resp_type_valid;
uint8_t           226 drivers/slimbus/qcom-ngd-ctrl.c 		.elem_size  = sizeof(uint8_t),
uint8_t           290 drivers/slimbus/qcom-ngd-ctrl.c 		.elem_size  = sizeof(uint8_t),
uint8_t            70 drivers/soc/bcm/brcmstb/pm/aon_defs.h 	uint8_t scratch[BOOTLOADER_SCRATCH_SIZE];
uint8_t            98 drivers/soc/bcm/brcmstb/pm/aon_defs.h 	uint8_t descriptors[IMAGE_DESCRIPTORS_BUFSIZE];
uint8_t            32 drivers/soc/qcom/apr.c 	uint8_t buf[];
uint8_t            96 drivers/spi/spi-axi-spi-engine.c 	const uint8_t *tx_buf;
uint8_t           100 drivers/spi/spi-axi-spi-engine.c 	uint8_t *rx_buf;
uint8_t           311 drivers/spi/spi-axi-spi-engine.c 	const uint8_t *buf;
uint8_t           333 drivers/spi/spi-axi-spi-engine.c 	uint8_t *buf;
uint8_t           109 drivers/spi/spi-st-ssc4.c 				*spi_st->rx_ptr++ = (uint8_t)word;
uint8_t            40 drivers/spi/spi-xcomm.c 	uint8_t buf[63];
uint8_t            46 drivers/spi/spi-xcomm.c 	uint8_t *buf = spi_xcomm->buf;
uint8_t            10 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c typedef uint8_t u8;
uint8_t            63 drivers/staging/fbtft/fb_ssd1325.c static uint8_t rgb565_to_g16(u16 pixel)
uint8_t            72 drivers/staging/fbtft/fb_ssd1325.c 	return (uint8_t)pixel / 16;
uint8_t           125 drivers/staging/octeon/octeon-stubs.h 		uint8_t unused;
uint8_t           191 drivers/staging/octeon/octeon-stubs.h 	uint8_t packet_data[96];
uint8_t            75 drivers/staging/uwb/ie.c 		d = (uint8_t *)ie + sizeof(struct uwb_ie_hdr);
uint8_t           965 drivers/staging/wlan-ng/prism2fw.c 			s3data[ns3data].data = (uint8_t *)record->data;
uint8_t            56 drivers/staging/wusbcore/host/whci/pzl.c 	uint8_t bInterval = qset->ep->desc.bInterval;
uint8_t            47 drivers/staging/wusbcore/host/whci/qset.c 	uint8_t phy_rate;
uint8_t           251 drivers/staging/wusbcore/host/whci/whci-hc.h 	uint8_t max_burst;
uint8_t           252 drivers/staging/wusbcore/host/whci/whci-hc.h 	uint8_t max_seq;
uint8_t           146 drivers/staging/wusbcore/wusbhc.c 	uint8_t phy_rate;
uint8_t           175 drivers/staging/wusbcore/wusbhc.c 	uint8_t num_slots, interval;
uint8_t           204 drivers/staging/wusbcore/wusbhc.c 	uint8_t retry_count;
uint8_t           212 drivers/staging/wusbcore/wusbhc.c 	wusbhc->retry_count = max_t(uint8_t, retry_count,
uint8_t           241 drivers/staging/wusbcore/wusbhc.h 	uint8_t phy_rate;
uint8_t           242 drivers/staging/wusbcore/wusbhc.h 	uint8_t dnts_num_slots;
uint8_t           243 drivers/staging/wusbcore/wusbhc.h 	uint8_t dnts_interval;
uint8_t           244 drivers/staging/wusbcore/wusbhc.h 	uint8_t retry_count;
uint8_t           667 drivers/target/target_core_spc.c 	uint8_t		page;
uint8_t           921 drivers/target/target_core_spc.c 	uint8_t		page;
uint8_t           922 drivers/target/target_core_spc.c 	uint8_t		subpage;
uint8_t            66 drivers/tty/hvc/hvsi.c 	uint8_t throttle_buf[128];
uint8_t            67 drivers/tty/hvc/hvsi.c 	uint8_t outbuf[N_OUTBUF]; /* to implement write_room and chars_in_buffer */
uint8_t            69 drivers/tty/hvc/hvsi.c 	uint8_t inbuf[HVSI_MAX_PACKET + HVSI_MAX_READ];
uint8_t            70 drivers/tty/hvc/hvsi.c 	uint8_t *inbuf_end;
uint8_t            77 drivers/tty/hvc/hvsi.c 	uint8_t state;  /* HVSI protocol state */
uint8_t            78 drivers/tty/hvc/hvsi.c 	uint8_t flags;
uint8_t            80 drivers/tty/hvc/hvsi.c 	uint8_t sysrq;
uint8_t           145 drivers/tty/hvc/hvsi.c static inline int len_packet(const uint8_t *packet)
uint8_t           150 drivers/tty/hvc/hvsi.c static inline int is_header(const uint8_t *packet)
uint8_t           156 drivers/tty/hvc/hvsi.c static inline int got_packet(const struct hvsi_struct *hp, uint8_t *packet)
uint8_t           168 drivers/tty/hvc/hvsi.c static void compact_inbuf(struct hvsi_struct *hp, uint8_t *read_to)
uint8_t           188 drivers/tty/hvc/hvsi.c static void dump_hex(const uint8_t *data, int len)
uint8_t           206 drivers/tty/hvc/hvsi.c static void dump_packet(uint8_t *packet)
uint8_t           225 drivers/tty/hvc/hvsi.c static void hvsi_recv_control(struct hvsi_struct *hp, uint8_t *packet,
uint8_t           254 drivers/tty/hvc/hvsi.c static void hvsi_recv_response(struct hvsi_struct *hp, uint8_t *packet)
uint8_t           293 drivers/tty/hvc/hvsi.c 	dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
uint8_t           305 drivers/tty/hvc/hvsi.c static void hvsi_recv_query(struct hvsi_struct *hp, uint8_t *packet)
uint8_t           350 drivers/tty/hvc/hvsi.c static bool hvsi_recv_data(struct hvsi_struct *hp, const uint8_t *packet)
uint8_t           353 drivers/tty/hvc/hvsi.c 	const uint8_t *data = packet + sizeof(struct hvsi_header);
uint8_t           391 drivers/tty/hvc/hvsi.c 	uint8_t *packet = hp->inbuf;
uint8_t           551 drivers/tty/hvc/hvsi.c 	dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
uint8_t           598 drivers/tty/hvc/hvsi.c 	dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
uint8_t           611 drivers/tty/hvc/hvsi.c 	uint8_t buf[HVSI_MAX_READ] __ALIGNED__;
uint8_t           694 drivers/tty/hvc/hvsi.c 	dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
uint8_t           194 drivers/tty/serial/8250/8250_fintek.c 	uint8_t config = 0;
uint8_t            45 drivers/tty/serial/8250/8250_ingenic.c static uint8_t early_in(struct uart_port *port, int offset)
uint8_t            50 drivers/tty/serial/8250/8250_ingenic.c static void early_out(struct uart_port *port, int offset, uint8_t value)
uint8_t            57 drivers/tty/serial/8250/8250_ingenic.c 	uint8_t lsr;
uint8_t            56 drivers/tty/serial/vr41xx_siu.c static uint8_t lsr_break_flag[SIU_PORTS_MAX];
uint8_t            66 drivers/tty/serial/vr41xx_siu.c 	uint8_t irsel;
uint8_t            87 drivers/tty/serial/vr41xx_siu.c 	uint8_t irsel;
uint8_t           108 drivers/tty/serial/vr41xx_siu.c 	uint8_t irsel;
uint8_t           181 drivers/tty/serial/vr41xx_siu.c 	uint8_t lsr;
uint8_t           192 drivers/tty/serial/vr41xx_siu.c 	uint8_t mcr = 0;
uint8_t           210 drivers/tty/serial/vr41xx_siu.c 	uint8_t msr;
uint8_t           229 drivers/tty/serial/vr41xx_siu.c 	uint8_t ier;
uint8_t           243 drivers/tty/serial/vr41xx_siu.c 	uint8_t ier;
uint8_t           257 drivers/tty/serial/vr41xx_siu.c 	uint8_t ier;
uint8_t           273 drivers/tty/serial/vr41xx_siu.c 	uint8_t ier;
uint8_t           287 drivers/tty/serial/vr41xx_siu.c 	uint8_t lcr;
uint8_t           301 drivers/tty/serial/vr41xx_siu.c static inline void receive_chars(struct uart_port *port, uint8_t *status)
uint8_t           303 drivers/tty/serial/vr41xx_siu.c 	uint8_t lsr, ch;
uint8_t           360 drivers/tty/serial/vr41xx_siu.c 	uint8_t msr;
uint8_t           414 drivers/tty/serial/vr41xx_siu.c 	uint8_t iir, lsr;
uint8_t           477 drivers/tty/serial/vr41xx_siu.c 	uint8_t lcr;
uint8_t           506 drivers/tty/serial/vr41xx_siu.c 	uint8_t lcr, fcr, ier;
uint8_t           572 drivers/tty/serial/vr41xx_siu.c 	siu_write(port, UART_DLL, (uint8_t)quot);
uint8_t           573 drivers/tty/serial/vr41xx_siu.c 	siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
uint8_t           728 drivers/tty/serial/vr41xx_siu.c 	uint8_t lsr, msr;
uint8_t           759 drivers/tty/serial/vr41xx_siu.c 	uint8_t ier;
uint8_t          2590 drivers/tty/vt/vt.c 	uint8_t rescan;
uint8_t          2591 drivers/tty/vt/vt.c 	uint8_t inverse;
uint8_t          2592 drivers/tty/vt/vt.c 	uint8_t width;
uint8_t            74 drivers/usb/gadget/function/f_midi.c 	uint8_t cable;
uint8_t            75 drivers/usb/gadget/function/f_midi.c 	uint8_t state;
uint8_t            76 drivers/usb/gadget/function/f_midi.c 	uint8_t data[2];
uint8_t           233 drivers/usb/gadget/function/f_midi.c static const uint8_t f_midi_cin_length[] = {
uint8_t           241 drivers/usb/gadget/function/f_midi.c 			     uint8_t *data, int length)
uint8_t           448 drivers/usb/gadget/function/f_midi.c 				 struct gmidi_in_port *port, uint8_t b)
uint8_t           450 drivers/usb/gadget/function/f_midi.c 	uint8_t p[4] = { port->cable << 4, 0, 0, 0 };
uint8_t           451 drivers/usb/gadget/function/f_midi.c 	uint8_t next_state = STATE_INITIAL;
uint8_t           640 drivers/usb/gadget/function/f_midi.c 			uint8_t b;
uint8_t           479 drivers/usb/serial/ch341.c 	uint8_t *break_reg;
uint8_t           755 drivers/usb/typec/ucsi/ucsi_ccg.c 	memcpy((uint8_t *)&fw_cfg, fw->data + fw->size -
uint8_t           865 drivers/usb/typec/ucsi/ucsi_ccg.c 	memcpy((uint8_t *)&fw_cfg, fw->data + fw->size -
uint8_t           874 drivers/usb/typec/ucsi/ucsi_ccg.c 	memcpy((uint8_t *)&fw_cfg_sig,
uint8_t           414 drivers/vfio/pci/vfio_pci_intrs.c 		uint8_t unmask = *(uint8_t *)data;
uint8_t           441 drivers/vfio/pci/vfio_pci_intrs.c 		uint8_t mask = *(uint8_t *)data;
uint8_t           487 drivers/vfio/pci/vfio_pci_intrs.c 		uint8_t trigger = *(uint8_t *)data;
uint8_t           537 drivers/vfio/pci/vfio_pci_intrs.c 			uint8_t *bools = data;
uint8_t           561 drivers/vfio/pci/vfio_pci_intrs.c 		uint8_t trigger;
uint8_t           566 drivers/vfio/pci/vfio_pci_intrs.c 		trigger = *(uint8_t *)data;
uint8_t            69 drivers/vfio/platform/vfio_platform_irq.c 		uint8_t mask = *(uint8_t *)data;
uint8_t           130 drivers/vfio/platform/vfio_platform_irq.c 		uint8_t unmask = *(uint8_t *)data;
uint8_t           247 drivers/vfio/platform/vfio_platform_irq.c 		uint8_t trigger = *(uint8_t *)data;
uint8_t          1879 drivers/vfio/vfio.c 		size = sizeof(uint8_t);
uint8_t            83 drivers/video/backlight/adp5520_bl.c 	uint8_t reg_val;
uint8_t           147 drivers/video/backlight/adp5520_bl.c 	uint8_t reg_val;
uint8_t           119 drivers/video/backlight/adp8860_bl.c static int adp8860_read(struct i2c_client *client, int reg, uint8_t *val)
uint8_t           129 drivers/video/backlight/adp8860_bl.c 	*val = (uint8_t)ret;
uint8_t           138 drivers/video/backlight/adp8860_bl.c static int adp8860_set_bits(struct i2c_client *client, int reg, uint8_t bit_mask)
uint8_t           141 drivers/video/backlight/adp8860_bl.c 	uint8_t reg_val;
uint8_t           157 drivers/video/backlight/adp8860_bl.c static int adp8860_clr_bits(struct i2c_client *client, int reg, uint8_t bit_mask)
uint8_t           160 drivers/video/backlight/adp8860_bl.c 	uint8_t reg_val;
uint8_t           433 drivers/video/backlight/adp8860_bl.c 	uint8_t reg_val;
uint8_t           563 drivers/video/backlight/adp8860_bl.c 	uint8_t reg_val;
uint8_t           590 drivers/video/backlight/adp8860_bl.c 	uint8_t reg_val;
uint8_t           609 drivers/video/backlight/adp8860_bl.c 	uint8_t reg_val;
uint8_t           667 drivers/video/backlight/adp8860_bl.c 	uint8_t reg_val;
uint8_t           128 drivers/video/backlight/adp8870_bl.c static int adp8870_read(struct i2c_client *client, int reg, uint8_t *val)
uint8_t           153 drivers/video/backlight/adp8870_bl.c static int adp8870_set_bits(struct i2c_client *client, int reg, uint8_t bit_mask)
uint8_t           156 drivers/video/backlight/adp8870_bl.c 	uint8_t reg_val;
uint8_t           172 drivers/video/backlight/adp8870_bl.c static int adp8870_clr_bits(struct i2c_client *client, int reg, uint8_t bit_mask)
uint8_t           175 drivers/video/backlight/adp8870_bl.c 	uint8_t reg_val;
uint8_t           554 drivers/video/backlight/adp8870_bl.c 	uint8_t reg_val;
uint8_t           745 drivers/video/backlight/adp8870_bl.c 	uint8_t reg_val;
uint8_t           774 drivers/video/backlight/adp8870_bl.c 	uint8_t reg_val;
uint8_t           793 drivers/video/backlight/adp8870_bl.c 	uint8_t reg_val;
uint8_t           855 drivers/video/backlight/adp8870_bl.c 	uint8_t reg_val;
uint8_t           100 drivers/video/backlight/corgi_lcd.c static int corgi_ssp_lcdtg_send(struct corgi_lcd *lcd, int reg, uint8_t val);
uint8_t           111 drivers/video/backlight/corgi_lcd.c static void lcdtg_ssp_i2c_send(struct corgi_lcd *lcd, uint8_t data)
uint8_t           117 drivers/video/backlight/corgi_lcd.c static void lcdtg_i2c_send_bit(struct corgi_lcd *lcd, uint8_t data)
uint8_t           124 drivers/video/backlight/corgi_lcd.c static void lcdtg_i2c_send_start(struct corgi_lcd *lcd, uint8_t base)
uint8_t           131 drivers/video/backlight/corgi_lcd.c static void lcdtg_i2c_send_stop(struct corgi_lcd *lcd, uint8_t base)
uint8_t           139 drivers/video/backlight/corgi_lcd.c 				uint8_t base, uint8_t data)
uint8_t           152 drivers/video/backlight/corgi_lcd.c static void lcdtg_i2c_wait_ack(struct corgi_lcd *lcd, uint8_t base)
uint8_t           158 drivers/video/backlight/corgi_lcd.c 				     uint8_t base_data, uint8_t data)
uint8_t           171 drivers/video/backlight/corgi_lcd.c static int corgi_ssp_lcdtg_send(struct corgi_lcd *lcd, int adrs, uint8_t data)
uint8_t            44 drivers/video/backlight/da903x_bl.c 	uint8_t val;
uint8_t            31 drivers/video/backlight/tdo24m.c 	uint8_t			*buf;
uint8_t            42 drivers/video/backlight/tosa_lcd.c static int tosa_tg_send(struct spi_device *spi, int adrs, uint8_t data)
uint8_t            22 drivers/video/fbdev/aty/radeon_backlight.c 	uint8_t negative;
uint8_t           385 drivers/video/fbdev/fsl-diu-fb.c 	uint8_t edid_data[EDID_LENGTH];
uint8_t           273 drivers/video/fbdev/mx3fb.c static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value);
uint8_t           670 drivers/video/fbdev/mx3fb.c static int sdc_set_global_alpha(struct mx3fb_data *mx3fb, bool enable, uint8_t alpha)
uint8_t           703 drivers/video/fbdev/mx3fb.c static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value)
uint8_t           426 drivers/video/fbdev/udlfb.c 	uint8_t **command_buffer_ptr,
uint8_t           427 drivers/video/fbdev/udlfb.c 	const uint8_t *const cmd_buffer_end,
uint8_t           433 drivers/video/fbdev/udlfb.c 	uint8_t *cmd = *command_buffer_ptr;
uint8_t           437 drivers/video/fbdev/udlfb.c 		uint8_t *raw_pixels_count_byte = NULL;
uint8_t           438 drivers/video/fbdev/udlfb.c 		uint8_t *cmd_pixels_count_byte = NULL;
uint8_t           521 drivers/video/fbdev/udlfb.c 		cmd = (uint8_t *) cmd_buffer_end;
uint8_t            45 drivers/w1/slaves/w1_therm.c 	uint8_t rom[9];
uint8_t           335 drivers/w1/slaves/w1_therm.c 	uint8_t precision_bits;
uint8_t           336 drivers/w1/slaves/w1_therm.c 	uint8_t mask = 0x60;
uint8_t           187 drivers/xen/gntalloc.c 		uint8_t *tmp = kmap(gref->page);
uint8_t           374 drivers/xen/gntdev.c 			uint8_t *tmp = pfn_to_kaddr(page_to_pfn(map->pages[pgno]));
uint8_t            80 drivers/xen/pvcalls-front.c 			uint8_t status __attribute__((aligned(8)));
uint8_t            91 drivers/xen/pvcalls-front.c 			uint8_t flags __attribute__((aligned(8)));
uint8_t           170 drivers/xen/pvcalls-front.c 	uint8_t *src, *dst;
uint8_t           203 drivers/xen/pvcalls-front.c 			dst = (uint8_t *)&bedata->rsp[req_id] +
uint8_t           205 drivers/xen/pvcalls-front.c 			src = (uint8_t *)rsp + sizeof(rsp->req_id);
uint8_t           118 drivers/xen/xen-scsiback.c 	uint8_t cmnd[VSCSIIF_MAX_COMMAND_SIZE];
uint8_t           119 drivers/xen/xen-scsiback.c 	uint8_t cmd_len;
uint8_t           121 drivers/xen/xen-scsiback.c 	uint8_t sc_data_direction;
uint8_t           131 drivers/xen/xen-scsiback.c 	uint8_t sense_buffer[VSCSIIF_SENSE_BUFFERSIZE];
uint8_t            42 fs/9p/vfs_dir.c 	uint8_t buf[];
uint8_t           139 fs/9p/vfs_file.c 	uint8_t status = P9_LOCK_ERROR;
uint8_t            44 fs/cachefiles/internal.h 	uint8_t				type;		/* object type */
uint8_t            45 fs/cachefiles/internal.h 	uint8_t				new;		/* T if object new */
uint8_t           119 fs/cachefiles/internal.h 	uint8_t				type;
uint8_t           120 fs/cachefiles/internal.h 	uint8_t				data[];
uint8_t           156 fs/cachefiles/internal.h extern char *cachefiles_cook_key(const u8 *raw, int keylen, uint8_t type);
uint8_t            33 fs/cachefiles/key.c char *cachefiles_cook_key(const u8 *raw, int keylen, uint8_t type)
uint8_t            39 fs/cifs/cifs_spnego.h 	uint8_t		data[1];
uint8_t           227 fs/dlm/dlm_internal.h 	uint8_t			sb_flags;	/* copy to lksb flags */
uint8_t           384 fs/dlm/dlm_internal.h 	uint8_t			h_cmd;		/* DLM_MSG, DLM_RCOM */
uint8_t           385 fs/dlm/dlm_internal.h 	uint8_t			h_pad;
uint8_t           249 fs/jffs2/dir.c 	uint8_t type;
uint8_t           762 fs/jffs2/dir.c 	uint8_t type;
uint8_t            52 fs/jffs2/jffs2_fs_i.h 	uint8_t usercompr;
uint8_t            80 fs/jffs2/jffs2_fs_sb.h 	uint8_t resv_blocks_write;	/* ... allow a normal filesystem write */
uint8_t            81 fs/jffs2/jffs2_fs_sb.h 	uint8_t resv_blocks_deletion;	/* ... allow a normal filesystem deletion */
uint8_t            82 fs/jffs2/jffs2_fs_sb.h 	uint8_t resv_blocks_gctrigger;	/* ... wake up the GC thread */
uint8_t            83 fs/jffs2/jffs2_fs_sb.h 	uint8_t resv_blocks_gcbad;	/* ... pick a block from the bad_list to GC */
uint8_t            84 fs/jffs2/jffs2_fs_sb.h 	uint8_t resv_blocks_gcmerge;	/* ... merge pages when garbage collecting */
uint8_t            86 fs/jffs2/jffs2_fs_sb.h 	uint8_t vdirty_blocks_gctrigger;
uint8_t           168 fs/jffs2/nodelist.h 	uint8_t class;	/* It's used for identification */
uint8_t           172 fs/jffs2/nodelist.h 	uint8_t flags;
uint8_t           412 fs/jffs2/nodelist.h 		   uint8_t type, const char *name, int namelen, uint32_t time);
uint8_t            62 fs/jffs2/summary.h 	uint8_t nsize;		/* dirent name size */
uint8_t            63 fs/jffs2/summary.h 	uint8_t type;		/* dirent type */
uint8_t            64 fs/jffs2/summary.h 	uint8_t name[0];	/* dirent name */
uint8_t           118 fs/jffs2/summary.h 	uint8_t nsize;		/* dirent name size */
uint8_t           119 fs/jffs2/summary.h 	uint8_t type;		/* dirent type */
uint8_t           120 fs/jffs2/summary.h 	uint8_t name[0];	/* dirent name */
uint8_t           781 fs/jffs2/wbuf.c static size_t jffs2_fill_wbuf(struct jffs2_sb_info *c, const uint8_t *buf,
uint8_t           861 fs/jffs2/wbuf.c 		uint8_t *v = invecs[invec].iov_base;
uint8_t          1109 fs/jffs2/wbuf.c 	ops.oobbuf = (uint8_t *)&oob_cleanmarker;
uint8_t           669 fs/jffs2/write.c int jffs2_do_link (struct jffs2_sb_info *c, struct jffs2_inode_info *dir_f, uint32_t ino, uint8_t type, const char *name, int namelen, uint32_t time)
uint8_t            27 fs/jffs2/xattr.h 	uint8_t class;
uint8_t            28 fs/jffs2/xattr.h 	uint8_t flags;
uint8_t            49 fs/jffs2/xattr.h 	uint8_t class;
uint8_t            50 fs/jffs2/xattr.h 	uint8_t flags;		/* Currently unused */
uint8_t            62 fs/nfsd/nfs4recover.c 	uint8_t version;
uint8_t           803 fs/nfsd/nfs4recover.c 	uint8_t cmd, princhashlen;
uint8_t          1533 fs/nfsd/nfs4recover.c 	uint8_t version;
uint8_t            37 fs/pstore/ram_core.c 	uint8_t     data[0];
uint8_t            99 fs/pstore/ram_core.c 	uint8_t *data, size_t len, uint8_t *ecc)
uint8_t           112 fs/pstore/ram_core.c 	void *data, size_t len, uint8_t *ecc)
uint8_t           126 fs/pstore/ram_core.c 	uint8_t *buffer_end = buffer->data + prz->buffer_size;
uint8_t           127 fs/pstore/ram_core.c 	uint8_t *block;
uint8_t           128 fs/pstore/ram_core.c 	uint8_t *par;
uint8_t           155 fs/pstore/ram_core.c 	persistent_ram_encode_rs8(prz, (uint8_t *)buffer, sizeof(*buffer),
uint8_t           162 fs/pstore/ram_core.c 	uint8_t *block;
uint8_t           163 fs/pstore/ram_core.c 	uint8_t *par;
uint8_t           455 fs/ubifs/dir.c static unsigned int vfs_dent_type(uint8_t type)
uint8_t           222 fs/ubifs/lpt.c static void pack_bits(const struct ubifs_info *c, uint8_t **addr, int *pos, uint32_t val, int nrbits)
uint8_t           224 fs/ubifs/lpt.c 	uint8_t *p = *addr;
uint8_t           233 fs/ubifs/lpt.c 		*p |= ((uint8_t)val) << b;
uint8_t           236 fs/ubifs/lpt.c 			*++p = (uint8_t)(val >>= (8 - b));
uint8_t           238 fs/ubifs/lpt.c 				*++p = (uint8_t)(val >>= 8);
uint8_t           240 fs/ubifs/lpt.c 					*++p = (uint8_t)(val >>= 8);
uint8_t           242 fs/ubifs/lpt.c 						*++p = (uint8_t)(val >>= 8);
uint8_t           247 fs/ubifs/lpt.c 		*p = (uint8_t)val;
uint8_t           249 fs/ubifs/lpt.c 			*++p = (uint8_t)(val >>= 8);
uint8_t           251 fs/ubifs/lpt.c 				*++p = (uint8_t)(val >>= 8);
uint8_t           253 fs/ubifs/lpt.c 					*++p = (uint8_t)(val >>= 8);
uint8_t           273 fs/ubifs/lpt.c uint32_t ubifs_unpack_bits(const struct ubifs_info *c, uint8_t **addr, int *pos, int nrbits)
uint8_t           276 fs/ubifs/lpt.c 	uint8_t *p = *addr;
uint8_t           343 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t           376 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t           408 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t           432 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t           927 fs/ubifs/lpt.c 	uint8_t *addr = buf;
uint8_t           951 fs/ubifs/lpt.c static int check_lpt_type(const struct ubifs_info *c, uint8_t **addr,
uint8_t           977 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t          1014 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t          1046 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t          1078 fs/ubifs/lpt.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t          1033 fs/ubifs/lpt_commit.c static int get_pad_len(const struct ubifs_info *c, uint8_t *buf, int len)
uint8_t          1050 fs/ubifs/lpt_commit.c static int get_lpt_node_type(const struct ubifs_info *c, uint8_t *buf,
uint8_t          1053 fs/ubifs/lpt_commit.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t          1069 fs/ubifs/lpt_commit.c static int is_a_node(const struct ubifs_info *c, uint8_t *buf, int len)
uint8_t          1071 fs/ubifs/lpt_commit.c 	uint8_t *addr = buf + UBIFS_LPT_CRC_BYTES;
uint8_t          1460 fs/ubifs/lpt_commit.c static int dbg_is_all_ff(uint8_t *buf, int len)
uint8_t            52 fs/ubifs/recovery.c 	uint8_t *p = buf;
uint8_t            71 fs/ubifs/recovery.c 	uint8_t *p = buf;
uint8_t           405 fs/ubifs/recovery.c 	uint8_t *p;
uint8_t            31 fs/ubifs/scan.c 	uint8_t *p = buf;
uint8_t           326 fs/ubifs/scan.c 		if (*(uint8_t *)buf != 0xff) {
uint8_t           285 fs/ubifs/ubifs.h 	uint8_t u8[UBIFS_SK_LEN];
uint8_t          1338 fs/ubifs/ubifs.h 	uint8_t key_hash_type;
uint8_t          1952 fs/ubifs/ubifs.h uint32_t ubifs_unpack_bits(const struct ubifs_info *c, uint8_t **addr, int *pos, int nrbits);
uint8_t            52 fs/udf/dir.c   	uint8_t lfi;
uint8_t            48 fs/udf/directory.c 		memcpy((uint8_t *)cfi, (uint8_t *)fi,
uint8_t           111 fs/udf/directory.c 		memcpy((uint8_t *)cfi, (uint8_t *)fi,
uint8_t           139 fs/udf/directory.c 			memcpy((uint8_t *)cfi, (uint8_t *)fi, -fibh->soffset);
uint8_t           140 fs/udf/directory.c 			memcpy((uint8_t *)cfi - fibh->soffset,
uint8_t           148 fs/udf/directory.c 			memcpy((uint8_t *)cfi, (uint8_t *)fi,
uint8_t           162 fs/udf/directory.c 	uint8_t *ptr;
uint8_t           199 fs/udf/directory.c struct short_ad *udf_get_fileshortad(uint8_t *ptr, int maxoffset, uint32_t *offset,
uint8_t           222 fs/udf/directory.c struct long_ad *udf_get_filelongad(uint8_t *ptr, int maxoffset, uint32_t *offset, int inc)
uint8_t            42 fs/udf/ecma_167.h 	uint8_t		charSetType;
uint8_t            43 fs/udf/ecma_167.h 	uint8_t		charSetInfo[63];
uint8_t            57 fs/udf/ecma_167.h typedef uint8_t		dstring;
uint8_t            63 fs/udf/ecma_167.h 	uint8_t		month;
uint8_t            64 fs/udf/ecma_167.h 	uint8_t		day;
uint8_t            65 fs/udf/ecma_167.h 	uint8_t		hour;
uint8_t            66 fs/udf/ecma_167.h 	uint8_t		minute;
uint8_t            67 fs/udf/ecma_167.h 	uint8_t		second;
uint8_t            68 fs/udf/ecma_167.h 	uint8_t		centiseconds;
uint8_t            69 fs/udf/ecma_167.h 	uint8_t		hundredsOfMicroseconds;
uint8_t            70 fs/udf/ecma_167.h 	uint8_t		microseconds;
uint8_t            82 fs/udf/ecma_167.h 	uint8_t		flags;
uint8_t            83 fs/udf/ecma_167.h 	uint8_t		ident[23];
uint8_t            84 fs/udf/ecma_167.h 	uint8_t		identSuffix[8];
uint8_t            97 fs/udf/ecma_167.h 	uint8_t		flags;
uint8_t            98 fs/udf/ecma_167.h 	uint8_t		reserved[5];
uint8_t           108 fs/udf/ecma_167.h 	uint8_t		structType;
uint8_t           109 fs/udf/ecma_167.h 	uint8_t		stdIdent[VSD_STD_ID_LEN];
uint8_t           110 fs/udf/ecma_167.h 	uint8_t		structVersion;
uint8_t           111 fs/udf/ecma_167.h 	uint8_t		structData[2041];
uint8_t           127 fs/udf/ecma_167.h 	uint8_t		structType;
uint8_t           128 fs/udf/ecma_167.h 	uint8_t		stdIdent[VSD_STD_ID_LEN];
uint8_t           129 fs/udf/ecma_167.h 	uint8_t		structVersion;
uint8_t           130 fs/udf/ecma_167.h 	uint8_t		structData[2041];
uint8_t           135 fs/udf/ecma_167.h 	uint8_t		structType;
uint8_t           136 fs/udf/ecma_167.h 	uint8_t		stdIdent[VSD_STD_ID_LEN];
uint8_t           137 fs/udf/ecma_167.h 	uint8_t		structVersion;
uint8_t           138 fs/udf/ecma_167.h 	uint8_t		structData[2041];
uint8_t           143 fs/udf/ecma_167.h 	uint8_t			structType;
uint8_t           144 fs/udf/ecma_167.h 	uint8_t			stdIdent[VSD_STD_ID_LEN];
uint8_t           145 fs/udf/ecma_167.h 	uint8_t			structVersion;
uint8_t           146 fs/udf/ecma_167.h 	uint8_t			reserved1;
uint8_t           155 fs/udf/ecma_167.h 	uint8_t			reserved2[32];
uint8_t           156 fs/udf/ecma_167.h 	uint8_t			bootUse[1906];
uint8_t           177 fs/udf/ecma_167.h 	uint8_t		tagChecksum;
uint8_t           178 fs/udf/ecma_167.h 	uint8_t		reserved;
uint8_t           198 fs/udf/ecma_167.h 	uint8_t		structType;
uint8_t           199 fs/udf/ecma_167.h 	uint8_t		stdIdent[VSD_STD_ID_LEN];
uint8_t           200 fs/udf/ecma_167.h 	uint8_t		structVersion;
uint8_t           201 fs/udf/ecma_167.h 	uint8_t		reserved;
uint8_t           202 fs/udf/ecma_167.h 	uint8_t		structData[2040];
uint8_t           225 fs/udf/ecma_167.h 	uint8_t			impUse[64];
uint8_t           228 fs/udf/ecma_167.h 	uint8_t			reserved[22];
uint8_t           239 fs/udf/ecma_167.h 	uint8_t	 		reserved[480];
uint8_t           247 fs/udf/ecma_167.h 	uint8_t			reserved[484];
uint8_t           255 fs/udf/ecma_167.h 	uint8_t		impUse[460];
uint8_t           265 fs/udf/ecma_167.h 	uint8_t partitionContentsUse[128];
uint8_t           270 fs/udf/ecma_167.h 	uint8_t impUse[128];
uint8_t           271 fs/udf/ecma_167.h 	uint8_t reserved[156];
uint8_t           301 fs/udf/ecma_167.h 	uint8_t			logicalVolContentsUse[16];
uint8_t           305 fs/udf/ecma_167.h 	uint8_t			impUse[128];
uint8_t           307 fs/udf/ecma_167.h 	uint8_t			partitionMaps[0];
uint8_t           312 fs/udf/ecma_167.h 	uint8_t		partitionMapType;
uint8_t           313 fs/udf/ecma_167.h 	uint8_t		partitionMapLength;
uint8_t           314 fs/udf/ecma_167.h 	uint8_t		partitionMapping[0];
uint8_t           324 fs/udf/ecma_167.h 	uint8_t		partitionMapType;
uint8_t           325 fs/udf/ecma_167.h 	uint8_t		partitionMapLength;
uint8_t           332 fs/udf/ecma_167.h 	uint8_t		partitionMapType;
uint8_t           333 fs/udf/ecma_167.h 	uint8_t		partitionMapLength;
uint8_t           334 fs/udf/ecma_167.h 	uint8_t		partitionIdent[62];
uint8_t           348 fs/udf/ecma_167.h 	uint8_t		reserved[496];
uint8_t           357 fs/udf/ecma_167.h 	uint8_t			logicalVolContentsUse[32];
uint8_t           362 fs/udf/ecma_167.h 	uint8_t			impUse[0];
uint8_t           391 fs/udf/ecma_167.h 	uint8_t		impUse[6];
uint8_t           397 fs/udf/ecma_167.h 	uint8_t			impUse[6];
uint8_t           450 fs/udf/ecma_167.h 	uint8_t			reserved[32];
uint8_t           460 fs/udf/ecma_167.h 	uint8_t		reserved[88];
uint8_t           467 fs/udf/ecma_167.h 	uint8_t		fileCharacteristics;
uint8_t           468 fs/udf/ecma_167.h 	uint8_t		lengthFileIdent;
uint8_t           471 fs/udf/ecma_167.h 	uint8_t		impUse[0];
uint8_t           472 fs/udf/ecma_167.h 	uint8_t		fileIdent[0];
uint8_t           473 fs/udf/ecma_167.h 	uint8_t		padding[0];
uint8_t           496 fs/udf/ecma_167.h 	uint8_t		reserved;
uint8_t           497 fs/udf/ecma_167.h 	uint8_t		fileType;
uint8_t           564 fs/udf/ecma_167.h 	uint8_t			recordFormat;
uint8_t           565 fs/udf/ecma_167.h 	uint8_t			recordDisplayAttr;
uint8_t           578 fs/udf/ecma_167.h 	uint8_t			extendedAttr[0];
uint8_t           579 fs/udf/ecma_167.h 	uint8_t			allocDescs[0];
uint8_t           629 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           630 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           632 fs/udf/ecma_167.h 	uint8_t		attrData[0];
uint8_t           638 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           639 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           642 fs/udf/ecma_167.h 	uint8_t		charSetType;
uint8_t           643 fs/udf/ecma_167.h 	uint8_t		escapeSeq[0];
uint8_t           649 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           650 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           660 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           661 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           665 fs/udf/ecma_167.h 	uint8_t		fileTimes;
uint8_t           677 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           678 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           682 fs/udf/ecma_167.h 	uint8_t		infoTimes[0];
uint8_t           688 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           689 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           694 fs/udf/ecma_167.h 	uint8_t		impUse[0];
uint8_t           700 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           701 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           705 fs/udf/ecma_167.h 	uint8_t		impUse[0];
uint8_t           711 fs/udf/ecma_167.h 	uint8_t		attrSubtype;
uint8_t           712 fs/udf/ecma_167.h 	uint8_t		reserved[3];
uint8_t           716 fs/udf/ecma_167.h 	uint8_t		appUse[0];
uint8_t           732 fs/udf/ecma_167.h 	uint8_t		allocDescs[0];
uint8_t           740 fs/udf/ecma_167.h 	uint8_t		bitmap[0];
uint8_t           748 fs/udf/ecma_167.h 	uint8_t			integrityType;
uint8_t           749 fs/udf/ecma_167.h 	uint8_t			reserved[175];
uint8_t           751 fs/udf/ecma_167.h 	uint8_t			impUse[256];
uint8_t           769 fs/udf/ecma_167.h 	uint8_t		reserved[24];
uint8_t           774 fs/udf/ecma_167.h 	uint8_t		componentType;
uint8_t           775 fs/udf/ecma_167.h 	uint8_t		lengthComponentIdent;
uint8_t           788 fs/udf/ecma_167.h 	uint8_t			recordFormat;
uint8_t           789 fs/udf/ecma_167.h 	uint8_t			recordDisplayAttr;
uint8_t           806 fs/udf/ecma_167.h 	uint8_t			extendedAttr[0];
uint8_t           807 fs/udf/ecma_167.h 	uint8_t			allocDescs[0];
uint8_t           332 fs/udf/inode.c 	uint8_t alloctype;
uint8_t          2085 fs/udf/inode.c 	uint8_t *ptr;
uint8_t          2175 fs/udf/inode.c 	uint8_t *ptr;
uint8_t            48 fs/udf/misc.c  					   uint32_t type, uint8_t loc)
uint8_t            50 fs/udf/misc.c  	uint8_t *ea = NULL, *ad = NULL;
uint8_t           149 fs/udf/misc.c  					   uint8_t subtype)
uint8_t           152 fs/udf/misc.c  	uint8_t *ea = NULL;
uint8_t            45 fs/udf/namei.c 		 uint8_t *impuse, uint8_t *fileident)
uint8_t            51 fs/udf/namei.c 	uint8_t lfi = cfi->lengthFileIdent;
uint8_t            63 fs/udf/namei.c 			memcpy((uint8_t *)sfi->impUse, impuse, liu);
uint8_t            67 fs/udf/namei.c 			memcpy((uint8_t *)sfi->impUse, impuse, -offset);
uint8_t            77 fs/udf/namei.c 			memcpy((uint8_t *)sfi->fileIdent + liu, fileident, lfi);
uint8_t            81 fs/udf/namei.c 			memcpy((uint8_t *)sfi->fileIdent + liu, fileident,
uint8_t            91 fs/udf/namei.c 		memset((uint8_t *)sfi->padding + liu + lfi, 0x00, padlen);
uint8_t            95 fs/udf/namei.c 		memset((uint8_t *)sfi->padding + liu + lfi, 0x00, -offset);
uint8_t            99 fs/udf/namei.c 	crc = crc_itu_t(0, (uint8_t *)cfi + sizeof(struct tag),
uint8_t           103 fs/udf/namei.c 		crc = crc_itu_t(crc, (uint8_t *)sfi->impUse,
uint8_t           113 fs/udf/namei.c 		crc = crc_itu_t(crc, (uint8_t *)sfi->impUse,
uint8_t           123 fs/udf/namei.c 		memcpy((uint8_t *)sfi, (uint8_t *)cfi,
uint8_t           126 fs/udf/namei.c 		memcpy((uint8_t *)sfi, (uint8_t *)cfi, -fibh->soffset);
uint8_t           127 fs/udf/namei.c 		memcpy(fibh->ebh->b_data, (uint8_t *)cfi - fibh->soffset,
uint8_t           171 fs/udf/namei.c 	uint8_t lfi;
uint8_t           237 fs/udf/namei.c 				nameptr = (uint8_t *)(fibh->ebh->b_data +
uint8_t           889 fs/udf/namei.c 	uint8_t *ea;
uint8_t            70 fs/udf/osta_udf.h 	uint8_t		OSClass;
uint8_t            71 fs/udf/osta_udf.h 	uint8_t		OSIdentifier;
uint8_t            72 fs/udf/osta_udf.h 	uint8_t		reserved[4];
uint8_t            76 fs/udf/osta_udf.h 	uint8_t		OSClass;
uint8_t            77 fs/udf/osta_udf.h 	uint8_t		OSIdentifier;
uint8_t            78 fs/udf/osta_udf.h 	uint8_t		reserved[6];
uint8_t            82 fs/udf/osta_udf.h 	uint8_t		impUse[8];
uint8_t            94 fs/udf/osta_udf.h 	uint8_t		impUse[0];
uint8_t           106 fs/udf/osta_udf.h 	uint8_t		impUse[128];
uint8_t           110 fs/udf/osta_udf.h 	uint8_t		partitionMapType;
uint8_t           111 fs/udf/osta_udf.h 	uint8_t		partitionMapLength;
uint8_t           112 fs/udf/osta_udf.h 	uint8_t		reserved1[2];
uint8_t           120 fs/udf/osta_udf.h 	uint8_t		partitionMapType;
uint8_t           121 fs/udf/osta_udf.h 	uint8_t		partitionMapLength;
uint8_t           122 fs/udf/osta_udf.h 	uint8_t		reserved1[2];
uint8_t           126 fs/udf/osta_udf.h 	uint8_t		reserved2[24];
uint8_t           131 fs/udf/osta_udf.h 	uint8_t partitionMapType;
uint8_t           132 fs/udf/osta_udf.h 	uint8_t partitionMapLength;
uint8_t           133 fs/udf/osta_udf.h 	uint8_t reserved1[2];
uint8_t           138 fs/udf/osta_udf.h 	uint8_t numSparingTables;
uint8_t           139 fs/udf/osta_udf.h 	uint8_t reserved2[1];
uint8_t           146 fs/udf/osta_udf.h 	uint8_t		partitionMapType;
uint8_t           147 fs/udf/osta_udf.h 	uint8_t		partitionMapLength;
uint8_t           148 fs/udf/osta_udf.h 	uint8_t		reserved1[2];
uint8_t           157 fs/udf/osta_udf.h 	uint8_t		flags;
uint8_t           158 fs/udf/osta_udf.h 	uint8_t		reserved2[5];
uint8_t           182 fs/udf/osta_udf.h 	uint8_t		impUse[0];
uint8_t           212 fs/udf/osta_udf.h 	uint8_t		impUse[4];
uint8_t           224 fs/udf/osta_udf.h 	uint8_t		freeEASpace[0];
uint8_t           230 fs/udf/osta_udf.h 	uint8_t		CGMSInfo;
uint8_t           231 fs/udf/osta_udf.h 	uint8_t		dataType;
uint8_t           232 fs/udf/osta_udf.h 	uint8_t		protectionSystemInfo[4];
uint8_t           239 fs/udf/osta_udf.h 	uint8_t		freeEASpace[0];
uint8_t           854 fs/udf/super.c 	uint8_t *outstr;
uint8_t          1383 fs/udf/super.c 	uint8_t type;
uint8_t          2424 fs/udf/super.c 	uint8_t *ptr;
uint8_t          2444 fs/udf/super.c 	ptr = (uint8_t *)bh->b_data;
uint8_t          2460 fs/udf/super.c 			ptr = (uint8_t *)bh->b_data;
uint8_t           126 fs/udf/udfdecl.h 			uint8_t *, uint8_t *);
uint8_t           180 fs/udf/udfdecl.h 						  uint32_t, uint8_t);
uint8_t           182 fs/udf/udfdecl.h 						  uint8_t);
uint8_t           217 fs/udf/udfdecl.h extern int udf_get_filename(struct super_block *, const uint8_t *, int,
uint8_t           218 fs/udf/udfdecl.h 			    uint8_t *, int);
uint8_t           219 fs/udf/udfdecl.h extern int udf_put_filename(struct super_block *, const uint8_t *, int,
uint8_t           220 fs/udf/udfdecl.h 			    uint8_t *, int);
uint8_t           221 fs/udf/udfdecl.h extern int udf_dstrCS0toChar(struct super_block *, uint8_t *, int,
uint8_t           222 fs/udf/udfdecl.h 			     const uint8_t *, int);
uint8_t           250 fs/udf/udfdecl.h extern struct long_ad *udf_get_filelongad(uint8_t *, int, uint32_t *, int);
uint8_t           251 fs/udf/udfdecl.h extern struct short_ad *udf_get_fileshortad(uint8_t *, int, uint32_t *, int);
uint8_t            48 fs/udf/udftime.c 	uint8_t type = typeAndTimezone >> 12;
uint8_t            46 fs/udf/unicode.c static unicode_t get_utf16_char(const uint8_t *str_i, int str_i_max_len,
uint8_t            90 fs/udf/unicode.c static int udf_name_conv_char(uint8_t *str_o, int str_o_max_len,
uint8_t            92 fs/udf/unicode.c 			      const uint8_t *str_i, int str_i_max_len,
uint8_t           152 fs/udf/unicode.c 			     uint8_t *str_o, int str_max_len,
uint8_t           153 fs/udf/unicode.c 			     const uint8_t *ocu, int ocu_len,
uint8_t           157 fs/udf/unicode.c 	uint8_t cmp_id;
uint8_t           168 fs/udf/unicode.c 	uint8_t ext[EXT_SIZE * NLS_MAX_CHARSET_SIZE + 1];
uint8_t           169 fs/udf/unicode.c 	uint8_t crc[CRC_LEN];
uint8_t           276 fs/udf/unicode.c 			   uint8_t *ocu, int ocu_max_len,
uint8_t           277 fs/udf/unicode.c 			   const uint8_t *str_i, int str_len)
uint8_t           340 fs/udf/unicode.c 			ocu[u_len++] = (uint8_t)(c >> 8);
uint8_t           341 fs/udf/unicode.c 			ocu[u_len++] = (uint8_t)(c & 0xff);
uint8_t           347 fs/udf/unicode.c 			ocu[u_len++] = (uint8_t)(uni_char >> 8);
uint8_t           348 fs/udf/unicode.c 		ocu[u_len++] = (uint8_t)(uni_char & 0xff);
uint8_t           359 fs/udf/unicode.c int udf_dstrCS0toChar(struct super_block *sb, uint8_t *utf_o, int o_len,
uint8_t           360 fs/udf/unicode.c 		      const uint8_t *ocu_i, int i_len)
uint8_t           379 fs/udf/unicode.c int udf_get_filename(struct super_block *sb, const uint8_t *sname, int slen,
uint8_t           380 fs/udf/unicode.c 		     uint8_t *dname, int dlen)
uint8_t           397 fs/udf/unicode.c int udf_put_filename(struct super_block *sb, const uint8_t *sname, int slen,
uint8_t           398 fs/udf/unicode.c 		     uint8_t *dname, int dlen)
uint8_t           268 fs/xfs/libxfs/xfs_attr_remote.c 	uint8_t		**dst)
uint8_t           316 fs/xfs/libxfs/xfs_attr_remote.c 	uint8_t		**src)
uint8_t           372 fs/xfs/libxfs/xfs_attr_remote.c 	uint8_t			*dst = args->value;
uint8_t           439 fs/xfs/libxfs/xfs_attr_remote.c 	uint8_t			*src = args->value;
uint8_t            22 fs/xfs/libxfs/xfs_attr_sf.h 	uint8_t		entno;		/* entry number in original list */
uint8_t            23 fs/xfs/libxfs/xfs_attr_sf.h 	uint8_t		namelen;	/* length of name value (no null) */
uint8_t            24 fs/xfs/libxfs/xfs_attr_sf.h 	uint8_t		valuelen;	/* length of value */
uint8_t            25 fs/xfs/libxfs/xfs_attr_sf.h 	uint8_t		flags;		/* flags bits (see xfs_attr_leaf.h) */
uint8_t            33 fs/xfs/libxfs/xfs_attr_sf.h 	((1 << (NBBY*(int)sizeof(uint8_t))) - 1)
uint8_t           201 fs/xfs/libxfs/xfs_btree.h 	uint8_t		bc_ra[XFS_BTREE_MAXLEVELS];	/* readahead bits */
uint8_t           204 fs/xfs/libxfs/xfs_btree.h 	uint8_t		bc_nlevels;	/* number of levels in the tree */
uint8_t           205 fs/xfs/libxfs/xfs_btree.h 	uint8_t		bc_blocklog;	/* log2(blocksize) of btree blocks */
uint8_t          2010 fs/xfs/libxfs/xfs_da_btree.c xfs_da_hashname(const uint8_t *name, int namelen)
uint8_t            23 fs/xfs/libxfs/xfs_da_btree.h 	uint8_t		fsblog;		/* log2 of _filesystem_ block size */
uint8_t            24 fs/xfs/libxfs/xfs_da_btree.h 	uint8_t		blklog;		/* log2 of da block size */
uint8_t            50 fs/xfs/libxfs/xfs_da_btree.h 	const uint8_t		*name;		/* string (maybe not NULL terminated) */
uint8_t            52 fs/xfs/libxfs/xfs_da_btree.h 	uint8_t		filetype;	/* filetype of inode for directories */
uint8_t            53 fs/xfs/libxfs/xfs_da_btree.h 	uint8_t		*value;		/* set of bytes (maybe contain NULLs) */
uint8_t           197 fs/xfs/libxfs/xfs_da_btree.h uint xfs_da_hashname(const uint8_t *name_string, int name_length);
uint8_t            37 fs/xfs/libxfs/xfs_da_format.c 	return xfs_dir2_sf_entsize(hdr, len) + sizeof(uint8_t);
uint8_t            65 fs/xfs/libxfs/xfs_da_format.c static uint8_t
uint8_t            75 fs/xfs/libxfs/xfs_da_format.c 	uint8_t			ftype)
uint8_t            80 fs/xfs/libxfs/xfs_da_format.c static uint8_t
uint8_t            84 fs/xfs/libxfs/xfs_da_format.c 	uint8_t		ftype;
uint8_t            95 fs/xfs/libxfs/xfs_da_format.c 	uint8_t			ftype)
uint8_t           112 fs/xfs/libxfs/xfs_da_format.c 	uint8_t			*from)
uint8_t           123 fs/xfs/libxfs/xfs_da_format.c 	uint8_t			*to,
uint8_t           213 fs/xfs/libxfs/xfs_da_format.c 		 sizeof(xfs_dir2_data_off_t) + sizeof(uint8_t)),	\
uint8_t           230 fs/xfs/libxfs/xfs_da_format.c static uint8_t
uint8_t           240 fs/xfs/libxfs/xfs_da_format.c 	uint8_t			ftype)
uint8_t           245 fs/xfs/libxfs/xfs_da_format.c static uint8_t
uint8_t           249 fs/xfs/libxfs/xfs_da_format.c 	uint8_t		ftype = dep->name[dep->namelen];
uint8_t           259 fs/xfs/libxfs/xfs_da_format.c 	uint8_t			type)
uint8_t           217 fs/xfs/libxfs/xfs_da_format.h 	uint8_t			count;		/* count of entries */
uint8_t           218 fs/xfs/libxfs/xfs_da_format.h 	uint8_t			i8count;	/* count of 8-byte inode #s */
uint8_t           219 fs/xfs/libxfs/xfs_da_format.h 	uint8_t			parent[8];	/* parent dir inode number */
uint8_t           623 fs/xfs/libxfs/xfs_da_format.h 		uint8_t namelen;	/* actual length of name (no NULL) */
uint8_t           624 fs/xfs/libxfs/xfs_da_format.h 		uint8_t valuelen;	/* actual length of value (no NULL) */
uint8_t           625 fs/xfs/libxfs/xfs_da_format.h 		uint8_t flags;	/* flags bits (see xfs_attr_leaf.h) */
uint8_t           626 fs/xfs/libxfs/xfs_da_format.h 		uint8_t nameval[1];	/* name & value bytes concatenated */
uint8_t            37 fs/xfs/libxfs/xfs_dir2.h 	uint8_t (*sf_get_ftype)(struct xfs_dir2_sf_entry *sfep);
uint8_t            39 fs/xfs/libxfs/xfs_dir2.h 				uint8_t ftype);
uint8_t            50 fs/xfs/libxfs/xfs_dir2.h 	uint8_t (*data_get_ftype)(struct xfs_dir2_data_entry *dep);
uint8_t            52 fs/xfs/libxfs/xfs_dir2.h 				uint8_t ftype);
uint8_t           326 fs/xfs/libxfs/xfs_dir2.h unsigned char xfs_dir3_get_dtype(struct xfs_mount *mp, uint8_t filetype);
uint8_t           633 fs/xfs/libxfs/xfs_dir2_sf.c 	uint8_t				filetype;
uint8_t           117 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_blocklog;	/* log2 of sb_blocksize */
uint8_t           118 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_sectlog;	/* log2 of sb_sectsize */
uint8_t           119 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_inodelog;	/* log2 of sb_inodesize */
uint8_t           120 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_inopblog;	/* log2 of sb_inopblock */
uint8_t           121 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_agblklog;	/* log2 of sb_agblocks (rounded up) */
uint8_t           122 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_rextslog;	/* log2 of sb_rextents */
uint8_t           123 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_inprogress;	/* mkfs is in progress, don't mount */
uint8_t           124 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_imax_pct;	/* max % of fs for inode space */
uint8_t           141 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_flags;	/* misc. flags */
uint8_t           142 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_shared_vn;	/* shared version number */
uint8_t           146 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_dirblklog;	/* log2 of dir block size (fsbs) */
uint8_t           147 fs/xfs/libxfs/xfs_format.h 	uint8_t		sb_logsectlog;	/* log2 of the log sector size */
uint8_t          1143 fs/xfs/libxfs/xfs_format.h #define XFS_DQUOT_VERSION	(uint8_t)0x01	/* latest version number */
uint8_t          1315 fs/xfs/libxfs/xfs_format.h 	uint8_t		ir_count;	/* total inode count */
uint8_t          1316 fs/xfs/libxfs/xfs_format.h 	uint8_t		ir_freecount;	/* count of free inodes (set bits) */
uint8_t           451 fs/xfs/libxfs/xfs_fs.h 	uint8_t		xi_alloccount;	/* # bits set in allocmask	*/
uint8_t           452 fs/xfs/libxfs/xfs_fs.h 	uint8_t		xi_version;	/* version			*/
uint8_t           453 fs/xfs/libxfs/xfs_fs.h 	uint8_t		xi_padding[6];	/* zero				*/
uint8_t           155 fs/xfs/libxfs/xfs_ialloc.c 	uint8_t			count,
uint8_t           150 fs/xfs/libxfs/xfs_ialloc.h 		uint8_t count, int32_t freecount, xfs_inofree_t free,
uint8_t            31 fs/xfs/libxfs/xfs_inode_buf.h 	uint8_t		di_forkoff;	/* attr fork offs, <<3 for 64b align */
uint8_t           278 fs/xfs/libxfs/xfs_log_format.h 		uint8_t		__pad[16];	/* unused */
uint8_t           299 fs/xfs/libxfs/xfs_log_format.h 		uint8_t		__pad[16];	/* unused */
uint8_t           385 fs/xfs/libxfs/xfs_log_format.h 	uint8_t		di_pad3[2];	/* unused in v2/3 inodes */
uint8_t           391 fs/xfs/libxfs/xfs_log_format.h 	uint8_t		di_pad[6];	/* unused, zeroed space */
uint8_t           401 fs/xfs/libxfs/xfs_log_format.h 	uint8_t		di_forkoff;	/* attr fork offs, <<3 for 64b align */
uint8_t           417 fs/xfs/libxfs/xfs_log_format.h 	uint8_t		di_pad2[12];	/* more padding for future expansion */
uint8_t            27 fs/xfs/scrub/attr.h 	uint8_t			buf[0];
uint8_t            31 fs/xfs/scrub/attr.h static inline uint8_t *
uint8_t           876 fs/xfs/scrub/trace.h 		 xfs_agino_t startino, uint16_t holemask, uint8_t count,
uint8_t           877 fs/xfs/scrub/trace.h 		 uint8_t freecount, uint64_t freemask),
uint8_t           884 fs/xfs/scrub/trace.h 		__field(uint8_t, count)
uint8_t           885 fs/xfs/scrub/trace.h 		__field(uint8_t, freecount)
uint8_t            32 fs/xfs/xfs_dir2_readdir.c 	uint8_t			filetype)
uint8_t           105 fs/xfs/xfs_dir2_readdir.c 		uint8_t filetype;
uint8_t           180 fs/xfs/xfs_dir2_readdir.c 		uint8_t filetype;
uint8_t           377 fs/xfs/xfs_dir2_readdir.c 		uint8_t filetype;
uint8_t           442 fs/xfs/xfs_log.c 	uint8_t		 	client,
uint8_t          3812 fs/xfs/xfs_log.c 	uint8_t			clientid;
uint8_t           130 fs/xfs/xfs_log.h 			  uint8_t		   clientid,
uint8_t            68 fs/xfs/xfs_mount.h 	uint8_t			m_fs_checked;
uint8_t            69 fs/xfs/xfs_mount.h 	uint8_t			m_fs_sick;
uint8_t            74 fs/xfs/xfs_mount.h 	uint8_t			m_rt_checked;
uint8_t            75 fs/xfs/xfs_mount.h 	uint8_t			m_rt_sick;
uint8_t           119 fs/xfs/xfs_mount.h 	uint8_t			*m_rsum_cache;
uint8_t           127 fs/xfs/xfs_mount.h 	uint8_t			m_blkbit_log;	/* blocklog + NBBY */
uint8_t           128 fs/xfs/xfs_mount.h 	uint8_t			m_blkbb_log;	/* blocklog - BBSHIFT */
uint8_t           129 fs/xfs/xfs_mount.h 	uint8_t			m_agno_log;	/* log #ag's */
uint8_t           161 fs/xfs/xfs_mount.h 	uint8_t			m_sectbb_log;	/* sectlog - BBSHIFT */
uint8_t           351 fs/xfs/xfs_mount.h 	uint8_t		pagf_levels[XFS_BTNUM_AGF];
uint8_t           405 fs/xfs/xfs_mount.h 	uint8_t			pagf_refcount_level;
uint8_t           892 fs/xfs/xfs_rtalloc.c 	uint8_t		nrextslog;	/* new log2 of sb_rextents */
uint8_t           901 fs/xfs/xfs_rtalloc.c 	uint8_t		*rsum_cache;	/* old summary cache */
uint8_t           167 fs/xfs/xfs_super.c 	uint8_t			iosizelog = 0;
uint8_t           532 fs/xfs/xfs_trans.c 	uint8_t			*field,
uint8_t          1271 include/drm/drm_connector.h 	uint8_t polled;
uint8_t          1308 include/drm/drm_connector.h 	uint8_t eld[MAX_ELD_BYTES];
uint8_t          1394 include/drm/drm_connector.h 	uint8_t num_h_tile, num_v_tile;
uint8_t          1397 include/drm/drm_connector.h 	uint8_t tile_h_loc, tile_v_loc;
uint8_t           384 include/drm/drm_edid.h static inline int drm_eld_mnl(const uint8_t *eld)
uint8_t           393 include/drm/drm_edid.h static inline const uint8_t *drm_eld_sad(const uint8_t *eld)
uint8_t           412 include/drm/drm_edid.h static inline int drm_eld_sad_count(const uint8_t *eld)
uint8_t           425 include/drm/drm_edid.h static inline int drm_eld_calc_baseline_block_size(const uint8_t *eld)
uint8_t           441 include/drm/drm_edid.h static inline int drm_eld_size(const uint8_t *eld)
uint8_t           453 include/drm/drm_edid.h static inline u8 drm_eld_get_spk_alloc(const uint8_t *eld)
uint8_t           465 include/drm/drm_edid.h static inline u8 drm_eld_get_conn_type(const uint8_t *eld)
uint8_t            60 include/linux/bch.h void encode_bch(struct bch_control *bch, const uint8_t *data,
uint8_t            61 include/linux/bch.h 		unsigned int len, uint8_t *ecc);
uint8_t            63 include/linux/bch.h int decode_bch(struct bch_control *bch, const uint8_t *data, unsigned int len,
uint8_t            64 include/linux/bch.h 	       const uint8_t *recv_ecc, const uint8_t *calc_ecc,
uint8_t             7 include/linux/crc4.h extern uint8_t crc4(uint8_t c, uint64_t x, int bits);
uint8_t            28 include/linux/digsig.h 	uint8_t		version;	/* key format version */
uint8_t            30 include/linux/digsig.h 	uint8_t		algo;
uint8_t            31 include/linux/digsig.h 	uint8_t		nmpi;
uint8_t            36 include/linux/digsig.h 	uint8_t		version;	/* signature format version */
uint8_t            38 include/linux/digsig.h 	uint8_t		algo;
uint8_t            39 include/linux/digsig.h 	uint8_t		hash;
uint8_t            40 include/linux/digsig.h 	uint8_t		keyid[8];
uint8_t            41 include/linux/digsig.h 	uint8_t		nmpi;
uint8_t            32 include/linux/firmware/imx/ipc.h 	uint8_t ver;
uint8_t            33 include/linux/firmware/imx/ipc.h 	uint8_t size;
uint8_t            34 include/linux/firmware/imx/ipc.h 	uint8_t svc;
uint8_t            35 include/linux/firmware/imx/ipc.h 	uint8_t func;
uint8_t            69 include/linux/fscache.h 	uint8_t type;
uint8_t           110 include/linux/hil_mlc.h 	uint8_t	idd[16];	/* Device ID Byte and Describe Record */
uint8_t           111 include/linux/hil_mlc.h 	uint8_t	rsc[16];	/* Security Code Header and Record */
uint8_t           112 include/linux/hil_mlc.h 	uint8_t	exd[16];	/* Extended Describe Record */
uint8_t           113 include/linux/hil_mlc.h 	uint8_t	rnm[16];	/* Device name as returned by RNM command */
uint8_t           171 include/linux/hmm.h 	uint8_t			pfn_shift;
uint8_t            55 include/linux/hp_sdc.h 			       uint8_t status, uint8_t data);
uint8_t            68 include/linux/hp_sdc.h 	uint8_t *seq;	/* commands/data for the transaction */
uint8_t           270 include/linux/hp_sdc.h 	uint8_t		im;		/* Interrupt mask */
uint8_t           274 include/linux/hp_sdc.h 	uint8_t		wi;		/* current i8042 write index */
uint8_t           275 include/linux/hp_sdc.h 	uint8_t		r7[4];          /* current i8042[0x70 - 0x74] values */
uint8_t           276 include/linux/hp_sdc.h 	uint8_t		r11, r7e;	/* Values from version/revision regs */
uint8_t            21 include/linux/ihex.h 	uint8_t data[0];
uint8_t            73 include/linux/iio/adc/ad_sigma_delta.h 	uint8_t			comm;
uint8_t            81 include/linux/iio/adc/ad_sigma_delta.h 	uint8_t				data[4] ____cacheline_aligned;
uint8_t           111 include/linux/iio/adc/ad_sigma_delta.h void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm);
uint8_t            70 include/linux/iio/imu/adis.h 	uint8_t			tx[10] ____cacheline_aligned;
uint8_t            71 include/linux/iio/imu/adis.h 	uint8_t			rx[4];
uint8_t            90 include/linux/iio/imu/adis.h 	uint8_t val)
uint8_t            41 include/linux/input/cma3000.h 	uint8_t mode;
uint8_t            42 include/linux/input/cma3000.h 	uint8_t mdthr;
uint8_t            43 include/linux/input/cma3000.h 	uint8_t mdfftmr;
uint8_t            44 include/linux/input/cma3000.h 	uint8_t ffthr;
uint8_t            89 include/linux/intel-ish-client-if.h int ishtp_cl_send(struct ishtp_cl *cl, uint8_t *buf, size_t length);
uint8_t            26 include/linux/ipmi-fru.h 	uint8_t format;			/* 0x01 */
uint8_t            27 include/linux/ipmi-fru.h 	uint8_t internal_use_off;	/* multiple of 8 bytes */
uint8_t            28 include/linux/ipmi-fru.h 	uint8_t chassis_info_off;	/* multiple of 8 bytes */
uint8_t            29 include/linux/ipmi-fru.h 	uint8_t board_area_off;		/* multiple of 8 bytes */
uint8_t            30 include/linux/ipmi-fru.h 	uint8_t product_area_off;	/* multiple of 8 bytes */
uint8_t            31 include/linux/ipmi-fru.h 	uint8_t multirecord_off;	/* multiple of 8 bytes */
uint8_t            32 include/linux/ipmi-fru.h 	uint8_t pad;			/* must be 0 */
uint8_t            33 include/linux/ipmi-fru.h 	uint8_t checksum;		/* sum modulo 256 must be 0 */
uint8_t            42 include/linux/ipmi-fru.h 	uint8_t type_length;
uint8_t            43 include/linux/ipmi-fru.h 	uint8_t data[0];
uint8_t            48 include/linux/ipmi-fru.h 	uint8_t format;			/* 0x01 */
uint8_t            49 include/linux/ipmi-fru.h 	uint8_t area_len;		/* multiple of 8 bytes */
uint8_t            50 include/linux/ipmi-fru.h 	uint8_t language;		/* I hope it's 0 */
uint8_t            51 include/linux/ipmi-fru.h 	uint8_t mfg_date[3];		/* LSB, minutes since 1996-01-01 */
uint8_t           179 include/linux/ipmi_smi.h static inline int ipmi_demangle_device_id(uint8_t netfn, uint8_t cmd,
uint8_t           299 include/linux/lightnvm.h 	uint8_t opcode;
uint8_t           102 include/linux/lz4.h 	const uint8_t *dictionary;
uint8_t           103 include/linux/lz4.h 	uint8_t *bufferStart;
uint8_t           143 include/linux/lz4.h 	const uint8_t *externalDict;
uint8_t           145 include/linux/lz4.h 	const uint8_t *prefixEnd;
uint8_t           287 include/linux/mfd/adp5520.h extern int adp5520_read(struct device *dev, int reg, uint8_t *val);
uint8_t           289 include/linux/mfd/adp5520.h extern int adp5520_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
uint8_t           290 include/linux/mfd/adp5520.h extern int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask);
uint8_t           156 include/linux/mfd/arizona/core.h 	uint8_t dac_comp_enabled;
uint8_t           241 include/linux/mfd/da903x.h extern int da903x_write(struct device *dev, int reg, uint8_t val);
uint8_t           242 include/linux/mfd/da903x.h extern int da903x_writes(struct device *dev, int reg, int len, uint8_t *val);
uint8_t           243 include/linux/mfd/da903x.h extern int da903x_read(struct device *dev, int reg, uint8_t *val);
uint8_t           244 include/linux/mfd/da903x.h extern int da903x_reads(struct device *dev, int reg, int len, uint8_t *val);
uint8_t           245 include/linux/mfd/da903x.h extern int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask);
uint8_t           246 include/linux/mfd/da903x.h extern int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
uint8_t           247 include/linux/mfd/da903x.h extern int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
uint8_t            33 include/linux/mfd/pcf50633/backlight.h 	uint8_t		ramp_time;
uint8_t           294 include/linux/mfd/rc5t583.h 	uint8_t		intc_inten_reg;
uint8_t           297 include/linux/mfd/rc5t583.h 	uint8_t		irq_en_reg[RC5T583_MAX_INTERRUPT_EN_REGS];
uint8_t           300 include/linux/mfd/rc5t583.h 	uint8_t		gpedge_reg[RC5T583_MAX_GPEDGE_REG];
uint8_t           326 include/linux/mfd/rc5t583.h static inline int rc5t583_write(struct device *dev, uint8_t reg, uint8_t val)
uint8_t           332 include/linux/mfd/rc5t583.h static inline int rc5t583_read(struct device *dev, uint8_t reg, uint8_t *val)
uint8_t           339 include/linux/mfd/rc5t583.h 		*val = (uint8_t)ival;
uint8_t           114 include/linux/mfd/tps65090.h static inline int tps65090_write(struct device *dev, int reg, uint8_t val)
uint8_t           121 include/linux/mfd/tps65090.h static inline int tps65090_read(struct device *dev, int reg, uint8_t *val)
uint8_t           134 include/linux/mfd/tps65090.h 		uint8_t bit_num)
uint8_t           142 include/linux/mfd/tps65090.h 		uint8_t bit_num)
uint8_t           101 include/linux/mfd/tps6586x.h extern int tps6586x_write(struct device *dev, int reg, uint8_t val);
uint8_t           102 include/linux/mfd/tps6586x.h extern int tps6586x_writes(struct device *dev, int reg, int len, uint8_t *val);
uint8_t           103 include/linux/mfd/tps6586x.h extern int tps6586x_read(struct device *dev, int reg, uint8_t *val);
uint8_t           104 include/linux/mfd/tps6586x.h extern int tps6586x_reads(struct device *dev, int reg, int len, uint8_t *val);
uint8_t           105 include/linux/mfd/tps6586x.h extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
uint8_t           106 include/linux/mfd/tps6586x.h extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
uint8_t           107 include/linux/mfd/tps6586x.h extern int tps6586x_update(struct device *dev, int reg, uint8_t val,
uint8_t           108 include/linux/mfd/tps6586x.h 			   uint8_t mask);
uint8_t           548 include/linux/mfd/tps80031.h 		int reg, uint8_t val)
uint8_t           556 include/linux/mfd/tps80031.h 		int len, uint8_t *val)
uint8_t           564 include/linux/mfd/tps80031.h 		int reg, uint8_t *val)
uint8_t           581 include/linux/mfd/tps80031.h 		int reg, int len, uint8_t *val)
uint8_t           589 include/linux/mfd/tps80031.h 		int reg, uint8_t bit_mask)
uint8_t           598 include/linux/mfd/tps80031.h 		int reg, uint8_t bit_mask)
uint8_t           606 include/linux/mfd/tps80031.h 		int reg, uint8_t val, uint8_t mask)
uint8_t            70 include/linux/mlx5/device.h #define MLX5_ADDR_OF(typ, p, fld) ((void *)((uint8_t *)(p) + MLX5_BYTE_OFF(typ, fld)))
uint8_t            54 include/linux/mpi.h int mpi_read_buffer(MPI a, uint8_t *buf, unsigned buf_len, unsigned *nbytes,
uint8_t            46 include/linux/mtd/bbm.h 	uint8_t version[NAND_MAX_CHIPS];
uint8_t            50 include/linux/mtd/bbm.h 	uint8_t *pattern;
uint8_t           130 include/linux/mtd/bbm.h 	uint8_t *bbt;
uint8_t           120 include/linux/mtd/cfi.h 	uint8_t  qry[3];
uint8_t           125 include/linux/mtd/cfi.h 	uint8_t  VccMin;
uint8_t           126 include/linux/mtd/cfi.h 	uint8_t  VccMax;
uint8_t           127 include/linux/mtd/cfi.h 	uint8_t  VppMin;
uint8_t           128 include/linux/mtd/cfi.h 	uint8_t  VppMax;
uint8_t           129 include/linux/mtd/cfi.h 	uint8_t  WordWriteTimeoutTyp;
uint8_t           130 include/linux/mtd/cfi.h 	uint8_t  BufWriteTimeoutTyp;
uint8_t           131 include/linux/mtd/cfi.h 	uint8_t  BlockEraseTimeoutTyp;
uint8_t           132 include/linux/mtd/cfi.h 	uint8_t  ChipEraseTimeoutTyp;
uint8_t           133 include/linux/mtd/cfi.h 	uint8_t  WordWriteTimeoutMax;
uint8_t           134 include/linux/mtd/cfi.h 	uint8_t  BufWriteTimeoutMax;
uint8_t           135 include/linux/mtd/cfi.h 	uint8_t  BlockEraseTimeoutMax;
uint8_t           136 include/linux/mtd/cfi.h 	uint8_t  ChipEraseTimeoutMax;
uint8_t           137 include/linux/mtd/cfi.h 	uint8_t  DevSize;
uint8_t           140 include/linux/mtd/cfi.h 	uint8_t  NumEraseRegions;
uint8_t           147 include/linux/mtd/cfi.h 	uint8_t  pri[3];
uint8_t           148 include/linux/mtd/cfi.h 	uint8_t  MajorVersion;
uint8_t           149 include/linux/mtd/cfi.h 	uint8_t  MinorVersion;
uint8_t           155 include/linux/mtd/cfi.h 	uint8_t  pri[3];
uint8_t           156 include/linux/mtd/cfi.h 	uint8_t  MajorVersion;
uint8_t           157 include/linux/mtd/cfi.h 	uint8_t  MinorVersion;
uint8_t           160 include/linux/mtd/cfi.h 	uint8_t  SuspendCmdSupport;
uint8_t           162 include/linux/mtd/cfi.h 	uint8_t  VccOptimal;
uint8_t           163 include/linux/mtd/cfi.h 	uint8_t  VppOptimal;
uint8_t           164 include/linux/mtd/cfi.h 	uint8_t  NumProtectionFields;
uint8_t           166 include/linux/mtd/cfi.h 	uint8_t  FactProtRegSize;
uint8_t           167 include/linux/mtd/cfi.h 	uint8_t  UserProtRegSize;
uint8_t           168 include/linux/mtd/cfi.h 	uint8_t  extra[0];
uint8_t           174 include/linux/mtd/cfi.h 	uint8_t  FactProtRegSize;
uint8_t           176 include/linux/mtd/cfi.h 	uint8_t  UserProtRegSize;
uint8_t           183 include/linux/mtd/cfi.h 	uint8_t  BitsPerCell;
uint8_t           184 include/linux/mtd/cfi.h 	uint8_t  BlockCap;
uint8_t           189 include/linux/mtd/cfi.h 	uint8_t  NumOpAllowed;
uint8_t           190 include/linux/mtd/cfi.h 	uint8_t  NumOpAllowedSimProgMode;
uint8_t           191 include/linux/mtd/cfi.h 	uint8_t  NumOpAllowedSimEraMode;
uint8_t           192 include/linux/mtd/cfi.h 	uint8_t  NumBlockTypes;
uint8_t           197 include/linux/mtd/cfi.h 	uint8_t  ProgRegShift;
uint8_t           198 include/linux/mtd/cfi.h 	uint8_t  Reserved1;
uint8_t           199 include/linux/mtd/cfi.h 	uint8_t  ControlValid;
uint8_t           200 include/linux/mtd/cfi.h 	uint8_t  Reserved2;
uint8_t           201 include/linux/mtd/cfi.h 	uint8_t  ControlInvalid;
uint8_t           202 include/linux/mtd/cfi.h 	uint8_t  Reserved3;
uint8_t           208 include/linux/mtd/cfi.h 	uint8_t  pri[3];
uint8_t           209 include/linux/mtd/cfi.h 	uint8_t  MajorVersion;
uint8_t           210 include/linux/mtd/cfi.h 	uint8_t  MinorVersion;
uint8_t           211 include/linux/mtd/cfi.h 	uint8_t  SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
uint8_t           212 include/linux/mtd/cfi.h 	uint8_t  EraseSuspend;
uint8_t           213 include/linux/mtd/cfi.h 	uint8_t  BlkProt;
uint8_t           214 include/linux/mtd/cfi.h 	uint8_t  TmpBlkUnprotect;
uint8_t           215 include/linux/mtd/cfi.h 	uint8_t  BlkProtUnprot;
uint8_t           216 include/linux/mtd/cfi.h 	uint8_t  SimultaneousOps;
uint8_t           217 include/linux/mtd/cfi.h 	uint8_t  BurstMode;
uint8_t           218 include/linux/mtd/cfi.h 	uint8_t  PageMode;
uint8_t           219 include/linux/mtd/cfi.h 	uint8_t  VppMin;
uint8_t           220 include/linux/mtd/cfi.h 	uint8_t  VppMax;
uint8_t           221 include/linux/mtd/cfi.h 	uint8_t  TopBottom;
uint8_t           223 include/linux/mtd/cfi.h 	uint8_t  ProgramSuspend;
uint8_t           224 include/linux/mtd/cfi.h 	uint8_t  UnlockBypass;
uint8_t           225 include/linux/mtd/cfi.h 	uint8_t  SecureSiliconSector;
uint8_t           226 include/linux/mtd/cfi.h 	uint8_t  SoftwareFeatures;
uint8_t           234 include/linux/mtd/cfi.h 	uint8_t pri[3];
uint8_t           235 include/linux/mtd/cfi.h 	uint8_t MajorVersion;
uint8_t           236 include/linux/mtd/cfi.h 	uint8_t MinorVersion;
uint8_t           237 include/linux/mtd/cfi.h 	uint8_t Features;
uint8_t           238 include/linux/mtd/cfi.h 	uint8_t BottomBoot;
uint8_t           239 include/linux/mtd/cfi.h 	uint8_t BurstMode;
uint8_t           240 include/linux/mtd/cfi.h 	uint8_t PageMode;
uint8_t           244 include/linux/mtd/cfi.h 	uint8_t  NumFields;
uint8_t           249 include/linux/mtd/cfi.h 	uint8_t  PageModeReadCap;
uint8_t           250 include/linux/mtd/cfi.h 	uint8_t  NumFields;
uint8_t           306 include/linux/mtd/cfi.h static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
uint8_t            35 include/linux/mtd/ftl.h     uint8_t	LinkTargetTuple[5];
uint8_t            36 include/linux/mtd/ftl.h     uint8_t	DataOrgTuple[10];
uint8_t            37 include/linux/mtd/ftl.h     uint8_t	NumTransferUnits;
uint8_t            40 include/linux/mtd/ftl.h     uint8_t	BlockSize;
uint8_t            41 include/linux/mtd/ftl.h     uint8_t	EraseUnitSize;
uint8_t            47 include/linux/mtd/ftl.h     uint8_t	Flags;
uint8_t            48 include/linux/mtd/ftl.h     uint8_t	Code;
uint8_t            52 include/linux/mtd/ftl.h     uint8_t	Reserved[12];
uint8_t            53 include/linux/mtd/ftl.h     uint8_t	EndTuple[2];
uint8_t            57 include/linux/mtd/inftl.h 		   size_t *retlen, uint8_t *buf);
uint8_t            59 include/linux/mtd/inftl.h 		    size_t *retlen, uint8_t *buf);
uint8_t            70 include/linux/mtd/mtd.h 	uint8_t		*datbuf;
uint8_t            71 include/linux/mtd/mtd.h 	uint8_t		*oobbuf;
uint8_t            45 include/linux/mtd/nftl.h 		  size_t *retlen, uint8_t *buf);
uint8_t            47 include/linux/mtd/nftl.h 		   size_t *retlen, uint8_t *buf);
uint8_t            59 include/linux/mtd/platnand.h 	void (*write_buf)(struct nand_chip *chip, const uint8_t *buf, int len);
uint8_t            60 include/linux/mtd/platnand.h 	void (*read_buf)(struct nand_chip *chip, uint8_t *buf, int len);
uint8_t            38 include/linux/mtd/qinfo.h 	uint8_t	major;
uint8_t            39 include/linux/mtd/qinfo.h 	uint8_t	minor;
uint8_t           368 include/linux/mtd/rawnand.h 	int (*calculate)(struct nand_chip *chip, const uint8_t *dat,
uint8_t           369 include/linux/mtd/rawnand.h 			 uint8_t *ecc_code);
uint8_t           370 include/linux/mtd/rawnand.h 	int (*correct)(struct nand_chip *chip, uint8_t *dat, uint8_t *read_ecc,
uint8_t           371 include/linux/mtd/rawnand.h 		       uint8_t *calc_ecc);
uint8_t           372 include/linux/mtd/rawnand.h 	int (*read_page_raw)(struct nand_chip *chip, uint8_t *buf,
uint8_t           374 include/linux/mtd/rawnand.h 	int (*write_page_raw)(struct nand_chip *chip, const uint8_t *buf,
uint8_t           376 include/linux/mtd/rawnand.h 	int (*read_page)(struct nand_chip *chip, uint8_t *buf,
uint8_t           379 include/linux/mtd/rawnand.h 			    uint32_t len, uint8_t *buf, int page);
uint8_t           381 include/linux/mtd/rawnand.h 			     uint32_t data_len, const uint8_t *data_buf,
uint8_t           383 include/linux/mtd/rawnand.h 	int (*write_page)(struct nand_chip *chip, const uint8_t *buf,
uint8_t          1121 include/linux/mtd/rawnand.h 	uint8_t *oob_poi;
uint8_t          1127 include/linux/mtd/rawnand.h 	uint8_t *bbt;
uint8_t          1247 include/linux/mtd/rawnand.h 			uint8_t mfr_id;
uint8_t          1248 include/linux/mtd/rawnand.h 			uint8_t dev_id;
uint8_t          1250 include/linux/mtd/rawnand.h 		uint8_t id[NAND_MAX_ID_LEN];
uint8_t          1316 include/linux/mtd/rawnand.h int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required,
uint8_t          1320 include/linux/mtd/rawnand.h int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
uint8_t           140 include/linux/mtd/sh_flctl.h 	uint8_t	done_buff[2048 + 64];	/* max size 2048 + 64 */
uint8_t           285 include/linux/netfilter.h NF_HOOK_COND(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk,
uint8_t           299 include/linux/netfilter.h NF_HOOK(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk, struct sk_buff *skb,
uint8_t           310 include/linux/netfilter.h NF_HOOK_LIST(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk,
uint8_t           387 include/linux/netfilter.h NF_HOOK_COND(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk,
uint8_t           396 include/linux/netfilter.h NF_HOOK(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk,
uint8_t           404 include/linux/netfilter.h NF_HOOK_LIST(uint8_t pf, unsigned int hook, struct net *net, struct sock *sk,
uint8_t           182 include/linux/pe.h 	uint8_t  ld_major;	/* linker major version */
uint8_t           183 include/linux/pe.h 	uint8_t  ld_minor;	/* linker minor version */
uint8_t           217 include/linux/pe.h 	uint8_t  ld_major;	/* linker major version */
uint8_t           218 include/linux/pe.h 	uint8_t  ld_minor;	/* linker minor version */
uint8_t            17 include/linux/phonet.h 	uint8_t device;
uint8_t            30 include/linux/platform_data/cros_ec_chardev.h 	uint8_t buffer[EC_MEMMAP_SIZE];
uint8_t           580 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;
uint8_t           581 include/linux/platform_data/cros_ec_commands.h 	uint8_t command_version;
uint8_t           582 include/linux/platform_data/cros_ec_commands.h 	uint8_t data_size;
uint8_t           583 include/linux/platform_data/cros_ec_commands.h 	uint8_t checksum;
uint8_t           749 include/linux/platform_data/cros_ec_commands.h 	uint8_t struct_version;
uint8_t           750 include/linux/platform_data/cros_ec_commands.h 	uint8_t checksum;
uint8_t           752 include/linux/platform_data/cros_ec_commands.h 	uint8_t command_version;
uint8_t           753 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;
uint8_t           769 include/linux/platform_data/cros_ec_commands.h 	uint8_t struct_version;
uint8_t           770 include/linux/platform_data/cros_ec_commands.h 	uint8_t checksum;
uint8_t           844 include/linux/platform_data/cros_ec_commands.h 	uint8_t fields0;
uint8_t           851 include/linux/platform_data/cros_ec_commands.h 	uint8_t fields1;
uint8_t           860 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;
uint8_t           863 include/linux/platform_data/cros_ec_commands.h 	uint8_t header_crc;
uint8_t           874 include/linux/platform_data/cros_ec_commands.h 	uint8_t fields0;
uint8_t           880 include/linux/platform_data/cros_ec_commands.h 	uint8_t fields1;
uint8_t           889 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;
uint8_t           892 include/linux/platform_data/cros_ec_commands.h 	uint8_t header_crc;
uint8_t          1053 include/linux/platform_data/cros_ec_commands.h 	uint8_t offset;
uint8_t          1054 include/linux/platform_data/cros_ec_commands.h 	uint8_t size;
uint8_t          1065 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;
uint8_t          1116 include/linux/platform_data/cros_ec_commands.h 	uint8_t buf[32];
uint8_t          1121 include/linux/platform_data/cros_ec_commands.h 	uint8_t buf[32];
uint8_t          1392 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved[2];
uint8_t          1399 include/linux/platform_data/cros_ec_commands.h 	uint8_t size_exp;
uint8_t          1401 include/linux/platform_data/cros_ec_commands.h 	uint8_t write_size_exp;
uint8_t          1403 include/linux/platform_data/cros_ec_commands.h 	uint8_t erase_size_exp;
uint8_t          1405 include/linux/platform_data/cros_ec_commands.h 	uint8_t protect_size_exp;
uint8_t          1407 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved[2];
uint8_t          1503 include/linux/platform_data/cros_ec_commands.h 	uint8_t  cmd;
uint8_t          1504 include/linux/platform_data/cros_ec_commands.h 	uint8_t  reserved;
uint8_t          1643 include/linux/platform_data/cros_ec_commands.h 	uint8_t block[EC_VBNV_BLOCK_SIZE];
uint8_t          1647 include/linux/platform_data/cros_ec_commands.h 	uint8_t block[EC_VBNV_BLOCK_SIZE];
uint8_t          1656 include/linux/platform_data/cros_ec_commands.h 	uint8_t jedec[3];
uint8_t          1659 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved0;
uint8_t          1662 include/linux/platform_data/cros_ec_commands.h 	uint8_t mfr_dev_id[2];
uint8_t          1665 include/linux/platform_data/cros_ec_commands.h 	uint8_t sr1, sr2;
uint8_t          1677 include/linux/platform_data/cros_ec_commands.h 	uint8_t select;
uint8_t          1702 include/linux/platform_data/cros_ec_commands.h 	uint8_t fan_idx;
uint8_t          1710 include/linux/platform_data/cros_ec_commands.h 	uint8_t percent;
uint8_t          1711 include/linux/platform_data/cros_ec_commands.h 	uint8_t enabled;
uint8_t          1719 include/linux/platform_data/cros_ec_commands.h 	uint8_t percent;
uint8_t          1733 include/linux/platform_data/cros_ec_commands.h 	uint8_t fan_idx;
uint8_t          1752 include/linux/platform_data/cros_ec_commands.h 	uint8_t pwm_type;  /* ec_pwm_type */
uint8_t          1753 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;     /* Type-specific index, or 0 if unique */
uint8_t          1759 include/linux/platform_data/cros_ec_commands.h 	uint8_t pwm_type;  /* ec_pwm_type */
uint8_t          1760 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;     /* Type-specific index, or 0 if unique */
uint8_t          1777 include/linux/platform_data/cros_ec_commands.h 	uint8_t r, g, b;
uint8_t          1799 include/linux/platform_data/cros_ec_commands.h 	uint8_t new_s0;
uint8_t          1800 include/linux/platform_data/cros_ec_commands.h 	uint8_t osc_min[2];			/* AC=0/1 */
uint8_t          1801 include/linux/platform_data/cros_ec_commands.h 	uint8_t osc_max[2];			/* AC=0/1 */
uint8_t          1802 include/linux/platform_data/cros_ec_commands.h 	uint8_t w_ofs[2];			/* AC=0/1 */
uint8_t          1805 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
uint8_t          1806 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
uint8_t          1807 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
uint8_t          1810 include/linux/platform_data/cros_ec_commands.h 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
uint8_t          1813 include/linux/platform_data/cros_ec_commands.h 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
uint8_t          1814 include/linux/platform_data/cros_ec_commands.h 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
uint8_t          1838 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_pct_red;
uint8_t          1839 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_pct_green;
uint8_t          1840 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_seg_min_on;
uint8_t          1841 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_seg_max_on;
uint8_t          1842 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_seg_osc;
uint8_t          1843 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_idx[3];
uint8_t          1846 include/linux/platform_data/cros_ec_commands.h 	uint8_t osc_min[2];			/* AC=0/1 */
uint8_t          1847 include/linux/platform_data/cros_ec_commands.h 	uint8_t osc_max[2];			/* AC=0/1 */
uint8_t          1848 include/linux/platform_data/cros_ec_commands.h 	uint8_t w_ofs[2];			/* AC=0/1 */
uint8_t          1851 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
uint8_t          1852 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
uint8_t          1853 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
uint8_t          1856 include/linux/platform_data/cros_ec_commands.h 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
uint8_t          1859 include/linux/platform_data/cros_ec_commands.h 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
uint8_t          1860 include/linux/platform_data/cros_ec_commands.h 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
uint8_t          1863 include/linux/platform_data/cros_ec_commands.h 	uint8_t s5_idx;
uint8_t          1898 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_pct_red;
uint8_t          1899 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_pct_green;
uint8_t          1900 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_seg_min_on;
uint8_t          1901 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_seg_max_on;
uint8_t          1902 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_seg_osc;
uint8_t          1903 include/linux/platform_data/cros_ec_commands.h 	uint8_t tap_idx[3];
uint8_t          1908 include/linux/platform_data/cros_ec_commands.h 	uint8_t osc_min[2];			/* AC=0/1 */
uint8_t          1909 include/linux/platform_data/cros_ec_commands.h 	uint8_t osc_max[2];			/* AC=0/1 */
uint8_t          1910 include/linux/platform_data/cros_ec_commands.h 	uint8_t w_ofs[2];			/* AC=0/1 */
uint8_t          1915 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
uint8_t          1916 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
uint8_t          1917 include/linux/platform_data/cros_ec_commands.h 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
uint8_t          1922 include/linux/platform_data/cros_ec_commands.h 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
uint8_t          1927 include/linux/platform_data/cros_ec_commands.h 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
uint8_t          1928 include/linux/platform_data/cros_ec_commands.h 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
uint8_t          1931 include/linux/platform_data/cros_ec_commands.h 	uint8_t s5_idx;
uint8_t          1940 include/linux/platform_data/cros_ec_commands.h 	uint8_t size;
uint8_t          1941 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[EC_LB_PROG_LEN];
uint8_t          1945 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;		      /* Command (see enum lightbar_command) */
uint8_t          1960 include/linux/platform_data/cros_ec_commands.h 			uint8_t num;
uint8_t          1964 include/linux/platform_data/cros_ec_commands.h 			uint8_t ctrl, reg, value;
uint8_t          1968 include/linux/platform_data/cros_ec_commands.h 			uint8_t led, red, green, blue;
uint8_t          1972 include/linux/platform_data/cros_ec_commands.h 			uint8_t led;
uint8_t          1976 include/linux/platform_data/cros_ec_commands.h 			uint8_t enable;
uint8_t          1997 include/linux/platform_data/cros_ec_commands.h 				uint8_t reg;
uint8_t          1998 include/linux/platform_data/cros_ec_commands.h 				uint8_t ic0;
uint8_t          1999 include/linux/platform_data/cros_ec_commands.h 				uint8_t ic1;
uint8_t          2004 include/linux/platform_data/cros_ec_commands.h 			uint8_t num;
uint8_t          2024 include/linux/platform_data/cros_ec_commands.h 			uint8_t red, green, blue;
uint8_t          2121 include/linux/platform_data/cros_ec_commands.h 	uint8_t led_id;     /* Which LED to control */
uint8_t          2122 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;      /* Control flags */
uint8_t          2124 include/linux/platform_data/cros_ec_commands.h 	uint8_t brightness[EC_LED_COLOR_COUNT];
uint8_t          2135 include/linux/platform_data/cros_ec_commands.h 	uint8_t brightness_range[EC_LED_COLOR_COUNT];
uint8_t          2150 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;             /* enum ec_vboot_hash_cmd */
uint8_t          2151 include/linux/platform_data/cros_ec_commands.h 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
uint8_t          2152 include/linux/platform_data/cros_ec_commands.h 	uint8_t nonce_size;      /* Nonce size; may be 0 */
uint8_t          2153 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved0;       /* Reserved; set 0 */
uint8_t          2156 include/linux/platform_data/cros_ec_commands.h 	uint8_t nonce_data[64];  /* Nonce data; ignored if nonce_size=0 */
uint8_t          2160 include/linux/platform_data/cros_ec_commands.h 	uint8_t status;          /* enum ec_vboot_hash_status */
uint8_t          2161 include/linux/platform_data/cros_ec_commands.h 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
uint8_t          2162 include/linux/platform_data/cros_ec_commands.h 	uint8_t digest_size;     /* Size of hash digest in bytes */
uint8_t          2163 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved0;       /* Ignore; will be 0 */
uint8_t          2166 include/linux/platform_data/cros_ec_commands.h 	uint8_t hash_digest[64]; /* Hash digest data */
uint8_t          2391 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;
uint8_t          2393 include/linux/platform_data/cros_ec_commands.h 	uint8_t sensor_num;
uint8_t          2402 include/linux/platform_data/cros_ec_commands.h 			uint8_t     activity; /* motionsensor_activity */
uint8_t          2403 include/linux/platform_data/cros_ec_commands.h 			uint8_t     state;
uint8_t          2439 include/linux/platform_data/cros_ec_commands.h 	uint8_t sensor_num;
uint8_t          2440 include/linux/platform_data/cros_ec_commands.h 	uint8_t activity; /* one of enum motionsensor_activity */
uint8_t          2441 include/linux/platform_data/cros_ec_commands.h 	uint8_t enable;   /* 1: enable, 0: disable */
uint8_t          2442 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;
uint8_t          2495 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;
uint8_t          2504 include/linux/platform_data/cros_ec_commands.h 			uint8_t max_sensor_count;
uint8_t          2522 include/linux/platform_data/cros_ec_commands.h 			uint8_t sensor_num;
uint8_t          2531 include/linux/platform_data/cros_ec_commands.h 			uint8_t sensor_num;
uint8_t          2534 include/linux/platform_data/cros_ec_commands.h 			uint8_t roundup;
uint8_t          2544 include/linux/platform_data/cros_ec_commands.h 			uint8_t sensor_num;
uint8_t          2573 include/linux/platform_data/cros_ec_commands.h 			uint8_t sensor_num;
uint8_t          2629 include/linux/platform_data/cros_ec_commands.h 			uint8_t sensor_id;
uint8_t          2632 include/linux/platform_data/cros_ec_commands.h 			uint8_t spoof_enable;
uint8_t          2635 include/linux/platform_data/cros_ec_commands.h 			uint8_t reserved;
uint8_t          2666 include/linux/platform_data/cros_ec_commands.h 			uint8_t module_flags;
uint8_t          2669 include/linux/platform_data/cros_ec_commands.h 			uint8_t sensor_count;
uint8_t          2681 include/linux/platform_data/cros_ec_commands.h 			uint8_t type;
uint8_t          2684 include/linux/platform_data/cros_ec_commands.h 			uint8_t location;
uint8_t          2687 include/linux/platform_data/cros_ec_commands.h 			uint8_t chip;
uint8_t          2693 include/linux/platform_data/cros_ec_commands.h 			uint8_t type;
uint8_t          2696 include/linux/platform_data/cros_ec_commands.h 			uint8_t location;
uint8_t          2699 include/linux/platform_data/cros_ec_commands.h 			uint8_t chip;
uint8_t          2785 include/linux/platform_data/cros_ec_commands.h 	uint8_t enabled;
uint8_t          2799 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;
uint8_t          2809 include/linux/platform_data/cros_ec_commands.h 	uint8_t usb_port_id;
uint8_t          2810 include/linux/platform_data/cros_ec_commands.h 	uint8_t mode:7;
uint8_t          2811 include/linux/platform_data/cros_ec_commands.h 	uint8_t inhibit_charge:1;
uint8_t          2848 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[EC_PSTORE_SIZE_MAX];
uint8_t          2931 include/linux/platform_data/cros_ec_commands.h 	uint8_t slot_count;
uint8_t          2942 include/linux/platform_data/cros_ec_commands.h 	uint8_t slot; /* Slot to read from */
uint8_t          2946 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[EC_VSTORE_SLOT_SIZE];
uint8_t          2955 include/linux/platform_data/cros_ec_commands.h 	uint8_t slot; /* Slot to write to */
uint8_t          2956 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[EC_VSTORE_SLOT_SIZE];
uint8_t          2975 include/linux/platform_data/cros_ec_commands.h 	uint8_t sensor_type;
uint8_t          2976 include/linux/platform_data/cros_ec_commands.h 	uint8_t threshold_id;
uint8_t          2982 include/linux/platform_data/cros_ec_commands.h 	uint8_t sensor_type;
uint8_t          2983 include/linux/platform_data/cros_ec_commands.h 	uint8_t threshold_id;
uint8_t          3052 include/linux/platform_data/cros_ec_commands.h 	uint8_t fan_idx;
uint8_t          3070 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          3082 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          3083 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved[3];
uint8_t          3092 include/linux/platform_data/cros_ec_commands.h 	uint8_t algorithm;
uint8_t          3093 include/linux/platform_data/cros_ec_commands.h 	uint8_t num_params;
uint8_t          3094 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved[2];
uint8_t          3099 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          3100 include/linux/platform_data/cros_ec_commands.h 	uint8_t algorithm;
uint8_t          3101 include/linux/platform_data/cros_ec_commands.h 	uint8_t num_params;
uint8_t          3102 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;
uint8_t          3111 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          3143 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;
uint8_t          3147 include/linux/platform_data/cros_ec_commands.h 	uint8_t info_type;
uint8_t          3148 include/linux/platform_data/cros_ec_commands.h 	uint8_t event_type;
uint8_t          3194 include/linux/platform_data/cros_ec_commands.h 	uint8_t col;
uint8_t          3195 include/linux/platform_data/cros_ec_commands.h 	uint8_t row;
uint8_t          3196 include/linux/platform_data/cros_ec_commands.h 	uint8_t pressed;
uint8_t          3237 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;		/* some flags (enum mkbp_config_flags) */
uint8_t          3238 include/linux/platform_data/cros_ec_commands.h 	uint8_t valid_flags;		/* which flags are valid */
uint8_t          3253 include/linux/platform_data/cros_ec_commands.h 	uint8_t fifo_max_depth;
uint8_t          3284 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;		/* some flags (enum ec_collect_flags) */
uint8_t          3288 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;	/* Command to send (enum ec_keyscan_seq_cmd) */
uint8_t          3291 include/linux/platform_data/cros_ec_commands.h 			uint8_t active;		/* still active */
uint8_t          3292 include/linux/platform_data/cros_ec_commands.h 			uint8_t num_items;	/* number of items */
uint8_t          3294 include/linux/platform_data/cros_ec_commands.h 			uint8_t cur_item;
uint8_t          3302 include/linux/platform_data/cros_ec_commands.h 			uint8_t scan[0];	/* keyscan data */
uint8_t          3305 include/linux/platform_data/cros_ec_commands.h 			uint8_t start_item;	/* First item to return */
uint8_t          3306 include/linux/platform_data/cros_ec_commands.h 			uint8_t num_items;	/* Number of items to return */
uint8_t          3314 include/linux/platform_data/cros_ec_commands.h 			uint8_t num_items;	/* Number of items */
uint8_t          3382 include/linux/platform_data/cros_ec_commands.h 	uint8_t key_matrix[13];
uint8_t          3390 include/linux/platform_data/cros_ec_commands.h 		uint8_t reserved[3];
uint8_t          3407 include/linux/platform_data/cros_ec_commands.h 	uint8_t key_matrix[16];
uint8_t          3415 include/linux/platform_data/cros_ec_commands.h 		uint8_t reserved[3];
uint8_t          3430 include/linux/platform_data/cros_ec_commands.h 	uint8_t cec_message[16];
uint8_t          3435 include/linux/platform_data/cros_ec_commands.h 	uint8_t event_type;
uint8_t          3441 include/linux/platform_data/cros_ec_commands.h 	uint8_t event_type;
uint8_t          3506 include/linux/platform_data/cros_ec_commands.h 	uint8_t id;
uint8_t          3511 include/linux/platform_data/cros_ec_commands.h 	uint8_t sensor_type;
uint8_t          3560 include/linux/platform_data/cros_ec_commands.h 	uint8_t action;
uint8_t          3566 include/linux/platform_data/cros_ec_commands.h 	uint8_t mask_type;
uint8_t          3639 include/linux/platform_data/cros_ec_commands.h 	uint8_t enabled;
uint8_t          3648 include/linux/platform_data/cros_ec_commands.h 	uint8_t enabled;
uint8_t          3654 include/linux/platform_data/cros_ec_commands.h 	uint8_t now_flags;
uint8_t          3657 include/linux/platform_data/cros_ec_commands.h 	uint8_t now_mask;
uint8_t          3664 include/linux/platform_data/cros_ec_commands.h 	uint8_t suspend_flags;
uint8_t          3667 include/linux/platform_data/cros_ec_commands.h 	uint8_t suspend_mask;
uint8_t          3673 include/linux/platform_data/cros_ec_commands.h 	uint8_t now_flags;
uint8_t          3676 include/linux/platform_data/cros_ec_commands.h 	uint8_t suspend_flags;
uint8_t          3687 include/linux/platform_data/cros_ec_commands.h 	uint8_t val;
uint8_t          3699 include/linux/platform_data/cros_ec_commands.h 	uint8_t val;
uint8_t          3704 include/linux/platform_data/cros_ec_commands.h 	uint8_t subcmd;
uint8_t          3710 include/linux/platform_data/cros_ec_commands.h 			uint8_t index;
uint8_t          3718 include/linux/platform_data/cros_ec_commands.h 			uint8_t val;
uint8_t          3721 include/linux/platform_data/cros_ec_commands.h 			uint8_t val;
uint8_t          3749 include/linux/platform_data/cros_ec_commands.h 	uint8_t read_size; /* Either 8 or 16. */
uint8_t          3750 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;
uint8_t          3751 include/linux/platform_data/cros_ec_commands.h 	uint8_t offset;
uint8_t          3764 include/linux/platform_data/cros_ec_commands.h 	uint8_t write_size; /* Either 8 or 16. */
uint8_t          3765 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;
uint8_t          3766 include/linux/platform_data/cros_ec_commands.h 	uint8_t offset;
uint8_t          3813 include/linux/platform_data/cros_ec_commands.h 	uint8_t subcmd; /* enum ec_console_read_subcmd */
uint8_t          3830 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;
uint8_t          3842 include/linux/platform_data/cros_ec_commands.h 	uint8_t mux;
uint8_t          3859 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          3860 include/linux/platform_data/cros_ec_commands.h 	uint8_t state;
uint8_t          3869 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          3873 include/linux/platform_data/cros_ec_commands.h 	uint8_t state;
uint8_t          3915 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;		/* I2C port number */
uint8_t          3916 include/linux/platform_data/cros_ec_commands.h 	uint8_t num_msgs;	/* Number of messages */
uint8_t          3922 include/linux/platform_data/cros_ec_commands.h 	uint8_t i2c_status;	/* Status flags (EC_I2C_STATUS_...) */
uint8_t          3923 include/linux/platform_data/cros_ec_commands.h 	uint8_t num_msgs;	/* Number of messages processed */
uint8_t          3924 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[];		/* Data read by messages concatenated here */
uint8_t          4036 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;				/* enum charge_state_command */
uint8_t          4149 include/linux/platform_data/cros_ec_commands.h 	uint8_t sleep_event;
uint8_t          4163 include/linux/platform_data/cros_ec_commands.h 	uint8_t sleep_event;
uint8_t          4166 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;
uint8_t          4232 include/linux/platform_data/cros_ec_commands.h 	uint8_t param;
uint8_t          4253 include/linux/platform_data/cros_ec_commands.h 	uint8_t reg;
uint8_t          4261 include/linux/platform_data/cros_ec_commands.h 	uint8_t reg;
uint8_t          4266 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[32];
uint8_t          4270 include/linux/platform_data/cros_ec_commands.h 	uint8_t reg;
uint8_t          4293 include/linux/platform_data/cros_ec_commands.h 	uint8_t mode;
uint8_t          4339 include/linux/platform_data/cros_ec_commands.h 			uint8_t  data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
uint8_t          4348 include/linux/platform_data/cros_ec_commands.h 			uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
uint8_t          4353 include/linux/platform_data/cros_ec_commands.h 			uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
uint8_t          4386 include/linux/platform_data/cros_ec_commands.h 	uint8_t subcmd;
uint8_t          4387 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;		/* I2C port number */
uint8_t          4391 include/linux/platform_data/cros_ec_commands.h 	uint8_t status;		/* Status flags (0: unlocked, 1: locked) */
uint8_t          4412 include/linux/platform_data/cros_ec_commands.h 	uint8_t msg[MAX_CEC_MSG_LEN];
uint8_t          4427 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd; /* enum cec_command */
uint8_t          4428 include/linux/platform_data/cros_ec_commands.h 	uint8_t val;
uint8_t          4439 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd; /* enum cec_command */
uint8_t          4450 include/linux/platform_data/cros_ec_commands.h 	uint8_t val;
uint8_t          4505 include/linux/platform_data/cros_ec_commands.h 	uint8_t left;
uint8_t          4506 include/linux/platform_data/cros_ec_commands.h 	uint8_t right;
uint8_t          4512 include/linux/platform_data/cros_ec_commands.h 	uint8_t adjacent_to_ch0;
uint8_t          4513 include/linux/platform_data/cros_ec_commands.h 	uint8_t adjacent_to_ch1;
uint8_t          4518 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;
uint8_t          4524 include/linux/platform_data/cros_ec_commands.h 		uint8_t depth;
uint8_t          4536 include/linux/platform_data/cros_ec_commands.h 		uint8_t i2s_enable;
uint8_t          4542 include/linux/platform_data/cros_ec_commands.h 		uint8_t i2s_config;
uint8_t          4585 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;           /* enum ec_reboot_cmd */
uint8_t          4586 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags;         /* See EC_REBOOT_FLAG_* */
uint8_t          4659 include/linux/platform_data/cros_ec_commands.h 	uint8_t status;       /* EC status */
uint8_t          4661 include/linux/platform_data/cros_ec_commands.h 	uint8_t charge_state; /* charging state (from enum pd_charge_state) */
uint8_t          4725 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;
uint8_t          4726 include/linux/platform_data/cros_ec_commands.h 	uint8_t role;
uint8_t          4727 include/linux/platform_data/cros_ec_commands.h 	uint8_t mux;
uint8_t          4728 include/linux/platform_data/cros_ec_commands.h 	uint8_t swap;
uint8_t          4744 include/linux/platform_data/cros_ec_commands.h 	uint8_t enabled;
uint8_t          4745 include/linux/platform_data/cros_ec_commands.h 	uint8_t role;
uint8_t          4746 include/linux/platform_data/cros_ec_commands.h 	uint8_t polarity;
uint8_t          4747 include/linux/platform_data/cros_ec_commands.h 	uint8_t state;
uint8_t          4751 include/linux/platform_data/cros_ec_commands.h 	uint8_t enabled;
uint8_t          4752 include/linux/platform_data/cros_ec_commands.h 	uint8_t role;
uint8_t          4753 include/linux/platform_data/cros_ec_commands.h 	uint8_t polarity;
uint8_t          4766 include/linux/platform_data/cros_ec_commands.h 	uint8_t enabled;
uint8_t          4767 include/linux/platform_data/cros_ec_commands.h 	uint8_t role;
uint8_t          4768 include/linux/platform_data/cros_ec_commands.h 	uint8_t polarity;
uint8_t          4770 include/linux/platform_data/cros_ec_commands.h 	uint8_t cc_state; /* USBC_PD_CC_*Encoded cc state */
uint8_t          4771 include/linux/platform_data/cros_ec_commands.h 	uint8_t dp_mode;  /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
uint8_t          4773 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved_cable_type;
uint8_t          4782 include/linux/platform_data/cros_ec_commands.h 	uint8_t num_ports;
uint8_t          4789 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;
uint8_t          4820 include/linux/platform_data/cros_ec_commands.h 	uint8_t role;
uint8_t          4821 include/linux/platform_data/cros_ec_commands.h 	uint8_t type;
uint8_t          4822 include/linux/platform_data/cros_ec_commands.h 	uint8_t dualrole;
uint8_t          4823 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved1;
uint8_t          4836 include/linux/platform_data/cros_ec_commands.h 	uint8_t port_count;
uint8_t          4851 include/linux/platform_data/cros_ec_commands.h 	uint8_t cmd;
uint8_t          4852 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;
uint8_t          4863 include/linux/platform_data/cros_ec_commands.h 	uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
uint8_t          4864 include/linux/platform_data/cros_ec_commands.h 	uint8_t reserved;        /*
uint8_t          4876 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;
uint8_t          4884 include/linux/platform_data/cros_ec_commands.h 	uint8_t ptype; /* product type (hub,periph,cable,ama) */
uint8_t          4910 include/linux/platform_data/cros_ec_commands.h 	uint8_t type;       /* event type : see PD_EVENT_xx below */
uint8_t          4911 include/linux/platform_data/cros_ec_commands.h 	uint8_t size_port;  /* [7:5] port number [4:0] payload size in bytes */
uint8_t          4913 include/linux/platform_data/cros_ec_commands.h 	uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */
uint8_t          4977 include/linux/platform_data/cros_ec_commands.h 	uint8_t major;
uint8_t          4978 include/linux/platform_data/cros_ec_commands.h 	uint8_t minor;
uint8_t          4983 include/linux/platform_data/cros_ec_commands.h 	uint8_t family[2];
uint8_t          4984 include/linux/platform_data/cros_ec_commands.h 	uint8_t chipid[2];
uint8_t          4997 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;      /* port */
uint8_t          5018 include/linux/platform_data/cros_ec_commands.h 	uint8_t opos;  /* Object Position */
uint8_t          5019 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;  /* port */
uint8_t          5026 include/linux/platform_data/cros_ec_commands.h 	uint8_t type; /* event type : see PD_EVENT_xx above */
uint8_t          5027 include/linux/platform_data/cros_ec_commands.h 	uint8_t port; /* port#, or 0 for events unrelated to a given port */
uint8_t          5043 include/linux/platform_data/cros_ec_commands.h 	uint8_t chip;         /* chip id */
uint8_t          5044 include/linux/platform_data/cros_ec_commands.h 	uint8_t subcmd;
uint8_t          5051 include/linux/platform_data/cros_ec_commands.h 	uint8_t port; /* USB-C port number */
uint8_t          5062 include/linux/platform_data/cros_ec_commands.h 	uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
uint8_t          5068 include/linux/platform_data/cros_ec_commands.h 	uint8_t port;	/* USB-C port number */
uint8_t          5069 include/linux/platform_data/cros_ec_commands.h 	uint8_t renew;	/* Force renewal */
uint8_t          5077 include/linux/platform_data/cros_ec_commands.h 		uint8_t fw_version_string[8];
uint8_t          5087 include/linux/platform_data/cros_ec_commands.h 		uint8_t fw_version_string[8];
uint8_t          5091 include/linux/platform_data/cros_ec_commands.h 		uint8_t min_req_fw_version_string[8];
uint8_t          5119 include/linux/platform_data/cros_ec_commands.h 	uint8_t region;		/* enum ec_flash_region */
uint8_t          5172 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[];		/* For string and raw data */
uint8_t          5247 include/linux/platform_data/cros_ec_commands.h 	uint8_t action;
uint8_t          5256 include/linux/platform_data/cros_ec_commands.h 	uint8_t adc_channel;
uint8_t          5299 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[];		/* Data to send */
uint8_t          5453 include/linux/platform_data/cros_ec_commands.h 	uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
uint8_t          5454 include/linux/platform_data/cros_ec_commands.h 	uint8_t salt[FP_CONTEXT_SALT_BYTES];
uint8_t          5455 include/linux/platform_data/cros_ec_commands.h 	uint8_t tag[FP_CONTEXT_TAG_BYTES];
uint8_t          5477 include/linux/platform_data/cros_ec_commands.h 	uint8_t data[];
uint8_t          5500 include/linux/platform_data/cros_ec_commands.h 	uint8_t timestamps_invalid;
uint8_t          5513 include/linux/platform_data/cros_ec_commands.h 	uint8_t seed[FP_CONTEXT_TPM_BYTES];
uint8_t          5570 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          5605 include/linux/platform_data/cros_ec_commands.h 	uint8_t index;
uint8_t          5646 include/linux/platform_data/cros_ec_commands.h 	uint8_t allow_charging;
uint8_t            72 include/linux/platform_data/cros_ec_proto.h 	uint8_t data[0];
uint8_t            26 include/linux/platform_data/cyttsp4.h 	uint8_t         size;
uint8_t            27 include/linux/platform_data/cyttsp4.h 	uint8_t         enable_vkeys;
uint8_t            37 include/linux/platform_data/cyttsp4.h 	const uint8_t *data;
uint8_t            39 include/linux/platform_data/cyttsp4.h 	uint8_t tag;
uint8_t            38 include/linux/raid/pq.h typedef uint8_t  u8;
uint8_t            62 include/linux/rslib.h int encode_rs8(struct rs_control *rs, uint8_t *data, int len, uint16_t *par,
uint8_t            66 include/linux/rslib.h int decode_rs8(struct rs_control *rs, uint8_t *data, uint16_t *par, int len,
uint8_t           302 include/linux/sctp.h 	uint8_t hostname[0];
uint8_t            33 include/linux/sdb.h 	uint8_t			name[19];	/* 0x2c..0x3e */
uint8_t            34 include/linux/sdb.h 	uint8_t			record_type;	/* 0x3f */
uint8_t            69 include/linux/sdb.h 	uint8_t			sdb_version;	/* 0x06 */
uint8_t            70 include/linux/sdb.h 	uint8_t			sdb_bus_type;	/* 0x07 */
uint8_t            82 include/linux/sdb.h 	uint8_t			abi_ver_major;	/* 0x02 */
uint8_t            83 include/linux/sdb.h 	uint8_t			abi_ver_minor;	/* 0x03 */
uint8_t           104 include/linux/sdb.h 	uint8_t			reserved[24];	/* 0x00-0x17 */
uint8_t           113 include/linux/sdb.h 	uint8_t			repo_url[63];	/* 0x00-0x3e */
uint8_t           114 include/linux/sdb.h 	uint8_t			record_type;	/* 0x3f */
uint8_t           122 include/linux/sdb.h 	uint8_t			syn_name[16];	/* 0x00-0x0f */
uint8_t           123 include/linux/sdb.h 	uint8_t			commit_id[16];	/* 0x10-0x1f */
uint8_t           124 include/linux/sdb.h 	uint8_t			tool_name[8];	/* 0x20-0x27 */
uint8_t           127 include/linux/sdb.h 	uint8_t			user_name[15];	/* 0x30-0x3e */
uint8_t           128 include/linux/sdb.h 	uint8_t			record_type;	/* 0x3f */
uint8_t           139 include/linux/sdb.h 	uint8_t			reserved[63];	/* 0x00-0x3e */
uint8_t           140 include/linux/sdb.h 	uint8_t			record_type;	/* 0x3f */
uint8_t            57 include/linux/soc/qcom/apr.h 	uint8_t src_svc;
uint8_t            58 include/linux/soc/qcom/apr.h 	uint8_t src_domain;
uint8_t            60 include/linux/soc/qcom/apr.h 	uint8_t dest_svc;
uint8_t            61 include/linux/soc/qcom/apr.h 	uint8_t dest_domain;
uint8_t            69 include/linux/soc/qcom/apr.h 	uint8_t payload[];
uint8_t           176 include/linux/spi/spi.h 	uint8_t			word_delay_usecs; /* inter-word delay */
uint8_t           137 include/linux/xz.h 	const uint8_t *in;
uint8_t           141 include/linux/xz.h 	uint8_t *out;
uint8_t           262 include/linux/xz.h XZ_EXTERN uint32_t xz_crc32(const uint8_t *buf, size_t size, uint32_t crc);
uint8_t           234 include/media/dvb_demux.h 	uint8_t *cnt_storage; /* for TS continuity check */
uint8_t          5070 include/net/cfg80211.h 	uint8_t align:4, size:4;
uint8_t          5077 include/net/cfg80211.h 	uint8_t subns;
uint8_t           402 include/net/dsa.h 			       u32 stringset, uint8_t *data);
uint8_t           642 include/net/dsa.h int dsa_port_get_phy_strings(struct dsa_port *dp, uint8_t *data);
uint8_t            30 include/net/ieee80211_radiotap.h 	uint8_t it_version;
uint8_t            35 include/net/ieee80211_radiotap.h 	uint8_t it_pad;
uint8_t            64 include/rdma/opa_smi.h 			uint8_t data[OPA_SMP_LID_DATA_SIZE];
uint8_t           314 include/scsi/iscsi_if.h 	uint8_t value[0];	/* length sized value follows */
uint8_t           321 include/scsi/iscsi_if.h 	uint8_t iface_type;	/* IPv4 or IPv6 */
uint8_t           322 include/scsi/iscsi_if.h 	uint8_t param_type;	/* iscsi_param_type */
uint8_t           323 include/scsi/iscsi_if.h 	uint8_t value[0];	/* length sized value follows */
uint8_t           334 include/scsi/iscsi_if.h 	uint8_t		mac_addr[6];
uint8_t           335 include/scsi/iscsi_if.h 	uint8_t		mac_addr_old[6];
uint8_t           700 include/scsi/iscsi_if.h 	uint8_t value[0];	/* length sized value follows */
uint8_t           841 include/scsi/iscsi_if.h 	uint8_t password[ISCSI_CHAP_AUTH_SECRET_MAX_LEN];
uint8_t           842 include/scsi/iscsi_if.h 	uint8_t password_length;
uint8_t            77 include/scsi/iscsi_proto.h 	uint8_t		opcode;
uint8_t            78 include/scsi/iscsi_proto.h 	uint8_t		flags;		/* Final bit */
uint8_t            79 include/scsi/iscsi_proto.h 	uint8_t		rsvd2[2];
uint8_t            80 include/scsi/iscsi_proto.h 	uint8_t		hlength;	/* AHSs total length */
uint8_t            81 include/scsi/iscsi_proto.h 	uint8_t		dlength[3];	/* Data length */
uint8_t            88 include/scsi/iscsi_proto.h 	uint8_t		other[12];
uint8_t           129 include/scsi/iscsi_proto.h 	uint8_t ahstype;
uint8_t           130 include/scsi/iscsi_proto.h 	uint8_t ahspec[5];
uint8_t           139 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           140 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           142 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           143 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           149 include/scsi/iscsi_proto.h 	uint8_t cdb[ISCSI_CDB_SIZE];	/* SCSI Command Block */
uint8_t           168 include/scsi/iscsi_proto.h 	uint8_t ahstype;
uint8_t           169 include/scsi/iscsi_proto.h 	uint8_t reserved;
uint8_t           176 include/scsi/iscsi_proto.h 	uint8_t ahstype;
uint8_t           177 include/scsi/iscsi_proto.h 	uint8_t reserved;
uint8_t           179 include/scsi/iscsi_proto.h 	uint8_t ecdb[SCSI_MAX_VARLEN_CDB_SIZE - ISCSI_CDB_SIZE];
uint8_t           184 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           185 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           186 include/scsi/iscsi_proto.h 	uint8_t response;
uint8_t           187 include/scsi/iscsi_proto.h 	uint8_t cmd_status;
uint8_t           188 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           189 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           190 include/scsi/iscsi_proto.h 	uint8_t rsvd[8];
uint8_t           215 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           216 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           217 include/scsi/iscsi_proto.h 	uint8_t rsvd2[2];
uint8_t           218 include/scsi/iscsi_proto.h 	uint8_t rsvd3;
uint8_t           219 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           221 include/scsi/iscsi_proto.h 	uint8_t rsvd4[8];
uint8_t           225 include/scsi/iscsi_proto.h 	uint8_t async_event;
uint8_t           226 include/scsi/iscsi_proto.h 	uint8_t async_vcode;
uint8_t           230 include/scsi/iscsi_proto.h 	uint8_t rsvd5[4];
uint8_t           243 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           244 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           246 include/scsi/iscsi_proto.h 	uint8_t rsvd3;
uint8_t           247 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           253 include/scsi/iscsi_proto.h 	uint8_t rsvd4[16];
uint8_t           258 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           259 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           261 include/scsi/iscsi_proto.h 	uint8_t rsvd3;
uint8_t           262 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           269 include/scsi/iscsi_proto.h 	uint8_t rsvd4[12];
uint8_t           274 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           275 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           276 include/scsi/iscsi_proto.h 	uint8_t rsvd1[2];
uint8_t           277 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           278 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           286 include/scsi/iscsi_proto.h 	uint8_t rsvd2[8];
uint8_t           305 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           306 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           307 include/scsi/iscsi_proto.h 	uint8_t response;	/* see Response values below */
uint8_t           308 include/scsi/iscsi_proto.h 	uint8_t qualifier;
uint8_t           309 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           310 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           311 include/scsi/iscsi_proto.h 	uint8_t rsvd2[8];
uint8_t           317 include/scsi/iscsi_proto.h 	uint8_t rsvd3[12];
uint8_t           332 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           333 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           334 include/scsi/iscsi_proto.h 	uint8_t rsvd2[2];
uint8_t           335 include/scsi/iscsi_proto.h 	uint8_t	hlength;
uint8_t           336 include/scsi/iscsi_proto.h 	uint8_t	dlength[3];
uint8_t           350 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           351 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           352 include/scsi/iscsi_proto.h 	uint8_t rsvd2[2];
uint8_t           353 include/scsi/iscsi_proto.h 	uint8_t rsvd3;
uint8_t           354 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           369 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           370 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           371 include/scsi/iscsi_proto.h 	uint8_t rsvd2;
uint8_t           372 include/scsi/iscsi_proto.h 	uint8_t cmd_status;
uint8_t           373 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           374 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           394 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           395 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           396 include/scsi/iscsi_proto.h 	uint8_t rsvd2[2];
uint8_t           397 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           398 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           399 include/scsi/iscsi_proto.h 	uint8_t rsvd4[8];
uint8_t           404 include/scsi/iscsi_proto.h 	uint8_t rsvd5[16];
uint8_t           412 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           413 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           414 include/scsi/iscsi_proto.h 	uint8_t rsvd2[2];
uint8_t           415 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           416 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           417 include/scsi/iscsi_proto.h 	uint8_t rsvd4[8];
uint8_t           423 include/scsi/iscsi_proto.h 	uint8_t rsvd5[12];
uint8_t           429 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           430 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           431 include/scsi/iscsi_proto.h 	uint8_t max_version;	/* Max. version supported */
uint8_t           432 include/scsi/iscsi_proto.h 	uint8_t min_version;	/* Min. version supported */
uint8_t           433 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           434 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           435 include/scsi/iscsi_proto.h 	uint8_t isid[6];	/* Initiator Session ID */
uint8_t           442 include/scsi/iscsi_proto.h 	uint8_t rsvd5[16];
uint8_t           464 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           465 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           466 include/scsi/iscsi_proto.h 	uint8_t max_version;	/* Max. version supported */
uint8_t           467 include/scsi/iscsi_proto.h 	uint8_t active_version;	/* Active version */
uint8_t           468 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           469 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           470 include/scsi/iscsi_proto.h 	uint8_t isid[6];	/* Initiator Session ID */
uint8_t           477 include/scsi/iscsi_proto.h 	uint8_t status_class;	/* see Login RSP ststus classes below */
uint8_t           478 include/scsi/iscsi_proto.h 	uint8_t status_detail;	/* see Login RSP Status details below */
uint8_t           479 include/scsi/iscsi_proto.h 	uint8_t rsvd4[10];
uint8_t           523 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           524 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           525 include/scsi/iscsi_proto.h 	uint8_t rsvd1[2];
uint8_t           526 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           527 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           528 include/scsi/iscsi_proto.h 	uint8_t rsvd2[8];
uint8_t           531 include/scsi/iscsi_proto.h 	uint8_t rsvd3[2];
uint8_t           534 include/scsi/iscsi_proto.h 	uint8_t rsvd4[16];
uint8_t           549 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           550 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           551 include/scsi/iscsi_proto.h 	uint8_t response;	/* see Logout response values below */
uint8_t           552 include/scsi/iscsi_proto.h 	uint8_t rsvd2;
uint8_t           553 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           554 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           555 include/scsi/iscsi_proto.h 	uint8_t rsvd3[8];
uint8_t           576 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           577 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           578 include/scsi/iscsi_proto.h 	uint8_t rsvd2[2];
uint8_t           579 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           580 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           581 include/scsi/iscsi_proto.h 	uint8_t lun[8];
uint8_t           584 include/scsi/iscsi_proto.h 	uint8_t rsvd3[4];
uint8_t           586 include/scsi/iscsi_proto.h 	uint8_t rsvd4[8];
uint8_t           601 include/scsi/iscsi_proto.h 	uint8_t opcode;
uint8_t           602 include/scsi/iscsi_proto.h 	uint8_t flags;
uint8_t           603 include/scsi/iscsi_proto.h 	uint8_t reason;
uint8_t           604 include/scsi/iscsi_proto.h 	uint8_t rsvd2;
uint8_t           605 include/scsi/iscsi_proto.h 	uint8_t hlength;
uint8_t           606 include/scsi/iscsi_proto.h 	uint8_t dlength[3];
uint8_t           607 include/scsi/iscsi_proto.h 	uint8_t rsvd3[8];
uint8_t           609 include/scsi/iscsi_proto.h 	uint8_t rsvd4[4];
uint8_t           614 include/scsi/iscsi_proto.h 	uint8_t rsvd5[8];
uint8_t           217 include/scsi/libiscsi.h 	uint8_t			tcp_timestamp_stat;
uint8_t           218 include/scsi/libiscsi.h 	uint8_t			tcp_nagle_disable;
uint8_t           219 include/scsi/libiscsi.h 	uint8_t			tcp_wsf_disable;
uint8_t           220 include/scsi/libiscsi.h 	uint8_t			tcp_timer_scale;
uint8_t           221 include/scsi/libiscsi.h 	uint8_t			tcp_timestamp_en;
uint8_t           222 include/scsi/libiscsi.h 	uint8_t			fragment_disable;
uint8_t           223 include/scsi/libiscsi.h 	uint8_t			ipv4_tos;
uint8_t           224 include/scsi/libiscsi.h 	uint8_t			ipv6_traffic_class;
uint8_t           225 include/scsi/libiscsi.h 	uint8_t			ipv6_flow_label;
uint8_t           226 include/scsi/libiscsi.h 	uint8_t			is_fw_assigned_ipv6;
uint8_t           311 include/scsi/libiscsi.h 	uint8_t			auto_snd_tgt_disable;
uint8_t           312 include/scsi/libiscsi.h 	uint8_t			discovery_sess;
uint8_t           313 include/scsi/libiscsi.h 	uint8_t			chap_auth_en;
uint8_t           314 include/scsi/libiscsi.h 	uint8_t			discovery_logout_en;
uint8_t           315 include/scsi/libiscsi.h 	uint8_t			bidi_chap_en;
uint8_t           316 include/scsi/libiscsi.h 	uint8_t			discovery_auth_optional;
uint8_t           317 include/scsi/libiscsi.h 	uint8_t			isid[ISID_SIZE];
uint8_t           113 include/scsi/scsi_transport_iscsi.h 	int (*alloc_pdu) (struct iscsi_task *task, uint8_t opcode);
uint8_t           184 include/scsi/scsi_transport_iscsi.h 				  uint8_t *data);
uint8_t           189 include/scsi/scsi_transport_iscsi.h 				  uint32_t data_size, uint8_t *data);
uint8_t           317 include/scsi/scsi_transport_iscsi.h 	uint8_t			snack_req_en;
uint8_t           319 include/scsi/scsi_transport_iscsi.h 	uint8_t			tcp_timestamp_stat;
uint8_t           320 include/scsi/scsi_transport_iscsi.h 	uint8_t			tcp_nagle_disable;
uint8_t           322 include/scsi/scsi_transport_iscsi.h 	uint8_t			tcp_wsf_disable;
uint8_t           323 include/scsi/scsi_transport_iscsi.h 	uint8_t			tcp_timer_scale;
uint8_t           324 include/scsi/scsi_transport_iscsi.h 	uint8_t			tcp_timestamp_en;
uint8_t           325 include/scsi/scsi_transport_iscsi.h 	uint8_t			ipv4_tos;
uint8_t           326 include/scsi/scsi_transport_iscsi.h 	uint8_t			ipv6_traffic_class;
uint8_t           327 include/scsi/scsi_transport_iscsi.h 	uint8_t			ipv6_flow_label;
uint8_t           328 include/scsi/scsi_transport_iscsi.h 	uint8_t			fragment_disable;
uint8_t           330 include/scsi/scsi_transport_iscsi.h 	uint8_t			is_fw_assigned_ipv6;
uint8_t           379 include/scsi/scsi_transport_iscsi.h 	uint8_t			auto_snd_tgt_disable;
uint8_t           380 include/scsi/scsi_transport_iscsi.h 	uint8_t			discovery_sess;
uint8_t           382 include/scsi/scsi_transport_iscsi.h 	uint8_t			entry_state;
uint8_t           383 include/scsi/scsi_transport_iscsi.h 	uint8_t			chap_auth_en;
uint8_t           387 include/scsi/scsi_transport_iscsi.h 	uint8_t			discovery_logout_en;
uint8_t           388 include/scsi/scsi_transport_iscsi.h 	uint8_t			bidi_chap_en;
uint8_t           390 include/scsi/scsi_transport_iscsi.h 	uint8_t			discovery_auth_optional;
uint8_t           391 include/scsi/scsi_transport_iscsi.h 	uint8_t			isid[ISID_SIZE];
uint8_t           392 include/scsi/scsi_transport_iscsi.h 	uint8_t			is_boot_target;
uint8_t           293 include/soc/tegra/bpmp-abi.h 	uint8_t tag[32];
uint8_t           513 include/soc/tegra/bpmp-abi.h 	uint8_t data[EMPTY_ARRAY];
uint8_t           526 include/soc/tegra/bpmp-abi.h 	uint8_t data[EMPTY_ARRAY];
uint8_t           800 include/soc/tegra/bpmp-abi.h 	uint8_t data[];
uint8_t           814 include/soc/tegra/bpmp-abi.h 	uint8_t data_buf[TEGRA_I2C_IPC_MAX_IN_BUF_SIZE];
uint8_t           828 include/soc/tegra/bpmp-abi.h 	uint8_t data_buf[TEGRA_I2C_IPC_MAX_OUT_BUF_SIZE];
uint8_t           968 include/soc/tegra/bpmp-abi.h 	uint8_t num_parents;
uint8_t           969 include/soc/tegra/bpmp-abi.h 	uint8_t name[MRQ_CLK_NAME_MAXLEN];
uint8_t          1323 include/soc/tegra/bpmp-abi.h 	uint8_t name[MRQ_PG_NAME_MAXLEN];
uint8_t          1962 include/soc/tegra/bpmp-abi.h 	uint8_t len;
uint8_t          1971 include/soc/tegra/bpmp-abi.h 	uint8_t data[MRQ_RINGBUF_CONSOLE_MAX_READ_LEN];
uint8_t          1973 include/soc/tegra/bpmp-abi.h 	uint8_t len;
uint8_t          1982 include/soc/tegra/bpmp-abi.h 	uint8_t data[MRQ_RINGBUF_CONSOLE_MAX_WRITE_LEN];
uint8_t          1984 include/soc/tegra/bpmp-abi.h 	uint8_t len;
uint8_t          1995 include/soc/tegra/bpmp-abi.h 	uint8_t len;
uint8_t          2145 include/soc/tegra/bpmp-abi.h 	uint8_t ep_controller;
uint8_t          2150 include/soc/tegra/bpmp-abi.h 	uint8_t pcie_controller;
uint8_t          2151 include/soc/tegra/bpmp-abi.h 	uint8_t enable;
uint8_t            27 include/sound/adau1373.h 	uint8_t drc_setting[3][ADAU1373_DRC_SIZE];
uint8_t            86 include/sound/hdmi-codec.h 		       uint8_t *buf, size_t len);
uint8_t            42 include/sound/sof/info.h 	uint8_t date[12];
uint8_t            43 include/sound/sof/info.h 	uint8_t time[10];
uint8_t            44 include/sound/sof/info.h 	uint8_t tag[6];
uint8_t           120 include/target/target_core_backend.h static inline uint32_t get_unaligned_be24(const uint8_t *const p)
uint8_t           257 include/trace/events/hswadsp.h 		__field(	uint8_t,	ch_num	)
uint8_t           258 include/trace/events/hswadsp.h 		__field(	uint8_t,	valid_bit	)
uint8_t           276 include/trace/events/hswadsp.h 		(uint8_t)__entry->ch_num, (uint8_t)__entry->valid_bit)
uint8_t           288 include/trace/events/hswadsp.h 		__field(	uint8_t,	path_id	)
uint8_t           289 include/trace/events/hswadsp.h 		__field(	uint8_t,	stream_type	)
uint8_t           290 include/trace/events/hswadsp.h 		__field(	uint8_t,	format_id	)
uint8_t           301 include/trace/events/hswadsp.h 		(int) __entry->id, (uint8_t)__entry->path_id,
uint8_t           302 include/trace/events/hswadsp.h 		(uint8_t)__entry->stream_type, (uint8_t)__entry->format_id)
uint8_t            57 include/uapi/drm/drm.h typedef uint8_t  __u8;
uint8_t           958 include/uapi/linux/sctp.h 	uint8_t		gauth_chunks[];
uint8_t          1168 include/uapi/linux/sctp.h 	uint8_t se_on;
uint8_t            94 include/video/w100fb.h 	uint8_t M;      /* input divider */
uint8_t            95 include/video/w100fb.h 	uint8_t N_int;  /* VCO multiplier */
uint8_t            96 include/video/w100fb.h 	uint8_t N_fac;  /* VCO multiplier fractional part */
uint8_t            97 include/video/w100fb.h 	uint8_t tfgoal;
uint8_t            98 include/video/w100fb.h 	uint8_t lock_time;
uint8_t           204 include/xen/interface/event_channel.h 	uint8_t link_bits;
uint8_t           205 include/xen/interface/event_channel.h 	uint8_t _pad[7];
uint8_t           191 include/xen/interface/io/blkif.h 		uint8_t     first_sect, last_sect;
uint8_t           195 include/xen/interface/io/blkif.h 	uint8_t        nr_segments;  /* number of segments                   */
uint8_t           206 include/xen/interface/io/blkif.h 	uint8_t        flag;         /* BLKIF_DISCARD_SECURE or zero.        */
uint8_t           215 include/xen/interface/io/blkif.h 	uint8_t        _pad3;
uint8_t           219 include/xen/interface/io/blkif.h 	uint8_t      _pad1;
uint8_t           228 include/xen/interface/io/blkif.h 	uint8_t        indirect_op;
uint8_t           246 include/xen/interface/io/blkif.h 	uint8_t        operation;    /* BLKIF_OP_???                         */
uint8_t           257 include/xen/interface/io/blkif.h 	uint8_t         operation;       /* copied from request */
uint8_t           798 include/xen/interface/io/displif.h 	uint8_t operation;
uint8_t           799 include/xen/interface/io/displif.h 	uint8_t reserved[5];
uint8_t           807 include/xen/interface/io/displif.h 		uint8_t reserved[56];
uint8_t           813 include/xen/interface/io/displif.h 	uint8_t operation;
uint8_t           814 include/xen/interface/io/displif.h 	uint8_t reserved;
uint8_t           816 include/xen/interface/io/displif.h 	uint8_t reserved1[56];
uint8_t           821 include/xen/interface/io/displif.h 	uint8_t type;
uint8_t           822 include/xen/interface/io/displif.h 	uint8_t reserved[5];
uint8_t           825 include/xen/interface/io/displif.h 		uint8_t reserved[56];
uint8_t           850 include/xen/interface/io/displif.h 	uint8_t reserved[56];
uint8_t            45 include/xen/interface/io/fbif.h 	uint8_t type;		/* XENFB_TYPE_UPDATE */
uint8_t            59 include/xen/interface/io/fbif.h 	uint8_t type;		/* XENFB_TYPE_RESIZE */
uint8_t            70 include/xen/interface/io/fbif.h 	uint8_t type;
uint8_t            86 include/xen/interface/io/fbif.h 	uint8_t type;
uint8_t           116 include/xen/interface/io/fbif.h 	uint8_t depth;          /* depth of a pixel (in bits) */
uint8_t           271 include/xen/interface/io/kbdif.h 	uint8_t type;
uint8_t           297 include/xen/interface/io/kbdif.h 	uint8_t type;
uint8_t           298 include/xen/interface/io/kbdif.h 	uint8_t pressed;
uint8_t           327 include/xen/interface/io/kbdif.h 	uint8_t type;
uint8_t           480 include/xen/interface/io/kbdif.h 	uint8_t type;			/* XENKBD_TYPE_MTOUCH */
uint8_t           481 include/xen/interface/io/kbdif.h 	uint8_t event_type;		/* XENKBD_MT_EV_??? */
uint8_t           482 include/xen/interface/io/kbdif.h 	uint8_t contact_id;
uint8_t           483 include/xen/interface/io/kbdif.h 	uint8_t reserved[5];		/* reserved for the future use */
uint8_t           500 include/xen/interface/io/kbdif.h 	uint8_t type;
uint8_t           529 include/xen/interface/io/kbdif.h 	uint8_t type;
uint8_t           287 include/xen/interface/io/netif.h static uint32_t xen_netif_toeplitz_hash(const uint8_t *key,
uint8_t           289 include/xen/interface/io/netif.h 					const uint8_t *buf, unsigned int buflen)
uint8_t           302 include/xen/interface/io/netif.h 		uint8_t byte = buf[bufi];
uint8_t           865 include/xen/interface/io/netif.h 	uint8_t type;
uint8_t           866 include/xen/interface/io/netif.h 	uint8_t flags;
uint8_t           870 include/xen/interface/io/netif.h 			uint8_t type;
uint8_t           871 include/xen/interface/io/netif.h 			uint8_t pad;
uint8_t           875 include/xen/interface/io/netif.h 			uint8_t addr[6];
uint8_t           878 include/xen/interface/io/netif.h 			uint8_t type;
uint8_t           879 include/xen/interface/io/netif.h 			uint8_t algorithm;
uint8_t           880 include/xen/interface/io/netif.h 			uint8_t value[4];
uint8_t            18 include/xen/interface/io/pvcalls.h     uint8_t pad1[52];
uint8_t            22 include/xen/interface/io/pvcalls.h     uint8_t pad2[52];
uint8_t            49 include/xen/interface/io/pvcalls.h             uint8_t addr[28];
uint8_t            57 include/xen/interface/io/pvcalls.h             uint8_t reuse;
uint8_t            61 include/xen/interface/io/pvcalls.h             uint8_t addr[28];
uint8_t            80 include/xen/interface/io/pvcalls.h             uint8_t dummy[56];
uint8_t           113 include/xen/interface/io/pvcalls.h             uint8_t dummy[8];
uint8_t            86 include/xen/interface/io/ring.h     uint8_t  pad[48];							\
uint8_t           421 include/xen/interface/io/ring.h     uint8_t pad1[56];                                                         \
uint8_t           425 include/xen/interface/io/ring.h     uint8_t pad2[56];                                                         \
uint8_t           639 include/xen/interface/io/sndif.h 	uint8_t pcm_format;
uint8_t           640 include/xen/interface/io/sndif.h 	uint8_t pcm_channels;
uint8_t           830 include/xen/interface/io/sndif.h 	uint8_t type;
uint8_t          1016 include/xen/interface/io/sndif.h 	uint8_t operation;
uint8_t          1017 include/xen/interface/io/sndif.h 	uint8_t reserved[5];
uint8_t          1023 include/xen/interface/io/sndif.h 		uint8_t reserved[56];
uint8_t          1029 include/xen/interface/io/sndif.h 	uint8_t operation;
uint8_t          1030 include/xen/interface/io/sndif.h 	uint8_t reserved;
uint8_t          1034 include/xen/interface/io/sndif.h 		uint8_t reserved1[56];
uint8_t          1040 include/xen/interface/io/sndif.h 	uint8_t type;
uint8_t          1041 include/xen/interface/io/sndif.h 	uint8_t reserved[5];
uint8_t          1044 include/xen/interface/io/sndif.h 		uint8_t reserved[56];
uint8_t          1069 include/xen/interface/io/sndif.h 	uint8_t reserved[56];
uint8_t            44 include/xen/interface/io/tpmif.h 	uint8_t state;           /* enum vtpm_shared_page_state */
uint8_t            45 include/xen/interface/io/tpmif.h 	uint8_t locality;        /* for the current request */
uint8_t            46 include/xen/interface/io/tpmif.h 	uint8_t pad;
uint8_t            48 include/xen/interface/io/tpmif.h 	uint8_t nr_extra_pages;  /* extra pages for long packets; may be zero */
uint8_t           192 include/xen/interface/io/vscsiif.h 	uint8_t act;		/* command between backend and frontend */
uint8_t           193 include/xen/interface/io/vscsiif.h 	uint8_t cmd_len;	/* valid CDB bytes */
uint8_t           195 include/xen/interface/io/vscsiif.h 	uint8_t cmnd[VSCSIIF_MAX_COMMAND_SIZE];	/* the CDB */
uint8_t           199 include/xen/interface/io/vscsiif.h 	uint8_t sc_data_direction;	/* for DMA_TO_DEVICE(1)
uint8_t           202 include/xen/interface/io/vscsiif.h 	uint8_t nr_segments;		/* Number of pieces of scatter-gather */
uint8_t           218 include/xen/interface/io/vscsiif.h 	uint8_t padding;
uint8_t           219 include/xen/interface/io/vscsiif.h 	uint8_t sense_len;
uint8_t           220 include/xen/interface/io/vscsiif.h 	uint8_t sense_buffer[VSCSIIF_SENSE_BUFFERSIZE];
uint8_t            99 include/xen/interface/physdev.h 	uint8_t * bitmap;
uint8_t           171 include/xen/interface/physdev.h 	uint8_t bus;
uint8_t           172 include/xen/interface/physdev.h 	uint8_t devfn;
uint8_t           178 include/xen/interface/physdev.h 	uint8_t bus;
uint8_t           179 include/xen/interface/physdev.h 	uint8_t devfn;
uint8_t           185 include/xen/interface/physdev.h 	uint8_t bus;
uint8_t           186 include/xen/interface/physdev.h 	uint8_t devfn;
uint8_t           190 include/xen/interface/physdev.h 		uint8_t bus;
uint8_t           191 include/xen/interface/physdev.h 		uint8_t devfn;
uint8_t           214 include/xen/interface/physdev.h     uint8_t triggering;
uint8_t           216 include/xen/interface/physdev.h     uint8_t polarity;
uint8_t           246 include/xen/interface/physdev.h     uint8_t start_bus;
uint8_t           247 include/xen/interface/physdev.h     uint8_t end_bus;
uint8_t           255 include/xen/interface/physdev.h     uint8_t bus;
uint8_t           256 include/xen/interface/physdev.h     uint8_t devfn;
uint8_t           259 include/xen/interface/physdev.h         uint8_t bus;
uint8_t           260 include/xen/interface/physdev.h         uint8_t devfn;
uint8_t           280 include/xen/interface/physdev.h     uint8_t bus;
uint8_t           281 include/xen/interface/physdev.h     uint8_t devfn;
uint8_t           293 include/xen/interface/physdev.h     uint8_t op;
uint8_t           294 include/xen/interface/physdev.h     uint8_t bus;
uint8_t           147 include/xen/interface/platform.h 				uint8_t month;
uint8_t           148 include/xen/interface/platform.h 				uint8_t day;
uint8_t           149 include/xen/interface/platform.h 				uint8_t hour;
uint8_t           150 include/xen/interface/platform.h 				uint8_t min;
uint8_t           151 include/xen/interface/platform.h 				uint8_t sec;
uint8_t           154 include/xen/interface/platform.h 				uint8_t daylight;
uint8_t           181 include/xen/interface/platform.h 				uint8_t data4[8];
uint8_t           235 include/xen/interface/platform.h 			uint8_t device;                   /* %dl: bios device number */
uint8_t           236 include/xen/interface/platform.h 			uint8_t version;                  /* %ah: major version      */
uint8_t           240 include/xen/interface/platform.h 			uint8_t legacy_max_head;          /* %dh: max head #         */
uint8_t           241 include/xen/interface/platform.h 			uint8_t legacy_sectors_per_track; /* %cl[5:0]: max sector #  */
uint8_t           247 include/xen/interface/platform.h 			uint8_t device;                   /* bios device number  */
uint8_t           252 include/xen/interface/platform.h 			uint8_t capabilities;
uint8_t           253 include/xen/interface/platform.h 			uint8_t edid_transfer_time;
uint8_t           278 include/xen/interface/platform.h 		uint8_t kbd_shift_flags; /* XEN_FW_KBD_SHIFT_FLAGS */
uint8_t           362 include/xen/interface/platform.h 	uint8_t     type;     /* cstate value, c0: 0, c1: 1, ... */
uint8_t           385 include/xen/interface/platform.h 	uint8_t  descriptor;
uint8_t           387 include/xen/interface/platform.h 	uint8_t  space_id;
uint8_t           388 include/xen/interface/platform.h 	uint8_t  bit_width;
uint8_t           389 include/xen/interface/platform.h 	uint8_t  bit_offset;
uint8_t           390 include/xen/interface/platform.h 	uint8_t  reserved;
uint8_t           526 include/xen/interface/platform.h 		uint8_t                        pad[128];
uint8_t           166 include/xen/interface/xen-mca.h 	uint8_t action_flags;
uint8_t           167 include/xen/interface/xen-mca.h 	uint8_t action_types;
uint8_t           171 include/xen/interface/xen-mca.h 		uint8_t pad[MAX_UNION_SIZE];
uint8_t           231 include/xen/interface/xen-mca.h 	((struct mcinfo_common *)((uint8_t *)(_mic) + (_mic)->size))
uint8_t           548 include/xen/interface/xen.h 	uint8_t evtchn_upcall_pending;
uint8_t           549 include/xen/interface/xen.h 	uint8_t evtchn_upcall_mask;
uint8_t           705 include/xen/interface/xen.h 	uint8_t video_type;
uint8_t           731 include/xen/interface/xen.h 			uint8_t  red_pos, red_size;
uint8_t           732 include/xen/interface/xen.h 			uint8_t  green_pos, green_size;
uint8_t           733 include/xen/interface/xen.h 			uint8_t  blue_pos, blue_size;
uint8_t           734 include/xen/interface/xen.h 			uint8_t  rsvd_pos, rsvd_size;
uint8_t           746 include/xen/interface/xen.h typedef uint8_t xen_domain_handle_t[16];
uint8_t            89 include/xen/interface/xenpmu.h 	uint8_t pad[6];
uint8_t           142 lib/bch.c      		      const uint8_t *src)
uint8_t           144 lib/bch.c      	uint8_t pad[4] = {0, 0, 0, 0};
uint8_t           157 lib/bch.c      static void store_ecc8(struct bch_control *bch, uint8_t *dst,
uint8_t           160 lib/bch.c      	uint8_t pad[4];
uint8_t           190 lib/bch.c      void encode_bch(struct bch_control *bch, const uint8_t *data,
uint8_t           191 lib/bch.c      		unsigned int len, uint8_t *ecc)
uint8_t           996 lib/bch.c      int decode_bch(struct bch_control *bch, const uint8_t *data, unsigned int len,
uint8_t           997 lib/bch.c      	       const uint8_t *recv_ecc, const uint8_t *calc_ecc,
uint8_t             9 lib/crc4.c     static const uint8_t crc4_tab[] = {
uint8_t            25 lib/crc4.c     uint8_t crc4(uint8_t c, uint64_t x, int bits)
uint8_t            69 lib/decompress_unlzma.c 	uint8_t *ptr;
uint8_t            70 lib/decompress_unlzma.c 	uint8_t *buffer;
uint8_t            71 lib/decompress_unlzma.c 	uint8_t *buffer_end;
uint8_t           109 lib/decompress_unlzma.c 	rc->buffer = (uint8_t *)buffer;
uint8_t           222 lib/decompress_unlzma.c 	uint8_t pos;
uint8_t           278 lib/decompress_unlzma.c 	uint8_t *buffer;
uint8_t           279 lib/decompress_unlzma.c 	uint8_t previous_byte;
uint8_t           298 lib/decompress_unlzma.c static inline uint8_t INIT peek_old_byte(struct writer *wr,
uint8_t           316 lib/decompress_unlzma.c static inline int INIT write_byte(struct writer *wr, uint8_t byte)
uint8_t           179 lib/decompress_unxz.c 	const uint8_t *x = a;
uint8_t           180 lib/decompress_unxz.c 	const uint8_t *y = b;
uint8_t           194 lib/decompress_unxz.c 	uint8_t *b = buf;
uint8_t           195 lib/decompress_unxz.c 	uint8_t *e = b + size;
uint8_t           206 lib/decompress_unxz.c 	uint8_t *d = dest;
uint8_t           207 lib/decompress_unxz.c 	const uint8_t *s = src;
uint8_t            79 lib/digsig.c   	uint8_t *p, *datap;
uint8_t            80 lib/digsig.c   	const uint8_t *endp;
uint8_t            48 lib/lz4/lz4defs.h typedef	uint8_t BYTE;
uint8_t            37 lib/mpi/mpicoder.c 	const uint8_t *buffer = xbuffer;
uint8_t            83 lib/mpi/mpicoder.c 	const uint8_t *buffer = xbuffer;
uint8_t           143 lib/mpi/mpicoder.c int mpi_read_buffer(MPI a, uint8_t *buf, unsigned buf_len, unsigned *nbytes,
uint8_t           146 lib/mpi/mpicoder.c 	uint8_t *p;
uint8_t           205 lib/mpi/mpicoder.c 	uint8_t *buf;
uint8_t            21 lib/raid6/mktables.c static uint8_t gfmul(uint8_t a, uint8_t b)
uint8_t            23 lib/raid6/mktables.c 	uint8_t v = 0;
uint8_t            35 lib/raid6/mktables.c static uint8_t gfpow(uint8_t a, int b)
uint8_t            37 lib/raid6/mktables.c 	uint8_t v = 1;
uint8_t            56 lib/raid6/mktables.c 	uint8_t v;
uint8_t            57 lib/raid6/mktables.c 	uint8_t exptbl[256], invtbl[256];
uint8_t            22 lib/raid6/recov_neon.c void __raid6_2data_recov_neon(int bytes, uint8_t *p, uint8_t *q, uint8_t *dp,
uint8_t            23 lib/raid6/recov_neon.c 			      uint8_t *dq, const uint8_t *pbmul,
uint8_t            24 lib/raid6/recov_neon.c 			      const uint8_t *qmul);
uint8_t            26 lib/raid6/recov_neon.c void __raid6_datap_recov_neon(int bytes, uint8_t *p, uint8_t *q, uint8_t *dq,
uint8_t            27 lib/raid6/recov_neon.c 			      const uint8_t *qmul);
uint8_t            27 lib/raid6/recov_neon_inner.c void __raid6_2data_recov_neon(int bytes, uint8_t *p, uint8_t *q, uint8_t *dp,
uint8_t            28 lib/raid6/recov_neon_inner.c 			      uint8_t *dq, const uint8_t *pbmul,
uint8_t            29 lib/raid6/recov_neon_inner.c 			      const uint8_t *qmul)
uint8_t            77 lib/raid6/recov_neon_inner.c void __raid6_datap_recov_neon(int bytes, uint8_t *p, uint8_t *q, uint8_t *dq,
uint8_t            78 lib/raid6/recov_neon_inner.c 			      const uint8_t *qmul)
uint8_t           328 lib/reed_solomon/reed_solomon.c int encode_rs8(struct rs_control *rsc, uint8_t *data, int len, uint16_t *par,
uint8_t           361 lib/reed_solomon/reed_solomon.c int decode_rs8(struct rs_control *rsc, uint8_t *data, uint16_t *par, int len,
uint8_t           104 lib/xxhash.c   	const uint8_t *p = (const uint8_t *)input;
uint8_t           105 lib/xxhash.c   	const uint8_t *b_end = p + len;
uint8_t           109 lib/xxhash.c   		const uint8_t *const limit = b_end - 16;
uint8_t           174 lib/xxhash.c   	const uint8_t *p = (const uint8_t *)input;
uint8_t           175 lib/xxhash.c   	const uint8_t *const b_end = p + len;
uint8_t           179 lib/xxhash.c   		const uint8_t *const limit = b_end - 32;
uint8_t           272 lib/xxhash.c   	const uint8_t *p = (const uint8_t *)input;
uint8_t           273 lib/xxhash.c   	const uint8_t *const b_end = p + len;
uint8_t           282 lib/xxhash.c   		memcpy((uint8_t *)(state->mem32) + state->memsize, input, len);
uint8_t           290 lib/xxhash.c   		memcpy((uint8_t *)(state->mem32) + state->memsize, input,
uint8_t           307 lib/xxhash.c   		const uint8_t *const limit = b_end - 16;
uint8_t           341 lib/xxhash.c   	const uint8_t *p = (const uint8_t *)state->mem32;
uint8_t           342 lib/xxhash.c   	const uint8_t *const b_end = (const uint8_t *)(state->mem32) +
uint8_t           379 lib/xxhash.c   	const uint8_t *p = (const uint8_t *)input;
uint8_t           380 lib/xxhash.c   	const uint8_t *const b_end = p + len;
uint8_t           388 lib/xxhash.c   		memcpy(((uint8_t *)state->mem64) + state->memsize, input, len);
uint8_t           396 lib/xxhash.c   		memcpy(((uint8_t *)p64) + state->memsize, input,
uint8_t           412 lib/xxhash.c   		const uint8_t *const limit = b_end - 32;
uint8_t           446 lib/xxhash.c   	const uint8_t *p = (const uint8_t *)state->mem64;
uint8_t           447 lib/xxhash.c   	const uint8_t *const b_end = (const uint8_t *)state->mem64 +
uint8_t            49 lib/xz/xz_crc32.c XZ_EXTERN uint32_t xz_crc32(const uint8_t *buf, size_t size, uint32_t crc)
uint8_t            51 lib/xz/xz_dec_bcj.c 	uint8_t *out;
uint8_t            74 lib/xz/xz_dec_bcj.c 		uint8_t buf[16];
uint8_t            83 lib/xz/xz_dec_bcj.c static inline int bcj_x86_test_msbyte(uint8_t b)
uint8_t            88 lib/xz/xz_dec_bcj.c static size_t bcj_x86(struct xz_dec_bcj *s, uint8_t *buf, size_t size)
uint8_t            93 lib/xz/xz_dec_bcj.c 	static const uint8_t mask_to_bit_num[8] = { 0, 1, 2, 2, 3, 3, 3, 3 };
uint8_t           101 lib/xz/xz_dec_bcj.c 	uint8_t b;
uint8_t           137 lib/xz/xz_dec_bcj.c 				b = (uint8_t)(dest >> (24 - j));
uint8_t           160 lib/xz/xz_dec_bcj.c static size_t bcj_powerpc(struct xz_dec_bcj *s, uint8_t *buf, size_t size)
uint8_t           181 lib/xz/xz_dec_bcj.c static size_t bcj_ia64(struct xz_dec_bcj *s, uint8_t *buf, size_t size)
uint8_t           183 lib/xz/xz_dec_bcj.c 	static const uint8_t branch_table[32] = {
uint8_t           255 lib/xz/xz_dec_bcj.c 						= (uint8_t)(instr >> (8 * j));
uint8_t           265 lib/xz/xz_dec_bcj.c static size_t bcj_arm(struct xz_dec_bcj *s, uint8_t *buf, size_t size)
uint8_t           277 lib/xz/xz_dec_bcj.c 			buf[i] = (uint8_t)addr;
uint8_t           278 lib/xz/xz_dec_bcj.c 			buf[i + 1] = (uint8_t)(addr >> 8);
uint8_t           279 lib/xz/xz_dec_bcj.c 			buf[i + 2] = (uint8_t)(addr >> 16);
uint8_t           288 lib/xz/xz_dec_bcj.c static size_t bcj_armthumb(struct xz_dec_bcj *s, uint8_t *buf, size_t size)
uint8_t           303 lib/xz/xz_dec_bcj.c 			buf[i + 1] = (uint8_t)(0xF0 | ((addr >> 19) & 0x07));
uint8_t           304 lib/xz/xz_dec_bcj.c 			buf[i] = (uint8_t)(addr >> 11);
uint8_t           305 lib/xz/xz_dec_bcj.c 			buf[i + 3] = (uint8_t)(0xF8 | ((addr >> 8) & 0x07));
uint8_t           306 lib/xz/xz_dec_bcj.c 			buf[i + 2] = (uint8_t)addr;
uint8_t           316 lib/xz/xz_dec_bcj.c static size_t bcj_sparc(struct xz_dec_bcj *s, uint8_t *buf, size_t size)
uint8_t           346 lib/xz/xz_dec_bcj.c 		      uint8_t *buf, size_t *pos, size_t size)
uint8_t           536 lib/xz/xz_dec_bcj.c XZ_EXTERN enum xz_ret xz_dec_bcj_reset(struct xz_dec_bcj *s, uint8_t id)
uint8_t            46 lib/xz/xz_dec_lzma2.c 	uint8_t *buf;
uint8_t           109 lib/xz/xz_dec_lzma2.c 	const uint8_t *in;
uint8_t           274 lib/xz/xz_dec_lzma2.c 		uint8_t buf[3 * LZMA_IN_REQUIRED];
uint8_t           333 lib/xz/xz_dec_lzma2.c static inline void dict_put(struct dictionary *dict, uint8_t byte)
uint8_t           614 lib/xz/xz_dec_lzma2.c 	dict_put(&s->dict, (uint8_t)symbol);
uint8_t           799 lib/xz/xz_dec_lzma2.c static bool lzma_props(struct xz_dec_lzma2 *s, uint8_t props)
uint8_t          1132 lib/xz/xz_dec_lzma2.c XZ_EXTERN enum xz_ret xz_dec_lzma2_reset(struct xz_dec_lzma2 *s, uint8_t props)
uint8_t           128 lib/xz/xz_dec_stream.c 		uint8_t buf[1024];
uint8_t           141 lib/xz/xz_dec_stream.c static const uint8_t check_sizes[16] = {
uint8_t           175 lib/xz/xz_dec_stream.c static enum xz_ret dec_vli(struct xz_dec *s, const uint8_t *in,
uint8_t           178 lib/xz/xz_dec_stream.c 	uint8_t byte;
uint8_t           271 lib/xz/xz_dec_stream.c 				(const uint8_t *)&s->block.hash,
uint8_t           330 lib/xz/xz_dec_stream.c 					(const uint8_t *)&s->index.hash,
uint8_t            45 lib/xz/xz_dec_test.c static uint8_t buffer_in[1024];
uint8_t            46 lib/xz/xz_dec_test.c static uint8_t buffer_out[1024];
uint8_t           123 lib/xz/xz_private.h 					 uint8_t props);
uint8_t           145 lib/xz/xz_private.h XZ_EXTERN enum xz_ret xz_dec_bcj_reset(struct xz_dec_bcj *s, uint8_t id);
uint8_t            35 lib/zstd/mem.h typedef uint8_t BYTE;
uint8_t            51 net/9p/trans_xen.c 	uint8_t id;
uint8_t            83 net/atm/mpc.c  static const uint8_t *copy_macs(struct mpoa_client *mpc,
uint8_t            84 net/atm/mpc.c  				const uint8_t *router_mac,
uint8_t            85 net/atm/mpc.c  				const uint8_t *tlvs, uint8_t mps_macs,
uint8_t            86 net/atm/mpc.c  				uint8_t device_type);
uint8_t           379 net/atm/mpc.c  	uint8_t length, mpoa_device_type, number_of_mps_macs;
uint8_t           380 net/atm/mpc.c  	const uint8_t *end_of_tlvs;
uint8_t           464 net/atm/mpc.c  static const uint8_t *copy_macs(struct mpoa_client *mpc,
uint8_t           465 net/atm/mpc.c  				const uint8_t *router_mac,
uint8_t           466 net/atm/mpc.c  				const uint8_t *tlvs, uint8_t mps_macs,
uint8_t           467 net/atm/mpc.c  				uint8_t device_type)
uint8_t          1340 net/atm/mpc.c  	uint8_t tlv[4 + 1 + 1 + 1 + ATM_ESA_LEN];
uint8_t            21 net/atm/mpc.h  	uint8_t mps_ctrl_addr[ATM_ESA_LEN];  /* MPS control ATM address     */
uint8_t            22 net/atm/mpc.h  	uint8_t our_ctrl_addr[ATM_ESA_LEN];  /* MPC's control ATM address   */
uint8_t            32 net/atm/mpc.h  	uint8_t *mps_macs;           /* array of MPS MAC addresses, >=1     */
uint8_t            29 net/atm/mpoa_caches.h 	uint8_t  MPS_ctrl_ATM_addr[ATM_ESA_LEN];
uint8_t            58 net/atm/mpoa_caches.h 	uint8_t              MPS_ctrl_ATM_addr[ATM_ESA_LEN];
uint8_t            28 net/batman-adv/bridge_loop_avoidance.h static inline bool batadv_bla_is_loopdetect_mac(const uint8_t *mac)
uint8_t           619 net/bluetooth/hci_conn.c struct hci_dev *hci_get_route(bdaddr_t *dst, bdaddr_t *src, uint8_t src_type)
uint8_t           689 net/bluetooth/hci_request.c 	uint8_t white_list_entries = 0;
uint8_t          3812 net/bluetooth/mgmt.c static bool discovery_type_is_valid(struct hci_dev *hdev, uint8_t type,
uint8_t          3813 net/bluetooth/mgmt.c 				    uint8_t *mgmt_status)
uint8_t           172 net/bluetooth/smp.c 	uint8_t tmp[16], mac_msb[16], msg_msb[CMAC_MSG_MAX];
uint8_t           382 net/bluetooth/smp.c 	uint8_t tmp[16], data[16];
uint8_t            63 net/bridge/netfilter/ebt_ip6.c 		uint8_t nexthdr = ih6->nexthdr;
uint8_t            53 net/bridge/netfilter/ebt_log.c print_ports(const struct sk_buff *skb, uint8_t protocol, int offset)
uint8_t           118 net/bridge/netfilter/ebt_log.c 		uint8_t nexthdr;
uint8_t            43 net/bridge/netfilter/ebt_mark_m.c 	uint8_t invert, bitmask;
uint8_t            65 net/can/j1939/main.c 	skb_trim(skb, min_t(uint8_t, cf->can_dlc, 8));
uint8_t           143 net/dsa/master.c 				   uint8_t *data)
uint8_t           152 net/dsa/master.c 	uint8_t pfx[4];
uint8_t           153 net/dsa/master.c 	uint8_t *ndata;
uint8_t           689 net/dsa/port.c int dsa_port_get_phy_strings(struct dsa_port *dp, uint8_t *data)
uint8_t           640 net/dsa/slave.c 				  uint32_t stringset, uint8_t *data)
uint8_t           742 net/ieee802154/socket.c 			       sizeof(uint8_t), &(mac_cb(skb)->lqi));
uint8_t           291 net/ipv6/icmp.c 	uint8_t		type;
uint8_t            52 net/key/af_key.c 		uint8_t		msg_version;
uint8_t           340 net/key/af_key.c 	hdr->sadb_msg_errno = (uint8_t) err;
uint8_t           570 net/key/af_key.c pfkey_satype2proto(uint8_t satype)
uint8_t           587 net/key/af_key.c static uint8_t
uint8_t           607 net/key/af_key.c static uint8_t pfkey_proto_to_xfrm(uint8_t proto)
uint8_t           612 net/key/af_key.c static uint8_t pfkey_proto_from_xfrm(uint8_t proto)
uint8_t          1729 net/key/af_key.c 	hdr->sadb_msg_errno = (uint8_t) 0;
uint8_t          1750 net/key/af_key.c 	hdr->sadb_msg_errno = (uint8_t) 0;
uint8_t          2760 net/key/af_key.c 	hdr->sadb_msg_errno = (uint8_t) 0;
uint8_t          3494 net/key/af_key.c 			    uint8_t proto, uint8_t mode, int level,
uint8_t          3495 net/key/af_key.c 			    uint32_t reqid, uint8_t family,
uint8_t           119 net/l2tp/l2tp_core.h 	uint8_t			priv[0];	/* private data */
uint8_t           608 net/netfilter/nf_conntrack_proto.c void nf_ct_netns_put(struct net *net, uint8_t nfproto)
uint8_t           261 net/netfilter/nft_tunnel.c 	uint8_t hwid, dir;
uint8_t           208 net/netfilter/x_tables.c xt_request_find_match(uint8_t nfproto, const char *name, uint8_t revision)
uint8_t           395 net/netfilter/x_tables.c textify_hooks(char *buf, size_t size, unsigned int mask, uint8_t nfproto)
uint8_t          1534 net/netfilter/x_tables.c 	uint8_t class;
uint8_t          1547 net/netfilter/x_tables.c 	static const uint8_t next_class[] = {
uint8_t          1551 net/netfilter/x_tables.c 	uint8_t nfproto = (unsigned long)PDE_DATA(file_inode(seq->file));
uint8_t          1600 net/netfilter/x_tables.c 	uint8_t nfproto = (unsigned long)PDE_DATA(file_inode(seq->file));
uint8_t          1699 net/netfilter/x_tables.c 	uint8_t i, num_hooks = hweight32(hook_mask);
uint8_t          1700 net/netfilter/x_tables.c 	uint8_t hooknum;
uint8_t            36 net/rxrpc/protocol.h 	uint8_t		type;		/* packet type */
uint8_t            50 net/rxrpc/protocol.h 	uint8_t		flags;		/* packet flags */
uint8_t            58 net/rxrpc/protocol.h 	uint8_t		userStatus;	/* app-layer defined status */
uint8_t            61 net/rxrpc/protocol.h 	uint8_t		securityIndex;	/* security protocol ID */
uint8_t            81 net/rxrpc/protocol.h 	uint8_t		flags;		/* packet flags (as per rxrpc_header) */
uint8_t            82 net/rxrpc/protocol.h 	uint8_t		pad;
uint8_t           114 net/rxrpc/protocol.h 	uint8_t		reason;		/* reason for ACK */
uint8_t           126 net/rxrpc/protocol.h 	uint8_t		nAcks;		/* number of ACKs */
uint8_t           129 net/rxrpc/protocol.h 	uint8_t		acks[0];	/* list of ACK/NAKs */
uint8_t           117 net/wireless/radiotap.c 	iterator->_arg = (uint8_t *)radiotap_header + sizeof(*radiotap_header);
uint8_t           167 net/wireless/radiotap.c 		    uint32_t oui, uint8_t subns)
uint8_t            96 samples/bpf/test_lwt_bpf.c 	uint8_t proto;
uint8_t           246 samples/mei/mei-amt-version.c 	uint8_t major;
uint8_t           247 samples/mei/mei-amt-version.c 	uint8_t minor;
uint8_t           251 samples/mei/mei-amt-version.c 	uint8_t bios[AMT_BIOS_VERSION_LEN];
uint8_t           369 samples/mei/mei-amt-version.c 			uint8_t **read_buf, uint32_t rcmd,
uint8_t           379 samples/mei/mei-amt-version.c 	*read_buf = (uint8_t *)malloc(sizeof(uint8_t) * in_buf_sz);
uint8_t           419 samples/mei/mei-amt-version.c 			(uint8_t **)&response,
uint8_t           690 scripts/asn1_compiler.c 	uint8_t		n_elements;
uint8_t           694 scripts/asn1_compiler.c 	uint8_t		tag;
uint8_t           160 scripts/dtc/data.c 	uint8_t value_8;
uint8_t           207 scripts/dtc/data.c struct data data_append_byte(struct data d, uint8_t byte)
uint8_t            27 scripts/dtc/dtc-parser.y 	uint8_t byte;
uint8_t           115 scripts/dtc/dtc.h struct data data_append_byte(struct data d, uint8_t byte);
uint8_t            56 scripts/dtc/fdtget.c 	const uint8_t *p = (const uint8_t *)data;
uint8_t           104 scripts/dtc/fdtput.c 				*ptr = (uint8_t)ival;
uint8_t            59 scripts/dtc/libfdt/fdt_addresses.c 	uint8_t data[sizeof(fdt64_t) * 2], *prop;
uint8_t           129 scripts/dtc/libfdt/libfdt.h 	const uint8_t *bp = (const uint8_t *)p;
uint8_t           139 scripts/dtc/libfdt/libfdt.h 	uint8_t *bp = property;
uint8_t           149 scripts/dtc/libfdt/libfdt.h 	const uint8_t *bp = (const uint8_t *)p;
uint8_t           163 scripts/dtc/libfdt/libfdt.h 	uint8_t *bp = property;
uint8_t            29 scripts/dtc/libfdt/libfdt_env.h #define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
uint8_t           110 scripts/dtc/treesource.c 			fprintf(f, "%02"PRIx8, *(const uint8_t*)p);
uint8_t            59 scripts/dtc/yamltree.c 			sprintf(buf, "0x%"PRIx8, *(uint8_t*)(data + off));
uint8_t            52 scripts/insert-sys-cert.c 	uint8_t low_address = *((uint8_t *)&two_byte);
uint8_t           141 scripts/mod/file2alias.c 		if (*(uint8_t*)(symval+size-id_size+i)) {
uint8_t           147 scripts/mod/file2alias.c 					*(uint8_t*)(symval+size-id_size+i) );
uint8_t           445 scripts/recordmcount.c typedef uint8_t myElf64_Byte;		/* Type for a 8-bit quantity.  */
uint8_t            56 scripts/sign-file.c 	uint8_t		algo;		/* Public-key crypto algorithm [0] */
uint8_t            57 scripts/sign-file.c 	uint8_t		hash;		/* Digest algorithm [0] */
uint8_t            58 scripts/sign-file.c 	uint8_t		id_type;	/* Key identifier type [PKEY_ID_PKCS7] */
uint8_t            59 scripts/sign-file.c 	uint8_t		signer_len;	/* Length of signer's name [0] */
uint8_t            60 scripts/sign-file.c 	uint8_t		key_id_len;	/* Length of key identifier [0] */
uint8_t            61 scripts/sign-file.c 	uint8_t		__pad[3];
uint8_t            74 security/integrity/evm/evm_crypto.c static struct shash_desc *init_desc(char type, uint8_t hash_algo)
uint8_t           190 security/integrity/evm/evm_crypto.c 				 uint8_t type, struct evm_digest *data)
uint8_t           110 security/integrity/integrity.h 	uint8_t type;		/* xattr type */
uint8_t           111 security/integrity/integrity.h 	uint8_t version;	/* signature format version */
uint8_t           112 security/integrity/integrity.h 	uint8_t	hash_algo;	/* Digest algorithm [enum hash_algo] */
uint8_t           115 security/integrity/integrity.h 	uint8_t sig[0];		/* signature payload */
uint8_t            38 security/keys/dh.c 			uint8_t *duplicate;
uint8_t           201 security/keys/dh.c 				 uint8_t *kbuf, size_t kbuflen, size_t lzero)
uint8_t           203 security/keys/dh.c 	uint8_t *outbuf = NULL;
uint8_t           241 security/keys/dh.c 	uint8_t *secret;
uint8_t           242 security/keys/dh.c 	uint8_t *outbuf;
uint8_t           991 sound/pci/rme9652/hdspm.c 	uint8_t io_type;
uint8_t            16 sound/soc/codecs/adau-utils.c 	uint8_t regs[5])
uint8_t             6 sound/soc/codecs/adau-utils.h 	uint8_t regs[5]);
uint8_t          1257 sound/soc/codecs/adau1373.c 	uint8_t pll_regs[5];
uint8_t          1328 sound/soc/codecs/adau1373.c 	unsigned int nr, uint8_t *drc)
uint8_t           189 sound/soc/codecs/adau1701.c 	uint8_t buf[5];
uint8_t           219 sound/soc/codecs/adau1701.c 	uint8_t send_buf[2], recv_buf[3];
uint8_t           257 sound/soc/codecs/adau1701.c 	const uint8_t bytes[], size_t len)
uint8_t           263 sound/soc/codecs/adau1701.c 	uint8_t buf[10];
uint8_t           979 sound/soc/codecs/adau17x1.c 	const uint8_t bytes[], size_t len)
uint8_t           981 sound/soc/codecs/adau17x1.c 	uint8_t buf[ADAU17X1_WORD_SIZE];
uint8_t           982 sound/soc/codecs/adau17x1.c 	uint8_t data[ADAU17X1_SAFELOAD_DATA_SIZE];
uint8_t            45 sound/soc/codecs/adau17x1.h 	uint8_t pll_regs[6];
uint8_t           365 sound/soc/codecs/hdac_hdmi.c 	uint8_t buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE];
uint8_t           274 sound/soc/codecs/hdmi-codec.c 	uint8_t eld[MAX_ELD_BYTES];
uint8_t            17 sound/soc/codecs/sigmadsp-i2c.c 	unsigned int addr, const uint8_t data[], size_t len)
uint8_t            19 sound/soc/codecs/sigmadsp-i2c.c 	uint8_t *buf;
uint8_t            40 sound/soc/codecs/sigmadsp-i2c.c 	unsigned int addr, uint8_t data[], size_t len)
uint8_t            44 sound/soc/codecs/sigmadsp-i2c.c 	uint8_t buf[2];
uint8_t            15 sound/soc/codecs/sigmadsp-regmap.c 	unsigned int addr, const uint8_t data[], size_t len)
uint8_t            22 sound/soc/codecs/sigmadsp-regmap.c 	unsigned int addr, uint8_t data[], size_t len)
uint8_t            35 sound/soc/codecs/sigmadsp.c 	uint8_t cache[];
uint8_t            43 sound/soc/codecs/sigmadsp.c 	uint8_t data[];
uint8_t            55 sound/soc/codecs/sigmadsp.c 	uint8_t data[];
uint8_t            93 sound/soc/codecs/sigmadsp.c 	const uint8_t data[], size_t len)
uint8_t            99 sound/soc/codecs/sigmadsp.c 	uint8_t data[], size_t len)
uint8_t           132 sound/soc/codecs/sigmadsp.c 	uint8_t *data;
uint8_t            23 sound/soc/codecs/sigmadsp.h 			const uint8_t *data, size_t len);
uint8_t            41 sound/soc/codecs/sigmadsp.h 	int (*write)(void *, unsigned int, const uint8_t *, size_t);
uint8_t            42 sound/soc/codecs/sigmadsp.h 	int (*read)(void *, unsigned int, uint8_t *, size_t);
uint8_t           170 sound/soc/codecs/tas5086.c 	uint8_t buf[5];
uint8_t           197 sound/soc/codecs/tas5086.c 	uint8_t send_buf, recv_buf[4];
uint8_t            82 sound/soc/codecs/tas571x.c 	uint8_t buf[5];
uint8_t           107 sound/soc/codecs/tas571x.c 	uint8_t send_buf, recv_buf[4];
uint8_t           149 sound/soc/codecs/tas571x.c 	uint8_t *buf, *p;
uint8_t           180 sound/soc/codecs/tas571x.c 	uint8_t send_buf;
uint8_t           181 sound/soc/codecs/tas571x.c 	uint8_t *recv_buf, *p;
uint8_t            46 sound/soc/codecs/wm0010.c 	uint8_t data[0];
uint8_t           193 sound/soc/fsl/imx-audmux.c static const uint8_t port_mapping[] = {
uint8_t           191 sound/soc/intel/haswell/sst-haswell-ipc.h 	uint8_t  packed_pages;   /* page addresses. Each occupies 20 bits */
uint8_t           203 sound/soc/intel/haswell/sst-haswell-ipc.h 		uint8_t data[1];
uint8_t           110 sound/soc/qcom/qdsp6/q6asm.c 	uint8_t   channel_mapping[8];
uint8_t           102 sound/usb/midi.c 	void (*input)(struct snd_usb_midi_in_endpoint*, uint8_t*, int);
uint8_t           104 sound/usb/midi.c 	void (*output_packet)(struct urb*, uint8_t, uint8_t, uint8_t, uint8_t);
uint8_t           153 sound/usb/midi.c 		uint8_t cable;		/* cable number << 4 */
uint8_t           154 sound/usb/midi.c 		uint8_t state;
uint8_t           162 sound/usb/midi.c 		uint8_t data[2];
uint8_t           185 sound/usb/midi.c static const uint8_t snd_usbmidi_cin_length[] = {
uint8_t           227 sound/usb/midi.c 				   int portidx, uint8_t *data, int length)
uint8_t           406 sound/usb/midi.c 				       uint8_t *buffer, int buffer_length)
uint8_t           420 sound/usb/midi.c 				      uint8_t *buffer, int buffer_length)
uint8_t           438 sound/usb/midi.c 					uint8_t *buffer, int buffer_length)
uint8_t           478 sound/usb/midi.c 				     uint8_t *buffer, int buffer_length)
uint8_t           511 sound/usb/midi.c 				  uint8_t *buffer, int buffer_length)
uint8_t           523 sound/usb/midi.c static void snd_usbmidi_output_standard_packet(struct urb *urb, uint8_t p0,
uint8_t           524 sound/usb/midi.c 					       uint8_t p1, uint8_t p2,
uint8_t           525 sound/usb/midi.c 					       uint8_t p3)
uint8_t           528 sound/usb/midi.c 	uint8_t *buf =
uint8_t           529 sound/usb/midi.c 		(uint8_t *)urb->transfer_buffer + urb->transfer_buffer_length;
uint8_t           540 sound/usb/midi.c static void snd_usbmidi_output_midiman_packet(struct urb *urb, uint8_t p0,
uint8_t           541 sound/usb/midi.c 					      uint8_t p1, uint8_t p2,
uint8_t           542 sound/usb/midi.c 					      uint8_t p3)
uint8_t           545 sound/usb/midi.c 	uint8_t *buf =
uint8_t           546 sound/usb/midi.c 		(uint8_t *)urb->transfer_buffer + urb->transfer_buffer_length;
uint8_t           558 sound/usb/midi.c 				      uint8_t b, struct urb *urb)
uint8_t           560 sound/usb/midi.c 	uint8_t p0 = port->cable;
uint8_t           561 sound/usb/midi.c 	void (*output_packet)(struct urb*, uint8_t, uint8_t, uint8_t, uint8_t) =
uint8_t           665 sound/usb/midi.c 			uint8_t b;
uint8_t           722 sound/usb/midi.c 				   uint8_t *buffer, int buffer_length)
uint8_t           741 sound/usb/midi.c 	uint8_t *msg;
uint8_t           743 sound/usb/midi.c 	uint8_t tmp[MAX_AKAI_SYSEX_LEN];
uint8_t           812 sound/usb/midi.c 				       uint8_t *buffer, int buffer_length)
uint8_t           822 sound/usb/midi.c 	uint8_t *transfer_buffer;
uint8_t           850 sound/usb/midi.c 				  uint8_t *buffer, int buffer_length)
uint8_t           882 sound/usb/midi.c 				   uint8_t *buffer, int buffer_length)
uint8_t           894 sound/usb/midi.c 				     uint8_t *buffer, int buffer_length)
uint8_t           976 sound/usb/midi.c 				     uint8_t *buffer, int buffer_length)
uint8_t          1023 sound/usb/midi.c 	uint8_t *buf = urb->transfer_buffer;
uint8_t          2067 sound/usb/midi.c 	uint8_t *cs_desc;
uint8_t            11 sound/usb/midi.h 	uint8_t  out_interval;	/* interval for interrupt endpoints */
uint8_t            13 sound/usb/midi.h 	uint8_t  in_interval;
uint8_t           195 tools/bpf/bpf_dbg.c static void hex_dump(const uint8_t *buf, size_t len)
uint8_t           470 tools/bpf/bpf_dbg.c static void bpf_dump_pkt(uint8_t *pkt, uint32_t pkt_caplen, uint32_t pkt_len)
uint8_t           603 tools/bpf/bpf_dbg.c static uint32_t extract_u32(uint8_t *pkt, uint32_t off)
uint8_t           612 tools/bpf/bpf_dbg.c static uint16_t extract_u16(uint8_t *pkt, uint32_t off)
uint8_t           621 tools/bpf/bpf_dbg.c static uint8_t extract_u8(uint8_t *pkt, uint32_t off)
uint8_t           633 tools/bpf/bpf_dbg.c 			    uint8_t *pkt, uint32_t pkt_caplen,
uint8_t           680 tools/bpf/bpf_dbg.c 		if (d >= sizeof(uint8_t))
uint8_t           699 tools/bpf/bpf_dbg.c 		if (d >= sizeof(uint8_t))
uint8_t           706 tools/bpf/bpf_dbg.c 		if (d >= sizeof(uint8_t)) {
uint8_t           855 tools/bpf/bpf_dbg.c 				  uint8_t *pkt, uint32_t pkt_caplen,
uint8_t           866 tools/bpf/bpf_dbg.c static int bpf_run_all(struct sock_filter *f, uint16_t bpf_len, uint8_t *pkt,
uint8_t           887 tools/bpf/bpf_dbg.c 			    uint8_t *pkt, uint32_t pkt_caplen,
uint8_t          1112 tools/bpf/bpf_dbg.c 			       (uint8_t *) hdr + sizeof(*hdr),
uint8_t          1192 tools/bpf/bpf_dbg.c 				      (uint8_t *) hdr + sizeof(*hdr),
uint8_t            43 tools/bpf/bpf_exp.y static void bpf_set_curr_instr(uint16_t op, uint8_t jt, uint8_t jf, uint32_t k);
uint8_t           479 tools/bpf/bpf_exp.y static void bpf_set_curr_instr(uint16_t code, uint8_t jt, uint8_t jf,
uint8_t           555 tools/bpf/bpf_exp.y 			out[i].jt = (uint8_t) (off - i -1);
uint8_t           567 tools/bpf/bpf_exp.y 			out[i].jf = (uint8_t) (off - i - 1);
uint8_t            52 tools/bpf/bpf_jit_disasm.c static void get_asm_insns(uint8_t *image, size_t len, int opcodes)
uint8_t            93 tools/bpf/bpf_jit_disasm.c 				printf("%02x ", (uint8_t) image[pc + i]);
uint8_t           170 tools/bpf/bpf_jit_disasm.c static uint8_t *get_last_jit_image(char *haystack, size_t hlen,
uint8_t           180 tools/bpf/bpf_jit_disasm.c 	uint8_t *image;
uint8_t           231 tools/bpf/bpf_jit_disasm.c 			image[ulen++] = (uint8_t) strtoul(pptr, &pptr, 16);
uint8_t           268 tools/bpf/bpf_jit_disasm.c 	uint8_t *pos;
uint8_t           269 tools/bpf/bpf_jit_disasm.c 	uint8_t *image = NULL;
uint8_t           336 tools/bpf/bpftool/common.c void print_data_json(uint8_t *data, size_t len)
uint8_t           346 tools/bpf/bpftool/common.c void print_hex_data_json(uint8_t *data, size_t len)
uint8_t           181 tools/bpf/bpftool/jit_disasm.c 						     (uint8_t)image[pc + i]);
uint8_t           187 tools/bpf/bpftool/jit_disasm.c 					       (uint8_t)image[pc + i]);
uint8_t           189 tools/bpf/bpftool/main.h void print_data_json(uint8_t *data, size_t len);
uint8_t           190 tools/bpf/bpftool/main.h void print_hex_data_json(uint8_t *data, size_t len);
uint8_t           846 tools/bpf/bpftool/prog.c 			fprintf(f, "%02x%s", *(uint8_t *)(data + j),
uint8_t           274 tools/bpf/bpftool/xlated_dumper.c 			print_hex_data_json((uint8_t *)(&insn[i].off), 2);
uint8_t           278 tools/bpf/bpftool/xlated_dumper.c 				print_hex_data_json((uint8_t *)(&insn[i].imm),
uint8_t           281 tools/bpf/bpftool/xlated_dumper.c 				print_hex_data_json((uint8_t *)(&insn[i].imm),
uint8_t            32 tools/firmware/ihex2fw.c         uint8_t data[];
uint8_t            38 tools/firmware/ihex2fw.c static uint8_t nybble(const uint8_t n)
uint8_t            46 tools/firmware/ihex2fw.c static uint8_t hex(const uint8_t *data, uint8_t *crc)
uint8_t            48 tools/firmware/ihex2fw.c 	uint8_t val = (nybble(data[0]) << 4) | nybble(data[1]);
uint8_t            53 tools/firmware/ihex2fw.c static int process_ihex(uint8_t *data, ssize_t size);
uint8_t            76 tools/firmware/ihex2fw.c 	uint8_t *data;
uint8_t           132 tools/firmware/ihex2fw.c static int process_ihex(uint8_t *data, ssize_t size)
uint8_t           138 tools/firmware/ihex2fw.c 	uint8_t type, crc = 0, crcbyte = 0;
uint8_t            71 tools/iio/iio_generic_buffer.c void print1byte(uint8_t input, struct iio_channel_info *info)
uint8_t           180 tools/iio/iio_generic_buffer.c 			print1byte(*(uint8_t *)(data + channels[k].location),
uint8_t             7 tools/include/tools/be_byteshift.h static inline uint16_t __get_unaligned_be16(const uint8_t *p)
uint8_t            12 tools/include/tools/be_byteshift.h static inline uint32_t __get_unaligned_be32(const uint8_t *p)
uint8_t            17 tools/include/tools/be_byteshift.h static inline uint64_t __get_unaligned_be64(const uint8_t *p)
uint8_t            23 tools/include/tools/be_byteshift.h static inline void __put_unaligned_be16(uint16_t val, uint8_t *p)
uint8_t            29 tools/include/tools/be_byteshift.h static inline void __put_unaligned_be32(uint32_t val, uint8_t *p)
uint8_t            35 tools/include/tools/be_byteshift.h static inline void __put_unaligned_be64(uint64_t val, uint8_t *p)
uint8_t            43 tools/include/tools/be_byteshift.h 	return __get_unaligned_be16((const uint8_t *)p);
uint8_t            48 tools/include/tools/be_byteshift.h 	return __get_unaligned_be32((const uint8_t *)p);
uint8_t            53 tools/include/tools/be_byteshift.h 	return __get_unaligned_be64((const uint8_t *)p);
uint8_t             7 tools/include/tools/le_byteshift.h static inline uint16_t __get_unaligned_le16(const uint8_t *p)
uint8_t            12 tools/include/tools/le_byteshift.h static inline uint32_t __get_unaligned_le32(const uint8_t *p)
uint8_t            17 tools/include/tools/le_byteshift.h static inline uint64_t __get_unaligned_le64(const uint8_t *p)
uint8_t            23 tools/include/tools/le_byteshift.h static inline void __put_unaligned_le16(uint16_t val, uint8_t *p)
uint8_t            29 tools/include/tools/le_byteshift.h static inline void __put_unaligned_le32(uint32_t val, uint8_t *p)
uint8_t            35 tools/include/tools/le_byteshift.h static inline void __put_unaligned_le64(uint64_t val, uint8_t *p)
uint8_t            43 tools/include/tools/le_byteshift.h 	return __get_unaligned_le16((const uint8_t *)p);
uint8_t            48 tools/include/tools/le_byteshift.h 	return __get_unaligned_le32((const uint8_t *)p);
uint8_t            53 tools/include/tools/le_byteshift.h 	return __get_unaligned_le64((const uint8_t *)p);
uint8_t            57 tools/include/uapi/drm/drm.h typedef uint8_t  __u8;
uint8_t            16 tools/lib/bpf/nlattr.c 	[LIBBPF_NLA_U8]		= sizeof(uint8_t),
uint8_t            74 tools/lib/bpf/nlattr.h static inline uint8_t libbpf_nla_getattr_u8(const struct nlattr *nla)
uint8_t            76 tools/lib/bpf/nlattr.h 	return *(uint8_t *)libbpf_nla_data(nla);
uint8_t          4110 tools/lib/traceevent/event-parse.c 				trace_seq_printf(s, "%u", *(uint8_t *)num);
uint8_t          4119 tools/lib/traceevent/event-parse.c 						 el_size, *(uint8_t *)num);
uint8_t          4577 tools/lib/traceevent/event-parse.c 	uint8_t hi, lo;
uint8_t           300 tools/lib/traceevent/plugins/plugin_kvm.c 	uint8_t *insn;
uint8_t            96 tools/perf/util/arm-spe-pkt-decoder.c 	case 1: packet->payload = *(uint8_t *)buf; break;
uint8_t           275 tools/perf/util/cs-etm-decoder/cs-etm-decoder.c 				  const uint8_t trace_chan_id)
uint8_t           296 tools/perf/util/cs-etm-decoder/cs-etm-decoder.c 				  const uint8_t trace_chan_id)
uint8_t           385 tools/perf/util/cs-etm-decoder/cs-etm-decoder.c 			     const uint8_t trace_chan_id)
uint8_t           460 tools/perf/util/cs-etm-decoder/cs-etm-decoder.c 				     const uint8_t trace_chan_id)
uint8_t           474 tools/perf/util/cs-etm-decoder/cs-etm-decoder.c 				 const uint8_t trace_chan_id)
uint8_t           491 tools/perf/util/cs-etm-decoder/cs-etm-decoder.c 				     const uint8_t trace_chan_id)
uint8_t           501 tools/perf/util/cs-etm-decoder/cs-etm-decoder.c 			const uint8_t trace_chan_id)
uint8_t            36 tools/perf/util/genelf_debug.c typedef uint8_t  ubyte;
uint8_t           111 tools/perf/util/lzma.c 	const uint8_t magic[6] = { 0xFD, '7', 'z', 'X', 'Z', 0x00 };
uint8_t           114 tools/perf/util/symbol-elf.c static inline uint8_t elf_sym__type(const GElf_Sym *sym)
uint8_t           119 tools/perf/util/symbol-elf.c static inline uint8_t elf_sym__visibility(const GElf_Sym *sym)
uint8_t            86 tools/perf/util/zlib.c 	const uint8_t magic[2] = { 0x1f, 0x8b };
uint8_t            33 tools/power/acpi/tools/ec/ec_access.c static uint8_t write_value = -1;
uint8_t           143 tools/power/acpi/tools/ec/ec_access.c 		printf(" %.2x ", (uint8_t)buf[byte_off]);
uint8_t           168 tools/power/acpi/tools/ec/ec_access.c 			printf(" %.2x ", (uint8_t)buf2[byte_off]);
uint8_t           170 tools/power/acpi/tools/ec/ec_access.c 			printf("*%.2x ", (uint8_t)buf2[byte_off]);
uint8_t           177 tools/power/acpi/tools/ec/ec_access.c 	uint8_t buf;
uint8_t           192 tools/power/acpi/tools/ec/ec_access.c void write_ec_val(int fd, int byte_offset, uint8_t value)
uint8_t           137 tools/power/cpupower/utils/helpers/amd.c 	uint8_t val = 0;
uint8_t            35 tools/spi/spidev_test.c static uint8_t bits = 8;
uint8_t            45 tools/spi/spidev_test.c uint8_t default_tx[] = {
uint8_t            54 tools/spi/spidev_test.c uint8_t default_rx[ARRAY_SIZE(default_tx)] = {0, };
uint8_t           113 tools/spi/spidev_test.c static void transfer(int fd, uint8_t const *tx, uint8_t const *rx, size_t len)
uint8_t           300 tools/spi/spidev_test.c 	uint8_t *tx;
uint8_t           301 tools/spi/spidev_test.c 	uint8_t *rx;
uint8_t           322 tools/spi/spidev_test.c 	uint8_t *tx;
uint8_t           323 tools/spi/spidev_test.c 	uint8_t *rx;
uint8_t           369 tools/spi/spidev_test.c 	uint8_t *tx;
uint8_t           370 tools/spi/spidev_test.c 	uint8_t *rx;
uint8_t           550 tools/testing/selftests/bpf/progs/core_reloc_types.h 	uint8_t		u8_field;
uint8_t           563 tools/testing/selftests/bpf/progs/core_reloc_types.h 	uint8_t		s8_field;
uint8_t           584 tools/testing/selftests/bpf/progs/core_reloc_types.h 	uint8_t		u8_field;
uint8_t           607 tools/testing/selftests/bpf/progs/core_reloc_types.h 	uint8_t		u8_field;
uint8_t           620 tools/testing/selftests/bpf/progs/core_reloc_types.h 	uint8_t		u8_field;
uint8_t           633 tools/testing/selftests/bpf/progs/core_reloc_types.h 	uint8_t		u8_field;
uint8_t            45 tools/testing/selftests/bpf/progs/strobemeta.h 	uint8_t _reserved[6];
uint8_t           170 tools/testing/selftests/bpf/progs/strobemeta.h 	uint8_t req_meta_valid;
uint8_t            16 tools/testing/selftests/bpf/progs/test_core_reloc_ints.c 	uint8_t		u8_field;
uint8_t            58 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	uint8_t *ipver;
uint8_t            62 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	ipver = (uint8_t *)cursor;
uint8_t           178 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	    struct sr6_tlv_t *itlv, uint8_t tlv_size)
uint8_t           181 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	uint8_t len_remaining, new_pad;
uint8_t           225 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	uint8_t len_remaining, new_pad;
uint8_t           327 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	uint8_t new_flags = SR6_FLAG_ALERT;
uint8_t           334 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	uint8_t tlv[20] = {2, 18, 0, 0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
uint8_t           364 tools/testing/selftests/bpf/progs/test_lwt_seg6local.c 	uint8_t new_flags = 0;
uint8_t            58 tools/testing/selftests/bpf/progs/test_seg6_loop.c 	uint8_t *ipver;
uint8_t            62 tools/testing/selftests/bpf/progs/test_seg6_loop.c 	ipver = (uint8_t *)cursor;
uint8_t           181 tools/testing/selftests/bpf/progs/test_seg6_loop.c 				   struct sr6_tlv_t *itlv, uint8_t tlv_size)
uint8_t           184 tools/testing/selftests/bpf/progs/test_seg6_loop.c 	uint8_t len_remaining, new_pad;
uint8_t           231 tools/testing/selftests/bpf/progs/test_seg6_loop.c 	uint8_t new_flags = SR6_FLAG_ALERT;
uint8_t           238 tools/testing/selftests/bpf/progs/test_seg6_loop.c 	uint8_t tlv[20] = {2, 18, 0, 0, 0xfd, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
uint8_t          3783 tools/testing/selftests/bpf/test_btf.c 	uint8_t *raw_btf = NULL, *user_btf = NULL;
uint8_t          3869 tools/testing/selftests/bpf/test_btf.c 	uint8_t *raw_btf = NULL, *user_btf[2] = {};
uint8_t          4004 tools/testing/selftests/bpf/test_btf.c 	uint8_t *raw_btf = NULL, *user_btf = NULL;
uint8_t          4309 tools/testing/selftests/bpf/test_btf.c 		uint8_t ui8a[8];
uint8_t          4319 tools/testing/selftests/bpf/test_btf.c 	uint8_t si8_4[2][2];
uint8_t          4771 tools/testing/selftests/bpf/test_btf.c 	uint8_t *raw_btf;
uint8_t            65 tools/testing/selftests/bpf/test_flow_dissector.c static uint8_t	cfg_dsfield_inner;
uint8_t            66 tools/testing/selftests/bpf/test_flow_dissector.c static uint8_t	cfg_dsfield_outer;
uint8_t            67 tools/testing/selftests/bpf/test_flow_dissector.c static uint8_t	cfg_encap_proto;
uint8_t           165 tools/testing/selftests/bpf/test_flow_dissector.c static void build_ipv4_header(void *header, uint8_t proto,
uint8_t           167 tools/testing/selftests/bpf/test_flow_dissector.c 			      int payload_len, uint8_t tos)
uint8_t           183 tools/testing/selftests/bpf/test_flow_dissector.c static void ipv6_set_dsfield(struct ipv6hdr *ip6h, uint8_t dsfield)
uint8_t           193 tools/testing/selftests/bpf/test_flow_dissector.c static void build_ipv6_header(void *header, uint8_t proto,
uint8_t           196 tools/testing/selftests/bpf/test_flow_dissector.c 			      int payload_len, uint8_t dsfield)
uint8_t           254 tools/testing/selftests/bpf/test_flow_dissector.c static void build_gue_header(void *header, uint8_t proto)
uint8_t            34 tools/testing/selftests/bpf/test_lpm_map.c 	uint8_t key[];
uint8_t            38 tools/testing/selftests/bpf/test_lpm_map.c 				    const uint8_t *key,
uint8_t            42 tools/testing/selftests/bpf/test_lpm_map.c 				  const uint8_t *key,
uint8_t            82 tools/testing/selftests/bpf/test_lpm_map.c 				    const uint8_t *key,
uint8_t           111 tools/testing/selftests/bpf/test_lpm_map.c 				     const uint8_t *key,
uint8_t           144 tools/testing/selftests/bpf/test_lpm_map.c 	assert(!tlpm_match(list, (uint8_t[]){ 0xff }, 8));
uint8_t           146 tools/testing/selftests/bpf/test_lpm_map.c 	t1 = list = tlpm_add(list, (uint8_t[]){ 0xff }, 8);
uint8_t           147 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t1 == tlpm_match(list, (uint8_t[]){ 0xff }, 8));
uint8_t           148 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t1 == tlpm_match(list, (uint8_t[]){ 0xff, 0xff }, 16));
uint8_t           149 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t1 == tlpm_match(list, (uint8_t[]){ 0xff, 0x00 }, 16));
uint8_t           150 tools/testing/selftests/bpf/test_lpm_map.c 	assert(!tlpm_match(list, (uint8_t[]){ 0x7f }, 8));
uint8_t           151 tools/testing/selftests/bpf/test_lpm_map.c 	assert(!tlpm_match(list, (uint8_t[]){ 0xfe }, 8));
uint8_t           152 tools/testing/selftests/bpf/test_lpm_map.c 	assert(!tlpm_match(list, (uint8_t[]){ 0xff }, 7));
uint8_t           154 tools/testing/selftests/bpf/test_lpm_map.c 	t2 = list = tlpm_add(list, (uint8_t[]){ 0xff, 0xff }, 16);
uint8_t           155 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t1 == tlpm_match(list, (uint8_t[]){ 0xff }, 8));
uint8_t           156 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t2 == tlpm_match(list, (uint8_t[]){ 0xff, 0xff }, 16));
uint8_t           157 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t1 == tlpm_match(list, (uint8_t[]){ 0xff, 0xff }, 15));
uint8_t           158 tools/testing/selftests/bpf/test_lpm_map.c 	assert(!tlpm_match(list, (uint8_t[]){ 0x7f, 0xff }, 16));
uint8_t           160 tools/testing/selftests/bpf/test_lpm_map.c 	list = tlpm_delete(list, (uint8_t[]){ 0xff, 0xff }, 16);
uint8_t           161 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t1 == tlpm_match(list, (uint8_t[]){ 0xff }, 8));
uint8_t           162 tools/testing/selftests/bpf/test_lpm_map.c 	assert(t1 == tlpm_match(list, (uint8_t[]){ 0xff, 0xff }, 16));
uint8_t           164 tools/testing/selftests/bpf/test_lpm_map.c 	list = tlpm_delete(list, (uint8_t[]){ 0xff }, 8);
uint8_t           165 tools/testing/selftests/bpf/test_lpm_map.c 	assert(!tlpm_match(list, (uint8_t[]){ 0xff }, 8));
uint8_t           182 tools/testing/selftests/bpf/test_lpm_map.c 		l1 = tlpm_add(l1, (uint8_t[]){
uint8_t           191 tools/testing/selftests/bpf/test_lpm_map.c 		uint8_t key[] = { rand() % 0xff, rand() % 0xff };
uint8_t           214 tools/testing/selftests/bpf/test_lpm_map.c 	uint8_t *data, *value;
uint8_t           677 tools/testing/selftests/bpf/test_sock_addr.c 		uint8_t u4_addr8[4];
uint8_t          1391 tools/testing/selftests/bpf/test_sysctl.c 		uint8_t raw[sizeof(uint64_t)];
uint8_t            78 tools/testing/selftests/bpf/test_tag.c static int hex2bin(uint8_t *dst, const char *src, size_t count)
uint8_t            91 tools/testing/selftests/bpf/test_tag.c static void tag_from_fdinfo(int fd_prog, uint8_t *tag, uint32_t len)
uint8_t           114 tools/testing/selftests/bpf/test_tag.c static void tag_from_alg(int insns, uint8_t *tag, uint32_t len)
uint8_t           144 tools/testing/selftests/bpf/test_tag.c static void tag_dump(const char *prefix, uint8_t *tag, uint32_t len)
uint8_t           154 tools/testing/selftests/bpf/test_tag.c static void tag_exit_report(int insns, int fd_map, uint8_t *ftag,
uint8_t           155 tools/testing/selftests/bpf/test_tag.c 			    uint8_t *atag, uint32_t len)
uint8_t           171 tools/testing/selftests/bpf/test_tag.c 		uint8_t ftag[8], atag[sizeof(ftag)];
uint8_t           100 tools/testing/selftests/bpf/test_verifier.c 	uint8_t flags;
uint8_t           102 tools/testing/selftests/bpf/test_verifier.c 	uint8_t runs;
uint8_t            31 tools/testing/selftests/breakpoints/breakpoint_test_arm64.c static volatile uint8_t var[96] __attribute__((__aligned__(32)));
uint8_t            35 tools/testing/selftests/breakpoints/breakpoint_test_arm64.c 	volatile uint8_t *addr = &var[32 + wr];
uint8_t            83 tools/testing/selftests/breakpoints/breakpoint_test_arm64.c 	const volatile uint8_t *addr = &var[32 + wp];
uint8_t           862 tools/testing/selftests/cgroup/test_memcontrol.c 		uint8_t buf[0x100000];
uint8_t           901 tools/testing/selftests/cgroup/test_memcontrol.c 		uint8_t buf[0x100000];
uint8_t            86 tools/testing/selftests/kvm/include/kvm_util.h void vm_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent);
uint8_t            88 tools/testing/selftests/kvm/include/kvm_util.h 	       uint8_t indent);
uint8_t           344 tools/testing/selftests/kvm/include/x86_64/vmx.h 	uint8_t ret;
uint8_t           361 tools/testing/selftests/kvm/include/x86_64/vmx.h 	uint8_t ret;
uint8_t           373 tools/testing/selftests/kvm/include/x86_64/vmx.h 	uint8_t ret;
uint8_t           389 tools/testing/selftests/kvm/include/x86_64/vmx.h 	uint8_t ret;
uint8_t           495 tools/testing/selftests/kvm/include/x86_64/vmx.h 	uint8_t ret;
uint8_t           522 tools/testing/selftests/kvm/include/x86_64/vmx.h 	uint8_t ret;
uint8_t            91 tools/testing/selftests/kvm/lib/aarch64/processor.c 	uint8_t attr_idx = flags & 7;
uint8_t           187 tools/testing/selftests/kvm/lib/aarch64/processor.c static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, uint64_t page, int level)
uint8_t           206 tools/testing/selftests/kvm/lib/aarch64/processor.c void virt_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent)
uint8_t           305 tools/testing/selftests/kvm/lib/aarch64/processor.c void vcpu_dump(FILE *stream, struct kvm_vm *vm, uint32_t vcpuid, uint8_t indent)
uint8_t          1448 tools/testing/selftests/kvm/lib/kvm_util.c void vm_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent)
uint8_t            67 tools/testing/selftests/kvm/lib/kvm_util_internal.h void virt_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent);
uint8_t            68 tools/testing/selftests/kvm/lib/kvm_util_internal.h void regs_dump(FILE *stream, struct kvm_regs *regs, uint8_t indent);
uint8_t            69 tools/testing/selftests/kvm/lib/kvm_util_internal.h void sregs_dump(FILE *stream, struct kvm_sregs *sregs, uint8_t indent);
uint8_t           155 tools/testing/selftests/kvm/lib/s390x/processor.c static void virt_dump_ptes(FILE *stream, struct kvm_vm *vm, uint8_t indent,
uint8_t           169 tools/testing/selftests/kvm/lib/s390x/processor.c static void virt_dump_region(FILE *stream, struct kvm_vm *vm, uint8_t indent,
uint8_t           191 tools/testing/selftests/kvm/lib/s390x/processor.c void virt_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent)
uint8_t           272 tools/testing/selftests/kvm/lib/s390x/processor.c void vcpu_dump(FILE *stream, struct kvm_vm *vm, uint32_t vcpuid, uint8_t indent)
uint8_t          2079 tools/testing/selftests/kvm/lib/sparsebit.c 		uint8_t op = get8() & 0xf;
uint8_t            95 tools/testing/selftests/kvm/lib/x86_64/processor.c 	       uint8_t indent)
uint8_t           133 tools/testing/selftests/kvm/lib/x86_64/processor.c 			 uint8_t indent)
uint8_t           164 tools/testing/selftests/kvm/lib/x86_64/processor.c 			uint8_t indent)
uint8_t           187 tools/testing/selftests/kvm/lib/x86_64/processor.c 		uint8_t indent)
uint8_t           343 tools/testing/selftests/kvm/lib/x86_64/processor.c void virt_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent)
uint8_t           972 tools/testing/selftests/kvm/lib/x86_64/processor.c void vcpu_dump(FILE *stream, struct kvm_vm *vm, uint32_t vcpuid, uint8_t indent)
uint8_t            18 tools/testing/selftests/kvm/s390x/memop.c static uint8_t mem1[65536];
uint8_t            19 tools/testing/selftests/kvm/s390x/memop.c static uint8_t mem2[65536];
uint8_t            43 tools/testing/selftests/kvm/x86_64/smm_test.c uint8_t smi_handler[] = {
uint8_t           201 tools/testing/selftests/memfd/fuse_test.c 	uint8_t *stack;
uint8_t           577 tools/testing/selftests/memfd/memfd_test.c 	uint8_t *stack;
uint8_t            46 tools/testing/selftests/net/ip_defrag.c static uint8_t udp_payload[MSG_LEN_MAX];
uint8_t            47 tools/testing/selftests/net/ip_defrag.c static uint8_t ip_frame[IP_MAXPACKET];
uint8_t            57 tools/testing/selftests/net/ip_defrag.c 	static uint8_t recv_buff[MSG_LEN_MAX];
uint8_t            82 tools/testing/selftests/net/ip_defrag.c static uint32_t raw_checksum(uint8_t *buf, int len, uint32_t sum)
uint8_t           106 tools/testing/selftests/net/ip_defrag.c 	sum = raw_checksum((uint8_t *)&iphdr->ip_src, 2 * sizeof(iphdr->ip_src),
uint8_t           108 tools/testing/selftests/net/ip_defrag.c 	sum = raw_checksum((uint8_t *)udphdr, UDP_HLEN, sum);
uint8_t           109 tools/testing/selftests/net/ip_defrag.c 	sum = raw_checksum((uint8_t *)udp_payload, payload_len, sum);
uint8_t           122 tools/testing/selftests/net/ip_defrag.c 	sum = raw_checksum((uint8_t *)&iphdr->ip6_src, 2 * sizeof(iphdr->ip6_src),
uint8_t           124 tools/testing/selftests/net/ip_defrag.c 	sum = raw_checksum((uint8_t *)&udphdr->len, sizeof(udphdr->len), sum);
uint8_t           125 tools/testing/selftests/net/ip_defrag.c 	sum = raw_checksum((uint8_t *)udphdr, UDP_HLEN, sum);
uint8_t           126 tools/testing/selftests/net/ip_defrag.c 	sum = raw_checksum((uint8_t *)udp_payload, payload_len, sum);
uint8_t           140 tools/testing/selftests/net/ip_defrag.c 	uint8_t *frag_start = ipv6 ? ip_frame + IP6_HLEN + FRAG_HLEN :
uint8_t           147 tools/testing/selftests/net/ipv6_flowlabel.c static void flowlabel_get(int fd, uint32_t label, uint8_t share, uint16_t flags)
uint8_t            48 tools/testing/selftests/net/ipv6_flowlabel_mgr.c static int flowlabel_get(int fd, uint32_t label, uint8_t share, uint16_t flags)
uint8_t           349 tools/testing/selftests/net/psock_fanout.c 	uint8_t type = typeflags & 0xFF;
uint8_t            68 tools/testing/selftests/net/psock_tpacket.c 	uint8_t *mm_space;
uint8_t           157 tools/testing/selftests/net/psock_tpacket.c 		((uint8_t *) pay)[i + sizeof(*eth)] = (uint8_t) rand();
uint8_t           245 tools/testing/selftests/net/psock_tpacket.c 				test_payload((uint8_t *) ppd.raw + ppd.v1->tp_h.tp_mac,
uint8_t           251 tools/testing/selftests/net/psock_tpacket.c 				test_payload((uint8_t *) ppd.raw + ppd.v2->tp_h.tp_mac,
uint8_t           356 tools/testing/selftests/net/psock_tpacket.c 	uint8_t *f0 = ring->rd[0].iov_base;
uint8_t           430 tools/testing/selftests/net/psock_tpacket.c 				memcpy((uint8_t *) ppd.raw + TPACKET_HDRLEN -
uint8_t           440 tools/testing/selftests/net/psock_tpacket.c 				memcpy((uint8_t *) ppd.raw + TPACKET2_HDRLEN -
uint8_t           452 tools/testing/selftests/net/psock_tpacket.c 				memcpy((uint8_t *)tx + TPACKET3_HDRLEN -
uint8_t           551 tools/testing/selftests/net/psock_tpacket.c 	ppd = (struct tpacket3_hdr *) ((uint8_t *) pbd +
uint8_t           562 tools/testing/selftests/net/psock_tpacket.c 		test_payload((uint8_t *) ppd + ppd->tp_mac, ppd->tp_snaplen);
uint8_t           567 tools/testing/selftests/net/psock_tpacket.c 		ppd = (struct tpacket3_hdr *) ((uint8_t *) ppd + ppd->tp_next_offset);
uint8_t            24 tools/testing/selftests/powerpc/include/utils.h typedef uint8_t u8;
uint8_t            60 tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c 	uint8_t vsx[sizeof(vector int)];
uint8_t            61 tools/testing/selftests/powerpc/tm/tm-signal-context-chk-vsx.c 	uint8_t vsx_tm[sizeof(vector int)];
uint8_t           289 tools/testing/selftests/powerpc/tm/tm-trap.c 	le = (int) *(uint8_t *)&k;
uint8_t            79 tools/testing/selftests/proc/proc-pid-vm.c 	uint8_t e_ident[16];
uint8_t           125 tools/testing/selftests/proc/proc-pid-vm.c static const uint8_t payload[] = {
uint8_t           148 tools/testing/selftests/proc/proc-pid-vm.c static int make_exe(const uint8_t *payload, size_t len)
uint8_t             8 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h typedef uint8_t u8;
uint8_t            17 tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/int_typedefs.h typedef uint8_t __u8;
uint8_t            64 tools/testing/selftests/vm/transhuge-stress.c 	uint8_t *map;
uint8_t           190 tools/testing/selftests/x86/protection_keys.c #define  u8 uint8_t
uint8_t           211 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(udev, uint8_t,  sdev, bDeviceClass,		"%02x\n");
uint8_t           212 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(udev, uint8_t,  sdev, bDeviceSubClass,	"%02x\n");
uint8_t           213 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(udev, uint8_t,  sdev, bDeviceProtocol,	"%02x\n");
uint8_t           219 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(udev, uint8_t,  sdev, bConfigurationValue,	"%02x\n");
uint8_t           220 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(udev, uint8_t,  sdev, bNumConfigurations,	"%02x\n");
uint8_t           221 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(udev, uint8_t,  sdev, bNumInterfaces,		"%02x\n");
uint8_t           223 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(udev, uint8_t,  sdev, devnum,			"%d\n");
uint8_t           261 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(uinf, uint8_t,  sif, bInterfaceClass,		"%02x\n");
uint8_t           262 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(uinf, uint8_t,  sif, bInterfaceSubClass,	"%02x\n");
uint8_t           263 tools/usb/usbip/libsrc/usbip_common.c 	READ_ATTR(uinf, uint8_t,  sif, bInterfaceProtocol,	"%02x\n");
uint8_t           295 tools/usb/usbip/libsrc/usbip_common.c void usbip_names_get_class(char *buff, size_t size, uint8_t class,
uint8_t           296 tools/usb/usbip/libsrc/usbip_common.c 			   uint8_t subclass, uint8_t protocol)
uint8_t           105 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bInterfaceClass;
uint8_t           106 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bInterfaceSubClass;
uint8_t           107 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bInterfaceProtocol;
uint8_t           108 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t padding;	/* alignment */
uint8_t           123 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bDeviceClass;
uint8_t           124 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bDeviceSubClass;
uint8_t           125 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bDeviceProtocol;
uint8_t           126 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bConfigurationValue;
uint8_t           127 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bNumConfigurations;
uint8_t           128 tools/usb/usbip/libsrc/usbip_common.h 	uint8_t bNumInterfaces;
uint8_t           149 tools/usb/usbip/libsrc/usbip_common.h void usbip_names_get_class(char *buff, size_t size, uint8_t class,
uint8_t           150 tools/usb/usbip/libsrc/usbip_common.h 			   uint8_t subclass, uint8_t protocol);
uint8_t           357 tools/usb/usbip/libsrc/vhci_driver.c int usbip_vhci_attach_device2(uint8_t port, int sockfd, uint32_t devid,
uint8_t           385 tools/usb/usbip/libsrc/vhci_driver.c static unsigned long get_devid(uint8_t busnum, uint8_t devnum)
uint8_t           391 tools/usb/usbip/libsrc/vhci_driver.c int usbip_vhci_attach_device(uint8_t port, int sockfd, uint8_t busnum,
uint8_t           392 tools/usb/usbip/libsrc/vhci_driver.c 		uint8_t devnum, uint32_t speed)
uint8_t           399 tools/usb/usbip/libsrc/vhci_driver.c int usbip_vhci_detach_device(uint8_t port)
uint8_t            24 tools/usb/usbip/libsrc/vhci_driver.h 	uint8_t port;
uint8_t            29 tools/usb/usbip/libsrc/vhci_driver.h 	uint8_t busnum;
uint8_t            30 tools/usb/usbip/libsrc/vhci_driver.h 	uint8_t devnum;
uint8_t            56 tools/usb/usbip/libsrc/vhci_driver.h int usbip_vhci_attach_device2(uint8_t port, int sockfd, uint32_t devid,
uint8_t            60 tools/usb/usbip/libsrc/vhci_driver.h int usbip_vhci_attach_device(uint8_t port, int sockfd, uint8_t busnum,
uint8_t            61 tools/usb/usbip/libsrc/vhci_driver.h 		uint8_t devnum, uint32_t speed);
uint8_t            63 tools/usb/usbip/libsrc/vhci_driver.h int usbip_vhci_detach_device(uint8_t port);
uint8_t            35 tools/usb/usbip/src/usbip_detach.c 	uint8_t portnum;
uint8_t           970 tools/vm/page-types.c 	uint8_t vec[PAGEMAP_BATCH];