uic                38 arch/powerpc/platforms/4xx/uic.c struct uic *primary_uic;
uic                52 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic = irq_data_get_irq_chip_data(d);
uic                58 arch/powerpc/platforms/4xx/uic.c 	raw_spin_lock_irqsave(&uic->lock, flags);
uic                61 arch/powerpc/platforms/4xx/uic.c 		mtdcr(uic->dcrbase + UIC_SR, sr);
uic                62 arch/powerpc/platforms/4xx/uic.c 	er = mfdcr(uic->dcrbase + UIC_ER);
uic                64 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_ER, er);
uic                65 arch/powerpc/platforms/4xx/uic.c 	raw_spin_unlock_irqrestore(&uic->lock, flags);
uic                70 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic = irq_data_get_irq_chip_data(d);
uic                75 arch/powerpc/platforms/4xx/uic.c 	raw_spin_lock_irqsave(&uic->lock, flags);
uic                76 arch/powerpc/platforms/4xx/uic.c 	er = mfdcr(uic->dcrbase + UIC_ER);
uic                78 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_ER, er);
uic                79 arch/powerpc/platforms/4xx/uic.c 	raw_spin_unlock_irqrestore(&uic->lock, flags);
uic                84 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic = irq_data_get_irq_chip_data(d);
uic                88 arch/powerpc/platforms/4xx/uic.c 	raw_spin_lock_irqsave(&uic->lock, flags);
uic                89 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src));
uic                90 arch/powerpc/platforms/4xx/uic.c 	raw_spin_unlock_irqrestore(&uic->lock, flags);
uic                95 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic = irq_data_get_irq_chip_data(d);
uic               101 arch/powerpc/platforms/4xx/uic.c 	raw_spin_lock_irqsave(&uic->lock, flags);
uic               102 arch/powerpc/platforms/4xx/uic.c 	er = mfdcr(uic->dcrbase + UIC_ER);
uic               104 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_ER, er);
uic               114 arch/powerpc/platforms/4xx/uic.c 		mtdcr(uic->dcrbase + UIC_SR, sr);
uic               115 arch/powerpc/platforms/4xx/uic.c 	raw_spin_unlock_irqrestore(&uic->lock, flags);
uic               120 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic = irq_data_get_irq_chip_data(d);
uic               149 arch/powerpc/platforms/4xx/uic.c 	raw_spin_lock_irqsave(&uic->lock, flags);
uic               150 arch/powerpc/platforms/4xx/uic.c 	tr = mfdcr(uic->dcrbase + UIC_TR);
uic               151 arch/powerpc/platforms/4xx/uic.c 	pr = mfdcr(uic->dcrbase + UIC_PR);
uic               155 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_PR, pr);
uic               156 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_TR, tr);
uic               157 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_SR, ~mask);
uic               159 arch/powerpc/platforms/4xx/uic.c 	raw_spin_unlock_irqrestore(&uic->lock, flags);
uic               176 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic = h->host_data;
uic               178 arch/powerpc/platforms/4xx/uic.c 	irq_set_chip_data(virq, uic);
uic               198 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic = irq_desc_get_handler_data(desc);
uic               210 arch/powerpc/platforms/4xx/uic.c 	msr = mfdcr(uic->dcrbase + UIC_MSR);
uic               216 arch/powerpc/platforms/4xx/uic.c 	subvirq = irq_linear_revmap(uic->irqhost, src);
uic               228 arch/powerpc/platforms/4xx/uic.c static struct uic * __init uic_init_one(struct device_node *node)
uic               230 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic;
uic               236 arch/powerpc/platforms/4xx/uic.c 	uic = kzalloc(sizeof(*uic), GFP_KERNEL);
uic               237 arch/powerpc/platforms/4xx/uic.c 	if (! uic)
uic               240 arch/powerpc/platforms/4xx/uic.c 	raw_spin_lock_init(&uic->lock);
uic               247 arch/powerpc/platforms/4xx/uic.c 	uic->index = *indexp;
uic               255 arch/powerpc/platforms/4xx/uic.c 	uic->dcrbase = *dcrreg;
uic               257 arch/powerpc/platforms/4xx/uic.c 	uic->irqhost = irq_domain_add_linear(node, NR_UIC_INTS, &uic_host_ops,
uic               258 arch/powerpc/platforms/4xx/uic.c 					     uic);
uic               259 arch/powerpc/platforms/4xx/uic.c 	if (! uic->irqhost)
uic               263 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_ER, 0);
uic               264 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_CR, 0);
uic               265 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_TR, 0);
uic               267 arch/powerpc/platforms/4xx/uic.c 	mtdcr(uic->dcrbase + UIC_SR, 0xffffffff);
uic               269 arch/powerpc/platforms/4xx/uic.c 	printk ("UIC%d (%d IRQ sources) at DCR 0x%x\n", uic->index,
uic               270 arch/powerpc/platforms/4xx/uic.c 		NR_UIC_INTS, uic->dcrbase);
uic               272 arch/powerpc/platforms/4xx/uic.c 	return uic;
uic               278 arch/powerpc/platforms/4xx/uic.c 	struct uic *uic;
uic               304 arch/powerpc/platforms/4xx/uic.c 			uic = uic_init_one(np);
uic               305 arch/powerpc/platforms/4xx/uic.c 			if (! uic)
uic               311 arch/powerpc/platforms/4xx/uic.c 			irq_set_handler_data(cascade_virq, uic);