uasm_rel_lo 199 arch/mips/include/asm/uasm.h int uasm_rel_lo(long val); uasm_rel_lo 400 arch/mips/kvm/entry.c UASM_i_LW(&p, T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), AT); uasm_rel_lo 675 arch/mips/kvm/entry.c UASM_i_LW(&p, K0, uasm_rel_lo((long)&ebase), K0); uasm_rel_lo 786 arch/mips/kvm/entry.c uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); uasm_rel_lo 933 arch/mips/kvm/entry.c uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); uasm_rel_lo 110 arch/mips/mm/page.c uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off)); uasm_rel_lo 117 arch/mips/mm/page.c uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off)); uasm_rel_lo 421 arch/mips/mm/tlbex.c uasm_i_lw(&p, K1, uasm_rel_lo(pgdc), K1); uasm_rel_lo 856 arch/mips/mm/tlbex.c uasm_i_ld(p, ptr, uasm_rel_lo(pgdc), ptr); uasm_rel_lo 859 arch/mips/mm/tlbex.c uasm_i_ld(p, ptr, uasm_rel_lo(pgdc), ptr); uasm_rel_lo 900 arch/mips/mm/tlbex.c single_insn_swpd = uasm_in_compat_space_p(swpd) && !uasm_rel_lo(swpd); uasm_rel_lo 922 arch/mips/mm/tlbex.c uasm_i_addiu(p, ptr, ptr, uasm_rel_lo(swpd)); uasm_rel_lo 924 arch/mips/mm/tlbex.c uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(swpd)); uasm_rel_lo 986 arch/mips/mm/tlbex.c uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr); uasm_rel_lo 1639 arch/mips/mm/tlbex.c UASM_i_SW(&p, a0, uasm_rel_lo(pgdc), a2); uasm_rel_lo 1642 arch/mips/mm/tlbex.c UASM_i_SW(&p, a0, uasm_rel_lo(pgdc), a2); uasm_rel_lo 1920 arch/mips/mm/tlbex.c uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr); uasm_rel_lo 2291 arch/mips/mm/tlbex.c uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_0)); uasm_rel_lo 2347 arch/mips/mm/tlbex.c uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_1)); uasm_rel_lo 2404 arch/mips/mm/tlbex.c uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_1)); uasm_rel_lo 455 arch/mips/mm/uasm.c UASM_EXPORT_SYMBOL(uasm_rel_lo); uasm_rel_lo 478 arch/mips/mm/uasm.c if (uasm_rel_lo(addr)) { uasm_rel_lo 481 arch/mips/mm/uasm.c uasm_rel_lo(addr)); uasm_rel_lo 484 arch/mips/mm/uasm.c uasm_rel_lo(addr));