uart_base        2074 arch/alpha/kernel/smc37c669.c     SMC37c669_SERIAL_BASE_ADDRESS_REGISTER uart_base;
uart_base        2086 arch/alpha/kernel/smc37c669.c     uart_base.as_uchar = 
uart_base        2096 arch/alpha/kernel/smc37c669.c     local_config[SERIAL_0].port1 = uart_base.by_field.addr9_3 << 3;
uart_base        2104 arch/alpha/kernel/smc37c669.c     uart_base.as_uchar = 
uart_base        2109 arch/alpha/kernel/smc37c669.c     local_config[SERIAL_1].port1 = uart_base.by_field.addr9_3 << 3;
uart_base          16 arch/arm/mach-iop32x/include/mach/uncompress.h 	while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
uart_base          18 arch/arm/mach-iop32x/include/mach/uncompress.h 	uart_base[UART_TX] = c;
uart_base          18 arch/arm/mach-ixp4xx/include/mach/uncompress.h volatile u32* uart_base;
uart_base          24 arch/arm/mach-ixp4xx/include/mach/uncompress.h 	while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
uart_base          27 arch/arm/mach-ixp4xx/include/mach/uncompress.h 	*uart_base = c;
uart_base          42 arch/arm/mach-ixp4xx/include/mach/uncompress.h 		uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
uart_base          44 arch/arm/mach-ixp4xx/include/mach/uncompress.h 		uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
uart_base          30 arch/arm/mach-omap1/include/mach/uncompress.h volatile u8 *uart_base;
uart_base          50 arch/arm/mach-omap1/include/mach/uncompress.h 	if (!uart_base)
uart_base          54 arch/arm/mach-omap1/include/mach/uncompress.h 	if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
uart_base          57 arch/arm/mach-omap1/include/mach/uncompress.h 	while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
uart_base          59 arch/arm/mach-omap1/include/mach/uncompress.h 	uart_base[UART_TX << uart_shift] = c;
uart_base          71 arch/arm/mach-omap1/include/mach/uncompress.h 		uart_base = (volatile u8 *)(dbg_uart);			\
uart_base          16 arch/arm/mach-pxa/include/mach/uncompress.h unsigned long uart_base;
uart_base          22 arch/arm/mach-pxa/include/mach/uncompress.h 	return *(volatile unsigned char *)(uart_base + (offset << uart_shift));
uart_base          27 arch/arm/mach-pxa/include/mach/uncompress.h 	*(volatile unsigned char *)(uart_base + (offset << uart_shift)) = val;
uart_base          57 arch/arm/mach-pxa/include/mach/uncompress.h 	uart_base = FFUART_BASE;
uart_base          64 arch/arm/mach-pxa/include/mach/uncompress.h 		uart_base = STUART_BASE;
uart_base          67 arch/arm/mach-pxa/include/mach/uncompress.h 		uart_base = 0x10000000;	/* nCS4 */
uart_base          52 arch/mips/generic/board-ocelot.c 	void __iomem *uart_base;
uart_base          54 arch/mips/generic/board-ocelot.c 	uart_base = ioremap_nocache(UART_UART, 0x20);
uart_base          55 arch/mips/generic/board-ocelot.c 	setup_8250_early_printk_port((unsigned long)uart_base, 2, 50000);
uart_base          68 arch/mips/include/asm/mach-loongson64/boot_param.h 	u64 uart_base;
uart_base         127 arch/mips/include/asm/sn/klconfig.h 	unsigned long	uart_base;
uart_base          56 arch/mips/loongson32/common/prom.c 	void __iomem *uart_base;
uart_base          67 arch/mips/loongson32/common/prom.c 		uart_base = ioremap_nocache(LS1X_UART3_BASE, 0x0f);
uart_base          69 arch/mips/loongson32/common/prom.c 		uart_base = ioremap_nocache(LS1X_UART2_BASE, 0x0f);
uart_base          71 arch/mips/loongson32/common/prom.c 		uart_base = ioremap_nocache(LS1X_UART1_BASE, 0x0f);
uart_base          73 arch/mips/loongson32/common/prom.c 		uart_base = ioremap_nocache(LS1X_UART0_BASE, 0x0f);
uart_base          74 arch/mips/loongson32/common/prom.c 	setup_8250_early_printk_port((unsigned long)uart_base, 0, 0);
uart_base          28 arch/mips/loongson64/common/early_printk.c 	unsigned char *uart_base;
uart_base          30 arch/mips/loongson64/common/early_printk.c 	uart_base = (unsigned char *)_loongson_uart_base[0];
uart_base          33 arch/mips/loongson64/common/early_printk.c 	while (((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) &&
uart_base          37 arch/mips/loongson64/common/early_printk.c 	serial_out(uart_base, UART_TX, c);
uart_base          83 arch/mips/loongson64/common/serial.c 		loongson_uart_base[i] = loongson_sysconf.uarts[i].uart_base;
uart_base          29 arch/mips/pic32/pic32mzda/early_console.c static void __iomem *uart_base;
uart_base          56 arch/mips/pic32/pic32mzda/early_console.c 	__raw_writel(0, uart_base + U_MODE(port));
uart_base          57 arch/mips/pic32/pic32mzda/early_console.c 	__raw_writel(((pbclk / baud) / 16) - 1, uart_base + U_BRG(port));
uart_base          58 arch/mips/pic32/pic32mzda/early_console.c 	__raw_writel(UART_ENABLE, uart_base + U_MODE(port));
uart_base          60 arch/mips/pic32/pic32mzda/early_console.c 		     uart_base + PIC32_SET(U_STA(port)));
uart_base         138 arch/mips/pic32/pic32mzda/early_console.c 	uart_base = ioremap_nocache(PIC32_BASE_UART, 0xc00);
uart_base         157 arch/mips/pic32/pic32mzda/early_console.c 				uart_base + U_STA(console_port)) & UART_TX_FULL)
uart_base         160 arch/mips/pic32/pic32mzda/early_console.c 		__raw_writel(c, uart_base + U_TXR(console_port));
uart_base         112 drivers/tty/serial/omap-serial.c 	unsigned int		uart_base;
uart_base          92 drivers/usb/serial/io_ti.c 	__u16 uart_base;
uart_base         555 drivers/usb/serial/io_ti.c 			port->uart_base + UMPMEM_OFFS_UART_LSR, 1, lsr);
uart_base        2598 drivers/usb/serial/io_ti.c 		edge_port->uart_base = UMPMEM_BASE_UART1;
uart_base        2602 drivers/usb/serial/io_ti.c 		edge_port->uart_base = UMPMEM_BASE_UART2;
uart_base        2613 drivers/usb/serial/io_ti.c 		__func__, port->port_number, edge_port->uart_base,