tx3927_romcptr    325 arch/mips/include/asm/txx9/tx3927.h #define TX3927_ROMC_BA(ch)	(tx3927_romcptr->cr[(ch)] & 0xfff00000)
tx3927_romcptr    327 arch/mips/include/asm/txx9/tx3927.h 	(0x00100000 << ((tx3927_romcptr->cr[(ch)] >> 8) & 0xf))
tx3927_romcptr    328 arch/mips/include/asm/txx9/tx3927.h #define TX3927_ROMC_WIDTH(ch)	(32 >> ((tx3927_romcptr->cr[(ch)] >> 7) & 0x1))
tx3927_romcptr     41 arch/mips/txx9/generic/setup_tx3927.c 		if (!(tx3927_romcptr->cr[i] & 0x8))
tx3927_romcptr    133 arch/mips/txx9/generic/setup_tx3927.c 	if (!(tx3927_romcptr->cr[ch] & 0x8))
tx3927_romcptr    130 arch/mips/txx9/jmr3927/setup.c 	tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
tx3927_romcptr    131 arch/mips/txx9/jmr3927/setup.c 	tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
tx3927_romcptr    132 arch/mips/txx9/jmr3927/setup.c 	tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
tx3927_romcptr    133 arch/mips/txx9/jmr3927/setup.c 	tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;