tx3927_dmaptr      79 arch/mips/txx9/generic/setup_tx3927.c 	tx3927_dmaptr->mcr = 0;
tx3927_dmaptr      80 arch/mips/txx9/generic/setup_tx3927.c 	for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) {
tx3927_dmaptr      82 arch/mips/txx9/generic/setup_tx3927.c 		tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST;
tx3927_dmaptr      83 arch/mips/txx9/generic/setup_tx3927.c 		tx3927_dmaptr->ch[i].ccr = 0;
tx3927_dmaptr      87 arch/mips/txx9/generic/setup_tx3927.c 	tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN;
tx3927_dmaptr      89 arch/mips/txx9/generic/setup_tx3927.c 	tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE;