trap_raz_wi 358 arch/arm/kvm/coproc.c #define access_pmcr trap_raz_wi trap_raz_wi 359 arch/arm/kvm/coproc.c #define access_pmcntenset trap_raz_wi trap_raz_wi 360 arch/arm/kvm/coproc.c #define access_pmcntenclr trap_raz_wi trap_raz_wi 361 arch/arm/kvm/coproc.c #define access_pmovsr trap_raz_wi trap_raz_wi 362 arch/arm/kvm/coproc.c #define access_pmselr trap_raz_wi trap_raz_wi 363 arch/arm/kvm/coproc.c #define access_pmceid0 trap_raz_wi trap_raz_wi 364 arch/arm/kvm/coproc.c #define access_pmceid1 trap_raz_wi trap_raz_wi 365 arch/arm/kvm/coproc.c #define access_pmccntr trap_raz_wi trap_raz_wi 366 arch/arm/kvm/coproc.c #define access_pmxevtyper trap_raz_wi trap_raz_wi 367 arch/arm/kvm/coproc.c #define access_pmxevcntr trap_raz_wi trap_raz_wi 368 arch/arm/kvm/coproc.c #define access_pmuserenr trap_raz_wi trap_raz_wi 369 arch/arm/kvm/coproc.c #define access_pmintenset trap_raz_wi trap_raz_wi 370 arch/arm/kvm/coproc.c #define access_pmintenclr trap_raz_wi trap_raz_wi 646 arch/arm/kvm/coproc.c trap_raz_wi(vcpu, ¶ms, NULL); trap_raz_wi 710 arch/arm/kvm/coproc.c trap_raz_wi(vcpu, ¶ms, NULL); trap_raz_wi 328 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 677 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 706 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 727 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 765 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 821 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 861 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 892 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 921 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 946 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 963 arch/arm64/kvm/sys_regs.c return trap_raz_wi(vcpu, p, r); trap_raz_wi 1391 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi }, trap_raz_wi 1392 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_OSLAR_EL1), trap_raz_wi }, trap_raz_wi 1394 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi }, trap_raz_wi 1395 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi }, trap_raz_wi 1396 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi }, trap_raz_wi 1397 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_DBGCLAIMCLR_EL1), trap_raz_wi }, trap_raz_wi 1400 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_MDCCSR_EL0), trap_raz_wi }, trap_raz_wi 1401 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_DBGDTR_EL0), trap_raz_wi }, trap_raz_wi 1403 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_DBGDTRTX_EL0), trap_raz_wi }, trap_raz_wi 1503 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERRIDR_EL1), trap_raz_wi }, trap_raz_wi 1504 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERRSELR_EL1), trap_raz_wi }, trap_raz_wi 1505 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERXFR_EL1), trap_raz_wi }, trap_raz_wi 1506 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERXCTLR_EL1), trap_raz_wi }, trap_raz_wi 1507 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERXSTATUS_EL1), trap_raz_wi }, trap_raz_wi 1508 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERXADDR_EL1), trap_raz_wi }, trap_raz_wi 1509 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERXMISC0_EL1), trap_raz_wi }, trap_raz_wi 1510 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ERXMISC1_EL1), trap_raz_wi }, trap_raz_wi 1742 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi }, trap_raz_wi 1746 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi }, trap_raz_wi 1754 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi }, trap_raz_wi 1756 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 3), Op2( 2), trap_raz_wi }, trap_raz_wi 1761 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 6), Op2( 0), trap_raz_wi }, trap_raz_wi 1763 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi }, trap_raz_wi 1778 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 0), trap_raz_wi }, trap_raz_wi 1782 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_raz_wi }, trap_raz_wi 1789 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 3), Op2( 4), trap_raz_wi }, trap_raz_wi 1792 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 1), CRm( 4), Op2( 4), trap_raz_wi }, trap_raz_wi 1806 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 2), CRm( 0), Op2( 0), trap_raz_wi }, trap_raz_wi 1809 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 0), Op2( 7), trap_raz_wi }, trap_raz_wi 1811 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 1), Op2( 7), trap_raz_wi }, trap_raz_wi 1813 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 2), Op2( 7), trap_raz_wi }, trap_raz_wi 1815 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 8), Op2( 6), trap_raz_wi }, trap_raz_wi 1817 arch/arm64/kvm/sys_regs.c { Op1( 0), CRn( 7), CRm( 9), Op2( 6), trap_raz_wi }, trap_raz_wi 1825 arch/arm64/kvm/sys_regs.c { Op1( 0), CRm( 1), .access = trap_raz_wi }, trap_raz_wi 1828 arch/arm64/kvm/sys_regs.c { Op1( 0), CRm( 2), .access = trap_raz_wi },