track 83 arch/arm/include/asm/floppy.h raw_cmd->track = 0; track 80 block/blk-rq-qos.c if (rqos->ops->track) track 81 block/blk-rq-qos.c rqos->ops->track(rqos, rq, bio); track 38 block/blk-rq-qos.h void (*track)(struct rq_qos *, struct request *, struct bio *); track 809 block/blk-wbt.c .track = wbt_track, track 813 drivers/ata/libata-core.c u32 sect, head, cyl, track; track 823 drivers/ata/libata-core.c track = (u32)block / dev->sectors; track 824 drivers/ata/libata-core.c cyl = track / dev->heads; track 825 drivers/ata/libata-core.c head = track % dev->heads; track 829 drivers/ata/libata-core.c (u32)block, track, cyl, head, sect); track 1744 drivers/ata/libata-scsi.c u32 sect, head, cyl, track; track 1750 drivers/ata/libata-scsi.c track = (u32)block / dev->sectors; track 1751 drivers/ata/libata-scsi.c cyl = track / dev->heads; track 1752 drivers/ata/libata-scsi.c head = track % dev->heads; track 1756 drivers/ata/libata-scsi.c (u32)block, track, cyl, head, sect); track 193 drivers/block/amiflop.c int track; /* current track (-1 == unknown) */ track 406 drivers/block/amiflop.c if (unit[drive].track % 2 != 0) track 553 drivers/block/amiflop.c unit[drive].track = -1; track 558 drivers/block/amiflop.c unit[drive].track = 0; track 566 drivers/block/amiflop.c static int fd_seek(int drive, int track) track 572 drivers/block/amiflop.c printk("seeking drive %d to track %d\n",drive,track); track 576 drivers/block/amiflop.c if (unit[drive].track == track) { track 584 drivers/block/amiflop.c if (unit[drive].track < 0 && !fd_calibrate(drive)) { track 590 drivers/block/amiflop.c cnt = unit[drive].track/2 - track/2; track 593 drivers/block/amiflop.c if (track % 2 != 0) track 600 drivers/block/amiflop.c if (track % 2 != unit[drive].track % 2) track 602 drivers/block/amiflop.c unit[drive].track = track; track 733 drivers/block/amiflop.c if ((ulong)unit[drive].track >= unit[drive].type->precomp2) track 735 drivers/block/amiflop.c else if ((ulong)unit[drive].track >= unit[drive].type->precomp1) track 827 drivers/block/amiflop.c unsigned char track; track 862 drivers/block/amiflop.c hdr.magic, hdr.track, hdr.sect, hdr.ord, track 874 drivers/block/amiflop.c if (hdr.track != unit[drive].track) { track 875 drivers/block/amiflop.c printk(KERN_INFO "MFM_TRACK: %d, %d\n", hdr.track, unit[drive].track); track 885 drivers/block/amiflop.c hdr.magic, hdr.track, hdr.sect, hdr.ord, scnt, track 942 drivers/block/amiflop.c hdr.track = unit[disk].track; track 983 drivers/block/amiflop.c unsigned char track, /* 0-80 */ track 1108 drivers/block/amiflop.c return dos_crc(&(hdr->track), 0xb2, 0x30, 3); /* precomputed magic */ track 1167 drivers/block/amiflop.c unit[drive].track,drive,scnt); track 1179 drivers/block/amiflop.c printk("(%3d,%d,%2d,%d) %x\n", hdr.track, hdr.side, track 1188 drivers/block/amiflop.c if (hdr.track != unit[drive].track/unit[drive].type->heads) { track 1190 drivers/block/amiflop.c hdr.track, track 1191 drivers/block/amiflop.c unit[drive].track/unit[drive].type->heads); track 1195 drivers/block/amiflop.c if (hdr.side != unit[drive].track%unit[drive].type->heads) { track 1198 drivers/block/amiflop.c unit[drive].track%unit[drive].type->heads); track 1213 drivers/block/amiflop.c unit[drive].track, drive, scnt, hdr.sec); track 1223 drivers/block/amiflop.c hdr.track,hdr.side,hdr.sec,hdr.len_desc,scnt); track 1234 drivers/block/amiflop.c "sc=%d, %x %x\n", hdr.track, hdr.side, track 1288 drivers/block/amiflop.c hdr.track=unit[drive].track/unit[drive].type->heads; track 1289 drivers/block/amiflop.c hdr.side=unit[drive].track%unit[drive].type->heads; track 1294 drivers/block/amiflop.c dos_encode_block((ushort *)raw,(unsigned char *) &hdr.track,28); track 1423 drivers/block/amiflop.c static int get_track(int drive, int track) track 1428 drivers/block/amiflop.c if (unit[drive].track == track) track 1442 drivers/block/amiflop.c if (!fd_seek(drive, track)) track 1451 drivers/block/amiflop.c unit[drive].track = -1; track 1462 drivers/block/amiflop.c unsigned int cnt, block, track, sector; track 1472 drivers/block/amiflop.c track = block / (floppy->dtype->sects * floppy->type->sect_mult); track 1477 drivers/block/amiflop.c "0x%08lx\n", track, sector, data); track 1480 drivers/block/amiflop.c if (get_track(drive, track) == -1) track 1583 drivers/block/amiflop.c getprm.track=p->type->tracks; track 1644 drivers/block/amiflop.c unit[drive].track = -1; track 1753 drivers/block/amiflop.c p->track = -1; track 1899 drivers/block/amiflop.c unit[i].track = -1; track 162 drivers/block/ataflop.c int track; /* to be formatted */ track 294 drivers/block/ataflop.c int track; /* current head position or -1 if track 364 drivers/block/ataflop.c #define IS_BUFFERED(drive,side,track) \ track 365 drivers/block/ataflop.c (BufferDrive == (drive) && BufferSide == (side) && BufferTrack == (track)) track 525 drivers/block/ataflop.c FDC_WRITE( FDCREG_TRACK, UD.track ); track 707 drivers/block/ataflop.c SUD.track = -1; track 750 drivers/block/ataflop.c if (!UDT || desc->track >= UDT->blocks/UDT->spt/2 || desc->head >= 2) { track 768 drivers/block/ataflop.c *p++ = desc->track; track 785 drivers/block/ataflop.c ReqTrack = desc->track; track 839 drivers/block/ataflop.c if (UD.track == -1) track 841 drivers/block/ataflop.c else if (UD.track != ReqTrack << UDT->stretch) track 854 drivers/block/ataflop.c if (SUD.track >= 0) { track 886 drivers/block/ataflop.c SUD.track = 0; track 898 drivers/block/ataflop.c if (SUD.track == ReqTrack << SUDT->stretch) { track 933 drivers/block/ataflop.c SUD.track = -1; track 937 drivers/block/ataflop.c SUD.track = ReqTrack << SUDT->stretch; track 958 drivers/block/ataflop.c unsigned int track; track 988 drivers/block/ataflop.c track = FDC_READ( FDCREG_TRACK); track 990 drivers/block/ataflop.c FDC_WRITE( FDCREG_TRACK, track >> SUDT->stretch); track 1123 drivers/block/ataflop.c unsigned int track; track 1129 drivers/block/ataflop.c track = FDC_READ( FDCREG_TRACK); track 1131 drivers/block/ataflop.c FDC_WRITE( FDCREG_TRACK, track << SUDT->stretch); track 1241 drivers/block/ataflop.c unsigned int track; track 1252 drivers/block/ataflop.c track = FDC_READ( FDCREG_TRACK); track 1254 drivers/block/ataflop.c FDC_WRITE(FDCREG_TRACK,track >> SUDT->stretch); track 1355 drivers/block/ataflop.c FDC_WRITE (FDCREG_DATA, SUD.track); track 1596 drivers/block/ataflop.c getprm.track = dtp->blocks/dtp->spt/2; track 1700 drivers/block/ataflop.c if (setprm.track != dtp->blocks/dtp->spt/2 || track 1765 drivers/block/ataflop.c UD.track = 0; track 2027 drivers/block/ataflop.c unit[i].track = -1; track 849 drivers/block/floppy.c if (FDC(drive) == fdc && (mode || UDRS->track != NEED_1_RECAL)) track 850 drivers/block/floppy.c UDRS->track = NEED_2_RECAL; track 1443 drivers/block/floppy.c DRS->track = NEED_2_RECAL; track 1527 drivers/block/floppy.c DRS->track = NEED_2_RECAL; track 1532 drivers/block/floppy.c if (DRS->track >= 0 && DRS->track != ST1 && !blind_seek) { track 1540 drivers/block/floppy.c DRS->track = ST1; track 1568 drivers/block/floppy.c int track; track 1585 drivers/block/floppy.c if (DRS->track <= NEED_1_RECAL) { track 1590 drivers/block/floppy.c (DRS->track <= NO_TRACK || DRS->track == raw_cmd->track)) { track 1593 drivers/block/floppy.c if (raw_cmd->track) track 1594 drivers/block/floppy.c track = raw_cmd->track - 1; track 1601 drivers/block/floppy.c track = 1; track 1605 drivers/block/floppy.c if (raw_cmd->track != DRS->track && track 1607 drivers/block/floppy.c track = raw_cmd->track; track 1617 drivers/block/floppy.c if (output_byte(track) < 0) { track 1630 drivers/block/floppy.c switch (DRS->track) { track 1662 drivers/block/floppy.c DRS->track = NEED_1_RECAL; track 1666 drivers/block/floppy.c DRS->track = ST1; track 2065 drivers/block/floppy.c DRS->track = NEED_2_RECAL; track 2098 drivers/block/floppy.c static void setup_format_params(int track) track 2106 drivers/block/floppy.c unsigned char track, head, sect, size; track 2110 drivers/block/floppy.c raw_cmd->track = track; track 2136 drivers/block/floppy.c n = (track_shift * format_req.track + head_shift * format_req.head) track 2146 drivers/block/floppy.c here[count].track = format_req.track; track 2173 drivers/block/floppy.c setup_format_params(format_req.track << STRETCH(_floppy)); track 2194 drivers/block/floppy.c _floppy->track > DP->tracks || track 2195 drivers/block/floppy.c tmp_format_req->track >= _floppy->track || track 2363 drivers/block/floppy.c buffer_track = raw_cmd->track; track 2555 drivers/block/floppy.c if (_floppy->track && TRACK >= _floppy->track) { track 2589 drivers/block/floppy.c raw_cmd->track = TRACK << STRETCH(_floppy); track 2627 drivers/block/floppy.c if ((raw_cmd->track == buffer_track) && track 2702 drivers/block/floppy.c if (buffer_track != raw_cmd->track || /* bad track */ track 2725 drivers/block/floppy.c buffer_track = raw_cmd->track; track 2936 drivers/block/floppy.c raw_cmd->track = 0; track 3215 drivers/block/floppy.c DRS->track = NO_TRACK; track 3245 drivers/block/floppy.c g->track <= 0 || g->track > UDP->tracks >> STRETCH(g) || track 3384 drivers/block/floppy.c geo->cylinders = g->track; track 3630 drivers/block/floppy.c short track; track 3655 drivers/block/floppy.c unsigned char track[4]; track 3810 drivers/block/floppy.c v.track = UDRS->track; track 3853 drivers/block/floppy.c memcpy(v32.track, v.track, 4); track 4658 drivers/block/floppy.c FDCS->track[unit] = 0; track 1583 drivers/block/pktcdvd.c static int pkt_get_track_info(struct pktcdvd_device *pd, __u16 track, __u8 type, track_information *ti) track 1591 drivers/block/pktcdvd.c cgc.cmd[4] = (track & 0xff00) >> 8; track 1592 drivers/block/pktcdvd.c cgc.cmd[5] = track & 0xff; track 1820 drivers/block/pktcdvd.c int ret, track; track 1842 drivers/block/pktcdvd.c track = 1; /* (di.last_track_msb << 8) | di.last_track_lsb; */ track 1843 drivers/block/pktcdvd.c ret = pkt_get_track_info(pd, track, 1, &ti); track 31 drivers/block/swim.c unsigned char track; track 185 drivers/block/swim.c int track; track 424 drivers/block/swim.c static inline int swim_track(struct floppy_state *fs, int track) track 429 drivers/block/swim.c ret = swim_seek(base, track - fs->track); track 432 drivers/block/swim.c fs->track = track; track 435 drivers/block/swim.c fs->track = 0; track 456 drivers/block/swim.c int side, int track, track 465 drivers/block/swim.c swim_track(fs, track); track 485 drivers/block/swim.c if ((header.side != side) || (header.track != track) || track 498 drivers/block/swim.c int side, track, sector; track 505 drivers/block/swim.c track = i / fs->secpercyl; track 512 drivers/block/swim.c ret = swim_read_sector(fs, side, track, sector, track 603 drivers/block/swim.c fs->track = 0; track 725 drivers/block/swim.c geo->cylinders = g->track; track 2805 drivers/cdrom/cdrom.c __u16 track, __u8 type, track_information *ti) track 2814 drivers/cdrom/cdrom.c cgc.cmd[4] = (track & 0xff00) >> 8; track 2815 drivers/cdrom/cdrom.c cgc.cmd[5] = track & 0xff; track 298 drivers/cdrom/gdrom.c static int get_entry_lba(int track) track 300 drivers/cdrom/gdrom.c return (cpu_to_be32(track & 0xffffff00) - GD_SESSION_OFFSET); track 303 drivers/cdrom/gdrom.c static int get_entry_q_ctrl(int track) track 305 drivers/cdrom/gdrom.c return (track & 0x000000f0) >> 4; track 308 drivers/cdrom/gdrom.c static int get_entry_track(int track) track 310 drivers/cdrom/gdrom.c return (track & 0x0000ff00) >> 8; track 316 drivers/cdrom/gdrom.c int fentry, lentry, track, data, err; track 335 drivers/cdrom/gdrom.c track = get_entry_track(gd.toc->last); track 337 drivers/cdrom/gdrom.c data = gd.toc->entry[track - 1]; track 340 drivers/cdrom/gdrom.c track--; track 341 drivers/cdrom/gdrom.c } while (track >= fentry); track 343 drivers/cdrom/gdrom.c if ((track > 100) || (track < get_entry_track(gd.toc->first))) { track 800 drivers/gpu/drm/i915/gvt/gtt.c struct intel_vgpu_page_track *track; track 802 drivers/gpu/drm/i915/gvt/gtt.c track = intel_vgpu_find_page_track(vgpu, gfn); track 803 drivers/gpu/drm/i915/gvt/gtt.c if (track && track->handler == ppgtt_write_protection_handler) track 804 drivers/gpu/drm/i915/gvt/gtt.c return track->priv_data; track 53 drivers/gpu/drm/i915/gvt/page_track.c struct intel_vgpu_page_track *track; track 56 drivers/gpu/drm/i915/gvt/page_track.c track = intel_vgpu_find_page_track(vgpu, gfn); track 57 drivers/gpu/drm/i915/gvt/page_track.c if (track) track 60 drivers/gpu/drm/i915/gvt/page_track.c track = kzalloc(sizeof(*track), GFP_KERNEL); track 61 drivers/gpu/drm/i915/gvt/page_track.c if (!track) track 64 drivers/gpu/drm/i915/gvt/page_track.c track->handler = handler; track 65 drivers/gpu/drm/i915/gvt/page_track.c track->priv_data = priv; track 67 drivers/gpu/drm/i915/gvt/page_track.c ret = radix_tree_insert(&vgpu->page_track_tree, gfn, track); track 69 drivers/gpu/drm/i915/gvt/page_track.c kfree(track); track 85 drivers/gpu/drm/i915/gvt/page_track.c struct intel_vgpu_page_track *track; track 87 drivers/gpu/drm/i915/gvt/page_track.c track = radix_tree_delete(&vgpu->page_track_tree, gfn); track 88 drivers/gpu/drm/i915/gvt/page_track.c if (track) { track 89 drivers/gpu/drm/i915/gvt/page_track.c if (track->tracked) track 91 drivers/gpu/drm/i915/gvt/page_track.c kfree(track); track 105 drivers/gpu/drm/i915/gvt/page_track.c struct intel_vgpu_page_track *track; track 108 drivers/gpu/drm/i915/gvt/page_track.c track = intel_vgpu_find_page_track(vgpu, gfn); track 109 drivers/gpu/drm/i915/gvt/page_track.c if (!track) track 112 drivers/gpu/drm/i915/gvt/page_track.c if (track->tracked) track 118 drivers/gpu/drm/i915/gvt/page_track.c track->tracked = true; track 132 drivers/gpu/drm/i915/gvt/page_track.c struct intel_vgpu_page_track *track; track 135 drivers/gpu/drm/i915/gvt/page_track.c track = intel_vgpu_find_page_track(vgpu, gfn); track 136 drivers/gpu/drm/i915/gvt/page_track.c if (!track) track 139 drivers/gpu/drm/i915/gvt/page_track.c if (!track->tracked) track 145 drivers/gpu/drm/i915/gvt/page_track.c track->tracked = false; track 118 drivers/gpu/drm/radeon/evergreen_cs.c static void evergreen_cs_track_init(struct evergreen_cs_track *track) track 123 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_fmask_bo[i] = NULL; track 124 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_cmask_bo[i] = NULL; track 125 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_cmask_slice[i] = 0; track 126 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_fmask_slice[i] = 0; track 130 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_bo[i] = NULL; track 131 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_bo_offset[i] = 0xFFFFFFFF; track 132 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_info[i] = 0; track 133 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_view[i] = 0xFFFFFFFF; track 134 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_pitch[i] = 0; track 135 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_slice[i] = 0xfffffff; track 136 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_slice_idx[i] = 0; track 138 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_target_mask = 0xFFFFFFFF; track 139 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_shader_mask = 0xFFFFFFFF; track 140 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 142 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_slice = 0xffffffff; track 143 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_view = 0xFFFFC000; track 144 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_size = 0xFFFFFFFF; track 145 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_control = 0xFFFFFFFF; track 146 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_info = 0xFFFFFFFF; track 147 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_read_offset = 0xFFFFFFFF; track 148 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_write_offset = 0xFFFFFFFF; track 149 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_read_bo = NULL; track 150 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_write_bo = NULL; track 151 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_info = 0xFFFFFFFF; track 152 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_read_offset = 0xFFFFFFFF; track 153 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_write_offset = 0xFFFFFFFF; track 154 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_read_bo = NULL; track 155 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_write_bo = NULL; track 156 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 157 drivers/gpu/drm/radeon/evergreen_cs.c track->htile_bo = NULL; track 158 drivers/gpu/drm/radeon/evergreen_cs.c track->htile_offset = 0xFFFFFFFF; track 159 drivers/gpu/drm/radeon/evergreen_cs.c track->htile_surface = 0; track 162 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_size[i] = 0; track 163 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_bo[i] = NULL; track 164 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF; track 166 drivers/gpu/drm/radeon/evergreen_cs.c track->streamout_dirty = true; track 167 drivers/gpu/drm/radeon/evergreen_cs.c track->sx_misc_kill_all_prims = false; track 205 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 208 drivers/gpu/drm/radeon/evergreen_cs.c palign = MAX(64, track->group_size / surf->bpe); track 210 drivers/gpu/drm/radeon/evergreen_cs.c surf->base_align = track->group_size; track 227 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 230 drivers/gpu/drm/radeon/evergreen_cs.c palign = track->group_size / (8 * surf->bpe * surf->nsamples); track 233 drivers/gpu/drm/radeon/evergreen_cs.c surf->base_align = track->group_size; track 240 drivers/gpu/drm/radeon/evergreen_cs.c track->group_size, surf->bpe, surf->nsamples); track 258 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 269 drivers/gpu/drm/radeon/evergreen_cs.c palign = (8 * surf->bankw * track->npipes) * surf->mtilea; track 396 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 402 drivers/gpu/drm/radeon/evergreen_cs.c mslice = G_028C6C_SLICE_MAX(track->cb_color_view[id]) + 1; track 403 drivers/gpu/drm/radeon/evergreen_cs.c pitch = track->cb_color_pitch[id]; track 404 drivers/gpu/drm/radeon/evergreen_cs.c slice = track->cb_color_slice[id]; track 407 drivers/gpu/drm/radeon/evergreen_cs.c surf.mode = G_028C70_ARRAY_MODE(track->cb_color_info[id]); track 408 drivers/gpu/drm/radeon/evergreen_cs.c surf.format = G_028C70_FORMAT(track->cb_color_info[id]); track 409 drivers/gpu/drm/radeon/evergreen_cs.c surf.tsplit = G_028C74_TILE_SPLIT(track->cb_color_attrib[id]); track 410 drivers/gpu/drm/radeon/evergreen_cs.c surf.nbanks = G_028C74_NUM_BANKS(track->cb_color_attrib[id]); track 411 drivers/gpu/drm/radeon/evergreen_cs.c surf.bankw = G_028C74_BANK_WIDTH(track->cb_color_attrib[id]); track 412 drivers/gpu/drm/radeon/evergreen_cs.c surf.bankh = G_028C74_BANK_HEIGHT(track->cb_color_attrib[id]); track 413 drivers/gpu/drm/radeon/evergreen_cs.c surf.mtilea = G_028C74_MACRO_TILE_ASPECT(track->cb_color_attrib[id]); track 419 drivers/gpu/drm/radeon/evergreen_cs.c id, track->cb_color_info[id]); track 431 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, id, track->cb_color_pitch[id], track 432 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_slice[id], track->cb_color_attrib[id], track 433 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_info[id]); track 437 drivers/gpu/drm/radeon/evergreen_cs.c offset = track->cb_color_bo_offset[id] << 8; track 445 drivers/gpu/drm/radeon/evergreen_cs.c if (offset > radeon_bo_size(track->cb_color_bo[id])) { track 458 drivers/gpu/drm/radeon/evergreen_cs.c bsize = radeon_bo_size(track->cb_color_bo[id]); track 459 drivers/gpu/drm/radeon/evergreen_cs.c tmp = track->cb_color_bo_offset[id] << 8; track 473 drivers/gpu/drm/radeon/evergreen_cs.c ib[track->cb_color_slice_idx[id]] = slice; track 482 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_bo_offset[id] << 8, mslice, track 483 drivers/gpu/drm/radeon/evergreen_cs.c radeon_bo_size(track->cb_color_bo[id]), slice); track 499 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 502 drivers/gpu/drm/radeon/evergreen_cs.c if (track->htile_bo == NULL) { track 504 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, track->db_z_info); track 508 drivers/gpu/drm/radeon/evergreen_cs.c if (G_028ABC_LINEAR(track->htile_surface)) { track 512 drivers/gpu/drm/radeon/evergreen_cs.c nby = round_up(nby, track->npipes * 8); track 518 drivers/gpu/drm/radeon/evergreen_cs.c switch (track->npipes) { track 541 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, track->npipes); track 549 drivers/gpu/drm/radeon/evergreen_cs.c size = roundup(nbx * nby * 4, track->npipes * (2 << 10)); track 550 drivers/gpu/drm/radeon/evergreen_cs.c size += track->htile_offset; track 552 drivers/gpu/drm/radeon/evergreen_cs.c if (size > radeon_bo_size(track->htile_bo)) { track 554 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, radeon_bo_size(track->htile_bo), track 563 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 569 drivers/gpu/drm/radeon/evergreen_cs.c mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1; track 570 drivers/gpu/drm/radeon/evergreen_cs.c pitch = G_028058_PITCH_TILE_MAX(track->db_depth_size); track 571 drivers/gpu/drm/radeon/evergreen_cs.c slice = track->db_depth_slice; track 574 drivers/gpu/drm/radeon/evergreen_cs.c surf.mode = G_028040_ARRAY_MODE(track->db_z_info); track 575 drivers/gpu/drm/radeon/evergreen_cs.c surf.format = G_028044_FORMAT(track->db_s_info); track 576 drivers/gpu/drm/radeon/evergreen_cs.c surf.tsplit = G_028044_TILE_SPLIT(track->db_s_info); track 577 drivers/gpu/drm/radeon/evergreen_cs.c surf.nbanks = G_028040_NUM_BANKS(track->db_z_info); track 578 drivers/gpu/drm/radeon/evergreen_cs.c surf.bankw = G_028040_BANK_WIDTH(track->db_z_info); track 579 drivers/gpu/drm/radeon/evergreen_cs.c surf.bankh = G_028040_BANK_HEIGHT(track->db_z_info); track 580 drivers/gpu/drm/radeon/evergreen_cs.c surf.mtilea = G_028040_MACRO_TILE_ASPECT(track->db_z_info); track 606 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, track->db_depth_size, track 607 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_slice, track->db_s_info, track->db_z_info); track 612 drivers/gpu/drm/radeon/evergreen_cs.c offset = track->db_s_read_offset << 8; track 619 drivers/gpu/drm/radeon/evergreen_cs.c if (offset > radeon_bo_size(track->db_s_read_bo)) { track 623 drivers/gpu/drm/radeon/evergreen_cs.c (unsigned long)track->db_s_read_offset << 8, mslice, track 624 drivers/gpu/drm/radeon/evergreen_cs.c radeon_bo_size(track->db_s_read_bo)); track 626 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, track->db_depth_size, track 627 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_slice, track->db_s_info, track->db_z_info); track 631 drivers/gpu/drm/radeon/evergreen_cs.c offset = track->db_s_write_offset << 8; track 638 drivers/gpu/drm/radeon/evergreen_cs.c if (offset > radeon_bo_size(track->db_s_write_bo)) { track 642 drivers/gpu/drm/radeon/evergreen_cs.c (unsigned long)track->db_s_write_offset << 8, mslice, track 643 drivers/gpu/drm/radeon/evergreen_cs.c radeon_bo_size(track->db_s_write_bo)); track 648 drivers/gpu/drm/radeon/evergreen_cs.c if (G_028040_TILE_SURFACE_ENABLE(track->db_z_info)) { track 660 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 666 drivers/gpu/drm/radeon/evergreen_cs.c mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1; track 667 drivers/gpu/drm/radeon/evergreen_cs.c pitch = G_028058_PITCH_TILE_MAX(track->db_depth_size); track 668 drivers/gpu/drm/radeon/evergreen_cs.c slice = track->db_depth_slice; track 671 drivers/gpu/drm/radeon/evergreen_cs.c surf.mode = G_028040_ARRAY_MODE(track->db_z_info); track 672 drivers/gpu/drm/radeon/evergreen_cs.c surf.format = G_028040_FORMAT(track->db_z_info); track 673 drivers/gpu/drm/radeon/evergreen_cs.c surf.tsplit = G_028040_TILE_SPLIT(track->db_z_info); track 674 drivers/gpu/drm/radeon/evergreen_cs.c surf.nbanks = G_028040_NUM_BANKS(track->db_z_info); track 675 drivers/gpu/drm/radeon/evergreen_cs.c surf.bankw = G_028040_BANK_WIDTH(track->db_z_info); track 676 drivers/gpu/drm/radeon/evergreen_cs.c surf.bankh = G_028040_BANK_HEIGHT(track->db_z_info); track 677 drivers/gpu/drm/radeon/evergreen_cs.c surf.mtilea = G_028040_MACRO_TILE_ASPECT(track->db_z_info); track 697 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, track->db_depth_size, track 698 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_slice, track->db_z_info); track 705 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, track->db_depth_size, track 706 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_slice, track->db_z_info); track 710 drivers/gpu/drm/radeon/evergreen_cs.c offset = track->db_z_read_offset << 8; track 717 drivers/gpu/drm/radeon/evergreen_cs.c if (offset > radeon_bo_size(track->db_z_read_bo)) { track 721 drivers/gpu/drm/radeon/evergreen_cs.c (unsigned long)track->db_z_read_offset << 8, mslice, track 722 drivers/gpu/drm/radeon/evergreen_cs.c radeon_bo_size(track->db_z_read_bo)); track 726 drivers/gpu/drm/radeon/evergreen_cs.c offset = track->db_z_write_offset << 8; track 733 drivers/gpu/drm/radeon/evergreen_cs.c if (offset > radeon_bo_size(track->db_z_write_bo)) { track 737 drivers/gpu/drm/radeon/evergreen_cs.c (unsigned long)track->db_z_write_offset << 8, mslice, track 738 drivers/gpu/drm/radeon/evergreen_cs.c radeon_bo_size(track->db_z_write_bo)); track 743 drivers/gpu/drm/radeon/evergreen_cs.c if (G_028040_TILE_SURFACE_ENABLE(track->db_z_info)) { track 934 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 940 drivers/gpu/drm/radeon/evergreen_cs.c if (track->streamout_dirty && track->vgt_strmout_config) { track 942 drivers/gpu/drm/radeon/evergreen_cs.c if (track->vgt_strmout_config & (1 << i)) { track 943 drivers/gpu/drm/radeon/evergreen_cs.c buffer_mask |= (track->vgt_strmout_buffer_config >> (i * 4)) & 0xf; track 949 drivers/gpu/drm/radeon/evergreen_cs.c if (track->vgt_strmout_bo[i]) { track 950 drivers/gpu/drm/radeon/evergreen_cs.c u64 offset = (u64)track->vgt_strmout_bo_offset[i] + track 951 drivers/gpu/drm/radeon/evergreen_cs.c (u64)track->vgt_strmout_size[i]; track 952 drivers/gpu/drm/radeon/evergreen_cs.c if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) { track 955 drivers/gpu/drm/radeon/evergreen_cs.c radeon_bo_size(track->vgt_strmout_bo[i])); track 964 drivers/gpu/drm/radeon/evergreen_cs.c track->streamout_dirty = false; track 967 drivers/gpu/drm/radeon/evergreen_cs.c if (track->sx_misc_kill_all_prims) track 972 drivers/gpu/drm/radeon/evergreen_cs.c if (track->cb_dirty) { track 973 drivers/gpu/drm/radeon/evergreen_cs.c tmp = track->cb_target_mask; track 975 drivers/gpu/drm/radeon/evergreen_cs.c u32 format = G_028C70_FORMAT(track->cb_color_info[i]); track 980 drivers/gpu/drm/radeon/evergreen_cs.c if (track->cb_color_bo[i] == NULL) { track 982 drivers/gpu/drm/radeon/evergreen_cs.c __func__, __LINE__, track->cb_target_mask, track->cb_shader_mask, i); track 992 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = false; track 995 drivers/gpu/drm/radeon/evergreen_cs.c if (track->db_dirty) { track 997 drivers/gpu/drm/radeon/evergreen_cs.c if (G_028044_FORMAT(track->db_s_info) != V_028044_STENCIL_INVALID && track 998 drivers/gpu/drm/radeon/evergreen_cs.c G_028800_STENCIL_ENABLE(track->db_depth_control)) { track 1004 drivers/gpu/drm/radeon/evergreen_cs.c if (G_028040_FORMAT(track->db_z_info) != V_028040_Z_INVALID && track 1005 drivers/gpu/drm/radeon/evergreen_cs.c G_028800_Z_ENABLE(track->db_depth_control)) { track 1010 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = false; track 1096 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track; track 1152 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_control = radeon_get_ib_value(p, idx); track 1153 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1170 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_info = radeon_get_ib_value(p, idx); track 1179 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_info &= ~Z_ARRAY_MODE(0xf); track 1181 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_info |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); track 1188 drivers/gpu/drm/radeon/evergreen_cs.c ib[idx] |= DB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks)); track 1195 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1198 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_info = radeon_get_ib_value(p, idx); track 1199 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1202 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_view = radeon_get_ib_value(p, idx); track 1203 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1206 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_size = radeon_get_ib_value(p, idx); track 1207 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1210 drivers/gpu/drm/radeon/evergreen_cs.c track->db_depth_slice = radeon_get_ib_value(p, idx); track 1211 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1220 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_read_offset = radeon_get_ib_value(p, idx); track 1222 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_read_bo = reloc->robj; track 1223 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1232 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_write_offset = radeon_get_ib_value(p, idx); track 1234 drivers/gpu/drm/radeon/evergreen_cs.c track->db_z_write_bo = reloc->robj; track 1235 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1244 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_read_offset = radeon_get_ib_value(p, idx); track 1246 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_read_bo = reloc->robj; track 1247 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1256 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_write_offset = radeon_get_ib_value(p, idx); track 1258 drivers/gpu/drm/radeon/evergreen_cs.c track->db_s_write_bo = reloc->robj; track 1259 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1262 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_config = radeon_get_ib_value(p, idx); track 1263 drivers/gpu/drm/radeon/evergreen_cs.c track->streamout_dirty = true; track 1266 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_buffer_config = radeon_get_ib_value(p, idx); track 1267 drivers/gpu/drm/radeon/evergreen_cs.c track->streamout_dirty = true; track 1280 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8; track 1282 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_bo[tmp] = reloc->robj; track 1283 drivers/gpu/drm/radeon/evergreen_cs.c track->streamout_dirty = true; track 1291 drivers/gpu/drm/radeon/evergreen_cs.c track->vgt_strmout_size[tmp] = radeon_get_ib_value(p, idx) * 4; track 1292 drivers/gpu/drm/radeon/evergreen_cs.c track->streamout_dirty = true; track 1304 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_target_mask = radeon_get_ib_value(p, idx); track 1305 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1308 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_shader_mask = radeon_get_ib_value(p, idx); track 1309 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1318 drivers/gpu/drm/radeon/evergreen_cs.c track->nsamples = 1 << tmp; track 1327 drivers/gpu/drm/radeon/evergreen_cs.c track->nsamples = 1 << tmp; track 1338 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_view[tmp] = radeon_get_ib_value(p, idx); track 1339 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1346 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_view[tmp] = radeon_get_ib_value(p, idx); track 1347 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1358 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_info[tmp] = radeon_get_ib_value(p, idx); track 1367 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); track 1369 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1376 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_info[tmp] = radeon_get_ib_value(p, idx); track 1385 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); track 1387 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1398 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_pitch[tmp] = radeon_get_ib_value(p, idx); track 1399 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1406 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_pitch[tmp] = radeon_get_ib_value(p, idx); track 1407 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1418 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_slice[tmp] = radeon_get_ib_value(p, idx); track 1419 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_slice_idx[tmp] = idx; track 1420 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1427 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_slice[tmp] = radeon_get_ib_value(p, idx); track 1428 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_slice_idx[tmp] = idx; track 1429 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1452 drivers/gpu/drm/radeon/evergreen_cs.c ib[idx] |= CB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks)); track 1460 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_attrib[tmp] = ib[idx]; track 1461 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1480 drivers/gpu/drm/radeon/evergreen_cs.c ib[idx] |= CB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks)); track 1488 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_attrib[tmp] = ib[idx]; track 1489 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1506 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_fmask_bo[tmp] = reloc->robj; track 1523 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_cmask_bo[tmp] = reloc->robj; track 1534 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_fmask_slice[tmp] = radeon_get_ib_value(p, idx); track 1545 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_cmask_slice[tmp] = radeon_get_ib_value(p, idx); track 1562 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx); track 1564 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_bo[tmp] = reloc->robj; track 1565 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1578 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx); track 1580 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_color_bo[tmp] = reloc->robj; track 1581 drivers/gpu/drm/radeon/evergreen_cs.c track->cb_dirty = true; track 1590 drivers/gpu/drm/radeon/evergreen_cs.c track->htile_offset = radeon_get_ib_value(p, idx); track 1592 drivers/gpu/drm/radeon/evergreen_cs.c track->htile_bo = reloc->robj; track 1593 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1597 drivers/gpu/drm/radeon/evergreen_cs.c track->htile_surface = radeon_get_ib_value(p, idx); track 1600 drivers/gpu/drm/radeon/evergreen_cs.c track->db_dirty = true; track 1739 drivers/gpu/drm/radeon/evergreen_cs.c track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0; track 1758 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track = p->track; track 1766 drivers/gpu/drm/radeon/evergreen_cs.c if (!(track->reg_safe_bm[i] & m)) track 1776 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track; track 1784 drivers/gpu/drm/radeon/evergreen_cs.c track = (struct evergreen_cs_track *)p->track; track 2023 drivers/gpu/drm/radeon/evergreen_cs.c track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj); track 2045 drivers/gpu/drm/radeon/evergreen_cs.c if (idx_value + size > track->indirect_draw_buffer_size) { track 2047 drivers/gpu/drm/radeon/evergreen_cs.c idx_value, size, track->indirect_draw_buffer_size); track 2374 drivers/gpu/drm/radeon/evergreen_cs.c TEX_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks)); track 2675 drivers/gpu/drm/radeon/evergreen_cs.c struct evergreen_cs_track *track; track 2679 drivers/gpu/drm/radeon/evergreen_cs.c if (p->track == NULL) { track 2681 drivers/gpu/drm/radeon/evergreen_cs.c track = kzalloc(sizeof(*track), GFP_KERNEL); track 2682 drivers/gpu/drm/radeon/evergreen_cs.c if (track == NULL) track 2684 drivers/gpu/drm/radeon/evergreen_cs.c evergreen_cs_track_init(track); track 2687 drivers/gpu/drm/radeon/evergreen_cs.c track->reg_safe_bm = cayman_reg_safe_bm; track 2690 drivers/gpu/drm/radeon/evergreen_cs.c track->reg_safe_bm = evergreen_reg_safe_bm; track 2696 drivers/gpu/drm/radeon/evergreen_cs.c track->npipes = 1; track 2700 drivers/gpu/drm/radeon/evergreen_cs.c track->npipes = 2; track 2703 drivers/gpu/drm/radeon/evergreen_cs.c track->npipes = 4; track 2706 drivers/gpu/drm/radeon/evergreen_cs.c track->npipes = 8; track 2712 drivers/gpu/drm/radeon/evergreen_cs.c track->nbanks = 4; track 2716 drivers/gpu/drm/radeon/evergreen_cs.c track->nbanks = 8; track 2719 drivers/gpu/drm/radeon/evergreen_cs.c track->nbanks = 16; track 2725 drivers/gpu/drm/radeon/evergreen_cs.c track->group_size = 256; track 2729 drivers/gpu/drm/radeon/evergreen_cs.c track->group_size = 512; track 2735 drivers/gpu/drm/radeon/evergreen_cs.c track->row_size = 1; track 2739 drivers/gpu/drm/radeon/evergreen_cs.c track->row_size = 2; track 2742 drivers/gpu/drm/radeon/evergreen_cs.c track->row_size = 4; track 2746 drivers/gpu/drm/radeon/evergreen_cs.c p->track = track; track 2751 drivers/gpu/drm/radeon/evergreen_cs.c kfree(p->track); track 2752 drivers/gpu/drm/radeon/evergreen_cs.c p->track = NULL; track 2767 drivers/gpu/drm/radeon/evergreen_cs.c kfree(p->track); track 2768 drivers/gpu/drm/radeon/evergreen_cs.c p->track = NULL; track 2772 drivers/gpu/drm/radeon/evergreen_cs.c kfree(p->track); track 2773 drivers/gpu/drm/radeon/evergreen_cs.c p->track = NULL; track 2783 drivers/gpu/drm/radeon/evergreen_cs.c kfree(p->track); track 2784 drivers/gpu/drm/radeon/evergreen_cs.c p->track = NULL; track 1307 drivers/gpu/drm/radeon/r100.c struct r100_cs_track *track; track 1313 drivers/gpu/drm/radeon/r100.c track = (struct r100_cs_track *)p->track; track 1321 drivers/gpu/drm/radeon/r100.c track->num_arrays = c; track 1333 drivers/gpu/drm/radeon/r100.c track->arrays[i + 0].esize = idx_value >> 8; track 1334 drivers/gpu/drm/radeon/r100.c track->arrays[i + 0].robj = reloc->robj; track 1335 drivers/gpu/drm/radeon/r100.c track->arrays[i + 0].esize &= 0x7F; track 1344 drivers/gpu/drm/radeon/r100.c track->arrays[i + 1].robj = reloc->robj; track 1345 drivers/gpu/drm/radeon/r100.c track->arrays[i + 1].esize = idx_value >> 24; track 1346 drivers/gpu/drm/radeon/r100.c track->arrays[i + 1].esize &= 0x7F; track 1358 drivers/gpu/drm/radeon/r100.c track->arrays[i + 0].robj = reloc->robj; track 1359 drivers/gpu/drm/radeon/r100.c track->arrays[i + 0].esize = idx_value >> 8; track 1360 drivers/gpu/drm/radeon/r100.c track->arrays[i + 0].esize &= 0x7F; track 1556 drivers/gpu/drm/radeon/r100.c struct r100_cs_track *track; track 1565 drivers/gpu/drm/radeon/r100.c track = (struct r100_cs_track *)p->track; track 1595 drivers/gpu/drm/radeon/r100.c track->zb.robj = reloc->robj; track 1596 drivers/gpu/drm/radeon/r100.c track->zb.offset = idx_value; track 1597 drivers/gpu/drm/radeon/r100.c track->zb_dirty = true; track 1608 drivers/gpu/drm/radeon/r100.c track->cb[0].robj = reloc->robj; track 1609 drivers/gpu/drm/radeon/r100.c track->cb[0].offset = idx_value; track 1610 drivers/gpu/drm/radeon/r100.c track->cb_dirty = true; track 1635 drivers/gpu/drm/radeon/r100.c track->textures[i].robj = reloc->robj; track 1636 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1651 drivers/gpu/drm/radeon/r100.c track->textures[0].cube_info[i].offset = idx_value; track 1653 drivers/gpu/drm/radeon/r100.c track->textures[0].cube_info[i].robj = reloc->robj; track 1654 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1669 drivers/gpu/drm/radeon/r100.c track->textures[1].cube_info[i].offset = idx_value; track 1671 drivers/gpu/drm/radeon/r100.c track->textures[1].cube_info[i].robj = reloc->robj; track 1672 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1687 drivers/gpu/drm/radeon/r100.c track->textures[2].cube_info[i].offset = idx_value; track 1689 drivers/gpu/drm/radeon/r100.c track->textures[2].cube_info[i].robj = reloc->robj; track 1690 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1693 drivers/gpu/drm/radeon/r100.c track->maxy = ((idx_value >> 16) & 0x7FF); track 1694 drivers/gpu/drm/radeon/r100.c track->cb_dirty = true; track 1695 drivers/gpu/drm/radeon/r100.c track->zb_dirty = true; track 1717 drivers/gpu/drm/radeon/r100.c track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK; track 1718 drivers/gpu/drm/radeon/r100.c track->cb_dirty = true; track 1721 drivers/gpu/drm/radeon/r100.c track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK; track 1722 drivers/gpu/drm/radeon/r100.c track->zb_dirty = true; track 1731 drivers/gpu/drm/radeon/r100.c track->cb[0].cpp = 1; track 1736 drivers/gpu/drm/radeon/r100.c track->cb[0].cpp = 2; track 1739 drivers/gpu/drm/radeon/r100.c track->cb[0].cpp = 4; track 1746 drivers/gpu/drm/radeon/r100.c track->z_enabled = !!(idx_value & RADEON_Z_ENABLE); track 1747 drivers/gpu/drm/radeon/r100.c track->cb_dirty = true; track 1748 drivers/gpu/drm/radeon/r100.c track->zb_dirty = true; track 1753 drivers/gpu/drm/radeon/r100.c track->zb.cpp = 2; track 1761 drivers/gpu/drm/radeon/r100.c track->zb.cpp = 4; track 1766 drivers/gpu/drm/radeon/r100.c track->zb_dirty = true; track 1781 drivers/gpu/drm/radeon/r100.c for (i = 0; i < track->num_texture; i++) track 1782 drivers/gpu/drm/radeon/r100.c track->textures[i].enabled = !!(temp & (1 << i)); track 1783 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1787 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = idx_value; track 1790 drivers/gpu/drm/radeon/r100.c track->vtx_size = r100_get_vtx_size(idx_value); track 1796 drivers/gpu/drm/radeon/r100.c track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1; track 1797 drivers/gpu/drm/radeon/r100.c track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1; track 1798 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1804 drivers/gpu/drm/radeon/r100.c track->textures[i].pitch = idx_value + 32; track 1805 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1811 drivers/gpu/drm/radeon/r100.c track->textures[i].num_levels = ((idx_value & RADEON_MAX_MIP_LEVEL_MASK) track 1815 drivers/gpu/drm/radeon/r100.c track->textures[i].roundup_w = false; track 1818 drivers/gpu/drm/radeon/r100.c track->textures[i].roundup_h = false; track 1819 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1826 drivers/gpu/drm/radeon/r100.c track->textures[i].use_pitch = 1; track 1828 drivers/gpu/drm/radeon/r100.c track->textures[i].use_pitch = 0; track 1829 drivers/gpu/drm/radeon/r100.c track->textures[i].width = 1 << ((idx_value & RADEON_TXFORMAT_WIDTH_MASK) >> RADEON_TXFORMAT_WIDTH_SHIFT); track 1830 drivers/gpu/drm/radeon/r100.c track->textures[i].height = 1 << ((idx_value & RADEON_TXFORMAT_HEIGHT_MASK) >> RADEON_TXFORMAT_HEIGHT_SHIFT); track 1833 drivers/gpu/drm/radeon/r100.c track->textures[i].tex_coord_type = 2; track 1838 drivers/gpu/drm/radeon/r100.c track->textures[i].cpp = 1; track 1839 drivers/gpu/drm/radeon/r100.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 1850 drivers/gpu/drm/radeon/r100.c track->textures[i].cpp = 2; track 1851 drivers/gpu/drm/radeon/r100.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 1857 drivers/gpu/drm/radeon/r100.c track->textures[i].cpp = 4; track 1858 drivers/gpu/drm/radeon/r100.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 1861 drivers/gpu/drm/radeon/r100.c track->textures[i].cpp = 1; track 1862 drivers/gpu/drm/radeon/r100.c track->textures[i].compress_format = R100_TRACK_COMP_DXT1; track 1866 drivers/gpu/drm/radeon/r100.c track->textures[i].cpp = 1; track 1867 drivers/gpu/drm/radeon/r100.c track->textures[i].compress_format = R100_TRACK_COMP_DXT35; track 1870 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); track 1871 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); track 1872 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1880 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf); track 1881 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf); track 1883 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 1914 drivers/gpu/drm/radeon/r100.c struct r100_cs_track *track; track 1921 drivers/gpu/drm/radeon/r100.c track = (struct r100_cs_track *)p->track; track 1950 drivers/gpu/drm/radeon/r100.c track->num_arrays = 1; track 1951 drivers/gpu/drm/radeon/r100.c track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 2)); track 1953 drivers/gpu/drm/radeon/r100.c track->arrays[0].robj = reloc->robj; track 1954 drivers/gpu/drm/radeon/r100.c track->arrays[0].esize = track->vtx_size; track 1956 drivers/gpu/drm/radeon/r100.c track->max_indx = radeon_get_ib_value(p, idx+1); track 1958 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = radeon_get_ib_value(p, idx+3); track 1959 drivers/gpu/drm/radeon/r100.c track->immd_dwords = pkt->count - 1; track 1960 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); track 1969 drivers/gpu/drm/radeon/r100.c track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 0)); track 1970 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); track 1971 drivers/gpu/drm/radeon/r100.c track->immd_dwords = pkt->count - 1; track 1972 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); track 1982 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = radeon_get_ib_value(p, idx); track 1983 drivers/gpu/drm/radeon/r100.c track->immd_dwords = pkt->count; track 1984 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); track 1990 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = radeon_get_ib_value(p, idx); track 1991 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); track 1997 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = radeon_get_ib_value(p, idx); track 1998 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); track 2004 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); track 2005 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); track 2011 drivers/gpu/drm/radeon/r100.c track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); track 2012 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); track 2034 drivers/gpu/drm/radeon/r100.c struct r100_cs_track *track; track 2037 drivers/gpu/drm/radeon/r100.c track = kzalloc(sizeof(*track), GFP_KERNEL); track 2038 drivers/gpu/drm/radeon/r100.c if (!track) track 2040 drivers/gpu/drm/radeon/r100.c r100_cs_track_clear(p->rdev, track); track 2041 drivers/gpu/drm/radeon/r100.c p->track = track; track 2125 drivers/gpu/drm/radeon/r100.c struct r100_cs_track *track, unsigned idx) track 2130 drivers/gpu/drm/radeon/r100.c unsigned compress_format = track->textures[idx].compress_format; track 2133 drivers/gpu/drm/radeon/r100.c cube_robj = track->textures[idx].cube_info[face].robj; track 2134 drivers/gpu/drm/radeon/r100.c w = track->textures[idx].cube_info[face].width; track 2135 drivers/gpu/drm/radeon/r100.c h = track->textures[idx].cube_info[face].height; track 2141 drivers/gpu/drm/radeon/r100.c size *= track->textures[idx].cpp; track 2143 drivers/gpu/drm/radeon/r100.c size += track->textures[idx].cube_info[face].offset; track 2148 drivers/gpu/drm/radeon/r100.c r100_cs_track_texture_print(&track->textures[idx]); track 2156 drivers/gpu/drm/radeon/r100.c struct r100_cs_track *track) track 2163 drivers/gpu/drm/radeon/r100.c for (u = 0; u < track->num_texture; u++) { track 2164 drivers/gpu/drm/radeon/r100.c if (!track->textures[u].enabled) track 2166 drivers/gpu/drm/radeon/r100.c if (track->textures[u].lookup_disable) track 2168 drivers/gpu/drm/radeon/r100.c robj = track->textures[u].robj; track 2174 drivers/gpu/drm/radeon/r100.c for (i = 0; i <= track->textures[u].num_levels; i++) { track 2175 drivers/gpu/drm/radeon/r100.c if (track->textures[u].use_pitch) { track 2177 drivers/gpu/drm/radeon/r100.c w = (track->textures[u].pitch / track->textures[u].cpp) / (1 << i); track 2179 drivers/gpu/drm/radeon/r100.c w = track->textures[u].pitch / (1 << i); track 2181 drivers/gpu/drm/radeon/r100.c w = track->textures[u].width; track 2183 drivers/gpu/drm/radeon/r100.c w |= track->textures[u].width_11; track 2185 drivers/gpu/drm/radeon/r100.c if (track->textures[u].roundup_w) track 2188 drivers/gpu/drm/radeon/r100.c h = track->textures[u].height; track 2190 drivers/gpu/drm/radeon/r100.c h |= track->textures[u].height_11; track 2192 drivers/gpu/drm/radeon/r100.c if (track->textures[u].roundup_h) track 2194 drivers/gpu/drm/radeon/r100.c if (track->textures[u].tex_coord_type == 1) { track 2195 drivers/gpu/drm/radeon/r100.c d = (1 << track->textures[u].txdepth) / (1 << i); track 2201 drivers/gpu/drm/radeon/r100.c if (track->textures[u].compress_format) { track 2203 drivers/gpu/drm/radeon/r100.c size += r100_track_compress_size(track->textures[u].compress_format, w, h) * d; track 2208 drivers/gpu/drm/radeon/r100.c size *= track->textures[u].cpp; track 2210 drivers/gpu/drm/radeon/r100.c switch (track->textures[u].tex_coord_type) { track 2215 drivers/gpu/drm/radeon/r100.c if (track->separate_cube) { track 2216 drivers/gpu/drm/radeon/r100.c ret = r100_cs_track_cube(rdev, track, u); track 2224 drivers/gpu/drm/radeon/r100.c "%u\n", track->textures[u].tex_coord_type, u); track 2230 drivers/gpu/drm/radeon/r100.c r100_cs_track_texture_print(&track->textures[u]); track 2237 drivers/gpu/drm/radeon/r100.c int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) track 2243 drivers/gpu/drm/radeon/r100.c unsigned num_cb = track->cb_dirty ? track->num_cb : 0; track 2245 drivers/gpu/drm/radeon/r100.c if (num_cb && !track->zb_cb_clear && !track->color_channel_mask && track 2246 drivers/gpu/drm/radeon/r100.c !track->blend_read_enable) track 2250 drivers/gpu/drm/radeon/r100.c if (track->cb[i].robj == NULL) { track 2254 drivers/gpu/drm/radeon/r100.c size = track->cb[i].pitch * track->cb[i].cpp * track->maxy; track 2255 drivers/gpu/drm/radeon/r100.c size += track->cb[i].offset; track 2256 drivers/gpu/drm/radeon/r100.c if (size > radeon_bo_size(track->cb[i].robj)) { track 2259 drivers/gpu/drm/radeon/r100.c radeon_bo_size(track->cb[i].robj)); track 2261 drivers/gpu/drm/radeon/r100.c i, track->cb[i].pitch, track->cb[i].cpp, track 2262 drivers/gpu/drm/radeon/r100.c track->cb[i].offset, track->maxy); track 2266 drivers/gpu/drm/radeon/r100.c track->cb_dirty = false; track 2268 drivers/gpu/drm/radeon/r100.c if (track->zb_dirty && track->z_enabled) { track 2269 drivers/gpu/drm/radeon/r100.c if (track->zb.robj == NULL) { track 2273 drivers/gpu/drm/radeon/r100.c size = track->zb.pitch * track->zb.cpp * track->maxy; track 2274 drivers/gpu/drm/radeon/r100.c size += track->zb.offset; track 2275 drivers/gpu/drm/radeon/r100.c if (size > radeon_bo_size(track->zb.robj)) { track 2278 drivers/gpu/drm/radeon/r100.c radeon_bo_size(track->zb.robj)); track 2280 drivers/gpu/drm/radeon/r100.c track->zb.pitch, track->zb.cpp, track 2281 drivers/gpu/drm/radeon/r100.c track->zb.offset, track->maxy); track 2285 drivers/gpu/drm/radeon/r100.c track->zb_dirty = false; track 2287 drivers/gpu/drm/radeon/r100.c if (track->aa_dirty && track->aaresolve) { track 2288 drivers/gpu/drm/radeon/r100.c if (track->aa.robj == NULL) { track 2293 drivers/gpu/drm/radeon/r100.c size = track->aa.pitch * track->cb[0].cpp * track->maxy; track 2294 drivers/gpu/drm/radeon/r100.c size += track->aa.offset; track 2295 drivers/gpu/drm/radeon/r100.c if (size > radeon_bo_size(track->aa.robj)) { track 2298 drivers/gpu/drm/radeon/r100.c radeon_bo_size(track->aa.robj)); track 2300 drivers/gpu/drm/radeon/r100.c i, track->aa.pitch, track->cb[0].cpp, track 2301 drivers/gpu/drm/radeon/r100.c track->aa.offset, track->maxy); track 2305 drivers/gpu/drm/radeon/r100.c track->aa_dirty = false; track 2307 drivers/gpu/drm/radeon/r100.c prim_walk = (track->vap_vf_cntl >> 4) & 0x3; track 2308 drivers/gpu/drm/radeon/r100.c if (track->vap_vf_cntl & (1 << 14)) { track 2309 drivers/gpu/drm/radeon/r100.c nverts = track->vap_alt_nverts; track 2311 drivers/gpu/drm/radeon/r100.c nverts = (track->vap_vf_cntl >> 16) & 0xFFFF; track 2315 drivers/gpu/drm/radeon/r100.c for (i = 0; i < track->num_arrays; i++) { track 2316 drivers/gpu/drm/radeon/r100.c size = track->arrays[i].esize * track->max_indx * 4; track 2317 drivers/gpu/drm/radeon/r100.c if (track->arrays[i].robj == NULL) { track 2322 drivers/gpu/drm/radeon/r100.c if (size > radeon_bo_size(track->arrays[i].robj)) { track 2326 drivers/gpu/drm/radeon/r100.c radeon_bo_size(track->arrays[i].robj) track 2328 drivers/gpu/drm/radeon/r100.c DRM_ERROR("Max indices %u\n", track->max_indx); track 2334 drivers/gpu/drm/radeon/r100.c for (i = 0; i < track->num_arrays; i++) { track 2335 drivers/gpu/drm/radeon/r100.c size = track->arrays[i].esize * (nverts - 1) * 4; track 2336 drivers/gpu/drm/radeon/r100.c if (track->arrays[i].robj == NULL) { track 2341 drivers/gpu/drm/radeon/r100.c if (size > radeon_bo_size(track->arrays[i].robj)) { track 2345 drivers/gpu/drm/radeon/r100.c radeon_bo_size(track->arrays[i].robj) track 2352 drivers/gpu/drm/radeon/r100.c size = track->vtx_size * nverts; track 2353 drivers/gpu/drm/radeon/r100.c if (size != track->immd_dwords) { track 2355 drivers/gpu/drm/radeon/r100.c track->immd_dwords, size); track 2357 drivers/gpu/drm/radeon/r100.c nverts, track->vtx_size); track 2367 drivers/gpu/drm/radeon/r100.c if (track->tex_dirty) { track 2368 drivers/gpu/drm/radeon/r100.c track->tex_dirty = false; track 2369 drivers/gpu/drm/radeon/r100.c return r100_cs_track_texture_check(rdev, track); track 2374 drivers/gpu/drm/radeon/r100.c void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track) track 2378 drivers/gpu/drm/radeon/r100.c track->cb_dirty = true; track 2379 drivers/gpu/drm/radeon/r100.c track->zb_dirty = true; track 2380 drivers/gpu/drm/radeon/r100.c track->tex_dirty = true; track 2381 drivers/gpu/drm/radeon/r100.c track->aa_dirty = true; track 2384 drivers/gpu/drm/radeon/r100.c track->num_cb = 1; track 2386 drivers/gpu/drm/radeon/r100.c track->num_texture = 3; track 2388 drivers/gpu/drm/radeon/r100.c track->num_texture = 6; track 2389 drivers/gpu/drm/radeon/r100.c track->maxy = 2048; track 2390 drivers/gpu/drm/radeon/r100.c track->separate_cube = 1; track 2392 drivers/gpu/drm/radeon/r100.c track->num_cb = 4; track 2393 drivers/gpu/drm/radeon/r100.c track->num_texture = 16; track 2394 drivers/gpu/drm/radeon/r100.c track->maxy = 4096; track 2395 drivers/gpu/drm/radeon/r100.c track->separate_cube = 0; track 2396 drivers/gpu/drm/radeon/r100.c track->aaresolve = false; track 2397 drivers/gpu/drm/radeon/r100.c track->aa.robj = NULL; track 2400 drivers/gpu/drm/radeon/r100.c for (i = 0; i < track->num_cb; i++) { track 2401 drivers/gpu/drm/radeon/r100.c track->cb[i].robj = NULL; track 2402 drivers/gpu/drm/radeon/r100.c track->cb[i].pitch = 8192; track 2403 drivers/gpu/drm/radeon/r100.c track->cb[i].cpp = 16; track 2404 drivers/gpu/drm/radeon/r100.c track->cb[i].offset = 0; track 2406 drivers/gpu/drm/radeon/r100.c track->z_enabled = true; track 2407 drivers/gpu/drm/radeon/r100.c track->zb.robj = NULL; track 2408 drivers/gpu/drm/radeon/r100.c track->zb.pitch = 8192; track 2409 drivers/gpu/drm/radeon/r100.c track->zb.cpp = 4; track 2410 drivers/gpu/drm/radeon/r100.c track->zb.offset = 0; track 2411 drivers/gpu/drm/radeon/r100.c track->vtx_size = 0x7F; track 2412 drivers/gpu/drm/radeon/r100.c track->immd_dwords = 0xFFFFFFFFUL; track 2413 drivers/gpu/drm/radeon/r100.c track->num_arrays = 11; track 2414 drivers/gpu/drm/radeon/r100.c track->max_indx = 0x00FFFFFFUL; track 2415 drivers/gpu/drm/radeon/r100.c for (i = 0; i < track->num_arrays; i++) { track 2416 drivers/gpu/drm/radeon/r100.c track->arrays[i].robj = NULL; track 2417 drivers/gpu/drm/radeon/r100.c track->arrays[i].esize = 0x7F; track 2419 drivers/gpu/drm/radeon/r100.c for (i = 0; i < track->num_texture; i++) { track 2420 drivers/gpu/drm/radeon/r100.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 2421 drivers/gpu/drm/radeon/r100.c track->textures[i].pitch = 16536; track 2422 drivers/gpu/drm/radeon/r100.c track->textures[i].width = 16536; track 2423 drivers/gpu/drm/radeon/r100.c track->textures[i].height = 16536; track 2424 drivers/gpu/drm/radeon/r100.c track->textures[i].width_11 = 1 << 11; track 2425 drivers/gpu/drm/radeon/r100.c track->textures[i].height_11 = 1 << 11; track 2426 drivers/gpu/drm/radeon/r100.c track->textures[i].num_levels = 12; track 2428 drivers/gpu/drm/radeon/r100.c track->textures[i].tex_coord_type = 0; track 2429 drivers/gpu/drm/radeon/r100.c track->textures[i].txdepth = 0; track 2431 drivers/gpu/drm/radeon/r100.c track->textures[i].txdepth = 16; track 2432 drivers/gpu/drm/radeon/r100.c track->textures[i].tex_coord_type = 1; track 2434 drivers/gpu/drm/radeon/r100.c track->textures[i].cpp = 64; track 2435 drivers/gpu/drm/radeon/r100.c track->textures[i].robj = NULL; track 2437 drivers/gpu/drm/radeon/r100.c track->textures[i].enabled = false; track 2438 drivers/gpu/drm/radeon/r100.c track->textures[i].lookup_disable = false; track 2439 drivers/gpu/drm/radeon/r100.c track->textures[i].roundup_w = true; track 2440 drivers/gpu/drm/radeon/r100.c track->textures[i].roundup_h = true; track 2441 drivers/gpu/drm/radeon/r100.c if (track->separate_cube) track 2443 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[face].robj = NULL; track 2444 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[face].width = 16536; track 2445 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[face].height = 16536; track 2446 drivers/gpu/drm/radeon/r100.c track->textures[i].cube_info[face].offset = 0; track 85 drivers/gpu/drm/radeon/r100_track.h int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track); track 86 drivers/gpu/drm/radeon/r100_track.h void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track); track 150 drivers/gpu/drm/radeon/r200.c struct r100_cs_track *track; track 160 drivers/gpu/drm/radeon/r200.c track = (struct r100_cs_track *)p->track; track 188 drivers/gpu/drm/radeon/r200.c track->zb.robj = reloc->robj; track 189 drivers/gpu/drm/radeon/r200.c track->zb.offset = idx_value; track 190 drivers/gpu/drm/radeon/r200.c track->zb_dirty = true; track 201 drivers/gpu/drm/radeon/r200.c track->cb[0].robj = reloc->robj; track 202 drivers/gpu/drm/radeon/r200.c track->cb[0].offset = idx_value; track 203 drivers/gpu/drm/radeon/r200.c track->cb_dirty = true; track 231 drivers/gpu/drm/radeon/r200.c track->textures[i].robj = reloc->robj; track 232 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 273 drivers/gpu/drm/radeon/r200.c track->textures[i].cube_info[face - 1].offset = idx_value; track 275 drivers/gpu/drm/radeon/r200.c track->textures[i].cube_info[face - 1].robj = reloc->robj; track 276 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 279 drivers/gpu/drm/radeon/r200.c track->maxy = ((idx_value >> 16) & 0x7FF); track 280 drivers/gpu/drm/radeon/r200.c track->cb_dirty = true; track 281 drivers/gpu/drm/radeon/r200.c track->zb_dirty = true; track 304 drivers/gpu/drm/radeon/r200.c track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK; track 305 drivers/gpu/drm/radeon/r200.c track->cb_dirty = true; track 308 drivers/gpu/drm/radeon/r200.c track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK; track 309 drivers/gpu/drm/radeon/r200.c track->zb_dirty = true; track 318 drivers/gpu/drm/radeon/r200.c track->cb[0].cpp = 1; track 323 drivers/gpu/drm/radeon/r200.c track->cb[0].cpp = 2; track 326 drivers/gpu/drm/radeon/r200.c track->cb[0].cpp = 4; track 338 drivers/gpu/drm/radeon/r200.c track->z_enabled = !!(idx_value & RADEON_Z_ENABLE); track 339 drivers/gpu/drm/radeon/r200.c track->cb_dirty = true; track 340 drivers/gpu/drm/radeon/r200.c track->zb_dirty = true; track 345 drivers/gpu/drm/radeon/r200.c track->zb.cpp = 2; track 353 drivers/gpu/drm/radeon/r200.c track->zb.cpp = 4; track 358 drivers/gpu/drm/radeon/r200.c track->zb_dirty = true; track 373 drivers/gpu/drm/radeon/r200.c for (i = 0; i < track->num_texture; i++) track 374 drivers/gpu/drm/radeon/r200.c track->textures[i].enabled = !!(temp & (1 << i)); track 375 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 379 drivers/gpu/drm/radeon/r200.c track->vap_vf_cntl = idx_value; track 383 drivers/gpu/drm/radeon/r200.c track->max_indx = idx_value & 0x00FFFFFFUL; track 386 drivers/gpu/drm/radeon/r200.c track->vtx_size = r200_get_vtx_size_0(idx_value); track 389 drivers/gpu/drm/radeon/r200.c track->vtx_size += r200_get_vtx_size_1(idx_value); track 398 drivers/gpu/drm/radeon/r200.c track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1; track 399 drivers/gpu/drm/radeon/r200.c track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1; track 400 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 409 drivers/gpu/drm/radeon/r200.c track->textures[i].pitch = idx_value + 32; track 410 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 419 drivers/gpu/drm/radeon/r200.c track->textures[i].num_levels = ((idx_value & R200_MAX_MIP_LEVEL_MASK) track 423 drivers/gpu/drm/radeon/r200.c track->textures[i].roundup_w = false; track 426 drivers/gpu/drm/radeon/r200.c track->textures[i].roundup_h = false; track 427 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 444 drivers/gpu/drm/radeon/r200.c track->textures[i].txdepth = idx_value & 0x7; track 455 drivers/gpu/drm/radeon/r200.c track->textures[i].tex_coord_type = 0; track 459 drivers/gpu/drm/radeon/r200.c track->textures[i].tex_coord_type = 2; track 463 drivers/gpu/drm/radeon/r200.c track->textures[i].tex_coord_type = 1; track 466 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 476 drivers/gpu/drm/radeon/r200.c track->textures[i].use_pitch = 1; track 478 drivers/gpu/drm/radeon/r200.c track->textures[i].use_pitch = 0; track 479 drivers/gpu/drm/radeon/r200.c track->textures[i].width = 1 << ((idx_value & RADEON_TXFORMAT_WIDTH_MASK) >> RADEON_TXFORMAT_WIDTH_SHIFT); track 480 drivers/gpu/drm/radeon/r200.c track->textures[i].height = 1 << ((idx_value & RADEON_TXFORMAT_HEIGHT_MASK) >> RADEON_TXFORMAT_HEIGHT_SHIFT); track 483 drivers/gpu/drm/radeon/r200.c track->textures[i].lookup_disable = true; track 488 drivers/gpu/drm/radeon/r200.c track->textures[i].cpp = 1; track 489 drivers/gpu/drm/radeon/r200.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 500 drivers/gpu/drm/radeon/r200.c track->textures[i].cpp = 2; track 501 drivers/gpu/drm/radeon/r200.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 508 drivers/gpu/drm/radeon/r200.c track->textures[i].cpp = 4; track 509 drivers/gpu/drm/radeon/r200.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 512 drivers/gpu/drm/radeon/r200.c track->textures[i].cpp = 1; track 513 drivers/gpu/drm/radeon/r200.c track->textures[i].compress_format = R100_TRACK_COMP_DXT1; track 517 drivers/gpu/drm/radeon/r200.c track->textures[i].cpp = 1; track 518 drivers/gpu/drm/radeon/r200.c track->textures[i].compress_format = R100_TRACK_COMP_DXT1; track 521 drivers/gpu/drm/radeon/r200.c track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); track 522 drivers/gpu/drm/radeon/r200.c track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); track 523 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 534 drivers/gpu/drm/radeon/r200.c track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf); track 535 drivers/gpu/drm/radeon/r200.c track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf); track 537 drivers/gpu/drm/radeon/r200.c track->tex_dirty = true; track 636 drivers/gpu/drm/radeon/r300.c struct r100_cs_track *track; track 644 drivers/gpu/drm/radeon/r300.c track = (struct r100_cs_track *)p->track; track 676 drivers/gpu/drm/radeon/r300.c track->cb[i].robj = reloc->robj; track 677 drivers/gpu/drm/radeon/r300.c track->cb[i].offset = idx_value; track 678 drivers/gpu/drm/radeon/r300.c track->cb_dirty = true; track 689 drivers/gpu/drm/radeon/r300.c track->zb.robj = reloc->robj; track 690 drivers/gpu/drm/radeon/r300.c track->zb.offset = idx_value; track 691 drivers/gpu/drm/radeon/r300.c track->zb_dirty = true; track 734 drivers/gpu/drm/radeon/r300.c track->textures[i].robj = reloc->robj; track 735 drivers/gpu/drm/radeon/r300.c track->tex_dirty = true; track 740 drivers/gpu/drm/radeon/r300.c track->vap_vf_cntl = idx_value; track 744 drivers/gpu/drm/radeon/r300.c track->vtx_size = idx_value & 0x7F; track 748 drivers/gpu/drm/radeon/r300.c track->max_indx = idx_value & 0x00FFFFFFUL; track 754 drivers/gpu/drm/radeon/r300.c track->vap_alt_nverts = idx_value & 0xFFFFFF; track 758 drivers/gpu/drm/radeon/r300.c track->maxy = ((idx_value >> 13) & 0x1FFF) + 1; track 760 drivers/gpu/drm/radeon/r300.c track->maxy -= 1440; track 762 drivers/gpu/drm/radeon/r300.c track->cb_dirty = true; track 763 drivers/gpu/drm/radeon/r300.c track->zb_dirty = true; track 772 drivers/gpu/drm/radeon/r300.c track->num_cb = ((idx_value >> 5) & 0x3) + 1; track 773 drivers/gpu/drm/radeon/r300.c track->cb_dirty = true; track 804 drivers/gpu/drm/radeon/r300.c track->cb[i].pitch = idx_value & 0x3FFE; track 809 drivers/gpu/drm/radeon/r300.c track->cb[i].cpp = 1; track 815 drivers/gpu/drm/radeon/r300.c track->cb[i].cpp = 2; track 825 drivers/gpu/drm/radeon/r300.c track->cb[i].cpp = 4; track 828 drivers/gpu/drm/radeon/r300.c track->cb[i].cpp = 8; track 831 drivers/gpu/drm/radeon/r300.c track->cb[i].cpp = 16; track 838 drivers/gpu/drm/radeon/r300.c track->cb_dirty = true; track 843 drivers/gpu/drm/radeon/r300.c track->z_enabled = true; track 845 drivers/gpu/drm/radeon/r300.c track->z_enabled = false; track 847 drivers/gpu/drm/radeon/r300.c track->zb_dirty = true; track 854 drivers/gpu/drm/radeon/r300.c track->zb.cpp = 2; track 857 drivers/gpu/drm/radeon/r300.c track->zb.cpp = 4; track 864 drivers/gpu/drm/radeon/r300.c track->zb_dirty = true; track 888 drivers/gpu/drm/radeon/r300.c track->zb.pitch = idx_value & 0x3FFC; track 889 drivers/gpu/drm/radeon/r300.c track->zb_dirty = true; track 897 drivers/gpu/drm/radeon/r300.c track->textures[i].enabled = enabled; track 899 drivers/gpu/drm/radeon/r300.c track->tex_dirty = true; track 920 drivers/gpu/drm/radeon/r300.c track->textures[i].tex_coord_type = tmp; track 925 drivers/gpu/drm/radeon/r300.c track->textures[i].cpp = 1; track 926 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 938 drivers/gpu/drm/radeon/r300.c track->textures[i].cpp = 2; track 939 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 950 drivers/gpu/drm/radeon/r300.c track->textures[i].cpp = 4; track 951 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 956 drivers/gpu/drm/radeon/r300.c track->textures[i].cpp = 8; track 957 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 960 drivers/gpu/drm/radeon/r300.c track->textures[i].cpp = 16; track 961 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = R100_TRACK_COMP_NONE; track 964 drivers/gpu/drm/radeon/r300.c track->textures[i].cpp = 1; track 965 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = R100_TRACK_COMP_DXT1; track 977 drivers/gpu/drm/radeon/r300.c track->textures[i].cpp = 1; track 978 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = R100_TRACK_COMP_DXT35; track 985 drivers/gpu/drm/radeon/r300.c track->tex_dirty = true; track 1007 drivers/gpu/drm/radeon/r300.c track->textures[i].roundup_w = false; track 1011 drivers/gpu/drm/radeon/r300.c track->textures[i].roundup_h = false; track 1013 drivers/gpu/drm/radeon/r300.c track->tex_dirty = true; track 1034 drivers/gpu/drm/radeon/r300.c track->textures[i].pitch = tmp + 1; track 1037 drivers/gpu/drm/radeon/r300.c track->textures[i].width_11 = tmp; track 1039 drivers/gpu/drm/radeon/r300.c track->textures[i].height_11 = tmp; track 1044 drivers/gpu/drm/radeon/r300.c track->textures[i].compress_format = track 1051 drivers/gpu/drm/radeon/r300.c track->tex_dirty = true; track 1072 drivers/gpu/drm/radeon/r300.c track->textures[i].width = tmp + 1; track 1074 drivers/gpu/drm/radeon/r300.c track->textures[i].height = tmp + 1; track 1076 drivers/gpu/drm/radeon/r300.c track->textures[i].num_levels = tmp; track 1078 drivers/gpu/drm/radeon/r300.c track->textures[i].use_pitch = !!tmp; track 1080 drivers/gpu/drm/radeon/r300.c track->textures[i].txdepth = tmp; track 1081 drivers/gpu/drm/radeon/r300.c track->tex_dirty = true; track 1095 drivers/gpu/drm/radeon/r300.c track->color_channel_mask = idx_value; track 1096 drivers/gpu/drm/radeon/r300.c track->cb_dirty = true; track 1109 drivers/gpu/drm/radeon/r300.c track->zb_cb_clear = !!(idx_value & (1 << 5)); track 1110 drivers/gpu/drm/radeon/r300.c track->cb_dirty = true; track 1111 drivers/gpu/drm/radeon/r300.c track->zb_dirty = true; track 1122 drivers/gpu/drm/radeon/r300.c track->blend_read_enable = !!(idx_value & (1 << 2)); track 1123 drivers/gpu/drm/radeon/r300.c track->cb_dirty = true; track 1133 drivers/gpu/drm/radeon/r300.c track->aa.robj = reloc->robj; track 1134 drivers/gpu/drm/radeon/r300.c track->aa.offset = idx_value; track 1135 drivers/gpu/drm/radeon/r300.c track->aa_dirty = true; track 1139 drivers/gpu/drm/radeon/r300.c track->aa.pitch = idx_value & 0x3FFE; track 1140 drivers/gpu/drm/radeon/r300.c track->aa_dirty = true; track 1143 drivers/gpu/drm/radeon/r300.c track->aaresolve = idx_value & 0x1; track 1144 drivers/gpu/drm/radeon/r300.c track->aa_dirty = true; track 1180 drivers/gpu/drm/radeon/r300.c struct r100_cs_track *track; track 1187 drivers/gpu/drm/radeon/r300.c track = (struct r100_cs_track *)p->track; track 1216 drivers/gpu/drm/radeon/r300.c track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); track 1217 drivers/gpu/drm/radeon/r300.c track->immd_dwords = pkt->count - 1; track 1218 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); track 1231 drivers/gpu/drm/radeon/r300.c track->vap_vf_cntl = radeon_get_ib_value(p, idx); track 1232 drivers/gpu/drm/radeon/r300.c track->immd_dwords = pkt->count; track 1233 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); track 1239 drivers/gpu/drm/radeon/r300.c track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); track 1240 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); track 1246 drivers/gpu/drm/radeon/r300.c track->vap_vf_cntl = radeon_get_ib_value(p, idx); track 1247 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); track 1253 drivers/gpu/drm/radeon/r300.c track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); track 1254 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); track 1260 drivers/gpu/drm/radeon/r300.c track->vap_vf_cntl = radeon_get_ib_value(p, idx); track 1261 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); track 1287 drivers/gpu/drm/radeon/r300.c struct r100_cs_track *track; track 1290 drivers/gpu/drm/radeon/r300.c track = kzalloc(sizeof(*track), GFP_KERNEL); track 1291 drivers/gpu/drm/radeon/r300.c if (track == NULL) track 1293 drivers/gpu/drm/radeon/r300.c r100_cs_track_clear(p->rdev, track); track 1294 drivers/gpu/drm/radeon/r300.c p->track = track; track 300 drivers/gpu/drm/radeon/r600_cs.c static void r600_cs_track_init(struct r600_cs_track *track) track 305 drivers/gpu/drm/radeon/r600_cs.c track->sq_config = DX9_CONSTS; track 307 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_base_last[i] = 0; track 308 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_size[i] = 0; track 309 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_size_idx[i] = 0; track 310 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_info[i] = 0; track 311 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_view[i] = 0xFFFFFFFF; track 312 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_bo[i] = NULL; track 313 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_bo_offset[i] = 0xFFFFFFFF; track 314 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_bo_mc[i] = 0xFFFFFFFF; track 315 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_frag_bo[i] = NULL; track 316 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_frag_offset[i] = 0xFFFFFFFF; track 317 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_tile_bo[i] = NULL; track 318 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_tile_offset[i] = 0xFFFFFFFF; track 319 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_mask[i] = 0xFFFFFFFF; track 321 drivers/gpu/drm/radeon/r600_cs.c track->is_resolve = false; track 322 drivers/gpu/drm/radeon/r600_cs.c track->nsamples = 16; track 323 drivers/gpu/drm/radeon/r600_cs.c track->log_nsamples = 4; track 324 drivers/gpu/drm/radeon/r600_cs.c track->cb_target_mask = 0xFFFFFFFF; track 325 drivers/gpu/drm/radeon/r600_cs.c track->cb_shader_mask = 0xFFFFFFFF; track 326 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 327 drivers/gpu/drm/radeon/r600_cs.c track->db_bo = NULL; track 328 drivers/gpu/drm/radeon/r600_cs.c track->db_bo_mc = 0xFFFFFFFF; track 330 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info = 7 | (1 << 25); track 331 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_view = 0xFFFFC000; track 332 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size = 0xFFFFFFFF; track 333 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size_idx = 0; track 334 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_control = 0xFFFFFFFF; track 335 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 336 drivers/gpu/drm/radeon/r600_cs.c track->htile_bo = NULL; track 337 drivers/gpu/drm/radeon/r600_cs.c track->htile_offset = 0xFFFFFFFF; track 338 drivers/gpu/drm/radeon/r600_cs.c track->htile_surface = 0; track 341 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_size[i] = 0; track 342 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_bo[i] = NULL; track 343 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF; track 344 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_bo_mc[i] = 0xFFFFFFFF; track 346 drivers/gpu/drm/radeon/r600_cs.c track->streamout_dirty = true; track 347 drivers/gpu/drm/radeon/r600_cs.c track->sx_misc_kill_all_prims = false; track 352 drivers/gpu/drm/radeon/r600_cs.c struct r600_cs_track *track = p->track; track 361 drivers/gpu/drm/radeon/r600_cs.c unsigned nsamples = track->is_resolve && i == 1 ? 1 : track->nsamples; track 363 drivers/gpu/drm/radeon/r600_cs.c size = radeon_bo_size(track->cb_color_bo[i]) - track->cb_color_bo_offset[i]; track 364 drivers/gpu/drm/radeon/r600_cs.c format = G_0280A0_FORMAT(track->cb_color_info[i]); track 368 drivers/gpu/drm/radeon/r600_cs.c i, track->cb_color_info[i]); track 372 drivers/gpu/drm/radeon/r600_cs.c pitch = (G_028060_PITCH_TILE_MAX(track->cb_color_size[i]) + 1) * 8; track 373 drivers/gpu/drm/radeon/r600_cs.c slice_tile_max = G_028060_SLICE_TILE_MAX(track->cb_color_size[i]) + 1; track 378 drivers/gpu/drm/radeon/r600_cs.c array_mode = G_0280A0_ARRAY_MODE(track->cb_color_info[i]); track 380 drivers/gpu/drm/radeon/r600_cs.c base_offset = track->cb_color_bo_mc[i] + track->cb_color_bo_offset[i]; track 382 drivers/gpu/drm/radeon/r600_cs.c array_check.group_size = track->group_size; track 383 drivers/gpu/drm/radeon/r600_cs.c array_check.nbanks = track->nbanks; track 384 drivers/gpu/drm/radeon/r600_cs.c array_check.npipes = track->npipes; track 390 drivers/gpu/drm/radeon/r600_cs.c G_0280A0_ARRAY_MODE(track->cb_color_info[i]), i, track 391 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_info[i]); track 408 drivers/gpu/drm/radeon/r600_cs.c G_0280A0_ARRAY_MODE(track->cb_color_info[i]), i, track 409 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_info[i]); track 436 drivers/gpu/drm/radeon/r600_cs.c tmp += track->cb_color_view[i] & 0xFF; track 440 drivers/gpu/drm/radeon/r600_cs.c tmp += G_028080_SLICE_MAX(track->cb_color_view[i]) * tmp; track 443 drivers/gpu/drm/radeon/r600_cs.c if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) { track 454 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_bo_offset[i], tmp, track 455 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->cb_color_bo[i]), track 468 drivers/gpu/drm/radeon/r600_cs.c ib[track->cb_color_size_idx[i]] = tmp; track 471 drivers/gpu/drm/radeon/r600_cs.c switch (G_0280A0_TILE_MODE(track->cb_color_info[i])) { track 475 drivers/gpu/drm/radeon/r600_cs.c if (track->nsamples > 1) { track 476 drivers/gpu/drm/radeon/r600_cs.c uint32_t tile_max = G_028100_FMASK_TILE_MAX(track->cb_color_mask[i]); track 479 drivers/gpu/drm/radeon/r600_cs.c uint32_t bytes = track->nsamples * track->log_nsamples * 8 * (tile_max + 1); track 481 drivers/gpu/drm/radeon/r600_cs.c if (bytes + track->cb_color_frag_offset[i] > track 482 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->cb_color_frag_bo[i])) { track 486 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_frag_offset[i], track 487 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->cb_color_frag_bo[i])); track 494 drivers/gpu/drm/radeon/r600_cs.c uint32_t block_max = G_028100_CMASK_BLOCK_MAX(track->cb_color_mask[i]); track 499 drivers/gpu/drm/radeon/r600_cs.c if (bytes + track->cb_color_tile_offset[i] > track 500 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->cb_color_tile_bo[i])) { track 504 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_tile_offset[i], track 505 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->cb_color_tile_bo[i])); track 519 drivers/gpu/drm/radeon/r600_cs.c struct r600_cs_track *track = p->track; track 530 drivers/gpu/drm/radeon/r600_cs.c if (track->db_bo == NULL) { track 534 drivers/gpu/drm/radeon/r600_cs.c switch (G_028010_FORMAT(track->db_depth_info)) { track 549 drivers/gpu/drm/radeon/r600_cs.c dev_warn(p->dev, "z/stencil with invalid format %d\n", G_028010_FORMAT(track->db_depth_info)); track 552 drivers/gpu/drm/radeon/r600_cs.c if ((track->db_depth_size & 0xFFFFFC00) == 0xFFFFFC00) { track 553 drivers/gpu/drm/radeon/r600_cs.c if (!track->db_depth_size_idx) { track 557 drivers/gpu/drm/radeon/r600_cs.c tmp = radeon_bo_size(track->db_bo) - track->db_offset; track 561 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size, bpe, track->db_offset, track 562 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->db_bo)); track 565 drivers/gpu/drm/radeon/r600_cs.c ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF); track 567 drivers/gpu/drm/radeon/r600_cs.c size = radeon_bo_size(track->db_bo); track 569 drivers/gpu/drm/radeon/r600_cs.c pitch = (G_028000_PITCH_TILE_MAX(track->db_depth_size) + 1) * 8; track 570 drivers/gpu/drm/radeon/r600_cs.c slice_tile_max = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1; track 575 drivers/gpu/drm/radeon/r600_cs.c base_offset = track->db_bo_mc + track->db_offset; track 576 drivers/gpu/drm/radeon/r600_cs.c array_mode = G_028010_ARRAY_MODE(track->db_depth_info); track 578 drivers/gpu/drm/radeon/r600_cs.c array_check.group_size = track->group_size; track 579 drivers/gpu/drm/radeon/r600_cs.c array_check.nbanks = track->nbanks; track 580 drivers/gpu/drm/radeon/r600_cs.c array_check.npipes = track->npipes; track 581 drivers/gpu/drm/radeon/r600_cs.c array_check.nsamples = track->nsamples; track 586 drivers/gpu/drm/radeon/r600_cs.c G_028010_ARRAY_MODE(track->db_depth_info), track 587 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info); track 599 drivers/gpu/drm/radeon/r600_cs.c G_028010_ARRAY_MODE(track->db_depth_info), track 600 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info); track 620 drivers/gpu/drm/radeon/r600_cs.c ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1; track 621 drivers/gpu/drm/radeon/r600_cs.c nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1; track 622 drivers/gpu/drm/radeon/r600_cs.c tmp = ntiles * bpe * 64 * nviews * track->nsamples; track 623 drivers/gpu/drm/radeon/r600_cs.c if ((tmp + track->db_offset) > radeon_bo_size(track->db_bo)) { track 626 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size, ntiles, nviews, bpe, tmp + track->db_offset, track 627 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->db_bo)); track 633 drivers/gpu/drm/radeon/r600_cs.c if (G_028010_TILE_SURFACE_ENABLE(track->db_depth_info)) { track 637 drivers/gpu/drm/radeon/r600_cs.c if (track->htile_bo == NULL) { track 639 drivers/gpu/drm/radeon/r600_cs.c __func__, __LINE__, track->db_depth_info); track 642 drivers/gpu/drm/radeon/r600_cs.c if ((track->db_depth_size & 0xFFFFFC00) == 0xFFFFFC00) { track 644 drivers/gpu/drm/radeon/r600_cs.c __func__, __LINE__, track->db_depth_size); track 650 drivers/gpu/drm/radeon/r600_cs.c if (G_028D24_LINEAR(track->htile_surface)) { track 654 drivers/gpu/drm/radeon/r600_cs.c nby = round_up(nby, track->npipes * 8); track 660 drivers/gpu/drm/radeon/r600_cs.c switch (track->npipes) { track 683 drivers/gpu/drm/radeon/r600_cs.c __func__, __LINE__, track->npipes); track 691 drivers/gpu/drm/radeon/r600_cs.c size = roundup(nbx * nby * 4, track->npipes * (2 << 10)); track 692 drivers/gpu/drm/radeon/r600_cs.c size += track->htile_offset; track 694 drivers/gpu/drm/radeon/r600_cs.c if (size > radeon_bo_size(track->htile_bo)) { track 696 drivers/gpu/drm/radeon/r600_cs.c __func__, __LINE__, radeon_bo_size(track->htile_bo), track 702 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = false; track 708 drivers/gpu/drm/radeon/r600_cs.c struct r600_cs_track *track = p->track; track 717 drivers/gpu/drm/radeon/r600_cs.c if (track->streamout_dirty && track->vgt_strmout_en) { track 719 drivers/gpu/drm/radeon/r600_cs.c if (track->vgt_strmout_buffer_en & (1 << i)) { track 720 drivers/gpu/drm/radeon/r600_cs.c if (track->vgt_strmout_bo[i]) { track 721 drivers/gpu/drm/radeon/r600_cs.c u64 offset = (u64)track->vgt_strmout_bo_offset[i] + track 722 drivers/gpu/drm/radeon/r600_cs.c (u64)track->vgt_strmout_size[i]; track 723 drivers/gpu/drm/radeon/r600_cs.c if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) { track 726 drivers/gpu/drm/radeon/r600_cs.c radeon_bo_size(track->vgt_strmout_bo[i])); track 735 drivers/gpu/drm/radeon/r600_cs.c track->streamout_dirty = false; track 738 drivers/gpu/drm/radeon/r600_cs.c if (track->sx_misc_kill_all_prims) track 744 drivers/gpu/drm/radeon/r600_cs.c if (track->cb_dirty) { track 745 drivers/gpu/drm/radeon/r600_cs.c tmp = track->cb_target_mask; track 748 drivers/gpu/drm/radeon/r600_cs.c if (track->is_resolve) { track 753 drivers/gpu/drm/radeon/r600_cs.c u32 format = G_0280A0_FORMAT(track->cb_color_info[i]); track 758 drivers/gpu/drm/radeon/r600_cs.c if (track->cb_color_bo[i] == NULL) { track 760 drivers/gpu/drm/radeon/r600_cs.c __func__, __LINE__, track->cb_target_mask, track->cb_shader_mask, i); track 769 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = false; track 773 drivers/gpu/drm/radeon/r600_cs.c if (track->db_dirty && track 774 drivers/gpu/drm/radeon/r600_cs.c G_028010_FORMAT(track->db_depth_info) != V_028010_DEPTH_INVALID && track 775 drivers/gpu/drm/radeon/r600_cs.c (G_028800_STENCIL_ENABLE(track->db_depth_control) || track 776 drivers/gpu/drm/radeon/r600_cs.c G_028800_Z_ENABLE(track->db_depth_control))) { track 971 drivers/gpu/drm/radeon/r600_cs.c struct r600_cs_track *track = (struct r600_cs_track *)p->track; track 1026 drivers/gpu/drm/radeon/r600_cs.c track->sq_config = radeon_get_ib_value(p, idx); track 1029 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_control = radeon_get_ib_value(p, idx); track 1030 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 1041 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info = radeon_get_ib_value(p, idx); track 1043 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info &= C_028010_ARRAY_MODE; track 1046 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_2D_TILED_THIN1); track 1049 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_1D_TILED_THIN1); track 1052 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_info = radeon_get_ib_value(p, idx); track 1054 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 1057 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_view = radeon_get_ib_value(p, idx); track 1058 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 1061 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size = radeon_get_ib_value(p, idx); track 1062 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size_idx = idx; track 1063 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 1066 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_en = radeon_get_ib_value(p, idx); track 1067 drivers/gpu/drm/radeon/r600_cs.c track->streamout_dirty = true; track 1070 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_buffer_en = radeon_get_ib_value(p, idx); track 1071 drivers/gpu/drm/radeon/r600_cs.c track->streamout_dirty = true; track 1084 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8; track 1086 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_bo[tmp] = reloc->robj; track 1087 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_bo_mc[tmp] = reloc->gpu_offset; track 1088 drivers/gpu/drm/radeon/r600_cs.c track->streamout_dirty = true; track 1096 drivers/gpu/drm/radeon/r600_cs.c track->vgt_strmout_size[tmp] = radeon_get_ib_value(p, idx) * 4; track 1097 drivers/gpu/drm/radeon/r600_cs.c track->streamout_dirty = true; track 1109 drivers/gpu/drm/radeon/r600_cs.c track->cb_target_mask = radeon_get_ib_value(p, idx); track 1110 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1113 drivers/gpu/drm/radeon/r600_cs.c track->cb_shader_mask = radeon_get_ib_value(p, idx); track 1117 drivers/gpu/drm/radeon/r600_cs.c track->log_nsamples = tmp; track 1118 drivers/gpu/drm/radeon/r600_cs.c track->nsamples = 1 << tmp; track 1119 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1123 drivers/gpu/drm/radeon/r600_cs.c track->is_resolve = tmp == V_028808_SPECIAL_RESOLVE_BOX; track 1124 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1142 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_info[tmp] = radeon_get_ib_value(p, idx); track 1145 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_2D_TILED_THIN1); track 1148 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_1D_TILED_THIN1); track 1152 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_info[tmp] = radeon_get_ib_value(p, idx); track 1154 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1165 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_view[tmp] = radeon_get_ib_value(p, idx); track 1166 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1177 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_size[tmp] = radeon_get_ib_value(p, idx); track 1178 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_size_idx[tmp] = idx; track 1179 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1200 drivers/gpu/drm/radeon/r600_cs.c if (!track->cb_color_base_last[tmp]) { track 1204 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_frag_bo[tmp] = track->cb_color_bo[tmp]; track 1205 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_frag_offset[tmp] = track->cb_color_bo_offset[tmp]; track 1206 drivers/gpu/drm/radeon/r600_cs.c ib[idx] = track->cb_color_base_last[tmp]; track 1213 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_frag_bo[tmp] = reloc->robj; track 1214 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_frag_offset[tmp] = (u64)ib[idx] << 8; track 1217 drivers/gpu/drm/radeon/r600_cs.c if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) { track 1218 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1231 drivers/gpu/drm/radeon/r600_cs.c if (!track->cb_color_base_last[tmp]) { track 1235 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_tile_bo[tmp] = track->cb_color_bo[tmp]; track 1236 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_tile_offset[tmp] = track->cb_color_bo_offset[tmp]; track 1237 drivers/gpu/drm/radeon/r600_cs.c ib[idx] = track->cb_color_base_last[tmp]; track 1244 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_tile_bo[tmp] = reloc->robj; track 1245 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_tile_offset[tmp] = (u64)ib[idx] << 8; track 1248 drivers/gpu/drm/radeon/r600_cs.c if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) { track 1249 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1261 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_mask[tmp] = radeon_get_ib_value(p, idx); track 1262 drivers/gpu/drm/radeon/r600_cs.c if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) { track 1263 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1281 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8; track 1283 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_base_last[tmp] = ib[idx]; track 1284 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_bo[tmp] = reloc->robj; track 1285 drivers/gpu/drm/radeon/r600_cs.c track->cb_color_bo_mc[tmp] = reloc->gpu_offset; track 1286 drivers/gpu/drm/radeon/r600_cs.c track->cb_dirty = true; track 1295 drivers/gpu/drm/radeon/r600_cs.c track->db_offset = radeon_get_ib_value(p, idx) << 8; track 1297 drivers/gpu/drm/radeon/r600_cs.c track->db_bo = reloc->robj; track 1298 drivers/gpu/drm/radeon/r600_cs.c track->db_bo_mc = reloc->gpu_offset; track 1299 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 1308 drivers/gpu/drm/radeon/r600_cs.c track->htile_offset = radeon_get_ib_value(p, idx) << 8; track 1310 drivers/gpu/drm/radeon/r600_cs.c track->htile_bo = reloc->robj; track 1311 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 1314 drivers/gpu/drm/radeon/r600_cs.c track->htile_surface = radeon_get_ib_value(p, idx); track 1317 drivers/gpu/drm/radeon/r600_cs.c track->db_dirty = true; track 1390 drivers/gpu/drm/radeon/r600_cs.c track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0; track 1476 drivers/gpu/drm/radeon/r600_cs.c struct r600_cs_track *track = p->track; track 1516 drivers/gpu/drm/radeon/r600_cs.c array_check.group_size = track->group_size; track 1517 drivers/gpu/drm/radeon/r600_cs.c array_check.nbanks = track->nbanks; track 1518 drivers/gpu/drm/radeon/r600_cs.c array_check.npipes = track->npipes; track 1630 drivers/gpu/drm/radeon/r600_cs.c struct r600_cs_track *track; track 1638 drivers/gpu/drm/radeon/r600_cs.c track = (struct r600_cs_track *)p->track; track 2024 drivers/gpu/drm/radeon/r600_cs.c if (track->sq_config & DX9_CONSTS) { track 2102 drivers/gpu/drm/radeon/r600_cs.c if (reloc->robj != track->vgt_strmout_bo[idx_value]) { track 2108 drivers/gpu/drm/radeon/r600_cs.c if (offset != track->vgt_strmout_bo_offset[idx_value]) { track 2110 drivers/gpu/drm/radeon/r600_cs.c offset, track->vgt_strmout_bo_offset[idx_value]); track 2271 drivers/gpu/drm/radeon/r600_cs.c struct r600_cs_track *track; track 2274 drivers/gpu/drm/radeon/r600_cs.c if (p->track == NULL) { track 2276 drivers/gpu/drm/radeon/r600_cs.c track = kzalloc(sizeof(*track), GFP_KERNEL); track 2277 drivers/gpu/drm/radeon/r600_cs.c if (track == NULL) track 2279 drivers/gpu/drm/radeon/r600_cs.c r600_cs_track_init(track); track 2281 drivers/gpu/drm/radeon/r600_cs.c track->npipes = p->rdev->config.r600.tiling_npipes; track 2282 drivers/gpu/drm/radeon/r600_cs.c track->nbanks = p->rdev->config.r600.tiling_nbanks; track 2283 drivers/gpu/drm/radeon/r600_cs.c track->group_size = p->rdev->config.r600.tiling_group_size; track 2285 drivers/gpu/drm/radeon/r600_cs.c track->npipes = p->rdev->config.rv770.tiling_npipes; track 2286 drivers/gpu/drm/radeon/r600_cs.c track->nbanks = p->rdev->config.rv770.tiling_nbanks; track 2287 drivers/gpu/drm/radeon/r600_cs.c track->group_size = p->rdev->config.rv770.tiling_group_size; track 2289 drivers/gpu/drm/radeon/r600_cs.c p->track = track; track 2294 drivers/gpu/drm/radeon/r600_cs.c kfree(p->track); track 2295 drivers/gpu/drm/radeon/r600_cs.c p->track = NULL; track 2310 drivers/gpu/drm/radeon/r600_cs.c kfree(p->track); track 2311 drivers/gpu/drm/radeon/r600_cs.c p->track = NULL; track 2315 drivers/gpu/drm/radeon/r600_cs.c kfree(p->track); track 2316 drivers/gpu/drm/radeon/r600_cs.c p->track = NULL; track 2326 drivers/gpu/drm/radeon/r600_cs.c kfree(p->track); track 2327 drivers/gpu/drm/radeon/r600_cs.c p->track = NULL; track 1080 drivers/gpu/drm/radeon/radeon.h void *track; track 449 drivers/gpu/drm/radeon/radeon_cs.c kfree(parser->track); track 127 drivers/hid/hid-alps.c u8 track[5]; track 1173 drivers/ide/ide-cd.c toc->ent[i].track = bcd2bin(toc->ent[i].track); track 58 drivers/ide/ide-cd.h u8 track; track 315 drivers/ide/ide-cd_ioctl.c static int ide_cd_get_toc_entry(ide_drive_t *drive, int track, track 334 drivers/ide/ide-cd_ioctl.c if (track == CDROM_LEADOUT) track 336 drivers/ide/ide-cd_ioctl.c else if (track < toc->hdr.first_track || track > toc->hdr.last_track) track 339 drivers/ide/ide-cd_ioctl.c *ent = &toc->ent[track - toc->hdr.first_track]; track 134 drivers/ide/ide-disk.c unsigned int sect, head, cyl, track; track 136 drivers/ide/ide-disk.c track = (int)block / drive->sect; track 138 drivers/ide/ide-disk.c head = track % drive->head; track 139 drivers/ide/ide-disk.c cyl = track / drive->head; track 215 drivers/s390/block/dasd_eckd.c sector_t *track) track 245 drivers/s390/block/dasd_eckd.c *track = cyl * private->rdc_data.trk_per_cyl + head; track 3037 drivers/s390/block/dasd_eckd.c if (format->track == to_format->track) { track 3114 drivers/s390/block/dasd_eckd.c format->track = curr_trk; track 481 drivers/s390/block/dasd_int.h sector_t track; track 14 include/linux/fd.h compat_uint_t track; track 18 include/uapi/linux/fd.h track, /* nr of tracks */ track 74 include/uapi/linux/fd.h unsigned int device,head,track; track 214 include/uapi/linux/fd.h short track; /* current track */ track 276 include/uapi/linux/fd.h unsigned char track[4]; track 364 include/uapi/linux/fd.h int track; track 74 mm/kasan/common.c static inline void set_track(struct kasan_track *track, gfp_t flags) track 76 mm/kasan/common.c track->pid = current->pid; track 77 mm/kasan/common.c track->stack = save_stack(flags); track 100 mm/kasan/report.c static void print_track(struct kasan_track *track, const char *prefix) track 102 mm/kasan/report.c pr_err("%s by task %u:\n", prefix, track->pid); track 103 mm/kasan/report.c if (track->stack) { track 107 mm/kasan/report.c nr_entries = stack_depot_fetch(track->stack, &entries); track 536 mm/slub.c static struct track *get_track(struct kmem_cache *s, void *object, track 539 mm/slub.c struct track *p; track 552 mm/slub.c struct track *p = get_track(s, object, alloc); track 570 mm/slub.c memset(p, 0, sizeof(struct track)); track 583 mm/slub.c static void print_track(const char *s, struct track *t, unsigned long pr_time) track 677 mm/slub.c off += 2 * sizeof(struct track); track 807 mm/slub.c off += 2 * sizeof(struct track); track 3572 mm/slub.c size += 2 * sizeof(struct track); track 4540 mm/slub.c const struct track *track) track 4545 mm/slub.c unsigned long age = jiffies - track->when; track 4561 mm/slub.c if (track->addr == caddr) { track 4565 mm/slub.c if (track->when) { track 4572 mm/slub.c if (track->pid < l->min_pid) track 4573 mm/slub.c l->min_pid = track->pid; track 4574 mm/slub.c if (track->pid > l->max_pid) track 4575 mm/slub.c l->max_pid = track->pid; track 4577 mm/slub.c cpumask_set_cpu(track->cpu, track 4580 mm/slub.c node_set(page_to_nid(virt_to_page(track)), l->nodes); track 4584 mm/slub.c if (track->addr < caddr) track 4602 mm/slub.c l->addr = track->addr; track 4606 mm/slub.c l->min_pid = track->pid; track 4607 mm/slub.c l->max_pid = track->pid; track 4609 mm/slub.c cpumask_set_cpu(track->cpu, to_cpumask(l->cpus)); track 4611 mm/slub.c node_set(page_to_nid(virt_to_page(track)), l->nodes); track 775 tools/perf/util/evsel.c struct record_opts *opts, bool track) track 895 tools/perf/util/evsel.c evsel->core.attr.mmap_data = track; track 941 tools/perf/util/evsel.c int track = evsel->tracking; track 1017 tools/perf/util/evsel.c attr->mmap_data = track; track 1077 tools/perf/util/evsel.c attr->task = track; track 1078 tools/perf/util/evsel.c attr->mmap = track; track 1079 tools/perf/util/evsel.c attr->mmap2 = track && !perf_missing_features.mmap2; track 1080 tools/perf/util/evsel.c attr->comm = track; track 1081 tools/perf/util/evsel.c attr->ksymbol = track && !perf_missing_features.ksymbol; track 1082 tools/perf/util/evsel.c attr->bpf_event = track && !opts->no_bpf_event && !perf_missing_features.bpf; track 1085 tools/perf/util/evsel.c attr->namespaces = track; track 1088 tools/perf/util/evsel.c attr->context_switch = track; track 1147 tools/perf/util/evsel.c apply_config_terms(evsel, opts, track);