tilcdc_write      106 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG,
tilcdc_write      108 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG,
tilcdc_write      121 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_PL_INT_ENA);
tilcdc_write      137 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_V2_PL_INT_ENA);
tilcdc_write      153 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG,
tilcdc_write      172 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG,
tilcdc_write      259 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) |
tilcdc_write      313 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg);
tilcdc_write      342 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg);
tilcdc_write      350 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg);
tilcdc_write      356 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_RASTER_TIMING_1_REG, reg);
tilcdc_write      400 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 	tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg);
tilcdc_write      688 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_FRAME_DONE);
tilcdc_write      925 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 			tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG,
tilcdc_write      949 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 				tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG,
tilcdc_write      970 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 		tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0);
tilcdc_write      143 drivers/gpu/drm/tilcdc/tilcdc_regs.h 	tilcdc_write(dev, reg, (tilcdc_read(dev, reg) & ~mask) | (val & mask));
tilcdc_write      148 drivers/gpu/drm/tilcdc/tilcdc_regs.h 	tilcdc_write(dev, reg, tilcdc_read(dev, reg) | mask);
tilcdc_write      153 drivers/gpu/drm/tilcdc/tilcdc_regs.h 	tilcdc_write(dev, reg, tilcdc_read(dev, reg) & ~mask);
tilcdc_write      170 drivers/gpu/drm/tilcdc/tilcdc_regs.h 	tilcdc_write(dev, tilcdc_irqstatus_reg(dev), mask);