D8                310 arch/powerpc/xmon/ppc-opc.c #define DCMX D8 + 1
D8               7033 arch/powerpc/xmon/ppc-opc.c {"e_lbzu",	OPVUP(6,0),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7034 arch/powerpc/xmon/ppc-opc.c {"e_lhau",	OPVUP(6,3),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7035 arch/powerpc/xmon/ppc-opc.c {"e_lhzu",	OPVUP(6,1),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7036 arch/powerpc/xmon/ppc-opc.c {"e_lmw",	OPVUP(6,8),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7037 arch/powerpc/xmon/ppc-opc.c {"e_lwzu",	OPVUP(6,2),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7038 arch/powerpc/xmon/ppc-opc.c {"e_stbu",	OPVUP(6,4),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7039 arch/powerpc/xmon/ppc-opc.c {"e_sthu",	OPVUP(6,5),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7040 arch/powerpc/xmon/ppc-opc.c {"e_stwu",	OPVUP(6,6),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7041 arch/powerpc/xmon/ppc-opc.c {"e_stmw",	OPVUP(6,9),	OPVUP_MASK,	PPCVLE,	0,		{RT, D8, RA0}},
D8               7042 arch/powerpc/xmon/ppc-opc.c {"e_ldmvgprw",	OPVUPRT(6,16,0),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7043 arch/powerpc/xmon/ppc-opc.c {"e_stmvgprw",	OPVUPRT(6,17,0),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7044 arch/powerpc/xmon/ppc-opc.c {"e_ldmvsprw",	OPVUPRT(6,16,1),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7045 arch/powerpc/xmon/ppc-opc.c {"e_stmvsprw",	OPVUPRT(6,17,1),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7046 arch/powerpc/xmon/ppc-opc.c {"e_ldmvsrrw",	OPVUPRT(6,16,4),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7047 arch/powerpc/xmon/ppc-opc.c {"e_stmvsrrw",	OPVUPRT(6,17,4),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7048 arch/powerpc/xmon/ppc-opc.c {"e_ldmvcsrrw",	OPVUPRT(6,16,5),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7049 arch/powerpc/xmon/ppc-opc.c {"e_stmvcsrrw",	OPVUPRT(6,17,5),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7050 arch/powerpc/xmon/ppc-opc.c {"e_ldmvdsrrw",	OPVUPRT(6,16,6),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               7051 arch/powerpc/xmon/ppc-opc.c {"e_stmvdsrrw",	OPVUPRT(6,17,6),OPVUPRT_MASK,	PPCVLE,	0,		{D8, RA0}},
D8               1444 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SIG_EXPR_LIST_DECL_SINGLE(D8, GPIOV6, GPIOV6, SIG_DESC_SET(SCUA0, 22));
D8               1445 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SIG_EXPR_LIST_DECL_SINGLE(D8, RMII2CRSDV, RMII2, RMII2_DESC);
D8               1446 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SIG_EXPR_LIST_DECL_SINGLE(D8, RGMII2RXD2, RGMII2);
D8               1447 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c PIN_DECL_(D8, SIG_EXPR_LIST_PTR(D8, GPIOV6), SIG_EXPR_LIST_PTR(D8, RMII2CRSDV),
D8               1448 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 		SIG_EXPR_LIST_PTR(D8, RGMII2RXD2));
D8               1462 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c FUNC_GROUP_DECL(RMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8);
D8               1463 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c FUNC_GROUP_DECL(RGMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8);
D8               2002 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 	ASPEED_PINCTRL_PIN(D8),
D8               1014 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(D8, MDC1, MDIO1, SIG_DESC_SET(SCU88, 30));
D8               1015 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c PIN_DECL_1(D8, GPIOR6, MDC1);
D8               1021 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(MDIO1, D8, E10);
D8               1992 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	ASPEED_PINCTRL_PIN(D8),
D8                614 drivers/pinctrl/sh-pfc/pfc-r8a77470.c 	PINMUX_IPSR_GPSR(IP2_11_8, D8),
D8                696 drivers/pinctrl/sh-pfc/pfc-r8a7778.c 	PINMUX_IPSR_NOGP(IP2_26,	D8),
D8                850 drivers/pinctrl/sh-pfc/pfc-r8a7790.c 	PINMUX_IPSR_GPSR(IP0_30_27, D8),
D8                819 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_GPSR(IP0_8, D8),
D8                355 drivers/pinctrl/sh-pfc/pfc-r8a7792.c 	PINMUX_SINGLE(D8),
D8                753 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_IPSR_GPSR(IP1_5_4, D8),
D8                 89 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define GPSR0_8		F_(D8,			IP6_15_12)
D8                307 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP6_15_12	FM(D8)			FM(LCDOUT0)	FM(MSIOF2_SCK_D)	FM(SCK4_C)			FM(VI4_DATA0_A)	F_(0, 0)	FM(DU_DR0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
D8                963 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP6_15_12,	D8),
D8                 89 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define GPSR0_8		F_(D8,			IP6_15_12)
D8                308 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP6_15_12	FM(D8)			FM(LCDOUT0)	FM(MSIOF2_SCK_D)	FM(SCK4_C)			FM(VI4_DATA0_A)	F_(0, 0)	FM(DU_DR0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
D8                970 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP6_15_12,	D8),
D8                 93 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define GPSR0_8		F_(D8,			IP6_15_12)
D8                312 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP6_15_12	FM(D8)			FM(LCDOUT0)	FM(MSIOF2_SCK_D)	FM(SCK4_C)			FM(VI4_DATA0_A)	F_(0, 0)	FM(DU_DR0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
D8                973 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP6_15_12,	D8),
D8                 94 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define GPSR0_8		F_(D8,			IP6_15_12)
D8                313 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP6_15_12	FM(D8)			FM(LCDOUT0)	FM(MSIOF2_SCK_D)	FM(SCK4_C)			FM(VI4_DATA0_A)	F_(0, 0)	FM(DU_DR0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
D8                976 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP6_15_12,	D8),
D8                202 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP6_7_4		FM(VI1_DATA5)			F_(0, 0)		FM(SCK4)	FM(D8)		FM(MMC_D3)		F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
D8                601 drivers/pinctrl/sh-pfc/pfc-r8a77970.c 	PINMUX_IPSR_GPSR(IP6_7_4,	D8),
D8                235 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP6_7_4		FM(VI1_DATA5)			F_(0, 0)		F_(0, 0)		FM(D8)		FM(MMC_D1)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
D8                678 drivers/pinctrl/sh-pfc/pfc-r8a77980.c 	PINMUX_IPSR_GPSR(IP6_7_4,	D8),
D8                 77 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define GPSR0_8		F_(D8,			IP6_23_20)
D8                269 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP6_23_20	FM(D8)			FM(MSIOF2_SCK_A)	FM(SCK4_B)		F_(0, 0)		FM(VI5_DATA12_A)	FM(DU_DR7)	FM(RIF3_CLK_B)	FM(HCTS3_N_E)	FM(LCDOUT23)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
D8                892 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_GPSR(IP6_23_20,		D8),
D8               1296 drivers/pinctrl/sh-pfc/pfc-sh7264.c 	GPIO_FN(D8),
D8               1734 drivers/pinctrl/sh-pfc/pfc-sh7269.c 	GPIO_FN(D8),
D8               1401 drivers/pinctrl/sh-pfc/pfc-sh7724.c 	GPIO_FN(D8),
D8                762 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	PINMUX_IPSR_GPSR(IP2_13_11, D8),
D8               1428 drivers/pinctrl/sh-pfc/pfc-sh7734.c 	GPIO_FN(D8), GPIO_FN(SD0_CLK_A), GPIO_FN(MMC_CLK_A), GPIO_FN(QIO2_A),
D8               1448 drivers/pinctrl/sh-pfc/pfc-sh7757.c 	GPIO_FN(D8),
D8                 64 lib/842/842_compress.c 	{ D8, N0, N0, N0, 0x00 }, /* 64 */
D8                 22 lib/842/842_decompress.c 	{ D8, N0, N0, N0 },