tg_regs 32 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c optc1->tg_regs->reg tg_regs 501 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h const struct dcn_optc_registers *tg_regs; tg_regs 422 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c static const struct dcn_optc_registers tg_regs[] = { tg_regs 423 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c tg_regs(0), tg_regs 424 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c tg_regs(1), tg_regs 425 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c tg_regs(2), tg_regs 426 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c tg_regs(3), tg_regs 729 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c tgn10->tg_regs = &tg_regs[instance]; tg_regs 31 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c optc1->tg_regs->reg tg_regs 763 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c static const struct dcn_optc_registers tg_regs[] = { tg_regs 764 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c tg_regs(0), tg_regs 765 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c tg_regs(1), tg_regs 766 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c tg_regs(2), tg_regs 767 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c tg_regs(3), tg_regs 768 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c tg_regs(4), tg_regs 769 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c tg_regs(5) tg_regs 1131 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c tgn10->tg_regs = &tg_regs[instance]; tg_regs 432 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c static const struct dcn_optc_registers tg_regs[] = { tg_regs 433 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c tg_regs(0), tg_regs 434 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c tg_regs(1), tg_regs 435 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c tg_regs(2), tg_regs 436 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c tg_regs(3) tg_regs 1221 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c tgn10->tg_regs = &tg_regs[instance];