tegra_dsi_writel  375 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_0);
tegra_dsi_writel  381 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_1);
tegra_dsi_writel  386 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_2);
tegra_dsi_writel  391 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_BTA_TIMING);
tegra_dsi_writel  456 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, start, DSI_GANGED_MODE_START);
tegra_dsi_writel  457 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, size << 16 | size, DSI_GANGED_MODE_SIZE);
tegra_dsi_writel  460 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_GANGED_MODE_CONTROL);
tegra_dsi_writel  469 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);
tegra_dsi_writel  518 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_CONTROL);
tegra_dsi_writel  520 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD);
tegra_dsi_writel  523 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);
tegra_dsi_writel  540 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_CONTROL);
tegra_dsi_writel  543 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, pkt_seq[i], DSI_PKT_SEQ_0_LO + i);
tegra_dsi_writel  566 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, hsw << 16 | 0, DSI_PKT_LEN_0_1);
tegra_dsi_writel  567 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, hact << 16 | hbp, DSI_PKT_LEN_2_3);
tegra_dsi_writel  568 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, hfp, DSI_PKT_LEN_4_5);
tegra_dsi_writel  569 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, 0x0f0f << 16, DSI_PKT_LEN_6_7);
tegra_dsi_writel  572 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, 8 * mul / div, DSI_SOL_DELAY);
tegra_dsi_writel  588 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_0_1);
tegra_dsi_writel  589 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_2_3);
tegra_dsi_writel  590 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_4_5);
tegra_dsi_writel  591 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_6_7);
tegra_dsi_writel  595 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, value, DSI_DCS_CMDS);
tegra_dsi_writel  616 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, value, DSI_SOL_DELAY);
tegra_dsi_writel  655 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_CONTROL);
tegra_dsi_writel  663 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_START);
tegra_dsi_writel  664 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_SIZE);
tegra_dsi_writel  665 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_CONTROL);
tegra_dsi_writel  673 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_0);
tegra_dsi_writel  686 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0);
tegra_dsi_writel  687 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1);
tegra_dsi_writel  688 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_2);
tegra_dsi_writel  689 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_3);
tegra_dsi_writel  690 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_4);
tegra_dsi_writel  698 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2);
tegra_dsi_writel  702 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3);
tegra_dsi_writel  716 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_TIMEOUT_0);
tegra_dsi_writel  721 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_TIMEOUT_1);
tegra_dsi_writel  724 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_TO_TALLY);
tegra_dsi_writel  741 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);
tegra_dsi_writel  755 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);
tegra_dsi_writel  761 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);
tegra_dsi_writel  767 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, 0, DSI_TRIGGER);
tegra_dsi_writel 1185 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, DSI_TRIGGER_HOST, DSI_TRIGGER);
tegra_dsi_writel 1233 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, value, DSI_WR_DATA);
tegra_dsi_writel 1261 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);
tegra_dsi_writel 1267 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);
tegra_dsi_writel 1284 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);
tegra_dsi_writel 1294 drivers/gpu/drm/tegra/dsi.c 		tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);
tegra_dsi_writel 1298 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_CONTROL);
tegra_dsi_writel 1302 drivers/gpu/drm/tegra/dsi.c 	tegra_dsi_writel(dsi, value, DSI_WR_DATA);