D0 82 arch/m68k/fpsp040/fpsp.h .set USER_DA,LV+0 | save space for D0-D1,A0-A1 D0 83 arch/m68k/fpsp040/fpsp.h .set USER_D0,LV+0 | saved user D0 D0 901 drivers/pinctrl/pinctrl-pic32.c PIC32_PINCTRL_GROUP(48, D0, D0 572 drivers/pinctrl/sh-pfc/pfc-r8a77470.c PINMUX_IPSR_GPSR(IP1_11_8, D0), D0 688 drivers/pinctrl/sh-pfc/pfc-r8a7778.c PINMUX_IPSR_NOGP(IP2_18, D0), D0 802 drivers/pinctrl/sh-pfc/pfc-r8a7790.c PINMUX_IPSR_GPSR(IP0_2_0, D0), D0 811 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_GPSR(IP0_0, D0), D0 347 drivers/pinctrl/sh-pfc/pfc-r8a7792.c PINMUX_SINGLE(D0), D0 728 drivers/pinctrl/sh-pfc/pfc-r8a7794.c PINMUX_IPSR_GPSR(IP0_23_22, D0), D0 97 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define GPSR0_0 F_(D0, IP5_15_12) D0 299 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) D0 920 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_GPSR(IP5_15_12, D0), D0 97 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define GPSR0_0 F_(D0, IP5_15_12) D0 300 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) D0 927 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_GPSR(IP5_15_12, D0), D0 101 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define GPSR0_0 F_(D0, IP5_15_12) D0 304 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) D0 930 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_GPSR(IP5_15_12, D0), D0 102 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define GPSR0_0 F_(D0, IP5_15_12) D0 305 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) D0 933 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_GPSR(IP5_15_12, D0), D0 194 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP5_7_4 FM(VI1_CLKENB) FM(MSIOF1_TXD) F_(0, 0) FM(D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) D0 564 drivers/pinctrl/sh-pfc/pfc-r8a77970.c PINMUX_IPSR_GPSR(IP5_7_4, D0), D0 227 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP5_7_4 FM(VI1_CLKENB) FM(MSIOF1_TXD) F_(0, 0) FM(D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) D0 641 drivers/pinctrl/sh-pfc/pfc-r8a77980.c PINMUX_IPSR_GPSR(IP5_7_4, D0), D0 85 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define GPSR0_0 F_(D0, IP5_23_20) D0 261 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP5_23_20 FM(D0) FM(MSIOF3_SCK_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR2) FM(CTS4_N_C) F_(0, 0) FM(LCDOUT18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) D0 831 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_GPSR(IP5_23_20, D0), D0 1304 drivers/pinctrl/sh-pfc/pfc-sh7264.c GPIO_FN(D0), D0 1742 drivers/pinctrl/sh-pfc/pfc-sh7269.c GPIO_FN(D0), D0 1409 drivers/pinctrl/sh-pfc/pfc-sh7724.c GPIO_FN(D0), D0 714 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_GPSR(IP1_22_20, D0), D0 1410 drivers/pinctrl/sh-pfc/pfc-sh7734.c GPIO_FN(D0), GPIO_FN(SD0_DAT0_A), GPIO_FN(MMC_D0_A), D0 1664 drivers/pinctrl/sh-pfc/pfc-sh7757.c GPIO_FN(D0),