Cache_I            37 arch/mips/include/asm/cacheops.h #define Index_Invalidate_I		(Cache_I | Index_Writeback_Inv)
Cache_I            39 arch/mips/include/asm/cacheops.h #define Index_Load_Tag_I		(Cache_I | Index_Load_Tag)
Cache_I            41 arch/mips/include/asm/cacheops.h #define Index_Store_Tag_I		(Cache_I | Index_Store_Tag)
Cache_I            43 arch/mips/include/asm/cacheops.h #define Hit_Invalidate_I		(Cache_I | Hit_Invalidate)
Cache_I            51 arch/mips/include/asm/cacheops.h #define Fill				(Cache_I | 0x14)
Cache_I            52 arch/mips/include/asm/cacheops.h #define Hit_Writeback_I			(Cache_I | Hit_Writeback)
Cache_I            99 arch/mips/include/asm/cacheops.h #define Index_Load_Data_I		(Cache_I | 0x18)
Cache_I           102 arch/mips/include/asm/cacheops.h #define Index_Store_Data_I		(Cache_I | 0x1c)
Cache_I           109 arch/mips/include/asm/cacheops.h #define Hit_Invalidate_I_Loongson2	(Cache_I | 0x00)
Cache_I          1856 arch/mips/kvm/emulate.c 		} else if (cache == Cache_I) {
Cache_I          1098 arch/mips/kvm/vz.c 	if (cache != Cache_I && cache != Cache_D)