table_info 173 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c struct table_info *info; table_info 60 drivers/gpu/drm/amd/include/discovery.h table_info table_list[TOTAL_TABLES]; table_info 253 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 268 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_mclk); table_info 288 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_mclk); table_info 300 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddgfx_lookup_table); table_info 319 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddc_lookup_table); table_info 530 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 541 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info != NULL) table_info 542 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c pcie_table = table_info->pcie_table; table_info 757 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 764 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info == NULL) table_info 767 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_sclk_table = table_info->vdd_dep_on_sclk; table_info 768 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_mclk_table = table_info->vdd_dep_on_mclk; table_info 823 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 831 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info == NULL) table_info 834 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_sclk_table = table_info->vdd_dep_on_sclk; table_info 835 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_mclk_table = table_info->vdd_dep_on_mclk; table_info 868 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 873 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (!table_info) table_info 876 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_sclk_table = table_info->vdd_dep_on_sclk; table_info 896 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 903 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info == NULL) table_info 922 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_table = table_info->vdd_dep_on_mclk; table_info 932 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_table = table_info->vdd_dep_on_sclk; table_info 1552 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 1665 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c && (table_info->cac_dtp_table->usClockStretchAmount != 0)) table_info 1701 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 1712 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddgfx_lookup_table, vv_id, &sclk)) { table_info 1715 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk_table = table_info->vdd_dep_on_sclk; table_info 1744 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddc_lookup_table, vv_id, &sclk)) { table_info 1747 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info == NULL) table_info 1749 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk_table = table_info->vdd_dep_on_sclk; table_info 1834 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 1838 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->max_clock_voltage_on_dc.vddc; table_info 1848 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 1852 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_sclk; table_info 1854 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_mclk; table_info 1856 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->mm_dep_table; table_info 1862 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddgfx_lookup_table->entries[voltage_id].us_vdd; table_info 1868 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddc_lookup_table->entries[voltage_id].us_vdd; table_info 1875 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddc_lookup_table->entries[voltage_id].us_vdd; table_info 1881 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddc_lookup_table->entries[voltage_id].us_vdd; table_info 2023 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 2028 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddgfx_lookup_table, &(data->vddcgfx_leakage)); table_info 2033 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c &table_info->max_clock_voltage_on_dc.vddgfx, &(data->vddcgfx_leakage)); table_info 2037 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vddc_lookup_table, &(data->vddc_leakage)); table_info 2042 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c &(data->vddc_leakage), &table_info->max_clock_voltage_on_dc.vddc); table_info 2059 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp_result = smu7_sort_lookup_table(hwmgr, table_info->vddgfx_lookup_table); table_info 2063 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp_result = smu7_sort_lookup_table(hwmgr, table_info->vddc_lookup_table); table_info 2072 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 2076 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_sclk; table_info 2078 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_mclk; table_info 2094 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->max_clock_voltage_on_ac.sclk = table_info 2096 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->max_clock_voltage_on_ac.mclk = table_info 2098 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->max_clock_voltage_on_ac.vddc = table_info 2100 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->max_clock_voltage_on_ac.vddci = table_info 2103 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.sclk = table_info->max_clock_voltage_on_ac.sclk; table_info 2104 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.mclk = table_info->max_clock_voltage_on_ac.mclk; table_info 2105 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.vddc = table_info->max_clock_voltage_on_ac.vddc; table_info 2106 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hwmgr->dyn_state.max_clock_voltage_on_ac.vddci = table_info->max_clock_voltage_on_ac.vddci; table_info 2113 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 2121 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info != NULL) { table_info 2122 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_mclk_table = table_info->vdd_dep_on_mclk; table_info 2123 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c lookup_table = table_info->vddc_lookup_table; table_info 2152 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 2180 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info == NULL) table_info 2183 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info->cac_dtp_table->usDefaultTargetOperatingTemp != 0 && table_info 2200 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usDefaultTargetOperatingTemp = (table_info->cac_dtp_table->usDefaultTargetOperatingTemp >= 50) ? table_info 2201 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c (table_info->cac_dtp_table->usDefaultTargetOperatingTemp - 50) : 0; table_info 2203 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usOperatingTempMaxLimit = table_info->cac_dtp_table->usDefaultTargetOperatingTemp; table_info 2204 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usOperatingTempStep = 1; table_info 2205 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usOperatingTempHyst = 1; table_info 2214 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usOperatingTempMinLimit; table_info 2217 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usOperatingTempMaxLimit; table_info 2220 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usDefaultTargetOperatingTemp; table_info 2223 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usOperatingTempStep; table_info 2226 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->cac_dtp_table->usTargetOperatingTemp; table_info 2771 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 2774 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c for (count = table_info->vdd_dep_on_sclk->count-1; count >= 0; count--) { table_info 2775 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (tmp_sclk >= table_info->vdd_dep_on_sclk->entries[count].clk) { table_info 2776 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp_sclk = table_info->vdd_dep_on_sclk->entries[count].clk; table_info 2783 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp_sclk = table_info->vdd_dep_on_sclk->entries[0].clk; table_info 2787 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c *sclk_mask = table_info->vdd_dep_on_sclk->count - 1; table_info 2898 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 2932 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c for (count = table_info->vdd_dep_on_sclk->count - 1; table_info 2935 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_sclk->entries[count].clk) { table_info 2937 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_sclk->entries[count].clk; table_info 2943 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk; table_info 3222 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 3225 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c table_info->vdd_dep_on_mclk; table_info 4653 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 4660 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL) table_info 4662 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_sclk_table = table_info->vdd_dep_on_sclk; table_info 4690 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 4697 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (table_info == NULL) table_info 4699 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dep_mclk_table = table_info->vdd_dep_on_mclk; table_info 4796 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct phm_ppt_v1_information *table_info = table_info 4802 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c thermal_data->max = table_info->cac_dtp_table->usSoftwareShutdownTemp * table_info 1112 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c struct phm_ppt_v1_information *table_info = table_info 1120 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c cac_table = table_info->cac_dtp_table; table_info 1197 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c struct phm_ppt_v1_information *table_info = table_info 1205 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c cac_table = table_info->cac_dtp_table; table_info 465 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c struct phm_ppt_v1_information *table_info = table_info 471 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { table_info 472 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c voltage_id = table_info->vdd_dep_on_sclk->entries[entry_id].vddInd; table_info 477 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c if (entry_id >= table_info->vdd_dep_on_sclk->count) { table_info 482 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c *sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk; table_info 535 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c struct phm_ppt_v1_information *table_info = table_info 538 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table_info->vddc_dep_on_dal_pwrl; table_info 555 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c vddc_table = table_info->vdd_dep_on_sclk; table_info 194 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 283 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (table_info->tdp_table->usClockStretchAmount && table_info 304 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 322 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vddc_lookup_table = table_info->vddc_lookup_table; table_info 329 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table[0] = table_info->vdd_dep_on_sclk; table_info 330 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table[1] = table_info->vdd_dep_on_mclk; table_info 331 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table[2] = table_info->vdd_dep_on_socclk; table_info 521 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 529 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { table_info 530 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c voltage_id = table_info->vdd_dep_on_socclk->entries[entry_id].vddInd; table_info 535 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c PP_ASSERT_WITH_CODE(entry_id < table_info->vdd_dep_on_socclk->count, table_info 539 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c *socclk = table_info->vdd_dep_on_socclk->entries[entry_id].clk; table_info 558 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 561 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_socclk; table_info 568 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vddc_lookup_table, vv_id, &sclk)) { table_info 663 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 666 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->mm_dep_table; table_info 668 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_mclk; table_info 673 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c case 0: vdt = table_info->vdd_dep_on_socclk; break; table_info 674 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c case 1: vdt = table_info->vdd_dep_on_sclk; break; table_info 675 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c case 2: vdt = table_info->vdd_dep_on_dcefclk; break; table_info 676 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c case 3: vdt = table_info->vdd_dep_on_pixclk; break; table_info 677 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c case 4: vdt = table_info->vdd_dep_on_dispclk; break; table_info 678 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c case 5: vdt = table_info->vdd_dep_on_phyclk; break; table_info 684 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vddc_lookup_table->entries[voltage_id].us_vdd; table_info 691 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vddc_lookup_table->entries[voltage_id].us_vdd; table_info 697 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vddc_lookup_table->entries[voltage_id].us_vdd; table_info 700 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vddci_lookup_table->entries[voltage_id].us_vdd; table_info 703 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vddmem_lookup_table->entries[voltage_id].us_vdd; table_info 741 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 747 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vddc_lookup_table, &(data->vddc_leakage)); table_info 752 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c &(data->vddc_leakage), &table_info->max_clock_voltage_on_dc.vddc); table_info 761 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c tmp_result = vega10_sort_lookup_table(hwmgr, table_info->vddc_lookup_table); table_info 770 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 773 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_socclk; table_info 775 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_mclk; table_info 787 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.sclk = table_info 789 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.mclk = table_info 791 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.vddc = table_info 793 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.vddci = table_info 797 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.sclk; table_info 799 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.mclk; table_info 801 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.vddc; table_info 803 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->max_clock_voltage_on_ac.vddci; table_info 1156 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1163 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_mclk, table_info 1172 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_mclk, table_info 1182 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_sclk, table_info 1245 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1248 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->pcie_table; table_info 1293 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1299 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_socclk; table_info 1301 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_sclk; table_info 1303 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_mclk; table_info 1305 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->mm_dep_table; table_info 1307 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_dcefclk; table_info 1309 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_pixclk; table_info 1311 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_dispclk; table_info 1313 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_phyclk; table_info 1466 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1470 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)table_info->us_ulv_voltage_offset; table_info 1473 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->us_ulv_smnclk_did); table_info 1475 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->us_ulv_mp1clk_did); table_info 1477 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->us_ulv_gfxclk_bypass); table_info 1553 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1566 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_on_sclk = table_info->vdd_dep_on_sclk; table_info 1619 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1633 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_on_soc = table_info->vdd_dep_on_socclk; table_info 1663 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1691 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c cpu_to_le16(table_info->us_gfxclk_slew_rate); table_info 1721 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = hwmgr->pptable; table_info 1730 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vddc_lookup_table = table_info->vddc_lookup_table; table_info 1755 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1767 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_on_mclk = table_info->vdd_dep_on_mclk; table_info 1857 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1867 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dcefclk; table_info 1870 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dispclk; table_info 1873 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_pixclk; table_info 1876 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_phyclk; table_info 1888 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vddc = table_info->vddc_lookup_table-> table_info 1925 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1928 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->mm_dep_table; table_info 2019 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 2022 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->mm_dep_table; table_info 2086 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 2089 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_sclk; table_info 2105 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 2108 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_sclk; table_info 2460 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = hwmgr->pptable; table_info 2465 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_mclk; table_info 2475 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_sclk; table_info 2496 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 2523 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->uc_gfx_dpm_voltage_mode); table_info 2525 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->uc_soc_dpm_voltage_mode); table_info 2527 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->uc_uclk_dpm_voltage_mode); table_info 2529 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->uc_uvd_dpm_voltage_mode); table_info 2531 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->uc_vce_dpm_voltage_mode); table_info 2533 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->uc_mp0_dpm_voltage_mode); table_info 2536 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (uint8_t)(table_info->uc_dcef_dpm_voltage_mode); table_info 2542 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->us_ulv_voltage_offset) { table_info 3147 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 3195 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c for (count = table_info->vdd_dep_on_sclk->count - 1; table_info 3198 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_sclk->entries[count].clk) { table_info 3200 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_sclk->entries[count].clk; table_info 3206 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk; table_info 3479 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 3482 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c vdd_dep_table_on_mclk = table_info->vdd_dep_on_mclk; table_info 3916 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 3918 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *mclk_table = table_info->vdd_dep_on_mclk; table_info 4034 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 4037 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (table_info->vdd_dep_on_sclk->count > VEGA10_UMD_PSTATE_GFXCLK_LEVEL && table_info 4038 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_socclk->count > VEGA10_UMD_PSTATE_SOCCLK_LEVEL && table_info 4039 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_mclk->count > VEGA10_UMD_PSTATE_MCLK_LEVEL) { table_info 4043 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c hwmgr->pstate_sclk = table_info->vdd_dep_on_sclk->entries[VEGA10_UMD_PSTATE_GFXCLK_LEVEL].clk; table_info 4044 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c hwmgr->pstate_mclk = table_info->vdd_dep_on_mclk->entries[VEGA10_UMD_PSTATE_MCLK_LEVEL].clk; table_info 4052 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c *sclk_mask = table_info->vdd_dep_on_sclk->count - 1; table_info 4053 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c *soc_mask = table_info->vdd_dep_on_socclk->count - 1; table_info 4054 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c *mclk_mask = table_info->vdd_dep_on_mclk->count - 1; table_info 4197 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 4200 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c &table_info->max_clock_voltage_on_ac; table_info 4211 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 4214 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_sclk; table_info 4231 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 4234 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_mclk; table_info 4257 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 4260 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_dcefclk; table_info 4273 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 4276 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c table_info->vdd_dep_on_socclk; table_info 4314 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 4321 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_mclk; table_info 4324 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dcefclk; table_info 4327 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_dispclk; table_info 4330 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_pixclk; table_info 4333 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c dep_table = table_info->vdd_dep_on_phyclk; table_info 4341 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c clocks->data[i].voltage_in_mv = (uint32_t)(table_info->vddc_lookup_table-> table_info 5088 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v2_information *table_info = hwmgr->pptable; table_info 5089 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = table_info->vdd_dep_on_socclk; table_info 1288 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct phm_ppt_v2_information *table_info = table_info 1290 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct phm_tdp_table *tdp_table = table_info->tdp_table; table_info 1338 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct phm_ppt_v2_information *table_info = table_info 1340 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct phm_tdp_table *tdp_table = table_info->tdp_table; table_info 812 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c struct phm_ppt_v2_information *table_info = table_info 830 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c pcie_count = table_info->vdd_dep_on_sclk->count; table_info 1684 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 1687 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c &table_info->max_clock_voltage_on_ac; table_info 2742 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct phm_ppt_v2_information *table_info = table_info 2745 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c &table_info->max_clock_voltage_on_ac; table_info 472 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 475 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (table_info && table_info 476 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && table_info 477 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID) table_info 480 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c [table_info->cac_dtp_table->usPowerTuneDataSetID - 1]; table_info 494 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 496 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; table_info 588 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 595 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128); table_info 674 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 678 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table; table_info 762 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 765 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->vddc_lookup_table; table_info 802 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 808 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; table_info 809 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset * table_info 945 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 954 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c vdd_dep_table = table_info->vdd_dep_on_sclk; table_info 1009 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1011 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table; table_info 1169 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1178 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c vdd_dep_table = table_info->vdd_dep_on_mclk; table_info 1279 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1285 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { table_info 1286 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { table_info 1291 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, table_info 1305 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1322 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->vdd_dep_on_sclk, table_info 1380 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->vdd_dep_on_mclk, table_info 1428 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1431 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->mm_dep_table; table_info 1467 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1470 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->mm_dep_table; table_info 1564 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1567 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->mm_dep_table; table_info 1641 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1645 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c count = (uint8_t)(table_info->vdd_dep_on_sclk->count); table_info 1647 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (table_info->vdd_dep_on_sclk->entries[level].clk >= table_info 1654 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c count = (uint8_t)(table_info->vdd_dep_on_mclk->count); table_info 1656 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (table_info->vdd_dep_on_mclk->entries[level].clk >= table_info 1674 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1677 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->vdd_dep_on_sclk; table_info 1679 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount; table_info 1928 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1952 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (data->ulv_supported && table_info->us_ulv_voltage_offset) { table_info 2022 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c table_info->cac_dtp_table->usTargetOperatingTemp * table_info 2025 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (table_info->cac_dtp_table->usTargetOperatingTemp - 1) * table_info 2372 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2376 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (table_info->mm_dep_table->count > 0) table_info 2378 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 2404 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2410 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 430 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 432 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; table_info 489 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 493 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128); table_info 569 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 573 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table; table_info 704 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 707 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->vddc_lookup_table; table_info 738 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 744 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; table_info 745 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset * table_info 913 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 923 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c vdd_dep_table = table_info->vdd_dep_on_sclk; table_info 982 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 984 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table; table_info 1075 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1085 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c vdd_dep_table = table_info->vdd_dep_on_mclk; table_info 1178 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1184 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { table_info 1185 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { table_info 1190 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, table_info 1205 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1216 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->vdd_dep_on_sclk, table_info 1251 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->vdd_dep_on_mclk, table_info 1292 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1295 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->mm_dep_table; table_info 1398 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1401 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->mm_dep_table; table_info 1485 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1489 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c count = (uint8_t)(table_info->vdd_dep_on_sclk->count); table_info 1492 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (table_info->vdd_dep_on_sclk->entries[level].clk >= table_info 1499 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c count = (uint8_t)(table_info->vdd_dep_on_mclk->count); table_info 1501 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (table_info->vdd_dep_on_mclk->entries[level].clk >= table_info 1517 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1520 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->vdd_dep_on_sclk; table_info 1522 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount; table_info 1578 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->smc_state_table.LdoRefSel = (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 6; table_info 1653 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1656 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->vdd_dep_on_sclk; table_info 1806 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1809 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (table_info && table_info 1810 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && table_info 1811 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID) table_info 1814 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c [table_info->cac_dtp_table->usPowerTuneDataSetID - 1]; table_info 1826 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1850 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (hw_data->ulv_supported && table_info->us_ulv_voltage_offset) { table_info 1920 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table_info->cac_dtp_table->usTargetOperatingTemp * table_info 1923 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (table_info->cac_dtp_table->usTargetOperatingTemp - 1) * table_info 2181 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2185 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (table_info->mm_dep_table->count > 0) table_info 2187 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 2213 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2219 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 2244 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2246 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table; table_info 482 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 488 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; table_info 489 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset * table_info 1147 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1153 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { table_info 1154 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { table_info 1162 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, table_info 1582 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1585 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c table_info->vdd_dep_on_sclk; table_info 1589 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount; table_info 1832 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1834 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; table_info 1893 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1899 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 256); table_info 1977 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1981 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table; table_info 2207 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2210 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c if (table_info && table_info 2211 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && table_info 2212 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID) table_info 2215 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c [table_info->cac_dtp_table->usPowerTuneDataSetID - 1]; table_info 2227 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2258 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c if (data->ulv_supported && table_info->us_ulv_voltage_offset) { table_info 2326 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c table_info->cac_dtp_table->usTargetOperatingTemp * table_info 2329 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c (table_info->cac_dtp_table->usTargetOperatingTemp - 1) * table_info 2680 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2684 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c if (table_info->mm_dep_table->count > 0) table_info 2686 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 2714 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct phm_ppt_v1_information *table_info = table_info 2719 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 335 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 339 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (table_info->mm_dep_table->count > 0) table_info 341 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 367 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 373 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (uint8_t) (table_info->mm_dep_table->count - 1); table_info 398 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 400 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table; table_info 433 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 436 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (table_info && table_info 437 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && table_info 438 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->cac_dtp_table->usPowerTuneDataSetID) table_info 441 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c [table_info->cac_dtp_table->usPowerTuneDataSetID - 1]; table_info 505 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 508 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vddc_lookup_table; table_info 542 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 548 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; table_info 549 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset * table_info 813 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 821 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_sclk, clock, table_info 866 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 868 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table; table_info 982 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 988 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (table_info->vdd_dep_on_mclk) { table_info 990 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_mclk, clock, table_info 1086 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1092 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { table_info 1093 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { table_info 1098 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, table_info 1113 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1125 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_sclk, table_info 1163 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_mclk, table_info 1209 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1212 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->mm_dep_table; table_info 1322 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1325 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->mm_dep_table; table_info 1409 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1413 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c count = (uint8_t)(table_info->vdd_dep_on_sclk->count); table_info 1416 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (table_info->vdd_dep_on_sclk->entries[level].clk >= table_info 1423 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c count = (uint8_t)(table_info->vdd_dep_on_mclk->count); table_info 1425 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (table_info->vdd_dep_on_mclk->entries[level].clk >= table_info 1448 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1450 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; table_info 1497 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1500 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_sclk; table_info 1503 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount; table_info 1532 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_info 1533 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 5; table_info 1580 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1583 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_sclk; table_info 1754 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1758 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128); table_info 1834 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1838 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table; table_info 1929 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct phm_ppt_v1_information *table_info = table_info 1935 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (struct phm_ppt_v1_gpio_table *)table_info->gpio_table; table_info 1958 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (hw_data->ulv_supported && table_info->us_ulv_voltage_offset) { table_info 2029 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->cac_dtp_table->usTargetOperatingTemp * table_info 2032 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (table_info->cac_dtp_table->usTargetOperatingTemp - 1) * table_info 2060 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->gpio_table->vrhot_triggered_sclk_dpm_index;