sst_dsp_shim_write   91 sound/soc/intel/common/sst-dsp.c EXPORT_SYMBOL_GPL(sst_dsp_shim_write);
sst_dsp_shim_write  218 sound/soc/intel/common/sst-dsp.h void sst_dsp_shim_write(struct sst_dsp *sst, u32 offset, u32 value);
sst_dsp_shim_write  388 sound/soc/intel/haswell/sst-haswell-dsp.c 	sst_dsp_shim_write(sst, SST_IPCX, 0x0);
sst_dsp_shim_write  389 sound/soc/intel/haswell/sst-haswell-dsp.c 	sst_dsp_shim_write(sst, SST_IPCD, 0x0);
sst_dsp_shim_write  390 sound/soc/intel/haswell/sst-haswell-dsp.c 	sst_dsp_shim_write(sst, 0x80, 0x6);
sst_dsp_shim_write  391 sound/soc/intel/haswell/sst-haswell-dsp.c 	sst_dsp_shim_write(sst, 0xe0, 0x300a);
sst_dsp_shim_write  121 sound/soc/intel/skylake/bxt-sst.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_HIPCI, SKL_ADSP_REG_HIPCI_BUSY |
sst_dsp_shim_write   61 sound/soc/intel/skylake/cnl-sst.c 	sst_dsp_shim_write(ctx, CNL_ADSP_REG_HIPCIDR,
sst_dsp_shim_write   68 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_BDLPL, CL_SD_BDLPLBA(0));
sst_dsp_shim_write   69 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_BDLPU, 0);
sst_dsp_shim_write   71 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_CBL, 0);
sst_dsp_shim_write   72 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_LVI, 0);
sst_dsp_shim_write  111 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_BDLPL,
sst_dsp_shim_write  113 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_BDLPU,
sst_dsp_shim_write  116 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_CBL, max_size);
sst_dsp_shim_write  117 sound/soc/intel/skylake/skl-sst-cldma.c 	sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_LVI, count - 1);